xunge/DecIR huggingface dataset:
__attribute__((no, noclone)) void fn1(void) {
  volatile int i;
  int m = -1;
  volatile int a[7];
  asm("" : : "r"(&a) : "memory");
  i = a[-1];
  asm("" : : "r"(&a) : "memory");
  i = a[m];
}


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
movl   $0xffffffff,-0x8(%rbp)
lea    -0x30(%rbp),%rax
mov    -0x34(%rbp),%eax
mov    %eax,-0x4(%rbp)
lea    -0x30(%rbp),%rax
movslq -0x8(%rbp),%rax
mov    -0x30(%rbp,%rax,4),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
lea    -0x28(%rsp),%rax
mov    -0x2c(%rsp),%ecx
mov    %ecx,-0x2c(%rsp)
mov    -0x2c(%rsp),%eax
mov    %eax,-0x2c(%rsp)
ret

LLVM IR (-O0):
define void @fn1() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [7 x i32]
store i32 -1, i32* %2
%4 = getelementptr inbounds [7 x i32], [7 x i32]* %3, i64 0, i64 -1
%5 = load volatile i32, i32* %4
store volatile i32 %5, i32* %1
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds [7 x i32], [7 x i32]* %3, i64 0, i64 %7
%9 = load volatile i32, i32* %8
store volatile i32 %9, i32* %1
ret void
}

LLVM IR (-O2):
define void @fn1() {
%1 = alloca i32
%2 = alloca [7 x i32]
%3 = bitcast i32* %1 to i8*
%4 = bitcast [7 x i32]* %2 to i8*
%5 = getelementptr inbounds [7 x i32], [7 x i32]* %2, i64 0, i64 -1
%6 = load volatile i32, i32* %5
store volatile i32 %6, i32* %1
%7 = load volatile i32, i32* %5
store volatile i32 %7, i32* %1
ret void
}
void grace_set_landscape(int *page_width_pixels, int *page_length_pixels,
                         char **distill_landscape_flag,
                         float *starting_single_view_min_y,
                         float *view_x_range) {
  *page_width_pixels = 796;
  *page_length_pixels = 612;
  *distill_landscape_flag = "-pagesize 11 8.5 in";
  *starting_single_view_min_y -= 0.3;
  *view_x_range = 1.10;
}


x86 assembly (clang, -O0):
<grace_set_landscape>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x31c,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x264,(%rax)
mov    -0x18(%rbp),%rax
lea    0xed9(%rip),%rcx
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rax
movss  (%rax),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeba(%rip),%xmm1
subsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,(%rax)
mov    -0x28(%rbp),%rax
movss  0xe9a(%rip),%xmm0
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<grace_set_landscape>:
movl   $0x31c,(%rdi)
movl   $0x264,(%rsi)
lea    0xef5(%rip),%rax
mov    %rax,(%rdx)
movss  (%rcx),%xmm0
cvtss2sd %xmm0,%xmm0
addsd  0xeda(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,(%rcx)
movl   $0x3f8ccccd,(%r8)
ret

LLVM IR (-O0):
@.str = [20 x i8] c"-pagesize 11 8.5 in\00"
define void @grace_set_landscape(i32* %0, i32* %1, i8** %2, float* %3, float* %4) {
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i8**
%9 = alloca float*
%10 = alloca float*
store i32* %0, i32** %6
store i32* %1, i32** %7
store i8** %2, i8*** %8
store float* %3, float** %9
store float* %4, float** %10
%11 = load i32*, i32** %6
store i32 796, i32* %11
%12 = load i32*, i32** %7
store i32 612, i32* %12
%13 = load i8**, i8*** %8
store i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8** %13
%14 = load float*, float** %9
%15 = load float, float* %14
%16 = fpext float %15 to double
%17 = fsub double %16, 3.000000e-01
%18 = fptrunc double %17 to float
store float %18, float* %14
%19 = load float*, float** %10
store float 0x3FF19999A0000000, float* %19
ret void
}

LLVM IR (-O2):
@.str = [20 x i8] c"-pagesize 11 8.5 in\00"
define void @grace_set_landscape(i32* nocapture writeonly %0, i32* nocapture writeonly %1, i8** nocapture writeonly %2, float* nocapture %3, float* nocapture writeonly %4) {
store i32 796, i32* %0
store i32 612, i32* %1
store i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8** %2
%6 = load float, float* %3
%7 = fpext float %6 to double
%8 = fadd double %7, -3.000000e-01
%9 = fptrunc double %8 to float
store float %9, float* %3
store float 0x3FF19999A0000000, float* %4
ret void
}
double opr_NA(struct lifo *stack) { return 6.0221367E23; }


x86 assembly (clang, -O0):
<opr_NA>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  0xef0(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<opr_NA>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
%struct.lifo = type opaque
define double @opr_NA(%struct.lifo* %0) {
%2 = alloca %struct.lifo*
store %struct.lifo* %0, %struct.lifo** %2
ret double 0x44DFE18461BE0EC2
}

LLVM IR (-O2):
%struct.lifo = type opaque
define double @opr_NA(%struct.lifo* nocapture readnone %0) {
ret double 0x44DFE18461BE0EC2
}
unsigned short AngleToPWM(int angle) {
  unsigned short PWM;
  int mina = 0;
  int maxa = 180;
  int minp = 800;
  int maxp = 2400;
  PWM = (unsigned short)((angle - mina) * (maxp - minp) / (maxa - mina) + minp);
  return PWM;
}


x86 assembly (clang, -O0):
<AngleToPWM>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0xb4,-0x10(%rbp)
movl   $0x320,-0x14(%rbp)
movl   $0x960,-0x18(%rbp)
mov    -0x4(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    -0x18(%rbp),%ecx
sub    -0x14(%rbp),%ecx
imul   %ecx,%eax
mov    -0x10(%rbp),%ecx
sub    -0xc(%rbp),%ecx
cltd
idiv   %ecx
add    -0x14(%rbp),%eax
mov    %ax,-0x6(%rbp)
movzwl -0x6(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AngleToPWM>:
imul   $0x640,%edi,%eax
cltq
imul   $0xffffffffb60b60b7,%rax,%rcx
shr    $0x20,%rcx
add    %ecx,%eax
mov    %eax,%ecx
shr    $0x7,%ecx
shr    $0x1f,%eax
add    %ecx,%eax
add    $0x320,%eax
ret

LLVM IR (-O0):
define zeroext i16 @AngleToPWM(i32 %0) {
%2 = alloca i32
%3 = alloca i16
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
store i32 180, i32* %5
store i32 800, i32* %6
store i32 2400, i32* %7
%8 = load i32, i32* %2
%9 = load i32, i32* %4
%10 = sub nsw i32 %8, %9
%11 = load i32, i32* %7
%12 = load i32, i32* %6
%13 = sub nsw i32 %11, %12
%14 = mul nsw i32 %10, %13
%15 = load i32, i32* %5
%16 = load i32, i32* %4
%17 = sub nsw i32 %15, %16
%18 = sdiv i32 %14, %17
%19 = load i32, i32* %6
%20 = add nsw i32 %18, %19
%21 = trunc i32 %20 to i16
store i16 %21, i16* %3
%22 = load i16, i16* %3
ret i16 %22
}

LLVM IR (-O2):
define zeroext i16 @AngleToPWM(i32 %0) {
%2 = mul nsw i32 %0, 1600
%3 = sdiv i32 %2, 180
%4 = trunc i32 %3 to i16
%5 = add i16 %4, 800
ret i16 %5
}
/* Variables and functions */
int /*<<< orphan*/ draw(char);
void drawEndline() { draw('\n'); }


x86 assembly (clang, -O0):
<drawEndline>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1030 <draw@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawEndline>:
mov    $0xa,%edi
jmp    1030 <draw@plt>

LLVM IR (-O0):
define void @drawEndline() {
%1 = call i32 @draw(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @drawEndline() {
%1 = tail call i32 @draw(i8 signext 10)
ret void
}
/* Variables and functions */
long double asinh(double);
long double asinhl(long double x) { return asinh((double)x); }


x86 assembly (clang, -O0):
<asinhl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fstpl  -0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1030 <asinh@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asinhl>:
fldt   0x8(%rsp)
fstpl  -0x8(%rsp)
movsd  -0x8(%rsp),%xmm0
jmp    1030 <asinh@plt>

LLVM IR (-O0):
define x86_fp80 @asinhl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fptrunc x86_fp80 %3 to double
%5 = call x86_fp80 @asinh(double %4)
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @asinhl(x86_fp80 %0) {
%2 = fptrunc x86_fp80 %0 to double
%3 = tail call x86_fp80 @asinh(double %2)
ret x86_fp80 %3
}
/* Variables and functions */
int /*<<< orphan*/ snooze(int);
int main(void) {
  snooze(3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x3,%edi
call   1030 <snooze@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
call   1030 <snooze@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @snooze(i32 3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @snooze(i32 3)
ret i32 0
}
int ld_gt_cr2(long double a1) { return !(((100) > (a1))); }


x86 assembly (clang, -O0):
<ld_gt_cr2>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
flds   0xeed(%rip)
fucomip %st(1),%st
fstp   %st(0)
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ld_gt_cr2>:
fldt   0x8(%rsp)
flds   0xef6(%rip)
xor    %eax,%eax
fucomip %st(1),%st
fstp   %st(0)
setbe  %al
ret

LLVM IR (-O0):
define i32 @ld_gt_cr2(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fcmp ogt x86_fp80 0xK4005C800000000000000, %3
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @ld_gt_cr2(x86_fp80 %0) {
%2 = fcmp uge x86_fp80 %0, 0xK4005C800000000000000
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ config_create_dir(char *);
int /*<<< orphan*/ config_path(char *);
void config_setup() {
  char path[512];
  config_path(path);
  config_create_dir(path);
}


x86 assembly (clang, -O0):
<config_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x200,%rsp
lea    -0x200(%rbp),%rdi
call   1030 <config_path@plt>
lea    -0x200(%rbp),%rdi
call   1040 <config_create_dir@plt>
add    $0x200,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_setup>:
push   %rbx
sub    $0x200,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <config_path@plt>
mov    %rbx,%rdi
call   1040 <config_create_dir@plt>
add    $0x200,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @config_setup() {
%1 = alloca [512 x i8]
%2 = getelementptr inbounds [512 x i8], [512 x i8]* %1, i64 0, i64 0
%3 = call i32 @config_path(i8* %2)
%4 = getelementptr inbounds [512 x i8], [512 x i8]* %1, i64 0, i64 0
%5 = call i32 @config_create_dir(i8* %4)
ret void
}

LLVM IR (-O2):
define void @config_setup() {
%1 = alloca [512 x i8]
%2 = getelementptr inbounds [512 x i8], [512 x i8]* %1, i64 0, i64 0
%3 = call i32 @config_path(i8* %2)
%4 = call i32 @config_create_dir(i8* %2)
ret void
}
int on_release(struct fs_context *context) { return 1; }


x86 assembly (clang, -O0):
<on_release>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_release>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.fs_context = type opaque
define i32 @on_release(%struct.fs_context* %0) {
%2 = alloca %struct.fs_context*
store %struct.fs_context* %0, %struct.fs_context** %2
ret i32 1
}

LLVM IR (-O2):
%struct.fs_context = type opaque
define i32 @on_release(%struct.fs_context* nocapture readnone %0) {
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
long long _mm_cvtss_i64(int /*<<< orphan*/);
long long test_mm_cvtss_i64(__m128 A) { return _mm_cvtss_i64(A); }


x86 assembly (clang, -O0):
<test_mm_cvtss_i64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_cvtss_i64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cvtss_i64>:
jmp    1030 <_mm_cvtss_i64@plt>

LLVM IR (-O0):
define i64 @test_mm_cvtss_i64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @_mm_cvtss_i64(i32 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @test_mm_cvtss_i64(i32 %0) {
%2 = tail call i64 @_mm_cvtss_i64(i32 %0)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ handle_IO(int /*<<< orphan*/);
int gen_IO() {
  handle_IO(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_IO>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_IO@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_IO>:
push   %rax
xor    %edi,%edi
call   1030 <handle_IO@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_IO() {
%1 = call i32 @handle_IO(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_IO() {
%1 = tail call i32 @handle_IO(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ addToTree(int /*<<< orphan*/);
int /*<<< orphan*/ dequeueList();
int /*<<< orphan*/ peekList();
scalar_t__ strcmp(int /*<<< orphan*/, char *);
int NUMBER() {
  if (strcmp(peekList(), "<number>") != 0) {
    return 0;
  }
  dequeueList();
  addToTree(peekList());
  dequeueList();
  return 1;
}


x86 assembly (clang, -O0):
<NUMBER>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <peekList@plt>
mov    %eax,%edi
lea    0xea8(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     1173 <NUMBER+0x33>
movl   $0x0,-0x4(%rbp)
jmp    1196 <NUMBER+0x56>
mov    $0x0,%al
call   1060 <dequeueList@plt>
mov    $0x0,%al
call   1050 <peekList@plt>
mov    %eax,%edi
call   1040 <addToTree@plt>
mov    $0x0,%al
call   1060 <dequeueList@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NUMBER>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1050 <peekList@plt>
lea    0xeaf(%rip),%rsi
mov    %eax,%edi
call   1030 <strcmp@plt>
test   %rax,%rax
jne    117e <NUMBER+0x3e>
xor    %eax,%eax
call   1060 <dequeueList@plt>
xor    %eax,%eax
call   1050 <peekList@plt>
mov    %eax,%edi
call   1040 <addToTree@plt>
xor    %eax,%eax
call   1060 <dequeueList@plt>
mov    $0x1,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"<number>\00"
define i32 @NUMBER() {
%1 = alloca i32
%2 = call i32 (...) @peekList()
%3 = call i64 @strcmp(i32 %2, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 0, i32* %1
br label %11
6: ; preds = %0
%7 = call i32 (...) @dequeueList()
%8 = call i32 (...) @peekList()
%9 = call i32 @addToTree(i32 %8)
%10 = call i32 (...) @dequeueList()
store i32 1, i32* %1
br label %11
11: ; preds = %6, %5
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
@.str = [9 x i8] c"<number>\00"
define i32 @NUMBER() {
%1 = tail call i32 (...) @peekList()
%2 = tail call i64 @strcmp(i32 %1, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %0
%5 = tail call i32 (...) @dequeueList()
%6 = tail call i32 (...) @peekList()
%7 = tail call i32 @addToTree(i32 %6)
%8 = tail call i32 (...) @dequeueList()
br label %9
9: ; preds = %0, %4
%10 = phi i32 [ 1, %4 ], [ 0, %0 ]
ret i32 %10
}
void null_handler() {}


x86 assembly (clang, -O0):
<null_handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_handler>:
ret

LLVM IR (-O0):
define void @null_handler() {
ret void
}

LLVM IR (-O2):
define void @null_handler() {
ret void
}
char *read_cstring(void **ptr, void *end) {
  char *start = *ptr, *strend = start;
  while (strend != end) {
    if (!*strend++) {
      *ptr = strend;
      return start;
    }
  }
  die("c string overflow");
}


x86 assembly (clang, -O0):
<read_cstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x18(%rbp),%rax
je     1176 <read_cstring+0x66>
mov    -0x28(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x28(%rbp)
cmpb   $0x0,(%rax)
jne    1171 <read_cstring+0x61>
mov    -0x28(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1184 <read_cstring+0x74>
jmp    1133 <read_cstring+0x23>
lea    0xe83(%rip),%rdi
mov    $0x0,%al
call   1030 <die@plt>
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_cstring>:
push   %rbx
mov    (%rdi),%rbx
mov    %rbx,%rax
nopw   0x0(%rax,%rax,1)
cmp    %rsi,%rax
je     1136 <read_cstring+0x26>
lea    0x1(%rax),%rcx
cmpb   $0x0,(%rax)
mov    %rcx,%rax
jne    1120 <read_cstring+0x10>
mov    %rcx,(%rdi)
jmp    1144 <read_cstring+0x34>
lea    0xec3(%rip),%rdi
xor    %eax,%eax
call   1030 <die@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"c string overflow\00"
define i8* @read_cstring(i8** %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i8** %0, i8*** %4
store i8* %1, i8** %5
%8 = load i8**, i8*** %4
%9 = load i8*, i8** %8
store i8* %9, i8** %6
%10 = load i8*, i8** %6
store i8* %10, i8** %7
br label %11
11: ; preds = %24, %2
%12 = load i8*, i8** %7
%13 = load i8*, i8** %5
%14 = icmp ne i8* %12, %13
br i1 %14, label %15, label %25
15: ; preds = %11
%16 = load i8*, i8** %7
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %7
%18 = load i8, i8* %16
%19 = icmp ne i8 %18, 0
br i1 %19, label %24, label %20
20: ; preds = %15
%21 = load i8*, i8** %7
%22 = load i8**, i8*** %4
store i8* %21, i8** %22
%23 = load i8*, i8** %6
store i8* %23, i8** %3
br label %27
24: ; preds = %15
br label %11
25: ; preds = %11
%26 = call i32 (i8*, ...) bitcast (i32 (...)* @die to i32 (i8*, ...)*)(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %27
27: ; preds = %25, %20
%28 = load i8*, i8** %3
ret i8* %28
}

LLVM IR (-O2):
@.str = [18 x i8] c"c string overflow\00"
define i8* @read_cstring(i8** nocapture %0, i8* readnone %1) {
%3 = load i8*, i8** %0
br label %4
4: ; preds = %7, %2
%5 = phi i8* [ %3, %2 ], [ %8, %7 ]
%6 = icmp eq i8* %5, %1
br i1 %6, label %12, label %7
7: ; preds = %4
%8 = getelementptr inbounds i8, i8* %5, i64 1
%9 = load i8, i8* %5
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %7
store i8* %8, i8** %0
br label %14
12: ; preds = %4
%13 = tail call i32 (i8*, ...) bitcast (i32 (...)* @die to i32 (i8*, ...)*)(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
br label %14
14: ; preds = %12, %11
ret i8* %3
}
/* Type definitions */
struct lineFile {
  int dummy;
};
struct asObject {
  int dummy;
};

/* Variables and functions */
struct asObject *asParseLineFile(struct lineFile *);
char *cloneString(char *);
int /*<<< orphan*/ freez(char **);
struct lineFile *lineFileOnString(char *, int, char *);
struct asObject *asParseText(char *text) {
  char *dupe = cloneString(text);
  struct lineFile *lf = lineFileOnString("text", 1, dupe);
  struct asObject *objList = asParseLineFile(lf);
  freez(&dupe);
  return objList;
}


x86 assembly (clang, -O0):
<asParseText>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <cloneString@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
lea    0xe9c(%rip),%rdi
mov    $0x1,%esi
call   1030 <lineFileOnString@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1060 <asParseLineFile@plt>
mov    %rax,-0x20(%rbp)
lea    -0x10(%rbp),%rdi
call   1050 <freez@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asParseText>:
push   %rbx
sub    $0x10,%rsp
call   1040 <cloneString@plt>
mov    %rax,0x8(%rsp)
lea    0xeaa(%rip),%rdi
mov    $0x1,%esi
mov    %rax,%rdx
call   1030 <lineFileOnString@plt>
mov    %rax,%rdi
call   1060 <asParseLineFile@plt>
mov    %rax,%rbx
lea    0x8(%rsp),%rdi
call   1050 <freez@plt>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.asObject = type { i32 }
%struct.lineFile = type { i32 }
@.str = [5 x i8] c"text\00"
define %struct.asObject* @asParseText(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca %struct.lineFile*
%5 = alloca %struct.asObject*
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i8* @cloneString(i8* %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = call %struct.lineFile* @lineFileOnString(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 1, i8* %8)
store %struct.lineFile* %9, %struct.lineFile** %4
%10 = load %struct.lineFile*, %struct.lineFile** %4
%11 = call %struct.asObject* @asParseLineFile(%struct.lineFile* %10)
store %struct.asObject* %11, %struct.asObject** %5
%12 = call i32 @freez(i8** %3)
%13 = load %struct.asObject*, %struct.asObject** %5
ret %struct.asObject* %13
}

LLVM IR (-O2):
%struct.asObject = type { i32 }
%struct.lineFile = type { i32 }
@.str = [5 x i8] c"text\00"
define %struct.asObject* @asParseText(i8* %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
%4 = tail call i8* @cloneString(i8* %0)
store i8* %4, i8** %2
%5 = tail call %struct.lineFile* @lineFileOnString(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 1, i8* %4)
%6 = tail call %struct.asObject* @asParseLineFile(%struct.lineFile* %5)
%7 = call i32 @freez(i8** %2)
ret %struct.asObject* %6
}
float floating_point_message2_signal2_encode(double value) {
  return (float)(value);
}


x86 assembly (clang, -O0):
<floating_point_message2_signal2_encode>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<floating_point_message2_signal2_encode>:
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @floating_point_message2_signal2_encode(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fptrunc double %3 to float
ret float %4
}

LLVM IR (-O2):
define float @floating_point_message2_signal2_encode(double %0) {
%2 = fptrunc double %0 to float
ret float %2
}
char getMachineEndian(void) {
  static int endian_check_int = 1;
  return *((char *)&endian_check_int);
}


x86 assembly (clang, -O0):
<getMachineEndian>:
push   %rbp
mov    %rsp,%rbp
movsbl 0x2f15(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMachineEndian>:
mov    $0x1,%al
ret

LLVM IR (-O0):
@getMachineEndian.endian_check_int = internal global i32 1
define signext i8 @getMachineEndian() {
%1 = load i8, i8* bitcast (i32* @getMachineEndian.endian_check_int to i8*)
ret i8 %1
}

LLVM IR (-O2):
define signext i8 @getMachineEndian() {
ret i8 1
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int, int);
int main(void) {
  int *p = (int *)malloc(0);
  printf("%d,%d\n", *(p), *(p + 1024));
  free(p);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rax
mov    0x1000(%rax),%edx
lea    0xe9f(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %edi,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    (%rax),%esi
mov    0x1000(%rax),%edx
lea    0xeb6(%rip),%rdi
call   1040 <printf@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d,%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i64 @malloc(i32 0)
%4 = inttoptr i64 %3 to i32*
store i32* %4, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1024
%9 = load i32, i32* %8
%10 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %9)
%11 = load i32*, i32** %2
%12 = call i32 @free(i32* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d,%d\0A\00"
define i32 @main() {
%1 = tail call i64 @malloc(i32 0)
%2 = inttoptr i64 %1 to i32*
%3 = load i32, i32* %2
%4 = getelementptr inbounds i32, i32* %2, i64 1024
%5 = load i32, i32* %4
%6 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %5)
%7 = tail call i32 @free(i32* %2)
ret i32 0
}
float to_single(__float128 a) { return (float)a; }


x86 assembly (clang, -O0):
<to_single>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movaps %xmm0,-0x10(%rbp)
movaps -0x10(%rbp),%xmm0
call   1120 <__trunctfsf2>
add    $0x10,%rsp
pop    %rbp
ret
nopl   0x0(%rax,%rax,1)

x86 assembly (clang, -O2):
<to_single>:
push   %rax
call   1110 <__trunctfsf2>
pop    %rax
ret
nopl   0x0(%rax,%rax,1)

LLVM IR (-O0):
define float @to_single(fp128 %0) {
%2 = alloca fp128
store fp128 %0, fp128* %2
%3 = load fp128, fp128* %2
%4 = fptrunc fp128 %3 to float
ret float %4
}

LLVM IR (-O2):
define float @to_single(fp128 %0) {
%2 = fptrunc fp128 %0 to float
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ time(int);
int main(int argc, char const *argv[]) {
  time(1);
  time(2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%edi
call   1030 <time@plt>
mov    $0x2,%edi
call   1030 <time@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <time@plt>
mov    $0x2,%edi
call   1030 <time@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @time(i32 1)
%7 = call i32 @time(i32 2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @time(i32 1)
%4 = tail call i32 @time(i32 2)
ret i32 0
}
void mem_deinit(void) {}


x86 assembly (clang, -O0):
<mem_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_deinit>:
ret

LLVM IR (-O0):
define void @mem_deinit() {
ret void
}

LLVM IR (-O2):
define void @mem_deinit() {
ret void
}
/* Variables and functions */
int LOG_USER;
int /*<<< orphan*/ syslog(int, char *);
void mylog(int kind, char *msg) { syslog(LOG_USER | kind, msg); }


x86 assembly (clang, -O0):
<mylog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
or     -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <syslog@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mylog>:
mov    0x2ed1(%rip),%rax
or     (%rax),%edi
jmp    1030 <syslog@plt>

LLVM IR (-O0):
@LOG_USER = global i32 0
define void @mylog(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* @LOG_USER
%6 = load i32, i32* %3
%7 = or i32 %5, %6
%8 = load i8*, i8** %4
%9 = call i32 @syslog(i32 %7, i8* %8)
ret void
}

LLVM IR (-O2):
@LOG_USER = global i32 0
define void @mylog(i32 %0, i8* %1) {
%3 = load i32, i32* @LOG_USER
%4 = or i32 %3, %0
%5 = tail call i32 @syslog(i32 %4, i8* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
int ceph_frag_bits(int /*<<< orphan*/);
int ceph_frag_value(int /*<<< orphan*/);
int ceph_frag_is_right_child(__u32 f) {
  return ceph_frag_bits(f) > 0 &&
         (ceph_frag_value(f) & (0x1000000 >> ceph_frag_bits(f))) == 1;
}


x86 assembly (clang, -O0):
<ceph_frag_is_right_child>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ceph_frag_bits@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x5(%rbp)
jle    116f <ceph_frag_is_right_child+0x4f>
mov    -0x4(%rbp),%edi
call   1040 <ceph_frag_value@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ceph_frag_bits@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
mov    $0x1000000,%edx
sar    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
cmp    $0x1,%eax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_frag_is_right_child>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <ceph_frag_bits@plt>
test   %eax,%eax
jle    1153 <ceph_frag_is_right_child+0x33>
mov    %ebx,%edi
call   1040 <ceph_frag_value@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1030 <ceph_frag_bits@plt>
mov    $0x1000000,%edx
mov    %eax,%ecx
shr    %cl,%edx
and    %ebp,%edx
xor    %eax,%eax
cmp    $0x1,%edx
sete   %al
jmp    1155 <ceph_frag_is_right_child+0x35>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ceph_frag_is_right_child(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ceph_frag_bits(i32 %3)
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i32 @ceph_frag_value(i32 %7)
%9 = load i32, i32* %2
%10 = call i32 @ceph_frag_bits(i32 %9)
%11 = ashr i32 16777216, %10
%12 = and i32 %8, %11
%13 = icmp eq i32 %12, 1
br label %14
14: ; preds = %6, %1
%15 = phi i1 [ false, %1 ], [ %13, %6 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @ceph_frag_is_right_child(i32 %0) {
%2 = tail call i32 @ceph_frag_bits(i32 %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = tail call i32 @ceph_frag_value(i32 %0)
%6 = tail call i32 @ceph_frag_bits(i32 %0)
%7 = lshr i32 16777216, %6
%8 = and i32 %7, %5
%9 = icmp eq i32 %8, 1
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %10, %4 ]
ret i32 %12
}
/* Type definitions */
struct ibv_pd {
  int dummy;
};
struct ibv_mr {
  int dummy;
};

/* Variables and functions */
struct ibv_mr *ibv_reg_mr(struct ibv_pd *, void *, size_t, int);
struct ibv_mr *mlx4_glue_reg_mr(struct ibv_pd *pd, void *addr, size_t length,
                                int access) {
  return ibv_reg_mr(pd, addr, length, access);
}


x86 assembly (clang, -O0):
<mlx4_glue_reg_mr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <ibv_reg_mr@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlx4_glue_reg_mr>:
jmp    1030 <ibv_reg_mr@plt>

LLVM IR (-O0):
%struct.ibv_mr = type { i32 }
%struct.ibv_pd = type { i32 }
define %struct.ibv_mr* @mlx4_glue_reg_mr(%struct.ibv_pd* %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca %struct.ibv_pd*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
store %struct.ibv_pd* %0, %struct.ibv_pd** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = load %struct.ibv_pd*, %struct.ibv_pd** %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i32, i32* %8
%13 = call %struct.ibv_mr* @ibv_reg_mr(%struct.ibv_pd* %9, i8* %10, i64 %11, i32 %12)
ret %struct.ibv_mr* %13
}

LLVM IR (-O2):
%struct.ibv_mr = type { i32 }
%struct.ibv_pd = type { i32 }
define %struct.ibv_mr* @mlx4_glue_reg_mr(%struct.ibv_pd* %0, i8* %1, i64 %2, i32 %3) {
%5 = tail call %struct.ibv_mr* @ibv_reg_mr(%struct.ibv_pd* %0, i8* %1, i64 %2, i32 %3)
ret %struct.ibv_mr* %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p256_opp(uintptr_t, uintptr_t);
void fiat_p256_opp(uint32_t out1[8], const uint32_t arg1[8]) {
  internal_fiat_p256_opp((uintptr_t)out1, (uintptr_t)arg1);
}


x86 assembly (clang, -O0):
<fiat_p256_opp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <internal_fiat_p256_opp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p256_opp>:
jmp    1030 <internal_fiat_p256_opp@plt>

LLVM IR (-O0):
define void @fiat_p256_opp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = ptrtoint i32* %5 to i64
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i64
%9 = call i32 @internal_fiat_p256_opp(i64 %6, i64 %8)
ret void
}

LLVM IR (-O2):
define void @fiat_p256_opp(i32* %0, i32* %1) {
%3 = ptrtoint i32* %0 to i64
%4 = ptrtoint i32* %1 to i64
%5 = tail call i32 @internal_fiat_p256_opp(i64 %3, i64 %4)
ret void
}
/* Type definitions */
union i2c_smbus_data {
  int byte;
};
typedef int __s32;

/* Variables and functions */
int /*<<< orphan*/ I2C_SMBUS_BYTE;
int /*<<< orphan*/ I2C_SMBUS_READ;
scalar_t__ i2c_smbus_access(int, int /*<<< orphan*/, int /*<<< orphan*/,
                            int /*<<< orphan*/, union i2c_smbus_data *);
__s32 i2c_smbus_read_byte(int fd) {
  union i2c_smbus_data data;
  if (i2c_smbus_access(fd, I2C_SMBUS_READ, 0, I2C_SMBUS_BYTE, &data) <= 0) {
    return -1;
  } else {
    return 0x0FF & data.byte;
  }
}


x86 assembly (clang, -O0):
<i2c_smbus_read_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
mov    0x2eba(%rip),%rax
mov    (%rax),%ecx
xor    %edx,%edx
lea    -0x10(%rbp),%r8
call   1030 <i2c_smbus_access@plt>
cmp    $0x0,%rax
jg     1151 <i2c_smbus_read_byte+0x41>
movl   $0xffffffff,-0x4(%rbp)
jmp    115c <i2c_smbus_read_byte+0x4c>
mov    -0x10(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_smbus_read_byte>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
mov    0x2ec7(%rip),%rax
mov    (%rax),%ecx
mov    %rsp,%r8
xor    %edx,%edx
call   1030 <i2c_smbus_access@plt>
test   %rax,%rax
movzbl (%rsp),%ecx
mov    $0xffffffff,%eax
cmovg  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%union.i2c_smbus_data = type { i32 }
@I2C_SMBUS_READ = global i32 0
@I2C_SMBUS_BYTE = global i32 0
define i32 @i2c_smbus_read_byte(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca %union.i2c_smbus_data
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = load i32, i32* @I2C_SMBUS_READ
%7 = load i32, i32* @I2C_SMBUS_BYTE
%8 = call i64 @i2c_smbus_access(i32 %5, i32 %6, i32 0, i32 %7, %union.i2c_smbus_data* %4)
%9 = icmp sle i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %15
11: ; preds = %1
%12 = bitcast %union.i2c_smbus_data* %4 to i32*
%13 = load i32, i32* %12
%14 = and i32 255, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %11, %10
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%union.i2c_smbus_data = type { i32 }
@I2C_SMBUS_READ = global i32 0
@I2C_SMBUS_BYTE = global i32 0
define i32 @i2c_smbus_read_byte(i32 %0) {
%2 = alloca %union.i2c_smbus_data
%3 = bitcast %union.i2c_smbus_data* %2 to i8*
%4 = load i32, i32* @I2C_SMBUS_READ
%5 = load i32, i32* @I2C_SMBUS_BYTE
%6 = call i64 @i2c_smbus_access(i32 %0, i32 %4, i32 0, i32 %5, %union.i2c_smbus_data* %2)
%7 = icmp slt i64 %6, 1
%8 = getelementptr inbounds %union.i2c_smbus_data, %union.i2c_smbus_data* %2, i64 0, i32 0
%9 = load i32, i32* %8
%10 = and i32 %9, 255
%11 = select i1 %7, i32 -1, i32 %10
ret i32 %11
}
void USB_Event_Stub(void) {}


x86 assembly (clang, -O0):
<USB_Event_Stub>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<USB_Event_Stub>:
ret

LLVM IR (-O0):
define void @USB_Event_Stub() {
ret void
}

LLVM IR (-O2):
define void @USB_Event_Stub() {
ret void
}
/* Variables and functions */
int gs_len(char *);
char *mm_alloc(int);
char *gs_dup(char *X) {
  int size = gs_len(X);
  char *res = mm_alloc(size);
  char *tmp = res;
  while (*tmp++ = *X++)
    ;
  return res;
}


x86 assembly (clang, -O0):
<gs_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gs_len@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <mm_alloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%al
mov    -0x20(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     117b <gs_dup+0x5b>
jmp    114c <gs_dup+0x2c>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gs_dup>:
push   %rbx
mov    %rdi,%rbx
call   1030 <gs_len@plt>
mov    %eax,%edi
call   1040 <mm_alloc@plt>
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rbx,%rcx,1),%edx
mov    %dl,(%rax,%rcx,1)
add    $0x1,%rcx
test   %dl,%dl
jne    1140 <gs_dup+0x20>
pop    %rbx
ret

LLVM IR (-O0):
define i8* @gs_dup(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @gs_len(i8* %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i8* @mm_alloc(i32 %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
store i8* %10, i8** %5
br label %11
11: ; preds = %18, %1
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
%14 = load i8, i8* %12
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
store i8 %14, i8* %15
%17 = icmp ne i8 %14, 0
br i1 %17, label %18, label %19
18: ; preds = %11
br label %11
19: ; preds = %11
%20 = load i8*, i8** %4
ret i8* %20
}

LLVM IR (-O2):
define i8* @gs_dup(i8* %0) {
%2 = tail call i32 @gs_len(i8* %0)
%3 = tail call i8* @mm_alloc(i32 %2)
br label %4
4: ; preds = %4, %1
%5 = phi i8* [ %0, %1 ], [ %7, %4 ]
%6 = phi i8* [ %3, %1 ], [ %9, %4 ]
%7 = getelementptr inbounds i8, i8* %5, i64 1
%8 = load i8, i8* %5
%9 = getelementptr inbounds i8, i8* %6, i64 1
store i8 %8, i8* %6
%10 = icmp eq i8 %8, 0
br i1 %10, label %11, label %4
11: ; preds = %4
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
int shmdt(void *);
int _det_sharedmem(void *adrs) {
  int s;
  if ((s = shmdt(adrs)) < 0) {
    perror("Existing with error code from shmdt() ...\n");
    exit(s);
  }
  return shmdt(adrs);
}


x86 assembly (clang, -O0):
<_det_sharedmem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <shmdt@plt>
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
jge    1165 <_det_sharedmem+0x35>
lea    0xea8(%rip),%rdi
call   1040 <perror@plt>
mov    -0xc(%rbp),%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%rdi
call   1030 <shmdt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_det_sharedmem>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <shmdt@plt>
test   %eax,%eax
js     114d <_det_sharedmem+0x1d>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <shmdt@plt>
mov    %eax,%ebp
lea    0xeaa(%rip),%rdi
call   1040 <perror@plt>
mov    %ebp,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"Existing with error code from shmdt() ...\0A\00"
define i32 @_det_sharedmem(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @shmdt(i8* %4)
store i32 %5, i32* %3
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = call i32 @perror(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%9 = load i32, i32* %3
%10 = call i32 @exit(i32 %9)
unreachable
11: ; preds = %1
%12 = load i8*, i8** %2
%13 = call i32 @shmdt(i8* %12)
ret i32 %13
}

LLVM IR (-O2):
@.str = [43 x i8] c"Existing with error code from shmdt() ...\0A\00"
define i32 @_det_sharedmem(i8* %0) {
%2 = tail call i32 @shmdt(i8* %0)
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 %2)
unreachable
7: ; preds = %1
%8 = tail call i32 @shmdt(i8* %0)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ my_putstr(char *);
int write(int, char *, int);
void my_putchar2(char c) {
  int a;
  a = write(2, &c, 1);
  if (a == -1) {
    my_putstr("Error on write\n");
    exit(-1);
  }
}


x86 assembly (clang, -O0):
<my_putchar2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x2,%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
jne    1174 <my_putchar2+0x44>
lea    0xe9b(%rip),%rdi
call   1040 <my_putstr@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_putchar2>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x2,%edi
mov    $0x1,%edx
call   1030 <write@plt>
cmp    $0xffffffff,%eax
je     1151 <my_putchar2+0x21>
pop    %rax
ret
lea    0xea8(%rip),%rdi
call   1040 <my_putstr@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"Error on write\0A\00"
define void @my_putchar2(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
%4 = call i32 @write(i32 2, i8* %2, i32 1)
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = call i32 @my_putstr(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%9 = call i32 @exit(i32 -1)
unreachable
10: ; preds = %1
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"Error on write\0A\00"
define void @my_putchar2(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @write(i32 2, i8* %2, i32 1)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = tail call i32 @my_putstr(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 -1)
unreachable
8: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CAN1_RX0_ISR();
int /*<<< orphan*/ USB_LP_ISR();
void USB_LP_CAN1_RX0_ISR(void) {
  USB_LP_ISR();
  CAN1_RX0_ISR();
}


x86 assembly (clang, -O0):
<USB_LP_CAN1_RX0_ISR>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <USB_LP_ISR@plt>
mov    $0x0,%al
call   1030 <CAN1_RX0_ISR@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<USB_LP_CAN1_RX0_ISR>:
push   %rax
xor    %eax,%eax
call   1040 <USB_LP_ISR@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <CAN1_RX0_ISR@plt>

LLVM IR (-O0):
define void @USB_LP_CAN1_RX0_ISR() {
%1 = call i32 (...) @USB_LP_ISR()
%2 = call i32 (...) @CAN1_RX0_ISR()
ret void
}

LLVM IR (-O2):
define void @USB_LP_CAN1_RX0_ISR() {
%1 = tail call i32 (...) @USB_LP_ISR()
%2 = tail call i32 (...) @CAN1_RX0_ISR()
ret void
}
int es_primo(int numero) {
  int i;
  for (i = 2; i < numero; i = i + 1) {
    if (numero % i == 0) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<es_primo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1149 <es_primo+0x49>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1136 <es_primo+0x36>
movl   $0x0,-0x4(%rbp)
jmp    1150 <es_primo+0x50>
jmp    113b <es_primo+0x3b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <es_primo+0xe>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<es_primo>:
mov    $0x1,%ecx
cmp    $0x3,%edi
jl     1120 <es_primo+0x20>
mov    $0x2,%esi
nop
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1123 <es_primo+0x23>
add    $0x1,%esi
cmp    %esi,%edi
jne    1110 <es_primo+0x10>
mov    %ecx,%eax
ret
xor    %ecx,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @es_primo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = srem i32 %10, %11
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 0, i32* %2
br label %20
15: ; preds = %9
br label %16
16: ; preds = %15
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
store i32 1, i32* %2
br label %20
20: ; preds = %19, %14
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @es_primo(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %5, label %10
3: ; preds = %5
%4 = icmp eq i32 %9, %0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ 2, %1 ]
%7 = srem i32 %0, %6
%8 = icmp eq i32 %7, 0
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %3
10: ; preds = %5, %3, %1
%11 = phi i32 [ 1, %1 ], [ 1, %3 ], [ 0, %5 ]
ret i32 %11
}
/* Type definitions */
struct cras_expr_value {
  int dummy;
};
struct cras_expr_env {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ copy_value(struct cras_expr_value *,
                              struct cras_expr_value *);
struct cras_expr_value *find_or_insert_value(struct cras_expr_env *,
                                             char const *);
void env_set_variable(struct cras_expr_env *env, const char *name,
                      struct cras_expr_value *new_value) {
  struct cras_expr_value *value = find_or_insert_value(env, name);
  copy_value(value, new_value);
}


x86 assembly (clang, -O0):
<env_set_variable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <find_or_insert_value@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <copy_value@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<env_set_variable>:
push   %rbx
mov    %rdx,%rbx
call   1040 <find_or_insert_value@plt>
mov    %rax,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <copy_value@plt>

LLVM IR (-O0):
%struct.cras_expr_env = type { i32 }
%struct.cras_expr_value = type { i32 }
define void @env_set_variable(%struct.cras_expr_env* %0, i8* %1, %struct.cras_expr_value* %2) {
%4 = alloca %struct.cras_expr_env*
%5 = alloca i8*
%6 = alloca %struct.cras_expr_value*
%7 = alloca %struct.cras_expr_value*
store %struct.cras_expr_env* %0, %struct.cras_expr_env** %4
store i8* %1, i8** %5
store %struct.cras_expr_value* %2, %struct.cras_expr_value** %6
%8 = load %struct.cras_expr_env*, %struct.cras_expr_env** %4
%9 = load i8*, i8** %5
%10 = call %struct.cras_expr_value* @find_or_insert_value(%struct.cras_expr_env* %8, i8* %9)
store %struct.cras_expr_value* %10, %struct.cras_expr_value** %7
%11 = load %struct.cras_expr_value*, %struct.cras_expr_value** %7
%12 = load %struct.cras_expr_value*, %struct.cras_expr_value** %6
%13 = call i32 @copy_value(%struct.cras_expr_value* %11, %struct.cras_expr_value* %12)
ret void
}

LLVM IR (-O2):
%struct.cras_expr_env = type { i32 }
%struct.cras_expr_value = type { i32 }
define void @env_set_variable(%struct.cras_expr_env* %0, i8* %1, %struct.cras_expr_value* %2) {
%4 = tail call %struct.cras_expr_value* @find_or_insert_value(%struct.cras_expr_env* %0, i8* %1)
%5 = tail call i32 @copy_value(%struct.cras_expr_value* %4, %struct.cras_expr_value* %2)
ret void
}
int f1(int a) { return a == 17 || a == 32; }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x11,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1120 <f1+0x20>
cmpl   $0x20,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
cmp    $0x11,%edi
sete   %al
cmp    $0x20,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @f1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 17
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 32
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @f1(i32 %0) {
%2 = icmp eq i32 %0, 17
%3 = icmp eq i32 %0, 32
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}