xunge/DecIR huggingface dataset:
int test_02(int a) {
  if (127 < a)
    a = 127;
  else if (a <= -128)
    a = -128;
  return a;
}


x86 assembly (clang, -O0):
<test_02>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x7f,%eax
cmp    -0x4(%rbp),%eax
jge    1121 <test_02+0x21>
movl   $0x7f,-0x4(%rbp)
jmp    1137 <test_02+0x37>
cmpl   $0xffffff80,-0x4(%rbp)
jg     1132 <test_02+0x32>
movl   $0xffffff80,-0x4(%rbp)
jmp    1137 <test_02+0x37>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_02>:
cmp    $0xffffff81,%edi
mov    $0xffffff80,%ecx
cmovge %edi,%ecx
cmp    $0x7f,%ecx
mov    $0x7f,%eax
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_02(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 127, %3
br i1 %4, label %5, label %6
5: ; preds = %1
store i32 127, i32* %2
br label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sle i32 %7, -128
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 -128, i32* %2
br label %10
10: ; preds = %9, %6
br label %11
11: ; preds = %10, %5
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @test_02(i32 %0) {
%2 = icmp sgt i32 %0, -128
%3 = select i1 %2, i32 %0, i32 -128
%4 = icmp slt i32 %3, 127
%5 = select i1 %4, i32 %3, i32 127
ret i32 %5
}
unsigned long zoo_hash(char *key) {
  char *cp = (char *)key;
  int i;
  unsigned long sum = 0;
  for (i = 0; cp[i]; i++)
    sum = sum * 29 + cp[i];
  return sum;
}


x86 assembly (clang, -O0):
<zoo_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movq   $0x0,-0x20(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1158 <zoo_hash+0x58>
imul   $0x1d,-0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq -0x14(%rbp),%rdx
movsbq (%rcx,%rdx,1),%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111f <zoo_hash+0x1f>
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zoo_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1131 <zoo_hash+0x31>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
lea    (%rax,%rax,8),%rdx
lea    (%rdx,%rdx,2),%rdx
add    %rax,%rdx
add    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <zoo_hash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @zoo_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
store i8* %0, i8** %2
%6 = load i8*, i8** %2
store i8* %6, i8** %3
store i64 0, i64* %5
store i32 0, i32* %4
br label %7
7: ; preds = %24, %1
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = icmp ne i8 %12, 0
br i1 %13, label %14, label %27
14: ; preds = %7
%15 = load i64, i64* %5
%16 = mul i64 %15, 29
%17 = load i8*, i8** %3
%18 = load i32, i32* %4
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
%21 = load i8, i8* %20
%22 = sext i8 %21 to i64
%23 = add i64 %16, %22
store i64 %23, i64* %5
br label %24
24: ; preds = %14
%25 = load i32, i32* %4
%26 = add nsw i32 %25, 1
store i32 %26, i32* %4
br label %7
27: ; preds = %7
%28 = load i64, i64* %5
ret i64 %28
}

LLVM IR (-O2):
define i64 @zoo_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %11, %4 ], [ 0, %1 ]
%6 = phi i8 [ %13, %4 ], [ %2, %1 ]
%7 = phi i64 [ %10, %4 ], [ 0, %1 ]
%8 = mul i64 %7, 29
%9 = sext i8 %6 to i64
%10 = add i64 %8, %9
%11 = add nuw nsw i64 %5, 1
%12 = getelementptr inbounds i8, i8* %0, i64 %11
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i64 [ 0, %1 ], [ %10, %4 ]
ret i64 %16
}
void hostap_event_expired_sta(struct net_device *dev, struct sta_info *sta) {}


x86 assembly (clang, -O0):
<hostap_event_expired_sta>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hostap_event_expired_sta>:
ret

LLVM IR (-O0):
%struct.net_device = type opaque
%struct.sta_info = type opaque
define void @hostap_event_expired_sta(%struct.net_device* %0, %struct.sta_info* %1) {
%3 = alloca %struct.net_device*
%4 = alloca %struct.sta_info*
store %struct.net_device* %0, %struct.net_device** %3
store %struct.sta_info* %1, %struct.sta_info** %4
ret void
}

LLVM IR (-O2):
%struct.net_device = type opaque
%struct.sta_info = type opaque
define void @hostap_event_expired_sta(%struct.net_device* nocapture %0, %struct.sta_info* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main(int argc, char **argv) {
#pragma acc parallel
  {
    if (argc != 1)
      abort();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     1137 <main+0x27>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
cmp    $0x1,%edi
jne    1118 <main+0x8>
xor    %eax,%eax
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ep93xx_devcfg_set_clear(int, unsigned int);
void ep93xx_devcfg_clear_bits(unsigned int bits) {
  ep93xx_devcfg_set_clear(0x00, bits);
}


x86 assembly (clang, -O0):
<ep93xx_devcfg_clear_bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
xor    %edi,%edi
call   1030 <ep93xx_devcfg_set_clear@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ep93xx_devcfg_clear_bits>:
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <ep93xx_devcfg_set_clear@plt>

LLVM IR (-O0):
define void @ep93xx_devcfg_clear_bits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ep93xx_devcfg_set_clear(i32 0, i32 %3)
ret void
}

LLVM IR (-O2):
define void @ep93xx_devcfg_clear_bits(i32 %0) {
%2 = tail call i32 @ep93xx_devcfg_set_clear(i32 0, i32 %0)
ret void
}
/* Variables and functions */
scalar_t__ strtoll(char const *, char **, int);
unsigned long strtoul(const char *str, char **endptr, int base) {
  return (unsigned long)strtoll(str, endptr, base);
}


x86 assembly (clang, -O0):
<strtoul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strtoll@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtoul>:
jmp    1030 <strtoll@plt>

LLVM IR (-O0):
define i64 @strtoul(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %5
%9 = load i32, i32* %6
%10 = call i64 @strtoll(i8* %7, i8** %8, i32 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @strtoul(i8* %0, i8** nocapture %1, i32 %2) {
%4 = tail call i64 @strtoll(i8* %0, i8** %1, i32 %2)
ret i64 %4
}
int test_imm_A1int32_reg(int val) { return ((val) & (0xA1 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_A1int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xa1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A1int32_reg>:
test   $0xa1,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A1int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 161
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_A1int32_reg(i32 %0) {
%2 = and i32 %0, 161
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int pascal(int z, int s) {
  if (z == 1 || s == 1)
    return 1;
  else
    return (pascal(z, s - 1) + pascal(z - 1, s));
}


x86 assembly (clang, -O0):
<pascal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     1132 <pascal+0x22>
cmpl   $0x1,-0xc(%rbp)
jne    113e <pascal+0x2e>
movl   $0x1,-0x4(%rbp)
jmp    1167 <pascal+0x57>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
call   1030 <pascal@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0xc(%rbp),%esi
call   1030 <pascal@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pascal>:
push   %rbp
push   %r14
push   %rbx
mov    $0x1,%ebx
cmp    $0x1,%esi
je     1147 <pascal+0x37>
mov    %edi,%ebp
cmp    $0x1,%edi
je     1147 <pascal+0x37>
mov    %esi,%r14d
add    $0xffffffff,%r14d
xor    %ebx,%ebx
xchg   %ax,%ax
mov    %ebp,%edi
mov    %r14d,%esi
call   1030 <pascal@plt>
add    $0xffffffff,%ebp
add    %eax,%ebx
cmp    $0x1,%ebp
jne    1130 <pascal+0x20>
add    $0x1,%ebx
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @pascal(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 1
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %8, %2
store i32 1, i32* %3
br label %22
12: ; preds = %8
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = sub nsw i32 %14, 1
%16 = call i32 @pascal(i32 %13, i32 %15)
%17 = load i32, i32* %4
%18 = sub nsw i32 %17, 1
%19 = load i32, i32* %5
%20 = call i32 @pascal(i32 %18, i32 %19)
%21 = add nsw i32 %16, %20
store i32 %21, i32* %3
br label %22
22: ; preds = %12, %11
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @pascal(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 1
%4 = icmp eq i32 %0, 1
%5 = or i1 %3, %4
br i1 %5, label %17, label %6
6: ; preds = %2
%7 = add nsw i32 %1, -1
br label %8
8: ; preds = %6, %8
%9 = phi i32 [ %0, %6 ], [ %12, %8 ]
%10 = phi i32 [ 0, %6 ], [ %13, %8 ]
%11 = tail call i32 @pascal(i32 %9, i32 %7)
%12 = add nsw i32 %9, -1
%13 = add nsw i32 %11, %10
%14 = icmp eq i32 %12, 1
br i1 %14, label %15, label %8
15: ; preds = %8
%16 = add i32 %13, 1
br label %17
17: ; preds = %15, %2
%18 = phi i32 [ 1, %2 ], [ %16, %15 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ foo(int);
int main(void) {
  foo(4);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 4)
ret i32 0
}
/* Type definitions */
typedef void pthread_t;

/* Variables and functions */
int /*<<< orphan*/ free(void *);
scalar_t__ malloc(int);
scalar_t__ pthread_create(void *, int /*<<< orphan*/ *, void *, void *);
void *portable_thread_create(void *funcp, void *argp) {
  pthread_t *ptr;
  ptr = (pthread_t *)malloc(sizeof(*ptr));
  if (pthread_create(ptr, NULL, funcp, argp) != 0) {
    free(ptr);
    return (0);
  } else
    return (ptr);
}


x86 assembly (clang, -O0):
<portable_thread_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%esi
call   1050 <pthread_create@plt>
cmp    $0x0,%rax
je     1183 <portable_thread_create+0x53>
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
movq   $0x0,-0x8(%rbp)
jmp    118b <portable_thread_create+0x5b>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<portable_thread_create>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %r15,%rdx
mov    %r14,%rcx
call   1050 <pthread_create@plt>
test   %rax,%rax
je     1167 <portable_thread_create+0x37>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @portable_thread_create(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = call i64 @malloc(i32 1)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %6
%9 = load i8*, i8** %6
%10 = load i8*, i8** %4
%11 = load i8*, i8** %5
%12 = call i64 @pthread_create(i8* %9, i32* null, i8* %10, i8* %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %2
%15 = load i8*, i8** %6
%16 = call i32 @free(i8* %15)
store i8* null, i8** %3
br label %19
17: ; preds = %2
%18 = load i8*, i8** %6
store i8* %18, i8** %3
br label %19
19: ; preds = %17, %14
%20 = load i8*, i8** %3
ret i8* %20
}

LLVM IR (-O2):
define i8* @portable_thread_create(i8* %0, i8* %1) {
%3 = tail call i64 @malloc(i32 1)
%4 = inttoptr i64 %3 to i8*
%5 = tail call i64 @pthread_create(i8* %4, i32* null, i8* %0, i8* %1)
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @free(i8* %4)
br label %9
9: ; preds = %2, %7
%10 = phi i8* [ null, %7 ], [ %4, %2 ]
ret i8* %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ update_crc16_ccitt(int, int /*<<< orphan*/ const *, size_t);
uint16_t crc16_ccitt(const uint8_t *data, size_t len) {
  return update_crc16_ccitt(0x0000, data, len);
}


x86 assembly (clang, -O0):
<crc16_ccitt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
xor    %edi,%edi
call   1030 <update_crc16_ccitt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc16_ccitt>:
mov    %rsi,%rdx
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <update_crc16_ccitt@plt>

LLVM IR (-O0):
define i32 @crc16_ccitt(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%5 = load i32*, i32** %3
%6 = load i64, i64* %4
%7 = call i32 @update_crc16_ccitt(i32 0, i32* %5, i64 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @crc16_ccitt(i32* %0, i64 %1) {
%3 = tail call i32 @update_crc16_ccitt(i32 0, i32* %0, i64 %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ cpu_swap32p(int /*<<< orphan*/ *, int /*<<< orphan*/);
void be32_to_cpup(uint32_t *outp, uint32_t in) { cpu_swap32p(outp, in); }


x86 assembly (clang, -O0):
<be32_to_cpup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <cpu_swap32p@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<be32_to_cpup>:
jmp    1030 <cpu_swap32p@plt>

LLVM IR (-O0):
define void @be32_to_cpup(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @cpu_swap32p(i32* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @be32_to_cpup(i32* %0, i32 %1) {
%3 = tail call i32 @cpu_swap32p(i32* %0, i32 %1)
ret void
}
void spellcheck_free_suggest(void *chk, char **sug, int size) {}


x86 assembly (clang, -O0):
<spellcheck_free_suggest>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<spellcheck_free_suggest>:
ret

LLVM IR (-O0):
define void @spellcheck_free_suggest(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @spellcheck_free_suggest(i8* nocapture %0, i8** nocapture %1, i32 %2) {
ret void
}
/* Variables and functions */
scalar_t__ eq(double, double);
scalar_t__ floor(double);
double rint(double);
int tolerant_floor(double val) {
  double nearest = rint(val);
  if (eq(val, nearest))
    return ((int)nearest);
  else
    return ((int)floor(val));
}


x86 assembly (clang, -O0):
<tolerant_floor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <rint@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
call   1050 <eq@plt>
cmp    $0x0,%rax
je     1172 <tolerant_floor+0x42>
cvttsd2si -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117f <tolerant_floor+0x4f>
movsd  -0x10(%rbp),%xmm0
call   1040 <floor@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolerant_floor>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1030 <rint@plt>
movaps %xmm0,%xmm1
movsd  0x8(%rsp),%xmm0
movsd  %xmm1,0x10(%rsp)
call   1050 <eq@plt>
test   %rax,%rax
je     1163 <tolerant_floor+0x33>
cvttsd2si 0x10(%rsp),%eax
add    $0x18,%rsp
ret
movsd  0x8(%rsp),%xmm0
call   1040 <floor@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @tolerant_floor(double %0) {
%2 = alloca i32
%3 = alloca double
%4 = alloca double
store double %0, double* %3
%5 = load double, double* %3
%6 = call double @llvm.rint.f64(double %5)
store double %6, double* %4
%7 = load double, double* %3
%8 = load double, double* %4
%9 = call i64 @eq(double %7, double %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = load double, double* %4
%13 = fptosi double %12 to i32
store i32 %13, i32* %2
br label %18
14: ; preds = %1
%15 = load double, double* %3
%16 = call i64 @floor(double %15)
%17 = trunc i64 %16 to i32
store i32 %17, i32* %2
br label %18
18: ; preds = %14, %11
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @tolerant_floor(double %0) {
%2 = tail call double @llvm.rint.f64(double %0)
%3 = tail call i64 @eq(double %0, double %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = fptosi double %2 to i32
br label %10
7: ; preds = %1
%8 = tail call i64 @floor(double %0)
%9 = trunc i64 %8 to i32
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__41__IO__selectModuleFunc();
void Msp430Adc12ImplP__Port61__selectModuleFunc(void) {
  HplMsp430GeneralIOP__41__IO__selectModuleFunc();
}


x86 assembly (clang, -O0):
<Msp430Adc12ImplP__Port61__selectModuleFunc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__41__IO__selectModuleFunc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430Adc12ImplP__Port61__selectModuleFunc>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__41__IO__selectModuleFunc@plt>

LLVM IR (-O0):
define void @Msp430Adc12ImplP__Port61__selectModuleFunc() {
%1 = call i32 (...) @HplMsp430GeneralIOP__41__IO__selectModuleFunc()
ret void
}

LLVM IR (-O2):
define void @Msp430Adc12ImplP__Port61__selectModuleFunc() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__41__IO__selectModuleFunc()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m256i;
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm256_castsi256_si128(int /*<<< orphan*/ const);
int /*<<< orphan*/ _mm256_extractf128_si256(int /*<<< orphan*/ const, int);
int /*<<< orphan*/ _mm_store_si128(int /*<<< orphan*/ *const,
                                   int /*<<< orphan*/);
void mm256_store2_si128(__m128i *const dst_ptr_1, __m128i *const dst_ptr_2,
                        const __m256i *const src) {
  _mm_store_si128(dst_ptr_1, _mm256_castsi256_si128(*src));
  _mm_store_si128(dst_ptr_2, _mm256_extractf128_si256(*src, 1));
}


x86 assembly (clang, -O0):
<mm256_store2_si128>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%edi
call   1050 <_mm256_castsi256_si128@plt>
mov    -0x28(%rbp),%rdi
mov    %eax,%esi
call   1040 <_mm_store_si128@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%edi
mov    $0x1,%esi
call   1030 <_mm256_extractf128_si256@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%esi
call   1040 <_mm_store_si128@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm256_store2_si128>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%r14
mov    %rdi,%r15
mov    (%rdx),%edi
call   1050 <_mm256_castsi256_si128@plt>
mov    %r15,%rdi
mov    %eax,%esi
call   1040 <_mm_store_si128@plt>
mov    (%rbx),%edi
mov    $0x1,%esi
call   1030 <_mm256_extractf128_si256@plt>
mov    %r14,%rdi
mov    %eax,%esi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <_mm_store_si128@plt>

LLVM IR (-O0):
define void @mm256_store2_si128(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %6
%9 = load i32, i32* %8
%10 = call i32 @_mm256_castsi256_si128(i32 %9)
%11 = call i32 @_mm_store_si128(i32* %7, i32 %10)
%12 = load i32*, i32** %5
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = call i32 @_mm256_extractf128_si256(i32 %14, i32 1)
%16 = call i32 @_mm_store_si128(i32* %12, i32 %15)
ret void
}

LLVM IR (-O2):
define void @mm256_store2_si128(i32* %0, i32* %1, i32* nocapture %2) {
%4 = load i32, i32* %2
%5 = tail call i32 @_mm256_castsi256_si128(i32 %4)
%6 = tail call i32 @_mm_store_si128(i32* %0, i32 %5)
%7 = load i32, i32* %2
%8 = tail call i32 @_mm256_extractf128_si256(i32 %7, i32 1)
%9 = tail call i32 @_mm_store_si128(i32* %1, i32 %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cone_inter();
convexcone() { cone_inter(); }


x86 assembly (clang, -O0):
<convexcone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <cone_inter@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<convexcone>:
xor    %eax,%eax
jmp    1030 <cone_inter@plt>

LLVM IR (-O0):
define i32 @convexcone() {
%1 = alloca i32
%2 = call i32 (...) @cone_inter()
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @convexcone() {
%1 = tail call i32 (...) @cone_inter()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ free(unsigned char *);
void stbtt_FreeBitmap(unsigned char *bitmap, void *userdata) { free(bitmap); }


x86 assembly (clang, -O0):
<stbtt_FreeBitmap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stbtt_FreeBitmap>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @stbtt_FreeBitmap(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @stbtt_FreeBitmap(i8* nocapture %0, i8* nocapture readnone %1) {
%3 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ err(int, char *);
scalar_t__ fsync(int);
void sync_file(int fd) {
  if (fsync(fd) < 0)
    err(3, "fsync failed, please retry with option -C");
}


x86 assembly (clang, -O0):
<sync_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <fsync@plt>
cmp    $0x0,%rax
jge    114e <sync_file+0x2e>
mov    $0x3,%edi
lea    0xeb7(%rip),%rsi
call   1030 <err@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync_file>:
push   %rax
call   1040 <fsync@plt>
test   %rax,%rax
js     112d <sync_file+0xd>
pop    %rax
ret
lea    0xecc(%rip),%rsi
mov    $0x3,%edi
pop    %rax
jmp    1030 <err@plt>

LLVM IR (-O0):
@.str = [42 x i8] c"fsync failed, please retry with option -C\00"
define void @sync_file(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @fsync(i32 %3)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @err(i32 3, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@.str = [42 x i8] c"fsync failed, please retry with option -C\00"
define void @sync_file(i32 %0) {
%2 = tail call i64 @fsync(i32 %0)
%3 = icmp slt i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @err(i32 3, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret void
}
void picolcd_exit_leds(struct picolcd_data *data) {}


x86 assembly (clang, -O0):
<picolcd_exit_leds>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<picolcd_exit_leds>:
ret

LLVM IR (-O0):
%struct.picolcd_data = type opaque
define void @picolcd_exit_leds(%struct.picolcd_data* %0) {
%2 = alloca %struct.picolcd_data*
store %struct.picolcd_data* %0, %struct.picolcd_data** %2
ret void
}

LLVM IR (-O2):
%struct.picolcd_data = type opaque
define void @picolcd_exit_leds(%struct.picolcd_data* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
unsigned int sat_add(unsigned int);
main() {
  if (sat_add(~0U) != ~0U)
    abort();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xffffffff,%edi
call   1050 <sat_add@plt>
cmp    $0xffffffff,%eax
je     1159 <main+0x29>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xffffffff,%edi
call   1050 <sat_add@plt>
cmp    $0xffffffff,%eax
jne    1147 <main+0x17>
xor    %edi,%edi
call   1040 <exit@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @sat_add(i32 -1)
%3 = icmp ne i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
%7 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @sat_add(i32 -1)
%2 = icmp eq i32 %1, -1
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = tail call i32 @exit(i32 0)
unreachable
}
int cairo_code_draw_hal_get_height() { return 82; }


x86 assembly (clang, -O0):
<cairo_code_draw_hal_get_height>:
push   %rbp
mov    %rsp,%rbp
mov    $0x52,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_hal_get_height>:
mov    $0x52,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_hal_get_height() {
ret i32 82
}

LLVM IR (-O2):
define i32 @cairo_code_draw_hal_get_height() {
ret i32 82
}
int next_serial() {
  static int result = 0;
  result += 1;
  return result;
}


x86 assembly (clang, -O0):
<next_serial>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f11(%rip)
mov    0x2f0b(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_serial>:
mov    0x2f1e(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f15(%rip)
ret

LLVM IR (-O0):
@next_serial.result = internal global i32 0
define i32 @next_serial() {
%1 = load i32, i32* @next_serial.result
%2 = add nsw i32 %1, 1
store i32 %2, i32* @next_serial.result
%3 = load i32, i32* @next_serial.result
ret i32 %3
}

LLVM IR (-O2):
@next_serial.result = internal unnamed_addr global i32 0
define i32 @next_serial() {
%1 = load i32, i32* @next_serial.result
%2 = add nsw i32 %1, 1
store i32 %2, i32* @next_serial.result
ret i32 %2
}
int f1(int x, int y) { return (x & ~0x0ffff00) | ((y << 8) & 0x0ffff00); }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff0000ff,%eax
mov    -0x8(%rbp),%ecx
shl    $0x8,%ecx
and    $0xffff00,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
and    $0xff0000ff,%edi
movzwl %si,%eax
shl    $0x8,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @f1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, -16776961
%7 = load i32, i32* %4
%8 = shl i32 %7, 8
%9 = and i32 %8, 16776960
%10 = or i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @f1(i32 %0, i32 %1) {
%3 = and i32 %0, -16776961
%4 = shl i32 %1, 8
%5 = and i32 %4, 16776960
%6 = or i32 %5, %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ state_change_fire(int, int /*<<< orphan*/ *,
                                     int /*<<< orphan*/);
void state_change_fire0(int event_type) {
  state_change_fire(event_type, NULL, 0);
}


x86 assembly (clang, -O0):
<state_change_fire0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %eax,%eax
mov    %eax,%esi
xor    %edx,%edx
call   1030 <state_change_fire@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<state_change_fire0>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <state_change_fire@plt>

LLVM IR (-O0):
define void @state_change_fire0(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @state_change_fire(i32 %3, i32* null, i32 0)
ret void
}

LLVM IR (-O2):
define void @state_change_fire0(i32 %0) {
%2 = tail call i32 @state_change_fire(i32 %0, i32* null, i32 0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void dbg_gen_halt(FILE *fp) {
  fprintf(fp, "_ZPL_halt();\n");
  fflush(fp);
}


x86 assembly (clang, -O0):
<dbg_gen_halt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_gen_halt>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
mov    $0xd,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1040 <fwrite@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <fflush@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"_ZPL_halt();\0A\00"
define void @dbg_gen_halt(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%5 = load i32*, i32** %2
%6 = call i32 @fflush(i32* %5)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"_ZPL_halt();\0A\00"
define void @dbg_gen_halt(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i64 13, i64 1, i32* %0)
%3 = tail call i32 @fflush(i32* %0)
ret void
}
indreg0indreg1_set(r0, r1, x0, x1, p0, p1) float r0, r1;
float *p0, *p1;
{ (*p0) = (*p1); }


x86 assembly (clang, -O0):
<indreg0indreg1_set>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm1,-0x30(%rbp)
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
cvtsd2ss %xmm1,%xmm1
cvtsd2ss %xmm0,%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    %edi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x28(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x20(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indreg0indreg1_set>:
movss  (%rcx),%xmm0
movss  %xmm0,(%rdx)
ret

LLVM IR (-O0):
define i32 @indreg0indreg1_set(double %0, double %1, i32 %2, i32 %3, float* %4, float* %5) {
%7 = alloca i32
%8 = alloca float
%9 = alloca float
%10 = alloca i32
%11 = alloca i32
%12 = alloca float*
%13 = alloca float*
%14 = fptrunc double %0 to float
%15 = fptrunc double %1 to float
store float %14, float* %8
store float %15, float* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store float* %4, float** %12
store float* %5, float** %13
%16 = load float*, float** %13
%17 = load float, float* %16
%18 = load float*, float** %12
store float %17, float* %18
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @indreg0indreg1_set(double %0, double %1, i32 %2, i32 %3, float* nocapture writeonly %4, float* nocapture %5) {
%7 = load float, float* %5
store float %7, float* %4
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void print_models(char mat[][32], int riemp) {
  int i;
  for (i = 0; i < riemp; i++)
    printf("%s\n", mat[i]);
}


x86 assembly (clang, -O0):
<print_models>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115b <print_models+0x4b>
mov    -0x8(%rbp),%rsi
movslq -0x10(%rbp),%rax
shl    $0x5,%rax
add    %rax,%rsi
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print_models+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_models>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1145 <print_models+0x35>
mov    %rdi,%rbx
mov    %esi,%r15d
lea    0xeda(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
add    $0x20,%rbx
add    $0xffffffffffffffff,%r15
jne    1130 <print_models+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @print_models([32 x i8]* %0, i32 %1) {
%3 = alloca [32 x i8]*
%4 = alloca i32
%5 = alloca i32
store [32 x i8]* %0, [32 x i8]** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load [32 x i8]*, [32 x i8]** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [32 x i8], [32 x i8]* %11, i64 %13
%15 = getelementptr inbounds [32 x i8], [32 x i8]* %14, i64 0, i64 0
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @print_models([32 x i8]* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %10, %6 ]
%8 = getelementptr inbounds [32 x i8], [32 x i8]* %0, i64 %7, i64 0
%9 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = add nuw nsw i64 %7, 1
%11 = icmp eq i64 %10, %5
br i1 %11, label %12, label %6
12: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *, char *);
int main(void) {
  bool big_endian;
  union {
    uint32_t i;
    char c[4];
  } test = {0x01020304};
  big_endian = test.c[0] == 1;
  if (big_endian)
    printf("%s\n", "Big Endian");
  else
    printf("%s\n", "Small Endian");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xedb(%rip),%eax
mov    %eax,-0x10(%rbp)
movsbl -0x10(%rbp),%eax
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     115c <main+0x4c>
lea    0xeb9(%rip),%rdi
lea    0xeb6(%rip),%rsi
call   1030 <printf@plt>
jmp    116f <main+0x5f>
lea    0xea1(%rip),%rdi
lea    0xea9(%rip),%rsi
call   1030 <printf@plt>
mov    0x2e6a(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xee5(%rip),%rsi
call   1030 <printf@plt>
mov    0x2eb5(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
%union.anon = type { i32 }
@__const.main.test = %union.anon { i32 16909060 }
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [11 x i8] c"Big Endian\00"
@.str.2 = [13 x i8] c"Small Endian\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca %union.anon
store i32 0, i32* %1
%4 = bitcast %union.anon* %3 to i8*
%5 = bitcast %union.anon* %3 to [4 x i8]*
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %5, i64 0, i64 0
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 1
%10 = zext i1 %9 to i32
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %0
%14 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
br label %17
15: ; preds = %0
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0))
br label %17
17: ; preds = %15, %13
%18 = load i32, i32* @EXIT_SUCCESS
ret i32 %18
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
@.str.2 = [13 x i8] c"Small Endian\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a, b;
  a = 10;
  b = 5;
  (a < b) ? printf("%d", a) : printf("%d", b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
movl   $0x5,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    114d <main+0x3d>
mov    -0x8(%rbp),%esi
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
jmp    115c <main+0x4c>
mov    -0xc(%rbp),%esi
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x5,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
store i32 5, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = icmp slt i32 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %8)
br label %13
10: ; preds = %0
%11 = load i32, i32* %3
%12 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %11)
br label %13
13: ; preds = %10, %7
%14 = phi i32 [ %9, %7 ], [ %12, %10 ]
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ nat_t_setup_hashes();
void nat_t_init(void) { nat_t_setup_hashes(); }


x86 assembly (clang, -O0):
<nat_t_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <nat_t_setup_hashes@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nat_t_init>:
xor    %eax,%eax
jmp    1030 <nat_t_setup_hashes@plt>

LLVM IR (-O0):
define void @nat_t_init() {
%1 = call i32 (...) @nat_t_setup_hashes()
ret void
}

LLVM IR (-O2):
define void @nat_t_init() {
%1 = tail call i32 (...) @nat_t_setup_hashes()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int BUFSIZ;
int fread(char *, int, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ luaL_addsize(int);
char *luaL_openspace(int);
void read_file(FILE *f) {
  int n;
  do {
    char *b = luaL_openspace(BUFSIZ);
    n = fread(b, sizeof(char), BUFSIZ, f);
    luaL_addsize(n);
  } while (n == BUFSIZ);
}


x86 assembly (clang, -O0):
<read_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1030 <luaL_openspace@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    0x2e87(%rip),%rax
mov    (%rax),%edx
mov    -0x8(%rbp),%rcx
mov    $0x1,%esi
call   1040 <fread@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1050 <luaL_addsize@plt>
mov    -0xc(%rbp),%eax
mov    0x2e62(%rip),%rcx
cmp    (%rcx),%eax
je     113c <read_file+0xc>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_file>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
mov    0x2ea2(%rip),%rbx
mov    (%rbx),%ebp
mov    %ebp,%edi
call   1030 <luaL_openspace@plt>
mov    (%rbx),%edx
mov    %rax,%rdi
mov    $0x1,%esi
mov    %r14,%rcx
call   1040 <fread@plt>
mov    %eax,%ebp
mov    %eax,%edi
call   1050 <luaL_addsize@plt>
cmp    (%rbx),%ebp
je     1140 <read_file+0x10>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@BUFSIZ = global i32 0
define void @read_file(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i8*
store i32* %0, i32** %2
br label %5
5: ; preds = %14, %1
%6 = load i32, i32* @BUFSIZ
%7 = call i8* @luaL_openspace(i32 %6)
store i8* %7, i8** %4
%8 = load i8*, i8** %4
%9 = load i32, i32* @BUFSIZ
%10 = load i32*, i32** %2
%11 = call i32 @fread(i8* %8, i32 1, i32 %9, i32* %10)
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = call i32 @luaL_addsize(i32 %12)
br label %14
14: ; preds = %5
%15 = load i32, i32* %3
%16 = load i32, i32* @BUFSIZ
%17 = icmp eq i32 %15, %16
br i1 %17, label %5, label %18
18: ; preds = %14
ret void
}

LLVM IR (-O2):
@BUFSIZ = global i32 0
define void @read_file(i32* nocapture %0) {
%2 = load i32, i32* @BUFSIZ
br label %3
3: ; preds = %3, %1
%4 = phi i32 [ %7, %3 ], [ %2, %1 ]
%5 = tail call i8* @luaL_openspace(i32 %4)
%6 = load i32, i32* @BUFSIZ
%7 = tail call i32 @fread(i8* %5, i32 1, i32 %6, i32* %0)
%8 = tail call i32 @luaL_addsize(i32 %7)
%9 = load i32, i32* @BUFSIZ
%10 = icmp eq i32 %7, %9
br i1 %10, label %3, label %11
11: ; preds = %3
ret void
}
unsigned char GetRruleCount(unsigned char a, unsigned char b) {
  return ((a << 8) | b);
}


x86 assembly (clang, -O0):
<GetRruleCount>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetRruleCount>:
mov    %esi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @GetRruleCount(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 8
%8 = load i8, i8* %4
%9 = zext i8 %8 to i32
%10 = or i32 %7, %9
%11 = trunc i32 %10 to i8
ret i8 %11
}

LLVM IR (-O2):
define zeroext i8 @GetRruleCount(i8 zeroext %0, i8 returned zeroext %1) {
ret i8 %1
}
/* Variables and functions */
int fputc(int, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int plinth_stderr_putc(int c) { return fputc(c, stderr); }


x86 assembly (clang, -O0):
<plinth_stderr_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plinth_stderr_putc>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <fputc@plt>

LLVM IR (-O0):
@stderr = global i32 0
define i32 @plinth_stderr_putc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @stderr
%5 = call i32 @fputc(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@stderr = global i32 0
define i32 @plinth_stderr_putc(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputc(i32 %0, i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ list(char *);
int main(int argc, char *argv[]) {
  if (argc < 2)
    list(".");
  else
    while (--argc > 0)
      list(*(++argv));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1141 <main+0x31>
lea    0xec9(%rip),%rdi
call   1030 <list@plt>
jmp    117a <main+0x6a>
jmp    1146 <main+0x36>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jle    1175 <main+0x65>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x10(%rbp)
mov    0x8(%rax),%rdi
call   1030 <list@plt>
jmp    1146 <main+0x36>
jmp    117a <main+0x6a>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
cmp    $0x2,%edi
jge    1126 <main+0x16>
lea    0xee1(%rip),%rdi
call   1030 <list@plt>
jmp    1154 <main+0x44>
mov    %rsi,%rbx
mov    %edi,%ebp
add    $0x8,%rbx
add    $0x1,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    (%rbx),%rdi
call   1030 <list@plt>
add    $0x8,%rbx
add    $0xffffffff,%ebp
cmp    $0x2,%ebp
ja     1140 <main+0x30>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [2 x i8] c".\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @list(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %21
10: ; preds = %2
br label %11
11: ; preds = %15, %10
%12 = load i32, i32* %4
%13 = add nsw i32 %12, -1
store i32 %13, i32* %4
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %20
15: ; preds = %11
%16 = load i8**, i8*** %5
%17 = getelementptr inbounds i8*, i8** %16, i32 1
store i8** %17, i8*** %5
%18 = load i8*, i8** %17
%19 = call i32 @list(i8* %18)
br label %11
20: ; preds = %11
br label %21
21: ; preds = %20, %8
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c".\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @list(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %14
6: ; preds = %2, %6
%7 = phi i8** [ %10, %6 ], [ %1, %2 ]
%8 = phi i32 [ %9, %6 ], [ %0, %2 ]
%9 = add nsw i32 %8, -1
%10 = getelementptr inbounds i8*, i8** %7, i64 1
%11 = load i8*, i8** %10
%12 = tail call i32 @list(i8* %11)
%13 = icmp ugt i32 %8, 2
br i1 %13, label %6, label %14
14: ; preds = %6, %4
ret i32 0
}
TEST(TrivialTest, StringCaseInsensitiveEquality) {
  ASSERT_STRCASEEQ("Hello, World", "hello, world");
}


x86 assembly (clang, -O0):
<TEST>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    0xedb(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x0,%al
call   1030 <ASSERT_STRCASEEQ@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TEST>:
lea    0xee9(%rip),%rdi
lea    0xeef(%rip),%rsi
xor    %eax,%eax
jmp    1030 <ASSERT_STRCASEEQ@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Hello, World\00"
@.str.1 = [13 x i8] c"hello, world\00"
define i32 @TEST(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @ASSERT_STRCASEEQ to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello, World\00"
@.str.1 = [13 x i8] c"hello, world\00"
define i32 @TEST(i32 %0, i32 %1) {
%3 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @ASSERT_STRCASEEQ to i32 (i8*, i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
ret i32 undef
}