xunge/DecIR huggingface dataset:
int cairo_code_draw_casWLabel_get_height() { return 10; }


x86 assembly (clang, -O0):
<cairo_code_draw_casWLabel_get_height>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_casWLabel_get_height>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_casWLabel_get_height() {
ret i32 10
}

LLVM IR (-O2):
define i32 @cairo_code_draw_casWLabel_get_height() {
ret i32 10
}
/* Variables and functions */
int /*<<< orphan*/ arr_ctor();
void semantic_init() { arr_ctor(); }


x86 assembly (clang, -O0):
<semantic_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <arr_ctor@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<semantic_init>:
xor    %eax,%eax
jmp    1030 <arr_ctor@plt>

LLVM IR (-O0):
define void @semantic_init() {
%1 = call i32 (...) @arr_ctor()
ret void
}

LLVM IR (-O2):
define void @semantic_init() {
%1 = tail call i32 (...) @arr_ctor()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, const char *argv[]) { printf("Hello World\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello World\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
char *xtoa(unsigned long, char *, int, int);
char *itoa(int val, char *buf, int radix) {
  if (radix == 10 && val < 0)
    return xtoa((unsigned long)val, buf, radix, 1);
  else
    return xtoa((unsigned long)(unsigned int)val, buf, radix, 0);
}


x86 assembly (clang, -O0):
<itoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpl   $0xa,-0x1c(%rbp)
jne    1154 <itoa+0x44>
cmpl   $0x0,-0xc(%rbp)
jge    1154 <itoa+0x44>
movslq -0xc(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
mov    $0x1,%ecx
call   1030 <xtoa@plt>
mov    %rax,-0x8(%rbp)
jmp    116b <itoa+0x5b>
mov    -0xc(%rbp),%eax
mov    %eax,%edi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
xor    %ecx,%ecx
call   1030 <xtoa@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<itoa>:
test   %edi,%edi
jns    112b <itoa+0x1b>
cmp    $0xa,%edx
jne    112b <itoa+0x1b>
movslq %edi,%rdi
mov    $0xa,%edx
mov    $0x1,%ecx
jmp    1030 <xtoa@plt>
mov    %edi,%edi
xor    %ecx,%ecx
jmp    1030 <xtoa@plt>

LLVM IR (-O0):
define i8* @itoa(i32 %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp eq i32 %8, 10
br i1 %9, label %10, label %19
10: ; preds = %3
%11 = load i32, i32* %5
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %19
13: ; preds = %10
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = load i8*, i8** %6
%17 = load i32, i32* %7
%18 = call i8* @xtoa(i64 %15, i8* %16, i32 %17, i32 1)
store i8* %18, i8** %4
br label %25
19: ; preds = %10, %3
%20 = load i32, i32* %5
%21 = zext i32 %20 to i64
%22 = load i8*, i8** %6
%23 = load i32, i32* %7
%24 = call i8* @xtoa(i64 %21, i8* %22, i32 %23, i32 0)
store i8* %24, i8** %4
br label %25
25: ; preds = %19, %13
%26 = load i8*, i8** %4
ret i8* %26
}

LLVM IR (-O2):
define i8* @itoa(i32 %0, i8* %1, i32 %2) {
%4 = icmp eq i32 %2, 10
%5 = icmp slt i32 %0, 0
%6 = and i1 %5, %4
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = sext i32 %0 to i64
%9 = tail call i8* @xtoa(i64 %8, i8* %1, i32 10, i32 1)
br label %13
10: ; preds = %3
%11 = zext i32 %0 to i64
%12 = tail call i8* @xtoa(i64 %11, i8* %1, i32 %2, i32 0)
br label %13
13: ; preds = %10, %7
%14 = phi i8* [ %9, %7 ], [ %12, %10 ]
ret i8* %14
}
double bellido(double z1, double z2, double z3) {
  return (z1 - 6) * (z1 - 6) + z2 * z2 + z3 * z3 - 104;
}


x86 assembly (clang, -O0):
<bellido>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  0xee8(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  -0x8(%rbp),%xmm2
movsd  0xed7(%rip),%xmm0
subsd  %xmm0,%xmm2
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xe9f(%rip),%xmm1
subsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bellido>:
addsd  0xef8(%rip),%xmm0
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm2
addsd  %xmm2,%xmm0
addsd  0xee4(%rip),%xmm0
ret

LLVM IR (-O0):
define double @bellido(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = fsub double %7, 6.000000e+00
%9 = load double, double* %4
%10 = fsub double %9, 6.000000e+00
%11 = load double, double* %5
%12 = load double, double* %5
%13 = fmul double %11, %12
%14 = call double @llvm.fmuladd.f64(double %8, double %10, double %13)
%15 = load double, double* %6
%16 = load double, double* %6
%17 = call double @llvm.fmuladd.f64(double %15, double %16, double %14)
%18 = fsub double %17, 1.040000e+02
ret double %18
}

LLVM IR (-O2):
define double @bellido(double %0, double %1, double %2) {
%4 = fadd double %0, -6.000000e+00
%5 = fmul double %1, %1
%6 = tail call double @llvm.fmuladd.f64(double %4, double %4, double %5)
%7 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %6)
%8 = fadd double %7, -1.040000e+02
ret double %8
}
/* Variables and functions */
int strlen(char *);
saltosSubStringTemperatura(char *temperatura) {
  char *inicio = "<temperatura>";
  int resu = 0;
  while (*(temperatura + strlen(inicio) + resu) != '<')
    resu++;
  return resu;
}


x86 assembly (clang, -O0):
<saltosSubStringTemperatura>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x3c,%eax
je     116a <saltosSubStringTemperatura+0x5a>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112e <saltosSubStringTemperatura+0x1e>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<saltosSubStringTemperatura>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
mov    $0xffffffff,%ebx
lea    0xedc(%rip),%r15
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %r15,%rdi
call   1030 <strlen@plt>
cltq
add    $0x1,%ebx
cmpb   $0x3c,(%r14,%rax,1)
lea    0x1(%r14),%r14
jne    1130 <saltosSubStringTemperatura+0x20>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [14 x i8] c"<temperatura>\00"
define i32 @saltosSubStringTemperatura(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
store i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8** %3
store i32 0, i32* %4
br label %5
5: ; preds = %17, %1
%6 = load i8*, i8** %2
%7 = load i8*, i8** %3
%8 = call i32 @strlen(i8* %7)
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %6, i64 %9
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 60
br i1 %16, label %17, label %20
17: ; preds = %5
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
@.str = [14 x i8] c"<temperatura>\00"
define i32 @saltosSubStringTemperatura(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %10, %2 ], [ 0, %1 ]
%4 = tail call i32 @strlen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = getelementptr inbounds i8, i8* %6, i64 %3
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 60
%10 = add nuw i64 %3, 1
br i1 %9, label %11, label %2
11: ; preds = %2
%12 = trunc i64 %3 to i32
ret i32 %12
}
unsigned int constant_time_select(unsigned int mask, unsigned int a,
                                  unsigned int b) {
  return (mask & a) | (~mask & b);
}


x86 assembly (clang, -O0):
<constant_time_select>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
xor    $0xffffffff,%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<constant_time_select>:
mov    %esi,%eax
xor    %edx,%eax
and    %edi,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @constant_time_select(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = and i32 %7, %8
%10 = load i32, i32* %4
%11 = xor i32 %10, -1
%12 = load i32, i32* %6
%13 = and i32 %11, %12
%14 = or i32 %9, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @constant_time_select(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %1, %0
%5 = xor i32 %0, -1
%6 = and i32 %5, %2
%7 = or i32 %6, %4
ret i32 %7
}
int processors() {
  long config = 1;
  long online = 1;
  if (config <= 0)
    config = 1;
  if (online <= 0)
    online = 1;
  return config < online ? config : online;
}


x86 assembly (clang, -O0):
<processors>:
push   %rbp
mov    %rsp,%rbp
movq   $0x1,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jg     1127 <processors+0x27>
movq   $0x1,-0x8(%rbp)
cmpq   $0x0,-0x10(%rbp)
jg     113a <processors+0x3a>
movq   $0x1,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1155 <processors+0x55>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    115d <processors+0x5d>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<processors>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @processors() {
%1 = alloca i64
%2 = alloca i64
store i64 1, i64* %1
store i64 1, i64* %2
%3 = load i64, i64* %1
%4 = icmp sle i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i64 1, i64* %1
br label %6
6: ; preds = %5, %0
%7 = load i64, i64* %2
%8 = icmp sle i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6
store i64 1, i64* %2
br label %10
10: ; preds = %9, %6
%11 = load i64, i64* %1
%12 = load i64, i64* %2
%13 = icmp slt i64 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = load i64, i64* %1
br label %18
16: ; preds = %10
%17 = load i64, i64* %2
br label %18
18: ; preds = %16, %14
%19 = phi i64 [ %15, %14 ], [ %17, %16 ]
%20 = trunc i64 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @processors() {
ret i32 1
}
void i2d_ECDSA_SIG(void) {}


x86 assembly (clang, -O0):
<i2d_ECDSA_SIG>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_ECDSA_SIG>:
ret

LLVM IR (-O0):
define void @i2d_ECDSA_SIG() {
ret void
}

LLVM IR (-O2):
define void @i2d_ECDSA_SIG() {
ret void
}
int main() { return "asdf"[2]; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movsbl 0xef0(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x64,%eax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"asdf\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 2)
%3 = sext i8 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @main() {
ret i32 100
}
void test_five(int x, int y, int z) {
#pragma omp distribute simd collapse(2)
  for (int i = 0; i < x; i++)
    for (int i = 0; i < y; i++)
      for (int i = 0; i < z; i++)
        ;
}


x86 assembly (clang, -O0):
<test_five>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    117f <test_five+0x7f>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    116c <test_five+0x6c>
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <test_five+0x59>
jmp    114b <test_five+0x4b>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    113a <test_five+0x3a>
jmp    115e <test_five+0x5e>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <test_five+0x27>
jmp    1171 <test_five+0x71>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1114 <test_five+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_five>:
ret

LLVM IR (-O0):
define void @test_five(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %10
10: ; preds = %33, %3
%11 = load i32, i32* %7
%12 = load i32, i32* %4
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %36
14: ; preds = %10
store i32 0, i32* %8
br label %15
15: ; preds = %29, %14
%16 = load i32, i32* %8
%17 = load i32, i32* %5
%18 = icmp slt i32 %16, %17
br i1 %18, label %19, label %32
19: ; preds = %15
store i32 0, i32* %9
br label %20
20: ; preds = %25, %19
%21 = load i32, i32* %9
%22 = load i32, i32* %6
%23 = icmp slt i32 %21, %22
br i1 %23, label %24, label %28
24: ; preds = %20
br label %25
25: ; preds = %24
%26 = load i32, i32* %9
%27 = add nsw i32 %26, 1
store i32 %27, i32* %9
br label %20
28: ; preds = %20
br label %29
29: ; preds = %28
%30 = load i32, i32* %8
%31 = add nsw i32 %30, 1
store i32 %31, i32* %8
br label %15
32: ; preds = %15
br label %33
33: ; preds = %32
%34 = load i32, i32* %7
%35 = add nsw i32 %34, 1
store i32 %35, i32* %7
br label %10
36: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @test_five(i32 %0, i32 %1, i32 %2) {
ret void
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int /*<<< orphan*/ basic_test(int);
int /*<<< orphan*/ cleanup_test();
int /*<<< orphan*/ init_test();
int log_read_start(int);
void read_one_sector_start(void) {
  ssize_t n;
  init_test();
  n = log_read_start(512);
  basic_test(n == 512);
  cleanup_test();
}


x86 assembly (clang, -O0):
<read_one_sector_start>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <init_test@plt>
mov    $0x200,%edi
call   1040 <log_read_start@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x200,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <basic_test@plt>
mov    $0x0,%al
call   1050 <cleanup_test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_one_sector_start>:
push   %rax
xor    %eax,%eax
call   1060 <init_test@plt>
mov    $0x200,%edi
call   1040 <log_read_start@plt>
xor    %edi,%edi
cmp    $0x200,%eax
sete   %dil
call   1030 <basic_test@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <cleanup_test@plt>

LLVM IR (-O0):
define void @read_one_sector_start() {
%1 = alloca i32
%2 = call i32 (...) @init_test()
%3 = call i32 @log_read_start(i32 512)
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 512
%6 = zext i1 %5 to i32
%7 = call i32 @basic_test(i32 %6)
%8 = call i32 (...) @cleanup_test()
ret void
}

LLVM IR (-O2):
define void @read_one_sector_start() {
%1 = tail call i32 (...) @init_test()
%2 = tail call i32 @log_read_start(i32 512)
%3 = icmp eq i32 %2, 512
%4 = zext i1 %3 to i32
%5 = tail call i32 @basic_test(i32 %4)
%6 = tail call i32 (...) @cleanup_test()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr,
          "sum filename\n\n\t\tPrints the checksum of filename on stdout\n\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [60 x i8] c"sum filename\0A\0A\09\09Prints the checksum of filename on stdout\0A\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [60 x i8] c"sum filename\0A\0A\09\09Prints the checksum of filename on stdout\0A\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
__attribute__((unused)) void ularith_shld(unsigned long *r,
                                          const unsigned long lo,
                                          const unsigned long hi,
                                          const unsigned char i) {
  ;
  if (i > 0)
    *r = (hi << i) | (lo >> (64 - i));
  else
    *r = hi;
}


x86 assembly (clang, -O0):
<ularith_shld>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %al,-0x19(%rbp)
movzbl -0x19(%rbp),%eax
cmp    $0x0,%eax
jle    115a <ularith_shld+0x5a>
mov    -0x18(%rbp),%rax
movzbl -0x19(%rbp),%ecx
mov    %ecx,%ecx
shl    %cl,%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
movzbl -0x19(%rbp),%edx
mov    $0x40,%ecx
sub    %edx,%ecx
mov    %ecx,%ecx
shr    %cl,%rax
mov    -0x28(%rbp),%rcx
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
jmp    1165 <ularith_shld+0x65>
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ularith_shld>:
test   %ecx,%ecx
je     1108 <ularith_shld+0x8>
shld   %cl,%rsi,%rdx
mov    %rdx,(%rdi)
ret

LLVM IR (-O0):
define void @ularith_shld(i64* %0, i64 %1, i64 %2, i8 zeroext %3) {
%5 = alloca i64*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i8
store i64* %0, i64** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i8 %3, i8* %8
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %26
12: ; preds = %4
%13 = load i64, i64* %7
%14 = load i8, i8* %8
%15 = zext i8 %14 to i32
%16 = zext i32 %15 to i64
%17 = shl i64 %13, %16
%18 = load i64, i64* %6
%19 = load i8, i8* %8
%20 = zext i8 %19 to i32
%21 = sub nsw i32 64, %20
%22 = zext i32 %21 to i64
%23 = lshr i64 %18, %22
%24 = or i64 %17, %23
%25 = load i64*, i64** %5
store i64 %24, i64* %25
br label %29
26: ; preds = %4
%27 = load i64, i64* %7
%28 = load i64*, i64** %5
store i64 %27, i64* %28
br label %29
29: ; preds = %26, %12
ret void
}

LLVM IR (-O2):
define void @ularith_shld(i64* nocapture writeonly %0, i64 %1, i64 %2, i8 zeroext %3) {
%5 = icmp eq i8 %3, 0
br i1 %5, label %13, label %6
6: ; preds = %4
%7 = zext i8 %3 to i64
%8 = shl i64 %2, %7
%9 = sub nsw i64 64, %7
%10 = and i64 %9, 4294967295
%11 = lshr i64 %1, %10
%12 = or i64 %11, %8
br label %13
13: ; preds = %4, %6
%14 = phi i64 [ %12, %6 ], [ %2, %4 ]
store i64 %14, i64* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ clear_io_bit(int, int);
void TOSH_MAKE_CC_RSTN_INPUT() { clear_io_bit(-6, 5); }


x86 assembly (clang, -O0):
<TOSH_MAKE_CC_RSTN_INPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffffffa,%edi
mov    $0x5,%esi
call   1030 <clear_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_CC_RSTN_INPUT>:
mov    $0xfffffffa,%edi
mov    $0x5,%esi
jmp    1030 <clear_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_CC_RSTN_INPUT() {
%1 = call i32 @clear_io_bit(i32 -6, i32 5)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_CC_RSTN_INPUT() {
%1 = tail call i32 @clear_io_bit(i32 -6, i32 5)
ret void
}
/* Variables and functions */
char *index(char *sp, char c) {
  do {
    if (*sp == c)
      return (sp);
  } while (*sp++);
  return (0);
}


x86 assembly (clang, -O0):
<index>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    112e <index+0x2e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <index+0x53>
jmp    1133 <index+0x33>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
cmpb   $0x0,(%rax)
jne    110e <index+0xe>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<index>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rax),%ecx
cmp    %sil,%cl
je     1122 <index+0x22>
add    $0x1,%rax
test   %cl,%cl
jne    1110 <index+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @index(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
br label %6
6: ; preds = %16, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8, i8* %5
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %9, %11
br i1 %12, label %13, label %15
13: ; preds = %6
%14 = load i8*, i8** %4
store i8* %14, i8** %3
br label %22
15: ; preds = %6
br label %16
16: ; preds = %15
%17 = load i8*, i8** %4
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %4
%19 = load i8, i8* %17
%20 = icmp ne i8 %19, 0
br i1 %20, label %6, label %21
21: ; preds = %16
store i8* null, i8** %3
br label %22
22: ; preds = %21, %13
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @index(i8* %0, i8 signext %1) {
br label %3
3: ; preds = %7, %2
%4 = phi i8* [ %0, %2 ], [ %8, %7 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, %1
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = getelementptr inbounds i8, i8* %4, i64 1
%9 = icmp eq i8 %5, 0
br i1 %9, label %10, label %3
10: ; preds = %7, %3
%11 = phi i8* [ %4, %3 ], [ null, %7 ]
ret i8* %11
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t enrange(uint32_t x) { return x & 0x00ffffff; }


x86 assembly (clang, -O0):
<enrange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<enrange>:
mov    %edi,%eax
and    $0xffffff,%eax
ret

LLVM IR (-O0):
define i32 @enrange(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 16777215
ret i32 %4
}

LLVM IR (-O2):
define i32 @enrange(i32 %0) {
%2 = and i32 %0, 16777215
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int EOF;
int getc(int /*<<< orphan*/ *);
void chomp_line(FILE *file) {
  int ch;
  while ((ch = getc(file)) != EOF)
    if (ch == '\n' || ch == '\r')
      return;
}


x86 assembly (clang, -O0):
<chomp_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getc@plt>
mov    %eax,-0xc(%rbp)
mov    0x2eb9(%rip),%rcx
cmp    (%rcx),%eax
je     1155 <chomp_line+0x45>
cmpl   $0xa,-0xc(%rbp)
je     114b <chomp_line+0x3b>
cmpl   $0xd,-0xc(%rbp)
jne    1150 <chomp_line+0x40>
jmp    1155 <chomp_line+0x45>
jmp    111c <chomp_line+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chomp_line>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eca(%rip),%r14
xchg   %ax,%ax
mov    %rbx,%rdi
call   1030 <getc@plt>
cmp    (%r14),%eax
je     1137 <chomp_line+0x27>
cmp    $0xd,%eax
je     1137 <chomp_line+0x27>
cmp    $0xa,%eax
jne    1120 <chomp_line+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@EOF = global i32 0
define void @chomp_line(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
br label %4
4: ; preds = %16, %1
%5 = load i32*, i32** %2
%6 = call i32 @getc(i32* %5)
store i32 %6, i32* %3
%7 = load i32, i32* @EOF
%8 = icmp ne i32 %6, %7
br i1 %8, label %9, label %17
9: ; preds = %4
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 10
br i1 %11, label %15, label %12
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp eq i32 %13, 13
br i1 %14, label %15, label %16
15: ; preds = %12, %9
br label %17
16: ; preds = %12
br label %4
17: ; preds = %15, %4
ret void
}

LLVM IR (-O2):
@EOF = global i32 0
define void @chomp_line(i32* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = tail call i32 @getc(i32* %0)
%4 = load i32, i32* @EOF
%5 = icmp eq i32 %3, %4
br i1 %5, label %7, label %6
6: ; preds = %2
switch i32 %3, label %2 [
i32 13, label %7
i32 10, label %7
]
7: ; preds = %2, %6, %6
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fclose(int /*<<< orphan*/ *);
int _sys_fclose(FILE *file) { return (fclose(file)); }


x86 assembly (clang, -O0):
<_sys_fclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sys_fclose>:
jmp    1030 <fclose@plt>

LLVM IR (-O0):
define i32 @_sys_fclose(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fclose(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @_sys_fclose(i32* nocapture %0) {
%2 = tail call i32 @fclose(i32* %0)
ret i32 %2
}
/* Variables and functions */
size_t serialize_uint16(unsigned char *out, unsigned short v) {
  if (out != NULL) {
    out[0] = v & 0xFF;
    out[1] = (v & 0xFF00) >> 8;
  }
  return 2;
}


x86 assembly (clang, -O0):
<serialize_uint16>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1140 <serialize_uint16+0x40>
movzwl -0xa(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
movzwl -0xa(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialize_uint16>:
test   %rdi,%rdi
je     1108 <serialize_uint16+0x8>
mov    %si,(%rdi)
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i64 @serialize_uint16(i8* %0, i16 zeroext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %21
7: ; preds = %2
%8 = load i16, i16* %4
%9 = zext i16 %8 to i32
%10 = and i32 %9, 255
%11 = trunc i32 %10 to i8
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 0
store i8 %11, i8* %13
%14 = load i16, i16* %4
%15 = zext i16 %14 to i32
%16 = and i32 %15, 65280
%17 = ashr i32 %16, 8
%18 = trunc i32 %17 to i8
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i64 1
store i8 %18, i8* %20
br label %21
21: ; preds = %7, %2
ret i64 2
}

LLVM IR (-O2):
define i64 @serialize_uint16(i8* writeonly %0, i16 zeroext %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = trunc i16 %1 to i8
store i8 %5, i8* %0
%6 = lshr i16 %1, 8
%7 = trunc i16 %6 to i8
%8 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %7, i8* %8
br label %9
9: ; preds = %4, %2
ret i64 2
}
void cmx_atomic_smp_rmb(void) {
  __asm__ volatile("lfence" : : : "memory");
  return;
}


x86 assembly (clang, -O0):
<cmx_atomic_smp_rmb>:
push   %rbp
mov    %rsp,%rbp
lfence
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmx_atomic_smp_rmb>:
lfence
ret

LLVM IR (-O0):
define void @cmx_atomic_smp_rmb() {
ret void
}

LLVM IR (-O2):
define void @cmx_atomic_smp_rmb() {
tail call void asm sideeffect "lfence", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
void gtk_main() {}


x86 assembly (clang, -O0):
<gtk_main>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_main>:
ret

LLVM IR (-O0):
define void @gtk_main() {
ret void
}

LLVM IR (-O2):
define void @gtk_main() {
ret void
}
void foo_2_2_1_2_2_1_2_1_2() {}


x86 assembly (clang, -O0):
<foo_2_2_1_2_2_1_2_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_2_1_2_2_1_2_1_2>:
ret

LLVM IR (-O0):
define void @foo_2_2_1_2_2_1_2_1_2() {
ret void
}

LLVM IR (-O2):
define void @foo_2_2_1_2_2_1_2_1_2() {
ret void
}
char *cpApgVersion() { return "6.3"; }


x86 assembly (clang, -O0):
<cpApgVersion>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpApgVersion>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"6.3\00"
define i8* @cpApgVersion() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [4 x i8] c"6.3\00"
define i8* @cpApgVersion() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int rand();
int pick_port() { return (rand() % 8999) + 1000; }


x86 assembly (clang, -O0):
<pick_port>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x2327,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x3e8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pick_port>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x3a42bcf3,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x2b,%rcx
add    %edx,%ecx
imul   $0x2327,%ecx,%ecx
neg    %ecx
add    %ecx,%eax
add    $0x3e8,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @pick_port() {
%1 = call i32 (...) @rand()
%2 = srem i32 %1, 8999
%3 = add nsw i32 %2, 1000
ret i32 %3
}

LLVM IR (-O2):
define i32 @pick_port() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 8999
%3 = add nsw i32 %2, 1000
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ _OS_SET_FSR_CUR_TASK_W(int);
int /*<<< orphan*/ _OS_SET_PC();
void _OS_JumpToTask(void) {
  _OS_SET_FSR_CUR_TASK_W(1 + 1);
  _OS_SET_PC();
}


x86 assembly (clang, -O0):
<_OS_JumpToTask>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <_OS_SET_FSR_CUR_TASK_W@plt>
mov    $0x0,%al
call   1040 <_OS_SET_PC@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_OS_JumpToTask>:
push   %rax
mov    $0x2,%edi
call   1030 <_OS_SET_FSR_CUR_TASK_W@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <_OS_SET_PC@plt>

LLVM IR (-O0):
define void @_OS_JumpToTask() {
%1 = call i32 @_OS_SET_FSR_CUR_TASK_W(i32 2)
%2 = call i32 (...) @_OS_SET_PC()
ret void
}

LLVM IR (-O2):
define void @_OS_JumpToTask() {
%1 = tail call i32 @_OS_SET_FSR_CUR_TASK_W(i32 2)
%2 = tail call i32 (...) @_OS_SET_PC()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_srli_si128(int /*<<< orphan*/, int);
__m128i test_mm_srli_si128(__m128i A) { return _mm_srli_si128(A, 5); }


x86 assembly (clang, -O0):
<test_mm_srli_si128>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x5,%esi
call   1030 <_mm_srli_si128@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_srli_si128>:
mov    $0x5,%esi
jmp    1030 <_mm_srli_si128@plt>

LLVM IR (-O0):
define i32 @test_mm_srli_si128(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_srli_si128(i32 %3, i32 5)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test_mm_srli_si128(i32 %0) {
%2 = tail call i32 @_mm_srli_si128(i32 %0, i32 5)
ret i32 %2
}
int fdlim_get(int hard) { return 25; }


x86 assembly (clang, -O0):
<fdlim_get>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x19,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdlim_get>:
mov    $0x19,%eax
ret

LLVM IR (-O0):
define i32 @fdlim_get(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 25
}

LLVM IR (-O2):
define i32 @fdlim_get(i32 %0) {
ret i32 25
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t rot32l8(uint32_t x) { return (x << 8) | (x >> 24); }


x86 assembly (clang, -O0):
<rot32l8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%ecx
sar    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rot32l8>:
mov    %edi,%eax
shl    $0x8,%eax
sar    $0x18,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rot32l8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 8
%5 = load i32, i32* %2
%6 = ashr i32 %5, 24
%7 = or i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @rot32l8(i32 %0) {
%2 = shl i32 %0, 8
%3 = ashr i32 %0, 24
%4 = or i32 %2, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int scanf(char *, int *, int *);
int main() {
  int a, b;
  while (scanf("%d %d", &a, &b) == 2) {
    printf("%d\n", a & b);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
cmp    $0x2,%eax
jne    1163 <main+0x43>
mov    -0x8(%rbp),%esi
and    -0xc(%rbp),%esi
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
jmp    112f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
lea    0xed1(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
cmp    $0x2,%eax
jne    1182 <main+0x62>
lea    0xebe(%rip),%r14
lea    0xeb1(%rip),%r15
lea    0x4(%rsp),%r12
mov    %rsp,%rbx
nopw   0x0(%rax,%rax,1)
mov    (%rsp),%esi
and    0x4(%rsp),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
mov    %r15,%rdi
mov    %r12,%rsi
mov    %rbx,%rdx
call   1040 <scanf@plt>
cmp    $0x2,%eax
je     1160 <main+0x40>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
br label %4
4: ; preds = %7, %0
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3)
%6 = icmp eq i32 %5, 2
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = and i32 %8, %9
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %10)
br label %4
12: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = icmp eq i32 %5, 2
br i1 %6, label %7, label %14
7: ; preds = %0, %7
%8 = load i32, i32* %1
%9 = load i32, i32* %2
%10 = and i32 %9, %8
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %10)
%12 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%13 = icmp eq i32 %12, 2
br i1 %13, label %7, label %14
14: ; preds = %7, %0
ret i32 0
}
__attribute__((no, always_)) int fn2(int r) { return r & 4; }


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
mov    %edi,%eax
and    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @fn2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 4
ret i32 %4
}

LLVM IR (-O2):
define i32 @fn2(i32 %0) {
%2 = and i32 %0, 4
ret i32 %2
}
void network_close(int user_num) {}


x86 assembly (clang, -O0):
<network_close>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<network_close>:
ret

LLVM IR (-O0):
define void @network_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @network_close(i32 %0) {
ret void
}
/* Type definitions */
struct diss_counter {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct diss_counter *);
void diss_counter_destroy(struct diss_counter *dc) { free(dc); }


x86 assembly (clang, -O0):
<diss_counter_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diss_counter_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.diss_counter = type { i32 }
define void @diss_counter_destroy(%struct.diss_counter* %0) {
%2 = alloca %struct.diss_counter*
store %struct.diss_counter* %0, %struct.diss_counter** %2
%3 = load %struct.diss_counter*, %struct.diss_counter** %2
%4 = call i32 @free(%struct.diss_counter* %3)
ret void
}

LLVM IR (-O2):
%struct.diss_counter = type { i32 }
define void @diss_counter_destroy(%struct.diss_counter* nocapture %0) {
%2 = tail call i32 @free(%struct.diss_counter* %0)
ret void
}
/* Variables and functions */
long mc_poisson_large(double);
long mc_poisson_small(double);
long mc_rand_poisson(double lambda) {
  return (lambda < 30.0) ? mc_poisson_small(lambda) : mc_poisson_large(lambda);
}


x86 assembly (clang, -O0):
<mc_rand_poisson>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xecb(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1153 <mc_rand_poisson+0x33>
movsd  -0x8(%rbp),%xmm0
call   1040 <mc_poisson_small@plt>
mov    %rax,-0x10(%rbp)
jmp    1161 <mc_rand_poisson+0x41>
movsd  -0x8(%rbp),%xmm0
call   1030 <mc_poisson_large@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mc_rand_poisson>:
movsd  0xed8(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    1133 <mc_rand_poisson+0x13>
jmp    1040 <mc_poisson_small@plt>
jmp    1030 <mc_poisson_large@plt>

LLVM IR (-O0):
define i64 @mc_rand_poisson(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 3.000000e+01
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load double, double* %2
%7 = call i64 @mc_poisson_small(double %6)
br label %11
8: ; preds = %1
%9 = load double, double* %2
%10 = call i64 @mc_poisson_large(double %9)
br label %11
11: ; preds = %8, %5
%12 = phi i64 [ %7, %5 ], [ %10, %8 ]
ret i64 %12
}

LLVM IR (-O2):
define i64 @mc_rand_poisson(double %0) {
%2 = fcmp olt double %0, 3.000000e+01
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i64 @mc_poisson_small(double %0)
br label %7
5: ; preds = %1
%6 = tail call i64 @mc_poisson_large(double %0)
br label %7
7: ; preds = %5, %3
%8 = phi i64 [ %4, %3 ], [ %6, %5 ]
ret i64 %8
}
const char *proginfo_version(void) {
  const char *s = "v0.4.2";
  return s;
}


x86 assembly (clang, -O0):
<proginfo_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<proginfo_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"v0.4.2\00"
define i8* @proginfo_version() {
%1 = alloca i8*
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
@.str = [7 x i8] c"v0.4.2\00"
define i8* @proginfo_version() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ __coverity_alloc__(int);
void *BN_bin2bn(void *pb, int cb, void *pbn) { __coverity_alloc__(cb); }


x86 assembly (clang, -O0):
<BN_bin2bn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <__coverity_alloc__@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_bin2bn>:
mov    %esi,%edi
jmp    1030 <__coverity_alloc__@plt>

LLVM IR (-O0):
define i8* @BN_bin2bn(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
%8 = load i32, i32* %6
%9 = call i32 @__coverity_alloc__(i32 %8)
%10 = load i8*, i8** %4
ret i8* %10
}

LLVM IR (-O2):
define noalias i8* @BN_bin2bn(i8* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @__coverity_alloc__(i32 %1)
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ free(unsigned char *);
void csha256_destroy(unsigned char *hash) { free(hash); }


x86 assembly (clang, -O0):
<csha256_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<csha256_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @csha256_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @csha256_destroy(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ilogb(double);
double scalbn(double, int /*<<< orphan*/);
double significand(double x) { return scalbn(x, -ilogb(x)); }


x86 assembly (clang, -O0):
<significand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ilogb@plt>
movsd  -0x10(%rbp),%xmm0
xor    %edi,%edi
sub    %eax,%edi
call   1040 <scalbn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<significand>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <ilogb@plt>
neg    %eax
movsd  (%rsp),%xmm0
mov    %eax,%edi
pop    %rax
jmp    1040 <scalbn@plt>

LLVM IR (-O0):
define double @significand(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = call i32 @ilogb(double %4)
%6 = sub nsw i32 0, %5
%7 = call double @scalbn(double %3, i32 %6)
ret double %7
}

LLVM IR (-O2):
define double @significand(double %0) {
%2 = tail call i32 @ilogb(double %0)
%3 = sub nsw i32 0, %2
%4 = tail call double @scalbn(double %0, i32 %3)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ EWM_DriverIRQHandler();
__attribute__((weak)) void EWM_IRQHandler(void) { EWM_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<EWM_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <EWM_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<EWM_IRQHandler>:
xor    %eax,%eax
jmp    1030 <EWM_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @EWM_IRQHandler() {
%1 = call i32 (...) @EWM_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @EWM_IRQHandler() {
%1 = tail call i32 (...) @EWM_DriverIRQHandler()
ret void
}
void av_frame_set_color_range() {}


x86 assembly (clang, -O0):
<av_frame_set_color_range>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_frame_set_color_range>:
ret

LLVM IR (-O0):
define void @av_frame_set_color_range() {
ret void
}

LLVM IR (-O2):
define void @av_frame_set_color_range() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ cpu_read_long(int /*<<< orphan*/);
uint32_t cpu_read_long_dasm(uint32_t address) { return cpu_read_long(address); }


x86 assembly (clang, -O0):
<cpu_read_long_dasm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <cpu_read_long@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_read_long_dasm>:
jmp    1030 <cpu_read_long@plt>

LLVM IR (-O0):
define i32 @cpu_read_long_dasm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cpu_read_long(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @cpu_read_long_dasm(i32 %0) {
%2 = tail call i32 @cpu_read_long(i32 %0)
ret i32 %2
}
unsigned int timer_to_microsecs(unsigned int value) {
  return (0xFFFFFFFF - value) * 16 / 200;
}


x86 assembly (clang, -O0):
<timer_to_microsecs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
sub    -0x4(%rbp),%eax
shl    $0x4,%eax
mov    $0xc8,%ecx
xor    %edx,%edx
div    %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer_to_microsecs>:
not    %edi
shl    $0x4,%edi
imul   $0x51eb851f,%rdi,%rax
shr    $0x26,%rax
ret

LLVM IR (-O0):
define i32 @timer_to_microsecs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub i32 -1, %3
%5 = mul i32 %4, 16
%6 = udiv i32 %5, 200
ret i32 %6
}

LLVM IR (-O2):
define i32 @timer_to_microsecs(i32 %0) {
%2 = xor i32 %0, -1
%3 = shl i32 %2, 4
%4 = udiv i32 %3, 200
ret i32 %4
}
/* Type definitions */
struct S {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ non_existent(struct S *, int);
void hooray6(struct S *p) { non_existent(p, 6); }


x86 assembly (clang, -O0):
<hooray6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x6,%esi
call   1030 <non_existent@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hooray6>:
mov    $0x6,%esi
jmp    1030 <non_existent@plt>

LLVM IR (-O0):
%struct.S = type { i32 }
define void @hooray6(%struct.S* %0) {
%2 = alloca %struct.S*
store %struct.S* %0, %struct.S** %2
%3 = load %struct.S*, %struct.S** %2
%4 = call i32 @non_existent(%struct.S* %3, i32 6)
ret void
}

LLVM IR (-O2):
%struct.S = type { i32 }
define void @hooray6(%struct.S* %0) {
%2 = tail call i32 @non_existent(%struct.S* %0, i32 6)
ret void
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int getpid();
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
int /*<<< orphan*/ srandom(int);
void seedRNG(void) {
  struct timeval tv;
  static int seeded = 0;
  if (0 == seeded) {
    (void)gettimeofday(&tv, NULL);
    srandom(tv.tv_sec ^ tv.tv_usec ^ getpid());
    seeded = 1;
  }
}


x86 assembly (clang, -O0):
<seedRNG>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
cmp    0x2efc(%rip),%eax
jne    1177 <seedRNG+0x47>
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1050 <gettimeofday@plt>
mov    -0x8(%rbp),%eax
xor    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1040 <getpid@plt>
mov    -0xc(%rbp),%edi
xor    %eax,%edi
call   1030 <srandom@plt>
movl   $0x1,0x2ec5(%rip)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seedRNG>:
push   %rbx
sub    $0x10,%rsp
cmpb   $0x0,0x2f00(%rip)
jne    1169 <seedRNG+0x39>
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1050 <gettimeofday@plt>
mov    0xc(%rsp),%ebx
xor    0x8(%rsp),%ebx
xor    %eax,%eax
call   1040 <getpid@plt>
xor    %eax,%ebx
mov    %ebx,%edi
call   1030 <srandom@plt>
movb   $0x1,0x2ed3(%rip)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
@seedRNG.seeded = internal global i32 0
define void @seedRNG() {
%1 = alloca %struct.timeval
%2 = load i32, i32* @seedRNG.seeded
%3 = icmp eq i32 0, %2
br i1 %3, label %4, label %14
4: ; preds = %0
%5 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%7 = load i32, i32* %6
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%9 = load i32, i32* %8
%10 = xor i32 %7, %9
%11 = call i32 (...) @getpid()
%12 = xor i32 %10, %11
%13 = call i32 @srandom(i32 %12)
store i32 1, i32* @seedRNG.seeded
br label %14
14: ; preds = %4, %0
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
@seedRNG.seeded = internal unnamed_addr global i1 false
define void @seedRNG() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = load i1, i1* @seedRNG.seeded
br i1 %3, label %14, label %4
4: ; preds = %0
%5 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%7 = load i32, i32* %6
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%9 = load i32, i32* %8
%10 = xor i32 %9, %7
%11 = tail call i32 (...) @getpid()
%12 = xor i32 %10, %11
%13 = tail call i32 @srandom(i32 %12)
store i1 true, i1* @seedRNG.seeded
br label %14
14: ; preds = %4, %0
ret void
}