xunge/DecIR huggingface dataset:
void defer_compaction(struct zone *zone) {}


x86 assembly (clang, -O0):
<defer_compaction>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<defer_compaction>:
ret

LLVM IR (-O0):
%struct.zone = type opaque
define void @defer_compaction(%struct.zone* %0) {
%2 = alloca %struct.zone*
store %struct.zone* %0, %struct.zone** %2
ret void
}

LLVM IR (-O2):
%struct.zone = type opaque
define void @defer_compaction(%struct.zone* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int setgroups(size_t size, const gid_t *list) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<setgroups>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setgroups>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @setgroups(i64 %0, i32* %1) {
%3 = alloca i64
%4 = alloca i32*
store i64 %0, i64* %3
store i32* %1, i32** %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @setgroups(i64 %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
int main(int argc, char const *argv[]) {}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
int tdefault_remove_fork_catchpoint(struct target_ops *self, int arg1) {
  return 1;
}


x86 assembly (clang, -O0):
<tdefault_remove_fork_catchpoint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tdefault_remove_fork_catchpoint>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.target_ops = type opaque
define i32 @tdefault_remove_fork_catchpoint(%struct.target_ops* %0, i32 %1) {
%3 = alloca %struct.target_ops*
%4 = alloca i32
store %struct.target_ops* %0, %struct.target_ops** %3
store i32 %1, i32* %4
ret i32 1
}

LLVM IR (-O2):
%struct.target_ops = type opaque
define i32 @tdefault_remove_fork_catchpoint(%struct.target_ops* nocapture readnone %0, i32 %1) {
ret i32 1
}
/* Variables and functions */
int write(int, char const *, int);
int VMBLOCK_CONTROL(int fd, int op, const char *path) {
  return write(fd, path, op);
}


x86 assembly (clang, -O0):
<VMBLOCK_CONTROL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VMBLOCK_CONTROL>:
mov    %esi,%eax
mov    %rdx,%rsi
mov    %eax,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
define i32 @VMBLOCK_CONTROL(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %6
%9 = load i32, i32* %5
%10 = call i32 @write(i32 %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @VMBLOCK_CONTROL(i32 %0, i32 %1, i8* nocapture %2) {
%4 = tail call i32 @write(i32 %0, i8* %2, i32 %1)
ret i32 %4
}
reg0indreg1_set(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ r0 = (*p1); }


x86 assembly (clang, -O0):
<reg0indreg1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%ax
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg0indreg1_set>:
ret

LLVM IR (-O0):
define i32 @reg0indreg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %13
%17 = load i16, i16* %16
store i16 %17, i16* %8
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @reg0indreg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
ret i32 undef
}
void XtCallbackReleaseCacheRefList() {}


x86 assembly (clang, -O0):
<XtCallbackReleaseCacheRefList>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtCallbackReleaseCacheRefList>:
ret

LLVM IR (-O0):
define void @XtCallbackReleaseCacheRefList() {
ret void
}

LLVM IR (-O2):
define void @XtCallbackReleaseCacheRefList() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ui_field_value_up(int /*<<< orphan*/ const);
void switch_s1_up(const uint32_t repeat_count) {
  ui_field_value_up(repeat_count);
}


x86 assembly (clang, -O0):
<switch_s1_up>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ui_field_value_up@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_s1_up>:
jmp    1030 <ui_field_value_up@plt>

LLVM IR (-O0):
define void @switch_s1_up(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ui_field_value_up(i32 %3)
ret void
}

LLVM IR (-O2):
define void @switch_s1_up(i32 %0) {
%2 = tail call i32 @ui_field_value_up(i32 %0)
ret void
}
int benchmarkIterationsCount() { return 20; }


x86 assembly (clang, -O0):
<benchmarkIterationsCount>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<benchmarkIterationsCount>:
mov    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @benchmarkIterationsCount() {
ret i32 20
}

LLVM IR (-O2):
define i32 @benchmarkIterationsCount() {
ret i32 20
}
int test_imm_9Fuint8_reg(unsigned char val) {
  return ((val) & (-0x9F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Fuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff61,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Fuint8_reg>:
test   $0x61,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Fuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -159
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_9Fuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 97
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ c_plend();
int /*<<< orphan*/ c_plinit();
int /*<<< orphan*/ demo1();
int /*<<< orphan*/ demo2();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ plparseopts(int *, char **, int);
int main(int argc, char *argv[]) {
  (void)plparseopts(&argc, argv, 0x0001);
  c_plinit();
  demo1();
  demo2();
  c_plend();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    -0x8(%rbp),%rdi
mov    $0x1,%edx
call   1040 <plparseopts@plt>
mov    $0x0,%al
call   1060 <c_plinit@plt>
mov    $0x0,%al
call   1030 <demo1@plt>
mov    $0x0,%al
call   1050 <demo2@plt>
mov    $0x0,%al
call   1080 <c_plend@plt>
xor    %edi,%edi
call   1070 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x1,%edx
call   1040 <plparseopts@plt>
xor    %eax,%eax
call   1060 <c_plinit@plt>
xor    %eax,%eax
call   1030 <demo1@plt>
xor    %eax,%eax
call   1050 <demo2@plt>
xor    %eax,%eax
call   1080 <c_plend@plt>
xor    %edi,%edi
call   1070 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = call i32 @plparseopts(i32* %4, i8** %6, i32 1)
%8 = call i32 (...) @c_plinit()
%9 = call i32 (...) @demo1()
%10 = call i32 (...) @demo2()
%11 = call i32 (...) @c_plend()
%12 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @plparseopts(i32* %3, i8** %1, i32 1)
%5 = call i32 (...) @c_plinit()
%6 = call i32 (...) @demo1()
%7 = call i32 (...) @demo2()
%8 = call i32 (...) @c_plend()
%9 = call i32 @exit(i32 0)
unreachable
}
int char_location(char *src, const char c) {
  int i = 0;
  while (src[i] != '\0') {
    if (src[i] == c) {
      return i;
    }
    i++;
  }
  return -1;
}


x86 assembly (clang, -O0):
<char_location>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     115b <char_location+0x5b>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    114d <char_location+0x4d>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1162 <char_location+0x62>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1115 <char_location+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_location>:
mov    (%rdi),%dl
mov    $0xffffffff,%eax
test   %dl,%dl
je     1122 <char_location+0x22>
xor    %ecx,%ecx
nopl   (%rax)
cmp    %sil,%dl
je     1123 <char_location+0x23>
movzbl 0x1(%rdi,%rcx,1),%edx
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <char_location+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @char_location(i8* %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 0, i32* %6
br label %7
7: ; preds = %27, %2
%8 = load i8*, i8** %4
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %30
15: ; preds = %7
%16 = load i8*, i8** %4
%17 = load i32, i32* %6
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = load i8, i8* %5
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %21, %23
br i1 %24, label %25, label %27
25: ; preds = %15
%26 = load i32, i32* %6
store i32 %26, i32* %3
br label %31
27: ; preds = %15
%28 = load i32, i32* %6
%29 = add nsw i32 %28, 1
store i32 %29, i32* %6
br label %7
30: ; preds = %7
store i32 -1, i32* %3
br label %31
31: ; preds = %30, %25
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @char_location(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %9
%6 = phi i64 [ %10, %9 ], [ 0, %2 ]
%7 = phi i8 [ %12, %9 ], [ %3, %2 ]
%8 = icmp eq i8 %7, %1
br i1 %8, label %14, label %9
9: ; preds = %5
%10 = add nuw i64 %6, 1
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %16, label %5
14: ; preds = %5
%15 = trunc i64 %6 to i32
br label %16
16: ; preds = %9, %14, %2
%17 = phi i32 [ -1, %2 ], [ %15, %14 ], [ -1, %9 ]
ret i32 %17
}
void McASPTxIntDisable(unsigned int baseAddr, unsigned int intMask) {
  (*((volatile unsigned int *)(baseAddr + (0xBC)))) &= ~intMask;
}


x86 assembly (clang, -O0):
<McASPTxIntDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edx
xor    $0xffffffff,%edx
mov    -0x4(%rbp),%eax
add    $0xbc,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<McASPTxIntDisable>:
not    %esi
add    $0xbc,%edi
and    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @McASPTxIntDisable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = xor i32 %5, -1
%7 = load i32, i32* %3
%8 = add i32 %7, 188
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = and i32 %11, %6
store volatile i32 %12, i32* %10
ret void
}

LLVM IR (-O2):
define void @McASPTxIntDisable(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = add i32 %0, 188
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, %3
store volatile i32 %8, i32* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void print_usage(const char *progname) {
  fprintf(stderr, "Usage: %s\n", progname);
  exit(1);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<print_usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"Usage: %s\0A\00"
define void @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"Usage: %s\0A\00"
define void @print_usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
scalar_t__ GLeeInit();
int /*<<< orphan*/ pglEndConditionalRender();
void _Lazy_glEndConditionalRender(void) {
  if (GLeeInit())
    pglEndConditionalRender();
}


x86 assembly (clang, -O0):
<_Lazy_glEndConditionalRender>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GLeeInit@plt>
cmp    $0x0,%rax
je     113c <_Lazy_glEndConditionalRender+0x1c>
mov    $0x0,%al
call   1040 <pglEndConditionalRender@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Lazy_glEndConditionalRender>:
push   %rax
xor    %eax,%eax
call   1030 <GLeeInit@plt>
test   %rax,%rax
je     1135 <_Lazy_glEndConditionalRender+0x15>
xor    %eax,%eax
pop    %rcx
jmp    1040 <pglEndConditionalRender@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @_Lazy_glEndConditionalRender() {
%1 = call i64 (...) @GLeeInit()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 (...) @pglEndConditionalRender()
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
define void @_Lazy_glEndConditionalRender() {
%1 = tail call i64 (...) @GLeeInit()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @pglEndConditionalRender()
br label %5
5: ; preds = %3, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FreeAttrTable();
int /*<<< orphan*/ FreeConfig();
int /*<<< orphan*/ FreeEntities();
int /*<<< orphan*/ FreePrintBuf();
int /*<<< orphan*/ FreeTags();
void DeInitTidy(void) {
  FreeTags();
  FreeAttrTable();
  FreeEntities();
  FreeConfig();
  FreePrintBuf();
}


x86 assembly (clang, -O0):
<DeInitTidy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <FreeTags@plt>
mov    $0x0,%al
call   1030 <FreeAttrTable@plt>
mov    $0x0,%al
call   1050 <FreeEntities@plt>
mov    $0x0,%al
call   1070 <FreeConfig@plt>
mov    $0x0,%al
call   1060 <FreePrintBuf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DeInitTidy>:
push   %rax
xor    %eax,%eax
call   1040 <FreeTags@plt>
xor    %eax,%eax
call   1030 <FreeAttrTable@plt>
xor    %eax,%eax
call   1050 <FreeEntities@plt>
xor    %eax,%eax
call   1070 <FreeConfig@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <FreePrintBuf@plt>

LLVM IR (-O0):
define void @DeInitTidy() {
%1 = call i32 (...) @FreeTags()
%2 = call i32 (...) @FreeAttrTable()
%3 = call i32 (...) @FreeEntities()
%4 = call i32 (...) @FreeConfig()
%5 = call i32 (...) @FreePrintBuf()
ret void
}

LLVM IR (-O2):
define void @DeInitTidy() {
%1 = tail call i32 (...) @FreeTags()
%2 = tail call i32 (...) @FreeAttrTable()
%3 = tail call i32 (...) @FreeEntities()
%4 = tail call i32 (...) @FreeConfig()
%5 = tail call i32 (...) @FreePrintBuf()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;

/* Variables and functions */
int /*<<< orphan*/ fgetwc(int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
wint_t getwchar(void) { return fgetwc(stdin); }


x86 assembly (clang, -O0):
<getwchar>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <fgetwc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getwchar>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <fgetwc@plt>

LLVM IR (-O0):
@stdin = global i32 0
define i32 @getwchar() {
%1 = load i32, i32* @stdin
%2 = call i32 @fgetwc(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@stdin = global i32 0
define i32 @getwchar() {
%1 = load i32, i32* @stdin
%2 = tail call i32 @fgetwc(i32 %1)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ XCrossingEvent;

/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ malloc(int);
void *alloc_XCrossingEvent(void) {
  XCrossingEvent *_p = (XCrossingEvent *)malloc(sizeof(XCrossingEvent));
  if (_p == NULL)
    abort();
  return (void *)_p;
}


x86 assembly (clang, -O0):
<alloc_XCrossingEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1148 <alloc_XCrossingEvent+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_XCrossingEvent>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <alloc_XCrossingEvent+0x12>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @alloc_XCrossingEvent() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %0
%9 = load i32*, i32** %1
%10 = bitcast i32* %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define i8* @alloc_XCrossingEvent() {
%1 = tail call i64 @malloc(i32 4)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = inttoptr i64 %1 to i8*
ret i8* %6
}
/* Variables and functions */
void *OP1_TYPECAST(void *);
void *op_UNARY_PLUS(void *inp) {
  inp = OP1_TYPECAST(inp);
  return inp;
}


x86 assembly (clang, -O0):
<op_UNARY_PLUS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <OP1_TYPECAST@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_UNARY_PLUS>:
jmp    1030 <OP1_TYPECAST@plt>

LLVM IR (-O0):
define i8* @op_UNARY_PLUS(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @OP1_TYPECAST(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @op_UNARY_PLUS(i8* %0) {
%2 = tail call i8* @OP1_TYPECAST(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ bla();
void thread_entry_through_header(void) {
  int i;
  for (i = 0; i < 170; i++)
    bla();
}


x86 assembly (clang, -O0):
<thread_entry_through_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0xaa,-0x4(%rbp)
jge    1141 <thread_entry_through_header+0x31>
mov    $0x0,%al
call   1030 <bla@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <thread_entry_through_header+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_entry_through_header>:
push   %rbx
mov    $0xaa,%ebx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <bla@plt>
add    $0xffffffff,%ebx
jne    1120 <thread_entry_through_header+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @thread_entry_through_header() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %7, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 170
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = call i32 (...) @bla()
br label %7
7: ; preds = %5
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %2
10: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @thread_entry_through_header() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 (...) @bla()
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 170
br i1 %5, label %6, label %1
6: ; preds = %1
ret void
}
/* Type definitions */
struct mloop_async {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mloop__ref_any(struct mloop_async *);
__attribute__((visibility("default"))) void
mloop_async_ref(struct mloop_async *self) {
  mloop__ref_any(self);
}


x86 assembly (clang, -O0):
<mloop_async_ref>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mloop__ref_any@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mloop_async_ref>:
jmp    1030 <mloop__ref_any@plt>

LLVM IR (-O0):
%struct.mloop_async = type { i32 }
define void @mloop_async_ref(%struct.mloop_async* %0) {
%2 = alloca %struct.mloop_async*
store %struct.mloop_async* %0, %struct.mloop_async** %2
%3 = load %struct.mloop_async*, %struct.mloop_async** %2
%4 = call i32 @mloop__ref_any(%struct.mloop_async* %3)
ret void
}

LLVM IR (-O2):
%struct.mloop_async = type { i32 }
define void @mloop_async_ref(%struct.mloop_async* %0) {
%2 = tail call i32 @mloop__ref_any(%struct.mloop_async* %0)
ret void
}
void ff_hevc_put_hevc_uni_qpel_h12_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_qpel_h12_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_qpel_h12_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_qpel_h12_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_qpel_h12_12_sse4() {
ret void
}
/* Type definitions */
struct SN_env {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SN_close_env(struct SN_env *, int);
extern void finnish_UTF_8_close_env(struct SN_env *z) { SN_close_env(z, 1); }


x86 assembly (clang, -O0):
<finnish_UTF_8_close_env>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <SN_close_env@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<finnish_UTF_8_close_env>:
mov    $0x1,%esi
jmp    1030 <SN_close_env@plt>

LLVM IR (-O0):
%struct.SN_env = type { i32 }
define void @finnish_UTF_8_close_env(%struct.SN_env* %0) {
%2 = alloca %struct.SN_env*
store %struct.SN_env* %0, %struct.SN_env** %2
%3 = load %struct.SN_env*, %struct.SN_env** %2
%4 = call i32 @SN_close_env(%struct.SN_env* %3, i32 1)
ret void
}

LLVM IR (-O2):
%struct.SN_env = type { i32 }
define void @finnish_UTF_8_close_env(%struct.SN_env* %0) {
%2 = tail call i32 @SN_close_env(%struct.SN_env* %0, i32 1)
ret void
}
/* Variables and functions */
char *malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *shell_strdup(const char *some_str) {
  char *result;
  result = malloc(strlen(some_str) + 1);
  if (result != NULL) {
    strcpy(result, some_str);
  }
  return result;
}


x86 assembly (clang, -O0):
<shell_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116d <shell_strdup+0x3d>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shell_strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1158 <shell_strdup+0x28>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @shell_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @malloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %14
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = load i8*, i8** %2
%13 = call i32 @strcpy(i8* %11, i8* %12)
br label %14
14: ; preds = %10, %1
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @shell_strdup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @strcpy(i8* %4, i8* %0)
br label %8
8: ; preds = %6, %1
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ test_init();
int /*<<< orphan*/ test_init_zero();
int /*<<< orphan*/ test_invalidate_mean();
int /*<<< orphan*/ test_invalidate_sorted();
int /*<<< orphan*/ test_mean();
int /*<<< orphan*/ test_min_max();
int /*<<< orphan*/ test_quartiles();
int /*<<< orphan*/ test_range();
int /*<<< orphan*/ test_reallocation();
int /*<<< orphan*/ test_std_deviation();
void __real_main231(void) {
  test_init_zero();
  test_init();
  test_min_max();
  test_range();
  test_quartiles();
  test_invalidate_sorted();
  test_mean();
  test_invalidate_mean();
  test_std_deviation();
  test_reallocation();
}


x86 assembly (clang, -O0):
<__real_main231>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   10b0 <test_init_zero@plt>
mov    $0x0,%al
call   1040 <test_init@plt>
mov    $0x0,%al
call   1080 <test_min_max@plt>
mov    $0x0,%al
call   10c0 <test_range@plt>
mov    $0x0,%al
call   1070 <test_quartiles@plt>
mov    $0x0,%al
call   1090 <test_invalidate_sorted@plt>
mov    $0x0,%al
call   1050 <test_mean@plt>
mov    $0x0,%al
call   1060 <test_invalidate_mean@plt>
mov    $0x0,%al
call   10a0 <test_std_deviation@plt>
mov    $0x0,%al
call   1030 <test_reallocation@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__real_main231>:
push   %rax
xor    %eax,%eax
call   10b0 <test_init_zero@plt>
xor    %eax,%eax
call   1040 <test_init@plt>
xor    %eax,%eax
call   1080 <test_min_max@plt>
xor    %eax,%eax
call   10c0 <test_range@plt>
xor    %eax,%eax
call   1070 <test_quartiles@plt>
xor    %eax,%eax
call   1090 <test_invalidate_sorted@plt>
xor    %eax,%eax
call   1050 <test_mean@plt>
xor    %eax,%eax
call   1060 <test_invalidate_mean@plt>
xor    %eax,%eax
call   10a0 <test_std_deviation@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <test_reallocation@plt>

LLVM IR (-O0):
define void @__real_main231() {
%1 = call i32 (...) @test_init_zero()
%2 = call i32 (...) @test_init()
%3 = call i32 (...) @test_min_max()
%4 = call i32 (...) @test_range()
%5 = call i32 (...) @test_quartiles()
%6 = call i32 (...) @test_invalidate_sorted()
%7 = call i32 (...) @test_mean()
%8 = call i32 (...) @test_invalidate_mean()
%9 = call i32 (...) @test_std_deviation()
%10 = call i32 (...) @test_reallocation()
ret void
}

LLVM IR (-O2):
define void @__real_main231() {
%1 = tail call i32 (...) @test_init_zero()
%2 = tail call i32 (...) @test_init()
%3 = tail call i32 (...) @test_min_max()
%4 = tail call i32 (...) @test_range()
%5 = tail call i32 (...) @test_quartiles()
%6 = tail call i32 (...) @test_invalidate_sorted()
%7 = tail call i32 (...) @test_mean()
%8 = tail call i32 (...) @test_invalidate_mean()
%9 = tail call i32 (...) @test_std_deviation()
%10 = tail call i32 (...) @test_reallocation()
ret void
}
/* Type definitions */
struct timezone {
  int dummy;
};
struct timeval {
  int tv_sec;
  unsigned int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, struct timezone *);
unsigned int GetTimer(void) {
  struct timeval tv;
  struct timezone tz;
  gettimeofday(&tv, &tz);
  return tv.tv_sec * 1000000 + tv.tv_usec;
}


x86 assembly (clang, -O0):
<GetTimer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <gettimeofday@plt>
imul   $0xf4240,-0x8(%rbp),%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetTimer>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
lea    0x10(%rsp),%rsi
call   1030 <gettimeofday@plt>
imul   $0xf4240,0x8(%rsp),%eax
add    0xc(%rsp),%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
%struct.timezone = type { i32 }
define i32 @GetTimer() {
%1 = alloca %struct.timeval
%2 = alloca %struct.timezone
%3 = call i32 @gettimeofday(%struct.timeval* %1, %struct.timezone* %2)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%8 = load i32, i32* %7
%9 = add i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
%struct.timezone = type { i32 }
define i32 @GetTimer() {
%1 = alloca %struct.timeval
%2 = alloca %struct.timezone
%3 = bitcast %struct.timeval* %1 to i8*
%4 = bitcast %struct.timezone* %2 to i8*
%5 = call i32 @gettimeofday(%struct.timeval* %1, %struct.timezone* %2)
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%7 = load i32, i32* %6
%8 = mul nsw i32 %7, 1000000
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%10 = load i32, i32* %9
%11 = add i32 %8, %10
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ fun(int **, int, int, int);
int /*<<< orphan*/ fun1(int **, int, int);
int main(int argc, char *argv[]) {
  int a[10][10] = {0};
  fun(a, 10, 10, 1);
  fun1(a, 10, 10);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1a0,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x1a0(%rbp),%rdi
xor    %esi,%esi
mov    $0x190,%edx
call   1040 <memset@plt>
lea    -0x1a0(%rbp),%rdi
mov    $0xa,%edx
mov    $0x1,%ecx
mov    %edx,%esi
call   1030 <fun@plt>
lea    -0x1a0(%rbp),%rdi
mov    $0xa,%edx
mov    %edx,%esi
call   1050 <fun1@plt>
xor    %eax,%eax
add    $0x1a0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x190,%rsp
mov    %rsp,%rbx
mov    $0x190,%edx
mov    %rbx,%rdi
xor    %esi,%esi
call   1040 <memset@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
mov    $0xa,%edx
mov    $0x1,%ecx
call   1030 <fun@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
mov    $0xa,%edx
call   1050 <fun1@plt>
xor    %eax,%eax
add    $0x190,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca [10 x [10 x i32]]
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = bitcast [10 x [10 x i32]]* %5 to i8*
%7 = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* %5, i64 0, i64 0
%8 = bitcast [10 x i32]* %7 to i32**
%9 = call i32 @fun(i32** %8, i32 10, i32 10, i32 1)
%10 = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* %5, i64 0, i64 0
%11 = bitcast [10 x i32]* %10 to i32**
%12 = call i32 @fun1(i32** %11, i32 10, i32 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [10 x [10 x i32]]
%4 = bitcast [10 x [10 x i32]]* %3 to i8*
%5 = bitcast [10 x [10 x i32]]* %3 to i32**
%6 = call i32 @fun(i32** %5, i32 10, i32 10, i32 1)
%7 = call i32 @fun1(i32** %5, i32 10, i32 10)
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SysCtlClockOutConfig(uint32_t ui32Config, uint32_t ui32Div) {
  ;

  ;
  (*((volatile unsigned long *)(0x400FE148))) =
      ui32Config | ((ui32Div - 1) & 0x000000FF);
}


x86 assembly (clang, -O0):
<SysCtlClockOutConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
and    $0xff,%ecx
or     %ecx,%eax
movslq %eax,%rcx
mov    $0x400fe148,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlClockOutConfig>:
add    $0xffffffff,%esi
movzbl %sil,%eax
or     %edi,%eax
cltq
mov    %rax,0x400fe148
40
ret

LLVM IR (-O0):
define void @SysCtlClockOutConfig(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = and i32 %7, 255
%9 = or i32 %5, %8
%10 = sext i32 %9 to i64
store volatile i64 %10, i64* inttoptr (i64 1074782536 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysCtlClockOutConfig(i32 %0, i32 %1) {
%3 = add i32 %1, 255
%4 = and i32 %3, 255
%5 = or i32 %4, %0
%6 = sext i32 %5 to i64
store volatile i64 %6, i64* inttoptr (i64 1074782536 to i64*)
ret void
}
/* Type definitions */
typedef int uint64_t;
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
void advance_time_usecs(struct timeval *tv, int adv_usecs) {
  uint64_t tv_us = (tv->tv_sec * 1000000) + tv->tv_usec + adv_usecs;
  tv->tv_sec = tv_us / 1000000;
  tv->tv_usec = tv_us % 1000000;
}


x86 assembly (clang, -O0):
<advance_time_usecs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
imul   $0xf4240,(%rax),%eax
mov    -0x8(%rbp),%rcx
add    0x4(%rcx),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%rax
mov    %edx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<advance_time_usecs>:
imul   $0xf4240,(%rdi),%eax
add    0x4(%rdi),%esi
add    %eax,%esi
movslq %esi,%rax
imul   $0x431bde83,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x32,%rcx
add    %edx,%ecx
mov    %ecx,(%rdi)
imul   $0xf4240,%ecx,%ecx
sub    %ecx,%eax
mov    %eax,0x4(%rdi)
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define void @advance_time_usecs(%struct.timeval* %0, i32 %1) {
%3 = alloca %struct.timeval*
%4 = alloca i32
%5 = alloca i32
store %struct.timeval* %0, %struct.timeval** %3
store i32 %1, i32* %4
%6 = load %struct.timeval*, %struct.timeval** %3
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %6, i32 0, i32 0
%8 = load i32, i32* %7
%9 = mul nsw i32 %8, 1000000
%10 = load %struct.timeval*, %struct.timeval** %3
%11 = getelementptr inbounds %struct.timeval, %struct.timeval* %10, i32 0, i32 1
%12 = load i32, i32* %11
%13 = add nsw i32 %9, %12
%14 = load i32, i32* %4
%15 = add nsw i32 %13, %14
store i32 %15, i32* %5
%16 = load i32, i32* %5
%17 = sdiv i32 %16, 1000000
%18 = load %struct.timeval*, %struct.timeval** %3
%19 = getelementptr inbounds %struct.timeval, %struct.timeval* %18, i32 0, i32 0
store i32 %17, i32* %19
%20 = load i32, i32* %5
%21 = srem i32 %20, 1000000
%22 = load %struct.timeval*, %struct.timeval** %3
%23 = getelementptr inbounds %struct.timeval, %struct.timeval* %22, i32 0, i32 1
store i32 %21, i32* %23
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define void @advance_time_usecs(%struct.timeval* nocapture %0, i32 %1) {
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%4 = load i32, i32* %3
%5 = mul nsw i32 %4, 1000000
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%7 = load i32, i32* %6
%8 = add i32 %7, %1
%9 = add i32 %8, %5
%10 = sdiv i32 %9, 1000000
store i32 %10, i32* %3
%11 = srem i32 %9, 1000000
store i32 %11, i32* %6
ret void
}
int sched_get_priority_min(int policy) { return 0; }


x86 assembly (clang, -O0):
<sched_get_priority_min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_get_priority_min>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sched_get_priority_min(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @sched_get_priority_min(i32 %0) {
ret i32 0
}
int sys_print(void) { return 0; }


x86 assembly (clang, -O0):
<sys_print>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_print>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sys_print() {
ret i32 0
}

LLVM IR (-O2):
define i32 @sys_print() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
double printReturnReal(double x) {
  printf("%g\n", x);
  return x + 1;
}


x86 assembly (clang, -O0):
<printReturnReal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
movsd  0xeca(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printReturnReal>:
push   %rax
movsd  %xmm0,(%rsp)
lea    0xeeb(%rip),%rdi
call   1030 <printf@plt>
movsd  (%rsp),%xmm0
addsd  0xed1(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%g\0A\00"
define double @printReturnReal(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %3)
%5 = load double, double* %2
%6 = fadd double %5, 1.000000e+00
ret double %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"%g\0A\00"
define double @printReturnReal(double %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %0)
%3 = fadd double %0, 1.000000e+00
ret double %3
}
int do_219() { return 219; }


x86 assembly (clang, -O0):
<do_219>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdb,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_219>:
mov    $0xdb,%eax
ret

LLVM IR (-O0):
define i32 @do_219() {
ret i32 219
}

LLVM IR (-O2):
define i32 @do_219() {
ret i32 219
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t muxhash(uint32_t k, uint32_t h) {
  k *= 0xcc9e2d51;
  k = (k >> 17) | (k << 15);
  k *= 0x1b873593;
  h ^= k;
  h = (h >> 19) | (h << 13);
  return ((h * 5) + 0xe6546b64);
}


x86 assembly (clang, -O0):
<muxhash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0xcc9e2d51,-0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x11,%eax
mov    -0x4(%rbp),%ecx
shl    $0xf,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
imul   $0x1b873593,-0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x13,%eax
mov    -0x8(%rbp),%ecx
shl    $0xd,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
imul   $0x5,-0x8(%rbp),%eax
add    $0xe6546b64,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<muxhash>:
imul   $0xcc9e2d51,%edi,%eax
sar    $0x11,%eax
imul   $0x16a88000,%edi,%ecx
or     %eax,%ecx
imul   $0x1b873593,%ecx,%eax
xor    %esi,%eax
mov    %eax,%ecx
sar    $0x13,%ecx
shl    $0xd,%eax
or     %ecx,%eax
lea    (%rax,%rax,4),%eax
add    $0xe6546b64,%eax
ret

LLVM IR (-O0):
define i32 @muxhash(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = mul i32 %5, -862048943
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = ashr i32 %7, 17
%9 = load i32, i32* %3
%10 = shl i32 %9, 15
%11 = or i32 %8, %10
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = mul nsw i32 %12, 461845907
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = xor i32 %15, %14
store i32 %16, i32* %4
%17 = load i32, i32* %4
%18 = ashr i32 %17, 19
%19 = load i32, i32* %4
%20 = shl i32 %19, 13
%21 = or i32 %18, %20
store i32 %21, i32* %4
%22 = load i32, i32* %4
%23 = mul nsw i32 %22, 5
%24 = add i32 %23, -430675100
ret i32 %24
}

LLVM IR (-O2):
define i32 @muxhash(i32 %0, i32 %1) {
%3 = mul i32 %0, -862048943
%4 = ashr i32 %3, 17
%5 = mul i32 %0, 380141568
%6 = or i32 %4, %5
%7 = mul nsw i32 %6, 461845907
%8 = xor i32 %7, %1
%9 = ashr i32 %8, 19
%10 = shl i32 %8, 13
%11 = or i32 %9, %10
%12 = mul nsw i32 %11, 5
%13 = add i32 %12, -430675100
ret i32 %13
}
/* Variables and functions */
double tanh(double);
double c_tanh(double arg0) { return tanh(arg0); }


x86 assembly (clang, -O0):
<c_tanh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <tanh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_tanh>:
jmp    1030 <tanh@plt>

LLVM IR (-O0):
define double @c_tanh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @tanh(double %3)
ret double %4
}

LLVM IR (-O2):
define double @c_tanh(double %0) {
%2 = tail call double @tanh(double %0)
ret double %2
}
void flashInit(void) {}


x86 assembly (clang, -O0):
<flashInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flashInit>:
ret

LLVM IR (-O0):
define void @flashInit() {
ret void
}

LLVM IR (-O2):
define void @flashInit() {
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t fact(int n) {
  if (n == 1) {
    return 1;
  }
  if (n == 0) {
    return 0;
  }
  return fact(n - 1) * n;
}


x86 assembly (clang, -O0):
<fact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1131 <fact+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1159 <fact+0x49>
cmpl   $0x0,-0x8(%rbp)
jne    1147 <fact+0x37>
movl   $0x0,-0x4(%rbp)
jmp    1159 <fact+0x49>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fact@plt>
imul   -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fact>:
mov    %edi,%eax
mov    $0x1,%ecx
cmp    $0x2,%eax
jb     111b <fact+0x1b>
nopl   0x0(%rax)
imul   %eax,%ecx
add    $0xffffffff,%eax
cmp    $0x2,%eax
jae    1110 <fact+0x10>
imul   %ecx,%eax
ret

LLVM IR (-O0):
define i32 @fact(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %17
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 0, i32* %2
br label %17
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 1
%14 = call i32 @fact(i32 %13)
%15 = load i32, i32* %3
%16 = mul nsw i32 %14, %15
store i32 %16, i32* %2
br label %17
17: ; preds = %11, %10, %6
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @fact(i32 %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i32 [ 1, %1 ], [ %8, %6 ]
%4 = phi i32 [ %0, %1 ], [ %7, %6 ]
%5 = icmp ult i32 %4, 2
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = add nsw i32 %4, -1
%8 = mul nsw i32 %4, %3
br label %2
9: ; preds = %2
%10 = mul nuw nsw i32 %4, %3
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ KillAllSaverChildrenSigHandler(int);
void HandleSIGUSR1(int signo) { KillAllSaverChildrenSigHandler(signo); }


x86 assembly (clang, -O0):
<HandleSIGUSR1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <KillAllSaverChildrenSigHandler@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HandleSIGUSR1>:
jmp    1030 <KillAllSaverChildrenSigHandler@plt>

LLVM IR (-O0):
define void @HandleSIGUSR1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @KillAllSaverChildrenSigHandler(i32 %3)
ret void
}

LLVM IR (-O2):
define void @HandleSIGUSR1(i32 %0) {
%2 = tail call i32 @KillAllSaverChildrenSigHandler(i32 %0)
ret void
}
void gtk_event_box_get_above_child() {}


x86 assembly (clang, -O0):
<gtk_event_box_get_above_child>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_event_box_get_above_child>:
ret

LLVM IR (-O0):
define void @gtk_event_box_get_above_child() {
ret void
}

LLVM IR (-O2):
define void @gtk_event_box_get_above_child() {
ret void
}
extern int ForeignFunction() { return 42; }


x86 assembly (clang, -O0):
<ForeignFunction>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ForeignFunction>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @ForeignFunction() {
ret i32 42
}

LLVM IR (-O2):
define i32 @ForeignFunction() {
ret i32 42
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
int main(void) {
  int i;
  char *p;
  free(p);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @free(i8* undef)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ STDOUT_FILENO;
scalar_t__ isatty(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int main() {
  if (isatty(STDOUT_FILENO))
    printf("tty\n");
  else
    printf("other\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
call   1030 <isatty@plt>
cmp    $0x0,%rax
je     1158 <main+0x38>
lea    0xeb2(%rip),%rdi
call   1040 <printf@plt>
jmp    1164 <main+0x44>
lea    0xea6(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
call   1040 <isatty@plt>
test   %rax,%rax
lea    0xec7(%rip),%rax
lea    0xec6(%rip),%rdi
cmove  %rax,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@STDOUT_FILENO = global i32 0
@.str = [5 x i8] c"tty\0A\00"
@.str.1 = [7 x i8] c"other\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @STDOUT_FILENO
%3 = call i64 @isatty(i32 %2)
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %9
7: ; preds = %0
%8 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %5
ret i32 0
}

LLVM IR (-O2):
@STDOUT_FILENO = global i32 0
@str = [6 x i8] c"other\00"
@str.2 = [4 x i8] c"tty\00"
define i32 @main() {
%1 = load i32, i32* @STDOUT_FILENO
%2 = tail call i64 @isatty(i32 %1)
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @str.2, i64 0, i64 0)
%5 = tail call i32 @puts(i8* dereferenceable(1) %4)
ret i32 0
}
void ADCProcessorInjectedTrigger(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) |= 0x00200000;
}


x86 assembly (clang, -O0):
<ADCProcessorInjectedTrigger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
or     $0x200000,%rcx
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCProcessorInjectedTrigger>:
orq    $0x200000,0x8(%rdi)
ret

LLVM IR (-O0):
define void @ADCProcessorInjectedTrigger(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 8
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 2097152
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @ADCProcessorInjectedTrigger(i64 %0) {
%2 = add i64 %0, 8
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = or i64 %4, 2097152
store volatile i64 %5, i64* %3
ret void
}