xunge/DecIR huggingface dataset:
/* Variables and functions */
int generate_aleatory(int /*<<< orphan*/, int);
int sort_speedy() { return (generate_aleatory(0, 1) == 1) ? 50 : 25; }


x86 assembly (clang, -O0):
<sort_speedy>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <generate_aleatory@plt>
mov    %eax,%edx
mov    $0x19,%eax
mov    $0x32,%ecx
cmp    $0x1,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort_speedy>:
push   %rax
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <generate_aleatory@plt>
cmp    $0x1,%eax
mov    $0x32,%ecx
mov    $0x19,%eax
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sort_speedy() {
%1 = call i32 @generate_aleatory(i32 0, i32 1)
%2 = icmp eq i32 %1, 1
%3 = zext i1 %2 to i64
%4 = select i1 %2, i32 50, i32 25
ret i32 %4
}

LLVM IR (-O2):
define i32 @sort_speedy() {
%1 = tail call i32 @generate_aleatory(i32 0, i32 1)
%2 = icmp eq i32 %1, 1
%3 = select i1 %2, i32 50, i32 25
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ check_double(void *);
void *malloc(int);
void *realloc(void *, int);
void test_malloc() {
  void *p1 = malloc(sizeof(double) * 3);
  void *p2 = realloc(p1, sizeof(double) * 4);
  check_double(p2);
}


x86 assembly (clang, -O0):
<test_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x18,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x20,%esi
call   1050 <realloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <check_double@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_malloc>:
push   %rax
mov    $0x18,%edi
call   1030 <malloc@plt>
mov    %rax,%rdi
mov    $0x20,%esi
call   1050 <realloc@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <check_double@plt>

LLVM IR (-O0):
define void @test_malloc() {
%1 = alloca i8*
%2 = alloca i8*
%3 = call i8* @malloc(i32 24)
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = call i8* @realloc(i8* %4, i32 32)
store i8* %5, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @check_double(i8* %6)
ret void
}

LLVM IR (-O2):
define void @test_malloc() {
%1 = tail call dereferenceable_or_null(24) i8* @malloc(i32 24)
%2 = tail call i8* @realloc(i8* %1, i32 32)
%3 = tail call i32 @check_double(i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f(int /*<<< orphan*/);
main() {
  f(0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1030 <f@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @f(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 0)
ret i32 0
}
__attribute__((no, noclone)) void foo(int x, int *y) {
  asm volatile("" : : "r"(x), "r"(y) : "memory");
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, i32* %1) {
tail call void asm sideeffect "", "r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %0, i32* %1)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void ADCIntClear(uint32_t ui32Base, uint32_t ui32SequenceNum) {
  ASSERT((ui32Base == 0x40038000) || (ui32Base == 0x40039000));
  ASSERT(ui32SequenceNum < 4);
  (*((volatile uint32_t *)(ui32Base + 0x0000000C))) = 1 << ui32SequenceNum;
}


x86 assembly (clang, -O0):
<ADCIntClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x40038000,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     113d <ADCIntClear+0x2d>
cmpl   $0x40039000,-0x4(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
cmpl   $0x4,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0xc,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCIntClear>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40038000,%eax
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
cmp    $0x4,%ebx
setl   %dil
call   1030 <ASSERT@plt>
mov    $0x1,%eax
mov    %ebx,%ecx
shl    %cl,%eax
movslq %ebp,%rcx
mov    %eax,0xc(%rcx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @ADCIntClear(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1073971200
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1073975296
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @ASSERT(i32 %12)
%14 = load i32, i32* %4
%15 = icmp slt i32 %14, 4
%16 = zext i1 %15 to i32
%17 = call i32 @ASSERT(i32 %16)
%18 = load i32, i32* %4
%19 = shl i32 1, %18
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 12
%22 = sext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
store volatile i32 %19, i32* %23
ret void
}

LLVM IR (-O2):
define void @ADCIntClear(i32 %0, i32 %1) {
%3 = and i32 %0, -4097
%4 = icmp eq i32 %3, 1073971200
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 %5)
%7 = icmp slt i32 %1, 4
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = shl nuw i32 1, %1
%11 = add nsw i32 %0, 12
%12 = sext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 %10, i32* %13
ret void
}
/* Type definitions */
struct sockaddr_in {
  int dummy;
};

/* Variables and functions */
int init(int, char **, struct sockaddr_in *);
int start(int);
int main(int argc, char *argv[]) {
  int ret, sd;
  struct sockaddr_in server_addr;
  sd = ret = init(argc, argv, &server_addr);
  if (ret < 0) {
    return -1;
  }
  ret = start(sd);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
lea    -0x20(%rbp),%rdx
call   1040 <init@plt>
mov    %eax,-0x14(%rbp)
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    1162 <main+0x42>
movl   $0xffffffff,-0x4(%rbp)
jmp    1174 <main+0x54>
mov    -0x18(%rbp),%edi
call   1030 <start@plt>
mov    %eax,-0x14(%rbp)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %rsp,%rdx
call   1040 <init@plt>
test   %eax,%eax
js     1138 <main+0x18>
mov    %eax,%edi
call   1030 <start@plt>
xor    %eax,%eax
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca %struct.sockaddr_in
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%9 = load i32, i32* %4
%10 = load i8**, i8*** %5
%11 = call i32 @init(i32 %9, i8** %10, %struct.sockaddr_in* %8)
store i32 %11, i32* %6
store i32 %11, i32* %7
%12 = load i32, i32* %6
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %2
store i32 -1, i32* %3
br label %18
15: ; preds = %2
%16 = load i32, i32* %7
%17 = call i32 @start(i32 %16)
store i32 %17, i32* %6
store i32 0, i32* %3
br label %18
18: ; preds = %15, %14
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
define i32 @main(i32 %0, i8** %1) {
%3 = alloca %struct.sockaddr_in
%4 = bitcast %struct.sockaddr_in* %3 to i8*
%5 = call i32 @init(i32 %0, i8** %1, %struct.sockaddr_in* %3)
%6 = icmp slt i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = call i32 @start(i32 %5)
br label %9
9: ; preds = %2, %7
%10 = phi i32 [ 0, %7 ], [ -1, %2 ]
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ SSL;

/* Variables and functions */
int /*<<< orphan*/ SSL_free(int /*<<< orphan*/ *);
int SSL_get_fd(int /*<<< orphan*/ *);
int /*<<< orphan*/ close(int);
void szl_tls_close(void *priv) {
  int fd;
  fd = SSL_get_fd((SSL *)priv);
  SSL_free((SSL *)priv);
  if (fd >= 0)
    close(fd);
}


x86 assembly (clang, -O0):
<szl_tls_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <SSL_get_fd@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <SSL_free@plt>
cmpl   $0x0,-0xc(%rbp)
jl     1163 <szl_tls_close+0x33>
mov    -0xc(%rbp),%edi
call   1050 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<szl_tls_close>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <SSL_get_fd@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <SSL_free@plt>
test   %ebp,%ebp
js     1156 <szl_tls_close+0x26>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <close@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @szl_tls_close(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = call i32 @SSL_get_fd(i32* %5)
store i32 %6, i32* %3
%7 = load i8*, i8** %2
%8 = bitcast i8* %7 to i32*
%9 = call i32 @SSL_free(i32* %8)
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %1
%13 = load i32, i32* %3
%14 = call i32 @close(i32 %13)
br label %15
15: ; preds = %12, %1
ret void
}

LLVM IR (-O2):
define void @szl_tls_close(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @SSL_get_fd(i32* %2)
%4 = tail call i32 @SSL_free(i32* %2)
%5 = icmp sgt i32 %3, -1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 @close(i32 %3)
br label %8
8: ; preds = %6, %1
ret void
}
void disable_l1_icache(void) {}


x86 assembly (clang, -O0):
<disable_l1_icache>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_l1_icache>:
ret

LLVM IR (-O0):
define void @disable_l1_icache() {
ret void
}

LLVM IR (-O2):
define void @disable_l1_icache() {
ret void
}
void __attribute__((weak)) dma1_stream6_isr() { debug_handler(__FUNCTION__); }


x86 assembly (clang, -O0):
<dma1_stream6_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dma1_stream6_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.dma1_stream6_isr = [17 x i8] c"dma1_stream6_isr\00"
define weak void @dma1_stream6_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__FUNCTION__.dma1_stream6_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.dma1_stream6_isr = [17 x i8] c"dma1_stream6_isr\00"
define weak void @dma1_stream6_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__FUNCTION__.dma1_stream6_isr, i64 0, i64 0))
ret void
}
/* Variables and functions */
int ModifierInformationsConfig(char *, char *);
int /*<<< orphan*/ printf(char *);
void testModifierInformationsConfig() {
  char *parametreAMettreAJour;
  char *valeurAMettreAJour;
  int result =
      ModifierInformationsConfig(parametreAMettreAJour, valeurAMettreAJour);
  if (1) {
    printf("%%TEST_FAILED%% time=0 testname=testModifierInformationsConfig "
           "(Test_gestioncommandes) message=error message sample\n");
  }
}


x86 assembly (clang, -O0):
<testModifierInformationsConfig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <ModifierInformationsConfig@plt>
mov    %eax,-0x14(%rbp)
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testModifierInformationsConfig>:
push   %rax
call   1040 <ModifierInformationsConfig@plt>
lea    0xed3(%rip),%rdi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [117 x i8] c"%%TEST_FAILED%% time=0 testname=testModifierInformationsConfig (Test_gestioncommandes) message=error message sample\0A\00"
define void @testModifierInformationsConfig() {
%1 = alloca i8*
%2 = alloca i8*
%3 = alloca i32
%4 = load i8*, i8** %1
%5 = load i8*, i8** %2
%6 = call i32 @ModifierInformationsConfig(i8* %4, i8* %5)
store i32 %6, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([117 x i8], [117 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [117 x i8] c"%%TEST_FAILED%% time=0 testname=testModifierInformationsConfig (Test_gestioncommandes) message=error message sample\0A\00"
define void @testModifierInformationsConfig() {
%1 = tail call i32 @ModifierInformationsConfig(i8* undef, i8* undef)
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([117 x i8], [117 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
long __arch_fetch_and_add(void *, long);
long int fetch_and_add(void *pointer, long int delta) {
  return __arch_fetch_and_add(pointer, delta);
}


x86 assembly (clang, -O0):
<fetch_and_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__arch_fetch_and_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetch_and_add>:
jmp    1030 <__arch_fetch_and_add@plt>

LLVM IR (-O0):
define i64 @fetch_and_add(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i64 @__arch_fetch_and_add(i8* %5, i64 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @fetch_and_add(i8* %0, i64 %1) {
%3 = tail call i64 @__arch_fetch_and_add(i8* %0, i64 %1)
ret i64 %3
}
unsigned short redValue(unsigned short c) { return (c >> 11) << 3; }


x86 assembly (clang, -O0):
<redValue>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0xb,%eax
shl    $0x3,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<redValue>:
mov    %edi,%eax
shr    $0x8,%eax
and    $0xfffffff8,%eax
ret

LLVM IR (-O0):
define zeroext i16 @redValue(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = ashr i32 %4, 11
%6 = shl i32 %5, 3
%7 = trunc i32 %6 to i16
ret i16 %7
}

LLVM IR (-O2):
define zeroext i16 @redValue(i16 zeroext %0) {
%2 = lshr i16 %0, 8
%3 = and i16 %2, 248
ret i16 %3
}
int keyboard_wait_for_key(void) {
  int key;
  while ((key = circular_queue_pop()) < 0) {
    asm("hlt");
  }
  return key;
}


x86 assembly (clang, -O0):
<keyboard_wait_for_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <circular_queue_pop@plt>
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jge    1131 <keyboard_wait_for_key+0x21>
hlt
jmp    1118 <keyboard_wait_for_key+0x8>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<keyboard_wait_for_key>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <circular_queue_pop@plt>
test   %eax,%eax
jns    112e <keyboard_wait_for_key+0x1e>
hlt
jmp    1120 <keyboard_wait_for_key+0x10>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @keyboard_wait_for_key() {
%1 = alloca i32
br label %2
2: ; preds = %5, %0
%3 = call i32 (...) @circular_queue_pop()
store i32 %3, i32* %1
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %2
br label %2
6: ; preds = %2
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @keyboard_wait_for_key() {
%1 = tail call i32 (...) @circular_queue_pop()
%2 = icmp slt i32 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0, %3
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
%4 = tail call i32 (...) @circular_queue_pop()
%5 = icmp slt i32 %4, 0
br i1 %5, label %3, label %6
6: ; preds = %3, %0
%7 = phi i32 [ %1, %0 ], [ %4, %3 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int, float, float, float);
int main(void) {
  int i, j, k;
  float a, b, c;
  printf("%d %d %d %f %f %f", i, j, k, a, b, c);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
movss  -0x10(%rbp),%xmm0
movss  -0x14(%rbp),%xmm1
movss  -0x18(%rbp),%xmm2
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"%d %d %d %f %f %f\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = load float, float* %4
%11 = load float, float* %5
%12 = load float, float* %6
%13 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8, i32 %9, float %10, float %11, float %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"%d %d %d %f %f %f\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 undef, i32 undef, i32 undef, float undef, float undef, float undef)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "%s",
          "Usage: ibquery NAME [OPTIONS]\n"
          "    -v,--verbose set verbose flag\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
lea    0xec8(%rip),%rdx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
lea    0xecb(%rip),%rdx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
@.str.1 = [65 x i8] c"Usage: ibquery NAME [OPTIONS]\0A -v,--verbose set verbose flag\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
@.str.1 = [65 x i8] c"Usage: ibquery NAME [OPTIONS]\0A -v,--verbose set verbose flag\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([65 x i8], [65 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
struct net_device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dev_put(struct net_device *);
void pfq_dev_put(struct net_device *dev) { dev_put(dev); }


x86 assembly (clang, -O0):
<pfq_dev_put>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dev_put@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pfq_dev_put>:
jmp    1030 <dev_put@plt>

LLVM IR (-O0):
%struct.net_device = type { i32 }
define void @pfq_dev_put(%struct.net_device* %0) {
%2 = alloca %struct.net_device*
store %struct.net_device* %0, %struct.net_device** %2
%3 = load %struct.net_device*, %struct.net_device** %2
%4 = call i32 @dev_put(%struct.net_device* %3)
ret void
}

LLVM IR (-O2):
%struct.net_device = type { i32 }
define void @pfq_dev_put(%struct.net_device* %0) {
%2 = tail call i32 @dev_put(%struct.net_device* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ log_backtrace(int /*<<< orphan*/ *);
void my_func(FILE *log) { log_backtrace(log); }


x86 assembly (clang, -O0):
<my_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <log_backtrace@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_func>:
jmp    1030 <log_backtrace@plt>

LLVM IR (-O0):
define void @my_func(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @log_backtrace(i32* %3)
ret void
}

LLVM IR (-O2):
define void @my_func(i32* %0) {
%2 = tail call i32 @log_backtrace(i32* %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  short x;
};
typedef TYPE_1__ XRectangle;

/* Variables and functions */
void set_XRectangle_x(void *_p, short _v) { ((XRectangle *)_p)->x = (short)_v; }


x86 assembly (clang, -O0):
<set_XRectangle_x>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    -0x8(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XRectangle_x>:
mov    %si,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i16 }
define void @set_XRectangle_x(i8* %0, i16 signext %1) {
%3 = alloca i8*
%4 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i16 %5, i16* %8
ret void
}

LLVM IR (-O2):
define void @set_XRectangle_x(i8* nocapture writeonly %0, i16 signext %1) {
%3 = bitcast i8* %0 to i16*
store i16 %1, i16* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalnum(int);
void t_isalnum_0x6d() {
  Assert_real((isalnum(109)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              550, ("isalnum should be 1 for m"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x6d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6d,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x226,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x6d>:
push   %rax
mov    $0x6d,%edi
call   1030 <isalnum@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x226,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for m\00"
define void @t_isalnum_0x6d() {
%1 = call i32 @isalnum(i32 109)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 550, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for m\00"
define void @t_isalnum_0x6d() {
%1 = tail call i32 @isalnum(i32 109)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 550, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int chrcmp(const void *c1, const void *c2) { return *(char *)c1 - *(char *)c2; }


x86 assembly (clang, -O0):
<chrcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<chrcmp>:
movsbl (%rdi),%eax
movsbl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @chrcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @chrcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = sext i8 %3 to i32
%5 = load i8, i8* %1
%6 = sext i8 %5 to i32
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void ClearScreen() { printf("\033[2J"); }


x86 assembly (clang, -O0):
<ClearScreen>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClearScreen>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"\1B[2J\00"
define void @ClearScreen() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"\1B[2J\00"
define void @ClearScreen() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct completion {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __wait_completion(struct completion *);
long wait_for_completion_interruptible_timeout(struct completion *work,
                                               unsigned long timeout) {
  __wait_completion(work);
  return 1;
}


x86 assembly (clang, -O0):
<wait_for_completion_interruptible_timeout>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__wait_completion@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_for_completion_interruptible_timeout>:
push   %rax
call   1030 <__wait_completion@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.completion = type { i32 }
define i64 @wait_for_completion_interruptible_timeout(%struct.completion* %0, i64 %1) {
%3 = alloca %struct.completion*
%4 = alloca i64
store %struct.completion* %0, %struct.completion** %3
store i64 %1, i64* %4
%5 = load %struct.completion*, %struct.completion** %3
%6 = call i32 @__wait_completion(%struct.completion* %5)
ret i64 1
}

LLVM IR (-O2):
%struct.completion = type { i32 }
define i64 @wait_for_completion_interruptible_timeout(%struct.completion* %0, i64 %1) {
%3 = tail call i32 @__wait_completion(%struct.completion* %0)
ret i64 1
}
int sum(int x, int y) {
  int sumresult = x + y;
  return sumresult;
}


x86 assembly (clang, -O0):
<sum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @sum(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @sum(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
void test_four(int x, int y) {
#pragma omp target teams distribute parallel for collapse(2)
  for (int i = 0; i < x; i++)
    for (int i = 0; i < y; i++)
      ;
}


x86 assembly (clang, -O0):
<test_four>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1156 <test_four+0x56>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1143 <test_four+0x43>
jmp    1135 <test_four+0x35>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1124 <test_four+0x24>
jmp    1148 <test_four+0x48>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1111 <test_four+0x11>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_four>:
ret

LLVM IR (-O0):
define void @test_four(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %7
7: ; preds = %21, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %7
store i32 0, i32* %6
br label %12
12: ; preds = %17, %11
%13 = load i32, i32* %6
%14 = load i32, i32* %4
%15 = icmp slt i32 %13, %14
br i1 %15, label %16, label %20
16: ; preds = %12
br label %17
17: ; preds = %16
%18 = load i32, i32* %6
%19 = add nsw i32 %18, 1
store i32 %19, i32* %6
br label %12
20: ; preds = %12
br label %21
21: ; preds = %20
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %7
24: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @test_four(i32 %0, i32 %1) {
ret void
}
void createTree() {}


x86 assembly (clang, -O0):
<createTree>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<createTree>:
ret

LLVM IR (-O0):
define void @createTree() {
ret void
}

LLVM IR (-O2):
define void @createTree() {
ret void
}
int message_decompress(struct message *m) { return 0; }


x86 assembly (clang, -O0):
<message_decompress>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<message_decompress>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.message = type opaque
define i32 @message_decompress(%struct.message* %0) {
%2 = alloca %struct.message*
store %struct.message* %0, %struct.message** %2
ret i32 0
}

LLVM IR (-O2):
%struct.message = type opaque
define i32 @message_decompress(%struct.message* nocapture readnone %0) {
ret i32 0
}
int test_imm_7Fint16_reg(short val) {
  return ((val) & (0x7F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Fint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x7f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Fint16_reg>:
test   $0x7f,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Fint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 127
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Fint16_reg(i16 signext %0) {
%2 = and i16 %0, 127
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
unsigned xrop3_46_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = D ^ T;
  stk2 = S | stk3;
  stk1 = T ^ stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_46_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_46_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
mov    %ecx,%edx
xor    $0xff,%edx
or     %eax,%edx
xor    %ecx,%edx
not    %eax
and    %edx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_46_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = load i32, i32* %7
%25 = xor i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %6
%27 = load i32, i32* %10
%28 = or i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %7
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = load i32, i32* %6
%34 = xor i32 %33, -1
%35 = and i32 %32, %34
%36 = load i32, i32* %5
%37 = load i32, i32* %6
%38 = and i32 %36, %37
%39 = or i32 %35, %38
ret i32 %39
}

LLVM IR (-O2):
define i32 @xrop3_46_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %6, 255
%8 = or i32 %7, %4
%9 = xor i32 %8, %6
%10 = xor i32 %4, -1
%11 = and i32 %9, %10
%12 = or i32 %11, %3
ret i32 %12
}
void rop3_134_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  unsigned char stk4;
  stk4 = *D | S;
  stk3 = T & stk4;
  stk2 = S ^ stk3;
  stk1 = *D ^ stk2;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_134_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xe(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xe(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xd(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_134_0_0>:
mov    (%rdi),%al
mov    %eax,%ecx
or     %sil,%cl
and    %dl,%cl
xor    %sil,%al
xor    %cl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_134_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = load i8, i8* %5
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
%17 = trunc i32 %16 to i8
store i8 %17, i8* %10
%18 = load i8, i8* %6
%19 = zext i8 %18 to i32
%20 = load i8, i8* %10
%21 = zext i8 %20 to i32
%22 = and i32 %19, %21
%23 = trunc i32 %22 to i8
store i8 %23, i8* %9
%24 = load i8, i8* %5
%25 = zext i8 %24 to i32
%26 = load i8, i8* %9
%27 = zext i8 %26 to i32
%28 = xor i32 %25, %27
%29 = trunc i32 %28 to i8
store i8 %29, i8* %8
%30 = load i8*, i8** %4
%31 = load i8, i8* %30
%32 = zext i8 %31 to i32
%33 = load i8, i8* %8
%34 = zext i8 %33 to i32
%35 = xor i32 %32, %34
%36 = trunc i32 %35 to i8
store i8 %36, i8* %7
%37 = load i8, i8* %7
%38 = load i8*, i8** %4
store i8 %37, i8* %38
ret void
}

LLVM IR (-O2):
define void @rop3_134_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %4, %1
%6 = and i8 %5, %2
%7 = xor i8 %4, %1
%8 = xor i8 %7, %6
store i8 %8, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ quickSortInternal(int *, int /*<<< orphan*/, int);
void quickSort(int data[], int size) { quickSortInternal(data, 0, size); }


x86 assembly (clang, -O0):
<quickSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <quickSortInternal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickSort>:
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <quickSortInternal@plt>

LLVM IR (-O0):
define void @quickSort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @quickSortInternal(i32* %5, i32 0, i32 %6)
ret void
}

LLVM IR (-O2):
define void @quickSort(i32* %0, i32 %1) {
%3 = tail call i32 @quickSortInternal(i32* %0, i32 0, i32 %1)
ret void
}
int isbadchar(char p) {
  return (p < 65) || (p > 90 && p < 97) || (p > 122 && p < 128);
}


x86 assembly (clang, -O0):
<isbadchar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x41,%ecx
mov    %al,-0x2(%rbp)
jl     1162 <isbadchar+0x62>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
jle    113b <isbadchar+0x3b>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x61,%ecx
mov    %al,-0x2(%rbp)
jl     1162 <isbadchar+0x62>
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x7a,%ecx
mov    %al,-0x3(%rbp)
jle    115c <isbadchar+0x5c>
movsbl -0x1(%rbp),%eax
cmp    $0x80,%eax
setl   %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isbadchar>:
lea    -0x5b(%rdi),%eax
cmp    $0x6,%al
setb   %al
add    $0x85,%dil
cmp    $0xc6,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isbadchar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp slt i32 %4, 65
br i1 %5, label %24, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sgt i32 %8, 90
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp slt i32 %12, 97
br i1 %13, label %24, label %14
14: ; preds = %10, %6
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sgt i32 %16, 122
br i1 %17, label %18, label %22
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp slt i32 %20, 128
br label %22
22: ; preds = %18, %14
%23 = phi i1 [ false, %14 ], [ %21, %18 ]
br label %24
24: ; preds = %22, %10, %1
%25 = phi i1 [ true, %10 ], [ true, %1 ], [ %23, %22 ]
%26 = zext i1 %25 to i32
ret i32 %26
}

LLVM IR (-O2):
define i32 @isbadchar(i8 signext %0) {
%2 = add i8 %0, -91
%3 = icmp ult i8 %2, 6
%4 = add i8 %0, -123
%5 = icmp ult i8 %4, -58
%6 = or i1 %5, %3
%7 = zext i1 %6 to i32
ret i32 %7
}
void gfx_outw(unsigned short port, unsigned short data) {}


x86 assembly (clang, -O0):
<gfx_outw>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_outw>:
ret

LLVM IR (-O0):
define void @gfx_outw(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
ret void
}

LLVM IR (-O2):
define void @gfx_outw(i16 zeroext %0, i16 zeroext %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
size_t int32PackSize(const int32_t *data) { return sizeof(*data); }


x86 assembly (clang, -O0):
<int32PackSize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int32PackSize>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i64 @int32PackSize(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i64 4
}

LLVM IR (-O2):
define i64 @int32PackSize(i32* nocapture readnone %0) {
ret i64 4
}
__attribute__((no, noclone)) unsigned __int128 t105_1mul(unsigned char x,
                                                         signed char y) {
  unsigned __int128 r;
  if (__builtin_mul_overflow(x, y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t105_1mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x11(%rbp)
mov    %al,-0x12(%rbp)
movzbl -0x11(%rbp),%eax
mov    %rax,-0x48(%rbp)
movsbq -0x12(%rbp),%rdx
mov    %rdx,%rcx
sar    $0x3f,%rcx
mov    %eax,%edi
mov    %ecx,%esi
imul   %edi,%esi
mov    %esi,-0x3c(%rbp)
mul    %rdx
mov    %rax,%rsi
mov    -0x48(%rbp),%rax
mov    %rsi,-0x38(%rbp)
mov    %rdx,%rdi
mul    %rcx
mov    %rax,%rcx
mov    -0x3c(%rbp),%eax
mov    %rdx,%rsi
mov    -0x38(%rbp),%rdx
add    %rdi,%rcx
adc    %sil,%al
and    $0x1,%al
mov    %rdx,-0x30(%rbp)
mov    %rcx,-0x28(%rbp)
test   $0x1,%al
jne    1180 <t105_1mul+0x70>
jmp    1187 <t105_1mul+0x77>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x30(%rbp),%rax
mov    -0x28(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t105_1mul>:
push   %r15
push   %r14
push   %rbx
mov    %edi,%r9d
movslq %esi,%rcx
mov    %rcx,%rax
sar    $0x3f,%rax
mov    %eax,%ebx
mul    %r9
mov    %rax,%r8
mov    %rdx,%rsi
imul   %edi,%ebx
mov    %rcx,%rax
mul    %r9
mov    %rax,%r14
mov    %rdx,%r15
add    %r8,%r15
adc    %ebx,%esi
and    $0x1,%esi
neg    %rsi
jns    1150 <t105_1mul+0x40>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %r14,%rax
mov    %r15,%rdx
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define { i64, i64 } @t105_1mul(i8 zeroext %0, i8 signext %1) {
%3 = alloca i128
%4 = alloca i8
%5 = alloca i8
%6 = alloca i128
store i8 %0, i8* %4
store i8 %1, i8* %5
%7 = load i8, i8* %4
%8 = load i8, i8* %5
%9 = zext i8 %7 to i129
%10 = sext i8 %8 to i129
%11 = call { i129, i1 } @llvm.smul.with.overflow.i129(i129 %9, i129 %10)
%12 = extractvalue { i129, i1 } %11, 1
%13 = extractvalue { i129, i1 } %11, 0
%14 = trunc i129 %13 to i128
%15 = zext i128 %14 to i129
%16 = icmp ne i129 %13, %15
%17 = or i1 %12, %16
store i128 %14, i128* %6
br i1 %17, label %18, label %20
18: ; preds = %2
%19 = call i32 (...) @bar()
br label %20
20: ; preds = %18, %2
%21 = load i128, i128* %6
store i128 %21, i128* %3
%22 = bitcast i128* %3 to { i64, i64 }*
%23 = load { i64, i64 }, { i64, i64 }* %22
ret { i64, i64 } %23
}

LLVM IR (-O2):
define { i64, i64 } @t105_1mul(i8 zeroext %0, i8 signext %1) {
%3 = zext i8 %0 to i129
%4 = sext i8 %1 to i129
%5 = mul nsw i129 %4, %3
%6 = icmp slt i129 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = tail call i32 (...) @bar()
br label %9
9: ; preds = %7, %2
%10 = trunc i129 %5 to i64
%11 = lshr i129 %5, 64
%12 = trunc i129 %11 to i64
%13 = insertvalue { i64, i64 } poison, i64 %10, 0
%14 = insertvalue { i64, i64 } %13, i64 %12, 1
ret { i64, i64 } %14
}
void vkbcRefresh() {}


x86 assembly (clang, -O0):
<vkbcRefresh>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vkbcRefresh>:
ret

LLVM IR (-O0):
define void @vkbcRefresh() {
ret void
}

LLVM IR (-O2):
define void @vkbcRefresh() {
ret void
}
long gethostid() { return 0; }


x86 assembly (clang, -O0):
<gethostid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gethostid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @gethostid() {
ret i64 0
}

LLVM IR (-O2):
define i64 @gethostid() {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int sub(int, int, int);
int main(void) {
  int a, b;
  scanf("%d%d", &a, &b);
  printf("%d\n", sub(1000, a, b));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    $0x3e8,%edi
call   1050 <sub@plt>
mov    %eax,%esi
lea    0xe99(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
mov    (%rsp),%edx
mov    $0x3e8,%edi
call   1050 <sub@plt>
lea    0xea8(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%d%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3)
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = call i32 @sub(i32 1000, i32 %5, i32 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%d%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = call i32 @sub(i32 1000, i32 %6, i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
foobyval_2dd80(ii_2ddc0) long ii_2ddc0;
{
  if ((int)(ii_2ddc0 > (long)0)) {
    foobyval_2dd80((long)(ii_2ddc0 - ({
                            long ONE_2dc40_rval;
                            {
                              b_outstr((long)(long)1, (char *)(char *)"ONE ");
                              ONE_2dc40_rval = (long)1;
                            };
                            ONE_2dc40_rval;
                          })));
  } else {
    ;
  }
}


x86 assembly (clang, -O0):
<foobyval_2dd80>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jle    1174 <foobyval_2dd80+0x54>
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    $0x1,%edi
lea    0xeb5(%rip),%rsi
mov    $0x0,%al
call   1030 <b_outstr@plt>
mov    -0x28(%rbp),%rdi
movq   $0x1,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
sub    -0x20(%rbp),%rdi
call   1040 <foobyval_2dd80@plt>
jmp    1179 <foobyval_2dd80+0x59>
jmp    1179 <foobyval_2dd80+0x59>
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foobyval_2dd80>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
jle    1149 <foobyval_2dd80+0x39>
mov    %rdi,%rbx
add    $0x1,%rbx
lea    0xed9(%rip),%r14
nopw   0x0(%rax,%rax,1)
mov    $0x1,%edi
mov    %r14,%rsi
xor    %eax,%eax
call   1030 <b_outstr@plt>
add    $0xffffffffffffffff,%rbx
cmp    $0x1,%rbx
ja     1130 <foobyval_2dd80+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [5 x i8] c"ONE \00"
define i32 @foobyval_2dd80(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
%6 = load i64, i64* %3
%7 = icmp sgt i64 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %1
%9 = load i64, i64* %3
%10 = call i32 (i64, i8*, ...) bitcast (i32 (...)* @b_outstr to i32 (i64, i8*, ...)*)(i64 1, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
store i64 1, i64* %4
%11 = load i64, i64* %4
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = sub nsw i64 %9, %12
%14 = call i32 @foobyval_2dd80(i64 %13)
br label %16
15: ; preds = %1
br label %16
16: ; preds = %15, %8
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@.str = [5 x i8] c"ONE \00"
define i32 @foobyval_2dd80(i64 %0) {
%2 = icmp sgt i64 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i64 [ %6, %3 ], [ %0, %1 ]
%5 = tail call i32 (i64, i8*, ...) bitcast (i32 (...)* @b_outstr to i32 (i64, i8*, ...)*)(i64 1, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%6 = add nsw i64 %4, -1
%7 = icmp ugt i64 %4, 1
br i1 %7, label %3, label %8
8: ; preds = %3, %1
ret i32 undef
}