unsigned char BSP_UART_ReceiveByte(unsigned int port) {
  unsigned char res = 0x00;
  if (port == 0) {
    while (!((*(volatile unsigned *)0X50000010) & 0X01))
      ;
    res = (*(volatile unsigned char *)0X50000024);
  } else if (port == 1) {
    while (!((*(volatile unsigned *)0X50004010) & 0X01))
      ;
    res = (*(volatile unsigned char *)0X50004024);
  } else {
    while (!((*(volatile unsigned *)0X50008010) & 0X01))
      ;
    res = (*(volatile unsigned char *)0X50008024);
  }
  return res;
}


x86 assembly (clang, -O0):
<BSP_UART_ReceiveByte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movb   $0x0,-0x5(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    114d <BSP_UART_ReceiveByte+0x4d>
jmp    111a <BSP_UART_ReceiveByte+0x1a>
mov    $0x50000010,%eax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1139 <BSP_UART_ReceiveByte+0x39>
jmp    113e <BSP_UART_ReceiveByte+0x3e>
jmp    111a <BSP_UART_ReceiveByte+0x1a>
mov    $0x50000024,%eax
mov    (%rax),%al
mov    %al,-0x5(%rbp)
jmp    11c7 <BSP_UART_ReceiveByte+0xc7>
cmpl   $0x1,-0x4(%rbp)
jne    118f <BSP_UART_ReceiveByte+0x8f>
jmp    115c <BSP_UART_ReceiveByte+0x5c>
mov    $0x50004010,%eax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    117b <BSP_UART_ReceiveByte+0x7b>
jmp    1180 <BSP_UART_ReceiveByte+0x80>
jmp    115c <BSP_UART_ReceiveByte+0x5c>
mov    $0x50004024,%eax
mov    (%rax),%al
mov    %al,-0x5(%rbp)
jmp    11c2 <BSP_UART_ReceiveByte+0xc2>
jmp    1194 <BSP_UART_ReceiveByte+0x94>
mov    $0x50008010,%eax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    11b3 <BSP_UART_ReceiveByte+0xb3>
jmp    11b8 <BSP_UART_ReceiveByte+0xb8>
jmp    1194 <BSP_UART_ReceiveByte+0x94>
mov    $0x50008024,%eax
mov    (%rax),%al
mov    %al,-0x5(%rbp)
jmp    11c7 <BSP_UART_ReceiveByte+0xc7>
movzbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<BSP_UART_ReceiveByte>:
test   %edi,%edi
je     1130 <BSP_UART_ReceiveByte+0x30>
cmp    $0x1,%edi
jne    1150 <BSP_UART_ReceiveByte+0x50>
nopl   0x0(%rax)
testl  $0x1,0x50004010
je     1110 <BSP_UART_ReceiveByte+0x10>
mov    $0x50004024,%eax
mov    (%rax),%al
ret
cs nopw 0x0(%rax,%rax,1)
nop
testl  $0x1,0x50000010
je     1130 <BSP_UART_ReceiveByte+0x30>
mov    $0x50000024,%eax
mov    (%rax),%al
ret
cs nopw 0x0(%rax,%rax,1)
nop
testl  $0x1,0x50008010
je     1150 <BSP_UART_ReceiveByte+0x50>
mov    $0x50008024,%eax
mov    (%rax),%al
ret

LLVM IR (-O0):
define zeroext i8 @BSP_UART_ReceiveByte(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
store i8 0, i8* %3
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %15
6: ; preds = %1
br label %7
7: ; preds = %12, %6
%8 = load volatile i32, i32* inttoptr (i64 1342177296 to i32*)
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
br i1 %11, label %12, label %13
12: ; preds = %7
br label %7
13: ; preds = %7
%14 = load volatile i8, i8* inttoptr (i64 1342177316 to i8*)
store i8 %14, i8* %3
br label %37
15: ; preds = %1
%16 = load i32, i32* %2
%17 = icmp eq i32 %16, 1
br i1 %17, label %18, label %27
18: ; preds = %15
br label %19
19: ; preds = %24, %18
%20 = load volatile i32, i32* inttoptr (i64 1342193680 to i32*)
%21 = and i32 %20, 1
%22 = icmp ne i32 %21, 0
%23 = xor i1 %22, true
br i1 %23, label %24, label %25
24: ; preds = %19
br label %19
25: ; preds = %19
%26 = load volatile i8, i8* inttoptr (i64 1342193700 to i8*)
store i8 %26, i8* %3
br label %36
27: ; preds = %15
br label %28
28: ; preds = %33, %27
%29 = load volatile i32, i32* inttoptr (i64 1342210064 to i32*)
%30 = and i32 %29, 1
%31 = icmp ne i32 %30, 0
%32 = xor i1 %31, true
br i1 %32, label %33, label %34
33: ; preds = %28
br label %28
34: ; preds = %28
%35 = load volatile i8, i8* inttoptr (i64 1342210084 to i8*)
store i8 %35, i8* %3
br label %36
36: ; preds = %34, %25
br label %37
37: ; preds = %36, %13
%38 = load i8, i8* %3
ret i8 %38
}

LLVM IR (-O2):
define zeroext i8 @BSP_UART_ReceiveByte(i32 %0) {
switch i32 %0, label %10 [
i32 0, label %2
i32 1, label %6
]
2: ; preds = %1, %2
%3 = load volatile i32, i32* inttoptr (i64 1342177296 to i32*)
%4 = and i32 %3, 1
%5 = icmp eq i32 %4, 0
br i1 %5, label %2, label %14
6: ; preds = %1, %6
%7 = load volatile i32, i32* inttoptr (i64 1342193680 to i32*)
%8 = and i32 %7, 1
%9 = icmp eq i32 %8, 0
br i1 %9, label %6, label %14
10: ; preds = %1, %10
%11 = load volatile i32, i32* inttoptr (i64 1342210064 to i32*)
%12 = and i32 %11, 1
%13 = icmp eq i32 %12, 0
br i1 %13, label %10, label %14
14: ; preds = %6, %2, %10
%15 = phi i8* [ inttoptr (i64 1342210084 to i8*), %10 ], [ inttoptr (i64 1342177316 to i8*), %2 ], [ inttoptr (i64 1342193700 to i8*), %6 ]
%16 = load volatile i8, i8* %15
ret i8 %16
}