xunge/DecIR huggingface dataset:
int CIRC_CNT_TO_END(int head, int tail, int size) {
  int end = (size) - (tail);
  int n = ((head) + end) & ((size)-1);
  return n < end ? n : end;
}


x86 assembly (clang, -O0):
<CIRC_CNT_TO_END>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    113e <CIRC_CNT_TO_END+0x3e>
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    1144 <CIRC_CNT_TO_END+0x44>
mov    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CIRC_CNT_TO_END>:
lea    -0x1(%rdx),%eax
sub    %esi,%edx
lea    (%rdi,%rdx,1),%ecx
and    %ecx,%eax
cmp    %edx,%eax
cmovge %edx,%eax
ret

LLVM IR (-O0):
define i32 @CIRC_CNT_TO_END(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %6
%10 = load i32, i32* %5
%11 = sub nsw i32 %9, %10
store i32 %11, i32* %7
%12 = load i32, i32* %4
%13 = load i32, i32* %7
%14 = add nsw i32 %12, %13
%15 = load i32, i32* %6
%16 = sub nsw i32 %15, 1
%17 = and i32 %14, %16
store i32 %17, i32* %8
%18 = load i32, i32* %8
%19 = load i32, i32* %7
%20 = icmp slt i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %3
%22 = load i32, i32* %8
br label %25
23: ; preds = %3
%24 = load i32, i32* %7
br label %25
25: ; preds = %23, %21
%26 = phi i32 [ %22, %21 ], [ %24, %23 ]
ret i32 %26
}

LLVM IR (-O2):
define i32 @CIRC_CNT_TO_END(i32 %0, i32 %1, i32 %2) {
%4 = sub nsw i32 %2, %1
%5 = add nsw i32 %4, %0
%6 = add nsw i32 %2, -1
%7 = and i32 %5, %6
%8 = icmp slt i32 %7, %4
%9 = select i1 %8, i32 %7, i32 %4
ret i32 %9
}
/* Variables and functions */
int get_mixer_value();
int /*<<< orphan*/ iface_set_mixer_value(int);
void update_mixer_value() {
  int val;
  val = get_mixer_value();
  iface_set_mixer_value((val) > (0) ? (val) : (0));
}


x86 assembly (clang, -O0):
<update_mixer_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <get_mixer_value@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1147 <update_mixer_value+0x27>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1151 <update_mixer_value+0x31>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    1151 <update_mixer_value+0x31>
mov    -0x8(%rbp),%edi
call   1030 <iface_set_mixer_value@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_mixer_value>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <get_mixer_value@plt>
test   %eax,%eax
cmovns %eax,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <iface_set_mixer_value@plt>

LLVM IR (-O0):
define void @update_mixer_value() {
%1 = alloca i32
%2 = call i32 (...) @get_mixer_value()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = load i32, i32* %1
br label %8
7: ; preds = %0
br label %8
8: ; preds = %7, %5
%9 = phi i32 [ %6, %5 ], [ 0, %7 ]
%10 = call i32 @iface_set_mixer_value(i32 %9)
ret void
}

LLVM IR (-O2):
define void @update_mixer_value() {
%1 = tail call i32 (...) @get_mixer_value()
%2 = icmp sgt i32 %1, 0
%3 = select i1 %2, i32 %1, i32 0
%4 = tail call i32 @iface_set_mixer_value(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("Hello, world\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello, world\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"Hello, world\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
scalar_t__ COND_CC();
int /*<<< orphan*/ EA_A7_PD_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_scc_8_pd7(void) {
  m68ki_write_8(EA_A7_PD_8(), COND_CC() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_scc_8_pd7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_A7_PD_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_CC@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_scc_8_pd7>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_A7_PD_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_CC@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_scc_8_pd7() {
%1 = call i32 (...) @EA_A7_PD_8()
%2 = call i64 (...) @COND_CC()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_scc_8_pd7() {
%1 = tail call i32 (...) @EA_A7_PD_8()
%2 = tail call i64 (...) @COND_CC()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, int);
void io_delay() { outb(0x80, 0xFF); }


x86 assembly (clang, -O0):
<io_delay>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80,%edi
mov    $0xff,%esi
call   1030 <outb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_delay>:
mov    $0x80,%edi
mov    $0xff,%esi
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @io_delay() {
%1 = call i32 @outb(i32 128, i32 255)
ret void
}

LLVM IR (-O2):
define void @io_delay() {
%1 = tail call i32 @outb(i32 128, i32 255)
ret void
}
/* Variables and functions */
double M_PI;
double E_RadiansToDegrees(double input) { return (input / M_PI * 180); }


x86 assembly (clang, -O0):
<E_RadiansToDegrees>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    0x2ed3(%rip),%rax
divsd  (%rax),%xmm0
movsd  0xedf(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<E_RadiansToDegrees>:
mov    0x2ee1(%rip),%rax
divsd  (%rax),%xmm0
mulsd  0xeed(%rip),%xmm0
ret

LLVM IR (-O0):
@M_PI = global double 0.000000e+00
define double @E_RadiansToDegrees(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* @M_PI
%5 = fdiv double %3, %4
%6 = fmul double %5, 1.800000e+02
ret double %6
}

LLVM IR (-O2):
@M_PI = global double 0.000000e+00
define double @E_RadiansToDegrees(double %0) {
%2 = load double, double* @M_PI
%3 = fdiv double %0, %2
%4 = fmul double %3, 1.800000e+02
ret double %4
}
/* Type definitions */
typedef int /*<<< orphan*/ data;

/* Variables and functions */
int /*<<< orphan*/ findTwoNonRepeatElements(int *, int, int *, int *);
int /*<<< orphan*/ printArray(int *, int);
int main(void) {
  int data[] = {2, 3, 7, 9, 11, 2, 3, 11};
  int size = sizeof(data) / sizeof(data[0]);
  int x = 0;
  int y = 0;
  printArray(data, size);
  findTwoNonRepeatElements(data, size, &x, &y);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xece(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecb(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xec8(%rip),%rax
mov    %rax,-0x8(%rbp)
movl   $0x8,-0x24(%rbp)
movl   $0x0,-0x28(%rbp)
movl   $0x0,-0x2c(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
call   1040 <printArray@plt>
lea    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
lea    -0x28(%rbp),%rdx
lea    -0x2c(%rbp),%rcx
call   1030 <findTwoNonRepeatElements@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
movaps 0xee4(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xec8(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movl   $0x0,0xc(%rsp)
movl   $0x0,0x8(%rsp)
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x8,%esi
call   1040 <printArray@plt>
lea    0xc(%rsp),%rdx
lea    0x8(%rsp),%rcx
mov    %rbx,%rdi
mov    $0x8,%esi
call   1030 <findTwoNonRepeatElements@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.data = [8 x i32] [i32 2, i32 3, i32 7, i32 9, i32 11, i32 2, i32 3, i32 11]
define i32 @main() {
%1 = alloca [8 x i32]
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast [8 x i32]* %1 to i8*
store i32 8, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
%6 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 0
%7 = load i32, i32* %2
%8 = call i32 @printArray(i32* %6, i32 %7)
%9 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 0
%10 = load i32, i32* %2
%11 = call i32 @findTwoNonRepeatElements(i32* %9, i32 %10, i32* %3, i32* %4)
ret i32 0
}

LLVM IR (-O2):
@__const.main.data = [8 x i32] [i32 2, i32 3, i32 7, i32 9, i32 11, i32 2, i32 3, i32 11]
define i32 @main() {
%1 = alloca [8 x i32]
%2 = alloca i32
%3 = alloca i32
%4 = bitcast [8 x i32]* %1 to i8*
%5 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%6 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%7 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 0
%8 = call i32 @printArray(i32* %7, i32 8)
%9 = call i32 @findTwoNonRepeatElements(i32* %7, i32 8, i32* %2, i32* %3)
ret i32 0
}
void putc(const char c) {
  int i;
  for (i = 0; i < 0x1000; i++) {
    if (*((volatile unsigned char *)((0xf1000000 + 0x12000) + 0x14)) & 0x20)
      break;
  }
  *((volatile unsigned char *)((0xf1000000 + 0x12000) + 0x0)) = c;
}


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x1000,-0x8(%rbp)
jge    114c <putc+0x4c>
mov    $0xf1012014,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     1139 <putc+0x39>
jmp    114c <putc+0x4c>
jmp    113e <putc+0x3e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1111 <putc+0x11>
mov    -0x1(%rbp),%cl
mov    $0xf1012000,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
mov    $0xfff,%ecx
mov    $0xf1012000,%eax
nopw   0x0(%rax,%rax,1)
sub    $0x1,%ecx
setb   %dl
testb  $0x20,0x14(%rax)
jne    1120 <putc+0x20>
test   %dl,%dl
je     1110 <putc+0x10>
mov    %dil,(%rax)
ret

LLVM IR (-O0):
define void @putc(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 4096
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load volatile i8, i8* inttoptr (i64 4043382804 to i8*)
%9 = zext i8 %8 to i32
%10 = and i32 %9, 32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %7
br label %17
13: ; preds = %7
br label %14
14: ; preds = %13
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %4
17: ; preds = %12, %4
%18 = load i8, i8* %2
store volatile i8 %18, i8* inttoptr (i64 4043382784 to i8*)
ret void
}

LLVM IR (-O2):
define void @putc(i8 signext %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %7, %2 ]
%4 = load volatile i8, i8* inttoptr (i64 4043382804 to i8*)
%5 = and i8 %4, 32
%6 = icmp ne i8 %5, 0
%7 = add nuw nsw i32 %3, 1
%8 = icmp eq i32 %7, 4096
%9 = select i1 %6, i1 true, i1 %8
br i1 %9, label %10, label %2
10: ; preds = %2
store volatile i8 %0, i8* inttoptr (i64 4043382784 to i8*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void h3(char *header) { printf("<h3>%s</h3>\n", header); }


x86 assembly (clang, -O0):
<h3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h3>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"<h3>%s</h3>\0A\00"
define void @h3(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"<h3>%s</h3>\0A\00"
define void @h3(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void p(int n) { printf("%d\n", n); }


x86 assembly (clang, -O0):
<p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @p(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @p(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void BadFlag(char *flag) {
  fprintf(stderr,
          "\nThe %s flag either REQUIRES a value after it or can be suffixed\n"
          "with an optional value.  It therefore can't be embedded with\n"
          "single letter flags. Type 'tacg -h' for a brief description of\n"
          "the flags, or 'man tacg' for more info.\n",
          flag);
  exit(1);
}


x86 assembly (clang, -O0):
<BadFlag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<BadFlag>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [230 x i8] c"\0AThe %s flag either REQUIRES a value after it or can be suffixed\0Awith an optional value. It therefore can't be embedded with\0Asingle letter flags. Type 'tacg -h' for a brief description of\0Athe flags, or 'man tacg' for more info.\0A\00"
define void @BadFlag(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([230 x i8], [230 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [230 x i8] c"\0AThe %s flag either REQUIRES a value after it or can be suffixed\0Awith an optional value. It therefore can't be embedded with\0Asingle letter flags. Type 'tacg -h' for a brief description of\0Athe flags, or 'man tacg' for more info.\0A\00"
define void @BadFlag(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([230 x i8], [230 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int iptables_command(char *, char const *);
int allow_mac(const char *mac) {
  return iptables_command(
      "iptables -t nat -I prerouting_rule -m mac --mac-source %s -j RETURN",
      mac);
}


x86 assembly (clang, -O0):
<allow_mac>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <iptables_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allow_mac>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <iptables_command@plt>

LLVM IR (-O0):
@.str = [68 x i8] c"iptables -t nat -I prerouting_rule -m mac --mac-source %s -j RETURN\00"
define i32 @allow_mac(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @iptables_command(i8* getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [68 x i8] c"iptables -t nat -I prerouting_rule -m mac --mac-source %s -j RETURN\00"
define i32 @allow_mac(i8* %0) {
%2 = tail call i32 @iptables_command(i8* getelementptr inbounds ([68 x i8], [68 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 %2
}
int do_c() { return 1; }


x86 assembly (clang, -O0):
<do_c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_c>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @do_c() {
ret i32 1
}

LLVM IR (-O2):
define i32 @do_c() {
ret i32 1
}
/* Variables and functions */
bool is_backslash(int c) {
  if (c == '\\') {
    return true;
  }
  return false;
}


x86 assembly (clang, -O0):
<is_backslash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x5c,-0x8(%rbp)
jne    111d <is_backslash+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1124 <is_backslash+0x24>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_backslash>:
xor    %eax,%eax
cmp    $0x5c,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_backslash(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 92
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @is_backslash(i32 %0) {
%2 = icmp eq i32 %0, 92
%3 = zext i1 %2 to i32
ret i32 %3
}
long long int min(long long int a, long long int b) {
  if (a < b)
    return a;
  else
    return b;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jge    1127 <min+0x27>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    112f <min+0x2f>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @min(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %4
%7 = load i64, i64* %5
%8 = icmp slt i64 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i64, i64* %4
store i64 %10, i64* %3
br label %13
11: ; preds = %2
%12 = load i64, i64* %5
store i64 %12, i64* %3
br label %13
13: ; preds = %11, %9
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @min(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
void set_bit(int nr, volatile unsigned long *addr) {
  asm("btsl %1,%0" : "+m"(*addr) : "Ir"(nr));
}


x86 assembly (clang, -O0):
<set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
bts    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit>:
bts    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @set_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @set_bit(i32 %0, i64* %1) {
tail call void asm "btsl $1,$0", "=*m,Ir,*m,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0, i64* elementtype(i64) %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void SysCtlMOSCConfigSet(uint32_t ui32Config) {
  (*((volatile uint32_t *)(0x400FE07C))) = ui32Config;
}


x86 assembly (clang, -O0):
<SysCtlMOSCConfigSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x400fe07c,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlMOSCConfigSet>:
mov    %edi,0x400fe07c
ret

LLVM IR (-O0):
define void @SysCtlMOSCConfigSet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store volatile i32 %3, i32* inttoptr (i64 1074782332 to i32*)
ret void
}

LLVM IR (-O2):
define void @SysCtlMOSCConfigSet(i32 %0) {
store volatile i32 %0, i32* inttoptr (i64 1074782332 to i32*)
ret void
}
/* Variables and functions */
float _d2f(int /*<<< orphan*/);
int /*<<< orphan*/ _dadd(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _f2d(int);
float _fadd(int a, int b) { return _d2f(_dadd(_f2d(a), _f2d(b))); }


x86 assembly (clang, -O0):
<_fadd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <_f2d@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <_f2d@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1050 <_dadd@plt>
mov    %eax,%edi
call   1030 <_d2f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fadd>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
call   1040 <_f2d@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1040 <_f2d@plt>
mov    %ebp,%edi
mov    %eax,%esi
call   1050 <_dadd@plt>
mov    %eax,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <_d2f@plt>

LLVM IR (-O0):
define float @_fadd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @_f2d(i32 %5)
%7 = load i32, i32* %4
%8 = call i32 @_f2d(i32 %7)
%9 = call i32 @_dadd(i32 %6, i32 %8)
%10 = call float @_d2f(i32 %9)
ret float %10
}

LLVM IR (-O2):
define float @_fadd(i32 %0, i32 %1) {
%3 = tail call i32 @_f2d(i32 %0)
%4 = tail call i32 @_f2d(i32 %1)
%5 = tail call i32 @_dadd(i32 %3, i32 %4)
%6 = tail call float @_d2f(i32 %5)
ret float %6
}
/* Variables and functions */
int strcmp(char *, char *);
int pdecmp(const void *sv, const void *dv) {
  return strcmp(*(char **)sv, *(char **)dv);
}


x86 assembly (clang, -O0):
<pdecmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pdecmp>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @pdecmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @pdecmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
float Q_rsqrt(float number) {
  float y;
  union {
    float f;
    int i;
  } t;
  float x2;
  const float threehalfs = 1.5F;
  x2 = number * 0.5F;
  t.f = number;
  t.i = 0x5f3759df - (t.i >> 1);
  y = t.f;
  y = y * (threehalfs - (x2 * y * y));
  return y;
}


x86 assembly (clang, -O0):
<Q_rsqrt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  0xee6(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0x10(%rbp),%ecx
sar    $0x1,%ecx
mov    $0x5f3759df,%eax
sub    %ecx,%eax
mov    %eax,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  -0x14(%rbp),%xmm1
mulss  -0x8(%rbp),%xmm1
movss  -0x8(%rbp),%xmm2
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm1
movss  0xe87(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Q_rsqrt>:
movd   %xmm0,%eax
sar    %eax
mov    $0x5f3759df,%ecx
sub    %eax,%ecx
movd   %ecx,%xmm1
mulss  0xee7(%rip),%xmm0
mulss  %xmm1,%xmm0
mulss  %xmm1,%xmm0
addss  0xedb(%rip),%xmm0
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
%union.anon = type { float }
define float @Q_rsqrt(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca %union.anon
%5 = alloca float
%6 = alloca float
store float %0, float* %2
store float 1.500000e+00, float* %6
%7 = load float, float* %2
%8 = fmul float %7, 5.000000e-01
store float %8, float* %5
%9 = load float, float* %2
%10 = bitcast %union.anon* %4 to float*
store float %9, float* %10
%11 = bitcast %union.anon* %4 to i32*
%12 = load i32, i32* %11
%13 = ashr i32 %12, 1
%14 = sub nsw i32 1597463007, %13
%15 = bitcast %union.anon* %4 to i32*
store i32 %14, i32* %15
%16 = bitcast %union.anon* %4 to float*
%17 = load float, float* %16
store float %17, float* %3
%18 = load float, float* %3
%19 = load float, float* %5
%20 = load float, float* %3
%21 = fmul float %19, %20
%22 = load float, float* %3
%23 = fneg float %21
%24 = call float @llvm.fmuladd.f32(float %23, float %22, float 1.500000e+00)
%25 = fmul float %18, %24
store float %25, float* %3
%26 = load float, float* %3
ret float %26
}

LLVM IR (-O2):
define float @Q_rsqrt(float %0) {
%2 = bitcast float %0 to i32
%3 = ashr i32 %2, 1
%4 = sub nsw i32 1597463007, %3
%5 = bitcast i32 %4 to float
%6 = fmul float %0, -5.000000e-01
%7 = fmul float %6, %5
%8 = tail call float @llvm.fmuladd.f32(float %7, float %5, float 1.500000e+00)
%9 = fmul float %8, %5
ret float %9
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int padcon_get_dobldobl_estimated_distance(double *eta) {
  int fail;
  int precision = 1;
  int *b;
  fail = _ada_use_c2phc4c(887, &precision, b, eta, 0);
  return fail;
}


x86 assembly (clang, -O0):
<padcon_get_dobldobl_estimated_distance>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x18(%rbp),%rdx
mov    -0x8(%rbp),%rcx
mov    $0x377,%edi
lea    -0x10(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<padcon_get_dobldobl_estimated_distance>:
push   %rax
mov    %rdi,%rcx
movl   $0x1,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x377,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @padcon_get_dobldobl_estimated_distance(double* %0) {
%2 = alloca double*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store double* %0, double** %2
store i32 1, i32* %4
%6 = load i32*, i32** %5
%7 = load double*, double** %2
%8 = call i32 @_ada_use_c2phc4c(i32 887, i32* %4, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @padcon_get_dobldobl_estimated_distance(double* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 1, i32* %2
%4 = call i32 @_ada_use_c2phc4c(i32 887, i32* %2, i32* undef, double* %0, i32 0)
ret i32 %4
}
void I420ToRGB565Dither() {}


x86 assembly (clang, -O0):
<I420ToRGB565Dither>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I420ToRGB565Dither>:
ret

LLVM IR (-O0):
define void @I420ToRGB565Dither() {
ret void
}

LLVM IR (-O2):
define void @I420ToRGB565Dither() {
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ puts(char const *);
int out_files(const char *path, struct stat *sbuf) {
  puts(path);
  return 0;
}


x86 assembly (clang, -O0):
<out_files>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<out_files>:
push   %rax
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @out_files(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
%5 = load i8*, i8** %3
%6 = call i32 @puts(i8* %5)
ret i32 0
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @out_files(i8* nocapture %0, %struct.stat* nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) %0)
ret i32 0
}
signed long long
signedlonglong_ignoring_unsignedshortint(signed long long x,
                                         unsigned short int y) {
  return x;
}


x86 assembly (clang, -O0):
<signedlonglong_ignoring_unsignedshortint>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signedlonglong_ignoring_unsignedshortint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @signedlonglong_ignoring_unsignedshortint(i64 %0, i16 zeroext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @signedlonglong_ignoring_unsignedshortint(i64 returned %0, i16 zeroext %1) {
ret i64 %0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ type;
};
struct TYPE_4__ {
  TYPE_1__ xconfigure;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
int get_XEvent_xconfigure_type(void *_p) {
  return (int)((XEvent *)_p)->xconfigure.type;
}


x86 assembly (clang, -O0):
<get_XEvent_xconfigure_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xconfigure_type>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i32 @get_XEvent_xconfigure_type(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_XEvent_xconfigure_type(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
int _isatty(int fd) { return 1; }


x86 assembly (clang, -O0):
<_isatty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_isatty>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_isatty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @_isatty(i32 %0) {
ret i32 1
}
/* Variables and functions */
int strcmp(char const *, char const *);
int strcoll(const char *l, const char *r) { return strcmp(l, r); }


x86 assembly (clang, -O0):
<strcoll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcoll>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @strcoll(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strcoll(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
/* Variables and functions */
int size_div_check(const size_t x, const size_t y) {
  (void)x;
  return (y != 0);
}


x86 assembly (clang, -O0):
<size_div_check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_div_check>:
xor    %eax,%eax
test   %rsi,%rsi
setne  %al
ret

LLVM IR (-O0):
define i32 @size_div_check(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @size_div_check(i64 %0, i64 %1) {
%3 = icmp ne i64 %1, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int yylex();
int main(void) {
  int ch = yylex();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <yylex@plt>
mov    %eax,-0x8(%rbp)
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <yylex@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @yylex()
store i32 %3, i32* %2
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @yylex()
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ handle_59(int /*<<< orphan*/);
int gen_59(void) {
  handle_59(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_59>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_59@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_59>:
push   %rax
xor    %edi,%edi
call   1030 <handle_59@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_59() {
%1 = call i32 @handle_59(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_59() {
%1 = tail call i32 @handle_59(i32 0)
ret i32 0
}
int pr8403() {
  int i;
  for (i = 0; i < 10; i++) {
    int j;
    for (j = 0; j + 1 < i; j++) {
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<pr8403>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    1151 <pr8403+0x51>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
cmp    -0x4(%rbp),%eax
jge    113e <pr8403+0x3e>
jmp    1130 <pr8403+0x30>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111c <pr8403+0x1c>
jmp    1143 <pr8403+0x43>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <pr8403+0xb>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pr8403>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pr8403() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %17, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %20
6: ; preds = %3
store i32 0, i32* %2
br label %7
7: ; preds = %13, %6
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
%10 = load i32, i32* %1
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %16
12: ; preds = %7
br label %13
13: ; preds = %12
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %7
16: ; preds = %7
br label %17
17: ; preds = %16
%18 = load i32, i32* %1
%19 = add nsw i32 %18, 1
store i32 %19, i32* %1
br label %3
20: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @pr8403() {
ret i32 0
}
void do_prefetch_abort() {}


x86 assembly (clang, -O0):
<do_prefetch_abort>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_prefetch_abort>:
ret

LLVM IR (-O0):
define void @do_prefetch_abort() {
ret void
}

LLVM IR (-O2):
define void @do_prefetch_abort() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int zorglub2(int n) { printf("eviv bulgroz !\n"); }


x86 assembly (clang, -O0):
<zorglub2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zorglub2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"eviv bulgroz !\0A\00"
define i32 @zorglub2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
@str = [15 x i8] c"eviv bulgroz !\00"
define i32 @zorglub2(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int ALWAYS_ON_SNR_IsActive(void *snr) { return 1; }


x86 assembly (clang, -O0):
<ALWAYS_ON_SNR_IsActive>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ALWAYS_ON_SNR_IsActive>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ALWAYS_ON_SNR_IsActive(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @ALWAYS_ON_SNR_IsActive(i8* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printLetters(char *);
void printArgs(int argc, char *argv[]) {
  for (int i = 0; i < argc; i++)
    printLetters(argv[i]);
}


x86 assembly (clang, -O0):
<printArgs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1151 <printArgs+0x41>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <printLetters@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <printArgs+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printArgs>:
push   %r15
push   %r14
push   %rbx
test   %edi,%edi
jle    1142 <printArgs+0x32>
mov    %rsi,%r14
mov    %edi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <printLetters@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <printArgs+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @printArgs(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8**, i8*** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
%16 = call i32 @printLetters(i8* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @printArgs(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %7
6: ; preds = %7, %2
ret void
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %12, %7 ]
%9 = getelementptr inbounds i8*, i8** %1, i64 %8
%10 = load i8*, i8** %9
%11 = tail call i32 @printLetters(i8* %10)
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %6, label %7
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xc3() {
  Assert_real((isalnum(195) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              980, ("isalnum should be 0 for 0xc3"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xc3>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc3,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3d4,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xc3>:
push   %rax
mov    $0xc3,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3d4,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xc3\00"
define void @t_isalnum_0xc3() {
%1 = call i64 @isalnum(i32 195)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 980, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xc3\00"
define void @t_isalnum_0xc3() {
%1 = tail call i64 @isalnum(i32 195)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 980, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
long strlen(char const *);
long spacesize(const char *chars, unsigned int len) {
  if (len < 1)
    return 0;
  if (len < 2)
    return strlen(chars);
  return strlen(chars) * spacesize(chars, len - 1);
}


x86 assembly (clang, -O0):
<spacesize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jae    1146 <spacesize+0x26>
movq   $0x0,-0x8(%rbp)
jmp    118d <spacesize+0x6d>
cmpl   $0x2,-0x14(%rbp)
jae    1162 <spacesize+0x42>
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x8(%rbp)
jmp    118d <spacesize+0x6d>
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
sub    $0x1,%esi
call   1030 <spacesize@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
imul   %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spacesize>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%r14
mov    $0x1,%ebx
test   %ebp,%ebp
je     1148 <spacesize+0x38>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmp    $0x1,%ebp
je     114c <spacesize+0x3c>
mov    %r14,%rdi
call   1030 <strlen@plt>
add    $0xffffffff,%ebp
imul   %rax,%rbx
test   %ebp,%ebp
jne    1130 <spacesize+0x20>
xor    %eax,%eax
jmp    1154 <spacesize+0x44>
mov    %r14,%rdi
call   1030 <strlen@plt>
imul   %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i64 @spacesize(i8* %0, i32 %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ult i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
store i64 0, i64* %3
br label %23
9: ; preds = %2
%10 = load i32, i32* %5
%11 = icmp ult i32 %10, 2
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load i8*, i8** %4
%14 = call i64 @strlen(i8* %13)
store i64 %14, i64* %3
br label %23
15: ; preds = %9
%16 = load i8*, i8** %4
%17 = call i64 @strlen(i8* %16)
%18 = load i8*, i8** %4
%19 = load i32, i32* %5
%20 = sub i32 %19, 1
%21 = call i64 @spacesize(i8* %18, i32 %20)
%22 = mul nsw i64 %17, %21
store i64 %22, i64* %3
br label %23
23: ; preds = %15, %12, %8
%24 = load i64, i64* %3
ret i64 %24
}

LLVM IR (-O2):
define i64 @spacesize(i8* nocapture %0, i32 %1) {
br label %3
3: ; preds = %8, %2
%4 = phi i64 [ 1, %2 ], [ %11, %8 ]
%5 = phi i32 [ %1, %2 ], [ %10, %8 ]
switch i32 %5, label %8 [
i32 0, label %12
i32 1, label %6
]
6: ; preds = %3
%7 = tail call i64 @strlen(i8* dereferenceable(1) %0)
br label %12
8: ; preds = %3
%9 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%10 = add i32 %5, -1
%11 = mul nsw i64 %9, %4
br label %3
12: ; preds = %3, %6
%13 = phi i64 [ %7, %6 ], [ 0, %3 ]
%14 = mul nsw i64 %13, %4
ret i64 %14
}
int test_imm_59int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x59 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_59int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x59,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_59int64_midword_mem>:
testb  $0x59,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_59int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 89
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_59int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 5832704
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ int8_t;
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int lwm2m_int64ToPlainText(int /*<<< orphan*/, char **);
int lwm2m_int8ToPlainText(int8_t data, char **bufferP) {
  return lwm2m_int64ToPlainText((int64_t)data, bufferP);
}


x86 assembly (clang, -O0):
<lwm2m_int8ToPlainText>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1030 <lwm2m_int64ToPlainText@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lwm2m_int8ToPlainText>:
jmp    1030 <lwm2m_int64ToPlainText@plt>

LLVM IR (-O0):
define i32 @lwm2m_int8ToPlainText(i64 %0, i8** %1) {
%3 = alloca i64
%4 = alloca i8**
store i64 %0, i64* %3
store i8** %1, i8*** %4
%5 = load i64, i64* %3
%6 = trunc i64 %5 to i32
%7 = load i8**, i8*** %4
%8 = call i32 @lwm2m_int64ToPlainText(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @lwm2m_int8ToPlainText(i64 %0, i8** %1) {
%3 = trunc i64 %0 to i32
%4 = tail call i32 @lwm2m_int64ToPlainText(i32 %3, i8** %1)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ say(char *);
void start(void) {
  puts("This is b start");
  say("hello from b");
  exit(0);
}


x86 assembly (clang, -O0):
<start>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1030 <puts@plt>
lea    0xec9(%rip),%rdi
call   1050 <say@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<start>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
call   1050 <say@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"This is b start\00"
@.str.1 = [13 x i8] c"hello from b\00"
define void @start() {
%1 = call i32 @puts(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @say(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [16 x i8] c"This is b start\00"
@.str.1 = [13 x i8] c"hello from b\00"
define void @start() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @say(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ ULONG_MAX;
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int hlp_ulong_max32(void) {
  printf("%lu\n", ULONG_MAX);
  return 0;
}


x86 assembly (clang, -O0):
<hlp_ulong_max32>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hlp_ulong_max32>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%lu\0A\00"
@ULONG_MAX = global i32 0
define i32 @hlp_ulong_max32() {
%1 = load i32, i32* @ULONG_MAX
%2 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%lu\0A\00"
@ULONG_MAX = global i32 0
define i32 @hlp_ulong_max32() {
%1 = load i32, i32* @ULONG_MAX
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}