xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void eeprom_write_word(const void *ptr, uint16_t val) {}


x86 assembly (clang, -O0):
<eeprom_write_word>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<eeprom_write_word>:
ret

LLVM IR (-O0):
define void @eeprom_write_word(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @eeprom_write_word(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void vuln(char *str) {
  char buf[64];
  strcpy(buf, str);
}


x86 assembly (clang, -O0):
<vuln>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x50(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vuln>:
sub    $0x48,%rsp
mov    %rdi,%rsi
mov    %rsp,%rdi
call   1030 <strcpy@plt>
add    $0x48,%rsp
ret

LLVM IR (-O0):
define void @vuln(i8* %0) {
%2 = alloca i8*
%3 = alloca [64 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [64 x i8], [64 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = call i32 @strcpy(i8* %4, i8* %5)
ret void
}

LLVM IR (-O2):
define void @vuln(i8* %0) {
%2 = alloca [64 x i8]
%3 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%4 = call i32 @strcpy(i8* %3, i8* %0)
ret void
}
void test8_bar() {}


x86 assembly (clang, -O0):
<test8_bar>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test8_bar>:
ret

LLVM IR (-O0):
define void @test8_bar() {
ret void
}

LLVM IR (-O2):
define void @test8_bar() {
ret void
}
char *icl_zlib_parameters(void) {
  return "\"level\"\n  numeric 1-9\n  defaults 9\n  specifying how much CPU to "
         "use to compress";
}


x86 assembly (clang, -O0):
<icl_zlib_parameters>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<icl_zlib_parameters>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [80 x i8] c"\22level\22\0A numeric 1-9\0A defaults 9\0A specifying how much CPU to use to compress\00"
define i8* @icl_zlib_parameters() {
ret i8* getelementptr inbounds ([80 x i8], [80 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [80 x i8] c"\22level\22\0A numeric 1-9\0A defaults 9\0A specifying how much CPU to use to compress\00"
define i8* @icl_zlib_parameters() {
ret i8* getelementptr inbounds ([80 x i8], [80 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef unsigned int uint8_t;

/* Variables and functions */
unsigned int mput4b(unsigned int value, uint8_t *data) {
  data[3] = value & 0xff;
  data[2] = (value >> 8) & 0xff;
  data[1] = (value >> 16) & 0xff;
  data[0] = (value >> 24) & 0xff;
  return data[0];
}


x86 assembly (clang, -O0):
<mput4b>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0xc(%rax)
mov    -0x4(%rbp),%ecx
shr    $0x8,%ecx
and    $0xff,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0x4(%rbp),%ecx
shr    $0x10,%ecx
and    $0xff,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x4(%rbp),%ecx
shr    $0x18,%ecx
and    $0xff,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mput4b>:
mov    %edi,%eax
movzbl %al,%ecx
mov    %ecx,0xc(%rsi)
movzbl %ah,%ecx
mov    %ecx,0x8(%rsi)
mov    %edi,%ecx
shr    $0x10,%ecx
movzbl %cl,%ecx
mov    %ecx,0x4(%rsi)
shr    $0x18,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define i32 @mput4b(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = and i32 %5, 255
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 3
store i32 %6, i32* %8
%9 = load i32, i32* %3
%10 = lshr i32 %9, 8
%11 = and i32 %10, 255
%12 = load i32*, i32** %4
%13 = getelementptr inbounds i32, i32* %12, i64 2
store i32 %11, i32* %13
%14 = load i32, i32* %3
%15 = lshr i32 %14, 16
%16 = and i32 %15, 255
%17 = load i32*, i32** %4
%18 = getelementptr inbounds i32, i32* %17, i64 1
store i32 %16, i32* %18
%19 = load i32, i32* %3
%20 = lshr i32 %19, 24
%21 = and i32 %20, 255
%22 = load i32*, i32** %4
%23 = getelementptr inbounds i32, i32* %22, i64 0
store i32 %21, i32* %23
%24 = load i32*, i32** %4
%25 = getelementptr inbounds i32, i32* %24, i64 0
%26 = load i32, i32* %25
ret i32 %26
}

LLVM IR (-O2):
define i32 @mput4b(i32 %0, i32* nocapture writeonly %1) {
%3 = and i32 %0, 255
%4 = getelementptr inbounds i32, i32* %1, i64 3
store i32 %3, i32* %4
%5 = lshr i32 %0, 8
%6 = and i32 %5, 255
%7 = getelementptr inbounds i32, i32* %1, i64 2
store i32 %6, i32* %7
%8 = lshr i32 %0, 16
%9 = and i32 %8, 255
%10 = getelementptr inbounds i32, i32* %1, i64 1
store i32 %9, i32* %10
%11 = lshr i32 %0, 24
store i32 %11, i32* %1
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
scalar_t__ le();
int /*<<< orphan*/ swap32(int /*<<< orphan*/);
uint32_t read32le(uint32_t *p) { return (le() ? *p : swap32(*p)); }


x86 assembly (clang, -O0):
<read32le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <le@plt>
cmp    $0x0,%rax
je     114b <read32le+0x2b>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
jmp    1159 <read32le+0x39>
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1040 <swap32@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read32le>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <le@plt>
mov    %rax,%rcx
mov    (%rbx),%eax
test   %rcx,%rcx
je     1137 <read32le+0x17>
pop    %rbx
ret
mov    %eax,%edi
pop    %rbx
jmp    1040 <swap32@plt>

LLVM IR (-O0):
define i32 @read32le(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = call i64 (...) @le()
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
br label %12
8: ; preds = %1
%9 = load i32*, i32** %2
%10 = load i32, i32* %9
%11 = call i32 @swap32(i32 %10)
br label %12
12: ; preds = %8, %5
%13 = phi i32 [ %7, %5 ], [ %11, %8 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @read32le(i32* nocapture %0) {
%2 = tail call i64 (...) @le()
%3 = icmp eq i64 %2, 0
%4 = load i32, i32* %0
br i1 %3, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @swap32(i32 %4)
br label %7
7: ; preds = %1, %5
%8 = phi i32 [ %6, %5 ], [ %4, %1 ]
ret i32 %8
}
pksize(n) register n;
{
  register k;
  n >>= 5;
  for (k = 0; n >>= 1; k++)
    ;
  return k;
}


x86 assembly (clang, -O0):
<pksize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x5,%eax
mov    %eax,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
je     113c <pksize+0x3c>
jmp    112e <pksize+0x2e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1117 <pksize+0x17>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pksize>:
xor    %eax,%eax
cmp    $0x40,%edi
jb     111c <pksize+0x1c>
sar    $0x5,%edi
xor    %eax,%eax
mov    %edi,%ecx
xchg   %ax,%ax
sar    %ecx
add    $0x1,%eax
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1110 <pksize+0x10>
ret

LLVM IR (-O0):
define i32 @pksize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 %4, 5
store i32 %5, i32* %2
store i32 0, i32* %3
br label %6
6: ; preds = %11, %1
%7 = load i32, i32* %2
%8 = ashr i32 %7, 1
store i32 %8, i32* %2
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %6
br label %11
11: ; preds = %10
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %6
14: ; preds = %6
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @pksize(i32 %0) {
%2 = icmp ult i32 %0, 64
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = ashr i32 %0, 5
br label %5
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ 0, %3 ]
%7 = phi i32 [ %8, %5 ], [ %4, %3 ]
%8 = ashr i32 %7, 1
%9 = add nuw nsw i32 %6, 1
%10 = icmp ult i32 %7, 4
br i1 %10, label %11, label %5
11: ; preds = %5, %1
%12 = phi i32 [ 0, %1 ], [ %9, %5 ]
ret i32 %12
}
void f() {
  typedef struct S {
    int x, y;
  } S;
  struct S s;
  s = (S){s.y, s.x};
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
%struct.S = type { i32, i32 }
define void @f() {
%1 = alloca %struct.S
%2 = alloca %struct.S
%3 = getelementptr inbounds %struct.S, %struct.S* %2, i32 0, i32 0
%4 = getelementptr inbounds %struct.S, %struct.S* %1, i32 0, i32 1
%5 = load i32, i32* %4
store i32 %5, i32* %3
%6 = getelementptr inbounds %struct.S, %struct.S* %2, i32 0, i32 1
%7 = getelementptr inbounds %struct.S, %struct.S* %1, i32 0, i32 0
%8 = load i32, i32* %7
store i32 %8, i32* %6
%9 = bitcast %struct.S* %1 to i8*
%10 = bitcast %struct.S* %2 to i8*
ret void
}

LLVM IR (-O2):
define void @f() {
ret void
}
/* Variables and functions */
int partition(int *, int, int);
void quick_sort_ric(int *v, int a, int b) {
  int m;
  if (a >= b)
    return;
  m = partition(v, a, b);
  quick_sort_ric(v, a, m - 1);
  quick_sort_ric(v, m + 1, b);
}


x86 assembly (clang, -O0):
<quick_sort_ric>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1143 <quick_sort_ric+0x23>
jmp    1179 <quick_sort_ric+0x59>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quick_sort_ric@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quick_sort_ric@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_sort_ric>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quick_sort_ric+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quick_sort_ric@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quick_sort_ric+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quick_sort_ric(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp sge i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %3
br label %25
12: ; preds = %3
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = call i32 @partition(i32* %13, i32 %14, i32 %15)
store i32 %16, i32* %7
%17 = load i32*, i32** %4
%18 = load i32, i32* %5
%19 = load i32, i32* %7
%20 = sub nsw i32 %19, 1
%21 = load i32*, i32** %4
%22 = load i32, i32* %7
%23 = add nsw i32 %22, 1
%24 = load i32, i32* %6
br label %25
25: ; preds = %12, %11
ret void
}

LLVM IR (-O2):
define void @quick_sort_ric(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quick_sort_ric(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
double int_div_int(int1, int2)
int int1, int2;
{
  if (!int2)
    return 0.0;
  return (double)((double)int1 / (double)int2);
}


x86 assembly (clang, -O0):
<int_div_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1121 <int_div_int+0x21>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1134 <int_div_int+0x34>
cvtsi2sdl -0xc(%rbp),%xmm0
cvtsi2sdl -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_div_int>:
test   %esi,%esi
je     1111 <int_div_int+0x11>
cvtsi2sd %edi,%xmm0
cvtsi2sd %esi,%xmm1
divsd  %xmm1,%xmm0
ret
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @int_div_int(i32 %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %2
store double 0.000000e+00, double* %3
br label %15
9: ; preds = %2
%10 = load i32, i32* %4
%11 = sitofp i32 %10 to double
%12 = load i32, i32* %5
%13 = sitofp i32 %12 to double
%14 = fdiv double %11, %13
store double %14, double* %3
br label %15
15: ; preds = %9, %8
%16 = load double, double* %3
ret double %16
}

LLVM IR (-O2):
define double @int_div_int(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = sitofp i32 %0 to double
%6 = sitofp i32 %1 to double
%7 = fdiv double %5, %6
br label %8
8: ; preds = %2, %4
%9 = phi double [ %7, %4 ], [ 0.000000e+00, %2 ]
ret double %9
}
void CFGMR3InsertNode(void) {}


x86 assembly (clang, -O0):
<CFGMR3InsertNode>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3InsertNode>:
ret

LLVM IR (-O0):
define void @CFGMR3InsertNode() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3InsertNode() {
ret void
}
/* Variables and functions */
scalar_t__ ceil(size_t);
size_t UVEstimateBas64DecodedDataSize(size_t inDataSize) {
  size_t theDecodedDataSize = (int)ceil(inDataSize / 4.0) * 3;
  return (theDecodedDataSize);
}


x86 assembly (clang, -O0):
<UVEstimateBas64DecodedDataSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movaps 0xedd(%rip),%xmm1
movq   -0x8(%rbp),%xmm0
punpckldq %xmm1,%xmm0
movapd 0xedc(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movsd  0xed5(%rip),%xmm1
divsd  %xmm1,%xmm0
movaps %xmm0,%xmm1
cvttsd2si %xmm1,%rdi
mov    %rdi,%rcx
sar    $0x3f,%rcx
movsd  0xec2(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
and    %rcx,%rax
or     %rax,%rdi
call   1030 <ceil@plt>
imul   $0x3,%eax,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UVEstimateBas64DecodedDataSize>:
push   %rax
movq   %rdi,%xmm0
punpckldq 0xee2(%rip),%xmm0
subpd  0xeea(%rip),%xmm0
movapd %xmm0,%xmm1
unpckhpd %xmm0,%xmm1
addsd  %xmm0,%xmm1
mulsd  0xee6(%rip),%xmm1
cvttsd2si %xmm1,%rax
mov    %rax,%rcx
sar    $0x3f,%rcx
subsd  0xeda(%rip),%xmm1
cvttsd2si %xmm1,%rdi
and    %rcx,%rdi
or     %rax,%rdi
call   1030 <ceil@plt>
shl    $0x20,%rax
lea    (%rax,%rax,2),%rax
sar    $0x20,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @UVEstimateBas64DecodedDataSize(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = uitofp i64 %4 to double
%6 = fdiv double %5, 4.000000e+00
%7 = fptoui double %6 to i64
%8 = call i64 @ceil(i64 %7)
%9 = trunc i64 %8 to i32
%10 = mul nsw i32 %9, 3
%11 = sext i32 %10 to i64
store i64 %11, i64* %3
%12 = load i64, i64* %3
ret i64 %12
}

LLVM IR (-O2):
define i64 @UVEstimateBas64DecodedDataSize(i64 %0) {
%2 = uitofp i64 %0 to double
%3 = fmul double %2, 2.500000e-01
%4 = fptoui double %3 to i64
%5 = tail call i64 @ceil(i64 %4)
%6 = mul i64 %5, 12884901888
%7 = ashr exact i64 %6, 32
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ EPOLL_CLOEXEC;
int epoll_create1(int /*<<< orphan*/);
int create_epoll() { return epoll_create1(EPOLL_CLOEXEC); }


x86 assembly (clang, -O0):
<create_epoll>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
call   1030 <epoll_create1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_epoll>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <epoll_create1@plt>

LLVM IR (-O0):
@EPOLL_CLOEXEC = global i32 0
define i32 @create_epoll() {
%1 = load i32, i32* @EPOLL_CLOEXEC
%2 = call i32 @epoll_create1(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
@EPOLL_CLOEXEC = global i32 0
define i32 @create_epoll() {
%1 = load i32, i32* @EPOLL_CLOEXEC
%2 = tail call i32 @epoll_create1(i32 %1)
ret i32 %2
}
/* Variables and functions */
void toLower(char *s) {
  while (s != NULL) {
    if (*s > 'A' && *s < 'Z') {
      *s = *s - 'a';
    }
    s++;
  }
}


x86 assembly (clang, -O0):
<toLower>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1156 <toLower+0x56>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x41,%eax
jle    1145 <toLower+0x45>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5a,%eax
jge    1145 <toLower+0x45>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
sub    $0x61,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <toLower+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<toLower>:
test   %rdi,%rdi
jne    1114 <toLower+0x14>
ret
cs nopw 0x0(%rax,%rax,1)
add    $0x1,%rdi
movzbl (%rdi),%eax
lea    -0x42(%rax),%ecx
cmp    $0x17,%cl
ja     1110 <toLower+0x10>
add    $0x9f,%al
mov    %al,(%rdi)
jmp    1110 <toLower+0x10>

LLVM IR (-O0):
define void @toLower(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %23, %1
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %26
6: ; preds = %3
%7 = load i8*, i8** %2
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp sgt i32 %9, 65
br i1 %10, label %11, label %23
11: ; preds = %6
%12 = load i8*, i8** %2
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp slt i32 %14, 90
br i1 %15, label %16, label %23
16: ; preds = %11
%17 = load i8*, i8** %2
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = sub nsw i32 %19, 97
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %2
store i8 %21, i8* %22
br label %23
23: ; preds = %16, %11, %6
%24 = load i8*, i8** %2
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %2
br label %3
26: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @toLower(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %12, label %3
3: ; preds = %1, %10
%4 = phi i8* [ %11, %10 ], [ %0, %1 ]
%5 = load i8, i8* %4
%6 = add i8 %5, -66
%7 = icmp ult i8 %6, 24
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = add nuw nsw i8 %5, -97
store i8 %9, i8* %4
br label %10
10: ; preds = %8, %3
%11 = getelementptr inbounds i8, i8* %4, i64 1
br label %3
12: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ prototype_only();
int /*<<< orphan*/ trivial_function();
void calling_function(void) {
  prototype_only();
  trivial_function();
}


x86 assembly (clang, -O0):
<calling_function>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <prototype_only@plt>
mov    $0x0,%al
call   1040 <trivial_function@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<calling_function>:
push   %rax
xor    %eax,%eax
call   1030 <prototype_only@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <trivial_function@plt>

LLVM IR (-O0):
define void @calling_function() {
%1 = call i32 (...) @prototype_only()
%2 = call i32 (...) @trivial_function()
ret void
}

LLVM IR (-O2):
define void @calling_function() {
%1 = tail call i32 (...) @prototype_only()
%2 = tail call i32 (...) @trivial_function()
ret void
}
int c025(void) { return 0; }


x86 assembly (clang, -O0):
<c025>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c025>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c025() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c025() {
ret i32 0
}
void putword(long n, char **p) {
  *(*p)++ = n & 255;
  *(*p)++ = n >> 8;
}


x86 assembly (clang, -O0):
<putword>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x10(%rbp),%rdx
mov    (%rdx),%rax
mov    %rax,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
sar    $0x8,%rax
mov    %al,%cl
mov    -0x10(%rbp),%rdx
mov    (%rdx),%rax
mov    %rax,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<putword>:
mov    %rdi,%rax
mov    (%rsi),%rcx
lea    0x1(%rcx),%rdx
mov    %rdx,(%rsi)
mov    %al,(%rcx)
mov    (%rsi),%rcx
lea    0x1(%rcx),%rdx
mov    %rdx,(%rsi)
mov    %ah,(%rcx)
ret

LLVM IR (-O0):
define void @putword(i64 %0, i8** %1) {
%3 = alloca i64
%4 = alloca i8**
store i64 %0, i64* %3
store i8** %1, i8*** %4
%5 = load i64, i64* %3
%6 = and i64 %5, 255
%7 = trunc i64 %6 to i8
%8 = load i8**, i8*** %4
%9 = load i8*, i8** %8
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %8
store i8 %7, i8* %9
%11 = load i64, i64* %3
%12 = ashr i64 %11, 8
%13 = trunc i64 %12 to i8
%14 = load i8**, i8*** %4
%15 = load i8*, i8** %14
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %14
store i8 %13, i8* %15
ret void
}

LLVM IR (-O2):
define void @putword(i64 %0, i8** nocapture %1) {
%3 = trunc i64 %0 to i8
%4 = load i8*, i8** %1
%5 = getelementptr inbounds i8, i8* %4, i64 1
store i8* %5, i8** %1
store i8 %3, i8* %4
%6 = lshr i64 %0, 8
%7 = trunc i64 %6 to i8
%8 = load i8*, i8** %1
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8* %9, i8** %1
store i8 %7, i8* %8
ret void
}
void MapTests(void) {}


x86 assembly (clang, -O0):
<MapTests>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MapTests>:
ret

LLVM IR (-O0):
define void @MapTests() {
ret void
}

LLVM IR (-O2):
define void @MapTests() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ noreturn();
void *forever_pthread(void *unused) { noreturn(); }


x86 assembly (clang, -O0):
<forever_pthread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <noreturn@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<forever_pthread>:
xor    %eax,%eax
jmp    1030 <noreturn@plt>

LLVM IR (-O0):
define i8* @forever_pthread(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 (...) @noreturn()
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define noalias i8* @forever_pthread(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @noreturn()
ret i8* undef
}
OP(ed, cb) {}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
ret

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
ret i32 undef
}
void addng_init() { ; }


x86 assembly (clang, -O0):
<addng_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addng_init>:
ret

LLVM IR (-O0):
define void @addng_init() {
ret void
}

LLVM IR (-O2):
define void @addng_init() {
ret void
}
int f(int ch) {
  if (ch >= 'a' && ch <= 'z')
    return -(ch - 'a' + 1);
  if (ch >= 'A' && ch <= 'Z')
    return (ch - 'A' + 1);
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x61,-0x8(%rbp)
jl     1130 <f+0x30>
cmpl   $0x7a,-0x8(%rbp)
jg     1130 <f+0x30>
mov    -0x8(%rbp),%ecx
sub    $0x61,%ecx
add    $0x1,%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    1150 <f+0x50>
cmpl   $0x41,-0x8(%rbp)
jl     1150 <f+0x50>
cmpl   $0x5a,-0x8(%rbp)
jg     1150 <f+0x50>
mov    -0x8(%rbp),%eax
sub    $0x41,%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    -0x61(%rdi),%eax
cmp    $0x19,%eax
ja     1110 <f+0x10>
mov    $0x60,%eax
sub    %edi,%eax
ret
add    $0xffffffc0,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 122
br i1 %8, label %9, label %14
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 97
%12 = add nsw i32 %11, 1
%13 = sub nsw i32 0, %12
store i32 %13, i32* %2
br label %24
14: ; preds = %6, %1
%15 = load i32, i32* %3
%16 = icmp sge i32 %15, 65
br i1 %16, label %17, label %24
17: ; preds = %14
%18 = load i32, i32* %3
%19 = icmp sle i32 %18, 90
br i1 %19, label %20, label %24
20: ; preds = %17
%21 = load i32, i32* %3
%22 = sub nsw i32 %21, 65
%23 = add nsw i32 %22, 1
store i32 %23, i32* %2
br label %24
24: ; preds = %9, %20, %17, %14
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = sub nsw i32 96, %0
br label %11
6: ; preds = %1
%7 = add i32 %0, -65
%8 = icmp ult i32 %7, 26
%9 = add nsw i32 %0, -64
%10 = select i1 %8, i32 %9, i32 undef
br label %11
11: ; preds = %6, %4
%12 = phi i32 [ %5, %4 ], [ %10, %6 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ step_hash(int);
unsigned func_1(void) {
  int l_2 = (-1L);
  step_hash(1);
  return l_2;
}


x86 assembly (clang, -O0):
<func_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffffff,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <step_hash@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_1>:
push   %rax
mov    $0x1,%edi
call   1030 <step_hash@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @func_1() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = call i32 @step_hash(i32 1)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @func_1() {
%1 = tail call i32 @step_hash(i32 1)
ret i32 -1
}
/* Type definitions */
typedef unsigned long long uint64_t;
struct timespec {
  scalar_t__ tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
uint64_t timespec_to_ns(struct timespec *val) {
  return (uint64_t)val->tv_sec * (1000000000ULL) + (uint64_t)val->tv_nsec;
}


x86 assembly (clang, -O0):
<timespec_to_ns>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   $0x3b9aca00,0x8(%rax),%rax
3b
mov    -0x8(%rbp),%rcx
add    (%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timespec_to_ns>:
imul   $0x3b9aca00,0x8(%rdi),%rax
3b
add    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define i64 @timespec_to_ns(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %2
%3 = load %struct.timespec*, %struct.timespec** %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
%5 = load i64, i64* %4
%6 = mul i64 %5, 1000000000
%7 = load %struct.timespec*, %struct.timespec** %2
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %7, i32 0, i32 0
%9 = load i64, i64* %8
%10 = add i64 %6, %9
ret i64 %10
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define i64 @timespec_to_ns(%struct.timespec* nocapture %0) {
%2 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
%3 = load i64, i64* %2
%4 = mul i64 %3, 1000000000
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%6 = load i64, i64* %5
%7 = add i64 %4, %6
ret i64 %7
}
int cs_rprune(int i, int j, double aij, void *other) {
  int *rr = (int *)other;
  return (i >= rr[1] && i < rr[2]);
  (void)j;
  (void)aij;
}


x86 assembly (clang, -O0):
<cs_rprune>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x20(%rbp),%rdx
xor    %eax,%eax
cmp    0x4(%rdx),%ecx
mov    %al,-0x21(%rbp)
jl     1140 <cs_rprune+0x40>
mov    -0x4(%rbp),%eax
mov    -0x20(%rbp),%rcx
cmp    0x8(%rcx),%eax
setl   %al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cs_rprune>:
xor    %eax,%eax
cmp    %edi,0x4(%rdx)
jg     110f <cs_rprune+0xf>
xor    %eax,%eax
cmp    %edi,0x8(%rdx)
setg   %al
ret

LLVM IR (-O0):
define i32 @cs_rprune(i32 %0, i32 %1, double %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca double
%8 = alloca i8*
%9 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store double %2, double* %7
store i8* %3, i8** %8
%10 = load i8*, i8** %8
%11 = bitcast i8* %10 to i32*
store i32* %11, i32** %9
%12 = load i32, i32* %5
%13 = load i32*, i32** %9
%14 = getelementptr inbounds i32, i32* %13, i64 1
%15 = load i32, i32* %14
%16 = icmp sge i32 %12, %15
br i1 %16, label %17, label %23
17: ; preds = %4
%18 = load i32, i32* %5
%19 = load i32*, i32** %9
%20 = getelementptr inbounds i32, i32* %19, i64 2
%21 = load i32, i32* %20
%22 = icmp slt i32 %18, %21
br label %23
23: ; preds = %17, %4
%24 = phi i1 [ false, %4 ], [ %22, %17 ]
%25 = zext i1 %24 to i32
ret i32 %25
}

LLVM IR (-O2):
define i32 @cs_rprune(i32 %0, i32 %1, double %2, i8* nocapture %3) {
%5 = getelementptr inbounds i8, i8* %3, i64 4
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = icmp sgt i32 %7, %0
br i1 %8, label %15, label %9
9: ; preds = %4
%10 = getelementptr inbounds i8, i8* %3, i64 8
%11 = bitcast i8* %10 to i32*
%12 = load i32, i32* %11
%13 = icmp sgt i32 %12, %0
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %9, %4
%16 = phi i32 [ 0, %4 ], [ %14, %9 ]
ret i32 %16
}
int divisors_continuous_division(int x) {
  int limit = x;
  int numberOfDivisors = 0;
  int i;
  for (i = 1; i < limit; i++)
    if (x % i == 0) {
      limit = x / i;
      numberOfDivisors++;
    }
  return numberOfDivisors * 2;
}


x86 assembly (clang, -O0):
<divisors_continuous_division>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    115d <divisors_continuous_division+0x5d>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x10(%rbp)
cmp    $0x0,%edx
jne    114a <divisors_continuous_division+0x4a>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    114f <divisors_continuous_division+0x4f>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    111b <divisors_continuous_division+0x1b>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<divisors_continuous_division>:
xor    %eax,%eax
cmp    $0x2,%edi
jl     113e <divisors_continuous_division+0x3e>
mov    %edi,%r8d
xor    %ecx,%ecx
mov    $0x1,%esi
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %r8d,%eax
cltd
idiv   %esi
mov    %eax,%r9d
lea    0x1(%rcx),%eax
test   %edx,%edx
cmove  %r9d,%edi
cmovne %ecx,%eax
add    $0x1,%esi
mov    %eax,%ecx
cmp    %edi,%esi
jl     1120 <divisors_continuous_division+0x20>
add    %eax,%eax
ret

LLVM IR (-O0):
define i32 @divisors_continuous_division(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
store i32 %6, i32* %3
store i32 0, i32* %4
store i32 1, i32* %5
br label %7
7: ; preds = %23, %1
%8 = load i32, i32* %5
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %26
11: ; preds = %7
%12 = load i32, i32* %2
%13 = load i32, i32* %5
%14 = srem i32 %12, %13
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %22
16: ; preds = %11
%17 = load i32, i32* %2
%18 = load i32, i32* %5
%19 = sdiv i32 %17, %18
store i32 %19, i32* %3
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %22
22: ; preds = %16, %11
br label %23
23: ; preds = %22
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
br label %7
26: ; preds = %7
%27 = load i32, i32* %4
%28 = mul nsw i32 %27, 2
ret i32 %28
}

LLVM IR (-O2):
define i32 @divisors_continuous_division(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %15
3: ; preds = %1, %3
%4 = phi i32 [ %13, %3 ], [ 1, %1 ]
%5 = phi i32 [ %12, %3 ], [ 0, %1 ]
%6 = phi i32 [ %11, %3 ], [ %0, %1 ]
%7 = srem i32 %0, %4
%8 = sdiv i32 %0, %4
%9 = icmp eq i32 %7, 0
%10 = add nsw i32 %5, 1
%11 = select i1 %9, i32 %8, i32 %6
%12 = select i1 %9, i32 %10, i32 %5
%13 = add nuw nsw i32 %4, 1
%14 = icmp slt i32 %13, %11
br i1 %14, label %3, label %15
15: ; preds = %3, %1
%16 = phi i32 [ 0, %1 ], [ %12, %3 ]
%17 = shl nsw i32 %16, 1
ret i32 %17
}
/* Variables and functions */
__attribute__((section(".after_vectors"))) void PendSV_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<PendSV_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <PendSV_Handler+0x9>
jmp    1109 <PendSV_Handler+0x9>

x86 assembly (clang, -O2):
<PendSV_Handler>:
jmp    1100 <PendSV_Handler>

LLVM IR (-O0):
define void @PendSV_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @PendSV_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ hd_verify_DPT();
int /*<<< orphan*/ kprintf(char *);
void hd_init() {
  kprintf("Initializing HD\n");
  hd_verify_DPT();
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<hd_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <kprintf@plt>
mov    $0x0,%al
call   1030 <hd_verify_DPT@plt>
jmp    1137 <hd_init+0x17>

x86 assembly (clang, -O2):
<hd_init>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <kprintf@plt>
xor    %eax,%eax
call   1030 <hd_verify_DPT@plt>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
jmp    1140 <hd_init+0x20>

LLVM IR (-O0):
@.str = [17 x i8] c"Initializing HD\0A\00"
define void @hd_init() {
%1 = call i32 @kprintf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @hd_verify_DPT()
br label %3
3: ; preds = %3, %0
br label %3
}

LLVM IR (-O2):
@.str = [17 x i8] c"Initializing HD\0A\00"
define void @hd_init() {
%1 = tail call i32 @kprintf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @hd_verify_DPT()
br label %3
3: ; preds = %3, %0
br label %3
}
void ath10k_thermal_unregister(struct ath10k *ar) {}


x86 assembly (clang, -O0):
<ath10k_thermal_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ath10k_thermal_unregister>:
ret

LLVM IR (-O0):
%struct.ath10k = type opaque
define void @ath10k_thermal_unregister(%struct.ath10k* %0) {
%2 = alloca %struct.ath10k*
store %struct.ath10k* %0, %struct.ath10k** %2
ret void
}

LLVM IR (-O2):
%struct.ath10k = type opaque
define void @ath10k_thermal_unregister(%struct.ath10k* nocapture %0) {
ret void
}
/* Type definitions */
struct array {
  int dummy;
};

/* Variables and functions */
int array_set(struct array *, int /*<<< orphan*/, void const *);
int queue_swap(struct array *q, const void *data) {
  return array_set(q, 0, data);
}


x86 assembly (clang, -O0):
<queue_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <array_set@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<queue_swap>:
mov    %rsi,%rdx
xor    %esi,%esi
jmp    1030 <array_set@plt>

LLVM IR (-O0):
%struct.array = type { i32 }
define i32 @queue_swap(%struct.array* %0, i8* %1) {
%3 = alloca %struct.array*
%4 = alloca i8*
store %struct.array* %0, %struct.array** %3
store i8* %1, i8** %4
%5 = load %struct.array*, %struct.array** %3
%6 = load i8*, i8** %4
%7 = call i32 @array_set(%struct.array* %5, i32 0, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.array = type { i32 }
define i32 @queue_swap(%struct.array* %0, i8* %1) {
%3 = tail call i32 @array_set(%struct.array* %0, i32 0, i8* %1)
ret i32 %3
}
int bit_CTS(unsigned char reg_value) { return (reg_value & 0x08) == 0x08; }


x86 assembly (clang, -O0):
<bit_CTS>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x8,%eax
cmp    $0x8,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_CTS>:
shr    $0x3,%dil
and    $0x1,%dil
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @bit_CTS(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 8
%6 = icmp eq i32 %5, 8
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @bit_CTS(i8 zeroext %0) {
%2 = lshr i8 %0, 3
%3 = and i8 %2, 1
%4 = zext i8 %3 to i32
ret i32 %4
}
__attribute__((section(".after_vectors"))) void M0_IntDefaultHandler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<M0_IntDefaultHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <M0_IntDefaultHandler+0x9>
jmp    1109 <M0_IntDefaultHandler+0x9>

x86 assembly (clang, -O2):
<M0_IntDefaultHandler>:
jmp    1100 <M0_IntDefaultHandler>

LLVM IR (-O0):
define void @M0_IntDefaultHandler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @M0_IntDefaultHandler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ fd_nrf8001_bond_error(int);
int /*<<< orphan*/ fd_nrf8001_bond_success();
void fd_nrf8001_dispatch_bond_response(uint8_t status,
                                       uint8_t *response_data
                                       __attribute__((unused)),
                                       uint32_t response_data_length
                                       __attribute__((unused))) {
  if (status != 0x00) {
    fd_nrf8001_bond_error(status);
    return;
  }
  fd_nrf8001_bond_success();
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1149 <fd_nrf8001_dispatch_bond_response+0x29>
mov    -0x4(%rbp),%edi
call   1030 <fd_nrf8001_bond_error@plt>
jmp    1150 <fd_nrf8001_dispatch_bond_response+0x30>
mov    $0x0,%al
call   1040 <fd_nrf8001_bond_success@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
test   %edi,%edi
je     1129 <fd_nrf8001_dispatch_bond_response+0x9>
jmp    1030 <fd_nrf8001_bond_error@plt>
xor    %eax,%eax
jmp    1040 <fd_nrf8001_bond_success@plt>

LLVM IR (-O0):
define void @fd_nrf8001_dispatch_bond_response(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, i32* %4
%11 = call i32 @fd_nrf8001_bond_error(i32 %10)
br label %14
12: ; preds = %3
%13 = call i32 (...) @fd_nrf8001_bond_success()
br label %14
14: ; preds = %12, %9
ret void
}

LLVM IR (-O2):
define void @fd_nrf8001_dispatch_bond_response(i32 %0, i32* nocapture readnone %1, i32 %2) {
%4 = icmp eq i32 %0, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @fd_nrf8001_bond_error(i32 %0)
br label %9
7: ; preds = %3
%8 = tail call i32 (...) @fd_nrf8001_bond_success()
br label %9
9: ; preds = %7, %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gameEnd(int /*<<< orphan*/, int /*<<< orphan*/);
void intHandler(int dummy) { gameEnd(0, 0); }


x86 assembly (clang, -O0):
<intHandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %esi,%esi
mov    %esi,%edi
call   1030 <gameEnd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intHandler>:
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <gameEnd@plt>

LLVM IR (-O0):
define void @intHandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @gameEnd(i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @intHandler(i32 %0) {
%2 = tail call i32 @gameEnd(i32 0, i32 0)
ret void
}
/* Variables and functions */
int getSize(int, int, char);
int getsizeCoin(int level, char y) { return getSize(level, 2, y); }


x86 assembly (clang, -O0):
<getsizeCoin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x2,%esi
movsbl -0x5(%rbp),%edx
call   1030 <getSize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getsizeCoin>:
mov    %esi,%edx
mov    $0x2,%esi
jmp    1030 <getSize@plt>

LLVM IR (-O0):
define i32 @getsizeCoin(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i32, i32* %3
%6 = load i8, i8* %4
%7 = call i32 @getSize(i32 %5, i32 2, i8 signext %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @getsizeCoin(i32 %0, i8 signext %1) {
%3 = tail call i32 @getSize(i32 %0, i32 2, i8 signext %1)
ret i32 %3
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
void CRCConfigSet(uint32_t ui32Base, uint32_t ui32CRCConfig) {
  ;

  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000C00))) = ui32CRCConfig;
}


x86 assembly (clang, -O0):
<CRCConfigSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0xc00(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRCConfigSet>:
mov    %rsi,0xc00(%rdi)
ret

LLVM IR (-O0):
define void @CRCConfigSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 3072
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @CRCConfigSet(i64 %0, i64 %1) {
%3 = add i64 %0, 3072
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
/* Variables and functions */
double __nv_drcp_rz(double);
double __drcp_rz(double __a) { return __nv_drcp_rz(__a); }


x86 assembly (clang, -O0):
<__drcp_rz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__nv_drcp_rz@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__drcp_rz>:
jmp    1030 <__nv_drcp_rz@plt>

LLVM IR (-O0):
define double @__drcp_rz(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__nv_drcp_rz(double %3)
ret double %4
}

LLVM IR (-O2):
define double @__drcp_rz(double %0) {
%2 = tail call double @__nv_drcp_rz(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ translit_text(char *const, int const, char, char);
void nul_to_newline(char *const s, const int len) {
  translit_text(s, len, '\0', '\n');
}


x86 assembly (clang, -O0):
<nul_to_newline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
mov    $0xa,%ecx
call   1030 <translit_text@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nul_to_newline>:
xor    %edx,%edx
mov    $0xa,%ecx
jmp    1030 <translit_text@plt>

LLVM IR (-O0):
define void @nul_to_newline(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @translit_text(i8* %5, i32 %6, i8 signext 0, i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @nul_to_newline(i8* %0, i32 %1) {
%3 = tail call i32 @translit_text(i8* %0, i32 %1, i8 signext 0, i8 signext 10)
ret void
}
void sndfile_pause(struct codec *c, int p) {}


x86 assembly (clang, -O0):
<sndfile_pause>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sndfile_pause>:
ret

LLVM IR (-O0):
%struct.codec = type opaque
define void @sndfile_pause(%struct.codec* %0, i32 %1) {
%3 = alloca %struct.codec*
%4 = alloca i32
store %struct.codec* %0, %struct.codec** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.codec = type opaque
define void @sndfile_pause(%struct.codec* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pause();
void *dummy(void *arg) {
  (void)pause();
  return (arg);
}


x86 assembly (clang, -O0):
<dummy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <pause@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <pause@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @dummy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @pause()
%4 = load i8*, i8** %2
ret i8* %4
}

LLVM IR (-O2):
define i8* @dummy(i8* readnone returned %0) {
%2 = tail call i32 (...) @pause()
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void bar(int a, int b, int c, int d, int e) {
  if (d != 1)
    abort();
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
cmpl   $0x1,-0x10(%rbp)
je     1139 <bar+0x29>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
cmp    $0x1,%ecx
jne    1116 <bar+0x6>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @bar(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %9
%12 = icmp ne i32 %11, 1
br i1 %12, label %13, label %15
13: ; preds = %5
%14 = call i32 (...) @abort()
unreachable
15: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @bar(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = icmp eq i32 %3, 1
br i1 %6, label %9, label %7
7: ; preds = %5
%8 = tail call i32 (...) @abort()
unreachable
9: ; preds = %5
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *, int /*<<< orphan*/);
int create_multprec_homotopy_with_given_gamma(double gamma_re, double gamma_im,
                                              int pwt) {
  int *b, fail;
  double c[2];
  c[0] = gamma_re;
  c[1] = gamma_im;
  fail = _ada_use_c2phc(523, &pwt, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<create_multprec_homotopy_with_given_gamma>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %edi,-0x14(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x40(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x38(%rbp)
mov    -0x20(%rbp),%rdx
lea    -0x40(%rbp),%rcx
mov    $0x20b,%edi
lea    -0x14(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_multprec_homotopy_with_given_gamma>:
sub    $0x28,%rsp
mov    %edi,0xc(%rsp)
movsd  %xmm0,0x10(%rsp)
movsd  %xmm1,0x18(%rsp)
lea    0xc(%rsp),%rsi
lea    0x10(%rsp),%rcx
mov    $0x20b,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define i32 @create_multprec_homotopy_with_given_gamma(double %0, double %1, i32 %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
%9 = alloca [2 x double]
store double %0, double* %4
store double %1, double* %5
store i32 %2, i32* %6
%10 = load double, double* %4
%11 = getelementptr inbounds [2 x double], [2 x double]* %9, i64 0, i64 0
store double %10, double* %11
%12 = load double, double* %5
%13 = getelementptr inbounds [2 x double], [2 x double]* %9, i64 0, i64 1
store double %12, double* %13
%14 = load i32*, i32** %7
%15 = getelementptr inbounds [2 x double], [2 x double]* %9, i64 0, i64 0
%16 = call i32 @_ada_use_c2phc(i32 523, i32* %6, i32* %14, double* %15, i32 0)
store i32 %16, i32* %8
%17 = load i32, i32* %8
ret i32 %17
}

LLVM IR (-O2):
define i32 @create_multprec_homotopy_with_given_gamma(double %0, double %1, i32 %2) {
%4 = alloca i32
%5 = alloca [2 x double]
store i32 %2, i32* %4
%6 = bitcast [2 x double]* %5 to i8*
%7 = getelementptr inbounds [2 x double], [2 x double]* %5, i64 0, i64 0
store double %0, double* %7
%8 = getelementptr inbounds [2 x double], [2 x double]* %5, i64 0, i64 1
store double %1, double* %8
%9 = call i32 @_ada_use_c2phc(i32 523, i32* %4, i32* undef, double* %7, i32 0)
ret i32 %9
}