xunge/DecIR huggingface dataset:
/* Type definitions */
typedef scalar_t__ clock_t;

/* Variables and functions */
double CLOCKS_PER_SEC;
scalar_t__ clock();
int /*<<< orphan*/ printf(char *, double);
void stop_timer(clock_t start) {
  clock_t end = clock();
  printf("%.2f seconds\n", ((double)(end - start)) / CLOCKS_PER_SEC);
}


x86 assembly (clang, -O0):
<stop_timer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <clock@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sub    -0x8(%rbp),%rax
cvtsi2sd %rax,%xmm0
mov    0x2e9d(%rip),%rax
divsd  (%rax),%xmm0
lea    0xeaa(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stop_timer>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <clock@plt>
sub    %rbx,%rax
cvtsi2sd %rax,%xmm0
mov    0x2eae(%rip),%rax
divsd  (%rax),%xmm0
lea    0xebb(%rip),%rdi
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"%.2f seconds\0A\00"
@CLOCKS_PER_SEC = global double 0.000000e+00
define void @stop_timer(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = call i64 (...) @clock()
store i64 %4, i64* %3
%5 = load i64, i64* %3
%6 = load i64, i64* %2
%7 = sub nsw i64 %5, %6
%8 = sitofp i64 %7 to double
%9 = load double, double* @CLOCKS_PER_SEC
%10 = fdiv double %8, %9
%11 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), double %10)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"%.2f seconds\0A\00"
@CLOCKS_PER_SEC = global double 0.000000e+00
define void @stop_timer(i64 %0) {
%2 = tail call i64 (...) @clock()
%3 = sub nsw i64 %2, %0
%4 = sitofp i64 %3 to double
%5 = load double, double* @CLOCKS_PER_SEC
%6 = fdiv double %4, %5
%7 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), double %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __coverity_panic__();
void amqp_abort(const char *fmt, ...) { __coverity_panic__(); }


x86 assembly (clang, -O0):
<amqp_abort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
call   1030 <__coverity_panic__@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<amqp_abort>:
xor    %eax,%eax
jmp    1030 <__coverity_panic__@plt>

LLVM IR (-O0):
define void @amqp_abort(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @__coverity_panic__()
ret void
}

LLVM IR (-O2):
define void @amqp_abort(i8* nocapture readnone %0, ...) {
%2 = tail call i32 (...) @__coverity_panic__()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ value;
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ rgph_t1ha64s_finalise(int /*<<< orphan*/ *);
int /*<<< orphan*/ rgph_t1ha64s_fmix1(int /*<<< orphan*/, int /*<<< orphan*/ *);
int /*<<< orphan*/ rgph_t1ha64s_init(int, uintptr_t, int /*<<< orphan*/ *);
uint64_t rgph_u64_t1ha64s_u16(uint16_t value, uintptr_t seed) {
  uint64_t h[4];
  rgph_t1ha64s_init(sizeof(value), seed, h);
  rgph_t1ha64s_fmix1(value, h);
  return rgph_t1ha64s_finalise(h);
}


x86 assembly (clang, -O0):
<rgph_u64_t1ha64s_u16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    -0x20(%rbp),%rdx
mov    $0x4,%edi
call   1030 <rgph_t1ha64s_init@plt>
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
call   1050 <rgph_t1ha64s_fmix1@plt>
lea    -0x20(%rbp),%rdi
call   1040 <rgph_t1ha64s_finalise@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgph_u64_t1ha64s_u16>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %edi,%ebx
mov    %rsp,%r14
mov    $0x4,%edi
mov    %r14,%rdx
call   1030 <rgph_t1ha64s_init@plt>
mov    %ebx,%edi
mov    %r14,%rsi
call   1050 <rgph_t1ha64s_fmix1@plt>
mov    %r14,%rdi
call   1040 <rgph_t1ha64s_finalise@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @rgph_u64_t1ha64s_u16(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca [4 x i32]
store i32 %0, i32* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 0
%8 = call i32 @rgph_t1ha64s_init(i32 4, i64 %6, i32* %7)
%9 = load i32, i32* %3
%10 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 0
%11 = call i32 @rgph_t1ha64s_fmix1(i32 %9, i32* %10)
%12 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 0
%13 = call i32 @rgph_t1ha64s_finalise(i32* %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @rgph_u64_t1ha64s_u16(i32 %0, i64 %1) {
%3 = alloca [4 x i32]
%4 = bitcast [4 x i32]* %3 to i8*
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 0
%6 = call i32 @rgph_t1ha64s_init(i32 4, i64 %1, i32* %5)
%7 = call i32 @rgph_t1ha64s_fmix1(i32 %0, i32* %5)
%8 = call i32 @rgph_t1ha64s_finalise(i32* %5)
ret i32 %8
}
/* Variables and functions */
scalar_t__ in_lbx_key_charset(char);
int count_lbx_key_chars(char *s) {
  int i;
  i = 0;
  while (in_lbx_key_charset(s[i])) {
    i++;
  }
  return i;
}


x86 assembly (clang, -O0):
<count_lbx_key_chars>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <in_lbx_key_charset@plt>
cmp    $0x0,%rax
je     114c <count_lbx_key_chars+0x3c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <count_lbx_key_chars+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_lbx_key_chars>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    $0xffffffff,%ebp
nopl   0x0(%rax,%rax,1)
movsbl (%rbx),%edi
call   1030 <in_lbx_key_charset@plt>
add    $0x1,%ebp
add    $0x1,%rbx
test   %rax,%rax
jne    1120 <count_lbx_key_chars+0x10>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @count_lbx_key_chars(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = call i64 @in_lbx_key_charset(i8 signext %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @count_lbx_key_chars(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %8, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = tail call i64 @in_lbx_key_charset(i8 signext %5)
%7 = icmp eq i64 %6, 0
%8 = add nuw i64 %3, 1
br i1 %7, label %9, label %2
9: ; preds = %2
%10 = trunc i64 %3 to i32
ret i32 %10
}
/* Type definitions */
struct sockaddr_in {
  int /*<<< orphan*/ sin_addr;
};

/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int inet_pton(int /*<<< orphan*/, char *, int /*<<< orphan*/ *);
int is_valid_ip(char *ip) {
  struct sockaddr_in sa;
  int rv = inet_pton(AF_INET, ip, &(sa.sin_addr));
  return rv != 0;
}


x86 assembly (clang, -O0):
<is_valid_ip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
lea    -0x10(%rbp),%rdx
call   1030 <inet_pton@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_valid_ip>:
push   %rax
mov    %rdi,%rsi
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rdx
call   1030 <inet_pton@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
@AF_INET = global i32 0
define i32 @is_valid_ip(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.sockaddr_in
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i32, i32* @AF_INET
%6 = load i8*, i8** %2
%7 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %3, i32 0, i32 0
%8 = call i32 @inet_pton(i32 %5, i8* %6, i32* %7)
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
@AF_INET = global i32 0
define i32 @is_valid_ip(i8* %0) {
%2 = alloca %struct.sockaddr_in
%3 = bitcast %struct.sockaddr_in* %2 to i8*
%4 = load i32, i32* @AF_INET
%5 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %2, i64 0, i32 0
%6 = call i32 @inet_pton(i32 %4, i8* %0, i32* %5)
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct netfpga {
  int dummy;
};

/* Variables and functions */
int nf2_linux_read(struct netfpga *nf, void *ctx, uint32_t reg, void *buf,
                   size_t buf_len) {
  (void)nf;
  (void)ctx;
  (void)reg;
  (void)buf;
  (void)buf_len;
  return (0);
}


x86 assembly (clang, -O0):
<nf2_linux_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nf2_linux_read>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.netfpga = type { i32 }
define i32 @nf2_linux_read(%struct.netfpga* %0, i8* %1, i32 %2, i8* %3, i64 %4) {
%6 = alloca %struct.netfpga*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i64
store %struct.netfpga* %0, %struct.netfpga** %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i64 %4, i64* %10
%11 = load %struct.netfpga*, %struct.netfpga** %6
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = load i8*, i8** %9
%15 = load i64, i64* %10
ret i32 0
}

LLVM IR (-O2):
%struct.netfpga = type { i32 }
define i32 @nf2_linux_read(%struct.netfpga* nocapture readnone %0, i8* nocapture readnone %1, i32 %2, i8* nocapture readnone %3, i64 %4) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ bool_t;
typedef int /*<<< orphan*/ AUTH;

/* Variables and functions */
int /*<<< orphan*/ FALSE;
bool_t authnone_refresh(AUTH *auth) { return FALSE; }


x86 assembly (clang, -O0):
<authnone_refresh>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<authnone_refresh>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@FALSE = global i32 0
define i32 @authnone_refresh(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* @FALSE
ret i32 %3
}

LLVM IR (-O2):
@FALSE = global i32 0
define i32 @authnone_refresh(i32* nocapture readnone %0) {
%2 = load i32, i32* @FALSE
ret i32 %2
}
void av_xtea_init() {}


x86 assembly (clang, -O0):
<av_xtea_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_xtea_init>:
ret

LLVM IR (-O0):
define void @av_xtea_init() {
ret void
}

LLVM IR (-O2):
define void @av_xtea_init() {
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int detail;
};
typedef TYPE_1__ XCrossingEvent;

/* Variables and functions */
void set_XCrossingEvent_detail(void *_p, int _v) {
  ((XCrossingEvent *)_p)->detail = (int)_v;
}


x86 assembly (clang, -O0):
<set_XCrossingEvent_detail>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XCrossingEvent_detail>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XCrossingEvent_detail(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XCrossingEvent_detail(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
scalar_t__ ft_islower(int);
int ft_toupper(int c) {
  if (c < -128 || c > 255 || c == -1)
    return (c);
  if (ft_islower(c))
    c -= 32;
  return (c);
}


x86 assembly (clang, -O0):
<ft_toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0xffffff80,-0x8(%rbp)
jl     113c <ft_toupper+0x2c>
cmpl   $0xff,-0x8(%rbp)
jg     113c <ft_toupper+0x2c>
cmpl   $0xffffffff,-0x8(%rbp)
jne    1147 <ft_toupper+0x37>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1168 <ft_toupper+0x58>
mov    -0x8(%rbp),%edi
call   1030 <ft_islower@plt>
cmp    $0x0,%rax
je     1162 <ft_toupper+0x52>
mov    -0x8(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_toupper>:
push   %rbx
mov    %edi,%ebx
cmp    $0xffffffff,%edi
je     1137 <ft_toupper+0x27>
lea    -0x100(%rbx),%eax
cmp    $0xfffffe80,%eax
jb     1137 <ft_toupper+0x27>
mov    %ebx,%edi
call   1030 <ft_islower@plt>
lea    -0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ft_toupper(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, -128
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 255
br i1 %8, label %12, label %9
9: ; preds = %6
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %14
12: ; preds = %9, %6, %1
%13 = load i32, i32* %3
store i32 %13, i32* %2
br label %23
14: ; preds = %9
%15 = load i32, i32* %3
%16 = call i64 @ft_islower(i32 %15)
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %14
%19 = load i32, i32* %3
%20 = sub nsw i32 %19, 32
store i32 %20, i32* %3
br label %21
21: ; preds = %18, %14
%22 = load i32, i32* %3
store i32 %22, i32* %2
br label %23
23: ; preds = %21, %12
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @ft_toupper(i32 %0) {
%2 = add i32 %0, -256
%3 = icmp ult i32 %2, -384
%4 = icmp eq i32 %0, -1
%5 = or i1 %4, %3
br i1 %5, label %11, label %6
6: ; preds = %1
%7 = tail call i64 @ft_islower(i32 %0)
%8 = icmp eq i64 %7, 0
%9 = add nsw i32 %0, -32
%10 = select i1 %8, i32 %0, i32 %9
br label %11
11: ; preds = %1, %6
%12 = phi i32 [ %10, %6 ], [ %0, %1 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
int main(int argc, char *argv[]) {
  float f = 5.0f;
  printf("%d\n", f);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  0xed2(%rip),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeec(%rip),%rdi
movss  0xee0(%rip),%xmm0
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca float
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store float 5.000000e+00, float* %6
%7 = load float, float* %6
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), float %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), float 5.000000e+00)
ret i32 0
}
unsigned int fn8(unsigned int x) { return (x % 2) + x; }


x86 assembly (clang, -O0):
<fn8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn8>:
mov    %edi,%eax
and    $0x1,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @fn8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = urem i32 %3, 2
%5 = load i32, i32* %2
%6 = add i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @fn8(i32 %0) {
%2 = and i32 %0, 1
%3 = add i32 %2, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ sendCmd(int, char *, int);
void sketchColor(int fd, int pen) { sendCmd(fd, "color %u\n", pen ? 0 : 1); }


x86 assembly (clang, -O0):
<sketchColor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
xor    %eax,%eax
cmp    $0x0,%ecx
cmovne %eax,%edx
lea    0xec8(%rip),%rsi
call   1030 <sendCmd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sketchColor>:
xor    %edx,%edx
test   %esi,%esi
sete   %dl
lea    0xee2(%rip),%rsi
jmp    1030 <sendCmd@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"color %u\0A\00"
define void @sketchColor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 0, i32 1
%10 = call i32 @sendCmd(i32 %5, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"color %u\0A\00"
define void @sketchColor(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @sendCmd(i32 %0, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}
foo() { void bar(void); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define i32 @foo() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @foo() {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;

/* Variables and functions */
int setuid(int /*<<< orphan*/);
int pthread_setuid_np(uid_t uid) { return setuid(uid); }


x86 assembly (clang, -O0):
<pthread_setuid_np>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <setuid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_setuid_np>:
jmp    1030 <setuid@plt>

LLVM IR (-O0):
define i32 @pthread_setuid_np(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @setuid(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @pthread_setuid_np(i32 %0) {
%2 = tail call i32 @setuid(i32 %0)
ret i32 %2
}
/* Type definitions */
struct sembuf {
  int sem_num;
  int sem_op;
  scalar_t__ sem_flg;
};

/* Variables and functions */
int /*<<< orphan*/ semop(int, struct sembuf *, int);
int sem_v(int semid, int semnum) {
  struct sembuf cmd;
  cmd.sem_num = semnum;
  cmd.sem_op = 1;
  cmd.sem_flg = 0;
  semop(semid, &cmd, 1);
}


x86 assembly (clang, -O0):
<sem_v>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x20(%rbp)
movl   $0x1,-0x1c(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x20(%rbp),%rsi
mov    $0x1,%edx
call   1030 <semop@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sem_v>:
sub    $0x18,%rsp
mov    %esi,0x8(%rsp)
movl   $0x1,0xc(%rsp)
movq   $0x0,0x10(%rsp)
lea    0x8(%rsp),%rsi
mov    $0x1,%edx
call   1030 <semop@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.sembuf = type { i32, i32, i64 }
define i32 @sem_v(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.sembuf
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %6, i32 0, i32 0
store i32 %7, i32* %8
%9 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %6, i32 0, i32 1
store i32 1, i32* %9
%10 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %6, i32 0, i32 2
store i64 0, i64* %10
%11 = load i32, i32* %4
%12 = call i32 @semop(i32 %11, %struct.sembuf* %6, i32 1)
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
%struct.sembuf = type { i32, i32, i64 }
define i32 @sem_v(i32 %0, i32 %1) {
%3 = alloca %struct.sembuf
%4 = bitcast %struct.sembuf* %3 to i8*
%5 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %3, i64 0, i32 0
store i32 %1, i32* %5
%6 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %3, i64 0, i32 1
store i32 1, i32* %6
%7 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %3, i64 0, i32 2
store i64 0, i64* %7
%8 = call i32 @semop(i32 %0, %struct.sembuf* %3, i32 1)
ret i32 undef
}
void *ERR_CAST(void *ptr) { return (void *)ptr; }


x86 assembly (clang, -O0):
<ERR_CAST>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ERR_CAST>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @ERR_CAST(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @ERR_CAST(i8* readnone returned %0) {
ret i8* %0
}
__attribute__((no, noclone)) void *foo(void *p, unsigned int q) {
  return __builtin_memset(p, 0, q * 4UL);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    %rdi,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%edx
shl    $0x2,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %esi,%edx
shl    $0x2,%rdx
xor    %esi,%esi
jmp    1030 <memset@plt>

LLVM IR (-O0):
define i8* @foo(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = zext i32 %6 to i64
%8 = mul i64 %7, 4
ret i8* %5
}

LLVM IR (-O2):
define i8* @foo(i8* returned writeonly %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = shl nuw nsw i64 %3, 2
tail call void @llvm.memset.p0i8.i64(i8* align 1 %0, i8 0, i64 %4, i1 false)
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ HplAtmRfa1TimerMacP__Counter__start();
void AtmegaCounterP__0__AtmegaCounter__start(void) {
  HplAtmRfa1TimerMacP__Counter__start();
}


x86 assembly (clang, -O0):
<AtmegaCounterP__0__AtmegaCounter__start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtmRfa1TimerMacP__Counter__start@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AtmegaCounterP__0__AtmegaCounter__start>:
xor    %eax,%eax
jmp    1030 <HplAtmRfa1TimerMacP__Counter__start@plt>

LLVM IR (-O0):
define void @AtmegaCounterP__0__AtmegaCounter__start() {
%1 = call i32 (...) @HplAtmRfa1TimerMacP__Counter__start()
ret void
}

LLVM IR (-O2):
define void @AtmegaCounterP__0__AtmegaCounter__start() {
%1 = tail call i32 (...) @HplAtmRfa1TimerMacP__Counter__start()
ret void
}
int foo(int x, int y) {
  int i = 0;
  if (x == y)
    return x;
  while (i <= x) {
    if (x > 0)
      y = y + x;
  }
  return y;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1128 <foo+0x28>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1157 <foo+0x57>
jmp    112d <foo+0x2d>
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1151 <foo+0x51>
cmpl   $0x0,-0x8(%rbp)
jle    114c <foo+0x4c>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    112d <foo+0x2d>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 0, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp eq i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32, i32* %4
store i32 %11, i32* %3
br label %27
12: ; preds = %2
br label %13
13: ; preds = %24, %12
%14 = load i32, i32* %6
%15 = load i32, i32* %4
%16 = icmp sle i32 %14, %15
br i1 %16, label %17, label %25
17: ; preds = %13
%18 = load i32, i32* %4
%19 = icmp sgt i32 %18, 0
br i1 %19, label %20, label %24
20: ; preds = %17
%21 = load i32, i32* %5
%22 = load i32, i32* %4
%23 = add nsw i32 %21, %22
store i32 %23, i32* %5
br label %24
24: ; preds = %20, %17
br label %13
25: ; preds = %13
%26 = load i32, i32* %5
store i32 %26, i32* %3
br label %27
27: ; preds = %25, %10
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
ret i32 %1
}
double vector_magnitude_squared_2d(const double v[2]) {
  return v[0] * v[0] + v[1] * v[1];
}


x86 assembly (clang, -O0):
<vector_magnitude_squared_2d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm1
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_magnitude_squared_2d>:
movsd  (%rdi),%xmm0
movsd  0x8(%rdi),%xmm1
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @vector_magnitude_squared_2d(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = fmul double %11, %14
%16 = call double @llvm.fmuladd.f64(double %5, double %8, double %15)
ret double %16
}

LLVM IR (-O2):
define double @vector_magnitude_squared_2d(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fmul double %4, %4
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
scalar_t__ malloc(int);
int /*<<< orphan*/ stderr;
int *int_vector(int len) {
  int *v;
  v = (int *)malloc((len + 1) * sizeof(int));
  if (!v) {
    fprintf(stderr, "Can not allocate int vector (%i)\n", len);
    exit(1);
  }
  *(int *)v = len;
  return v;
}


x86 assembly (clang, -O0):
<int_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x2,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    117f <int_vector+0x4f>
mov    0x2e7c(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
lea    0xe90(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_vector>:
push   %rbx
mov    %edi,%ebx
lea    0x4(,%rbx,4),%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1148 <int_vector+0x18>
mov    %ebx,(%rax)
pop    %rbx
ret
mov    0x2e91(%rip),%rax
mov    (%rax),%edi
lea    0xea8(%rip),%rsi
mov    %ebx,%edx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [34 x i8] c"Can not allocate int vector (%i)\0A\00"
define i32* @int_vector(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
%6 = sext i32 %5 to i64
%7 = mul i64 %6, 4
%8 = trunc i64 %7 to i32
%9 = call i64 @malloc(i32 %8)
%10 = inttoptr i64 %9 to i32*
store i32* %10, i32** %3
%11 = load i32*, i32** %3
%12 = icmp ne i32* %11, null
br i1 %12, label %18, label %13
13: ; preds = %1
%14 = load i32, i32* @stderr
%15 = load i32, i32* %2
%16 = call i32 @fprintf(i32 %14, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %15)
%17 = call i32 @exit(i32 1)
unreachable
18: ; preds = %1
%19 = load i32, i32* %2
%20 = load i32*, i32** %3
store i32 %19, i32* %20
%21 = load i32*, i32** %3
ret i32* %21
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [34 x i8] c"Can not allocate int vector (%i)\0A\00"
define i32* @int_vector(i32 %0) {
%2 = shl i32 %0, 2
%3 = add i32 %2, 4
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i32*
%6 = icmp eq i64 %4, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* @stderr
%9 = tail call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i32 %0)
%10 = tail call i32 @exit(i32 1)
unreachable
11: ; preds = %1
store i32 %0, i32* %5
ret i32* %5
}
/* Variables and functions */
int /*<<< orphan*/ _SC_NPROCESSORS_ONLN;
int sysconf(int /*<<< orphan*/);
int corecount(void) {
  int number_of_cores = sysconf(_SC_NPROCESSORS_ONLN);
  return number_of_cores;
}


x86 assembly (clang, -O0):
<corecount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<corecount>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <sysconf@plt>

LLVM IR (-O0):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @corecount() {
%1 = alloca i32
%2 = load i32, i32* @_SC_NPROCESSORS_ONLN
%3 = call i32 @sysconf(i32 %2)
store i32 %3, i32* %1
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @corecount() {
%1 = load i32, i32* @_SC_NPROCESSORS_ONLN
%2 = tail call i32 @sysconf(i32 %1)
ret i32 %2
}
/* Type definitions */
struct grid_epbase {
  int dummy;
};

/* Variables and functions */
int grid_cinproc_create(void *, struct grid_epbase **);
int grid_inproc_connect(void *hint, struct grid_epbase **epbase) {
  return grid_cinproc_create(hint, epbase);
}


x86 assembly (clang, -O0):
<grid_inproc_connect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <grid_cinproc_create@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grid_inproc_connect>:
jmp    1030 <grid_cinproc_create@plt>

LLVM IR (-O0):
%struct.grid_epbase = type { i32 }
define i32 @grid_inproc_connect(i8* %0, %struct.grid_epbase** %1) {
%3 = alloca i8*
%4 = alloca %struct.grid_epbase**
store i8* %0, i8** %3
store %struct.grid_epbase** %1, %struct.grid_epbase*** %4
%5 = load i8*, i8** %3
%6 = load %struct.grid_epbase**, %struct.grid_epbase*** %4
%7 = call i32 @grid_cinproc_create(i8* %5, %struct.grid_epbase** %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.grid_epbase = type { i32 }
define i32 @grid_inproc_connect(i8* %0, %struct.grid_epbase** %1) {
%3 = tail call i32 @grid_cinproc_create(i8* %0, %struct.grid_epbase** %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char *, int);
void newDbStrNcpy(char *dst, char *src, int max) {
  if (dst) {
    if (src) {
      strncpy(dst, src, max);
      dst[max] = '\0';
    }
  }
}


x86 assembly (clang, -O0):
<newDbStrNcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     115a <newDbStrNcpy+0x4a>
cmpq   $0x0,-0x10(%rbp)
je     1155 <newDbStrNcpy+0x45>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
jmp    115a <newDbStrNcpy+0x4a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newDbStrNcpy>:
test   %rdi,%rdi
je     1134 <newDbStrNcpy+0x24>
test   %rsi,%rsi
je     1134 <newDbStrNcpy+0x24>
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %rdi,%rbx
call   1030 <strncpy@plt>
movslq %ebp,%rax
movb   $0x0,(%rbx,%rax,1)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @newDbStrNcpy(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %22
9: ; preds = %3
%10 = load i8*, i8** %5
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %21
12: ; preds = %9
%13 = load i8*, i8** %4
%14 = load i8*, i8** %5
%15 = load i32, i32* %6
%16 = call i32 @strncpy(i8* %13, i8* %14, i32 %15)
%17 = load i8*, i8** %4
%18 = load i32, i32* %6
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
store i8 0, i8* %20
br label %21
21: ; preds = %12, %9
br label %22
22: ; preds = %21, %3
ret void
}

LLVM IR (-O2):
define void @newDbStrNcpy(i8* %0, i8* %1, i32 %2) {
%4 = icmp ne i8* %0, null
%5 = icmp ne i8* %1, null
%6 = and i1 %4, %5
br i1 %6, label %7, label %11
7: ; preds = %3
%8 = tail call i32 @strncpy(i8* %0, i8* %1, i32 %2)
%9 = sext i32 %2 to i64
%10 = getelementptr inbounds i8, i8* %0, i64 %9
store i8 0, i8* %10
br label %11
11: ; preds = %7, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CloseFsChannel();
void ServerClose(void) { CloseFsChannel(); }


x86 assembly (clang, -O0):
<ServerClose>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CloseFsChannel@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ServerClose>:
xor    %eax,%eax
jmp    1030 <CloseFsChannel@plt>

LLVM IR (-O0):
define void @ServerClose() {
%1 = call i32 (...) @CloseFsChannel()
ret void
}

LLVM IR (-O2):
define void @ServerClose() {
%1 = tail call i32 (...) @CloseFsChannel()
ret void
}
/* Variables and functions */
#define SIGPIPE 128
int /*<<< orphan*/ close_client();
int /*<<< orphan*/ connect_server();
int /*<<< orphan*/ init_clinet();
void catch_signal(int sign) {
  switch (sign) {
  case SIGPIPE:
    close_client();
    init_clinet();
    connect_server();
    break;
  }
}


x86 assembly (clang, -O0):
<catch_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x80,%eax
jne    1163 <catch_signal+0x33>
jmp    114e <catch_signal+0x1e>
mov    $0x0,%al
call   1030 <close_client@plt>
mov    $0x0,%al
call   1050 <init_clinet@plt>
mov    $0x0,%al
call   1040 <connect_server@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<catch_signal>:
cmp    $0x80,%edi
jne    114f <catch_signal+0x1f>
push   %rax
xor    %eax,%eax
call   1030 <close_client@plt>
xor    %eax,%eax
call   1050 <init_clinet@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <connect_server@plt>
ret

LLVM IR (-O0):
define void @catch_signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %8 [
i32 128, label %4
]
4: ; preds = %1
%5 = call i32 (...) @close_client()
%6 = call i32 (...) @init_clinet()
%7 = call i32 (...) @connect_server()
br label %8
8: ; preds = %1, %4
ret void
}

LLVM IR (-O2):
define void @catch_signal(i32 %0) {
%2 = icmp eq i32 %0, 128
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = tail call i32 (...) @close_client()
%5 = tail call i32 (...) @init_clinet()
%6 = tail call i32 (...) @connect_server()
br label %7
7: ; preds = %1, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ call_module(char *);
int /*<<< orphan*/ spar_module(char *, float, float);
int /*<<< orphan*/ sprintf(char *, char *, int /*<<< orphan*/);
void spar(float length, float angle) {
  static int modnum = 0;
  char modname[30];
  sprintf(modname, "spar_%d", modnum++);
  spar_module(modname, length, angle);
  call_module(modname);
}


x86 assembly (clang, -O0):
<spar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
lea    -0x30(%rbp),%rdi
mov    0x2ef0(%rip),%edx
mov    %edx,%eax
add    $0x1,%eax
mov    %eax,0x2ee5(%rip)
lea    0xea2(%rip),%rsi
call   1050 <sprintf@plt>
lea    -0x30(%rbp),%rdi
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1040 <spar_module@plt>
lea    -0x30(%rbp),%rdi
call   1030 <call_module@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spar>:
push   %rbx
sub    $0x30,%rsp
movss  %xmm1,0xc(%rsp)
movss  %xmm0,0x8(%rsp)
mov    0x2ef5(%rip),%edx
lea    0x1(%rdx),%eax
mov    %eax,0x2eec(%rip)
lea    0xea9(%rip),%rsi
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
call   1050 <sprintf@plt>
mov    %rbx,%rdi
movss  0x8(%rsp),%xmm0
movss  0xc(%rsp),%xmm1
call   1040 <spar_module@plt>
mov    %rbx,%rdi
call   1030 <call_module@plt>
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@spar.modnum = internal global i32 0
@.str = [8 x i8] c"spar_%d\00"
define void @spar(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca [30 x i8]
store float %0, float* %3
store float %1, float* %4
%6 = getelementptr inbounds [30 x i8], [30 x i8]* %5, i64 0, i64 0
%7 = load i32, i32* @spar.modnum
%8 = add nsw i32 %7, 1
store i32 %8, i32* @spar.modnum
%9 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %7)
%10 = getelementptr inbounds [30 x i8], [30 x i8]* %5, i64 0, i64 0
%11 = load float, float* %3
%12 = load float, float* %4
%13 = call i32 @spar_module(i8* %10, float %11, float %12)
%14 = getelementptr inbounds [30 x i8], [30 x i8]* %5, i64 0, i64 0
%15 = call i32 @call_module(i8* %14)
ret void
}

LLVM IR (-O2):
@spar.modnum = internal unnamed_addr global i32 0
@.str = [8 x i8] c"spar_%d\00"
define void @spar(float %0, float %1) {
%3 = alloca [30 x i8]
%4 = getelementptr inbounds [30 x i8], [30 x i8]* %3, i64 0, i64 0
%5 = load i32, i32* @spar.modnum
%6 = add nsw i32 %5, 1
store i32 %6, i32* @spar.modnum
%7 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %5)
%8 = call i32 @spar_module(i8* %4, float %0, float %1)
%9 = call i32 @call_module(i8* %4)
ret void
}
int DiagOpenStdio(void) { return (-1); }


x86 assembly (clang, -O0):
<DiagOpenStdio>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DiagOpenStdio>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @DiagOpenStdio() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @DiagOpenStdio() {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ putchar(int);
void print_bits(int val, int n) {
  int i;
  for (i = n - 1; i >= 0; i--) {
    putchar('0' + ((val >> i) & 1));
  }
}


x86 assembly (clang, -O0):
<print_bits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jl     1152 <print_bits+0x42>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%ecx
sar    %cl,%edi
and    $0x1,%edi
add    $0x30,%edi
call   1030 <putchar@plt>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <print_bits+0x17>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_bits>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
jle    113a <print_bits+0x2a>
mov    %esi,%ebx
mov    %edi,%ebp
add    $0x1,%ebx
xchg   %ax,%ax
lea    -0x2(%rbx),%ecx
mov    %ebp,%edi
shr    %cl,%edi
and    $0x1,%edi
or     $0x30,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1120 <print_bits+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @print_bits(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
store i32 %7, i32* %5
br label %8
8: ; preds = %18, %2
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %8
%12 = load i32, i32* %3
%13 = load i32, i32* %5
%14 = ashr i32 %12, %13
%15 = and i32 %14, 1
%16 = add nsw i32 48, %15
%17 = call i32 @putchar(i32 %16)
br label %18
18: ; preds = %11
%19 = load i32, i32* %5
%20 = add nsw i32 %19, -1
store i32 %20, i32* %5
br label %8
21: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @print_bits(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %1, %2 ]
%6 = add nsw i32 %5, -1
%7 = lshr i32 %0, %6
%8 = and i32 %7, 1
%9 = or i32 %8, 48
%10 = tail call i32 @putchar(i32 %9)
%11 = icmp ugt i32 %5, 1
br i1 %11, label %4, label %12
12: ; preds = %4, %2
ret void
}
/* Variables and functions */
void *realloc(void *, size_t);
void *ndb_realloc(void *m_ptr, size_t i_size, char *i_remark) {
  return realloc(m_ptr, i_size);
}


x86 assembly (clang, -O0):
<ndb_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndb_realloc>:
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @ndb_realloc(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = call i8* @realloc(i8* %7, i64 %8)
ret i8* %9
}

LLVM IR (-O2):
define noalias i8* @ndb_realloc(i8* nocapture %0, i64 %1, i8* nocapture readnone %2) {
%4 = tail call i8* @realloc(i8* %0, i64 %1)
ret i8* %4
}
int f_lt_rc1(float a1) { return (((a1) < (100))); }


x86 assembly (clang, -O0):
<f_lt_rc1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_lt_rc1>:
movss  0xef8(%rip),%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
seta   %al
ret

LLVM IR (-O0):
define i32 @f_lt_rc1(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp olt float %3, 1.000000e+02
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @f_lt_rc1(float %0) {
%2 = fcmp olt float %0, 1.000000e+02
%3 = zext i1 %2 to i32
ret i32 %3
}
int __attribute__((const)) mod2_int(int top, int mod) {
  return (top & (mod - 1));
}


x86 assembly (clang, -O0):
<mod2_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod2_int>:
lea    -0x1(%rsi),%eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @mod2_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = and i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @mod2_int(i32 %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = and i32 %3, %0
ret i32 %4
}
__attribute__((always_)) void __set_64bit(unsigned long long *ptr,
                                          unsigned int low, unsigned int high) {
  asm volatile("\n1:\t"
               "movl (%0), %%eax\n\t"
               "movl 4(%0), %%edx\n\t"
               ""
               "cmpxchg8b (%0)\n\t"
               "jnz 1b"
               :
               : "D"(ptr), "b"(low), "c"(high)
               : "ax", "dx", "memory");
}


x86 assembly (clang, -O0):
<__set_64bit>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%ebx
mov    -0x18(%rbp),%ecx
mov    (%rdi),%eax
mov    0x4(%rdi),%edx
cmpxchg8b (%rdi)
jne    1119 <__set_64bit+0x19>
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<__set_64bit>:
push   %rbx
mov    %edx,%ecx
mov    %esi,%ebx
mov    (%rdi),%eax
mov    0x4(%rdi),%edx
cmpxchg8b (%rdi)
jne    1105 <__set_64bit+0x5>
pop    %rbx
ret

LLVM IR (-O0):
define void @__set_64bit(i64* %0, i32 %1, i32 %2) {
%4 = alloca i64*
%5 = alloca i32
%6 = alloca i32
store i64* %0, i64** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i64*, i64** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
ret void
}

LLVM IR (-O2):
define void @__set_64bit(i64* %0, i32 %1, i32 %2) {
tail call void asm sideeffect "\0A1:\09movl ($0), %eax\0A\09movl 4($0), %edx\0A\09cmpxchg8b ($0)\0A\09jnz 1b", "{di},{bx},{cx},~{ax},~{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %0, i32 %1, i32 %2)
ret void
}
int null_readtoc(unsigned char *b, unsigned char starttrack, int msf,
                 int maxlen, int single) {
  return 0;
}


x86 assembly (clang, -O0):
<null_readtoc>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_readtoc>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @null_readtoc(i8* %0, i8 zeroext %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i8 %1, i8* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
ret i32 0
}

LLVM IR (-O2):
define i32 @null_readtoc(i8* nocapture readnone %0, i8 zeroext %1, i32 %2, i32 %3, i32 %4) {
ret i32 0
}
int f_bgt_rr2(float a1, float a2) { return !(__builtin_isgreater(a1, a2)); }


x86 assembly (clang, -O0):
<f_bgt_rr2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_bgt_rr2>:
xor    %eax,%eax
ucomiss %xmm1,%xmm0
setbe  %al
ret

LLVM IR (-O0):
define i32 @f_bgt_rr2(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp ogt float %5, %6
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @f_bgt_rr2(float %0, float %1) {
%3 = fcmp ule float %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
float floor(float);
float roundToInteger(float number) { return floor(number + .5); }


x86 assembly (clang, -O0):
<roundToInteger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xed2(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roundToInteger>:
addss  0xee8(%rip),%xmm0
jmp    1030 <floorf@plt>

LLVM IR (-O0):
define float @roundToInteger(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fadd double %4, 5.000000e-01
%6 = fptrunc double %5 to float
%7 = call float @floor(float %6)
ret float %7
}

LLVM IR (-O2):
define float @roundToInteger(float %0) {
%2 = fadd float %0, 5.000000e-01
%3 = tail call float @llvm.floor.f32(float %2)
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ w5100_writeSn_byte(unsigned int, int, unsigned int);
void w5100_writeSnTTL(unsigned sock, unsigned data) {
  w5100_writeSn_byte(sock, 0x0016, data);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x16,%esi
call   1030 <w5100_writeSn_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %esi,%edx
mov    $0x16,%esi
jmp    1030 <w5100_writeSn_byte@plt>

LLVM IR (-O0):
define void @w5100_writeSnTTL(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @w5100_writeSn_byte(i32 %5, i32 22, i32 %6)
ret void
}

LLVM IR (-O2):
define void @w5100_writeSnTTL(i32 %0, i32 %1) {
%3 = tail call i32 @w5100_writeSn_byte(i32 %0, i32 22, i32 %1)
ret void
}