unsigned long long flip_B3(const unsigned long long P,
                           const unsigned long long O) {
  unsigned long long flipped, outflank_v, outflank_h, outflank_d9;
  outflank_v = ((O | ~0x0202020202000000ULL) + 0x0000000002000000ULL) & P &
               0x0202020202000000ULL;
  flipped =
      (outflank_v - (unsigned int)(outflank_v != 0)) & 0x0202020202000000ULL;
  outflank_h = ((O & 0x00000000007c0000ULL) + 0x0000000000040000ULL) & P;
  flipped |= (outflank_h - (outflank_h >> 8)) & 0x00000000007c0000ULL;
  outflank_d9 = ((O | ~0x4020100804000000ULL) + 0x0000000004000000ULL) & P &
                0x4020100804000000ULL;
  flipped |=
      (outflank_d9 - (unsigned int)(outflank_d9 != 0)) & 0x4020100804000000ULL;
  flipped |= (((P << 8) & 0x0000000000000200ULL) |
              ((P << 7) & 0x0000000000000400ULL)) &
             O;
  return flipped;
}


x86 assembly (clang, -O0):
<flip_B3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movabs $0xfdfdfdfdfdffffff,%rax
fd fd fd
or     -0x10(%rbp),%rax
add    $0x2000000,%rax
and    -0x8(%rbp),%rax
movabs $0x202020202000000,%rcx
02 02 02
and    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmpq   $0x0,-0x20(%rbp)
setne  %cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,%ecx
sub    %rcx,%rax
movabs $0x202020202000000,%rcx
02 02 02
and    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
and    $0x7c0000,%rax
add    $0x40000,%rax
and    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    -0x28(%rbp),%rcx
shr    $0x8,%rcx
sub    %rcx,%rax
and    $0x7c0000,%rax
or     -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
movabs $0xbfdfeff7fbffffff,%rax
ef df bf
or     -0x10(%rbp),%rax
add    $0x4000000,%rax
and    -0x8(%rbp),%rax
movabs $0x4020100804000000,%rcx
10 20 40
and    %rcx,%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
cmpq   $0x0,-0x30(%rbp)
setne  %cl
and    $0x1,%cl
movzbl %cl,%ecx
mov    %ecx,%ecx
sub    %rcx,%rax
movabs $0x4020100804000000,%rcx
10 20 40
and    %rcx,%rax
or     -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x8,%rax
and    $0x200,%rax
mov    -0x8(%rbp),%rcx
shl    $0x7,%rcx
and    $0x400,%rcx
or     %rcx,%rax
and    -0x10(%rbp),%rax
or     -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip_B3>:
mov    %rdi,%rax
movabs $0x1fdfdfdfdffffff,%rdx
fd fd 01
or     %rsi,%rdx
add    $0x2000000,%rdx
movabs $0x202020202000000,%rdi
02 02 02
mov    %rax,%r9
and    %rdi,%r9
and    %rdx,%r9
cmp    $0x1,%r9
adc    $0xffffffffffffffff,%r9
and    %rdi,%r9
mov    %esi,%edx
and    $0x7c0000,%edx
add    $0x40000,%edx
and    %eax,%edx
mov    %edx,%edi
shr    $0x8,%edi
sub    %edi,%edx
and    $0x7c0000,%edx
movabs $0x3fdfeff7fbffffff,%rdi
ef df 3f
or     %rsi,%rdi
add    $0x4000000,%rdi
movabs $0x4020100804000000,%r8
10 20 40
mov    %rax,%rcx
and    %r8,%rcx
and    %rcx,%rdi
cmp    $0x1,%rdi
adc    $0xffffffffffffffff,%rdi
and    %r8,%rdi
mov    %eax,%ecx
and    $0x2,%ecx
shl    $0x8,%ecx
and    $0x8,%eax
shl    $0x7,%eax
or     %ecx,%eax
and    %esi,%eax
or     %rdx,%rax
or     %r9,%rax
or     %rdi,%rax
ret

LLVM IR (-O0):
define i64 @flip_B3(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%9 = load i64, i64* %4
%10 = or i64 %9, -144680345676021761
%11 = add i64 %10, 33554432
%12 = load i64, i64* %3
%13 = and i64 %11, %12
%14 = and i64 %13, 144680345676021760
store i64 %14, i64* %6
%15 = load i64, i64* %6
%16 = load i64, i64* %6
%17 = icmp ne i64 %16, 0
%18 = zext i1 %17 to i32
%19 = zext i32 %18 to i64
%20 = sub i64 %15, %19
%21 = and i64 %20, 144680345676021760
store i64 %21, i64* %5
%22 = load i64, i64* %4
%23 = and i64 %22, 8126464
%24 = add i64 %23, 262144
%25 = load i64, i64* %3
%26 = and i64 %24, %25
store i64 %26, i64* %7
%27 = load i64, i64* %7
%28 = load i64, i64* %7
%29 = lshr i64 %28, 8
%30 = sub i64 %27, %29
%31 = and i64 %30, 8126464
%32 = load i64, i64* %5
%33 = or i64 %32, %31
store i64 %33, i64* %5
%34 = load i64, i64* %4
%35 = or i64 %34, -4620710844295020545
%36 = add i64 %35, 67108864
%37 = load i64, i64* %3
%38 = and i64 %36, %37
%39 = and i64 %38, 4620710844295020544
store i64 %39, i64* %8
%40 = load i64, i64* %8
%41 = load i64, i64* %8
%42 = icmp ne i64 %41, 0
%43 = zext i1 %42 to i32
%44 = zext i32 %43 to i64
%45 = sub i64 %40, %44
%46 = and i64 %45, 4620710844295020544
%47 = load i64, i64* %5
%48 = or i64 %47, %46
store i64 %48, i64* %5
%49 = load i64, i64* %3
%50 = shl i64 %49, 8
%51 = and i64 %50, 512
%52 = load i64, i64* %3
%53 = shl i64 %52, 7
%54 = and i64 %53, 1024
%55 = or i64 %51, %54
%56 = load i64, i64* %4
%57 = and i64 %55, %56
%58 = load i64, i64* %5
%59 = or i64 %58, %57
store i64 %59, i64* %5
%60 = load i64, i64* %5
ret i64 %60
}

LLVM IR (-O2):
define i64 @flip_B3(i64 %0, i64 %1) {
%3 = or i64 %1, 143550030475689983
%4 = add i64 %3, 33554432
%5 = and i64 %0, 144680345676021760
%6 = and i64 %5, %4
%7 = icmp ne i64 %6, 0
%8 = sext i1 %7 to i64
%9 = add nsw i64 %6, %8
%10 = and i64 %9, 144680345676021760
%11 = and i64 %1, 8126464
%12 = add nuw nsw i64 %11, 262144
%13 = and i64 %12, %0
%14 = lshr exact i64 %13, 8
%15 = sub nsw i64 %13, %14
%16 = and i64 %15, 8126464
%17 = or i64 %1, 4602661192559755263
%18 = add i64 %17, 67108864
%19 = and i64 %0, 4620710844295020544
%20 = and i64 %19, %18
%21 = icmp ne i64 %20, 0
%22 = sext i1 %21 to i64
%23 = add nsw i64 %20, %22
%24 = and i64 %23, 4620710844295020544
%25 = shl i64 %0, 8
%26 = and i64 %25, 512
%27 = shl i64 %0, 7
%28 = and i64 %27, 1024
%29 = or i64 %26, %28
%30 = and i64 %29, %1
%31 = or i64 %16, %30
%32 = or i64 %31, %10
%33 = or i64 %32, %24
ret i64 %33
}