xunge/DecIR huggingface dataset:
void scale3d(double *v1, double v0, double *v2) {
  v2[0] = v1[0] * v0;
  v2[1] = v1[1] * v0;
  v2[2] = v1[2] * v0;
}


x86 assembly (clang, -O0):
<scale3d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<scale3d>:
movsd  (%rdi),%xmm1
mulsd  %xmm0,%xmm1
movsd  %xmm1,(%rsi)
movsd  0x8(%rdi),%xmm1
mulsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rsi)
mulsd  0x10(%rdi),%xmm0
movsd  %xmm0,0x10(%rsi)
ret

LLVM IR (-O0):
define void @scale3d(double* %0, double %1, double* %2) {
%4 = alloca double*
%5 = alloca double
%6 = alloca double*
store double* %0, double** %4
store double %1, double* %5
store double* %2, double** %6
%7 = load double*, double** %4
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = load double, double* %5
%11 = fmul double %9, %10
%12 = load double*, double** %6
%13 = getelementptr inbounds double, double* %12, i64 0
store double %11, double* %13
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 1
%16 = load double, double* %15
%17 = load double, double* %5
%18 = fmul double %16, %17
%19 = load double*, double** %6
%20 = getelementptr inbounds double, double* %19, i64 1
store double %18, double* %20
%21 = load double*, double** %4
%22 = getelementptr inbounds double, double* %21, i64 2
%23 = load double, double* %22
%24 = load double, double* %5
%25 = fmul double %23, %24
%26 = load double*, double** %6
%27 = getelementptr inbounds double, double* %26, i64 2
store double %25, double* %27
ret void
}

LLVM IR (-O2):
define void @scale3d(double* nocapture %0, double %1, double* nocapture writeonly %2) {
%4 = load double, double* %0
%5 = fmul double %4, %1
store double %5, double* %2
%6 = getelementptr inbounds double, double* %0, i64 1
%7 = load double, double* %6
%8 = fmul double %7, %1
%9 = getelementptr inbounds double, double* %2, i64 1
store double %8, double* %9
%10 = getelementptr inbounds double, double* %0, i64 2
%11 = load double, double* %10
%12 = fmul double %11, %1
%13 = getelementptr inbounds double, double* %2, i64 2
store double %12, double* %13
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
int main(void) {
  float answer = 17 / (float)13;
  printf("%.2f\n", answer);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  0xee0(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeec(%rip),%rdi
movss  0xee0(%rip),%xmm0
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%.2f\0A\00"
define i32 @main() {
%1 = alloca float
store float 0x3FF4EC4EC0000000, float* %1
%2 = load float, float* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), float %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%.2f\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), float 0x3FF4EC4EC0000000)
ret i32 0
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int create_homotopy_with_given_gamma(double gamma_re, double gamma_im) {
  int *a, *b, fail;
  double c[2];
  c[0] = gamma_re;
  c[1] = gamma_im;
  fail = _ada_use_c2phc4c(153, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<create_homotopy_with_given_gamma>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x40(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x38(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
lea    -0x40(%rbp),%rcx
mov    $0x99,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_homotopy_with_given_gamma>:
sub    $0x18,%rsp
movsd  %xmm0,(%rsp)
movsd  %xmm1,0x8(%rsp)
mov    %rsp,%rcx
mov    $0x99,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @create_homotopy_with_given_gamma(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca [2 x double]
store double %0, double* %3
store double %1, double* %4
%9 = load double, double* %3
%10 = getelementptr inbounds [2 x double], [2 x double]* %8, i64 0, i64 0
store double %9, double* %10
%11 = load double, double* %4
%12 = getelementptr inbounds [2 x double], [2 x double]* %8, i64 0, i64 1
store double %11, double* %12
%13 = load i32*, i32** %5
%14 = load i32*, i32** %6
%15 = getelementptr inbounds [2 x double], [2 x double]* %8, i64 0, i64 0
%16 = call i32 @_ada_use_c2phc4c(i32 153, i32* %13, i32* %14, double* %15, i32 0)
store i32 %16, i32* %7
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @create_homotopy_with_given_gamma(double %0, double %1) {
%3 = alloca [2 x double]
%4 = bitcast [2 x double]* %3 to i8*
%5 = getelementptr inbounds [2 x double], [2 x double]* %3, i64 0, i64 0
store double %0, double* %5
%6 = getelementptr inbounds [2 x double], [2 x double]* %3, i64 0, i64 1
store double %1, double* %6
%7 = call i32 @_ada_use_c2phc4c(i32 153, i32* undef, i32* undef, double* %5, i32 0)
ret i32 %7
}
void get_stepping_info(int *chip, int *major, int *minor) {
  *chip = 0x5;
  *major = 0x1;
  *minor = 0x0;
}


x86 assembly (clang, -O0):
<get_stepping_info>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x5,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_stepping_info>:
movl   $0x5,(%rdi)
movl   $0x1,(%rsi)
movl   $0x0,(%rdx)
ret

LLVM IR (-O0):
define void @get_stepping_info(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
store i32 5, i32* %7
%8 = load i32*, i32** %5
store i32 1, i32* %8
%9 = load i32*, i32** %6
store i32 0, i32* %9
ret void
}

LLVM IR (-O2):
define void @get_stepping_info(i32* nocapture writeonly %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2) {
store i32 5, i32* %0
store i32 1, i32* %1
store i32 0, i32* %2
ret void
}
void spurious_interrupt_bug() {
  __asm__ __volatile__("cli");
  SetTextColor(0x04 | 0x08, 0x00);
  kprintf("\nERROR: spurious_interrupt_bug\n");
  do {
    __asm__ __volatile__("cli  \n\t"
                         "hlt");
  } while (1 == 1);
}


x86 assembly (clang, -O0):
<spurious_interrupt_bug>:
push   %rbp
mov    %rsp,%rbp
cli
mov    $0xc,%edi
xor    %esi,%esi
mov    $0x0,%al
call   1030 <SetTextColor@plt>
lea    0xec6(%rip),%rdi
mov    $0x0,%al
call   1040 <kprintf@plt>
cli
hlt
mov    $0x1,%al
test   $0x1,%al
jne    1141 <spurious_interrupt_bug+0x21>
jmp    1152 <spurious_interrupt_bug+0x32>
pop    %rbp
ret

x86 assembly (clang, -O2):
<spurious_interrupt_bug>:
push   %rax
cli
mov    $0xc,%edi
xor    %esi,%esi
xor    %eax,%eax
call   1030 <SetTextColor@plt>
lea    0xec9(%rip),%rdi
xor    %eax,%eax
call   1040 <kprintf@plt>
xchg   %ax,%ax
cli
hlt
jmp    1140 <spurious_interrupt_bug+0x20>

LLVM IR (-O0):
@.str = [32 x i8] c"\0AERROR: spurious_interrupt_bug\0A\00"
define void @spurious_interrupt_bug() {
%1 = call i32 (i32, i32, ...) bitcast (i32 (...)* @SetTextColor to i32 (i32, i32, ...)*)(i32 12, i32 0)
%2 = call i32 (i8*, ...) bitcast (i32 (...)* @kprintf to i32 (i8*, ...)*)(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %4, %0
br label %4
4: ; preds = %3
br i1 true, label %3, label %5
5: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [32 x i8] c"\0AERROR: spurious_interrupt_bug\0A\00"
define void @spurious_interrupt_bug() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
%1 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @SetTextColor to i32 (i32, i32, ...)*)(i32 12, i32 0)
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @kprintf to i32 (i8*, ...)*)(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %3, %0
tail call void asm sideeffect "cli \0A\09hlt", "~{dirflag},~{fpsr},~{flags}"()
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ ffsnd_fail(char *);
void *malloc(size_t);
void *ffsnd_nicemalloc(size_t size) {
  void *p = malloc(size);
  if (!p)
    ffsnd_fail("Out of memory");
  return p;
}


x86 assembly (clang, -O0):
<ffsnd_nicemalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <ffsnd_nicemalloc+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <ffsnd_fail@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffsnd_nicemalloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <ffsnd_nicemalloc+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <ffsnd_fail@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Out of memory\00"
define i8* @ffsnd_nicemalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = call i32 @ffsnd_fail(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [14 x i8] c"Out of memory\00"
define noalias i8* @ffsnd_nicemalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @ffsnd_fail(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
char *pkpwd_shortdesc(void) {
  return "compute the secret key used to encrypt the private key for the box "
         "certificate (which is used for the GUI)";
}


x86 assembly (clang, -O0):
<pkpwd_shortdesc>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pkpwd_shortdesc>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [107 x i8] c"compute the secret key used to encrypt the private key for the box certificate (which is used for the GUI)\00"
define i8* @pkpwd_shortdesc() {
ret i8* getelementptr inbounds ([107 x i8], [107 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [107 x i8] c"compute the secret key used to encrypt the private key for the box certificate (which is used for the GUI)\00"
define i8* @pkpwd_shortdesc() {
ret i8* getelementptr inbounds ([107 x i8], [107 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
typedef int /*<<< orphan*/ ASN1_GENERALIZEDTIME;

/* Variables and functions */
int /*<<< orphan*/ *ASN1_GENERALIZEDTIME_adj(int /*<<< orphan*/ *,
                                             int /*<<< orphan*/,
                                             int /*<<< orphan*/,
                                             int /*<<< orphan*/);
ASN1_GENERALIZEDTIME *ASN1_GENERALIZEDTIME_set(ASN1_GENERALIZEDTIME *s,
                                               time_t t) {
  return (ASN1_GENERALIZEDTIME_adj(s, t, 0, 0));
}


x86 assembly (clang, -O0):
<ASN1_GENERALIZEDTIME_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %ecx,%ecx
mov    %ecx,%edx
call   1030 <ASN1_GENERALIZEDTIME_adj@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_GENERALIZEDTIME_set>:
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <ASN1_GENERALIZEDTIME_adj@plt>

LLVM IR (-O0):
define i32* @ASN1_GENERALIZEDTIME_set(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32* @ASN1_GENERALIZEDTIME_adj(i32* %5, i32 %6, i32 0, i32 0)
ret i32* %7
}

LLVM IR (-O2):
define i32* @ASN1_GENERALIZEDTIME_set(i32* %0, i32 %1) {
%3 = tail call i32* @ASN1_GENERALIZEDTIME_adj(i32* %0, i32 %1, i32 0, i32 0)
ret i32* %3
}
void swap(int *source, int a, int b) {
  int temp = source[a];
  source[a] = source[b];
  source[b] = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ get_page_size();
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int main(void) {
  printf("%ld\n", get_page_size());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <get_page_size@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <get_page_size@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%ld\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @get_page_size()
%3 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%ld\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @get_page_size()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int i;
  int b;
  i = __VERIFIER_nondet_int();
  while (i != 1 && i != 0) {
    i = i - 2;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x1,-0x8(%rbp)
mov    %al,-0xd(%rbp)
je     1142 <main+0x32>
cmpl   $0x0,-0x8(%rbp)
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1152 <main+0x42>
jmp    1160 <main+0x50>
mov    -0x8(%rbp),%eax
sub    $0x2,%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <main+0x19>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
br label %5
5: ; preds = %13, %0
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 0
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ false, %5 ], [ %10, %8 ]
br i1 %12, label %13, label %16
13: ; preds = %11
%14 = load i32, i32* %2
%15 = sub nsw i32 %14, 2
store i32 %15, i32* %2
br label %5
16: ; preds = %11
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
char *get_message();
scalar_t__ strcmp(char *, char const *);
void cttestdefault() {
  const char *m;
  m = get_message();
  assert(strcmp("default message", m) == 0);
}


x86 assembly (clang, -O0):
<cttestdefault>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <get_message@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xeb2(%rip),%rdi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cttestdefault>:
push   %rax
xor    %eax,%eax
call   1030 <get_message@plt>
lea    0xec1(%rip),%rdi
mov    %rax,%rsi
call   1040 <strcmp@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
pop    %rax
jmp    1050 <assert@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"default message\00"
define void @cttestdefault() {
%1 = alloca i8*
%2 = call i8* (...) @get_message()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i64 @strcmp(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"default message\00"
define void @cttestdefault() {
%1 = tail call i8* (...) @get_message()
%2 = tail call i64 @strcmp(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %1)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
ret void
}
/* Type definitions */
struct sffs {
  int dummy;
};

/* Variables and functions */
long sffs_find_file(struct sffs *, char const *);
int sffs_unlink_at(struct sffs *, long);
int sffs_unlink(struct sffs *fs, const char *fname) {
  long pos = sffs_find_file(fs, fname);
  if (pos < 0)
    return -1;
  return sffs_unlink_at(fs, pos);
}


x86 assembly (clang, -O0):
<sffs_unlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <sffs_find_file@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jge    1158 <sffs_unlink+0x38>
movl   $0xffffffff,-0x4(%rbp)
jmp    1168 <sffs_unlink+0x48>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <sffs_unlink_at@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sffs_unlink>:
push   %rbx
mov    %rdi,%rbx
call   1040 <sffs_find_file@plt>
test   %rax,%rax
js     113a <sffs_unlink+0x1a>
mov    %rbx,%rdi
mov    %rax,%rsi
pop    %rbx
jmp    1030 <sffs_unlink_at@plt>
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.sffs = type { i32 }
define i32 @sffs_unlink(%struct.sffs* %0, i8* %1) {
%3 = alloca i32
%4 = alloca %struct.sffs*
%5 = alloca i8*
%6 = alloca i64
store %struct.sffs* %0, %struct.sffs** %4
store i8* %1, i8** %5
%7 = load %struct.sffs*, %struct.sffs** %4
%8 = load i8*, i8** %5
%9 = call i64 @sffs_find_file(%struct.sffs* %7, i8* %8)
store i64 %9, i64* %6
%10 = load i64, i64* %6
%11 = icmp slt i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 -1, i32* %3
br label %17
13: ; preds = %2
%14 = load %struct.sffs*, %struct.sffs** %4
%15 = load i64, i64* %6
%16 = call i32 @sffs_unlink_at(%struct.sffs* %14, i64 %15)
store i32 %16, i32* %3
br label %17
17: ; preds = %13, %12
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
%struct.sffs = type { i32 }
define i32 @sffs_unlink(%struct.sffs* %0, i8* %1) {
%3 = tail call i64 @sffs_find_file(%struct.sffs* %0, i8* %1)
%4 = icmp slt i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @sffs_unlink_at(%struct.sffs* %0, i64 %3)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ -1, %2 ]
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ SIG_SETMASK;
int /*<<< orphan*/ sigemptyset(int /*<<< orphan*/ *);
int /*<<< orphan*/ sigprocmask(int /*<<< orphan*/, int /*<<< orphan*/ *,
                               int /*<<< orphan*/ *);
void sig_blocknone() {
  sigset_t ss;
  sigemptyset(&ss);
  sigprocmask(SIG_SETMASK, &ss, (sigset_t *)0);
}


x86 assembly (clang, -O0):
<sig_blocknone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1040 <sigemptyset@plt>
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    -0x4(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigprocmask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_blocknone>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <sigemptyset@plt>
mov    0x2eaf(%rip),%rax
mov    (%rax),%edi
mov    %rbx,%rsi
xor    %edx,%edx
call   1030 <sigprocmask@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@SIG_SETMASK = global i32 0
define void @sig_blocknone() {
%1 = alloca i32
%2 = call i32 @sigemptyset(i32* %1)
%3 = load i32, i32* @SIG_SETMASK
%4 = call i32 @sigprocmask(i32 %3, i32* %1, i32* null)
ret void
}

LLVM IR (-O2):
@SIG_SETMASK = global i32 0
define void @sig_blocknone() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @sigemptyset(i32* %1)
%4 = load i32, i32* @SIG_SETMASK
%5 = call i32 @sigprocmask(i32 %4, i32* %1, i32* null)
ret void
}
double cpd2cp_airden(double e_mbar, double rhoair, double tcair) {
  double cp = 1004.67;
  double rhov, q, cpw;
  rhov = 0.622 * e_mbar * 100.0 / (287.04 * (tcair + 273.15));
  q = rhov / rhoair;
  cpw = cp * (1.0 + 0.84 * q);
  return (cpw);
}


x86 assembly (clang, -O0):
<cpd2cp_airden>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xf15(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  0xf00(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xeeb(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xed7(%rip),%xmm2
addsd  -0x18(%rbp),%xmm2
movsd  0xec2(%rip),%xmm1
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  -0x30(%rbp),%xmm1
movsd  0xe84(%rip),%xmm2
mulsd  %xmm2,%xmm1
movsd  0xe80(%rip),%xmm2
addsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  -0x38(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpd2cp_airden>:
mulsd  0xef8(%rip),%xmm0
mulsd  0xef8(%rip),%xmm0
addsd  0xef8(%rip),%xmm2
mulsd  0xef8(%rip),%xmm2
divsd  %xmm2,%xmm0
divsd  %xmm1,%xmm0
mulsd  0xef0(%rip),%xmm0
addsd  0xef0(%rip),%xmm0
mulsd  0xef0(%rip),%xmm0
ret

LLVM IR (-O0):
define double @cpd2cp_airden(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
store double 1.004670e+03, double* %7
%11 = load double, double* %4
%12 = fmul double 6.220000e-01, %11
%13 = fmul double %12, 1.000000e+02
%14 = load double, double* %6
%15 = fadd double %14, 2.731500e+02
%16 = fmul double 2.870400e+02, %15
%17 = fdiv double %13, %16
store double %17, double* %8
%18 = load double, double* %8
%19 = load double, double* %5
%20 = fdiv double %18, %19
store double %20, double* %9
%21 = load double, double* %7
%22 = load double, double* %9
%23 = call double @llvm.fmuladd.f64(double 8.400000e-01, double %22, double 1.000000e+00)
%24 = fmul double %21, %23
store double %24, double* %10
%25 = load double, double* %10
ret double %25
}

LLVM IR (-O2):
define double @cpd2cp_airden(double %0, double %1, double %2) {
%4 = fmul double %0, 6.220000e-01
%5 = fmul double %4, 1.000000e+02
%6 = fadd double %2, 2.731500e+02
%7 = fmul double %6, 2.870400e+02
%8 = fdiv double %5, %7
%9 = fdiv double %8, %1
%10 = tail call double @llvm.fmuladd.f64(double %9, double 8.400000e-01, double 1.000000e+00)
%11 = fmul double %10, 1.004670e+03
ret double %11
}
/* Variables and functions */
int /*<<< orphan*/ write_reg(int, int);
void flush_fifo(void) { write_reg(0x04, 0x01); }


x86 assembly (clang, -O0):
<flush_fifo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
mov    $0x1,%esi
call   1030 <write_reg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_fifo>:
mov    $0x4,%edi
mov    $0x1,%esi
jmp    1030 <write_reg@plt>

LLVM IR (-O0):
define void @flush_fifo() {
%1 = call i32 @write_reg(i32 4, i32 1)
ret void
}

LLVM IR (-O2):
define void @flush_fifo() {
%1 = tail call i32 @write_reg(i32 4, i32 1)
ret void
}
/* Variables and functions */
size_t sasn1_length_length(size_t length) {
  size_t l = 1;
  if (length >= 0x80) {
    for (l = 2; (length = length >> 8); l++)
      ;
  }
  return l;
}


x86 assembly (clang, -O0):
<sasn1_length_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
cmpq   $0x80,-0x8(%rbp)
jb     1157 <sasn1_length_length+0x57>
movq   $0x2,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
je     1152 <sasn1_length_length+0x52>
jmp    1141 <sasn1_length_length+0x41>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1126 <sasn1_length_length+0x26>
jmp    1157 <sasn1_length_length+0x57>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sasn1_length_length>:
mov    $0x1,%eax
cmp    $0x80,%rdi
jb     1144 <sasn1_length_length+0x44>
mov    $0x2,%eax
cmp    $0x100,%rdi
jb     1144 <sasn1_length_length+0x44>
mov    $0x2,%eax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
shr    $0x8,%rcx
add    $0x1,%rax
cmp    $0xffff,%rdi
mov    %rcx,%rdi
ja     1130 <sasn1_length_length+0x30>
ret

LLVM IR (-O0):
define i64 @sasn1_length_length(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 1, i64* %3
%4 = load i64, i64* %2
%5 = icmp uge i64 %4, 128
br i1 %5, label %6, label %16
6: ; preds = %1
store i64 2, i64* %3
br label %7
7: ; preds = %12, %6
%8 = load i64, i64* %2
%9 = lshr i64 %8, 8
store i64 %9, i64* %2
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %7
br label %12
12: ; preds = %11
%13 = load i64, i64* %3
%14 = add i64 %13, 1
store i64 %14, i64* %3
br label %7
15: ; preds = %7
br label %16
16: ; preds = %15, %1
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
define i64 @sasn1_length_length(i64 %0) {
%2 = icmp ugt i64 %0, 127
br i1 %2, label %3, label %11
3: ; preds = %1
%4 = icmp ult i64 %0, 256
br i1 %4, label %11, label %5
5: ; preds = %3, %5
%6 = phi i64 [ %9, %5 ], [ 2, %3 ]
%7 = phi i64 [ %8, %5 ], [ %0, %3 ]
%8 = lshr i64 %7, 8
%9 = add nuw nsw i64 %6, 1
%10 = icmp ult i64 %7, 65536
br i1 %10, label %11, label %5
11: ; preds = %5, %3, %1
%12 = phi i64 [ 1, %1 ], [ 2, %3 ], [ %9, %5 ]
ret i64 %12
}
/* Variables and functions */
double sqrt(double);
double hyp(double x1, double y1, double x2, double y2) {
  double res = sqrt((x1 - x2) * (x1 - x2) + (y1 - y2) * (y1 - y2));
  if (res < 10.0)
    res = 10.0;
  return (res);
}


x86 assembly (clang, -O0):
<hyp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x18(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
subsd  -0x18(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm1
subsd  -0x20(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm3
subsd  -0x20(%rbp),%xmm3
mulsd  %xmm3,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
movsd  %xmm0,-0x28(%rbp)
movsd  0xe8e(%rip),%xmm0
ucomisd -0x28(%rbp),%xmm0
jbe    118a <hyp+0x7a>
movsd  0xe7b(%rip),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hyp>:
push   %rax
subsd  %xmm2,%xmm0
subsd  %xmm3,%xmm1
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1135 <hyp+0x25>
sqrtsd %xmm0,%xmm0
jmp    113a <hyp+0x2a>
call   1030 <sqrt@plt>
movsd  0xebe(%rip),%xmm1
maxsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @hyp(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%10 = load double, double* %5
%11 = load double, double* %7
%12 = fsub double %10, %11
%13 = load double, double* %5
%14 = load double, double* %7
%15 = fsub double %13, %14
%16 = load double, double* %6
%17 = load double, double* %8
%18 = fsub double %16, %17
%19 = load double, double* %6
%20 = load double, double* %8
%21 = fsub double %19, %20
%22 = fmul double %18, %21
%23 = call double @llvm.fmuladd.f64(double %12, double %15, double %22)
%24 = call double @sqrt(double %23)
store double %24, double* %9
%25 = load double, double* %9
%26 = fcmp olt double %25, 1.000000e+01
br i1 %26, label %27, label %28
27: ; preds = %4
store double 1.000000e+01, double* %9
br label %28
28: ; preds = %27, %4
%29 = load double, double* %9
ret double %29
}

LLVM IR (-O2):
define double @hyp(double %0, double %1, double %2, double %3) {
%5 = fsub double %0, %2
%6 = fsub double %1, %3
%7 = fmul double %6, %6
%8 = tail call double @llvm.fmuladd.f64(double %5, double %5, double %7)
%9 = tail call double @sqrt(double %8)
%10 = fcmp olt double %9, 1.000000e+01
%11 = select i1 %10, double 1.000000e+01, double %9
ret double %11
}
void *callee1(void *payload) { return payload; }


x86 assembly (clang, -O0):
<callee1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<callee1>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @callee1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @callee1(i8* readnone returned %0) {
ret i8* %0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void w16le(uint8_t *buf, uint16_t v) {
  buf[1] = v >> 8;
  buf[0] = v;
}


x86 assembly (clang, -O0):
<w16le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<w16le>:
mov    %esi,%eax
sar    $0x8,%eax
mov    %eax,0x4(%rdi)
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @w16le(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 8
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 1
store i32 %6, i32* %8
%9 = load i32, i32* %4
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 0
store i32 %9, i32* %11
ret void
}

LLVM IR (-O2):
define void @w16le(i32* nocapture writeonly %0, i32 %1) {
%3 = ashr i32 %1, 8
%4 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %3, i32* %4
store i32 %1, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0x90() {
  Assert_real((isascii(144) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              725, ("isascii should be 0 for 0x90"));
}


x86 assembly (clang, -O0):
<t_isascii_0x90>:
push   %rbp
mov    %rsp,%rbp
mov    $0x90,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2d5,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x90>:
push   %rax
mov    $0x90,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2d5,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x90\00"
define void @t_isascii_0x90() {
%1 = call i64 @isascii(i32 144)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 725, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0x90\00"
define void @t_isascii_0x90() {
%1 = tail call i64 @isascii(i32 144)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 725, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int calc_area(int columnFrom, int columnTo, int rowFrom, int rowTo) {
  return (columnTo - columnFrom + 1) * (rowTo - rowFrom + 1);
}


x86 assembly (clang, -O0):
<calc_area>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
mov    -0x10(%rbp),%ecx
sub    -0xc(%rbp),%ecx
add    $0x1,%ecx
imul   %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_area>:
sub    %edi,%esi
add    $0x1,%esi
sub    %edx,%ecx
lea    0x1(%rcx),%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @calc_area(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %6
%10 = load i32, i32* %5
%11 = sub nsw i32 %9, %10
%12 = add nsw i32 %11, 1
%13 = load i32, i32* %8
%14 = load i32, i32* %7
%15 = sub nsw i32 %13, %14
%16 = add nsw i32 %15, 1
%17 = mul nsw i32 %12, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @calc_area(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = sub i32 1, %0
%6 = add i32 %5, %1
%7 = sub i32 1, %2
%8 = add i32 %7, %3
%9 = mul nsw i32 %8, %6
ret i32 %9
}
int test_imm_61uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x61 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_61uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x61,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_61uint64_midword_mem>:
testb  $0x61,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_61uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 97
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_61uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 6356992
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void USBDevConnect(uint32_t ui32Base) {
  ;
  (*((volatile uint8_t *)(ui32Base + 0x00000001))) |= 0x00000040;
}


x86 assembly (clang, -O0):
<USBDevConnect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%ecx
or     $0x40,%ecx
mov    %ecx,0x1(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBDevConnect>:
orl    $0x40,0x1(%rdi)
ret

LLVM IR (-O0):
define void @USBDevConnect(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 1
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = or i32 %6, 64
store volatile i32 %7, i32* %5
ret void
}

LLVM IR (-O2):
define void @USBDevConnect(i64 %0) {
%2 = add nsw i64 %0, 1
%3 = inttoptr i64 %2 to i32*
%4 = load volatile i32, i32* %3
%5 = or i32 %4, 64
store volatile i32 %5, i32* %3
ret void
}
void rop3_23_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk2 = S ^ T;
  stk3 = *D ^ S;
  stk2 = stk2 & stk3;
  stk1 = S ^ stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_23_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xa(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xc(%rbp),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_23_1_0>:
xor    %esi,%edx
mov    (%rdi),%al
mov    %eax,%ecx
xor    %sil,%cl
and    %dl,%cl
or     %sil,%cl
not    %cl
and    %sil,%al
or     %cl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_23_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = load i8, i8* %6
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = load i8, i8* %5
%20 = zext i8 %19 to i32
%21 = xor i32 %18, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %9
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = load i8, i8* %9
%26 = zext i8 %25 to i32
%27 = and i32 %24, %26
%28 = trunc i32 %27 to i8
store i8 %28, i8* %8
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = load i8, i8* %8
%32 = zext i8 %31 to i32
%33 = xor i32 %30, %32
%34 = trunc i32 %33 to i8
store i8 %34, i8* %7
%35 = load i8, i8* %7
%36 = zext i8 %35 to i32
%37 = xor i32 %36, -1
%38 = trunc i32 %37 to i8
store i8 %38, i8* %7
%39 = load i8, i8* %7
%40 = zext i8 %39 to i32
%41 = load i8, i8* %5
%42 = zext i8 %41 to i32
%43 = xor i32 %42, -1
%44 = and i32 %40, %43
%45 = load i8*, i8** %4
%46 = load i8, i8* %45
%47 = zext i8 %46 to i32
%48 = load i8, i8* %5
%49 = zext i8 %48 to i32
%50 = and i32 %47, %49
%51 = or i32 %44, %50
%52 = trunc i32 %51 to i8
%53 = load i8*, i8** %4
store i8 %52, i8* %53
ret void
}

LLVM IR (-O2):
define void @rop3_23_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %2, %1
%5 = load i8, i8* %0
%6 = xor i8 %5, %1
%7 = and i8 %6, %4
%8 = or i8 %7, %1
%9 = xor i8 %8, -1
%10 = and i8 %5, %1
%11 = or i8 %10, %9
store i8 %11, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int test_pre_alib(void) {
  printf("This is a \"pre/alib\" target.\n");
  return 0;
}


x86 assembly (clang, -O0):
<test_pre_alib>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_pre_alib>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"This is a \22pre/alib\22 target.\0A\00"
define i32 @test_pre_alib() {
%1 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [29 x i8] c"This is a \22pre/alib\22 target.\00"
define i32 @test_pre_alib() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int condition_forwardSlash(char c) { return c == '/'; }


x86 assembly (clang, -O0):
<condition_forwardSlash>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x2f,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<condition_forwardSlash>:
xor    %eax,%eax
cmp    $0x2f,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @condition_forwardSlash(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 47
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @condition_forwardSlash(i8 signext %0) {
%2 = icmp eq i8 %0, 47
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ pushbit(int);
void pushcontrol2b(int cc) {
  pushbit(cc % 2);
  cc >>= 1;
  pushbit(cc);
}


x86 assembly (clang, -O0):
<pushcontrol2b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
call   1030 <pushbit@plt>
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <pushbit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pushcontrol2b>:
push   %rbx
mov    %edi,%ebx
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
and    $0xfffffffe,%eax
sub    %eax,%edi
call   1030 <pushbit@plt>
sar    %ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <pushbit@plt>

LLVM IR (-O0):
define void @pushcontrol2b(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
%5 = call i32 @pushbit(i32 %4)
%6 = load i32, i32* %2
%7 = ashr i32 %6, 1
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @pushbit(i32 %8)
ret void
}

LLVM IR (-O2):
define void @pushcontrol2b(i32 %0) {
%2 = srem i32 %0, 2
%3 = tail call i32 @pushbit(i32 %2)
%4 = ashr i32 %0, 1
%5 = tail call i32 @pushbit(i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ regex_t;

/* Variables and functions */
int REG_EXTENDED;
int regexp_compile_internal(int /*<<< orphan*/ *, char const *, int);
__attribute__((__warn_unused_result__)) bool
regexp_compile(regex_t *re, const char *pattern, int flags) {
  return regexp_compile_internal(re, pattern, flags | REG_EXTENDED);
}


x86 assembly (clang, -O0):
<regexp_compile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    0x2eab(%rip),%rax
or     (%rax),%edx
call   1030 <regexp_compile_internal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<regexp_compile>:
mov    0x2ec9(%rip),%rax
or     (%rax),%edx
jmp    1030 <regexp_compile_internal@plt>

LLVM IR (-O0):
@REG_EXTENDED = global i32 0
define i32 @regexp_compile(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = load i32, i32* @REG_EXTENDED
%11 = or i32 %9, %10
%12 = call i32 @regexp_compile_internal(i32* %7, i8* %8, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
@REG_EXTENDED = global i32 0
define i32 @regexp_compile(i32* %0, i8* %1, i32 %2) {
%4 = load i32, i32* @REG_EXTENDED
%5 = or i32 %4, %2
%6 = tail call i32 @regexp_compile_internal(i32* %0, i8* %1, i32 %5)
ret i32 %6
}
unsigned xrop3_252_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  stk1 = T | S;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_252_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_252_1_1>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_252_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
store i32 %14, i32* %6
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
store i32 %20, i32* %7
%21 = load i32, i32* %7
%22 = load i32, i32* %6
%23 = or i32 %21, %22
store i32 %23, i32* %8
%24 = load i32, i32* %8
%25 = load i32, i32* %6
%26 = xor i32 %25, -1
%27 = and i32 %24, %26
%28 = load i32, i32* %7
%29 = xor i32 %28, -1
%30 = and i32 %27, %29
%31 = load i32, i32* %5
%32 = load i32, i32* %6
%33 = and i32 %31, %32
%34 = or i32 %30, %33
%35 = load i32, i32* %5
%36 = load i32, i32* %7
%37 = and i32 %35, %36
%38 = or i32 %34, %37
ret i32 %38
}

LLVM IR (-O2):
define i32 @xrop3_252_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = or i8 %1, %0
%4 = zext i8 %3 to i32
ret i32 %4
}
int isprint(const int c) { return c >= 0x20 && c <= 0x7E; }


x86 assembly (clang, -O0):
<isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isprint+0x20>
cmpl   $0x7e,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprint>:
add    $0xffffffe0,%edi
xor    %eax,%eax
cmp    $0x5f,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isprint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 32
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 126
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isprint(i32 %0) {
%2 = add i32 %0, -32
%3 = icmp ult i32 %2, 95
%4 = zext i1 %3 to i32
ret i32 %4
}