xunge/DecIR huggingface dataset:
void send_cgi(int send_to, char *content_type) {}


x86 assembly (clang, -O0):
<send_cgi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_cgi>:
ret

LLVM IR (-O0):
define void @send_cgi(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @send_cgi(i32 %0, i8* nocapture %1) {
ret void
}
void rwsem_clear_reader_owned(struct rw_semaphore *sem) {}


x86 assembly (clang, -O0):
<rwsem_clear_reader_owned>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rwsem_clear_reader_owned>:
ret

LLVM IR (-O0):
%struct.rw_semaphore = type opaque
define void @rwsem_clear_reader_owned(%struct.rw_semaphore* %0) {
%2 = alloca %struct.rw_semaphore*
store %struct.rw_semaphore* %0, %struct.rw_semaphore** %2
ret void
}

LLVM IR (-O2):
%struct.rw_semaphore = type opaque
define void @rwsem_clear_reader_owned(%struct.rw_semaphore* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ concat(char const *, char const *);
int /*<<< orphan*/ system(char const *);
int main(int argc, const char *argv[]) {
  const char *strSpeech = " flite -voice slt  -t ";
  concat(strSpeech, argv[1]);
  system(strSpeech);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rsi
call   1040 <concat@plt>
mov    -0x18(%rbp),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x8(%rsi),%rsi
lea    0xed4(%rip),%rbx
mov    %rbx,%rdi
call   1040 <concat@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [23 x i8] c" flite -voice slt -t \00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8** %6
%7 = load i8*, i8** %6
%8 = load i8**, i8*** %5
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = load i8*, i8** %9
%11 = call i32 @concat(i8* %7, i8* %10)
%12 = load i8*, i8** %6
%13 = call i32 @system(i8* %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [23 x i8] c" flite -voice slt -t \00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @concat(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = tail call i32 @system(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void switch_set_state(struct switch_dev *sdev, int state) {}


x86 assembly (clang, -O0):
<switch_set_state>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_set_state>:
ret

LLVM IR (-O0):
%struct.switch_dev = type opaque
define void @switch_set_state(%struct.switch_dev* %0, i32 %1) {
%3 = alloca %struct.switch_dev*
%4 = alloca i32
store %struct.switch_dev* %0, %struct.switch_dev** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.switch_dev = type opaque
define void @switch_set_state(%struct.switch_dev* nocapture %0, i32 %1) {
ret void
}
unsigned int __atomic_fetch_xor_4(volatile void *atom, unsigned int value,
                                  int memorder) {
  unsigned int xchg;
  unsigned int cmp;
  __atomic_load((unsigned int *)atom, (unsigned int *)&cmp, 0);
  do {
    xchg = ((cmp ^ value));
  } while (
      !__atomic_compare_exchange((unsigned int *)atom, &cmp, &xchg, 1, 5, 5));
  return cmp;
}


x86 assembly (clang, -O0):
<__atomic_fetch_xor_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x18(%rbp),%eax
mov    -0x14(%rbp),%edx
lock cmpxchg %edx,(%rcx)
mov    %eax,%ecx
sete   %al
mov    %al,-0x21(%rbp)
mov    %ecx,-0x20(%rbp)
test   $0x1,%al
jne    1147 <__atomic_fetch_xor_4+0x47>
mov    -0x20(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x21(%rbp),%al
and    $0x1,%al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
xor    $0xff,%al
test   $0x1,%al
jne    1117 <__atomic_fetch_xor_4+0x17>
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__atomic_fetch_xor_4>:
mov    (%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %eax,%ecx
mov    %eax,%edx
xor    %esi,%edx
lock cmpxchg %edx,(%rdi)
jne    1110 <__atomic_fetch_xor_4+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @__atomic_fetch_xor_4(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i8
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load atomic i32, i32* %11 monotonic
store i32 %12, i32* %8
br label %13
13: ; preds = %26, %3
%14 = load i32, i32* %8
%15 = load i32, i32* %5
%16 = xor i32 %14, %15
store i32 %16, i32* %7
br label %17
17: ; preds = %13
%18 = load i8*, i8** %4
%19 = bitcast i8* %18 to i32*
%20 = load i32, i32* %8
%21 = load i32, i32* %7
%22 = cmpxchg weak i32* %19, i32 %20, i32 %21 seq_cst seq_cst
%23 = extractvalue { i32, i1 } %22, 0
%24 = extractvalue { i32, i1 } %22, 1
br i1 %24, label %26, label %25
25: ; preds = %17
store i32 %23, i32* %8
br label %26
26: ; preds = %25, %17
%27 = zext i1 %24 to i8
store i8 %27, i8* %9
%28 = load i8, i8* %9
%29 = trunc i8 %28 to i1
%30 = xor i1 %29, true
br i1 %30, label %13, label %31
31: ; preds = %26
%32 = load i32, i32* %8
ret i32 %32
}

LLVM IR (-O2):
define i32 @__atomic_fetch_xor_4(i8* nocapture %0, i32 %1, i32 %2) {
%4 = bitcast i8* %0 to i32*
%5 = load atomic i32, i32* %4 monotonic
br label %6
6: ; preds = %6, %3
%7 = phi i32 [ %5, %3 ], [ %11, %6 ]
%8 = xor i32 %7, %1
%9 = cmpxchg weak i32* %4, i32 %7, i32 %8 seq_cst seq_cst
%10 = extractvalue { i32, i1 } %9, 1
%11 = extractvalue { i32, i1 } %9, 0
br i1 %10, label %12, label %6
12: ; preds = %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ ltrim(char *);
int /*<<< orphan*/ rtrim(char *);
int /*<<< orphan*/ strcmp(char *, char *);
char *trim(char *str) {
  if (!strcmp(str, "")) {
    return "";
  }
  ltrim(str);
  rtrim(str);
  return str;
}


x86 assembly (clang, -O0):
<trim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xeb9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
jne    1165 <trim+0x35>
lea    0xea4(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    117f <trim+0x4f>
mov    -0x10(%rbp),%rdi
call   1050 <ltrim@plt>
mov    -0x10(%rbp),%rdi
call   1040 <rtrim@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trim>:
push   %rbx
cmpb   $0x0,(%rdi)
je     1138 <trim+0x18>
mov    %rdi,%rbx
call   1040 <ltrim@plt>
mov    %rbx,%rdi
call   1030 <rtrim@plt>
jmp    113f <trim+0x1f>
lea    0xec1(%rip),%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @trim(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @strcmp(i8* %4, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8** %2
br label %14
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i32 @ltrim(i8* %9)
%11 = load i8*, i8** %3
%12 = call i32 @rtrim(i8* %11)
%13 = load i8*, i8** %3
store i8* %13, i8** %2
br label %14
14: ; preds = %8, %7
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @trim(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @ltrim(i8* %0)
%6 = tail call i32 @rtrim(i8* %0)
br label %7
7: ; preds = %1, %4
%8 = phi i8* [ %0, %4 ], [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), %1 ]
ret i8* %8
}
float flt_max1(float a, float b) { return (a >= b) ? a : b; }


x86 assembly (clang, -O0):
<flt_max1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jb     112c <flt_max1+0x2c>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1136 <flt_max1+0x36>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<flt_max1>:
movaps %xmm1,%xmm2
cmpless %xmm0,%xmm2
andps  %xmm2,%xmm0
andnps %xmm1,%xmm2
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @flt_max1(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp oge float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %12
10: ; preds = %2
%11 = load float, float* %4
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @flt_max1(float %0, float %1) {
%3 = fcmp oge float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
/* Type definitions */
struct cart {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _cartVarDbName(char *, char *);
char *cartOptionalString(struct cart *, int /*<<< orphan*/);
char *cartOptionalStringDb(struct cart *cart, char *db, char *var) {
  return cartOptionalString(cart, _cartVarDbName(db, var));
}


x86 assembly (clang, -O0):
<cartOptionalStringDb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <_cartVarDbName@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%esi
call   1040 <cartOptionalString@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cartOptionalStringDb>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
mov    %rdx,%rsi
call   1030 <_cartVarDbName@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <cartOptionalString@plt>

LLVM IR (-O0):
%struct.cart = type { i32 }
define i8* @cartOptionalStringDb(%struct.cart* %0, i8* %1, i8* %2) {
%4 = alloca %struct.cart*
%5 = alloca i8*
%6 = alloca i8*
store %struct.cart* %0, %struct.cart** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load %struct.cart*, %struct.cart** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @_cartVarDbName(i8* %8, i8* %9)
%11 = call i8* @cartOptionalString(%struct.cart* %7, i32 %10)
ret i8* %11
}

LLVM IR (-O2):
%struct.cart = type { i32 }
define i8* @cartOptionalStringDb(%struct.cart* %0, i8* %1, i8* %2) {
%4 = tail call i32 @_cartVarDbName(i8* %1, i8* %2)
%5 = tail call i8* @cartOptionalString(%struct.cart* %0, i32 %4)
ret i8* %5
}
void FF_ReleaseSemaphore(void *pSemaphore) { pSemaphore = 0; }


x86 assembly (clang, -O0):
<FF_ReleaseSemaphore>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<FF_ReleaseSemaphore>:
ret

LLVM IR (-O0):
define void @FF_ReleaseSemaphore(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %2
ret void
}

LLVM IR (-O2):
define void @FF_ReleaseSemaphore(i8* nocapture %0) {
ret void
}
/* Variables and functions */
double fmax(double, double);
double max(double left, double right) { return fmax(left, right); }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm3
movsd  -0x10(%rbp),%xmm2
movaps %xmm2,%xmm4
movaps %xmm3,%xmm0
cmpunordsd %xmm0,%xmm0
movaps %xmm0,%xmm1
pand   %xmm4,%xmm1
maxsd  %xmm3,%xmm2
pandn  %xmm2,%xmm0
por    %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
movapd %xmm0,%xmm2
cmpunordsd %xmm0,%xmm2
movapd %xmm2,%xmm3
andpd  %xmm1,%xmm3
maxsd  %xmm0,%xmm1
andnpd %xmm1,%xmm2
orpd   %xmm3,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @max(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @llvm.maxnum.f64(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @max(double %0, double %1) {
%3 = tail call double @llvm.maxnum.f64(double %0, double %1)
ret double %3
}
void RTAvlHCPhysDoWithAll(void) {}


x86 assembly (clang, -O0):
<RTAvlHCPhysDoWithAll>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlHCPhysDoWithAll>:
ret

LLVM IR (-O0):
define void @RTAvlHCPhysDoWithAll() {
ret void
}

LLVM IR (-O2):
define void @RTAvlHCPhysDoWithAll() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ regex_t;

/* Variables and functions */
int REG_EXTENDED;
int REG_NOSUB;
int /*<<< orphan*/ regcomp(int /*<<< orphan*/ *, char *, int);
int regexec(int /*<<< orphan*/ *, char *, int /*<<< orphan*/,
            int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ regfree(int /*<<< orphan*/ *);
int reg_match(char *string, char *pattern) {
  int result;
  regex_t reg;
  regcomp(&reg, pattern, REG_EXTENDED | REG_NOSUB);
  result = regexec(&reg, string, 0, 0, 0);
  regfree(&reg);
  return (!(result));
}


x86 assembly (clang, -O0):
<reg_match>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    0x2e8d(%rip),%rax
mov    (%rax),%edx
mov    0x2e8c(%rip),%rax
or     (%rax),%edx
lea    -0x18(%rbp),%rdi
call   1040 <regcomp@plt>
mov    -0x8(%rbp),%rsi
lea    -0x18(%rbp),%rdi
xor    %r8d,%r8d
mov    %r8d,%edx
mov    %r8d,%ecx
call   1050 <regexec@plt>
mov    %eax,-0x14(%rbp)
lea    -0x18(%rbp),%rdi
call   1030 <regfree@plt>
cmpl   $0x0,-0x14(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg_match>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2e9a(%rip),%rax
mov    0x2e9b(%rip),%rcx
mov    (%rcx),%edx
or     (%rax),%edx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
call   1040 <regcomp@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
call   1050 <regexec@plt>
mov    %eax,%ebx
mov    %r14,%rdi
call   1030 <regfree@plt>
xor    %eax,%eax
test   %ebx,%ebx
sete   %al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@REG_EXTENDED = global i32 0
@REG_NOSUB = global i32 0
define i32 @reg_match(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = load i32, i32* @REG_EXTENDED
%9 = load i32, i32* @REG_NOSUB
%10 = or i32 %8, %9
%11 = call i32 @regcomp(i32* %6, i8* %7, i32 %10)
%12 = load i8*, i8** %3
%13 = call i32 @regexec(i32* %6, i8* %12, i32 0, i32 0, i32 0)
store i32 %13, i32* %5
%14 = call i32 @regfree(i32* %6)
%15 = load i32, i32* %5
%16 = icmp ne i32 %15, 0
%17 = xor i1 %16, true
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
@REG_EXTENDED = global i32 0
@REG_NOSUB = global i32 0
define i32 @reg_match(i8* %0, i8* %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = load i32, i32* @REG_EXTENDED
%6 = load i32, i32* @REG_NOSUB
%7 = or i32 %6, %5
%8 = call i32 @regcomp(i32* %3, i8* %1, i32 %7)
%9 = call i32 @regexec(i32* %3, i8* %0, i32 0, i32 0, i32 0)
%10 = call i32 @regfree(i32* %3)
%11 = icmp eq i32 %9, 0
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ SHA512(unsigned char const *, size_t, unsigned char *);
void crypto_hash_sha512(unsigned char *hash, const unsigned char *in,
                        size_t inlen) {
  SHA512(in, inlen, hash);
}


x86 assembly (clang, -O0):
<crypto_hash_sha512>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x8(%rbp),%rdx
call   1030 <SHA512@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypto_hash_sha512>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rax,%rdx
jmp    1030 <SHA512@plt>

LLVM IR (-O0):
define void @crypto_hash_sha512(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i64, i64* %6
%9 = load i8*, i8** %4
%10 = call i32 @SHA512(i8* %7, i64 %8, i8* %9)
ret void
}

LLVM IR (-O2):
define void @crypto_hash_sha512(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @SHA512(i8* %1, i64 %2, i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ load_from_paths(char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  load_from_paths("a.o65", NULL);
  printf("\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <load_from_paths@plt>
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %esi,%esi
call   1040 <load_from_paths@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"a.o65\00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @load_from_paths(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* null)
%7 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"a.o65\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @load_from_paths(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* null)
%4 = tail call i32 @putchar(i32 10)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ socket_drainer_drain_and_close(int);
void socket_close(int fd) { socket_drainer_drain_and_close(fd); }


x86 assembly (clang, -O0):
<socket_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <socket_drainer_drain_and_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socket_close>:
jmp    1030 <socket_drainer_drain_and_close@plt>

LLVM IR (-O0):
define void @socket_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @socket_drainer_drain_and_close(i32 %3)
ret void
}

LLVM IR (-O2):
define void @socket_close(i32 %0) {
%2 = tail call i32 @socket_drainer_drain_and_close(i32 %0)
ret void
}
/* Type definitions */
struct stack {
  int dummy;
};

/* Variables and functions */
void initStack(struct stack **s) { *s = NULL; }


x86 assembly (clang, -O0):
<initStack>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<initStack>:
movq   $0x0,(%rdi)
ret

LLVM IR (-O0):
%struct.stack = type { i32 }
define void @initStack(%struct.stack** %0) {
%2 = alloca %struct.stack**
store %struct.stack** %0, %struct.stack*** %2
%3 = load %struct.stack**, %struct.stack*** %2
store %struct.stack* null, %struct.stack** %3
ret void
}

LLVM IR (-O2):
%struct.stack = type { i32 }
define void @initStack(%struct.stack** nocapture writeonly %0) {
store %struct.stack* null, %struct.stack** %0
ret void
}
/* Variables and functions */
void *calloc(int, unsigned long);
int /*<<< orphan*/ free(void *);
void f1() {
  int i;
  unsigned long j;
  i = j = 10;
  void *ptr = calloc(i, j);
  free(ptr);
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0xa,-0x10(%rbp)
movl   $0xa,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
push   %rax
mov    $0xa,%esi
mov    $0xa,%edi
call   1040 <calloc@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @f1() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i8*
store i64 10, i64* %2
store i32 10, i32* %1
%4 = load i32, i32* %1
%5 = load i64, i64* %2
%6 = call i8* @calloc(i32 %4, i64 %5)
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = call i32 @free(i8* %7)
ret void
}

LLVM IR (-O2):
define void @f1() {
%1 = tail call i8* @calloc(i32 10, i64 10)
%2 = tail call i32 @free(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sscanf(char *, char *, int *);
int getInt(char *integer) {
  int i = -1;
  sscanf(integer, "%d", &i);
  return i;
}


x86 assembly (clang, -O0):
<getInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed2(%rip),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <sscanf@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getInt>:
push   %rax
movl   $0xffffffff,0x4(%rsp)
ff
lea    0xee0(%rip),%rsi
lea    0x4(%rsp),%rdx
call   1030 <sscanf@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @getInt(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 -1, i32* %3
%4 = load i8*, i8** %2
%5 = call i32 @sscanf(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @getInt(i8* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 -1, i32* %2
%4 = call i32 @sscanf(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
ret i32 %5
}
test_7(int code) {
  _Bool temp = testit();
  _Bool rotate = (code == 22);
  if (!rotate || temp == 0)
    oof();
}


x86 assembly (clang, -O0):
<test_7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <testit@plt>
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
mov    %al,-0x9(%rbp)
cmpl   $0x16,-0x8(%rbp)
sete   %al
and    $0x1,%al
mov    %al,-0xa(%rbp)
testb  $0x1,-0xa(%rbp)
je     1164 <test_7+0x44>
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x0,%eax
jne    116b <test_7+0x4b>
mov    $0x0,%al
call   1040 <oof@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_7>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <testit@plt>
cmp    $0x16,%ebx
jne    1135 <test_7+0x15>
test   %eax,%eax
je     1135 <test_7+0x15>
pop    %rbx
ret
xor    %eax,%eax
call   1040 <oof@plt>
pop    %rbx
ret

LLVM IR (-O0):
define i32 @test_7(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8
store i32 %0, i32* %3
%6 = call i32 (...) @testit()
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i8
store i8 %8, i8* %4
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 22
%11 = zext i1 %10 to i8
store i8 %11, i8* %5
%12 = load i8, i8* %5
%13 = trunc i8 %12 to i1
br i1 %13, label %14, label %19
14: ; preds = %1
%15 = load i8, i8* %4
%16 = trunc i8 %15 to i1
%17 = zext i1 %16 to i32
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %21
19: ; preds = %14, %1
%20 = call i32 (...) @oof()
br label %21
21: ; preds = %19, %14
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @test_7(i32 %0) {
%2 = tail call i32 (...) @testit()
%3 = icmp ne i32 %0, 22
%4 = icmp eq i32 %2, 0
%5 = select i1 %3, i1 true, i1 %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 (...) @oof()
br label %8
8: ; preds = %1, %6
ret i32 undef
}
__attribute__((stdcall)) int WSACleanup_wrap(void) { return 0; }


x86 assembly (clang, -O0):
<WSACleanup_wrap>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WSACleanup_wrap>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @WSACleanup_wrap() {
ret i32 0
}

LLVM IR (-O2):
define i32 @WSACleanup_wrap() {
ret i32 0
}
unsigned long fetch_and_store(volatile unsigned int *address,
                              unsigned int value) {
  asm volatile("xchgl %k0,%1"
               : "=r"(value)
               : "m"(*address), "0"(value)
               : "memory");
  return value;
}


x86 assembly (clang, -O0):
<fetch_and_store>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%eax
xchg   %eax,(%rcx)
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetch_and_store>:
xchg   %esi,(%rdi)
mov    %esi,%eax
ret

LLVM IR (-O0):
define i64 @fetch_and_store(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 asm sideeffect "xchgl ${0:k},$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %5, i32 %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = zext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @fetch_and_store(i32* %0, i32 %1) {
%3 = tail call i32 asm sideeffect "xchgl ${0:k},$1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32 %1)
%4 = zext i32 %3 to i64
ret i64 %4
}
int show_bar() { return 1; }


x86 assembly (clang, -O0):
<show_bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_bar>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @show_bar() {
ret i32 1
}

LLVM IR (-O2):
define i32 @show_bar() {
ret i32 1
}
/* Variables and functions */
void *malloc(int);
void *CRYPTO_malloc(int num, const char *file, int line) {
  if (num <= 0)
    return NULL;
  return malloc(num);
}


x86 assembly (clang, -O0):
<CRYPTO_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
cmpl   $0x0,-0xc(%rbp)
jg     1139 <CRYPTO_malloc+0x29>
movq   $0x0,-0x8(%rbp)
jmp    1145 <CRYPTO_malloc+0x35>
mov    -0xc(%rbp),%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRYPTO_malloc>:
test   %edi,%edi
jle    1119 <CRYPTO_malloc+0x9>
jmp    1030 <malloc@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @CRYPTO_malloc(i32 %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = icmp sle i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
store i8* null, i8** %4
br label %14
11: ; preds = %3
%12 = load i32, i32* %5
%13 = call i8* @malloc(i32 %12)
store i8* %13, i8** %4
br label %14
14: ; preds = %11, %10
%15 = load i8*, i8** %4
ret i8* %15
}

LLVM IR (-O2):
define noalias i8* @CRYPTO_malloc(i32 %0, i8* nocapture readnone %1, i32 %2) {
%4 = icmp slt i32 %0, 1
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i8* @malloc(i32 %0)
br label %7
7: ; preds = %3, %5
%8 = phi i8* [ %6, %5 ], [ null, %3 ]
ret i8* %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern void shmem_long_put(long *dest, const long *src, size_t len, int pe) {
  printf("\nOpenSHMEM Analyzer\n");
}


x86 assembly (clang, -O0):
<shmem_long_put>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
lea    0xed2(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_long_put>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0AOpenSHMEM Analyzer\0A\00"
define void @shmem_long_put(i64* %0, i64* %1, i64 %2, i32 %3) {
%5 = alloca i64*
%6 = alloca i64*
%7 = alloca i64
%8 = alloca i32
store i64* %0, i64** %5
store i64* %1, i64** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
%9 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"\0AOpenSHMEM Analyzer\00"
define void @shmem_long_put(i64* nocapture readnone %0, i64* nocapture readnone %1, i64 %2, i32 %3) {
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
void dev_midi_fill(void *arg, int count) {}


x86 assembly (clang, -O0):
<dev_midi_fill>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dev_midi_fill>:
ret

LLVM IR (-O0):
define void @dev_midi_fill(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @dev_midi_fill(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("MBEDTLS_AES_C and/or MBEDTLS_DHM_C and/or MBEDTLS_ENTROPY_C "
         "and/or MBEDTLS_NET_C and/or MBEDTLS_RSA_C and/or "
         "MBEDTLS_SHA256_C and/or MBEDTLS_FS_IO and/or "
         "MBEDTLS_CTR_DRBG_C not defined.\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [187 x i8] c"MBEDTLS_AES_C and/or MBEDTLS_DHM_C and/or MBEDTLS_ENTROPY_C and/or MBEDTLS_NET_C and/or MBEDTLS_RSA_C and/or MBEDTLS_SHA256_C and/or MBEDTLS_FS_IO and/or MBEDTLS_CTR_DRBG_C not defined.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([187 x i8], [187 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [186 x i8] c"MBEDTLS_AES_C and/or MBEDTLS_DHM_C and/or MBEDTLS_ENTROPY_C and/or MBEDTLS_NET_C and/or MBEDTLS_RSA_C and/or MBEDTLS_SHA256_C and/or MBEDTLS_FS_IO and/or MBEDTLS_CTR_DRBG_C not defined.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([186 x i8], [186 x i8]* @str, i64 0, i64 0))
ret i32 0
}
double sun_equatorial_horizontal_parallax(double r) {
  return 8.794 / (3600.0 * r);
}


x86 assembly (clang, -O0):
<sun_equatorial_horizontal_parallax>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm1
mulsd  -0x8(%rbp),%xmm1
movsd  0xee2(%rip),%xmm0
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sun_equatorial_horizontal_parallax>:
mulsd  0xef8(%rip),%xmm0
movsd  0xef8(%rip),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @sun_equatorial_horizontal_parallax(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double 3.600000e+03, %3
%5 = fdiv double 8.794000e+00, %4
ret double %5
}

LLVM IR (-O2):
define double @sun_equatorial_horizontal_parallax(double %0) {
%2 = fmul double %0, 3.600000e+03
%3 = fdiv double 8.794000e+00, %2
ret double %3
}
void foo(int a) { ++a; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
ret void
}
void kbase_ipa_model_param_free_all(struct kbase_ipa_model *model) {}


x86 assembly (clang, -O0):
<kbase_ipa_model_param_free_all>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kbase_ipa_model_param_free_all>:
ret

LLVM IR (-O0):
%struct.kbase_ipa_model = type opaque
define void @kbase_ipa_model_param_free_all(%struct.kbase_ipa_model* %0) {
%2 = alloca %struct.kbase_ipa_model*
store %struct.kbase_ipa_model* %0, %struct.kbase_ipa_model** %2
ret void
}

LLVM IR (-O2):
%struct.kbase_ipa_model = type opaque
define void @kbase_ipa_model_param_free_all(%struct.kbase_ipa_model* nocapture %0) {
ret void
}
int spook_log_deinit() { return 0; }


x86 assembly (clang, -O0):
<spook_log_deinit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spook_log_deinit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @spook_log_deinit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @spook_log_deinit() {
ret i32 0
}
char *gets(buf)
char *buf;
{
  ;
  return (char *)__send_to_ppe(0x2100, 21, &buf);
}


x86 assembly (clang, -O0):
<gets>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2100,%edi
mov    $0x15,%esi
lea    -0x8(%rbp),%rdx
mov    $0x0,%al
call   1030 <__send_to_ppe@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gets>:
push   %rax
mov    %rdi,(%rsp)
mov    %rsp,%rdx
mov    $0x2100,%edi
mov    $0x15,%esi
xor    %eax,%eax
call   1030 <__send_to_ppe@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i8* @gets(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i32, i32, i8**, ...) bitcast (i32 (...)* @__send_to_ppe to i32 (i32, i32, i8**, ...)*)(i32 8448, i32 21, i8** %2)
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @gets(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i32, i32, i8**, ...) bitcast (i32 (...)* @__send_to_ppe to i32 (i32, i32, i8**, ...)*)(i32 8448, i32 21, i8** %2)
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ bar(int *);
void foo() {
  int i, j;
#pragma omp parallel for ordered(1)
  for (i = 0; i < 100; ++i) {
#pragma omp ordered depend(sink : poo - 1, paa + 1)
    bar(&i);
#pragma omp ordered depend(source)
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jge    1140 <foo+0x30>
lea    -0x4(%rbp),%rdi
call   1030 <bar@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <foo+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
sub    $0x10,%rsp
movl   $0x0,0xc(%rsp)
lea    0xc(%rsp),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %rbx,%rdi
call   1030 <bar@plt>
mov    0xc(%rsp),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0xc(%rsp)
cmp    $0x63,%eax
jl     1130 <foo+0x20>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @foo() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %8, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 100
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 @bar(i32* %1)
br label %8
8: ; preds = %6
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %3
11: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @foo() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
br label %3
3: ; preds = %0, %3
%4 = call i32 @bar(i32* %1)
%5 = load i32, i32* %1
%6 = add nsw i32 %5, 1
store i32 %6, i32* %1
%7 = icmp slt i32 %5, 99
br i1 %7, label %3, label %8
8: ; preds = %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
void signal_handler(int sig) {
  fprintf(stderr, "\nSignal %d received.  Terminating ZPL application!\n\n",
          sig);
  exit(sig);
}


x86 assembly (clang, -O0):
<signal_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
lea    0xec2(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<signal_handler>:
push   %rbx
mov    %edi,%ebx
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
lea    0xecd(%rip),%rsi
mov    %ebx,%edx
call   1030 <fprintf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [53 x i8] c"\0ASignal %d received. Terminating ZPL application!\0A\0A\00"
define void @signal_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = load i32, i32* %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [53 x i8] c"\0ASignal %d received. Terminating ZPL application!\0A\0A\00"
define void @signal_handler(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str, i64 0, i64 0), i32 %0)
%4 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
int __infer_nondet_int();
int toascii(int x) { return __infer_nondet_int(); }


x86 assembly (clang, -O0):
<toascii>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toascii>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_int@plt>

LLVM IR (-O0):
define i32 @toascii(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @__infer_nondet_int()
ret i32 %3
}

LLVM IR (-O2):
define i32 @toascii(i32 %0) {
%2 = tail call i32 (...) @__infer_nondet_int()
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ nnset_pattern(int);
int rand();
void nninit_pattern(void) {
  int pat = rand() % 16;
  nnset_pattern(pat);
}


x86 assembly (clang, -O0):
<nninit_pattern>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <rand@plt>
mov    $0x10,%ecx
cltd
idiv   %ecx
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <nnset_pattern@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nninit_pattern>:
push   %rax
xor    %eax,%eax
call   1040 <rand@plt>
lea    0xf(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xfffffff0,%ecx
sub    %ecx,%eax
mov    %eax,%edi
pop    %rax
jmp    1030 <nnset_pattern@plt>

LLVM IR (-O0):
define void @nninit_pattern() {
%1 = alloca i32
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 16
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = call i32 @nnset_pattern(i32 %4)
ret void
}

LLVM IR (-O2):
define void @nninit_pattern() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 16
%3 = tail call i32 @nnset_pattern(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void close_inet_tx_sock(int sock_fd) {
  {};
  if (sock_fd != -1) {
    close(sock_fd);
  }
  {};
}


x86 assembly (clang, -O0):
<close_inet_tx_sock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
je     112d <close_inet_tx_sock+0x1d>
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_inet_tx_sock>:
cmp    $0xffffffff,%edi
je     111a <close_inet_tx_sock+0xa>
jmp    1030 <close@plt>
ret

LLVM IR (-O0):
define void @close_inet_tx_sock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, -1
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @close(i32 %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @close_inet_tx_sock(i32 %0) {
%2 = icmp eq i32 %0, -1
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @close(i32 %0)
br label %5
5: ; preds = %3, %1
ret void
}
long long foo(long long a, long long b) { return a % b; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %rdi,%rax
mov    %rdi,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1118 <foo+0x18>
cqto
idiv   %rsi
mov    %rdx,%rax
ret
xor    %edx,%edx
div    %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i64 @foo(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = srem i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @foo(i64 %0, i64 %1) {
%3 = srem i64 %0, %1
ret i64 %3
}
char *hmac224hex(bitstr, bitcnt, key, keylen)
unsigned char *bitstr;
unsigned long bitcnt;
unsigned char *key;
unsigned int keylen;
{ return ((char *)hmaccomp(224, 2, bitstr, bitcnt, key, keylen)); }


x86 assembly (clang, -O0):
<hmac224hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    -0x1c(%rbp),%r9d
mov    $0xe0,%edi
mov    $0x2,%esi
mov    $0x0,%al
call   1030 <hmaccomp@plt>
cltq
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hmac224hex>:
push   %rax
mov    %ecx,%r9d
mov    %rdx,%r8
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    $0xe0,%edi
mov    $0x2,%esi
xor    %eax,%eax
call   1030 <hmaccomp@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i8* @hmac224hex(i8* %0, i64 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i8*, i8** %7
%12 = load i32, i32* %8
%13 = call i32 (i32, i32, i8*, i64, i8*, i32, ...) bitcast (i32 (...)* @hmaccomp to i32 (i32, i32, i8*, i64, i8*, i32, ...)*)(i32 224, i32 2, i8* %9, i64 %10, i8* %11, i32 %12)
%14 = sext i32 %13 to i64
%15 = inttoptr i64 %14 to i8*
ret i8* %15
}

LLVM IR (-O2):
define i8* @hmac224hex(i8* %0, i64 %1, i8* %2, i32 %3) {
%5 = tail call i32 (i32, i32, i8*, i64, i8*, i32, ...) bitcast (i32 (...)* @hmaccomp to i32 (i32, i32, i8*, i64, i8*, i32, ...)*)(i32 224, i32 2, i8* %0, i64 %1, i8* %2, i32 %3)
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}
int cpu2agc(int Input) {
  if (Input < 0)
    return (077777 & ~(-Input));
  else
    return (077777 & Input);
}


x86 assembly (clang, -O0):
<cpu2agc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1126 <cpu2agc+0x26>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
and    $0x7fff,%eax
mov    %eax,-0x4(%rbp)
jmp    1131 <cpu2agc+0x31>
mov    -0x8(%rbp),%eax
and    $0x7fff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu2agc>:
lea    -0x1(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
and    $0x7fff,%eax
ret

LLVM IR (-O0):
define i32 @cpu2agc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 0, %7
%9 = xor i32 %8, -1
%10 = and i32 32767, %9
store i32 %10, i32* %2
br label %14
11: ; preds = %1
%12 = load i32, i32* %3
%13 = and i32 32767, %12
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @cpu2agc(i32 %0) {
%2 = icmp slt i32 %0, 0
%3 = add i32 %0, 32767
%4 = select i1 %2, i32 %3, i32 %0
%5 = and i32 %4, 32767
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ atomic_int;

/* Variables and functions */
int /*<<< orphan*/ atomic_flag_clear_explicit(int /*<<< orphan*/ *,
                                              int /*<<< orphan*/);
int /*<<< orphan*/ memory_order_acq_rel;
int /*<<< orphan*/ memory_order_acquire;
void clear(atomic_int *i) {
  atomic_flag_clear_explicit(i, memory_order_acquire);
  atomic_flag_clear_explicit(i, memory_order_acq_rel);
}


x86 assembly (clang, -O0):
<clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rax
mov    (%rax),%esi
call   1030 <atomic_flag_clear_explicit@plt>
mov    -0x8(%rbp),%rdi
mov    0x2e9f(%rip),%rax
mov    (%rax),%esi
call   1030 <atomic_flag_clear_explicit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ecd(%rip),%rax
mov    (%rax),%esi
call   1030 <atomic_flag_clear_explicit@plt>
mov    0x2eaf(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <atomic_flag_clear_explicit@plt>

LLVM IR (-O0):
@memory_order_acquire = global i32 0
@memory_order_acq_rel = global i32 0
define void @clear(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* @memory_order_acquire
%5 = call i32 @atomic_flag_clear_explicit(i32* %3, i32 %4)
%6 = load i32*, i32** %2
%7 = load i32, i32* @memory_order_acq_rel
%8 = call i32 @atomic_flag_clear_explicit(i32* %6, i32 %7)
ret void
}

LLVM IR (-O2):
@memory_order_acquire = global i32 0
@memory_order_acq_rel = global i32 0
define void @clear(i32* %0) {
%2 = load i32, i32* @memory_order_acquire
%3 = tail call i32 @atomic_flag_clear_explicit(i32* %0, i32 %2)
%4 = load i32, i32* @memory_order_acq_rel
%5 = tail call i32 @atomic_flag_clear_explicit(i32* %0, i32 %4)
ret void
}
void HplCC2430InterruptsC$InterruptTXDone$fired(void) {
  HalCC2430RadioP$InterruptTXDone$fired();
}


x86 assembly (clang, -O0):
<HplCC2430InterruptsC$InterruptTXDone$fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HalCC2430RadioP$InterruptTXDone$fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplCC2430InterruptsC$InterruptTXDone$fired>:
xor    %eax,%eax
jmp    1030 <HalCC2430RadioP$InterruptTXDone$fired@plt>

LLVM IR (-O0):
define void @"HplCC2430InterruptsC$InterruptTXDone$fired"() {
%1 = call i32 (...) @"HalCC2430RadioP$InterruptTXDone$fired"()
ret void
}

LLVM IR (-O2):
define void @"HplCC2430InterruptsC$InterruptTXDone$fired"() {
%1 = tail call i32 (...) @"HalCC2430RadioP$InterruptTXDone$fired"()
ret void
}
/* Variables and functions */
scalar_t__ isspace(char const);
const char *eat_space(const char *str) {
  while (isspace(*str))
    str++;
  return str;
}


x86 assembly (clang, -O0):
<eat_space>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     1143 <eat_space+0x33>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <eat_space+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eat_space>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isspace@plt>
test   %rax,%rax
jne    1120 <eat_space+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @eat_space(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i64 @isspace(i8 signext %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @eat_space(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i64 @isspace(i8 signext %4)
%6 = icmp eq i64 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i8* %3
}