#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ SysCtlDelay(int);
void SysCtlClockDividersSet(unsigned long SysDivSelReq,
                            unsigned long M3ClkDivReq) {
  unsigned long ulMWRAllow;
  unsigned long cur_m3ss_val = 0x0;
  unsigned long cur_sys_div_val = 0x0;
  ulMWRAllow = (*((volatile unsigned long *)(0x400FB980)));
  (*((volatile unsigned long *)(0x400FB980))) = 0xA5A5A5A5;
  cur_m3ss_val =
      (((*((volatile unsigned long *)(0x400FB810))) & (0x000C0000 >> 18))
       << 18);
  if (M3ClkDivReq != 0xFFFFFFFF) {
    while ((M3ClkDivReq & 0x000C0000) != cur_m3ss_val) {
      if (cur_m3ss_val == 0x00080000) {
        (*((volatile unsigned long *)(0x400FB810))) =
            ((0x00040000) >> 18) |
            ((*((volatile unsigned long *)(0x400FB810))) & ~(0x000C0000 >> 18));
        cur_m3ss_val = 0x00040000;
        if ((M3ClkDivReq & 0x000C0000) != cur_m3ss_val)
          SysCtlDelay(15);
      } else {
        (*((volatile unsigned long *)(0x400FB810))) =
            (((M3ClkDivReq & 0x000C0000) >> 18) |
             ((*((volatile unsigned long *)(0x400FB810))) &
              ~(0x000C0000 >> 18)));
        cur_m3ss_val =
            (((*((volatile unsigned long *)(0x400FB810))) & (0x000C0000 >> 18))
             << 18);
      }
    }
  }
  cur_sys_div_val =
      ((*((volatile unsigned long *)(0x400FB80C))) & (0x00300000 >> 20)) << 20;
  if (SysDivSelReq != 0xFFFFFFFF) {
    while ((SysDivSelReq & 0x00300000) != cur_sys_div_val) {
      if (cur_sys_div_val == 0x00300000) {
        (*((volatile unsigned long *)(0x400FB80C))) =
            ((0x00200000) >> 20) |
            ((*((volatile unsigned long *)(0x400FB80C))) & ~(0x00300000 >> 20));
        cur_sys_div_val = 0x00200000;
        if ((SysDivSelReq & 0x00300000) != cur_sys_div_val)
          SysCtlDelay(15);
      } else if (cur_sys_div_val == 0x00200000) {
        (*((volatile unsigned long *)(0x400FB80C))) =
            ((0x00100000) >> 20) |
            ((*((volatile unsigned long *)(0x400FB80C))) & ~(0x00300000 >> 20));
        cur_sys_div_val = 0x00100000;
        if ((SysDivSelReq & 0x00300000) != cur_sys_div_val)
          SysCtlDelay(15);
      } else {
        (*((volatile unsigned long *)(0x400FB80C))) =
            ((SysDivSelReq & 0x00300000) >> 20) |
            ((*((volatile unsigned long *)(0x400FB80C))) & ~(0x00300000 >> 20));
        cur_sys_div_val =
            ((*((volatile unsigned long *)(0x400FB80C))) & (0x00300000 >> 20))
            << 20;
      }
    }
  }
  (*((volatile unsigned long *)(0x400FB980))) = ulMWRAllow;
}


x86 assembly (clang, -O0):
<SysCtlClockDividersSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    $0x400fb980,%eax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    $0x400fb980,%eax
mov    $0xa5a5a5a5,%ecx
mov    %rcx,(%rax)
mov    $0x400fb810,%eax
mov    (%rax),%rax
and    $0x3,%rax
shl    $0x12,%rax
mov    %rax,-0x20(%rbp)
mov    $0xffffffff,%eax
cmp    %rax,-0x10(%rbp)
je     121a <SysCtlClockDividersSet+0x10a>
jmp    1171 <SysCtlClockDividersSet+0x61>
mov    -0x10(%rbp),%rax
and    $0xc0000,%rax
cmp    -0x20(%rbp),%rax
je     1215 <SysCtlClockDividersSet+0x105>
cmpq   $0x80000,-0x20(%rbp)
jne    11d6 <SysCtlClockDividersSet+0xc6>
mov    $0x400fb810,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffffc,%rcx
or     $0x1,%rcx
mov    $0x400fb810,%eax
mov    %rcx,(%rax)
movq   $0x40000,-0x20(%rbp)
mov    -0x10(%rbp),%rax
and    $0xc0000,%rax
cmp    -0x20(%rbp),%rax
je     11d1 <SysCtlClockDividersSet+0xc1>
mov    $0xf,%edi
call   1030 <SysCtlDelay@plt>
jmp    1210 <SysCtlClockDividersSet+0x100>
mov    -0x10(%rbp),%rcx
and    $0xc0000,%rcx
shr    $0x12,%rcx
mov    $0x400fb810,%eax
mov    (%rax),%rax
and    $0xfffffffffffffffc,%rax
or     %rax,%rcx
mov    $0x400fb810,%eax
mov    %rcx,(%rax)
mov    $0x400fb810,%eax
mov    (%rax),%rax
and    $0x3,%rax
shl    $0x12,%rax
mov    %rax,-0x20(%rbp)
jmp    1171 <SysCtlClockDividersSet+0x61>
jmp    121a <SysCtlClockDividersSet+0x10a>
mov    $0x400fb80c,%eax
mov    (%rax),%rax
and    $0x3,%rax
shl    $0x14,%rax
mov    %rax,-0x28(%rbp)
mov    $0xffffffff,%eax
cmp    %rax,-0x8(%rbp)
je     1341 <SysCtlClockDividersSet+0x231>
jmp    1242 <SysCtlClockDividersSet+0x132>
mov    -0x8(%rbp),%rax
and    $0x300000,%rax
cmp    -0x28(%rbp),%rax
je     133c <SysCtlClockDividersSet+0x22c>
cmpq   $0x300000,-0x28(%rbp)
jne    12a7 <SysCtlClockDividersSet+0x197>
mov    $0x400fb80c,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffffc,%rcx
or     $0x2,%rcx
mov    $0x400fb80c,%eax
mov    %rcx,(%rax)
movq   $0x200000,-0x28(%rbp)
mov    -0x8(%rbp),%rax
and    $0x300000,%rax
cmp    -0x28(%rbp),%rax
je     12a2 <SysCtlClockDividersSet+0x192>
mov    $0xf,%edi
call   1030 <SysCtlDelay@plt>
jmp    1337 <SysCtlClockDividersSet+0x227>
cmpq   $0x200000,-0x28(%rbp)
jne    12f8 <SysCtlClockDividersSet+0x1e8>
mov    $0x400fb80c,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffffc,%rcx
or     $0x1,%rcx
mov    $0x400fb80c,%eax
mov    %rcx,(%rax)
movq   $0x100000,-0x28(%rbp)
mov    -0x8(%rbp),%rax
and    $0x300000,%rax
cmp    -0x28(%rbp),%rax
je     12f3 <SysCtlClockDividersSet+0x1e3>
mov    $0xf,%edi
call   1030 <SysCtlDelay@plt>
jmp    1332 <SysCtlClockDividersSet+0x222>
mov    -0x8(%rbp),%rcx
and    $0x300000,%rcx
shr    $0x14,%rcx
mov    $0x400fb80c,%eax
mov    (%rax),%rax
and    $0xfffffffffffffffc,%rax
or     %rax,%rcx
mov    $0x400fb80c,%eax
mov    %rcx,(%rax)
mov    $0x400fb80c,%eax
mov    (%rax),%rax
and    $0x3,%rax
shl    $0x14,%rax
mov    %rax,-0x28(%rbp)
jmp    1337 <SysCtlClockDividersSet+0x227>
jmp    1242 <SysCtlClockDividersSet+0x132>
jmp    1341 <SysCtlClockDividersSet+0x231>
mov    -0x18(%rbp),%rcx
mov    $0x400fb980,%eax
mov    %rcx,(%rax)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlClockDividersSet>:
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
mov    %rdi,%r14
mov    0x400fb980,%r15
40
mov    $0xa5a5a5a5,%eax
mov    %rax,0x400fb980
40
mov    0x400fb810,%rax
40
mov    $0xffffffff,%r12d
cmp    %r12,%rsi
je     11cb <SysCtlClockDividersSet+0xbb>
mov    %rsi,%rbx
and    $0x3,%eax
shl    $0x12,%rax
and    $0xc0000,%ebx
cmp    %rax,%rbx
je     11cb <SysCtlClockDividersSet+0xbb>
mov    %rbx,%r13
shr    $0x12,%r13
jmp    118f <SysCtlClockDividersSet+0x7f>
cs nopw 0x0(%rax,%rax,1)
or     %r13,%rcx
mov    %rcx,0x400fb810
40
mov    0x400fb810,%rax
40
and    $0x3,%eax
shl    $0x12,%rax
cmp    %rax,%rbx
je     11cb <SysCtlClockDividersSet+0xbb>
mov    0x400fb810,%rcx
40
and    $0xfffffffffffffffc,%rcx
cmp    $0x80000,%rax
jne    1170 <SysCtlClockDividersSet+0x60>
or     $0x1,%rcx
mov    %rcx,0x400fb810
40
cmp    $0x40000,%ebx
je     11cb <SysCtlClockDividersSet+0xbb>
mov    $0xf,%edi
call   1030 <SysCtlDelay@plt>
mov    $0x40000,%eax
cmp    %rax,%rbx
jne    118f <SysCtlClockDividersSet+0x7f>
mov    0x400fb80c,%rax
40
cmp    %r12,%r14
je     11eb <SysCtlClockDividersSet+0xdb>
and    $0x3,%eax
shl    $0x14,%rax
and    $0x300000,%r14d
cmp    %rax,%r14
jne    11fd <SysCtlClockDividersSet+0xed>
mov    %r15,0x400fb980
40
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
ret
mov    %r14,%rbx
shr    $0x14,%rbx
jmp    123b <SysCtlClockDividersSet+0x12b>
cs nopw 0x0(%rax,%rax,1)
mov    0x400fb80c,%rax
40
and    $0xfffffffffffffffc,%rax
or     %rbx,%rax
mov    %rax,0x400fb80c
40
mov    0x400fb80c,%rax
40
and    $0x3,%eax
shl    $0x14,%rax
cmp    %rax,%r14
je     11eb <SysCtlClockDividersSet+0xdb>
cmp    $0x200000,%rax
je     1290 <SysCtlClockDividersSet+0x180>
cmp    $0x300000,%rax
jne    1210 <SysCtlClockDividersSet+0x100>
mov    0x400fb80c,%rax
40
and    $0xfffffffffffffffc,%rax
or     $0x2,%rax
mov    %rax,0x400fb80c
40
cmp    $0x200000,%r14d
je     11eb <SysCtlClockDividersSet+0xdb>
mov    $0xf,%edi
call   1030 <SysCtlDelay@plt>
mov    $0x200000,%eax
jmp    1236 <SysCtlClockDividersSet+0x126>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    0x400fb80c,%rax
40
and    $0xfffffffffffffffc,%rax
or     $0x1,%rax
mov    %rax,0x400fb80c
40
cmp    $0x100000,%r14d
je     11eb <SysCtlClockDividersSet+0xdb>
mov    $0xf,%edi
call   1030 <SysCtlDelay@plt>
mov    $0x100000,%eax
jmp    1236 <SysCtlClockDividersSet+0x126>

LLVM IR (-O0):
define void @SysCtlClockDividersSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
store i64 0, i64* %6
store i64 0, i64* %7
%8 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store i64 %8, i64* %5
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%9 = load volatile i64, i64* inttoptr (i64 1074771984 to i64*)
%10 = and i64 %9, 3
%11 = shl i64 %10, 18
store i64 %11, i64* %6
%12 = load i64, i64* %4
%13 = icmp ne i64 %12, 4294967295
br i1 %13, label %14, label %46
14: ; preds = %2
br label %15
15: ; preds = %44, %14
%16 = load i64, i64* %4
%17 = and i64 %16, 786432
%18 = load i64, i64* %6
%19 = icmp ne i64 %17, %18
br i1 %19, label %20, label %45
20: ; preds = %15
%21 = load i64, i64* %6
%22 = icmp eq i64 %21, 524288
br i1 %22, label %23, label %34
23: ; preds = %20
%24 = load volatile i64, i64* inttoptr (i64 1074771984 to i64*)
%25 = and i64 %24, -4
%26 = or i64 1, %25
store volatile i64 %26, i64* inttoptr (i64 1074771984 to i64*)
store i64 262144, i64* %6
%27 = load i64, i64* %4
%28 = and i64 %27, 786432
%29 = load i64, i64* %6
%30 = icmp ne i64 %28, %29
br i1 %30, label %31, label %33
31: ; preds = %23
%32 = call i32 @SysCtlDelay(i32 15)
br label %33
33: ; preds = %31, %23
br label %44
34: ; preds = %20
%35 = load i64, i64* %4
%36 = and i64 %35, 786432
%37 = lshr i64 %36, 18
%38 = load volatile i64, i64* inttoptr (i64 1074771984 to i64*)
%39 = and i64 %38, -4
%40 = or i64 %37, %39
store volatile i64 %40, i64* inttoptr (i64 1074771984 to i64*)
%41 = load volatile i64, i64* inttoptr (i64 1074771984 to i64*)
%42 = and i64 %41, 3
%43 = shl i64 %42, 18
store i64 %43, i64* %6
br label %44
44: ; preds = %34, %33
br label %15
45: ; preds = %15
br label %46
46: ; preds = %45, %2
%47 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%48 = and i64 %47, 3
%49 = shl i64 %48, 20
store i64 %49, i64* %7
%50 = load i64, i64* %3
%51 = icmp ne i64 %50, 4294967295
br i1 %51, label %52, label %99
52: ; preds = %46
br label %53
53: ; preds = %97, %52
%54 = load i64, i64* %3
%55 = and i64 %54, 3145728
%56 = load i64, i64* %7
%57 = icmp ne i64 %55, %56
br i1 %57, label %58, label %98
58: ; preds = %53
%59 = load i64, i64* %7
%60 = icmp eq i64 %59, 3145728
br i1 %60, label %61, label %72
61: ; preds = %58
%62 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%63 = and i64 %62, -4
%64 = or i64 2, %63
store volatile i64 %64, i64* inttoptr (i64 1074771980 to i64*)
store i64 2097152, i64* %7
%65 = load i64, i64* %3
%66 = and i64 %65, 3145728
%67 = load i64, i64* %7
%68 = icmp ne i64 %66, %67
br i1 %68, label %69, label %71
69: ; preds = %61
%70 = call i32 @SysCtlDelay(i32 15)
br label %71
71: ; preds = %69, %61
br label %97
72: ; preds = %58
%73 = load i64, i64* %7
%74 = icmp eq i64 %73, 2097152
br i1 %74, label %75, label %86
75: ; preds = %72
%76 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%77 = and i64 %76, -4
%78 = or i64 1, %77
store volatile i64 %78, i64* inttoptr (i64 1074771980 to i64*)
store i64 1048576, i64* %7
%79 = load i64, i64* %3
%80 = and i64 %79, 3145728
%81 = load i64, i64* %7
%82 = icmp ne i64 %80, %81
br i1 %82, label %83, label %85
83: ; preds = %75
%84 = call i32 @SysCtlDelay(i32 15)
br label %85
85: ; preds = %83, %75
br label %96
86: ; preds = %72
%87 = load i64, i64* %3
%88 = and i64 %87, 3145728
%89 = lshr i64 %88, 20
%90 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%91 = and i64 %90, -4
%92 = or i64 %89, %91
store volatile i64 %92, i64* inttoptr (i64 1074771980 to i64*)
%93 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%94 = and i64 %93, 3
%95 = shl i64 %94, 20
store i64 %95, i64* %7
br label %96
96: ; preds = %86, %85
br label %97
97: ; preds = %96, %71
br label %53
98: ; preds = %53
br label %99
99: ; preds = %98, %46
%100 = load i64, i64* %5
store volatile i64 %100, i64* inttoptr (i64 1074772352 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysCtlClockDividersSet(i64 %0, i64 %1) {
%3 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%4 = load volatile i64, i64* inttoptr (i64 1074771984 to i64*)
%5 = shl i64 %4, 18
%6 = and i64 %5, 786432
%7 = icmp eq i64 %1, 4294967295
br i1 %7, label %31, label %8
8: ; preds = %2
%9 = and i64 %1, 786432
%10 = icmp eq i64 %9, %6
br i1 %10, label %31, label %11
11: ; preds = %8
%12 = lshr exact i64 %9, 18
%13 = icmp eq i64 %9, 262144
br label %14
14: ; preds = %11, %28
%15 = phi i64 [ %6, %11 ], [ %29, %28 ]
%16 = icmp eq i64 %15, 524288
%17 = load volatile i64, i64* inttoptr (i64 1074771984 to i64*)
%18 = and i64 %17, -4
br i1 %16, label %19, label %23
19: ; preds = %14
%20 = or i64 %18, 1
store volatile i64 %20, i64* inttoptr (i64 1074771984 to i64*)
br i1 %13, label %31, label %21
21: ; preds = %19
%22 = tail call i32 @SysCtlDelay(i32 15)
br label %28
23: ; preds = %14
%24 = or i64 %18, %12
store volatile i64 %24, i64* inttoptr (i64 1074771984 to i64*)
%25 = load volatile i64, i64* inttoptr (i64 1074771984 to i64*)
%26 = shl i64 %25, 18
%27 = and i64 %26, 786432
br label %28
28: ; preds = %21, %23
%29 = phi i64 [ 262144, %21 ], [ %27, %23 ]
%30 = icmp eq i64 %9, %29
br i1 %30, label %31, label %14
31: ; preds = %19, %28, %8, %2
%32 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%33 = shl i64 %32, 20
%34 = and i64 %33, 3145728
%35 = icmp eq i64 %0, 4294967295
br i1 %35, label %67, label %36
36: ; preds = %31
%37 = and i64 %0, 3145728
%38 = icmp eq i64 %37, %34
br i1 %38, label %67, label %39
39: ; preds = %36
%40 = icmp eq i64 %37, 1048576
%41 = icmp eq i64 %37, 2097152
%42 = lshr exact i64 %37, 20
br label %43
43: ; preds = %39, %64
%44 = phi i64 [ %34, %39 ], [ %65, %64 ]
switch i64 %44, label %57 [
i64 3145728, label %45
i64 2097152, label %51
]
45: ; preds = %43
%46 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%47 = and i64 %46, -4
%48 = or i64 %47, 2
store volatile i64 %48, i64* inttoptr (i64 1074771980 to i64*)
br i1 %41, label %67, label %49
49: ; preds = %45
%50 = tail call i32 @SysCtlDelay(i32 15)
br label %64
51: ; preds = %43
%52 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%53 = and i64 %52, -4
%54 = or i64 %53, 1
store volatile i64 %54, i64* inttoptr (i64 1074771980 to i64*)
br i1 %40, label %67, label %55
55: ; preds = %51
%56 = tail call i32 @SysCtlDelay(i32 15)
br label %64
57: ; preds = %43
%58 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%59 = and i64 %58, -4
%60 = or i64 %59, %42
store volatile i64 %60, i64* inttoptr (i64 1074771980 to i64*)
%61 = load volatile i64, i64* inttoptr (i64 1074771980 to i64*)
%62 = shl i64 %61, 20
%63 = and i64 %62, 3145728
br label %64
64: ; preds = %57, %55, %49
%65 = phi i64 [ 2097152, %49 ], [ 1048576, %55 ], [ %63, %57 ]
%66 = icmp eq i64 %37, %65
br i1 %66, label %67, label %43
67: ; preds = %51, %45, %64, %36, %31
store volatile i64 %3, i64* inttoptr (i64 1074772352 to i64*)
ret void
}