void rgb16_to24(unsigned short *buf16, unsigned char *buf24) {
  int r16, g16, b16;
  b16 = (buf16[0] & 0x1f);
  g16 = (buf16[0] & 0x7e0) >> 5;
  r16 = (buf16[0] & 0xF800) >> 11;
  buf24[0] = (r16 * 0xFF) / 0x1F;
  buf24[1] = (g16 * 0xFF) / 0x3F;
  buf24[2] = (b16 * 0xFF) / 0x1F;
}


x86 assembly (clang, -O0):
<rgb16_to24>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
and    $0x1f,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
and    $0x7e0,%eax
sar    $0x5,%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
and    $0xf800,%eax
sar    $0xb,%eax
mov    %eax,-0x14(%rbp)
imul   $0xff,-0x14(%rbp),%eax
mov    $0x1f,%ecx
cltd
idiv   %ecx
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
imul   $0xff,-0x18(%rbp),%eax
mov    $0x3f,%ecx
cltd
idiv   %ecx
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
imul   $0xff,-0x1c(%rbp),%eax
mov    $0x1f,%ecx
cltd
idiv   %ecx
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x2(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgb16_to24>:
movzwl (%rdi),%ecx
mov    %ecx,%eax
and    $0x1f,%eax
mov    %ecx,%edx
shr    $0x5,%edx
and    $0x3f,%edx
shr    $0xb,%ecx
mov    %ecx,%edi
shl    $0x8,%edi
sub    %ecx,%edi
movzwl %di,%ecx
imul   $0x843,%ecx,%ecx
shr    $0x10,%ecx
sub    %ecx,%edi
movzwl %di,%edi
shr    %edi
add    %ecx,%edi
shr    $0x4,%edi
mov    %dil,(%rsi)
mov    %edx,%ecx
shl    $0x8,%ecx
sub    %edx,%ecx
movzwl %cx,%edx
imul   $0x411,%edx,%edx
shr    $0x10,%edx
sub    %edx,%ecx
movzwl %cx,%ecx
shr    %ecx
add    %edx,%ecx
shr    $0x5,%ecx
mov    %cl,0x1(%rsi)
mov    %eax,%ecx
shl    $0x8,%ecx
sub    %eax,%ecx
movzwl %cx,%eax
imul   $0x843,%eax,%eax
shr    $0x10,%eax
sub    %eax,%ecx
movzwl %cx,%ecx
shr    %ecx
add    %eax,%ecx
shr    $0x4,%ecx
mov    %cl,0x2(%rsi)
ret

LLVM IR (-O0):
define void @rgb16_to24(i16* %0, i8* %1) {
%3 = alloca i16*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i16* %0, i16** %3
store i8* %1, i8** %4
%8 = load i16*, i16** %3
%9 = getelementptr inbounds i16, i16* %8, i64 0
%10 = load i16, i16* %9
%11 = zext i16 %10 to i32
%12 = and i32 %11, 31
store i32 %12, i32* %7
%13 = load i16*, i16** %3
%14 = getelementptr inbounds i16, i16* %13, i64 0
%15 = load i16, i16* %14
%16 = zext i16 %15 to i32
%17 = and i32 %16, 2016
%18 = ashr i32 %17, 5
store i32 %18, i32* %6
%19 = load i16*, i16** %3
%20 = getelementptr inbounds i16, i16* %19, i64 0
%21 = load i16, i16* %20
%22 = zext i16 %21 to i32
%23 = and i32 %22, 63488
%24 = ashr i32 %23, 11
store i32 %24, i32* %5
%25 = load i32, i32* %5
%26 = mul nsw i32 %25, 255
%27 = sdiv i32 %26, 31
%28 = trunc i32 %27 to i8
%29 = load i8*, i8** %4
%30 = getelementptr inbounds i8, i8* %29, i64 0
store i8 %28, i8* %30
%31 = load i32, i32* %6
%32 = mul nsw i32 %31, 255
%33 = sdiv i32 %32, 63
%34 = trunc i32 %33 to i8
%35 = load i8*, i8** %4
%36 = getelementptr inbounds i8, i8* %35, i64 1
store i8 %34, i8* %36
%37 = load i32, i32* %7
%38 = mul nsw i32 %37, 255
%39 = sdiv i32 %38, 31
%40 = trunc i32 %39 to i8
%41 = load i8*, i8** %4
%42 = getelementptr inbounds i8, i8* %41, i64 2
store i8 %40, i8* %42
ret void
}

LLVM IR (-O2):
define void @rgb16_to24(i16* nocapture %0, i8* nocapture writeonly %1) {
%3 = load i16, i16* %0
%4 = and i16 %3, 31
%5 = lshr i16 %3, 5
%6 = and i16 %5, 63
%7 = lshr i16 %3, 11
%8 = mul nuw nsw i16 %7, 255
%9 = udiv i16 %8, 31
%10 = trunc i16 %9 to i8
store i8 %10, i8* %1
%11 = mul nuw nsw i16 %6, 255
%12 = udiv i16 %11, 63
%13 = trunc i16 %12 to i8
%14 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %13, i8* %14
%15 = mul nuw nsw i16 %4, 255
%16 = udiv i16 %15, 31
%17 = trunc i16 %16 to i8
%18 = getelementptr inbounds i8, i8* %1, i64 2
store i8 %17, i8* %18
ret void
}