xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int rx();
uint32_t rx_word(int nb_bytes) {
  uint32_t w = 0;
  int i;
  for (i = 0; i < nb_bytes; i++) {
    w |= (rx() << (i * 8));
  }
  return w;
}


x86 assembly (clang, -O0):
<rx_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1158 <rx_word+0x48>
mov    $0x0,%al
call   1030 <rx@plt>
mov    -0xc(%rbp),%ecx
shl    $0x3,%ecx
shl    %cl,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1129 <rx_word+0x19>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rx_word>:
push   %rbp
push   %r14
push   %rbx
test   %edi,%edi
jle    1138 <rx_word+0x28>
mov    %edi,%r14d
xor    %ebx,%ebx
xor    %ebp,%ebp
nop
xor    %eax,%eax
call   1030 <rx@plt>
mov    %ebx,%ecx
shl    %cl,%eax
or     %eax,%ebp
add    $0x8,%ebx
add    $0xffffffff,%r14d
jne    1120 <rx_word+0x10>
jmp    113a <rx_word+0x2a>
xor    %ebp,%ebp
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rx_word(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = call i32 (...) @rx()
%11 = load i32, i32* %4
%12 = mul nsw i32 %11, 8
%13 = shl i32 %10, %12
%14 = load i32, i32* %3
%15 = or i32 %14, %13
store i32 %15, i32* %3
br label %16
16: ; preds = %9
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @rx_word(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %12
3: ; preds = %1, %3
%4 = phi i32 [ %10, %3 ], [ 0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = tail call i32 (...) @rx()
%7 = shl nsw i32 %4, 3
%8 = shl i32 %6, %7
%9 = or i32 %8, %5
%10 = add nuw nsw i32 %4, 1
%11 = icmp eq i32 %10, %0
br i1 %11, label %12, label %3
12: ; preds = %3, %1
%13 = phi i32 [ 0, %1 ], [ %9, %3 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ ft_putendl(char *);
void ft_mapprint(char **map) {
  int i;
  i = -1;
  if (map)
    while (map[++i])
      ft_putendl(map[i]);
}


x86 assembly (clang, -O0):
<ft_mapprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0xffffffff,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1169 <ft_mapprint+0x59>
jmp    1133 <ft_mapprint+0x23>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
mov    %ecx,-0xc(%rbp)
movslq %ecx,%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1164 <ft_mapprint+0x54>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <ft_putendl@plt>
jmp    1133 <ft_mapprint+0x23>
jmp    1169 <ft_mapprint+0x59>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_mapprint>:
push   %rbx
test   %rdi,%rdi
je     1141 <ft_mapprint+0x31>
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1141 <ft_mapprint+0x31>
add    $0x8,%rbx
cs nopw 0x0(%rax,%rax,1)
nop
call   1030 <ft_putendl@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1130 <ft_mapprint+0x20>
pop    %rbx
ret

LLVM IR (-O0):
define void @ft_mapprint(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 -1, i32* %3
%4 = load i8**, i8*** %2
%5 = icmp ne i8** %4, null
br i1 %5, label %6, label %23
6: ; preds = %1
br label %7
7: ; preds = %15, %6
%8 = load i8**, i8*** %2
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8*, i8** %8, i64 %11
%13 = load i8*, i8** %12
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %22
15: ; preds = %7
%16 = load i8**, i8*** %2
%17 = load i32, i32* %3
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8*, i8** %16, i64 %18
%20 = load i8*, i8** %19
%21 = call i32 @ft_putendl(i8* %20)
br label %7
22: ; preds = %7
br label %23
23: ; preds = %22, %1
ret void
}

LLVM IR (-O2):
define void @ft_mapprint(i8** %0) {
%2 = icmp eq i8** %0, null
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = load i8*, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %14, label %6
6: ; preds = %3, %6
%7 = phi i64 [ %10, %6 ], [ 0, %3 ]
%8 = phi i8* [ %12, %6 ], [ %4, %3 ]
%9 = tail call i32 @ft_putendl(i8* %8)
%10 = add nuw i64 %7, 1
%11 = getelementptr inbounds i8*, i8** %0, i64 %10
%12 = load i8*, i8** %11
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %6
14: ; preds = %6, %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf_verbose(char *);
int snd_pcm_open_lconf(void) {
  printf_verbose("snd_pcm_open_lconf(...) = BLOCKED;");
  return -1;
}


x86 assembly (clang, -O0):
<snd_pcm_open_lconf>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf_verbose@plt>
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_pcm_open_lconf>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf_verbose@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"snd_pcm_open_lconf(...) = BLOCKED;\00"
define i32 @snd_pcm_open_lconf() {
%1 = call i32 @printf_verbose(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [35 x i8] c"snd_pcm_open_lconf(...) = BLOCKED;\00"
define i32 @snd_pcm_open_lconf() {
%1 = tail call i32 @printf_verbose(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int doupdate();
int t_doupdate() { return doupdate(); }


x86 assembly (clang, -O0):
<t_doupdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <doupdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_doupdate>:
xor    %eax,%eax
jmp    1030 <doupdate@plt>

LLVM IR (-O0):
define i32 @t_doupdate() {
%1 = call i32 (...) @doupdate()
ret i32 %1
}

LLVM IR (-O2):
define i32 @t_doupdate() {
%1 = tail call i32 (...) @doupdate()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *, char *);
void not_found(char *filename) {
  char *title = "404 Not Found";
  (void)printf("<HTML><HEAD><TITLE>%s</TITLE></HEAD>\n<BODY><H2>%s</H2>\nThe "
               "requested server-side-includes filename, %s,\ndoes not seem to "
               "exist.\n</BODY></HTML>\n",
               title, title, filename);
}


x86 assembly (clang, -O0):
<not_found>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rcx
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<not_found>:
mov    %rdi,%rcx
lea    0xef4(%rip),%rdi
lea    0xedf(%rip),%rdx
mov    %rdx,%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"404 Not Found\00"
@.str.1 = [144 x i8] c"<HTML><HEAD><TITLE>%s</TITLE></HEAD>\0A<BODY><H2>%s</H2>\0AThe requested server-side-includes filename, %s,\0Adoes not seem to exist.\0A</BODY></HTML>\0A\00"
define void @not_found(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
store i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8** %3
%4 = load i8*, i8** %3
%5 = load i8*, i8** %3
%6 = load i8*, i8** %2
%7 = call i32 @printf(i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str.1, i64 0, i64 0), i8* %4, i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"404 Not Found\00"
@.str.1 = [144 x i8] c"<HTML><HEAD><TITLE>%s</TITLE></HEAD>\0A<BODY><H2>%s</H2>\0AThe requested server-side-includes filename, %s,\0Adoes not seem to exist.\0A</BODY></HTML>\0A\00"
define void @not_found(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void ff_hevc_put_hevc_epel_v48_8_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_v48_8_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_v48_8_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_v48_8_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_v48_8_avx2() {
ret void
}
void CharReplace(char *str, char origc, char newc) {
  while (*(str++) != '\0')
    if (*str == origc)
      *str = newc;
  return;
}


x86 assembly (clang, -O0):
<CharReplace>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
je     114f <CharReplace+0x4f>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    114a <CharReplace+0x4a>
mov    -0xa(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
jmp    1113 <CharReplace+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CharReplace>:
cmpb   $0x0,(%rdi)
je     1126 <CharReplace+0x26>
add    $0x1,%rdi
jmp    1118 <CharReplace+0x18>
nopl   0x0(%rax,%rax,1)
add    $0x1,%rdi
test   %al,%al
je     1126 <CharReplace+0x26>
movzbl (%rdi),%eax
cmp    %sil,%al
jne    1110 <CharReplace+0x10>
mov    %dl,(%rdi)
mov    %edx,%eax
jmp    1110 <CharReplace+0x10>
ret

LLVM IR (-O0):
define void @CharReplace(i8* %0, i8 signext %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
br label %7
7: ; preds = %23, %3
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %4
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %24
13: ; preds = %7
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %5
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %16, %18
br i1 %19, label %20, label %23
20: ; preds = %13
%21 = load i8, i8* %6
%22 = load i8*, i8** %4
store i8 %21, i8* %22
br label %23
23: ; preds = %20, %13
br label %7
24: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @CharReplace(i8* nocapture %0, i8 signext %1, i8 signext %2) {
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %3, %12
%7 = phi i8* [ %8, %12 ], [ %0, %3 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, %1
br i1 %10, label %11, label %12
11: ; preds = %6
store i8 %2, i8* %8
br label %12
12: ; preds = %11, %6
%13 = phi i8 [ %2, %11 ], [ %9, %6 ]
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %6
15: ; preds = %12, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
scalar_t__ getuid();
int /*<<< orphan*/ stderr;
void check_super_user() {
  if (getuid() != 0) {
    fprintf(stderr, "must be root\n");
    exit(-6);
  }
}


x86 assembly (clang, -O0):
<check_super_user>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getuid@plt>
cmp    $0x0,%rax
je     1164 <check_super_user+0x34>
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
lea    0xeab(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0xfffffffa,%edi
call   1050 <exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_super_user>:
push   %rax
xor    %eax,%eax
call   1030 <getuid@plt>
test   %rax,%rax
jne    113f <check_super_user+0xf>
pop    %rax
ret
mov    0x2e9a(%rip),%rax
mov    (%rax),%edi
lea    0xeb1(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0xfffffffa,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [14 x i8] c"must be root\0A\00"
define void @check_super_user() {
%1 = call i64 (...) @getuid()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = load i32, i32* @stderr
%5 = call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @exit(i32 -6)
unreachable
7: ; preds = %0
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [14 x i8] c"must be root\0A\00"
define void @check_super_user() {
%1 = tail call i64 (...) @getuid()
%2 = icmp eq i64 %1, 0
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 -6)
unreachable
7: ; preds = %0
ret void
}
void rotr(int *a, int *b, int *c) {
  int temp, temp2;
  temp = *a;
  temp2 = *b;
  *a = *c;
  *b = temp;
  *c = temp2;
}


x86 assembly (clang, -O0):
<rotr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x20(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr>:
mov    (%rdi),%r8d
mov    (%rsi),%ecx
mov    (%rdx),%eax
mov    %eax,(%rdi)
mov    %r8d,(%rsi)
mov    %ecx,(%rdx)
ret

LLVM IR (-O0):
define void @rotr(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
store i32 %10, i32* %7
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
store i32 %12, i32* %8
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = load i32*, i32** %4
store i32 %14, i32* %15
%16 = load i32, i32* %7
%17 = load i32*, i32** %5
store i32 %16, i32* %17
%18 = load i32, i32* %8
%19 = load i32*, i32** %6
store i32 %18, i32* %19
ret void
}

LLVM IR (-O2):
define void @rotr(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %0
%5 = load i32, i32* %1
%6 = load i32, i32* %2
store i32 %6, i32* %0
store i32 %4, i32* %1
store i32 %5, i32* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430TimerP__0__VectorTimerX0__fired();
void Msp430TimerCommonP__VectorTimerA0__fired(void) {
  Msp430TimerP__0__VectorTimerX0__fired();
}


x86 assembly (clang, -O0):
<Msp430TimerCommonP__VectorTimerA0__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430TimerP__0__VectorTimerX0__fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430TimerCommonP__VectorTimerA0__fired>:
xor    %eax,%eax
jmp    1030 <Msp430TimerP__0__VectorTimerX0__fired@plt>

LLVM IR (-O0):
define void @Msp430TimerCommonP__VectorTimerA0__fired() {
%1 = call i32 (...) @Msp430TimerP__0__VectorTimerX0__fired()
ret void
}

LLVM IR (-O2):
define void @Msp430TimerCommonP__VectorTimerA0__fired() {
%1 = tail call i32 (...) @Msp430TimerP__0__VectorTimerX0__fired()
ret void
}
/* Variables and functions */
int check_arg_count(int, int);
int /*<<< orphan*/ report_count(int);
int /*<<< orphan*/ report_error(char *);
void cmd_mvwin_wchnstr(int nargs, char **args) {
  if (check_arg_count(nargs, 1) == 1)
    return;
  report_count(1);
  report_error("UNSUPPORTED");
}


x86 assembly (clang, -O0):
<cmd_mvwin_wchnstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <check_arg_count@plt>
cmp    $0x1,%eax
jne    115a <cmd_mvwin_wchnstr+0x2a>
jmp    1170 <cmd_mvwin_wchnstr+0x40>
mov    $0x1,%edi
call   1040 <report_count@plt>
lea    0xe95(%rip),%rdi
call   1050 <report_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_mvwin_wchnstr>:
push   %rax
mov    $0x1,%esi
call   1030 <check_arg_count@plt>
cmp    $0x1,%eax
jne    1142 <cmd_mvwin_wchnstr+0x12>
pop    %rax
ret
mov    $0x1,%edi
call   1040 <report_count@plt>
lea    0xead(%rip),%rdi
pop    %rax
jmp    1050 <report_error@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"UNSUPPORTED\00"
define void @cmd_mvwin_wchnstr(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = call i32 @check_arg_count(i32 %5, i32 1)
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
br label %12
9: ; preds = %2
%10 = call i32 @report_count(i32 1)
%11 = call i32 @report_error(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"UNSUPPORTED\00"
define void @cmd_mvwin_wchnstr(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @check_arg_count(i32 %0, i32 1)
%4 = icmp eq i32 %3, 1
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @report_count(i32 1)
%7 = tail call i32 @report_error(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %2, %5
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *gmtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ strftime(char *, int, char *, struct tm *);
const char *mkrfc1123(time_t t) {
  static char buf[128];
  struct tm *gmt = gmtime(&t);
  buf[0] = '\0';
  strftime(buf, 127, "%a, %d %b %Y %H:%M:%S GMT", gmt);
  return buf;
}


x86 assembly (clang, -O0):
<mkrfc1123>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1040 <gmtime@plt>
mov    %rax,-0x10(%rbp)
movb   $0x0,0x2f01(%rip)
mov    -0x10(%rbp),%rcx
lea    0x2ef6(%rip),%rdi
mov    $0x7f,%esi
lea    0xeaa(%rip),%rdx
call   1030 <strftime@plt>
lea    0x2ede(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkrfc1123>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,0xc(%rsp)
lea    0xc(%rsp),%rdi
call   1040 <gmtime@plt>
movb   $0x0,0x2f06(%rip)
lea    0x2eff(%rip),%rbx
lea    0xeb8(%rip),%rdx
mov    %rbx,%rdi
mov    $0x7f,%esi
mov    %rax,%rcx
call   1030 <strftime@plt>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
@mkrfc1123.buf = internal global [128 x i8] zeroinitializer
@.str = [26 x i8] c"%a, %d %b %Y %H:%M:%S GMT\00"
define i8* @mkrfc1123(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.tm*
store i32 %0, i32* %2
%4 = call %struct.tm* @gmtime(i32* %2)
store %struct.tm* %4, %struct.tm** %3
store i8 0, i8* getelementptr inbounds ([128 x i8], [128 x i8]* @mkrfc1123.buf, i64 0, i64 0)
%5 = load %struct.tm*, %struct.tm** %3
%6 = call i32 @strftime(i8* getelementptr inbounds ([128 x i8], [128 x i8]* @mkrfc1123.buf, i64 0, i64 0), i32 127, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), %struct.tm* %5)
ret i8* getelementptr inbounds ([128 x i8], [128 x i8]* @mkrfc1123.buf, i64 0, i64 0)
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@mkrfc1123.buf = internal global [128 x i8] zeroinitializer
@.str = [26 x i8] c"%a, %d %b %Y %H:%M:%S GMT\00"
define i8* @mkrfc1123(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call %struct.tm* @gmtime(i32* %2)
store i8 0, i8* getelementptr inbounds ([128 x i8], [128 x i8]* @mkrfc1123.buf, i64 0, i64 0)
%4 = call i32 @strftime(i8* getelementptr inbounds ([128 x i8], [128 x i8]* @mkrfc1123.buf, i64 0, i64 0), i32 127, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), %struct.tm* %3)
ret i8* getelementptr inbounds ([128 x i8], [128 x i8]* @mkrfc1123.buf, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t fromRep16(uint16_t x) { return x; }


x86 assembly (clang, -O0):
<fromRep16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fromRep16>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @fromRep16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @fromRep16(i32 returned %0) {
ret i32 %0
}
/* Type definitions */
typedef int intmax_t;

/* Variables and functions */
double sqrt(int);
int is_pentagonal(intmax_t num) {
  double sqrdiscr = sqrt(1 + 24 * num);
  return sqrdiscr == (double)(intmax_t)sqrdiscr && (intmax_t)sqrdiscr % 6 == 5;
}


x86 assembly (clang, -O0):
<is_pentagonal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x18,-0x4(%rbp),%edi
add    $0x1,%edi
call   1030 <sqrt@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvttsd2si -0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
mov    %al,-0x11(%rbp)
jne    1165 <is_pentagonal+0x55>
jp     1165 <is_pentagonal+0x55>
cvttsd2si -0x10(%rbp),%eax
mov    $0x6,%ecx
cltd
idiv   %ecx
cmp    $0x5,%edx
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_pentagonal>:
push   %rax
shl    $0x3,%edi
lea    (%rdi,%rdi,2),%edi
or     $0x1,%edi
call   1030 <sqrt@plt>
cvttpd2dq %xmm0,%xmm1
cvtdq2pd %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    115b <is_pentagonal+0x4b>
jp     115b <is_pentagonal+0x4b>
cvttsd2si %xmm0,%eax
movslq %eax,%rcx
imul   $0x2aaaaaab,%rcx,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rax
add    %edx,%eax
add    %eax,%eax
lea    (%rax,%rax,2),%eax
sub    %eax,%ecx
xor    %eax,%eax
cmp    $0x5,%ecx
sete   %al
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @is_pentagonal(i32 %0) {
%2 = alloca i32
%3 = alloca double
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 24, %4
%6 = add nsw i32 1, %5
%7 = call double @sqrt(i32 %6)
store double %7, double* %3
%8 = load double, double* %3
%9 = load double, double* %3
%10 = fptosi double %9 to i32
%11 = sitofp i32 %10 to double
%12 = fcmp oeq double %8, %11
br i1 %12, label %13, label %18
13: ; preds = %1
%14 = load double, double* %3
%15 = fptosi double %14 to i32
%16 = srem i32 %15, 6
%17 = icmp eq i32 %16, 5
br label %18
18: ; preds = %13, %1
%19 = phi i1 [ false, %1 ], [ %17, %13 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_pentagonal(i32 %0) {
%2 = mul nsw i32 %0, 24
%3 = or i32 %2, 1
%4 = tail call double @sqrt(i32 %3)
%5 = fptosi double %4 to i32
%6 = sitofp i32 %5 to double
%7 = fcmp oeq double %4, %6
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = srem i32 %5, 6
%10 = icmp eq i32 %9, 5
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %8, %1
%13 = phi i32 [ 0, %1 ], [ %11, %8 ]
ret i32 %13
}
/* Type definitions */
struct list_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __list_delete(struct list_head *);
int /*<<< orphan*/ list_insert_front(struct list_head *, struct list_head *);
void list_move_front(struct list_head *head, struct list_head *elem) {
  __list_delete(elem);
  list_insert_front(head, elem);
}


x86 assembly (clang, -O0):
<list_move_front>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <__list_delete@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <list_insert_front@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_move_front>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <__list_delete@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <list_insert_front@plt>

LLVM IR (-O0):
%struct.list_head = type { i32 }
define void @list_move_front(%struct.list_head* %0, %struct.list_head* %1) {
%3 = alloca %struct.list_head*
%4 = alloca %struct.list_head*
store %struct.list_head* %0, %struct.list_head** %3
store %struct.list_head* %1, %struct.list_head** %4
%5 = load %struct.list_head*, %struct.list_head** %4
%6 = call i32 @__list_delete(%struct.list_head* %5)
%7 = load %struct.list_head*, %struct.list_head** %3
%8 = load %struct.list_head*, %struct.list_head** %4
%9 = call i32 @list_insert_front(%struct.list_head* %7, %struct.list_head* %8)
ret void
}

LLVM IR (-O2):
%struct.list_head = type { i32 }
define void @list_move_front(%struct.list_head* %0, %struct.list_head* %1) {
%3 = tail call i32 @__list_delete(%struct.list_head* %1)
%4 = tail call i32 @list_insert_front(%struct.list_head* %0, %struct.list_head* %1)
ret void
}
int a\U000000c4b\U00000441\U000003b4e(void) { return 5; }


x86 assembly (clang, -O0):
<aÄbсδe>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aÄbсδe>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @"a\C3\84b\D1\81\CE\B4e"() {
ret i32 5
}

LLVM IR (-O2):
define i32 @"a\C3\84b\D1\81\CE\B4e"() {
ret i32 5
}
void PKCS7_ENCRYPT_free(void) {}


x86 assembly (clang, -O0):
<PKCS7_ENCRYPT_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PKCS7_ENCRYPT_free>:
ret

LLVM IR (-O0):
define void @PKCS7_ENCRYPT_free() {
ret void
}

LLVM IR (-O2):
define void @PKCS7_ENCRYPT_free() {
ret void
}
unsigned long stb__perfect_rand(void) {
  static unsigned long stb__rand;
  stb__rand = stb__rand * 2147001325 + 715136305;
  return 0x31415926 ^ ((stb__rand >> 16) + (stb__rand << 16));
}


x86 assembly (clang, -O0):
<stb__perfect_rand>:
push   %rbp
mov    %rsp,%rbp
imul   $0x7ff8a3ed,0x2f19(%rip),%rax
ed a3 f8 7f
add    $0x2aa01d31,%rax
mov    %rax,0x2f0c(%rip)
mov    0x2f05(%rip),%rax
shr    $0x10,%rax
mov    0x2efa(%rip),%rcx
shl    $0x10,%rcx
add    %rcx,%rax
xor    $0x31415926,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stb__perfect_rand>:
imul   $0x7ff8a3ed,0x2f1d(%rip),%rax
ed a3 f8 7f
add    $0x2aa01d31,%rax
mov    %rax,0x2f10(%rip)
mov    %rax,%rcx
shr    $0x10,%rcx
shl    $0x10,%rax
add    %rcx,%rax
xor    $0x31415926,%rax
ret

LLVM IR (-O0):
@stb__perfect_rand.stb__rand = internal global i64 0
define i64 @stb__perfect_rand() {
%1 = load i64, i64* @stb__perfect_rand.stb__rand
%2 = mul i64 %1, 2147001325
%3 = add i64 %2, 715136305
store i64 %3, i64* @stb__perfect_rand.stb__rand
%4 = load i64, i64* @stb__perfect_rand.stb__rand
%5 = lshr i64 %4, 16
%6 = load i64, i64* @stb__perfect_rand.stb__rand
%7 = shl i64 %6, 16
%8 = add i64 %5, %7
%9 = xor i64 826366246, %8
ret i64 %9
}

LLVM IR (-O2):
@stb__perfect_rand.stb__rand = internal unnamed_addr global i64 0
define i64 @stb__perfect_rand() {
%1 = load i64, i64* @stb__perfect_rand.stb__rand
%2 = mul i64 %1, 2147001325
%3 = add i64 %2, 715136305
store i64 %3, i64* @stb__perfect_rand.stb__rand
%4 = lshr i64 %3, 16
%5 = shl i64 %3, 16
%6 = add i64 %4, %5
%7 = xor i64 %6, 826366246
ret i64 %7
}
__attribute__((vector_size(16))) int f0(__attribute__((vector_size(16))) int t,
                                        int a) {
  ((int *)&t)[0] = a;
  return t;
}


x86 assembly (clang, -O0):
<f0>:
push   %rbp
mov    %rsp,%rbp
movdqa %xmm0,-0x10(%rbp)
mov    %edi,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
movdqa -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f0>:
movd   %edi,%xmm1
movss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define <4 x i32> @f0(<4 x i32> %0, i32 %1) {
%3 = alloca <4 x i32>
%4 = alloca i32
store <4 x i32> %0, <4 x i32>* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = bitcast <4 x i32>* %3 to i32*
%7 = getelementptr inbounds i32, i32* %6, i64 0
store i32 %5, i32* %7
%8 = load <4 x i32>, <4 x i32>* %3
ret <4 x i32> %8
}

LLVM IR (-O2):
define <4 x i32> @f0(<4 x i32> %0, i32 %1) {
%3 = insertelement <4 x i32> %0, i32 %1, i64 0
ret <4 x i32> %3
}
double f4_cb_send_pre_double_short(double (*cb)(double, short)) {
  short r = -22;
  return cb(8.25, r) + 1.0;
}


x86 assembly (clang, -O0):
<f4_cb_send_pre_double_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movw   $0xffea,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xeea(%rip),%xmm0
movswl -0xa(%rbp),%edi
call   *%rax
movsd  0xed4(%rip),%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4_cb_send_pre_double_short>:
push   %rax
mov    %rdi,%rax
movsd  0xef4(%rip),%xmm0
mov    $0xffffffea,%edi
call   *%rax
addsd  0xeed(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @f4_cb_send_pre_double_short(double (double, i16)* %0) {
%2 = alloca double (double, i16)*
%3 = alloca i16
store double (double, i16)* %0, double (double, i16)** %2
store i16 -22, i16* %3
%4 = load double (double, i16)*, double (double, i16)** %2
%5 = load i16, i16* %3
%6 = call double %4(double 8.250000e+00, i16 signext %5)
%7 = fadd double %6, 1.000000e+00
ret double %7
}

LLVM IR (-O2):
define double @f4_cb_send_pre_double_short(double (double, i16)* nocapture %0) {
%2 = tail call double %0(double 8.250000e+00, i16 signext -22)
%3 = fadd double %2, 1.000000e+00
ret double %3
}
/* Variables and functions */
double exp2(double);
scalar_t__ isnan(double);
double log2(double);
double pow(double x, double y) {
  if (isnan(x))
    return x;
  if (isnan(y))
    return y;
  return exp2(y * log2(x));
}


x86 assembly (clang, -O0):
<pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1050 <isnan@plt>
cmp    $0x0,%rax
je     1165 <pow+0x35>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    11b2 <pow+0x82>
movsd  -0x18(%rbp),%xmm0
call   1050 <isnan@plt>
cmp    $0x0,%rax
je     1188 <pow+0x58>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    11b2 <pow+0x82>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <log2@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
call   1040 <exp2@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow>:
sub    $0x18,%rsp
movsd  %xmm1,0x8(%rsp)
movsd  %xmm0,0x10(%rsp)
call   1050 <isnan@plt>
test   %rax,%rax
je     1155 <pow+0x25>
movsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret
movsd  0x8(%rsp),%xmm0
call   1050 <isnan@plt>
test   %rax,%rax
je     1170 <pow+0x40>
movsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret
movsd  0x10(%rsp),%xmm0
call   1030 <log2@plt>
mulsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
jmp    1040 <exp2@plt>

LLVM IR (-O0):
define double @pow(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = call i64 @isnan(double %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load double, double* %4
store double %10, double* %3
br label %23
11: ; preds = %2
%12 = load double, double* %5
%13 = call i64 @isnan(double %12)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load double, double* %5
store double %16, double* %3
br label %23
17: ; preds = %11
%18 = load double, double* %5
%19 = load double, double* %4
%20 = call double @log2(double %19)
%21 = fmul double %18, %20
%22 = call double @exp2(double %21)
store double %22, double* %3
br label %23
23: ; preds = %17, %15, %9
%24 = load double, double* %3
ret double %24
}

LLVM IR (-O2):
define double @pow(double %0, double %1) {
%3 = tail call i64 @isnan(double %0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %2
%6 = tail call i64 @isnan(double %1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = tail call double @log2(double %0)
%10 = fmul double %9, %1
%11 = tail call double @exp2(double %10)
br label %12
12: ; preds = %5, %2, %8
%13 = phi double [ %11, %8 ], [ %0, %2 ], [ %1, %5 ]
ret double %13
}
/* Variables and functions */
int /*<<< orphan*/ Wc(char);
int /*<<< orphan*/ Wd(int, int);
void Wreg(int n) {
  Wc('r');
  Wd(n, 1);
}


x86 assembly (clang, -O0):
<Wreg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x72,%edi
call   1030 <Wc@plt>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1040 <Wd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Wreg>:
push   %rbx
mov    %edi,%ebx
mov    $0x72,%edi
call   1030 <Wc@plt>
mov    %ebx,%edi
mov    $0x1,%esi
pop    %rbx
jmp    1040 <Wd@plt>

LLVM IR (-O0):
define void @Wreg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @Wc(i8 signext 114)
%4 = load i32, i32* %2
%5 = call i32 @Wd(i32 %4, i32 1)
ret void
}

LLVM IR (-O2):
define void @Wreg(i32 %0) {
%2 = tail call i32 @Wc(i8 signext 114)
%3 = tail call i32 @Wd(i32 %0, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ event_error(char *);
void event_start_extended_overlay() {
  event_error("extended overlay not implemented in abc2abc");
}


x86 assembly (clang, -O0):
<event_start_extended_overlay>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <event_error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_start_extended_overlay>:
lea    0xee9(%rip),%rdi
jmp    1030 <event_error@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"extended overlay not implemented in abc2abc\00"
define void @event_start_extended_overlay() {
%1 = call i32 @event_error(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [44 x i8] c"extended overlay not implemented in abc2abc\00"
define void @event_start_extended_overlay() {
%1 = tail call i32 @event_error(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
ret void
}
void logger(const char *format, ...) {}


x86 assembly (clang, -O0):
<logger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<logger>:
ret

LLVM IR (-O0):
define void @logger(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @logger(i8* nocapture %0, ...) {
ret void
}
_Complex long double test_catanhl(_Complex long double x) {
  return __builtin_catanhl(x);
}


x86 assembly (clang, -O0):
<test_catanhl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
lea    0x10(%rbp),%rax
fldt   (%rax)
fldt   0x10(%rax)
fxch   %st(1)
fstpt  -0x40(%rbp)
fstpt  -0x30(%rbp)
movaps -0x40(%rbp),%xmm0
movaps -0x30(%rbp),%xmm1
mov    %rsp,%rax
movaps %xmm1,0x10(%rax)
movaps %xmm0,(%rax)
call   1030 <catanhl@plt>
fstpt  -0x20(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_catanhl>:
sub    $0x48,%rsp
fldt   0x50(%rsp)
fldt   0x60(%rsp)
fxch   %st(1)
fstpt  0x20(%rsp)
fstpt  0x30(%rsp)
movaps 0x20(%rsp),%xmm0
movaps 0x30(%rsp),%xmm1
movaps %xmm1,0x10(%rsp)
movaps %xmm0,(%rsp)
call   1030 <catanhl@plt>
add    $0x48,%rsp
ret

LLVM IR (-O0):
define { x86_fp80, x86_fp80 } @test_catanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = alloca { x86_fp80, x86_fp80 }
%3 = alloca { x86_fp80, x86_fp80 }
%4 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 0
%5 = load x86_fp80, x86_fp80* %4
%6 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 1
%7 = load x86_fp80, x86_fp80* %6
%8 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %3, i32 0, i32 0
%9 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %3, i32 0, i32 1
store x86_fp80 %5, x86_fp80* %8
store x86_fp80 %7, x86_fp80* %9
%10 = call { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %3)
%11 = extractvalue { x86_fp80, x86_fp80 } %10, 0
%12 = extractvalue { x86_fp80, x86_fp80 } %10, 1
%13 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i32 0, i32 0
%14 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i32 0, i32 1
store x86_fp80 %11, x86_fp80* %13
store x86_fp80 %12, x86_fp80* %14
%15 = load { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2
ret { x86_fp80, x86_fp80 } %15
}

LLVM IR (-O2):
define { x86_fp80, x86_fp80 } @test_catanhl({ x86_fp80, x86_fp80 }* nocapture byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = alloca { x86_fp80, x86_fp80 }
%3 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i64 0, i32 0
%4 = load x86_fp80, x86_fp80* %3
%5 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i64 0, i32 1
%6 = load x86_fp80, x86_fp80* %5
%7 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i64 0, i32 0
%8 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i64 0, i32 1
store x86_fp80 %4, x86_fp80* %7
store x86_fp80 %6, x86_fp80* %8
%9 = tail call { x86_fp80, x86_fp80 } @catanhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %2)
ret { x86_fp80, x86_fp80 } %9
}
int compare(const void *data1, const void *data2) {
  int *ptr1 = (int *)data1;
  int *ptr2 = (int *)data2;
  if (*ptr1 < *ptr2)
    return -1;
  else if (*ptr1 > *ptr2)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%eax
jge    113a <compare+0x3a>
movl   $0xffffffff,-0x4(%rbp)
jmp    115f <compare+0x5f>
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%eax
jle    1158 <compare+0x58>
movl   $0x1,-0x4(%rbp)
jmp    115f <compare+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i32*
store i32* %11, i32** %7
%12 = load i32*, i32** %6
%13 = load i32, i32* %12
%14 = load i32*, i32** %7
%15 = load i32, i32* %14
%16 = icmp slt i32 %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %26
18: ; preds = %2
%19 = load i32*, i32** %6
%20 = load i32, i32* %19
%21 = load i32*, i32** %7
%22 = load i32, i32* %21
%23 = icmp sgt i32 %20, %22
br i1 %23, label %24, label %25
24: ; preds = %18
store i32 1, i32* %3
br label %26
25: ; preds = %18
store i32 0, i32* %3
br label %26
26: ; preds = %25, %24, %17
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
%8 = icmp sgt i32 %5, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint8_t DE1_SOC_WM8731_REG_DATA(uint16_t data) { return (data & 0xff); }


x86 assembly (clang, -O0):
<DE1_SOC_WM8731_REG_DATA>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DE1_SOC_WM8731_REG_DATA>:
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @DE1_SOC_WM8731_REG_DATA(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
ret i32 %4
}

LLVM IR (-O2):
define i32 @DE1_SOC_WM8731_REG_DATA(i32 %0) {
%2 = and i32 %0, 255
ret i32 %2
}
extern void __outb_p(unsigned char value, unsigned short port) {
  __asm__ __volatile__("out"
                       "b"
                       " %"
                       "b"
                       "0,%"
                       "w"
                       "1"
                       :
                       : "a"(value), "d"(port));
  __asm__ __volatile__("outb %al,$0x80");
}


x86 assembly (clang, -O0):
<__outb_p>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x1(%rbp),%al
mov    -0x4(%rbp),%dx
out    %al,(%dx)
out    %al,$0x80
pop    %rbp
ret

x86 assembly (clang, -O2):
<__outb_p>:
mov    %esi,%edx
mov    %edi,%eax
out    %al,(%dx)
out    %al,$0x80
ret

LLVM IR (-O0):
define void @__outb_p(i8 zeroext %0, i16 zeroext %1) {
%3 = alloca i8
%4 = alloca i16
store i8 %0, i8* %3
store i16 %1, i16* %4
%5 = load i8, i8* %3
%6 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @__outb_p(i8 zeroext %0, i16 zeroext %1) {
tail call void asm sideeffect "outb ${0:b},${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i8 %0, i16 %1)
tail call void asm sideeffect "outb %al,$$0x80", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void QCRC_Init(unsigned short *crcvalue) { *crcvalue = 0xffff; }


x86 assembly (clang, -O0):
<QCRC_Init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movw   $0xffff,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<QCRC_Init>:
movw   $0xffff,(%rdi)
ret

LLVM IR (-O0):
define void @QCRC_Init(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
store i16 -1, i16* %3
ret void
}

LLVM IR (-O2):
define void @QCRC_Init(i16* nocapture writeonly %0) {
store i16 -1, i16* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void rtcp_xr_get_ssrc_sender(const uint8_t *p_rtcp_xr, uint8_t pi_ssrc[4]) {
  pi_ssrc[0] = p_rtcp_xr[4];
  pi_ssrc[1] = p_rtcp_xr[5];
  pi_ssrc[2] = p_rtcp_xr[6];
  pi_ssrc[3] = p_rtcp_xr[7];
}


x86 assembly (clang, -O0):
<rtcp_xr_get_ssrc_sender>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0x8(%rbp),%rax
mov    0x1c(%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtcp_xr_get_ssrc_sender>:
mov    0x10(%rdi),%eax
mov    %eax,(%rsi)
mov    0x14(%rdi),%eax
mov    %eax,0x4(%rsi)
mov    0x18(%rdi),%eax
mov    %eax,0x8(%rsi)
mov    0x1c(%rdi),%eax
mov    %eax,0xc(%rsi)
ret

LLVM IR (-O0):
define void @rtcp_xr_get_ssrc_sender(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 4
%7 = load i32, i32* %6
%8 = load i32*, i32** %4
%9 = getelementptr inbounds i32, i32* %8, i64 0
store i32 %7, i32* %9
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 5
%12 = load i32, i32* %11
%13 = load i32*, i32** %4
%14 = getelementptr inbounds i32, i32* %13, i64 1
store i32 %12, i32* %14
%15 = load i32*, i32** %3
%16 = getelementptr inbounds i32, i32* %15, i64 6
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = getelementptr inbounds i32, i32* %18, i64 2
store i32 %17, i32* %19
%20 = load i32*, i32** %3
%21 = getelementptr inbounds i32, i32* %20, i64 7
%22 = load i32, i32* %21
%23 = load i32*, i32** %4
%24 = getelementptr inbounds i32, i32* %23, i64 3
store i32 %22, i32* %24
ret void
}

LLVM IR (-O2):
define void @rtcp_xr_get_ssrc_sender(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 4
%4 = load i32, i32* %3
store i32 %4, i32* %1
%5 = getelementptr inbounds i32, i32* %0, i64 5
%6 = load i32, i32* %5
%7 = getelementptr inbounds i32, i32* %1, i64 1
store i32 %6, i32* %7
%8 = getelementptr inbounds i32, i32* %0, i64 6
%9 = load i32, i32* %8
%10 = getelementptr inbounds i32, i32* %1, i64 2
store i32 %9, i32* %10
%11 = getelementptr inbounds i32, i32* %0, i64 7
%12 = load i32, i32* %11
%13 = getelementptr inbounds i32, i32* %1, i64 3
store i32 %12, i32* %13
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int);
int main(void) {
  unsigned int word1 = 077u, word2 = 0150u, word3 = 0210u;
  printf("%o  ", word1 & word2);
  printf("%o  ", word1 & word1);
  printf("%o  ", word1 & word2 & word3);
  printf("%o\n", word1 & 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3f,-0x8(%rbp)
movl   $0x68,-0xc(%rbp)
movl   $0x88,-0x10(%rbp)
mov    -0x8(%rbp),%esi
and    -0xc(%rbp),%esi
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
and    -0x8(%rbp),%esi
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
and    -0xc(%rbp),%esi
and    -0x10(%rbp),%esi
lea    0xe98(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
and    $0x1,%esi
lea    0xe8b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x28,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x3f,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
lea    0xebf(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%o \00"
@.str.1 = [4 x i8] c"%o\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 63, i32* %2
store i32 104, i32* %3
store i32 136, i32* %4
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = and i32 %5, %6
%8 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %2
%10 = load i32, i32* %2
%11 = and i32 %9, %10
%12 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = load i32, i32* %2
%14 = load i32, i32* %3
%15 = and i32 %13, %14
%16 = load i32, i32* %4
%17 = and i32 %15, %16
%18 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %17)
%19 = load i32, i32* %2
%20 = and i32 %19, 1
%21 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %20)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"%o \00"
@.str.1 = [4 x i8] c"%o\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 40)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 63)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 8)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 1)
ret i32 0
}