xunge/DecIR huggingface dataset:
lg_cmp(p1, p2) int *p1, *p2;
{ return *p1 - *p2; }


x86 assembly (clang, -O0):
<lg_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lg_cmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @lg_cmp(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = sub nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @lg_cmp(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = sub nsw i32 %3, %4
ret i32 %5
}
int __dfd_offset(int fd) { return (fd / 8); }


x86 assembly (clang, -O0):
<__dfd_offset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dfd_offset>:
lea    0x7(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
sar    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @__dfd_offset(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 8
ret i32 %4
}

LLVM IR (-O2):
define i32 @__dfd_offset(i32 %0) {
%2 = sdiv i32 %0, 8
ret i32 %2
}
/* Variables and functions */
int time_total_milliseconds(float);
int time_minutes(float t) {
  return time_total_milliseconds(t) / (60 * 1000) % 60;
}


x86 assembly (clang, -O0):
<time_minutes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <time_total_milliseconds@plt>
mov    $0xea60,%ecx
cltd
idiv   %ecx
mov    $0x3c,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_minutes>:
push   %rax
call   1030 <time_total_milliseconds@plt>
cltq
imul   $0x45e7b273,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
sar    $0xe,%eax
add    %ecx,%eax
cltq
imul   $0xffffffff88888889,%rax,%rcx
shr    $0x20,%rcx
add    %eax,%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
sar    $0x5,%ecx
add    %edx,%ecx
imul   $0x3c,%ecx,%ecx
sub    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @time_minutes(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @time_total_milliseconds(float %3)
%5 = sdiv i32 %4, 60000
%6 = srem i32 %5, 60
ret i32 %6
}

LLVM IR (-O2):
define i32 @time_minutes(float %0) {
%2 = tail call i32 @time_total_milliseconds(float %0)
%3 = sdiv i32 %2, 60000
%4 = srem i32 %3, 60
ret i32 %4
}
int jac_chain_nm3_n_out(void) { return 2; }


x86 assembly (clang, -O0):
<jac_chain_nm3_n_out>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jac_chain_nm3_n_out>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @jac_chain_nm3_n_out() {
ret i32 2
}

LLVM IR (-O2):
define i32 @jac_chain_nm3_n_out() {
ret i32 2
}
int test_imm_53uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x53 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_53uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x53,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_53uint64_lowword_reg>:
test   $0x53,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_53uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 83
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_53uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 83
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_nondet_int();
int iterate(int /*<<< orphan*/);
int main() { return iterate(__VERIFIER_nondet_int()); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,%edi
call   1040 <iterate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <iterate@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @__VERIFIER_nondet_int()
%3 = call i32 @iterate(i32 %2)
ret i32 %3
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 @iterate(i32 %1)
ret i32 %2
}
int verificaMatricula(int matricula) {
  if (matricula < 0)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<verificaMatricula>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111d <verificaMatricula+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1124 <verificaMatricula+0x24>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<verificaMatricula>:
mov    %edi,%eax
not    %eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @verificaMatricula(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %8
7: ; preds = %1
store i32 1, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @verificaMatricula(i32 %0) {
%2 = xor i32 %0, -1
%3 = lshr i32 %2, 31
ret i32 %3
}
/* Variables and functions */
__attribute__((unused)) size_t __ecm_set_sizeof(const unsigned long c) {
  return sizeof(long) + (size_t)c * sizeof(unsigned long);
}


x86 assembly (clang, -O0):
<__ecm_set_sizeof>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x3,%rax
add    $0x8,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ecm_set_sizeof>:
lea    0x8(,%rdi,8),%rax
ret

LLVM IR (-O0):
define i64 @__ecm_set_sizeof(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = mul i64 %3, 8
%5 = add i64 8, %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @__ecm_set_sizeof(i64 %0) {
%2 = shl i64 %0, 3
%3 = add i64 %2, 8
ret i64 %3
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ non_established(struct __test_metadata *);
void wrapper_non_established(struct __test_metadata *_metadata,
                             struct __fixture_variant_metadata *variant) {
  non_established(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_non_established>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <non_established@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_non_established>:
jmp    1030 <non_established@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_non_established(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @non_established(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_non_established(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @non_established(%struct.__test_metadata* %0)
ret void
}
int get_major_version(void) { return 1; }


x86 assembly (clang, -O0):
<get_major_version>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_major_version>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @get_major_version() {
ret i32 1
}

LLVM IR (-O2):
define i32 @get_major_version() {
ret i32 1
}
void foo550() {}


x86 assembly (clang, -O0):
<foo550>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo550>:
ret

LLVM IR (-O0):
define void @foo550() {
ret void
}

LLVM IR (-O2):
define void @foo550() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void precisionerror() {
  printf("Try increasing the area criterion and/or reducing the minimum\n");
  printf("  allowable angle so that tiny triangles are not created.\n");
}


x86 assembly (clang, -O0):
<precisionerror>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf18(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<precisionerror>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1a(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [63 x i8] c"Try increasing the area criterion and/or reducing the minimum\0A\00"
@.str.1 = [59 x i8] c" allowable angle so that tiny triangles are not created.\0A\00"
define void @precisionerror() {
%1 = call i32 @printf(i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [62 x i8] c"Try increasing the area criterion and/or reducing the minimum\00"
@str.2 = [58 x i8] c" allowable angle so that tiny triangles are not created.\00"
define void @precisionerror() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([62 x i8], [62 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([58 x i8], [58 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int s2qls();
int s2qls_() { return s2qls(); }


x86 assembly (clang, -O0):
<s2qls_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <s2qls@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s2qls_>:
xor    %eax,%eax
jmp    1030 <s2qls@plt>

LLVM IR (-O0):
define i32 @s2qls_() {
%1 = call i32 (...) @s2qls()
ret i32 %1
}

LLVM IR (-O2):
define i32 @s2qls_() {
%1 = tail call i32 (...) @s2qls()
ret i32 %1
}
unsigned long _strlen(const char *str) {
  unsigned long ret = 0;
  while (str[ret] != 0)
    ret++;
  return ret;
}


x86 assembly (clang, -O0):
<_strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1136 <_strlen+0x36>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <_strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_strlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <_strlen+0x10>
ret

LLVM IR (-O0):
define i64 @_strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* %5, i64 %6
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i64, i64* %3
%13 = add i64 %12, 1
store i64 %13, i64* %3
br label %4
14: ; preds = %4
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @_strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i64 %3
}
int foo(int n) {
  if (n < 0)
    n = ~n;
  return n;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111a <foo+0x1a>
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %edi,%eax
sar    $0x1f,%eax
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = xor i32 %6, -1
store i32 %7, i32* %2
br label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = ashr i32 %0, 31
%3 = xor i32 %2, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ stderr;
int _rmdir_error(char const *message, int ret) {
  fputs("rmdir"
        ": ",
        stderr);
  perror(message);
  return ret;
}


x86 assembly (clang, -O0):
<_rmdir_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%esi
lea    0xec1(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_rmdir_error>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
lea    0xec8(%rip),%rdi
call   1030 <fputs@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [8 x i8] c"rmdir: \00"
@stderr = global i32 0
define i32 @_rmdir_error(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = call i32 @fputs(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i8*, i8** %3
%8 = call i32 @perror(i8* %7)
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
@.str = [8 x i8] c"rmdir: \00"
@stderr = global i32 0
define i32 @_rmdir_error(i8* nocapture %0, i32 returned %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fputs(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @perror(i8* %0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
void netconn_usage(char *name) {
  printf("\nUsage: %s <get | set connect to internet or not>\n"
         "\tget - display it connect to internet or not\n"
         "\t\t after it came out from the factory to 'stdout'.\n"
         "\tset xxxx - record the result to POT partition,\n"
         "\t\tif thers is a result existed yet, just display\n"
         "\t\tit without any write action.\n"
         "\tclean - clean the result in POT partition.\n",
         name);
  exit(0);
}


x86 assembly (clang, -O0):
<netconn_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<netconn_usage>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [319 x i8] c"\0AUsage: %s <get | set connect to internet or not>\0A\09get - display it connect to internet or not\0A\09\09 after it came out from the factory to 'stdout'.\0A\09set xxxx - record the result to POT partition,\0A\09\09if thers is a result existed yet, just display\0A\09\09it without any write action.\0A\09clean - clean the result in POT partition.\0A\00"
define void @netconn_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([319 x i8], [319 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [319 x i8] c"\0AUsage: %s <get | set connect to internet or not>\0A\09get - display it connect to internet or not\0A\09\09 after it came out from the factory to 'stdout'.\0A\09set xxxx - record the result to POT partition,\0A\09\09if thers is a result existed yet, just display\0A\09\09it without any write action.\0A\09clean - clean the result in POT partition.\0A\00"
define void @netconn_usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([319 x i8], [319 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 0)
unreachable
}
int test_imm_15uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x15 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_15uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x15,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_15uint64_midword_reg>:
test   $0x150000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_15uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 21
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_15uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 1376256
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ pthread_self();
unsigned long ssl_id_callback(void) { return (unsigned long)pthread_self(); }


x86 assembly (clang, -O0):
<ssl_id_callback>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pthread_self@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssl_id_callback>:
xor    %eax,%eax
jmp    1030 <pthread_self@plt>

LLVM IR (-O0):
define i64 @ssl_id_callback() {
%1 = call i64 (...) @pthread_self()
ret i64 %1
}

LLVM IR (-O2):
define i64 @ssl_id_callback() {
%1 = tail call i64 (...) @pthread_self()
ret i64 %1
}
double unsignedIntRoundTrip(double z) {
  unsigned int y = (unsigned int)z;
  double z2 = y;
  return z2;
}


x86 assembly (clang, -O0):
<unsignedIntRoundTrip>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cvtsi2sd %rax,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedIntRoundTrip>:
cvttsd2si %xmm0,%rax
mov    %eax,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
ret

LLVM IR (-O0):
define double @unsignedIntRoundTrip(double %0) {
%2 = alloca double
%3 = alloca i32
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = fptoui double %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = uitofp i32 %7 to double
store double %8, double* %4
%9 = load double, double* %4
ret double %9
}

LLVM IR (-O2):
define double @unsignedIntRoundTrip(double %0) {
%2 = fptoui double %0 to i32
%3 = uitofp i32 %2 to double
ret double %3
}
/* Type definitions */
struct akwbs_connection {
  int dummy;
};

/* Variables and functions */
int do_processing(struct akwbs_connection *);
int akwbs_process_header(struct akwbs_connection *connection) {
  if (do_processing(connection) == -1)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<akwbs_process_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <do_processing@plt>
cmp    $0xffffffff,%eax
jne    113a <akwbs_process_header+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1141 <akwbs_process_header+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<akwbs_process_header>:
push   %rax
call   1030 <do_processing@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
sete   %cl
neg    %ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.akwbs_connection = type { i32 }
define i32 @akwbs_process_header(%struct.akwbs_connection* %0) {
%2 = alloca i32
%3 = alloca %struct.akwbs_connection*
store %struct.akwbs_connection* %0, %struct.akwbs_connection** %3
%4 = load %struct.akwbs_connection*, %struct.akwbs_connection** %3
%5 = call i32 @do_processing(%struct.akwbs_connection* %4)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
%struct.akwbs_connection = type { i32 }
define i32 @akwbs_process_header(%struct.akwbs_connection* %0) {
%2 = tail call i32 @do_processing(%struct.akwbs_connection* %0)
%3 = icmp eq i32 %2, -1
%4 = sext i1 %3 to i32
ret i32 %4
}
int td_isalpha(c)
int c;
{ return ((c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z')); }


x86 assembly (clang, -O0):
<td_isalpha>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x61,-0x4(%rbp)
jl     1120 <td_isalpha+0x20>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    113f <td_isalpha+0x3f>
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1139 <td_isalpha+0x39>
cmpl   $0x5a,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<td_isalpha>:
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @td_isalpha(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 97
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 122
br i1 %7, label %16, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 65
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 90
br label %14
14: ; preds = %11, %8
%15 = phi i1 [ false, %8 ], [ %13, %11 ]
br label %16
16: ; preds = %14, %5
%17 = phi i1 [ true, %5 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @td_isalpha(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
double GammaRand(double);
double BetaRand(double a, double b) {
  double g = GammaRand(a);
  return g / (g + GammaRand(b));
}


x86 assembly (clang, -O0):
<BetaRand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <GammaRand@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <GammaRand@plt>
movsd  -0x28(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x20(%rbp),%xmm0
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BetaRand>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
call   1030 <GammaRand@plt>
movsd  %xmm0,0x8(%rsp)
movsd  0x10(%rsp),%xmm0
call   1030 <GammaRand@plt>
movsd  0x8(%rsp),%xmm1
addsd  %xmm1,%xmm0
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @BetaRand(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = call double @GammaRand(double %6)
store double %7, double* %5
%8 = load double, double* %5
%9 = load double, double* %5
%10 = load double, double* %4
%11 = call double @GammaRand(double %10)
%12 = fadd double %9, %11
%13 = fdiv double %8, %12
ret double %13
}

LLVM IR (-O2):
define double @BetaRand(double %0, double %1) {
%3 = tail call double @GammaRand(double %0)
%4 = tail call double @GammaRand(double %1)
%5 = fadd double %3, %4
%6 = fdiv double %3, %5
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ bar(int *);
void f15() {
  int a[10];
  bar(a);
  if (a[1])
    (void)1;
}


x86 assembly (clang, -O0):
<f15>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
lea    -0x30(%rbp),%rdi
call   1030 <bar@plt>
cmpl   $0x0,-0x2c(%rbp)
je     1130 <f15+0x20>
jmp    1130 <f15+0x20>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f15>:
sub    $0x28,%rsp
mov    %rsp,%rdi
call   1030 <bar@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define void @f15() {
%1 = alloca [10 x i32]
%2 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%3 = call i32 @bar(i32* %2)
%4 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 1
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
br label %8
8: ; preds = %7, %0
ret void
}

LLVM IR (-O2):
define void @f15() {
%1 = alloca [10 x i32]
%2 = bitcast [10 x i32]* %1 to i8*
%3 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%4 = call i32 @bar(i32* %3)
ret void
}
int sumaReturn(int a, int b) {
  a = a / 2;
  b = b - 1;
  return a + b;
}


x86 assembly (clang, -O0):
<sumaReturn>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sumaReturn>:
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
sar    %eax
add    %esi,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @sumaReturn(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = sdiv i32 %5, 2
store i32 %6, i32* %3
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
store i32 %8, i32* %4
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @sumaReturn(i32 %0, i32 %1) {
%3 = sdiv i32 %0, 2
%4 = add nsw i32 %1, -1
%5 = add nsw i32 %4, %3
ret i32 %5
}
char *strcat(char *s1, const char *s2) {
  char *p1;
  const char *p2;
  for (p1 = s1; *p1 != '\0'; p1++)
    ;
  for (p2 = s2; (*p1 = *p2) != '\0'; p1++, p2++)
    ;
  return s1;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     113a <strcat+0x3a>
jmp    1129 <strcat+0x29>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <strcat+0x14>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%al
mov    -0x18(%rbp),%rcx
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     117c <strcat+0x7c>
jmp    115f <strcat+0x5f>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1142 <strcat+0x42>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
mov    %rdi,%rax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
cmpb   $0x0,(%rcx)
lea    0x1(%rcx),%rcx
jne    1110 <strcat+0x10>
mov    (%rsi),%dl
mov    %dl,-0x1(%rcx)
test   %dl,%dl
je     1142 <strcat+0x42>
xor    %edx,%edx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl 0x1(%rsi,%rdx,1),%edi
mov    %dil,(%rcx,%rdx,1)
add    $0x1,%rdx
test   %dil,%dil
jne    1130 <strcat+0x30>
ret

LLVM IR (-O0):
define i8* @strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
br label %8
8: ; preds = %14, %2
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %8
br label %14
14: ; preds = %13
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
br label %8
17: ; preds = %8
%18 = load i8*, i8** %4
store i8* %18, i8** %6
br label %19
19: ; preds = %26, %17
%20 = load i8*, i8** %6
%21 = load i8, i8* %20
%22 = load i8*, i8** %5
store i8 %21, i8* %22
%23 = sext i8 %21 to i32
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %31
25: ; preds = %19
br label %26
26: ; preds = %25
%27 = load i8*, i8** %5
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %5
%29 = load i8*, i8** %6
%30 = getelementptr inbounds i8, i8* %29, i32 1
store i8* %30, i8** %6
br label %19
31: ; preds = %19
%32 = load i8*, i8** %3
ret i8* %32
}

LLVM IR (-O2):
define i8* @strcat(i8* returned %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %7, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %6, label %8, label %3
8: ; preds = %3
%9 = load i8, i8* %1
store i8 %9, i8* %4
%10 = icmp eq i8 %9, 0
br i1 %10, label %18, label %11
11: ; preds = %8, %11
%12 = phi i8* [ %15, %11 ], [ %1, %8 ]
%13 = phi i8* [ %14, %11 ], [ %4, %8 ]
%14 = getelementptr inbounds i8, i8* %13, i64 1
%15 = getelementptr inbounds i8, i8* %12, i64 1
%16 = load i8, i8* %15
store i8 %16, i8* %14
%17 = icmp eq i8 %16, 0
br i1 %17, label %18, label %11
18: ; preds = %11, %8
ret i8* %0
}
/* Type definitions */
struct mlist_head {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mlist_add(struct mlist_head *, struct mlist_head *);
int /*<<< orphan*/ mlist_del(struct mlist_head *);
void _stp_swap(struct mlist_head *a, struct mlist_head *b) {
  mlist_del(a);
  mlist_add(a, b);
}


x86 assembly (clang, -O0):
<_stp_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mlist_del@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <mlist_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_stp_swap>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <mlist_del@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <mlist_add@plt>

LLVM IR (-O0):
%struct.mlist_head = type { i32 }
define void @_stp_swap(%struct.mlist_head* %0, %struct.mlist_head* %1) {
%3 = alloca %struct.mlist_head*
%4 = alloca %struct.mlist_head*
store %struct.mlist_head* %0, %struct.mlist_head** %3
store %struct.mlist_head* %1, %struct.mlist_head** %4
%5 = load %struct.mlist_head*, %struct.mlist_head** %3
%6 = call i32 @mlist_del(%struct.mlist_head* %5)
%7 = load %struct.mlist_head*, %struct.mlist_head** %3
%8 = load %struct.mlist_head*, %struct.mlist_head** %4
%9 = call i32 @mlist_add(%struct.mlist_head* %7, %struct.mlist_head* %8)
ret void
}

LLVM IR (-O2):
%struct.mlist_head = type { i32 }
define void @_stp_swap(%struct.mlist_head* %0, %struct.mlist_head* %1) {
%3 = tail call i32 @mlist_del(%struct.mlist_head* %0)
%4 = tail call i32 @mlist_add(%struct.mlist_head* %0, %struct.mlist_head* %1)
ret void
}
void Faster_update(short x, short y, short w, short h) {}


x86 assembly (clang, -O0):
<Faster_update>:
push   %rbp
mov    %rsp,%rbp
mov    %cx,%ax
mov    %dx,%cx
mov    %si,%dx
mov    %di,%si
mov    %si,-0x2(%rbp)
mov    %dx,-0x4(%rbp)
mov    %cx,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Faster_update>:
ret

LLVM IR (-O0):
define void @Faster_update(i16 signext %0, i16 signext %1, i16 signext %2, i16 signext %3) {
%5 = alloca i16
%6 = alloca i16
%7 = alloca i16
%8 = alloca i16
store i16 %0, i16* %5
store i16 %1, i16* %6
store i16 %2, i16* %7
store i16 %3, i16* %8
ret void
}

LLVM IR (-O2):
define void @Faster_update(i16 signext %0, i16 signext %1, i16 signext %2, i16 signext %3) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char const *, int);
void roadmap_bar_decode_arg(char *output, int o_size, const char *input,
                            int i_size) {
  int size;
  o_size -= 1;
  size = i_size < o_size ? i_size : o_size;
  strncpy(output, input, size);
  output[size] = '\0';
}


x86 assembly (clang, -O0):
<roadmap_bar_decode_arg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1146 <roadmap_bar_decode_arg+0x36>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x24(%rbp)
jmp    114c <roadmap_bar_decode_arg+0x3c>
mov    -0xc(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%edx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
movslq -0x20(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roadmap_bar_decode_arg>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
add    $0xffffffff,%ebx
cmp    %ecx,%ebx
cmovg  %ecx,%ebx
mov    %rdx,%rsi
mov    %ebx,%edx
call   1030 <strncpy@plt>
movslq %ebx,%rax
movb   $0x0,(%r14,%rax,1)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @roadmap_bar_decode_arg(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = load i32, i32* %6
%11 = sub nsw i32 %10, 1
store i32 %11, i32* %6
%12 = load i32, i32* %8
%13 = load i32, i32* %6
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %4
%16 = load i32, i32* %8
br label %19
17: ; preds = %4
%18 = load i32, i32* %6
br label %19
19: ; preds = %17, %15
%20 = phi i32 [ %16, %15 ], [ %18, %17 ]
store i32 %20, i32* %9
%21 = load i8*, i8** %5
%22 = load i8*, i8** %7
%23 = load i32, i32* %9
%24 = call i32 @strncpy(i8* %21, i8* %22, i32 %23)
%25 = load i8*, i8** %5
%26 = load i32, i32* %9
%27 = sext i32 %26 to i64
%28 = getelementptr inbounds i8, i8* %25, i64 %27
store i8 0, i8* %28
ret void
}

LLVM IR (-O2):
define void @roadmap_bar_decode_arg(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = add nsw i32 %1, -1
%6 = icmp sgt i32 %5, %3
%7 = select i1 %6, i32 %3, i32 %5
%8 = tail call i32 @strncpy(i8* %0, i8* %2, i32 %7)
%9 = sext i32 %7 to i64
%10 = getelementptr inbounds i8, i8* %0, i64 %9
store i8 0, i8* %10
ret void
}
/* Type definitions */
struct timeval {
  long tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gfarm_timeval_normalize(struct timeval *);
void gfarm_timeval_add_microsec(struct timeval *t, long microsec) {
  t->tv_usec += microsec;
  gfarm_timeval_normalize(t);
}


x86 assembly (clang, -O0):
<gfarm_timeval_add_microsec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    (%rax),%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rdi
call   1030 <gfarm_timeval_normalize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfarm_timeval_add_microsec>:
add    %rsi,(%rdi)
jmp    1030 <gfarm_timeval_normalize@plt>

LLVM IR (-O0):
%struct.timeval = type { i64 }
define void @gfarm_timeval_add_microsec(%struct.timeval* %0, i64 %1) {
%3 = alloca %struct.timeval*
%4 = alloca i64
store %struct.timeval* %0, %struct.timeval** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load %struct.timeval*, %struct.timeval** %3
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %6, i32 0, i32 0
%8 = load i64, i64* %7
%9 = add nsw i64 %8, %5
store i64 %9, i64* %7
%10 = load %struct.timeval*, %struct.timeval** %3
%11 = call i32 @gfarm_timeval_normalize(%struct.timeval* %10)
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i64 }
define void @gfarm_timeval_add_microsec(%struct.timeval* %0, i64 %1) {
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%4 = load i64, i64* %3
%5 = add nsw i64 %4, %1
store i64 %5, i64* %3
%6 = tail call i32 @gfarm_timeval_normalize(%struct.timeval* %0)
ret void
}
void rop3_196_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~*D;
  stk2 = T | stk3;
  stk1 = S & stk2;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_196_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_196_1_0>:
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_196_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %9
%15 = load i8, i8* %6
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = or i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = and i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = load i8*, i8** %4
%34 = load i8, i8* %33
%35 = zext i8 %34 to i32
%36 = load i8, i8* %5
%37 = zext i8 %36 to i32
%38 = and i32 %35, %37
%39 = or i32 %32, %38
%40 = trunc i32 %39 to i8
%41 = load i8*, i8** %4
store i8 %40, i8* %41
ret void
}

LLVM IR (-O2):
define void @rop3_196_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = and i8 %4, %1
store i8 %5, i8* %0
ret void
}
void ff_hevc_put_hevc_bi_w_qpel_h48_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_qpel_h48_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_qpel_h48_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_qpel_h48_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_qpel_h48_10_sse4() {
ret void
}
/* Variables and functions */
void *fbitstr_open(char *, char *);
void *mbitstr_open(void *, int);
scalar_t__ strcmp(char *, char *);
void *bitstr_open(void *fnamebuf, char *fmode, int bufsize) {
  if (strcmp(fmode, "mem") == 0) {
    return mbitstr_open((void *)fnamebuf, bufsize);
  } else {
    return fbitstr_open((char *)fnamebuf, fmode);
  }
}


x86 assembly (clang, -O0):
<bitstr_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xeb2(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1172 <bitstr_open+0x42>
mov    -0x10(%rbp),%rdi
mov    -0x1c(%rbp),%esi
call   1040 <mbitstr_open@plt>
mov    %rax,-0x8(%rbp)
jmp    1183 <bitstr_open+0x53>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1050 <fbitstr_open@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitstr_open>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
lea    0xebc(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strcmp@plt>
mov    %rbp,%rdi
test   %rax,%rax
je     1160 <bitstr_open+0x30>
mov    %rbx,%rsi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1050 <fbitstr_open@plt>
mov    %r14d,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <mbitstr_open@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"mem\00"
define i8* @bitstr_open(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i8*, i8** %6
%9 = call i64 @strcmp(i8* %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %3
%12 = load i8*, i8** %5
%13 = load i32, i32* %7
%14 = call i8* @mbitstr_open(i8* %12, i32 %13)
store i8* %14, i8** %4
br label %19
15: ; preds = %3
%16 = load i8*, i8** %5
%17 = load i8*, i8** %6
%18 = call i8* @fbitstr_open(i8* %16, i8* %17)
store i8* %18, i8** %4
br label %19
19: ; preds = %15, %11
%20 = load i8*, i8** %4
ret i8* %20
}

LLVM IR (-O2):
@.str = [4 x i8] c"mem\00"
define i8* @bitstr_open(i8* %0, i8* %1, i32 %2) {
%4 = tail call i64 @strcmp(i8* %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i8* @mbitstr_open(i8* %0, i32 %2)
br label %10
8: ; preds = %3
%9 = tail call i8* @fbitstr_open(i8* %0, i8* %1)
br label %10
10: ; preds = %8, %6
%11 = phi i8* [ %7, %6 ], [ %9, %8 ]
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ dosleep(int);
void wait_for_vsync() { dosleep(10000); }


x86 assembly (clang, -O0):
<wait_for_vsync>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2710,%edi
call   1030 <dosleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_for_vsync>:
mov    $0x2710,%edi
jmp    1030 <dosleep@plt>

LLVM IR (-O0):
define void @wait_for_vsync() {
%1 = call i32 @dosleep(i32 10000)
ret void
}

LLVM IR (-O2):
define void @wait_for_vsync() {
%1 = tail call i32 @dosleep(i32 10000)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WARN_ON_ONCE(int);
unsigned int FH_MEM_CBBC_QUEUE(unsigned int chnl) {
  if (chnl < 16)
    return ((0x1000) + 0x9D0) + 4 * chnl;
  if (chnl < 20)
    return ((0x1000) + 0xBF0) + 4 * (chnl - 16);
  WARN_ON_ONCE(chnl >= 32);
  return ((0x1000) + 0xB20) + 4 * (chnl - 20);
}


x86 assembly (clang, -O0):
<FH_MEM_CBBC_QUEUE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x10,-0x8(%rbp)
jae    1138 <FH_MEM_CBBC_QUEUE+0x28>
mov    -0x8(%rbp),%eax
shl    $0x2,%eax
add    $0x19d0,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <FH_MEM_CBBC_QUEUE+0x6a>
cmpl   $0x14,-0x8(%rbp)
jae    1158 <FH_MEM_CBBC_QUEUE+0x48>
mov    -0x8(%rbp),%eax
sub    $0x10,%eax
shl    $0x2,%eax
add    $0x1bf0,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <FH_MEM_CBBC_QUEUE+0x6a>
cmpl   $0x20,-0x8(%rbp)
setae  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <WARN_ON_ONCE@plt>
mov    -0x8(%rbp),%eax
sub    $0x14,%eax
shl    $0x2,%eax
add    $0x1b20,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FH_MEM_CBBC_QUEUE>:
push   %rbx
mov    %edi,%ebx
mov    $0x19d0,%eax
cmp    $0x10,%edi
jb     113a <FH_MEM_CBBC_QUEUE+0x2a>
mov    $0x1bb0,%eax
cmp    $0x14,%ebx
jb     113a <FH_MEM_CBBC_QUEUE+0x2a>
xor    %edi,%edi
cmp    $0x20,%ebx
setae  %dil
call   1030 <WARN_ON_ONCE@plt>
mov    $0x1ad0,%eax
lea    (%rax,%rbx,4),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @FH_MEM_CBBC_QUEUE(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ult i32 %4, 16
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = mul i32 4, %7
%9 = add i32 6608, %8
store i32 %9, i32* %2
br label %27
10: ; preds = %1
%11 = load i32, i32* %3
%12 = icmp ult i32 %11, 20
br i1 %12, label %13, label %18
13: ; preds = %10
%14 = load i32, i32* %3
%15 = sub i32 %14, 16
%16 = mul i32 4, %15
%17 = add i32 7152, %16
store i32 %17, i32* %2
br label %27
18: ; preds = %10
%19 = load i32, i32* %3
%20 = icmp uge i32 %19, 32
%21 = zext i1 %20 to i32
%22 = call i32 @WARN_ON_ONCE(i32 %21)
%23 = load i32, i32* %3
%24 = sub i32 %23, 20
%25 = mul i32 4, %24
%26 = add i32 6944, %25
store i32 %26, i32* %2
br label %27
27: ; preds = %18, %13, %6
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @FH_MEM_CBBC_QUEUE(i32 %0) {
%2 = icmp ult i32 %0, 16
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 20
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = icmp ugt i32 %0, 31
%7 = zext i1 %6 to i32
%8 = tail call i32 @WARN_ON_ONCE(i32 %7)
br label %9
9: ; preds = %3, %1, %5
%10 = phi i32 [ 6864, %5 ], [ 6608, %1 ], [ 7088, %3 ]
%11 = shl i32 %0, 2
%12 = add i32 %11, %10
ret i32 %12
}
void _accumulate_distribution(struct Graph *graph, unsigned int vertex,
                              unsigned int neighbors, void *arg) {
  double *distribution = arg;
  distribution[vertex] += neighbors;
  (void)graph;
}


x86 assembly (clang, -O0):
<_accumulate_distribution>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%eax
cvtsi2sd %rax,%xmm0
mov    -0x20(%rbp),%rax
mov    -0xc(%rbp),%ecx
addsd  (%rax,%rcx,8),%xmm0
movsd  %xmm0,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_accumulate_distribution>:
mov    %edx,%eax
cvtsi2sd %rax,%xmm0
mov    %esi,%eax
addsd  (%rcx,%rax,8),%xmm0
movsd  %xmm0,(%rcx,%rax,8)
ret

LLVM IR (-O0):
%struct.Graph = type opaque
define void @_accumulate_distribution(%struct.Graph* %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca %struct.Graph*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca double*
store %struct.Graph* %0, %struct.Graph** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%10 = load i8*, i8** %8
%11 = bitcast i8* %10 to double*
store double* %11, double** %9
%12 = load i32, i32* %7
%13 = uitofp i32 %12 to double
%14 = load double*, double** %9
%15 = load i32, i32* %6
%16 = zext i32 %15 to i64
%17 = getelementptr inbounds double, double* %14, i64 %16
%18 = load double, double* %17
%19 = fadd double %18, %13
store double %19, double* %17
%20 = load %struct.Graph*, %struct.Graph** %5
ret void
}

LLVM IR (-O2):
%struct.Graph = type opaque
define void @_accumulate_distribution(%struct.Graph* nocapture readnone %0, i32 %1, i32 %2, i8* nocapture %3) {
%5 = bitcast i8* %3 to double*
%6 = uitofp i32 %2 to double
%7 = zext i32 %1 to i64
%8 = getelementptr inbounds double, double* %5, i64 %7
%9 = load double, double* %8
%10 = fadd double %9, %6
store double %10, double* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0x17() {
  Assert_real((isalpha(23) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              120, ("isalpha should be 0 for 0x17"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x17>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x78,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x17>:
push   %rax
mov    $0x17,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x78,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x17\00"
define void @t_isalpha_0x17() {
%1 = call i64 @isalpha(i32 23)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 120, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x17\00"
define void @t_isalpha_0x17() {
%1 = tail call i64 @isalpha(i32 23)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 120, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}