xunge/DecIR huggingface dataset:
int busca_sequencial(int tamanho, int vetor[], int p) {
  int i;
  for (i = 0; i <= tamanho; i++) {
    if (vetor[i] == p) {
      return i;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<busca_sequencial>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1153 <busca_sequencial+0x53>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x14(%rbp),%eax
jne    1140 <busca_sequencial+0x40>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <busca_sequencial+0x5a>
jmp    1145 <busca_sequencial+0x45>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1115 <busca_sequencial+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<busca_sequencial>:
mov    $0xffffffff,%eax
test   %edi,%edi
js     111e <busca_sequencial+0x1e>
add    $0x1,%edi
xor    %ecx,%ecx
xchg   %ax,%ax
cmp    %edx,(%rsi,%rcx,4)
je     111f <busca_sequencial+0x1f>
add    $0x1,%rcx
cmp    %rcx,%rdi
jne    1110 <busca_sequencial+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @busca_sequencial(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %5
%12 = icmp sle i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32*, i32** %6
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %7
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 -1, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @busca_sequencial(i32 %0, i32* nocapture %1, i32 %2) {
%4 = icmp slt i32 %0, 0
br i1 %4, label %18, label %5
5: ; preds = %3
%6 = add nuw i32 %0, 1
%7 = zext i32 %6 to i64
br label %8
8: ; preds = %5, %13
%9 = phi i64 [ 0, %5 ], [ %14, %13 ]
%10 = getelementptr inbounds i32, i32* %1, i64 %9
%11 = load i32, i32* %10
%12 = icmp eq i32 %11, %2
br i1 %12, label %16, label %13
13: ; preds = %8
%14 = add nuw nsw i64 %9, 1
%15 = icmp eq i64 %14, %7
br i1 %15, label %18, label %8
16: ; preds = %8
%17 = trunc i64 %9 to i32
br label %18
18: ; preds = %13, %16, %3
%19 = phi i32 [ -1, %3 ], [ %17, %16 ], [ -1, %13 ]
ret i32 %19
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int /*<<< orphan*/);
int /*<<< orphan*/ func(int, int);
int main() {
  int x = 7;
  func(!x, !7);
  _exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x7,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
xor    %esi,%esi
call   1040 <func@plt>
xor    %edi,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1040 <func@plt>
xor    %edi,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 7, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
%7 = call i32 @func(i32 %6, i32 0)
%8 = call i32 @_exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @func(i32 0, i32 0)
%2 = tail call i32 @_exit(i32 0)
unreachable
}
/* Variables and functions */
int EOF;
int getchar();
int /*<<< orphan*/ printf(char *, ...);
int main() {
  int c;
  while ((c = getchar()) != EOF) {
    if (c == ' ')
      printf("\n");
    else
      printf("%c", c);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x8(%rbp)
mov    0x2ea8(%rip),%rcx
cmp    (%rcx),%eax
je     117b <main+0x5b>
cmpl   $0x20,-0x8(%rbp)
jne    1165 <main+0x45>
lea    0xea7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    1176 <main+0x56>
mov    -0x8(%rbp),%esi
lea    0xe93(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    112f <main+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb7(%rip),%rbx
cmp    (%rbx),%eax
je     1158 <main+0x38>
mov    $0xa,%ebp
nopw   0x0(%rax,%rax,1)
cmp    $0x20,%eax
cmove  %ebp,%eax
mov    %eax,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    (%rbx),%eax
jne    1140 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@EOF = global i32 0
@.str = [2 x i8] c"\0A\00"
@.str.1 = [3 x i8] c"%c\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %15, %0
%4 = call i32 (...) @getchar()
store i32 %4, i32* %2
%5 = load i32, i32* @EOF
%6 = icmp ne i32 %4, %5
br i1 %6, label %7, label %16
7: ; preds = %3
%8 = load i32, i32* %2
%9 = icmp eq i32 %8, 32
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %15
12: ; preds = %7
%13 = load i32, i32* %2
%14 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %13)
br label %15
15: ; preds = %12, %10
br label %3
16: ; preds = %3
%17 = load i32, i32* %1
ret i32 %17
}

LLVM IR (-O2):
@EOF = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @getchar()
%2 = load i32, i32* @EOF
%3 = icmp eq i32 %1, %2
br i1 %3, label %12, label %4
4: ; preds = %0, %4
%5 = phi i32 [ %9, %4 ], [ %1, %0 ]
%6 = icmp eq i32 %5, 32
%7 = select i1 %6, i32 10, i32 %5
%8 = tail call i32 @putchar(i32 %7)
%9 = tail call i32 (...) @getchar()
%10 = load i32, i32* @EOF
%11 = icmp eq i32 %9, %10
br i1 %11, label %12, label %4
12: ; preds = %4, %0
ret i32 0
}
void dsp_fetchinstr_set(__attribute__((unused)) struct DSPObject *obj0,
                        __attribute__((unused)) struct DSPTag *tags) {}


x86 assembly (clang, -O0):
<dsp_fetchinstr_set>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dsp_fetchinstr_set>:
ret

LLVM IR (-O0):
%struct.DSPObject = type opaque
%struct.DSPTag = type opaque
define void @dsp_fetchinstr_set(%struct.DSPObject* %0, %struct.DSPTag* %1) {
%3 = alloca %struct.DSPObject*
%4 = alloca %struct.DSPTag*
store %struct.DSPObject* %0, %struct.DSPObject** %3
store %struct.DSPTag* %1, %struct.DSPTag** %4
ret void
}

LLVM IR (-O2):
%struct.DSPObject = type opaque
%struct.DSPTag = type opaque
define void @dsp_fetchinstr_set(%struct.DSPObject* nocapture %0, %struct.DSPTag* nocapture %1) {
ret void
}
/* Type definitions */
typedef int uint8_t;
struct pcg_state_16 {
  int dummy;
};

/* Variables and functions */
int pcg_oneseq_16_xsh_rr_8_random_r(struct pcg_state_16 *);
uint8_t pcg_oneseq_16_xsh_rr_8_boundedrand_r(struct pcg_state_16 *rng,
                                             uint8_t bound) {
  uint8_t threshold = ((uint8_t)(-bound)) % bound;
  for (;;) {
    uint8_t r = pcg_oneseq_16_xsh_rr_8_random_r(rng);
    if (r >= threshold)
      return r % bound;
  }
}


x86 assembly (clang, -O0):
<pcg_oneseq_16_xsh_rr_8_boundedrand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
sub    -0xc(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pcg_oneseq_16_xsh_rr_8_random_r@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1152 <pcg_oneseq_16_xsh_rr_8_boundedrand_r+0x42>
mov    -0x14(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
add    $0x20,%rsp
pop    %rbp
ret
jmp    112b <pcg_oneseq_16_xsh_rr_8_boundedrand_r+0x1b>

x86 assembly (clang, -O2):
<pcg_oneseq_16_xsh_rr_8_boundedrand_r>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <pcg_oneseq_16_xsh_rr_8_random_r@plt>
test   %eax,%eax
js     1120 <pcg_oneseq_16_xsh_rr_8_boundedrand_r+0x10>
cltd
idiv   %ebp
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.pcg_state_16 = type { i32 }
define i32 @pcg_oneseq_16_xsh_rr_8_boundedrand_r(%struct.pcg_state_16* %0, i32 %1) {
%3 = alloca %struct.pcg_state_16*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store %struct.pcg_state_16* %0, %struct.pcg_state_16** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 0, %7
%9 = load i32, i32* %4
%10 = srem i32 %8, %9
store i32 %10, i32* %5
br label %11
11: ; preds = %21, %2
%12 = load %struct.pcg_state_16*, %struct.pcg_state_16** %3
%13 = call i32 @pcg_oneseq_16_xsh_rr_8_random_r(%struct.pcg_state_16* %12)
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = load i32, i32* %5
%16 = icmp sge i32 %14, %15
br i1 %16, label %17, label %21
17: ; preds = %11
%18 = load i32, i32* %6
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
ret i32 %20
21: ; preds = %11
br label %11
}

LLVM IR (-O2):
%struct.pcg_state_16 = type { i32 }
define i32 @pcg_oneseq_16_xsh_rr_8_boundedrand_r(%struct.pcg_state_16* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @pcg_oneseq_16_xsh_rr_8_random_r(%struct.pcg_state_16* %0)
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %3
6: ; preds = %3
%7 = srem i32 %4, %1
ret i32 %7
}
int tester(int num) { return num; }


x86 assembly (clang, -O0):
<tester>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tester>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @tester(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @tester(i32 returned %0) {
ret i32 %0
}
void ceph_fscache_register_inode_cookie(struct ceph_fs_client *parent_fsc,
                                        struct ceph_inode_info *ci) {}


x86 assembly (clang, -O0):
<ceph_fscache_register_inode_cookie>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_fscache_register_inode_cookie>:
ret

LLVM IR (-O0):
%struct.ceph_fs_client = type opaque
%struct.ceph_inode_info = type opaque
define void @ceph_fscache_register_inode_cookie(%struct.ceph_fs_client* %0, %struct.ceph_inode_info* %1) {
%3 = alloca %struct.ceph_fs_client*
%4 = alloca %struct.ceph_inode_info*
store %struct.ceph_fs_client* %0, %struct.ceph_fs_client** %3
store %struct.ceph_inode_info* %1, %struct.ceph_inode_info** %4
ret void
}

LLVM IR (-O2):
%struct.ceph_fs_client = type opaque
%struct.ceph_inode_info = type opaque
define void @ceph_fscache_register_inode_cookie(%struct.ceph_fs_client* nocapture %0, %struct.ceph_inode_info* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ d;

/* Variables and functions */
int /*<<< orphan*/ oled_SendCommand(unsigned char *, int);
void SetLowerColumnAddress(char x) {
  unsigned char d[] = {x & 0x0F};
  oled_SendCommand(d, sizeof(d));
}


x86 assembly (clang, -O0):
<SetLowerColumnAddress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
and    $0xf,%eax
mov    %al,-0x2(%rbp)
lea    -0x2(%rbp),%rdi
mov    $0x1,%esi
call   1030 <oled_SendCommand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetLowerColumnAddress>:
push   %rax
and    $0xf,%dil
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rdi
mov    $0x1,%esi
call   1030 <oled_SendCommand@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @SetLowerColumnAddress(i8 signext %0) {
%2 = alloca i8
%3 = alloca [1 x i8]
store i8 %0, i8* %2
%4 = getelementptr inbounds [1 x i8], [1 x i8]* %3, i64 0, i64 0
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = and i32 %6, 15
%8 = trunc i32 %7 to i8
store i8 %8, i8* %4
%9 = getelementptr inbounds [1 x i8], [1 x i8]* %3, i64 0, i64 0
%10 = call i32 @oled_SendCommand(i8* %9, i32 1)
ret void
}

LLVM IR (-O2):
define void @SetLowerColumnAddress(i8 signext %0) {
%2 = alloca [1 x i8]
%3 = getelementptr inbounds [1 x i8], [1 x i8]* %2, i64 0, i64 0
%4 = and i8 %0, 15
store i8 %4, i8* %3
%5 = call i32 @oled_SendCommand(i8* %3, i32 1)
ret void
}
void RotateUV90() {}


x86 assembly (clang, -O0):
<RotateUV90>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RotateUV90>:
ret

LLVM IR (-O0):
define void @RotateUV90() {
ret void
}

LLVM IR (-O2):
define void @RotateUV90() {
ret void
}
initptr(str_ptr, first_arg) char **str_ptr, **first_arg;
{
  char **arg_ptr;
  for (arg_ptr = &first_arg; *arg_ptr; arg_ptr++)
    *str_ptr++ = *arg_ptr;
}


x86 assembly (clang, -O0):
<initptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
lea    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmpq   $0x0,(%rax)
je     114c <initptr+0x4c>
mov    -0x20(%rbp),%rax
mov    (%rax),%rcx
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x8,%rdx
mov    %rdx,-0x10(%rbp)
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x20(%rbp)
jmp    1114 <initptr+0x14>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<initptr>:
mov    %rsi,-0x8(%rsp)
test   %rsi,%rsi
je     1121 <initptr+0x21>
xor    %eax,%eax
nopl   0x0(%rax)
mov    %rsi,(%rdi,%rax,1)
mov    (%rsp,%rax,1),%rsi
add    $0x8,%rax
test   %rsi,%rsi
jne    1110 <initptr+0x10>
ret

LLVM IR (-O0):
define i32 @initptr(i8** %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i8**
%6 = alloca i8**
store i8** %0, i8*** %4
store i8** %1, i8*** %5
%7 = bitcast i8*** %5 to i8**
store i8** %7, i8*** %6
br label %8
8: ; preds = %17, %2
%9 = load i8**, i8*** %6
%10 = load i8*, i8** %9
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %20
12: ; preds = %8
%13 = load i8**, i8*** %6
%14 = load i8*, i8** %13
%15 = load i8**, i8*** %4
%16 = getelementptr inbounds i8*, i8** %15, i32 1
store i8** %16, i8*** %4
store i8* %14, i8** %15
br label %17
17: ; preds = %12
%18 = load i8**, i8*** %6
%19 = getelementptr inbounds i8*, i8** %18, i32 1
store i8** %19, i8*** %6
br label %8
20: ; preds = %8
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @initptr(i8** nocapture writeonly %0, i8** %1) {
%3 = alloca i8**
store i8** %1, i8*** %3
%4 = icmp eq i8** %1, null
br i1 %4, label %16, label %5
5: ; preds = %2
%6 = bitcast i8** %1 to i8*
%7 = bitcast i8*** %3 to i8**
br label %8
8: ; preds = %5, %8
%9 = phi i8** [ %13, %8 ], [ %7, %5 ]
%10 = phi i8** [ %12, %8 ], [ %0, %5 ]
%11 = phi i8* [ %14, %8 ], [ %6, %5 ]
%12 = getelementptr inbounds i8*, i8** %10, i64 1
store i8* %11, i8** %10
%13 = getelementptr inbounds i8*, i8** %9, i64 1
%14 = load i8*, i8** %13
%15 = icmp eq i8* %14, null
br i1 %15, label %16, label %8
16: ; preds = %8, %2
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ config_store_get_val(int);
int /*<<< orphan*/ iface_midi_router_set_bend_range(int /*<<< orphan*/);
int /*<<< orphan*/ iface_midi_router_set_clock_div(int /*<<< orphan*/);
int /*<<< orphan*/ iface_midi_router_set_program(int /*<<< orphan*/);
void iface_midi_router_load_config(void) {
  iface_midi_router_set_program(config_store_get_val(1));
  iface_midi_router_set_bend_range(config_store_get_val(2));
  iface_midi_router_set_clock_div(config_store_get_val(3));
}


x86 assembly (clang, -O0):
<iface_midi_router_load_config>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <config_store_get_val@plt>
mov    %eax,%edi
call   1040 <iface_midi_router_set_program@plt>
mov    $0x2,%edi
call   1030 <config_store_get_val@plt>
mov    %eax,%edi
call   1050 <iface_midi_router_set_bend_range@plt>
mov    $0x3,%edi
call   1030 <config_store_get_val@plt>
mov    %eax,%edi
call   1060 <iface_midi_router_set_clock_div@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<iface_midi_router_load_config>:
push   %rax
mov    $0x1,%edi
call   1030 <config_store_get_val@plt>
mov    %eax,%edi
call   1040 <iface_midi_router_set_program@plt>
mov    $0x2,%edi
call   1030 <config_store_get_val@plt>
mov    %eax,%edi
call   1050 <iface_midi_router_set_bend_range@plt>
mov    $0x3,%edi
call   1030 <config_store_get_val@plt>
mov    %eax,%edi
pop    %rax
jmp    1060 <iface_midi_router_set_clock_div@plt>

LLVM IR (-O0):
define void @iface_midi_router_load_config() {
%1 = call i32 @config_store_get_val(i32 1)
%2 = call i32 @iface_midi_router_set_program(i32 %1)
%3 = call i32 @config_store_get_val(i32 2)
%4 = call i32 @iface_midi_router_set_bend_range(i32 %3)
%5 = call i32 @config_store_get_val(i32 3)
%6 = call i32 @iface_midi_router_set_clock_div(i32 %5)
ret void
}

LLVM IR (-O2):
define void @iface_midi_router_load_config() {
%1 = tail call i32 @config_store_get_val(i32 1)
%2 = tail call i32 @iface_midi_router_set_program(i32 %1)
%3 = tail call i32 @config_store_get_val(i32 2)
%4 = tail call i32 @iface_midi_router_set_bend_range(i32 %3)
%5 = tail call i32 @config_store_get_val(i32 3)
%6 = tail call i32 @iface_midi_router_set_clock_div(i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printl(char *);
int test() {
  printl("This is a test!");
  return 0;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printl@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printl@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"This is a test!\00"
define i32 @test() {
%1 = call i32 @printl(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"This is a test!\00"
define i32 @test() {
%1 = tail call i32 @printl(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int8_t pack_get_8(uint8_t *buffer, int byteNr) {
  int8_t retVal;
  uint8_t *ptr;
  ptr = (uint8_t *)&retVal;
  *(ptr + 0) = *(buffer + byteNr + 0);
  return (retVal);
}


x86 assembly (clang, -O0):
<pack_get_8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pack_get_8>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @pack_get_8(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32* %5, i32** %6
%7 = load i32*, i32** %3
%8 = load i32, i32* %4
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %7, i64 %9
%11 = getelementptr inbounds i32, i32* %10, i64 0
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = getelementptr inbounds i32, i32* %13, i64 0
store i32 %12, i32* %14
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
define i32 @pack_get_8(i32* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i32, i32* %0, i64 %3
%5 = load i32, i32* %4
ret i32 %5
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void rev8(uint8_t *x) {
  *x = (*x & 0x55) << 1 | (*x & 0xAA) >> 1;
  *x = (*x & 0x33) << 2 | (*x & 0xCC) >> 2;
  *x = (*x & 0x0F) << 4 | (*x & 0xF0) >> 4;
}


x86 assembly (clang, -O0):
<rev8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
and    $0x55,%ecx
shl    $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xaa,%eax
sar    $0x1,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
and    $0x33,%ecx
shl    $0x2,%ecx
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xcc,%eax
sar    $0x2,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
and    $0xf,%ecx
shl    $0x4,%ecx
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xf0,%eax
sar    $0x4,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev8>:
mov    (%rdi),%al
rol    $0x4,%al
mov    %eax,%ecx
and    $0x33,%cl
shl    $0x2,%cl
shr    $0x2,%al
and    $0x33,%al
or     %cl,%al
mov    %eax,%ecx
and    $0x55,%cl
add    %cl,%cl
shr    %al
and    $0x55,%al
or     %cl,%al
movzbl %al,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @rev8(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 85
%6 = shl i32 %5, 1
%7 = load i32*, i32** %2
%8 = load i32, i32* %7
%9 = and i32 %8, 170
%10 = ashr i32 %9, 1
%11 = or i32 %6, %10
%12 = load i32*, i32** %2
store i32 %11, i32* %12
%13 = load i32*, i32** %2
%14 = load i32, i32* %13
%15 = and i32 %14, 51
%16 = shl i32 %15, 2
%17 = load i32*, i32** %2
%18 = load i32, i32* %17
%19 = and i32 %18, 204
%20 = ashr i32 %19, 2
%21 = or i32 %16, %20
%22 = load i32*, i32** %2
store i32 %21, i32* %22
%23 = load i32*, i32** %2
%24 = load i32, i32* %23
%25 = and i32 %24, 15
%26 = shl i32 %25, 4
%27 = load i32*, i32** %2
%28 = load i32, i32* %27
%29 = and i32 %28, 240
%30 = ashr i32 %29, 4
%31 = or i32 %26, %30
%32 = load i32*, i32** %2
store i32 %31, i32* %32
ret void
}

LLVM IR (-O2):
define void @rev8(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = trunc i32 %2 to i8
%4 = tail call i8 @llvm.bitreverse.i8(i8 %3)
%5 = zext i8 %4 to i32
store i32 %5, i32* %0
ret void
}
int main() {
  _Bool b1, b2, b3;
  b1 = 0;
  b1++;
  assert(b1);
  b2 = 1;
  b2 += 10;
  assert(b2);
  b3 = b1 + b2;
  assert(b3 == 1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x0,-0x1(%rbp)
movb   $0x1,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1030 <assert@plt>
movb   $0x1,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0xa,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1030 <assert@plt>
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    -0x2(%rbp),%cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
xor    %eax,%eax
call   1030 <assert@plt>
mov    $0x1,%edi
xor    %eax,%eax
call   1030 <assert@plt>
mov    $0x1,%edi
xor    %eax,%eax
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i8
%2 = alloca i8
%3 = alloca i8
store i8 0, i8* %1
%4 = load i8, i8* %1
%5 = trunc i8 %4 to i1
store i8 1, i8* %1
%6 = load i8, i8* %1
%7 = trunc i8 %6 to i1
%8 = zext i1 %7 to i32
%9 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %8)
store i8 1, i8* %2
%10 = load i8, i8* %2
%11 = trunc i8 %10 to i1
%12 = zext i1 %11 to i32
%13 = add nsw i32 %12, 10
%14 = icmp ne i32 %13, 0
%15 = zext i1 %14 to i8
store i8 %15, i8* %2
%16 = load i8, i8* %2
%17 = trunc i8 %16 to i1
%18 = zext i1 %17 to i32
%19 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %18)
%20 = load i8, i8* %1
%21 = trunc i8 %20 to i1
%22 = zext i1 %21 to i32
%23 = load i8, i8* %2
%24 = trunc i8 %23 to i1
%25 = zext i1 %24 to i32
%26 = add nsw i32 %22, %25
%27 = icmp ne i32 %26, 0
%28 = zext i1 %27 to i8
store i8 %28, i8* %3
%29 = load i8, i8* %3
%30 = trunc i8 %29 to i1
%31 = zext i1 %30 to i32
%32 = icmp eq i32 %31, 1
%33 = zext i1 %32 to i32
%34 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %33)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 1)
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 1)
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 1)
ret i32 0
}
/* Variables and functions */
long *malloc(int);
int /*<<< orphan*/ printf(char *, long);
long sum(int, long *);
long main() {
  long s;
  long *a;
  a = malloc(5 * 8);
  a[0] = 4;
  a[1] = 3;
  a[2] = 1;
  a[3] = 7;
  a[4] = 6;
  s = sum(5, a);
  printf("sum=%d\n", s);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x28,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movq   $0x4,(%rax)
mov    -0x18(%rbp),%rax
movq   $0x3,0x8(%rax)
mov    -0x18(%rbp),%rax
movq   $0x1,0x10(%rax)
mov    -0x18(%rbp),%rax
movq   $0x7,0x18(%rax)
mov    -0x18(%rbp),%rax
movq   $0x6,0x20(%rax)
mov    -0x18(%rbp),%rsi
mov    $0x5,%edi
call   1040 <sum@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xe62(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x28,%edi
call   1050 <malloc@plt>
movaps 0xebe(%rip),%xmm0
movups %xmm0,(%rax)
movaps 0xec4(%rip),%xmm0
movups %xmm0,0x10(%rax)
movq   $0x6,0x20(%rax)
mov    $0x5,%edi
mov    %rax,%rsi
call   1040 <sum@plt>
lea    0xeb4(%rip),%rdi
mov    %rax,%rsi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"sum=%d\0A\00"
define i64 @main() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64*
%4 = call i64* @malloc(i32 40)
store i64* %4, i64** %3
%5 = load i64*, i64** %3
%6 = getelementptr inbounds i64, i64* %5, i64 0
store i64 4, i64* %6
%7 = load i64*, i64** %3
%8 = getelementptr inbounds i64, i64* %7, i64 1
store i64 3, i64* %8
%9 = load i64*, i64** %3
%10 = getelementptr inbounds i64, i64* %9, i64 2
store i64 1, i64* %10
%11 = load i64*, i64** %3
%12 = getelementptr inbounds i64, i64* %11, i64 3
store i64 7, i64* %12
%13 = load i64*, i64** %3
%14 = getelementptr inbounds i64, i64* %13, i64 4
store i64 6, i64* %14
%15 = load i64*, i64** %3
%16 = call i64 @sum(i32 5, i64* %15)
store i64 %16, i64* %2
%17 = load i64, i64* %2
%18 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i64 %17)
%19 = load i64, i64* %1
ret i64 %19
}

LLVM IR (-O2):
@.str = [8 x i8] c"sum=%d\0A\00"
define i64 @main() {
%1 = tail call i64* @malloc(i32 40)
%2 = bitcast i64* %1 to <2 x i64>*
store <2 x i64> <i64 4, i64 3>, <2 x i64>* %2
%3 = getelementptr inbounds i64, i64* %1, i64 2
%4 = bitcast i64* %3 to <2 x i64>*
store <2 x i64> <i64 1, i64 7>, <2 x i64>* %4
%5 = getelementptr inbounds i64, i64* %1, i64 4
store i64 6, i64* %5
%6 = tail call i64 @sum(i32 5, i64* %1)
%7 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i64 %6)
ret i64 undef
}
/* Variables and functions */
int /*<<< orphan*/ PVRSRVFindPerProcessData();
void *PVRSRVProcessPrivateData(int /*<<< orphan*/);
void *PVRSRVFindPerProcessPrivateData(void) {
  return PVRSRVProcessPrivateData(PVRSRVFindPerProcessData());
}


x86 assembly (clang, -O0):
<PVRSRVFindPerProcessPrivateData>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PVRSRVFindPerProcessData@plt>
mov    %eax,%edi
call   1040 <PVRSRVProcessPrivateData@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PVRSRVFindPerProcessPrivateData>:
push   %rax
xor    %eax,%eax
call   1030 <PVRSRVFindPerProcessData@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <PVRSRVProcessPrivateData@plt>

LLVM IR (-O0):
define i8* @PVRSRVFindPerProcessPrivateData() {
%1 = call i32 (...) @PVRSRVFindPerProcessData()
%2 = call i8* @PVRSRVProcessPrivateData(i32 %1)
ret i8* %2
}

LLVM IR (-O2):
define i8* @PVRSRVFindPerProcessPrivateData() {
%1 = tail call i32 (...) @PVRSRVFindPerProcessData()
%2 = tail call i8* @PVRSRVProcessPrivateData(i32 %1)
ret i8* %2
}
/* Variables and functions */
int read(int, char *, int);
int /*<<< orphan*/ write(int, char *, int);
void makerom_copy(int ifd, int ofd) {
  int n;
  char c[1];
  while ((n = read(ifd, c, 1)) > 0)
    write(ofd, c, n);
}


x86 assembly (clang, -O0):
<makerom_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xd(%rbp),%rsi
mov    $0x1,%edx
call   1040 <read@plt>
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
jle    115f <makerom_copy+0x3f>
mov    -0x8(%rbp),%edi
lea    -0xd(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <write@plt>
jmp    112e <makerom_copy+0xe>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<makerom_copy>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %esi,%r14d
mov    %edi,%ebp
lea    0xf(%rsp),%rsi
mov    $0x1,%edx
call   1040 <read@plt>
test   %eax,%eax
jle    1170 <makerom_copy+0x50>
lea    0xf(%rsp),%rbx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %r14d,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1040 <read@plt>
test   %eax,%eax
jg     1150 <makerom_copy+0x30>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @makerom_copy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca [1 x i8]
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %7
7: ; preds = %12, %2
%8 = load i32, i32* %3
%9 = getelementptr inbounds [1 x i8], [1 x i8]* %6, i64 0, i64 0
%10 = call i32 @read(i32 %8, i8* %9, i32 1)
store i32 %10, i32* %5
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %7
%13 = load i32, i32* %4
%14 = getelementptr inbounds [1 x i8], [1 x i8]* %6, i64 0, i64 0
%15 = load i32, i32* %5
%16 = call i32 @write(i32 %13, i8* %14, i32 %15)
br label %7
17: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @makerom_copy(i32 %0, i32 %1) {
%3 = alloca [1 x i8]
%4 = getelementptr inbounds [1 x i8], [1 x i8]* %3, i64 0, i64 0
%5 = call i32 @read(i32 %0, i8* %4, i32 1)
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %2, %7
%8 = phi i32 [ %10, %7 ], [ %5, %2 ]
%9 = call i32 @write(i32 %1, i8* %4, i32 %8)
%10 = call i32 @read(i32 %0, i8* %4, i32 1)
%11 = icmp sgt i32 %10, 0
br i1 %11, label %7, label %12
12: ; preds = %7, %2
ret void
}
void SPI_ScbModeStop(void) {}


x86 assembly (clang, -O0):
<SPI_ScbModeStop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_ScbModeStop>:
ret

LLVM IR (-O0):
define void @SPI_ScbModeStop() {
ret void
}

LLVM IR (-O2):
define void @SPI_ScbModeStop() {
ret void
}
void rop3_21_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = T & S;
  stk1 = *D | stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_21_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_21_1_0>:
xor    (%rdi),%sil
not    %sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_21_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %6
%10 = zext i8 %9 to i32
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = and i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %8
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = xor i32 %23, -1
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = xor i32 %29, -1
%31 = and i32 %27, %30
%32 = load i8*, i8** %4
%33 = load i8, i8* %32
%34 = zext i8 %33 to i32
%35 = load i8, i8* %5
%36 = zext i8 %35 to i32
%37 = and i32 %34, %36
%38 = or i32 %31, %37
%39 = trunc i32 %38 to i8
%40 = load i8*, i8** %4
store i8 %39, i8* %40
ret void
}

LLVM IR (-O2):
define void @rop3_21_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, %1
%6 = xor i8 %5, -1
store i8 %6, i8* %0
ret void
}
void get_installed_cmd(char **cmd) {
  *cmd = "rpm -qa --queryformat '%{NAME}\n'";
}


x86 assembly (clang, -O0):
<get_installed_cmd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
lea    0xeed(%rip),%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_installed_cmd>:
lea    0xef9(%rip),%rax
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
@.str = [33 x i8] c"rpm -qa --queryformat '%{NAME}\0A'\00"
define void @get_installed_cmd(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
store i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8** %3
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"rpm -qa --queryformat '%{NAME}\0A'\00"
define void @get_installed_cmd(i8** nocapture writeonly %0) {
store i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8** %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EOR_();
int /*<<< orphan*/ c64_memIndirectZeroY();
void EOR_izy(void) {
  c64_memIndirectZeroY();
  EOR_();
}


x86 assembly (clang, -O0):
<EOR_izy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <c64_memIndirectZeroY@plt>
mov    $0x0,%al
call   1040 <EOR_@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<EOR_izy>:
push   %rax
xor    %eax,%eax
call   1030 <c64_memIndirectZeroY@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <EOR_@plt>

LLVM IR (-O0):
define void @EOR_izy() {
%1 = call i32 (...) @c64_memIndirectZeroY()
%2 = call i32 (...) @EOR_()
ret void
}

LLVM IR (-O2):
define void @EOR_izy() {
%1 = tail call i32 (...) @c64_memIndirectZeroY()
%2 = tail call i32 (...) @EOR_()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ceil(int);
int log(int);
size_t pow(int, int /*<<< orphan*/);
size_t align_size(size_t size) { return pow(2, ceil(log(size) / log(2))); }


x86 assembly (clang, -O0):
<align_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
call   1040 <log@plt>
mov    %eax,-0xc(%rbp)
mov    $0x2,%edi
call   1040 <log@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <ceil@plt>
mov    %eax,%esi
mov    $0x2,%edi
call   1050 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<align_size>:
push   %rbx
call   1040 <log@plt>
mov    %eax,%ebx
mov    $0x2,%edi
call   1040 <log@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <ceil@plt>
mov    $0x2,%edi
mov    %eax,%esi
pop    %rbx
jmp    1050 <pow@plt>

LLVM IR (-O0):
define i64 @align_size(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = call i32 @log(i32 %4)
%6 = call i32 @log(i32 2)
%7 = sdiv i32 %5, %6
%8 = call i32 @ceil(i32 %7)
%9 = call i64 @pow(i32 2, i32 %8)
ret i64 %9
}

LLVM IR (-O2):
define i64 @align_size(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 @log(i32 %2)
%4 = tail call i32 @log(i32 2)
%5 = sdiv i32 %3, %4
%6 = tail call i32 @ceil(i32 %5)
%7 = tail call i64 @pow(i32 2, i32 %6)
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void f1(int var) { printf("this is f1 and var is: %d\n", var); }


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"this is f1 and var is: %d\0A\00"
define void @f1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"this is f1 and var is: %d\0A\00"
define void @f1(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int any_decrqss(char const *, char *);
int rpt_DECSCP(const char *the_title) { return any_decrqss(the_title, "*u"); }


x86 assembly (clang, -O0):
<rpt_DECSCP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <any_decrqss@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpt_DECSCP>:
lea    0xee9(%rip),%rsi
jmp    1030 <any_decrqss@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"*u\00"
define i32 @rpt_DECSCP(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @any_decrqss(i8* %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [3 x i8] c"*u\00"
define i32 @rpt_DECSCP(i8* %0) {
%2 = tail call i32 @any_decrqss(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
unsigned long insert_rbs(unsigned long insn, long value, int dialect,
                         const char **errmsg) {
  return insn | (((insn >> 21) & 0x1f) << 11);
}


x86 assembly (clang, -O0):
<insert_rbs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x15,%rcx
and    $0x1f,%rcx
shl    $0xb,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert_rbs>:
mov    %rdi,%rax
shr    $0xa,%rax
and    $0xf800,%eax
or     %rdi,%rax
ret

LLVM IR (-O0):
define i64 @insert_rbs(i64 %0, i64 %1, i32 %2, i8** %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i32
%8 = alloca i8**
store i64 %0, i64* %5
store i64 %1, i64* %6
store i32 %2, i32* %7
store i8** %3, i8*** %8
%9 = load i64, i64* %5
%10 = load i64, i64* %5
%11 = lshr i64 %10, 21
%12 = and i64 %11, 31
%13 = shl i64 %12, 11
%14 = or i64 %9, %13
ret i64 %14
}

LLVM IR (-O2):
define i64 @insert_rbs(i64 %0, i64 %1, i32 %2, i8** nocapture readnone %3) {
%5 = lshr i64 %0, 10
%6 = and i64 %5, 63488
%7 = or i64 %6, %0
ret i64 %7
}
void Draw_Pixel(unsigned short x, unsigned short y, unsigned char R,
                unsigned char G, unsigned char B) {}


x86 assembly (clang, -O0):
<Draw_Pixel>:
push   %rbp
mov    %rsp,%rbp
mov    %r8b,%al
mov    %di,-0x2(%rbp)
mov    %si,-0x4(%rbp)
mov    %dl,-0x5(%rbp)
mov    %cl,-0x6(%rbp)
mov    %al,-0x7(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Draw_Pixel>:
ret

LLVM IR (-O0):
define void @Draw_Pixel(i16 zeroext %0, i16 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8 zeroext %4) {
%6 = alloca i16
%7 = alloca i16
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i16 %0, i16* %6
store i16 %1, i16* %7
store i8 %2, i8* %8
store i8 %3, i8* %9
store i8 %4, i8* %10
ret void
}

LLVM IR (-O2):
define void @Draw_Pixel(i16 zeroext %0, i16 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8 zeroext %4) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memreg(void *);
void *realloc(void *, size_t);
void *rrealloc(void *ptr, size_t size) {
  ptr = realloc(ptr, size);
  memreg(ptr);
  return ptr;
}


x86 assembly (clang, -O0):
<rrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <memreg@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rrealloc>:
push   %rbx
call   1040 <realloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <memreg@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @rrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @realloc(i8* %5, i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = call i32 @memreg(i8* %8)
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
define i8* @rrealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = tail call i32 @memreg(i8* %3)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void a() {
#pragma omp parallel num_threads(2)
  { puts("para_a"); }
  puts("a ended");
}


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xee0(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee3(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"para_a\00"
@.str.1 = [8 x i8] c"a ended\00"
define void @a() {
%1 = call i32 @puts(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"para_a\00"
@.str.1 = [8 x i8] c"a ended\00"
define void @a() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
float copysignf(float, float);
float smenvglv(float y1, float x, float xo, float T) {
  return y1 + copysignf(x - xo, x - y1) / T;
}


x86 assembly (clang, -O0):
<smenvglv>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
subss  -0xc(%rbp),%xmm1
movss  -0x8(%rbp),%xmm2
subss  -0x4(%rbp),%xmm2
movaps 0xec8(%rip),%xmm3
pand   %xmm3,%xmm2
movaps 0xecd(%rip),%xmm3
pand   %xmm3,%xmm1
por    %xmm2,%xmm1
divss  -0x10(%rbp),%xmm1
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<smenvglv>:
movaps %xmm1,%xmm4
subss  %xmm2,%xmm4
subss  %xmm0,%xmm1
andps  0xeee(%rip),%xmm1
andps  0xef7(%rip),%xmm4
orps   %xmm1,%xmm4
divss  %xmm3,%xmm4
addss  %xmm4,%xmm0
ret

LLVM IR (-O0):
define float @smenvglv(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %5
%10 = load float, float* %6
%11 = load float, float* %7
%12 = fsub float %10, %11
%13 = load float, float* %6
%14 = load float, float* %5
%15 = fsub float %13, %14
%16 = call float @llvm.copysign.f32(float %12, float %15)
%17 = load float, float* %8
%18 = fdiv float %16, %17
%19 = fadd float %9, %18
ret float %19
}

LLVM IR (-O2):
define float @smenvglv(float %0, float %1, float %2, float %3) {
%5 = fsub float %1, %2
%6 = fsub float %1, %0
%7 = tail call float @llvm.copysign.f32(float %5, float %6)
%8 = fdiv float %7, %3
%9 = fadd float %8, %0
ret float %9
}
/* Variables and functions */
scalar_t__ is_le();
short short_swap(short);
short short_to_le(short s) {
  if (is_le())
    return s;
  else
    return short_swap(s);
}


x86 assembly (clang, -O0):
<short_to_le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <is_le@plt>
cmp    $0x0,%rax
je     114d <short_to_le+0x2d>
mov    -0x4(%rbp),%ax
mov    %ax,-0x2(%rbp)
jmp    115a <short_to_le+0x3a>
movswl -0x4(%rbp),%edi
call   1040 <short_swap@plt>
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<short_to_le>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <is_le@plt>
test   %rax,%rax
je     1133 <short_to_le+0x13>
mov    %ebx,%eax
pop    %rbx
ret
movswl %bx,%edi
pop    %rbx
jmp    1040 <short_swap@plt>

LLVM IR (-O0):
define signext i16 @short_to_le(i16 signext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %3
%4 = call i64 (...) @is_le()
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i16, i16* %3
store i16 %7, i16* %2
br label %11
8: ; preds = %1
%9 = load i16, i16* %3
%10 = call signext i16 @short_swap(i16 signext %9)
store i16 %10, i16* %2
br label %11
11: ; preds = %8, %6
%12 = load i16, i16* %2
ret i16 %12
}

LLVM IR (-O2):
define signext i16 @short_to_le(i16 signext %0) {
%2 = tail call i64 (...) @is_le()
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call signext i16 @short_swap(i16 signext %0)
br label %6
6: ; preds = %1, %4
%7 = phi i16 [ %5, %4 ], [ %0, %1 ]
ret i16 %7
}
unsigned long UnlockVideoRegHost(unsigned long MMIOBase, unsigned long Key) {
  *(volatile unsigned long *)((unsigned long)(0x1E700000) +
                              (unsigned long)(0x00 + 0x0)) =
      (unsigned long)(Key);
  return *(volatile unsigned long *)((unsigned long)(0x1E700000) +
                                     (unsigned long)(0x00 + 0x0));
}


x86 assembly (clang, -O0):
<UnlockVideoRegHost>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    $0x1e700000,%eax
mov    %rcx,(%rax)
mov    $0x1e700000,%eax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UnlockVideoRegHost>:
mov    %rsi,0x1e700000
1e
mov    0x1e700000,%rax
1e
ret

LLVM IR (-O0):
define i64 @UnlockVideoRegHost(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
store volatile i64 %5, i64* inttoptr (i64 510656512 to i64*)
%6 = load volatile i64, i64* inttoptr (i64 510656512 to i64*)
ret i64 %6
}

LLVM IR (-O2):
define i64 @UnlockVideoRegHost(i64 %0, i64 %1) {
store volatile i64 %1, i64* inttoptr (i64 510656512 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 510656512 to i64*)
ret i64 %3
}
int pkw(int a, int b) {
  int pol;
  pol = (a / 2) * b;
  return pol;
}


x86 assembly (clang, -O0):
<pkw>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
imul   -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pkw>:
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
sar    %eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @pkw(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = sdiv i32 %6, 2
%8 = load i32, i32* %4
%9 = mul nsw i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
define i32 @pkw(i32 %0, i32 %1) {
%3 = sdiv i32 %0, 2
%4 = mul nsw i32 %3, %1
ret i32 %4
}