#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned long clk_get_cpu_rate();
unsigned int reg_read_32(unsigned int volatile *);
unsigned long clk_get_ddr_rate(void) {
  unsigned long cpu_rate = 0;
  unsigned long ddr_rate = 0;
  unsigned int ctrl;
  cpu_rate = clk_get_cpu_rate();
  ctrl = reg_read_32((volatile unsigned int *)(0xbfe78030));
  ctrl = (ctrl & (0x3 << (0))) >> (0);
  switch (ctrl) {
  case 0:
    ddr_rate = cpu_rate / 2;
    break;
  case 1:
    ddr_rate = cpu_rate / 4;
    break;
  case 2:
  case 3:
    ddr_rate = cpu_rate / 3;
    break;
  }
  return ddr_rate;
}


x86 assembly (clang, -O0):
<clk_get_ddr_rate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x0,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
xor    %eax,%eax
call   1040 <clk_get_cpu_rate@plt>
mov    %rax,-0x8(%rbp)
mov    $0xbfe78030,%edi
call   1030 <reg_read_32@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    $0x3,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
test   %eax,%eax
je     1191 <clk_get_ddr_rate+0x71>
jmp    116c <clk_get_ddr_rate+0x4c>
mov    -0x18(%rbp),%eax
sub    $0x1,%eax
je     11a2 <clk_get_ddr_rate+0x82>
jmp    117d <clk_get_ddr_rate+0x5d>
mov    -0x18(%rbp),%eax
add    $0xfffffffe,%eax
sub    $0x2,%eax
jb     11b3 <clk_get_ddr_rate+0x93>
jmp    11c5 <clk_get_ddr_rate+0xa5>
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    11c5 <clk_get_ddr_rate+0xa5>
mov    -0x8(%rbp),%rax
shr    $0x2,%rax
mov    %rax,-0x10(%rbp)
jmp    11c5 <clk_get_ddr_rate+0xa5>
mov    -0x8(%rbp),%rax
mov    $0x3,%ecx
xor    %edx,%edx
div    %rcx
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clk_get_ddr_rate>:
push   %rbx
xor    %eax,%eax
call   1040 <clk_get_cpu_rate@plt>
mov    %rax,%rbx
mov    $0xbfe78030,%edi
call   1030 <reg_read_32@plt>
and    $0x3,%eax
lea    -0x2(%rax),%ecx
cmp    $0x2,%ecx
jae    1155 <clk_get_ddr_rate+0x35>
movabs $0xaaaaaaaaaaaaaaab,%rcx
aa aa aa
mov    %rbx,%rax
mul    %rcx
mov    %rdx,%rbx
jmp    1160 <clk_get_ddr_rate+0x40>
cmp    $0x1,%eax
jne    1160 <clk_get_ddr_rate+0x40>
shr    $0x2,%rbx
jmp    1163 <clk_get_ddr_rate+0x43>
shr    %rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @clk_get_ddr_rate() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i32
store i64 0, i64* %1
store i64 0, i64* %2
%4 = call i64 (...) @clk_get_cpu_rate()
store i64 %4, i64* %1
%5 = call i32 @reg_read_32(i32* inttoptr (i64 3219619888 to i32*))
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, 3
%8 = lshr i32 %7, 0
store i32 %8, i32* %3
%9 = load i32, i32* %3
switch i32 %9, label %19 [
i32 0, label %10
i32 1, label %13
i32 2, label %16
i32 3, label %16
]
10: ; preds = %0
%11 = load i64, i64* %1
%12 = udiv i64 %11, 2
store i64 %12, i64* %2
br label %19
13: ; preds = %0
%14 = load i64, i64* %1
%15 = udiv i64 %14, 4
store i64 %15, i64* %2
br label %19
16: ; preds = %0, %0
%17 = load i64, i64* %1
%18 = udiv i64 %17, 3
store i64 %18, i64* %2
br label %19
19: ; preds = %0, %16, %13, %10
%20 = load i64, i64* %2
ret i64 %20
}

LLVM IR (-O2):
define i64 @clk_get_ddr_rate() {
%1 = tail call i64 (...) @clk_get_cpu_rate()
%2 = tail call i32 @reg_read_32(i32* inttoptr (i64 3219619888 to i32*))
%3 = and i32 %2, 3
switch i32 %3, label %10 [
i32 0, label %4
i32 1, label %6
i32 2, label %8
i32 3, label %8
]
4: ; preds = %0
%5 = lshr i64 %1, 1
br label %11
6: ; preds = %0
%7 = lshr i64 %1, 2
br label %11
8: ; preds = %0, %0
%9 = udiv i64 %1, 3
br label %11
10: ; preds = %0
unreachable
11: ; preds = %8, %6, %4
%12 = phi i64 [ %9, %8 ], [ %7, %6 ], [ %5, %4 ]
ret i64 %12
}