xunge/DecIR huggingface dataset:
/* Variables and functions */
double vector_magnitude_squared_3d(double *);
int /*<<< orphan*/ vector_subtract_3d(double const *, double const *, double *);
double vector_dist_squared_3d(const double v1[3], const double v2[3]) {
  double v[3];
  vector_subtract_3d(v1, v2, v);
  return vector_magnitude_squared_3d(v);
}


x86 assembly (clang, -O0):
<vector_dist_squared_3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x30(%rbp),%rdx
call   1040 <vector_subtract_3d@plt>
lea    -0x30(%rbp),%rdi
call   1030 <vector_magnitude_squared_3d@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_dist_squared_3d>:
push   %rbx
sub    $0x20,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdx
call   1040 <vector_subtract_3d@plt>
mov    %rbx,%rdi
call   1030 <vector_magnitude_squared_3d@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @vector_dist_squared_3d(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca [3 x double]
store double* %0, double** %3
store double* %1, double** %4
%6 = load double*, double** %3
%7 = load double*, double** %4
%8 = getelementptr inbounds [3 x double], [3 x double]* %5, i64 0, i64 0
%9 = call i32 @vector_subtract_3d(double* %6, double* %7, double* %8)
%10 = getelementptr inbounds [3 x double], [3 x double]* %5, i64 0, i64 0
%11 = call double @vector_magnitude_squared_3d(double* %10)
ret double %11
}

LLVM IR (-O2):
define double @vector_dist_squared_3d(double* %0, double* %1) {
%3 = alloca [3 x double]
%4 = bitcast [3 x double]* %3 to i8*
%5 = getelementptr inbounds [3 x double], [3 x double]* %3, i64 0, i64 0
%6 = call i32 @vector_subtract_3d(double* %0, double* %1, double* %5)
%7 = call double @vector_magnitude_squared_3d(double* %5)
ret double %7
}
/* Type definitions */
typedef int /*<<< orphan*/ ip;

/* Variables and functions */
int INET6_ADDRSTRLEN;
int anetFormatAddr(char *, size_t, char *, int);
int /*<<< orphan*/ anetSockName(int, char *, int, int *);
int anetFormatSock(int fd, char *fmt, size_t fmt_len) {
  char ip[INET6_ADDRSTRLEN];
  int port;
  anetSockName(fd, ip, sizeof(ip), &port);
  return anetFormatAddr(fmt, fmt_len, ip, port);
}


x86 assembly (clang, -O0):
<anetFormatSock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
mov    %rsp,%rcx
mov    %rcx,-0x20(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rsi
sub    %rcx,%rsi
mov    %rsi,-0x38(%rbp)
mov    %rsi,%rsp
mov    %rax,-0x28(%rbp)
mov    -0x4(%rbp),%edi
mov    %eax,%edx
lea    -0x2c(%rbp),%rcx
call   1030 <anetSockName@plt>
mov    -0x38(%rbp),%rdx
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x2c(%rbp),%ecx
call   1040 <anetFormatAddr@plt>
mov    -0x20(%rbp),%rcx
mov    %rcx,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<anetFormatSock>:
push   %rbp
mov    %rsp,%rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%r15
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
mov    %rsp,%rbx
mov    %rdx,%rax
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
lea    -0x1c(%rbp),%rcx
mov    %rbx,%rsi
call   1030 <anetSockName@plt>
mov    -0x1c(%rbp),%ecx
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1040 <anetFormatAddr@plt>
lea    -0x18(%rbp),%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@INET6_ADDRSTRLEN = global i32 0
define i32 @anetFormatSock(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%10 = load i32, i32* @INET6_ADDRSTRLEN
%11 = zext i32 %10 to i64
%12 = call i8* @llvm.stacksave()
store i8* %12, i8** %7
%13 = alloca i8, i64 %11
store i64 %11, i64* %8
%14 = load i32, i32* %4
%15 = trunc i64 %11 to i32
%16 = call i32 @anetSockName(i32 %14, i8* %13, i32 %15, i32* %9)
%17 = load i8*, i8** %5
%18 = load i64, i64* %6
%19 = load i32, i32* %9
%20 = call i32 @anetFormatAddr(i8* %17, i64 %18, i8* %13, i32 %19)
%21 = load i8*, i8** %7
ret i32 %20
}

LLVM IR (-O2):
@INET6_ADDRSTRLEN = global i32 0
define i32 @anetFormatSock(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = load i32, i32* @INET6_ADDRSTRLEN
%6 = zext i32 %5 to i64
%7 = alloca i8, i64 %6
%8 = bitcast i32* %4 to i8*
%9 = call i32 @anetSockName(i32 %0, i8* %7, i32 %5, i32* %4)
%10 = load i32, i32* %4
%11 = call i32 @anetFormatAddr(i8* %1, i64 %2, i8* %7, i32 %10)
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ foo(int, int, int, int);
int main() {
  foo(3, 5, 7, 9);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x3,%edi
mov    $0x5,%esi
mov    $0x7,%edx
mov    $0x9,%ecx
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
mov    $0x5,%esi
mov    $0x7,%edx
mov    $0x9,%ecx
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 3, i32 5, i32 7, i32 9)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 3, i32 5, i32 7, i32 9)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ htonl(int /*<<< orphan*/);
int /*<<< orphan*/ ipv4_cidr2mask_host(int /*<<< orphan*/);
uint32_t ipv4_cidr2mask_net(uint8_t cidr) {
  return htonl(ipv4_cidr2mask_host(cidr));
}


x86 assembly (clang, -O0):
<ipv4_cidr2mask_net>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <ipv4_cidr2mask_host@plt>
mov    %eax,%edi
call   1030 <htonl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipv4_cidr2mask_net>:
push   %rax
call   1040 <ipv4_cidr2mask_host@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <htonl@plt>

LLVM IR (-O0):
define i32 @ipv4_cidr2mask_net(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ipv4_cidr2mask_host(i32 %3)
%5 = call i32 @htonl(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @ipv4_cidr2mask_net(i32 %0) {
%2 = tail call i32 @ipv4_cidr2mask_host(i32 %0)
%3 = tail call i32 @htonl(i32 %2)
ret i32 %3
}
void ProcUtil_mallInfo() {}


x86 assembly (clang, -O0):
<ProcUtil_mallInfo>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ProcUtil_mallInfo>:
ret

LLVM IR (-O0):
define void @ProcUtil_mallInfo() {
ret void
}

LLVM IR (-O2):
define void @ProcUtil_mallInfo() {
ret void
}
/* Variables and functions */
int fibonacci(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int n;
  int i, total = 0;
  while (n <= 4000000) {
    n = fibonacci(i);
    if (n % 2 == 0) {
      total += n;
    }
    i++;
  }
  printf("%d\n", total);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x3d0900,-0x8(%rbp)
jg     1179 <main+0x59>
mov    -0xc(%rbp),%edi
call   1040 <fibonacci@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    116b <main+0x4b>
mov    -0x8(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1136 <main+0x16>
mov    -0x10(%rbp),%esi
lea    0xe7d(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %4
br label %5
5: ; preds = %18, %0
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 4000000
br i1 %7, label %8, label %21
8: ; preds = %5
%9 = load i32, i32* %3
%10 = call i32 @fibonacci(i32 %9)
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = srem i32 %11, 2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %8
%15 = load i32, i32* %2
%16 = load i32, i32* %4
%17 = add nsw i32 %16, %15
store i32 %17, i32* %4
br label %18
18: ; preds = %14, %8
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %5
21: ; preds = %5
%22 = load i32, i32* %4
%23 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %22)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
int lots_of_args(int an_integer, long a_long, short a_short, double a_double,
                 float a_float) {}


x86 assembly (clang, -O0):
<lots_of_args>:
push   %rbp
mov    %rsp,%rbp
mov    %dx,%ax
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %ax,-0x12(%rbp)
movsd  %xmm0,-0x20(%rbp)
movss  %xmm1,-0x24(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lots_of_args>:
ret

LLVM IR (-O0):
define i32 @lots_of_args(i32 %0, i64 %1, i16 signext %2, double %3, float %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
%9 = alloca i16
%10 = alloca double
%11 = alloca float
store i32 %0, i32* %7
store i64 %1, i64* %8
store i16 %2, i16* %9
store double %3, double* %10
store float %4, float* %11
%12 = load i32, i32* %6
ret i32 %12
}

LLVM IR (-O2):
define i32 @lots_of_args(i32 %0, i64 %1, i16 signext %2, double %3, float %4) {
ret i32 undef
}
/* Variables and functions */
int glutGetModifiers();
int s2winGetModifiers(void) { return glutGetModifiers(); }


x86 assembly (clang, -O0):
<s2winGetModifiers>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glutGetModifiers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<s2winGetModifiers>:
xor    %eax,%eax
jmp    1030 <glutGetModifiers@plt>

LLVM IR (-O0):
define i32 @s2winGetModifiers() {
%1 = call i32 (...) @glutGetModifiers()
ret i32 %1
}

LLVM IR (-O2):
define i32 @s2winGetModifiers() {
%1 = tail call i32 (...) @glutGetModifiers()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ PinConfigSet(unsigned long, int, int);
int /*<<< orphan*/ PinModeSet(unsigned long, unsigned long);
void PinTypeTimer(unsigned long ulPin, unsigned long ulPinMode) {
  PinModeSet(ulPin, ulPinMode);
  PinConfigSet(ulPin, 0x00000020 | 0x00000040, 0x00000000);
}


x86 assembly (clang, -O0):
<PinTypeTimer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <PinModeSet@plt>
mov    -0x8(%rbp),%rdi
mov    $0x60,%esi
xor    %edx,%edx
call   1040 <PinConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PinTypeTimer>:
push   %rbx
mov    %rdi,%rbx
call   1030 <PinModeSet@plt>
mov    %rbx,%rdi
mov    $0x60,%esi
xor    %edx,%edx
pop    %rbx
jmp    1040 <PinConfigSet@plt>

LLVM IR (-O0):
define void @PinTypeTimer(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @PinModeSet(i64 %5, i64 %6)
%8 = load i64, i64* %3
%9 = call i32 @PinConfigSet(i64 %8, i32 96, i32 0)
ret void
}

LLVM IR (-O2):
define void @PinTypeTimer(i64 %0, i64 %1) {
%3 = tail call i32 @PinModeSet(i64 %0, i64 %1)
%4 = tail call i32 @PinConfigSet(i64 %0, i32 96, i32 0)
ret void
}
int tegra_throttle_init(struct mutex *cpu_lock) { return 0; }


x86 assembly (clang, -O0):
<tegra_throttle_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra_throttle_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mutex = type opaque
define i32 @tegra_throttle_init(%struct.mutex* %0) {
%2 = alloca %struct.mutex*
store %struct.mutex* %0, %struct.mutex** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mutex = type opaque
define i32 @tegra_throttle_init(%struct.mutex* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
char *strrchr(char const *, char);
const char *get_command_name(const char *vektor) {
  char *last_slash;
  last_slash = strrchr(vektor, '/');
  if (last_slash)
    return last_slash + 1;
  else
    return vektor;
}


x86 assembly (clang, -O0):
<get_command_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     114a <get_command_name+0x3a>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1152 <get_command_name+0x42>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_command_name>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1030 <strrchr@plt>
lea    0x1(%rax),%rcx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @get_command_name(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strrchr(i8* %5, i8 signext 47)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 1
store i8* %11, i8** %2
br label %14
12: ; preds = %1
%13 = load i8*, i8** %3
store i8* %13, i8** %2
br label %14
14: ; preds = %12, %9
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define i8* @get_command_name(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%3 = icmp eq i8* %2, null
%4 = getelementptr inbounds i8, i8* %2, i64 1
%5 = select i1 %3, i8* %0, i8* %4
ret i8* %5
}
void nfs_fscache_set_cookie(struct inode *inode, struct file *filp) {}


x86 assembly (clang, -O0):
<nfs_fscache_set_cookie>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nfs_fscache_set_cookie>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
%struct.file = type opaque
define void @nfs_fscache_set_cookie(%struct.inode* %0, %struct.file* %1) {
%3 = alloca %struct.inode*
%4 = alloca %struct.file*
store %struct.inode* %0, %struct.inode** %3
store %struct.file* %1, %struct.file** %4
ret void
}

LLVM IR (-O2):
%struct.inode = type opaque
%struct.file = type opaque
define void @nfs_fscache_set_cookie(%struct.inode* nocapture %0, %struct.file* nocapture %1) {
ret void
}
void clear_line(char *line) {
  int len = 100;
  int i = 0;
  for (i = 0; i < len; i++) {
    *(line + i) = 0;
  }
}


x86 assembly (clang, -O0):
<clear_line>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x64,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1143 <clear_line+0x43>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    111d <clear_line+0x1d>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_line>:
xorps  %xmm0,%xmm0
movups %xmm0,0x50(%rdi)
movups %xmm0,0x40(%rdi)
movups %xmm0,0x30(%rdi)
movups %xmm0,0x20(%rdi)
movups %xmm0,0x10(%rdi)
movups %xmm0,(%rdi)
movl   $0x0,0x60(%rdi)
ret

LLVM IR (-O0):
define void @clear_line(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 100, i32* %3
store i32 0, i32* %4
store i32 0, i32* %4
br label %5
5: ; preds = %14, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = load i8*, i8** %2
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
store i8 0, i8* %13
br label %14
14: ; preds = %9
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
store i32 %16, i32* %4
br label %5
17: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @clear_line(i8* nocapture writeonly %0) {
ret void
}
/* Type definitions */
struct flashctx {
  int dummy;
};

/* Variables and functions */
int unlock_regspace2_uniform(struct flashctx *, int);
int unlock_regspace2_uniform_32k(struct flashctx *flash) {
  return unlock_regspace2_uniform(flash, 32 * 1024);
}


x86 assembly (clang, -O0):
<unlock_regspace2_uniform_32k>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x8000,%esi
call   1030 <unlock_regspace2_uniform@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unlock_regspace2_uniform_32k>:
mov    $0x8000,%esi
jmp    1030 <unlock_regspace2_uniform@plt>

LLVM IR (-O0):
%struct.flashctx = type { i32 }
define i32 @unlock_regspace2_uniform_32k(%struct.flashctx* %0) {
%2 = alloca %struct.flashctx*
store %struct.flashctx* %0, %struct.flashctx** %2
%3 = load %struct.flashctx*, %struct.flashctx** %2
%4 = call i32 @unlock_regspace2_uniform(%struct.flashctx* %3, i32 32768)
ret i32 %4
}

LLVM IR (-O2):
%struct.flashctx = type { i32 }
define i32 @unlock_regspace2_uniform_32k(%struct.flashctx* %0) {
%2 = tail call i32 @unlock_regspace2_uniform(%struct.flashctx* %0, i32 32768)
ret i32 %2
}
chk1(pkt) char *pkt;
{
  unsigned int chk;
  chk = chk2(pkt);
  chk = (((chk & 0300) >> 6) + chk) & 077;
  return (chk);
}


x86 assembly (clang, -O0):
<chk1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <chk2@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xc0,%eax
shr    $0x6,%eax
add    -0xc(%rbp),%eax
and    $0x3f,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chk1>:
push   %rax
xor    %eax,%eax
call   1030 <chk2@plt>
mov    %eax,%ecx
shr    $0x6,%ecx
and    $0x3,%ecx
add    %ecx,%eax
and    $0x3f,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @chk1(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @chk2 to i32 (i8*, ...)*)(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, 192
%8 = lshr i32 %7, 6
%9 = load i32, i32* %3
%10 = add i32 %8, %9
%11 = and i32 %10, 63
store i32 %11, i32* %3
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @chk1(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @chk2 to i32 (i8*, ...)*)(i8* %0)
%3 = lshr i32 %2, 6
%4 = and i32 %3, 3
%5 = add i32 %4, %2
%6 = and i32 %5, 63
ret i32 %6
}
void UART_PUTC(void *base_address, char data) {}


x86 assembly (clang, -O0):
<UART_PUTC>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART_PUTC>:
ret

LLVM IR (-O0):
define void @UART_PUTC(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
ret void
}

LLVM IR (-O2):
define void @UART_PUTC(i8* nocapture %0, i8 signext %1) {
ret void
}
/* Variables and functions */
int ZSTD_isError(size_t);
unsigned ZSTDv03_isError(size_t code) { return ZSTD_isError(code); }


x86 assembly (clang, -O0):
<ZSTDv03_isError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ZSTD_isError@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZSTDv03_isError>:
jmp    1030 <ZSTD_isError@plt>

LLVM IR (-O0):
define i32 @ZSTDv03_isError(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @ZSTD_isError(i64 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ZSTDv03_isError(i64 %0) {
%2 = tail call i32 @ZSTD_isError(i64 %0)
ret i32 %2
}
main() {
  int *p, *q;
  p = q;
  *p = *q;
  p = *q;
  *p = q;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
movslq (%rax),%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32*
%2 = alloca i32*
%3 = load i32*, i32** %2
store i32* %3, i32** %1
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = load i32*, i32** %1
store i32 %5, i32* %6
%7 = load i32*, i32** %2
%8 = load i32, i32* %7
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store i32* %10, i32** %1
%11 = load i32*, i32** %2
%12 = ptrtoint i32* %11 to i32
%13 = load i32*, i32** %1
store i32 %12, i32* %13
ret i32 0
}

LLVM IR (-O2):
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ fd_nrf8001_error();
int /*<<< orphan*/ fd_nrf8001_key_request_event(int /*<<< orphan*/);
void fd_nrf8001_decode_key_request_event(uint8_t *buffer, uint32_t length) {
  if (length != 2) {
    fd_nrf8001_error();
    return;
  }
  uint8_t key_type = buffer[1];
  fd_nrf8001_key_request_event(key_type);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x2,-0xc(%rbp)
je     1145 <fd_nrf8001_decode_key_request_event+0x25>
mov    $0x0,%al
call   1030 <fd_nrf8001_error@plt>
jmp    1157 <fd_nrf8001_decode_key_request_event+0x37>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
call   1040 <fd_nrf8001_key_request_event@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
cmp    $0x2,%esi
jne    112d <fd_nrf8001_decode_key_request_event+0xd>
mov    0x4(%rdi),%edi
jmp    1040 <fd_nrf8001_key_request_event@plt>
xor    %eax,%eax
jmp    1030 <fd_nrf8001_error@plt>

LLVM IR (-O0):
define void @fd_nrf8001_decode_key_request_event(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 2
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (...) @fd_nrf8001_error()
br label %16
10: ; preds = %2
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 1
%13 = load i32, i32* %12
store i32 %13, i32* %5
%14 = load i32, i32* %5
%15 = call i32 @fd_nrf8001_key_request_event(i32 %14)
br label %16
16: ; preds = %10, %8
ret void
}

LLVM IR (-O2):
define void @fd_nrf8001_decode_key_request_event(i32* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 2
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (...) @fd_nrf8001_error()
br label %10
6: ; preds = %2
%7 = getelementptr inbounds i32, i32* %0, i64 1
%8 = load i32, i32* %7
%9 = tail call i32 @fd_nrf8001_key_request_event(i32 %8)
br label %10
10: ; preds = %6, %4
ret void
}
/* Variables and functions */
scalar_t__ sin(double);
float sin2(float x) { return (float)sin((double)x); }


x86 assembly (clang, -O0):
<sin2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <sin@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sin2>:
push   %rax
cvtss2sd %xmm0,%xmm0
call   1030 <sin@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @sin2(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = call i64 @sin(double %4)
%6 = sitofp i64 %5 to float
ret float %6
}

LLVM IR (-O2):
define float @sin2(float %0) {
%2 = fpext float %0 to double
%3 = tail call i64 @sin(double %2)
%4 = sitofp i64 %3 to float
ret float %4
}
/* Variables and functions */
int Maxu(int, unsigned int);
unsigned Max3u(unsigned a, unsigned b, unsigned c) {
  return Maxu(Maxu(a, b), c);
}


x86 assembly (clang, -O0):
<Max3u>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <Maxu@plt>
mov    %eax,%edi
mov    -0xc(%rbp),%esi
call   1030 <Maxu@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Max3u>:
push   %rbx
mov    %edx,%ebx
call   1030 <Maxu@plt>
mov    %eax,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <Maxu@plt>

LLVM IR (-O0):
define i32 @Max3u(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call i32 @Maxu(i32 %7, i32 %8)
%10 = load i32, i32* %6
%11 = call i32 @Maxu(i32 %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @Max3u(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @Maxu(i32 %0, i32 %1)
%5 = tail call i32 @Maxu(i32 %4, i32 %2)
ret i32 %5
}
const char *G729A_Get_Version() {
  static const char *version = "1.1";
  return version;
}


x86 assembly (clang, -O0):
<G729A_Get_Version>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<G729A_Get_Version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@G729A_Get_Version.version = internal global i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0)
@.str = [4 x i8] c"1.1\00"
define i8* @G729A_Get_Version() {
%1 = load i8*, i8** @G729A_Get_Version.version
ret i8* %1
}

LLVM IR (-O2):
@.str = [4 x i8] c"1.1\00"
define i8* @G729A_Get_Version() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}
unsigned bitcount(unsigned x) {
  unsigned num = (x == 0 ? 0 : 1);
  while ((x &= (x - 1)) != 0) {
    ++num;
  }
  return num;
}


x86 assembly (clang, -O0):
<bitcount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmove  %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
je     113d <bitcount+0x3d>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111a <bitcount+0x1a>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitcount>:
cmp    $0x1,%edi
sbb    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nop
lea    -0x1(%rdi),%ecx
add    $0x1,%eax
and    %edi,%ecx
mov    %ecx,%edi
jne    1110 <bitcount+0x10>
ret

LLVM IR (-O0):
define i32 @bitcount(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 0, i32 1
store i32 %7, i32* %3
br label %8
8: ; preds = %14, %1
%9 = load i32, i32* %2
%10 = sub i32 %9, 1
%11 = load i32, i32* %2
%12 = and i32 %11, %10
store i32 %12, i32* %2
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %8
%15 = load i32, i32* %3
%16 = add i32 %15, 1
store i32 %16, i32* %3
br label %8
17: ; preds = %8
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @bitcount(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = zext i1 %2 to i32
br label %4
4: ; preds = %4, %1
%5 = phi i32 [ %0, %1 ], [ %8, %4 ]
%6 = phi i32 [ %3, %1 ], [ %10, %4 ]
%7 = add i32 %5, -1
%8 = and i32 %7, %5
%9 = icmp eq i32 %8, 0
%10 = add i32 %6, 1
br i1 %9, label %11, label %4
11: ; preds = %4
ret i32 %6
}
A4_Descriptors_Editor() { return 0; }


x86 assembly (clang, -O0):
<A4_Descriptors_Editor>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<A4_Descriptors_Editor>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @A4_Descriptors_Editor() {
ret i32 0
}

LLVM IR (-O2):
define i32 @A4_Descriptors_Editor() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ putVectorPicture(double, double, int, int /*<<< orphan*/,
                                    double);
void putHorizontalVectorPicture(double px, double py, double len) {
  putVectorPicture(px, py, 1, 0, len);
}


x86 assembly (clang, -O0):
<putHorizontalVectorPicture>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <putVectorPicture@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putHorizontalVectorPicture>:
mov    $0x1,%edi
xor    %esi,%esi
jmp    1030 <putVectorPicture@plt>

LLVM IR (-O0):
define void @putHorizontalVectorPicture(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %5
%9 = load double, double* %6
%10 = call i32 @putVectorPicture(double %7, double %8, i32 1, i32 0, double %9)
ret void
}

LLVM IR (-O2):
define void @putHorizontalVectorPicture(double %0, double %1, double %2) {
%4 = tail call i32 @putVectorPicture(double %0, double %1, i32 1, i32 0, double %2)
ret void
}
int golay23_count_errors(int recd_codeword, int corrected_codeword) {
  return __builtin_popcount(recd_codeword ^ corrected_codeword);
}


x86 assembly (clang, -O0):
<golay23_count_errors>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
xor    -0x8(%rbp),%ecx
mov    %ecx,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%ecx
mov    %ecx,%eax
and    $0x33333333,%eax
shr    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,%ecx
shr    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<golay23_count_errors>:
xor    %esi,%edi
mov    %edi,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%edi
mov    %edi,%eax
and    $0x33333333,%eax
shr    $0x2,%edi
and    $0x33333333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
add    %edi,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
ret

LLVM IR (-O0):
define i32 @golay23_count_errors(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %5, %6
%8 = call i32 @llvm.ctpop.i32(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @golay23_count_errors(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = tail call i32 @llvm.ctpop.i32(i32 %3)
ret i32 %4
}
/* Type definitions */
struct type_function {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ type_function_print(int /*<<< orphan*/ *,
                                       struct type_function *, char *);
void type_buf_function_print(FILE *output, struct type_function *self) {
  type_function_print(output, self, "buf-fun");
}


x86 assembly (clang, -O0):
<type_buf_function_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    0xed1(%rip),%rdx
call   1030 <type_function_print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<type_buf_function_print>:
lea    0xee9(%rip),%rdx
jmp    1030 <type_function_print@plt>

LLVM IR (-O0):
%struct.type_function = type { i32 }
@.str = [8 x i8] c"buf-fun\00"
define void @type_buf_function_print(i32* %0, %struct.type_function* %1) {
%3 = alloca i32*
%4 = alloca %struct.type_function*
store i32* %0, i32** %3
store %struct.type_function* %1, %struct.type_function** %4
%5 = load i32*, i32** %3
%6 = load %struct.type_function*, %struct.type_function** %4
%7 = call i32 @type_function_print(i32* %5, %struct.type_function* %6, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.type_function = type { i32 }
@.str = [8 x i8] c"buf-fun\00"
define void @type_buf_function_print(i32* %0, %struct.type_function* %1) {
%3 = tail call i32 @type_function_print(i32* %0, %struct.type_function* %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}
double area(double r) { return 3.141592654 * r * r; }


x86 assembly (clang, -O0):
<area>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<area>:
movsd  0xef8(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @area(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double 0x400921FB54524550, %3
%5 = load double, double* %2
%6 = fmul double %4, %5
ret double %6
}

LLVM IR (-O2):
define double @area(double %0) {
%2 = fmul double %0, 0x400921FB54524550
%3 = fmul double %2, %0
ret double %3
}
/* Variables and functions */
double sqrt(double const);
double radius_from_diagonal(double radius, double thickness, double length) {
  const double radius_outer = radius + thickness;
  const double length_outer = length + 2.0 * thickness;
  return sqrt(radius_outer * radius_outer + 0.25 * length_outer * length_outer);
}


x86 assembly (clang, -O0):
<radius_from_diagonal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
addsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm2
movsd  0xea1(%rip),%xmm1
mulsd  -0x28(%rbp),%xmm1
mulsd  -0x28(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radius_from_diagonal>:
addsd  %xmm1,%xmm0
addsd  %xmm1,%xmm1
addsd  %xmm2,%xmm1
movsd  0xedc(%rip),%xmm2
mulsd  %xmm1,%xmm2
mulsd  %xmm1,%xmm2
mulsd  %xmm0,%xmm0
addsd  %xmm2,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1143 <radius_from_diagonal+0x33>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @radius_from_diagonal(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%9 = load double, double* %4
%10 = load double, double* %5
%11 = fadd double %9, %10
store double %11, double* %7
%12 = load double, double* %6
%13 = load double, double* %5
%14 = call double @llvm.fmuladd.f64(double 2.000000e+00, double %13, double %12)
store double %14, double* %8
%15 = load double, double* %7
%16 = load double, double* %7
%17 = load double, double* %8
%18 = fmul double 2.500000e-01, %17
%19 = load double, double* %8
%20 = fmul double %18, %19
%21 = call double @llvm.fmuladd.f64(double %15, double %16, double %20)
%22 = call double @sqrt(double %21)
ret double %22
}

LLVM IR (-O2):
define double @radius_from_diagonal(double %0, double %1, double %2) {
%4 = fadd double %0, %1
%5 = tail call double @llvm.fmuladd.f64(double %1, double 2.000000e+00, double %2)
%6 = fmul double %5, 2.500000e-01
%7 = fmul double %5, %6
%8 = tail call double @llvm.fmuladd.f64(double %4, double %4, double %7)
%9 = tail call double @sqrt(double %8)
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void print_usage(const char *name) {
  fprintf(stderr,
          "Usage:\n"
          "    %s <source> <target> [-i/--info]\n",
          name);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [45 x i8] c"Usage:\0A %s <source> <target> [-i/--info]\0A\00"
define void @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [45 x i8] c"Usage:\0A %s <source> <target> [-i/--info]\0A\00"
define void @print_usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int round2_d() { return 42; }


x86 assembly (clang, -O0):
<round2_d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round2_d>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @round2_d() {
ret i32 42
}

LLVM IR (-O2):
define i32 @round2_d() {
ret i32 42
}
int zeroOffset(unsigned char *buff) {
  if (buff[1]) {
    return 0;
  }
  unsigned char tmp = buff[0] & 0x1F;
  return !tmp;
}


x86 assembly (clang, -O0):
<zeroOffset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,0x1(%rax)
je     1122 <zeroOffset+0x22>
movl   $0x0,-0x4(%rbp)
jmp    1140 <zeroOffset+0x40>
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
and    $0x1f,%eax
mov    %al,-0x11(%rbp)
cmpb   $0x0,-0x11(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zeroOffset>:
xor    %eax,%eax
cmpb   $0x0,0x1(%rdi)
je     1109 <zeroOffset+0x9>
ret
xor    %eax,%eax
testb  $0x1f,(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @zeroOffset(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 0, i32* %2
br label %21
10: ; preds = %1
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 0
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = and i32 %14, 31
%16 = trunc i32 %15 to i8
store i8 %16, i8* %4
%17 = load i8, i8* %4
%18 = icmp ne i8 %17, 0
%19 = xor i1 %18, true
%20 = zext i1 %19 to i32
store i32 %20, i32* %2
br label %21
21: ; preds = %10, %9
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @zeroOffset(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i8, i8* %0
%7 = and i8 %6, 31
%8 = icmp eq i8 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %1, %5
%11 = phi i32 [ %9, %5 ], [ 0, %1 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ BlinkNoTimerTaskC__Leds__led0Toggle();
int /*<<< orphan*/ BlinkNoTimerTaskC__Leds__led1Toggle();
int /*<<< orphan*/ BlinkNoTimerTaskC__Leds__led2Toggle();
void BlinkNoTimerTaskC__toggle__runTask(void) {
  BlinkNoTimerTaskC__Leds__led0Toggle();
  BlinkNoTimerTaskC__Leds__led1Toggle();
  BlinkNoTimerTaskC__Leds__led2Toggle();
}


x86 assembly (clang, -O0):
<BlinkNoTimerTaskC__toggle__runTask>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <BlinkNoTimerTaskC__Leds__led0Toggle@plt>
mov    $0x0,%al
call   1040 <BlinkNoTimerTaskC__Leds__led1Toggle@plt>
mov    $0x0,%al
call   1030 <BlinkNoTimerTaskC__Leds__led2Toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<BlinkNoTimerTaskC__toggle__runTask>:
push   %rax
xor    %eax,%eax
call   1050 <BlinkNoTimerTaskC__Leds__led0Toggle@plt>
xor    %eax,%eax
call   1040 <BlinkNoTimerTaskC__Leds__led1Toggle@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <BlinkNoTimerTaskC__Leds__led2Toggle@plt>

LLVM IR (-O0):
define void @BlinkNoTimerTaskC__toggle__runTask() {
%1 = call i32 (...) @BlinkNoTimerTaskC__Leds__led0Toggle()
%2 = call i32 (...) @BlinkNoTimerTaskC__Leds__led1Toggle()
%3 = call i32 (...) @BlinkNoTimerTaskC__Leds__led2Toggle()
ret void
}

LLVM IR (-O2):
define void @BlinkNoTimerTaskC__toggle__runTask() {
%1 = tail call i32 (...) @BlinkNoTimerTaskC__Leds__led0Toggle()
%2 = tail call i32 (...) @BlinkNoTimerTaskC__Leds__led1Toggle()
%3 = tail call i32 (...) @BlinkNoTimerTaskC__Leds__led2Toggle()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ McSrv_DisableIrq();
int /*<<< orphan*/ McSrv_EnableIrq();
unsigned char machdep_ReadI2C(unsigned char, unsigned long);
unsigned char McSrv_ReadI2C(unsigned char bSlaveAddr, unsigned long dRegAddr) {
  unsigned char bReg;
  McSrv_DisableIrq();
  bReg = machdep_ReadI2C(bSlaveAddr, dRegAddr);
  McSrv_EnableIrq();
  return bReg;
}


x86 assembly (clang, -O0):
<McSrv_ReadI2C>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <McSrv_DisableIrq@plt>
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rsi
movzbl %al,%edi
call   1040 <machdep_ReadI2C@plt>
mov    %al,-0x11(%rbp)
mov    $0x0,%al
call   1050 <McSrv_EnableIrq@plt>
movzbl -0x11(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<McSrv_ReadI2C>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <McSrv_DisableIrq@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
call   1040 <machdep_ReadI2C@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <McSrv_EnableIrq@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define zeroext i8 @McSrv_ReadI2C(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
%5 = alloca i8
store i8 %0, i8* %3
store i64 %1, i64* %4
%6 = call i32 (...) @McSrv_DisableIrq()
%7 = load i8, i8* %3
%8 = load i64, i64* %4
%9 = call zeroext i8 @machdep_ReadI2C(i8 zeroext %7, i64 %8)
store i8 %9, i8* %5
%10 = call i32 (...) @McSrv_EnableIrq()
%11 = load i8, i8* %5
ret i8 %11
}

LLVM IR (-O2):
define zeroext i8 @McSrv_ReadI2C(i8 zeroext %0, i64 %1) {
%3 = tail call i32 (...) @McSrv_DisableIrq()
%4 = tail call zeroext i8 @machdep_ReadI2C(i8 zeroext %0, i64 %1)
%5 = tail call i32 (...) @McSrv_EnableIrq()
ret i8 %4
}
/* Type definitions */
struct evhttp_request {
  int dummy;
};

/* Variables and functions */
char const *evhttp_request_get_host(struct evhttp_request *);
const char *get_request_host(struct evhttp_request *req) {
  return evhttp_request_get_host(req);
}


x86 assembly (clang, -O0):
<get_request_host>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <evhttp_request_get_host@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_request_host>:
jmp    1030 <evhttp_request_get_host@plt>

LLVM IR (-O0):
%struct.evhttp_request = type { i32 }
define i8* @get_request_host(%struct.evhttp_request* %0) {
%2 = alloca %struct.evhttp_request*
store %struct.evhttp_request* %0, %struct.evhttp_request** %2
%3 = load %struct.evhttp_request*, %struct.evhttp_request** %2
%4 = call i8* @evhttp_request_get_host(%struct.evhttp_request* %3)
ret i8* %4
}

LLVM IR (-O2):
%struct.evhttp_request = type { i32 }
define i8* @get_request_host(%struct.evhttp_request* %0) {
%2 = tail call i8* @evhttp_request_get_host(%struct.evhttp_request* %0)
ret i8* %2
}
/* Variables and functions */
int memcmp(void *, void *, int);
int treeKeycmp(void *p1, int n1, void *p2, int n2) {
  int res;
  res = memcmp(p1, p2, ((n1) > (n2) ? (n2) : (n1)));
  if (res == 0)
    res = (n1 - n2);
  return res;
}


x86 assembly (clang, -O0):
<treeKeycmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jle    114d <treeKeycmp+0x3d>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x34(%rbp)
jmp    1153 <treeKeycmp+0x43>
mov    -0xc(%rbp),%eax
mov    %eax,-0x34(%rbp)
mov    -0x28(%rbp),%rsi
mov    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%edx
call   1030 <memcmp@plt>
mov    %eax,-0x20(%rbp)
cmpl   $0x0,-0x20(%rbp)
jne    1179 <treeKeycmp+0x69>
mov    -0xc(%rbp),%eax
sub    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<treeKeycmp>:
push   %rbx
mov    %esi,%eax
mov    %esi,%ebx
sub    %ecx,%ebx
cmovg  %ecx,%eax
mov    %rdx,%rsi
mov    %eax,%edx
call   1030 <memcmp@plt>
test   %eax,%eax
cmove  %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @treeKeycmp(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%10 = load i8*, i8** %5
%11 = load i8*, i8** %7
%12 = load i32, i32* %6
%13 = load i32, i32* %8
%14 = icmp sgt i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %4
%16 = load i32, i32* %8
br label %19
17: ; preds = %4
%18 = load i32, i32* %6
br label %19
19: ; preds = %17, %15
%20 = phi i32 [ %16, %15 ], [ %18, %17 ]
%21 = call i32 @memcmp(i8* %10, i8* %11, i32 %20)
store i32 %21, i32* %9
%22 = load i32, i32* %9
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %28
24: ; preds = %19
%25 = load i32, i32* %6
%26 = load i32, i32* %8
%27 = sub nsw i32 %25, %26
store i32 %27, i32* %9
br label %28
28: ; preds = %24, %19
%29 = load i32, i32* %9
ret i32 %29
}

LLVM IR (-O2):
define i32 @treeKeycmp(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = icmp sgt i32 %1, %3
%6 = select i1 %5, i32 %3, i32 %1
%7 = tail call i32 @memcmp(i8* %0, i8* %2, i32 %6)
%8 = icmp eq i32 %7, 0
%9 = sub nsw i32 %1, %3
%10 = select i1 %8, i32 %9, i32 %7
ret i32 %10
}
int calculateOutput(float weights[], float x, float y) {
  float sum = x * weights[0] + y * weights[1] + weights[2];
  return (sum >= 0) ? 1 : -1;
}


x86 assembly (clang, -O0):
<calculateOutput>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm2
movss  -0x10(%rbp),%xmm1
mov    -0x8(%rbp),%rax
mulss  0x4(%rax),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
addss  0x8(%rax),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
xorps  %xmm1,%xmm1
mov    $0xffffffff,%eax
mov    $0x1,%ecx
ucomiss %xmm1,%xmm0
cmovae %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculateOutput>:
mulss  0x4(%rdi),%xmm1
mulss  (%rdi),%xmm0
addss  %xmm1,%xmm0
addss  0x8(%rdi),%xmm0
xorps  %xmm1,%xmm1
xor    %eax,%eax
ucomiss %xmm1,%xmm0
setae  %al
add    %eax,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @calculateOutput(float* %0, float %1, float %2) {
%4 = alloca float*
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float* %0, float** %4
store float %1, float* %5
store float %2, float* %6
%8 = load float, float* %5
%9 = load float*, float** %4
%10 = getelementptr inbounds float, float* %9, i64 0
%11 = load float, float* %10
%12 = load float, float* %6
%13 = load float*, float** %4
%14 = getelementptr inbounds float, float* %13, i64 1
%15 = load float, float* %14
%16 = fmul float %12, %15
%17 = call float @llvm.fmuladd.f32(float %8, float %11, float %16)
%18 = load float*, float** %4
%19 = getelementptr inbounds float, float* %18, i64 2
%20 = load float, float* %19
%21 = fadd float %17, %20
store float %21, float* %7
%22 = load float, float* %7
%23 = fcmp oge float %22, 0.000000e+00
%24 = zext i1 %23 to i64
%25 = select i1 %23, i32 1, i32 -1
ret i32 %25
}

LLVM IR (-O2):
define i32 @calculateOutput(float* nocapture %0, float %1, float %2) {
%4 = load float, float* %0
%5 = getelementptr inbounds float, float* %0, i64 1
%6 = load float, float* %5
%7 = fmul float %6, %2
%8 = tail call float @llvm.fmuladd.f32(float %1, float %4, float %7)
%9 = getelementptr inbounds float, float* %0, i64 2
%10 = load float, float* %9
%11 = fadd float %10, %8
%12 = fcmp oge float %11, 0.000000e+00
%13 = select i1 %12, i32 1, i32 -1
ret i32 %13
}
void ble_rsp_dfu_flash_set_address(
    const struct ble_msg_dfu_flash_set_address_rsp_t *msg) {}


x86 assembly (clang, -O0):
<ble_rsp_dfu_flash_set_address>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_rsp_dfu_flash_set_address>:
ret

LLVM IR (-O0):
%struct.ble_msg_dfu_flash_set_address_rsp_t = type opaque
define void @ble_rsp_dfu_flash_set_address(%struct.ble_msg_dfu_flash_set_address_rsp_t* %0) {
%2 = alloca %struct.ble_msg_dfu_flash_set_address_rsp_t*
store %struct.ble_msg_dfu_flash_set_address_rsp_t* %0, %struct.ble_msg_dfu_flash_set_address_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.ble_msg_dfu_flash_set_address_rsp_t = type opaque
define void @ble_rsp_dfu_flash_set_address(%struct.ble_msg_dfu_flash_set_address_rsp_t* nocapture %0) {
ret void
}