xunge/DecIR huggingface dataset:
/* Variables and functions */
size_t strlen(const char *str) {
  size_t ret = 0;
  while (*str) {
    ret++;
    str++;
  }
  return ret;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     113a <strlen+0x3a>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111f <strlen+0x1f>
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
lea    0x1(%rcx),%rax
cmpb   $0x0,0x1(%rdi,%rcx,1)
mov    %rax,%rcx
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = load i64, i64* %3
%10 = add i64 %9, 1
store i64 %10, i64* %3
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %4
13: ; preds = %4
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = add i64 %5, 1
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i64 [ 0, %1 ], [ %7, %4 ]
ret i64 %12
}
/* Type definitions */
struct box {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct box *);
int /*<<< orphan*/ reset_box_ac(struct box *);
int free_box(struct box *box) {
  if (!box)
    return 0;
  reset_box_ac(box);
  free(box);
  return 0;
}


x86 assembly (clang, -O0):
<free_box>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1143 <free_box+0x23>
movl   $0x0,-0x4(%rbp)
jmp    115c <free_box+0x3c>
mov    -0x10(%rbp),%rdi
call   1040 <reset_box_ac@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_box>:
test   %rdi,%rdi
je     1137 <free_box+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <reset_box_ac@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
pop    %rbx
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.box = type { i32 }
define i32 @free_box(%struct.box* %0) {
%2 = alloca i32
%3 = alloca %struct.box*
store %struct.box* %0, %struct.box** %3
%4 = load %struct.box*, %struct.box** %3
%5 = icmp ne %struct.box* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store i32 0, i32* %2
br label %12
7: ; preds = %1
%8 = load %struct.box*, %struct.box** %3
%9 = call i32 @reset_box_ac(%struct.box* %8)
%10 = load %struct.box*, %struct.box** %3
%11 = call i32 @free(%struct.box* %10)
store i32 0, i32* %2
br label %12
12: ; preds = %7, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
%struct.box = type { i32 }
define i32 @free_box(%struct.box* %0) {
%2 = icmp eq %struct.box* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @reset_box_ac(%struct.box* %0)
%5 = tail call i32 @free(%struct.box* %0)
br label %6
6: ; preds = %1, %3
ret i32 0
}
int tegra_gpio_to_wake(int gpio) { return 0; }


x86 assembly (clang, -O0):
<tegra_gpio_to_wake>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra_gpio_to_wake>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @tegra_gpio_to_wake(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @tegra_gpio_to_wake(i32 %0) {
ret i32 0
}
int returns_one() { return 1; }


x86 assembly (clang, -O0):
<returns_one>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<returns_one>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @returns_one() {
ret i32 1
}

LLVM IR (-O2):
define i32 @returns_one() {
ret i32 1
}
void XtScreenOfObject() {}


x86 assembly (clang, -O0):
<XtScreenOfObject>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtScreenOfObject>:
ret

LLVM IR (-O0):
define void @XtScreenOfObject() {
ret void
}

LLVM IR (-O2):
define void @XtScreenOfObject() {
ret void
}
void Escape(void *p) { asm volatile("" : : "g"(p) : "memory"); }


x86 assembly (clang, -O0):
<Escape>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Escape>:
mov    %rdi,-0x8(%rsp)
ret

LLVM IR (-O0):
define void @Escape(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @Escape(i8* %0) {
tail call void asm sideeffect "", "imr,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
int __VERIFIER_nondet_int();
void main() {
  int x, N;
  x = 0;
  N = __VERIFIER_nondet_int();
  if (N < 0)
    return;
  while (x < N) {
    x = x + 1;
  }
  __VERIFIER_assert(x == N);
  return;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1148 <main+0x28>
jmp    117a <main+0x5a>
jmp    114d <main+0x2d>
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1167 <main+0x47>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    114d <main+0x2d>
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <__VERIFIER_assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
test   %eax,%eax
js     1137 <main+0x17>
mov    $0x1,%edi
pop    %rax
jmp    1040 <__VERIFIER_assert@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
br label %21
7: ; preds = %0
br label %8
8: ; preds = %12, %7
%9 = load i32, i32* %1
%10 = load i32, i32* %2
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %15
12: ; preds = %8
%13 = load i32, i32* %1
%14 = add nsw i32 %13, 1
store i32 %14, i32* %1
br label %8
15: ; preds = %8
%16 = load i32, i32* %1
%17 = load i32, i32* %2
%18 = icmp eq i32 %16, %17
%19 = zext i1 %18 to i32
%20 = call i32 @__VERIFIER_assert(i32 %19)
br label %21
21: ; preds = %15, %6
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = icmp slt i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @__VERIFIER_assert(i32 1)
br label %5
5: ; preds = %0, %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fmtint(char *, unsigned long, int, int /*<<< orphan*/);
int fputs(char *, int /*<<< orphan*/ *);
int fputlu(long unsigned u, FILE *f) {
  char buff[32];
  fmtint(buff, u, 10, 0);
  return fputs(buff, f);
}


x86 assembly (clang, -O0):
<fputlu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0xa,%edx
xor    %ecx,%ecx
call   1030 <fmtint@plt>
lea    -0x30(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <fputs@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fputlu>:
push   %r14
push   %rbx
sub    $0x28,%rsp
mov    %rsi,%rbx
mov    %rdi,%rsi
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0xa,%edx
xor    %ecx,%ecx
call   1030 <fmtint@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <fputs@plt>
add    $0x28,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @fputlu(i64 %0, i32* %1) {
%3 = alloca i64
%4 = alloca i32*
%5 = alloca [32 x i8]
store i64 %0, i64* %3
store i32* %1, i32** %4
%6 = getelementptr inbounds [32 x i8], [32 x i8]* %5, i64 0, i64 0
%7 = load i64, i64* %3
%8 = call i32 @fmtint(i8* %6, i64 %7, i32 10, i32 0)
%9 = getelementptr inbounds [32 x i8], [32 x i8]* %5, i64 0, i64 0
%10 = load i32*, i32** %4
%11 = call i32 @fputs(i8* %9, i32* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @fputlu(i64 %0, i32* nocapture %1) {
%3 = alloca [32 x i8]
%4 = getelementptr inbounds [32 x i8], [32 x i8]* %3, i64 0, i64 0
%5 = call i32 @fmtint(i8* %4, i64 %0, i32 10, i32 0)
%6 = call i32 @fputs(i8* %4, i32* %1)
ret i32 %6
}
unsigned coap_method2flag(unsigned code) { return (1 << (code - 1)); }


x86 assembly (clang, -O0):
<coap_method2flag>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<coap_method2flag>:
lea    -0x1(%rdi),%ecx
mov    $0x1,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @coap_method2flag(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub i32 %3, 1
%5 = shl i32 1, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @coap_method2flag(i32 %0) {
%2 = add i32 %0, -1
%3 = shl nuw i32 1, %2
ret i32 %3
}
void rop3_22_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  unsigned char stk4;
  stk4 = T & S;
  stk4 = ~stk4;
  stk3 = *D & stk4;
  stk2 = S ^ stk3;
  stk1 = T ^ stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_22_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xe(%rbp)
movzbl -0xe(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xe(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xe(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xd(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_22_1_1>:
ret

LLVM IR (-O0):
define void @rop3_22_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%11 = load i8, i8* %6
%12 = zext i8 %11 to i32
%13 = load i8, i8* %5
%14 = zext i8 %13 to i32
%15 = and i32 %12, %14
%16 = trunc i32 %15 to i8
store i8 %16, i8* %10
%17 = load i8, i8* %10
%18 = zext i8 %17 to i32
%19 = xor i32 %18, -1
%20 = trunc i32 %19 to i8
store i8 %20, i8* %10
%21 = load i8*, i8** %4
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = load i8, i8* %10
%25 = zext i8 %24 to i32
%26 = and i32 %23, %25
%27 = trunc i32 %26 to i8
store i8 %27, i8* %9
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = load i8, i8* %9
%31 = zext i8 %30 to i32
%32 = xor i32 %29, %31
%33 = trunc i32 %32 to i8
store i8 %33, i8* %8
%34 = load i8, i8* %6
%35 = zext i8 %34 to i32
%36 = load i8, i8* %8
%37 = zext i8 %36 to i32
%38 = xor i32 %35, %37
%39 = trunc i32 %38 to i8
store i8 %39, i8* %7
%40 = load i8, i8* %7
%41 = zext i8 %40 to i32
%42 = load i8, i8* %5
%43 = zext i8 %42 to i32
%44 = xor i32 %43, -1
%45 = and i32 %41, %44
%46 = load i8, i8* %6
%47 = zext i8 %46 to i32
%48 = xor i32 %47, -1
%49 = and i32 %45, %48
%50 = load i8*, i8** %4
%51 = load i8, i8* %50
%52 = zext i8 %51 to i32
%53 = load i8, i8* %5
%54 = zext i8 %53 to i32
%55 = and i32 %52, %54
%56 = or i32 %49, %55
%57 = load i8*, i8** %4
%58 = load i8, i8* %57
%59 = zext i8 %58 to i32
%60 = load i8, i8* %6
%61 = zext i8 %60 to i32
%62 = and i32 %59, %61
%63 = or i32 %56, %62
%64 = trunc i32 %63 to i8
%65 = load i8*, i8** %4
store i8 %64, i8* %65
ret void
}

LLVM IR (-O2):
define void @rop3_22_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
int magellan_init(int fd, long *id, long *extra) {
  write(fd, "m3\rpBB\rz\r", 9);
  return 0;
}


x86 assembly (clang, -O0):
<magellan_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
lea    0xed3(%rip),%rsi
mov    $0x9,%edx
call   1030 <write@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<magellan_init>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x9,%edx
call   1030 <write@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"m3\0DpBB\0Dz\0D\00"
define i32 @magellan_init(i32 %0, i64* %1, i64* %2) {
%4 = alloca i32
%5 = alloca i64*
%6 = alloca i64*
store i32 %0, i32* %4
store i64* %1, i64** %5
store i64* %2, i64** %6
%7 = load i32, i32* %4
%8 = call i32 @write(i32 %7, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 9)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"m3\0DpBB\0Dz\0D\00"
define i32 @magellan_init(i32 %0, i64* nocapture readnone %1, i64* nocapture readnone %2) {
%4 = tail call i32 @write(i32 %0, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 9)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Extn_Reset();
int /*<<< orphan*/ ICT_Zap();
int /*<<< orphan*/ IWM_Reset();
int /*<<< orphan*/ Memory_Reset();
int /*<<< orphan*/ SCC_Reset();
int /*<<< orphan*/ SCSI_Reset();
int /*<<< orphan*/ Sony_Reset();
int /*<<< orphan*/ VIA1_Zap();
int /*<<< orphan*/ m68k_reset();
void EmulatedHardwareZap(void) {
  Memory_Reset();
  ICT_Zap();
  IWM_Reset();
  SCC_Reset();
  SCSI_Reset();
  VIA1_Zap();
  Sony_Reset();
  Extn_Reset();
  m68k_reset();
}


x86 assembly (clang, -O0):
<EmulatedHardwareZap>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <Memory_Reset@plt>
mov    $0x0,%al
call   1060 <ICT_Zap@plt>
mov    $0x0,%al
call   10b0 <IWM_Reset@plt>
mov    $0x0,%al
call   10a0 <SCC_Reset@plt>
mov    $0x0,%al
call   1080 <SCSI_Reset@plt>
mov    $0x0,%al
call   1030 <VIA1_Zap@plt>
mov    $0x0,%al
call   1070 <Sony_Reset@plt>
mov    $0x0,%al
call   1090 <Extn_Reset@plt>
mov    $0x0,%al
call   1040 <m68k_reset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<EmulatedHardwareZap>:
push   %rax
xor    %eax,%eax
call   1050 <Memory_Reset@plt>
xor    %eax,%eax
call   1060 <ICT_Zap@plt>
xor    %eax,%eax
call   10b0 <IWM_Reset@plt>
xor    %eax,%eax
call   10a0 <SCC_Reset@plt>
xor    %eax,%eax
call   1080 <SCSI_Reset@plt>
xor    %eax,%eax
call   1030 <VIA1_Zap@plt>
xor    %eax,%eax
call   1070 <Sony_Reset@plt>
xor    %eax,%eax
call   1090 <Extn_Reset@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <m68k_reset@plt>

LLVM IR (-O0):
define void @EmulatedHardwareZap() {
%1 = call i32 (...) @Memory_Reset()
%2 = call i32 (...) @ICT_Zap()
%3 = call i32 (...) @IWM_Reset()
%4 = call i32 (...) @SCC_Reset()
%5 = call i32 (...) @SCSI_Reset()
%6 = call i32 (...) @VIA1_Zap()
%7 = call i32 (...) @Sony_Reset()
%8 = call i32 (...) @Extn_Reset()
%9 = call i32 (...) @m68k_reset()
ret void
}

LLVM IR (-O2):
define void @EmulatedHardwareZap() {
%1 = tail call i32 (...) @Memory_Reset()
%2 = tail call i32 (...) @ICT_Zap()
%3 = tail call i32 (...) @IWM_Reset()
%4 = tail call i32 (...) @SCC_Reset()
%5 = tail call i32 (...) @SCSI_Reset()
%6 = tail call i32 (...) @VIA1_Zap()
%7 = tail call i32 (...) @Sony_Reset()
%8 = tail call i32 (...) @Extn_Reset()
%9 = tail call i32 (...) @m68k_reset()
ret void
}
void __inquire_remote_apic(int apicid) {}


x86 assembly (clang, -O0):
<__inquire_remote_apic>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__inquire_remote_apic>:
ret

LLVM IR (-O0):
define void @__inquire_remote_apic(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @__inquire_remote_apic(i32 %0) {
ret void
}
void b43legacy_debugfs_exit(void) {}


x86 assembly (clang, -O0):
<b43legacy_debugfs_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b43legacy_debugfs_exit>:
ret

LLVM IR (-O0):
define void @b43legacy_debugfs_exit() {
ret void
}

LLVM IR (-O2):
define void @b43legacy_debugfs_exit() {
ret void
}
/* Variables and functions */
int hello_writer(char *, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ strlen(char *);
int main(int argc, char *argv[]) {
  int retval;
  char *str = "This is a test\nBut i love it !!!\nWhat ?? it's assembly ?!?!\n";
  retval = hello_writer(str, strlen(str));
  printf("Return: %d\n", retval);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeba(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    %eax,%esi
call   1050 <hello_writer@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xeca(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xec8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1050 <hello_writer@plt>
lea    0xeec(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [61 x i8] c"This is a test\0ABut i love it !!!\0AWhat ?? it's assembly ?!?!\0A\00"
@.str.1 = [12 x i8] c"Return: %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0), i8** %6
%7 = load i8*, i8** %6
%8 = load i8*, i8** %6
%9 = call i32 @strlen(i8* %8)
%10 = call i32 @hello_writer(i8* %7, i32 %9)
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [61 x i8] c"This is a test\0ABut i love it !!!\0AWhat ?? it's assembly ?!?!\0A\00"
@.str.1 = [12 x i8] c"Return: %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @strlen(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @hello_writer(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
int buf_get_uint32(char const *);
uint64_t buf_get_uint62(const char *buf) {
  uint32_t val1;
  uint32_t val2;
  uint64_t ret;
  val1 = buf_get_uint32(buf);
  val2 = buf_get_uint32(buf + 4);
  ret = ((uint64_t)val1 << 32) + val2;
  return ret;
}


x86 assembly (clang, -O0):
<buf_get_uint62>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <buf_get_uint32@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x4,%rdi
call   1030 <buf_get_uint32@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x20,%ecx
shl    %cl,%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buf_get_uint62>:
push   %rbx
mov    %rdi,%rbx
call   1030 <buf_get_uint32@plt>
add    $0x4,%rbx
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <buf_get_uint32@plt>

LLVM IR (-O0):
define i32 @buf_get_uint62(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @buf_get_uint32(i8* %6)
store i32 %7, i32* %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 4
%10 = call i32 @buf_get_uint32(i8* %9)
store i32 %10, i32* %4
%11 = load i32, i32* %3
%12 = shl i32 %11, 32
%13 = load i32, i32* %4
%14 = add nsw i32 %12, %13
store i32 %14, i32* %5
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
define i32 @buf_get_uint62(i8* %0) {
%2 = tail call i32 @buf_get_uint32(i8* %0)
%3 = getelementptr inbounds i8, i8* %0, i64 4
%4 = tail call i32 @buf_get_uint32(i8* %3)
ret i32 poison
}
void gc_elems(struct elem **heads, int nbheads) {}


x86 assembly (clang, -O0):
<gc_elems>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gc_elems>:
ret

LLVM IR (-O0):
%struct.elem = type opaque
define void @gc_elems(%struct.elem** %0, i32 %1) {
%3 = alloca %struct.elem**
%4 = alloca i32
store %struct.elem** %0, %struct.elem*** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.elem = type opaque
define void @gc_elems(%struct.elem** nocapture %0, i32 %1) {
ret void
}
void left_encoder_pin_config(void) {}


x86 assembly (clang, -O0):
<left_encoder_pin_config>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<left_encoder_pin_config>:
ret

LLVM IR (-O0):
define void @left_encoder_pin_config() {
ret void
}

LLVM IR (-O2):
define void @left_encoder_pin_config() {
ret void
}
/* Variables and functions */
int js_add(int, int);
int add(int a, int b) { return js_add(a, b); }


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <js_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
jmp    1030 <js_add@plt>

LLVM IR (-O0):
define i32 @add(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @js_add(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @add(i32 %0, i32 %1) {
%3 = tail call i32 @js_add(i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int dgram_write(int /*<<< orphan*/ *, char const *, int);
int strlen(char const *);
int dgram_puts(BIO *bp, const char *str) {
  int n, ret;
  n = strlen(str);
  ret = dgram_write(bp, str, n);
  return (ret);
}


x86 assembly (clang, -O0):
<dgram_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <dgram_write@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dgram_puts>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <dgram_write@plt>

LLVM IR (-O0):
define i32 @dgram_puts(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %5
%9 = load i32*, i32** %3
%10 = load i8*, i8** %4
%11 = load i32, i32* %5
%12 = call i32 @dgram_write(i32* %9, i8* %10, i32 %11)
store i32 %12, i32* %6
%13 = load i32, i32* %6
ret i32 %13
}

LLVM IR (-O2):
define i32 @dgram_puts(i32* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @dgram_write(i32* %0, i8* %1, i32 %3)
ret i32 %4
}
unsigned char LSB(const unsigned short word) { return word & 0xff; }


x86 assembly (clang, -O0):
<LSB>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LSB>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @LSB(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 255
%6 = trunc i32 %5 to i8
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @LSB(i16 zeroext %0) {
%2 = trunc i16 %0 to i8
ret i8 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int getpgid(int /*<<< orphan*/);
int /*<<< orphan*/ getpid();
int main(void) {
  pid_t pid;
  pid = getpid();
  return getpgid(pid);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <getpgid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <getpgid@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @getpid()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @getpgid(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @getpid()
%2 = tail call i32 @getpgid(i32 %1)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  if (argc < 2)
    return 1;
  printf("Welcome\n");
  FILE *f = fopen(argv[1], "r");
  fclose(f);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    115c <main+0x2c>
movl   $0x1,-0x4(%rbp)
jmp    1190 <main+0x60>
lea    0xe9d(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
lea    0xe92(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
cmp    $0x2,%edi
jl     1165 <main+0x35>
push   %rbx
mov    %rsi,%rbx
lea    0xebd(%rip),%rdi
call   1030 <puts@plt>
mov    0x8(%rbx),%rdi
lea    0xeab(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,%rdi
call   1040 <fclose@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"Welcome\0A\00"
@.str.1 = [2 x i8] c"r\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %18
10: ; preds = %2
%11 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 1
%14 = load i8*, i8** %13
%15 = call i32* @fopen(i8* %14, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %15, i32** %6
%16 = load i32*, i32** %6
%17 = call i32 @fclose(i32* %16)
store i32 0, i32* %3
br label %18
18: ; preds = %10, %9
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@.str.1 = [2 x i8] c"r\00"
@str = [8 x i8] c"Welcome\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %10, label %4
4: ; preds = %2
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
%6 = getelementptr inbounds i8*, i8** %1, i64 1
%7 = load i8*, i8** %6
%8 = tail call i32* @fopen(i8* %7, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%9 = tail call i32 @fclose(i32* %8)
br label %10
10: ; preds = %2, %4
%11 = phi i32 [ 0, %4 ], [ 1, %2 ]
ret i32 %11
}
char *_Locale_extract_monetary_name(const char *__DUMMY_PAR1,
                                    char *__DUMMY_PAR) {
  return 0;
}


x86 assembly (clang, -O0):
<_Locale_extract_monetary_name>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Locale_extract_monetary_name>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @_Locale_extract_monetary_name(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @_Locale_extract_monetary_name(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* null
}
void cgroup_shutdown(struct thread_data *td, char **mnt) {}


x86 assembly (clang, -O0):
<cgroup_shutdown>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgroup_shutdown>:
ret

LLVM IR (-O0):
%struct.thread_data = type opaque
define void @cgroup_shutdown(%struct.thread_data* %0, i8** %1) {
%3 = alloca %struct.thread_data*
%4 = alloca i8**
store %struct.thread_data* %0, %struct.thread_data** %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
%struct.thread_data = type opaque
define void @cgroup_shutdown(%struct.thread_data* nocapture %0, i8** nocapture %1) {
ret void
}
int __test() { return 123L; }


x86 assembly (clang, -O0):
<__test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test>:
mov    $0x7b,%eax
ret

LLVM IR (-O0):
define i32 @__test() {
ret i32 123
}

LLVM IR (-O2):
define i32 @__test() {
ret i32 123
}
/* Variables and functions */
int /*<<< orphan*/ int80(int, int, int, int /*<<< orphan*/, int /*<<< orphan*/,
                         int /*<<< orphan*/);
void draw_pixel(int x, int y) { int80(8, x, y, 0, 0, 0); }


x86 assembly (clang, -O0):
<draw_pixel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    $0x8,%edi
xor    %r9d,%r9d
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <int80@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw_pixel>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0x8,%edi
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <int80@plt>

LLVM IR (-O0):
define void @draw_pixel(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @int80(i32 8, i32 %5, i32 %6, i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @draw_pixel(i32 %0, i32 %1) {
%3 = tail call i32 @int80(i32 8, i32 %0, i32 %1, i32 0, i32 0, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ triangles_in_the_term(int, int);
int main(void) {
  triangles_in_the_term(4, 1);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
mov    $0x1,%esi
call   1030 <triangles_in_the_term@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
mov    $0x1,%esi
call   1030 <triangles_in_the_term@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @triangles_in_the_term(i32 4, i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @triangles_in_the_term(i32 4, i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isxdigit(int);
void t_isxdigit_0xeb() {
  Assert_real((isxdigit(235) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isxdigit.c",
              1180, ("isxdigit should be 0 for 0xeb"));
}


x86 assembly (clang, -O0):
<t_isxdigit_0xeb>:
push   %rbp
mov    %rsp,%rbp
mov    $0xeb,%edi
call   1030 <isxdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x49c,%edx
lea    0xf5c(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isxdigit_0xeb>:
push   %rax
mov    $0xeb,%edi
call   1030 <isxdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x49c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xeb\00"
define void @t_isxdigit_0xeb() {
%1 = call i64 @isxdigit(i32 235)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1180, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isxdigit.c\00"
@.str.1 = [30 x i8] c"isxdigit should be 0 for 0xeb\00"
define void @t_isxdigit_0xeb() {
%1 = tail call i64 @isxdigit(i32 235)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1180, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int lexicographic_sort(char const *, char const *);
int strlen(char const *);
int sort_by_length(const char *a, const char *b) {
  int len = strlen(a) - strlen(b);
  return (len ? len : lexicographic_sort(a, b));
}


x86 assembly (clang, -O0):
<sort_by_length>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1164 <sort_by_length+0x44>
mov    -0x14(%rbp),%eax
mov    %eax,-0x1c(%rbp)
jmp    1174 <sort_by_length+0x54>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <lexicographic_sort@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort_by_length>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%ebp
mov    %r14,%rdi
call   1030 <strlen@plt>
sub    %eax,%ebp
je     1144 <sort_by_length+0x24>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret
mov    %rbx,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <lexicographic_sort@plt>

LLVM IR (-O0):
define i32 @sort_by_length(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = load i8*, i8** %4
%9 = call i32 @strlen(i8* %8)
%10 = sub nsw i32 %7, %9
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = load i32, i32* %5
br label %19
15: ; preds = %2
%16 = load i8*, i8** %3
%17 = load i8*, i8** %4
%18 = call i32 @lexicographic_sort(i8* %16, i8* %17)
br label %19
19: ; preds = %15, %13
%20 = phi i32 [ %14, %13 ], [ %18, %15 ]
ret i32 %20
}

LLVM IR (-O2):
define i32 @sort_by_length(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @strlen(i8* %1)
%5 = sub nsw i32 %3, %4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = tail call i32 @lexicographic_sort(i8* %0, i8* %1)
br label %9
9: ; preds = %2, %7
%10 = phi i32 [ %8, %7 ], [ %5, %2 ]
ret i32 %10
}
int test_imm_70int64_lowword_reg(long long val) {
  return ((val) & (0x70 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_70int64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x70,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_70int64_lowword_reg>:
test   $0x70,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_70int64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 112
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_70int64_lowword_reg(i64 %0) {
%2 = and i64 %0, 112
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
double rand_uniopen();
double tan(double);
double rand_cauchy(void) {
  return tan(3.14159265358979323846 * (rand_uniopen() - 0.5));
}


x86 assembly (clang, -O0):
<rand_cauchy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand_uniopen@plt>
movaps %xmm0,%xmm1
movsd  0xed2(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xebe(%rip),%xmm0
mulsd  %xmm1,%xmm0
call   1040 <tan@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_cauchy>:
push   %rax
xor    %eax,%eax
call   1030 <rand_uniopen@plt>
addsd  0xed0(%rip),%xmm0
mulsd  0xed0(%rip),%xmm0
pop    %rax
jmp    1040 <tan@plt>

LLVM IR (-O0):
define double @rand_cauchy() {
%1 = call double (...) @rand_uniopen()
%2 = fsub double %1, 5.000000e-01
%3 = fmul double 0x400921FB54442D18, %2
%4 = call double @tan(double %3)
ret double %4
}

LLVM IR (-O2):
define double @rand_cauchy() {
%1 = tail call double (...) @rand_uniopen()
%2 = fadd double %1, -5.000000e-01
%3 = fmul double %2, 0x400921FB54442D18
%4 = tail call double @tan(double %3)
ret double %4
}
/* Type definitions */
typedef size_t ssize_t;

/* Variables and functions */
ssize_t count_bytes_callback(const char *buf, size_t len, void *data) {
  long *bytes = (long *)data;
  *bytes += len;
  return len;
}


x86 assembly (clang, -O0):
<count_bytes_callback>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x20(%rbp),%rax
add    (%rax),%rcx
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_bytes_callback>:
mov    %rsi,%rax
add    %rsi,(%rdx)
ret

LLVM IR (-O0):
define i64 @count_bytes_callback(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i64*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%8 = load i8*, i8** %6
%9 = bitcast i8* %8 to i64*
store i64* %9, i64** %7
%10 = load i64, i64* %5
%11 = load i64*, i64** %7
%12 = load i64, i64* %11
%13 = add i64 %12, %10
store i64 %13, i64* %11
%14 = load i64, i64* %5
ret i64 %14
}

LLVM IR (-O2):
define i64 @count_bytes_callback(i8* nocapture readnone %0, i64 returned %1, i8* nocapture %2) {
%4 = bitcast i8* %2 to i64*
%5 = load i64, i64* %4
%6 = add i64 %5, %1
store i64 %6, i64* %4
ret i64 %1
}
double calc_veg_displacement(double height) {
  double value;
  value = 0.67 * height;
  return (value);
}


x86 assembly (clang, -O0):
<calc_veg_displacement>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_veg_displacement>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @calc_veg_displacement(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double 6.700000e-01, %4
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @calc_veg_displacement(double %0) {
%2 = fmul double %0, 6.700000e-01
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ __set_bit(int, unsigned long volatile *);
void set_bit(int nr, volatile unsigned long *addr) { __set_bit(nr, addr); }


x86 assembly (clang, -O0):
<set_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <__set_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit>:
jmp    1030 <__set_bit@plt>

LLVM IR (-O0):
define void @set_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i32, i32* %3
%6 = load i64*, i64** %4
%7 = call i32 @__set_bit(i32 %5, i64* %6)
ret void
}

LLVM IR (-O2):
define void @set_bit(i32 %0, i64* %1) {
%3 = tail call i32 @__set_bit(i32 %0, i64* %1)
ret void
}
int cobin(int n, int k) {
  if (n < k)
    return 0;
  if (k == 0)
    return 1;
  return cobin(n - 1, k - 1) + cobin(n - 1, k);
}


x86 assembly (clang, -O0):
<cobin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1136 <cobin+0x26>
movl   $0x0,-0x4(%rbp)
jmp    1178 <cobin+0x68>
cmpl   $0x0,-0xc(%rbp)
jne    114c <cobin+0x3c>
movl   $0x1,-0x4(%rbp)
jmp    1178 <cobin+0x68>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
call   1030 <cobin@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0xc(%rbp),%esi
call   1030 <cobin@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cobin>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
xor    %r14d,%r14d
cmp    %esi,%edi
jl     1169 <cobin+0x59>
mov    %esi,%r12d
mov    %edi,%ebp
lea    -0x1(%r12),%r15d
add    $0x1,%ebp
xor    %r14d,%r14d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
test   %r12d,%r12d
je     1161 <cobin+0x51>
lea    -0x2(%rbp),%edi
mov    %r15d,%esi
call   1030 <cobin@plt>
add    %eax,%ebx
add    $0xffffffff,%ebp
cmp    %r12d,%ebp
jg     1140 <cobin+0x30>
xor    %eax,%eax
mov    %ebx,%r14d
jmp    1166 <cobin+0x56>
mov    $0x1,%eax
add    %eax,%r14d
mov    %r14d,%eax
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @cobin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %25
10: ; preds = %2
%11 = load i32, i32* %5
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 1, i32* %3
br label %25
14: ; preds = %10
%15 = load i32, i32* %4
%16 = sub nsw i32 %15, 1
%17 = load i32, i32* %5
%18 = sub nsw i32 %17, 1
%19 = call i32 @cobin(i32 %16, i32 %18)
%20 = load i32, i32* %4
%21 = sub nsw i32 %20, 1
%22 = load i32, i32* %5
%23 = call i32 @cobin(i32 %21, i32 %22)
%24 = add nsw i32 %19, %23
store i32 %24, i32* %3
br label %25
25: ; preds = %14, %13, %9
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @cobin(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
br i1 %3, label %19, label %4
4: ; preds = %2
%5 = icmp eq i32 %1, 0
%6 = add nsw i32 %1, -1
br label %7
7: ; preds = %4, %10
%8 = phi i32 [ %0, %4 ], [ %11, %10 ]
%9 = phi i32 [ 0, %4 ], [ %13, %10 ]
br i1 %5, label %15, label %10
10: ; preds = %7
%11 = add nsw i32 %8, -1
%12 = tail call i32 @cobin(i32 %11, i32 %6)
%13 = add nsw i32 %12, %9
%14 = icmp sgt i32 %8, %1
br i1 %14, label %7, label %15
15: ; preds = %7, %10
%16 = phi i32 [ %13, %10 ], [ 0, %7 ]
%17 = phi i32 [ 0, %10 ], [ 1, %7 ]
%18 = add nsw i32 %17, %16
br label %19
19: ; preds = %15, %2
%20 = phi i32 [ %18, %15 ], [ 0, %2 ]
ret i32 %20
}
void CL_InitDynvars(void) {}


x86 assembly (clang, -O0):
<CL_InitDynvars>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CL_InitDynvars>:
ret

LLVM IR (-O0):
define void @CL_InitDynvars() {
ret void
}

LLVM IR (-O2):
define void @CL_InitDynvars() {
ret void
}
OP(dd, c7) {
  illegal_1();
  op_c7();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_c7@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_c7@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_c7()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_c7()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ db_send();
int main() { db_send(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <db_send@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <db_send@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @db_send()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @db_send()
ret i32 0
}
/* Variables and functions */
int _i2c_get(int);
int /*<<< orphan*/ usleep(int);
void _i2c_read(unsigned char *buf, int num) {
  int i;
  for (i = 0; i < num; i++) {
    *buf = _i2c_get(0x7d44) & 0xff;
    buf++;
    usleep(1000);
  }
}


x86 assembly (clang, -O0):
<_i2c_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    117d <_i2c_read+0x5d>
mov    $0x7d44,%edi
call   1030 <_i2c_get@plt>
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    $0x3e8,%edi
call   1040 <usleep@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1136 <_i2c_read+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_i2c_read>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1161 <_i2c_read+0x41>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x7d44,%edi
call   1030 <_i2c_get@plt>
mov    %al,(%r14,%rbx,1)
mov    $0x3e8,%edi
call   1040 <usleep@plt>
add    $0x1,%rbx
cmp    %ebx,%r15d
jne    1140 <_i2c_read+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @_i2c_read(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = call i32 @_i2c_get(i32 32068)
%12 = and i32 %11, 255
%13 = trunc i32 %12 to i8
%14 = load i8*, i8** %3
store i8 %13, i8* %14
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
%17 = call i32 @usleep(i32 1000)
br label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @_i2c_read(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ 0, %2 ]
%6 = phi i8* [ %9, %4 ], [ %0, %2 ]
%7 = tail call i32 @_i2c_get(i32 32068)
%8 = trunc i32 %7 to i8
store i8 %8, i8* %6
%9 = getelementptr inbounds i8, i8* %6, i64 1
%10 = tail call i32 @usleep(i32 1000)
%11 = add nuw nsw i32 %5, 1
%12 = icmp eq i32 %11, %1
br i1 %12, label %13, label %4
13: ; preds = %4, %2
ret void
}