#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int codegen_timing_has_displacement(uint32_t rmdat, int op_32) {
  if (op_32 & 0x200) {
    if ((rmdat & 7) == 4 && (rmdat & 0xc0) != 0xc0) {
      if ((rmdat & 0xc0) == 0x40 || (rmdat & 0xc0) == 0x80 ||
          (rmdat & 0x700) == 0x500)
        return 1;
    } else {
      if ((rmdat & 0xc0) == 0x40 || (rmdat & 0xc0) == 0x80 ||
          (rmdat & 0xc7) == 0x05)
        return 1;
    }
  } else {
    if ((rmdat & 0xc0) == 0x40 || (rmdat & 0xc0) == 0x80 ||
        (rmdat & 0xc7) == 0x06)
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<codegen_timing_has_displacement>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x200,%eax
cmp    $0x0,%eax
je     11d0 <codegen_timing_has_displacement+0xd0>
mov    -0x8(%rbp),%eax
and    $0x7,%eax
cmp    $0x4,%eax
jne    1185 <codegen_timing_has_displacement+0x85>
mov    -0x8(%rbp),%eax
and    $0xc0,%eax
cmp    $0xc0,%eax
je     1185 <codegen_timing_has_displacement+0x85>
mov    -0x8(%rbp),%eax
and    $0xc0,%eax
cmp    $0x40,%eax
je     1174 <codegen_timing_has_displacement+0x74>
mov    -0x8(%rbp),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
je     1174 <codegen_timing_has_displacement+0x74>
mov    -0x8(%rbp),%eax
and    $0x700,%eax
cmp    $0x500,%eax
jne    1180 <codegen_timing_has_displacement+0x80>
movl   $0x1,-0x4(%rbp)
jmp    121d <codegen_timing_has_displacement+0x11d>
jmp    11cb <codegen_timing_has_displacement+0xcb>
mov    -0x8(%rbp),%eax
and    $0xc0,%eax
cmp    $0x40,%eax
je     11ba <codegen_timing_has_displacement+0xba>
mov    -0x8(%rbp),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
je     11ba <codegen_timing_has_displacement+0xba>
mov    -0x8(%rbp),%eax
and    $0xc7,%eax
cmp    $0x5,%eax
jne    11c6 <codegen_timing_has_displacement+0xc6>
movl   $0x1,-0x4(%rbp)
jmp    121d <codegen_timing_has_displacement+0x11d>
jmp    11cb <codegen_timing_has_displacement+0xcb>
jmp    1216 <codegen_timing_has_displacement+0x116>
mov    -0x8(%rbp),%eax
and    $0xc0,%eax
cmp    $0x40,%eax
je     1205 <codegen_timing_has_displacement+0x105>
mov    -0x8(%rbp),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
je     1205 <codegen_timing_has_displacement+0x105>
mov    -0x8(%rbp),%eax
and    $0xc7,%eax
cmp    $0x6,%eax
jne    1211 <codegen_timing_has_displacement+0x111>
movl   $0x1,-0x4(%rbp)
jmp    121d <codegen_timing_has_displacement+0x11d>
jmp    1216 <codegen_timing_has_displacement+0x116>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<codegen_timing_has_displacement>:
test   $0x200,%esi
jne    1128 <codegen_timing_has_displacement+0x28>
mov    %edi,%ecx
and    $0xc0,%cl
mov    $0x1,%eax
cmp    $0x80,%cl
je     1127 <codegen_timing_has_displacement+0x27>
cmp    $0x40,%cl
je     1127 <codegen_timing_has_displacement+0x27>
and    $0xc7,%edi
cmp    $0x6,%edi
jne    117a <codegen_timing_has_displacement+0x7a>
ret
mov    %edi,%eax
and    $0x7,%eax
mov    %edi,%ecx
and    $0xc0,%cl
cmp    $0x4,%eax
jne    115b <codegen_timing_has_displacement+0x5b>
mov    $0x1,%eax
cmp    $0x80,%cl
je     1127 <codegen_timing_has_displacement+0x27>
cmp    $0xc0,%cl
je     116a <codegen_timing_has_displacement+0x6a>
cmp    $0x40,%cl
je     1127 <codegen_timing_has_displacement+0x27>
and    $0x700,%edi
cmp    $0x500,%edi
je     1127 <codegen_timing_has_displacement+0x27>
jmp    117a <codegen_timing_has_displacement+0x7a>
mov    $0x1,%eax
cmp    $0x80,%cl
je     1127 <codegen_timing_has_displacement+0x27>
cmp    $0x40,%cl
je     1127 <codegen_timing_has_displacement+0x27>
and    $0xc7,%edi
mov    $0x1,%eax
cmp    $0x5,%edi
je     1127 <codegen_timing_has_displacement+0x27>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @codegen_timing_has_displacement(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = and i32 %6, 512
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %46
9: ; preds = %2
%10 = load i32, i32* %4
%11 = and i32 %10, 7
%12 = icmp eq i32 %11, 4
br i1 %12, label %13, label %31
13: ; preds = %9
%14 = load i32, i32* %4
%15 = and i32 %14, 192
%16 = icmp ne i32 %15, 192
br i1 %16, label %17, label %31
17: ; preds = %13
%18 = load i32, i32* %4
%19 = and i32 %18, 192
%20 = icmp eq i32 %19, 64
br i1 %20, label %29, label %21
21: ; preds = %17
%22 = load i32, i32* %4
%23 = and i32 %22, 192
%24 = icmp eq i32 %23, 128
br i1 %24, label %29, label %25
25: ; preds = %21
%26 = load i32, i32* %4
%27 = and i32 %26, 1792
%28 = icmp eq i32 %27, 1280
br i1 %28, label %29, label %30
29: ; preds = %25, %21, %17
store i32 1, i32* %3
br label %61
30: ; preds = %25
br label %45
31: ; preds = %13, %9
%32 = load i32, i32* %4
%33 = and i32 %32, 192
%34 = icmp eq i32 %33, 64
br i1 %34, label %43, label %35
35: ; preds = %31
%36 = load i32, i32* %4
%37 = and i32 %36, 192
%38 = icmp eq i32 %37, 128
br i1 %38, label %43, label %39
39: ; preds = %35
%40 = load i32, i32* %4
%41 = and i32 %40, 199
%42 = icmp eq i32 %41, 5
br i1 %42, label %43, label %44
43: ; preds = %39, %35, %31
store i32 1, i32* %3
br label %61
44: ; preds = %39
br label %45
45: ; preds = %44, %30
br label %60
46: ; preds = %2
%47 = load i32, i32* %4
%48 = and i32 %47, 192
%49 = icmp eq i32 %48, 64
br i1 %49, label %58, label %50
50: ; preds = %46
%51 = load i32, i32* %4
%52 = and i32 %51, 192
%53 = icmp eq i32 %52, 128
br i1 %53, label %58, label %54
54: ; preds = %50
%55 = load i32, i32* %4
%56 = and i32 %55, 199
%57 = icmp eq i32 %56, 6
br i1 %57, label %58, label %59
58: ; preds = %54, %50, %46
store i32 1, i32* %3
br label %61
59: ; preds = %54
br label %60
60: ; preds = %59, %45
store i32 0, i32* %3
br label %61
61: ; preds = %60, %58, %43, %29
%62 = load i32, i32* %3
ret i32 %62
}

LLVM IR (-O2):
define i32 @codegen_timing_has_displacement(i32 %0, i32 %1) {
%3 = and i32 %1, 512
%4 = icmp eq i32 %3, 0
br i1 %4, label %18, label %5
5: ; preds = %2
%6 = and i32 %0, 7
%7 = icmp eq i32 %6, 4
%8 = trunc i32 %0 to i8
%9 = and i8 %8, -64
br i1 %7, label %10, label %14
10: ; preds = %5
switch i8 %9, label %11 [
i8 -64, label %15
i8 64, label %25
i8 -128, label %25
]
11: ; preds = %10
%12 = and i32 %0, 1792
%13 = icmp eq i32 %12, 1280
br i1 %13, label %25, label %24
14: ; preds = %5
switch i8 %9, label %15 [
i8 64, label %25
i8 -128, label %25
]
15: ; preds = %10, %14
%16 = and i32 %0, 199
%17 = icmp eq i32 %16, 5
br i1 %17, label %25, label %24
18: ; preds = %2
%19 = trunc i32 %0 to i8
%20 = and i8 %19, -64
switch i8 %20, label %21 [
i8 64, label %25
i8 -128, label %25
]
21: ; preds = %18
%22 = and i32 %0, 199
%23 = icmp eq i32 %22, 6
br i1 %23, label %25, label %24
24: ; preds = %21, %11, %15
br label %25
25: ; preds = %21, %18, %18, %15, %14, %14, %11, %10, %10, %24
%26 = phi i32 [ 0, %24 ], [ 1, %10 ], [ 1, %10 ], [ 1, %11 ], [ 1, %14 ], [ 1, %14 ], [ 1, %15 ], [ 1, %18 ], [ 1, %18 ], [ 1, %21 ]
ret i32 %26
}