xunge/DecIR huggingface dataset:
/* Variables and functions */
int open(char *, int, int);
int /*<<< orphan*/ syssuerr(char *, char *);
int eopen(char *path, int flags, int perms) {
  int fd;
  if (-1 == (fd = open(path, flags, perms)))
    syssuerr("%s: eopen: open failed",
             "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
             "2022-01-22/02-19-57/repos/TobbeTripitaka/src/refs/heads/master/"
             "trip/iwave/sucore/src/syscalls.c");
  return fd;
}


x86 assembly (clang, -O0):
<eopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1040 <open@plt>
mov    %eax,%ecx
mov    %ecx,-0x14(%rbp)
mov    $0xffffffff,%eax
cmp    %ecx,%eax
jne    1166 <eopen+0x46>
lea    0xea6(%rip),%rdi
lea    0xeb6(%rip),%rsi
call   1030 <syssuerr@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eopen>:
push   %rbx
call   1040 <open@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
jne    1140 <eopen+0x20>
lea    0xecc(%rip),%rdi
lea    0xedc(%rip),%rsi
call   1030 <syssuerr@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"%s: eopen: open failed\00"
@.str.1 = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/TobbeTripitaka/src/refs/heads/master/trip/iwave/sucore/src/syscalls.c\00"
define i32 @eopen(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @open(i8* %8, i32 %9, i32 %10)
store i32 %11, i32* %7
%12 = icmp eq i32 -1, %11
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = call i32 @syssuerr(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str.1, i64 0, i64 0))
br label %15
15: ; preds = %13, %3
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
@.str = [23 x i8] c"%s: eopen: open failed\00"
@.str.1 = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/TobbeTripitaka/src/refs/heads/master/trip/iwave/sucore/src/syscalls.c\00"
define i32 @eopen(i8* nocapture %0, i32 %1, i32 %2) {
%4 = tail call i32 @open(i8* %0, i32 %1, i32 %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @syssuerr(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %3
ret i32 %4
}
/* Variables and functions */
scalar_t__ __builtin_y0f(float);
int /*<<< orphan*/ link_failure_builtin_y0f();
void test_builtin_y0f(float f) {
  if (__builtin_y0f(f) != __builtin_y0f(f))
    link_failure_builtin_y0f();
}


x86 assembly (clang, -O0):
<test_builtin_y0f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__builtin_y0f@plt>
mov    %rax,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__builtin_y0f@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_builtin_y0f+0x3c>
mov    $0x0,%al
call   1040 <link_failure_builtin_y0f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_builtin_y0f>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm0,0xc(%rsp)
call   1030 <__builtin_y0f@plt>
mov    %rax,%rbx
movss  0xc(%rsp),%xmm0
call   1030 <__builtin_y0f@plt>
cmp    %rax,%rbx
jne    1149 <test_builtin_y0f+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <link_failure_builtin_y0f@plt>

LLVM IR (-O0):
define void @test_builtin_y0f(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @__builtin_y0f(float %3)
%5 = load float, float* %2
%6 = call i64 @__builtin_y0f(float %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_builtin_y0f()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_builtin_y0f(float %0) {
%2 = tail call i64 @__builtin_y0f(float %0)
%3 = tail call i64 @__builtin_y0f(float %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_builtin_y0f()
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _hmt_register_covercase(char *, char *);
void _hmt_covercase_HMM_Quaternion_init(void) {
  _hmt_register_covercase("HMM_Quaternion", "1");
}


x86 assembly (clang, -O0):
<_hmt_covercase_HMM_Quaternion_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeed(%rip),%rsi
call   1030 <_hmt_register_covercase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hmt_covercase_HMM_Quaternion_init>:
lea    0xee9(%rip),%rdi
lea    0xef1(%rip),%rsi
jmp    1030 <_hmt_register_covercase@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"HMM_Quaternion\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_Quaternion_init() {
%1 = call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"HMM_Quaternion\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_Quaternion_init() {
%1 = tail call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void setst(bits, chars) unsigned short bits;
char *chars;
{}


x86 assembly (clang, -O0):
<setst>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setst>:
ret

LLVM IR (-O0):
define void @setst(i32 %0, i8* %1) {
%3 = alloca i16
%4 = alloca i8*
%5 = trunc i32 %0 to i16
store i16 %5, i16* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @setst(i32 %0, i8* nocapture %1) {
ret void
}
void _Read_enc_ptr(void) {}


x86 assembly (clang, -O0):
<_Read_enc_ptr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Read_enc_ptr>:
ret

LLVM IR (-O0):
define void @_Read_enc_ptr() {
ret void
}

LLVM IR (-O2):
define void @_Read_enc_ptr() {
ret void
}
int comp(void *a, void *b) { return *((int *)a) - *((int *)b); }


x86 assembly (clang, -O0):
<comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @comp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @comp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
void gdk_keyval_to_unicode() {}


x86 assembly (clang, -O0):
<gdk_keyval_to_unicode>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_keyval_to_unicode>:
ret

LLVM IR (-O0):
define void @gdk_keyval_to_unicode() {
ret void
}

LLVM IR (-O2):
define void @gdk_keyval_to_unicode() {
ret void
}
/* Variables and functions */
int FechaPorta();
int Bematech_FI_FechaPorta() { return FechaPorta(); }


x86 assembly (clang, -O0):
<Bematech_FI_FechaPorta>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FechaPorta@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bematech_FI_FechaPorta>:
xor    %eax,%eax
jmp    1030 <FechaPorta@plt>

LLVM IR (-O0):
define i32 @Bematech_FI_FechaPorta() {
%1 = call i32 (...) @FechaPorta()
ret i32 %1
}

LLVM IR (-O2):
define i32 @Bematech_FI_FechaPorta() {
%1 = tail call i32 (...) @FechaPorta()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int execvpe(const char *file, char *const argv[], char *const envp[]) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<execvpe>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ed1(%rip),%rax
mov    (%rax),%ecx
mov    0x2eb8(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execvpe>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @execvpe(i8* %0, i8** %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%7 = load i32, i32* @ENOSYS
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @execvpe(i8* nocapture readnone %0, i8** nocapture readnone %1, i8** nocapture readnone %2) {
%4 = load i32, i32* @ENOSYS
store i32 %4, i32* @errno
ret i32 -1
}
/* Variables and functions */
float blendColorBurn(float, float);
float blendColorDodge(float, float);
float blendVividLight(float base, float blend) {
  return (blend < 0.5f) ? blendColorBurn(base, (2.0f * blend))
                        : blendColorDodge(base, (2.0f * (blend - 0.5f)));
}


x86 assembly (clang, -O0):
<blendVividLight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  0xec6(%rip),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    1165 <blendVividLight+0x45>
movss  -0x4(%rbp),%xmm0
movss  0xeb3(%rip),%xmm1
mulss  -0x8(%rbp),%xmm1
call   1040 <blendColorBurn@plt>
movss  %xmm0,-0xc(%rbp)
jmp    1191 <blendVividLight+0x71>
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm2
movss  0xe89(%rip),%xmm1
subss  %xmm1,%xmm2
movss  0xe81(%rip),%xmm1
mulss  %xmm2,%xmm1
call   1030 <blendColorDodge@plt>
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blendVividLight>:
movss  0xed8(%rip),%xmm2
ucomiss %xmm1,%xmm2
jbe    1136 <blendVividLight+0x16>
addss  %xmm1,%xmm1
jmp    1040 <blendColorBurn@plt>
addss  0xec6(%rip),%xmm1
addss  %xmm1,%xmm1
jmp    1030 <blendColorDodge@plt>

LLVM IR (-O0):
define float @blendVividLight(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %4
%6 = fcmp olt float %5, 5.000000e-01
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load float, float* %3
%9 = load float, float* %4
%10 = fmul float 2.000000e+00, %9
%11 = call float @blendColorBurn(float %8, float %10)
br label %18
12: ; preds = %2
%13 = load float, float* %3
%14 = load float, float* %4
%15 = fsub float %14, 5.000000e-01
%16 = fmul float 2.000000e+00, %15
%17 = call float @blendColorDodge(float %13, float %16)
br label %18
18: ; preds = %12, %7
%19 = phi float [ %11, %7 ], [ %17, %12 ]
ret float %19
}

LLVM IR (-O2):
define float @blendVividLight(float %0, float %1) {
%3 = fcmp olt float %1, 5.000000e-01
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = fmul float %1, 2.000000e+00
%6 = tail call float @blendColorBurn(float %0, float %5)
br label %11
7: ; preds = %2
%8 = fadd float %1, -5.000000e-01
%9 = fmul float %8, 2.000000e+00
%10 = tail call float @blendColorDodge(float %0, float %9)
br label %11
11: ; preds = %7, %4
%12 = phi float [ %6, %4 ], [ %10, %7 ]
ret float %12
}
void INT_Excep_S12AD_ADI12_0(void) {}


x86 assembly (clang, -O0):
<INT_Excep_S12AD_ADI12_0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_S12AD_ADI12_0>:
ret

LLVM IR (-O0):
define void @INT_Excep_S12AD_ADI12_0() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_S12AD_ADI12_0() {
ret void
}
int null_get_volume(void) { return 0; }


x86 assembly (clang, -O0):
<null_get_volume>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_get_volume>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @null_get_volume() {
ret i32 0
}

LLVM IR (-O2):
define i32 @null_get_volume() {
ret i32 0
}
/* Variables and functions */
scalar_t__ strcmp(void const *, void const *);
int ht_compare_string(const void *a, const void *b) {
  return strcmp(a, b) == 0;
}


x86 assembly (clang, -O0):
<ht_compare_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ht_compare_string>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ht_compare_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @strcmp(i8* %5, i8* %6)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @ht_compare_string(i8* %0, i8* %1) {
%3 = tail call i64 @strcmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void jr(uint32_t *pc, uint32_t reg1) { *pc = reg1; }


x86 assembly (clang, -O0):
<jr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<jr>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @jr(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @jr(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGALRM;
int /*<<< orphan*/ sig_block(int /*<<< orphan*/);
void sig_alarmblock() { sig_block(SIGALRM); }


x86 assembly (clang, -O0):
<sig_alarmblock>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <sig_block@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_alarmblock>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <sig_block@plt>

LLVM IR (-O0):
@SIGALRM = global i32 0
define void @sig_alarmblock() {
%1 = load i32, i32* @SIGALRM
%2 = call i32 @sig_block(i32 %1)
ret void
}

LLVM IR (-O2):
@SIGALRM = global i32 0
define void @sig_alarmblock() {
%1 = load i32, i32* @SIGALRM
%2 = tail call i32 @sig_block(i32 %1)
ret void
}
/* Variables and functions */
int errno;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ printf(char *, int);
void diep(char *s) {
  printf("errono: %d", errno);
  perror(s);
  exit(1);
}


x86 assembly (clang, -O0):
<diep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<diep>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ea5(%rip),%rax
mov    (%rax),%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"errono: %d\00"
@errno = global i32 0
define void @diep(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @errno
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i8*, i8** %2
%6 = call i32 @perror(i8* %5)
%7 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [11 x i8] c"errono: %d\00"
@errno = global i32 0
define void @diep(i8* nocapture %0) {
%2 = load i32, i32* @errno
%3 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = tail call i32 @perror(i8* %0)
%5 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
double tensor_dot(double const *, double *, unsigned int);
int /*<<< orphan*/ tensor_mtxv(double *, unsigned int, double const *,
                               double const *, unsigned int);
double tensor_i2(const double *Jr, unsigned int nr, const double *Js,
                 unsigned int ns, const double *u, double *work) {
  tensor_mtxv(work, ns, u, Jr, nr);
  return tensor_dot(Js, work, ns);
}


x86 assembly (clang, -O0):
<tensor_i2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x30(%rbp),%rdi
mov    -0x1c(%rbp),%esi
mov    -0x28(%rbp),%rdx
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%r8d
call   1040 <tensor_mtxv@plt>
mov    -0x18(%rbp),%rdi
mov    -0x30(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <tensor_dot@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tensor_i2>:
push   %rbp
push   %r14
push   %rbx
mov    %r9,%rbx
mov    %ecx,%ebp
mov    %rdx,%r14
mov    %esi,%eax
mov    %rdi,%rcx
mov    %r9,%rdi
mov    %ebp,%esi
mov    %r8,%rdx
mov    %eax,%r8d
call   1040 <tensor_mtxv@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %ebp,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <tensor_dot@plt>

LLVM IR (-O0):
define double @tensor_i2(double* %0, i32 %1, double* %2, i32 %3, double* %4, double* %5) {
%7 = alloca double*
%8 = alloca i32
%9 = alloca double*
%10 = alloca i32
%11 = alloca double*
%12 = alloca double*
store double* %0, double** %7
store i32 %1, i32* %8
store double* %2, double** %9
store i32 %3, i32* %10
store double* %4, double** %11
store double* %5, double** %12
%13 = load double*, double** %12
%14 = load i32, i32* %10
%15 = load double*, double** %11
%16 = load double*, double** %7
%17 = load i32, i32* %8
%18 = call i32 @tensor_mtxv(double* %13, i32 %14, double* %15, double* %16, i32 %17)
%19 = load double*, double** %9
%20 = load double*, double** %12
%21 = load i32, i32* %10
%22 = call double @tensor_dot(double* %19, double* %20, i32 %21)
ret double %22
}

LLVM IR (-O2):
define double @tensor_i2(double* %0, i32 %1, double* %2, i32 %3, double* %4, double* %5) {
%7 = tail call i32 @tensor_mtxv(double* %5, i32 %3, double* %4, double* %0, i32 %1)
%8 = tail call double @tensor_dot(double* %2, double* %5, i32 %3)
ret double %8
}
/* Type definitions */
struct type_def_cell {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int type_def_cell_size(struct type_def_cell *self) {
  assert(0);
  return 0;
}


x86 assembly (clang, -O0):
<type_def_cell_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<type_def_cell_size>:
push   %rax
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.type_def_cell = type { i32 }
define i32 @type_def_cell_size(%struct.type_def_cell* %0) {
%2 = alloca %struct.type_def_cell*
store %struct.type_def_cell* %0, %struct.type_def_cell** %2
%3 = call i32 @assert(i32 0)
ret i32 0
}

LLVM IR (-O2):
%struct.type_def_cell = type { i32 }
define i32 @type_def_cell_size(%struct.type_def_cell* nocapture readnone %0) {
%2 = tail call i32 @assert(i32 0)
ret i32 0
}
unsigned int bitsPerWord(void) {
  return ((sizeof(long)) > (sizeof(int)) ? (sizeof(long)) : (sizeof(int))) * 8;
}


x86 assembly (clang, -O0):
<bitsPerWord>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitsPerWord>:
mov    $0x40,%eax
ret

LLVM IR (-O0):
define i32 @bitsPerWord() {
ret i32 64
}

LLVM IR (-O2):
define i32 @bitsPerWord() {
ret i32 64
}
/* Variables and functions */
void Reserved_Handler23(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<Reserved_Handler23>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <Reserved_Handler23+0x9>
jmp    1109 <Reserved_Handler23+0x9>

x86 assembly (clang, -O2):
<Reserved_Handler23>:
jmp    1100 <Reserved_Handler23>

LLVM IR (-O0):
define void @Reserved_Handler23() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @Reserved_Handler23() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ strltrim(char *);
int main() {
  char str[] = "  123     ";
  strltrim(str);
  printf("[%s]\n", str);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0xf(%rbp)
mov    0xec7(%rip),%ax
mov    %ax,-0x7(%rbp)
mov    0xebf(%rip),%al
mov    %al,-0x5(%rbp)
lea    -0xf(%rbp),%rdi
call   1040 <strltrim@plt>
lea    -0xf(%rbp),%rsi
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movabs $0x2020203332312020,%rax
20 20 20
mov    %rax,(%rsp)
movl   $0x202020,0x7(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <strltrim@plt>
lea    0xebe(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.str = [11 x i8] c" 123 \00"
@.str = [6 x i8] c"[%s]\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [11 x i8]
store i32 0, i32* %1
%3 = bitcast [11 x i8]* %2 to i8*
%4 = getelementptr inbounds [11 x i8], [11 x i8]* %2, i64 0, i64 0
%5 = call i32 @strltrim(i8* %4)
%6 = getelementptr inbounds [11 x i8], [11 x i8]* %2, i64 0, i64 0
%7 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %6)
ret i32 0
}

LLVM IR (-O2):
@__const.main.str = [11 x i8] c" 123 \00"
@.str = [6 x i8] c"[%s]\0A\00"
define i32 @main() {
%1 = alloca [11 x i8]
%2 = getelementptr inbounds [11 x i8], [11 x i8]* %1, i64 0, i64 0
%3 = call i32 @strltrim(i8* %2)
%4 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}
/* Variables and functions */
size_t strlen(const char *s) {
  size_t r = 0;
  while (*s) {
    r++;
    s++;
  }
  return r;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     113a <strlen+0x3a>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
cmpb   $0x0,(%rdi)
je     111f <strlen+0x1f>
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
lea    0x1(%rcx),%rax
cmpb   $0x0,0x1(%rdi,%rcx,1)
mov    %rax,%rcx
jne    1110 <strlen+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = load i64, i64* %3
%10 = add i64 %9, 1
store i64 %10, i64* %3
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %4
13: ; preds = %4
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = add i64 %5, 1
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i64 [ 0, %1 ], [ %7, %4 ]
ret i64 %12
}
unsigned long sps_dma_get_bam_handle(void) { return 0; }


x86 assembly (clang, -O0):
<sps_dma_get_bam_handle>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sps_dma_get_bam_handle>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @sps_dma_get_bam_handle() {
ret i64 0
}

LLVM IR (-O2):
define i64 @sps_dma_get_bam_handle() {
ret i64 0
}
void *test_anti_range_104(long n) {
  extern void *alloc_anti_range_104(long) __attribute__((alloc_size(1)));
  if (0 <= n && n <= 2)
    n = 0 - 1;
  return alloc_anti_range_104(n);
}


x86 assembly (clang, -O0):
<test_anti_range_104>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
jg     113b <test_anti_range_104+0x2b>
cmpq   $0x2,-0x8(%rbp)
jg     113b <test_anti_range_104+0x2b>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
mov    -0x8(%rbp),%rdi
call   1030 <alloc_anti_range_104@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_104>:
cmp    $0x3,%rdi
mov    $0xffffffffffffffff,%rax
cmovb  %rax,%rdi
jmp    1030 <alloc_anti_range_104@plt>

LLVM IR (-O0):
define i8* @test_anti_range_104(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp sle i64 0, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp sle i64 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %5
store i64 -1, i64* %2
br label %9
9: ; preds = %8, %5, %1
%10 = load i64, i64* %2
%11 = call i8* @alloc_anti_range_104(i64 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @test_anti_range_104(i64 %0) {
%2 = icmp ult i64 %0, 3
%3 = select i1 %2, i64 -1, i64 %0
%4 = tail call i8* @alloc_anti_range_104(i64 %3)
ret i8* %4
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_getppid;
int /*<<< orphan*/ syscall_0(int /*<<< orphan*/);
pid_t getppid(void) {
  pid_t ret;
  ret = syscall_0(SYS_getppid);
  return ret;
}


x86 assembly (clang, -O0):
<getppid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
call   1030 <syscall_0@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getppid>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall_0@plt>

LLVM IR (-O0):
@SYS_getppid = global i32 0
define i32 @getppid() {
%1 = alloca i32
%2 = load i32, i32* @SYS_getppid
%3 = call i32 @syscall_0(i32 %2)
store i32 %3, i32* %1
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@SYS_getppid = global i32 0
define i32 @getppid() {
%1 = load i32, i32* @SYS_getppid
%2 = tail call i32 @syscall_0(i32 %1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void write_half(int fd, short half) {
  int i;
  char temp;
  for (i = 0; i < 2; i++) {
    temp = (half >> (i * 8)) & 0xFF;
    write(fd, &temp, sizeof(char));
  }
}


x86 assembly (clang, -O0):
<write_half>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x2,-0xc(%rbp)
jge    1166 <write_half+0x56>
movswl -0x6(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x3,%ecx
sar    %cl,%eax
and    $0xff,%eax
mov    %al,-0xd(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xd(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1129 <write_half+0x19>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_half>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ebx
mov    %edi,%ebp
mov    %bl,0xf(%rsp)
lea    0xf(%rsp),%r14
mov    %r14,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
mov    %bh,0xf(%rsp)
mov    %ebp,%edi
mov    %r14,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @write_half(i32 %0, i16 signext %1) {
%3 = alloca i32
%4 = alloca i16
%5 = alloca i32
%6 = alloca i8
store i32 %0, i32* %3
store i16 %1, i16* %4
store i32 0, i32* %5
br label %7
7: ; preds = %20, %2
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 2
br i1 %9, label %10, label %23
10: ; preds = %7
%11 = load i16, i16* %4
%12 = sext i16 %11 to i32
%13 = load i32, i32* %5
%14 = mul nsw i32 %13, 8
%15 = ashr i32 %12, %14
%16 = and i32 %15, 255
%17 = trunc i32 %16 to i8
store i8 %17, i8* %6
%18 = load i32, i32* %3
%19 = call i32 @write(i32 %18, i8* %6, i32 1)
br label %20
20: ; preds = %10
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %7
23: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @write_half(i32 %0, i16 signext %1) {
%3 = alloca i8
%4 = trunc i16 %1 to i8
store i8 %4, i8* %3
%5 = call i32 @write(i32 %0, i8* %3, i32 1)
%6 = lshr i16 %1, 8
%7 = trunc i16 %6 to i8
store i8 %7, i8* %3
%8 = call i32 @write(i32 %0, i8* %3, i32 1)
ret void
}
unsigned int get_figure(int fig, int angle) {
  static const unsigned short c_figures[] = {
      0x0156, 0x1458, 0x0156, 0x1458, 0x1245, 0x0459, 0x1245,
      0x0459, 0x2456, 0x159A, 0x0124, 0x0159, 0x0126, 0x1589,
      0x0456, 0x1259, 0x1459, 0x1456, 0x1569, 0x0125, 0x4567,
      0x159d, 0x4567, 0x159d, 0x1256, 0x1256, 0x1256, 0x1256};
  return c_figures[fig * 4 + (angle & 3)];
}


x86 assembly (clang, -O0):
<get_figure>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
mov    -0x8(%rbp),%ecx
and    $0x3,%ecx
add    %ecx,%eax
movslq %eax,%rcx
lea    0xede(%rip),%rax
movzwl (%rax,%rcx,2),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_figure>:
and    $0x3,%esi
lea    (%rsi,%rdi,4),%eax
cltq
lea    0xef1(%rip),%rcx
movzwl (%rcx,%rax,2),%eax
ret

LLVM IR (-O0):
@get_figure.c_figures = internal constant [28 x i16] [i16 342, i16 5208, i16 342, i16 5208, i16 4677, i16 1113, i16 4677, i16 1113, i16 9302, i16 5530, i16 292, i16 345, i16 294, i16 5513, i16 1110, i16 4697, i16 5209, i16 5206, i16 5481, i16 293, i16 17767, i16 5533, i16 17767, i16 5533, i16 4694, i16 4694, i16 4694, i16 4694]
define i32 @get_figure(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = mul nsw i32 %5, 4
%7 = load i32, i32* %4
%8 = and i32 %7, 3
%9 = add nsw i32 %6, %8
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [28 x i16], [28 x i16]* @get_figure.c_figures, i64 0, i64 %10
%12 = load i16, i16* %11
%13 = zext i16 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
@get_figure.c_figures = internal unnamed_addr constant [28 x i16] [i16 342, i16 5208, i16 342, i16 5208, i16 4677, i16 1113, i16 4677, i16 1113, i16 9302, i16 5530, i16 292, i16 345, i16 294, i16 5513, i16 1110, i16 4697, i16 5209, i16 5206, i16 5481, i16 293, i16 17767, i16 5533, i16 17767, i16 5533, i16 4694, i16 4694, i16 4694, i16 4694]
define i32 @get_figure(i32 %0, i32 %1) {
%3 = shl nsw i32 %0, 2
%4 = and i32 %1, 3
%5 = or i32 %4, %3
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds [28 x i16], [28 x i16]* @get_figure.c_figures, i64 0, i64 %6
%8 = load i16, i16* %7
%9 = zext i16 %8 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ cgdiv();
scalar_t__ cgload();
int /*<<< orphan*/ cgswap();
int /*<<< orphan*/ gentext();
void gendiv(int swapped) {
  gentext();
  if (cgload() || !swapped)
    cgswap();
  cgdiv();
}


x86 assembly (clang, -O0):
<gendiv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1050 <gentext@plt>
mov    $0x0,%al
call   1040 <cgload@plt>
cmp    $0x0,%rax
jne    116d <gendiv+0x2d>
cmpl   $0x0,-0x4(%rbp)
jne    1174 <gendiv+0x34>
mov    $0x0,%al
call   1030 <cgswap@plt>
mov    $0x0,%al
call   1060 <cgdiv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gendiv>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1050 <gentext@plt>
xor    %eax,%eax
call   1040 <cgload@plt>
test   %ebx,%ebx
je     115a <gendiv+0x1a>
test   %rax,%rax
je     1161 <gendiv+0x21>
xor    %eax,%eax
call   1030 <cgswap@plt>
xor    %eax,%eax
pop    %rbx
jmp    1060 <cgdiv@plt>

LLVM IR (-O0):
define void @gendiv(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @gentext()
%4 = call i64 (...) @cgload()
%5 = icmp ne i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %6, %1
%10 = call i32 (...) @cgswap()
br label %11
11: ; preds = %9, %6
%12 = call i32 (...) @cgdiv()
ret void
}

LLVM IR (-O2):
define void @gendiv(i32 %0) {
%2 = tail call i32 (...) @gentext()
%3 = tail call i64 (...) @cgload()
%4 = icmp eq i64 %3, 0
%5 = icmp ne i32 %0, 0
%6 = and i1 %5, %4
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 (...) @cgswap()
br label %9
9: ; preds = %1, %7
%10 = tail call i32 (...) @cgdiv()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ call6d(long, float, double, unsigned char, unsigned short,
                          unsigned int, unsigned long);
void call6c(int i, long l, float f, double d, unsigned char uc,
            unsigned short us, unsigned int ui, unsigned long ul) {
  i = i;
  call6d(l, f, d, uc, us, ui, ul);
}


x86 assembly (clang, -O0):
<call6c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %cx,%ax
mov    %dl,%cl
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
movsd  %xmm1,-0x20(%rbp)
mov    %cl,-0x21(%rbp)
mov    %ax,-0x24(%rbp)
mov    %r8d,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rdi
movss  -0x14(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
mov    -0x21(%rbp),%dl
mov    -0x24(%rbp),%ax
mov    -0x28(%rbp),%ecx
mov    -0x30(%rbp),%r8
movzbl %dl,%esi
movzwl %ax,%edx
call   1030 <call6d@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call6c>:
mov    %rsi,%rdi
mov    %edx,%esi
mov    %ecx,%edx
mov    %r8d,%ecx
mov    %r9,%r8
jmp    1030 <call6d@plt>

LLVM IR (-O0):
define void @call6c(i32 %0, i64 %1, float %2, double %3, i8 zeroext %4, i16 zeroext %5, i32 %6, i64 %7) {
%9 = alloca i32
%10 = alloca i64
%11 = alloca float
%12 = alloca double
%13 = alloca i8
%14 = alloca i16
%15 = alloca i32
%16 = alloca i64
store i32 %0, i32* %9
store i64 %1, i64* %10
store float %2, float* %11
store double %3, double* %12
store i8 %4, i8* %13
store i16 %5, i16* %14
store i32 %6, i32* %15
store i64 %7, i64* %16
%17 = load i32, i32* %9
store i32 %17, i32* %9
%18 = load i64, i64* %10
%19 = load float, float* %11
%20 = load double, double* %12
%21 = load i8, i8* %13
%22 = load i16, i16* %14
%23 = load i32, i32* %15
%24 = load i64, i64* %16
%25 = call i32 @call6d(i64 %18, float %19, double %20, i8 zeroext %21, i16 zeroext %22, i32 %23, i64 %24)
ret void
}

LLVM IR (-O2):
define void @call6c(i32 %0, i64 %1, float %2, double %3, i8 zeroext %4, i16 zeroext %5, i32 %6, i64 %7) {
%9 = tail call i32 @call6d(i64 %1, float %2, double %3, i8 zeroext %4, i16 zeroext %5, i32 %6, i64 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int tst1(void *param) {
  printf("Task 1: %s\n", (char *)param);
  return (0);
}


x86 assembly (clang, -O0):
<tst1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tst1>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Task 1: %s\0A\00"
define i32 @tst1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"Task 1: %s\0A\00"
define i32 @tst1(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t get_uint32(unsigned char *buf, int start) {
  return (uint32_t)buf[start] << 24 | (uint32_t)buf[start + 1] << 16 |
         (uint32_t)buf[start + 2] << 8 | (uint32_t)buf[start + 3];
}


x86 assembly (clang, -O0):
<get_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%edx
add    $0x1,%edx
movslq %edx,%rdx
movzbl (%rcx,%rdx,1),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%edx
add    $0x2,%edx
movslq %edx,%rdx
movzbl (%rcx,%rdx,1),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%edx
add    $0x3,%edx
movslq %edx,%rdx
movzbl (%rcx,%rdx,1),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_uint32>:
movslq %esi,%rax
mov    (%rdi,%rax,1),%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @get_uint32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 24
%12 = load i8*, i8** %3
%13 = load i32, i32* %4
%14 = add nsw i32 %13, 1
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %12, i64 %15
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 16
%20 = or i32 %11, %19
%21 = load i8*, i8** %3
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 2
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i8, i8* %21, i64 %24
%26 = load i8, i8* %25
%27 = zext i8 %26 to i32
%28 = shl i32 %27, 8
%29 = or i32 %20, %28
%30 = load i8*, i8** %3
%31 = load i32, i32* %4
%32 = add nsw i32 %31, 3
%33 = sext i32 %32 to i64
%34 = getelementptr inbounds i8, i8* %30, i64 %33
%35 = load i8, i8* %34
%36 = zext i8 %35 to i32
%37 = or i32 %29, %36
ret i32 %37
}

LLVM IR (-O2):
define i32 @get_uint32(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl nuw i32 %6, 24
%8 = add nsw i32 %1, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = shl nuw nsw i32 %12, 16
%14 = or i32 %13, %7
%15 = add nsw i32 %1, 2
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %0, i64 %16
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = shl nuw nsw i32 %19, 8
%21 = or i32 %14, %20
%22 = add nsw i32 %1, 3
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %0, i64 %23
%25 = load i8, i8* %24
%26 = zext i8 %25 to i32
%27 = or i32 %21, %26
ret i32 %27
}
double foo(double f(void)) { return 2. * f(); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
call   *-0x8(%rbp)
movaps %xmm0,%xmm1
movsd  0xee6(%rip),%xmm0
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
call   *%rdi
addsd  %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @foo(double ()* %0) {
%2 = alloca double ()*
store double ()* %0, double ()** %2
%3 = load double ()*, double ()** %2
%4 = call double %3()
%5 = fmul double 2.000000e+00, %4
ret double %5
}

LLVM IR (-O2):
define double @foo(double ()* nocapture %0) {
%2 = tail call double %0()
%3 = fmul double %2, 2.000000e+00
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  int a = 1;
  unsigned short b = 2;
  assert(a + b == 3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movw   $0x2,-0xa(%rbp)
mov    -0x8(%rbp),%eax
movzwl -0xa(%rbp),%ecx
add    %ecx,%eax
cmp    $0x3,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i16
store i32 0, i32* %1
store i32 1, i32* %2
store i16 2, i16* %3
%4 = load i32, i32* %2
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = add nsw i32 %4, %6
%8 = icmp eq i32 %7, 3
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Type definitions */
struct feature_pair {
  int dummy;
};
struct CovariateAnalysis {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
void _emitJSONUniOffsetR(const struct feature_pair *pair,
                         const struct CovariateAnalysis *covan, FILE *fp) {}


x86 assembly (clang, -O0):
<_emitJSONUniOffsetR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_emitJSONUniOffsetR>:
ret

LLVM IR (-O0):
%struct.feature_pair = type { i32 }
%struct.CovariateAnalysis = type { i32 }
define void @_emitJSONUniOffsetR(%struct.feature_pair* %0, %struct.CovariateAnalysis* %1, i32* %2) {
%4 = alloca %struct.feature_pair*
%5 = alloca %struct.CovariateAnalysis*
%6 = alloca i32*
store %struct.feature_pair* %0, %struct.feature_pair** %4
store %struct.CovariateAnalysis* %1, %struct.CovariateAnalysis** %5
store i32* %2, i32** %6
ret void
}

LLVM IR (-O2):
%struct.feature_pair = type { i32 }
%struct.CovariateAnalysis = type { i32 }
define void @_emitJSONUniOffsetR(%struct.feature_pair* nocapture %0, %struct.CovariateAnalysis* nocapture %1, i32* nocapture %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0xcb() {
  Assert_real((isbdigit(203) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              1020, ("isbdigit should be 0 for 0xcb"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0xcb>:
push   %rbp
mov    %rsp,%rbp
mov    $0xcb,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3fc,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0xcb>:
push   %rax
mov    $0xcb,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x3fc,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xcb\00"
define void @t_isbdigit_0xcb() {
%1 = call i64 @isbdigit(i32 203)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1020, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xcb\00"
define void @t_isbdigit_0xcb() {
%1 = tail call i64 @isbdigit(i32 203)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1020, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mtx_t;
typedef int /*<<< orphan*/ cnd_t;

/* Variables and functions */
int thrd_error;
int cnd_wait(cnd_t *cond, mtx_t *mtx) { return thrd_error; }


x86 assembly (clang, -O0):
<cnd_wait>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cnd_wait>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@thrd_error = global i32 0
define i32 @cnd_wait(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32, i32* @thrd_error
ret i32 %5
}

LLVM IR (-O2):
@thrd_error = global i32 0
define i32 @cnd_wait(i32* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @thrd_error
ret i32 %3
}
int point(int s) { return (s >= 128 || s < 0); }


x86 assembly (clang, -O0):
<point>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x80,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jge    1123 <point+0x23>
cmpl   $0x0,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<point>:
xor    %eax,%eax
cmp    $0x7f,%edi
seta   %al
ret

LLVM IR (-O0):
define i32 @point(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 128
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 0
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @point(i32 %0) {
%2 = icmp ugt i32 %0, 127
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int foo();
int main() { return 5 - foo(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
mov    %eax,%ecx
mov    $0x5,%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
mov    $0x5,%ecx
sub    %eax,%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo()
%3 = sub nsw i32 5, %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo()
%2 = sub nsw i32 5, %1
ret i32 %2
}
void RTDirQueryInfo(void) {}


x86 assembly (clang, -O0):
<RTDirQueryInfo>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTDirQueryInfo>:
ret

LLVM IR (-O0):
define void @RTDirQueryInfo() {
ret void
}

LLVM IR (-O2):
define void @RTDirQueryInfo() {
ret void
}