xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ fib(int);
int main() {
  int i;
  int sum = 0;
  for (i = 0; i < 10; ++i) {
    sum += fib(i);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    115a <main+0x4a>
mov    -0x8(%rbp),%edi
call   1030 <fib@plt>
mov    %rax,%rcx
movslq -0xc(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <fib@plt>
mov    $0x1,%edi
call   1030 <fib@plt>
mov    $0x2,%edi
call   1030 <fib@plt>
mov    $0x3,%edi
call   1030 <fib@plt>
mov    $0x4,%edi
call   1030 <fib@plt>
mov    $0x5,%edi
call   1030 <fib@plt>
mov    $0x6,%edi
call   1030 <fib@plt>
mov    $0x7,%edi
call   1030 <fib@plt>
mov    $0x8,%edi
call   1030 <fib@plt>
mov    $0x9,%edi
call   1030 <fib@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
store i32 0, i32* %2
br label %4
4: ; preds = %14, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %2
%9 = call i64 @fib(i32 %8)
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = add nsw i64 %11, %9
%13 = trunc i64 %12 to i32
store i32 %13, i32* %3
br label %14
14: ; preds = %7
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %4
17: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @fib(i32 0)
%2 = tail call i64 @fib(i32 1)
%3 = tail call i64 @fib(i32 2)
%4 = tail call i64 @fib(i32 3)
%5 = tail call i64 @fib(i32 4)
%6 = tail call i64 @fib(i32 5)
%7 = tail call i64 @fib(i32 6)
%8 = tail call i64 @fib(i32 7)
%9 = tail call i64 @fib(i32 8)
%10 = tail call i64 @fib(i32 9)
ret i32 0
}
/* Variables and functions */
void *fixup_null_alloc(size_t);
void *realloc(void *, size_t);
void *xmalloc(size_t);
void *xrealloc(void *p, size_t n) {
  if (!p)
    return xmalloc(n);
  p = realloc(p, n);
  if (!p)
    p = fixup_null_alloc(n);
  return p;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115d <xrealloc+0x2d>
mov    -0x18(%rbp),%rdi
call   1040 <xmalloc@plt>
mov    %rax,-0x8(%rbp)
jmp    118e <xrealloc+0x5e>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1050 <realloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1186 <xrealloc+0x56>
mov    -0x18(%rbp),%rdi
call   1030 <fixup_null_alloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %rbx
mov    %rsi,%rbx
test   %rdi,%rdi
je     1148 <xrealloc+0x18>
mov    %rbx,%rsi
call   1050 <realloc@plt>
test   %rax,%rax
je     1151 <xrealloc+0x21>
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <xmalloc@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <fixup_null_alloc@plt>

LLVM IR (-O0):
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i64, i64* %5
%10 = call i8* @xmalloc(i64 %9)
store i8* %10, i8** %3
br label %22
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = load i64, i64* %5
%14 = call i8* @realloc(i8* %12, i64 %13)
store i8* %14, i8** %4
%15 = load i8*, i8** %4
%16 = icmp ne i8* %15, null
br i1 %16, label %20, label %17
17: ; preds = %11
%18 = load i64, i64* %5
%19 = call i8* @fixup_null_alloc(i64 %18)
store i8* %19, i8** %4
br label %20
20: ; preds = %17, %11
%21 = load i8*, i8** %4
store i8* %21, i8** %3
br label %22
22: ; preds = %20, %8
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i8* @xmalloc(i64 %1)
br label %11
6: ; preds = %2
%7 = tail call i8* @realloc(i8* %0, i64 %1)
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = tail call i8* @fixup_null_alloc(i64 %1)
br label %11
11: ; preds = %6, %9, %4
%12 = phi i8* [ %5, %4 ], [ %7, %6 ], [ %10, %9 ]
ret i8* %12
}
/* Variables and functions */
int /*<<< orphan*/ f(int, double, double, double);
int /*<<< orphan*/ g(char *, char *, double, double, int /*<<< orphan*/,
                     int /*<<< orphan*/);
void testTortureExecute(void) {
  g("", "", 1.0, 2.0, f(3, 0.0, 0.0, 0.0), f(4, 0.0, 0.0, 0.0));
  return;
}


x86 assembly (clang, -O0):
<testTortureExecute>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3,%edi
xorps  %xmm2,%xmm2
movaps %xmm2,%xmm0
movaps %xmm2,%xmm1
call   1030 <f@plt>
mov    %eax,-0x4(%rbp)
mov    $0x4,%edi
xorps  %xmm2,%xmm2
movaps %xmm2,%xmm0
movaps %xmm2,%xmm1
call   1030 <f@plt>
mov    -0x4(%rbp),%edx
mov    %eax,%ecx
lea    0xeb3(%rip),%rsi
movsd  0xe9b(%rip),%xmm0
movsd  0xe9b(%rip),%xmm1
mov    %rsi,%rdi
call   1040 <g@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testTortureExecute>:
push   %rbx
xorps  %xmm0,%xmm0
xorps  %xmm1,%xmm1
xorps  %xmm2,%xmm2
mov    $0x3,%edi
call   1030 <f@plt>
mov    %eax,%ebx
xorps  %xmm0,%xmm0
xorps  %xmm1,%xmm1
xorps  %xmm2,%xmm2
mov    $0x4,%edi
call   1030 <f@plt>
lea    0xec0(%rip),%rdi
movsd  0xea8(%rip),%xmm0
movsd  0xea8(%rip),%xmm1
mov    %rdi,%rsi
mov    %ebx,%edx
mov    %eax,%ecx
pop    %rbx
jmp    1040 <g@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @testTortureExecute() {
%1 = call i32 @f(i32 3, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00)
%2 = call i32 @f(i32 4, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00)
%3 = call i32 @g(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), double 1.000000e+00, double 2.000000e+00, i32 %1, i32 %2)
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define void @testTortureExecute() {
%1 = tail call i32 @f(i32 3, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00)
%2 = tail call i32 @f(i32 4, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00)
%3 = tail call i32 @g(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), double 1.000000e+00, double 2.000000e+00, i32 %1, i32 %2)
ret void
}
float toCelc(float f) { return (f - 32.0f) * 5.0f / 9.0f; }


x86 assembly (clang, -O0):
<toCelc>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xef2(%rip),%xmm1
subss  %xmm1,%xmm0
movss  0xee2(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xed2(%rip),%xmm1
divss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<toCelc>:
addss  0xef8(%rip),%xmm0
mulss  0xef4(%rip),%xmm0
divss  0xef0(%rip),%xmm0
ret

LLVM IR (-O0):
define float @toCelc(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fsub float %3, 3.200000e+01
%5 = fmul float %4, 5.000000e+00
%6 = fdiv float %5, 9.000000e+00
ret float %6
}

LLVM IR (-O2):
define float @toCelc(float %0) {
%2 = fadd float %0, -3.200000e+01
%3 = fmul float %2, 5.000000e+00
%4 = fdiv float %3, 9.000000e+00
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int, int);
void *svcAlloc(int, int);
void *allocIobuf() {
  void *ptr = svcAlloc(0xCAFF, 0x828);
  memset(ptr, 0x00, 0x828);
  return ptr;
}


x86 assembly (clang, -O0):
<allocIobuf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xcaff,%edi
mov    $0x828,%esi
call   1030 <svcAlloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x828,%edx
call   1040 <memset@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocIobuf>:
push   %rbx
mov    $0xcaff,%edi
mov    $0x828,%esi
call   1030 <svcAlloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    $0x828,%edx
call   1040 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @allocIobuf() {
%1 = alloca i8*
%2 = call i8* @svcAlloc(i32 51967, i32 2088)
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @memset(i8* %3, i32 0, i32 2088)
%5 = load i8*, i8** %1
ret i8* %5
}

LLVM IR (-O2):
define i8* @allocIobuf() {
%1 = tail call i8* @svcAlloc(i32 51967, i32 2088)
%2 = tail call i32 @memset(i8* %1, i32 0, i32 2088)
ret i8* %1
}
/* Variables and functions */
scalar_t__ ntohl(int);
int /*<<< orphan*/ printf(char *);
int recv(int, void *, int, int /*<<< orphan*/);
int get_dword(int sockfd) {
  int buffer;
  if ((recv(sockfd, (void *)&buffer, 4, 0)) == -1) {
    printf("recv error\n");
    return -1;
  }
  return (int)ntohl(buffer);
}


x86 assembly (clang, -O0):
<get_dword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
xor    %ecx,%ecx
call   1030 <recv@plt>
cmp    $0xffffffff,%eax
jne    116f <get_dword+0x3f>
lea    0xea2(%rip),%rdi
call   1040 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    117a <get_dword+0x4a>
mov    -0xc(%rbp),%edi
call   1050 <ntohl@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_dword>:
push   %rax
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
xor    %ecx,%ecx
call   1030 <recv@plt>
cmp    $0xffffffff,%eax
je     1152 <get_dword+0x22>
mov    0x4(%rsp),%edi
call   1050 <ntohl@plt>
pop    %rcx
ret
lea    0xea7(%rip),%rdi
call   1040 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"recv error\0A\00"
define i32 @get_dword(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = bitcast i32* %4 to i8*
%7 = call i32 @recv(i32 %5, i8* %6, i32 4, i32 0)
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %15
11: ; preds = %1
%12 = load i32, i32* %4
%13 = call i64 @ntohl(i32 %12)
%14 = trunc i64 %13 to i32
store i32 %14, i32* %2
br label %15
15: ; preds = %11, %9
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
@str = [11 x i8] c"recv error\00"
define i32 @get_dword(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @recv(i32 %0, i8* %3, i32 4, i32 0)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
br label %12
8: ; preds = %1
%9 = load i32, i32* %2
%10 = call i64 @ntohl(i32 %9)
%11 = trunc i64 %10 to i32
br label %12
12: ; preds = %8, %6
%13 = phi i32 [ -1, %6 ], [ %11, %8 ]
ret i32 %13
}
void __attribute__((__no__)) load_gpr(float *a, float *b) {
  float c = *a;
  __asm__("# gpr, reg = %0" : "+b"(c));
  *b = c;
}


x86 assembly (clang, -O0):
<load_gpr>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x1c(%rbp),%xmm0
movd   %xmm0,%ebx
movd   %ebx,%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x1c(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_gpr>:
push   %rbx
mov    (%rdi),%ebx
mov    %ebx,(%rsi)
pop    %rbx
ret

LLVM IR (-O0):
define void @load_gpr(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
%5 = alloca float
store float* %0, float** %3
store float* %1, float** %4
%6 = load float*, float** %3
%7 = load float, float* %6
store float %7, float* %5
%8 = load float, float* %5
%9 = call float asm "# gpr, reg = $0", "={bx},0,~{dirflag},~{fpsr},~{flags}"(float %8)
store float %9, float* %5
%10 = load float, float* %5
%11 = load float*, float** %4
store float %10, float* %11
ret void
}

LLVM IR (-O2):
define void @load_gpr(float* nocapture %0, float* nocapture writeonly %1) {
%3 = load float, float* %0
%4 = tail call float asm "# gpr, reg = $0", "={bx},0,~{dirflag},~{fpsr},~{flags}"(float %3)
store float %4, float* %1
ret void
}
void event_normal_tone() {}


x86 assembly (clang, -O0):
<event_normal_tone>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_normal_tone>:
ret

LLVM IR (-O0):
define void @event_normal_tone() {
ret void
}

LLVM IR (-O2):
define void @event_normal_tone() {
ret void
}
/* Variables and functions */
int STDOUT_FILENO;
int __crow_stdout() { return STDOUT_FILENO; }


x86 assembly (clang, -O0):
<__crow_stdout>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ee5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__crow_stdout>:
mov    0x2ee9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@STDOUT_FILENO = global i32 0
define i32 @__crow_stdout() {
%1 = load i32, i32* @STDOUT_FILENO
ret i32 %1
}

LLVM IR (-O2):
@STDOUT_FILENO = global i32 0
define i32 @__crow_stdout() {
%1 = load i32, i32* @STDOUT_FILENO
ret i32 %1
}
int fac(int n) {
  if (n == 1 || n == 2)
    return 1;
  return fac(n - 1) + fac(n - 2);
}


x86 assembly (clang, -O0):
<fac>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     112f <fac+0x1f>
cmpl   $0x2,-0x8(%rbp)
jne    113b <fac+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    115e <fac+0x4e>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fac@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fac@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fac>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
add    $0xffffffff,%ebp
mov    $0x1,%ebx
cmp    $0x2,%ebp
jb     1144 <fac+0x34>
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %ebp,%edi
call   1030 <fac@plt>
add    %eax,%ebx
add    $0xfffffffe,%ebp
cmp    $0x1,%ebp
ja     1130 <fac+0x20>
add    $0x1,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fac(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 1, i32* %2
br label %18
10: ; preds = %6
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = call i32 @fac(i32 %12)
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 2
%16 = call i32 @fac(i32 %15)
%17 = add nsw i32 %13, %16
store i32 %17, i32* %2
br label %18
18: ; preds = %10, %9
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @fac(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 2
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %11, %4 ], [ %2, %1 ]
%6 = phi i32 [ %9, %4 ], [ %0, %1 ]
%7 = phi i32 [ %10, %4 ], [ 0, %1 ]
%8 = tail call i32 @fac(i32 %5)
%9 = add nsw i32 %6, -2
%10 = add nsw i32 %8, %7
%11 = add i32 %6, -3
%12 = icmp ult i32 %11, 2
br i1 %12, label %13, label %4
13: ; preds = %4
%14 = add i32 %10, 1
br label %15
15: ; preds = %13, %1
%16 = phi i32 [ 1, %1 ], [ %14, %13 ]
ret i32 %16
}
int mxc_gpio_get(unsigned int gpio) { return 1; }


x86 assembly (clang, -O0):
<mxc_gpio_get>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mxc_gpio_get>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @mxc_gpio_get(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @mxc_gpio_get(i32 %0) {
ret i32 1
}
void ble_rsp_attclient_prepare_write(
    const struct ble_msg_attclient_prepare_write_rsp_t *msg) {}


x86 assembly (clang, -O0):
<ble_rsp_attclient_prepare_write>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_rsp_attclient_prepare_write>:
ret

LLVM IR (-O0):
%struct.ble_msg_attclient_prepare_write_rsp_t = type opaque
define void @ble_rsp_attclient_prepare_write(%struct.ble_msg_attclient_prepare_write_rsp_t* %0) {
%2 = alloca %struct.ble_msg_attclient_prepare_write_rsp_t*
store %struct.ble_msg_attclient_prepare_write_rsp_t* %0, %struct.ble_msg_attclient_prepare_write_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.ble_msg_attclient_prepare_write_rsp_t = type opaque
define void @ble_rsp_attclient_prepare_write(%struct.ble_msg_attclient_prepare_write_rsp_t* nocapture %0) {
ret void
}
void splx(int ipl __attribute__((__unused__))) { return; }


x86 assembly (clang, -O0):
<splx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<splx>:
ret

LLVM IR (-O0):
define void @splx(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @splx(i32 %0) {
ret void
}
int call_back_4(void *target, void *routine_ptr, void *eiffel_string) {
  return (
      ((int (*)(void *, void *, char))routine_ptr)(target, eiffel_string, 'G'));
}


x86 assembly (clang, -O0):
<call_back_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x47,%edx
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_back_4>:
mov    %rsi,%rax
mov    %rdx,%rsi
mov    $0x47,%edx
jmp    *%rax

LLVM IR (-O0):
define i32 @call_back_4(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
%8 = bitcast i8* %7 to i32 (i8*, i8*, i8)*
%9 = load i8*, i8** %4
%10 = load i8*, i8** %6
%11 = call i32 %8(i8* %9, i8* %10, i8 signext 71)
ret i32 %11
}

LLVM IR (-O2):
define i32 @call_back_4(i8* %0, i8* nocapture %1, i8* %2) {
%4 = bitcast i8* %1 to i32 (i8*, i8*, i8)*
%5 = tail call i32 %4(i8* %0, i8* %2, i8 signext 71)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ listHeader();
int /*<<< orphan*/ printf(char *);
void printHeader() {
  printf("List header...\n");
  listHeader();
}


x86 assembly (clang, -O0):
<printHeader>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <listHeader@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printHeader>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <listHeader@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"List header...\0A\00"
define void @printHeader() {
%1 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @listHeader()
ret void
}

LLVM IR (-O2):
@str = [15 x i8] c"List header...\00"
define void @printHeader() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @listHeader()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("aaa\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"aaa\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [4 x i8] c"aaa\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct dirent {
  char *d_name;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int Vist(void *tfile) {
  int Eret = 0;
  struct dirent *myf = tfile;
  printf("%s\n", myf->d_name);
  return Eret;
}


x86 assembly (clang, -O0):
<Vist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rsi
lea    0xec7(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Vist>:
push   %rax
mov    (%rdi),%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.dirent = type { i8* }
@.str = [4 x i8] c"%s\0A\00"
define i32 @Vist(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca %struct.dirent*
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
%6 = bitcast i8* %5 to %struct.dirent*
store %struct.dirent* %6, %struct.dirent** %4
%7 = load %struct.dirent*, %struct.dirent** %4
%8 = getelementptr inbounds %struct.dirent, %struct.dirent* %7, i32 0, i32 0
%9 = load i8*, i8** %8
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @Vist(i8* nocapture %0) {
%2 = bitcast i8* %0 to i8**
%3 = load i8*, i8** %2
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};

/* Variables and functions */
struct timespec timespec_div(struct timespec result, int divisor) {
  unsigned long temp;
  struct timespec ret;
  temp = result.tv_sec % divisor;
  ret.tv_sec /= divisor;
  ret.tv_nsec /= divisor;
  ret.tv_nsec += temp * (1000000000 / divisor);
  return ret;
}


x86 assembly (clang, -O0):
<timespec_div>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%eax
cltd
idivl  -0x14(%rbp)
movslq %edx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x4(%rbp),%eax
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x20(%rbp),%rcx
mov    $0x3b9aca00,%eax
cltd
idivl  -0x14(%rbp)
cltq
imul   %rax,%rcx
movslq -0x4(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<timespec_div>:
mov    %rdi,%rax
cltd
idiv   %esi
mov    %edx,%ecx
mov    $0x3b9aca00,%eax
xor    %edx,%edx
idiv   %esi
imul   %ecx,%eax
shl    $0x20,%rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define i64 @timespec_div(i64 %0, i32 %1) {
%3 = alloca %struct.timespec
%4 = alloca %struct.timespec
%5 = alloca i32
%6 = alloca i64
%7 = bitcast %struct.timespec* %4 to i64*
store i64 %0, i64* %7
store i32 %1, i32* %5
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %4, i32 0, i32 0
%9 = load i32, i32* %8
%10 = load i32, i32* %5
%11 = srem i32 %9, %10
%12 = sext i32 %11 to i64
store i64 %12, i64* %6
%13 = load i32, i32* %5
%14 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
%15 = load i32, i32* %14
%16 = sdiv i32 %15, %13
store i32 %16, i32* %14
%17 = load i32, i32* %5
%18 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
%19 = load i32, i32* %18
%20 = sdiv i32 %19, %17
store i32 %20, i32* %18
%21 = load i64, i64* %6
%22 = load i32, i32* %5
%23 = sdiv i32 1000000000, %22
%24 = sext i32 %23 to i64
%25 = mul i64 %21, %24
%26 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
%27 = load i32, i32* %26
%28 = sext i32 %27 to i64
%29 = add i64 %28, %25
%30 = trunc i64 %29 to i32
store i32 %30, i32* %26
%31 = bitcast %struct.timespec* %3 to i64*
%32 = load i64, i64* %31
ret i64 %32
}

LLVM IR (-O2):
define i64 @timespec_div(i64 %0, i32 %1) {
%3 = trunc i64 %0 to i32
%4 = srem i32 %3, %1
%5 = sdiv i32 1000000000, %1
%6 = mul i32 %5, %4
%7 = zext i32 %6 to i64
%8 = shl nuw i64 %7, 32
ret i64 %8
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t min_32(int32_t a, int32_t b) { return b + ((a - b) & ((a - b) >> 31)); }


x86 assembly (clang, -O0):
<min_32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%edx
sub    -0x8(%rbp),%edx
sar    $0x1f,%edx
and    %edx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_32>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min_32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = sub nsw i32 %6, %7
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub nsw i32 %9, %10
%12 = ashr i32 %11, 31
%13 = and i32 %8, %12
%14 = add nsw i32 %5, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @min_32(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
int foo(void) {
  int i = 0;
  char *p = (char *)&i;
  return *(int *)p;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = bitcast i32* %1 to i8*
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @foo() {
ret i32 0
}
void kol_paint_line(unsigned x1, unsigned y1, unsigned x2, unsigned y2,
                    unsigned c) {
  asm("int $0x40" ::"a"(38), "b"(x1 * 65536 + x2), "c"(y1 * 65536 + y2),
      "d"(c));
}


x86 assembly (clang, -O0):
<kol_paint_line>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0xc(%rbp),%ebx
shl    $0x10,%ebx
add    -0x14(%rbp),%ebx
mov    -0x10(%rbp),%ecx
shl    $0x10,%ecx
add    -0x18(%rbp),%ecx
mov    -0x1c(%rbp),%edx
mov    $0x26,%eax
int    $0x40
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_paint_line>:
push   %rbx
shl    $0x10,%edi
lea    (%rdi,%rdx,1),%ebx
shl    $0x10,%esi
add    %esi,%ecx
mov    $0x26,%eax
mov    %r8d,%edx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define void @kol_paint_line(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = mul i32 %11, 65536
%13 = load i32, i32* %8
%14 = add i32 %12, %13
%15 = load i32, i32* %7
%16 = mul i32 %15, 65536
%17 = load i32, i32* %9
%18 = add i32 %16, %17
%19 = load i32, i32* %10
ret void
}

LLVM IR (-O2):
define void @kol_paint_line(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = shl i32 %0, 16
%7 = add i32 %6, %2
%8 = shl i32 %1, 16
%9 = add i32 %8, %3
tail call void asm sideeffect "int $$0x40", "{ax},{bx},{cx},{dx},~{dirflag},~{fpsr},~{flags}"(i32 38, i32 %7, i32 %9, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ memcpy(void *, void *, size_t);
void transform_raw(void *in, void *out, int num_gen_args, void **args) {
  assert(num_gen_args == 1);
  size_t sz = (size_t)args[0];
  if (in != out)
    memcpy(out, in, sz);
}


x86 assembly (clang, -O0):
<transform_raw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
cmpl   $0x1,-0x14(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
je     1172 <transform_raw+0x52>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x28(%rbp),%rdx
call   1040 <memcpy@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<transform_raw>:
push   %r15
push   %r14
push   %rbx
mov    %rcx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
xor    %edi,%edi
cmp    $0x1,%edx
sete   %dil
call   1030 <assert@plt>
cmp    %r15,%rbx
je     1154 <transform_raw+0x34>
mov    (%r14),%rdx
mov    %r15,%rdi
mov    %rbx,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <memcpy@plt>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @transform_raw(i8* %0, i8* %1, i32 %2, i8** %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8**
%9 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i8** %3, i8*** %8
%10 = load i32, i32* %7
%11 = icmp eq i32 %10, 1
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
%14 = load i8**, i8*** %8
%15 = getelementptr inbounds i8*, i8** %14, i64 0
%16 = load i8*, i8** %15
%17 = ptrtoint i8* %16 to i64
store i64 %17, i64* %9
%18 = load i8*, i8** %5
%19 = load i8*, i8** %6
%20 = icmp ne i8* %18, %19
br i1 %20, label %21, label %26
21: ; preds = %4
%22 = load i8*, i8** %6
%23 = load i8*, i8** %5
%24 = load i64, i64* %9
%25 = call i32 @memcpy(i8* %22, i8* %23, i64 %24)
br label %26
26: ; preds = %21, %4
ret void
}

LLVM IR (-O2):
define void @transform_raw(i8* %0, i8* %1, i32 %2, i8** nocapture %3) {
%5 = icmp eq i32 %2, 1
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = icmp eq i8* %0, %1
br i1 %8, label %13, label %9
9: ; preds = %4
%10 = load i8*, i8** %3
%11 = ptrtoint i8* %10 to i64
%12 = tail call i32 @memcpy(i8* %1, i8* %0, i64 %11)
br label %13
13: ; preds = %9, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ iso_disconnect();
void mcs_disconnect(void) { iso_disconnect(); }


x86 assembly (clang, -O0):
<mcs_disconnect>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <iso_disconnect@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcs_disconnect>:
xor    %eax,%eax
jmp    1030 <iso_disconnect@plt>

LLVM IR (-O0):
define void @mcs_disconnect() {
%1 = call i32 (...) @iso_disconnect()
ret void
}

LLVM IR (-O2):
define void @mcs_disconnect() {
%1 = tail call i32 (...) @iso_disconnect()
ret void
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int /*<<< orphan*/ Sys_failure(char *);
int wait(int *);
pid_t Wait(int *status) {
  pid_t retval;
  retval = wait(status);
  if (retval == -1)
    Sys_failure("wait");
  return retval;
}


x86 assembly (clang, -O0):
<Wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <wait@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0xffffffff,-0xc(%rbp)
jne    114e <Wait+0x2e>
lea    0xeb7(%rip),%rdi
call   1030 <Sys_failure@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Wait>:
push   %rbx
call   1040 <wait@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
jne    1139 <Wait+0x19>
lea    0xecc(%rip),%rdi
call   1030 <Sys_failure@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"wait\00"
define i32 @Wait(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @wait(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @Sys_failure(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
@.str = [5 x i8] c"wait\00"
define i32 @Wait(i32* %0) {
%2 = tail call i32 @wait(i32* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @Sys_failure(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i32 %2
}
int V_visual(d)
int d;
{
  Z_fatal("visual mode is not available on this machine\n");
  return (-d);
}


x86 assembly (clang, -O0):
<V_visual>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
mov    $0x0,%al
call   1030 <Z_fatal@plt>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<V_visual>:
push   %rbx
mov    %edi,%ebx
lea    0xee6(%rip),%rdi
xor    %eax,%eax
call   1030 <Z_fatal@plt>
neg    %ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [46 x i8] c"visual mode is not available on this machine\0A\00"
define i32 @V_visual(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i8*, ...) bitcast (i32 (...)* @Z_fatal to i32 (i8*, ...)*)(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = sub nsw i32 0, %4
ret i32 %5
}

LLVM IR (-O2):
@.str = [46 x i8] c"visual mode is not available on this machine\0A\00"
define i32 @V_visual(i32 %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @Z_fatal to i32 (i8*, ...)*)(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = sub nsw i32 0, %0
ret i32 %3
}
/* Variables and functions */
long factorial(int);
long multiset(int n, int k) {
  long numerator = factorial(n + k - 1);
  long denominator = factorial(k) * factorial(n - 1);
  return numerator / denominator;
}


x86 assembly (clang, -O0):
<multiset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
add    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <factorial@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <factorial@plt>
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <factorial@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
imul   %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cqto
idivq  -0x18(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiset>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
lea    (%rdi,%rbx,1),%eax
add    $0xffffffff,%eax
mov    %edi,%ebp
add    $0xffffffff,%ebp
mov    %eax,%edi
call   1030 <factorial@plt>
mov    %rax,%r14
mov    %ebx,%edi
call   1030 <factorial@plt>
mov    %rax,%rbx
mov    %ebp,%edi
call   1030 <factorial@plt>
mov    %rax,%rcx
imul   %rbx,%rcx
mov    %r14,%rax
or     %rcx,%rax
shr    $0x20,%rax
je     1159 <multiset+0x49>
mov    %r14,%rax
cqto
idiv   %rcx
jmp    1160 <multiset+0x50>
mov    %r14d,%eax
xor    %edx,%edx
div    %ecx
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i64 @multiset(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = add nsw i32 %7, %8
%10 = sub nsw i32 %9, 1
%11 = call i64 @factorial(i32 %10)
store i64 %11, i64* %5
%12 = load i32, i32* %4
%13 = call i64 @factorial(i32 %12)
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 1
%16 = call i64 @factorial(i32 %15)
%17 = mul nsw i64 %13, %16
store i64 %17, i64* %6
%18 = load i64, i64* %5
%19 = load i64, i64* %6
%20 = sdiv i64 %18, %19
ret i64 %20
}

LLVM IR (-O2):
define i64 @multiset(i32 %0, i32 %1) {
%3 = add i32 %0, -1
%4 = add i32 %3, %1
%5 = tail call i64 @factorial(i32 %4)
%6 = tail call i64 @factorial(i32 %1)
%7 = tail call i64 @factorial(i32 %3)
%8 = mul nsw i64 %7, %6
%9 = sdiv i64 %5, %8
ret i64 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("hello,world:::\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"hello,world:::\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [15 x i8] c"hello,world:::\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct drm_device {
  int dummy;
};

/* Variables and functions */
int radeon_driver_vblank_do_wait(struct drm_device *, unsigned int *, int);
int radeon_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence) {
  return radeon_driver_vblank_do_wait(dev, sequence, 1);
}


x86 assembly (clang, -O0):
<radeon_driver_vblank_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <radeon_driver_vblank_do_wait@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radeon_driver_vblank_wait>:
mov    $0x1,%edx
jmp    1030 <radeon_driver_vblank_do_wait@plt>

LLVM IR (-O0):
%struct.drm_device = type { i32 }
define i32 @radeon_driver_vblank_wait(%struct.drm_device* %0, i32* %1) {
%3 = alloca %struct.drm_device*
%4 = alloca i32*
store %struct.drm_device* %0, %struct.drm_device** %3
store i32* %1, i32** %4
%5 = load %struct.drm_device*, %struct.drm_device** %3
%6 = load i32*, i32** %4
%7 = call i32 @radeon_driver_vblank_do_wait(%struct.drm_device* %5, i32* %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
%struct.drm_device = type { i32 }
define i32 @radeon_driver_vblank_wait(%struct.drm_device* %0, i32* %1) {
%3 = tail call i32 @radeon_driver_vblank_do_wait(%struct.drm_device* %0, i32* %1, i32 1)
ret i32 %3
}
int GCD(int n, int m) {
  if (m)
    return GCD(m, n % m);
  else
    return n;
}


x86 assembly (clang, -O0):
<GCD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1141 <GCD+0x31>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%esi
call   1030 <GCD@plt>
mov    %eax,-0x4(%rbp)
jmp    1147 <GCD+0x37>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GCD>:
mov    %edi,%eax
test   %esi,%esi
je     111d <GCD+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <GCD+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @GCD(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = srem i32 %10, %11
%13 = call i32 @GCD(i32 %9, i32 %12)
store i32 %13, i32* %3
br label %16
14: ; preds = %2
%15 = load i32, i32* %4
store i32 %15, i32* %3
br label %16
16: ; preds = %14, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @GCD(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %5, %4 ], [ %0, %2 ]
%7 = srem i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %5, %4 ]
ret i32 %10
}
/* Type definitions */
struct termios {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ TCSANOW;
int close(int);
int /*<<< orphan*/ tcsetattr(int, int /*<<< orphan*/, struct termios *);
int uart_close(int fd, struct termios *saveattr) {
  tcsetattr(fd, TCSANOW, saveattr);
  return close(fd);
}


x86 assembly (clang, -O0):
<uart_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2eaf(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
call   1040 <tcsetattr@plt>
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_close>:
push   %rbx
mov    %rsi,%rdx
mov    %edi,%ebx
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1040 <tcsetattr@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <close@plt>

LLVM IR (-O0):
%struct.termios = type { i32 }
@TCSANOW = global i32 0
define i32 @uart_close(i32 %0, %struct.termios* %1) {
%3 = alloca i32
%4 = alloca %struct.termios*
store i32 %0, i32* %3
store %struct.termios* %1, %struct.termios** %4
%5 = load i32, i32* %3
%6 = load i32, i32* @TCSANOW
%7 = load %struct.termios*, %struct.termios** %4
%8 = call i32 @tcsetattr(i32 %5, i32 %6, %struct.termios* %7)
%9 = load i32, i32* %3
%10 = call i32 @close(i32 %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.termios = type { i32 }
@TCSANOW = global i32 0
define i32 @uart_close(i32 %0, %struct.termios* %1) {
%3 = load i32, i32* @TCSANOW
%4 = tail call i32 @tcsetattr(i32 %0, i32 %3, %struct.termios* %1)
%5 = tail call i32 @close(i32 %0)
ret i32 %5
}
/* Variables and functions */
unsigned char toupper(unsigned char);
unsigned char HX_toupper(unsigned char c) { return toupper(c); }


x86 assembly (clang, -O0):
<HX_toupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <toupper@plt>
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HX_toupper>:
jmp    1030 <toupper@plt>

LLVM IR (-O0):
define zeroext i8 @HX_toupper(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call zeroext i8 @toupper(i8 zeroext %3)
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @HX_toupper(i8 zeroext %0) {
%2 = tail call zeroext i8 @toupper(i8 zeroext %0)
ret i8 %2
}
/* Type definitions */
typedef scalar_t__ wchar_t;

/* Variables and functions */
int mbtowc(wchar_t *pwc, const char *s, size_t n) {
  if (s == 0)
    return 0;
  if (n == 0)
    return -1;
  else {
    wchar_t wc = *(unsigned char *)s;
    if (pwc)
      *pwc = wc;
    return (wc != 0);
  }
}


x86 assembly (clang, -O0):
<mbtowc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1127 <mbtowc+0x27>
movl   $0x0,-0x4(%rbp)
jmp    116f <mbtowc+0x6f>
cmpq   $0x0,-0x20(%rbp)
jne    113e <mbtowc+0x3e>
movl   $0xffffffff,-0x4(%rbp)
jmp    116f <mbtowc+0x6f>
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115f <mbtowc+0x5f>
mov    -0x28(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
cmpq   $0x0,-0x28(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mbtowc>:
test   %rsi,%rsi
je     111e <mbtowc+0x1e>
test   %rdx,%rdx
je     1121 <mbtowc+0x21>
movzbl (%rsi),%ecx
test   %rdi,%rdi
je     1115 <mbtowc+0x15>
mov    %rcx,(%rdi)
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
ret
xor    %eax,%eax
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @mbtowc(i64* %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i64*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
store i64* %0, i64** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%9 = load i8*, i8** %6
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %12
11: ; preds = %3
store i32 0, i32* %4
br label %29
12: ; preds = %3
%13 = load i64, i64* %7
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %12
store i32 -1, i32* %4
br label %29
16: ; preds = %12
%17 = load i8*, i8** %6
%18 = load i8, i8* %17
%19 = zext i8 %18 to i64
store i64 %19, i64* %8
%20 = load i64*, i64** %5
%21 = icmp ne i64* %20, null
br i1 %21, label %22, label %25
22: ; preds = %16
%23 = load i64, i64* %8
%24 = load i64*, i64** %5
store i64 %23, i64* %24
br label %25
25: ; preds = %22, %16
%26 = load i64, i64* %8
%27 = icmp ne i64 %26, 0
%28 = zext i1 %27 to i32
store i32 %28, i32* %4
br label %29
29: ; preds = %25, %15, %11
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @mbtowc(i64* writeonly %0, i8* %1, i64 %2) {
%4 = icmp eq i8* %1, null
br i1 %4, label %15, label %5
5: ; preds = %3
%6 = icmp eq i64 %2, 0
br i1 %6, label %15, label %7
7: ; preds = %5
%8 = load i8, i8* %1
%9 = icmp eq i64* %0, null
br i1 %9, label %12, label %10
10: ; preds = %7
%11 = zext i8 %8 to i64
store i64 %11, i64* %0
br label %12
12: ; preds = %10, %7
%13 = icmp ne i8 %8, 0
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %5, %3, %12
%16 = phi i32 [ %14, %12 ], [ 0, %3 ], [ -1, %5 ]
ret i32 %16
}
/* Type definitions */
struct cmd {
  int dummy;
};

/* Variables and functions */
struct cmd *parselist(char **, char *);
struct cmd *parseline(char **ps, char *es) {
  struct cmd *cmd;
  cmd = parselist(ps, es);
  return cmd;
}


x86 assembly (clang, -O0):
<parseline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <parselist@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parseline>:
jmp    1030 <parselist@plt>

LLVM IR (-O0):
%struct.cmd = type { i32 }
define %struct.cmd* @parseline(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
%5 = alloca %struct.cmd*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%6 = load i8**, i8*** %3
%7 = load i8*, i8** %4
%8 = call %struct.cmd* @parselist(i8** %6, i8* %7)
store %struct.cmd* %8, %struct.cmd** %5
%9 = load %struct.cmd*, %struct.cmd** %5
ret %struct.cmd* %9
}

LLVM IR (-O2):
%struct.cmd = type { i32 }
define %struct.cmd* @parseline(i8** %0, i8* %1) {
%3 = tail call %struct.cmd* @parselist(i8** %0, i8* %1)
ret %struct.cmd* %3
}
void glPixelStorei(int a, int b) {}


x86 assembly (clang, -O0):
<glPixelStorei>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glPixelStorei>:
ret

LLVM IR (-O0):
define void @glPixelStorei(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @glPixelStorei(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void end(void) { printf("</svg>\n"); }


x86 assembly (clang, -O0):
<end>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<end>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"</svg>\0A\00"
define void @end() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [7 x i8] c"</svg>\00"
define void @end() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ changemode(int /*<<< orphan*/);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void die(const char *str) {
  fprintf(stderr, "error: %s\n", str);
  changemode(0);
  exit(1);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xeb0(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <changemode@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<die>:
push   %rax
mov    %rdi,%rdx
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
lea    0xebc(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <changemode@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"error: %s\0A\00"
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @changemode(i32 0)
%7 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"error: %s\0A\00"
define void @die(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @changemode(i32 0)
%5 = tail call i32 @exit(i32 1)
unreachable
}
int CPU_getCPUIDFeaturesExt() {
  int features = 0;
  return features;
}


x86 assembly (clang, -O0):
<CPU_getCPUIDFeaturesExt>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CPU_getCPUIDFeaturesExt>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @CPU_getCPUIDFeaturesExt() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @CPU_getCPUIDFeaturesExt() {
ret i32 0
}