xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
main() {
  int x;
  scanf("%d", &x);
  if (x == 0)
    printf("Equal to zero.\n");
  else
    printf("Non-zero.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
cmpl   $0x0,-0x8(%rbp)
jne    115a <main+0x3a>
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
jmp    1166 <main+0x46>
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
cmpl   $0x0,0x4(%rsp)
lea    0xecf(%rip),%rax
lea    0xebe(%rip),%rdi
cmove  %rax,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [16 x i8] c"Equal to zero.\0A\00"
@.str.2 = [11 x i8] c"Non-zero.\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
br label %10
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@str = [10 x i8] c"Non-zero.\00"
@str.3 = [15 x i8] c"Equal to zero.\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @str.3, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0)
%7 = call i32 @puts(i8* dereferenceable(1) %6)
ret i32 0
}
int lan2_recv_sol(void *rsp) { return (-8); }


x86 assembly (clang, -O0):
<lan2_recv_sol>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xfffffff8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lan2_recv_sol>:
mov    $0xfffffff8,%eax
ret

LLVM IR (-O0):
define i32 @lan2_recv_sol(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 -8
}

LLVM IR (-O2):
define i32 @lan2_recv_sol(i8* nocapture readnone %0) {
ret i32 -8
}
/* Variables and functions */
int /*<<< orphan*/ f4();
int main() { f4(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <f4@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <f4@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @f4()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @f4()
ret i32 0
}
/* Variables and functions */
int fibo(int);
int /*<<< orphan*/ printf(char *, int, int);
int main(int argc, char *argv[]) {
  if (argc == 2) {
    int n = 15;
    int res = fibo(n);
    printf("Fibonacci of %d is %d\n", n, res);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jne    1164 <main+0x44>
movl   $0xf,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <fibo@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
lea    0xea1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
cmp    $0x2,%edi
jne    1147 <main+0x27>
push   %rax
mov    $0xf,%edi
call   1040 <fibo@plt>
lea    0xec9(%rip),%rdi
mov    $0xf,%esi
mov    %eax,%edx
call   1030 <printf@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Fibonacci of %d is %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 2
br i1 %9, label %10, label %16
10: ; preds = %2
store i32 15, i32* %6
%11 = load i32, i32* %6
%12 = call i32 @fibo(i32 %11)
store i32 %12, i32* %7
%13 = load i32, i32* %6
%14 = load i32, i32* %7
%15 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %13, i32 %14)
br label %16
16: ; preds = %10, %2
ret i32 0
}

LLVM IR (-O2):
@.str = [23 x i8] c"Fibonacci of %d is %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = tail call i32 @fibo(i32 15)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 15, i32 %5)
br label %7
7: ; preds = %4, %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printMetrics();
void printCacheMetrics() { printMetrics(); }


x86 assembly (clang, -O0):
<printCacheMetrics>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <printMetrics@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printCacheMetrics>:
xor    %eax,%eax
jmp    1030 <printMetrics@plt>

LLVM IR (-O0):
define void @printCacheMetrics() {
%1 = call i32 (...) @printMetrics()
ret void
}

LLVM IR (-O2):
define void @printCacheMetrics() {
%1 = tail call i32 (...) @printMetrics()
ret void
}
/* Variables and functions */
int syscall_write(int, char *, int);
int putc(char c) { return syscall_write(1, &c, 1); }


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x1,%edx
lea    -0x1(%rbp),%rsi
mov    %edx,%edi
call   1030 <syscall_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
call   1030 <syscall_write@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @syscall_write(i32 1, i8* %2, i32 1)
ret i32 %3
}

LLVM IR (-O2):
define i32 @putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @syscall_write(i32 1, i8* %2, i32 1)
ret i32 %3
}
void DestroyMediaServer(void *mmsObj) {}


x86 assembly (clang, -O0):
<DestroyMediaServer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DestroyMediaServer>:
ret

LLVM IR (-O0):
define void @DestroyMediaServer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @DestroyMediaServer(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int isAlphaRex(char);
int isStartWordExpRex(char ch) { return (isAlphaRex(ch) == 1) || (ch == '_'); }


x86 assembly (clang, -O0):
<isStartWordExpRex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isAlphaRex@plt>
mov    %eax,%ecx
mov    $0x1,%al
cmp    $0x1,%ecx
mov    %al,-0x2(%rbp)
je     1144 <isStartWordExpRex+0x34>
movsbl -0x1(%rbp),%eax
cmp    $0x5f,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isStartWordExpRex>:
push   %rbx
mov    %edi,%ebx
call   1030 <isAlphaRex@plt>
cmp    $0x1,%eax
sete   %al
cmp    $0x5f,%bl
sete   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isStartWordExpRex(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @isAlphaRex(i8 signext %3)
%5 = icmp eq i32 %4, 1
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 95
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @isStartWordExpRex(i8 signext %0) {
%2 = tail call i32 @isAlphaRex(i8 signext %0)
%3 = icmp eq i32 %2, 1
%4 = icmp eq i8 %0, 95
%5 = or i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
float u2f(unsigned u) { return *(float *)&u; }


x86 assembly (clang, -O0):
<u2f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<u2f>:
movd   %edi,%xmm0
ret

LLVM IR (-O0):
define float @u2f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = bitcast i32* %2 to float*
%4 = load float, float* %3
ret float %4
}

LLVM IR (-O2):
define float @u2f(i32 %0) {
%2 = bitcast i32 %0 to float
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ UART_char(char);
void UART_string(char *str) {
  while (*str) {
    UART_char(*str);
    str++;
  }
}


x86 assembly (clang, -O0):
<UART_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1146 <UART_string+0x36>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <UART_char@plt>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <UART_string+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART_string>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <UART_string+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <UART_char@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <UART_string+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @UART_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call i32 @UART_char(i8 signext %9)
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @UART_string(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @UART_char(i8 signext %5)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
float dot4(const int *g, const float x, const float y, const float z,
           const float w) {
  return g[0] * x + g[1] * y + g[2] * z + g[3] * w;
}


x86 assembly (clang, -O0):
<dot4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
movss  %xmm2,-0x14(%rbp)
movss  %xmm3,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cvtsi2ssl (%rax),%xmm0
movss  -0xc(%rbp),%xmm2
mov    -0x8(%rbp),%rax
cvtsi2ssl 0x4(%rax),%xmm1
mulss  -0x10(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
cvtsi2ssl 0x8(%rax),%xmm1
movss  -0x14(%rbp),%xmm2
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
cvtsi2ssl 0xc(%rax),%xmm0
movss  -0x18(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dot4>:
cvtsi2ssl (%rdi),%xmm4
cvtsi2ssl 0x4(%rdi),%xmm5
mulss  %xmm1,%xmm5
mulss  %xmm4,%xmm0
xorps  %xmm1,%xmm1
cvtsi2ssl 0x8(%rdi),%xmm1
addss  %xmm5,%xmm0
xorps  %xmm4,%xmm4
cvtsi2ssl 0xc(%rdi),%xmm4
mulss  %xmm2,%xmm1
addss  %xmm1,%xmm0
mulss  %xmm3,%xmm4
addss  %xmm4,%xmm0
ret

LLVM IR (-O0):
define float @dot4(i32* %0, float %1, float %2, float %3, float %4) {
%6 = alloca i32*
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
store i32* %0, i32** %6
store float %1, float* %7
store float %2, float* %8
store float %3, float* %9
store float %4, float* %10
%11 = load i32*, i32** %6
%12 = getelementptr inbounds i32, i32* %11, i64 0
%13 = load i32, i32* %12
%14 = sitofp i32 %13 to float
%15 = load float, float* %7
%16 = load i32*, i32** %6
%17 = getelementptr inbounds i32, i32* %16, i64 1
%18 = load i32, i32* %17
%19 = sitofp i32 %18 to float
%20 = load float, float* %8
%21 = fmul float %19, %20
%22 = call float @llvm.fmuladd.f32(float %14, float %15, float %21)
%23 = load i32*, i32** %6
%24 = getelementptr inbounds i32, i32* %23, i64 2
%25 = load i32, i32* %24
%26 = sitofp i32 %25 to float
%27 = load float, float* %9
%28 = call float @llvm.fmuladd.f32(float %26, float %27, float %22)
%29 = load i32*, i32** %6
%30 = getelementptr inbounds i32, i32* %29, i64 3
%31 = load i32, i32* %30
%32 = sitofp i32 %31 to float
%33 = load float, float* %10
%34 = call float @llvm.fmuladd.f32(float %32, float %33, float %28)
ret float %34
}

LLVM IR (-O2):
define float @dot4(i32* nocapture %0, float %1, float %2, float %3, float %4) {
%6 = load i32, i32* %0
%7 = sitofp i32 %6 to float
%8 = getelementptr inbounds i32, i32* %0, i64 1
%9 = load i32, i32* %8
%10 = sitofp i32 %9 to float
%11 = fmul float %10, %2
%12 = tail call float @llvm.fmuladd.f32(float %7, float %1, float %11)
%13 = getelementptr inbounds i32, i32* %0, i64 2
%14 = load i32, i32* %13
%15 = sitofp i32 %14 to float
%16 = tail call float @llvm.fmuladd.f32(float %15, float %3, float %12)
%17 = getelementptr inbounds i32, i32* %0, i64 3
%18 = load i32, i32* %17
%19 = sitofp i32 %18 to float
%20 = tail call float @llvm.fmuladd.f32(float %19, float %4, float %16)
ret float %20
}
void gn_terminate_pbar(void) {}


x86 assembly (clang, -O0):
<gn_terminate_pbar>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gn_terminate_pbar>:
ret

LLVM IR (-O0):
define void @gn_terminate_pbar() {
ret void
}

LLVM IR (-O2):
define void @gn_terminate_pbar() {
ret void
}
/* Type definitions */
struct SocketBuffer {
  int dummy;
};

/* Variables and functions */
scalar_t__ buffRead(int, struct SocketBuffer *);
int readShort(struct SocketBuffer *buff) {
  return (*(short *)buffRead(sizeof(short), buff));
}


x86 assembly (clang, -O0):
<readShort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x2,%edi
call   1030 <buffRead@plt>
movswl (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readShort>:
push   %rax
mov    %rdi,%rsi
mov    $0x2,%edi
call   1030 <buffRead@plt>
movswl (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.SocketBuffer = type { i32 }
define i32 @readShort(%struct.SocketBuffer* %0) {
%2 = alloca %struct.SocketBuffer*
store %struct.SocketBuffer* %0, %struct.SocketBuffer** %2
%3 = load %struct.SocketBuffer*, %struct.SocketBuffer** %2
%4 = call i64 @buffRead(i32 2, %struct.SocketBuffer* %3)
%5 = inttoptr i64 %4 to i16*
%6 = load i16, i16* %5
%7 = sext i16 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
%struct.SocketBuffer = type { i32 }
define i32 @readShort(%struct.SocketBuffer* %0) {
%2 = tail call i64 @buffRead(i32 2, %struct.SocketBuffer* %0)
%3 = inttoptr i64 %2 to i16*
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
ret i32 %5
}
int isprime(int n) {
  int j;
  if (n == 2)
    return 1;
  if (n % 2 == 0)
    return 0;
  for (j = 3; j * j <= n; j += 2)
    if (n % j == 0)
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<isprime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jne    111d <isprime+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    118a <isprime+0x8a>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    113d <isprime+0x3d>
movl   $0x0,-0x4(%rbp)
jmp    118a <isprime+0x8a>
movl   $0x3,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1183 <isprime+0x83>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1170 <isprime+0x70>
movl   $0x0,-0x4(%rbp)
jmp    118a <isprime+0x8a>
jmp    1175 <isprime+0x75>
mov    -0xc(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0xc(%rbp)
jmp    1144 <isprime+0x44>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprime>:
mov    $0x1,%ecx
cmp    $0x2,%edi
je     1135 <isprime+0x35>
test   $0x1,%dil
jne    1114 <isprime+0x14>
xor    %ecx,%ecx
jmp    1135 <isprime+0x35>
cmp    $0x9,%edi
jl     1135 <isprime+0x35>
mov    $0x3,%esi
xchg   %ax,%ax
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1110 <isprime+0x10>
add    $0x2,%esi
mov    %esi,%eax
imul   %esi,%eax
cmp    %edi,%eax
jle    1120 <isprime+0x20>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @isprime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 2
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %31
8: ; preds = %1
%9 = load i32, i32* %3
%10 = srem i32 %9, 2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 0, i32* %2
br label %31
13: ; preds = %8
store i32 3, i32* %4
br label %14
14: ; preds = %27, %13
%15 = load i32, i32* %4
%16 = load i32, i32* %4
%17 = mul nsw i32 %15, %16
%18 = load i32, i32* %3
%19 = icmp sle i32 %17, %18
br i1 %19, label %20, label %30
20: ; preds = %14
%21 = load i32, i32* %3
%22 = load i32, i32* %4
%23 = srem i32 %21, %22
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %20
store i32 0, i32* %2
br label %31
26: ; preds = %20
br label %27
27: ; preds = %26
%28 = load i32, i32* %4
%29 = add nsw i32 %28, 2
store i32 %29, i32* %4
br label %14
30: ; preds = %14
store i32 1, i32* %2
br label %31
31: ; preds = %30, %25, %12, %7
%32 = load i32, i32* %2
ret i32 %32
}

LLVM IR (-O2):
define i32 @isprime(i32 %0) {
%2 = icmp eq i32 %0, 2
br i1 %2, label %16, label %3
3: ; preds = %1
%4 = and i32 %0, 1
%5 = icmp eq i32 %4, 0
br i1 %5, label %16, label %6
6: ; preds = %3
%7 = icmp slt i32 %0, 9
br i1 %7, label %16, label %11
8: ; preds = %11
%9 = mul nsw i32 %15, %15
%10 = icmp sgt i32 %9, %0
br i1 %10, label %16, label %11
11: ; preds = %6, %8
%12 = phi i32 [ %15, %8 ], [ 3, %6 ]
%13 = srem i32 %0, %12
%14 = icmp eq i32 %13, 0
%15 = add nuw nsw i32 %12, 2
br i1 %14, label %16, label %8
16: ; preds = %11, %8, %6, %3, %1
%17 = phi i32 [ 1, %1 ], [ 0, %3 ], [ 1, %6 ], [ 0, %11 ], [ 1, %8 ]
ret i32 %17
}
int pointer_equal(void *location1, void *location2) {
  return location1 == location2;
}


x86 assembly (clang, -O0):
<pointer_equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pointer_equal>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @pointer_equal(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp eq i8* %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @pointer_equal(i8* readnone %0, i8* readnone %1) {
%3 = icmp eq i8* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
double roundl(double);
double round(double x) { return roundl(x); }


x86 assembly (clang, -O0):
<round>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <roundl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<round>:
jmp    1030 <roundl@plt>

LLVM IR (-O0):
define double @round(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @roundl(double %3)
ret double %4
}

LLVM IR (-O2):
define double @round(double %0) {
%2 = tail call double @roundl(double %0)
ret double %2
}
void sdr__thread_assert_id(struct sdr_thread_id *tid, char *file, int line) {}


x86 assembly (clang, -O0):
<sdr__thread_assert_id>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdr__thread_assert_id>:
ret

LLVM IR (-O0):
%struct.sdr_thread_id = type opaque
define void @sdr__thread_assert_id(%struct.sdr_thread_id* %0, i8* %1, i32 %2) {
%4 = alloca %struct.sdr_thread_id*
%5 = alloca i8*
%6 = alloca i32
store %struct.sdr_thread_id* %0, %struct.sdr_thread_id** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.sdr_thread_id = type opaque
define void @sdr__thread_assert_id(%struct.sdr_thread_id* nocapture %0, i8* nocapture %1, i32 %2) {
ret void
}
/* Variables and functions */
bool finalizeInstall(const char *installPath, const char *installUser) {
  return true;
}


x86 assembly (clang, -O0):
<finalizeInstall>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<finalizeInstall>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @finalizeInstall(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @finalizeInstall(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 1
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t mp2vseqx_get_horizontal(const uint8_t *p_mp2vseqx) {
  return ((p_mp2vseqx[5] & 0x1) << 1) | (p_mp2vseqx[6] >> 7);
}


x86 assembly (clang, -O0):
<mp2vseqx_get_horizontal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%eax
and    $0x1,%eax
shl    $0x1,%eax
mov    -0x8(%rbp),%rcx
mov    0x18(%rcx),%ecx
sar    $0x7,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp2vseqx_get_horizontal>:
mov    0x14(%rdi),%ecx
mov    0x18(%rdi),%eax
add    %ecx,%ecx
and    $0x2,%ecx
sar    $0x7,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @mp2vseqx_get_horizontal(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 5
%5 = load i32, i32* %4
%6 = and i32 %5, 1
%7 = shl i32 %6, 1
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 6
%10 = load i32, i32* %9
%11 = ashr i32 %10, 7
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @mp2vseqx_get_horizontal(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 5
%3 = load i32, i32* %2
%4 = shl i32 %3, 1
%5 = and i32 %4, 2
%6 = getelementptr inbounds i32, i32* %0, i64 6
%7 = load i32, i32* %6
%8 = ashr i32 %7, 7
%9 = or i32 %5, %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ opr_bit(unsigned short *, int, int /*<<< orphan*/);
int clr_bit(unsigned short *bit, int off) {
  opr_bit(bit, off, 0);
  return 0;
}


x86 assembly (clang, -O0):
<clr_bit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <opr_bit@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clr_bit>:
push   %rax
xor    %edx,%edx
call   1030 <opr_bit@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @clr_bit(i16* %0, i32 %1) {
%3 = alloca i16*
%4 = alloca i32
store i16* %0, i16** %3
store i32 %1, i32* %4
%5 = load i16*, i16** %3
%6 = load i32, i32* %4
%7 = call i32 @opr_bit(i16* %5, i32 %6, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @clr_bit(i16* %0, i32 %1) {
%3 = tail call i32 @opr_bit(i16* %0, i32 %1, i32 0)
ret i32 0
}
int arm_cleanDcache(char *base, int size) { return (0); }


x86 assembly (clang, -O0):
<arm_cleanDcache>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_cleanDcache>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @arm_cleanDcache(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @arm_cleanDcache(i8* nocapture readnone %0, i32 %1) {
ret i32 0
}
int test_imm_24int16_reg(short val) {
  return ((val) & (0x24 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_24int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x24,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_24int16_reg>:
test   $0x24,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_24int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 36
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_24int16_reg(i16 signext %0) {
%2 = and i16 %0, 36
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
unsigned int word_size();
long long int topbit_mask(void) {
  const unsigned int ws = word_size();
  long long int bit = 1LL << (ws - 1);
  return bit;
}


x86 assembly (clang, -O0):
<topbit_mask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <word_size@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<topbit_mask>:
push   %rax
xor    %eax,%eax
call   1030 <word_size@plt>
lea    -0x1(%rax),%ecx
mov    $0x1,%eax
shl    %cl,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @topbit_mask() {
%1 = alloca i32
%2 = alloca i64
%3 = call i32 (...) @word_size()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = sub i32 %4, 1
%6 = zext i32 %5 to i64
%7 = shl i64 1, %6
store i64 %7, i64* %2
%8 = load i64, i64* %2
ret i64 %8
}

LLVM IR (-O2):
define i64 @topbit_mask() {
%1 = tail call i32 (...) @word_size()
%2 = add i32 %1, -1
%3 = zext i32 %2 to i64
%4 = shl nuw i64 1, %3
ret i64 %4
}
int psci_puts(const char *str) { return 0; }


x86 assembly (clang, -O0):
<psci_puts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<psci_puts>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @psci_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @psci_puts(i8* nocapture readnone %0) {
ret i32 0
}
int isxdigit(int c) {
  if (c <= 0x0 && c <= 0xFFFFFFFFFFFF)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isxdigit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jg     1134 <isxdigit+0x34>
movslq -0x8(%rbp),%rax
movabs $0xffffffffffff,%rcx
cmp    %rcx,%rax
jg     1134 <isxdigit+0x34>
movl   $0x1,-0x4(%rbp)
jmp    113b <isxdigit+0x3b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isxdigit>:
xor    %eax,%eax
test   %edi,%edi
setle  %al
ret

LLVM IR (-O0):
define i32 @isxdigit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = icmp sle i64 %8, 281474976710655
br i1 %9, label %10, label %11
10: ; preds = %6
store i32 1, i32* %2
br label %12
11: ; preds = %6, %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @isxdigit(i32 %0) {
%2 = icmp slt i32 %0, 1
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int atoi(char *);
int define_val(char *card_name) {
  int value = 0;
  switch (card_name[0]) {
  case 'K':
  case 'Q':
  case 'J':
    value = 10;
    break;
  case 'A':
    value = 11;
    break;
  case 'X':
    break;
  default:
    value = atoi(card_name);
  }
  return value;
}


x86 assembly (clang, -O0):
<define_val>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
add    $0xffffffbf,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0x17,%eax
ja     116d <define_val+0x5d>
mov    -0x18(%rbp),%rax
lea    0xeb9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0xa,-0xc(%rbp)
jmp    1179 <define_val+0x69>
movl   $0xb,-0xc(%rbp)
jmp    1179 <define_val+0x69>
jmp    1179 <define_val+0x69>
mov    -0x8(%rbp),%rdi
call   1030 <atoi@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<define_val>:
movsbl (%rdi),%ecx
add    $0xffffffbf,%ecx
cmp    $0x17,%ecx
ja     1139 <define_val+0x29>
xor    %eax,%eax
lea    0xedc(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0xa,%eax
ret
mov    $0xb,%eax
ret
jmp    1030 <atoi@plt>

LLVM IR (-O0):
define i32 @define_val(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
switch i32 %7, label %11 [
i32 75, label %8
i32 81, label %8
i32 74, label %8
i32 65, label %9
i32 88, label %10
]
8: ; preds = %1, %1, %1
store i32 10, i32* %3
br label %14
9: ; preds = %1
store i32 11, i32* %3
br label %14
10: ; preds = %1
br label %14
11: ; preds = %1
%12 = load i8*, i8** %2
%13 = call i32 @atoi(i8* %12)
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %10, %9, %8
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @define_val(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
switch i32 %3, label %6 [
i32 75, label %4
i32 81, label %4
i32 74, label %4
i32 65, label %5
i32 88, label %8
]
4: ; preds = %1, %1, %1
br label %8
5: ; preds = %1
br label %8
6: ; preds = %1
%7 = tail call i32 @atoi(i8* %0)
br label %8
8: ; preds = %6, %1, %5, %4
%9 = phi i32 [ %7, %6 ], [ 0, %1 ], [ 11, %5 ], [ 10, %4 ]
ret i32 %9
}
/* Type definitions */
typedef int uint8_t;
typedef int const uint16_t;

/* Variables and functions */
uint16_t mp2vpic_get_vbvdelay(const uint8_t *p_mp2vpic) {
  return ((p_mp2vpic[5] & 0x7) << 13) | (p_mp2vpic[6] << 5) |
         (p_mp2vpic[7] >> 3);
}


x86 assembly (clang, -O0):
<mp2vpic_get_vbvdelay>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%eax
and    $0x7,%eax
shl    $0xd,%eax
mov    -0x8(%rbp),%rcx
mov    0x18(%rcx),%ecx
shl    $0x5,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x1c(%rcx),%ecx
sar    $0x3,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp2vpic_get_vbvdelay>:
mov    0x14(%rdi),%eax
mov    0x18(%rdi),%ecx
shl    $0xd,%eax
movzwl %ax,%edx
shl    $0x5,%ecx
mov    0x1c(%rdi),%eax
sar    $0x3,%eax
or     %ecx,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @mp2vpic_get_vbvdelay(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 5
%5 = load i32, i32* %4
%6 = and i32 %5, 7
%7 = shl i32 %6, 13
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 6
%10 = load i32, i32* %9
%11 = shl i32 %10, 5
%12 = or i32 %7, %11
%13 = load i32*, i32** %2
%14 = getelementptr inbounds i32, i32* %13, i64 7
%15 = load i32, i32* %14
%16 = ashr i32 %15, 3
%17 = or i32 %12, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @mp2vpic_get_vbvdelay(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 5
%3 = load i32, i32* %2
%4 = shl i32 %3, 13
%5 = and i32 %4, 57344
%6 = getelementptr inbounds i32, i32* %0, i64 6
%7 = load i32, i32* %6
%8 = shl i32 %7, 5
%9 = or i32 %5, %8
%10 = getelementptr inbounds i32, i32* %0, i64 7
%11 = load i32, i32* %10
%12 = ashr i32 %11, 3
%13 = or i32 %9, %12
ret i32 %13
}
void Timer4A_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<Timer4A_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <Timer4A_Handler+0x9>
jmp    1109 <Timer4A_Handler+0x9>

x86 assembly (clang, -O2):
<Timer4A_Handler>:
jmp    1100 <Timer4A_Handler>

LLVM IR (-O0):
define void @Timer4A_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @Timer4A_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int);
void TOSH_SET_RED_LED_PIN() { set_io_bit(0x34, 2); }


x86 assembly (clang, -O0):
<TOSH_SET_RED_LED_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x34,%edi
mov    $0x2,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_SET_RED_LED_PIN>:
mov    $0x34,%edi
mov    $0x2,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_SET_RED_LED_PIN() {
%1 = call i32 @set_io_bit(i32 52, i32 2)
ret void
}

LLVM IR (-O2):
define void @TOSH_SET_RED_LED_PIN() {
%1 = tail call i32 @set_io_bit(i32 52, i32 2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int s_isfifo(mode_t mode) { return -1; }


x86 assembly (clang, -O0):
<s_isfifo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_isfifo>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @s_isfifo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @s_isfifo(i32 %0) {
ret i32 -1
}
unsigned long insert_bba(insn, value, errmsg)
unsigned long insn;
long value;
const char **errmsg;
{ return insn | (((insn >> 16) & 0x1f) << 11); }


x86 assembly (clang, -O0):
<insert_bba>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x10,%rcx
and    $0x1f,%rcx
shl    $0xb,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert_bba>:
mov    %rdi,%rax
shr    $0x5,%rax
and    $0xf800,%eax
or     %rdi,%rax
ret

LLVM IR (-O0):
define i64 @insert_bba(i64 %0, i64 %1, i8** %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8**
store i64 %0, i64* %4
store i64 %1, i64* %5
store i8** %2, i8*** %6
%7 = load i64, i64* %4
%8 = load i64, i64* %4
%9 = lshr i64 %8, 16
%10 = and i64 %9, 31
%11 = shl i64 %10, 11
%12 = or i64 %7, %11
ret i64 %12
}

LLVM IR (-O2):
define i64 @insert_bba(i64 %0, i64 %1, i8** nocapture readnone %2) {
%4 = lshr i64 %0, 5
%5 = and i64 %4, 63488
%6 = or i64 %5, %0
ret i64 %6
}
unsigned long sum_even_fibonacci(int a, int b, int c) {
  static unsigned long sum = 0;
  if (c > 4000000) {
    return 0;
  }
  sum += c;
  a = b + c;
  b = c + a;
  sum_even_fibonacci(a, b, a + b);
  return sum;
}


x86 assembly (clang, -O0):
<sum_even_fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x3d0900,-0x14(%rbp)
jle    113b <sum_even_fibonacci+0x2b>
movq   $0x0,-0x8(%rbp)
jmp    117b <sum_even_fibonacci+0x6b>
movslq -0x14(%rbp),%rax
add    0x2eea(%rip),%rax
mov    %rax,0x2ee3(%rip)
mov    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x14(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    -0xc(%rbp),%edx
add    -0x10(%rbp),%edx
call   1030 <sum_even_fibonacci@plt>
mov    0x2eb9(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_even_fibonacci>:
cmp    $0x3d0901,%edx
jl     111b <sum_even_fibonacci+0xb>
xor    %eax,%eax
ret
push   %rax
mov    %esi,%eax
movslq %edx,%rcx
add    %rcx,0x2f08(%rip)
add    %edx,%eax
add    %eax,%edx
add    %edx,%eax
mov    %edx,%esi
mov    %eax,%edx
call   1030 <sum_even_fibonacci@plt>
mov    0x2ef2(%rip),%rax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@sum_even_fibonacci.sum = internal global i64 0
define i64 @sum_even_fibonacci(i32 %0, i32 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp sgt i32 %8, 4000000
br i1 %9, label %10, label %11
10: ; preds = %3
store i64 0, i64* %4
br label %29
11: ; preds = %3
%12 = load i32, i32* %7
%13 = sext i32 %12 to i64
%14 = load i64, i64* @sum_even_fibonacci.sum
%15 = add i64 %14, %13
store i64 %15, i64* @sum_even_fibonacci.sum
%16 = load i32, i32* %6
%17 = load i32, i32* %7
%18 = add nsw i32 %16, %17
store i32 %18, i32* %5
%19 = load i32, i32* %7
%20 = load i32, i32* %5
%21 = add nsw i32 %19, %20
store i32 %21, i32* %6
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = load i32, i32* %5
%25 = load i32, i32* %6
%26 = add nsw i32 %24, %25
%27 = call i64 @sum_even_fibonacci(i32 %22, i32 %23, i32 %26)
%28 = load i64, i64* @sum_even_fibonacci.sum
store i64 %28, i64* %4
br label %29
29: ; preds = %11, %10
%30 = load i64, i64* %4
ret i64 %30
}

LLVM IR (-O2):
@sum_even_fibonacci.sum = internal unnamed_addr global i64 0
define i64 @sum_even_fibonacci(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, 4000000
br i1 %4, label %5, label %7
5: ; preds = %3, %7
%6 = phi i64 [ %15, %7 ], [ 0, %3 ]
ret i64 %6
7: ; preds = %3
%8 = sext i32 %2 to i64
%9 = load i64, i64* @sum_even_fibonacci.sum
%10 = add i64 %9, %8
store i64 %10, i64* @sum_even_fibonacci.sum
%11 = add nsw i32 %2, %1
%12 = add nsw i32 %11, %2
%13 = add nsw i32 %12, %11
%14 = tail call i64 @sum_even_fibonacci(i32 undef, i32 %12, i32 %13)
%15 = load i64, i64* @sum_even_fibonacci.sum
br label %5
}
int ansicres() { return (1); }


x86 assembly (clang, -O0):
<ansicres>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ansicres>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ansicres() {
ret i32 1
}

LLVM IR (-O2):
define i32 @ansicres() {
ret i32 1
}
/* Variables and functions */
size_t get_max_output_size(size_t in_size) {
  size_t out_size = 256 + 2 * in_size;
  return (out_size);
}


x86 assembly (clang, -O0):
<get_max_output_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x1,%rax
add    $0x100,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_max_output_size>:
lea    (%rdi,%rdi,1),%rax
add    $0x100,%rax
ret

LLVM IR (-O0):
define i64 @get_max_output_size(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = mul i64 2, %4
%6 = add i64 256, %5
store i64 %6, i64* %3
%7 = load i64, i64* %3
ret i64 %7
}

LLVM IR (-O2):
define i64 @get_max_output_size(i64 %0) {
%2 = shl i64 %0, 1
%3 = add i64 %2, 256
ret i64 %3
}
/* Type definitions */
struct timeval {
  int dummy;
};
typedef int /*<<< orphan*/ fd_set;

/* Variables and functions */
int select(int, int /*<<< orphan*/ *, int /*<<< orphan*/ *,
           int /*<<< orphan*/ *, struct timeval *);
int Selective_Select(int nooffds, fd_set *readfds, fd_set *writefds,
                     fd_set *exceptfds, struct timeval *timeout) {
  return select(nooffds, readfds, writefds, exceptfds, timeout);
}


x86 assembly (clang, -O0):
<Selective_Select>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <select@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Selective_Select>:
jmp    1030 <select@plt>

LLVM IR (-O0):
%struct.timeval = type { i32 }
define i32 @Selective_Select(i32 %0, i32* %1, i32* %2, i32* %3, %struct.timeval* %4) {
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca %struct.timeval*
store i32 %0, i32* %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i32* %3, i32** %9
store %struct.timeval* %4, %struct.timeval** %10
%11 = load i32, i32* %6
%12 = load i32*, i32** %7
%13 = load i32*, i32** %8
%14 = load i32*, i32** %9
%15 = load %struct.timeval*, %struct.timeval** %10
%16 = call i32 @select(i32 %11, i32* %12, i32* %13, i32* %14, %struct.timeval* %15)
ret i32 %16
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define i32 @Selective_Select(i32 %0, i32* %1, i32* %2, i32* %3, %struct.timeval* %4) {
%6 = tail call i32 @select(i32 %0, i32* %1, i32* %2, i32* %3, %struct.timeval* %4)
ret i32 %6
}
int __sys_write(int iFileHandle, char *pcBuffer, int iLength) { return 0; }


x86 assembly (clang, -O0):
<__sys_write>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sys_write>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__sys_write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @__sys_write(i32 %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
int __root(int i, int *array) {
  while (i != array[i]) {
    i = array[i];
  }
  return i;
}


x86 assembly (clang, -O0):
<__root>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
movslq -0x4(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
je     1132 <__root+0x32>
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x4(%rbp)
jmp    110b <__root+0xb>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__root>:
mov    %edi,%eax
movslq %edi,%rcx
mov    (%rsi,%rcx,4),%edi
cmp    %edi,%ecx
jne    1100 <__root>
ret

LLVM IR (-O0):
define i32 @__root(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
br label %5
5: ; preds = %13, %2
%6 = load i32, i32* %3
%7 = load i32*, i32** %4
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %7, i64 %9
%11 = load i32, i32* %10
%12 = icmp ne i32 %6, %11
br i1 %12, label %13, label %19
13: ; preds = %5
%14 = load i32*, i32** %4
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
store i32 %18, i32* %3
br label %5
19: ; preds = %5
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @__root(i32 %0, i32* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %0, %2 ], [ %7, %3 ]
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i32, i32* %1, i64 %5
%7 = load i32, i32* %6
%8 = icmp eq i32 %4, %7
br i1 %8, label %9, label %3
9: ; preds = %3
ret i32 %4
}
int atomicIncrement(volatile int *ptr) {
  unsigned char ret;
  asm volatile("lock\n"
               "incl %0\n"
               "setne %1"
               : "=m"(*ptr), "=qm"(ret)
               : "m"(*ptr)
               : "memory");
  return ret;
}


x86 assembly (clang, -O0):
<atomicIncrement>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
lock incl (%rax)
setne  -0x9(%rbp)
movzbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomicIncrement>:
lock incl (%rdi)
setne  -0x1(%rsp)
movzbl -0x1(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @atomicIncrement(i32* %0) {
%2 = alloca i32*
%3 = alloca i8
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32*, i32** %2
%6 = load i8, i8* %3
%7 = zext i8 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @atomicIncrement(i32* %0) {
%2 = alloca i8
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
ret i32 %4
}
/* Type definitions */
struct t_nfa {
  int dummy;
};
struct t_dfa {
  int dummy;
};

/* Variables and functions */
struct t_dfa *add_nfa2dfa(struct t_nfa *pn) {
  return NULL;
}


x86 assembly (clang, -O0):
<add_nfa2dfa>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_nfa2dfa>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.t_dfa = type { i32 }
%struct.t_nfa = type { i32 }
define %struct.t_dfa* @add_nfa2dfa(%struct.t_nfa* %0) {
%2 = alloca %struct.t_nfa*
store %struct.t_nfa* %0, %struct.t_nfa** %2
ret %struct.t_dfa* null
}

LLVM IR (-O2):
%struct.t_dfa = type { i32 }
%struct.t_nfa = type { i32 }
define noalias %struct.t_dfa* @add_nfa2dfa(%struct.t_nfa* nocapture readnone %0) {
ret %struct.t_dfa* null
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, int, int, int);
int addWithMessage(char *msg, int x, int y) {
  printf("%s: %d + %d = %d\n", msg, x, y, x + y);
  return x + y;
}


x86 assembly (clang, -O0):
<addWithMessage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%r8d
add    -0x10(%rbp),%r8d
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addWithMessage>:
push   %rbx
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
lea    (%rcx,%rdx,1),%ebx
lea    0xede(%rip),%rdi
mov    %ebx,%r8d
call   1030 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"%s: %d + %d = %d\0A\00"
define i32 @addWithMessage(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = add nsw i32 %10, %11
%13 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %7, i32 %8, i32 %9, i32 %12)
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = add nsw i32 %14, %15
ret i32 %16
}

LLVM IR (-O2):
@.str = [18 x i8] c"%s: %d + %d = %d\0A\00"
define i32 @addWithMessage(i8* %0, i32 %1, i32 %2) {
%4 = add nsw i32 %2, %1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1, i32 %2, i32 %4)
ret i32 %4
}
void msg_setcmd(char *msg, int cmd) { msg[4] = cmd; }


x86 assembly (clang, -O0):
<msg_setcmd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg_setcmd>:
mov    %sil,0x4(%rdi)
ret

LLVM IR (-O0):
define void @msg_setcmd(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = trunc i32 %5 to i8
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 4
store i8 %6, i8* %8
ret void
}

LLVM IR (-O2):
define void @msg_setcmd(i8* nocapture writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i8
%4 = getelementptr inbounds i8, i8* %0, i64 4
store i8 %3, i8* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sim_debug();
void sim_cambri_write(int c, const char *fmt, ...) { sim_debug(); }


x86 assembly (clang, -O0):
<sim_cambri_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
call   1030 <sim_debug@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sim_cambri_write>:
xor    %eax,%eax
jmp    1030 <sim_debug@plt>

LLVM IR (-O0):
define void @sim_cambri_write(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = call i32 (...) @sim_debug()
ret void
}

LLVM IR (-O2):
define void @sim_cambri_write(i32 %0, i8* nocapture readnone %1, ...) {
%3 = tail call i32 (...) @sim_debug()
ret void
}