xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int a, b, c;
  scanf("%d", &a);
  b = a * a;
  printf("\n%d", b);
  c = b * a;
  printf("\n%d", c);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed2(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xe9b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xed6(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%ebx
imul   %ebx,%ebx
lea    0xebd(%rip),%r14
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
imul   0x4(%rsp),%ebx
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"\0A%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = load i32, i32* %1
%7 = mul nsw i32 %5, %6
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
%10 = load i32, i32* %2
%11 = load i32, i32* %1
%12 = mul nsw i32 %10, %11
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"\0A%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = mul nsw i32 %4, %4
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
%7 = load i32, i32* %1
%8 = mul nsw i32 %7, %5
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int /*<<< orphan*/ _exit(int);
ssize_t read(int fd, void *buf, size_t count) {
  _exit(-1);
  return -1;
}


x86 assembly (clang, -O0):
<read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xffffffff,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<read>:
push   %rax
mov    $0xffffffff,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define i32 @read(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = call i32 @_exit(i32 -1)
unreachable
}

LLVM IR (-O2):
define i32 @read(i32 %0, i8* nocapture readnone %1, i64 %2) {
%4 = tail call i32 @_exit(i32 -1)
unreachable
}
void LPCChannelStatusClear(unsigned long ulBase, unsigned long ulChannel,
                           unsigned long ulStatus) {
  unsigned long ulTemp;
  ;
  ;
  ;
  ulTemp =
      (*((volatile unsigned long *)(ulBase + 0x00000014 + (ulChannel * 0x10))));
  ulTemp &= ~ulStatus;
  (*((volatile unsigned long *)(ulBase + 0x00000014 + (ulChannel * 0x10)))) =
      ulTemp;
}


x86 assembly (clang, -O0):
<LPCChannelStatusClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    $0x14,%rax
mov    -0x10(%rbp),%rcx
shl    $0x4,%rcx
add    %rcx,%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
xor    $0xffffffffffffffff,%rax
and    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    $0x14,%rax
mov    -0x10(%rbp),%rdx
shl    $0x4,%rdx
add    %rdx,%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LPCChannelStatusClear>:
shl    $0x4,%rsi
not    %rdx
and    %rdx,0x14(%rdi,%rsi,1)
ret

LLVM IR (-O0):
define void @LPCChannelStatusClear(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i64, i64* %4
%9 = add i64 %8, 20
%10 = load i64, i64* %5
%11 = mul i64 %10, 16
%12 = add i64 %9, %11
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
store i64 %14, i64* %7
%15 = load i64, i64* %6
%16 = xor i64 %15, -1
%17 = load i64, i64* %7
%18 = and i64 %17, %16
store i64 %18, i64* %7
%19 = load i64, i64* %7
%20 = load i64, i64* %4
%21 = add i64 %20, 20
%22 = load i64, i64* %5
%23 = mul i64 %22, 16
%24 = add i64 %21, %23
%25 = inttoptr i64 %24 to i64*
store volatile i64 %19, i64* %25
ret void
}

LLVM IR (-O2):
define void @LPCChannelStatusClear(i64 %0, i64 %1, i64 %2) {
%4 = add i64 %0, 20
%5 = shl i64 %1, 4
%6 = add i64 %4, %5
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = xor i64 %2, -1
%10 = and i64 %8, %9
store volatile i64 %10, i64* %7
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int const uint16_t;

/* Variables and functions */
uint16_t u8array_to_u16(const uint8_t *item, int offset) {
  return (item[offset] | (item[offset + 1] << 8));
}


x86 assembly (clang, -O0):
<u8array_to_u16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%edx
add    $0x1,%edx
movslq %edx,%rdx
mov    (%rcx,%rdx,4),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<u8array_to_u16>:
movslq %esi,%rcx
mov    0x4(%rdi,%rcx,4),%eax
shl    $0x8,%eax
or     (%rdi,%rcx,4),%eax
ret

LLVM IR (-O0):
define i32 @u8array_to_u16(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %5, i64 %7
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %10, i64 %13
%15 = load i32, i32* %14
%16 = shl i32 %15, 8
%17 = or i32 %9, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @u8array_to_u16(i32* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i32, i32* %0, i64 %3
%5 = load i32, i32* %4
%6 = add nsw i32 %1, 1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = shl i32 %9, 8
%11 = or i32 %10, %5
ret i32 %11
}
/* Type definitions */
struct hdr_histogram {
  int dummy;
};
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
scalar_t__ hdr_count_at_index(struct hdr_histogram const *, int /*<<< orphan*/);
int /*<<< orphan*/ non_zero_min(struct hdr_histogram const *);
int64_t hdr_min(const struct hdr_histogram *h) {
  if (0 < hdr_count_at_index(h, 0)) {
    return 0;
  }
  return non_zero_min(h);
}


x86 assembly (clang, -O0):
<hdr_min>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1040 <hdr_count_at_index@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
jge    1151 <hdr_min+0x31>
movl   $0x0,-0x4(%rbp)
jmp    115d <hdr_min+0x3d>
mov    -0x10(%rbp),%rdi
call   1030 <non_zero_min@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdr_min>:
push   %rbx
mov    %rdi,%rbx
xor    %esi,%esi
call   1040 <hdr_count_at_index@plt>
test   %rax,%rax
jle    1134 <hdr_min+0x14>
xor    %eax,%eax
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <non_zero_min@plt>

LLVM IR (-O0):
%struct.hdr_histogram = type { i32 }
define i32 @hdr_min(%struct.hdr_histogram* %0) {
%2 = alloca i32
%3 = alloca %struct.hdr_histogram*
store %struct.hdr_histogram* %0, %struct.hdr_histogram** %3
%4 = load %struct.hdr_histogram*, %struct.hdr_histogram** %3
%5 = call i64 @hdr_count_at_index(%struct.hdr_histogram* %4, i32 0)
%6 = icmp slt i64 0, %5
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %11
8: ; preds = %1
%9 = load %struct.hdr_histogram*, %struct.hdr_histogram** %3
%10 = call i32 @non_zero_min(%struct.hdr_histogram* %9)
store i32 %10, i32* %2
br label %11
11: ; preds = %8, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
%struct.hdr_histogram = type { i32 }
define i32 @hdr_min(%struct.hdr_histogram* %0) {
%2 = tail call i64 @hdr_count_at_index(%struct.hdr_histogram* %0, i32 0)
%3 = icmp sgt i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @non_zero_min(%struct.hdr_histogram* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ 0, %1 ]
ret i32 %7
}
void RasterClkConfig(unsigned int baseAddr, unsigned int pClk,
                     unsigned int moduleClk) {
  unsigned int clkDiv;
  clkDiv = moduleClk / pClk;
  (*((volatile unsigned int *)(baseAddr + (0x4)))) = (0x00000001u);
  (*((volatile unsigned int *)(baseAddr + (0x4)))) |= (clkDiv << (0x00000008u));
}


x86 assembly (clang, -O0):
<RasterClkConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
xor    %edx,%edx
divl   -0x8(%rbp)
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    $0x4,%eax
mov    %eax,%eax
movl   $0x1,(%rax)
mov    -0x10(%rbp),%edx
shl    $0x8,%edx
mov    -0x4(%rbp),%eax
add    $0x4,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterClkConfig>:
mov    %edx,%eax
xor    %edx,%edx
div    %esi
add    $0x4,%edi
movl   $0x1,(%rdi)
shl    $0x8,%eax
or     %eax,(%rdi)
ret

LLVM IR (-O0):
define void @RasterClkConfig(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = udiv i32 %8, %9
store i32 %10, i32* %7
%11 = load i32, i32* %4
%12 = add i32 %11, 4
%13 = zext i32 %12 to i64
%14 = inttoptr i64 %13 to i32*
store volatile i32 1, i32* %14
%15 = load i32, i32* %7
%16 = shl i32 %15, 8
%17 = load i32, i32* %4
%18 = add i32 %17, 4
%19 = zext i32 %18 to i64
%20 = inttoptr i64 %19 to i32*
%21 = load volatile i32, i32* %20
%22 = or i32 %21, %16
store volatile i32 %22, i32* %20
ret void
}

LLVM IR (-O2):
define void @RasterClkConfig(i32 %0, i32 %1, i32 %2) {
%4 = udiv i32 %2, %1
%5 = add i32 %0, 4
%6 = zext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
store volatile i32 1, i32* %7
%8 = shl i32 %4, 8
%9 = load volatile i32, i32* %7
%10 = or i32 %9, %8
store volatile i32 %10, i32* %7
ret void
}
void BRAKE_ADC_ISR1(void) {}


x86 assembly (clang, -O0):
<BRAKE_ADC_ISR1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BRAKE_ADC_ISR1>:
ret

LLVM IR (-O0):
define void @BRAKE_ADC_ISR1() {
ret void
}

LLVM IR (-O2):
define void @BRAKE_ADC_ISR1() {
ret void
}
void __DELETE_org_xmlvm_runtime_FinalizerNotifier(void *me, void *client_data) {
}


x86 assembly (clang, -O0):
<__DELETE_org_xmlvm_runtime_FinalizerNotifier>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DELETE_org_xmlvm_runtime_FinalizerNotifier>:
ret

LLVM IR (-O0):
define void @__DELETE_org_xmlvm_runtime_FinalizerNotifier(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__DELETE_org_xmlvm_runtime_FinalizerNotifier(i8* nocapture %0, i8* nocapture %1) {
ret void
}
void fat_setClusterRecord12part1(unsigned char *buf, unsigned int cluster,
                                 int type) {
  if (type) {
    buf[0] = (buf[0] & 0x0F) + ((cluster & 0x0F) << 4);
  } else {
    buf[0] = (cluster & 0xFF);
  }
}


x86 assembly (clang, -O0):
<fat_setClusterRecord12part1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     113a <fat_setClusterRecord12part1+0x3a>
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
and    $0xf,%eax
mov    -0xc(%rbp),%ecx
and    $0xf,%ecx
shl    $0x4,%ecx
add    %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
jmp    114a <fat_setClusterRecord12part1+0x4a>
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fat_setClusterRecord12part1>:
test   %edx,%edx
je     1113 <fat_setClusterRecord12part1+0x13>
movzbl (%rdi),%eax
and    $0xf,%eax
shl    $0x4,%esi
movzbl %sil,%esi
or     %eax,%esi
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @fat_setClusterRecord12part1(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %22
9: ; preds = %3
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 0
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = and i32 %13, 15
%15 = load i32, i32* %5
%16 = and i32 %15, 15
%17 = shl i32 %16, 4
%18 = add i32 %14, %17
%19 = trunc i32 %18 to i8
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i64 0
store i8 %19, i8* %21
br label %28
22: ; preds = %3
%23 = load i32, i32* %5
%24 = and i32 %23, 255
%25 = trunc i32 %24 to i8
%26 = load i8*, i8** %4
%27 = getelementptr inbounds i8, i8* %26, i64 0
store i8 %25, i8* %27
br label %28
28: ; preds = %22, %9
ret void
}

LLVM IR (-O2):
define void @fat_setClusterRecord12part1(i8* nocapture %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %12, label %5
5: ; preds = %3
%6 = load i8, i8* %0
%7 = and i8 %6, 15
%8 = zext i8 %7 to i32
%9 = shl i32 %1, 4
%10 = and i32 %9, 240
%11 = or i32 %10, %8
br label %12
12: ; preds = %3, %5
%13 = phi i32 [ %11, %5 ], [ %1, %3 ]
%14 = trunc i32 %13 to i8
store i8 %14, i8* %0
ret void
}
void foo_2_1_1_1_1_2_2_2_1() {}


x86 assembly (clang, -O0):
<foo_2_1_1_1_1_2_2_2_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_1_1_1_2_2_2_1>:
ret

LLVM IR (-O0):
define void @foo_2_1_1_1_1_2_2_2_1() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_1_1_1_2_2_2_1() {
ret void
}
/* Variables and functions */
char *strchr(char const *, char);
char *cpuset_nexttok(const char *c) {
  char *r = strchr(c + 1, ',');
  if (r)
    return r + 1;
  return NULL;
}


x86 assembly (clang, -O0):
<cpuset_nexttok>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
mov    $0x2c,%esi
call   1030 <strchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     114e <cpuset_nexttok+0x3e>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1156 <cpuset_nexttok+0x46>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuset_nexttok>:
push   %rax
add    $0x1,%rdi
mov    $0x2c,%esi
call   1030 <strchr@plt>
lea    0x1(%rax),%rcx
test   %rax,%rax
cmovne %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @cpuset_nexttok(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = call i8* @strchr(i8* %6, i8 signext 44)
store i8* %7, i8** %4
%8 = load i8*, i8** %4
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i64 1
store i8* %12, i8** %2
br label %14
13: ; preds = %1
store i8* null, i8** %2
br label %14
14: ; preds = %13, %10
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define i8* @cpuset_nexttok(i8* %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = tail call i8* @strchr(i8* %2, i8 signext 44)
%4 = icmp eq i8* %3, null
%5 = getelementptr inbounds i8, i8* %3, i64 1
%6 = select i1 %4, i8* null, i8* %5
ret i8* %6
}
void do_test() {}


x86 assembly (clang, -O0):
<do_test>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_test>:
ret

LLVM IR (-O0):
define void @do_test() {
ret void
}

LLVM IR (-O2):
define void @do_test() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned int);
int /*<<< orphan*/ put8(int);
void inc_m32(unsigned int *m32) {
  put8(0xFF);
  put8(0x05);
  put32((unsigned int)(m32));
}


x86 assembly (clang, -O0):
<inc_m32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xff,%edi
call   1030 <put8@plt>
mov    $0x5,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%rax
mov    %eax,%edi
call   1040 <put32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inc_m32>:
push   %rbx
mov    %rdi,%rbx
mov    $0xff,%edi
call   1030 <put8@plt>
mov    $0x5,%edi
call   1030 <put8@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @inc_m32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = call i32 @put8(i32 255)
%4 = call i32 @put8(i32 5)
%5 = load i32*, i32** %2
%6 = ptrtoint i32* %5 to i32
%7 = call i32 @put32(i32 %6)
ret void
}

LLVM IR (-O2):
define void @inc_m32(i32* %0) {
%2 = tail call i32 @put8(i32 255)
%3 = tail call i32 @put8(i32 5)
%4 = ptrtoint i32* %0 to i64
%5 = trunc i64 %4 to i32
%6 = tail call i32 @put32(i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hal_aes_init();
int /*<<< orphan*/ svc_alarm_init();
int /*<<< orphan*/ svc_countdown_init();
void svc_init(void) {
  svc_alarm_init();
  svc_countdown_init();
  hal_aes_init();
}


x86 assembly (clang, -O0):
<svc_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <svc_alarm_init@plt>
mov    $0x0,%al
call   1050 <svc_countdown_init@plt>
mov    $0x0,%al
call   1030 <hal_aes_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<svc_init>:
push   %rax
xor    %eax,%eax
call   1040 <svc_alarm_init@plt>
xor    %eax,%eax
call   1050 <svc_countdown_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <hal_aes_init@plt>

LLVM IR (-O0):
define void @svc_init() {
%1 = call i32 (...) @svc_alarm_init()
%2 = call i32 (...) @svc_countdown_init()
%3 = call i32 (...) @hal_aes_init()
ret void
}

LLVM IR (-O2):
define void @svc_init() {
%1 = tail call i32 (...) @svc_alarm_init()
%2 = tail call i32 (...) @svc_countdown_init()
%3 = tail call i32 (...) @hal_aes_init()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ i2c_start();
int /*<<< orphan*/ i2c_stop();
int /*<<< orphan*/ i2c_write(unsigned char);
void Mem24_Write(unsigned int addr, unsigned char data, unsigned char page) {
  i2c_start();
  i2c_write(0xA4 | (page << 7));
  i2c_write(addr >> 8);
  i2c_write(addr & 0xFF);
  i2c_write(data);
  i2c_stop();
}


x86 assembly (clang, -O0):
<Mem24_Write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %edi,-0x4(%rbp)
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    $0x0,%al
call   1050 <i2c_start@plt>
movzbl -0x6(%rbp),%eax
shl    $0x7,%eax
or     $0xa4,%eax
movzbl %al,%edi
call   1030 <i2c_write@plt>
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
movzbl %al,%edi
call   1030 <i2c_write@plt>
mov    -0x4(%rbp),%eax
and    $0xff,%eax
movzbl %al,%edi
call   1030 <i2c_write@plt>
movzbl -0x5(%rbp),%edi
call   1030 <i2c_write@plt>
mov    $0x0,%al
call   1040 <i2c_stop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mem24_Write>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
xor    %eax,%eax
call   1050 <i2c_start@plt>
mov    $0xa4,%edi
call   1030 <i2c_write@plt>
movzbl %bh,%edi
call   1030 <i2c_write@plt>
movzbl %bl,%edi
call   1030 <i2c_write@plt>
mov    %ebp,%edi
call   1030 <i2c_write@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <i2c_stop@plt>

LLVM IR (-O0):
define void @Mem24_Write(i32 %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8
store i32 %0, i32* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = call i32 (...) @i2c_start()
%8 = load i8, i8* %6
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 7
%11 = or i32 164, %10
%12 = trunc i32 %11 to i8
%13 = call i32 @i2c_write(i8 zeroext %12)
%14 = load i32, i32* %4
%15 = lshr i32 %14, 8
%16 = trunc i32 %15 to i8
%17 = call i32 @i2c_write(i8 zeroext %16)
%18 = load i32, i32* %4
%19 = and i32 %18, 255
%20 = trunc i32 %19 to i8
%21 = call i32 @i2c_write(i8 zeroext %20)
%22 = load i8, i8* %5
%23 = call i32 @i2c_write(i8 zeroext %22)
%24 = call i32 (...) @i2c_stop()
ret void
}

LLVM IR (-O2):
define void @Mem24_Write(i32 %0, i8 zeroext %1, i8 zeroext %2) {
%4 = tail call i32 (...) @i2c_start()
%5 = tail call i32 @i2c_write(i8 zeroext -92)
%6 = lshr i32 %0, 8
%7 = trunc i32 %6 to i8
%8 = tail call i32 @i2c_write(i8 zeroext %7)
%9 = trunc i32 %0 to i8
%10 = tail call i32 @i2c_write(i8 zeroext %9)
%11 = tail call i32 @i2c_write(i8 zeroext %1)
%12 = tail call i32 (...) @i2c_stop()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ myCollectLines();
int main(void) {
  myCollectLines();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <myCollectLines@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <myCollectLines@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @myCollectLines()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @myCollectLines()
ret i32 0
}
/* Type definitions */
struct ident {
  int dummy;
};

/* Variables and functions */
struct ident *create_hashed_ident(char const *, int, int /*<<< orphan*/);
int /*<<< orphan*/ hash_name(char const *, int);
int strlen(char const *);
struct ident *built_in_ident(const char *name) {
  int len = strlen(name);
  return create_hashed_ident(name, len, hash_name(name, len));
}


x86 assembly (clang, -O0):
<built_in_ident>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <hash_name@plt>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    %eax,%edx
call   1050 <create_hashed_ident@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<built_in_ident>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <hash_name@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <create_hashed_ident@plt>

LLVM IR (-O0):
%struct.ident = type { i32 }
define %struct.ident* @built_in_ident(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i8*, i8** %2
%7 = load i32, i32* %3
%8 = load i8*, i8** %2
%9 = load i32, i32* %3
%10 = call i32 @hash_name(i8* %8, i32 %9)
%11 = call %struct.ident* @create_hashed_ident(i8* %6, i32 %7, i32 %10)
ret %struct.ident* %11
}

LLVM IR (-O2):
%struct.ident = type { i32 }
define %struct.ident* @built_in_ident(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @hash_name(i8* %0, i32 %2)
%4 = tail call %struct.ident* @create_hashed_ident(i8* %0, i32 %2, i32 %3)
ret %struct.ident* %4
}
/* Variables and functions */
int /*<<< orphan*/ FRqRefreshDir();
int /*<<< orphan*/ FRqSetName();
void FRqDirChanged() {
  FRqRefreshDir();
  FRqSetName();
}


x86 assembly (clang, -O0):
<FRqDirChanged>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <FRqRefreshDir@plt>
mov    $0x0,%al
call   1030 <FRqSetName@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FRqDirChanged>:
push   %rax
xor    %eax,%eax
call   1040 <FRqRefreshDir@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <FRqSetName@plt>

LLVM IR (-O0):
define void @FRqDirChanged() {
%1 = call i32 (...) @FRqRefreshDir()
%2 = call i32 (...) @FRqSetName()
ret void
}

LLVM IR (-O2):
define void @FRqDirChanged() {
%1 = tail call i32 (...) @FRqRefreshDir()
%2 = tail call i32 (...) @FRqSetName()
ret void
}
/* Variables and functions */
size_t INT_MAX;
void *av_malloc(size_t);
void *av_malloc_array(size_t nmemb, size_t size) {
  if (!size || nmemb >= INT_MAX / size)
    return NULL;
  return av_malloc(nmemb * size);
}


x86 assembly (clang, -O0):
<av_malloc_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1155 <av_malloc_array+0x45>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x18(%rbp)
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
cmp    %rcx,%rax
jb     1162 <av_malloc_array+0x52>
movq   $0x0,-0x8(%rbp)
jmp    1174 <av_malloc_array+0x64>
mov    -0x10(%rbp),%rdi
imul   -0x18(%rbp),%rdi
call   1030 <av_malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_malloc_array>:
test   %rsi,%rsi
je     114a <av_malloc_array+0x3a>
mov    0x2ecc(%rip),%rax
mov    (%rax),%rax
mov    %rax,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1141 <av_malloc_array+0x31>
xor    %edx,%edx
div    %rsi
cmp    %rdi,%rax
jbe    114a <av_malloc_array+0x3a>
imul   %rdi,%rsi
mov    %rsi,%rdi
jmp    1030 <av_malloc@plt>
xor    %edx,%edx
div    %esi
cmp    %rdi,%rax
ja     1135 <av_malloc_array+0x25>
xor    %eax,%eax
ret

LLVM IR (-O0):
@INT_MAX = global i64 0
define i8* @av_malloc_array(i64 %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i64, i64* %4
%10 = load i64, i64* @INT_MAX
%11 = load i64, i64* %5
%12 = udiv i64 %10, %11
%13 = icmp uge i64 %9, %12
br i1 %13, label %14, label %15
14: ; preds = %8, %2
store i8* null, i8** %3
br label %20
15: ; preds = %8
%16 = load i64, i64* %4
%17 = load i64, i64* %5
%18 = mul i64 %16, %17
%19 = call i8* @av_malloc(i64 %18)
store i8* %19, i8** %3
br label %20
20: ; preds = %15, %14
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
@INT_MAX = global i64 0
define i8* @av_malloc_array(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = load i64, i64* @INT_MAX
%6 = udiv i64 %5, %1
%7 = icmp ugt i64 %6, %0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = mul i64 %1, %0
%10 = tail call i8* @av_malloc(i64 %9)
br label %11
11: ; preds = %2, %4, %8
%12 = phi i8* [ %10, %8 ], [ null, %4 ], [ null, %2 ]
ret i8* %12
}
char *strcpy(char *dest, const char *src) {
  char *tmp = dest;
  while ((*tmp++ = *src++))
    ;
  return dest;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     1143 <strcpy+0x43>
jmp    1114 <strcpy+0x14>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rsi,%rcx,1),%edx
mov    %dl,(%rax,%rcx,1)
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %14, %2
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %4
%10 = load i8, i8* %8
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %5
store i8 %10, i8* %11
%13 = icmp ne i8 %10, 0
br i1 %13, label %14, label %15
14: ; preds = %7
br label %7
15: ; preds = %7
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %6, %3 ]
%5 = phi i8* [ %0, %2 ], [ %8, %3 ]
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = load i8, i8* %4
%8 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %7, i8* %5
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %0
}
/* Type definitions */
struct t_config_option {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ irc_nick_nicklist_set_color_all();
void irc_config_change_look_color_nicks_in_nicklist(
    const void *pointer, void *data, struct t_config_option *option) {
  (void)pointer;
  (void)data;
  (void)option;
  irc_nick_nicklist_set_color_all();
}


x86 assembly (clang, -O0):
<irc_config_change_look_color_nicks_in_nicklist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1030 <irc_nick_nicklist_set_color_all@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_config_change_look_color_nicks_in_nicklist>:
xor    %eax,%eax
jmp    1030 <irc_nick_nicklist_set_color_all@plt>

LLVM IR (-O0):
%struct.t_config_option = type { i32 }
define void @irc_config_change_look_color_nicks_in_nicklist(i8* %0, i8* %1, %struct.t_config_option* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca %struct.t_config_option*
store i8* %0, i8** %4
store i8* %1, i8** %5
store %struct.t_config_option* %2, %struct.t_config_option** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load %struct.t_config_option*, %struct.t_config_option** %6
%10 = call i32 (...) @irc_nick_nicklist_set_color_all()
ret void
}

LLVM IR (-O2):
%struct.t_config_option = type { i32 }
define void @irc_config_change_look_color_nicks_in_nicklist(i8* nocapture readnone %0, i8* nocapture readnone %1, %struct.t_config_option* nocapture readnone %2) {
%4 = tail call i32 (...) @irc_nick_nicklist_set_color_all()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void printi_vec(int *A, int nA) {
  int i = 0;
  while (i < nA) {
    printf("%i ", A[i]);
    ++i;
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<printi_vec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <printi_vec+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <printi_vec+0x16>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printi_vec>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <printi_vec+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <printi_vec+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%i \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @printi_vec(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %10, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
%20 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%i \00"
define void @printi_vec(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
int execute_eventfd2() { return 0; }


x86 assembly (clang, -O0):
<execute_eventfd2>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_eventfd2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_eventfd2() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_eventfd2() {
ret i32 0
}
void foo362() {}


x86 assembly (clang, -O0):
<foo362>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo362>:
ret

LLVM IR (-O0):
define void @foo362() {
ret void
}

LLVM IR (-O2):
define void @foo362() {
ret void
}
int HelpItem28(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem28>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem28>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem28() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem28() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
void sysapi_sleep_in_secs(int secs) { sleep(secs); }


x86 assembly (clang, -O0):
<sysapi_sleep_in_secs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysapi_sleep_in_secs>:
jmp    1030 <sleep@plt>

LLVM IR (-O0):
define void @sysapi_sleep_in_secs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sleep(i32 %3)
ret void
}

LLVM IR (-O2):
define void @sysapi_sleep_in_secs(i32 %0) {
%2 = tail call i32 @sleep(i32 %0)
ret void
}
/* Variables and functions */
int write(int, unsigned char *, int);
void put(unsigned char c, int fd) {
  while (write(fd, &c, 1) == -1)
    ;
}


x86 assembly (clang, -O0):
<put>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
cmp    $0xffffffff,%eax
jne    1140 <put+0x30>
jmp    1121 <put+0x11>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%r14
mov    %ebx,%edi
mov    %r14,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
cmp    $0xffffffff,%eax
je     1120 <put+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @put(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = call i32 @write(i32 %6, i8* %3, i32 1)
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %10
9: ; preds = %5
br label %5
10: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @put(i8 zeroext %0, i32 %1) {
%3 = alloca i8
store i8 %0, i8* %3
br label %4
4: ; preds = %4, %2
%5 = call i32 @write(i32 %1, i8* %3, i32 1)
%6 = icmp eq i32 %5, -1
br i1 %6, label %4, label %7
7: ; preds = %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ UARTConfigSet(unsigned long, unsigned long, int);
int /*<<< orphan*/ UARTEnableLIN(unsigned long);
void UARTLINConfig(unsigned long ulBase, unsigned long ulBaud,
                   unsigned long ulConfig) {
  ;

  ;
  UARTConfigSet(ulBase, ulBaud, 0x00000000 | 0x00000000 | 0x00000000);
  UARTEnableLIN(ulBase);
  (*((volatile unsigned long *)(ulBase + 0x00000010))) &= ~0x00000020;
  (*((volatile unsigned long *)(ulBase + 0x00000010))) = (ulConfig);
}


x86 assembly (clang, -O0):
<UARTLINConfig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1040 <UARTConfigSet@plt>
mov    -0x8(%rbp),%rdi
call   1030 <UARTEnableLIN@plt>
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rcx
and    $0xffffffffffffffdf,%rcx
mov    %rcx,0x10(%rax)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTLINConfig>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
xor    %edx,%edx
call   1040 <UARTConfigSet@plt>
mov    %rbx,%rdi
call   1030 <UARTEnableLIN@plt>
andq   $0xffffffffffffffdf,0x10(%rbx)
mov    %r14,0x10(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @UARTLINConfig(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = call i32 @UARTConfigSet(i64 %7, i64 %8, i32 0)
%10 = load i64, i64* %4
%11 = call i32 @UARTEnableLIN(i64 %10)
%12 = load i64, i64* %4
%13 = add i64 %12, 16
%14 = inttoptr i64 %13 to i64*
%15 = load volatile i64, i64* %14
%16 = and i64 %15, -33
store volatile i64 %16, i64* %14
%17 = load i64, i64* %6
%18 = load i64, i64* %4
%19 = add i64 %18, 16
%20 = inttoptr i64 %19 to i64*
store volatile i64 %17, i64* %20
ret void
}

LLVM IR (-O2):
define void @UARTLINConfig(i64 %0, i64 %1, i64 %2) {
%4 = tail call i32 @UARTConfigSet(i64 %0, i64 %1, i32 0)
%5 = tail call i32 @UARTEnableLIN(i64 %0)
%6 = add i64 %0, 16
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, -33
store volatile i64 %9, i64* %7
store volatile i64 %2, i64* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sort_test();
int main() {
  sort_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <sort_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <sort_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @sort_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @sort_test()
ret i32 0
}
/* Variables and functions */
size_t ngx_txid_base32_encode_len(size_t len) { return (len + 4) / 5 * 8; }


x86 assembly (clang, -O0):
<ngx_txid_base32_encode_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
mov    $0x5,%ecx
xor    %edx,%edx
div    %rcx
shl    $0x3,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ngx_txid_base32_encode_len>:
lea    0x4(%rdi),%rax
movabs $0xcccccccccccccccd,%rcx
cc cc cc
mul    %rcx
lea    (%rdx,%rdx,1),%rax
and    $0xfffffffffffffff8,%rax
ret

LLVM IR (-O0):
define i64 @ngx_txid_base32_encode_len(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 4
%5 = udiv i64 %4, 5
%6 = mul i64 %5, 8
ret i64 %6
}

LLVM IR (-O2):
define i64 @ngx_txid_base32_encode_len(i64 %0) {
%2 = add i64 %0, 4
%3 = udiv i64 %2, 5
%4 = shl i64 %3, 3
ret i64 %4
}
/* Type definitions */
struct cdaAli {
  int dummy;
};

/* Variables and functions */
scalar_t__ cdaCloneIsReverse(struct cdaAli *);
char cdaCloneStrand(struct cdaAli *cda) {
  return cdaCloneIsReverse(cda) ? '-' : '+';
}


x86 assembly (clang, -O0):
<cdaCloneStrand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cdaCloneIsReverse@plt>
mov    %rax,%rdx
mov    $0x2b,%eax
mov    $0x2d,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdaCloneStrand>:
push   %rax
call   1030 <cdaCloneIsReverse@plt>
test   %rax,%rax
setne  %al
add    %al,%al
add    $0x2b,%al
pop    %rcx
ret

LLVM IR (-O0):
%struct.cdaAli = type { i32 }
define signext i8 @cdaCloneStrand(%struct.cdaAli* %0) {
%2 = alloca %struct.cdaAli*
store %struct.cdaAli* %0, %struct.cdaAli** %2
%3 = load %struct.cdaAli*, %struct.cdaAli** %2
%4 = call i64 @cdaCloneIsReverse(%struct.cdaAli* %3)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 45, i32 43
%8 = trunc i32 %7 to i8
ret i8 %8
}

LLVM IR (-O2):
%struct.cdaAli = type { i32 }
define signext i8 @cdaCloneStrand(%struct.cdaAli* %0) {
%2 = tail call i64 @cdaCloneIsReverse(%struct.cdaAli* %0)
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i8 43, i8 45
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ date_le(int, int, int, int, int, int);
int date_gt(int year, int month, int day, int y2, int m2, int d2) {
  return (!date_le(year, month, day, y2, m2, d2));
}


x86 assembly (clang, -O0):
<date_gt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x18(%rbp),%r9d
call   1030 <date_le@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<date_gt>:
push   %rax
call   1030 <date_le@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @date_gt(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i32, i32* %10
%17 = load i32, i32* %11
%18 = load i32, i32* %12
%19 = call i32 @date_le(i32 %13, i32 %14, i32 %15, i32 %16, i32 %17, i32 %18)
%20 = icmp ne i32 %19, 0
%21 = xor i1 %20, true
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @date_gt(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = tail call i32 @date_le(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5)
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Forward declarations */
typedef struct TYPE_5__ TYPE_2__;
typedef struct TYPE_4__ TYPE_1__;

/* Type definitions */
struct TYPE_4__ {
  int /*<<< orphan*/ rd_key;
};
struct TYPE_5__ {
  TYPE_1__ u;
  int /*<<< orphan*/ grand_rounds;
};
typedef TYPE_2__ CAMELLIA_KEY;

/* Variables and functions */
int /*<<< orphan*/ Camellia_EncryptBlock_Rounds(int /*<<< orphan*/,
                                                unsigned char const *,
                                                int /*<<< orphan*/,
                                                unsigned char *);
void Camellia_encrypt(const unsigned char *in, unsigned char *out,
                      const CAMELLIA_KEY *key) {
  Camellia_EncryptBlock_Rounds(key->grand_rounds, in, key->u.rd_key, out);
}


x86 assembly (clang, -O0):
<Camellia_encrypt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    0x4(%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rax
mov    (%rax),%edx
mov    -0x10(%rbp),%rcx
call   1030 <Camellia_EncryptBlock_Rounds@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Camellia_encrypt>:
mov    %rsi,%rcx
mov    %rdi,%rsi
mov    (%rdx),%eax
mov    0x4(%rdx),%edi
mov    %eax,%edx
jmp    1030 <Camellia_EncryptBlock_Rounds@plt>

LLVM IR (-O0):
%struct.TYPE_5__ = type { %struct.TYPE_4__, i32 }
%struct.TYPE_4__ = type { i32 }
define void @Camellia_encrypt(i8* %0, i8* %1, %struct.TYPE_5__* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca %struct.TYPE_5__*
store i8* %0, i8** %4
store i8* %1, i8** %5
store %struct.TYPE_5__* %2, %struct.TYPE_5__** %6
%7 = load %struct.TYPE_5__*, %struct.TYPE_5__** %6
%8 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %7, i32 0, i32 1
%9 = load i32, i32* %8
%10 = load i8*, i8** %4
%11 = load %struct.TYPE_5__*, %struct.TYPE_5__** %6
%12 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %11, i32 0, i32 0
%13 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %12, i32 0, i32 0
%14 = load i32, i32* %13
%15 = load i8*, i8** %5
%16 = call i32 @Camellia_EncryptBlock_Rounds(i32 %9, i8* %10, i32 %14, i8* %15)
ret void
}

LLVM IR (-O2):
%struct.TYPE_5__ = type { %struct.TYPE_4__, i32 }
%struct.TYPE_4__ = type { i32 }
define void @Camellia_encrypt(i8* %0, i8* %1, %struct.TYPE_5__* nocapture %2) {
%4 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %2, i64 0, i32 1
%5 = load i32, i32* %4
%6 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %2, i64 0, i32 0, i32 0
%7 = load i32, i32* %6
%8 = tail call i32 @Camellia_EncryptBlock_Rounds(i32 %5, i8* %0, i32 %7, i8* %1)
ret void
}
/* Variables and functions */
int sqrt_z(int);
int magnitudeThree(int x, int y, int z) {
  return sqrt_z(x * x + y * y + z * z);
}


x86 assembly (clang, -O0):
<magnitudeThree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
imul   -0x4(%rbp),%edi
mov    -0x8(%rbp),%eax
imul   -0x8(%rbp),%eax
add    %eax,%edi
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
add    %eax,%edi
call   1030 <sqrt_z@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<magnitudeThree>:
imul   %edi,%edi
imul   %esi,%esi
add    %esi,%edi
imul   %edx,%edx
add    %edx,%edi
jmp    1030 <sqrt_z@plt>

LLVM IR (-O0):
define i32 @magnitudeThree(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %4
%9 = mul nsw i32 %7, %8
%10 = load i32, i32* %5
%11 = load i32, i32* %5
%12 = mul nsw i32 %10, %11
%13 = add nsw i32 %9, %12
%14 = load i32, i32* %6
%15 = load i32, i32* %6
%16 = mul nsw i32 %14, %15
%17 = add nsw i32 %13, %16
%18 = call i32 @sqrt_z(i32 %17)
ret i32 %18
}

LLVM IR (-O2):
define i32 @magnitudeThree(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %0, %0
%5 = mul nsw i32 %1, %1
%6 = add nuw nsw i32 %5, %4
%7 = mul nsw i32 %2, %2
%8 = add nuw nsw i32 %6, %7
%9 = tail call i32 @sqrt_z(i32 %8)
ret i32 %9
}
/* Variables and functions */
int memcmp(void const *, void const *, size_t);
__attribute__((__weak__, __always___)) int
softboundmpx_memcmp(const void *s1, const void *s2, size_t n) {
  return memcmp(s1, s2, n);
}


x86 assembly (clang, -O0):
<softboundmpx_memcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_memcmp>:
jmp    1030 <memcmp@plt>

LLVM IR (-O0):
define weak i32 @softboundmpx_memcmp(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @memcmp(i8* %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define weak i32 @softboundmpx_memcmp(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @memcmp(i8* %0, i8* %1, i64 %2)
ret i32 %4
}