xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ X509_REQ;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int ASN1_item_i2d_bio(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                      int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_REQ_it;
int i2d_X509_REQ_bio(BIO *bp, X509_REQ *req) {
  return ASN1_item_i2d_bio(&X509_REQ_it, bp, req);
}


x86 assembly (clang, -O0):
<i2d_X509_REQ_bio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    0x2ec9(%rip),%rdi
call   1030 <ASN1_item_i2d_bio@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_X509_REQ_bio>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    0x2edb(%rip),%rdi
jmp    1030 <ASN1_item_i2d_bio@plt>

LLVM IR (-O0):
@X509_REQ_it = global i32 0
define i32 @i2d_X509_REQ_bio(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @ASN1_item_i2d_bio(i32* @X509_REQ_it, i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
@X509_REQ_it = global i32 0
define i32 @i2d_X509_REQ_bio(i32* %0, i32* %1) {
%3 = tail call i32 @ASN1_item_i2d_bio(i32* @X509_REQ_it, i32* %0, i32* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ chkPerfection(int);
int /*<<< orphan*/ printf(char *, int);
int Problem021_suppliment(void) {
  int i = 1;
  while (1) {
    if (!chkPerfection(i)) {
      printf("%30d\n", i);
    }
    i++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<Problem021_suppliment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <chkPerfection@plt>
cmp    $0x0,%eax
jne    114f <Problem021_suppliment+0x2f>
mov    -0x4(%rbp),%esi
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <Problem021_suppliment+0xf>

x86 assembly (clang, -O2):
<Problem021_suppliment>:
push   %r14
push   %rbx
push   %rax
mov    $0x1,%ebx
lea    0xed0(%rip),%r14
jmp    1143 <Problem021_suppliment+0x23>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
add    $0x1,%ebx
mov    %ebx,%edi
call   1040 <chkPerfection@plt>
test   %eax,%eax
jne    1140 <Problem021_suppliment+0x20>
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
jmp    1140 <Problem021_suppliment+0x20>

LLVM IR (-O0):
@.str = [6 x i8] c"%30d\0A\00"
define i32 @Problem021_suppliment() {
%1 = alloca i32
store i32 1, i32* %1
br label %2
2: ; preds = %0, %9
%3 = load i32, i32* %1
%4 = call i32 @chkPerfection(i32 %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = load i32, i32* %1
%8 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %6, %2
%10 = load i32, i32* %1
%11 = add nsw i32 %10, 1
store i32 %11, i32* %1
br label %2
}

LLVM IR (-O2):
@.str = [6 x i8] c"%30d\0A\00"
define i32 @Problem021_suppliment() {
br label %1
1: ; preds = %7, %0
%2 = phi i32 [ 1, %0 ], [ %8, %7 ]
%3 = tail call i32 @chkPerfection(i32 %2)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %2)
br label %7
7: ; preds = %5, %1
%8 = add nuw nsw i32 %2, 1
br label %1
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint64_t;

/* Variables and functions */
void volatile_fetch_or_u64(uint64_t *dest, uint64_t val) {
  *((volatile uint64_t *)dest) |= val;
}


x86 assembly (clang, -O0):
<volatile_fetch_or_u64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<volatile_fetch_or_u64>:
mov    %esi,-0x4(%rsp)
mov    -0x4(%rsp),%eax
or     %eax,(%rdi)
ret

LLVM IR (-O0):
define void @volatile_fetch_or_u64(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store volatile i32 %1, i32* %4
%5 = load volatile i32, i32* %4
%6 = load i32*, i32** %3
%7 = load volatile i32, i32* %6
%8 = or i32 %7, %5
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @volatile_fetch_or_u64(i32* %0, i32 %1) {
%3 = alloca i32
store volatile i32 %1, i32* %3
%4 = load volatile i32, i32* %3
%5 = load volatile i32, i32* %0
%6 = or i32 %5, %4
store volatile i32 %6, i32* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int rand();
uint16_t co_rand_hword(void) { return (uint16_t)(rand() & 0xFFFF); }


x86 assembly (clang, -O0):
<co_rand_hword>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
and    $0xffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<co_rand_hword>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
movzwl %ax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @co_rand_hword() {
%1 = call i32 (...) @rand()
%2 = and i32 %1, 65535
ret i32 %2
}

LLVM IR (-O2):
define i32 @co_rand_hword() {
%1 = tail call i32 (...) @rand()
%2 = and i32 %1, 65535
ret i32 %2
}
/* Variables and functions */
scalar_t__ alloc(int);
int /*<<< orphan*/ memcpy(char *, char *, int);
int strlen(char *);
char *newstrn(char *orig, int max_len) {
  int len;
  char *r;
  len = strlen(orig);
  if (len > max_len)
    len = max_len;
  r = (char *)alloc(len + 1);
  memcpy(r, orig, len);
  return (r);
}


x86 assembly (clang, -O0):
<newstrn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    115d <newstrn+0x2d>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
add    $0x1,%edi
call   1050 <alloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%edx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newstrn>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %rdi,%r14
call   1030 <strlen@plt>
cmp    %ebx,%eax
cmovle %eax,%ebx
lea    0x1(%rbx),%edi
call   1050 <alloc@plt>
mov    %rax,%r15
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebx,%edx
call   1040 <memcpy@plt>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @newstrn(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = icmp sgt i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = load i32, i32* %4
store i32 %13, i32* %5
br label %14
14: ; preds = %12, %2
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 1
%17 = call i64 @alloc(i32 %16)
%18 = inttoptr i64 %17 to i8*
store i8* %18, i8** %6
%19 = load i8*, i8** %6
%20 = load i8*, i8** %3
%21 = load i32, i32* %5
%22 = call i32 @memcpy(i8* %19, i8* %20, i32 %21)
%23 = load i8*, i8** %6
ret i8* %23
}

LLVM IR (-O2):
define i8* @newstrn(i8* %0, i32 %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = icmp sgt i32 %3, %1
%5 = select i1 %4, i32 %1, i32 %3
%6 = add nsw i32 %5, 1
%7 = tail call i64 @alloc(i32 %6)
%8 = inttoptr i64 %7 to i8*
%9 = tail call i32 @memcpy(i8* %8, i8* %0, i32 %5)
ret i8* %8
}
int test_imm_B6int16_mem(short *val) {
  return ((*val) & (0xB6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B6int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xb6,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B6int16_mem>:
testb  $0xb6,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B6int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 182
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_B6int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 182
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void nand_write_addr(unsigned char addr) {
  (*(volatile unsigned char *)0x4E00000C) = addr;
}


x86 assembly (clang, -O0):
<nand_write_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%cl
mov    $0x4e00000c,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_write_addr>:
mov    %dil,0x4e00000c
4e
ret

LLVM IR (-O0):
define void @nand_write_addr(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
store volatile i8 %3, i8* inttoptr (i64 1308622860 to i8*)
ret void
}

LLVM IR (-O2):
define void @nand_write_addr(i8 zeroext %0) {
store volatile i8 %0, i8* inttoptr (i64 1308622860 to i8*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ NRF24_InsWrite(int, int /*<<< orphan*/ const *, int);
void NRF24_TXFIFO_Write_NoACK(const uint8_t *pbuff, uint32_t num) {
  NRF24_InsWrite(0xB0, pbuff, num <= 32 ? num : 32);
}


x86 assembly (clang, -O0):
<NRF24_TXFIFO_Write_NoACK>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x20,-0xc(%rbp)
jg     113c <NRF24_TXFIFO_Write_NoACK+0x2c>
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
jmp    1149 <NRF24_TXFIFO_Write_NoACK+0x39>
mov    $0x20,%eax
mov    %eax,-0x1c(%rbp)
jmp    1149 <NRF24_TXFIFO_Write_NoACK+0x39>
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
mov    $0xb0,%edi
call   1030 <NRF24_InsWrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NRF24_TXFIFO_Write_NoACK>:
mov    %rdi,%rax
cmp    $0x20,%esi
mov    $0x20,%edx
cmovl  %esi,%edx
mov    $0xb0,%edi
mov    %rax,%rsi
jmp    1030 <NRF24_InsWrite@plt>

LLVM IR (-O0):
define void @NRF24_TXFIFO_Write_NoACK(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = icmp sle i32 %6, 32
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
br label %11
10: ; preds = %2
br label %11
11: ; preds = %10, %8
%12 = phi i32 [ %9, %8 ], [ 32, %10 ]
%13 = call i32 @NRF24_InsWrite(i32 176, i32* %5, i32 %12)
ret void
}

LLVM IR (-O2):
define void @NRF24_TXFIFO_Write_NoACK(i32* %0, i32 %1) {
%3 = icmp slt i32 %1, 32
%4 = select i1 %3, i32 %1, i32 32
%5 = tail call i32 @NRF24_InsWrite(i32 176, i32* %0, i32 %4)
ret void
}
void ap91_pci_init_simple(void) {}


x86 assembly (clang, -O0):
<ap91_pci_init_simple>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ap91_pci_init_simple>:
ret

LLVM IR (-O0):
define void @ap91_pci_init_simple() {
ret void
}

LLVM IR (-O2):
define void @ap91_pci_init_simple() {
ret void
}
void CG_ConsoleTestCmd(void) {}


x86 assembly (clang, -O0):
<CG_ConsoleTestCmd>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_ConsoleTestCmd>:
ret

LLVM IR (-O0):
define void @CG_ConsoleTestCmd() {
ret void
}

LLVM IR (-O2):
define void @CG_ConsoleTestCmd() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int O_CREAT;
int O_TRUNC;
int O_WRONLY;
int __open64(char const *, int, int /*<<< orphan*/);
int creat64(const char *file, mode_t mode) {
  return __open64(file, O_WRONLY | O_CREAT | O_TRUNC, mode);
}


x86 assembly (clang, -O0):
<creat64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e9e(%rip),%rax
mov    (%rax),%esi
mov    0x2ec5(%rip),%rax
or     (%rax),%esi
mov    0x2eb4(%rip),%rax
or     (%rax),%esi
mov    -0xc(%rbp),%edx
call   1030 <__open64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<creat64>:
mov    0x2eb1(%rip),%rcx
mov    0x2eda(%rip),%rax
mov    (%rax),%eax
or     (%rcx),%eax
mov    %esi,%edx
mov    0x2ec5(%rip),%rcx
or     (%rcx),%eax
mov    %eax,%esi
jmp    1030 <__open64@plt>

LLVM IR (-O0):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
@O_TRUNC = global i32 0
define i32 @creat64(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* @O_WRONLY
%7 = load i32, i32* @O_CREAT
%8 = or i32 %6, %7
%9 = load i32, i32* @O_TRUNC
%10 = or i32 %8, %9
%11 = load i32, i32* %4
%12 = call i32 @__open64(i8* %5, i32 %10, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
@O_WRONLY = global i32 0
@O_CREAT = global i32 0
@O_TRUNC = global i32 0
define i32 @creat64(i8* %0, i32 %1) {
%3 = load i32, i32* @O_WRONLY
%4 = load i32, i32* @O_CREAT
%5 = or i32 %4, %3
%6 = load i32, i32* @O_TRUNC
%7 = or i32 %5, %6
%8 = tail call i32 @__open64(i8* %0, i32 %7, i32 %1)
ret i32 %8
}
int f(int x, int y) { return y; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 returned %1) {
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char *);
unsigned char *sunday(char *, int /*<<< orphan*/, char *, int /*<<< orphan*/);
char *tc_004() {
  unsigned char *rel =
      sunday("1234567890", strlen("1234567890"), "8901", strlen("8901"));
  do {
    return NULL == rel ? NULL : "expect NULL pointer";
  } while (0);
  ;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    0xed1(%rip),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <strlen@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%ecx
lea    0xeb1(%rip),%rdi
lea    0xeb5(%rip),%rdx
call   1040 <sunday@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%ecx
lea    0xea2(%rip),%rax
cmp    %rdx,%rcx
cmove  %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rbp
push   %r14
push   %rbx
lea    0xed5(%rip),%r14
mov    %r14,%rdi
call   1030 <strlen@plt>
mov    %eax,%ebp
lea    0xecf(%rip),%rbx
mov    %rbx,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %ebp,%esi
mov    %rbx,%rdx
mov    %eax,%ecx
call   1040 <sunday@plt>
test   %rax,%rax
lea    0xeb3(%rip),%rcx
cmovne %rcx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [11 x i8] c"1234567890\00"
@.str.1 = [5 x i8] c"8901\00"
@.str.2 = [20 x i8] c"expect NULL pointer\00"
define i8* @tc_004() {
%1 = alloca i8*
%2 = call i32 @strlen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @strlen(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%4 = call i8* @sunday(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %3)
store i8* %4, i8** %1
br label %5
5: ; preds = %0
%6 = load i8*, i8** %1
%7 = icmp eq i8* null, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i8* null, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0)
br label %10
10: ; preds = %5
ret i8* %9
}

LLVM IR (-O2):
@.str = [11 x i8] c"1234567890\00"
@.str.1 = [5 x i8] c"8901\00"
@.str.2 = [20 x i8] c"expect NULL pointer\00"
define i8* @tc_004() {
%1 = tail call i32 @strlen(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @strlen(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i8* @sunday(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %1, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %2)
%4 = icmp eq i8* %3, null
%5 = select i1 %4, i8* null, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0)
ret i8* %5
}
void Rename_RMV_SET_OBJ(ss, vv) int ss, vv;
{
  int r, b;
  Rename_SRC_HIH_EQL_SET_OBJ(&b, &r, ss, vv);
  if (b == 1) {
    Rename_DEL_SET_OBJ(ss, r);
  }
}


x86 assembly (clang, -O0):
<Rename_RMV_SET_OBJ>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
lea    -0x10(%rbp),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x0,%al
call   1040 <Rename_SRC_HIH_EQL_SET_OBJ@plt>
cmpl   $0x1,-0x10(%rbp)
jne    115a <Rename_RMV_SET_OBJ+0x3a>
mov    -0x4(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x0,%al
call   1030 <Rename_DEL_SET_OBJ@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Rename_RMV_SET_OBJ>:
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ecx
mov    %edi,%ebx
lea    0x8(%rsp),%rdi
lea    0xc(%rsp),%rsi
mov    %ebx,%edx
xor    %eax,%eax
call   1040 <Rename_SRC_HIH_EQL_SET_OBJ@plt>
cmpl   $0x1,0x8(%rsp)
jne    1150 <Rename_RMV_SET_OBJ+0x30>
mov    0xc(%rsp),%esi
mov    %ebx,%edi
xor    %eax,%eax
call   1030 <Rename_DEL_SET_OBJ@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @Rename_RMV_SET_OBJ(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 (i32*, i32*, i32, i32, ...) bitcast (i32 (...)* @Rename_SRC_HIH_EQL_SET_OBJ to i32 (i32*, i32*, i32, i32, ...)*)(i32* %6, i32* %5, i32 %7, i32 %8)
%10 = load i32, i32* %6
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %16
12: ; preds = %2
%13 = load i32, i32* %3
%14 = load i32, i32* %5
%15 = call i32 (i32, i32, ...) bitcast (i32 (...)* @Rename_DEL_SET_OBJ to i32 (i32, i32, ...)*)(i32 %13, i32 %14)
br label %16
16: ; preds = %12, %2
ret void
}

LLVM IR (-O2):
define void @Rename_RMV_SET_OBJ(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %3 to i8*
%6 = bitcast i32* %4 to i8*
%7 = call i32 (i32*, i32*, i32, i32, ...) bitcast (i32 (...)* @Rename_SRC_HIH_EQL_SET_OBJ to i32 (i32*, i32*, i32, i32, ...)*)(i32* %4, i32* %3, i32 %0, i32 %1)
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = load i32, i32* %3
%12 = call i32 (i32, i32, ...) bitcast (i32 (...)* @Rename_DEL_SET_OBJ to i32 (i32, i32, ...)*)(i32 %0, i32 %11)
br label %13
13: ; preds = %10, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ double_sequence(double, int);
int /*<<< orphan*/ float_sequence(double, int);
int main(void) {
  float_sequence(0.01, 20);
  double_sequence(0.01, 20);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movsd  0xec9(%rip),%xmm0
mov    $0x14,%edi
call   1030 <float_sequence@plt>
movsd  0xeb7(%rip),%xmm0
mov    $0x14,%edi
call   1040 <double_sequence@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movsd  0xed7(%rip),%xmm0
mov    $0x14,%edi
call   1030 <float_sequence@plt>
movsd  0xec5(%rip),%xmm0
mov    $0x14,%edi
call   1040 <double_sequence@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @float_sequence(double 1.000000e-02, i32 20)
%3 = call i32 @double_sequence(double 1.000000e-02, i32 20)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @float_sequence(double 1.000000e-02, i32 20)
%2 = tail call i32 @double_sequence(double 1.000000e-02, i32 20)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sla_mapqkz_(double *, double *, double *, double *,
                               double *);
void slaMapqkz(double rm, double dm, double amprms[21], double *ra,
               double *da) {
  sla_mapqkz_(&rm, &dm, amprms, ra, da);
}


x86 assembly (clang, -O0):
<slaMapqkz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    %rsi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <sla_mapqkz_@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slaMapqkz>:
sub    $0x18,%rsp
mov    %rdx,%r8
mov    %rsi,%rcx
mov    %rdi,%rdx
movsd  %xmm0,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <sla_mapqkz_@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @slaMapqkz(double %0, double %1, double* %2, double* %3, double* %4) {
%6 = alloca double
%7 = alloca double
%8 = alloca double*
%9 = alloca double*
%10 = alloca double*
store double %0, double* %6
store double %1, double* %7
store double* %2, double** %8
store double* %3, double** %9
store double* %4, double** %10
%11 = load double*, double** %8
%12 = load double*, double** %9
%13 = load double*, double** %10
%14 = call i32 @sla_mapqkz_(double* %6, double* %7, double* %11, double* %12, double* %13)
ret void
}

LLVM IR (-O2):
define void @slaMapqkz(double %0, double %1, double* %2, double* %3, double* %4) {
%6 = alloca double
%7 = alloca double
store double %0, double* %6
store double %1, double* %7
%8 = call i32 @sla_mapqkz_(double* %6, double* %7, double* %2, double* %3, double* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("No FIPS DES support\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"No FIPS DES support\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [20 x i8] c"No FIPS DES support\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
int mount_device(const char *dev_path) {
  printf("[mount] %s\n", dev_path);
  return 0;
}


x86 assembly (clang, -O0):
<mount_device>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mount_device>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"[mount] %s\0A\00"
define i32 @mount_device(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"[mount] %s\0A\00"
define i32 @mount_device(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ CG_Argv(int);
int /*<<< orphan*/ trap_SendConsoleCommand(int /*<<< orphan*/);
int /*<<< orphan*/ va(char *, int /*<<< orphan*/);
void CG_UIMenu_f(void) { trap_SendConsoleCommand(va("menu %s\n", CG_Argv(1))); }


x86 assembly (clang, -O0):
<CG_UIMenu_f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <CG_Argv@plt>
mov    %eax,%esi
lea    0xeb9(%rip),%rdi
call   1040 <va@plt>
mov    %eax,%edi
call   1050 <trap_SendConsoleCommand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_UIMenu_f>:
push   %rax
mov    $0x1,%edi
call   1030 <CG_Argv@plt>
lea    0xebe(%rip),%rdi
mov    %eax,%esi
call   1040 <va@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <trap_SendConsoleCommand@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"menu %s\0A\00"
define void @CG_UIMenu_f() {
%1 = call i32 @CG_Argv(i32 1)
%2 = call i32 @va(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = call i32 @trap_SendConsoleCommand(i32 %2)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"menu %s\0A\00"
define void @CG_UIMenu_f() {
%1 = tail call i32 @CG_Argv(i32 1)
%2 = tail call i32 @va(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @trap_SendConsoleCommand(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void celebrate() {
  printf("The ogre sees your sword. You are now best friends! The ENDS\n");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<celebrate>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<celebrate>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [62 x i8] c"The ogre sees your sword. You are now best friends! The ENDS\0A\00"
@EXIT_SUCCESS = global i32 0
define void @celebrate() {
%1 = call i32 @printf(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = call i32 @exit(i32 %2)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [61 x i8] c"The ogre sees your sword. You are now best friends! The ENDS\00"
define void @celebrate() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([61 x i8], [61 x i8]* @str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = tail call i32 @exit(i32 %2)
unreachable
}
unsigned char xtolower(unsigned char c) {
  if (!((c >= 'A') && (c <= 'Z')))
    return c;
  return (1 << 5) | c;
}


x86 assembly (clang, -O0):
<xtolower>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
cmp    $0x41,%eax
jl     1124 <xtolower+0x24>
movzbl -0x2(%rbp),%eax
cmp    $0x5a,%eax
jle    112f <xtolower+0x2f>
mov    -0x2(%rbp),%al
mov    %al,-0x1(%rbp)
jmp    1139 <xtolower+0x39>
movzbl -0x2(%rbp),%eax
or     $0x20,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xtolower>:
lea    -0x41(%rdi),%eax
mov    %edi,%ecx
or     $0x20,%cl
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @xtolower(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %13, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
store i8 %12, i8* %2
br label %18
13: ; preds = %7
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 32, %15
%17 = trunc i32 %16 to i8
store i8 %17, i8* %2
br label %18
18: ; preds = %13, %11
%19 = load i8, i8* %2
ret i8 %19
}

LLVM IR (-O2):
define zeroext i8 @xtolower(i8 zeroext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = or i8 %0, 32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
/* Variables and functions */
scalar_t__ isdigit(int);
int isxdigit(int c) {
  return isdigit(c) || ('a' <= c && c <= 'f') || ('A' <= c && c <= 'F');
}


x86 assembly (clang, -O0):
<isxdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1175 <isxdigit+0x65>
mov    $0x61,%eax
cmp    -0x4(%rbp),%eax
jg     1152 <isxdigit+0x42>
mov    $0x1,%al
cmpl   $0x66,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1175 <isxdigit+0x65>
xor    %eax,%eax
mov    $0x41,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x6(%rbp)
jg     116f <isxdigit+0x5f>
cmpl   $0x46,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isxdigit>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
test   %rax,%rax
setne  %al
and    $0xffffffdf,%ebx
add    $0xffffffbf,%ebx
cmp    $0x6,%ebx
setb   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isxdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isdigit(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %20, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sle i32 97, %7
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %2
%11 = icmp sle i32 %10, 102
br i1 %11, label %20, label %12
12: ; preds = %9, %6
%13 = load i32, i32* %2
%14 = icmp sle i32 65, %13
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %2
%17 = icmp sle i32 %16, 70
br label %18
18: ; preds = %15, %12
%19 = phi i1 [ false, %12 ], [ %17, %15 ]
br label %20
20: ; preds = %18, %9, %1
%21 = phi i1 [ true, %9 ], [ true, %1 ], [ %19, %18 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @isxdigit(i32 %0) {
%2 = tail call i64 @isdigit(i32 %0)
%3 = icmp ne i64 %2, 0
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 6
%7 = or i1 %6, %3
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  (void)fprintf(stderr, "usage: mesg [n | y]\n");
  exit(2);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"usage: mesg [n | y]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"usage: mesg [n | y]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 2)
unreachable
}
int IsPowerOfTwo(unsigned int x) { return ((x != 0) && ((x & (~x + 1)) == x)); }


x86 assembly (clang, -O0):
<IsPowerOfTwo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     112d <IsPowerOfTwo+0x2d>
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
xor    $0xffffffff,%ecx
add    $0x1,%ecx
and    %ecx,%eax
cmp    -0x4(%rbp),%eax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsPowerOfTwo>:
test   %edi,%edi
je     110f <IsPowerOfTwo+0xf>
lea    -0x1(%rdi),%ecx
xor    %eax,%eax
test   %ecx,%edi
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @IsPowerOfTwo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %13
5: ; preds = %1
%6 = load i32, i32* %2
%7 = load i32, i32* %2
%8 = xor i32 %7, -1
%9 = add i32 %8, 1
%10 = and i32 %6, %9
%11 = load i32, i32* %2
%12 = icmp eq i32 %10, %11
br label %13
13: ; preds = %5, %1
%14 = phi i1 [ false, %1 ], [ %12, %5 ]
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @IsPowerOfTwo(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.ctpop.i32(i32 %0)
%5 = icmp ult i32 %4, 2
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
void usdhc2_iomux_config() {}


x86 assembly (clang, -O0):
<usdhc2_iomux_config>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usdhc2_iomux_config>:
ret

LLVM IR (-O0):
define void @usdhc2_iomux_config() {
ret void
}

LLVM IR (-O2):
define void @usdhc2_iomux_config() {
ret void
}
void VLDEnableModule(HMODULE) {}


x86 assembly (clang, -O0):
<VLDEnableModule>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<VLDEnableModule>:
ret

LLVM IR (-O0):
define void @VLDEnableModule(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @VLDEnableModule(i32 %0) {
ret void
}
/* Variables and functions */
unsigned char __VERIFIER_nondet_U8();
unsigned char ecrobot_get_nxtcolorsensor_light(unsigned char port) {
  unsigned char tmp;
  {
    tmp = __VERIFIER_nondet_U8();
    return (tmp);
  }
}


x86 assembly (clang, -O0):
<ecrobot_get_nxtcolorsensor_light>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_U8@plt>
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecrobot_get_nxtcolorsensor_light>:
xor    %eax,%eax
jmp    1030 <__VERIFIER_nondet_U8@plt>

LLVM IR (-O0):
define zeroext i8 @ecrobot_get_nxtcolorsensor_light(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = call zeroext i8 (...) @__VERIFIER_nondet_U8()
store i8 %4, i8* %3
%5 = load i8, i8* %3
ret i8 %5
}

LLVM IR (-O2):
define zeroext i8 @ecrobot_get_nxtcolorsensor_light(i8 zeroext %0) {
%2 = tail call zeroext i8 (...) @__VERIFIER_nondet_U8()
ret i8 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ wctype_t;
typedef int /*<<< orphan*/ locale_t;

/* Variables and functions */
int /*<<< orphan*/ wctype(char const *);
wctype_t wctype_l(const char *s, locale_t l) { return wctype(s); }


x86 assembly (clang, -O0):
<wctype_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wctype@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wctype_l>:
jmp    1030 <wctype@plt>

LLVM IR (-O0):
define i32 @wctype_l(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @wctype(i8* %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @wctype_l(i8* %0, i32 %1) {
%3 = tail call i32 @wctype(i8* %0)
ret i32 %3
}
char *getlogin(void) {
  anvil_syslog(0, "%s unimplemented\n", __FUNCTION__);
  while (1)
    ;
  return "";
}


x86 assembly (clang, -O0):
<getlogin>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
lea    0xeee(%rip),%rdx
mov    $0x0,%al
call   1030 <anvil_syslog@plt>
jmp    112b <getlogin+0x1b>

x86 assembly (clang, -O2):
<getlogin>:
push   %rax
lea    0xee8(%rip),%rsi
lea    0xef3(%rip),%rdx
xor    %edi,%edi
xor    %eax,%eax
call   1030 <anvil_syslog@plt>
nopl   0x0(%rax,%rax,1)
jmp    1130 <getlogin+0x20>

LLVM IR (-O0):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.getlogin = [9 x i8] c"getlogin\00"
define i8* @getlogin() {
%1 = call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.getlogin, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
@.str = [18 x i8] c"%s unimplemented\0A\00"
@__FUNCTION__.getlogin = [9 x i8] c"getlogin\00"
define i8* @getlogin() {
%1 = tail call i32 (i32, i8*, i8*, ...) bitcast (i32 (...)* @anvil_syslog to i32 (i32, i8*, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @__FUNCTION__.getlogin, i64 0, i64 0))
br label %2
2: ; preds = %0, %2
br label %2
}
float Quad__easeIn(float t, float b, float c, float d, float p0, float p1) {
  return c * (t /= d) * t + b;
}


x86 assembly (clang, -O0):
<Quad__easeIn>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  %xmm5,-0x18(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm2
movss  -0x4(%rbp),%xmm1
divss  %xmm2,%xmm1
movss  %xmm1,-0x4(%rbp)
mulss  %xmm1,%xmm0
movss  -0x4(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Quad__easeIn>:
divss  %xmm3,%xmm0
mulss  %xmm0,%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @Quad__easeIn(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
store float %0, float* %7
store float %1, float* %8
store float %2, float* %9
store float %3, float* %10
store float %4, float* %11
store float %5, float* %12
%13 = load float, float* %9
%14 = load float, float* %10
%15 = load float, float* %7
%16 = fdiv float %15, %14
store float %16, float* %7
%17 = fmul float %13, %16
%18 = load float, float* %7
%19 = load float, float* %8
%20 = call float @llvm.fmuladd.f32(float %17, float %18, float %19)
ret float %20
}

LLVM IR (-O2):
define float @Quad__easeIn(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = fdiv float %0, %3
%8 = fmul float %7, %2
%9 = tail call float @llvm.fmuladd.f32(float %8, float %7, float %1)
ret float %9
}
/* Variables and functions */
size_t mach_itemsize(int format) {
  if (format == 8)
    return sizeof(char);
  if (format == 16)
    return sizeof(short);
  if (format == 32)
    return sizeof(long);
  return 0;
}


x86 assembly (clang, -O0):
<mach_itemsize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
cmpl   $0x8,-0xc(%rbp)
jne    111e <mach_itemsize+0x1e>
movq   $0x1,-0x8(%rbp)
jmp    1154 <mach_itemsize+0x54>
cmpl   $0x10,-0xc(%rbp)
jne    1135 <mach_itemsize+0x35>
movq   $0x2,-0x8(%rbp)
jmp    1154 <mach_itemsize+0x54>
cmpl   $0x20,-0xc(%rbp)
jne    114c <mach_itemsize+0x4c>
movq   $0x8,-0x8(%rbp)
jmp    1154 <mach_itemsize+0x54>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mach_itemsize>:
cmp    $0x8,%edi
je     1115 <mach_itemsize+0x15>
cmp    $0x20,%edi
je     111b <mach_itemsize+0x1b>
cmp    $0x10,%edi
jne    1121 <mach_itemsize+0x21>
mov    $0x2,%eax
ret
mov    $0x1,%eax
ret
mov    $0x8,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @mach_itemsize(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 8
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 1, i64* %2
br label %16
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 16
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 2, i64* %2
br label %16
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 32
br i1 %13, label %14, label %15
14: ; preds = %11
store i64 8, i64* %2
br label %16
15: ; preds = %11
store i64 0, i64* %2
br label %16
16: ; preds = %15, %14, %10, %6
%17 = load i64, i64* %2
ret i64 %17
}

LLVM IR (-O2):
define i64 @mach_itemsize(i32 %0) {
switch i32 %0, label %4 [
i32 8, label %5
i32 16, label %2
i32 32, label %3
]
2: ; preds = %1
br label %5
3: ; preds = %1
br label %5
4: ; preds = %1
br label %5
5: ; preds = %1, %4, %3, %2
%6 = phi i64 [ 2, %2 ], [ 8, %3 ], [ 0, %4 ], [ 1, %1 ]
ret i64 %6
}
void foo468(int p) {}


x86 assembly (clang, -O0):
<foo468>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo468>:
ret

LLVM IR (-O0):
define void @foo468(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo468(i32 %0) {
ret void
}
int elv_may_queue(struct request_queue *x, int y, struct bio *z) {
  int a;
  return a;
}


x86 assembly (clang, -O0):
<elv_may_queue>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<elv_may_queue>:
ret

LLVM IR (-O0):
%struct.request_queue = type opaque
%struct.bio = type opaque
define i32 @elv_may_queue(%struct.request_queue* %0, i32 %1, %struct.bio* %2) {
%4 = alloca %struct.request_queue*
%5 = alloca i32
%6 = alloca %struct.bio*
%7 = alloca i32
store %struct.request_queue* %0, %struct.request_queue** %4
store i32 %1, i32* %5
store %struct.bio* %2, %struct.bio** %6
%8 = load i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
%struct.request_queue = type opaque
%struct.bio = type opaque
define i32 @elv_may_queue(%struct.request_queue* nocapture readnone %0, i32 %1, %struct.bio* nocapture readnone %2) {
ret i32 undef
}
int w_isupper(char c) {
  if (c >= 'A' && c <= 'Z') {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<w_isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1130 <w_isupper+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     1130 <w_isupper+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <w_isupper+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<w_isupper>:
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @w_isupper(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %13
12: ; preds = %7, %1
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @w_isupper(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
unsigned int cvmx_coremask_numcores(unsigned int num_cores) {
  return (0xFFFFFFFFu >> (32 - num_cores));
}


x86 assembly (clang, -O0):
<cvmx_coremask_numcores>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x20,%ecx
sub    -0x4(%rbp),%ecx
mov    $0xffffffff,%eax
shr    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvmx_coremask_numcores>:
mov    %edi,%ecx
neg    %cl
mov    $0xffffffff,%eax
shr    %cl,%eax
ret

LLVM IR (-O0):
define i32 @cvmx_coremask_numcores(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub i32 32, %3
%5 = lshr i32 -1, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @cvmx_coremask_numcores(i32 %0) {
%2 = sub i32 32, %0
%3 = lshr i32 -1, %2
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ MC_avg1_16(int, int /*<<< orphan*/ *,
                              int /*<<< orphan*/ const *, int,
                              int /*<<< orphan*/);
void MC_avg_o_16_mmxext(uint8_t *dest, const uint8_t *ref, int stride,
                        int height) {
  MC_avg1_16(height, dest, ref, stride, 0);
}


x86 assembly (clang, -O0):
<MC_avg_o_16_mmxext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x18(%rbp),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
xor    %r8d,%r8d
call   1030 <MC_avg1_16@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MC_avg_o_16_mmxext>:
mov    %edx,%eax
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    %ecx,%edi
mov    %eax,%ecx
xor    %r8d,%r8d
jmp    1030 <MC_avg1_16@plt>

LLVM IR (-O0):
define void @MC_avg_o_16_mmxext(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = load i32*, i32** %5
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = call i32 @MC_avg1_16(i32 %9, i32* %10, i32* %11, i32 %12, i32 0)
ret void
}

LLVM IR (-O2):
define void @MC_avg_o_16_mmxext(i32* %0, i32* %1, i32 %2, i32 %3) {
%5 = tail call i32 @MC_avg1_16(i32 %3, i32* %0, i32* %1, i32 %2, i32 0)
ret void
}
int main(int argc, char **argv) {
  int ret;
  if (ret > 0)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x14(%rbp)
jle    1128 <main+0x28>
movl   $0x1,-0x4(%rbp)
jmp    112f <main+0x2f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %6
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %11
10: ; preds = %2
store i32 0, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
char *fmt(char *, int);
char *fmtint(int x) { return fmt("%d", x); }


x86 assembly (clang, -O0):
<fmtint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <fmt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmtint>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <fmt@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i8* @fmtint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @fmt(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i8* @fmtint(i32 %0) {
%2 = tail call i8* @fmt(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ my_strcpy(char *, char *, int);
int /*<<< orphan*/ printf(char *, char *);
int main() {
  char a[20] = "hello world!";
  char b[20] = "hello Miss Dong";
  my_strcpy(a, b, 20);
  printf("%s", a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec5(%rip),%eax
mov    %eax,-0x10(%rbp)
mov    0xecb(%rip),%rax
mov    %rax,-0x40(%rbp)
mov    0xec8(%rip),%rax
mov    %rax,-0x38(%rbp)
mov    0xec6(%rip),%eax
mov    %eax,-0x30(%rbp)
lea    -0x20(%rbp),%rdi
lea    -0x40(%rbp),%rsi
mov    $0x14,%edx
call   1030 <my_strcpy@plt>
lea    -0x20(%rbp),%rsi
lea    0xeaa(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x40,%rsp
movaps 0xed4(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movl   $0x0,0x30(%rsp)
movaps 0xee0(%rip),%xmm0
movaps %xmm0,(%rsp)
movl   $0x0,0x10(%rsp)
lea    0x20(%rsp),%rbx
mov    %rsp,%rsi
mov    %rbx,%rdi
mov    $0x14,%edx
call   1030 <my_strcpy@plt>
lea    0xecc(%rip),%rdi
mov    %rbx,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.a = [20 x i8] c"hello world!\00\00\00\00\00\00\00\00"
@__const.main.b = [20 x i8] c"hello Miss Dong\00\00\00\00\00"
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [20 x i8]
%3 = alloca [20 x i8]
store i32 0, i32* %1
%4 = bitcast [20 x i8]* %2 to i8*
%5 = bitcast [20 x i8]* %3 to i8*
%6 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%7 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%8 = call i32 @my_strcpy(i8* %6, i8* %7, i32 20)
%9 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %9)
ret i32 0
}

LLVM IR (-O2):
@__const.main.a = [20 x i8] c"hello world!\00\00\00\00\00\00\00\00"
@__const.main.b = [20 x i8] c"hello Miss Dong\00\00\00\00\00"
@.str = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca [20 x i8]
%2 = alloca [20 x i8]
%3 = getelementptr inbounds [20 x i8], [20 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%5 = call i32 @my_strcpy(i8* %3, i8* %4, i32 20)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}