xunge/DecIR huggingface dataset:
int is_real(double x) {
  const double Inf = 1.0 / 0.0;
  return (x < Inf) && (x >= -Inf);
}


x86 assembly (clang, -O0):
<is_real>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
xor    %eax,%eax
movsd  0xee0(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
mov    %al,-0x11(%rbp)
jbe    1145 <is_real+0x45>
movsd  -0x8(%rbp),%xmm0
movsd  0xecd(%rip),%xmm1
ucomisd %xmm1,%xmm0
setae  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_real>:
movsd  0xef8(%rip),%xmm1
ucomisd %xmm0,%xmm1
seta   %al
ucomisd 0xef1(%rip),%xmm0
setae  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_real(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
store double 0x7FF0000000000000, double* %3
%4 = load double, double* %2
%5 = fcmp olt double %4, 0x7FF0000000000000
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load double, double* %2
%8 = fcmp oge double %7, 0xFFF0000000000000
br label %9
9: ; preds = %6, %1
%10 = phi i1 [ false, %1 ], [ %8, %6 ]
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @is_real(double %0) {
%2 = fcmp olt double %0, 0x7FF0000000000000
%3 = fcmp oge double %0, 0xFFF0000000000000
%4 = and i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int O_NOCTTY;
int O_RDWR;
int open(char *, int);
int zio_open(char *name) { return open(name, O_RDWR | O_NOCTTY); }


x86 assembly (clang, -O0):
<zio_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rax
mov    (%rax),%esi
mov    0x2ea8(%rip),%rax
or     (%rax),%esi
call   1030 <open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zio_open>:
mov    0x2ed1(%rip),%rax
mov    0x2eba(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
jmp    1030 <open@plt>

LLVM IR (-O0):
@O_RDWR = global i32 0
@O_NOCTTY = global i32 0
define i32 @zio_open(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @O_RDWR
%5 = load i32, i32* @O_NOCTTY
%6 = or i32 %4, %5
%7 = call i32 @open(i8* %3, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@O_RDWR = global i32 0
@O_NOCTTY = global i32 0
define i32 @zio_open(i8* nocapture %0) {
%2 = load i32, i32* @O_RDWR
%3 = load i32, i32* @O_NOCTTY
%4 = or i32 %3, %2
%5 = tail call i32 @open(i8* %0, i32 %4)
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int sigsuspend(const sigset_t *sigmask) {
  (void)sigmask;
  puts("sigsuspend: not implemented");
  return -1;
}


x86 assembly (clang, -O0):
<sigsuspend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigsuspend>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"sigsuspend: not implemented\00"
define i32 @sigsuspend(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @puts(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [28 x i8] c"sigsuspend: not implemented\00"
define i32 @sigsuspend(i32* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
void *calloc(size_t, size_t);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ log_e(char *, size_t, size_t);
void *hw_calloc(size_t count, size_t size) {
  void *m = calloc(count, size);
  if (m == NULL) {
    log_e("Memory allocation by calloc failed (%ld count, %ld bytes).", count,
          size);
    exit(2);
  }
  return m;
}


x86 assembly (clang, -O0):
<hw_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    117a <hw_calloc+0x4a>
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xe95(%rip),%rdi
call   1040 <log_e@plt>
mov    $0x2,%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hw_calloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <calloc@plt>
test   %rax,%rax
je     114c <hw_calloc+0x1c>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
lea    0xead(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1040 <log_e@plt>
mov    $0x2,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [59 x i8] c"Memory allocation by calloc failed (%ld count, %ld bytes).\00"
define i8* @hw_calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %16
11: ; preds = %2
%12 = load i64, i64* %3
%13 = load i64, i64* %4
%14 = call i32 @log_e(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0), i64 %12, i64 %13)
%15 = call i32 @exit(i32 2)
unreachable
16: ; preds = %2
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
@.str = [59 x i8] c"Memory allocation by calloc failed (%ld count, %ld bytes).\00"
define noalias i8* @hw_calloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i32 @log_e(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0), i64 %0, i64 %1)
%7 = tail call i32 @exit(i32 2)
unreachable
8: ; preds = %2
ret i8* %3
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int fstatat(int, char const *, struct stat *, int /*<<< orphan*/);
int statat(int fd, char const *name, struct stat *st) {
  return fstatat(fd, name, st, 0);
}


x86 assembly (clang, -O0):
<statat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <fstatat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<statat>:
xor    %ecx,%ecx
jmp    1030 <fstatat@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @statat(i32 %0, i8* %1, %struct.stat* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca %struct.stat*
store i32 %0, i32* %4
store i8* %1, i8** %5
store %struct.stat* %2, %struct.stat** %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load %struct.stat*, %struct.stat** %6
%10 = call i32 @fstatat(i32 %7, i8* %8, %struct.stat* %9, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @statat(i32 %0, i8* %1, %struct.stat* %2) {
%4 = tail call i32 @fstatat(i32 %0, i8* %1, %struct.stat* %2, i32 0)
ret i32 %4
}
int unregister_dynamic_debug_module(const char *mod_name) { return 0; }


x86 assembly (clang, -O0):
<unregister_dynamic_debug_module>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unregister_dynamic_debug_module>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @unregister_dynamic_debug_module(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @unregister_dynamic_debug_module(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int MLMain(int, char **);
int main(int argc, char *argv[]) { return MLMain(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <MLMain@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <MLMain@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @MLMain(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @MLMain(i32 %0, i8** %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ snprintf(char *, int, char *, char *, char *);
void iconvFail(char *toCode, char *fromCode) {
  static int warned = 0;
  if (!warned++) {
    char buf[256];
    snprintf(buf, sizeof(buf), "iconv_open(%s, %s)", toCode, fromCode);
    perror(buf);
  }
}


x86 assembly (clang, -O0):
<iconvFail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2efb(%rip),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,0x2ef0(%rip)
cmp    $0x0,%eax
jne    1179 <iconvFail+0x59>
lea    -0x110(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%r8
mov    $0x100,%esi
lea    0xe98(%rip),%rdx
call   1030 <snprintf@plt>
lea    -0x110(%rbp),%rdi
call   1040 <perror@plt>
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iconvFail>:
push   %rbx
sub    $0x100,%rsp
mov    0x2f06(%rip),%eax
lea    0x1(%rax),%edx
mov    %edx,0x2efd(%rip)
test   %eax,%eax
je     1144 <iconvFail+0x24>
add    $0x100,%rsp
pop    %rbx
ret
mov    %rsi,%r8
mov    %rdi,%rcx
lea    0xeaf(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x100,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
jmp    113b <iconvFail+0x1b>

LLVM IR (-O0):
@iconvFail.warned = internal global i32 0
@.str = [19 x i8] c"iconv_open(%s, %s)\00"
define void @iconvFail(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [256 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i32, i32* @iconvFail.warned
%7 = add nsw i32 %6, 1
store i32 %7, i32* @iconvFail.warned
%8 = icmp ne i32 %6, 0
br i1 %8, label %16, label %9
9: ; preds = %2
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%11 = load i8*, i8** %3
%12 = load i8*, i8** %4
%13 = call i32 @snprintf(i8* %10, i32 256, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %11, i8* %12)
%14 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%15 = call i32 @perror(i8* %14)
br label %16
16: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
@iconvFail.warned = internal unnamed_addr global i32 0
@.str = [19 x i8] c"iconv_open(%s, %s)\00"
define void @iconvFail(i8* %0, i8* %1) {
%3 = alloca [256 x i8]
%4 = load i32, i32* @iconvFail.warned
%5 = add nsw i32 %4, 1
store i32 %5, i32* @iconvFail.warned
%6 = icmp eq i32 %4, 0
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%9 = call i32 @snprintf(i8* %8, i32 256, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%10 = call i32 @perror(i8* %8)
br label %11
11: ; preds = %7, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo2();
void foo1() {
  foo2();
  return;
}


x86 assembly (clang, -O0):
<foo1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <foo2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo1>:
xor    %eax,%eax
jmp    1030 <foo2@plt>

LLVM IR (-O0):
define void @foo1() {
%1 = call i32 (...) @foo2()
ret void
}

LLVM IR (-O2):
define void @foo1() {
%1 = tail call i32 (...) @foo2()
ret void
}
int fun748() { return 748; }


x86 assembly (clang, -O0):
<fun748>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2ec,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun748>:
mov    $0x2ec,%eax
ret

LLVM IR (-O0):
define i32 @fun748() {
ret i32 748
}

LLVM IR (-O2):
define i32 @fun748() {
ret i32 748
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdout;
canit() {
  static char canistr[] = {24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 8,
                           8,  8,  8,  8,  8,  8,  8,  8,  8,  0};
  printf(canistr);
  fflush(stdout);
}


x86 assembly (clang, -O0):
<canit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0x2f11(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<canit>:
push   %rax
lea    0x2f18(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@canit.canistr = internal global [21 x i8] c"\18\18\18\18\18\18\18\18\18\18\08\08\08\08\08\08\08\08\08\08\00"
@stdout = global i32 0
define i32 @canit() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @canit.canistr, i64 0, i64 0))
%3 = load i32, i32* @stdout
%4 = call i32 @fflush(i32 %3)
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
@canit.canistr = internal global [21 x i8] c"\18\18\18\18\18\18\18\18\18\18\08\08\08\08\08\08\08\08\08\08\00"
@stdout = global i32 0
define i32 @canit() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @canit.canistr, i64 0, i64 0))
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
ret i32 undef
}
float min(float a, float b, float c) {
  float min;
  if (a < b)
    min = a;
  else
    min = b;
  if (min < c)
    return min;
  else
    return c;
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <min+0x35>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
jmp    113f <min+0x3f>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm1
movss  -0x10(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1161 <min+0x61>
movss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    116b <min+0x6b>
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
minss  %xmm1,%xmm0
minss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @min(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%9 = load float, float* %5
%10 = load float, float* %6
%11 = fcmp olt float %9, %10
br i1 %11, label %12, label %14
12: ; preds = %3
%13 = load float, float* %5
store float %13, float* %8
br label %16
14: ; preds = %3
%15 = load float, float* %6
store float %15, float* %8
br label %16
16: ; preds = %14, %12
%17 = load float, float* %8
%18 = load float, float* %7
%19 = fcmp olt float %17, %18
br i1 %19, label %20, label %22
20: ; preds = %16
%21 = load float, float* %8
store float %21, float* %4
br label %24
22: ; preds = %16
%23 = load float, float* %7
store float %23, float* %4
br label %24
24: ; preds = %22, %20
%25 = load float, float* %4
ret float %25
}

LLVM IR (-O2):
define float @min(float %0, float %1, float %2) {
%4 = fcmp olt float %0, %1
%5 = select i1 %4, float %0, float %1
%6 = fcmp olt float %5, %2
%7 = select i1 %6, float %5, float %2
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("This is a automake based \"ampro\" target.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [42 x i8] c"This is a automake based \22ampro\22 target.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [41 x i8] c"This is a automake based \22ampro\22 target.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ foo();
main() { foo(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @foo()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo()
ret i32 0
}
int test_imm_30int16_mem(short *val) {
  return ((*val) & (-0x30 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_30int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffffd0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_30int16_mem>:
movzwl (%rdi),%eax
test   $0xffd0,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_30int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -48
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_30int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -48
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int *);
int /*<<< orphan*/ free(int *);
int *malloc(int);
int *sum(int *accum, int *elem) {
  int *ret = malloc(sizeof(int));
  assert(ret);
  *ret = *accum + *elem;
  free(accum);
  return ret;
}


x86 assembly (clang, -O0):
<sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
add    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <assert@plt>
mov    (%r14),%eax
add    (%r15),%eax
mov    %eax,(%rbx)
mov    %r15,%rdi
call   1030 <free@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32* @sum(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = call i32* @malloc(i32 4)
store i32* %6, i32** %5
%7 = load i32*, i32** %5
%8 = call i32 @assert(i32* %7)
%9 = load i32*, i32** %3
%10 = load i32, i32* %9
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = add nsw i32 %10, %12
%14 = load i32*, i32** %5
store i32 %13, i32* %14
%15 = load i32*, i32** %3
%16 = call i32 @free(i32* %15)
%17 = load i32*, i32** %5
ret i32* %17
}

LLVM IR (-O2):
define i32* @sum(i32* nocapture %0, i32* nocapture %1) {
%3 = tail call i32* @malloc(i32 4)
%4 = tail call i32 @assert(i32* %3)
%5 = load i32, i32* %0
%6 = load i32, i32* %1
%7 = add nsw i32 %6, %5
store i32 %7, i32* %3
%8 = tail call i32 @free(i32* %0)
ret i32* %3
}
int test_imm_EEint16_mem(short *val) {
  return ((*val) & (0xEE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EEint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xee,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EEint16_mem>:
testb  $0xee,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EEint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 238
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_EEint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 238
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int main() {
  int i;
  int j;
  for (i = 0; i < 10; ++i) {
    j = i + i;
    if (5 != i + i) {
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    1150 <main+0x50>
mov    -0x8(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%ecx
add    -0x8(%rbp),%ecx
mov    $0x5,%eax
cmp    %ecx,%eax
je     113d <main+0x3d>
jmp    113d <main+0x3d>
jmp    1142 <main+0x42>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %4
4: ; preds = %17, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %20
7: ; preds = %4
%8 = load i32, i32* %2
%9 = load i32, i32* %2
%10 = add nsw i32 %8, %9
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = load i32, i32* %2
%13 = add nsw i32 %11, %12
%14 = icmp ne i32 5, %13
br i1 %14, label %15, label %16
15: ; preds = %7
br label %16
16: ; preds = %15, %7
br label %17
17: ; preds = %16
%18 = load i32, i32* %2
%19 = add nsw i32 %18, 1
store i32 %19, i32* %2
br label %4
20: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int int32_t;

/* Variables and functions */
uint8_t aeron_semantic_version_major(int32_t version) {
  return (uint8_t)((version >> 16) & 0xFF);
}


x86 assembly (clang, -O0):
<aeron_semantic_version_major>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aeron_semantic_version_major>:
shr    $0x10,%edi
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @aeron_semantic_version_major(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 16
%5 = and i32 %4, 255
ret i32 %5
}

LLVM IR (-O2):
define i32 @aeron_semantic_version_major(i32 %0) {
%2 = lshr i32 %0, 16
%3 = and i32 %2, 255
ret i32 %3
}
/* Variables and functions */
char power(int, int);
int bit_is_set(char *bitmap, int bit) {
  char tfg;
  tfg = power(2, bit);
  if ((tfg & bitmap[bit / 8]))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<bit_is_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%esi
mov    $0x2,%edi
call   1030 <power@plt>
mov    %al,-0x15(%rbp)
movsbl -0x15(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%eax
mov    $0x8,%esi
cltd
idiv   %esi
mov    %eax,%edx
mov    -0x1c(%rbp),%eax
movslq %edx,%rdx
movsbl (%rcx,%rdx,1),%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1168 <bit_is_set+0x58>
movl   $0x1,-0x4(%rbp)
jmp    116f <bit_is_set+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_is_set>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
mov    $0x2,%edi
call   1030 <power@plt>
lea    0x7(%rbx),%ecx
test   %ebx,%ebx
cmovns %ebx,%ecx
sar    $0x3,%ecx
movslq %ecx,%rdx
xor    %ecx,%ecx
test   %al,(%r14,%rdx,1)
setne  %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @bit_is_set(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = call signext i8 @power(i32 2, i32 %7)
store i8 %8, i8* %6
%9 = load i8, i8* %6
%10 = sext i8 %9 to i32
%11 = load i8*, i8** %4
%12 = load i32, i32* %5
%13 = sdiv i32 %12, 8
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %11, i64 %14
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = and i32 %10, %17
%19 = icmp ne i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %2
store i32 1, i32* %3
br label %22
21: ; preds = %2
store i32 0, i32* %3
br label %22
22: ; preds = %21, %20
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @bit_is_set(i8* nocapture %0, i32 %1) {
%3 = tail call signext i8 @power(i32 2, i32 %1)
%4 = sdiv i32 %1, 8
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = and i8 %7, %3
%9 = icmp ne i8 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}
void LED_Init(void) {}


x86 assembly (clang, -O0):
<LED_Init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LED_Init>:
ret

LLVM IR (-O0):
define void @LED_Init() {
ret void
}

LLVM IR (-O2):
define void @LED_Init() {
ret void
}
/* Variables and functions */
char getchar();
int /*<<< orphan*/ putchar(char);
int main() {
  char c;
  while ((c = getchar()) != '`') {
    putchar(c);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x5(%rbp)
movsbl %al,%eax
cmp    $0x60,%eax
je     1153 <main+0x33>
movsbl -0x5(%rbp),%edi
call   1030 <putchar@plt>
jmp    112f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    $0x60,%al
je     1145 <main+0x25>
movsbl %al,%edi
call   1030 <putchar@plt>
jmp    1130 <main+0x10>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
br label %3
3: ; preds = %7, %0
%4 = call signext i8 (...) @getchar()
store i8 %4, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp ne i32 %5, 96
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i8, i8* %2
%9 = call i32 @putchar(i8 signext %8)
br label %3
10: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call signext i8 (...) @getchar()
%2 = icmp eq i8 %1, 96
br i1 %2, label %8, label %3
3: ; preds = %0, %3
%4 = phi i8 [ %6, %3 ], [ %1, %0 ]
%5 = tail call i32 @putchar(i8 signext %4)
%6 = tail call signext i8 (...) @getchar()
%7 = icmp eq i8 %6, 96
br i1 %7, label %8, label %3
8: ; preds = %3, %0
ret i32 0
}
unsigned long LPCStatusGet(unsigned long ulBase, unsigned long *pulCount,
                           unsigned long *pulPoolSize) {
  unsigned long ulStatus;
  ;
  ulStatus = (*((volatile unsigned long *)(ulBase + 0x00000004)));
  if (pulCount) {
    *pulCount = (((ulStatus & 0x00700000) >> 20) + 1);
  }
  if (pulPoolSize) {
    *pulPoolSize = (((ulStatus & 0x000F0000) >> 16) * 256);
  }
  return (ulStatus);
}


x86 assembly (clang, -O0):
<LPCStatusGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1141 <LPCStatusGet+0x41>
mov    -0x20(%rbp),%rcx
and    $0x700000,%rcx
shr    $0x14,%rcx
add    $0x1,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1166 <LPCStatusGet+0x66>
mov    -0x20(%rbp),%rcx
and    $0xf0000,%rcx
shr    $0x10,%rcx
shl    $0x8,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LPCStatusGet>:
mov    0x4(%rdi),%rax
test   %rsi,%rsi
je     1118 <LPCStatusGet+0x18>
mov    %eax,%ecx
shr    $0x14,%ecx
and    $0x7,%ecx
add    $0x1,%rcx
mov    %rcx,(%rsi)
test   %rdx,%rdx
je     112d <LPCStatusGet+0x2d>
mov    %rax,%rcx
shr    $0x8,%rcx
and    $0xf00,%ecx
mov    %rcx,(%rdx)
ret

LLVM IR (-O0):
define i64 @LPCStatusGet(i64 %0, i64* %1, i64* %2) {
%4 = alloca i64
%5 = alloca i64*
%6 = alloca i64*
%7 = alloca i64
store i64 %0, i64* %4
store i64* %1, i64** %5
store i64* %2, i64** %6
%8 = load i64, i64* %4
%9 = add i64 %8, 4
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
store i64 %11, i64* %7
%12 = load i64*, i64** %5
%13 = icmp ne i64* %12, null
br i1 %13, label %14, label %20
14: ; preds = %3
%15 = load i64, i64* %7
%16 = and i64 %15, 7340032
%17 = lshr i64 %16, 20
%18 = add i64 %17, 1
%19 = load i64*, i64** %5
store i64 %18, i64* %19
br label %20
20: ; preds = %14, %3
%21 = load i64*, i64** %6
%22 = icmp ne i64* %21, null
br i1 %22, label %23, label %29
23: ; preds = %20
%24 = load i64, i64* %7
%25 = and i64 %24, 983040
%26 = lshr i64 %25, 16
%27 = mul i64 %26, 256
%28 = load i64*, i64** %6
store i64 %27, i64* %28
br label %29
29: ; preds = %23, %20
%30 = load i64, i64* %7
ret i64 %30
}

LLVM IR (-O2):
define i64 @LPCStatusGet(i64 %0, i64* writeonly %1, i64* writeonly %2) {
%4 = add i64 %0, 4
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = icmp eq i64* %1, null
br i1 %7, label %12, label %8
8: ; preds = %3
%9 = lshr i64 %6, 20
%10 = and i64 %9, 7
%11 = add nuw nsw i64 %10, 1
store i64 %11, i64* %1
br label %12
12: ; preds = %8, %3
%13 = icmp eq i64* %2, null
br i1 %13, label %17, label %14
14: ; preds = %12
%15 = lshr i64 %6, 8
%16 = and i64 %15, 3840
store i64 %16, i64* %2
br label %17
17: ; preds = %14, %12
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ assert(char *);
scalar_t__ malloc(unsigned int);
int /*<<< orphan*/ memcpy(char *, char *, unsigned int);
char *makeCString(char *fstr, unsigned len) {
  char *res = (char *)malloc(len + 1);
  assert(res);
  memcpy(res, fstr, len);
  res[len] = 0;
  return res;
}


x86 assembly (clang, -O0):
<makeCString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
mov    -0xc(%rbp),%ecx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<makeCString>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%r15d
mov    %rdi,%r14
lea    0x1(%r15),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <assert@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1040 <memcpy@plt>
mov    %r15d,%eax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @makeCString(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add i32 %6, 1
%8 = call i64 @malloc(i32 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = call i32 @assert(i8* %10)
%12 = load i8*, i8** %5
%13 = load i8*, i8** %3
%14 = load i32, i32* %4
%15 = call i32 @memcpy(i8* %12, i8* %13, i32 %14)
%16 = load i8*, i8** %5
%17 = load i32, i32* %4
%18 = zext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
store i8 0, i8* %19
%20 = load i8*, i8** %5
ret i8* %20
}

LLVM IR (-O2):
define i8* @makeCString(i8* %0, i32 %1) {
%3 = add i32 %1, 1
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @assert(i8* %5)
%7 = tail call i32 @memcpy(i8* %5, i8* %0, i32 %1)
%8 = zext i32 %1 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
store i8 0, i8* %9
ret i8* %5
}
void __android_logPower_print(void) {}


x86 assembly (clang, -O0):
<__android_logPower_print>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__android_logPower_print>:
ret

LLVM IR (-O0):
define void @__android_logPower_print() {
ret void
}

LLVM IR (-O2):
define void @__android_logPower_print() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
unsigned sizeof_offset(void) { return (unsigned)sizeof(off_t); }


x86 assembly (clang, -O0):
<sizeof_offset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sizeof_offset>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @sizeof_offset() {
ret i32 4
}

LLVM IR (-O2):
define i32 @sizeof_offset() {
ret i32 4
}
int baz(int c) { return c % 2; }


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
mov    %edi,%eax
mov    %edi,%ecx
shr    $0x1f,%ecx
add    %edi,%ecx
and    $0xfffffffe,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @baz(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @baz(i32 %0) {
%2 = srem i32 %0, 2
ret i32 %2
}
int get_suitable_block_num(int device, int *max_block_num, int *mp_num,
                           int word_size, int thread_num, int large_size) {
  return 0;
}


x86 assembly (clang, -O0):
<get_suitable_block_num>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_suitable_block_num>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_suitable_block_num(i32 %0, i32* %1, i32* %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32* %1, i32** %8
store i32* %2, i32** %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
ret i32 0
}

LLVM IR (-O2):
define i32 @get_suitable_block_num(i32 %0, i32* nocapture readnone %1, i32* nocapture readnone %2, i32 %3, i32 %4, i32 %5) {
ret i32 0
}
void translate(x, y, z, ax, ay, az) double *x, *y, *z;
double ax, ay, az;
{
  *x = *x + ax;
  *y = *y + ay;
  *z = *z + az;
}


x86 assembly (clang, -O0):
<translate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movsd  %xmm0,-0x20(%rbp)
movsd  %xmm1,-0x28(%rbp)
movsd  %xmm2,-0x30(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
addsd  -0x20(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
addsd  -0x28(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x18(%rbp),%rax
movsd  (%rax),%xmm0
addsd  -0x30(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<translate>:
addsd  (%rdi),%xmm0
movsd  %xmm0,(%rdi)
addsd  (%rsi),%xmm1
movsd  %xmm1,(%rsi)
addsd  (%rdx),%xmm2
movsd  %xmm2,(%rdx)
ret

LLVM IR (-O0):
define void @translate(double* %0, double* %1, double* %2, double %3, double %4, double %5) {
%7 = alloca double*
%8 = alloca double*
%9 = alloca double*
%10 = alloca double
%11 = alloca double
%12 = alloca double
store double* %0, double** %7
store double* %1, double** %8
store double* %2, double** %9
store double %3, double* %10
store double %4, double* %11
store double %5, double* %12
%13 = load double*, double** %7
%14 = load double, double* %13
%15 = load double, double* %10
%16 = fadd double %14, %15
%17 = load double*, double** %7
store double %16, double* %17
%18 = load double*, double** %8
%19 = load double, double* %18
%20 = load double, double* %11
%21 = fadd double %19, %20
%22 = load double*, double** %8
store double %21, double* %22
%23 = load double*, double** %9
%24 = load double, double* %23
%25 = load double, double* %12
%26 = fadd double %24, %25
%27 = load double*, double** %9
store double %26, double* %27
ret void
}

LLVM IR (-O2):
define void @translate(double* nocapture %0, double* nocapture %1, double* nocapture %2, double %3, double %4, double %5) {
%7 = load double, double* %0
%8 = fadd double %7, %3
store double %8, double* %0
%9 = load double, double* %1
%10 = fadd double %9, %4
store double %10, double* %1
%11 = load double, double* %2
%12 = fadd double %11, %5
store double %12, double* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ InitializeDrawSystem(void *);
int /*<<< orphan*/ InitializeInputSystem(void *);
void InitializeEventSystem(void *theEnv) {
  InitializeDrawSystem(theEnv);
  InitializeInputSystem(theEnv);
}


x86 assembly (clang, -O0):
<InitializeEventSystem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <InitializeDrawSystem@plt>
mov    -0x8(%rbp),%rdi
call   1040 <InitializeInputSystem@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<InitializeEventSystem>:
push   %rbx
mov    %rdi,%rbx
call   1030 <InitializeDrawSystem@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <InitializeInputSystem@plt>

LLVM IR (-O0):
define void @InitializeEventSystem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @InitializeDrawSystem(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @InitializeInputSystem(i8* %5)
ret void
}

LLVM IR (-O2):
define void @InitializeEventSystem(i8* %0) {
%2 = tail call i32 @InitializeDrawSystem(i8* %0)
%3 = tail call i32 @InitializeInputSystem(i8* %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_1__;

/* Type definitions */
struct TYPE_4__ {
  int /*<<< orphan*/ max;
  int /*<<< orphan*/ data;
};
typedef TYPE_1__ BUF_MEM;

/* Variables and functions */
int /*<<< orphan*/ free(TYPE_1__ *);
int /*<<< orphan*/ freezero(int /*<<< orphan*/, int /*<<< orphan*/);
void BUF_MEM_free(BUF_MEM *a) {
  if (a == NULL)
    return;
  freezero(a->data, a->max);
  free(a);
}


x86 assembly (clang, -O0):
<BUF_MEM_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113c <BUF_MEM_free+0x1c>
jmp    1157 <BUF_MEM_free+0x37>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%edi
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
call   1030 <freezero@plt>
mov    -0x8(%rbp),%rdi
call   1040 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BUF_MEM_free>:
test   %rdi,%rdi
je     113c <BUF_MEM_free+0x1c>
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%esi
mov    0x4(%rdi),%edi
call   1030 <freezero@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <free@plt>
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { i32, i32 }
define void @BUF_MEM_free(%struct.TYPE_4__* %0) {
%2 = alloca %struct.TYPE_4__*
store %struct.TYPE_4__* %0, %struct.TYPE_4__** %2
%3 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%4 = icmp eq %struct.TYPE_4__* %3, null
br i1 %4, label %5, label %6
5: ; preds = %1
br label %16
6: ; preds = %1
%7 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 1
%9 = load i32, i32* %8
%10 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%11 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %10, i32 0, i32 0
%12 = load i32, i32* %11
%13 = call i32 @freezero(i32 %9, i32 %12)
%14 = load %struct.TYPE_4__*, %struct.TYPE_4__** %2
%15 = call i32 @free(%struct.TYPE_4__* %14)
br label %16
16: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
%struct.TYPE_4__ = type { i32, i32 }
define void @BUF_MEM_free(%struct.TYPE_4__* %0) {
%2 = icmp eq %struct.TYPE_4__* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %0, i64 0, i32 1
%5 = load i32, i32* %4
%6 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %0, i64 0, i32 0
%7 = load i32, i32* %6
%8 = tail call i32 @freezero(i32 %5, i32 %7)
%9 = tail call i32 @free(%struct.TYPE_4__* %0)
br label %10
10: ; preds = %1, %3
ret void
}
void main() {
  int y;
  int x = 5;
  if (y > 1) {
    x = y;
  }
  if (x == y) {
    x = x - 1;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x5,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jle    111b <main+0x1b>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jne    1130 <main+0x30>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
store i32 5, i32* %2
%3 = load i32, i32* %1
%4 = icmp sgt i32 %3, 1
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = load i32, i32* %1
store i32 %6, i32* %2
br label %7
7: ; preds = %5, %0
%8 = load i32, i32* %2
%9 = load i32, i32* %1
%10 = icmp eq i32 %8, %9
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %2
%13 = sub nsw i32 %12, 1
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %7
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
void addvf(double *result, const double *s1, const double s2) {
  result[0] = s1[0] + s2;
  result[1] = s1[1] + s2;
  result[2] = s1[2] + s2;
}


x86 assembly (clang, -O0):
<addvf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
addsd  -0x18(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movsd  0x8(%rax),%xmm0
addsd  -0x18(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x8(%rax)
mov    -0x10(%rbp),%rax
movsd  0x10(%rax),%xmm0
addsd  -0x18(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<addvf>:
movsd  (%rsi),%xmm1
addsd  %xmm0,%xmm1
movsd  %xmm1,(%rdi)
movsd  0x8(%rsi),%xmm1
addsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rdi)
addsd  0x10(%rsi),%xmm0
movsd  %xmm0,0x10(%rdi)
ret

LLVM IR (-O0):
define void @addvf(double* %0, double* %1, double %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double
store double* %0, double** %4
store double* %1, double** %5
store double %2, double* %6
%7 = load double*, double** %5
%8 = getelementptr inbounds double, double* %7, i64 0
%9 = load double, double* %8
%10 = load double, double* %6
%11 = fadd double %9, %10
%12 = load double*, double** %4
%13 = getelementptr inbounds double, double* %12, i64 0
store double %11, double* %13
%14 = load double*, double** %5
%15 = getelementptr inbounds double, double* %14, i64 1
%16 = load double, double* %15
%17 = load double, double* %6
%18 = fadd double %16, %17
%19 = load double*, double** %4
%20 = getelementptr inbounds double, double* %19, i64 1
store double %18, double* %20
%21 = load double*, double** %5
%22 = getelementptr inbounds double, double* %21, i64 2
%23 = load double, double* %22
%24 = load double, double* %6
%25 = fadd double %23, %24
%26 = load double*, double** %4
%27 = getelementptr inbounds double, double* %26, i64 2
store double %25, double* %27
ret void
}

LLVM IR (-O2):
define void @addvf(double* nocapture writeonly %0, double* nocapture %1, double %2) {
%4 = load double, double* %1
%5 = fadd double %4, %2
store double %5, double* %0
%6 = getelementptr inbounds double, double* %1, i64 1
%7 = load double, double* %6
%8 = fadd double %7, %2
%9 = getelementptr inbounds double, double* %0, i64 1
store double %8, double* %9
%10 = getelementptr inbounds double, double* %1, i64 2
%11 = load double, double* %10
%12 = fadd double %11, %2
%13 = getelementptr inbounds double, double* %0, i64 2
store double %12, double* %13
ret void
}
/* Variables and functions */
int errno;
long getpriority(int, int);
int Seccomp_isWorking() {
  errno = 0;
  long ret = getpriority(1000, 1);
  int err = errno;
  return (ret == -1 && err == 3333) || (ret == -3333 && err == 0);
}


x86 assembly (clang, -O0):
<Seccomp_isWorking>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec1(%rip),%rax
movl   $0x0,(%rax)
mov    $0x3e8,%edi
mov    $0x1,%esi
call   1030 <getpriority@plt>
mov    %rax,-0x8(%rbp)
mov    0x2ea1(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
cmpq   $0xffffffffffffffff,-0x8(%rbp)
jne    1161 <Seccomp_isWorking+0x51>
mov    $0x1,%al
cmpl   $0xd05,-0xc(%rbp)
mov    %al,-0xd(%rbp)
je     1184 <Seccomp_isWorking+0x74>
xor    %eax,%eax
cmpq   $0xfffffffffffff2fb,-0x8(%rbp)
ff
mov    %al,-0xe(%rbp)
jne    117e <Seccomp_isWorking+0x6e>
cmpl   $0x0,-0xc(%rbp)
sete   %al
mov    %al,-0xe(%rbp)
mov    -0xe(%rbp),%al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Seccomp_isWorking>:
push   %rbx
mov    0x2ec8(%rip),%rbx
movl   $0x0,(%rbx)
mov    $0x3e8,%edi
mov    $0x1,%esi
call   1030 <getpriority@plt>
mov    (%rbx),%ecx
cmp    $0xffffffffffffffff,%rax
sete   %dl
cmp    $0xd05,%ecx
sete   %bl
and    %dl,%bl
cmp    $0xfffffffffffff2fb,%rax
sete   %al
test   %ecx,%ecx
sete   %cl
and    %al,%cl
or     %bl,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @Seccomp_isWorking() {
%1 = alloca i64
%2 = alloca i32
store i32 0, i32* @errno
%3 = call i64 @getpriority(i32 1000, i32 1)
store i64 %3, i64* %1
%4 = load i32, i32* @errno
store i32 %4, i32* %2
%5 = load i64, i64* %1
%6 = icmp eq i64 %5, -1
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = load i32, i32* %2
%9 = icmp eq i32 %8, 3333
br i1 %9, label %18, label %10
10: ; preds = %7, %0
%11 = load i64, i64* %1
%12 = icmp eq i64 %11, -3333
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %2
%15 = icmp eq i32 %14, 0
br label %16
16: ; preds = %13, %10
%17 = phi i1 [ false, %10 ], [ %15, %13 ]
br label %18
18: ; preds = %16, %7
%19 = phi i1 [ true, %7 ], [ %17, %16 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @Seccomp_isWorking() {
store i32 0, i32* @errno
%1 = tail call i64 @getpriority(i32 1000, i32 1)
%2 = load i32, i32* @errno
%3 = icmp eq i64 %1, -1
%4 = icmp eq i32 %2, 3333
%5 = select i1 %3, i1 %4, i1 false
%6 = icmp eq i64 %1, -3333
%7 = icmp eq i32 %2, 0
%8 = select i1 %6, i1 %7, i1 false
%9 = select i1 %5, i1 true, i1 %8
%10 = zext i1 %9 to i32
ret i32 %10
}
int fib() {
  static int a = 0, b = 1;
  int c = a;
  a = b;
  b += c;
  return c;
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1e(%rip),%eax
mov    %eax,-0x4(%rbp)
mov    0x2f0d(%rip),%eax
mov    %eax,0x2f0f(%rip)
mov    -0x4(%rbp),%eax
add    0x2efe(%rip),%eax
mov    %eax,0x2ef8(%rip)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
mov    0x2f22(%rip),%eax
mov    0x2f14(%rip),%ecx
mov    %ecx,0x2f16(%rip)
add    %eax,%ecx
mov    %ecx,0x2f06(%rip)
ret

LLVM IR (-O0):
@fib.a = internal global i32 0
@fib.b = internal global i32 1
define i32 @fib() {
%1 = alloca i32
%2 = load i32, i32* @fib.a
store i32 %2, i32* %1
%3 = load i32, i32* @fib.b
store i32 %3, i32* @fib.a
%4 = load i32, i32* %1
%5 = load i32, i32* @fib.b
%6 = add nsw i32 %5, %4
store i32 %6, i32* @fib.b
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
@fib.a = internal unnamed_addr global i32 0
@fib.b = internal unnamed_addr global i32 1
define i32 @fib() {
%1 = load i32, i32* @fib.a
%2 = load i32, i32* @fib.b
store i32 %2, i32* @fib.a
%3 = add nsw i32 %2, %1
store i32 %3, i32* @fib.b
ret i32 %1
}