xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ WINDOW;

/* Variables and functions */
int COLS;
int LINES;
int /*<<< orphan*/ *newwin(int, int, int, int);
int /*<<< orphan*/ wrefresh(int /*<<< orphan*/ *);
WINDOW *rackwin() {
  WINDOW *temp;
  int height = 1;
  int width = 9;
  int starty = LINES - 7;
  int startx = (COLS - 4) / 2;
  temp = newwin(height, width, starty, startx);
  wrefresh(temp);
  return temp;
}


x86 assembly (clang, -O0):
<rackwin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x1,-0xc(%rbp)
movl   $0x9,-0x10(%rbp)
mov    0x2eab(%rip),%rax
mov    (%rax),%eax
sub    $0x7,%eax
mov    %eax,-0x14(%rbp)
mov    0x2e94(%rip),%rax
mov    (%rax),%eax
sub    $0x4,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
call   1040 <newwin@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wrefresh@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rackwin>:
push   %rbx
mov    0x2ec0(%rip),%rax
mov    (%rax),%edx
add    $0xfffffff9,%edx
mov    0x2eac(%rip),%rax
mov    (%rax),%eax
mov    %eax,%ecx
add    $0xfffffffc,%ecx
shr    $0x1f,%ecx
add    %eax,%ecx
add    $0xfffffffc,%ecx
sar    %ecx
mov    $0x1,%edi
mov    $0x9,%esi
call   1040 <newwin@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <wrefresh@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@LINES = global i32 0
@COLS = global i32 0
define i32* @rackwin() {
%1 = alloca i32*
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 1, i32* %2
store i32 9, i32* %3
%6 = load i32, i32* @LINES
%7 = sub nsw i32 %6, 7
store i32 %7, i32* %4
%8 = load i32, i32* @COLS
%9 = sub nsw i32 %8, 4
%10 = sdiv i32 %9, 2
store i32 %10, i32* %5
%11 = load i32, i32* %2
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = call i32* @newwin(i32 %11, i32 %12, i32 %13, i32 %14)
store i32* %15, i32** %1
%16 = load i32*, i32** %1
%17 = call i32 @wrefresh(i32* %16)
%18 = load i32*, i32** %1
ret i32* %18
}

LLVM IR (-O2):
@LINES = global i32 0
@COLS = global i32 0
define i32* @rackwin() {
%1 = load i32, i32* @LINES
%2 = add nsw i32 %1, -7
%3 = load i32, i32* @COLS
%4 = add nsw i32 %3, -4
%5 = sdiv i32 %4, 2
%6 = tail call i32* @newwin(i32 1, i32 9, i32 %2, i32 %5)
%7 = tail call i32 @wrefresh(i32* %6)
ret i32* %6
}
/* Variables and functions */
int addition_func(int, int, int, int /*<<< orphan*/, int /*<<< orphan*/);
int inc_func(int src, int dest, int is_word) {
  (void)src;
  return addition_func(1, dest, is_word, 0, 0);
}


x86 assembly (clang, -O0):
<inc_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    $0x1,%edi
xor    %r8d,%r8d
mov    %r8d,%ecx
call   1030 <addition_func@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inc_func>:
mov    $0x1,%edi
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <addition_func@plt>

LLVM IR (-O0):
define i32 @inc_func(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @addition_func(i32 1, i32 %8, i32 %9, i32 0, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @inc_func(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @addition_func(i32 1, i32 %1, i32 %2, i32 0, i32 0)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint;

/* Variables and functions */
int CLAMP(int, int, int);
char *_ltoa_internal(long, char *, int /*<<< orphan*/);
char *_ultoa_internal(unsigned long, char *, int /*<<< orphan*/);
char *ltoa(long value, char *str, int base) {
  base = CLAMP(base, 2, 32);
  if (base != 10) {
    return _ultoa_internal((unsigned long)value, str, (uint)base);
  } else {
    return _ltoa_internal(value, str, (uint)base);
  }
}


x86 assembly (clang, -O0):
<ltoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x1c(%rbp),%edi
mov    $0x2,%esi
mov    $0x20,%edx
call   1050 <CLAMP@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0xa,-0x1c(%rbp)
je     117b <ltoa+0x4b>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <_ultoa_internal@plt>
mov    %rax,-0x8(%rbp)
jmp    118f <ltoa+0x5f>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1040 <_ltoa_internal@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltoa>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %edx,%edi
mov    $0x2,%esi
mov    $0x20,%edx
call   1050 <CLAMP@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
cmp    $0xa,%eax
jne    1167 <ltoa+0x37>
mov    $0xa,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <_ltoa_internal@plt>
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <_ultoa_internal@plt>

LLVM IR (-O0):
define i8* @ltoa(i64 %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i32
store i64 %0, i64* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = call i32 @CLAMP(i32 %8, i32 2, i32 32)
store i32 %9, i32* %7
%10 = load i32, i32* %7
%11 = icmp ne i32 %10, 10
br i1 %11, label %12, label %17
12: ; preds = %3
%13 = load i64, i64* %5
%14 = load i8*, i8** %6
%15 = load i32, i32* %7
%16 = call i8* @_ultoa_internal(i64 %13, i8* %14, i32 %15)
store i8* %16, i8** %4
br label %22
17: ; preds = %3
%18 = load i64, i64* %5
%19 = load i8*, i8** %6
%20 = load i32, i32* %7
%21 = call i8* @_ltoa_internal(i64 %18, i8* %19, i32 %20)
store i8* %21, i8** %4
br label %22
22: ; preds = %17, %12
%23 = load i8*, i8** %4
ret i8* %23
}

LLVM IR (-O2):
define i8* @ltoa(i64 %0, i8* %1, i32 %2) {
%4 = tail call i32 @CLAMP(i32 %2, i32 2, i32 32)
%5 = icmp eq i32 %4, 10
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i8* @_ultoa_internal(i64 %0, i8* %1, i32 %4)
br label %10
8: ; preds = %3
%9 = tail call i8* @_ltoa_internal(i64 %0, i8* %1, i32 10)
br label %10
10: ; preds = %8, %6
%11 = phi i8* [ %7, %6 ], [ %9, %8 ]
ret i8* %11
}
unsigned long align8(unsigned long val) { return ((val + 7) & ~7); }


x86 assembly (clang, -O0):
<align8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x7,%rax
and    $0xfffffffffffffff8,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<align8>:
lea    0x7(%rdi),%rax
and    $0xfffffffffffffff8,%rax
ret

LLVM IR (-O0):
define i64 @align8(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 7
%5 = and i64 %4, -8
ret i64 %5
}

LLVM IR (-O2):
define i64 @align8(i64 %0) {
%2 = add i64 %0, 7
%3 = and i64 %2, -8
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ XExtData;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
void free_XExtData(void *_p) {
  if (_p == NULL)
    abort();
  free((XExtData *)_p);
}


x86 assembly (clang, -O0):
<free_XExtData>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113e <free_XExtData+0x1e>
mov    $0x0,%al
call   1040 <abort@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_XExtData>:
test   %rdi,%rdi
je     112a <free_XExtData+0xa>
jmp    1030 <free@plt>
push   %rax
xor    %eax,%eax
call   1040 <abort@plt>

LLVM IR (-O0):
define void @free_XExtData(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i32*
%10 = call i32 @free(i32* %9)
ret void
}

LLVM IR (-O2):
define void @free_XExtData(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
%6 = bitcast i8* %0 to i32*
%7 = tail call i32 @free(i32* %6)
ret void
}
int convert_hour(int hour) {
  if (hour > 12) {
    return hour - 12;
  } else
    return hour;
}


x86 assembly (clang, -O0):
<convert_hour>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xc,-0x8(%rbp)
jle    111f <convert_hour+0x1f>
mov    -0x8(%rbp),%eax
sub    $0xc,%eax
mov    %eax,-0x4(%rbp)
jmp    1125 <convert_hour+0x25>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_hour>:
lea    -0xc(%rdi),%eax
cmp    $0xd,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @convert_hour(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 12
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 12
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @convert_hour(i32 %0) {
%2 = icmp sgt i32 %0, 12
%3 = add nsw i32 %0, -12
%4 = select i1 %2, i32 %3, i32 %0
ret i32 %4
}
void video_uninit() {}


x86 assembly (clang, -O0):
<video_uninit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<video_uninit>:
ret

LLVM IR (-O0):
define void @video_uninit() {
ret void
}

LLVM IR (-O2):
define void @video_uninit() {
ret void
}
void bcast_kazeos(void) {}


x86 assembly (clang, -O0):
<bcast_kazeos>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcast_kazeos>:
ret

LLVM IR (-O0):
define void @bcast_kazeos() {
ret void
}

LLVM IR (-O2):
define void @bcast_kazeos() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void g(int *x, int c) {
  if (c == 1) {
    if (*x != 3)
      abort();
    (*x)++;
  } else if (c == 2) {
    if (*x != 4)
      abort();
  }
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    114d <g+0x3d>
mov    -0x8(%rbp),%rax
cmpl   $0x3,(%rax)
je     113d <g+0x2d>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
jmp    1175 <g+0x65>
cmpl   $0x2,-0xc(%rbp)
jne    1170 <g+0x60>
mov    -0x8(%rbp),%rax
cmpl   $0x4,(%rax)
je     116b <g+0x5b>
mov    $0x0,%al
call   1030 <abort@plt>
jmp    1170 <g+0x60>
jmp    1175 <g+0x65>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %rax
cmp    $0x2,%esi
je     1128 <g+0x18>
cmp    $0x1,%esi
jne    112d <g+0x1d>
cmpl   $0x3,(%rdi)
jne    112f <g+0x1f>
movl   $0x4,(%rdi)
pop    %rax
ret
cmpl   $0x4,(%rdi)
jne    112f <g+0x1f>
pop    %rax
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @g(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %17
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = load i32, i32* %8
%10 = icmp ne i32 %9, 3
br i1 %10, label %11, label %13
11: ; preds = %7
%12 = call i32 (...) @abort()
unreachable
13: ; preds = %7
%14 = load i32*, i32** %3
%15 = load i32, i32* %14
%16 = add nsw i32 %15, 1
store i32 %16, i32* %14
br label %28
17: ; preds = %2
%18 = load i32, i32* %4
%19 = icmp eq i32 %18, 2
br i1 %19, label %20, label %27
20: ; preds = %17
%21 = load i32*, i32** %3
%22 = load i32, i32* %21
%23 = icmp ne i32 %22, 4
br i1 %23, label %24, label %26
24: ; preds = %20
%25 = call i32 (...) @abort()
unreachable
26: ; preds = %20
br label %27
27: ; preds = %26, %17
br label %28
28: ; preds = %27, %13
ret void
}

LLVM IR (-O2):
define void @g(i32* nocapture %0, i32 %1) {
switch i32 %1, label %14 [
i32 1, label %3
i32 2, label %9
]
3: ; preds = %2
%4 = load i32, i32* %0
%5 = icmp eq i32 %4, 3
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %3
store i32 4, i32* %0
br label %14
9: ; preds = %2
%10 = load i32, i32* %0
%11 = icmp eq i32 %10, 4
br i1 %11, label %14, label %12
12: ; preds = %9
%13 = tail call i32 (...) @abort()
unreachable
14: ; preds = %2, %9, %8
ret void
}
void av_frame_is_writable() {}


x86 assembly (clang, -O0):
<av_frame_is_writable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_frame_is_writable>:
ret

LLVM IR (-O0):
define void @av_frame_is_writable() {
ret void
}

LLVM IR (-O2):
define void @av_frame_is_writable() {
ret void
}
int cloog_version_beta(void) { return 0; }


x86 assembly (clang, -O0):
<cloog_version_beta>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cloog_version_beta>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cloog_version_beta() {
ret i32 0
}

LLVM IR (-O2):
define i32 @cloog_version_beta() {
ret i32 0
}
void cycles_begin(unsigned *hi, unsigned *lo) {
  asm volatile("CPUID\n\t"
               "RDTSC\n\t"
               "mov %%edx, %0\n\t"
               "mov %%eax, %1\n\t"
               : "=r"(*hi), "=r"(*lo)::"%rax", "%rbx", "%rcx", "%rdx");
}


x86 assembly (clang, -O0):
<cycles_begin>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
cpuid
rdtsc
mov    %edx,%esi
mov    %eax,%edi
mov    %edi,-0x24(%rbp)
mov    -0x30(%rbp),%rdx
mov    -0x24(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %esi,(%rdx)
mov    %ecx,(%rax)
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<cycles_begin>:
push   %rbx
cpuid
rdtsc
mov    %edx,%r8d
mov    %eax,%r9d
mov    %r8d,(%rdi)
mov    %r9d,(%rsi)
pop    %rbx
ret

LLVM IR (-O0):
define void @cycles_begin(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call { i32, i32 } asm sideeffect "CPUID\0A\09RDTSC\0A\09mov %edx, $0\0A\09mov %eax, $1\0A\09", "=r,=r,~{rax},~{rbx},~{rcx},~{rdx},~{dirflag},~{fpsr},~{flags}"()
%8 = extractvalue { i32, i32 } %7, 0
%9 = extractvalue { i32, i32 } %7, 1
store i32 %8, i32* %5
store i32 %9, i32* %6
ret void
}

LLVM IR (-O2):
define void @cycles_begin(i32* nocapture writeonly %0, i32* nocapture writeonly %1) {
%3 = tail call { i32, i32 } asm sideeffect "CPUID\0A\09RDTSC\0A\09mov %edx, $0\0A\09mov %eax, $1\0A\09", "=r,=r,~{rax},~{rbx},~{rcx},~{rdx},~{dirflag},~{fpsr},~{flags}"()
%4 = extractvalue { i32, i32 } %3, 0
%5 = extractvalue { i32, i32 } %3, 1
store i32 %4, i32* %0
store i32 %5, i32* %1
ret void
}
void *f(void) { return f; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    0x2ed9(%rip),%rax
ret

LLVM IR (-O0):
define i8* @f() {
ret i8* bitcast (i8* ()* @f to i8*)
}

LLVM IR (-O2):
define i8* @f() {
ret i8* bitcast (i8* ()* @f to i8*)
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
double u2d(uint64_t u) {
  union {
    double f;
    uint64_t i;
  } tmp;
  tmp.i = u;
  return tmp.f;
}


x86 assembly (clang, -O0):
<u2d>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<u2d>:
mov    %edi,%eax
movq   %rax,%xmm0
ret

LLVM IR (-O0):
%union.anon = type { double }
define double @u2d(i32 %0) {
%2 = alloca i32
%3 = alloca %union.anon
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = bitcast %union.anon* %3 to i32*
store i32 %4, i32* %5
%6 = bitcast %union.anon* %3 to double*
%7 = load double, double* %6
ret double %7
}

LLVM IR (-O2):
define double @u2d(i32 %0) {
%2 = zext i32 %0 to i64
%3 = bitcast i64 %2 to double
ret double %3
}
/* Variables and functions */
char *malloc(int);
int rand();
char *realloc(char *, int);
int /*<<< orphan*/ strcpy(char *, char *);
char *fn85() {
  char *result;
  result = malloc(20 + rand() % 20);
  result = realloc(result, 30 + rand() % 20);
  strcpy((char *)result, "fn85");
  return result;
}


x86 assembly (clang, -O0):
<fn85>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <rand@plt>
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1060 <rand@plt>
mov    -0x10(%rbp),%rdi
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
add    $0x1e,%esi
call   1050 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xe67(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn85>:
push   %rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%esi
add    $0x1e,%esi
mov    %rbx,%rdi
call   1050 <realloc@plt>
mov    %rax,%rbx
lea    0xe4f(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fn85\00"
define i8* @fn85() {
%1 = alloca i8*
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 20
%4 = add nsw i32 20, %3
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %1
%6 = load i8*, i8** %1
%7 = call i32 (...) @rand()
%8 = srem i32 %7, 20
%9 = add nsw i32 30, %8
%10 = call i8* @realloc(i8* %6, i32 %9)
store i8* %10, i8** %1
%11 = load i8*, i8** %1
%12 = call i32 @strcpy(i8* %11, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%13 = load i8*, i8** %1
ret i8* %13
}

LLVM IR (-O2):
@.str = [5 x i8] c"fn85\00"
define i8* @fn85() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 20
%3 = add nsw i32 %2, 20
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, 20
%7 = add nsw i32 %6, 30
%8 = tail call i8* @realloc(i8* %4, i32 %7)
%9 = tail call i32 @strcpy(i8* %8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i8* %8
}
unsigned int dns_domain_length(const char *dn) {
  const char *x = dn;
  unsigned char c = 0;
  if (x)
    while ((c = *x++))
      x += (unsigned int)c;
  return x - dn;
}


x86 assembly (clang, -O0):
<dns_domain_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movb   $0x0,-0x11(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115b <dns_domain_length+0x5b>
jmp    1124 <dns_domain_length+0x24>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    %al,-0x11(%rbp)
cmp    $0x0,%al
je     1156 <dns_domain_length+0x56>
movzbl -0x11(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,%ecx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <dns_domain_length+0x24>
jmp    115b <dns_domain_length+0x5b>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_domain_length>:
test   %rdi,%rdi
je     112a <dns_domain_length+0x2a>
mov    (%rdi),%cl
test   %cl,%cl
je     112f <dns_domain_length+0x2f>
mov    %rdi,%rax
xchg   %ax,%ax
movzbl %cl,%edx
movzbl 0x1(%rax,%rdx,1),%ecx
add    %rdx,%rax
add    $0x1,%rax
test   %cl,%cl
jne    1110 <dns_domain_length+0x10>
add    $0x1,%rax
sub    %edi,%eax
ret
xor    %eax,%eax
sub    %edi,%eax
ret
lea    0x1(%rdi),%rax
sub    %edi,%eax
ret

LLVM IR (-O0):
define i32 @dns_domain_length(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
store i8 0, i8* %4
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %21
8: ; preds = %1
br label %9
9: ; preds = %14, %8
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
%12 = load i8, i8* %10
store i8 %12, i8* %4
%13 = icmp ne i8 %12, 0
br i1 %13, label %14, label %20
14: ; preds = %9
%15 = load i8, i8* %4
%16 = zext i8 %15 to i32
%17 = load i8*, i8** %3
%18 = zext i32 %16 to i64
%19 = getelementptr inbounds i8, i8* %17, i64 %18
store i8* %19, i8** %3
br label %9
20: ; preds = %9
br label %21
21: ; preds = %20, %1
%22 = load i8*, i8** %3
%23 = load i8*, i8** %2
%24 = ptrtoint i8* %22 to i64
%25 = ptrtoint i8* %23 to i64
%26 = sub i64 %24, %25
%27 = trunc i64 %26 to i32
ret i32 %27
}

LLVM IR (-O2):
define i32 @dns_domain_length(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %17, label %3
3: ; preds = %1
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, 0
br i1 %6, label %17, label %7
7: ; preds = %3, %7
%8 = phi i8 [ %13, %7 ], [ %5, %3 ]
%9 = phi i8* [ %12, %7 ], [ %0, %3 ]
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = zext i8 %8 to i64
%12 = getelementptr inbounds i8, i8* %10, i64 %11
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %7
15: ; preds = %7
%16 = getelementptr inbounds i8, i8* %12, i64 1
br label %17
17: ; preds = %15, %3, %1
%18 = phi i8* [ null, %1 ], [ %4, %3 ], [ %16, %15 ]
%19 = ptrtoint i8* %18 to i64
%20 = ptrtoint i8* %0 to i64
%21 = sub i64 %19, %20
%22 = trunc i64 %21 to i32
ret i32 %22
}
/* Variables and functions */
int /*<<< orphan*/ dc_lcd_buttons();
int /*<<< orphan*/ lcd_voltage();
void dc_lcd() {
  lcd_voltage();
  dc_lcd_buttons();
}


x86 assembly (clang, -O0):
<dc_lcd>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <lcd_voltage@plt>
mov    $0x0,%al
call   1030 <dc_lcd_buttons@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dc_lcd>:
push   %rax
xor    %eax,%eax
call   1040 <lcd_voltage@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <dc_lcd_buttons@plt>

LLVM IR (-O0):
define void @dc_lcd() {
%1 = call i32 (...) @lcd_voltage()
%2 = call i32 (...) @dc_lcd_buttons()
ret void
}

LLVM IR (-O2):
define void @dc_lcd() {
%1 = tail call i32 (...) @lcd_voltage()
%2 = tail call i32 (...) @dc_lcd_buttons()
ret void
}
void test84_MPT1_targetInit__I() {}


x86 assembly (clang, -O0):
<test84_MPT1_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test84_MPT1_targetInit__I>:
ret

LLVM IR (-O0):
define void @test84_MPT1_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test84_MPT1_targetInit__I() {
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int strlen(char *);
int /*<<< orphan*/ write(int, ...);
int puts(char *s) {
  int32_t len;
  unsigned char lf = '\n';
  len = strlen(s);
  if (len) {
    write(1, s, len);
  }
  write(1, &lf, 1);
  return 1;
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movb   $0xa,-0xd(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1159 <puts+0x39>
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    $0x1,%edi
mov    $0x0,%al
call   1030 <write@plt>
mov    $0x1,%edx
lea    -0xd(%rbp),%rsi
mov    %edx,%edi
mov    $0x0,%al
call   1030 <write@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movb   $0xa,0xf(%rsp)
call   1040 <strlen@plt>
test   %eax,%eax
je     1147 <puts+0x27>
mov    $0x1,%edi
mov    %rbx,%rsi
mov    %eax,%edx
xor    %eax,%eax
call   1030 <write@plt>
lea    0xf(%rsp),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
xor    %eax,%eax
call   1030 <write@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @puts(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8
store i8* %0, i8** %2
store i8 10, i8* %4
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i8*, i8** %2
%11 = load i32, i32* %3
%12 = call i32 (i32, ...) @write(i32 1, i8* %10, i32 %11)
br label %13
13: ; preds = %9, %1
%14 = call i32 (i32, ...) @write(i32 1, i8* %4, i32 1)
ret i32 1
}

LLVM IR (-O2):
define i32 @puts(i8* %0) {
%2 = alloca i8
store i8 10, i8* %2
%3 = tail call i32 @strlen(i8* %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (i32, ...) @write(i32 1, i8* %0, i32 %3)
br label %7
7: ; preds = %5, %1
%8 = call i32 (i32, ...) @write(i32 1, i8* %2, i32 1)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ pchar(int);
void vt_delete(int num) {
  int i;
  for (i = 0; i < num; i++) {
    pchar(0x08);
    pchar(' ');
    pchar(0x08);
  }
}


x86 assembly (clang, -O0):
<vt_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    115a <vt_delete+0x4a>
mov    $0x8,%edi
call   1030 <pchar@plt>
mov    $0x20,%edi
call   1030 <pchar@plt>
mov    $0x8,%edi
call   1030 <pchar@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <vt_delete+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vt_delete>:
push   %rbx
test   %edi,%edi
jle    1143 <vt_delete+0x33>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x8,%edi
call   1030 <pchar@plt>
mov    $0x20,%edi
call   1030 <pchar@plt>
mov    $0x8,%edi
call   1030 <pchar@plt>
add    $0xffffffff,%ebx
jne    1120 <vt_delete+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @vt_delete(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %15
8: ; preds = %4
%9 = call i32 @pchar(i32 8)
%10 = call i32 @pchar(i32 32)
%11 = call i32 @pchar(i32 8)
br label %12
12: ; preds = %8
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @vt_delete(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %10
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = tail call i32 @pchar(i32 8)
%6 = tail call i32 @pchar(i32 32)
%7 = tail call i32 @pchar(i32 8)
%8 = add nuw nsw i32 %4, 1
%9 = icmp eq i32 %8, %0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
ret void
}
unsigned int divu10(unsigned int n) {
  unsigned long q, r;
  q = (n >> 1) + (n >> 2);
  q = q + (q >> 4);
  q = q + (q >> 8);
  q = q + (q >> 16);
  q = q >> 3;
  r = n - q * 10;
  return q + ((r + 6) >> 4);
}


x86 assembly (clang, -O0):
<divu10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    -0x4(%rbp),%ecx
shr    $0x2,%ecx
add    %ecx,%eax
mov    %eax,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
shr    $0x4,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
shr    $0x8,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x10(%rbp),%rcx
shr    $0x10,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x3,%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
imul   $0xa,-0x10(%rbp),%rcx
sub    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
add    $0x6,%rcx
shr    $0x4,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<divu10>:
mov    %edi,%ecx
shr    %ecx
mov    %edi,%eax
shr    $0x2,%edi
add    %edi,%ecx
mov    %rcx,%rdx
shr    $0x4,%rdx
add    %rcx,%rdx
mov    %rdx,%rcx
shr    $0x8,%rcx
add    %rdx,%rcx
mov    %rcx,%rdx
shr    $0x10,%rdx
add    %rcx,%rdx
shr    $0x3,%rdx
lea    (%rdx,%rdx,1),%rcx
lea    (%rcx,%rcx,4),%rcx
sub    %rcx,%rax
add    $0x6,%rax
shr    $0x4,%rax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @divu10(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = lshr i32 %5, 1
%7 = load i32, i32* %2
%8 = lshr i32 %7, 2
%9 = add i32 %6, %8
%10 = zext i32 %9 to i64
store i64 %10, i64* %3
%11 = load i64, i64* %3
%12 = load i64, i64* %3
%13 = lshr i64 %12, 4
%14 = add i64 %11, %13
store i64 %14, i64* %3
%15 = load i64, i64* %3
%16 = load i64, i64* %3
%17 = lshr i64 %16, 8
%18 = add i64 %15, %17
store i64 %18, i64* %3
%19 = load i64, i64* %3
%20 = load i64, i64* %3
%21 = lshr i64 %20, 16
%22 = add i64 %19, %21
store i64 %22, i64* %3
%23 = load i64, i64* %3
%24 = lshr i64 %23, 3
store i64 %24, i64* %3
%25 = load i32, i32* %2
%26 = zext i32 %25 to i64
%27 = load i64, i64* %3
%28 = mul i64 %27, 10
%29 = sub i64 %26, %28
store i64 %29, i64* %4
%30 = load i64, i64* %3
%31 = load i64, i64* %4
%32 = add i64 %31, 6
%33 = lshr i64 %32, 4
%34 = add i64 %30, %33
%35 = trunc i64 %34 to i32
ret i32 %35
}

LLVM IR (-O2):
define i32 @divu10(i32 %0) {
%2 = lshr i32 %0, 1
%3 = lshr i32 %0, 2
%4 = add nuw i32 %2, %3
%5 = zext i32 %4 to i64
%6 = lshr i64 %5, 4
%7 = add nuw nsw i64 %6, %5
%8 = lshr i64 %7, 8
%9 = add nuw nsw i64 %8, %7
%10 = lshr i64 %9, 16
%11 = add nuw nsw i64 %10, %9
%12 = lshr i64 %11, 3
%13 = zext i32 %0 to i64
%14 = mul nsw i64 %12, -10
%15 = add nuw nsw i64 %13, 6
%16 = add nsw i64 %15, %14
%17 = lshr i64 %16, 4
%18 = add nuw nsw i64 %17, %12
%19 = trunc i64 %18 to i32
ret i32 %19
}
/* Variables and functions */
unsigned int factorial(int);
void test_factorial_2() {
  unsigned x = factorial(3);
  if (x == factorial(3)) {
    int *p = 0;
    *p = 0xDEADBEEF;
  } else {
    int *p = 0;
    *p = 0xDEADBEEF;
  }
}


x86 assembly (clang, -O0):
<test_factorial_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x3,%edi
call   1030 <factorial@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    $0x3,%edi
call   1030 <factorial@plt>
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
cmp    %ecx,%eax
jne    1159 <test_factorial_2+0x49>
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0xdeadbeef,(%rax)
jmp    116b <test_factorial_2+0x5b>
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movl   $0xdeadbeef,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_factorial_2>:
push   %rax
mov    $0x3,%edi
call   1030 <factorial@plt>
mov    $0x3,%edi
call   1030 <factorial@plt>

LLVM IR (-O0):
define void @test_factorial_2() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = call i32 @factorial(i32 3)
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = call i32 @factorial(i32 3)
%7 = icmp eq i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %0
store i32* null, i32** %2
%9 = load i32*, i32** %2
store i32 -559038737, i32* %9
br label %12
10: ; preds = %0
store i32* null, i32** %3
%11 = load i32*, i32** %3
store i32 -559038737, i32* %11
br label %12
12: ; preds = %10, %8
ret void
}

LLVM IR (-O2):
define void @test_factorial_2() {
%1 = tail call i32 @factorial(i32 3)
%2 = tail call i32 @factorial(i32 3)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ mikado(int);
int /*<<< orphan*/ printf(char *, int, int *);
int main(void) {
  int pooh = 2, bah = 5;
  printf("In main(), pooh = %d and &pooh = %p\n", pooh, &pooh);
  printf("In main(), bah = %d and &bah = %p\n", bah, &bah);
  mikado(pooh);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x5,-0xc(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeb9(%rip),%rdi
lea    -0x8(%rbp),%rdx
call   1030 <printf@plt>
mov    -0xc(%rbp),%esi
lea    0xecb(%rip),%rdi
lea    -0xc(%rbp),%rdx
call   1030 <printf@plt>
mov    -0x8(%rbp),%edi
call   1040 <mikado@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x2,(%rsp)
movl   $0x5,0x4(%rsp)
lea    0xec9(%rip),%rdi
mov    %rsp,%rdx
mov    $0x2,%esi
call   1030 <printf@plt>
lea    0xeda(%rip),%rdi
lea    0x4(%rsp),%rdx
mov    $0x5,%esi
call   1030 <printf@plt>
mov    (%rsp),%edi
call   1040 <mikado@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"In main(), pooh = %d and &pooh = %p\0A\00"
@.str.1 = [35 x i8] c"In main(), bah = %d and &bah = %p\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 2, i32* %2
store i32 5, i32* %3
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %4, i32* %2)
%6 = load i32, i32* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i32 %6, i32* %3)
%8 = load i32, i32* %2
%9 = call i32 @mikado(i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [37 x i8] c"In main(), pooh = %d and &pooh = %p\0A\00"
@.str.1 = [35 x i8] c"In main(), bah = %d and &bah = %p\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 2, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 5, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 2, i32* %1)
%6 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i32 5, i32* %2)
%7 = load i32, i32* %1
%8 = call i32 @mikado(i32 %7)
ret i32 0
}
unsigned char inrange(int x, int y, int z) {
  if (x >= 0 && x < 4 && y >= 0 && y < 4 && z >= 0 && z < 4) {
    return 0x01;
  } else {
    return 0x00;
  }
}


x86 assembly (clang, -O0):
<inrange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1152 <inrange+0x52>
cmpl   $0x4,-0x8(%rbp)
jge    1152 <inrange+0x52>
cmpl   $0x0,-0xc(%rbp)
jl     1152 <inrange+0x52>
cmpl   $0x4,-0xc(%rbp)
jge    1152 <inrange+0x52>
cmpl   $0x0,-0x10(%rbp)
jl     1152 <inrange+0x52>
cmpl   $0x4,-0x10(%rbp)
jge    1152 <inrange+0x52>
movb   $0x1,-0x1(%rbp)
jmp    1156 <inrange+0x56>
movb   $0x0,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inrange>:
or     %esi,%edi
or     %edx,%edi
cmp    $0x4,%edi
setb   %al
ret

LLVM IR (-O0):
define zeroext i8 @inrange(i32 %0, i32 %1, i32 %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = icmp sge i32 %8, 0
br i1 %9, label %10, label %26
10: ; preds = %3
%11 = load i32, i32* %5
%12 = icmp slt i32 %11, 4
br i1 %12, label %13, label %26
13: ; preds = %10
%14 = load i32, i32* %6
%15 = icmp sge i32 %14, 0
br i1 %15, label %16, label %26
16: ; preds = %13
%17 = load i32, i32* %6
%18 = icmp slt i32 %17, 4
br i1 %18, label %19, label %26
19: ; preds = %16
%20 = load i32, i32* %7
%21 = icmp sge i32 %20, 0
br i1 %21, label %22, label %26
22: ; preds = %19
%23 = load i32, i32* %7
%24 = icmp slt i32 %23, 4
br i1 %24, label %25, label %26
25: ; preds = %22
store i8 1, i8* %4
br label %27
26: ; preds = %22, %19, %16, %13, %10, %3
store i8 0, i8* %4
br label %27
27: ; preds = %26, %25
%28 = load i8, i8* %4
ret i8 %28
}

LLVM IR (-O2):
define zeroext i8 @inrange(i32 %0, i32 %1, i32 %2) {
%4 = or i32 %1, %0
%5 = or i32 %4, %2
%6 = icmp ult i32 %5, 4
%7 = zext i1 %6 to i8
ret i8 %7
}
char *strchr(const char *s, int c) {
  const char *p;
  for (p = s; *p != (char)c; p++)
    if (*p == '\0')
      return ((void *)0);
  return (char *)p;
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
mov    -0x14(%rbp),%ecx
movsbl %cl,%ecx
cmp    %ecx,%eax
je     115b <strchr+0x5b>
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1145 <strchr+0x45>
movq   $0x0,-0x8(%rbp)
jmp    1163 <strchr+0x63>
jmp    114a <strchr+0x4a>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1113 <strchr+0x13>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
mov    %rdi,%rax
movsbl %sil,%ecx
movsbl (%rdi),%edx
cmp    %edx,%ecx
je     1120 <strchr+0x20>
xchg   %ax,%ax
test   %dl,%dl
je     1121 <strchr+0x21>
movsbl 0x1(%rax),%edx
add    $0x1,%rax
cmp    %edx,%ecx
jne    1110 <strchr+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
store i8* %7, i8** %6
br label %8
8: ; preds = %23, %2
%9 = load i8*, i8** %6
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = load i32, i32* %5
%13 = trunc i32 %12 to i8
%14 = sext i8 %13 to i32
%15 = icmp ne i32 %11, %14
br i1 %15, label %16, label %26
16: ; preds = %8
%17 = load i8*, i8** %6
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %16
store i8* null, i8** %3
br label %28
22: ; preds = %16
br label %23
23: ; preds = %22
%24 = load i8*, i8** %6
%25 = getelementptr inbounds i8, i8* %24, i32 1
store i8* %25, i8** %6
br label %8
26: ; preds = %8
%27 = load i8*, i8** %6
store i8* %27, i8** %3
br label %28
28: ; preds = %26, %21
%29 = load i8*, i8** %3
ret i8* %29
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i32 %1) {
%3 = shl i32 %1, 24
%4 = ashr exact i32 %3, 24
%5 = load i8, i8* %0
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %4, %6
br i1 %7, label %17, label %8
8: ; preds = %2, %12
%9 = phi i8 [ %14, %12 ], [ %5, %2 ]
%10 = phi i8* [ %13, %12 ], [ %0, %2 ]
%11 = icmp eq i8 %9, 0
br i1 %11, label %17, label %12
12: ; preds = %8
%13 = getelementptr inbounds i8, i8* %10, i64 1
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %4, %15
br i1 %16, label %17, label %8
17: ; preds = %8, %12, %2
%18 = phi i8* [ %0, %2 ], [ %13, %12 ], [ null, %8 ]
ret i8* %18
}
void WatchdogResetEnable(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) |= 0x00000002;
}


x86 assembly (clang, -O0):
<WatchdogResetEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
or     $0x2,%rcx
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogResetEnable>:
orq    $0x2,0x8(%rdi)
ret

LLVM IR (-O0):
define void @WatchdogResetEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 8
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 2
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @WatchdogResetEnable(i64 %0) {
%2 = add i64 %0, 8
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = or i64 %4, 2
store volatile i64 %5, i64* %3
ret void
}
/* Type definitions */
struct cpufreq_affected_cpus {
  int dummy;
};

/* Variables and functions */
struct cpufreq_affected_cpus *proc_get_related_cpus(unsigned int cpu) {
  return NULL;
}


x86 assembly (clang, -O0):
<proc_get_related_cpus>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<proc_get_related_cpus>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.cpufreq_affected_cpus = type { i32 }
define %struct.cpufreq_affected_cpus* @proc_get_related_cpus(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret %struct.cpufreq_affected_cpus* null
}

LLVM IR (-O2):
%struct.cpufreq_affected_cpus = type { i32 }
define noalias %struct.cpufreq_affected_cpus* @proc_get_related_cpus(i32 %0) {
ret %struct.cpufreq_affected_cpus* null
}
void evtchn_bind_interdomain() {}


x86 assembly (clang, -O0):
<evtchn_bind_interdomain>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evtchn_bind_interdomain>:
ret

LLVM IR (-O0):
define void @evtchn_bind_interdomain() {
ret void
}

LLVM IR (-O2):
define void @evtchn_bind_interdomain() {
ret void
}
int d() { return 20; }


x86 assembly (clang, -O0):
<d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d>:
mov    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @d() {
ret i32 20
}

LLVM IR (-O2):
define i32 @d() {
ret i32 20
}
int direct_check_left(struct virtual_item *vi, int free, int start_skip,
                      int end_skip) {
  int bytes;
  bytes = free - free % 8;
  return bytes ?: -1;
}


x86 assembly (clang, -O0):
<direct_check_left>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x20(%rbp),%eax
sub    %edx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
cmp    $0x0,%eax
je     1144 <direct_check_left+0x44>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x24(%rbp)
jmp    1151 <direct_check_left+0x51>
mov    $0xffffffff,%eax
mov    %eax,-0x24(%rbp)
jmp    1151 <direct_check_left+0x51>
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<direct_check_left>:
lea    0x7(%rsi),%ecx
test   %esi,%esi
cmovns %esi,%ecx
and    $0xfffffff8,%ecx
cmp    $0x1,%ecx
sbb    %eax,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
%struct.virtual_item = type opaque
define i32 @direct_check_left(%struct.virtual_item* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca %struct.virtual_item*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store %struct.virtual_item* %0, %struct.virtual_item** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %6
%11 = load i32, i32* %6
%12 = srem i32 %11, 8
%13 = sub nsw i32 %10, %12
store i32 %13, i32* %9
%14 = load i32, i32* %9
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %4
br label %18
17: ; preds = %4
br label %18
18: ; preds = %17, %16
%19 = phi i32 [ %14, %16 ], [ -1, %17 ]
ret i32 %19
}

LLVM IR (-O2):
%struct.virtual_item = type opaque
define i32 @direct_check_left(%struct.virtual_item* nocapture readnone %0, i32 %1, i32 %2, i32 %3) {
%5 = srem i32 %1, 8
%6 = sub nsw i32 %1, %5
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, i32 -1, i32 %6
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ TCIOFLUSH;
int tcflush(int, int /*<<< orphan*/);
int /*<<< orphan*/ usleep(int);
int serialFlush(int fd) {
  int ret;
  usleep(10000);
  ret = tcflush(fd, TCIOFLUSH);
  usleep(1000000);
  return ret;
}


x86 assembly (clang, -O0):
<serialFlush>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x2710,%edi
call   1040 <usleep@plt>
mov    -0x4(%rbp),%edi
mov    0x2ea1(%rip),%rax
mov    (%rax),%esi
call   1030 <tcflush@plt>
mov    %eax,-0x8(%rbp)
mov    $0xf4240,%edi
call   1040 <usleep@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialFlush>:
push   %rbx
mov    %edi,%ebx
mov    $0x2710,%edi
call   1040 <usleep@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%esi
mov    %ebx,%edi
call   1030 <tcflush@plt>
mov    %eax,%ebx
mov    $0xf4240,%edi
call   1040 <usleep@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@TCIOFLUSH = global i32 0
define i32 @serialFlush(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 @usleep(i32 10000)
%5 = load i32, i32* %2
%6 = load i32, i32* @TCIOFLUSH
%7 = call i32 @tcflush(i32 %5, i32 %6)
store i32 %7, i32* %3
%8 = call i32 @usleep(i32 1000000)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
@TCIOFLUSH = global i32 0
define i32 @serialFlush(i32 %0) {
%2 = tail call i32 @usleep(i32 10000)
%3 = load i32, i32* @TCIOFLUSH
%4 = tail call i32 @tcflush(i32 %0, i32 %3)
%5 = tail call i32 @usleep(i32 1000000)
ret i32 %4
}
void _delay_ms(double __ms) {
  double __tmp = ((24000000) / 172e3) * __ms;
  while (__tmp > 0)
    __tmp--;
}


x86 assembly (clang, -O0):
<_delay_ms>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1144 <_delay_ms+0x44>
movsd  0xed3(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    111b <_delay_ms+0x1b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_delay_ms>:
ret

LLVM IR (-O0):
define void @_delay_ms(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double 0x4061711DC47711DC, %4
store double %5, double* %3
br label %6
6: ; preds = %9, %1
%7 = load double, double* %3
%8 = fcmp ogt double %7, 0.000000e+00
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load double, double* %3
%11 = fadd double %10, -1.000000e+00
store double %11, double* %3
br label %6
12: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @_delay_ms(double %0) {
ret void
}
/* Type definitions */
struct sign_expr {
  int dummy;
};
struct object {
  int dummy;
};
struct expr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ not_expr_class_get();
struct object *object_new(int /*<<< orphan*/);
int /*<<< orphan*/ sign_expr_init(struct sign_expr *, struct expr *);
struct expr *not_expr_new(struct expr *value) {
  struct object *expr = object_new(not_expr_class_get());
  sign_expr_init(((struct sign_expr *)(expr)), value);
  return ((struct expr *)(expr));
}


x86 assembly (clang, -O0):
<not_expr_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <not_expr_class_get@plt>
mov    %eax,%edi
call   1040 <object_new@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1050 <sign_expr_init@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<not_expr_new>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1030 <not_expr_class_get@plt>
mov    %eax,%edi
call   1040 <object_new@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1050 <sign_expr_init@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.expr = type { i32 }
%struct.object = type { i32 }
%struct.sign_expr = type { i32 }
define %struct.expr* @not_expr_new(%struct.expr* %0) {
%2 = alloca %struct.expr*
%3 = alloca %struct.object*
store %struct.expr* %0, %struct.expr** %2
%4 = call i32 (...) @not_expr_class_get()
%5 = call %struct.object* @object_new(i32 %4)
store %struct.object* %5, %struct.object** %3
%6 = load %struct.object*, %struct.object** %3
%7 = bitcast %struct.object* %6 to %struct.sign_expr*
%8 = load %struct.expr*, %struct.expr** %2
%9 = call i32 @sign_expr_init(%struct.sign_expr* %7, %struct.expr* %8)
%10 = load %struct.object*, %struct.object** %3
%11 = bitcast %struct.object* %10 to %struct.expr*
ret %struct.expr* %11
}

LLVM IR (-O2):
%struct.expr = type { i32 }
%struct.object = type { i32 }
%struct.sign_expr = type { i32 }
define %struct.expr* @not_expr_new(%struct.expr* %0) {
%2 = tail call i32 (...) @not_expr_class_get()
%3 = tail call %struct.object* @object_new(i32 %2)
%4 = bitcast %struct.object* %3 to %struct.sign_expr*
%5 = tail call i32 @sign_expr_init(%struct.sign_expr* %4, %struct.expr* %0)
%6 = bitcast %struct.object* %3 to %struct.expr*
ret %struct.expr* %6
}