#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;
typedef scalar_t__ ui32Base;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int _PWMGenValid(int);
void PWMGenFaultTriggerSet(uint32_t ui32Base, uint32_t ui32Gen,
                           uint32_t ui32Group, uint32_t ui32FaultTriggers) {
  ASSERT((ui32Base == 0x40028000) || (ui32Base == 0x40029000));
  ASSERT(_PWMGenValid(ui32Gen));
  ASSERT((ui32Group == 0) || (ui32Group == 1));
  ASSERT((ui32Group == 0) &&
         ((ui32FaultTriggers &
           ~(0x00000001 | 0x00000002 | 0x00000004 | 0x00000008)) == 0));
  ASSERT((ui32Group == 1) &&
         ((ui32FaultTriggers &
           ~(0x00000001 | 0x00000002 | 0x00000004 | 0x00000008 | 0x00000010 |
             0x00000020 | 0x00000040 | 0x00000080)) == 0));
  if (ui32Group == 0) {
    (*((volatile uint32_t *)(((ui32Base) + (ui32Gen)) + 0x00000034))) =
        ui32FaultTriggers;
  } else {
    (*((volatile uint32_t *)(((ui32Base) + (ui32Gen)) + 0x00000038))) =
        ui32FaultTriggers;
  }
}


x86 assembly (clang, -O0):
<PWMGenFaultTriggerSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    $0x1,%al
cmpl   $0x40028000,-0x4(%rbp)
mov    %al,-0x11(%rbp)
je     1153 <PWMGenFaultTriggerSet+0x33>
cmpl   $0x40029000,-0x4(%rbp)
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
mov    -0x8(%rbp),%edi
call   1030 <_PWMGenValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    $0x1,%al
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0x12(%rbp)
je     1188 <PWMGenFaultTriggerSet+0x68>
cmpl   $0x1,-0xc(%rbp)
sete   %al
mov    %al,-0x12(%rbp)
mov    -0x12(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0x13(%rbp)
jne    11b3 <PWMGenFaultTriggerSet+0x93>
mov    -0x10(%rbp),%eax
and    $0xfffffff0,%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0x13(%rbp)
mov    -0x13(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
xor    %eax,%eax
cmpl   $0x1,-0xc(%rbp)
mov    %al,-0x14(%rbp)
jne    11e0 <PWMGenFaultTriggerSet+0xc0>
mov    -0x10(%rbp),%eax
and    $0xffffff00,%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0x14(%rbp)
mov    -0x14(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
cmpl   $0x0,-0xc(%rbp)
jne    120c <PWMGenFaultTriggerSet+0xec>
mov    -0x10(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x34,%eax
cltq
mov    %ecx,(%rax)
jmp    121c <PWMGenFaultTriggerSet+0xfc>
mov    -0x10(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    $0x38,%eax
cltq
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenFaultTriggerSet>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %ecx,%r15d
mov    %edx,%r12d
mov    %esi,%ebp
mov    %edi,%r14d
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40028000,%eax
sete   %dil
call   1040 <ASSERT@plt>
mov    %ebp,%edi
call   1030 <_PWMGenValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
xor    %ebx,%ebx
test   %r12d,%r12d
setne  %bl
sete   %r13b
xor    %edi,%edi
cmp    $0x1,%r12d
sete   %r12b
setbe  %dil
call   1040 <ASSERT@plt>
cmp    $0x10,%r15d
setb   %al
and    %r13b,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
cmp    $0x100,%r15d
setb   %al
and    %r12b,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
add    %r14d,%ebp
lea    0x34(,%rbx,4),%eax
movslq %ebp,%rcx
mov    %r15d,(%rcx,%rax,1)
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @PWMGenFaultTriggerSet(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 1073905664
br i1 %10, label %14, label %11
11: ; preds = %4
%12 = load i32, i32* %5
%13 = icmp eq i32 %12, 1073909760
br label %14
14: ; preds = %11, %4
%15 = phi i1 [ true, %4 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
%17 = call i32 @ASSERT(i32 %16)
%18 = load i32, i32* %6
%19 = call i32 @_PWMGenValid(i32 %18)
%20 = call i32 @ASSERT(i32 %19)
%21 = load i32, i32* %7
%22 = icmp eq i32 %21, 0
br i1 %22, label %26, label %23
23: ; preds = %14
%24 = load i32, i32* %7
%25 = icmp eq i32 %24, 1
br label %26
26: ; preds = %23, %14
%27 = phi i1 [ true, %14 ], [ %25, %23 ]
%28 = zext i1 %27 to i32
%29 = call i32 @ASSERT(i32 %28)
%30 = load i32, i32* %7
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %36
32: ; preds = %26
%33 = load i32, i32* %8
%34 = and i32 %33, -16
%35 = icmp eq i32 %34, 0
br label %36
36: ; preds = %32, %26
%37 = phi i1 [ false, %26 ], [ %35, %32 ]
%38 = zext i1 %37 to i32
%39 = call i32 @ASSERT(i32 %38)
%40 = load i32, i32* %7
%41 = icmp eq i32 %40, 1
br i1 %41, label %42, label %46
42: ; preds = %36
%43 = load i32, i32* %8
%44 = and i32 %43, -256
%45 = icmp eq i32 %44, 0
br label %46
46: ; preds = %42, %36
%47 = phi i1 [ false, %36 ], [ %45, %42 ]
%48 = zext i1 %47 to i32
%49 = call i32 @ASSERT(i32 %48)
%50 = load i32, i32* %7
%51 = icmp eq i32 %50, 0
br i1 %51, label %52, label %60
52: ; preds = %46
%53 = load i32, i32* %8
%54 = load i32, i32* %5
%55 = load i32, i32* %6
%56 = add nsw i32 %54, %55
%57 = add nsw i32 %56, 52
%58 = sext i32 %57 to i64
%59 = inttoptr i64 %58 to i32*
store volatile i32 %53, i32* %59
br label %68
60: ; preds = %46
%61 = load i32, i32* %8
%62 = load i32, i32* %5
%63 = load i32, i32* %6
%64 = add nsw i32 %62, %63
%65 = add nsw i32 %64, 56
%66 = sext i32 %65 to i64
%67 = inttoptr i64 %66 to i32*
store volatile i32 %61, i32* %67
br label %68
68: ; preds = %60, %52
ret void
}

LLVM IR (-O2):
define void @PWMGenFaultTriggerSet(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = and i32 %0, -4097
%6 = icmp eq i32 %5, 1073905664
%7 = zext i1 %6 to i32
%8 = tail call i32 @ASSERT(i32 %7)
%9 = tail call i32 @_PWMGenValid(i32 %1)
%10 = tail call i32 @ASSERT(i32 %9)
%11 = icmp eq i32 %2, 0
%12 = icmp eq i32 %2, 1
%13 = icmp ult i32 %2, 2
%14 = zext i1 %13 to i32
%15 = tail call i32 @ASSERT(i32 %14)
%16 = icmp ult i32 %3, 16
%17 = and i1 %11, %16
%18 = zext i1 %17 to i32
%19 = tail call i32 @ASSERT(i32 %18)
%20 = icmp ult i32 %3, 256
%21 = and i1 %12, %20
%22 = zext i1 %21 to i32
%23 = tail call i32 @ASSERT(i32 %22)
%24 = add nsw i32 %1, %0
%25 = select i1 %11, i32 52, i32 56
%26 = add nsw i32 %24, %25
%27 = sext i32 %26 to i64
%28 = inttoptr i64 %27 to i32*
store volatile i32 %3, i32* %28
ret void
}