int base_hash(unsigned char a, int b) {
  int base_status = 0;
  switch (a) {
  case 'A':
  case 'M':
  case 'R':
    base_status = 1;
  case 'W':
    a = 0;
    break;
  case 'C':
  case 'Y':
    base_status = 1;
  case 'S':
    a = 1;
    break;
  case 'G':
    a = 2;
    break;
  case 'T':
    base_status = 1;
  case 'K':
    a = 3;
    break;
  case 'N':
    base_status = 1;
    a = 0;
    break;
  default:
    base_status = 2;
    a = 0;
  }
  b = b << 2;
  b = b + a;
  return b;
}


x86 assembly (clang, -O0):
<base_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movzbl -0x1(%rbp),%eax
add    $0xffffffbf,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0x18,%eax
ja     1187 <base_hash+0x87>
mov    -0x18(%rbp),%rax
lea    0xecb(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0xc(%rbp)
movb   $0x0,-0x1(%rbp)
jmp    1192 <base_hash+0x92>
movl   $0x1,-0xc(%rbp)
movb   $0x1,-0x1(%rbp)
jmp    1192 <base_hash+0x92>
movb   $0x2,-0x1(%rbp)
jmp    1192 <base_hash+0x92>
movl   $0x1,-0xc(%rbp)
movb   $0x3,-0x1(%rbp)
jmp    1192 <base_hash+0x92>
movl   $0x1,-0xc(%rbp)
movb   $0x0,-0x1(%rbp)
jmp    1192 <base_hash+0x92>
movl   $0x2,-0xc(%rbp)
movb   $0x0,-0x1(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x2,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movzbl -0x1(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<base_hash>:
xor    %eax,%eax
add    $0xbd,%dil
cmp    $0x16,%dil
ja     112b <base_hash+0x2b>
movzbl %dil,%ecx
mov    $0x410001,%edx
bt     %rcx,%rdx
jb     112f <base_hash+0x2f>
mov    $0x20100,%edx
bt     %rcx,%rdx
jae    1138 <base_hash+0x38>
mov    $0x3,%eax
lea    (%rax,%rsi,4),%eax
ret
mov    $0x1,%eax
lea    (%rax,%rsi,4),%eax
ret
cmp    $0x4,%rcx
jne    112b <base_hash+0x2b>
mov    $0x2,%eax
lea    (%rax,%rsi,4),%eax
ret

LLVM IR (-O0):
define i32 @base_hash(i8 zeroext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i8, i8* %3
%7 = zext i8 %6 to i32
switch i32 %7, label %16 [
i32 65, label %8
i32 77, label %8
i32 82, label %8
i32 87, label %9
i32 67, label %10
i32 89, label %10
i32 83, label %11
i32 71, label %12
i32 84, label %13
i32 75, label %14
i32 78, label %15
]
8: ; preds = %2, %2, %2
store i32 1, i32* %5
br label %9
9: ; preds = %2, %8
store i8 0, i8* %3
br label %17
10: ; preds = %2, %2
store i32 1, i32* %5
br label %11
11: ; preds = %2, %10
store i8 1, i8* %3
br label %17
12: ; preds = %2
store i8 2, i8* %3
br label %17
13: ; preds = %2
store i32 1, i32* %5
br label %14
14: ; preds = %2, %13
store i8 3, i8* %3
br label %17
15: ; preds = %2
store i32 1, i32* %5
store i8 0, i8* %3
br label %17
16: ; preds = %2
store i32 2, i32* %5
store i8 0, i8* %3
br label %17
17: ; preds = %16, %15, %14, %12, %11, %9
%18 = load i32, i32* %4
%19 = shl i32 %18, 2
store i32 %19, i32* %4
%20 = load i32, i32* %4
%21 = load i8, i8* %3
%22 = zext i8 %21 to i32
%23 = add nsw i32 %20, %22
store i32 %23, i32* %4
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @base_hash(i8 zeroext %0, i32 %1) {
switch i8 %0, label %6 [
i8 75, label %5
i8 84, label %5
i8 71, label %4
i8 83, label %3
i8 67, label %3
i8 89, label %3
]
3: ; preds = %2, %2, %2
br label %6
4: ; preds = %2
br label %6
5: ; preds = %2, %2
br label %6
6: ; preds = %2, %5, %4, %3
%7 = phi i32 [ 3, %5 ], [ 2, %4 ], [ 1, %3 ], [ 0, %2 ]
%8 = shl i32 %1, 2
%9 = or i32 %7, %8
ret i32 %9
}