xunge/DecIR huggingface dataset:
int gms_graphics_compare_luminance(const void *void_first,
                                   const void *void_second) {
  long first = *(long *)void_first;
  long second = *(long *)void_second;
  return first > second ? 1 : second > first ? -1 : 0;
}


x86 assembly (clang, -O0):
<gms_graphics_compare_luminance>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
jle    113d <gms_graphics_compare_luminance+0x3d>
mov    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1155 <gms_graphics_compare_luminance+0x55>
mov    -0x20(%rbp),%rdx
mov    -0x18(%rbp),%rsi
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    %rsi,%rdx
cmovg  %ecx,%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gms_graphics_compare_luminance>:
mov    (%rdi),%rax
mov    (%rsi),%rcx
xor    %edx,%edx
cmp    %rax,%rcx
setg   %dl
neg    %edx
cmp    %rcx,%rax
mov    $0x1,%eax
cmovle %edx,%eax
ret

LLVM IR (-O0):
define i32 @gms_graphics_compare_luminance(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i64*
%9 = load i64, i64* %8
store i64 %9, i64* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i64*
%12 = load i64, i64* %11
store i64 %12, i64* %6
%13 = load i64, i64* %5
%14 = load i64, i64* %6
%15 = icmp sgt i64 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %23
17: ; preds = %2
%18 = load i64, i64* %6
%19 = load i64, i64* %5
%20 = icmp sgt i64 %18, %19
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 -1, i32 0
br label %23
23: ; preds = %17, %16
%24 = phi i32 [ 1, %16 ], [ %22, %17 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @gms_graphics_compare_luminance(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp sgt i64 %4, %6
%8 = icmp sgt i64 %6, %4
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
void RFCHwIntEnable(uint32_t ui32Mask) {
  (*((volatile unsigned long *)(0x40041000 + 0x0000000C))) |= ui32Mask;
}


x86 assembly (clang, -O0):
<RFCHwIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x4004100c,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x4004100c,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RFCHwIntEnable>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
or     %rax,0x4004100c
40
ret

LLVM IR (-O0):
define void @RFCHwIntEnable(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1074008076 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1074008076 to i64*)
ret void
}

LLVM IR (-O2):
define void @RFCHwIntEnable(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1074008076 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1074008076 to i64*)
ret void
}
unsigned int get2le(unsigned char **upp) {
  unsigned int val;
  val = *(*upp)++;
  val |= (*(*upp)++) << 8;
  return (val);
}


x86 assembly (clang, -O0):
<get2le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    (%rcx),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,(%rcx)
movzbl (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rcx
mov    (%rcx),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,(%rcx)
movzbl (%rax),%eax
shl    $0x8,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get2le>:
mov    (%rdi),%rax
lea    0x1(%rax),%rcx
mov    %rcx,(%rdi)
movzbl (%rax),%ecx
lea    0x2(%rax),%rdx
mov    %rdx,(%rdi)
movzbl 0x1(%rax),%eax
shl    $0x8,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @get2le(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %4
%7 = load i8, i8* %5
%8 = zext i8 %7 to i32
store i32 %8, i32* %3
%9 = load i8**, i8*** %2
%10 = load i8*, i8** %9
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %9
%12 = load i8, i8* %10
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = load i32, i32* %3
%16 = or i32 %15, %14
store i32 %16, i32* %3
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @get2le(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = getelementptr inbounds i8, i8* %2, i64 1
store i8* %3, i8** %0
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
%6 = getelementptr inbounds i8, i8* %2, i64 2
store i8* %6, i8** %0
%7 = load i8, i8* %3
%8 = zext i8 %7 to i32
%9 = shl nuw nsw i32 %8, 8
%10 = or i32 %9, %5
ret i32 %10
}
/* Variables and functions */
float cosf(float);
float sinf(float);
void sincosf(float x, float *p_sinf, float *p_cosf) {
  *p_sinf = sinf(x);
  *p_cosf = cosf(x);
}


x86 assembly (clang, -O0):
<sincosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sinf@plt>
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x4(%rbp),%xmm0
call   1040 <cosf@plt>
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sincosf>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
movss  %xmm0,0x4(%rsp)
call   1030 <sinf@plt>
movss  %xmm0,(%rbx)
movss  0x4(%rsp),%xmm0
call   1040 <cosf@plt>
movss  %xmm0,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @sincosf(float %0, float* %1, float* %2) {
%4 = alloca float
%5 = alloca float*
%6 = alloca float*
store float %0, float* %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float, float* %4
%8 = call float @sinf(float %7)
%9 = load float*, float** %5
store float %8, float* %9
%10 = load float, float* %4
%11 = call float @cosf(float %10)
%12 = load float*, float** %6
store float %11, float* %12
ret void
}

LLVM IR (-O2):
define void @sincosf(float %0, float* nocapture writeonly %1, float* nocapture writeonly %2) {
%4 = tail call float @sinf(float %0)
store float %4, float* %1
%5 = tail call float @cosf(float %0)
store float %5, float* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ usage();
void exec_help() { usage(); }


x86 assembly (clang, -O0):
<exec_help>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <usage@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<exec_help>:
xor    %eax,%eax
jmp    1030 <usage@plt>

LLVM IR (-O0):
define void @exec_help() {
%1 = call i32 (...) @usage()
ret void
}

LLVM IR (-O2):
define void @exec_help() {
%1 = tail call i32 (...) @usage()
ret void
}
int alpha_to_int(char l, char *alphabet) {
  int i;
  for (i = 0; alphabet[i] != '\0'; ++i) {
    if (l == alphabet[i]) {
      return i;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<alpha_to_int>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1160 <alpha_to_int+0x60>
movsbl -0x5(%rbp),%eax
mov    -0x10(%rbp),%rcx
movslq -0x14(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jne    114d <alpha_to_int+0x4d>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1167 <alpha_to_int+0x67>
jmp    1152 <alpha_to_int+0x52>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1115 <alpha_to_int+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alpha_to_int>:
mov    (%rsi),%dl
mov    $0xffffffff,%eax
test   %dl,%dl
je     1122 <alpha_to_int+0x22>
xor    %ecx,%ecx
nopl   (%rax)
cmp    %dil,%dl
je     1123 <alpha_to_int+0x23>
movzbl 0x1(%rsi,%rcx,1),%edx
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <alpha_to_int+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @alpha_to_int(i8 signext %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i32
store i8 %0, i8* %4
store i8* %1, i8** %5
store i32 0, i32* %6
br label %7
7: ; preds = %28, %2
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %31
15: ; preds = %7
%16 = load i8, i8* %4
%17 = sext i8 %16 to i32
%18 = load i8*, i8** %5
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %17, %23
br i1 %24, label %25, label %27
25: ; preds = %15
%26 = load i32, i32* %6
store i32 %26, i32* %3
br label %32
27: ; preds = %15
br label %28
28: ; preds = %27
%29 = load i32, i32* %6
%30 = add nsw i32 %29, 1
store i32 %30, i32* %6
br label %7
31: ; preds = %7
store i32 -1, i32* %3
br label %32
32: ; preds = %31, %25
%33 = load i32, i32* %3
ret i32 %33
}

LLVM IR (-O2):
define i32 @alpha_to_int(i8 signext %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %9
%6 = phi i64 [ %10, %9 ], [ 0, %2 ]
%7 = phi i8 [ %12, %9 ], [ %3, %2 ]
%8 = icmp eq i8 %7, %0
br i1 %8, label %14, label %9
9: ; preds = %5
%10 = add nuw i64 %6, 1
%11 = getelementptr inbounds i8, i8* %1, i64 %10
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %16, label %5
14: ; preds = %5
%15 = trunc i64 %6 to i32
br label %16
16: ; preds = %9, %14, %2
%17 = phi i32 [ -1, %2 ], [ %15, %14 ], [ -1, %9 ]
ret i32 %17
}
int DRV_SPI_SELFCHECK(void) { return 0; }


x86 assembly (clang, -O0):
<DRV_SPI_SELFCHECK>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DRV_SPI_SELFCHECK>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @DRV_SPI_SELFCHECK() {
ret i32 0
}

LLVM IR (-O2):
define i32 @DRV_SPI_SELFCHECK() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int my_main();
int main(void) {
  int rv;
  rv = my_main();
  assert(!rv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <my_main@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <my_main@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @my_main()
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @my_main()
%2 = icmp eq i32 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t hidpp_get_unaligned_be_u32(uint8_t *buf) {
  return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
}


x86 assembly (clang, -O0):
<hidpp_get_unaligned_be_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    0x4(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
or     0xc(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hidpp_get_unaligned_be_u32>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
shl    $0x18,%eax
shl    $0x10,%ecx
or     %eax,%ecx
mov    0x8(%rdi),%eax
shl    $0x8,%eax
or     %ecx,%eax
or     0xc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hidpp_get_unaligned_be_u32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 24
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = shl i32 %9, 16
%11 = or i32 %6, %10
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i64 2
%14 = load i32, i32* %13
%15 = shl i32 %14, 8
%16 = or i32 %11, %15
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 3
%19 = load i32, i32* %18
%20 = or i32 %16, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @hidpp_get_unaligned_be_u32(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 24
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = shl i32 %5, 16
%7 = or i32 %6, %3
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = getelementptr inbounds i32, i32* %0, i64 3
%13 = load i32, i32* %12
%14 = or i32 %11, %13
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
void format_error(int lineno) {
  fprintf(stderr, "Input data not in expected format on line %d\n", lineno);
  exit(1);
}


x86 assembly (clang, -O0):
<format_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
lea    0xec2(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<format_error>:
push   %rax
mov    %edi,%edx
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
lea    0xecd(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [46 x i8] c"Input data not in expected format on line %d\0A\00"
define void @format_error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = load i32, i32* %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [46 x i8] c"Input data not in expected format on line %d\0A\00"
define void @format_error(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
unsigned int REG_SPI_BASE(unsigned int);
__attribute__((always_)) __attribute__((flatten)) unsigned int
SPI_WR_STATUS(unsigned int i) {
  return (REG_SPI_BASE(i) + 0x28);
}


x86 assembly (clang, -O0):
<SPI_WR_STATUS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <REG_SPI_BASE@plt>
add    $0x28,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_WR_STATUS>:
push   %rax
call   1030 <REG_SPI_BASE@plt>
add    $0x28,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @SPI_WR_STATUS(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @REG_SPI_BASE(i32 %3)
%5 = add i32 %4, 40
ret i32 %5
}

LLVM IR (-O2):
define i32 @SPI_WR_STATUS(i32 %0) {
%2 = tail call i32 @REG_SPI_BASE(i32 %0)
%3 = add i32 %2, 40
ret i32 %3
}
void xADCStepConfigure(unsigned long ulBase, unsigned long ulStep,
                       unsigned long ulConfig) {
  unsigned long ulSeqLen, ulTrigger;
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x0000002C))) &= ~0x00F00000;
  ulSeqLen = 0x00F00000 & ulConfig;
  (*((volatile unsigned long *)(ulBase + 0x0000002C))) |=
      ((ulSeqLen - 1) << 20);
  ulTrigger = ulConfig & 0x00400000;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) |= ulTrigger;
}


x86 assembly (clang, -O0):
<xADCStepConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2c(%rax),%rcx
and    $0xffffffffff0fffff,%rcx
mov    %rcx,0x2c(%rax)
mov    -0x18(%rbp),%rax
and    $0xf00000,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdx
sub    $0x1,%rdx
shl    $0x14,%rdx
mov    -0x8(%rbp),%rax
mov    0x2c(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x2c(%rax)
mov    -0x18(%rbp),%rax
and    $0x400000,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<xADCStepConfigure>:
andq   $0xffffffffff0fffff,0x2c(%rdi)
ff
mov    %edx,%eax
and    $0xf00000,%eax
shl    $0x14,%rax
add    $0xfffffffffff00000,%rax
or     %rax,0x2c(%rdi)
and    $0x400000,%edx
or     %rdx,0x8(%rdi)
ret

LLVM IR (-O0):
define void @xADCStepConfigure(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%9 = load i64, i64* %4
%10 = add i64 %9, 44
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = and i64 %12, -15728641
store volatile i64 %13, i64* %11
%14 = load i64, i64* %6
%15 = and i64 15728640, %14
store i64 %15, i64* %7
%16 = load i64, i64* %7
%17 = sub i64 %16, 1
%18 = shl i64 %17, 20
%19 = load i64, i64* %4
%20 = add i64 %19, 44
%21 = inttoptr i64 %20 to i64*
%22 = load volatile i64, i64* %21
%23 = or i64 %22, %18
store volatile i64 %23, i64* %21
%24 = load i64, i64* %6
%25 = and i64 %24, 4194304
store i64 %25, i64* %8
%26 = load i64, i64* %8
%27 = load i64, i64* %4
%28 = add i64 %27, 8
%29 = inttoptr i64 %28 to i64*
%30 = load volatile i64, i64* %29
%31 = or i64 %30, %26
store volatile i64 %31, i64* %29
ret void
}

LLVM IR (-O2):
define void @xADCStepConfigure(i64 %0, i64 %1, i64 %2) {
%4 = add i64 %0, 44
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -15728641
store volatile i64 %7, i64* %5
%8 = shl i64 %2, 20
%9 = and i64 %8, 16492674416640
%10 = add nsw i64 %9, -1048576
%11 = load volatile i64, i64* %5
%12 = or i64 %11, %10
store volatile i64 %12, i64* %5
%13 = and i64 %2, 4194304
%14 = add i64 %0, 8
%15 = inttoptr i64 %14 to i64*
%16 = load volatile i64, i64* %15
%17 = or i64 %16, %13
store volatile i64 %17, i64* %15
ret void
}
void GPIOPortF_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<GPIOPortF_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <GPIOPortF_Handler+0x9>
jmp    1109 <GPIOPortF_Handler+0x9>

x86 assembly (clang, -O2):
<GPIOPortF_Handler>:
jmp    1100 <GPIOPortF_Handler>

LLVM IR (-O0):
define void @GPIOPortF_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @GPIOPortF_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
int varr(int n, int a[n]) { return a[2]; }


x86 assembly (clang, -O0):
<varr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<varr>:
mov    0x8(%rsi),%eax
ret

LLVM IR (-O0):
define i32 @varr(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = zext i32 %5 to i64
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 2
%9 = load i32, i32* %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @varr(i32 %0, i32* nocapture %1) {
%3 = getelementptr inbounds i32, i32* %1, i64 2
%4 = load i32, i32* %3
ret i32 %4
}
int setbits(int x, int p, int n, int y) {
  long unsigned mask = ~0;
  mask = ~(mask << n);
  mask = ~(mask << p);
  x &= mask;
  mask = 0;
  mask = ~(~0 << n);
  y &= mask;
  y = y << p;
  x |= y;
  return x;
}


x86 assembly (clang, -O0):
<setbits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
movq   $0xffffffffffffffff,-0x18(%rbp)
ff
mov    -0x18(%rbp),%rax
mov    -0xc(%rbp),%ecx
shl    %cl,%rax
xor    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%ecx
shl    %cl,%rax
xor    $0xffffffffffffffff,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
movslq -0x4(%rbp),%rax
and    %rcx,%rax
mov    %eax,-0x4(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
movslq -0x10(%rbp),%rax
and    %rcx,%rax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setbits>:
mov    %ecx,%r8d
mov    %esi,%r9d
mov    $0xffffffffffffffff,%rsi
mov    %edx,%ecx
shl    %cl,%rsi
not    %rsi
mov    %r9d,%ecx
shl    %cl,%rsi
mov    $0xffffffff,%eax
mov    %edx,%ecx
shl    %cl,%eax
not    %esi
and    %edi,%esi
not    %eax
and    %r8d,%eax
mov    %r9d,%ecx
shl    %cl,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i64
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i64 -1, i64* %9
%10 = load i64, i64* %9
%11 = load i32, i32* %7
%12 = zext i32 %11 to i64
%13 = shl i64 %10, %12
%14 = xor i64 %13, -1
store i64 %14, i64* %9
%15 = load i64, i64* %9
%16 = load i32, i32* %6
%17 = zext i32 %16 to i64
%18 = shl i64 %15, %17
%19 = xor i64 %18, -1
store i64 %19, i64* %9
%20 = load i64, i64* %9
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = and i64 %22, %20
%24 = trunc i64 %23 to i32
store i32 %24, i32* %5
store i64 0, i64* %9
%25 = load i32, i32* %7
%26 = shl i32 -1, %25
%27 = xor i32 %26, -1
%28 = sext i32 %27 to i64
store i64 %28, i64* %9
%29 = load i64, i64* %9
%30 = load i32, i32* %8
%31 = sext i32 %30 to i64
%32 = and i64 %31, %29
%33 = trunc i64 %32 to i32
store i32 %33, i32* %8
%34 = load i32, i32* %8
%35 = load i32, i32* %6
%36 = shl i32 %34, %35
store i32 %36, i32* %8
%37 = load i32, i32* %8
%38 = load i32, i32* %5
%39 = or i32 %38, %37
store i32 %39, i32* %5
%40 = load i32, i32* %5
ret i32 %40
}

LLVM IR (-O2):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = zext i32 %2 to i64
%6 = shl nsw i64 -1, %5
%7 = xor i64 %6, -1
%8 = zext i32 %1 to i64
%9 = shl i64 %7, %8
%10 = trunc i64 %9 to i32
%11 = xor i32 %10, -1
%12 = and i32 %11, %0
%13 = shl nsw i32 -1, %2
%14 = xor i32 %13, -1
%15 = and i32 %14, %3
%16 = shl i32 %15, %1
%17 = or i32 %12, %16
ret i32 %17
}
unsigned short spi_update(unsigned short data) {
  while (((*((volatile unsigned int *)(((volatile void *)0x01C41000) + 0x40))) &
          0x20000000))
    ;
  (*((volatile unsigned int *)(((volatile void *)0x01C41000) + 0x38))) =
      (unsigned long)data;
  while (((*((volatile unsigned int *)(((volatile void *)0x01C41000) + 0x40))) &
          0x80000000))
    ;
  return ((unsigned short)((*((volatile unsigned int
                                   *)(((volatile void *)0x01C41000) + 0x40))) &
                           0x0000FFFF));
}


x86 assembly (clang, -O0):
<spi_update>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    $0x1c41000,%eax
mov    0x40(%rax),%eax
and    $0x20000000,%eax
cmp    $0x0,%eax
je     1126 <spi_update+0x26>
jmp    110b <spi_update+0xb>
movzwl -0x2(%rbp),%eax
mov    %eax,%ecx
mov    $0x1c41000,%eax
mov    %ecx,0x38(%rax)
mov    $0x1c41000,%eax
mov    0x40(%rax),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     114f <spi_update+0x4f>
jmp    1134 <spi_update+0x34>
mov    $0x1c41000,%eax
mov    0x40(%rax),%eax
and    $0xffff,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_update>:
testl  $0x20000000,0x1c41040
jne    1100 <spi_update>
movzwl %di,%eax
mov    %eax,0x1c41038
nopw   0x0(%rax,%rax,1)
cmpl   $0x0,0x1c41040
js     1120 <spi_update+0x20>
mov    0x1c41040,%eax
ret

LLVM IR (-O0):
define zeroext i16 @spi_update(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
br label %3
3: ; preds = %7, %1
%4 = load volatile i32, i32* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 29626368 to i8*), i64 64) to i32*)
%5 = and i32 %4, 536870912
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = load i16, i16* %2
%10 = zext i16 %9 to i64
%11 = trunc i64 %10 to i32
store volatile i32 %11, i32* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 29626368 to i8*), i64 56) to i32*)
br label %12
12: ; preds = %16, %8
%13 = load volatile i32, i32* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 29626368 to i8*), i64 64) to i32*)
%14 = and i32 %13, -2147483648
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %12
br label %12
17: ; preds = %12
%18 = load volatile i32, i32* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 29626368 to i8*), i64 64) to i32*)
%19 = and i32 %18, 65535
%20 = trunc i32 %19 to i16
ret i16 %20
}

LLVM IR (-O2):
define zeroext i16 @spi_update(i16 zeroext %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 29626432 to i32*)
%4 = and i32 %3, 536870912
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %2
6: ; preds = %2
%7 = zext i16 %0 to i32
store volatile i32 %7, i32* inttoptr (i64 29626424 to i32*)
br label %8
8: ; preds = %8, %6
%9 = load volatile i32, i32* inttoptr (i64 29626432 to i32*)
%10 = icmp sgt i32 %9, -1
br i1 %10, label %11, label %8
11: ; preds = %8
%12 = load volatile i32, i32* inttoptr (i64 29626432 to i32*)
%13 = trunc i32 %12 to i16
ret i16 %13
}
int execute_getpriority() { return 0; }


x86 assembly (clang, -O0):
<execute_getpriority>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_getpriority>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_getpriority() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_getpriority() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int **calloc(int, int);
int main() {
  int asdf = 3;
  int *a = &asdf;
  int *b = &asdf;
  int **val = calloc(2, sizeof(int *));
  val[0] = a;
  val[1] = b;
  asdf = 8;
  if (*(val[0]) != 8) {
    abort();
  }
  if (*(val[1]) != 8) {
    abort();
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x3,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x2,%edi
mov    $0x8,%esi
call   1040 <calloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,0x8(%rax)
movl   $0x8,-0x4(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
cmpl   $0x8,(%rax)
je     1187 <main+0x67>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x20(%rbp),%rax
mov    0x8(%rax),%rax
cmpl   $0x8,(%rax)
je     119f <main+0x7f>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
mov    $0x8,%esi
call   1030 <calloc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32**
store i32 3, i32* %1
store i32* %1, i32** %2
store i32* %1, i32** %3
%5 = call i32** @calloc(i32 2, i32 8)
store i32** %5, i32*** %4
%6 = load i32*, i32** %2
%7 = load i32**, i32*** %4
%8 = getelementptr inbounds i32*, i32** %7, i64 0
store i32* %6, i32** %8
%9 = load i32*, i32** %3
%10 = load i32**, i32*** %4
%11 = getelementptr inbounds i32*, i32** %10, i64 1
store i32* %9, i32** %11
store i32 8, i32* %1
%12 = load i32**, i32*** %4
%13 = getelementptr inbounds i32*, i32** %12, i64 0
%14 = load i32*, i32** %13
%15 = load i32, i32* %14
%16 = icmp ne i32 %15, 8
br i1 %16, label %17, label %19
17: ; preds = %0
%18 = call i32 (...) @abort()
unreachable
19: ; preds = %0
%20 = load i32**, i32*** %4
%21 = getelementptr inbounds i32*, i32** %20, i64 1
%22 = load i32*, i32** %21
%23 = load i32, i32* %22
%24 = icmp ne i32 %23, 8
br i1 %24, label %25, label %27
25: ; preds = %19
%26 = call i32 (...) @abort()
unreachable
27: ; preds = %19
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32** @calloc(i32 2, i32 8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ dup2(int, int);
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void enable_stdout(int original) {
  fflush(stdout);
  dup2(original, 1);
  close(original);
}


x86 assembly (clang, -O0):
<enable_stdout>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2e9e(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <dup2@plt>
mov    -0x4(%rbp),%edi
call   1040 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_stdout>:
push   %rbx
mov    %edi,%ebx
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
call   1050 <fflush@plt>
mov    %ebx,%edi
mov    $0x1,%esi
call   1030 <dup2@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <close@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @enable_stdout(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stdout
%4 = call i32 @fflush(i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @dup2(i32 %5, i32 1)
%7 = load i32, i32* %2
%8 = call i32 @close(i32 %7)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @enable_stdout(i32 %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fflush(i32 %2)
%4 = tail call i32 @dup2(i32 %0, i32 1)
%5 = tail call i32 @close(i32 %0)
ret void
}
int canFormTriangle(int a, int b, int c) {
  if (a > b - c && b > a - c && a > c - b)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<canFormTriangle>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    -0x10(%rbp),%ecx
cmp    %ecx,%eax
jle    114c <canFormTriangle+0x4c>
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    -0x10(%rbp),%ecx
cmp    %ecx,%eax
jle    114c <canFormTriangle+0x4c>
mov    -0x8(%rbp),%eax
mov    -0x10(%rbp),%ecx
sub    -0xc(%rbp),%ecx
cmp    %ecx,%eax
jle    114c <canFormTriangle+0x4c>
movl   $0x1,-0x4(%rbp)
jmp    1153 <canFormTriangle+0x53>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<canFormTriangle>:
mov    %esi,%eax
sub    %edx,%eax
cmp    %edi,%eax
setl   %al
mov    %edi,%ecx
sub    %edx,%ecx
cmp    %esi,%ecx
setl   %cl
and    %al,%cl
sub    %esi,%edx
cmp    %edi,%edx
setl   %al
and    %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @canFormTriangle(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = sub nsw i32 %9, %10
%12 = icmp sgt i32 %8, %11
br i1 %12, label %13, label %26
13: ; preds = %3
%14 = load i32, i32* %6
%15 = load i32, i32* %5
%16 = load i32, i32* %7
%17 = sub nsw i32 %15, %16
%18 = icmp sgt i32 %14, %17
br i1 %18, label %19, label %26
19: ; preds = %13
%20 = load i32, i32* %5
%21 = load i32, i32* %7
%22 = load i32, i32* %6
%23 = sub nsw i32 %21, %22
%24 = icmp sgt i32 %20, %23
br i1 %24, label %25, label %26
25: ; preds = %19
store i32 1, i32* %4
br label %27
26: ; preds = %19, %13, %3
store i32 0, i32* %4
br label %27
27: ; preds = %26, %25
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @canFormTriangle(i32 %0, i32 %1, i32 %2) {
%4 = sub nsw i32 %1, %2
%5 = icmp slt i32 %4, %0
%6 = sub nsw i32 %0, %2
%7 = icmp slt i32 %6, %1
%8 = select i1 %5, i1 %7, i1 false
%9 = sub nsw i32 %2, %1
%10 = icmp slt i32 %9, %0
%11 = select i1 %8, i1 %10, i1 false
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void arp_usage(char *pname) {
  fprintf(stderr,
          "The Network Discovery Tool "
          "0.0.1"
          " by "
          "Tadas Vilkeliskis"
          "\n"
          "Usage: %s arp <options>\n"
          "Options:\n"
          " -i <if>   Network interface\n"
          " -t <time> Delay between packets\n"
          " -h        Help screen\n",
          pname);
  exit(0);
}


x86 assembly (clang, -O0):
<arp_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<arp_usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [173 x i8] c"The Network Discovery Tool 0.0.1 by Tadas Vilkeliskis\0AUsage: %s arp <options>\0AOptions:\0A -i <if> Network interface\0A -t <time> Delay between packets\0A -h Help screen\0A\00"
define void @arp_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([173 x i8], [173 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [173 x i8] c"The Network Discovery Tool 0.0.1 by Tadas Vilkeliskis\0AUsage: %s arp <options>\0AOptions:\0A -i <if> Network interface\0A -t <time> Delay between packets\0A -h Help screen\0A\00"
define void @arp_usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([173 x i8], [173 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ matNd_getColumn(double *, double const *, int const, int);
void mat4d_getColumn(double result[4], const double m[16], const int col) {
  matNd_getColumn(result, m, col, 4);
}


x86 assembly (clang, -O0):
<mat4d_getColumn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    $0x4,%ecx
call   1030 <matNd_getColumn@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat4d_getColumn>:
mov    $0x4,%ecx
jmp    1030 <matNd_getColumn@plt>

LLVM IR (-O0):
define void @mat4d_getColumn(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = load double*, double** %4
%8 = load double*, double** %5
%9 = load i32, i32* %6
%10 = call i32 @matNd_getColumn(double* %7, double* %8, i32 %9, i32 4)
ret void
}

LLVM IR (-O2):
define void @mat4d_getColumn(double* %0, double* %1, i32 %2) {
%4 = tail call i32 @matNd_getColumn(double* %0, double* %1, i32 %2, i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ keyTrajet(unsigned char, int /*<<< orphan*/,
                             int /*<<< orphan*/);
void menuTrajet(int item) { keyTrajet((unsigned char)item, 0, 0); }


x86 assembly (clang, -O0):
<menuTrajet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    %edx,%edx
movzbl %al,%edi
mov    %edx,%esi
call   1030 <keyTrajet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<menuTrajet>:
movzbl %dil,%edi
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <keyTrajet@plt>

LLVM IR (-O0):
define void @menuTrajet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
%5 = call i32 @keyTrajet(i8 zeroext %4, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @menuTrajet(i32 %0) {
%2 = trunc i32 %0 to i8
%3 = tail call i32 @keyTrajet(i8 zeroext %2, i32 0, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ rotate(char *, int);
int main() {
  char str[] = "abcdef";
  rotate(str, 3);
  printf("%s\n", str);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xed2(%rip),%eax
mov    %eax,-0x7(%rbp)
mov    0xecc(%rip),%ax
mov    %ax,-0x3(%rbp)
mov    0xec4(%rip),%al
mov    %al,-0x1(%rbp)
lea    -0x7(%rbp),%rdi
mov    $0x3,%esi
call   1040 <rotate@plt>
lea    -0x7(%rbp),%rsi
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0x666564,0xb(%rsp)
movl   $0x64636261,0x8(%rsp)
64
lea    0x8(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x3,%esi
call   1040 <rotate@plt>
lea    0xeb9(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.str = [7 x i8] c"abcdef\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca [7 x i8]
%2 = bitcast [7 x i8]* %1 to i8*
%3 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%4 = call i32 @rotate(i8* %3, i32 3)
%5 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.str = [7 x i8] c"abcdef\00"
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca [7 x i8]
%2 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%3 = call i32 @rotate(i8* %2, i32 3)
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ uart_putc(int /*<<< orphan*/);
void uart_puts(char *str) {
  while (*str) {
    uart_putc(*str++);
  }
}


x86 assembly (clang, -O0):
<uart_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <uart_puts+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <uart_putc@plt>
jmp    111c <uart_puts+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_puts>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <uart_puts+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <uart_putc@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <uart_puts+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @uart_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 @uart_putc(i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @uart_puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 @uart_putc(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
int test_imm_45int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x45 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_45int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x45,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_45int64_midword_mem>:
testb  $0x45,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_45int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 69
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_45int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 4521984
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
main() {
  float a = 0;
  int i = 0;
  i = a++;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xee0(%rip),%xmm2
movaps %xmm0,%xmm1
addss  %xmm2,%xmm1
movss  %xmm1,-0x4(%rbp)
cvttss2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca float
%2 = alloca i32
store float 0.000000e+00, float* %1
store i32 0, i32* %2
%3 = load float, float* %1
%4 = fadd float %3, 1.000000e+00
store float %4, float* %1
%5 = fptosi float %3 to i32
store i32 %5, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int bswap_64(int);
uint64_t bswap_marker(uint64_t x, uint64_t sig1) {
  if (sig1 == 0xe7ee4981885d6ac5ULL)
    return bswap_64(x);
  else {
    assert(sig1 == 0xc56a5d888149eee7ULL);
    return x;
  }
}


x86 assembly (clang, -O0):
<bswap_marker>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rax
movabs $0xe7ee4981885d6ac5,%rcx
49 ee e7
cmp    %rcx,%rax
jne    1155 <bswap_marker+0x35>
mov    -0x8(%rbp),%edi
call   1040 <bswap_64@plt>
mov    %eax,-0x4(%rbp)
jmp    1179 <bswap_marker+0x59>
movslq -0xc(%rbp),%rax
movabs $0xc56a5d888149eee7,%rcx
5d 6a c5
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bswap_marker>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
call   1030 <assert@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @bswap_marker(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = sext i32 %6 to i64
%8 = icmp eq i64 %7, -1734367985803629883
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i32, i32* %4
%11 = call i32 @bswap_64(i32 %10)
store i32 %11, i32* %3
br label %19
12: ; preds = %2
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = icmp eq i64 %14, -4221458859840377113
%16 = zext i1 %15 to i32
%17 = call i32 @assert(i32 %16)
%18 = load i32, i32* %4
store i32 %18, i32* %3
br label %19
19: ; preds = %12, %9
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @bswap_marker(i32 returned %0, i32 %1) {
%3 = tail call i32 @assert(i32 0)
ret i32 %0
}
int h(char a, char b, int c) { return (char)(a * b) + c; }


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    %edx,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
movsbl -0x2(%rbp),%ecx
imul   %ecx,%eax
movsbl %al,%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
mov    %esi,%eax
mul    %dil
movsbl %al,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @h(i8 signext %0, i8 signext %1, i32 %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i32
store i8 %0, i8* %4
store i8 %1, i8* %5
store i32 %2, i32* %6
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = load i8, i8* %5
%10 = sext i8 %9 to i32
%11 = mul nsw i32 %8, %10
%12 = trunc i32 %11 to i8
%13 = sext i8 %12 to i32
%14 = load i32, i32* %6
%15 = add nsw i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @h(i8 signext %0, i8 signext %1, i32 %2) {
%4 = mul i8 %1, %0
%5 = sext i8 %4 to i32
%6 = add nsw i32 %5, %2
ret i32 %6
}
char *langRomTypeAscii16() { return "ASCII 16"; }


x86 assembly (clang, -O0):
<langRomTypeAscii16>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeAscii16>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [9 x i8] c"ASCII 16\00"
define i8* @langRomTypeAscii16() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [9 x i8] c"ASCII 16\00"
define i8* @langRomTypeAscii16() {
ret i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0)
}
int test6(int x) { return x / -10 < 0; }


x86 assembly (clang, -O0):
<test6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xfffffff6,%ecx
cltd
idiv   %ecx
cmp    $0x0,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test6>:
xor    %eax,%eax
cmp    $0xa,%edi
setge  %al
ret

LLVM IR (-O0):
define i32 @test6(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, -10
%5 = icmp slt i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @test6(i32 %0) {
%2 = icmp sgt i32 %0, 9
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void MMX_SUBSW(int dst_reg, int src_reg) {
  addbyte(0x66);
  addbyte(0x0f);
  addbyte(0xe9);
  addbyte(0xc0 | (dst_reg << 3) | src_reg);
}


x86 assembly (clang, -O0):
<MMX_SUBSW>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0xe9,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0xc0,%edi
or     -0x8(%rbp),%edi
call   1030 <addbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMX_SUBSW>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0xe9,%edi
call   1030 <addbyte@plt>
shl    $0x3,%ebp
or     %ebx,%ebp
or     $0xc0,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @MMX_SUBSW(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @addbyte(i32 102)
%6 = call i32 @addbyte(i32 15)
%7 = call i32 @addbyte(i32 233)
%8 = load i32, i32* %3
%9 = shl i32 %8, 3
%10 = or i32 192, %9
%11 = load i32, i32* %4
%12 = or i32 %10, %11
%13 = call i32 @addbyte(i32 %12)
ret void
}

LLVM IR (-O2):
define void @MMX_SUBSW(i32 %0, i32 %1) {
%3 = tail call i32 @addbyte(i32 102)
%4 = tail call i32 @addbyte(i32 15)
%5 = tail call i32 @addbyte(i32 233)
%6 = shl i32 %0, 3
%7 = or i32 %6, %1
%8 = or i32 %7, 192
%9 = tail call i32 @addbyte(i32 %8)
ret void
}
/* Type definitions */
struct _Locale_numeric {
  int dummy;
};
struct _Locale_name_hint {
  int dummy;
};

/* Variables and functions */
struct _Locale_name_hint *
_Locale_get_numeric_hint(struct _Locale_numeric *numeric) {
  return 0;
}


x86 assembly (clang, -O0):
<_Locale_get_numeric_hint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Locale_get_numeric_hint>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct._Locale_name_hint = type { i32 }
%struct._Locale_numeric = type { i32 }
define %struct._Locale_name_hint* @_Locale_get_numeric_hint(%struct._Locale_numeric* %0) {
%2 = alloca %struct._Locale_numeric*
store %struct._Locale_numeric* %0, %struct._Locale_numeric** %2
ret %struct._Locale_name_hint* null
}

LLVM IR (-O2):
%struct._Locale_name_hint = type { i32 }
%struct._Locale_numeric = type { i32 }
define noalias %struct._Locale_name_hint* @_Locale_get_numeric_hint(%struct._Locale_numeric* nocapture readnone %0) {
ret %struct._Locale_name_hint* null
}