xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned int rgb_to_pixel32bgr(unsigned int, unsigned int, unsigned int);
unsigned int rgb_to_pixel32bgr_dup(unsigned int r, unsigned int g,
                                   unsigned int b) {
  unsigned int col;
  col = rgb_to_pixel32bgr(r, g, b);
  return col;
}


x86 assembly (clang, -O0):
<rgb_to_pixel32bgr_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <rgb_to_pixel32bgr@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgb_to_pixel32bgr_dup>:
jmp    1030 <rgb_to_pixel32bgr@plt>

LLVM IR (-O0):
define i32 @rgb_to_pixel32bgr_dup(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @rgb_to_pixel32bgr(i32 %8, i32 %9, i32 %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
ret i32 %12
}

LLVM IR (-O2):
define i32 @rgb_to_pixel32bgr_dup(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @rgb_to_pixel32bgr(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
void on_close_dialog(int exit_code, void *context) {}


x86 assembly (clang, -O0):
<on_close_dialog>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_close_dialog>:
ret

LLVM IR (-O0):
define void @on_close_dialog(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @on_close_dialog(i32 %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
unsigned long long rdmsr(int);
bool apic_is_enable(void) { return (rdmsr(0x1b) & (1ULL << 11)) != 0; }


x86 assembly (clang, -O0):
<apic_is_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1b,%edi
call   1030 <rdmsr@plt>
and    $0x800,%rax
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<apic_is_enable>:
push   %rax
mov    $0x1b,%edi
call   1030 <rdmsr@plt>
shr    $0xb,%eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @apic_is_enable() {
%1 = call i64 @rdmsr(i32 27)
%2 = and i64 %1, 2048
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @apic_is_enable() {
%1 = tail call i64 @rdmsr(i32 27)
%2 = trunc i64 %1 to i32
%3 = lshr i32 %2, 11
%4 = and i32 %3, 1
ret i32 %4
}
int f_eq_rm1(float a1, float *a2) { return (((a1) == (*a2))); }


x86 assembly (clang, -O0):
<f_eq_rm1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
mov    -0x10(%rbp),%rax
ucomiss (%rax),%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_eq_rm1>:
cmpeqss (%rdi),%xmm0
movd   %xmm0,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @f_eq_rm1(float %0, float* %1) {
%3 = alloca float
%4 = alloca float*
store float %0, float* %3
store float* %1, float** %4
%5 = load float, float* %3
%6 = load float*, float** %4
%7 = load float, float* %6
%8 = fcmp oeq float %5, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @f_eq_rm1(float %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = fcmp oeq float %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ cpu_to_be64(int /*<<< orphan*/);
void cpu_to_be64w(uint64_t *p, uint64_t v) { *p = cpu_to_be64(v); }


x86 assembly (clang, -O0):
<cpu_to_be64w>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <cpu_to_be64@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_to_be64w>:
push   %rbx
mov    %rdi,%rbx
mov    %esi,%edi
call   1030 <cpu_to_be64@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @cpu_to_be64w(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @cpu_to_be64(i32 %5)
%7 = load i32*, i32** %3
store i32 %6, i32* %7
ret void
}

LLVM IR (-O2):
define void @cpu_to_be64w(i32* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @cpu_to_be64(i32 %1)
store i32 %3, i32* %0
ret void
}
long work_on_cpu(unsigned int cpu, long (*fn)(void *), void *arg) {
  return fn(arg);
}


x86 assembly (clang, -O0):
<work_on_cpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rdi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<work_on_cpu>:
mov    %rdx,%rdi
jmp    *%rsi

LLVM IR (-O0):
define i64 @work_on_cpu(i32 %0, i64 (i8*)* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i64 (i8*)*
%6 = alloca i8*
store i32 %0, i32* %4
store i64 (i8*)* %1, i64 (i8*)** %5
store i8* %2, i8** %6
%7 = load i64 (i8*)*, i64 (i8*)** %5
%8 = load i8*, i8** %6
%9 = call i64 %7(i8* %8)
ret i64 %9
}

LLVM IR (-O2):
define i64 @work_on_cpu(i32 %0, i64 (i8*)* nocapture %1, i8* %2) {
%4 = tail call i64 %1(i8* %2)
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ memcmp(char const *, char *, int);
int bb_detect() {
  const char *str = (char *)(volatile unsigned char *)(0xa1001400);
  if (!memcmp(str, "GAPSPCI_BRIDGE_2", 16))
    return 0;
  else
    return -1;
}


x86 assembly (clang, -O0):
<bb_detect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xa1001400,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed4(%rip),%rsi
mov    $0x10,%edx
call   1030 <memcmp@plt>
cmp    $0x0,%eax
jne    114b <bb_detect+0x3b>
movl   $0x0,-0x4(%rbp)
jmp    1152 <bb_detect+0x42>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bb_detect>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0xa1001400,%edi
mov    $0x10,%edx
call   1030 <memcmp@plt>
neg    %eax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"GAPSPCI_BRIDGE_2\00"
define i32 @bb_detect() {
%1 = alloca i32
%2 = alloca i8*
store i8* inttoptr (i64 2701136896 to i8*), i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @memcmp(i8* %3, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 16)
%5 = icmp ne i32 %4, 0
br i1 %5, label %7, label %6
6: ; preds = %0
store i32 0, i32* %1
br label %8
7: ; preds = %0
store i32 -1, i32* %1
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@.str = [17 x i8] c"GAPSPCI_BRIDGE_2\00"
define i32 @bb_detect() {
%1 = tail call i32 @memcmp(i8* inttoptr (i64 2701136896 to i8*), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 16)
%2 = icmp ne i32 %1, 0
%3 = sext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int wchar_t;

/* Variables and functions */
int wcwidth(wchar_t wc) {
  if (wc == L'\0')
    return 0;
  if (wc <= L'\x1F' || wc == L'\x7F')
    return -1;
  return 1;
}


x86 assembly (clang, -O0):
<wcwidth>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111d <wcwidth+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1144 <wcwidth+0x44>
cmpl   $0x1f,-0x8(%rbp)
jle    1131 <wcwidth+0x31>
cmpl   $0x7f,-0x8(%rbp)
jne    113d <wcwidth+0x3d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1144 <wcwidth+0x44>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcwidth>:
xor    %eax,%eax
cmp    $0x7f,%edi
setne  %al
cmp    $0x20,%edi
lea    -0x1(%rax,%rax,1),%ecx
mov    $0xffffffff,%eax
cmovge %ecx,%eax
test   %edi,%edi
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @wcwidth(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sle i32 %8, 31
br i1 %9, label %13, label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 127
br i1 %12, label %13, label %14
13: ; preds = %10, %7
store i32 -1, i32* %2
br label %15
14: ; preds = %10
store i32 1, i32* %2
br label %15
15: ; preds = %14, %13, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @wcwidth(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = icmp slt i32 %0, 32
%4 = icmp eq i32 %0, 127
%5 = or i1 %3, %4
%6 = select i1 %5, i32 -1, i32 1
%7 = select i1 %2, i32 0, i32 %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ IPPROTO_TCP;
int /*<<< orphan*/ TCP_QUICKACK;
int setsockopt(int, int /*<<< orphan*/, int /*<<< orphan*/, char *, int);
int set_quickack(int csock, int enabled) {
  return setsockopt(csock, IPPROTO_TCP, TCP_QUICKACK, (char *)&enabled,
                    sizeof(int));
}


x86 assembly (clang, -O0):
<set_quickack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
mov    0x2eaf(%rip),%rax
mov    (%rax),%edx
lea    -0x8(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_quickack>:
push   %rax
mov    %esi,0x4(%rsp)
mov    0x2ecc(%rip),%rax
mov    (%rax),%esi
mov    0x2ebb(%rip),%rax
mov    (%rax),%edx
lea    0x4(%rsp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
pop    %rcx
ret

LLVM IR (-O0):
@IPPROTO_TCP = global i32 0
@TCP_QUICKACK = global i32 0
define i32 @set_quickack(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* @IPPROTO_TCP
%7 = load i32, i32* @TCP_QUICKACK
%8 = bitcast i32* %4 to i8*
%9 = call i32 @setsockopt(i32 %5, i32 %6, i32 %7, i8* %8, i32 4)
ret i32 %9
}

LLVM IR (-O2):
@IPPROTO_TCP = global i32 0
@TCP_QUICKACK = global i32 0
define i32 @set_quickack(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = load i32, i32* @IPPROTO_TCP
%5 = load i32, i32* @TCP_QUICKACK
%6 = bitcast i32* %3 to i8*
%7 = call i32 @setsockopt(i32 %0, i32 %4, i32 %5, i8* %6, i32 4)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Swi_MLoad(int, int /*<<< orphan*/, int /*<<< orphan*/,
                             int /*<<< orphan*/);
void Swi_LedOff(void) { Swi_MLoad(129, 0, 0, 0); }


x86 assembly (clang, -O0):
<Swi_LedOff>:
push   %rbp
mov    %rsp,%rbp
mov    $0x81,%edi
xor    %ecx,%ecx
mov    %ecx,%esi
mov    %ecx,%edx
call   1030 <Swi_MLoad@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Swi_LedOff>:
mov    $0x81,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <Swi_MLoad@plt>

LLVM IR (-O0):
define void @Swi_LedOff() {
%1 = call i32 @Swi_MLoad(i32 129, i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @Swi_LedOff() {
%1 = tail call i32 @Swi_MLoad(i32 129, i32 0, i32 0, i32 0)
ret void
}
int is_error(int value) { return (value == -1); }


x86 assembly (clang, -O0):
<is_error>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_error>:
xor    %eax,%eax
cmp    $0xffffffff,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, -1
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @is_error(i32 %0) {
%2 = icmp eq i32 %0, -1
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef enum bpf_map_type { ____Placeholder_bpf_map_type } bpf_map_type;
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
int bpf_create_map_in_map_node(int, int, int, int, int /*<<< orphan*/, int);
int bpf_create_map_in_map(enum bpf_map_type map_type, int key_size,
                          int inner_map_fd, int max_entries, __u32 map_flags) {
  return bpf_create_map_in_map_node(map_type, key_size, inner_map_fd,
                                    max_entries, map_flags, -1);
}


x86 assembly (clang, -O0):
<bpf_create_map_in_map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    $0xffffffff,%r9d
call   1030 <bpf_create_map_in_map_node@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_create_map_in_map>:
mov    $0xffffffff,%r9d
jmp    1030 <bpf_create_map_in_map_node@plt>

LLVM IR (-O0):
define i32 @bpf_create_map_in_map(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @bpf_create_map_in_map_node(i32 %11, i32 %12, i32 %13, i32 %14, i32 %15, i32 -1)
ret i32 %16
}

LLVM IR (-O2):
define i32 @bpf_create_map_in_map(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @bpf_create_map_in_map_node(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 -1)
ret i32 %6
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print_int(uint32_t value) { printf("%d", value); }


x86 assembly (clang, -O0):
<print_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_int>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @print_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @print_int(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dlclose(void *);
void ReleaseSharedLibrary(void *handle) { dlclose(handle); }


x86 assembly (clang, -O0):
<ReleaseSharedLibrary>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dlclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReleaseSharedLibrary>:
jmp    1030 <dlclose@plt>

LLVM IR (-O0):
define void @ReleaseSharedLibrary(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @dlclose(i8* %3)
ret void
}

LLVM IR (-O2):
define void @ReleaseSharedLibrary(i8* %0) {
%2 = tail call i32 @dlclose(i8* %0)
ret void
}
void increase_debuglevel() {}


x86 assembly (clang, -O0):
<increase_debuglevel>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<increase_debuglevel>:
ret

LLVM IR (-O0):
define void @increase_debuglevel() {
ret void
}

LLVM IR (-O2):
define void @increase_debuglevel() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ shakerSort(int *, int);
int main() {
  int numberOfElements = 6;
  int arr[] = {2, 7, 8, 1, 4, 1};
  shakerSort(arr, numberOfElements - 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x6,-0x8(%rbp)
mov    0xed3(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed0(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecd(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%esi
sub    $0x1,%esi
call   1030 <shakerSort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    0xef5(%rip),%rax
mov    %rax,0x10(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x5,%esi
call   1030 <shakerSort@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.arr = [6 x i32] [i32 2, i32 7, i32 8, i32 1, i32 4, i32 1]
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [6 x i32]
store i32 0, i32* %1
store i32 6, i32* %2
%4 = bitcast [6 x i32]* %3 to i8*
%5 = getelementptr inbounds [6 x i32], [6 x i32]* %3, i64 0, i64 0
%6 = load i32, i32* %2
%7 = sub nsw i32 %6, 1
%8 = call i32 @shakerSort(i32* %5, i32 %7)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [6 x i32] [i32 2, i32 7, i32 8, i32 1, i32 4, i32 1]
define i32 @main() {
%1 = alloca [6 x i32]
%2 = bitcast [6 x i32]* %1 to i8*
%3 = getelementptr inbounds [6 x i32], [6 x i32]* %1, i64 0, i64 0
%4 = call i32 @shakerSort(i32* %3, i32 5)
ret i32 0
}
int pathconN_nm10_work(int *sz_arg, int *sz_res, int *sz_iw, int *sz_w) {
  if (sz_arg)
    *sz_arg = 1;
  if (sz_res)
    *sz_res = 2;
  if (sz_iw)
    *sz_iw = 0;
  if (sz_w)
    *sz_w = 0;
  return 0;
}


x86 assembly (clang, -O0):
<pathconN_nm10_work>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1129 <pathconN_nm10_work+0x29>
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
cmpq   $0x0,-0x10(%rbp)
je     113e <pathconN_nm10_work+0x3e>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
cmpq   $0x0,-0x18(%rbp)
je     1153 <pathconN_nm10_work+0x53>
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
cmpq   $0x0,-0x20(%rbp)
je     1168 <pathconN_nm10_work+0x68>
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm10_work>:
test   %rdi,%rdi
je     110b <pathconN_nm10_work+0xb>
movl   $0x1,(%rdi)
test   %rsi,%rsi
je     1116 <pathconN_nm10_work+0x16>
movl   $0x2,(%rsi)
test   %rdx,%rdx
je     1121 <pathconN_nm10_work+0x21>
movl   $0x0,(%rdx)
test   %rcx,%rcx
je     112c <pathconN_nm10_work+0x2c>
movl   $0x0,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pathconN_nm10_work(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = load i32*, i32** %5
store i32 1, i32* %12
br label %13
13: ; preds = %11, %4
%14 = load i32*, i32** %6
%15 = icmp ne i32* %14, null
br i1 %15, label %16, label %18
16: ; preds = %13
%17 = load i32*, i32** %6
store i32 2, i32* %17
br label %18
18: ; preds = %16, %13
%19 = load i32*, i32** %7
%20 = icmp ne i32* %19, null
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = load i32*, i32** %7
store i32 0, i32* %22
br label %23
23: ; preds = %21, %18
%24 = load i32*, i32** %8
%25 = icmp ne i32* %24, null
br i1 %25, label %26, label %28
26: ; preds = %23
%27 = load i32*, i32** %8
store i32 0, i32* %27
br label %28
28: ; preds = %26, %23
ret i32 0
}

LLVM IR (-O2):
define i32 @pathconN_nm10_work(i32* writeonly %0, i32* writeonly %1, i32* writeonly %2, i32* writeonly %3) {
%5 = icmp eq i32* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i32 1, i32* %0
br label %7
7: ; preds = %6, %4
%8 = icmp eq i32* %1, null
br i1 %8, label %10, label %9
9: ; preds = %7
store i32 2, i32* %1
br label %10
10: ; preds = %9, %7
%11 = icmp eq i32* %2, null
br i1 %11, label %13, label %12
12: ; preds = %10
store i32 0, i32* %2
br label %13
13: ; preds = %12, %10
%14 = icmp eq i32* %3, null
br i1 %14, label %16, label %15
15: ; preds = %13
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
ret i32 0
}
/* Type definitions */
struct quat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ quat_assign(float *, float *);
__attribute__((always_)) struct quat *psquat_assign(struct quat *result,
                                                    struct quat *a) {
  quat_assign((float *)result, (float *)a);
  return result;
}


x86 assembly (clang, -O0):
<psquat_assign>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <quat_assign@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psquat_assign>:
push   %rbx
mov    %rdi,%rbx
call   1030 <quat_assign@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.quat = type { i32 }
define %struct.quat* @psquat_assign(%struct.quat* %0, %struct.quat* %1) {
%3 = alloca %struct.quat*
%4 = alloca %struct.quat*
store %struct.quat* %0, %struct.quat** %3
store %struct.quat* %1, %struct.quat** %4
%5 = load %struct.quat*, %struct.quat** %3
%6 = bitcast %struct.quat* %5 to float*
%7 = load %struct.quat*, %struct.quat** %4
%8 = bitcast %struct.quat* %7 to float*
%9 = call i32 @quat_assign(float* %6, float* %8)
%10 = load %struct.quat*, %struct.quat** %3
ret %struct.quat* %10
}

LLVM IR (-O2):
%struct.quat = type { i32 }
define %struct.quat* @psquat_assign(%struct.quat* returned %0, %struct.quat* %1) {
%3 = bitcast %struct.quat* %0 to float*
%4 = bitcast %struct.quat* %1 to float*
%5 = tail call i32 @quat_assign(float* %3, float* %4)
ret %struct.quat* %0
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void s337_set_data_mode(uint8_t *p_s337, uint8_t i_data_mode) {
  p_s337[5] &= ~0x60;
  p_s337[5] |= (i_data_mode << 5) & 0x60;
}


x86 assembly (clang, -O0):
<s337_set_data_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x14(%rax),%ecx
and    $0xffffff9f,%ecx
mov    %ecx,0x14(%rax)
mov    -0xc(%rbp),%ecx
shl    $0x5,%ecx
and    $0x60,%ecx
mov    -0x8(%rbp),%rax
or     0x14(%rax),%ecx
mov    %ecx,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<s337_set_data_mode>:
mov    0x14(%rdi),%eax
and    $0xffffff9f,%eax
shl    $0x5,%esi
and    $0x60,%esi
or     %eax,%esi
mov    %esi,0x14(%rdi)
ret

LLVM IR (-O0):
define void @s337_set_data_mode(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 5
%7 = load i32, i32* %6
%8 = and i32 %7, -97
store i32 %8, i32* %6
%9 = load i32, i32* %4
%10 = shl i32 %9, 5
%11 = and i32 %10, 96
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 5
%14 = load i32, i32* %13
%15 = or i32 %14, %11
store i32 %15, i32* %13
ret void
}

LLVM IR (-O2):
define void @s337_set_data_mode(i32* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 5
%4 = load i32, i32* %3
%5 = and i32 %4, -97
%6 = shl i32 %1, 5
%7 = and i32 %6, 96
%8 = or i32 %5, %7
store i32 %8, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _IOLBF;
int /*<<< orphan*/ setvbuf(int /*<<< orphan*/, int /*<<< orphan*/ *,
                           int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
__attribute__((constructor)) void stdbuffer() {
  setvbuf(stdout, NULL, _IOLBF, 0);
}


x86 assembly (clang, -O0):
<stdbuffer>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    0x2ebc(%rip),%rax
mov    (%rax),%edx
xor    %eax,%eax
mov    %eax,%esi
xor    %ecx,%ecx
call   1030 <setvbuf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdbuffer>:
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
mov    0x2ec0(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
xor    %ecx,%ecx
jmp    1030 <setvbuf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@_IOLBF = global i32 0
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @stdbuffer, i8* null }]
define void @stdbuffer() {
%1 = load i32, i32* @stdout
%2 = load i32, i32* @_IOLBF
%3 = call i32 @setvbuf(i32 %1, i32* null, i32 %2, i32 0)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@_IOLBF = global i32 0
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @stdbuffer, i8* null }]
define void @stdbuffer() {
%1 = load i32, i32* @stdout
%2 = load i32, i32* @_IOLBF
%3 = tail call i32 @setvbuf(i32 %1, i32* null, i32 %2, i32 0)
ret void
}
void fini_function(void) {}


x86 assembly (clang, -O0):
<fini_function>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fini_function>:
ret

LLVM IR (-O0):
define void @fini_function() {
ret void
}

LLVM IR (-O2):
define void @fini_function() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void ch8_SCRIGHT() { printf("Error: ch8_SCRIGHT not yet implemented\n"); }


x86 assembly (clang, -O0):
<ch8_SCRIGHT>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ch8_SCRIGHT>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"Error: ch8_SCRIGHT not yet implemented\0A\00"
define void @ch8_SCRIGHT() {
%1 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [39 x i8] c"Error: ch8_SCRIGHT not yet implemented\00"
define void @ch8_SCRIGHT() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
void *cs2qncb();
void *cs2qncb_(void) { return cs2qncb(); }


x86 assembly (clang, -O0):
<cs2qncb_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cs2qncb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cs2qncb_>:
xor    %eax,%eax
jmp    1030 <cs2qncb@plt>

LLVM IR (-O0):
define i8* @cs2qncb_() {
%1 = call i8* (...) @cs2qncb()
ret i8* %1
}

LLVM IR (-O2):
define i8* @cs2qncb_() {
%1 = tail call i8* (...) @cs2qncb()
ret i8* %1
}
long acrn_hypercall0(unsigned long hcall_id) {
  long result;
  asm volatile("movl %1, %%r8d\n\t"
               "vmcall\n\t"
               : "=a"(result)
               : "g"(hcall_id)
               : "r8", "memory");
  return result;
}


x86 assembly (clang, -O0):
<acrn_hypercall0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%r8d
vmcall
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i64 @acrn_hypercall0(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 asm sideeffect "movl $1, %r8d\0A\09vmcall\0A\09", "={ax},imr,~{r8},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assume(int);
int /*<<< orphan*/ rotate(float, float);
void main() {
  float x, y;
  __VERIFIER_assume(-1 <= x && x <= 1);
  __VERIFIER_assume(-1 <= y && y <= 1);
  rotate(x, y);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  -0x4(%rbp),%xmm0
xor    %eax,%eax
movss  0xec9(%rip),%xmm1
ucomiss %xmm1,%xmm0
mov    %al,-0x9(%rbp)
jb     1155 <main+0x35>
movss  0xeb9(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
setae  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <__VERIFIER_assume@plt>
movss  -0x8(%rbp),%xmm0
xor    %eax,%eax
movss  0xe8f(%rip),%xmm1
ucomiss %xmm1,%xmm0
mov    %al,-0xa(%rbp)
jb     118f <main+0x6f>
movss  0xe7f(%rip),%xmm0
ucomiss -0x8(%rbp),%xmm0
setae  %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <__VERIFIER_assume@plt>
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <rotate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <__VERIFIER_assume@plt>
xor    %edi,%edi
call   1040 <__VERIFIER_assume@plt>
pop    %rax
jmp    1030 <rotate@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca float
%2 = alloca float
%3 = load float, float* %1
%4 = fcmp ole float -1.000000e+00, %3
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = load float, float* %1
%7 = fcmp ole float %6, 1.000000e+00
br label %8
8: ; preds = %5, %0
%9 = phi i1 [ false, %0 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @__VERIFIER_assume(i32 %10)
%12 = load float, float* %2
%13 = fcmp ole float -1.000000e+00, %12
br i1 %13, label %14, label %17
14: ; preds = %8
%15 = load float, float* %2
%16 = fcmp ole float %15, 1.000000e+00
br label %17
17: ; preds = %14, %8
%18 = phi i1 [ false, %8 ], [ %16, %14 ]
%19 = zext i1 %18 to i32
%20 = call i32 @__VERIFIER_assume(i32 %19)
%21 = load float, float* %1
%22 = load float, float* %2
%23 = call i32 @rotate(float %21, float %22)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @__VERIFIER_assume(i32 0)
%2 = tail call i32 @__VERIFIER_assume(i32 0)
%3 = tail call i32 @rotate(float undef, float undef)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ yylex();
int main(void) {
  printf("TOKEN  \t\tLESSEMA\t\tATTRIBUTO\tRIGA\n");
  yylex();
  printf("\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <yylex@plt>
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
call   1050 <yylex@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [34 x i8] c"TOKEN \09\09LESSEMA\09\09ATTRIBUTO\09RIGA\0A\00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @yylex()
%4 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [33 x i8] c"TOKEN \09\09LESSEMA\09\09ATTRIBUTO\09RIGA\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @yylex()
%3 = tail call i32 @putchar(i32 10)
ret i32 0
}
/* Variables and functions */
int main(void) {
  int n = 3;
  int a[n][6];
  int(*p)[6];
  p = a;
  1 ? (int(*)[f(3)])0 : (int(*)[3])0;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
mov    %rsp,%rax
mov    %rax,-0x10(%rbp)
lea    (%rcx,%rcx,2),%rax
lea    0xf(,%rax,8),%rdx
movabs $0x3ffffffff0,%rax
and    %rax,%rdx
mov    %rsp,%rax
sub    %rdx,%rax
mov    %rax,%rsp
mov    %rcx,-0x18(%rbp)
mov    %rax,-0x20(%rbp)
mov    $0x3,%edi
mov    $0x0,%al
call   1030 <f@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    -0x4(%rbp),%eax
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x3,%edi
xor    %eax,%eax
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
%5 = alloca [6 x i32]*
store i32 0, i32* %1
store i32 3, i32* %2
%6 = load i32, i32* %2
%7 = zext i32 %6 to i64
%8 = call i8* @llvm.stacksave()
store i8* %8, i8** %3
%9 = alloca [6 x i32], i64 %7
store i64 %7, i64* %4
store [6 x i32]* %9, [6 x i32]** %5
%10 = call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 3)
%11 = zext i32 %10 to i64
store i32 0, i32* %1
%12 = load i8*, i8** %3
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (i32, ...) bitcast (i32 (...)* @f to i32 (i32, ...)*)(i32 3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ klog(char *);
int /*<<< orphan*/ kodapa_exit();
void interrupt_signal() {
  klog("SIGINT. Exiting...");
  kodapa_exit();
}


x86 assembly (clang, -O0):
<interrupt_signal>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <klog@plt>
mov    $0x0,%al
call   1040 <kodapa_exit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupt_signal>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <klog@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <kodapa_exit@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"SIGINT. Exiting...\00"
define void @interrupt_signal() {
%1 = call i32 @klog(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @kodapa_exit()
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"SIGINT. Exiting...\00"
define void @interrupt_signal() {
%1 = tail call i32 @klog(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @kodapa_exit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ emitln(char *);
void popAnd() {
  emitln("pop\t%%ebx");
  emitln("and\t%%ebx,%%eax");
}


x86 assembly (clang, -O0):
<popAnd>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <emitln@plt>
lea    0xee3(%rip),%rdi
call   1030 <emitln@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<popAnd>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <emitln@plt>
lea    0xee6(%rip),%rdi
pop    %rax
jmp    1030 <emitln@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"pop\09%%ebx\00"
@.str.1 = [16 x i8] c"and\09%%ebx,%%eax\00"
define void @popAnd() {
%1 = call i32 @emitln(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @emitln(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"pop\09%%ebx\00"
@.str.1 = [16 x i8] c"and\09%%ebx,%%eax\00"
define void @popAnd() {
%1 = tail call i32 @emitln(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @emitln(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int dummy(int x, int y) { return x + y; }


x86 assembly (clang, -O0):
<dummy>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @dummy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @dummy(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ vwarn_work(char const *, int /*<<< orphan*/,
                              int /*<<< orphan*/);
extern void vwarnx(const char *format, va_list args) {
  vwarn_work(format, args, 0);
}


x86 assembly (clang, -O0):
<vwarnx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <vwarn_work@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vwarnx>:
xor    %edx,%edx
jmp    1030 <vwarn_work@plt>

LLVM IR (-O0):
define void @vwarnx(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @vwarn_work(i8* %5, i32 %6, i32 0)
ret void
}

LLVM IR (-O2):
define void @vwarnx(i8* %0, i32 %1) {
%3 = tail call i32 @vwarn_work(i8* %0, i32 %1, i32 0)
ret void
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ panic(char *);
void *xmalloc(size_t size) {
  void *ptr;
  if (size == 0)
    panic("Size is 0!\n");
  ptr = malloc(size);
  if (!ptr)
    panic("No mem left!\n");
  return ptr;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1143 <xmalloc+0x23>
lea    0xec2(%rip),%rdi
call   1030 <panic@plt>
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1167 <xmalloc+0x47>
lea    0xeaa(%rip),%rdi
call   1030 <panic@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
jne    1135 <xmalloc+0x15>
lea    0xed0(%rip),%rdi
call   1030 <panic@plt>
mov    %rbx,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1151 <xmalloc+0x31>
lea    0xec0(%rip),%rdi
call   1030 <panic@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Size is 0!\0A\00"
@.str.1 = [14 x i8] c"No mem left!\0A\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @panic(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
%9 = load i64, i64* %2
%10 = call i8* @malloc(i64 %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = icmp ne i8* %11, null
br i1 %12, label %15, label %13
13: ; preds = %8
%14 = call i32 @panic(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
br label %15
15: ; preds = %13, %8
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
@.str = [12 x i8] c"Size is 0!\0A\00"
@.str.1 = [14 x i8] c"No mem left!\0A\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @panic(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %1
%6 = tail call i8* @malloc(i64 %0)
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 @panic(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %5
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ __rcu_read_lock();
void rcu_read_lock(void) {
  __rcu_read_lock();
  (void)0;
  do {
  } while (0);
}


x86 assembly (clang, -O0):
<rcu_read_lock>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__rcu_read_lock@plt>
jmp    1120 <rcu_read_lock+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_read_lock>:
xor    %eax,%eax
jmp    1030 <__rcu_read_lock@plt>

LLVM IR (-O0):
define void @rcu_read_lock() {
%1 = call i32 (...) @__rcu_read_lock()
br label %2
2: ; preds = %0
br label %3
3: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @rcu_read_lock() {
%1 = tail call i32 (...) @__rcu_read_lock()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int EINVAL;
int __syscall(int, int, int /*<<< orphan*/ const *, int /*<<< orphan*/ *, int);
int pthread_sigmask(int how, const sigset_t *set, sigset_t *old) {
  if (how > 2U)
    return EINVAL;
  return -__syscall(14, how, set, old, 8);
}


x86 assembly (clang, -O0):
<pthread_sigmask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpl   $0x2,-0x8(%rbp)
jbe    113e <pthread_sigmask+0x2e>
mov    0x2eac(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1162 <pthread_sigmask+0x52>
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0xe,%edi
mov    $0x8,%r8d
call   1030 <__syscall@plt>
mov    %eax,%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_sigmask>:
push   %rax
cmp    $0x3,%edi
jb     1121 <pthread_sigmask+0x11>
mov    0x2ec3(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0xe,%edi
mov    $0x8,%r8d
call   1030 <__syscall@plt>
neg    %eax
pop    %rcx
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @pthread_sigmask(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
%8 = load i32, i32* %5
%9 = icmp ugt i32 %8, 2
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i32, i32* @EINVAL
store i32 %11, i32* %4
br label %18
12: ; preds = %3
%13 = load i32, i32* %5
%14 = load i32*, i32** %6
%15 = load i32*, i32** %7
%16 = call i32 @__syscall(i32 14, i32 %13, i32* %14, i32* %15, i32 8)
%17 = sub nsw i32 0, %16
store i32 %17, i32* %4
br label %18
18: ; preds = %12, %10
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @pthread_sigmask(i32 %0, i32* %1, i32* %2) {
%4 = icmp ugt i32 %0, 2
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = load i32, i32* @EINVAL
br label %10
7: ; preds = %3
%8 = tail call i32 @__syscall(i32 14, i32 %0, i32* %1, i32* %2, i32 8)
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *program) {
  fprintf(stderr,
          "Usage:\n"
          "%s [options]\n"
          "\n"
          "Options:\n"
          "  -d DIR, --datadir DIR       location of Aquaria data\n"
          "  -v FILE, --vcdlog FILE      VCD log (for use with gtkwave)\n"
          "  -p PORT, --port NUM         port to listen at\n"
          "  -n, --noop                  don't change any devices\n"
          "\n"
          "Commands:\n"
          "  -h, -?, --help              this help message\n"
          "  -V, --version               version of this utility\n",
          program);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [363 x i8] c"Usage:\0A%s [options]\0A\0AOptions:\0A -d DIR, --datadir DIR location of Aquaria data\0A -v FILE, --vcdlog FILE VCD log (for use with gtkwave)\0A -p PORT, --port NUM port to listen at\0A -n, --noop don't change any devices\0A\0ACommands:\0A -h, -?, --help this help message\0A -V, --version version of this utility\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([363 x i8], [363 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [363 x i8] c"Usage:\0A%s [options]\0A\0AOptions:\0A -d DIR, --datadir DIR location of Aquaria data\0A -v FILE, --vcdlog FILE VCD log (for use with gtkwave)\0A -p PORT, --port NUM port to listen at\0A -n, --noop don't change any devices\0A\0ACommands:\0A -h, -?, --help this help message\0A -V, --version version of this utility\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([363 x i8], [363 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ newline();
int /*<<< orphan*/ output_number(int);
int /*<<< orphan*/ output_with_tab(char *);
void gnargs(int d) {
  output_with_tab("ld a,");
  output_number(d);
  newline();
}


x86 assembly (clang, -O0):
<gnargs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xebe(%rip),%rdi
call   1040 <output_with_tab@plt>
mov    -0x4(%rbp),%edi
call   1050 <output_number@plt>
mov    $0x0,%al
call   1030 <newline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gnargs>:
push   %rbx
mov    %edi,%ebx
lea    0xec6(%rip),%rdi
call   1040 <output_with_tab@plt>
mov    %ebx,%edi
call   1050 <output_number@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <newline@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"ld a,\00"
define void @gnargs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @output_with_tab(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @output_number(i32 %4)
%6 = call i32 (...) @newline()
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"ld a,\00"
define void @gnargs(i32 %0) {
%2 = tail call i32 @output_with_tab(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @output_number(i32 %0)
%4 = tail call i32 (...) @newline()
ret void
}
float etr_perimeter_side(float side) {
  float perimeter = side * 3;
  return perimeter;
}


x86 assembly (clang, -O0):
<etr_perimeter_side>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<etr_perimeter_side>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @etr_perimeter_side(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = fmul float %4, 3.000000e+00
store float %5, float* %3
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @etr_perimeter_side(float %0) {
%2 = fmul float %0, 3.000000e+00
ret float %2
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ diminuto_ipcl_datagram_send_generic(int, void const *,
                                                       size_t, char const *,
                                                       int /*<<< orphan*/);
ssize_t diminuto_ipcl_datagram_send(int fd, const void *buffer, size_t size,
                                    const char *path) {
  return diminuto_ipcl_datagram_send_generic(fd, buffer, size, path, 0);
}


x86 assembly (clang, -O0):
<diminuto_ipcl_datagram_send>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %r8d,%r8d
call   1030 <diminuto_ipcl_datagram_send_generic@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_ipcl_datagram_send>:
xor    %r8d,%r8d
jmp    1030 <diminuto_ipcl_datagram_send_generic@plt>

LLVM IR (-O0):
define i32 @diminuto_ipcl_datagram_send(i32 %0, i8* %1, i64 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = load i8*, i8** %8
%13 = call i32 @diminuto_ipcl_datagram_send_generic(i32 %9, i8* %10, i64 %11, i8* %12, i32 0)
ret i32 %13
}

LLVM IR (-O2):
define i32 @diminuto_ipcl_datagram_send(i32 %0, i8* %1, i64 %2, i8* %3) {
%5 = tail call i32 @diminuto_ipcl_datagram_send_generic(i32 %0, i8* %1, i64 %2, i8* %3, i32 0)
ret i32 %5
}
/* Type definitions */
struct TreeNode {
  int dummy;
};

/* Variables and functions */
int maxDepthHelper(struct TreeNode *, int /*<<< orphan*/);
int maxDepth(struct TreeNode *root) { return maxDepthHelper(root, 0); }


x86 assembly (clang, -O0):
<maxDepth>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <maxDepthHelper@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxDepth>:
xor    %esi,%esi
jmp    1030 <maxDepthHelper@plt>

LLVM IR (-O0):
%struct.TreeNode = type { i32 }
define i32 @maxDepth(%struct.TreeNode* %0) {
%2 = alloca %struct.TreeNode*
store %struct.TreeNode* %0, %struct.TreeNode** %2
%3 = load %struct.TreeNode*, %struct.TreeNode** %2
%4 = call i32 @maxDepthHelper(%struct.TreeNode* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.TreeNode = type { i32 }
define i32 @maxDepth(%struct.TreeNode* %0) {
%2 = tail call i32 @maxDepthHelper(%struct.TreeNode* %0, i32 0)
ret i32 %2
}