xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t EEPROMBlockProtectSet(uint32_t ui32Block, uint32_t ui32Protect) {
  ;
  (*((volatile uint32_t *)(0x400AF004))) = ui32Block;
  (*((volatile uint32_t *)(0x400AF030))) = ui32Protect;
  while ((*((volatile uint32_t *)(0x400AF018))) & 0x00000001) {
  }
  return ((*((volatile uint32_t *)(0x400AF018))));
}


x86 assembly (clang, -O0):
<EEPROMBlockProtectSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x400af004,%eax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%ecx
mov    $0x400af030,%eax
mov    %ecx,(%rax)
mov    $0x400af018,%eax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1136 <EEPROMBlockProtectSet+0x36>
jmp    111e <EEPROMBlockProtectSet+0x1e>
mov    $0x400af018,%eax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEPROMBlockProtectSet>:
mov    %edi,0x400af004
mov    %esi,0x400af030
xchg   %ax,%ax
mov    0x400af018,%eax
test   $0x1,%al
jne    1110 <EEPROMBlockProtectSet+0x10>
mov    0x400af018,%eax
ret

LLVM IR (-O0):
define i32 @EEPROMBlockProtectSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
store volatile i32 %5, i32* inttoptr (i64 1074458628 to i32*)
%6 = load i32, i32* %4
store volatile i32 %6, i32* inttoptr (i64 1074458672 to i32*)
br label %7
7: ; preds = %11, %2
%8 = load volatile i32, i32* inttoptr (i64 1074458648 to i32*)
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
br label %7
12: ; preds = %7
%13 = load volatile i32, i32* inttoptr (i64 1074458648 to i32*)
ret i32 %13
}

LLVM IR (-O2):
define i32 @EEPROMBlockProtectSet(i32 %0, i32 %1) {
store volatile i32 %0, i32* inttoptr (i64 1074458628 to i32*)
store volatile i32 %1, i32* inttoptr (i64 1074458672 to i32*)
br label %3
3: ; preds = %3, %2
%4 = load volatile i32, i32* inttoptr (i64 1074458648 to i32*)
%5 = and i32 %4, 1
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %3
7: ; preds = %3
%8 = load volatile i32, i32* inttoptr (i64 1074458648 to i32*)
ret i32 %8
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t fmix32(void *p) {
  uintptr_t k = ((uintptr_t)(p));
  uint32_t h = (uint32_t)k;
  h ^= h >> 16;
  h *= 0x85ebca6b;
  h ^= h >> 13;
  h *= 0xc2b2ae35;
  h ^= h >> 16;
  return h;
}


x86 assembly (clang, -O0):
<fmix32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sar    $0x10,%eax
xor    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
imul   $0x85ebca6b,-0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sar    $0xd,%eax
xor    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
imul   $0xc2b2ae35,-0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sar    $0x10,%eax
xor    -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmix32>:
mov    %edi,%eax
sar    $0x10,%eax
xor    %edi,%eax
imul   $0x85ebca6b,%eax,%eax
mov    %eax,%ecx
sar    $0xd,%ecx
xor    %eax,%ecx
imul   $0xc2b2ae35,%ecx,%ecx
mov    %ecx,%eax
sar    $0x10,%eax
xor    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @fmix32(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = ptrtoint i8* %5 to i64
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = trunc i64 %7 to i32
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = ashr i32 %9, 16
%11 = load i32, i32* %4
%12 = xor i32 %11, %10
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = mul i32 %13, -2048144789
store i32 %14, i32* %4
%15 = load i32, i32* %4
%16 = ashr i32 %15, 13
%17 = load i32, i32* %4
%18 = xor i32 %17, %16
store i32 %18, i32* %4
%19 = load i32, i32* %4
%20 = mul i32 %19, -1028477387
store i32 %20, i32* %4
%21 = load i32, i32* %4
%22 = ashr i32 %21, 16
%23 = load i32, i32* %4
%24 = xor i32 %23, %22
store i32 %24, i32* %4
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @fmix32(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = ashr i32 %3, 16
%5 = xor i32 %4, %3
%6 = mul i32 %5, -2048144789
%7 = ashr i32 %6, 13
%8 = xor i32 %7, %6
%9 = mul i32 %8, -1028477387
%10 = ashr i32 %9, 16
%11 = xor i32 %10, %9
ret i32 %11
}
/* Type definitions */
struct kdtree {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct kdtree *);
int /*<<< orphan*/ kd_clear(struct kdtree *);
void kd_free(struct kdtree *tree) {
  if (tree) {
    kd_clear(tree);
    free(tree);
  }
}


x86 assembly (clang, -O0):
<kd_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1149 <kd_free+0x29>
mov    -0x8(%rbp),%rdi
call   1040 <kd_clear@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kd_free>:
test   %rdi,%rdi
je     1137 <kd_free+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <kd_clear@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.kdtree = type { i32 }
define void @kd_free(%struct.kdtree* %0) {
%2 = alloca %struct.kdtree*
store %struct.kdtree* %0, %struct.kdtree** %2
%3 = load %struct.kdtree*, %struct.kdtree** %2
%4 = icmp ne %struct.kdtree* %3, null
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load %struct.kdtree*, %struct.kdtree** %2
%7 = call i32 @kd_clear(%struct.kdtree* %6)
%8 = load %struct.kdtree*, %struct.kdtree** %2
%9 = call i32 @free(%struct.kdtree* %8)
br label %10
10: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.kdtree = type { i32 }
define void @kd_free(%struct.kdtree* %0) {
%2 = icmp eq %struct.kdtree* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @kd_clear(%struct.kdtree* %0)
%5 = tail call i32 @free(%struct.kdtree* %0)
br label %6
6: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ I2C_SLAVE;
int ioctl(int, int /*<<< orphan*/, int);
int I2C_setSlaveAddress(int i2c_fd, int addr) {
  int ret;
  ret = ioctl(i2c_fd, I2C_SLAVE, addr);
  if (ret < 0)
    return ret;
  return 0;
}


x86 assembly (clang, -O0):
<I2C_setSlaveAddress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
mov    -0xc(%rbp),%edx
call   1030 <ioctl@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    114a <I2C_setSlaveAddress+0x3a>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1151 <I2C_setSlaveAddress+0x41>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2C_setSlaveAddress>:
push   %rax
mov    %esi,%edx
mov    0x2ece(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
mov    %eax,%ecx
sar    $0x1f,%ecx
and    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@I2C_SLAVE = global i32 0
define i32 @I2C_setSlaveAddress(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* @I2C_SLAVE
%9 = load i32, i32* %5
%10 = call i32 @ioctl(i32 %7, i32 %8, i32 %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = load i32, i32* %6
store i32 %14, i32* %3
br label %16
15: ; preds = %2
store i32 0, i32* %3
br label %16
16: ; preds = %15, %13
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@I2C_SLAVE = global i32 0
define i32 @I2C_setSlaveAddress(i32 %0, i32 %1) {
%3 = load i32, i32* @I2C_SLAVE
%4 = tail call i32 @ioctl(i32 %0, i32 %3, i32 %1)
%5 = icmp slt i32 %4, 0
%6 = select i1 %5, i32 %4, i32 0
ret i32 %6
}
int qsort_cmp_VEC_VAL(const void *x, const void *y) {
  if (*((double *)x) < *((double *)y))
    return (-1);
  else
    return (*((double *)x) > *((double *)y));
}


x86 assembly (clang, -O0):
<qsort_cmp_VEC_VAL>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x18(%rbp),%rax
movsd  (%rax),%xmm0
ucomisd %xmm1,%xmm0
jbe    1132 <qsort_cmp_VEC_VAL+0x32>
movl   $0xffffffff,-0x4(%rbp)
jmp    114d <qsort_cmp_VEC_VAL+0x4d>
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
ucomisd (%rax),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_cmp_VEC_VAL>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
xor    %ecx,%ecx
ucomisd %xmm1,%xmm0
seta   %cl
ucomisd %xmm0,%xmm1
mov    $0xffffffff,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @qsort_cmp_VEC_VAL(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to double*
%8 = load double, double* %7
%9 = load i8*, i8** %5
%10 = bitcast i8* %9 to double*
%11 = load double, double* %10
%12 = fcmp olt double %8, %11
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 -1, i32* %3
br label %23
14: ; preds = %2
%15 = load i8*, i8** %4
%16 = bitcast i8* %15 to double*
%17 = load double, double* %16
%18 = load i8*, i8** %5
%19 = bitcast i8* %18 to double*
%20 = load double, double* %19
%21 = fcmp ogt double %17, %20
%22 = zext i1 %21 to i32
store i32 %22, i32* %3
br label %23
23: ; preds = %14, %13
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @qsort_cmp_VEC_VAL(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = load double, double* %3
%5 = bitcast i8* %1 to double*
%6 = load double, double* %5
%7 = fcmp olt double %4, %6
%8 = fcmp ogt double %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
/* Variables and functions */
__attribute__((visibility("default"))) const void *
sd_bus_message_get_error(void *m) {
  return NULL;
}


x86 assembly (clang, -O0):
<sd_bus_message_get_error>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_message_get_error>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @sd_bus_message_get_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @sd_bus_message_get_error(i8* nocapture readnone %0) {
ret i8* null
}
unsigned xrop3_160_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  stk1 = D & T;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_160_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_160_0_0>:
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_160_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%8 = load i8, i8* %4
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 8
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
%13 = or i32 %10, %12
store i32 %13, i32* %6
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = and i32 %14, %15
store i32 %16, i32* %7
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @xrop3_160_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %1 to i32
ret i32 %3
}
unsigned short int f5(unsigned short int x, int y) {
  return (x << y) | (x >> (8 * 2 - y));
}


x86 assembly (clang, -O0):
<f5>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
movzwl -0x2(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
movzwl -0x2(%rbp),%edx
mov    $0x10,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f5>:
mov    %esi,%ecx
mov    %edi,%eax
rol    %cl,%ax
ret

LLVM IR (-O0):
define zeroext i16 @f5(i16 zeroext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
store i16 %0, i16* %3
store i32 %1, i32* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = load i32, i32* %4
%8 = shl i32 %6, %7
%9 = load i16, i16* %3
%10 = zext i16 %9 to i32
%11 = load i32, i32* %4
%12 = sub nsw i32 16, %11
%13 = ashr i32 %10, %12
%14 = or i32 %8, %13
%15 = trunc i32 %14 to i16
ret i16 %15
}

LLVM IR (-O2):
define zeroext i16 @f5(i16 zeroext %0, i32 %1) {
%3 = trunc i32 %1 to i16
%4 = tail call i16 @llvm.fshl.i16(i16 %0, i16 %0, i16 %3)
ret i16 %4
}
/* Variables and functions */
int /*<<< orphan*/ AT_FDCWD;
int renameat(int /*<<< orphan*/, char *, int /*<<< orphan*/, char *);
int main(void) {
  int ret;
  ret = renameat(AT_FDCWD, "test-old-file", AT_FDCWD, "test-new-file");
  return ret;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
mov    0x2ea9(%rip),%rax
mov    (%rax),%edx
lea    0xec8(%rip),%rsi
lea    0xecf(%rip),%rcx
call   1030 <renameat@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
lea    0xee7(%rip),%rcx
mov    %edi,%edx
jmp    1030 <renameat@plt>

LLVM IR (-O0):
@AT_FDCWD = global i32 0
@.str = [14 x i8] c"test-old-file\00"
@.str.1 = [14 x i8] c"test-new-file\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* @AT_FDCWD
%4 = load i32, i32* @AT_FDCWD
%5 = call i32 @renameat(i32 %3, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %4, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
store i32 %5, i32* %2
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
@AT_FDCWD = global i32 0
@.str = [14 x i8] c"test-old-file\00"
@.str.1 = [14 x i8] c"test-new-file\00"
define i32 @main() {
%1 = load i32, i32* @AT_FDCWD
%2 = tail call i32 @renameat(i32 %1, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %1, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ lua_reportbug(char *);
void gettableFB(void) { lua_reportbug("indexed expression not a table"); }


x86 assembly (clang, -O0):
<gettableFB>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <lua_reportbug@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettableFB>:
lea    0xee9(%rip),%rdi
jmp    1030 <lua_reportbug@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"indexed expression not a table\00"
define void @gettableFB() {
%1 = call i32 @lua_reportbug(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"indexed expression not a table\00"
define void @gettableFB() {
%1 = tail call i32 @lua_reportbug(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void printWelcome() { printf("Hello my old friend!"); }


x86 assembly (clang, -O0):
<printWelcome>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printWelcome>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"Hello my old friend!\00"
define void @printWelcome() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"Hello my old friend!\00"
define void @printWelcome() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}
void dlist_enum_cb(void *data, void *param) { printf("dlist data:%s\n", data); }


x86 assembly (clang, -O0):
<dlist_enum_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlist_enum_cb>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"dlist data:%s\0A\00"
define void @dlist_enum_cb(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"dlist data:%s\0A\00"
define void @dlist_enum_cb(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
__attribute__((always_)) void cpu_maps_update_done(void) {}


x86 assembly (clang, -O0):
<cpu_maps_update_done>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_maps_update_done>:
ret

LLVM IR (-O0):
define void @cpu_maps_update_done() {
ret void
}

LLVM IR (-O2):
define void @cpu_maps_update_done() {
ret void
}
int f(int *i) { return 0; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @f(i32* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ CombinePath(char *, char *);
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int Is_FileExist(char *filename) {
  char fullpath[256];
  FILE *pfile;
  CombinePath(filename, fullpath);
  if ((pfile = fopen(fullpath, "r"))) {
    fclose(pfile);
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<Is_FileExist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x110(%rbp),%rsi
call   1050 <CombinePath@plt>
lea    -0x110(%rbp),%rdi
lea    0xea3(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x118(%rbp)
cmp    $0x0,%rax
je     118b <Is_FileExist+0x5b>
mov    -0x118(%rbp),%rdi
call   1030 <fclose@plt>
movl   $0x1,-0x4(%rbp)
jmp    1192 <Is_FileExist+0x62>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Is_FileExist>:
push   %rbx
sub    $0x100,%rsp
mov    %rsp,%rbx
mov    %rbx,%rsi
call   1050 <CombinePath@plt>
lea    0xeb6(%rip),%rsi
mov    %rbx,%rdi
call   1040 <fopen@plt>
test   %rax,%rax
je     1166 <Is_FileExist+0x36>
mov    %rax,%rdi
call   1030 <fclose@plt>
mov    $0x1,%eax
jmp    1168 <Is_FileExist+0x38>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define i32 @Is_FileExist(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca [256 x i8]
%5 = alloca i32*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = getelementptr inbounds [256 x i8], [256 x i8]* %4, i64 0, i64 0
%8 = call i32 @CombinePath(i8* %6, i8* %7)
%9 = getelementptr inbounds [256 x i8], [256 x i8]* %4, i64 0, i64 0
%10 = call i32* @fopen(i8* %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %10, i32** %5
%11 = icmp ne i32* %10, null
br i1 %11, label %12, label %15
12: ; preds = %1
%13 = load i32*, i32** %5
%14 = call i32 @fclose(i32* %13)
store i32 1, i32* %2
br label %16
15: ; preds = %1
store i32 0, i32* %2
br label %16
16: ; preds = %15, %12
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define i32 @Is_FileExist(i8* %0) {
%2 = alloca [256 x i8]
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%4 = call i32 @CombinePath(i8* %0, i8* %3)
%5 = call i32* @fopen(i8* %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i32* %5, null
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = call i32 @fclose(i32* %5)
br label %9
9: ; preds = %1, %7
%10 = phi i32 [ 1, %7 ], [ 0, %1 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ MDrv_PNL_TCON_Count_Reset(unsigned char);
void MApi_PNL_TCON_Count_Reset(unsigned char bEnable) {
  MDrv_PNL_TCON_Count_Reset(bEnable);
}


x86 assembly (clang, -O0):
<MApi_PNL_TCON_Count_Reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <MDrv_PNL_TCON_Count_Reset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MApi_PNL_TCON_Count_Reset>:
jmp    1030 <MDrv_PNL_TCON_Count_Reset@plt>

LLVM IR (-O0):
define void @MApi_PNL_TCON_Count_Reset(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @MDrv_PNL_TCON_Count_Reset(i8 zeroext %3)
ret void
}

LLVM IR (-O2):
define void @MApi_PNL_TCON_Count_Reset(i8 zeroext %0) {
%2 = tail call i32 @MDrv_PNL_TCON_Count_Reset(i8 zeroext %0)
ret void
}
/* Variables and functions */
int getchar();
int /*<<< orphan*/ init_terminal_os(int);
int /*<<< orphan*/ reset_terminal_os();
int jimi_getch_term(int echo) {
  int ch;
  init_terminal_os(echo);
  ch = getchar();
  reset_terminal_os();
  return ch;
}


x86 assembly (clang, -O0):
<jimi_getch_term>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <init_terminal_os@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1050 <reset_terminal_os@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jimi_getch_term>:
push   %rbx
call   1030 <init_terminal_os@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <reset_terminal_os@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @jimi_getch_term(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @init_terminal_os(i32 %4)
%6 = call i32 (...) @getchar()
store i32 %6, i32* %3
%7 = call i32 (...) @reset_terminal_os()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @jimi_getch_term(i32 %0) {
%2 = tail call i32 @init_terminal_os(i32 %0)
%3 = tail call i32 (...) @getchar()
%4 = tail call i32 (...) @reset_terminal_os()
ret i32 %3
}
unsigned __int128 foo(unsigned long a, unsigned long b) {
  unsigned __int128 x = (unsigned __int128)a * b;
  struct {
    unsigned __int128 a : 96;
  } w;
  w.a = x;
  return w.a;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x18(%rbp)
mov    %rsi,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
mul    %rcx
mov    %rdx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x28(%rbp),%eax
mov    %eax,%edx
mov    -0x30(%rbp),%rcx
mov    -0x34(%rbp),%eax
shl    $0x20,%rax
or     %rdx,%rax
mov    %rcx,-0x40(%rbp)
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%eax
mov    %eax,%ecx
mov    -0x40(%rbp),%rax
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %rsi,%rax
mul    %rdi
mov    %edx,%edx
ret

LLVM IR (-O0):
%struct.anon = type { i96 }
define { i64, i64 } @foo(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i64
%5 = alloca i64
%6 = alloca i128
%7 = alloca %struct.anon
store i64 %0, i64* %4
store i64 %1, i64* %5
%8 = load i64, i64* %4
%9 = zext i64 %8 to i128
%10 = load i64, i64* %5
%11 = zext i64 %10 to i128
%12 = mul i128 %9, %11
store i128 %12, i128* %6
%13 = load i128, i128* %6
%14 = bitcast %struct.anon* %7 to i128*
%15 = load i128, i128* %14
%16 = and i128 %13, 79228162514264337593543950335
%17 = and i128 %15, -79228162514264337593543950336
%18 = or i128 %17, %16
store i128 %18, i128* %14
%19 = bitcast %struct.anon* %7 to i128*
%20 = load i128, i128* %19
%21 = and i128 %20, 79228162514264337593543950335
store i128 %21, i128* %3
%22 = bitcast i128* %3 to { i64, i64 }*
%23 = load { i64, i64 }, { i64, i64 }* %22
ret { i64, i64 } %23
}

LLVM IR (-O2):
define { i64, i64 } @foo(i64 %0, i64 %1) {
%3 = zext i64 %0 to i128
%4 = zext i64 %1 to i128
%5 = mul nuw i128 %4, %3
%6 = trunc i128 %5 to i64
%7 = lshr i128 %5, 64
%8 = trunc i128 %7 to i64
%9 = and i64 %8, 4294967295
%10 = insertvalue { i64, i64 } poison, i64 %6, 0
%11 = insertvalue { i64, i64 } %10, i64 %9, 1
ret { i64, i64 } %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("This is a RPM package testing program\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [39 x i8] c"This is a RPM package testing program\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [38 x i8] c"This is a RPM package testing program\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ KeySym;

/* Variables and functions */
int IsCursorKey(int /*<<< orphan*/);
int x11_extras_IsCursorKey(KeySym keysym) { return IsCursorKey(keysym); }


x86 assembly (clang, -O0):
<x11_extras_IsCursorKey>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <IsCursorKey@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x11_extras_IsCursorKey>:
jmp    1030 <IsCursorKey@plt>

LLVM IR (-O0):
define i32 @x11_extras_IsCursorKey(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @IsCursorKey(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @x11_extras_IsCursorKey(i32 %0) {
%2 = tail call i32 @IsCursorKey(i32 %0)
ret i32 %2
}
/* Type definitions */
struct passwd {
  int pw_uid;
};

/* Variables and functions */
int pwd_cmp_byuid(const void *ap, const void *bp) {
  const struct passwd *a = ap;
  const struct passwd *b = bp;
  return (a->pw_uid - b->pw_uid);
}


x86 assembly (clang, -O0):
<pwd_cmp_byuid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwd_cmp_byuid>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
%struct.passwd = type { i32 }
define i32 @pwd_cmp_byuid(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca %struct.passwd*
%6 = alloca %struct.passwd*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.passwd*
store %struct.passwd* %8, %struct.passwd** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to %struct.passwd*
store %struct.passwd* %10, %struct.passwd** %6
%11 = load %struct.passwd*, %struct.passwd** %5
%12 = getelementptr inbounds %struct.passwd, %struct.passwd* %11, i32 0, i32 0
%13 = load i32, i32* %12
%14 = load %struct.passwd*, %struct.passwd** %6
%15 = getelementptr inbounds %struct.passwd, %struct.passwd* %14, i32 0, i32 0
%16 = load i32, i32* %15
%17 = sub nsw i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @pwd_cmp_byuid(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ tremaux_exploring(int, int);
int /*<<< orphan*/ tremaux_solving(int, int);
int main_tactic() {
  int i = 0, j = 0;
  tremaux_exploring(i, j);
  tremaux_solving(7 - 1, 7 - 1);
  return 0;
}


x86 assembly (clang, -O0):
<main_tactic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <tremaux_exploring@plt>
mov    $0x6,%esi
mov    %esi,%edi
call   1030 <tremaux_solving@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_tactic>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1040 <tremaux_exploring@plt>
mov    $0x6,%edi
mov    $0x6,%esi
call   1030 <tremaux_solving@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main_tactic() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %1
%4 = load i32, i32* %2
%5 = call i32 @tremaux_exploring(i32 %3, i32 %4)
%6 = call i32 @tremaux_solving(i32 6, i32 6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main_tactic() {
%1 = tail call i32 @tremaux_exploring(i32 0, i32 0)
%2 = tail call i32 @tremaux_solving(i32 6, i32 6)
ret i32 0
}
/* Variables and functions */
float sinhf(float);
float futrts_sinh32(float x) { return sinhf(x); }


x86 assembly (clang, -O0):
<futrts_sinh32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sinhf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<futrts_sinh32>:
jmp    1030 <sinhf@plt>

LLVM IR (-O0):
define float @futrts_sinh32(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sinhf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @futrts_sinh32(float %0) {
%2 = tail call float @sinhf(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ pr_info(char *);
int xylonfb_hw_pixclk_set(int id, unsigned long pixclk_khz) {
  pr_info("Pixel clock change not supported\n");
  return 0;
}


x86 assembly (clang, -O0):
<xylonfb_hw_pixclk_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <pr_info@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xylonfb_hw_pixclk_set>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <pr_info@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [34 x i8] c"Pixel clock change not supported\0A\00"
define i32 @xylonfb_hw_pixclk_set(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = call i32 @pr_info(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [34 x i8] c"Pixel clock change not supported\0A\00"
define i32 @xylonfb_hw_pixclk_set(i32 %0, i64 %1) {
%3 = tail call i32 @pr_info(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
char **extract_values_delim(char *, char *);
char **extract_values(char *value) { return extract_values_delim(value, "%"); }


x86 assembly (clang, -O0):
<extract_values>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <extract_values_delim@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<extract_values>:
lea    0xee9(%rip),%rsi
jmp    1030 <extract_values_delim@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"%\00"
define i8** @extract_values(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8** @extract_values_delim(i8* %3, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i8** %4
}

LLVM IR (-O2):
@.str = [2 x i8] c"%\00"
define i8** @extract_values(i8* %0) {
%2 = tail call i8** @extract_values_delim(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i8** %2
}
float clampf(float a, float mn, float mx) {
  return a < mn ? mn : (a > mx ? mx : a);
}


x86 assembly (clang, -O0):
<clampf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <clampf+0x35>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
jmp    1167 <clampf+0x67>
movss  -0x4(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1153 <clampf+0x53>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
jmp    115d <clampf+0x5d>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<clampf>:
minss  %xmm0,%xmm2
cmpltss %xmm1,%xmm0
movaps %xmm0,%xmm3
andnps %xmm2,%xmm3
andps  %xmm1,%xmm0
orps   %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @clampf(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fcmp olt float %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load float, float* %5
br label %22
12: ; preds = %3
%13 = load float, float* %4
%14 = load float, float* %6
%15 = fcmp ogt float %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load float, float* %6
br label %20
18: ; preds = %12
%19 = load float, float* %4
br label %20
20: ; preds = %18, %16
%21 = phi float [ %17, %16 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %10
%23 = phi float [ %11, %10 ], [ %21, %20 ]
ret float %23
}

LLVM IR (-O2):
define float @clampf(float %0, float %1, float %2) {
%4 = fcmp olt float %0, %1
%5 = fcmp ogt float %0, %2
%6 = select i1 %5, float %2, float %0
%7 = select i1 %4, float %1, float %6
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
void progress(float f, void *param) {
  (void)param;
  printf("%.2f%%\n", f * 100);
}


x86 assembly (clang, -O0):
<progress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
movss  0xed7(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<progress>:
mulss  0xee8(%rip),%xmm0
lea    0xee5(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%.2f%%\0A\00"
define void @progress(float %0, i8* %1) {
%3 = alloca float
%4 = alloca i8*
store float %0, float* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load float, float* %3
%7 = fmul float %6, 1.000000e+02
%8 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), float %7)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%.2f%%\0A\00"
define void @progress(float %0, i8* nocapture readnone %1) {
%3 = fmul float %0, 1.000000e+02
%4 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), float %3)
ret void
}
/* Variables and functions */
size_t __compress_bound(size_t sourceLen) {
  return sourceLen + (sourceLen >> 12) + (sourceLen >> 14) + 11;
}


x86 assembly (clang, -O0):
<__compress_bound>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0xc,%rcx
add    %rcx,%rax
mov    -0x8(%rbp),%rcx
shr    $0xe,%rcx
add    %rcx,%rax
add    $0xb,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__compress_bound>:
mov    %rdi,%rax
shr    $0xc,%rax
add    %rdi,%rax
shr    $0xe,%rdi
add    %rdi,%rax
add    $0xb,%rax
ret

LLVM IR (-O0):
define i64 @__compress_bound(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* %2
%5 = lshr i64 %4, 12
%6 = add i64 %3, %5
%7 = load i64, i64* %2
%8 = lshr i64 %7, 14
%9 = add i64 %6, %8
%10 = add i64 %9, 11
ret i64 %10
}

LLVM IR (-O2):
define i64 @__compress_bound(i64 %0) {
%2 = lshr i64 %0, 12
%3 = lshr i64 %0, 14
%4 = add i64 %0, 11
%5 = add i64 %4, %2
%6 = add i64 %5, %3
ret i64 %6
}
void ILibGetDiskFreeSpace(void *i64FreeBytesToCaller, void *i64TotalBytes) {}


x86 assembly (clang, -O0):
<ILibGetDiskFreeSpace>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ILibGetDiskFreeSpace>:
ret

LLVM IR (-O0):
define void @ILibGetDiskFreeSpace(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @ILibGetDiskFreeSpace(i8* nocapture %0, i8* nocapture %1) {
ret void
}
__attribute__((always_)) void native_write_msr(unsigned int msr, unsigned low,
                                               unsigned high) {
  asm volatile("wrmsr" : : "c"(msr), "a"(low), "d"(high) : "memory");
}


x86 assembly (clang, -O0):
<native_write_msr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%edx
wrmsr
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_write_msr>:
mov    %esi,%eax
mov    %edi,%ecx
wrmsr
ret

LLVM IR (-O0):
define void @native_write_msr(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
ret void
}

LLVM IR (-O2):
define void @native_write_msr(i32 %0, i32 %1, i32 %2) {
tail call void asm sideeffect "wrmsr", "{cx},{ax},{dx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1, i32 %2)
ret void
}
int test_imm_2Eint64_highword_mem(long long *val) {
  return ((*val >> 32) & (0x2E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Eint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x20,%rdx
and    $0x2e,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Eint64_highword_mem>:
testb  $0x2e,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Eint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 32
%6 = and i64 %5, 46
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_2Eint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 197568495616
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ __u8;
typedef int __u32;

/* Variables and functions */
void put_unaligned_le32(__u32 val, void *_ptr) {
  __u8 *ptr = _ptr;
  *ptr++ = val;
  *ptr++ = val >> 8;
  *ptr++ = val >> 16;
  *ptr++ = val >> 24;
}


x86 assembly (clang, -O0):
<put_unaligned_le32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x18(%rbp)
mov    %ecx,(%rax)
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x18(%rbp)
mov    %ecx,(%rax)
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x18(%rbp)
mov    %ecx,(%rax)
mov    -0x4(%rbp),%ecx
sar    $0x18,%ecx
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x18(%rbp)
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_unaligned_le32>:
mov    %edi,(%rsi)
mov    %edi,%eax
sar    $0x8,%eax
mov    %eax,0x4(%rsi)
mov    %edi,%eax
sar    $0x10,%eax
mov    %eax,0x8(%rsi)
sar    $0x18,%edi
mov    %edi,0xc(%rsi)
ret

LLVM IR (-O0):
define void @put_unaligned_le32(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32*
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* %3
%9 = load i32*, i32** %5
%10 = getelementptr inbounds i32, i32* %9, i32 1
store i32* %10, i32** %5
store i32 %8, i32* %9
%11 = load i32, i32* %3
%12 = ashr i32 %11, 8
%13 = load i32*, i32** %5
%14 = getelementptr inbounds i32, i32* %13, i32 1
store i32* %14, i32** %5
store i32 %12, i32* %13
%15 = load i32, i32* %3
%16 = ashr i32 %15, 16
%17 = load i32*, i32** %5
%18 = getelementptr inbounds i32, i32* %17, i32 1
store i32* %18, i32** %5
store i32 %16, i32* %17
%19 = load i32, i32* %3
%20 = ashr i32 %19, 24
%21 = load i32*, i32** %5
%22 = getelementptr inbounds i32, i32* %21, i32 1
store i32* %22, i32** %5
store i32 %20, i32* %21
ret void
}

LLVM IR (-O2):
define void @put_unaligned_le32(i32 %0, i8* nocapture writeonly %1) {
%3 = bitcast i8* %1 to i32*
%4 = getelementptr inbounds i8, i8* %1, i64 4
%5 = bitcast i8* %4 to i32*
store i32 %0, i32* %3
%6 = ashr i32 %0, 8
%7 = getelementptr inbounds i8, i8* %1, i64 8
%8 = bitcast i8* %7 to i32*
store i32 %6, i32* %5
%9 = ashr i32 %0, 16
%10 = getelementptr inbounds i8, i8* %1, i64 12
%11 = bitcast i8* %10 to i32*
store i32 %9, i32* %8
%12 = ashr i32 %0, 24
store i32 %12, i32* %11
ret void
}
/* Variables and functions */
long ir1279range(long, long);
long int urand(long int min, long int max) { return ir1279range(min, max - 1); }


x86 assembly (clang, -O0):
<urand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
sub    $0x1,%rsi
call   1030 <ir1279range@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<urand>:
add    $0xffffffffffffffff,%rsi
jmp    1030 <ir1279range@plt>

LLVM IR (-O0):
define i64 @urand(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 %6, 1
%8 = call i64 @ir1279range(i64 %5, i64 %7)
ret i64 %8
}

LLVM IR (-O2):
define i64 @urand(i64 %0, i64 %1) {
%3 = add nsw i64 %1, -1
%4 = tail call i64 @ir1279range(i64 %0, i64 %3)
ret i64 %4
}
int test_imm_A4uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xA4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A4uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xa4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A4uint64_midword_reg>:
test   $0xa40000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A4uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 164
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A4uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 10747904
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char *);
void gps_is_off(char ch[]) {
  char *s = "0067007000734E0D57285DE54F5C";
  char *douhao = "002C";
  strcat(ch, s);
  strcat(ch, douhao);
}


x86 assembly (clang, -O0):
<gps_is_off>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xeef(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcat@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gps_is_off>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcat@plt>
lea    0xef6(%rip),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <strcat@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"0067007000734E0D57285DE54F5C\00"
@.str.1 = [5 x i8] c"002C\00"
define void @gps_is_off(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
store i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8** %3
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8** %4
%5 = load i8*, i8** %2
%6 = load i8*, i8** %3
%7 = call i32 @strcat(i8* %5, i8* %6)
%8 = load i8*, i8** %2
%9 = load i8*, i8** %4
%10 = call i32 @strcat(i8* %8, i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"0067007000734E0D57285DE54F5C\00"
@.str.1 = [5 x i8] c"002C\00"
define void @gps_is_off(i8* %0) {
%2 = tail call i32 @strcat(i8* %0, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @strcat(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ asink(int, int);
int two_arg_sink_caller(int x, int y) { asink(x, y); }


x86 assembly (clang, -O0):
<two_arg_sink_caller>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <asink@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<two_arg_sink_caller>:
jmp    1030 <asink@plt>

LLVM IR (-O0):
define i32 @two_arg_sink_caller(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = call i32 @asink(i32 %6, i32 %7)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @two_arg_sink_caller(i32 %0, i32 %1) {
%3 = tail call i32 @asink(i32 %0, i32 %1)
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ X509_ATTRIBUTE;

/* Variables and functions */
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_ATTRIBUTE_it;
X509_ATTRIBUTE *X509_ATTRIBUTE_new(void) {
  return (X509_ATTRIBUTE *)ASN1_item_new(&X509_ATTRIBUTE_it);
}


x86 assembly (clang, -O0):
<X509_ATTRIBUTE_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_ATTRIBUTE_new>:
mov    0x2ec1(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@X509_ATTRIBUTE_it = global i32 0
define i32* @X509_ATTRIBUTE_new() {
%1 = call i64 @ASN1_item_new(i32* @X509_ATTRIBUTE_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@X509_ATTRIBUTE_it = global i32 0
define i32* @X509_ATTRIBUTE_new() {
%1 = tail call i64 @ASN1_item_new(i32* @X509_ATTRIBUTE_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
int combine_word(unsigned x, unsigned y) { return (x & 0xFF) | (y & ~0xFF); }


x86 assembly (clang, -O0):
<combine_word>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    -0x8(%rbp),%ecx
and    $0xffffff00,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<combine_word>:
movzbl %dil,%eax
and    $0xffffff00,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @combine_word(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, 255
%7 = load i32, i32* %4
%8 = and i32 %7, -256
%9 = or i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @combine_word(i32 %0, i32 %1) {
%3 = and i32 %0, 255
%4 = and i32 %1, -256
%5 = or i32 %4, %3
ret i32 %5
}