opposite(face, dir) int face;
char dir;
{
  switch (face) {
  case '{':
    return (dir == '}');
  case '}':
    return (dir == '{');
  case 'i':
    return (dir == '!');
  case '!':
    return (dir == 'i');
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<opposite>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
sub    $0x21,%eax
je     1199 <opposite+0x99>
jmp    1121 <opposite+0x21>
mov    -0x10(%rbp),%eax
sub    $0x69,%eax
je     1182 <opposite+0x82>
jmp    1132 <opposite+0x32>
mov    -0x10(%rbp),%eax
sub    $0x7b,%eax
je     1154 <opposite+0x54>
jmp    1143 <opposite+0x43>
mov    -0x10(%rbp),%eax
sub    $0x7d,%eax
je     116b <opposite+0x6b>
jmp    11b0 <opposite+0xb0>
movsbl -0x9(%rbp),%eax
cmp    $0x7d,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    11b7 <opposite+0xb7>
movsbl -0x9(%rbp),%eax
cmp    $0x7b,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    11b7 <opposite+0xb7>
movsbl -0x9(%rbp),%eax
cmp    $0x21,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    11b7 <opposite+0xb7>
movsbl -0x9(%rbp),%eax
cmp    $0x69,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    11b7 <opposite+0xb7>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<opposite>:
xor    %eax,%eax
cmp    $0x7a,%edi
jg     1117 <opposite+0x17>
cmp    $0x21,%edi
je     1127 <opposite+0x27>
cmp    $0x69,%edi
jne    1134 <opposite+0x34>
cmp    $0x21,%sil
jmp    1131 <opposite+0x31>
cmp    $0x7d,%edi
je     112d <opposite+0x2d>
cmp    $0x7b,%edi
jne    1134 <opposite+0x34>
cmp    $0x7d,%sil
jmp    1131 <opposite+0x31>
cmp    $0x69,%sil
jmp    1131 <opposite+0x31>
cmp    $0x7b,%sil
sete   %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @opposite(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
%6 = trunc i32 %1 to i8
store i32 %0, i32* %4
store i8 %6, i8* %5
%7 = load i32, i32* %4
switch i32 %7, label %28 [
i32 123, label %8
i32 125, label %13
i32 105, label %18
i32 33, label %23
]
8: ; preds = %2
%9 = load i8, i8* %5
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 125
%12 = zext i1 %11 to i32
store i32 %12, i32* %3
br label %29
13: ; preds = %2
%14 = load i8, i8* %5
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 123
%17 = zext i1 %16 to i32
store i32 %17, i32* %3
br label %29
18: ; preds = %2
%19 = load i8, i8* %5
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 33
%22 = zext i1 %21 to i32
store i32 %22, i32* %3
br label %29
23: ; preds = %2
%24 = load i8, i8* %5
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 105
%27 = zext i1 %26 to i32
store i32 %27, i32* %3
br label %29
28: ; preds = %2
store i32 0, i32* %3
br label %29
29: ; preds = %28, %23, %18, %13, %8
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @opposite(i32 %0, i32 %1) {
switch i32 %0, label %15 [
i32 123, label %3
i32 125, label %6
i32 105, label %9
i32 33, label %12
]
3: ; preds = %2
%4 = and i32 %1, 255
%5 = icmp eq i32 %4, 125
br label %15
6: ; preds = %2
%7 = and i32 %1, 255
%8 = icmp eq i32 %7, 123
br label %15
9: ; preds = %2
%10 = and i32 %1, 255
%11 = icmp eq i32 %10, 33
br label %15
12: ; preds = %2
%13 = and i32 %1, 255
%14 = icmp eq i32 %13, 105
br label %15
15: ; preds = %2, %12, %9, %6, %3
%16 = phi i1 [ %14, %12 ], [ %11, %9 ], [ %8, %6 ], [ %5, %3 ], [ false, %2 ]
%17 = zext i1 %16 to i32
ret i32 %17
}