#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ native_cpuid(unsigned int *, unsigned int *, unsigned int *,
                                unsigned int *);
int /*<<< orphan*/ printf(char *, ...);
int main(int argc, char **argv) {
  unsigned eax, ebx, ecx, edx;
  eax = 1;
  native_cpuid(&eax, &ebx, &ecx, &edx);
  printf("eax: %x ebx: %x ecx: %x edx: %x\n", eax, ebx, ecx, edx);
  printf("stepping %d\n", eax & 0xF);
  printf("model %d\n", (eax >> 4) & 0xF);
  printf("family %d\n", (eax >> 8) & 0xF);
  printf("processor type %d\n", (eax >> 12) & 0x3);
  printf("extended model %d\n", (eax >> 16) & 0xF);
  printf("extended family %d\n", (eax >> 20) & 0xFF);
  printf("smx: %d\n", (ecx >> 6) & 1);
  printf("\nExtended feature bits (EAX=07H, ECX=0H)\n");
  eax = 7;
  ecx = 0;
  native_cpuid(&eax, &ebx, &ecx, &edx);
  printf("eax: %x ebx: %x ecx: %x edx: %x\n", eax, ebx, ecx, edx);
  printf("sgx available: %d\n", (ebx >> 2) & 0x1);
  printf("sgx launch control: %d\n", (ecx >> 30) & 0x01);
  printf("\nCPUID Leaf 12H, Sub-Leaf 0 of Intel SGX Capabilities "
         "(EAX=12H,ECX=0)\n");
  eax = 0x12;
  ecx = 0;
  native_cpuid(&eax, &ebx, &ecx, &edx);
  printf("eax: %x ebx: %x ecx: %x edx: %x\n", eax, ebx, ecx, edx);
  printf("sgx 1 supported: %d\n", eax & 0x1);
  printf("sgx 2 supported: %d\n", (eax >> 1) & 0x1);
  printf("MaxEnclaveSize_Not64: %x\n", edx & 0xFF);
  printf("MaxEnclaveSize_64: %x\n", (edx >> 8) & 0xFF);
  printf("\nCPUID Leaf 12H, Sub-Leaf 1 of Intel SGX Capabilities "
         "(EAX=12H,ECX=1)\n");
  eax = 0x12;
  ecx = 1;
  native_cpuid(&eax, &ebx, &ecx, &edx);
  printf("eax: %x ebx: %x ecx: %x edx: %x\n", eax, ebx, ecx, edx);
  int i;
  for (i = 2; i < 10; i++) {
    printf("\nCPUID Leaf 12H, Sub-Leaf %d of Intel SGX Capabilities "
           "(EAX=12H,ECX=%d)\n",
           i, i);
    eax = 0x12;
    ecx = i;
    native_cpuid(&eax, &ebx, &ecx, &edx);
    printf("eax: %x ebx: %x ecx: %x edx: %x\n", eax, ebx, ecx, edx);
    printf("size of EPC section in Processor Reserved Memory, %d M\n",
           (eax & 0xF) == 1 ? (((edx & 0xFFFFF) << 12) + (ecx >> 20)) : 0);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
lea    -0x14(%rbp),%rdi
lea    -0x18(%rbp),%rsi
lea    -0x1c(%rbp),%rdx
lea    -0x20(%rbp),%rcx
call   1040 <native_cpuid@plt>
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
lea    0xe9a(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%esi
and    $0xf,%esi
lea    0xea7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%esi
shr    $0x4,%esi
and    $0xf,%esi
lea    0xeb9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%esi
shr    $0x8,%esi
and    $0xf,%esi
lea    0xeb5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%esi
shr    $0xc,%esi
and    $0x3,%esi
lea    0xe6f(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%esi
shr    $0x10,%esi
and    $0xf,%esi
lea    0xe6b(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%esi
shr    $0x14,%esi
and    $0xff,%esi
lea    0xe64(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x1c(%rbp),%esi
shr    $0x6,%esi
and    $0x1,%esi
lea    0xe61(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xe5c(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movl   $0x7,-0x14(%rbp)
movl   $0x0,-0x1c(%rbp)
lea    -0x14(%rbp),%rdi
lea    -0x18(%rbp),%rsi
lea    -0x1c(%rbp),%rdx
lea    -0x20(%rbp),%rcx
call   1040 <native_cpuid@plt>
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
lea    0xdad(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x18(%rbp),%esi
shr    $0x2,%esi
and    $0x1,%esi
lea    0xe31(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x1c(%rbp),%esi
shr    $0x1e,%esi
and    $0x1,%esi
lea    0xe2d(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xe37(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movl   $0x12,-0x14(%rbp)
movl   $0x0,-0x1c(%rbp)
lea    -0x14(%rbp),%rdi
lea    -0x18(%rbp),%rsi
lea    -0x1c(%rbp),%rdx
lea    -0x20(%rbp),%rcx
call   1040 <native_cpuid@plt>
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
lea    0xd33(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%esi
and    $0x1,%esi
lea    0xe2c(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%esi
shr    $0x1,%esi
and    $0x1,%esi
lea    0xe2a(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x20(%rbp),%esi
and    $0xff,%esi
lea    0xe28(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x20(%rbp),%esi
shr    $0x8,%esi
and    $0xff,%esi
lea    0xe28(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xe31(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movl   $0x12,-0x14(%rbp)
movl   $0x1,-0x1c(%rbp)
lea    -0x14(%rbp),%rdi
lea    -0x18(%rbp),%rsi
lea    -0x1c(%rbp),%rdx
lea    -0x20(%rbp),%rcx
call   1040 <native_cpuid@plt>
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
lea    0xc8b(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movl   $0x2,-0x24(%rbp)
cmpl   $0xa,-0x24(%rbp)
jge    1431 <main+0x311>
mov    -0x24(%rbp),%esi
mov    -0x24(%rbp),%edx
lea    0xe15(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movl   $0x12,-0x14(%rbp)
mov    -0x24(%rbp),%eax
mov    %eax,-0x1c(%rbp)
lea    -0x14(%rbp),%rdi
lea    -0x18(%rbp),%rsi
lea    -0x1c(%rbp),%rdx
lea    -0x20(%rbp),%rcx
call   1040 <native_cpuid@plt>
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
lea    0xc29(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
and    $0xf,%eax
cmp    $0x1,%eax
jne    1408 <main+0x2e8>
mov    -0x20(%rbp),%eax
and    $0xfffff,%eax
shl    $0xc,%eax
mov    -0x1c(%rbp),%ecx
shr    $0x14,%ecx
add    %ecx,%eax
mov    %eax,-0x28(%rbp)
jmp    1412 <main+0x2f2>
xor    %eax,%eax
mov    %eax,-0x28(%rbp)
jmp    1412 <main+0x2f2>
mov    -0x28(%rbp),%esi
lea    0xddc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1383 <main+0x263>
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0x18,%rsp
movl   $0x1,0x8(%rsp)
lea    0x8(%rsp),%rbx
lea    0x14(%rsp),%r14
lea    0xc(%rsp),%r15
lea    0x10(%rsp),%r13
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
mov    %r13,%rcx
call   1050 <native_cpuid@plt>
mov    0x8(%rsp),%esi
mov    0x14(%rsp),%edx
mov    0xc(%rsp),%ecx
mov    0x10(%rsp),%r8d
lea    0xe7d(%rip),%rbp
mov    %rbp,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0x8(%rsp),%esi
and    $0xf,%esi
lea    0xe86(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0x8(%rsp),%esi
shr    $0x4,%esi
and    $0xf,%esi
lea    0xe97(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0x8(%rsp),%esi
shr    $0x8,%esi
and    $0xf,%esi
lea    0xe92(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0x8(%rsp),%esi
shr    $0xc,%esi
and    $0x3,%esi
lea    0xe4b(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
movzwl 0xa(%rsp),%esi
and    $0xf,%esi
lea    0xe48(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0x8(%rsp),%eax
shr    $0x14,%eax
movzbl %al,%esi
lea    0xe43(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0xc(%rsp),%esi
shr    $0x6,%esi
and    $0x1,%esi
lea    0xe3f(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xf41(%rip),%rdi
call   1030 <puts@plt>
movl   $0x7,0x8(%rsp)
movl   $0x0,0xc(%rsp)
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
mov    %r13,%rcx
call   1050 <native_cpuid@plt>
mov    0x8(%rsp),%esi
mov    0x14(%rsp),%edx
mov    0xc(%rsp),%ecx
mov    0x10(%rsp),%r8d
mov    %rbp,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0x14(%rsp),%esi
shr    $0x2,%esi
and    $0x1,%esi
lea    0xde8(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0xc(%rsp),%esi
shr    $0x1e,%esi
and    $0x1,%esi
lea    0xde3(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xef2(%rip),%rdi
call   1030 <puts@plt>
movl   $0x12,0x8(%rsp)
movl   $0x0,0xc(%rsp)
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
mov    %r13,%rcx
call   1050 <native_cpuid@plt>
mov    0x8(%rsp),%esi
mov    0x14(%rsp),%edx
mov    0xc(%rsp),%ecx
mov    0x10(%rsp),%r8d
mov    %rbp,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0x8(%rsp),%esi
and    $0x1,%esi
lea    0xd9e(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0x8(%rsp),%esi
shr    %esi
and    $0x1,%esi
lea    0xd9c(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
movzbl 0x10(%rsp),%esi
lea    0xd9e(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
movzbl 0x11(%rsp),%esi
lea    0xda5(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xe9e(%rip),%rdi
call   1030 <puts@plt>
movl   $0x12,0x8(%rsp)
movl   $0x1,0xc(%rsp)
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rbx
mov    %r15,%rdx
mov    %r13,%r12
mov    %r13,%rcx
call   1050 <native_cpuid@plt>
mov    0x8(%rsp),%esi
mov    0x14(%rsp),%edx
mov    0xc(%rsp),%ecx
mov    0x10(%rsp),%r8d
mov    %rbp,%r13
mov    %rbp,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    $0x2,%ebp
lea    0xd58(%rip),%r14
lea    0xd9a(%rip),%r15
jmp    13c2 <main+0x292>
nopl   0x0(%rax,%rax,1)
mov    %r15,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%ebp
cmp    $0xa,%ebp
je     142b <main+0x2fb>
mov    %r14,%rdi
mov    %ebp,%esi
mov    %ebp,%edx
xor    %eax,%eax
call   1040 <printf@plt>
movl   $0x12,0x8(%rsp)
mov    %ebp,0xc(%rsp)
lea    0x8(%rsp),%rdi
lea    0x14(%rsp),%rsi
mov    %rbx,%rdx
mov    %r12,%rcx
call   1050 <native_cpuid@plt>
mov    0x8(%rsp),%esi
mov    0x14(%rsp),%edx
mov    0xc(%rsp),%ecx
mov    0x10(%rsp),%r8d
mov    %r13,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
mov    0x8(%rsp),%eax
and    $0xf,%eax
mov    $0x0,%esi
cmp    $0x1,%eax
jne    13b0 <main+0x280>
mov    0x10(%rsp),%eax
mov    0xc(%rsp),%esi
shrd   $0x14,%eax,%esi
jmp    13b0 <main+0x280>
xor    %eax,%eax
add    $0x18,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [33 x i8] c"eax: %x ebx: %x ecx: %x edx: %x\0A\00"
@.str.1 = [13 x i8] c"stepping %d\0A\00"
@.str.2 = [10 x i8] c"model %d\0A\00"
@.str.3 = [11 x i8] c"family %d\0A\00"
@.str.4 = [19 x i8] c"processor type %d\0A\00"
@.str.5 = [19 x i8] c"extended model %d\0A\00"
@.str.6 = [20 x i8] c"extended family %d\0A\00"
@.str.7 = [9 x i8] c"smx: %d\0A\00"
@.str.8 = [42 x i8] c"\0AExtended feature bits (EAX=07H, ECX=0H)\0A\00"
@.str.9 = [19 x i8] c"sgx available: %d\0A\00"
@.str.10 = [24 x i8] c"sgx launch control: %d\0A\00"
@.str.11 = [71 x i8] c"\0ACPUID Leaf 12H, Sub-Leaf 0 of Intel SGX Capabilities (EAX=12H,ECX=0)\0A\00"
@.str.12 = [21 x i8] c"sgx 1 supported: %d\0A\00"
@.str.13 = [21 x i8] c"sgx 2 supported: %d\0A\00"
@.str.14 = [26 x i8] c"MaxEnclaveSize_Not64: %x\0A\00"
@.str.15 = [23 x i8] c"MaxEnclaveSize_64: %x\0A\00"
@.str.16 = [71 x i8] c"\0ACPUID Leaf 12H, Sub-Leaf 1 of Intel SGX Capabilities (EAX=12H,ECX=1)\0A\00"
@.str.17 = [73 x i8] c"\0ACPUID Leaf 12H, Sub-Leaf %d of Intel SGX Capabilities (EAX=12H,ECX=%d)\0A\00"
@.str.18 = [56 x i8] c"size of EPC section in Processor Reserved Memory, %d M\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
%11 = call i32 @native_cpuid(i32* %6, i32* %7, i32* %8, i32* %9)
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %12, i32 %13, i32 %14, i32 %15)
%17 = load i32, i32* %6
%18 = and i32 %17, 15
%19 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i32 %18)
%20 = load i32, i32* %6
%21 = lshr i32 %20, 4
%22 = and i32 %21, 15
%23 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), i32 %22)
%24 = load i32, i32* %6
%25 = lshr i32 %24, 8
%26 = and i32 %25, 15
%27 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.3, i64 0, i64 0), i32 %26)
%28 = load i32, i32* %6
%29 = lshr i32 %28, 12
%30 = and i32 %29, 3
%31 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.4, i64 0, i64 0), i32 %30)
%32 = load i32, i32* %6
%33 = lshr i32 %32, 16
%34 = and i32 %33, 15
%35 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i32 %34)
%36 = load i32, i32* %6
%37 = lshr i32 %36, 20
%38 = and i32 %37, 255
%39 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.6, i64 0, i64 0), i32 %38)
%40 = load i32, i32* %8
%41 = lshr i32 %40, 6
%42 = and i32 %41, 1
%43 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.7, i64 0, i64 0), i32 %42)
%44 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str.8, i64 0, i64 0))
store i32 7, i32* %6
store i32 0, i32* %8
%45 = call i32 @native_cpuid(i32* %6, i32* %7, i32* %8, i32* %9)
%46 = load i32, i32* %6
%47 = load i32, i32* %7
%48 = load i32, i32* %8
%49 = load i32, i32* %9
%50 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %46, i32 %47, i32 %48, i32 %49)
%51 = load i32, i32* %7
%52 = lshr i32 %51, 2
%53 = and i32 %52, 1
%54 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.9, i64 0, i64 0), i32 %53)
%55 = load i32, i32* %8
%56 = lshr i32 %55, 30
%57 = and i32 %56, 1
%58 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.10, i64 0, i64 0), i32 %57)
%59 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str.11, i64 0, i64 0))
store i32 18, i32* %6
store i32 0, i32* %8
%60 = call i32 @native_cpuid(i32* %6, i32* %7, i32* %8, i32* %9)
%61 = load i32, i32* %6
%62 = load i32, i32* %7
%63 = load i32, i32* %8
%64 = load i32, i32* %9
%65 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %61, i32 %62, i32 %63, i32 %64)
%66 = load i32, i32* %6
%67 = and i32 %66, 1
%68 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.12, i64 0, i64 0), i32 %67)
%69 = load i32, i32* %6
%70 = lshr i32 %69, 1
%71 = and i32 %70, 1
%72 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.13, i64 0, i64 0), i32 %71)
%73 = load i32, i32* %9
%74 = and i32 %73, 255
%75 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.14, i64 0, i64 0), i32 %74)
%76 = load i32, i32* %9
%77 = lshr i32 %76, 8
%78 = and i32 %77, 255
%79 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.15, i64 0, i64 0), i32 %78)
%80 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str.16, i64 0, i64 0))
store i32 18, i32* %6
store i32 1, i32* %8
%81 = call i32 @native_cpuid(i32* %6, i32* %7, i32* %8, i32* %9)
%82 = load i32, i32* %6
%83 = load i32, i32* %7
%84 = load i32, i32* %8
%85 = load i32, i32* %9
%86 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %82, i32 %83, i32 %84, i32 %85)
store i32 2, i32* %10
br label %87
87: ; preds = %115, %2
%88 = load i32, i32* %10
%89 = icmp slt i32 %88, 10
br i1 %89, label %90, label %118
90: ; preds = %87
%91 = load i32, i32* %10
%92 = load i32, i32* %10
%93 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str.17, i64 0, i64 0), i32 %91, i32 %92)
store i32 18, i32* %6
%94 = load i32, i32* %10
store i32 %94, i32* %8
%95 = call i32 @native_cpuid(i32* %6, i32* %7, i32* %8, i32* %9)
%96 = load i32, i32* %6
%97 = load i32, i32* %7
%98 = load i32, i32* %8
%99 = load i32, i32* %9
%100 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %96, i32 %97, i32 %98, i32 %99)
%101 = load i32, i32* %6
%102 = and i32 %101, 15
%103 = icmp eq i32 %102, 1
br i1 %103, label %104, label %111
104: ; preds = %90
%105 = load i32, i32* %9
%106 = and i32 %105, 1048575
%107 = shl i32 %106, 12
%108 = load i32, i32* %8
%109 = lshr i32 %108, 20
%110 = add i32 %107, %109
br label %112
111: ; preds = %90
br label %112
112: ; preds = %111, %104
%113 = phi i32 [ %110, %104 ], [ 0, %111 ]
%114 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str.18, i64 0, i64 0), i32 %113)
br label %115
115: ; preds = %112
%116 = load i32, i32* %10
%117 = add nsw i32 %116, 1
store i32 %117, i32* %10
br label %87
118: ; preds = %87
%119 = load i32, i32* %3
ret i32 %119
}

LLVM IR (-O2):
@.str = [33 x i8] c"eax: %x ebx: %x ecx: %x edx: %x\0A\00"
@.str.1 = [13 x i8] c"stepping %d\0A\00"
@.str.2 = [10 x i8] c"model %d\0A\00"
@.str.3 = [11 x i8] c"family %d\0A\00"
@.str.4 = [19 x i8] c"processor type %d\0A\00"
@.str.5 = [19 x i8] c"extended model %d\0A\00"
@.str.6 = [20 x i8] c"extended family %d\0A\00"
@.str.7 = [9 x i8] c"smx: %d\0A\00"
@.str.9 = [19 x i8] c"sgx available: %d\0A\00"
@.str.10 = [24 x i8] c"sgx launch control: %d\0A\00"
@.str.12 = [21 x i8] c"sgx 1 supported: %d\0A\00"
@.str.13 = [21 x i8] c"sgx 2 supported: %d\0A\00"
@.str.14 = [26 x i8] c"MaxEnclaveSize_Not64: %x\0A\00"
@.str.15 = [23 x i8] c"MaxEnclaveSize_64: %x\0A\00"
@.str.17 = [73 x i8] c"\0ACPUID Leaf 12H, Sub-Leaf %d of Intel SGX Capabilities (EAX=12H,ECX=%d)\0A\00"
@.str.18 = [56 x i8] c"size of EPC section in Processor Reserved Memory, %d M\0A\00"
@str = [41 x i8] c"\0AExtended feature bits (EAX=07H, ECX=0H)\00"
@str.19 = [70 x i8] c"\0ACPUID Leaf 12H, Sub-Leaf 0 of Intel SGX Capabilities (EAX=12H,ECX=0)\00"
@str.20 = [70 x i8] c"\0ACPUID Leaf 12H, Sub-Leaf 1 of Intel SGX Capabilities (EAX=12H,ECX=1)\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = bitcast i32* %5 to i8*
%10 = bitcast i32* %6 to i8*
store i32 1, i32* %3
%11 = call i32 @native_cpuid(i32* %3, i32* %4, i32* %5, i32* %6)
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %12, i32 %13, i32 %14, i32 %15)
%17 = load i32, i32* %3
%18 = and i32 %17, 15
%19 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i32 %18)
%20 = load i32, i32* %3
%21 = lshr i32 %20, 4
%22 = and i32 %21, 15
%23 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str.2, i64 0, i64 0), i32 %22)
%24 = load i32, i32* %3
%25 = lshr i32 %24, 8
%26 = and i32 %25, 15
%27 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str.3, i64 0, i64 0), i32 %26)
%28 = load i32, i32* %3
%29 = lshr i32 %28, 12
%30 = and i32 %29, 3
%31 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str.4, i64 0, i64 0), i32 %30)
%32 = load i32, i32* %3
%33 = lshr i32 %32, 16
%34 = and i32 %33, 15
%35 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str.5, i64 0, i64 0), i32 %34)
%36 = load i32, i32* %3
%37 = lshr i32 %36, 20
%38 = and i32 %37, 255
%39 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str.6, i64 0, i64 0), i32 %38)
%40 = load i32, i32* %5
%41 = lshr i32 %40, 6
%42 = and i32 %41, 1
%43 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str.7, i64 0, i64 0), i32 %42)
%44 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @str, i64 0, i64 0))
store i32 7, i32* %3
store i32 0, i32* %5
%45 = call i32 @native_cpuid(i32* %3, i32* %4, i32* %5, i32* %6)
%46 = load i32, i32* %3
%47 = load i32, i32* %4
%48 = load i32, i32* %5
%49 = load i32, i32* %6
%50 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %46, i32 %47, i32 %48, i32 %49)
%51 = load i32, i32* %4
%52 = lshr i32 %51, 2
%53 = and i32 %52, 1
%54 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str.9, i64 0, i64 0), i32 %53)
%55 = load i32, i32* %5
%56 = lshr i32 %55, 30
%57 = and i32 %56, 1
%58 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str.10, i64 0, i64 0), i32 %57)
%59 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([70 x i8], [70 x i8]* @str.19, i64 0, i64 0))
store i32 18, i32* %3
store i32 0, i32* %5
%60 = call i32 @native_cpuid(i32* %3, i32* %4, i32* %5, i32* %6)
%61 = load i32, i32* %3
%62 = load i32, i32* %4
%63 = load i32, i32* %5
%64 = load i32, i32* %6
%65 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %61, i32 %62, i32 %63, i32 %64)
%66 = load i32, i32* %3
%67 = and i32 %66, 1
%68 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str.12, i64 0, i64 0), i32 %67)
%69 = load i32, i32* %3
%70 = lshr i32 %69, 1
%71 = and i32 %70, 1
%72 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str.13, i64 0, i64 0), i32 %71)
%73 = load i32, i32* %6
%74 = and i32 %73, 255
%75 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.14, i64 0, i64 0), i32 %74)
%76 = load i32, i32* %6
%77 = lshr i32 %76, 8
%78 = and i32 %77, 255
%79 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str.15, i64 0, i64 0), i32 %78)
%80 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([70 x i8], [70 x i8]* @str.20, i64 0, i64 0))
store i32 18, i32* %3
store i32 1, i32* %5
%81 = call i32 @native_cpuid(i32* %3, i32* %4, i32* %5, i32* %6)
%82 = load i32, i32* %3
%83 = load i32, i32* %4
%84 = load i32, i32* %5
%85 = load i32, i32* %6
%86 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %82, i32 %83, i32 %84, i32 %85)
br label %87
87: ; preds = %2, %103
%88 = phi i32 [ 2, %2 ], [ %106, %103 ]
%89 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([73 x i8], [73 x i8]* @.str.17, i64 0, i64 0), i32 %88, i32 %88)
store i32 18, i32* %3
store i32 %88, i32* %5
%90 = call i32 @native_cpuid(i32* %3, i32* %4, i32* %5, i32* %6)
%91 = load i32, i32* %3
%92 = load i32, i32* %4
%93 = load i32, i32* %5
%94 = load i32, i32* %6
%95 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %91, i32 %92, i32 %93, i32 %94)
%96 = load i32, i32* %3
%97 = and i32 %96, 15
%98 = icmp eq i32 %97, 1
br i1 %98, label %99, label %103
99: ; preds = %87
%100 = load i32, i32* %6
%101 = load i32, i32* %5
%102 = call i32 @llvm.fshl.i32(i32 %100, i32 %101, i32 12)
br label %103
103: ; preds = %87, %99
%104 = phi i32 [ %102, %99 ], [ 0, %87 ]
%105 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([56 x i8], [56 x i8]* @.str.18, i64 0, i64 0), i32 %104)
%106 = add nuw nsw i32 %88, 1
%107 = icmp eq i32 %106, 10
br i1 %107, label %108, label %87
108: ; preds = %103
ret i32 0
}