int YUV420_to_RGB(unsigned char *y_input, unsigned char *u_input,
                  unsigned char *v_input, unsigned char *rgb_output, int width,
                  int height) {
  int R, G, B;
  int Y, U, V;
  int row;
  int col;
  unsigned char *u_inputA;
  unsigned char *v_inputA;
  unsigned char *u_inputB;
  unsigned char *v_inputB;
  for (row = 0; row < height; row = row + 2) {
    u_inputA = u_input;
    v_inputA = v_input;
    for (col = 0; col < width; col = col + 2) {
      Y = (int)(*(y_input++));
      U = (int)(*(u_input)) - 128;
      V = (int)(*(v_input)) - 128;
      R = ((298 * Y + 409 * V + 128) >> 8);
      G = ((298 * Y - 100 * U - 208 * V + 128) >> 8);
      B = ((298 * Y + 516 * U + 128) >> 8);
      *(rgb_output++) = (unsigned char)((R < 0) ? 0 : ((R > 255) ? 255 : R));
      *(rgb_output++) = (unsigned char)((G < 0) ? 0 : ((G > 255) ? 255 : G));
      *(rgb_output++) = (unsigned char)((B < 0) ? 0 : ((B > 255) ? 255 : B));
      if (!(col < width))
        break;
      Y = (int)(*(y_input++));
      U = (U + (int)(*(u_input++)) - 128) >> 1;
      V = (V + (int)(*(v_input++)) - 128) >> 1;
      R = ((298 * Y + 409 * V + 128) >> 8);
      G = ((298 * Y - 100 * U - 208 * V + 128) >> 8);
      B = ((298 * Y + 516 * U + 128) >> 8);
      *(rgb_output++) = (unsigned char)((R < 0) ? 0 : ((R > 255) ? 255 : R));
      *(rgb_output++) = (unsigned char)((G < 0) ? 0 : ((G > 255) ? 255 : G));
      *(rgb_output++) = (unsigned char)((B < 0) ? 0 : ((B > 255) ? 255 : B));
    }
    if (!(row < height))
      break;
    u_inputB = u_input;
    v_inputB = v_input;
    for (col = 0; col < width; col = col + 2) {
      Y = (int)(*(y_input++));
      U = ((int)(*(u_inputA)) - 128 + (int)(*(u_inputB)) - 128) >> 1;
      V = ((int)(*(v_inputA)) - 128 + (int)(*(v_inputB)) - 128) >> 1;
      R = ((298 * Y + 409 * V + 128) >> 8);
      G = ((298 * Y - 100 * U - 208 * V + 128) >> 8);
      B = ((298 * Y + 516 * U + 128) >> 8);
      *(rgb_output++) = (unsigned char)((R < 0) ? 0 : ((R > 255) ? 255 : R));
      *(rgb_output++) = (unsigned char)((G < 0) ? 0 : ((G > 255) ? 255 : G));
      *(rgb_output++) = (unsigned char)((B < 0) ? 0 : ((B > 255) ? 255 : B));
      if (!(col < width))
        break;
      Y = (int)(*(y_input++));
      U = (U +
           (((int)(*(u_inputA++)) - 128 + (int)(*(u_inputB++)) - 128) >> 1)) >>
          1;
      V = (V +
           (((int)(*(v_inputA++)) - 128 + (int)(*(v_inputB++)) - 128) >> 1)) >>
          1;
      R = ((298 * Y + 409 * V + 128) >> 8);
      G = ((298 * Y - 100 * U - 208 * V + 128) >> 8);
      B = ((298 * Y + 516 * U + 128) >> 8);
      *(rgb_output++) = (unsigned char)((R < 0) ? 0 : ((R > 255) ? 255 : R));
      *(rgb_output++) = (unsigned char)((G < 0) ? 0 : ((G > 255) ? 255 : G));
      *(rgb_output++) = (unsigned char)((B < 0) ? 0 : ((B > 255) ? 255 : B));
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<YUV420_to_RGB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x48,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    %r9d,-0x28(%rbp)
movl   $0x0,-0x44(%rbp)
mov    -0x44(%rbp),%eax
cmp    -0x28(%rbp),%eax
jge    190f <YUV420_to_RGB+0x80f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x50(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x58(%rbp)
movl   $0x0,-0x48(%rbp)
mov    -0x48(%rbp),%eax
cmp    -0x24(%rbp),%eax
jge    14c5 <YUV420_to_RGB+0x3c5>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
mov    %eax,-0x38(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
sub    $0x80,%eax
mov    %eax,-0x3c(%rbp)
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
sub    $0x80,%eax
mov    %eax,-0x40(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x199,-0x40(%rbp),%ecx
add    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x2c(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x64,-0x3c(%rbp),%ecx
sub    %ecx,%eax
imul   $0xd0,-0x40(%rbp),%ecx
sub    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x30(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x204,-0x3c(%rbp),%ecx
add    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x34(%rbp)
cmpl   $0x0,-0x2c(%rbp)
jge    11f4 <YUV420_to_RGB+0xf4>
xor    %eax,%eax
mov    %eax,-0x6c(%rbp)
jmp    121a <YUV420_to_RGB+0x11a>
cmpl   $0xff,-0x2c(%rbp)
jle    120e <YUV420_to_RGB+0x10e>
mov    $0xff,%eax
mov    %eax,-0x70(%rbp)
jmp    1214 <YUV420_to_RGB+0x114>
mov    -0x2c(%rbp),%eax
mov    %eax,-0x70(%rbp)
mov    -0x70(%rbp),%eax
mov    %eax,-0x6c(%rbp)
mov    -0x6c(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
cmpl   $0x0,-0x30(%rbp)
jge    1244 <YUV420_to_RGB+0x144>
xor    %eax,%eax
mov    %eax,-0x74(%rbp)
jmp    126a <YUV420_to_RGB+0x16a>
cmpl   $0xff,-0x30(%rbp)
jle    125e <YUV420_to_RGB+0x15e>
mov    $0xff,%eax
mov    %eax,-0x78(%rbp)
jmp    1264 <YUV420_to_RGB+0x164>
mov    -0x30(%rbp),%eax
mov    %eax,-0x78(%rbp)
mov    -0x78(%rbp),%eax
mov    %eax,-0x74(%rbp)
mov    -0x74(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
cmpl   $0x0,-0x34(%rbp)
jge    1294 <YUV420_to_RGB+0x194>
xor    %eax,%eax
mov    %eax,-0x7c(%rbp)
jmp    12ba <YUV420_to_RGB+0x1ba>
cmpl   $0xff,-0x34(%rbp)
jle    12ae <YUV420_to_RGB+0x1ae>
mov    $0xff,%eax
mov    %eax,-0x80(%rbp)
jmp    12b4 <YUV420_to_RGB+0x1b4>
mov    -0x34(%rbp),%eax
mov    %eax,-0x80(%rbp)
mov    -0x80(%rbp),%eax
mov    %eax,-0x7c(%rbp)
mov    -0x7c(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
mov    -0x48(%rbp),%eax
cmp    -0x24(%rbp),%eax
jl     12e1 <YUV420_to_RGB+0x1e1>
jmp    14c5 <YUV420_to_RGB+0x3c5>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
mov    %eax,-0x38(%rbp)
mov    -0x3c(%rbp),%eax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
movzbl (%rcx),%ecx
add    %ecx,%eax
sub    $0x80,%eax
sar    $0x1,%eax
mov    %eax,-0x3c(%rbp)
mov    -0x40(%rbp),%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movzbl (%rcx),%ecx
add    %ecx,%eax
sub    $0x80,%eax
sar    $0x1,%eax
mov    %eax,-0x40(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x199,-0x40(%rbp),%ecx
add    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x2c(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x64,-0x3c(%rbp),%ecx
sub    %ecx,%eax
imul   $0xd0,-0x40(%rbp),%ecx
sub    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x30(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x204,-0x3c(%rbp),%ecx
add    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x34(%rbp)
cmpl   $0x0,-0x2c(%rbp)
jge    13a8 <YUV420_to_RGB+0x2a8>
xor    %eax,%eax
mov    %eax,-0x84(%rbp)
jmp    13da <YUV420_to_RGB+0x2da>
cmpl   $0xff,-0x2c(%rbp)
jle    13c5 <YUV420_to_RGB+0x2c5>
mov    $0xff,%eax
mov    %eax,-0x88(%rbp)
jmp    13ce <YUV420_to_RGB+0x2ce>
mov    -0x2c(%rbp),%eax
mov    %eax,-0x88(%rbp)
mov    -0x88(%rbp),%eax
mov    %eax,-0x84(%rbp)
mov    -0x84(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
cmpl   $0x0,-0x30(%rbp)
jge    140a <YUV420_to_RGB+0x30a>
xor    %eax,%eax
mov    %eax,-0x8c(%rbp)
jmp    143c <YUV420_to_RGB+0x33c>
cmpl   $0xff,-0x30(%rbp)
jle    1427 <YUV420_to_RGB+0x327>
mov    $0xff,%eax
mov    %eax,-0x90(%rbp)
jmp    1430 <YUV420_to_RGB+0x330>
mov    -0x30(%rbp),%eax
mov    %eax,-0x90(%rbp)
mov    -0x90(%rbp),%eax
mov    %eax,-0x8c(%rbp)
mov    -0x8c(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
cmpl   $0x0,-0x34(%rbp)
jge    146c <YUV420_to_RGB+0x36c>
xor    %eax,%eax
mov    %eax,-0x94(%rbp)
jmp    149e <YUV420_to_RGB+0x39e>
cmpl   $0xff,-0x34(%rbp)
jle    1489 <YUV420_to_RGB+0x389>
mov    $0xff,%eax
mov    %eax,-0x98(%rbp)
jmp    1492 <YUV420_to_RGB+0x392>
mov    -0x34(%rbp),%eax
mov    %eax,-0x98(%rbp)
mov    -0x98(%rbp),%eax
mov    %eax,-0x94(%rbp)
mov    -0x94(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
mov    -0x48(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x48(%rbp)
jmp    114a <YUV420_to_RGB+0x4a>
mov    -0x44(%rbp),%eax
cmp    -0x28(%rbp),%eax
jl     14d6 <YUV420_to_RGB+0x3d6>
jmp    190f <YUV420_to_RGB+0x80f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x60(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x68(%rbp)
movl   $0x0,-0x48(%rbp)
mov    -0x48(%rbp),%eax
cmp    -0x24(%rbp),%eax
jge    18fc <YUV420_to_RGB+0x7fc>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
mov    %eax,-0x38(%rbp)
mov    -0x50(%rbp),%rax
movzbl (%rax),%eax
sub    $0x80,%eax
mov    -0x60(%rbp),%rcx
movzbl (%rcx),%ecx
add    %ecx,%eax
sub    $0x80,%eax
sar    $0x1,%eax
mov    %eax,-0x3c(%rbp)
mov    -0x58(%rbp),%rax
movzbl (%rax),%eax
sub    $0x80,%eax
mov    -0x68(%rbp),%rcx
movzbl (%rcx),%ecx
add    %ecx,%eax
sub    $0x80,%eax
sar    $0x1,%eax
mov    %eax,-0x40(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x199,-0x40(%rbp),%ecx
add    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x2c(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x64,-0x3c(%rbp),%ecx
sub    %ecx,%eax
imul   $0xd0,-0x40(%rbp),%ecx
sub    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x30(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x204,-0x3c(%rbp),%ecx
add    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x34(%rbp)
cmpl   $0x0,-0x2c(%rbp)
jge    15bc <YUV420_to_RGB+0x4bc>
xor    %eax,%eax
mov    %eax,-0x9c(%rbp)
jmp    15ee <YUV420_to_RGB+0x4ee>
cmpl   $0xff,-0x2c(%rbp)
jle    15d9 <YUV420_to_RGB+0x4d9>
mov    $0xff,%eax
mov    %eax,-0xa0(%rbp)
jmp    15e2 <YUV420_to_RGB+0x4e2>
mov    -0x2c(%rbp),%eax
mov    %eax,-0xa0(%rbp)
mov    -0xa0(%rbp),%eax
mov    %eax,-0x9c(%rbp)
mov    -0x9c(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
cmpl   $0x0,-0x30(%rbp)
jge    161e <YUV420_to_RGB+0x51e>
xor    %eax,%eax
mov    %eax,-0xa4(%rbp)
jmp    1650 <YUV420_to_RGB+0x550>
cmpl   $0xff,-0x30(%rbp)
jle    163b <YUV420_to_RGB+0x53b>
mov    $0xff,%eax
mov    %eax,-0xa8(%rbp)
jmp    1644 <YUV420_to_RGB+0x544>
mov    -0x30(%rbp),%eax
mov    %eax,-0xa8(%rbp)
mov    -0xa8(%rbp),%eax
mov    %eax,-0xa4(%rbp)
mov    -0xa4(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
cmpl   $0x0,-0x34(%rbp)
jge    1680 <YUV420_to_RGB+0x580>
xor    %eax,%eax
mov    %eax,-0xac(%rbp)
jmp    16b2 <YUV420_to_RGB+0x5b2>
cmpl   $0xff,-0x34(%rbp)
jle    169d <YUV420_to_RGB+0x59d>
mov    $0xff,%eax
mov    %eax,-0xb0(%rbp)
jmp    16a6 <YUV420_to_RGB+0x5a6>
mov    -0x34(%rbp),%eax
mov    %eax,-0xb0(%rbp)
mov    -0xb0(%rbp),%eax
mov    %eax,-0xac(%rbp)
mov    -0xac(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
mov    -0x48(%rbp),%eax
cmp    -0x24(%rbp),%eax
jl     16dc <YUV420_to_RGB+0x5dc>
jmp    18fc <YUV420_to_RGB+0x7fc>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
mov    %eax,-0x38(%rbp)
mov    -0x3c(%rbp),%eax
mov    -0x50(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x50(%rbp)
movzbl (%rcx),%ecx
sub    $0x80,%ecx
mov    -0x60(%rbp),%rdx
mov    %rdx,%rsi
add    $0x1,%rsi
mov    %rsi,-0x60(%rbp)
movzbl (%rdx),%edx
add    %edx,%ecx
sub    $0x80,%ecx
sar    $0x1,%ecx
add    %ecx,%eax
sar    $0x1,%eax
mov    %eax,-0x3c(%rbp)
mov    -0x40(%rbp),%eax
mov    -0x58(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x58(%rbp)
movzbl (%rcx),%ecx
sub    $0x80,%ecx
mov    -0x68(%rbp),%rdx
mov    %rdx,%rsi
add    $0x1,%rsi
mov    %rsi,-0x68(%rbp)
movzbl (%rdx),%edx
add    %edx,%ecx
sub    $0x80,%ecx
sar    $0x1,%ecx
add    %ecx,%eax
sar    $0x1,%eax
mov    %eax,-0x40(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x199,-0x40(%rbp),%ecx
add    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x2c(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x64,-0x3c(%rbp),%ecx
sub    %ecx,%eax
imul   $0xd0,-0x40(%rbp),%ecx
sub    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x30(%rbp)
imul   $0x12a,-0x38(%rbp),%eax
imul   $0x204,-0x3c(%rbp),%ecx
add    %ecx,%eax
add    $0x80,%eax
sar    $0x8,%eax
mov    %eax,-0x34(%rbp)
cmpl   $0x0,-0x2c(%rbp)
jge    17df <YUV420_to_RGB+0x6df>
xor    %eax,%eax
mov    %eax,-0xb4(%rbp)
jmp    1811 <YUV420_to_RGB+0x711>
cmpl   $0xff,-0x2c(%rbp)
jle    17fc <YUV420_to_RGB+0x6fc>
mov    $0xff,%eax
mov    %eax,-0xb8(%rbp)
jmp    1805 <YUV420_to_RGB+0x705>
mov    -0x2c(%rbp),%eax
mov    %eax,-0xb8(%rbp)
mov    -0xb8(%rbp),%eax
mov    %eax,-0xb4(%rbp)
mov    -0xb4(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
cmpl   $0x0,-0x30(%rbp)
jge    1841 <YUV420_to_RGB+0x741>
xor    %eax,%eax
mov    %eax,-0xbc(%rbp)
jmp    1873 <YUV420_to_RGB+0x773>
cmpl   $0xff,-0x30(%rbp)
jle    185e <YUV420_to_RGB+0x75e>
mov    $0xff,%eax
mov    %eax,-0xc0(%rbp)
jmp    1867 <YUV420_to_RGB+0x767>
mov    -0x30(%rbp),%eax
mov    %eax,-0xc0(%rbp)
mov    -0xc0(%rbp),%eax
mov    %eax,-0xbc(%rbp)
mov    -0xbc(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
cmpl   $0x0,-0x34(%rbp)
jge    18a3 <YUV420_to_RGB+0x7a3>
xor    %eax,%eax
mov    %eax,-0xc4(%rbp)
jmp    18d5 <YUV420_to_RGB+0x7d5>
cmpl   $0xff,-0x34(%rbp)
jle    18c0 <YUV420_to_RGB+0x7c0>
mov    $0xff,%eax
mov    %eax,-0xc8(%rbp)
jmp    18c9 <YUV420_to_RGB+0x7c9>
mov    -0x34(%rbp),%eax
mov    %eax,-0xc8(%rbp)
mov    -0xc8(%rbp),%eax
mov    %eax,-0xc4(%rbp)
mov    -0xc4(%rbp),%eax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x20(%rbp)
mov    %cl,(%rax)
mov    -0x48(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x48(%rbp)
jmp    14ed <YUV420_to_RGB+0x3ed>
jmp    1901 <YUV420_to_RGB+0x801>
mov    -0x44(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x44(%rbp)
jmp    1127 <YUV420_to_RGB+0x27>
xor    %eax,%eax
add    $0x48,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<YUV420_to_RGB>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0xc8,%rsp
mov    %r9d,%r13d
test   %r9d,%r9d
jle    26c2 <YUV420_to_RGB+0x15c2>
mov    %rcx,%r10
mov    %rdx,%r14
mov    %rsi,%r9
mov    %rdi,%r12
lea    -0x1(%r8),%eax
mov    %eax,-0x1c(%rsp)
mov    %eax,%ecx
shr    %ecx
lea    (%rcx,%rcx,2),%rax
add    %rax,%rax
add    $0x6,%rax
mov    %rax,0x68(%rsp)
lea    0x2(%rcx,%rcx,1),%rax
mov    %rax,0x60(%rsp)
lea    0x1(%rcx),%rax
mov    %rax,0x58(%rsp)
add    $0x1,%ecx
mov    %rcx,0x50(%rsp)
and    $0xfffffff0,%ecx
mov    %rcx,0x48(%rsp)
lea    (%rcx,%rcx,1),%eax
mov    %eax,-0x24(%rsp)
lea    (%rcx,%rcx,1),%rax
mov    %rax,0x40(%rsp)
lea    (%rax,%rax,2),%rax
mov    %rax,0x38(%rsp)
xor    %r11d,%r11d
mov    %r13d,-0x20(%rsp)
mov    %r8,-0x18(%rsp)
jmp    11a5 <YUV420_to_RGB+0xa5>
mov    %r11,%r10
mov    -0x68(%rsp),%r11
add    $0x2,%r11d
cmp    %r13d,%r11d
jge    26c2 <YUV420_to_RGB+0x15c2>
test   %r8d,%r8d
jle    1198 <YUV420_to_RGB+0x98>
xor    %r15d,%r15d
cmpl   $0x1e,-0x1c(%rsp)
mov    %r9,-0x70(%rsp)
mov    %r14,-0x78(%rsp)
mov    %r11,-0x68(%rsp)
jae    11d0 <YUV420_to_RGB+0xd0>
mov    %r10,%r11
jmp    1a71 <YUV420_to_RGB+0x971>
nopl   0x0(%rax,%rax,1)
mov    0x68(%rsp),%rax
lea    (%r10,%rax,1),%rsi
mov    0x60(%rsp),%rax
add    %r12,%rax
mov    0x58(%rsp),%rdx
lea    (%r9,%rdx,1),%rcx
lea    (%r14,%rdx,1),%rdi
cmp    %rax,%r10
setb   %bl
cmp    %rsi,%r12
setb   %dl
cmp    %rcx,%r10
setb   %al
cmp    %rsi,%r9
setb   %r9b
cmp    %rdi,%r10
setb   %cl
cmp    %rsi,%r14
setb   %sil
test   %dl,%bl
jne    1a39 <YUV420_to_RGB+0x939>
and    %r9b,%al
jne    1a39 <YUV420_to_RGB+0x939>
and    %sil,%cl
mov    -0x70(%rsp),%rdi
mov    -0x78(%rsp),%rbx
jne    1a2e <YUV420_to_RGB+0x92e>
mov    0x40(%rsp),%rax
mov    %r12,%rdx
add    %rax,%r12
mov    0x48(%rsp),%rax
lea    (%rdi,%rax,1),%r9
mov    0x38(%rsp),%rcx
lea    (%r10,%rcx,1),%r11
lea    (%rbx,%rax,1),%r14
xor    %ebp,%ebp
nopl   0x0(%rax,%rax,1)
movdqu (%rdx,%rbp,2),%xmm2
movdqa %xmm2,-0x40(%rsp)
movdqu 0x10(%rdx,%rbp,2),%xmm1
movdqa %xmm1,-0x60(%rsp)
movdqa %xmm2,%xmm10
punpckhwd %xmm10,%xmm10
movdqa 0x1d77(%rip),%xmm0
pand   %xmm0,%xmm10
punpcklwd %xmm2,%xmm2
pand   %xmm0,%xmm2
movdqa %xmm2,%xmm8
movdqa %xmm1,%xmm14
punpckhwd %xmm14,%xmm14
pand   %xmm0,%xmm14
movdqa %xmm1,%xmm2
punpcklwd %xmm2,%xmm2
pand   %xmm0,%xmm2
movdqu (%rbx,%rbp,1),%xmm1
movdqa %xmm1,%xmm0
pxor   %xmm5,%xmm5
punpcklbw %xmm5,%xmm0
movdqa %xmm0,%xmm3
punpckhwd %xmm5,%xmm3
movdqa %xmm3,0x90(%rsp)
punpcklwd %xmm5,%xmm0
movdqa %xmm0,%xmm4
movdqa %xmm0,0xa0(%rsp)
movdqa %xmm1,%xmm15
punpckhbw %xmm5,%xmm15
movdqa %xmm15,%xmm11
punpckhwd %xmm5,%xmm11
movdqa %xmm11,(%rsp)
punpcklwd %xmm5,%xmm15
movdqa %xmm15,0x10(%rsp)
movdqa 0x1cf9(%rip),%xmm0
paddd  %xmm0,%xmm15
movdqa %xmm15,%xmm13
movdqa %xmm15,0x80(%rsp)
paddd  %xmm0,%xmm11
movdqa %xmm4,%xmm12
paddd  %xmm0,%xmm12
movdqa %xmm3,%xmm1
paddd  %xmm0,%xmm1
movdqa 0x1cd6(%rip),%xmm5
pmaddwd %xmm5,%xmm2
pmaddwd %xmm5,%xmm14
pmaddwd %xmm5,%xmm8
pmaddwd %xmm5,%xmm10
movdqa %xmm1,%xmm5
movdqa 0x1cc7(%rip),%xmm6
pmaddwd %xmm6,%xmm5
movdqa %xmm12,%xmm3
pmaddwd %xmm6,%xmm3
movdqa %xmm6,%xmm9
movdqa 0x1cbd(%rip),%xmm6
paddd  %xmm6,%xmm10
movdqa %xmm8,%xmm15
paddd  %xmm6,%xmm15
movdqa %xmm6,%xmm8
paddd  %xmm15,%xmm3
movdqa %xmm15,0x70(%rsp)
paddd  %xmm10,%xmm5
movdqa %xmm10,-0x10(%rsp)
psrad  $0x8,%xmm5
psrad  $0x8,%xmm3
packssdw %xmm5,%xmm3
movdqa %xmm11,%xmm5
pmaddwd %xmm9,%xmm5
movdqa %xmm13,%xmm6
pmaddwd %xmm9,%xmm6
paddd  %xmm8,%xmm14
paddd  %xmm8,%xmm2
paddd  %xmm2,%xmm6
paddd  %xmm14,%xmm5
psrad  $0x8,%xmm5
psrad  $0x8,%xmm6
packssdw %xmm5,%xmm6
packuswb %xmm6,%xmm3
movdqa %xmm3,0x20(%rsp)
movdqu (%rdi,%rbp,1),%xmm9
movdqa %xmm9,%xmm13
pxor   %xmm8,%xmm8
punpcklbw %xmm8,%xmm9
movdqa %xmm9,%xmm7
punpckhwd %xmm8,%xmm9
movdqa %xmm9,%xmm5
paddd  %xmm0,%xmm5
movdqa %xmm5,%xmm6
movdqa 0x1c20(%rip),%xmm3
pmaddwd %xmm3,%xmm6
movdqa 0x1c24(%rip),%xmm3
pmaddwd %xmm3,%xmm1
paddd  %xmm10,%xmm6
paddd  %xmm1,%xmm6
punpcklwd %xmm8,%xmm7
movdqa %xmm7,%xmm1
paddd  %xmm0,%xmm1
movdqa %xmm1,%xmm3
pmaddwd 0x1bee(%rip),%xmm3
movdqa 0x1bf6(%rip),%xmm4
pmaddwd %xmm4,%xmm12
paddd  %xmm15,%xmm3
paddd  %xmm12,%xmm3
movdqa %xmm3,-0x50(%rsp)
punpckhbw %xmm8,%xmm13
movdqa %xmm13,%xmm12
punpckhwd %xmm8,%xmm13
pxor   %xmm4,%xmm4
movdqa %xmm13,%xmm10
paddd  %xmm0,%xmm10
movdqa %xmm10,%xmm8
movdqa 0x1ba6(%rip),%xmm15
pmaddwd %xmm15,%xmm8
movdqa 0x1ba9(%rip),%xmm3
pmaddwd %xmm3,%xmm11
paddd  %xmm14,%xmm8
paddd  %xmm11,%xmm8
punpcklwd %xmm4,%xmm12
movdqa %xmm12,%xmm4
paddd  %xmm0,%xmm4
movdqa %xmm4,%xmm11
pmaddwd %xmm15,%xmm11
movdqa 0x80(%rsp),%xmm0
pmaddwd %xmm3,%xmm0
paddd  %xmm2,%xmm11
paddd  %xmm0,%xmm11
movdqa 0x1b72(%rip),%xmm15
psrad  $0x8,%xmm6
movdqa -0x50(%rsp),%xmm3
psrad  $0x8,%xmm3
packssdw %xmm6,%xmm3
psrad  $0x8,%xmm8
psrad  $0x8,%xmm11
packssdw %xmm8,%xmm11
packuswb %xmm11,%xmm3
movdqa %xmm3,-0x50(%rsp)
movdqa 0x1b4a(%rip),%xmm6
pmaddwd %xmm15,%xmm4
paddd  %xmm2,%xmm4
pmaddwd %xmm15,%xmm10
paddd  %xmm14,%xmm10
pmaddwd %xmm15,%xmm1
paddd  0x70(%rsp),%xmm1
pmaddwd %xmm15,%xmm5
paddd  -0x10(%rsp),%xmm5
psrad  $0x8,%xmm5
psrad  $0x8,%xmm1
packssdw %xmm5,%xmm1
psrad  $0x8,%xmm10
psrad  $0x8,%xmm4
packssdw %xmm10,%xmm4
movdqa 0x1a7a(%rip),%xmm15
packuswb %xmm4,%xmm1
movdqa %xmm1,-0x10(%rsp)
movdqa -0x40(%rsp),%xmm0
psrldq $0x1,%xmm0
movdqa %xmm0,%xmm14
punpckhbw %xmm14,%xmm14
pand   %xmm15,%xmm14
punpcklbw %xmm0,%xmm0
pand   %xmm15,%xmm0
movdqa -0x60(%rsp),%xmm5
psrldq $0x1,%xmm5
movdqa 0x90(%rsp),%xmm11
paddd  %xmm11,%xmm11
paddd  %xmm6,%xmm11
movdqa 0xa0(%rsp),%xmm10
paddd  %xmm10,%xmm10
paddd  %xmm6,%xmm10
psrad  $0x1,%xmm10
psrad  $0x1,%xmm11
movdqa 0x1a26(%rip),%xmm4
movdqa %xmm0,%xmm3
pmaddwd %xmm4,%xmm3
pmaddwd %xmm4,%xmm14
movdqa %xmm11,%xmm2
movdqa 0x1a1c(%rip),%xmm1
pmaddwd %xmm1,%xmm2
movdqa %xmm10,%xmm0
pmaddwd %xmm1,%xmm0
movdqa %xmm1,%xmm8
movdqa 0x1a12(%rip),%xmm1
paddd  %xmm1,%xmm14
paddd  %xmm1,%xmm3
movdqa %xmm3,-0x40(%rsp)
paddd  %xmm3,%xmm0
paddd  %xmm14,%xmm2
psrad  $0x8,%xmm2
psrad  $0x8,%xmm0
packssdw %xmm2,%xmm0
movdqa %xmm5,%xmm2
punpckhbw %xmm2,%xmm2
pand   %xmm15,%xmm2
punpcklbw %xmm5,%xmm5
pand   %xmm15,%xmm5
movdqa (%rsp),%xmm1
paddd  %xmm1,%xmm1
movdqa %xmm6,%xmm3
paddd  %xmm6,%xmm1
movdqa 0x10(%rsp),%xmm6
paddd  %xmm6,%xmm6
paddd  %xmm3,%xmm6
psrad  $0x1,%xmm6
psrad  $0x1,%xmm1
pmaddwd %xmm4,%xmm5
pmaddwd %xmm4,%xmm2
movdqa %xmm1,%xmm3
pmaddwd %xmm8,%xmm3
movdqa %xmm8,%xmm15
movdqa %xmm6,%xmm4
movdqa %xmm6,%xmm8
pmaddwd %xmm15,%xmm4
movdqa 0x1981(%rip),%xmm6
paddd  %xmm6,%xmm2
paddd  %xmm6,%xmm5
movdqa %xmm5,-0x60(%rsp)
paddd  %xmm5,%xmm4
paddd  %xmm2,%xmm3
psrad  $0x8,%xmm3
psrad  $0x8,%xmm4
packssdw %xmm3,%xmm4
packuswb %xmm4,%xmm0
paddd  %xmm9,%xmm9
movdqa 0x198b(%rip),%xmm15
paddd  %xmm15,%xmm9
psrad  $0x1,%xmm9
movdqa %xmm9,%xmm4
movdqa 0x1943(%rip),%xmm5
pmaddwd %xmm5,%xmm4
movdqa 0x1947(%rip),%xmm6
pmaddwd %xmm6,%xmm11
paddd  %xmm14,%xmm4
paddd  %xmm11,%xmm4
paddd  %xmm7,%xmm7
paddd  %xmm15,%xmm7
psrad  $0x1,%xmm7
movdqa %xmm7,%xmm3
pmaddwd %xmm5,%xmm3
pmaddwd %xmm6,%xmm10
movdqa -0x40(%rsp),%xmm11
paddd  %xmm11,%xmm3
paddd  %xmm10,%xmm3
paddd  %xmm13,%xmm13
paddd  %xmm15,%xmm13
psrad  $0x1,%xmm13
movdqa %xmm13,%xmm6
pmaddwd %xmm5,%xmm6
movdqa %xmm5,%xmm10
pmaddwd 0x18e6(%rip),%xmm1
paddd  %xmm2,%xmm6
paddd  %xmm1,%xmm6
paddd  %xmm12,%xmm12
paddd  %xmm15,%xmm12
psrad  $0x1,%xmm12
movdqa %xmm12,%xmm5
pmaddwd %xmm10,%xmm5
pmaddwd 0x18bb(%rip),%xmm8
movdqa -0x60(%rsp),%xmm10
paddd  %xmm10,%xmm5
paddd  %xmm8,%xmm5
psrad  $0x8,%xmm4
psrad  $0x8,%xmm3
packssdw %xmm4,%xmm3
psrad  $0x8,%xmm6
psrad  $0x8,%xmm5
packssdw %xmm6,%xmm5
packuswb %xmm5,%xmm3
movdqa 0x1892(%rip),%xmm1
pmaddwd %xmm1,%xmm12
paddd  %xmm10,%xmm12
pmaddwd %xmm1,%xmm9
pmaddwd %xmm1,%xmm7
pmaddwd %xmm1,%xmm13
paddd  %xmm2,%xmm13
paddd  %xmm11,%xmm7
paddd  %xmm14,%xmm9
psrad  $0x8,%xmm9
psrad  $0x8,%xmm7
packssdw %xmm9,%xmm7
psrad  $0x8,%xmm13
psrad  $0x8,%xmm12
packssdw %xmm13,%xmm12
movdqa 0x1871(%rip),%xmm13
packuswb %xmm12,%xmm7
movdqa 0x20(%rsp),%xmm10
movdqa %xmm10,%xmm5
movdqa -0x50(%rsp),%xmm11
punpcklbw %xmm11,%xmm5
pshufd $0x50,%xmm5,%xmm4
movdqa 0x1836(%rip),%xmm12
pand   %xmm12,%xmm4
movdqa -0x10(%rsp),%xmm1
movdqa %xmm1,%xmm8
punpcklbw %xmm0,%xmm8
pshuflw $0xa1,%xmm8,%xmm6
pshufd $0x44,%xmm6,%xmm6
movdqa %xmm12,%xmm2
pandn  %xmm6,%xmm2
por    %xmm4,%xmm2
movdqa %xmm3,%xmm6
punpcklbw %xmm7,%xmm6
pshufd $0x0,%xmm6,%xmm4
movdqa %xmm13,%xmm9
pandn  %xmm4,%xmm9
pand   %xmm13,%xmm2
por    %xmm2,%xmm9
punpckhbw %xmm7,%xmm3
pshufd $0xfa,%xmm3,%xmm2
movdqa %xmm12,%xmm4
pandn  %xmm2,%xmm4
punpckhbw %xmm0,%xmm1
pshufhw $0xf9,%xmm1,%xmm0
pshufd $0xea,%xmm0,%xmm2
pand   %xmm12,%xmm2
por    %xmm4,%xmm2
pand   %xmm13,%xmm2
movdqa %xmm10,%xmm7
punpckhbw %xmm11,%xmm7
pshufd $0xff,%xmm7,%xmm4
movdqa %xmm13,%xmm0
pandn  %xmm4,%xmm0
por    %xmm2,%xmm0
pshufd $0xa5,%xmm7,%xmm2
movdqa %xmm7,%xmm11
movdqa %xmm12,%xmm10
movdqa %xmm12,%xmm4
pandn  %xmm2,%xmm4
pshufd $0xa5,%xmm3,%xmm2
pand   %xmm12,%xmm2
por    %xmm4,%xmm2
pshuflw $0xff,%xmm1,%xmm4
pshufhw $0x0,%xmm4,%xmm4
movdqa %xmm13,%xmm7
pandn  %xmm4,%xmm7
pand   %xmm13,%xmm2
por    %xmm2,%xmm7
pshufd $0x50,%xmm11,%xmm2
pand   %xmm12,%xmm2
pshuflw $0xa1,%xmm1,%xmm1
pshufd $0x44,%xmm1,%xmm1
movdqa %xmm12,%xmm4
pandn  %xmm1,%xmm4
por    %xmm2,%xmm4
pand   %xmm13,%xmm4
pshufd $0x0,%xmm3,%xmm2
movdqa %xmm13,%xmm1
pandn  %xmm2,%xmm1
por    %xmm4,%xmm1
pshufd $0xfa,%xmm6,%xmm2
movdqa %xmm12,%xmm3
pandn  %xmm2,%xmm3
pshufhw $0xf9,%xmm8,%xmm2
pshufd $0xea,%xmm2,%xmm2
pand   %xmm12,%xmm2
por    %xmm3,%xmm2
pshufd $0xff,%xmm5,%xmm3
movdqa %xmm13,%xmm4
pandn  %xmm3,%xmm4
pand   %xmm13,%xmm2
por    %xmm2,%xmm4
pshufd $0xa5,%xmm5,%xmm2
movdqa %xmm12,%xmm3
pandn  %xmm2,%xmm3
pshufd $0xa5,%xmm6,%xmm2
pand   %xmm12,%xmm2
por    %xmm3,%xmm2
pshuflw $0xff,%xmm8,%xmm3
pshufhw $0x0,%xmm3,%xmm3
movdqa %xmm13,%xmm5
pandn  %xmm3,%xmm5
pand   %xmm13,%xmm2
por    %xmm2,%xmm5
movdqu %xmm5,0x10(%r10)
movdqu %xmm4,0x20(%r10)
movdqu %xmm1,0x30(%r10)
movdqu %xmm7,0x40(%r10)
movdqu %xmm0,0x50(%r10)
movdqu %xmm9,(%r10)
add    $0x10,%rbp
add    $0x60,%r10
cmp    %rbp,%rax
jne    1260 <YUV420_to_RGB+0x160>
mov    -0x24(%rsp),%r15d
cmp    0x50(%rsp),%rax
jne    1a71 <YUV420_to_RGB+0x971>
nop
test   %r8d,%r8d
jg     1bc3 <YUV420_to_RGB+0xac3>
jmp    1190 <YUV420_to_RGB+0x90>
mov    %rdi,%r9
mov    %r10,%r11
mov    %rbx,%r14
jmp    1a71 <YUV420_to_RGB+0x971>
mov    -0x70(%rsp),%r9
mov    %r10,%r11
mov    -0x78(%rsp),%r14
jmp    1a71 <YUV420_to_RGB+0x971>
nopl   0x0(%rax,%rax,1)
add    $0x2,%r12
add    $0x1,%r9
add    $0x1,%r14
mov    %bpl,0x5(%r11)
add    $0x6,%r11
add    $0x2,%r15d
cmp    %r8d,%r15d
jge    1bb0 <YUV420_to_RGB+0xab0>
movzbl (%r12),%eax
movzbl (%r9),%esi
lea    -0x80(%rsi),%edx
movzbl (%r14),%r10d
lea    -0x80(%r10),%ecx
imul   $0x12a,%eax,%edi
imul   $0x199,%ecx,%eax
add    %edi,%eax
add    $0x80,%eax
sar    $0x8,%eax
imul   $0xffffff9c,%edx,%ebp
imul   $0xffffff30,%ecx,%ebx
lea    (%rdi,%rbp,1),%ecx
add    $0x80,%ecx
add    %ebx,%ecx
sar    $0x8,%ecx
cmp    $0xff,%eax
mov    $0xff,%ebp
cmovge %ebp,%eax
test   %eax,%eax
jg     1ac5 <YUV420_to_RGB+0x9c5>
xor    %eax,%eax
shl    $0x9,%edx
mov    %al,(%r11)
cmp    $0xff,%ecx
jl     1ad8 <YUV420_to_RGB+0x9d8>
mov    $0xff,%ecx
lea    (%rdx,%rsi,4),%eax
add    $0xfffffe00,%eax
add    %edi,%eax
add    $0x80,%eax
sar    $0x8,%eax
test   %ecx,%ecx
jg     1af0 <YUV420_to_RGB+0x9f0>
xor    %ecx,%ecx
mov    %cl,0x1(%r11)
cmp    $0xff,%eax
cmovge %ebp,%eax
test   %eax,%eax
jg     1b02 <YUV420_to_RGB+0xa02>
xor    %eax,%eax
mov    %al,0x2(%r11)
movzbl 0x1(%r12),%eax
movzbl (%r9),%ecx
add    %ecx,%esi
add    $0xffffff00,%esi
sar    %esi
movzbl (%r14),%ecx
lea    (%rcx,%r10,1),%edi
add    $0xffffff00,%edi
sar    %edi
imul   $0x12a,%eax,%edx
imul   $0x199,%edi,%eax
lea    (%rdx,%rax,1),%ecx
add    $0x80,%ecx
sar    $0x8,%ecx
imul   $0xffffff9c,%esi,%eax
imul   $0xffffff30,%edi,%edi
lea    (%rdx,%rax,1),%ebx
add    $0x80,%ebx
add    %edi,%ebx
cmp    $0xff,%ecx
jl     1b63 <YUV420_to_RGB+0xa63>
mov    $0xff,%ecx
sar    $0x8,%ebx
test   %ecx,%ecx
jg     1b6c <YUV420_to_RGB+0xa6c>
xor    %ecx,%ecx
mov    %esi,%eax
shl    $0x9,%eax
mov    %cl,0x3(%r11)
cmp    $0xff,%ebx
jl     1b82 <YUV420_to_RGB+0xa82>
mov    $0xff,%ebx
lea    (%rax,%rsi,4),%eax
add    %edx,%eax
add    $0x80,%eax
sar    $0x8,%eax
test   %ebx,%ebx
jg     1b95 <YUV420_to_RGB+0xa95>
xor    %ebx,%ebx
mov    %bl,0x4(%r11)
cmp    $0xff,%eax
cmovl  %eax,%ebp
test   %ebp,%ebp
jg     1a50 <YUV420_to_RGB+0x950>
xor    %ebp,%ebp
jmp    1a50 <YUV420_to_RGB+0x950>
mov    -0x70(%rsp),%rdi
mov    -0x78(%rsp),%rbx
test   %r8d,%r8d
jle    1190 <YUV420_to_RGB+0x90>
xor    %r13d,%r13d
cmpl   $0x1e,-0x1c(%rsp)
jae    1be4 <YUV420_to_RGB+0xae4>
mov    %r14,-0x50(%rsp)
mov    %r9,-0x60(%rsp)
mov    %rbx,-0x40(%rsp)
mov    %rdi,%r15
jmp    24e6 <YUV420_to_RGB+0x13e6>
mov    0x68(%rsp),%rax
lea    (%r11,%rax,1),%rbp
mov    0x60(%rsp),%rax
add    %r12,%rax
mov    0x58(%rsp),%rsi
lea    (%r9,%rsi,1),%rcx
lea    (%rdi,%rsi,1),%rdx
mov    %rdi,%r15
lea    (%r14,%rsi,1),%rdi
add    %rbx,%rsi
cmp    %rax,%r11
setb   -0x50(%rsp)
cmp    %rbp,%r12
setb   %r10b
cmp    %rcx,%r11
setb   %al
cmp    %rbp,%r9
setb   %r8b
cmp    %rdx,%r11
setb   %cl
cmp    %rbp,%r15
setb   %r15b
cmp    %rdi,%r11
setb   %dl
cmp    %rbp,%r14
setb   -0x60(%rsp)
cmp    %rsi,%r11
setb   %dil
cmp    %rbp,%rbx
setb   %bpl
test   %r10b,-0x50(%rsp)
jne    24cd <YUV420_to_RGB+0x13cd>
and    %r8b,%al
jne    24cd <YUV420_to_RGB+0x13cd>
and    %r15b,%cl
jne    24cd <YUV420_to_RGB+0x13cd>
and    -0x60(%rsp),%dl
jne    24cd <YUV420_to_RGB+0x13cd>
and    %bpl,%dil
jne    24cd <YUV420_to_RGB+0x13cd>
mov    0x48(%rsp),%rax
lea    (%r14,%rax,1),%rcx
mov    %rcx,-0x50(%rsp)
lea    (%r9,%rax,1),%rcx
mov    %rcx,-0x60(%rsp)
mov    -0x78(%rsp),%rsi
lea    (%rsi,%rax,1),%rcx
mov    %rcx,-0x40(%rsp)
mov    -0x70(%rsp),%rdx
lea    (%rdx,%rax,1),%r15
mov    0x40(%rsp),%rcx
lea    (%r12,%rcx,1),%rdi
mov    0x38(%rsp),%rcx
lea    (%r11,%rcx,1),%r10
xor    %r13d,%r13d
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movdqu (%r12,%r13,2),%xmm14
movdqa %xmm14,0x90(%rsp)
movdqu 0x10(%r12,%r13,2),%xmm3
movdqa %xmm3,0xa0(%rsp)
movdqa %xmm14,%xmm1
punpckhwd %xmm1,%xmm1
movdqa 0x12ff(%rip),%xmm0
pand   %xmm0,%xmm1
movdqa %xmm1,(%rsp)
punpcklwd %xmm14,%xmm14
pand   %xmm0,%xmm14
movdqa %xmm14,%xmm5
movdqa %xmm3,%xmm1
punpckhwd %xmm1,%xmm1
pand   %xmm0,%xmm1
movdqa %xmm1,%xmm4
movdqa %xmm3,%xmm14
punpcklwd %xmm14,%xmm14
pand   %xmm0,%xmm14
movdqu (%rdx,%r13,1),%xmm15
movdqa %xmm15,%xmm0
punpckhbw %xmm0,%xmm0
movdqa %xmm0,%xmm3
punpcklwd %xmm3,%xmm3
punpckhwd %xmm0,%xmm0
movdqa %xmm0,%xmm6
punpcklbw %xmm15,%xmm15
movdqa %xmm15,%xmm11
punpcklwd %xmm11,%xmm11
punpckhwd %xmm15,%xmm15
movdqu (%r9,%r13,1),%xmm0
movdqa %xmm0,%xmm1
pxor   %xmm10,%xmm10
punpcklbw %xmm10,%xmm1
movdqa %xmm1,%xmm2
punpckhwd %xmm10,%xmm2
punpcklwd %xmm10,%xmm1
punpckhbw %xmm10,%xmm0
movdqa %xmm0,%xmm9
punpckhwd %xmm10,%xmm9
punpcklwd %xmm10,%xmm0
movdqa 0x12d6(%rip),%xmm8
por    %xmm8,%xmm15
paddd  %xmm2,%xmm15
por    %xmm8,%xmm11
paddd  %xmm1,%xmm11
por    %xmm8,%xmm6
paddd  %xmm9,%xmm6
movdqa %xmm6,0x10(%rsp)
por    %xmm8,%xmm3
paddd  %xmm0,%xmm3
movdqa %xmm3,0x20(%rsp)
movdqu (%rsi,%r13,1),%xmm7
movdqa %xmm7,%xmm6
punpcklbw %xmm6,%xmm6
punpckhbw %xmm7,%xmm7
movdqa %xmm7,%xmm13
punpcklwd %xmm7,%xmm7
movdqu (%r14,%r13,1),%xmm12
movdqa %xmm12,%xmm1
punpckhbw %xmm10,%xmm1
movdqa %xmm1,%xmm2
punpcklwd %xmm10,%xmm2
por    %xmm8,%xmm7
paddd  %xmm2,%xmm7
movdqa %xmm6,%xmm2
punpckhwd %xmm2,%xmm2
punpcklwd %xmm6,%xmm6
punpckhwd %xmm13,%xmm13
punpckhwd %xmm10,%xmm1
punpcklbw %xmm10,%xmm12
por    %xmm8,%xmm13
paddd  %xmm1,%xmm13
movdqa %xmm12,%xmm1
punpcklwd %xmm10,%xmm1
punpckhwd %xmm10,%xmm12
por    %xmm8,%xmm6
paddd  %xmm1,%xmm6
por    %xmm8,%xmm2
paddd  %xmm12,%xmm2
psrad  $0x1,%xmm7
psrad  $0x1,%xmm13
psrad  $0x1,%xmm6
psrad  $0x1,%xmm2
movdqa 0x11a2(%rip),%xmm0
pmaddwd %xmm0,%xmm14
movdqa %xmm4,%xmm3
pmaddwd %xmm0,%xmm3
pmaddwd %xmm0,%xmm5
movdqa (%rsp),%xmm4
pmaddwd %xmm0,%xmm4
movdqa %xmm2,%xmm9
movdqa 0x118b(%rip),%xmm0
pmaddwd %xmm0,%xmm9
movdqa %xmm6,%xmm8
pmaddwd %xmm0,%xmm8
movdqa %xmm0,%xmm10
movdqa 0x117e(%rip),%xmm12
paddd  %xmm12,%xmm4
paddd  %xmm12,%xmm5
paddd  %xmm5,%xmm8
movdqa %xmm5,0x80(%rsp)
paddd  %xmm4,%xmm9
movdqa %xmm4,(%rsp)
psrad  $0x8,%xmm9
psrad  $0x8,%xmm8
packssdw %xmm9,%xmm8
movdqa %xmm13,%xmm1
pmaddwd %xmm0,%xmm1
movdqa %xmm7,%xmm10
pmaddwd %xmm0,%xmm10
paddd  %xmm12,%xmm3
paddd  %xmm12,%xmm14
paddd  %xmm14,%xmm10
paddd  %xmm3,%xmm1
movdqa %xmm3,0x70(%rsp)
psrad  $0x8,%xmm1
psrad  $0x8,%xmm10
packssdw %xmm1,%xmm10
psrad  $0x1,%xmm15
packuswb %xmm10,%xmm8
movdqa %xmm8,-0x10(%rsp)
movdqa %xmm15,%xmm12
movdqa 0x10ff(%rip),%xmm8
pmaddwd %xmm8,%xmm12
movdqa %xmm2,%xmm10
movdqa 0x10fc(%rip),%xmm9
pmaddwd %xmm9,%xmm10
paddd  %xmm4,%xmm12
paddd  %xmm10,%xmm12
psrad  $0x1,%xmm11
movdqa %xmm11,%xmm1
pmaddwd %xmm8,%xmm1
movdqa %xmm6,%xmm0
pmaddwd %xmm9,%xmm0
paddd  %xmm5,%xmm1
paddd  %xmm0,%xmm1
movdqa %xmm1,%xmm10
movdqa 0x10(%rsp),%xmm5
psrad  $0x1,%xmm5
movdqa %xmm5,%xmm0
movdqa %xmm5,0x10(%rsp)
movdqa %xmm8,%xmm1
pmaddwd %xmm8,%xmm0
movdqa %xmm13,%xmm8
pmaddwd %xmm9,%xmm8
paddd  %xmm3,%xmm0
paddd  %xmm8,%xmm0
movdqa 0x20(%rsp),%xmm4
psrad  $0x1,%xmm4
movdqa %xmm4,%xmm8
movdqa %xmm4,0x20(%rsp)
pmaddwd %xmm1,%xmm8
movdqa %xmm7,%xmm9
pmaddwd 0x106c(%rip),%xmm9
paddd  %xmm14,%xmm8
paddd  %xmm9,%xmm8
psrad  $0x8,%xmm12
psrad  $0x8,%xmm10
packssdw %xmm12,%xmm10
psrad  $0x8,%xmm0
psrad  $0x8,%xmm8
packssdw %xmm0,%xmm8
packuswb %xmm8,%xmm10
movdqa %xmm10,0xb0(%rsp)
movdqa %xmm4,%xmm1
movdqa 0x1036(%rip),%xmm0
pmaddwd %xmm0,%xmm1
paddd  %xmm14,%xmm1
movdqa %xmm5,%xmm3
pmaddwd %xmm0,%xmm3
paddd  0x70(%rsp),%xmm3
movdqa %xmm11,%xmm9
pmaddwd %xmm0,%xmm9
paddd  0x80(%rsp),%xmm9
movdqa %xmm15,%xmm5
pmaddwd %xmm0,%xmm5
paddd  (%rsp),%xmm5
psrad  $0x8,%xmm5
psrad  $0x8,%xmm9
packssdw %xmm5,%xmm9
psrad  $0x8,%xmm3
psrad  $0x8,%xmm1
packssdw %xmm3,%xmm1
packuswb %xmm1,%xmm9
movdqa 0x90(%rsp),%xmm10
psrldq $0x1,%xmm10
movdqa %xmm10,%xmm14
punpckhbw %xmm14,%xmm14
pand   0xf47(%rip),%xmm14
punpcklbw %xmm10,%xmm10
pand   0xf39(%rip),%xmm10
movdqa 0xa0(%rsp),%xmm0
psrldq $0x1,%xmm0
paddd  %xmm2,%xmm2
paddd  %xmm6,%xmm6
psrad  $0x1,%xmm6
psrad  $0x1,%xmm2
movdqa 0xf31(%rip),%xmm1
pmaddwd %xmm1,%xmm10
pmaddwd %xmm1,%xmm14
movdqa %xmm2,%xmm1
movdqa 0xf2b(%rip),%xmm3
pmaddwd %xmm3,%xmm1
movdqa %xmm6,%xmm8
pmaddwd %xmm3,%xmm8
movdqa 0xf25(%rip),%xmm4
paddd  %xmm4,%xmm14
paddd  %xmm4,%xmm10
paddd  %xmm10,%xmm8
paddd  %xmm14,%xmm1
psrad  $0x8,%xmm1
psrad  $0x8,%xmm8
packssdw %xmm1,%xmm8
movdqa %xmm0,%xmm4
movdqa %xmm0,%xmm5
punpckhbw %xmm5,%xmm5
pand   0xead(%rip),%xmm5
punpcklbw %xmm4,%xmm4
pand   0xea1(%rip),%xmm4
paddd  %xmm13,%xmm13
paddd  %xmm7,%xmm7
psrad  $0x1,%xmm7
psrad  $0x1,%xmm13
movdqa 0xea5(%rip),%xmm1
pmaddwd %xmm1,%xmm4
pmaddwd %xmm1,%xmm5
movdqa %xmm13,%xmm1
pmaddwd %xmm3,%xmm1
movdqa %xmm7,%xmm0
pmaddwd %xmm3,%xmm0
movdqa 0xea4(%rip),%xmm3
paddd  %xmm3,%xmm5
paddd  %xmm3,%xmm4
paddd  %xmm4,%xmm0
paddd  %xmm5,%xmm1
psrad  $0x8,%xmm1
psrad  $0x8,%xmm0
packssdw %xmm1,%xmm0
packuswb %xmm0,%xmm8
paddd  %xmm15,%xmm15
psrad  $0x1,%xmm15
movdqa %xmm15,%xmm0
movdqa 0xe79(%rip),%xmm3
pmaddwd %xmm3,%xmm0
movdqa 0xe7c(%rip),%xmm12
pmaddwd %xmm12,%xmm2
paddd  %xmm14,%xmm0
paddd  %xmm2,%xmm0
paddd  %xmm11,%xmm11
psrad  $0x1,%xmm11
movdqa %xmm11,%xmm2
pmaddwd %xmm3,%xmm2
pmaddwd %xmm12,%xmm6
paddd  %xmm10,%xmm2
paddd  %xmm6,%xmm2
movdqa 0x10(%rsp),%xmm3
paddd  %xmm3,%xmm3
psrad  $0x1,%xmm3
movdqa %xmm3,%xmm1
pmaddwd 0xe21(%rip),%xmm1
pmaddwd %xmm12,%xmm13
paddd  %xmm5,%xmm1
paddd  %xmm13,%xmm1
movdqa 0x20(%rsp),%xmm13
paddd  %xmm13,%xmm13
psrad  $0x1,%xmm13
movdqa %xmm13,%xmm6
pmaddwd 0xdf4(%rip),%xmm6
pmaddwd %xmm12,%xmm7
paddd  %xmm4,%xmm6
paddd  %xmm7,%xmm6
psrad  $0x8,%xmm0
psrad  $0x8,%xmm2
packssdw %xmm0,%xmm2
psrad  $0x8,%xmm1
psrad  $0x8,%xmm6
packssdw %xmm1,%xmm6
packuswb %xmm6,%xmm2
movdqa 0xddf(%rip),%xmm0
pmaddwd %xmm0,%xmm13
paddd  %xmm4,%xmm13
pmaddwd %xmm0,%xmm15
pmaddwd %xmm0,%xmm11
pmaddwd %xmm0,%xmm3
paddd  %xmm5,%xmm3
paddd  %xmm10,%xmm11
paddd  %xmm14,%xmm15
movdqa 0xdd0(%rip),%xmm14
psrad  $0x8,%xmm15
psrad  $0x8,%xmm11
packssdw %xmm15,%xmm11
psrad  $0x8,%xmm3
psrad  $0x8,%xmm13
packssdw %xmm3,%xmm13
packuswb %xmm13,%xmm11
movdqa -0x10(%rsp),%xmm3
movdqa %xmm3,%xmm15
movdqa 0xb0(%rsp),%xmm5
punpcklbw %xmm5,%xmm15
pshufd $0x50,%xmm15,%xmm0
pand   %xmm14,%xmm0
movdqa %xmm9,%xmm12
punpcklbw %xmm8,%xmm12
pshuflw $0xa1,%xmm12,%xmm1
pshufd $0x44,%xmm1,%xmm1
movdqa %xmm14,%xmm4
pandn  %xmm1,%xmm4
por    %xmm0,%xmm4
movdqa %xmm2,%xmm6
punpcklbw %xmm11,%xmm6
pshufd $0x0,%xmm6,%xmm0
movdqa 0xd5e(%rip),%xmm7
movdqa %xmm7,%xmm13
pandn  %xmm0,%xmm13
pand   %xmm7,%xmm4
por    %xmm4,%xmm13
punpckhbw %xmm11,%xmm2
pshufd $0xfa,%xmm2,%xmm0
movdqa %xmm14,%xmm1
pandn  %xmm0,%xmm1
punpckhbw %xmm8,%xmm9
pshufhw $0xf9,%xmm9,%xmm0
pshufd $0xea,%xmm0,%xmm0
pand   %xmm14,%xmm0
por    %xmm1,%xmm0
pand   %xmm7,%xmm0
movdqa %xmm3,%xmm4
punpckhbw %xmm5,%xmm4
pshufd $0xff,%xmm4,%xmm3
movdqa %xmm7,%xmm1
pandn  %xmm3,%xmm1
por    %xmm0,%xmm1
pshufd $0xa5,%xmm4,%xmm0
movdqa %xmm4,%xmm5
movdqa %xmm14,%xmm3
pandn  %xmm0,%xmm3
pshufd $0xa5,%xmm2,%xmm0
pand   %xmm14,%xmm0
por    %xmm3,%xmm0
pshuflw $0xff,%xmm9,%xmm3
pshufhw $0x0,%xmm3,%xmm4
movdqa %xmm7,%xmm3
pandn  %xmm4,%xmm3
pand   %xmm7,%xmm0
por    %xmm0,%xmm3
pshufd $0x50,%xmm5,%xmm0
pand   %xmm14,%xmm0
pshuflw $0xa1,%xmm9,%xmm4
pshufd $0x44,%xmm4,%xmm4
movdqa %xmm14,%xmm5
pandn  %xmm4,%xmm5
por    %xmm0,%xmm5
pand   %xmm7,%xmm5
pshufd $0x0,%xmm2,%xmm0
movdqa %xmm7,%xmm2
pandn  %xmm0,%xmm2
por    %xmm5,%xmm2
pshufd $0xfa,%xmm6,%xmm0
movdqa %xmm14,%xmm4
pandn  %xmm0,%xmm4
pshufhw $0xf9,%xmm12,%xmm0
pshufd $0xea,%xmm0,%xmm0
pand   %xmm14,%xmm0
por    %xmm4,%xmm0
pshufd $0xff,%xmm15,%xmm4
movdqa %xmm7,%xmm5
pandn  %xmm4,%xmm5
pand   %xmm7,%xmm0
por    %xmm0,%xmm5
pshufd $0xa5,%xmm15,%xmm0
movdqa %xmm14,%xmm4
pandn  %xmm0,%xmm4
pshufd $0xa5,%xmm6,%xmm0
pand   %xmm14,%xmm0
por    %xmm4,%xmm0
pshuflw $0xff,%xmm12,%xmm4
pshufhw $0x0,%xmm4,%xmm4
movdqa %xmm7,%xmm6
pandn  %xmm4,%xmm6
pand   %xmm7,%xmm0
por    %xmm0,%xmm6
movdqu %xmm6,0x10(%r11)
movdqu %xmm5,0x20(%r11)
movdqu %xmm2,0x30(%r11)
movdqu %xmm3,0x40(%r11)
movdqu %xmm1,0x50(%r11)
movdqu %xmm13,(%r11)
add    $0x10,%r13
add    $0x60,%r11
cmp    %r13,%rax
jne    1cd0 <YUV420_to_RGB+0xbd0>
mov    -0x24(%rsp),%r13d
cmp    0x50(%rsp),%rax
mov    -0x68(%rsp),%r11
mov    %rdi,%r12
jne    24ee <YUV420_to_RGB+0x13ee>
jmp    26b3 <YUV420_to_RGB+0x15b3>
mov    %r14,-0x50(%rsp)
mov    %r9,-0x60(%rsp)
mov    -0x78(%rsp),%rax
mov    %rax,-0x40(%rsp)
mov    -0x70(%rsp),%r15
mov    %r11,%r10
mov    -0x68(%rsp),%r11
xor    %r8d,%r8d
xor    %edi,%edi
jmp    251f <YUV420_to_RGB+0x141f>
cs nopw 0x0(%rax,%rax,1)
nop
mov    %al,0x5(%r10)
add    $0x6,%r10
add    $0x2,%r13d
add    $0x1,%rdi
add    $0x2,%r8
cmp    -0x18(%rsp),%r13d
jge    26b0 <YUV420_to_RGB+0x15b0>
movzbl (%r12,%rdi,2),%eax
movzbl (%r15,%rdi,1),%ecx
mov    -0x60(%rsp),%rdx
movzbl (%rdx,%rdi,1),%edx
or     $0xffffff00,%ecx
add    %edx,%ecx
sar    %ecx
mov    -0x40(%rsp),%rdx
movzbl (%rdx,%rdi,1),%ebx
mov    -0x50(%rsp),%rdx
movzbl (%rdx,%rdi,1),%edx
or     $0xffffff00,%ebx
add    %edx,%ebx
sar    %ebx
imul   $0x12a,%eax,%esi
imul   $0x199,%ebx,%eax
add    %esi,%eax
add    $0x80,%eax
sar    $0x8,%eax
imul   $0xffffff9c,%ecx,%edx
imul   $0xffffff30,%ebx,%ebp
add    %esi,%edx
add    $0x80,%edx
add    %ebp,%edx
cmp    $0xff,%eax
jl     258d <YUV420_to_RGB+0x148d>
mov    $0xff,%eax
sar    $0x8,%edx
test   %eax,%eax
jg     2596 <YUV420_to_RGB+0x1496>
xor    %eax,%eax
mov    %ecx,%ebp
shl    $0x9,%ebp
mov    %al,(%r10)
cmp    $0xff,%edx
jl     25ab <YUV420_to_RGB+0x14ab>
mov    $0xff,%edx
lea    0x0(%rbp,%rcx,4),%eax
add    %esi,%eax
add    $0x80,%eax
sar    $0x8,%eax
test   %edx,%edx
jg     25bf <YUV420_to_RGB+0x14bf>
xor    %edx,%edx
mov    %dl,0x1(%r10)
cmp    $0xff,%eax
jl     25cf <YUV420_to_RGB+0x14cf>
mov    $0xff,%eax
test   %eax,%eax
jg     25d5 <YUV420_to_RGB+0x14d5>
xor    %eax,%eax
mov    %al,0x2(%r10)
movzbl 0x1(%r12,%rdi,2),%eax
movzbl (%r15,%rdi,1),%esi
mov    -0x60(%rsp),%rdx
movzbl (%rdx,%rdi,1),%edx
or     $0xffffff00,%esi
add    %edx,%esi
sar    %esi
add    %ecx,%esi
sar    %esi
mov    -0x40(%rsp),%rcx
movzbl (%rcx,%rdi,1),%ecx
mov    -0x50(%rsp),%rdx
movzbl (%rdx,%rdi,1),%edx
or     $0xffffff00,%ecx
add    %edx,%ecx
sar    %ecx
add    %ebx,%ecx
sar    %ecx
imul   $0x12a,%eax,%edx
imul   $0x199,%ecx,%eax
add    %edx,%eax
add    $0x80,%eax
sar    $0x8,%eax
imul   $0xffffff9c,%esi,%ebp
imul   $0xffffff30,%ecx,%ecx
lea    (%rdx,%rbp,1),%ebx
add    $0x80,%ebx
add    %ecx,%ebx
cmp    $0xff,%eax
jl     2651 <YUV420_to_RGB+0x1551>
mov    $0xff,%eax
sar    $0x8,%ebx
test   %eax,%eax
jg     265a <YUV420_to_RGB+0x155a>
xor    %eax,%eax
mov    %esi,%ecx
shl    $0x9,%ecx
mov    %al,0x3(%r10)
cmp    $0xff,%ebx
jl     2670 <YUV420_to_RGB+0x1570>
mov    $0xff,%ebx
lea    (%rcx,%rsi,4),%eax
add    %edx,%eax
add    $0x80,%eax
sar    $0x8,%eax
test   %ebx,%ebx
jg     2683 <YUV420_to_RGB+0x1583>
xor    %ebx,%ebx
mov    %bl,0x4(%r10)
cmp    $0xff,%eax
jl     2693 <YUV420_to_RGB+0x1593>
mov    $0xff,%eax
test   %eax,%eax
jg     2500 <YUV420_to_RGB+0x1400>
xor    %eax,%eax
jmp    2500 <YUV420_to_RGB+0x1400>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
add    %r8,%r12
mov    -0x20(%rsp),%r13d
mov    -0x18(%rsp),%r8
jmp    1198 <YUV420_to_RGB+0x98>
xor    %eax,%eax
add    $0xc8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @YUV420_to_RGB(i8* %0, i8* %1, i8* %2, i8* %3, i32 %4, i32 %5) {
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
%19 = alloca i32
%20 = alloca i32
%21 = alloca i8*
%22 = alloca i8*
%23 = alloca i8*
%24 = alloca i8*
store i8* %0, i8** %7
store i8* %1, i8** %8
store i8* %2, i8** %9
store i8* %3, i8** %10
store i32 %4, i32* %11
store i32 %5, i32* %12
store i32 0, i32* %19
br label %25
25: ; preds = %445, %6
%26 = load i32, i32* %19
%27 = load i32, i32* %12
%28 = icmp slt i32 %26, %27
br i1 %28, label %29, label %448
29: ; preds = %25
%30 = load i8*, i8** %8
store i8* %30, i8** %21
%31 = load i8*, i8** %9
store i8* %31, i8** %22
store i32 0, i32* %20
br label %32
32: ; preds = %218, %29
%33 = load i32, i32* %20
%34 = load i32, i32* %11
%35 = icmp slt i32 %33, %34
br i1 %35, label %36, label %221
36: ; preds = %32
%37 = load i8*, i8** %7
%38 = getelementptr inbounds i8, i8* %37, i32 1
store i8* %38, i8** %7
%39 = load i8, i8* %37
%40 = zext i8 %39 to i32
store i32 %40, i32* %16
%41 = load i8*, i8** %8
%42 = load i8, i8* %41
%43 = zext i8 %42 to i32
%44 = sub nsw i32 %43, 128
store i32 %44, i32* %17
%45 = load i8*, i8** %9
%46 = load i8, i8* %45
%47 = zext i8 %46 to i32
%48 = sub nsw i32 %47, 128
store i32 %48, i32* %18
%49 = load i32, i32* %16
%50 = mul nsw i32 298, %49
%51 = load i32, i32* %18
%52 = mul nsw i32 409, %51
%53 = add nsw i32 %50, %52
%54 = add nsw i32 %53, 128
%55 = ashr i32 %54, 8
store i32 %55, i32* %13
%56 = load i32, i32* %16
%57 = mul nsw i32 298, %56
%58 = load i32, i32* %17
%59 = mul nsw i32 100, %58
%60 = sub nsw i32 %57, %59
%61 = load i32, i32* %18
%62 = mul nsw i32 208, %61
%63 = sub nsw i32 %60, %62
%64 = add nsw i32 %63, 128
%65 = ashr i32 %64, 8
store i32 %65, i32* %14
%66 = load i32, i32* %16
%67 = mul nsw i32 298, %66
%68 = load i32, i32* %17
%69 = mul nsw i32 516, %68
%70 = add nsw i32 %67, %69
%71 = add nsw i32 %70, 128
%72 = ashr i32 %71, 8
store i32 %72, i32* %15
%73 = load i32, i32* %13
%74 = icmp slt i32 %73, 0
br i1 %74, label %75, label %76
75: ; preds = %36
br label %84
76: ; preds = %36
%77 = load i32, i32* %13
%78 = icmp sgt i32 %77, 255
br i1 %78, label %79, label %80
79: ; preds = %76
br label %82
80: ; preds = %76
%81 = load i32, i32* %13
br label %82
82: ; preds = %80, %79
%83 = phi i32 [ 255, %79 ], [ %81, %80 ]
br label %84
84: ; preds = %82, %75
%85 = phi i32 [ 0, %75 ], [ %83, %82 ]
%86 = trunc i32 %85 to i8
%87 = load i8*, i8** %10
%88 = getelementptr inbounds i8, i8* %87, i32 1
store i8* %88, i8** %10
store i8 %86, i8* %87
%89 = load i32, i32* %14
%90 = icmp slt i32 %89, 0
br i1 %90, label %91, label %92
91: ; preds = %84
br label %100
92: ; preds = %84
%93 = load i32, i32* %14
%94 = icmp sgt i32 %93, 255
br i1 %94, label %95, label %96
95: ; preds = %92
br label %98
96: ; preds = %92
%97 = load i32, i32* %14
br label %98
98: ; preds = %96, %95
%99 = phi i32 [ 255, %95 ], [ %97, %96 ]
br label %100
100: ; preds = %98, %91
%101 = phi i32 [ 0, %91 ], [ %99, %98 ]
%102 = trunc i32 %101 to i8
%103 = load i8*, i8** %10
%104 = getelementptr inbounds i8, i8* %103, i32 1
store i8* %104, i8** %10
store i8 %102, i8* %103
%105 = load i32, i32* %15
%106 = icmp slt i32 %105, 0
br i1 %106, label %107, label %108
107: ; preds = %100
br label %116
108: ; preds = %100
%109 = load i32, i32* %15
%110 = icmp sgt i32 %109, 255
br i1 %110, label %111, label %112
111: ; preds = %108
br label %114
112: ; preds = %108
%113 = load i32, i32* %15
br label %114
114: ; preds = %112, %111
%115 = phi i32 [ 255, %111 ], [ %113, %112 ]
br label %116
116: ; preds = %114, %107
%117 = phi i32 [ 0, %107 ], [ %115, %114 ]
%118 = trunc i32 %117 to i8
%119 = load i8*, i8** %10
%120 = getelementptr inbounds i8, i8* %119, i32 1
store i8* %120, i8** %10
store i8 %118, i8* %119
%121 = load i32, i32* %20
%122 = load i32, i32* %11
%123 = icmp slt i32 %121, %122
br i1 %123, label %125, label %124
124: ; preds = %116
br label %221
125: ; preds = %116
%126 = load i8*, i8** %7
%127 = getelementptr inbounds i8, i8* %126, i32 1
store i8* %127, i8** %7
%128 = load i8, i8* %126
%129 = zext i8 %128 to i32
store i32 %129, i32* %16
%130 = load i32, i32* %17
%131 = load i8*, i8** %8
%132 = getelementptr inbounds i8, i8* %131, i32 1
store i8* %132, i8** %8
%133 = load i8, i8* %131
%134 = zext i8 %133 to i32
%135 = add nsw i32 %130, %134
%136 = sub nsw i32 %135, 128
%137 = ashr i32 %136, 1
store i32 %137, i32* %17
%138 = load i32, i32* %18
%139 = load i8*, i8** %9
%140 = getelementptr inbounds i8, i8* %139, i32 1
store i8* %140, i8** %9
%141 = load i8, i8* %139
%142 = zext i8 %141 to i32
%143 = add nsw i32 %138, %142
%144 = sub nsw i32 %143, 128
%145 = ashr i32 %144, 1
store i32 %145, i32* %18
%146 = load i32, i32* %16
%147 = mul nsw i32 298, %146
%148 = load i32, i32* %18
%149 = mul nsw i32 409, %148
%150 = add nsw i32 %147, %149
%151 = add nsw i32 %150, 128
%152 = ashr i32 %151, 8
store i32 %152, i32* %13
%153 = load i32, i32* %16
%154 = mul nsw i32 298, %153
%155 = load i32, i32* %17
%156 = mul nsw i32 100, %155
%157 = sub nsw i32 %154, %156
%158 = load i32, i32* %18
%159 = mul nsw i32 208, %158
%160 = sub nsw i32 %157, %159
%161 = add nsw i32 %160, 128
%162 = ashr i32 %161, 8
store i32 %162, i32* %14
%163 = load i32, i32* %16
%164 = mul nsw i32 298, %163
%165 = load i32, i32* %17
%166 = mul nsw i32 516, %165
%167 = add nsw i32 %164, %166
%168 = add nsw i32 %167, 128
%169 = ashr i32 %168, 8
store i32 %169, i32* %15
%170 = load i32, i32* %13
%171 = icmp slt i32 %170, 0
br i1 %171, label %172, label %173
172: ; preds = %125
br label %181
173: ; preds = %125
%174 = load i32, i32* %13
%175 = icmp sgt i32 %174, 255
br i1 %175, label %176, label %177
176: ; preds = %173
br label %179
177: ; preds = %173
%178 = load i32, i32* %13
br label %179
179: ; preds = %177, %176
%180 = phi i32 [ 255, %176 ], [ %178, %177 ]
br label %181
181: ; preds = %179, %172
%182 = phi i32 [ 0, %172 ], [ %180, %179 ]
%183 = trunc i32 %182 to i8
%184 = load i8*, i8** %10
%185 = getelementptr inbounds i8, i8* %184, i32 1
store i8* %185, i8** %10
store i8 %183, i8* %184
%186 = load i32, i32* %14
%187 = icmp slt i32 %186, 0
br i1 %187, label %188, label %189
188: ; preds = %181
br label %197
189: ; preds = %181
%190 = load i32, i32* %14
%191 = icmp sgt i32 %190, 255
br i1 %191, label %192, label %193
192: ; preds = %189
br label %195
193: ; preds = %189
%194 = load i32, i32* %14
br label %195
195: ; preds = %193, %192
%196 = phi i32 [ 255, %192 ], [ %194, %193 ]
br label %197
197: ; preds = %195, %188
%198 = phi i32 [ 0, %188 ], [ %196, %195 ]
%199 = trunc i32 %198 to i8
%200 = load i8*, i8** %10
%201 = getelementptr inbounds i8, i8* %200, i32 1
store i8* %201, i8** %10
store i8 %199, i8* %200
%202 = load i32, i32* %15
%203 = icmp slt i32 %202, 0
br i1 %203, label %204, label %205
204: ; preds = %197
br label %213
205: ; preds = %197
%206 = load i32, i32* %15
%207 = icmp sgt i32 %206, 255
br i1 %207, label %208, label %209
208: ; preds = %205
br label %211
209: ; preds = %205
%210 = load i32, i32* %15
br label %211
211: ; preds = %209, %208
%212 = phi i32 [ 255, %208 ], [ %210, %209 ]
br label %213
213: ; preds = %211, %204
%214 = phi i32 [ 0, %204 ], [ %212, %211 ]
%215 = trunc i32 %214 to i8
%216 = load i8*, i8** %10
%217 = getelementptr inbounds i8, i8* %216, i32 1
store i8* %217, i8** %10
store i8 %215, i8* %216
br label %218
218: ; preds = %213
%219 = load i32, i32* %20
%220 = add nsw i32 %219, 2
store i32 %220, i32* %20
br label %32
221: ; preds = %124, %32
%222 = load i32, i32* %19
%223 = load i32, i32* %12
%224 = icmp slt i32 %222, %223
br i1 %224, label %226, label %225
225: ; preds = %221
br label %448
226: ; preds = %221
%227 = load i8*, i8** %8
store i8* %227, i8** %23
%228 = load i8*, i8** %9
store i8* %228, i8** %24
store i32 0, i32* %20
br label %229
229: ; preds = %441, %226
%230 = load i32, i32* %20
%231 = load i32, i32* %11
%232 = icmp slt i32 %230, %231
br i1 %232, label %233, label %444
233: ; preds = %229
%234 = load i8*, i8** %7
%235 = getelementptr inbounds i8, i8* %234, i32 1
store i8* %235, i8** %7
%236 = load i8, i8* %234
%237 = zext i8 %236 to i32
store i32 %237, i32* %16
%238 = load i8*, i8** %21
%239 = load i8, i8* %238
%240 = zext i8 %239 to i32
%241 = sub nsw i32 %240, 128
%242 = load i8*, i8** %23
%243 = load i8, i8* %242
%244 = zext i8 %243 to i32
%245 = add nsw i32 %241, %244
%246 = sub nsw i32 %245, 128
%247 = ashr i32 %246, 1
store i32 %247, i32* %17
%248 = load i8*, i8** %22
%249 = load i8, i8* %248
%250 = zext i8 %249 to i32
%251 = sub nsw i32 %250, 128
%252 = load i8*, i8** %24
%253 = load i8, i8* %252
%254 = zext i8 %253 to i32
%255 = add nsw i32 %251, %254
%256 = sub nsw i32 %255, 128
%257 = ashr i32 %256, 1
store i32 %257, i32* %18
%258 = load i32, i32* %16
%259 = mul nsw i32 298, %258
%260 = load i32, i32* %18
%261 = mul nsw i32 409, %260
%262 = add nsw i32 %259, %261
%263 = add nsw i32 %262, 128
%264 = ashr i32 %263, 8
store i32 %264, i32* %13
%265 = load i32, i32* %16
%266 = mul nsw i32 298, %265
%267 = load i32, i32* %17
%268 = mul nsw i32 100, %267
%269 = sub nsw i32 %266, %268
%270 = load i32, i32* %18
%271 = mul nsw i32 208, %270
%272 = sub nsw i32 %269, %271
%273 = add nsw i32 %272, 128
%274 = ashr i32 %273, 8
store i32 %274, i32* %14
%275 = load i32, i32* %16
%276 = mul nsw i32 298, %275
%277 = load i32, i32* %17
%278 = mul nsw i32 516, %277
%279 = add nsw i32 %276, %278
%280 = add nsw i32 %279, 128
%281 = ashr i32 %280, 8
store i32 %281, i32* %15
%282 = load i32, i32* %13
%283 = icmp slt i32 %282, 0
br i1 %283, label %284, label %285
284: ; preds = %233
br label %293
285: ; preds = %233
%286 = load i32, i32* %13
%287 = icmp sgt i32 %286, 255
br i1 %287, label %288, label %289
288: ; preds = %285
br label %291
289: ; preds = %285
%290 = load i32, i32* %13
br label %291
291: ; preds = %289, %288
%292 = phi i32 [ 255, %288 ], [ %290, %289 ]
br label %293
293: ; preds = %291, %284
%294 = phi i32 [ 0, %284 ], [ %292, %291 ]
%295 = trunc i32 %294 to i8
%296 = load i8*, i8** %10
%297 = getelementptr inbounds i8, i8* %296, i32 1
store i8* %297, i8** %10
store i8 %295, i8* %296
%298 = load i32, i32* %14
%299 = icmp slt i32 %298, 0
br i1 %299, label %300, label %301
300: ; preds = %293
br label %309
301: ; preds = %293
%302 = load i32, i32* %14
%303 = icmp sgt i32 %302, 255
br i1 %303, label %304, label %305
304: ; preds = %301
br label %307
305: ; preds = %301
%306 = load i32, i32* %14
br label %307
307: ; preds = %305, %304
%308 = phi i32 [ 255, %304 ], [ %306, %305 ]
br label %309
309: ; preds = %307, %300
%310 = phi i32 [ 0, %300 ], [ %308, %307 ]
%311 = trunc i32 %310 to i8
%312 = load i8*, i8** %10
%313 = getelementptr inbounds i8, i8* %312, i32 1
store i8* %313, i8** %10
store i8 %311, i8* %312
%314 = load i32, i32* %15
%315 = icmp slt i32 %314, 0
br i1 %315, label %316, label %317
316: ; preds = %309
br label %325
317: ; preds = %309
%318 = load i32, i32* %15
%319 = icmp sgt i32 %318, 255
br i1 %319, label %320, label %321
320: ; preds = %317
br label %323
321: ; preds = %317
%322 = load i32, i32* %15
br label %323
323: ; preds = %321, %320
%324 = phi i32 [ 255, %320 ], [ %322, %321 ]
br label %325
325: ; preds = %323, %316
%326 = phi i32 [ 0, %316 ], [ %324, %323 ]
%327 = trunc i32 %326 to i8
%328 = load i8*, i8** %10
%329 = getelementptr inbounds i8, i8* %328, i32 1
store i8* %329, i8** %10
store i8 %327, i8* %328
%330 = load i32, i32* %20
%331 = load i32, i32* %11
%332 = icmp slt i32 %330, %331
br i1 %332, label %334, label %333
333: ; preds = %325
br label %444
334: ; preds = %325
%335 = load i8*, i8** %7
%336 = getelementptr inbounds i8, i8* %335, i32 1
store i8* %336, i8** %7
%337 = load i8, i8* %335
%338 = zext i8 %337 to i32
store i32 %338, i32* %16
%339 = load i32, i32* %17
%340 = load i8*, i8** %21
%341 = getelementptr inbounds i8, i8* %340, i32 1
store i8* %341, i8** %21
%342 = load i8, i8* %340
%343 = zext i8 %342 to i32
%344 = sub nsw i32 %343, 128
%345 = load i8*, i8** %23
%346 = getelementptr inbounds i8, i8* %345, i32 1
store i8* %346, i8** %23
%347 = load i8, i8* %345
%348 = zext i8 %347 to i32
%349 = add nsw i32 %344, %348
%350 = sub nsw i32 %349, 128
%351 = ashr i32 %350, 1
%352 = add nsw i32 %339, %351
%353 = ashr i32 %352, 1
store i32 %353, i32* %17
%354 = load i32, i32* %18
%355 = load i8*, i8** %22
%356 = getelementptr inbounds i8, i8* %355, i32 1
store i8* %356, i8** %22
%357 = load i8, i8* %355
%358 = zext i8 %357 to i32
%359 = sub nsw i32 %358, 128
%360 = load i8*, i8** %24
%361 = getelementptr inbounds i8, i8* %360, i32 1
store i8* %361, i8** %24
%362 = load i8, i8* %360
%363 = zext i8 %362 to i32
%364 = add nsw i32 %359, %363
%365 = sub nsw i32 %364, 128
%366 = ashr i32 %365, 1
%367 = add nsw i32 %354, %366
%368 = ashr i32 %367, 1
store i32 %368, i32* %18
%369 = load i32, i32* %16
%370 = mul nsw i32 298, %369
%371 = load i32, i32* %18
%372 = mul nsw i32 409, %371
%373 = add nsw i32 %370, %372
%374 = add nsw i32 %373, 128
%375 = ashr i32 %374, 8
store i32 %375, i32* %13
%376 = load i32, i32* %16
%377 = mul nsw i32 298, %376
%378 = load i32, i32* %17
%379 = mul nsw i32 100, %378
%380 = sub nsw i32 %377, %379
%381 = load i32, i32* %18
%382 = mul nsw i32 208, %381
%383 = sub nsw i32 %380, %382
%384 = add nsw i32 %383, 128
%385 = ashr i32 %384, 8
store i32 %385, i32* %14
%386 = load i32, i32* %16
%387 = mul nsw i32 298, %386
%388 = load i32, i32* %17
%389 = mul nsw i32 516, %388
%390 = add nsw i32 %387, %389
%391 = add nsw i32 %390, 128
%392 = ashr i32 %391, 8
store i32 %392, i32* %15
%393 = load i32, i32* %13
%394 = icmp slt i32 %393, 0
br i1 %394, label %395, label %396
395: ; preds = %334
br label %404
396: ; preds = %334
%397 = load i32, i32* %13
%398 = icmp sgt i32 %397, 255
br i1 %398, label %399, label %400
399: ; preds = %396
br label %402
400: ; preds = %396
%401 = load i32, i32* %13
br label %402
402: ; preds = %400, %399
%403 = phi i32 [ 255, %399 ], [ %401, %400 ]
br label %404
404: ; preds = %402, %395
%405 = phi i32 [ 0, %395 ], [ %403, %402 ]
%406 = trunc i32 %405 to i8
%407 = load i8*, i8** %10
%408 = getelementptr inbounds i8, i8* %407, i32 1
store i8* %408, i8** %10
store i8 %406, i8* %407
%409 = load i32, i32* %14
%410 = icmp slt i32 %409, 0
br i1 %410, label %411, label %412
411: ; preds = %404
br label %420
412: ; preds = %404
%413 = load i32, i32* %14
%414 = icmp sgt i32 %413, 255
br i1 %414, label %415, label %416
415: ; preds = %412
br label %418
416: ; preds = %412
%417 = load i32, i32* %14
br label %418
418: ; preds = %416, %415
%419 = phi i32 [ 255, %415 ], [ %417, %416 ]
br label %420
420: ; preds = %418, %411
%421 = phi i32 [ 0, %411 ], [ %419, %418 ]
%422 = trunc i32 %421 to i8
%423 = load i8*, i8** %10
%424 = getelementptr inbounds i8, i8* %423, i32 1
store i8* %424, i8** %10
store i8 %422, i8* %423
%425 = load i32, i32* %15
%426 = icmp slt i32 %425, 0
br i1 %426, label %427, label %428
427: ; preds = %420
br label %436
428: ; preds = %420
%429 = load i32, i32* %15
%430 = icmp sgt i32 %429, 255
br i1 %430, label %431, label %432
431: ; preds = %428
br label %434
432: ; preds = %428
%433 = load i32, i32* %15
br label %434
434: ; preds = %432, %431
%435 = phi i32 [ 255, %431 ], [ %433, %432 ]
br label %436
436: ; preds = %434, %427
%437 = phi i32 [ 0, %427 ], [ %435, %434 ]
%438 = trunc i32 %437 to i8
%439 = load i8*, i8** %10
%440 = getelementptr inbounds i8, i8* %439, i32 1
store i8* %440, i8** %10
store i8 %438, i8* %439
br label %441
441: ; preds = %436
%442 = load i32, i32* %20
%443 = add nsw i32 %442, 2
store i32 %443, i32* %20
br label %229
444: ; preds = %333, %229
br label %445
445: ; preds = %444
%446 = load i32, i32* %19
%447 = add nsw i32 %446, 2
store i32 %447, i32* %19
br label %25
448: ; preds = %225, %25
ret i32 0
}

LLVM IR (-O2):
define i32 @YUV420_to_RGB(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2, i8* nocapture writeonly %3, i32 %4, i32 %5) {
%7 = icmp sgt i32 %5, 0
br i1 %7, label %8, label %563
8: ; preds = %6
%9 = icmp sgt i32 %4, 0
%10 = add i32 %4, -1
%11 = lshr i32 %10, 1
%12 = zext i32 %11 to i64
%13 = mul nuw nsw i64 %12, 6
%14 = add nuw nsw i64 %13, 6
%15 = shl nuw nsw i64 %12, 1
%16 = add nuw nsw i64 %15, 2
%17 = add nuw nsw i64 %12, 1
%18 = add i32 %4, -1
%19 = lshr i32 %18, 1
%20 = add nuw i32 %19, 1
%21 = zext i32 %20 to i64
%22 = lshr i32 %18, 1
%23 = zext i32 %22 to i64
%24 = mul nuw nsw i64 %23, 6
%25 = add nuw nsw i64 %24, 6
%26 = shl nuw nsw i64 %23, 1
%27 = add nuw nsw i64 %26, 2
%28 = add nuw nsw i64 %23, 1
%29 = add i32 %4, -1
%30 = lshr i32 %29, 1
%31 = add nuw i32 %30, 1
%32 = zext i32 %31 to i64
%33 = icmp ult i32 %29, 30
%34 = and i64 %32, 4294967280
%35 = trunc i64 %34 to i32
%36 = shl i32 %35, 1
%37 = shl nuw nsw i64 %34, 1
%38 = mul nuw nsw i64 %34, 6
%39 = icmp eq i64 %34, %32
%40 = icmp ult i32 %18, 30
%41 = and i64 %21, 4294967280
%42 = trunc i64 %41 to i32
%43 = shl i32 %42, 1
%44 = shl nuw nsw i64 %41, 1
%45 = mul nuw nsw i64 %41, 6
%46 = icmp eq i64 %41, %21
br label %47
47: ; preds = %8, %556
%48 = phi i32 [ 0, %8 ], [ %561, %556 ]
%49 = phi i8* [ %0, %8 ], [ %560, %556 ]
%50 = phi i8* [ %1, %8 ], [ %557, %556 ]
%51 = phi i8* [ %3, %8 ], [ %559, %556 ]
%52 = phi i8* [ %2, %8 ], [ %558, %556 ]
br i1 %9, label %53, label %556
53: ; preds = %47
br i1 %33, label %174, label %54
54: ; preds = %53
%55 = getelementptr i8, i8* %51, i64 %25
%56 = getelementptr i8, i8* %49, i64 %27
%57 = getelementptr i8, i8* %50, i64 %28
%58 = getelementptr i8, i8* %52, i64 %28
%59 = icmp ult i8* %51, %56
%60 = icmp ult i8* %49, %55
%61 = and i1 %59, %60
%62 = icmp ult i8* %51, %57
%63 = icmp ult i8* %50, %55
%64 = and i1 %62, %63
%65 = or i1 %61, %64
%66 = icmp ult i8* %51, %58
%67 = icmp ult i8* %52, %55
%68 = and i1 %66, %67
%69 = or i1 %65, %68
br i1 %69, label %174, label %70
70: ; preds = %54
%71 = getelementptr i8, i8* %49, i64 %37
%72 = getelementptr i8, i8* %50, i64 %34
%73 = getelementptr i8, i8* %51, i64 %38
%74 = getelementptr i8, i8* %52, i64 %34
br label %75
75: ; preds = %75, %70
%76 = phi i64 [ 0, %70 ], [ %171, %75 ]
%77 = shl i64 %76, 1
%78 = getelementptr i8, i8* %49, i64 %77
%79 = getelementptr i8, i8* %50, i64 %76
%80 = mul i64 %76, 6
%81 = getelementptr i8, i8* %52, i64 %76
%82 = bitcast i8* %78 to <32 x i8>*
%83 = load <32 x i8>, <32 x i8>* %82
%84 = shufflevector <32 x i8> %83, <32 x i8> poison, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
%85 = shufflevector <32 x i8> %83, <32 x i8> poison, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
%86 = zext <16 x i8> %84 to <16 x i32>
%87 = bitcast i8* %79 to <16 x i8>*
%88 = load <16 x i8>, <16 x i8>* %87
%89 = zext <16 x i8> %88 to <16 x i32>
%90 = add nsw <16 x i32> %89, <i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128>
%91 = bitcast i8* %81 to <16 x i8>*
%92 = load <16 x i8>, <16 x i8>* %91
%93 = zext <16 x i8> %92 to <16 x i32>
%94 = add nsw <16 x i32> %93, <i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128, i32 -128>
%95 = mul nuw nsw <16 x i32> %86, <i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298>
%96 = mul nsw <16 x i32> %94, <i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409>
%97 = add nuw nsw <16 x i32> %95, <i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128>
%98 = add nsw <16 x i32> %97, %96
%99 = ashr <16 x i32> %98, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%100 = mul nsw <16 x i32> %90, <i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100>
%101 = mul nsw <16 x i32> %94, <i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208>
%102 = add nsw <16 x i32> %97, %100
%103 = add nsw <16 x i32> %102, %101
%104 = ashr <16 x i32> %103, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%105 = mul nsw <16 x i32> %90, <i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516>
%106 = add nsw <16 x i32> %97, %105
%107 = ashr <16 x i32> %106, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%108 = icmp slt <16 x i32> %99, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%109 = select <16 x i1> %108, <16 x i32> %99, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%110 = icmp sgt <16 x i32> %109, zeroinitializer
%111 = select <16 x i1> %110, <16 x i32> %109, <16 x i32> zeroinitializer
%112 = trunc <16 x i32> %111 to <16 x i8>
%113 = icmp slt <16 x i32> %104, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%114 = select <16 x i1> %113, <16 x i32> %104, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%115 = icmp sgt <16 x i32> %114, zeroinitializer
%116 = select <16 x i1> %115, <16 x i32> %114, <16 x i32> zeroinitializer
%117 = trunc <16 x i32> %116 to <16 x i8>
%118 = icmp slt <16 x i32> %107, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%119 = select <16 x i1> %118, <16 x i32> %107, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%120 = icmp sgt <16 x i32> %119, zeroinitializer
%121 = select <16 x i1> %120, <16 x i32> %119, <16 x i32> zeroinitializer
%122 = trunc <16 x i32> %121 to <16 x i8>
%123 = zext <16 x i8> %85 to <16 x i32>
%124 = bitcast i8* %79 to <16 x i8>*
%125 = load <16 x i8>, <16 x i8>* %124
%126 = zext <16 x i8> %125 to <16 x i32>
%127 = or <16 x i32> %89, <i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256>
%128 = add nsw <16 x i32> %127, %126
%129 = ashr <16 x i32> %128, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%130 = bitcast i8* %81 to <16 x i8>*
%131 = load <16 x i8>, <16 x i8>* %130
%132 = zext <16 x i8> %131 to <16 x i32>
%133 = or <16 x i32> %93, <i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256>
%134 = add nsw <16 x i32> %133, %132
%135 = ashr <16 x i32> %134, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%136 = mul nuw nsw <16 x i32> %123, <i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298>
%137 = mul nsw <16 x i32> %135, <i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409>
%138 = add nuw nsw <16 x i32> %136, <i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128>
%139 = add nsw <16 x i32> %138, %137
%140 = ashr <16 x i32> %139, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%141 = mul nsw <16 x i32> %129, <i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100>
%142 = mul nsw <16 x i32> %135, <i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208>
%143 = add nsw <16 x i32> %138, %141
%144 = add nsw <16 x i32> %143, %142
%145 = ashr <16 x i32> %144, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%146 = mul nsw <16 x i32> %129, <i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516>
%147 = add nsw <16 x i32> %138, %146
%148 = ashr <16 x i32> %147, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%149 = icmp slt <16 x i32> %140, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%150 = select <16 x i1> %149, <16 x i32> %140, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%151 = icmp sgt <16 x i32> %150, zeroinitializer
%152 = select <16 x i1> %151, <16 x i32> %150, <16 x i32> zeroinitializer
%153 = trunc <16 x i32> %152 to <16 x i8>
%154 = icmp slt <16 x i32> %145, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%155 = select <16 x i1> %154, <16 x i32> %145, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%156 = icmp sgt <16 x i32> %155, zeroinitializer
%157 = select <16 x i1> %156, <16 x i32> %155, <16 x i32> zeroinitializer
%158 = trunc <16 x i32> %157 to <16 x i8>
%159 = icmp slt <16 x i32> %148, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%160 = select <16 x i1> %159, <16 x i32> %148, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%161 = icmp sgt <16 x i32> %160, zeroinitializer
%162 = select <16 x i1> %161, <16 x i32> %160, <16 x i32> zeroinitializer
%163 = trunc <16 x i32> %162 to <16 x i8>
%164 = getelementptr inbounds i8, i8* %51, i64 %80
%165 = bitcast i8* %164 to <96 x i8>*
%166 = shufflevector <16 x i8> %112, <16 x i8> %117, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%167 = shufflevector <16 x i8> %122, <16 x i8> %153, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%168 = shufflevector <32 x i8> %166, <32 x i8> %167, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%169 = shufflevector <16 x i8> %158, <16 x i8> %163, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%170 = shufflevector <64 x i8> %168, <64 x i8> %169, <96 x i32> <i32 0, i32 16, i32 32, i32 48, i32 64, i32 80, i32 1, i32 17, i32 33, i32 49, i32 65, i32 81, i32 2, i32 18, i32 34, i32 50, i32 66, i32 82, i32 3, i32 19, i32 35, i32 51, i32 67, i32 83, i32 4, i32 20, i32 36, i32 52, i32 68, i32 84, i32 5, i32 21, i32 37, i32 53, i32 69, i32 85, i32 6, i32 22, i32 38, i32 54, i32 70, i32 86, i32 7, i32 23, i32 39, i32 55, i32 71, i32 87, i32 8, i32 24, i32 40, i32 56, i32 72, i32 88, i32 9, i32 25, i32 41, i32 57, i32 73, i32 89, i32 10, i32 26, i32 42, i32 58, i32 74, i32 90, i32 11, i32 27, i32 43, i32 59, i32 75, i32 91, i32 12, i32 28, i32 44, i32 60, i32 76, i32 92, i32 13, i32 29, i32 45, i32 61, i32 77, i32 93, i32 14, i32 30, i32 46, i32 62, i32 78, i32 94, i32 15, i32 31, i32 47, i32 63, i32 79, i32 95>
store <96 x i8> %170, <96 x i8>* %165
%171 = add nuw i64 %76, 16
%172 = icmp eq i64 %171, %34
br i1 %172, label %173, label %75
173: ; preds = %75
br i1 %39, label %180, label %174
174: ; preds = %54, %53, %173
%175 = phi i32 [ 0, %54 ], [ 0, %53 ], [ %36, %173 ]
%176 = phi i8* [ %49, %54 ], [ %49, %53 ], [ %71, %173 ]
%177 = phi i8* [ %50, %54 ], [ %50, %53 ], [ %72, %173 ]
%178 = phi i8* [ %51, %54 ], [ %51, %53 ], [ %73, %173 ]
%179 = phi i8* [ %52, %54 ], [ %52, %53 ], [ %74, %173 ]
br label %348
180: ; preds = %348, %173
%181 = phi i8* [ %71, %173 ], [ %394, %348 ]
%182 = phi i8* [ %72, %173 ], [ %397, %348 ]
%183 = phi i8* [ %74, %173 ], [ %403, %348 ]
%184 = phi i8* [ %73, %173 ], [ %439, %348 ]
br i1 %9, label %185, label %556
185: ; preds = %180
br i1 %40, label %340, label %186
186: ; preds = %185
%187 = getelementptr i8, i8* %184, i64 %14
%188 = getelementptr i8, i8* %181, i64 %16
%189 = getelementptr i8, i8* %182, i64 %17
%190 = getelementptr i8, i8* %50, i64 %17
%191 = getelementptr i8, i8* %183, i64 %17
%192 = getelementptr i8, i8* %52, i64 %17
%193 = icmp ult i8* %184, %188
%194 = icmp ult i8* %181, %187
%195 = and i1 %193, %194
%196 = icmp ult i8* %184, %189
%197 = icmp ult i8* %182, %187
%198 = and i1 %196, %197
%199 = or i1 %195, %198
%200 = icmp ult i8* %184, %190
%201 = icmp ult i8* %50, %187
%202 = and i1 %200, %201
%203 = or i1 %199, %202
%204 = icmp ult i8* %184, %191
%205 = icmp ult i8* %183, %187
%206 = and i1 %204, %205
%207 = or i1 %203, %206
%208 = icmp ult i8* %184, %192
%209 = icmp ult i8* %52, %187
%210 = and i1 %208, %209
%211 = or i1 %207, %210
br i1 %211, label %340, label %212
212: ; preds = %186
%213 = getelementptr i8, i8* %183, i64 %41
%214 = getelementptr i8, i8* %182, i64 %41
%215 = getelementptr i8, i8* %52, i64 %41
%216 = getelementptr i8, i8* %50, i64 %41
%217 = getelementptr i8, i8* %181, i64 %44
%218 = getelementptr i8, i8* %184, i64 %45
br label %219
219: ; preds = %219, %212
%220 = phi i64 [ 0, %212 ], [ %337, %219 ]
%221 = getelementptr i8, i8* %183, i64 %220
%222 = getelementptr i8, i8* %182, i64 %220
%223 = getelementptr i8, i8* %52, i64 %220
%224 = getelementptr i8, i8* %50, i64 %220
%225 = shl i64 %220, 1
%226 = getelementptr i8, i8* %181, i64 %225
%227 = mul i64 %220, 6
%228 = bitcast i8* %226 to <32 x i8>*
%229 = load <32 x i8>, <32 x i8>* %228
%230 = shufflevector <32 x i8> %229, <32 x i8> poison, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
%231 = shufflevector <32 x i8> %229, <32 x i8> poison, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
%232 = zext <16 x i8> %230 to <16 x i32>
%233 = bitcast i8* %224 to <16 x i8>*
%234 = load <16 x i8>, <16 x i8>* %233
%235 = zext <16 x i8> %234 to <16 x i32>
%236 = bitcast i8* %222 to <16 x i8>*
%237 = load <16 x i8>, <16 x i8>* %236
%238 = zext <16 x i8> %237 to <16 x i32>
%239 = or <16 x i32> %235, <i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256>
%240 = add nsw <16 x i32> %239, %238
%241 = ashr <16 x i32> %240, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%242 = bitcast i8* %223 to <16 x i8>*
%243 = load <16 x i8>, <16 x i8>* %242
%244 = zext <16 x i8> %243 to <16 x i32>
%245 = bitcast i8* %221 to <16 x i8>*
%246 = load <16 x i8>, <16 x i8>* %245
%247 = zext <16 x i8> %246 to <16 x i32>
%248 = or <16 x i32> %244, <i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256>
%249 = add nsw <16 x i32> %248, %247
%250 = ashr <16 x i32> %249, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%251 = mul nuw nsw <16 x i32> %232, <i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298>
%252 = mul nsw <16 x i32> %250, <i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409>
%253 = add nuw nsw <16 x i32> %251, <i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128>
%254 = add nsw <16 x i32> %253, %252
%255 = ashr <16 x i32> %254, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%256 = mul nsw <16 x i32> %241, <i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100>
%257 = mul nsw <16 x i32> %250, <i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208>
%258 = add nsw <16 x i32> %253, %256
%259 = add nsw <16 x i32> %258, %257
%260 = ashr <16 x i32> %259, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%261 = mul nsw <16 x i32> %241, <i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516>
%262 = add nsw <16 x i32> %253, %261
%263 = ashr <16 x i32> %262, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%264 = icmp slt <16 x i32> %255, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%265 = select <16 x i1> %264, <16 x i32> %255, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%266 = icmp sgt <16 x i32> %265, zeroinitializer
%267 = select <16 x i1> %266, <16 x i32> %265, <16 x i32> zeroinitializer
%268 = trunc <16 x i32> %267 to <16 x i8>
%269 = icmp slt <16 x i32> %260, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%270 = select <16 x i1> %269, <16 x i32> %260, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%271 = icmp sgt <16 x i32> %270, zeroinitializer
%272 = select <16 x i1> %271, <16 x i32> %270, <16 x i32> zeroinitializer
%273 = trunc <16 x i32> %272 to <16 x i8>
%274 = icmp slt <16 x i32> %263, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%275 = select <16 x i1> %274, <16 x i32> %263, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%276 = icmp sgt <16 x i32> %275, zeroinitializer
%277 = select <16 x i1> %276, <16 x i32> %275, <16 x i32> zeroinitializer
%278 = trunc <16 x i32> %277 to <16 x i8>
%279 = zext <16 x i8> %231 to <16 x i32>
%280 = bitcast i8* %224 to <16 x i8>*
%281 = load <16 x i8>, <16 x i8>* %280
%282 = zext <16 x i8> %281 to <16 x i32>
%283 = bitcast i8* %222 to <16 x i8>*
%284 = load <16 x i8>, <16 x i8>* %283
%285 = zext <16 x i8> %284 to <16 x i32>
%286 = or <16 x i32> %282, <i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256>
%287 = add nsw <16 x i32> %286, %285
%288 = ashr <16 x i32> %287, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%289 = add nsw <16 x i32> %288, %241
%290 = ashr <16 x i32> %289, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%291 = bitcast i8* %223 to <16 x i8>*
%292 = load <16 x i8>, <16 x i8>* %291
%293 = zext <16 x i8> %292 to <16 x i32>
%294 = bitcast i8* %221 to <16 x i8>*
%295 = load <16 x i8>, <16 x i8>* %294
%296 = zext <16 x i8> %295 to <16 x i32>
%297 = or <16 x i32> %293, <i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256, i32 -256>
%298 = add nsw <16 x i32> %297, %296
%299 = ashr <16 x i32> %298, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%300 = add nsw <16 x i32> %299, %250
%301 = ashr <16 x i32> %300, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
%302 = mul nuw nsw <16 x i32> %279, <i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298, i32 298>
%303 = mul nsw <16 x i32> %301, <i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409, i32 409>
%304 = add nuw nsw <16 x i32> %302, <i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128, i32 128>
%305 = add nsw <16 x i32> %304, %303
%306 = ashr <16 x i32> %305, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%307 = mul nsw <16 x i32> %290, <i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100, i32 -100>
%308 = mul nsw <16 x i32> %301, <i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208, i32 -208>
%309 = add nsw <16 x i32> %304, %307
%310 = add nsw <16 x i32> %309, %308
%311 = ashr <16 x i32> %310, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%312 = mul nsw <16 x i32> %290, <i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516, i32 516>
%313 = add nsw <16 x i32> %304, %312
%314 = ashr <16 x i32> %313, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
%315 = icmp slt <16 x i32> %306, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%316 = select <16 x i1> %315, <16 x i32> %306, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%317 = icmp sgt <16 x i32> %316, zeroinitializer
%318 = select <16 x i1> %317, <16 x i32> %316, <16 x i32> zeroinitializer
%319 = trunc <16 x i32> %318 to <16 x i8>
%320 = icmp slt <16 x i32> %311, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%321 = select <16 x i1> %320, <16 x i32> %311, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%322 = icmp sgt <16 x i32> %321, zeroinitializer
%323 = select <16 x i1> %322, <16 x i32> %321, <16 x i32> zeroinitializer
%324 = trunc <16 x i32> %323 to <16 x i8>
%325 = icmp slt <16 x i32> %314, <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%326 = select <16 x i1> %325, <16 x i32> %314, <16 x i32> <i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255, i32 255>
%327 = icmp sgt <16 x i32> %326, zeroinitializer
%328 = select <16 x i1> %327, <16 x i32> %326, <16 x i32> zeroinitializer
%329 = trunc <16 x i32> %328 to <16 x i8>
%330 = getelementptr inbounds i8, i8* %184, i64 %227
%331 = bitcast i8* %330 to <96 x i8>*
%332 = shufflevector <16 x i8> %268, <16 x i8> %273, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%333 = shufflevector <16 x i8> %278, <16 x i8> %319, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%334 = shufflevector <32 x i8> %332, <32 x i8> %333, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%335 = shufflevector <16 x i8> %324, <16 x i8> %329, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%336 = shufflevector <64 x i8> %334, <64 x i8> %335, <96 x i32> <i32 0, i32 16, i32 32, i32 48, i32 64, i32 80, i32 1, i32 17, i32 33, i32 49, i32 65, i32 81, i32 2, i32 18, i32 34, i32 50, i32 66, i32 82, i32 3, i32 19, i32 35, i32 51, i32 67, i32 83, i32 4, i32 20, i32 36, i32 52, i32 68, i32 84, i32 5, i32 21, i32 37, i32 53, i32 69, i32 85, i32 6, i32 22, i32 38, i32 54, i32 70, i32 86, i32 7, i32 23, i32 39, i32 55, i32 71, i32 87, i32 8, i32 24, i32 40, i32 56, i32 72, i32 88, i32 9, i32 25, i32 41, i32 57, i32 73, i32 89, i32 10, i32 26, i32 42, i32 58, i32 74, i32 90, i32 11, i32 27, i32 43, i32 59, i32 75, i32 91, i32 12, i32 28, i32 44, i32 60, i32 76, i32 92, i32 13, i32 29, i32 45, i32 61, i32 77, i32 93, i32 14, i32 30, i32 46, i32 62, i32 78, i32 94, i32 15, i32 31, i32 47, i32 63, i32 79, i32 95>
store <96 x i8> %336, <96 x i8>* %331
%337 = add nuw i64 %220, 16
%338 = icmp eq i64 %337, %41
br i1 %338, label %339, label %219
339: ; preds = %219
br i1 %46, label %556, label %340
340: ; preds = %186, %185, %339
%341 = phi i8* [ %183, %186 ], [ %183, %185 ], [ %213, %339 ]
%342 = phi i8* [ %182, %186 ], [ %182, %185 ], [ %214, %339 ]
%343 = phi i8* [ %52, %186 ], [ %52, %185 ], [ %215, %339 ]
%344 = phi i8* [ %50, %186 ], [ %50, %185 ], [ %216, %339 ]
%345 = phi i32 [ 0, %186 ], [ 0, %185 ], [ %43, %339 ]
%346 = phi i8* [ %181, %186 ], [ %181, %185 ], [ %217, %339 ]
%347 = phi i8* [ %184, %186 ], [ %184, %185 ], [ %218, %339 ]
br label %442
348: ; preds = %174, %348
%349 = phi i32 [ %440, %348 ], [ %175, %174 ]
%350 = phi i8* [ %394, %348 ], [ %176, %174 ]
%351 = phi i8* [ %397, %348 ], [ %177, %174 ]
%352 = phi i8* [ %439, %348 ], [ %178, %174 ]
%353 = phi i8* [ %403, %348 ], [ %179, %174 ]
%354 = load i8, i8* %350
%355 = zext i8 %354 to i32
%356 = load i8, i8* %351
%357 = zext i8 %356 to i32
%358 = add nsw i32 %357, -128
%359 = load i8, i8* %353
%360 = zext i8 %359 to i32
%361 = add nsw i32 %360, -128
%362 = mul nuw nsw i32 %355, 298
%363 = mul nsw i32 %361, 409
%364 = add nuw nsw i32 %362, 128
%365 = add nsw i32 %364, %363
%366 = ashr i32 %365, 8
%367 = mul nsw i32 %358, -100
%368 = mul nsw i32 %361, -208
%369 = add nsw i32 %364, %367
%370 = add nsw i32 %369, %368
%371 = ashr i32 %370, 8
%372 = mul nsw i32 %358, 516
%373 = add nsw i32 %364, %372
%374 = ashr i32 %373, 8
%375 = icmp slt i32 %366, 255
%376 = select i1 %375, i32 %366, i32 255
%377 = icmp sgt i32 %376, 0
%378 = select i1 %377, i32 %376, i32 0
%379 = trunc i32 %378 to i8
%380 = getelementptr inbounds i8, i8* %352, i64 1
store i8 %379, i8* %352
%381 = icmp slt i32 %371, 255
%382 = select i1 %381, i32 %371, i32 255
%383 = icmp sgt i32 %382, 0
%384 = select i1 %383, i32 %382, i32 0
%385 = trunc i32 %384 to i8
%386 = getelementptr inbounds i8, i8* %352, i64 2
store i8 %385, i8* %380
%387 = icmp slt i32 %374, 255
%388 = select i1 %387, i32 %374, i32 255
%389 = icmp sgt i32 %388, 0
%390 = select i1 %389, i32 %388, i32 0
%391 = trunc i32 %390 to i8
store i8 %391, i8* %386
%392 = getelementptr inbounds i8, i8* %352, i64 3
%393 = getelementptr inbounds i8, i8* %350, i64 1
%394 = getelementptr inbounds i8, i8* %350, i64 2
%395 = load i8, i8* %393
%396 = zext i8 %395 to i32
%397 = getelementptr inbounds i8, i8* %351, i64 1
%398 = load i8, i8* %351
%399 = zext i8 %398 to i32
%400 = or i32 %357, -256
%401 = add nsw i32 %400, %399
%402 = ashr i32 %401, 1
%403 = getelementptr inbounds i8, i8* %353, i64 1
%404 = load i8, i8* %353
%405 = zext i8 %404 to i32
%406 = or i32 %360, -256
%407 = add nsw i32 %406, %405
%408 = ashr i32 %407, 1
%409 = mul nuw nsw i32 %396, 298
%410 = mul nsw i32 %408, 409
%411 = add nuw nsw i32 %409, 128
%412 = add nsw i32 %411, %410
%413 = ashr i32 %412, 8
%414 = mul nsw i32 %402, -100
%415 = mul nsw i32 %408, -208
%416 = add nsw i32 %411, %414
%417 = add nsw i32 %416, %415
%418 = ashr i32 %417, 8
%419 = mul nsw i32 %402, 516
%420 = add nsw i32 %411, %419
%421 = ashr i32 %420, 8
%422 = icmp slt i32 %413, 255
%423 = select i1 %422, i32 %413, i32 255
%424 = icmp sgt i32 %423, 0
%425 = select i1 %424, i32 %423, i32 0
%426 = trunc i32 %425 to i8
%427 = getelementptr inbounds i8, i8* %352, i64 4
store i8 %426, i8* %392
%428 = icmp slt i32 %418, 255
%429 = select i1 %428, i32 %418, i32 255
%430 = icmp sgt i32 %429, 0
%431 = select i1 %430, i32 %429, i32 0
%432 = trunc i32 %431 to i8
%433 = getelementptr inbounds i8, i8* %352, i64 5
store i8 %432, i8* %427
%434 = icmp slt i32 %421, 255
%435 = select i1 %434, i32 %421, i32 255
%436 = icmp sgt i32 %435, 0
%437 = select i1 %436, i32 %435, i32 0
%438 = trunc i32 %437 to i8
%439 = getelementptr inbounds i8, i8* %352, i64 6
store i8 %438, i8* %433
%440 = add nuw nsw i32 %349, 2
%441 = icmp slt i32 %440, %4
br i1 %441, label %348, label %180
442: ; preds = %340, %442
%443 = phi i8* [ %515, %442 ], [ %341, %340 ]
%444 = phi i8* [ %504, %442 ], [ %342, %340 ]
%445 = phi i8* [ %512, %442 ], [ %343, %340 ]
%446 = phi i8* [ %501, %442 ], [ %344, %340 ]
%447 = phi i32 [ %554, %442 ], [ %345, %340 ]
%448 = phi i8* [ %498, %442 ], [ %346, %340 ]
%449 = phi i8* [ %553, %442 ], [ %347, %340 ]
%450 = load i8, i8* %448
%451 = zext i8 %450 to i32
%452 = load i8, i8* %446
%453 = zext i8 %452 to i32
%454 = load i8, i8* %444
%455 = zext i8 %454 to i32
%456 = or i32 %453, -256
%457 = add nsw i32 %456, %455
%458 = ashr i32 %457, 1
%459 = load i8, i8* %445
%460 = zext i8 %459 to i32
%461 = load i8, i8* %443
%462 = zext i8 %461 to i32
%463 = or i32 %460, -256
%464 = add nsw i32 %463, %462
%465 = ashr i32 %464, 1
%466 = mul nuw nsw i32 %451, 298
%467 = mul nsw i32 %465, 409
%468 = add nuw nsw i32 %466, 128
%469 = add nsw i32 %468, %467
%470 = ashr i32 %469, 8
%471 = mul nsw i32 %458, -100
%472 = mul nsw i32 %465, -208
%473 = add nsw i32 %468, %471
%474 = add nsw i32 %473, %472
%475 = ashr i32 %474, 8
%476 = mul nsw i32 %458, 516
%477 = add nsw i32 %468, %476
%478 = ashr i32 %477, 8
%479 = icmp slt i32 %470, 255
%480 = select i1 %479, i32 %470, i32 255
%481 = icmp sgt i32 %480, 0
%482 = select i1 %481, i32 %480, i32 0
%483 = trunc i32 %482 to i8
%484 = getelementptr inbounds i8, i8* %449, i64 1
store i8 %483, i8* %449
%485 = icmp slt i32 %475, 255
%486 = select i1 %485, i32 %475, i32 255
%487 = icmp sgt i32 %486, 0
%488 = select i1 %487, i32 %486, i32 0
%489 = trunc i32 %488 to i8
%490 = getelementptr inbounds i8, i8* %449, i64 2
store i8 %489, i8* %484
%491 = icmp slt i32 %478, 255
%492 = select i1 %491, i32 %478, i32 255
%493 = icmp sgt i32 %492, 0
%494 = select i1 %493, i32 %492, i32 0
%495 = trunc i32 %494 to i8
store i8 %495, i8* %490
%496 = getelementptr inbounds i8, i8* %449, i64 3
%497 = getelementptr inbounds i8, i8* %448, i64 1
%498 = getelementptr inbounds i8, i8* %448, i64 2
%499 = load i8, i8* %497
%500 = zext i8 %499 to i32
%501 = getelementptr inbounds i8, i8* %446, i64 1
%502 = load i8, i8* %446
%503 = zext i8 %502 to i32
%504 = getelementptr inbounds i8, i8* %444, i64 1
%505 = load i8, i8* %444
%506 = zext i8 %505 to i32
%507 = or i32 %503, -256
%508 = add nsw i32 %507, %506
%509 = ashr i32 %508, 1
%510 = add nsw i32 %509, %458
%511 = ashr i32 %510, 1
%512 = getelementptr inbounds i8, i8* %445, i64 1
%513 = load i8, i8* %445
%514 = zext i8 %513 to i32
%515 = getelementptr inbounds i8, i8* %443, i64 1
%516 = load i8, i8* %443
%517 = zext i8 %516 to i32
%518 = or i32 %514, -256
%519 = add nsw i32 %518, %517
%520 = ashr i32 %519, 1
%521 = add nsw i32 %520, %465
%522 = ashr i32 %521, 1
%523 = mul nuw nsw i32 %500, 298
%524 = mul nsw i32 %522, 409
%525 = add nuw nsw i32 %523, 128
%526 = add nsw i32 %525, %524
%527 = ashr i32 %526, 8
%528 = mul nsw i32 %511, -100
%529 = mul nsw i32 %522, -208
%530 = add nsw i32 %525, %528
%531 = add nsw i32 %530, %529
%532 = ashr i32 %531, 8
%533 = mul nsw i32 %511, 516
%534 = add nsw i32 %525, %533
%535 = ashr i32 %534, 8
%536 = icmp slt i32 %527, 255
%537 = select i1 %536, i32 %527, i32 255
%538 = icmp sgt i32 %537, 0
%539 = select i1 %538, i32 %537, i32 0
%540 = trunc i32 %539 to i8
%541 = getelementptr inbounds i8, i8* %449, i64 4
store i8 %540, i8* %496
%542 = icmp slt i32 %532, 255
%543 = select i1 %542, i32 %532, i32 255
%544 = icmp sgt i32 %543, 0
%545 = select i1 %544, i32 %543, i32 0
%546 = trunc i32 %545 to i8
%547 = getelementptr inbounds i8, i8* %449, i64 5
store i8 %546, i8* %541
%548 = icmp slt i32 %535, 255
%549 = select i1 %548, i32 %535, i32 255
%550 = icmp sgt i32 %549, 0
%551 = select i1 %550, i32 %549, i32 0
%552 = trunc i32 %551 to i8
%553 = getelementptr inbounds i8, i8* %449, i64 6
store i8 %552, i8* %547
%554 = add nuw nsw i32 %447, 2
%555 = icmp slt i32 %554, %4
br i1 %555, label %442, label %556
556: ; preds = %442, %339, %47, %180
%557 = phi i8* [ %182, %180 ], [ %50, %47 ], [ %182, %339 ], [ %182, %442 ]
%558 = phi i8* [ %183, %180 ], [ %52, %47 ], [ %183, %339 ], [ %183, %442 ]
%559 = phi i8* [ %184, %180 ], [ %51, %47 ], [ %218, %339 ], [ %553, %442 ]
%560 = phi i8* [ %181, %180 ], [ %49, %47 ], [ %217, %339 ], [ %498, %442 ]
%561 = add nuw nsw i32 %48, 2
%562 = icmp slt i32 %561, %5
br i1 %562, label %47, label %563
563: ; preds = %556, %6
ret i32 0
}