xunge/DecIR huggingface dataset:
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn("/scratch/repos/new/home/jordi_armengol_estape/"
                        "c-scraper/outputs/2022-01-22/02-19-57/repos/iamrekcah/"
                        "cyclone/refs/heads/master/bin/genfiles/cyclone.c",
                        284));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11c,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11c,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [149 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/iamrekcah/cyclone/refs/heads/master/bin/genfiles/cyclone.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([149 x i8], [149 x i8]* @.str, i64 0, i64 0), i32 284)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [149 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/iamrekcah/cyclone/refs/heads/master/bin/genfiles/cyclone.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([149 x i8], [149 x i8]* @.str, i64 0, i64 0), i32 284)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
int strcmp(char const *cs, char const *ct) {
  signed char __res;
  while (1) {
    if ((__res = *cs - *ct++) != 0 || !*cs++)
      break;
  }
  return __res;
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
movsbl (%rcx),%ecx
sub    %ecx,%eax
mov    %al,-0x11(%rbp)
movsbl %al,%eax
cmp    $0x0,%eax
jne    114e <strcmp+0x4e>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
jne    1153 <strcmp+0x53>
jmp    1158 <strcmp+0x58>
jmp    110c <strcmp+0xc>
movsbl -0x11(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rax,1),%edx
mov    %edx,%ecx
sub    (%rsi,%rax,1),%cl
test   %dl,%dl
je     1125 <strcmp+0x25>
add    $0x1,%rax
test   %cl,%cl
je     1110 <strcmp+0x10>
movsbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %6
6: ; preds = %2, %24
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %4
%12 = load i8, i8* %10
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %9, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %5
%16 = sext i8 %15 to i32
%17 = icmp ne i32 %16, 0
br i1 %17, label %23, label %18
18: ; preds = %6
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
%21 = load i8, i8* %19
%22 = icmp ne i8 %21, 0
br i1 %22, label %24, label %23
23: ; preds = %18, %6
br label %25
24: ; preds = %18
br label %6
25: ; preds = %23
%26 = load i8, i8* %5
%27 = sext i8 %26 to i32
ret i32 %27
}

LLVM IR (-O2):
define i32 @strcmp(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %10, %3 ]
%5 = phi i8* [ %0, %2 ], [ %11, %3 ]
%6 = load i8, i8* %5
%7 = load i8, i8* %4
%8 = sub i8 %6, %7
%9 = icmp ne i8 %8, 0
%10 = getelementptr inbounds i8, i8* %4, i64 1
%11 = getelementptr inbounds i8, i8* %5, i64 1
%12 = icmp eq i8 %6, 0
%13 = or i1 %12, %9
br i1 %13, label %14, label %3
14: ; preds = %3
%15 = sext i8 %8 to i32
ret i32 %15
}
bar(char *c, int i) { return c + i > c; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
add    %rcx,%rax
cmp    -0x8(%rbp),%rax
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
xor    %eax,%eax
test   %esi,%esi
setg   %al
ret

LLVM IR (-O0):
define i32 @bar(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8*, i8** %3
%10 = icmp ugt i8* %8, %9
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @bar(i8* nocapture readnone %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
struct event_base {
  int dummy;
};

/* Variables and functions */
int event_base_loop(struct event_base *, int /*<<< orphan*/);
int event_base_dispatch(struct event_base *event_base) {
  return (event_base_loop(event_base, 0));
}


x86 assembly (clang, -O0):
<event_base_dispatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <event_base_loop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_base_dispatch>:
xor    %esi,%esi
jmp    1030 <event_base_loop@plt>

LLVM IR (-O0):
%struct.event_base = type { i32 }
define i32 @event_base_dispatch(%struct.event_base* %0) {
%2 = alloca %struct.event_base*
store %struct.event_base* %0, %struct.event_base** %2
%3 = load %struct.event_base*, %struct.event_base** %2
%4 = call i32 @event_base_loop(%struct.event_base* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.event_base = type { i32 }
define i32 @event_base_dispatch(%struct.event_base* %0) {
%2 = tail call i32 @event_base_loop(%struct.event_base* %0, i32 0)
ret i32 %2
}
int isalnum(int character) {
  return (character >= 'a' && character <= 'z') ||
         (character >= 'A' && character <= 'Z') ||
         (character >= '0' && character <= '9');
}


x86 assembly (clang, -O0):
<isalnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x61,-0x4(%rbp)
jl     1120 <isalnum+0x20>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <isalnum+0x58>
cmpl   $0x41,-0x4(%rbp)
jl     1139 <isalnum+0x39>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <isalnum+0x58>
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1152 <isalnum+0x52>
cmpl   $0x39,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalnum>:
mov    %edi,%eax
and    $0xffffffdf,%eax
add    $0xffffffbf,%eax
cmp    $0x1a,%eax
setb   %al
add    $0xffffffd0,%edi
cmp    $0xa,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 97
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 122
br i1 %7, label %22, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 65
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 90
br i1 %13, label %22, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 48
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 57
br label %20
20: ; preds = %17, %14
%21 = phi i1 [ false, %14 ], [ %19, %17 ]
br label %22
22: ; preds = %20, %11, %5
%23 = phi i1 [ true, %11 ], [ true, %5 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @isalnum(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = add i32 %0, -48
%6 = icmp ult i32 %5, 10
%7 = or i1 %6, %4
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ free(unsigned char *);
void generate_destroy(unsigned char *bytes) { free(bytes); }


x86 assembly (clang, -O0):
<generate_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @generate_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @generate_destroy(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ move(int, char, char, char);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int disks = 0;
  printf("Disks in hanoi tower: ");
  scanf("%d", &disks);
  move(disks, 'A', 'C', 'B');
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
lea    0xebe(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%edi
mov    $0x41,%esi
mov    $0x43,%edx
mov    $0x42,%ecx
call   1050 <move@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
lea    0xecb(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
mov    $0x41,%esi
mov    $0x43,%edx
mov    $0x42,%ecx
call   1050 <move@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Disks in hanoi tower: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @move(i32 %5, i8 signext 65, i8 signext 67, i8 signext 66)
ret i32 0
}

LLVM IR (-O2):
@.str = [23 x i8] c"Disks in hanoi tower: \00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @move(i32 %5, i8 signext 65, i8 signext 67, i8 signext 66)
ret i32 0
}
const char *event_get_version(void) {
  return "EV_VERSION_MAJOR"
         "."
         "EV_VERSION_MINOR";
}


x86 assembly (clang, -O0):
<event_get_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_get_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [34 x i8] c"EV_VERSION_MAJOR.EV_VERSION_MINOR\00"
define i8* @event_get_version() {
ret i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [34 x i8] c"EV_VERSION_MAJOR.EV_VERSION_MINOR\00"
define i8* @event_get_version() {
ret i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int /*<<< orphan*/ mpack_load_u8(char const *);
int8_t mpack_load_i8(const char *p) { return (int8_t)mpack_load_u8(p); }


x86 assembly (clang, -O0):
<mpack_load_i8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mpack_load_u8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpack_load_i8>:
jmp    1030 <mpack_load_u8@plt>

LLVM IR (-O0):
define i32 @mpack_load_i8(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @mpack_load_u8(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @mpack_load_i8(i8* %0) {
%2 = tail call i32 @mpack_load_u8(i8* %0)
ret i32 %2
}
void ebur128_get_version(int *major, int *minor, int *patch) {
  *major = 1;
  *minor = 2;
  *patch = 6;
}


x86 assembly (clang, -O0):
<ebur128_get_version>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x6,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ebur128_get_version>:
movl   $0x1,(%rdi)
movl   $0x2,(%rsi)
movl   $0x6,(%rdx)
ret

LLVM IR (-O0):
define void @ebur128_get_version(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
store i32 1, i32* %7
%8 = load i32*, i32** %5
store i32 2, i32* %8
%9 = load i32*, i32** %6
store i32 6, i32* %9
ret void
}

LLVM IR (-O2):
define void @ebur128_get_version(i32* nocapture writeonly %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2) {
store i32 1, i32* %0
store i32 2, i32* %1
store i32 6, i32* %2
ret void
}
void av_interleaved_write_uncoded_frame() {}


x86 assembly (clang, -O0):
<av_interleaved_write_uncoded_frame>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_interleaved_write_uncoded_frame>:
ret

LLVM IR (-O0):
define void @av_interleaved_write_uncoded_frame() {
ret void
}

LLVM IR (-O2):
define void @av_interleaved_write_uncoded_frame() {
ret void
}
int test_imm_0Auint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x0A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Auint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xa,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Auint64_midword_reg>:
test   $0xa0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Auint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 10
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Auint64_midword_reg(i64 %0) {
%2 = and i64 %0, 655360
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void text_abs(x, y, text) float x, y;
char *text;
{
  int xp, yp;
  scale_to_screen(x, y, &xp, &yp);
  put_text(xp, yp, text);
}


x86 assembly (clang, -O0):
<text_abs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm1,-0x20(%rbp)
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
cvtsd2ss %xmm1,%xmm1
cvtsd2ss %xmm0,%xmm0
movss  %xmm1,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0x8(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
lea    -0x14(%rbp),%rdi
lea    -0x18(%rbp),%rsi
mov    $0x2,%al
call   1040 <scale_to_screen@plt>
mov    -0x14(%rbp),%edi
mov    -0x18(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    $0x0,%al
call   1030 <put_text@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<text_abs>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
cvtsd2ss %xmm0,%xmm0
cvtsd2ss %xmm1,%xmm1
cvtss2sd %xmm0,%xmm0
cvtss2sd %xmm1,%xmm1
lea    0xc(%rsp),%rdi
lea    0x8(%rsp),%rsi
mov    $0x2,%al
call   1040 <scale_to_screen@plt>
mov    0xc(%rsp),%edi
mov    0x8(%rsp),%esi
mov    %rbx,%rdx
xor    %eax,%eax
call   1030 <put_text@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @text_abs(double %0, double %1, i8* %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = fptrunc double %0 to float
%10 = fptrunc double %1 to float
store float %9, float* %4
store float %10, float* %5
store i8* %2, i8** %6
%11 = load float, float* %4
%12 = fpext float %11 to double
%13 = load float, float* %5
%14 = fpext float %13 to double
%15 = call i32 (double, double, i32*, i32*, ...) bitcast (i32 (...)* @scale_to_screen to i32 (double, double, i32*, i32*, ...)*)(double %12, double %14, i32* %7, i32* %8)
%16 = load i32, i32* %7
%17 = load i32, i32* %8
%18 = load i8*, i8** %6
%19 = call i32 (i32, i32, i8*, ...) bitcast (i32 (...)* @put_text to i32 (i32, i32, i8*, ...)*)(i32 %16, i32 %17, i8* %18)
ret void
}

LLVM IR (-O2):
define void @text_abs(double %0, double %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = fptrunc double %0 to float
%7 = fptrunc double %1 to float
%8 = bitcast i32* %4 to i8*
%9 = bitcast i32* %5 to i8*
%10 = fpext float %6 to double
%11 = fpext float %7 to double
%12 = call i32 (double, double, i32*, i32*, ...) bitcast (i32 (...)* @scale_to_screen to i32 (double, double, i32*, i32*, ...)*)(double %10, double %11, i32* %4, i32* %5)
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = call i32 (i32, i32, i8*, ...) bitcast (i32 (...)* @put_text to i32 (i32, i32, i8*, ...)*)(i32 %13, i32 %14, i8* %2)
ret void
}
void scuResetControl(const unsigned int rstcon) {
  (*((volatile unsigned int *const)((0x40010000 + 0x400) + 0x0c))) = rstcon;
}


x86 assembly (clang, -O0):
<scuResetControl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x4001040c,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<scuResetControl>:
mov    %edi,0x4001040c
ret

LLVM IR (-O0):
define void @scuResetControl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store volatile i32 %3, i32* inttoptr (i64 1073808396 to i32*)
ret void
}

LLVM IR (-O2):
define void @scuResetControl(i32 %0) {
store volatile i32 %0, i32* inttoptr (i64 1073808396 to i32*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, char *);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vsnprintf(char *, int, char const *, int /*<<< orphan*/);
void wth_pfx_print(const char *pfx, const char *fmt, va_list argp) {
  char msg[512];
  vsnprintf(msg, sizeof msg, fmt, argp);
  fprintf(stderr, "%s: %s\n", pfx, msg);
}


x86 assembly (clang, -O0):
<wth_pfx_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x220,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
lea    -0x220(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x200,%esi
call   1030 <vsnprintf@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    -0x220(%rbp),%rcx
lea    0xe97(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x220,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wth_pfx_print>:
push   %r14
push   %rbx
sub    $0x208,%rsp
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rbx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x200,%esi
call   1030 <vsnprintf@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
lea    0xeae(%rip),%rsi
mov    %rbx,%rdx
mov    %r14,%rcx
call   1040 <fprintf@plt>
add    $0x208,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @wth_pfx_print(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca [512 x i8]
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = getelementptr inbounds [512 x i8], [512 x i8]* %7, i64 0, i64 0
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @vsnprintf(i8* %8, i32 512, i8* %9, i32 %10)
%12 = load i32, i32* @stderr
%13 = load i8*, i8** %4
%14 = getelementptr inbounds [512 x i8], [512 x i8]* %7, i64 0, i64 0
%15 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %13, i8* %14)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @wth_pfx_print(i8* %0, i8* nocapture %1, i32 %2) {
%4 = alloca [512 x i8]
%5 = getelementptr inbounds [512 x i8], [512 x i8]* %4, i64 0, i64 0
%6 = call i32 @vsnprintf(i8* %5, i32 512, i8* %1, i32 %2)
%7 = load i32, i32* @stderr
%8 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %5)
ret void
}
int sys$read(struct _fab *fab, void *err, void *suc) {
  return ({
    unsigned long resultvar;
    register long int _a3 asm("rdx") = (long)(suc);
    register long int _a2 asm("rsi") = (long)(err);
    register long int _a1 asm("rdi") = (long)(fab);
    asm volatile("movq %1, %%rax\n\t"
                 "int $0x82\n\t"
                 : "=a"(resultvar)
                 : "i"(19), "r"(_a1), "r"(_a2), "r"(_a3)
                 : "memory", "cc", "r11", "cx");
    (long)resultvar;
  });
}


x86 assembly (clang, -O0):
<sys$read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rdi
mov    -0x30(%rbp),%rsi
mov    -0x28(%rbp),%rdx
mov    $0x13,%rax
int    $0x82
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys$read>:
mov    $0x13,%rax
int    $0x82
ret

LLVM IR (-O0):
%struct._fab = type opaque
define i32 @"sys$read"(%struct._fab* %0, i8* %1, i8* %2) {
%4 = alloca %struct._fab*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
store %struct._fab* %0, %struct._fab** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%12 = load i8*, i8** %6
%13 = ptrtoint i8* %12 to i64
store i64 %13, i64* %8
%14 = load i8*, i8** %5
%15 = ptrtoint i8* %14 to i64
store i64 %15, i64* %9
%16 = load %struct._fab*, %struct._fab** %4
%17 = ptrtoint %struct._fab* %16 to i64
store i64 %17, i64* %10
%18 = load i64, i64* %10
%19 = load i64, i64* %9
%20 = load i64, i64* %8
%21 = call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x82\0A\09", "={ax},i,{rdi},{rsi},{rdx},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 19, i64 %18, i64 %19, i64 %20)
store i64 %21, i64* %7
%22 = load i64, i64* %7
store i64 %22, i64* %11
%23 = load i64, i64* %11
%24 = trunc i64 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
%struct._fab = type opaque
define i32 @"sys$read"(%struct._fab* %0, i8* %1, i8* %2) {
%4 = ptrtoint i8* %2 to i64
%5 = ptrtoint i8* %1 to i64
%6 = ptrtoint %struct._fab* %0 to i64
%7 = tail call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x82\0A\09", "={ax},i,{rdi},{rsi},{rdx},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 19, i64 %6, i64 %5, i64 %4)
%8 = trunc i64 %7 to i32
ret i32 %8
}
extern void checkRegex(void) {}


x86 assembly (clang, -O0):
<checkRegex>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkRegex>:
ret

LLVM IR (-O0):
define void @checkRegex() {
ret void
}

LLVM IR (-O2):
define void @checkRegex() {
ret void
}
float ps2_deg_to_rad(float degrees) {
  return degrees * (3.1415926535897932384626433832795f / 180.0f);
}


x86 assembly (clang, -O0):
<ps2_deg_to_rad>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps2_deg_to_rad>:
mulss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @ps2_deg_to_rad(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x3F91DF46A0000000
ret float %4
}

LLVM IR (-O2):
define float @ps2_deg_to_rad(float %0) {
%2 = fmul float %0, 0x3F91DF46A0000000
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ print_pascal_row(int);
int main() {
  for (int c = 1; c <= 12; c++) {
    print_pascal_row(c);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0xc,-0x8(%rbp)
jg     1146 <main+0x36>
mov    -0x8(%rbp),%edi
call   1030 <print_pascal_row@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <print_pascal_row@plt>
mov    $0x2,%edi
call   1030 <print_pascal_row@plt>
mov    $0x3,%edi
call   1030 <print_pascal_row@plt>
mov    $0x4,%edi
call   1030 <print_pascal_row@plt>
mov    $0x5,%edi
call   1030 <print_pascal_row@plt>
mov    $0x6,%edi
call   1030 <print_pascal_row@plt>
mov    $0x7,%edi
call   1030 <print_pascal_row@plt>
mov    $0x8,%edi
call   1030 <print_pascal_row@plt>
mov    $0x9,%edi
call   1030 <print_pascal_row@plt>
mov    $0xa,%edi
call   1030 <print_pascal_row@plt>
mov    $0xb,%edi
call   1030 <print_pascal_row@plt>
mov    $0xc,%edi
call   1030 <print_pascal_row@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 12
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @print_pascal_row(i32 %7)
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @print_pascal_row(i32 1)
%2 = tail call i32 @print_pascal_row(i32 2)
%3 = tail call i32 @print_pascal_row(i32 3)
%4 = tail call i32 @print_pascal_row(i32 4)
%5 = tail call i32 @print_pascal_row(i32 5)
%6 = tail call i32 @print_pascal_row(i32 6)
%7 = tail call i32 @print_pascal_row(i32 7)
%8 = tail call i32 @print_pascal_row(i32 8)
%9 = tail call i32 @print_pascal_row(i32 9)
%10 = tail call i32 @print_pascal_row(i32 10)
%11 = tail call i32 @print_pascal_row(i32 11)
%12 = tail call i32 @print_pascal_row(i32 12)
ret i32 0
}
void strace_print(void) {}


x86 assembly (clang, -O0):
<strace_print>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strace_print>:
ret

LLVM IR (-O0):
define void @strace_print() {
ret void
}

LLVM IR (-O2):
define void @strace_print() {
ret void
}
/* Variables and functions */
int f128(int *);
int f129(int *p) { return f128(p); }


x86 assembly (clang, -O0):
<f129>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f128@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f129>:
jmp    1030 <f128@plt>

LLVM IR (-O0):
define i32 @f129(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f128(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f129(i32* %0) {
%2 = tail call i32 @f128(i32* %0)
ret i32 %2
}
__attribute__((no)) int foo(int x) { return x + 2; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0x2(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 2
ret i32 %4
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = add nsw i32 %0, 2
ret i32 %2
}
/* Variables and functions */
int vercmp(char const *, char const *);
int strnumcmp(const char s[], const char t[]) { return vercmp(s, t); }


x86 assembly (clang, -O0):
<strnumcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vercmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strnumcmp>:
jmp    1030 <vercmp@plt>

LLVM IR (-O0):
define i32 @strnumcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @vercmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strnumcmp(i8* %0, i8* %1) {
%3 = tail call i32 @vercmp(i8* %0, i8* %1)
ret i32 %3
}
int CCutil_reallocrus_count(pptr, count, size) void **pptr;
int count;
unsigned int size;
{
  void *p = CCutil_reallocrus(*pptr, count * size);
  if (!p) {
    return 1;
  } else {
    *pptr = p;
    return 0;
  }
}


x86 assembly (clang, -O0):
<CCutil_reallocrus_count>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x14(%rbp),%esi
imul   -0x18(%rbp),%esi
mov    $0x0,%al
call   1030 <CCutil_reallocrus@plt>
cltq
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1154 <CCutil_reallocrus_count+0x44>
movl   $0x1,-0x4(%rbp)
jmp    1166 <CCutil_reallocrus_count+0x56>
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CCutil_reallocrus_count>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    (%rdi),%rdi
imul   %edx,%esi
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <CCutil_reallocrus@plt>
test   %eax,%eax
je     1130 <CCutil_reallocrus_count+0x20>
cltq
mov    %rax,(%rbx)
jmp    1135 <CCutil_reallocrus_count+0x25>
mov    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @CCutil_reallocrus_count(i8** %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store i8** %0, i8*** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i8**, i8*** %5
%10 = load i8*, i8** %9
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = mul i32 %11, %12
%14 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @CCutil_reallocrus to i32 (i8*, i32, ...)*)(i8* %10, i32 %13)
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i8*
store i8* %16, i8** %8
%17 = load i8*, i8** %8
%18 = icmp ne i8* %17, null
br i1 %18, label %20, label %19
19: ; preds = %3
store i32 1, i32* %4
br label %23
20: ; preds = %3
%21 = load i8*, i8** %8
%22 = load i8**, i8*** %5
store i8* %21, i8** %22
store i32 0, i32* %4
br label %23
23: ; preds = %20, %19
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @CCutil_reallocrus_count(i8** nocapture %0, i32 %1, i32 %2) {
%4 = load i8*, i8** %0
%5 = mul i32 %2, %1
%6 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @CCutil_reallocrus to i32 (i8*, i32, ...)*)(i8* %4, i32 %5)
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %3
%9 = sext i32 %6 to i64
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** %0
br label %11
11: ; preds = %3, %8
%12 = phi i32 [ 0, %8 ], [ 1, %3 ]
ret i32 %12
}
void __bitmap_andnot(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<__bitmap_andnot>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__bitmap_andnot>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.__bitmap_andnot = [16 x i8] c"__bitmap_andnot\00"
define void @__bitmap_andnot() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__func__.__bitmap_andnot, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.__bitmap_andnot = [16 x i8] c"__bitmap_andnot\00"
define void @__bitmap_andnot() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__func__.__bitmap_andnot, i64 0, i64 0))
ret void
}
/* Variables and functions */
int fun_stub_base_11_stub(long long);
int /*<<< orphan*/ printf(char *, int);
int fun_stub_base_11_call(long long a) {
  printf("fun_stub_base_11_call:a = %lld \n", a);
  int x = fun_stub_base_11_stub(a);
  printf("fun_stub_base_11_stub return %d\n", x);
  return x;
}


x86 assembly (clang, -O0):
<fun_stub_base_11_call>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%esi
lea    0xec7(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <fun_stub_base_11_stub@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_stub_base_11_call>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
call   1040 <fun_stub_base_11_stub@plt>
mov    %eax,%ebx
lea    0xede(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [33 x i8] c"fun_stub_base_11_call:a = %lld \0A\00"
@.str.1 = [33 x i8] c"fun_stub_base_11_stub return %d\0A\00"
define i32 @fun_stub_base_11_call(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = trunc i64 %4 to i32
%6 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i64, i64* %2
%8 = call i32 @fun_stub_base_11_stub(i64 %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0), i32 %9)
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
@.str = [33 x i8] c"fun_stub_base_11_call:a = %lld \0A\00"
@.str.1 = [33 x i8] c"fun_stub_base_11_stub return %d\0A\00"
define i32 @fun_stub_base_11_call(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = tail call i32 @fun_stub_base_11_stub(i64 %0)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 %4
}
void free_double_tab(double **tab, int x) {
  int i;
  for (i = 0; i < x; i++) {
    free(tab[i]);
  }
  free(tab);
}


x86 assembly (clang, -O0):
<free_double_tab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <free_double_tab+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <free_double_tab+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_double_tab>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <free_double_tab+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <free_double_tab+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_double_tab(double** %0, i32 %1) {
%3 = alloca double**
%4 = alloca i32
%5 = alloca i32
store double** %0, double*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load double**, double*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds double*, double** %11, i64 %13
%15 = load double*, double** %14
%16 = bitcast double* %15 to i8*
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load double**, double*** %3
%22 = bitcast double** %21 to i8*
ret void
}

LLVM IR (-O2):
define void @free_double_tab(double** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds double*, double** %0, i64 %7
%9 = bitcast double** %8 to i8**
%10 = load i8*, i8** %9
tail call void @free(i8* %10)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = bitcast double** %0 to i8*
tail call void @free(i8* %14)
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_MONOTONIC;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
int main() {
  struct timespec ts;
  (void)clock_gettime(CLOCK_MONOTONIC, &ts);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
call   1030 <clock_gettime@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <clock_gettime@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@CLOCK_MONOTONIC = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.timespec
store i32 0, i32* %1
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %2)
ret i32 0
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@CLOCK_MONOTONIC = global i32 0
define i32 @main() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_MONOTONIC
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fltoFl(int /*<<< orphan*/);
double subfl(int /*<<< orphan*/, double);
double absfl(double fl) {
  if (fl < 0)
    return subfl(fltoFl(0), fl);
  else
    return fl;
}


x86 assembly (clang, -O0):
<absfl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1158 <absfl+0x38>
xor    %edi,%edi
call   1040 <fltoFl@plt>
mov    %eax,%edi
movsd  -0x10(%rbp),%xmm0
call   1030 <subfl@plt>
movsd  %xmm0,-0x8(%rbp)
jmp    1162 <absfl+0x42>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<absfl>:
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jbe    1144 <absfl+0x24>
push   %rax
xor    %edi,%edi
movsd  %xmm0,(%rsp)
call   1040 <fltoFl@plt>
mov    %eax,%edi
movsd  (%rsp),%xmm0
pop    %rax
jmp    1030 <subfl@plt>
ret

LLVM IR (-O0):
define double @absfl(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 0.000000e+00
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = call i32 @fltoFl(i32 0)
%8 = load double, double* %3
%9 = call double @subfl(i32 %7, double %8)
store double %9, double* %2
br label %12
10: ; preds = %1
%11 = load double, double* %3
store double %11, double* %2
br label %12
12: ; preds = %10, %6
%13 = load double, double* %2
ret double %13
}

LLVM IR (-O2):
define double @absfl(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i32 @fltoFl(i32 0)
%5 = tail call double @subfl(i32 %4, double %0)
br label %6
6: ; preds = %1, %3
%7 = phi double [ %5, %3 ], [ %0, %1 ]
ret double %7
}
int test_array_should_not_mask(void) {
  _Alignas(32) char buf[1024];
  func(__builtin_align_down(&buf[64], 16));
  func(__builtin_align_up(&buf[32], 32));
  return __builtin_is_aligned(&buf[64], 32);
}


x86 assembly (clang, -O0):
<test_array_should_not_mask>:
push   %rbp
mov    %rsp,%rbp
and    $0xffffffffffffffe0,%rsp
sub    $0x420,%rsp
mov    %rsp,%rdi
add    $0x40,%rdi
mov    %rdi,%rax
and    $0xfffffffffffffff0,%rax
sub    %rdi,%rax
add    %rax,%rdi
mov    $0x0,%al
call   1030 <func@plt>
mov    %rsp,%rdi
add    $0x20,%rdi
mov    %rdi,%rax
add    $0x1f,%rax
and    $0xffffffffffffffe0,%rax
sub    %rdi,%rax
add    %rax,%rdi
mov    $0x0,%al
call   1030 <func@plt>
mov    $0x1,%eax
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_array_should_not_mask>:
push   %rbp
mov    %rsp,%rbp
and    $0xffffffffffffffe0,%rsp
sub    $0x420,%rsp
lea    0x40(%rsp),%rdi
xor    %eax,%eax
call   1030 <func@plt>
lea    0x20(%rsp),%rdi
xor    %eax,%eax
call   1030 <func@plt>
mov    $0x1,%eax
mov    %rbp,%rsp
pop    %rbp
ret

LLVM IR (-O0):
define i32 @test_array_should_not_mask() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 64
%3 = ptrtoint i8* %2 to i64
%4 = and i64 %3, -16
%5 = sub i64 %4, %3
%6 = getelementptr inbounds i8, i8* %2, i64 %5
%7 = call i32 (i8*, ...) bitcast (i32 (...)* @func to i32 (i8*, ...)*)(i8* %6)
%8 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 32
%9 = ptrtoint i8* %8 to i64
%10 = add i64 %9, 31
%11 = and i64 %10, -32
%12 = sub i64 %11, %9
%13 = getelementptr inbounds i8, i8* %8, i64 %12
%14 = call i32 (i8*, ...) bitcast (i32 (...)* @func to i32 (i8*, ...)*)(i8* %13)
ret i32 1
}

LLVM IR (-O2):
define i32 @test_array_should_not_mask() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 64
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @func to i32 (i8*, ...)*)(i8* %3)
%5 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 32
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @func to i32 (i8*, ...)*)(i8* %5)
ret i32 1
}
int test_imm_39uint16_reg(unsigned short val) {
  return ((val) & (0x39 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_39uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x39,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_39uint16_reg>:
test   $0x39,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_39uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 57
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_39uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 57
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int test1(char const *);
int main(int argc, const char **argv) { return test1(argv[0]); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <test1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    (%rsi),%rdi
jmp    1030 <test1@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 0
%8 = load i8*, i8** %7
%9 = call i32 @test1(i8* %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
%4 = tail call i32 @test1(i8* %3)
ret i32 %4
}
void UI_get_default_method(void) {}


x86 assembly (clang, -O0):
<UI_get_default_method>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_get_default_method>:
ret

LLVM IR (-O0):
define void @UI_get_default_method() {
ret void
}

LLVM IR (-O2):
define void @UI_get_default_method() {
ret void
}
/* Variables and functions */
scalar_t__ mycalloc(int, int);
int /*<<< orphan*/ myfree(char *);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  char *p = (char *)mycalloc(4, 16);
  printf("p is:\n'%s'\n", p);
  myfree(p);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4,%edi
mov    $0x10,%esi
call   1030 <mycalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xe9c(%rip),%rdi
call   1040 <printf@plt>
mov    -0x18(%rbp),%rdi
call   1050 <myfree@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x4,%edi
mov    $0x10,%esi
call   1030 <mycalloc@plt>
mov    %rax,%rbx
lea    0xeb6(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
mov    %rbx,%rdi
call   1050 <myfree@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"p is:\0A'%s'\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i64 @mycalloc(i32 4, i32 16)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %6
%9 = load i8*, i8** %6
%10 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = load i8*, i8** %6
%12 = call i32 @myfree(i8* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"p is:\0A'%s'\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 @mycalloc(i32 4, i32 16)
%4 = inttoptr i64 %3 to i8*
%5 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = tail call i32 @myfree(i8* %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ gt_free_mem(char *, char *, int);
void free_cstr_table_entry(void *cstr_entry) {
  gt_free_mem(*(char **)cstr_entry,
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bioh4x/NeatFreq/refs/heads/master/lib/"
              "genometools-1.4.1/src/core/cstr_table.c",
              31);
}


x86 assembly (clang, -O0):
<free_cstr_table_entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
lea    0xed6(%rip),%rsi
mov    $0x1f,%edx
call   1030 <gt_free_mem@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_cstr_table_entry>:
mov    (%rdi),%rdi
lea    0xee6(%rip),%rsi
mov    $0x1f,%edx
jmp    1030 <gt_free_mem@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bioh4x/NeatFreq/refs/heads/master/lib/genometools-1.4.1/src/core/cstr_table.c\00"
define void @free_cstr_table_entry(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i8**
%5 = load i8*, i8** %4
%6 = call i32 @gt_free_mem(i8* %5, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 31)
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bioh4x/NeatFreq/refs/heads/master/lib/genometools-1.4.1/src/core/cstr_table.c\00"
define void @free_cstr_table_entry(i8* nocapture %0) {
%2 = bitcast i8* %0 to i8**
%3 = load i8*, i8** %2
%4 = tail call i32 @gt_free_mem(i8* %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 31)
ret void
}