xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void pasc_join(char *name) { printf("ok %s\n", name); }


x86 assembly (clang, -O0):
<pasc_join>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pasc_join>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"ok %s\0A\00"
define void @pasc_join(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"ok %s\0A\00"
define void @pasc_join(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void print_c(char c) { printf("%c\n", c); }


x86 assembly (clang, -O0):
<print_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xedb(%rip),%rdi
movsbl -0x1(%rbp),%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_c>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%c\0A\00"
define void @print_c(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%c\0A\00"
define void @print_c(i8 signext %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %0)
ret void
}
/* Variables and functions */
float sqrt(float);
float AnchorBasesPerReadSigma(float expAnchorBasesPerRead) {
  return sqrt(expAnchorBasesPerRead);
}


x86 assembly (clang, -O0):
<AnchorBasesPerReadSigma>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AnchorBasesPerReadSigma>:
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     111d <AnchorBasesPerReadSigma+0xd>
sqrtss %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define float @AnchorBasesPerReadSigma(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sqrt(float %3)
ret float %4
}

LLVM IR (-O2):
define float @AnchorBasesPerReadSigma(float %0) {
%2 = tail call float @sqrt(float %0)
ret float %2
}
void test(int i) { char c = (char __attribute__((aligned(8))))i; }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,-0x5(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
ret

LLVM IR (-O0):
define void @test(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = trunc i32 %4 to i8
store i8 %5, i8* %3
ret void
}

LLVM IR (-O2):
define void @test(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MADV_HUGEPAGE;
int /*<<< orphan*/ madvise(void *, size_t, int /*<<< orphan*/);
int posix_memalign(void **, unsigned int, size_t);
void *__malloc_thp(size_t size) {
  void *ptr = NULL;
  int status = posix_memalign(&ptr, (1u << 21), size);
  if (status != 0) {
    return NULL;
  }
  madvise(ptr, size, MADV_HUGEPAGE);
  return ptr;
}


x86 assembly (clang, -O0):
<__malloc_thp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rdx
lea    -0x18(%rbp),%rdi
mov    $0x200000,%esi
call   1040 <posix_memalign@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1160 <__malloc_thp+0x40>
movq   $0x0,-0x8(%rbp)
jmp    117e <__malloc_thp+0x5e>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2e71(%rip),%rax
mov    (%rax),%edx
call   1030 <madvise@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malloc_thp>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movq   $0x0,0x8(%rsp)
lea    0x8(%rsp),%rdi
mov    $0x200000,%esi
mov    %rbx,%rdx
call   1040 <posix_memalign@plt>
test   %eax,%eax
je     114b <__malloc_thp+0x2b>
xor    %eax,%eax
jmp    1166 <__malloc_thp+0x46>
mov    0x8(%rsp),%rdi
mov    0x2e89(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rsi
call   1030 <madvise@plt>
mov    0x8(%rsp),%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@MADV_HUGEPAGE = global i32 0
define i8* @__malloc_thp(i64 %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i32
store i64 %0, i64* %3
store i8* null, i8** %4
%6 = load i64, i64* %3
%7 = call i32 @posix_memalign(i8** %4, i32 2097152, i64 %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i8* null, i8** %2
br label %17
11: ; preds = %1
%12 = load i8*, i8** %4
%13 = load i64, i64* %3
%14 = load i32, i32* @MADV_HUGEPAGE
%15 = call i32 @madvise(i8* %12, i64 %13, i32 %14)
%16 = load i8*, i8** %4
store i8* %16, i8** %2
br label %17
17: ; preds = %11, %10
%18 = load i8*, i8** %2
ret i8* %18
}

LLVM IR (-O2):
@MADV_HUGEPAGE = global i32 0
define i8* @__malloc_thp(i64 %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
store i8* null, i8** %2
%4 = call i32 @posix_memalign(i8** %2, i32 2097152, i64 %0)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = load i32, i32* @MADV_HUGEPAGE
%9 = call i32 @madvise(i8* %7, i64 %0, i32 %8)
%10 = load i8*, i8** %2
br label %11
11: ; preds = %1, %6
%12 = phi i8* [ %10, %6 ], [ null, %1 ]
ret i8* %12
}
/* Type definitions */
struct XorrisO {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Xorriso_dialog_input(struct XorrisO *, char *, scalar_t__,
                                        int);
scalar_t__ strlen(char *);
int Xorriso_option_history(struct XorrisO *xorriso, char *line, int flag) {
  Xorriso_dialog_input(xorriso, line, strlen(line) + 1, 2);
  return (1);
}


x86 assembly (clang, -O0):
<Xorriso_option_history>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    %rax,%rdx
add    $0x1,%rdx
mov    $0x2,%ecx
call   1040 <Xorriso_dialog_input@plt>
mov    $0x1,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Xorriso_option_history>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
lea    0x1(%rax),%rdx
mov    %r14,%rdi
mov    %rbx,%rsi
mov    $0x2,%ecx
call   1040 <Xorriso_dialog_input@plt>
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.XorrisO = type { i32 }
define i32 @Xorriso_option_history(%struct.XorrisO* %0, i8* %1, i32 %2) {
%4 = alloca %struct.XorrisO*
%5 = alloca i8*
%6 = alloca i32
store %struct.XorrisO* %0, %struct.XorrisO** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.XorrisO*, %struct.XorrisO** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %5
%10 = call i64 @strlen(i8* %9)
%11 = add nsw i64 %10, 1
%12 = call i32 @Xorriso_dialog_input(%struct.XorrisO* %7, i8* %8, i64 %11, i32 2)
ret i32 1
}

LLVM IR (-O2):
%struct.XorrisO = type { i32 }
define i32 @Xorriso_option_history(%struct.XorrisO* %0, i8* %1, i32 %2) {
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = add nsw i64 %4, 1
%6 = tail call i32 @Xorriso_dialog_input(%struct.XorrisO* %0, i8* %1, i64 %5, i32 2)
ret i32 1
}
void BIO_free(void) {}


x86 assembly (clang, -O0):
<BIO_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BIO_free>:
ret

LLVM IR (-O0):
define void @BIO_free() {
ret void
}

LLVM IR (-O2):
define void @BIO_free() {
ret void
}
int owLevel(int portnum, int new_level) { return new_level; }


x86 assembly (clang, -O0):
<owLevel>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<owLevel>:
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @owLevel(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @owLevel(i32 %0, i32 returned %1) {
ret i32 %1
}
/* Variables and functions */
void(Memento_stopLeaking)(void) {}


x86 assembly (clang, -O0):
<Memento_stopLeaking>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Memento_stopLeaking>:
ret

LLVM IR (-O0):
define void @Memento_stopLeaking() {
ret void
}

LLVM IR (-O2):
define void @Memento_stopLeaking() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
unsigned int unicoder_writeCodePointToFile(int /*<<< orphan*/ *, int,
                                           unsigned int);
unsigned int unicoder_writeBomToFile(FILE *f, unsigned int encoding) {
  if (f == NULL)
    return -64;
  if (encoding == 1)
    return 0;
  return unicoder_writeCodePointToFile(f, 0x0000feff, encoding);
}


x86 assembly (clang, -O0):
<unicoder_writeBomToFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1136 <unicoder_writeBomToFile+0x26>
movl   $0xffffffc0,-0x4(%rbp)
jmp    1160 <unicoder_writeBomToFile+0x50>
cmpl   $0x1,-0x14(%rbp)
jne    114c <unicoder_writeBomToFile+0x3c>
movl   $0x0,-0x4(%rbp)
jmp    1160 <unicoder_writeBomToFile+0x50>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%edx
mov    $0xfeff,%esi
call   1030 <unicoder_writeCodePointToFile@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unicoder_writeBomToFile>:
test   %rdi,%rdi
je     111f <unicoder_writeBomToFile+0xf>
mov    %esi,%edx
xor    %eax,%eax
cmp    $0x1,%esi
jne    1125 <unicoder_writeBomToFile+0x15>
ret
mov    $0xffffffc0,%eax
ret
mov    $0xfeff,%esi
jmp    1030 <unicoder_writeCodePointToFile@plt>

LLVM IR (-O0):
define i32 @unicoder_writeBomToFile(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32*, i32** %4
%7 = icmp eq i32* %6, null
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 -64, i32* %3
br label %17
9: ; preds = %2
%10 = load i32, i32* %5
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 0, i32* %3
br label %17
13: ; preds = %9
%14 = load i32*, i32** %4
%15 = load i32, i32* %5
%16 = call i32 @unicoder_writeCodePointToFile(i32* %14, i32 65279, i32 %15)
store i32 %16, i32* %3
br label %17
17: ; preds = %13, %12, %8
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @unicoder_writeBomToFile(i32* %0, i32 %1) {
%3 = icmp eq i32* %0, null
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = icmp eq i32 %1, 1
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @unicoder_writeCodePointToFile(i32* %0, i32 65279, i32 %1)
br label %8
8: ; preds = %4, %2, %6
%9 = phi i32 [ %7, %6 ], [ -64, %2 ], [ 0, %4 ]
ret i32 %9
}
int col_byte_gbk2(int col) { return (col >= 0x3f ? 0x41 : 0x40) + col; }


x86 assembly (clang, -O0):
<col_byte_gbk2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x40,%eax
mov    $0x41,%ecx
cmp    $0x3f,%edx
cmovge %ecx,%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<col_byte_gbk2>:
xor    %eax,%eax
cmp    $0x3f,%edi
setge  %al
add    %edi,%eax
add    $0x40,%eax
ret

LLVM IR (-O0):
define i32 @col_byte_gbk2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 63
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 65, i32 64
%7 = load i32, i32* %2
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @col_byte_gbk2(i32 %0) {
%2 = icmp sgt i32 %0, 62
%3 = select i1 %2, i32 65, i32 64
%4 = add nsw i32 %3, %0
ret i32 %4
}
/* Variables and functions */
scalar_t__ calloc(size_t, int);
int /*<<< orphan*/ nrerror(char *);
double *dvector0(long nl, long nh) {
  double *v;
  v = (double *)calloc((size_t)(nh - nl + 1 + 0), sizeof(double));
  if (!v)
    nrerror("allocation failure in dvector0()");
  return v - nl + 0;
}


x86 assembly (clang, -O0):
<dvector0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
sub    -0x8(%rbp),%rdi
add    $0x1,%rdi
add    $0x0,%rdi
mov    $0x8,%esi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1165 <dvector0+0x45>
lea    0xea0(%rip),%rdi
call   1030 <nrerror@plt>
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
sub    -0x8(%rbp),%rcx
shl    $0x3,%rcx
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dvector0>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
sub    %rdi,%rsi
lea    0x1(%rsi),%rdi
mov    $0x8,%esi
call   1040 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114c <dvector0+0x2c>
lea    0xeb9(%rip),%rdi
call   1030 <nrerror@plt>
shl    $0x3,%r14
sub    %r14,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [33 x i8] c"allocation failure in dvector0()\00"
define double* @dvector0(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca double*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = load i64, i64* %3
%8 = sub nsw i64 %6, %7
%9 = add nsw i64 %8, 1
%10 = add nsw i64 %9, 0
%11 = call i64 @calloc(i64 %10, i32 8)
%12 = inttoptr i64 %11 to double*
store double* %12, double** %5
%13 = load double*, double** %5
%14 = icmp ne double* %13, null
br i1 %14, label %17, label %15
15: ; preds = %2
%16 = call i32 @nrerror(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %17
17: ; preds = %15, %2
%18 = load double*, double** %5
%19 = load i64, i64* %3
%20 = sub i64 0, %19
%21 = getelementptr inbounds double, double* %18, i64 %20
%22 = getelementptr inbounds double, double* %21, i64 0
ret double* %22
}

LLVM IR (-O2):
@.str = [33 x i8] c"allocation failure in dvector0()\00"
define double* @dvector0(i64 %0, i64 %1) {
%3 = sub i64 1, %0
%4 = add i64 %3, %1
%5 = tail call i64 @calloc(i64 %4, i32 8)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = tail call i32 @nrerror(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %2
%10 = sub i64 0, %0
%11 = inttoptr i64 %5 to double*
%12 = getelementptr inbounds double, double* %11, i64 %10
ret double* %12
}
/* Variables and functions */
int f();
int f2() { return 4 * f(); }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <f@plt>
shl    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
push   %rax
xor    %eax,%eax
call   1030 <f@plt>
shl    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @f2() {
%1 = call i32 (...) @f()
%2 = mul nsw i32 4, %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @f2() {
%1 = tail call i32 (...) @f()
%2 = shl nsw i32 %1, 2
ret i32 %2
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int height;
};
struct TYPE_4__ {
  TYPE_1__ xexpose;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xexpose_height(void *_p, int _v) {
  ((XEvent *)_p)->xexpose.height = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xexpose_height>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xexpose_height>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xexpose_height(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xexpose_height(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
double jcal2j(int y, int m, int d) {
  int j;
  j = 367 * y;
  j -= (7 * (y + 5001 + (m - 9) / 7)) / 4;
  j += (275 * m) / 9;
  j += d;
  j += 1729777;
  return ((double)j);
}


x86 assembly (clang, -O0):
<jcal2j>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
imul   $0x16f,-0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1389,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x9,%eax
mov    $0x7,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
imul   $0x7,%eax,%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x10(%rbp)
imul   $0x113,-0x8(%rbp),%eax
mov    $0x9,%ecx
cltd
idiv   %ecx
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1a64f1,%eax
mov    %eax,-0x10(%rbp)
cvtsi2sdl -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<jcal2j>:
imul   $0x16f,%edi,%r8d
lea    -0x9(%rsi),%ecx
movslq %ecx,%rcx
imul   $0xffffffff92492493,%rcx,%rcx
shr    $0x20,%rcx
add    %esi,%ecx
add    $0xfffffff7,%ecx
mov    %ecx,%eax
shr    $0x1f,%eax
sar    $0x2,%ecx
add    %eax,%ecx
add    %edi,%ecx
lea    0x0(,%rcx,8),%eax
sub    %ecx,%eax
lea    0x88bf(%rax),%ecx
add    $0x88c2,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
sar    $0x2,%eax
imul   $0x113,%esi,%ecx
movslq %ecx,%rcx
imul   $0x38e38e39,%rcx,%rcx
mov    %rcx,%rsi
shr    $0x3f,%rsi
sar    $0x21,%rcx
add    %esi,%ecx
add    %edx,%r8d
add    %ecx,%r8d
sub    %eax,%r8d
add    $0x1a64f1,%r8d
cvtsi2sd %r8d,%xmm0
ret

LLVM IR (-O0):
define double @jcal2j(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = mul nsw i32 367, %8
store i32 %9, i32* %7
%10 = load i32, i32* %4
%11 = add nsw i32 %10, 5001
%12 = load i32, i32* %5
%13 = sub nsw i32 %12, 9
%14 = sdiv i32 %13, 7
%15 = add nsw i32 %11, %14
%16 = mul nsw i32 7, %15
%17 = sdiv i32 %16, 4
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, %17
store i32 %19, i32* %7
%20 = load i32, i32* %5
%21 = mul nsw i32 275, %20
%22 = sdiv i32 %21, 9
%23 = load i32, i32* %7
%24 = add nsw i32 %23, %22
store i32 %24, i32* %7
%25 = load i32, i32* %6
%26 = load i32, i32* %7
%27 = add nsw i32 %26, %25
store i32 %27, i32* %7
%28 = load i32, i32* %7
%29 = add nsw i32 %28, 1729777
store i32 %29, i32* %7
%30 = load i32, i32* %7
%31 = sitofp i32 %30 to double
ret double %31
}

LLVM IR (-O2):
define double @jcal2j(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %0, 367
%5 = add nsw i32 %0, 5001
%6 = add nsw i32 %1, -9
%7 = sdiv i32 %6, 7
%8 = add nsw i32 %5, %7
%9 = mul nsw i32 %8, 7
%10 = sdiv i32 %9, -4
%11 = mul nsw i32 %1, 275
%12 = sdiv i32 %11, 9
%13 = add i32 %4, 1729777
%14 = add i32 %13, %2
%15 = add i32 %14, %12
%16 = add i32 %15, %10
%17 = sitofp i32 %16 to double
ret double %17
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ strncpy(char *, char const *, int);
char *str_copy(const char *str, int len) {
  char *res = (char *)malloc(sizeof(char) * len + 1);
  strncpy(res, str, len);
  res[len] = '\0';
  return res;
}


x86 assembly (clang, -O0):
<str_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rax
shl    $0x0,%rax
add    $0x1,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <strncpy@plt>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_copy>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
movslq %esi,%r15
lea    0x1(%r15),%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15d,%edx
call   1030 <strncpy@plt>
movb   $0x0,(%rbx,%r15,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @str_copy(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = mul i64 1, %7
%9 = add i64 %8, 1
%10 = trunc i64 %9 to i32
%11 = call i64 @malloc(i32 %10)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %5
%13 = load i8*, i8** %5
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = call i32 @strncpy(i8* %13, i8* %14, i32 %15)
%17 = load i8*, i8** %5
%18 = load i32, i32* %4
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
store i8 0, i8* %20
%21 = load i8*, i8** %5
ret i8* %21
}

LLVM IR (-O2):
define i8* @str_copy(i8* %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = add i32 %1, 1
%5 = tail call i64 @malloc(i32 %4)
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 @strncpy(i8* %6, i8* %0, i32 %1)
%8 = getelementptr inbounds i8, i8* %6, i64 %3
store i8 0, i8* %8
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ h2o__fatal(char *);
void *realloc(void *, size_t);
void *h2o_mem_realloc(void *oldp, size_t sz) {
  void *newp = realloc(oldp, sz);
  if (newp == NULL) {
    h2o__fatal("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/lkwg82/h2o/refs/heads/master/"
               "include/h2o/h2o/memory.h"
               ":"
               "358"
               ":"
               "no memory");
    return oldp;
  }
  return newp;
}


x86 assembly (clang, -O0):
<h2o_mem_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1165 <h2o_mem_realloc+0x45>
lea    0xead(%rip),%rdi
call   1030 <h2o__fatal@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    116d <h2o_mem_realloc+0x4d>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h2o_mem_realloc>:
push   %rbx
mov    %rdi,%rbx
call   1040 <realloc@plt>
test   %rax,%rax
je     1130 <h2o_mem_realloc+0x10>
pop    %rbx
ret
lea    0xec9(%rip),%rdi
call   1030 <h2o__fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [158 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/lkwg82/h2o/refs/heads/master/include/h2o/h2o/memory.h:358:no memory\00"
define i8* @h2o_mem_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = call i8* @realloc(i8* %7, i64 %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = call i32 @h2o__fatal(i8* getelementptr inbounds ([158 x i8], [158 x i8]* @.str, i64 0, i64 0))
%14 = load i8*, i8** %4
store i8* %14, i8** %3
br label %17
15: ; preds = %2
%16 = load i8*, i8** %6
store i8* %16, i8** %3
br label %17
17: ; preds = %15, %12
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
@.str = [158 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/lkwg82/h2o/refs/heads/master/include/h2o/h2o/memory.h:358:no memory\00"
define i8* @h2o_mem_realloc(i8* %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @h2o__fatal(i8* getelementptr inbounds ([158 x i8], [158 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %2, %5
%8 = phi i8* [ %0, %5 ], [ %3, %2 ]
ret i8* %8
}
void ff_hevc_put_hevc_bi_w_epel_v6_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_v6_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_v6_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_v6_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_v6_10_sse4() {
ret void
}
/* Variables and functions */
int _isprint(int);
int isprint(int c) { return _isprint(c); }


x86 assembly (clang, -O0):
<isprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_isprint@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprint>:
jmp    1030 <_isprint@plt>

LLVM IR (-O0):
define i32 @isprint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_isprint(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @isprint(i32 %0) {
%2 = tail call i32 @_isprint(i32 %0)
ret i32 %2
}
int is_esc(int key) { return key == 0x1b; }


x86 assembly (clang, -O0):
<is_esc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x1b,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_esc>:
xor    %eax,%eax
cmp    $0x1b,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_esc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 27
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @is_esc(i32 %0) {
%2 = icmp eq i32 %0, 27
%3 = zext i1 %2 to i32
ret i32 %3
}
int f(int *restrict p, int *restrict q) {
  p = q;
  return 5;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @f(i32* noalias %0, i32* noalias %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
store i32* %5, i32** %3
ret i32 5
}

LLVM IR (-O2):
define i32 @f(i32* noalias nocapture readnone %0, i32* noalias nocapture readnone %1) {
ret i32 5
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void EMACVLANHashFilterSet(uint32_t ui32Base, uint32_t ui32Hash) {
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000588))) = ui32Hash;
}


x86 assembly (clang, -O0):
<EMACVLANHashFilterSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x588(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EMACVLANHashFilterSet>:
mov    %rsi,0x588(%rdi)
ret

LLVM IR (-O0):
define void @EMACVLANHashFilterSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add nsw i64 %6, 1416
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @EMACVLANHashFilterSet(i64 %0, i64 %1) {
%3 = add nsw i64 %0, 1416
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
double pow(x, y)
double x, y;
{ return exp(log(x) * y); }


x86 assembly (clang, -O0):
<pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <log@plt>
mulsd  -0x10(%rbp),%xmm0
call   1030 <exp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow>:
push   %rax
movsd  %xmm1,(%rsp)
call   1040 <log@plt>
mulsd  (%rsp),%xmm0
pop    %rax
jmp    1030 <exp@plt>

LLVM IR (-O0):
define double @pow(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = call double @log(double %5)
%7 = load double, double* %4
%8 = fmul double %6, %7
%9 = call double @exp(double %8)
ret double %9
}

LLVM IR (-O2):
define double @pow(double %0, double %1) {
%3 = tail call double @log(double %0)
%4 = fmul double %3, %1
%5 = tail call double @exp(double %4)
ret double %5
}
void quat_copy(const float q[4], float out[4]) {
  out[0] = q[0];
  out[1] = q[1];
  out[2] = q[2];
  out[3] = q[3];
}


x86 assembly (clang, -O0):
<quat_copy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movss  0xc(%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<quat_copy>:
movss  (%rdi),%xmm0
movss  %xmm0,(%rsi)
movss  0x4(%rdi),%xmm0
movss  %xmm0,0x4(%rsi)
movss  0x8(%rdi),%xmm0
movss  %xmm0,0x8(%rsi)
movss  0xc(%rdi),%xmm0
movss  %xmm0,0xc(%rsi)
ret

LLVM IR (-O0):
define void @quat_copy(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = load float*, float** %4
%9 = getelementptr inbounds float, float* %8, i64 0
store float %7, float* %9
%10 = load float*, float** %3
%11 = getelementptr inbounds float, float* %10, i64 1
%12 = load float, float* %11
%13 = load float*, float** %4
%14 = getelementptr inbounds float, float* %13, i64 1
store float %12, float* %14
%15 = load float*, float** %3
%16 = getelementptr inbounds float, float* %15, i64 2
%17 = load float, float* %16
%18 = load float*, float** %4
%19 = getelementptr inbounds float, float* %18, i64 2
store float %17, float* %19
%20 = load float*, float** %3
%21 = getelementptr inbounds float, float* %20, i64 3
%22 = load float, float* %21
%23 = load float*, float** %4
%24 = getelementptr inbounds float, float* %23, i64 3
store float %22, float* %24
ret void
}

LLVM IR (-O2):
define void @quat_copy(float* nocapture %0, float* nocapture writeonly %1) {
%3 = load float, float* %0
store float %3, float* %1
%4 = getelementptr inbounds float, float* %0, i64 1
%5 = load float, float* %4
%6 = getelementptr inbounds float, float* %1, i64 1
store float %5, float* %6
%7 = getelementptr inbounds float, float* %0, i64 2
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %1, i64 2
store float %8, float* %9
%10 = getelementptr inbounds float, float* %0, i64 3
%11 = load float, float* %10
%12 = getelementptr inbounds float, float* %1, i64 3
store float %11, float* %12
ret void
}
/* Variables and functions */
int rand();
int randLevel() {
  int level = 1;
  while (rand() % 2 != 0 && level < 5) {
    level++;
  }
  return level;
}


x86 assembly (clang, -O0):
<randLevel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
je     1146 <randLevel+0x36>
cmpl   $0x5,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
test   $0x1,%al
jne    1156 <randLevel+0x46>
jmp    1164 <randLevel+0x54>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <randLevel+0xf>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randLevel>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
add    $0x1,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
test   $0x1,%al
je     1133 <randLevel+0x23>
cmp    $0x5,%ebx
jb     1120 <randLevel+0x10>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @randLevel() {
%1 = alloca i32
store i32 1, i32* %1
br label %2
2: ; preds = %11, %0
%3 = call i32 (...) @rand()
%4 = srem i32 %3, 2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load i32, i32* %1
%8 = icmp slt i32 %7, 5
br label %9
9: ; preds = %6, %2
%10 = phi i1 [ false, %2 ], [ %8, %6 ]
br i1 %10, label %11, label %14
11: ; preds = %9
%12 = load i32, i32* %1
%13 = add nsw i32 %12, 1
store i32 %13, i32* %1
br label %2
14: ; preds = %9
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @randLevel() {
br label %1
1: ; preds = %1, %0
%2 = phi i32 [ 1, %0 ], [ %8, %1 ]
%3 = tail call i32 (...) @rand()
%4 = and i32 %3, 1
%5 = icmp ne i32 %4, 0
%6 = icmp ult i32 %2, 5
%7 = select i1 %5, i1 %6, i1 false
%8 = add nuw nsw i32 %2, 1
br i1 %7, label %1, label %9
9: ; preds = %1
ret i32 %2
}
int rho_ruby_to_double(unsigned long val, double *dest) { return 0; }


x86 assembly (clang, -O0):
<rho_ruby_to_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rho_ruby_to_double>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @rho_ruby_to_double(i64 %0, double* %1) {
%3 = alloca i64
%4 = alloca double*
store i64 %0, i64* %3
store double* %1, double** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @rho_ruby_to_double(i64 %0, double* nocapture readnone %1) {
ret i32 0
}
void remove_edge() {}


x86 assembly (clang, -O0):
<remove_edge>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_edge>:
ret

LLVM IR (-O0):
define void @remove_edge() {
ret void
}

LLVM IR (-O2):
define void @remove_edge() {
ret void
}
/* Variables and functions */
int INT_MIN;
int divide_power2(int x, int k) {
  int is_neg = x & INT_MIN;
  (is_neg && (x = x + (1 << k) - 1));
  return x >> k;
}


x86 assembly (clang, -O0):
<divide_power2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ed4(%rip),%rcx
and    (%rcx),%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0xd(%rbp)
je     1148 <divide_power2+0x48>
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<divide_power2>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    0x2ed8(%rip),%rdx
test   %edi,(%rdx)
lea    -0x1(%rdi,%rax,1),%eax
cmove  %edi,%eax
sar    %cl,%eax
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
define i32 @divide_power2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* @INT_MIN
%8 = and i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %2
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = shl i32 1, %13
%15 = add nsw i32 %12, %14
%16 = sub nsw i32 %15, 1
store i32 %16, i32* %3
%17 = icmp ne i32 %16, 0
br label %18
18: ; preds = %11, %2
%19 = phi i1 [ false, %2 ], [ %17, %11 ]
%20 = zext i1 %19 to i32
%21 = load i32, i32* %3
%22 = load i32, i32* %4
%23 = ashr i32 %21, %22
ret i32 %23
}

LLVM IR (-O2):
@INT_MIN = global i32 0
define i32 @divide_power2(i32 %0, i32 %1) {
%3 = load i32, i32* @INT_MIN
%4 = and i32 %3, %0
%5 = icmp eq i32 %4, 0
%6 = shl nuw i32 1, %1
%7 = add i32 %0, -1
%8 = add i32 %7, %6
%9 = select i1 %5, i32 %0, i32 %8
%10 = ashr i32 %9, %1
ret i32 %10
}
/* Type definitions */
struct node {
  int dummy;
};
struct list {
  int dummy;
};

/* Variables and functions */
struct node *search(const struct list *list, const void *obj) {
  return NULL;
}


x86 assembly (clang, -O0):
<search>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<search>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.node = type { i32 }
%struct.list = type { i32 }
define %struct.node* @search(%struct.list* %0, i8* %1) {
%3 = alloca %struct.list*
%4 = alloca i8*
store %struct.list* %0, %struct.list** %3
store i8* %1, i8** %4
ret %struct.node* null
}

LLVM IR (-O2):
%struct.node = type { i32 }
%struct.list = type { i32 }
define noalias %struct.node* @search(%struct.list* nocapture readnone %0, i8* nocapture readnone %1) {
ret %struct.node* null
}
/* Variables and functions */
int ds1621_write_value(int, int, int /*<<< orphan*/);
int start_convert(int dev_fd) { return (ds1621_write_value(dev_fd, 0xEE, 0)); }


x86 assembly (clang, -O0):
<start_convert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xee,%esi
xor    %edx,%edx
call   1030 <ds1621_write_value@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_convert>:
mov    $0xee,%esi
xor    %edx,%edx
jmp    1030 <ds1621_write_value@plt>

LLVM IR (-O0):
define i32 @start_convert(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ds1621_write_value(i32 %3, i32 238, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @start_convert(i32 %0) {
%2 = tail call i32 @ds1621_write_value(i32 %0, i32 238, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ futex_wake(int *, int);
int wake_all(unsigned int *lock) {
  futex_wake((int *)lock, (int)-1);
  return 0;
}


x86 assembly (clang, -O0):
<wake_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xffffffff,%esi
call   1030 <futex_wake@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wake_all>:
push   %rax
mov    $0xffffffff,%esi
call   1030 <futex_wake@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @wake_all(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @futex_wake(i32* %3, i32 -1)
ret i32 0
}

LLVM IR (-O2):
define i32 @wake_all(i32* %0) {
%2 = tail call i32 @futex_wake(i32* %0, i32 -1)
ret i32 0
}
/* Variables and functions */
scalar_t__ getEndNode();
scalar_t__ getOriginalBreak();
int _PAXICO_check_leaks() { return getOriginalBreak() != getEndNode(); }


x86 assembly (clang, -O0):
<_PAXICO_check_leaks>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <getOriginalBreak@plt>
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getEndNode@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
cmp    %rcx,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_PAXICO_check_leaks>:
push   %rbx
xor    %eax,%eax
call   1040 <getOriginalBreak@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1030 <getEndNode@plt>
xor    %ecx,%ecx
cmp    %rax,%rbx
setne  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @_PAXICO_check_leaks() {
%1 = call i64 (...) @getOriginalBreak()
%2 = call i64 (...) @getEndNode()
%3 = icmp ne i64 %1, %2
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @_PAXICO_check_leaks() {
%1 = tail call i64 (...) @getOriginalBreak()
%2 = tail call i64 (...) @getEndNode()
%3 = icmp ne i64 %1, %2
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vfprintf(int /*<<< orphan*/, char const *,
                            int /*<<< orphan*/);
void wb_verror_no_prefix(const char *format, va_list args) {
  vfprintf(stderr, format, args);
  fprintf(stderr, "\n");
}


x86 assembly (clang, -O0):
<wb_verror_no_prefix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <vfprintf@plt>
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
lea    0xeac(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wb_verror_no_prefix>:
push   %rbx
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2eb3(%rip),%rbx
mov    (%rbx),%edi
call   1040 <vfprintf@plt>
mov    (%rbx),%edi
lea    0xec3(%rip),%rsi
pop    %rbx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [2 x i8] c"\0A\00"
define void @wb_verror_no_prefix(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @vfprintf(i32 %5, i8* %6, i32 %7)
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [2 x i8] c"\0A\00"
define void @wb_verror_no_prefix(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @vfprintf(i32 %3, i8* %0, i32 %1)
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}
int test_003(int a, int b, int c) { return ((a & b) == 0) - c; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
sub    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
test   %edi,%esi
sete   %al
sub    %edx,%eax
ret

LLVM IR (-O0):
define i32 @test_003(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = and i32 %7, %8
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
%12 = load i32, i32* %6
%13 = sub nsw i32 %11, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @test_003(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %1, %0
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
%7 = sub nsw i32 %6, %2
ret i32 %7
}
void SSC_IRQHandler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<SSC_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <SSC_IRQHandler+0x9>
jmp    1109 <SSC_IRQHandler+0x9>

x86 assembly (clang, -O2):
<SSC_IRQHandler>:
jmp    1100 <SSC_IRQHandler>

LLVM IR (-O0):
define void @SSC_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @SSC_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
double atan_rz(double x) { return 0; }


x86 assembly (clang, -O0):
<atan_rz>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<atan_rz>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @atan_rz(double %0) {
%2 = alloca double
store double %0, double* %2
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @atan_rz(double %0) {
ret double 0.000000e+00
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ flags;
};
typedef TYPE_1__ XSizeHints;

/* Variables and functions */
long get_XSizeHints_flags(void *_p) { return (long)((XSizeHints *)_p)->flags; }


x86 assembly (clang, -O0):
<get_XSizeHints_flags>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XSizeHints_flags>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XSizeHints_flags(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XSizeHints_flags(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
void test_exists(const void *k, void *v, void *bres) { *(char *)bres = 1; }


x86 assembly (clang, -O0):
<test_exists>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movb   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_exists>:
movb   $0x1,(%rdx)
ret

LLVM IR (-O0):
define void @test_exists(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
store i8 1, i8* %7
ret void
}

LLVM IR (-O2):
define void @test_exists(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture writeonly %2) {
store i8 1, i8* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pause();
int /*<<< orphan*/ set_not_wait_on_child();
int main(void) {
  set_not_wait_on_child();
  while (1) {
    pause();
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <set_not_wait_on_child@plt>
mov    $0x0,%al
call   1030 <pause@plt>
jmp    1136 <main+0x16>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <set_not_wait_on_child@plt>
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <pause@plt>
jmp    1130 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @set_not_wait_on_child()
br label %3
3: ; preds = %0, %3
%4 = call i32 (...) @pause()
br label %3
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @set_not_wait_on_child()
br label %2
2: ; preds = %0, %2
%3 = tail call i32 (...) @pause()
br label %2
}
/* Type definitions */
struct ath_hal {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ath_hal_set_noise_immunity(struct ath_hal *, int, int, int,
                                              int);
void ath_hal_restore_default_noise_immunity(struct ath_hal *ah) {
  ath_hal_set_noise_immunity(ah, -34, -18, -52, -70);
}


x86 assembly (clang, -O0):
<ath_hal_restore_default_noise_immunity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xffffffde,%esi
mov    $0xffffffee,%edx
mov    $0xffffffcc,%ecx
mov    $0xffffffba,%r8d
call   1030 <ath_hal_set_noise_immunity@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ath_hal_restore_default_noise_immunity>:
mov    $0xffffffde,%esi
mov    $0xffffffee,%edx
mov    $0xffffffcc,%ecx
mov    $0xffffffba,%r8d
jmp    1030 <ath_hal_set_noise_immunity@plt>

LLVM IR (-O0):
%struct.ath_hal = type { i32 }
define void @ath_hal_restore_default_noise_immunity(%struct.ath_hal* %0) {
%2 = alloca %struct.ath_hal*
store %struct.ath_hal* %0, %struct.ath_hal** %2
%3 = load %struct.ath_hal*, %struct.ath_hal** %2
%4 = call i32 @ath_hal_set_noise_immunity(%struct.ath_hal* %3, i32 -34, i32 -18, i32 -52, i32 -70)
ret void
}

LLVM IR (-O2):
%struct.ath_hal = type { i32 }
define void @ath_hal_restore_default_noise_immunity(%struct.ath_hal* %0) {
%2 = tail call i32 @ath_hal_set_noise_immunity(%struct.ath_hal* %0, i32 -34, i32 -18, i32 -52, i32 -70)
ret void
}
/* Type definitions */
struct can_frame {
  int can_dlc;
};

/* Variables and functions */
int heartbeat_is_valid(const struct can_frame *frame) {
  return frame->can_dlc == 1;
}


x86 assembly (clang, -O0):
<heartbeat_is_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x1,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<heartbeat_is_valid>:
xor    %eax,%eax
cmpl   $0x1,(%rdi)
sete   %al
ret

LLVM IR (-O0):
%struct.can_frame = type { i32 }
define i32 @heartbeat_is_valid(%struct.can_frame* %0) {
%2 = alloca %struct.can_frame*
store %struct.can_frame* %0, %struct.can_frame** %2
%3 = load %struct.can_frame*, %struct.can_frame** %2
%4 = getelementptr inbounds %struct.can_frame, %struct.can_frame* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 1
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
%struct.can_frame = type { i32 }
define i32 @heartbeat_is_valid(%struct.can_frame* nocapture %0) {
%2 = getelementptr inbounds %struct.can_frame, %struct.can_frame* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1
%5 = zext i1 %4 to i32
ret i32 %5
}