xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ close_connection();
int /*<<< orphan*/ connect_to_nnserver();
int /*<<< orphan*/ wait_for_connecting();
int /*<<< orphan*/ write_msg(char *);
int main() {
  connect_to_nnserver();
  wait_for_connecting();
  write_msg("Hello World.\n");
  close_connection();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <connect_to_nnserver@plt>
mov    $0x0,%al
call   1030 <wait_for_connecting@plt>
lea    0xe9c(%rip),%rdi
call   1060 <write_msg@plt>
mov    $0x0,%al
call   1040 <close_connection@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <connect_to_nnserver@plt>
xor    %eax,%eax
call   1030 <wait_for_connecting@plt>
lea    0xeaa(%rip),%rdi
call   1060 <write_msg@plt>
xor    %eax,%eax
call   1040 <close_connection@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello World.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @connect_to_nnserver()
%3 = call i32 (...) @wait_for_connecting()
%4 = call i32 @write_msg(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%5 = call i32 (...) @close_connection()
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Hello World.\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @connect_to_nnserver()
%2 = tail call i32 (...) @wait_for_connecting()
%3 = tail call i32 @write_msg(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (...) @close_connection()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ led_toggle(int);
void APP_ISR_sw(void) {
  led_toggle(2);
  led_toggle(3);
}


x86 assembly (clang, -O0):
<APP_ISR_sw>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <led_toggle@plt>
mov    $0x3,%edi
call   1030 <led_toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<APP_ISR_sw>:
push   %rax
mov    $0x2,%edi
call   1030 <led_toggle@plt>
mov    $0x3,%edi
pop    %rax
jmp    1030 <led_toggle@plt>

LLVM IR (-O0):
define void @APP_ISR_sw() {
%1 = call i32 @led_toggle(i32 2)
%2 = call i32 @led_toggle(i32 3)
ret void
}

LLVM IR (-O2):
define void @APP_ISR_sw() {
%1 = tail call i32 @led_toggle(i32 2)
%2 = tail call i32 @led_toggle(i32 3)
ret void
}
/* Type definitions */
struct hostlist_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ config_parse_ips(struct hostlist_t **, char *);
int /*<<< orphan*/ config_parse_names(struct hostlist_t **, char *);
int config_parse_hosts(char *line, struct hostlist_t **hl) {
  config_parse_ips(hl, line);
  config_parse_names(hl, line);
  return 0;
}


x86 assembly (clang, -O0):
<config_parse_hosts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <config_parse_ips@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <config_parse_names@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_parse_hosts>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
mov    %r14,%rsi
call   1040 <config_parse_ips@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <config_parse_names@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.hostlist_t = type { i32 }
define i32 @config_parse_hosts(i8* %0, %struct.hostlist_t** %1) {
%3 = alloca i8*
%4 = alloca %struct.hostlist_t**
store i8* %0, i8** %3
store %struct.hostlist_t** %1, %struct.hostlist_t*** %4
%5 = load %struct.hostlist_t**, %struct.hostlist_t*** %4
%6 = load i8*, i8** %3
%7 = call i32 @config_parse_ips(%struct.hostlist_t** %5, i8* %6)
%8 = load %struct.hostlist_t**, %struct.hostlist_t*** %4
%9 = load i8*, i8** %3
%10 = call i32 @config_parse_names(%struct.hostlist_t** %8, i8* %9)
ret i32 0
}

LLVM IR (-O2):
%struct.hostlist_t = type { i32 }
define i32 @config_parse_hosts(i8* %0, %struct.hostlist_t** %1) {
%3 = tail call i32 @config_parse_ips(%struct.hostlist_t** %1, i8* %0)
%4 = tail call i32 @config_parse_names(%struct.hostlist_t** %1, i8* %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ msg(char *);
int damy(void) {
  msg("Hey don't touch !!\a\a\a");
  return (0);
}


x86 assembly (clang, -O0):
<damy>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <msg@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<damy>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <msg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"Hey don't touch !!\07\07\07\00"
define i32 @damy() {
%1 = call i32 @msg(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"Hey don't touch !!\07\07\07\00"
define i32 @damy() {
%1 = tail call i32 @msg(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int pixma_activate(int /*<<< orphan*/);
int /*<<< orphan*/ pixma_reset();
int pixma_init() {
  int status;
  do {
    pixma_reset();
    status = pixma_activate(0);
  } while (status != 0x0606);
  return status;
}


x86 assembly (clang, -O0):
<pixma_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <pixma_reset@plt>
xor    %edi,%edi
call   1040 <pixma_activate@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x606,-0x4(%rbp)
jne    1128 <pixma_init+0x8>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pixma_init>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <pixma_reset@plt>
xor    %edi,%edi
call   1040 <pixma_activate@plt>
cmp    $0x606,%eax
jne    1130 <pixma_init+0x10>
mov    $0x606,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @pixma_init() {
%1 = alloca i32
br label %2
2: ; preds = %5, %0
%3 = call i32 (...) @pixma_reset()
%4 = call i32 @pixma_activate(i32 0)
store i32 %4, i32* %1
br label %5
5: ; preds = %2
%6 = load i32, i32* %1
%7 = icmp ne i32 %6, 1542
br i1 %7, label %2, label %8
8: ; preds = %5
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @pixma_init() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @pixma_reset()
%3 = tail call i32 @pixma_activate(i32 0)
%4 = icmp eq i32 %3, 1542
br i1 %4, label %5, label %1
5: ; preds = %1
ret i32 1542
}
/* Variables and functions */
int /*<<< orphan*/ faux();
int main() {
  int hmax = 0, cont;
  faux();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <faux@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <faux@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%4 = call i32 (...) @faux()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @faux()
ret i32 0
}
int begin_var_p(int c) {
  return c == '{' || ((('A' <= ((unsigned)(c)) && ((unsigned)(c)) <= 'Z') ||
                       ('a' <= ((unsigned)(c)) && ((unsigned)(c)) <= 'z')) ||
                      c == '_');
}


x86 assembly (clang, -O0):
<begin_var_p>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x7b,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1160 <begin_var_p+0x60>
mov    $0x41,%eax
cmp    -0x4(%rbp),%eax
ja     1133 <begin_var_p+0x33>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jbe    115a <begin_var_p+0x5a>
mov    $0x61,%eax
cmp    -0x4(%rbp),%eax
ja     1150 <begin_var_p+0x50>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jbe    115a <begin_var_p+0x5a>
cmpl   $0x5f,-0x4(%rbp)
sete   %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<begin_var_p>:
lea    -0x41(%rdi),%eax
cmp    $0x1a,%eax
setb   %al
lea    -0x61(%rdi),%ecx
cmp    $0x1b,%ecx
setb   %cl
or     %al,%cl
cmp    $0x5f,%edi
sete   %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @begin_var_p(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 123
br i1 %4, label %22, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ule i32 65, %6
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp ule i32 %9, 90
br i1 %10, label %20, label %11
11: ; preds = %8, %5
%12 = load i32, i32* %2
%13 = icmp ule i32 97, %12
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp ule i32 %15, 122
br i1 %16, label %20, label %17
17: ; preds = %14, %11
%18 = load i32, i32* %2
%19 = icmp eq i32 %18, 95
br label %20
20: ; preds = %17, %14, %8
%21 = phi i1 [ true, %14 ], [ true, %8 ], [ %19, %17 ]
br label %22
22: ; preds = %20, %1
%23 = phi i1 [ true, %1 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @begin_var_p(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = add i32 %0, -97
%5 = icmp ult i32 %4, 27
%6 = or i1 %5, %3
%7 = icmp eq i32 %0, 95
%8 = or i1 %7, %6
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
int partition(int *, int, int);
void quick_sort(int arr[], int _lowerIndex, int _upperIndex) {
  int p;
  if ((_upperIndex - _lowerIndex) > 0) {
    p = partition(arr, _lowerIndex, _upperIndex);
    quick_sort(arr, _lowerIndex, p - 1);
    quick_sort(arr, p + 1, _upperIndex);
  }
}


x86 assembly (clang, -O0):
<quick_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
sub    -0xc(%rbp),%eax
cmp    $0x0,%eax
jle    1177 <quick_sort+0x57>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quick_sort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quick_sort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quick_sort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %esi,%edx
jle    1166 <quick_sort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quick_sort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quick_sort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = sub nsw i32 %8, %9
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %25
12: ; preds = %3
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = call i32 @partition(i32* %13, i32 %14, i32 %15)
store i32 %16, i32* %7
%17 = load i32*, i32** %4
%18 = load i32, i32* %5
%19 = load i32, i32* %7
%20 = sub nsw i32 %19, 1
%21 = load i32*, i32** %4
%22 = load i32, i32* %7
%23 = add nsw i32 %22, 1
%24 = load i32, i32* %6
br label %25
25: ; preds = %12, %3
ret void
}

LLVM IR (-O2):
define void @quick_sort(i32* %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, %1
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quick_sort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sleep(unsigned int const);
void pm_sleep(unsigned int const milliseconds) {
  sleep((milliseconds + 999) / 1000);
}


x86 assembly (clang, -O0):
<pm_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x3e7,%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,%edi
call   1030 <sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pm_sleep>:
add    $0x3e7,%edi
imul   $0x10624dd3,%rdi,%rdi
shr    $0x26,%rdi
jmp    1030 <sleep@plt>

LLVM IR (-O0):
define void @pm_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 999
%5 = udiv i32 %4, 1000
%6 = call i32 @sleep(i32 %5)
ret void
}

LLVM IR (-O2):
define void @pm_sleep(i32 %0) {
%2 = add i32 %0, 999
%3 = udiv i32 %2, 1000
%4 = tail call i32 @sleep(i32 %3)
ret void
}
/* Type definitions */
struct shmid_ds {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int shmctl(int, int, struct shmid_ds *);
int Shmctl(int shmid, int cmd, struct shmid_ds *buf) {
  int ret = shmctl(shmid, cmd, buf);
  if (ret < 0) {
    perror("shmctl error");
    exit(0);
  }
  return ret;
}


x86 assembly (clang, -O0):
<Shmctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <shmctl@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    1171 <Shmctl+0x41>
lea    0xe9b(%rip),%rdi
call   1040 <perror@plt>
xor    %edi,%edi
call   1050 <exit@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Shmctl>:
push   %rax
call   1030 <shmctl@plt>
test   %eax,%eax
js     113c <Shmctl+0xc>
pop    %rcx
ret
lea    0xebd(%rip),%rdi
call   1040 <perror@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
%struct.shmid_ds = type { i32 }
@.str = [13 x i8] c"shmctl error\00"
define i32 @Shmctl(i32 %0, i32 %1, %struct.shmid_ds* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.shmid_ds*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store %struct.shmid_ds* %2, %struct.shmid_ds** %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = load %struct.shmid_ds*, %struct.shmid_ds** %6
%11 = call i32 @shmctl(i32 %8, i32 %9, %struct.shmid_ds* %10)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%16 = call i32 @exit(i32 0)
unreachable
17: ; preds = %3
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
%struct.shmid_ds = type { i32 }
@.str = [13 x i8] c"shmctl error\00"
define i32 @Shmctl(i32 %0, i32 %1, %struct.shmid_ds* %2) {
%4 = tail call i32 @shmctl(i32 %0, i32 %1, %struct.shmid_ds* %2)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 0)
unreachable
9: ; preds = %3
ret i32 %4
}
void EC_GROUP_have_precompute_mult(void) {}


x86 assembly (clang, -O0):
<EC_GROUP_have_precompute_mult>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EC_GROUP_have_precompute_mult>:
ret

LLVM IR (-O0):
define void @EC_GROUP_have_precompute_mult() {
ret void
}

LLVM IR (-O2):
define void @EC_GROUP_have_precompute_mult() {
ret void
}
void ff_hevc_put_hevc_uni_pel_pixels16_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_pel_pixels16_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_pel_pixels16_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_pel_pixels16_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_pel_pixels16_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ add_send_buffer(int);
void send_signals(int *signals, int n) {
  int i;
  for (i = 0; i < n; i++)
    add_send_buffer(signals[i]);
}


x86 assembly (clang, -O0):
<send_signals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1150 <send_signals+0x40>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edi
call   1030 <add_send_buffer@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <send_signals+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_signals>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1142 <send_signals+0x32>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,4),%edi
call   1030 <add_send_buffer@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <send_signals+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @send_signals(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @add_send_buffer(i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @send_signals(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 @add_send_buffer(i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
int group_size_check(int m[5]) {
  if (m[1] > 9 || m[4] > 9 || m[3] > 999999 || m[2] > 9999999)
    return -1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<group_size_check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x9,0x4(%rax)
jg     1146 <group_size_check+0x46>
mov    -0x10(%rbp),%rax
cmpl   $0x9,0x10(%rax)
jg     1146 <group_size_check+0x46>
mov    -0x10(%rbp),%rax
cmpl   $0xf423f,0xc(%rax)
jg     1146 <group_size_check+0x46>
mov    -0x10(%rbp),%rax
cmpl   $0x98967f,0x8(%rax)
jle    1152 <group_size_check+0x52>
movl   $0xffffffff,-0x4(%rbp)
jmp    1159 <group_size_check+0x59>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<group_size_check>:
mov    $0xffffffff,%eax
cmpl   $0x9,0x4(%rdi)
jg     1128 <group_size_check+0x28>
cmpl   $0x9,0x10(%rdi)
jg     1128 <group_size_check+0x28>
cmpl   $0xf423f,0xc(%rdi)
jg     1128 <group_size_check+0x28>
xor    %eax,%eax
cmpl   $0x989680,0x8(%rdi)
setge  %al
neg    %eax
ret

LLVM IR (-O0):
define i32 @group_size_check(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = getelementptr inbounds i32, i32* %4, i64 1
%6 = load i32, i32* %5
%7 = icmp sgt i32 %6, 9
br i1 %7, label %23, label %8
8: ; preds = %1
%9 = load i32*, i32** %3
%10 = getelementptr inbounds i32, i32* %9, i64 4
%11 = load i32, i32* %10
%12 = icmp sgt i32 %11, 9
br i1 %12, label %23, label %13
13: ; preds = %8
%14 = load i32*, i32** %3
%15 = getelementptr inbounds i32, i32* %14, i64 3
%16 = load i32, i32* %15
%17 = icmp sgt i32 %16, 999999
br i1 %17, label %23, label %18
18: ; preds = %13
%19 = load i32*, i32** %3
%20 = getelementptr inbounds i32, i32* %19, i64 2
%21 = load i32, i32* %20
%22 = icmp sgt i32 %21, 9999999
br i1 %22, label %23, label %24
23: ; preds = %18, %13, %8, %1
store i32 -1, i32* %2
br label %25
24: ; preds = %18
store i32 0, i32* %2
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @group_size_check(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 9
br i1 %4, label %18, label %5
5: ; preds = %1
%6 = getelementptr inbounds i32, i32* %0, i64 4
%7 = load i32, i32* %6
%8 = icmp sgt i32 %7, 9
br i1 %8, label %18, label %9
9: ; preds = %5
%10 = getelementptr inbounds i32, i32* %0, i64 3
%11 = load i32, i32* %10
%12 = icmp sgt i32 %11, 999999
br i1 %12, label %18, label %13
13: ; preds = %9
%14 = getelementptr inbounds i32, i32* %0, i64 2
%15 = load i32, i32* %14
%16 = icmp sgt i32 %15, 9999999
%17 = sext i1 %16 to i32
br label %18
18: ; preds = %13, %1, %5, %9
%19 = phi i32 [ -1, %9 ], [ -1, %5 ], [ -1, %1 ], [ %17, %13 ]
ret i32 %19
}
/* Type definitions */
struct sockaddr_in {
  int dummy;
};
struct sockaddr {
  int dummy;
};
typedef int socklen_t;
typedef int /*<<< orphan*/ cliaddr;

/* Variables and functions */
int accept(int, struct sockaddr *, int *);
int /*<<< orphan*/ fd_handlers_add(int);
int /*<<< orphan*/ printf(char *, int);
void handle_server_event(int sfd) {
  struct sockaddr_in cliaddr;
  socklen_t clilen = sizeof(cliaddr);
  int cfd = accept(sfd, (struct sockaddr *)&cliaddr, &clilen);
  printf("incoming connection (fd = %d)!\n", cfd);
  fd_handlers_add(cfd);
}


x86 assembly (clang, -O0):
<handle_server_event>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x4,-0xc(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1050 <accept@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xea1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%edi
call   1040 <fd_handlers_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_server_event>:
push   %rbx
sub    $0x10,%rsp
movl   $0x4,0x4(%rsp)
lea    0x8(%rsp),%rsi
lea    0x4(%rsp),%rdx
call   1050 <accept@plt>
mov    %eax,%ebx
lea    0xeab(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    %ebx,%edi
call   1040 <fd_handlers_add@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
@.str = [32 x i8] c"incoming connection (fd = %d)!\0A\00"
define void @handle_server_event(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.sockaddr_in
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 4, i32* %4
%6 = load i32, i32* %2
%7 = bitcast %struct.sockaddr_in* %3 to %struct.sockaddr*
%8 = call i32 @accept(i32 %6, %struct.sockaddr* %7, i32* %4)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = load i32, i32* %5
%12 = call i32 @fd_handlers_add(i32 %11)
ret void
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
@.str = [32 x i8] c"incoming connection (fd = %d)!\0A\00"
define void @handle_server_event(i32 %0) {
%2 = alloca %struct.sockaddr_in
%3 = alloca i32
%4 = bitcast %struct.sockaddr_in* %2 to i8*
%5 = bitcast i32* %3 to i8*
store i32 4, i32* %3
%6 = bitcast %struct.sockaddr_in* %2 to %struct.sockaddr*
%7 = call i32 @accept(i32 %0, %struct.sockaddr* %6, i32* %3)
%8 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = call i32 @fd_handlers_add(i32 %7)
ret void
}
long IS_ERR(const void *ptr) {
  return __builtin_expect(!!(((unsigned long)ptr) >= (unsigned long)-4095), 0);
}


x86 assembly (clang, -O0):
<IS_ERR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0xfffffffffffff001,%rax
setae  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<IS_ERR>:
xor    %eax,%eax
cmp    $0xfffffffffffff001,%rdi
setae  %al
ret

LLVM IR (-O0):
define i64 @IS_ERR(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = icmp uge i64 %4, -4095
%6 = xor i1 %5, true
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
%9 = sext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @IS_ERR(i8* readnone %0) {
%2 = icmp ugt i8* %0, inttoptr (i64 -4096 to i8*)
%3 = zext i1 %2 to i64
ret i64 %3
}
void INT_Excep_SSI1_SSIRTI1(void) {}


x86 assembly (clang, -O0):
<INT_Excep_SSI1_SSIRTI1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_SSI1_SSIRTI1>:
ret

LLVM IR (-O0):
define void @INT_Excep_SSI1_SSIRTI1() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_SSI1_SSIRTI1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  printf("Hello World!\n");
  exit(5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    $0x5,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x5,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Hello World!\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @exit(i32 5)
unreachable
}

LLVM IR (-O2):
@str = [13 x i8] c"Hello World!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @exit(i32 5)
unreachable
}
int test_imm_B8uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xB8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B8uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xb8,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B8uint64_midword_reg>:
test   $0xb80000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B8uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 184
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B8uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 12058624
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ _mm_free(void *);
void chgemm_free(void *mem) { _mm_free(mem); }


x86 assembly (clang, -O0):
<chgemm_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_mm_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chgemm_free>:
jmp    1030 <_mm_free@plt>

LLVM IR (-O0):
define void @chgemm_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @_mm_free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @chgemm_free(i8* %0) {
%2 = tail call i32 @_mm_free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *prog) {
  fprintf(stderr,
          "%s -i <input_uimage_file> -o <output_file> -m <model> -h <hardware "
          "version> -s <software version>\n",
          prog);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [99 x i8] c"%s -i <input_uimage_file> -o <output_file> -m <model> -h <hardware version> -s <software version>\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([99 x i8], [99 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [99 x i8] c"%s -i <input_uimage_file> -o <output_file> -m <model> -h <hardware version> -s <software version>\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([99 x i8], [99 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void av_apply_bitstream_filters() {}


x86 assembly (clang, -O0):
<av_apply_bitstream_filters>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_apply_bitstream_filters>:
ret

LLVM IR (-O0):
define void @av_apply_bitstream_filters() {
ret void
}

LLVM IR (-O2):
define void @av_apply_bitstream_filters() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
unsigned int Command_About_Execute(char **args, unsigned int argCount) {
  printf("PiOS - by Simon Gustavsson 2013\n");
  return 1;
}


x86 assembly (clang, -O0):
<Command_About_Execute>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Command_About_Execute>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [33 x i8] c"PiOS - by Simon Gustavsson 2013\0A\00"
define i32 @Command_About_Execute(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@str = [32 x i8] c"PiOS - by Simon Gustavsson 2013\00"
define i32 @Command_About_Execute(i8** nocapture readnone %0, i32 %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @str, i64 0, i64 0))
ret i32 1
}
int fast_strcmp(const char *str1, const char *str2) {
  while (*str1 == *(str2++)) {
    if (*(str1++) == '\0')
      return (0);
  }
  return (1);
}


x86 assembly (clang, -O0):
<fast_strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    1159 <fast_strcmp+0x59>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1154 <fast_strcmp+0x54>
movl   $0x0,-0x4(%rbp)
jmp    1160 <fast_strcmp+0x60>
jmp    110c <fast_strcmp+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fast_strcmp>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rax,1),%ecx
cmp    (%rsi,%rax,1),%cl
jne    1124 <fast_strcmp+0x24>
add    $0x1,%rax
test   %cl,%cl
jne    1110 <fast_strcmp+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @fast_strcmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %22, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8*, i8** %5
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %5
%12 = load i8, i8* %10
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %9, %13
br i1 %14, label %15, label %23
15: ; preds = %6
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %4
%18 = load i8, i8* %16
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %15
store i32 0, i32* %3
br label %24
22: ; preds = %15
br label %6
23: ; preds = %6
store i32 1, i32* %3
br label %24
24: ; preds = %23, %21
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @fast_strcmp(i8* nocapture %0, i8* nocapture %1) {
br label %3
3: ; preds = %9, %2
%4 = phi i8* [ %0, %2 ], [ %11, %9 ]
%5 = phi i8* [ %1, %2 ], [ %10, %9 ]
%6 = load i8, i8* %4
%7 = load i8, i8* %5
%8 = icmp eq i8 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = getelementptr inbounds i8, i8* %5, i64 1
%11 = getelementptr inbounds i8, i8* %4, i64 1
%12 = icmp eq i8 %6, 0
br i1 %12, label %13, label %3
13: ; preds = %3, %9
%14 = phi i32 [ 0, %9 ], [ 1, %3 ]
ret i32 %14
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *, int /*<<< orphan*/);
int create_multprec_homotopy(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(522, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<create_multprec_homotopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x20a,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_multprec_homotopy>:
mov    $0x20a,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @create_multprec_homotopy() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 522, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @create_multprec_homotopy() {
%1 = tail call i32 @_ada_use_c2phc(i32 522, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
int f_to_fixed(double val, int precision) { return val * (1L << precision); }


x86 assembly (clang, -O0):
<f_to_fixed>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
cvtsi2sd %rax,%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_to_fixed>:
mov    %edi,%ecx
mov    $0x1,%eax
shl    %cl,%rax
cvtsi2sd %rax,%xmm1
mulsd  %xmm0,%xmm1
cvttsd2si %xmm1,%eax
ret

LLVM IR (-O0):
define i32 @f_to_fixed(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load double, double* %3
%6 = load i32, i32* %4
%7 = zext i32 %6 to i64
%8 = shl i64 1, %7
%9 = sitofp i64 %8 to double
%10 = fmul double %5, %9
%11 = fptosi double %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @f_to_fixed(double %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = shl nuw i64 1, %3
%5 = sitofp i64 %4 to double
%6 = fmul double %5, %0
%7 = fptosi double %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ error(char *);
void needlval(void) { error("must be lvalue"); }


x86 assembly (clang, -O0):
<needlval>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<needlval>:
lea    0xee9(%rip),%rdi
jmp    1030 <error@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"must be lvalue\00"
define void @needlval() {
%1 = call i32 @error(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"must be lvalue\00"
define void @needlval() {
%1 = tail call i32 @error(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}
void gtk_settings_install_property() {}


x86 assembly (clang, -O0):
<gtk_settings_install_property>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_settings_install_property>:
ret

LLVM IR (-O0):
define void @gtk_settings_install_property() {
ret void
}

LLVM IR (-O2):
define void @gtk_settings_install_property() {
ret void
}
/* Type definitions */
struct intstack_s {
  int dummy;
};

/* Variables and functions */
scalar_t__ PopIntStack(struct intstack_s *, int *);
int /*<<< orphan*/ free(struct intstack_s *);
int FreeIntStack(struct intstack_s *stack) {
  int data;
  int count = 0;
  while (PopIntStack(stack, &data))
    count++;
  free(stack);
  return count;
}


x86 assembly (clang, -O0):
<FreeIntStack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1040 <PopIntStack@plt>
cmp    $0x0,%rax
je     1158 <FreeIntStack+0x38>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1133 <FreeIntStack+0x13>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FreeIntStack>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%r14
mov    $0xffffffff,%ebx
lea    0xc(%rsp),%r15
cs nopw 0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %r15,%rsi
call   1040 <PopIntStack@plt>
add    $0x1,%ebx
test   %rax,%rax
jne    1140 <FreeIntStack+0x20>
mov    %r14,%rdi
call   1030 <free@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.intstack_s = type { i32 }
define i32 @FreeIntStack(%struct.intstack_s* %0) {
%2 = alloca %struct.intstack_s*
%3 = alloca i32
%4 = alloca i32
store %struct.intstack_s* %0, %struct.intstack_s** %2
store i32 0, i32* %4
br label %5
5: ; preds = %9, %1
%6 = load %struct.intstack_s*, %struct.intstack_s** %2
%7 = call i64 @PopIntStack(%struct.intstack_s* %6, i32* %3)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %5
%10 = load i32, i32* %4
%11 = add nsw i32 %10, 1
store i32 %11, i32* %4
br label %5
12: ; preds = %5
%13 = load %struct.intstack_s*, %struct.intstack_s** %2
%14 = call i32 @free(%struct.intstack_s* %13)
%15 = load i32, i32* %4
ret i32 %15
}

LLVM IR (-O2):
%struct.intstack_s = type { i32 }
define i32 @FreeIntStack(%struct.intstack_s* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
br label %4
4: ; preds = %4, %1
%5 = phi i32 [ 0, %1 ], [ %8, %4 ]
%6 = call i64 @PopIntStack(%struct.intstack_s* %0, i32* %2)
%7 = icmp eq i64 %6, 0
%8 = add nuw nsw i32 %5, 1
br i1 %7, label %9, label %4
9: ; preds = %4
%10 = call i32 @free(%struct.intstack_s* %0)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void stackExample(char *copyIntoBuf) {
  char buf[5];
  strcpy(buf, copyIntoBuf);
}


x86 assembly (clang, -O0):
<stackExample>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0xd(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stackExample>:
push   %rax
mov    %rdi,%rsi
lea    0x3(%rsp),%rdi
call   1030 <strcpy@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @stackExample(i8* %0) {
%2 = alloca i8*
%3 = alloca [5 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [5 x i8], [5 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = call i32 @strcpy(i8* %4, i8* %5)
ret void
}

LLVM IR (-O2):
define void @stackExample(i8* %0) {
%2 = alloca [5 x i8]
%3 = getelementptr inbounds [5 x i8], [5 x i8]* %2, i64 0, i64 0
%4 = call i32 @strcpy(i8* %3, i8* %0)
ret void
}
void dump_all_fds(const char *extra_msg) {}


x86 assembly (clang, -O0):
<dump_all_fds>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_all_fds>:
ret

LLVM IR (-O0):
define void @dump_all_fds(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @dump_all_fds(i8* nocapture %0) {
ret void
}
void vrt_group_rebuild_thread_wakeup(struct vrt_group *group) {}


x86 assembly (clang, -O0):
<vrt_group_rebuild_thread_wakeup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vrt_group_rebuild_thread_wakeup>:
ret

LLVM IR (-O0):
%struct.vrt_group = type opaque
define void @vrt_group_rebuild_thread_wakeup(%struct.vrt_group* %0) {
%2 = alloca %struct.vrt_group*
store %struct.vrt_group* %0, %struct.vrt_group** %2
ret void
}

LLVM IR (-O2):
%struct.vrt_group = type opaque
define void @vrt_group_rebuild_thread_wakeup(%struct.vrt_group* nocapture %0) {
ret void
}
char *strcat(char *strDestination, const char *strSource) {
  char *s;
  s = strDestination;
  while (*s) {
    s++;
  }
  while (*strSource) {
    *s++ = *strSource++;
  }
  *s = 0;
  return strDestination;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1132 <strcat+0x32>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <strcat+0x14>
jmp    1137 <strcat+0x37>
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     116b <strcat+0x6b>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
jmp    1137 <strcat+0x37>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
mov    %rdi,%rax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
mov    %rcx,%rdi
add    $0x1,%rcx
cmpb   $0x0,(%rdi)
jne    1110 <strcat+0x10>
mov    (%rsi),%dl
test   %dl,%dl
je     1146 <strcat+0x46>
mov    $0xffffffffffffffff,%rdi
nopl   0x0(%rax)
mov    %dl,(%rcx,%rdi,1)
movzbl 0x2(%rsi,%rdi,1),%edx
add    $0x1,%rdi
test   %dl,%dl
jne    1130 <strcat+0x30>
add    %rdi,%rcx
mov    %rcx,%rdi
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define i8* @strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %11, %2
%8 = load i8*, i8** %5
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %5
br label %7
14: ; preds = %7
br label %15
15: ; preds = %19, %14
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = icmp ne i8 %17, 0
br i1 %18, label %19, label %25
19: ; preds = %15
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %4
%22 = load i8, i8* %20
%23 = load i8*, i8** %5
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %5
store i8 %22, i8* %23
br label %15
25: ; preds = %15
%26 = load i8*, i8** %5
store i8 0, i8* %26
%27 = load i8*, i8** %3
ret i8* %27
}

LLVM IR (-O2):
define i8* @strcat(i8* returned %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %7, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %6, label %8, label %3
8: ; preds = %3
%9 = load i8, i8* %1
%10 = icmp eq i8 %9, 0
br i1 %10, label %19, label %11
11: ; preds = %8, %11
%12 = phi i8 [ %17, %11 ], [ %9, %8 ]
%13 = phi i8* [ %16, %11 ], [ %4, %8 ]
%14 = phi i8* [ %15, %11 ], [ %1, %8 ]
%15 = getelementptr inbounds i8, i8* %14, i64 1
%16 = getelementptr inbounds i8, i8* %13, i64 1
store i8 %12, i8* %13
%17 = load i8, i8* %15
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %11
19: ; preds = %11, %8
%20 = phi i8* [ %4, %8 ], [ %16, %11 ]
store i8 0, i8* %20
ret i8* %0
}
/* Type definitions */
struct sched_param {
  int sched_priority;
};
typedef int /*<<< orphan*/ cpu_set_t;

/* Variables and functions */
int /*<<< orphan*/ CPU_SET(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ CPU_ZERO(int /*<<< orphan*/ *);
int /*<<< orphan*/ SCHED_FIFO;
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ sched_setaffinity(int /*<<< orphan*/, int,
                                     int /*<<< orphan*/ *);
int sched_setscheduler(int /*<<< orphan*/, int /*<<< orphan*/,
                       struct sched_param *);
int /*<<< orphan*/ stderr;
void set_mycpu(int cpu) {
  cpu_set_t run_cpu_mask;
  struct sched_param param;
  CPU_ZERO(&run_cpu_mask);
  CPU_SET(cpu, &run_cpu_mask);
  sched_setaffinity(0, sizeof(cpu_set_t), &run_cpu_mask);
  param.sched_priority = 1;
  if (0 && sched_setscheduler(0, SCHED_FIFO, &param) == -1) {
    fprintf(stderr, "could not set SCHED_FIFO, run as root?\n");
  }
}


x86 assembly (clang, -O0):
<set_mycpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <CPU_ZERO@plt>
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
call   1050 <CPU_SET@plt>
xor    %edi,%edi
mov    $0x4,%esi
lea    -0x8(%rbp),%rdx
call   1030 <sched_setaffinity@plt>
movl   $0x1,-0x10(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_mycpu>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
call   1040 <CPU_ZERO@plt>
mov    %ebx,%edi
mov    %r14,%rsi
call   1050 <CPU_SET@plt>
xor    %edi,%edi
mov    $0x4,%esi
mov    %r14,%rdx
call   1030 <sched_setaffinity@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.sched_param = type { i32 }
@SCHED_FIFO = global i32 0
@stderr = global i32 0
define void @set_mycpu(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca %struct.sched_param
store i32 %0, i32* %2
%5 = call i32 @CPU_ZERO(i32* %3)
%6 = load i32, i32* %2
%7 = call i32 @CPU_SET(i32 %6, i32* %3)
%8 = call i32 @sched_setaffinity(i32 0, i32 4, i32* %3)
%9 = getelementptr inbounds %struct.sched_param, %struct.sched_param* %4, i32 0, i32 0
store i32 1, i32* %9
ret void
}

LLVM IR (-O2):
@SCHED_FIFO = global i32 0
@stderr = global i32 0
define void @set_mycpu(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @CPU_ZERO(i32* %2)
%5 = call i32 @CPU_SET(i32 %0, i32* %2)
%6 = call i32 @sched_setaffinity(i32 0, i32 4, i32* %2)
ret void
}
int Bematech_FI_VerificaTruncamento(Var, Retorno) {
  return Formata("\x1b|35|28|\x1b", Var, Retorno);
}


x86 assembly (clang, -O0):
<Bematech_FI_VerificaTruncamento>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xed5(%rip),%rdi
mov    $0x0,%al
call   1030 <Formata@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bematech_FI_VerificaTruncamento>:
mov    %esi,%edx
mov    %edi,%esi
lea    0xee5(%rip),%rdi
xor    %eax,%eax
jmp    1030 <Formata@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"\1B|35|28|\1B\00"
define i32 @Bematech_FI_VerificaTruncamento(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 (i8*, i32, i32, ...) bitcast (i32 (...)* @Formata to i32 (i8*, i32, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
@.str = [10 x i8] c"\1B|35|28|\1B\00"
define i32 @Bematech_FI_VerificaTruncamento(i32 %0, i32 %1) {
%3 = tail call i32 (i8*, i32, i32, ...) bitcast (i32 (...)* @Formata to i32 (i8*, i32, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
ret i32 %3
}
int cmp(const void *a, const void *b) { return (long)a - (long)b; }


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
mov    %rdi,%rax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i64
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i64
%9 = sub nsw i64 %6, %8
%10 = trunc i64 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @cmp(i8* %0, i8* %1) {
%3 = ptrtoint i8* %0 to i64
%4 = ptrtoint i8* %1 to i64
%5 = sub nsw i64 %3, %4
%6 = trunc i64 %5 to i32
ret i32 %6
}