xunge/DecIR huggingface dataset:
long double atanl(long double x) {
  long double res = 0.0L;
  asm volatile("fld1\n\t"
               "fpatan"
               : "=t"(res)
               : "0"(x));
  return res;
}


x86 assembly (clang, -O0):
<atanl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldz
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fld1
fpatan
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atanl>:
fldt   0x8(%rsp)
fld1
fpatan
ret

LLVM IR (-O0):
define x86_fp80 @atanl(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
store x86_fp80 0xK00000000000000000000, x86_fp80* %3
%4 = load x86_fp80, x86_fp80* %2
%5 = call x86_fp80 asm sideeffect "fld1\0A\09fpatan", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %4)
store x86_fp80 %5, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %3
ret x86_fp80 %6
}

LLVM IR (-O2):
define x86_fp80 @atanl(x86_fp80 %0) {
%2 = tail call x86_fp80 asm sideeffect "fld1\0A\09fpatan", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %0)
ret x86_fp80 %2
}
/* Variables and functions */
int Rand_div(int);
char get_shimmer_color() {
  switch (((Rand_div(7)) + 1)) {
  case 1:
    return (4);
  case 2:
    return (12);
  case 3:
    return (1);
  case 4:
    return (13);
  case 5:
    return (6);
  case 6:
    return (8);
  case 7:
    return (5);
  }
  return (10);
}


x86 assembly (clang, -O0):
<get_shimmer_color>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x7,%edi
call   1030 <Rand_div@plt>
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x6,%eax
ja     1184 <get_shimmer_color+0x74>
mov    -0x10(%rbp),%rax
lea    0xec4(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x4,-0x1(%rbp)
jmp    1188 <get_shimmer_color+0x78>
movb   $0xc,-0x1(%rbp)
jmp    1188 <get_shimmer_color+0x78>
movb   $0x1,-0x1(%rbp)
jmp    1188 <get_shimmer_color+0x78>
movb   $0xd,-0x1(%rbp)
jmp    1188 <get_shimmer_color+0x78>
movb   $0x6,-0x1(%rbp)
jmp    1188 <get_shimmer_color+0x78>
movb   $0x8,-0x1(%rbp)
jmp    1188 <get_shimmer_color+0x78>
movb   $0x5,-0x1(%rbp)
jmp    1188 <get_shimmer_color+0x78>
movb   $0xa,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_shimmer_color>:
push   %rax
mov    $0x7,%edi
call   1030 <Rand_div@plt>
lea    0x0(,%rax,8),%ecx
movabs $0x508060d010c04,%rdx
shr    %cl,%rdx
cmp    $0x7,%eax
mov    $0xa,%eax
cmovb  %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @get_shimmer_color() {
%1 = alloca i8
%2 = call i32 @Rand_div(i32 7)
%3 = add nsw i32 %2, 1
switch i32 %3, label %11 [
i32 1, label %4
i32 2, label %5
i32 3, label %6
i32 4, label %7
i32 5, label %8
i32 6, label %9
i32 7, label %10
]
4: ; preds = %0
store i8 4, i8* %1
br label %12
5: ; preds = %0
store i8 12, i8* %1
br label %12
6: ; preds = %0
store i8 1, i8* %1
br label %12
7: ; preds = %0
store i8 13, i8* %1
br label %12
8: ; preds = %0
store i8 6, i8* %1
br label %12
9: ; preds = %0
store i8 8, i8* %1
br label %12
10: ; preds = %0
store i8 5, i8* %1
br label %12
11: ; preds = %0
store i8 10, i8* %1
br label %12
12: ; preds = %11, %10, %9, %8, %7, %6, %5, %4
%13 = load i8, i8* %1
ret i8 %13
}

LLVM IR (-O2):
define signext i8 @get_shimmer_color() {
%1 = tail call i32 @Rand_div(i32 7)
%2 = icmp ult i32 %1, 7
%3 = zext i32 %1 to i56
%4 = shl nuw nsw i56 %3, 3
%5 = lshr i56 1416196964551684, %4
%6 = trunc i56 %5 to i8
%7 = select i1 %2, i8 %6, i8 10
ret i8 %7
}
int fiveeigthths(int x) { return (x >> 3) + (x >> 1); }


x86 assembly (clang, -O0):
<fiveeigthths>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x3,%eax
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiveeigthths>:
mov    %edi,%eax
sar    $0x3,%eax
sar    %edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @fiveeigthths(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 3
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = add nsw i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @fiveeigthths(i32 %0) {
%2 = ashr i32 %0, 3
%3 = ashr i32 %0, 1
%4 = add nsw i32 %2, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int *);
int fatal(int *r) {
  printf("[FATAL ERROR] %r", r);
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
jmp    112c <fatal+0x1c>

x86 assembly (clang, -O2):
<fatal>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
jmp    1120 <fatal+0x10>

LLVM IR (-O0):
@.str = [17 x i8] c"[FATAL ERROR] %r\00"
define i32 @fatal(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32* %3)
br label %5
5: ; preds = %5, %1
br label %5
}

LLVM IR (-O2):
@.str = [17 x i8] c"[FATAL ERROR] %r\00"
define i32 @fatal(i32* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32* %0)
br label %3
3: ; preds = %3, %1
br label %3
}
/* Variables and functions */
scalar_t__ strncmp(char *, char *, int);
char *xvp_process_get_name();
char *xvp_proxy_get_name(void) {
  char *name = xvp_process_get_name();
  return strncmp(name, "xvp: ", 5) ? name : name + 5;
}


x86 assembly (clang, -O0):
<xvp_proxy_get_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <xvp_process_get_name@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec2(%rip),%rsi
mov    $0x5,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
je     115f <xvp_proxy_get_name+0x3f>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    116b <xvp_proxy_get_name+0x4b>
mov    -0x8(%rbp),%rax
add    $0x5,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xvp_proxy_get_name>:
push   %rbx
xor    %eax,%eax
call   1040 <xvp_process_get_name@plt>
mov    %rax,%rbx
lea    0xece(%rip),%rsi
mov    %rax,%rdi
mov    $0x5,%edx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
lea    (%rcx,%rcx,4),%rax
add    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"xvp: \00"
define i8* @xvp_proxy_get_name() {
%1 = alloca i8*
%2 = call i8* (...) @xvp_process_get_name()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i64 @strncmp(i8* %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 5)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i8*, i8** %1
br label %11
8: ; preds = %0
%9 = load i8*, i8** %1
%10 = getelementptr inbounds i8, i8* %9, i64 5
br label %11
11: ; preds = %8, %6
%12 = phi i8* [ %7, %6 ], [ %10, %8 ]
ret i8* %12
}

LLVM IR (-O2):
@.str = [6 x i8] c"xvp: \00"
define i8* @xvp_proxy_get_name() {
%1 = tail call i8* (...) @xvp_process_get_name()
%2 = tail call i64 @strncmp(i8* %1, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 5)
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i64 5, i64 0
%5 = getelementptr i8, i8* %1, i64 %4
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ baseRuota(int, int /*<<< orphan*/);
int /*<<< orphan*/ braccioSgancia();
int /*<<< orphan*/ pinzaOpen();
int /*<<< orphan*/ sleep(int);
void releases() {
  baseRuota(100, 0);
  braccioSgancia();
  sleep(1);
  pinzaOpen();
  sleep(1);
}


x86 assembly (clang, -O0):
<releases>:
push   %rbp
mov    %rsp,%rbp
mov    $0x64,%edi
xor    %esi,%esi
call   1030 <baseRuota@plt>
mov    $0x0,%al
call   1050 <braccioSgancia@plt>
mov    $0x1,%edi
call   1060 <sleep@plt>
mov    $0x0,%al
call   1040 <pinzaOpen@plt>
mov    $0x1,%edi
call   1060 <sleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<releases>:
push   %rax
mov    $0x64,%edi
xor    %esi,%esi
call   1030 <baseRuota@plt>
xor    %eax,%eax
call   1050 <braccioSgancia@plt>
mov    $0x1,%edi
call   1060 <sleep@plt>
xor    %eax,%eax
call   1040 <pinzaOpen@plt>
mov    $0x1,%edi
pop    %rax
jmp    1060 <sleep@plt>

LLVM IR (-O0):
define void @releases() {
%1 = call i32 @baseRuota(i32 100, i32 0)
%2 = call i32 (...) @braccioSgancia()
%3 = call i32 @sleep(i32 1)
%4 = call i32 (...) @pinzaOpen()
%5 = call i32 @sleep(i32 1)
ret void
}

LLVM IR (-O2):
define void @releases() {
%1 = tail call i32 @baseRuota(i32 100, i32 0)
%2 = tail call i32 (...) @braccioSgancia()
%3 = tail call i32 @sleep(i32 1)
%4 = tail call i32 (...) @pinzaOpen()
%5 = tail call i32 @sleep(i32 1)
ret void
}
long smin(int num_bits) {
  int i;
  long smin = 1l;
  for (i = 0; i < num_bits - 1; i++) {
    smin = smin * 2l * -1;
  }
  return smin;
}


x86 assembly (clang, -O0):
<smin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movq   $0x1,-0x10(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jge    1145 <smin+0x45>
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
imul   $0xffffffffffffffff,%rax,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1116 <smin+0x16>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smin>:
mov    $0x1,%eax
cmp    $0x2,%edi
jl     114b <smin+0x4b>
lea    -0x1(%rdi),%edx
add    $0xfffffffe,%edi
mov    %edx,%ecx
and    $0x7,%ecx
cmp    $0x7,%edi
jae    1121 <smin+0x21>
mov    $0x1,%eax
jmp    1139 <smin+0x39>
and    $0xfffffff8,%edx
mov    $0x1,%eax
nopl   0x0(%rax)
shl    $0x8,%rax
add    $0xfffffff8,%edx
jne    1130 <smin+0x30>
test   %ecx,%ecx
je     114b <smin+0x4b>
nopl   (%rax)
add    %rax,%rax
neg    %rax
add    $0xffffffff,%ecx
jne    1140 <smin+0x40>
ret

LLVM IR (-O0):
define i64 @smin(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %2
store i64 1, i64* %4
store i32 0, i32* %3
br label %5
5: ; preds = %14, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %17
10: ; preds = %5
%11 = load i64, i64* %4
%12 = mul nsw i64 %11, 2
%13 = mul nsw i64 %12, -1
store i64 %13, i64* %4
br label %14
14: ; preds = %10
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %5
17: ; preds = %5
%18 = load i64, i64* %4
ret i64 %18
}

LLVM IR (-O2):
define i64 @smin(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %26
4: ; preds = %1
%5 = add i32 %0, -2
%6 = and i32 %2, 7
%7 = icmp ult i32 %5, 7
br i1 %7, label %16, label %8
8: ; preds = %4
%9 = and i32 %2, -8
br label %10
10: ; preds = %10, %8
%11 = phi i64 [ 1, %8 ], [ %13, %10 ]
%12 = phi i32 [ 0, %8 ], [ %14, %10 ]
%13 = shl i64 %11, 8
%14 = add i32 %12, 8
%15 = icmp eq i32 %14, %9
br i1 %15, label %16, label %10
16: ; preds = %10, %4
%17 = phi i64 [ undef, %4 ], [ %13, %10 ]
%18 = phi i64 [ 1, %4 ], [ %13, %10 ]
%19 = icmp eq i32 %6, 0
br i1 %19, label %26, label %20
20: ; preds = %16, %20
%21 = phi i64 [ %23, %20 ], [ %18, %16 ]
%22 = phi i32 [ %24, %20 ], [ 0, %16 ]
%23 = mul i64 %21, -2
%24 = add i32 %22, 1
%25 = icmp eq i32 %24, %6
br i1 %25, label %26, label %20
26: ; preds = %16, %20, %1
%27 = phi i64 [ 1, %1 ], [ %17, %16 ], [ %23, %20 ]
ret i64 %27
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
uint8_t submod8(uint8_t a, uint8_t b, uint8_t m) {
  a -= b;
  while (a >= m)
    a -= m;
  return a;
}


x86 assembly (clang, -O0):
<submod8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x18(%rbp),%rax
jl     1141 <submod8+0x41>
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    111f <submod8+0x1f>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<submod8>:
mov    %rdi,%rax
add    %rdx,%rax
sub    %rsi,%rax
nopl   0x0(%rax)
sub    %rdx,%rax
cmp    %rdx,%rax
jge    1110 <submod8+0x10>
ret

LLVM IR (-O0):
define i64 @submod8(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = sub nsw i64 %8, %7
store i64 %9, i64* %4
br label %10
10: ; preds = %14, %3
%11 = load i64, i64* %4
%12 = load i64, i64* %6
%13 = icmp sge i64 %11, %12
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i64, i64* %6
%16 = load i64, i64* %4
%17 = sub nsw i64 %16, %15
store i64 %17, i64* %4
br label %10
18: ; preds = %10
%19 = load i64, i64* %4
ret i64 %19
}

LLVM IR (-O2):
define i64 @submod8(i64 %0, i64 %1, i64 %2) {
%4 = sub nsw i64 %0, %1
br label %5
5: ; preds = %5, %3
%6 = phi i64 [ %4, %3 ], [ %8, %5 ]
%7 = icmp slt i64 %6, %2
%8 = sub nsw i64 %6, %2
br i1 %7, label %9, label %5
9: ; preds = %5
ret i64 %6
}
/* Variables and functions */
int db_warehouse_get_internal_data(char *, void **, int *);
int db_warehouse_get_stock(char *, int *);
int sequential_get_stock(char *product_name, int *stock) {
  int stock_aux = 0;
  int ret, size;
  void *st_int;
  ret = db_warehouse_get_internal_data(product_name, &st_int, &size);
  if (ret == 0) {
    ret = db_warehouse_get_stock(product_name, &stock_aux);
    *stock = stock_aux;
  }
  return ret;
}


x86 assembly (clang, -O0):
<sequential_get_stock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x28(%rbp),%rsi
lea    -0x1c(%rbp),%rdx
call   1030 <db_warehouse_get_internal_data@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jne    116e <sequential_get_stock+0x4e>
mov    -0x8(%rbp),%rdi
lea    -0x14(%rbp),%rsi
call   1040 <db_warehouse_get_stock@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sequential_get_stock>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
movl   $0x0,0x8(%rsp)
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
call   1030 <db_warehouse_get_internal_data@plt>
test   %eax,%eax
jne    115c <sequential_get_stock+0x3c>
lea    0x8(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <db_warehouse_get_stock@plt>
mov    0x8(%rsp),%ecx
mov    %ecx,(%r14)
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @sequential_get_stock(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store i8* %0, i8** %3
store i32* %1, i32** %4
store i32 0, i32* %5
%9 = load i8*, i8** %3
%10 = call i32 @db_warehouse_get_internal_data(i8* %9, i8** %8, i32* %7)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %2
%14 = load i8*, i8** %3
%15 = call i32 @db_warehouse_get_stock(i8* %14, i32* %5)
store i32 %15, i32* %6
%16 = load i32, i32* %5
%17 = load i32*, i32** %4
store i32 %16, i32* %17
br label %18
18: ; preds = %13, %2
%19 = load i32, i32* %6
ret i32 %19
}

LLVM IR (-O2):
define i32 @sequential_get_stock(i8* %0, i32* nocapture writeonly %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%7 = bitcast i32* %4 to i8*
%8 = bitcast i8** %5 to i8*
%9 = call i32 @db_warehouse_get_internal_data(i8* %0, i8** %5, i32* %4)
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = call i32 @db_warehouse_get_stock(i8* %0, i32* %3)
%13 = load i32, i32* %3
store i32 %13, i32* %1
br label %14
14: ; preds = %11, %2
%15 = phi i32 [ %12, %11 ], [ %9, %2 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ draw();
int /*<<< orphan*/ sim_singlechannel();
void gameLogic(void) {
  sim_singlechannel();
  draw();
}


x86 assembly (clang, -O0):
<gameLogic>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <sim_singlechannel@plt>
mov    $0x0,%al
call   1030 <draw@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gameLogic>:
push   %rax
xor    %eax,%eax
call   1040 <sim_singlechannel@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <draw@plt>

LLVM IR (-O0):
define void @gameLogic() {
%1 = call i32 (...) @sim_singlechannel()
%2 = call i32 (...) @draw()
ret void
}

LLVM IR (-O2):
define void @gameLogic() {
%1 = tail call i32 (...) @sim_singlechannel()
%2 = tail call i32 (...) @draw()
ret void
}
/* Variables and functions */
bool is_it_prime(int n) {
  if (n < 2)
    return false;
  for (int c = 2; c * c <= n; c++) {
    if (n % c == 0)
      return false;
  }
  return true;
}


x86 assembly (clang, -O0):
<is_it_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    111d <is_it_prime+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    116a <is_it_prime+0x6a>
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1163 <is_it_prime+0x63>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1150 <is_it_prime+0x50>
movl   $0x0,-0x4(%rbp)
jmp    116a <is_it_prime+0x6a>
jmp    1155 <is_it_prime+0x55>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1124 <is_it_prime+0x24>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_it_prime>:
xor    %eax,%eax
cmp    $0x2,%edi
jl     113c <is_it_prime+0x3c>
mov    $0x1,%eax
cmp    $0x4,%edi
jb     113c <is_it_prime+0x3c>
mov    $0x2,%ecx
cs nopw 0x0(%rax,%rax,1)
mov    %edi,%eax
cltd
idiv   %ecx
test   %edx,%edx
je     1135 <is_it_prime+0x35>
add    $0x1,%ecx
mov    %ecx,%eax
imul   %ecx,%eax
cmp    %edi,%eax
jle    1120 <is_it_prime+0x20>
xor    %eax,%eax
test   %edx,%edx
setne  %al
ret

LLVM IR (-O0):
define i32 @is_it_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 2
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %26
8: ; preds = %1
store i32 2, i32* %4
br label %9
9: ; preds = %22, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %4
%12 = mul nsw i32 %10, %11
%13 = load i32, i32* %3
%14 = icmp sle i32 %12, %13
br i1 %14, label %15, label %25
15: ; preds = %9
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = srem i32 %16, %17
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %15
store i32 0, i32* %2
br label %26
21: ; preds = %15
br label %22
22: ; preds = %21
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %4
br label %9
25: ; preds = %9
store i32 1, i32* %2
br label %26
26: ; preds = %25, %20, %7
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @is_it_prime(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %16, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 4
br i1 %4, label %16, label %5
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ 2, %3 ]
%7 = srem i32 %0, %6
%8 = icmp eq i32 %7, 0
%9 = add nuw nsw i32 %6, 1
%10 = mul nsw i32 %9, %9
%11 = icmp sgt i32 %10, %0
%12 = select i1 %8, i1 true, i1 %11
br i1 %12, label %13, label %5
13: ; preds = %5
%14 = xor i1 %8, true
%15 = zext i1 %14 to i32
br label %16
16: ; preds = %3, %13, %1
%17 = phi i32 [ 0, %1 ], [ 1, %3 ], [ %15, %13 ]
ret i32 %17
}
void __attribute__((weak)) tim8_trg_com_tim14_isr() {
  debug_handler(__FUNCTION__);
}


x86 assembly (clang, -O0):
<tim8_trg_com_tim14_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tim8_trg_com_tim14_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.tim8_trg_com_tim14_isr = [23 x i8] c"tim8_trg_com_tim14_isr\00"
define weak void @tim8_trg_com_tim14_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @__FUNCTION__.tim8_trg_com_tim14_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.tim8_trg_com_tim14_isr = [23 x i8] c"tim8_trg_com_tim14_isr\00"
define weak void @tim8_trg_com_tim14_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @__FUNCTION__.tim8_trg_com_tim14_isr, i64 0, i64 0))
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int dobldobl_trace_sum_difference(int n, int *f, double *d) {
  int fail;
  fail = _ada_use_c2phc4c(647, &n, f, d, 0);
  return fail;
}


x86 assembly (clang, -O0):
<dobldobl_trace_sum_difference>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x287,%edi
lea    -0x4(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dobldobl_trace_sum_difference>:
push   %rax
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x287,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @dobldobl_trace_sum_difference(i32 %0, i32* %1, double* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca double*
%7 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store double* %2, double** %6
%8 = load i32*, i32** %5
%9 = load double*, double** %6
%10 = call i32 @_ada_use_c2phc4c(i32 647, i32* %4, i32* %8, double* %9, i32 0)
store i32 %10, i32* %7
%11 = load i32, i32* %7
ret i32 %11
}

LLVM IR (-O2):
define i32 @dobldobl_trace_sum_difference(i32 %0, i32* %1, double* %2) {
%4 = alloca i32
store i32 %0, i32* %4
%5 = call i32 @_ada_use_c2phc4c(i32 647, i32* %4, i32* %1, double* %2, i32 0)
ret i32 %5
}
extern void __outw_p(unsigned short value, unsigned short port) {
  __asm__ __volatile__("out"
                       "w"
                       " %"
                       "w"
                       "0,%"
                       "w"
                       "1"
                       :
                       : "a"(value), "d"(port));
  __asm__ __volatile__("outb %al,$0x80");
}


x86 assembly (clang, -O0):
<__outw_p>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%ax
mov    -0x4(%rbp),%dx
out    %ax,(%dx)
out    %al,$0x80
pop    %rbp
ret

x86 assembly (clang, -O2):
<__outw_p>:
mov    %esi,%edx
mov    %edi,%eax
out    %ax,(%dx)
out    %al,$0x80
ret

LLVM IR (-O0):
define void @__outw_p(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @__outw_p(i16 zeroext %0, i16 zeroext %1) {
tail call void asm sideeffect "outw ${0:w},${1:w}", "{ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0, i16 %1)
tail call void asm sideeffect "outb %al,$$0x80", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
int prev_col(int a[500][500], int i, int j) {
  if (j == 0)
    return 0;
  return a[i][j - 1];
}


x86 assembly (clang, -O0):
<prev_col>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jne    1124 <prev_col+0x24>
movl   $0x0,-0x4(%rbp)
jmp    1145 <prev_col+0x45>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
imul   $0x7d0,%rcx,%rcx
add    %rcx,%rax
mov    -0x18(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prev_col>:
test   %edx,%edx
je     1119 <prev_col+0x19>
movslq %esi,%rax
movslq %edx,%rcx
imul   $0x7d0,%rax,%rax
add    %rax,%rdi
mov    -0x4(%rdi,%rcx,4),%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @prev_col([500 x i32]* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca [500 x i32]*
%6 = alloca i32
%7 = alloca i32
store [500 x i32]* %0, [500 x i32]** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
store i32 0, i32* %4
br label %21
11: ; preds = %3
%12 = load [500 x i32]*, [500 x i32]** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds [500 x i32], [500 x i32]* %12, i64 %14
%16 = load i32, i32* %7
%17 = sub nsw i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds [500 x i32], [500 x i32]* %15, i64 0, i64 %18
%20 = load i32, i32* %19
store i32 %20, i32* %4
br label %21
21: ; preds = %11, %10
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @prev_col([500 x i32]* nocapture %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %11, label %5
5: ; preds = %3
%6 = sext i32 %1 to i64
%7 = add nsw i32 %2, -1
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [500 x i32], [500 x i32]* %0, i64 %6, i64 %8
%10 = load i32, i32* %9
br label %11
11: ; preds = %3, %5
%12 = phi i32 [ %10, %5 ], [ 0, %3 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ do_file_dirty(int /*<<< orphan*/, char *);
void file_dirty(void) { do_file_dirty(0, "file dirty"); }


x86 assembly (clang, -O0):
<file_dirty>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
call   1030 <do_file_dirty@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_dirty>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
jmp    1030 <do_file_dirty@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"file dirty\00"
define void @file_dirty() {
%1 = call i32 @do_file_dirty(i32 0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"file dirty\00"
define void @file_dirty() {
%1 = tail call i32 @do_file_dirty(i32 0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ rfbLog(char *);
void rfbLogPerror(char *str) {
  rfbLog("");
  perror(str);
}


x86 assembly (clang, -O0):
<rfbLogPerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1040 <rfbLog@plt>
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfbLogPerror>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1040 <rfbLog@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <perror@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @rfbLogPerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @rfbLog(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @perror(i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define void @rfbLogPerror(i8* nocapture %0) {
%2 = tail call i32 @rfbLog(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @perror(i8* %0)
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *default_alloc(size_t size, void *pvt) { return malloc(size); }


x86 assembly (clang, -O0):
<default_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_alloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @default_alloc(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i64, i64* %3
%6 = call i8* @malloc(i64 %5)
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @default_alloc(i64 %0, i8* nocapture readnone %1) {
%3 = tail call i8* @malloc(i64 %0)
ret i8* %3
}
void upper(char *in, char *out) {
  int i;
  for (i = 0; in[i] != 0; ++i) {
    out[i] = in[i] & 0x5f;
  }
  out[i] = 0;
}


x86 assembly (clang, -O0):
<upper>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1152 <upper+0x52>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
and    $0x5f,%eax
mov    %al,%dl
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <upper+0x13>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<upper>:
mov    (%rdi),%al
test   %al,%al
je     1129 <upper+0x29>
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
and    $0x5f,%al
mov    %al,(%rsi,%rcx,1)
movzbl 0x1(%rdi,%rcx,1),%eax
add    $0x1,%rcx
test   %al,%al
jne    1110 <upper+0x10>
mov    %ecx,%eax
movb   $0x0,(%rsi,%rax,1)
ret
xor    %eax,%eax
movb   $0x0,(%rsi,%rax,1)
ret

LLVM IR (-O0):
define void @upper(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %27, %2
%7 = load i8*, i8** %3
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %30
14: ; preds = %6
%15 = load i8*, i8** %3
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = and i32 %20, 95
%22 = trunc i32 %21 to i8
%23 = load i8*, i8** %4
%24 = load i32, i32* %5
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i8, i8* %23, i64 %25
store i8 %22, i8* %26
br label %27
27: ; preds = %14
%28 = load i32, i32* %5
%29 = add nsw i32 %28, 1
store i32 %29, i32* %5
br label %6
30: ; preds = %6
%31 = load i8*, i8** %4
%32 = load i32, i32* %5
%33 = sext i32 %32 to i64
%34 = getelementptr inbounds i8, i8* %31, i64 %33
store i8 0, i8* %34
ret void
}

LLVM IR (-O2):
define void @upper(i8* nocapture %0, i8* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %10, %5 ], [ 0, %2 ]
%7 = phi i8 [ %12, %5 ], [ %3, %2 ]
%8 = and i8 %7, 95
%9 = getelementptr inbounds i8, i8* %1, i64 %6
store i8 %8, i8* %9
%10 = add nuw nsw i64 %6, 1
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %5
14: ; preds = %5
%15 = and i64 %10, 4294967295
br label %16
16: ; preds = %14, %2
%17 = phi i64 [ 0, %2 ], [ %15, %14 ]
%18 = getelementptr inbounds i8, i8* %1, i64 %17
store i8 0, i8* %18
ret void
}
void rop3_6_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D ^ S;
  stk2 = ~stk2;
  stk1 = T | stk2;
  stk1 = ~stk1;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_6_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_6_0_0>:
xor    (%rdi),%sil
not    %dl
and    %sil,%dl
mov    %dl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_6_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = xor i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %8
%17 = zext i8 %16 to i32
%18 = xor i32 %17, -1
%19 = trunc i32 %18 to i8
store i8 %19, i8* %8
%20 = load i8, i8* %6
%21 = zext i8 %20 to i32
%22 = load i8, i8* %8
%23 = zext i8 %22 to i32
%24 = or i32 %21, %23
%25 = trunc i32 %24 to i8
store i8 %25, i8* %7
%26 = load i8, i8* %7
%27 = zext i8 %26 to i32
%28 = xor i32 %27, -1
%29 = trunc i32 %28 to i8
store i8 %29, i8* %7
%30 = load i8, i8* %7
%31 = load i8*, i8** %4
store i8 %30, i8* %31
ret void
}

LLVM IR (-O2):
define void @rop3_6_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, %1
%6 = xor i8 %2, -1
%7 = and i8 %5, %6
store i8 %7, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(short *);
void freeLinS(short *line) { free(line); }


x86 assembly (clang, -O0):
<freeLinS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeLinS>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeLinS(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = call i32 @free(i16* %3)
ret void
}

LLVM IR (-O2):
define void @freeLinS(i16* nocapture %0) {
%2 = tail call i32 @free(i16* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void cleanup(void) { system("rm -fr DIR"); }


x86 assembly (clang, -O0):
<cleanup>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanup>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"rm -fr DIR\00"
define void @cleanup() {
%1 = call i32 @system(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"rm -fr DIR\00"
define void @cleanup() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int _stricmp(char const *, char const *);
int strcasecmp(const char *s1, const char *s2) { return _stricmp(s1, s2); }


x86 assembly (clang, -O0):
<strcasecmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_stricmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcasecmp>:
jmp    1030 <_stricmp@plt>

LLVM IR (-O0):
define i32 @strcasecmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @_stricmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strcasecmp(i8* %0, i8* %1) {
%3 = tail call i32 @_stricmp(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XGetWMHints() {
  printf("XGetWMHints called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XGetWMHints>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XGetWMHints>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"XGetWMHints called\0A\00"
define i32 @XGetWMHints() {
%1 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [19 x i8] c"XGetWMHints called\00"
define i32 @XGetWMHints() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int next_utf8(char const *, int *);
int fn_ch_121(const char *text) {
  int pos = 0;
  if (next_utf8(text, &pos) == 121)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
<fn_ch_121>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
call   1030 <next_utf8@plt>
cmp    $0x79,%eax
jne    1144 <fn_ch_121+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114b <fn_ch_121+0x3b>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_ch_121>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
call   1030 <next_utf8@plt>
mov    %eax,%ecx
mov    $0xffffffff,%eax
cmp    $0x79,%ecx
jne    1133 <fn_ch_121+0x23>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fn_ch_121(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @next_utf8(i8* %5, i32* %4)
%7 = icmp eq i32 %6, 121
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, i32* %4
store i32 %9, i32* %2
br label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %11
11: ; preds = %10, %8
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @fn_ch_121(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @next_utf8(i8* %0, i32* %2)
%5 = icmp eq i32 %4, 121
%6 = load i32, i32* %2
%7 = select i1 %5, i32 %6, i32 -1
ret i32 %7
}
const char *xcflGetVersionString(void) { return "0.3.1"; }


x86 assembly (clang, -O0):
<xcflGetVersionString>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcflGetVersionString>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"0.3.1\00"
define i8* @xcflGetVersionString() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"0.3.1\00"
define i8* @xcflGetVersionString() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
void gtk_icon_size_register_alias() {}


x86 assembly (clang, -O0):
<gtk_icon_size_register_alias>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_size_register_alias>:
ret

LLVM IR (-O0):
define void @gtk_icon_size_register_alias() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_size_register_alias() {
ret void
}
__attribute__((always_)) void sync$fence$RDP_SMP() {}


x86 assembly (clang, -O0):
<sync$fence$RDP_SMP>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sync$fence$RDP_SMP>:
ret

LLVM IR (-O0):
define void @"sync$fence$RDP_SMP"() {
ret void
}

LLVM IR (-O2):
define void @"sync$fence$RDP_SMP"() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void f() { puts("f"); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"f\00"
define void @f() {
%1 = call i32 @puts(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"f\00"
define void @f() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}
const char *f_name_out(long long int i) {
  switch (i) {
  case 0:
    return "o0";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<f_name_out>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
test   %rax,%rax
jne    112a <f_name_out+0x2a>
jmp    111a <f_name_out+0x1a>
lea    0xedf(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1132 <f_name_out+0x32>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_name_out>:
xor    %eax,%eax
test   %rdi,%rdi
lea    0xef4(%rip),%rcx
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"o0\00"
define i8* @f_name_out(i64 %0) {
%2 = alloca i8*
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
switch i64 %4, label %6 [
i64 0, label %5
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %7
6: ; preds = %1
store i8* null, i8** %2
br label %7
7: ; preds = %6, %5
%8 = load i8*, i8** %2
ret i8* %8
}

LLVM IR (-O2):
@.str = [3 x i8] c"o0\00"
define i8* @f_name_out(i64 %0) {
%2 = icmp eq i64 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* null
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ __setCHRBank5Low(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ m22_SetChrROMBank5();
void m22_setParamsDXX2(uint16_t addr, uint8_t val) {
  __setCHRBank5Low(addr, val);
  m22_SetChrROMBank5();
}


x86 assembly (clang, -O0):
<m22_setParamsDXX2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__setCHRBank5Low@plt>
mov    $0x0,%al
call   1040 <m22_SetChrROMBank5@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m22_setParamsDXX2>:
push   %rax
call   1030 <__setCHRBank5Low@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <m22_SetChrROMBank5@plt>

LLVM IR (-O0):
define void @m22_setParamsDXX2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__setCHRBank5Low(i32 %5, i32 %6)
%8 = call i32 (...) @m22_SetChrROMBank5()
ret void
}

LLVM IR (-O2):
define void @m22_setParamsDXX2(i32 %0, i32 %1) {
%3 = tail call i32 @__setCHRBank5Low(i32 %0, i32 %1)
%4 = tail call i32 (...) @m22_SetChrROMBank5()
ret void
}
/* Variables and functions */
double sqrt(double);
double dist_d(double x1, double y1, double x2, double y2) {
  return sqrt((x1 - x2) * (x1 - x2) + (y1 - y2) * (y1 - y2));
}


x86 assembly (clang, -O0):
<dist_d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x18(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
subsd  -0x18(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm1
subsd  -0x20(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm3
subsd  -0x20(%rbp),%xmm3
mulsd  %xmm3,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dist_d>:
subsd  %xmm2,%xmm0
subsd  %xmm3,%xmm1
mulsd  %xmm1,%xmm1
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1133 <dist_d+0x23>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @dist_d(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %5
%10 = load double, double* %7
%11 = fsub double %9, %10
%12 = load double, double* %5
%13 = load double, double* %7
%14 = fsub double %12, %13
%15 = load double, double* %6
%16 = load double, double* %8
%17 = fsub double %15, %16
%18 = load double, double* %6
%19 = load double, double* %8
%20 = fsub double %18, %19
%21 = fmul double %17, %20
%22 = call double @llvm.fmuladd.f64(double %11, double %14, double %21)
%23 = call double @sqrt(double %22)
ret double %23
}

LLVM IR (-O2):
define double @dist_d(double %0, double %1, double %2, double %3) {
%5 = fsub double %0, %2
%6 = fsub double %1, %3
%7 = fmul double %6, %6
%8 = tail call double @llvm.fmuladd.f64(double %5, double %5, double %7)
%9 = tail call double @sqrt(double %8)
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char const *, char *);
int strlen(char const *);
int first_patch(char const *version) {
  int l = strlen(version);
  if (l > 3 && !strcmp(version + l - 3, "pre")) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<first_patch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x3,-0x14(%rbp)
jle    1172 <first_patch+0x52>
mov    -0x10(%rbp),%rdi
movslq -0x14(%rbp),%rax
add    %rax,%rdi
add    $0xfffffffffffffffd,%rdi
lea    0xea8(%rip),%rsi
call   1040 <strcmp@plt>
cmp    $0x0,%eax
jne    1172 <first_patch+0x52>
movl   $0x1,-0x4(%rbp)
jmp    1179 <first_patch+0x59>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<first_patch>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
cmp    $0x4,%eax
jl     1148 <first_patch+0x28>
mov    %eax,%eax
lea    (%rbx,%rax,1),%rdi
add    $0xfffffffffffffffd,%rdi
lea    0xec1(%rip),%rsi
call   1040 <strcmp@plt>
test   %eax,%eax
je     114c <first_patch+0x2c>
xor    %eax,%eax
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"pre\00"
define i32 @first_patch(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 3
br i1 %8, label %9, label %18
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = load i32, i32* %4
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = getelementptr inbounds i8, i8* %13, i64 -3
%15 = call i32 @strcmp(i8* %14, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%16 = icmp ne i32 %15, 0
br i1 %16, label %18, label %17
17: ; preds = %9
store i32 1, i32* %2
br label %19
18: ; preds = %9, %1
store i32 0, i32* %2
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
@.str = [4 x i8] c"pre\00"
define i32 @first_patch(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 3
br i1 %3, label %4, label %10
4: ; preds = %1
%5 = zext i32 %2 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = getelementptr inbounds i8, i8* %6, i64 -3
%8 = tail call i32 @strcmp(i8* %7, i8* dereferenceable(4) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%9 = icmp eq i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %4, %1
br label %11
11: ; preds = %4, %10
%12 = phi i32 [ 0, %10 ], [ 1, %4 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ ft_putnbr(unsigned int);
int /*<<< orphan*/ write(int, unsigned int *, int);
void ft_putnbr_unsgned(unsigned int n) {
  if (n < 10) {
    n = n + 48;
    write(1, &n, 1);
  } else {
    ft_putnbr(n / 10);
    ft_putnbr(n % 10);
  }
}


x86 assembly (clang, -O0):
<ft_putnbr_unsgned>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jae    1153 <ft_putnbr_unsgned+0x33>
mov    -0x4(%rbp),%eax
add    $0x30,%eax
mov    %eax,-0x4(%rbp)
mov    $0x1,%edx
lea    -0x4(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
jmp    1179 <ft_putnbr_unsgned+0x59>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,%edi
call   1040 <ft_putnbr@plt>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%edi
call   1040 <ft_putnbr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putnbr_unsgned>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
cmp    $0x9,%edi
ja     114c <ft_putnbr_unsgned+0x2c>
add    $0x30,%ebp
mov    %ebp,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %ebp,%eax
mov    $0xcccccccd,%ebx
imul   %rax,%rbx
shr    $0x23,%rbx
mov    %ebx,%edi
call   1040 <ft_putnbr@plt>
add    %ebx,%ebx
lea    (%rbx,%rbx,4),%eax
sub    %eax,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <ft_putnbr@plt>

LLVM IR (-O0):
define void @ft_putnbr_unsgned(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ult i32 %3, 10
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = add i32 %6, 48
store i32 %7, i32* %2
%8 = call i32 @write(i32 1, i32* %2, i32 1)
br label %16
9: ; preds = %1
%10 = load i32, i32* %2
%11 = udiv i32 %10, 10
%12 = call i32 @ft_putnbr(i32 %11)
%13 = load i32, i32* %2
%14 = urem i32 %13, 10
%15 = call i32 @ft_putnbr(i32 %14)
br label %16
16: ; preds = %9, %5
ret void
}

LLVM IR (-O2):
define void @ft_putnbr_unsgned(i32 %0) {
%2 = alloca i32
%3 = icmp ult i32 %0, 10
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = add nuw nsw i32 %0, 48
store i32 %5, i32* %2
%6 = call i32 @write(i32 1, i32* %2, i32 1)
br label %12
7: ; preds = %1
%8 = udiv i32 %0, 10
%9 = tail call i32 @ft_putnbr(i32 %8)
%10 = urem i32 %0, 10
%11 = tail call i32 @ft_putnbr(i32 %10)
br label %12
12: ; preds = %7, %4
ret void
}