xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ i2d_of_void;
typedef int /*<<< orphan*/ FILE;
typedef int /*<<< orphan*/ DSA;

/* Variables and functions */
int PEM_ASN1_write(int /*<<< orphan*/ *, int /*<<< orphan*/,
                   int /*<<< orphan*/ *, void *, int /*<<< orphan*/ *,
                   int /*<<< orphan*/ *, int /*<<< orphan*/,
                   int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ PEM_STRING_DSAPARAMS;
scalar_t__ i2d_DSAparams;
int PEM_write_DSAparams(FILE *fp, const DSA *x) {
  return PEM_ASN1_write((i2d_of_void *)i2d_DSAparams, PEM_STRING_DSAPARAMS, fp,
                        (void *)x, NULL, NULL, 0, NULL, NULL);
}


x86 assembly (clang, -O0):
<PEM_write_DSAparams>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%rdi
mov    0x2ebf(%rip),%rax
mov    (%rax),%esi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%r9d
xor    %eax,%eax
mov    %r9,%r8
movl   $0x0,(%rsp)
movq   $0x0,0x8(%rsp)
movq   $0x0,0x10(%rsp)
call   1030 <PEM_ASN1_write@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PEM_write_DSAparams>:
sub    $0x18,%rsp
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2ebf(%rip),%rax
mov    (%rax),%rdi
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
xorps  %xmm0,%xmm0
movups %xmm0,0x8(%rsp)
movl   $0x0,(%rsp)
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <PEM_ASN1_write@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@i2d_DSAparams = global i64 0
@PEM_STRING_DSAPARAMS = global i32 0
define i32 @PEM_write_DSAparams(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i64, i64* @i2d_DSAparams
%6 = inttoptr i64 %5 to i32*
%7 = load i32, i32* @PEM_STRING_DSAPARAMS
%8 = load i32*, i32** %3
%9 = load i32*, i32** %4
%10 = bitcast i32* %9 to i8*
%11 = call i32 @PEM_ASN1_write(i32* %6, i32 %7, i32* %8, i8* %10, i32* null, i32* null, i32 0, i32* null, i32* null)
ret i32 %11
}

LLVM IR (-O2):
@i2d_DSAparams = global i64 0
@PEM_STRING_DSAPARAMS = global i32 0
define i32 @PEM_write_DSAparams(i32* %0, i32* %1) {
%3 = load i64, i64* @i2d_DSAparams
%4 = inttoptr i64 %3 to i32*
%5 = load i32, i32* @PEM_STRING_DSAPARAMS
%6 = bitcast i32* %1 to i8*
%7 = tail call i32 @PEM_ASN1_write(i32* %4, i32 %5, i32* %0, i8* %6, i32* null, i32* null, i32 0, i32* null, i32* null)
ret i32 %7
}
int gcd(int n, int m) {
  int temp;
  if (n < m) {
    temp = m;
    m = n;
    n = temp;
  }
  if (n % m == 0)
    return m;
  else {
    return gcd(n % m, m);
  }
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113c <gcd+0x2c>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1157 <gcd+0x47>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116b <gcd+0x5b>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%edi
mov    -0xc(%rbp),%esi
call   1030 <gcd@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmp    %esi,%edx
mov    %edx,%eax
cmovl  %esi,%eax
cmovl  %edx,%esi
cltd
idiv   %esi
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32, i32* %5
store i32 %11, i32* %6
%12 = load i32, i32* %4
store i32 %12, i32* %5
%13 = load i32, i32* %6
store i32 %13, i32* %4
br label %14
14: ; preds = %10, %2
%15 = load i32, i32* %4
%16 = load i32, i32* %5
%17 = srem i32 %15, %16
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %21
19: ; preds = %14
%20 = load i32, i32* %5
store i32 %20, i32* %3
br label %27
21: ; preds = %14
%22 = load i32, i32* %4
%23 = load i32, i32* %5
%24 = srem i32 %22, %23
%25 = load i32, i32* %5
%26 = call i32 @gcd(i32 %24, i32 %25)
store i32 %26, i32* %3
br label %27
27: ; preds = %21, %19
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %0, %2 ], [ %9, %3 ]
%5 = phi i32 [ %1, %2 ], [ %8, %3 ]
%6 = icmp slt i32 %4, %5
%7 = select i1 %6, i32 %5, i32 %4
%8 = select i1 %6, i32 %4, i32 %5
%9 = srem i32 %7, %8
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %3
11: ; preds = %3
ret i32 %8
}
/* Type definitions */
struct io_uring_sqe {
  int dummy;
};
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int /*<<< orphan*/ io_uring_prep_rw(int, struct io_uring_sqe *, int,
                                    void const *, unsigned int,
                                    int /*<<< orphan*/);
void io_uring_prep_write_fixed(struct io_uring_sqe *sqe, int fd,
                               const void *buf, unsigned nbytes, off_t offset) {
  io_uring_prep_rw(5, sqe, fd, buf, nbytes, offset);
}


x86 assembly (clang, -O0):
<io_uring_prep_write_fixed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
mov    -0x20(%rbp),%r9d
mov    $0x5,%edi
call   1030 <io_uring_prep_rw@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_uring_prep_write_fixed>:
mov    %r8d,%r9d
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %esi,%edx
mov    %rdi,%rsi
mov    $0x5,%edi
jmp    1030 <io_uring_prep_rw@plt>

LLVM IR (-O0):
%struct.io_uring_sqe = type { i32 }
define void @io_uring_prep_write_fixed(%struct.io_uring_sqe* %0, i32 %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca %struct.io_uring_sqe*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store %struct.io_uring_sqe* %0, %struct.io_uring_sqe** %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load %struct.io_uring_sqe*, %struct.io_uring_sqe** %6
%12 = load i32, i32* %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @io_uring_prep_rw(i32 5, %struct.io_uring_sqe* %11, i32 %12, i8* %13, i32 %14, i32 %15)
ret void
}

LLVM IR (-O2):
%struct.io_uring_sqe = type { i32 }
define void @io_uring_prep_write_fixed(%struct.io_uring_sqe* %0, i32 %1, i8* %2, i32 %3, i32 %4) {
%6 = tail call i32 @io_uring_prep_rw(i32 5, %struct.io_uring_sqe* %0, i32 %1, i8* %2, i32 %3, i32 %4)
ret void
}
/* Variables and functions */
scalar_t__ isalpha(char);
char toupper(char);
char *strupr(char *s) {
  char *p;
  for (p = s; *p; p++) {
    if (isalpha(*p))
      *p = toupper(*p);
  }
  return s;
}


x86 assembly (clang, -O0):
<strupr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1181 <strupr+0x61>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1040 <isalpha@plt>
cmp    $0x0,%rax
je     116b <strupr+0x4b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <toupper@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
jmp    1170 <strupr+0x50>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1134 <strupr+0x14>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strupr>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%al
test   %al,%al
je     1165 <strupr+0x45>
mov    %r14,%rbx
jmp    114c <strupr+0x2c>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
je     1165 <strupr+0x45>
movsbl %al,%edi
call   1040 <isalpha@plt>
test   %rax,%rax
je     1140 <strupr+0x20>
movsbl (%rbx),%edi
call   1030 <toupper@plt>
mov    %al,(%rbx)
jmp    1140 <strupr+0x20>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strupr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %20, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %23
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call i64 @isalpha(i8 signext %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = load i8, i8* %15
%17 = call signext i8 @toupper(i8 signext %16)
%18 = load i8*, i8** %3
store i8 %17, i8* %18
br label %19
19: ; preds = %14, %9
br label %20
20: ; preds = %19
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
br label %5
23: ; preds = %5
%24 = load i8*, i8** %2
ret i8* %24
}

LLVM IR (-O2):
define i8* @strupr(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %12
%5 = phi i8 [ %14, %12 ], [ %2, %1 ]
%6 = phi i8* [ %13, %12 ], [ %0, %1 ]
%7 = tail call i64 @isalpha(i8 signext %5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = load i8, i8* %6
%11 = tail call signext i8 @toupper(i8 signext %10)
store i8 %11, i8* %6
br label %12
12: ; preds = %4, %9
%13 = getelementptr inbounds i8, i8* %6, i64 1
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %12, %1
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ BUFSIZ;
int /*<<< orphan*/ _IOFBF;
int /*<<< orphan*/ _IONBF;
int /*<<< orphan*/ setvbuf(int /*<<< orphan*/ *, char *, int /*<<< orphan*/,
                           int /*<<< orphan*/);
void setbuf(FILE *__restrict fp, char *__restrict buf) {
  (void)setvbuf(fp, buf, buf ? _IOFBF : _IONBF, BUFSIZ);
}


x86 assembly (clang, -O0):
<setbuf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114c <setbuf+0x3c>
mov    0x2e8e(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x24(%rbp)
jmp    1158 <setbuf+0x48>
mov    0x2e95(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%edx
mov    0x2e6e(%rip),%rax
mov    (%rax),%ecx
call   1030 <setvbuf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setbuf>:
test   %rsi,%rsi
jne    111e <setbuf+0xe>
mov    0x2ecc(%rip),%rax
jmp    1125 <setbuf+0x15>
mov    0x2eab(%rip),%rax
mov    (%rax),%edx
mov    0x2eaa(%rip),%rax
mov    (%rax),%ecx
jmp    1030 <setvbuf@plt>

LLVM IR (-O0):
@_IOFBF = global i32 0
@_IONBF = global i32 0
@BUFSIZ = global i32 0
define void @setbuf(i32* noalias %0, i8* noalias %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* @_IOFBF
br label %13
11: ; preds = %2
%12 = load i32, i32* @_IONBF
br label %13
13: ; preds = %11, %9
%14 = phi i32 [ %10, %9 ], [ %12, %11 ]
%15 = load i32, i32* @BUFSIZ
%16 = call i32 @setvbuf(i32* %5, i8* %6, i32 %14, i32 %15)
ret void
}

LLVM IR (-O2):
@_IOFBF = global i32 0
@_IONBF = global i32 0
@BUFSIZ = global i32 0
define void @setbuf(i32* noalias nocapture %0, i8* noalias %1) {
%3 = icmp eq i8* %1, null
%4 = load i32, i32* @_IOFBF
%5 = load i32, i32* @_IONBF
%6 = select i1 %3, i32 %5, i32 %4
%7 = load i32, i32* @BUFSIZ
%8 = tail call i32 @setvbuf(i32* %0, i8* %1, i32 %6, i32 %7)
ret void
}
void RGBAToYRow_Any_SSSE3() {}


x86 assembly (clang, -O0):
<RGBAToYRow_Any_SSSE3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RGBAToYRow_Any_SSSE3>:
ret

LLVM IR (-O0):
define void @RGBAToYRow_Any_SSSE3() {
ret void
}

LLVM IR (-O2):
define void @RGBAToYRow_Any_SSSE3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
char *malloc(size_t);
char *allocate_stack(void) {
  size_t stack_size = 0x10000;
  char *stack = malloc(stack_size);
  assert(stack != NULL);
  return stack + stack_size;
}


x86 assembly (clang, -O0):
<allocate_stack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x10000,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rax
add    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocate_stack>:
push   %rbx
mov    $0x10000,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1030 <assert@plt>
add    $0x10000,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @allocate_stack() {
%1 = alloca i64
%2 = alloca i8*
store i64 65536, i64* %1
%3 = load i64, i64* %1
%4 = call i8* @malloc(i64 %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i8*, i8** %2
%10 = load i64, i64* %1
%11 = getelementptr inbounds i8, i8* %9, i64 %10
ret i8* %11
}

LLVM IR (-O2):
define noalias i8* @allocate_stack() {
%1 = tail call dereferenceable_or_null(65536) i8* @malloc(i64 65536)
%2 = icmp ne i8* %1, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = getelementptr inbounds i8, i8* %1, i64 65536
ret i8* %5
}
/* Variables and functions */
char *tempnam(char const *, char const *);
char *c_tempnam(const char *arg0, const char *arg1) {
  return tempnam(arg0, arg1);
}


x86 assembly (clang, -O0):
<c_tempnam>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <tempnam@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_tempnam>:
jmp    1030 <tempnam@plt>

LLVM IR (-O0):
define i8* @c_tempnam(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @tempnam(i8* %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @c_tempnam(i8* %0, i8* %1) {
%3 = tail call i8* @tempnam(i8* %0, i8* %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ test_sequence();
int main() {
  test_sequence();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_sequence@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_sequence@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_sequence()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_sequence()
ret i32 0
}
int qsort_cmp__AHEAP_KEY(const void *x, const void *y) {
  if (*((int *)x) > *((int *)y))
    return (-1);
  else
    return (*((int *)x) < *((int *)y));
}


x86 assembly (clang, -O0):
<qsort_cmp__AHEAP_KEY>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jle    112a <qsort_cmp__AHEAP_KEY+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1141 <qsort_cmp__AHEAP_KEY+0x41>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_cmp__AHEAP_KEY>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setl   %cl
mov    $0xffffffff,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @qsort_cmp__AHEAP_KEY(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = load i8*, i8** %5
%10 = bitcast i8* %9 to i32*
%11 = load i32, i32* %10
%12 = icmp sgt i32 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 -1, i32* %3
br label %23
14: ; preds = %2
%15 = load i8*, i8** %4
%16 = bitcast i8* %15 to i32*
%17 = load i32, i32* %16
%18 = load i8*, i8** %5
%19 = bitcast i8* %18 to i32*
%20 = load i32, i32* %19
%21 = icmp slt i32 %17, %20
%22 = zext i1 %21 to i32
store i32 %22, i32* %3
br label %23
23: ; preds = %14, %13
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @qsort_cmp__AHEAP_KEY(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = icmp slt i32 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_t;

/* Variables and functions */
int pthread_join(int /*<<< orphan*/, void **);
int xthr_join(pthread_t thread, void **status) {
  return -pthread_join(thread, status);
}


x86 assembly (clang, -O0):
<xthr_join>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <pthread_join@plt>
mov    %eax,%ecx
xor    %eax,%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xthr_join>:
push   %rax
call   1030 <pthread_join@plt>
neg    %eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @xthr_join(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
%7 = call i32 @pthread_join(i32 %5, i8** %6)
%8 = sub nsw i32 0, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @xthr_join(i32 %0, i8** %1) {
%3 = tail call i32 @pthread_join(i32 %0, i8** %1)
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ jsmin();
int main(int argc, char *argv[]) {
  jsmin();
  return (EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <jsmin@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <jsmin@plt>
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @jsmin()
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @jsmin()
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
/* Variables and functions */
int O_CLOEXEC;
int O_RDONLY;
int open(char *, int);
int suspend_open() {
  return open("/run/suspend/disabled", O_RDONLY | O_CLOEXEC);
}


x86 assembly (clang, -O0):
<suspend_open>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%esi
mov    0x2eac(%rip),%rax
or     (%rax),%esi
lea    0xed3(%rip),%rdi
call   1030 <open@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<suspend_open>:
mov    0x2ed1(%rip),%rax
mov    0x2eb2(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
lea    0xed7(%rip),%rdi
jmp    1030 <open@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"/run/suspend/disabled\00"
@O_RDONLY = global i32 0
@O_CLOEXEC = global i32 0
define i32 @suspend_open() {
%1 = load i32, i32* @O_RDONLY
%2 = load i32, i32* @O_CLOEXEC
%3 = or i32 %1, %2
%4 = call i32 @open(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [22 x i8] c"/run/suspend/disabled\00"
@O_RDONLY = global i32 0
@O_CLOEXEC = global i32 0
define i32 @suspend_open() {
%1 = load i32, i32* @O_RDONLY
%2 = load i32, i32* @O_CLOEXEC
%3 = or i32 %2, %1
%4 = tail call i32 @open(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ ndm_endian_betoh16(int /*<<< orphan*/ const);
uint16_t ndm_endian_htobe16(const uint16_t x) { return ndm_endian_betoh16(x); }


x86 assembly (clang, -O0):
<ndm_endian_htobe16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ndm_endian_betoh16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndm_endian_htobe16>:
jmp    1030 <ndm_endian_betoh16@plt>

LLVM IR (-O0):
define i32 @ndm_endian_htobe16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ndm_endian_betoh16(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ndm_endian_htobe16(i32 %0) {
%2 = tail call i32 @ndm_endian_betoh16(i32 %0)
ret i32 %2
}
void lock_memory(void) {}


x86 assembly (clang, -O0):
<lock_memory>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lock_memory>:
ret

LLVM IR (-O0):
define void @lock_memory() {
ret void
}

LLVM IR (-O2):
define void @lock_memory() {
ret void
}
void test_three(int x, int y) {
#pragma omp parallel for simd collapse(1)
  for (int i = 0; i < x; i++)
    for (int i = 0; i < y; i++)
      ;
}


x86 assembly (clang, -O0):
<test_three>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1156 <test_three+0x56>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1143 <test_three+0x43>
jmp    1135 <test_three+0x35>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1124 <test_three+0x24>
jmp    1148 <test_three+0x48>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1111 <test_three+0x11>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_three>:
ret

LLVM IR (-O0):
define void @test_three(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %7
7: ; preds = %21, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %7
store i32 0, i32* %6
br label %12
12: ; preds = %17, %11
%13 = load i32, i32* %6
%14 = load i32, i32* %4
%15 = icmp slt i32 %13, %14
br i1 %15, label %16, label %20
16: ; preds = %12
br label %17
17: ; preds = %16
%18 = load i32, i32* %6
%19 = add nsw i32 %18, 1
store i32 %19, i32* %6
br label %12
20: ; preds = %12
br label %21
21: ; preds = %20
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %7
24: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @test_three(i32 %0, i32 %1) {
ret void
}
int compare(const void *x, const void *y) {
  int *low = (int *)x;
  int *high = (int *)y;
  if (*low < *high) {
    return -1;
  } else {
    return *low > *high ? 1 : 0;
  }
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%eax
jge    113a <compare+0x3a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1155 <compare+0x55>
mov    -0x20(%rbp),%rax
mov    (%rax),%edx
mov    -0x28(%rbp),%rax
mov    (%rax),%esi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmovg  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i32*
store i32* %11, i32** %7
%12 = load i32*, i32** %6
%13 = load i32, i32* %12
%14 = load i32*, i32** %7
%15 = load i32, i32* %14
%16 = icmp slt i32 %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %26
18: ; preds = %2
%19 = load i32*, i32** %6
%20 = load i32, i32* %19
%21 = load i32*, i32** %7
%22 = load i32, i32* %21
%23 = icmp sgt i32 %20, %22
%24 = zext i1 %23 to i64
%25 = select i1 %23, i32 1, i32 0
store i32 %25, i32* %3
br label %26
26: ; preds = %18, %17
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
%8 = icmp sgt i32 %5, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
__attribute__((no, noclone)) unsigned __int128 t160_3add(signed __int128 y) {
  unsigned __int128 r;
  if (__builtin_add_overflow((signed __int128)(-5), y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t160_3add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    %rcx,%r9
sar    $0x3f,%r9
add    $0xfffffffffffffffb,%rdx
adc    $0xffffffffffffffff,%rcx
mov    %r9,%r8
adc    $0xffffffffffffffff,%r8
adc    $0xffffffffffffffff,%r9
mov    %r8d,%eax
and    $0x1,%eax
mov    %eax,%esi
mov    %rsi,%rax
neg    %rax
mov    %rax,%rdi
xor    %r9,%rdi
xor    %r8,%rax
or     %rdi,%rax
or     %rsi,%rax
setne  %al
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x38(%rbp)
test   $0x1,%al
jne    1187 <t160_3add+0x77>
jmp    118e <t160_3add+0x7e>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t160_3add>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
mov    %rdi,%r14
add    $0xfffffffffffffffb,%r14
mov    %rsi,%rbx
adc    $0xffffffffffffffff,%rbx
mov    $0x4,%ecx
cmp    %rdi,%rcx
sbb    %rsi,%rax
jl     1138 <t160_3add+0x28>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %r14,%rax
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t160_3add(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = sext i128 %11 to i129
%13 = call { i129, i1 } @llvm.sadd.with.overflow.i129(i129 -5, i129 %12)
%14 = extractvalue { i129, i1 } %13, 1
%15 = extractvalue { i129, i1 } %13, 0
%16 = trunc i129 %15 to i128
%17 = zext i128 %16 to i129
%18 = icmp ne i129 %15, %17
%19 = or i1 %14, %18
store i128 %16, i128* %6
br i1 %19, label %20, label %22
20: ; preds = %2
%21 = call i32 (...) @bar()
br label %22
22: ; preds = %20, %2
%23 = load i128, i128* %6
store i128 %23, i128* %3
%24 = bitcast i128* %3 to { i64, i64 }*
%25 = load { i64, i64 }, { i64, i64 }* %24
ret { i64, i64 } %25
}

LLVM IR (-O2):
define { i64, i64 } @t160_3add(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = zext i128 %6 to i129
%8 = add nsw i129 %7, -5
%9 = icmp slt i128 %6, 5
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = trunc i129 %8 to i64
%14 = lshr i129 %8, 64
%15 = trunc i129 %14 to i64
%16 = insertvalue { i64, i64 } poison, i64 %13, 0
%17 = insertvalue { i64, i64 } %16, i64 %15, 1
ret { i64, i64 } %17
}
/* Variables and functions */
int do_parse_flags(char const **, char const *, int);
int parse_flags(const char **strp, const char *flags) {
  return do_parse_flags(strp, flags, 1);
}


x86 assembly (clang, -O0):
<parse_flags>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <do_parse_flags@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_flags>:
mov    $0x1,%edx
jmp    1030 <do_parse_flags@plt>

LLVM IR (-O0):
define i32 @parse_flags(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
store i8** %0, i8*** %3
store i8* %1, i8** %4
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %4
%7 = call i32 @do_parse_flags(i8** %5, i8* %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @parse_flags(i8** %0, i8* %1) {
%3 = tail call i32 @do_parse_flags(i8** %0, i8* %1, i32 1)
ret i32 %3
}
void primes(int n) {
  int i = 3, count, c;
  for (count = 2; count <= n;) {
    for (c = 2; c <= i - 1; c++) {
      if (i % c == 0)
        break;
    }
    if (c == i) {
      count++;
    }
    i++;
  }
}


x86 assembly (clang, -O0):
<primes>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1184 <primes+0x84>
movl   $0x2,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jg     1161 <primes+0x61>
mov    -0x8(%rbp),%eax
cltd
idivl  -0x10(%rbp)
cmp    $0x0,%edx
jne    114e <primes+0x4e>
jmp    1161 <primes+0x61>
jmp    1153 <primes+0x53>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1128 <primes+0x28>
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1176 <primes+0x76>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1115 <primes+0x15>
pop    %rbp
ret

x86 assembly (clang, -O2):
<primes>:
ret

LLVM IR (-O0):
define void @primes(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 3, i32* %3
store i32 2, i32* %4
br label %6
6: ; preds = %33, %1
%7 = load i32, i32* %4
%8 = load i32, i32* %2
%9 = icmp sle i32 %7, %8
br i1 %9, label %10, label %36
10: ; preds = %6
store i32 2, i32* %5
br label %11
11: ; preds = %23, %10
%12 = load i32, i32* %5
%13 = load i32, i32* %3
%14 = sub nsw i32 %13, 1
%15 = icmp sle i32 %12, %14
br i1 %15, label %16, label %26
16: ; preds = %11
%17 = load i32, i32* %3
%18 = load i32, i32* %5
%19 = srem i32 %17, %18
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %16
br label %26
22: ; preds = %16
br label %23
23: ; preds = %22
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
br label %11
26: ; preds = %21, %11
%27 = load i32, i32* %5
%28 = load i32, i32* %3
%29 = icmp eq i32 %27, %28
br i1 %29, label %30, label %33
30: ; preds = %26
%31 = load i32, i32* %4
%32 = add nsw i32 %31, 1
store i32 %32, i32* %4
br label %33
33: ; preds = %30, %26
%34 = load i32, i32* %3
%35 = add nsw i32 %34, 1
store i32 %35, i32* %3
br label %6
36: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @primes(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, int);
unsigned int strtoul(char *, int /*<<< orphan*/ *, int);
unsigned int strntoul(const char *str, int length, int base) {
  char buf[length + 1];
  memcpy(buf, str, length);
  buf[length] = '\0';
  return strtoul(buf, NULL, base);
}


x86 assembly (clang, -O0):
<strntoul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %rsp,%rcx
mov    %rcx,-0x18(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x28(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x28(%rbp),%rdi
movslq -0xc(%rbp),%rax
movb   $0x0,(%rdi,%rax,1)
mov    -0x10(%rbp),%edx
xor    %eax,%eax
mov    %eax,%esi
call   1040 <strtoul@plt>
mov    -0x18(%rbp),%rcx
mov    %rcx,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strntoul>:
push   %rbp
mov    %rsp,%rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r15d
mov    %rdi,%rsi
lea    0x1(%r15),%eax
mov    %rsp,%rbx
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
mov    %rbx,%rdi
mov    %r15d,%edx
call   1030 <memcpy@plt>
movslq %r15d,%rax
movb   $0x0,(%rax,%rbx,1)
mov    %rbx,%rdi
xor    %esi,%esi
mov    %r14d,%edx
call   1040 <strtoul@plt>
lea    -0x18(%rbp),%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @strntoul(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 1
%11 = zext i32 %10 to i64
%12 = call i8* @llvm.stacksave()
store i8* %12, i8** %7
%13 = alloca i8, i64 %11
store i64 %11, i64* %8
%14 = load i8*, i8** %4
%15 = load i32, i32* %5
%16 = call i32 @memcpy(i8* %13, i8* %14, i32 %15)
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %13, i64 %18
store i8 0, i8* %19
%20 = load i32, i32* %6
%21 = call i32 @strtoul(i8* %13, i32* null, i32 %20)
%22 = load i8*, i8** %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @strntoul(i8* %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, 1
%5 = zext i32 %4 to i64
%6 = alloca i8, i64 %5
%7 = call i32 @memcpy(i8* %6, i8* %0, i32 %1)
%8 = sext i32 %1 to i64
%9 = getelementptr inbounds i8, i8* %6, i64 %8
store i8 0, i8* %9
%10 = call i32 @strtoul(i8* nocapture %6, i32* null, i32 %2)
ret i32 %10
}
/* Variables and functions */
scalar_t__ isalpha(char);
scalar_t__ isupper(char);
int numUpper(char ch, int count) {
  int tempCount = count;
  if (isalpha(ch) && isupper(ch)) {
    tempCount++;
  }
  return tempCount;
}


x86 assembly (clang, -O0):
<numUpper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
je     1166 <numUpper+0x46>
movsbl -0x1(%rbp),%edi
call   1040 <isupper@plt>
cmp    $0x0,%rax
je     1166 <numUpper+0x46>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<numUpper>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <isalpha@plt>
test   %rax,%rax
je     1141 <numUpper+0x21>
movsbl %bpl,%edi
call   1040 <isupper@plt>
cmp    $0x1,%rax
sbb    $0xffffffff,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @numUpper(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
store i32 %6, i32* %5
%7 = load i8, i8* %3
%8 = call i64 @isalpha(i8 signext %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %2
%11 = load i8, i8* %3
%12 = call i64 @isupper(i8 signext %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %10
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 1
store i32 %16, i32* %5
br label %17
17: ; preds = %14, %10, %2
%18 = load i32, i32* %5
ret i32 %18
}

LLVM IR (-O2):
define i32 @numUpper(i8 signext %0, i32 %1) {
%3 = tail call i64 @isalpha(i8 signext %0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = tail call i64 @isupper(i8 signext %0)
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i32
%9 = add nsw i32 %8, %1
br label %10
10: ; preds = %5, %2
%11 = phi i32 [ %1, %2 ], [ %9, %5 ]
ret i32 %11
}
/* Variables and functions */
int httpGet(char *a_url, char *a_buffer, size_t a_bufferSize) { return 200; }


x86 assembly (clang, -O0):
<httpGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xc8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<httpGet>:
mov    $0xc8,%eax
ret

LLVM IR (-O0):
define i32 @httpGet(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
ret i32 200
}

LLVM IR (-O2):
define i32 @httpGet(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2) {
ret i32 200
}
/* Type definitions */
struct qre_il_pc_pack_item {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct qre_il_pc_pack_item *);
int qre_il_pc_pack_item_destroy(
    struct qre_il_pc_pack_item *qre_il_pc_pack_item) {
  free(qre_il_pc_pack_item);
  return 0;
}


x86 assembly (clang, -O0):
<qre_il_pc_pack_item_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qre_il_pc_pack_item_destroy>:
push   %rax
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.qre_il_pc_pack_item = type { i32 }
define i32 @qre_il_pc_pack_item_destroy(%struct.qre_il_pc_pack_item* %0) {
%2 = alloca %struct.qre_il_pc_pack_item*
store %struct.qre_il_pc_pack_item* %0, %struct.qre_il_pc_pack_item** %2
%3 = load %struct.qre_il_pc_pack_item*, %struct.qre_il_pc_pack_item** %2
%4 = call i32 @free(%struct.qre_il_pc_pack_item* %3)
ret i32 0
}

LLVM IR (-O2):
%struct.qre_il_pc_pack_item = type { i32 }
define i32 @qre_il_pc_pack_item_destroy(%struct.qre_il_pc_pack_item* nocapture %0) {
%2 = tail call i32 @free(%struct.qre_il_pc_pack_item* %0)
ret i32 0
}
void *f() {
  void *i = &i;
  return i;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
lea    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    -0x8(%rsp),%rax
ret

LLVM IR (-O0):
define i8* @f() {
%1 = alloca i8*
%2 = bitcast i8** %1 to i8*
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define i8* @f() {
%1 = alloca i8*
%2 = bitcast i8** %1 to i8*
ret i8* %2
}
/* Variables and functions */
int strcasecmp(char const *, char const *);
int module_libc_strcasecmp(const char *s1, const char *s2) {
  return strcasecmp(s1, s2);
}


x86 assembly (clang, -O0):
<module_libc_strcasecmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcasecmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_libc_strcasecmp>:
jmp    1030 <strcasecmp@plt>

LLVM IR (-O0):
define i32 @module_libc_strcasecmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcasecmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @module_libc_strcasecmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcasecmp(i8* %0, i8* %1)
ret i32 %3
}
/* Type definitions */
struct timespec {
  float tv_sec;
  double tv_nsec;
};

/* Variables and functions */
float timediff(struct timespec t2, struct timespec t1) {
  float diff = t2.tv_sec - t1.tv_sec;
  diff += (t2.tv_nsec - t1.tv_nsec) / 1000000000.0;
  return diff;
}


x86 assembly (clang, -O0):
<timediff>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x8(%rbp)
movss  %xmm2,-0x20(%rbp)
movsd  %xmm3,-0x18(%rbp)
movss  -0x10(%rbp),%xmm0
subss  -0x20(%rbp),%xmm0
movss  %xmm0,-0x24(%rbp)
movsd  -0x8(%rbp),%xmm1
subsd  -0x18(%rbp),%xmm1
movsd  0xec7(%rip),%xmm0
divsd  %xmm0,%xmm1
movss  -0x24(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x24(%rbp)
movss  -0x24(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<timediff>:
subss  %xmm2,%xmm0
subsd  %xmm3,%xmm1
divsd  0xef0(%rip),%xmm1
cvtss2sd %xmm0,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
%struct.timespec = type { float, double }
define float @timediff(float %0, double %1, float %2, double %3) {
%5 = alloca %struct.timespec
%6 = alloca %struct.timespec
%7 = alloca float
%8 = bitcast %struct.timespec* %5 to { float, double }*
%9 = getelementptr inbounds { float, double }, { float, double }* %8, i32 0, i32 0
store float %0, float* %9
%10 = getelementptr inbounds { float, double }, { float, double }* %8, i32 0, i32 1
store double %1, double* %10
%11 = bitcast %struct.timespec* %6 to { float, double }*
%12 = getelementptr inbounds { float, double }, { float, double }* %11, i32 0, i32 0
store float %2, float* %12
%13 = getelementptr inbounds { float, double }, { float, double }* %11, i32 0, i32 1
store double %3, double* %13
%14 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 0
%15 = load float, float* %14
%16 = getelementptr inbounds %struct.timespec, %struct.timespec* %6, i32 0, i32 0
%17 = load float, float* %16
%18 = fsub float %15, %17
store float %18, float* %7
%19 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 1
%20 = load double, double* %19
%21 = getelementptr inbounds %struct.timespec, %struct.timespec* %6, i32 0, i32 1
%22 = load double, double* %21
%23 = fsub double %20, %22
%24 = fdiv double %23, 1.000000e+09
%25 = load float, float* %7
%26 = fpext float %25 to double
%27 = fadd double %26, %24
%28 = fptrunc double %27 to float
store float %28, float* %7
%29 = load float, float* %7
ret float %29
}

LLVM IR (-O2):
define float @timediff(float %0, double %1, float %2, double %3) {
%5 = fsub float %0, %2
%6 = fsub double %1, %3
%7 = fdiv double %6, 1.000000e+09
%8 = fpext float %5 to double
%9 = fadd double %7, %8
%10 = fptrunc double %9 to float
ret float %10
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
unsigned int pthread_mutex_destroy(int /*<<< orphan*/ *);
unsigned int OSAL_MutexDelete(pthread_mutex_t *mutex) {
  return pthread_mutex_destroy(mutex);
}


x86 assembly (clang, -O0):
<OSAL_MutexDelete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_mutex_destroy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OSAL_MutexDelete>:
jmp    1030 <pthread_mutex_destroy@plt>

LLVM IR (-O0):
define i32 @OSAL_MutexDelete(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @pthread_mutex_destroy(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @OSAL_MutexDelete(i32* %0) {
%2 = tail call i32 @pthread_mutex_destroy(i32* %0)
ret i32 %2
}
create_allocate_tiff_file(file_name, image_header) char file_name[];
struct tiff_header_struct *image_header;
{
}


x86 assembly (clang, -O0):
<create_allocate_tiff_file>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_allocate_tiff_file>:
ret

LLVM IR (-O0):
%struct.tiff_header_struct = type opaque
define i32 @create_allocate_tiff_file(i8* %0, %struct.tiff_header_struct* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca %struct.tiff_header_struct*
store i8* %0, i8** %4
store %struct.tiff_header_struct* %1, %struct.tiff_header_struct** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.tiff_header_struct = type opaque
define i32 @create_allocate_tiff_file(i8* nocapture readnone %0, %struct.tiff_header_struct* nocapture readnone %1) {
ret i32 undef
}
void ff_hevc_put_hevc_qpel_h12_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_h12_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_h12_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_h12_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_h12_8_sse4() {
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t get_bits_uint64(uint64_t data, int bit0, int bit1) {
  return (data & (((uint64_t)1 << (bit1 + 1)) - 1)) >> bit0;
}


x86 assembly (clang, -O0):
<get_bits_uint64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
sub    $0x1,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_bits_uint64>:
lea    0x1(%rdx),%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
not    %eax
and    %edi,%eax
mov    %esi,%ecx
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @get_bits_uint64(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %6
%9 = add nsw i32 %8, 1
%10 = shl i32 1, %9
%11 = sub nsw i32 %10, 1
%12 = and i32 %7, %11
%13 = load i32, i32* %5
%14 = ashr i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @get_bits_uint64(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %2, 1
%5 = shl nsw i32 -1, %4
%6 = xor i32 %5, -1
%7 = and i32 %6, %0
%8 = ashr i32 %7, %1
ret i32 %8
}
int int_cmp_desc(const void *b, const void *a) {
  const int *ia = (const int *)a;
  const int *ib = (const int *)b;
  return *ia - *ib;
}


x86 assembly (clang, -O0):
<int_cmp_desc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_cmp_desc>:
mov    (%rsi),%eax
sub    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @int_cmp_desc(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %3
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @int_cmp_desc(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = bitcast i8* %0 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}
double t7(double _Complex c) { return __builtin_fabs(__real__(c)); }


x86 assembly (clang, -O0):
<t7>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x8(%rbp)
movsd  -0x10(%rbp),%xmm0
movaps 0xee6(%rip),%xmm1
pand   %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<t7>:
andps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define double @t7(double %0, double %1) {
%3 = alloca { double, double }
%4 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 0
store double %0, double* %4
%5 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 1
store double %1, double* %5
%6 = getelementptr inbounds { double, double }, { double, double }* %3, i32 0, i32 0
%7 = load double, double* %6
%8 = call double @llvm.fabs.f64(double %7)
ret double %8
}

LLVM IR (-O2):
define double @t7(double %0, double %1) {
%3 = tail call double @llvm.fabs.f64(double %0)
ret double %3
}
int MAG_isNaN(double d) { return d != d; }


x86 assembly (clang, -O0):
<MAG_isNaN>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x8(%rbp),%xmm0
setne  %al
setp   %cl
or     %cl,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MAG_isNaN>:
xor    %eax,%eax
ucomisd %xmm0,%xmm0
setp   %al
ret

LLVM IR (-O0):
define i32 @MAG_isNaN(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fcmp une double %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @MAG_isNaN(double %0) {
%2 = fcmp uno double %0, 0.000000e+00
%3 = zext i1 %2 to i32
ret i32 %3
}