unsigned long long flip_A8(const unsigned long long P,
                           const unsigned long long O) {
  unsigned int outflank_v, outflank_h, outflank_d7;
  unsigned long long flipped;
  outflank_v = ((((((((unsigned int)(O)) & 0x01010100u) << 4) +
                   (((unsigned int)((O) >> 32)) & 0x00010101u)) *
                  0x08040201u) >>
                 24) +
                2) &
               (((((((unsigned int)(P)) & 0x01010101u) << 4) +
                  (((unsigned int)((P) >> 32)) & 0x00000101u)) *
                 0x08040201u) >>
                24);
  flipped = (outflank_v * 0x00007e3e1e0e0602ULL) & 0x0001010101010100ULL;
  outflank_h = ((((unsigned int)((O) >> 32)) & 0x7e000000u) + 0x02000000u) &
               ((unsigned int)((P) >> 32));
  flipped |=
      (unsigned long long)((outflank_h - (outflank_h >> 8)) & 0x7e000000u)
      << 32;
  outflank_d7 = (((((((unsigned int)(O)) & 0x10204000u) +
                    (((unsigned int)((O) >> 32)) & 0x00020408u)) *
                   0x01010101u) >>
                  24) +
                 2) &
                ((((((unsigned int)(P)) & 0x10204080u) +
                   (((unsigned int)((P) >> 32)) & 0x00000408u)) *
                  0x01010101u) >>
                 24);
  flipped |= (outflank_d7 * 0x0000fcf8f0e0c080ULL) & 0x0002040810204000ULL;
  return flipped;
}


x86 assembly (clang, -O0):
<flip_A8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1010100,%eax
shl    $0x4,%eax
mov    -0x10(%rbp),%rcx
shr    $0x20,%rcx
and    $0x10101,%ecx
add    %ecx,%eax
imul   $0x8040201,%eax,%eax
shr    $0x18,%eax
add    $0x2,%eax
mov    -0x8(%rbp),%rcx
and    $0x1010101,%ecx
shl    $0x4,%ecx
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x101,%edx
add    %edx,%ecx
imul   $0x8040201,%ecx,%ecx
shr    $0x18,%ecx
and    %ecx,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
movabs $0x7e3e1e0e0602,%rcx
imul   %rcx,%rax
movabs $0x1010101010100,%rcx
and    %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x20,%rax
and    $0x7e000000,%eax
add    $0x2000000,%eax
mov    -0x8(%rbp),%rcx
shr    $0x20,%rcx
and    %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    -0x18(%rbp),%ecx
shr    $0x8,%ecx
sub    %ecx,%eax
and    $0x7e000000,%eax
mov    %eax,%eax
shl    $0x20,%rax
or     -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
and    $0x10204000,%eax
mov    -0x10(%rbp),%rcx
shr    $0x20,%rcx
and    $0x20408,%ecx
add    %ecx,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
add    $0x2,%eax
mov    -0x8(%rbp),%rcx
and    $0x10204080,%ecx
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x408,%edx
add    %edx,%ecx
imul   $0x1010101,%ecx,%ecx
shr    $0x18,%ecx
and    %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
movabs $0xfcf8f0e0c080,%rcx
imul   %rcx,%rax
movabs $0x2040810204000,%rcx
and    %rcx,%rax
or     -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip_A8>:
mov    %esi,%ecx
shl    $0x4,%ecx
and    $0x10101000,%ecx
mov    %rsi,%r8
shr    $0x20,%r8
mov    %r8d,%edx
and    $0x10101,%edx
or     %ecx,%edx
imul   $0x8040201,%edx,%edx
shr    $0x18,%edx
add    $0x2,%edx
mov    %edi,%eax
shl    $0x4,%eax
and    $0x10101010,%eax
mov    %rdi,%r9
shr    $0x20,%r9
mov    %r9d,%ecx
and    $0x101,%ecx
or     %eax,%ecx
imul   $0x8040201,%ecx,%eax
shr    $0x18,%eax
and    %edx,%eax
movabs $0x7e3e1e0e0602,%rcx
imul   %rax,%rcx
movabs $0x1010101010100,%rax
and    %rcx,%rax
mov    %r8d,%edx
and    $0x7e000000,%edx
add    $0x2000000,%edx
and    %r9d,%edx
mov    %edx,%ecx
shr    $0x8,%ecx
sub    %ecx,%edx
and    $0x7e000000,%edx
shl    $0x20,%rdx
or     %rax,%rdx
and    $0x10204000,%esi
and    $0x20408,%r8d
or     %esi,%r8d
imul   $0x1010101,%r8d,%eax
shr    $0x18,%eax
add    $0x2,%eax
and    $0x10204080,%edi
and    $0x408,%r9d
or     %edi,%r9d
imul   $0x1010101,%r9d,%ecx
shr    $0x18,%ecx
and    %eax,%ecx
movabs $0xfcf8f0e0c080,%rsi
imul   %rcx,%rsi
movabs $0x2040810204000,%rax
and    %rsi,%rax
or     %rdx,%rax
ret

LLVM IR (-O0):
define i64 @flip_A8(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%9 = load i64, i64* %4
%10 = trunc i64 %9 to i32
%11 = and i32 %10, 16843008
%12 = shl i32 %11, 4
%13 = load i64, i64* %4
%14 = lshr i64 %13, 32
%15 = trunc i64 %14 to i32
%16 = and i32 %15, 65793
%17 = add i32 %12, %16
%18 = mul i32 %17, 134480385
%19 = lshr i32 %18, 24
%20 = add i32 %19, 2
%21 = load i64, i64* %3
%22 = trunc i64 %21 to i32
%23 = and i32 %22, 16843009
%24 = shl i32 %23, 4
%25 = load i64, i64* %3
%26 = lshr i64 %25, 32
%27 = trunc i64 %26 to i32
%28 = and i32 %27, 257
%29 = add i32 %24, %28
%30 = mul i32 %29, 134480385
%31 = lshr i32 %30, 24
%32 = and i32 %20, %31
store i32 %32, i32* %5
%33 = load i32, i32* %5
%34 = zext i32 %33 to i64
%35 = mul i64 %34, 138805257307650
%36 = and i64 %35, 282578800148736
store i64 %36, i64* %8
%37 = load i64, i64* %4
%38 = lshr i64 %37, 32
%39 = trunc i64 %38 to i32
%40 = and i32 %39, 2113929216
%41 = add i32 %40, 33554432
%42 = load i64, i64* %3
%43 = lshr i64 %42, 32
%44 = trunc i64 %43 to i32
%45 = and i32 %41, %44
store i32 %45, i32* %6
%46 = load i32, i32* %6
%47 = load i32, i32* %6
%48 = lshr i32 %47, 8
%49 = sub i32 %46, %48
%50 = and i32 %49, 2113929216
%51 = zext i32 %50 to i64
%52 = shl i64 %51, 32
%53 = load i64, i64* %8
%54 = or i64 %53, %52
store i64 %54, i64* %8
%55 = load i64, i64* %4
%56 = trunc i64 %55 to i32
%57 = and i32 %56, 270548992
%58 = load i64, i64* %4
%59 = lshr i64 %58, 32
%60 = trunc i64 %59 to i32
%61 = and i32 %60, 132104
%62 = add i32 %57, %61
%63 = mul i32 %62, 16843009
%64 = lshr i32 %63, 24
%65 = add i32 %64, 2
%66 = load i64, i64* %3
%67 = trunc i64 %66 to i32
%68 = and i32 %67, 270549120
%69 = load i64, i64* %3
%70 = lshr i64 %69, 32
%71 = trunc i64 %70 to i32
%72 = and i32 %71, 1032
%73 = add i32 %68, %72
%74 = mul i32 %73, 16843009
%75 = lshr i32 %74, 24
%76 = and i32 %65, %75
store i32 %76, i32* %7
%77 = load i32, i32* %7
%78 = zext i32 %77 to i64
%79 = mul i64 %78, 278146123350144
%80 = and i64 %79, 567382630219776
%81 = load i64, i64* %8
%82 = or i64 %81, %80
store i64 %82, i64* %8
%83 = load i64, i64* %8
ret i64 %83
}

LLVM IR (-O2):
define i64 @flip_A8(i64 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = shl i32 %3, 4
%5 = and i32 %4, 269488128
%6 = lshr i64 %1, 32
%7 = trunc i64 %6 to i32
%8 = and i32 %7, 65793
%9 = or i32 %5, %8
%10 = mul i32 %9, 134480385
%11 = lshr i32 %10, 24
%12 = add nuw nsw i32 %11, 2
%13 = trunc i64 %0 to i32
%14 = shl i32 %13, 4
%15 = and i32 %14, 269488144
%16 = lshr i64 %0, 32
%17 = trunc i64 %16 to i32
%18 = and i32 %17, 257
%19 = or i32 %15, %18
%20 = mul i32 %19, 134480385
%21 = lshr i32 %20, 24
%22 = and i32 %12, %21
%23 = zext i32 %22 to i64
%24 = mul nuw nsw i64 %23, 138805257307650
%25 = and i64 %24, 282578800148736
%26 = and i32 %7, 2113929216
%27 = add nuw i32 %26, 33554432
%28 = and i32 %27, %17
%29 = lshr exact i32 %28, 8
%30 = sub i32 %28, %29
%31 = and i32 %30, 2113929216
%32 = zext i32 %31 to i64
%33 = shl nuw nsw i64 %32, 32
%34 = or i64 %25, %33
%35 = and i32 %3, 270548992
%36 = and i32 %7, 132104
%37 = or i32 %36, %35
%38 = mul i32 %37, 16843009
%39 = lshr i32 %38, 24
%40 = add nuw nsw i32 %39, 2
%41 = and i32 %13, 270549120
%42 = and i32 %17, 1032
%43 = or i32 %42, %41
%44 = mul i32 %43, 16843009
%45 = lshr i32 %44, 24
%46 = and i32 %40, %45
%47 = zext i32 %46 to i64
%48 = mul nuw nsw i64 %47, 278146123350144
%49 = and i64 %48, 567382630219776
%50 = or i64 %34, %49
ret i64 %50
}