xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned int);
int /*<<< orphan*/ put8(int);
void mov_m32_imm32(unsigned int *m32, unsigned int imm32) {
  put8(0xC7);
  put8(0x05);
  put32((unsigned int)(m32));
  put32(imm32);
}


x86 assembly (clang, -O0):
<mov_m32_imm32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0xc7,%edi
call   1030 <put8@plt>
mov    $0x5,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%rax
mov    %eax,%edi
call   1040 <put32@plt>
mov    -0xc(%rbp),%edi
call   1040 <put32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_m32_imm32>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    $0xc7,%edi
call   1030 <put8@plt>
mov    $0x5,%edi
call   1030 <put8@plt>
mov    %ebx,%edi
call   1040 <put32@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <put32@plt>

LLVM IR (-O0):
define void @mov_m32_imm32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = call i32 @put8(i32 199)
%6 = call i32 @put8(i32 5)
%7 = load i32*, i32** %3
%8 = ptrtoint i32* %7 to i32
%9 = call i32 @put32(i32 %8)
%10 = load i32, i32* %4
%11 = call i32 @put32(i32 %10)
ret void
}

LLVM IR (-O2):
define void @mov_m32_imm32(i32* %0, i32 %1) {
%3 = tail call i32 @put8(i32 199)
%4 = tail call i32 @put8(i32 5)
%5 = ptrtoint i32* %0 to i64
%6 = trunc i64 %5 to i32
%7 = tail call i32 @put32(i32 %6)
%8 = tail call i32 @put32(i32 %1)
ret void
}
/* Variables and functions */
scalar_t__ ft_memchr(char const *, char, int /*<<< orphan*/);
int /*<<< orphan*/ ft_strlen(char const *);
int ft_strcontains(char const *s, char c) {
  return (ft_memchr(s, c, ft_strlen(s)) != 0);
}


x86 assembly (clang, -O0):
<ft_strcontains>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x9(%rbp),%al
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ft_strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%edx
mov    -0xa(%rbp),%al
movsbl %al,%esi
call   1030 <ft_memchr@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strcontains>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1040 <ft_strlen@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %eax,%edx
call   1030 <ft_memchr@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ft_strcontains(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %4
%7 = load i8*, i8** %3
%8 = call i32 @ft_strlen(i8* %7)
%9 = call i64 @ft_memchr(i8* %5, i8 signext %6, i32 %8)
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @ft_strcontains(i8* %0, i8 signext %1) {
%3 = tail call i32 @ft_strlen(i8* %0)
%4 = tail call i64 @ft_memchr(i8* %0, i8 signext %1, i32 %3)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ gets(char *);
int /*<<< orphan*/ printf(char *);
scalar_t__ strcmp(char *, char *);
int validate_password() {
  char input[64];
  printf("What is your bank account password?\n");
  gets(input);
  return (strcmp("hue_hue_psswd", input) == 0);
}


x86 assembly (clang, -O0):
<validate_password>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
lea    -0x40(%rbp),%rdi
call   1050 <gets@plt>
lea    -0x40(%rbp),%rsi
lea    0xecd(%rip),%rdi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<validate_password>:
push   %rbx
sub    $0x40,%rsp
lea    0xed2(%rip),%rdi
call   1030 <puts@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1050 <gets@plt>
lea    0xead(%rip),%rdi
mov    %rbx,%rsi
call   1040 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"What is your bank account password?\0A\00"
@.str.1 = [14 x i8] c"hue_hue_psswd\00"
define i32 @validate_password() {
%1 = alloca [64 x i8]
%2 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds [64 x i8], [64 x i8]* %1, i64 0, i64 0
%4 = call i32 @gets(i8* %3)
%5 = getelementptr inbounds [64 x i8], [64 x i8]* %1, i64 0, i64 0
%6 = call i64 @strcmp(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8* %5)
%7 = icmp eq i64 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
@.str.1 = [14 x i8] c"hue_hue_psswd\00"
@str = [36 x i8] c"What is your bank account password?\00"
define i32 @validate_password() {
%1 = alloca [64 x i8]
%2 = getelementptr inbounds [64 x i8], [64 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
%4 = call i32 @gets(i8* %2)
%5 = call i64 @strcmp(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8* %2)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
char rand();
void random_string(char *c, int length) {
  while (length--)
    *(c++) = 'a' + (rand() % ('z' - 'a'));
  *c = 0;
}


x86 assembly (clang, -O0):
<random_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
je     1160 <random_string+0x50>
mov    $0x0,%al
call   1030 <rand@plt>
movsbl %al,%eax
mov    $0x19,%ecx
cltd
idiv   %ecx
add    $0x61,%edx
mov    %dl,%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    111f <random_string+0xf>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_string>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
test   %esi,%esi
je     115a <random_string+0x4a>
mov    %esi,%ebx
nopl   (%rax)
xor    %eax,%eax
call   1030 <rand@plt>
movsbl %al,%ecx
lea    (%rcx,%rcx,4),%eax
lea    (%rcx,%rax,8),%eax
movzwl %ax,%edx
shr    $0xa,%eax
shr    $0xf,%edx
add    %al,%dl
movzbl %dl,%eax
lea    (%rax,%rax,4),%eax
lea    (%rax,%rax,4),%eax
sub    %al,%cl
add    $0x61,%cl
lea    0x1(%r14),%rax
mov    %cl,(%r14)
mov    %rax,%r14
add    $0xffffffff,%ebx
jne    1120 <random_string+0x10>
jmp    115d <random_string+0x4d>
mov    %r14,%rax
movb   $0x0,(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @random_string(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add nsw i32 %6, -1
store i32 %7, i32* %4
%8 = icmp ne i32 %6, 0
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = call signext i8 (...) @rand()
%11 = sext i8 %10 to i32
%12 = srem i32 %11, 25
%13 = add nsw i32 97, %12
%14 = trunc i32 %13 to i8
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
store i8 %14, i8* %15
br label %5
17: ; preds = %5
%18 = load i8*, i8** %3
store i8 0, i8* %18
ret void
}

LLVM IR (-O2):
define void @random_string(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i8* [ %11, %4 ], [ %0, %2 ]
%7 = add nsw i32 %5, -1
%8 = tail call signext i8 (...) @rand()
%9 = srem i8 %8, 25
%10 = add nsw i8 %9, 97
%11 = getelementptr inbounds i8, i8* %6, i64 1
store i8 %10, i8* %6
%12 = icmp eq i32 %7, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %2
%14 = phi i8* [ %0, %2 ], [ %11, %4 ]
store i8 0, i8* %14
ret void
}
/* Variables and functions */
int atoi(char *);
int power(int, int);
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  int a = atoi(argv[1]);
  int b = atoi(argv[2]);
  printf("%d\n", power(a, b));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1050 <atoi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rdi
call   1050 <atoi@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x18(%rbp),%esi
call   1030 <power@plt>
mov    %eax,%esi
lea    0xe86(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    0x8(%rsi),%rdi
call   1050 <atoi@plt>
mov    %eax,%ebp
mov    0x10(%rbx),%rdi
call   1050 <atoi@plt>
mov    %ebp,%edi
mov    %eax,%esi
call   1030 <power@plt>
lea    0xea6(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i8**, i8*** %5
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = load i8*, i8** %9
%11 = call i32 @atoi(i8* %10)
store i32 %11, i32* %6
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 2
%14 = load i8*, i8** %13
%15 = call i32 @atoi(i8* %14)
store i32 %15, i32* %7
%16 = load i32, i32* %6
%17 = load i32, i32* %7
%18 = call i32 @power(i32 %16, i32 %17)
%19 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %18)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @atoi(i8* %4)
%6 = getelementptr inbounds i8*, i8** %1, i64 2
%7 = load i8*, i8** %6
%8 = tail call i32 @atoi(i8* %7)
%9 = tail call i32 @power(i32 %5, i32 %8)
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ test_xaml_comment_entities();
int /*<<< orphan*/ test_xaml_comments();
void all_xaml_tests() {
  test_xaml_comments();
  test_xaml_comment_entities();
}


x86 assembly (clang, -O0):
<all_xaml_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <test_xaml_comments@plt>
mov    $0x0,%al
call   1040 <test_xaml_comment_entities@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_xaml_tests>:
push   %rax
xor    %eax,%eax
call   1030 <test_xaml_comments@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <test_xaml_comment_entities@plt>

LLVM IR (-O0):
define void @all_xaml_tests() {
%1 = call i32 (...) @test_xaml_comments()
%2 = call i32 (...) @test_xaml_comment_entities()
ret void
}

LLVM IR (-O2):
define void @all_xaml_tests() {
%1 = tail call i32 (...) @test_xaml_comments()
%2 = tail call i32 (...) @test_xaml_comment_entities()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cReadByte(int, unsigned char *);
unsigned char CheckId_OV6680(void) {
  unsigned char temp1;
  unsigned char temp2;
  VIM_SIF_I2cReadByte(0x0a, &temp1);
  VIM_SIF_I2cReadByte(0x0b, &temp2);
  if ((temp1 == 0x66) && (temp2 == 0x81)) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<CheckId_OV6680>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xa,%edi
lea    -0x2(%rbp),%rsi
call   1030 <VIM_SIF_I2cReadByte@plt>
mov    $0xb,%edi
lea    -0x3(%rbp),%rsi
call   1030 <VIM_SIF_I2cReadByte@plt>
movzbl -0x2(%rbp),%eax
cmp    $0x66,%eax
jne    1159 <CheckId_OV6680+0x49>
movzbl -0x3(%rbp),%eax
cmp    $0x81,%eax
jne    1159 <CheckId_OV6680+0x49>
movb   $0x1,-0x1(%rbp)
jmp    115d <CheckId_OV6680+0x4d>
movb   $0x0,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckId_OV6680>:
push   %rax
lea    0x7(%rsp),%rsi
mov    $0xa,%edi
call   1030 <VIM_SIF_I2cReadByte@plt>
lea    0x6(%rsp),%rsi
mov    $0xb,%edi
call   1030 <VIM_SIF_I2cReadByte@plt>
mov    0x7(%rsp),%al
xor    $0x66,%al
mov    0x6(%rsp),%cl
xor    $0x81,%cl
or     %al,%cl
sete   %al
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i8 @CheckId_OV6680() {
%1 = alloca i8
%2 = alloca i8
%3 = alloca i8
%4 = call i32 @VIM_SIF_I2cReadByte(i32 10, i8* %2)
%5 = call i32 @VIM_SIF_I2cReadByte(i32 11, i8* %3)
%6 = load i8, i8* %2
%7 = zext i8 %6 to i32
%8 = icmp eq i32 %7, 102
br i1 %8, label %9, label %14
9: ; preds = %0
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = icmp eq i32 %11, 129
br i1 %12, label %13, label %14
13: ; preds = %9
store i8 1, i8* %1
br label %15
14: ; preds = %9, %0
store i8 0, i8* %1
br label %15
15: ; preds = %14, %13
%16 = load i8, i8* %1
ret i8 %16
}

LLVM IR (-O2):
define zeroext i8 @CheckId_OV6680() {
%1 = alloca i8
%2 = alloca i8
%3 = call i32 @VIM_SIF_I2cReadByte(i32 10, i8* %1)
%4 = call i32 @VIM_SIF_I2cReadByte(i32 11, i8* %2)
%5 = load i8, i8* %1
%6 = icmp eq i8 %5, 102
%7 = load i8, i8* %2
%8 = icmp eq i8 %7, -127
%9 = select i1 %6, i1 %8, i1 false
%10 = zext i1 %9 to i8
ret i8 %10
}
int g(int x, int y) { return (x % y) * (x + y) / (x - y); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
mov    -0x4(%rbp),%ecx
add    -0x8(%rbp),%ecx
imul   %ecx,%eax
mov    -0x4(%rbp),%ecx
sub    -0x8(%rbp),%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    %edi,%eax
cltd
idiv   %esi
lea    (%rsi,%rdi,1),%eax
imul   %edx,%eax
sub    %esi,%edi
cltd
idiv   %edi
ret

LLVM IR (-O0):
define i32 @g(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = add nsw i32 %8, %9
%11 = mul nsw i32 %7, %10
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = sub nsw i32 %12, %13
%15 = sdiv i32 %11, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @g(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = add nsw i32 %1, %0
%5 = mul nsw i32 %3, %4
%6 = sub nsw i32 %0, %1
%7 = sdiv i32 %5, %6
ret i32 %7
}
/* Variables and functions */
double __ocml_expm1_f64(double);
double expm1(double x) { return __ocml_expm1_f64(x); }


x86 assembly (clang, -O0):
<expm1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__ocml_expm1_f64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expm1>:
jmp    1030 <__ocml_expm1_f64@plt>

LLVM IR (-O0):
define double @expm1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__ocml_expm1_f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @expm1(double %0) {
%2 = tail call double @__ocml_expm1_f64(double %0)
ret double %2
}
char *langRomTypeF4deviceInvert() { return "F4 Device Inverted"; }


x86 assembly (clang, -O0):
<langRomTypeF4deviceInvert>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeF4deviceInvert>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [19 x i8] c"F4 Device Inverted\00"
define i8* @langRomTypeF4deviceInvert() {
ret i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [19 x i8] c"F4 Device Inverted\00"
define i8* @langRomTypeF4deviceInvert() {
ret i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0)
}
void process_new_order_single(const struct fix_message *msg) { (void)msg; }


x86 assembly (clang, -O0):
<process_new_order_single>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_new_order_single>:
ret

LLVM IR (-O0):
%struct.fix_message = type opaque
define void @process_new_order_single(%struct.fix_message* %0) {
%2 = alloca %struct.fix_message*
store %struct.fix_message* %0, %struct.fix_message** %2
%3 = load %struct.fix_message*, %struct.fix_message** %2
ret void
}

LLVM IR (-O2):
%struct.fix_message = type opaque
define void @process_new_order_single(%struct.fix_message* nocapture %0) {
ret void
}
char *getenv(name) const char *name;
{
  int offset;
  return (__findenv(name, &offset));
}


x86 assembly (clang, -O0):
<getenv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x0,%al
call   1030 <__findenv@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getenv>:
push   %rax
lea    0x4(%rsp),%rsi
xor    %eax,%eax
call   1030 <__findenv@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i8* @getenv(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 (i8*, i32*, ...) bitcast (i32 (...)* @__findenv to i32 (i8*, i32*, ...)*)(i8* %4, i32* %3)
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}

LLVM IR (-O2):
define i8* @getenv(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 (i8*, i32*, ...) bitcast (i32 (...)* @__findenv to i32 (i8*, i32*, ...)*)(i8* %0, i32* %2)
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i8*
ret i8* %6
}
int cmp(const void *a, const void *b) {
  return *(unsigned char *)a - *(unsigned char *)b;
}


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
movzbl (%rdi),%eax
movzbl (%rsi),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = zext i8 %3 to i32
%5 = load i8, i8* %1
%6 = zext i8 %5 to i32
%7 = sub nsw i32 %4, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ aeron_client_conductor_on_cmd_destination(void *, void *,
                                                             int);
void aeron_client_conductor_on_cmd_remove_rcv_destination(void *clientd,
                                                          void *item) {
  aeron_client_conductor_on_cmd_destination(clientd, item, (0x0D));
}


x86 assembly (clang, -O0):
<aeron_client_conductor_on_cmd_remove_rcv_destination>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0xd,%edx
call   1030 <aeron_client_conductor_on_cmd_destination@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aeron_client_conductor_on_cmd_remove_rcv_destination>:
mov    $0xd,%edx
jmp    1030 <aeron_client_conductor_on_cmd_destination@plt>

LLVM IR (-O0):
define void @aeron_client_conductor_on_cmd_remove_rcv_destination(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @aeron_client_conductor_on_cmd_destination(i8* %5, i8* %6, i32 13)
ret void
}

LLVM IR (-O2):
define void @aeron_client_conductor_on_cmd_remove_rcv_destination(i8* %0, i8* %1) {
%3 = tail call i32 @aeron_client_conductor_on_cmd_destination(i8* %0, i8* %1, i32 13)
ret void
}
void ff_hevc_put_hevc_bi_qpel_h8_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_h8_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_h8_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_h8_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_h8_10_sse4() {
ret void
}
void g_slist_remove_link() {}


x86 assembly (clang, -O0):
<g_slist_remove_link>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_slist_remove_link>:
ret

LLVM IR (-O0):
define void @g_slist_remove_link() {
ret void
}

LLVM IR (-O2):
define void @g_slist_remove_link() {
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int /*<<< orphan*/ gregs;
};
struct TYPE_4__ {
  TYPE_1__ uc_mcontext;
};
typedef TYPE_2__ ucontext_t;
typedef int /*<<< orphan*/ siginfo_t;
typedef int greg_t;

/* Variables and functions */
void handle_inelegantly(int signum, siginfo_t *info, void *ucontext) {
  ucontext_t *uc = (ucontext_t *)ucontext;
  greg_t *gregs = (greg_t *)&uc->uc_mcontext.gregs;
  gregs[16] += 1;
}


x86 assembly (clang, -O0):
<handle_inelegantly>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    0x40(%rax),%ecx
add    $0x1,%ecx
mov    %ecx,0x40(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_inelegantly>:
addl   $0x1,0x40(%rdx)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @handle_inelegantly(i32 %0, i32* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca %struct.TYPE_4__*
%8 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%9 = load i8*, i8** %6
%10 = bitcast i8* %9 to %struct.TYPE_4__*
store %struct.TYPE_4__* %10, %struct.TYPE_4__** %7
%11 = load %struct.TYPE_4__*, %struct.TYPE_4__** %7
%12 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %11, i32 0, i32 0
%13 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %12, i32 0, i32 0
store i32* %13, i32** %8
%14 = load i32*, i32** %8
%15 = getelementptr inbounds i32, i32* %14, i64 16
%16 = load i32, i32* %15
%17 = add nsw i32 %16, 1
store i32 %17, i32* %15
ret void
}

LLVM IR (-O2):
define void @handle_inelegantly(i32 %0, i32* nocapture readnone %1, i8* nocapture %2) {
%4 = getelementptr inbounds i8, i8* %2, i64 64
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
%7 = add nsw i32 %6, 1
store i32 %7, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xa2() {
  Assert_real((isalnum(162) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              815, ("isalnum should be 0 for 0xa2"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xa2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa2,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x32f,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xa2>:
push   %rax
mov    $0xa2,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x32f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xa2\00"
define void @t_isalnum_0xa2() {
%1 = call i64 @isalnum(i32 162)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 815, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xa2\00"
define void @t_isalnum_0xa2() {
%1 = tail call i64 @isalnum(i32 162)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 815, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void RTMemPoolDupEx(void) {}


x86 assembly (clang, -O0):
<RTMemPoolDupEx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMemPoolDupEx>:
ret

LLVM IR (-O0):
define void @RTMemPoolDupEx() {
ret void
}

LLVM IR (-O2):
define void @RTMemPoolDupEx() {
ret void
}
int sscanf(const char *str __attribute__((unused)),
           const char *format __attribute__((unused)), ...) {
  return 0;
}


x86 assembly (clang, -O0):
<sscanf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sscanf>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sscanf(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @sscanf(i8* nocapture readnone %0, i8* nocapture readnone %1, ...) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void giblorb_free(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<giblorb_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<giblorb_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @giblorb_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @giblorb_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int __strcoll_l(char const *, char const *, int /*<<< orphan*/);
int strcoll(const char *l, const char *r) { return __strcoll_l(l, r, 0); }


x86 assembly (clang, -O0):
<strcoll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <__strcoll_l@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcoll>:
xor    %edx,%edx
jmp    1030 <__strcoll_l@plt>

LLVM IR (-O0):
define i32 @strcoll(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @__strcoll_l(i8* %5, i8* %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strcoll(i8* %0, i8* %1) {
%3 = tail call i32 @__strcoll_l(i8* %0, i8* %1, i32 0)
ret i32 %3
}
void wsinit(int argc, char **argv) {}


x86 assembly (clang, -O0):
<wsinit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wsinit>:
ret

LLVM IR (-O0):
define void @wsinit(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @wsinit(i32 %0, i8** nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DeinitFields();
void SwitchFrom_COP4(void) { DeinitFields(); }


x86 assembly (clang, -O0):
<SwitchFrom_COP4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DeinitFields@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchFrom_COP4>:
xor    %eax,%eax
jmp    1030 <DeinitFields@plt>

LLVM IR (-O0):
define void @SwitchFrom_COP4() {
%1 = call i32 (...) @DeinitFields()
ret void
}

LLVM IR (-O2):
define void @SwitchFrom_COP4() {
%1 = tail call i32 (...) @DeinitFields()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ umfpack_zi_free_numeric(void **);
void umf4zfnum_(void **Numeric) { umfpack_zi_free_numeric(Numeric); }


x86 assembly (clang, -O0):
<umf4zfnum_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <umfpack_zi_free_numeric@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<umf4zfnum_>:
jmp    1030 <umfpack_zi_free_numeric@plt>

LLVM IR (-O0):
define void @umf4zfnum_(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i32 @umfpack_zi_free_numeric(i8** %3)
ret void
}

LLVM IR (-O2):
define void @umf4zfnum_(i8** %0) {
%2 = tail call i32 @umfpack_zi_free_numeric(i8** %0)
ret void
}
int is_thurley(int vend, int prod) {
  if ((vend == 0x000157) && ((prod >= 0x003A) && (prod <= 0x0040)))
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<is_thurley>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x157,-0x8(%rbp)
jne    1137 <is_thurley+0x37>
cmpl   $0x3a,-0xc(%rbp)
jl     1137 <is_thurley+0x37>
cmpl   $0x40,-0xc(%rbp)
jg     1137 <is_thurley+0x37>
movl   $0x1,-0x4(%rbp)
jmp    113e <is_thurley+0x3e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_thurley>:
cmp    $0x157,%edi
sete   %al
add    $0xffffffc6,%esi
cmp    $0x7,%esi
setb   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_thurley(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 343
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, 58
br i1 %10, label %11, label %15
11: ; preds = %8
%12 = load i32, i32* %5
%13 = icmp sle i32 %12, 64
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 1, i32* %3
br label %16
15: ; preds = %11, %8, %2
store i32 0, i32* %3
br label %16
16: ; preds = %15, %14
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @is_thurley(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 343
%4 = add i32 %1, -58
%5 = icmp ult i32 %4, 7
%6 = and i1 %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ adc16(int /*<<< orphan*/);
int /*<<< orphan*/ readmemw65816(int /*<<< orphan*/);
int /*<<< orphan*/ zeropage();
void adcZp16(void) { adc16(readmemw65816(zeropage())); }


x86 assembly (clang, -O0):
<adcZp16>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <zeropage@plt>
mov    %eax,%edi
call   1030 <readmemw65816@plt>
mov    %eax,%edi
call   1050 <adc16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<adcZp16>:
push   %rax
xor    %eax,%eax
call   1040 <zeropage@plt>
mov    %eax,%edi
call   1030 <readmemw65816@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <adc16@plt>

LLVM IR (-O0):
define void @adcZp16() {
%1 = call i32 (...) @zeropage()
%2 = call i32 @readmemw65816(i32 %1)
%3 = call i32 @adc16(i32 %2)
ret void
}

LLVM IR (-O2):
define void @adcZp16() {
%1 = tail call i32 (...) @zeropage()
%2 = tail call i32 @readmemw65816(i32 %1)
%3 = tail call i32 @adc16(i32 %2)
ret void
}
double ls_cost_nm7_twice(double x) { return x + x; }


x86 assembly (clang, -O0):
<ls_cost_nm7_twice>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm7_twice>:
addsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @ls_cost_nm7_twice(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fadd double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @ls_cost_nm7_twice(double %0) {
%2 = fadd double %0, %0
ret double %2
}
int pmmap_index(int block_number) { return block_number / 32; }


x86 assembly (clang, -O0):
<pmmap_index>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmmap_index>:
lea    0x1f(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
sar    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @pmmap_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 32
ret i32 %4
}

LLVM IR (-O2):
define i32 @pmmap_index(i32 %0) {
%2 = sdiv i32 %0, 32
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void nc_merror(void *ptr, char *where) {
  if (ptr)
    return;
  fprintf(stderr, "Out of memory in %s\n", where);
  exit(1);
}


x86 assembly (clang, -O0):
<nc_merror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1141 <nc_merror+0x21>
add    $0x10,%rsp
pop    %rbp
ret
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
lea    0xeab(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<nc_merror>:
test   %rdi,%rdi
je     1126 <nc_merror+0x6>
ret
push   %rax
mov    %rsi,%rdx
mov    0x2eaf(%rip),%rax
mov    (%rax),%edi
lea    0xec6(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"Out of memory in %s\0A\00"
define void @nc_merror(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %2
ret void
8: ; preds = %2
%9 = load i32, i32* @stderr
%10 = load i8*, i8** %4
%11 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %10)
%12 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"Out of memory in %s\0A\00"
define void @nc_merror(i8* readnone %0, i8* %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %5, label %4
4: ; preds = %2
ret void
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %1)
%8 = tail call i32 @exit(i32 1)
unreachable
}
int test_imm_3Cint16_mem(short *val) {
  return ((*val) & (0x3C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Cint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x3c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Cint16_mem>:
testb  $0x3c,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Cint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 60
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_3Cint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 60
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void select_release(struct waiter_context *waiter) { return; }


x86 assembly (clang, -O0):
<select_release>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<select_release>:
ret

LLVM IR (-O0):
%struct.waiter_context = type opaque
define void @select_release(%struct.waiter_context* %0) {
%2 = alloca %struct.waiter_context*
store %struct.waiter_context* %0, %struct.waiter_context** %2
ret void
}

LLVM IR (-O2):
%struct.waiter_context = type opaque
define void @select_release(%struct.waiter_context* nocapture %0) {
ret void
}
int test_imm_61int32_mem(int *val) {
  return ((*val) & (0x61 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_61int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x61,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_61int32_mem>:
testb  $0x61,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_61int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 97
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_61int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 97
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ accept_multiplicative_expression();
int /*<<< orphan*/ parse_additive_expression();
void accept_additive_expression() {
  accept_multiplicative_expression();
  parse_additive_expression();
}


x86 assembly (clang, -O0):
<accept_additive_expression>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <accept_multiplicative_expression@plt>
mov    $0x0,%al
call   1030 <parse_additive_expression@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<accept_additive_expression>:
push   %rax
xor    %eax,%eax
call   1040 <accept_multiplicative_expression@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <parse_additive_expression@plt>

LLVM IR (-O0):
define void @accept_additive_expression() {
%1 = call i32 (...) @accept_multiplicative_expression()
%2 = call i32 (...) @parse_additive_expression()
ret void
}

LLVM IR (-O2):
define void @accept_additive_expression() {
%1 = tail call i32 (...) @accept_multiplicative_expression()
%2 = tail call i32 (...) @parse_additive_expression()
ret void
}
void opcode_ed() {}


x86 assembly (clang, -O0):
<opcode_ed>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_ed>:
ret

LLVM IR (-O0):
define void @opcode_ed() {
ret void
}

LLVM IR (-O2):
define void @opcode_ed() {
ret void
}
void g_get_prgname() {}


x86 assembly (clang, -O0):
<g_get_prgname>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_get_prgname>:
ret

LLVM IR (-O0):
define void @g_get_prgname() {
ret void
}

LLVM IR (-O2):
define void @g_get_prgname() {
ret void
}
/* Variables and functions */
char sdsReqType(size_t string_size) {
  if (string_size < 32)
    return 0;
  if (string_size < 0xff)
    return 1;
  if (string_size < 0xffff)
    return 2;
  if (string_size < 0xffffffff)
    return 3;
  return 4;
}


x86 assembly (clang, -O0):
<sdsReqType>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x20,-0x10(%rbp)
jae    111c <sdsReqType+0x1c>
movb   $0x0,-0x1(%rbp)
jmp    1166 <sdsReqType+0x66>
cmpq   $0xff,-0x10(%rbp)
jae    1133 <sdsReqType+0x33>
movb   $0x1,-0x1(%rbp)
jmp    1166 <sdsReqType+0x66>
cmpq   $0xffff,-0x10(%rbp)
jae    114a <sdsReqType+0x4a>
movb   $0x2,-0x1(%rbp)
jmp    1166 <sdsReqType+0x66>
mov    $0xffffffff,%eax
cmp    %rax,-0x10(%rbp)
jae    1162 <sdsReqType+0x62>
movb   $0x3,-0x1(%rbp)
jmp    1166 <sdsReqType+0x66>
movb   $0x4,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdsReqType>:
cmp    $0x20,%rdi
jae    1109 <sdsReqType+0x9>
xor    %eax,%eax
ret
mov    $0x1,%al
cmp    $0xff,%rdi
jb     112b <sdsReqType+0x2b>
mov    $0x2,%al
cmp    $0xffff,%rdi
jb     112b <sdsReqType+0x2b>
mov    $0xffffffff,%eax
cmp    %rax,%rdi
mov    $0x4,%al
sbb    $0x0,%al
ret

LLVM IR (-O0):
define signext i8 @sdsReqType(i64 %0) {
%2 = alloca i8
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp ult i64 %4, 32
br i1 %5, label %6, label %7
6: ; preds = %1
store i8 0, i8* %2
br label %20
7: ; preds = %1
%8 = load i64, i64* %3
%9 = icmp ult i64 %8, 255
br i1 %9, label %10, label %11
10: ; preds = %7
store i8 1, i8* %2
br label %20
11: ; preds = %7
%12 = load i64, i64* %3
%13 = icmp ult i64 %12, 65535
br i1 %13, label %14, label %15
14: ; preds = %11
store i8 2, i8* %2
br label %20
15: ; preds = %11
%16 = load i64, i64* %3
%17 = icmp ult i64 %16, 4294967295
br i1 %17, label %18, label %19
18: ; preds = %15
store i8 3, i8* %2
br label %20
19: ; preds = %15
store i8 4, i8* %2
br label %20
20: ; preds = %19, %18, %14, %10, %6
%21 = load i8, i8* %2
ret i8 %21
}

LLVM IR (-O2):
define signext i8 @sdsReqType(i64 %0) {
%2 = icmp ult i64 %0, 32
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = icmp ult i64 %0, 255
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = icmp ult i64 %0, 65535
br i1 %6, label %10, label %7
7: ; preds = %5
%8 = icmp ult i64 %0, 4294967295
%9 = select i1 %8, i8 3, i8 4
br label %10
10: ; preds = %7, %5, %3, %1
%11 = phi i8 [ 0, %1 ], [ 1, %3 ], [ 2, %5 ], [ %9, %7 ]
ret i8 %11
}
/* Variables and functions */
int /*<<< orphan*/ MIPS_SET_BIT(int, int);
void xburst_cgm_gate_x2d() { MIPS_SET_BIT((0xB0000000 + 0x28), 14); }


x86 assembly (clang, -O0):
<xburst_cgm_gate_x2d>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb0000028,%edi
mov    $0xe,%esi
call   1030 <MIPS_SET_BIT@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xburst_cgm_gate_x2d>:
mov    $0xb0000028,%edi
mov    $0xe,%esi
jmp    1030 <MIPS_SET_BIT@plt>

LLVM IR (-O0):
define void @xburst_cgm_gate_x2d() {
%1 = call i32 @MIPS_SET_BIT(i32 -1342177240, i32 14)
ret void
}

LLVM IR (-O2):
define void @xburst_cgm_gate_x2d() {
%1 = tail call i32 @MIPS_SET_BIT(i32 -1342177240, i32 14)
ret void
}
int values(int num) { return num; }


x86 assembly (clang, -O0):
<values>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<values>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @values(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @values(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ swaptmesh();
void swaptmesh_() { swaptmesh(); }


x86 assembly (clang, -O0):
<swaptmesh_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <swaptmesh@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<swaptmesh_>:
xor    %eax,%eax
jmp    1030 <swaptmesh@plt>

LLVM IR (-O0):
define void @swaptmesh_() {
%1 = call i32 (...) @swaptmesh()
ret void
}

LLVM IR (-O2):
define void @swaptmesh_() {
%1 = tail call i32 (...) @swaptmesh()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ brute_force_write_seq();
int /*<<< orphan*/ i2c_write_control(int);
int /*<<< orphan*/ reset_hdmi_chip();
int /*<<< orphan*/ writeString(char *);
int main(int argc, char *argv[]) {
  writeString("Mini Bootloader Run\n");
  int j;
  writeString("Test I2C on HDMI chip\n");
  reset_hdmi_chip();
  i2c_write_control(0x80);
  brute_force_write_seq();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xea3(%rip),%rdi
call   1050 <writeString@plt>
lea    0xeac(%rip),%rdi
call   1050 <writeString@plt>
mov    $0x0,%al
call   1060 <reset_hdmi_chip@plt>
mov    $0x80,%edi
call   1040 <i2c_write_control@plt>
mov    $0x0,%al
call   1030 <brute_force_write_seq@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1050 <writeString@plt>
lea    0xec1(%rip),%rdi
call   1050 <writeString@plt>
xor    %eax,%eax
call   1060 <reset_hdmi_chip@plt>
mov    $0x80,%edi
call   1040 <i2c_write_control@plt>
xor    %eax,%eax
call   1030 <brute_force_write_seq@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"Mini Bootloader Run\0A\00"
@.str.1 = [23 x i8] c"Test I2C on HDMI chip\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @writeString(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @writeString(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
%9 = call i32 (...) @reset_hdmi_chip()
%10 = call i32 @i2c_write_control(i32 128)
%11 = call i32 (...) @brute_force_write_seq()
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"Mini Bootloader Run\0A\00"
@.str.1 = [23 x i8] c"Test I2C on HDMI chip\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @writeString(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @writeString(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 (...) @reset_hdmi_chip()
%6 = tail call i32 @i2c_write_control(i32 128)
%7 = tail call i32 (...) @brute_force_write_seq()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SCB_ParsePlayerStats(char const **);
void SCR_UpdatePlayerStatsMessage(const char *string) {
  SCB_ParsePlayerStats(&string);
}


x86 assembly (clang, -O0):
<SCR_UpdatePlayerStatsMessage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <SCB_ParsePlayerStats@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SCR_UpdatePlayerStatsMessage>:
push   %rax
mov    %rdi,(%rsp)
mov    %rsp,%rdi
call   1030 <SCB_ParsePlayerStats@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @SCR_UpdatePlayerStatsMessage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @SCB_ParsePlayerStats(i8** %2)
ret void
}

LLVM IR (-O2):
define void @SCR_UpdatePlayerStatsMessage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @SCB_ParsePlayerStats(i8** %2)
ret void
}
char test_36_0(char *mem) { return __atomic_add_fetch(mem + 0, 1, 4); }


x86 assembly (clang, -O0):
<test_36_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
movb   $0x1,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    %cl,%al
lock xadd %al,(%rdx)
add    %cl,%al
mov    %al,-0xa(%rbp)
movsbl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_36_0>:
mov    $0x1,%al
lock xadd %al,(%rdi)
add    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @test_36_0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 0
store i8 1, i8* %3
%7 = load i8, i8* %3
%8 = atomicrmw add i8* %6, i8 %7 acq_rel
%9 = add i8 %8, %7
store i8 %9, i8* %4
%10 = load i8, i8* %4
ret i8 %10
}

LLVM IR (-O2):
define signext i8 @test_36_0(i8* nocapture %0) {
%2 = atomicrmw add i8* %0, i8 1 acq_rel
%3 = add i8 %2, 1
ret i8 %3
}
/* Variables and functions */
int /*<<< orphan*/ IPC_RMID;
int /*<<< orphan*/ semctl(int, int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/);
int /*<<< orphan*/ shmctl(int, int /*<<< orphan*/, int /*<<< orphan*/);
void destroy_shmem(int shid, int Semid) {
  shmctl(shid, IPC_RMID, 0);
  semctl(Semid, 0, IPC_RMID, 0);
}


x86 assembly (clang, -O0):
<destroy_shmem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ea8(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <shmctl@plt>
mov    -0x8(%rbp),%edi
mov    0x2e95(%rip),%rax
mov    (%rax),%edx
xor    %ecx,%ecx
mov    %ecx,%esi
call   1040 <semctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_shmem>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    0x2eb3(%rip),%r14
mov    (%r14),%esi
xor    %edx,%edx
call   1030 <shmctl@plt>
mov    (%r14),%edx
mov    %ebx,%edi
xor    %esi,%esi
xor    %ecx,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <semctl@plt>

LLVM IR (-O0):
@IPC_RMID = global i32 0
define void @destroy_shmem(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* @IPC_RMID
%7 = call i32 @shmctl(i32 %5, i32 %6, i32 0)
%8 = load i32, i32* %4
%9 = load i32, i32* @IPC_RMID
%10 = call i32 @semctl(i32 %8, i32 0, i32 %9, i32 0)
ret void
}

LLVM IR (-O2):
@IPC_RMID = global i32 0
define void @destroy_shmem(i32 %0, i32 %1) {
%3 = load i32, i32* @IPC_RMID
%4 = tail call i32 @shmctl(i32 %0, i32 %3, i32 0)
%5 = load i32, i32* @IPC_RMID
%6 = tail call i32 @semctl(i32 %1, i32 0, i32 %5, i32 0)
ret void
}