xunge/DecIR huggingface dataset:
int isnan(d)
double d;
{
  register struct IEEEdp {
    unsigned manl : 32;
    unsigned manh : 20;
    unsigned exp : 11;
    unsigned sign : 1;
  } *p = (struct IEEEdp *)&d;
  return (p->exp == 2047 && (p->manh || p->manl));
}


x86 assembly (clang, -O0):
<isnan>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
shr    $0x34,%rax
and    $0x7ff,%rax
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x7ff,%ecx
mov    %al,-0x11(%rbp)
jne    1176 <isnan+0x76>
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
shr    $0x20,%rax
and    $0xfffff,%rax
mov    %eax,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x12(%rbp)
jne    1170 <isnan+0x70>
mov    -0x10(%rbp),%rcx
movabs $0xffffffff,%rax
and    (%rcx),%rax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x12(%rbp)
mov    -0x12(%rbp),%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isnan>:
movq   %xmm0,%rcx
mov    %rcx,%rdx
not    %rdx
xor    %eax,%eax
movabs $0x7ff0000000000000,%rsi
test   %rsi,%rdx
jne    1130 <isnan+0x30>
mov    $0x1,%eax
movabs $0xfffff00000000,%rdx
test   %rdx,%rcx
je     1131 <isnan+0x31>
ret
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
ret

LLVM IR (-O0):
%struct.IEEEdp = type { i64 }
define i32 @isnan(double %0) {
%2 = alloca double
%3 = alloca %struct.IEEEdp*
store double %0, double* %2
%4 = bitcast double* %2 to %struct.IEEEdp*
store %struct.IEEEdp* %4, %struct.IEEEdp** %3
%5 = load %struct.IEEEdp*, %struct.IEEEdp** %3
%6 = bitcast %struct.IEEEdp* %5 to i64*
%7 = load i64, i64* %6
%8 = lshr i64 %7, 52
%9 = and i64 %8, 2047
%10 = trunc i64 %9 to i32
%11 = icmp eq i32 %10, 2047
br i1 %11, label %12, label %29
12: ; preds = %1
%13 = load %struct.IEEEdp*, %struct.IEEEdp** %3
%14 = bitcast %struct.IEEEdp* %13 to i64*
%15 = load i64, i64* %14
%16 = lshr i64 %15, 32
%17 = and i64 %16, 1048575
%18 = trunc i64 %17 to i32
%19 = icmp ne i32 %18, 0
br i1 %19, label %27, label %20
20: ; preds = %12
%21 = load %struct.IEEEdp*, %struct.IEEEdp** %3
%22 = bitcast %struct.IEEEdp* %21 to i64*
%23 = load i64, i64* %22
%24 = and i64 %23, 4294967295
%25 = trunc i64 %24 to i32
%26 = icmp ne i32 %25, 0
br label %27
27: ; preds = %20, %12
%28 = phi i1 [ true, %12 ], [ %26, %20 ]
br label %29
29: ; preds = %27, %1
%30 = phi i1 [ false, %1 ], [ %28, %27 ]
%31 = zext i1 %30 to i32
ret i32 %31
}

LLVM IR (-O2):
%struct.IEEEdp = type { i64 }
define i32 @isnan(double %0) {
%2 = bitcast double %0 to i64
%3 = and i64 %2, 9218868437227405312
%4 = icmp eq i64 %3, 9218868437227405312
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = and i64 %2, 4503595332403200
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = trunc i64 %2 to i32
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %5, %8, %1
%13 = phi i32 [ 0, %1 ], [ 1, %5 ], [ %11, %8 ]
ret i32 %13
}
int cmp2(const void *pa, const void *pb) {
  const short *a = (const short *)pa;
  const short *b = (const short *)pb;
  if (a[2] < b[2])
    return -1;
  if (a[2] > b[2])
    return +1;
  return 0;
}


x86 assembly (clang, -O0):
<cmp2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
movswl 0x4(%rax),%eax
mov    -0x28(%rbp),%rcx
movswl 0x4(%rcx),%ecx
cmp    %ecx,%eax
jge    1140 <cmp2+0x40>
movl   $0xffffffff,-0x4(%rbp)
jmp    116b <cmp2+0x6b>
mov    -0x20(%rbp),%rax
movswl 0x4(%rax),%eax
mov    -0x28(%rbp),%rcx
movswl 0x4(%rcx),%ecx
cmp    %ecx,%eax
jle    1164 <cmp2+0x64>
movl   $0x1,-0x4(%rbp)
jmp    116b <cmp2+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp2>:
movzwl 0x4(%rdi),%eax
xor    %ecx,%ecx
cmp    0x4(%rsi),%ax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @cmp2(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i16*
%7 = alloca i16*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i16*
store i16* %9, i16** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i16*
store i16* %11, i16** %7
%12 = load i16*, i16** %6
%13 = getelementptr inbounds i16, i16* %12, i64 2
%14 = load i16, i16* %13
%15 = sext i16 %14 to i32
%16 = load i16*, i16** %7
%17 = getelementptr inbounds i16, i16* %16, i64 2
%18 = load i16, i16* %17
%19 = sext i16 %18 to i32
%20 = icmp slt i32 %15, %19
br i1 %20, label %21, label %22
21: ; preds = %2
store i32 -1, i32* %3
br label %34
22: ; preds = %2
%23 = load i16*, i16** %6
%24 = getelementptr inbounds i16, i16* %23, i64 2
%25 = load i16, i16* %24
%26 = sext i16 %25 to i32
%27 = load i16*, i16** %7
%28 = getelementptr inbounds i16, i16* %27, i64 2
%29 = load i16, i16* %28
%30 = sext i16 %29 to i32
%31 = icmp sgt i32 %26, %30
br i1 %31, label %32, label %33
32: ; preds = %22
store i32 1, i32* %3
br label %34
33: ; preds = %22
store i32 0, i32* %3
br label %34
34: ; preds = %33, %32, %21
%35 = load i32, i32* %3
ret i32 %35
}

LLVM IR (-O2):
define i32 @cmp2(i8* nocapture %0, i8* nocapture %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 4
%4 = bitcast i8* %3 to i16*
%5 = load i16, i16* %4
%6 = getelementptr inbounds i8, i8* %1, i64 4
%7 = bitcast i8* %6 to i16*
%8 = load i16, i16* %7
%9 = icmp slt i16 %5, %8
%10 = icmp sgt i16 %5, %8
%11 = zext i1 %10 to i32
%12 = select i1 %9, i32 -1, i32 %11
ret i32 %12
}
int(iscntrl)(int c) { return iscntrl(c); }


x86 assembly (clang, -O0):
<iscntrl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <iscntrl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iscntrl>:
ret

LLVM IR (-O0):
define i32 @iscntrl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @iscntrl(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @iscntrl(i32 %0) {
ret i32 undef
}
int is_open_paren(char c) { return (c == '(' || c == '{' || c == '['); }


x86 assembly (clang, -O0):
<is_open_paren>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x28,%ecx
mov    %al,-0x2(%rbp)
je     113b <is_open_paren+0x3b>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7b,%ecx
mov    %al,-0x2(%rbp)
je     113b <is_open_paren+0x3b>
movsbl -0x1(%rbp),%eax
cmp    $0x5b,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_open_paren>:
mov    $0x1,%eax
cmp    $0x28,%dil
je     1111 <is_open_paren+0x11>
cmp    $0x7b,%dil
jne    1112 <is_open_paren+0x12>
ret
xor    %eax,%eax
cmp    $0x5b,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_open_paren(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 40
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 123
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 91
br label %14
14: ; preds = %10, %6, %1
%15 = phi i1 [ true, %6 ], [ true, %1 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @is_open_paren(i8 signext %0) {
switch i8 %0, label %2 [
i8 123, label %5
i8 40, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 91
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
float fdim(float, float);
float fdimf(float x, float y) { return fdim(x, y); }


x86 assembly (clang, -O0):
<fdimf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <fdim@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdimf>:
jmp    1030 <fdim@plt>

LLVM IR (-O0):
define float @fdimf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @fdim(float %5, float %6)
ret float %7
}

LLVM IR (-O2):
define float @fdimf(float %0, float %1) {
%3 = tail call float @fdim(float %0, float %1)
ret float %3
}
int _is_dig(char c) { return c >= '0' && c <= '9'; }


x86 assembly (clang, -O0):
<_is_dig>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <_is_dig+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_dig>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @_is_dig(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @_is_dig(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ ESMUMPSF(int const *const, int const *const, int *const,
                            int const *const, int *const, int *const,
                            int *const, int *const, int *const, int *const);
void esmumpsf_(const int *const n, const int *const iwlen, int *const petab,
               const int *const pfree, int *const lentab, int *const iwtab,
               int *const nvtab, int *const elentab, int *const lasttab,
               int *const ncmpa) {
  ESMUMPSF(n, iwlen, petab, pfree, lentab, iwtab, nvtab, elentab, lasttab,
           ncmpa);
}


x86 assembly (clang, -O0):
<esmumpsf_>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
sub    $0x58,%rsp
mov    0x28(%rbp),%rax
mov    0x20(%rbp),%rax
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    %r9,-0x38(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    -0x30(%rbp),%r8
mov    -0x38(%rbp),%r9
mov    0x10(%rbp),%rbx
mov    0x18(%rbp),%r11
mov    0x20(%rbp),%r10
mov    0x28(%rbp),%rax
mov    %rbx,(%rsp)
mov    %r11,0x8(%rsp)
mov    %r10,0x10(%rsp)
mov    %rax,0x18(%rsp)
call   1030 <ESMUMPSF@plt>
add    $0x58,%rsp
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<esmumpsf_>:
jmp    1030 <ESMUMPSF@plt>

LLVM IR (-O0):
define void @esmumpsf_(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4, i32* %5, i32* %6, i32* %7, i32* %8, i32* %9) {
%11 = alloca i32*
%12 = alloca i32*
%13 = alloca i32*
%14 = alloca i32*
%15 = alloca i32*
%16 = alloca i32*
%17 = alloca i32*
%18 = alloca i32*
%19 = alloca i32*
%20 = alloca i32*
store i32* %0, i32** %11
store i32* %1, i32** %12
store i32* %2, i32** %13
store i32* %3, i32** %14
store i32* %4, i32** %15
store i32* %5, i32** %16
store i32* %6, i32** %17
store i32* %7, i32** %18
store i32* %8, i32** %19
store i32* %9, i32** %20
%21 = load i32*, i32** %11
%22 = load i32*, i32** %12
%23 = load i32*, i32** %13
%24 = load i32*, i32** %14
%25 = load i32*, i32** %15
%26 = load i32*, i32** %16
%27 = load i32*, i32** %17
%28 = load i32*, i32** %18
%29 = load i32*, i32** %19
%30 = load i32*, i32** %20
%31 = call i32 @ESMUMPSF(i32* %21, i32* %22, i32* %23, i32* %24, i32* %25, i32* %26, i32* %27, i32* %28, i32* %29, i32* %30)
ret void
}

LLVM IR (-O2):
define void @esmumpsf_(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4, i32* %5, i32* %6, i32* %7, i32* %8, i32* %9) {
%11 = tail call i32 @ESMUMPSF(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4, i32* %5, i32* %6, i32* %7, i32* %8, i32* %9)
ret void
}
char inb(short port) {
  char res;
  __asm__("inb %%dx,%%al" : "=a"(res) : "d"(port));
  return res;
}


x86 assembly (clang, -O0):
<inb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%al
mov    %al,-0x3(%rbp)
movsbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb>:
mov    %edi,%edx
in     (%dx),%al
ret

LLVM IR (-O0):
define signext i8 @inb(i16 signext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i8 asm "inb %dx,%al", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define signext i8 @inb(i16 signext %0) {
%2 = tail call i8 asm "inb %dx,%al", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
ret i8 %2
}
int fun949() { return 949; }


x86 assembly (clang, -O0):
<fun949>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3b5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun949>:
mov    $0x3b5,%eax
ret

LLVM IR (-O0):
define i32 @fun949() {
ret i32 949
}

LLVM IR (-O2):
define i32 @fun949() {
ret i32 949
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, char *);
int /*<<< orphan*/ stderr;
char *strerror(int);
void pterror(const char *message, int error) {
  fprintf(stderr, "%s: %s\n", message, strerror(error));
}


x86 assembly (clang, -O0):
<pterror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <strerror@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rdx
mov    %rax,%rcx
lea    0xea4(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pterror>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eb3(%rip),%rax
mov    (%rax),%ebp
mov    %esi,%edi
call   1040 <strerror@plt>
lea    0xec3(%rip),%rsi
mov    %ebp,%edi
mov    %rbx,%rdx
mov    %rax,%rcx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @pterror(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8* @strerror(i32 %7)
%9 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %8)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @pterror(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i8* @strerror(i32 %1)
%5 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
async_write_no_copy() {
  printf("Your system does not support async I/O\n");
  exit(170);
}


x86 assembly (clang, -O0):
<async_write_no_copy>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0xaa,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<async_write_no_copy>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xaa,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"Your system does not support async I/O\0A\00"
define i32 @async_write_no_copy() {
%1 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 170)
unreachable
}

LLVM IR (-O2):
@str = [39 x i8] c"Your system does not support async I/O\00"
define i32 @async_write_no_copy() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 170)
unreachable
}
/* Variables and functions */
scalar_t__ malloc(unsigned int);
short *Short_array(int size) {
  return ((short *)malloc((unsigned)(size * sizeof(short))));
}


x86 assembly (clang, -O0):
<Short_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x1,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Short_array>:
add    %edi,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i16* @Short_array(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = mul i64 %4, 2
%6 = trunc i64 %5 to i32
%7 = call i64 @malloc(i32 %6)
%8 = inttoptr i64 %7 to i16*
ret i16* %8
}

LLVM IR (-O2):
define i16* @Short_array(i32 %0) {
%2 = shl i32 %0, 1
%3 = tail call i64 @malloc(i32 %2)
%4 = inttoptr i64 %3 to i16*
ret i16* %4
}
void reverse_string(char *front, char *back) {
  while (front && back && front < back) {
    char tmp = *front;
    *front = *back;
    *back = tmp;
    ++front;
    --back;
  }
}


x86 assembly (clang, -O0):
<reverse_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x12(%rbp)
je     113a <reverse_string+0x3a>
xor    %eax,%eax
cmpq   $0x0,-0x10(%rbp)
mov    %al,-0x12(%rbp)
je     113a <reverse_string+0x3a>
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setb   %al
mov    %al,-0x12(%rbp)
mov    -0x12(%rbp),%al
test   $0x1,%al
jne    114a <reverse_string+0x4a>
jmp    1185 <reverse_string+0x85>
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
jmp    110c <reverse_string+0xc>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse_string>:
test   %rdi,%rdi
je     112c <reverse_string+0x2c>
cmp    %rsi,%rdi
jae    112c <reverse_string+0x2c>
add    $0xffffffffffffffff,%rsi
xchg   %ax,%ax
movzbl (%rdi),%eax
movzbl 0x1(%rsi),%ecx
mov    %cl,(%rdi)
mov    %al,0x1(%rsi)
add    $0x1,%rdi
lea    -0x1(%rsi),%rax
cmp    %rsi,%rdi
mov    %rax,%rsi
jb     1110 <reverse_string+0x10>
ret

LLVM IR (-O0):
define void @reverse_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %3
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %16
9: ; preds = %6
%10 = load i8*, i8** %4
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i8*, i8** %3
%14 = load i8*, i8** %4
%15 = icmp ult i8* %13, %14
br label %16
16: ; preds = %12, %9, %6
%17 = phi i1 [ false, %9 ], [ false, %6 ], [ %15, %12 ]
br i1 %17, label %18, label %30
18: ; preds = %16
%19 = load i8*, i8** %3
%20 = load i8, i8* %19
store i8 %20, i8* %5
%21 = load i8*, i8** %4
%22 = load i8, i8* %21
%23 = load i8*, i8** %3
store i8 %22, i8* %23
%24 = load i8, i8* %5
%25 = load i8*, i8** %4
store i8 %24, i8* %25
%26 = load i8*, i8** %3
%27 = getelementptr inbounds i8, i8* %26, i32 1
store i8* %27, i8** %3
%28 = load i8*, i8** %4
%29 = getelementptr inbounds i8, i8* %28, i32 -1
store i8* %29, i8** %4
br label %6
30: ; preds = %16
ret void
}

LLVM IR (-O2):
define void @reverse_string(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ult i8* %0, %1
%5 = and i1 %3, %4
br i1 %5, label %6, label %14
6: ; preds = %2, %6
%7 = phi i8* [ %11, %6 ], [ %0, %2 ]
%8 = phi i8* [ %12, %6 ], [ %1, %2 ]
%9 = load i8, i8* %7
%10 = load i8, i8* %8
store i8 %10, i8* %7
store i8 %9, i8* %8
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = getelementptr inbounds i8, i8* %8, i64 -1
%13 = icmp ult i8* %11, %12
br i1 %13, label %6, label %14
14: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ ssd1306_write_command(int);
void ssd1306_set_column_address(uint8_t address) {
  address &= 0x7F;
  ssd1306_write_command((0x10 | (address >> 4)));
  ssd1306_write_command((0x00 | (address & 0x0F)));
}


x86 assembly (clang, -O0):
<ssd1306_set_column_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7f,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x4,%edi
or     $0x10,%edi
call   1030 <ssd1306_write_command@plt>
mov    -0x4(%rbp),%edi
and    $0xf,%edi
or     $0x0,%edi
call   1030 <ssd1306_write_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssd1306_set_column_address>:
push   %rbx
mov    %edi,%ebx
shr    $0x4,%edi
and    $0x7,%edi
or     $0x10,%edi
call   1030 <ssd1306_write_command@plt>
and    $0xf,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <ssd1306_write_command@plt>

LLVM IR (-O0):
define void @ssd1306_set_column_address(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 127
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 4
%7 = or i32 16, %6
%8 = call i32 @ssd1306_write_command(i32 %7)
%9 = load i32, i32* %2
%10 = and i32 %9, 15
%11 = or i32 0, %10
%12 = call i32 @ssd1306_write_command(i32 %11)
ret void
}

LLVM IR (-O2):
define void @ssd1306_set_column_address(i32 %0) {
%2 = lshr i32 %0, 4
%3 = and i32 %2, 7
%4 = or i32 %3, 16
%5 = tail call i32 @ssd1306_write_command(i32 %4)
%6 = and i32 %0, 15
%7 = tail call i32 @ssd1306_write_command(i32 %6)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ capture_event(void *, int, int, int /*<<< orphan*/);
void capture_write_master_pic(uint16_t port, uint8_t val, void *p) {
  capture_event(p, (4 << 8), 1, port);
}


x86 assembly (clang, -O0):
<capture_write_master_pic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%ecx
mov    $0x400,%esi
mov    $0x1,%edx
call   1030 <capture_event@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<capture_write_master_pic>:
mov    %edi,%ecx
mov    %rdx,%rdi
mov    $0x400,%esi
mov    $0x1,%edx
jmp    1030 <capture_event@plt>

LLVM IR (-O0):
define void @capture_write_master_pic(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = load i32, i32* %4
%9 = call i32 @capture_event(i8* %7, i32 1024, i32 1, i32 %8)
ret void
}

LLVM IR (-O2):
define void @capture_write_master_pic(i32 %0, i32 %1, i8* %2) {
%4 = tail call i32 @capture_event(i8* %2, i32 1024, i32 1, i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ popNumber();
int /*<<< orphan*/ pushNumber(int /*<<< orphan*/);
int /*<<< orphan*/ sin(int /*<<< orphan*/);
void basSin() { pushNumber(sin(popNumber())); }


x86 assembly (clang, -O0):
<basSin>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <popNumber@plt>
mov    %eax,%edi
call   1030 <sin@plt>
mov    %eax,%edi
call   1040 <pushNumber@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<basSin>:
push   %rax
xor    %eax,%eax
call   1050 <popNumber@plt>
mov    %eax,%edi
call   1030 <sin@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <pushNumber@plt>

LLVM IR (-O0):
define void @basSin() {
%1 = call i32 (...) @popNumber()
%2 = call i32 @sin(i32 %1)
%3 = call i32 @pushNumber(i32 %2)
ret void
}

LLVM IR (-O2):
define void @basSin() {
%1 = tail call i32 (...) @popNumber()
%2 = tail call i32 @sin(i32 %1)
%3 = tail call i32 @pushNumber(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int local, visible;
  local = 33;
  visible = local + 1;
  printf("%d %d\n", local, visible);
  {
    int local;
    local = 42;
    printf("%d %d\n", local, visible);
  }
  printf("%d %d\n", local, visible);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x21,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
movl   $0x2a,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xeb2(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xea0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x21,%esi
mov    $0x22,%edx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x2a,%esi
mov    $0x22,%edx
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x21,%esi
mov    $0x22,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 33, i32* %1
%4 = load i32, i32* %1
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %7)
store i32 42, i32* %3
%9 = load i32, i32* %3
%10 = load i32, i32* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
%12 = load i32, i32* %1
%13 = load i32, i32* %2
%14 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %12, i32 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 33, i32 34)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 42, i32 34)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 33, i32 34)
ret i32 0
}
unsigned int ps_getr(int c) { return (c >> 16) & 0xff; }


x86 assembly (clang, -O0):
<ps_getr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_getr>:
shr    $0x10,%edi
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @ps_getr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 16
%5 = and i32 %4, 255
ret i32 %5
}

LLVM IR (-O2):
define i32 @ps_getr(i32 %0) {
%2 = lshr i32 %0, 16
%3 = and i32 %2, 255
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ branch_both();
int /*<<< orphan*/ branch_one();
int /*<<< orphan*/ nested_both();
int /*<<< orphan*/ nested_inner();
int /*<<< orphan*/ nested_outer();
int /*<<< orphan*/ sequential_both();
int /*<<< orphan*/ sequential_last();
int /*<<< orphan*/ single();
int main() {
  int r;
  switch (r) {
  case 0:
    single();
    break;
  case 1:
    sequential_last();
    break;
  case 2:
    sequential_both();
    break;
  case 3:
    branch_one();
    break;
  case 4:
    branch_both();
    break;
  case 5:
    nested_outer();
    break;
  case 6:
    nested_inner();
    break;
  case 7:
    nested_both();
    break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x7,%rax
ja     120f <main+0x8f>
mov    -0x10(%rbp),%rax
lea    0xe55(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    $0x0,%al
call   1090 <single@plt>
jmp    120f <main+0x8f>
mov    $0x0,%al
call   1070 <sequential_last@plt>
jmp    120f <main+0x8f>
mov    $0x0,%al
call   1080 <sequential_both@plt>
jmp    120f <main+0x8f>
mov    $0x0,%al
call   1030 <branch_one@plt>
jmp    120f <main+0x8f>
mov    $0x0,%al
call   1040 <branch_both@plt>
jmp    120f <main+0x8f>
mov    $0x0,%al
call   1050 <nested_outer@plt>
jmp    120f <main+0x8f>
mov    $0x0,%al
call   1060 <nested_inner@plt>
jmp    120f <main+0x8f>
mov    $0x0,%al
call   10a0 <nested_both@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <single@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %2
switch i32 %3, label %20 [
i32 0, label %4
i32 1, label %6
i32 2, label %8
i32 3, label %10
i32 4, label %12
i32 5, label %14
i32 6, label %16
i32 7, label %18
]
4: ; preds = %0
%5 = call i32 (...) @single()
br label %20
6: ; preds = %0
%7 = call i32 (...) @sequential_last()
br label %20
8: ; preds = %0
%9 = call i32 (...) @sequential_both()
br label %20
10: ; preds = %0
%11 = call i32 (...) @branch_one()
br label %20
12: ; preds = %0
%13 = call i32 (...) @branch_both()
br label %20
14: ; preds = %0
%15 = call i32 (...) @nested_outer()
br label %20
16: ; preds = %0
%17 = call i32 (...) @nested_inner()
br label %20
18: ; preds = %0
%19 = call i32 (...) @nested_both()
br label %20
20: ; preds = %0, %18, %16, %14, %12, %10, %8, %6, %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @single()
ret i32 0
}
int isspace(int c) { return c == ' ' || ('\011' <= c && c <= '\015'); }


x86 assembly (clang, -O0):
<isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1139 <isspace+0x39>
xor    %eax,%eax
mov    $0x9,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x6(%rbp)
jg     1133 <isspace+0x33>
cmpl   $0xd,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isspace>:
cmp    $0x20,%edi
sete   %al
add    $0xfffffff7,%edi
cmp    $0x5,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isspace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %13, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 9, %6
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp sle i32 %9, 13
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ false, %5 ], [ %10, %8 ]
br label %13
13: ; preds = %11, %1
%14 = phi i1 [ true, %1 ], [ %12, %11 ]
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @isspace(i32 %0) {
%2 = icmp eq i32 %0, 32
%3 = add i32 %0, -9
%4 = icmp ult i32 %3, 5
%5 = or i1 %2, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
void EVP_MD_CTX_cleanup(void) {}


x86 assembly (clang, -O0):
<EVP_MD_CTX_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_MD_CTX_cleanup>:
ret

LLVM IR (-O0):
define void @EVP_MD_CTX_cleanup() {
ret void
}

LLVM IR (-O2):
define void @EVP_MD_CTX_cleanup() {
ret void
}
/* Type definitions */
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int /*<<< orphan*/ recvfrom(int, void *, size_t, int, struct sockaddr *,
                            int /*<<< orphan*/ *);
ssize_t olsr_recvfrom(int s, void *buf, size_t len, int flags,
                      struct sockaddr *from, socklen_t *fromlen) {
  return recvfrom(s, buf, len, flags, from, fromlen);
}


x86 assembly (clang, -O0):
<olsr_recvfrom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%r9
call   1030 <recvfrom@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<olsr_recvfrom>:
jmp    1030 <recvfrom@plt>

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @olsr_recvfrom(i32 %0, i8* %1, i64 %2, i32 %3, %struct.sockaddr* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i32
%11 = alloca %struct.sockaddr*
%12 = alloca i32*
store i32 %0, i32* %7
store i8* %1, i8** %8
store i64 %2, i64* %9
store i32 %3, i32* %10
store %struct.sockaddr* %4, %struct.sockaddr** %11
store i32* %5, i32** %12
%13 = load i32, i32* %7
%14 = load i8*, i8** %8
%15 = load i64, i64* %9
%16 = load i32, i32* %10
%17 = load %struct.sockaddr*, %struct.sockaddr** %11
%18 = load i32*, i32** %12
%19 = call i32 @recvfrom(i32 %13, i8* %14, i64 %15, i32 %16, %struct.sockaddr* %17, i32* %18)
ret i32 %19
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @olsr_recvfrom(i32 %0, i8* %1, i64 %2, i32 %3, %struct.sockaddr* %4, i32* %5) {
%7 = tail call i32 @recvfrom(i32 %0, i8* %1, i64 %2, i32 %3, %struct.sockaddr* %4, i32* %5)
ret i32 %7
}
/* Variables and functions */
int mcfioC_NTupleSubStruct(int, int, int, char *);
int mcfio_ntuplesubstruct_(int *stream, int *ntupleid, int *multIndex,
                           char *version, int ll) {
  int multIndexF;
  multIndexF = (*multIndex) - 1;
  return mcfioC_NTupleSubStruct(*stream, *ntupleid, multIndexF, version);
}


x86 assembly (clang, -O0):
<mcfio_ntuplesubstruct_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
sub    $0x1,%eax
mov    %eax,-0x28(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x28(%rbp),%edx
mov    -0x20(%rbp),%rcx
call   1030 <mcfioC_NTupleSubStruct@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcfio_ntuplesubstruct_>:
mov    (%rdx),%edx
add    $0xffffffff,%edx
mov    (%rdi),%edi
mov    (%rsi),%esi
jmp    1030 <mcfioC_NTupleSubStruct@plt>

LLVM IR (-O0):
define i32 @mcfio_ntuplesubstruct_(i32* %0, i32* %1, i32* %2, i8* %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i32
store i32* %0, i32** %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%12 = load i32*, i32** %8
%13 = load i32, i32* %12
%14 = sub nsw i32 %13, 1
store i32 %14, i32* %11
%15 = load i32*, i32** %6
%16 = load i32, i32* %15
%17 = load i32*, i32** %7
%18 = load i32, i32* %17
%19 = load i32, i32* %11
%20 = load i8*, i8** %9
%21 = call i32 @mcfioC_NTupleSubStruct(i32 %16, i32 %18, i32 %19, i8* %20)
ret i32 %21
}

LLVM IR (-O2):
define i32 @mcfio_ntuplesubstruct_(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2, i8* %3, i32 %4) {
%6 = load i32, i32* %2
%7 = add nsw i32 %6, -1
%8 = load i32, i32* %0
%9 = load i32, i32* %1
%10 = tail call i32 @mcfioC_NTupleSubStruct(i32 %8, i32 %9, i32 %7, i8* %3)
ret i32 %10
}
/* Variables and functions */
unsigned char inb(int);
int /*<<< orphan*/ outb(int, int);
unsigned char fb_get_cursor_end() {
  outb(0x3D4, 0x0B);
  return inb(0x3D5);
}


x86 assembly (clang, -O0):
<fb_get_cursor_end>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3d4,%edi
mov    $0xb,%esi
call   1030 <outb@plt>
mov    $0x3d5,%edi
call   1040 <inb@plt>
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_get_cursor_end>:
push   %rax
mov    $0x3d4,%edi
mov    $0xb,%esi
call   1030 <outb@plt>
mov    $0x3d5,%edi
pop    %rax
jmp    1040 <inb@plt>

LLVM IR (-O0):
define zeroext i8 @fb_get_cursor_end() {
%1 = call i32 @outb(i32 980, i32 11)
%2 = call zeroext i8 @inb(i32 981)
ret i8 %2
}

LLVM IR (-O2):
define zeroext i8 @fb_get_cursor_end() {
%1 = tail call i32 @outb(i32 980, i32 11)
%2 = tail call zeroext i8 @inb(i32 981)
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ create_config(char *);
int /*<<< orphan*/ printf(char *, char *);
int test_config(void) {
  int _fail_count = 0;
  if (!(!create_config("/no/such/dir"))) {
    printf("test %s failed\n", "invalid config path");
    _fail_count++;
  };
  return _fail_count;
}


x86 assembly (clang, -O0):
<test_config>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <create_config@plt>
cmp    $0x0,%eax
je     1160 <test_config+0x40>
lea    0xec2(%rip),%rdi
lea    0xecb(%rip),%rsi
call   1040 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_config>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <create_config@plt>
test   %eax,%eax
je     114b <test_config+0x2b>
lea    0xed5(%rip),%rdi
lea    0xede(%rip),%rsi
call   1040 <printf@plt>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"/no/such/dir\00"
@.str.1 = [16 x i8] c"test %s failed\0A\00"
@.str.2 = [20 x i8] c"invalid config path\00"
define i32 @test_config() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @create_config(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %0
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0))
%6 = load i32, i32* %1
%7 = add nsw i32 %6, 1
store i32 %7, i32* %1
br label %8
8: ; preds = %4, %0
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
@.str = [13 x i8] c"/no/such/dir\00"
@.str.1 = [16 x i8] c"test %s failed\0A\00"
@.str.2 = [20 x i8] c"invalid config path\00"
define i32 @test_config() {
%1 = tail call i32 @create_config(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
%6 = phi i32 [ 1, %3 ], [ 0, %0 ]
ret i32 %6
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x, y, z;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  z = __VERIFIER_nondet_int();
  while (x > 0) {
    x = x + y;
    y = z;
    z = -z - 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1166 <main+0x56>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
sub    -0x10(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    113d <main+0x2d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %2
%6 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %6, i32* %3
%7 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %7, i32* %4
br label %8
8: ; preds = %11, %0
%9 = load i32, i32* %2
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %8
%12 = load i32, i32* %2
%13 = load i32, i32* %3
%14 = add nsw i32 %12, %13
store i32 %14, i32* %2
%15 = load i32, i32* %4
store i32 %15, i32* %3
%16 = load i32, i32* %4
%17 = sub nsw i32 0, %16
%18 = sub nsw i32 %17, 1
store i32 %18, i32* %4
br label %8
19: ; preds = %8
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
void adis16203_unconfigure_ring(struct iio_dev *indio_dev) {}


x86 assembly (clang, -O0):
<adis16203_unconfigure_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<adis16203_unconfigure_ring>:
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define void @adis16203_unconfigure_ring(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret void
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define void @adis16203_unconfigure_ring(%struct.iio_dev* nocapture %0) {
ret void
}
/* Variables and functions */
int rand();
int crng(int num, int den) {
  int temp = rand() % den;
  if (temp < num) {
    return 0;
  } else {
    return temp;
  }
}


x86 assembly (clang, -O0):
<crng>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1144 <crng+0x34>
movl   $0x0,-0x4(%rbp)
jmp    114a <crng+0x3a>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crng>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %edi,%r14d
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
cmp    %r14d,%edx
cmovge %edx,%ebp
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @crng(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = call i32 (...) @rand()
%8 = load i32, i32* %5
%9 = srem i32 %7, %8
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = load i32, i32* %4
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %14
13: ; preds = %2
store i32 0, i32* %3
br label %16
14: ; preds = %2
%15 = load i32, i32* %6
store i32 %15, i32* %3
br label %16
16: ; preds = %14, %13
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @crng(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = srem i32 %3, %1
%5 = icmp slt i32 %4, %0
%6 = select i1 %5, i32 0, i32 %4
ret i32 %6
}
double py_identity2d(double x, double y) {
  (void)y;
  return x;
}


x86 assembly (clang, -O0):
<py_identity2d>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<py_identity2d>:
ret

LLVM IR (-O0):
define double @py_identity2d(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @py_identity2d(double returned %0, double %1) {
ret double %0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ strncmp(char const *, char const *, int);
void test7(const char *ptr) {
  if (strncmp(ptr, ptr, 8) != 0)
    abort();
}


x86 assembly (clang, -O0):
<test7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x8,%edx
call   1040 <strncmp@plt>
cmp    $0x0,%rax
je     114f <test7+0x2f>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test7>:
push   %rax
mov    %rdi,%rsi
mov    $0x8,%edx
call   1040 <strncmp@plt>
test   %rax,%rax
jne    1135 <test7+0x15>
pop    %rax
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @test7(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strncmp(i8* %3, i8* %4, i32 8)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 (...) @abort()
unreachable
9: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @test7(i8* %0) {
%2 = tail call i64 @strncmp(i8* %0, i8* %0, i32 8)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void pr_stdio(char const *name, FILE *fp) { printf("stream = %s, ", name); }


x86 assembly (clang, -O0):
<pr_stdio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pr_stdio>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"stream = %s, \00"
define void @pr_stdio(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"stream = %s, \00"
define void @pr_stdio(i8* %0, i32* nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
float cosh(float);
float call_coshf(float x) { return cosh((float)x); }


x86 assembly (clang, -O0):
<call_coshf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <cosh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_coshf>:
jmp    1030 <cosh@plt>

LLVM IR (-O0):
define float @call_coshf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @cosh(float %3)
ret float %4
}

LLVM IR (-O2):
define float @call_coshf(float %0) {
%2 = tail call float @cosh(float %0)
ret float %2
}
long int fact(int no) {
  if (no > 1) {
    return no * fact(no - 1);
  }
  return 1;
}


x86 assembly (clang, -O0):
<fact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jle    114c <fact+0x3c>
movslq -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
sub    $0x1,%edi
call   1030 <fact@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
imul   %rcx,%rax
mov    %rax,-0x8(%rbp)
jmp    1154 <fact+0x44>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fact>:
mov    $0x1,%eax
cmp    $0x2,%edi
jl     1131 <fact+0x31>
mov    %edi,%ecx
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
imul   %rcx,%rax
lea    -0x1(%rcx),%rdx
cmp    $0x2,%rcx
mov    %rdx,%rcx
ja     1120 <fact+0x20>
ret

LLVM IR (-O0):
define i64 @fact(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 1
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i64 @fact(i32 %10)
%12 = mul nsw i64 %8, %11
store i64 %12, i64* %2
br label %14
13: ; preds = %1
store i64 1, i64* %2
br label %14
14: ; preds = %13, %6
%15 = load i64, i64* %2
ret i64 %15
}

LLVM IR (-O2):
define i64 @fact(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %11
3: ; preds = %1
%4 = zext i32 %0 to i64
br label %5
5: ; preds = %3, %5
%6 = phi i64 [ %4, %3 ], [ %8, %5 ]
%7 = phi i64 [ 1, %3 ], [ %9, %5 ]
%8 = add nsw i64 %6, -1
%9 = mul nsw i64 %7, %6
%10 = icmp ugt i64 %6, 2
br i1 %10, label %5, label %11
11: ; preds = %5, %1
%12 = phi i64 [ 1, %1 ], [ %9, %5 ]
ret i64 %12
}