xunge/DecIR huggingface dataset:
/* Variables and functions */
int __set_attribute(int, char *, char *);
int pin_set_value(int pin, int value) {
  if (value != 0 && value != 1)
    return -1;
  return __set_attribute(pin, "value", value == 0 ? "0" : "1");
}


x86 assembly (clang, -O0):
<pin_set_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     113e <pin_set_value+0x2e>
cmpl   $0x1,-0xc(%rbp)
je     113e <pin_set_value+0x2e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1168 <pin_set_value+0x58>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%ecx
lea    0xebd(%rip),%rdx
lea    0xeb4(%rip),%rax
cmp    $0x0,%ecx
cmove  %rax,%rdx
lea    0xea0(%rip),%rsi
call   1030 <__set_attribute@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pin_set_value>:
cmp    $0x1,%esi
ja     1135 <pin_set_value+0x25>
test   %esi,%esi
lea    0xee8(%rip),%rax
lea    0xee3(%rip),%rdx
cmove  %rax,%rdx
lea    0xed0(%rip),%rsi
jmp    1030 <__set_attribute@plt>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"value\00"
@.str.1 = [2 x i8] c"0\00"
@.str.2 = [2 x i8] c"1\00"
define i32 @pin_set_value(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %8
store i32 -1, i32* %3
br label %19
12: ; preds = %8, %2
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = icmp eq i32 %14, 0
%16 = zext i1 %15 to i64
%17 = select i1 %15, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0)
%18 = call i32 @__set_attribute(i32 %13, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %17)
store i32 %18, i32* %3
br label %19
19: ; preds = %12, %11
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
@.str = [6 x i8] c"value\00"
@.str.1 = [2 x i8] c"0\00"
@.str.2 = [2 x i8] c"1\00"
define i32 @pin_set_value(i32 %0, i32 %1) {
%3 = icmp ult i32 %1, 2
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = icmp eq i32 %1, 0
%6 = select i1 %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0)
%7 = tail call i32 @__set_attribute(i32 %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %6)
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ -1, %2 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ xCPUbasepriSet(unsigned long);
void xIntPriorityMaskSet(unsigned long ulPriorityMask) {
  xCPUbasepriSet(ulPriorityMask);
}


x86 assembly (clang, -O0):
<xIntPriorityMaskSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <xCPUbasepriSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xIntPriorityMaskSet>:
jmp    1030 <xCPUbasepriSet@plt>

LLVM IR (-O0):
define void @xIntPriorityMaskSet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @xCPUbasepriSet(i64 %3)
ret void
}

LLVM IR (-O2):
define void @xIntPriorityMaskSet(i64 %0) {
%2 = tail call i32 @xCPUbasepriSet(i64 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ cl_device_id;
typedef int /*<<< orphan*/ cl_context;
typedef int /*<<< orphan*/ *cl_command_queue;

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int CreateCommandQueue(cl_command_queue *cmd_q, cl_context ctx,
                       cl_device_id dev) {
  assert(*cmd_q != NULL);
  return 0;
}


x86 assembly (clang, -O0):
<CreateCommandQueue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CreateCommandQueue>:
push   %rax
xor    %eax,%eax
cmpq   $0x0,(%rdi)
setne  %al
mov    %eax,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @CreateCommandQueue(i32** %0, i32 %1, i32 %2) {
%4 = alloca i32**
%5 = alloca i32
%6 = alloca i32
store i32** %0, i32*** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32**, i32*** %4
%8 = load i32*, i32** %7
%9 = icmp ne i32* %8, null
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
ret i32 0
}

LLVM IR (-O2):
define i32 @CreateCommandQueue(i32** nocapture %0, i32 %1, i32 %2) {
%4 = load i32*, i32** %0
%5 = icmp ne i32* %4, null
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
ret i32 0
}
/* Variables and functions */
int genrand64_int64();
double genrand64_real4(void) {
  return ((genrand64_int64() >> 12) + 0.5) * (1.0 / 4503599627370495.5);
}


x86 assembly (clang, -O0):
<genrand64_real4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <genrand64_int64@plt>
sar    $0xc,%eax
cvtsi2sd %eax,%xmm0
movsd  0xede(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  0xeca(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<genrand64_real4>:
push   %rax
xor    %eax,%eax
call   1030 <genrand64_int64@plt>
sar    $0xc,%eax
cvtsi2sd %eax,%xmm0
addsd  0xed9(%rip),%xmm0
mulsd  0xed9(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @genrand64_real4() {
%1 = call i32 (...) @genrand64_int64()
%2 = ashr i32 %1, 12
%3 = sitofp i32 %2 to double
%4 = fadd double %3, 5.000000e-01
%5 = fmul double %4, 0x3CB0000000000001
ret double %5
}

LLVM IR (-O2):
define double @genrand64_real4() {
%1 = tail call i32 (...) @genrand64_int64()
%2 = ashr i32 %1, 12
%3 = sitofp i32 %2 to double
%4 = fadd double %3, 5.000000e-01
%5 = fmul double %4, 0x3CB0000000000001
ret double %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
uint64_t psector_Read_MaxDeviceId(void) {
  uint64_t (*p_psector_Read_MaxDeviceId)(void);
  p_psector_Read_MaxDeviceId = (uint64_t(*)(void))0x03005409U;
  return p_psector_Read_MaxDeviceId();
}


x86 assembly (clang, -O0):
<psector_Read_MaxDeviceId>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3005409,%eax
mov    %rax,-0x8(%rbp)
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psector_Read_MaxDeviceId>:
mov    $0x3005409,%eax
jmp    *%rax

LLVM IR (-O0):
define i32 @psector_Read_MaxDeviceId() {
%1 = alloca i32 ()*
store i32 ()* inttoptr (i64 50353161 to i32 ()*), i32 ()** %1
%2 = load i32 ()*, i32 ()** %1
%3 = call i32 %2()
ret i32 %3
}

LLVM IR (-O2):
define i32 @psector_Read_MaxDeviceId() {
%1 = tail call i32 inttoptr (i64 50353161 to i32 ()*)()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ _fail(char const *const, int const);
int /*<<< orphan*/ values_not_equal_display_error(unsigned long const,
                                                  unsigned long const);
void _assert_int_not_equal(const unsigned long int a, const unsigned long int b,
                           const char *const file, const int line) {
  if (!values_not_equal_display_error(a, b)) {
    _fail(file, line);
  }
}


x86 assembly (clang, -O0):
<_assert_int_not_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <values_not_equal_display_error@plt>
cmp    $0x0,%eax
jne    1159 <_assert_int_not_equal+0x39>
mov    -0x18(%rbp),%rdi
mov    -0x1c(%rbp),%esi
call   1030 <_fail@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_assert_int_not_equal>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %rdx,%rbx
call   1040 <values_not_equal_display_error@plt>
test   %eax,%eax
je     1138 <_assert_int_not_equal+0x18>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <_fail@plt>

LLVM IR (-O0):
define void @_assert_int_not_equal(i64 %0, i64 %1, i8* %2, i32 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i32
store i64 %0, i64* %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i64, i64* %5
%10 = load i64, i64* %6
%11 = call i32 @values_not_equal_display_error(i64 %9, i64 %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %17, label %13
13: ; preds = %4
%14 = load i8*, i8** %7
%15 = load i32, i32* %8
%16 = call i32 @_fail(i8* %14, i32 %15)
br label %17
17: ; preds = %13, %4
ret void
}

LLVM IR (-O2):
define void @_assert_int_not_equal(i64 %0, i64 %1, i8* %2, i32 %3) {
%5 = tail call i32 @values_not_equal_display_error(i64 %0, i64 %1)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i32 @_fail(i8* %2, i32 %3)
br label %9
9: ; preds = %7, %4
ret void
}
int dead_pointer(int a) {
  int *p = &a;
  if (a) {
    int x = 0;
    p = &x;
  }
  return *p;
}


x86 assembly (clang, -O0):
<dead_pointer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1128 <dead_pointer+0x28>
movl   $0x0,-0x14(%rbp)
lea    -0x14(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dead_pointer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dead_pointer(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32 %0, i32* %2
store i32* %2, i32** %3
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %4
store i32* %4, i32** %3
br label %8
8: ; preds = %7, %1
%9 = load i32*, i32** %3
%10 = load i32, i32* %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @dead_pointer(i32 %0) {
ret i32 0
}
long *d() {}


x86 assembly (clang, -O0):
<d>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d>:
ret

LLVM IR (-O0):
define i64* @d() {
%1 = alloca i64*
%2 = load i64*, i64** %1
ret i64* %2
}

LLVM IR (-O2):
define noalias i64* @d() {
ret i64* undef
}
void short_sleep() {}


x86 assembly (clang, -O0):
<short_sleep>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<short_sleep>:
ret

LLVM IR (-O0):
define void @short_sleep() {
ret void
}

LLVM IR (-O2):
define void @short_sleep() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ atoi(char *);
int fib_serial(int /*<<< orphan*/);
int main2_serial(int argc, char *argv[]) {
  int n, result_serial = 0;
  if (argc == 2)
    result_serial = fib_serial(atoi(argv[1]));
  else
    result_serial = fib_serial(atoi("30"));
  return result_serial;
}


x86 assembly (clang, -O0):
<main2_serial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
cmpl   $0x2,-0x4(%rbp)
jne    115c <main2_serial+0x3c>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
call   1030 <fib_serial@plt>
mov    %eax,-0x18(%rbp)
jmp    1172 <main2_serial+0x52>
lea    0xe9d(%rip),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
call   1030 <fib_serial@plt>
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main2_serial>:
mov    %edi,%eax
mov    $0x1e,%edi
cmp    $0x2,%eax
jne    113c <main2_serial+0x1c>
push   %rax
mov    0x8(%rsi),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
add    $0x8,%rsp
jmp    1030 <fib_serial@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"30\00"
define i32 @main2_serial(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 0, i32* %6
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 2
br i1 %8, label %9, label %15
9: ; preds = %2
%10 = load i8**, i8*** %4
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = call i32 @atoi(i8* %12)
%14 = call i32 @fib_serial(i32 %13)
store i32 %14, i32* %6
br label %18
15: ; preds = %2
%16 = call i32 @atoi(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%17 = call i32 @fib_serial(i32 %16)
store i32 %17, i32* %6
br label %18
18: ; preds = %15, %9
%19 = load i32, i32* %6
ret i32 %19
}

LLVM IR (-O2):
define i32 @main2_serial(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @atoi(i8* %6)
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ 30, %2 ]
%10 = tail call i32 @fib_serial(i32 %9)
ret i32 %10
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ epoll4(struct __test_metadata *);
void wrapper_epoll4(struct __test_metadata *_metadata,
                    struct __fixture_variant_metadata *variant) {
  epoll4(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_epoll4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <epoll4@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_epoll4>:
jmp    1030 <epoll4@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll4(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @epoll4(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll4(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @epoll4(%struct.__test_metadata* %0)
ret void
}
int test_imm_5Dint64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x5D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Dint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x5d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Dint64_midword_mem>:
testb  $0x5d,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Dint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 93
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_5Dint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 6094848
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
const char *vde_chain_nm6_name_in(int i) {
  switch (i) {
  case 0:
    return "i0";
  case 1:
    return "i1";
  case 2:
    return "i2";
  case 3:
    return "i3";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<vde_chain_nm6_name_in>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %rax,-0x18(%rbp)
sub    $0x3,%rax
ja     116c <vde_chain_nm6_name_in+0x6c>
mov    -0x18(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
lea    0xedd(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1174 <vde_chain_nm6_name_in+0x74>
lea    0xed0(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1174 <vde_chain_nm6_name_in+0x74>
lea    0xec3(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1174 <vde_chain_nm6_name_in+0x74>
lea    0xeb6(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1174 <vde_chain_nm6_name_in+0x74>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vde_chain_nm6_name_in>:
cmp    $0x3,%edi
ja     1117 <vde_chain_nm6_name_in+0x17>
movslq %edi,%rax
lea    0xefd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"i0\00"
@.str.1 = [3 x i8] c"i1\00"
@.str.2 = [3 x i8] c"i2\00"
@.str.3 = [3 x i8] c"i3\00"
define i8* @vde_chain_nm6_name_in(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %10
6: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %10
7: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8** %2
br label %10
8: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.3, i64 0, i64 0), i8** %2
br label %10
9: ; preds = %1
store i8* null, i8** %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
@.str = [3 x i8] c"i0\00"
@.str.1 = [3 x i8] c"i1\00"
@.str.2 = [3 x i8] c"i2\00"
@.str.3 = [3 x i8] c"i3\00"
@reltable.vde_chain_nm6_name_in = [4 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([3 x i8]* @.str to i64), i64 ptrtoint ([4 x i32]* @reltable.vde_chain_nm6_name_in to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([3 x i8]* @.str.1 to i64), i64 ptrtoint ([4 x i32]* @reltable.vde_chain_nm6_name_in to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([3 x i8]* @.str.2 to i64), i64 ptrtoint ([4 x i32]* @reltable.vde_chain_nm6_name_in to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([3 x i8]* @.str.3 to i64), i64 ptrtoint ([4 x i32]* @reltable.vde_chain_nm6_name_in to i64)) to i32)]
define i8* @vde_chain_nm6_name_in(i32 %0) {
%2 = icmp ult i32 %0, 4
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = sext i32 %0 to i64
%5 = shl i64 %4, 2
%6 = call i8* @llvm.load.relative.i64(i8* bitcast ([4 x i32]* @reltable.vde_chain_nm6_name_in to i8*), i64 %5)
br label %7
7: ; preds = %1, %3
%8 = phi i8* [ %6, %3 ], [ null, %1 ]
ret i8* %8
}
void XkbFreeControls() {}


x86 assembly (clang, -O0):
<XkbFreeControls>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XkbFreeControls>:
ret

LLVM IR (-O0):
define void @XkbFreeControls() {
ret void
}

LLVM IR (-O2):
define void @XkbFreeControls() {
ret void
}
/* Variables and functions */
scalar_t__ par(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ puts(char *);
int soma(int);
int main() {
  int parTest = 76;
  int paraSomar = 12345678;
  if (par(parTest)) {
    puts("É PAR!");
  }
  int sum = soma(paraSomar);
  printf("Soma: %d\n", sum);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x4c,-0x8(%rbp)
movl   $0xbc614e,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1060 <par@plt>
cmp    $0x0,%rax
je     117b <main+0x3b>
lea    0xe8a(%rip),%rdi
call   1030 <puts@plt>
mov    -0xc(%rbp),%edi
call   1050 <soma@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xe78(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4c,%edi
call   1060 <par@plt>
test   %rax,%rax
je     115c <main+0x1c>
lea    0xea9(%rip),%rdi
call   1030 <puts@plt>
mov    $0xbc614e,%edi
call   1050 <soma@plt>
lea    0xe9b(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"\C3\89 PAR!\00"
@.str.1 = [10 x i8] c"Soma: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 76, i32* %2
store i32 12345678, i32* %3
%5 = load i32, i32* %2
%6 = call i64 @par(i32 %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = call i32 @puts(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %0
%11 = load i32, i32* %3
%12 = call i32 @soma(i32 %11)
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"\C3\89 PAR!\00"
@.str.1 = [10 x i8] c"Soma: %d\0A\00"
define i32 @main() {
%1 = tail call i64 @par(i32 76)
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
%6 = tail call i32 @soma(i32 12345678)
%7 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
char *next_input_line();
int /*<<< orphan*/ strlen(char *);
int /*<<< orphan*/ write(int, char *, int /*<<< orphan*/);
char *line_edit_input(char *prompt) {
  write(1, prompt, strlen(prompt));
  return next_input_line();
}


x86 assembly (clang, -O0):
<line_edit_input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strlen@plt>
mov    -0x10(%rbp),%rsi
mov    %eax,%edx
mov    $0x1,%edi
call   1030 <write@plt>
mov    $0x0,%al
call   1040 <next_input_line@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<line_edit_input>:
push   %rbx
mov    %rdi,%rbx
call   1050 <strlen@plt>
mov    $0x1,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
xor    %eax,%eax
pop    %rbx
jmp    1040 <next_input_line@plt>

LLVM IR (-O0):
define i8* @line_edit_input(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @write(i32 1, i8* %3, i32 %5)
%7 = call i8* (...) @next_input_line()
ret i8* %7
}

LLVM IR (-O2):
define i8* @line_edit_input(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @write(i32 1, i8* %0, i32 %2)
%4 = tail call i8* (...) @next_input_line()
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ quick(int /*<<< orphan*/, int);
int main() {
  quick(0, 20000 - 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
mov    $0x4e1f,%esi
call   1030 <quick@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0x4e1f,%esi
call   1030 <quick@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @quick(i32 0, i32 19999)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @quick(i32 0, i32 19999)
ret i32 0
}
int getStrandDiff(char strandA, char strandB, int strandedness) {
  int strandDiff = 0;
  if (strandA == strandB) {
    strandDiff = 0;
  } else {
    strandDiff = 1;
  }
  if (1 == strandedness) {
    strandDiff = 1 - strandDiff;
  }
  return strandDiff;
}


x86 assembly (clang, -O0):
<getStrandDiff>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    %edx,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movsbl -0x1(%rbp),%eax
movsbl -0x2(%rbp),%ecx
cmp    %ecx,%eax
jne    1136 <getStrandDiff+0x36>
movl   $0x0,-0xc(%rbp)
jmp    113d <getStrandDiff+0x3d>
movl   $0x1,-0xc(%rbp)
mov    $0x1,%eax
cmp    -0x8(%rbp),%eax
jne    1156 <getStrandDiff+0x56>
mov    $0x1,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getStrandDiff>:
cmp    %sil,%dil
setne  %al
cmp    $0x1,%edx
sete   %cl
xor    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @getStrandDiff(i8 signext %0, i8 signext %1, i32 %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i32
%7 = alloca i32
store i8 %0, i8* %4
store i8 %1, i8* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i8, i8* %4
%9 = sext i8 %8 to i32
%10 = load i8, i8* %5
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %9, %11
br i1 %12, label %13, label %14
13: ; preds = %3
store i32 0, i32* %7
br label %15
14: ; preds = %3
store i32 1, i32* %7
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %6
%17 = icmp eq i32 1, %16
br i1 %17, label %18, label %21
18: ; preds = %15
%19 = load i32, i32* %7
%20 = sub nsw i32 1, %19
store i32 %20, i32* %7
br label %21
21: ; preds = %18, %15
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @getStrandDiff(i8 signext %0, i8 signext %1, i32 %2) {
%4 = icmp ne i8 %0, %1
%5 = icmp eq i32 %2, 1
%6 = xor i1 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int _chsize(int, int /*<<< orphan*/);
int ftruncate(int __fd, off_t __length) { return _chsize(__fd, __length); }


x86 assembly (clang, -O0):
<ftruncate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_chsize@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ftruncate>:
jmp    1030 <_chsize@plt>

LLVM IR (-O0):
define i32 @ftruncate(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_chsize(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @ftruncate(i32 %0, i32 %1) {
%3 = tail call i32 @_chsize(i32 %0, i32 %1)
ret i32 %3
}
void usdhc4_iomux_config() {}


x86 assembly (clang, -O0):
<usdhc4_iomux_config>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usdhc4_iomux_config>:
ret

LLVM IR (-O0):
define void @usdhc4_iomux_config() {
ret void
}

LLVM IR (-O2):
define void @usdhc4_iomux_config() {
ret void
}
/* Type definitions */
struct echoaudio {
  int dummy;
};

/* Variables and functions */
int init_line_levels(struct echoaudio *);
int set_mixer_defaults(struct echoaudio *chip) {
  return init_line_levels(chip);
}


x86 assembly (clang, -O0):
<set_mixer_defaults>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <init_line_levels@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_mixer_defaults>:
jmp    1030 <init_line_levels@plt>

LLVM IR (-O0):
%struct.echoaudio = type { i32 }
define i32 @set_mixer_defaults(%struct.echoaudio* %0) {
%2 = alloca %struct.echoaudio*
store %struct.echoaudio* %0, %struct.echoaudio** %2
%3 = load %struct.echoaudio*, %struct.echoaudio** %2
%4 = call i32 @init_line_levels(%struct.echoaudio* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.echoaudio = type { i32 }
define i32 @set_mixer_defaults(%struct.echoaudio* %0) {
%2 = tail call i32 @init_line_levels(%struct.echoaudio* %0)
ret i32 %2
}
int fun172() { return 172; }


x86 assembly (clang, -O0):
<fun172>:
push   %rbp
mov    %rsp,%rbp
mov    $0xac,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun172>:
mov    $0xac,%eax
ret

LLVM IR (-O0):
define i32 @fun172() {
ret i32 172
}

LLVM IR (-O2):
define i32 @fun172() {
ret i32 172
}
void sampleShiftRegister(void) {}


x86 assembly (clang, -O0):
<sampleShiftRegister>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sampleShiftRegister>:
ret

LLVM IR (-O0):
define void @sampleShiftRegister() {
ret void
}

LLVM IR (-O2):
define void @sampleShiftRegister() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, long);
char *_ltoa(long value) {
  static char buff[100];
  sprintf(buff, "%ld", value);
  return buff;
}


x86 assembly (clang, -O0):
<_ltoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0x2f19(%rip),%rdi
lea    0xed2(%rip),%rsi
call   1030 <sprintf@plt>
lea    0x2f06(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ltoa>:
push   %rbx
mov    %rdi,%rdx
lea    0x2f25(%rip),%rbx
lea    0xede(%rip),%rsi
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@_ltoa.buff = internal global [100 x i8] zeroinitializer
@.str = [4 x i8] c"%ld\00"
define i8* @_ltoa(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @sprintf(i8* getelementptr inbounds ([100 x i8], [100 x i8]* @_ltoa.buff, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %3)
ret i8* getelementptr inbounds ([100 x i8], [100 x i8]* @_ltoa.buff, i64 0, i64 0)
}

LLVM IR (-O2):
@_ltoa.buff = internal global [100 x i8] zeroinitializer
@.str = [4 x i8] c"%ld\00"
define i8* @_ltoa(i64 %0) {
%2 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([100 x i8], [100 x i8]* @_ltoa.buff, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %0)
ret i8* getelementptr inbounds ([100 x i8], [100 x i8]* @_ltoa.buff, i64 0, i64 0)
}
void input_keyboard(void) {}


x86 assembly (clang, -O0):
<input_keyboard>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_keyboard>:
ret

LLVM IR (-O0):
define void @input_keyboard() {
ret void
}

LLVM IR (-O2):
define void @input_keyboard() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nsc_assert(int);
void l_noread(void) {
  nsc_assert(0 && "This function is unimplemented.");
  ;
}


x86 assembly (clang, -O0):
<l_noread>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<l_noread>:
xor    %edi,%edi
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
define void @l_noread() {
%1 = call i32 @nsc_assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @l_noread() {
%1 = tail call i32 @nsc_assert(i32 0)
ret void
}
long long fn2(long long p1, long long p2) {
  return (p1 && p1 > 26854775807LL - p2) || p1 < -p2 ? p1 : p1 + p2;
}


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1132 <fn2+0x32>
mov    -0x8(%rbp),%rax
movabs $0x640ab5bff,%rcx
sub    -0x10(%rbp),%rcx
cmp    %rcx,%rax
jg     1145 <fn2+0x45>
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
sub    -0x10(%rbp),%rcx
cmp    %rcx,%rax
jge    1152 <fn2+0x52>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    115e <fn2+0x5e>
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
movabs $0x640ab5bff,%rcx
sub    %rsi,%rcx
mov    %rsi,%rdx
neg    %rdx
xor    %eax,%eax
cmp    %rdi,%rdx
cmovg  %rax,%rsi
cmp    %rdi,%rcx
cmovge %rsi,%rax
test   %rdi,%rdi
cmove  %rsi,%rax
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @fn2(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i64, i64* %3
%9 = load i64, i64* %4
%10 = sub nsw i64 26854775807, %9
%11 = icmp sgt i64 %8, %10
br i1 %11, label %17, label %12
12: ; preds = %7, %2
%13 = load i64, i64* %3
%14 = load i64, i64* %4
%15 = sub nsw i64 0, %14
%16 = icmp slt i64 %13, %15
br i1 %16, label %17, label %19
17: ; preds = %12, %7
%18 = load i64, i64* %3
br label %23
19: ; preds = %12
%20 = load i64, i64* %3
%21 = load i64, i64* %4
%22 = add nsw i64 %20, %21
br label %23
23: ; preds = %19, %17
%24 = phi i64 [ %18, %17 ], [ %22, %19 ]
ret i64 %24
}

LLVM IR (-O2):
define i64 @fn2(i64 %0, i64 %1) {
%3 = icmp ne i64 %0, 0
%4 = sub nsw i64 26854775807, %1
%5 = icmp slt i64 %4, %0
%6 = select i1 %3, i1 %5, i1 false
%7 = sub nsw i64 0, %1
%8 = icmp sgt i64 %7, %0
%9 = select i1 %6, i1 true, i1 %8
%10 = select i1 %9, i64 0, i64 %1
%11 = add nsw i64 %10, %0
ret i64 %11
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ state;
};
typedef TYPE_1__ XPropertyEvent;

/* Variables and functions */
int get_XPropertyEvent_state(void *_p) {
  return (int)((XPropertyEvent *)_p)->state;
}


x86 assembly (clang, -O0):
<get_XPropertyEvent_state>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XPropertyEvent_state>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XPropertyEvent_state(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XPropertyEvent_state(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
char *getenv(char *);
char *get_caminho_inicial() {
  char *str = getenv("PWD");
  return str;
}


x86 assembly (clang, -O0):
<get_caminho_inicial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_caminho_inicial>:
lea    0xee9(%rip),%rdi
jmp    1030 <getenv@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"PWD\00"
define i8* @get_caminho_inicial() {
%1 = alloca i8*
%2 = call i8* @getenv(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
@.str = [4 x i8] c"PWD\00"
define i8* @get_caminho_inicial() {
%1 = tail call i8* @getenv(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
void I2CTxFIFOConfigSet(uint32_t ui32Base, uint32_t ui32Config) {
  ;
  (*((volatile unsigned long *)(ui32Base + 0x00000F04))) &= 0xffff0000;
  (*((volatile unsigned long *)(ui32Base + 0x00000F04))) |= ui32Config;
}


x86 assembly (clang, -O0):
<I2CTxFIFOConfigSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0xf04(%rax),%rcx
movabs $0xffff0000,%rdx
and    %rdx,%rcx
mov    %rcx,0xf04(%rax)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0xf04(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0xf04(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CTxFIFOConfigSet>:
mov    %rdi,-0x10(%rsp)
mov    %rsi,-0x8(%rsp)
mov    -0x10(%rsp),%rax
mov    $0xffff0000,%ecx
and    %rcx,0xf04(%rax)
mov    -0x8(%rsp),%rax
mov    -0x10(%rsp),%rcx
or     %rax,0xf04(%rcx)
ret

LLVM IR (-O0):
define void @I2CTxFIFOConfigSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %3
%6 = add i64 %5, 3844
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, 4294901760
store volatile i64 %9, i64* %7
%10 = load volatile i64, i64* %4
%11 = load volatile i64, i64* %3
%12 = add i64 %11, 3844
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @I2CTxFIFOConfigSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %3
%6 = add i64 %5, 3844
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %8, 4294901760
store volatile i64 %9, i64* %7
%10 = load volatile i64, i64* %4
%11 = load volatile i64, i64* %3
%12 = add i64 %11, 3844
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ _IO_buf_base;
  scalar_t__ _IO_buf_end;
};
typedef TYPE_1__ FILE;

/* Variables and functions */
int getFileBufSize(FILE *stream) {
  return (int)(stream->_IO_buf_end - stream->_IO_buf_base);
}


x86 assembly (clang, -O0):
<getFileBufSize>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x8(%rbp),%rcx
sub    (%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getFileBufSize>:
mov    0x8(%rdi),%eax
sub    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i64, i64 }
define i32 @getFileBufSize(%struct.TYPE_3__* %0) {
%2 = alloca %struct.TYPE_3__*
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %2
%3 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i32 0, i32 1
%5 = load i64, i64* %4
%6 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2
%7 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %6, i32 0, i32 0
%8 = load i64, i64* %7
%9 = sub nsw i64 %5, %8
%10 = trunc i64 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i64, i64 }
define i32 @getFileBufSize(%struct.TYPE_3__* nocapture %0) {
%2 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 1
%3 = load i64, i64* %2
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 0
%5 = load i64, i64* %4
%6 = sub nsw i64 %3, %5
%7 = trunc i64 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void usage(int x) { exit(x); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
call   1030 <exit@plt>

LLVM IR (-O0):
define void @usage(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
define void @usage(i32 %0) {
%2 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char const *);
int hello(const char *string) { printf(string); }


x86 assembly (clang, -O0):
<hello>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello>:
jmp    1030 <printf@plt>

LLVM IR (-O0):
define i32 @hello(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @printf(i8* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @hello(i8* nocapture %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) %0)
ret i32 undef
}
/* Variables and functions */
int ceilf(float);
void ceil_w_s(float *source, int *dest) { *dest = ceilf(*source); }


x86 assembly (clang, -O0):
<ceil_w_s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <ceilf@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceil_w_s>:
push   %rbx
mov    %rsi,%rbx
movss  (%rdi),%xmm0
call   1030 <ceilf@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @ceil_w_s(float* %0, i32* %1) {
%3 = alloca float*
%4 = alloca i32*
store float* %0, float** %3
store i32* %1, i32** %4
%5 = load float*, float** %3
%6 = load float, float* %5
%7 = call i32 @ceilf(float %6)
%8 = load i32*, i32** %4
store i32 %7, i32* %8
ret void
}

LLVM IR (-O2):
define void @ceil_w_s(float* nocapture %0, i32* nocapture writeonly %1) {
%3 = load float, float* %0
%4 = tail call i32 @ceilf(float %3)
store i32 %4, i32* %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fscanf(int /*<<< orphan*/ *, char *, int *);
int main(int argc, char **argv) {
  FILE *fp = fopen(argv[1], "r");
  int num;
  fscanf(fp, "%d ", &num);
  assert(num == 5);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
lea    0xeb2(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xea0(%rip),%rsi
lea    -0x1c(%rbp),%rdx
call   1030 <fscanf@plt>
cmpl   $0x5,-0x1c(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
lea    0xec4(%rip),%rsi
call   1050 <fopen@plt>
lea    0xeba(%rip),%rsi
lea    0x4(%rsp),%rdx
mov    %rax,%rdi
call   1030 <fscanf@plt>
xor    %edi,%edi
cmpl   $0x5,0x4(%rsp)
sete   %dil
call   1040 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
@.str.1 = [4 x i8] c"%d \00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
%7 = load i8**, i8*** %4
%8 = getelementptr inbounds i8*, i8** %7, i64 1
%9 = load i8*, i8** %8
%10 = call i32* @fopen(i8* %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %10, i32** %5
%11 = load i32*, i32** %5
%12 = call i32 @fscanf(i32* %11, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32* %6)
%13 = load i32, i32* %6
%14 = icmp eq i32 %13, 5
%15 = zext i1 %14 to i32
%16 = call i32 @assert(i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
@.str.1 = [4 x i8] c"%d \00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = alloca i32
%4 = getelementptr inbounds i8*, i8** %1, i64 1
%5 = load i8*, i8** %4
%6 = tail call i32* @fopen(i8* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%7 = bitcast i32* %3 to i8*
%8 = call i32 @fscanf(i32* %6, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32* %3)
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 5
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(int, int /*<<< orphan*/ *);
void DumpWord(int i, FILE *D) {
  int hi = 0x0000FF & (i >> 8);
  int lo = 0x0000FF & i;
  fputc(hi, D);
  fputc(lo, D);
}


x86 assembly (clang, -O0):
<DumpWord>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
mov    -0x18(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <fputc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DumpWord>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%eax
movzbl %ah,%edi
movzbl %al,%ebp
call   1030 <fputc@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <fputc@plt>

LLVM IR (-O0):
define void @DumpWord(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%7 = load i32, i32* %3
%8 = ashr i32 %7, 8
%9 = and i32 255, %8
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = and i32 255, %10
store i32 %11, i32* %6
%12 = load i32, i32* %5
%13 = load i32*, i32** %4
%14 = call i32 @fputc(i32 %12, i32* %13)
%15 = load i32, i32* %6
%16 = load i32*, i32** %4
%17 = call i32 @fputc(i32 %15, i32* %16)
ret void
}

LLVM IR (-O2):
define void @DumpWord(i32 %0, i32* nocapture %1) {
%3 = lshr i32 %0, 8
%4 = and i32 %3, 255
%5 = and i32 %0, 255
%6 = tail call i32 @fputc(i32 %4, i32* %1)
%7 = tail call i32 @fputc(i32 %5, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ mf_movi_shutdown();
int /*<<< orphan*/ puts(char *);
void my_exit_handler(int s) {
  mf_movi_shutdown();
  puts("\nBye bye!");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<my_exit_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <mf_movi_shutdown@plt>
lea    0xeb7(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<my_exit_handler>:
push   %rax
xor    %eax,%eax
call   1040 <mf_movi_shutdown@plt>
lea    0xec1(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"\0ABye bye!\00"
@EXIT_SUCCESS = global i32 0
define void @my_exit_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @mf_movi_shutdown()
%4 = call i32 @puts(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @EXIT_SUCCESS
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@.str = [10 x i8] c"\0ABye bye!\00"
@EXIT_SUCCESS = global i32 0
define void @my_exit_handler(i32 %0) {
%2 = tail call i32 (...) @mf_movi_shutdown()
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @EXIT_SUCCESS
%5 = tail call i32 @exit(i32 %4)
unreachable
}
int Operand_bs8_encode(unsigned int *valp) {
  int error;
  error = (*valp & ~(0x1 << 3)) != 0;
  *valp = *valp >> 3;
  return error;
}


x86 assembly (clang, -O0):
<Operand_bs8_encode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xfffffff7,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
shr    $0x3,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_bs8_encode>:
mov    (%rdi),%ecx
xor    %eax,%eax
test   $0xfffffff7,%ecx
setne  %al
shr    $0x3,%ecx
mov    %ecx,(%rdi)
ret

LLVM IR (-O0):
define i32 @Operand_bs8_encode(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = and i32 %5, -9
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
store i32 %8, i32* %3
%9 = load i32*, i32** %2
%10 = load i32, i32* %9
%11 = lshr i32 %10, 3
%12 = load i32*, i32** %2
store i32 %11, i32* %12
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @Operand_bs8_encode(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, -9
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
%6 = lshr i32 %2, 3
store i32 %6, i32* %0
ret i32 %5
}
/* Variables and functions */
scalar_t__ fma(double, double, double);
float fmaf(float x, float y, float z) {
  return (float)fma((double)x, (double)y, (double)z);
}


x86 assembly (clang, -O0):
<fmaf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0x8(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
movss  -0xc(%rbp),%xmm2
cvtss2sd %xmm2,%xmm2
call   1030 <fma@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmaf>:
push   %rax
cvtss2sd %xmm0,%xmm0
cvtss2sd %xmm1,%xmm1
cvtss2sd %xmm2,%xmm2
call   1030 <fma@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @fmaf(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = fpext float %7 to double
%9 = load float, float* %5
%10 = fpext float %9 to double
%11 = load float, float* %6
%12 = fpext float %11 to double
%13 = call i64 @fma(double %8, double %10, double %12)
%14 = sitofp i64 %13 to float
ret float %14
}

LLVM IR (-O2):
define float @fmaf(float %0, float %1, float %2) {
%4 = fpext float %0 to double
%5 = fpext float %1 to double
%6 = fpext float %2 to double
%7 = tail call i64 @fma(double %4, double %5, double %6)
%8 = sitofp i64 %7 to float
ret float %8
}
char *os_strsignal(int n) {
  switch (n) {
  default:
    return "unrecognized signal number";
  }
}


x86 assembly (clang, -O0):
<os_strsignal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    0xef2(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_strsignal>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [27 x i8] c"unrecognized signal number\00"
define i8* @os_strsignal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %4 [
]
4: ; preds = %1
ret i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [27 x i8] c"unrecognized signal number\00"
define i8* @os_strsignal(i32 %0) {
ret i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0)
}