xunge/DecIR huggingface dataset:
/* Variables and functions */
int parse_service_path(char const *, size_t, char const *, char *, char *,
                       char const **, char const **);
int altera_parse_q12_service_path(const char *buf, size_t buflen,
                                  const char *cable, const char **begin,
                                  const char **end) {
  return parse_service_path(buf, buflen, cable, "{", "}", begin, end);
}


x86 assembly (clang, -O0):
<altera_parse_q12_service_path>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%r9
mov    -0x28(%rbp),%rax
lea    0xeb9(%rip),%rcx
lea    0xeb4(%rip),%r8
mov    %rax,(%rsp)
call   1030 <parse_service_path@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<altera_parse_q12_service_path>:
push   %rax
mov    %rcx,%r9
mov    %r8,(%rsp)
lea    0xee1(%rip),%rcx
lea    0xedc(%rip),%r8
call   1030 <parse_service_path@plt>
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"{\00"
@.str.1 = [2 x i8] c"}\00"
define i32 @altera_parse_q12_service_path(i8* %0, i64 %1, i8* %2, i8** %3, i8** %4) {
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i8**
%10 = alloca i8**
store i8* %0, i8** %6
store i64 %1, i64* %7
store i8* %2, i8** %8
store i8** %3, i8*** %9
store i8** %4, i8*** %10
%11 = load i8*, i8** %6
%12 = load i64, i64* %7
%13 = load i8*, i8** %8
%14 = load i8**, i8*** %9
%15 = load i8**, i8*** %10
%16 = call i32 @parse_service_path(i8* %11, i64 %12, i8* %13, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i8** %14, i8** %15)
ret i32 %16
}

LLVM IR (-O2):
@.str = [2 x i8] c"{\00"
@.str.1 = [2 x i8] c"}\00"
define i32 @altera_parse_q12_service_path(i8* %0, i64 %1, i8* %2, i8** %3, i8** %4) {
%6 = tail call i32 @parse_service_path(i8* %0, i64 %1, i8* %2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i8** %3, i8** %4)
ret i32 %6
}
void fg_process(struct cell_state *cell, short delta_q, short voltage,
                short cur, short temperature) {}


x86 assembly (clang, -O0):
<fg_process>:
push   %rbp
mov    %rsp,%rbp
mov    %r8w,%ax
mov    %rdi,-0x8(%rbp)
mov    %si,-0xa(%rbp)
mov    %dx,-0xc(%rbp)
mov    %cx,-0xe(%rbp)
mov    %ax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fg_process>:
ret

LLVM IR (-O0):
%struct.cell_state = type opaque
define void @fg_process(%struct.cell_state* %0, i16 signext %1, i16 signext %2, i16 signext %3, i16 signext %4) {
%6 = alloca %struct.cell_state*
%7 = alloca i16
%8 = alloca i16
%9 = alloca i16
%10 = alloca i16
store %struct.cell_state* %0, %struct.cell_state** %6
store i16 %1, i16* %7
store i16 %2, i16* %8
store i16 %3, i16* %9
store i16 %4, i16* %10
ret void
}

LLVM IR (-O2):
%struct.cell_state = type opaque
define void @fg_process(%struct.cell_state* nocapture %0, i16 signext %1, i16 signext %2, i16 signext %3, i16 signext %4) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void multipla_3(int number) {
  if (number == 0)
    printf("fim\n");
  else {
    multipla_3(number - 1);
    printf("%d\n", number);
    multipla_3(number - 1);
  }
}


x86 assembly (clang, -O0):
<multipla_3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1148 <multipla_3+0x28>
lea    0xec4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
jmp    116f <multipla_3+0x4f>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1040 <multipla_3@plt>
mov    -0x4(%rbp),%esi
lea    0xea8(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1040 <multipla_3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<multipla_3>:
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
je     1169 <multipla_3+0x39>
mov    %edi,%ebx
lea    0xebf(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    -0x1(%rbx),%edi
call   1050 <multipla_3@plt>
mov    %r14,%rdi
mov    %ebx,%esi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0xffffffff,%ebx
jne    1150 <multipla_3+0x20>
lea    0xe94(%rip),%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"fim\0A\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define void @multipla_3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %14
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 %8, 1
%10 = load i32, i32* %2
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %10)
%12 = load i32, i32* %2
%13 = sub nsw i32 %12, 1
br label %14
14: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
@.str.1 = [4 x i8] c"%d\0A\00"
@str = [4 x i8] c"fim\00"
define void @multipla_3(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %5, %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret void
5: ; preds = %1, %5
%6 = phi i32 [ %7, %5 ], [ %0, %1 ]
%7 = add nsw i32 %6, -1
tail call void @multipla_3(i32 %7)
%8 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %6)
%9 = icmp eq i32 %7, 0
br i1 %9, label %3, label %5
}
/* Type definitions */
typedef int x;
typedef int uint32_t;

/* Variables and functions */
const uint32_t change_endian32(uint32_t x) {
  return (((x) << 24) | ((x) >> 24) | (((x)&0x0000ff00) << 8) |
          (((x)&0x00ff0000) >> 8));
}


x86 assembly (clang, -O0):
<change_endian32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x18,%eax
mov    -0x4(%rbp),%ecx
sar    $0x18,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<change_endian32>:
mov    %edi,%eax
shl    $0x18,%eax
mov    %edi,%ecx
sar    $0x18,%ecx
or     %eax,%ecx
mov    %edi,%eax
shl    $0x8,%eax
and    $0xff0000,%eax
or     %ecx,%eax
shr    $0x8,%edi
and    $0xff00,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @change_endian32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 24
%5 = load i32, i32* %2
%6 = ashr i32 %5, 24
%7 = or i32 %4, %6
%8 = load i32, i32* %2
%9 = and i32 %8, 65280
%10 = shl i32 %9, 8
%11 = or i32 %7, %10
%12 = load i32, i32* %2
%13 = and i32 %12, 16711680
%14 = ashr i32 %13, 8
%15 = or i32 %11, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @change_endian32(i32 %0) {
%2 = shl i32 %0, 24
%3 = ashr i32 %0, 24
%4 = or i32 %2, %3
%5 = shl i32 %0, 8
%6 = and i32 %5, 16711680
%7 = or i32 %4, %6
%8 = lshr i32 %0, 8
%9 = and i32 %8, 65280
%10 = or i32 %7, %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ logger(int, int /*<<< orphan*/, char *, char const *);
int check_var(const void *val, const char *message) {
  if (val != NULL)
    return 0;
  logger(-1, 0, "%s", message);
  return 1;
}


x86 assembly (clang, -O0):
<check_var>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1137 <check_var+0x27>
movl   $0x0,-0x4(%rbp)
jmp    1155 <check_var+0x45>
mov    -0x18(%rbp),%rcx
mov    $0xffffffff,%edi
xor    %esi,%esi
lea    0xeb7(%rip),%rdx
call   1030 <logger@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_var>:
xor    %eax,%eax
test   %rdi,%rdi
je     1118 <check_var+0x8>
ret
push   %rax
mov    %rsi,%rcx
lea    0xedd(%rip),%rdx
mov    $0xffffffff,%edi
xor    %esi,%esi
call   1030 <logger@plt>
mov    $0x1,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @check_var(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %12
9: ; preds = %2
%10 = load i8*, i8** %5
%11 = call i32 @logger(i32 -1, i32 0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %10)
store i32 1, i32* %3
br label %12
12: ; preds = %9, %8
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @check_var(i8* readnone %0, i8* %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @logger(i32 -1, i32 0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
br label %6
6: ; preds = %2, %4
%7 = phi i32 [ 1, %4 ], [ 0, %2 ]
ret i32 %7
}
void wycc_chunk_rebal(int payl, void **p, void **chunk, long at, long deep) {
  return;
}


x86 assembly (clang, -O0):
<wycc_chunk_rebal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wycc_chunk_rebal>:
ret

LLVM IR (-O0):
define void @wycc_chunk_rebal(i32 %0, i8** %1, i8** %2, i64 %3, i64 %4) {
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i8**
%9 = alloca i64
%10 = alloca i64
store i32 %0, i32* %6
store i8** %1, i8*** %7
store i8** %2, i8*** %8
store i64 %3, i64* %9
store i64 %4, i64* %10
ret void
}

LLVM IR (-O2):
define void @wycc_chunk_rebal(i32 %0, i8** nocapture %1, i8** nocapture %2, i64 %3, i64 %4) {
ret void
}
void foo_2_2_2_1_1_1_1_2_1() {}


x86 assembly (clang, -O0):
<foo_2_2_2_1_1_1_1_2_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_2_2_1_1_1_1_2_1>:
ret

LLVM IR (-O0):
define void @foo_2_2_2_1_1_1_1_2_1() {
ret void
}

LLVM IR (-O2):
define void @foo_2_2_2_1_1_1_1_2_1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
void diep(char *s) {
  perror(s);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<diep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<diep>:
push   %rax
call   1030 <perror@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define void @diep(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define void @diep(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
void spl_debug_dumpstack(struct task_struct *tsk) { return; }


x86 assembly (clang, -O0):
<spl_debug_dumpstack>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<spl_debug_dumpstack>:
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
define void @spl_debug_dumpstack(%struct.task_struct* %0) {
%2 = alloca %struct.task_struct*
store %struct.task_struct* %0, %struct.task_struct** %2
ret void
}

LLVM IR (-O2):
%struct.task_struct = type opaque
define void @spl_debug_dumpstack(%struct.task_struct* nocapture %0) {
ret void
}
long RB_CloseFile(void *pbUserData, long wHandle) {
  int ret = (long)(((unsigned long)((1)) << 31) | (211));
  printf("%s: wHandle = %ld\n", __func__, wHandle);
  if (wHandle >= 0)
    ret = close(wHandle);
  if (ret == 0)
    return (long)(((unsigned long)((0)) << 31) | (0));
  return (long)(((unsigned long)((1)) << 31) | (211));
}


x86 assembly (clang, -O0):
<RB_CloseFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movl   $0x800000d3,-0x1c(%rbp)
mov    -0x18(%rbp),%rdx
lea    0xebe(%rip),%rdi
lea    0xeca(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
cmpq   $0x0,-0x18(%rbp)
jl     1169 <RB_CloseFile+0x49>
mov    -0x18(%rbp),%rdi
mov    $0x0,%al
call   1040 <close@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jne    1180 <RB_CloseFile+0x60>
movq   $0x0,-0x8(%rbp)
jmp    1189 <RB_CloseFile+0x69>
mov    $0x800000d3,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RB_CloseFile>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    $0x800000d3,%r14d
lea    0xecb(%rip),%rdi
lea    0xed7(%rip),%rsi
mov    %rbx,%rdx
xor    %eax,%eax
call   1030 <printf@plt>
test   %rbx,%rbx
js     115e <RB_CloseFile+0x3e>
xor    %r15d,%r15d
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <close@plt>
test   %eax,%eax
cmove  %r15,%r14
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [19 x i8] c"%s: wHandle = %ld\0A\00"
@__func__.RB_CloseFile = [13 x i8] c"RB_CloseFile\00"
define i64 @RB_CloseFile(i8* %0, i64 %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 -2147483437, i32* %6
%7 = load i64, i64* %5
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__func__.RB_CloseFile, i64 0, i64 0), i64 %7)
%9 = load i64, i64* %5
%10 = icmp sge i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i64, i64* %5
%13 = call i32 (i64, ...) bitcast (i32 (...)* @close to i32 (i64, ...)*)(i64 %12)
store i32 %13, i32* %6
br label %14
14: ; preds = %11, %2
%15 = load i32, i32* %6
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %14
store i64 0, i64* %3
br label %19
18: ; preds = %14
store i64 2147483859, i64* %3
br label %19
19: ; preds = %18, %17
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
@.str = [19 x i8] c"%s: wHandle = %ld\0A\00"
@__func__.RB_CloseFile = [13 x i8] c"RB_CloseFile\00"
define i64 @RB_CloseFile(i8* nocapture readnone %0, i64 %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__func__.RB_CloseFile, i64 0, i64 0), i64 %1)
%4 = icmp sgt i64 %1, -1
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i32 (i64, ...) bitcast (i32 (...)* @close to i32 (i64, ...)*)(i64 %1)
%7 = icmp eq i32 %6, 0
%8 = select i1 %7, i64 0, i64 2147483859
br label %9
9: ; preds = %5, %2
%10 = phi i64 [ 2147483859, %2 ], [ %8, %5 ]
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ puts(char *);
void displayVersion(void) {
  puts("tsp-ga: v0.9");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<displayVersion>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<displayVersion>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"tsp-ga: v0.9\00"
@EXIT_SUCCESS = global i32 0
define void @displayVersion() {
%1 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = call i32 @exit(i32 %2)
unreachable
}

LLVM IR (-O2):
@.str = [13 x i8] c"tsp-ga: v0.9\00"
@EXIT_SUCCESS = global i32 0
define void @displayVersion() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
%3 = tail call i32 @exit(i32 %2)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ dhcp_packet(int, char *, int /*<<< orphan*/ *,
                               int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                               char *, char *);
void dhcp_decline(char *ipaddr, char *gwaddr, char *hardware) {
  dhcp_packet(4, ipaddr, NULL, NULL, NULL, gwaddr, hardware);
}


x86 assembly (clang, -O0):
<dhcp_decline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%r9
mov    -0x18(%rbp),%rax
mov    $0x4,%edi
xor    %ecx,%ecx
mov    %ecx,%r8d
mov    %r8,%rdx
mov    %r8,%rcx
mov    %rax,(%rsp)
call   1030 <dhcp_packet@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dhcp_decline>:
push   %rax
mov    %rsi,%r9
mov    %rdi,%rsi
mov    %rdx,(%rsp)
mov    $0x4,%edi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
call   1030 <dhcp_packet@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @dhcp_decline(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @dhcp_packet(i32 4, i8* %7, i32* null, i32* null, i32* null, i8* %8, i8* %9)
ret void
}

LLVM IR (-O2):
define void @dhcp_decline(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @dhcp_packet(i32 4, i8* %0, i32* null, i32* null, i32* null, i8* %1, i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ endgraphics();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int quit(int sig) {
  endgraphics();
  exit(0);
}


x86 assembly (clang, -O0):
<quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <endgraphics@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<quit>:
push   %rax
xor    %eax,%eax
call   1030 <endgraphics@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @quit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @endgraphics()
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @quit(i32 %0) {
%2 = tail call i32 (...) @endgraphics()
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
void *realloc(void *, size_t);
void *clad_xrealloc(void **ptrptr, size_t size) {
  void *aid;
  if (!ptrptr)
    return NULL;
  aid = realloc(*ptrptr, size);
  if (aid) {
    (*ptrptr) = aid;
  }
  return aid;
}


x86 assembly (clang, -O0):
<clad_xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1138 <clad_xrealloc+0x28>
movq   $0x0,-0x8(%rbp)
jmp    116a <clad_xrealloc+0x5a>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <realloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     1162 <clad_xrealloc+0x52>
mov    -0x20(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clad_xrealloc>:
push   %rbx
test   %rdi,%rdi
je     112b <clad_xrealloc+0x1b>
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <realloc@plt>
test   %rax,%rax
je     112b <clad_xrealloc+0x1b>
mov    %rax,(%rbx)
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @clad_xrealloc(i8** %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8**
%5 = alloca i64
%6 = alloca i8*
store i8** %0, i8*** %4
store i64 %1, i64* %5
%7 = load i8**, i8*** %4
%8 = icmp ne i8** %7, null
br i1 %8, label %10, label %9
9: ; preds = %2
store i8* null, i8** %3
br label %22
10: ; preds = %2
%11 = load i8**, i8*** %4
%12 = load i8*, i8** %11
%13 = load i64, i64* %5
%14 = call i8* @realloc(i8* %12, i64 %13)
store i8* %14, i8** %6
%15 = load i8*, i8** %6
%16 = icmp ne i8* %15, null
br i1 %16, label %17, label %20
17: ; preds = %10
%18 = load i8*, i8** %6
%19 = load i8**, i8*** %4
store i8* %18, i8** %19
br label %20
20: ; preds = %17, %10
%21 = load i8*, i8** %6
store i8* %21, i8** %3
br label %22
22: ; preds = %20, %9
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @clad_xrealloc(i8** %0, i64 %1) {
%3 = icmp eq i8** %0, null
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = load i8*, i8** %0
%6 = tail call i8* @realloc(i8* %5, i64 %1)
%7 = icmp eq i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %4
store i8* %6, i8** %0
br label %9
9: ; preds = %4, %8, %2
%10 = phi i8* [ null, %2 ], [ %6, %8 ], [ null, %4 ]
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ fnmatch(char const *, char const *, int /*<<< orphan*/);
int glob_match(const char *pat, const char *str) {
  return !fnmatch(pat, str, 0);
}


x86 assembly (clang, -O0):
<glob_match>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <fnmatch@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glob_match>:
push   %rax
xor    %edx,%edx
call   1030 <fnmatch@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @glob_match(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @fnmatch(i8* %5, i8* %6, i32 0)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @glob_match(i8* %0, i8* %1) {
%3 = tail call i32 @fnmatch(i8* %0, i8* %1, i32 0)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
int init_new_context(struct task_struct *tsk, struct mm_struct *mm) {
  return 0;
}


x86 assembly (clang, -O0):
<init_new_context>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_new_context>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.task_struct = type opaque
%struct.mm_struct = type opaque
define i32 @init_new_context(%struct.task_struct* %0, %struct.mm_struct* %1) {
%3 = alloca %struct.task_struct*
%4 = alloca %struct.mm_struct*
store %struct.task_struct* %0, %struct.task_struct** %3
store %struct.mm_struct* %1, %struct.mm_struct** %4
ret i32 0
}

LLVM IR (-O2):
%struct.task_struct = type opaque
%struct.mm_struct = type opaque
define i32 @init_new_context(%struct.task_struct* nocapture readnone %0, %struct.mm_struct* nocapture readnone %1) {
ret i32 0
}
int kill(p, s) { return (0); }


x86 assembly (clang, -O0):
<kill>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kill>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @kill(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @kill(i32 %0, i32 %1) {
ret i32 0
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int bpf_rand_mask(int);
uint64_t bpf_rand_u56(int shift) {
  return bpf_rand_mask((0xffffffffffffffULL)) << shift;
}


x86 assembly (clang, -O0):
<bpf_rand_u56>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%edi
call   1030 <bpf_rand_mask@plt>
mov    -0x4(%rbp),%ecx
shl    %cl,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_rand_u56>:
push   %rbx
mov    %edi,%ebx
mov    $0xffffffff,%edi
call   1030 <bpf_rand_mask@plt>
mov    %ebx,%ecx
shl    %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @bpf_rand_u56(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @bpf_rand_mask(i32 -1)
%4 = load i32, i32* %2
%5 = shl i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @bpf_rand_u56(i32 %0) {
%2 = tail call i32 @bpf_rand_mask(i32 -1)
%3 = shl i32 %2, %0
ret i32 %3
}
/* Type definitions */
typedef int uint32_t;
typedef int volatile int32_t;

/* Variables and functions */
int32_t ADCSequenceUnderflow(uint32_t ui32Base, uint32_t ui32SequenceNum) {
  ;
  ;
  return ((*((volatile uint32_t *)(ui32Base + 0x00000018))) &
          (1 << ui32SequenceNum));
}


x86 assembly (clang, -O0):
<ADCSequenceUnderflow>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x18,%eax
cltq
mov    (%rax),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCSequenceUnderflow>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %edi,%rcx
and    0x18(%rcx),%eax
ret

LLVM IR (-O0):
define i32 @ADCSequenceUnderflow(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 24
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = load i32, i32* %4
%11 = shl i32 1, %10
%12 = and i32 %9, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @ADCSequenceUnderflow(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 24
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = shl nuw i32 1, %1
%8 = and i32 %6, %7
ret i32 %8
}
int bics_si_test(int a, int b) {
  if (a & ~b)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<bics_si_test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     112a <bics_si_test+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1131 <bics_si_test+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bics_si_test>:
not    %esi
xor    %eax,%eax
test   %edi,%esi
setne  %al
ret

LLVM IR (-O0):
define i32 @bics_si_test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = xor i32 %7, -1
%9 = and i32 %6, %8
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 1, i32* %3
br label %13
12: ; preds = %2
store i32 0, i32* %3
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @bics_si_test(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = and i32 %3, %0
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ zperr(char *);
garbitch() { zperr("Garbled data subpacket"); }


x86 assembly (clang, -O0):
<garbitch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <zperr@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<garbitch>:
lea    0xee9(%rip),%rdi
jmp    1030 <zperr@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"Garbled data subpacket\00"
define i32 @garbitch() {
%1 = alloca i32
%2 = call i32 @zperr(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [23 x i8] c"Garbled data subpacket\00"
define i32 @garbitch() {
%1 = tail call i32 @zperr(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
void py_vec_func(double *dst, double (*func)(double), const double *arg,
                 const long size) {
  for (long i = 0; i < size; ++i)
    dst[i] = func(arg[i]);
}


x86 assembly (clang, -O0):
<py_vec_func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x20(%rbp),%rax
jge    115f <py_vec_func+0x5f>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    -0x28(%rbp),%rdx
movsd  (%rcx,%rdx,8),%xmm0
call   *%rax
mov    -0x8(%rbp),%rax
mov    -0x28(%rbp),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x28(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x28(%rbp)
jmp    1120 <py_vec_func+0x20>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<py_vec_func>:
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
test   %rcx,%rcx
jle    1139 <py_vec_func+0x39>
mov    %rcx,%r12
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%r13
xor    %ebx,%ebx
nopl   0x0(%rax)
movsd  (%r14,%rbx,8),%xmm0
call   *%r15
movsd  %xmm0,0x0(%r13,%rbx,8)
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1120 <py_vec_func+0x20>
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @py_vec_func(double* %0, double (double)* %1, double* %2, i64 %3) {
%5 = alloca double*
%6 = alloca double (double)*
%7 = alloca double*
%8 = alloca i64
%9 = alloca i64
store double* %0, double** %5
store double (double)* %1, double (double)** %6
store double* %2, double** %7
store i64 %3, i64* %8
store i64 0, i64* %9
br label %10
10: ; preds = %24, %4
%11 = load i64, i64* %9
%12 = load i64, i64* %8
%13 = icmp slt i64 %11, %12
br i1 %13, label %14, label %27
14: ; preds = %10
%15 = load double (double)*, double (double)** %6
%16 = load double*, double** %7
%17 = load i64, i64* %9
%18 = getelementptr inbounds double, double* %16, i64 %17
%19 = load double, double* %18
%20 = call double %15(double %19)
%21 = load double*, double** %5
%22 = load i64, i64* %9
%23 = getelementptr inbounds double, double* %21, i64 %22
store double %20, double* %23
br label %24
24: ; preds = %14
%25 = load i64, i64* %9
%26 = add nsw i64 %25, 1
store i64 %26, i64* %9
br label %10
27: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @py_vec_func(double* nocapture writeonly %0, double (double)* nocapture %1, double* nocapture %2, i64 %3) {
%5 = icmp sgt i64 %3, 0
br i1 %5, label %7, label %6
6: ; preds = %7, %4
ret void
7: ; preds = %4, %7
%8 = phi i64 [ %13, %7 ], [ 0, %4 ]
%9 = getelementptr inbounds double, double* %2, i64 %8
%10 = load double, double* %9
%11 = tail call double %1(double %10)
%12 = getelementptr inbounds double, double* %0, i64 %8
store double %11, double* %12
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %3
br i1 %14, label %6, label %7
}
void outb(unsigned short port, unsigned char value) {
  asm volatile("outb %%al,(%%dx)" ::"d"(port), "a"(value));
}


x86 assembly (clang, -O0):
<outb>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x3(%rbp),%al
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outb>:
mov    %esi,%eax
mov    %edi,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outb(i16 zeroext %0, i8 zeroext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i16, i16* %3
%6 = load i8, i8* %4
ret void
}

LLVM IR (-O2):
define void @outb(i16 zeroext %0, i8 zeroext %1) {
tail call void asm sideeffect "outb %al,(%dx)", "{dx},{ax},~{dirflag},~{fpsr},~{flags}"(i16 %0, i8 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int _mm_cvtsd_f64(int /*<<< orphan*/);
int /*<<< orphan*/ _mm_unpackhi_pd(int /*<<< orphan*/, int /*<<< orphan*/);
int sum_m128d(__m128d vec) {
  return _mm_cvtsd_f64(vec) + _mm_cvtsd_f64(_mm_unpackhi_pd(vec, vec));
}


x86 assembly (clang, -O0):
<sum_m128d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_cvtsd_f64@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1040 <_mm_unpackhi_pd@plt>
mov    %eax,%edi
call   1030 <_mm_cvtsd_f64@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_m128d>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1030 <_mm_cvtsd_f64@plt>
mov    %eax,%ebp
mov    %ebx,%edi
mov    %ebx,%esi
call   1040 <_mm_unpackhi_pd@plt>
mov    %eax,%edi
call   1030 <_mm_cvtsd_f64@plt>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @sum_m128d(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_cvtsd_f64(i32 %3)
%5 = load i32, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @_mm_unpackhi_pd(i32 %5, i32 %6)
%8 = call i32 @_mm_cvtsd_f64(i32 %7)
%9 = add nsw i32 %4, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @sum_m128d(i32 %0) {
%2 = tail call i32 @_mm_cvtsd_f64(i32 %0)
%3 = tail call i32 @_mm_unpackhi_pd(i32 %0, i32 %0)
%4 = tail call i32 @_mm_cvtsd_f64(i32 %3)
%5 = add nsw i32 %4, %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ console_tx_hex32(unsigned int);
void print_spew_hex32(unsigned int value) { console_tx_hex32(value); }


x86 assembly (clang, -O0):
<print_spew_hex32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <console_tx_hex32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_spew_hex32>:
jmp    1030 <console_tx_hex32@plt>

LLVM IR (-O0):
define void @print_spew_hex32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @console_tx_hex32(i32 %3)
ret void
}

LLVM IR (-O2):
define void @print_spew_hex32(i32 %0) {
%2 = tail call i32 @console_tx_hex32(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ redecl2();
void use114() { redecl2(); }


x86 assembly (clang, -O0):
<use114>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <redecl2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<use114>:
xor    %eax,%eax
jmp    1030 <redecl2@plt>

LLVM IR (-O0):
define void @use114() {
%1 = call i32 (...) @redecl2()
ret void
}

LLVM IR (-O2):
define void @use114() {
%1 = tail call i32 (...) @redecl2()
ret void
}
int f(int (*p)[], int (*q)[3]) { return p < q; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmp    %rcx,%rax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
cmp    %rdi,%rsi
seta   %al
ret

LLVM IR (-O0):
define i32 @f([0 x i32]* %0, [3 x i32]* %1) {
%3 = alloca [0 x i32]*
%4 = alloca [3 x i32]*
store [0 x i32]* %0, [0 x i32]** %3
store [3 x i32]* %1, [3 x i32]** %4
%5 = load [0 x i32]*, [0 x i32]** %3
%6 = load [3 x i32]*, [3 x i32]** %4
%7 = bitcast [3 x i32]* %6 to [0 x i32]*
%8 = icmp ult [0 x i32]* %5, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @f([0 x i32]* readnone %0, [3 x i32]* readnone %1) {
%3 = bitcast [3 x i32]* %1 to [0 x i32]*
%4 = icmp ugt [0 x i32]* %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
void skip_whitespace(const char **j) {
  while (**j == ' ' || **j == '\t' || **j == '\n' || **j == '\r')
    *j += 1;
}


x86 assembly (clang, -O0):
<skip_whitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x9(%rbp)
je     1163 <skip_whitespace+0x63>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x9(%rbp)
je     1163 <skip_whitespace+0x63>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0xa,%ecx
mov    %al,-0x9(%rbp)
je     1163 <skip_whitespace+0x63>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%eax
cmp    $0xd,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1173 <skip_whitespace+0x73>
jmp    1186 <skip_whitespace+0x86>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
jmp    1108 <skip_whitespace+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_whitespace>:
mov    (%rdi),%rax
add    $0x1,%rax
movabs $0x100002600,%rcx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl -0x1(%rax),%edx
cmp    $0x20,%rdx
ja     1139 <skip_whitespace+0x39>
bt     %rdx,%rcx
jae    1139 <skip_whitespace+0x39>
mov    %rax,(%rdi)
add    $0x1,%rax
jmp    1120 <skip_whitespace+0x20>
ret

LLVM IR (-O0):
define void @skip_whitespace(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
br label %3
3: ; preds = %29, %1
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 32
br i1 %8, label %27, label %9
9: ; preds = %3
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 9
br i1 %14, label %27, label %15
15: ; preds = %9
%16 = load i8**, i8*** %2
%17 = load i8*, i8** %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %19, 10
br i1 %20, label %27, label %21
21: ; preds = %15
%22 = load i8**, i8*** %2
%23 = load i8*, i8** %22
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 13
br label %27
27: ; preds = %21, %15, %9, %3
%28 = phi i1 [ true, %15 ], [ true, %9 ], [ true, %3 ], [ %26, %21 ]
br i1 %28, label %29, label %33
29: ; preds = %27
%30 = load i8**, i8*** %2
%31 = load i8*, i8** %30
%32 = getelementptr inbounds i8, i8* %31, i64 1
store i8* %32, i8** %30
br label %3
33: ; preds = %27
ret void
}

LLVM IR (-O2):
define void @skip_whitespace(i8** nocapture %0) {
%2 = load i8*, i8** %0
br label %3
3: ; preds = %6, %1
%4 = phi i8* [ %7, %6 ], [ %2, %1 ]
%5 = load i8, i8* %4
switch i8 %5, label %8 [
i8 32, label %6
i8 9, label %6
i8 10, label %6
i8 13, label %6
]
6: ; preds = %3, %3, %3, %3
%7 = getelementptr inbounds i8, i8* %4, i64 1
store i8* %7, i8** %0
br label %3
8: ; preds = %3
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
extern uint16_t MakeWord(uint8_t low_bits, uint8_t high_bits) {
  return (high_bits << 8) + low_bits;
}


x86 assembly (clang, -O0):
<MakeWord>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MakeWord>:
shl    $0x8,%esi
lea    (%rsi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @MakeWord(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = load i32, i32* %3
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @MakeWord(i32 %0, i32 %1) {
%3 = shl i32 %1, 8
%4 = add nsw i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int MAP_HUGETLB;
int /*<<< orphan*/ mmap_chunks_lower(int, int);
int /*<<< orphan*/ printf(char *);
void alloc_16g_below_hint() {
  printf("Allocating 16G chunks < 128TB \n");
  mmap_chunks_lower(1, (MAP_HUGETLB | (34 << 26)));
}


x86 assembly (clang, -O0):
<alloc_16g_below_hint>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
or     $0x88000000,%esi
mov    $0x1,%edi
call   1040 <mmap_chunks_lower@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_16g_below_hint>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ebc(%rip),%rax
mov    $0x88000000,%esi
or     (%rax),%esi
mov    $0x1,%edi
pop    %rax
jmp    1040 <mmap_chunks_lower@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"Allocating 16G chunks < 128TB \0A\00"
@MAP_HUGETLB = global i32 0
define void @alloc_16g_below_hint() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @MAP_HUGETLB
%3 = or i32 %2, -2013265920
%4 = call i32 @mmap_chunks_lower(i32 1, i32 %3)
ret void
}

LLVM IR (-O2):
@MAP_HUGETLB = global i32 0
@str = [31 x i8] c"Allocating 16G chunks < 128TB \00"
define void @alloc_16g_below_hint() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
%2 = load i32, i32* @MAP_HUGETLB
%3 = or i32 %2, -2013265920
%4 = tail call i32 @mmap_chunks_lower(i32 1, i32 %3)
ret void
}
/* Variables and functions */
int acos(int /*<<< orphan*/);
double getPI() { return 2 * acos(0); }


x86 assembly (clang, -O0):
<getPI>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <acos@plt>
shl    $0x1,%eax
cvtsi2sd %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<getPI>:
push   %rax
xor    %edi,%edi
call   1030 <acos@plt>
add    %eax,%eax
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @getPI() {
%1 = call i32 @acos(i32 0)
%2 = mul nsw i32 2, %1
%3 = sitofp i32 %2 to double
ret double %3
}

LLVM IR (-O2):
define double @getPI() {
%1 = tail call i32 @acos(i32 0)
%2 = shl nsw i32 %1, 1
%3 = sitofp i32 %2 to double
ret double %3
}
/* Variables and functions */
float const simplexRawNoise(float const, float const, float const);
float simplexScaledRawNoise(const float loBound, const float hiBound,
                            const float x, const float y, const float z) {
  return simplexRawNoise(x, y, z) * (hiBound - loBound) / 2 +
         (hiBound + loBound) / 2;
}


x86 assembly (clang, -O0):
<simplexScaledRawNoise>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
movss  -0x14(%rbp),%xmm2
call   1030 <simplexRawNoise@plt>
movss  -0x8(%rbp),%xmm1
subss  -0x4(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xea5(%rip),%xmm1
divss  %xmm1,%xmm0
movss  -0x8(%rbp),%xmm1
addss  -0x4(%rbp),%xmm1
movss  0xe8f(%rip),%xmm2
divss  %xmm2,%xmm1
addss  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simplexScaledRawNoise>:
push   %rax
movss  %xmm1,(%rsp)
movss  %xmm0,0x4(%rsp)
movaps %xmm2,%xmm0
movaps %xmm3,%xmm1
movaps %xmm4,%xmm2
call   1030 <simplexRawNoise@plt>
movss  (%rsp),%xmm3
movaps %xmm3,%xmm1
movss  0x4(%rsp),%xmm2
subss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  0xeb8(%rip),%xmm1
mulss  %xmm1,%xmm0
addss  %xmm3,%xmm2
mulss  %xmm1,%xmm2
addss  %xmm2,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @simplexScaledRawNoise(float %0, float %1, float %2, float %3, float %4) {
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
store float %0, float* %6
store float %1, float* %7
store float %2, float* %8
store float %3, float* %9
store float %4, float* %10
%11 = load float, float* %8
%12 = load float, float* %9
%13 = load float, float* %10
%14 = call float @simplexRawNoise(float %11, float %12, float %13)
%15 = load float, float* %7
%16 = load float, float* %6
%17 = fsub float %15, %16
%18 = fmul float %14, %17
%19 = fdiv float %18, 2.000000e+00
%20 = load float, float* %7
%21 = load float, float* %6
%22 = fadd float %20, %21
%23 = fdiv float %22, 2.000000e+00
%24 = fadd float %19, %23
ret float %24
}

LLVM IR (-O2):
define float @simplexScaledRawNoise(float %0, float %1, float %2, float %3, float %4) {
%6 = tail call float @simplexRawNoise(float %2, float %3, float %4)
%7 = fsub float %1, %0
%8 = fmul float %7, %6
%9 = fmul float %8, 5.000000e-01
%10 = fadd float %0, %1
%11 = fmul float %10, 5.000000e-01
%12 = fadd float %11, %9
ret float %12
}
int free_ram(void) {
  extern int __heap_start, *__brkval;
  int v;
  return (int)&v - (__brkval == 0 ? (int)&__heap_start : (int)__brkval);
}


x86 assembly (clang, -O0):
<free_ram>:
push   %rbp
mov    %rsp,%rbp
lea    -0x4(%rbp),%rax
mov    %eax,-0x8(%rbp)
mov    0x2ed6(%rip),%rax
cmpq   $0x0,(%rax)
jne    112b <free_ram+0x2b>
mov    0x2eb5(%rip),%rax
mov    %eax,-0xc(%rbp)
jmp    1138 <free_ram+0x38>
mov    0x2eb6(%rip),%rax
mov    (%rax),%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_ram>:
lea    -0x4(%rsp),%rax
mov    0x2edc(%rip),%rcx
mov    (%rcx),%rcx
test   %rcx,%rcx
jne    111a <free_ram+0x1a>
mov    0x2ebe(%rip),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
@__brkval = external global i32*
@__heap_start = external global i32
define i32 @free_ram() {
%1 = alloca i32
%2 = ptrtoint i32* %1 to i32
%3 = load i32*, i32** @__brkval
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %6
5: ; preds = %0
br label %9
6: ; preds = %0
%7 = load i32*, i32** @__brkval
%8 = ptrtoint i32* %7 to i32
br label %9
9: ; preds = %6, %5
%10 = phi i32 [ ptrtoint (i32* @__heap_start to i32), %5 ], [ %8, %6 ]
%11 = sub nsw i32 %2, %10
ret i32 %11
}

LLVM IR (-O2):
@__brkval = external global i32*
@__heap_start = external global i32
define i32 @free_ram() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = ptrtoint i32* %1 to i64
%4 = trunc i64 %3 to i32
%5 = load i32*, i32** @__brkval
%6 = icmp eq i32* %5, null
%7 = ptrtoint i32* %5 to i64
%8 = trunc i64 %7 to i32
%9 = select i1 %6, i32 ptrtoint (i32* @__heap_start to i32), i32 %8
%10 = sub nsw i32 %4, %9
ret i32 %10
}
void Dummy(void) {
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<Dummy>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <Dummy+0x9>
jmp    1109 <Dummy+0x9>

x86 assembly (clang, -O2):
<Dummy>:
jmp    1100 <Dummy>

LLVM IR (-O0):
define void @Dummy() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @Dummy() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
scalar_t__ EOF;
scalar_t__ getchar();
int /*<<< orphan*/ printf(char *, int);
int main() {
  int V = (getchar() != EOF);
  printf("%d\n", V);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    0x2eab(%rip),%rcx
cmp    (%rcx),%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    0x2eb9(%rip),%rcx
xor    %esi,%esi
cmp    (%rcx),%rax
setne  %sil
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@EOF = global i64 0
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i64 (...) @getchar()
%4 = load i64, i64* @EOF
%5 = icmp ne i64 %3, %4
%6 = zext i1 %5 to i32
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@EOF = global i64 0
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i64 (...) @getchar()
%2 = load i64, i64* @EOF
%3 = icmp ne i64 %1, %2
%4 = zext i1 %3 to i32
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Variables and functions */
void getCandidates(bool *candidates, int *c) {
  candidates[0] = true;
  candidates[1] = false;
  *c = 2;
}


x86 assembly (clang, -O0):
<getCandidates>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0x4(%rax)
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCandidates>:
movq   $0x1,(%rdi)
movl   $0x2,(%rsi)
ret

LLVM IR (-O0):
define void @getCandidates(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 0
store i32 1, i32* %6
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 1
store i32 0, i32* %8
%9 = load i32*, i32** %4
store i32 2, i32* %9
ret void
}

LLVM IR (-O2):
define void @getCandidates(i32* nocapture writeonly %0, i32* nocapture writeonly %1) {
store i32 1, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
store i32 0, i32* %3
store i32 2, i32* %1
ret void
}