xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isspace(int);
void t_isspace_0x0c() {
  Assert_real((isspace(12)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              65, ("isspace should be 1 for 0x0c"));
}


x86 assembly (clang, -O0):
<t_isspace_0x0c>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc,%edi
call   1030 <isspace@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x41,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x0c>:
push   %rax
mov    $0xc,%edi
call   1030 <isspace@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x41,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 1 for 0x0c\00"
define void @t_isspace_0x0c() {
%1 = call i32 @isspace(i32 12)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 65, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 1 for 0x0c\00"
define void @t_isspace_0x0c() {
%1 = tail call i32 @isspace(i32 12)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 65, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ strcmp(char *, void *);
int check_push(size_t *idx, size_t *end, void *item, void *strings) {
  return strcmp(((char **)strings)[*idx], item) != 0;
  (void)end;
}


x86 assembly (clang, -O0):
<check_push>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%rcx
mov    (%rax,%rcx,8),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_push>:
push   %rax
mov    (%rdi),%rax
mov    (%rcx,%rax,8),%rdi
mov    %rdx,%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @check_push(i64* %0, i64* %1, i8* %2, i8* %3) {
%5 = alloca i64*
%6 = alloca i64*
%7 = alloca i8*
%8 = alloca i8*
store i64* %0, i64** %5
store i64* %1, i64** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %8
%10 = bitcast i8* %9 to i8**
%11 = load i64*, i64** %5
%12 = load i64, i64* %11
%13 = getelementptr inbounds i8*, i8** %10, i64 %12
%14 = load i8*, i8** %13
%15 = load i8*, i8** %7
%16 = call i64 @strcmp(i8* %14, i8* %15)
%17 = icmp ne i64 %16, 0
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @check_push(i64* nocapture %0, i64* nocapture readnone %1, i8* %2, i8* nocapture %3) {
%5 = bitcast i8* %3 to i8**
%6 = load i64, i64* %0
%7 = getelementptr inbounds i8*, i8** %5, i64 %6
%8 = load i8*, i8** %7
%9 = tail call i64 @strcmp(i8* %8, i8* %2)
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xac() {
  Assert_real((isalpha(172) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              865, ("isalpha should be 0 for 0xac"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xac>:
push   %rbp
mov    %rsp,%rbp
mov    $0xac,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x361,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xac>:
push   %rax
mov    $0xac,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x361,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xac\00"
define void @t_isalpha_0xac() {
%1 = call i64 @isalpha(i32 172)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 865, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xac\00"
define void @t_isalpha_0xac() {
%1 = tail call i64 @isalpha(i32 172)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 865, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
bool nrf52_errata_94(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_94>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_94>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_94() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_94() {
ret i32 0
}
/* Type definitions */
struct Cyc_List_List {
  int dummy;
};

/* Variables and functions */
struct Cyc_List_List *Cyc_PP_list_of_alist_f(void *, int /*<<< orphan*/);
struct Cyc_List_List *Cyc_PP_list_of_alist(void *x) {
  struct Cyc_List_List *_T0;
  _T0 = Cyc_PP_list_of_alist_f(x, 0);
  return _T0;
}


x86 assembly (clang, -O0):
<Cyc_PP_list_of_alist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <Cyc_PP_list_of_alist_f@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_PP_list_of_alist>:
xor    %esi,%esi
jmp    1030 <Cyc_PP_list_of_alist_f@plt>

LLVM IR (-O0):
%struct.Cyc_List_List = type { i32 }
define %struct.Cyc_List_List* @Cyc_PP_list_of_alist(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.Cyc_List_List*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call %struct.Cyc_List_List* @Cyc_PP_list_of_alist_f(i8* %4, i32 0)
store %struct.Cyc_List_List* %5, %struct.Cyc_List_List** %3
%6 = load %struct.Cyc_List_List*, %struct.Cyc_List_List** %3
ret %struct.Cyc_List_List* %6
}

LLVM IR (-O2):
%struct.Cyc_List_List = type { i32 }
define %struct.Cyc_List_List* @Cyc_PP_list_of_alist(i8* %0) {
%2 = tail call %struct.Cyc_List_List* @Cyc_PP_list_of_alist_f(i8* %0, i32 0)
ret %struct.Cyc_List_List* %2
}
/* Type definitions */
typedef int u_int32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int djbhash(char const *, int const, int);
int32_t splaytree_djbhash(const char *str, const u_int32_t len) {
  return (int32_t)(djbhash(str, len, 5381) & ~(((u_int32_t)1) << 31));
}


x86 assembly (clang, -O0):
<splaytree_djbhash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x1505,%edx
call   1030 <djbhash@plt>
and    $0x7fffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<splaytree_djbhash>:
push   %rax
mov    $0x1505,%edx
call   1030 <djbhash@plt>
and    $0x7fffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @splaytree_djbhash(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @djbhash(i8* %5, i32 %6, i32 5381)
%8 = and i32 %7, 2147483647
ret i32 %8
}

LLVM IR (-O2):
define i32 @splaytree_djbhash(i8* %0, i32 %1) {
%3 = tail call i32 @djbhash(i8* %0, i32 %1, i32 5381)
%4 = and i32 %3, 2147483647
ret i32 %4
}
double LinearInterpolate(double y1, double y2, double mu) {
  return (y1 * (1 - mu) + y2 * mu);
}


x86 assembly (clang, -O0):
<LinearInterpolate>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xee0(%rip),%xmm2
subsd  -0x18(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm1
mulsd  -0x18(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<LinearInterpolate>:
movsd  0xef8(%rip),%xmm3
subsd  %xmm2,%xmm3
mulsd  %xmm2,%xmm1
mulsd  %xmm3,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @LinearInterpolate(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = load double, double* %6
%9 = fsub double 1.000000e+00, %8
%10 = load double, double* %5
%11 = load double, double* %6
%12 = fmul double %10, %11
%13 = call double @llvm.fmuladd.f64(double %7, double %9, double %12)
ret double %13
}

LLVM IR (-O2):
define double @LinearInterpolate(double %0, double %1, double %2) {
%4 = fsub double 1.000000e+00, %2
%5 = fmul double %1, %2
%6 = tail call double @llvm.fmuladd.f64(double %0, double %4, double %5)
ret double %6
}
/* Variables and functions */
int ENODEV;
int spi_eeprom_register(int busid, int chipid, int size) { return -ENODEV; }


x86 assembly (clang, -O0):
<spi_eeprom_register>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
mov    0x2eca(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_eeprom_register>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENODEV = global i32 0
define i32 @spi_eeprom_register(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @ENODEV
%8 = sub nsw i32 0, %7
ret i32 %8
}

LLVM IR (-O2):
@ENODEV = global i32 0
define i32 @spi_eeprom_register(i32 %0, i32 %1, i32 %2) {
%4 = load i32, i32* @ENODEV
%5 = sub nsw i32 0, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *,
                           char const *, int, char const *);
int /*<<< orphan*/ stderr;
void __assert2(const char *file, int line, const char *func,
               const char *failedexpr) {
  (void)fprintf(
      stderr,
      "assertion \"%s\" failed: file \"%s\", line %d, function \"%s\"\n",
      failedexpr, file, line, func);
  abort();
}


x86 assembly (clang, -O0):
<__assert2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
mov    -0x20(%rbp),%rdx
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%r8d
mov    -0x18(%rbp),%r9
lea    0xea9(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<__assert2>:
push   %rax
mov    %rdx,%r9
mov    %esi,%r8d
mov    %rdi,%rax
mov    0x2eaf(%rip),%rdx
mov    (%rdx),%edi
lea    0xec6(%rip),%rsi
mov    %rcx,%rdx
mov    %rax,%rcx
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [58 x i8] c"assertion \22%s\22 failed: file \22%s\22, line %d, function \22%s\22\0A\00"
define void @__assert2(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i32, i32* @stderr
%10 = load i8*, i8** %8
%11 = load i8*, i8** %5
%12 = load i32, i32* %6
%13 = load i8*, i8** %7
%14 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0), i8* %10, i8* %11, i32 %12, i8* %13)
%15 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [58 x i8] c"assertion \22%s\22 failed: file \22%s\22, line %d, function \22%s\22\0A\00"
define void @__assert2(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %0, i32 %1, i8* %2)
%7 = tail call i32 (...) @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ gp_get_usertime(long *);
long context_usertime(void) {
  long secs_ns[2];
  gp_get_usertime(secs_ns);
  return secs_ns[0] * 1000 + secs_ns[1] / 1000000;
}


x86 assembly (clang, -O0):
<context_usertime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x10(%rbp),%rdi
call   1030 <gp_get_usertime@plt>
imul   $0x3e8,-0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xf4240,%ecx
cqto
idiv   %rcx
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<context_usertime>:
sub    $0x18,%rsp
mov    %rsp,%rdi
call   1030 <gp_get_usertime@plt>
imul   $0x3e8,(%rsp),%rcx
movabs $0x431bde82d7b634db,%rax
de 1b 43
imulq  0x8(%rsp)
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x12,%rdx
add    %rdx,%rax
add    %rcx,%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i64 @context_usertime() {
%1 = alloca [2 x i64]
%2 = getelementptr inbounds [2 x i64], [2 x i64]* %1, i64 0, i64 0
%3 = call i32 @gp_get_usertime(i64* %2)
%4 = getelementptr inbounds [2 x i64], [2 x i64]* %1, i64 0, i64 0
%5 = load i64, i64* %4
%6 = mul nsw i64 %5, 1000
%7 = getelementptr inbounds [2 x i64], [2 x i64]* %1, i64 0, i64 1
%8 = load i64, i64* %7
%9 = sdiv i64 %8, 1000000
%10 = add nsw i64 %6, %9
ret i64 %10
}

LLVM IR (-O2):
define i64 @context_usertime() {
%1 = alloca [2 x i64]
%2 = bitcast [2 x i64]* %1 to i8*
%3 = getelementptr inbounds [2 x i64], [2 x i64]* %1, i64 0, i64 0
%4 = call i32 @gp_get_usertime(i64* %3)
%5 = load i64, i64* %3
%6 = mul nsw i64 %5, 1000
%7 = getelementptr inbounds [2 x i64], [2 x i64]* %1, i64 0, i64 1
%8 = load i64, i64* %7
%9 = sdiv i64 %8, 1000000
%10 = add nsw i64 %9, %6
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ dmaCompleteUsbCh1In();
void INT_Excep_USB0_D1FIFO0(void) { dmaCompleteUsbCh1In(); }


x86 assembly (clang, -O0):
<INT_Excep_USB0_D1FIFO0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dmaCompleteUsbCh1In@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_USB0_D1FIFO0>:
xor    %eax,%eax
jmp    1030 <dmaCompleteUsbCh1In@plt>

LLVM IR (-O0):
define void @INT_Excep_USB0_D1FIFO0() {
%1 = call i32 (...) @dmaCompleteUsbCh1In()
ret void
}

LLVM IR (-O2):
define void @INT_Excep_USB0_D1FIFO0() {
%1 = tail call i32 (...) @dmaCompleteUsbCh1In()
ret void
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ stat(char const *, struct stat *);
struct stat filestat(const char *path) {
  struct stat st;
  stat(path, &st);
  return st;
}


x86 assembly (clang, -O0):
<filestat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <stat@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filestat>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
mov    (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @filestat(i8* %0) {
%2 = alloca %struct.stat
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @stat(i8* %4, %struct.stat* %2)
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i32 0, i32 0
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @filestat(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = call i32 @stat(i8* %0, %struct.stat* %2)
%4 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}
void ff_hevc_v_loop_filter_luma_8_sse2() {}


x86 assembly (clang, -O0):
<ff_hevc_v_loop_filter_luma_8_sse2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_v_loop_filter_luma_8_sse2>:
ret

LLVM IR (-O0):
define void @ff_hevc_v_loop_filter_luma_8_sse2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_v_loop_filter_luma_8_sse2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void func() { printf("HELLO WORLD\n"); }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"HELLO WORLD\0A\00"
define void @func() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"HELLO WORLD\00"
define void @func() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
int initnetwork(argc, argv)
int argc;
char **argv;
{
  readhostip();
  varinit();
  show_loop_cal();
  return (0);
}


x86 assembly (clang, -O0):
<initnetwork>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <readhostip@plt>
mov    $0x0,%al
call   1040 <varinit@plt>
mov    $0x0,%al
call   1050 <show_loop_cal@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initnetwork>:
push   %rax
xor    %eax,%eax
call   1030 <readhostip@plt>
xor    %eax,%eax
call   1040 <varinit@plt>
xor    %eax,%eax
call   1050 <show_loop_cal@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @initnetwork(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @readhostip()
%6 = call i32 (...) @varinit()
%7 = call i32 (...) @show_loop_cal()
ret i32 0
}

LLVM IR (-O2):
define i32 @initnetwork(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @readhostip()
%4 = tail call i32 (...) @varinit()
%5 = tail call i32 (...) @show_loop_cal()
ret i32 0
}
unsigned long int div_rhs(long int rhs) {
  if (rhs == 0)
    return 1;
  return rhs;
}


x86 assembly (clang, -O0):
<div_rhs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1120 <div_rhs+0x20>
movq   $0x1,-0x8(%rbp)
jmp    1128 <div_rhs+0x28>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_rhs>:
test   %rdi,%rdi
mov    $0x1,%eax
cmovne %rdi,%rax
ret

LLVM IR (-O0):
define i64 @div_rhs(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 1, i64* %2
br label %9
7: ; preds = %1
%8 = load i64, i64* %3
store i64 %8, i64* %2
br label %9
9: ; preds = %7, %6
%10 = load i64, i64* %2
ret i64 %10
}

LLVM IR (-O2):
define i64 @div_rhs(i64 %0) {
%2 = icmp eq i64 %0, 0
%3 = select i1 %2, i64 1, i64 %0
ret i64 %3
}
void arria10_start_image(int offset) { return; }


x86 assembly (clang, -O0):
<arria10_start_image>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<arria10_start_image>:
ret

LLVM IR (-O0):
define void @arria10_start_image(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @arria10_start_image(i32 %0) {
ret void
}
/* Variables and functions */
scalar_t__ execve(char *, int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
int main(int argc, char **argv) {
  if (argc == 1) {
    if (execve(argv[0], NULL, NULL) < 0) {
      perror("execve");
      exit(1);
    }
  }
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1188 <main+0x58>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
xor    %eax,%eax
mov    %eax,%edx
mov    %rdx,%rsi
call   1030 <execve@plt>
cmp    $0x0,%rax
jge    1183 <main+0x53>
lea    0xe8c(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
jmp    1188 <main+0x58>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
jne    115d <main+0x2d>
mov    (%rsi),%rdi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <execve@plt>
test   %rax,%rax
jns    115d <main+0x2d>
lea    0xeb2(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"execve\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %18
8: ; preds = %2
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
%12 = call i64 @execve(i8* %11, i32* null, i32* null)
%13 = icmp slt i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %8
%15 = call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%16 = call i32 @exit(i32 1)
unreachable
17: ; preds = %8
br label %18
18: ; preds = %17, %2
%19 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [7 x i8] c"execve\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %4, label %11
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i64 @execve(i8* %5, i32* null, i32* null)
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = tail call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%10 = tail call i32 @exit(i32 1)
unreachable
11: ; preds = %4, %2
%12 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ handle_57(int /*<<< orphan*/);
int gen_57() {
  handle_57(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_57>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_57@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_57>:
push   %rax
xor    %edi,%edi
call   1030 <handle_57@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_57() {
%1 = call i32 @handle_57(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_57() {
%1 = tail call i32 @handle_57(i32 0)
ret i32 0
}
int intPower(float x, int y) {
  if (y == 1)
    return x;
  if (y == 0)
    return 1;
  return x * intPower(x, y - 1);
}


x86 assembly (clang, -O0):
<intPower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jne    1137 <intPower+0x27>
cvttss2si -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    117b <intPower+0x6b>
cmpl   $0x0,-0xc(%rbp)
jne    114d <intPower+0x3d>
movl   $0x1,-0x4(%rbp)
jmp    117b <intPower+0x6b>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
mov    -0xc(%rbp),%edi
sub    $0x1,%edi
call   1030 <intPower@plt>
movss  -0x10(%rbp),%xmm0
cvtsi2ss %eax,%xmm1
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intPower>:
test   %edi,%edi
je     111e <intPower+0xe>
cmp    $0x1,%edi
jne    1124 <intPower+0x14>
cvttss2si %xmm0,%eax
ret
mov    $0x1,%eax
ret
push   %rax
add    $0xffffffff,%edi
movss  %xmm0,0x4(%rsp)
call   1030 <intPower@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
mulss  0x4(%rsp),%xmm0
cvttss2si %xmm0,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @intPower(float %0, i32 %1) {
%3 = alloca i32
%4 = alloca float
%5 = alloca i32
store float %0, float* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load float, float* %4
%10 = fptosi float %9 to i32
store i32 %10, i32* %3
br label %24
11: ; preds = %2
%12 = load i32, i32* %5
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 1, i32* %3
br label %24
15: ; preds = %11
%16 = load float, float* %4
%17 = load float, float* %4
%18 = load i32, i32* %5
%19 = sub nsw i32 %18, 1
%20 = call i32 @intPower(float %17, i32 %19)
%21 = sitofp i32 %20 to float
%22 = fmul float %16, %21
%23 = fptosi float %22 to i32
store i32 %23, i32* %3
br label %24
24: ; preds = %15, %14, %8
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @intPower(float %0, i32 %1) {
switch i32 %1, label %7 [
i32 1, label %3
i32 0, label %5
]
3: ; preds = %2
%4 = fptosi float %0 to i32
br label %5
5: ; preds = %3, %2, %7
%6 = phi i32 [ %12, %7 ], [ %4, %3 ], [ 1, %2 ]
ret i32 %6
7: ; preds = %2
%8 = add nsw i32 %1, -1
%9 = tail call i32 @intPower(float %0, i32 %8)
%10 = sitofp i32 %9 to float
%11 = fmul float %10, %0
%12 = fptosi float %11 to i32
br label %5
}
/* Variables and functions */
unsigned int GET32(int);
int /*<<< orphan*/ PUT32(int, int);
void set_tick_and_enable_timer() {
  unsigned int rx = GET32(0x20003004);
  rx += 0x00080000;
  PUT32(0x20003010, rx);
  PUT32(0x20003000, 2);
}


x86 assembly (clang, -O0):
<set_tick_and_enable_timer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x20003004,%edi
call   1040 <GET32@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x80000,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x20003010,%edi
call   1030 <PUT32@plt>
mov    $0x20003000,%edi
mov    $0x2,%esi
call   1030 <PUT32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_tick_and_enable_timer>:
push   %rax
mov    $0x20003004,%edi
call   1040 <GET32@plt>
lea    0x80000(%rax),%esi
mov    $0x20003010,%edi
call   1030 <PUT32@plt>
mov    $0x20003000,%edi
mov    $0x2,%esi
pop    %rax
jmp    1030 <PUT32@plt>

LLVM IR (-O0):
define void @set_tick_and_enable_timer() {
%1 = alloca i32
%2 = call i32 @GET32(i32 536883204)
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = add i32 %3, 524288
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = call i32 @PUT32(i32 536883216, i32 %5)
%7 = call i32 @PUT32(i32 536883200, i32 2)
ret void
}

LLVM IR (-O2):
define void @set_tick_and_enable_timer() {
%1 = tail call i32 @GET32(i32 536883204)
%2 = add i32 %1, 524288
%3 = tail call i32 @PUT32(i32 536883216, i32 %2)
%4 = tail call i32 @PUT32(i32 536883200, i32 2)
ret void
}
int test_imm_5Eint64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x5E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Eint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x5e,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Eint64_midword_mem>:
testb  $0x5e,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Eint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 94
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_5Eint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 6160384
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int _ZN7android16MediaBufferGroupC1Ej(int /*<<< orphan*/);
int _ZN7android16MediaBufferGroupC1Ev() {
  return _ZN7android16MediaBufferGroupC1Ej(0);
}


x86 assembly (clang, -O0):
<_ZN7android16MediaBufferGroupC1Ev>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <_ZN7android16MediaBufferGroupC1Ej@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZN7android16MediaBufferGroupC1Ev>:
xor    %edi,%edi
jmp    1030 <_ZN7android16MediaBufferGroupC1Ej@plt>

LLVM IR (-O0):
define i32 @_ZN7android16MediaBufferGroupC1Ev() {
%1 = call i32 @_ZN7android16MediaBufferGroupC1Ej(i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @_ZN7android16MediaBufferGroupC1Ev() {
%1 = tail call i32 @_ZN7android16MediaBufferGroupC1Ej(i32 0)
ret i32 %1
}
void ScaleRowDown2Box_Any_AVX2() {}


x86 assembly (clang, -O0):
<ScaleRowDown2Box_Any_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScaleRowDown2Box_Any_AVX2>:
ret

LLVM IR (-O0):
define void @ScaleRowDown2Box_Any_AVX2() {
ret void
}

LLVM IR (-O2):
define void @ScaleRowDown2Box_Any_AVX2() {
ret void
}
int tabs(s, os)
char *s, *os;
{ return (width(s, os) / 8); }


x86 assembly (clang, -O0):
<tabs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x0,%al
call   1030 <width@plt>
mov    $0x8,%ecx
cltd
idiv   %ecx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tabs>:
push   %rax
xor    %eax,%eax
call   1030 <width@plt>
lea    0x7(%rax),%ecx
test   %eax,%eax
cmovs  %ecx,%eax
sar    $0x3,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @tabs(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 (i8*, i8*, ...) bitcast (i32 (...)* @width to i32 (i8*, i8*, ...)*)(i8* %5, i8* %6)
%8 = sdiv i32 %7, 8
ret i32 %8
}

LLVM IR (-O2):
define i32 @tabs(i8* %0, i8* %1) {
%3 = tail call i32 (i8*, i8*, ...) bitcast (i32 (...)* @width to i32 (i8*, i8*, ...)*)(i8* %0, i8* %1)
%4 = sdiv i32 %3, 8
ret i32 %4
}
void ins_nop() {}


x86 assembly (clang, -O0):
<ins_nop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ins_nop>:
ret

LLVM IR (-O0):
define void @ins_nop() {
ret void
}

LLVM IR (-O2):
define void @ins_nop() {
ret void
}
unsigned int GEN_rand(unsigned int *seed) {
  *seed = ((*seed) * 2654435761U) + 2246822519U;
  return (*seed) >> 11;
}


x86 assembly (clang, -O0):
<GEN_rand>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   $0x9e3779b1,(%rax),%ecx
add    $0x85ebca77,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shr    $0xb,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GEN_rand>:
imul   $0x9e3779b1,(%rdi),%eax
add    $0x85ebca77,%eax
mov    %eax,(%rdi)
shr    $0xb,%eax
ret

LLVM IR (-O0):
define i32 @GEN_rand(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = mul i32 %4, -1640531535
%6 = add i32 %5, -2048144777
%7 = load i32*, i32** %2
store i32 %6, i32* %7
%8 = load i32*, i32** %2
%9 = load i32, i32* %8
%10 = lshr i32 %9, 11
ret i32 %10
}

LLVM IR (-O2):
define i32 @GEN_rand(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = mul i32 %2, -1640531535
%4 = add i32 %3, -2048144777
store i32 %4, i32* %0
%5 = lshr i32 %4, 11
ret i32 %5
}
/* Variables and functions */
int *malloc(int);
int **RegInvalidationDetect2(int **pp) {
  int *p = malloc(12);
  pp = &p;
  pp++;
  return 0;
}


x86 assembly (clang, -O0):
<RegInvalidationDetect2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xc,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RegInvalidationDetect2>:
push   %rax
mov    $0xc,%edi
call   1030 <malloc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32** @RegInvalidationDetect2(i32** %0) {
%2 = alloca i32**
%3 = alloca i32*
store i32** %0, i32*** %2
%4 = call i32* @malloc(i32 12)
store i32* %4, i32** %3
store i32** %3, i32*** %2
%5 = load i32**, i32*** %2
%6 = getelementptr inbounds i32*, i32** %5, i32 1
store i32** %6, i32*** %2
ret i32** null
}

LLVM IR (-O2):
define noalias i32** @RegInvalidationDetect2(i32** nocapture readnone %0) {
%2 = tail call i32* @malloc(i32 12)
ret i32** null
}
/* Variables and functions */
int countset(int);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int num, setbit;
  printf("Enter the number \n");
  scanf("%d", &num);
  setbit = countset(num);
  printf("The number of setbit in given number = %d\n", setbit);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xebf(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1040 <countset@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee6(%rip),%rdi
call   1030 <puts@plt>
lea    0xeac(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1060 <scanf@plt>
mov    0x4(%rsp),%edi
call   1050 <countset@plt>
lea    0xe95(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Enter the number \0A\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [43 x i8] c"The number of setbit in given number = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%6 = load i32, i32* %2
%7 = call i32 @countset(i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.2, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [43 x i8] c"The number of setbit in given number = %d\0A\00"
@str = [18 x i8] c"Enter the number \00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @countset(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}
int abs(int x) {
  do {
  } while (0);
  return x < 0 ? -x : x;
}


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    110c <abs+0xc>
cmpl   $0x0,-0x4(%rbp)
jge    1123 <abs+0x23>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <abs+0x29>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %1
br label %4
4: ; preds = %3
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
br label %12
10: ; preds = %4
%11 = load i32, i32* %2
br label %12
12: ; preds = %10, %7
%13 = phi i32 [ %9, %7 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
add(int a, int b) {
  int c;
  c = a + b;
  printf("The result is %d", c);
}


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
add    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"The result is %d\00"
define i32 @add(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add nsw i32 %7, %8
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
@.str = [17 x i8] c"The result is %d\00"
define i32 @add(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 undef
}
int execute_fstatvfs64() { return 0; }


x86 assembly (clang, -O0):
<execute_fstatvfs64>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_fstatvfs64>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_fstatvfs64() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_fstatvfs64() {
ret i32 0
}
/* Type definitions */
struct phnedg {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free_object(int, short *);
void free_phnedg(struct phnedg *edg) { free_object(25, (short *)edg); }


x86 assembly (clang, -O0):
<free_phnedg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x19,%edi
call   1030 <free_object@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_phnedg>:
mov    %rdi,%rsi
mov    $0x19,%edi
jmp    1030 <free_object@plt>

LLVM IR (-O0):
%struct.phnedg = type { i32 }
define void @free_phnedg(%struct.phnedg* %0) {
%2 = alloca %struct.phnedg*
store %struct.phnedg* %0, %struct.phnedg** %2
%3 = load %struct.phnedg*, %struct.phnedg** %2
%4 = bitcast %struct.phnedg* %3 to i16*
%5 = call i32 @free_object(i32 25, i16* %4)
ret void
}

LLVM IR (-O2):
%struct.phnedg = type { i32 }
define void @free_phnedg(%struct.phnedg* %0) {
%2 = bitcast %struct.phnedg* %0 to i16*
%3 = tail call i32 @free_object(i32 25, i16* %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int LLVMFuzzerTestOneInput(uint8_t *buf, size_t size) {
  if (size < 2)
    return 0;
  if (buf[0] == '0')
    printf("Looks like a zero to me!\n");
  else
    printf("A non-zero value? How quaint!\n");
  return 0;
}


x86 assembly (clang, -O0):
<LLVMFuzzerTestOneInput>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x2,-0x18(%rbp)
jae    1137 <LLVMFuzzerTestOneInput+0x27>
movl   $0x0,-0x4(%rbp)
jmp    1168 <LLVMFuzzerTestOneInput+0x58>
mov    -0x10(%rbp),%rax
cmpl   $0x30,(%rax)
jne    1155 <LLVMFuzzerTestOneInput+0x45>
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
jmp    1161 <LLVMFuzzerTestOneInput+0x51>
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LLVMFuzzerTestOneInput>:
cmp    $0x2,%rsi
jb     1135 <LLVMFuzzerTestOneInput+0x25>
push   %rax
cmpl   $0x30,(%rdi)
lea    0xefd(%rip),%rax
lea    0xed8(%rip),%rdi
cmove  %rax,%rdi
call   1030 <puts@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Looks like a zero to me!\0A\00"
@.str.1 = [31 x i8] c"A non-zero value? How quaint!\0A\00"
define i32 @LLVMFuzzerTestOneInput(i32* %0, i64 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i64
store i32* %0, i32** %4
store i64 %1, i64* %5
%6 = load i64, i64* %5
%7 = icmp ult i64 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %19
9: ; preds = %2
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i64 0
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, 48
br i1 %13, label %14, label %16
14: ; preds = %9
%15 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
br label %18
16: ; preds = %9
%17 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0))
br label %18
18: ; preds = %16, %14
store i32 0, i32* %3
br label %19
19: ; preds = %18, %8
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
@str = [30 x i8] c"A non-zero value? How quaint!\00"
@str.2 = [25 x i8] c"Looks like a zero to me!\00"
define i32 @LLVMFuzzerTestOneInput(i32* nocapture %0, i64 %1) {
%3 = icmp ult i64 %1, 2
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = load i32, i32* %0
%6 = icmp eq i32 %5, 48
%7 = select i1 %6, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @str.2, i64 0, i64 0), i8* getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0)
%8 = tail call i32 @puts(i8* dereferenceable(1) %7)
br label %9
9: ; preds = %4, %2
ret i32 0
}
void ff_hevc_put_hevc_pel_pixels48_8_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_pel_pixels48_8_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_pel_pixels48_8_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_pel_pixels48_8_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_pel_pixels48_8_avx2() {
ret void
}
int iso_8859_to_control(void *baton, int c, int *ctrl_char) {
  *ctrl_char = (c & 0200) | (c & 037);
  return 1;
}


x86 assembly (clang, -O0):
<iso_8859_to_control>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
and    $0x80,%ecx
mov    -0xc(%rbp),%eax
and    $0x1f,%eax
or     %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iso_8859_to_control>:
and    $0x9f,%esi
mov    %esi,(%rdx)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @iso_8859_to_control(i8* %0, i32 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %5
%8 = and i32 %7, 128
%9 = load i32, i32* %5
%10 = and i32 %9, 31
%11 = or i32 %8, %10
%12 = load i32*, i32** %6
store i32 %11, i32* %12
ret i32 1
}

LLVM IR (-O2):
define i32 @iso_8859_to_control(i8* nocapture readnone %0, i32 %1, i32* nocapture writeonly %2) {
%4 = and i32 %1, 159
store i32 %4, i32* %2
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ fortchartoc(char *);
int /*<<< orphan*/ gmvwrite_openfile_ir(int /*<<< orphan*/, int, int);
void fgmvwrite_openfile_ir_(char *filnam, int *isize, int *rsize) {
  gmvwrite_openfile_ir(fortchartoc(filnam), *isize, *rsize);
}


x86 assembly (clang, -O0):
<fgmvwrite_openfile_ir_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fortchartoc@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x18(%rbp),%rax
mov    (%rax),%edx
call   1040 <gmvwrite_openfile_ir@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgmvwrite_openfile_ir_>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
call   1030 <fortchartoc@plt>
mov    (%rbx),%esi
mov    (%r14),%edx
mov    %eax,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <gmvwrite_openfile_ir@plt>

LLVM IR (-O0):
define void @fgmvwrite_openfile_ir_(i8* %0, i32* %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = call i32 @fortchartoc(i8* %7)
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = load i32*, i32** %6
%12 = load i32, i32* %11
%13 = call i32 @gmvwrite_openfile_ir(i32 %8, i32 %10, i32 %12)
ret void
}

LLVM IR (-O2):
define void @fgmvwrite_openfile_ir_(i8* %0, i32* nocapture %1, i32* nocapture %2) {
%4 = tail call i32 @fortchartoc(i8* %0)
%5 = load i32, i32* %1
%6 = load i32, i32* %2
%7 = tail call i32 @gmvwrite_openfile_ir(i32 %4, i32 %5, i32 %6)
ret void
}
double LSKeyframeAnimationFunctionEaseInQuart(double t, double b, double c,
                                              double d) {
  return c * (t /= d) * t * t * t + b;
}


x86 assembly (clang, -O0):
<LSKeyframeAnimationFunctionEaseInQuart>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm2
movsd  -0x8(%rbp),%xmm1
divsd  %xmm2,%xmm1
movsd  %xmm1,-0x8(%rbp)
mulsd  %xmm1,%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<LSKeyframeAnimationFunctionEaseInQuart>:
divsd  %xmm3,%xmm0
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @LSKeyframeAnimationFunctionEaseInQuart(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %7
%10 = load double, double* %8
%11 = load double, double* %5
%12 = fdiv double %11, %10
store double %12, double* %5
%13 = fmul double %9, %12
%14 = load double, double* %5
%15 = fmul double %13, %14
%16 = load double, double* %5
%17 = fmul double %15, %16
%18 = load double, double* %5
%19 = load double, double* %6
%20 = call double @llvm.fmuladd.f64(double %17, double %18, double %19)
ret double %20
}

LLVM IR (-O2):
define double @LSKeyframeAnimationFunctionEaseInQuart(double %0, double %1, double %2, double %3) {
%5 = fdiv double %0, %3
%6 = fmul double %5, %2
%7 = fmul double %5, %6
%8 = fmul double %5, %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double %5, double %1)
ret double %9
}
/* Variables and functions */
bool is_valid_domain(char value[]) { return false; }


x86 assembly (clang, -O0):
<is_valid_domain>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_valid_domain>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_valid_domain(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @is_valid_domain(i8* nocapture readnone %0) {
ret i32 0
}
unsigned long compare_and_swap64_value(volatile unsigned long long *address,
                                       unsigned long old_value,
                                       unsigned long new_value) {
  unsigned long prev = 0;
  asm volatile("lock ; "
               "cmpxchgq %1,%2"
               : "=a"(prev)
               : "r"(new_value), "m"(*address), "0"(old_value)
               : "memory");
  return prev;
}


x86 assembly (clang, -O0):
<compare_and_swap64_value>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rax
lock cmpxchg %rcx,(%rdx)
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_and_swap64_value>:
mov    %rsi,%rax
lock cmpxchg %rdx,(%rdi)
ret

LLVM IR (-O0):
define i64 @compare_and_swap64_value(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
store i64 0, i64* %7
%8 = load i64, i64* %6
%9 = load i64*, i64** %4
%10 = load i64, i64* %5
%11 = call i64 asm sideeffect "lock ; cmpxchgq $1,$2", "={ax},r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %8, i64* elementtype(i64) %9, i64 %10)
store i64 %11, i64* %7
%12 = load i64, i64* %7
ret i64 %12
}

LLVM IR (-O2):
define i64 @compare_and_swap64_value(i64* %0, i64 %1, i64 %2) {
%4 = tail call i64 asm sideeffect "lock ; cmpxchgq $1,$2", "={ax},r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %2, i64* elementtype(i64) %0, i64 %1)
ret i64 %4
}
int ls_costN_nm3_n_in(void) { return 1; }


x86 assembly (clang, -O0):
<ls_costN_nm3_n_in>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm3_n_in>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ls_costN_nm3_n_in() {
ret i32 1
}

LLVM IR (-O2):
define i32 @ls_costN_nm3_n_in() {
ret i32 1
}