xunge/DecIR huggingface dataset:
/* Type definitions */
struct sockaddr_in6 {
  int sin6_port;
};
struct sockaddr_in {
  int sin_port;
};
struct sockaddr {
  int dummy;
};

/* Variables and functions */
#define AF_INET 129
#define AF_INET6 128
int port_from_in_addr(int family, struct sockaddr *addr) {
  switch (family) {
  case AF_INET6:
    return ((struct sockaddr_in6 *)addr)->sin6_port;
  case AF_INET:
  default:
    return ((struct sockaddr_in *)addr)->sin_port;
  }
}


x86 assembly (clang, -O0):
<port_from_in_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
sub    $0x80,%eax
je     1134 <port_from_in_addr+0x34>
jmp    1121 <port_from_in_addr+0x21>
mov    -0x14(%rbp),%eax
sub    $0x81,%eax
je     1142 <port_from_in_addr+0x42>
jmp    1147 <port_from_in_addr+0x47>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1150 <port_from_in_addr+0x50>
jmp    1147 <port_from_in_addr+0x47>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<port_from_in_addr>:
mov    (%rsi),%eax
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
%struct.sockaddr_in6 = type { i32 }
%struct.sockaddr_in = type { i32 }
define i32 @port_from_in_addr(i32 %0, %struct.sockaddr* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.sockaddr*
store i32 %0, i32* %4
store %struct.sockaddr* %1, %struct.sockaddr** %5
%6 = load i32, i32* %4
switch i32 %6, label %13 [
i32 128, label %7
i32 129, label %12
]
7: ; preds = %2
%8 = load %struct.sockaddr*, %struct.sockaddr** %5
%9 = bitcast %struct.sockaddr* %8 to %struct.sockaddr_in6*
%10 = getelementptr inbounds %struct.sockaddr_in6, %struct.sockaddr_in6* %9, i32 0, i32 0
%11 = load i32, i32* %10
store i32 %11, i32* %3
br label %18
12: ; preds = %2
br label %13
13: ; preds = %2, %12
%14 = load %struct.sockaddr*, %struct.sockaddr** %5
%15 = bitcast %struct.sockaddr* %14 to %struct.sockaddr_in*
%16 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %15, i32 0, i32 0
%17 = load i32, i32* %16
store i32 %17, i32* %3
br label %18
18: ; preds = %13, %7
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @port_from_in_addr(i32 %0, %struct.sockaddr* nocapture %1) {
%3 = getelementptr %struct.sockaddr, %struct.sockaddr* %1, i64 0, i32 0
%4 = load i32, i32* %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ LPSCI_DRV_IRQHandler(int /*<<< orphan*/);
void UART0_IRQHandler(void) { LPSCI_DRV_IRQHandler(0); }


x86 assembly (clang, -O0):
<UART0_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <LPSCI_DRV_IRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART0_IRQHandler>:
xor    %edi,%edi
jmp    1030 <LPSCI_DRV_IRQHandler@plt>

LLVM IR (-O0):
define void @UART0_IRQHandler() {
%1 = call i32 @LPSCI_DRV_IRQHandler(i32 0)
ret void
}

LLVM IR (-O2):
define void @UART0_IRQHandler() {
%1 = tail call i32 @LPSCI_DRV_IRQHandler(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(int /*<<< orphan*/, char *, int);
void strncpy_null_dst(char *x) { strncpy(0, x, 5); }


x86 assembly (clang, -O0):
<strncpy_null_dst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
xor    %edi,%edi
mov    $0x5,%edx
call   1030 <strncpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncpy_null_dst>:
mov    %rdi,%rsi
xor    %edi,%edi
mov    $0x5,%edx
jmp    1030 <strncpy@plt>

LLVM IR (-O0):
define void @strncpy_null_dst(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strncpy(i32 0, i8* %3, i32 5)
ret void
}

LLVM IR (-O2):
define void @strncpy_null_dst(i8* %0) {
%2 = tail call i32 @strncpy(i32 0, i8* %0, i32 5)
ret void
}
int main() {
  show_graphics();
  puts("\n\rSetting up 32 bit Environment");
  copy_gdt();
  puts("Switching to 32 bit mode");
  switch_prot();
  __asm__ __volatile__("int $0x19");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <show_graphics@plt>
lea    0xea3(%rip),%rdi
mov    $0x0,%al
call   1040 <puts@plt>
mov    $0x0,%al
call   1030 <copy_gdt@plt>
lea    0xeae(%rip),%rdi
mov    $0x0,%al
call   1040 <puts@plt>
mov    $0x0,%al
call   1060 <switch_prot@plt>
int    $0x19
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <show_graphics@plt>
lea    0xeb1(%rip),%rdi
xor    %eax,%eax
call   1040 <puts@plt>
xor    %eax,%eax
call   1030 <copy_gdt@plt>
lea    0xebc(%rip),%rdi
xor    %eax,%eax
call   1040 <puts@plt>
xor    %eax,%eax
call   1060 <switch_prot@plt>
int    $0x19
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [32 x i8] c"\0A\0DSetting up 32 bit Environment\00"
@.str.1 = [25 x i8] c"Switching to 32 bit mode\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @show_graphics()
%3 = call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @copy_gdt()
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 (...) @switch_prot()
ret i32 0
}

LLVM IR (-O2):
@.str = [32 x i8] c"\0A\0DSetting up 32 bit Environment\00"
@.str.1 = [25 x i8] c"Switching to 32 bit mode\00"
define i32 @main() {
%1 = tail call i32 (...) @show_graphics()
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @copy_gdt()
%4 = tail call i32 (i8*, ...) bitcast (i32 (...)* @puts to i32 (i8*, ...)*)(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.1, i64 0, i64 0))
%5 = tail call i32 (...) @switch_prot()
tail call void asm sideeffect "int $$0x19", "~{dirflag},~{fpsr},~{flags}"()
ret i32 0
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t bitfn_swap64(uint64_t a) {
  __asm__("bswap %0" : "=r"(a) : "0"(a));
  return a;
}


x86 assembly (clang, -O0):
<bitfn_swap64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
bswap  %rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitfn_swap64>:
mov    %rdi,%rax
bswap  %rax
ret

LLVM IR (-O0):
define i8* @bitfn_swap64(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @bitfn_swap64(i8* readnone %0) {
%2 = tail call i8* asm "bswap $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ DynamicStrings_PushAllocation();
void doDSdbEnter(void) {
  if ((1 == 0)) {
    DynamicStrings_PushAllocation();
  }
}


x86 assembly (clang, -O0):
<doDSdbEnter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<doDSdbEnter>:
ret

LLVM IR (-O0):
define void @doDSdbEnter() {
ret void
}

LLVM IR (-O2):
define void @doDSdbEnter() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HiveX_motor_setDirection(int, int /*<<< orphan*/);
void moveForward() {
  HiveX_motor_setDirection(0, 0);
  HiveX_motor_setDirection(1, 0);
}


x86 assembly (clang, -O0):
<moveForward>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1030 <HiveX_motor_setDirection@plt>
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <HiveX_motor_setDirection@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<moveForward>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1030 <HiveX_motor_setDirection@plt>
mov    $0x1,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <HiveX_motor_setDirection@plt>

LLVM IR (-O0):
define void @moveForward() {
%1 = call i32 @HiveX_motor_setDirection(i32 0, i32 0)
%2 = call i32 @HiveX_motor_setDirection(i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @moveForward() {
%1 = tail call i32 @HiveX_motor_setDirection(i32 0, i32 0)
%2 = tail call i32 @HiveX_motor_setDirection(i32 1, i32 0)
ret void
}
/* Variables and functions */
double pow(double, double);
double g(double d) { return 3.0 * pow(d, 2.0) - 2.0 * d - 3.0; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xede(%rip),%xmm1
call   1030 <pow@plt>
movsd  0xed1(%rip),%xmm1
mulsd  -0x8(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
movsd  0xea5(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  0xe95(%rip),%xmm1
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  0xef0(%rip),%xmm1
addsd  %xmm0,%xmm0
subsd  %xmm0,%xmm1
addsd  0xee8(%rip),%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @g(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @pow(double %3, double 2.000000e+00)
%5 = load double, double* %2
%6 = fmul double 2.000000e+00, %5
%7 = fneg double %6
%8 = call double @llvm.fmuladd.f64(double 3.000000e+00, double %4, double %7)
%9 = fsub double %8, 3.000000e+00
ret double %9
}

LLVM IR (-O2):
define double @g(double %0) {
%2 = fmul double %0, %0
%3 = fmul double %0, -2.000000e+00
%4 = tail call double @llvm.fmuladd.f64(double %2, double 3.000000e+00, double %3)
%5 = fadd double %4, -3.000000e+00
ret double %5
}
int max(int i1, int i2) {
  if (i1 < i2)
    return i2;
  return i1;
}


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1121 <max+0x21>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <max+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %5
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %4
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @max(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
int test_imm_76int32_mem(int *val) {
  return ((*val) & (0x76 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_76int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x76,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_76int32_mem>:
testb  $0x76,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_76int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 118
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_76int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 118
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ vecNf_add_new(float *, float *, float const *, int);
void vec4f_add(float a[4], const float b[4]) { vecNf_add_new(a, a, b, 4); }


x86 assembly (clang, -O0):
<vec4f_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x4,%ecx
call   1030 <vecNf_add_new@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec4f_add>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x4,%ecx
jmp    1030 <vecNf_add_new@plt>

LLVM IR (-O0):
define void @vec4f_add(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = load float*, float** %3
%7 = load float*, float** %4
%8 = call i32 @vecNf_add_new(float* %5, float* %6, float* %7, i32 4)
ret void
}

LLVM IR (-O2):
define void @vec4f_add(float* %0, float* %1) {
%3 = tail call i32 @vecNf_add_new(float* %0, float* %0, float* %1, i32 4)
ret void
}
int func4(int *x) {
  int i = 0;
  i += *x;
  return i;
}


x86 assembly (clang, -O0):
<func4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func4>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @func4(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = add nsw i32 %6, %5
store i32 %7, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @func4(i32* nocapture %0) {
%2 = load i32, i32* %0
ret i32 %2
}
void X509_check_private_key(void) {}


x86 assembly (clang, -O0):
<X509_check_private_key>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_check_private_key>:
ret

LLVM IR (-O0):
define void @X509_check_private_key() {
ret void
}

LLVM IR (-O2):
define void @X509_check_private_key() {
ret void
}
int f6(int y, int x) {
  int a = x & y;
  return x | a;
}


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @f6(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = and i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = or i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @f6(i32 %0, i32 returned %1) {
ret i32 %1
}
/* Type definitions */
struct rtas_priv_hdr_scn {
  int dummy;
};
struct rtas_event {
  int dummy;
};

/* Variables and functions */
scalar_t__ get_re_scn(struct rtas_event *, int);
struct rtas_priv_hdr_scn *rtas_get_priv_hdr_scn(struct rtas_event *re) {
  return (struct rtas_priv_hdr_scn *)get_re_scn(re, 11);
}


x86 assembly (clang, -O0):
<rtas_get_priv_hdr_scn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xb,%esi
call   1030 <get_re_scn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtas_get_priv_hdr_scn>:
mov    $0xb,%esi
jmp    1030 <get_re_scn@plt>

LLVM IR (-O0):
%struct.rtas_priv_hdr_scn = type { i32 }
%struct.rtas_event = type { i32 }
define %struct.rtas_priv_hdr_scn* @rtas_get_priv_hdr_scn(%struct.rtas_event* %0) {
%2 = alloca %struct.rtas_event*
store %struct.rtas_event* %0, %struct.rtas_event** %2
%3 = load %struct.rtas_event*, %struct.rtas_event** %2
%4 = call i64 @get_re_scn(%struct.rtas_event* %3, i32 11)
%5 = inttoptr i64 %4 to %struct.rtas_priv_hdr_scn*
ret %struct.rtas_priv_hdr_scn* %5
}

LLVM IR (-O2):
%struct.rtas_priv_hdr_scn = type { i32 }
%struct.rtas_event = type { i32 }
define %struct.rtas_priv_hdr_scn* @rtas_get_priv_hdr_scn(%struct.rtas_event* %0) {
%2 = tail call i64 @get_re_scn(%struct.rtas_event* %0, i32 11)
%3 = inttoptr i64 %2 to %struct.rtas_priv_hdr_scn*
ret %struct.rtas_priv_hdr_scn* %3
}
/* Variables and functions */
int /*<<< orphan*/ irc_part(char *, char *);
char *strtok(char *, char *);
void child_part(char *p) {
  char *chan, *message;
  chan = strtok(p, " ");
  message = strtok(NULL, "");
  irc_part(chan, message);
}


x86 assembly (clang, -O0):
<child_part>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <strtok@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
mov    %eax,%edi
lea    0xeb6(%rip),%rsi
call   1040 <strtok@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <irc_part@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<child_part>:
push   %rbx
lea    0xed8(%rip),%rsi
call   1040 <strtok@plt>
mov    %rax,%rbx
lea    0xeca(%rip),%rsi
xor    %edi,%edi
call   1040 <strtok@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
pop    %rbx
jmp    1030 <irc_part@plt>

LLVM IR (-O0):
@.str = [2 x i8] c" \00"
@.str.1 = [1 x i8] zeroinitializer
define void @child_part(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i8* @strtok(i8* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i8* %6, i8** %3
%7 = call i8* @strtok(i8* null, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
store i8* %7, i8** %4
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call i32 @irc_part(i8* %8, i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c" \00"
@.str.1 = [1 x i8] zeroinitializer
define void @child_part(i8* %0) {
%2 = tail call i8* @strtok(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = tail call i8* @strtok(i8* null, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @irc_part(i8* %2, i8* %3)
ret void
}
/* Variables and functions */
scalar_t__ myalloc(short);
short *newtable(short length) {
  return ((short *)myalloc((length + 1) * sizeof(short)));
}


x86 assembly (clang, -O0):
<newtable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x1,%rax
movswl %ax,%edi
call   1030 <myalloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<newtable>:
lea    (%rdi,%rdi,1),%eax
add    $0x2,%eax
movswl %ax,%edi
jmp    1030 <myalloc@plt>

LLVM IR (-O0):
define i16* @newtable(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = add nsw i32 %4, 1
%6 = sext i32 %5 to i64
%7 = mul i64 %6, 2
%8 = trunc i64 %7 to i16
%9 = call i64 @myalloc(i16 signext %8)
%10 = inttoptr i64 %9 to i16*
ret i16* %10
}

LLVM IR (-O2):
define i16* @newtable(i16 signext %0) {
%2 = shl i16 %0, 1
%3 = add i16 %2, 2
%4 = tail call i64 @myalloc(i16 signext %3)
%5 = inttoptr i64 %4 to i16*
ret i16* %5
}
void foo(p) int p;
{}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
ret void
}
/* Variables and functions */
char *scan_keys();
double strtod(char *, int /*<<< orphan*/ *);
double carry_in(void) {
  char *text;
  register double result;
  text = scan_keys();
  result = strtod(text, NULL);
  return (result);
}


x86 assembly (clang, -O0):
<carry_in>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <scan_keys@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <strtod@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<carry_in>:
push   %rax
xor    %eax,%eax
call   1030 <scan_keys@plt>
mov    %rax,%rdi
xor    %esi,%esi
pop    %rax
jmp    1040 <strtod@plt>

LLVM IR (-O0):
define double @carry_in() {
%1 = alloca i8*
%2 = alloca double
%3 = call i8* (...) @scan_keys()
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = call double @strtod(i8* %4, i32* null)
store double %5, double* %2
%6 = load double, double* %2
ret double %6
}

LLVM IR (-O2):
define double @carry_in() {
%1 = tail call i8* (...) @scan_keys()
%2 = tail call double @strtod(i8* nocapture %1, i32* null)
ret double %2
}
/* Variables and functions */
size_t umax(size_t a, size_t b) { return (a > b) ? a : b; }


x86 assembly (clang, -O0):
<umax>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jbe    1127 <umax+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <umax+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umax>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmova  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @umax(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ugt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @umax(i64 %0, i64 %1) {
%3 = icmp ugt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
double fabsk(double);
__attribute__((always_)) const int xisint(double d) {
  double x = d - (double)(1LL << 31) * (int)(d * (1.0 / (1LL << 31)));
  return (x == (int)x) || (fabsk(d) >= (double)(1LL << 53));
}


x86 assembly (clang, -O0):
<xisint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  0xede(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%eax
cvtsi2sd %eax,%xmm0
movsd  0xec1(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvttsd2si -0x10(%rbp),%eax
cvtsi2sd %eax,%xmm1
mov    $0x1,%al
ucomisd %xmm1,%xmm0
mov    %al,-0x11(%rbp)
jne    1174 <xisint+0x64>
jp     1174 <xisint+0x64>
jmp    1190 <xisint+0x80>
movsd  -0x8(%rbp),%xmm0
call   1030 <fabsk@plt>
movsd  0xe8a(%rip),%xmm1
ucomisd %xmm1,%xmm0
setae  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xisint>:
push   %rax
movsd  0xee7(%rip),%xmm1
mulsd  %xmm0,%xmm1
cvttpd2dq %xmm1,%xmm1
cvtdq2pd %xmm1,%xmm1
mulsd  0xedb(%rip),%xmm1
addsd  %xmm0,%xmm1
cvttpd2dq %xmm1,%xmm2
cvtdq2pd %xmm2,%xmm2
mov    $0x1,%eax
ucomisd %xmm2,%xmm1
jne    1148 <xisint+0x38>
jp     1148 <xisint+0x38>
pop    %rcx
ret
call   1030 <fabsk@plt>
xor    %eax,%eax
ucomisd 0xeb9(%rip),%xmm0
setae  %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @xisint(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = fmul double %5, 0x3E00000000000000
%7 = fptosi double %6 to i32
%8 = sitofp i32 %7 to double
%9 = call double @llvm.fmuladd.f64(double 0xC1E0000000000000, double %8, double %4)
store double %9, double* %3
%10 = load double, double* %3
%11 = load double, double* %3
%12 = fptosi double %11 to i32
%13 = sitofp i32 %12 to double
%14 = fcmp oeq double %10, %13
br i1 %14, label %19, label %15
15: ; preds = %1
%16 = load double, double* %2
%17 = call double @fabsk(double %16)
%18 = fcmp oge double %17, 0x4340000000000000
br label %19
19: ; preds = %15, %1
%20 = phi i1 [ true, %1 ], [ %18, %15 ]
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @xisint(double %0) {
%2 = fmul double %0, 0x3E00000000000000
%3 = fptosi double %2 to i32
%4 = sitofp i32 %3 to double
%5 = tail call double @llvm.fmuladd.f64(double %4, double 0xC1E0000000000000, double %0)
%6 = fptosi double %5 to i32
%7 = sitofp i32 %6 to double
%8 = fcmp oeq double %5, %7
br i1 %8, label %13, label %9
9: ; preds = %1
%10 = tail call double @fabsk(double %0)
%11 = fcmp oge double %10, 0x4340000000000000
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %9, %1
%14 = phi i32 [ 1, %1 ], [ %12, %9 ]
ret i32 %14
}
int vbyte_len(unsigned int n) {
  unsigned int ret = 1;
  while (n >= 128) {
    n >>= 7;
    ret++;
  }
  return ret;
}


x86 assembly (clang, -O0):
<vbyte_len>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x80,-0x4(%rbp)
jb     1132 <vbyte_len+0x32>
mov    -0x4(%rbp),%eax
shr    $0x7,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <vbyte_len+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vbyte_len>:
mov    $0x1,%eax
cmp    $0x80,%edi
jb     1130 <vbyte_len+0x30>
mov    $0x1,%eax
mov    %edi,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
shr    $0x7,%ecx
add    $0x1,%eax
cmp    $0x3fff,%edi
mov    %ecx,%edi
ja     1120 <vbyte_len+0x20>
ret

LLVM IR (-O0):
define i32 @vbyte_len(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp uge i32 %5, 128
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = lshr i32 %8, 7
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @vbyte_len(i32 %0) {
%2 = icmp ugt i32 %0, 127
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 1, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = lshr i32 %5, 7
%7 = add nuw nsw i32 %4, 1
%8 = icmp ugt i32 %5, 16383
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %10
}
isnumber(s) char *s;
{
  register c;
  while (c = *s++)
    if (!isdigit(c))
      return (0);
  return (1);
}


x86 assembly (clang, -O0):
<isnumber>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     115c <isnumber+0x4c>
mov    -0x14(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
jne    1157 <isnumber+0x47>
movl   $0x0,-0x4(%rbp)
jmp    1163 <isnumber+0x53>
jmp    111c <isnumber+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isnumber>:
movsbl (%rdi),%eax
test   %eax,%eax
je     1116 <isnumber+0x16>
add    $0x1,%rdi
add    $0xffffffd0,%eax
cmp    $0xa,%eax
jb     1100 <isnumber>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isnumber(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
br label %5
5: ; preds = %16, %1
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %3
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %5
%12 = load i32, i32* %4
%13 = call i32 @isdigit(i32 %12)
%14 = icmp ne i32 %13, 0
br i1 %14, label %16, label %15
15: ; preds = %11
store i32 0, i32* %2
br label %18
16: ; preds = %11
br label %5
17: ; preds = %5
store i32 1, i32* %2
br label %18
18: ; preds = %17, %15
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @isnumber(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %8, %6 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = sext i8 %4 to i32
%8 = getelementptr inbounds i8, i8* %3, i64 1
%9 = add nsw i32 %7, -48
%10 = icmp ult i32 %9, 10
br i1 %10, label %2, label %11
11: ; preds = %2, %6
%12 = phi i32 [ 0, %6 ], [ 1, %2 ]
ret i32 %12
}
double radians(double degrees) {
  return degrees * 3.14159265358979323846 / 180;
}


x86 assembly (clang, -O0):
<radians>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xee2(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<radians>:
mulsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @radians(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 0x400921FB54442D18
%5 = fdiv double %4, 1.800000e+02
ret double %5
}

LLVM IR (-O2):
define double @radians(double %0) {
%2 = fmul double %0, 0x400921FB54442D18
%3 = fdiv double %2, 1.800000e+02
ret double %3
}
/* Type definitions */
struct conmgr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ conmgr_destroy_all(struct conmgr *);
int /*<<< orphan*/ free(struct conmgr *);
void conmgr_destroy(struct conmgr *conmgr) {
  conmgr_destroy_all(conmgr);
  free(conmgr);
}


x86 assembly (clang, -O0):
<conmgr_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <conmgr_destroy_all@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<conmgr_destroy>:
push   %rbx
mov    %rdi,%rbx
call   1040 <conmgr_destroy_all@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.conmgr = type { i32 }
define void @conmgr_destroy(%struct.conmgr* %0) {
%2 = alloca %struct.conmgr*
store %struct.conmgr* %0, %struct.conmgr** %2
%3 = load %struct.conmgr*, %struct.conmgr** %2
%4 = call i32 @conmgr_destroy_all(%struct.conmgr* %3)
%5 = load %struct.conmgr*, %struct.conmgr** %2
%6 = call i32 @free(%struct.conmgr* %5)
ret void
}

LLVM IR (-O2):
%struct.conmgr = type { i32 }
define void @conmgr_destroy(%struct.conmgr* %0) {
%2 = tail call i32 @conmgr_destroy_all(%struct.conmgr* %0)
%3 = tail call i32 @free(%struct.conmgr* %0)
ret void
}
/* Variables and functions */
void *calloc(size_t, size_t);
int /*<<< orphan*/ die(char *);
void *xcalloc(size_t nmemb, size_t sz) {
  void *ptr = calloc(nmemb, sz);
  if (!ptr)
    die("xcalloc failed\n");
  return ptr;
}


x86 assembly (clang, -O0):
<xcalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1158 <xcalloc+0x38>
lea    0xead(%rip),%rdi
call   1040 <die@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcalloc>:
push   %rbx
call   1030 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <xcalloc+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <die@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"xcalloc failed\0A\00"
define i8* @xcalloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 @die(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
@.str = [16 x i8] c"xcalloc failed\0A\00"
define noalias i8* @xcalloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @die(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ drftf1(int, float *, float *, float *, int *);
void __ogg_fdrfftf(int n, float *r, float *wsave, int *ifac) {
  if (n == 1)
    return;
  drftf1(n, r, wsave, wsave + n, ifac);
}


x86 assembly (clang, -O0):
<__ogg_fdrfftf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpl   $0x1,-0x4(%rbp)
jne    1136 <__ogg_fdrfftf+0x26>
jmp    1159 <__ogg_fdrfftf+0x49>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x18(%rbp),%rcx
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rcx
mov    -0x20(%rbp),%r8
call   1030 <drftf1@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ogg_fdrfftf>:
cmp    $0x1,%edi
jne    1116 <__ogg_fdrfftf+0x6>
ret
mov    %rcx,%r8
movslq %edi,%rax
lea    (%rdx,%rax,4),%rcx
jmp    1030 <drftf1@plt>

LLVM IR (-O0):
define void @__ogg_fdrfftf(i32 %0, float* %1, float* %2, i32* %3) {
%5 = alloca i32
%6 = alloca float*
%7 = alloca float*
%8 = alloca i32*
store i32 %0, i32* %5
store float* %1, float** %6
store float* %2, float** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %12
11: ; preds = %4
br label %22
12: ; preds = %4
%13 = load i32, i32* %5
%14 = load float*, float** %6
%15 = load float*, float** %7
%16 = load float*, float** %7
%17 = load i32, i32* %5
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds float, float* %16, i64 %18
%20 = load i32*, i32** %8
%21 = call i32 @drftf1(i32 %13, float* %14, float* %15, float* %19, i32* %20)
br label %22
22: ; preds = %12, %11
ret void
}

LLVM IR (-O2):
define void @__ogg_fdrfftf(i32 %0, float* %1, float* %2, i32* %3) {
%5 = icmp eq i32 %0, 1
br i1 %5, label %10, label %6
6: ; preds = %4
%7 = sext i32 %0 to i64
%8 = getelementptr inbounds float, float* %2, i64 %7
%9 = tail call i32 @drftf1(i32 %0, float* %1, float* %2, float* %8, i32* %3)
br label %10
10: ; preds = %4, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ s3c2410_nand_reset();
int /*<<< orphan*/ s3c2440_nand_reset();
void nand_reset(void) {
  if (((*(volatile unsigned int *)0x560000B0) == 0x32410000) ||
      ((*(volatile unsigned int *)0x560000B0) == 0x32410002)) {
    s3c2410_nand_reset();
  } else {
    s3c2440_nand_reset();
  }
}


x86 assembly (clang, -O0):
<nand_reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x560000b0,%eax
mov    (%rax),%eax
cmp    $0x32410000,%eax
je     1148 <nand_reset+0x28>
mov    $0x560000b0,%eax
mov    (%rax),%eax
cmp    $0x32410002,%eax
jne    1154 <nand_reset+0x34>
mov    $0x0,%al
call   1040 <s3c2410_nand_reset@plt>
jmp    115b <nand_reset+0x3b>
mov    $0x0,%al
call   1030 <s3c2440_nand_reset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_reset>:
mov    0x560000b0,%eax
cmp    $0x32410000,%eax
je     113c <nand_reset+0x1c>
mov    0x560000b0,%eax
cmp    $0x32410002,%eax
jne    1143 <nand_reset+0x23>
xor    %eax,%eax
jmp    1040 <s3c2410_nand_reset@plt>
xor    %eax,%eax
jmp    1030 <s3c2440_nand_reset@plt>

LLVM IR (-O0):
define void @nand_reset() {
%1 = load volatile i32, i32* inttoptr (i64 1442840752 to i32*)
%2 = icmp eq i32 %1, 843120640
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = load volatile i32, i32* inttoptr (i64 1442840752 to i32*)
%5 = icmp eq i32 %4, 843120642
br i1 %5, label %6, label %8
6: ; preds = %3, %0
%7 = call i32 (...) @s3c2410_nand_reset()
br label %10
8: ; preds = %3
%9 = call i32 (...) @s3c2440_nand_reset()
br label %10
10: ; preds = %8, %6
ret void
}

LLVM IR (-O2):
define void @nand_reset() {
%1 = load volatile i32, i32* inttoptr (i64 1442840752 to i32*)
%2 = icmp eq i32 %1, 843120640
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = load volatile i32, i32* inttoptr (i64 1442840752 to i32*)
%5 = icmp eq i32 %4, 843120642
br i1 %5, label %6, label %8
6: ; preds = %3, %0
%7 = tail call i32 (...) @s3c2410_nand_reset()
br label %10
8: ; preds = %3
%9 = tail call i32 (...) @s3c2440_nand_reset()
br label %10
10: ; preds = %8, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void print_successMsg(char *msg) { printf(" \n Success: %s \n", msg); }


x86 assembly (clang, -O0):
<print_successMsg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_successMsg>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [17 x i8] c" \0A Success: %s \0A\00"
define void @print_successMsg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c" \0A Success: %s \0A\00"
define void @print_successMsg(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct obj {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cintern(char *);
int /*<<< orphan*/ setvar(int /*<<< orphan*/, int /*<<< orphan*/, struct obj *);
void init_tar_version(void) {
  setvar(cintern("*tar-version*"),
         cintern("$Id: tar.c,v 1.1.1.1 2003/01/15 23:55:10 ulric Exp $"),
         ((struct obj *)0));
}


x86 assembly (clang, -O0):
<init_tar_version>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1040 <cintern@plt>
mov    %eax,-0x4(%rbp)
lea    0xed0(%rip),%rdi
call   1040 <cintern@plt>
mov    -0x4(%rbp),%edi
mov    %eax,%esi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <setvar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_tar_version>:
push   %rbx
lea    0xed8(%rip),%rdi
call   1040 <cintern@plt>
mov    %eax,%ebx
lea    0xed8(%rip),%rdi
call   1040 <cintern@plt>
mov    %ebx,%edi
mov    %eax,%esi
xor    %edx,%edx
pop    %rbx
jmp    1030 <setvar@plt>

LLVM IR (-O0):
%struct.obj = type { i32 }
@.str = [14 x i8] c"*tar-version*\00"
@.str.1 = [53 x i8] c"$Id: tar.c,v 1.1.1.1 2003/01/15 23:55:10 ulric Exp $\00"
define void @init_tar_version() {
%1 = call i32 @cintern(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @cintern(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @setvar(i32 %1, i32 %2, %struct.obj* null)
ret void
}

LLVM IR (-O2):
%struct.obj = type { i32 }
@.str = [14 x i8] c"*tar-version*\00"
@.str.1 = [53 x i8] c"$Id: tar.c,v 1.1.1.1 2003/01/15 23:55:10 ulric Exp $\00"
define void @init_tar_version() {
%1 = tail call i32 @cintern(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @cintern(i8* getelementptr inbounds ([53 x i8], [53 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @setvar(i32 %1, i32 %2, %struct.obj* null)
ret void
}
/* Variables and functions */
int diag_pass();
int pass(const char *msg) { return diag_pass(); }


x86 assembly (clang, -O0):
<pass>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <diag_pass@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pass>:
xor    %eax,%eax
jmp    1030 <diag_pass@plt>

LLVM IR (-O0):
define i32 @pass(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @diag_pass()
ret i32 %3
}

LLVM IR (-O2):
define i32 @pass(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @diag_pass()
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ NoDepC_func();
int /*<<< orphan*/ NoDepE_func();
void OneFunc() {
  NoDepC_func();
  NoDepE_func();
}


x86 assembly (clang, -O0):
<OneFunc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <NoDepC_func@plt>
mov    $0x0,%al
call   1030 <NoDepE_func@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OneFunc>:
push   %rax
xor    %eax,%eax
call   1040 <NoDepC_func@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <NoDepE_func@plt>

LLVM IR (-O0):
define void @OneFunc() {
%1 = call i32 (...) @NoDepC_func()
%2 = call i32 (...) @NoDepE_func()
ret void
}

LLVM IR (-O2):
define void @OneFunc() {
%1 = tail call i32 (...) @NoDepC_func()
%2 = tail call i32 (...) @NoDepE_func()
ret void
}
double Sleef_lgamma_u10(double x) { return __builtin_lgamma(x); }


x86 assembly (clang, -O0):
<Sleef_lgamma_u10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <lgamma@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleef_lgamma_u10>:
jmp    1030 <lgamma@plt>

LLVM IR (-O0):
define double @Sleef_lgamma_u10(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @lgamma(double %3)
ret double %4
}

LLVM IR (-O2):
define double @Sleef_lgamma_u10(double %0) {
%2 = tail call double @lgamma(double %0)
ret double %2
}
/* Variables and functions */
bool is_leapyear(int year) {
  return (((year % 4) == 0) && (((year % 100) != 0) || ((year % 400) == 0)));
}


x86 assembly (clang, -O0):
<is_leapyear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
jne    1153 <is_leapyear+0x53>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x6(%rbp)
jne    114d <is_leapyear+0x4d>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_leapyear>:
xor    %eax,%eax
test   $0x3,%dil
je     1109 <is_leapyear+0x9>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
mov    %ecx,%edx
ror    $0x2,%edx
mov    $0x1,%eax
cmp    $0x28f5c28,%edx
ja     1108 <is_leapyear+0x8>
ror    $0x4,%ecx
xor    %eax,%eax
cmp    $0xa3d70b,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @is_leapyear(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 4
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %16
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 100
%9 = icmp ne i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = srem i32 %11, 400
%13 = icmp eq i32 %12, 0
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ true, %6 ], [ %13, %10 ]
br label %16
16: ; preds = %14, %1
%17 = phi i1 [ false, %1 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @is_leapyear(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = srem i32 %0, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = srem i32 %0, 400
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %7, %1
%12 = phi i32 [ 0, %1 ], [ 1, %4 ], [ %10, %7 ]
ret i32 %12
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t ini_func2(uint32_t x) { return (x ^ (x >> 27)) * (1566083941U); }


x86 assembly (clang, -O0):
<ini_func2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x1b,%ecx
xor    %ecx,%eax
imul   $0x5d588b65,%eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ini_func2>:
mov    %edi,%eax
sar    $0x1b,%eax
xor    %edi,%eax
imul   $0x5d588b65,%eax,%eax
ret

LLVM IR (-O0):
define i32 @ini_func2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 %4, 27
%6 = xor i32 %3, %5
%7 = mul i32 %6, 1566083941
ret i32 %7
}

LLVM IR (-O2):
define i32 @ini_func2(i32 %0) {
%2 = ashr i32 %0, 27
%3 = xor i32 %2, %0
%4 = mul i32 %3, 1566083941
ret i32 %4
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMR64_get(void) { return U_WMRCORENONE_get("U_WMR64"); }


x86 assembly (clang, -O0):
<U_WMR64_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR64_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR64\00"
define i32 @U_WMR64_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR64\00"
define i32 @U_WMR64_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
char b_ascii_toupper(char c) { return (c >= 'a' && c <= 'z') ? (c - 32) : c; }


x86 assembly (clang, -O0):
<b_ascii_toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1133 <b_ascii_toupper+0x33>
movsbl -0x1(%rbp),%eax
cmp    $0x7a,%eax
jg     1133 <b_ascii_toupper+0x33>
movsbl -0x1(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x8(%rbp)
jmp    113a <b_ascii_toupper+0x3a>
movsbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_ascii_toupper>:
lea    -0x61(%rdi),%eax
lea    -0x20(%rdi),%ecx
cmp    $0x1a,%al
movzbl %cl,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @b_ascii_toupper(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = sub nsw i32 %12, 32
br label %17
14: ; preds = %6, %1
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
br label %17
17: ; preds = %14, %10
%18 = phi i32 [ %13, %10 ], [ %16, %14 ]
%19 = trunc i32 %18 to i8
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @b_ascii_toupper(i8 signext %0) {
%2 = add i8 %0, -97
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, -32
%5 = select i1 %3, i8 %4, i8 %0
ret i8 %5
}
int search(int val, const short *table, int size) {
  int i;
  for (i = 0; i < size; i++) {
    if (val <= *table++)
      return (i);
  }
  return (size);
}


x86 assembly (clang, -O0):
<search>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115c <search+0x5c>
mov    -0x8(%rbp),%eax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x2,%rdx
mov    %rdx,-0x10(%rbp)
movswl (%rcx),%ecx
cmp    %ecx,%eax
jg     1149 <search+0x49>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1162 <search+0x62>
jmp    114e <search+0x4e>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1115 <search+0x15>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<search>:
mov    %edx,%eax
test   %edx,%edx
jle    1120 <search+0x20>
mov    %eax,%eax
xor    %ecx,%ecx
nopw   0x0(%rax,%rax,1)
movswl (%rsi,%rcx,2),%edx
cmp    %edi,%edx
jge    1121 <search+0x21>
add    $0x1,%rcx
cmp    %ecx,%eax
jne    1110 <search+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @search(i32 %0, i16* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i16*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i16* %1, i16** %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %23, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %7
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %26
13: ; preds = %9
%14 = load i32, i32* %5
%15 = load i16*, i16** %6
%16 = getelementptr inbounds i16, i16* %15, i32 1
store i16* %16, i16** %6
%17 = load i16, i16* %15
%18 = sext i16 %17 to i32
%19 = icmp sle i32 %14, %18
br i1 %19, label %20, label %22
20: ; preds = %13
%21 = load i32, i32* %8
store i32 %21, i32* %4
br label %28
22: ; preds = %13
br label %23
23: ; preds = %22
%24 = load i32, i32* %8
%25 = add nsw i32 %24, 1
store i32 %25, i32* %8
br label %9
26: ; preds = %9
%27 = load i32, i32* %7
store i32 %27, i32* %4
br label %28
28: ; preds = %26, %20
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @search(i32 %0, i16* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %15
5: ; preds = %3, %11
%6 = phi i32 [ %13, %11 ], [ 0, %3 ]
%7 = phi i16* [ %12, %11 ], [ %1, %3 ]
%8 = load i16, i16* %7
%9 = sext i16 %8 to i32
%10 = icmp slt i32 %9, %0
br i1 %10, label %11, label %15
11: ; preds = %5
%12 = getelementptr inbounds i16, i16* %7, i64 1
%13 = add nuw nsw i32 %6, 1
%14 = icmp eq i32 %13, %2
br i1 %14, label %15, label %5
15: ; preds = %5, %11, %3
%16 = phi i32 [ %2, %3 ], [ %2, %11 ], [ %6, %5 ]
ret i32 %16
}