xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  int a = 10;
  switch (a) {
  case '1':
    printf("ONE\n");
    break;
  case '2':
    printf("TWO\n");
    break;
  defa1ut:
    printf("NONE\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x31,%eax
je     114b <main+0x3b>
jmp    113a <main+0x2a>
mov    -0xc(%rbp),%eax
sub    $0x32,%eax
je     115c <main+0x4c>
jmp    1168 <main+0x58>
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
jmp    1168 <main+0x58>
lea    0xe9d(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"ONE\0A\00"
@.str.1 = [5 x i8] c"TWO\0A\00"
@.str.2 = [6 x i8] c"NONE\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %10 [
i32 49, label %4
i32 50, label %6
]
4: ; preds = %0
%5 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %10
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
br label %10
8: ; No predecessors!
%9 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
br label %10
10: ; preds = %8, %0, %6, %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
char *lua_opt_string(int, char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ lua_printstack(int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void errorfb(void) {
  char *s = lua_opt_string(1, "(no messsage)", NULL);
  fprintf(stderr, "lua: %s\n", s);
  lua_printstack(stderr);
}


x86 assembly (clang, -O0):
<errorfb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
lea    0xebc(%rip),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1050 <lua_opt_string@plt>
mov    %rax,-0x8(%rbp)
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xea9(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e6f(%rip),%rax
mov    (%rax),%edi
call   1040 <lua_printstack@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<errorfb>:
push   %rbx
lea    0xec8(%rip),%rsi
mov    $0x1,%edi
xor    %edx,%edx
call   1050 <lua_opt_string@plt>
mov    0x2e95(%rip),%rbx
mov    (%rbx),%edi
lea    0xeba(%rip),%rsi
mov    %rax,%rdx
call   1030 <fprintf@plt>
mov    (%rbx),%edi
pop    %rbx
jmp    1040 <lua_printstack@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"(no messsage)\00"
@stderr = global i32 0
@.str.1 = [9 x i8] c"lua: %s\0A\00"
define void @errorfb() {
%1 = alloca i8*
%2 = call i8* @lua_opt_string(i32 1, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32* null)
store i8* %2, i8** %1
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %1
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @stderr
%7 = call i32 @lua_printstack(i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"(no messsage)\00"
@stderr = global i32 0
@.str.1 = [9 x i8] c"lua: %s\0A\00"
define void @errorfb() {
%1 = tail call i8* @lua_opt_string(i32 1, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32* null)
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* %1)
%4 = load i32, i32* @stderr
%5 = tail call i32 @lua_printstack(i32 %4)
ret void
}
int prcmu_stop_temp_sense(void) { return 0; }


x86 assembly (clang, -O0):
<prcmu_stop_temp_sense>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prcmu_stop_temp_sense>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @prcmu_stop_temp_sense() {
ret i32 0
}

LLVM IR (-O2):
define i32 @prcmu_stop_temp_sense() {
ret i32 0
}
__attribute__((no)) long trampoline_allocset_tcb(unsigned long n1) {
  long ret;
  __asm__ __volatile__("leaq 1f(%%rip), %%r11\n\t"
                       "movq %%r11, %%fs:0x20\n\t"
                       "jmpq *%%gs:0x10000+"
                       "0x78"
                       "\n\t"
                       "1:\n\t"
                       : "=a"(ret)
                       : "D"(n1)
                       : "memory");
  return ret;
}


x86 assembly (clang, -O0):
<trampoline_allocset_tcb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0x11(%rip),%r11
mov    %r11,%fs:0x20
jmp    *%gs:0x10078
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trampoline_allocset_tcb>:
lea    0x11(%rip),%r11
mov    %r11,%fs:0x20
jmp    *%gs:0x10078
ret

LLVM IR (-O0):
define i64 @trampoline_allocset_tcb(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 asm sideeffect "leaq 1f(%rip), %r11\0A\09movq %r11, %fs:0x20\0A\09jmpq *%gs:0x10000+0x78\0A\091:\0A\09", "={ax},{di},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @trampoline_allocset_tcb(i64 %0) {
%2 = tail call i64 asm sideeffect "leaq 1f(%rip), %r11\0A\09movq %r11, %fs:0x20\0A\09jmpq *%gs:0x10000+0x78\0A\091:\0A\09", "={ax},{di},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %0)
ret i64 %2
}
int pcwd_temp_close(struct inode *inode, struct file *file) {
  { return (0); }
}


x86 assembly (clang, -O0):
<pcwd_temp_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcwd_temp_close>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.inode = type opaque
%struct.file = type opaque
define i32 @pcwd_temp_close(%struct.inode* %0, %struct.file* %1) {
%3 = alloca %struct.inode*
%4 = alloca %struct.file*
store %struct.inode* %0, %struct.inode** %3
store %struct.file* %1, %struct.file** %4
ret i32 0
}

LLVM IR (-O2):
%struct.inode = type opaque
%struct.file = type opaque
define i32 @pcwd_temp_close(%struct.inode* nocapture readnone %0, %struct.file* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __syscall(int, int, int /*<<< orphan*/, int /*<<< orphan*/,
                             int /*<<< orphan*/, int /*<<< orphan*/,
                             int /*<<< orphan*/, int /*<<< orphan*/,
                             int /*<<< orphan*/);
void close(int fd) { __syscall(2, (fd), (0), (0), (0), (0), (0), (0), (0)); }


x86 assembly (clang, -O0):
<close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x2,%edi
xor    %r9d,%r9d
mov    %r9d,%edx
mov    %r9d,%ecx
mov    %r9d,%r8d
movl   $0x0,(%rsp)
movl   $0x0,0x8(%rsp)
movl   $0x0,0x10(%rsp)
call   1030 <__syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close>:
push   %rax
mov    %edi,%esi
sub    $0x8,%rsp
mov    $0x2,%edi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
push   $0x0
push   $0x0
push   $0x0
call   1030 <__syscall@plt>
add    $0x20,%rsp
pop    %rax
ret

LLVM IR (-O0):
define void @close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__syscall(i32 2, i32 %3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @close(i32 %0) {
%2 = tail call i32 @__syscall(i32 2, i32 %0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
ret void
}
int get_parity(unsigned long input) {
  int set_bits = 0;
  int i = 0;
  while (input) {
    if (input & 1)
      set_bits++;
    input = input >> 1;
    i++;
  }
  return set_bits;
}


x86 assembly (clang, -O0):
<get_parity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1156 <get_parity+0x56>
mov    -0x8(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     113c <get_parity+0x3c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1116 <get_parity+0x16>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_parity>:
xor    %eax,%eax
test   %rdi,%rdi
je     1123 <get_parity+0x23>
mov    %rdi,%rcx
nopw   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
shr    %rcx
cmp    $0x1,%rdi
mov    %rcx,%rdi
ja     1110 <get_parity+0x10>
ret

LLVM IR (-O0):
define i32 @get_parity(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %15, %1
%6 = load i64, i64* %2
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %20
8: ; preds = %5
%9 = load i64, i64* %2
%10 = and i64 %9, 1
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %8
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %15
15: ; preds = %12, %8
%16 = load i64, i64* %2
%17 = lshr i64 %16, 1
store i64 %17, i64* %2
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %5
20: ; preds = %5
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @get_parity(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i64 [ %9, %3 ], [ %0, %1 ]
%6 = trunc i64 %5 to i32
%7 = and i32 %6, 1
%8 = add nuw nsw i32 %7, %4
%9 = lshr i64 %5, 1
%10 = icmp ult i64 %5, 2
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %12
}
int constrain_int(int x, int min, int max) {
  if (min > max)
    return min;
  if (x < min)
    return min;
  else if (x > max)
    return max;
  else
    return x;
}


x86 assembly (clang, -O0):
<constrain_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    1124 <constrain_int+0x24>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1158 <constrain_int+0x58>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113b <constrain_int+0x3b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1158 <constrain_int+0x58>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    1152 <constrain_int+0x52>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1158 <constrain_int+0x58>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<constrain_int>:
cmp    %edx,%edi
mov    %edi,%eax
cmovg  %edx,%eax
cmp    %edx,%esi
cmovg  %esi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @constrain_int(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %7
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32, i32* %6
store i32 %12, i32* %4
br label %27
13: ; preds = %3
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load i32, i32* %6
store i32 %18, i32* %4
br label %27
19: ; preds = %13
%20 = load i32, i32* %5
%21 = load i32, i32* %7
%22 = icmp sgt i32 %20, %21
br i1 %22, label %23, label %25
23: ; preds = %19
%24 = load i32, i32* %7
store i32 %24, i32* %4
br label %27
25: ; preds = %19
%26 = load i32, i32* %5
store i32 %26, i32* %4
br label %27
27: ; preds = %25, %23, %17, %11
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @constrain_int(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, %2
%5 = icmp slt i32 %0, %1
%6 = or i1 %5, %4
%7 = icmp sgt i32 %0, %2
%8 = select i1 %7, i32 %2, i32 %0
%9 = select i1 %6, i32 %1, i32 %8
ret i32 %9
}
/* Variables and functions */
int acos(int /*<<< orphan*/);
float toRadian(int degrees) { return ((float)degrees) * (2 * acos(0)) / 180.0; }


x86 assembly (clang, -O0):
<toRadian>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
xor    %edi,%edi
call   1030 <acos@plt>
movss  -0x8(%rbp),%xmm0
shl    $0x1,%eax
cvtsi2ss %eax,%xmm1
mulss  %xmm1,%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeb8(%rip),%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<toRadian>:
push   %rax
cvtsi2ss %edi,%xmm0
movss  %xmm0,0x4(%rsp)
xor    %edi,%edi
call   1030 <acos@plt>
add    %eax,%eax
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
mulss  0x4(%rsp),%xmm0
divss  0xec7(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @toRadian(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to float
%5 = call i32 @acos(i32 0)
%6 = mul nsw i32 2, %5
%7 = sitofp i32 %6 to float
%8 = fmul float %4, %7
%9 = fpext float %8 to double
%10 = fdiv double %9, 1.800000e+02
%11 = fptrunc double %10 to float
ret float %11
}

LLVM IR (-O2):
define float @toRadian(i32 %0) {
%2 = sitofp i32 %0 to float
%3 = tail call i32 @acos(i32 0)
%4 = shl nsw i32 %3, 1
%5 = sitofp i32 %4 to float
%6 = fmul float %2, %5
%7 = fdiv float %6, 1.800000e+02
ret float %7
}
long unsigned int grecs_meta1_strlen(const char *grecs_meta1_str) {
  long unsigned int grecs_meta1_len;
  for (grecs_meta1_len = 0; grecs_meta1_str[grecs_meta1_len]; grecs_meta1_len++)
    continue;
  return grecs_meta1_len;
}


x86 assembly (clang, -O0):
<grecs_meta1_strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1138 <grecs_meta1_strlen+0x38>
jmp    1127 <grecs_meta1_strlen+0x27>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <grecs_meta1_strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<grecs_meta1_strlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <grecs_meta1_strlen+0x10>
ret

LLVM IR (-O0):
define i64 @grecs_meta1_strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* %5, i64 %6
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %4
br label %11
11: ; preds = %10
%12 = load i64, i64* %3
%13 = add i64 %12, 1
store i64 %13, i64* %3
br label %4
14: ; preds = %4
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @grecs_meta1_strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ DeinitFields();
void SwitchFrom_3201X(void) { DeinitFields(); }


x86 assembly (clang, -O0):
<SwitchFrom_3201X>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DeinitFields@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchFrom_3201X>:
xor    %eax,%eax
jmp    1030 <DeinitFields@plt>

LLVM IR (-O0):
define void @SwitchFrom_3201X() {
%1 = call i32 (...) @DeinitFields()
ret void
}

LLVM IR (-O2):
define void @SwitchFrom_3201X() {
%1 = tail call i32 (...) @DeinitFields()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ arm_memio_ldrb(int /*<<< orphan*/);
int /*<<< orphan*/ arm_memio_reg_op();
void arm_ldrb_reg() { arm_memio_ldrb(arm_memio_reg_op()); }


x86 assembly (clang, -O0):
<arm_ldrb_reg>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <arm_memio_reg_op@plt>
mov    %eax,%edi
call   1040 <arm_memio_ldrb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_ldrb_reg>:
push   %rax
xor    %eax,%eax
call   1030 <arm_memio_reg_op@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <arm_memio_ldrb@plt>

LLVM IR (-O0):
define void @arm_ldrb_reg() {
%1 = call i32 (...) @arm_memio_reg_op()
%2 = call i32 @arm_memio_ldrb(i32 %1)
ret void
}

LLVM IR (-O2):
define void @arm_ldrb_reg() {
%1 = tail call i32 (...) @arm_memio_reg_op()
%2 = tail call i32 @arm_memio_ldrb(i32 %1)
ret void
}
/* Variables and functions */
int fixed_point_sub(int, int /*<<< orphan*/);
int /*<<< orphan*/ int2fixed_point(int);
int fixed_point_sub_mixed(int x, int n) {
  return fixed_point_sub(x, int2fixed_point(n));
}


x86 assembly (clang, -O0):
<fixed_point_sub_mixed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <int2fixed_point@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1040 <fixed_point_sub@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fixed_point_sub_mixed>:
push   %rbx
mov    %edi,%ebx
mov    %esi,%edi
call   1030 <int2fixed_point@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1040 <fixed_point_sub@plt>

LLVM IR (-O0):
define i32 @fixed_point_sub_mixed(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @int2fixed_point(i32 %6)
%8 = call i32 @fixed_point_sub(i32 %5, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @fixed_point_sub_mixed(i32 %0, i32 %1) {
%3 = tail call i32 @int2fixed_point(i32 %1)
%4 = tail call i32 @fixed_point_sub(i32 %0, i32 %3)
ret i32 %4
}
int sign(int v) { return (((v) == 0) ? 0 : (((v) < 0) ? -1 : 1)); }


x86 assembly (clang, -O0):
<sign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    111b <sign+0x1b>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    1131 <sign+0x31>
mov    -0x4(%rbp),%edx
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%edx
cmovl  %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign>:
mov    %edi,%eax
sar    $0x1f,%eax
or     $0x1,%eax
test   %edi,%edi
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @sign(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp slt i32 %7, 0
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 -1, i32 1
br label %11
11: ; preds = %6, %5
%12 = phi i32 [ 0, %5 ], [ %10, %6 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @sign(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = icmp sgt i32 %0, -1
%4 = select i1 %3, i32 1, i32 -1
%5 = select i1 %2, i32 0, i32 %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ pB(char *);
void init_heap(void) {
  pB("SInt32 heap_base:R04;");
  pB("SInt32 heap_socket:R05;");
  pB("SInt32 heap_offset:R06;");
  pB("heap_base = 0;");
}


x86 assembly (clang, -O0):
<init_heap>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <pB@plt>
lea    0xeef(%rip),%rdi
call   1030 <pB@plt>
lea    0xefb(%rip),%rdi
call   1030 <pB@plt>
lea    0xf07(%rip),%rdi
call   1030 <pB@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_heap>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <pB@plt>
lea    0xef2(%rip),%rdi
call   1030 <pB@plt>
lea    0xefe(%rip),%rdi
call   1030 <pB@plt>
lea    0xf0a(%rip),%rdi
pop    %rax
jmp    1030 <pB@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"SInt32 heap_base:R04;\00"
@.str.1 = [24 x i8] c"SInt32 heap_socket:R05;\00"
@.str.2 = [24 x i8] c"SInt32 heap_offset:R06;\00"
@.str.3 = [15 x i8] c"heap_base = 0;\00"
define void @init_heap() {
%1 = call i32 @pB(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @pB(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @pB(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @pB(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"SInt32 heap_base:R04;\00"
@.str.1 = [24 x i8] c"SInt32 heap_socket:R05;\00"
@.str.2 = [24 x i8] c"SInt32 heap_offset:R06;\00"
@.str.3 = [15 x i8] c"heap_base = 0;\00"
define void @init_heap() {
%1 = tail call i32 @pB(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @pB(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @pB(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @pB(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.3, i64 0, i64 0))
ret void
}
void wpas_p2p_notif_connected(struct wpa_supplicant *wpa_s) {}


x86 assembly (clang, -O0):
<wpas_p2p_notif_connected>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpas_p2p_notif_connected>:
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
define void @wpas_p2p_notif_connected(%struct.wpa_supplicant* %0) {
%2 = alloca %struct.wpa_supplicant*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %2
ret void
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
define void @wpas_p2p_notif_connected(%struct.wpa_supplicant* nocapture %0) {
ret void
}
/* Variables and functions */
int __syscall(int, char const *);
int unlink(const char *f) { return __syscall(87, f); }


x86 assembly (clang, -O0):
<unlink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x57,%edi
call   1030 <__syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unlink>:
mov    %rdi,%rsi
mov    $0x57,%edi
jmp    1030 <__syscall@plt>

LLVM IR (-O0):
define i32 @unlink(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__syscall(i32 87, i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @unlink(i8* %0) {
%2 = tail call i32 @__syscall(i32 87, i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void caml_gr_close_graph() { exit(1); }


x86 assembly (clang, -O0):
<caml_gr_close_graph>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<caml_gr_close_graph>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @caml_gr_close_graph() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @caml_gr_close_graph() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(int);
int /*<<< orphan*/ run_ftp(int *, char *);
int main() {
  int *running = (int *)malloc(sizeof(int));
  *running = 1;
  run_ftp(running, "3370");
  free(running);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x10(%rbp),%rdi
lea    0xe9e(%rip),%rsi
call   1040 <run_ftp@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
movl   $0x1,(%rax)
lea    0xeb5(%rip),%rsi
mov    %rax,%rdi
call   1040 <run_ftp@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"3370\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i64 @malloc(i32 4)
%4 = inttoptr i64 %3 to i32*
store i32* %4, i32** %2
%5 = load i32*, i32** %2
store i32 1, i32* %5
%6 = load i32*, i32** %2
%7 = call i32 @run_ftp(i32* %6, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%8 = load i32*, i32** %2
%9 = call i32 @free(i32* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"3370\00"
define i32 @main() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
store i32 1, i32* %2
%3 = tail call i32 @run_ftp(i32* %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @free(i32* %2)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
void print_s_N(int16_t number) { printf("%hd\n", number); }


x86 assembly (clang, -O0):
<print_s_N>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_s_N>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%hd\0A\00"
define void @print_s_N(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%hd\0A\00"
define void @print_s_N(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Type definitions */
struct const_Vector_T {
  int dummy;
};
struct Vector_T {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ print_Vector_T(struct Vector_T const *);
void print_const_Vector_T(const struct const_Vector_T *const a) {
  print_Vector_T((const struct Vector_T *)a);
}


x86 assembly (clang, -O0):
<print_const_Vector_T>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <print_Vector_T@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_const_Vector_T>:
jmp    1030 <print_Vector_T@plt>

LLVM IR (-O0):
%struct.const_Vector_T = type { i32 }
%struct.Vector_T = type { i32 }
define void @print_const_Vector_T(%struct.const_Vector_T* %0) {
%2 = alloca %struct.const_Vector_T*
store %struct.const_Vector_T* %0, %struct.const_Vector_T** %2
%3 = load %struct.const_Vector_T*, %struct.const_Vector_T** %2
%4 = bitcast %struct.const_Vector_T* %3 to %struct.Vector_T*
%5 = call i32 @print_Vector_T(%struct.Vector_T* %4)
ret void
}

LLVM IR (-O2):
%struct.const_Vector_T = type { i32 }
%struct.Vector_T = type { i32 }
define void @print_const_Vector_T(%struct.const_Vector_T* %0) {
%2 = bitcast %struct.const_Vector_T* %0 to %struct.Vector_T*
%3 = tail call i32 @print_Vector_T(%struct.Vector_T* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ems1Stok(char const *, char *);
int /*<<< orphan*/ sprintf(char *, char *, float);
void emsSetr(const char *token, float rvalue) {
  char str[200];
  ;
  sprintf(str, "%g", rvalue);
  ems1Stok(token, str);
  return;
}


x86 assembly (clang, -O0):
<emsSetr>:
push   %rbp
mov    %rsp,%rbp
sub    $0xe0,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
lea    -0xe0(%rbp),%rdi
movss  -0xc(%rbp),%xmm0
lea    0xeb9(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
lea    -0xe0(%rbp),%rsi
call   1030 <ems1Stok@plt>
add    $0xe0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emsSetr>:
push   %r14
push   %rbx
sub    $0xc8,%rsp
mov    %rdi,%rbx
lea    0xecc(%rip),%rsi
mov    %rsp,%r14
mov    %r14,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <ems1Stok@plt>
add    $0xc8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%g\00"
define void @emsSetr(i8* %0, float %1) {
%3 = alloca i8*
%4 = alloca float
%5 = alloca [200 x i8]
store i8* %0, i8** %3
store float %1, float* %4
%6 = getelementptr inbounds [200 x i8], [200 x i8]* %5, i64 0, i64 0
%7 = load float, float* %4
%8 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float %7)
%9 = load i8*, i8** %3
%10 = getelementptr inbounds [200 x i8], [200 x i8]* %5, i64 0, i64 0
%11 = call i32 @ems1Stok(i8* %9, i8* %10)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%g\00"
define void @emsSetr(i8* %0, float %1) {
%3 = alloca [200 x i8]
%4 = getelementptr inbounds [200 x i8], [200 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float %1)
%6 = call i32 @ems1Stok(i8* %0, i8* %4)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t xor128() {
  static uint32_t x = 123456789;
  static uint32_t y = 362436069;
  static uint32_t z = 521288629;
  static uint32_t w = 88675123;
  uint32_t t;
  t = x ^ (x << 11);
  x = y;
  y = z;
  z = w;
  w = (w ^ (w >> 19)) ^ (t ^ (t >> 8));
  return w;
}


x86 assembly (clang, -O0):
<xor128>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f16(%rip),%eax
mov    0x2f10(%rip),%ecx
shl    $0xb,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    0x2f06(%rip),%eax
mov    %eax,0x2efc(%rip)
mov    0x2efe(%rip),%eax
mov    %eax,0x2ef4(%rip)
mov    0x2ef6(%rip),%eax
mov    %eax,0x2eec(%rip)
mov    0x2eea(%rip),%eax
mov    0x2ee4(%rip),%ecx
sar    $0x13,%ecx
xor    %ecx,%eax
mov    -0x4(%rbp),%ecx
mov    -0x4(%rbp),%edx
sar    $0x8,%edx
xor    %edx,%ecx
xor    %ecx,%eax
mov    %eax,0x2ecc(%rip)
mov    0x2ec6(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xor128>:
mov    0x2f1a(%rip),%ecx
mov    %ecx,%eax
shl    $0xb,%eax
xor    %ecx,%eax
mov    0x2f11(%rip),%ecx
mov    %ecx,0x2f07(%rip)
mov    0x2f09(%rip),%ecx
mov    %ecx,0x2eff(%rip)
mov    0x2f01(%rip),%ecx
mov    %ecx,0x2ef7(%rip)
mov    %eax,%edx
sar    $0x8,%edx
xor    %ecx,%eax
sar    $0x13,%ecx
xor    %edx,%eax
xor    %ecx,%eax
mov    %eax,0x2ee7(%rip)
ret

LLVM IR (-O0):
@xor128.x = internal global i32 123456789
@xor128.y = internal global i32 362436069
@xor128.z = internal global i32 521288629
@xor128.w = internal global i32 88675123
define i32 @xor128() {
%1 = alloca i32
%2 = load i32, i32* @xor128.x
%3 = load i32, i32* @xor128.x
%4 = shl i32 %3, 11
%5 = xor i32 %2, %4
store i32 %5, i32* %1
%6 = load i32, i32* @xor128.y
store i32 %6, i32* @xor128.x
%7 = load i32, i32* @xor128.z
store i32 %7, i32* @xor128.y
%8 = load i32, i32* @xor128.w
store i32 %8, i32* @xor128.z
%9 = load i32, i32* @xor128.w
%10 = load i32, i32* @xor128.w
%11 = ashr i32 %10, 19
%12 = xor i32 %9, %11
%13 = load i32, i32* %1
%14 = load i32, i32* %1
%15 = ashr i32 %14, 8
%16 = xor i32 %13, %15
%17 = xor i32 %12, %16
store i32 %17, i32* @xor128.w
%18 = load i32, i32* @xor128.w
ret i32 %18
}

LLVM IR (-O2):
@xor128.x = internal unnamed_addr global i32 123456789
@xor128.y = internal unnamed_addr global i32 362436069
@xor128.z = internal unnamed_addr global i32 521288629
@xor128.w = internal unnamed_addr global i32 88675123
define i32 @xor128() {
%1 = load i32, i32* @xor128.x
%2 = shl i32 %1, 11
%3 = xor i32 %2, %1
%4 = load i32, i32* @xor128.y
store i32 %4, i32* @xor128.x
%5 = load i32, i32* @xor128.z
store i32 %5, i32* @xor128.y
%6 = load i32, i32* @xor128.w
store i32 %6, i32* @xor128.z
%7 = ashr i32 %6, 19
%8 = ashr i32 %3, 8
%9 = xor i32 %8, %3
%10 = xor i32 %9, %6
%11 = xor i32 %10, %7
store i32 %11, i32* @xor128.w
ret i32 %11
}
int test_0(const char *x, int a, int b, int c) {
  if (x[a] == 92)
    return b;
  return c;
}


x86 assembly (clang, -O0):
<test_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x5c,%eax
jne    1131 <test_0+0x31>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1137 <test_0+0x37>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_0>:
mov    %edx,%eax
movslq %esi,%rdx
cmpb   $0x5c,(%rdi,%rdx,1)
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_0(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 92
br i1 %16, label %17, label %19
17: ; preds = %4
%18 = load i32, i32* %8
store i32 %18, i32* %5
br label %21
19: ; preds = %4
%20 = load i32, i32* %9
store i32 %20, i32* %5
br label %21
21: ; preds = %19, %17
%22 = load i32, i32* %5
ret i32 %22
}

LLVM IR (-O2):
define i32 @test_0(i8* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = sext i32 %1 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 92
%9 = select i1 %8, i32 %2, i32 %3
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern void shmem_longlong_min_to_all(long long *target, long long *source,
                                      int nreduce, int PE_start,
                                      int logPE_stride, int PE_size,
                                      long long *pWrk, long *pSync) {
  printf("\nOpenSHMEM Analyzer\n");
}


x86 assembly (clang, -O0):
<shmem_longlong_min_to_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_longlong_min_to_all>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0AOpenSHMEM Analyzer\0A\00"
define void @shmem_longlong_min_to_all(i64* %0, i64* %1, i32 %2, i32 %3, i32 %4, i32 %5, i64* %6, i64* %7) {
%9 = alloca i64*
%10 = alloca i64*
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i64*
%16 = alloca i64*
store i64* %0, i64** %9
store i64* %1, i64** %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i64* %6, i64** %15
store i64* %7, i64** %16
%17 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"\0AOpenSHMEM Analyzer\00"
define void @shmem_longlong_min_to_all(i64* nocapture readnone %0, i64* nocapture readnone %1, i32 %2, i32 %3, i32 %4, i32 %5, i64* nocapture readnone %6, i64* nocapture readnone %7) {
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
void echo_can_init(void) {}


x86 assembly (clang, -O0):
<echo_can_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<echo_can_init>:
ret

LLVM IR (-O0):
define void @echo_can_init() {
ret void
}

LLVM IR (-O2):
define void @echo_can_init() {
ret void
}
/* Variables and functions */
int mulTable(int, int);
int divideTable(int element1, int element2, int lookupArray[]) {
  int divisionResult = mulTable(element1, lookupArray[element2]);
  return divisionResult;
}


x86 assembly (clang, -O0):
<divideTable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rax
movslq -0x8(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
call   1030 <mulTable@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<divideTable>:
movslq %esi,%rax
mov    (%rdx,%rax,4),%esi
jmp    1030 <mulTable@plt>

LLVM IR (-O0):
define i32 @divideTable(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%8 = load i32, i32* %4
%9 = load i32*, i32** %6
%10 = load i32, i32* %5
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %9, i64 %11
%13 = load i32, i32* %12
%14 = call i32 @mulTable(i32 %8, i32 %13)
store i32 %14, i32* %7
%15 = load i32, i32* %7
ret i32 %15
}

LLVM IR (-O2):
define i32 @divideTable(i32 %0, i32 %1, i32* nocapture %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %2, i64 %4
%6 = load i32, i32* %5
%7 = tail call i32 @mulTable(i32 %0, i32 %6)
ret i32 %7
}
/* Variables and functions */
unsigned int REG_SPI_BASE(unsigned int);
__attribute__((always_)) __attribute__((flatten)) unsigned int
SPI_CLOCK(unsigned int i) {
  return (REG_SPI_BASE(i) + 0x18);
}


x86 assembly (clang, -O0):
<SPI_CLOCK>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <REG_SPI_BASE@plt>
add    $0x18,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_CLOCK>:
push   %rax
call   1030 <REG_SPI_BASE@plt>
add    $0x18,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @SPI_CLOCK(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @REG_SPI_BASE(i32 %3)
%5 = add i32 %4, 24
ret i32 %5
}

LLVM IR (-O2):
define i32 @SPI_CLOCK(i32 %0) {
%2 = tail call i32 @REG_SPI_BASE(i32 %0)
%3 = add i32 %2, 24
ret i32 %3
}
/* Type definitions */
struct svc_req {
  int dummy;
};

/* Variables and functions */
int l2tp_tunnel_profile_list_1_svc(void *, struct svc_req *);
int _l2tp_tunnel_profile_list_1(void *argp, void *result,
                                struct svc_req *rqstp) {
  return (l2tp_tunnel_profile_list_1_svc(result, rqstp));
}


x86 assembly (clang, -O0):
<_l2tp_tunnel_profile_list_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <l2tp_tunnel_profile_list_1_svc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_l2tp_tunnel_profile_list_1>:
mov    %rsi,%rdi
mov    %rdx,%rsi
jmp    1030 <l2tp_tunnel_profile_list_1_svc@plt>

LLVM IR (-O0):
%struct.svc_req = type { i32 }
define i32 @_l2tp_tunnel_profile_list_1(i8* %0, i8* %1, %struct.svc_req* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca %struct.svc_req*
store i8* %0, i8** %4
store i8* %1, i8** %5
store %struct.svc_req* %2, %struct.svc_req** %6
%7 = load i8*, i8** %5
%8 = load %struct.svc_req*, %struct.svc_req** %6
%9 = call i32 @l2tp_tunnel_profile_list_1_svc(i8* %7, %struct.svc_req* %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.svc_req = type { i32 }
define i32 @_l2tp_tunnel_profile_list_1(i8* nocapture readnone %0, i8* %1, %struct.svc_req* %2) {
%4 = tail call i32 @l2tp_tunnel_profile_list_1_svc(i8* %1, %struct.svc_req* %2)
ret i32 %4
}
void g(int x, int *y, int z) {
  if (x < 2) {
    g(x + 1, y, z);
    *y = *y * 2;
  } else
    *y = z;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x2,-0x4(%rbp)
jge    1152 <g+0x42>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <g@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
shl    $0x1,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
jmp    115b <g+0x4b>
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %rbx
mov    %rsi,%rbx
cmp    $0x1,%edi
jg     1128 <g+0x18>
add    $0x1,%edi
mov    %rbx,%rsi
call   1030 <g@plt>
mov    (%rbx),%edx
add    %edx,%edx
mov    %edx,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @g(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 2
br i1 %8, label %9, label %18
9: ; preds = %3
%10 = load i32, i32* %4
%11 = add nsw i32 %10, 1
%12 = load i32*, i32** %5
%13 = load i32, i32* %6
%14 = load i32*, i32** %5
%15 = load i32, i32* %14
%16 = mul nsw i32 %15, 2
%17 = load i32*, i32** %5
store i32 %16, i32* %17
br label %21
18: ; preds = %3
%19 = load i32, i32* %6
%20 = load i32*, i32** %5
store i32 %19, i32* %20
br label %21
21: ; preds = %18, %9
ret void
}

LLVM IR (-O2):
define void @g(i32 %0, i32* nocapture %1, i32 %2) {
%4 = icmp slt i32 %0, 2
br i1 %4, label %5, label %9
5: ; preds = %3
%6 = add nsw i32 %0, 1
tail call void @g(i32 %6, i32* %1, i32 %2)
%7 = load i32, i32* %1
%8 = shl nsw i32 %7, 1
br label %9
9: ; preds = %3, %5
%10 = phi i32 [ %8, %5 ], [ %2, %3 ]
store i32 %10, i32* %1
ret void
}
void clearsource(void) {}


x86 assembly (clang, -O0):
<clearsource>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearsource>:
ret

LLVM IR (-O0):
define void @clearsource() {
ret void
}

LLVM IR (-O2):
define void @clearsource() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay_ms(unsigned int);
void delay(unsigned int milliseconds) { delay_ms(milliseconds); }


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <delay_ms@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
jmp    1030 <delay_ms@plt>

LLVM IR (-O0):
define void @delay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @delay_ms(i32 %3)
ret void
}

LLVM IR (-O2):
define void @delay(i32 %0) {
%2 = tail call i32 @delay_ms(i32 %0)
ret void
}
int pldummy_ntk() { return 0; }


x86 assembly (clang, -O0):
<pldummy_ntk>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pldummy_ntk>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pldummy_ntk() {
ret i32 0
}

LLVM IR (-O2):
define i32 @pldummy_ntk() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void banner(void) {
  printf("RKWtool "
         "v0.1"
         " (C) Marcin Bukat 2014\n");
  printf("This is free software; see the source for copying conditions.  There "
         "is NO\n");
  printf("warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR "
         "PURPOSE.\n\n");
}


x86 assembly (clang, -O0):
<banner>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xefd(%rip),%rdi
call   1030 <printf@plt>
lea    0xf3d(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<banner>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeff(%rip),%rdi
call   1030 <puts@plt>
lea    0xf3e(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"RKWtool v0.1 (C) Marcin Bukat 2014\0A\00"
@.str.1 = [76 x i8] c"This is free software; see the source for copying conditions. There is NO\0A\00"
@.str.2 = [78 x i8] c"warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\0A\0A\00"
define void @banner() {
%1 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([76 x i8], [76 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [35 x i8] c"RKWtool v0.1 (C) Marcin Bukat 2014\00"
@str.3 = [75 x i8] c"This is free software; see the source for copying conditions. There is NO\00"
@str.4 = [77 x i8] c"warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\0A\00"
define void @banner() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([75 x i8], [75 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([77 x i8], [77 x i8]* @str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
double NAN;
double log(double);
double piemathLn(double a) {
  if (a <= 0) {
    return NAN;
  }
  return log(a);
}


x86 assembly (clang, -O0):
<piemathLn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jb     1140 <piemathLn+0x30>
mov    0x2ec6(%rip),%rax
movsd  (%rax),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    114f <piemathLn+0x3f>
movsd  -0x10(%rbp),%xmm0
call   1030 <log@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<piemathLn>:
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
jae    111f <piemathLn+0xf>
jmp    1030 <log@plt>
mov    0x2ed2(%rip),%rax
movsd  (%rax),%xmm0
ret

LLVM IR (-O0):
@NAN = global double 0.000000e+00
define double @piemathLn(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ole double %4, 0.000000e+00
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load double, double* @NAN
store double %7, double* %2
br label %11
8: ; preds = %1
%9 = load double, double* %3
%10 = call double @log(double %9)
store double %10, double* %2
br label %11
11: ; preds = %8, %6
%12 = load double, double* %2
ret double %12
}

LLVM IR (-O2):
@NAN = global double 0.000000e+00
define double @piemathLn(double %0) {
%2 = fcmp ugt double %0, 0.000000e+00
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = load double, double* @NAN
br label %7
5: ; preds = %1
%6 = tail call double @log(double %0)
br label %7
7: ; preds = %5, %3
%8 = phi double [ %4, %3 ], [ %6, %5 ]
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int i = 0;
  printf("%d", i);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
unsigned supereagle_generic_output_fmts(unsigned input_fmts) {
  return input_fmts;
}


x86 assembly (clang, -O0):
<supereagle_generic_output_fmts>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<supereagle_generic_output_fmts>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @supereagle_generic_output_fmts(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @supereagle_generic_output_fmts(i32 returned %0) {
ret i32 %0
}