xunge/DecIR huggingface dataset:
void SysCtlHoldSubSystemInReset(unsigned long ulResetConf) {
  unsigned long ulMWRAllow;
  ulMWRAllow = (*((volatile unsigned long *)(0x400FB980)));
  (*((volatile unsigned long *)(0x400FB980))) = 0xA5A5A5A5;
  (*((volatile unsigned long *)(0x400FB8C0))) &=
      ~((ulResetConf & 0x00000003) << 16);
  (*((volatile unsigned long *)(0x400FB980))) = ulMWRAllow;
}


x86 assembly (clang, -O0):
<SysCtlHoldSubSystemInReset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x400fb980,%eax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    $0x400fb980,%eax
mov    $0xa5a5a5a5,%ecx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
and    $0x3,%rax
shl    $0x10,%rax
xor    $0xffffffffffffffff,%rax
mov    $0x400fb8c0,%ecx
mov    (%rcx),%rcx
and    %rax,%rcx
mov    $0x400fb8c0,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rcx
mov    $0x400fb980,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlHoldSubSystemInReset>:
mov    0x400fb980,%rax
40
mov    $0xa5a5a5a5,%ecx
mov    %rcx,0x400fb980
40
shl    $0x10,%edi
not    %edi
or     $0xfffffffffffcffff,%rdi
and    %rdi,0x400fb8c0
40
mov    %rax,0x400fb980
40
ret

LLVM IR (-O0):
define void @SysCtlHoldSubSystemInReset(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store i64 %4, i64* %3
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%5 = load i64, i64* %2
%6 = and i64 %5, 3
%7 = shl i64 %6, 16
%8 = xor i64 %7, -1
%9 = load volatile i64, i64* inttoptr (i64 1074772160 to i64*)
%10 = and i64 %9, %8
store volatile i64 %10, i64* inttoptr (i64 1074772160 to i64*)
%11 = load i64, i64* %3
store volatile i64 %11, i64* inttoptr (i64 1074772352 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysCtlHoldSubSystemInReset(i64 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%3 = shl i64 %0, 16
%4 = and i64 %3, 196608
%5 = xor i64 %4, -1
%6 = load volatile i64, i64* inttoptr (i64 1074772160 to i64*)
%7 = and i64 %6, %5
store volatile i64 %7, i64* inttoptr (i64 1074772160 to i64*)
store volatile i64 %2, i64* inttoptr (i64 1074772352 to i64*)
ret void
}
int while_upto20_bad(int m) {
  while (m < 20) {
    int l = 0;
    m++;
  }
  return m;
}


x86 assembly (clang, -O0):
<while_upto20_bad>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x14,-0x4(%rbp)
jge    1126 <while_upto20_bad+0x26>
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1107 <while_upto20_bad+0x7>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<while_upto20_bad>:
cmp    $0x15,%edi
mov    $0x14,%eax
cmovge %edi,%eax
ret

LLVM IR (-O0):
define i32 @while_upto20_bad(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 20
br i1 %6, label %7, label %10
7: ; preds = %4
store i32 0, i32* %3
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
br label %4
10: ; preds = %4
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @while_upto20_bad(i32 %0) {
%2 = call i32 @llvm.smax.i32(i32 %0, i32 20)
ret i32 %2
}
long _zdb_getLWPnum() { return 101010; }


x86 assembly (clang, -O0):
<_zdb_getLWPnum>:
push   %rbp
mov    %rsp,%rbp
mov    $0x18a92,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_zdb_getLWPnum>:
mov    $0x18a92,%eax
ret

LLVM IR (-O0):
define i64 @_zdb_getLWPnum() {
ret i64 101010
}

LLVM IR (-O2):
define i64 @_zdb_getLWPnum() {
ret i64 101010
}
/* Variables and functions */
scalar_t__ malloc(int);
int main() {
  int i = 10;
  char *x = (char *)malloc(i * sizeof(char));
  while (--i) {
    ++x;
    *x = 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
movslq -0x8(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
je     1163 <main+0x53>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
jmp    1139 <main+0x29>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1030 <malloc@plt>
movq   $0x0,0x1(%rax)
movb   $0x0,0x9(%rax)
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8*
store i32 0, i32* %1
store i32 10, i32* %2
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = mul i64 %5, 1
%7 = trunc i64 %6 to i32
%8 = call i64 @malloc(i32 %7)
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %3
br label %10
10: ; preds = %14, %0
%11 = load i32, i32* %2
%12 = add nsw i32 %11, -1
store i32 %12, i32* %2
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
%17 = load i8*, i8** %3
store i8 0, i8* %17
br label %10
18: ; preds = %10
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @malloc(i32 10)
%2 = inttoptr i64 %1 to i8*
%3 = getelementptr i8, i8* %2, i64 1
ret i32 0
}
int is_letter(char c) {
  return (((c >= 'a') && (c <= 'z')) || ((c >= 'A') && (c <= 'Z')));
}


x86 assembly (clang, -O0):
<is_letter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x61,%eax
jl     1129 <is_letter+0x29>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7a,%ecx
mov    %al,-0x2(%rbp)
jle    114e <is_letter+0x4e>
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x41,%ecx
mov    %al,-0x3(%rbp)
jl     1148 <is_letter+0x48>
movsbl -0x1(%rbp),%eax
cmp    $0x5a,%eax
setle  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_letter>:
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_letter(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 122
br i1 %9, label %20, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sge i32 %12, 65
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 90
br label %18
18: ; preds = %14, %10
%19 = phi i1 [ false, %10 ], [ %17, %14 ]
br label %20
20: ; preds = %18, %6
%21 = phi i1 [ true, %6 ], [ %19, %18 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_letter(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int rand();
int /*<<< orphan*/ srand(int);
int time(int /*<<< orphan*/);
int main() {
  int segundos = time(0);
  srand(segundos);
  int n1 = rand();
  int n2 = rand();
  printf("%d %d\n", n1, n2);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1050 <time@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <srand@plt>
mov    $0x0,%al
call   1060 <rand@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1060 <rand@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xe85(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %edi,%edi
call   1050 <time@plt>
mov    %eax,%edi
call   1040 <srand@plt>
xor    %eax,%eax
call   1060 <rand@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1060 <rand@plt>
lea    0xe9a(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%d %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i32 @time(i32 0)
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = call i32 @srand(i32 %5)
%7 = call i32 (...) @rand()
store i32 %7, i32* %2
%8 = call i32 (...) @rand()
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%d %d\0A\00"
define i32 @main() {
%1 = tail call i32 @time(i32 0)
%2 = tail call i32 @srand(i32 %1)
%3 = tail call i32 (...) @rand()
%4 = tail call i32 (...) @rand()
%5 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ newline();
int /*<<< orphan*/ output_immediate(int);
int /*<<< orphan*/ output_with_tab(char *);
void gnargs(int d) {
  output_with_tab("ldu ");
  output_immediate(d);
  newline();
}


x86 assembly (clang, -O0):
<gnargs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xebe(%rip),%rdi
call   1040 <output_with_tab@plt>
mov    -0x4(%rbp),%edi
call   1050 <output_immediate@plt>
mov    $0x0,%al
call   1030 <newline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gnargs>:
push   %rbx
mov    %edi,%ebx
lea    0xec6(%rip),%rdi
call   1040 <output_with_tab@plt>
mov    %ebx,%edi
call   1050 <output_immediate@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <newline@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"ldu \00"
define void @gnargs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @output_with_tab(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @output_immediate(i32 %4)
%6 = call i32 (...) @newline()
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"ldu \00"
define void @gnargs(i32 %0) {
%2 = tail call i32 @output_with_tab(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @output_immediate(i32 %0)
%4 = tail call i32 (...) @newline()
ret void
}
unsigned long append_1(prefix)
unsigned long prefix;
{
  static unsigned short prefix_bit[16] = {
      0x8000, 0x4000, 0x2000, 0x1000, 0x0800, 0x0400, 0x0200, 0x0100,
      0x0080, 0x0040, 0x0020, 0x0010, 0x0008, 0x0004, 0x0002, 0x0001};
  unsigned char len = (prefix >> 16) & 0xf;
  return (append_0(prefix) + prefix_bit[len]);
}


x86 assembly (clang, -O0):
<append_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x10,%rax
and    $0xf,%rax
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <append_0@plt>
movzbl -0x9(%rbp),%ecx
mov    %ecx,%edx
lea    0x2eed(%rip),%rcx
movzwl (%rcx,%rdx,2),%ecx
add    %ecx,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<append_1>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <append_0@plt>
shr    $0xf,%rbx
and    $0x1e,%ebx
lea    0xed7(%rip),%rcx
movzwl (%rbx,%rcx,1),%ecx
cltq
add    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@append_1.prefix_bit = internal global [16 x i16] [i16 -32768, i16 16384, i16 8192, i16 4096, i16 2048, i16 1024, i16 512, i16 256, i16 128, i16 64, i16 32, i16 16, i16 8, i16 4, i16 2, i16 1]
define i64 @append_1(i64 %0) {
%2 = alloca i64
%3 = alloca i8
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = lshr i64 %4, 16
%6 = and i64 %5, 15
%7 = trunc i64 %6 to i8
store i8 %7, i8* %3
%8 = load i64, i64* %2
%9 = call i32 (i64, ...) bitcast (i32 (...)* @append_0 to i32 (i64, ...)*)(i64 %8)
%10 = load i8, i8* %3
%11 = zext i8 %10 to i64
%12 = getelementptr inbounds [16 x i16], [16 x i16]* @append_1.prefix_bit, i64 0, i64 %11
%13 = load i16, i16* %12
%14 = zext i16 %13 to i32
%15 = add nsw i32 %9, %14
%16 = sext i32 %15 to i64
ret i64 %16
}

LLVM IR (-O2):
@append_1.prefix_bit = internal unnamed_addr constant [16 x i16] [i16 -32768, i16 16384, i16 8192, i16 4096, i16 2048, i16 1024, i16 512, i16 256, i16 128, i16 64, i16 32, i16 16, i16 8, i16 4, i16 2, i16 1]
define i64 @append_1(i64 %0) {
%2 = lshr i64 %0, 16
%3 = and i64 %2, 15
%4 = tail call i32 (i64, ...) bitcast (i32 (...)* @append_0 to i32 (i64, ...)*)(i64 %0)
%5 = getelementptr inbounds [16 x i16], [16 x i16]* @append_1.prefix_bit, i64 0, i64 %3
%6 = load i16, i16* %5
%7 = zext i16 %6 to i32
%8 = add nsw i32 %4, %7
%9 = sext i32 %8 to i64
ret i64 %9
}
void C(int *p) { *p = 0x12; }


x86 assembly (clang, -O0):
<C>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x12,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<C>:
movl   $0x12,(%rdi)
ret

LLVM IR (-O0):
define void @C(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 18, i32* %3
ret void
}

LLVM IR (-O2):
define void @C(i32* nocapture writeonly %0) {
store i32 18, i32* %0
ret void
}
unsigned char inc_node_version(unsigned char version) { return ++version; }


x86 assembly (clang, -O0):
<inc_node_version>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
add    $0x1,%al
mov    %al,-0x1(%rbp)
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inc_node_version>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define zeroext i8 @inc_node_version(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = add i8 %3, 1
store i8 %4, i8* %2
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @inc_node_version(i8 zeroext %0) {
%2 = add i8 %0, 1
ret i8 %2
}
/* Variables and functions */
int strlen(char *);
void chop(char *s) {
  int l = strlen(s);
  if (l > 0 && (s[l - 1] == '\r' || s[l - 1] == '\n')) {
    s[l - 1] = '\0';
  }
}


x86 assembly (clang, -O0):
<chop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1177 <chop+0x67>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xd,%eax
je     1166 <chop+0x56>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    1177 <chop+0x67>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chop>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
test   %eax,%eax
jle    1131 <chop+0x21>
add    $0xffffffff,%eax
mov    (%rbx,%rax,1),%cl
cmp    $0xd,%cl
je     112d <chop+0x1d>
cmp    $0xa,%cl
jne    1131 <chop+0x21>
movb   $0x0,(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
define void @chop(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %32
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 1
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 13
br i1 %16, label %26, label %17
17: ; preds = %8
%18 = load i8*, i8** %2
%19 = load i32, i32* %3
%20 = sub nsw i32 %19, 1
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %18, i64 %21
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 10
br i1 %25, label %26, label %32
26: ; preds = %17, %8
%27 = load i8*, i8** %2
%28 = load i32, i32* %3
%29 = sub nsw i32 %28, 1
%30 = sext i32 %29 to i64
%31 = getelementptr inbounds i8, i8* %27, i64 %30
store i8 0, i8* %31
br label %32
32: ; preds = %26, %17, %1
ret void
}

LLVM IR (-O2):
define void @chop(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %10
4: ; preds = %1
%5 = add nsw i32 %2, -1
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
switch i8 %8, label %10 [
i8 13, label %9
i8 10, label %9
]
9: ; preds = %4, %4
store i8 0, i8* %7
br label %10
10: ; preds = %4, %9, %1
ret void
}
/* Variables and functions */
int mkstemp(char *);
int /*<<< orphan*/ strcpy(char *, char *);
int /*<<< orphan*/ unlink(char *);
int xyz_netmodel_tempfd() {
  int lock_fd;
  char lock_file[1024];
  strcpy(lock_file, "/tmp/xyz_netmode_forkpool.XXXXXX");
  lock_fd = mkstemp(lock_file);
  if (lock_fd == -1) {
    return -1;
  }
  unlink(lock_file);
  return lock_fd;
}


x86 assembly (clang, -O0):
<xyz_netmodel_tempfd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
lea    -0x410(%rbp),%rdi
lea    0xeb7(%rip),%rsi
call   1040 <strcpy@plt>
lea    -0x410(%rbp),%rdi
call   1050 <mkstemp@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
jne    1173 <xyz_netmodel_tempfd+0x43>
movl   $0xffffffff,-0x4(%rbp)
jmp    1185 <xyz_netmodel_tempfd+0x55>
lea    -0x410(%rbp),%rdi
call   1030 <unlink@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x410,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xyz_netmodel_tempfd>:
push   %rbx
sub    $0x400,%rsp
lea    0xec1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <strcpy@plt>
mov    %rbx,%rdi
call   1050 <mkstemp@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
je     1161 <xyz_netmodel_tempfd+0x31>
mov    %rsp,%rdi
call   1030 <unlink@plt>
mov    %ebx,%eax
add    $0x400,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [33 x i8] c"/tmp/xyz_netmode_forkpool.XXXXXX\00"
define i32 @xyz_netmodel_tempfd() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [1024 x i8]
%4 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%5 = call i32 @strcpy(i8* %4, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%6 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%7 = call i32 @mkstemp(i8* %6)
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = icmp eq i32 %8, -1
br i1 %9, label %10, label %11
10: ; preds = %0
store i32 -1, i32* %1
br label %15
11: ; preds = %0
%12 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%13 = call i32 @unlink(i8* %12)
%14 = load i32, i32* %2
store i32 %14, i32* %1
br label %15
15: ; preds = %11, %10
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
@.str = [33 x i8] c"/tmp/xyz_netmode_forkpool.XXXXXX\00"
define i32 @xyz_netmodel_tempfd() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = call i32 @strcpy(i8* %2, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @mkstemp(i8* %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %8, label %6
6: ; preds = %0
%7 = call i32 @unlink(i8* %2)
br label %8
8: ; preds = %0, %6
ret i32 %4
}
__attribute__((always_)) void pci_iov_release(struct pci_dev *dev) {}


x86 assembly (clang, -O0):
<pci_iov_release>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_iov_release>:
ret

LLVM IR (-O0):
%struct.pci_dev = type opaque
define void @pci_iov_release(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
store %struct.pci_dev* %0, %struct.pci_dev** %2
ret void
}

LLVM IR (-O2):
%struct.pci_dev = type opaque
define void @pci_iov_release(%struct.pci_dev* nocapture %0) {
ret void
}
void gtk_expander_set_expanded() {}


x86 assembly (clang, -O0):
<gtk_expander_set_expanded>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_expander_set_expanded>:
ret

LLVM IR (-O0):
define void @gtk_expander_set_expanded() {
ret void
}

LLVM IR (-O2):
define void @gtk_expander_set_expanded() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int main() {
  int i;
  for (i = 10; i >= 1; i /= 2) {
    printf("%d ", i++);
    if (i == 2)
      break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jl     116e <main+0x5e>
mov    -0x8(%rbp),%esi
mov    %esi,%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
cmpl   $0x2,-0x8(%rbp)
jne    1156 <main+0x46>
jmp    116e <main+0x5e>
jmp    115b <main+0x4b>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0xa,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x5,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
br label %3
3: ; preds = %14, %0
%4 = load i32, i32* %2
%5 = icmp sge i32 %4, 1
br i1 %5, label %6, label %17
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
%10 = load i32, i32* %2
%11 = icmp eq i32 %10, 2
br i1 %11, label %12, label %13
12: ; preds = %6
br label %17
13: ; preds = %6
br label %14
14: ; preds = %13
%15 = load i32, i32* %2
%16 = sdiv i32 %15, 2
store i32 %16, i32* %2
br label %3
17: ; preds = %12, %3
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 10)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 5)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 2)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 1)
ret i32 0
}
/* Type definitions */
typedef scalar_t__ __u32;

/* Variables and functions */
scalar_t__ ceph_frag_bits(scalar_t__);
__u32 ceph_frag_mask_shift(__u32 f) { return 24 - ceph_frag_bits(f); }


x86 assembly (clang, -O0):
<ceph_frag_mask_shift>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ceph_frag_bits@plt>
mov    %rax,%rcx
mov    $0x18,%eax
sub    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_frag_mask_shift>:
push   %rax
call   1030 <ceph_frag_bits@plt>
mov    $0x18,%ecx
sub    %rax,%rcx
mov    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @ceph_frag_mask_shift(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @ceph_frag_bits(i64 %3)
%5 = sub nsw i64 24, %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @ceph_frag_mask_shift(i64 %0) {
%2 = tail call i64 @ceph_frag_bits(i64 %0)
%3 = sub nsw i64 24, %2
ret i64 %3
}
/* Variables and functions */
void my_bzero(void *buf, size_t n) {
  char *p = buf;
  while (n-- > 0)
    *p++ = 0;
}


x86 assembly (clang, -O0):
<my_bzero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x10(%rbp)
cmp    $0x0,%rax
jbe    1144 <my_bzero+0x44>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movb   $0x0,(%rax)
jmp    1114 <my_bzero+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_bzero>:
test   %rsi,%rsi
je     1124 <my_bzero+0x14>
push   %rax
mov    %rsi,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @my_bzero(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %11, %2
%8 = load i64, i64* %4
%9 = add i64 %8, -1
store i64 %9, i64* %4
%10 = icmp ugt i64 %8, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %5
store i8 0, i8* %12
br label %7
14: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @my_bzero(i8* nocapture writeonly %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %5, label %4
4: ; preds = %2
br label %5
5: ; preds = %4, %2
ret void
}
int tng_compress_nalgo(void) { return 4; }


x86 assembly (clang, -O0):
<tng_compress_nalgo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tng_compress_nalgo>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @tng_compress_nalgo() {
ret i32 4
}

LLVM IR (-O2):
define i32 @tng_compress_nalgo() {
ret i32 4
}
void mips_mem_config_check(struct config_t *config) {}


x86 assembly (clang, -O0):
<mips_mem_config_check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mips_mem_config_check>:
ret

LLVM IR (-O0):
%struct.config_t = type opaque
define void @mips_mem_config_check(%struct.config_t* %0) {
%2 = alloca %struct.config_t*
store %struct.config_t* %0, %struct.config_t** %2
ret void
}

LLVM IR (-O2):
%struct.config_t = type opaque
define void @mips_mem_config_check(%struct.config_t* nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ isdigit(char);
char tolower(char);
int convertdigit(char digit) {
  return isdigit(digit) ? digit - '0' : tolower(digit) - 'a';
}


x86 assembly (clang, -O0):
<convertdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
je     1150 <convertdigit+0x30>
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
jmp    1162 <convertdigit+0x42>
movsbl -0x1(%rbp),%edi
call   1040 <tolower@plt>
movsbl %al,%eax
sub    $0x61,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<convertdigit>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
mov    $0xffffffd0,%ecx
test   %rax,%rax
jne    1141 <convertdigit+0x21>
movsbl %bl,%edi
call   1040 <tolower@plt>
mov    %eax,%ebx
mov    $0xffffff9f,%ecx
movsbl %bl,%eax
add    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @convertdigit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @isdigit(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = sub nsw i32 %8, 48
br label %15
10: ; preds = %1
%11 = load i8, i8* %2
%12 = call signext i8 @tolower(i8 signext %11)
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 97
br label %15
15: ; preds = %10, %6
%16 = phi i32 [ %9, %6 ], [ %14, %10 ]
ret i32 %16
}

LLVM IR (-O2):
define i32 @convertdigit(i8 signext %0) {
%2 = tail call i64 @isdigit(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call signext i8 @tolower(i8 signext %0)
br label %6
6: ; preds = %1, %4
%7 = phi i8 [ %5, %4 ], [ %0, %1 ]
%8 = phi i32 [ -97, %4 ], [ -48, %1 ]
%9 = sext i8 %7 to i32
%10 = add nsw i32 %8, %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ prg(unsigned char *, int, unsigned char const *);
void expand_seed(unsigned char outseeds[67 * 32],
                 const unsigned char inseed[32]) {
  prg(outseeds, 67 * 32, inseed);
}


x86 assembly (clang, -O0):
<expand_seed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    $0x860,%esi
call   1030 <prg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expand_seed>:
mov    %rsi,%rdx
mov    $0x860,%esi
jmp    1030 <prg@plt>

LLVM IR (-O0):
define void @expand_seed(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @prg(i8* %5, i32 2144, i8* %6)
ret void
}

LLVM IR (-O2):
define void @expand_seed(i8* %0, i8* %1) {
%3 = tail call i32 @prg(i8* %0, i32 2144, i8* %1)
ret void
}
/* Type definitions */
struct yamc_sub_cmd_parser_params {
  int dummy;
};
struct yamc_sub_args_info {
  int dummy;
};

/* Variables and functions */
int yamc_sub_cmd_parser_internal(int, char **, struct yamc_sub_args_info *,
                                 struct yamc_sub_cmd_parser_params *,
                                 int /*<<< orphan*/);
int yamc_sub_cmd_parser_ext(int argc, char **argv,
                            struct yamc_sub_args_info *args_info,
                            struct yamc_sub_cmd_parser_params *params) {
  int result;
  result = yamc_sub_cmd_parser_internal(argc, argv, args_info, params, 0);
  return result;
}


x86 assembly (clang, -O0):
<yamc_sub_cmd_parser_ext>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %r8d,%r8d
call   1030 <yamc_sub_cmd_parser_internal@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yamc_sub_cmd_parser_ext>:
xor    %r8d,%r8d
jmp    1030 <yamc_sub_cmd_parser_internal@plt>

LLVM IR (-O0):
%struct.yamc_sub_args_info = type { i32 }
%struct.yamc_sub_cmd_parser_params = type { i32 }
define i32 @yamc_sub_cmd_parser_ext(i32 %0, i8** %1, %struct.yamc_sub_args_info* %2, %struct.yamc_sub_cmd_parser_params* %3) {
%5 = alloca i32
%6 = alloca i8**
%7 = alloca %struct.yamc_sub_args_info*
%8 = alloca %struct.yamc_sub_cmd_parser_params*
%9 = alloca i32
store i32 %0, i32* %5
store i8** %1, i8*** %6
store %struct.yamc_sub_args_info* %2, %struct.yamc_sub_args_info** %7
store %struct.yamc_sub_cmd_parser_params* %3, %struct.yamc_sub_cmd_parser_params** %8
%10 = load i32, i32* %5
%11 = load i8**, i8*** %6
%12 = load %struct.yamc_sub_args_info*, %struct.yamc_sub_args_info** %7
%13 = load %struct.yamc_sub_cmd_parser_params*, %struct.yamc_sub_cmd_parser_params** %8
%14 = call i32 @yamc_sub_cmd_parser_internal(i32 %10, i8** %11, %struct.yamc_sub_args_info* %12, %struct.yamc_sub_cmd_parser_params* %13, i32 0)
store i32 %14, i32* %9
%15 = load i32, i32* %9
ret i32 %15
}

LLVM IR (-O2):
%struct.yamc_sub_args_info = type { i32 }
%struct.yamc_sub_cmd_parser_params = type { i32 }
define i32 @yamc_sub_cmd_parser_ext(i32 %0, i8** %1, %struct.yamc_sub_args_info* %2, %struct.yamc_sub_cmd_parser_params* %3) {
%5 = tail call i32 @yamc_sub_cmd_parser_internal(i32 %0, i8** %1, %struct.yamc_sub_args_info* %2, %struct.yamc_sub_cmd_parser_params* %3, i32 0)
ret i32 %5
}
_Complex float bar(_Complex float x) {
  float r = __real x;
  float i = __imag x;
  _Complex float z = x;
  __real z = r;
  __imag z = i;
  return z;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
movlpd %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movss  %xmm1,-0x20(%rbp)
movss  %xmm0,-0x1c(%rbp)
movss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0x18(%rbp),%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x20(%rbp),%xmm1
movss  -0x1c(%rbp),%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0x4(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
ret

LLVM IR (-O0):
define <2 x float> @bar(<2 x float> %0) {
%2 = alloca { float, float }
%3 = alloca { float, float }
%4 = alloca float
%5 = alloca float
%6 = alloca { float, float }
%7 = bitcast { float, float }* %3 to <2 x float>*
store <2 x float> %0, <2 x float>* %7
%8 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 0
%9 = load float, float* %8
store float %9, float* %4
%10 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 1
%11 = load float, float* %10
store float %11, float* %5
%12 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 0
%13 = load float, float* %12
%14 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 1
%15 = load float, float* %14
%16 = getelementptr inbounds { float, float }, { float, float }* %6, i32 0, i32 0
%17 = getelementptr inbounds { float, float }, { float, float }* %6, i32 0, i32 1
store float %13, float* %16
store float %15, float* %17
%18 = load float, float* %4
%19 = getelementptr inbounds { float, float }, { float, float }* %6, i32 0, i32 0
store float %18, float* %19
%20 = load float, float* %5
%21 = getelementptr inbounds { float, float }, { float, float }* %6, i32 0, i32 1
store float %20, float* %21
%22 = getelementptr inbounds { float, float }, { float, float }* %6, i32 0, i32 0
%23 = load float, float* %22
%24 = getelementptr inbounds { float, float }, { float, float }* %6, i32 0, i32 1
%25 = load float, float* %24
%26 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 0
%27 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 1
store float %23, float* %26
store float %25, float* %27
%28 = bitcast { float, float }* %2 to <2 x float>*
%29 = load <2 x float>, <2 x float>* %28
ret <2 x float> %29
}

LLVM IR (-O2):
define <2 x float> @bar(<2 x float> returned %0) {
ret <2 x float> %0
}
/* Variables and functions */
int /*<<< orphan*/ new_block_fg(int /*<<< orphan*/);
void free_fg_storage(void) { new_block_fg(0); }


x86 assembly (clang, -O0):
<free_fg_storage>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <new_block_fg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_fg_storage>:
xor    %edi,%edi
jmp    1030 <new_block_fg@plt>

LLVM IR (-O0):
define void @free_fg_storage() {
%1 = call i32 @new_block_fg(i32 0)
ret void
}

LLVM IR (-O2):
define void @free_fg_storage() {
%1 = tail call i32 @new_block_fg(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ camo(int const, int const, int const, int const,
                        unsigned short);
void cam16o(const int c, const int n, const int a, const int f,
            unsigned short d) {
  camo(c, n, a, f, d);
}


x86 assembly (clang, -O0):
<cam16o>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %r8w,%ax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %ax,-0x12(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
movzwl -0x12(%rbp),%r8d
call   1030 <camo@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cam16o>:
jmp    1030 <camo@plt>

LLVM IR (-O0):
define void @cam16o(i32 %0, i32 %1, i32 %2, i32 %3, i16 zeroext %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i16
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i16 %4, i16* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = load i16, i16* %10
%16 = call i32 @camo(i32 %11, i32 %12, i32 %13, i32 %14, i16 zeroext %15)
ret void
}

LLVM IR (-O2):
define void @cam16o(i32 %0, i32 %1, i32 %2, i32 %3, i16 zeroext %4) {
%6 = tail call i32 @camo(i32 %0, i32 %1, i32 %2, i32 %3, i16 zeroext %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sched_yield();
void yield(void) { sched_yield(); }


x86 assembly (clang, -O0):
<yield>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sched_yield@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<yield>:
xor    %eax,%eax
jmp    1030 <sched_yield@plt>

LLVM IR (-O0):
define void @yield() {
%1 = call i32 (...) @sched_yield()
ret void
}

LLVM IR (-O2):
define void @yield() {
%1 = tail call i32 (...) @sched_yield()
ret void
}
int test_imm_CCuint8_reg(unsigned char val) {
  return ((val) & (0xCC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CCuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xcc,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CCuint8_reg>:
test   $0xcc,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CCuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 204
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CCuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -52
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
scalar_t__ strcmp(char const *, char const *);
int rdp_streq(const char *a, const char *b) { return strcmp(a, b) == 0; }


x86 assembly (clang, -O0):
<rdp_streq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdp_streq>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rdp_streq(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @strcmp(i8* %5, i8* %6)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @rdp_streq(i8* %0, i8* %1) {
%3 = tail call i64 @strcmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int close(int);
int /*<<< orphan*/ log_err(char *);
int /*<<< orphan*/ log_msg(char *, int);
int net_udp_stop(int socket) {
  if (socket <= 0)
    return 0;
  log_msg("[n] stoping listener (%i)\n", socket);
  if (close(socket) == -1)
    log_err("[n] error while closing socket\n");
  return 0;
}


x86 assembly (clang, -O0):
<net_udp_stop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jg     1151 <net_udp_stop+0x21>
movl   $0x0,-0x4(%rbp)
jmp    1184 <net_udp_stop+0x54>
mov    -0x8(%rbp),%esi
lea    0xea5(%rip),%rdi
call   1040 <log_msg@plt>
mov    -0x8(%rbp),%edi
call   1030 <close@plt>
cmp    $0xffffffff,%eax
jne    117d <net_udp_stop+0x4d>
lea    0xea3(%rip),%rdi
call   1050 <log_err@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_udp_stop>:
push   %rbx
test   %edi,%edi
jle    115d <net_udp_stop+0x2d>
mov    %edi,%ebx
lea    0xec2(%rip),%rdi
mov    %ebx,%esi
call   1040 <log_msg@plt>
mov    %ebx,%edi
call   1030 <close@plt>
cmp    $0xffffffff,%eax
jne    115d <net_udp_stop+0x2d>
lea    0xec3(%rip),%rdi
call   1050 <log_err@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"[n] stoping listener (%i)\0A\00"
@.str.1 = [32 x i8] c"[n] error while closing socket\0A\00"
define i32 @net_udp_stop(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %16
7: ; preds = %1
%8 = load i32, i32* %3
%9 = call i32 @log_msg(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = load i32, i32* %3
%11 = call i32 @close(i32 %10)
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %15
13: ; preds = %7
%14 = call i32 @log_err(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0))
br label %15
15: ; preds = %13, %7
store i32 0, i32* %2
br label %16
16: ; preds = %15, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@.str = [27 x i8] c"[n] stoping listener (%i)\0A\00"
@.str.1 = [32 x i8] c"[n] error while closing socket\0A\00"
define i32 @net_udp_stop(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = tail call i32 @log_msg(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %0)
%5 = tail call i32 @close(i32 %0)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = tail call i32 @log_err(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %3, %7, %1
ret i32 0
}
int imin(int a, int b) { return (a > b) ? b : a; }


x86 assembly (clang, -O0):
<imin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <imin+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <imin+0x27>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imin>:
mov    %edi,%eax
cmp    %esi,%edi
cmovg  %esi,%eax
ret

LLVM IR (-O0):
define i32 @imin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %4
br label %12
10: ; preds = %2
%11 = load i32, i32* %3
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @imin(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
int func() { return 42; }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @func() {
ret i32 42
}

LLVM IR (-O2):
define i32 @func() {
ret i32 42
}
int pathconN_nm10_n_in(void) { return 1; }


x86 assembly (clang, -O0):
<pathconN_nm10_n_in>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm10_n_in>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @pathconN_nm10_n_in() {
ret i32 1
}

LLVM IR (-O2):
define i32 @pathconN_nm10_n_in() {
ret i32 1
}
/* Variables and functions */
int f(int, int /*<<< orphan*/, int /*<<< orphan*/);
int main(void) {
  int a;
  return f(a, 0, 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <f@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* %2
%4 = call i32 @f(i32 %3, i32 0, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 undef, i32 0, i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char *, char *);
int isleft(char buf[8]) { return !strcmp(buf, "\033[D"); }


x86 assembly (clang, -O0):
<isleft>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isleft>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"\1B[D\00"
define i32 @isleft(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcmp(i8* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
@.str = [4 x i8] c"\1B[D\00"
define i32 @isleft(i8* nocapture %0) {
%2 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(4) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
struct lock {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct lock *);
void lock_dispose(struct lock *lock) { free(lock); }


x86 assembly (clang, -O0):
<lock_dispose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lock_dispose>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.lock = type { i32 }
define void @lock_dispose(%struct.lock* %0) {
%2 = alloca %struct.lock*
store %struct.lock* %0, %struct.lock** %2
%3 = load %struct.lock*, %struct.lock** %2
%4 = call i32 @free(%struct.lock* %3)
ret void
}

LLVM IR (-O2):
%struct.lock = type { i32 }
define void @lock_dispose(%struct.lock* nocapture %0) {
%2 = tail call i32 @free(%struct.lock* %0)
ret void
}
/* Variables and functions */
size_t __strxspn(char const *, char const *, int);
size_t strcspn(const char *s, const char *reject) {
  return __strxspn(s, reject, 1);
}


x86 assembly (clang, -O0):
<strcspn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <__strxspn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcspn>:
mov    $0x1,%edx
jmp    1030 <__strxspn@plt>

LLVM IR (-O0):
define i64 @strcspn(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @__strxspn(i8* %5, i8* %6, i32 1)
ret i64 %7
}

LLVM IR (-O2):
define i64 @strcspn(i8* %0, i8* %1) {
%3 = tail call i64 @__strxspn(i8* %0, i8* %1, i32 1)
ret i64 %3
}
_Ichar(cptr) char *cptr;
{
  char ch, _Inxch();
  if ((ch = _Inxch()) < 0)
    return (-1);
  if (cptr == 0)
    return (0);
  *cptr = ch;
  return (1);
}


x86 assembly (clang, -O0):
<_Ichar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <_Inxch@plt>
mov    %al,-0x11(%rbp)
movsbl %al,%eax
cmp    $0x0,%eax
jge    113e <_Ichar+0x2e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1165 <_Ichar+0x55>
cmpq   $0x0,-0x10(%rbp)
jne    1155 <_Ichar+0x45>
movl   $0x0,-0x4(%rbp)
jmp    1165 <_Ichar+0x55>
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Ichar>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <_Inxch@plt>
test   %al,%al
js     1133 <_Ichar+0x23>
test   %r14,%r14
je     1138 <_Ichar+0x28>
mov    %al,(%r14)
mov    $0x1,%ebx
jmp    1138 <_Ichar+0x28>
mov    $0xffffffff,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @_Ichar(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
%5 = call signext i8 (...) @_Inxch()
store i8 %5, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %16
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 0, i32* %2
br label %16
13: ; preds = %9
%14 = load i8, i8* %4
%15 = load i8*, i8** %3
store i8 %14, i8* %15
store i32 1, i32* %2
br label %16
16: ; preds = %13, %12, %8
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @_Ichar(i8* writeonly %0) {
%2 = tail call signext i8 (...) @_Inxch()
%3 = icmp slt i8 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = icmp eq i8* %0, null
br i1 %5, label %7, label %6
6: ; preds = %4
store i8 %2, i8* %0
br label %7
7: ; preds = %4, %1, %6
%8 = phi i32 [ 1, %6 ], [ -1, %1 ], [ 0, %4 ]
ret i32 %8
}