xunge/DecIR huggingface dataset:
void find_lcs_length() {}


x86 assembly (clang, -O0):
<find_lcs_length>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_lcs_length>:
ret

LLVM IR (-O0):
define void @find_lcs_length() {
ret void
}

LLVM IR (-O2):
define void @find_lcs_length() {
ret void
}
int trim(char *str, int len) {
  while ((len > 0) && (str[len - 1] == ' '))
    len--;
  str[len] = '\0';
  return len;
}


x86 assembly (clang, -O0):
<trim>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jle    1134 <trim+0x34>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x20,%eax
sete   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1144 <trim+0x44>
jmp    1152 <trim+0x52>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    110b <trim+0xb>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trim>:
mov    %esi,%ecx
xor    %eax,%eax
test   %esi,%esi
cmovs  %esi,%eax
nopl   0x0(%rax)
test   %ecx,%ecx
jle    1127 <trim+0x27>
lea    -0x1(%rcx),%rdx
cmpb   $0x20,-0x1(%rdi,%rcx,1)
mov    %rdx,%rcx
je     1110 <trim+0x10>
add    $0x1,%edx
mov    %edx,%eax
cltq
movb   $0x0,(%rdi,%rax,1)
ret

LLVM IR (-O0):
define i32 @trim(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %19, %2
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i8*, i8** %3
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 1
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 32
br label %17
17: ; preds = %8, %5
%18 = phi i1 [ false, %5 ], [ %16, %8 ]
br i1 %18, label %19, label %22
19: ; preds = %17
%20 = load i32, i32* %4
%21 = add nsw i32 %20, -1
store i32 %21, i32* %4
br label %5
22: ; preds = %17
%23 = load i8*, i8** %3
%24 = load i32, i32* %4
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i8, i8* %23, i64 %25
store i8 0, i8* %26
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @trim(i8* nocapture %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = call i32 @llvm.smin.i32(i32 %1, i32 0)
br label %5
5: ; preds = %9, %2
%6 = phi i64 [ %10, %9 ], [ %3, %2 ]
%7 = trunc i64 %6 to i32
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = add nsw i64 %6, -1
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 32
br i1 %13, label %5, label %14
14: ; preds = %9
%15 = trunc i64 %6 to i32
br label %16
16: ; preds = %5, %14
%17 = phi i32 [ %15, %14 ], [ %4, %5 ]
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %0, i64 %18
store i8 0, i8* %19
ret i32 %17
}
/* Variables and functions */
long long Q2Q(long long);
__attribute__((__visibility__("default")))
__attribute__((used)) signed long long
rQ2Q(signed long long *x) {
  return Q2Q(*x);
}


x86 assembly (clang, -O0):
<rQ2Q>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <Q2Q@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rQ2Q>:
mov    (%rdi),%rdi
jmp    1030 <Q2Q@plt>

LLVM IR (-O0):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i64 (i64*)* @rQ2Q to i8*)], section "llvm.metadata"
define i64 @rQ2Q(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = call i64 @Q2Q(i64 %4)
ret i64 %5
}

LLVM IR (-O2):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i64 (i64*)* @rQ2Q to i8*)], section "llvm.metadata"
define i64 @rQ2Q(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = tail call i64 @Q2Q(i64 %2)
ret i64 %3
}
void free_dvector(v, nl, nh) double *v;
int nl, nh;
{
  nh = nh;
  free((char *)(v + nl));
}


x86 assembly (clang, -O0):
<free_dvector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_dvector>:
movslq %esi,%rax
lea    (%rdi,%rax,8),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_dvector(double* %0, i32 %1, i32 %2) {
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32
store double* %0, double** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
store i32 %7, i32* %6
%8 = load double*, double** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds double, double* %8, i64 %10
%12 = bitcast double* %11 to i8*
ret void
}

LLVM IR (-O2):
define void @free_dvector(double* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds double, double* %0, i64 %4
%6 = bitcast double* %5 to i8*
tail call void @free(i8* %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AssertFailure(char *, int);
int /*<<< orphan*/ UARTBaseValid(unsigned long);
unsigned long UARTTxIntModeGet(unsigned long ulBase) {
  {
    if (!(UARTBaseValid(ulBase))) {
      AssertFailure(
          "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/"
          "Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/"
          "uartlib.c",
          946);
    }
  };
  return ((*((volatile unsigned long *)(ulBase + 0x00000030))) &
          (0x00000010 | 0x00000000));
}


x86 assembly (clang, -O0):
<UARTTxIntModeGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <UARTBaseValid@plt>
cmp    $0x0,%eax
jne    114f <UARTTxIntModeGet+0x2f>
lea    0xebb(%rip),%rdi
mov    $0x3b2,%esi
call   1030 <AssertFailure@plt>
mov    -0x8(%rbp),%rax
mov    0x30(%rax),%rax
and    $0x10,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTTxIntModeGet>:
push   %rbx
mov    %rdi,%rbx
call   1040 <UARTBaseValid@plt>
test   %eax,%eax
jne    113e <UARTTxIntModeGet+0x1e>
lea    0xecc(%rip),%rdi
mov    $0x3b2,%esi
call   1030 <AssertFailure@plt>
mov    0x30(%rbx),%rax
and    $0x10,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [201 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/uartlib.c\00"
define i64 @UARTTxIntModeGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @UARTBaseValid(i64 %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call i32 @AssertFailure(i8* getelementptr inbounds ([201 x i8], [201 x i8]* @.str, i64 0, i64 0), i32 946)
br label %8
8: ; preds = %6, %1
%9 = load i64, i64* %2
%10 = add i64 %9, 48
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = and i64 %12, 16
ret i64 %13
}

LLVM IR (-O2):
@.str = [201 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/uartlib.c\00"
define i64 @UARTTxIntModeGet(i64 %0) {
%2 = tail call i32 @UARTBaseValid(i64 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @AssertFailure(i8* getelementptr inbounds ([201 x i8], [201 x i8]* @.str, i64 0, i64 0), i32 946)
br label %6
6: ; preds = %4, %1
%7 = add i64 %0, 48
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, 16
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ seatest_simple_test_result(int, char *, char const *,
                                              unsigned int);
void seatest_assert_false(int test, const char *function, unsigned int line) {
  seatest_simple_test_result(!test, "Should have been false", function, line);
}


x86 assembly (clang, -O0):
<seatest_assert_false>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
lea    0xec2(%rip),%rsi
call   1030 <seatest_simple_test_result@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seatest_assert_false>:
mov    %edx,%ecx
mov    %rsi,%rdx
xor    %eax,%eax
test   %edi,%edi
sete   %al
lea    0xedd(%rip),%rsi
mov    %eax,%edi
jmp    1030 <seatest_simple_test_result@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"Should have been false\00"
define void @seatest_assert_false(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
%11 = load i8*, i8** %5
%12 = load i32, i32* %6
%13 = call i32 @seatest_simple_test_result(i32 %10, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %11, i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"Should have been false\00"
define void @seatest_assert_false(i32 %0, i8* %1, i32 %2) {
%4 = icmp eq i32 %0, 0
%5 = zext i1 %4 to i32
%6 = tail call i32 @seatest_simple_test_result(i32 %5, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2)
ret void
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ sprintf(char *, char *, int);
void generateRandomVariableName(char *dest, int num_names) {
  sprintf(dest, "variable_%d", rand() % num_names);
}


x86 assembly (clang, -O0):
<generateRandomVariableName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1040 <rand@plt>
mov    -0x18(%rbp),%rdi
cltd
idivl  -0xc(%rbp)
lea    0xeb3(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generateRandomVariableName>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
xor    %eax,%eax
call   1040 <rand@plt>
cltd
idiv   %ebx
lea    0xec6(%rip),%rsi
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"variable_%d\00"
define void @generateRandomVariableName(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 (...) @rand()
%7 = load i32, i32* %4
%8 = srem i32 %6, %7
%9 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"variable_%d\00"
define void @generateRandomVariableName(i8* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = srem i32 %3, %1
%5 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XSetWMProtocols() {
  printf("XSetWMProtocols called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XSetWMProtocols>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSetWMProtocols>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"XSetWMProtocols called\0A\00"
define i32 @XSetWMProtocols() {
%1 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [23 x i8] c"XSetWMProtocols called\00"
define i32 @XSetWMProtocols() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int bb_strtoll(char const *, char **, int);
int bb_strtoi(const char *arg, char **endp, int base) {
  return bb_strtoll(arg, endp, base);
}


x86 assembly (clang, -O0):
<bb_strtoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <bb_strtoll@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bb_strtoi>:
jmp    1030 <bb_strtoll@plt>

LLVM IR (-O0):
define i32 @bb_strtoi(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %5
%9 = load i32, i32* %6
%10 = call i32 @bb_strtoll(i8* %7, i8** %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @bb_strtoi(i8* %0, i8** %1, i32 %2) {
%4 = tail call i32 @bb_strtoll(i8* %0, i8** %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int fn2(int, int, int);
__attribute__((no, noclone)) int fn3(int x, int y) { return fn2(x, y, 6); }


x86 assembly (clang, -O0):
<fn3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x6,%edx
call   1030 <fn2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn3>:
mov    $0x6,%edx
jmp    1030 <fn2@plt>

LLVM IR (-O0):
define i32 @fn3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @fn2(i32 %5, i32 %6, i32 6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fn3(i32 %0, i32 %1) {
%3 = tail call i32 @fn2(i32 %0, i32 %1, i32 6)
ret i32 %3
}
/* Variables and functions */
scalar_t__ unlikely(int);
int poll_prio(int prio) {
  if (unlikely(prio < -1))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<poll_prio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <unlikely@plt>
cmp    $0x0,%rax
je     1142 <poll_prio+0x32>
movl   $0x1,-0x4(%rbp)
jmp    1149 <poll_prio+0x39>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<poll_prio>:
push   %rax
xor    %eax,%eax
cmp    $0xffffffff,%edi
setl   %al
mov    %eax,%edi
call   1030 <unlikely@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @poll_prio(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, -1
%6 = zext i1 %5 to i32
%7 = call i64 @unlikely(i32 %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 1, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @poll_prio(i32 %0) {
%2 = icmp slt i32 %0, -1
%3 = zext i1 %2 to i32
%4 = tail call i64 @unlikely(i32 %3)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
int strleng(char *string) {
  int i = 0;
  while (string[i] != '\0' && string[i] != '\n') {
    i++;
  }
  return i;
}


x86 assembly (clang, -O0):
<strleng>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0xd(%rbp)
je     113e <strleng+0x3e>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    114e <strleng+0x4e>
jmp    115c <strleng+0x5c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strleng+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strleng>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rax,1),%ecx
test   %cl,%cl
je     1123 <strleng+0x23>
cmp    $0xa,%cl
je     1123 <strleng+0x23>
add    $0x1,%rax
jmp    1110 <strleng+0x10>
ret

LLVM IR (-O0):
define i32 @strleng(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %22, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp ne i32 %18, 10
br label %20
20: ; preds = %12, %4
%21 = phi i1 [ false, %4 ], [ %19, %12 ]
br i1 %21, label %22, label %25
22: ; preds = %20
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
br label %4
25: ; preds = %20
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @strleng(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i64 [ %7, %6 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
switch i8 %5, label %6 [
i8 0, label %8
i8 10, label %8
]
6: ; preds = %2
%7 = add nuw i64 %3, 1
br label %2
8: ; preds = %2, %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ fwrite(char *, size_t, int, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void raw_chunk_handler(void *ctx, char *data, size_t chunk_len) {
  fwrite(data, chunk_len, 1, stdout);
}


x86 assembly (clang, -O0):
<raw_chunk_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    0x2ead(%rip),%rax
mov    (%rax),%ecx
mov    $0x1,%edx
call   1030 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<raw_chunk_handler>:
mov    %rsi,%rdi
mov    0x2ec6(%rip),%rax
mov    (%rax),%ecx
mov    %rdx,%rsi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @raw_chunk_handler(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i64, i64* %6
%9 = load i32, i32* @stdout
%10 = call i32 @fwrite(i8* %7, i64 %8, i32 1, i32 %9)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @raw_chunk_handler(i8* nocapture readnone %0, i8* %1, i64 %2) {
%4 = load i32, i32* @stdout
%5 = tail call i32 @fwrite(i8* %1, i64 %2, i32 1, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TELOPT_BINARY;
int /*<<< orphan*/ tel_opt_do_send(int /*<<< orphan*/, int);
int /*<<< orphan*/ tel_opt_will_send(int /*<<< orphan*/, int);
void tel_opt_bin_enter(int in_out) {
  if (in_out & 0x1)
    tel_opt_do_send(TELOPT_BINARY, 1);
  if (in_out & 0x2)
    tel_opt_will_send(TELOPT_BINARY, 1);
}


x86 assembly (clang, -O0):
<tel_opt_bin_enter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     114d <tel_opt_bin_enter+0x2d>
mov    0x2ea7(%rip),%rax
mov    (%rax),%edi
mov    $0x1,%esi
call   1040 <tel_opt_do_send@plt>
mov    -0x4(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     116f <tel_opt_bin_enter+0x4f>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
mov    $0x1,%esi
call   1030 <tel_opt_will_send@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tel_opt_bin_enter>:
push   %rbx
mov    %edi,%ebx
test   $0x1,%bl
je     113b <tel_opt_bin_enter+0x1b>
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
mov    $0x1,%esi
call   1040 <tel_opt_do_send@plt>
test   $0x2,%bl
jne    1142 <tel_opt_bin_enter+0x22>
pop    %rbx
ret
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
mov    $0x1,%esi
pop    %rbx
jmp    1030 <tel_opt_will_send@plt>

LLVM IR (-O0):
@TELOPT_BINARY = global i32 0
define void @tel_opt_bin_enter(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* @TELOPT_BINARY
%8 = call i32 @tel_opt_do_send(i32 %7, i32 1)
br label %9
9: ; preds = %6, %1
%10 = load i32, i32* %2
%11 = and i32 %10, 2
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, i32* @TELOPT_BINARY
%15 = call i32 @tel_opt_will_send(i32 %14, i32 1)
br label %16
16: ; preds = %13, %9
ret void
}

LLVM IR (-O2):
@TELOPT_BINARY = global i32 0
define void @tel_opt_bin_enter(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i32, i32* @TELOPT_BINARY
%6 = tail call i32 @tel_opt_do_send(i32 %5, i32 1)
br label %7
7: ; preds = %4, %1
%8 = and i32 %0, 2
%9 = icmp eq i32 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %7
%11 = load i32, i32* @TELOPT_BINARY
%12 = tail call i32 @tel_opt_will_send(i32 %11, i32 1)
br label %13
13: ; preds = %10, %7
ret void
}
void usr_input(void) {}


x86 assembly (clang, -O0):
<usr_input>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usr_input>:
ret

LLVM IR (-O0):
define void @usr_input() {
ret void
}

LLVM IR (-O2):
define void @usr_input() {
ret void
}
/* Type definitions */
struct generator_fn {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct generator_fn *);
void generator_fn_free(struct generator_fn *v) {
  if (!v)
    return;
  free(v);
}


x86 assembly (clang, -O0):
<generator_fn_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112c <generator_fn_free+0x1c>
jmp    1135 <generator_fn_free+0x25>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generator_fn_free>:
test   %rdi,%rdi
je     111a <generator_fn_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.generator_fn = type { i32 }
define void @generator_fn_free(%struct.generator_fn* %0) {
%2 = alloca %struct.generator_fn*
store %struct.generator_fn* %0, %struct.generator_fn** %2
%3 = load %struct.generator_fn*, %struct.generator_fn** %2
%4 = icmp ne %struct.generator_fn* %3, null
br i1 %4, label %6, label %5
5: ; preds = %1
br label %9
6: ; preds = %1
%7 = load %struct.generator_fn*, %struct.generator_fn** %2
%8 = call i32 @free(%struct.generator_fn* %7)
br label %9
9: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
%struct.generator_fn = type { i32 }
define void @generator_fn_free(%struct.generator_fn* %0) {
%2 = icmp eq %struct.generator_fn* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(%struct.generator_fn* %0)
br label %5
5: ; preds = %1, %3
ret void
}
void music_sheet_get_iter_by_note_id(struct music_sheet *self,
                                     unsigned long note_id,
                                     struct music_sheet_iter *iter) {}


x86 assembly (clang, -O0):
<music_sheet_get_iter_by_note_id>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<music_sheet_get_iter_by_note_id>:
ret

LLVM IR (-O0):
%struct.music_sheet = type opaque
%struct.music_sheet_iter = type opaque
define void @music_sheet_get_iter_by_note_id(%struct.music_sheet* %0, i64 %1, %struct.music_sheet_iter* %2) {
%4 = alloca %struct.music_sheet*
%5 = alloca i64
%6 = alloca %struct.music_sheet_iter*
store %struct.music_sheet* %0, %struct.music_sheet** %4
store i64 %1, i64* %5
store %struct.music_sheet_iter* %2, %struct.music_sheet_iter** %6
ret void
}

LLVM IR (-O2):
%struct.music_sheet = type opaque
%struct.music_sheet_iter = type opaque
define void @music_sheet_get_iter_by_note_id(%struct.music_sheet* nocapture %0, i64 %1, %struct.music_sheet_iter* nocapture %2) {
ret void
}
unsigned int Reverse6(unsigned int x) {
  return ((x & 0x0000ff00) << 8) | ((x & 0x0000ff00) >> 8) |
         ((x & 0xff000000) >> 24) | ((x & 0x000000ff) << 24);
}


x86 assembly (clang, -O0):
<Reverse6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shr    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
shr    $0x18,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Reverse6>:
mov    %edi,%ecx
and    $0xff00,%ecx
mov    %ecx,%eax
shl    $0x8,%eax
shr    $0x8,%ecx
or     %eax,%ecx
mov    %edi,%eax
shr    $0x18,%eax
or     %ecx,%eax
shl    $0x18,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @Reverse6(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = shl i32 %4, 8
%6 = load i32, i32* %2
%7 = and i32 %6, 65280
%8 = lshr i32 %7, 8
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, -16777216
%12 = lshr i32 %11, 24
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, 255
%16 = shl i32 %15, 24
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @Reverse6(i32 %0) {
%2 = and i32 %0, 65280
%3 = shl nuw nsw i32 %2, 8
%4 = lshr exact i32 %2, 8
%5 = or i32 %3, %4
%6 = lshr i32 %0, 24
%7 = or i32 %6, %5
%8 = shl i32 %0, 24
%9 = or i32 %7, %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, int);
void ZSTD_copy8(void *dst, const void *src) { memcpy(dst, src, 8); }


x86 assembly (clang, -O0):
<ZSTD_copy8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZSTD_copy8>:
mov    $0x8,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @ZSTD_copy8(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @memcpy(i8* %5, i8* %6, i32 8)
ret void
}

LLVM IR (-O2):
define void @ZSTD_copy8(i8* %0, i8* %1) {
%3 = tail call i32 @memcpy(i8* %0, i8* %1, i32 8)
ret void
}
int xopalette(short p) { return 0; }


x86 assembly (clang, -O0):
<xopalette>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xopalette>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @xopalette(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @xopalette(i16 signext %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ putstring(char *);
void drawpos(char c) {
  char s[2];
  if (c)
    s[0] = '#';
  else
    s[0] = ' ';
  s[1] = 0;
  putstring(s);
}


x86 assembly (clang, -O0):
<drawpos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
cmpb   $0x0,-0x1(%rbp)
je     1131 <drawpos+0x21>
movb   $0x23,-0x3(%rbp)
jmp    1135 <drawpos+0x25>
movb   $0x20,-0x3(%rbp)
movb   $0x0,-0x2(%rbp)
lea    -0x3(%rbp),%rdi
call   1030 <putstring@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawpos>:
push   %rax
xor    %eax,%eax
test   %dil,%dil
setne  %al
lea    (%rax,%rax,2),%eax
add    $0x20,%eax
mov    %al,0x6(%rsp)
movb   $0x0,0x7(%rsp)
lea    0x6(%rsp),%rdi
call   1030 <putstring@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @drawpos(i8 signext %0) {
%2 = alloca i8
%3 = alloca [2 x i8]
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = icmp ne i8 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
store i8 35, i8* %7
br label %10
8: ; preds = %1
%9 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
store i8 32, i8* %9
br label %10
10: ; preds = %8, %6
%11 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 1
store i8 0, i8* %11
%12 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
%13 = call i32 @putstring(i8* %12)
ret void
}

LLVM IR (-O2):
define void @drawpos(i8 signext %0) {
%2 = alloca [2 x i8]
%3 = getelementptr inbounds [2 x i8], [2 x i8]* %2, i64 0, i64 0
%4 = icmp eq i8 %0, 0
%5 = select i1 %4, i8 32, i8 35
store i8 %5, i8* %3
%6 = getelementptr inbounds [2 x i8], [2 x i8]* %2, i64 0, i64 1
store i8 0, i8* %6
%7 = call i32 @putstring(i8* %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ XClientMessageEvent;

/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
void free_XClientMessageEvent(void *_p) {
  if (_p == NULL)
    abort();
  free((XClientMessageEvent *)_p);
}


x86 assembly (clang, -O0):
<free_XClientMessageEvent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113e <free_XClientMessageEvent+0x1e>
mov    $0x0,%al
call   1040 <abort@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_XClientMessageEvent>:
test   %rdi,%rdi
je     112a <free_XClientMessageEvent+0xa>
jmp    1030 <free@plt>
push   %rax
xor    %eax,%eax
call   1040 <abort@plt>

LLVM IR (-O0):
define void @free_XClientMessageEvent(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i32*
%10 = call i32 @free(i32* %9)
ret void
}

LLVM IR (-O2):
define void @free_XClientMessageEvent(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
%6 = bitcast i8* %0 to i32*
%7 = tail call i32 @free(i32* %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void so_fini3(void) {
  printf("so_fini3"
         "\n");
}


x86 assembly (clang, -O0):
<so_fini3>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<so_fini3>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"so_fini3\0A\00"
define void @so_fini3() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"so_fini3\00"
define void @so_fini3() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
ret void
}
sortscmp(a1, a2) char **a1, **a2;
{ return (strcmp(*a1, *a2)); }


x86 assembly (clang, -O0):
<sortscmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sortscmp>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @sortscmp(i8** %0, i8** %1) {
%3 = alloca i8**
%4 = alloca i8**
store i8** %0, i8*** %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %3
%6 = load i8*, i8** %5
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %7
%9 = call i32 @strcmp(i8* %6, i8* %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @sortscmp(i8** nocapture %0, i8** nocapture %1) {
%3 = load i8*, i8** %0
%4 = load i8*, i8** %1
%5 = tail call i32 @strcmp(i8* dereferenceable(1) %3, i8* dereferenceable(1) %4)
ret i32 %5
}
/* Variables and functions */
double exp(double);
double fn2(double x) { return exp(x); }


x86 assembly (clang, -O0):
<fn2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn2>:
jmp    1030 <exp@plt>

LLVM IR (-O0):
define double @fn2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @exp(double %3)
ret double %4
}

LLVM IR (-O2):
define double @fn2(double %0) {
%2 = tail call double @exp(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ _quicksort(void *, int /*<<< orphan*/, unsigned int,
                              unsigned int,
                              int (*)(void const *, void const *));
void sort_quick(void *array, unsigned int length, unsigned int el_size,
                int (*comp)(const void *, const void *)) {
  _quicksort(array, 0, length - 1, el_size, comp);
}


x86 assembly (clang, -O0):
<sort_quick>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
mov    -0x10(%rbp),%ecx
mov    -0x18(%rbp),%r8
xor    %esi,%esi
call   1030 <_quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort_quick>:
mov    %rcx,%r8
mov    %edx,%ecx
lea    -0x1(%rsi),%edx
xor    %esi,%esi
jmp    1030 <_quicksort@plt>

LLVM IR (-O0):
define void @sort_quick(i8* %0, i32 %1, i32 %2, i32 (i8*, i8*)* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32 (i8*, i8*)*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 (i8*, i8*)* %3, i32 (i8*, i8*)** %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = sub i32 %10, 1
%12 = load i32, i32* %7
%13 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %8
%14 = call i32 @_quicksort(i8* %9, i32 0, i32 %11, i32 %12, i32 (i8*, i8*)* %13)
ret void
}

LLVM IR (-O2):
define void @sort_quick(i8* %0, i32 %1, i32 %2, i32 (i8*, i8*)* %3) {
%5 = add i32 %1, -1
%6 = tail call i32 @_quicksort(i8* %0, i32 0, i32 %5, i32 %2, i32 (i8*, i8*)* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void free_key(void *a) { free(a); }


x86 assembly (clang, -O0):
<free_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_key>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_key(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @free_key(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
typedef scalar_t__ u_int64_t;

/* Variables and functions */
u_int64_t get_app_tick() {
  static u_int64_t tick = 0;
  return ++tick;
}


x86 assembly (clang, -O0):
<get_app_tick>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1d(%rip),%rax
add    $0x1,%rax
mov    %rax,0x2f12(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_app_tick>:
mov    0x2f21(%rip),%rax
add    $0x1,%rax
mov    %rax,0x2f16(%rip)
ret

LLVM IR (-O0):
@get_app_tick.tick = internal global i64 0
define i64 @get_app_tick() {
%1 = load i64, i64* @get_app_tick.tick
%2 = add nsw i64 %1, 1
store i64 %2, i64* @get_app_tick.tick
ret i64 %2
}

LLVM IR (-O2):
@get_app_tick.tick = internal unnamed_addr global i64 0
define i64 @get_app_tick() {
%1 = load i64, i64* @get_app_tick.tick
%2 = add nsw i64 %1, 1
store i64 %2, i64* @get_app_tick.tick
ret i64 %2
}
/* Variables and functions */
int SpinUnlock(int);
int BSP_ReleaseSpinlock(int id) { return SpinUnlock(id); }


x86 assembly (clang, -O0):
<BSP_ReleaseSpinlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <SpinUnlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BSP_ReleaseSpinlock>:
jmp    1030 <SpinUnlock@plt>

LLVM IR (-O0):
define i32 @BSP_ReleaseSpinlock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @SpinUnlock(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @BSP_ReleaseSpinlock(i32 %0) {
%2 = tail call i32 @SpinUnlock(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ quit(int /*<<< orphan*/);
void interrupt_handler(int sig) { quit(0); }


x86 assembly (clang, -O0):
<interrupt_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <quit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupt_handler>:
xor    %edi,%edi
jmp    1030 <quit@plt>

LLVM IR (-O0):
define void @interrupt_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @quit(i32 0)
ret void
}

LLVM IR (-O2):
define void @interrupt_handler(i32 %0) {
%2 = tail call i32 @quit(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int a = -1, b = 100;
  printf("%d\n%d", a, b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
movl   $0x64,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xffffffff,%esi
mov    $0x64,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d\0A%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 -1, i32* %2
store i32 100, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d\0A%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 -1, i32 100)
ret i32 0
}
int x86() { return 0; }


x86 assembly (clang, -O0):
<x86>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x86>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @x86() {
ret i32 0
}

LLVM IR (-O2):
define i32 @x86() {
ret i32 0
}
/* Variables and functions */
int strlen(char *);
void chop(char *str) {
  if (strlen(str) > 0) {
    *(str + strlen(str) - 1) = '\0';
  }
}


x86 assembly (clang, -O0):
<chop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0x0,%eax
jle    114d <chop+0x3d>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
movslq %ecx,%rcx
movb   $0x0,-0x1(%rax,%rcx,1)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chop>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
test   %eax,%eax
jle    112c <chop+0x1c>
mov    %rbx,%rdi
call   1030 <strlen@plt>
cltq
movb   $0x0,-0x1(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
define void @chop(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strlen(i8* %3)
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = load i8*, i8** %2
%9 = call i32 @strlen(i8* %8)
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %7, i64 %10
%12 = getelementptr inbounds i8, i8* %11, i64 -1
store i8 0, i8* %12
br label %13
13: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @chop(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = tail call i32 @strlen(i8* %0)
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = getelementptr inbounds i8, i8* %7, i64 -1
store i8 0, i8* %8
br label %9
9: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ BinaryTree_main();
int main() {
  BinaryTree_main();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <BinaryTree_main@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <BinaryTree_main@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @BinaryTree_main()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @BinaryTree_main()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ OCSP_CERTSTATUS;

/* Variables and functions */
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
int /*<<< orphan*/ OCSP_CERTSTATUS_it;
OCSP_CERTSTATUS *OCSP_CERTSTATUS_new(void) {
  return (OCSP_CERTSTATUS *)ASN1_item_new(&OCSP_CERTSTATUS_it);
}


x86 assembly (clang, -O0):
<OCSP_CERTSTATUS_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OCSP_CERTSTATUS_new>:
mov    0x2ec9(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@OCSP_CERTSTATUS_it = global i32 0
define i32* @OCSP_CERTSTATUS_new() {
%1 = call i64 @ASN1_item_new(i32* @OCSP_CERTSTATUS_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@OCSP_CERTSTATUS_it = global i32 0
define i32* @OCSP_CERTSTATUS_new() {
%1 = tail call i64 @ASN1_item_new(i32* @OCSP_CERTSTATUS_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
/* Variables and functions */
scalar_t__ atoi(char *);
int main(int argc, char *argv[]) {
  int i = 0, sum = 0;
  for (i = 1; i < argc; i++) {
    sum += atoi(argv[i]);
  }
  return sum;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1173 <main+0x63>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <atoi@plt>
mov    %rax,%rcx
movslq -0x18(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113b <main+0x2b>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
xor    %ebp,%ebp
cmp    $0x2,%edi
jl     1144 <main+0x34>
mov    %rsi,%r14
mov    %edi,%r15d
xor    %ebp,%ebp
mov    $0x1,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <atoi@plt>
add    %eax,%ebp
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <main+0x20>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
store i32 0, i32* %7
store i32 1, i32* %6
br label %8
8: ; preds = %23, %2
%9 = load i32, i32* %6
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %26
12: ; preds = %8
%13 = load i8**, i8*** %5
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8*, i8** %13, i64 %15
%17 = load i8*, i8** %16
%18 = call i64 @atoi(i8* %17)
%19 = load i32, i32* %7
%20 = sext i32 %19 to i64
%21 = add nsw i64 %20, %18
%22 = trunc i64 %21 to i32
store i32 %22, i32* %7
br label %23
23: ; preds = %12
%24 = load i32, i32* %6
%25 = add nsw i32 %24, 1
store i32 %25, i32* %6
br label %8
26: ; preds = %8
%27 = load i32, i32* %7
ret i32 %27
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %16
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 1, %4 ], [ %14, %6 ]
%8 = phi i32 [ 0, %4 ], [ %13, %6 ]
%9 = getelementptr inbounds i8*, i8** %1, i64 %7
%10 = load i8*, i8** %9
%11 = tail call i64 @atoi(i8* %10)
%12 = trunc i64 %11 to i32
%13 = add i32 %8, %12
%14 = add nuw nsw i64 %7, 1
%15 = icmp eq i64 %14, %5
br i1 %15, label %16, label %6
16: ; preds = %6, %2
%17 = phi i32 [ 0, %2 ], [ %13, %6 ]
ret i32 %17
}
/* Variables and functions */
unsigned int sad_mx_n_simd(unsigned char const *, int, unsigned char const *,
                           int, unsigned int, int, int);
unsigned int vp8_sad8x8_simd(const unsigned char *src_ptr, int src_stride,
                             const unsigned char *ref_ptr, int ref_stride,
                             unsigned int max_sad) {
  return sad_mx_n_simd(src_ptr, src_stride, ref_ptr, ref_stride, max_sad, 8, 8);
}


x86 assembly (clang, -O0):
<vp8_sad8x8_simd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
mov    $0x8,%r9d
movl   $0x8,(%rsp)
call   1030 <sad_mx_n_simd@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vp8_sad8x8_simd>:
push   %rax
movl   $0x8,(%rsp)
mov    $0x8,%r9d
call   1030 <sad_mx_n_simd@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @vp8_sad8x8_simd(i8* %0, i32 %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @sad_mx_n_simd(i8* %11, i32 %12, i8* %13, i32 %14, i32 %15, i32 8, i32 8)
ret i32 %16
}

LLVM IR (-O2):
define i32 @vp8_sad8x8_simd(i8* %0, i32 %1, i8* %2, i32 %3, i32 %4) {
%6 = tail call i32 @sad_mx_n_simd(i8* %0, i32 %1, i8* %2, i32 %3, i32 %4, i32 8, i32 8)
ret i32 %6
}
void d_storeuw(register unsigned char **ptr, register unsigned short data) {
  *(*ptr)++ = (data & 0xff00) >> 8;
  *(*ptr)++ = (data & 0x00ff) >> 0;
}


x86 assembly (clang, -O0):
<d_storeuw>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rdx
mov    (%rdx),%rax
mov    %rax,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
mov    %cl,(%rax)
movzwl -0xa(%rbp),%eax
and    $0xff,%eax
sar    $0x0,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rdx
mov    (%rdx),%rax
mov    %rax,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_storeuw>:
mov    %esi,%eax
mov    (%rdi),%rcx
lea    0x1(%rcx),%rdx
mov    %rdx,(%rdi)
mov    %ah,(%rcx)
mov    (%rdi),%rcx
lea    0x1(%rcx),%rdx
mov    %rdx,(%rdi)
mov    %al,(%rcx)
ret

LLVM IR (-O0):
define void @d_storeuw(i8** %0, i16 zeroext %1) {
%3 = alloca i8**
%4 = alloca i16
store i8** %0, i8*** %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = zext i16 %5 to i32
%7 = and i32 %6, 65280
%8 = ashr i32 %7, 8
%9 = trunc i32 %8 to i8
%10 = load i8**, i8*** %3
%11 = load i8*, i8** %10
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %10
store i8 %9, i8* %11
%13 = load i16, i16* %4
%14 = zext i16 %13 to i32
%15 = and i32 %14, 255
%16 = ashr i32 %15, 0
%17 = trunc i32 %16 to i8
%18 = load i8**, i8*** %3
%19 = load i8*, i8** %18
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %18
store i8 %17, i8* %19
ret void
}

LLVM IR (-O2):
define void @d_storeuw(i8** nocapture %0, i16 zeroext %1) {
%3 = lshr i16 %1, 8
%4 = trunc i16 %3 to i8
%5 = load i8*, i8** %0
%6 = getelementptr inbounds i8, i8* %5, i64 1
store i8* %6, i8** %0
store i8 %4, i8* %5
%7 = trunc i16 %1 to i8
%8 = load i8*, i8** %0
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8* %9, i8** %0
store i8 %7, i8* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_queue_pop() {
  printf("NOT IMPLEMENTED:"
         "pa_queue_pop"
         "\n");
}


x86 assembly (clang, -O0):
<pa_queue_pop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_queue_pop>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"NOT IMPLEMENTED:pa_queue_pop\0A\00"
define i32 @pa_queue_pop() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [29 x i8] c"NOT IMPLEMENTED:pa_queue_pop\00"
define i32 @pa_queue_pop() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @str, i64 0, i64 0))
ret i32 undef
}