xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ advance();
scalar_t__ match(int);
int /*<<< orphan*/ term();
expr_prime() {
  if (match(2)) {
    advance();
    term();
    expr_prime();
  }
}


x86 assembly (clang, -O0):
<expr_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x2,%edi
call   1060 <match@plt>
cmp    $0x0,%rax
je     116f <expr_prime+0x2f>
mov    $0x0,%al
call   1050 <advance@plt>
mov    $0x0,%al
call   1030 <term@plt>
call   1040 <expr_prime@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expr_prime>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x2,%edi
call   1050 <match@plt>
test   %rax,%rax
je     115f <expr_prime+0x2f>
xor    %eax,%eax
call   1040 <advance@plt>
xor    %eax,%eax
call   1030 <term@plt>
jmp    1140 <expr_prime+0x10>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @expr_prime() {
%1 = alloca i32
%2 = call i64 @match(i32 2)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %0
%5 = call i32 (...) @advance()
%6 = call i32 (...) @term()
%7 = call i32 @expr_prime()
br label %8
8: ; preds = %4, %0
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @expr_prime() {
%1 = tail call i64 @match(i32 2)
%2 = icmp eq i64 %1, 0
br i1 %2, label %8, label %3
3: ; preds = %0, %3
%4 = tail call i32 (...) @advance()
%5 = tail call i32 (...) @term()
%6 = tail call i64 @match(i32 2)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %0
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void fooA(int *iptr) {
  printf("The value pointed to by iptr is %i\n", *iptr);
  printf("The address pointed to by iptr is  %p\n", iptr);
  printf("The address of iptr itself is  %p\n", &iptr);
}


x86 assembly (clang, -O0):
<fooA>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    0xed7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xee9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf02(%rip),%rdi
lea    -0x8(%rbp),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fooA>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %rdi,0x8(%rsp)
mov    (%rdi),%esi
lea    0xeda(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xef0(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xf06(%rip),%rdi
lea    0x8(%rsp),%rsi
xor    %eax,%eax
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"The value pointed to by iptr is %i\0A\00"
@.str.1 = [39 x i8] c"The address pointed to by iptr is %p\0A\00"
@.str.2 = [35 x i8] c"The address of iptr itself is %p\0A\00"
define void @fooA(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32*, i32** %2
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str.1, i64 0, i64 0), i32* %6)
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.2, i64 0, i64 0), i32** %2)
ret void
}

LLVM IR (-O2):
@.str = [36 x i8] c"The value pointed to by iptr is %i\0A\00"
@.str.1 = [39 x i8] c"The address pointed to by iptr is %p\0A\00"
@.str.2 = [35 x i8] c"The address of iptr itself is %p\0A\00"
define void @fooA(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32, i32* %0
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str.1, i64 0, i64 0), i32* %0)
%6 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str.2, i64 0, i64 0), i32** %2)
ret void
}
int test_imm_A5uint16_mem(unsigned short *val) {
  return ((*val) & (-0xA5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A5uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff5b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A5uint16_mem>:
movzwl (%rdi),%eax
test   $0xff5b,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A5uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -165
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A5uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -165
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct uo {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ uo_flush(struct uo *);
void uo_close(struct uo *os) { uo_flush(os); }


x86 assembly (clang, -O0):
<uo_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <uo_flush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uo_close>:
jmp    1030 <uo_flush@plt>

LLVM IR (-O0):
%struct.uo = type { i32 }
define void @uo_close(%struct.uo* %0) {
%2 = alloca %struct.uo*
store %struct.uo* %0, %struct.uo** %2
%3 = load %struct.uo*, %struct.uo** %2
%4 = call i32 @uo_flush(%struct.uo* %3)
ret void
}

LLVM IR (-O2):
%struct.uo = type { i32 }
define void @uo_close(%struct.uo* %0) {
%2 = tail call i32 @uo_flush(%struct.uo* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ foo(int, int **);
int /*<<< orphan*/ printf(char *);
int main(void) {
  int a[40][40];
  foo(40, a);
  {
    printf("Success\n");
    exit(0);
  };
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1910,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x1910(%rbp),%rsi
mov    $0x28,%edi
call   1040 <foo@plt>
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
sub    $0x1908,%rsp
mov    %rsp,%rsi
mov    $0x28,%edi
call   1040 <foo@plt>
lea    0xeb5(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"Success\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [40 x [40 x i32]]
store i32 0, i32* %1
%3 = getelementptr inbounds [40 x [40 x i32]], [40 x [40 x i32]]* %2, i64 0, i64 0
%4 = bitcast [40 x i32]* %3 to i32**
%5 = call i32 @foo(i32 40, i32** %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [8 x i8] c"Success\00"
define i32 @main() {
%1 = alloca [40 x [40 x i32]]
%2 = bitcast [40 x [40 x i32]]* %1 to i8*
%3 = bitcast [40 x [40 x i32]]* %1 to i32**
%4 = call i32 @foo(i32 40, i32** %3)
%5 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
%6 = call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
struct sockaddr_in {
  int dummy;
};
struct sockaddr {
  int dummy;
};
typedef int socklen_t;
typedef int /*<<< orphan*/ clientAddress;

/* Variables and functions */
int accept(int, struct sockaddr *, int *);
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ listen(int, int const);
int waitForConnection(int serverSocket) {
  const int serverMaxBacklog = 10;
  listen(serverSocket, serverMaxBacklog);
  struct sockaddr_in clientAddress;
  socklen_t clientLen = sizeof(clientAddress);
  int connectionSocket =
      accept(serverSocket, (struct sockaddr *)&clientAddress, &clientLen);
  assert(connectionSocket >= 0);
  return (connectionSocket);
}


x86 assembly (clang, -O0):
<waitForConnection>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xa,%esi
call   1040 <listen@plt>
movl   $0x4,-0x14(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x10(%rbp),%rsi
lea    -0x14(%rbp),%rdx
call   1050 <accept@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitForConnection>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
mov    $0xa,%esi
call   1040 <listen@plt>
movl   $0x4,0x4(%rsp)
lea    0x8(%rsp),%rsi
lea    0x4(%rsp),%rdx
mov    %ebx,%edi
call   1050 <accept@plt>
mov    %eax,%ebx
mov    %eax,%edi
not    %edi
shr    $0x1f,%edi
call   1030 <assert@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @waitForConnection(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca %struct.sockaddr_in
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
store i32 10, i32* %3
%7 = load i32, i32* %2
%8 = call i32 @listen(i32 %7, i32 10)
store i32 4, i32* %5
%9 = load i32, i32* %2
%10 = bitcast %struct.sockaddr_in* %4 to %struct.sockaddr*
%11 = call i32 @accept(i32 %9, %struct.sockaddr* %10, i32* %5)
store i32 %11, i32* %6
%12 = load i32, i32* %6
%13 = icmp sge i32 %12, 0
%14 = zext i1 %13 to i32
%15 = call i32 @assert(i32 %14)
%16 = load i32, i32* %6
ret i32 %16
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @waitForConnection(i32 %0) {
%2 = alloca %struct.sockaddr_in
%3 = alloca i32
%4 = tail call i32 @listen(i32 %0, i32 10)
%5 = bitcast %struct.sockaddr_in* %2 to i8*
%6 = bitcast i32* %3 to i8*
store i32 4, i32* %3
%7 = bitcast %struct.sockaddr_in* %2 to %struct.sockaddr*
%8 = call i32 @accept(i32 %0, %struct.sockaddr* %7, i32* %3)
%9 = xor i32 %8, -1
%10 = lshr i32 %9, 31
%11 = call i32 @assert(i32 %10)
ret i32 %8
}
void addWtihReferece(int *num1, int *num2) {
  *num1 = 1000;
  *num2 = 2000;
}


x86 assembly (clang, -O0):
<addWtihReferece>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x3e8,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x7d0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<addWtihReferece>:
movl   $0x3e8,(%rdi)
movl   $0x7d0,(%rsi)
ret

LLVM IR (-O0):
define void @addWtihReferece(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
store i32 1000, i32* %5
%6 = load i32*, i32** %4
store i32 2000, i32* %6
ret void
}

LLVM IR (-O2):
define void @addWtihReferece(i32* nocapture writeonly %0, i32* nocapture writeonly %1) {
store i32 1000, i32* %0
store i32 2000, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PUTSTATIC_B();
void PUTSTATIC_C() { PUTSTATIC_B(); }


x86 assembly (clang, -O0):
<PUTSTATIC_C>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PUTSTATIC_B@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PUTSTATIC_C>:
xor    %eax,%eax
jmp    1030 <PUTSTATIC_B@plt>

LLVM IR (-O0):
define void @PUTSTATIC_C() {
%1 = call i32 (...) @PUTSTATIC_B()
ret void
}

LLVM IR (-O2):
define void @PUTSTATIC_C() {
%1 = tail call i32 (...) @PUTSTATIC_B()
ret void
}
/* Variables and functions */
int strlen(char *);
void copy(char *a, char *b) {
  int i;
  for (i = 0; i < strlen(a); i++) {
    b[i] = a[i];
  }
}


x86 assembly (clang, -O0):
<copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
cmp    %ecx,%eax
jge    1167 <copy+0x57>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <copy+0x17>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1030 <strlen@plt>
test   %eax,%eax
jle    114c <copy+0x3c>
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
movzbl (%r15,%rbx,1),%eax
mov    %al,(%r14,%rbx,1)
add    $0x1,%rbx
mov    %r15,%rdi
call   1030 <strlen@plt>
cltq
cmp    %rax,%rbx
jl     1130 <copy+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @copy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %21, %2
%7 = load i32, i32* %5
%8 = load i8*, i8** %3
%9 = call i32 @strlen(i8* %8)
%10 = icmp slt i32 %7, %9
br i1 %10, label %11, label %24
11: ; preds = %6
%12 = load i8*, i8** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = load i8*, i8** %4
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
store i8 %16, i8* %20
br label %21
21: ; preds = %11
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %6
24: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @copy(i8* %0, i8* nocapture writeonly %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %14
5: ; preds = %2, %5
%6 = phi i64 [ %10, %5 ], [ 0, %2 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = getelementptr inbounds i8, i8* %1, i64 %6
store i8 %8, i8* %9
%10 = add nuw nsw i64 %6, 1
%11 = tail call i32 @strlen(i8* %0)
%12 = sext i32 %11 to i64
%13 = icmp slt i64 %10, %12
br i1 %13, label %5, label %14
14: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_getgrnam_free() {
  printf("NOT IMPLEMENTED:"
         "pa_getgrnam_free"
         "\n");
}


x86 assembly (clang, -O0):
<pa_getgrnam_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_getgrnam_free>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"NOT IMPLEMENTED:pa_getgrnam_free\0A\00"
define i32 @pa_getgrnam_free() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [33 x i8] c"NOT IMPLEMENTED:pa_getgrnam_free\00"
define i32 @pa_getgrnam_free() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int getpid();
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  printf("Our process id is %d\n", getpid());
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"Our process id is %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @getpid()
%7 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"Our process id is %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @getpid()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
int Cyc_Toc_is_pointer_or_boxed_tvar(void *t) {
  return ({ Cyc_Tcutil_is_pointer_type(t); }) ||
         ({ Cyc_Toc_is_boxed_tvar(t); });
}


x86 assembly (clang, -O0):
<Cyc_Toc_is_pointer_or_boxed_tvar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <Cyc_Tcutil_is_pointer_type@plt>
mov    %eax,-0xc(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0x11(%rbp)
jne    1161 <Cyc_Toc_is_pointer_or_boxed_tvar+0x41>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <Cyc_Toc_is_boxed_tvar@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Toc_is_pointer_or_boxed_tvar>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <Cyc_Tcutil_is_pointer_type@plt>
mov    %eax,%ecx
mov    $0x1,%eax
test   %ecx,%ecx
je     1138 <Cyc_Toc_is_pointer_or_boxed_tvar+0x18>
pop    %rbx
ret
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <Cyc_Toc_is_boxed_tvar@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @Cyc_Toc_is_pointer_or_boxed_tvar(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @Cyc_Tcutil_is_pointer_type to i32 (i8*, ...)*)(i8* %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %1
%10 = load i8*, i8** %2
%11 = call i32 (i8*, ...) bitcast (i32 (...)* @Cyc_Toc_is_boxed_tvar to i32 (i8*, ...)*)(i8* %10)
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = icmp ne i32 %12, 0
br label %14
14: ; preds = %9, %1
%15 = phi i1 [ true, %1 ], [ %13, %9 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @Cyc_Toc_is_pointer_or_boxed_tvar(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @Cyc_Tcutil_is_pointer_type to i32 (i8*, ...)*)(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i32 (i8*, ...) bitcast (i32 (...)* @Cyc_Toc_is_boxed_tvar to i32 (i8*, ...)*)(i8* %0)
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
double __daylen__(int, int, int, double, double, double, int /*<<< orphan*/);
double day_astronomical_twilight_length(int year, int month, int day,
                                        double lon, double lat) {
  return __daylen__(year, month, day, lon, lat, -18.0, 0);
}


x86 assembly (clang, -O0):
<day_astronomical_twilight_length>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
movsd  %xmm1,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
movsd  -0x18(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm1
movsd  0xeba(%rip),%xmm2
xor    %ecx,%ecx
call   1030 <__daylen__@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<day_astronomical_twilight_length>:
movsd  0xee8(%rip),%xmm2
xor    %ecx,%ecx
jmp    1030 <__daylen__@plt>

LLVM IR (-O0):
define double @day_astronomical_twilight_length(i32 %0, i32 %1, i32 %2, double %3, double %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca double
%10 = alloca double
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store double %3, double* %9
store double %4, double* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load double, double* %9
%15 = load double, double* %10
%16 = call double @__daylen__(i32 %11, i32 %12, i32 %13, double %14, double %15, double -1.800000e+01, i32 0)
ret double %16
}

LLVM IR (-O2):
define double @day_astronomical_twilight_length(i32 %0, i32 %1, i32 %2, double %3, double %4) {
%6 = tail call double @__daylen__(i32 %0, i32 %1, i32 %2, double %3, double %4, double -1.800000e+01, i32 0)
ret double %6
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void USBULPIDisable(uint32_t ui32Base) {
  (*((volatile uint32_t *)(ui32Base + 0x00000FC4))) &= ~0x00010000;
}


x86 assembly (clang, -O0):
<USBULPIDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xfc4,%eax
cltq
mov    (%rax),%ecx
and    $0xfffeffff,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBULPIDisable>:
movslq %edi,%rax
andl   $0xfffeffff,0xfc4(%rax)
ff fe ff
ret

LLVM IR (-O0):
define void @USBULPIDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 4036
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -65537
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @USBULPIDisable(i32 %0) {
%2 = add nsw i32 %0, 4036
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, -65537
store volatile i32 %6, i32* %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int hash(int /*<<< orphan*/ *, size_t, int /*<<< orphan*/ const *, size_t, int,
         int);
int sha3_256(uint8_t *out, size_t outlen, const uint8_t *in, size_t inlen) {
  if (outlen > (256 / 8)) {
    return -1;
  }
  return hash(out, outlen, in, inlen, 200 - (256 / 4), 0x01);
}


x86 assembly (clang, -O0):
<sha3_256>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
cmpq   $0x20,-0x18(%rbp)
jbe    113f <sha3_256+0x2f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1163 <sha3_256+0x53>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    $0x88,%r8d
mov    $0x1,%r9d
call   1030 <hash@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha3_256>:
cmp    $0x20,%rsi
jbe    111c <sha3_256+0xc>
mov    $0xffffffff,%eax
ret
mov    $0x88,%r8d
mov    $0x1,%r9d
jmp    1030 <hash@plt>

LLVM IR (-O0):
define i32 @sha3_256(i32* %0, i64 %1, i32* %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i32*
%9 = alloca i64
store i32* %0, i32** %6
store i64 %1, i64* %7
store i32* %2, i32** %8
store i64 %3, i64* %9
%10 = load i64, i64* %7
%11 = icmp ugt i64 %10, 32
br i1 %11, label %12, label %13
12: ; preds = %4
store i32 -1, i32* %5
br label %19
13: ; preds = %4
%14 = load i32*, i32** %6
%15 = load i64, i64* %7
%16 = load i32*, i32** %8
%17 = load i64, i64* %9
%18 = call i32 @hash(i32* %14, i64 %15, i32* %16, i64 %17, i32 136, i32 1)
store i32 %18, i32* %5
br label %19
19: ; preds = %13, %12
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @sha3_256(i32* %0, i64 %1, i32* %2, i64 %3) {
%5 = icmp ugt i64 %1, 32
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @hash(i32* %0, i64 %1, i32* %2, i64 %3, i32 136, i32 1)
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ %7, %6 ], [ -1, %4 ]
ret i32 %9
}
int is_delimiter(char c) {
  return (c == ' ' || c == '-' || c == '.' || c == '/' || c == '@');
}


x86 assembly (clang, -O0):
<is_delimiter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     115f <is_delimiter+0x5f>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2d,%ecx
mov    %al,-0x2(%rbp)
je     115f <is_delimiter+0x5f>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2e,%ecx
mov    %al,-0x2(%rbp)
je     115f <is_delimiter+0x5f>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2f,%ecx
mov    %al,-0x2(%rbp)
je     115f <is_delimiter+0x5f>
movsbl -0x1(%rbp),%eax
cmp    $0x40,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_delimiter>:
cmp    $0x2f,%dil
ja     1120 <is_delimiter+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0xe00100000000,%rdx
bt     %rcx,%rdx
jae    1120 <is_delimiter+0x20>
ret
xor    %eax,%eax
cmp    $0x40,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_delimiter(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %22, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 45
br i1 %9, label %22, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 46
br i1 %13, label %22, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 47
br i1 %17, label %22, label %18
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 64
br label %22
22: ; preds = %18, %14, %10, %6, %1
%23 = phi i1 [ true, %14 ], [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %21, %18 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @is_delimiter(i8 signext %0) {
switch i8 %0, label %2 [
i8 47, label %5
i8 46, label %5
i8 45, label %5
i8 32, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 64
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
char HttpStatus_isSuccessful(int code) { return (code >= 200 && code < 300); }


x86 assembly (clang, -O0):
<HttpStatus_isSuccessful>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0xc8,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <HttpStatus_isSuccessful+0x26>
cmpl   $0x12c,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HttpStatus_isSuccessful>:
add    $0xffffff38,%edi
cmp    $0x64,%edi
setb   %al
ret

LLVM IR (-O0):
define signext i8 @HttpStatus_isSuccessful(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 200
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 300
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = trunc i32 %10 to i8
ret i8 %11
}

LLVM IR (-O2):
define signext i8 @HttpStatus_isSuccessful(i32 %0) {
%2 = add i32 %0, -200
%3 = icmp ult i32 %2, 100
%4 = zext i1 %3 to i8
ret i8 %4
}
/* Type definitions */
struct VectorVectorBase {
  int dummy;
};

/* Variables and functions */
char const **TaggerTag(struct VectorVectorBase *);
const char **tagger_tag(struct VectorVectorBase *basev) {
  return TaggerTag(basev);
}


x86 assembly (clang, -O0):
<tagger_tag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <TaggerTag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tagger_tag>:
jmp    1030 <TaggerTag@plt>

LLVM IR (-O0):
%struct.VectorVectorBase = type { i32 }
define i8** @tagger_tag(%struct.VectorVectorBase* %0) {
%2 = alloca %struct.VectorVectorBase*
store %struct.VectorVectorBase* %0, %struct.VectorVectorBase** %2
%3 = load %struct.VectorVectorBase*, %struct.VectorVectorBase** %2
%4 = call i8** @TaggerTag(%struct.VectorVectorBase* %3)
ret i8** %4
}

LLVM IR (-O2):
%struct.VectorVectorBase = type { i32 }
define i8** @tagger_tag(%struct.VectorVectorBase* %0) {
%2 = tail call i8** @TaggerTag(%struct.VectorVectorBase* %0)
ret i8** %2
}
unsigned int vga_offset(unsigned int row, unsigned int col) {
  return row * 80u + col;
}


x86 assembly (clang, -O0):
<vga_offset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0x50,-0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_offset>:
lea    (%rdi,%rdi,4),%eax
shl    $0x4,%eax
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @vga_offset(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = mul i32 %5, 80
%7 = load i32, i32* %4
%8 = add i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @vga_offset(i32 %0, i32 %1) {
%3 = mul i32 %0, 80
%4 = add i32 %3, %1
ret i32 %4
}
/* Variables and functions */
unsigned int M4U_ReadReg32(unsigned int, unsigned int);
int /*<<< orphan*/ M4U_WriteReg32(unsigned int, unsigned int, unsigned int);
void m4uHw_set_field_by_mask(unsigned int M4UBase, unsigned int reg,
                             unsigned int mask, unsigned int val) {
  unsigned int regval;
  regval = M4U_ReadReg32(M4UBase, reg);
  regval = (regval & (~mask)) | val;
  M4U_WriteReg32(M4UBase, reg, regval);
}


x86 assembly (clang, -O0):
<m4uHw_set_field_by_mask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <M4U_ReadReg32@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1040 <M4U_WriteReg32@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m4uHw_set_field_by_mask>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %edx,%ebp
mov    %esi,%r15d
mov    %edi,%ebx
call   1030 <M4U_ReadReg32@plt>
not    %ebp
and    %eax,%ebp
or     %r14d,%ebp
mov    %ebx,%edi
mov    %r15d,%esi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <M4U_WriteReg32@plt>

LLVM IR (-O0):
define void @m4uHw_set_field_by_mask(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = call i32 @M4U_ReadReg32(i32 %10, i32 %11)
store i32 %12, i32* %9
%13 = load i32, i32* %9
%14 = load i32, i32* %7
%15 = xor i32 %14, -1
%16 = and i32 %13, %15
%17 = load i32, i32* %8
%18 = or i32 %16, %17
store i32 %18, i32* %9
%19 = load i32, i32* %5
%20 = load i32, i32* %6
%21 = load i32, i32* %9
%22 = call i32 @M4U_WriteReg32(i32 %19, i32 %20, i32 %21)
ret void
}

LLVM IR (-O2):
define void @m4uHw_set_field_by_mask(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @M4U_ReadReg32(i32 %0, i32 %1)
%6 = xor i32 %2, -1
%7 = and i32 %5, %6
%8 = or i32 %7, %3
%9 = tail call i32 @M4U_WriteReg32(i32 %0, i32 %1, i32 %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FTL_Static_Wear_Leveling();
int /*<<< orphan*/ GLOB_FTL_Garbage_Collection();
int GLOB_FTL_Wear_Leveling(void) {
  FTL_Static_Wear_Leveling();
  GLOB_FTL_Garbage_Collection();
  return 0;
}


x86 assembly (clang, -O0):
<GLOB_FTL_Wear_Leveling>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FTL_Static_Wear_Leveling@plt>
mov    $0x0,%al
call   1040 <GLOB_FTL_Garbage_Collection@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GLOB_FTL_Wear_Leveling>:
push   %rax
xor    %eax,%eax
call   1030 <FTL_Static_Wear_Leveling@plt>
xor    %eax,%eax
call   1040 <GLOB_FTL_Garbage_Collection@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @GLOB_FTL_Wear_Leveling() {
%1 = call i32 (...) @FTL_Static_Wear_Leveling()
%2 = call i32 (...) @GLOB_FTL_Garbage_Collection()
ret i32 0
}

LLVM IR (-O2):
define i32 @GLOB_FTL_Wear_Leveling() {
%1 = tail call i32 (...) @FTL_Static_Wear_Leveling()
%2 = tail call i32 (...) @GLOB_FTL_Garbage_Collection()
ret i32 0
}
int ti_emv_start(double const *options) {
  (void)options;
  return 1;
}


x86 assembly (clang, -O0):
<ti_emv_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_emv_start>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ti_emv_start(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @ti_emv_start(double* nocapture readnone %0) {
ret i32 1
}
int config_WITH_LIBCRYPTO(void) { return 0; }


x86 assembly (clang, -O0):
<config_WITH_LIBCRYPTO>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_WITH_LIBCRYPTO>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @config_WITH_LIBCRYPTO() {
ret i32 0
}

LLVM IR (-O2):
define i32 @config_WITH_LIBCRYPTO() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ helper(int *);
int main(int argc, char **argv) {
  int val = 0xBEEF;
  helper(&val);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0xbeef,-0x14(%rbp)
lea    -0x14(%rbp),%rdi
call   1030 <helper@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0xbeef,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <helper@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 48879, i32* %6
%7 = call i32 @helper(i32* %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 48879, i32* %3
%5 = call i32 @helper(i32* %3)
ret i32 0
}
/* Variables and functions */
int isearch(int /*<<< orphan*/);
int /*<<< orphan*/ mlerase();
int /*<<< orphan*/ mlwrite(char *);
int fisearch(int f, int n) {
  register int status;
  if (status = isearch(0))
    mlerase();
  else
    mlwrite("[search failed]");
  return (status);
}


x86 assembly (clang, -O0):
<fisearch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %edi,%edi
call   1040 <isearch@plt>
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
je     115d <fisearch+0x2d>
mov    $0x0,%al
call   1050 <mlerase@plt>
jmp    1169 <fisearch+0x39>
lea    0xe9c(%rip),%rdi
call   1030 <mlwrite@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fisearch>:
push   %rbx
xor    %edi,%edi
call   1040 <isearch@plt>
mov    %eax,%ebx
test   %eax,%eax
je     1147 <fisearch+0x17>
xor    %eax,%eax
call   1050 <mlerase@plt>
jmp    1153 <fisearch+0x23>
lea    0xeb2(%rip),%rdi
call   1030 <mlwrite@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"[search failed]\00"
define i32 @fisearch(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = call i32 @isearch(i32 0)
store i32 %6, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (...) @mlerase()
br label %12
10: ; preds = %2
%11 = call i32 @mlwrite(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10, %8
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
@.str = [16 x i8] c"[search failed]\00"
define i32 @fisearch(i32 %0, i32 %1) {
%3 = tail call i32 @isearch(i32 0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 (...) @mlerase()
br label %9
7: ; preds = %2
%8 = tail call i32 @mlwrite(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %5
ret i32 %3
}
unsigned int extract_bit_range(unsigned int num, unsigned begin,
                               unsigned int end) {
  unsigned int left_shift_amount = 8 * sizeof(unsigned int) - 1 - end;
  unsigned int right_shift_amount = left_shift_amount + begin;
  return ((num << left_shift_amount) >> right_shift_amount);
}


x86 assembly (clang, -O0):
<extract_bit_range>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
mov    $0x1f,%eax
sub    %rcx,%rax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%ecx
shl    %cl,%eax
mov    -0x14(%rbp),%ecx
shr    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<extract_bit_range>:
mov    %edi,%eax
mov    $0x1f,%ecx
sub    %edx,%ecx
shl    %cl,%eax
add    %esi,%ecx
shr    %cl,%eax
ret

LLVM IR (-O0):
define i32 @extract_bit_range(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %6
%10 = zext i32 %9 to i64
%11 = sub i64 31, %10
%12 = trunc i64 %11 to i32
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = load i32, i32* %5
%15 = add i32 %13, %14
store i32 %15, i32* %8
%16 = load i32, i32* %4
%17 = load i32, i32* %7
%18 = shl i32 %16, %17
%19 = load i32, i32* %8
%20 = lshr i32 %18, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @extract_bit_range(i32 %0, i32 %1, i32 %2) {
%4 = sub i32 31, %2
%5 = add i32 %4, %1
%6 = shl i32 %0, %4
%7 = lshr i32 %6, %5
ret i32 %7
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int lead(int);
int32_t __attribute__((always_)) lg3a(int32_t x) {
  int32_t result;
  x += 3;
  result = lead(x);
  return 31 - result;
}


x86 assembly (clang, -O0):
<lg3a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x3,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <lead@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1f,%eax
sub    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lg3a>:
push   %rax
add    $0x3,%edi
call   1030 <lead@plt>
mov    $0x1f,%ecx
sub    %eax,%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @lg3a(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 3
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = call i32 @lead(i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = sub nsw i32 31, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @lg3a(i32 %0) {
%2 = add nsw i32 %0, 3
%3 = tail call i32 @lead(i32 %2)
%4 = sub nsw i32 31, %3
ret i32 %4
}
/* Variables and functions */
unsigned int sleep(unsigned int);
unsigned int sca_sleep(unsigned int sleep_time) {
  unsigned int time_remaining;
  time_remaining = sleep_time;
  do {
    time_remaining = sleep(time_remaining);
  } while (time_remaining > 0);
  return time_remaining;
}


x86 assembly (clang, -O0):
<sca_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <sleep@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
ja     1121 <sca_sleep+0x11>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sca_sleep>:
push   %rax
mov    %edi,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %eax,%edi
call   1030 <sleep@plt>
test   %eax,%eax
jne    1120 <sca_sleep+0x10>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sca_sleep(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
br label %5
5: ; preds = %8, %1
%6 = load i32, i32* %3
%7 = call i32 @sleep(i32 %6)
store i32 %7, i32* %3
br label %8
8: ; preds = %5
%9 = load i32, i32* %3
%10 = icmp ugt i32 %9, 0
br i1 %10, label %5, label %11
11: ; preds = %8
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @sca_sleep(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ %0, %1 ], [ %4, %2 ]
%4 = tail call i32 @sleep(i32 %3)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %2
6: ; preds = %2
ret i32 0
}
int process_sym_fl(float fl) {
  int ret;
  if (fl > 2)
    ret = 3;
  else if (fl > 0)
    ret = 1;
  else if (fl < -2)
    ret = -3;
  else
    ret = -1;
  return ret;
}


x86 assembly (clang, -O0):
<process_sym_fl>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    112b <process_sym_fl+0x2b>
movl   $0x3,-0x8(%rbp)
jmp    1177 <process_sym_fl+0x77>
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1148 <process_sym_fl+0x48>
movl   $0x1,-0x8(%rbp)
jmp    1172 <process_sym_fl+0x72>
movss  0xeb4(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
jbe    1166 <process_sym_fl+0x66>
movl   $0xfffffffd,-0x8(%rbp)
jmp    116d <process_sym_fl+0x6d>
movl   $0xffffffff,-0x8(%rbp)
jmp    1172 <process_sym_fl+0x72>
jmp    1177 <process_sym_fl+0x77>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_sym_fl>:
mov    $0x3,%eax
ucomiss 0xef4(%rip),%xmm0
ja     1130 <process_sym_fl+0x30>
mov    $0x1,%eax
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
ja     1130 <process_sym_fl+0x30>
movss  0xee1(%rip),%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
setbe  %al
add    %eax,%eax
or     $0xfffffffd,%eax
ret

LLVM IR (-O0):
define i32 @process_sym_fl(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
%4 = load float, float* %2
%5 = fcmp ogt float %4, 2.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 3, i32* %3
br label %18
7: ; preds = %1
%8 = load float, float* %2
%9 = fcmp ogt float %8, 0.000000e+00
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %3
br label %17
11: ; preds = %7
%12 = load float, float* %2
%13 = fcmp olt float %12, -2.000000e+00
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 -3, i32* %3
br label %16
15: ; preds = %11
store i32 -1, i32* %3
br label %16
16: ; preds = %15, %14
br label %17
17: ; preds = %16, %10
br label %18
18: ; preds = %17, %6
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @process_sym_fl(float %0) {
%2 = fcmp ogt float %0, 2.000000e+00
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = fcmp ogt float %0, 0.000000e+00
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = fcmp olt float %0, -2.000000e+00
%7 = select i1 %6, i32 -3, i32 -1
br label %8
8: ; preds = %5, %3, %1
%9 = phi i32 [ 3, %1 ], [ 1, %3 ], [ %7, %5 ]
ret i32 %9
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int celcon_copy_into_dobldobl_systems_container(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(463, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<celcon_copy_into_dobldobl_systems_container>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1cf,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<celcon_copy_into_dobldobl_systems_container>:
mov    $0x1cf,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @celcon_copy_into_dobldobl_systems_container() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 463, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @celcon_copy_into_dobldobl_systems_container() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 463, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
/* Type definitions */
struct inode {
  int dummy;
};
struct file {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ nvram_sync();
int nvram_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
                unsigned long arg) {
  {
    switch (cmd) {
    case (unsigned int)(112 << 8) | 67U:
      nvram_sync();
      break;
    default:
      return (-22);
    }
    return (0);
  }
}


x86 assembly (clang, -O0):
<nvram_ioctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
sub    $0x7043,%eax
jne    1146 <nvram_ioctl+0x36>
jmp    113a <nvram_ioctl+0x2a>
mov    $0x0,%al
call   1030 <nvram_sync@plt>
jmp    1152 <nvram_ioctl+0x42>
movl   $0xffffffea,-0x4(%rbp)
jmp    1159 <nvram_ioctl+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvram_ioctl>:
push   %rbx
mov    $0xffffffea,%ebx
cmp    $0x7043,%edx
jne    1127 <nvram_ioctl+0x17>
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <nvram_sync@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.inode = type { i32 }
%struct.file = type { i32 }
define i32 @nvram_ioctl(%struct.inode* %0, %struct.file* %1, i32 %2, i64 %3) {
%5 = alloca i32
%6 = alloca %struct.inode*
%7 = alloca %struct.file*
%8 = alloca i32
%9 = alloca i64
store %struct.inode* %0, %struct.inode** %6
store %struct.file* %1, %struct.file** %7
store i32 %2, i32* %8
store i64 %3, i64* %9
%10 = load i32, i32* %8
switch i32 %10, label %13 [
i32 28739, label %11
]
11: ; preds = %4
%12 = call i32 (...) @nvram_sync()
br label %14
13: ; preds = %4
store i32 -22, i32* %5
br label %15
14: ; preds = %11
store i32 0, i32* %5
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %5
ret i32 %16
}

LLVM IR (-O2):
%struct.inode = type { i32 }
%struct.file = type { i32 }
define i32 @nvram_ioctl(%struct.inode* nocapture readnone %0, %struct.file* nocapture readnone %1, i32 %2, i64 %3) {
%5 = icmp eq i32 %2, 28739
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 (...) @nvram_sync()
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ 0, %6 ], [ -22, %4 ]
ret i32 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint16_t;

/* Variables and functions */
int dns_response_get16(int /*<<< orphan*/ const *);
uint16_t get_label_offset(const uint8_t *label) {
  uint16_t offset;
  offset = dns_response_get16(label);
  offset &= ~0xC000;
  return offset;
}


x86 assembly (clang, -O0):
<get_label_offset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dns_response_get16@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xffff3fff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_label_offset>:
push   %rax
call   1030 <dns_response_get16@plt>
and    $0xffff3fff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get_label_offset(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @dns_response_get16(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, -49153
store i32 %7, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_label_offset(i32* %0) {
%2 = tail call i32 @dns_response_get16(i32* %0)
%3 = and i32 %2, -49153
ret i32 %3
}
/* Type definitions */
struct node {
  int dummy;
};

/* Variables and functions */
int list_iterator_end(struct node *n) { return n == NULL; }


x86 assembly (clang, -O0):
<list_iterator_end>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_iterator_end>:
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
ret

LLVM IR (-O0):
%struct.node = type { i32 }
define i32 @list_iterator_end(%struct.node* %0) {
%2 = alloca %struct.node*
store %struct.node* %0, %struct.node** %2
%3 = load %struct.node*, %struct.node** %2
%4 = icmp eq %struct.node* %3, null
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
%struct.node = type { i32 }
define i32 @list_iterator_end(%struct.node* readnone %0) {
%2 = icmp eq %struct.node* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}