xunge/DecIR huggingface dataset:
int roll_int_discard(char top, unsigned int *x, unsigned int *entropy) {
  int t;
  t = (int)(top - '0');
  if (t <= 1 || t >= 6) {
    *x = 0;
    *entropy = 0;
    return -1;
  }
  t -= 2;
  *x = (unsigned int)t;
  *entropy = 2;
  return 0;
}


x86 assembly (clang, -O0):
<roll_int_discard>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x1,-0x1c(%rbp)
jle    1130 <roll_int_discard+0x30>
cmpl   $0x6,-0x1c(%rbp)
jl     1150 <roll_int_discard+0x50>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
movl   $0xffffffff,-0x4(%rbp)
jmp    1173 <roll_int_discard+0x73>
mov    -0x1c(%rbp),%eax
sub    $0x2,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x2,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<roll_int_discard>:
lea    -0x36(%rdi),%eax
add    $0xffffffce,%edi
xor    %r8d,%r8d
xor    %ecx,%ecx
cmp    $0xfc,%al
setae  %cl
cmovae %edi,%r8d
sbb    %eax,%eax
add    %ecx,%ecx
mov    %r8d,(%rsi)
mov    %ecx,(%rdx)
ret

LLVM IR (-O0):
define i32 @roll_int_discard(i8 signext %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32
store i8 %0, i8* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
%9 = load i8, i8* %5
%10 = sext i8 %9 to i32
%11 = sub nsw i32 %10, 48
store i32 %11, i32* %8
%12 = load i32, i32* %8
%13 = icmp sle i32 %12, 1
br i1 %13, label %17, label %14
14: ; preds = %3
%15 = load i32, i32* %8
%16 = icmp sge i32 %15, 6
br i1 %16, label %17, label %20
17: ; preds = %14, %3
%18 = load i32*, i32** %6
store i32 0, i32* %18
%19 = load i32*, i32** %7
store i32 0, i32* %19
store i32 -1, i32* %4
br label %26
20: ; preds = %14
%21 = load i32, i32* %8
%22 = sub nsw i32 %21, 2
store i32 %22, i32* %8
%23 = load i32, i32* %8
%24 = load i32*, i32** %6
store i32 %23, i32* %24
%25 = load i32*, i32** %7
store i32 2, i32* %25
store i32 0, i32* %4
br label %26
26: ; preds = %20, %17
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @roll_int_discard(i8 signext %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2) {
%4 = add i8 %0, -54
%5 = icmp ult i8 %4, -4
%6 = sext i8 %0 to i32
%7 = add nsw i32 %6, -50
%8 = select i1 %5, i32 0, i32 %7
%9 = select i1 %5, i32 0, i32 2
%10 = sext i1 %5 to i32
store i32 %8, i32* %1
store i32 %9, i32* %2
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ wint_t;
typedef int /*<<< orphan*/ locale_t;

/* Variables and functions */
int iswgraph(int /*<<< orphan*/);
int __iswgraph_l(wint_t c, locale_t l) { return iswgraph(c); }


x86 assembly (clang, -O0):
<__iswgraph_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <iswgraph@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__iswgraph_l>:
jmp    1030 <iswgraph@plt>

LLVM IR (-O0):
define i32 @__iswgraph_l(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @iswgraph(i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @__iswgraph_l(i32 %0, i32 %1) {
%3 = tail call i32 @iswgraph(i32 %0)
ret i32 %3
}
/* Variables and functions */
int SIGUSR1;
int /*<<< orphan*/ printf(char *);
void sighand(int sig) {
  if (sig == SIGUSR1)
    printf("receive a SIGUSR1!\n");
  return;
}


x86 assembly (clang, -O0):
<sighand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ec3(%rip),%rcx
cmp    (%rcx),%eax
jne    1139 <sighand+0x29>
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighand>:
mov    0x2ed1(%rip),%rax
cmp    %edi,(%rax)
jne    1127 <sighand+0x17>
lea    0xede(%rip),%rdi
jmp    1030 <puts@plt>
ret

LLVM IR (-O0):
@SIGUSR1 = global i32 0
@.str = [20 x i8] c"receive a SIGUSR1!\0A\00"
define void @sighand(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGUSR1
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@SIGUSR1 = global i32 0
@str = [19 x i8] c"receive a SIGUSR1!\00"
define void @sighand(i32 %0) {
%2 = load i32, i32* @SIGUSR1
%3 = icmp eq i32 %2, %0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret void
}
int get_demux_index(unsigned int dmxHandle) { return 0; }


x86 assembly (clang, -O0):
<get_demux_index>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_demux_index>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_demux_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @get_demux_index(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ iowrite32(unsigned int, void *);
int /*<<< orphan*/ mb();
void M4U_WriteReg32(unsigned long M4uBase, unsigned long Offset,
                    unsigned int Val) {
  iowrite32(Val, (void *)(M4uBase + Offset));
  mb();
}


x86 assembly (clang, -O0):
<M4U_WriteReg32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x8(%rbp),%rsi
add    -0x10(%rbp),%rsi
call   1040 <iowrite32@plt>
mov    $0x0,%al
call   1030 <mb@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M4U_WriteReg32>:
push   %rax
add    %rdi,%rsi
mov    %edx,%edi
call   1040 <iowrite32@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <mb@plt>

LLVM IR (-O0):
define void @M4U_WriteReg32(i64 %0, i64 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i32
store i64 %0, i64* %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i64, i64* %4
%9 = load i64, i64* %5
%10 = add i64 %8, %9
%11 = inttoptr i64 %10 to i8*
%12 = call i32 @iowrite32(i32 %7, i8* %11)
%13 = call i32 (...) @mb()
ret void
}

LLVM IR (-O2):
define void @M4U_WriteReg32(i64 %0, i64 %1, i32 %2) {
%4 = add i64 %1, %0
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @iowrite32(i32 %2, i8* %5)
%7 = tail call i32 (...) @mb()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abs_float(double);
double round_float(int /*<<< orphan*/);
double abs_dollar(double f) { return round_float(abs_float(f)); }


x86 assembly (clang, -O0):
<abs_dollar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <abs_float@plt>
mov    %eax,%edi
call   1030 <round_float@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs_dollar>:
push   %rax
call   1040 <abs_float@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <round_float@plt>

LLVM IR (-O0):
define double @abs_dollar(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @abs_float(double %3)
%5 = call double @round_float(i32 %4)
ret double %5
}

LLVM IR (-O2):
define double @abs_dollar(double %0) {
%2 = tail call i32 @abs_float(double %0)
%3 = tail call double @round_float(i32 %2)
ret double %3
}
/* Variables and functions */
int sha512_self_test(int);
int sha4_self_test(int verbose) { return sha512_self_test(verbose); }


x86 assembly (clang, -O0):
<sha4_self_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sha512_self_test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha4_self_test>:
jmp    1030 <sha512_self_test@plt>

LLVM IR (-O0):
define i32 @sha4_self_test(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sha512_self_test(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @sha4_self_test(i32 %0) {
%2 = tail call i32 @sha512_self_test(i32 %0)
ret i32 %2
}
void dummy_func3(void) {}


x86 assembly (clang, -O0):
<dummy_func3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_func3>:
ret

LLVM IR (-O0):
define void @dummy_func3() {
ret void
}

LLVM IR (-O2):
define void @dummy_func3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *name) {
  fprintf(stderr, "usage: %s [-d driver[:arg]] [-n] sweeps\n", name);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [41 x i8] c"usage: %s [-d driver[:arg]] [-n] sweeps\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [41 x i8] c"usage: %s [-d driver[:arg]] [-n] sweeps\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
void *alloca(int);
void TestMaskedFramePointer(int Arg) {
  extern void Consume(void *);
  void *Tmp = alloca(Arg);
  Consume(Tmp);
}


x86 assembly (clang, -O0):
<TestMaskedFramePointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <alloca@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <Consume@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestMaskedFramePointer>:
push   %rax
call   1030 <alloca@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <Consume@plt>

LLVM IR (-O0):
define void @TestMaskedFramePointer(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @alloca(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret void
}

LLVM IR (-O2):
define void @TestMaskedFramePointer(i32 %0) {
%2 = tail call i8* @alloca(i32 %0)
tail call void @Consume(i8* %2)
ret void
}
void f2() { const unsigned char G___1525983317 = 0; }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
movb   $0x0,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
ret

LLVM IR (-O0):
define void @f2() {
%1 = alloca i8
store i8 0, i8* %1
ret void
}

LLVM IR (-O2):
define void @f2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ default_isr();
__attribute__((weak)) void MRM_Handler() { default_isr(); }


x86 assembly (clang, -O0):
<MRM_Handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_isr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MRM_Handler>:
xor    %eax,%eax
jmp    1030 <default_isr@plt>

LLVM IR (-O0):
define weak void @MRM_Handler() {
%1 = call i32 (...) @default_isr()
ret void
}

LLVM IR (-O2):
define weak void @MRM_Handler() {
%1 = tail call i32 (...) @default_isr()
ret void
}
int process_csnd_fin() {
  int ret;
  return 0;
}


x86 assembly (clang, -O0):
<process_csnd_fin>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_csnd_fin>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @process_csnd_fin() {
%1 = alloca i32
ret i32 0
}

LLVM IR (-O2):
define i32 @process_csnd_fin() {
ret i32 0
}
/* Variables and functions */
int sqrt(int);
int check_prime(int num) {
  int temp, i;
  temp = sqrt(num);
  for (i = 2; i <= temp; i++) {
    if (num % i == 0) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<check_prime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <sqrt@plt>
mov    %eax,-0xc(%rbp)
movl   $0x2,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1168 <check_prime+0x58>
mov    -0x8(%rbp),%eax
cltd
idivl  -0x10(%rbp)
cmp    $0x0,%edx
jne    1155 <check_prime+0x45>
movl   $0x0,-0x4(%rbp)
jmp    116f <check_prime+0x5f>
jmp    115a <check_prime+0x4a>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112d <check_prime+0x1d>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_prime>:
push   %rbx
mov    %edi,%ebx
call   1030 <sqrt@plt>
mov    $0x1,%ecx
cmp    $0x2,%eax
jl     114f <check_prime+0x3f>
mov    %eax,%esi
neg    %esi
mov    $0x2,%edi
nopl   0x0(%rax,%rax,1)
mov    %ebx,%eax
cltd
idiv   %edi
test   %edx,%edx
je     114d <check_prime+0x3d>
lea    (%rsi,%rdi,1),%eax
add    $0x1,%eax
mov    %edi,%edx
add    $0x1,%edx
mov    %edx,%edi
cmp    $0x1,%eax
jne    1130 <check_prime+0x20>
jmp    114f <check_prime+0x3f>
xor    %ecx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @check_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = call i32 @sqrt(i32 %6)
store i32 %7, i32* %4
store i32 2, i32* %5
br label %8
8: ; preds = %19, %1
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = icmp sle i32 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i32, i32* %3
%14 = load i32, i32* %5
%15 = srem i32 %13, %14
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %12
store i32 0, i32* %2
br label %23
18: ; preds = %12
br label %19
19: ; preds = %18
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %8
22: ; preds = %8
store i32 1, i32* %2
br label %23
23: ; preds = %22, %17
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @check_prime(i32 %0) {
%2 = tail call i32 @sqrt(i32 %0)
%3 = icmp slt i32 %2, 2
br i1 %3, label %11, label %7
4: ; preds = %7
%5 = add nuw i32 %8, 1
%6 = icmp eq i32 %8, %2
br i1 %6, label %11, label %7
7: ; preds = %1, %4
%8 = phi i32 [ %5, %4 ], [ 2, %1 ]
%9 = srem i32 %0, %8
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %7, %4, %1
%12 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %7 ]
ret i32 %12
}
void test_size() {
  printe("not yet implemented", __func__, 51);
  exit(1);
}


x86 assembly (clang, -O0):
<test_size>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xee2(%rip),%rsi
mov    $0x33,%edx
mov    $0x0,%al
call   1030 <printe@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<test_size>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xee5(%rip),%rsi
mov    $0x33,%edx
xor    %eax,%eax
call   1030 <printe@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"not yet implemented\00"
@__func__.test_size = [10 x i8] c"test_size\00"
define void @test_size() {
%1 = call i32 (i8*, i8*, i32, ...) bitcast (i32 (...)* @printe to i32 (i8*, i8*, i32, ...)*)(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__func__.test_size, i64 0, i64 0), i32 51)
unreachable
}

LLVM IR (-O2):
@.str = [20 x i8] c"not yet implemented\00"
@__func__.test_size = [10 x i8] c"test_size\00"
define void @test_size() {
%1 = tail call i32 (i8*, i8*, i32, ...) bitcast (i32 (...)* @printe to i32 (i8*, i8*, i32, ...)*)(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__func__.test_size, i64 0, i64 0), i32 51)
tail call void @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ sem_op(int, int);
void sem_signal(int id) { sem_op(id, 1); }


x86 assembly (clang, -O0):
<sem_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <sem_op@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sem_signal>:
mov    $0x1,%esi
jmp    1030 <sem_op@plt>

LLVM IR (-O0):
define void @sem_signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sem_op(i32 %3, i32 1)
ret void
}

LLVM IR (-O2):
define void @sem_signal(i32 %0) {
%2 = tail call i32 @sem_op(i32 %0, i32 1)
ret void
}
/* Variables and functions */
size_t min(size_t a, size_t b) { return (b < a) ? b : a; }


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    1127 <min+0x27>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <min+0x2f>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %rdi,%rax
cmp    %rdi,%rsi
cmovb  %rsi,%rax
ret

LLVM IR (-O0):
define i64 @min(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %4
br label %12
10: ; preds = %2
%11 = load i64, i64* %3
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @min(i64 %0, i64 %1) {
%3 = icmp ult i64 %1, %0
%4 = select i1 %3, i64 %1, i64 %0
ret i64 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ win_gravity;
};
typedef TYPE_1__ XSetWindowAttributes;

/* Variables and functions */
int get_XSetWindowAttributes_win_gravity(void *_p) {
  return (int)((XSetWindowAttributes *)_p)->win_gravity;
}


x86 assembly (clang, -O0):
<get_XSetWindowAttributes_win_gravity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XSetWindowAttributes_win_gravity>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XSetWindowAttributes_win_gravity(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XSetWindowAttributes_win_gravity(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void display_help() {
  printf("Syntax: threadlessweb <port>\n"
         "Runs a simple webserver that always responds in the same way.\n"
         "Example: threadlessweb 1337\n"
         "");
}


x86 assembly (clang, -O0):
<display_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [120 x i8] c"Syntax: threadlessweb <port>\0ARuns a simple webserver that always responds in the same way.\0AExample: threadlessweb 1337\0A\00"
define void @display_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([120 x i8], [120 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [119 x i8] c"Syntax: threadlessweb <port>\0ARuns a simple webserver that always responds in the same way.\0AExample: threadlessweb 1337\00"
define void @display_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([119 x i8], [119 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int shim_enosys(int /*<<< orphan*/, int, char const *, char *const *,
                char *const *, int);
int shim_execveat(int dir_fd, const char *pathname, char *const argv[],
                  char *const envp[], int flags) {
  return shim_enosys(0, dir_fd, pathname, argv, envp, flags);
}


x86 assembly (clang, -O0):
<shim_execveat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    -0x24(%rbp),%r9d
xor    %edi,%edi
call   1030 <shim_enosys@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_execveat>:
mov    %r8d,%r9d
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <shim_enosys@plt>

LLVM IR (-O0):
define i32 @shim_execveat(i32 %0, i8* %1, i8** %2, i8** %3, i32 %4) {
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8**
%9 = alloca i8**
%10 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i8** %2, i8*** %8
store i8** %3, i8*** %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load i8**, i8*** %8
%14 = load i8**, i8*** %9
%15 = load i32, i32* %10
%16 = call i32 @shim_enosys(i32 0, i32 %11, i8* %12, i8** %13, i8** %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @shim_execveat(i32 %0, i8* %1, i8** %2, i8** %3, i32 %4) {
%6 = tail call i32 @shim_enosys(i32 0, i32 %0, i8* %1, i8** %2, i8** %3, i32 %4)
ret i32 %6
}
int test_imm_9Auint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x9A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Auint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x9a,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Auint64_midword_mem>:
testb  $0x9a,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Auint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 154
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_9Auint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 10092544
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct isal_zstream {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/
isal_deflate_icf_finish_hash_hist_base(struct isal_zstream *);
void isal_deflate_icf_finish_lvl1(struct isal_zstream *stream) {
  isal_deflate_icf_finish_hash_hist_base(stream);
}


x86 assembly (clang, -O0):
<isal_deflate_icf_finish_lvl1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <isal_deflate_icf_finish_hash_hist_base@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isal_deflate_icf_finish_lvl1>:
jmp    1030 <isal_deflate_icf_finish_hash_hist_base@plt>

LLVM IR (-O0):
%struct.isal_zstream = type { i32 }
define void @isal_deflate_icf_finish_lvl1(%struct.isal_zstream* %0) {
%2 = alloca %struct.isal_zstream*
store %struct.isal_zstream* %0, %struct.isal_zstream** %2
%3 = load %struct.isal_zstream*, %struct.isal_zstream** %2
%4 = call i32 @isal_deflate_icf_finish_hash_hist_base(%struct.isal_zstream* %3)
ret void
}

LLVM IR (-O2):
%struct.isal_zstream = type { i32 }
define void @isal_deflate_icf_finish_lvl1(%struct.isal_zstream* %0) {
%2 = tail call i32 @isal_deflate_icf_finish_hash_hist_base(%struct.isal_zstream* %0)
ret void
}
void g_cclosure_marshal_VOID__UINT_POINTER() {}


x86 assembly (clang, -O0):
<g_cclosure_marshal_VOID__UINT_POINTER>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_cclosure_marshal_VOID__UINT_POINTER>:
ret

LLVM IR (-O0):
define void @g_cclosure_marshal_VOID__UINT_POINTER() {
ret void
}

LLVM IR (-O2):
define void @g_cclosure_marshal_VOID__UINT_POINTER() {
ret void
}
void sh_mobile_meram_cache_update(struct sh_mobile_meram_info *dev, void *data,
                                  unsigned long base_addr_y,
                                  unsigned long base_addr_c,
                                  unsigned long *icb_addr_y,
                                  unsigned long *icb_addr_c) {}


x86 assembly (clang, -O0):
<sh_mobile_meram_cache_update>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sh_mobile_meram_cache_update>:
ret

LLVM IR (-O0):
%struct.sh_mobile_meram_info = type opaque
define void @sh_mobile_meram_cache_update(%struct.sh_mobile_meram_info* %0, i8* %1, i64 %2, i64 %3, i64* %4, i64* %5) {
%7 = alloca %struct.sh_mobile_meram_info*
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64*
%12 = alloca i64*
store %struct.sh_mobile_meram_info* %0, %struct.sh_mobile_meram_info** %7
store i8* %1, i8** %8
store i64 %2, i64* %9
store i64 %3, i64* %10
store i64* %4, i64** %11
store i64* %5, i64** %12
ret void
}

LLVM IR (-O2):
%struct.sh_mobile_meram_info = type opaque
define void @sh_mobile_meram_cache_update(%struct.sh_mobile_meram_info* nocapture %0, i8* nocapture %1, i64 %2, i64 %3, i64* nocapture %4, i64* nocapture %5) {
ret void
}
int getX86XCR0(unsigned *rEAX, unsigned *rEDX) {
  __asm__(".byte 0x0f, 0x01, 0xd0" : "=a"(*rEAX), "=d"(*rEDX) : "c"(0));
  return 0;
}


x86 assembly (clang, -O0):
<getX86XCR0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
xor    %ecx,%ecx
xgetbv
mov    -0x20(%rbp),%rcx
mov    %eax,%esi
mov    -0x18(%rbp),%rax
mov    %esi,(%rcx)
mov    %edx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getX86XCR0>:
xor    %ecx,%ecx
xgetbv
mov    %eax,(%rdi)
mov    %edx,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @getX86XCR0(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call { i32, i32 } asm ".byte 0x0f, 0x01, 0xd0", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 0)
%8 = extractvalue { i32, i32 } %7, 0
%9 = extractvalue { i32, i32 } %7, 1
store i32 %8, i32* %5
store i32 %9, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @getX86XCR0(i32* nocapture writeonly %0, i32* nocapture writeonly %1) {
%3 = tail call { i32, i32 } asm ".byte 0x0f, 0x01, 0xd0", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 0)
%4 = extractvalue { i32, i32 } %3, 0
%5 = extractvalue { i32, i32 } %3, 1
store i32 %4, i32* %0
store i32 %5, i32* %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ div_char();
int /*<<< orphan*/ div_int();
int /*<<< orphan*/ div_long();
int /*<<< orphan*/ div_short();
main(void) {
  div_char();
  div_short();
  div_int();
  div_long();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <div_char@plt>
mov    $0x0,%al
call   1030 <div_short@plt>
mov    $0x0,%al
call   1050 <div_int@plt>
mov    $0x0,%al
call   1040 <div_long@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <div_char@plt>
xor    %eax,%eax
call   1030 <div_short@plt>
xor    %eax,%eax
call   1050 <div_int@plt>
xor    %eax,%eax
call   1040 <div_long@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @div_char()
%2 = call i32 (...) @div_short()
%3 = call i32 (...) @div_int()
%4 = call i32 (...) @div_long()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @div_char()
%2 = tail call i32 (...) @div_short()
%3 = tail call i32 (...) @div_int()
%4 = tail call i32 (...) @div_long()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ default_handler();
__attribute__((weak)) void TIM1_UP_TIM10_IRQHandler() { default_handler(); }


x86 assembly (clang, -O0):
<TIM1_UP_TIM10_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TIM1_UP_TIM10_IRQHandler>:
xor    %eax,%eax
jmp    1030 <default_handler@plt>

LLVM IR (-O0):
define weak void @TIM1_UP_TIM10_IRQHandler() {
%1 = call i32 (...) @default_handler()
ret void
}

LLVM IR (-O2):
define weak void @TIM1_UP_TIM10_IRQHandler() {
%1 = tail call i32 (...) @default_handler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *free_mem(void *ptr) {
  if (ptr)
    free(ptr);
  return NULL;
}


x86 assembly (clang, -O0):
<free_mem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <free_mem+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_mem>:
test   %rdi,%rdi
je     111f <free_mem+0xf>
push   %rax
call   1030 <free@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @free_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @free_mem(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret i8* null
}
int test_imm_98int64_midword_reg(long long val) {
  return ((val >> 16) & (0x98 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_98int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x98,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_98int64_midword_reg>:
test   $0x980000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_98int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 152
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_98int64_midword_reg(i64 %0) {
%2 = and i64 %0, 9961472
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int foo(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("%d\n", foo(100));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x64,%edi
call   1040 <foo@plt>
mov    %eax,%esi
lea    0xebe(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x64,%edi
call   1040 <foo@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 100)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @foo(i32 100)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strncat(char *, char *, size_t);
void uninitvar_strncat(char *d, char *s, size_t n) {
  char *dest;
  char *src;
  size_t num;
  (void)strncat(dest, s, n);
  (void)strncat(d, src, n);
  (void)strncat(d, s, num);
  (void)strncat(d, s, n);
}


x86 assembly (clang, -O0):
<uninitvar_strncat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncat@plt>
mov    -0x8(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncat@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x30(%rbp),%rdx
call   1030 <strncat@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncat@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_strncat>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
call   1030 <strncat@plt>
mov    %rbx,%rdi
mov    %r14,%rdx
call   1030 <strncat@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
call   1030 <strncat@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <strncat@plt>

LLVM IR (-O0):
define void @uninitvar_strncat(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%10 = load i8*, i8** %7
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = call i32 @strncat(i8* %10, i8* %11, i64 %12)
%14 = load i8*, i8** %4
%15 = load i8*, i8** %8
%16 = load i64, i64* %6
%17 = call i32 @strncat(i8* %14, i8* %15, i64 %16)
%18 = load i8*, i8** %4
%19 = load i8*, i8** %5
%20 = load i64, i64* %9
%21 = call i32 @strncat(i8* %18, i8* %19, i64 %20)
%22 = load i8*, i8** %4
%23 = load i8*, i8** %5
%24 = load i64, i64* %6
%25 = call i32 @strncat(i8* %22, i8* %23, i64 %24)
ret void
}

LLVM IR (-O2):
define void @uninitvar_strncat(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @strncat(i8* undef, i8* %1, i64 %2)
%5 = tail call i32 @strncat(i8* %0, i8* undef, i64 %2)
%6 = tail call i32 @strncat(i8* %0, i8* %1, i64 undef)
%7 = tail call i32 @strncat(i8* %0, i8* %1, i64 %2)
ret void
}
int fits_bits(int x, int n) {
  int count = 8 * sizeof(int) - n;
  return ((x << count) >> count) == x;
}


x86 assembly (clang, -O0):
<fits_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movslq -0x8(%rbp),%rcx
mov    $0x20,%eax
sub    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    %cl,%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
cmp    -0x4(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fits_bits>:
mov    %esi,%ecx
neg    %cl
mov    %edi,%edx
shl    %cl,%edx
sar    %cl,%edx
xor    %eax,%eax
cmp    %edi,%edx
sete   %al
ret

LLVM IR (-O0):
define i32 @fits_bits(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = sub i64 32, %7
%9 = trunc i64 %8 to i32
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = load i32, i32* %5
%12 = shl i32 %10, %11
%13 = load i32, i32* %5
%14 = ashr i32 %12, %13
%15 = load i32, i32* %3
%16 = icmp eq i32 %14, %15
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @fits_bits(i32 %0, i32 %1) {
%3 = sub i32 32, %1
%4 = shl i32 %0, %3
%5 = ashr i32 %4, %3
%6 = icmp eq i32 %5, %0
%7 = zext i1 %6 to i32
ret i32 %7
}
__attribute__((always_)) unsigned long long native_read_pmc(int counter) {
  unsigned long long val;
  asm volatile("rdpmc" : "=A"(val) : "c"(counter));
  return (val);
}


x86 assembly (clang, -O0):
<native_read_pmc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
rdpmc
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_read_pmc>:
mov    %edi,%ecx
rdpmc
ret

LLVM IR (-O0):
define i64 @native_read_pmc(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i64 asm sideeffect "rdpmc", "=A,{cx},~{dirflag},~{fpsr},~{flags}"(i32 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @native_read_pmc(i32 %0) {
%2 = tail call i64 asm sideeffect "rdpmc", "=A,{cx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i64 %2
}
/* Variables and functions */
int tst_run_cmd_(void (*)(), char const *const *, char const *, char const *,
                 int);
int tst_run_cmd(void(cleanup_fn)(void), const char *const argv[],
                const char *stdout_path, const char *stderr_path,
                int pass_exit_val) {
  return tst_run_cmd_(cleanup_fn, argv, stdout_path, stderr_path,
                      pass_exit_val);
}


x86 assembly (clang, -O0):
<tst_run_cmd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
call   1030 <tst_run_cmd_@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tst_run_cmd>:
jmp    1030 <tst_run_cmd_@plt>

LLVM IR (-O0):
define i32 @tst_run_cmd(void ()* %0, i8** %1, i8* %2, i8* %3, i32 %4) {
%6 = alloca void ()*
%7 = alloca i8**
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i32
store void ()* %0, void ()** %6
store i8** %1, i8*** %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load void ()*, void ()** %6
%12 = bitcast void ()* %11 to void (...)*
%13 = load i8**, i8*** %7
%14 = load i8*, i8** %8
%15 = load i8*, i8** %9
%16 = load i32, i32* %10
%17 = call i32 @tst_run_cmd_(void (...)* %12, i8** %13, i8* %14, i8* %15, i32 %16)
ret i32 %17
}

LLVM IR (-O2):
define i32 @tst_run_cmd(void ()* %0, i8** %1, i8* %2, i8* %3, i32 %4) {
%6 = bitcast void ()* %0 to void (...)*
%7 = tail call i32 @tst_run_cmd_(void (...)* %6, i8** %1, i8* %2, i8* %3, i32 %4)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char const *, char const *,
                           char const *);
char *makePath(const char *directoryName, const char *fileName) {
  static char path[255];
  const char *osDependentPathSeparator = "/";
  sprintf(path, "%s%s%s", directoryName, osDependentPathSeparator, fileName);
  return path;
}


x86 assembly (clang, -O0):
<makePath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%r8
lea    0x2f02(%rip),%rdi
lea    0xebd(%rip),%rsi
call   1030 <sprintf@plt>
lea    0x2eef(%rip),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<makePath>:
push   %rbx
mov    %rsi,%r8
mov    %rdi,%rdx
lea    0x2f22(%rip),%rbx
lea    0xedd(%rip),%rsi
lea    0xed4(%rip),%rcx
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@makePath.path = internal global [255 x i8] zeroinitializer
@.str = [2 x i8] c"/\00"
@.str.1 = [7 x i8] c"%s%s%s\00"
define i8* @makePath(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
store i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8** %5
%6 = load i8*, i8** %3
%7 = load i8*, i8** %5
%8 = load i8*, i8** %4
%9 = call i32 @sprintf(i8* getelementptr inbounds ([255 x i8], [255 x i8]* @makePath.path, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %6, i8* %7, i8* %8)
ret i8* getelementptr inbounds ([255 x i8], [255 x i8]* @makePath.path, i64 0, i64 0)
}

LLVM IR (-O2):
@makePath.path = internal global [255 x i8] zeroinitializer
@.str = [2 x i8] c"/\00"
@.str.1 = [7 x i8] c"%s%s%s\00"
define i8* @makePath(i8* %0, i8* %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([255 x i8], [255 x i8]* @makePath.path, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %1)
ret i8* getelementptr inbounds ([255 x i8], [255 x i8]* @makePath.path, i64 0, i64 0)
}
/* Type definitions */
typedef int u_int32_t;

/* Variables and functions */
size_t u8_charlen(u_int32_t ch) {
  if (ch < 0x80)
    return 1;
  else if (ch < 0x800)
    return 2;
  else if (ch < 0x10000)
    return 3;
  else if (ch < 0x110000)
    return 4;
  return 0;
}


x86 assembly (clang, -O0):
<u8_charlen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
cmpl   $0x80,-0xc(%rbp)
jge    1121 <u8_charlen+0x21>
movq   $0x1,-0x8(%rbp)
jmp    1186 <u8_charlen+0x86>
cmpl   $0x800,-0xc(%rbp)
jge    113b <u8_charlen+0x3b>
movq   $0x2,-0x8(%rbp)
jmp    1186 <u8_charlen+0x86>
cmpl   $0x10000,-0xc(%rbp)
jge    1155 <u8_charlen+0x55>
movq   $0x3,-0x8(%rbp)
jmp    1186 <u8_charlen+0x86>
cmpl   $0x110000,-0xc(%rbp)
jge    116f <u8_charlen+0x6f>
movq   $0x4,-0x8(%rbp)
jmp    1186 <u8_charlen+0x86>
jmp    1174 <u8_charlen+0x74>
jmp    1179 <u8_charlen+0x79>
jmp    117e <u8_charlen+0x7e>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<u8_charlen>:
mov    $0x1,%eax
cmp    $0x80,%edi
jl     1136 <u8_charlen+0x36>
mov    $0x2,%eax
cmp    $0x800,%edi
jb     1136 <u8_charlen+0x36>
mov    $0x3,%eax
cmp    $0x10000,%edi
jb     1136 <u8_charlen+0x36>
xor    %eax,%eax
cmp    $0x110000,%edi
setb   %al
shl    $0x2,%rax
ret

LLVM IR (-O0):
define i64 @u8_charlen(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 128
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 1, i64* %2
br label %23
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 2048
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 2, i64* %2
br label %23
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp slt i32 %12, 65536
br i1 %13, label %14, label %15
14: ; preds = %11
store i64 3, i64* %2
br label %23
15: ; preds = %11
%16 = load i32, i32* %3
%17 = icmp slt i32 %16, 1114112
br i1 %17, label %18, label %19
18: ; preds = %15
store i64 4, i64* %2
br label %23
19: ; preds = %15
br label %20
20: ; preds = %19
br label %21
21: ; preds = %20
br label %22
22: ; preds = %21
store i64 0, i64* %2
br label %23
23: ; preds = %22, %18, %14, %10, %6
%24 = load i64, i64* %2
ret i64 %24
}

LLVM IR (-O2):
define i64 @u8_charlen(i32 %0) {
%2 = icmp slt i32 %0, 128
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 2048
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = icmp ult i32 %0, 65536
br i1 %6, label %10, label %7
7: ; preds = %5
%8 = icmp ult i32 %0, 1114112
%9 = select i1 %8, i64 4, i64 0
br label %10
10: ; preds = %7, %5, %3, %1
%11 = phi i64 [ 1, %1 ], [ 2, %3 ], [ 3, %5 ], [ %9, %7 ]
ret i64 %11
}
void int_to_rfm_m$input$init(void) {}


x86 assembly (clang, -O0):
<int_to_rfm_m$input$init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_to_rfm_m$input$init>:
ret

LLVM IR (-O0):
define void @"int_to_rfm_m$input$init"() {
ret void
}

LLVM IR (-O2):
define void @"int_to_rfm_m$input$init"() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ parse_arguments(int, char **);
int main(int argc, char *argv[]) {
  parse_arguments(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <parse_arguments@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <parse_arguments@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @parse_arguments(i32 %6, i8** %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @parse_arguments(i32 %0, i8** %1)
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void EPINonBlockingReadStart(uint32_t ui32Base, uint32_t ui32Channel,
                             uint32_t ui32Count) {
  uint32_t ui32Offset;
  ;
  ;
  ;
  ui32Offset = ui32Channel * (0x00000038 - 0x00000028);
  (*((volatile uint32_t *)(ui32Base + 0x00000028 + ui32Offset))) = ui32Count;
}


x86 assembly (clang, -O0):
<EPINonBlockingReadStart>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x4,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x28,%eax
add    -0x10(%rbp),%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPINonBlockingReadStart>:
movslq %esi,%rax
shl    $0x4,%rax
movslq %edi,%rcx
mov    %edx,0x28(%rcx,%rax,1)
ret

LLVM IR (-O0):
define void @EPINonBlockingReadStart(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = mul nsw i32 %8, 16
store i32 %9, i32* %7
%10 = load i32, i32* %6
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 40
%13 = load i32, i32* %7
%14 = add nsw i32 %12, %13
%15 = sext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
store volatile i32 %10, i32* %16
ret void
}

LLVM IR (-O2):
define void @EPINonBlockingReadStart(i32 %0, i32 %1, i32 %2) {
%4 = shl nsw i32 %1, 4
%5 = add nsw i32 %0, 40
%6 = add nsw i32 %5, %4
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store volatile i32 %2, i32* %8
ret void
}
int spi_nand_micron_qe_enable(struct hisnfc_op *spi) { return 0; }


x86 assembly (clang, -O0):
<spi_nand_micron_qe_enable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_nand_micron_qe_enable>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.hisnfc_op = type opaque
define i32 @spi_nand_micron_qe_enable(%struct.hisnfc_op* %0) {
%2 = alloca %struct.hisnfc_op*
store %struct.hisnfc_op* %0, %struct.hisnfc_op** %2
ret i32 0
}

LLVM IR (-O2):
%struct.hisnfc_op = type opaque
define i32 @spi_nand_micron_qe_enable(%struct.hisnfc_op* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
void update_usage(FILE *out, char *arg0) {
  fprintf(out,
          "Usage: %s [...] update [OPTS]\n"
          "\n"
          "Options:\n"
          "  -h,--help               Show this help\n"
          "  -f,--force              Force reread the entire database\n",
          arg0);
}


x86 assembly (clang, -O0):
<update_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_usage>:
mov    %rsi,%rdx
lea    0xee6(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [141 x i8] c"Usage: %s [...] update [OPTS]\0A\0AOptions:\0A -h,--help Show this help\0A -f,--force Force reread the entire database\0A\00"
define void @update_usage(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([141 x i8], [141 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [141 x i8] c"Usage: %s [...] update [OPTS]\0A\0AOptions:\0A -h,--help Show this help\0A -f,--force Force reread the entire database\0A\00"
define void @update_usage(i32* nocapture %0, i8* %1) {
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([141 x i8], [141 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}