xunge/DecIR huggingface dataset:
int complementBit_fun_int(int x, unsigned i) { return x ^ 1 << i; }


x86 assembly (clang, -O0):
<complementBit_fun_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<complementBit_fun_int>:
mov    %edi,%eax
btc    %esi,%eax
ret

LLVM IR (-O0):
define i32 @complementBit_fun_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 1, %6
%8 = xor i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @complementBit_fun_int(i32 %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = xor i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void tty_navigation_restore_pos_native(void) { write(1, "[u", 3); }


x86 assembly (clang, -O0):
<tty_navigation_restore_pos_native>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xee0(%rip),%rsi
mov    $0x3,%edx
call   1030 <write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tty_navigation_restore_pos_native>:
lea    0xee9(%rip),%rsi
mov    $0x1,%edi
mov    $0x3,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"\1B[u\00"
define void @tty_navigation_restore_pos_native() {
%1 = call i32 @write(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"\1B[u\00"
define void @tty_navigation_restore_pos_native() {
%1 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MoveMouse249(long, long);
void movemouse(long x, long y) { MoveMouse249(x, y); }


x86 assembly (clang, -O0):
<movemouse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <MoveMouse249@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<movemouse>:
jmp    1030 <MoveMouse249@plt>

LLVM IR (-O0):
define void @movemouse(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @MoveMouse249(i64 %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @movemouse(i64 %0, i64 %1) {
%3 = tail call i32 @MoveMouse249(i64 %0, i64 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ set_pin(int /*<<< orphan*/, int /*<<< orphan*/, int, int);
void io_set_interrupt_on_pin(uint8_t pin, uint8_t value) {
  set_pin(pin, value, 0x04, 0x05);
}


x86 assembly (clang, -O0):
<io_set_interrupt_on_pin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x4,%edx
mov    $0x5,%ecx
call   1030 <set_pin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_set_interrupt_on_pin>:
mov    $0x4,%edx
mov    $0x5,%ecx
jmp    1030 <set_pin@plt>

LLVM IR (-O0):
define void @io_set_interrupt_on_pin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @set_pin(i32 %5, i32 %6, i32 4, i32 5)
ret void
}

LLVM IR (-O2):
define void @io_set_interrupt_on_pin(i32 %0, i32 %1) {
%3 = tail call i32 @set_pin(i32 %0, i32 %1, i32 4, i32 5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x28() {
  Assert_real((isodigit(40) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              205, ("isodigit should be 0 for ("));
}


x86 assembly (clang, -O0):
<t_isodigit_0x28>:
push   %rbp
mov    %rsp,%rbp
mov    $0x28,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xcd,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x28>:
push   %rax
mov    $0x28,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0xcd,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for (\00"
define void @t_isodigit_0x28() {
%1 = call i64 @isodigit(i32 40)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 205, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for (\00"
define void @t_isodigit_0x28() {
%1 = tail call i64 @isodigit(i32 40)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 205, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int hashtab_hash_mode(char *, int, int, char, int);
int hashtab_hash_char(char c, char prev, int nbuck, int prev_hash) {
  return hashtab_hash_mode(&c, nbuck, 1, prev, prev_hash);
}


x86 assembly (clang, -O0):
<hashtab_hash_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    %edx,-0x8(%rbp)
mov    %ecx,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0x2(%rbp),%al
mov    -0xc(%rbp),%r8d
lea    -0x1(%rbp),%rdi
mov    $0x1,%edx
movsbl %al,%ecx
call   1030 <hashtab_hash_mode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashtab_hash_char>:
push   %rax
mov    %ecx,%r8d
mov    %esi,%ecx
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rdi
mov    %edx,%esi
mov    $0x1,%edx
call   1030 <hashtab_hash_mode@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @hashtab_hash_char(i8 signext %0, i8 signext %1, i32 %2, i32 %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %5
store i8 %1, i8* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %7
%10 = load i8, i8* %6
%11 = load i32, i32* %8
%12 = call i32 @hashtab_hash_mode(i8* %5, i32 %9, i32 1, i8 signext %10, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @hashtab_hash_char(i8 signext %0, i8 signext %1, i32 %2, i32 %3) {
%5 = alloca i8
store i8 %0, i8* %5
%6 = call i32 @hashtab_hash_mode(i8* %5, i32 %2, i32 1, i8 signext %1, i32 %3)
ret i32 %6
}
/* Variables and functions */
void glmDiv3fs_(float x[3], float y) {
  for (size_t i = 0; i < 3; ++i)
    x[i] /= y;
}


x86 assembly (clang, -O0):
<glmDiv3fs_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x3,-0x18(%rbp)
jae    114c <glmDiv3fs_+0x4c>
movss  -0xc(%rbp),%xmm1
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
divss  %xmm1,%xmm0
movss  %xmm0,(%rax,%rcx,4)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1115 <glmDiv3fs_+0x15>
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmDiv3fs_>:
movss  (%rdi),%xmm1
movss  0x4(%rdi),%xmm2
divss  %xmm0,%xmm1
movss  %xmm1,(%rdi)
divss  %xmm0,%xmm2
movss  %xmm2,0x4(%rdi)
movss  0x8(%rdi),%xmm1
divss  %xmm0,%xmm1
movss  %xmm1,0x8(%rdi)
ret

LLVM IR (-O0):
define void @glmDiv3fs_(float* %0, float %1) {
%3 = alloca float*
%4 = alloca float
%5 = alloca i64
store float* %0, float** %3
store float %1, float* %4
store i64 0, i64* %5
br label %6
6: ; preds = %16, %2
%7 = load i64, i64* %5
%8 = icmp ult i64 %7, 3
br i1 %8, label %9, label %19
9: ; preds = %6
%10 = load float, float* %4
%11 = load float*, float** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds float, float* %11, i64 %12
%14 = load float, float* %13
%15 = fdiv float %14, %10
store float %15, float* %13
br label %16
16: ; preds = %9
%17 = load i64, i64* %5
%18 = add i64 %17, 1
store i64 %18, i64* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @glmDiv3fs_(float* nocapture %0, float %1) {
%3 = load float, float* %0
%4 = fdiv float %3, %1
store float %4, float* %0
%5 = getelementptr inbounds float, float* %0, i64 1
%6 = load float, float* %5
%7 = fdiv float %6, %1
store float %7, float* %5
%8 = getelementptr inbounds float, float* %0, i64 2
%9 = load float, float* %8
%10 = fdiv float %9, %1
store float %10, float* %8
ret void
}
void LedsP$Led0$makeOutput(void) { HplAtm128GeneralIOPinP$2$IO$makeOutput(); }


x86 assembly (clang, -O0):
<LedsP$Led0$makeOutput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtm128GeneralIOPinP$2$IO$makeOutput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedsP$Led0$makeOutput>:
xor    %eax,%eax
jmp    1030 <HplAtm128GeneralIOPinP$2$IO$makeOutput@plt>

LLVM IR (-O0):
define void @"LedsP$Led0$makeOutput"() {
%1 = call i32 (...) @"HplAtm128GeneralIOPinP$2$IO$makeOutput"()
ret void
}

LLVM IR (-O2):
define void @"LedsP$Led0$makeOutput"() {
%1 = tail call i32 (...) @"HplAtm128GeneralIOPinP$2$IO$makeOutput"()
ret void
}
int foo(long a, unsigned long b) { return (a & (a == 0)) | (b & !b); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,-0x8(%rbp)
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
mov    -0x10(%rbp),%rcx
cmpq   $0x0,-0x10(%rbp)
setne  %dl
xor    $0xff,%dl
and    $0x1,%dl
movzbl %dl,%edx
movslq %edx,%rdx
and    %rdx,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %ecx,%ecx
test   %rdi,%rdi
sete   %cl
and    %edi,%ecx
xor    %eax,%eax
test   %rsi,%rsi
sete   %al
and    %esi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @foo(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %3
%7 = icmp eq i64 %6, 0
%8 = zext i1 %7 to i32
%9 = sext i32 %8 to i64
%10 = and i64 %5, %9
%11 = load i64, i64* %4
%12 = load i64, i64* %4
%13 = icmp ne i64 %12, 0
%14 = xor i1 %13, true
%15 = zext i1 %14 to i32
%16 = sext i32 %15 to i64
%17 = and i64 %11, %16
%18 = or i64 %10, %17
%19 = trunc i64 %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @foo(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 0
%4 = zext i1 %3 to i64
%5 = and i64 %4, %0
%6 = icmp eq i64 %1, 0
%7 = zext i1 %6 to i64
%8 = and i64 %7, %1
%9 = or i64 %8, %5
%10 = trunc i64 %9 to i32
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
void OptickAPI_AttachTag_Int(uint64_t inEventDescription, int inValue) {}


x86 assembly (clang, -O0):
<OptickAPI_AttachTag_Int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<OptickAPI_AttachTag_Int>:
ret

LLVM IR (-O0):
define void @OptickAPI_AttachTag_Int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @OptickAPI_AttachTag_Int(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
void *alloca(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  void *p;
  p = alloca(1024);
  *(int *)p = 0x12345678;
  printf("p %x\n", *(int *)p);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x400,%edi
call   1040 <alloca@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x12345678,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x400,%edi
call   1040 <alloca@plt>
movl   $0x12345678,(%rax)
lea    0xec8(%rip),%rdi
mov    $0x12345678,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"p %x\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* @alloca(i32 1024)
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32 305419896, i32* %5
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"p %x\0A\00"
define i32 @main() {
%1 = tail call i8* @alloca(i32 1024)
%2 = bitcast i8* %1 to i32*
store i32 305419896, i32* %2
%3 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 305419896)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ get_port(int /*<<< orphan*/, int /*<<< orphan*/, int, int);
uint8_t read_interrupt_capture(uint8_t address, uint8_t port) {
  return get_port(address, port, 0x10, 0x11);
}


x86 assembly (clang, -O0):
<read_interrupt_capture>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x10,%edx
mov    $0x11,%ecx
call   1030 <get_port@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_interrupt_capture>:
mov    $0x10,%edx
mov    $0x11,%ecx
jmp    1030 <get_port@plt>

LLVM IR (-O0):
define i32 @read_interrupt_capture(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @get_port(i32 %5, i32 %6, i32 16, i32 17)
ret i32 %7
}

LLVM IR (-O2):
define i32 @read_interrupt_capture(i32 %0, i32 %1) {
%3 = tail call i32 @get_port(i32 %0, i32 %1, i32 16, i32 17)
ret i32 %3
}
char __list_del_entry_valid(struct list_head *entry) {
  (void)entry;
  return 1;
  ;
}


x86 assembly (clang, -O0):
<__list_del_entry_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__list_del_entry_valid>:
mov    $0x1,%al
ret

LLVM IR (-O0):
%struct.list_head = type opaque
define signext i8 @__list_del_entry_valid(%struct.list_head* %0) {
%2 = alloca %struct.list_head*
store %struct.list_head* %0, %struct.list_head** %2
%3 = load %struct.list_head*, %struct.list_head** %2
ret i8 1
}

LLVM IR (-O2):
%struct.list_head = type opaque
define signext i8 @__list_del_entry_valid(%struct.list_head* nocapture readnone %0) {
ret i8 1
}
char kernel__Int__ascii(long self) {
  char var;
  char var1;
  var1 = self;
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<kernel__Int__ascii>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel__Int__ascii>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define signext i8 @kernel__Int__ascii(i64 %0) {
%2 = alloca i64
%3 = alloca i8
%4 = alloca i8
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = trunc i64 %5 to i8
store i8 %6, i8* %4
%7 = load i8, i8* %4
store i8 %7, i8* %3
br label %8
8: ; preds = %1
%9 = load i8, i8* %3
ret i8 %9
}

LLVM IR (-O2):
define signext i8 @kernel__Int__ascii(i64 %0) {
%2 = trunc i64 %0 to i8
ret i8 %2
}
/* Variables and functions */
bool is_power_of_two(unsigned int x) { return ((x != 0) && !(x & (x - 1))); }


x86 assembly (clang, -O0):
<is_power_of_two>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     112c <is_power_of_two+0x2c>
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_power_of_two>:
test   %edi,%edi
je     110f <is_power_of_two+0xf>
lea    -0x1(%rdi),%ecx
xor    %eax,%eax
test   %ecx,%edi
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_power_of_two(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i32, i32* %2
%7 = load i32, i32* %2
%8 = sub i32 %7, 1
%9 = and i32 %6, %8
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
br label %12
12: ; preds = %5, %1
%13 = phi i1 [ false, %1 ], [ %11, %5 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @is_power_of_two(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.ctpop.i32(i32 %0)
%5 = icmp ult i32 %4, 2
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
int get_minutes_since_midnight(int hours, int minutes) {
  return hours * 60 + minutes;
}


x86 assembly (clang, -O0):
<get_minutes_since_midnight>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0x3c,-0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_minutes_since_midnight>:
imul   $0x3c,%edi,%eax
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @get_minutes_since_midnight(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = mul nsw i32 %5, 60
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_minutes_since_midnight(i32 %0, i32 %1) {
%3 = mul nsw i32 %0, 60
%4 = add nsw i32 %3, %1
ret i32 %4
}
const char *server_getUsage() {
  return "The initialization of the server from the command line have the "
         "following structure:\n\tM mu\n\tH n mu_1 mu_2 ... mu_n  alpha_1 "
         "alpha_2 ... alpha_{n-1}\n\tE n mu_1 mu_2 ... mu_n\n\tD mu";
}


x86 assembly (clang, -O0):
<server_getUsage>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<server_getUsage>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [178 x i8] c"The initialization of the server from the command line have the following structure:\0A\09M mu\0A\09H n mu_1 mu_2 ... mu_n alpha_1 alpha_2 ... alpha_{n-1}\0A\09E n mu_1 mu_2 ... mu_n\0A\09D mu\00"
define i8* @server_getUsage() {
ret i8* getelementptr inbounds ([178 x i8], [178 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [178 x i8] c"The initialization of the server from the command line have the following structure:\0A\09M mu\0A\09H n mu_1 mu_2 ... mu_n alpha_1 alpha_2 ... alpha_{n-1}\0A\09E n mu_1 mu_2 ... mu_n\0A\09D mu\00"
define i8* @server_getUsage() {
ret i8* getelementptr inbounds ([178 x i8], [178 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  int s;
  s = 98 + 1024;
  printf("%d\n", s);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x462,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x462,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1122, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 1122)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int posix_memalign(void **, int, size_t);
void *__x_memalign(size_t size) {
  int rc;
  void *m;
  rc = posix_memalign(&m, 262144, size);
  assert(rc == 0);
  return m;
}


x86 assembly (clang, -O0):
<__x_memalign>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    -0x18(%rbp),%rdi
mov    $0x40000,%esi
call   1040 <posix_memalign@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__x_memalign>:
push   %rax
mov    %rdi,%rdx
mov    %rsp,%rdi
mov    $0x40000,%esi
call   1040 <posix_memalign@plt>
xor    %edi,%edi
test   %eax,%eax
sete   %dil
call   1030 <assert@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @__x_memalign(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i8*
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = call i32 @posix_memalign(i8** %4, i32 262144, i64 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 0
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
%11 = load i8*, i8** %4
ret i8* %11
}

LLVM IR (-O2):
define i8* @__x_memalign(i64 %0) {
%2 = alloca i8*
%3 = bitcast i8** %2 to i8*
%4 = call i32 @posix_memalign(i8** %2, i32 262144, i64 %0)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = load i8*, i8** %2
ret i8* %8
}
/* Variables and functions */
bool nrf52_errata_170(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_170>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_170>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_170() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_170() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ buffer;

/* Variables and functions */
int /*<<< orphan*/ sendreg(int, char *, int);
int /*<<< orphan*/ snprintf(char *, int, char *, int);
void sendprog(int pn) {
  char buffer[32];
  pn = 200 + pn * 3;
  snprintf(buffer, sizeof(buffer), "0,%u", pn);
  sendreg(21, buffer, 2);
}


x86 assembly (clang, -O0):
<sendprog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3,-0x4(%rbp),%eax
add    $0xc8,%eax
mov    %eax,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x4(%rbp),%ecx
mov    $0x20,%esi
lea    0xeb6(%rip),%rdx
call   1040 <snprintf@plt>
lea    -0x30(%rbp),%rsi
mov    $0x15,%edi
mov    $0x2,%edx
call   1030 <sendreg@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendprog>:
push   %rbx
sub    $0x20,%rsp
lea    (%rdi,%rdi,2),%ecx
add    $0xc8,%ecx
lea    0xecb(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x20,%esi
call   1040 <snprintf@plt>
mov    $0x15,%edi
mov    %rbx,%rsi
mov    $0x2,%edx
call   1030 <sendreg@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"0,%u\00"
define void @sendprog(i32 %0) {
%2 = alloca i32
%3 = alloca [32 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %4, 3
%6 = add nsw i32 200, %5
store i32 %6, i32* %2
%7 = getelementptr inbounds [32 x i8], [32 x i8]* %3, i64 0, i64 0
%8 = load i32, i32* %2
%9 = call i32 @snprintf(i8* %7, i32 32, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = getelementptr inbounds [32 x i8], [32 x i8]* %3, i64 0, i64 0
%11 = call i32 @sendreg(i32 21, i8* %10, i32 2)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"0,%u\00"
define void @sendprog(i32 %0) {
%2 = alloca [32 x i8]
%3 = getelementptr inbounds [32 x i8], [32 x i8]* %2, i64 0, i64 0
%4 = mul nsw i32 %0, 3
%5 = add nsw i32 %4, 200
%6 = call i32 @snprintf(i8* %3, i32 32, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = call i32 @sendreg(i32 21, i8* %3, i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RunNextJob(char *, int);
int /*<<< orphan*/ sleep(int);
void SpawnJobRunner(char *queueDir, int sleepTime, int verbose) {
  while (1) {
    if (!RunNextJob(queueDir, verbose)) {
      sleep(sleepTime);
    }
  }
}


x86 assembly (clang, -O0):
<SpawnJobRunner>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1030 <RunNextJob@plt>
cmp    $0x0,%eax
jne    114f <SpawnJobRunner+0x2f>
mov    -0xc(%rbp),%edi
call   1040 <sleep@plt>
jmp    1132 <SpawnJobRunner+0x12>

x86 assembly (clang, -O2):
<SpawnJobRunner>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %esi,%r14d
mov    %rdi,%rbp
nopl   0x0(%rax)
mov    %rbp,%rdi
mov    %ebx,%esi
call   1030 <RunNextJob@plt>
test   %eax,%eax
jne    1130 <SpawnJobRunner+0x10>
mov    %r14d,%edi
call   1040 <sleep@plt>
jmp    1130 <SpawnJobRunner+0x10>

LLVM IR (-O0):
define void @SpawnJobRunner(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
br label %7
7: ; preds = %3, %15
%8 = load i8*, i8** %4
%9 = load i32, i32* %6
%10 = call i32 @RunNextJob(i8* %8, i32 %9)
%11 = icmp ne i32 %10, 0
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = load i32, i32* %5
%14 = call i32 @sleep(i32 %13)
br label %15
15: ; preds = %12, %7
br label %7
}

LLVM IR (-O2):
define void @SpawnJobRunner(i8* %0, i32 %1, i32 %2) {
br label %4
4: ; preds = %9, %3
%5 = tail call i32 @RunNextJob(i8* %0, i32 %2)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i32 @sleep(i32 %1)
br label %9
9: ; preds = %7, %4
br label %4
}
void ff_hevc_put_hevc_epel_h4_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_h4_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_h4_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_h4_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_h4_10_sse4() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void gic_disable_interrupts(void) {
  (*((uint32_t *)((uintptr_t)(0x08010000 + 0x0))) = (0));
}


x86 assembly (clang, -O0):
<gic_disable_interrupts>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8010000,%eax
movl   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gic_disable_interrupts>:
movl   $0x0,0x8010000
ret

LLVM IR (-O0):
define void @gic_disable_interrupts() {
store i32 0, i32* inttoptr (i64 134283264 to i32*)
ret void
}

LLVM IR (-O2):
define void @gic_disable_interrupts() {
store i32 0, i32* inttoptr (i64 134283264 to i32*)
ret void
}
int octave_o_append_wrapper(void) { return -1; }


x86 assembly (clang, -O0):
<octave_o_append_wrapper>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<octave_o_append_wrapper>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @octave_o_append_wrapper() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @octave_o_append_wrapper() {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ free(void *);
void map_out_pages(void *addr, int page_count) {
  assert(addr != NULL);
  assert(page_count > 0);
  free(addr);
}


x86 assembly (clang, -O0):
<map_out_pages>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
cmpl   $0x0,-0xc(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_out_pages>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1040 <assert@plt>
xor    %edi,%edi
test   %ebp,%ebp
setg   %dil
call   1040 <assert@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @map_out_pages(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %4
%10 = icmp sgt i32 %9, 0
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i8*, i8** %3
%14 = call i32 @free(i8* %13)
ret void
}

LLVM IR (-O2):
define void @map_out_pages(i8* %0, i32 %1) {
%3 = icmp ne i8* %0, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = icmp sgt i32 %1, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = tail call i32 @free(i8* %0)
ret void
}
int find_first_bit(const unsigned long *addr, unsigned size) {
  int d0, d1;
  int res;
  __asm__ __volatile__("xorl %%eax,%%eax\n\t"
                       "repe; scasl\n\t"
                       "jz 1f\n\t"
                       "leal -4(%%edi),%%edi\n\t"
                       "bsfl (%%edi),%%eax\n"
                       "1:\tsubl %%ebx,%%edi\n\t"
                       "shll $3,%%edi\n\t"
                       "addl %%edi,%%eax"
                       : "=a"(res), "=&c"(d0), "=&D"(d1)
                       : "1"((size + 31) >> 5), "2"(addr), "b"(addr)
                       : "memory");
  return res;
}


x86 assembly (clang, -O0):
<find_first_bit>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x14(%rbp),%ecx
add    $0x1f,%ecx
shr    $0x5,%ecx
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rbx
xor    %eax,%eax
repz scas %es:(%rdi),%eax
je     112f <find_first_bit+0x2f>
lea    -0x4(%edi),%edi
bsf    (%edi),%eax
sub    %ebx,%edi
shl    $0x3,%edi
add    %edi,%eax
mov    %eax,-0x20(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %edi,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x20(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_first_bit>:
push   %rbx
lea    0x1f(%rsi),%ecx
shr    $0x5,%ecx
mov    %rdi,%rbx
xor    %eax,%eax
repz scas %es:(%rdi),%eax
je     1118 <find_first_bit+0x18>
lea    -0x4(%edi),%edi
bsf    (%edi),%eax
sub    %ebx,%edi
shl    $0x3,%edi
add    %edi,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @find_first_bit(i64* %0, i32 %1) {
%3 = alloca i64*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i64* %0, i64** %3
store i32 %1, i32* %4
%8 = load i32, i32* %4
%9 = add i32 %8, 31
%10 = lshr i32 %9, 5
%11 = load i64*, i64** %3
%12 = load i64*, i64** %3
%13 = call { i32, i32, i64* } asm sideeffect "xorl %eax,%eax\0A\09repe; scasl\0A\09jz 1f\0A\09leal -4(%edi),%edi\0A\09bsfl (%edi),%eax\0A1:\09subl %ebx,%edi\0A\09shll $$3,%edi\0A\09addl %edi,%eax", "={ax},=&{cx},=&{di},1,2,{bx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %10, i64* %11, i64* %12)
%14 = extractvalue { i32, i32, i64* } %13, 0
%15 = extractvalue { i32, i32, i64* } %13, 1
%16 = extractvalue { i32, i32, i64* } %13, 2
store i32 %14, i32* %7
store i32 %15, i32* %5
%17 = ptrtoint i64* %16 to i64
%18 = trunc i64 %17 to i32
store i32 %18, i32* %6
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @find_first_bit(i64* %0, i32 %1) {
%3 = add i32 %1, 31
%4 = lshr i32 %3, 5
%5 = tail call { i32, i32, i64* } asm sideeffect "xorl %eax,%eax\0A\09repe; scasl\0A\09jz 1f\0A\09leal -4(%edi),%edi\0A\09bsfl (%edi),%eax\0A1:\09subl %ebx,%edi\0A\09shll $$3,%edi\0A\09addl %edi,%eax", "={ax},=&{cx},=&{di},1,2,{bx},~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %4, i64* %0, i64* %0)
%6 = extractvalue { i32, i32, i64* } %5, 0
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ EVIOCGRAB;
int ioctl(int, int /*<<< orphan*/, int /*<<< orphan*/);
int evf_input_ungrab(int fd) { return ioctl(fd, EVIOCGRAB, 0); }


x86 assembly (clang, -O0):
<evf_input_ungrab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1030 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evf_input_ungrab>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
jmp    1030 <ioctl@plt>

LLVM IR (-O0):
@EVIOCGRAB = global i32 0
define i32 @evf_input_ungrab(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @EVIOCGRAB
%5 = call i32 @ioctl(i32 %3, i32 %4, i32 0)
ret i32 %5
}

LLVM IR (-O2):
@EVIOCGRAB = global i32 0
define i32 @evf_input_ungrab(i32 %0) {
%2 = load i32, i32* @EVIOCGRAB
%3 = tail call i32 @ioctl(i32 %0, i32 %2, i32 0)
ret i32 %3
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
int bp__compute_hash(int);
uint64_t bp__compute_hashl(uint64_t key) {
  uint32_t keyh = key >> 32;
  uint32_t keyl = key & 0xffffffffLL;
  return ((uint64_t)bp__compute_hash(keyh) << 32) | bp__compute_hash(keyl);
}


x86 assembly (clang, -O0):
<bp__compute_hashl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
mov    %eax,-0x8(%rbp)
movslq -0x4(%rbp),%rax
movabs $0xffffffff,%rcx
and    %rcx,%rax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <bp__compute_hash@plt>
mov    $0x20,%ecx
shl    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <bp__compute_hash@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bp__compute_hashl>:
push   %rbx
mov    %edi,%ebx
call   1030 <bp__compute_hash@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <bp__compute_hash@plt>

LLVM IR (-O0):
define i32 @bp__compute_hashl(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 32
store i32 %6, i32* %3
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
%9 = and i64 %8, 4294967295
%10 = trunc i64 %9 to i32
store i32 %10, i32* %4
%11 = load i32, i32* %3
%12 = call i32 @bp__compute_hash(i32 %11)
%13 = shl i32 %12, 32
%14 = load i32, i32* %4
%15 = call i32 @bp__compute_hash(i32 %14)
%16 = or i32 %13, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @bp__compute_hashl(i32 %0) {
%2 = tail call i32 @bp__compute_hash(i32 poison)
%3 = tail call i32 @bp__compute_hash(i32 %0)
ret i32 poison
}
/* Type definitions */
struct image_object {
  int dummy;
};

/* Variables and functions */
int _singularity_image_open(struct image_object *, int);
int singularity_image_open(struct image_object *image, int open_flags) {
  return (_singularity_image_open(image, open_flags));
}


x86 assembly (clang, -O0):
<singularity_image_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <_singularity_image_open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<singularity_image_open>:
jmp    1030 <_singularity_image_open@plt>

LLVM IR (-O0):
%struct.image_object = type { i32 }
define i32 @singularity_image_open(%struct.image_object* %0, i32 %1) {
%3 = alloca %struct.image_object*
%4 = alloca i32
store %struct.image_object* %0, %struct.image_object** %3
store i32 %1, i32* %4
%5 = load %struct.image_object*, %struct.image_object** %3
%6 = load i32, i32* %4
%7 = call i32 @_singularity_image_open(%struct.image_object* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.image_object = type { i32 }
define i32 @singularity_image_open(%struct.image_object* %0, i32 %1) {
%3 = tail call i32 @_singularity_image_open(%struct.image_object* %0, i32 %1)
ret i32 %3
}
int dbsp2col(pos)
int pos;
{ return (1 + (pos % 64)); }


x86 assembly (clang, -O0):
<dbsp2col>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x40,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbsp2col>:
lea    0x3f(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
and    $0xffffffc0,%eax
neg    %eax
add    %edi,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @dbsp2col(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 64
%5 = add nsw i32 1, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @dbsp2col(i32 %0) {
%2 = srem i32 %0, 64
%3 = add nsw i32 %2, 1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void clear_progress_bar(int width) {
  printf("\r");
  unsigned i;
  for (i = 0; i < width; i++)
    printf("%c", ' ');
}


x86 assembly (clang, -O0):
<clear_progress_bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    115d <clear_progress_bar+0x4d>
lea    0xebf(%rip),%rdi
mov    $0x20,%esi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1130 <clear_progress_bar+0x20>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_progress_bar>:
push   %rbx
mov    %edi,%ebx
mov    $0xd,%edi
call   1030 <putchar@plt>
test   %ebx,%ebx
je     113f <clear_progress_bar+0x2f>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x20,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1130 <clear_progress_bar+0x20>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"\0D\00"
@.str.1 = [3 x i8] c"%c\00"
define void @clear_progress_bar(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %3
br label %5
5: ; preds = %11, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp ult i32 %6, %7
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 32)
br label %11
11: ; preds = %9
%12 = load i32, i32* %3
%13 = add i32 %12, 1
store i32 %13, i32* %3
br label %5
14: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @clear_progress_bar(i32 %0) {
%2 = tail call i32 @putchar(i32 13)
%3 = icmp eq i32 %0, 0
br i1 %3, label %9, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = tail call i32 @putchar(i32 32)
%7 = add nuw i32 %5, 1
%8 = icmp eq i32 %7, %0
br i1 %8, label %9, label %4
9: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *malloc(int);
int /*<<< orphan*/ printf(char *);
int main() {
  void *p1 = malloc(sizeof(char));
  if (p1 == NULL) {
    printf("Error: La memoria esta llena");
  } else {
    printf("Se asigno correctamente p1");
  }
  free(p1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1169 <main+0x39>
lea    0xea1(%rip),%rdi
call   1040 <printf@plt>
jmp    1175 <main+0x45>
lea    0xead(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x1,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
lea    0xeb8(%rip),%rax
lea    0xece(%rip),%rdi
cmove  %rax,%rdi
call   1040 <printf@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"Error: La memoria esta llena\00"
@.str.1 = [27 x i8] c"Se asigno correctamente p1\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* @malloc(i32 1)
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
br label %10
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
%11 = load i8*, i8** %2
%12 = call i32 @free(i8* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [29 x i8] c"Error: La memoria esta llena\00"
@.str.1 = [27 x i8] c"Se asigno correctamente p1\00"
define i32 @main() {
%1 = tail call dereferenceable_or_null(1) i8* @malloc(i32 1)
%2 = icmp eq i8* %1, null
%3 = select i1 %2, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0)
%4 = tail call i32 @printf(i8* dereferenceable(1) %3)
%5 = tail call i32 @free(i8* %1)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fwrite(void const *, int, int, int /*<<< orphan*/ *);
int Serialize_WriteData(FILE *Stream, const void *Data, int Bytes) {
  return fwrite(Data, 1, Bytes, Stream);
}


x86 assembly (clang, -O0):
<Serialize_WriteData>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rcx
mov    $0x1,%esi
call   1030 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Serialize_WriteData>:
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x1,%esi
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
define i32 @Serialize_WriteData(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = load i32, i32* %6
%9 = load i32*, i32** %4
%10 = call i32 @fwrite(i8* %7, i32 1, i32 %8, i32* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @Serialize_WriteData(i32* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = tail call i32 @fwrite(i8* %1, i32 1, i32 %2, i32* %0)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ bar(int);
void d(int x) {
  bar(x);
  bar(x + 1);
}


x86 assembly (clang, -O0):
<d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bar@plt>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
call   1030 <bar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d>:
push   %rbx
mov    %edi,%ebx
call   1030 <bar@plt>
add    $0x1,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <bar@plt>

LLVM IR (-O0):
define void @d(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @bar(i32 %3)
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
%7 = call i32 @bar(i32 %6)
ret void
}

LLVM IR (-O2):
define void @d(i32 %0) {
%2 = tail call i32 @bar(i32 %0)
%3 = add nsw i32 %0, 1
%4 = tail call i32 @bar(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ col();
int /*<<< orphan*/ nl();
int /*<<< orphan*/ prefix();
int /*<<< orphan*/ printlabel(int);
void postlabel(int label) {
  prefix();
  printlabel(label);
  col();
  nl();
}


x86 assembly (clang, -O0):
<postlabel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1050 <prefix@plt>
mov    -0x4(%rbp),%edi
call   1060 <printlabel@plt>
mov    $0x0,%al
call   1040 <col@plt>
mov    $0x0,%al
call   1030 <nl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<postlabel>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1050 <prefix@plt>
mov    %ebx,%edi
call   1060 <printlabel@plt>
xor    %eax,%eax
call   1040 <col@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <nl@plt>

LLVM IR (-O0):
define void @postlabel(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @prefix()
%4 = load i32, i32* %2
%5 = call i32 @printlabel(i32 %4)
%6 = call i32 (...) @col()
%7 = call i32 (...) @nl()
ret void
}

LLVM IR (-O2):
define void @postlabel(i32 %0) {
%2 = tail call i32 (...) @prefix()
%3 = tail call i32 @printlabel(i32 %0)
%4 = tail call i32 (...) @col()
%5 = tail call i32 (...) @nl()
ret void
}
int addTwo(short a, char b) { return a + b; }


x86 assembly (clang, -O0):
<addTwo>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movswl -0x2(%rbp),%eax
movsbl -0x3(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<addTwo>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @addTwo(i16 signext %0, i8 signext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i16, i16* %3
%6 = sext i16 %5 to i32
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = add nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @addTwo(i16 signext %0, i8 signext %1) {
%3 = sext i16 %0 to i32
%4 = sext i8 %1 to i32
%5 = add nsw i32 %4, %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ ft_putendl_fd(char const *, int);
void ft_putendl(char const *s) { ft_putendl_fd(s, 1); }


x86 assembly (clang, -O0):
<ft_putendl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <ft_putendl_fd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putendl>:
mov    $0x1,%esi
jmp    1030 <ft_putendl_fd@plt>

LLVM IR (-O0):
define void @ft_putendl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @ft_putendl_fd(i8* %3, i32 1)
ret void
}

LLVM IR (-O2):
define void @ft_putendl(i8* %0) {
%2 = tail call i32 @ft_putendl_fd(i8* %0, i32 1)
ret void
}
/* Variables and functions */
char *crypt(char const *, char const *);
char *cryptl(const char *key, const char *salt) { return crypt(key, salt); }


x86 assembly (clang, -O0):
<cryptl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <crypt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cryptl>:
jmp    1030 <crypt@plt>

LLVM IR (-O0):
define i8* @cryptl(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @crypt(i8* %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @cryptl(i8* %0, i8* %1) {
%3 = tail call i8* @crypt(i8* %0, i8* %1)
ret i8* %3
}
void CFGMR3GetChildFV(void) {}


x86 assembly (clang, -O0):
<CFGMR3GetChildFV>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFGMR3GetChildFV>:
ret

LLVM IR (-O0):
define void @CFGMR3GetChildFV() {
ret void
}

LLVM IR (-O2):
define void @CFGMR3GetChildFV() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ I2C_OIS_mem_write(int, int);
int /*<<< orphan*/ I2C_OIS_per_write(int, int);
void EnableShiftOIS(void) {
  I2C_OIS_per_write(0x8B, (0x3489));
  I2C_OIS_per_write(0xCB, (0x3489));
  I2C_OIS_mem_write(0x10, 0x0000);
}


x86 assembly (clang, -O0):
<EnableShiftOIS>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8b,%edi
mov    $0x3489,%esi
call   1040 <I2C_OIS_per_write@plt>
mov    $0xcb,%edi
mov    $0x3489,%esi
call   1040 <I2C_OIS_per_write@plt>
mov    $0x10,%edi
xor    %esi,%esi
call   1030 <I2C_OIS_mem_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<EnableShiftOIS>:
push   %rax
mov    $0x8b,%edi
mov    $0x3489,%esi
call   1040 <I2C_OIS_per_write@plt>
mov    $0xcb,%edi
mov    $0x3489,%esi
call   1040 <I2C_OIS_per_write@plt>
mov    $0x10,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <I2C_OIS_mem_write@plt>

LLVM IR (-O0):
define void @EnableShiftOIS() {
%1 = call i32 @I2C_OIS_per_write(i32 139, i32 13449)
%2 = call i32 @I2C_OIS_per_write(i32 203, i32 13449)
%3 = call i32 @I2C_OIS_mem_write(i32 16, i32 0)
ret void
}

LLVM IR (-O2):
define void @EnableShiftOIS() {
%1 = tail call i32 @I2C_OIS_per_write(i32 139, i32 13449)
%2 = tail call i32 @I2C_OIS_per_write(i32 203, i32 13449)
%3 = tail call i32 @I2C_OIS_mem_write(i32 16, i32 0)
ret void
}