xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ ARCH_GET_GS;
int /*<<< orphan*/ EXIT_FAILURE;
scalar_t__ arch_prctl(int /*<<< orphan*/, unsigned long);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
unsigned long get_gs(void) {
  unsigned long fs_addr;
  if (arch_prctl(ARCH_GET_GS, (unsigned long)&fs_addr)) {
    perror("arch_prctl(ARCH_GET_GS)");
    exit(EXIT_FAILURE);
  }
  return fs_addr;
}


x86 assembly (clang, -O0):
<get_gs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
call   1030 <arch_prctl@plt>
cmp    $0x0,%rax
je     116e <get_gs+0x3e>
lea    0xea5(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e71(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_gs>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <arch_prctl@plt>
test   %rax,%rax
jne    114d <get_gs+0x1d>
mov    (%rsp),%rax
pop    %rcx
ret
lea    0xeac(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e78(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@ARCH_GET_GS = global i32 0
@.str = [24 x i8] c"arch_prctl(ARCH_GET_GS)\00"
@EXIT_FAILURE = global i32 0
define i64 @get_gs() {
%1 = alloca i64
%2 = load i32, i32* @ARCH_GET_GS
%3 = ptrtoint i64* %1 to i64
%4 = call i64 @arch_prctl(i32 %2, i64 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %0
%7 = call i32 @perror(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = call i32 @exit(i32 %8)
unreachable
10: ; preds = %0
%11 = load i64, i64* %1
ret i64 %11
}

LLVM IR (-O2):
@ARCH_GET_GS = global i32 0
@.str = [24 x i8] c"arch_prctl(ARCH_GET_GS)\00"
@EXIT_FAILURE = global i32 0
define i64 @get_gs() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
%3 = load i32, i32* @ARCH_GET_GS
%4 = ptrtoint i64* %1 to i64
%5 = call i64 @arch_prctl(i32 %3, i64 %4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %0
%8 = call i32 @perror(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%9 = load i32, i32* @EXIT_FAILURE
%10 = call i32 @exit(i32 %9)
unreachable
11: ; preds = %0
%12 = load i64, i64* %1
ret i64 %12
}
/* Type definitions */
struct mmbuf_obj {
  int dummy;
};

/* Variables and functions */
int mmbuf__setup(struct mmbuf_obj *, char *, char);
int setup(struct mmbuf_obj *m, char *file_path, char mode) {
  return mmbuf__setup(m, file_path, mode);
}


x86 assembly (clang, -O0):
<setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movsbl -0x11(%rbp),%edx
call   1030 <mmbuf__setup@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup>:
jmp    1030 <mmbuf__setup@plt>

LLVM IR (-O0):
%struct.mmbuf_obj = type { i32 }
define i32 @setup(%struct.mmbuf_obj* %0, i8* %1, i8 signext %2) {
%4 = alloca %struct.mmbuf_obj*
%5 = alloca i8*
%6 = alloca i8
store %struct.mmbuf_obj* %0, %struct.mmbuf_obj** %4
store i8* %1, i8** %5
store i8 %2, i8* %6
%7 = load %struct.mmbuf_obj*, %struct.mmbuf_obj** %4
%8 = load i8*, i8** %5
%9 = load i8, i8* %6
%10 = call i32 @mmbuf__setup(%struct.mmbuf_obj* %7, i8* %8, i8 signext %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.mmbuf_obj = type { i32 }
define i32 @setup(%struct.mmbuf_obj* %0, i8* %1, i8 signext %2) {
%4 = tail call i32 @mmbuf__setup(%struct.mmbuf_obj* %0, i8* %1, i8 signext %2)
ret i32 %4
}
/* Variables and functions */
char *trim_left(char *);
int /*<<< orphan*/ trim_right(char *);
char *trim(char *szString) {
  trim_right(szString);
  return trim_left(szString);
}


x86 assembly (clang, -O0):
<trim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <trim_right@plt>
mov    -0x8(%rbp),%rdi
call   1040 <trim_left@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trim>:
push   %rbx
mov    %rdi,%rbx
call   1030 <trim_right@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <trim_left@plt>

LLVM IR (-O0):
define i8* @trim(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @trim_right(i8* %3)
%5 = load i8*, i8** %2
%6 = call i8* @trim_left(i8* %5)
ret i8* %6
}

LLVM IR (-O2):
define i8* @trim(i8* %0) {
%2 = tail call i32 @trim_right(i8* %0)
%3 = tail call i8* @trim_left(i8* %0)
ret i8* %3
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int bits_clrb(uint8_t *vec, size_t size, uint8_t bit) {
  if (size <= (size_t)(bit >> 3)) {
    return -1;
  }
  *(vec + (bit >> 3)) &= (uint8_t)(~(1 << (bit & 0x07)));
  return 1;
}


x86 assembly (clang, -O0):
<bits_clrb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x1c(%rbp),%ecx
sar    $0x3,%ecx
movslq %ecx,%rcx
cmp    %rcx,%rax
ja     1131 <bits_clrb+0x31>
movl   $0xffffffff,-0x4(%rbp)
jmp    115b <bits_clrb+0x5b>
mov    -0x1c(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%edx
shl    %cl,%edx
xor    $0xffffffff,%edx
mov    -0x10(%rbp),%rax
mov    -0x1c(%rbp),%ecx
sar    $0x3,%ecx
movslq %ecx,%rcx
and    (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bits_clrb>:
mov    %edx,%eax
sar    $0x3,%eax
movslq %eax,%r8
mov    $0xffffffff,%eax
cmp    %rsi,%r8
jae    1127 <bits_clrb+0x27>
and    $0x7,%dl
mov    $0xfffffffe,%eax
mov    %edx,%ecx
rol    %cl,%eax
and    %eax,(%rdi,%r8,4)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bits_clrb(i32* %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32
store i32* %0, i32** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%8 = load i64, i64* %6
%9 = load i32, i32* %7
%10 = ashr i32 %9, 3
%11 = sext i32 %10 to i64
%12 = icmp ule i64 %8, %11
br i1 %12, label %13, label %14
13: ; preds = %3
store i32 -1, i32* %4
br label %26
14: ; preds = %3
%15 = load i32, i32* %7
%16 = and i32 %15, 7
%17 = shl i32 1, %16
%18 = xor i32 %17, -1
%19 = load i32*, i32** %5
%20 = load i32, i32* %7
%21 = ashr i32 %20, 3
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i32, i32* %19, i64 %22
%24 = load i32, i32* %23
%25 = and i32 %24, %18
store i32 %25, i32* %23
store i32 1, i32* %4
br label %26
26: ; preds = %14, %13
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @bits_clrb(i32* nocapture %0, i64 %1, i32 %2) {
%4 = ashr i32 %2, 3
%5 = sext i32 %4 to i64
%6 = icmp ult i64 %5, %1
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = and i32 %2, 7
%9 = shl nuw nsw i32 1, %8
%10 = xor i32 %9, -1
%11 = getelementptr inbounds i32, i32* %0, i64 %5
%12 = load i32, i32* %11
%13 = and i32 %12, %10
store i32 %13, i32* %11
br label %14
14: ; preds = %3, %7
%15 = phi i32 [ 1, %7 ], [ -1, %3 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int closeTargetfile(int fd) {
  int retValue = 0;
  if (fd > -1) {
    close(fd);
  }
  return retValue;
}


x86 assembly (clang, -O0):
<closeTargetfile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jle    1134 <closeTargetfile+0x24>
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<closeTargetfile>:
test   %edi,%edi
js     111e <closeTargetfile+0xe>
push   %rax
call   1030 <close@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @closeTargetfile(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i32 @close(i32 %7)
br label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @closeTargetfile(i32 %0) {
%2 = icmp sgt i32 %0, -1
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @close(i32 %0)
br label %5
5: ; preds = %3, %1
ret i32 0
}
int test_imm_23int64_highword_reg(long long val) {
  return ((val >> 32) & (0x23 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_23int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x23,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_23int64_highword_reg>:
movabs $0x2300000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_23int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 35
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_23int64_highword_reg(i64 %0) {
%2 = and i64 %0, 150323855360
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void gtk_tree_model_get_iter() {}


x86 assembly (clang, -O0):
<gtk_tree_model_get_iter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_model_get_iter>:
ret

LLVM IR (-O0):
define void @gtk_tree_model_get_iter() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_model_get_iter() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, ...);
void usage(char *prog_name) {
  printf("%s", prog_name);
  printf(" -s server\tserver to connect to\n"
         " -n nick\tnickname (default: %s)\n"
         " -p port\tIRC port to connect to (default: 6667)\n"
         " -d\t\trun %s as a daemon\n"
         " -h\t\tshow this help message and exit\n",
         "JacKBot", "JacKBot");
  return;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xece(%rip),%rdi
lea    0xf75(%rip),%rdx
mov    %rdx,%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xeda(%rip),%rdi
lea    0xf81(%rip),%rdx
mov    %rdx,%rsi
xor    %eax,%eax
pop    %rcx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [174 x i8] c" -s server\09server to connect to\0A -n nick\09nickname (default: %s)\0A -p port\09IRC port to connect to (default: 6667)\0A -d\09\09run %s as a daemon\0A -h\09\09show this help message and exit\0A\00"
@.str.2 = [8 x i8] c"JacKBot\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([174 x i8], [174 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [174 x i8] c" -s server\09server to connect to\0A -n nick\09nickname (default: %s)\0A -p port\09IRC port to connect to (default: 6667)\0A -d\09\09run %s as a daemon\0A -h\09\09show this help message and exit\0A\00"
@.str.2 = [8 x i8] c"JacKBot\00"
define void @usage(i8* %0) {
%2 = tail call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([174 x i8], [174 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0))
ret void
}
int show_d2199_block_regs(unsigned int block_id) { return 0; }


x86 assembly (clang, -O0):
<show_d2199_block_regs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_d2199_block_regs>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @show_d2199_block_regs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @show_d2199_block_regs(i32 %0) {
ret i32 0
}
/* Variables and functions */
int getpid();
int getppid();
int /*<<< orphan*/ printf(char *, ...);
void print_pid(void) {
  printf("==============================\n");
  printf("Starting share test...\n");
  printf("My pid is %d and parents is %d\n", getpid(), getppid());
}


x86 assembly (clang, -O0):
<print_pid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xed3(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1050 <getppid@plt>
mov    -0x4(%rbp),%esi
mov    %eax,%edx
lea    0xec7(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_pid>:
push   %rbx
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeeb(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <getpid@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1060 <getppid@plt>
lea    0xe90(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
xor    %eax,%eax
pop    %rbx
jmp    1050 <printf@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"==============================\0A\00"
@.str.1 = [24 x i8] c"Starting share test...\0A\00"
@.str.2 = [32 x i8] c"My pid is %d and parents is %d\0A\00"
define void @print_pid() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 (...) @getpid()
%4 = call i32 (...) @getppid()
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str.2, i64 0, i64 0), i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@.str.2 = [32 x i8] c"My pid is %d and parents is %d\0A\00"
@str = [31 x i8] c"==============================\00"
@str.3 = [23 x i8] c"Starting share test...\00"
define void @print_pid() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 (...) @getpid()
%4 = tail call i32 (...) @getppid()
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @.str.2, i64 0, i64 0), i32 %3, i32 %4)
ret void
}
int ipmi_cmdraw_lan2(char *node, unsigned char cmd, unsigned char netfn,
                     unsigned char lun, unsigned char sa, unsigned char bus,
                     unsigned char *pdata, int sdata, unsigned char *presp,
                     int *sresp, unsigned char *pcc, char fdebugcmd) {
  return (-8);
}


x86 assembly (clang, -O0):
<ipmi_cmdraw_lan2>:
push   %rbp
mov    %rsp,%rbp
mov    %r8d,-0x20(%rbp)
mov    %ecx,%eax
mov    -0x20(%rbp),%ecx
mov    %eax,-0x1c(%rbp)
mov    %edx,%eax
mov    -0x1c(%rbp),%edx
mov    %eax,-0x18(%rbp)
mov    %esi,%eax
mov    -0x18(%rbp),%esi
mov    %eax,-0x14(%rbp)
mov    %rdi,%r8
mov    -0x14(%rbp),%edi
mov    %r9b,%al
mov    0x38(%rbp),%r9b
mov    0x30(%rbp),%r9
mov    0x28(%rbp),%r9
mov    0x20(%rbp),%r9
mov    0x18(%rbp),%r9d
mov    0x10(%rbp),%r9
mov    %r8,-0x8(%rbp)
mov    %dil,-0x9(%rbp)
mov    %sil,-0xa(%rbp)
mov    %dl,-0xb(%rbp)
mov    %cl,-0xc(%rbp)
mov    %al,-0xd(%rbp)
mov    $0xfffffff8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipmi_cmdraw_lan2>:
mov    $0xfffffff8,%eax
ret

LLVM IR (-O0):
define i32 @ipmi_cmdraw_lan2(i8* %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8 zeroext %4, i8 zeroext %5, i8* %6, i32 %7, i8* %8, i32* %9, i8* %10, i8 signext %11) {
%13 = alloca i8*
%14 = alloca i8
%15 = alloca i8
%16 = alloca i8
%17 = alloca i8
%18 = alloca i8
%19 = alloca i8*
%20 = alloca i32
%21 = alloca i8*
%22 = alloca i32*
%23 = alloca i8*
%24 = alloca i8
store i8* %0, i8** %13
store i8 %1, i8* %14
store i8 %2, i8* %15
store i8 %3, i8* %16
store i8 %4, i8* %17
store i8 %5, i8* %18
store i8* %6, i8** %19
store i32 %7, i32* %20
store i8* %8, i8** %21
store i32* %9, i32** %22
store i8* %10, i8** %23
store i8 %11, i8* %24
ret i32 -8
}

LLVM IR (-O2):
define i32 @ipmi_cmdraw_lan2(i8* nocapture readnone %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8 zeroext %4, i8 zeroext %5, i8* nocapture readnone %6, i32 %7, i8* nocapture readnone %8, i32* nocapture readnone %9, i8* nocapture readnone %10, i8 signext %11) {
ret i32 -8
}
/* Variables and functions */
int /*<<< orphan*/ clear_screen_cache();
int /*<<< orphan*/ control_ball();
int /*<<< orphan*/ draw_moving_wall();
int /*<<< orphan*/ draw_static_wall();
int /*<<< orphan*/ flash_screen();
int /*<<< orphan*/ usleep(int);
int main() {
  for (;;) {
    clear_screen_cache();
    draw_static_wall();
    draw_moving_wall();
    control_ball();
    flash_screen();
    usleep(1E5);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <clear_screen_cache@plt>
mov    $0x0,%al
call   1070 <draw_static_wall@plt>
mov    $0x0,%al
call   1030 <draw_moving_wall@plt>
mov    $0x0,%al
call   1050 <control_ball@plt>
mov    $0x0,%al
call   1040 <flash_screen@plt>
mov    $0x186a0,%edi
call   1080 <usleep@plt>
jmp    116f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1060 <clear_screen_cache@plt>
xor    %eax,%eax
call   1070 <draw_static_wall@plt>
xor    %eax,%eax
call   1030 <draw_moving_wall@plt>
xor    %eax,%eax
call   1050 <control_ball@plt>
xor    %eax,%eax
call   1040 <flash_screen@plt>
mov    $0x186a0,%edi
call   1080 <usleep@plt>
jmp    1170 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %2, %0
%3 = call i32 (...) @clear_screen_cache()
%4 = call i32 (...) @draw_static_wall()
%5 = call i32 (...) @draw_moving_wall()
%6 = call i32 (...) @control_ball()
%7 = call i32 (...) @flash_screen()
%8 = call i32 @usleep(i32 100000)
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @clear_screen_cache()
%3 = tail call i32 (...) @draw_static_wall()
%4 = tail call i32 (...) @draw_moving_wall()
%5 = tail call i32 (...) @control_ball()
%6 = tail call i32 (...) @flash_screen()
%7 = tail call i32 @usleep(i32 100000)
br label %1
}
int main(void) {
  asm("nop\n nop\n nop\n");
  __asm("movl $0x0, %ecx");
  __asm("cmp $0x0, %ecx");
  __asm("jne skip");
  __asm("call foo");
  __asm("skip:");
  bar();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
nop
nop
nop
mov    $0x0,%ecx
cmp    $0x0,%ecx
jne    1145 <skip>
call   1040 <foo@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
nop
nop
nop
mov    $0x0,%ecx
cmp    $0x0,%ecx
jne    1133 <skip>
call   1040 <foo@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @bar()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
tail call void asm sideeffect "nop\0A nop\0A nop\0A", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "movl $$0x0, %ecx", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "cmp $$0x0, %ecx", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "jne skip", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "call foo", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "skip:", "~{dirflag},~{fpsr},~{flags}"()
%1 = tail call i32 (...) @bar()
ret i32 0
}
int col_byte_big5hkscs(int col) { return (col >= 0x3f ? 0x62 : 0x40) + col; }


x86 assembly (clang, -O0):
<col_byte_big5hkscs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x40,%eax
mov    $0x62,%ecx
cmp    $0x3f,%edx
cmovge %ecx,%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<col_byte_big5hkscs>:
lea    0x40(%rdi),%ecx
lea    0x62(%rdi),%eax
cmp    $0x3f,%edi
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @col_byte_big5hkscs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 63
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 98, i32 64
%7 = load i32, i32* %2
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @col_byte_big5hkscs(i32 %0) {
%2 = icmp sgt i32 %0, 62
%3 = select i1 %2, i32 98, i32 64
%4 = add nsw i32 %3, %0
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_1__;

/* Type definitions */
struct TYPE_4__ {
  int /*<<< orphan*/ *we_wordv;
};
typedef TYPE_1__ wordexp_t;

/* Variables and functions */
char *strdup(int /*<<< orphan*/);
int /*<<< orphan*/ wordexp(char *, TYPE_1__ *, int /*<<< orphan*/);
int /*<<< orphan*/ wordfree(TYPE_1__ *);
char *hab_canon_shellpath(char *str) {
  wordexp_t exp_result;
  wordexp(str, &exp_result, 0);
  char *r = strdup(exp_result.we_wordv[0]);
  wordfree(&exp_result);
  return r;
}


x86 assembly (clang, -O0):
<hab_canon_shellpath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1040 <wordexp@plt>
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1050 <strdup@plt>
mov    %rax,-0x18(%rbp)
lea    -0x10(%rbp),%rdi
call   1030 <wordfree@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hab_canon_shellpath>:
push   %r14
push   %rbx
push   %rax
mov    %rsp,%r14
mov    %r14,%rsi
xor    %edx,%edx
call   1040 <wordexp@plt>
mov    (%rsp),%rax
mov    (%rax),%edi
call   1050 <strdup@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <wordfree@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { i32* }
define i8* @hab_canon_shellpath(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.TYPE_4__
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @wordexp(i8* %5, %struct.TYPE_4__* %3, i32 0)
%7 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %3, i32 0, i32 0
%8 = load i32*, i32** %7
%9 = getelementptr inbounds i32, i32* %8, i64 0
%10 = load i32, i32* %9
%11 = call i8* @strdup(i32 %10)
store i8* %11, i8** %4
%12 = call i32 @wordfree(%struct.TYPE_4__* %3)
%13 = load i8*, i8** %4
ret i8* %13
}

LLVM IR (-O2):
%struct.TYPE_4__ = type { i32* }
define i8* @hab_canon_shellpath(i8* %0) {
%2 = alloca %struct.TYPE_4__
%3 = bitcast %struct.TYPE_4__* %2 to i8*
%4 = call i32 @wordexp(i8* %0, %struct.TYPE_4__* %2, i32 0)
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %2, i64 0, i32 0
%6 = load i32*, i32** %5
%7 = load i32, i32* %6
%8 = call i8* @strdup(i32 %7)
%9 = call i32 @wordfree(%struct.TYPE_4__* %2)
ret i8* %8
}
/* Variables and functions */
scalar_t__ ReadGx(int);
int /*<<< orphan*/ WriteGx(int, unsigned int);
int PLAL_PrepForTVout(void) {
  unsigned int reg;
  reg = 0;
  WriteGx(0x10028, reg);
  reg = (int)ReadGx(0x10028);
  reg |= (1 << 6);
  WriteGx(0x10028, reg);
  return 0;
}


x86 assembly (clang, -O0):
<PLAL_PrepForTVout>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x10028,%edi
call   1040 <WriteGx@plt>
mov    $0x10028,%edi
call   1030 <ReadGx@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0x40,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x10028,%edi
call   1040 <WriteGx@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PLAL_PrepForTVout>:
push   %rax
mov    $0x10028,%edi
xor    %esi,%esi
call   1040 <WriteGx@plt>
mov    $0x10028,%edi
call   1030 <ReadGx@plt>
or     $0x40,%eax
mov    $0x10028,%edi
mov    %eax,%esi
call   1040 <WriteGx@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @PLAL_PrepForTVout() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @WriteGx(i32 65576, i32 %2)
%4 = call i64 @ReadGx(i32 65576)
%5 = trunc i64 %4 to i32
store i32 %5, i32* %1
%6 = load i32, i32* %1
%7 = or i32 %6, 64
store i32 %7, i32* %1
%8 = load i32, i32* %1
%9 = call i32 @WriteGx(i32 65576, i32 %8)
ret i32 0
}

LLVM IR (-O2):
define i32 @PLAL_PrepForTVout() {
%1 = tail call i32 @WriteGx(i32 65576, i32 0)
%2 = tail call i64 @ReadGx(i32 65576)
%3 = trunc i64 %2 to i32
%4 = or i32 %3, 64
%5 = tail call i32 @WriteGx(i32 65576, i32 %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ unsetenv(char const *);
void c_unsetenv(const char *variable) { unsetenv(variable); }


x86 assembly (clang, -O0):
<c_unsetenv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <unsetenv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_unsetenv>:
jmp    1030 <unsetenv@plt>

LLVM IR (-O0):
define void @c_unsetenv(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @unsetenv(i8* %3)
ret void
}

LLVM IR (-O2):
define void @c_unsetenv(i8* nocapture %0) {
%2 = tail call i32 @unsetenv(i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct reg {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ get_regs(struct reg **, size_t *, int /*<<< orphan*/,
                            int /*<<< orphan*/);
ssize_t intel_reg_spec_builtin(struct reg **regs, uint32_t devid) {
  size_t nregs = 0;
  *regs = NULL;
  return get_regs(regs, &nregs, 0, devid);
}


x86 assembly (clang, -O0):
<intel_reg_spec_builtin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%ecx
lea    -0x18(%rbp),%rsi
xor    %edx,%edx
call   1030 <get_regs@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intel_reg_spec_builtin>:
push   %rax
mov    %esi,%ecx
movq   $0x0,(%rsp)
movq   $0x0,(%rdi)
mov    %rsp,%rsi
xor    %edx,%edx
call   1030 <get_regs@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.reg = type { i32 }
define i32 @intel_reg_spec_builtin(%struct.reg** %0, i32 %1) {
%3 = alloca %struct.reg**
%4 = alloca i32
%5 = alloca i64
store %struct.reg** %0, %struct.reg*** %3
store i32 %1, i32* %4
store i64 0, i64* %5
%6 = load %struct.reg**, %struct.reg*** %3
store %struct.reg* null, %struct.reg** %6
%7 = load %struct.reg**, %struct.reg*** %3
%8 = load i32, i32* %4
%9 = call i32 @get_regs(%struct.reg** %7, i64* %5, i32 0, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.reg = type { i32 }
define i32 @intel_reg_spec_builtin(%struct.reg** %0, i32 %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
store i64 0, i64* %3
store %struct.reg* null, %struct.reg** %0
%5 = call i32 @get_regs(%struct.reg** %0, i64* %3, i32 0, i32 %1)
ret i32 %5
}
unsigned xrop3_209_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = D ^ T;
  stk2 = S | stk3;
  stk1 = T ^ stk2;
  stk1 = ~stk1;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_209_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_209_1_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%edx
shl    $0x8,%edx
or     %esi,%edx
mov    %edx,%eax
xor    $0xff,%eax
or     %ecx,%eax
xor    %edx,%eax
or     %ecx,%eax
not    %eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_209_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = load i32, i32* %7
%25 = xor i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %6
%27 = load i32, i32* %10
%28 = or i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %7
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = xor i32 %32, -1
store i32 %33, i32* %8
%34 = load i32, i32* %8
%35 = load i32, i32* %6
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %6
%40 = and i32 %38, %39
%41 = or i32 %37, %40
ret i32 %41
}

LLVM IR (-O2):
define i32 @xrop3_209_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %6, 255
%8 = or i32 %7, %4
%9 = xor i32 %8, %6
%10 = or i32 %9, %4
%11 = xor i32 %10, -1
%12 = or i32 %11, %3
ret i32 %12
}
__attribute__((no_instrument_function)) __attribute__((always_)) int
native_write_msr_safe(unsigned int msr, unsigned low, unsigned high) {
  int err;
  asm volatile("2: wrmsr ; xor %[err],%[err]\n"
               "1:\n\t"
               ".section .fixup,\"ax\"\n\t"
               "3:  mov %[fault],%[err] ; jmp 1b\n\t"
               ".previous\n\t"
               " .section __ex_table,\"a\"\n"
               " "
               ".balign 8"
               " "
               "\n"
               " "
               ".quad"
               " "
               "2b"
               ","
               "3b"
               "\n"
               " .previous\n"
               : [err] "=a"(err)
               : "c"(msr), "0"(low), "d"(high), [fault] "i"(-5)
               : "memory");
  return err;
}


x86 assembly (clang, -O0):
<native_write_msr_safe>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%edx
wrmsr
xor    %eax,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_write_msr_safe>:
mov    %esi,%eax
mov    %edi,%ecx
wrmsr
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @native_write_msr_safe(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 asm sideeffect "2: wrmsr ; xor $0,$0\0A1:\0A\09.section .fixup,\22ax\22\0A\093: mov $4,$0 ; jmp 1b\0A\09.previous\0A\09 .section __ex_table,\22a\22\0A .balign 8 \0A .quad 2b,3b\0A .previous\0A", "={ax},{cx},0,{dx},i,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %8, i32 %9, i32 %10, i32 -5)
store i32 %11, i32* %7
%12 = load i32, i32* %7
ret i32 %12
}

LLVM IR (-O2):
define i32 @native_write_msr_safe(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 asm sideeffect "2: wrmsr ; xor $0,$0\0A1:\0A\09.section .fixup,\22ax\22\0A\093: mov $4,$0 ; jmp 1b\0A\09.previous\0A\09 .section __ex_table,\22a\22\0A .balign 8 \0A .quad 2b,3b\0A .previous\0A", "={ax},{cx},0,{dx},i,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %0, i32 %1, i32 %2, i32 -5)
ret i32 %4
}
int function(int arg) {
  int i;
  for (i = 0; i < 5; i++) {
  }
  if (i < 0) {
  }
  return 0;
}


x86 assembly (clang, -O0):
<function>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x5,-0x8(%rbp)
jge    112b <function+0x2b>
jmp    111d <function+0x1d>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <function+0xe>
cmpl   $0x0,-0x8(%rbp)
jge    113a <function+0x3a>
jmp    113a <function+0x3a>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<function>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @function(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 5
br i1 %6, label %7, label %11
7: ; preds = %4
br label %8
8: ; preds = %7
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %11
br label %15
15: ; preds = %14, %11
ret i32 0
}

LLVM IR (-O2):
define i32 @function(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
void g_error(char *message) { printf("%s: %s\n", "cd", message); }


x86 assembly (clang, -O0):
<g_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xeda(%rip),%rsi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_error>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xee7(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s: %s\0A\00"
@.str.1 = [3 x i8] c"cd\00"
define void @g_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s: %s\0A\00"
@.str.1 = [3 x i8] c"cd\00"
define void @g_error(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
uint32_t mach_task_self() {
  printf(" .... Hello from mach_task_self()!\n");
  return 0;
}


x86 assembly (clang, -O0):
<mach_task_self>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mach_task_self>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [36 x i8] c" .... Hello from mach_task_self()!\0A\00"
define i32 @mach_task_self() {
%1 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [35 x i8] c" .... Hello from mach_task_self()!\00"
define i32 @mach_task_self() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ clientSend();
int /*<<< orphan*/ serialiseResult(int);
int sendResult(int resultat) {
  serialiseResult(resultat);
  clientSend();
  return 0;
}


x86 assembly (clang, -O0):
<sendResult>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <serialiseResult@plt>
mov    $0x0,%al
call   1040 <clientSend@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendResult>:
push   %rax
call   1030 <serialiseResult@plt>
xor    %eax,%eax
call   1040 <clientSend@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sendResult(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @serialiseResult(i32 %3)
%5 = call i32 (...) @clientSend()
ret i32 0
}

LLVM IR (-O2):
define i32 @sendResult(i32 %0) {
%2 = tail call i32 @serialiseResult(i32 %0)
%3 = tail call i32 (...) @clientSend()
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int line_style;
};
typedef TYPE_1__ XGCValues;

/* Variables and functions */
void set_XGCValues_line_style(void *_p, int _v) {
  ((XGCValues *)_p)->line_style = (int)_v;
}


x86 assembly (clang, -O0):
<set_XGCValues_line_style>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XGCValues_line_style>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XGCValues_line_style(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XGCValues_line_style(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main(int argc, char *argv[]) {
  int a;
  scanf("%d", &a);
  if (a % 2) {
    printf("%d is odd!!!!!\n", a);
  } else {
    printf("%d is even!!#@@#@\n", a);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
lea    -0x14(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x14(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     116e <main+0x4e>
mov    -0x14(%rbp),%esi
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
jmp    117d <main+0x5d>
mov    -0x14(%rbp),%esi
lea    0xe9b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
test   $0x1,%sil
lea    0xed2(%rip),%rax
lea    0xebb(%rip),%rdi
cmove  %rax,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [16 x i8] c"%d is odd!!!!!\0A\00"
@.str.2 = [19 x i8] c"%d is even!!#@@#@\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %6)
%8 = load i32, i32* %6
%9 = srem i32 %8, 2
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i32, i32* %6
%13 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 %12)
br label %17
14: ; preds = %2
%15 = load i32, i32* %6
%16 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.2, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %14, %11
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [16 x i8] c"%d is odd!!!!!\0A\00"
@.str.2 = [19 x i8] c"%d is even!!#@@#@\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %3
%7 = and i32 %6, 1
%8 = icmp eq i32 %7, 0
%9 = select i1 %8, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0)
%10 = call i32 @printf(i8* %9, i32 %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int a;
  scanf("%d", &a);
  a += a *= a -= a *= 3;
  printf("a = %d\n", a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
imul   $0x3,-0x8(%rbp),%ecx
mov    %ecx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
imul   -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
movl   $0x0,0x4(%rsp)
lea    0xec2(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [8 x i8] c"a = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = mul nsw i32 %4, 3
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = sub nsw i32 %6, %5
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = mul nsw i32 %8, %7
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = add nsw i32 %10, %9
store i32 %11, i32* %2
%12 = load i32, i32* %2
%13 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [8 x i8] c"a = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
store i32 0, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret i32 0
}
void CachedWireContinuation_evict(void *context,
                                  struct CachedWireContinuation *cwc) {}


x86 assembly (clang, -O0):
<CachedWireContinuation_evict>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CachedWireContinuation_evict>:
ret

LLVM IR (-O0):
%struct.CachedWireContinuation = type opaque
define void @CachedWireContinuation_evict(i8* %0, %struct.CachedWireContinuation* %1) {
%3 = alloca i8*
%4 = alloca %struct.CachedWireContinuation*
store i8* %0, i8** %3
store %struct.CachedWireContinuation* %1, %struct.CachedWireContinuation** %4
ret void
}

LLVM IR (-O2):
%struct.CachedWireContinuation = type opaque
define void @CachedWireContinuation_evict(i8* nocapture %0, %struct.CachedWireContinuation* nocapture %1) {
ret void
}
int canBaseCover(int base, int target) {
  return 0 <= (target - base) && (target - base) < 4096;
}


x86 assembly (clang, -O0):
<canBaseCover>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edx
sub    -0x4(%rbp),%edx
xor    %eax,%eax
xor    %ecx,%ecx
cmp    %edx,%ecx
mov    %al,-0x9(%rbp)
jg     1130 <canBaseCover+0x30>
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
cmp    $0x1000,%eax
setl   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<canBaseCover>:
sub    %edi,%esi
xor    %eax,%eax
cmp    $0x1000,%esi
setb   %al
ret

LLVM IR (-O0):
define i32 @canBaseCover(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = sub nsw i32 %5, %6
%8 = icmp sle i32 0, %7
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = sub nsw i32 %10, %11
%13 = icmp slt i32 %12, 4096
br label %14
14: ; preds = %9, %2
%15 = phi i1 [ false, %2 ], [ %13, %9 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @canBaseCover(i32 %0, i32 %1) {
%3 = sub nsw i32 %1, %0
%4 = icmp ult i32 %3, 4096
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ binary_search(int);
int benchmark() {
  binary_search(8);
  return 0;
}


x86 assembly (clang, -O0):
<benchmark>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%edi
call   1030 <binary_search@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<benchmark>:
push   %rax
mov    $0x8,%edi
call   1030 <binary_search@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @benchmark() {
%1 = call i32 @binary_search(i32 8)
ret i32 0
}

LLVM IR (-O2):
define i32 @benchmark() {
%1 = tail call i32 @binary_search(i32 8)
ret i32 0
}
/* Variables and functions */
scalar_t__ strlen(char *);
char *strndup(char *, scalar_t__);
char *strip_string(char *str) { return strndup(str + 2, strlen(str) - 4); }


x86 assembly (clang, -O0):
<strip_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rdi
mov    %rax,%rsi
sub    $0x4,%rsi
call   1040 <strndup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strip_string>:
push   %rbx
lea    0x2(%rdi),%rbx
call   1030 <strlen@plt>
lea    -0x4(%rax),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <strndup@plt>

LLVM IR (-O0):
define i8* @strip_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 2
%5 = load i8*, i8** %2
%6 = call i64 @strlen(i8* %5)
%7 = sub nsw i64 %6, 4
%8 = call i8* @strndup(i8* %4, i64 %7)
ret i8* %8
}

LLVM IR (-O2):
define noalias i8* @strip_string(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 2
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = add nsw i64 %3, -4
%5 = tail call i8* @strndup(i8* %2, i64 %4)
ret i8* %5
}
int test_imm_FBuint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0xFB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FBuint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0xfb,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FBuint64_highword_reg>:
movabs $0xfb00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FBuint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 251
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FBuint64_highword_reg(i64 %0) {
%2 = and i64 %0, 1078036791296
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void smpte_fec_set_extension(uint8_t *p_fec) { p_fec[4] |= 0x80; }


x86 assembly (clang, -O0):
<smpte_fec_set_extension>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%ecx
or     $0x80,%ecx
mov    %ecx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<smpte_fec_set_extension>:
orb    $0x80,0x10(%rdi)
ret

LLVM IR (-O0):
define void @smpte_fec_set_extension(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 4
%5 = load i32, i32* %4
%6 = or i32 %5, 128
store i32 %6, i32* %4
ret void
}

LLVM IR (-O2):
define void @smpte_fec_set_extension(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = load i32, i32* %2
%4 = or i32 %3, 128
store i32 %4, i32* %2
ret void
}
void INI_Bool_TYPE() {}


x86 assembly (clang, -O0):
<INI_Bool_TYPE>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INI_Bool_TYPE>:
ret

LLVM IR (-O0):
define void @INI_Bool_TYPE() {
ret void
}

LLVM IR (-O2):
define void @INI_Bool_TYPE() {
ret void
}
xb2() {}


x86 assembly (clang, -O0):
<xb2>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xb2>:
ret

LLVM IR (-O0):
define i32 @xb2() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @xb2() {
ret i32 undef
}