xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;
struct pcg_state_64 {
  int dummy;
};

/* Variables and functions */
int pcg_oneseq_64_xsl_rr_32_random_r(struct pcg_state_64 *);
uint32_t pcg_oneseq_64_xsl_rr_32_boundedrand_r(struct pcg_state_64 *rng,
                                               uint32_t bound) {
  uint32_t threshold = -bound % bound;
  for (;;) {
    uint32_t r = pcg_oneseq_64_xsl_rr_32_random_r(rng);
    if (r >= threshold)
      return r % bound;
  }
}


x86 assembly (clang, -O0):
<pcg_oneseq_64_xsl_rr_32_boundedrand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
sub    -0xc(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pcg_oneseq_64_xsl_rr_32_random_r@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1152 <pcg_oneseq_64_xsl_rr_32_boundedrand_r+0x42>
mov    -0x14(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
add    $0x20,%rsp
pop    %rbp
ret
jmp    112b <pcg_oneseq_64_xsl_rr_32_boundedrand_r+0x1b>

x86 assembly (clang, -O2):
<pcg_oneseq_64_xsl_rr_32_boundedrand_r>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <pcg_oneseq_64_xsl_rr_32_random_r@plt>
test   %eax,%eax
js     1120 <pcg_oneseq_64_xsl_rr_32_boundedrand_r+0x10>
cltd
idiv   %ebp
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.pcg_state_64 = type { i32 }
define i32 @pcg_oneseq_64_xsl_rr_32_boundedrand_r(%struct.pcg_state_64* %0, i32 %1) {
%3 = alloca %struct.pcg_state_64*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store %struct.pcg_state_64* %0, %struct.pcg_state_64** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 0, %7
%9 = load i32, i32* %4
%10 = srem i32 %8, %9
store i32 %10, i32* %5
br label %11
11: ; preds = %21, %2
%12 = load %struct.pcg_state_64*, %struct.pcg_state_64** %3
%13 = call i32 @pcg_oneseq_64_xsl_rr_32_random_r(%struct.pcg_state_64* %12)
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = load i32, i32* %5
%16 = icmp sge i32 %14, %15
br i1 %16, label %17, label %21
17: ; preds = %11
%18 = load i32, i32* %6
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
ret i32 %20
21: ; preds = %11
br label %11
}

LLVM IR (-O2):
%struct.pcg_state_64 = type { i32 }
define i32 @pcg_oneseq_64_xsl_rr_32_boundedrand_r(%struct.pcg_state_64* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @pcg_oneseq_64_xsl_rr_32_random_r(%struct.pcg_state_64* %0)
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %3
6: ; preds = %3
%7 = srem i32 %4, %1
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0x13() {
  Assert_real((ispunct(19) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              100, ("ispunct should be 0 for 0x13"));
}


x86 assembly (clang, -O0):
<t_ispunct_0x13>:
push   %rbp
mov    %rsp,%rbp
mov    $0x13,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x64,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0x13>:
push   %rax
mov    $0x13,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x64,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0x13\00"
define void @t_ispunct_0x13() {
%1 = call i64 @ispunct(i32 19)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 100, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0x13\00"
define void @t_ispunct_0x13() {
%1 = tail call i64 @ispunct(i32 19)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 100, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int attr_load_names(name)
char *name;
{ return 0; }


x86 assembly (clang, -O0):
<attr_load_names>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<attr_load_names>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @attr_load_names(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @attr_load_names(i8* nocapture readnone %0) {
ret i32 0
}
int MyAtoI(unsigned char param) {
  if (param >= 'a' && param <= 'f') {
    return (param - 'a' + 10);
  } else {
    return (param - '0');
  }
}


x86 assembly (clang, -O0):
<MyAtoI>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movzbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1136 <MyAtoI+0x36>
movzbl -0x5(%rbp),%eax
cmp    $0x66,%eax
jg     1136 <MyAtoI+0x36>
movzbl -0x5(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1140 <MyAtoI+0x40>
movzbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MyAtoI>:
lea    -0x61(%rdi),%ecx
lea    -0x30(%rdi),%edx
lea    -0x57(%rdi),%eax
cmp    $0x6,%cl
cmovae %edx,%eax
ret

LLVM IR (-O0):
define i32 @MyAtoI(i8 zeroext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp sle i32 %9, 102
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = sub nsw i32 %13, 97
%15 = add nsw i32 %14, 10
store i32 %15, i32* %2
br label %20
16: ; preds = %7, %1
%17 = load i8, i8* %3
%18 = zext i8 %17 to i32
%19 = sub nsw i32 %18, 48
store i32 %19, i32* %2
br label %20
20: ; preds = %16, %11
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @MyAtoI(i8 zeroext %0) {
%2 = zext i8 %0 to i32
%3 = add i8 %0, -97
%4 = icmp ult i8 %3, 6
%5 = select i1 %4, i32 -87, i32 -48
%6 = add nsw i32 %5, %2
ret i32 %6
}
/* Variables and functions */
int getopt_internal(int, char **, char const *, int /*<<< orphan*/ *,
                    int /*<<< orphan*/ *, int /*<<< orphan*/);
int MSIM_OPT_Getopt(int nargc, char **nargv, const char *options) {
  return (getopt_internal(nargc, nargv, options, NULL, NULL, 0));
}


x86 assembly (clang, -O0):
<MSIM_OPT_Getopt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
mov    %r8,%rcx
call   1030 <getopt_internal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MSIM_OPT_Getopt>:
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <getopt_internal@plt>

LLVM IR (-O0):
define i32 @MSIM_OPT_Getopt(i32 %0, i8** %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load i8*, i8** %6
%10 = call i32 @getopt_internal(i32 %7, i8** %8, i8* %9, i32* null, i32* null, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @MSIM_OPT_Getopt(i32 %0, i8** %1, i8* %2) {
%4 = tail call i32 @getopt_internal(i32 %0, i8** %1, i8* %2, i32* null, i32* null, i32 0)
ret i32 %4
}
void gtk_toggle_button_set_active() {}


x86 assembly (clang, -O0):
<gtk_toggle_button_set_active>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_toggle_button_set_active>:
ret

LLVM IR (-O0):
define void @gtk_toggle_button_set_active() {
ret void
}

LLVM IR (-O2):
define void @gtk_toggle_button_set_active() {
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ sscanf(char *, char *, char *);
int strcmp(char *, char *);
int strlen(char *);
int starts_with(char *str, char *word) {
  int len;
  char *first_word;
  len = strlen(str);
  first_word = (char *)malloc((len + 1) * sizeof(char));
  sscanf(str, "%s", first_word);
  return strcmp(word, first_word);
}


x86 assembly (clang, -O0):
<starts_with>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rdx
lea    0xe7e(%rip),%rsi
call   1060 <sscanf@plt>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1040 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<starts_with>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1030 <strlen@plt>
lea    0x1(%rax),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
lea    0xe9e(%rip),%rsi
mov    %r15,%rdi
mov    %rax,%rdx
call   1060 <sscanf@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <strcmp@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @starts_with(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 1
%11 = sext i32 %10 to i64
%12 = mul i64 %11, 1
%13 = trunc i64 %12 to i32
%14 = call i64 @malloc(i32 %13)
%15 = inttoptr i64 %14 to i8*
store i8* %15, i8** %6
%16 = load i8*, i8** %3
%17 = load i8*, i8** %6
%18 = call i32 @sscanf(i8* %16, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %17)
%19 = load i8*, i8** %4
%20 = load i8*, i8** %6
%21 = call i32 @strcmp(i8* %19, i8* %20)
ret i32 %21
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @starts_with(i8* %0, i8* nocapture %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = add nsw i32 %3, 1
%5 = tail call i64 @malloc(i32 %4)
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 @sscanf(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = tail call i32 @strcmp(i8* dereferenceable(1) %1, i8* dereferenceable(1) %6)
ret i32 %8
}
int test01_inv(int a, int b) { return (a < b) ? 0x80000000 : 0x7FFFFFFF; }


x86 assembly (clang, -O0):
<test01_inv>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%esi
mov    $0x7fffffff,%eax
mov    $0x80000000,%ecx
cmp    %esi,%edx
cmovl  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test01_inv>:
xor    %eax,%eax
cmp    %esi,%edi
setl   %al
add    $0x7fffffff,%eax
ret

LLVM IR (-O0):
define i32 @test01_inv(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -2147483648, i32 2147483647
ret i32 %9
}

LLVM IR (-O2):
define i32 @test01_inv(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 -2147483648, i32 2147483647
ret i32 %4
}
void led_util_close_file(int *fd_ptr) {
  if (fd_ptr && *fd_ptr != -1) {
    close(*fd_ptr), *fd_ptr = -1;
  }
}


x86 assembly (clang, -O0):
<led_util_close_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114b <led_util_close_file+0x3b>
mov    -0x8(%rbp),%rax
cmpl   $0xffffffff,(%rax)
je     114b <led_util_close_file+0x3b>
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    $0x0,%al
call   1030 <close@plt>
mov    -0x8(%rbp),%rax
movl   $0xffffffff,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<led_util_close_file>:
push   %rbx
test   %rdi,%rdi
je     112d <led_util_close_file+0x1d>
mov    %rdi,%rbx
mov    (%rdi),%edi
cmp    $0xffffffff,%edi
je     112d <led_util_close_file+0x1d>
xor    %eax,%eax
call   1030 <close@plt>
movl   $0xffffffff,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @led_util_close_file(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %14
5: ; preds = %1
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
%8 = icmp ne i32 %7, -1
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = load i32*, i32** %2
%11 = load i32, i32* %10
%12 = call i32 (i32, ...) bitcast (i32 (...)* @close to i32 (i32, ...)*)(i32 %11)
%13 = load i32*, i32** %2
store i32 -1, i32* %13
br label %14
14: ; preds = %9, %5, %1
ret void
}

LLVM IR (-O2):
define void @led_util_close_file(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = load i32, i32* %0
%5 = icmp eq i32 %4, -1
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 (i32, ...) bitcast (i32 (...)* @close to i32 (i32, ...)*)(i32 %4)
store i32 -1, i32* %0
br label %8
8: ; preds = %6, %3, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uLongf;
typedef int /*<<< orphan*/ uLong;
typedef int /*<<< orphan*/ Bytef;

/* Variables and functions */
int /*<<< orphan*/ Z_DEFAULT_COMPRESSION;
int compress2(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
              int /*<<< orphan*/ const *, int /*<<< orphan*/,
              int /*<<< orphan*/);
int compress(Bytef *dest, uLongf *destLen, const Bytef *source,
             uLong sourceLen) {
  return compress2(dest, destLen, source, sourceLen, Z_DEFAULT_COMPRESSION);
}


x86 assembly (clang, -O0):
<compress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    0x2ea3(%rip),%rax
mov    (%rax),%r8d
call   1030 <compress2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compress>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%r8d
jmp    1030 <compress2@plt>

LLVM IR (-O0):
@Z_DEFAULT_COMPRESSION = global i32 0
define i32 @compress(i32* %0, i32* %1, i32* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32*, i32** %7
%12 = load i32, i32* %8
%13 = load i32, i32* @Z_DEFAULT_COMPRESSION
%14 = call i32 @compress2(i32* %9, i32* %10, i32* %11, i32 %12, i32 %13)
ret i32 %14
}

LLVM IR (-O2):
@Z_DEFAULT_COMPRESSION = global i32 0
define i32 @compress(i32* %0, i32* %1, i32* %2, i32 %3) {
%5 = load i32, i32* @Z_DEFAULT_COMPRESSION
%6 = tail call i32 @compress2(i32* %0, i32* %1, i32* %2, i32 %3, i32 %5)
ret i32 %6
}
int mc_base64_enclen(int len) { return (((len + 3) / 3) * 4) + 1; }


x86 assembly (clang, -O0):
<mc_base64_enclen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x3,%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
shl    $0x2,%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mc_base64_enclen>:
add    $0x3,%edi
movslq %edi,%rax
imul   $0x55555556,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
lea    0x1(,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @mc_base64_enclen(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 3
%5 = sdiv i32 %4, 3
%6 = mul nsw i32 %5, 4
%7 = add nsw i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @mc_base64_enclen(i32 %0) {
%2 = add nsw i32 %0, 3
%3 = sdiv i32 %2, 3
%4 = shl nsw i32 %3, 2
%5 = or i32 %4, 1
ret i32 %5
}
void snd_config_unlock(void) {}


x86 assembly (clang, -O0):
<snd_config_unlock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_config_unlock>:
ret

LLVM IR (-O0):
define void @snd_config_unlock() {
ret void
}

LLVM IR (-O2):
define void @snd_config_unlock() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HibernateWriteComplete();
void HibernateRTCDisable(void) {
  (*((volatile unsigned long *)(0x400FC010))) &= ~0x00000001;
  HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateRTCDisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fc010,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffffe,%rcx
mov    $0x400fc010,%eax
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <HibernateWriteComplete@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateRTCDisable>:
andq   $0xfffffffffffffffe,0x400fc010
40 fe
xor    %eax,%eax
jmp    1030 <HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateRTCDisable() {
%1 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%2 = and i64 %1, -2
store volatile i64 %2, i64* inttoptr (i64 1074774032 to i64*)
%3 = call i32 (...) @HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateRTCDisable() {
%1 = load volatile i64, i64* inttoptr (i64 1074774032 to i64*)
%2 = and i64 %1, -2
store volatile i64 %2, i64* inttoptr (i64 1074774032 to i64*)
%3 = tail call i32 (...) @HibernateWriteComplete()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ outb(int, int);
void uart_init(void) {
  outb(0x0, 0x3f8 + 0x01);
  outb(0x01, 0x3f8 + 0x02);
  outb(0x80 | 0x3, 0x3f8 + 0x03);
  outb((115200 / 115200) & 0xFF, 0x3f8 + 0x00);
  outb(((115200 / 115200) >> 8) & 0xFF, 0x3f8 + 0x01);
  outb(0x3, 0x3f8 + 0x03);
}


x86 assembly (clang, -O0):
<uart_init>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x3f9,%esi
call   1030 <outb@plt>
mov    $0x1,%edi
mov    $0x3fa,%esi
call   1030 <outb@plt>
mov    $0x83,%edi
mov    $0x3fb,%esi
call   1030 <outb@plt>
mov    $0x1,%edi
mov    $0x3f8,%esi
call   1030 <outb@plt>
xor    %edi,%edi
mov    $0x3f9,%esi
call   1030 <outb@plt>
mov    $0x3,%edi
mov    $0x3fb,%esi
call   1030 <outb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_init>:
push   %rax
xor    %edi,%edi
mov    $0x3f9,%esi
call   1030 <outb@plt>
mov    $0x1,%edi
mov    $0x3fa,%esi
call   1030 <outb@plt>
mov    $0x83,%edi
mov    $0x3fb,%esi
call   1030 <outb@plt>
mov    $0x1,%edi
mov    $0x3f8,%esi
call   1030 <outb@plt>
xor    %edi,%edi
mov    $0x3f9,%esi
call   1030 <outb@plt>
mov    $0x3,%edi
mov    $0x3fb,%esi
pop    %rax
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @uart_init() {
%1 = call i32 @outb(i32 0, i32 1017)
%2 = call i32 @outb(i32 1, i32 1018)
%3 = call i32 @outb(i32 131, i32 1019)
%4 = call i32 @outb(i32 1, i32 1016)
%5 = call i32 @outb(i32 0, i32 1017)
%6 = call i32 @outb(i32 3, i32 1019)
ret void
}

LLVM IR (-O2):
define void @uart_init() {
%1 = tail call i32 @outb(i32 0, i32 1017)
%2 = tail call i32 @outb(i32 1, i32 1018)
%3 = tail call i32 @outb(i32 131, i32 1019)
%4 = tail call i32 @outb(i32 1, i32 1016)
%5 = tail call i32 @outb(i32 0, i32 1017)
%6 = tail call i32 @outb(i32 3, i32 1019)
ret void
}
int test_imm_25int64_highword_reg(long long val) {
  return ((val >> 32) & (0x25 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_25int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x25,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_25int64_highword_reg>:
movabs $0x2500000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_25int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 37
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_25int64_highword_reg(i64 %0) {
%2 = and i64 %0, 158913789952
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ NEG();
int /*<<< orphan*/ T_WAIT_UNTIL(int);
void op_ED_0x5c(void) {
  NEG();
  T_WAIT_UNTIL(4);
  return;
}


x86 assembly (clang, -O0):
<op_ED_0x5c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <NEG@plt>
mov    $0x4,%edi
call   1030 <T_WAIT_UNTIL@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_ED_0x5c>:
push   %rax
xor    %eax,%eax
call   1040 <NEG@plt>
mov    $0x4,%edi
pop    %rax
jmp    1030 <T_WAIT_UNTIL@plt>

LLVM IR (-O0):
define void @op_ED_0x5c() {
%1 = call i32 (...) @NEG()
%2 = call i32 @T_WAIT_UNTIL(i32 4)
ret void
}

LLVM IR (-O2):
define void @op_ED_0x5c() {
%1 = tail call i32 (...) @NEG()
%2 = tail call i32 @T_WAIT_UNTIL(i32 4)
ret void
}
void test(long double x) {}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
ret

LLVM IR (-O0):
define void @test(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
ret void
}

LLVM IR (-O2):
define void @test(x86_fp80 %0) {
ret void
}
void zero_char_array(char *arr, int length) {
  int i;
  for (i = 0; i < length; i++)
    arr[i] = 0;
  return;
}


x86 assembly (clang, -O0):
<zero_char_array>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1138 <zero_char_array+0x38>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1112 <zero_char_array+0x12>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero_char_array>:
test   %esi,%esi
jle    1122 <zero_char_array+0x12>
push   %rax
mov    %esi,%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @zero_char_array(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
store i8 0, i8* %14
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @zero_char_array(i8* nocapture writeonly %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %2
ret void
}
/* Type definitions */
struct buffer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ buffer_insert_string(struct buffer *, char *, int);
void buffer_insert_char(struct buffer *buf, const char c) {
  char str[] = {c};
  buffer_insert_string(buf, str, 1);
}


x86 assembly (clang, -O0):
<buffer_insert_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xa(%rbp),%rsi
mov    $0x1,%edx
call   1030 <buffer_insert_string@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buffer_insert_char>:
push   %rax
mov    %sil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <buffer_insert_string@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.buffer = type { i32 }
define void @buffer_insert_char(%struct.buffer* %0, i8 signext %1) {
%3 = alloca %struct.buffer*
%4 = alloca i8
%5 = alloca [1 x i8]
store %struct.buffer* %0, %struct.buffer** %3
store i8 %1, i8* %4
%6 = getelementptr inbounds [1 x i8], [1 x i8]* %5, i64 0, i64 0
%7 = load i8, i8* %4
store i8 %7, i8* %6
%8 = load %struct.buffer*, %struct.buffer** %3
%9 = getelementptr inbounds [1 x i8], [1 x i8]* %5, i64 0, i64 0
%10 = call i32 @buffer_insert_string(%struct.buffer* %8, i8* %9, i32 1)
ret void
}

LLVM IR (-O2):
%struct.buffer = type { i32 }
define void @buffer_insert_char(%struct.buffer* %0, i8 signext %1) {
%3 = alloca [1 x i8]
%4 = getelementptr inbounds [1 x i8], [1 x i8]* %3, i64 0, i64 0
store i8 %1, i8* %4
%5 = call i32 @buffer_insert_string(%struct.buffer* %0, i8* %4, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dd(int);
int /*<<< orphan*/ free(double *);
scalar_t__ malloc(int);
int /*<<< orphan*/ printf(char *);
int main() {
  dd(10);
  double *s = (double *)malloc(1 * sizeof(double));
  if (s) {
    printf("freed\n");
    free(s);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
call   1060 <dd@plt>
mov    $0x8,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1187 <main+0x47>
lea    0xe87(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xa,%edi
call   1060 <dd@plt>
mov    $0x8,%edi
call   1050 <malloc@plt>
test   %rax,%rax
je     1171 <main+0x31>
mov    %rax,%rbx
lea    0xe9c(%rip),%rdi
call   1040 <puts@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"freed\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double*
store i32 0, i32* %1
%3 = call i32 @dd(i32 10)
%4 = call i64 @malloc(i32 8)
%5 = inttoptr i64 %4 to double*
store double* %5, double** %2
%6 = load double*, double** %2
%7 = icmp ne double* %6, null
br i1 %7, label %8, label %12
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%10 = load double*, double** %2
%11 = call i32 @free(double* %10)
br label %12
12: ; preds = %8, %0
ret i32 0
}

LLVM IR (-O2):
@str = [6 x i8] c"freed\00"
define i32 @main() {
%1 = tail call i32 @dd(i32 10)
%2 = tail call i64 @malloc(i32 8)
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %0
%5 = inttoptr i64 %2 to double*
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
%7 = tail call i32 @free(double* %5)
br label %8
8: ; preds = %4, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ uart0SendChar(unsigned char);
void uart0SendCh(unsigned char charToSend) {
  if (charToSend == '\n')
    uart0SendChar('\r');
  uart0SendChar(charToSend);
}


x86 assembly (clang, -O0):
<uart0SendCh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0xa,%eax
jne    1135 <uart0SendCh+0x25>
mov    $0xd,%edi
call   1030 <uart0SendChar@plt>
movzbl -0x1(%rbp),%edi
call   1030 <uart0SendChar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart0SendCh>:
push   %rbx
mov    %edi,%ebx
cmp    $0xa,%bl
jne    1122 <uart0SendCh+0x12>
mov    $0xd,%edi
call   1030 <uart0SendChar@plt>
movzbl %bl,%edi
pop    %rbx
jmp    1030 <uart0SendChar@plt>

LLVM IR (-O0):
define void @uart0SendCh(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp eq i32 %4, 10
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @uart0SendChar(i8 zeroext 13)
br label %8
8: ; preds = %6, %1
%9 = load i8, i8* %2
%10 = call i32 @uart0SendChar(i8 zeroext %9)
ret void
}

LLVM IR (-O2):
define void @uart0SendCh(i8 zeroext %0) {
%2 = icmp eq i8 %0, 10
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @uart0SendChar(i8 zeroext 13)
br label %5
5: ; preds = %3, %1
%6 = tail call i32 @uart0SendChar(i8 zeroext %0)
ret void
}
void get_endian_(int *z) {
  int i = 1;
  char *p = (char *)&i;
  if (p[0] == 1)
    *z = 0;
  else
    *z = 1;
}


x86 assembly (clang, -O0):
<get_endian_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x1,%eax
jne    1136 <get_endian_+0x36>
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
jmp    1140 <get_endian_+0x40>
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_endian_>:
movl   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @get_endian_(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i8*
store i32* %0, i32** %2
store i32 1, i32* %3
%5 = bitcast i32* %3 to i8*
store i8* %5, i8** %4
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %13
11: ; preds = %1
%12 = load i32*, i32** %2
store i32 0, i32* %12
br label %15
13: ; preds = %1
%14 = load i32*, i32** %2
store i32 1, i32* %14
br label %15
15: ; preds = %13, %11
ret void
}

LLVM IR (-O2):
define void @get_endian_(i32* nocapture writeonly %0) {
store i32 0, i32* %0
ret void
}
int test_171_10(int *mem) {
  int expected = 1;
  int desired = 5;
  return __atomic_compare_exchange(mem + 4, &expected, &desired, 0, 4, 0);
}


x86 assembly (clang, -O0):
<test_171_10>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x5,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%edx
lock cmpxchg %edx,0x10(%rcx)
mov    %eax,%ecx
sete   %al
mov    %al,-0x19(%rbp)
mov    %ecx,-0x18(%rbp)
test   $0x1,%al
jne    113e <test_171_10+0x3e>
mov    -0x18(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_171_10>:
mov    $0x5,%edx
xor    %ecx,%ecx
mov    $0x1,%eax
lock cmpxchg %edx,0x10(%rdi)
sete   %cl
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_171_10(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
store i32* %0, i32** %2
store i32 1, i32* %3
store i32 5, i32* %4
%6 = load i32*, i32** %2
%7 = getelementptr inbounds i32, i32* %6, i64 4
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = cmpxchg i32* %7, i32 %8, i32 %9 acq_rel monotonic
%11 = extractvalue { i32, i1 } %10, 0
%12 = extractvalue { i32, i1 } %10, 1
br i1 %12, label %14, label %13
13: ; preds = %1
store i32 %11, i32* %3
br label %14
14: ; preds = %13, %1
%15 = zext i1 %12 to i8
store i8 %15, i8* %5
%16 = load i8, i8* %5
%17 = trunc i8 %16 to i1
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @test_171_10(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = cmpxchg i32* %2, i32 1, i32 5 acq_rel monotonic
%4 = extractvalue { i32, i1 } %3, 1
%5 = zext i1 %4 to i32
ret i32 %5
}
int roundDownToPow2(int num) {
  num = num | (num >> 1);
  num = num | (num >> 2);
  num = num | (num >> 4);
  num = num | (num >> 8);
  num = num | (num >> 16);
  return num - (num >> 1);
}


x86 assembly (clang, -O0):
<roundDownToPow2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x2,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x4,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<roundDownToPow2>:
mov    %edi,%eax
sar    %eax
or     %edi,%eax
mov    %eax,%ecx
sar    $0x2,%ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x4,%eax
or     %ecx,%eax
mov    %eax,%ecx
sar    $0x8,%ecx
or     %eax,%ecx
mov    %ecx,%eax
sar    $0x10,%eax
or     %ecx,%eax
mov    %eax,%ecx
sar    %ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @roundDownToPow2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = ashr i32 %4, 1
%6 = or i32 %3, %5
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = ashr i32 %8, 2
%10 = or i32 %7, %9
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = load i32, i32* %2
%13 = ashr i32 %12, 4
%14 = or i32 %11, %13
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = load i32, i32* %2
%17 = ashr i32 %16, 8
%18 = or i32 %15, %17
store i32 %18, i32* %2
%19 = load i32, i32* %2
%20 = load i32, i32* %2
%21 = ashr i32 %20, 16
%22 = or i32 %19, %21
store i32 %22, i32* %2
%23 = load i32, i32* %2
%24 = load i32, i32* %2
%25 = ashr i32 %24, 1
%26 = sub nsw i32 %23, %25
ret i32 %26
}

LLVM IR (-O2):
define i32 @roundDownToPow2(i32 %0) {
%2 = ashr i32 %0, 1
%3 = or i32 %2, %0
%4 = ashr i32 %3, 2
%5 = or i32 %4, %3
%6 = ashr i32 %5, 4
%7 = or i32 %6, %5
%8 = ashr i32 %7, 8
%9 = or i32 %8, %7
%10 = ashr i32 %9, 16
%11 = or i32 %10, %9
%12 = ashr i32 %11, 1
%13 = sub nsw i32 %11, %12
ret i32 %13
}
void foo533() {}


x86 assembly (clang, -O0):
<foo533>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo533>:
ret

LLVM IR (-O0):
define void @foo533() {
ret void
}

LLVM IR (-O2):
define void @foo533() {
ret void
}
void ff_hevc_put_hevc_qpel_hv24_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_hv24_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_hv24_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_hv24_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_hv24_10_sse4() {
ret void
}
int is_gnd_pin(int pin) { return (pin == 7 || pin == 11); }


x86 assembly (clang, -O0):
<is_gnd_pin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x7,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1120 <is_gnd_pin+0x20>
cmpl   $0xb,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_gnd_pin>:
add    $0xfffffff9,%edi
xor    %eax,%eax
test   $0xfffffffb,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_gnd_pin(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 7
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 11
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @is_gnd_pin(i32 %0) {
%2 = icmp eq i32 %0, 7
%3 = icmp eq i32 %0, 11
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
char *RCSid() {
  return RCSid("$Id: matrix.c,v 1.10 2004/07/01 17:10:06 broeker Exp $");
}


x86 assembly (clang, -O0):
<RCSid>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <RCSid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RCSid>:
jmp    1100 <RCSid>

LLVM IR (-O0):
@.str = [55 x i8] c"$Id: matrix.c,v 1.10 2004/07/01 17:10:06 broeker Exp $\00"
define i8* @RCSid() {
%1 = call i8* (i8*, ...) bitcast (i8* ()* @RCSid to i8* (i8*, ...)*)(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
define noalias i8* @RCSid() {
br label %1
1: ; preds = %1, %0
br label %1
}
void REMR3NotifyHandlerPhysicalModify(void) {}


x86 assembly (clang, -O0):
<REMR3NotifyHandlerPhysicalModify>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<REMR3NotifyHandlerPhysicalModify>:
ret

LLVM IR (-O0):
define void @REMR3NotifyHandlerPhysicalModify() {
ret void
}

LLVM IR (-O2):
define void @REMR3NotifyHandlerPhysicalModify() {
ret void
}
long mach_port_allocate(void *priv, unsigned long args) {}


x86 assembly (clang, -O0):
<mach_port_allocate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mach_port_allocate>:
ret

LLVM IR (-O0):
define i64 @mach_port_allocate(i8* %0, i64 %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @mach_port_allocate(i8* nocapture readnone %0, i64 %1) {
ret i64 undef
}
/* Variables and functions */
int vedisCoreInitialize();
int vedis_lib_init(void) {
  int rc;
  rc = vedisCoreInitialize();
  return rc;
}


x86 assembly (clang, -O0):
<vedis_lib_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <vedisCoreInitialize@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vedis_lib_init>:
xor    %eax,%eax
jmp    1030 <vedisCoreInitialize@plt>

LLVM IR (-O0):
define i32 @vedis_lib_init() {
%1 = alloca i32
%2 = call i32 (...) @vedisCoreInitialize()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @vedis_lib_init() {
%1 = tail call i32 (...) @vedisCoreInitialize()
ret i32 %1
}
double test_1(double x) { return -x; }


x86 assembly (clang, -O0):
<test_1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_1>:
xorps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define double @test_1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fneg double %3
ret double %4
}

LLVM IR (-O2):
define double @test_1(double %0) {
%2 = fneg double %0
ret double %2
}
int fun361() { return 361; }


x86 assembly (clang, -O0):
<fun361>:
push   %rbp
mov    %rsp,%rbp
mov    $0x169,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun361>:
mov    $0x169,%eax
ret

LLVM IR (-O0):
define i32 @fun361() {
ret i32 361
}

LLVM IR (-O2):
define i32 @fun361() {
ret i32 361
}
int main() {
  __int128_t a = 0;
  __uint128_t b = 0;
  b = b + a;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
movq   $0x0,-0x30(%rbp)
mov    -0x30(%rbp),%rcx
mov    -0x28(%rbp),%rax
mov    -0x20(%rbp),%rsi
mov    -0x18(%rbp),%rdx
add    %rsi,%rcx
adc    %rdx,%rax
mov    %rcx,-0x30(%rbp)
mov    %rax,-0x28(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i128
%3 = alloca i128
store i32 0, i32* %1
store i128 0, i128* %2
store i128 0, i128* %3
%4 = load i128, i128* %3
%5 = load i128, i128* %2
%6 = add i128 %4, %5
store i128 %6, i128* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ action_chooser();
int main() { action_chooser(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <action_chooser@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <action_chooser@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @action_chooser()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @action_chooser()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sysapi_sync_unmap_file(void *);
void sysapi_close_maped_file(void *__sfmap) { sysapi_sync_unmap_file(__sfmap); }


x86 assembly (clang, -O0):
<sysapi_close_maped_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sysapi_sync_unmap_file@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysapi_close_maped_file>:
jmp    1030 <sysapi_sync_unmap_file@plt>

LLVM IR (-O0):
define void @sysapi_close_maped_file(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @sysapi_sync_unmap_file(i8* %3)
ret void
}

LLVM IR (-O2):
define void @sysapi_close_maped_file(i8* %0) {
%2 = tail call i32 @sysapi_sync_unmap_file(i8* %0)
ret void
}
float g2Dash(float x) { return 2.0 / x; }


x86 assembly (clang, -O0):
<g2Dash>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xee6(%rip),%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2Dash>:
movss  0xef8(%rip),%xmm1
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @g2Dash(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fdiv double 2.000000e+00, %4
%6 = fptrunc double %5 to float
ret float %6
}

LLVM IR (-O2):
define float @g2Dash(float %0) {
%2 = fdiv float 2.000000e+00, %0
ret float %2
}
void clear_bit(int nr, volatile unsigned long *addr) {
  addr += nr / 32;
  *addr &= ~(1 << (nr % 32));
}


x86 assembly (clang, -O0):
<clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
movslq %ecx,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %edx,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
movslq %eax,%rdx
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
and    %rdx,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_bit>:
mov    %edi,%ecx
lea    0x1f(%rcx),%eax
test   %edi,%edi
cmovns %edi,%eax
sar    $0x5,%eax
cltq
mov    $0xfffffffe,%edx
rol    %cl,%edx
movslq %edx,%rcx
and    %rcx,(%rsi,%rax,8)
ret

LLVM IR (-O0):
define void @clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i32, i32* %3
%6 = sdiv i32 %5, 32
%7 = load i64*, i64** %4
%8 = sext i32 %6 to i64
%9 = getelementptr inbounds i64, i64* %7, i64 %8
store i64* %9, i64** %4
%10 = load i32, i32* %3
%11 = srem i32 %10, 32
%12 = shl i32 1, %11
%13 = xor i32 %12, -1
%14 = sext i32 %13 to i64
%15 = load i64*, i64** %4
%16 = load volatile i64, i64* %15
%17 = and i64 %16, %14
store volatile i64 %17, i64* %15
ret void
}

LLVM IR (-O2):
define void @clear_bit(i32 %0, i64* %1) {
%3 = sdiv i32 %0, 32
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i64, i64* %1, i64 %4
%6 = and i32 %0, 31
%7 = shl nuw i32 1, %6
%8 = xor i32 %7, -1
%9 = sext i32 %8 to i64
%10 = load volatile i64, i64* %5
%11 = and i64 %10, %9
store volatile i64 %11, i64* %5
ret void
}
/* Variables and functions */
int compare_pairs(char **, int);
char **create_suffixes(char *);
int /*<<< orphan*/ free(char **);
int /*<<< orphan*/ string_quick_sort(char **, int);
int strlen(char *);
int distinct_substrings(char *string) {
  int res;
  int len = strlen(string);
  char **suffixes = create_suffixes(string);
  string_quick_sort(suffixes, len);
  res = compare_pairs(suffixes, len);
  free(suffixes);
  return res;
}


x86 assembly (clang, -O0):
<distinct_substrings>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1070 <create_suffixes@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1050 <string_quick_sort@plt>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1060 <compare_pairs@plt>
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<distinct_substrings>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1070 <create_suffixes@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %ebp,%esi
call   1050 <string_quick_sort@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
call   1060 <compare_pairs@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @distinct_substrings(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %4
%8 = load i8*, i8** %2
%9 = call i8** @create_suffixes(i8* %8)
store i8** %9, i8*** %5
%10 = load i8**, i8*** %5
%11 = load i32, i32* %4
%12 = call i32 @string_quick_sort(i8** %10, i32 %11)
%13 = load i8**, i8*** %5
%14 = load i32, i32* %4
%15 = call i32 @compare_pairs(i8** %13, i32 %14)
store i32 %15, i32* %3
%16 = load i8**, i8*** %5
%17 = call i32 @free(i8** %16)
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @distinct_substrings(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i8** @create_suffixes(i8* %0)
%4 = tail call i32 @string_quick_sort(i8** %3, i32 %2)
%5 = tail call i32 @compare_pairs(i8** %3, i32 %2)
%6 = tail call i32 @free(i8** %3)
ret i32 %5
}
void RTAvlGCPhysDestroy(void) {}


x86 assembly (clang, -O0):
<RTAvlGCPhysDestroy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlGCPhysDestroy>:
ret

LLVM IR (-O0):
define void @RTAvlGCPhysDestroy() {
ret void
}

LLVM IR (-O2):
define void @RTAvlGCPhysDestroy() {
ret void
}
/* Type definitions */
struct t_gui_buffer {
  int dummy;
};

/* Variables and functions */
int irc_input_data(struct t_gui_buffer *, char const *, int,
                   int /*<<< orphan*/);
int irc_input_data_cb(const void *pointer, void *data,
                      struct t_gui_buffer *buffer, const char *input_data) {
  (void)pointer;
  (void)data;
  return irc_input_data(buffer, input_data, 1, 0);
}


x86 assembly (clang, -O0):
<irc_input_data_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    $0x1,%edx
xor    %ecx,%ecx
call   1030 <irc_input_data@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_input_data_cb>:
mov    %rdx,%rdi
mov    %rcx,%rsi
mov    $0x1,%edx
xor    %ecx,%ecx
jmp    1030 <irc_input_data@plt>

LLVM IR (-O0):
%struct.t_gui_buffer = type { i32 }
define i32 @irc_input_data_cb(i8* %0, i8* %1, %struct.t_gui_buffer* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca %struct.t_gui_buffer*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store %struct.t_gui_buffer* %2, %struct.t_gui_buffer** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load %struct.t_gui_buffer*, %struct.t_gui_buffer** %7
%12 = load i8*, i8** %8
%13 = call i32 @irc_input_data(%struct.t_gui_buffer* %11, i8* %12, i32 1, i32 0)
ret i32 %13
}

LLVM IR (-O2):
%struct.t_gui_buffer = type { i32 }
define i32 @irc_input_data_cb(i8* nocapture readnone %0, i8* nocapture readnone %1, %struct.t_gui_buffer* %2, i8* %3) {
%5 = tail call i32 @irc_input_data(%struct.t_gui_buffer* %2, i8* %3, i32 1, i32 0)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
void *calloc(size_t, size_t);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void *zcalloc(size_t num, size_t size) {
  void *ptr;
  ptr = calloc(num, size);
  if (!ptr)
    exit(EXIT_FAILURE);
  return ptr;
}


x86 assembly (clang, -O0):
<zcalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    115a <zcalloc+0x3a>
mov    0x2e8d(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zcalloc>:
push   %rax
call   1030 <calloc@plt>
test   %rax,%rax
je     112d <zcalloc+0xd>
pop    %rcx
ret
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define i8* @zcalloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %14, label %11
11: ; preds = %2
%12 = load i32, i32* @EXIT_FAILURE
%13 = call i32 @exit(i32 %12)
unreachable
14: ; preds = %2
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define noalias i8* @zcalloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
8: ; preds = %2
ret i8* %3
}