xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ COND_PL();
int /*<<< orphan*/ EA_AY_AI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_spl_8_ai(void) {
  m68ki_write_8(EA_AY_AI_8(), COND_PL() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_spl_8_ai>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <EA_AY_AI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1040 <COND_PL@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_spl_8_ai>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1030 <EA_AY_AI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <COND_PL@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_spl_8_ai() {
%1 = call i32 (...) @EA_AY_AI_8()
%2 = call i64 (...) @COND_PL()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_spl_8_ai() {
%1 = tail call i32 (...) @EA_AY_AI_8()
%2 = tail call i64 (...) @COND_PL()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Variables and functions */
int sabrina();
int bar(void) { return sabrina() + 68; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sabrina@plt>
add    $0x44,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rax
xor    %eax,%eax
call   1030 <sabrina@plt>
add    $0x44,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bar() {
%1 = call i32 (...) @sabrina()
%2 = add nsw i32 %1, 68
ret i32 %2
}

LLVM IR (-O2):
define i32 @bar() {
%1 = tail call i32 (...) @sabrina()
%2 = add nsw i32 %1, 68
ret i32 %2
}
/* Variables and functions */
char **high_load() { return NULL; }


x86 assembly (clang, -O0):
<high_load>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<high_load>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8** @high_load() {
ret i8** null
}

LLVM IR (-O2):
define noalias i8** @high_load() {
ret i8** null
}
/* Variables and functions */
int /*<<< orphan*/ NoneIntDelay(int);
void delay() { NoneIntDelay(100); }


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
mov    $0x64,%edi
call   1030 <NoneIntDelay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
mov    $0x64,%edi
jmp    1030 <NoneIntDelay@plt>

LLVM IR (-O0):
define void @delay() {
%1 = call i32 @NoneIntDelay(i32 100)
ret void
}

LLVM IR (-O2):
define void @delay() {
%1 = tail call i32 @NoneIntDelay(i32 100)
ret void
}
int no_setup(flag)
int flag;
{ return 0; }


x86 assembly (clang, -O0):
<no_setup>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_setup>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @no_setup(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @no_setup(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ createLog();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main() {
  int i = 0;
  while (i++ < 100) {
    createLog();
  }
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x64,%eax
jge    1156 <main+0x36>
mov    $0x0,%al
call   1040 <createLog@plt>
jmp    1136 <main+0x16>
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x64,%ebx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <createLog@plt>
add    $0xffffffff,%ebx
jne    1130 <main+0x10>
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %7, %0
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
store i32 %5, i32* %2
%6 = icmp slt i32 %4, 100
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 (...) @createLog()
br label %3
9: ; preds = %3
%10 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %3, %1 ]
%3 = add nuw nsw i32 %2, 1
%4 = tail call i32 (...) @createLog()
%5 = icmp eq i32 %3, 100
br i1 %5, label %6, label %1
6: ; preds = %1
%7 = tail call i32 @exit(i32 0)
unreachable
}
int fn13(char (*x)[2]) { return sizeof x; }


x86 assembly (clang, -O0):
<fn13>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn13>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @fn13([2 x i8]* %0) {
%2 = alloca [2 x i8]*
store [2 x i8]* %0, [2 x i8]** %2
ret i32 8
}

LLVM IR (-O2):
define i32 @fn13([2 x i8]* nocapture readnone %0) {
ret i32 8
}
void ff_hevc_put_hevc_bi_epel_v64_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_epel_v64_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_epel_v64_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_epel_v64_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_epel_v64_12_sse4() {
ret void
}
/* Variables and functions */
double bino_d(int, int);
double binomial_d(int a, int b) {
  if (b > a / 2)
    return bino_d(a, a - b);
  if (b < 0)
    return 0;
  return bino_d(a, b);
}


x86 assembly (clang, -O0):
<binomial_d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cmp    %ecx,%eax
jle    1154 <binomial_d+0x44>
mov    -0xc(%rbp),%edi
mov    -0xc(%rbp),%esi
sub    -0x10(%rbp),%esi
call   1030 <bino_d@plt>
movsd  %xmm0,-0x8(%rbp)
jmp    117b <binomial_d+0x6b>
cmpl   $0x0,-0x10(%rbp)
jge    116b <binomial_d+0x5b>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    117b <binomial_d+0x6b>
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <bino_d@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<binomial_d>:
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
sar    %eax
cmp    %esi,%eax
jge    1125 <binomial_d+0x15>
mov    %edi,%eax
sub    %esi,%eax
mov    %eax,%esi
jmp    1129 <binomial_d+0x19>
test   %esi,%esi
js     112e <binomial_d+0x1e>
jmp    1030 <bino_d@plt>
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @binomial_d(i32 %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = load i32, i32* %4
%8 = sdiv i32 %7, 2
%9 = icmp sgt i32 %6, %8
br i1 %9, label %10, label %16
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = sub nsw i32 %12, %13
%15 = call double @bino_d(i32 %11, i32 %14)
store double %15, double* %3
br label %24
16: ; preds = %2
%17 = load i32, i32* %5
%18 = icmp slt i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %16
store double 0.000000e+00, double* %3
br label %24
20: ; preds = %16
%21 = load i32, i32* %4
%22 = load i32, i32* %5
%23 = call double @bino_d(i32 %21, i32 %22)
store double %23, double* %3
br label %24
24: ; preds = %20, %19, %10
%25 = load double, double* %3
ret double %25
}

LLVM IR (-O2):
define double @binomial_d(i32 %0, i32 %1) {
%3 = sdiv i32 %0, 2
%4 = icmp slt i32 %3, %1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = sub nsw i32 %0, %1
br label %9
7: ; preds = %2
%8 = icmp slt i32 %1, 0
br i1 %8, label %12, label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %1, %7 ]
%11 = tail call double @bino_d(i32 %0, i32 %10)
br label %12
12: ; preds = %9, %7
%13 = phi double [ 0.000000e+00, %7 ], [ %11, %9 ]
ret double %13
}
void f4(void) {
  if (0)
#pragma omp cancellation EKAHI
    ;
#pragma omp cancellation HO OKAHI
  if (0)
#pragma omp cancellation point
    ;
#pragma omp cancellation point
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
ret

LLVM IR (-O0):
define void @f4() {
ret void
}

LLVM IR (-O2):
define void @f4() {
ret void
}
int execute_io_submit() { return 0; }


x86 assembly (clang, -O0):
<execute_io_submit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_io_submit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_io_submit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_io_submit() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint;

/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int /*<<< orphan*/ const, char *, char *);
void format_level(char *str, const uint str_sz, const char *type) {
  snprintf(str, str_sz, "%s", type ?: "");
}


x86 assembly (clang, -O0):
<format_level>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmp    $0x0,%rax
je     1150 <format_level+0x40>
mov    -0x20(%rbp),%rax
mov    %rax,-0x38(%rbp)
jmp    1160 <format_level+0x50>
lea    0xeab(%rip),%rax
mov    %rax,-0x38(%rbp)
jmp    1160 <format_level+0x50>
mov    -0x24(%rbp),%esi
mov    -0x30(%rbp),%rdi
mov    -0x38(%rbp),%rcx
lea    0xe8e(%rip),%rdx
call   1030 <snprintf@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<format_level>:
test   %rdx,%rdx
lea    0xee8(%rip),%rcx
cmovne %rdx,%rcx
lea    0xedb(%rip),%rdx
jmp    1030 <snprintf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [1 x i8] zeroinitializer
define void @format_level(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %12
11: ; preds = %3
br label %13
12: ; preds = %3
br label %13
13: ; preds = %12, %11
%14 = phi i8* [ %9, %11 ], [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), %12 ]
%15 = call i32 @snprintf(i8* %7, i32 %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %14)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [1 x i8] zeroinitializer
define void @format_level(i8* %0, i32 %1, i8* %2) {
%4 = icmp eq i8* %2, null
%5 = select i1 %4, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i8* %2
%6 = tail call i32 @snprintf(i8* %0, i32 %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %5)
ret void
}
/* Variables and functions */
int pthread_join(unsigned long, void **);
signed int rt_thread_join(unsigned long int thr, void **stat) {
  signed int status = 0;
  status = pthread_join(thr, stat);
  return status;
}


x86 assembly (clang, -O0):
<rt_thread_join>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <pthread_join@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rt_thread_join>:
jmp    1030 <pthread_join@plt>

LLVM IR (-O0):
define i32 @rt_thread_join(i64 %0, i8** %1) {
%3 = alloca i64
%4 = alloca i8**
%5 = alloca i32
store i64 %0, i64* %3
store i8** %1, i8*** %4
store i32 0, i32* %5
%6 = load i64, i64* %3
%7 = load i8**, i8*** %4
%8 = call i32 @pthread_join(i64 %6, i8** %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @rt_thread_join(i64 %0, i8** %1) {
%3 = tail call i32 @pthread_join(i64 %0, i8** %1)
ret i32 %3
}
/* Variables and functions */
scalar_t__ read(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ write(int, char *, int);
void ft_print_stdin(void) {
  char buf;
  while (read(0, &buf, 1) != 0)
    write(1, &buf, 1);
}


x86 assembly (clang, -O0):
<ft_print_stdin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
lea    -0x1(%rbp),%rsi
mov    $0x1,%edx
call   1040 <read@plt>
cmp    $0x0,%rax
je     1157 <ft_print_stdin+0x37>
mov    $0x1,%edx
lea    -0x1(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
jmp    1128 <ft_print_stdin+0x8>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_print_stdin>:
push   %rbx
sub    $0x10,%rsp
lea    0xf(%rsp),%rsi
xor    %edi,%edi
mov    $0x1,%edx
call   1040 <read@plt>
test   %rax,%rax
je     1166 <ft_print_stdin+0x46>
lea    0xf(%rsp),%rbx
mov    $0x1,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1030 <write@plt>
xor    %edi,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
call   1040 <read@plt>
test   %rax,%rax
jne    1140 <ft_print_stdin+0x20>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @ft_print_stdin() {
%1 = alloca i8
br label %2
2: ; preds = %5, %0
%3 = call i64 @read(i32 0, i8* %1, i32 1)
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = call i32 @write(i32 1, i8* %1, i32 1)
br label %2
7: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @ft_print_stdin() {
%1 = alloca i8
%2 = call i64 @read(i32 0, i8* %1, i32 1)
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %0, %4
%5 = call i32 @write(i32 1, i8* %1, i32 1)
%6 = call i64 @read(i32 0, i8* %1, i32 1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %4
8: ; preds = %4, %0
ret void
}
/* Variables and functions */
char *hex_to_unsigned(char const *, unsigned long *);
char *hex_to_uint(const char *str, unsigned int *out) {
  unsigned long v;
  char *cur = hex_to_unsigned(str, &v);
  if (cur != str) {
    *out = (unsigned int)v;
  }
  return cur;
}


x86 assembly (clang, -O0):
<hex_to_uint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <hex_to_unsigned@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x8(%rbp),%rax
je     114b <hex_to_uint+0x3b>
mov    -0x18(%rbp),%rax
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex_to_uint>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsp,%rsi
call   1030 <hex_to_unsigned@plt>
cmp    %rbx,%rax
je     112d <hex_to_uint+0x1d>
mov    (%rsp),%ecx
mov    %ecx,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @hex_to_uint(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %3
store i32* %1, i32** %4
%7 = load i8*, i8** %3
%8 = call i8* @hex_to_unsigned(i8* %7, i64* %5)
store i8* %8, i8** %6
%9 = load i8*, i8** %6
%10 = load i8*, i8** %3
%11 = icmp ne i8* %9, %10
br i1 %11, label %12, label %16
12: ; preds = %2
%13 = load i64, i64* %5
%14 = trunc i64 %13 to i32
%15 = load i32*, i32** %4
store i32 %14, i32* %15
br label %16
16: ; preds = %12, %2
%17 = load i8*, i8** %6
ret i8* %17
}

LLVM IR (-O2):
define i8* @hex_to_uint(i8* %0, i32* nocapture writeonly %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = call i8* @hex_to_unsigned(i8* %0, i64* %3)
%6 = icmp eq i8* %5, %0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i64, i64* %3
%9 = trunc i64 %8 to i32
store i32 %9, i32* %1
br label %10
10: ; preds = %7, %2
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ ObjWrite8(unsigned char);
void ObjWriteVar(unsigned long V) {
  do {
    unsigned char C = (V & 0x7F);
    V >>= 7;
    if (V) {
      C |= 0x80;
    }
    ObjWrite8(C);
  } while (V != 0);
}


x86 assembly (clang, -O0):
<ObjWriteVar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x7f,%rax
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x7,%rax
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114a <ObjWriteVar+0x3a>
movzbl -0x9(%rbp),%eax
or     $0x80,%eax
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%edi
call   1030 <ObjWrite8@plt>
cmpq   $0x0,-0x8(%rbp)
jne    111c <ObjWriteVar+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ObjWriteVar>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    %rdi,%rbx
nopw   0x0(%rax,%rax,1)
mov    %r14d,%eax
and    $0x7f,%al
shr    $0x7,%rbx
cmp    $0x7f,%r14
seta   %cl
shl    $0x7,%cl
or     %al,%cl
movzbl %cl,%edi
call   1030 <ObjWrite8@plt>
cmp    $0x7f,%r14
mov    %rbx,%r14
ja     1120 <ObjWriteVar+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @ObjWriteVar(i64 %0) {
%2 = alloca i64
%3 = alloca i8
store i64 %0, i64* %2
br label %4
4: ; preds = %20, %1
%5 = load i64, i64* %2
%6 = and i64 %5, 127
%7 = trunc i64 %6 to i8
store i8 %7, i8* %3
%8 = load i64, i64* %2
%9 = lshr i64 %8, 7
store i64 %9, i64* %2
%10 = load i64, i64* %2
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %4
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %14, 128
%16 = trunc i32 %15 to i8
store i8 %16, i8* %3
br label %17
17: ; preds = %12, %4
%18 = load i8, i8* %3
%19 = call i32 @ObjWrite8(i8 zeroext %18)
br label %20
20: ; preds = %17
%21 = load i64, i64* %2
%22 = icmp ne i64 %21, 0
br i1 %22, label %4, label %23
23: ; preds = %20
ret void
}

LLVM IR (-O2):
define void @ObjWriteVar(i64 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %0, %1 ], [ %6, %2 ]
%4 = trunc i64 %3 to i8
%5 = and i8 %4, 127
%6 = lshr i64 %3, 7
%7 = icmp ult i64 %3, 128
%8 = select i1 %7, i8 0, i8 -128
%9 = or i8 %5, %8
%10 = tail call i32 @ObjWrite8(i8 zeroext %9)
br i1 %7, label %11, label %2
11: ; preds = %2
ret void
}
long nelin1(int a) { return -(a != 1); }


x86 assembly (clang, -O0):
<nelin1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%ecx
xor    %eax,%eax
sub    %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<nelin1>:
xor    %eax,%eax
cmp    $0x1,%edi
setne  %al
neg    %rax
ret

LLVM IR (-O0):
define i64 @nelin1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 1
%5 = zext i1 %4 to i32
%6 = sub nsw i32 0, %5
%7 = sext i32 %6 to i64
ret i64 %7
}

LLVM IR (-O2):
define i64 @nelin1(i32 %0) {
%2 = icmp ne i32 %0, 1
%3 = sext i1 %2 to i64
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ getline(char **, size_t *, int /*<<< orphan*/);
int /*<<< orphan*/ psh_replace_history(char *, size_t *);
int /*<<< orphan*/ stdin;
char *psh_read_line(void) {
  char *line = NULL;
  size_t size = 0;
  getline(&line, &size, stdin);
  psh_replace_history(line, &size);
  return line;
}


x86 assembly (clang, -O0):
<psh_read_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    0x2ea9(%rip),%rax
mov    (%rax),%edx
lea    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <getline@plt>
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <psh_replace_history@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psh_read_line>:
push   %rbx
sub    $0x10,%rsp
movq   $0x0,(%rsp)
movq   $0x0,0x8(%rsp)
mov    0x2eab(%rip),%rax
mov    (%rax),%edx
mov    %rsp,%rdi
lea    0x8(%rsp),%rbx
mov    %rbx,%rsi
call   1040 <getline@plt>
mov    (%rsp),%rdi
mov    %rbx,%rsi
call   1030 <psh_replace_history@plt>
mov    (%rsp),%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@stdin = global i32 0
define i8* @psh_read_line() {
%1 = alloca i8*
%2 = alloca i64
store i8* null, i8** %1
store i64 0, i64* %2
%3 = load i32, i32* @stdin
%4 = call i32 @getline(i8** %1, i64* %2, i32 %3)
%5 = load i8*, i8** %1
%6 = call i32 @psh_replace_history(i8* %5, i64* %2)
%7 = load i8*, i8** %1
ret i8* %7
}

LLVM IR (-O2):
@stdin = global i32 0
define i8* @psh_read_line() {
%1 = alloca i8*
%2 = alloca i64
%3 = bitcast i8** %1 to i8*
store i8* null, i8** %1
%4 = bitcast i64* %2 to i8*
store i64 0, i64* %2
%5 = load i32, i32* @stdin
%6 = call i32 @getline(i8** %1, i64* %2, i32 %5)
%7 = load i8*, i8** %1
%8 = call i32 @psh_replace_history(i8* %7, i64* %2)
%9 = load i8*, i8** %1
ret i8* %9
}
int test_imm_E8uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xE8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E8uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xe8,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E8uint64_midword_reg>:
test   $0xe80000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E8uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 232
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E8uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 15204352
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void bcm_host_deinit(void) {}


x86 assembly (clang, -O0):
<bcm_host_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcm_host_deinit>:
ret

LLVM IR (-O0):
define void @bcm_host_deinit() {
ret void
}

LLVM IR (-O2):
define void @bcm_host_deinit() {
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long window;
};
struct TYPE_4__ {
  TYPE_1__ xcirculate;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xcirculate_window(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xcirculate.window = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xcirculate_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xcirculate_window>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xcirculate_window(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xcirculate_window(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
int get_node_status(struct NETWORK *NTW, int node,
                    struct SPARAMETERS *SM_Parameters) {
  int jj;
  int node_status = 666;
  return node_status;
}


x86 assembly (clang, -O0):
<get_node_status>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x29a,-0x20(%rbp)
mov    -0x20(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_node_status>:
mov    $0x29a,%eax
ret

LLVM IR (-O0):
%struct.NETWORK = type opaque
%struct.SPARAMETERS = type opaque
define i32 @get_node_status(%struct.NETWORK* %0, i32 %1, %struct.SPARAMETERS* %2) {
%4 = alloca %struct.NETWORK*
%5 = alloca i32
%6 = alloca %struct.SPARAMETERS*
%7 = alloca i32
%8 = alloca i32
store %struct.NETWORK* %0, %struct.NETWORK** %4
store i32 %1, i32* %5
store %struct.SPARAMETERS* %2, %struct.SPARAMETERS** %6
store i32 666, i32* %8
%9 = load i32, i32* %8
ret i32 %9
}

LLVM IR (-O2):
%struct.NETWORK = type opaque
%struct.SPARAMETERS = type opaque
define i32 @get_node_status(%struct.NETWORK* nocapture readnone %0, i32 %1, %struct.SPARAMETERS* nocapture readnone %2) {
ret i32 666
}
void av_sha_update() {}


x86 assembly (clang, -O0):
<av_sha_update>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_sha_update>:
ret

LLVM IR (-O0):
define void @av_sha_update() {
ret void
}

LLVM IR (-O2):
define void @av_sha_update() {
ret void
}
/* Type definitions */
typedef char wchar_t;

/* Variables and functions */
void set_char(wchar_t *s, wchar_t c) {
  s[0] = c;
  s[1] = '\0';
}


x86 assembly (clang, -O0):
<set_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
movb   $0x0,0x1(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_char>:
mov    %sil,(%rdi)
movb   $0x0,0x1(%rdi)
ret

LLVM IR (-O0):
define void @set_char(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 0
store i8 %5, i8* %7
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8 0, i8* %9
ret void
}

LLVM IR (-O2):
define void @set_char(i8* nocapture writeonly %0, i8 signext %1) {
store i8 %1, i8* %0
%3 = getelementptr inbounds i8, i8* %0, i64 1
store i8 0, i8* %3
ret void
}
void _ieee802frame154_swapbyte(char *b1, char *b2) {
  char tmp = *b1;
  *b1 = *b2;
  *b2 = tmp;
}


x86 assembly (clang, -O0):
<_ieee802frame154_swapbyte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ieee802frame154_swapbyte>:
mov    (%rdi),%al
mov    (%rsi),%cl
mov    %cl,(%rdi)
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define void @_ieee802frame154_swapbyte(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
store i8 %7, i8* %5
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = load i8*, i8** %3
store i8 %9, i8* %10
%11 = load i8, i8* %5
%12 = load i8*, i8** %4
store i8 %11, i8* %12
ret void
}

LLVM IR (-O2):
define void @_ieee802frame154_swapbyte(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
store i8 %4, i8* %0
store i8 %3, i8* %1
ret void
}
/* Variables and functions */
size_t ft_strlen(const char *str) {
  size_t i;
  i = 0;
  while (str[i] != '\0')
    ++i;
  return (i);
}


x86 assembly (clang, -O0):
<ft_strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1136 <ft_strlen+0x36>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <ft_strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <ft_strlen+0x10>
ret

LLVM IR (-O0):
define i64 @ft_strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* %5, i64 %6
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i64, i64* %3
%13 = add i64 %12, 1
store i64 %13, i64* %3
br label %4
14: ; preds = %4
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @ft_strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i64 %3
}
/* Type definitions */
struct _mgmt_updateuser_rsp {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ osapi_free(struct _mgmt_updateuser_rsp *);
void mgmt_updateuser_rsp_free(struct _mgmt_updateuser_rsp *ptr) {
  osapi_free(ptr);
}


x86 assembly (clang, -O0):
<mgmt_updateuser_rsp_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <osapi_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mgmt_updateuser_rsp_free>:
jmp    1030 <osapi_free@plt>

LLVM IR (-O0):
%struct._mgmt_updateuser_rsp = type { i32 }
define void @mgmt_updateuser_rsp_free(%struct._mgmt_updateuser_rsp* %0) {
%2 = alloca %struct._mgmt_updateuser_rsp*
store %struct._mgmt_updateuser_rsp* %0, %struct._mgmt_updateuser_rsp** %2
%3 = load %struct._mgmt_updateuser_rsp*, %struct._mgmt_updateuser_rsp** %2
%4 = call i32 @osapi_free(%struct._mgmt_updateuser_rsp* %3)
ret void
}

LLVM IR (-O2):
%struct._mgmt_updateuser_rsp = type { i32 }
define void @mgmt_updateuser_rsp_free(%struct._mgmt_updateuser_rsp* %0) {
%2 = tail call i32 @osapi_free(%struct._mgmt_updateuser_rsp* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ reverse(char *, int, int);
void rotate3(char *str, int n, int i) {
  reverse(str, 0, i);
  reverse(str, i, n);
  reverse(str, 0, n);
}


x86 assembly (clang, -O0):
<rotate3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%edx
xor    %esi,%esi
call   1030 <reverse@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <reverse@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <reverse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotate3>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %esi,%r14d
mov    %rdi,%rbp
xor    %esi,%esi
call   1030 <reverse@plt>
mov    %rbp,%rdi
mov    %ebx,%esi
mov    %r14d,%edx
call   1030 <reverse@plt>
mov    %rbp,%rdi
xor    %esi,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <reverse@plt>

LLVM IR (-O0):
define void @rotate3(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %6
%9 = call i32 @reverse(i8* %7, i32 0, i32 %8)
%10 = load i8*, i8** %4
%11 = load i32, i32* %6
%12 = load i32, i32* %5
%13 = call i32 @reverse(i8* %10, i32 %11, i32 %12)
%14 = load i8*, i8** %4
%15 = load i32, i32* %5
%16 = call i32 @reverse(i8* %14, i32 0, i32 %15)
ret void
}

LLVM IR (-O2):
define void @rotate3(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @reverse(i8* %0, i32 0, i32 %2)
%5 = tail call i32 @reverse(i8* %0, i32 %2, i32 %1)
%6 = tail call i32 @reverse(i8* %0, i32 0, i32 %1)
ret void
}
/* Variables and functions */
scalar_t__ M_PI;
double radians(double deg) { return deg * (double)M_PI / 180.0; }


x86 assembly (clang, -O0):
<radians>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    0x2ed3(%rip),%rax
cvtsi2sdq (%rax),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeda(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<radians>:
mov    0x2ee1(%rip),%rax
cvtsi2sdq (%rax),%xmm1
mulsd  %xmm1,%xmm0
divsd  0xee8(%rip),%xmm0
ret

LLVM IR (-O0):
@M_PI = global i64 0
define double @radians(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load i64, i64* @M_PI
%5 = sitofp i64 %4 to double
%6 = fmul double %3, %5
%7 = fdiv double %6, 1.800000e+02
ret double %7
}

LLVM IR (-O2):
@M_PI = global i64 0
define double @radians(double %0) {
%2 = load i64, i64* @M_PI
%3 = sitofp i64 %2 to double
%4 = fmul double %3, %0
%5 = fdiv double %4, 1.800000e+02
ret double %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ writemembl(scalar_t__, int /*<<< orphan*/);
void writememb386l(uint32_t seg, uint32_t addr, uint8_t val) {
  writemembl(addr + seg, val);
}


x86 assembly (clang, -O0):
<writememb386l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
add    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <writemembl@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writememb386l>:
add    %rsi,%rdi
mov    %edx,%esi
jmp    1030 <writemembl@plt>

LLVM IR (-O0):
define void @writememb386l(i64 %0, i64 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i32
store i64 %0, i64* %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = add nsw i64 %7, %8
%10 = load i32, i32* %6
%11 = call i32 @writemembl(i64 %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @writememb386l(i64 %0, i64 %1, i32 %2) {
%4 = add nsw i64 %1, %0
%5 = tail call i32 @writemembl(i64 %4, i32 %2)
ret void
}
int is_nouveau_vieux(int fd) { return 0; }


x86 assembly (clang, -O0):
<is_nouveau_vieux>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_nouveau_vieux>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_nouveau_vieux(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @is_nouveau_vieux(i32 %0) {
ret i32 0
}
int iscntrl(int c) { return c <= 0x1f || c == 0x7f; }


x86 assembly (clang, -O0):
<iscntrl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x1f,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1120 <iscntrl+0x20>
cmpl   $0x7f,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iscntrl>:
cmp    $0x20,%edi
setl   %al
cmp    $0x7f,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @iscntrl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 31
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 127
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @iscntrl(i32 %0) {
%2 = icmp slt i32 %0, 32
%3 = icmp eq i32 %0, 127
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
struct op {
  int dummy;
};

/* Variables and functions */
int optimize_frontend_at(struct op *, struct op *);
int optimize_frontend(struct op *start_op) {
  return optimize_frontend_at(start_op, start_op);
}


x86 assembly (clang, -O0):
<optimize_frontend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <optimize_frontend_at@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<optimize_frontend>:
mov    %rdi,%rsi
jmp    1030 <optimize_frontend_at@plt>

LLVM IR (-O0):
%struct.op = type { i32 }
define i32 @optimize_frontend(%struct.op* %0) {
%2 = alloca %struct.op*
store %struct.op* %0, %struct.op** %2
%3 = load %struct.op*, %struct.op** %2
%4 = load %struct.op*, %struct.op** %2
%5 = call i32 @optimize_frontend_at(%struct.op* %3, %struct.op* %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.op = type { i32 }
define i32 @optimize_frontend(%struct.op* %0) {
%2 = tail call i32 @optimize_frontend_at(%struct.op* %0, %struct.op* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ funct1(int, int);
int main() {
  int a = 10;
  int b = 25;
  funct1(a, b);
  funct1(20, 10);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
movl   $0x19,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <funct1@plt>
mov    $0x14,%edi
mov    $0xa,%esi
call   1030 <funct1@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
mov    $0x19,%esi
call   1030 <funct1@plt>
mov    $0x14,%edi
mov    $0xa,%esi
call   1030 <funct1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
store i32 25, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = call i32 @funct1(i32 %4, i32 %5)
%7 = call i32 @funct1(i32 20, i32 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @funct1(i32 10, i32 25)
%2 = tail call i32 @funct1(i32 20, i32 10)
ret i32 0
}
void mxc_serial_putc(const char c) {
  (*((volatile unsigned int *)(0x53FBC000 + 0x40))) = c;
  while (!((*((volatile unsigned int *)(0x53FBC000 + 0xb4))) & (1 << 6)))
    ;
  if (c == '\n') {
    mxc_serial_putc('\r');
  }
}


x86 assembly (clang, -O0):
<mxc_serial_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x53fbc040,%eax
mov    %ecx,(%rax)
mov    $0x53fbc0b4,%eax
mov    (%rax),%eax
and    $0x40,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1148 <mxc_serial_putc+0x38>
jmp    114d <mxc_serial_putc+0x3d>
jmp    1129 <mxc_serial_putc+0x19>
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
jne    1164 <mxc_serial_putc+0x54>
mov    $0xd,%edi
call   1030 <mxc_serial_putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mxc_serial_putc>:
mov    %edi,0x53fbc040
nopw   0x0(%rax,%rax,1)
testl  $0x40,0x53fbc0b4
je     1110 <mxc_serial_putc+0x10>
cmp    $0xa,%dil
jne    113d <mxc_serial_putc+0x3d>
movl   $0xd,0x53fbc040
xchg   %ax,%ax
testl  $0x40,0x53fbc0b4
je     1130 <mxc_serial_putc+0x30>
ret

LLVM IR (-O0):
define void @mxc_serial_putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
store volatile i32 %4, i32* inttoptr (i64 1409007680 to i32*)
br label %5
5: ; preds = %10, %1
%6 = load volatile i32, i32* inttoptr (i64 1409007796 to i32*)
%7 = and i32 %6, 64
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
br i1 %9, label %10, label %11
10: ; preds = %5
br label %5
11: ; preds = %5
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 10
br i1 %14, label %15, label %16
15: ; preds = %11
br label %16
16: ; preds = %15, %11
ret void
}

LLVM IR (-O2):
define void @mxc_serial_putc(i8 signext %0) {
%2 = sext i8 %0 to i32
store volatile i32 %2, i32* inttoptr (i64 1409007680 to i32*)
br label %3
3: ; preds = %3, %1
%4 = load volatile i32, i32* inttoptr (i64 1409007796 to i32*)
%5 = and i32 %4, 64
%6 = icmp eq i32 %5, 0
br i1 %6, label %3, label %7
7: ; preds = %3
%8 = icmp eq i8 %0, 10
br i1 %8, label %9, label %14
9: ; preds = %7
store volatile i32 13, i32* inttoptr (i64 1409007680 to i32*)
br label %10
10: ; preds = %10, %9
%11 = load volatile i32, i32* inttoptr (i64 1409007796 to i32*)
%12 = and i32 %11, 64
%13 = icmp eq i32 %12, 0
br i1 %13, label %10, label %14
14: ; preds = %10, %7
ret void
}
int hash(char *input) {
  int hash = 0;
  int c;
  while ((c = *input++)) {
    hash += c;
  }
  return (hash % 41);
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x10(%rbp)
cmp    $0x0,%eax
je     113b <hash+0x3b>
mov    -0x10(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <hash+0xf>
mov    -0xc(%rbp),%eax
mov    $0x29,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%al
test   %al,%al
je     1140 <hash+0x40>
add    $0x1,%rdi
xor    %ecx,%ecx
nopl   0x0(%rax)
movsbl %al,%eax
add    %eax,%ecx
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <hash+0x10>
movslq %ecx,%rax
imul   $0x63e7063f,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x24,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,4),%edx
lea    (%rcx,%rdx,8),%ecx
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %5
%12 = load i32, i32* %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, %12
store i32 %14, i32* %3
br label %5
15: ; preds = %5
%16 = load i32, i32* %3
%17 = srem i32 %16, 41
ret i32 %17
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %11, %4 ], [ %2, %1 ]
%6 = phi i8* [ %9, %4 ], [ %0, %1 ]
%7 = phi i32 [ %10, %4 ], [ 0, %1 ]
%8 = sext i8 %5 to i32
%9 = getelementptr inbounds i8, i8* %6, i64 1
%10 = add nsw i32 %7, %8
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4
%14 = srem i32 %10, 41
br label %15
15: ; preds = %13, %1
%16 = phi i32 [ 0, %1 ], [ %14, %13 ]
ret i32 %16
}
/* Variables and functions */
double compute_GPA(char *, int);
int /*<<< orphan*/ printf(char *, double);
int main(void) {
  char a[8] = {
      'A', 'A', 'A', 'B', 'C', 'D', 'E', 'F',
  };
  printf("Average: %.2f.\n", compute_GPA(a, 8));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0xc(%rbp)
lea    -0xc(%rbp),%rdi
mov    $0x8,%esi
call   1040 <compute_GPA@plt>
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movabs $0x4645444342414141,%rax
44 45 46
mov    %rax,(%rsp)
mov    %rsp,%rdi
mov    $0x8,%esi
call   1040 <compute_GPA@plt>
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.a = [8 x i8] c"AAABCDEF"
@.str = [16 x i8] c"Average: %.2f.\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [8 x i8]
store i32 0, i32* %1
%3 = bitcast [8 x i8]* %2 to i8*
%4 = getelementptr inbounds [8 x i8], [8 x i8]* %2, i64 0, i64 0
%5 = call double @compute_GPA(i8* %4, i32 8)
%6 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), double %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"Average: %.2f.\0A\00"
define i32 @main() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
store i64 5063528411713061185, i64* %1
%3 = call double @compute_GPA(i8* %2, i32 8)
%4 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), double %3)
ret i32 0
}
/* Variables and functions */
int mwmAddPatternEx(void *, unsigned char *, int, int /*<<< orphan*/,
                    unsigned int, int /*<<< orphan*/, void *,
                    int /*<<< orphan*/, int /*<<< orphan*/ *);
int mwmAddPattern(void *pv, unsigned char *P, int m, unsigned id) {
  return mwmAddPatternEx(pv, P, m, 0, id, 0, pv, 0, NULL);
}


x86 assembly (clang, -O0):
<mwmAddPattern>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%r8d
mov    -0x8(%rbp),%rax
xor    %r9d,%r9d
xor    %ecx,%ecx
mov    %r9d,%ecx
mov    %rax,(%rsp)
movl   $0x0,0x8(%rsp)
movq   $0x0,0x10(%rsp)
call   1030 <mwmAddPatternEx@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mwmAddPattern>:
push   %rax
mov    %ecx,%r8d
sub    $0x8,%rsp
xor    %ecx,%ecx
xor    %r9d,%r9d
push   $0x0
push   $0x0
push   %rdi
call   1030 <mwmAddPatternEx@plt>
add    $0x20,%rsp
pop    %rcx
ret

LLVM IR (-O0):
define i32 @mwmAddPattern(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = load i8*, i8** %5
%14 = call i32 @mwmAddPatternEx(i8* %9, i8* %10, i32 %11, i32 0, i32 %12, i32 0, i8* %13, i32 0, i32* null)
ret i32 %14
}

LLVM IR (-O2):
define i32 @mwmAddPattern(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @mwmAddPatternEx(i8* %0, i8* %1, i32 %2, i32 0, i32 %3, i32 0, i8* %0, i32 0, i32* null)
ret i32 %5
}
void gtk_entry_set_width_chars() {}


x86 assembly (clang, -O0):
<gtk_entry_set_width_chars>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_entry_set_width_chars>:
ret

LLVM IR (-O0):
define void @gtk_entry_set_width_chars() {
ret void
}

LLVM IR (-O2):
define void @gtk_entry_set_width_chars() {
ret void
}
/* Variables and functions */
void v64_ntoh(void *);
void v64_hton(void *p) { return v64_ntoh(p); }


x86 assembly (clang, -O0):
<v64_hton>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <v64_ntoh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<v64_hton>:
jmp    1030 <v64_ntoh@plt>

LLVM IR (-O0):
define void @v64_hton(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @v64_hton(i8* %0) {
tail call void @v64_ntoh(i8* %0)
ret void
}
int _2power(int i) {
  int res = 1, j;
  for (j = 0; j < i; j++)
    res <<= 1;
  return res;
}


x86 assembly (clang, -O0):
<_2power>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1138 <_2power+0x38>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <_2power+0x15>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_2power>:
test   %edi,%edi
jle    1118 <_2power+0x18>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
cmp    $0x7,%eax
jae    111e <_2power+0x1e>
mov    $0x1,%eax
jmp    1138 <_2power+0x38>
mov    $0x1,%eax
ret
and    $0xfffffff8,%edi
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
shl    $0x8,%eax
add    $0xfffffff8,%edi
jne    1130 <_2power+0x30>
test   %ecx,%ecx
je     1147 <_2power+0x47>
nopl   0x0(%rax)
add    %eax,%eax
add    $0xffffffff,%ecx
jne    1140 <_2power+0x40>
ret

LLVM IR (-O0):
define i32 @_2power(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %12, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i32, i32* %3
%11 = shl i32 %10, 1
store i32 %11, i32* %3
br label %12
12: ; preds = %9
%13 = load i32, i32* %4
%14 = add nsw i32 %13, 1
store i32 %14, i32* %4
br label %5
15: ; preds = %5
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @_2power(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %25
3: ; preds = %1
%4 = add i32 %0, -1
%5 = and i32 %0, 7
%6 = icmp ult i32 %4, 7
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = and i32 %0, -8
br label %9
9: ; preds = %9, %7
%10 = phi i32 [ 1, %7 ], [ %12, %9 ]
%11 = phi i32 [ 0, %7 ], [ %13, %9 ]
%12 = shl i32 %10, 8
%13 = add i32 %11, 8
%14 = icmp eq i32 %13, %8
br i1 %14, label %15, label %9
15: ; preds = %9, %3
%16 = phi i32 [ undef, %3 ], [ %12, %9 ]
%17 = phi i32 [ 1, %3 ], [ %12, %9 ]
%18 = icmp eq i32 %5, 0
br i1 %18, label %25, label %19
19: ; preds = %15, %19
%20 = phi i32 [ %22, %19 ], [ %17, %15 ]
%21 = phi i32 [ %23, %19 ], [ 0, %15 ]
%22 = shl i32 %20, 1
%23 = add i32 %21, 1
%24 = icmp eq i32 %23, %5
br i1 %24, label %25, label %19
25: ; preds = %15, %19, %1
%26 = phi i32 [ 1, %1 ], [ %16, %15 ], [ %22, %19 ]
ret i32 %26
}
int test_imm_21uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x21 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_21uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x21,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_21uint64_midword_reg>:
test   $0x210000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_21uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 33
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_21uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 2162688
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}