xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ __isnan(double);
scalar_t__ islessequal(double, double);
double fmin(double _x, double _y) {
  return ((islessequal(_x, _y) || __isnan(_y)) ? _x : _y);
}


x86 assembly (clang, -O0):
<fmin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1040 <islessequal@plt>
cmp    $0x0,%rax
jne    115f <fmin+0x3f>
movsd  -0x10(%rbp),%xmm0
call   1030 <__isnan@plt>
cmp    $0x0,%rax
je     116e <fmin+0x4e>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1178 <fmin+0x58>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmin>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
movsd  %xmm1,0x8(%rsp)
call   1040 <islessequal@plt>
test   %rax,%rax
je     1145 <fmin+0x25>
movsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret
movsd  0x8(%rsp),%xmm0
call   1030 <__isnan@plt>
test   %rax,%rax
je     1161 <fmin+0x41>
movsd  0x10(%rsp),%xmm0
movsd  %xmm0,0x8(%rsp)
movsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @fmin(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i64 @islessequal(double %5, double %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %2
%10 = load double, double* %4
%11 = call i64 @__isnan(double %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %9, %2
%14 = load double, double* %3
br label %17
15: ; preds = %9
%16 = load double, double* %4
br label %17
17: ; preds = %15, %13
%18 = phi double [ %14, %13 ], [ %16, %15 ]
ret double %18
}

LLVM IR (-O2):
define double @fmin(double %0, double %1) {
%3 = tail call i64 @islessequal(double %0, double %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i64 @__isnan(double %1)
%7 = icmp eq i64 %6, 0
%8 = select i1 %7, double %1, double %0
br label %9
9: ; preds = %5, %2
%10 = phi double [ %0, %2 ], [ %8, %5 ]
ret double %10
}
/* Type definitions */
struct em8051 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
int disasm_inc_dptr(struct em8051 *aCPU, int aPosition, char *aBuffer) {
  sprintf(aBuffer, "INC   DPTR");
  return 1;
}


x86 assembly (clang, -O0):
<disasm_inc_dptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1030 <sprintf@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disasm_inc_dptr>:
movabs $0x5044202020434e49,%rax
20 44 50
mov    %rax,(%rdx)
movl   $0x525450,0x7(%rdx)
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.em8051 = type { i32 }
@.str = [11 x i8] c"INC DPTR\00"
define i32 @disasm_inc_dptr(%struct.em8051* %0, i32 %1, i8* %2) {
%4 = alloca %struct.em8051*
%5 = alloca i32
%6 = alloca i8*
store %struct.em8051* %0, %struct.em8051** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
%struct.em8051 = type { i32 }
@.str = [11 x i8] c"INC DPTR\00"
define i32 @disasm_inc_dptr(%struct.em8051* nocapture readnone %0, i32 %1, i8* nocapture writeonly %2) {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(11) %2, i8* align 1 dereferenceable(11) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i64 11, i1 false)
ret i32 1
}
int f(int x) { return x % 2 ? ++x : 2 + x; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     112c <f+0x2c>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    %eax,-0x8(%rbp)
jmp    1135 <f+0x35>
mov    -0x4(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    %edi,%eax
and    $0x1,%eax
cmp    $0x1,%eax
adc    $0x0,%edi
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %12
9: ; preds = %1
%10 = load i32, i32* %2
%11 = add nsw i32 2, %10
br label %12
12: ; preds = %9, %6
%13 = phi i32 [ %8, %6 ], [ %11, %9 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 2, i32 1
%5 = add nsw i32 %4, %0
ret i32 %5
}
void SPI1_IRQHandler(void) {}


x86 assembly (clang, -O0):
<SPI1_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI1_IRQHandler>:
ret

LLVM IR (-O0):
define void @SPI1_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @SPI1_IRQHandler() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *Persistence_open_common(char, char *, char *, char *);
FILE *Persistence_open_retained(char mode) {
  return Persistence_open_common(mode, "amqtdd.rms", "amqtdd.1ms",
                                 "amqtdd.2ms");
}


x86 assembly (clang, -O0):
<Persistence_open_retained>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xedb(%rip),%rsi
lea    0xedf(%rip),%rdx
lea    0xee3(%rip),%rcx
movsbl -0x1(%rbp),%edi
call   1030 <Persistence_open_common@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Persistence_open_retained>:
lea    0xee9(%rip),%rsi
lea    0xeed(%rip),%rdx
lea    0xef1(%rip),%rcx
jmp    1030 <Persistence_open_common@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"amqtdd.rms\00"
@.str.1 = [11 x i8] c"amqtdd.1ms\00"
@.str.2 = [11 x i8] c"amqtdd.2ms\00"
define i32* @Persistence_open_retained(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32* @Persistence_open_common(i8 signext %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
ret i32* %4
}

LLVM IR (-O2):
@.str = [11 x i8] c"amqtdd.rms\00"
@.str.1 = [11 x i8] c"amqtdd.1ms\00"
@.str.2 = [11 x i8] c"amqtdd.2ms\00"
define i32* @Persistence_open_retained(i8 signext %0) {
%2 = tail call i32* @Persistence_open_common(i8 signext %0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x58() {
  Assert_real((isascii(88)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              445, ("isascii should be 1 for X"));
}


x86 assembly (clang, -O0):
<t_isascii_0x58>:
push   %rbp
mov    %rsp,%rbp
mov    $0x58,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x1bd,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x58>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x1bd,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for X\00"
define void @t_isascii_0x58() {
%1 = call i32 @isascii(i32 88)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 445, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for X\00"
define void @t_isascii_0x58() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 445, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ NRF24_InsRead(int, int /*<<< orphan*/ *, int);
void NRF24_Get_TX_Addr(uint8_t *tx_addr) {
  NRF24_InsRead(0x00 | 0x10, tx_addr, 5);
}


x86 assembly (clang, -O0):
<NRF24_Get_TX_Addr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x10,%edi
mov    $0x5,%edx
call   1030 <NRF24_InsRead@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NRF24_Get_TX_Addr>:
mov    %rdi,%rsi
mov    $0x10,%edi
mov    $0x5,%edx
jmp    1030 <NRF24_InsRead@plt>

LLVM IR (-O0):
define void @NRF24_Get_TX_Addr(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @NRF24_InsRead(i32 16, i32* %3, i32 5)
ret void
}

LLVM IR (-O2):
define void @NRF24_Get_TX_Addr(i32* %0) {
%2 = tail call i32 @NRF24_InsRead(i32 16, i32* %0, i32 5)
ret void
}
/* Type definitions */
struct rte_page {
  int dummy;
};
struct rte_mem_cache {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __ClearPageSlub(struct rte_page *);
int /*<<< orphan*/ rte_free_pages(struct rte_page *);
void free_slab(struct rte_mem_cache *s, struct rte_page *page) {
  __ClearPageSlub(page);
  rte_free_pages(page);
}


x86 assembly (clang, -O0):
<free_slab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <__ClearPageSlub@plt>
mov    -0x10(%rbp),%rdi
call   1040 <rte_free_pages@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_slab>:
push   %rbx
mov    %rsi,%rbx
mov    %rsi,%rdi
call   1030 <__ClearPageSlub@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <rte_free_pages@plt>

LLVM IR (-O0):
%struct.rte_mem_cache = type { i32 }
%struct.rte_page = type { i32 }
define void @free_slab(%struct.rte_mem_cache* %0, %struct.rte_page* %1) {
%3 = alloca %struct.rte_mem_cache*
%4 = alloca %struct.rte_page*
store %struct.rte_mem_cache* %0, %struct.rte_mem_cache** %3
store %struct.rte_page* %1, %struct.rte_page** %4
%5 = load %struct.rte_page*, %struct.rte_page** %4
%6 = call i32 @__ClearPageSlub(%struct.rte_page* %5)
%7 = load %struct.rte_page*, %struct.rte_page** %4
%8 = call i32 @rte_free_pages(%struct.rte_page* %7)
ret void
}

LLVM IR (-O2):
%struct.rte_mem_cache = type { i32 }
%struct.rte_page = type { i32 }
define void @free_slab(%struct.rte_mem_cache* nocapture readnone %0, %struct.rte_page* %1) {
%3 = tail call i32 @__ClearPageSlub(%struct.rte_page* %1)
%4 = tail call i32 @rte_free_pages(%struct.rte_page* %1)
ret void
}
/* Type definitions */
typedef int int_fast32_t;

/* Variables and functions */
bool SHAREMIND_MAP_KEY_COPY_int_fast32_t(int_fast32_t *const dest,
                                         int_fast32_t const src) {
  return (((*dest) = src), true);
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_COPY_int_fast32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_COPY_int_fast32_t>:
mov    %esi,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_COPY_int_fast32_t(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store i32 %5, i32* %6
ret i32 1
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_COPY_int_fast32_t(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
ret i32 1
}
void baz_short(short *x) { *x = __imag foo_short(5); }


x86 assembly (clang, -O0):
<baz_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x5,%edi
mov    $0x0,%al
call   1030 <foo_short@plt>
mov    -0x8(%rbp),%rax
movw   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz_short>:
push   %rbx
mov    %rdi,%rbx
mov    $0x5,%edi
xor    %eax,%eax
call   1030 <foo_short@plt>
movw   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @baz_short(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = call i32 (i32, ...) bitcast (i32 (...)* @foo_short to i32 (i32, ...)*)(i32 5)
%4 = load i16*, i16** %2
store i16 0, i16* %4
ret void
}

LLVM IR (-O2):
define void @baz_short(i16* nocapture writeonly %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @foo_short to i32 (i32, ...)*)(i32 5)
store i16 0, i16* %0
ret void
}
/* Variables and functions */
char *strchr(const char *s, int c) {
  do {
    if (*s == c)
      return (char *)s;
  } while (*s++ != '\0');
  return (char *)NULL;
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
jne    1128 <strchr+0x28>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1150 <strchr+0x50>
jmp    112d <strchr+0x2d>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    110b <strchr+0xb>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movsbl (%rax),%ecx
cmp    %esi,%ecx
je     1121 <strchr+0x21>
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i32, i32* %5
%11 = icmp eq i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %6
%13 = load i8*, i8** %4
store i8* %13, i8** %3
br label %22
14: ; preds = %6
br label %15
15: ; preds = %14
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %4
%18 = load i8, i8* %16
%19 = sext i8 %18 to i32
%20 = icmp ne i32 %19, 0
br i1 %20, label %6, label %21
21: ; preds = %15
store i8* null, i8** %3
br label %22
22: ; preds = %21, %12
%23 = load i8*, i8** %3
ret i8* %23
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i32 %1) {
br label %3
3: ; preds = %8, %2
%4 = phi i8* [ %0, %2 ], [ %9, %8 ]
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, %1
br i1 %7, label %11, label %8
8: ; preds = %3
%9 = getelementptr inbounds i8, i8* %4, i64 1
%10 = icmp eq i8 %5, 0
br i1 %10, label %11, label %3
11: ; preds = %8, %3
%12 = phi i8* [ %4, %3 ], [ null, %8 ]
ret i8* %12
}
double round(double number) {
  return (number >= 0) ? (int)(number + 0.5) : (int)(number - 0.5);
}


x86 assembly (clang, -O0):
<round>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1134 <round+0x34>
movsd  0xedd(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0xc(%rbp)
jmp    114c <round+0x4c>
movsd  -0x8(%rbp),%xmm0
movsd  0xebf(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cvtsi2sd %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<round>:
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
setb   %al
lea    0xeec(%rip),%rcx
addsd  (%rcx,%rax,8),%xmm0
cvttpd2dq %xmm0,%xmm0
cvtdq2pd %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @round(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp oge double %3, 0.000000e+00
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load double, double* %2
%7 = fadd double %6, 5.000000e-01
%8 = fptosi double %7 to i32
br label %13
9: ; preds = %1
%10 = load double, double* %2
%11 = fsub double %10, 5.000000e-01
%12 = fptosi double %11 to i32
br label %13
13: ; preds = %9, %5
%14 = phi i32 [ %8, %5 ], [ %12, %9 ]
%15 = sitofp i32 %14 to double
ret double %15
}

LLVM IR (-O2):
define double @round(double %0) {
%2 = fcmp ult double %0, 0.000000e+00
%3 = select i1 %2, double -5.000000e-01, double 5.000000e-01
%4 = fadd double %3, %0
%5 = fptosi double %4 to i32
%6 = sitofp i32 %5 to double
ret double %6
}
void startupwnd_close(void) {}


x86 assembly (clang, -O0):
<startupwnd_close>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<startupwnd_close>:
ret

LLVM IR (-O0):
define void @startupwnd_close() {
ret void
}

LLVM IR (-O2):
define void @startupwnd_close() {
ret void
}
/* Variables and functions */
float laPression(float);
float conversionMPX(int var_pression) {
  double Rref = 68000.0;
  double V_IN = 3.3;
  float V = (float)var_pression / 256 * V_IN;
  return laPression(V);
}


x86 assembly (clang, -O0):
<conversionMPX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movsd  0xeed(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xed8(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
movss  0xebe(%rip),%xmm1
divss  %xmm1,%xmm0
cvtss2sd %xmm0,%xmm0
mulsd  -0x18(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x1c(%rbp),%xmm0
call   1030 <laPression@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<conversionMPX>:
cvtsi2ss %edi,%xmm0
mulss  0xee4(%rip),%xmm0
cvtss2sd %xmm0,%xmm0
mulsd  0xee0(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
jmp    1030 <laPression@plt>

LLVM IR (-O0):
define float @conversionMPX(i32 %0) {
%2 = alloca i32
%3 = alloca double
%4 = alloca double
%5 = alloca float
store i32 %0, i32* %2
store double 6.800000e+04, double* %3
store double 3.300000e+00, double* %4
%6 = load i32, i32* %2
%7 = sitofp i32 %6 to float
%8 = fdiv float %7, 2.560000e+02
%9 = fpext float %8 to double
%10 = load double, double* %4
%11 = fmul double %9, %10
%12 = fptrunc double %11 to float
store float %12, float* %5
%13 = load float, float* %5
%14 = call float @laPression(float %13)
ret float %14
}

LLVM IR (-O2):
define float @conversionMPX(i32 %0) {
%2 = sitofp i32 %0 to float
%3 = fmul float %2, 3.906250e-03
%4 = fpext float %3 to double
%5 = fmul double %4, 3.300000e+00
%6 = fptrunc double %5 to float
%7 = tail call float @laPression(float %6)
ret float %7
}
/* Variables and functions */
bool nrf51_errata_43(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_43>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_43>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_43() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_43() {
ret i32 0
}
int main() {
  int i = 0;
  for (i = 0; i < 1000; i++) {
    asm volatile("int $0x24");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x3e8,-0x8(%rbp)
jge    1136 <main+0x36>
int    $0x24
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1119 <main+0x19>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x3e8,%eax
cs nopw 0x0(%rax,%rax,1)
nop
int    $0x24
add    $0xffffffff,%eax
jne    1110 <main+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %2
br label %3
3: ; preds = %7, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 1000
br i1 %5, label %6, label %10
6: ; preds = %3
br label %7
7: ; preds = %6
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
br label %3
10: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %3, %1 ]
tail call void asm sideeffect "int $$0x24", "~{dirflag},~{fpsr},~{flags}"()
%3 = add nuw nsw i32 %2, 1
%4 = icmp eq i32 %3, 1000
br i1 %4, label %5, label %1
5: ; preds = %1
ret i32 0
}
int test_imm_BFint16_reg(short val) {
  return ((val) & (0xBF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BFint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xbf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BFint16_reg>:
test   $0xbf,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BFint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 191
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_BFint16_reg(i16 signext %0) {
%2 = and i16 %0, 191
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
double pow(int, int);
unsigned long calc_delay_ns(size_t datasize) {
  unsigned long delay;
  double data_MB, sec;
  unsigned long nsec;
  data_MB = (double)((double)datasize / (double)pow(10, 6));
  sec = (double)((double)data_MB / (double)450);
  delay = sec * pow(10, 9);
  return delay;
}


x86 assembly (clang, -O0):
<calc_delay_ns>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
movaps 0xedd(%rip),%xmm1
movq   -0x8(%rbp),%xmm0
punpckldq %xmm1,%xmm0
movapd 0xedc(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x38(%rbp)
mov    $0xa,%edi
mov    %edi,-0x3c(%rbp)
mov    $0x6,%esi
call   1030 <pow@plt>
mov    -0x3c(%rbp),%edi
movaps %xmm0,%xmm1
movsd  -0x38(%rbp),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xea5(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
mov    $0x9,%esi
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movaps %xmm0,%xmm1
cvttsd2si %xmm1,%rax
mov    %rax,%rdx
sar    $0x3f,%rdx
movsd  0xe6d(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rcx
and    %rdx,%rcx
or     %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_delay_ns>:
sub    $0x18,%rsp
movq   %rdi,%xmm0
punpckldq 0xedf(%rip),%xmm0
subpd  0xee7(%rip),%xmm0
movapd %xmm0,%xmm1
unpckhpd %xmm0,%xmm1
addsd  %xmm0,%xmm1
movapd %xmm1,(%rsp)
mov    $0xa,%edi
mov    $0x6,%esi
call   1030 <pow@plt>
movapd (%rsp),%xmm1
divsd  %xmm0,%xmm1
divsd  0xec6(%rip),%xmm1
movapd %xmm1,(%rsp)
mov    $0xa,%edi
mov    $0x9,%esi
call   1030 <pow@plt>
mulsd  (%rsp),%xmm0
cvttsd2si %xmm0,%rcx
mov    %rcx,%rdx
sar    $0x3f,%rdx
subsd  0xea1(%rip),%xmm0
cvttsd2si %xmm0,%rax
and    %rdx,%rax
or     %rcx,%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i64 @calc_delay_ns(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca double
%5 = alloca double
%6 = alloca i64
store i64 %0, i64* %2
%7 = load i64, i64* %2
%8 = uitofp i64 %7 to double
%9 = call double @pow(i32 10, i32 6)
%10 = fdiv double %8, %9
store double %10, double* %4
%11 = load double, double* %4
%12 = fdiv double %11, 4.500000e+02
store double %12, double* %5
%13 = load double, double* %5
%14 = call double @pow(i32 10, i32 9)
%15 = fmul double %13, %14
%16 = fptoui double %15 to i64
store i64 %16, i64* %3
%17 = load i64, i64* %3
ret i64 %17
}

LLVM IR (-O2):
define i64 @calc_delay_ns(i64 %0) {
%2 = uitofp i64 %0 to double
%3 = tail call double @pow(i32 10, i32 6)
%4 = fdiv double %2, %3
%5 = fdiv double %4, 4.500000e+02
%6 = tail call double @pow(i32 10, i32 9)
%7 = fmul double %6, %5
%8 = fptoui double %7 to i64
ret i64 %8
}
/* Type definitions */
struct calculated_packet_test_function_impl_gen_struct {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void generate_test_frame_calc_method(
    FILE *stream,
    struct calculated_packet_test_function_impl_gen_struct *record,
    unsigned int indent) {
  (void)(record);
  (void)(indent);
  fprintf(stream, "return -1;");
}


x86 assembly (clang, -O0):
<generate_test_frame_calc_method>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_test_frame_calc_method>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
mov    $0xa,%esi
mov    $0x1,%edx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
%struct.calculated_packet_test_function_impl_gen_struct = type { i32 }
@.str = [11 x i8] c"return -1;\00"
define void @generate_test_frame_calc_method(i32* %0, %struct.calculated_packet_test_function_impl_gen_struct* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca %struct.calculated_packet_test_function_impl_gen_struct*
%6 = alloca i32
store i32* %0, i32** %4
store %struct.calculated_packet_test_function_impl_gen_struct* %1, %struct.calculated_packet_test_function_impl_gen_struct** %5
store i32 %2, i32* %6
%7 = load %struct.calculated_packet_test_function_impl_gen_struct*, %struct.calculated_packet_test_function_impl_gen_struct** %5
%8 = load i32, i32* %6
%9 = load i32*, i32** %4
%10 = call i32 @fprintf(i32* %9, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.calculated_packet_test_function_impl_gen_struct = type { i32 }
@.str = [11 x i8] c"return -1;\00"
define void @generate_test_frame_calc_method(i32* nocapture %0, %struct.calculated_packet_test_function_impl_gen_struct* nocapture readnone %1, i32 %2) {
%4 = tail call i64 @fwrite(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i64 10, i64 1, i32* %0)
ret void
}
void print_void() {}


x86 assembly (clang, -O0):
<print_void>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_void>:
ret

LLVM IR (-O0):
define void @print_void() {
ret void
}

LLVM IR (-O2):
define void @print_void() {
ret void
}
unsigned int test_10(unsigned int x) { return x + (x == 0); }


x86 assembly (clang, -O0):
<test_10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cmpl   $0x0,-0x4(%rbp)
sete   %cl
and    $0x1,%cl
movzbl %cl,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_10>:
mov    %edi,%eax
cmp    $0x1,%edi
adc    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @test_10(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
%7 = add i32 %3, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_10(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = zext i1 %2 to i32
%4 = add i32 %3, %0
ret i32 %4
}
int do_967() { return 967; }


x86 assembly (clang, -O0):
<do_967>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3c7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_967>:
mov    $0x3c7,%eax
ret

LLVM IR (-O0):
define i32 @do_967() {
ret i32 967
}

LLVM IR (-O2):
define i32 @do_967() {
ret i32 967
}
void SocketSubsystemDeinit() {}


x86 assembly (clang, -O0):
<SocketSubsystemDeinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SocketSubsystemDeinit>:
ret

LLVM IR (-O0):
define void @SocketSubsystemDeinit() {
ret void
}

LLVM IR (-O2):
define void @SocketSubsystemDeinit() {
ret void
}
int main(void) {
  register int a[5] = {0};
  sizeof(a);
  int b[10] = {0};
  b[5];
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x20(%rbp),%rdi
xor    %esi,%esi
mov    $0x14,%edx
call   1030 <memset@plt>
lea    -0x50(%rbp),%rdi
xor    %esi,%esi
mov    $0x28,%edx
call   1030 <memset@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [5 x i32]
%3 = alloca [10 x i32]
store i32 0, i32* %1
%4 = bitcast [5 x i32]* %2 to i8*
%5 = bitcast [10 x i32]* %3 to i8*
%6 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 5
%7 = load i32, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ glad_glFinish();
void glFinish() { glad_glFinish(); }


x86 assembly (clang, -O0):
<glFinish>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glad_glFinish@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<glFinish>:
xor    %eax,%eax
jmp    1030 <glad_glFinish@plt>

LLVM IR (-O0):
define void @glFinish() {
%1 = call i32 (...) @glad_glFinish()
ret void
}

LLVM IR (-O2):
define void @glFinish() {
%1 = tail call i32 (...) @glad_glFinish()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo(void *);
short ishortxor(short x, short y) {
  x ^= 24;
  if (!x)
    foo((void *)0);
  return x;
}


x86 assembly (clang, -O0):
<ishortxor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movswl -0x2(%rbp),%eax
xor    $0x18,%eax
mov    %ax,-0x2(%rbp)
cmpw   $0x0,-0x2(%rbp)
jne    1145 <ishortxor+0x35>
xor    %eax,%eax
mov    %eax,%edi
call   1030 <foo@plt>
movswl -0x2(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ishortxor>:
push   %rbx
mov    %edi,%ebx
xor    $0x18,%bx
jne    1120 <ishortxor+0x10>
xor    %edi,%edi
call   1030 <foo@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define signext i16 @ishortxor(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = sext i16 %5 to i32
%7 = xor i32 %6, 24
%8 = trunc i32 %7 to i16
store i16 %8, i16* %3
%9 = load i16, i16* %3
%10 = icmp ne i16 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 @foo(i8* null)
br label %13
13: ; preds = %11, %2
%14 = load i16, i16* %3
ret i16 %14
}

LLVM IR (-O2):
define signext i16 @ishortxor(i16 signext %0, i16 signext %1) {
%3 = xor i16 %0, 24
%4 = icmp eq i16 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @foo(i8* null)
br label %7
7: ; preds = %5, %2
ret i16 %3
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void udp_set_len(uint8_t *p_udp, uint16_t len) {
  p_udp[4] = (len & 0xff00) >> 8;
  p_udp[5] = (len & 0xff);
}


x86 assembly (clang, -O0):
<udp_set_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x10(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<udp_set_len>:
mov    %esi,%eax
movzbl %ah,%ecx
mov    %ecx,0x10(%rdi)
movzbl %al,%eax
mov    %eax,0x14(%rdi)
ret

LLVM IR (-O0):
define void @udp_set_len(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 65280
%7 = ashr i32 %6, 8
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 4
store i32 %7, i32* %9
%10 = load i32, i32* %4
%11 = and i32 %10, 255
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 5
store i32 %11, i32* %13
ret void
}

LLVM IR (-O2):
define void @udp_set_len(i32* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 8
%4 = and i32 %3, 255
%5 = getelementptr inbounds i32, i32* %0, i64 4
store i32 %4, i32* %5
%6 = and i32 %1, 255
%7 = getelementptr inbounds i32, i32* %0, i64 5
store i32 %6, i32* %7
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void h265hvcc_set_temporal_id_nested(uint8_t *p) { p[21] |= 0x4; }


x86 assembly (clang, -O0):
<h265hvcc_set_temporal_id_nested>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x54(%rax),%ecx
or     $0x4,%ecx
mov    %ecx,0x54(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<h265hvcc_set_temporal_id_nested>:
orb    $0x4,0x54(%rdi)
ret

LLVM IR (-O0):
define void @h265hvcc_set_temporal_id_nested(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 21
%5 = load i32, i32* %4
%6 = or i32 %5, 4
store i32 %6, i32* %4
ret void
}

LLVM IR (-O2):
define void @h265hvcc_set_temporal_id_nested(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 21
%3 = load i32, i32* %2
%4 = or i32 %3, 4
store i32 %4, i32* %2
ret void
}
unsigned char gfx_inb(unsigned short port) { return (0); }


x86 assembly (clang, -O0):
<gfx_inb>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
xor    %eax,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_inb>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @gfx_inb(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
ret i8 0
}

LLVM IR (-O2):
define zeroext i8 @gfx_inb(i16 zeroext %0) {
ret i8 0
}
int get_ipc_path_max_len(void) { return 0; }


x86 assembly (clang, -O0):
<get_ipc_path_max_len>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_ipc_path_max_len>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_ipc_path_max_len() {
ret i32 0
}

LLVM IR (-O2):
define i32 @get_ipc_path_max_len() {
ret i32 0
}
int set1BTrue(char *mem) { return (*mem = (1 > 0)); }


x86 assembly (clang, -O0):
<set1BTrue>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x1,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<set1BTrue>:
movb   $0x1,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @set1BTrue(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
store i8 1, i8* %3
ret i32 1
}

LLVM IR (-O2):
define i32 @set1BTrue(i8* nocapture writeonly %0) {
store i8 1, i8* %0
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int main() {
  char newChar = 'a' + 2;
  printf("the char 'a' + 2 is equal to:  %c\n ", ('a' + 2));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0x63,-0x5(%rbp)
lea    0xed6(%rip),%rdi
mov    $0x63,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x63,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"the char 'a' + 2 is equal to: %c\0A \00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
store i8 99, i8* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8 signext 99)
ret i32 0
}

LLVM IR (-O2):
@.str = [36 x i8] c"the char 'a' + 2 is equal to: %c\0A \00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i8 signext 99)
ret i32 0
}
/* Type definitions */
struct battle_char {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ charge_generic(struct battle_char *, struct battle_char *,
                                  int);
void charge1(struct battle_char *origin, struct battle_char *target) {
  charge_generic(origin, target, 1);
}


x86 assembly (clang, -O0):
<charge1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <charge_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<charge1>:
mov    $0x1,%edx
jmp    1030 <charge_generic@plt>

LLVM IR (-O0):
%struct.battle_char = type { i32 }
define void @charge1(%struct.battle_char* %0, %struct.battle_char* %1) {
%3 = alloca %struct.battle_char*
%4 = alloca %struct.battle_char*
store %struct.battle_char* %0, %struct.battle_char** %3
store %struct.battle_char* %1, %struct.battle_char** %4
%5 = load %struct.battle_char*, %struct.battle_char** %3
%6 = load %struct.battle_char*, %struct.battle_char** %4
%7 = call i32 @charge_generic(%struct.battle_char* %5, %struct.battle_char* %6, i32 1)
ret void
}

LLVM IR (-O2):
%struct.battle_char = type { i32 }
define void @charge1(%struct.battle_char* %0, %struct.battle_char* %1) {
%3 = tail call i32 @charge_generic(%struct.battle_char* %0, %struct.battle_char* %1, i32 1)
ret void
}
int test_imm_81uint8_mem(unsigned char *val) {
  return ((*val) & (-0x81 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_81uint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xffffff7f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_81uint8_mem>:
testb  $0x7f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_81uint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, -129
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_81uint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 127
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int comparator(const void *a, const void *b) {
  const int v1 = *(const int *)a;
  const int v2 = *(const int *)b;
  return v1 < v2 ? -1 : (v1 > v2 ? 1 : 0);
}


x86 assembly (clang, -O0):
<comparator>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    1137 <comparator+0x37>
mov    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
jmp    114c <comparator+0x4c>
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%esi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmovg  %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comparator>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @comparator(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load i32, i32* %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = icmp slt i32 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %23
17: ; preds = %2
%18 = load i32, i32* %5
%19 = load i32, i32* %6
%20 = icmp sgt i32 %18, %19
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 1, i32 0
br label %23
23: ; preds = %17, %16
%24 = phi i32 [ -1, %16 ], [ %22, %17 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @comparator(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp slt i32 %4, %6
%8 = icmp sgt i32 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ io_out8(int, int);
int /*<<< orphan*/ printk(char *);
void i8259A_auto_return(void) {
  printk("Unexpected interrupt from Intel 8259A happened.");
  io_out8(0x20, 0x20);
  io_out8(0xA0, 0x20);
}


x86 assembly (clang, -O0):
<i8259A_auto_return>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printk@plt>
mov    $0x20,%esi
mov    %esi,%edi
call   1040 <io_out8@plt>
mov    $0xa0,%edi
mov    $0x20,%esi
call   1040 <io_out8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<i8259A_auto_return>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printk@plt>
mov    $0x20,%edi
mov    $0x20,%esi
call   1040 <io_out8@plt>
mov    $0xa0,%edi
mov    $0x20,%esi
pop    %rax
jmp    1040 <io_out8@plt>

LLVM IR (-O0):
@.str = [48 x i8] c"Unexpected interrupt from Intel 8259A happened.\00"
define void @i8259A_auto_return() {
%1 = call i32 @printk(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @io_out8(i32 32, i32 32)
%3 = call i32 @io_out8(i32 160, i32 32)
ret void
}

LLVM IR (-O2):
@.str = [48 x i8] c"Unexpected interrupt from Intel 8259A happened.\00"
define void @i8259A_auto_return() {
%1 = tail call i32 @printk(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @io_out8(i32 32, i32 32)
%3 = tail call i32 @io_out8(i32 160, i32 32)
ret void
}
float foo_s(float a, float b) { return -a * b; }


x86 assembly (clang, -O0):
<foo_s>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mulss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_s>:
xorps  0xef9(%rip),%xmm0
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @foo_s(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = fneg float %5
%7 = load float, float* %4
%8 = fmul float %6, %7
ret float %8
}

LLVM IR (-O2):
define float @foo_s(float %0, float %1) {
%3 = fneg float %0
%4 = fmul float %3, %1
ret float %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int inet_get_iface_mac_address(char *iface_name, uint8_t *mac_address) {}


x86 assembly (clang, -O0):
<inet_get_iface_mac_address>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inet_get_iface_mac_address>:
ret

LLVM IR (-O0):
define i32 @inet_get_iface_mac_address(i8* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %4
store i32* %1, i32** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @inet_get_iface_mac_address(i8* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 undef
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int scsi_transient_error(void *irequestsense) {
  const uint8_t *requestsense = (uint8_t *)irequestsense;
  const uint8_t asc = requestsense[12];
  if (asc == 0x28 || asc == 0x29 || asc == 0x04)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<scsi_transient_error>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    0x30(%rax),%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x28,-0x1c(%rbp)
je     1138 <scsi_transient_error+0x38>
cmpl   $0x29,-0x1c(%rbp)
je     1138 <scsi_transient_error+0x38>
cmpl   $0x4,-0x1c(%rbp)
jne    1144 <scsi_transient_error+0x44>
movl   $0x1,-0x4(%rbp)
jmp    114b <scsi_transient_error+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scsi_transient_error>:
mov    0x30(%rdi),%ecx
cmp    $0x29,%rcx
ja     111f <scsi_transient_error+0x1f>
mov    $0x1,%eax
movabs $0x30000000010,%rdx
bt     %rcx,%rdx
jae    111f <scsi_transient_error+0x1f>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @scsi_transient_error(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %4
%8 = load i32*, i32** %4
%9 = getelementptr inbounds i32, i32* %8, i64 12
%10 = load i32, i32* %9
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = icmp eq i32 %11, 40
br i1 %12, label %19, label %13
13: ; preds = %1
%14 = load i32, i32* %5
%15 = icmp eq i32 %14, 41
br i1 %15, label %19, label %16
16: ; preds = %13
%17 = load i32, i32* %5
%18 = icmp eq i32 %17, 4
br i1 %18, label %19, label %20
19: ; preds = %16, %13, %1
store i32 1, i32* %2
br label %21
20: ; preds = %16
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @scsi_transient_error(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 48
%3 = bitcast i8* %2 to i32*
%4 = load i32, i32* %3
switch i32 %4, label %5 [
i32 41, label %6
i32 40, label %6
i32 4, label %6
]
5: ; preds = %1
br label %6
6: ; preds = %1, %1, %1, %5
%7 = phi i32 [ 0, %5 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %7
}
void loop() {
  volatile int i;
  for (i = 0; i < 100000; i++)
    ;
}


x86 assembly (clang, -O0):
<loop>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cmp    $0x186a0,%eax
jge    112c <loop+0x2c>
jmp    111e <loop+0x1e>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <loop+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop>:
movl   $0x0,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0x1869f,%eax
jg     1130 <loop+0x30>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
addl   $0x1,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    $0x186a0,%eax
jl     1120 <loop+0x20>
ret

LLVM IR (-O0):
define void @loop() {
%1 = alloca i32
store volatile i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load volatile i32, i32* %1
%4 = icmp slt i32 %3, 100000
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load volatile i32, i32* %1
%8 = add nsw i32 %7, 1
store volatile i32 %8, i32* %1
br label %2
9: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @loop() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 0, i32* %1
%3 = load volatile i32, i32* %1
%4 = icmp slt i32 %3, 100000
br i1 %4, label %5, label %10
5: ; preds = %0, %5
%6 = load volatile i32, i32* %1
%7 = add nsw i32 %6, 1
store volatile i32 %7, i32* %1
%8 = load volatile i32, i32* %1
%9 = icmp slt i32 %8, 100000
br i1 %9, label %5, label %10
10: ; preds = %5, %0
ret void
}
int sqr(int x) { return x * x; }


x86 assembly (clang, -O0):
<sqr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqr>:
mov    %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @sqr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @sqr(i32 %0) {
%2 = mul nsw i32 %0, %0
ret i32 %2
}
int special_fun(int x, int y) { return x + y; }


x86 assembly (clang, -O0):
<special_fun>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<special_fun>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @special_fun(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @special_fun(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
int __attribute__((no)) nne(int a, int b) { return -(a != b); }


x86 assembly (clang, -O0):
<nne>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%ecx
xor    %eax,%eax
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nne>:
xor    %eax,%eax
cmp    %esi,%edi
setne  %al
neg    %eax
ret

LLVM IR (-O0):
define i32 @nne(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %5, %6
%8 = zext i1 %7 to i32
%9 = sub nsw i32 0, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @nne(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, %1
%4 = sext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ bswap16(int /*<<< orphan*/);
uint16_t be16_to_cpu(uint16_t v) { return bswap16(v); }


x86 assembly (clang, -O0):
<be16_to_cpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bswap16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<be16_to_cpu>:
jmp    1030 <bswap16@plt>

LLVM IR (-O0):
define i32 @be16_to_cpu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @bswap16(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @be16_to_cpu(i32 %0) {
%2 = tail call i32 @bswap16(i32 %0)
ret i32 %2
}