xunge/DecIR huggingface dataset:
void NullFunc() {}


x86 assembly (clang, -O0):
<NullFunc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NullFunc>:
ret

LLVM IR (-O0):
define void @NullFunc() {
ret void
}

LLVM IR (-O2):
define void @NullFunc() {
ret void
}
double fintegrand_btilde(double u, double a, double b, double n) {
  return (a * log(u) - (b) * (log(1. - pow(u, n + 1)) - log(1 - u)));
}


x86 assembly (clang, -O0):
<fintegrand_btilde>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <log@plt>
movsd  %xmm0,-0x30(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x38(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xe94(%rip),%xmm1
addsd  -0x20(%rbp),%xmm1
call   1040 <pow@plt>
movaps %xmm0,%xmm1
movsd  0xe7f(%rip),%xmm0
subsd  %xmm1,%xmm0
call   1030 <log@plt>
movsd  %xmm0,-0x40(%rbp)
movsd  0xe69(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
call   1030 <log@plt>
movsd  -0x40(%rbp),%xmm3
movsd  -0x38(%rbp),%xmm1
movsd  -0x30(%rbp),%xmm2
movaps %xmm0,%xmm4
movsd  -0x28(%rbp),%xmm0
subsd  %xmm4,%xmm3
mulsd  %xmm3,%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fintegrand_btilde>:
sub    $0x28,%rsp
movsd  %xmm3,(%rsp)
movsd  %xmm2,0x18(%rsp)
movsd  %xmm1,0x20(%rsp)
movsd  %xmm0,0x8(%rsp)
call   1030 <log@plt>
movsd  %xmm0,0x10(%rsp)
movsd  (%rsp),%xmm1
addsd  0xead(%rip),%xmm1
movsd  0x8(%rsp),%xmm0
call   1040 <pow@plt>
movsd  0xe9a(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
call   1030 <log@plt>
movsd  %xmm0,(%rsp)
movsd  0xe80(%rip),%xmm0
subsd  0x8(%rsp),%xmm0
call   1030 <log@plt>
movsd  (%rsp),%xmm1
subsd  %xmm0,%xmm1
mulsd  0x18(%rsp),%xmm1
movsd  0x10(%rsp),%xmm0
mulsd  0x20(%rsp),%xmm0
subsd  %xmm1,%xmm0
add    $0x28,%rsp
ret

LLVM IR (-O0):
define double @fintegrand_btilde(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %6
%10 = load double, double* %5
%11 = call double @log(double %10)
%12 = load double, double* %7
%13 = load double, double* %5
%14 = load double, double* %8
%15 = fadd double %14, 1.000000e+00
%16 = call double @pow(double %13, double %15)
%17 = fsub double 1.000000e+00, %16
%18 = call double @log(double %17)
%19 = load double, double* %5
%20 = fsub double 1.000000e+00, %19
%21 = call double @log(double %20)
%22 = fsub double %18, %21
%23 = fmul double %12, %22
%24 = fneg double %23
%25 = call double @llvm.fmuladd.f64(double %9, double %11, double %24)
ret double %25
}

LLVM IR (-O2):
define double @fintegrand_btilde(double %0, double %1, double %2, double %3) {
%5 = tail call double @log(double %0)
%6 = fadd double %3, 1.000000e+00
%7 = tail call double @pow(double %0, double %6)
%8 = fsub double 1.000000e+00, %7
%9 = tail call double @log(double %8)
%10 = fsub double 1.000000e+00, %0
%11 = tail call double @log(double %10)
%12 = fsub double %9, %11
%13 = fneg double %12
%14 = fmul double %13, %2
%15 = tail call double @llvm.fmuladd.f64(double %1, double %5, double %14)
ret double %15
}
int comp_zlib_cleanup() { return 0; }


x86 assembly (clang, -O0):
<comp_zlib_cleanup>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp_zlib_cleanup>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @comp_zlib_cleanup() {
ret i32 0
}

LLVM IR (-O2):
define i32 @comp_zlib_cleanup() {
ret i32 0
}
int i6(int *base) { return base[00377777]; }


x86 assembly (clang, -O0):
<i6>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x7fffc(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<i6>:
mov    0x7fffc(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @i6(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 131071
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @i6(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 131071
%3 = load i32, i32* %2
ret i32 %3
}
int top(y)
int y;
{ return middle(y + 1); }


x86 assembly (clang, -O0):
<top>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
add    $0x1,%edi
mov    $0x0,%al
call   1030 <middle@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<top>:
add    $0x1,%edi
xor    %eax,%eax
jmp    1030 <middle@plt>

LLVM IR (-O0):
define i32 @top(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
%5 = call i32 (i32, ...) bitcast (i32 (...)* @middle to i32 (i32, ...)*)(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @top(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @middle to i32 (i32, ...)*)(i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
int LZ4_freeHC(void *LZ4HC_Data) {
  free(LZ4HC_Data);
  return 0;
}


x86 assembly (clang, -O0):
<LZ4_freeHC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_freeHC>:
push   %rax
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @LZ4_freeHC(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @LZ4_freeHC(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
scalar_t__ strcmp(char *, char *);
char *to_addr(char *);
int to_port(char *);
void test_address_parse() {
  char *a = to_addr("127.0.0.1:1234");
  assert(strcmp(a, "127.0.0.1") == 0);
  int port = to_port("80.0.0.1:4321");
  assert(port == 4321);
}


x86 assembly (clang, -O0):
<test_address_parse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xeb1(%rip),%rdi
call   1030 <to_addr@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeac(%rip),%rsi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
lea    0xe99(%rip),%rdi
call   1060 <to_port@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x10e1,-0xc(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_address_parse>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1030 <to_addr@plt>
lea    0xebb(%rip),%rsi
mov    %rax,%rdi
call   1040 <strcmp@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
call   1050 <assert@plt>
lea    0xea8(%rip),%rdi
call   1060 <to_port@plt>
xor    %edi,%edi
cmp    $0x10e1,%eax
sete   %dil
pop    %rax
jmp    1050 <assert@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"127.0.0.1:1234\00"
@.str.1 = [10 x i8] c"127.0.0.1\00"
@.str.2 = [14 x i8] c"80.0.0.1:4321\00"
define void @test_address_parse() {
%1 = alloca i8*
%2 = alloca i32
%3 = call i8* @to_addr(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = call i64 @strcmp(i8* %4, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = call i32 @to_port(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0))
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = icmp eq i32 %10, 4321
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"127.0.0.1:1234\00"
@.str.1 = [10 x i8] c"127.0.0.1\00"
@.str.2 = [14 x i8] c"80.0.0.1:4321\00"
define void @test_address_parse() {
%1 = tail call i8* @to_addr(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = tail call i64 @strcmp(i8* %1, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 @to_port(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0))
%7 = icmp eq i32 %6, 4321
%8 = zext i1 %7 to i32
%9 = tail call i32 @assert(i32 %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ drv_Newhaven_sendCommand(char, char *, int);
int drv_Newhaven_contrast(int contrast) {
  char cmd;
  char wData[1];
  if (contrast < 1)
    contrast = 1;
  if (contrast > 50)
    contrast = 50;
  cmd = 0x52;
  wData[0] = contrast;
  drv_Newhaven_sendCommand(cmd, wData, 1);
  return contrast;
}


x86 assembly (clang, -O0):
<drv_Newhaven_contrast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jge    112c <drv_Newhaven_contrast+0x1c>
movl   $0x1,-0x4(%rbp)
cmpl   $0x32,-0x4(%rbp)
jle    113d <drv_Newhaven_contrast+0x2d>
movl   $0x32,-0x4(%rbp)
movb   $0x52,-0x5(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,-0x6(%rbp)
mov    -0x5(%rbp),%al
lea    -0x6(%rbp),%rsi
mov    $0x1,%edx
movsbl %al,%edi
call   1030 <drv_Newhaven_sendCommand@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_Newhaven_contrast>:
push   %rbx
sub    $0x10,%rsp
test   %edi,%edi
mov    $0x1,%eax
cmovle %eax,%edi
cmp    $0x32,%edi
mov    $0x32,%ebx
cmovb  %edi,%ebx
mov    %bl,0xf(%rsp)
lea    0xf(%rsp),%rsi
mov    $0x52,%edi
mov    $0x1,%edx
call   1030 <drv_Newhaven_sendCommand@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @drv_Newhaven_contrast(i32 %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca [1 x i8]
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %8
8: ; preds = %7, %1
%9 = load i32, i32* %2
%10 = icmp sgt i32 %9, 50
br i1 %10, label %11, label %12
11: ; preds = %8
store i32 50, i32* %2
br label %12
12: ; preds = %11, %8
store i8 82, i8* %3
%13 = load i32, i32* %2
%14 = trunc i32 %13 to i8
%15 = getelementptr inbounds [1 x i8], [1 x i8]* %4, i64 0, i64 0
store i8 %14, i8* %15
%16 = load i8, i8* %3
%17 = getelementptr inbounds [1 x i8], [1 x i8]* %4, i64 0, i64 0
%18 = call i32 @drv_Newhaven_sendCommand(i8 signext %16, i8* %17, i32 1)
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @drv_Newhaven_contrast(i32 %0) {
%2 = alloca [1 x i8]
%3 = getelementptr inbounds [1 x i8], [1 x i8]* %2, i64 0, i64 0
%4 = icmp sgt i32 %0, 1
%5 = select i1 %4, i32 %0, i32 1
%6 = icmp ult i32 %5, 50
%7 = select i1 %6, i32 %5, i32 50
%8 = trunc i32 %7 to i8
store i8 %8, i8* %3
%9 = call i32 @drv_Newhaven_sendCommand(i8 signext 82, i8* %3, i32 1)
ret i32 %7
}
/* Variables and functions */
int dynamic_flips_per_assignment_per_mille();
int high_agility(void) {
  return dynamic_flips_per_assignment_per_mille() >= 200;
}


x86 assembly (clang, -O0):
<high_agility>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dynamic_flips_per_assignment_per_mille@plt>
cmp    $0xc8,%eax
setge  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<high_agility>:
push   %rax
xor    %eax,%eax
call   1030 <dynamic_flips_per_assignment_per_mille@plt>
xor    %ecx,%ecx
cmp    $0xc8,%eax
setge  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @high_agility() {
%1 = call i32 (...) @dynamic_flips_per_assignment_per_mille()
%2 = icmp sge i32 %1, 200
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @high_agility() {
%1 = tail call i32 (...) @dynamic_flips_per_assignment_per_mille()
%2 = icmp sgt i32 %1, 199
%3 = zext i1 %2 to i32
ret i32 %3
}
int main() {
  int x$1 = 0;
  {
    __label__ break$1;
    __label__ continue$1;
  continue$1:;
    if ((!((x$1 != 20) ? ((x$1 != 30) ? 1 : (x$1 != 40)) : 0)))
      goto break$1;
    (x$1 += 1);
    goto continue$1;
  break$1:;
  }
  {
    __label__ break$1;
    __label__ continue$1;
    int i$1 = 9;
    int j$1 = 11;
  loop$$1:;
    if ((!1))
      goto break$1;
    { (x$1 = (i$1 + x$1)); }
  continue$1:;
    ;
    goto loop$$1;
  break$1:;
  }
  (x$1 |= 3);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x14,-0x8(%rbp)
je     1144 <main+0x44>
cmpl   $0x1e,-0x8(%rbp)
je     1135 <main+0x35>
mov    $0x1,%al
test   $0x1,%al
jne    1158 <main+0x58>
jmp    1153 <main+0x53>
cmpl   $0x28,-0x8(%rbp)
jne    1158 <main+0x58>
jmp    1153 <main+0x53>
xor    %eax,%eax
test   $0x1,%al
jne    1158 <main+0x58>
jmp    1153 <main+0x53>
jmp    1166 <main+0x66>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
movl   $0x9,-0xc(%rbp)
movl   $0xb,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1174 <main+0x74>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %5
5: ; preds = %17, %0
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 20
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp ne i32 %9, 30
br i1 %10, label %11, label %12
11: ; preds = %8
br i1 true, label %17, label %16
12: ; preds = %8
%13 = load i32, i32* %2
%14 = icmp ne i32 %13, 40
br i1 %14, label %17, label %16
15: ; preds = %5
br i1 false, label %17, label %16
16: ; preds = %15, %12, %11
br label %20
17: ; preds = %15, %12, %11
%18 = load i32, i32* %2
%19 = add nsw i32 %18, 1
store i32 %19, i32* %2
br label %5
20: ; preds = %16
store i32 9, i32* %3
store i32 11, i32* %4
br label %21
21: ; preds = %25, %20
%22 = load i32, i32* %3
%23 = load i32, i32* %2
%24 = add nsw i32 %22, %23
store i32 %24, i32* %2
br label %25
25: ; preds = %21
br label %21
26: ; No predecessors!
%27 = load i32, i32* %2
%28 = or i32 %27, 3
store i32 %28, i32* %2
%29 = load i32, i32* %1
ret i32 %29
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ output_char(long);
void output_char_str(char *s, long sl) {
  long n;
  n = 0;
  while (n < sl) {
    output_char((long)s[n]);
    n = n + 1;
  }
  return;
}


x86 assembly (clang, -O0):
<output_char_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1159 <output_char_str+0x49>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movsbq (%rax,%rcx,1),%rdi
call   1030 <output_char@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <output_char_str+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_char_str>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
jle    1143 <output_char_str+0x33>
mov    %rsi,%r15
mov    %rdi,%r14
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbq (%r14,%rbx,1),%rdi
call   1030 <output_char@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <output_char_str+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @output_char_str(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %10, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp slt i64 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i8, i8* %11, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i64
%16 = call i32 @output_char(i64 %15)
%17 = load i64, i64* %5
%18 = add nsw i64 %17, 1
store i64 %18, i64* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @output_char_str(i8* nocapture %0, i64 %1) {
%3 = icmp sgt i64 %1, 0
br i1 %3, label %4, label %12
4: ; preds = %2, %4
%5 = phi i64 [ %10, %4 ], [ 0, %2 ]
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = sext i8 %7 to i64
%9 = tail call i32 @output_char(i64 %8)
%10 = add nuw nsw i64 %5, 1
%11 = icmp eq i64 %10, %1
br i1 %11, label %12, label %4
12: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void init_random() { srand(time(NULL)); }


x86 assembly (clang, -O0):
<init_random>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_random>:
push   %rax
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <srand@plt>

LLVM IR (-O0):
define void @init_random() {
%1 = call i32 @time(i32* null)
%2 = call i32 @srand(i32 %1)
ret void
}

LLVM IR (-O2):
define void @init_random() {
%1 = tail call i32 @time(i32* null)
%2 = tail call i32 @srand(i32 %1)
ret void
}
int is_reg(str)
register char *str;
{
  switch (*str) {
  case 'a':
  case 'd':
    return (isdigit(*(str + 1)));
  case 's':
    return (*(str + 1) == 'p');
  default:
    return (0);
  }
}


x86 assembly (clang, -O0):
<is_reg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
sub    $0x61,%eax
je     1156 <is_reg+0x46>
jmp    1134 <is_reg+0x24>
mov    -0x14(%rbp),%eax
sub    $0x64,%eax
je     1156 <is_reg+0x46>
jmp    1145 <is_reg+0x35>
mov    -0x14(%rbp),%eax
sub    $0x73,%eax
je     116b <is_reg+0x5b>
jmp    1186 <is_reg+0x76>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%edi
call   1030 <isdigit@plt>
mov    %eax,-0x4(%rbp)
jmp    118d <is_reg+0x7d>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x70,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    118d <is_reg+0x7d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_reg>:
movsbl (%rdi),%eax
cmp    $0x61,%eax
je     1112 <is_reg+0x12>
cmp    $0x73,%eax
je     1123 <is_reg+0x23>
cmp    $0x64,%eax
jne    112e <is_reg+0x2e>
movsbl 0x1(%rdi),%eax
add    $0xffffffd0,%eax
cmp    $0xa,%eax
setb   %al
movzbl %al,%eax
ret
cmpb   $0x70,0x1(%rdi)
sete   %al
movzbl %al,%eax
ret
xor    %eax,%eax
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @is_reg(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
switch i32 %6, label %20 [
i32 97, label %7
i32 100, label %7
i32 115, label %13
]
7: ; preds = %1, %1
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = call i32 @isdigit(i32 %11)
store i32 %12, i32* %2
br label %21
13: ; preds = %1
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i64 1
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 112
%19 = zext i1 %18 to i32
store i32 %19, i32* %2
br label %21
20: ; preds = %1
store i32 0, i32* %2
br label %21
21: ; preds = %20, %13, %7
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @is_reg(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
switch i32 %3, label %14 [
i32 97, label %4
i32 100, label %4
i32 115, label %10
]
4: ; preds = %1, %1
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = add nsw i32 %7, -48
%9 = icmp ult i32 %8, 10
br label %14
10: ; preds = %1
%11 = getelementptr inbounds i8, i8* %0, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 112
br label %14
14: ; preds = %1, %10, %4
%15 = phi i1 [ %13, %10 ], [ %9, %4 ], [ false, %1 ]
%16 = zext i1 %15 to i32
ret i32 %16
}
/* Variables and functions */
int f361(int *);
int f362(int *p) { return f361(p); }


x86 assembly (clang, -O0):
<f362>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f361@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f362>:
jmp    1030 <f361@plt>

LLVM IR (-O0):
define i32 @f362(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f361(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f362(i32* %0) {
%2 = tail call i32 @f361(i32* %0)
ret i32 %2
}
/* Type definitions */
struct mat3 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mat3_identity(float *);
__attribute__((always_)) struct mat3 *psmat3_identity(struct mat3 *result) {
  mat3_identity((float *)result);
  return result;
}


x86 assembly (clang, -O0):
<psmat3_identity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mat3_identity@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psmat3_identity>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mat3_identity@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.mat3 = type { i32 }
define %struct.mat3* @psmat3_identity(%struct.mat3* %0) {
%2 = alloca %struct.mat3*
store %struct.mat3* %0, %struct.mat3** %2
%3 = load %struct.mat3*, %struct.mat3** %2
%4 = bitcast %struct.mat3* %3 to float*
%5 = call i32 @mat3_identity(float* %4)
%6 = load %struct.mat3*, %struct.mat3** %2
ret %struct.mat3* %6
}

LLVM IR (-O2):
%struct.mat3 = type { i32 }
define %struct.mat3* @psmat3_identity(%struct.mat3* returned %0) {
%2 = bitcast %struct.mat3* %0 to float*
%3 = tail call i32 @mat3_identity(float* %2)
ret %struct.mat3* %0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xc0() {
  Assert_real((isalpha(192) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              965, ("isalpha should be 0 for 0xc0"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xc0>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc0,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3c5,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xc0>:
push   %rax
mov    $0xc0,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3c5,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xc0\00"
define void @t_isalpha_0xc0() {
%1 = call i64 @isalpha(i32 192)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 965, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xc0\00"
define void @t_isalpha_0xc0() {
%1 = tail call i64 @isalpha(i32 192)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 965, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void nonterm(void) {
  int i = 0;
  while (i == 0 || i == 1) {
    if (i == 0) {
      i = 1;
    } else {
      i = 0;
    }
  }
  *(char *)0;
}


x86 assembly (clang, -O0):
<nonterm>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1124 <nonterm+0x24>
cmpl   $0x1,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
test   $0x1,%al
jne    1134 <nonterm+0x34>
jmp    1156 <nonterm+0x56>
cmpl   $0x0,-0x4(%rbp)
jne    114a <nonterm+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1151 <nonterm+0x51>
movl   $0x0,-0x4(%rbp)
jmp    110b <nonterm+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define void @nonterm() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %15, %0
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = load i32, i32* %1
%7 = icmp eq i32 %6, 1
br label %8
8: ; preds = %5, %2
%9 = phi i1 [ true, %2 ], [ %7, %5 ]
br i1 %9, label %10, label %16
10: ; preds = %8
%11 = load i32, i32* %1
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 1, i32* %1
br label %15
14: ; preds = %10
store i32 0, i32* %1
br label %15
15: ; preds = %14, %13
br label %2
16: ; preds = %8
%17 = load i8, i8* null
ret void
}

LLVM IR (-O2):
float abso(float nr) {
  if (nr < 0)
    return -nr;
  return nr;
}


x86 assembly (clang, -O0):
<abso>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    1132 <abso+0x32>
movss  -0x8(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    113c <abso+0x3c>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<abso>:
movaps 0xef9(%rip),%xmm2
xorps  %xmm0,%xmm2
xorps  %xmm3,%xmm3
movaps %xmm0,%xmm1
cmpltss %xmm3,%xmm1
andps  %xmm1,%xmm2
andnps %xmm0,%xmm1
orps   %xmm2,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @abso(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fcmp olt float %4, 0.000000e+00
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load float, float* %3
%8 = fneg float %7
store float %8, float* %2
br label %11
9: ; preds = %1
%10 = load float, float* %3
store float %10, float* %2
br label %11
11: ; preds = %9, %6
%12 = load float, float* %2
ret float %12
}

LLVM IR (-O2):
define float @abso(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
%3 = fneg float %0
%4 = select i1 %2, float %3, float %0
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
char *strrchr(char *, char);
void _sock_srvname(char *npath, char *path) {
  char *p;
  strcpy(npath, "/srv/UD.");
  p = strrchr(path, '/');
  if (p == 0)
    p = path;
  else
    p++;
  strcat(npath, p);
}


x86 assembly (clang, -O0):
<_sock_srvname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rdi
mov    $0x2f,%esi
call   1040 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    117a <_sock_srvname+0x4a>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1186 <_sock_srvname+0x56>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1050 <strcat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sock_srvname>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
lea    0xebf(%rip),%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
mov    $0x2f,%esi
call   1040 <strrchr@plt>
lea    0x1(%rax),%rsi
test   %rax,%rax
cmove  %rbx,%rsi
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <strcat@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"/srv/UD.\00"
define void @_sock_srvname(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @strcpy(i8* %6, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%8 = load i8*, i8** %4
%9 = call i8* @strrchr(i8* %8, i8 signext 47)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = load i8*, i8** %4
store i8* %13, i8** %5
br label %17
14: ; preds = %2
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
br label %17
17: ; preds = %14, %12
%18 = load i8*, i8** %3
%19 = load i8*, i8** %5
%20 = call i32 @strcat(i8* %18, i8* %19)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"/srv/UD.\00"
define void @_sock_srvname(i8* %0, i8* %1) {
%3 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%4 = tail call i8* @strrchr(i8* dereferenceable(1) %1, i8 signext 47)
%5 = icmp eq i8* %4, null
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = select i1 %5, i8* %1, i8* %6
%8 = tail call i32 @strcat(i8* %0, i8* %7)
ret void
}
void run_code(char *buf) { (*(void (*)())buf)(); }


x86 assembly (clang, -O0):
<run_code>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_code>:
xor    %eax,%eax
jmp    *%rdi

LLVM IR (-O0):
define void @run_code(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to void (...)*
ret void
}

LLVM IR (-O2):
define void @run_code(i8* nocapture %0) {
%2 = bitcast i8* %0 to void (...)*
tail call void (...) %2()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ scanf(char *, double *);
int main() {
  double R;
  scanf("%lf", &R);
  printf("A=%.4lf\n", 3.14159 * R * R);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xed2(%rip),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <scanf@plt>
movsd  0xeb9(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee0(%rip),%rdi
mov    %rsp,%rsi
call   1040 <scanf@plt>
movsd  (%rsp),%xmm1
movsd  0xec3(%rip),%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [9 x i8] c"A=%.4lf\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %2)
%4 = load double, double* %2
%5 = fmul double 3.141590e+00, %4
%6 = load double, double* %2
%7 = fmul double %5, %6
%8 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), double %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lf\00"
@.str.1 = [9 x i8] c"A=%.4lf\0A\00"
define i32 @main() {
%1 = alloca double
%2 = bitcast double* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %1)
%4 = load double, double* %1
%5 = fmul double %4, 3.141590e+00
%6 = fmul double %4, %5
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), double %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ floor(double);
int pmod(int /*<<< orphan*/, double);
int SecFromTime(double t) { return pmod(floor(t / 1000.0), 60.0); }


x86 assembly (clang, -O0):
<SecFromTime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xece(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <floor@plt>
mov    %eax,%edi
movsd  0xeb3(%rip),%xmm0
call   1040 <pmod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SecFromTime>:
push   %rax
divsd  0xed7(%rip),%xmm0
call   1030 <floor@plt>
movsd  0xed2(%rip),%xmm0
mov    %eax,%edi
pop    %rax
jmp    1040 <pmod@plt>

LLVM IR (-O0):
define i32 @SecFromTime(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 1.000000e+03
%5 = call i32 @floor(double %4)
%6 = call i32 @pmod(i32 %5, double 6.000000e+01)
ret i32 %6
}

LLVM IR (-O2):
define i32 @SecFromTime(double %0) {
%2 = fdiv double %0, 1.000000e+03
%3 = tail call i32 @floor(double %2)
%4 = tail call i32 @pmod(i32 %3, double 6.000000e+01)
ret i32 %4
}
__attribute__((no, noclone)) signed __int128 t150_5sub(unsigned __int128 x) {
  signed __int128 r;
  if (__builtin_sub_overflow(x, (signed __int128)(0), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t150_5sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rcx
mov    -0x28(%rbp),%rdx
mov    %rdx,%rax
shr    $0x3f,%rax
test   %rax,%rax
setne  %al
mov    %rdx,-0x38(%rbp)
mov    %rcx,-0x40(%rbp)
test   $0x1,%al
jne    115a <t150_5sub+0x4a>
jmp    1161 <t150_5sub+0x51>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t150_5sub>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rax
sar    $0x3f,%rax
je     112a <t150_5sub+0x1a>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %r14,%rax
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t150_5sub(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = zext i128 %11 to i129
%13 = call { i129, i1 } @llvm.ssub.with.overflow.i129(i129 %12, i129 0)
%14 = extractvalue { i129, i1 } %13, 1
%15 = extractvalue { i129, i1 } %13, 0
%16 = trunc i129 %15 to i128
%17 = sext i128 %16 to i129
%18 = icmp ne i129 %15, %17
%19 = or i1 %14, %18
store i128 %16, i128* %6
br i1 %19, label %20, label %22
20: ; preds = %2
%21 = call i32 (...) @bar()
br label %22
22: ; preds = %20, %2
%23 = load i128, i128* %6
store i128 %23, i128* %3
%24 = bitcast i128* %3 to { i64, i64 }*
%25 = load { i64, i64 }, { i64, i64 }* %24
ret { i64, i64 } %25
}

LLVM IR (-O2):
define { i64, i64 } @t150_5sub(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = zext i128 %6 to i129
%8 = sext i128 %6 to i129
%9 = icmp eq i129 %7, %8
br i1 %9, label %12, label %10
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = insertvalue { i64, i64 } poison, i64 %0, 0
%14 = insertvalue { i64, i64 } %13, i64 %1, 1
ret { i64, i64 } %14
}
int main() {
  int arg1 = 40;
  int add = 0;
  __asm__("addl $15, %%eax;" : "=a"(add) : "a"(arg1));
  return add;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x28,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0xf,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x28,%eax
add    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 40, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = call i32 asm "addl $$15, %eax;", "={ax},{ax},~{dirflag},~{fpsr},~{flags}"(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 asm "addl $$15, %eax;", "={ax},{ax},~{dirflag},~{fpsr},~{flags}"(i32 40)
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ __m512i;

/* Variables and functions */
int /*<<< orphan*/ _mm512_ror_epi32(int /*<<< orphan*/, int);
__attribute__((always_)) __m512i rot7_512(__m512i x) {
  return _mm512_ror_epi32(x, 7);
}


x86 assembly (clang, -O0):
<rot7_512>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x7,%esi
call   1030 <_mm512_ror_epi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rot7_512>:
mov    $0x7,%esi
jmp    1030 <_mm512_ror_epi32@plt>

LLVM IR (-O0):
define i32 @rot7_512(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm512_ror_epi32(i32 %3, i32 7)
ret i32 %4
}

LLVM IR (-O2):
define i32 @rot7_512(i32 %0) {
%2 = tail call i32 @_mm512_ror_epi32(i32 %0, i32 7)
ret i32 %2
}
void pp_setbit(int *vec, int bit) {
  int byte = bit >> 5;
  int offset = 1 << (bit & 31);
  vec[byte] |= offset;
}


x86 assembly (clang, -O0):
<pp_setbit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x5,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
and    $0x1f,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
or     (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pp_setbit>:
mov    %esi,%ecx
mov    %esi,%eax
sar    $0x5,%eax
mov    $0x1,%edx
shl    %cl,%edx
cltq
or     %edx,(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @pp_setbit(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = ashr i32 %7, 5
store i32 %8, i32* %5
%9 = load i32, i32* %4
%10 = and i32 %9, 31
%11 = shl i32 1, %10
store i32 %11, i32* %6
%12 = load i32, i32* %6
%13 = load i32*, i32** %3
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = or i32 %17, %12
store i32 %18, i32* %16
ret void
}

LLVM IR (-O2):
define void @pp_setbit(i32* nocapture %0, i32 %1) {
%3 = ashr i32 %1, 5
%4 = and i32 %1, 31
%5 = shl nuw i32 1, %4
%6 = sext i32 %3 to i64
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = load i32, i32* %7
%9 = or i32 %8, %5
store i32 %9, i32* %7
ret void
}
const char *PropertyList(void) {
  return "    paved        = Paved (suitable for normal wheels)\n"
         "    multilane    = Multiple lanes\n"
         "    bridge       = Bridge\n"
         "    tunnel       = Tunnel\n"
         "    footroute    = A route marked for foot travel\n"
         "    bicycleroute = A route marked for bicycle travel\n";
}


x86 assembly (clang, -O0):
<PropertyList>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PropertyList>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [244 x i8] c" paved = Paved (suitable for normal wheels)\0A multilane = Multiple lanes\0A bridge = Bridge\0A tunnel = Tunnel\0A footroute = A route marked for foot travel\0A bicycleroute = A route marked for bicycle travel\0A\00"
define i8* @PropertyList() {
ret i8* getelementptr inbounds ([244 x i8], [244 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [244 x i8] c" paved = Paved (suitable for normal wheels)\0A multilane = Multiple lanes\0A bridge = Bridge\0A tunnel = Tunnel\0A footroute = A route marked for foot travel\0A bicycleroute = A route marked for bicycle travel\0A\00"
define i8* @PropertyList() {
ret i8* getelementptr inbounds ([244 x i8], [244 x i8]* @.str, i64 0, i64 0)
}
int check_prime(int num) {
  int j, i;
  i = 2;
  if (num == 2)
    return 1;
  while (i < num) {
    j = num % i;
    if (j == 0)
      return 0;
    i = i + 1;
  }
  return 1;
}


x86 assembly (clang, -O0):
<check_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jne    1124 <check_prime+0x24>
movl   $0x1,-0x4(%rbp)
jmp    116a <check_prime+0x6a>
jmp    1129 <check_prime+0x29>
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1163 <check_prime+0x63>
mov    -0x8(%rbp),%eax
cltd
idivl  -0x10(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1155 <check_prime+0x55>
movl   $0x0,-0x4(%rbp)
jmp    116a <check_prime+0x6a>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1129 <check_prime+0x29>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_prime>:
mov    $0x1,%ecx
cmp    $0x3,%edi
jl     1120 <check_prime+0x20>
mov    $0x2,%esi
nop
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1123 <check_prime+0x23>
add    $0x1,%esi
cmp    %esi,%edi
jne    1110 <check_prime+0x10>
mov    %ecx,%eax
ret
xor    %ecx,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @check_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %5
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 1, i32* %2
br label %25
9: ; preds = %1
br label %10
10: ; preds = %21, %9
%11 = load i32, i32* %5
%12 = load i32, i32* %3
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %24
14: ; preds = %10
%15 = load i32, i32* %3
%16 = load i32, i32* %5
%17 = srem i32 %15, %16
store i32 %17, i32* %4
%18 = load i32, i32* %4
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %14
store i32 0, i32* %2
br label %25
21: ; preds = %14
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %10
24: ; preds = %10
store i32 1, i32* %2
br label %25
25: ; preds = %24, %20, %8
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @check_prime(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %5, label %10
3: ; preds = %5
%4 = icmp eq i32 %9, %0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ 2, %1 ]
%7 = srem i32 %0, %6
%8 = icmp eq i32 %7, 0
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %3
10: ; preds = %5, %3, %1
%11 = phi i32 [ 1, %1 ], [ 0, %5 ], [ 1, %3 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int /*<<< orphan*/ test_case();
int main() {
  int n;
  scanf("%d", &n);
  int first = 1;
  while (n--) {
    if (first)
      first = 0;
    else
      printf("\n");
    test_case();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x8(%rbp)
cmp    $0x0,%eax
je     1198 <main+0x68>
cmpl   $0x0,-0xc(%rbp)
je     1180 <main+0x50>
movl   $0x0,-0xc(%rbp)
jmp    118c <main+0x5c>
lea    0xe7c(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <test_case@plt>
jmp    1156 <main+0x26>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
subl   $0x1,0x4(%rsp)
jae    1150 <main+0x20>
xor    %eax,%eax
pop    %rcx
ret
nopl   (%rax)
xor    %eax,%eax
call   1040 <test_case@plt>
subl   $0x1,0x4(%rsp)
jb     1149 <main+0x19>
mov    $0xa,%edi
call   1030 <putchar@plt>
jmp    1150 <main+0x20>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
store i32 1, i32* %3
br label %5
5: ; preds = %15, %0
%6 = load i32, i32* %2
%7 = add nsw i32 %6, -1
store i32 %7, i32* %2
%8 = icmp ne i32 %6, 0
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = load i32, i32* %3
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 0, i32* %3
br label %15
13: ; preds = %9
%14 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %15
15: ; preds = %13, %12
%16 = call i32 (...) @test_case()
br label %5
17: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = add nsw i32 %4, -1
store i32 %5, i32* %1
%6 = icmp eq i32 %4, 0
br i1 %6, label %18, label %7
7: ; preds = %0
%8 = call i32 (...) @test_case()
%9 = load i32, i32* %1
%10 = add nsw i32 %9, -1
store i32 %10, i32* %1
%11 = icmp eq i32 %9, 0
br i1 %11, label %18, label %12
12: ; preds = %7, %12
%13 = call i32 @putchar(i32 10)
%14 = call i32 (...) @test_case()
%15 = load i32, i32* %1
%16 = add nsw i32 %15, -1
store i32 %16, i32* %1
%17 = icmp eq i32 %15, 0
br i1 %17, label %18, label %12
18: ; preds = %12, %7, %0
ret i32 0
}
/* Type definitions */
struct bwb_line {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ SetOnError(int);
struct bwb_line *bwb_zline(struct bwb_line *);
struct bwb_line *bwb_ON_ERROR_RETURN_NEXT(struct bwb_line *l) {
  SetOnError(-1);
  return bwb_zline(l);
}


x86 assembly (clang, -O0):
<bwb_ON_ERROR_RETURN_NEXT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%edi
call   1040 <SetOnError@plt>
mov    -0x8(%rbp),%rdi
call   1030 <bwb_zline@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bwb_ON_ERROR_RETURN_NEXT>:
push   %rbx
mov    %rdi,%rbx
mov    $0xffffffff,%edi
call   1040 <SetOnError@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <bwb_zline@plt>

LLVM IR (-O0):
%struct.bwb_line = type { i32 }
define %struct.bwb_line* @bwb_ON_ERROR_RETURN_NEXT(%struct.bwb_line* %0) {
%2 = alloca %struct.bwb_line*
store %struct.bwb_line* %0, %struct.bwb_line** %2
%3 = call i32 @SetOnError(i32 -1)
%4 = load %struct.bwb_line*, %struct.bwb_line** %2
%5 = call %struct.bwb_line* @bwb_zline(%struct.bwb_line* %4)
ret %struct.bwb_line* %5
}

LLVM IR (-O2):
%struct.bwb_line = type { i32 }
define %struct.bwb_line* @bwb_ON_ERROR_RETURN_NEXT(%struct.bwb_line* %0) {
%2 = tail call i32 @SetOnError(i32 -1)
%3 = tail call %struct.bwb_line* @bwb_zline(%struct.bwb_line* %0)
ret %struct.bwb_line* %3
}
void foo000(int p) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @foo000(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo000(i32 %0) {
ret void
}
/* Variables and functions */
scalar_t__ gg_loginit();
int report_init(void) {
  if (gg_loginit() < 0)
    return -1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<report_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <gg_loginit@plt>
cmp    $0x0,%rax
jge    1135 <report_init+0x25>
movl   $0xffffffff,-0x4(%rbp)
jmp    113c <report_init+0x2c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<report_init>:
push   %rax
xor    %eax,%eax
call   1030 <gg_loginit@plt>
sar    $0x3f,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @report_init() {
%1 = alloca i32
%2 = call i64 (...) @gg_loginit()
%3 = icmp slt i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 -1, i32* %1
br label %6
5: ; preds = %0
store i32 0, i32* %1
br label %6
6: ; preds = %5, %4
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @report_init() {
%1 = tail call i64 (...) @gg_loginit()
%2 = ashr i64 %1, 63
%3 = trunc i64 %2 to i32
ret i32 %3
}