xunge/DecIR huggingface dataset:
int isPrime(int x) {
  if (x <= 1) {
    return 0;
  }
  for (int i = 2; i * i <= x; i++) {
    if (x % i == 0) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<isPrime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     111d <isPrime+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    116a <isPrime+0x6a>
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1163 <isPrime+0x63>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1150 <isPrime+0x50>
movl   $0x0,-0x4(%rbp)
jmp    116a <isPrime+0x6a>
jmp    1155 <isPrime+0x55>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1124 <isPrime+0x24>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPrime>:
xor    %eax,%eax
cmp    $0x2,%edi
jl     113c <isPrime+0x3c>
mov    $0x1,%eax
cmp    $0x4,%edi
jb     113c <isPrime+0x3c>
mov    $0x2,%ecx
cs nopw 0x0(%rax,%rax,1)
mov    %edi,%eax
cltd
idiv   %ecx
test   %edx,%edx
je     1135 <isPrime+0x35>
add    $0x1,%ecx
mov    %ecx,%eax
imul   %ecx,%eax
cmp    %edi,%eax
jle    1120 <isPrime+0x20>
xor    %eax,%eax
test   %edx,%edx
setne  %al
ret

LLVM IR (-O0):
define i32 @isPrime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp sle i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %26
8: ; preds = %1
store i32 2, i32* %4
br label %9
9: ; preds = %22, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %4
%12 = mul nsw i32 %10, %11
%13 = load i32, i32* %3
%14 = icmp sle i32 %12, %13
br i1 %14, label %15, label %25
15: ; preds = %9
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = srem i32 %16, %17
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %15
store i32 0, i32* %2
br label %26
21: ; preds = %15
br label %22
22: ; preds = %21
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %4
br label %9
25: ; preds = %9
store i32 1, i32* %2
br label %26
26: ; preds = %25, %20, %7
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @isPrime(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %16, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 4
br i1 %4, label %16, label %5
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ 2, %3 ]
%7 = srem i32 %0, %6
%8 = icmp eq i32 %7, 0
%9 = add nuw nsw i32 %6, 1
%10 = mul nsw i32 %9, %9
%11 = icmp sgt i32 %10, %0
%12 = select i1 %8, i1 true, i1 %11
br i1 %12, label %13, label %5
13: ; preds = %5
%14 = xor i1 %8, true
%15 = zext i1 %14 to i32
br label %16
16: ; preds = %3, %13, %1
%17 = phi i32 [ 0, %1 ], [ 1, %3 ], [ %15, %13 ]
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void *print1(void *data) { printf("1 "); }


x86 assembly (clang, -O0):
<print1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print1>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"1 \00"
define i8* @print1(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
@.str = [3 x i8] c"1 \00"
define noalias i8* @print1(i8* nocapture readnone %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i8* undef
}
void smp_unlock_cache(unsigned long flags) {}


x86 assembly (clang, -O0):
<smp_unlock_cache>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_unlock_cache>:
ret

LLVM IR (-O0):
define void @smp_unlock_cache(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @smp_unlock_cache(i64 %0) {
ret void
}
int rtc_init(void) { return 0; }


x86 assembly (clang, -O0):
<rtc_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @rtc_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @rtc_init() {
ret i32 0
}
/* Type definitions */
struct t_hashtable {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(void *);
void hdata_free_list(struct t_hashtable *hashtable, const void *key,
                     void *value) {
  (void)hashtable;
  (void)key;
  free(value);
}


x86 assembly (clang, -O0):
<hdata_free_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdata_free_list>:
mov    %rdx,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.t_hashtable = type { i32 }
define void @hdata_free_list(%struct.t_hashtable* %0, i8* %1, i8* %2) {
%4 = alloca %struct.t_hashtable*
%5 = alloca i8*
%6 = alloca i8*
store %struct.t_hashtable* %0, %struct.t_hashtable** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load %struct.t_hashtable*, %struct.t_hashtable** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @free(i8* %9)
ret void
}

LLVM IR (-O2):
%struct.t_hashtable = type { i32 }
define void @hdata_free_list(%struct.t_hashtable* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture %2) {
%4 = tail call i32 @free(i8* %2)
ret void
}
/* Variables and functions */
int inp_emulate(int);
char TOSH_READ_FLASH_OUT_PIN() { return 0x01 & (inp_emulate(0x35) >> 7); }


x86 assembly (clang, -O0):
<TOSH_READ_FLASH_OUT_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x35,%edi
call   1030 <inp_emulate@plt>
sar    $0x7,%eax
and    $0x1,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_READ_FLASH_OUT_PIN>:
push   %rax
mov    $0x35,%edi
call   1030 <inp_emulate@plt>
shr    $0x7,%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @TOSH_READ_FLASH_OUT_PIN() {
%1 = call i32 @inp_emulate(i32 53)
%2 = ashr i32 %1, 7
%3 = and i32 1, %2
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define signext i8 @TOSH_READ_FLASH_OUT_PIN() {
%1 = tail call i32 @inp_emulate(i32 53)
%2 = trunc i32 %1 to i8
%3 = lshr i8 %2, 7
ret i8 %3
}
/* Variables and functions */
scalar_t__ galloc(int);
char *xalloc(int nb) { return (char *)galloc(nb); }


x86 assembly (clang, -O0):
<xalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <galloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xalloc>:
jmp    1030 <galloc@plt>

LLVM IR (-O0):
define i8* @xalloc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @galloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}

LLVM IR (-O2):
define i8* @xalloc(i32 %0) {
%2 = tail call i64 @galloc(i32 %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
/* Type definitions */
typedef int uint64_t;
typedef int int_fast8_t;

/* Variables and functions */
int softfloat_countLeadingZeros64(int);
int softfloat_normExtF80SigM(uint64_t *sigPtr) {
  uint64_t sig;
  int_fast8_t shiftCount;
  sig = *sigPtr;
  shiftCount = softfloat_countLeadingZeros64(sig);
  *sigPtr = sig << shiftCount;
  return -shiftCount;
}


x86 assembly (clang, -O0):
<softfloat_normExtF80SigM>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <softfloat_countLeadingZeros64@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ecx
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
sub    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softfloat_normExtF80SigM>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    (%rdi),%ebp
mov    %ebp,%edi
call   1030 <softfloat_countLeadingZeros64@plt>
mov    %eax,%ecx
shl    %cl,%ebp
mov    %ebp,(%rbx)
neg    %eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @softfloat_normExtF80SigM(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @softfloat_countLeadingZeros64(i32 %7)
store i32 %8, i32* %4
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = shl i32 %9, %10
%12 = load i32*, i32** %2
store i32 %11, i32* %12
%13 = load i32, i32* %4
%14 = sub nsw i32 0, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @softfloat_normExtF80SigM(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @softfloat_countLeadingZeros64(i32 %2)
%4 = shl i32 %2, %3
store i32 %4, i32* %0
%5 = sub nsw i32 0, %3
ret i32 %5
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
long long spectonsec(struct timespec *);
long long spectousec(struct timespec *ts) {
  long long usecs = spectonsec(ts);
  return usecs < 0 ? usecs : usecs / 1000LL;
}


x86 assembly (clang, -O0):
<spectousec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <spectonsec@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jge    1141 <spectousec+0x31>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1153 <spectousec+0x43>
mov    -0x10(%rbp),%rax
mov    $0x3e8,%ecx
cqto
idiv   %rcx
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spectousec>:
push   %rax
call   1030 <spectonsec@plt>
test   %rax,%rax
js     1139 <spectousec+0x29>
movabs $0x20c49ba5e353f7cf,%rcx
9b c4 20
imul   %rcx
mov    %rdx,%rax
mov    %rdx,%rcx
shr    $0x3f,%rcx
sar    $0x7,%rax
add    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i64 @spectousec(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
%3 = alloca i64
store %struct.timespec* %0, %struct.timespec** %2
%4 = load %struct.timespec*, %struct.timespec** %2
%5 = call i64 @spectonsec(%struct.timespec* %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i64, i64* %3
br label %13
10: ; preds = %1
%11 = load i64, i64* %3
%12 = sdiv i64 %11, 1000
br label %13
13: ; preds = %10, %8
%14 = phi i64 [ %9, %8 ], [ %12, %10 ]
ret i64 %14
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define i64 @spectousec(%struct.timespec* %0) {
%2 = tail call i64 @spectonsec(%struct.timespec* %0)
%3 = icmp slt i64 %2, 0
%4 = sdiv i64 %2, 1000
%5 = select i1 %3, i64 %2, i64 %4
ret i64 %5
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ display;
};
struct TYPE_4__ {
  TYPE_1__ xfocus;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void *get_XEvent_xfocus_display(void *_p) {
  return (void *)((XEvent *)_p)->xfocus.display;
}


x86 assembly (clang, -O0):
<get_XEvent_xfocus_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XEvent_xfocus_display>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define i8* @get_XEvent_xfocus_display(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}

LLVM IR (-O2):
define i8* @get_XEvent_xfocus_display(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int checkMem(void *p) {
  if (p == (void *)0) {
    fprintf(stderr, "Out of memory");
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<checkMem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1148 <checkMem+0x38>
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
lea    0xec9(%rip),%rsi
call   1030 <fprintf@plt>
movl   $0x0,-0x4(%rbp)
jmp    114f <checkMem+0x3f>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkMem>:
mov    $0x1,%eax
test   %rdi,%rdi
je     111b <checkMem+0xb>
ret
push   %rax
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
lea    0xed4(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [14 x i8] c"Out of memory\00"
define i32 @checkMem(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* @stderr
%8 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %2
br label %10
9: ; preds = %1
store i32 1, i32* %2
br label %10
10: ; preds = %9, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [14 x i8] c"Out of memory\00"
define i32 @checkMem(i8* readnone %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %1, %3
%7 = phi i32 [ 0, %3 ], [ 1, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ asserter_crash_if(int, int);
void asserter_crash_if_not_equal(int lvalue, int rvalue, int return_code) {
  asserter_crash_if(lvalue != rvalue, return_code);
}


x86 assembly (clang, -O0):
<asserter_crash_if_not_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%edi
mov    -0xc(%rbp),%esi
call   1030 <asserter_crash_if@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asserter_crash_if_not_equal>:
xor    %eax,%eax
cmp    %esi,%edi
setne  %al
mov    %eax,%edi
mov    %edx,%esi
jmp    1030 <asserter_crash_if@plt>

LLVM IR (-O0):
define void @asserter_crash_if_not_equal(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp ne i32 %7, %8
%10 = zext i1 %9 to i32
%11 = load i32, i32* %6
%12 = call i32 @asserter_crash_if(i32 %10, i32 %11)
ret void
}

LLVM IR (-O2):
define void @asserter_crash_if_not_equal(i32 %0, i32 %1, i32 %2) {
%4 = icmp ne i32 %0, %1
%5 = zext i1 %4 to i32
%6 = tail call i32 @asserter_crash_if(i32 %5, i32 %2)
ret void
}
int ft_isalpha(int c) {
  if ((c >= 97 && c <= 122) || (c >= 65 && c <= 90))
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isalpha>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x61,-0x8(%rbp)
jl     111b <ft_isalpha+0x1b>
cmpl   $0x7a,-0x8(%rbp)
jle    112f <ft_isalpha+0x2f>
cmpl   $0x41,-0x8(%rbp)
jl     113b <ft_isalpha+0x3b>
cmpl   $0x5a,-0x8(%rbp)
jg     113b <ft_isalpha+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1142 <ft_isalpha+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalpha>:
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isalpha(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 122
br i1 %8, label %15, label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 65
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp sle i32 %13, 90
br i1 %14, label %15, label %16
15: ; preds = %12, %6
store i32 1, i32* %2
br label %17
16: ; preds = %12, %9
store i32 0, i32* %2
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @ft_isalpha(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x07() {
  Assert_real((isodigit(7) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              40, ("isodigit should be 0 for 0x07"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x07>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x28,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x07>:
push   %rax
mov    $0x7,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x28,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x07\00"
define void @t_isodigit_0x07() {
%1 = call i64 @isodigit(i32 7)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 40, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x07\00"
define void @t_isodigit_0x07() {
%1 = tail call i64 @isodigit(i32 7)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 40, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void picolcd_exit_lcd(struct picolcd_data *data) {}


x86 assembly (clang, -O0):
<picolcd_exit_lcd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<picolcd_exit_lcd>:
ret

LLVM IR (-O0):
%struct.picolcd_data = type opaque
define void @picolcd_exit_lcd(%struct.picolcd_data* %0) {
%2 = alloca %struct.picolcd_data*
store %struct.picolcd_data* %0, %struct.picolcd_data** %2
ret void
}

LLVM IR (-O2):
%struct.picolcd_data = type opaque
define void @picolcd_exit_lcd(%struct.picolcd_data* nocapture %0) {
ret void
}
void hw_sleep_power_off(void) {}


x86 assembly (clang, -O0):
<hw_sleep_power_off>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hw_sleep_power_off>:
ret

LLVM IR (-O0):
define void @hw_sleep_power_off() {
ret void
}

LLVM IR (-O2):
define void @hw_sleep_power_off() {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, int, int);
void fprint_mov_data_to_direct(FILE *stream, uint8_t direct, uint8_t data) {
  fprintf(stream,
          "MOV   "
          "0x%02X"
          ", #"
          "0x%02X"
          "               ",
          direct, data);
}


x86 assembly (clang, -O0):
<fprint_mov_data_to_direct>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
lea    0xecd(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprint_mov_data_to_direct>:
mov    %edx,%ecx
mov    %esi,%edx
lea    0xee5(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"MOV 0x%02X,x%02X \00"
define void @fprint_mov_data_to_direct(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @fprintf(i32* %7, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [37 x i8] c"MOV 0x%02X,x%02X \00"
define void @fprint_mov_data_to_direct(i32* nocapture %0, i32 %1, i32 %2) {
%4 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %2)
ret void
}
/* Type definitions */
struct _citrus_lookup {
  int dummy;
};

/* Variables and functions */
scalar_t__ seq_next_plain(struct _citrus_lookup *, int /*<<< orphan*/ *,
                          int /*<<< orphan*/ *);
int seq_get_num_entries_plain(struct _citrus_lookup *cl) {
  int num;
  num = 0;
  while (seq_next_plain(cl, NULL, NULL) == 0)
    num++;
  return (num);
}


x86 assembly (clang, -O0):
<seq_get_num_entries_plain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%edx
mov    %rdx,%rsi
call   1030 <seq_next_plain@plt>
cmp    $0x0,%rax
jne    114b <seq_get_num_entries_plain+0x3b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <seq_get_num_entries_plain+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seq_get_num_entries_plain>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0xffffffff,%ebx
nopl   0x0(%rax)
mov    %r14,%rdi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <seq_next_plain@plt>
add    $0x1,%ebx
test   %rax,%rax
je     1120 <seq_get_num_entries_plain+0x10>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct._citrus_lookup = type { i32 }
define i32 @seq_get_num_entries_plain(%struct._citrus_lookup* %0) {
%2 = alloca %struct._citrus_lookup*
%3 = alloca i32
store %struct._citrus_lookup* %0, %struct._citrus_lookup** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load %struct._citrus_lookup*, %struct._citrus_lookup** %2
%6 = call i64 @seq_next_plain(%struct._citrus_lookup* %5, i32* null, i32* null)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
%struct._citrus_lookup = type { i32 }
define i32 @seq_get_num_entries_plain(%struct._citrus_lookup* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %6, %2 ]
%4 = tail call i64 @seq_next_plain(%struct._citrus_lookup* %0, i32* null, i32* null)
%5 = icmp eq i64 %4, 0
%6 = add nuw nsw i32 %3, 1
br i1 %5, label %2, label %7
7: ; preds = %2
ret i32 %3
}
/* Variables and functions */
scalar_t__ forward_char();
scalar_t__ intercalate_newline();
int insert_newline(void) { return intercalate_newline() && forward_char(); }


x86 assembly (clang, -O0):
<insert_newline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <intercalate_newline@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x1(%rbp)
je     1152 <insert_newline+0x32>
mov    $0x0,%al
call   1040 <forward_char@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert_newline>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <intercalate_newline@plt>
test   %rax,%rax
je     113e <insert_newline+0x1e>
xor    %eax,%eax
call   1040 <forward_char@plt>
xor    %ebx,%ebx
test   %rax,%rax
setne  %bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @insert_newline() {
%1 = call i64 (...) @intercalate_newline()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = call i64 (...) @forward_char()
%5 = icmp ne i64 %4, 0
br label %6
6: ; preds = %3, %0
%7 = phi i1 [ false, %0 ], [ %5, %3 ]
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @insert_newline() {
%1 = tail call i64 (...) @intercalate_newline()
%2 = icmp eq i64 %1, 0
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = tail call i64 (...) @forward_char()
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 0, %0 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ spi_read16(int, unsigned char *);
int /*<<< orphan*/ spi_write16(int, int);
void MCP23s17_ReadGPIO_B(unsigned char *data) {
  spi_write16((0x01), 0xFF);
  spi_read16((0x13), data);
}


x86 assembly (clang, -O0):
<MCP23s17_ReadGPIO_B>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%edi
mov    $0xff,%esi
call   1040 <spi_write16@plt>
mov    -0x8(%rbp),%rsi
mov    $0x13,%edi
call   1030 <spi_read16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MCP23s17_ReadGPIO_B>:
push   %rbx
mov    %rdi,%rbx
mov    $0x1,%edi
mov    $0xff,%esi
call   1040 <spi_write16@plt>
mov    $0x13,%edi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <spi_read16@plt>

LLVM IR (-O0):
define void @MCP23s17_ReadGPIO_B(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @spi_write16(i32 1, i32 255)
%4 = load i8*, i8** %2
%5 = call i32 @spi_read16(i32 19, i8* %4)
ret void
}

LLVM IR (-O2):
define void @MCP23s17_ReadGPIO_B(i8* %0) {
%2 = tail call i32 @spi_write16(i32 1, i32 255)
%3 = tail call i32 @spi_read16(i32 19, i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ scanf(char *, char *);
int get_confirmation() {
  char u_answer;
  char *question = "Are you sure? [y|Y]:";
  printf("%s", question);
  scanf("%c", &u_answer);
  if (u_answer == 'y' || u_answer == 'Y') {
    return 0;
  } else {
    return 6;
  }
}


x86 assembly (clang, -O0):
<get_confirmation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
lea    0xece(%rip),%rdi
lea    -0x5(%rbp),%rsi
call   1040 <scanf@plt>
movsbl -0x5(%rbp),%eax
cmp    $0x79,%eax
je     116d <get_confirmation+0x4d>
movsbl -0x5(%rbp),%eax
cmp    $0x59,%eax
jne    1179 <get_confirmation+0x59>
movl   $0x0,-0x4(%rbp)
jmp    1180 <get_confirmation+0x60>
movl   $0x6,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_confirmation>:
push   %rax
lea    0xeed(%rip),%rdi
lea    0xed1(%rip),%rsi
call   1030 <printf@plt>
lea    0xedd(%rip),%rdi
lea    0x7(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x7(%rsp),%al
and    $0xdf,%al
xor    %ecx,%ecx
cmp    $0x59,%al
mov    $0x6,%eax
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"Are you sure? [y|Y]:\00"
@.str.1 = [3 x i8] c"%s\00"
@.str.2 = [3 x i8] c"%c\00"
define i32 @get_confirmation() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8*
store i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8* %2)
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 121
br i1 %9, label %14, label %10
10: ; preds = %0
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 89
br i1 %13, label %14, label %15
14: ; preds = %10, %0
store i32 0, i32* %1
br label %16
15: ; preds = %10
store i32 6, i32* %1
br label %16
16: ; preds = %15, %14
%17 = load i32, i32* %1
ret i32 %17
}

LLVM IR (-O2):
@.str = [21 x i8] c"Are you sure? [y|Y]:\00"
@.str.1 = [3 x i8] c"%s\00"
@.str.2 = [3 x i8] c"%c\00"
define i32 @get_confirmation() {
%1 = alloca i8
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8* %1)
%4 = load i8, i8* %1
%5 = and i8 %4, -33
%6 = icmp eq i8 %5, 89
%7 = select i1 %6, i32 0, i32 6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ send_bytes(char **, char const *, int);
int /*<<< orphan*/ send_int(char **, int);
scalar_t__ strlen(char const *);
void send_str(char **pp, const char *s) {
  int len;
  len = s ? (int)strlen(s) : 0;
  send_int(pp, len);
  send_bytes(pp, s, len);
}


x86 assembly (clang, -O0):
<send_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115c <send_str+0x2c>
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x18(%rbp)
jmp    1166 <send_str+0x36>
xor    %eax,%eax
mov    %eax,-0x18(%rbp)
jmp    1166 <send_str+0x36>
mov    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <send_int@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1050 <send_bytes@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_str>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
test   %rsi,%rsi
je     114d <send_str+0x1d>
mov    %r15,%rdi
call   1030 <strlen@plt>
mov    %rax,%rbx
jmp    114f <send_str+0x1f>
xor    %ebx,%ebx
mov    %r14,%rdi
mov    %ebx,%esi
call   1040 <send_int@plt>
mov    %r14,%rdi
mov    %r15,%rsi
mov    %ebx,%edx
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <send_bytes@plt>

LLVM IR (-O0):
define void @send_str(i8** %0, i8* %1) {
%3 = alloca i8**
%4 = alloca i8*
%5 = alloca i32
store i8** %0, i8*** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i8*, i8** %4
%10 = call i64 @strlen(i8* %9)
%11 = trunc i64 %10 to i32
br label %13
12: ; preds = %2
br label %13
13: ; preds = %12, %8
%14 = phi i32 [ %11, %8 ], [ 0, %12 ]
store i32 %14, i32* %5
%15 = load i8**, i8*** %3
%16 = load i32, i32* %5
%17 = call i32 @send_int(i8** %15, i32 %16)
%18 = load i8**, i8*** %3
%19 = load i8*, i8** %4
%20 = load i32, i32* %5
%21 = call i32 @send_bytes(i8** %18, i8* %19, i32 %20)
ret void
}

LLVM IR (-O2):
define void @send_str(i8** %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i64 @strlen(i8* %1)
%6 = trunc i64 %5 to i32
br label %7
7: ; preds = %2, %4
%8 = phi i32 [ %6, %4 ], [ 0, %2 ]
%9 = tail call i32 @send_int(i8** %0, i32 %8)
%10 = tail call i32 @send_bytes(i8** %0, i8* %1, i32 %8)
ret void
}
/* Variables and functions */
int int_pow(int, int);
int geometric_series(int width, int depth) {
  return (1 - (int_pow(width, (depth + 1)))) / (1 - width);
}


x86 assembly (clang, -O0):
<geometric_series>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
add    $0x1,%esi
call   1030 <int_pow@plt>
mov    %eax,%ecx
mov    $0x1,%eax
sub    %ecx,%eax
mov    $0x1,%ecx
sub    -0x4(%rbp),%ecx
cltd
idiv   %ecx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<geometric_series>:
push   %rbx
mov    %edi,%ebx
add    $0x1,%esi
call   1030 <int_pow@plt>
mov    $0x1,%esi
mov    $0x1,%ecx
sub    %eax,%ecx
sub    %ebx,%esi
mov    %ecx,%eax
cltd
idiv   %esi
pop    %rbx
ret

LLVM IR (-O0):
define i32 @geometric_series(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = call i32 @int_pow(i32 %5, i32 %7)
%9 = sub nsw i32 1, %8
%10 = load i32, i32* %3
%11 = sub nsw i32 1, %10
%12 = sdiv i32 %9, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @geometric_series(i32 %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = tail call i32 @int_pow(i32 %0, i32 %3)
%5 = sub nsw i32 1, %4
%6 = sub nsw i32 1, %0
%7 = sdiv i32 %5, %6
ret i32 %7
}
/* Variables and functions */
void *valloc(size_t);
void *objc_valloc(size_t size) { return valloc(size); }


x86 assembly (clang, -O0):
<objc_valloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <valloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<objc_valloc>:
jmp    1030 <valloc@plt>

LLVM IR (-O0):
define i8* @objc_valloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @valloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @objc_valloc(i64 %0) {
%2 = tail call i8* @valloc(i64 %0)
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ set_warn_handler(void *);
int /*<<< orphan*/ warn_obj_line_v(char const *, int, char const *,
                                   int /*<<< orphan*/);
void die_obj_line_v(const char *obj, int line, const char *p, va_list args) {
  set_warn_handler(((void *)0));
  warn_obj_line_v(obj, line, p, args);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<die_obj_line_v>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <set_warn_handler@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <warn_obj_line_v@plt>
mov    0x2e77(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<die_obj_line_v>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %rdx,%r15
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %edi,%edi
call   1040 <set_warn_handler@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r15,%rdx
mov    %r14d,%ecx
call   1030 <warn_obj_line_v@plt>
mov    0x2e80(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define void @die_obj_line_v(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = call i32 @set_warn_handler(i8* null)
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = load i8*, i8** %7
%13 = load i32, i32* %8
%14 = call i32 @warn_obj_line_v(i8* %10, i32 %11, i8* %12, i32 %13)
%15 = load i32, i32* @EXIT_FAILURE
%16 = call i32 @exit(i32 %15)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define void @die_obj_line_v(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = tail call i32 @set_warn_handler(i8* null)
%6 = tail call i32 @warn_obj_line_v(i8* %0, i32 %1, i8* %2, i32 %3)
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
}
/* Type definitions */
struct conn_sslcon {
  int dummy;
};

/* Variables and functions */
int tcpconHandleBnlTransfer(struct conn_sslcon *, int);
int tcpconHandleBnlpull(struct conn_sslcon *con) {
  return tcpconHandleBnlTransfer(con, 1);
}


x86 assembly (clang, -O0):
<tcpconHandleBnlpull>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <tcpconHandleBnlTransfer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcpconHandleBnlpull>:
mov    $0x1,%esi
jmp    1030 <tcpconHandleBnlTransfer@plt>

LLVM IR (-O0):
%struct.conn_sslcon = type { i32 }
define i32 @tcpconHandleBnlpull(%struct.conn_sslcon* %0) {
%2 = alloca %struct.conn_sslcon*
store %struct.conn_sslcon* %0, %struct.conn_sslcon** %2
%3 = load %struct.conn_sslcon*, %struct.conn_sslcon** %2
%4 = call i32 @tcpconHandleBnlTransfer(%struct.conn_sslcon* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
%struct.conn_sslcon = type { i32 }
define i32 @tcpconHandleBnlpull(%struct.conn_sslcon* %0) {
%2 = tail call i32 @tcpconHandleBnlTransfer(%struct.conn_sslcon* %0, i32 1)
ret i32 %2
}
double dge(double x, double y) { return ((double)(x >= y)); }


x86 assembly (clang, -O0):
<dge>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
cvtsi2sd %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dge>:
cmplesd %xmm0,%xmm1
movsd  0xef3(%rip),%xmm0
andpd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dge(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp oge double %5, %6
%8 = zext i1 %7 to i32
%9 = sitofp i32 %8 to double
ret double %9
}

LLVM IR (-O2):
define double @dge(double %0, double %1) {
%3 = fcmp oge double %0, %1
%4 = uitofp i1 %3 to double
ret double %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t swapc(uint32_t x, int c) {
  return c ? x >> 24 | ((x >> 8) & 0xff00) | ((x << 8) & 0xff0000) | x << 24
           : x;
}


x86 assembly (clang, -O0):
<swapc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1146 <swapc+0x46>
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff00,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x8,%ecx
and    $0xff0000,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    114c <swapc+0x4c>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapc>:
mov    %edi,%eax
test   %esi,%esi
je     112a <swapc+0x2a>
mov    %eax,%ecx
sar    $0x18,%ecx
mov    %eax,%edx
shr    $0x8,%edx
and    $0xff00,%edx
mov    %eax,%esi
shl    $0x8,%esi
and    $0xff0000,%esi
shl    $0x18,%eax
or     %ecx,%eax
or     %edx,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @swapc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %21
7: ; preds = %2
%8 = load i32, i32* %3
%9 = ashr i32 %8, 24
%10 = load i32, i32* %3
%11 = ashr i32 %10, 8
%12 = and i32 %11, 65280
%13 = or i32 %9, %12
%14 = load i32, i32* %3
%15 = shl i32 %14, 8
%16 = and i32 %15, 16711680
%17 = or i32 %13, %16
%18 = load i32, i32* %3
%19 = shl i32 %18, 24
%20 = or i32 %17, %19
br label %23
21: ; preds = %2
%22 = load i32, i32* %3
br label %23
23: ; preds = %21, %7
%24 = phi i32 [ %20, %7 ], [ %22, %21 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @swapc(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %14, label %4
4: ; preds = %2
%5 = ashr i32 %0, 24
%6 = lshr i32 %0, 8
%7 = and i32 %6, 65280
%8 = shl i32 %0, 8
%9 = and i32 %8, 16711680
%10 = shl i32 %0, 24
%11 = or i32 %10, %5
%12 = or i32 %11, %7
%13 = or i32 %12, %9
br label %14
14: ; preds = %2, %4
%15 = phi i32 [ %13, %4 ], [ %0, %2 ]
ret i32 %15
}
/* Variables and functions */
char *init_dvb_string(int, char *);
char *init_dvb_string_iso_8859_5(char *text) {
  return init_dvb_string(0x01, text);
}


x86 assembly (clang, -O0):
<init_dvb_string_iso_8859_5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <init_dvb_string@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_dvb_string_iso_8859_5>:
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <init_dvb_string@plt>

LLVM IR (-O0):
define i8* @init_dvb_string_iso_8859_5(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @init_dvb_string(i32 1, i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @init_dvb_string_iso_8859_5(i8* %0) {
%2 = tail call i8* @init_dvb_string(i32 1, i8* %0)
ret i8* %2
}
signed long long util_saturate_n_no_state(signed long long t, int n) {
  signed long long maxv, minv;
  maxv = (1LL << (n - 1)) - 1;
  minv = (-1LL << (n - 1));
  if (t > maxv) {
    t = maxv;
  } else if (t < minv) {
    t = minv;
  }
  return t;
}


x86 assembly (clang, -O0):
<util_saturate_n_no_state>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
sub    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    $0xffffffffffffffff,%rax
shl    %cl,%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x18(%rbp),%rax
jle    1158 <util_saturate_n_no_state+0x58>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1173 <util_saturate_n_no_state+0x73>
mov    -0x8(%rbp),%rax
cmp    -0x20(%rbp),%rax
jge    116e <util_saturate_n_no_state+0x6e>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1173 <util_saturate_n_no_state+0x73>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_saturate_n_no_state>:
lea    -0x1(%rsi),%ecx
mov    $0xffffffffffffffff,%rax
shl    %cl,%rax
mov    %rax,%rcx
cmp    %rdi,%rax
cmovle %rdi,%rax
not    %rcx
cmp    %rdi,%rcx
cmovl  %rcx,%rax
ret

LLVM IR (-O0):
define i64 @util_saturate_n_no_state(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
%9 = zext i32 %8 to i64
%10 = shl i64 1, %9
%11 = sub nsw i64 %10, 1
store i64 %11, i64* %5
%12 = load i32, i32* %4
%13 = sub nsw i32 %12, 1
%14 = zext i32 %13 to i64
%15 = shl i64 -1, %14
store i64 %15, i64* %6
%16 = load i64, i64* %3
%17 = load i64, i64* %5
%18 = icmp sgt i64 %16, %17
br i1 %18, label %19, label %21
19: ; preds = %2
%20 = load i64, i64* %5
store i64 %20, i64* %3
br label %28
21: ; preds = %2
%22 = load i64, i64* %3
%23 = load i64, i64* %6
%24 = icmp slt i64 %22, %23
br i1 %24, label %25, label %27
25: ; preds = %21
%26 = load i64, i64* %6
store i64 %26, i64* %3
br label %27
27: ; preds = %25, %21
br label %28
28: ; preds = %27, %19
%29 = load i64, i64* %3
ret i64 %29
}

LLVM IR (-O2):
define i64 @util_saturate_n_no_state(i64 %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = zext i32 %3 to i64
%5 = shl nsw i64 -1, %4
%6 = xor i64 %5, -1
%7 = icmp slt i64 %6, %0
%8 = icmp sgt i64 %5, %0
%9 = select i1 %8, i64 %5, i64 %0
%10 = select i1 %7, i64 %6, i64 %9
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ bar1();
int /*<<< orphan*/ bar2();
void foo3(void) {
#pragma omp target teams
  {
#pragma omp parallel
    {}
    bar1();
    bar2();
#pragma omp parallel
    {}
    bar1();
    bar2();
  }
}


x86 assembly (clang, -O0):
<foo3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <bar1@plt>
mov    $0x0,%al
call   1030 <bar2@plt>
mov    $0x0,%al
call   1040 <bar1@plt>
mov    $0x0,%al
call   1030 <bar2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo3>:
push   %rax
xor    %eax,%eax
call   1040 <bar1@plt>
xor    %eax,%eax
call   1030 <bar2@plt>
xor    %eax,%eax
call   1040 <bar1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <bar2@plt>

LLVM IR (-O0):
define void @foo3() {
%1 = call i32 (...) @bar1()
%2 = call i32 (...) @bar2()
%3 = call i32 (...) @bar1()
%4 = call i32 (...) @bar2()
ret void
}

LLVM IR (-O2):
define void @foo3() {
%1 = tail call i32 (...) @bar1()
%2 = tail call i32 (...) @bar2()
%3 = tail call i32 (...) @bar1()
%4 = tail call i32 (...) @bar2()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("TEST\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"TEST\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [5 x i8] c"TEST\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ CG_CenterPrint(int /*<<< orphan*/);
int /*<<< orphan*/ trap_Cmd_Argv(int);
void CG_SC_CenterPrint(void) { CG_CenterPrint(trap_Cmd_Argv(1)); }


x86 assembly (clang, -O0):
<CG_SC_CenterPrint>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <trap_Cmd_Argv@plt>
mov    %eax,%edi
call   1030 <CG_CenterPrint@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_SC_CenterPrint>:
push   %rax
mov    $0x1,%edi
call   1040 <trap_Cmd_Argv@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <CG_CenterPrint@plt>

LLVM IR (-O0):
define void @CG_SC_CenterPrint() {
%1 = call i32 @trap_Cmd_Argv(i32 1)
%2 = call i32 @CG_CenterPrint(i32 %1)
ret void
}

LLVM IR (-O2):
define void @CG_SC_CenterPrint() {
%1 = tail call i32 @trap_Cmd_Argv(i32 1)
%2 = tail call i32 @CG_CenterPrint(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ servoSetHigh(int);
void servoHighDrop() { servoSetHigh((160)); }


x86 assembly (clang, -O0):
<servoHighDrop>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa0,%edi
call   1030 <servoSetHigh@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<servoHighDrop>:
mov    $0xa0,%edi
jmp    1030 <servoSetHigh@plt>

LLVM IR (-O0):
define void @servoHighDrop() {
%1 = call i32 @servoSetHigh(i32 160)
ret void
}

LLVM IR (-O2):
define void @servoHighDrop() {
%1 = tail call i32 @servoSetHigh(i32 160)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ findFirstNonRepeatedChar(char *);
int /*<<< orphan*/ findRepeatedChar2(char *);
int main(int argc, char *argv[]) {
  char *str = "acba";
  findRepeatedChar2(str);
  findFirstNonRepeatedChar(str);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <findRepeatedChar2@plt>
mov    -0x18(%rbp),%rdi
call   1030 <findFirstNonRepeatedChar@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xed8(%rip),%rbx
mov    %rbx,%rdi
call   1040 <findRepeatedChar2@plt>
mov    %rbx,%rdi
call   1030 <findFirstNonRepeatedChar@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"acba\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i8*
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %5
%6 = load i8*, i8** %5
%7 = call i32 @findRepeatedChar2(i8* %6)
%8 = load i8*, i8** %5
%9 = call i32 @findFirstNonRepeatedChar(i8* %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"acba\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @findRepeatedChar2(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @findFirstNonRepeatedChar(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
long random();
long int mrand48(void) { return random(); }


x86 assembly (clang, -O0):
<mrand48>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <random@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mrand48>:
xor    %eax,%eax
jmp    1030 <random@plt>

LLVM IR (-O0):
define i64 @mrand48() {
%1 = call i64 (...) @random()
ret i64 %1
}

LLVM IR (-O2):
define i64 @mrand48() {
%1 = tail call i64 (...) @random()
ret i64 %1
}
int security_swapoff(struct swap_info_struct *swap) { return 0; }


x86 assembly (clang, -O0):
<security_swapoff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_swapoff>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.swap_info_struct = type opaque
define i32 @security_swapoff(%struct.swap_info_struct* %0) {
%2 = alloca %struct.swap_info_struct*
store %struct.swap_info_struct* %0, %struct.swap_info_struct** %2
ret i32 0
}

LLVM IR (-O2):
%struct.swap_info_struct = type opaque
define i32 @security_swapoff(%struct.swap_info_struct* nocapture readnone %0) {
ret i32 0
}