#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef scalar_t__ addr;

/* Variables and functions */
scalar_t__ efuse_reg_addr(int);
int /*<<< orphan*/ udelay(int);
void __efuse_read_dword(unsigned long addr, unsigned long *data) {
  (*((volatile unsigned *)efuse_reg_addr((0x2159 << 2))) =
       ((*((volatile unsigned *)efuse_reg_addr((0x2159 << 2)))) &
        ~(((1L << (10)) - 1) << (0))) |
       ((unsigned)((addr) & ((1L << (10)) - 1)) << (0)));
  (*((volatile unsigned *)efuse_reg_addr((0x2159 << 2))) =
       ((*((volatile unsigned *)efuse_reg_addr((0x2159 << 2)))) &
        ~(((1L << (1)) - 1) << (11))) |
       ((unsigned)((1) & ((1L << (1)) - 1)) << (11)));
  (*((volatile unsigned *)efuse_reg_addr((0x2159 << 2))) =
       ((*((volatile unsigned *)efuse_reg_addr((0x2159 << 2)))) &
        ~(((1L << (1)) - 1) << (11))) |
       ((unsigned)((0) & ((1L << (1)) - 1)) << (11)));
  (*((volatile unsigned *)efuse_reg_addr((0x2159 << 2))) =
       ((*((volatile unsigned *)efuse_reg_addr((0x2159 << 2)))) &
        ~(((1L << (1)) - 1) << (25))) |
       ((unsigned)((1) & ((1L << (1)) - 1)) << (25)));
  (*((volatile unsigned *)efuse_reg_addr((0x2159 << 2))) =
       ((*((volatile unsigned *)efuse_reg_addr((0x2159 << 2)))) &
        ~(((1L << (1)) - 1) << (25))) |
       ((unsigned)((0) & ((1L << (1)) - 1)) << (25)));
  (*((volatile unsigned *)efuse_reg_addr((0x2159 << 2))));
  while ((*((volatile unsigned *)efuse_reg_addr((0x2159 << 2)))) & (1 << 26)) {
    udelay(1);
  }
  (*data) = (*((volatile unsigned *)efuse_reg_addr((0x215a << 2))));
}


x86 assembly (clang, -O0):
<__efuse_read_dword>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    (%rax),%eax
mov    %eax,%eax
and    $0xfffffffffffffc00,%rax
mov    -0x8(%rbp),%rcx
and    $0x3ff,%rcx
shl    $0x0,%ecx
mov    %ecx,%ecx
or     %rcx,%rax
mov    %eax,-0x24(%rbp)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    -0x24(%rbp),%ecx
mov    %ecx,(%rax)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    (%rax),%eax
mov    %eax,%eax
and    $0xfffffffffffff7ff,%rax
or     $0x800,%rax
mov    %eax,-0x20(%rbp)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    -0x20(%rbp),%ecx
mov    %ecx,(%rax)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    (%rax),%eax
mov    %eax,%eax
and    $0xfffffffffffff7ff,%rax
or     $0x0,%rax
mov    %eax,-0x1c(%rbp)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    -0x1c(%rbp),%ecx
mov    %ecx,(%rax)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    (%rax),%eax
mov    %eax,%eax
and    $0xfffffffffdffffff,%rax
or     $0x2000000,%rax
mov    %eax,-0x18(%rbp)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    -0x18(%rbp),%ecx
mov    %ecx,(%rax)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    (%rax),%eax
mov    %eax,%eax
and    $0xfffffffffdffffff,%rax
or     $0x0,%rax
mov    %eax,-0x14(%rbp)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    -0x14(%rbp),%ecx
mov    %ecx,(%rax)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    (%rax),%eax
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    (%rax),%eax
and    $0x4000000,%eax
cmp    $0x0,%eax
je     124a <__efuse_read_dword+0x12a>
mov    $0x1,%edi
call   1040 <udelay@plt>
jmp    1221 <__efuse_read_dword+0x101>
mov    $0x8568,%edi
call   1030 <efuse_reg_addr@plt>
mov    (%rax),%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__efuse_read_dword>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    $0xfffffc00,%ecx
and    (%rax),%ecx
and    $0x3ff,%ebx
or     %ecx,%ebx
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    %ebx,(%rax)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    $0x800,%ebx
or     (%rax),%ebx
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    %ebx,(%rax)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    $0xfffff7ff,%ebx
and    (%rax),%ebx
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    %ebx,(%rax)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    $0x2000000,%ebx
or     (%rax),%ebx
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    %ebx,(%rax)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    $0xfdffffff,%ebx
and    (%rax),%ebx
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    %ebx,(%rax)
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
mov    (%rax),%eax
nop
mov    $0x8564,%edi
call   1030 <efuse_reg_addr@plt>
testl  $0x4000000,(%rax)
je     11ee <__efuse_read_dword+0xce>
mov    $0x1,%edi
call   1040 <udelay@plt>
jmp    11d0 <__efuse_read_dword+0xb0>
mov    $0x8568,%edi
call   1030 <efuse_reg_addr@plt>
mov    (%rax),%eax
mov    %rax,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @__efuse_read_dword(i64 %0, i64* %1) {
%3 = alloca i64
%4 = alloca i64*
store i64 %0, i64* %3
store i64* %1, i64** %4
%5 = call i64 @efuse_reg_addr(i32 34148)
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = zext i32 %7 to i64
%9 = and i64 %8, -1024
%10 = load i64, i64* %3
%11 = and i64 %10, 1023
%12 = trunc i64 %11 to i32
%13 = shl i32 %12, 0
%14 = zext i32 %13 to i64
%15 = or i64 %9, %14
%16 = trunc i64 %15 to i32
%17 = call i64 @efuse_reg_addr(i32 34148)
%18 = inttoptr i64 %17 to i32*
store volatile i32 %16, i32* %18
%19 = call i64 @efuse_reg_addr(i32 34148)
%20 = inttoptr i64 %19 to i32*
%21 = load volatile i32, i32* %20
%22 = zext i32 %21 to i64
%23 = and i64 %22, -2049
%24 = or i64 %23, 2048
%25 = trunc i64 %24 to i32
%26 = call i64 @efuse_reg_addr(i32 34148)
%27 = inttoptr i64 %26 to i32*
store volatile i32 %25, i32* %27
%28 = call i64 @efuse_reg_addr(i32 34148)
%29 = inttoptr i64 %28 to i32*
%30 = load volatile i32, i32* %29
%31 = zext i32 %30 to i64
%32 = and i64 %31, -2049
%33 = or i64 %32, 0
%34 = trunc i64 %33 to i32
%35 = call i64 @efuse_reg_addr(i32 34148)
%36 = inttoptr i64 %35 to i32*
store volatile i32 %34, i32* %36
%37 = call i64 @efuse_reg_addr(i32 34148)
%38 = inttoptr i64 %37 to i32*
%39 = load volatile i32, i32* %38
%40 = zext i32 %39 to i64
%41 = and i64 %40, -33554433
%42 = or i64 %41, 33554432
%43 = trunc i64 %42 to i32
%44 = call i64 @efuse_reg_addr(i32 34148)
%45 = inttoptr i64 %44 to i32*
store volatile i32 %43, i32* %45
%46 = call i64 @efuse_reg_addr(i32 34148)
%47 = inttoptr i64 %46 to i32*
%48 = load volatile i32, i32* %47
%49 = zext i32 %48 to i64
%50 = and i64 %49, -33554433
%51 = or i64 %50, 0
%52 = trunc i64 %51 to i32
%53 = call i64 @efuse_reg_addr(i32 34148)
%54 = inttoptr i64 %53 to i32*
store volatile i32 %52, i32* %54
%55 = call i64 @efuse_reg_addr(i32 34148)
%56 = inttoptr i64 %55 to i32*
%57 = load volatile i32, i32* %56
br label %58
58: ; preds = %64, %2
%59 = call i64 @efuse_reg_addr(i32 34148)
%60 = inttoptr i64 %59 to i32*
%61 = load volatile i32, i32* %60
%62 = and i32 %61, 67108864
%63 = icmp ne i32 %62, 0
br i1 %63, label %64, label %66
64: ; preds = %58
%65 = call i32 @udelay(i32 1)
br label %58
66: ; preds = %58
%67 = call i64 @efuse_reg_addr(i32 34152)
%68 = inttoptr i64 %67 to i32*
%69 = load volatile i32, i32* %68
%70 = zext i32 %69 to i64
%71 = load i64*, i64** %4
store i64 %70, i64* %71
ret void
}

LLVM IR (-O2):
define void @__efuse_read_dword(i64 %0, i64* nocapture writeonly %1) {
%3 = tail call i64 @efuse_reg_addr(i32 34148)
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, -1024
%7 = trunc i64 %0 to i32
%8 = and i32 %7, 1023
%9 = or i32 %6, %8
%10 = tail call i64 @efuse_reg_addr(i32 34148)
%11 = inttoptr i64 %10 to i32*
store volatile i32 %9, i32* %11
%12 = tail call i64 @efuse_reg_addr(i32 34148)
%13 = inttoptr i64 %12 to i32*
%14 = load volatile i32, i32* %13
%15 = or i32 %14, 2048
%16 = tail call i64 @efuse_reg_addr(i32 34148)
%17 = inttoptr i64 %16 to i32*
store volatile i32 %15, i32* %17
%18 = tail call i64 @efuse_reg_addr(i32 34148)
%19 = inttoptr i64 %18 to i32*
%20 = load volatile i32, i32* %19
%21 = and i32 %20, -2049
%22 = tail call i64 @efuse_reg_addr(i32 34148)
%23 = inttoptr i64 %22 to i32*
store volatile i32 %21, i32* %23
%24 = tail call i64 @efuse_reg_addr(i32 34148)
%25 = inttoptr i64 %24 to i32*
%26 = load volatile i32, i32* %25
%27 = or i32 %26, 33554432
%28 = tail call i64 @efuse_reg_addr(i32 34148)
%29 = inttoptr i64 %28 to i32*
store volatile i32 %27, i32* %29
%30 = tail call i64 @efuse_reg_addr(i32 34148)
%31 = inttoptr i64 %30 to i32*
%32 = load volatile i32, i32* %31
%33 = and i32 %32, -33554433
%34 = tail call i64 @efuse_reg_addr(i32 34148)
%35 = inttoptr i64 %34 to i32*
store volatile i32 %33, i32* %35
%36 = tail call i64 @efuse_reg_addr(i32 34148)
%37 = inttoptr i64 %36 to i32*
%38 = load volatile i32, i32* %37
%39 = tail call i64 @efuse_reg_addr(i32 34148)
%40 = inttoptr i64 %39 to i32*
%41 = load volatile i32, i32* %40
%42 = and i32 %41, 67108864
%43 = icmp eq i32 %42, 0
br i1 %43, label %51, label %44
44: ; preds = %2, %44
%45 = tail call i32 @udelay(i32 1)
%46 = tail call i64 @efuse_reg_addr(i32 34148)
%47 = inttoptr i64 %46 to i32*
%48 = load volatile i32, i32* %47
%49 = and i32 %48, 67108864
%50 = icmp eq i32 %49, 0
br i1 %50, label %51, label %44
51: ; preds = %44, %2
%52 = tail call i64 @efuse_reg_addr(i32 34152)
%53 = inttoptr i64 %52 to i32*
%54 = load volatile i32, i32* %53
%55 = zext i32 %54 to i64
store i64 %55, i64* %1
ret void
}