xunge/DecIR huggingface dataset:
_Complex short cplx7(short r) { return r + 2i; }


x86 assembly (clang, -O0):
<cplx7>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0xa(%rbp)
movswl -0xa(%rbp),%eax
add    $0x0,%eax
mov    %ax,-0x8(%rbp)
movw   $0x2,-0x6(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cplx7>:
movzwl %di,%eax
or     $0x20000,%eax
ret

LLVM IR (-O0):
define i32 @cplx7(i16 signext %0) {
%2 = alloca { i16, i16 }
%3 = alloca i16
store i16 %0, i16* %3
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = add i32 %5, 0
%7 = trunc i32 %6 to i16
%8 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %2, i32 0, i32 0
%9 = getelementptr inbounds { i16, i16 }, { i16, i16 }* %2, i32 0, i32 1
store i16 %7, i16* %8
store i16 2, i16* %9
%10 = bitcast { i16, i16 }* %2 to i32*
%11 = load i32, i32* %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @cplx7(i16 signext %0) {
%2 = zext i16 %0 to i32
%3 = or i32 %2, 131072
ret i32 %3
}
/* Variables and functions */
double chi2cdf(double, double);
scalar_t__ pca_divisions();
double pow(double, double);
double chisq_pvalue(double chisq) {
  double k;
  k = pow((double)pca_divisions(), 2.0);
  return 1.0 - chi2cdf(chisq, k);
}


x86 assembly (clang, -O0):
<chisq_pvalue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1040 <pca_divisions@plt>
cvtsi2sd %rax,%xmm0
movsd  0xeb7(%rip),%xmm1
call   1050 <pow@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <chi2cdf@plt>
movaps %xmm0,%xmm1
movsd  0xe8b(%rip),%xmm0
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chisq_pvalue>:
push   %rax
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1040 <pca_divisions@plt>
cvtsi2sd %rax,%xmm1
mulsd  %xmm1,%xmm1
movsd  (%rsp),%xmm0
call   1030 <chi2cdf@plt>
movsd  0xeb8(%rip),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @chisq_pvalue(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = call i64 (...) @pca_divisions()
%5 = sitofp i64 %4 to double
%6 = call double @pow(double %5, double 2.000000e+00)
store double %6, double* %3
%7 = load double, double* %2
%8 = load double, double* %3
%9 = call double @chi2cdf(double %7, double %8)
%10 = fsub double 1.000000e+00, %9
ret double %10
}

LLVM IR (-O2):
define double @chisq_pvalue(double %0) {
%2 = tail call i64 (...) @pca_divisions()
%3 = sitofp i64 %2 to double
%4 = fmul double %3, %3
%5 = tail call double @chi2cdf(double %0, double %4)
%6 = fsub double 1.000000e+00, %5
ret double %6
}
void gnrc_netif_init_devs(void) {
  if (0) {
    extern void auto_init_stm32_eth(void);
    auto_init_stm32_eth();
  }
  if (0) {
    extern void auto_init_at86rf215(void);
    auto_init_at86rf215();
  }
  if (0) {
    extern void auto_init_at86rf2xx(void);
    auto_init_at86rf2xx();
  }
  if (0) {
    extern void auto_init_mrf24j40(void);
    auto_init_mrf24j40();
  }
  if (0) {
    extern void auto_init_cc110x(void);
    auto_init_cc110x();
  }
  if (0) {
    extern void auto_init_cc2420(void);
    auto_init_cc2420();
  }
  if (0) {
    extern void auto_init_encx24j600(void);
    auto_init_encx24j600();
  }
  if (0) {
    extern void auto_init_enc28j60(void);
    auto_init_enc28j60();
  }
  if (0) {
    extern void auto_init_esp_eth(void);
    auto_init_esp_eth();
  }
  if (0) {
    extern void auto_init_esp_now(void);
    auto_init_esp_now();
  }
  if (0) {
    extern void auto_init_esp_wifi(void);
    auto_init_esp_wifi();
  }
  if (0) {
    extern void auto_init_ethos(void);
    auto_init_ethos();
  }
  if (0) {
    extern void auto_init_dose(void);
    auto_init_dose();
  }
  if (0) {
    extern void auto_init_slipdev(void);
    auto_init_slipdev();
  }
  if (0) {
    extern void auto_init_cc2538_rf(void);
    auto_init_cc2538_rf();
  }
  if (0) {
    extern void auto_init_xbee(void);
    auto_init_xbee();
  }
  if (0) {
    extern void auto_init_kw2xrf(void);
    auto_init_kw2xrf();
  }
  if (0) {
    extern void auto_init_kw41zrf(void);
    auto_init_kw41zrf();
  }
  if (0) {
    extern void auto_init_netdev_cdcecm(void);
    auto_init_netdev_cdcecm();
  }
  if (0) {
    extern void auto_init_netdev_tap(void);
    auto_init_netdev_tap();
  }
  if (0) {
    extern void auto_init_socket_zep(void);
    auto_init_socket_zep();
  }
  if (0) {
    extern void gnrc_nordic_ble_6lowpan_init(void);
    gnrc_nordic_ble_6lowpan_init();
  }
  if (0) {
    extern void gnrc_nrfmin_init(void);
    gnrc_nrfmin_init();
  }
  if (0) {
    extern void auto_init_w5100(void);
    auto_init_w5100();
  }
  if (0 && !0) {
    extern void auto_init_sx127x(void);
    auto_init_sx127x();
  }
  if (0) {
    extern void auto_init_nrf802154(void);
    auto_init_nrf802154();
  }
}


x86 assembly (clang, -O0):
<gnrc_netif_init_devs>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gnrc_netif_init_devs>:
ret

LLVM IR (-O0):
define void @gnrc_netif_init_devs() {
ret void
}

LLVM IR (-O2):
define void @gnrc_netif_init_devs() {
ret void
}
/* Type definitions */
struct objdb_iface_ver0 {
  int dummy;
};

/* Variables and functions */
scalar_t__ read_config_file_into_objdb(struct objdb_iface_ver0 *, char **);
int aisparser_readconfig(struct objdb_iface_ver0 *objdb, char **error_string) {
  if (read_config_file_into_objdb(objdb, error_string)) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<aisparser_readconfig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <read_config_file_into_objdb@plt>
cmp    $0x0,%rax
je     1143 <aisparser_readconfig+0x33>
movl   $0xffffffff,-0x4(%rbp)
jmp    114a <aisparser_readconfig+0x3a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aisparser_readconfig>:
push   %rax
call   1030 <read_config_file_into_objdb@plt>
neg    %rax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.objdb_iface_ver0 = type { i32 }
define i32 @aisparser_readconfig(%struct.objdb_iface_ver0* %0, i8** %1) {
%3 = alloca i32
%4 = alloca %struct.objdb_iface_ver0*
%5 = alloca i8**
store %struct.objdb_iface_ver0* %0, %struct.objdb_iface_ver0** %4
store i8** %1, i8*** %5
%6 = load %struct.objdb_iface_ver0*, %struct.objdb_iface_ver0** %4
%7 = load i8**, i8*** %5
%8 = call i64 @read_config_file_into_objdb(%struct.objdb_iface_ver0* %6, i8** %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 -1, i32* %3
br label %12
11: ; preds = %2
store i32 0, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
%struct.objdb_iface_ver0 = type { i32 }
define i32 @aisparser_readconfig(%struct.objdb_iface_ver0* %0, i8** %1) {
%3 = tail call i64 @read_config_file_into_objdb(%struct.objdb_iface_ver0* %0, i8** %1)
%4 = icmp ne i64 %3, 0
%5 = sext i1 %4 to i32
ret i32 %5
}
unsigned ppot(unsigned n) {
  unsigned i = 0;
  while (1) {
    if ((1 << i) > n)
      return 1 << (i - 1);
    ++i;
  }
}


x86 assembly (clang, -O0):
<ppot>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cmp    -0x4(%rbp),%eax
jbe    1130 <ppot+0x30>
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
pop    %rbp
ret
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <ppot+0xe>

x86 assembly (clang, -O2):
<ppot>:
mov    $0xfffffffe,%edx
cs nopw 0x0(%rax,%rax,1)
nop
lea    0x2(%rdx),%ecx
mov    %edi,%eax
shr    %cl,%eax
add    $0x1,%edx
test   %eax,%eax
jne    1110 <ppot+0x10>
mov    $0x1,%eax
mov    %edx,%ecx
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @ppot(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %1, %13
%5 = load i32, i32* %3
%6 = shl i32 1, %5
%7 = load i32, i32* %2
%8 = icmp ugt i32 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %4
%10 = load i32, i32* %3
%11 = sub i32 %10, 1
%12 = shl i32 1, %11
ret i32 %12
13: ; preds = %4
%14 = load i32, i32* %3
%15 = add i32 %14, 1
store i32 %15, i32* %3
br label %4
}

LLVM IR (-O2):
define i32 @ppot(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %6, %2 ]
%4 = lshr i32 %0, %3
%5 = icmp eq i32 %4, 0
%6 = add i32 %3, 1
br i1 %5, label %7, label %2
7: ; preds = %2
%8 = add i32 %3, -1
%9 = shl nuw i32 1, %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ fwrite(char const *, int /*<<< orphan*/, int,
                          int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ strlen(char const *);
int help(int r) {
  const char *helptext =
      "uj2j - microjson to JSON converter\n"
      "Copyright 2016 Aaron Kondziela <aaron@openrobotics.company>\n"
      "Usage:\n"
      "    uj2j [-t] < UJ_INPUT > JSON_OUTPUT\n"
      "    uj2j [-h]\n"
      "Options:\n"
      "    -t    Output JSON with datatypes. e.g., 123/uint8\n"
      "    -h    Print help text and exit\n";
  fwrite(helptext, strlen(helptext), 1, stderr);
  return r;
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
mov    0x2e8c(%rip),%rax
mov    (%rax),%ecx
mov    $0x1,%edx
call   1040 <fwrite@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0xed3(%rip),%r14
mov    %r14,%rdi
call   1030 <strlen@plt>
mov    0x2ea4(%rip),%rcx
mov    (%rcx),%ecx
mov    %r14,%rdi
mov    %eax,%esi
mov    $0x1,%edx
call   1040 <fwrite@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [254 x i8] c"uj2j - microjson to JSON converter\0ACopyright 2016 Aaron Kondziela <aaron@openrobotics.company>\0AUsage:\0A uj2j [-t] < UJ_INPUT > JSON_OUTPUT\0A uj2j [-h]\0AOptions:\0A -t Output JSON with datatypes. e.g., 123/uint8\0A -h Print help text and exit\0A\00"
@stderr = global i32 0
define i32 @help(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
store i8* getelementptr inbounds ([254 x i8], [254 x i8]* @.str, i64 0, i64 0), i8** %3
%4 = load i8*, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @strlen(i8* %5)
%7 = load i32, i32* @stderr
%8 = call i32 @fwrite(i8* %4, i32 %6, i32 1, i32 %7)
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@.str = [254 x i8] c"uj2j - microjson to JSON converter\0ACopyright 2016 Aaron Kondziela <aaron@openrobotics.company>\0AUsage:\0A uj2j [-t] < UJ_INPUT > JSON_OUTPUT\0A uj2j [-h]\0AOptions:\0A -t Output JSON with datatypes. e.g., 123/uint8\0A -h Print help text and exit\0A\00"
@stderr = global i32 0
define i32 @help(i32 returned %0) {
%2 = tail call i32 @strlen(i8* getelementptr inbounds ([254 x i8], [254 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fwrite(i8* getelementptr inbounds ([254 x i8], [254 x i8]* @.str, i64 0, i64 0), i32 %2, i32 1, i32 %3)
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ read_test();
int /*<<< orphan*/ write_test();
main() {
  write_test();
  read_test();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <write_test@plt>
mov    $0x0,%al
call   1030 <read_test@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <write_test@plt>
xor    %eax,%eax
call   1030 <read_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @write_test()
%2 = call i32 (...) @read_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @write_test()
%2 = tail call i32 (...) @read_test()
ret i32 0
}
unsigned int lg2(unsigned int n) {
  unsigned int ret = 0;
  unsigned int tmp = n;
  while ((tmp = tmp >> 1) > 0)
    ret++;
  return ret;
}


x86 assembly (clang, -O0):
<lg2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
jbe    1134 <lg2+0x34>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1114 <lg2+0x14>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lg2>:
xor    %eax,%eax
cmp    $0x2,%edi
jb     111c <lg2+0x1c>
xor    %eax,%eax
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
shr    %ecx
add    $0x1,%eax
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1110 <lg2+0x10>
ret

LLVM IR (-O0):
define i32 @lg2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%5 = load i32, i32* %2
store i32 %5, i32* %4
br label %6
6: ; preds = %10, %1
%7 = load i32, i32* %4
%8 = lshr i32 %7, 1
store i32 %8, i32* %4
%9 = icmp ugt i32 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %6
%11 = load i32, i32* %3
%12 = add i32 %11, 1
store i32 %12, i32* %3
br label %6
13: ; preds = %6
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @lg2(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ %0, %1 ]
%5 = phi i32 [ %7, %3 ], [ 0, %1 ]
%6 = lshr i32 %4, 1
%7 = add nuw nsw i32 %5, 1
%8 = icmp ult i32 %4, 4
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
double a_p(t)
double t;
{
  if (t == 0.0) {
    return 0.0;
  }
  return .0019 * pow(t, -1.5) * exp(-4.7e5 / t) * (exp(-9.4e4 / t) * .3 + 1.0);
}


x86 assembly (clang, -O0):
<a_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1152 <a_p+0x32>
jp     1152 <a_p+0x32>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    11d6 <a_p+0xb6>
movsd  -0x10(%rbp),%xmm0
movsd  0xec9(%rip),%xmm1
call   1040 <pow@plt>
movaps %xmm0,%xmm1
movsd  0xeb1(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  0xe98(%rip),%xmm0
divsd  -0x10(%rbp),%xmm0
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xe6d(%rip),%xmm0
divsd  -0x10(%rbp),%xmm0
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  0xe43(%rip),%xmm2
mulsd  %xmm2,%xmm1
movsd  0xe3f(%rip),%xmm2
addsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_p>:
movapd %xmm0,%xmm2
xorpd  %xmm0,%xmm0
ucomisd %xmm0,%xmm2
jne    1131 <a_p+0x11>
jp     1131 <a_p+0x11>
ret
sub    $0x18,%rsp
movsd  0xec3(%rip),%xmm1
movapd %xmm2,%xmm0
movsd  %xmm2,0x10(%rsp)
call   1040 <pow@plt>
mulsd  0xeb4(%rip),%xmm0
movsd  %xmm0,0x8(%rsp)
movsd  0xeae(%rip),%xmm0
divsd  0x10(%rsp),%xmm0
call   1030 <exp@plt>
mulsd  0x8(%rsp),%xmm0
movsd  %xmm0,0x8(%rsp)
movsd  0xe97(%rip),%xmm0
divsd  0x10(%rsp),%xmm0
call   1030 <exp@plt>
mulsd  0xe8c(%rip),%xmm0
addsd  0xe8c(%rip),%xmm0
mulsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @a_p(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp oeq double %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store double 0.000000e+00, double* %2
br label %20
7: ; preds = %1
%8 = load double, double* %3
%9 = call double @pow(double %8, double -1.500000e+00)
%10 = fmul double 1.900000e-03, %9
%11 = load double, double* %3
%12 = fdiv double -4.700000e+05, %11
%13 = call double @exp(double %12)
%14 = fmul double %10, %13
%15 = load double, double* %3
%16 = fdiv double -9.400000e+04, %15
%17 = call double @exp(double %16)
%18 = call double @llvm.fmuladd.f64(double %17, double 3.000000e-01, double 1.000000e+00)
%19 = fmul double %14, %18
store double %19, double* %2
br label %20
20: ; preds = %7, %6
%21 = load double, double* %2
ret double %21
}

LLVM IR (-O2):
define double @a_p(double %0) {
%2 = fcmp oeq double %0, 0.000000e+00
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = tail call double @pow(double %0, double -1.500000e+00)
%5 = fmul double %4, 1.900000e-03
%6 = fdiv double -4.700000e+05, %0
%7 = tail call double @exp(double %6)
%8 = fmul double %5, %7
%9 = fdiv double -9.400000e+04, %0
%10 = tail call double @exp(double %9)
%11 = tail call double @llvm.fmuladd.f64(double %10, double 3.000000e-01, double 1.000000e+00)
%12 = fmul double %8, %11
br label %13
13: ; preds = %1, %3
%14 = phi double [ %12, %3 ], [ 0.000000e+00, %1 ]
ret double %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() { printf("Hello, world!\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello, world!\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello, world!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int gcd(int64_t a, int64_t b) {
  int64_t c;
  while (a != 0) {
    c = a;
    a = b % a;
    b = c;
  }
  return b;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     112f <gcd+0x2f>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0x4(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    110a <gcd+0xa>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %esi,%eax
test   %edi,%edi
je     111d <gcd+0x1d>
mov    %edi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load i32, i32* %3
store i32 %10, i32* %5
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = srem i32 %11, %12
store i32 %13, i32* %3
%14 = load i32, i32* %5
store i32 %14, i32* %4
br label %6
15: ; preds = %6
%16 = load i32, i32* %4
ret i32 %16
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %0, %2 ]
%6 = phi i32 [ %5, %4 ], [ %1, %2 ]
%7 = srem i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %1, %2 ], [ %5, %4 ]
ret i32 %10
}
void decode_string(unsigned char *in, int in_length, unsigned char **out,
                   int *out_length) {}


x86 assembly (clang, -O0):
<decode_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_string>:
ret

LLVM IR (-O0):
define void @decode_string(i8* %0, i32 %1, i8** %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i32*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
store i32* %3, i32** %8
ret void
}

LLVM IR (-O2):
define void @decode_string(i8* nocapture %0, i32 %1, i8** nocapture %2, i32* nocapture %3) {
ret void
}
/* Variables and functions */
float pow(float, float);
float dB_to_coefficient(float dB) {
  return dB > -318.8f ? pow(10.0f, dB * 0.05f) : 0.0f;
}


x86 assembly (clang, -O0):
<dB_to_coefficient>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xed6(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    1157 <dB_to_coefficient+0x47>
movss  0xecd(%rip),%xmm1
mulss  -0x4(%rbp),%xmm1
movss  0xebc(%rip),%xmm0
call   1030 <pow@plt>
movss  %xmm0,-0x8(%rbp)
jmp    1164 <dB_to_coefficient+0x54>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    1164 <dB_to_coefficient+0x54>
movss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dB_to_coefficient>:
ucomiss 0xee9(%rip),%xmm0
jbe    1131 <dB_to_coefficient+0x21>
movaps %xmm0,%xmm1
mulss  0xee0(%rip),%xmm1
movss  0xedc(%rip),%xmm0
jmp    1030 <pow@plt>
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @dB_to_coefficient(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp ogt float %3, 0xC073ECCCC0000000
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load float, float* %2
%7 = fmul float %6, 0x3FA99999A0000000
%8 = call float @pow(float 1.000000e+01, float %7)
br label %10
9: ; preds = %1
br label %10
10: ; preds = %9, %5
%11 = phi float [ %8, %5 ], [ 0.000000e+00, %9 ]
ret float %11
}

LLVM IR (-O2):
define float @dB_to_coefficient(float %0) {
%2 = fcmp ogt float %0, 0xC073ECCCC0000000
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = fmul float %0, 0x3FA99999A0000000
%5 = tail call float @pow(float 1.000000e+01, float %4)
br label %6
6: ; preds = %1, %3
%7 = phi float [ %5, %3 ], [ 0.000000e+00, %1 ]
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR67_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR67_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR67_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR67_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR67_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__38__IO__toggle();
void Msp430GpioC__9__HplGeneralIO__toggle(void) {
  HplMsp430GeneralIOP__38__IO__toggle();
}


x86 assembly (clang, -O0):
<Msp430GpioC__9__HplGeneralIO__toggle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__38__IO__toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430GpioC__9__HplGeneralIO__toggle>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__38__IO__toggle@plt>

LLVM IR (-O0):
define void @Msp430GpioC__9__HplGeneralIO__toggle() {
%1 = call i32 (...) @HplMsp430GeneralIOP__38__IO__toggle()
ret void
}

LLVM IR (-O2):
define void @Msp430GpioC__9__HplGeneralIO__toggle() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__38__IO__toggle()
ret void
}
/* Type definitions */
struct tms {
  int dummy;
};
typedef int /*<<< orphan*/ clock_t;

/* Variables and functions */
int /*<<< orphan*/ syscall(int, struct tms *);
clock_t times(struct tms *tms) { return syscall(43, tms); }


x86 assembly (clang, -O0):
<times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x2b,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<times>:
mov    %rdi,%rsi
mov    $0x2b,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.tms = type { i32 }
define i32 @times(%struct.tms* %0) {
%2 = alloca %struct.tms*
store %struct.tms* %0, %struct.tms** %2
%3 = load %struct.tms*, %struct.tms** %2
%4 = call i32 @syscall(i32 43, %struct.tms* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.tms = type { i32 }
define i32 @times(%struct.tms* %0) {
%2 = tail call i32 @syscall(i32 43, %struct.tms* %0)
ret i32 %2
}
void handle_45(int sig) {}


x86 assembly (clang, -O0):
<handle_45>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_45>:
ret

LLVM IR (-O0):
define void @handle_45(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_45(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ X509;

/* Variables and functions */
int /*<<< orphan*/ *ASN1_item_dup(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ X509_it;
X509 *X509_dup(X509 *x) { return ASN1_item_dup(&X509_it, x); }


x86 assembly (clang, -O0):
<X509_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    0x2ec1(%rip),%rdi
call   1030 <ASN1_item_dup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_dup>:
mov    %rdi,%rsi
mov    0x2ece(%rip),%rdi
jmp    1030 <ASN1_item_dup@plt>

LLVM IR (-O0):
@X509_it = global i32 0
define i32* @X509_dup(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32* @ASN1_item_dup(i32* @X509_it, i32* %3)
ret i32* %4
}

LLVM IR (-O2):
@X509_it = global i32 0
define i32* @X509_dup(i32* %0) {
%2 = tail call i32* @ASN1_item_dup(i32* @X509_it, i32* %0)
ret i32* %2
}
unsigned xrop3_223_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D & T;
  stk2 = ~stk2;
  stk1 = S | stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_223_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_223_1_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
or     %ecx,%eax
not    %eax
or     %edi,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_223_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %7
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %6
%28 = load i32, i32* %9
%29 = or i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %7
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = load i32, i32* %5
%38 = load i32, i32* %6
%39 = and i32 %37, %38
%40 = or i32 %36, %39
%41 = load i32, i32* %5
%42 = load i32, i32* %7
%43 = and i32 %41, %42
%44 = or i32 %40, %43
ret i32 %44
}

LLVM IR (-O2):
define i32 @xrop3_223_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = or i32 %6, %4
%8 = xor i32 %7, -1
%9 = or i8 %1, %0
%10 = zext i8 %9 to i32
%11 = or i32 %10, %8
ret i32 %11
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int /*<<< orphan*/ tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *);
void local_print_greetings(void) {
  struct timespec req = {
      .tv_sec = 1,
      .tv_nsec = 0,
  };
  printf("Hello from UNPATCHED\n");
  nanosleep(&req, NULL);
}


x86 assembly (clang, -O0):
<local_print_greetings>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<local_print_greetings>:
push   %rax
movq   $0x1,(%rsp)
lea    0xed0(%rip),%rdi
call   1030 <puts@plt>
mov    %rsp,%rdi
xor    %esi,%esi
call   1040 <nanosleep@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
@__const.local_print_greetings.req = %struct.timespec { i32 1, i32 0 }
@.str = [22 x i8] c"Hello from UNPATCHED\0A\00"
define void @local_print_greetings() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @nanosleep(%struct.timespec* %1, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
@str = [21 x i8] c"Hello from UNPATCHED\00"
define void @local_print_greetings() {
%1 = alloca i64
%2 = bitcast i64* %1 to %struct.timespec*
%3 = bitcast i64* %1 to i8*
store i64 1, i64* %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
%5 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
int addNumbers(int firstNum, int secondNum) { return firstNum + secondNum; }


x86 assembly (clang, -O0):
<addNumbers>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<addNumbers>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @addNumbers(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @addNumbers(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
void colorf_(col) float *col;
{ colorf(*col); }


x86 assembly (clang, -O0):
<colorf_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
cvtss2sd %xmm0,%xmm0
mov    $0x1,%al
call   1030 <colorf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<colorf_>:
movss  (%rdi),%xmm0
cvtss2sd %xmm0,%xmm0
mov    $0x1,%al
jmp    1030 <colorf@plt>

LLVM IR (-O0):
define void @colorf_(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = load float, float* %3
%5 = fpext float %4 to double
%6 = call i32 (double, ...) bitcast (i32 (...)* @colorf to i32 (double, ...)*)(double %5)
ret void
}

LLVM IR (-O2):
define void @colorf_(float* nocapture %0) {
%2 = load float, float* %0
%3 = fpext float %2 to double
%4 = tail call i32 (double, ...) bitcast (i32 (...)* @colorf to i32 (double, ...)*)(double %3)
ret void
}
void rockchip_drm_fbdev_fini(struct drm_device *dev) {}


x86 assembly (clang, -O0):
<rockchip_drm_fbdev_fini>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rockchip_drm_fbdev_fini>:
ret

LLVM IR (-O0):
%struct.drm_device = type opaque
define void @rockchip_drm_fbdev_fini(%struct.drm_device* %0) {
%2 = alloca %struct.drm_device*
store %struct.drm_device* %0, %struct.drm_device** %2
ret void
}

LLVM IR (-O2):
%struct.drm_device = type opaque
define void @rockchip_drm_fbdev_fini(%struct.drm_device* nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ syscall(int, unsigned int);
long ledctl(unsigned int mask) { return (long)syscall(317, mask); }


x86 assembly (clang, -O0):
<ledctl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x13d,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ledctl>:
mov    %edi,%esi
mov    $0x13d,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i64 @ledctl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @syscall(i32 317, i32 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @ledctl(i32 %0) {
%2 = tail call i64 @syscall(i32 317, i32 %0)
ret i64 %2
}
void IRC_OnChannelDeOwner(const struct instance_data *pID,
                          const struct userinfo *pUI, const char *szChannel,
                          const char *szTargetNick) {}


x86 assembly (clang, -O0):
<IRC_OnChannelDeOwner>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<IRC_OnChannelDeOwner>:
ret

LLVM IR (-O0):
%struct.instance_data = type opaque
%struct.userinfo = type opaque
define void @IRC_OnChannelDeOwner(%struct.instance_data* %0, %struct.userinfo* %1, i8* %2, i8* %3) {
%5 = alloca %struct.instance_data*
%6 = alloca %struct.userinfo*
%7 = alloca i8*
%8 = alloca i8*
store %struct.instance_data* %0, %struct.instance_data** %5
store %struct.userinfo* %1, %struct.userinfo** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
ret void
}

LLVM IR (-O2):
%struct.instance_data = type opaque
%struct.userinfo = type opaque
define void @IRC_OnChannelDeOwner(%struct.instance_data* nocapture %0, %struct.userinfo* nocapture %1, i8* nocapture %2, i8* nocapture %3) {
ret void
}
/* Variables and functions */
int get_asr17();
int cpu_index() { return ((get_asr17() >> 28) & 0x0f); }


x86 assembly (clang, -O0):
<cpu_index>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <get_asr17@plt>
sar    $0x1c,%eax
and    $0xf,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_index>:
push   %rax
xor    %eax,%eax
call   1030 <get_asr17@plt>
shr    $0x1c,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cpu_index() {
%1 = call i32 (...) @get_asr17()
%2 = ashr i32 %1, 28
%3 = and i32 %2, 15
ret i32 %3
}

LLVM IR (-O2):
define i32 @cpu_index() {
%1 = tail call i32 (...) @get_asr17()
%2 = lshr i32 %1, 28
ret i32 %2
}
int fig_0_10(int figlen, int pd, int oe, int cn, unsigned char *fig) {
  return 0;
}


x86 assembly (clang, -O0):
<fig_0_10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fig_0_10>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fig_0_10(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i8*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i8* %4, i8** %10
ret i32 0
}

LLVM IR (-O2):
define i32 @fig_0_10(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture readnone %4) {
ret i32 0
}
int func(void) {
  int n = 3;
  int m = 5;
  n >> m;
  return 0;
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
movl   $0x3,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @func() {
%1 = alloca i32
%2 = alloca i32
store i32 3, i32* %1
store i32 5, i32* %2
%3 = load i32, i32* %1
%4 = load i32, i32* %2
%5 = ashr i32 %3, %4
ret i32 0
}

LLVM IR (-O2):
define i32 @func() {
ret i32 0
}
double dc_dphi(double phi, double mu) {
  return (((1.2 * mu + 1.0) - mu) * 6.0 * phi * (1.0 - phi));
}


x86 assembly (clang, -O0):
<dc_dphi>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xef5(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xed9(%rip),%xmm1
addsd  %xmm1,%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  0xed0(%rip),%xmm1
mulsd  %xmm1,%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xeb7(%rip),%xmm1
subsd  -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dc_dphi>:
movsd  0xef8(%rip),%xmm3
mulsd  %xmm1,%xmm3
movsd  0xef4(%rip),%xmm2
addsd  %xmm2,%xmm3
subsd  %xmm1,%xmm3
mulsd  0xeec(%rip),%xmm3
mulsd  %xmm0,%xmm3
subsd  %xmm0,%xmm2
mulsd  %xmm3,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @dc_dphi(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = call double @llvm.fmuladd.f64(double 1.200000e+00, double %5, double 1.000000e+00)
%7 = load double, double* %4
%8 = fsub double %6, %7
%9 = fmul double %8, 6.000000e+00
%10 = load double, double* %3
%11 = fmul double %9, %10
%12 = load double, double* %3
%13 = fsub double 1.000000e+00, %12
%14 = fmul double %11, %13
ret double %14
}

LLVM IR (-O2):
define double @dc_dphi(double %0, double %1) {
%3 = tail call double @llvm.fmuladd.f64(double %1, double 1.200000e+00, double 1.000000e+00)
%4 = fsub double %3, %1
%5 = fmul double %4, 6.000000e+00
%6 = fmul double %5, %0
%7 = fsub double 1.000000e+00, %0
%8 = fmul double %7, %6
ret double %8
}
void exit_tag() {}


x86 assembly (clang, -O0):
<exit_tag>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exit_tag>:
ret

LLVM IR (-O0):
define void @exit_tag() {
ret void
}

LLVM IR (-O2):
define void @exit_tag() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ atoi(char *);
char *convert(char *, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  printf("%s\n", convert(argv[1], atoi(argv[2])));
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rdi
call   1050 <atoi@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1030 <convert@plt>
mov    %rax,%rsi
lea    0xe8c(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x8(%rsi),%rbx
mov    0x10(%rsi),%rdi
call   1050 <atoi@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <convert@plt>
lea    0xeb1(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %5
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = load i8**, i8*** %5
%10 = getelementptr inbounds i8*, i8** %9, i64 2
%11 = load i8*, i8** %10
%12 = call i32 @atoi(i8* %11)
%13 = call i8* @convert(i8* %8, i32 %12)
%14 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8*, i8** %1, i64 2
%6 = load i8*, i8** %5
%7 = tail call i32 @atoi(i8* %6)
%8 = tail call i8* @convert(i8* %4, i32 %7)
%9 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
ret i32 0
}
long long longlong_ignoring_signedshortint(long long x, signed short int y) {
  return x;
}


x86 assembly (clang, -O0):
<longlong_ignoring_signedshortint>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longlong_ignoring_signedshortint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @longlong_ignoring_signedshortint(i64 %0, i16 signext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @longlong_ignoring_signedshortint(i64 returned %0, i16 signext %1) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ db_pos(float);
float psd_estimate(float re, float im) {
  float power;
  float psd;
  power = re * re + im * im;
  psd = 0 + db_pos(power / 64);
  return psd;
}


x86 assembly (clang, -O0):
<psd_estimate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
mulss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  0xeb0(%rip),%xmm1
divss  %xmm1,%xmm0
call   1030 <db_pos@plt>
add    $0x0,%eax
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psd_estimate>:
push   %rax
mulss  %xmm1,%xmm1
mulss  %xmm0,%xmm0
addss  %xmm1,%xmm0
mulss  0xedb(%rip),%xmm0
call   1030 <db_pos@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @psd_estimate(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %3
store float %1, float* %4
%7 = load float, float* %3
%8 = load float, float* %3
%9 = load float, float* %4
%10 = load float, float* %4
%11 = fmul float %9, %10
%12 = call float @llvm.fmuladd.f32(float %7, float %8, float %11)
store float %12, float* %5
%13 = load float, float* %5
%14 = fdiv float %13, 6.400000e+01
%15 = call i32 @db_pos(float %14)
%16 = add nsw i32 0, %15
%17 = sitofp i32 %16 to float
store float %17, float* %6
%18 = load float, float* %6
ret float %18
}

LLVM IR (-O2):
define float @psd_estimate(float %0, float %1) {
%3 = fmul float %1, %1
%4 = tail call float @llvm.fmuladd.f32(float %0, float %0, float %3)
%5 = fmul float %4, 1.562500e-02
%6 = tail call i32 @db_pos(float %5)
%7 = sitofp i32 %6 to float
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ Emit(char *);
int /*<<< orphan*/ printf(char *);
void EmitLn(char *s) {
  Emit(s);
  printf("\n");
}


x86 assembly (clang, -O0):
<EmitLn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <Emit@plt>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EmitLn>:
push   %rax
call   1040 <Emit@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @EmitLn(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @Emit(i8* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @EmitLn(i8* %0) {
%2 = tail call i32 @Emit(i8* %0)
%3 = tail call i32 @putchar(i32 10)
ret void
}
float y(int n, float *x) {
  if (n < 0)
    return 0;
  else {
    return (0.5 * y(n - 1, x) + x[n]);
  }
}


x86 assembly (clang, -O0):
<y>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1136 <y+0x26>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1173 <y+0x63>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0x10(%rbp),%rsi
call   1030 <y@plt>
cvtss2sd %xmm0,%xmm0
mov    -0x10(%rbp),%rax
movslq -0x8(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm1
cvtss2sd %xmm1,%xmm1
movsd  0xe9e(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<y>:
test   %edi,%edi
js     114d <y+0x3d>
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %edi,%ebx
lea    -0x1(%rbx),%edi
call   1030 <y@plt>
cvtss2sd %xmm0,%xmm0
mov    %ebx,%eax
movss  (%r14,%rax,4),%xmm1
mulsd  0xec7(%rip),%xmm0
cvtss2sd %xmm1,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @y(i32 %0, float* %1) {
%3 = alloca float
%4 = alloca i32
%5 = alloca float*
store i32 %0, i32* %4
store float* %1, float** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store float 0.000000e+00, float* %3
br label %23
9: ; preds = %2
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 1
%12 = load float*, float** %5
%13 = call float @y(i32 %11, float* %12)
%14 = fpext float %13 to double
%15 = load float*, float** %5
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds float, float* %15, i64 %17
%19 = load float, float* %18
%20 = fpext float %19 to double
%21 = call double @llvm.fmuladd.f64(double 5.000000e-01, double %14, double %20)
%22 = fptrunc double %21 to float
store float %22, float* %3
br label %23
23: ; preds = %9, %8
%24 = load float, float* %3
ret float %24
}

LLVM IR (-O2):
define float @y(i32 %0, float* nocapture %1) {
%3 = icmp slt i32 %0, 0
br i1 %3, label %4, label %6
4: ; preds = %2, %6
%5 = phi float [ %15, %6 ], [ 0.000000e+00, %2 ]
ret float %5
6: ; preds = %2
%7 = add nsw i32 %0, -1
%8 = tail call float @y(i32 %7, float* %1)
%9 = fpext float %8 to double
%10 = zext i32 %0 to i64
%11 = getelementptr inbounds float, float* %1, i64 %10
%12 = load float, float* %11
%13 = fpext float %12 to double
%14 = tail call double @llvm.fmuladd.f64(double %9, double 5.000000e-01, double %13)
%15 = fptrunc double %14 to float
br label %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int strcmp(char const *, char const *);
int tccmpwords(const char **a, const char **b) {
  assert(a && b);
  return strcmp(*a, *b);
}


x86 assembly (clang, -O0):
<tccmpwords>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x11(%rbp)
je     114b <tccmpwords+0x2b>
cmpq   $0x0,-0x10(%rbp)
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tccmpwords>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
test   %rdi,%rdi
setne  %al
test   %rsi,%rsi
setne  %cl
and    %al,%cl
movzbl %cl,%edi
call   1040 <assert@plt>
mov    (%rbx),%rdi
mov    (%r14),%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @tccmpwords(i8** %0, i8** %1) {
%3 = alloca i8**
%4 = alloca i8**
store i8** %0, i8*** %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %3
%6 = icmp ne i8** %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i8**, i8*** %4
%9 = icmp ne i8** %8, null
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ false, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
%14 = load i8**, i8*** %3
%15 = load i8*, i8** %14
%16 = load i8**, i8*** %4
%17 = load i8*, i8** %16
%18 = call i32 @strcmp(i8* %15, i8* %17)
ret i32 %18
}

LLVM IR (-O2):
define i32 @tccmpwords(i8** %0, i8** %1) {
%3 = icmp ne i8** %0, null
%4 = icmp ne i8** %1, null
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = load i8*, i8** %0
%9 = load i8*, i8** %1
%10 = tail call i32 @strcmp(i8* dereferenceable(1) %8, i8* dereferenceable(1) %9)
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ BNCIO(int);
int PulseF1() {
  char com1, data;
  int stat = 0;
  BNCIO(46);
  BNCIO(1);
  BNCIO(0);
  return (stat);
}


x86 assembly (clang, -O0):
<PulseF1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x8(%rbp)
mov    $0x2e,%edi
call   1030 <BNCIO@plt>
mov    $0x1,%edi
call   1030 <BNCIO@plt>
xor    %edi,%edi
call   1030 <BNCIO@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PulseF1>:
push   %rax
mov    $0x2e,%edi
call   1030 <BNCIO@plt>
mov    $0x1,%edi
call   1030 <BNCIO@plt>
xor    %edi,%edi
call   1030 <BNCIO@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @PulseF1() {
%1 = alloca i8
%2 = alloca i8
%3 = alloca i32
store i32 0, i32* %3
%4 = call i32 @BNCIO(i32 46)
%5 = call i32 @BNCIO(i32 1)
%6 = call i32 @BNCIO(i32 0)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @PulseF1() {
%1 = tail call i32 @BNCIO(i32 46)
%2 = tail call i32 @BNCIO(i32 1)
%3 = tail call i32 @BNCIO(i32 0)
ret i32 0
}