void IPCLiteCtoMDataWrite(unsigned long ulFlag, unsigned long ulStatusFlag) {
  unsigned long *pulAddress;
  unsigned short *pusAddress;
  while (
      !((*((volatile unsigned long *)(0x400FB700 + 0x000000004))) & ulFlag)) {
  }
  if ((*((volatile unsigned long *)(0x400FB700 + 0x000000020))) == 0x00000005) {
    pusAddress = (unsigned short *)(*(
        (volatile unsigned long *)(0x400FB700 + 0x000000024)));
    *pusAddress = (unsigned short)(*(
        (volatile unsigned long *)(0x400FB700 + 0x000000028)));
    (*((volatile unsigned long *)(0x400FB700 + 0x00000002C))) =
        (unsigned long)*pusAddress;
    (*((volatile unsigned long *)(0x400FB700 + 0x000000000))) |=
        (ulStatusFlag | ulFlag);
  } else if (((*((volatile unsigned long *)(0x400FB700 + 0x000000020))) ==
              0x00000006)) {
    pulAddress = (unsigned long *)(*(
        (volatile unsigned long *)(0x400FB700 + 0x000000024)));
    *pulAddress = (*((volatile unsigned long *)(0x400FB700 + 0x000000028)));
    (*((volatile unsigned long *)(0x400FB700 + 0x00000002C))) = *pulAddress;
    (*((volatile unsigned long *)(0x400FB700 + 0x000000000))) |=
        (ulStatusFlag | ulFlag);
  } else {
    (*((volatile unsigned long *)(0x400FB700 + 0x000000000))) |= (ulFlag);
  }
}


x86 assembly (clang, -O0):
<IPCLiteCtoMDataWrite>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x400fb704,%eax
mov    (%rax),%rax
and    -0x8(%rbp),%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    112e <IPCLiteCtoMDataWrite+0x2e>
jmp    1133 <IPCLiteCtoMDataWrite+0x33>
jmp    110c <IPCLiteCtoMDataWrite+0xc>
mov    $0x400fb720,%eax
mov    (%rax),%rax
cmp    $0x5,%rax
jne    1194 <IPCLiteCtoMDataWrite+0x94>
mov    $0x400fb724,%eax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    $0x400fb728,%eax
mov    (%rax),%rax
mov    %ax,%cx
mov    -0x20(%rbp),%rax
mov    %cx,(%rax)
mov    -0x20(%rbp),%rax
movzwl (%rax),%eax
mov    %eax,%ecx
mov    $0x400fb72c,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
or     -0x8(%rbp),%rax
mov    $0x400fb700,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x400fb700,%eax
mov    %rcx,(%rax)
jmp    120c <IPCLiteCtoMDataWrite+0x10c>
mov    $0x400fb720,%eax
mov    (%rax),%rax
cmp    $0x6,%rax
jne    11f0 <IPCLiteCtoMDataWrite+0xf0>
mov    $0x400fb724,%eax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    $0x400fb728,%eax
mov    (%rax),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
mov    $0x400fb72c,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
or     -0x8(%rbp),%rax
mov    $0x400fb700,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x400fb700,%eax
mov    %rcx,(%rax)
jmp    1207 <IPCLiteCtoMDataWrite+0x107>
mov    -0x8(%rbp),%rax
mov    $0x400fb700,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x400fb700,%eax
mov    %rcx,(%rax)
jmp    120c <IPCLiteCtoMDataWrite+0x10c>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IPCLiteCtoMDataWrite>:
mov    0x400fb704,%rax
40
and    %rdi,%rax
je     1100 <IPCLiteCtoMDataWrite>
mov    0x400fb720,%rax
40
cmp    $0x5,%rax
jne    113b <IPCLiteCtoMDataWrite+0x3b>
mov    0x400fb724,%rax
40
mov    0x400fb728,%rcx
40
mov    %cx,(%rax)
movzwl %cx,%eax
mov    %rax,0x400fb72c
40
jmp    1164 <IPCLiteCtoMDataWrite+0x64>
mov    0x400fb720,%rax
40
cmp    $0x6,%rax
jne    1171 <IPCLiteCtoMDataWrite+0x71>
mov    0x400fb724,%rax
40
mov    0x400fb728,%rcx
40
mov    %rcx,(%rax)
mov    %rcx,0x400fb72c
40
or     %rdi,%rsi
mov    0x400fb700,%rdi
40
jmp    1179 <IPCLiteCtoMDataWrite+0x79>
mov    0x400fb700,%rsi
40
or     %rsi,%rdi
mov    %rdi,0x400fb700
40
ret

LLVM IR (-O0):
define void @IPCLiteCtoMDataWrite(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64*
%6 = alloca i16*
store i64 %0, i64* %3
store i64 %1, i64* %4
br label %7
7: ; preds = %13, %2
%8 = load volatile i64, i64* inttoptr (i64 1074771716 to i64*)
%9 = load i64, i64* %3
%10 = and i64 %8, %9
%11 = icmp ne i64 %10, 0
%12 = xor i1 %11, true
br i1 %12, label %13, label %14
13: ; preds = %7
br label %7
14: ; preds = %7
%15 = load volatile i64, i64* inttoptr (i64 1074771744 to i64*)
%16 = icmp eq i64 %15, 5
br i1 %16, label %17, label %31
17: ; preds = %14
%18 = load volatile i64, i64* inttoptr (i64 1074771748 to i64*)
%19 = inttoptr i64 %18 to i16*
store i16* %19, i16** %6
%20 = load volatile i64, i64* inttoptr (i64 1074771752 to i64*)
%21 = trunc i64 %20 to i16
%22 = load i16*, i16** %6
store i16 %21, i16* %22
%23 = load i16*, i16** %6
%24 = load i16, i16* %23
%25 = zext i16 %24 to i64
store volatile i64 %25, i64* inttoptr (i64 1074771756 to i64*)
%26 = load i64, i64* %4
%27 = load i64, i64* %3
%28 = or i64 %26, %27
%29 = load volatile i64, i64* inttoptr (i64 1074771712 to i64*)
%30 = or i64 %29, %28
store volatile i64 %30, i64* inttoptr (i64 1074771712 to i64*)
br label %51
31: ; preds = %14
%32 = load volatile i64, i64* inttoptr (i64 1074771744 to i64*)
%33 = icmp eq i64 %32, 6
br i1 %33, label %34, label %46
34: ; preds = %31
%35 = load volatile i64, i64* inttoptr (i64 1074771748 to i64*)
%36 = inttoptr i64 %35 to i64*
store i64* %36, i64** %5
%37 = load volatile i64, i64* inttoptr (i64 1074771752 to i64*)
%38 = load i64*, i64** %5
store i64 %37, i64* %38
%39 = load i64*, i64** %5
%40 = load i64, i64* %39
store volatile i64 %40, i64* inttoptr (i64 1074771756 to i64*)
%41 = load i64, i64* %4
%42 = load i64, i64* %3
%43 = or i64 %41, %42
%44 = load volatile i64, i64* inttoptr (i64 1074771712 to i64*)
%45 = or i64 %44, %43
store volatile i64 %45, i64* inttoptr (i64 1074771712 to i64*)
br label %50
46: ; preds = %31
%47 = load i64, i64* %3
%48 = load volatile i64, i64* inttoptr (i64 1074771712 to i64*)
%49 = or i64 %48, %47
store volatile i64 %49, i64* inttoptr (i64 1074771712 to i64*)
br label %50
50: ; preds = %46, %34
br label %51
51: ; preds = %50, %17
ret void
}

LLVM IR (-O2):
define void @IPCLiteCtoMDataWrite(i64 %0, i64 %1) {
br label %3
3: ; preds = %3, %2
%4 = load volatile i64, i64* inttoptr (i64 1074771716 to i64*)
%5 = and i64 %4, %0
%6 = icmp eq i64 %5, 0
br i1 %6, label %3, label %7
7: ; preds = %3
%8 = load volatile i64, i64* inttoptr (i64 1074771744 to i64*)
%9 = icmp eq i64 %8, 5
br i1 %9, label %10, label %18
10: ; preds = %7
%11 = load volatile i64, i64* inttoptr (i64 1074771748 to i64*)
%12 = inttoptr i64 %11 to i16*
%13 = load volatile i64, i64* inttoptr (i64 1074771752 to i64*)
%14 = trunc i64 %13 to i16
store i16 %14, i16* %12
%15 = and i64 %13, 65535
store volatile i64 %15, i64* inttoptr (i64 1074771756 to i64*)
%16 = or i64 %1, %0
%17 = load volatile i64, i64* inttoptr (i64 1074771712 to i64*)
br label %29
18: ; preds = %7
%19 = load volatile i64, i64* inttoptr (i64 1074771744 to i64*)
%20 = icmp eq i64 %19, 6
br i1 %20, label %21, label %27
21: ; preds = %18
%22 = load volatile i64, i64* inttoptr (i64 1074771748 to i64*)
%23 = inttoptr i64 %22 to i64*
%24 = load volatile i64, i64* inttoptr (i64 1074771752 to i64*)
store i64 %24, i64* %23
store volatile i64 %24, i64* inttoptr (i64 1074771756 to i64*)
%25 = or i64 %1, %0
%26 = load volatile i64, i64* inttoptr (i64 1074771712 to i64*)
br label %29
27: ; preds = %18
%28 = load volatile i64, i64* inttoptr (i64 1074771712 to i64*)
br label %29
29: ; preds = %21, %27, %10
%30 = phi i64 [ %26, %21 ], [ %0, %27 ], [ %17, %10 ]
%31 = phi i64 [ %25, %21 ], [ %28, %27 ], [ %16, %10 ]
%32 = or i64 %31, %30
store volatile i64 %32, i64* inttoptr (i64 1074771712 to i64*)
ret void
}