xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void schmedak15() {
  printf("Schmedak15 likes a nice chicken cordon bleu, some spaetzel, and "
         "black forest cake.\n");
}


x86 assembly (clang, -O0):
<schmedak15>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<schmedak15>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [84 x i8] c"Schmedak15 likes a nice chicken cordon bleu, some spaetzel, and black forest cake.\0A\00"
define void @schmedak15() {
%1 = call i32 @printf(i8* getelementptr inbounds ([84 x i8], [84 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [83 x i8] c"Schmedak15 likes a nice chicken cordon bleu, some spaetzel, and black forest cake.\00"
define void @schmedak15() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([83 x i8], [83 x i8]* @str, i64 0, i64 0))
ret void
}
void test_vfprintf() {}


x86 assembly (clang, -O0):
<test_vfprintf>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_vfprintf>:
ret

LLVM IR (-O0):
define void @test_vfprintf() {
ret void
}

LLVM IR (-O2):
define void @test_vfprintf() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ WINDOW;

/* Variables and functions */
int /*<<< orphan*/ waddstr(int /*<<< orphan*/ *, char const *);
void wprint(WINDOW *win, const char str[]) { waddstr(win, str); }


x86 assembly (clang, -O0):
<wprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <waddstr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wprint>:
jmp    1030 <waddstr@plt>

LLVM IR (-O0):
define void @wprint(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i32 @waddstr(i32* %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @wprint(i32* %0, i8* %1) {
%3 = tail call i32 @waddstr(i32* %0, i8* %1)
ret void
}
/* Variables and functions */
float bounce_in(float, float, float);
float bounce_f_in(float step, float max_steps, float max_val) {
  return bounce_in(step, max_steps, max_val);
}


x86 assembly (clang, -O0):
<bounce_f_in>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
call   1030 <bounce_in@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bounce_f_in>:
jmp    1030 <bounce_in@plt>

LLVM IR (-O0):
define float @bounce_f_in(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call float @bounce_in(float %7, float %8, float %9)
ret float %10
}

LLVM IR (-O2):
define float @bounce_f_in(float %0, float %1, float %2) {
%4 = tail call float @bounce_in(float %0, float %1, float %2)
ret float %4
}
int g(int a, int b, int c) { return a + b + c; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
ret

LLVM IR (-O0):
define i32 @g(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %6
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @g(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, %0
%5 = add nsw i32 %4, %2
ret i32 %5
}
unsigned int SwitchEndianness(unsigned int x) {
  return ((x & 0xFF) << 24) | ((x & 0xFF00) << 8) | ((x & 0xFF0000) >> 8) |
         ((x & 0xFF000000) >> 24);
}


x86 assembly (clang, -O0):
<SwitchEndianness>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
shr    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
shr    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SwitchEndianness>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @SwitchEndianness(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = shl i32 %4, 24
%6 = load i32, i32* %2
%7 = and i32 %6, 65280
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 16711680
%12 = lshr i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, -16777216
%16 = lshr i32 %15, 24
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @SwitchEndianness(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
void HMAC_Init_ex(void) {}


x86 assembly (clang, -O0):
<HMAC_Init_ex>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HMAC_Init_ex>:
ret

LLVM IR (-O0):
define void @HMAC_Init_ex() {
ret void
}

LLVM IR (-O2):
define void @HMAC_Init_ex() {
ret void
}
void HDrawRectangle(int x0, int y0, int x1, int y1) {}


x86 assembly (clang, -O0):
<HDrawRectangle>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<HDrawRectangle>:
ret

LLVM IR (-O0):
define void @HDrawRectangle(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @HDrawRectangle(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("MBEDTLS_MD5_C not defined.\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"MBEDTLS_MD5_C not defined.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [27 x i8] c"MBEDTLS_MD5_C not defined.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern void shmem_longlong_max_to_all(long long *target, long long *source,
                                      int nreduce, int PE_start,
                                      int logPE_stride, int PE_size,
                                      long long *pWrk, long *pSync) {
  printf("\nOpenSHMEM Analyzer\n");
}


x86 assembly (clang, -O0):
<shmem_longlong_max_to_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_longlong_max_to_all>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0AOpenSHMEM Analyzer\0A\00"
define void @shmem_longlong_max_to_all(i64* %0, i64* %1, i32 %2, i32 %3, i32 %4, i32 %5, i64* %6, i64* %7) {
%9 = alloca i64*
%10 = alloca i64*
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i64*
%16 = alloca i64*
store i64* %0, i64** %9
store i64* %1, i64** %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i64* %6, i64** %15
store i64* %7, i64** %16
%17 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"\0AOpenSHMEM Analyzer\00"
define void @shmem_longlong_max_to_all(i64* nocapture readnone %0, i64* nocapture readnone %1, i32 %2, i32 %3, i32 %4, i32 %5, i64* nocapture readnone %6, i64* nocapture readnone %7) {
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
int mhp_revectored(int inum) { return 0; }


x86 assembly (clang, -O0):
<mhp_revectored>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mhp_revectored>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mhp_revectored(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @mhp_revectored(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
void intToString(char s[], int num) { sprintf(s, "%d", num); }


x86 assembly (clang, -O0):
<intToString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intToString>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @intToString(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @intToString(i8* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};
typedef int /*<<< orphan*/ clockid_t;

/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
int syscall(int, int /*<<< orphan*/, struct timespec *);
__attribute__((visibility("default"))) int clock_gettime(clockid_t clk_id,
                                                         struct timespec *tp) {
  return syscall(228, CLOCK_REALTIME, tp);
}


x86 assembly (clang, -O0):
<clock_gettime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
mov    $0xe4,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock_gettime>:
mov    %rsi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%esi
mov    $0xe4,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
define i32 @clock_gettime(i32 %0, %struct.timespec* %1) {
%3 = alloca i32
%4 = alloca %struct.timespec*
store i32 %0, i32* %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load i32, i32* @CLOCK_REALTIME
%6 = load %struct.timespec*, %struct.timespec** %4
%7 = call i32 @syscall(i32 228, i32 %5, %struct.timespec* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@CLOCK_REALTIME = global i32 0
define i32 @clock_gettime(i32 %0, %struct.timespec* %1) {
%3 = load i32, i32* @CLOCK_REALTIME
%4 = tail call i32 @syscall(i32 228, i32 %3, %struct.timespec* %1)
ret i32 %4
}
/* Variables and functions */
int NI_USUAL_PFI_SELECT(unsigned int);
unsigned NI_EXT_PFI(unsigned pfi_channel) {
  return NI_USUAL_PFI_SELECT(pfi_channel) - 1;
}


x86 assembly (clang, -O0):
<NI_EXT_PFI>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <NI_USUAL_PFI_SELECT@plt>
sub    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NI_EXT_PFI>:
push   %rax
call   1030 <NI_USUAL_PFI_SELECT@plt>
add    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @NI_EXT_PFI(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @NI_USUAL_PFI_SELECT(i32 %3)
%5 = sub nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @NI_EXT_PFI(i32 %0) {
%2 = tail call i32 @NI_USUAL_PFI_SELECT(i32 %0)
%3 = add nsw i32 %2, -1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ gpio_write_data(int);
void operation_i2c_stop() {
  gpio_write_data((0 << 1) | (1 << 0));
  gpio_write_data((1 << 1) | (1 << 0));
}


x86 assembly (clang, -O0):
<operation_i2c_stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <gpio_write_data@plt>
mov    $0x3,%edi
call   1030 <gpio_write_data@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<operation_i2c_stop>:
push   %rax
mov    $0x1,%edi
call   1030 <gpio_write_data@plt>
mov    $0x3,%edi
pop    %rax
jmp    1030 <gpio_write_data@plt>

LLVM IR (-O0):
define void @operation_i2c_stop() {
%1 = call i32 @gpio_write_data(i32 1)
%2 = call i32 @gpio_write_data(i32 3)
ret void
}

LLVM IR (-O2):
define void @operation_i2c_stop() {
%1 = tail call i32 @gpio_write_data(i32 1)
%2 = tail call i32 @gpio_write_data(i32 3)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void EPIDMATxCount(uint32_t ui32Base, uint32_t ui32Count) {
  ;
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000208))) = ui32Count & 0xffff;
}


x86 assembly (clang, -O0):
<EPIDMATxCount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
and    $0xffff,%ecx
mov    -0x4(%rbp),%eax
add    $0x208,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPIDMATxCount>:
movzwl %si,%eax
movslq %edi,%rcx
mov    %eax,0x208(%rcx)
ret

LLVM IR (-O0):
define void @EPIDMATxCount(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 65535
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 520
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 %6, i32* %10
ret void
}

LLVM IR (-O2):
define void @EPIDMATxCount(i32 %0, i32 %1) {
%3 = and i32 %1, 65535
%4 = add nsw i32 %0, 520
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
store volatile i32 %3, i32* %6
ret void
}
int containsChar(char *str, char what) {
  char *c = str;
  if (!c)
    return 0;
  while (*c) {
    if (*c == what)
      return 1;
    c++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<containsChar>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    112d <containsChar+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    1176 <containsChar+0x76>
jmp    1132 <containsChar+0x32>
mov    -0x20(%rbp),%rax
cmpb   $0x0,(%rax)
je     116f <containsChar+0x6f>
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    115e <containsChar+0x5e>
movl   $0x1,-0x4(%rbp)
jmp    1176 <containsChar+0x76>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1132 <containsChar+0x32>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<containsChar>:
xor    %eax,%eax
test   %rdi,%rdi
je     1130 <containsChar+0x30>
mov    (%rdi),%cl
test   %cl,%cl
je     1130 <containsChar+0x30>
add    $0x1,%rdi
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
cmp    %sil,%cl
je     1131 <containsChar+0x31>
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1120 <containsChar+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @containsChar(i8* %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
%7 = load i8*, i8** %4
store i8* %7, i8** %6
%8 = load i8*, i8** %6
%9 = icmp ne i8* %8, null
br i1 %9, label %11, label %10
10: ; preds = %2
store i32 0, i32* %3
br label %28
11: ; preds = %2
br label %12
12: ; preds = %24, %11
%13 = load i8*, i8** %6
%14 = load i8, i8* %13
%15 = icmp ne i8 %14, 0
br i1 %15, label %16, label %27
16: ; preds = %12
%17 = load i8*, i8** %6
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = load i8, i8* %5
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %19, %21
br i1 %22, label %23, label %24
23: ; preds = %16
store i32 1, i32* %3
br label %28
24: ; preds = %16
%25 = load i8*, i8** %6
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %6
br label %12
27: ; preds = %12
store i32 0, i32* %3
br label %28
28: ; preds = %27, %23, %10
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @containsChar(i8* %0, i8 signext %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %15, label %4
4: ; preds = %2
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, 0
br i1 %6, label %15, label %10
7: ; preds = %10
%8 = load i8, i8* %14
%9 = icmp eq i8 %8, 0
br i1 %9, label %15, label %10
10: ; preds = %4, %7
%11 = phi i8 [ %8, %7 ], [ %5, %4 ]
%12 = phi i8* [ %14, %7 ], [ %0, %4 ]
%13 = icmp eq i8 %11, %1
%14 = getelementptr inbounds i8, i8* %12, i64 1
br i1 %13, label %15, label %7
15: ; preds = %10, %7, %4, %2
%16 = phi i32 [ 0, %2 ], [ 0, %4 ], [ 1, %10 ], [ 0, %7 ]
ret i32 %16
}
void init_required_fw_features(void) {
  extern void _init_focus_eventflag();
  _init_focus_eventflag();
}


x86 assembly (clang, -O0):
<init_required_fw_features>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_init_focus_eventflag@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_required_fw_features>:
xor    %eax,%eax
jmp    1030 <_init_focus_eventflag@plt>

LLVM IR (-O0):
define void @init_required_fw_features() {
ret void
}

LLVM IR (-O2):
define void @init_required_fw_features() {
tail call void (...) @_init_focus_eventflag()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isprint(int);
void t_isprint_0x6d() {
  Assert_real((isprint(109)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              550, ("isprint should be 1 for m"));
}


x86 assembly (clang, -O0):
<t_isprint_0x6d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6d,%edi
call   1030 <isprint@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x226,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x6d>:
push   %rax
mov    $0x6d,%edi
call   1030 <isprint@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x226,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for m\00"
define void @t_isprint_0x6d() {
%1 = call i32 @isprint(i32 109)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 550, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for m\00"
define void @t_isprint_0x6d() {
%1 = tail call i32 @isprint(i32 109)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 550, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void md5sum() {}


x86 assembly (clang, -O0):
<md5sum>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<md5sum>:
ret

LLVM IR (-O0):
define void @md5sum() {
ret void
}

LLVM IR (-O2):
define void @md5sum() {
ret void
}
void RTThreadSetName(void) {}


x86 assembly (clang, -O0):
<RTThreadSetName>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTThreadSetName>:
ret

LLVM IR (-O0):
define void @RTThreadSetName() {
ret void
}

LLVM IR (-O2):
define void @RTThreadSetName() {
ret void
}
unsigned xfs_sb_version_toold(unsigned v) {
  return (((v) & (0x0040 | 0x0080))
              ? 0
              : (((v)&0x0020) ? 3 : (((v)&0x0010) ? 2 : 1)));
}


x86 assembly (clang, -O0):
<xfs_sb_version_toold>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xc0,%eax
cmp    $0x0,%eax
je     1122 <xfs_sb_version_toold+0x22>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    115d <xfs_sb_version_toold+0x5d>
mov    -0x4(%rbp),%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     113e <xfs_sb_version_toold+0x3e>
mov    $0x3,%eax
mov    %eax,-0xc(%rbp)
jmp    1157 <xfs_sb_version_toold+0x57>
mov    -0x4(%rbp),%edx
and    $0x10,%edx
mov    $0x1,%eax
mov    $0x2,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfs_sb_version_toold>:
xor    %eax,%eax
test   $0xc0,%dil
je     1109 <xfs_sb_version_toold+0x9>
ret
mov    $0x3,%eax
test   $0x20,%dil
jne    1108 <xfs_sb_version_toold+0x8>
and    $0x10,%edi
cmp    $0x1,%edi
mov    $0x2,%eax
sbb    $0x0,%eax
ret

LLVM IR (-O0):
define i32 @xfs_sb_version_toold(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 192
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %20
7: ; preds = %1
%8 = load i32, i32* %2
%9 = and i32 %8, 32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
br label %18
12: ; preds = %7
%13 = load i32, i32* %2
%14 = and i32 %13, 16
%15 = icmp ne i32 %14, 0
%16 = zext i1 %15 to i64
%17 = select i1 %15, i32 2, i32 1
br label %18
18: ; preds = %12, %11
%19 = phi i32 [ 3, %11 ], [ %17, %12 ]
br label %20
20: ; preds = %18, %6
%21 = phi i32 [ 0, %6 ], [ %19, %18 ]
ret i32 %21
}

LLVM IR (-O2):
define i32 @xfs_sb_version_toold(i32 %0) {
%2 = and i32 %0, 192
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = and i32 %0, 32
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = and i32 %0, 16
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 1, i32 2
br label %11
11: ; preds = %7, %4, %1
%12 = phi i32 [ 0, %1 ], [ %10, %7 ], [ 3, %4 ]
ret i32 %12
}
/* Type definitions */
struct lvar_leaf_entry {
  int dummy;
};
struct iam_leaf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ e_keysize(struct lvar_leaf_entry const *);
int /*<<< orphan*/ e_rec(struct lvar_leaf_entry const *);
int getsize(struct iam_leaf const *, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ rec_size(int /*<<< orphan*/);
int e_size(const struct iam_leaf *leaf, const struct lvar_leaf_entry *ent) {
  return getsize(leaf, e_keysize(ent), rec_size(e_rec(ent)));
}


x86 assembly (clang, -O0):
<e_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <e_keysize@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <e_rec@plt>
mov    %eax,%edi
call   1030 <rec_size@plt>
mov    -0x20(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    %eax,%edx
call   1060 <getsize@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_size>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <e_keysize@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1050 <e_rec@plt>
mov    %eax,%edi
call   1030 <rec_size@plt>
mov    %r14,%rdi
mov    %ebp,%esi
mov    %eax,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1060 <getsize@plt>

LLVM IR (-O0):
%struct.iam_leaf = type { i32 }
%struct.lvar_leaf_entry = type { i32 }
define i32 @e_size(%struct.iam_leaf* %0, %struct.lvar_leaf_entry* %1) {
%3 = alloca %struct.iam_leaf*
%4 = alloca %struct.lvar_leaf_entry*
store %struct.iam_leaf* %0, %struct.iam_leaf** %3
store %struct.lvar_leaf_entry* %1, %struct.lvar_leaf_entry** %4
%5 = load %struct.iam_leaf*, %struct.iam_leaf** %3
%6 = load %struct.lvar_leaf_entry*, %struct.lvar_leaf_entry** %4
%7 = call i32 @e_keysize(%struct.lvar_leaf_entry* %6)
%8 = load %struct.lvar_leaf_entry*, %struct.lvar_leaf_entry** %4
%9 = call i32 @e_rec(%struct.lvar_leaf_entry* %8)
%10 = call i32 @rec_size(i32 %9)
%11 = call i32 @getsize(%struct.iam_leaf* %5, i32 %7, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.iam_leaf = type { i32 }
%struct.lvar_leaf_entry = type { i32 }
define i32 @e_size(%struct.iam_leaf* %0, %struct.lvar_leaf_entry* %1) {
%3 = tail call i32 @e_keysize(%struct.lvar_leaf_entry* %1)
%4 = tail call i32 @e_rec(%struct.lvar_leaf_entry* %1)
%5 = tail call i32 @rec_size(i32 %4)
%6 = tail call i32 @getsize(%struct.iam_leaf* %0, i32 %3, i32 %5)
ret i32 %6
}
int tolower(int c) { return c | (((unsigned)c - 'A' < 26) << 5); }


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x41,%ecx
cmp    $0x1a,%ecx
setb   %cl
and    $0x1,%cl
movzbl %cl,%ecx
shl    $0x5,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
lea    -0x41(%rdi),%ecx
xor    %eax,%eax
cmp    $0x1a,%ecx
setb   %al
shl    $0x5,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub i32 %4, 65
%6 = icmp ult i32 %5, 26
%7 = zext i1 %6 to i32
%8 = shl i32 %7, 5
%9 = or i32 %3, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @tolower(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = select i1 %3, i32 32, i32 0
%5 = or i32 %4, %0
ret i32 %5
}
int((foo))(int wat) { return wat; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @foo(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
void *malloc(long long);
void x_cgo_malloc(void *p) {
  struct a {
    long long n;
    void *ret;
  } *a = p;
  a->ret = malloc(a->n);
}


x86 assembly (clang, -O0):
<x_cgo_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <malloc@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x8(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x_cgo_malloc>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <malloc@plt>
mov    %rax,0x8(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
%struct.a = type { i64, i8* }
define void @x_cgo_malloc(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.a*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.a*
store %struct.a* %5, %struct.a** %3
%6 = load %struct.a*, %struct.a** %3
%7 = getelementptr inbounds %struct.a, %struct.a* %6, i32 0, i32 0
%8 = load i64, i64* %7
%9 = call i8* @malloc(i64 %8)
%10 = load %struct.a*, %struct.a** %3
%11 = getelementptr inbounds %struct.a, %struct.a* %10, i32 0, i32 1
store i8* %9, i8** %11
ret void
}

LLVM IR (-O2):
define void @x_cgo_malloc(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = tail call i8* @malloc(i64 %3)
%5 = getelementptr inbounds i8, i8* %0, i64 8
%6 = bitcast i8* %5 to i8**
store i8* %4, i8** %6
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int nanosleep(struct timespec const *, struct timespec *);
int my_nanosleep(const struct timespec *req, struct timespec *rem) {
  return nanosleep(req, rem);
}


x86 assembly (clang, -O0):
<my_nanosleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_nanosleep>:
jmp    1030 <nanosleep@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i32 @my_nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %3
%6 = load %struct.timespec*, %struct.timespec** %4
%7 = call i32 @nanosleep(%struct.timespec* %5, %struct.timespec* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define i32 @my_nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = tail call i32 @nanosleep(%struct.timespec* %0, %struct.timespec* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ccppvector_free_(float ***pppVector) { free((void *)pppVector); }


x86 assembly (clang, -O0):
<ccppvector_free_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccppvector_free_>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @ccppvector_free_(float*** %0) {
%2 = alloca float***
store float*** %0, float**** %2
%3 = load float***, float**** %2
%4 = bitcast float*** %3 to i8*
%5 = call i32 @free(i8* %4)
ret void
}

LLVM IR (-O2):
define void @ccppvector_free_(float*** nocapture %0) {
%2 = bitcast float*** %0 to i8*
%3 = tail call i32 @free(i8* %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ android_atomic_add(int, int /*<<< orphan*/ volatile *);
int32_t android_atomic_inc(volatile int32_t *addr) {
  return android_atomic_add(1, addr);
}


x86 assembly (clang, -O0):
<android_atomic_inc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <android_atomic_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<android_atomic_inc>:
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <android_atomic_add@plt>

LLVM IR (-O0):
define i32 @android_atomic_inc(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @android_atomic_add(i32 1, i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @android_atomic_inc(i32* %0) {
%2 = tail call i32 @android_atomic_add(i32 1, i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ C67_asm(char *, int, int, int);
void C67_CMPGTU(int s1, int s2, int dst) { C67_asm("CMPGTU.L1", s1, s2, dst); }


x86 assembly (clang, -O0):
<C67_CMPGTU>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0xc(%rbp),%ecx
lea    0xecf(%rip),%rdi
call   1030 <C67_asm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<C67_CMPGTU>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee3(%rip),%rdi
jmp    1030 <C67_asm@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"CMPGTU.L1\00"
define void @C67_CMPGTU(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @C67_asm(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"CMPGTU.L1\00"
define void @C67_CMPGTU(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @C67_asm(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %2)
ret void
}
/* Variables and functions */
double __builtin_wasm_min_f64(double, double);
scalar_t__ isnan(double);
double fmin(double x, double y) {
  if (isnan(x))
    return y;
  if (isnan(y))
    return x;
  return __builtin_wasm_min_f64(x, y);
}


x86 assembly (clang, -O0):
<fmin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1040 <isnan@plt>
cmp    $0x0,%rax
je     1155 <fmin+0x35>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    118c <fmin+0x6c>
movsd  -0x18(%rbp),%xmm0
call   1040 <isnan@plt>
cmp    $0x0,%rax
je     1178 <fmin+0x58>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    118c <fmin+0x6c>
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
call   1030 <__builtin_wasm_min_f64@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmin>:
sub    $0x18,%rsp
movsd  %xmm1,0x8(%rsp)
movsd  %xmm0,0x10(%rsp)
call   1040 <isnan@plt>
test   %rax,%rax
je     1145 <fmin+0x25>
movsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret
movsd  0x8(%rsp),%xmm0
call   1040 <isnan@plt>
test   %rax,%rax
je     1160 <fmin+0x40>
movsd  0x10(%rsp),%xmm0
add    $0x18,%rsp
ret
movsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
add    $0x18,%rsp
jmp    1030 <__builtin_wasm_min_f64@plt>

LLVM IR (-O0):
define double @fmin(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = call i64 @isnan(double %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load double, double* %5
store double %10, double* %3
br label %21
11: ; preds = %2
%12 = load double, double* %5
%13 = call i64 @isnan(double %12)
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load double, double* %4
store double %16, double* %3
br label %21
17: ; preds = %11
%18 = load double, double* %4
%19 = load double, double* %5
%20 = call double @__builtin_wasm_min_f64(double %18, double %19)
store double %20, double* %3
br label %21
21: ; preds = %17, %15, %9
%22 = load double, double* %3
ret double %22
}

LLVM IR (-O2):
define double @fmin(double %0, double %1) {
%3 = tail call i64 @isnan(double %0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = tail call i64 @isnan(double %1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call double @__builtin_wasm_min_f64(double %0, double %1)
br label %10
10: ; preds = %5, %2, %8
%11 = phi double [ %9, %8 ], [ %1, %2 ], [ %0, %5 ]
ret double %11
}
/* Variables and functions */
int /*<<< orphan*/ glRotatef(double, int, int /*<<< orphan*/,
                             int /*<<< orphan*/);
int /*<<< orphan*/ glutPostRedisplay();
void bidle(void) {
  glRotatef(-.1, 1, 0, 0);
  glutPostRedisplay();
}


x86 assembly (clang, -O0):
<bidle>:
push   %rbp
mov    %rsp,%rbp
movsd  0xed4(%rip),%xmm0
mov    $0x1,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1040 <glRotatef@plt>
mov    $0x0,%al
call   1030 <glutPostRedisplay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bidle>:
push   %rax
movsd  0xed7(%rip),%xmm0
mov    $0x1,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1040 <glRotatef@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <glutPostRedisplay@plt>

LLVM IR (-O0):
define void @bidle() {
%1 = call i32 @glRotatef(double -1.000000e-01, i32 1, i32 0, i32 0)
%2 = call i32 (...) @glutPostRedisplay()
ret void
}

LLVM IR (-O2):
define void @bidle() {
%1 = tail call i32 @glRotatef(double -1.000000e-01, i32 1, i32 0, i32 0)
%2 = tail call i32 (...) @glutPostRedisplay()
ret void
}
__attribute__((always_)) long prctl_set_seccomp(unsigned long arg2) {
  return -22;
}


x86 assembly (clang, -O0):
<prctl_set_seccomp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffffffffffea,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<prctl_set_seccomp>:
mov    $0xffffffffffffffea,%rax
ret

LLVM IR (-O0):
define i64 @prctl_set_seccomp(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret i64 -22
}

LLVM IR (-O2):
define i64 @prctl_set_seccomp(i64 %0) {
ret i64 -22
}
void fn_pa_1(void) {}


x86 assembly (clang, -O0):
<fn_pa_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_pa_1>:
ret

LLVM IR (-O0):
define void @fn_pa_1() {
ret void
}

LLVM IR (-O2):
define void @fn_pa_1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cont(int /*<<< orphan*/);
int eval_(int, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ f();
int /*<<< orphan*/ var(int /*<<< orphan*/);
int eval(int cell) { return eval_(cell, f(), cont(var(0))); }


x86 assembly (clang, -O0):
<eval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1040 <f@plt>
mov    %eax,-0x8(%rbp)
xor    %edi,%edi
call   1050 <var@plt>
mov    %eax,%edi
call   1030 <cont@plt>
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    %eax,%edx
call   1060 <eval_@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eval>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <f@plt>
mov    %eax,%ebp
xor    %edi,%edi
call   1050 <var@plt>
mov    %eax,%edi
call   1030 <cont@plt>
mov    %ebx,%edi
mov    %ebp,%esi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1060 <eval_@plt>

LLVM IR (-O0):
define i32 @eval(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (...) @f()
%5 = call i32 @var(i32 0)
%6 = call i32 @cont(i32 %5)
%7 = call i32 @eval_(i32 %3, i32 %4, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @eval(i32 %0) {
%2 = tail call i32 (...) @f()
%3 = tail call i32 @var(i32 0)
%4 = tail call i32 @cont(i32 %3)
%5 = tail call i32 @eval_(i32 %0, i32 %2, i32 %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("%d\n", -11 % 5);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 -1)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 -1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char, int, int);
void min_output(int a, int b, int c, int type) {
  char t;
  if (type == 2) {
    t = '+';
  } else if (type == 3) {
    t = '*';
  }
  printf("\n%d %c %d = %d\n", a, t, b, c);
}


x86 assembly (clang, -O0):
<min_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
cmpl   $0x2,-0x10(%rbp)
jne    1137 <min_output+0x27>
movb   $0x2b,-0x11(%rbp)
jmp    114a <min_output+0x3a>
cmpl   $0x3,-0x10(%rbp)
jne    1145 <min_output+0x35>
movb   $0x2a,-0x11(%rbp)
jmp    114a <min_output+0x3a>
mov    -0x4(%rbp),%esi
mov    -0x11(%rbp),%al
mov    -0x8(%rbp),%ecx
mov    -0xc(%rbp),%r8d
lea    0xea2(%rip),%rdi
movsbl %al,%edx
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<min_output>:
mov    %edx,%r8d
mov    %esi,%eax
mov    %edi,%esi
xor    %edx,%edx
cmp    $0x3,%ecx
sete   %dl
xor    $0x2b,%edx
lea    0xed7(%rip),%rdi
mov    %eax,%ecx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"\0A%d %c %d = %d\0A\00"
define void @min_output(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i8
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %8
%11 = icmp eq i32 %10, 2
br i1 %11, label %12, label %13
12: ; preds = %4
store i8 43, i8* %9
br label %18
13: ; preds = %4
%14 = load i32, i32* %8
%15 = icmp eq i32 %14, 3
br i1 %15, label %16, label %17
16: ; preds = %13
store i8 42, i8* %9
br label %17
17: ; preds = %16, %13
br label %18
18: ; preds = %17, %12
%19 = load i32, i32* %5
%20 = load i8, i8* %9
%21 = load i32, i32* %6
%22 = load i32, i32* %7
%23 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %19, i8 signext %20, i32 %21, i32 %22)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"\0A%d %c %d = %d\0A\00"
define void @min_output(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp eq i32 %3, 3
%6 = select i1 %5, i8 42, i8 43
%7 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %0, i8 signext %6, i32 %1, i32 %2)
ret void
}
void *test_anti_range_78(int n) {
  extern void *alloc_anti_range_78(int) __attribute__((alloc_size(1)));
  if (1 <= n && n <= 1)
    n = 1 - 1;
  return alloc_anti_range_78(n);
}


x86 assembly (clang, -O0):
<test_anti_range_78>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
cmp    -0x4(%rbp),%eax
jg     113a <test_anti_range_78+0x2a>
cmpl   $0x1,-0x4(%rbp)
jg     113a <test_anti_range_78+0x2a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <alloc_anti_range_78@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_78>:
xor    %eax,%eax
cmp    $0x1,%edi
cmove  %eax,%edi
jmp    1030 <alloc_anti_range_78@plt>

LLVM IR (-O0):
define i8* @test_anti_range_78(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 1, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %5
store i32 0, i32* %2
br label %9
9: ; preds = %8, %5, %1
%10 = load i32, i32* %2
%11 = call i8* @alloc_anti_range_78(i32 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @test_anti_range_78(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i32 0, i32 %0
%4 = tail call i8* @alloc_anti_range_78(i32 %3)
ret i8* %4
}
/* Variables and functions */
scalar_t__ strcmp(char const *, int /*<<< orphan*/);
int isUserInGroup(const char *user, char **group) {
  while (*group) {
    if (strcmp(user, *group++) == 0)
      return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<isUserInGroup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpq   $0x0,(%rax)
je     1166 <isUserInGroup+0x56>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x18(%rbp)
mov    (%rax),%rax
mov    %eax,%esi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1161 <isUserInGroup+0x51>
movl   $0x1,-0x4(%rbp)
jmp    116d <isUserInGroup+0x5d>
jmp    1120 <isUserInGroup+0x10>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isUserInGroup>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
nopw   0x0(%rax,%rax,1)
mov    (%rbx),%rsi
test   %rsi,%rsi
je     1140 <isUserInGroup+0x30>
add    $0x8,%rbx
mov    %r14,%rdi
call   1030 <strcmp@plt>
test   %rax,%rax
jne    1120 <isUserInGroup+0x10>
mov    $0x1,%eax
jmp    1142 <isUserInGroup+0x32>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @isUserInGroup(i8* %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8**
store i8* %0, i8** %4
store i8** %1, i8*** %5
br label %6
6: ; preds = %19, %2
%7 = load i8**, i8*** %5
%8 = load i8*, i8** %7
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i32 1
store i8** %13, i8*** %5
%14 = load i8*, i8** %12
%15 = ptrtoint i8* %14 to i32
%16 = call i64 @strcmp(i8* %11, i32 %15)
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %10
store i32 1, i32* %3
br label %21
19: ; preds = %10
br label %6
20: ; preds = %6
store i32 0, i32* %3
br label %21
21: ; preds = %20, %18
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @isUserInGroup(i8* %0, i8** nocapture %1) {
br label %3
3: ; preds = %7, %2
%4 = phi i8** [ %1, %2 ], [ %8, %7 ]
%5 = load i8*, i8** %4
%6 = icmp eq i8* %5, null
br i1 %6, label %13, label %7
7: ; preds = %3
%8 = getelementptr inbounds i8*, i8** %4, i64 1
%9 = ptrtoint i8* %5 to i64
%10 = trunc i64 %9 to i32
%11 = tail call i64 @strcmp(i8* %0, i32 %10)
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %3
13: ; preds = %3, %7
%14 = phi i32 [ 1, %7 ], [ 0, %3 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ register_test(int (*)());
int bonjour(void) {
  register_test(bonjour);
  printf("ok");
  return (0);
}


x86 assembly (clang, -O0):
<bonjour>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rdi
call   1030 <register_test@plt>
lea    0xec9(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bonjour>:
push   %rax
mov    0x2eb8(%rip),%rdi
call   1030 <register_test@plt>
lea    0xecc(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"ok\00"
define i32 @bonjour() {
%1 = call i32 @register_test(i32 (...)* bitcast (i32 ()* @bonjour to i32 (...)*))
%2 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"ok\00"
define i32 @bonjour() {
%1 = tail call i32 @register_test(i32 (...)* bitcast (i32 ()* @bonjour to i32 (...)*))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cgincbloc(char *, int, int);
void cgdeclb(int a) { cgincbloc("sub", a, 1); }


x86 assembly (clang, -O0):
<cgdeclb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
mov    $0x1,%edx
call   1030 <cgincbloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgdeclb>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
mov    $0x1,%edx
jmp    1030 <cgincbloc@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"sub\00"
define void @cgdeclb(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cgincbloc(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3, i32 1)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"sub\00"
define void @cgdeclb(i32 %0) {
%2 = tail call i32 @cgincbloc(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0, i32 1)
ret void
}
/* Variables and functions */
bool nrf52_errata_172(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_172>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_172>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_172() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_172() {
ret i32 0
}
double doSomething(double in) { return in * 3 + 2; }


x86 assembly (clang, -O0):
<doSomething>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xee6(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<doSomething>:
mulsd  0xef8(%rip),%xmm0
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @doSomething(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.fmuladd.f64(double %3, double 3.000000e+00, double 2.000000e+00)
ret double %4
}

LLVM IR (-O2):
define double @doSomething(double %0) {
%2 = tail call double @llvm.fmuladd.f64(double %0, double 3.000000e+00, double 2.000000e+00)
ret double %2
}