void __attribute__((no, noclone))
vec_slp_float(float *restrict a, float *restrict b, int n) {
  for (int i = 0; i < n; ++i) {
    a[i * 2] += 1;
    a[i * 2 + 1] += 2;
    b[i * 4] += 3;
    b[i * 4 + 1] += 4;
    b[i * 4 + 2] += 5;
    b[i * 4 + 3] += 6;
  }
}


x86 assembly (clang, -O0):
<vec_slp_float>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    11f6 <vec_slp_float+0xf6>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%ecx
shl    $0x1,%ecx
movslq %ecx,%rcx
movss  0xedd(%rip),%xmm0
addss  (%rax,%rcx,4),%xmm0
movss  %xmm0,(%rax,%rcx,4)
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%ecx
shl    $0x1,%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
movss  0xeb7(%rip),%xmm0
addss  (%rax,%rcx,4),%xmm0
movss  %xmm0,(%rax,%rcx,4)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%ecx
shl    $0x2,%ecx
movslq %ecx,%rcx
movss  0xe94(%rip),%xmm0
addss  (%rax,%rcx,4),%xmm0
movss  %xmm0,(%rax,%rcx,4)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%ecx
shl    $0x2,%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
movss  0xe6e(%rip),%xmm0
addss  (%rax,%rcx,4),%xmm0
movss  %xmm0,(%rax,%rcx,4)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%ecx
shl    $0x2,%ecx
add    $0x2,%ecx
movslq %ecx,%rcx
movss  0xe48(%rip),%xmm0
addss  (%rax,%rcx,4),%xmm0
movss  %xmm0,(%rax,%rcx,4)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%ecx
shl    $0x2,%ecx
add    $0x3,%ecx
movslq %ecx,%rcx
movss  0xe22(%rip),%xmm0
addss  (%rax,%rcx,4),%xmm0
movss  %xmm0,(%rax,%rcx,4)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1116 <vec_slp_float+0x16>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec_slp_float>:
test   %edx,%edx
jle    12b4 <vec_slp_float+0x1b4>
mov    %edx,%eax
cmp    $0x4,%edx
jae    1116 <vec_slp_float+0x16>
xor    %ecx,%ecx
jmp    1250 <vec_slp_float+0x150>
mov    %eax,%ecx
and    $0xfffffffc,%ecx
lea    0x0(,%rax,8),%r8
and    $0xffffffffffffffe0,%r8
xor    %edx,%edx
movaps 0xecf(%rip),%xmm8
movaps 0xed7(%rip),%xmm9
movaps 0xedf(%rip),%xmm10
movaps 0xee7(%rip),%xmm11
movaps 0xeef(%rip),%xmm12
movaps 0xef7(%rip),%xmm13
nopl   0x0(%rax)
movups (%rdi,%rdx,1),%xmm0
movups 0x10(%rdi,%rdx,1),%xmm1
movaps %xmm0,%xmm6
shufps $0x88,%xmm1,%xmm6
shufps $0xdd,%xmm1,%xmm0
addps  %xmm8,%xmm6
addps  %xmm9,%xmm0
movaps %xmm6,%xmm1
unpckhps %xmm0,%xmm1
unpcklps %xmm0,%xmm6
movups %xmm6,(%rdi,%rdx,1)
movups %xmm1,0x10(%rdi,%rdx,1)
movups (%rsi,%rdx,2),%xmm2
movups 0x10(%rsi,%rdx,2),%xmm6
movups 0x20(%rsi,%rdx,2),%xmm3
movups 0x30(%rsi,%rdx,2),%xmm5
movaps %xmm5,%xmm0
movlhps %xmm3,%xmm0
movaps %xmm2,%xmm7
unpcklps %xmm6,%xmm7
shufps $0x24,%xmm0,%xmm7
movaps %xmm3,%xmm1
unpcklps %xmm5,%xmm1
movaps %xmm6,%xmm0
shufps $0x11,%xmm2,%xmm0
shufps $0xe2,%xmm1,%xmm0
movaps %xmm5,%xmm4
unpckhpd %xmm3,%xmm4
movaps %xmm2,%xmm1
unpckhps %xmm6,%xmm1
shufps $0x24,%xmm4,%xmm1
unpckhps %xmm5,%xmm3
shufps $0x33,%xmm2,%xmm6
shufps $0xe2,%xmm3,%xmm6
addps  %xmm10,%xmm7
addps  %xmm11,%xmm0
addps  %xmm12,%xmm1
addps  %xmm13,%xmm6
movaps %xmm1,%xmm2
unpcklps %xmm6,%xmm2
movaps %xmm0,%xmm3
shufps $0x11,%xmm7,%xmm3
shufps $0xe2,%xmm2,%xmm3
movaps %xmm6,%xmm2
movlhps %xmm1,%xmm2
movaps %xmm7,%xmm4
unpcklps %xmm0,%xmm4
shufps $0x24,%xmm2,%xmm4
movaps %xmm1,%xmm2
unpckhps %xmm6,%xmm2
movaps %xmm0,%xmm5
shufps $0x33,%xmm7,%xmm5
shufps $0xe2,%xmm2,%xmm5
unpckhpd %xmm1,%xmm6
unpckhps %xmm0,%xmm7
shufps $0x24,%xmm6,%xmm7
movups %xmm7,0x20(%rsi,%rdx,2)
movups %xmm5,0x30(%rsi,%rdx,2)
movups %xmm4,(%rsi,%rdx,2)
movups %xmm3,0x10(%rsi,%rdx,2)
add    $0x20,%rdx
cmp    %rdx,%r8
jne    1160 <vec_slp_float+0x60>
cmp    %rax,%rcx
je     12b4 <vec_slp_float+0x1b4>
mov    %rcx,%rdx
shl    $0x4,%rdx
add    %rdx,%rsi
movss  0xe0e(%rip),%xmm0
movss  0xe0a(%rip),%xmm1
movaps 0xdef(%rip),%xmm2
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movss  0x4(%rdi,%rcx,8),%xmm3
movss  (%rdi,%rcx,8),%xmm4
addss  %xmm0,%xmm4
movss  %xmm4,(%rdi,%rcx,8)
addss  %xmm1,%xmm3
movss  %xmm3,0x4(%rdi,%rcx,8)
movups (%rsi),%xmm3
addps  %xmm2,%xmm3
movups %xmm3,(%rsi)
add    $0x1,%rcx
add    $0x10,%rsi
cmp    %rcx,%rax
jne    1280 <vec_slp_float+0x180>
ret

LLVM IR (-O0):
define void @vec_slp_float(float* noalias %0, float* noalias %1, i32 %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca i32
%7 = alloca i32
store float* %0, float** %4
store float* %1, float** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %59, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %62
12: ; preds = %8
%13 = load float*, float** %4
%14 = load i32, i32* %7
%15 = mul nsw i32 %14, 2
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds float, float* %13, i64 %16
%18 = load float, float* %17
%19 = fadd float %18, 1.000000e+00
store float %19, float* %17
%20 = load float*, float** %4
%21 = load i32, i32* %7
%22 = mul nsw i32 %21, 2
%23 = add nsw i32 %22, 1
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds float, float* %20, i64 %24
%26 = load float, float* %25
%27 = fadd float %26, 2.000000e+00
store float %27, float* %25
%28 = load float*, float** %5
%29 = load i32, i32* %7
%30 = mul nsw i32 %29, 4
%31 = sext i32 %30 to i64
%32 = getelementptr inbounds float, float* %28, i64 %31
%33 = load float, float* %32
%34 = fadd float %33, 3.000000e+00
store float %34, float* %32
%35 = load float*, float** %5
%36 = load i32, i32* %7
%37 = mul nsw i32 %36, 4
%38 = add nsw i32 %37, 1
%39 = sext i32 %38 to i64
%40 = getelementptr inbounds float, float* %35, i64 %39
%41 = load float, float* %40
%42 = fadd float %41, 4.000000e+00
store float %42, float* %40
%43 = load float*, float** %5
%44 = load i32, i32* %7
%45 = mul nsw i32 %44, 4
%46 = add nsw i32 %45, 2
%47 = sext i32 %46 to i64
%48 = getelementptr inbounds float, float* %43, i64 %47
%49 = load float, float* %48
%50 = fadd float %49, 5.000000e+00
store float %50, float* %48
%51 = load float*, float** %5
%52 = load i32, i32* %7
%53 = mul nsw i32 %52, 4
%54 = add nsw i32 %53, 3
%55 = sext i32 %54 to i64
%56 = getelementptr inbounds float, float* %51, i64 %55
%57 = load float, float* %56
%58 = fadd float %57, 6.000000e+00
store float %58, float* %56
br label %59
59: ; preds = %12
%60 = load i32, i32* %7
%61 = add nsw i32 %60, 1
store i32 %61, i32* %7
br label %8
62: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @vec_slp_float(float* noalias nocapture %0, float* noalias nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %50
5: ; preds = %3
%6 = zext i32 %2 to i64
%7 = icmp ult i32 %2, 4
br i1 %7, label %48, label %8
8: ; preds = %5
%9 = and i64 %6, 4294967292
%10 = getelementptr inbounds float, float* %0, i64 -1
%11 = getelementptr inbounds float, float* %1, i64 -3
br label %12
12: ; preds = %12, %8
%13 = phi i64 [ 0, %8 ], [ %44, %12 ]
%14 = shl nuw nsw i64 %13, 1
%15 = getelementptr inbounds float, float* %0, i64 %14
%16 = bitcast float* %15 to <8 x float>*
%17 = load <8 x float>, <8 x float>* %16
%18 = shufflevector <8 x float> %17, <8 x float> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
%19 = shufflevector <8 x float> %17, <8 x float> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
%20 = fadd <4 x float> %18, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%21 = or i64 %14, 1
%22 = fadd <4 x float> %19, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00, float 2.000000e+00>
%23 = getelementptr inbounds float, float* %10, i64 %21
%24 = bitcast float* %23 to <8 x float>*
%25 = shufflevector <4 x float> %20, <4 x float> %22, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
store <8 x float> %25, <8 x float>* %24
%26 = shl nsw i64 %13, 2
%27 = getelementptr inbounds float, float* %1, i64 %26
%28 = bitcast float* %27 to <16 x float>*
%29 = load <16 x float>, <16 x float>* %28
%30 = shufflevector <16 x float> %29, <16 x float> poison, <4 x i32> <i32 0, i32 4, i32 8, i32 12>
%31 = shufflevector <16 x float> %29, <16 x float> poison, <4 x i32> <i32 1, i32 5, i32 9, i32 13>
%32 = shufflevector <16 x float> %29, <16 x float> poison, <4 x i32> <i32 2, i32 6, i32 10, i32 14>
%33 = shufflevector <16 x float> %29, <16 x float> poison, <4 x i32> <i32 3, i32 7, i32 11, i32 15>
%34 = fadd <4 x float> %30, <float 3.000000e+00, float 3.000000e+00, float 3.000000e+00, float 3.000000e+00>
%35 = fadd <4 x float> %31, <float 4.000000e+00, float 4.000000e+00, float 4.000000e+00, float 4.000000e+00>
%36 = fadd <4 x float> %32, <float 5.000000e+00, float 5.000000e+00, float 5.000000e+00, float 5.000000e+00>
%37 = or i64 %26, 3
%38 = fadd <4 x float> %33, <float 6.000000e+00, float 6.000000e+00, float 6.000000e+00, float 6.000000e+00>
%39 = getelementptr inbounds float, float* %11, i64 %37
%40 = bitcast float* %39 to <16 x float>*
%41 = shufflevector <4 x float> %34, <4 x float> %35, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%42 = shufflevector <4 x float> %36, <4 x float> %38, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%43 = shufflevector <8 x float> %41, <8 x float> %42, <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 1, i32 5, i32 9, i32 13, i32 2, i32 6, i32 10, i32 14, i32 3, i32 7, i32 11, i32 15>
store <16 x float> %43, <16 x float>* %40
%44 = add nuw i64 %13, 4
%45 = icmp eq i64 %44, %9
br i1 %45, label %46, label %12
46: ; preds = %12
%47 = icmp eq i64 %9, %6
br i1 %47, label %50, label %48
48: ; preds = %5, %46
%49 = phi i64 [ 0, %5 ], [ %9, %46 ]
br label %51
50: ; preds = %51, %46, %3
ret void
51: ; preds = %48, %51
%52 = phi i64 [ %67, %51 ], [ %49, %48 ]
%53 = shl nuw nsw i64 %52, 1
%54 = getelementptr inbounds float, float* %0, i64 %53
%55 = load float, float* %54
%56 = fadd float %55, 1.000000e+00
store float %56, float* %54
%57 = or i64 %53, 1
%58 = getelementptr inbounds float, float* %0, i64 %57
%59 = load float, float* %58
%60 = fadd float %59, 2.000000e+00
store float %60, float* %58
%61 = shl nsw i64 %52, 2
%62 = getelementptr inbounds float, float* %1, i64 %61
%63 = bitcast float* %62 to <4 x float>*
%64 = load <4 x float>, <4 x float>* %63
%65 = fadd <4 x float> %64, <float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00>
%66 = bitcast float* %62 to <4 x float>*
store <4 x float> %65, <4 x float>* %66
%67 = add nuw nsw i64 %52, 1
%68 = icmp eq i64 %67, %6
br i1 %68, label %50, label %51
}