xunge/DecIR huggingface dataset:
int codeSize(int firstByte) {
  int mask, result;
  if (firstByte > 0x7F) {
    result = 1;
    mask = 0x40;
    while ((firstByte & mask) != 0) {
      mask >>= 1;
      ++result;
    }
    if (result > 6) {
      result = 6;
    } else if (result == 1) {
      result = 0;
    }
  } else {
    result = 1;
  }
  return result;
}


x86 assembly (clang, -O0):
<codeSize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x7f,-0x4(%rbp)
jle    1176 <codeSize+0x76>
movl   $0x1,-0xc(%rbp)
movl   $0x40,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
cmp    $0x0,%eax
je     1145 <codeSize+0x45>
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111f <codeSize+0x1f>
cmpl   $0x6,-0xc(%rbp)
jle    115b <codeSize+0x5b>
movl   $0x6,-0xc(%rbp)
jmp    1171 <codeSize+0x71>
cmpl   $0x1,-0xc(%rbp)
jne    116c <codeSize+0x6c>
movl   $0x0,-0xc(%rbp)
jmp    1171 <codeSize+0x71>
jmp    117d <codeSize+0x7d>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<codeSize>:
mov    $0x1,%eax
cmp    $0x80,%edi
jl     1138 <codeSize+0x38>
xor    %eax,%eax
test   $0x40,%dil
je     1138 <codeSize+0x38>
mov    $0x40,%eax
xor    %ecx,%ecx
nopl   0x0(%rax)
shr    %eax
add    $0x1,%ecx
test   %edi,%eax
jne    1120 <codeSize+0x20>
mov    $0x6,%eax
cmp    $0x5,%ecx
ja     1138 <codeSize+0x38>
add    $0x1,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @codeSize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 127
br i1 %6, label %7, label %28
7: ; preds = %1
store i32 1, i32* %4
store i32 64, i32* %3
br label %8
8: ; preds = %13, %7
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = and i32 %9, %10
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %8
%14 = load i32, i32* %3
%15 = ashr i32 %14, 1
store i32 %15, i32* %3
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
store i32 %17, i32* %4
br label %8
18: ; preds = %8
%19 = load i32, i32* %4
%20 = icmp sgt i32 %19, 6
br i1 %20, label %21, label %22
21: ; preds = %18
store i32 6, i32* %4
br label %27
22: ; preds = %18
%23 = load i32, i32* %4
%24 = icmp eq i32 %23, 1
br i1 %24, label %25, label %26
25: ; preds = %22
store i32 0, i32* %4
br label %26
26: ; preds = %25, %22
br label %27
27: ; preds = %26, %21
br label %29
28: ; preds = %1
store i32 1, i32* %4
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %4
ret i32 %30
}

LLVM IR (-O2):
define i32 @codeSize(i32 %0) {
%2 = icmp sgt i32 %0, 127
br i1 %2, label %3, label %17
3: ; preds = %1
%4 = and i32 %0, 64
%5 = icmp eq i32 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %3, %6
%7 = phi i32 [ %10, %6 ], [ 1, %3 ]
%8 = phi i32 [ %9, %6 ], [ 64, %3 ]
%9 = lshr i32 %8, 1
%10 = add nuw nsw i32 %7, 1
%11 = and i32 %9, %0
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %6
13: ; preds = %6
%14 = icmp ugt i32 %7, 5
br i1 %14, label %17, label %15
15: ; preds = %3, %13
%16 = phi i32 [ %10, %13 ], [ 0, %3 ]
br label %17
17: ; preds = %1, %13, %15
%18 = phi i32 [ %16, %15 ], [ 6, %13 ], [ 1, %1 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void Welcome() {
  printf("#####################################\n");
  printf("##########  THE WASTELAND  ##########\n");
  printf("#####################################\n");
  printf("#####  Survival based mini-sim  #####\n");
  printf("#####################################\n\n");
}


x86 assembly (clang, -O0):
<Welcome>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf00(%rip),%rdi
call   1030 <printf@plt>
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
lea    0xf0f(%rip),%rdi
call   1030 <printf@plt>
lea    0xf2a(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Welcome>:
push   %rbx
lea    0xf0e(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
lea    0xed9(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
lea    0xf11(%rip),%rdi
call   1030 <puts@plt>
lea    0xf2b(%rip),%rdi
pop    %rbx
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"#####################################\0A\00"
@.str.1 = [39 x i8] c"########## THE WASTELAND ##########\0A\00"
@.str.2 = [39 x i8] c"##### Survival based mini-sim #####\0A\00"
@.str.3 = [40 x i8] c"#####################################\0A\0A\00"
define void @Welcome() {
%1 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str.2, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str.4 = [38 x i8] c"########## THE WASTELAND ##########\00"
@str.5 = [38 x i8] c"#####################################\00"
@str.6 = [38 x i8] c"##### Survival based mini-sim #####\00"
@str.7 = [39 x i8] c"#####################################\0A\00"
define void @Welcome() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str.5, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str.6, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str.7, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ POP_STACK();
void zpop(void) { POP_STACK(); }


x86 assembly (clang, -O0):
<zpop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <POP_STACK@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zpop>:
xor    %eax,%eax
jmp    1030 <POP_STACK@plt>

LLVM IR (-O0):
define void @zpop() {
%1 = call i32 (...) @POP_STACK()
ret void
}

LLVM IR (-O2):
define void @zpop() {
%1 = tail call i32 (...) @POP_STACK()
ret void
}
void efx_fini_debugfs_nic(struct efx_nic *efx) {}


x86 assembly (clang, -O0):
<efx_fini_debugfs_nic>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<efx_fini_debugfs_nic>:
ret

LLVM IR (-O0):
%struct.efx_nic = type opaque
define void @efx_fini_debugfs_nic(%struct.efx_nic* %0) {
%2 = alloca %struct.efx_nic*
store %struct.efx_nic* %0, %struct.efx_nic** %2
ret void
}

LLVM IR (-O2):
%struct.efx_nic = type opaque
define void @efx_fini_debugfs_nic(%struct.efx_nic* nocapture %0) {
ret void
}
/* Variables and functions */
int random();
int /*<<< orphan*/ usleep(long);
void gap(int n) {
  long r;
  r = (random() % (2 * ((1000 * 100) / 100))) - ((1000 * 100) / 100);
  usleep((r + (1000 * 100)) * n);
}


x86 assembly (clang, -O0):
<gap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <random@plt>
mov    $0x7d0,%ecx
cltd
idiv   %ecx
sub    $0x3e8,%edx
movslq %edx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x186a0,%rdi
movslq -0x4(%rbp),%rax
imul   %rax,%rdi
call   1040 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gap>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <random@plt>
cltq
imul   $0x10624dd3,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x27,%rcx
add    %edx,%ecx
imul   $0x7d0,%ecx,%ecx
neg    %ecx
add    %ecx,%eax
add    $0x182b8,%eax
movslq %ebx,%rdi
imul   %rax,%rdi
pop    %rbx
jmp    1040 <usleep@plt>

LLVM IR (-O0):
define void @gap(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = call i32 (...) @random()
%5 = srem i32 %4, 2000
%6 = sub nsw i32 %5, 1000
%7 = sext i32 %6 to i64
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = add nsw i64 %8, 100000
%10 = load i32, i32* %2
%11 = sext i32 %10 to i64
%12 = mul nsw i64 %9, %11
%13 = call i32 @usleep(i64 %12)
ret void
}

LLVM IR (-O2):
define void @gap(i32 %0) {
%2 = tail call i32 (...) @random()
%3 = srem i32 %2, 2000
%4 = add nsw i32 %3, 99000
%5 = zext i32 %4 to i64
%6 = sext i32 %0 to i64
%7 = mul nsw i64 %5, %6
%8 = tail call i32 @usleep(i64 %7)
ret void
}
/* Type definitions */
struct pattern {
  int dummy;
};

/* Variables and functions */
int countlib(int);
int offset(int /*<<< orphan*/, int, int, int);
int autohelperowl_vital_apat40(struct pattern *patt, int transformation,
                               int move, int color, int action) {
  int A;
  (void)patt;
  (void)color;
  (void)action;
  A = offset(0, -2, move, transformation);
  return countlib(A) == 3;
}


x86 assembly (clang, -O0):
<autohelperowl_vital_apat40>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
xor    %edi,%edi
mov    $0xfffffffe,%esi
call   1030 <offset@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%edi
call   1040 <countlib@plt>
cmp    $0x3,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<autohelperowl_vital_apat40>:
push   %rax
mov    %esi,%ecx
xor    %edi,%edi
mov    $0xfffffffe,%esi
call   1030 <offset@plt>
mov    %eax,%edi
call   1040 <countlib@plt>
xor    %ecx,%ecx
cmp    $0x3,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.pattern = type { i32 }
define i32 @autohelperowl_vital_apat40(%struct.pattern* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.pattern*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store %struct.pattern* %0, %struct.pattern** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load %struct.pattern*, %struct.pattern** %6
%13 = load i32, i32* %9
%14 = load i32, i32* %10
%15 = load i32, i32* %8
%16 = load i32, i32* %7
%17 = call i32 @offset(i32 0, i32 -2, i32 %15, i32 %16)
store i32 %17, i32* %11
%18 = load i32, i32* %11
%19 = call i32 @countlib(i32 %18)
%20 = icmp eq i32 %19, 3
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
%struct.pattern = type { i32 }
define i32 @autohelperowl_vital_apat40(%struct.pattern* nocapture readnone %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @offset(i32 0, i32 -2, i32 %2, i32 %1)
%7 = tail call i32 @countlib(i32 %6)
%8 = icmp eq i32 %7, 3
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ bitmap_sort(char const *, char const *, int);
int /*<<< orphan*/ gen_input(char const *, int, int);
int main() {
  int max = 10000000;
  int n = 1000000;
  const char *infile = "input.txt";
  const char *outfile = "output.txt";
  gen_input(infile, max, n);
  bitmap_sort(infile, outfile, max);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x989680,-0x8(%rbp)
movl   $0xf4240,-0xc(%rbp)
lea    0xebc(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    0xebb(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1040 <gen_input@plt>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x8(%rbp),%edx
call   1030 <bitmap_sort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xed8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x989680,%esi
mov    $0xf4240,%edx
call   1040 <gen_input@plt>
lea    0xec9(%rip),%rsi
mov    %rbx,%rdi
mov    $0x989680,%edx
call   1030 <bitmap_sort@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"input.txt\00"
@.str.1 = [11 x i8] c"output.txt\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i32 0, i32* %1
store i32 10000000, i32* %2
store i32 1000000, i32* %3
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8** %4
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i8** %5
%6 = load i8*, i8** %4
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = call i32 @gen_input(i8* %6, i32 %7, i32 %8)
%10 = load i8*, i8** %4
%11 = load i8*, i8** %5
%12 = load i32, i32* %2
%13 = call i32 @bitmap_sort(i8* %10, i8* %11, i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"input.txt\00"
@.str.1 = [11 x i8] c"output.txt\00"
define i32 @main() {
%1 = tail call i32 @gen_input(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 10000000, i32 1000000)
%2 = tail call i32 @bitmap_sort(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 10000000)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void show_help(void) {
  printf("Usage: %s [OPTION]...\n\n     -h, --help\t\tdisplay this help\n     "
         "-V, --version\tdisplay version information\n\n     Report bugs to "
         "<bulliver@gmail.com>\n",
         "cp");
}


x86 assembly (clang, -O0):
<show_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xf72(%rip),%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_help>:
lea    0xee9(%rip),%rdi
lea    0xf76(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [148 x i8] c"Usage: %s [OPTION]...\0A\0A -h, --help\09\09display this help\0A -V, --version\09display version information\0A\0A Report bugs to <bulliver@gmail.com>\0A\00"
@.str.1 = [3 x i8] c"cp\00"
define void @show_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([148 x i8], [148 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [148 x i8] c"Usage: %s [OPTION]...\0A\0A -h, --help\09\09display this help\0A -V, --version\09display version information\0A\0A Report bugs to <bulliver@gmail.com>\0A\00"
@.str.1 = [3 x i8] c"cp\00"
define void @show_help() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([148 x i8], [148 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void update_realjoy(void) {}


x86 assembly (clang, -O0):
<update_realjoy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<update_realjoy>:
ret

LLVM IR (-O0):
define void @update_realjoy() {
ret void
}

LLVM IR (-O2):
define void @update_realjoy() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Fatal_Error(char *, char const *);
char const *Skip_Digits(char const *);
long atol(char const *);
int /*<<< orphan*/ isdigit(unsigned char);
const char *Scan_Long(const char *string, long *value) {
  if (!isdigit((unsigned char)*string))
    Fatal_Error("Bad number: %s.", string);
  *value = atol(string);
  return Skip_Digits(string);
}


x86 assembly (clang, -O0):
<Scan_Long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
jne    1175 <Scan_Long+0x35>
mov    -0x8(%rbp),%rsi
lea    0xe90(%rip),%rdi
call   1040 <Fatal_Error@plt>
mov    -0x8(%rbp),%rdi
call   1060 <atol@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rdi
call   1050 <Skip_Digits@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Scan_Long>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
movzbl (%rdi),%edi
call   1030 <isdigit@plt>
test   %eax,%eax
jne    1165 <Scan_Long+0x25>
lea    0xea3(%rip),%rdi
mov    %rbx,%rsi
call   1040 <Fatal_Error@plt>
mov    %rbx,%rdi
call   1060 <atol@plt>
mov    %rax,(%r14)
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <Skip_Digits@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"Bad number: %s.\00"
define i8* @Scan_Long(i8* %0, i64* %1) {
%3 = alloca i8*
%4 = alloca i64*
store i8* %0, i8** %3
store i64* %1, i64** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = call i32 @isdigit(i8 zeroext %6)
%8 = icmp ne i32 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %2
%10 = load i8*, i8** %3
%11 = call i32 @Fatal_Error(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %10)
br label %12
12: ; preds = %9, %2
%13 = load i8*, i8** %3
%14 = call i64 @atol(i8* %13)
%15 = load i64*, i64** %4
store i64 %14, i64* %15
%16 = load i8*, i8** %3
%17 = call i8* @Skip_Digits(i8* %16)
ret i8* %17
}

LLVM IR (-O2):
@.str = [16 x i8] c"Bad number: %s.\00"
define i8* @Scan_Long(i8* %0, i64* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = tail call i32 @isdigit(i8 zeroext %3)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @Fatal_Error(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %0)
br label %8
8: ; preds = %6, %2
%9 = tail call i64 @atol(i8* %0)
store i64 %9, i64* %1
%10 = tail call i8* @Skip_Digits(i8* %0)
ret i8* %10
}
int g() {
  static int i;
  return i++;
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,0x2f0f(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
mov    0x2f1e(%rip),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0x2f15(%rip)
ret

LLVM IR (-O0):
@g.i = internal global i32 0
define i32 @g() {
%1 = load i32, i32* @g.i
%2 = add nsw i32 %1, 1
store i32 %2, i32* @g.i
ret i32 %1
}

LLVM IR (-O2):
@g.i = internal unnamed_addr global i32 0
define i32 @g() {
%1 = load i32, i32* @g.i
%2 = add nsw i32 %1, 1
store i32 %2, i32* @g.i
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ console_print(char *);
int sanders_snprintf(char *, int const, char const *, char const *);
int sanders_nprintf(const int n, const char fmt[], ...) {
  char str[n];
  int chars = sanders_snprintf(str, n, fmt, *((&fmt) + 1));
  console_print(str);
  return chars;
}


x86 assembly (clang, -O0):
<sanders_nprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x18(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x30(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x20(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rcx
call   1030 <sanders_snprintf@plt>
mov    -0x30(%rbp),%rdi
mov    %eax,-0x24(%rbp)
call   1040 <console_print@plt>
mov    -0x24(%rbp),%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sanders_nprintf>:
push   %rbp
mov    %rsp,%rbp
push   %r14
push   %rbx
mov    %rsi,%rdx
mov    %edi,%esi
mov    %edi,%eax
mov    %rsp,%rbx
add    $0xf,%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
mov    %rbx,%rdi
call   1030 <sanders_snprintf@plt>
mov    %eax,%r14d
mov    %rbx,%rdi
call   1040 <console_print@plt>
mov    %r14d,%eax
lea    -0x10(%rbp),%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @sanders_nprintf(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%8 = load i32, i32* %3
%9 = zext i32 %8 to i64
%10 = call i8* @llvm.stacksave()
store i8* %10, i8** %5
%11 = alloca i8, i64 %9
store i64 %9, i64* %6
%12 = load i32, i32* %3
%13 = load i8*, i8** %4
%14 = getelementptr inbounds i8*, i8** %4, i64 1
%15 = load i8*, i8** %14
%16 = call i32 @sanders_snprintf(i8* %11, i32 %12, i8* %13, i8* %15)
store i32 %16, i32* %7
%17 = call i32 @console_print(i8* %11)
%18 = load i32, i32* %7
%19 = load i8*, i8** %5
ret i32 %18
}

LLVM IR (-O2):
define i32 @sanders_nprintf(i32 %0, i8* %1, ...) {
%3 = zext i32 %0 to i64
%4 = alloca i8, i64 %3
%5 = call i32 @sanders_snprintf(i8* %4, i32 %0, i8* %1, i8* poison)
%6 = call i32 @console_print(i8* %4)
ret i32 %5
}
/* Type definitions */
struct cl_rhash {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cl_rhash_expand(struct cl_rhash *);
scalar_t__ cl_rhash_should_expand(struct cl_rhash *);
void cl_rhash_check_expand(struct cl_rhash *hash) {
  if (cl_rhash_should_expand(hash))
    cl_rhash_expand(hash);
}


x86 assembly (clang, -O0):
<cl_rhash_check_expand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <cl_rhash_should_expand@plt>
cmp    $0x0,%rax
je     1148 <cl_rhash_check_expand+0x28>
mov    -0x8(%rbp),%rdi
call   1030 <cl_rhash_expand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_rhash_check_expand>:
push   %rbx
mov    %rdi,%rbx
call   1040 <cl_rhash_should_expand@plt>
test   %rax,%rax
je     1137 <cl_rhash_check_expand+0x17>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <cl_rhash_expand@plt>
pop    %rbx
ret

LLVM IR (-O0):
%struct.cl_rhash = type { i32 }
define void @cl_rhash_check_expand(%struct.cl_rhash* %0) {
%2 = alloca %struct.cl_rhash*
store %struct.cl_rhash* %0, %struct.cl_rhash** %2
%3 = load %struct.cl_rhash*, %struct.cl_rhash** %2
%4 = call i64 @cl_rhash_should_expand(%struct.cl_rhash* %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load %struct.cl_rhash*, %struct.cl_rhash** %2
%8 = call i32 @cl_rhash_expand(%struct.cl_rhash* %7)
br label %9
9: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
%struct.cl_rhash = type { i32 }
define void @cl_rhash_check_expand(%struct.cl_rhash* %0) {
%2 = tail call i64 @cl_rhash_should_expand(%struct.cl_rhash* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @cl_rhash_expand(%struct.cl_rhash* %0)
br label %6
6: ; preds = %4, %1
ret void
}
int spi_nand_esmt_qe_enable(struct hisnfc_op *spi) { return 0; }


x86 assembly (clang, -O0):
<spi_nand_esmt_qe_enable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_nand_esmt_qe_enable>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.hisnfc_op = type opaque
define i32 @spi_nand_esmt_qe_enable(%struct.hisnfc_op* %0) {
%2 = alloca %struct.hisnfc_op*
store %struct.hisnfc_op* %0, %struct.hisnfc_op** %2
ret i32 0
}

LLVM IR (-O2):
%struct.hisnfc_op = type opaque
define i32 @spi_nand_esmt_qe_enable(%struct.hisnfc_op* nocapture readnone %0) {
ret i32 0
}
void INT_Excep_USB0_USBI0(void) {}


x86 assembly (clang, -O0):
<INT_Excep_USB0_USBI0>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_USB0_USBI0>:
ret

LLVM IR (-O0):
define void @INT_Excep_USB0_USBI0() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_USB0_USBI0() {
ret void
}
/* Variables and functions */
int _hexdump_do(char *);
int _hexdump(int filec, char *filev[]) {
  int ret = 0;
  int i;
  for (i = 0; i < filec; i++)
    ret |= _hexdump_do(filev[i]);
  return ret;
}


x86 assembly (clang, -O0):
<_hexdump>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    115e <_hexdump+0x4e>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <_hexdump_do@plt>
or     -0x14(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    112d <_hexdump+0x1d>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hexdump>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    1146 <_hexdump+0x36>
mov    %rsi,%r14
mov    %edi,%r15d
xor    %ebx,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nop
mov    (%r14,%rbx,8),%rdi
call   1030 <_hexdump_do@plt>
or     %eax,%ebp
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <_hexdump+0x20>
jmp    1148 <_hexdump+0x38>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @_hexdump(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %20, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %3
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %7
%12 = load i8**, i8*** %4
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i32 @_hexdump_do(i8* %16)
%18 = load i32, i32* %5
%19 = or i32 %18, %17
store i32 %19, i32* %5
br label %20
20: ; preds = %11
%21 = load i32, i32* %6
%22 = add nsw i32 %21, 1
store i32 %22, i32* %6
br label %7
23: ; preds = %7
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
define i32 @_hexdump(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %15
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %13, %6 ]
%8 = phi i32 [ 0, %4 ], [ %12, %6 ]
%9 = getelementptr inbounds i8*, i8** %1, i64 %7
%10 = load i8*, i8** %9
%11 = tail call i32 @_hexdump_do(i8* %10)
%12 = or i32 %11, %8
%13 = add nuw nsw i64 %7, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %15, label %6
15: ; preds = %6, %2
%16 = phi i32 [ 0, %2 ], [ %12, %6 ]
ret i32 %16
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t ROL64_14(uint64_t x) {
  __asm__("rolq $14, %0" : "=r"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<ROL64_14>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
rol    $0xe,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROL64_14>:
mov    %rdi,%rax
rol    $0xe,%rax
ret

LLVM IR (-O0):
define i8* @ROL64_14(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "rolq $$14, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @ROL64_14(i8* readnone %0) {
%2 = tail call i8* asm "rolq $$14, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
/* Type definitions */
typedef int r;

/* Variables and functions */
int rand();
int rand_byte(void) {
  int r = rand();
  int b1 = (r >> 24) & 255;
  int b2 = (r >> 16) & 255;
  int b3 = (r >> 8) & 255;
  int b4 = (r)&255;
  return b1 ^ b2 ^ b3 ^ b4;
}


x86 assembly (clang, -O0):
<rand_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
and    $0xff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
xor    -0x10(%rbp),%eax
xor    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_byte>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
mov    %eax,%edx
movzbl %ah,%esi
movzbl %al,%ecx
shr    $0x18,%eax
shr    $0x10,%edx
movzbl %dl,%edx
xor    %eax,%ecx
xor    %edx,%ecx
xor    %esi,%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rand_byte() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = call i32 (...) @rand()
store i32 %6, i32* %1
%7 = load i32, i32* %1
%8 = ashr i32 %7, 24
%9 = and i32 %8, 255
store i32 %9, i32* %2
%10 = load i32, i32* %1
%11 = ashr i32 %10, 16
%12 = and i32 %11, 255
store i32 %12, i32* %3
%13 = load i32, i32* %1
%14 = ashr i32 %13, 8
%15 = and i32 %14, 255
store i32 %15, i32* %4
%16 = load i32, i32* %1
%17 = and i32 %16, 255
store i32 %17, i32* %5
%18 = load i32, i32* %2
%19 = load i32, i32* %3
%20 = xor i32 %18, %19
%21 = load i32, i32* %4
%22 = xor i32 %20, %21
%23 = load i32, i32* %5
%24 = xor i32 %22, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @rand_byte() {
%1 = tail call i32 (...) @rand()
%2 = lshr i32 %1, 24
%3 = lshr i32 %1, 16
%4 = and i32 %3, 255
%5 = lshr i32 %1, 8
%6 = and i32 %5, 255
%7 = and i32 %1, 255
%8 = xor i32 %7, %2
%9 = xor i32 %8, %4
%10 = xor i32 %9, %6
ret i32 %10
}
/* Variables and functions */
float FLT_MAX;
int /*<<< orphan*/ puts(char *);
int main(int argc, char *argv[]) {
  float f = FLT_MAX;
  f -= 234589.23f;
  if (f == FLT_MAX) {
    puts("FLT_MAX is really big!");
  } else {
    puts("The cake is a lie.");
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ebb(%rip),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  0xebd(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
mov    0x2e90(%rip),%rax
ucomiss (%rax),%xmm0
jne    1178 <main+0x68>
jp     1178 <main+0x68>
lea    0xe96(%rip),%rdi
call   1030 <puts@plt>
jmp    1184 <main+0x74>
lea    0xe9c(%rip),%rdi
call   1030 <puts@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ed0(%rip),%rax
movss  (%rax),%xmm0
movss  0xedc(%rip),%xmm1
addss  %xmm0,%xmm1
ucomiss %xmm0,%xmm1
lea    0xee9(%rip),%rax
lea    0xecb(%rip),%rdi
cmovne %rax,%rdi
cmovp  %rax,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@FLT_MAX = global float 0.000000e+00
@.str = [23 x i8] c"FLT_MAX is really big!\00"
@.str.1 = [19 x i8] c"The cake is a lie.\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca float
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load float, float* @FLT_MAX
store float %7, float* %6
%8 = load float, float* %6
%9 = fsub float %8, 0x410CA2E9E0000000
store float %9, float* %6
%10 = load float, float* %6
%11 = load float, float* @FLT_MAX
%12 = fcmp oeq float %10, %11
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = call i32 @puts(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %17
15: ; preds = %2
%16 = call i32 @puts(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0))
br label %17
17: ; preds = %15, %13
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@FLT_MAX = global float 0.000000e+00
@.str = [23 x i8] c"FLT_MAX is really big!\00"
@.str.1 = [19 x i8] c"The cake is a lie.\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = load float, float* @FLT_MAX
%4 = fadd float %3, 0xC10CA2E9E0000000
%5 = fcmp oeq float %4, %3
%6 = select i1 %5, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0)
%7 = tail call i32 @puts(i8* dereferenceable(1) %6)
ret i32 0
}
void setup_trampoline_page_table(void) {}


x86 assembly (clang, -O0):
<setup_trampoline_page_table>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_trampoline_page_table>:
ret

LLVM IR (-O0):
define void @setup_trampoline_page_table() {
ret void
}

LLVM IR (-O2):
define void @setup_trampoline_page_table() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, ...);
void header(FILE *fp, char *content_type) {
  fprintf(fp, "HTTP/1.0 200 OK\r\n");
  if (content_type) {
    fprintf(fp, "Content-type: %s\r\n", content_type);
  }
}


x86 assembly (clang, -O0):
<header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed5(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
cmpq   $0x0,-0x10(%rbp)
je     1153 <header+0x43>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xec6(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<header>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xecf(%rip),%rdi
mov    $0x11,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1040 <fwrite@plt>
test   %r14,%r14
je     1163 <header+0x43>
lea    0xec3(%rip),%rsi
mov    %rbx,%rdi
mov    %r14,%rdx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fprintf@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [18 x i8] c"HTTP/1.0 200 OK\0D\0A\00"
@.str.1 = [19 x i8] c"Content-type: %s\0D\0A\00"
define void @header(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = call i32 (i32*, i8*, ...) @fprintf(i32* %5, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32*, i32** %3
%11 = load i8*, i8** %4
%12 = call i32 (i32*, i8*, ...) @fprintf(i32* %10, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), i8* %11)
br label %13
13: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"HTTP/1.0 200 OK\0D\0A\00"
@.str.1 = [19 x i8] c"Content-type: %s\0D\0A\00"
define void @header(i32* nocapture %0, i8* %1) {
%3 = tail call i64 @fwrite(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i64 17, i64 1, i32* %0)
%4 = icmp eq i8* %1, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 (i32*, i8*, ...) @fprintf(i32* %0, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), i8* %1)
br label %7
7: ; preds = %5, %2
ret void
}
/* Type definitions */
struct darr {
  int dummy;
};

/* Variables and functions */
void const *darr_begin(struct darr *);
const void *darr_begin_const(const struct darr *d) {
  return darr_begin((struct darr *)d);
}


x86 assembly (clang, -O0):
<darr_begin_const>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <darr_begin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<darr_begin_const>:
jmp    1030 <darr_begin@plt>

LLVM IR (-O0):
%struct.darr = type { i32 }
define i8* @darr_begin_const(%struct.darr* %0) {
%2 = alloca %struct.darr*
store %struct.darr* %0, %struct.darr** %2
%3 = load %struct.darr*, %struct.darr** %2
%4 = call i8* @darr_begin(%struct.darr* %3)
ret i8* %4
}

LLVM IR (-O2):
%struct.darr = type { i32 }
define i8* @darr_begin_const(%struct.darr* %0) {
%2 = tail call i8* @darr_begin(%struct.darr* %0)
ret i8* %2
}
/* Variables and functions */
int send(int, char *, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ str_cnt(char *);
int send_msg(int fd, char *msg) { return send(fd, msg, str_cnt(msg), 0); }


x86 assembly (clang, -O0):
<send_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <str_cnt@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
xor    %ecx,%ecx
call   1040 <send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_msg>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <str_cnt@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
xor    %ecx,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <send@plt>

LLVM IR (-O0):
define i32 @send_msg(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @str_cnt(i8* %7)
%9 = call i32 @send(i32 %5, i8* %6, i32 %8, i32 0)
ret i32 %9
}

LLVM IR (-O2):
define i32 @send_msg(i32 %0, i8* %1) {
%3 = tail call i32 @str_cnt(i8* %1)
%4 = tail call i32 @send(i32 %0, i8* %1, i32 %3, i32 0)
ret i32 %4
}
void PWMOutputEnable(unsigned long ulBase, unsigned long ulChannel) {
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000000))) |= 0x00000080;
  (*((volatile unsigned long *)(ulBase + 0x00000018 + (ulChannel / 2) * 4))) |=
      (0x00000008 << (ulChannel % 2) * 8);
  (*((volatile unsigned long *)(ulBase + 0x00000020))) |=
      (1 << (ulChannel * 4));
}


x86 assembly (clang, -O0):
<PWMOutputEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
or     $0x80,%rcx
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
shl    $0x3,%rax
mov    %eax,%ecx
mov    $0x8,%eax
shl    %cl,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
add    $0x18,%rax
mov    -0x10(%rbp),%rcx
shr    $0x1,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    (%rax),%rcx
or     %rdx,%rcx
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
mov    0x20(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x20(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMOutputEnable>:
orq    $0x80,(%rdi)
lea    0x0(,%rsi,8),%ecx
and    $0x8,%cl
mov    $0x8,%eax
shl    %cl,%eax
lea    0x0(,%rsi,4),%ecx
and    $0xfffffffffffffffe,%rsi
or     %rax,0x18(%rdi,%rsi,2)
mov    $0x1,%eax
shl    %cl,%eax
cltq
or     %rax,0x20(%rdi)
ret

LLVM IR (-O0):
define void @PWMOutputEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = add i64 %5, 0
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = or i64 %8, 128
store volatile i64 %9, i64* %7
%10 = load i64, i64* %4
%11 = urem i64 %10, 2
%12 = mul i64 %11, 8
%13 = trunc i64 %12 to i32
%14 = shl i32 8, %13
%15 = sext i32 %14 to i64
%16 = load i64, i64* %3
%17 = add i64 %16, 24
%18 = load i64, i64* %4
%19 = udiv i64 %18, 2
%20 = mul i64 %19, 4
%21 = add i64 %17, %20
%22 = inttoptr i64 %21 to i64*
%23 = load volatile i64, i64* %22
%24 = or i64 %23, %15
store volatile i64 %24, i64* %22
%25 = load i64, i64* %4
%26 = mul i64 %25, 4
%27 = trunc i64 %26 to i32
%28 = shl i32 1, %27
%29 = sext i32 %28 to i64
%30 = load i64, i64* %3
%31 = add i64 %30, 32
%32 = inttoptr i64 %31 to i64*
%33 = load volatile i64, i64* %32
%34 = or i64 %33, %29
store volatile i64 %34, i64* %32
ret void
}

LLVM IR (-O2):
define void @PWMOutputEnable(i64 %0, i64 %1) {
%3 = inttoptr i64 %0 to i64*
%4 = load volatile i64, i64* %3
%5 = or i64 %4, 128
store volatile i64 %5, i64* %3
%6 = trunc i64 %1 to i32
%7 = shl i32 %6, 3
%8 = and i32 %7, 8
%9 = shl nuw nsw i32 8, %8
%10 = zext i32 %9 to i64
%11 = add i64 %0, 24
%12 = shl i64 %1, 1
%13 = and i64 %12, -4
%14 = add i64 %11, %13
%15 = inttoptr i64 %14 to i64*
%16 = load volatile i64, i64* %15
%17 = or i64 %16, %10
store volatile i64 %17, i64* %15
%18 = shl i32 %6, 2
%19 = shl nuw i32 1, %18
%20 = sext i32 %19 to i64
%21 = add i64 %0, 32
%22 = inttoptr i64 %21 to i64*
%23 = load volatile i64, i64* %22
%24 = or i64 %23, %20
store volatile i64 %24, i64* %22
ret void
}
/* Variables and functions */
int /*<<< orphan*/ uart_dma_drain();
void DMA2_Stream5_IRQHandler(void) { uart_dma_drain(); }


x86 assembly (clang, -O0):
<DMA2_Stream5_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <uart_dma_drain@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA2_Stream5_IRQHandler>:
xor    %eax,%eax
jmp    1030 <uart_dma_drain@plt>

LLVM IR (-O0):
define void @DMA2_Stream5_IRQHandler() {
%1 = call i32 (...) @uart_dma_drain()
ret void
}

LLVM IR (-O2):
define void @DMA2_Stream5_IRQHandler() {
%1 = tail call i32 (...) @uart_dma_drain()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x24() {
  Assert_real((isalnum(36) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              185, ("isalnum should be 0 for $"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x24>:
push   %rbp
mov    %rsp,%rbp
mov    $0x24,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xb9,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x24>:
push   %rax
mov    $0x24,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xb9,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 0 for $\00"
define void @t_isalnum_0x24() {
%1 = call i64 @isalnum(i32 36)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 185, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 0 for $\00"
define void @t_isalnum_0x24() {
%1 = tail call i64 @isalnum(i32 36)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 185, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void PGMPhysSimpleWriteGCPtr(void) {}


x86 assembly (clang, -O0):
<PGMPhysSimpleWriteGCPtr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PGMPhysSimpleWriteGCPtr>:
ret

LLVM IR (-O0):
define void @PGMPhysSimpleWriteGCPtr() {
ret void
}

LLVM IR (-O2):
define void @PGMPhysSimpleWriteGCPtr() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(unsigned char *, unsigned char const *, unsigned int);
void KeccakP400_OverwriteBytes(void *state, const unsigned char *data,
                               unsigned int offset, unsigned int length) {
  memcpy((unsigned char *)state + offset, data, length);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%eax
add    %rax,%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%edx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %edx,%eax
add    %rax,%rdi
mov    %ecx,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @KeccakP400_OverwriteBytes(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %7
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = load i8*, i8** %6
%14 = load i32, i32* %8
%15 = call i32 @memcpy(i8* %12, i8* %13, i32 %14)
ret void
}

LLVM IR (-O2):
define void @KeccakP400_OverwriteBytes(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = zext i32 %2 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = tail call i32 @memcpy(i8* %6, i8* %1, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int main(int argc, char **argv) {
  do {
    if (1) {
      perror("hello world!");
      exit(EXIT_FAILURE);
    }
  } while (0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <perror@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <perror@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"hello world!\00"
@EXIT_FAILURE = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %6
6: ; preds = %2
%7 = call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = call i32 @exit(i32 %8)
unreachable
10: ; No predecessors!
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"hello world!\00"
@EXIT_FAILURE = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @perror(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
void setExpire(void) {
  _serverPanic("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/"
               "heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c",
               124, "Function '%s' is disabled.", __func__);
}


x86 assembly (clang, -O0):
<setExpire>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x7c,%esi
lea    0xf79(%rip),%rdx
lea    0xf8d(%rip),%rcx
mov    $0x0,%al
call   1030 <_serverPanic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setExpire>:
lea    0xee9(%rip),%rdi
lea    0xf82(%rip),%rdx
lea    0xf96(%rip),%rcx
mov    $0x7c,%esi
xor    %eax,%eax
jmp    1030 <_serverPanic@plt>

LLVM IR (-O0):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.setExpire = [10 x i8] c"setExpire\00"
define void @setExpire() {
%1 = call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 124, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__func__.setExpire, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.setExpire = [10 x i8] c"setExpire\00"
define void @setExpire() {
%1 = tail call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 124, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__func__.setExpire, i64 0, i64 0))
ret void
}
void test_vprintf() {}


x86 assembly (clang, -O0):
<test_vprintf>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_vprintf>:
ret

LLVM IR (-O0):
define void @test_vprintf() {
ret void
}

LLVM IR (-O2):
define void @test_vprintf() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
int main(void) {
  unsigned int x = 0;
  while (x < 0x0fffffff) {
    x++;
  }
  __VERIFIER_assert(x >= 0x0fffffff);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xfffffff,-0x8(%rbp)
jae    1141 <main+0x31>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
cmpl   $0xfffffff,-0x8(%rbp)
setae  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <__VERIFIER_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp ult i32 %4, 268435455
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
%11 = icmp uge i32 %10, 268435455
%12 = zext i1 %11 to i32
%13 = call i32 @__VERIFIER_assert(i32 %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @__VERIFIER_assert(i32 1)
ret i32 0
}