xunge/DecIR huggingface dataset:
/* Variables and functions */
int ft_strempty(char const *const src) {
  return (src == NULL || src[0] == '\0');
}


x86 assembly (clang, -O0):
<ft_strempty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%al
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1128 <ft_strempty+0x28>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strempty>:
test   %rdi,%rdi
je     110e <ft_strempty+0xe>
xor    %eax,%eax
cmpb   $0x0,(%rdi)
sete   %al
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ft_strempty(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %11, label %5
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 0
br label %11
11: ; preds = %5, %1
%12 = phi i1 [ true, %1 ], [ %10, %5 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @ft_strempty(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 1, %1 ], [ %6, %3 ]
ret i32 %8
}
int main() {
  int x, y;
  int a[10];
  x = 1U;
  while (x <= 10U) {
    y = 10 - x;
    a[y] = -1;
    x++;
  }
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
ja     1141 <main+0x41>
mov    $0xa,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
movslq -0xc(%rbp),%rax
movl   $0xffffffff,-0x40(%rbp,%rax,4)
ff
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca [10 x i32]
store i32 0, i32* %1
store i32 1, i32* %2
br label %5
5: ; preds = %8, %0
%6 = load i32, i32* %2
%7 = icmp ule i32 %6, 10
br i1 %7, label %8, label %16
8: ; preds = %5
%9 = load i32, i32* %2
%10 = sub nsw i32 10, %9
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds [10 x i32], [10 x i32]* %4, i64 0, i64 %12
store i32 -1, i32* %13
%14 = load i32, i32* %2
%15 = add nsw i32 %14, 1
store i32 %15, i32* %2
br label %5
16: ; preds = %5
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ luaL_check_lstr(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ lua_getglobal(int /*<<< orphan*/);
int /*<<< orphan*/ lua_pushobject(int /*<<< orphan*/);
void luaB_getglobal(void) {
  lua_pushobject(lua_getglobal((luaL_check_lstr((1), NULL))));
}


x86 assembly (clang, -O0):
<luaB_getglobal>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <luaL_check_lstr@plt>
mov    %eax,%edi
call   1030 <lua_getglobal@plt>
mov    %eax,%edi
call   1050 <lua_pushobject@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<luaB_getglobal>:
push   %rax
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <luaL_check_lstr@plt>
mov    %eax,%edi
call   1030 <lua_getglobal@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <lua_pushobject@plt>

LLVM IR (-O0):
define void @luaB_getglobal() {
%1 = call i32 @luaL_check_lstr(i32 1, i32* null)
%2 = call i32 @lua_getglobal(i32 %1)
%3 = call i32 @lua_pushobject(i32 %2)
ret void
}

LLVM IR (-O2):
define void @luaB_getglobal() {
%1 = tail call i32 @luaL_check_lstr(i32 1, i32* null)
%2 = tail call i32 @lua_getglobal(i32 %1)
%3 = tail call i32 @lua_pushobject(i32 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ *fopen(char const *, char const *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *,
                           char const *);
int /*<<< orphan*/ stderr;
FILE *safeopen(const char *filename, const char *mode) {
  FILE *file = fopen(filename, mode);
  if (!file)
    (fprintf(stderr, "Failed to open: %s with mode: %s\n", filename, mode),
     exit(1));
  return file;
}


x86 assembly (clang, -O0):
<safeopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1183 <safeopen+0x53>
mov    0x2e7d(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xe8c(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safeopen>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <fopen@plt>
test   %rax,%rax
je     114c <safeopen+0x1c>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
mov    0x2e8d(%rip),%rax
mov    (%rax),%edi
lea    0xea4(%rip),%rsi
mov    %rbx,%rdx
mov    %r14,%rcx
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [34 x i8] c"Failed to open: %s with mode: %s\0A\00"
define i32* @safeopen(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32* @fopen(i8* %6, i8* %7)
store i32* %8, i32** %5
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %17, label %11
11: ; preds = %2
%12 = load i32, i32* @stderr
%13 = load i8*, i8** %3
%14 = load i8*, i8** %4
%15 = call i32 @fprintf(i32 %12, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %13, i8* %14)
%16 = call i32 @exit(i32 1)
unreachable
17: ; preds = %2
%18 = load i32*, i32** %5
ret i32* %18
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [34 x i8] c"Failed to open: %s with mode: %s\0A\00"
define noalias i32* @safeopen(i8* %0, i8* %1) {
%3 = tail call i32* @fopen(i8* %0, i8* %1)
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%8 = tail call i32 @exit(i32 1)
unreachable
9: ; preds = %2
ret i32* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ SIGTERM;
int /*<<< orphan*/ assert(char *const *);
int do_fork_exec_kill_redirect(char *const *, char *const *, int /*<<< orphan*/,
                               int /*<<< orphan*/, int, int);
int do_fork_exec_redirect(char *const argv[], char *const envp[],
                          int64_t timeout_msec, int fd, int flags) {
  assert(argv);
  return do_fork_exec_kill_redirect(argv, envp, timeout_msec, SIGTERM, fd,
                                    flags);
}


x86 assembly (clang, -O0):
<do_fork_exec_redirect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    0x2e93(%rip),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%r8d
mov    -0x1c(%rbp),%r9d
call   1030 <do_fork_exec_kill_redirect@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_fork_exec_redirect>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %r8d,%r14d
mov    %ecx,%r15d
mov    %edx,%r12d
mov    %rsi,%rbp
mov    %rdi,%rbx
call   1040 <assert@plt>
mov    0x2ea5(%rip),%rax
mov    (%rax),%ecx
mov    %rbx,%rdi
mov    %rbp,%rsi
mov    %r12d,%edx
mov    %r15d,%r8d
mov    %r14d,%r9d
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <do_fork_exec_kill_redirect@plt>

LLVM IR (-O0):
@SIGTERM = global i32 0
define i32 @do_fork_exec_redirect(i8** %0, i8** %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i8**
%7 = alloca i8**
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8** %0, i8*** %6
store i8** %1, i8*** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8**, i8*** %6
%12 = call i32 @assert(i8** %11)
%13 = load i8**, i8*** %6
%14 = load i8**, i8*** %7
%15 = load i32, i32* %8
%16 = load i32, i32* @SIGTERM
%17 = load i32, i32* %9
%18 = load i32, i32* %10
%19 = call i32 @do_fork_exec_kill_redirect(i8** %13, i8** %14, i32 %15, i32 %16, i32 %17, i32 %18)
ret i32 %19
}

LLVM IR (-O2):
@SIGTERM = global i32 0
define i32 @do_fork_exec_redirect(i8** %0, i8** %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @assert(i8** %0)
%7 = load i32, i32* @SIGTERM
%8 = tail call i32 @do_fork_exec_kill_redirect(i8** %0, i8** %1, i32 %2, i32 %7, i32 %3, i32 %4)
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fwrite(unsigned char *, int, int, int /*<<< orphan*/ *);
int edge_write(unsigned char *edgetable, FILE *output) {
  int written;
  written = fwrite(edgetable, 1, 21288960, output);
  if (written < 21288960)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<edge_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    $0x1,%esi
mov    $0x144d800,%edx
call   1030 <fwrite@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x144d800,-0x1c(%rbp)
jge    1153 <edge_write+0x43>
movl   $0x0,-0x4(%rbp)
jmp    115a <edge_write+0x4a>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<edge_write>:
push   %rax
mov    %rsi,%rcx
mov    $0x1,%esi
mov    $0x144d800,%edx
call   1030 <fwrite@plt>
xor    %ecx,%ecx
cmp    $0x144d800,%eax
setge  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @edge_write(i8* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32
store i8* %0, i8** %4
store i32* %1, i32** %5
%7 = load i8*, i8** %4
%8 = load i32*, i32** %5
%9 = call i32 @fwrite(i8* %7, i32 1, i32 21288960, i32* %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp slt i32 %10, 21288960
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 0, i32* %3
br label %14
13: ; preds = %2
store i32 1, i32* %3
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @edge_write(i8* nocapture %0, i32* nocapture %1) {
%3 = tail call i32 @fwrite(i8* %0, i32 1, i32 21288960, i32* %1)
%4 = icmp sgt i32 %3, 21288959
%5 = zext i1 %4 to i32
ret i32 %5
}
void Clock_CIF_init(struct CLOCK_STRUCT *clock) {}


x86 assembly (clang, -O0):
<Clock_CIF_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Clock_CIF_init>:
ret

LLVM IR (-O0):
%struct.CLOCK_STRUCT = type opaque
define void @Clock_CIF_init(%struct.CLOCK_STRUCT* %0) {
%2 = alloca %struct.CLOCK_STRUCT*
store %struct.CLOCK_STRUCT* %0, %struct.CLOCK_STRUCT** %2
ret void
}

LLVM IR (-O2):
%struct.CLOCK_STRUCT = type opaque
define void @Clock_CIF_init(%struct.CLOCK_STRUCT* nocapture %0) {
ret void
}
void TimerHallSensorSelect(unsigned long ulBase, unsigned long ulHallSensor) {

  ;

  ;
  if (ulHallSensor == 0x00000000) {
    (*((volatile unsigned long *)(ulBase + 0x00000004))) &= ~0x00000080;
  } else {
    (*((volatile unsigned long *)(ulBase + 0x00000004))) |= 0x00000080;
  }
}


x86 assembly (clang, -O0):
<TimerHallSensorSelect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    112f <TimerHallSensorSelect+0x2f>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rcx
and    $0xffffffffffffff7f,%rcx
mov    %rcx,0x4(%rax)
jmp    1142 <TimerHallSensorSelect+0x42>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rcx
or     $0x80,%rcx
mov    %rcx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerHallSensorSelect>:
xor    %eax,%eax
test   %rsi,%rsi
setne  %al
mov    $0xffffffffffffff7f,%rcx
and    0x4(%rdi),%rcx
shl    $0x7,%rax
or     %rcx,%rax
mov    %rax,0x4(%rdi)
ret

LLVM IR (-O0):
define void @TimerHallSensorSelect(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = load i64, i64* %3
%9 = add i64 %8, 4
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
%12 = and i64 %11, -129
store volatile i64 %12, i64* %10
br label %19
13: ; preds = %2
%14 = load i64, i64* %3
%15 = add i64 %14, 4
%16 = inttoptr i64 %15 to i64*
%17 = load volatile i64, i64* %16
%18 = or i64 %17, 128
store volatile i64 %18, i64* %16
br label %19
19: ; preds = %13, %7
ret void
}

LLVM IR (-O2):
define void @TimerHallSensorSelect(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
%4 = add i64 %0, 4
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -129
%8 = select i1 %3, i64 0, i64 128
%9 = or i64 %7, %8
store volatile i64 %9, i64* %5
ret void
}
/* Variables and functions */
double asin(double);
double module_libc_asin(double x) { return asin(x); }


x86 assembly (clang, -O0):
<module_libc_asin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <asin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_libc_asin>:
jmp    1030 <asin@plt>

LLVM IR (-O0):
define double @module_libc_asin(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @asin(double %3)
ret double %4
}

LLVM IR (-O2):
define double @module_libc_asin(double %0) {
%2 = tail call double @asin(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int readint() {
  int a = 0, b = 0;
#pragma omp atomic read
  ;
#pragma omp atomic read
  foo();
#pragma omp atomic read
  a += b;
#pragma omp atomic read
  a = 0;
#pragma omp atomic read
  a = b;
#pragma omp atomic read read
  a = b;
  return 0;
}


x86 assembly (clang, -O0):
<readint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readint>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @readint() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 (...) @foo()
%4 = load i32, i32* %2
%5 = load i32, i32* %1
%6 = add nsw i32 %5, %4
store i32 %6, i32* %1
store i32 0, i32* %1
%7 = load i32, i32* %2
store i32 %7, i32* %1
%8 = load i32, i32* %2
store i32 %8, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @readint() {
%1 = tail call i32 (...) @foo()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello world, from 64-bits\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"Hello world, from 64-bits\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [26 x i8] c"Hello world, from 64-bits\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int cli_is_qualif(char *p) { return (*p == '-'); }


x86 assembly (clang, -O0):
<cli_is_qualif>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2d,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cli_is_qualif>:
xor    %eax,%eax
cmpb   $0x2d,(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @cli_is_qualif(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 45
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @cli_is_qualif(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 45
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ print(int);
int main(void) {
  print(9);
  print(99);
  print(999);
  print(9999);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x9,%edi
call   1030 <print@plt>
mov    $0x63,%edi
call   1030 <print@plt>
mov    $0x3e7,%edi
call   1030 <print@plt>
mov    $0x270f,%edi
call   1030 <print@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x9,%edi
call   1030 <print@plt>
mov    $0x63,%edi
call   1030 <print@plt>
mov    $0x3e7,%edi
call   1030 <print@plt>
mov    $0x270f,%edi
call   1030 <print@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @print(i32 9)
%3 = call i32 @print(i32 99)
%4 = call i32 @print(i32 999)
%5 = call i32 @print(i32 9999)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @print(i32 9)
%2 = tail call i32 @print(i32 99)
%3 = tail call i32 @print(i32 999)
%4 = tail call i32 @print(i32 9999)
ret i32 0
}
void on_conn_data_rev(int id) {}


x86 assembly (clang, -O0):
<on_conn_data_rev>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<on_conn_data_rev>:
ret

LLVM IR (-O0):
define void @on_conn_data_rev(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @on_conn_data_rev(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct in_addr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int setipv4sourcefilter(int s, struct in_addr interface, struct in_addr group,
                        uint32_t fmode, uint32_t numsrc,
                        const struct in_addr *slist) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<setipv4sourcefilter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %esi,-0x8(%rbp)
mov    %edx,-0x10(%rbp)
mov    %edi,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9,-0x28(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setipv4sourcefilter>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.in_addr = type { i32 }
@ENOSYS = global i32 0
define i32 @setipv4sourcefilter(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, %struct.in_addr* %5) {
%7 = alloca %struct.in_addr
%8 = alloca %struct.in_addr
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca %struct.in_addr*
%13 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %7, i32 0, i32 0
store i32 %1, i32* %13
%14 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %8, i32 0, i32 0
store i32 %2, i32* %14
store i32 %0, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store %struct.in_addr* %5, %struct.in_addr** %12
%15 = load i32, i32* @ENOSYS
%16 = call i32 @__set_errno(i32 %15)
ret i32 -1
}

LLVM IR (-O2):
%struct.in_addr = type { i32 }
@ENOSYS = global i32 0
define i32 @setipv4sourcefilter(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, %struct.in_addr* nocapture readnone %5) {
%7 = load i32, i32* @ENOSYS
%8 = tail call i32 @__set_errno(i32 %7)
ret i32 -1
}
void trace_print_header(int seq, int prefix) {
  printf("%*s[%d]: ", prefix, "", seq);
}


x86 assembly (clang, -O0):
<trace_print_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    -0x4(%rbp),%ecx
lea    0xed5(%rip),%rdi
lea    0xed7(%rip),%rdx
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace_print_header>:
mov    %edi,%ecx
lea    0xee7(%rip),%rdi
lea    0xee9(%rip),%rdx
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"%*s[%d]: \00"
@.str.1 = [1 x i8] zeroinitializer
define void @trace_print_header(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %5, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"%*s[%d]: \00"
@.str.1 = [1 x i8] zeroinitializer
define void @trace_print_header(i32 %0, i32 %1) {
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %1, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.1, i64 0, i64 0), i32 %0)
ret void
}
int test_imm_E3int64_lowword_mem(long long *val) {
  return ((*val) & (0xE3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E3int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xe3,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E3int64_lowword_mem>:
testb  $0xe3,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E3int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 227
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E3int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 227
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int rand();
void array_rand(int *arr, size_t length, int min, int max) {
  size_t i;
  for (i = 0; i < length; ++i) {
    arr[i] = rand() % (max - min) + min;
  }
}


x86 assembly (clang, -O0):
<array_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    116b <array_rand+0x5b>
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x18(%rbp),%ecx
sub    -0x14(%rbp),%ecx
cltd
idiv   %ecx
add    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    112e <array_rand+0x1e>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<array_rand>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
test   %rsi,%rsi
je     114b <array_rand+0x3b>
mov    %ecx,%r12d
mov    %edx,%r14d
mov    %rsi,%rbp
mov    %rdi,%r15
sub    %edx,%r12d
xor    %ebx,%ebx
xchg   %ax,%ax
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %r12d
add    %r14d,%edx
mov    %edx,(%r15,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%rbp
jne    1130 <array_rand+0x20>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @array_rand(i32* %0, i64 %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32
%8 = alloca i32
%9 = alloca i64
store i32* %0, i32** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i64 0, i64* %9
br label %10
10: ; preds = %25, %4
%11 = load i64, i64* %9
%12 = load i64, i64* %6
%13 = icmp ult i64 %11, %12
br i1 %13, label %14, label %28
14: ; preds = %10
%15 = call i32 (...) @rand()
%16 = load i32, i32* %8
%17 = load i32, i32* %7
%18 = sub nsw i32 %16, %17
%19 = srem i32 %15, %18
%20 = load i32, i32* %7
%21 = add nsw i32 %19, %20
%22 = load i32*, i32** %5
%23 = load i64, i64* %9
%24 = getelementptr inbounds i32, i32* %22, i64 %23
store i32 %21, i32* %24
br label %25
25: ; preds = %14
%26 = load i64, i64* %9
%27 = add i64 %26, 1
store i64 %27, i64* %9
br label %10
28: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @array_rand(i32* nocapture writeonly %0, i64 %1, i32 %2, i32 %3) {
%5 = icmp eq i64 %1, 0
br i1 %5, label %16, label %6
6: ; preds = %4
%7 = sub nsw i32 %3, %2
br label %8
8: ; preds = %6, %8
%9 = phi i64 [ 0, %6 ], [ %14, %8 ]
%10 = tail call i32 (...) @rand()
%11 = srem i32 %10, %7
%12 = add nsw i32 %11, %2
%13 = getelementptr inbounds i32, i32* %0, i64 %9
store i32 %12, i32* %13
%14 = add nuw i64 %9, 1
%15 = icmp eq i64 %14, %1
br i1 %15, label %16, label %8
16: ; preds = %8, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bar();
void foo(const char *x, void *y, int *z) { bar(); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1030 <bar@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
jmp    1030 <bar@plt>

LLVM IR (-O0):
define void @foo(i8* %0, i8* %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32* %2, i32** %6
%7 = call i32 (...) @bar()
ret void
}

LLVM IR (-O2):
define void @foo(i8* nocapture readnone %0, i8* nocapture readnone %1, i32* nocapture readnone %2) {
%4 = tail call i32 (...) @bar()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int stoi(char *);
int main(void) {
  char s[] = "-72727";
  printf("%s\n", s);
  printf("%d\n", stoi(s));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xecb(%rip),%eax
mov    %eax,-0xb(%rbp)
mov    0xec5(%rip),%ax
mov    %ax,-0x7(%rbp)
mov    0xebd(%rip),%al
mov    %al,-0x5(%rbp)
lea    -0xb(%rbp),%rsi
lea    0xeb0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0xb(%rbp),%rdi
call   1040 <stoi@plt>
mov    %eax,%esi
lea    0xe9b(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0x373237,0xb(%rsp)
movl   $0x3732372d,0x8(%rsp)
37
lea    0x8(%rsp),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1050 <stoi@plt>
lea    0xea6(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.s = [7 x i8] c"-72727\00"
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [7 x i8]
store i32 0, i32* %1
%3 = bitcast [7 x i8]* %2 to i8*
%4 = getelementptr inbounds [7 x i8], [7 x i8]* %2, i64 0, i64 0
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = getelementptr inbounds [7 x i8], [7 x i8]* %2, i64 0, i64 0
%7 = call i32 @stoi(i8* %6)
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@__const.main.s = [7 x i8] c"-72727\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [7 x i8]
%2 = getelementptr inbounds [7 x i8], [7 x i8]* %1, i64 0, i64 0
%3 = call i32 @puts(i8* %2)
%4 = call i32 @stoi(i8* %2)
%5 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Type definitions */
struct tms {
  int dummy;
};
typedef int clock_t;

/* Variables and functions */
clock_t _times(struct tms *buf) {
  buf = buf;
  return -1;
}


x86 assembly (clang, -O0):
<_times>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_times>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.tms = type { i32 }
define i32 @_times(%struct.tms* %0) {
%2 = alloca %struct.tms*
store %struct.tms* %0, %struct.tms** %2
%3 = load %struct.tms*, %struct.tms** %2
store %struct.tms* %3, %struct.tms** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.tms = type { i32 }
define i32 @_times(%struct.tms* nocapture readnone %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void some_func_v2() { puts("some_func_v2"); }


x86 assembly (clang, -O0):
<some_func_v2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<some_func_v2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"some_func_v2\00"
define void @some_func_v2() {
%1 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"some_func_v2\00"
define void @some_func_v2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int pthread_cond_destroy(pthread_cond_t *cond) {
  ;
  return 0;
}


x86 assembly (clang, -O0):
<pthread_cond_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cond_destroy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pthread_cond_destroy(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @pthread_cond_destroy(i32* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int ptrdiff_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
size_t str_get_length(const char *s) {
  assert(s != NULL);
  register const char *cursor = s;
  while (*cursor != '\0')
    cursor += 1;
  const ptrdiff_t diff = cursor - s;
  return (size_t)(diff);
}


x86 assembly (clang, -O0):
<str_get_length>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1157 <str_get_length+0x47>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1136 <str_get_length+0x26>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,-0x14(%rbp)
movslq -0x14(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_get_length>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1030 <assert@plt>
movabs $0xffffffff00000000,%rax
ff ff ff
movabs $0x100000000,%rcx
cs nopw 0x0(%rax,%rax,1)
add    %rcx,%rax
cmpb   $0x0,(%rbx)
lea    0x1(%rbx),%rbx
jne    1140 <str_get_length+0x30>
sar    $0x20,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @str_get_length(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i8*, i8** %2
store i8* %9, i8** %3
br label %10
10: ; preds = %15, %1
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %10
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 1
store i8* %17, i8** %3
br label %10
18: ; preds = %10
%19 = load i8*, i8** %3
%20 = load i8*, i8** %2
%21 = ptrtoint i8* %19 to i64
%22 = ptrtoint i8* %20 to i64
%23 = sub i64 %21, %22
%24 = trunc i64 %23 to i32
store i32 %24, i32* %4
%25 = load i32, i32* %4
%26 = sext i32 %25 to i64
ret i64 %26
}

LLVM IR (-O2):
define i64 @str_get_length(i8* %0) {
%2 = icmp ne i8* %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
br label %5
5: ; preds = %5, %1
%6 = phi i8* [ %0, %1 ], [ %9, %5 ]
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
%9 = getelementptr inbounds i8, i8* %6, i64 1
br i1 %8, label %10, label %5
10: ; preds = %5
%11 = ptrtoint i8* %6 to i64
%12 = ptrtoint i8* %0 to i64
%13 = sub i64 %11, %12
%14 = shl i64 %13, 32
%15 = ashr exact i64 %14, 32
ret i64 %15
}
__attribute__((no, noclone)) unsigned __int128 t163_3sub(unsigned __int128 y) {
  unsigned __int128 r;
  if (__builtin_sub_overflow((unsigned __int128)(1), y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t163_3sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rsi
mov    -0x28(%rbp),%rax
xor    %ecx,%ecx
mov    $0x1,%edx
sub    %rsi,%rdx
sbb    %rax,%rcx
setb   %al
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x38(%rbp)
test   $0x1,%al
jne    115d <t163_3sub+0x4d>
jmp    1164 <t163_3sub+0x54>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t163_3sub>:
push   %r14
push   %rbx
push   %rax
xor    %r14d,%r14d
mov    $0x1,%ebx
sub    %rdi,%rbx
sbb    %rsi,%r14
jae    112b <t163_3sub+0x1b>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %rbx,%rax
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t163_3sub(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = call { i128, i1 } @llvm.usub.with.overflow.i128(i128 1, i128 %11)
%13 = extractvalue { i128, i1 } %12, 1
%14 = extractvalue { i128, i1 } %12, 0
store i128 %14, i128* %6
br i1 %13, label %15, label %17
15: ; preds = %2
%16 = call i32 (...) @bar()
br label %17
17: ; preds = %15, %2
%18 = load i128, i128* %6
store i128 %18, i128* %3
%19 = bitcast i128* %3 to { i64, i64 }*
%20 = load { i64, i64 }, { i64, i64 }* %19
ret { i64, i64 } %20
}

LLVM IR (-O2):
define { i64, i64 } @t163_3sub(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = tail call { i128, i1 } @llvm.usub.with.overflow.i128(i128 1, i128 %6)
%8 = extractvalue { i128, i1 } %7, 1
%9 = extractvalue { i128, i1 } %7, 0
br i1 %8, label %10, label %12
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = trunc i128 %9 to i64
%14 = lshr i128 %9, 64
%15 = trunc i128 %14 to i64
%16 = insertvalue { i64, i64 } poison, i64 %13, 0
%17 = insertvalue { i64, i64 } %16, i64 %15, 1
ret { i64, i64 } %17
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ copy_line_by_line(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
int /*<<< orphan*/ stdout;
int main(void) {
  copy_line_by_line(stdin, stdout);
  return (EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
mov    0x2ea9(%rip),%rax
mov    (%rax),%esi
call   1030 <copy_line_by_line@plt>
mov    0x2e93(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
mov    0x2eb7(%rip),%rax
mov    (%rax),%esi
call   1030 <copy_line_by_line@plt>
mov    0x2ea1(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdin = global i32 0
@stdout = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @stdin
%3 = load i32, i32* @stdout
%4 = call i32 @copy_line_by_line(i32 %2, i32 %3)
%5 = load i32, i32* @EXIT_SUCCESS
ret i32 %5
}

LLVM IR (-O2):
@stdin = global i32 0
@stdout = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = load i32, i32* @stdin
%2 = load i32, i32* @stdout
%3 = tail call i32 @copy_line_by_line(i32 %1, i32 %2)
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ dxl_write_byte(unsigned char, int, unsigned char);
void setTorqueEnable(unsigned char id, unsigned char enabled) {
  dxl_write_byte(id, (24), enabled);
}


x86 assembly (clang, -O0):
<setTorqueEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    -0x1(%rbp),%al
mov    $0x18,%esi
movzbl %al,%edi
movzbl -0x2(%rbp),%edx
call   1030 <dxl_write_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setTorqueEnable>:
mov    %esi,%edx
mov    $0x18,%esi
jmp    1030 <dxl_write_byte@plt>

LLVM IR (-O0):
define void @setTorqueEnable(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = load i8, i8* %4
%7 = call i32 @dxl_write_byte(i8 zeroext %5, i32 24, i8 zeroext %6)
ret void
}

LLVM IR (-O2):
define void @setTorqueEnable(i8 zeroext %0, i8 zeroext %1) {
%3 = tail call i32 @dxl_write_byte(i8 zeroext %0, i32 24, i8 zeroext %1)
ret void
}
/* Variables and functions */
scalar_t__ acosh(double);
float acoshf(float x) { return (float)acosh((double)x); }


x86 assembly (clang, -O0):
<acoshf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <acosh@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acoshf>:
push   %rax
cvtss2sd %xmm0,%xmm0
call   1030 <acosh@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @acoshf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = call i64 @acosh(double %4)
%6 = sitofp i64 %5 to float
ret float %6
}

LLVM IR (-O2):
define float @acoshf(float %0) {
%2 = fpext float %0 to double
%3 = tail call i64 @acosh(double %2)
%4 = sitofp i64 %3 to float
ret float %4
}
/* Variables and functions */
bool nrf51_errata_27(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_27>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_27>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_27() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_27() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void *ralloc_size(void const *, size_t);
void *rzalloc_size(const void *ctx, size_t size) {
  void *ptr = ralloc_size(ctx, size);
  if ((ptr != NULL))
    memset(ptr, 0, size);
  return ptr;
}


x86 assembly (clang, -O0):
<rzalloc_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <ralloc_size@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     115b <rzalloc_size+0x3b>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rzalloc_size>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1040 <ralloc_size@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1141 <rzalloc_size+0x21>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @rzalloc_size(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @ralloc_size(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i8*, i8** %5
%13 = load i64, i64* %4
%14 = call i32 @memset(i8* %12, i32 0, i64 %13)
br label %15
15: ; preds = %11, %2
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
define i8* @rzalloc_size(i8* %0, i64 %1) {
%3 = tail call i8* @ralloc_size(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @memset(i8* %3, i32 0, i64 %1)
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ McDevIf_AddPacket(int, unsigned char);
unsigned char McResCtrl_GetRegVal(int, int);
void AddStopPDM(void) {
  unsigned char bReg;
  bReg = McResCtrl_GetRegVal((0x00002000UL), (202));
  if ((bReg & (0x01)) != 0) {
    McDevIf_AddPacket((0x10000000UL) | (0x00002000UL) | (unsigned long)(202),
                      bReg & (unsigned char)~(0x01));
  }
}


x86 assembly (clang, -O0):
<AddStopPDM>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x2000,%edi
mov    $0xca,%esi
call   1030 <McResCtrl_GetRegVal@plt>
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1160 <AddStopPDM+0x40>
movzbl -0x1(%rbp),%eax
and    $0xfe,%eax
mov    $0x100020ca,%edi
movzbl %al,%esi
call   1040 <McDevIf_AddPacket@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AddStopPDM>:
push   %rax
mov    $0x2000,%edi
mov    $0xca,%esi
call   1030 <McResCtrl_GetRegVal@plt>
test   $0x1,%al
jne    1136 <AddStopPDM+0x16>
pop    %rax
ret
and    $0xfe,%al
movzbl %al,%esi
mov    $0x100020ca,%edi
pop    %rax
jmp    1040 <McDevIf_AddPacket@plt>

LLVM IR (-O0):
define void @AddStopPDM() {
%1 = alloca i8
%2 = call zeroext i8 @McResCtrl_GetRegVal(i32 8192, i32 202)
store i8 %2, i8* %1
%3 = load i8, i8* %1
%4 = zext i8 %3 to i32
%5 = and i32 %4, 1
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %0
%8 = load i8, i8* %1
%9 = zext i8 %8 to i32
%10 = and i32 %9, 254
%11 = trunc i32 %10 to i8
%12 = call i32 @McDevIf_AddPacket(i32 268443850, i8 zeroext %11)
br label %13
13: ; preds = %7, %0
ret void
}

LLVM IR (-O2):
define void @AddStopPDM() {
%1 = tail call zeroext i8 @McResCtrl_GetRegVal(i32 8192, i32 202)
%2 = and i8 %1, 1
%3 = icmp eq i8 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %0
%5 = and i8 %1, -2
%6 = tail call i32 @McDevIf_AddPacket(i32 268443850, i8 zeroext %5)
br label %7
7: ; preds = %4, %0
ret void
}
double *g() {}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
ret

LLVM IR (-O0):
define double* @g() {
%1 = alloca double*
%2 = load double*, double** %1
ret double* %2
}

LLVM IR (-O2):
define noalias double* @g() {
ret double* undef
}
/* Type definitions */
typedef int /*<<< orphan*/ __m256;

/* Variables and functions */
int /*<<< orphan*/ _mm256_fmadd_ps(int /*<<< orphan*/, int /*<<< orphan*/,
                                   int /*<<< orphan*/);
int /*<<< orphan*/ _mm256_set1_ps(float);
__m256 _fma_ff_vec_avx2(__m256 *veca, __m256 *vecb, float C) {
  __m256 vecc = _mm256_set1_ps(C);
  return _mm256_fmadd_ps(*veca, *vecb, vecc);
}


x86 assembly (clang, -O0):
<_fma_ff_vec_avx2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
call   1040 <_mm256_set1_ps@plt>
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x18(%rbp),%edx
call   1030 <_mm256_fmadd_ps@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fma_ff_vec_avx2>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <_mm256_set1_ps@plt>
mov    (%rbx),%edi
mov    (%r14),%esi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <_mm256_fmadd_ps@plt>

LLVM IR (-O0):
define i32 @_fma_ff_vec_avx2(i32* %0, i32* %1, float %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca float
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store float %2, float* %6
%8 = load float, float* %6
%9 = call i32 @_mm256_set1_ps(float %8)
store i32 %9, i32* %7
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
%12 = load i32*, i32** %5
%13 = load i32, i32* %12
%14 = load i32, i32* %7
%15 = call i32 @_mm256_fmadd_ps(i32 %11, i32 %13, i32 %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @_fma_ff_vec_avx2(i32* nocapture %0, i32* nocapture %1, float %2) {
%4 = tail call i32 @_mm256_set1_ps(float %2)
%5 = load i32, i32* %0
%6 = load i32, i32* %1
%7 = tail call i32 @_mm256_fmadd_ps(i32 %5, i32 %6, i32 %4)
ret i32 %7
}
/* Variables and functions */
void *malloc(size_t);
void *__attribute__((weak)) lwm2m_malloc(size_t s) { return malloc(s); }


x86 assembly (clang, -O0):
<lwm2m_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lwm2m_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define weak i8* @lwm2m_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define weak i8* @lwm2m_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
void __attribute__((unused)) atomic_add(volatile int *mem, int val) {
  __asm__ __volatile__("lock; addl %1,%0" : "=m"(*mem) : "ir"(val), "m"(*mem));
}


x86 assembly (clang, -O0):
<atomic_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rdx
lock add %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_add>:
lock add %esi,(%rdi)
ret

LLVM IR (-O0):
define void @atomic_add(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = load i32*, i32** %3
ret void
}

LLVM IR (-O2):
define void @atomic_add(i32* %0, i32 %1) {
tail call void asm sideeffect "lock; addl $1,$0", "=*m,ir,*m,~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32 %1, i32* elementtype(i32) %0)
ret void
}
int test_imm_BDuint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0xBD << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BDuint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0xbd,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BDuint64_midword_mem>:
testb  $0xbd,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BDuint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 189
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_BDuint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 12386304
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}