xunge/DecIR huggingface dataset:
/* Variables and functions */
char *libintl_bind_textdomain_codeset(char const *, char const *);
char *bind_textdomain_codeset(const char *domainname, const char *codeset) {
  return libintl_bind_textdomain_codeset(domainname, codeset);
}


x86 assembly (clang, -O0):
<bind_textdomain_codeset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <libintl_bind_textdomain_codeset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bind_textdomain_codeset>:
jmp    1030 <libintl_bind_textdomain_codeset@plt>

LLVM IR (-O0):
define i8* @bind_textdomain_codeset(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @libintl_bind_textdomain_codeset(i8* %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @bind_textdomain_codeset(i8* %0, i8* %1) {
%3 = tail call i8* @libintl_bind_textdomain_codeset(i8* %0, i8* %1)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int q1e() {
  int a[] = {5, 3, 1};
  int *p = &a[1];
  printf("\n%s\n", "q1e ------");
  printf("%d\n", --*p);
  printf("%d\n", *p);
  return 1;
}


x86 assembly (clang, -O0):
<q1e>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0xc(%rbp)
mov    0xedf(%rip),%eax
mov    %eax,-0x4(%rbp)
lea    -0xc(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x18(%rbp)
lea    0xecd(%rip),%rdi
lea    0xecb(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x18(%rbp),%rax
mov    (%rax),%esi
add    $0xffffffff,%esi
mov    %esi,(%rax)
lea    0xebd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x18(%rbp),%rax
mov    (%rax),%esi
lea    0xea9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<q1e>:
push   %rbx
lea    0xee8(%rip),%rdi
lea    0xee6(%rip),%rsi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xee3(%rip),%rbx
mov    %rbx,%rdi
mov    $0x2,%esi
xor    %eax,%eax
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@__const.q1e.a = [3 x i32] [i32 5, i32 3, i32 1]
@.str = [5 x i8] c"\0A%s\0A\00"
@.str.1 = [11 x i8] c"q1e ------\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define i32 @q1e() {
%1 = alloca [3 x i32]
%2 = alloca i32*
%3 = bitcast [3 x i32]* %1 to i8*
%4 = getelementptr inbounds [3 x i32], [3 x i32]* %1, i64 0, i64 1
store i32* %4, i32** %2
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
%8 = add nsw i32 %7, -1
store i32 %8, i32* %6
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %8)
%10 = load i32*, i32** %2
%11 = load i32, i32* %10
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %11)
ret i32 1
}

LLVM IR (-O2):
@.str = [5 x i8] c"\0A%s\0A\00"
@.str.1 = [11 x i8] c"q1e ------\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define i32 @q1e() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 2)
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 2)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ free1(double *);
void free1double(double *p) { free1(p); }


x86 assembly (clang, -O0):
<free1double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free1double>:
jmp    1030 <free1@plt>

LLVM IR (-O0):
define void @free1double(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = call i32 @free1(double* %3)
ret void
}

LLVM IR (-O2):
define void @free1double(double* %0) {
%2 = tail call i32 @free1(double* %0)
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
int _inb(int);
int /*<<< orphan*/ _outb(int, int);
int play_speaker(uint16_t f) {
  int freq = 1193182 / f;
  _outb(0xb6, 0x43);
  _outb((short int)freq, 0x42);
  _outb((short int)(freq >> 8), 0x42);
  uint8_t tmp = _inb(0x61);
  tmp = tmp | 3;
  _outb(tmp, 0x61);
  return 1;
}


x86 assembly (clang, -O0):
<play_speaker>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1234de,%eax
cltd
idivl  -0x4(%rbp)
mov    %eax,-0x8(%rbp)
mov    $0xb6,%edi
mov    $0x43,%esi
call   1030 <_outb@plt>
mov    -0x8(%rbp),%eax
movswl %ax,%edi
mov    $0x42,%esi
call   1030 <_outb@plt>
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
movswl %ax,%edi
mov    $0x42,%esi
call   1030 <_outb@plt>
mov    $0x61,%edi
call   1040 <_inb@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
or     $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    $0x61,%esi
call   1030 <_outb@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<play_speaker>:
push   %rbx
mov    $0x1234de,%eax
xor    %edx,%edx
idiv   %edi
mov    %eax,%ebx
mov    $0xb6,%edi
mov    $0x43,%esi
call   1030 <_outb@plt>
movswl %bx,%edi
mov    $0x42,%esi
call   1030 <_outb@plt>
sar    $0x8,%ebx
mov    %ebx,%edi
mov    $0x42,%esi
call   1030 <_outb@plt>
mov    $0x61,%edi
call   1040 <_inb@plt>
or     $0x3,%eax
mov    %eax,%edi
mov    $0x61,%esi
call   1030 <_outb@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @play_speaker(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sdiv i32 1193182, %5
store i32 %6, i32* %3
%7 = call i32 @_outb(i32 182, i32 67)
%8 = load i32, i32* %3
%9 = trunc i32 %8 to i16
%10 = sext i16 %9 to i32
%11 = call i32 @_outb(i32 %10, i32 66)
%12 = load i32, i32* %3
%13 = ashr i32 %12, 8
%14 = trunc i32 %13 to i16
%15 = sext i16 %14 to i32
%16 = call i32 @_outb(i32 %15, i32 66)
%17 = call i32 @_inb(i32 97)
store i32 %17, i32* %4
%18 = load i32, i32* %4
%19 = or i32 %18, 3
store i32 %19, i32* %4
%20 = load i32, i32* %4
%21 = call i32 @_outb(i32 %20, i32 97)
ret i32 1
}

LLVM IR (-O2):
define i32 @play_speaker(i32 %0) {
%2 = sdiv i32 1193182, %0
%3 = tail call i32 @_outb(i32 182, i32 67)
%4 = shl i32 %2, 16
%5 = ashr exact i32 %4, 16
%6 = tail call i32 @_outb(i32 %5, i32 66)
%7 = ashr i32 %2, 8
%8 = tail call i32 @_outb(i32 %7, i32 66)
%9 = tail call i32 @_inb(i32 97)
%10 = or i32 %9, 3
%11 = tail call i32 @_outb(i32 %10, i32 97)
ret i32 1
}
/* Variables and functions */
int strlen(char str[]) {
  int ret = 0;
  while (str[ret++] != '\0')
    ;
  return ret;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1133 <strlen+0x33>
jmp    110f <strlen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmpb   $0x0,(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret

LLVM IR (-O0):
define i32 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
store i32 %7, i32* %3
%8 = sext i32 %6 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %4
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %4, %2 ], [ 0, %1 ]
%4 = add nuw i64 %3, 1
%5 = getelementptr inbounds i8, i8* %0, i64 %3
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %4 to i32
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void usage(const char *name) {
  do {
    fprintf(stderr,
            "Usage: %s [-m] [-M] [-o outfile] filename(s)"
            "\n",
            name);
    exit(EXIT_FAILURE);
  } while (0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [46 x i8] c"Usage: %s [-m] [-M] [-o outfile] filename(s)\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %1
%4 = load i32, i32* @stderr
%5 = load i8*, i8** %2
%6 = call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i32, i32* @EXIT_FAILURE
%8 = call i32 @exit(i32 %7)
unreachable
9: ; No predecessors!
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [46 x i8] c"Usage: %s [-m] [-M] [-o outfile] filename(s)\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
int test_imm_A6int8_reg(signed char val) {
  return ((val) & (-0xA6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A6int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff5a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A6int8_reg>:
test   $0xffffff5a,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A6int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -166
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A6int8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -166
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void EthernetEnable(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) |= 0x00000010;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) |= 0x00000001;
  (*((volatile unsigned long *)(ulBase + 0x0000000C))) |= 0x00000001;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) |= 0x00000010;
}


x86 assembly (clang, -O0):
<EthernetEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
or     $0x10,%rcx
mov    %rcx,0x8(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
or     $0x1,%rcx
mov    %rcx,0x8(%rax)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rcx
or     $0x1,%rcx
mov    %rcx,0xc(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
or     $0x10,%rcx
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EthernetEnable>:
orq    $0x10,0x8(%rdi)
orq    $0x1,0x8(%rdi)
orq    $0x1,0xc(%rdi)
orq    $0x10,0x8(%rdi)
ret

LLVM IR (-O0):
define void @EthernetEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 8
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 16
store volatile i64 %7, i64* %5
%8 = load i64, i64* %2
%9 = add i64 %8, 8
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
%12 = or i64 %11, 1
store volatile i64 %12, i64* %10
%13 = load i64, i64* %2
%14 = add i64 %13, 12
%15 = inttoptr i64 %14 to i64*
%16 = load volatile i64, i64* %15
%17 = or i64 %16, 1
store volatile i64 %17, i64* %15
%18 = load i64, i64* %2
%19 = add i64 %18, 8
%20 = inttoptr i64 %19 to i64*
%21 = load volatile i64, i64* %20
%22 = or i64 %21, 16
store volatile i64 %22, i64* %20
ret void
}

LLVM IR (-O2):
define void @EthernetEnable(i64 %0) {
%2 = add i64 %0, 8
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = or i64 %4, 16
store volatile i64 %5, i64* %3
%6 = load volatile i64, i64* %3
%7 = or i64 %6, 1
store volatile i64 %7, i64* %3
%8 = add i64 %0, 12
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = or i64 %10, 1
store volatile i64 %11, i64* %9
%12 = load volatile i64, i64* %3
%13 = or i64 %12, 16
store volatile i64 %13, i64* %3
ret void
}
void nop4(void *a1, void *a2, void *a3, void *a4) { return; }


x86 assembly (clang, -O0):
<nop4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nop4>:
ret

LLVM IR (-O0):
define void @nop4(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
ret void
}

LLVM IR (-O2):
define void @nop4(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2, i8* nocapture %3) {
ret void
}
/* Variables and functions */
int read(int /*<<< orphan*/, char *, int);
getchar() {
  char c;
  if (read(0, &c, 1) != 1)
    return (0);
  return (c);
}


x86 assembly (clang, -O0):
<getchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <read@plt>
cmp    $0x1,%eax
je     113d <getchar+0x2d>
movl   $0x0,-0x4(%rbp)
jmp    1144 <getchar+0x34>
movsbl -0x5(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getchar>:
push   %rbx
sub    $0x10,%rsp
xor    %ebx,%ebx
lea    0xf(%rsp),%rsi
xor    %edi,%edi
mov    $0x1,%edx
call   1030 <read@plt>
cmp    $0x1,%eax
movsbl 0xf(%rsp),%eax
cmovne %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @getchar() {
%1 = alloca i32
%2 = alloca i8
%3 = call i32 @read(i32 0, i8* %2, i32 1)
%4 = icmp ne i32 %3, 1
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 0, i32* %1
br label %9
6: ; preds = %0
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
store i32 %8, i32* %1
br label %9
9: ; preds = %6, %5
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @getchar() {
%1 = alloca i8
%2 = call i32 @read(i32 0, i8* %1, i32 1)
%3 = icmp eq i32 %2, 1
%4 = load i8, i8* %1
%5 = sext i8 %4 to i32
%6 = select i1 %3, i32 %5, i32 0
ret i32 %6
}
unsigned int hash(const char *key, unsigned int tableSize) {
  register const char *ptr = key;
  register unsigned int value = 0;
  while (*ptr != '\0') {
    value = (value * 37) + (int)*ptr++;
  }
  return value % tableSize;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     114a <hash+0x4a>
imul   $0x25,-0x1c(%rbp),%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movsbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0x1c(%rbp)
jmp    111a <hash+0x1a>
mov    -0x1c(%rbp),%eax
xor    %edx,%edx
divl   -0xc(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1128 <hash+0x28>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
lea    (%rax,%rax,8),%edx
lea    (%rax,%rdx,4),%eax
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash+0x10>
jmp    112a <hash+0x2a>
xor    %eax,%eax
xor    %edx,%edx
div    %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
store i32 0, i32* %6
br label %8
8: ; preds = %13, %2
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %21
13: ; preds = %8
%14 = load i32, i32* %6
%15 = mul i32 %14, 37
%16 = load i8*, i8** %5
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %5
%18 = load i8, i8* %16
%19 = sext i8 %18 to i32
%20 = add i32 %15, %19
store i32 %20, i32* %6
br label %8
21: ; preds = %8
%22 = load i32, i32* %6
%23 = load i32, i32* %4
%24 = urem i32 %22, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @hash(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i32 [ %12, %5 ], [ 0, %2 ]
%8 = phi i8* [ %11, %5 ], [ %0, %2 ]
%9 = sext i8 %6 to i32
%10 = mul i32 %7, 37
%11 = getelementptr inbounds i8, i8* %8, i64 1
%12 = add i32 %10, %9
%13 = load i8, i8* %11
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i32 [ 0, %2 ], [ %12, %5 ]
%17 = urem i32 %16, %1
ret i32 %17
}
void LED_OFF(void) {}


x86 assembly (clang, -O0):
<LED_OFF>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LED_OFF>:
ret

LLVM IR (-O0):
define void @LED_OFF() {
ret void
}

LLVM IR (-O2):
define void @LED_OFF() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
uint32_t read_reg32(volatile uint32_t *reg) {
  return ((*((volatile uint32_t *)(reg))));
}


x86 assembly (clang, -O0):
<read_reg32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_reg32>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read_reg32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load volatile i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @read_reg32(i32* %0) {
%2 = load volatile i32, i32* %0
ret i32 %2
}
float CG_OpFuncCompareSmaller(const float a, const float b) { return (a < b); }


x86 assembly (clang, -O0):
<CG_OpFuncCompareSmaller>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
cvtsi2ss %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_OpFuncCompareSmaller>:
cmpltss %xmm1,%xmm0
movss  0xef3(%rip),%xmm1
andps  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @CG_OpFuncCompareSmaller(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp olt float %5, %6
%8 = zext i1 %7 to i32
%9 = sitofp i32 %8 to float
ret float %9
}

LLVM IR (-O2):
define float @CG_OpFuncCompareSmaller(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = uitofp i1 %3 to float
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void clrscr() { printf("\033[2J"); }


x86 assembly (clang, -O0):
<clrscr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clrscr>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"\1B[2J\00"
define void @clrscr() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"\1B[2J\00"
define void @clrscr() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gfx_select_alpha_region(int);
int /*<<< orphan*/ gfx_set_alpha_color_enable(int /*<<< orphan*/);
int /*<<< orphan*/ gfx_set_alpha_enable(int /*<<< orphan*/);
int /*<<< orphan*/ gfx_set_video_enable(int /*<<< orphan*/);
void gfx_reset_video(void) {
  int i;
  gfx_set_video_enable(0);
  for (i = 2; i >= 0; i--) {
    gfx_select_alpha_region(i);
    gfx_set_alpha_enable(0);
    gfx_set_alpha_color_enable(0);
  }
}


x86 assembly (clang, -O0):
<gfx_reset_video>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1030 <gfx_set_video_enable@plt>
movl   $0x2,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1184 <gfx_reset_video+0x44>
mov    -0x4(%rbp),%edi
call   1040 <gfx_select_alpha_region@plt>
xor    %edi,%edi
call   1060 <gfx_set_alpha_enable@plt>
xor    %edi,%edi
call   1050 <gfx_set_alpha_color_enable@plt>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1156 <gfx_reset_video+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_reset_video>:
push   %rax
xor    %edi,%edi
call   1030 <gfx_set_video_enable@plt>
mov    $0x2,%edi
call   1040 <gfx_select_alpha_region@plt>
xor    %edi,%edi
call   1060 <gfx_set_alpha_enable@plt>
xor    %edi,%edi
call   1050 <gfx_set_alpha_color_enable@plt>
mov    $0x1,%edi
call   1040 <gfx_select_alpha_region@plt>
xor    %edi,%edi
call   1060 <gfx_set_alpha_enable@plt>
xor    %edi,%edi
call   1050 <gfx_set_alpha_color_enable@plt>
xor    %edi,%edi
call   1040 <gfx_select_alpha_region@plt>
xor    %edi,%edi
call   1060 <gfx_set_alpha_enable@plt>
xor    %edi,%edi
pop    %rax
jmp    1050 <gfx_set_alpha_color_enable@plt>

LLVM IR (-O0):
define void @gfx_reset_video() {
%1 = alloca i32
%2 = call i32 @gfx_set_video_enable(i32 0)
store i32 2, i32* %1
br label %3
3: ; preds = %11, %0
%4 = load i32, i32* %1
%5 = icmp sge i32 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %3
%7 = load i32, i32* %1
%8 = call i32 @gfx_select_alpha_region(i32 %7)
%9 = call i32 @gfx_set_alpha_enable(i32 0)
%10 = call i32 @gfx_set_alpha_color_enable(i32 0)
br label %11
11: ; preds = %6
%12 = load i32, i32* %1
%13 = add nsw i32 %12, -1
store i32 %13, i32* %1
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @gfx_reset_video() {
%1 = tail call i32 @gfx_set_video_enable(i32 0)
%2 = tail call i32 @gfx_select_alpha_region(i32 2)
%3 = tail call i32 @gfx_set_alpha_enable(i32 0)
%4 = tail call i32 @gfx_set_alpha_color_enable(i32 0)
%5 = tail call i32 @gfx_select_alpha_region(i32 1)
%6 = tail call i32 @gfx_set_alpha_enable(i32 0)
%7 = tail call i32 @gfx_set_alpha_color_enable(i32 0)
%8 = tail call i32 @gfx_select_alpha_region(i32 0)
%9 = tail call i32 @gfx_set_alpha_enable(i32 0)
%10 = tail call i32 @gfx_set_alpha_color_enable(i32 0)
ret void
}
/* Variables and functions */
int booster_statfs(char const *, void *);
int statfs(const char *pathname, void *buf) {
  return booster_statfs(pathname, buf);
}


x86 assembly (clang, -O0):
<statfs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <booster_statfs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<statfs>:
jmp    1030 <booster_statfs@plt>

LLVM IR (-O0):
define i32 @statfs(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @booster_statfs(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @statfs(i8* %0, i8* %1) {
%3 = tail call i32 @booster_statfs(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ PathPlanHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void PathPlanRequestUpdate() { UAVObjRequestUpdate(PathPlanHandle()); }


x86 assembly (clang, -O0):
<PathPlanRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PathPlanHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PathPlanRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <PathPlanHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @PathPlanRequestUpdate() {
%1 = call i32 (...) @PathPlanHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @PathPlanRequestUpdate() {
%1 = tail call i32 (...) @PathPlanHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
uint32_t u32Bad(int a) {
  uint32_t ui32good;
  int32_t i32good;
  uint32_t badui32;
  int32_t badi32;
  int *intpointer = NULL;
  int **intppointer = NULL;
  int ***intpppointer = NULL;
  return 5;
}


x86 assembly (clang, -O0):
<u32Bad>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
movq   $0x0,-0x30(%rbp)
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<u32Bad>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @u32Bad(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32**
%9 = alloca i32***
store i32 %0, i32* %2
store i32* null, i32** %7
store i32** null, i32*** %8
store i32*** null, i32**** %9
ret i32 5
}

LLVM IR (-O2):
define i32 @u32Bad(i32 %0) {
ret i32 5
}
int pintcmp(int *work, int *a, int *b) { return -(work[*a] - work[*b]); }


x86 assembly (clang, -O0):
<pintcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq (%rcx),%rcx
mov    (%rax,%rcx,4),%ecx
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rdx
movslq (%rdx),%rdx
sub    (%rax,%rdx,4),%ecx
xor    %eax,%eax
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pintcmp>:
movslq (%rsi),%rcx
movslq (%rdx),%rax
mov    (%rdi,%rax,4),%eax
sub    (%rdi,%rcx,4),%eax
ret

LLVM IR (-O0):
define i32 @pintcmp(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %7, i64 %10
%12 = load i32, i32* %11
%13 = load i32*, i32** %4
%14 = load i32*, i32** %6
%15 = load i32, i32* %14
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %13, i64 %16
%18 = load i32, i32* %17
%19 = sub nsw i32 %12, %18
%20 = sub nsw i32 0, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @pintcmp(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %1
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
%7 = load i32, i32* %6
%8 = load i32, i32* %2
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = sub i32 %11, %7
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int write(int, char *, int);
void write_int(int fd, int *c) {
  if (sizeof(int) != write(fd, (char *)c, sizeof(int)))
    exit(2);
}


x86 assembly (clang, -O0):
<write_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
movslq %eax,%rcx
mov    $0x4,%eax
cmp    %rcx,%rax
je     115b <write_int+0x3b>
mov    $0x2,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_int>:
push   %rax
mov    $0x4,%edx
call   1030 <write@plt>
cmp    $0x4,%eax
jne    1132 <write_int+0x12>
pop    %rax
ret
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @write_int(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = bitcast i32* %6 to i8*
%8 = call i32 @write(i32 %5, i8* %7, i32 4)
%9 = sext i32 %8 to i64
%10 = icmp ne i64 4, %9
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @exit(i32 2)
unreachable
13: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @write_int(i32 %0, i32* nocapture %1) {
%3 = bitcast i32* %1 to i8*
%4 = tail call i32 @write(i32 %0, i8* %3, i32 4)
%5 = icmp eq i32 %4, 4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @exit(i32 2)
unreachable
8: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ listcams();
int main() { listcams(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <listcams@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <listcams@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @listcams()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @listcams()
ret i32 0
}
unsigned long long int factorial(unsigned int n) {
  return n <= 1 ? 1 : n * factorial(n - 1);
}


x86 assembly (clang, -O0):
<factorial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
ja     1133 <factorial+0x23>
mov    $0x1,%eax
mov    %rax,-0x10(%rbp)
jmp    1154 <factorial+0x44>
mov    -0x4(%rbp),%eax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <factorial@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<factorial>:
mov    $0x1,%eax
cmp    $0x2,%edi
jb     1130 <factorial+0x30>
mov    %edi,%ecx
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
imul   %rcx,%rax
add    $0xffffffffffffffff,%rcx
test   $0xfffffffe,%ecx
jne    1120 <factorial+0x20>
ret

LLVM IR (-O0):
define i64 @factorial(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ule i32 %3, 1
br i1 %4, label %5, label %6
5: ; preds = %1
br label %13
6: ; preds = %1
%7 = load i32, i32* %2
%8 = zext i32 %7 to i64
%9 = load i32, i32* %2
%10 = sub i32 %9, 1
%11 = call i64 @factorial(i32 %10)
%12 = mul i64 %8, %11
br label %13
13: ; preds = %6, %5
%14 = phi i64 [ 1, %5 ], [ %12, %6 ]
ret i64 %14
}

LLVM IR (-O2):
define i64 @factorial(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = zext i32 %0 to i64
br label %5
5: ; preds = %3, %5
%6 = phi i64 [ %4, %3 ], [ %8, %5 ]
%7 = phi i64 [ 1, %3 ], [ %9, %5 ]
%8 = add nsw i64 %6, -1
%9 = mul i64 %7, %6
%10 = and i64 %8, 4294967294
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %5
12: ; preds = %5, %1
%13 = phi i64 [ 1, %1 ], [ %9, %5 ]
ret i64 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_END;
int /*<<< orphan*/ SEEK_SET;
int /*<<< orphan*/ fseek(int /*<<< orphan*/ *, long, int /*<<< orphan*/);
long ftell(int /*<<< orphan*/ *);
long foo_filesize(FILE *fd) {
  long size;
  long fpi = ftell(fd);
  fseek(fd, 0L, SEEK_END);
  size = ftell(fd);
  fseek(fd, fpi, SEEK_SET);
  return size;
}


x86 assembly (clang, -O0):
<foo_filesize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ftell@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ea4(%rip),%rax
mov    (%rax),%edx
xor    %eax,%eax
mov    %eax,%esi
call   1040 <fseek@plt>
mov    -0x8(%rbp),%rdi
call   1030 <ftell@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    0x2e6d(%rip),%rax
mov    (%rax),%edx
call   1040 <fseek@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_filesize>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%rbx
call   1030 <ftell@plt>
mov    %rax,%r14
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
xor    %esi,%esi
call   1040 <fseek@plt>
mov    %rbx,%rdi
call   1030 <ftell@plt>
mov    %rax,%r15
mov    0x2e83(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <fseek@plt>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i64 @foo_filesize(i32* %0) {
%2 = alloca i32*
%3 = alloca i64
%4 = alloca i64
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = call i64 @ftell(i32* %5)
store i64 %6, i64* %4
%7 = load i32*, i32** %2
%8 = load i32, i32* @SEEK_END
%9 = call i32 @fseek(i32* %7, i64 0, i32 %8)
%10 = load i32*, i32** %2
%11 = call i64 @ftell(i32* %10)
store i64 %11, i64* %3
%12 = load i32*, i32** %2
%13 = load i64, i64* %4
%14 = load i32, i32* @SEEK_SET
%15 = call i32 @fseek(i32* %12, i64 %13, i32 %14)
%16 = load i64, i64* %3
ret i64 %16
}

LLVM IR (-O2):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i64 @foo_filesize(i32* nocapture %0) {
%2 = tail call i64 @ftell(i32* %0)
%3 = load i32, i32* @SEEK_END
%4 = tail call i32 @fseek(i32* %0, i64 0, i32 %3)
%5 = tail call i64 @ftell(i32* %0)
%6 = load i32, i32* @SEEK_SET
%7 = tail call i32 @fseek(i32* %0, i64 %2, i32 %6)
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ gpio_write_value(int, int);
int /*<<< orphan*/ usleep(int);
void lcd_enable(void) {
  gpio_write_value(69, 1);
  usleep(2 * 1000);
  gpio_write_value(69, 0);
}


x86 assembly (clang, -O0):
<lcd_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x45,%edi
mov    $0x1,%esi
call   1030 <gpio_write_value@plt>
mov    $0x7d0,%edi
call   1040 <usleep@plt>
mov    $0x45,%edi
xor    %esi,%esi
call   1030 <gpio_write_value@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_enable>:
push   %rax
mov    $0x45,%edi
mov    $0x1,%esi
call   1030 <gpio_write_value@plt>
mov    $0x7d0,%edi
call   1040 <usleep@plt>
mov    $0x45,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <gpio_write_value@plt>

LLVM IR (-O0):
define void @lcd_enable() {
%1 = call i32 @gpio_write_value(i32 69, i32 1)
%2 = call i32 @usleep(i32 2000)
%3 = call i32 @gpio_write_value(i32 69, i32 0)
ret void
}

LLVM IR (-O2):
define void @lcd_enable() {
%1 = tail call i32 @gpio_write_value(i32 69, i32 1)
%2 = tail call i32 @usleep(i32 2000)
%3 = tail call i32 @gpio_write_value(i32 69, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void ldrstdealloc(void *mem, void *ptr, size_t bytes) {
  (void)mem;
  (void)bytes;
  free(ptr);
}


x86 assembly (clang, -O0):
<ldrstdealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldrstdealloc>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @ldrstdealloc(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %6
%9 = load i8*, i8** %5
%10 = call i32 @free(i8* %9)
ret void
}

LLVM IR (-O2):
define void @ldrstdealloc(i8* nocapture readnone %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @free(i8* %1)
ret void
}
unsigned xrop3_241_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D | S;
  stk2 = ~stk2;
  stk1 = T | stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_241_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_241_1_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
lea    (%rcx,%rdi,1),%edx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
or     %edx,%eax
xor    $0xffffff00,%ecx
not    %eax
and    %ecx,%eax
or     %edi,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_241_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = or i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = or i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %7
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = load i32, i32* %5
%38 = load i32, i32* %6
%39 = and i32 %37, %38
%40 = or i32 %36, %39
%41 = load i32, i32* %5
%42 = load i32, i32* %7
%43 = and i32 %41, %42
%44 = or i32 %40, %43
ret i32 %44
}

LLVM IR (-O2):
define i32 @xrop3_241_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = mul nuw nsw i32 %6, 257
%8 = xor i32 %4, -256
%9 = or i32 %5, %7
%10 = xor i32 %9, -1
%11 = and i32 %8, %10
%12 = or i8 %1, %0
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
ret i32 %14
}
/* Variables and functions */
int bufcon_lens(char *s) {
  int i = 0;
  while (s[i] != 0)
    i++;
  return i;
}


x86 assembly (clang, -O0):
<bufcon_lens>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1132 <bufcon_lens+0x32>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <bufcon_lens+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bufcon_lens>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <bufcon_lens+0x10>
ret

LLVM IR (-O0):
define i32 @bufcon_lens(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @bufcon_lens(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
void f2(int *p) {
  {
    if (*p != 1) {
    ERROR:
      goto ERROR;
    } else {
    }
    return;
  }
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x1,(%rax)
je     111f <f2+0x1f>
jmp    111a <f2+0x1a>
jmp    111a <f2+0x1a>
jmp    1124 <f2+0x24>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
cmpl   $0x1,(%rdi)
jne    1110 <f2+0x10>
ret
cs nopw 0x0(%rax,%rax,1)
jmp    1110 <f2+0x10>

LLVM IR (-O0):
define void @f2(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 1
br i1 %5, label %6, label %8
6: ; preds = %1
br label %7
7: ; preds = %7, %6
br label %7
8: ; preds = %1
br label %9
9: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @f2(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp eq i32 %2, 1
br i1 %3, label %5, label %4
4: ; preds = %1, %4
br label %4
5: ; preds = %1
ret void
}
/* Variables and functions */
int pipe(int *);
int lisp_pipe(int pipefd[2]) { return pipe(pipefd); }


x86 assembly (clang, -O0):
<lisp_pipe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pipe@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lisp_pipe>:
jmp    1030 <pipe@plt>

LLVM IR (-O0):
define i32 @lisp_pipe(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @pipe(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @lisp_pipe(i32* %0) {
%2 = tail call i32 @pipe(i32* %0)
ret i32 %2
}
double eval_zero(void *s) { return 0; }


x86 assembly (clang, -O0):
<eval_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<eval_zero>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @eval_zero(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @eval_zero(i8* nocapture readnone %0) {
ret double 0.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void sig_chld(int signo) { exit(2); }


x86 assembly (clang, -O0):
<sig_chld>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x2,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<sig_chld>:
push   %rax
mov    $0x2,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @sig_chld(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
define void @sig_chld(i32 %0) {
%2 = tail call i32 @exit(i32 2)
unreachable
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
void CurrentTime(struct timeval *tTime) { gettimeofday(tTime, NULL); }


x86 assembly (clang, -O0):
<CurrentTime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CurrentTime>:
xor    %esi,%esi
jmp    1030 <gettimeofday@plt>

LLVM IR (-O0):
%struct.timeval = type { i32 }
define void @CurrentTime(%struct.timeval* %0) {
%2 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %2
%3 = load %struct.timeval*, %struct.timeval** %2
%4 = call i32 @gettimeofday(%struct.timeval* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define void @CurrentTime(%struct.timeval* nocapture %0) {
%2 = tail call i32 @gettimeofday(%struct.timeval* %0, i32* null)
ret void
}
long gcd2(long a, long b) {
  return (a == b ? a : (a > b ? gcd2(a - b, b) : gcd2(b - a, a)));
}


x86 assembly (clang, -O0):
<gcd2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jne    113b <gcd2+0x2b>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1180 <gcd2+0x70>
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1163 <gcd2+0x53>
mov    -0x8(%rbp),%rdi
sub    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <gcd2@plt>
mov    %rax,-0x20(%rbp)
jmp    1178 <gcd2+0x68>
mov    -0x10(%rbp),%rdi
sub    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <gcd2@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd2>:
cmp    %rsi,%rdi
jne    1110 <gcd2+0x10>
mov    %rdi,%rax
ret
nopl   0x0(%rax)
mov    %rdi,%rax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
sub    %rsi,%rcx
jle    1130 <gcd2+0x30>
mov    %rcx,%rax
cmp    %rcx,%rsi
jne    1120 <gcd2+0x20>
jmp    113f <gcd2+0x3f>
nop
mov    %rsi,%rdi
sub    %rax,%rdi
mov    %rax,%rsi
cmp    %rdi,%rax
jne    1110 <gcd2+0x10>
ret
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @gcd2(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %28
10: ; preds = %2
%11 = load i64, i64* %3
%12 = load i64, i64* %4
%13 = icmp sgt i64 %11, %12
br i1 %13, label %14, label %20
14: ; preds = %10
%15 = load i64, i64* %3
%16 = load i64, i64* %4
%17 = sub nsw i64 %15, %16
%18 = load i64, i64* %4
%19 = call i64 @gcd2(i64 %17, i64 %18)
br label %26
20: ; preds = %10
%21 = load i64, i64* %4
%22 = load i64, i64* %3
%23 = sub nsw i64 %21, %22
%24 = load i64, i64* %3
%25 = call i64 @gcd2(i64 %23, i64 %24)
br label %26
26: ; preds = %20, %14
%27 = phi i64 [ %19, %14 ], [ %25, %20 ]
br label %28
28: ; preds = %26, %8
%29 = phi i64 [ %9, %8 ], [ %27, %26 ]
ret i64 %29
}

LLVM IR (-O2):
define i64 @gcd2(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
br i1 %3, label %16, label %4
4: ; preds = %2, %13
%5 = phi i64 [ %8, %13 ], [ %1, %2 ]
%6 = phi i64 [ %14, %13 ], [ %0, %2 ]
br label %7
7: ; preds = %4, %10
%8 = phi i64 [ %6, %4 ], [ %11, %10 ]
%9 = icmp sgt i64 %8, %5
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = sub nsw i64 %8, %5
%12 = icmp eq i64 %11, %5
br i1 %12, label %16, label %7
13: ; preds = %7
%14 = sub nsw i64 %5, %8
%15 = icmp eq i64 %14, %8
br i1 %15, label %16, label %4
16: ; preds = %13, %10, %2
%17 = phi i64 [ %0, %2 ], [ %5, %10 ], [ %8, %13 ]
ret i64 %17
}
int setgid() { return -1; }


x86 assembly (clang, -O0):
<setgid>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setgid>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @setgid() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @setgid() {
ret i32 -1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
__attribute__((always_)) int is_dt_coproc(uint32_t op) {
  return !((op & 0x0E000000) ^ 0x0C000000);
}


x86 assembly (clang, -O0):
<is_dt_coproc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xe000000,%eax
xor    $0xc000000,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_dt_coproc>:
and    $0xe000000,%edi
xor    %eax,%eax
cmp    $0xc000000,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_dt_coproc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 234881024
%5 = xor i32 %4, 201326592
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_dt_coproc(i32 %0) {
%2 = and i32 %0, 234881024
%3 = icmp eq i32 %2, 201326592
%4 = zext i1 %3 to i32
ret i32 %4
}