xunge/DecIR huggingface dataset:
void test___atomic_fetch_xor_1(short *mem) { __atomic_fetch_xor(mem, -1, 4); }


x86 assembly (clang, -O0):
<test___atomic_fetch_xor_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movw   $0xffff,-0xa(%rbp)
mov    -0xa(%rbp),%cx
mov    %cx,-0x10(%rbp)
mov    (%rax),%ax
mov    %ax,-0xe(%rbp)
mov    -0xe(%rbp),%ax
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%dx
mov    %dx,%si
mov    %ax,%dx
mov    %edx,-0x24(%rbp)
xor    %esi,%edx
mov    %edx,-0x20(%rbp)
lock cmpxchg %dx,(%rcx)
sete   %cl
mov    %ax,-0x1a(%rbp)
test   $0x1,%cl
mov    %ax,-0xe(%rbp)
jne    115d <test___atomic_fetch_xor_1+0x5d>
jmp    1125 <test___atomic_fetch_xor_1+0x25>
mov    -0x1a(%rbp),%ax
mov    %ax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test___atomic_fetch_xor_1>:
lock xorw $0xffff,(%rdi)
ret

LLVM IR (-O0):
define void @test___atomic_fetch_xor_1(i16* %0) {
%2 = alloca i16*
%3 = alloca i16
%4 = alloca i16
store i16* %0, i16** %2
%5 = load i16*, i16** %2
store i16 -1, i16* %3
%6 = load i16, i16* %3
%7 = atomicrmw xor i16* %5, i16 %6 acq_rel
store i16 %7, i16* %4
%8 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @test___atomic_fetch_xor_1(i16* nocapture %0) {
%2 = atomicrmw xor i16* %0, i16 -1 acq_rel
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LOCK_UN;
int sw_flock(int, int /*<<< orphan*/);
int sw_un_flock(int fd) { return sw_flock(fd, LOCK_UN); }


x86 assembly (clang, -O0):
<sw_un_flock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <sw_flock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sw_un_flock>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <sw_flock@plt>

LLVM IR (-O0):
@LOCK_UN = global i32 0
define i32 @sw_un_flock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @LOCK_UN
%5 = call i32 @sw_flock(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@LOCK_UN = global i32 0
define i32 @sw_un_flock(i32 %0) {
%2 = load i32, i32* @LOCK_UN
%3 = tail call i32 @sw_flock(i32 %0, i32 %2)
ret i32 %3
}
void __DELETE_java_io_InvalidObjectException(void *me, void *client_data) {}


x86 assembly (clang, -O0):
<__DELETE_java_io_InvalidObjectException>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DELETE_java_io_InvalidObjectException>:
ret

LLVM IR (-O0):
define void @__DELETE_java_io_InvalidObjectException(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__DELETE_java_io_InvalidObjectException(i8* nocapture %0, i8* nocapture %1) {
ret void
}
void ls_costN_nm5_decref(void) {}


x86 assembly (clang, -O0):
<ls_costN_nm5_decref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm5_decref>:
ret

LLVM IR (-O0):
define void @ls_costN_nm5_decref() {
ret void
}

LLVM IR (-O2):
define void @ls_costN_nm5_decref() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
int main(int argc, char **argv) { usleep(17); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x11,%edi
call   1030 <usleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x11,%edi
call   1030 <usleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @usleep(i32 17)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @usleep(i32 17)
ret i32 0
}
/* Variables and functions */
int exp(float);
int sqrt(double);
float gaussf(float x) {
  return 2 / sqrt(3.141592653589793238462643) * exp(-x * x);
}


x86 assembly (clang, -O0):
<gaussf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movsd  0xecb(%rip),%xmm0
call   1040 <sqrt@plt>
mov    %eax,%ecx
mov    $0x2,%eax
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mulss  -0x4(%rbp),%xmm0
call   1030 <exp@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
imul   %ecx,%eax
cvtsi2ss %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gaussf>:
push   %rbx
sub    $0x10,%rsp
movaps %xmm0,(%rsp)
movsd  0xecf(%rip),%xmm0
call   1040 <sqrt@plt>
mov    %eax,%ecx
mov    $0x2,%eax
xor    %edx,%edx
idiv   %ecx
mov    %eax,%ebx
movaps 0xec6(%rip),%xmm0
movaps (%rsp),%xmm1
xorps  %xmm1,%xmm0
mulss  %xmm1,%xmm0
call   1030 <exp@plt>
imul   %ebx,%eax
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define float @gaussf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = call i32 @sqrt(double 0x400921FB54442D18)
%4 = sdiv i32 2, %3
%5 = load float, float* %2
%6 = fneg float %5
%7 = load float, float* %2
%8 = fmul float %6, %7
%9 = call i32 @exp(float %8)
%10 = mul nsw i32 %4, %9
%11 = sitofp i32 %10 to float
ret float %11
}

LLVM IR (-O2):
define float @gaussf(float %0) {
%2 = tail call i32 @sqrt(double 0x400921FB54442D18)
%3 = sdiv i32 2, %2
%4 = fneg float %0
%5 = fmul float %4, %0
%6 = tail call i32 @exp(float %5)
%7 = mul nsw i32 %6, %3
%8 = sitofp i32 %7 to float
ret float %8
}
/* Variables and functions */
int /*<<< orphan*/ _dbg_check_lock();
int /*<<< orphan*/ _stats_start_measure_crit_thd();
int /*<<< orphan*/ port_lock();
void chSysLock(void) {
  port_lock();
  _stats_start_measure_crit_thd();
  _dbg_check_lock();
}


x86 assembly (clang, -O0):
<chSysLock>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <port_lock@plt>
mov    $0x0,%al
call   1030 <_stats_start_measure_crit_thd@plt>
mov    $0x0,%al
call   1040 <_dbg_check_lock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<chSysLock>:
push   %rax
xor    %eax,%eax
call   1050 <port_lock@plt>
xor    %eax,%eax
call   1030 <_stats_start_measure_crit_thd@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <_dbg_check_lock@plt>

LLVM IR (-O0):
define void @chSysLock() {
%1 = call i32 (...) @port_lock()
%2 = call i32 (...) @_stats_start_measure_crit_thd()
%3 = call i32 (...) @_dbg_check_lock()
ret void
}

LLVM IR (-O2):
define void @chSysLock() {
%1 = tail call i32 (...) @port_lock()
%2 = tail call i32 (...) @_stats_start_measure_crit_thd()
%3 = tail call i32 (...) @_dbg_check_lock()
ret void
}
void ADCProcessorTrigger(unsigned long ulBase, unsigned long ulSequenceNum) {
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000028))) =
      ((ulSequenceNum & 0xffff0000) | (1 << (ulSequenceNum & 0xf)));
}


x86 assembly (clang, -O0):
<ADCProcessorTrigger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movabs $0xffff0000,%rax
and    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
and    $0xf,%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    -0x18(%rbp),%rcx
cltq
or     %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x28(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCProcessorTrigger>:
mov    %rsi,%rcx
mov    %ecx,%eax
and    $0xf,%cl
mov    $0x1,%edx
shl    %cl,%edx
and    $0xffff0000,%eax
or     %rax,%rdx
mov    %rdx,0x28(%rdi)
ret

LLVM IR (-O0):
define void @ADCProcessorTrigger(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = and i64 %5, 4294901760
%7 = load i64, i64* %4
%8 = and i64 %7, 15
%9 = trunc i64 %8 to i32
%10 = shl i32 1, %9
%11 = sext i32 %10 to i64
%12 = or i64 %6, %11
%13 = load i64, i64* %3
%14 = add i64 %13, 40
%15 = inttoptr i64 %14 to i64*
store volatile i64 %12, i64* %15
ret void
}

LLVM IR (-O2):
define void @ADCProcessorTrigger(i64 %0, i64 %1) {
%3 = and i64 %1, 4294901760
%4 = trunc i64 %1 to i32
%5 = and i32 %4, 15
%6 = shl nuw nsw i32 1, %5
%7 = zext i32 %6 to i64
%8 = or i64 %3, %7
%9 = add i64 %0, 40
%10 = inttoptr i64 %9 to i64*
store volatile i64 %8, i64* %10
ret void
}
int hashCode(int key) { return key % 10; }


x86 assembly (clang, -O0):
<hashCode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashCode>:
movslq %edi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hashCode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 10
ret i32 %4
}

LLVM IR (-O2):
define i32 @hashCode(i32 %0) {
%2 = srem i32 %0, 10
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ glColor3f(double, double, double);
int /*<<< orphan*/ glutWireTorus(double, double, int, int);
void drawTorus(void) {
  glColor3f(0.5, 0.0, 1.5);
  glutWireTorus(1.0, 6.0, 10, 20);
}


x86 assembly (clang, -O0):
<drawTorus>:
push   %rbp
mov    %rsp,%rbp
movsd  0xee4(%rip),%xmm0
xorps  %xmm1,%xmm1
movsd  0xee1(%rip),%xmm2
call   1030 <glColor3f@plt>
movsd  0xebc(%rip),%xmm0
movsd  0xebc(%rip),%xmm1
mov    $0xa,%edi
mov    $0x14,%esi
call   1040 <glutWireTorus@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawTorus>:
push   %rax
movsd  0xed7(%rip),%xmm0
movsd  0xed7(%rip),%xmm2
xorps  %xmm1,%xmm1
call   1030 <glColor3f@plt>
movsd  0xecf(%rip),%xmm0
movsd  0xecf(%rip),%xmm1
mov    $0xa,%edi
mov    $0x14,%esi
pop    %rax
jmp    1040 <glutWireTorus@plt>

LLVM IR (-O0):
define void @drawTorus() {
%1 = call i32 @glColor3f(double 5.000000e-01, double 0.000000e+00, double 1.500000e+00)
%2 = call i32 @glutWireTorus(double 1.000000e+00, double 6.000000e+00, i32 10, i32 20)
ret void
}

LLVM IR (-O2):
define void @drawTorus() {
%1 = tail call i32 @glColor3f(double 5.000000e-01, double 0.000000e+00, double 1.500000e+00)
%2 = tail call i32 @glutWireTorus(double 1.000000e+00, double 6.000000e+00, i32 10, i32 20)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ handle_VTALRM(int /*<<< orphan*/);
int gen_VTALRM(void) {
  handle_VTALRM(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_VTALRM>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_VTALRM@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_VTALRM>:
push   %rax
xor    %edi,%edi
call   1030 <handle_VTALRM@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_VTALRM() {
%1 = call i32 @handle_VTALRM(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_VTALRM() {
%1 = tail call i32 @handle_VTALRM(i32 0)
ret i32 0
}
void RTStrNLen(void) {}


x86 assembly (clang, -O0):
<RTStrNLen>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTStrNLen>:
ret

LLVM IR (-O0):
define void @RTStrNLen() {
ret void
}

LLVM IR (-O2):
define void @RTStrNLen() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ third(int);
void second(int arg2) {
  int var2 = arg2;
  third(var2 + 1);
}


x86 assembly (clang, -O0):
<second>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
add    $0x1,%edi
call   1030 <third@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<second>:
add    $0x1,%edi
jmp    1030 <third@plt>

LLVM IR (-O0):
define void @second(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 1
%7 = call i32 @third(i32 %6)
ret void
}

LLVM IR (-O2):
define void @second(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = tail call i32 @third(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F3(int **);
void test0() {
  int *X;
  F3(&X);
  *X = 1;
}


x86 assembly (clang, -O0):
<test0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
call   1030 <F3@plt>
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test0>:
push   %rax
mov    %rsp,%rdi
call   1030 <F3@plt>
mov    (%rsp),%rax
movl   $0x1,(%rax)
pop    %rax
ret

LLVM IR (-O0):
define void @test0() {
%1 = alloca i32*
%2 = call i32 @F3(i32** %1)
%3 = load i32*, i32** %1
store i32 1, i32* %3
ret void
}

LLVM IR (-O2):
define void @test0() {
%1 = alloca i32*
%2 = bitcast i32** %1 to i8*
%3 = call i32 @F3(i32** %1)
%4 = load i32*, i32** %1
store i32 1, i32* %4
ret void
}
unsigned int more20(unsigned int a) { return a + 20; }


x86 assembly (clang, -O0):
<more20>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x14,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<more20>:
lea    0x14(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @more20(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 20
ret i32 %4
}

LLVM IR (-O2):
define i32 @more20(i32 %0) {
%2 = add i32 %0, 20
ret i32 %2
}
int C_Utils_compare_byte_ptr(const unsigned char *item1,
                             const unsigned char *item2) {
  unsigned char i1 = *item1;
  unsigned char i2 = *item2;
  if (i1 == i2)
    return 0;
  return i1 < i2 ? -1 : 1;
}


x86 assembly (clang, -O0):
<C_Utils_compare_byte_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x19(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x1a(%rbp)
movzbl -0x19(%rbp),%eax
movzbl -0x1a(%rbp),%ecx
cmp    %ecx,%eax
jne    113a <C_Utils_compare_byte_ptr+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    1154 <C_Utils_compare_byte_ptr+0x54>
movzbl -0x19(%rbp),%edx
movzbl -0x1a(%rbp),%esi
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    %esi,%edx
cmovl  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_Utils_compare_byte_ptr>:
mov    (%rdi),%al
xor    %ecx,%ecx
xor    %edx,%edx
cmp    (%rsi),%al
setae  %dl
lea    -0x1(%rdx,%rdx,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @C_Utils_compare_byte_ptr(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
store i8 %9, i8* %6
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
store i8 %11, i8* %7
%12 = load i8, i8* %6
%13 = zext i8 %12 to i32
%14 = load i8, i8* %7
%15 = zext i8 %14 to i32
%16 = icmp eq i32 %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 0, i32* %3
br label %26
18: ; preds = %2
%19 = load i8, i8* %6
%20 = zext i8 %19 to i32
%21 = load i8, i8* %7
%22 = zext i8 %21 to i32
%23 = icmp slt i32 %20, %22
%24 = zext i1 %23 to i64
%25 = select i1 %23, i32 -1, i32 1
store i32 %25, i32* %3
br label %26
26: ; preds = %18, %17
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @C_Utils_compare_byte_ptr(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp eq i8 %3, %4
%6 = icmp ult i8 %3, %4
%7 = select i1 %6, i32 -1, i32 1
%8 = select i1 %5, i32 0, i32 %7
ret i32 %8
}
void RTCritSectTryEnterDebug(void) {}


x86 assembly (clang, -O0):
<RTCritSectTryEnterDebug>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTCritSectTryEnterDebug>:
ret

LLVM IR (-O0):
define void @RTCritSectTryEnterDebug() {
ret void
}

LLVM IR (-O2):
define void @RTCritSectTryEnterDebug() {
ret void
}
BOOST_AUTO_TEST_CASE(geq) {
  TESTCASE2(geq, 0, 0, 1);
  TESTCASE2(geq, 0, 1, 0);
  TESTCASE2(geq, 1, 0, 1);
  TESTCASE2(geq, 1, 1, 1);
}


x86 assembly (clang, -O0):
<BOOST_AUTO_TEST_CASE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
xor    %edx,%edx
mov    $0x1,%ecx
mov    %edx,%esi
mov    $0x0,%al
call   1030 <TESTCASE2@plt>
mov    -0x8(%rbp),%edi
xor    %ecx,%ecx
mov    $0x1,%edx
mov    %ecx,%esi
mov    $0x0,%al
call   1030 <TESTCASE2@plt>
mov    -0x8(%rbp),%edi
mov    $0x1,%ecx
xor    %edx,%edx
mov    %ecx,%esi
mov    $0x0,%al
call   1030 <TESTCASE2@plt>
mov    -0x8(%rbp),%edi
mov    $0x1,%ecx
mov    %ecx,%esi
mov    %ecx,%edx
mov    $0x0,%al
call   1030 <TESTCASE2@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BOOST_AUTO_TEST_CASE>:
push   %rbx
mov    %edi,%ebx
xor    %esi,%esi
xor    %edx,%edx
mov    $0x1,%ecx
xor    %eax,%eax
call   1030 <TESTCASE2@plt>
mov    %ebx,%edi
xor    %esi,%esi
mov    $0x1,%edx
xor    %ecx,%ecx
xor    %eax,%eax
call   1030 <TESTCASE2@plt>
mov    %ebx,%edi
mov    $0x1,%esi
xor    %edx,%edx
mov    $0x1,%ecx
xor    %eax,%eax
call   1030 <TESTCASE2@plt>
mov    %ebx,%edi
mov    $0x1,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
xor    %eax,%eax
pop    %rbx
jmp    1030 <TESTCASE2@plt>

LLVM IR (-O0):
define i32 @BOOST_AUTO_TEST_CASE(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %4, i32 0, i32 0, i32 1)
%6 = load i32, i32* %3
%7 = call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %6, i32 0, i32 1, i32 0)
%8 = load i32, i32* %3
%9 = call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %8, i32 1, i32 0, i32 1)
%10 = load i32, i32* %3
%11 = call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %10, i32 1, i32 1, i32 1)
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @BOOST_AUTO_TEST_CASE(i32 %0) {
%2 = tail call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %0, i32 0, i32 0, i32 1)
%3 = tail call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %0, i32 0, i32 1, i32 0)
%4 = tail call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %0, i32 1, i32 0, i32 1)
%5 = tail call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %0, i32 1, i32 1, i32 1)
ret i32 undef
}
int wifexited(int stat_val) { return -1; }


x86 assembly (clang, -O0):
<wifexited>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifexited>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @wifexited(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @wifexited(i32 %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void Usage() {
  (void)fprintf(
      stderr, "Usage: idchanger {-r|-w} physical_address_base [new_VendorID "
              "new_DevID new_Subs1 new_Subs2]\nphysical_address_base is a 32 "
              "bit hex value: 0xXXXXXXXX\nids are 16 bit hex values: 0xXXXX\n");
  return;
}


x86 assembly (clang, -O0):
<Usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [183 x i8] c"Usage: idchanger {-r|-w} physical_address_base [new_VendorID new_DevID new_Subs1 new_Subs2]\0Aphysical_address_base is a 32 bit hex value: 0xXXXXXXXX\0Aids are 16 bit hex values: 0xXXXX\0A\00"
define void @Usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([183 x i8], [183 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [183 x i8] c"Usage: idchanger {-r|-w} physical_address_base [new_VendorID new_DevID new_Subs1 new_Subs2]\0Aphysical_address_base is a 32 bit hex value: 0xXXXXXXXX\0Aids are 16 bit hex values: 0xXXXX\0A\00"
define void @Usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([183 x i8], [183 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int8_t;
typedef int /*<<< orphan*/ u_int32_t;
typedef int /*<<< orphan*/ r;

/* Variables and functions */
int /*<<< orphan*/ htonl(int /*<<< orphan*/);
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
void net_write32(u_int8_t *p, u_int32_t n) {
  u_int32_t r;
  r = htonl(n);
  memcpy(p, &r, sizeof(r));
}


x86 assembly (clang, -O0):
<net_write32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <htonl@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1040 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_write32>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %esi,%edi
call   1030 <htonl@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
mov    $0x4,%edx
call   1040 <memcpy@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @net_write32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i32 @htonl(i32 %6)
store i32 %7, i32* %5
%8 = load i32*, i32** %3
%9 = call i32 @memcpy(i32* %8, i32* %5, i32 4)
ret void
}

LLVM IR (-O2):
define void @net_write32(i32* %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = tail call i32 @htonl(i32 %1)
store i32 %5, i32* %3
%6 = call i32 @memcpy(i32* %0, i32* %3, i32 4)
ret void
}
/* Variables and functions */
char system(char *, int, char, char, char);
char i2c_write(int bus, char address, char registar, char command) {
  return system("i2cset -y %d %c %c %c", bus, address, registar, command);
}


x86 assembly (clang, -O0):
<i2c_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %edi,-0x4(%rbp)
mov    %dl,-0x5(%rbp)
mov    %cl,-0x6(%rbp)
mov    %al,-0x7(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x5(%rbp),%cl
mov    -0x6(%rbp),%al
lea    0xec5(%rip),%rdi
movsbl %cl,%edx
movsbl %al,%ecx
movsbl -0x7(%rbp),%r8d
call   1030 <system@plt>
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_write>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee0(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"i2cset -y %d %c %c %c\00"
define signext i8 @i2c_write(i32 %0, i8 signext %1, i8 signext %2, i8 signext %3) {
%5 = alloca i32
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i32 %0, i32* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%9 = load i32, i32* %5
%10 = load i8, i8* %6
%11 = load i8, i8* %7
%12 = load i8, i8* %8
%13 = call signext i8 @system(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %9, i8 signext %10, i8 signext %11, i8 signext %12)
ret i8 %13
}

LLVM IR (-O2):
@.str = [22 x i8] c"i2cset -y %d %c %c %c\00"
define signext i8 @i2c_write(i32 %0, i8 signext %1, i8 signext %2, i8 signext %3) {
%5 = tail call signext i8 @system(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %0, i8 signext %1, i8 signext %2, i8 signext %3)
ret i8 %5
}
/* Variables and functions */
char *parse_stat(char *, int);
char *get_state(char *pid) {
  char *state = parse_stat(pid, 3);
  return state;
}


x86 assembly (clang, -O0):
<get_state>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3,%esi
call   1030 <parse_stat@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_state>:
mov    $0x3,%esi
jmp    1030 <parse_stat@plt>

LLVM IR (-O0):
define i8* @get_state(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @parse_stat(i8* %4, i32 3)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define i8* @get_state(i8* %0) {
%2 = tail call i8* @parse_stat(i8* %0, i32 3)
ret i8* %2
}
void av_get_pix_fmt() {}


x86 assembly (clang, -O0):
<av_get_pix_fmt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_get_pix_fmt>:
ret

LLVM IR (-O0):
define void @av_get_pix_fmt() {
ret void
}

LLVM IR (-O2):
define void @av_get_pix_fmt() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cert_init();
int /*<<< orphan*/ conf_reinit();
int /*<<< orphan*/ connection_reinit();
int /*<<< orphan*/ crl_init();
int /*<<< orphan*/ log_print(char *);
int /*<<< orphan*/ log_reinit();
int /*<<< orphan*/ policy_init();
int /*<<< orphan*/ sa_reinit();
int /*<<< orphan*/ transport_reinit();
void reinit(void) {
  log_print("isakmpd: reinitializing daemon");
  conf_reinit();
  log_reinit();
  policy_init();
  cert_init();
  crl_init();
  connection_reinit();
  transport_reinit();
  sa_reinit();
}


x86 assembly (clang, -O0):
<reinit>:
push   %rbp
mov    %rsp,%rbp
lea    0xe65(%rip),%rdi
call   1060 <log_print@plt>
mov    $0x0,%al
call   1030 <conf_reinit@plt>
mov    $0x0,%al
call   1090 <log_reinit@plt>
mov    $0x0,%al
call   10a0 <policy_init@plt>
mov    $0x0,%al
call   10b0 <cert_init@plt>
mov    $0x0,%al
call   1050 <crl_init@plt>
mov    $0x0,%al
call   1070 <connection_reinit@plt>
mov    $0x0,%al
call   1080 <transport_reinit@plt>
mov    $0x0,%al
call   1040 <sa_reinit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reinit>:
push   %rax
lea    0xe68(%rip),%rdi
call   1060 <log_print@plt>
xor    %eax,%eax
call   1030 <conf_reinit@plt>
xor    %eax,%eax
call   1090 <log_reinit@plt>
xor    %eax,%eax
call   10a0 <policy_init@plt>
xor    %eax,%eax
call   10b0 <cert_init@plt>
xor    %eax,%eax
call   1050 <crl_init@plt>
xor    %eax,%eax
call   1070 <connection_reinit@plt>
xor    %eax,%eax
call   1080 <transport_reinit@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <sa_reinit@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"isakmpd: reinitializing daemon\00"
define void @reinit() {
%1 = call i32 @log_print(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @conf_reinit()
%3 = call i32 (...) @log_reinit()
%4 = call i32 (...) @policy_init()
%5 = call i32 (...) @cert_init()
%6 = call i32 (...) @crl_init()
%7 = call i32 (...) @connection_reinit()
%8 = call i32 (...) @transport_reinit()
%9 = call i32 (...) @sa_reinit()
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"isakmpd: reinitializing daemon\00"
define void @reinit() {
%1 = tail call i32 @log_print(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @conf_reinit()
%3 = tail call i32 (...) @log_reinit()
%4 = tail call i32 (...) @policy_init()
%5 = tail call i32 (...) @cert_init()
%6 = tail call i32 (...) @crl_init()
%7 = tail call i32 (...) @connection_reinit()
%8 = tail call i32 (...) @transport_reinit()
%9 = tail call i32 (...) @sa_reinit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ err(int, char *);
char *strdup(char const *);
char *xstrdup(const char *str) {
  char *ptr;
  if ((ptr = strdup(str)) == NULL)
    err(128, "out of memory");
  return ptr;
}


x86 assembly (clang, -O0):
<xstrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1154 <xstrdup+0x34>
mov    $0x80,%edi
lea    0xeb1(%rip),%rsi
call   1030 <err@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup>:
push   %rbx
call   1040 <strdup@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113f <xstrdup+0x1f>
lea    0xecb(%rip),%rsi
mov    $0x80,%edi
call   1030 <err@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"out of memory\00"
define i8* @xstrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strdup(i8* %4)
store i8* %5, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @err(i32 128, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
@.str = [14 x i8] c"out of memory\00"
define noalias i8* @xstrdup(i8* nocapture %0) {
%2 = tail call i8* @strdup(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @err(i32 128, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XSetArcMode() {
  printf("XSetArcMode called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XSetArcMode>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSetArcMode>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"XSetArcMode called\0A\00"
define i32 @XSetArcMode() {
%1 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [19 x i8] c"XSetArcMode called\00"
define i32 @XSetArcMode() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void remove_booking() { printf("Usuwanie rezerwacji\n"); }


x86 assembly (clang, -O0):
<remove_booking>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_booking>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"Usuwanie rezerwacji\0A\00"
define void @remove_booking() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"Usuwanie rezerwacji\00"
define void @remove_booking() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ buflist_bar_item_update(int /*<<< orphan*/);
int buflist_config_signal_buffer_cb(const void *pointer, void *data,
                                    const char *signal, const char *type_data,
                                    void *signal_data) {
  (void)pointer;
  (void)data;
  (void)signal;
  (void)type_data;
  (void)signal_data;
  buflist_bar_item_update(0);
  return 0;
}


x86 assembly (clang, -O0):
<buflist_config_signal_buffer_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
xor    %edi,%edi
call   1030 <buflist_bar_item_update@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buflist_config_signal_buffer_cb>:
push   %rax
xor    %edi,%edi
call   1030 <buflist_bar_item_update@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @buflist_config_signal_buffer_cb(i8* %0, i8* %1, i8* %2, i8* %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i8* %4, i8** %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i8*, i8** %9
%15 = load i8*, i8** %10
%16 = call i32 @buflist_bar_item_update(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @buflist_config_signal_buffer_cb(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3, i8* nocapture readnone %4) {
%6 = tail call i32 @buflist_bar_item_update(i32 0)
ret i32 0
}
/* Variables and functions */
int isdigit(int);
int can_print_it(char ch) { return isdigit((int)ch); }


x86 assembly (clang, -O0):
<can_print_it>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isdigit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<can_print_it>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0xa,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @can_print_it(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = call i32 @isdigit(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @can_print_it(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -48
%4 = icmp ult i32 %3, 10
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int a_cas(int volatile *, int, int);
int a_swap(volatile int *x, int v) {
  int old;
  do
    old = *x;
  while (a_cas(x, old, v) != old);
  return old;
}


x86 assembly (clang, -O0):
<a_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <a_cas@plt>
cmp    -0x10(%rbp),%eax
jne    111f <a_swap+0xf>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_swap>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rbx
nopw   0x0(%rax,%rax,1)
mov    (%rbx),%ebp
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <a_cas@plt>
cmp    %ebp,%eax
jne    1120 <a_swap+0x10>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @a_swap(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
br label %6
6: ; preds = %9, %2
%7 = load i32*, i32** %3
%8 = load volatile i32, i32* %7
store i32 %8, i32* %5
br label %9
9: ; preds = %6
%10 = load i32*, i32** %3
%11 = load i32, i32* %5
%12 = load i32, i32* %4
%13 = call i32 @a_cas(i32* %10, i32 %11, i32 %12)
%14 = load i32, i32* %5
%15 = icmp ne i32 %13, %14
br i1 %15, label %6, label %16
16: ; preds = %9
%17 = load i32, i32* %5
ret i32 %17
}

LLVM IR (-O2):
define i32 @a_swap(i32* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = load volatile i32, i32* %0
%5 = tail call i32 @a_cas(i32* %0, i32 %4, i32 %1)
%6 = icmp eq i32 %5, %4
br i1 %6, label %7, label %3
7: ; preds = %3
ret i32 %4
}
void start_timer_1(void) {
  (*(volatile unsigned int *)(0x7F006008)) |= (1 << 8);
  (*(volatile unsigned int *)(0x7F006008)) &= ~(1 << 9);
  return;
}


x86 assembly (clang, -O0):
<start_timer_1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7f006008,%eax
mov    (%rax),%ecx
or     $0x100,%ecx
mov    $0x7f006008,%eax
mov    %ecx,(%rax)
mov    $0x7f006008,%eax
mov    (%rax),%ecx
and    $0xfffffdff,%ecx
mov    $0x7f006008,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_timer_1>:
orl    $0x100,0x7f006008
andl   $0xfffffdff,0x7f006008
ff fd ff ff
ret

LLVM IR (-O0):
define void @start_timer_1() {
%1 = load volatile i32, i32* inttoptr (i64 2130731016 to i32*)
%2 = or i32 %1, 256
store volatile i32 %2, i32* inttoptr (i64 2130731016 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 2130731016 to i32*)
%4 = and i32 %3, -513
store volatile i32 %4, i32* inttoptr (i64 2130731016 to i32*)
ret void
}

LLVM IR (-O2):
define void @start_timer_1() {
%1 = load volatile i32, i32* inttoptr (i64 2130731016 to i32*)
%2 = or i32 %1, 256
store volatile i32 %2, i32* inttoptr (i64 2130731016 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 2130731016 to i32*)
%4 = and i32 %3, -513
store volatile i32 %4, i32* inttoptr (i64 2130731016 to i32*)
ret void
}
int MIN(int x, int y) { return x < y ? x : y; }


x86 assembly (clang, -O0):
<MIN>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <MIN+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <MIN+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MIN>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @MIN(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @MIN(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _bytecode_write(int, int /*<<< orphan*/, int /*<<< orphan*/,
                                   int, int, int);
int /*<<< orphan*/ assert(int);
uint32_t bytecode_top(uint8_t r0, uint8_t r1, uint8_t r2) {
  assert(r1 > 0 && r1 <= 4);
  return _bytecode_write(3, 0, 0, r0, r1, r2);
}


x86 assembly (clang, -O0):
<bytecode_top>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jle    114a <bytecode_top+0x2a>
cmpl   $0x4,-0x8(%rbp)
setle  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x4(%rbp),%ecx
mov    -0x8(%rbp),%r8d
mov    -0xc(%rbp),%r9d
mov    $0x3,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <_bytecode_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bytecode_top>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebx
mov    %edi,%ebp
lea    -0x1(%rbx),%eax
xor    %edi,%edi
cmp    $0x4,%eax
setb   %dil
call   1040 <assert@plt>
mov    $0x3,%edi
xor    %esi,%esi
xor    %edx,%edx
mov    %ebp,%ecx
mov    %ebx,%r8d
mov    %r14d,%r9d
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <_bytecode_write@plt>

LLVM IR (-O0):
define i32 @bytecode_top(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %3
%10 = load i32, i32* %5
%11 = icmp sle i32 %10, 4
br label %12
12: ; preds = %9, %3
%13 = phi i1 [ false, %3 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
%15 = call i32 @assert(i32 %14)
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = load i32, i32* %6
%19 = call i32 @_bytecode_write(i32 3, i32 0, i32 0, i32 %16, i32 %17, i32 %18)
ret i32 %19
}

LLVM IR (-O2):
define i32 @bytecode_top(i32 %0, i32 %1, i32 %2) {
%4 = add i32 %1, -1
%5 = icmp ult i32 %4, 4
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = tail call i32 @_bytecode_write(i32 3, i32 0, i32 0, i32 %0, i32 %1, i32 %2)
ret i32 %8
}
int hex2CharToInt(unsigned char b0, unsigned char b1) { return (b0 << 4) + b1; }


x86 assembly (clang, -O0):
<hex2CharToInt>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x4,%eax
movzbl -0x2(%rbp),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex2CharToInt>:
shl    $0x4,%edi
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @hex2CharToInt(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 4
%8 = load i8, i8* %4
%9 = zext i8 %8 to i32
%10 = add nsw i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @hex2CharToInt(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 4
%5 = zext i8 %1 to i32
%6 = add nuw nsw i32 %4, %5
ret i32 %6
}
void gdk_input_mode_get_type() {}


x86 assembly (clang, -O0):
<gdk_input_mode_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_input_mode_get_type>:
ret

LLVM IR (-O0):
define void @gdk_input_mode_get_type() {
ret void
}

LLVM IR (-O2):
define void @gdk_input_mode_get_type() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_END;
int /*<<< orphan*/ ceil(long);
int /*<<< orphan*/ fseek(int /*<<< orphan*/ *, int /*<<< orphan*/,
                         int /*<<< orphan*/);
long ftell(int /*<<< orphan*/ *);
int /*<<< orphan*/ rewind(int /*<<< orphan*/ *);
unsigned getPageCount(FILE *pSrc) {
  long int fileSize;
  fseek(pSrc, 0, SEEK_END);
  fileSize = ftell(pSrc);
  rewind(pSrc);
  return (unsigned)ceil(fileSize / (double)(19 * 16));
}


x86 assembly (clang, -O0):
<getPageCount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e91(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1060 <fseek@plt>
mov    -0x8(%rbp),%rdi
call   1050 <ftell@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <rewind@plt>
cvtsi2sdq -0x10(%rbp),%xmm0
movsd  0xe7c(%rip),%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rdi
call   1030 <ceil@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getPageCount>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2e9a(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1060 <fseek@plt>
mov    %rbx,%rdi
call   1050 <ftell@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1040 <rewind@plt>
cvtsi2sd %r14,%xmm0
divsd  0xe89(%rip),%xmm0
cvttsd2si %xmm0,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <ceil@plt>

LLVM IR (-O0):
@SEEK_END = global i32 0
define i32 @getPageCount(i32* %0) {
%2 = alloca i32*
%3 = alloca i64
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* @SEEK_END
%6 = call i32 @fseek(i32* %4, i32 0, i32 %5)
%7 = load i32*, i32** %2
%8 = call i64 @ftell(i32* %7)
store i64 %8, i64* %3
%9 = load i32*, i32** %2
%10 = call i32 @rewind(i32* %9)
%11 = load i64, i64* %3
%12 = sitofp i64 %11 to double
%13 = fdiv double %12, 3.040000e+02
%14 = fptosi double %13 to i64
%15 = call i32 @ceil(i64 %14)
ret i32 %15
}

LLVM IR (-O2):
@SEEK_END = global i32 0
define i32 @getPageCount(i32* nocapture %0) {
%2 = load i32, i32* @SEEK_END
%3 = tail call i32 @fseek(i32* %0, i32 0, i32 %2)
%4 = tail call i64 @ftell(i32* %0)
%5 = tail call i32 @rewind(i32* %0)
%6 = sitofp i64 %4 to double
%7 = fdiv double %6, 3.040000e+02
%8 = fptosi double %7 to i64
%9 = tail call i32 @ceil(i64 %8)
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ disp_color_str(char *, int);
int /*<<< orphan*/ disp_int(int /*<<< orphan*/);
int /*<<< orphan*/ get_ticks();
int /*<<< orphan*/ milli_delay(int);
void TestC() {
  int i = 0x2000;
  while (1) {
    disp_color_str("C.", 0x08 | (0x0 | 0x4));
    disp_int(get_ticks());
    milli_delay(200);
  }
}


x86 assembly (clang, -O0):
<TestC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x2000,-0x4(%rbp)
lea    0xeaa(%rip),%rdi
mov    $0xc,%esi
call   1030 <disp_color_str@plt>
mov    $0x0,%al
call   1040 <get_ticks@plt>
mov    %eax,%edi
call   1060 <disp_int@plt>
mov    $0xc8,%edi
call   1050 <milli_delay@plt>
jmp    114f <TestC+0xf>

x86 assembly (clang, -O2):
<TestC>:
push   %rbx
lea    0xeb8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
mov    $0xc,%esi
call   1030 <disp_color_str@plt>
xor    %eax,%eax
call   1040 <get_ticks@plt>
mov    %eax,%edi
call   1060 <disp_int@plt>
mov    $0xc8,%edi
call   1050 <milli_delay@plt>
jmp    1150 <TestC+0x10>

LLVM IR (-O0):
@.str = [3 x i8] c"C.\00"
define void @TestC() {
%1 = alloca i32
store i32 8192, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 @disp_color_str(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 12)
%4 = call i32 (...) @get_ticks()
%5 = call i32 @disp_int(i32 %4)
%6 = call i32 @milli_delay(i32 200)
br label %2
}

LLVM IR (-O2):
@.str = [3 x i8] c"C.\00"
define void @TestC() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @disp_color_str(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 12)
%3 = tail call i32 (...) @get_ticks()
%4 = tail call i32 @disp_int(i32 %3)
%5 = tail call i32 @milli_delay(i32 200)
br label %1
}
void PKCS7_new(void) {}


x86 assembly (clang, -O0):
<PKCS7_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PKCS7_new>:
ret

LLVM IR (-O0):
define void @PKCS7_new() {
ret void
}

LLVM IR (-O2):
define void @PKCS7_new() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ check(char const *, int /*<<< orphan*/, char const *);
void check_mismatch(char const *re, char const *text) { check(re, 0, text); }


x86 assembly (clang, -O0):
<check_mismatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <check@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_mismatch>:
mov    %rsi,%rdx
xor    %esi,%esi
jmp    1030 <check@plt>

LLVM IR (-O0):
define void @check_mismatch(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @check(i8* %5, i32 0, i8* %6)
ret void
}

LLVM IR (-O2):
define void @check_mismatch(i8* %0, i8* %1) {
%3 = tail call i32 @check(i8* %0, i32 0, i8* %1)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t lv2_atom_pad_size(uint32_t size) { return (size + 7) & (~7); }


x86 assembly (clang, -O0):
<lv2_atom_pad_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x7,%eax
and    $0xfffffff8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lv2_atom_pad_size>:
lea    0x7(%rdi),%eax
and    $0xfffffff8,%eax
ret

LLVM IR (-O0):
define i32 @lv2_atom_pad_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 7
%5 = and i32 %4, -8
ret i32 %5
}

LLVM IR (-O2):
define i32 @lv2_atom_pad_size(i32 %0) {
%2 = add nsw i32 %0, 7
%3 = and i32 %2, -8
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ setenv(char *, char *);
int do_setenv(int argc, char **argv) {
  char *varname, *value;
  if (argc != 3) {
    puts("Usage: setenv varname value");
    return -1;
  }
  varname = argv[1];
  value = argv[2];
  setenv(varname, value);
  return 0;
}


x86 assembly (clang, -O0):
<do_setenv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x3,-0x8(%rbp)
je     1151 <do_setenv+0x31>
lea    0xec0(%rip),%rdi
call   1030 <puts@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    117d <do_setenv+0x5d>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1040 <setenv@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_setenv>:
push   %rax
cmp    $0x3,%edi
jne    1137 <do_setenv+0x17>
mov    0x8(%rsi),%rdi
mov    0x10(%rsi),%rsi
call   1040 <setenv@plt>
xor    %eax,%eax
pop    %rcx
ret
lea    0xec2(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"Usage: setenv varname value\00"
define i32 @do_setenv(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i8*
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 3
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 @puts(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %3
br label %22
12: ; preds = %2
%13 = load i8**, i8*** %5
%14 = getelementptr inbounds i8*, i8** %13, i64 1
%15 = load i8*, i8** %14
store i8* %15, i8** %6
%16 = load i8**, i8*** %5
%17 = getelementptr inbounds i8*, i8** %16, i64 2
%18 = load i8*, i8** %17
store i8* %18, i8** %7
%19 = load i8*, i8** %6
%20 = load i8*, i8** %7
%21 = call i32 @setenv(i8* %19, i8* %20)
store i32 0, i32* %3
br label %22
22: ; preds = %12, %10
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
@.str = [28 x i8] c"Usage: setenv varname value\00"
define i32 @do_setenv(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 3
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
br label %12
6: ; preds = %2
%7 = getelementptr inbounds i8*, i8** %1, i64 1
%8 = load i8*, i8** %7
%9 = getelementptr inbounds i8*, i8** %1, i64 2
%10 = load i8*, i8** %9
%11 = tail call i32 @setenv(i8* %8, i8* %10)
br label %12
12: ; preds = %6, %4
%13 = phi i32 [ -1, %4 ], [ 0, %6 ]
ret i32 %13
}