#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void I2SRxConfigSet(unsigned long ulBase, unsigned long ulConfig) {
  DEBUG_ASSERT(ulBase == 0x40054000);
  DEBUG_ASSERT((ulConfig & (0x3C000000 | 0x03000000 | 0x00400000 | 0x0000FC00 |
                            0x000003F0)) == ulConfig);
  (*((volatile unsigned long *)(ulBase + 0x00000804))) = 0;
  if ((ulConfig & 0x03000000) == 0x02000000) {
    (*((volatile unsigned long *)(ulBase + 0x00000804))) |= 0x00000004;
  } else if ((ulConfig & 0x03000000) == 0x03000000) {
    (*((volatile unsigned long *)(ulBase + 0x00000804))) |= 0x00000002;
  }
  ulConfig &= ~0x02000000;
  (*((volatile unsigned long *)(ulBase + 0x00000808))) = ulConfig;
}


x86 assembly (clang, -O0):
<I2SRxConfigSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x40054000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rax
and    $0x3f40fff0,%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,0x804(%rax)
mov    -0x10(%rbp),%rax
and    $0x3000000,%rax
cmp    $0x2000000,%rax
jne    1190 <I2SRxConfigSet+0x80>
mov    -0x8(%rbp),%rax
mov    0x804(%rax),%rcx
or     $0x4,%rcx
mov    %rcx,0x804(%rax)
jmp    11c1 <I2SRxConfigSet+0xb1>
mov    -0x10(%rbp),%rax
and    $0x3000000,%rax
cmp    $0x3000000,%rax
jne    11bc <I2SRxConfigSet+0xac>
mov    -0x8(%rbp),%rax
mov    0x804(%rax),%rcx
or     $0x2,%rcx
mov    %rcx,0x804(%rax)
jmp    11c1 <I2SRxConfigSet+0xb1>
mov    -0x10(%rbp),%rax
and    $0xfffffffffdffffff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x808(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2SRxConfigSet>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %edi,%edi
cmp    $0x40054000,%r14
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
xor    %edi,%edi
test   $0xffffffffc0bf000f,%rbx
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
movq   $0x0,0x804(%r14)
mov    %ebx,%eax
and    $0x3000000,%eax
cmp    $0x2000000,%rax
je     1166 <I2SRxConfigSet+0x56>
cmp    $0x3000000,%eax
jne    1172 <I2SRxConfigSet+0x62>
mov    $0x2,%eax
jmp    116b <I2SRxConfigSet+0x5b>
mov    $0x4,%eax
or     %rax,0x804(%r14)
and    $0xfffffffffdffffff,%rbx
mov    %rbx,0x808(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @I2SRxConfigSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 1074085888
%7 = zext i1 %6 to i32
%8 = call i32 @DEBUG_ASSERT(i32 %7)
%9 = load i64, i64* %4
%10 = and i64 %9, 1061224432
%11 = load i64, i64* %4
%12 = icmp eq i64 %10, %11
%13 = zext i1 %12 to i32
%14 = call i32 @DEBUG_ASSERT(i32 %13)
%15 = load i64, i64* %3
%16 = add i64 %15, 2052
%17 = inttoptr i64 %16 to i64*
store volatile i64 0, i64* %17
%18 = load i64, i64* %4
%19 = and i64 %18, 50331648
%20 = icmp eq i64 %19, 33554432
br i1 %20, label %21, label %27
21: ; preds = %2
%22 = load i64, i64* %3
%23 = add i64 %22, 2052
%24 = inttoptr i64 %23 to i64*
%25 = load volatile i64, i64* %24
%26 = or i64 %25, 4
store volatile i64 %26, i64* %24
br label %38
27: ; preds = %2
%28 = load i64, i64* %4
%29 = and i64 %28, 50331648
%30 = icmp eq i64 %29, 50331648
br i1 %30, label %31, label %37
31: ; preds = %27
%32 = load i64, i64* %3
%33 = add i64 %32, 2052
%34 = inttoptr i64 %33 to i64*
%35 = load volatile i64, i64* %34
%36 = or i64 %35, 2
store volatile i64 %36, i64* %34
br label %37
37: ; preds = %31, %27
br label %38
38: ; preds = %37, %21
%39 = load i64, i64* %4
%40 = and i64 %39, -33554433
store i64 %40, i64* %4
%41 = load i64, i64* %4
%42 = load i64, i64* %3
%43 = add i64 %42, 2056
%44 = inttoptr i64 %43 to i64*
store volatile i64 %41, i64* %44
ret void
}

LLVM IR (-O2):
define void @I2SRxConfigSet(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 1074085888
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = and i64 %1, 1061224432
%7 = icmp eq i64 %6, %1
%8 = zext i1 %7 to i32
%9 = tail call i32 @DEBUG_ASSERT(i32 %8)
%10 = add i64 %0, 2052
%11 = inttoptr i64 %10 to i64*
store volatile i64 0, i64* %11
%12 = and i64 %1, 50331648
switch i64 %12, label %18 [
i64 33554432, label %14
i64 50331648, label %13
]
13: ; preds = %2
br label %14
14: ; preds = %2, %13
%15 = phi i64 [ 2, %13 ], [ 4, %2 ]
%16 = load volatile i64, i64* %11
%17 = or i64 %16, %15
store volatile i64 %17, i64* %11
br label %18
18: ; preds = %14, %2
%19 = and i64 %1, -33554433
%20 = add i64 %0, 2056
%21 = inttoptr i64 %20 to i64*
store volatile i64 %19, i64* %21
ret void
}