xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned int TwMasterTransact(int, unsigned char *, int, void *, unsigned int,
                              int /*<<< orphan*/);
int NvMemRead(unsigned int addr, void *buff, unsigned int len) {
  int rc = -1;
  unsigned char param[2];
  param[0] = (unsigned char)(addr >> 8);
  param[1] = (unsigned char)addr;
  if (TwMasterTransact(0x57, param, 2, buff, len, 0) == len) {
    rc = 0;
  }
  return rc;
}


x86 assembly (clang, -O0):
<NvMemRead>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0xffffffff,-0x18(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x8,%eax
mov    %al,-0x1a(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,-0x19(%rbp)
lea    -0x1a(%rbp),%rsi
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
mov    $0x57,%edi
mov    $0x2,%edx
xor    %r9d,%r9d
call   1030 <TwMasterTransact@plt>
cmp    -0x14(%rbp),%eax
jne    1166 <NvMemRead+0x56>
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NvMemRead>:
push   %rbx
sub    $0x10,%rsp
mov    %edx,%ebx
mov    %rsi,%rcx
rol    $0x8,%di
mov    %di,0xe(%rsp)
lea    0xe(%rsp),%rsi
mov    $0x57,%edi
mov    $0x2,%edx
mov    %ebx,%r8d
xor    %r9d,%r9d
call   1030 <TwMasterTransact@plt>
xor    %ecx,%ecx
cmp    %ebx,%eax
setne  %cl
neg    %ecx
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @NvMemRead(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca [2 x i8]
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 -1, i32* %7
%9 = load i32, i32* %4
%10 = lshr i32 %9, 8
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds [2 x i8], [2 x i8]* %8, i64 0, i64 0
store i8 %11, i8* %12
%13 = load i32, i32* %4
%14 = trunc i32 %13 to i8
%15 = getelementptr inbounds [2 x i8], [2 x i8]* %8, i64 0, i64 1
store i8 %14, i8* %15
%16 = getelementptr inbounds [2 x i8], [2 x i8]* %8, i64 0, i64 0
%17 = load i8*, i8** %5
%18 = load i32, i32* %6
%19 = call i32 @TwMasterTransact(i32 87, i8* %16, i32 2, i8* %17, i32 %18, i32 0)
%20 = load i32, i32* %6
%21 = icmp eq i32 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %3
store i32 0, i32* %7
br label %23
23: ; preds = %22, %3
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @NvMemRead(i32 %0, i8* %1, i32 %2) {
%4 = alloca [2 x i8]
%5 = getelementptr inbounds [2 x i8], [2 x i8]* %4, i64 0, i64 0
%6 = lshr i32 %0, 8
%7 = trunc i32 %6 to i8
store i8 %7, i8* %5
%8 = trunc i32 %0 to i8
%9 = getelementptr inbounds [2 x i8], [2 x i8]* %4, i64 0, i64 1
store i8 %8, i8* %9
%10 = call i32 @TwMasterTransact(i32 87, i8* %5, i32 2, i8* %1, i32 %2, i32 0)
%11 = icmp ne i32 %10, %2
%12 = sext i1 %11 to i32
ret i32 %12
}
void glTranslatex(void) { return; }


x86 assembly (clang, -O0):
<glTranslatex>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glTranslatex>:
ret

LLVM IR (-O0):
define void @glTranslatex() {
ret void
}

LLVM IR (-O2):
define void @glTranslatex() {
ret void
}
/* Type definitions */
struct gf_tw_timer_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __gf_tw_detach_timer(struct gf_tw_timer_list *);
int /*<<< orphan*/ timer_pending(struct gf_tw_timer_list *);
int __detach_if_pending(struct gf_tw_timer_list *timer) {
  if (!timer_pending(timer))
    return 0;
  __gf_tw_detach_timer(timer);
  return 1;
}


x86 assembly (clang, -O0):
<__detach_if_pending>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <timer_pending@plt>
cmp    $0x0,%eax
jne    114a <__detach_if_pending+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    115a <__detach_if_pending+0x3a>
mov    -0x10(%rbp),%rdi
call   1040 <__gf_tw_detach_timer@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__detach_if_pending>:
push   %rbx
mov    %rdi,%rbx
call   1030 <timer_pending@plt>
test   %eax,%eax
je     113c <__detach_if_pending+0x1c>
mov    %rbx,%rdi
call   1040 <__gf_tw_detach_timer@plt>
mov    $0x1,%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.gf_tw_timer_list = type { i32 }
define i32 @__detach_if_pending(%struct.gf_tw_timer_list* %0) {
%2 = alloca i32
%3 = alloca %struct.gf_tw_timer_list*
store %struct.gf_tw_timer_list* %0, %struct.gf_tw_timer_list** %3
%4 = load %struct.gf_tw_timer_list*, %struct.gf_tw_timer_list** %3
%5 = call i32 @timer_pending(%struct.gf_tw_timer_list* %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %11
8: ; preds = %1
%9 = load %struct.gf_tw_timer_list*, %struct.gf_tw_timer_list** %3
%10 = call i32 @__gf_tw_detach_timer(%struct.gf_tw_timer_list* %9)
store i32 1, i32* %2
br label %11
11: ; preds = %8, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
%struct.gf_tw_timer_list = type { i32 }
define i32 @__detach_if_pending(%struct.gf_tw_timer_list* %0) {
%2 = tail call i32 @timer_pending(%struct.gf_tw_timer_list* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @__gf_tw_detach_timer(%struct.gf_tw_timer_list* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
void Wiznet_ISR_Interrupt(void) {}


x86 assembly (clang, -O0):
<Wiznet_ISR_Interrupt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Wiznet_ISR_Interrupt>:
ret

LLVM IR (-O0):
define void @Wiznet_ISR_Interrupt() {
ret void
}

LLVM IR (-O2):
define void @Wiznet_ISR_Interrupt() {
ret void
}
/* Type definitions */
struct lemon {
  int dummy;
};
struct generator_code {
  int dummy;
};

/* Variables and functions */
struct generator_code *generator_emit_code(struct lemon *,
                                           struct generator_code *);
struct generator_code *
generator_make_code(struct lemon *, int, int /*<<< orphan*/ *,
                    int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                    int /*<<< orphan*/ *, int /*<<< orphan*/ *);
struct generator_code *generator_emit_opcode(struct lemon *lemon, int opcode) {
  struct generator_code *code;
  code = generator_make_code(lemon, opcode, NULL, NULL, NULL, NULL, NULL);
  return generator_emit_code(lemon, code);
}


x86 assembly (clang, -O0):
<generator_emit_opcode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %eax,%eax
mov    %eax,%r9d
mov    %r9,%rdx
mov    %r9,%rcx
mov    %r9,%r8
movq   $0x0,(%rsp)
call   1030 <generator_make_code@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <generator_emit_code@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generator_emit_opcode>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movq   $0x0,(%rsp)
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <generator_make_code@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
add    $0x10,%rsp
pop    %rbx
jmp    1040 <generator_emit_code@plt>

LLVM IR (-O0):
%struct.generator_code = type { i32 }
%struct.lemon = type { i32 }
define %struct.generator_code* @generator_emit_opcode(%struct.lemon* %0, i32 %1) {
%3 = alloca %struct.lemon*
%4 = alloca i32
%5 = alloca %struct.generator_code*
store %struct.lemon* %0, %struct.lemon** %3
store i32 %1, i32* %4
%6 = load %struct.lemon*, %struct.lemon** %3
%7 = load i32, i32* %4
%8 = call %struct.generator_code* @generator_make_code(%struct.lemon* %6, i32 %7, i32* null, i32* null, i32* null, i32* null, i32* null)
store %struct.generator_code* %8, %struct.generator_code** %5
%9 = load %struct.lemon*, %struct.lemon** %3
%10 = load %struct.generator_code*, %struct.generator_code** %5
%11 = call %struct.generator_code* @generator_emit_code(%struct.lemon* %9, %struct.generator_code* %10)
ret %struct.generator_code* %11
}

LLVM IR (-O2):
%struct.generator_code = type { i32 }
%struct.lemon = type { i32 }
define %struct.generator_code* @generator_emit_opcode(%struct.lemon* %0, i32 %1) {
%3 = tail call %struct.generator_code* @generator_make_code(%struct.lemon* %0, i32 %1, i32* null, i32* null, i32* null, i32* null, i32* null)
%4 = tail call %struct.generator_code* @generator_emit_code(%struct.lemon* %0, %struct.generator_code* %3)
ret %struct.generator_code* %4
}
/* Variables and functions */
int /*<<< orphan*/ bar();
int /*<<< orphan*/ plop();
int main() {
  bar();
label:
  plop();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <bar@plt>
mov    $0x0,%al
call   1040 <plop@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <bar@plt>
xor    %eax,%eax
call   1040 <plop@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @bar()
br label %2
2: ; preds = %0
%3 = call i32 (...) @plop()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @bar()
%2 = tail call i32 (...) @plop()
ret i32 0
}
void __attribute__((always_, format(printf, 2, 3)))
udev_log_null(struct udev *udev, const char *format, ...) {}


x86 assembly (clang, -O0):
<udev_log_null>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<udev_log_null>:
ret

LLVM IR (-O0):
%struct.udev = type opaque
define void @udev_log_null(%struct.udev* %0, i8* %1, ...) {
%3 = alloca %struct.udev*
%4 = alloca i8*
store %struct.udev* %0, %struct.udev** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.udev = type opaque
define void @udev_log_null(%struct.udev* nocapture %0, i8* nocapture %1, ...) {
ret void
}
int is_base64_char(char c) {
  return (('A' <= c && c <= 'Z') || ('a' <= c && c <= 'z') ||
          ('0' <= c && c <= '9') || (c == '+' || c == '/'));
}


x86 assembly (clang, -O0):
<is_base64_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x41,%eax
cmp    %ecx,%eax
jg     112d <is_base64_char+0x2d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5a,%ecx
mov    %al,-0x2(%rbp)
jle    1198 <is_base64_char+0x98>
movsbl -0x1(%rbp),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     1150 <is_base64_char+0x50>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7a,%ecx
mov    %al,-0x2(%rbp)
jle    1198 <is_base64_char+0x98>
movsbl -0x1(%rbp),%ecx
mov    $0x30,%eax
cmp    %ecx,%eax
jg     1173 <is_base64_char+0x73>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x39,%ecx
mov    %al,-0x2(%rbp)
jle    1198 <is_base64_char+0x98>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2b,%ecx
mov    %al,-0x3(%rbp)
je     1192 <is_base64_char+0x92>
movsbl -0x1(%rbp),%eax
cmp    $0x2f,%eax
sete   %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_base64_char>:
mov    %edi,%eax
and    $0xdf,%al
add    $0xbf,%al
cmp    $0x1a,%al
setb   %al
lea    -0x30(%rdi),%ecx
cmp    $0xa,%cl
setb   %cl
and    $0xfb,%dil
cmp    $0x2b,%dil
sete   %dl
or     %cl,%dl
or     %al,%dl
movzbl %dl,%eax
ret

LLVM IR (-O0):
define i32 @is_base64_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sle i32 65, %4
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 90
br i1 %9, label %36, label %10
10: ; preds = %6, %1
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sle i32 97, %12
br i1 %13, label %14, label %18
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 %16, 122
br i1 %17, label %36, label %18
18: ; preds = %14, %10
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp sle i32 48, %20
br i1 %21, label %22, label %26
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp sle i32 %24, 57
br i1 %25, label %36, label %26
26: ; preds = %22, %18
%27 = load i8, i8* %2
%28 = sext i8 %27 to i32
%29 = icmp eq i32 %28, 43
br i1 %29, label %34, label %30
30: ; preds = %26
%31 = load i8, i8* %2
%32 = sext i8 %31 to i32
%33 = icmp eq i32 %32, 47
br label %34
34: ; preds = %30, %26
%35 = phi i1 [ true, %26 ], [ %33, %30 ]
br label %36
36: ; preds = %34, %22, %14, %6
%37 = phi i1 [ true, %22 ], [ true, %14 ], [ true, %6 ], [ %35, %34 ]
%38 = zext i1 %37 to i32
ret i32 %38
}

LLVM IR (-O2):
define i32 @is_base64_char(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = add i8 %0, -48
%6 = icmp ult i8 %5, 10
%7 = or i1 %6, %4
%8 = and i8 %0, -5
%9 = icmp eq i8 %8, 43
%10 = or i1 %9, %7
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ i2c_poll();
void polln(int n) {
  int i;
  for (i = 0; i != n; i++)
    i2c_poll();
}


x86 assembly (clang, -O0):
<polln>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
je     1143 <polln+0x33>
mov    $0x0,%al
call   1030 <i2c_poll@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <polln+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<polln>:
push   %rbx
test   %edi,%edi
je     112c <polln+0x1c>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <i2c_poll@plt>
add    $0xffffffff,%ebx
jne    1120 <polln+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @polln(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp ne i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 (...) @i2c_poll()
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @polln(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = tail call i32 (...) @i2c_poll()
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ rpc_prog_1(char *);
int main(int argc, char *argv[]) {
  char *host;
  if (argc < 2) {
    printf("usage: %s server_host\n", argv[0]);
    exit(1);
  }
  host = argv[1];
  rpc_prog_1(host);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    116d <main+0x3d>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <rpc_prog_1@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
jg     114f <main+0x1f>
mov    (%rsi),%rsi
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    0x8(%rsi),%rdi
call   1040 <rpc_prog_1@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"usage: %s server_host\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %4
%8 = icmp slt i32 %7, 2
br i1 %8, label %9, label %15
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 0
%12 = load i8*, i8** %11
%13 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %12)
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %2
%16 = load i8**, i8*** %5
%17 = getelementptr inbounds i8*, i8** %16, i64 1
%18 = load i8*, i8** %17
store i8* %18, i8** %6
%19 = load i8*, i8** %6
%20 = call i32 @rpc_prog_1(i8* %19)
%21 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [23 x i8] c"usage: %s server_host\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %2
%9 = getelementptr inbounds i8*, i8** %1, i64 1
%10 = load i8*, i8** %9
%11 = tail call i32 @rpc_prog_1(i8* %10)
%12 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
size_t strlen(char const *);
bool is_specifier(char c) {
  static const char *specifiers = "dxcs%";
  size_t spec_len = strlen(specifiers);
  for (size_t i = 0; i < spec_len; ++i)
    if (c == specifiers[i])
      return true;
  return false;
}


x86 assembly (clang, -O0):
<is_specifier>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    0x2f03(%rip),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1181 <is_specifier+0x71>
movsbl -0x5(%rbp),%eax
mov    0x2ed9(%rip),%rcx
mov    -0x18(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jne    116b <is_specifier+0x5b>
movl   $0x1,-0x4(%rbp)
jmp    1188 <is_specifier+0x78>
jmp    1170 <is_specifier+0x60>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1136 <is_specifier+0x26>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_specifier>:
mov    $0x1,%eax
lea    -0x63(%rdi),%ecx
cmp    $0x15,%cl
ja     111b <is_specifier+0x1b>
movzbl %cl,%ecx
mov    $0x210003,%edx
bt     %rcx,%rdx
jb     1121 <is_specifier+0x21>
cmp    $0x25,%dil
jne    1122 <is_specifier+0x22>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
@is_specifier.specifiers = internal global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0)
@.str = [6 x i8] c"dxcs%\00"
define i32 @is_specifier(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i64
%5 = alloca i64
store i8 %0, i8* %3
%6 = load i8*, i8** @is_specifier.specifiers
%7 = call i64 @strlen(i8* %6)
store i64 %7, i64* %4
store i64 0, i64* %5
br label %8
8: ; preds = %23, %1
%9 = load i64, i64* %5
%10 = load i64, i64* %4
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %26
12: ; preds = %8
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = load i8*, i8** @is_specifier.specifiers
%16 = load i64, i64* %5
%17 = getelementptr inbounds i8, i8* %15, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %14, %19
br i1 %20, label %21, label %22
21: ; preds = %12
store i32 1, i32* %2
br label %27
22: ; preds = %12
br label %23
23: ; preds = %22
%24 = load i64, i64* %5
%25 = add i64 %24, 1
store i64 %25, i64* %5
br label %8
26: ; preds = %8
store i32 0, i32* %2
br label %27
27: ; preds = %26, %21
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @is_specifier(i8 signext %0) {
switch i8 %0, label %2 [
i8 100, label %3
i8 120, label %3
i8 99, label %3
i8 115, label %3
i8 37, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 1, %1 ], [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void m3_Abort(const char *message) { abort(); }


x86 assembly (clang, -O0):
<m3_Abort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<m3_Abort>:
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @m3_Abort(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
define void @m3_Abort(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @abort()
unreachable
}
int test_imm_F0uint32_mem(unsigned int *val) {
  return ((*val) & (0xF0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F0uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xf0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F0uint32_mem>:
testb  $0xf0,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F0uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 240
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F0uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 240
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void glutDialsFunc(void (*func)(int dial, int value)) {}


x86 assembly (clang, -O0):
<glutDialsFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutDialsFunc>:
ret

LLVM IR (-O0):
define void @glutDialsFunc(void (i32, i32)* %0) {
%2 = alloca void (i32, i32)*
store void (i32, i32)* %0, void (i32, i32)** %2
ret void
}

LLVM IR (-O2):
define void @glutDialsFunc(void (i32, i32)* nocapture %0) {
ret void
}
/* Type definitions */
struct modify_args_info {
  int dummy;
};

/* Variables and functions */
int modify_cmdline_parser2(int, char **, struct modify_args_info *,
                           int /*<<< orphan*/, int, int);
int modify_cmdline_parser(int argc, char **argv,
                          struct modify_args_info *args_info) {
  return modify_cmdline_parser2(argc, argv, args_info, 0, 1, 1);
}


x86 assembly (clang, -O0):
<modify_cmdline_parser>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r9d
mov    %r9d,%r8d
call   1030 <modify_cmdline_parser2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<modify_cmdline_parser>:
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    $0x1,%r9d
jmp    1030 <modify_cmdline_parser2@plt>

LLVM IR (-O0):
%struct.modify_args_info = type { i32 }
define i32 @modify_cmdline_parser(i32 %0, i8** %1, %struct.modify_args_info* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.modify_args_info*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store %struct.modify_args_info* %2, %struct.modify_args_info** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load %struct.modify_args_info*, %struct.modify_args_info** %6
%10 = call i32 @modify_cmdline_parser2(i32 %7, i8** %8, %struct.modify_args_info* %9, i32 0, i32 1, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.modify_args_info = type { i32 }
define i32 @modify_cmdline_parser(i32 %0, i8** %1, %struct.modify_args_info* %2) {
%4 = tail call i32 @modify_cmdline_parser2(i32 %0, i8** %1, %struct.modify_args_info* %2, i32 0, i32 1, i32 1)
ret i32 %4
}
void wbinvd(void) { __asm__("wbinvd"); }


x86 assembly (clang, -O0):
<wbinvd>:
push   %rbp
mov    %rsp,%rbp
wbinvd
pop    %rbp
ret

x86 assembly (clang, -O2):
<wbinvd>:
wbinvd
ret

LLVM IR (-O0):
define void @wbinvd() {
ret void
}

LLVM IR (-O2):
define void @wbinvd() {
tail call void asm sideeffect "wbinvd", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int pthread_mutex_lock(int /*<<< orphan*/ *);
int __attribute__((unused))
___pthread_mutex_lock(pthread_mutex_t *mutex, char *lname, char *fn, int ln) {
  return pthread_mutex_lock(mutex);
}


x86 assembly (clang, -O0):
<___pthread_mutex_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pthread_mutex_lock@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<___pthread_mutex_lock>:
jmp    1030 <pthread_mutex_lock@plt>

LLVM IR (-O0):
define i32 @___pthread_mutex_lock(i32* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i32* %0, i32** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = call i32 @pthread_mutex_lock(i32* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @___pthread_mutex_lock(i32* %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i32 %3) {
%5 = tail call i32 @pthread_mutex_lock(i32* %0)
ret i32 %5
}
void Python_Lock_Vim(void) {}


x86 assembly (clang, -O0):
<Python_Lock_Vim>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Python_Lock_Vim>:
ret

LLVM IR (-O0):
define void @Python_Lock_Vim() {
ret void
}

LLVM IR (-O2):
define void @Python_Lock_Vim() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main(int argc, char const *argv[]) {
  int a, b;
  scanf("%d %d", &a, &b);
  printf("%d\n", a + b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
lea    -0x14(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x14(%rbp),%esi
add    -0x18(%rbp),%esi
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    (%rsp),%esi
add    0x4(%rsp),%esi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %6, i32* %7)
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = add nsw i32 %9, %10
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %3 to i8*
%6 = bitcast i32* %4 to i8*
%7 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %3, i32* %4)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = add nsw i32 %9, %8
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %10)
ret i32 0
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int uart_getc() {
  while (!(((volatile uint16_t *)0x80030000)[1] & (1 << 0x04)))
    ;
  return ((volatile uint16_t *)0x80030000)[3];
}


x86 assembly (clang, -O0):
<uart_getc>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <uart_getc+0x9>
mov    $0x80030000,%eax
mov    0x4(%rax),%eax
and    $0x10,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1129 <uart_getc+0x29>
jmp    112e <uart_getc+0x2e>
jmp    1109 <uart_getc+0x9>
mov    $0x80030000,%eax
mov    0xc(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_getc>:
mov    $0x80030004,%eax
cs nopw 0x0(%rax,%rax,1)
nop
testl  $0x10,(%rax)
je     1110 <uart_getc+0x10>
mov    0x8(%rax),%eax
ret

LLVM IR (-O0):
define i32 @uart_getc() {
br label %1
1: ; preds = %6, %0
%2 = load volatile i32, i32* getelementptr inbounds (i32, i32* inttoptr (i64 2147680256 to i32*), i64 1)
%3 = and i32 %2, 16
%4 = icmp ne i32 %3, 0
%5 = xor i1 %4, true
br i1 %5, label %6, label %7
6: ; preds = %1
br label %1
7: ; preds = %1
%8 = load volatile i32, i32* getelementptr inbounds (i32, i32* inttoptr (i64 2147680256 to i32*), i64 3)
ret i32 %8
}

LLVM IR (-O2):
define i32 @uart_getc() {
br label %1
1: ; preds = %1, %0
%2 = load volatile i32, i32* inttoptr (i64 2147680260 to i32*)
%3 = and i32 %2, 16
%4 = icmp eq i32 %3, 0
br i1 %4, label %1, label %5
5: ; preds = %1
%6 = load volatile i32, i32* inttoptr (i64 2147680268 to i32*)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ errx(int, char *, char *);
int getcns(int);
int cmd_gps(int argc, char **argv) {
  if (argc)
    errx(5, "unknown subcommad %s", *argv);
  return getcns(0x0F0A);
}


x86 assembly (clang, -O0):
<cmd_gps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1151 <cmd_gps+0x31>
mov    -0x10(%rbp),%rax
mov    (%rax),%rdx
mov    $0x5,%edi
lea    0xeb4(%rip),%rsi
call   1040 <errx@plt>
mov    $0xf0a,%edi
call   1030 <getcns@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_gps>:
test   %edi,%edi
je     113d <cmd_gps+0x1d>
push   %rax
mov    (%rsi),%rdx
lea    0xed1(%rip),%rsi
mov    $0x5,%edi
call   1040 <errx@plt>
add    $0x8,%rsp
mov    $0xf0a,%edi
jmp    1030 <getcns@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"unknown subcommad %s\00"
define i32 @cmd_gps(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i8**, i8*** %4
%9 = load i8*, i8** %8
%10 = call i32 @errx(i32 5, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %9)
br label %11
11: ; preds = %7, %2
%12 = call i32 @getcns(i32 3850)
ret i32 %12
}

LLVM IR (-O2):
@.str = [21 x i8] c"unknown subcommad %s\00"
define i32 @cmd_gps(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 @errx(i32 5, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %5)
br label %7
7: ; preds = %4, %2
%8 = tail call i32 @getcns(i32 3850)
ret i32 %8
}
void Set_Weight_Value(int pattern[][100], int w[][100]) {}


x86 assembly (clang, -O0):
<Set_Weight_Value>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Set_Weight_Value>:
ret

LLVM IR (-O0):
define void @Set_Weight_Value([100 x i32]* %0, [100 x i32]* %1) {
%3 = alloca [100 x i32]*
%4 = alloca [100 x i32]*
store [100 x i32]* %0, [100 x i32]** %3
store [100 x i32]* %1, [100 x i32]** %4
ret void
}

LLVM IR (-O2):
define void @Set_Weight_Value([100 x i32]* nocapture %0, [100 x i32]* nocapture %1) {
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int solcon_length_solution_vector(int k, int *n) {
  int fail;
  double *c;
  fail = _ada_use_c2phc4c(204, &k, n, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_length_solution_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0xcc,%edi
lea    -0x4(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_length_solution_vector>:
push   %rax
mov    %rsi,%rdx
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0xcc,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @solcon_length_solution_vector(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca double*
store i32 %0, i32* %3
store i32* %1, i32** %4
%7 = load i32*, i32** %4
%8 = load double*, double** %6
%9 = call i32 @_ada_use_c2phc4c(i32 204, i32* %3, i32* %7, double* %8, i32 0)
store i32 %9, i32* %5
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
define i32 @solcon_length_solution_vector(i32 %0, i32* %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @_ada_use_c2phc4c(i32 204, i32* %3, i32* %1, double* undef, i32 0)
ret i32 %4
}
/* Type definitions */
struct b_tonegen {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ setMIDIDrawBar(struct b_tonegen *, int, unsigned char);
void setDrawbar22(void *d, unsigned char v) {
  setMIDIDrawBar((struct b_tonegen *)d, 22, v);
}


x86 assembly (clang, -O0):
<setDrawbar22>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x16,%esi
movzbl -0x9(%rbp),%edx
call   1030 <setMIDIDrawBar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setDrawbar22>:
mov    %esi,%edx
mov    $0x16,%esi
jmp    1030 <setMIDIDrawBar@plt>

LLVM IR (-O0):
%struct.b_tonegen = type { i32 }
define void @setDrawbar22(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to %struct.b_tonegen*
%7 = load i8, i8* %4
%8 = call i32 @setMIDIDrawBar(%struct.b_tonegen* %6, i32 22, i8 zeroext %7)
ret void
}

LLVM IR (-O2):
%struct.b_tonegen = type { i32 }
define void @setDrawbar22(i8* %0, i8 zeroext %1) {
%3 = bitcast i8* %0 to %struct.b_tonegen*
%4 = tail call i32 @setMIDIDrawBar(%struct.b_tonegen* %3, i32 22, i8 zeroext %1)
ret void
}
/* Variables and functions */
void *init_filter(const char *const parameter) { return NULL; }


x86 assembly (clang, -O0):
<init_filter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_filter>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @init_filter(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @init_filter(i8* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ scanf(char *, double *, double *);
int main(void) {
  double height, BMI;
  scanf("%lf %lf", &height, &BMI);
  printf("%.3lf\n", BMI * height * height / 10000.0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xed2(%rip),%rdi
lea    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1040 <scanf@plt>
movsd  -0x18(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  0xea6(%rip),%xmm1
divsd  %xmm1,%xmm0
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xedd(%rip),%rdi
lea    0x10(%rsp),%rsi
lea    0x8(%rsp),%rdx
call   1040 <scanf@plt>
movsd  0x10(%rsp),%xmm1
movsd  0x8(%rsp),%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
divsd  0xeaa(%rip),%xmm0
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [8 x i8] c"%lf %lf\00"
@.str.1 = [7 x i8] c"%.3lf\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double* %2, double* %3)
%5 = load double, double* %3
%6 = load double, double* %2
%7 = fmul double %5, %6
%8 = load double, double* %2
%9 = fmul double %7, %8
%10 = fdiv double %9, 1.000000e+04
%11 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), double %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"%lf %lf\00"
@.str.1 = [7 x i8] c"%.3lf\0A\00"
define i32 @main() {
%1 = alloca double
%2 = alloca double
%3 = bitcast double* %1 to i8*
%4 = bitcast double* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), double* %1, double* %2)
%6 = load double, double* %2
%7 = load double, double* %1
%8 = fmul double %6, %7
%9 = fmul double %7, %8
%10 = fdiv double %9, 1.000000e+04
%11 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), double %10)
ret i32 0
}
double BoundDouble(double low, double value, double high) {
  if (value < low)
    return low;
  if (value > high)
    return high;
  return value;
}


x86 assembly (clang, -O0):
<BoundDouble>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1136 <BoundDouble+0x36>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    115f <BoundDouble+0x5f>
movsd  -0x18(%rbp),%xmm0
ucomisd -0x20(%rbp),%xmm0
jbe    1155 <BoundDouble+0x55>
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    115f <BoundDouble+0x5f>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<BoundDouble>:
minsd  %xmm1,%xmm2
cmpltsd %xmm0,%xmm1
andpd  %xmm1,%xmm0
andnpd %xmm2,%xmm1
orpd   %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @BoundDouble(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
%8 = load double, double* %6
%9 = load double, double* %5
%10 = fcmp olt double %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load double, double* %5
store double %12, double* %4
br label %21
13: ; preds = %3
%14 = load double, double* %6
%15 = load double, double* %7
%16 = fcmp ogt double %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load double, double* %7
store double %18, double* %4
br label %21
19: ; preds = %13
%20 = load double, double* %6
store double %20, double* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load double, double* %4
ret double %22
}

LLVM IR (-O2):
define double @BoundDouble(double %0, double %1, double %2) {
%4 = fcmp olt double %1, %0
%5 = fcmp ogt double %1, %2
%6 = select i1 %5, double %2, double %1
%7 = select i1 %4, double %0, double %6
ret double %7
}
/* Variables and functions */
float readFloat();
int /*<<< orphan*/ writeCommand(char *);
float acceleroX() {
  float value = 0;
  writeCommand("ACCX");
  value = readFloat();
  return value;
}


x86 assembly (clang, -O0):
<acceleroX>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
lea    0xec9(%rip),%rdi
call   1030 <writeCommand@plt>
mov    $0x0,%al
call   1040 <readFloat@plt>
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acceleroX>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <writeCommand@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <readFloat@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"ACCX\00"
define float @acceleroX() {
%1 = alloca float
store float 0.000000e+00, float* %1
%2 = call i32 @writeCommand(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = call float (...) @readFloat()
store float %3, float* %1
%4 = load float, float* %1
ret float %4
}

LLVM IR (-O2):
@.str = [5 x i8] c"ACCX\00"
define float @acceleroX() {
%1 = tail call i32 @writeCommand(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%2 = tail call float (...) @readFloat()
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M306_f(char *s) {
  debug("M306_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M306_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M306_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M306_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M306_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M306_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M306_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
int _capture_eol(int w, int y) {
  int eol = 0;
  eol = y * (w + 1) + w;
  return eol;
}


x86 assembly (clang, -O0):
<_capture_eol>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0x1,%ecx
imul   %ecx,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_capture_eol>:
lea    0x1(%rdi),%eax
imul   %esi,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @_capture_eol(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1
%9 = mul nsw i32 %6, %8
%10 = load i32, i32* %3
%11 = add nsw i32 %9, %10
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @_capture_eol(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 1
%4 = mul nsw i32 %3, %1
%5 = add nsw i32 %4, %0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ ispunct(int);
void t_ispunct_0xd5() {
  Assert_real((ispunct(213) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_ispunct.c",
              1070, ("ispunct should be 0 for 0xd5"));
}


x86 assembly (clang, -O0):
<t_ispunct_0xd5>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd5,%edi
call   1030 <ispunct@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x42e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_ispunct_0xd5>:
push   %rax
mov    $0xd5,%edi
call   1030 <ispunct@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x42e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xd5\00"
define void @t_ispunct_0xd5() {
%1 = call i64 @ispunct(i32 213)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1070, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_ispunct.c\00"
@.str.1 = [29 x i8] c"ispunct should be 0 for 0xd5\00"
define void @t_ispunct_0xd5() {
%1 = tail call i64 @ispunct(i32 213)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1070, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
const char *C_Int_Name(void) { return "C_Int"; }


x86 assembly (clang, -O0):
<C_Int_Name>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_Int_Name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"C_Int\00"
define i8* @C_Int_Name() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"C_Int\00"
define i8* @C_Int_Name() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int wchar_t;

/* Variables and functions */
wchar_t test6(void) { return L'\a'; }


x86 assembly (clang, -O0):
<test6>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test6>:
mov    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @test6() {
ret i32 7
}

LLVM IR (-O2):
define i32 @test6() {
ret i32 7
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t htons(uint16_t x) { return (x << 8) | (x >> 8); }


x86 assembly (clang, -O0):
<htons>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htons>:
mov    %edi,%eax
shl    $0x8,%eax
sar    $0x8,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @htons(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 8
%5 = load i32, i32* %2
%6 = ashr i32 %5, 8
%7 = or i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @htons(i32 %0) {
%2 = shl i32 %0, 8
%3 = ashr i32 %0, 8
%4 = or i32 %2, %3
ret i32 %4
}
/* Variables and functions */
int chained();
int overflow();
int signed_char();
int signed_long();
int unsigned_char();
int main(void) {
  return unsigned_char() + signed_char() + signed_long() + chained() +
         overflow();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <unsigned_char@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1070 <signed_char@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <signed_long@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1040 <chained@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1050 <overflow@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
xor    %eax,%eax
call   1060 <unsigned_char@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1070 <signed_char@plt>
mov    %eax,%ebp
add    %ebx,%ebp
xor    %eax,%eax
call   1030 <signed_long@plt>
mov    %eax,%ebx
add    %ebp,%ebx
xor    %eax,%eax
call   1040 <chained@plt>
mov    %eax,%ebp
add    %ebx,%ebp
xor    %eax,%eax
call   1050 <overflow@plt>
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @unsigned_char()
%3 = call i32 (...) @signed_char()
%4 = add nsw i32 %2, %3
%5 = call i32 (...) @signed_long()
%6 = add nsw i32 %4, %5
%7 = call i32 (...) @chained()
%8 = add nsw i32 %6, %7
%9 = call i32 (...) @overflow()
%10 = add nsw i32 %8, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @unsigned_char()
%2 = tail call i32 (...) @signed_char()
%3 = add nsw i32 %2, %1
%4 = tail call i32 (...) @signed_long()
%5 = add nsw i32 %3, %4
%6 = tail call i32 (...) @chained()
%7 = add nsw i32 %5, %6
%8 = tail call i32 (...) @overflow()
%9 = add nsw i32 %7, %8
ret i32 %9
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR7D_set(void) { return U_WMRCORENONE_set("U_WMR7D"); }


x86 assembly (clang, -O0):
<U_WMR7D_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR7D_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR7D\00"
define i8* @U_WMR7D_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR7D\00"
define i8* @U_WMR7D_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}