xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ test_write(int, char *, int);
int /*<<< orphan*/ usleep(int);
int send_string(int port, char *str) {
  int ct = 0;
  char *ptr = str;
  while (*ptr != 0) {
    (test_write(port, ptr, 1));
    usleep(50);
    ptr++;
    ct++;
  }
  return ct;
}


x86 assembly (clang, -O0):
<send_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1183 <send_string+0x63>
mov    -0x4(%rbp),%edi
mov    -0x20(%rbp),%rsi
mov    $0x1,%edx
call   1030 <test_write@plt>
mov    $0x32,%edi
call   1040 <usleep@plt>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113e <send_string+0x1e>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_string>:
push   %rbp
push   %r14
push   %rbx
cmpb   $0x0,(%rsi)
je     116b <send_string+0x4b>
mov    %rsi,%rbx
mov    %edi,%r14d
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %rax,%rbp
lea    (%rbx,%rax,1),%rsi
mov    %r14d,%edi
mov    $0x1,%edx
call   1030 <test_write@plt>
mov    $0x32,%edi
call   1040 <usleep@plt>
lea    0x1(%rbp),%rax
cmpb   $0x0,0x1(%rbx,%rbp,1)
jne    1140 <send_string+0x20>
jmp    116d <send_string+0x4d>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @send_string(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
store i32 0, i32* %5
%7 = load i8*, i8** %4
store i8* %7, i8** %6
br label %8
8: ; preds = %13, %2
%9 = load i8*, i8** %6
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %22
13: ; preds = %8
%14 = load i32, i32* %3
%15 = load i8*, i8** %6
%16 = call i32 @test_write(i32 %14, i8* %15, i32 1)
%17 = call i32 @usleep(i32 50)
%18 = load i8*, i8** %6
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %6
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %8
22: ; preds = %8
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @send_string(i32 %0, i8* %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %2, %5
%6 = phi i8* [ %10, %5 ], [ %1, %2 ]
%7 = phi i32 [ %11, %5 ], [ 0, %2 ]
%8 = tail call i32 @test_write(i32 %0, i8* %6, i32 1)
%9 = tail call i32 @usleep(i32 50)
%10 = getelementptr inbounds i8, i8* %6, i64 1
%11 = add nuw nsw i32 %7, 1
%12 = load i8, i8* %10
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %5
14: ; preds = %5, %2
%15 = phi i32 [ 0, %2 ], [ %11, %5 ]
ret i32 %15
}
void SDB_write() {}


x86 assembly (clang, -O0):
<SDB_write>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SDB_write>:
ret

LLVM IR (-O0):
define void @SDB_write() {
ret void
}

LLVM IR (-O2):
define void @SDB_write() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stdout;
void print_help(void) {
  fprintf(
      stdout,
      "'csa-cp-hab' exports data from CSA-CP device to Bionet\n"
      "\n"
      "usage: csa-cp-hab [OPTIONS] --device-file <DF>\n"
      "\n"
      "-?,-h,--help              Print this help\n"
      "-b,--debug	               Enable debugging output.\n"
      "-c,--clear-files          Clears the files on the device\n"
      "-d,--device-file <DF>     Talk to relay node through device file DF "
      "(required)\n"
      "-i,--id <ID>              Set the HAB-ID to ID (default: hostname)\n"
      "-n,--no-files             Do not record the raw CSA-CP data to disk.\n"
      "-s,--security-dir <dir>   Directory containing security certificates\n"
      "-v,--version              Print version number\n");
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [586 x i8] c"'csa-cp-hab' exports data from CSA-CP device to Bionet\0A\0Ausage: csa-cp-hab [OPTIONS] --device-file <DF>\0A\0A-?,-h,--help Print this help\0A-b,--debug\09 Enable debugging output.\0A-c,--clear-files Clears the files on the device\0A-d,--device-file <DF> Talk to relay node through device file DF (required)\0A-i,--id <ID> Set the HAB-ID to ID (default: hostname)\0A-n,--no-files Do not record the raw CSA-CP data to disk.\0A-s,--security-dir <dir> Directory containing security certificates\0A-v,--version Print version number\0A\00"
define void @print_help() {
%1 = load i32, i32* @stdout
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([586 x i8], [586 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [586 x i8] c"'csa-cp-hab' exports data from CSA-CP device to Bionet\0A\0Ausage: csa-cp-hab [OPTIONS] --device-file <DF>\0A\0A-?,-h,--help Print this help\0A-b,--debug\09 Enable debugging output.\0A-c,--clear-files Clears the files on the device\0A-d,--device-file <DF> Talk to relay node through device file DF (required)\0A-i,--id <ID> Set the HAB-ID to ID (default: hostname)\0A-n,--no-files Do not record the raw CSA-CP data to disk.\0A-s,--security-dir <dir> Directory containing security certificates\0A-v,--version Print version number\0A\00"
define void @print_help() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([586 x i8], [586 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RedisModule_Free(void *);
void HelloBlock_FreeData(void *privdata) { RedisModule_Free(privdata); }


x86 assembly (clang, -O0):
<HelloBlock_FreeData>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <RedisModule_Free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelloBlock_FreeData>:
jmp    1030 <RedisModule_Free@plt>

LLVM IR (-O0):
define void @HelloBlock_FreeData(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @RedisModule_Free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @HelloBlock_FreeData(i8* %0) {
%2 = tail call i32 @RedisModule_Free(i8* %0)
ret void
}
unsigned long int rand() {
  static unsigned long int lfsr = 1;
  static int period = 0;
  lfsr = (lfsr >> 1) ^ (unsigned long int)((0 - (lfsr & 1u)) & 0xd0000001u);
  ++period;
  return lfsr;
}


x86 assembly (clang, -O0):
<rand>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
shr    $0x1,%rax
mov    0x2f0a(%rip),%rdx
and    $0x1,%rdx
xor    %ecx,%ecx
sub    %rdx,%rcx
movabs $0xd0000001,%rdx
and    %rdx,%rcx
xor    %rcx,%rax
mov    %rax,0x2eea(%rip)
mov    0x2ef0(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2ee7(%rip)
mov    0x2ed4(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand>:
mov    0x2f19(%rip),%rax
mov    %rax,%rcx
shr    %rcx
and    $0x1,%eax
neg    %eax
and    $0xd0000001,%eax
xor    %rcx,%rax
mov    %rax,0x2eff(%rip)
addl   $0x1,0x2f04(%rip)
ret

LLVM IR (-O0):
@rand.lfsr = internal global i64 1
@rand.period = internal global i32 0
define i64 @rand() {
%1 = load i64, i64* @rand.lfsr
%2 = lshr i64 %1, 1
%3 = load i64, i64* @rand.lfsr
%4 = and i64 %3, 1
%5 = sub i64 0, %4
%6 = and i64 %5, 3489660929
%7 = xor i64 %2, %6
store i64 %7, i64* @rand.lfsr
%8 = load i32, i32* @rand.period
%9 = add nsw i32 %8, 1
store i32 %9, i32* @rand.period
%10 = load i64, i64* @rand.lfsr
ret i64 %10
}

LLVM IR (-O2):
@rand.lfsr = internal unnamed_addr global i64 1
@rand.period = internal unnamed_addr global i32 0
define i64 @rand() {
%1 = load i64, i64* @rand.lfsr
%2 = lshr i64 %1, 1
%3 = and i64 %1, 1
%4 = sub nsw i64 0, %3
%5 = and i64 %4, 3489660929
%6 = xor i64 %5, %2
store i64 %6, i64* @rand.lfsr
%7 = load i32, i32* @rand.period
%8 = add nsw i32 %7, 1
store i32 %8, i32* @rand.period
ret i64 %6
}
void ARGBShuffleRow_NEON() {}


x86 assembly (clang, -O0):
<ARGBShuffleRow_NEON>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBShuffleRow_NEON>:
ret

LLVM IR (-O0):
define void @ARGBShuffleRow_NEON() {
ret void
}

LLVM IR (-O2):
define void @ARGBShuffleRow_NEON() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void g7_cb(void *arg) { puts("GPIO_7 triggered"); }


x86 assembly (clang, -O0):
<g7_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g7_cb>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"GPIO_7 triggered\00"
define void @g7_cb(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @puts(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"GPIO_7 triggered\00"
define void @g7_cb(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bench();
void cmd_bench(void) { bench(); }


x86 assembly (clang, -O0):
<cmd_bench>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <bench@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_bench>:
xor    %eax,%eax
jmp    1030 <bench@plt>

LLVM IR (-O0):
define void @cmd_bench() {
%1 = call i32 (...) @bench()
ret void
}

LLVM IR (-O2):
define void @cmd_bench() {
%1 = tail call i32 (...) @bench()
ret void
}
/* Variables and functions */
int bar(int *, int);
int f6(int *p) { return !p ? bar(p, 1) : bar(p, 0); }


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    113d <f6+0x2d>
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <bar@plt>
mov    %eax,-0xc(%rbp)
jmp    114b <f6+0x3b>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <bar@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
test   %rdi,%rdi
je     111c <f6+0xc>
xor    %esi,%esi
jmp    1030 <bar@plt>
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <bar@plt>

LLVM IR (-O0):
define i32 @f6(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32*, i32** %2
%7 = call i32 @bar(i32* %6, i32 1)
br label %11
8: ; preds = %1
%9 = load i32*, i32** %2
%10 = call i32 @bar(i32* %9, i32 0)
br label %11
11: ; preds = %8, %5
%12 = phi i32 [ %7, %5 ], [ %10, %8 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @f6(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @bar(i32* null, i32 1)
br label %7
5: ; preds = %1
%6 = tail call i32 @bar(i32* %0, i32 0)
br label %7
7: ; preds = %5, %3
%8 = phi i32 [ %4, %3 ], [ %6, %5 ]
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ wiznetRegWriteWord(int /*<<< orphan*/, int,
                                      int /*<<< orphan*/);
void wiznetSetSocketTXWritePointer(uint8_t socket, uint16_t addr) {
  wiznetRegWriteWord(socket, (0x0000 + 0x0024), addr);
}


x86 assembly (clang, -O0):
<wiznetSetSocketTXWritePointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0x24,%esi
call   1030 <wiznetRegWriteWord@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wiznetSetSocketTXWritePointer>:
mov    %esi,%edx
mov    $0x24,%esi
jmp    1030 <wiznetRegWriteWord@plt>

LLVM IR (-O0):
define void @wiznetSetSocketTXWritePointer(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @wiznetRegWriteWord(i32 %5, i32 36, i32 %6)
ret void
}

LLVM IR (-O2):
define void @wiznetSetSocketTXWritePointer(i32 %0, i32 %1) {
%3 = tail call i32 @wiznetRegWriteWord(i32 %0, i32 36, i32 %1)
ret void
}
/* Variables and functions */
unsigned int UINT_MAX;
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
unsigned int foo_chkuadd(unsigned int a, unsigned int b) {
  if (UINT_MAX - b < a) {
    fputs("unsigned int overflow\n", stderr);
    return UINT_MAX;
  }
  return a + b;
}


x86 assembly (clang, -O0):
<foo_chkuadd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ec3(%rip),%rax
mov    (%rax),%eax
sub    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1159 <foo_chkuadd+0x49>
mov    0x2e9e(%rip),%rax
mov    (%rax),%esi
lea    0xebd(%rip),%rdi
call   1030 <fputs@plt>
mov    0x2e99(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1162 <foo_chkuadd+0x52>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_chkuadd>:
push   %rbx
mov    0x2ed0(%rip),%rbx
mov    (%rbx),%ecx
sub    %esi,%ecx
cmp    %edi,%ecx
jae    1139 <foo_chkuadd+0x29>
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
lea    0xed0(%rip),%rdi
call   1030 <fputs@plt>
mov    (%rbx),%eax
pop    %rbx
ret
mov    %esi,%eax
add    %edi,%eax
pop    %rbx
ret

LLVM IR (-O0):
@UINT_MAX = global i32 0
@.str = [23 x i8] c"unsigned int overflow\0A\00"
@stderr = global i32 0
define i32 @foo_chkuadd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* @UINT_MAX
%7 = load i32, i32* %5
%8 = sub i32 %6, %7
%9 = load i32, i32* %4
%10 = icmp ult i32 %8, %9
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i32, i32* @stderr
%13 = call i32 @fputs(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %12)
%14 = load i32, i32* @UINT_MAX
store i32 %14, i32* %3
br label %19
15: ; preds = %2
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = add i32 %16, %17
store i32 %18, i32* %3
br label %19
19: ; preds = %15, %11
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
@UINT_MAX = global i32 0
@.str = [23 x i8] c"unsigned int overflow\0A\00"
@stderr = global i32 0
define i32 @foo_chkuadd(i32 %0, i32 %1) {
%3 = load i32, i32* @UINT_MAX
%4 = sub i32 %3, %1
%5 = icmp ult i32 %4, %0
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = load i32, i32* @stderr
%8 = tail call i32 @fputs(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i32, i32* @UINT_MAX
br label %12
10: ; preds = %2
%11 = add i32 %1, %0
br label %12
12: ; preds = %10, %6
%13 = phi i32 [ %9, %6 ], [ %11, %10 ]
ret i32 %13
}
/* Type definitions */
struct Dotstar {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pinInput(int);
void spiEnd(struct Dotstar *strip) {
  pinInput(12);
  pinInput(11);
}


x86 assembly (clang, -O0):
<spiEnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xc,%edi
call   1030 <pinInput@plt>
mov    $0xb,%edi
call   1030 <pinInput@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spiEnd>:
push   %rax
mov    $0xc,%edi
call   1030 <pinInput@plt>
mov    $0xb,%edi
pop    %rax
jmp    1030 <pinInput@plt>

LLVM IR (-O0):
%struct.Dotstar = type { i32 }
define void @spiEnd(%struct.Dotstar* %0) {
%2 = alloca %struct.Dotstar*
store %struct.Dotstar* %0, %struct.Dotstar** %2
%3 = call i32 @pinInput(i32 12)
%4 = call i32 @pinInput(i32 11)
ret void
}

LLVM IR (-O2):
%struct.Dotstar = type { i32 }
define void @spiEnd(%struct.Dotstar* nocapture readnone %0) {
%2 = tail call i32 @pinInput(i32 12)
%3 = tail call i32 @pinInput(i32 11)
ret void
}
/* Type definitions */
struct param_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ param_add_string(char *, char *, struct param_list **,
                                    int *);
int /*<<< orphan*/ sprintf(char *, char *, unsigned long);
void param_add_hex(char *name, unsigned long value, struct param_list **param,
                   int *count) {
  char buffer[1024];
  sprintf(buffer, "0x%lx", value);
  param_add_string(name, buffer, param, count);
}


x86 assembly (clang, -O0):
<param_add_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x420,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    -0x420(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xeb3(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
lea    -0x420(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <param_add_string@plt>
add    $0x420,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<param_add_hex>:
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x408,%rsp
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rsi,%rdx
mov    %rdi,%rbx
lea    0xebf(%rip),%rsi
mov    %rsp,%r12
mov    %r12,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
mov    %r12,%rsi
mov    %r15,%rdx
mov    %r14,%rcx
call   1030 <param_add_string@plt>
add    $0x408,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.param_list = type { i32 }
@.str = [6 x i8] c"0x%lx\00"
define void @param_add_hex(i8* %0, i64 %1, %struct.param_list** %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca %struct.param_list**
%8 = alloca i32*
%9 = alloca [1024 x i8]
store i8* %0, i8** %5
store i64 %1, i64* %6
store %struct.param_list** %2, %struct.param_list*** %7
store i32* %3, i32** %8
%10 = getelementptr inbounds [1024 x i8], [1024 x i8]* %9, i64 0, i64 0
%11 = load i64, i64* %6
%12 = call i32 @sprintf(i8* %10, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 %11)
%13 = load i8*, i8** %5
%14 = getelementptr inbounds [1024 x i8], [1024 x i8]* %9, i64 0, i64 0
%15 = load %struct.param_list**, %struct.param_list*** %7
%16 = load i32*, i32** %8
%17 = call i32 @param_add_string(i8* %13, i8* %14, %struct.param_list** %15, i32* %16)
ret void
}

LLVM IR (-O2):
%struct.param_list = type { i32 }
@.str = [6 x i8] c"0x%lx\00"
define void @param_add_hex(i8* %0, i64 %1, %struct.param_list** %2, i32* %3) {
%5 = alloca [1024 x i8]
%6 = getelementptr inbounds [1024 x i8], [1024 x i8]* %5, i64 0, i64 0
%7 = call i32 @sprintf(i8* %6, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 %1)
%8 = call i32 @param_add_string(i8* %0, i8* %6, %struct.param_list** %2, i32* %3)
ret void
}
int fibonacci(int num) {
  if (num == 1 || num == 2)
    return 1;
  return (fibonacci(num - 1) + fibonacci(num - 2));
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     112f <fibonacci+0x1f>
cmpl   $0x2,-0x8(%rbp)
jne    113b <fibonacci+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    115e <fibonacci+0x4e>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibonacci@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibonacci@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
add    $0xffffffff,%ebp
mov    $0x1,%ebx
cmp    $0x2,%ebp
jb     1144 <fibonacci+0x34>
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %ebp,%edi
call   1030 <fibonacci@plt>
add    %eax,%ebx
add    $0xfffffffe,%ebp
cmp    $0x1,%ebp
ja     1130 <fibonacci+0x20>
add    $0x1,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibonacci(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 2
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i32 1, i32* %2
br label %18
10: ; preds = %6
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = call i32 @fibonacci(i32 %12)
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 2
%16 = call i32 @fibonacci(i32 %15)
%17 = add nsw i32 %13, %16
store i32 %17, i32* %2
br label %18
18: ; preds = %10, %9
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @fibonacci(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 2
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %11, %4 ], [ %2, %1 ]
%6 = phi i32 [ %9, %4 ], [ %0, %1 ]
%7 = phi i32 [ %10, %4 ], [ 0, %1 ]
%8 = tail call i32 @fibonacci(i32 %5)
%9 = add nsw i32 %6, -2
%10 = add nsw i32 %8, %7
%11 = add i32 %6, -3
%12 = icmp ult i32 %11, 2
br i1 %12, label %13, label %4
13: ; preds = %4
%14 = add i32 %10, 1
br label %15
15: ; preds = %13, %1
%16 = phi i32 [ 1, %1 ], [ %14, %13 ]
ret i32 %16
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int /*<<< orphan*/ IntDisable(scalar_t__);
int /*<<< orphan*/ IntUnregister(scalar_t__);
int _UARTBaseValid(scalar_t__);
scalar_t__ _UARTIntNumberGet(scalar_t__);
void UARTIntUnregister(uint32_t ui32Base) {
  uint32_t ui32Int;
  ASSERT(_UARTBaseValid(ui32Base));
  ui32Int = _UARTIntNumberGet(ui32Base);
  ASSERT(ui32Int != 0);
  IntDisable(ui32Int);
  IntUnregister(ui32Int);
}


x86 assembly (clang, -O0):
<UARTIntUnregister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1060 <ASSERT@plt>
mov    -0x8(%rbp),%rdi
call   1050 <_UARTIntNumberGet@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1060 <ASSERT@plt>
mov    -0x10(%rbp),%rdi
call   1040 <IntDisable@plt>
mov    -0x10(%rbp),%rdi
call   1070 <IntUnregister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTIntUnregister>:
push   %rbx
mov    %rdi,%rbx
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1060 <ASSERT@plt>
mov    %rbx,%rdi
call   1050 <_UARTIntNumberGet@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1060 <ASSERT@plt>
mov    %rbx,%rdi
call   1040 <IntDisable@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1070 <IntUnregister@plt>

LLVM IR (-O0):
define void @UARTIntUnregister(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i32 @_UARTBaseValid(i64 %4)
%6 = call i32 @ASSERT(i32 %5)
%7 = load i64, i64* %2
%8 = call i64 @_UARTIntNumberGet(i64 %7)
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
%12 = call i32 @ASSERT(i32 %11)
%13 = load i64, i64* %3
%14 = call i32 @IntDisable(i64 %13)
%15 = load i64, i64* %3
%16 = call i32 @IntUnregister(i64 %15)
ret void
}

LLVM IR (-O2):
define void @UARTIntUnregister(i64 %0) {
%2 = tail call i32 @_UARTBaseValid(i64 %0)
%3 = tail call i32 @ASSERT(i32 %2)
%4 = tail call i64 @_UARTIntNumberGet(i64 %0)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
%7 = tail call i32 @ASSERT(i32 %6)
%8 = tail call i32 @IntDisable(i64 %4)
%9 = tail call i32 @IntUnregister(i64 %4)
ret void
}
test(label, ft) int label, ft;
{
  needbrack("(");
  expression(1);
  needbrack(")");
  gen_test_jump(label, ft);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    0xebb(%rip),%rdi
mov    $0x0,%al
call   1050 <needbrack@plt>
mov    $0x1,%edi
mov    $0x0,%al
call   1040 <expression@plt>
lea    0xea3(%rip),%rdi
mov    $0x0,%al
call   1050 <needbrack@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x0,%al
call   1030 <gen_test_jump@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xec2(%rip),%rdi
xor    %eax,%eax
call   1050 <needbrack@plt>
mov    $0x1,%edi
xor    %eax,%eax
call   1040 <expression@plt>
lea    0xeaa(%rip),%rdi
xor    %eax,%eax
call   1050 <needbrack@plt>
mov    %ebp,%edi
mov    %ebx,%esi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <gen_test_jump@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"(\00"
@.str.1 = [2 x i8] c")\00"
define i32 @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @needbrack to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%7 = call i32 (i32, ...) bitcast (i32 (...)* @expression to i32 (i32, ...)*)(i32 1)
%8 = call i32 (i8*, ...) bitcast (i32 (...)* @needbrack to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = call i32 (i32, i32, ...) bitcast (i32 (...)* @gen_test_jump to i32 (i32, i32, ...)*)(i32 %9, i32 %10)
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
@.str = [2 x i8] c"(\00"
@.str.1 = [2 x i8] c")\00"
define i32 @test(i32 %0, i32 %1) {
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @needbrack to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @expression to i32 (i32, ...)*)(i32 1)
%5 = tail call i32 (i8*, ...) bitcast (i32 (...)* @needbrack to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%6 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @gen_test_jump to i32 (i32, i32, ...)*)(i32 %0, i32 %1)
ret i32 undef
}
void f(char *a, int *b) { *b = *a; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
movsbl (%rdi),%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @f(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i32*, i32** %4
store i32 %7, i32* %8
ret void
}

LLVM IR (-O2):
define void @f(i8* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i8, i8* %0
%4 = sext i8 %3 to i32
store i32 %4, i32* %1
ret void
}
/* Variables and functions */
int rand();
void rand_floats(int size, float *rands) {
  int i;
  for (i = 0; i < size; i++) {
    rands[i] = (float)(rand() % 10);
  }
}


x86 assembly (clang, -O0):
<rand_floats>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1160 <rand_floats+0x50>
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0xa,%ecx
cltd
idiv   %ecx
cvtsi2ss %edx,%xmm0
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <rand_floats+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_floats>:
push   %r15
push   %r14
push   %rbx
test   %edi,%edi
jle    116a <rand_floats+0x5a>
mov    %rsi,%r14
mov    %edi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rcx
add    %edx,%ecx
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
movss  %xmm0,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <rand_floats+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @rand_floats(i32 %0, float* %1) {
%3 = alloca i32
%4 = alloca float*
%5 = alloca i32
store i32 %0, i32* %3
store float* %1, float** %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = call i32 (...) @rand()
%12 = srem i32 %11, 10
%13 = sitofp i32 %12 to float
%14 = load float*, float** %4
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds float, float* %14, i64 %16
store float %13, float* %17
br label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @rand_floats(i32 %0, float* nocapture writeonly %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %12, %6 ]
%8 = tail call i32 (...) @rand()
%9 = srem i32 %8, 10
%10 = sitofp i32 %9 to float
%11 = getelementptr inbounds float, float* %1, i64 %7
store float %10, float* %11
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ parm;

/* Variables and functions */
scalar_t__ CG_ConfigString(int);
int /*<<< orphan*/ COM_Parse(char **);
int /*<<< orphan*/ Q_strncpyz(char *, int /*<<< orphan*/, int);
int /*<<< orphan*/ trap_S_StartBackgroundTrack(char *, char *, int);
void CG_QueueMusic(void) {
  char *s;
  char parm[64];
  s = (char *)CG_ConfigString(27);
  Q_strncpyz(parm, COM_Parse(&s), sizeof(parm));
  trap_S_StartBackgroundTrack(parm, "", -2);
}


x86 assembly (clang, -O0):
<CG_QueueMusic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    $0x1b,%edi
call   1050 <CG_ConfigString@plt>
mov    %rax,-0x8(%rbp)
lea    -0x50(%rbp),%rax
mov    %rax,-0x58(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <COM_Parse@plt>
mov    -0x58(%rbp),%rdi
mov    %eax,%esi
mov    $0x40,%edx
call   1060 <Q_strncpyz@plt>
lea    -0x50(%rbp),%rdi
lea    0xe7e(%rip),%rsi
mov    $0xfffffffe,%edx
call   1030 <trap_S_StartBackgroundTrack@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_QueueMusic>:
push   %rbx
sub    $0x50,%rsp
mov    $0x1b,%edi
call   1050 <CG_ConfigString@plt>
mov    %rax,0x8(%rsp)
lea    0x8(%rsp),%rdi
call   1040 <COM_Parse@plt>
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
mov    %eax,%esi
mov    $0x40,%edx
call   1060 <Q_strncpyz@plt>
lea    0xe87(%rip),%rsi
mov    %rbx,%rdi
mov    $0xfffffffe,%edx
call   1030 <trap_S_StartBackgroundTrack@plt>
add    $0x50,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @CG_QueueMusic() {
%1 = alloca i8*
%2 = alloca [64 x i8]
%3 = call i64 @CG_ConfigString(i32 27)
%4 = inttoptr i64 %3 to i8*
store i8* %4, i8** %1
%5 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%6 = call i32 @COM_Parse(i8** %1)
%7 = call i32 @Q_strncpyz(i8* %5, i32 %6, i32 64)
%8 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%9 = call i32 @trap_S_StartBackgroundTrack(i8* %8, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i32 -2)
ret void
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define void @CG_QueueMusic() {
%1 = alloca i8*
%2 = alloca [64 x i8]
%3 = bitcast i8** %1 to i8*
%4 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%5 = tail call i64 @CG_ConfigString(i32 27)
%6 = inttoptr i64 %5 to i8*
store i8* %6, i8** %1
%7 = call i32 @COM_Parse(i8** %1)
%8 = call i32 @Q_strncpyz(i8* %4, i32 %7, i32 64)
%9 = call i32 @trap_S_StartBackgroundTrack(i8* %4, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i32 -2)
ret void
}
double WaterDensity(double T) {
  double a1 = -3.983035;
  double a2 = 301.797;
  double a3 = 522528.9;
  double a4 = 69.34881;
  double a5 = 999.974950;
  return a5 * (1 - (T + a1) * (T + a1) * (T + a2) / a3 / (T + a4)) / 18.0152;
}


x86 assembly (clang, -O0):
<WaterDensity>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xf1f(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xf0a(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xef5(%rip),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  0xee0(%rip),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  0xecb(%rip),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x30(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
addsd  -0x10(%rbp),%xmm2
movsd  -0x8(%rbp),%xmm1
addsd  -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm2
movsd  -0x8(%rbp),%xmm1
addsd  -0x18(%rbp),%xmm1
mulsd  %xmm1,%xmm2
divsd  -0x20(%rbp),%xmm2
movsd  -0x8(%rbp),%xmm1
addsd  -0x28(%rbp),%xmm1
divsd  %xmm1,%xmm2
movsd  0xe78(%rip),%xmm1
subsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
movsd  0xe60(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<WaterDensity>:
movsd  0xef8(%rip),%xmm2
addsd  %xmm0,%xmm2
mulsd  %xmm2,%xmm2
movsd  0xef0(%rip),%xmm1
addsd  %xmm0,%xmm1
mulsd  %xmm2,%xmm1
divsd  0xee8(%rip),%xmm1
addsd  0xee8(%rip),%xmm0
divsd  %xmm0,%xmm1
addsd  0xee4(%rip),%xmm1
mulsd  0xee4(%rip),%xmm1
divsd  0xee4(%rip),%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @WaterDensity(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %2
store double 0xC00FDD41743E963E, double* %3
store double 3.017970e+02, double* %4
store double 0x411FE4839999999A, double* %5
store double 0x40515652E72DA123, double* %6
store double 0x408F3FCCB295E9E2, double* %7
%8 = load double, double* %7
%9 = load double, double* %2
%10 = load double, double* %3
%11 = fadd double %9, %10
%12 = load double, double* %2
%13 = load double, double* %3
%14 = fadd double %12, %13
%15 = fmul double %11, %14
%16 = load double, double* %2
%17 = load double, double* %4
%18 = fadd double %16, %17
%19 = fmul double %15, %18
%20 = load double, double* %5
%21 = fdiv double %19, %20
%22 = load double, double* %2
%23 = load double, double* %6
%24 = fadd double %22, %23
%25 = fdiv double %21, %24
%26 = fsub double 1.000000e+00, %25
%27 = fmul double %8, %26
%28 = fdiv double %27, 1.801520e+01
ret double %28
}

LLVM IR (-O2):
define double @WaterDensity(double %0) {
%2 = fadd double %0, 0xC00FDD41743E963E
%3 = fmul double %2, %2
%4 = fadd double %0, 3.017970e+02
%5 = fmul double %4, %3
%6 = fdiv double %5, 0x411FE4839999999A
%7 = fadd double %0, 0x40515652E72DA123
%8 = fdiv double %6, %7
%9 = fsub double 1.000000e+00, %8
%10 = fmul double %9, 0x408F3FCCB295E9E2
%11 = fdiv double %10, 1.801520e+01
ret double %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ test_argb8888_get_alpha();
int main() {
  test_argb8888_get_alpha();
  printf("All tests passed.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test_argb8888_get_alpha@plt>
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_argb8888_get_alpha@plt>
lea    0xed1(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"All tests passed.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_argb8888_get_alpha()
%3 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [18 x i8] c"All tests passed.\00"
define i32 @main() {
%1 = tail call i32 (...) @test_argb8888_get_alpha()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int baz() { return 3; }


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @baz() {
ret i32 3
}

LLVM IR (-O2):
define i32 @baz() {
ret i32 3
}
int ft_is_prime(int nb) {
  int i;
  i = 3;
  if (nb % 2 == 0) {
    return (0);
  }
  while (i < nb) {
    if (nb % i == 0) {
      return (0);
    }
    i += 2;
  }
  return (1);
}


x86 assembly (clang, -O0):
<ft_is_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x3,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    112e <ft_is_prime+0x2e>
movl   $0x0,-0x4(%rbp)
jmp    1170 <ft_is_prime+0x70>
jmp    1133 <ft_is_prime+0x33>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1169 <ft_is_prime+0x69>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    115b <ft_is_prime+0x5b>
movl   $0x0,-0x4(%rbp)
jmp    1170 <ft_is_prime+0x70>
mov    -0xc(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0xc(%rbp)
jmp    1133 <ft_is_prime+0x33>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_is_prime>:
xor    %ecx,%ecx
test   $0x1,%dil
jne    110b <ft_is_prime+0xb>
mov    %ecx,%eax
ret
cmp    $0x4,%edi
jl     1130 <ft_is_prime+0x30>
mov    $0x3,%esi
cs nopw 0x0(%rax,%rax,1)
nop
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1108 <ft_is_prime+0x8>
add    $0x2,%esi
cmp    %edi,%esi
jl     1120 <ft_is_prime+0x20>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ft_is_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 3, i32* %4
%5 = load i32, i32* %3
%6 = srem i32 %5, 2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %24
9: ; preds = %1
br label %10
10: ; preds = %20, %9
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %23
14: ; preds = %10
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = srem i32 %15, %16
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %14
store i32 0, i32* %2
br label %24
20: ; preds = %14
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 2
store i32 %22, i32* %4
br label %10
23: ; preds = %10
store i32 1, i32* %2
br label %24
24: ; preds = %23, %19, %8
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @ft_is_prime(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1
%5 = icmp sgt i32 %0, 3
br i1 %5, label %8, label %13
6: ; preds = %8
%7 = icmp slt i32 %12, %0
br i1 %7, label %8, label %13
8: ; preds = %4, %6
%9 = phi i32 [ %12, %6 ], [ 3, %4 ]
%10 = srem i32 %0, %9
%11 = icmp eq i32 %10, 0
%12 = add nuw nsw i32 %9, 2
br i1 %11, label %13, label %6
13: ; preds = %8, %6, %4, %1
%14 = phi i32 [ 0, %1 ], [ 1, %4 ], [ 0, %8 ], [ 1, %6 ]
ret i32 %14
}
int cairo_code_draw_envControlLabel_get_width() { return 7; }


x86 assembly (clang, -O0):
<cairo_code_draw_envControlLabel_get_width>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_envControlLabel_get_width>:
mov    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_envControlLabel_get_width() {
ret i32 7
}

LLVM IR (-O2):
define i32 @cairo_code_draw_envControlLabel_get_width() {
ret i32 7
}
/* Variables and functions */
int /*<<< orphan*/
__softboundmpx_propagate_metadata_shadow_stack_from(int, int /*<<< orphan*/);
void *bsearch(void const *, void const *, size_t, size_t,
              int (*)(void const *, void const *));
__attribute__((__weak__, __always___)) void *
softboundmpx_bsearch(const void *key, const void *base, size_t nmemb,
                     size_t size, int (*compar)(const void *, const void *)) {
  void *ret_ptr = bsearch(key, base, nmemb, size, compar);
  __softboundmpx_propagate_metadata_shadow_stack_from(2, 0);
  return ret_ptr;
}


x86 assembly (clang, -O0):
<softboundmpx_bsearch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1040 <bsearch@plt>
mov    %rax,-0x30(%rbp)
mov    $0x2,%edi
xor    %esi,%esi
call   1030 <__softboundmpx_propagate_metadata_shadow_stack_from@plt>
mov    -0x30(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_bsearch>:
push   %rbx
call   1040 <bsearch@plt>
mov    %rax,%rbx
mov    $0x2,%edi
xor    %esi,%esi
call   1030 <__softboundmpx_propagate_metadata_shadow_stack_from@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define weak i8* @softboundmpx_bsearch(i8* %0, i8* %1, i64 %2, i64 %3, i32 (i8*, i8*)* %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i64
%10 = alloca i32 (i8*, i8*)*
%11 = alloca i8*
store i8* %0, i8** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i32 (i8*, i8*)* %4, i32 (i8*, i8*)** %10
%12 = load i8*, i8** %6
%13 = load i8*, i8** %7
%14 = load i64, i64* %8
%15 = load i64, i64* %9
%16 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %10
%17 = call i8* @bsearch(i8* %12, i8* %13, i64 %14, i64 %15, i32 (i8*, i8*)* %16)
store i8* %17, i8** %11
%18 = call i32 @__softboundmpx_propagate_metadata_shadow_stack_from(i32 2, i32 0)
%19 = load i8*, i8** %11
ret i8* %19
}

LLVM IR (-O2):
define weak i8* @softboundmpx_bsearch(i8* %0, i8* %1, i64 %2, i64 %3, i32 (i8*, i8*)* %4) {
%6 = tail call i8* @bsearch(i8* %0, i8* %1, i64 %2, i64 %3, i32 (i8*, i8*)* %4)
%7 = tail call i32 @__softboundmpx_propagate_metadata_shadow_stack_from(i32 2, i32 0)
ret i8* %6
}
int pathcon_nm9_n_in(void) { return 2; }


x86 assembly (clang, -O0):
<pathcon_nm9_n_in>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm9_n_in>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @pathcon_nm9_n_in() {
ret i32 2
}

LLVM IR (-O2):
define i32 @pathcon_nm9_n_in() {
ret i32 2
}
void pramcache_load(struct super_block *sb) {}


x86 assembly (clang, -O0):
<pramcache_load>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pramcache_load>:
ret

LLVM IR (-O0):
%struct.super_block = type opaque
define void @pramcache_load(%struct.super_block* %0) {
%2 = alloca %struct.super_block*
store %struct.super_block* %0, %struct.super_block** %2
ret void
}

LLVM IR (-O2):
%struct.super_block = type opaque
define void @pramcache_load(%struct.super_block* nocapture %0) {
ret void
}
/* Variables and functions */
int diminuto_ipcl_stream_provider_generic(char const *, int);
int diminuto_ipcl_stream_provider(const char *path) {
  return diminuto_ipcl_stream_provider_generic(path, -1);
}


x86 assembly (clang, -O0):
<diminuto_ipcl_stream_provider>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xffffffff,%esi
call   1030 <diminuto_ipcl_stream_provider_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_ipcl_stream_provider>:
mov    $0xffffffff,%esi
jmp    1030 <diminuto_ipcl_stream_provider_generic@plt>

LLVM IR (-O0):
define i32 @diminuto_ipcl_stream_provider(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @diminuto_ipcl_stream_provider_generic(i8* %3, i32 -1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @diminuto_ipcl_stream_provider(i8* %0) {
%2 = tail call i32 @diminuto_ipcl_stream_provider_generic(i8* %0, i32 -1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0xdd() {
  Assert_real((isdigit(221) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              1110, ("isdigit should be 0 for 0xdd"));
}


x86 assembly (clang, -O0):
<t_isdigit_0xdd>:
push   %rbp
mov    %rsp,%rbp
mov    $0xdd,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x456,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0xdd>:
push   %rax
mov    $0xdd,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x456,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xdd\00"
define void @t_isdigit_0xdd() {
%1 = call i64 @isdigit(i32 221)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1110, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xdd\00"
define void @t_isdigit_0xdd() {
%1 = tail call i64 @isdigit(i32 221)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1110, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, size_t, char *, int);
char *sstrerror(int errnum, char *buf, size_t buflen) {
  buf[0] = 0;
  snprintf(buf, buflen, "Error #%i; strerror_r is not available.", errnum);
  buf[buflen - 1] = 0;
  return (buf);
}


x86 assembly (clang, -O0):
<sstrerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x4(%rbp),%ecx
lea    0xec4(%rip),%rdx
call   1030 <snprintf@plt>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sstrerror>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%ecx
movb   $0x0,(%rsi)
lea    0xeda(%rip),%rdx
mov    %rsi,%rdi
mov    %r14,%rsi
call   1030 <snprintf@plt>
movb   $0x0,-0x1(%r14,%rbx,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [40 x i8] c"Error #%i; strerror_r is not available.\00"
define i8* @sstrerror(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = getelementptr inbounds i8, i8* %7, i64 0
store i8 0, i8* %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i32, i32* %4
%12 = call i32 @snprintf(i8* %9, i64 %10, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = load i8*, i8** %5
%14 = load i64, i64* %6
%15 = sub i64 %14, 1
%16 = getelementptr inbounds i8, i8* %13, i64 %15
store i8 0, i8* %16
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
@.str = [40 x i8] c"Error #%i; strerror_r is not available.\00"
define i8* @sstrerror(i32 %0, i8* returned %1, i64 %2) {
store i8 0, i8* %1
%4 = tail call i32 @snprintf(i8* %1, i64 %2, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %0)
%5 = add i64 %2, -1
%6 = getelementptr inbounds i8, i8* %1, i64 %5
store i8 0, i8* %6
ret i8* %1
}
void write_gs(unsigned val) {
  asm volatile("mov %0, %%gs" : : "rm"(val) : "memory");
}


x86 assembly (clang, -O0):
<write_gs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%gs
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_gs>:
mov    %edi,-0x4(%rsp)
mov    -0x4(%rsp),%gs
ret

LLVM IR (-O0):
define void @write_gs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @write_gs(i32 %0) {
tail call void asm sideeffect "mov $0, %gs", "rm,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret void
}