xunge/DecIR huggingface dataset:
/* Variables and functions */
float M_PI;
float sinf(float);
float sinc(float x) { return 0 == x ? 1.0 : sinf(M_PI * x) / (M_PI * x); }


x86 assembly (clang, -O0):
<sinc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x4(%rbp),%xmm0
jne    1142 <sinc+0x32>
jp     1142 <sinc+0x32>
movsd  0xec8(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1174 <sinc+0x64>
mov    0x2e9f(%rip),%rax
movss  (%rax),%xmm0
mulss  -0x4(%rbp),%xmm0
call   1030 <sinf@plt>
mov    0x2e8a(%rip),%rax
movss  (%rax),%xmm1
mulss  -0x4(%rbp),%xmm1
divss  %xmm1,%xmm0
cvtss2sd %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sinc>:
push   %rbx
sub    $0x10,%rsp
movaps %xmm0,%xmm1
xorps  %xmm0,%xmm0
ucomiss %xmm0,%xmm1
jne    112c <sinc+0x1c>
jp     112c <sinc+0x1c>
movss  0xed6(%rip),%xmm0
jmp    1154 <sinc+0x44>
mov    0x2eb5(%rip),%rbx
movss  (%rbx),%xmm0
mulss  %xmm1,%xmm0
movss  %xmm1,0xc(%rsp)
call   1030 <sinf@plt>
movss  0xc(%rsp),%xmm1
mulss  (%rbx),%xmm1
divss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@M_PI = global float 0.000000e+00
define float @sinc(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp oeq float 0.000000e+00, %3
br i1 %4, label %5, label %6
5: ; preds = %1
br label %16
6: ; preds = %1
%7 = load float, float* @M_PI
%8 = load float, float* %2
%9 = fmul float %7, %8
%10 = call float @sinf(float %9)
%11 = load float, float* @M_PI
%12 = load float, float* %2
%13 = fmul float %11, %12
%14 = fdiv float %10, %13
%15 = fpext float %14 to double
br label %16
16: ; preds = %6, %5
%17 = phi double [ 1.000000e+00, %5 ], [ %15, %6 ]
%18 = fptrunc double %17 to float
ret float %18
}

LLVM IR (-O2):
@M_PI = global float 0.000000e+00
define float @sinc(float %0) {
%2 = fcmp oeq float %0, 0.000000e+00
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = load float, float* @M_PI
%5 = fmul float %4, %0
%6 = tail call float @sinf(float %5)
%7 = load float, float* @M_PI
%8 = fmul float %7, %0
%9 = fdiv float %6, %8
br label %10
10: ; preds = %1, %3
%11 = phi float [ %9, %3 ], [ 1.000000e+00, %1 ]
ret float %11
}
void free_imatrix(int **m, int nrl, int nrh, int ncl, int nch) {
  int **pArray = m + nrl;
  int *pMatrix = m[nrl] + ncl;
  free(pMatrix);
  free(pArray);
}


x86 assembly (clang, -O0):
<free_imatrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
movslq -0x14(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rdi
call   1030 <free@plt>
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_imatrix>:
push   %rbx
movslq %esi,%rdx
lea    (%rdi,%rdx,8),%rbx
movslq %ecx,%rax
shl    $0x2,%rax
add    (%rdi,%rdx,8),%rax
mov    %rax,%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_imatrix(i32** %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32**
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32**
%12 = alloca i32*
store i32** %0, i32*** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%13 = load i32**, i32*** %6
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32*, i32** %13, i64 %15
store i32** %16, i32*** %11
%17 = load i32**, i32*** %6
%18 = load i32, i32* %7
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32*, i32** %17, i64 %19
%21 = load i32*, i32** %20
%22 = load i32, i32* %9
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i32, i32* %21, i64 %23
store i32* %24, i32** %12
%25 = load i32*, i32** %12
%26 = bitcast i32* %25 to i8*
%27 = load i32**, i32*** %11
%28 = bitcast i32** %27 to i8*
ret void
}

LLVM IR (-O2):
define void @free_imatrix(i32** nocapture %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i32*, i32** %0, i64 %6
%8 = load i32*, i32** %7
%9 = sext i32 %3 to i64
%10 = getelementptr inbounds i32, i32* %8, i64 %9
%11 = bitcast i32* %10 to i8*
tail call void @free(i8* %11)
%12 = bitcast i32** %7 to i8*
tail call void @free(i8* %12)
ret void
}
void wpas_p2p_wps_failed(struct wpa_supplicant *wpa_s,
                         struct wps_event_fail *fail) {}


x86 assembly (clang, -O0):
<wpas_p2p_wps_failed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpas_p2p_wps_failed>:
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
%struct.wps_event_fail = type opaque
define void @wpas_p2p_wps_failed(%struct.wpa_supplicant* %0, %struct.wps_event_fail* %1) {
%3 = alloca %struct.wpa_supplicant*
%4 = alloca %struct.wps_event_fail*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %3
store %struct.wps_event_fail* %1, %struct.wps_event_fail** %4
ret void
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
%struct.wps_event_fail = type opaque
define void @wpas_p2p_wps_failed(%struct.wpa_supplicant* nocapture %0, %struct.wps_event_fail* nocapture %1) {
ret void
}
/* Variables and functions */
int findZygote();
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ strace(int, char *);
int /*<<< orphan*/ system(char *, char *);
void watchAndStraceZygote() {
  system("rm -f %s", "/data/local/tmp/strace.txt");
  int pid = findZygote();
  char *straceResult = "/data/local/tmp/strace.txt";
  strace(pid, straceResult);
  printf("zygote pid is %d\n", pid);
}


x86 assembly (clang, -O0):
<watchAndStraceZygote>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xeb1(%rip),%rdi
lea    0xeb3(%rip),%rsi
call   1040 <system@plt>
mov    $0x0,%al
call   1030 <findZygote@plt>
mov    %eax,-0x4(%rbp)
lea    0xe9d(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1060 <strace@plt>
mov    -0x4(%rbp),%esi
lea    0xe9e(%rip),%rdi
call   1050 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<watchAndStraceZygote>:
push   %rbp
push   %rbx
push   %rax
lea    0xeb6(%rip),%rdi
lea    0xeb8(%rip),%rbx
mov    %rbx,%rsi
call   1040 <system@plt>
xor    %eax,%eax
call   1030 <findZygote@plt>
mov    %eax,%ebp
mov    %eax,%edi
mov    %rbx,%rsi
call   1060 <strace@plt>
lea    0xeb1(%rip),%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"rm -f %s\00"
@.str.1 = [27 x i8] c"/data/local/tmp/strace.txt\00"
@.str.2 = [18 x i8] c"zygote pid is %d\0A\00"
define void @watchAndStraceZygote() {
%1 = alloca i32
%2 = alloca i8*
%3 = call i32 @system(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 (...) @findZygote()
store i32 %4, i32* %1
store i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8** %2
%5 = load i32, i32* %1
%6 = load i8*, i8** %2
%7 = call i32 @strace(i32 %5, i8* %6)
%8 = load i32, i32* %1
%9 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0), i32 %8)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"rm -f %s\00"
@.str.1 = [27 x i8] c"/data/local/tmp/strace.txt\00"
@.str.2 = [18 x i8] c"zygote pid is %d\0A\00"
define void @watchAndStraceZygote() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 (...) @findZygote()
%3 = tail call i32 @strace(i32 %2, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.2, i64 0, i64 0), i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ trainer_sdt_1(int /*<<< orphan*/);
void trainer_sdt_1_launcher(void) { trainer_sdt_1(0); }


x86 assembly (clang, -O0):
<trainer_sdt_1_launcher>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <trainer_sdt_1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<trainer_sdt_1_launcher>:
xor    %edi,%edi
jmp    1030 <trainer_sdt_1@plt>

LLVM IR (-O0):
define void @trainer_sdt_1_launcher() {
%1 = call i32 @trainer_sdt_1(i32 0)
ret void
}

LLVM IR (-O2):
define void @trainer_sdt_1_launcher() {
%1 = tail call i32 @trainer_sdt_1(i32 0)
ret void
}
/* Variables and functions */
int f245(int *);
int f246(int *p) { return f245(p); }


x86 assembly (clang, -O0):
<f246>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f245@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f246>:
jmp    1030 <f245@plt>

LLVM IR (-O0):
define i32 @f246(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f245(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f246(i32* %0) {
%2 = tail call i32 @f245(i32* %0)
ret i32 %2
}
void PWMIntFlagClear(unsigned long ulBase, unsigned long ulChannel,
                     unsigned long ulIntType) {
  ;
  ;
  ;
  if (ulIntType == 0x00000001) {
    (*((volatile unsigned long *)(ulBase + 0x00000010))) &= ~ulIntType;
  } else {
    (*((volatile unsigned long *)(ulBase + 0x00000010))) &=
        ~(0x00000002 << ulChannel);
  }
}


x86 assembly (clang, -O0):
<PWMIntFlagClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x1,-0x18(%rbp)
jne    1137 <PWMIntFlagClear+0x37>
mov    -0x18(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x10(%rax)
jmp    1159 <PWMIntFlagClear+0x59>
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    $0x2,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMIntFlagClear>:
mov    %rsi,%rcx
mov    $0x2,%eax
shl    %cl,%eax
cmp    $0x1,%rdx
not    %eax
cltq
mov    $0xfffffffffffffffe,%rcx
cmovne %rax,%rcx
and    %rcx,0x10(%rdi)
ret

LLVM IR (-O0):
define void @PWMIntFlagClear(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = icmp eq i64 %7, 1
br i1 %8, label %9, label %17
9: ; preds = %3
%10 = load i64, i64* %6
%11 = xor i64 %10, -1
%12 = load i64, i64* %4
%13 = add i64 %12, 16
%14 = inttoptr i64 %13 to i64*
%15 = load volatile i64, i64* %14
%16 = and i64 %15, %11
store volatile i64 %16, i64* %14
br label %28
17: ; preds = %3
%18 = load i64, i64* %5
%19 = trunc i64 %18 to i32
%20 = shl i32 2, %19
%21 = xor i32 %20, -1
%22 = sext i32 %21 to i64
%23 = load i64, i64* %4
%24 = add i64 %23, 16
%25 = inttoptr i64 %24 to i64*
%26 = load volatile i64, i64* %25
%27 = and i64 %26, %22
store volatile i64 %27, i64* %25
br label %28
28: ; preds = %17, %9
ret void
}

LLVM IR (-O2):
define void @PWMIntFlagClear(i64 %0, i64 %1, i64 %2) {
%4 = icmp eq i64 %2, 1
%5 = trunc i64 %1 to i32
%6 = shl i32 2, %5
%7 = xor i32 %6, -1
%8 = sext i32 %7 to i64
%9 = select i1 %4, i64 -2, i64 %8
%10 = add i64 %0, 16
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = and i64 %12, %9
store volatile i64 %13, i64* %11
ret void
}
char getch() { return -1; }


x86 assembly (clang, -O0):
<getch>:
push   %rbp
mov    %rsp,%rbp
mov    $0xff,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getch>:
mov    $0xff,%al
ret

LLVM IR (-O0):
define signext i8 @getch() {
ret i8 -1
}

LLVM IR (-O2):
define signext i8 @getch() {
ret i8 -1
}
void BN_sqr(void) {}


x86 assembly (clang, -O0):
<BN_sqr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_sqr>:
ret

LLVM IR (-O0):
define void @BN_sqr() {
ret void
}

LLVM IR (-O2):
define void @BN_sqr() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pdccerror(int, int /*<<< orphan*/);
int pdccclosed(int usern) {
  pdccerror(usern, 0);
  return 0x0;
}


x86 assembly (clang, -O0):
<pdccclosed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <pdccerror@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pdccclosed>:
push   %rax
xor    %esi,%esi
call   1030 <pdccerror@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @pdccclosed(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @pdccerror(i32 %3, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @pdccclosed(i32 %0) {
%2 = tail call i32 @pdccerror(i32 %0, i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void weakBrace2(void) { printf("redefine"); }


x86 assembly (clang, -O0):
<weakBrace2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<weakBrace2>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"redefine\00"
define void @weakBrace2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"redefine\00"
define void @weakBrace2() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}
void __attribute__((warning(
    "curl_easy_setopt expects a curl_ioctl_callback argument for this option")))
__attribute__((unused)) __attribute__((no))
_curl_easy_setopt_err_ioctl_cb(void) {
  __asm__("");
}


x86 assembly (clang, -O0):
<_curl_easy_setopt_err_ioctl_cb>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_curl_easy_setopt_err_ioctl_cb>:
ret

LLVM IR (-O0):
define void @_curl_easy_setopt_err_ioctl_cb() {
ret void
}

LLVM IR (-O2):
define void @_curl_easy_setopt_err_ioctl_cb() {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void sleep_ms(unsigned int ms) { usleep(1000 * ms); }


x86 assembly (clang, -O0):
<sleep_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep_ms>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @sleep_ms(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 1000, %3
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @sleep_ms(i32 %0) {
%2 = mul i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dgetrf_(int *, int *, double *, int *, int *, int *);
int lufac(int N, double *A) {
  int info;
  int lda = N;
  int ipiv[N];
  dgetrf_(&N, &N, A, &lda, ipiv, &info);
  return info;
}


x86 assembly (clang, -O0):
<lufac>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x20(%rbp)
lea    0xf(,%rax,4),%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%r8
sub    %rcx,%r8
mov    %r8,%rsp
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdx
lea    -0x4(%rbp),%rsi
lea    -0x18(%rbp),%rcx
lea    -0x14(%rbp),%r9
mov    %rsi,%rdi
call   1030 <dgetrf_@plt>
mov    -0x14(%rbp),%eax
mov    -0x20(%rbp),%rcx
mov    %rcx,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lufac>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
sub    $0x18,%rsp
mov    %rsi,%rdx
mov    %rsp,%rbx
mov    %edi,-0x14(%rbp)
mov    %edi,-0xc(%rbp)
mov    %edi,%eax
mov    %rsp,%r8
lea    0xf(,%rax,4),%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%r8
mov    %r8,%rsp
lea    -0x14(%rbp),%rdi
lea    -0xc(%rbp),%rcx
lea    -0x10(%rbp),%r9
mov    %rdi,%rsi
call   1030 <dgetrf_@plt>
mov    -0x10(%rbp),%eax
mov    %rbx,%rsp
lea    -0x8(%rbp),%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @lufac(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i64
store i32 %0, i32* %3
store double* %1, double** %4
%9 = load i32, i32* %3
store i32 %9, i32* %6
%10 = load i32, i32* %3
%11 = zext i32 %10 to i64
%12 = call i8* @llvm.stacksave()
store i8* %12, i8** %7
%13 = alloca i32, i64 %11
store i64 %11, i64* %8
%14 = load double*, double** %4
%15 = call i32 @dgetrf_(i32* %3, i32* %3, double* %14, i32* %6, i32* %13, i32* %5)
%16 = load i32, i32* %5
%17 = load i8*, i8** %7
ret i32 %16
}

LLVM IR (-O2):
define i32 @lufac(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = bitcast i32* %4 to i8*
%7 = bitcast i32* %5 to i8*
store i32 %0, i32* %5
%8 = zext i32 %0 to i64
%9 = tail call i8* @llvm.stacksave()
%10 = alloca i32, i64 %8
%11 = call i32 @dgetrf_(i32* %3, i32* %3, double* %1, i32* %5, i32* %10, i32* %4)
%12 = load i32, i32* %4
ret i32 %12
}
/* Variables and functions */
int fork();
int /*<<< orphan*/ warn(char *);
int dofork(void) {
  int pid;
  pid = fork();
  if (pid < 0) {
    warn("fork");
  }
  return pid;
}


x86 assembly (clang, -O0):
<dofork>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <fork@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1148 <dofork+0x28>
lea    0xebd(%rip),%rdi
call   1030 <warn@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dofork>:
push   %rbx
xor    %eax,%eax
call   1040 <fork@plt>
mov    %eax,%ebx
test   %eax,%eax
jns    113a <dofork+0x1a>
lea    0xecb(%rip),%rdi
call   1030 <warn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fork\00"
define i32 @dofork() {
%1 = alloca i32
%2 = call i32 (...) @fork()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @warn(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %0
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@.str = [5 x i8] c"fork\00"
define i32 @dofork() {
%1 = tail call i32 (...) @fork()
%2 = icmp slt i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @warn(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %0
ret i32 %1
}
unsigned GetBlue(const unsigned int color) { return ((color & 0x000000FF)); }


x86 assembly (clang, -O0):
<GetBlue>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetBlue>:
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @GetBlue(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
ret i32 %4
}

LLVM IR (-O2):
define i32 @GetBlue(i32 %0) {
%2 = and i32 %0, 255
ret i32 %2
}
void ADCConverLenSet(unsigned long ulBase, unsigned long ulSeqRegLen,
                     unsigned long ulSeqInjLen) {
  ;
  ;
  ;
  (*((volatile unsigned long *)(ulBase + 0x0000002C))) &= ~0x00F00000;
  (*((volatile unsigned long *)(ulBase + 0x0000002C))) |=
      ((ulSeqRegLen - 1) << 20);
  (*((volatile unsigned long *)(ulBase + 0x00000038))) &= ~0x00300000;
  (*((volatile unsigned long *)(ulBase + 0x00000038))) |=
      ((ulSeqInjLen - 1) << 20);
}


x86 assembly (clang, -O0):
<ADCConverLenSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2c(%rax),%rcx
and    $0xffffffffff0fffff,%rcx
mov    %rcx,0x2c(%rax)
mov    -0x10(%rbp),%rdx
sub    $0x1,%rdx
shl    $0x14,%rdx
mov    -0x8(%rbp),%rax
mov    0x2c(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x2c(%rax)
mov    -0x8(%rbp),%rax
mov    0x38(%rax),%rcx
and    $0xffffffffffcfffff,%rcx
mov    %rcx,0x38(%rax)
mov    -0x18(%rbp),%rdx
sub    $0x1,%rdx
shl    $0x14,%rdx
mov    -0x8(%rbp),%rax
mov    0x38(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x38(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCConverLenSet>:
andq   $0xffffffffff0fffff,0x2c(%rdi)
ff
shl    $0x14,%rsi
add    $0xfffffffffff00000,%rsi
or     %rsi,0x2c(%rdi)
andq   $0xffffffffffcfffff,0x38(%rdi)
ff
shl    $0x14,%rdx
add    $0xfffffffffff00000,%rdx
or     %rdx,0x38(%rdi)
ret

LLVM IR (-O0):
define void @ADCConverLenSet(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = add i64 %7, 44
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = and i64 %10, -15728641
store volatile i64 %11, i64* %9
%12 = load i64, i64* %5
%13 = sub i64 %12, 1
%14 = shl i64 %13, 20
%15 = load i64, i64* %4
%16 = add i64 %15, 44
%17 = inttoptr i64 %16 to i64*
%18 = load volatile i64, i64* %17
%19 = or i64 %18, %14
store volatile i64 %19, i64* %17
%20 = load i64, i64* %4
%21 = add i64 %20, 56
%22 = inttoptr i64 %21 to i64*
%23 = load volatile i64, i64* %22
%24 = and i64 %23, -3145729
store volatile i64 %24, i64* %22
%25 = load i64, i64* %6
%26 = sub i64 %25, 1
%27 = shl i64 %26, 20
%28 = load i64, i64* %4
%29 = add i64 %28, 56
%30 = inttoptr i64 %29 to i64*
%31 = load volatile i64, i64* %30
%32 = or i64 %31, %27
store volatile i64 %32, i64* %30
ret void
}

LLVM IR (-O2):
define void @ADCConverLenSet(i64 %0, i64 %1, i64 %2) {
%4 = add i64 %0, 44
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -15728641
store volatile i64 %7, i64* %5
%8 = shl i64 %1, 20
%9 = add i64 %8, -1048576
%10 = load volatile i64, i64* %5
%11 = or i64 %10, %9
store volatile i64 %11, i64* %5
%12 = add i64 %0, 56
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = and i64 %14, -3145729
store volatile i64 %15, i64* %13
%16 = shl i64 %2, 20
%17 = add i64 %16, -1048576
%18 = load volatile i64, i64* %13
%19 = or i64 %18, %17
store volatile i64 %19, i64* %13
ret void
}
/* Variables and functions */
int scm_page_level(long long);
long long scm_page_root(long long i) {
  long long n = 1LL << (2 * scm_page_level(i));
  return (i - 2 * (n - 1)) / n;
}


x86 assembly (clang, -O0):
<scm_page_root>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <scm_page_level@plt>
shl    $0x1,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
shl    $0x1,%rcx
sub    %rcx,%rax
cqto
idivq  -0x10(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scm_page_root>:
push   %rbx
mov    %rdi,%rbx
call   1030 <scm_page_level@plt>
mov    %eax,%ecx
add    %ecx,%ecx
mov    $0x1,%esi
shl    %cl,%rsi
mov    $0xfffffffffffffffe,%rax
shl    %cl,%rax
add    %rbx,%rax
add    $0x2,%rax
mov    %rax,%rdx
bts    %rcx,%rdx
shr    $0x20,%rdx
je     114a <scm_page_root+0x3a>
cqto
idiv   %rsi
pop    %rbx
ret
xor    %edx,%edx
div    %esi
pop    %rbx
ret

LLVM IR (-O0):
define i64 @scm_page_root(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i32 @scm_page_level(i64 %4)
%6 = mul nsw i32 2, %5
%7 = zext i32 %6 to i64
%8 = shl i64 1, %7
store i64 %8, i64* %3
%9 = load i64, i64* %2
%10 = load i64, i64* %3
%11 = sub nsw i64 %10, 1
%12 = mul nsw i64 2, %11
%13 = sub nsw i64 %9, %12
%14 = load i64, i64* %3
%15 = sdiv i64 %13, %14
ret i64 %15
}

LLVM IR (-O2):
define i64 @scm_page_root(i64 %0) {
%2 = tail call i32 @scm_page_level(i64 %0)
%3 = shl nsw i32 %2, 1
%4 = zext i32 %3 to i64
%5 = shl nuw i64 1, %4
%6 = shl i64 -2, %4
%7 = add i64 %0, 2
%8 = add i64 %7, %6
%9 = sdiv i64 %8, %5
ret i64 %9
}
/* Variables and functions */
int fun_2(int, int);
int main() { return fun_2(12, 13); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xc,%edi
mov    $0xd,%esi
call   1030 <fun_2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xc,%edi
mov    $0xd,%esi
jmp    1030 <fun_2@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @fun_2(i32 12, i32 13)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @fun_2(i32 12, i32 13)
ret i32 %1
}
/* Variables and functions */
char *libamg_sip_get_transport_name(int transport_code) {
  switch (transport_code) {
  case 0:
    return "udp";
    break;
  case 1:
    return "tcp";
    break;
  default:
    return NULL;
    break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<libamg_sip_get_transport_name>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     112b <libamg_sip_get_transport_name+0x2b>
jmp    111a <libamg_sip_get_transport_name+0x1a>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     113b <libamg_sip_get_transport_name+0x3b>
jmp    114b <libamg_sip_get_transport_name+0x4b>
lea    0xece(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <libamg_sip_get_transport_name+0x53>
lea    0xec2(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <libamg_sip_get_transport_name+0x53>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libamg_sip_get_transport_name>:
xor    %ecx,%ecx
cmp    $0x1,%edi
lea    0xef8(%rip),%rax
cmove  %rax,%rcx
test   %edi,%edi
lea    0xee7(%rip),%rax
cmovne %rcx,%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"udp\00"
@.str.1 = [4 x i8] c"tcp\00"
define i8* @libamg_sip_get_transport_name(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 0, label %5
i32 1, label %6
]
5: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
6: ; preds = %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* null, i8** %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [4 x i8] c"udp\00"
@.str.1 = [4 x i8] c"tcp\00"
define i8* @libamg_sip_get_transport_name(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* null
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %5
}
XNextEvent() {}


x86 assembly (clang, -O0):
<XNextEvent>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XNextEvent>:
ret

LLVM IR (-O0):
define i32 @XNextEvent() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XNextEvent() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x5e() {
  Assert_real((isodigit(94) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              475, ("isodigit should be 0 for ^"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x5e>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5e,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1db,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x5e>:
push   %rax
mov    $0x5e,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x1db,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for ^\00"
define void @t_isodigit_0x5e() {
%1 = call i64 @isodigit(i32 94)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 475, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for ^\00"
define void @t_isodigit_0x5e() {
%1 = tail call i64 @isodigit(i32 94)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 475, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TTWAIN_InitVar();
int TTWAIN_LoadSourceManagerPD();
int TTWAIN_LoadSourceManager(void) {
  TTWAIN_InitVar();
  return TTWAIN_LoadSourceManagerPD();
}


x86 assembly (clang, -O0):
<TTWAIN_LoadSourceManager>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <TTWAIN_InitVar@plt>
mov    $0x0,%al
call   1040 <TTWAIN_LoadSourceManagerPD@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TTWAIN_LoadSourceManager>:
push   %rax
xor    %eax,%eax
call   1030 <TTWAIN_InitVar@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <TTWAIN_LoadSourceManagerPD@plt>

LLVM IR (-O0):
define i32 @TTWAIN_LoadSourceManager() {
%1 = call i32 (...) @TTWAIN_InitVar()
%2 = call i32 (...) @TTWAIN_LoadSourceManagerPD()
ret i32 %2
}

LLVM IR (-O2):
define i32 @TTWAIN_LoadSourceManager() {
%1 = tail call i32 (...) @TTWAIN_InitVar()
%2 = tail call i32 (...) @TTWAIN_LoadSourceManagerPD()
ret i32 %2
}
/* Variables and functions */
char func();
long main() {
  char **strstar;
  char *str;
  long num;
  str = "some long string";
  num = str[1];
  str[1] = func();
  str[1 + 3] = str[2];
  str['a'] = 'b';
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbq 0x1(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    $0x0,%al
call   1030 <func@plt>
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x18(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x4(%rax)
mov    -0x18(%rbp),%rax
movb   $0x62,0x61(%rax)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <func@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"some long string\00"
define i64 @main() {
%1 = alloca i64
%2 = alloca i8**
%3 = alloca i8*
%4 = alloca i64
store i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %6
%8 = sext i8 %7 to i64
store i64 %8, i64* %4
%9 = call signext i8 (...) @func()
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 1
store i8 %9, i8* %11
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i64 2
%14 = load i8, i8* %13
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 4
store i8 %14, i8* %16
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i64 97
store i8 98, i8* %18
%19 = load i64, i64* %1
ret i64 %19
}

LLVM IR (-O2):
define i64 @main() {
%1 = tail call signext i8 (...) @func()
ret i64 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ readmembl(scalar_t__);
uint8_t readmemb386l(uint32_t seg, uint32_t addr) {
  return readmembl(addr + seg);
}


x86 assembly (clang, -O0):
<readmemb386l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    -0x8(%rbp),%rdi
call   1030 <readmembl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readmemb386l>:
add    %rsi,%rdi
jmp    1030 <readmembl@plt>

LLVM IR (-O0):
define i32 @readmemb386l(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add nsw i64 %5, %6
%8 = call i32 @readmembl(i64 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @readmemb386l(i64 %0, i64 %1) {
%3 = add nsw i64 %1, %0
%4 = tail call i32 @readmembl(i64 %3)
ret i32 %4
}
/* Variables and functions */
size_t align_offset(size_t offset, size_t align) {
  size_t rem = offset % align;
  if (!rem) {
    return offset;
  }
  return offset + align - rem;
}


x86 assembly (clang, -O0):
<align_offset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1134 <align_offset+0x34>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1144 <align_offset+0x44>
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
sub    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<align_offset>:
mov    %rdi,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     1116 <align_offset+0x16>
mov    %rdi,%rax
xor    %edx,%edx
div    %rsi
jmp    111c <align_offset+0x1c>
mov    %edi,%eax
xor    %edx,%edx
div    %esi
add    %rdi,%rsi
sub    %rdx,%rsi
test   %rdx,%rdx
cmove  %rdi,%rsi
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @align_offset(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = urem i64 %7, %8
store i64 %9, i64* %6
%10 = load i64, i64* %6
%11 = icmp ne i64 %10, 0
br i1 %11, label %14, label %12
12: ; preds = %2
%13 = load i64, i64* %4
store i64 %13, i64* %3
br label %20
14: ; preds = %2
%15 = load i64, i64* %4
%16 = load i64, i64* %5
%17 = add i64 %15, %16
%18 = load i64, i64* %6
%19 = sub i64 %17, %18
store i64 %19, i64* %3
br label %20
20: ; preds = %14, %12
%21 = load i64, i64* %3
ret i64 %21
}

LLVM IR (-O2):
define i64 @align_offset(i64 %0, i64 %1) {
%3 = urem i64 %0, %1
%4 = icmp eq i64 %3, 0
%5 = add i64 %1, %0
%6 = sub i64 %5, %3
%7 = select i1 %4, i64 %0, i64 %6
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
int /*<<< orphan*/ t1();
int /*<<< orphan*/ t2();
int /*<<< orphan*/ t3();
int /*<<< orphan*/ t4();
int /*<<< orphan*/ t5();
int /*<<< orphan*/ t6();
int /*<<< orphan*/ t7();
void testmain() {
  print("array");
  t1();
  t2();
  t3();
  t4();
  t5();
  t6();
  t7();
}


x86 assembly (clang, -O0):
<testmain>:
push   %rbp
mov    %rsp,%rbp
lea    0xe75(%rip),%rdi
call   1070 <print@plt>
mov    $0x0,%al
call   1030 <t1@plt>
mov    $0x0,%al
call   1080 <t2@plt>
mov    $0x0,%al
call   1040 <t3@plt>
mov    $0x0,%al
call   1090 <t4@plt>
mov    $0x0,%al
call   1050 <t5@plt>
mov    $0x0,%al
call   10a0 <t6@plt>
mov    $0x0,%al
call   1060 <t7@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testmain>:
push   %rax
lea    0xe78(%rip),%rdi
call   1070 <print@plt>
xor    %eax,%eax
call   1030 <t1@plt>
xor    %eax,%eax
call   1080 <t2@plt>
xor    %eax,%eax
call   1040 <t3@plt>
xor    %eax,%eax
call   1090 <t4@plt>
xor    %eax,%eax
call   1050 <t5@plt>
xor    %eax,%eax
call   10a0 <t6@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <t7@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"array\00"
define void @testmain() {
%1 = call i32 @print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @t1()
%3 = call i32 (...) @t2()
%4 = call i32 (...) @t3()
%5 = call i32 (...) @t4()
%6 = call i32 (...) @t5()
%7 = call i32 (...) @t6()
%8 = call i32 (...) @t7()
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"array\00"
define void @testmain() {
%1 = tail call i32 @print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @t1()
%3 = tail call i32 (...) @t2()
%4 = tail call i32 (...) @t3()
%5 = tail call i32 (...) @t4()
%6 = tail call i32 (...) @t5()
%7 = tail call i32 (...) @t6()
%8 = tail call i32 (...) @t7()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x2b() {
  Assert_real((isalnum(43) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              220, ("isalnum should be 0 for +"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x2b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2b,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xdc,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x2b>:
push   %rax
mov    $0x2b,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xdc,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 0 for +\00"
define void @t_isalnum_0x2b() {
%1 = call i64 @isalnum(i32 43)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 220, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 0 for +\00"
define void @t_isalnum_0x2b() {
%1 = tail call i64 @isalnum(i32 43)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 220, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo(int /*<<< orphan*/);
__attribute__((no, noclone)) unsigned short f25(unsigned short x,
                                                unsigned short y) {
  unsigned short r = 2U - x;
  if (r > 2U)
    foo(0);
  return r;
}


x86 assembly (clang, -O0):
<f25>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%ecx
mov    $0x2,%eax
sub    %ecx,%eax
mov    %ax,-0x6(%rbp)
movzwl -0x6(%rbp),%eax
cmp    $0x2,%eax
jbe    1149 <f25+0x39>
xor    %edi,%edi
call   1030 <foo@plt>
movzwl -0x6(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f25>:
push   %rbx
mov    %edi,%ebx
cmp    $0x3,%bx
jb     1120 <f25+0x10>
xor    %edi,%edi
call   1030 <foo@plt>
mov    $0x2,%eax
sub    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i16 @f25(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
%5 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%6 = load i16, i16* %3
%7 = zext i16 %6 to i32
%8 = sub i32 2, %7
%9 = trunc i32 %8 to i16
store i16 %9, i16* %5
%10 = load i16, i16* %5
%11 = zext i16 %10 to i32
%12 = icmp ugt i32 %11, 2
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = call i32 @foo(i32 0)
br label %15
15: ; preds = %13, %2
%16 = load i16, i16* %5
ret i16 %16
}

LLVM IR (-O2):
define zeroext i16 @f25(i16 zeroext %0, i16 zeroext %1) {
%3 = icmp ugt i16 %0, 2
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @foo(i32 0)
br label %6
6: ; preds = %4, %2
%7 = sub i16 2, %0
ret i16 %7
}
/* Variables and functions */
int /*<<< orphan*/ VDP_drawText(char *, int, int);
int /*<<< orphan*/ VDP_init();
int /*<<< orphan*/ showExceptionDump(int);
void _zerodivide_callback() {
  VDP_init();
  VDP_drawText("DIVIDE BY ZERO !", 10, 3);
  showExceptionDump(5);
  while (1)
    ;
}


x86 assembly (clang, -O0):
<_zerodivide_callback>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <VDP_init@plt>
lea    0xebe(%rip),%rdi
mov    $0xa,%esi
mov    $0x3,%edx
call   1050 <VDP_drawText@plt>
mov    $0x5,%edi
call   1040 <showExceptionDump@plt>
jmp    115b <_zerodivide_callback+0x2b>

x86 assembly (clang, -O2):
<_zerodivide_callback>:
push   %rax
xor    %eax,%eax
call   1030 <VDP_init@plt>
lea    0xec1(%rip),%rdi
mov    $0xa,%esi
mov    $0x3,%edx
call   1050 <VDP_drawText@plt>
mov    $0x5,%edi
call   1040 <showExceptionDump@plt>
nopl   0x0(%rax,%rax,1)
jmp    1160 <_zerodivide_callback+0x30>

LLVM IR (-O0):
@.str = [17 x i8] c"DIVIDE BY ZERO !\00"
define void @_zerodivide_callback() {
%1 = call i32 (...) @VDP_init()
%2 = call i32 @VDP_drawText(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 10, i32 3)
%3 = call i32 @showExceptionDump(i32 5)
br label %4
4: ; preds = %0, %4
br label %4
}

LLVM IR (-O2):
@.str = [17 x i8] c"DIVIDE BY ZERO !\00"
define void @_zerodivide_callback() {
%1 = tail call i32 (...) @VDP_init()
%2 = tail call i32 @VDP_drawText(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 10, i32 3)
%3 = tail call i32 @showExceptionDump(i32 5)
br label %4
4: ; preds = %0, %4
br label %4
}
void check_cycle_length_max(int *cycle_length, int *cycle_length_max) {
  if (*cycle_length > *cycle_length_max)
    *cycle_length_max = *cycle_length;
}


x86 assembly (clang, -O0):
<check_cycle_length_max>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
jle    112a <check_cycle_length_max+0x2a>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_cycle_length_max>:
mov    (%rdi),%eax
cmp    (%rsi),%eax
jle    1108 <check_cycle_length_max+0x8>
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @check_cycle_length_max(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = icmp sgt i32 %6, %8
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32*, i32** %3
%12 = load i32, i32* %11
%13 = load i32*, i32** %4
store i32 %12, i32* %13
br label %14
14: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
define void @check_cycle_length_max(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = icmp sgt i32 %3, %4
br i1 %5, label %6, label %7
6: ; preds = %2
store i32 %3, i32* %1
br label %7
7: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cPrintf(char *);
void help09(void) {
  cPrintf("  r                 show all registers\n");
  cPrintf("  r  <reg>          show register <reg>\n");
  cPrintf("  r  <reg> <data>   set register <reg> to <data>\n");
}


x86 assembly (clang, -O0):
<help09>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <cPrintf@plt>
lea    0xf01(%rip),%rdi
call   1030 <cPrintf@plt>
lea    0xf1e(%rip),%rdi
call   1030 <cPrintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help09>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <cPrintf@plt>
lea    0xf04(%rip),%rdi
call   1030 <cPrintf@plt>
lea    0xf21(%rip),%rdi
pop    %rax
jmp    1030 <cPrintf@plt>

LLVM IR (-O0):
@.str = [40 x i8] c" r show all registers\0A\00"
@.str.1 = [41 x i8] c" r <reg> show register <reg>\0A\00"
@.str.2 = [50 x i8] c" r <reg> <data> set register <reg> to <data>\0A\00"
define void @help09() {
%1 = call i32 @cPrintf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @cPrintf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @cPrintf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [40 x i8] c" r show all registers\0A\00"
@.str.1 = [41 x i8] c" r <reg> show register <reg>\0A\00"
@.str.2 = [50 x i8] c" r <reg> <data> set register <reg> to <data>\0A\00"
define void @help09() {
%1 = tail call i32 @cPrintf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @cPrintf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @cPrintf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str.2, i64 0, i64 0))
ret void
}
int do_312() { return 312; }


x86 assembly (clang, -O0):
<do_312>:
push   %rbp
mov    %rsp,%rbp
mov    $0x138,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_312>:
mov    $0x138,%eax
ret

LLVM IR (-O0):
define i32 @do_312() {
ret i32 312
}

LLVM IR (-O2):
define i32 @do_312() {
ret i32 312
}
/* Variables and functions */
int /*<<< orphan*/ cli();
void irqdisable() { cli(); }


x86 assembly (clang, -O0):
<irqdisable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cli@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<irqdisable>:
xor    %eax,%eax
jmp    1030 <cli@plt>

LLVM IR (-O0):
define void @irqdisable() {
%1 = call i32 (...) @cli()
ret void
}

LLVM IR (-O2):
define void @irqdisable() {
%1 = tail call i32 (...) @cli()
ret void
}
void swap_on_puzzle(int *matrix, int x, int y, int new_x, int new_y) {
  int aux = matrix[x * 4 + y];
  matrix[x * 4 + y] = matrix[new_x * 4 + new_y];
  matrix[new_x * 4 + new_y] = aux;
}


x86 assembly (clang, -O0):
<swap_on_puzzle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
shl    $0x2,%ecx
add    -0x10(%rbp),%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
shl    $0x2,%ecx
add    -0x18(%rbp),%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
shl    $0x2,%ecx
add    -0x10(%rbp),%ecx
movslq %ecx,%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x1c(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
shl    $0x2,%ecx
add    -0x18(%rbp),%ecx
movslq %ecx,%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap_on_puzzle>:
lea    (%rdx,%rsi,4),%eax
cltq
mov    (%rdi,%rax,4),%edx
lea    (%r8,%rcx,4),%ecx
movslq %ecx,%rcx
mov    (%rdi,%rcx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %edx,(%rdi,%rcx,4)
ret

LLVM IR (-O0):
define void @swap_on_puzzle(i32* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load i32*, i32** %6
%13 = load i32, i32* %7
%14 = mul nsw i32 %13, 4
%15 = load i32, i32* %8
%16 = add nsw i32 %14, %15
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %12, i64 %17
%19 = load i32, i32* %18
store i32 %19, i32* %11
%20 = load i32*, i32** %6
%21 = load i32, i32* %9
%22 = mul nsw i32 %21, 4
%23 = load i32, i32* %10
%24 = add nsw i32 %22, %23
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %20, i64 %25
%27 = load i32, i32* %26
%28 = load i32*, i32** %6
%29 = load i32, i32* %7
%30 = mul nsw i32 %29, 4
%31 = load i32, i32* %8
%32 = add nsw i32 %30, %31
%33 = sext i32 %32 to i64
%34 = getelementptr inbounds i32, i32* %28, i64 %33
store i32 %27, i32* %34
%35 = load i32, i32* %11
%36 = load i32*, i32** %6
%37 = load i32, i32* %9
%38 = mul nsw i32 %37, 4
%39 = load i32, i32* %10
%40 = add nsw i32 %38, %39
%41 = sext i32 %40 to i64
%42 = getelementptr inbounds i32, i32* %36, i64 %41
store i32 %35, i32* %42
ret void
}

LLVM IR (-O2):
define void @swap_on_puzzle(i32* nocapture %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = shl nsw i32 %1, 2
%7 = add nsw i32 %6, %2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = shl nsw i32 %3, 2
%12 = add nsw i32 %11, %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %0, i64 %13
%15 = load i32, i32* %14
store i32 %15, i32* %9
store i32 %10, i32* %14
ret void
}