xunge/DecIR huggingface dataset:
/* Variables and functions */
int inverse(int, int);
int mod(int, int);
int divide(int x, int y, int base) {
  int i;
  i = inverse(base, y);
  if (i == -1)
    return -1;
  return mod(x * i, base);
}


x86 assembly (clang, -O0):
<divide>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1040 <inverse@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
jne    1155 <divide+0x35>
movl   $0xffffffff,-0x4(%rbp)
jmp    1167 <divide+0x47>
mov    -0x8(%rbp),%edi
imul   -0x14(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <mod@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<divide>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %edi,%ebp
mov    %edx,%edi
call   1040 <inverse@plt>
cmp    $0xffffffff,%eax
je     1145 <divide+0x25>
imul   %ebp,%eax
mov    %eax,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <mod@plt>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @divide(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = call i32 @inverse(i32 %9, i32 %10)
store i32 %11, i32* %8
%12 = load i32, i32* %8
%13 = icmp eq i32 %12, -1
br i1 %13, label %14, label %15
14: ; preds = %3
store i32 -1, i32* %4
br label %21
15: ; preds = %3
%16 = load i32, i32* %5
%17 = load i32, i32* %8
%18 = mul nsw i32 %16, %17
%19 = load i32, i32* %7
%20 = call i32 @mod(i32 %18, i32 %19)
store i32 %20, i32* %4
br label %21
21: ; preds = %15, %14
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @divide(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @inverse(i32 %2, i32 %1)
%5 = icmp eq i32 %4, -1
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = mul nsw i32 %4, %0
%8 = tail call i32 @mod(i32 %7, i32 %2)
br label %9
9: ; preds = %3, %6
%10 = phi i32 [ %8, %6 ], [ -1, %3 ]
ret i32 %10
}
void Cpu_OnNMIINT(void) {}


x86 assembly (clang, -O0):
<Cpu_OnNMIINT>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cpu_OnNMIINT>:
ret

LLVM IR (-O0):
define void @Cpu_OnNMIINT() {
ret void
}

LLVM IR (-O2):
define void @Cpu_OnNMIINT() {
ret void
}
/* Type definitions */
struct message_s {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ write_head(int, int, int, int /*<<< orphan*/);
int req_open(int sockfd, struct message_s *msg) {
  write_head(sockfd, 0xA2, 1, 0);
  return 0;
}


x86 assembly (clang, -O0):
<req_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xa2,%esi
mov    $0x1,%edx
xor    %ecx,%ecx
call   1030 <write_head@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<req_open>:
push   %rax
mov    $0xa2,%esi
mov    $0x1,%edx
xor    %ecx,%ecx
call   1030 <write_head@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.message_s = type { i32 }
define i32 @req_open(i32 %0, %struct.message_s* %1) {
%3 = alloca i32
%4 = alloca %struct.message_s*
store i32 %0, i32* %3
store %struct.message_s* %1, %struct.message_s** %4
%5 = load i32, i32* %3
%6 = call i32 @write_head(i32 %5, i32 162, i32 1, i32 0)
ret i32 0
}

LLVM IR (-O2):
%struct.message_s = type { i32 }
define i32 @req_open(i32 %0, %struct.message_s* nocapture readnone %1) {
%3 = tail call i32 @write_head(i32 %0, i32 162, i32 1, i32 0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ otrx_create_append_zeros(int /*<<< orphan*/ *, size_t);
ssize_t otrx_create_align(FILE *trx, size_t curr_offset, size_t alignment) {
  if (curr_offset & (alignment - 1)) {
    size_t length = alignment - (curr_offset % alignment);
    return otrx_create_append_zeros(trx, length);
  }
  return 0;
}


x86 assembly (clang, -O0):
<otrx_create_align>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
sub    $0x1,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
je     1171 <otrx_create_align+0x61>
mov    -0x20(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x20(%rbp)
mov    -0x30(%rbp),%rax
sub    %rdx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x28(%rbp),%rsi
call   1030 <otrx_create_append_zeros@plt>
mov    %eax,-0x4(%rbp)
jmp    1178 <otrx_create_align+0x68>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<otrx_create_align>:
lea    -0x1(%rdx),%rax
test   %rsi,%rax
je     1132 <otrx_create_align+0x22>
mov    %rdx,%rcx
mov    %rsi,%rax
or     %rdx,%rax
shr    $0x20,%rax
je     1135 <otrx_create_align+0x25>
mov    %rsi,%rax
xor    %edx,%edx
div    %rcx
jmp    113b <otrx_create_align+0x2b>
xor    %eax,%eax
ret
mov    %esi,%eax
xor    %edx,%edx
div    %ecx
sub    %rdx,%rcx
mov    %rcx,%rsi
jmp    1030 <otrx_create_append_zeros@plt>

LLVM IR (-O0):
define i32 @otrx_create_align(i32* %0, i64 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i32* %0, i32** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%9 = load i64, i64* %6
%10 = load i64, i64* %7
%11 = sub i64 %10, 1
%12 = and i64 %9, %11
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %23
14: ; preds = %3
%15 = load i64, i64* %7
%16 = load i64, i64* %6
%17 = load i64, i64* %7
%18 = urem i64 %16, %17
%19 = sub i64 %15, %18
store i64 %19, i64* %8
%20 = load i32*, i32** %5
%21 = load i64, i64* %8
%22 = call i32 @otrx_create_append_zeros(i32* %20, i64 %21)
store i32 %22, i32* %4
br label %24
23: ; preds = %3
store i32 0, i32* %4
br label %24
24: ; preds = %23, %14
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @otrx_create_align(i32* %0, i64 %1, i64 %2) {
%4 = add i64 %2, -1
%5 = and i64 %4, %1
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %3
%8 = urem i64 %1, %2
%9 = sub i64 %2, %8
%10 = tail call i32 @otrx_create_append_zeros(i32* %0, i64 %9)
br label %11
11: ; preds = %3, %7
%12 = phi i32 [ %10, %7 ], [ 0, %3 ]
ret i32 %12
}
/* Variables and functions */
int foo();
void f4(void) {
  switch (foo())
    break;
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
call   1030 <foo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
xor    %eax,%eax
jmp    1030 <foo@plt>

LLVM IR (-O0):
define void @f4() {
%1 = call i32 (...) @foo()
switch i32 %1, label %2 [
]
2: ; preds = %0
ret void
}

LLVM IR (-O2):
define void @f4() {
%1 = tail call i32 (...) @foo()
ret void
}
/* Variables and functions */
double fabs(double);
bool is_close_dbl(double a, double b) {
  return (fabs(a - b) <= (1.e-8 + 1.e-5 * fabs(b)));
}


x86 assembly (clang, -O0):
<is_close_dbl>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movaps 0xef1(%rip),%xmm0
pand   %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
movaps 0xee1(%rip),%xmm2
pand   %xmm2,%xmm0
movsd  0xec5(%rip),%xmm2
mulsd  %xmm2,%xmm0
movsd  0xec1(%rip),%xmm2
addsd  %xmm2,%xmm0
ucomisd %xmm1,%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_close_dbl>:
subsd  %xmm1,%xmm0
movapd 0xef4(%rip),%xmm2
andpd  %xmm2,%xmm0
andpd  %xmm2,%xmm1
mulsd  0xef4(%rip),%xmm1
addsd  0xef4(%rip),%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
setae  %al
ret

LLVM IR (-O0):
define i32 @is_close_dbl(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double %5, %6
%8 = call double @llvm.fabs.f64(double %7)
%9 = load double, double* %4
%10 = call double @llvm.fabs.f64(double %9)
%11 = call double @llvm.fmuladd.f64(double 1.000000e-05, double %10, double 1.000000e-08)
%12 = fcmp ole double %8, %11
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @is_close_dbl(double %0, double %1) {
%3 = fsub double %0, %1
%4 = tail call double @llvm.fabs.f64(double %3)
%5 = tail call double @llvm.fabs.f64(double %1)
%6 = tail call double @llvm.fmuladd.f64(double %5, double 1.000000e-05, double 1.000000e-08)
%7 = fcmp ole double %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
void __yell(void) {
  char buf[256];
  memset(buf, 0, sizeof(buf));
}


x86 assembly (clang, -O0):
<__yell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    -0x100(%rbp),%rdi
xor    %esi,%esi
mov    $0x100,%edx
call   1030 <memset@plt>
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__yell>:
sub    $0x108,%rsp
mov    %rsp,%rdi
xor    %esi,%esi
mov    $0x100,%edx
call   1030 <memset@plt>
add    $0x108,%rsp
ret

LLVM IR (-O0):
define void @__yell() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @memset(i8* %2, i32 0, i32 256)
ret void
}

LLVM IR (-O2):
define void @__yell() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @memset(i8* %2, i32 0, i32 256)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ find_one(char *);
void find_one_noindex_large_test() {
  find_one("benchmarks"
           ".single.large");
}


x86 assembly (clang, -O0):
<find_one_noindex_large_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <find_one@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_one_noindex_large_test>:
lea    0xee9(%rip),%rdi
jmp    1030 <find_one@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"benchmarks.single.large\00"
define void @find_one_noindex_large_test() {
%1 = call i32 @find_one(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"benchmarks.single.large\00"
define void @find_one_noindex_large_test() {
%1 = tail call i32 @find_one(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sort(int);
main() { sort(20); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%edi
call   1030 <sort@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x14,%edi
call   1030 <sort@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @sort(i32 20)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @sort(i32 20)
ret i32 0
}
void clearPixel(int x, int y) {
  *((char *)((void *)0xB8000) + (2 * (80 * (y) + (x)))) = ' ';
}


x86 assembly (clang, -O0):
<clearPixel>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0x50,-0x8(%rbp),%eax
add    -0x4(%rbp),%eax
shl    $0x1,%eax
movslq %eax,%rcx
mov    $0xb8000,%eax
movb   $0x20,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearPixel>:
lea    (%rsi,%rsi,4),%eax
shl    $0x4,%eax
add    %edi,%eax
cltq
movb   $0x20,0xb8000(%rax,%rax,1)
20
ret

LLVM IR (-O0):
define void @clearPixel(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = mul nsw i32 80, %5
%7 = load i32, i32* %3
%8 = add nsw i32 %6, %7
%9 = mul nsw i32 2, %8
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* inttoptr (i64 753664 to i8*), i64 %10
store i8 32, i8* %11
ret void
}

LLVM IR (-O2):
define void @clearPixel(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, 80
%4 = add nsw i32 %3, %0
%5 = shl nsw i32 %4, 1
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* inttoptr (i64 753664 to i8*), i64 %6
store i8 32, i8* %7
ret void
}
int isFibonacci(unsigned long long n) {
  unsigned long long x = 0, y = 1;
  unsigned long long next = x + y;
  while (next <= n) {
    if (next == n) {
      return 1;
    }
    x = y;
    y = next;
    next = x + y;
  }
  return 0;
}


x86 assembly (clang, -O0):
<isFibonacci>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x1,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x10(%rbp),%rax
ja     116d <isFibonacci+0x6d>
mov    -0x28(%rbp),%rax
cmp    -0x10(%rbp),%rax
jne    114c <isFibonacci+0x4c>
movl   $0x1,-0x4(%rbp)
jmp    1174 <isFibonacci+0x74>
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    1124 <isFibonacci+0x24>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isFibonacci>:
xor    %eax,%eax
test   %rdi,%rdi
je     1136 <isFibonacci+0x36>
mov    $0x1,%edx
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
cmp    %rdi,%rdx
je     1137 <isFibonacci+0x37>
mov    %rdx,%rsi
add    %rdx,%rcx
mov    %rcx,%rdx
cmp    %rdi,%rcx
mov    %rsi,%rcx
jbe    1120 <isFibonacci+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isFibonacci(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i64 0, i64* %4
store i64 1, i64* %5
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = add i64 %7, %8
store i64 %9, i64* %6
br label %10
10: ; preds = %19, %1
%11 = load i64, i64* %6
%12 = load i64, i64* %3
%13 = icmp ule i64 %11, %12
br i1 %13, label %14, label %25
14: ; preds = %10
%15 = load i64, i64* %6
%16 = load i64, i64* %3
%17 = icmp eq i64 %15, %16
br i1 %17, label %18, label %19
18: ; preds = %14
store i32 1, i32* %2
br label %26
19: ; preds = %14
%20 = load i64, i64* %5
store i64 %20, i64* %4
%21 = load i64, i64* %6
store i64 %21, i64* %5
%22 = load i64, i64* %4
%23 = load i64, i64* %5
%24 = add i64 %22, %23
store i64 %24, i64* %6
br label %10
25: ; preds = %10
store i32 0, i32* %2
br label %26
26: ; preds = %25, %18
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @isFibonacci(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %10, label %5
3: ; preds = %5
%4 = icmp ugt i64 %9, %0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i64 [ %9, %3 ], [ 1, %1 ]
%7 = phi i64 [ %6, %3 ], [ 1, %1 ]
%8 = icmp eq i64 %6, %0
%9 = add i64 %6, %7
br i1 %8, label %10, label %3
10: ; preds = %5, %3, %1
%11 = phi i32 [ 0, %1 ], [ 0, %3 ], [ 1, %5 ]
ret i32 %11
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int syscall(int, int, char const *, struct stat *, int);
int fstatat(int fd, const char *path, struct stat *buf, int flag) {
  return syscall(300, fd, path, buf, flag);
}


x86 assembly (clang, -O0):
<fstatat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
mov    $0x12c,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fstatat>:
mov    %ecx,%r8d
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x12c,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @fstatat(i32 %0, i8* %1, %struct.stat* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca %struct.stat*
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store %struct.stat* %2, %struct.stat** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load %struct.stat*, %struct.stat** %7
%12 = load i32, i32* %8
%13 = call i32 @syscall(i32 300, i32 %9, i8* %10, %struct.stat* %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @fstatat(i32 %0, i8* %1, %struct.stat* %2, i32 %3) {
%5 = tail call i32 @syscall(i32 300, i32 %0, i8* %1, %struct.stat* %2, i32 %3)
ret i32 %5
}
void blk_mq_debugfs_unregister_hctx(struct blk_mq_hw_ctx *hctx) {}


x86 assembly (clang, -O0):
<blk_mq_debugfs_unregister_hctx>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<blk_mq_debugfs_unregister_hctx>:
ret

LLVM IR (-O0):
%struct.blk_mq_hw_ctx = type opaque
define void @blk_mq_debugfs_unregister_hctx(%struct.blk_mq_hw_ctx* %0) {
%2 = alloca %struct.blk_mq_hw_ctx*
store %struct.blk_mq_hw_ctx* %0, %struct.blk_mq_hw_ctx** %2
ret void
}

LLVM IR (-O2):
%struct.blk_mq_hw_ctx = type opaque
define void @blk_mq_debugfs_unregister_hctx(%struct.blk_mq_hw_ctx* nocapture %0) {
ret void
}
/* Variables and functions */
int isnan_d(long double);
int isnan_f(long double);
int isnan_ld(long double);
int isinf_ld(long double x) {
  return (sizeof(x - x) == sizeof(long double) ? isnan_ld(x - x)
          : sizeof(x - x) == sizeof(double)    ? isnan_d(x - x)
                                               : isnan_f(x - x));
}


x86 assembly (clang, -O0):
<isinf_ld>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fld    %st(0)
fsubp  %st,%st(1)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <isnan_ld@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isinf_ld>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fsub   %st,%st(0)
fstpt  (%rsp)
call   1030 <isnan_ld@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @isinf_ld(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = load x86_fp80, x86_fp80* %2
%5 = fsub x86_fp80 %3, %4
%6 = call i32 @isnan_ld(x86_fp80 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @isinf_ld(x86_fp80 %0) {
%2 = fsub x86_fp80 %0, %0
%3 = tail call i32 @isnan_ld(x86_fp80 %2)
ret i32 %3
}
/* Type definitions */
typedef int uint64_t;
typedef int int64_t;

/* Variables and functions */
int64_t sign_extend64(uint64_t val, uint64_t bits) {
  int64_t r;
  int64_t const m = 1U << (bits - 1);
  val = val & ((1U << bits) - 1);
  r = (val ^ m) - m;
  return r;
}


x86 assembly (clang, -O0):
<sign_extend64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
sub    $0x1,%ecx
and    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x10(%rbp),%eax
sub    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign_extend64>:
lea    -0x1(%rsi),%r8d
mov    $0x1,%edx
mov    %r8d,%ecx
shl    %cl,%edx
mov    $0xffffffff,%eax
mov    %esi,%ecx
shl    %cl,%eax
not    %eax
and    %edi,%eax
btc    %r8d,%eax
sub    %edx,%eax
ret

LLVM IR (-O0):
define i32 @sign_extend64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
%9 = shl i32 1, %8
store i32 %9, i32* %6
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = shl i32 1, %11
%13 = sub i32 %12, 1
%14 = and i32 %10, %13
store i32 %14, i32* %3
%15 = load i32, i32* %3
%16 = load i32, i32* %6
%17 = xor i32 %15, %16
%18 = load i32, i32* %6
%19 = sub nsw i32 %17, %18
store i32 %19, i32* %5
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @sign_extend64(i32 %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = shl nuw i32 1, %3
%5 = shl nsw i32 -1, %1
%6 = xor i32 %5, -1
%7 = and i32 %6, %0
%8 = xor i32 %7, %4
%9 = sub nsw i32 %8, %4
ret i32 %9
}
/* Type definitions */
struct timespec {
  int tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void sleep_millis(int millis) {
  struct timespec ts;
  ts.tv_sec = 0;
  ts.tv_nsec = millis * 1000 * 1000;
  nanosleep(&ts, NULL);
}


x86 assembly (clang, -O0):
<sleep_millis>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
imul   $0x3e8,-0x4(%rbp),%eax
imul   $0x3e8,%eax,%eax
mov    %eax,-0x18(%rbp)
lea    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep_millis>:
sub    $0x18,%rsp
movq   $0x0,0x10(%rsp)
imul   $0xf4240,%edi,%eax
mov    %eax,0x8(%rsp)
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
define void @sleep_millis(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
store i32 %0, i32* %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i64 0, i64* %4
%5 = load i32, i32* %2
%6 = mul nsw i32 %5, 1000
%7 = mul nsw i32 %6, 1000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i32 %7, i32* %8
%9 = call i32 @nanosleep(%struct.timespec* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
define void @sleep_millis(i32 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i64 0, i64* %4
%5 = mul i32 %0, 1000000
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i32 %5, i32* %6
%7 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
void gtk_window_get_decorated() {}


x86 assembly (clang, -O0):
<gtk_window_get_decorated>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_window_get_decorated>:
ret

LLVM IR (-O0):
define void @gtk_window_get_decorated() {
ret void
}

LLVM IR (-O2):
define void @gtk_window_get_decorated() {
ret void
}
int max(int *vector) {
  int max = vector[0];
  int i;
  for (i = 1; i < 4; i++) {
    if (vector[i] > max) {
      max = vector[i];
    }
  }
  return (max);
}


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
cmpl   $0x4,-0x10(%rbp)
jge    1157 <max+0x57>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0xc(%rbp),%eax
jle    1144 <max+0x44>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0xc(%rbp)
jmp    1149 <max+0x49>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1118 <max+0x18>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
cmp    %eax,%ecx
cmovg  %ecx,%eax
mov    0x8(%rdi),%ecx
cmp    %eax,%ecx
cmovg  %ecx,%eax
mov    0xc(%rdi),%ecx
cmp    %eax,%ecx
cmovg  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @max(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 0
%7 = load i32, i32* %6
store i32 %7, i32* %3
store i32 1, i32* %4
br label %8
8: ; preds = %26, %1
%9 = load i32, i32* %4
%10 = icmp slt i32 %9, 4
br i1 %10, label %11, label %29
11: ; preds = %8
%12 = load i32*, i32** %2
%13 = load i32, i32* %4
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = load i32, i32* %3
%18 = icmp sgt i32 %16, %17
br i1 %18, label %19, label %25
19: ; preds = %11
%20 = load i32*, i32** %2
%21 = load i32, i32* %4
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i32, i32* %20, i64 %22
%24 = load i32, i32* %23
store i32 %24, i32* %3
br label %25
25: ; preds = %19, %11
br label %26
26: ; preds = %25
%27 = load i32, i32* %4
%28 = add nsw i32 %27, 1
store i32 %28, i32* %4
br label %8
29: ; preds = %8
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @max(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = getelementptr inbounds i32, i32* %0, i64 1
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, %2
%6 = select i1 %5, i32 %4, i32 %2
%7 = getelementptr inbounds i32, i32* %0, i64 2
%8 = load i32, i32* %7
%9 = icmp sgt i32 %8, %6
%10 = select i1 %9, i32 %8, i32 %6
%11 = getelementptr inbounds i32, i32* %0, i64 3
%12 = load i32, i32* %11
%13 = icmp sgt i32 %12, %10
%14 = select i1 %13, i32 %12, i32 %10
ret i32 %14
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void EPIConfigGPModeSet(uint32_t ui32Base, uint32_t ui32Config,
                        uint32_t ui32FrameCount, uint32_t ui32MaxWait) {
  ;
  ;
  ;
  ui32Config &= ~0x03C00000;
  ui32Config |= ui32FrameCount << 22;
  (*((volatile uint32_t *)(ui32Base + 0x00000010))) = ui32Config;
}


x86 assembly (clang, -O0):
<EPIConfigGPModeSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfc3fffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x16,%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x10,%eax
cltq
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPIConfigGPModeSet>:
and    $0xfc3fffff,%esi
shl    $0x16,%edx
or     %esi,%edx
movslq %edi,%rax
mov    %edx,0x10(%rax)
ret

LLVM IR (-O0):
define void @EPIConfigGPModeSet(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %6
%10 = and i32 %9, -62914561
store i32 %10, i32* %6
%11 = load i32, i32* %7
%12 = shl i32 %11, 22
%13 = load i32, i32* %6
%14 = or i32 %13, %12
store i32 %14, i32* %6
%15 = load i32, i32* %6
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 16
%18 = sext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
store volatile i32 %15, i32* %19
ret void
}

LLVM IR (-O2):
define void @EPIConfigGPModeSet(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = and i32 %1, -62914561
%6 = shl i32 %2, 22
%7 = or i32 %6, %5
%8 = add nsw i32 %0, 16
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 %7, i32* %10
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void op_jmp() { puts("JMP"); }


x86 assembly (clang, -O0):
<op_jmp>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_jmp>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"JMP\00"
define void @op_jmp() {
%1 = call i32 @puts(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"JMP\00"
define void @op_jmp() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}
const char *fpp_config_get_plugin_file_name(void) { return "libpdf.so"; }


x86 assembly (clang, -O0):
<fpp_config_get_plugin_file_name>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fpp_config_get_plugin_file_name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [10 x i8] c"libpdf.so\00"
define i8* @fpp_config_get_plugin_file_name() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [10 x i8] c"libpdf.so\00"
define i8* @fpp_config_get_plugin_file_name() {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}
void psync_fs_pause_until_login() {}


x86 assembly (clang, -O0):
<psync_fs_pause_until_login>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psync_fs_pause_until_login>:
ret

LLVM IR (-O0):
define void @psync_fs_pause_until_login() {
ret void
}

LLVM IR (-O2):
define void @psync_fs_pause_until_login() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mvprintw(int, int, char *);
void print_o(int y, int x) {
  mvprintw(y, x, "/\\");
  mvprintw(y + 1, x, "\\/");
}


x86 assembly (clang, -O0):
<print_o>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
lea    0xed5(%rip),%rdx
call   1030 <mvprintw@plt>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
mov    -0x8(%rbp),%esi
lea    0xec3(%rip),%rdx
call   1030 <mvprintw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_o>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xee2(%rip),%rdx
call   1030 <mvprintw@plt>
add    $0x1,%ebp
lea    0xed6(%rip),%rdx
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <mvprintw@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"/\\\00"
@.str.1 = [3 x i8] c"\\/\00"
define void @print_o(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @mvprintw(i32 %5, i32 %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
%10 = load i32, i32* %4
%11 = call i32 @mvprintw(i32 %9, i32 %10, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"/\\\00"
@.str.1 = [3 x i8] c"\\/\00"
define void @print_o(i32 %0, i32 %1) {
%3 = tail call i32 @mvprintw(i32 %0, i32 %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%4 = add nsw i32 %0, 1
%5 = tail call i32 @mvprintw(i32 %4, i32 %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int ade7754_configure_ring(struct iio_dev *indio_dev) { return 0; }


x86 assembly (clang, -O0):
<ade7754_configure_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ade7754_configure_ring>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define i32 @ade7754_configure_ring(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define i32 @ade7754_configure_ring(%struct.iio_dev* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int set_user_upload(char const *, int, char const *, int /*<<< orphan*/, int,
                    char **);
int rpc_enable_user(const char *ip, int port, const char *user, int timeout,
                    char **err) {
  return set_user_upload(ip, port, user, 0, timeout, err);
}


x86 assembly (clang, -O0):
<rpc_enable_user>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%r8d
mov    -0x28(%rbp),%r9
xor    %ecx,%ecx
call   1030 <set_user_upload@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpc_enable_user>:
mov    %r8,%r9
mov    %ecx,%r8d
xor    %ecx,%ecx
jmp    1030 <set_user_upload@plt>

LLVM IR (-O0):
define i32 @rpc_enable_user(i8* %0, i32 %1, i8* %2, i32 %3, i8** %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i8**
store i8* %0, i8** %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i8** %4, i8*** %10
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i8**, i8*** %10
%16 = call i32 @set_user_upload(i8* %11, i32 %12, i8* %13, i32 0, i32 %14, i8** %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @rpc_enable_user(i8* %0, i32 %1, i8* %2, i32 %3, i8** %4) {
%6 = tail call i32 @set_user_upload(i8* %0, i32 %1, i8* %2, i32 0, i32 %3, i8** %4)
ret i32 %6
}
/* Variables and functions */
int vdb_printf(char *, float, float, float);
__attribute__((weak)) int vdb_point(float x, float y, float z) {
  return vdb_printf("p %f %f %f\n", x, y, z);
}


x86 assembly (clang, -O0):
<vdb_point>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
lea    0xec3(%rip),%rdi
call   1030 <vdb_printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vdb_point>:
lea    0xee9(%rip),%rdi
jmp    1030 <vdb_printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"p %f %f %f\0A\00"
define weak i32 @vdb_point(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call i32 @vdb_printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), float %7, float %8, float %9)
ret i32 %10
}

LLVM IR (-O2):
@.str = [12 x i8] c"p %f %f %f\0A\00"
define weak i32 @vdb_point(float %0, float %1, float %2) {
%4 = tail call i32 @vdb_printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), float %0, float %1, float %2)
ret i32 %4
}
const char *simdl_name() { return "obdsim dlopen test"; }


x86 assembly (clang, -O0):
<simdl_name>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<simdl_name>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [19 x i8] c"obdsim dlopen test\00"
define i8* @simdl_name() {
ret i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [19 x i8] c"obdsim dlopen test\00"
define i8* @simdl_name() {
ret i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
__attribute__((hotpatch(1))) void hp1(void) { printf("hello, world!\n"); }


x86 assembly (clang, -O0):
<hp1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hp1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"hello, world!\0A\00"
define void @hp1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"hello, world!\00"
define void @hp1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
void CAN2_RX0_IRQHandler() {}


x86 assembly (clang, -O0):
<CAN2_RX0_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CAN2_RX0_IRQHandler>:
ret

LLVM IR (-O0):
define void @CAN2_RX0_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @CAN2_RX0_IRQHandler() {
ret void
}
/* Variables and functions */
int __ctype_ispunct(int);
int ispunct(int c) { return __ctype_ispunct(c); }


x86 assembly (clang, -O0):
<ispunct>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__ctype_ispunct@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ispunct>:
jmp    1030 <__ctype_ispunct@plt>

LLVM IR (-O0):
define i32 @ispunct(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__ctype_ispunct(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ispunct(i32 %0) {
%2 = tail call i32 @__ctype_ispunct(i32 %0)
ret i32 %2
}
void null_output(s, f, a1, n) int s;
int f;
struct sockaddr *a1;
int n;
{ ; }


x86 assembly (clang, -O0):
<null_output>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_output>:
ret

LLVM IR (-O0):
%struct.sockaddr = type opaque
define void @null_output(i32 %0, i32 %1, %struct.sockaddr* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca %struct.sockaddr*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store %struct.sockaddr* %2, %struct.sockaddr** %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
%struct.sockaddr = type opaque
define void @null_output(i32 %0, i32 %1, %struct.sockaddr* nocapture %2, i32 %3) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ populateQ(int *);
void initializeQueue(int Q[], int *front, int *rear) {
  *front = -1;
  *rear = -1;
  populateQ(Q);
}


x86 assembly (clang, -O0):
<initializeQueue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movl   $0xffffffff,(%rax)
mov    -0x18(%rbp),%rax
movl   $0xffffffff,(%rax)
mov    -0x8(%rbp),%rdi
call   1030 <populateQ@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initializeQueue>:
movl   $0xffffffff,(%rsi)
movl   $0xffffffff,(%rdx)
jmp    1030 <populateQ@plt>

LLVM IR (-O0):
define void @initializeQueue(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %5
store i32 -1, i32* %7
%8 = load i32*, i32** %6
store i32 -1, i32* %8
%9 = load i32*, i32** %4
%10 = call i32 @populateQ(i32* %9)
ret void
}

LLVM IR (-O2):
define void @initializeQueue(i32* %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2) {
store i32 -1, i32* %1
store i32 -1, i32* %2
%4 = tail call i32 @populateQ(i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void printHelp() {
  puts("Help:\n");
  puts("--help		|	print this help");
  puts("--batch		|	will assume every directory in the current "
       "directory contain a chapter, and manage them all at once");
  puts("--askConfirm	|	will ask a confirmation before renaming files "
       "and creating the zipfile");
}


x86 assembly (clang, -O0):
<printHelp>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
lea    0xee0(%rip),%rdi
call   1030 <puts@plt>
lea    0xeee(%rip),%rdi
call   1030 <puts@plt>
lea    0xf51(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printHelp>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee3(%rip),%rdi
call   1030 <puts@plt>
lea    0xef1(%rip),%rdi
call   1030 <puts@plt>
lea    0xf54(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"Help:\0A\00"
@.str.1 = [26 x i8] c"--help\09\09|\09print this help\00"
@.str.2 = [111 x i8] c"--batch\09\09|\09will assume every directory in the current directory contain a chapter, and manage them all at once\00"
@.str.3 = [86 x i8] c"--askConfirm\09|\09will ask a confirmation before renaming files and creating the zipfile\00"
define void @printHelp() {
%1 = call i32 @puts(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @puts(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @puts(i8* getelementptr inbounds ([111 x i8], [111 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @puts(i8* getelementptr inbounds ([86 x i8], [86 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"Help:\0A\00"
@.str.1 = [26 x i8] c"--help\09\09|\09print this help\00"
@.str.2 = [111 x i8] c"--batch\09\09|\09will assume every directory in the current directory contain a chapter, and manage them all at once\00"
@.str.3 = [86 x i8] c"--askConfirm\09|\09will ask a confirmation before renaming files and creating the zipfile\00"
define void @printHelp() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([111 x i8], [111 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([86 x i8], [86 x i8]* @.str.3, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo6(long long);
void bar6(long long y) { foo6(y); }


x86 assembly (clang, -O0):
<bar6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <foo6@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar6>:
jmp    1030 <foo6@plt>

LLVM IR (-O0):
define void @bar6(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @foo6(i64 %3)
ret void
}

LLVM IR (-O2):
define void @bar6(i64 %0) {
%2 = tail call i32 @foo6(i64 %0)
ret void
}
/* Variables and functions */
int atoi(char *);
scalar_t__ foo();
int main(int argc, char *argv[]) {
  int ret = 0;
  if (argc > 1)
    ret = atoi(argv[1]);
  ret += foo();
  return ret ? 0 : 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1157 <main+0x37>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <atoi@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
mov    %rax,%rcx
movslq -0x14(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
cmp    $0x2,%edi
jl     1133 <main+0x13>
mov    0x8(%rsi),%rdi
call   1040 <atoi@plt>
mov    %eax,%ebx
jmp    1135 <main+0x15>
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <foo@plt>
xor    %ecx,%ecx
add    %ebx,%eax
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = call i32 @atoi(i8* %12)
store i32 %13, i32* %6
br label %14
14: ; preds = %9, %2
%15 = call i64 (...) @foo()
%16 = load i32, i32* %6
%17 = sext i32 %16 to i64
%18 = add nsw i64 %17, %15
%19 = trunc i64 %18 to i32
store i32 %19, i32* %6
%20 = load i32, i32* %6
%21 = icmp ne i32 %20, 0
%22 = zext i1 %21 to i64
%23 = select i1 %21, i32 0, i32 1
ret i32 %23
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = tail call i32 @atoi(i8* %6)
%8 = zext i32 %7 to i64
br label %9
9: ; preds = %4, %2
%10 = phi i64 [ %8, %4 ], [ 0, %2 ]
%11 = tail call i64 (...) @foo()
%12 = add i64 %11, %10
%13 = trunc i64 %12 to i32
%14 = icmp eq i32 %13, 0
%15 = zext i1 %14 to i32
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
void *thrfunc1(void *arg) {
  fprintf(stderr, "Starting thread %d\n", *(int *)arg);
  return NULL;
}


x86 assembly (clang, -O0):
<thrfunc1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
lea    0xece(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thrfunc1>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%eax
mov    (%rdi),%edx
lea    0xedd(%rip),%rsi
mov    %eax,%edi
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [20 x i8] c"Starting thread %d\0A\00"
define i8* @thrfunc1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
%7 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i8* null
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [20 x i8] c"Starting thread %d\0A\00"
define noalias i8* @thrfunc1(i8* nocapture %0) {
%2 = load i32, i32* @stderr
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i8* null
}
/* Type definitions */
typedef int /*<<< orphan*/ n;

/* Variables and functions */
int CHAR_BIT;
int __builtin_clzl(unsigned long);
int ceillog2ul(unsigned long n) {
  return (int)(sizeof(n) * CHAR_BIT) - __builtin_clzl(n);
}


x86 assembly (clang, -O0):
<ceillog2ul>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    0x2ed1(%rip),%rax
movslq (%rax),%rax
shl    $0x3,%rax
mov    -0x8(%rbp),%rcx
bsr    %rcx,%rcx
xor    $0x3f,%rcx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceillog2ul>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
shl    $0x3,%eax
bsr    %rdi,%rcx
xor    $0x3f,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
@CHAR_BIT = global i32 0
define i32 @ceillog2ul(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i32, i32* @CHAR_BIT
%4 = sext i32 %3 to i64
%5 = mul i64 8, %4
%6 = trunc i64 %5 to i32
%7 = load i64, i64* %2
%8 = call i64 @llvm.ctlz.i64(i64 %7, i1 true)
%9 = trunc i64 %8 to i32
%10 = sub nsw i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
@CHAR_BIT = global i32 0
define i32 @ceillog2ul(i64 %0) {
%2 = load i32, i32* @CHAR_BIT
%3 = shl i32 %2, 3
%4 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 true)
%5 = trunc i64 %4 to i32
%6 = sub nsw i32 %3, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ run_tests();
int /*<<< orphan*/ run_tests2();
int main(void) {
  run_tests();
  run_tests2();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <run_tests@plt>
mov    $0x0,%al
call   1030 <run_tests2@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <run_tests@plt>
xor    %eax,%eax
call   1030 <run_tests2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @run_tests()
%3 = call i32 (...) @run_tests2()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @run_tests()
%2 = tail call i32 (...) @run_tests2()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ uart_write(int /*<<< orphan*/);
void uart_nwrite(const char *s, unsigned int l) {
  while (l--)
    uart_write(*s++);
}


x86 assembly (clang, -O0):
<uart_nwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
je     114f <uart_nwrite+0x3f>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <uart_write@plt>
jmp    111f <uart_nwrite+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_nwrite>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
je     1143 <uart_nwrite+0x33>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsbl (%r14,%rbx,1),%edi
call   1030 <uart_write@plt>
add    $0x1,%rbx
cmp    %ebx,%r15d
jne    1130 <uart_nwrite+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @uart_nwrite(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add i32 %6, -1
store i32 %7, i32* %4
%8 = icmp ne i32 %6, 0
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
%12 = load i8, i8* %10
%13 = sext i8 %12 to i32
%14 = call i32 @uart_write(i32 %13)
br label %5
15: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @uart_nwrite(i8* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i8* [ %8, %4 ], [ %0, %2 ]
%7 = add i32 %5, -1
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %6
%10 = sext i8 %9 to i32
%11 = tail call i32 @uart_write(i32 %10)
%12 = icmp eq i32 %7, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %2
ret void
}
void strike_off(void) {}


x86 assembly (clang, -O0):
<strike_off>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strike_off>:
ret

LLVM IR (-O0):
define void @strike_off() {
ret void
}

LLVM IR (-O2):
define void @strike_off() {
ret void
}