int Operand_ai4const_encode(unsigned int *valp) {
  unsigned t_0, ai4const_0;
  ai4const_0 = *valp;
  switch (ai4const_0) {
  case 0xffffffff:
    t_0 = 0;
    break;
  case 0x1:
    t_0 = 0x1;
    break;
  case 0x2:
    t_0 = 0x2;
    break;
  case 0x3:
    t_0 = 0x3;
    break;
  case 0x4:
    t_0 = 0x4;
    break;
  case 0x5:
    t_0 = 0x5;
    break;
  case 0x6:
    t_0 = 0x6;
    break;
  case 0x7:
    t_0 = 0x7;
    break;
  case 0x8:
    t_0 = 0x8;
    break;
  case 0x9:
    t_0 = 0x9;
    break;
  case 0xa:
    t_0 = 0xa;
    break;
  case 0xb:
    t_0 = 0xb;
    break;
  case 0xc:
    t_0 = 0xc;
    break;
  case 0xd:
    t_0 = 0xd;
    break;
  case 0xe:
    t_0 = 0xe;
    break;
  default:
    t_0 = 0xf;
    break;
  }
  *valp = t_0;
  return 0;
}


x86 assembly (clang, -O0):
<Operand_ai4const_encode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
sub    $0xf,%eax
ja     11ee <Operand_ai4const_encode+0xee>
mov    -0x18(%rbp),%rax
lea    0xecf(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x0,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0x1,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0x2,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0x3,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0x4,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0x5,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0x6,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0x7,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0x8,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0x9,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0xa,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0xb,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0xc,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0xd,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0xe,-0xc(%rbp)
jmp    11f5 <Operand_ai4const_encode+0xf5>
movl   $0xf,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_ai4const_encode>:
mov    (%rdi),%eax
add    $0x1,%eax
mov    $0xf,%ecx
cmp    $0xf,%eax
ja     111b <Operand_ai4const_encode+0x1b>
cltq
lea    0xee8(%rip),%rcx
mov    (%rcx,%rax,4),%ecx
mov    %ecx,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Operand_ai4const_encode(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
store i32 %6, i32* %4
%7 = load i32, i32* %4
switch i32 %7, label %23 [
i32 -1, label %8
i32 1, label %9
i32 2, label %10
i32 3, label %11
i32 4, label %12
i32 5, label %13
i32 6, label %14
i32 7, label %15
i32 8, label %16
i32 9, label %17
i32 10, label %18
i32 11, label %19
i32 12, label %20
i32 13, label %21
i32 14, label %22
]
8: ; preds = %1
store i32 0, i32* %3
br label %24
9: ; preds = %1
store i32 1, i32* %3
br label %24
10: ; preds = %1
store i32 2, i32* %3
br label %24
11: ; preds = %1
store i32 3, i32* %3
br label %24
12: ; preds = %1
store i32 4, i32* %3
br label %24
13: ; preds = %1
store i32 5, i32* %3
br label %24
14: ; preds = %1
store i32 6, i32* %3
br label %24
15: ; preds = %1
store i32 7, i32* %3
br label %24
16: ; preds = %1
store i32 8, i32* %3
br label %24
17: ; preds = %1
store i32 9, i32* %3
br label %24
18: ; preds = %1
store i32 10, i32* %3
br label %24
19: ; preds = %1
store i32 11, i32* %3
br label %24
20: ; preds = %1
store i32 12, i32* %3
br label %24
21: ; preds = %1
store i32 13, i32* %3
br label %24
22: ; preds = %1
store i32 14, i32* %3
br label %24
23: ; preds = %1
store i32 15, i32* %3
br label %24
24: ; preds = %23, %22, %21, %20, %19, %18, %17, %16, %15, %14, %13, %12, %11, %10, %9, %8
%25 = load i32, i32* %3
%26 = load i32*, i32** %2
store i32 %25, i32* %26
ret i32 0
}

LLVM IR (-O2):
@switch.table.Operand_ai4const_encode = [16 x i32] [i32 0, i32 15, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14]
define i32 @Operand_ai4const_encode(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = add i32 %2, 1
%4 = icmp ult i32 %3, 16
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = sext i32 %3 to i64
%7 = getelementptr inbounds [16 x i32], [16 x i32]* @switch.table.Operand_ai4const_encode, i64 0, i64 %6
%8 = load i32, i32* %7
br label %9
9: ; preds = %1, %5
%10 = phi i32 [ %8, %5 ], [ 15, %1 ]
store i32 %10, i32* %0
ret i32 0
}