xunge/DecIR huggingface dataset:
void _M2_interpen_finish(__attribute__((unused)) int argc,
                         __attribute__((unused)) char *argv[]) {}


x86 assembly (clang, -O0):
<_M2_interpen_finish>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_M2_interpen_finish>:
ret

LLVM IR (-O0):
define void @_M2_interpen_finish(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @_M2_interpen_finish(i32 %0, i8** nocapture %1) {
ret void
}
void Breakpoint() {}


x86 assembly (clang, -O0):
<Breakpoint>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Breakpoint>:
ret

LLVM IR (-O0):
define void @Breakpoint() {
ret void
}

LLVM IR (-O2):
define void @Breakpoint() {
ret void
}
double epj2mjd(epoch)
double epoch;
{ return (51544.5 + ((epoch - 2000.0) * 365.25)); }


x86 assembly (clang, -O0):
<epj2mjd>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xefa(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  0xede(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeda(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<epj2mjd>:
addsd  0xef8(%rip),%xmm0
mulsd  0xef8(%rip),%xmm0
addsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @epj2mjd(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fsub double %3, 2.000000e+03
%5 = call double @llvm.fmuladd.f64(double %4, double 3.652500e+02, double 5.154450e+04)
ret double %5
}

LLVM IR (-O2):
define double @epj2mjd(double %0) {
%2 = fadd double %0, -2.000000e+03
%3 = tail call double @llvm.fmuladd.f64(double %2, double 3.652500e+02, double 5.154450e+04)
ret double %3
}
/* Variables and functions */
int CHAR_BIT;
void __set_bit(int idx, unsigned long *bmap) {
  unsigned long mask = (1UL << ((idx) % (CHAR_BIT * sizeof(unsigned long))));
  unsigned long *p =
      ((unsigned long *)bmap) + ((idx) / (CHAR_BIT * sizeof(unsigned long)));
  *p |= mask;
}


x86 assembly (clang, -O0):
<__set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movslq -0x4(%rbp),%rax
mov    0x2eca(%rip),%rcx
movslq (%rcx),%rcx
shl    $0x3,%rcx
xor    %edx,%edx
div    %rcx
mov    %rdx,%rcx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
movslq -0x4(%rbp),%rax
mov    0x2e9c(%rip),%rcx
movslq (%rcx),%rcx
shl    $0x3,%rcx
xor    %edx,%edx
div    %rcx
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%rax
or     (%rax),%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__set_bit>:
movslq %edi,%rax
mov    0x2ed6(%rip),%rcx
movslq (%rcx),%rcx
shl    $0x3,%rcx
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
je     1127 <__set_bit+0x27>
xor    %edx,%edx
div    %rcx
mov    %rdx,%rcx
jmp    112f <__set_bit+0x2f>
mov    %edi,%eax
xor    %edx,%edx
div    %ecx
mov    %edx,%ecx
mov    $0x1,%edx
shl    %cl,%rdx
or     %rdx,(%rsi,%rax,8)
ret

LLVM IR (-O0):
@CHAR_BIT = global i32 0
define void @__set_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = load i32, i32* @CHAR_BIT
%10 = sext i32 %9 to i64
%11 = mul i64 %10, 8
%12 = urem i64 %8, %11
%13 = shl i64 1, %12
store i64 %13, i64* %5
%14 = load i64*, i64** %4
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = load i32, i32* @CHAR_BIT
%18 = sext i32 %17 to i64
%19 = mul i64 %18, 8
%20 = udiv i64 %16, %19
%21 = getelementptr inbounds i64, i64* %14, i64 %20
store i64* %21, i64** %6
%22 = load i64, i64* %5
%23 = load i64*, i64** %6
%24 = load i64, i64* %23
%25 = or i64 %24, %22
store i64 %25, i64* %23
ret void
}

LLVM IR (-O2):
@CHAR_BIT = global i32 0
define void @__set_bit(i32 %0, i64* nocapture %1) {
%3 = sext i32 %0 to i64
%4 = load i32, i32* @CHAR_BIT
%5 = sext i32 %4 to i64
%6 = shl nsw i64 %5, 3
%7 = urem i64 %3, %6
%8 = shl nuw i64 1, %7
%9 = udiv i64 %3, %6
%10 = getelementptr inbounds i64, i64* %1, i64 %9
%11 = load i64, i64* %10
%12 = or i64 %11, %8
store i64 %12, i64* %10
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
char *strrchr(char *, char);
void getPathWithoutFileExtension(char *tDest, char *tPath) {
  strcpy(tDest, tPath);
  if (!strcmp("", tPath))
    return;
  char *pos = strrchr(tDest, '.');
  *pos = '\0';
}


x86 assembly (clang, -O0):
<getPathWithoutFileExtension>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rsi
lea    0xea8(%rip),%rdi
call   1050 <strcmp@plt>
cmp    $0x0,%eax
jne    116b <getPathWithoutFileExtension+0x3b>
jmp    1184 <getPathWithoutFileExtension+0x54>
mov    -0x8(%rbp),%rdi
mov    $0x2e,%esi
call   1040 <strrchr@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getPathWithoutFileExtension>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
call   1030 <strcpy@plt>
cmpb   $0x0,(%rbx)
je     1144 <getPathWithoutFileExtension+0x24>
mov    %r14,%rdi
mov    $0x2e,%esi
call   1040 <strrchr@plt>
movb   $0x0,(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define void @getPathWithoutFileExtension(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32 @strcpy(i8* %6, i8* %7)
%9 = load i8*, i8** %4
%10 = call i32 @strcmp(i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = icmp ne i32 %10, 0
br i1 %11, label %13, label %12
12: ; preds = %2
br label %17
13: ; preds = %2
%14 = load i8*, i8** %3
%15 = call i8* @strrchr(i8* %14, i8 signext 46)
store i8* %15, i8** %5
%16 = load i8*, i8** %5
store i8 0, i8* %16
br label %17
17: ; preds = %13, %12
ret void
}

LLVM IR (-O2):
define void @getPathWithoutFileExtension(i8* %0, i8* %1) {
%3 = tail call i32 @strcpy(i8* %0, i8* %1)
%4 = load i8, i8* %1
%5 = icmp eq i8 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 46)
store i8 0, i8* %7
br label %8
8: ; preds = %2, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *);
int gsub_error(const char *fmt) {
  printf("%s\n", fmt);
  exit(1);
  return 0;
}


x86 assembly (clang, -O0):
<gsub_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<gsub_error>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @gsub_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @gsub_error(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ NETSCAPE_SPKAC;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
scalar_t__ ASN1_item_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ *);
int /*<<< orphan*/ NETSCAPE_SPKAC_it;
NETSCAPE_SPKAC *d2i_NETSCAPE_SPKAC(NETSCAPE_SPKAC **a, const unsigned char **in,
                                   long len) {
  return (NETSCAPE_SPKAC *)ASN1_item_d2i((ASN1_VALUE **)a, in, len,
                                         &NETSCAPE_SPKAC_it);
}


x86 assembly (clang, -O0):
<d2i_NETSCAPE_SPKAC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2ea9(%rip),%rcx
call   1030 <ASN1_item_d2i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_NETSCAPE_SPKAC>:
mov    0x2ec9(%rip),%rcx
jmp    1030 <ASN1_item_d2i@plt>

LLVM IR (-O0):
@NETSCAPE_SPKAC_it = global i32 0
define i32* @d2i_NETSCAPE_SPKAC(i32** %0, i8** %1, i64 %2) {
%4 = alloca i32**
%5 = alloca i8**
%6 = alloca i64
store i32** %0, i32*** %4
store i8** %1, i8*** %5
store i64 %2, i64* %6
%7 = load i32**, i32*** %4
%8 = load i8**, i8*** %5
%9 = load i64, i64* %6
%10 = call i64 @ASN1_item_d2i(i32** %7, i8** %8, i64 %9, i32* @NETSCAPE_SPKAC_it)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
@NETSCAPE_SPKAC_it = global i32 0
define i32* @d2i_NETSCAPE_SPKAC(i32** %0, i8** %1, i64 %2) {
%4 = tail call i64 @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* @NETSCAPE_SPKAC_it)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
void trap_init(void) {}


x86 assembly (clang, -O0):
<trap_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trap_init>:
ret

LLVM IR (-O0):
define void @trap_init() {
ret void
}

LLVM IR (-O2):
define void @trap_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _rpmalloc_heap_release(void *, int /*<<< orphan*/);
void _rpmalloc_heap_release_raw(void *heapptr) {
  _rpmalloc_heap_release(heapptr, 0);
}


x86 assembly (clang, -O0):
<_rpmalloc_heap_release_raw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <_rpmalloc_heap_release@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_rpmalloc_heap_release_raw>:
xor    %esi,%esi
jmp    1030 <_rpmalloc_heap_release@plt>

LLVM IR (-O0):
define void @_rpmalloc_heap_release_raw(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @_rpmalloc_heap_release(i8* %3, i32 0)
ret void
}

LLVM IR (-O2):
define void @_rpmalloc_heap_release_raw(i8* %0) {
%2 = tail call i32 @_rpmalloc_heap_release(i8* %0, i32 0)
ret void
}
/* Variables and functions */
char *calloc(long, int);
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ memcpy(char *, char *, long);
char *slurp(char const *, long *);
char *slurp_str(const char *fname) {
  long size;
  char *b = slurp(fname, &size);
  char *s = calloc(size + 1, sizeof(char));
  memcpy(s, b, size);
  free(b);
  return s;
}


x86 assembly (clang, -O0):
<slurp_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <slurp@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
mov    $0x1,%esi
call   1050 <calloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1060 <memcpy@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<slurp_str>:
push   %r14
push   %rbx
push   %rax
mov    %rsp,%rsi
call   1040 <slurp@plt>
mov    %rax,%r14
mov    (%rsp),%rdi
add    $0x1,%rdi
mov    $0x1,%esi
call   1050 <calloc@plt>
mov    %rax,%rbx
mov    (%rsp),%rdx
mov    %rax,%rdi
mov    %r14,%rsi
call   1060 <memcpy@plt>
mov    %r14,%rdi
call   1030 <free@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @slurp_str(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i8* @slurp(i8* %6, i64* %3)
store i8* %7, i8** %4
%8 = load i64, i64* %3
%9 = add nsw i64 %8, 1
%10 = call i8* @calloc(i64 %9, i32 1)
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = load i8*, i8** %4
%13 = load i64, i64* %3
%14 = call i32 @memcpy(i8* %11, i8* %12, i64 %13)
%15 = load i8*, i8** %4
%16 = call i32 @free(i8* %15)
%17 = load i8*, i8** %5
ret i8* %17
}

LLVM IR (-O2):
define i8* @slurp_str(i8* %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = call i8* @slurp(i8* %0, i64* %2)
%5 = load i64, i64* %2
%6 = add nsw i64 %5, 1
%7 = call i8* @calloc(i64 %6, i32 1)
%8 = load i64, i64* %2
%9 = call i32 @memcpy(i8* %7, i8* %4, i64 %8)
%10 = call i32 @free(i8* %4)
ret i8* %7
}
int insy_gcm_mult_lena_msb_csr_debug_set(
    unsigned int dev_id, union insy_gcm_mult_lena_msb_csr_debug_u *value) {
  return 1;
}


x86 assembly (clang, -O0):
<insy_gcm_mult_lena_msb_csr_debug_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<insy_gcm_mult_lena_msb_csr_debug_set>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%union.insy_gcm_mult_lena_msb_csr_debug_u = type opaque
define i32 @insy_gcm_mult_lena_msb_csr_debug_set(i32 %0, %union.insy_gcm_mult_lena_msb_csr_debug_u* %1) {
%3 = alloca i32
%4 = alloca %union.insy_gcm_mult_lena_msb_csr_debug_u*
store i32 %0, i32* %3
store %union.insy_gcm_mult_lena_msb_csr_debug_u* %1, %union.insy_gcm_mult_lena_msb_csr_debug_u** %4
ret i32 1
}

LLVM IR (-O2):
%union.insy_gcm_mult_lena_msb_csr_debug_u = type opaque
define i32 @insy_gcm_mult_lena_msb_csr_debug_set(i32 %0, %union.insy_gcm_mult_lena_msb_csr_debug_u* nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(int /*<<< orphan*/);
void ft_print_numbers(void) {
  char c;
  c = '0';
  while (c <= '9')
    ft_putchar(c++);
}


x86 assembly (clang, -O0):
<ft_print_numbers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x30,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
jg     1141 <ft_print_numbers+0x31>
mov    -0x1(%rbp),%al
mov    %al,%cl
add    $0x1,%cl
mov    %cl,-0x1(%rbp)
movsbl %al,%edi
call   1030 <ft_putchar@plt>
jmp    111c <ft_print_numbers+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_print_numbers>:
push   %rax
mov    $0x30,%edi
call   1030 <ft_putchar@plt>
mov    $0x31,%edi
call   1030 <ft_putchar@plt>
mov    $0x32,%edi
call   1030 <ft_putchar@plt>
mov    $0x33,%edi
call   1030 <ft_putchar@plt>
mov    $0x34,%edi
call   1030 <ft_putchar@plt>
mov    $0x35,%edi
call   1030 <ft_putchar@plt>
mov    $0x36,%edi
call   1030 <ft_putchar@plt>
mov    $0x37,%edi
call   1030 <ft_putchar@plt>
mov    $0x38,%edi
call   1030 <ft_putchar@plt>
mov    $0x39,%edi
pop    %rax
jmp    1030 <ft_putchar@plt>

LLVM IR (-O0):
define void @ft_print_numbers() {
%1 = alloca i8
store i8 48, i8* %1
br label %2
2: ; preds = %6, %0
%3 = load i8, i8* %1
%4 = sext i8 %3 to i32
%5 = icmp sle i32 %4, 57
br i1 %5, label %6, label %11
6: ; preds = %2
%7 = load i8, i8* %1
%8 = add i8 %7, 1
store i8 %8, i8* %1
%9 = sext i8 %7 to i32
%10 = call i32 @ft_putchar(i32 %9)
br label %2
11: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @ft_print_numbers() {
%1 = tail call i32 @ft_putchar(i32 48)
%2 = tail call i32 @ft_putchar(i32 49)
%3 = tail call i32 @ft_putchar(i32 50)
%4 = tail call i32 @ft_putchar(i32 51)
%5 = tail call i32 @ft_putchar(i32 52)
%6 = tail call i32 @ft_putchar(i32 53)
%7 = tail call i32 @ft_putchar(i32 54)
%8 = tail call i32 @ft_putchar(i32 55)
%9 = tail call i32 @ft_putchar(i32 56)
%10 = tail call i32 @ft_putchar(i32 57)
ret void
}
int test_imm_B4int64_highword_reg(long long val) {
  return ((val >> 32) & (0xB4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B4int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xb4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B4int64_highword_reg>:
movabs $0xb400000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B4int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 180
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B4int64_highword_reg(i64 %0) {
%2 = and i64 %0, 773094113280
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ closePwmIfOpened();
int /*<<< orphan*/ initGpio();
int /*<<< orphan*/ initPwm();
int /*<<< orphan*/ initVariable();
int /*<<< orphan*/ sleep(int);
void init() {
  closePwmIfOpened();
  initGpio();
  initPwm();
  initVariable();
  sleep(2);
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <closePwmIfOpened@plt>
mov    $0x0,%al
call   1040 <initGpio@plt>
mov    $0x0,%al
call   1060 <initPwm@plt>
mov    $0x0,%al
call   1030 <initVariable@plt>
mov    $0x2,%edi
call   1070 <sleep@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
xor    %eax,%eax
call   1050 <closePwmIfOpened@plt>
xor    %eax,%eax
call   1040 <initGpio@plt>
xor    %eax,%eax
call   1060 <initPwm@plt>
xor    %eax,%eax
call   1030 <initVariable@plt>
mov    $0x2,%edi
pop    %rax
jmp    1070 <sleep@plt>

LLVM IR (-O0):
define void @init() {
%1 = call i32 (...) @closePwmIfOpened()
%2 = call i32 (...) @initGpio()
%3 = call i32 (...) @initPwm()
%4 = call i32 (...) @initVariable()
%5 = call i32 @sleep(i32 2)
ret void
}

LLVM IR (-O2):
define void @init() {
%1 = tail call i32 (...) @closePwmIfOpened()
%2 = tail call i32 (...) @initGpio()
%3 = tail call i32 (...) @initPwm()
%4 = tail call i32 (...) @initVariable()
%5 = tail call i32 @sleep(i32 2)
ret void
}
void Fan0_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<Fan0_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <Fan0_Handler+0x9>
jmp    1109 <Fan0_Handler+0x9>

x86 assembly (clang, -O2):
<Fan0_Handler>:
jmp    1100 <Fan0_Handler>

LLVM IR (-O0):
define void @Fan0_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @Fan0_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_N16_swap(char *, int, int);
void U_WMRDELETEOBJECT_swap(char *record, int torev) {
  U_WMRCORE_N16_swap(record, 1, torev);
}


x86 assembly (clang, -O0):
<U_WMRDELETEOBJECT_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x1,%esi
call   1030 <U_WMRCORE_N16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRDELETEOBJECT_swap>:
mov    %esi,%edx
mov    $0x1,%esi
jmp    1030 <U_WMRCORE_N16_swap@plt>

LLVM IR (-O0):
define void @U_WMRDELETEOBJECT_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_N16_swap(i8* %5, i32 1, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMRDELETEOBJECT_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_N16_swap(i8* %0, i32 1, i32 %1)
ret void
}
void foo(void) { (*"c")++; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    0xef6(%rip),%al
add    $0x1,%al
mov    %al,0xeee(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
@.str = [2 x i8] c"c\00"
define void @foo() {
%1 = load i8, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
%2 = add i8 %1, 1
store i8 %2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
ret void
}

LLVM IR (-O2):
define void @foo() {
ret void
}
void quat_mul_vec4(const float q[4], const float v[4], float out[4]) {
  float m[4][4];
  quat_to_mat4(q, m);
  mat4_mul_vec4(m, v, out);
}


x86 assembly (clang, -O0):
<quat_mul_vec4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x60(%rbp),%rsi
mov    $0x0,%al
call   1030 <quat_to_mat4@plt>
lea    -0x60(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x0,%al
call   1040 <mat4_mul_vec4@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quat_mul_vec4>:
push   %r15
push   %r14
push   %rbx
sub    $0x40,%rsp
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rsp,%r15
mov    %r15,%rsi
xor    %eax,%eax
call   1030 <quat_to_mat4@plt>
mov    %r15,%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
xor    %eax,%eax
call   1040 <mat4_mul_vec4@plt>
add    $0x40,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @quat_mul_vec4(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
%7 = alloca [4 x [4 x float]]
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%8 = load float*, float** %4
%9 = getelementptr inbounds [4 x [4 x float]], [4 x [4 x float]]* %7, i64 0, i64 0
%10 = call i32 (float*, [4 x float]*, ...) bitcast (i32 (...)* @quat_to_mat4 to i32 (float*, [4 x float]*, ...)*)(float* %8, [4 x float]* %9)
%11 = getelementptr inbounds [4 x [4 x float]], [4 x [4 x float]]* %7, i64 0, i64 0
%12 = load float*, float** %5
%13 = load float*, float** %6
%14 = call i32 ([4 x float]*, float*, float*, ...) bitcast (i32 (...)* @mat4_mul_vec4 to i32 ([4 x float]*, float*, float*, ...)*)([4 x float]* %11, float* %12, float* %13)
ret void
}

LLVM IR (-O2):
define void @quat_mul_vec4(float* %0, float* %1, float* %2) {
%4 = alloca [4 x [4 x float]]
%5 = bitcast [4 x [4 x float]]* %4 to i8*
%6 = getelementptr inbounds [4 x [4 x float]], [4 x [4 x float]]* %4, i64 0, i64 0
%7 = call i32 (float*, [4 x float]*, ...) bitcast (i32 (...)* @quat_to_mat4 to i32 (float*, [4 x float]*, ...)*)(float* %0, [4 x float]* %6)
%8 = call i32 ([4 x float]*, float*, float*, ...) bitcast (i32 (...)* @mat4_mul_vec4 to i32 ([4 x float]*, float*, float*, ...)*)([4 x float]* %6, float* %1, float* %2)
ret void
}
int DWordAligned(int val) {
  if (val % 4) {
    val >>= 2;
    val <<= 2;
    val += 4;
  }
  return val;
}


x86 assembly (clang, -O0):
<DWordAligned>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     1136 <DWordAligned+0x36>
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x4,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DWordAligned>:
lea    0x4(%rdi),%eax
and    $0xfffffffc,%eax
test   $0x3,%dil
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @DWordAligned(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 4
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* %2
%8 = ashr i32 %7, 2
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = shl i32 %9, 2
store i32 %10, i32* %2
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 4
store i32 %12, i32* %2
br label %13
13: ; preds = %6, %1
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @DWordAligned(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
%4 = add i32 %0, 4
%5 = and i32 %4, -4
%6 = select i1 %3, i32 %0, i32 %5
ret i32 %6
}
void grub_cpu_idle(void) {}


x86 assembly (clang, -O0):
<grub_cpu_idle>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grub_cpu_idle>:
ret

LLVM IR (-O0):
define void @grub_cpu_idle() {
ret void
}

LLVM IR (-O2):
define void @grub_cpu_idle() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_adds_pi8(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 test_mm_adds_pi8(__m64 a, __m64 b) { return _mm_adds_pi8(a, b); }


x86 assembly (clang, -O0):
<test_mm_adds_pi8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_adds_pi8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_adds_pi8>:
jmp    1030 <_mm_adds_pi8@plt>

LLVM IR (-O0):
define i32 @test_mm_adds_pi8(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_adds_pi8(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_adds_pi8(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_adds_pi8(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
size_t strlen(char *);
scalar_t__ strncmp(char *, char *, size_t);
bool str_startswith(char str[], char prefix[]) {
  size_t prefix_len = strlen(prefix);
  if (strlen(str) >= prefix_len)
    return 0 == strncmp(str, prefix, prefix_len);
  return false;
}


x86 assembly (clang, -O0):
<str_startswith>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
cmp    -0x20(%rbp),%rax
jb     1179 <str_startswith+0x59>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <strncmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    1180 <str_startswith+0x60>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_startswith>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %rax,%rbx
mov    %r15,%rdi
call   1040 <strlen@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rbx,%rcx
jb     1161 <str_startswith+0x41>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <strncmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @str_startswith(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %5
%8 = call i64 @strlen(i8* %7)
store i64 %8, i64* %6
%9 = load i8*, i8** %4
%10 = call i64 @strlen(i8* %9)
%11 = load i64, i64* %6
%12 = icmp uge i64 %10, %11
br i1 %12, label %13, label %20
13: ; preds = %2
%14 = load i8*, i8** %4
%15 = load i8*, i8** %5
%16 = load i64, i64* %6
%17 = call i64 @strncmp(i8* %14, i8* %15, i64 %16)
%18 = icmp eq i64 0, %17
%19 = zext i1 %18 to i32
store i32 %19, i32* %3
br label %21
20: ; preds = %2
store i32 0, i32* %3
br label %21
21: ; preds = %20, %13
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @str_startswith(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%5 = icmp ult i64 %4, %3
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i64 @strncmp(i8* %0, i8* %1, i64 %3)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %2, %6
%11 = phi i32 [ %9, %6 ], [ 0, %2 ]
ret i32 %11
}
int xmlUCSIsControlPictures(int code) {
  return (((code >= 0x2400) && (code <= 0x243F)));
}


x86 assembly (clang, -O0):
<xmlUCSIsControlPictures>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x2400,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1126 <xmlUCSIsControlPictures+0x26>
cmpl   $0x243f,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmlUCSIsControlPictures>:
and    $0xffffffc0,%edi
xor    %eax,%eax
cmp    $0x2400,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @xmlUCSIsControlPictures(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 9216
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 9279
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xmlUCSIsControlPictures(i32 %0) {
%2 = and i32 %0, -64
%3 = icmp eq i32 %2, 9216
%4 = zext i1 %3 to i32
ret i32 %4
}
void *list_copy_short(void *_data) {
  short *new_data = malloc(sizeof(short));
  memcpy(new_data, _data, sizeof(short));
  return new_data;
}


x86 assembly (clang, -O0):
<list_copy_short>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%cx
mov    %cx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_copy_short>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2,%edi
call   1030 <malloc@plt>
movzwl (%rbx),%ecx
mov    %cx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i8* @list_copy_short(i8* %0) {
%2 = alloca i8*
%3 = alloca i16*
store i8* %0, i8** %2
%4 = call i8* @malloc(i64 2)
%5 = bitcast i8* %4 to i16*
store i16* %5, i16** %3
%6 = load i16*, i16** %3
%7 = bitcast i16* %6 to i8*
%8 = load i8*, i8** %2
%9 = load i16*, i16** %3
%10 = bitcast i16* %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define noalias i8* @list_copy_short(i8* nocapture %0) {
%2 = tail call dereferenceable_or_null(2) i8* @malloc(i64 2)
%3 = bitcast i8* %0 to i16*
%4 = bitcast i8* %2 to i16*
%5 = load i16, i16* %3
store i16 %5, i16* %4
ret i8* %2
}
int hash(i) { return 0; }


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @hash(i32 %0) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t rot32r7(uint32_t x) { return (x >> 7) | (x << 25); }


x86 assembly (clang, -O0):
<rot32r7>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x7,%eax
mov    -0x4(%rbp),%ecx
shl    $0x19,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rot32r7>:
mov    %edi,%eax
sar    $0x7,%eax
shl    $0x19,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rot32r7(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 7
%5 = load i32, i32* %2
%6 = shl i32 %5, 25
%7 = or i32 %4, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @rot32r7(i32 %0) {
%2 = ashr i32 %0, 7
%3 = shl i32 %0, 25
%4 = or i32 %2, %3
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ arr;

/* Variables and functions */
int /*<<< orphan*/ println(int *, int);
int /*<<< orphan*/ shell_sort(int *, int);
int main() {
  int arr[] = {134, 893, 93, 24, 162, 82, 91, 393};
  int len = sizeof(arr) / sizeof(*arr);
  println(arr, len);
  shell_sort(arr, len);
  println(arr, len);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xec4(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec1(%rip),%rax
mov    %rax,-0x18(%rbp)
movl   $0x8,-0x34(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%esi
call   1030 <println@plt>
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%esi
call   1040 <shell_sort@plt>
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%esi
call   1030 <println@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
movaps 0xee4(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec8(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x8,%esi
call   1030 <println@plt>
mov    %rbx,%rdi
mov    $0x8,%esi
call   1040 <shell_sort@plt>
mov    %rbx,%rdi
mov    $0x8,%esi
call   1030 <println@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.arr = [8 x i32] [i32 134, i32 893, i32 93, i32 24, i32 162, i32 82, i32 91, i32 393]
define i32 @main() {
%1 = alloca i32
%2 = alloca [8 x i32]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [8 x i32]* %2 to i8*
store i32 8, i32* %3
%5 = getelementptr inbounds [8 x i32], [8 x i32]* %2, i64 0, i64 0
%6 = load i32, i32* %3
%7 = call i32 @println(i32* %5, i32 %6)
%8 = getelementptr inbounds [8 x i32], [8 x i32]* %2, i64 0, i64 0
%9 = load i32, i32* %3
%10 = call i32 @shell_sort(i32* %8, i32 %9)
%11 = getelementptr inbounds [8 x i32], [8 x i32]* %2, i64 0, i64 0
%12 = load i32, i32* %3
%13 = call i32 @println(i32* %11, i32 %12)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [8 x i32] [i32 134, i32 893, i32 93, i32 24, i32 162, i32 82, i32 91, i32 393]
define i32 @main() {
%1 = alloca [8 x i32]
%2 = bitcast [8 x i32]* %1 to i8*
%3 = getelementptr inbounds [8 x i32], [8 x i32]* %1, i64 0, i64 0
%4 = call i32 @println(i32* %3, i32 8)
%5 = call i32 @shell_sort(i32* %3, i32 8)
%6 = call i32 @println(i32* %3, i32 8)
ret i32 0
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int sd_bus_open(void **ret) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ecf(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_open>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_open(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_open(i8** nocapture readnone %0) {
%2 = load i32, i32* @EINVAL
%3 = sub nsw i32 0, %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ fill(int /*<<< orphan*/, int /*<<< orphan*/,
                        int /*<<< orphan*/);
int /*<<< orphan*/ smooth();
void setup() {
  smooth();
  fill(0, 0, 0);
}


x86 assembly (clang, -O0):
<setup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <smooth@plt>
xor    %edx,%edx
mov    %edx,%edi
mov    %edx,%esi
call   1030 <fill@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup>:
push   %rax
xor    %eax,%eax
call   1040 <smooth@plt>
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
pop    %rax
jmp    1030 <fill@plt>

LLVM IR (-O0):
define void @setup() {
%1 = call i32 (...) @smooth()
%2 = call i32 @fill(i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @setup() {
%1 = tail call i32 (...) @smooth()
%2 = tail call i32 @fill(i32 0, i32 0, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int PrintArray(int *arr, int length) {
  for (int i = 0; i < length; printf("%d\n", arr[i++]))
    ;
  return 0;
}


x86 assembly (clang, -O0):
<PrintArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115d <PrintArray+0x4d>
jmp    1137 <PrintArray+0x27>
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0x10(%rbp)
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%esi
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
jmp    1126 <PrintArray+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintArray>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1145 <PrintArray+0x35>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
add    $0x1,%rbx
mov    %r14,%rdi
call   1030 <printf@plt>
cmp    %rbx,%r12
jne    1130 <PrintArray+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @PrintArray(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %11, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
br label %11
11: ; preds = %10
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = add nsw i32 %13, 1
store i32 %14, i32* %5
%15 = sext i32 %13 to i64
%16 = getelementptr inbounds i32, i32* %12, i64 %15
%17 = load i32, i32* %16
%18 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %17)
br label %6
19: ; preds = %6
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @PrintArray(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %7
6: ; preds = %7, %2
ret i32 0
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %9, %7 ]
%9 = add nuw nsw i64 %8, 1
%10 = getelementptr inbounds i32, i32* %0, i64 %8
%11 = load i32, i32* %10
%12 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = icmp eq i64 %9, %5
br i1 %13, label %6, label %7
}
/* Variables and functions */
scalar_t__ isalpha(int);
scalar_t__ isdigit(int);
int fuzix_isalnum(int c) { return isdigit(c) || isalpha(c); }


x86 assembly (clang, -O0):
<fuzix_isalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <fuzix_isalnum+0x37>
mov    -0x4(%rbp),%edi
call   1040 <isalpha@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fuzix_isalnum>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <fuzix_isalnum+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1040 <isalpha@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fuzix_isalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isdigit(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @isalpha(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @fuzix_isalnum(i32 %0) {
%2 = tail call i64 @isdigit(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @isalpha(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
int cpuidle_enable_device(struct cpuidle_device *dev) { return -19; }


x86 assembly (clang, -O0):
<cpuidle_enable_device>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffed,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuidle_enable_device>:
mov    $0xffffffed,%eax
ret

LLVM IR (-O0):
%struct.cpuidle_device = type opaque
define i32 @cpuidle_enable_device(%struct.cpuidle_device* %0) {
%2 = alloca %struct.cpuidle_device*
store %struct.cpuidle_device* %0, %struct.cpuidle_device** %2
ret i32 -19
}

LLVM IR (-O2):
%struct.cpuidle_device = type opaque
define i32 @cpuidle_enable_device(%struct.cpuidle_device* nocapture readnone %0) {
ret i32 -19
}
/* Type definitions */
struct sembuf {
  int sem_num;
  int sem_op;
  int /*<<< orphan*/ sem_flg;
};

/* Variables and functions */
int /*<<< orphan*/ SEM_UNDO;
int semop(int, struct sembuf *, int);
int V(int semid, int sem_index) {
  struct sembuf buf;
  buf.sem_num = sem_index;
  buf.sem_op = 1;
  buf.sem_flg = SEM_UNDO;
  if (semop(semid, &buf, 1) == -1)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<V>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
movl   $0x1,-0x14(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x18(%rbp),%rsi
mov    $0x1,%edx
call   1030 <semop@plt>
cmp    $0xffffffff,%eax
jne    115d <V+0x4d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1164 <V+0x54>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<V>:
sub    $0x18,%rsp
mov    %esi,0x8(%rsp)
movl   $0x1,0xc(%rsp)
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
mov    %eax,0x10(%rsp)
lea    0x8(%rsp),%rsi
mov    $0x1,%edx
call   1030 <semop@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
sete   %cl
neg    %ecx
mov    %ecx,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.sembuf = type { i32, i32, i32 }
@SEM_UNDO = global i32 0
define i32 @V(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.sembuf
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %6, i32 0, i32 0
store i32 %7, i32* %8
%9 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %6, i32 0, i32 1
store i32 1, i32* %9
%10 = load i32, i32* @SEM_UNDO
%11 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %6, i32 0, i32 2
store i32 %10, i32* %11
%12 = load i32, i32* %4
%13 = call i32 @semop(i32 %12, %struct.sembuf* %6, i32 1)
%14 = icmp eq i32 %13, -1
br i1 %14, label %15, label %16
15: ; preds = %2
store i32 -1, i32* %3
br label %17
16: ; preds = %2
store i32 0, i32* %3
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
%struct.sembuf = type { i32, i32, i32 }
@SEM_UNDO = global i32 0
define i32 @V(i32 %0, i32 %1) {
%3 = alloca %struct.sembuf
%4 = bitcast %struct.sembuf* %3 to i8*
%5 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %3, i64 0, i32 0
store i32 %1, i32* %5
%6 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %3, i64 0, i32 1
store i32 1, i32* %6
%7 = load i32, i32* @SEM_UNDO
%8 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %3, i64 0, i32 2
store i32 %7, i32* %8
%9 = call i32 @semop(i32 %0, %struct.sembuf* %3, i32 1)
%10 = icmp eq i32 %9, -1
%11 = sext i1 %10 to i32
ret i32 %11
}
/* Variables and functions */
double fabs(double);
short double_is_equal(double a, double b) { return fabs(a - b) < 0.00001; }


x86 assembly (clang, -O0):
<double_is_equal>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
subsd  -0x10(%rbp),%xmm1
movaps 0xef1(%rip),%xmm0
pand   %xmm0,%xmm1
movsd  0xed5(%rip),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_is_equal>:
subsd  %xmm1,%xmm0
andpd  0xef4(%rip),%xmm0
movsd  0xefc(%rip),%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
seta   %al
ret

LLVM IR (-O0):
define signext i16 @double_is_equal(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double %5, %6
%8 = call double @llvm.fabs.f64(double %7)
%9 = fcmp olt double %8, 1.000000e-05
%10 = zext i1 %9 to i32
%11 = trunc i32 %10 to i16
ret i16 %11
}

LLVM IR (-O2):
define signext i16 @double_is_equal(double %0, double %1) {
%3 = fsub double %0, %1
%4 = tail call double @llvm.fabs.f64(double %3)
%5 = fcmp olt double %4, 1.000000e-05
%6 = zext i1 %5 to i16
ret i16 %6
}
int strhash(char *x) {
  int h = 0;
  while (*x)
    h = h * 13 + *(x++);
  return h;
}


x86 assembly (clang, -O0):
<strhash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     113c <strhash+0x3c>
imul   $0xd,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movsbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <strhash+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strhash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1127 <strhash+0x27>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
lea    (%rax,%rax,2),%edx
lea    (%rax,%rdx,4),%edx
movsbl %cl,%eax
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <strhash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @strhash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 13
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = add nsw i32 %10, %14
store i32 %15, i32* %3
br label %4
16: ; preds = %4
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @strhash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i32 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = mul nsw i32 %6, 13
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = sext i8 %5 to i32
%11 = add nsw i32 %8, %10
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %15
}
/* Type definitions */
struct cramfs_inode {
  int dummy;
};

/* Variables and functions */
struct cramfs_inode *cramfs_iget(int /*<<< orphan*/);
int /*<<< orphan*/ romfs_read(unsigned int);
struct cramfs_inode *iget(unsigned int ino) {
  return cramfs_iget(romfs_read(ino));
}


x86 assembly (clang, -O0):
<iget>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <romfs_read@plt>
mov    %eax,%edi
call   1040 <cramfs_iget@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iget>:
push   %rax
call   1030 <romfs_read@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <cramfs_iget@plt>

LLVM IR (-O0):
%struct.cramfs_inode = type { i32 }
define %struct.cramfs_inode* @iget(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @romfs_read(i32 %3)
%5 = call %struct.cramfs_inode* @cramfs_iget(i32 %4)
ret %struct.cramfs_inode* %5
}

LLVM IR (-O2):
%struct.cramfs_inode = type { i32 }
define %struct.cramfs_inode* @iget(i32 %0) {
%2 = tail call i32 @romfs_read(i32 %0)
%3 = tail call %struct.cramfs_inode* @cramfs_iget(i32 %2)
ret %struct.cramfs_inode* %3
}