xunge/DecIR huggingface dataset:
void quat_conjugate(float *dst) {
  dst[0] = -dst[0];
  dst[1] = -dst[1];
  dst[2] = -dst[2];
  dst[3] = dst[3];
}


x86 assembly (clang, -O0):
<quat_conjugate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movss  0xc(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<quat_conjugate>:
movaps 0xef9(%rip),%xmm0
movss  (%rdi),%xmm1
movss  0x4(%rdi),%xmm2
movss  0x8(%rdi),%xmm3
xorps  %xmm0,%xmm1
movss  %xmm1,(%rdi)
xorps  %xmm0,%xmm2
movss  %xmm2,0x4(%rdi)
xorps  %xmm0,%xmm3
movss  %xmm3,0x8(%rdi)
ret

LLVM IR (-O0):
define void @quat_conjugate(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = fneg float %5
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 0
store float %6, float* %8
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 1
%11 = load float, float* %10
%12 = fneg float %11
%13 = load float*, float** %2
%14 = getelementptr inbounds float, float* %13, i64 1
store float %12, float* %14
%15 = load float*, float** %2
%16 = getelementptr inbounds float, float* %15, i64 2
%17 = load float, float* %16
%18 = fneg float %17
%19 = load float*, float** %2
%20 = getelementptr inbounds float, float* %19, i64 2
store float %18, float* %20
%21 = load float*, float** %2
%22 = getelementptr inbounds float, float* %21, i64 3
%23 = load float, float* %22
%24 = load float*, float** %2
%25 = getelementptr inbounds float, float* %24, i64 3
store float %23, float* %25
ret void
}

LLVM IR (-O2):
define void @quat_conjugate(float* nocapture %0) {
%2 = load float, float* %0
%3 = fneg float %2
store float %3, float* %0
%4 = getelementptr inbounds float, float* %0, i64 1
%5 = load float, float* %4
%6 = fneg float %5
store float %6, float* %4
%7 = getelementptr inbounds float, float* %0, i64 2
%8 = load float, float* %7
%9 = fneg float %8
store float %9, float* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0xff() {
  Assert_real((isdigit(255) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              1280, ("isdigit should be 0 for 0xff"));
}


x86 assembly (clang, -O0):
<t_isdigit_0xff>:
push   %rbp
mov    %rsp,%rbp
mov    $0xff,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x500,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0xff>:
push   %rax
mov    $0xff,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x500,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xff\00"
define void @t_isdigit_0xff() {
%1 = call i64 @isdigit(i32 255)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1280, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0xff\00"
define void @t_isdigit_0xff() {
%1 = tail call i64 @isdigit(i32 255)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1280, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ t1000_emsboard_load();
int /*<<< orphan*/ t1200_state_load();
void t1200_nvr_load(void) {
  t1000_emsboard_load();
  t1200_state_load();
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <t1000_emsboard_load@plt>
mov    $0x0,%al
call   1040 <t1200_state_load@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
xor    %eax,%eax
call   1030 <t1000_emsboard_load@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <t1200_state_load@plt>

LLVM IR (-O0):
define void @t1200_nvr_load() {
%1 = call i32 (...) @t1000_emsboard_load()
%2 = call i32 (...) @t1200_state_load()
ret void
}

LLVM IR (-O2):
define void @t1200_nvr_load() {
%1 = tail call i32 (...) @t1000_emsboard_load()
%2 = tail call i32 (...) @t1200_state_load()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SHA256(unsigned char *, unsigned long long, unsigned char *);
int SHA256_VST(unsigned char *in, unsigned char *out,
               unsigned long long inlen) {
  SHA256(in, inlen, out);
  return 1;
}


x86 assembly (clang, -O0):
<SHA256_VST>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <SHA256@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHA256_VST>:
push   %rax
mov    %rsi,%rax
mov    %rdx,%rsi
mov    %rax,%rdx
call   1030 <SHA256@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @SHA256_VST(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %6
%9 = load i8*, i8** %5
%10 = call i32 @SHA256(i8* %7, i64 %8, i8* %9)
ret i32 1
}

LLVM IR (-O2):
define i32 @SHA256_VST(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @SHA256(i8* %0, i64 %2, i8* %1)
ret i32 1
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
typedef int /*<<< orphan*/ u_int;
struct TYPE_3__ {
  scalar_t__ x_private;
};
typedef TYPE_1__ XDR;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ ftell(int /*<<< orphan*/ *);
u_int xdrstdio_getpos(const XDR *xdrs) {
  return (u_int)ftell((FILE *)xdrs->x_private);
}


x86 assembly (clang, -O0):
<xdrstdio_getpos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <ftell@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdrstdio_getpos>:
mov    (%rdi),%rdi
jmp    1030 <ftell@plt>

LLVM IR (-O0):
%struct.TYPE_3__ = type { i64 }
define i32 @xdrstdio_getpos(%struct.TYPE_3__* %0) {
%2 = alloca %struct.TYPE_3__*
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %2
%3 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i32 0, i32 0
%5 = load i64, i64* %4
%6 = inttoptr i64 %5 to i32*
%7 = call i32 @ftell(i32* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i64 }
define i32 @xdrstdio_getpos(%struct.TYPE_3__* nocapture %0) {
%2 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 0
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i32*
%5 = tail call i32 @ftell(i32* %4)
ret i32 %5
}
int gn(char *cp) {
  int val = 0;
  char d;
  while ('0' <= (d = *cp++) && d <= '9') {
    val = val * 10 + (d - '0');
  }
  return (val);
}


x86 assembly (clang, -O0):
<gn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%al
mov    %al,-0xd(%rbp)
movsbl %al,%edx
xor    %eax,%eax
mov    $0x30,%ecx
cmp    %edx,%ecx
mov    %al,-0xe(%rbp)
jg     1145 <gn+0x45>
movsbl -0xd(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0xe(%rbp)
mov    -0xe(%rbp),%al
test   $0x1,%al
jne    1155 <gn+0x55>
jmp    116a <gn+0x6a>
imul   $0xa,-0xc(%rbp),%eax
movsbl -0xd(%rbp),%ecx
sub    $0x30,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <gn+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gn>:
mov    (%rdi),%cl
lea    -0x30(%rcx),%edx
xor    %eax,%eax
cmp    $0x9,%dl
ja     113b <gn+0x3b>
add    $0x1,%rdi
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl %cl,%ecx
lea    (%rax,%rax,4),%eax
lea    (%rcx,%rax,2),%eax
add    $0xffffffd0,%eax
movzbl (%rdi),%ecx
lea    -0x30(%rcx),%edx
add    $0x1,%rdi
cmp    $0xa,%dl
jb     1120 <gn+0x20>
ret

LLVM IR (-O0):
define i32 @gn(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8
store i8* %0, i8** %2
store i32 0, i32* %3
br label %5
5: ; preds = %17, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
store i8 %8, i8* %4
%9 = sext i8 %8 to i32
%10 = icmp sle i32 48, %9
br i1 %10, label %11, label %15
11: ; preds = %5
%12 = load i8, i8* %4
%13 = sext i8 %12 to i32
%14 = icmp sle i32 %13, 57
br label %15
15: ; preds = %11, %5
%16 = phi i1 [ false, %5 ], [ %14, %11 ]
br i1 %16, label %17, label %24
17: ; preds = %15
%18 = load i32, i32* %3
%19 = mul nsw i32 %18, 10
%20 = load i8, i8* %4
%21 = sext i8 %20 to i32
%22 = sub nsw i32 %21, 48
%23 = add nsw i32 %19, %22
store i32 %23, i32* %3
br label %5
24: ; preds = %15
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @gn(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = add i8 %2, -48
%4 = icmp ult i8 %3, 10
br i1 %4, label %5, label %17
5: ; preds = %1, %5
%6 = phi i8 [ %14, %5 ], [ %2, %1 ]
%7 = phi i8* [ %10, %5 ], [ %0, %1 ]
%8 = phi i32 [ %13, %5 ], [ 0, %1 ]
%9 = zext i8 %6 to i32
%10 = getelementptr inbounds i8, i8* %7, i64 1
%11 = mul nsw i32 %8, 10
%12 = add i32 %11, -48
%13 = add i32 %12, %9
%14 = load i8, i8* %10
%15 = add i8 %14, -48
%16 = icmp ult i8 %15, 10
br i1 %16, label %5, label %17
17: ; preds = %5, %1
%18 = phi i32 [ 0, %1 ], [ %13, %5 ]
ret i32 %18
}
/* Type definitions */
struct xhda_codec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fixup_via_mic_boost(struct xhda_codec *, int,
                                       int /*<<< orphan*/, int, int);
void fixup_vt1708S(struct xhda_codec *codec) {
  fixup_via_mic_boost(codec, 0x1a, 0, 3, 40);
  fixup_via_mic_boost(codec, 0x1e, 0, 3, 40);
}


x86 assembly (clang, -O0):
<fixup_vt1708S>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1a,%esi
xor    %edx,%edx
mov    $0x3,%ecx
mov    $0x28,%r8d
call   1030 <fixup_via_mic_boost@plt>
mov    -0x8(%rbp),%rdi
mov    $0x1e,%esi
xor    %edx,%edx
mov    $0x3,%ecx
mov    $0x28,%r8d
call   1030 <fixup_via_mic_boost@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fixup_vt1708S>:
push   %rbx
mov    %rdi,%rbx
mov    $0x1a,%esi
xor    %edx,%edx
mov    $0x3,%ecx
mov    $0x28,%r8d
call   1030 <fixup_via_mic_boost@plt>
mov    %rbx,%rdi
mov    $0x1e,%esi
xor    %edx,%edx
mov    $0x3,%ecx
mov    $0x28,%r8d
pop    %rbx
jmp    1030 <fixup_via_mic_boost@plt>

LLVM IR (-O0):
%struct.xhda_codec = type { i32 }
define void @fixup_vt1708S(%struct.xhda_codec* %0) {
%2 = alloca %struct.xhda_codec*
store %struct.xhda_codec* %0, %struct.xhda_codec** %2
%3 = load %struct.xhda_codec*, %struct.xhda_codec** %2
%4 = call i32 @fixup_via_mic_boost(%struct.xhda_codec* %3, i32 26, i32 0, i32 3, i32 40)
%5 = load %struct.xhda_codec*, %struct.xhda_codec** %2
%6 = call i32 @fixup_via_mic_boost(%struct.xhda_codec* %5, i32 30, i32 0, i32 3, i32 40)
ret void
}

LLVM IR (-O2):
%struct.xhda_codec = type { i32 }
define void @fixup_vt1708S(%struct.xhda_codec* %0) {
%2 = tail call i32 @fixup_via_mic_boost(%struct.xhda_codec* %0, i32 26, i32 0, i32 3, i32 40)
%3 = tail call i32 @fixup_via_mic_boost(%struct.xhda_codec* %0, i32 30, i32 0, i32 3, i32 40)
ret void
}
long next_triangle_num(void) {
  static long last_index = 0;
  static long last_num = 0;
  last_num += last_index + 1;
  last_index++;
  return last_num;
}


x86 assembly (clang, -O0):
<next_triangle_num>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1d(%rip),%rax
add    $0x1,%rax
add    0x2f1a(%rip),%rax
mov    %rax,0x2f13(%rip)
mov    0x2f04(%rip),%rax
add    $0x1,%rax
mov    %rax,0x2ef9(%rip)
mov    0x2efa(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_triangle_num>:
mov    0x2f21(%rip),%rcx
add    $0x1,%rcx
mov    0x2f1e(%rip),%rax
add    %rcx,%rax
mov    %rax,0x2f14(%rip)
mov    %rcx,0x2f05(%rip)
ret

LLVM IR (-O0):
@next_triangle_num.last_index = internal global i64 0
@next_triangle_num.last_num = internal global i64 0
define i64 @next_triangle_num() {
%1 = load i64, i64* @next_triangle_num.last_index
%2 = add nsw i64 %1, 1
%3 = load i64, i64* @next_triangle_num.last_num
%4 = add nsw i64 %3, %2
store i64 %4, i64* @next_triangle_num.last_num
%5 = load i64, i64* @next_triangle_num.last_index
%6 = add nsw i64 %5, 1
store i64 %6, i64* @next_triangle_num.last_index
%7 = load i64, i64* @next_triangle_num.last_num
ret i64 %7
}

LLVM IR (-O2):
@next_triangle_num.last_index = internal unnamed_addr global i64 0
@next_triangle_num.last_num = internal unnamed_addr global i64 0
define i64 @next_triangle_num() {
%1 = load i64, i64* @next_triangle_num.last_index
%2 = add nsw i64 %1, 1
%3 = load i64, i64* @next_triangle_num.last_num
%4 = add nsw i64 %3, %2
store i64 %4, i64* @next_triangle_num.last_num
store i64 %2, i64* @next_triangle_num.last_index
ret i64 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int ENOSYS;
int pthread_attr_getinheritsched(const pthread_attr_t *attr, int *sched) {
  return (ENOSYS);
}


x86 assembly (clang, -O0):
<pthread_attr_getinheritsched>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_attr_getinheritsched>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @pthread_attr_getinheritsched(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32, i32* @ENOSYS
ret i32 %5
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @pthread_attr_getinheritsched(i32* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ prn_help_msg();
int /*<<< orphan*/ set_cursor_visibility(int);
int main() {
  set_cursor_visibility(false);
  prn_help_msg();
  set_cursor_visibility(true);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1040 <set_cursor_visibility@plt>
mov    $0x0,%al
call   1030 <prn_help_msg@plt>
mov    $0x1,%edi
call   1040 <set_cursor_visibility@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1040 <set_cursor_visibility@plt>
xor    %eax,%eax
call   1030 <prn_help_msg@plt>
mov    $0x1,%edi
call   1040 <set_cursor_visibility@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @set_cursor_visibility(i32 0)
%3 = call i32 (...) @prn_help_msg()
%4 = call i32 @set_cursor_visibility(i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @set_cursor_visibility(i32 0)
%2 = tail call i32 (...) @prn_help_msg()
%3 = tail call i32 @set_cursor_visibility(i32 1)
ret i32 0
}
int ffs(int mask) {
  int bit;
  if (mask == 0)
    return (0);
  for (bit = 1; !(mask & 1); bit++)
    mask >>= 1;
  return (bit);
}


x86 assembly (clang, -O0):
<ffs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111d <ffs+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    115c <ffs+0x5c>
movl   $0x1,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    113f <ffs+0x3f>
jmp    1156 <ffs+0x56>
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1124 <ffs+0x24>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffs>:
test   %edi,%edi
je     112e <ffs+0x2e>
mov    $0x1,%eax
test   $0x1,%dil
jne    112d <ffs+0x2d>
mov    $0x1,%eax
mov    %edi,%ecx
cs nopw 0x0(%rax,%rax,1)
sar    %ecx
add    $0x1,%eax
test   $0x2,%dil
mov    %ecx,%edi
je     1120 <ffs+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ffs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %22
8: ; preds = %1
store i32 1, i32* %4
br label %9
9: ; preds = %17, %8
%10 = load i32, i32* %3
%11 = and i32 %10, 1
%12 = icmp ne i32 %11, 0
%13 = xor i1 %12, true
br i1 %13, label %14, label %20
14: ; preds = %9
%15 = load i32, i32* %3
%16 = ashr i32 %15, 1
store i32 %16, i32* %3
br label %17
17: ; preds = %14
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %9
20: ; preds = %9
%21 = load i32, i32* %4
store i32 %21, i32* %2
br label %22
22: ; preds = %20, %7
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @ffs(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = and i32 %0, 1
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %3, %6
%7 = phi i32 [ %10, %6 ], [ 1, %3 ]
%8 = phi i32 [ %9, %6 ], [ %0, %3 ]
%9 = ashr i32 %8, 1
%10 = add nuw nsw i32 %7, 1
%11 = and i32 %8, 2
%12 = icmp eq i32 %11, 0
br i1 %12, label %6, label %13
13: ; preds = %6, %3, %1
%14 = phi i32 [ 0, %1 ], [ 1, %3 ], [ %10, %6 ]
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ syscall0(int /*<<< orphan*/);
void puts(const char *s) { syscall0((uint64_t)s); }


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
call   1030 <syscall0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
jmp    1030 <syscall0@plt>

LLVM IR (-O0):
define void @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i32
%5 = call i32 @syscall0(i32 %4)
ret void
}

LLVM IR (-O2):
define void @puts(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = tail call i32 @syscall0(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ instance1(int /*<<< orphan*/);
int /*<<< orphan*/ instance2(int /*<<< orphan*/);
int /*<<< orphan*/ instance3(int /*<<< orphan*/);
int /*<<< orphan*/ instance4(int /*<<< orphan*/);
int /*<<< orphan*/ instance5(int /*<<< orphan*/);
int /*<<< orphan*/ instance6(int /*<<< orphan*/);
int /*<<< orphan*/ instance7(int /*<<< orphan*/);
int main() {
__CPROVER_ASYNC_0:
  instance1(0);
__CPROVER_ASYNC_1:
  instance2(0);
__CPROVER_ASYNC_2:
  instance3(0);
__CPROVER_ASYNC_3:
  instance4(0);
__CPROVER_ASYNC_4:
  instance5(0);
__CPROVER_ASYNC_5:
  instance6(0);
__CPROVER_ASYNC_6:
  instance7(0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1090 <instance1@plt>
xor    %edi,%edi
call   1040 <instance2@plt>
xor    %edi,%edi
call   1070 <instance3@plt>
xor    %edi,%edi
call   1030 <instance4@plt>
xor    %edi,%edi
call   1080 <instance5@plt>
xor    %edi,%edi
call   1050 <instance6@plt>
xor    %edi,%edi
call   1060 <instance7@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1090 <instance1@plt>
xor    %edi,%edi
call   1040 <instance2@plt>
xor    %edi,%edi
call   1070 <instance3@plt>
xor    %edi,%edi
call   1030 <instance4@plt>
xor    %edi,%edi
call   1080 <instance5@plt>
xor    %edi,%edi
call   1050 <instance6@plt>
xor    %edi,%edi
call   1060 <instance7@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0
%3 = call i32 @instance1(i32 0)
br label %4
4: ; preds = %2
%5 = call i32 @instance2(i32 0)
br label %6
6: ; preds = %4
%7 = call i32 @instance3(i32 0)
br label %8
8: ; preds = %6
%9 = call i32 @instance4(i32 0)
br label %10
10: ; preds = %8
%11 = call i32 @instance5(i32 0)
br label %12
12: ; preds = %10
%13 = call i32 @instance6(i32 0)
br label %14
14: ; preds = %12
%15 = call i32 @instance7(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @instance1(i32 0)
%2 = tail call i32 @instance2(i32 0)
%3 = tail call i32 @instance3(i32 0)
%4 = tail call i32 @instance4(i32 0)
%5 = tail call i32 @instance5(i32 0)
%6 = tail call i32 @instance6(i32 0)
%7 = tail call i32 @instance7(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int i = 0 / 5;
  int j = -2 / 5;
  printf("i = %d, j = %d\n", i, j);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"i = %d, j = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %1
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"i = %d, j = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 0, i32 0)
ret i32 0
}
/* Variables and functions */
int getchar();
void b_getchar(int idx, int *cells) { cells[idx] = getchar(); }


x86 assembly (clang, -O0):
<b_getchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %eax,%edx
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_getchar>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <getchar@plt>
movslq %ebp,%rcx
mov    %eax,(%rbx,%rcx,4)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @b_getchar(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = call i32 (...) @getchar()
%6 = load i32*, i32** %4
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %6, i64 %8
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @b_getchar(i32 %0, i32* nocapture writeonly %1) {
%3 = tail call i32 (...) @getchar()
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds i32, i32* %1, i64 %4
store i32 %3, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, char *);
void rtxPrintCharStr(const char *name, const char *cstring) {
  printf("%s = '%s'\n", name, (cstring == 0) ? "(null)" : cstring);
}


x86 assembly (clang, -O0):
<rtxPrintCharStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1143 <rtxPrintCharStr+0x33>
lea    0xed1(%rip),%rax
mov    %rax,-0x20(%rbp)
jmp    114b <rtxPrintCharStr+0x3b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtxPrintCharStr>:
mov    %rdi,%rax
test   %rsi,%rsi
lea    0xeee(%rip),%rdx
cmovne %rsi,%rdx
lea    0xed8(%rip),%rdi
mov    %rax,%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"%s = '%s'\0A\00"
@.str.1 = [7 x i8] c"(null)\00"
define void @rtxPrintCharStr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %9
8: ; preds = %2
br label %11
9: ; preds = %2
%10 = load i8*, i8** %4
br label %11
11: ; preds = %9, %8
%12 = phi i8* [ getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), %8 ], [ %10, %9 ]
%13 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %12)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"%s = '%s'\0A\00"
@.str.1 = [7 x i8] c"(null)\00"
define void @rtxPrintCharStr(i8* %0, i8* %1) {
%3 = icmp eq i8* %1, null
%4 = select i1 %3, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %1
%5 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %4)
ret void
}
/* Type definitions */
struct stat {
  int st_mode;
};

/* Variables and functions */
int S_IFDIR;
scalar_t__ stat(char const *, struct stat *);
int io_direxists(const char *path) {
  struct stat buf;
  if (stat(path, &buf) == 0) {
    if (buf.st_mode & S_IFDIR)
      return 1;
    else
      return 0;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<io_direxists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
jne    1160 <io_direxists+0x50>
mov    -0x18(%rbp),%eax
mov    0x2e9b(%rip),%rcx
and    (%rcx),%eax
cmp    $0x0,%eax
je     1154 <io_direxists+0x44>
movl   $0x1,-0x4(%rbp)
jmp    1167 <io_direxists+0x57>
movl   $0x0,-0x4(%rbp)
jmp    1167 <io_direxists+0x57>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_direxists>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
je     1125 <io_direxists+0x15>
pop    %rcx
ret
mov    0x2eac(%rip),%rax
mov    (%rax),%ecx
xor    %eax,%eax
test   %ecx,(%rsp)
setne  %al
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@S_IFDIR = global i32 0
define i32 @io_direxists(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.stat
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @stat(i8* %5, %struct.stat* %4)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %16
8: ; preds = %1
%9 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%10 = load i32, i32* %9
%11 = load i32, i32* @S_IFDIR
%12 = and i32 %10, %11
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %8
store i32 1, i32* %2
br label %17
15: ; preds = %8
store i32 0, i32* %2
br label %17
16: ; preds = %1
store i32 0, i32* %2
br label %17
17: ; preds = %16, %15, %14
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@S_IFDIR = global i32 0
define i32 @io_direxists(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%8 = load i32, i32* %7
%9 = load i32, i32* @S_IFDIR
%10 = and i32 %9, %8
%11 = icmp ne i32 %10, 0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %1, %6
%14 = phi i32 [ %12, %6 ], [ 0, %1 ]
ret i32 %14
}
unsigned int cpuid_edx(unsigned int op) {
  unsigned int eax, edx;
  __asm__("cpuid" : "=a"(eax), "=d"(edx) : "0"(op) : "bx", "cx");
  return edx;
}


x86 assembly (clang, -O0):
<cpuid_edx>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cpuid
mov    %eax,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuid_edx>:
push   %rbx
mov    %edi,%eax
cpuid
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @cpuid_edx(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = call { i32, i32 } asm "cpuid", "={ax},={dx},0,~{bx},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 %5)
%7 = extractvalue { i32, i32 } %6, 0
%8 = extractvalue { i32, i32 } %6, 1
store i32 %7, i32* %3
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @cpuid_edx(i32 %0) {
%2 = tail call { i32, i32 } asm "cpuid", "={ax},={dx},0,~{bx},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
%3 = extractvalue { i32, i32 } %2, 1
ret i32 %3
}
/* Variables and functions */
int asnReadIA5(char *, int, int);
int asnReadLength(long *);
int asnReadIA5L(char *value, int maxlen) {
  long length;
  if (asnReadLength(&length) == -1)
    return -1;
  return asnReadIA5(value, (int)length, maxlen);
}


x86 assembly (clang, -O0):
<asnReadIA5L>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
lea    -0x20(%rbp),%rdi
call   1040 <asnReadLength@plt>
cmp    $0xffffffff,%eax
jne    114d <asnReadIA5L+0x2d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1162 <asnReadIA5L+0x42>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rax
mov    %eax,%esi
mov    -0x14(%rbp),%edx
call   1030 <asnReadIA5@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<asnReadIA5L>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    %rsp,%rdi
call   1040 <asnReadLength@plt>
cmp    $0xffffffff,%eax
je     1144 <asnReadIA5L+0x24>
mov    (%rsp),%esi
mov    %rbx,%rdi
mov    %ebp,%edx
call   1030 <asnReadIA5@plt>
jmp    1149 <asnReadIA5L+0x29>
mov    $0xffffffff,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @asnReadIA5L(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = call i32 @asnReadLength(i64* %6)
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %16
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = load i64, i64* %6
%13 = trunc i64 %12 to i32
%14 = load i32, i32* %5
%15 = call i32 @asnReadIA5(i8* %11, i32 %13, i32 %14)
store i32 %15, i32* %3
br label %16
16: ; preds = %10, %9
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @asnReadIA5L(i8* %0, i32 %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = call i32 @asnReadLength(i64* %3)
%6 = icmp eq i32 %5, -1
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = load i64, i64* %3
%9 = trunc i64 %8 to i32
%10 = call i32 @asnReadIA5(i8* %0, i32 %9, i32 %1)
br label %11
11: ; preds = %2, %7
%12 = phi i32 [ %10, %7 ], [ -1, %2 ]
ret i32 %12
}
void *memcopy(void *p, int len) {
  ;
  char *q = malloc(len);
  if (!q)
    fatal("out of dynamic memory");
  memcpy(q, p, len);
  return (q);
}


x86 assembly (clang, -O0):
<memcopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movslq -0xc(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1165 <memcopy+0x35>
lea    0xea2(%rip),%rdi
mov    $0x0,%al
call   1050 <fatal@plt>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
movslq -0xc(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcopy>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
movslq %esi,%r15
mov    %r15,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1159 <memcopy+0x29>
lea    0xeae(%rip),%rdi
xor    %eax,%eax
call   1050 <fatal@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"out of dynamic memory\00"
define i8* @memcopy(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = call i8* @malloc(i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 (i8*, ...) bitcast (i32 (...)* @fatal to i32 (i8*, ...)*)(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %5
%15 = load i8*, i8** %3
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
@.str = [22 x i8] c"out of dynamic memory\00"
define i8* @memcopy(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 (i8*, ...) bitcast (i32 (...)* @fatal to i32 (i8*, ...)*)(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %2
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %4, i8* align 1 %0, i64 %3, i1 false)
ret i8* %4
}
int test_imm_6Dint64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x6D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Dint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x6d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Dint64_midword_mem>:
testb  $0x6d,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Dint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 109
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_6Dint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 7143424
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
char *malloc(int);
int read(int /*<<< orphan*/, char *, int);
char *readLine() {
  ssize_t ret;
  char *buff;
  if ((buff = malloc(sizeof(*buff) * (50 + 1))) == NULL)
    return (NULL);
  if ((ret = read(0, buff, 50)) > 1) {
    buff[ret - 1] = '\0';
    return (buff);
  }
  buff[0] = '\0';
  return (buff);
}


x86 assembly (clang, -O0):
<readLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x33,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    114d <readLine+0x2d>
movq   $0x0,-0x8(%rbp)
jmp    1196 <readLine+0x76>
mov    -0x18(%rbp),%rsi
xor    %edi,%edi
mov    $0x32,%edx
call   1030 <read@plt>
mov    %eax,-0xc(%rbp)
cmp    $0x1,%eax
jle    1187 <readLine+0x67>
mov    -0x18(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1196 <readLine+0x76>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readLine>:
push   %rbp
push   %rbx
push   %rax
mov    $0x33,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1153 <readLine+0x33>
xor    %ebp,%ebp
xor    %edi,%edi
mov    %rbx,%rsi
mov    $0x32,%edx
call   1030 <read@plt>
lea    -0x1(%rax),%ecx
cmp    $0x2,%eax
cmovl  %ebp,%ecx
movb   $0x0,(%rbx,%rcx,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @readLine() {
%1 = alloca i8*
%2 = alloca i32
%3 = alloca i8*
%4 = call i8* @malloc(i32 51)
store i8* %4, i8** %3
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %0
store i8* null, i8** %1
br label %22
7: ; preds = %0
%8 = load i8*, i8** %3
%9 = call i32 @read(i32 0, i8* %8, i32 50)
store i32 %9, i32* %2
%10 = icmp sgt i32 %9, 1
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i8*, i8** %3
%13 = load i32, i32* %2
%14 = sub nsw i32 %13, 1
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %12, i64 %15
store i8 0, i8* %16
%17 = load i8*, i8** %3
store i8* %17, i8** %1
br label %22
18: ; preds = %7
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i64 0
store i8 0, i8* %20
%21 = load i8*, i8** %3
store i8* %21, i8** %1
br label %22
22: ; preds = %18, %11, %6
%23 = load i8*, i8** %1
ret i8* %23
}

LLVM IR (-O2):
define noalias i8* @readLine() {
%1 = tail call dereferenceable_or_null(51) i8* @malloc(i32 51)
%2 = icmp eq i8* %1, null
br i1 %2, label %10, label %3
3: ; preds = %0
%4 = tail call i32 @read(i32 0, i8* %1, i32 50)
%5 = icmp sgt i32 %4, 1
%6 = add nsw i32 %4, -1
%7 = select i1 %5, i32 %6, i32 0
%8 = zext i32 %7 to i64
%9 = getelementptr i8, i8* %1, i64 %8
store i8 0, i8* %9
br label %10
10: ; preds = %3, %0
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_help_d() {
  printf("dnat options:\n"
         " --to-dst address       : MAC address to map destination to\n"
         " --dnat-target target   : ACCEPT, DROP, RETURN or CONTINUE\n");
}


x86 assembly (clang, -O0):
<print_help_d>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help_d>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [134 x i8] c"dnat options:\0A --to-dst address : MAC address to map destination to\0A --dnat-target target : ACCEPT, DROP, RETURN or CONTINUE\0A\00"
define void @print_help_d() {
%1 = call i32 @printf(i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [133 x i8] c"dnat options:\0A --to-dst address : MAC address to map destination to\0A --dnat-target target : ACCEPT, DROP, RETURN or CONTINUE\00"
define void @print_help_d() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([133 x i8], [133 x i8]* @str, i64 0, i64 0))
ret void
}
void gtk_tree_store_newv() {}


x86 assembly (clang, -O0):
<gtk_tree_store_newv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_store_newv>:
ret

LLVM IR (-O0):
define void @gtk_tree_store_newv() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_store_newv() {
ret void
}
/* Type definitions */
struct battle_char {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ add_status(struct battle_char *, int);
scalar_t__ get_random(int /*<<< orphan*/, int);
scalar_t__ mod6(struct battle_char *, struct battle_char *, int);
void silf(struct battle_char *origin, struct battle_char *target) {
  if (get_random(0, 100) < mod6(origin, target, 150))
    add_status(target, 12);
}


x86 assembly (clang, -O0):
<silf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
mov    $0x64,%esi
call   1030 <get_random@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x96,%edx
call   1040 <mod6@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
jge    1180 <silf+0x50>
mov    -0x10(%rbp),%rdi
mov    $0xc,%esi
call   1050 <add_status@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<silf>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %edi,%edi
mov    $0x64,%esi
call   1030 <get_random@plt>
mov    %rax,%rbx
mov    %r15,%rdi
mov    %r14,%rsi
mov    $0x96,%edx
call   1040 <mod6@plt>
cmp    %rax,%rbx
jge    1171 <silf+0x41>
mov    %r14,%rdi
mov    $0xc,%esi
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <add_status@plt>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.battle_char = type { i32 }
define void @silf(%struct.battle_char* %0, %struct.battle_char* %1) {
%3 = alloca %struct.battle_char*
%4 = alloca %struct.battle_char*
store %struct.battle_char* %0, %struct.battle_char** %3
store %struct.battle_char* %1, %struct.battle_char** %4
%5 = call i64 @get_random(i32 0, i32 100)
%6 = load %struct.battle_char*, %struct.battle_char** %3
%7 = load %struct.battle_char*, %struct.battle_char** %4
%8 = call i64 @mod6(%struct.battle_char* %6, %struct.battle_char* %7, i32 150)
%9 = icmp slt i64 %5, %8
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = load %struct.battle_char*, %struct.battle_char** %4
%12 = call i32 @add_status(%struct.battle_char* %11, i32 12)
br label %13
13: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
%struct.battle_char = type { i32 }
define void @silf(%struct.battle_char* %0, %struct.battle_char* %1) {
%3 = tail call i64 @get_random(i32 0, i32 100)
%4 = tail call i64 @mod6(%struct.battle_char* %0, %struct.battle_char* %1, i32 150)
%5 = icmp slt i64 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @add_status(%struct.battle_char* %1, i32 12)
br label %8
8: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_io_bit(int, int /*<<< orphan*/);
void TOSH_SET_UART_RXD0_PIN() { set_io_bit(0x70, 0); }


x86 assembly (clang, -O0):
<TOSH_SET_UART_RXD0_PIN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x70,%edi
xor    %esi,%esi
call   1030 <set_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_SET_UART_RXD0_PIN>:
mov    $0x70,%edi
xor    %esi,%esi
jmp    1030 <set_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_SET_UART_RXD0_PIN() {
%1 = call i32 @set_io_bit(i32 112, i32 0)
ret void
}

LLVM IR (-O2):
define void @TOSH_SET_UART_RXD0_PIN() {
%1 = tail call i32 @set_io_bit(i32 112, i32 0)
ret void
}
void tdd_whilefixer(void) {
  int whilecounter;
  int counter;
  while (1)
    whilecounter--;
  while (1)
    whilecounter++;
  while (1) {
    counter++;
  }
}


x86 assembly (clang, -O0):
<tdd_whilefixer>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
mov    %eax,-0x4(%rbp)
jmp    1104 <tdd_whilefixer+0x4>

x86 assembly (clang, -O2):
<tdd_whilefixer>:
jmp    1100 <tdd_whilefixer>

LLVM IR (-O0):
define void @tdd_whilefixer() {
%1 = alloca i32
%2 = alloca i32
br label %3
3: ; preds = %0, %3
%4 = load i32, i32* %1
%5 = add nsw i32 %4, -1
store i32 %5, i32* %1
br label %3
}

LLVM IR (-O2):
define void @tdd_whilefixer() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ ide_board_close(int /*<<< orphan*/);
void ide_xtide_close(void) { ide_board_close(0); }


x86 assembly (clang, -O0):
<ide_xtide_close>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <ide_board_close@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ide_xtide_close>:
xor    %edi,%edi
jmp    1030 <ide_board_close@plt>

LLVM IR (-O0):
define void @ide_xtide_close() {
%1 = call i32 @ide_board_close(i32 0)
ret void
}

LLVM IR (-O2):
define void @ide_xtide_close() {
%1 = tail call i32 @ide_board_close(i32 0)
ret void
}
void foo_2_1_1_2_1_1_2_2_2() {}


x86 assembly (clang, -O0):
<foo_2_1_1_2_1_1_2_2_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_1_1_2_1_1_2_2_2>:
ret

LLVM IR (-O0):
define void @foo_2_1_1_2_1_1_2_2_2() {
ret void
}

LLVM IR (-O2):
define void @foo_2_1_1_2_1_1_2_2_2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ add_command(unsigned int *, int, int);
int /*<<< orphan*/ ipfw_init(int, char **, unsigned int, char const *,
                             int /*<<< orphan*/);
scalar_t__ optind;
int ipfw_append(int args, char **arglist, const char *chain) {
  unsigned int command = 0;
  add_command(&command, 0x0010U, 0x0000U);
  ipfw_init(args, arglist, command, chain, 0);
  optind = 0;
  return (0);
}


x86 assembly (clang, -O0):
<ipfw_append>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
lea    -0x1c(%rbp),%rdi
mov    $0x10,%esi
xor    %edx,%edx
call   1040 <add_command@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x1c(%rbp),%edx
mov    -0x18(%rbp),%rcx
xor    %r8d,%r8d
call   1030 <ipfw_init@plt>
mov    0x2e81(%rip),%rax
movq   $0x0,(%rax)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipfw_append>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %edi,%ebp
movl   $0x0,0xc(%rsp)
lea    0xc(%rsp),%rdi
mov    $0x10,%esi
xor    %edx,%edx
call   1040 <add_command@plt>
mov    0xc(%rsp),%edx
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %r14,%rcx
xor    %r8d,%r8d
call   1030 <ipfw_init@plt>
mov    0x2e84(%rip),%rax
movq   $0x0,(%rax)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@optind = global i64 0
define i32 @ipfw_append(i32 %0, i8** %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* %2, i8** %6
store i32 0, i32* %7
%8 = call i32 @add_command(i32* %7, i32 16, i32 0)
%9 = load i32, i32* %4
%10 = load i8**, i8*** %5
%11 = load i32, i32* %7
%12 = load i8*, i8** %6
%13 = call i32 @ipfw_init(i32 %9, i8** %10, i32 %11, i8* %12, i32 0)
store i64 0, i64* @optind
ret i32 0
}

LLVM IR (-O2):
@optind = global i64 0
define i32 @ipfw_append(i32 %0, i8** %1, i8* %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
store i32 0, i32* %4
%6 = call i32 @add_command(i32* %4, i32 16, i32 0)
%7 = load i32, i32* %4
%8 = call i32 @ipfw_init(i32 %0, i8** %1, i32 %7, i8* %2, i32 0)
store i64 0, i64* @optind
ret i32 0
}
void test_invalid_clause() {
  int i;
#pragma omp target teams distribute foo bar
  for (i = 0; i < 16; ++i)
    ;
}


x86 assembly (clang, -O0):
<test_invalid_clause>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1128 <test_invalid_clause+0x28>
jmp    111a <test_invalid_clause+0x1a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <test_invalid_clause+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_invalid_clause>:
ret

LLVM IR (-O0):
define void @test_invalid_clause() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 16
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
br label %2
9: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @test_invalid_clause() {
ret void
}
long labs(register long l) { return l >= 0 ? l : -l; }


x86 assembly (clang, -O0):
<labs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jl     1120 <labs+0x20>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    112a <labs+0x2a>
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<labs>:
mov    %rdi,%rax
neg    %rax
cmovs  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @labs(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp sge i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i64, i64* %2
br label %10
7: ; preds = %1
%8 = load i64, i64* %2
%9 = sub nsw i64 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i64 [ %6, %5 ], [ %9, %7 ]
ret i64 %11
}

LLVM IR (-O2):
define i64 @labs(i64 %0) {
%2 = tail call i64 @llvm.abs.i64(i64 %0, i1 true)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void boxless_pstate_table_footer(__attribute__((unused)) void *report_data) {
  printf("\n");
}


x86 assembly (clang, -O0):
<boxless_pstate_table_footer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<boxless_pstate_table_footer>:
mov    $0xa,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @boxless_pstate_table_footer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @boxless_pstate_table_footer(i8* nocapture readnone %0) {
%2 = tail call i32 @putchar(i32 10)
ret void
}