int alaw2linear(int a_val) {
  int t;
  int seg;
  a_val ^= 0x55;
  t = (a_val & (0xf)) << 4;
  seg = ((unsigned)a_val & (0x70)) >> (4);
  switch (seg) {
  case 0:
    t += 8;
    break;
  case 1:
    t += 0x108;
    break;
  default:
    t += 0x108;
    t <<= seg - 1;
  }
  return ((a_val & (0x80)) ? t : -t);
}


x86 assembly (clang, -O0):
<alaw2linear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%al
xor    $0x55,%al
mov    %al,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf,%eax
shl    $0x4,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x70,%eax
shr    $0x4,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     114b <alaw2linear+0x4b>
jmp    113a <alaw2linear+0x3a>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     1159 <alaw2linear+0x59>
jmp    1169 <alaw2linear+0x69>
mov    -0x8(%rbp),%eax
add    $0x8,%eax
mov    %eax,-0x8(%rbp)
jmp    1182 <alaw2linear+0x82>
mov    -0x8(%rbp),%eax
add    $0x108,%eax
mov    %eax,-0x8(%rbp)
jmp    1182 <alaw2linear+0x82>
mov    -0x8(%rbp),%eax
add    $0x108,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
mov    -0x8(%rbp),%eax
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     119e <alaw2linear+0x9e>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    11a6 <alaw2linear+0xa6>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alaw2linear>:
mov    %edi,%ecx
xor    $0x55,%ecx
mov    %ecx,%eax
shl    $0x4,%eax
movzbl %al,%edx
shr    $0x4,%ecx
and    $0x7,%ecx
cmp    $0x1,%ecx
je     1121 <alaw2linear+0x21>
test   %ecx,%ecx
jne    1129 <alaw2linear+0x29>
or     $0x8,%edx
jmp    1134 <alaw2linear+0x34>
or     $0x108,%edx
jmp    1134 <alaw2linear+0x34>
or     $0x108,%edx
add    $0xff,%cl
shl    %cl,%edx
mov    %edx,%eax
neg    %eax
test   $0x80,%dil
cmovne %edx,%eax
ret

LLVM IR (-O0):
define i32 @alaw2linear(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = xor i32 %5, 85
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = and i32 %7, 15
%9 = shl i32 %8, 4
store i32 %9, i32* %3
%10 = load i32, i32* %2
%11 = and i32 %10, 112
%12 = lshr i32 %11, 4
store i32 %12, i32* %4
%13 = load i32, i32* %4
switch i32 %13, label %20 [
i32 0, label %14
i32 1, label %17
]
14: ; preds = %1
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 8
store i32 %16, i32* %3
br label %27
17: ; preds = %1
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 264
store i32 %19, i32* %3
br label %27
20: ; preds = %1
%21 = load i32, i32* %3
%22 = add nsw i32 %21, 264
store i32 %22, i32* %3
%23 = load i32, i32* %4
%24 = sub nsw i32 %23, 1
%25 = load i32, i32* %3
%26 = shl i32 %25, %24
store i32 %26, i32* %3
br label %27
27: ; preds = %20, %17, %14
%28 = load i32, i32* %2
%29 = and i32 %28, 128
%30 = icmp ne i32 %29, 0
br i1 %30, label %31, label %33
31: ; preds = %27
%32 = load i32, i32* %3
br label %36
33: ; preds = %27
%34 = load i32, i32* %3
%35 = sub nsw i32 0, %34
br label %36
36: ; preds = %33, %31
%37 = phi i32 [ %32, %31 ], [ %35, %33 ]
ret i32 %37
}

LLVM IR (-O2):
define i32 @alaw2linear(i32 %0) {
%2 = xor i32 %0, 85
%3 = shl i32 %2, 4
%4 = and i32 %3, 240
%5 = lshr i32 %2, 4
%6 = and i32 %5, 7
switch i32 %6, label %11 [
i32 0, label %7
i32 1, label %9
]
7: ; preds = %1
%8 = or i32 %4, 8
br label %15
9: ; preds = %1
%10 = or i32 %4, 264
br label %15
11: ; preds = %1
%12 = or i32 %4, 264
%13 = add nsw i32 %6, -1
%14 = shl i32 %12, %13
br label %15
15: ; preds = %11, %9, %7
%16 = phi i32 [ %14, %11 ], [ %10, %9 ], [ %8, %7 ]
%17 = and i32 %0, 128
%18 = icmp eq i32 %17, 0
%19 = sub nsw i32 0, %16
%20 = select i1 %18, i32 %19, i32 %16
ret i32 %20
}