int write_DCS16Number(double d, char *p) {
  unsigned long o32;
  d = d * 65535.0 + 0.5;
  if (d >= 65536.0)
    return 1;
  if (d < 0.0)
    return 1;
  o32 = (unsigned long)d;
  ((unsigned char *)p)[0] = (unsigned char)(o32 >> 8);
  ((unsigned char *)p)[1] = (unsigned char)(o32);
  return 0;
}


x86 assembly (clang, -O0):
<write_DCS16Number>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xeee(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeea(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xec4(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     1152 <write_DCS16Number+0x52>
movl   $0x1,-0x4(%rbp)
jmp    11bf <write_DCS16Number+0xbf>
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    116c <write_DCS16Number+0x6c>
movl   $0x1,-0x4(%rbp)
jmp    11bf <write_DCS16Number+0xbf>
movsd  -0x10(%rbp),%xmm0
movsd  0xe9f(%rip),%xmm2
movaps %xmm0,%xmm1
subsd  %xmm2,%xmm1
cvttsd2si %xmm1,%rcx
cvttsd2si %xmm0,%rax
mov    %rax,%rdx
sar    $0x3f,%rdx
and    %rdx,%rcx
or     %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
shr    $0x8,%rax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x20(%rbp),%rax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_DCS16Number>:
mulsd  0xef8(%rip),%xmm0
addsd  0xef8(%rip),%xmm0
ucomisd 0xef8(%rip),%xmm0
mov    $0x1,%eax
jae    114f <write_DCS16Number+0x4f>
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
ja     114f <write_DCS16Number+0x4f>
cvttsd2si %xmm0,%rax
mov    %rax,%rcx
sar    $0x3f,%rcx
subsd  0xedb(%rip),%xmm0
cvttsd2si %xmm0,%rdx
and    %ecx,%edx
or     %edx,%eax
rol    $0x8,%ax
mov    %ax,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @write_DCS16Number(double %0, i8* %1) {
%3 = alloca i32
%4 = alloca double
%5 = alloca i8*
%6 = alloca i64
store double %0, double* %4
store i8* %1, i8** %5
%7 = load double, double* %4
%8 = call double @llvm.fmuladd.f64(double %7, double 6.553500e+04, double 5.000000e-01)
store double %8, double* %4
%9 = load double, double* %4
%10 = fcmp oge double %9, 6.553600e+04
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 1, i32* %3
br label %28
12: ; preds = %2
%13 = load double, double* %4
%14 = fcmp olt double %13, 0.000000e+00
br i1 %14, label %15, label %16
15: ; preds = %12
store i32 1, i32* %3
br label %28
16: ; preds = %12
%17 = load double, double* %4
%18 = fptoui double %17 to i64
store i64 %18, i64* %6
%19 = load i64, i64* %6
%20 = lshr i64 %19, 8
%21 = trunc i64 %20 to i8
%22 = load i8*, i8** %5
%23 = getelementptr inbounds i8, i8* %22, i64 0
store i8 %21, i8* %23
%24 = load i64, i64* %6
%25 = trunc i64 %24 to i8
%26 = load i8*, i8** %5
%27 = getelementptr inbounds i8, i8* %26, i64 1
store i8 %25, i8* %27
store i32 0, i32* %3
br label %28
28: ; preds = %16, %15, %11
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @write_DCS16Number(double %0, i8* nocapture writeonly %1) {
%3 = tail call double @llvm.fmuladd.f64(double %0, double 6.553500e+04, double 5.000000e-01)
%4 = fcmp oge double %3, 6.553600e+04
%5 = fcmp olt double %3, 0.000000e+00
%6 = or i1 %4, %5
br i1 %6, label %13, label %7
7: ; preds = %2
%8 = fptoui double %3 to i64
%9 = lshr i64 %8, 8
%10 = trunc i64 %9 to i8
store i8 %10, i8* %1
%11 = trunc i64 %8 to i8
%12 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %11, i8* %12
br label %13
13: ; preds = %2, %7
%14 = phi i32 [ 0, %7 ], [ 1, %2 ]
ret i32 %14
}