xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int __le16;

/* Variables and functions */
int __cpu_to_le16(int);
int ieee80211_is_cts(__le16 fc) {
  return (fc & __cpu_to_le16(0x000c | 0x00f0)) ==
         __cpu_to_le16(0x0004 | 0x00C0);
}


x86 assembly (clang, -O0):
<ieee80211_is_cts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0xfc,%edi
call   1030 <__cpu_to_le16@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
and    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    $0xc4,%edi
call   1030 <__cpu_to_le16@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee80211_is_cts>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0xfc,%edi
call   1030 <__cpu_to_le16@plt>
mov    %eax,%ebp
and    %ebx,%ebp
mov    $0xc4,%edi
call   1030 <__cpu_to_le16@plt>
xor    %ecx,%ecx
cmp    %eax,%ebp
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ieee80211_is_cts(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__cpu_to_le16(i32 252)
%5 = and i32 %3, %4
%6 = call i32 @__cpu_to_le16(i32 196)
%7 = icmp eq i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @ieee80211_is_cts(i32 %0) {
%2 = tail call i32 @__cpu_to_le16(i32 252)
%3 = and i32 %2, %0
%4 = tail call i32 @__cpu_to_le16(i32 196)
%5 = icmp eq i32 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
int test_imm_DEint64_lowword_reg(long long val) {
  return ((val) & (0xDE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DEint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xde,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DEint64_lowword_reg>:
test   $0xde,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DEint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 222
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_DEint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 222
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ process_can(int);
void FDCAN3_IT1_IRQ_Handler(void) { process_can(2); }


x86 assembly (clang, -O0):
<FDCAN3_IT1_IRQ_Handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <process_can@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FDCAN3_IT1_IRQ_Handler>:
mov    $0x2,%edi
jmp    1030 <process_can@plt>

LLVM IR (-O0):
define void @FDCAN3_IT1_IRQ_Handler() {
%1 = call i32 @process_can(i32 2)
ret void
}

LLVM IR (-O2):
define void @FDCAN3_IT1_IRQ_Handler() {
%1 = tail call i32 @process_can(i32 2)
ret void
}
long __arch_fetch_and_add(long *pointer, long int delta) {
  long temp;
  temp = __atomic_fetch_add(pointer, delta, 0);
  return temp;
}


x86 assembly (clang, -O0):
<__arch_fetch_and_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
lock xadd %rax,(%rcx)
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__arch_fetch_and_add>:
mov    %rsi,%rax
lock xadd %rax,(%rdi)
ret

LLVM IR (-O0):
define i64 @__arch_fetch_and_add(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
%8 = load i64*, i64** %3
%9 = load i64, i64* %4
store i64 %9, i64* %6
%10 = load i64, i64* %6
%11 = atomicrmw add i64* %8, i64 %10 monotonic
store i64 %11, i64* %7
%12 = load i64, i64* %7
store i64 %12, i64* %5
%13 = load i64, i64* %5
ret i64 %13
}

LLVM IR (-O2):
define i64 @__arch_fetch_and_add(i64* nocapture %0, i64 %1) {
%3 = atomicrmw add i64* %0, i64 %1 monotonic
ret i64 %3
}
int isLeapYear(int year) {
  if (year % 4 == 0) {
    if (year % 100 == 0) {
      if (year % 400 == 0) {
        return 1;
      } else {
        return 0;
      }
    } else {
      return 1;
    }
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<isLeapYear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1167 <isLeapYear+0x67>
mov    -0x8(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    115b <isLeapYear+0x5b>
mov    -0x8(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    114f <isLeapYear+0x4f>
movl   $0x1,-0x4(%rbp)
jmp    116e <isLeapYear+0x6e>
movl   $0x0,-0x4(%rbp)
jmp    116e <isLeapYear+0x6e>
movl   $0x1,-0x4(%rbp)
jmp    116e <isLeapYear+0x6e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isLeapYear>:
xor    %eax,%eax
test   $0x3,%dil
je     1109 <isLeapYear+0x9>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
mov    %ecx,%edx
ror    $0x2,%edx
mov    $0x1,%eax
cmp    $0x28f5c28,%edx
ja     1108 <isLeapYear+0x8>
ror    $0x4,%ecx
xor    %eax,%eax
cmp    $0xa3d70b,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @isLeapYear(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %18
7: ; preds = %1
%8 = load i32, i32* %3
%9 = srem i32 %8, 100
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i32, i32* %3
%13 = srem i32 %12, 400
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %11
store i32 1, i32* %2
br label %19
16: ; preds = %11
store i32 0, i32* %2
br label %19
17: ; preds = %7
store i32 1, i32* %2
br label %19
18: ; preds = %1
store i32 0, i32* %2
br label %19
19: ; preds = %18, %17, %16, %15
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @isLeapYear(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = srem i32 %0, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = srem i32 %0, 400
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %1, %4, %7
%12 = phi i32 [ %10, %7 ], [ 1, %4 ], [ 0, %1 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void mumble_permissionquery_callback(int32_t channel_id, uint32_t permissions,
                                     int32_t flush, void *user_data) {
  printf("permissionquery_callback\n");
}


x86 assembly (clang, -O0):
<mumble_permissionquery_callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mumble_permissionquery_callback>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"permissionquery_callback\0A\00"
define void @mumble_permissionquery_callback(i32 %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [25 x i8] c"permissionquery_callback\00"
define void @mumble_permissionquery_callback(i32 %0, i32 %1, i32 %2, i8* nocapture readnone %3) {
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fdatasync(int);
void pcap_rw_fsync(int fd) { fdatasync(fd); }


x86 assembly (clang, -O0):
<pcap_rw_fsync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fdatasync@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcap_rw_fsync>:
jmp    1030 <fdatasync@plt>

LLVM IR (-O0):
define void @pcap_rw_fsync(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @fdatasync(i32 %3)
ret void
}

LLVM IR (-O2):
define void @pcap_rw_fsync(i32 %0) {
%2 = tail call i32 @fdatasync(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void bzero(void *b, size_t length) { memset(b, 0, length); }


x86 assembly (clang, -O0):
<bzero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bzero>:
mov    %rsi,%rdx
xor    %esi,%esi
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @bzero(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @memset(i8* %5, i32 0, i64 %6)
ret void
}

LLVM IR (-O2):
define void @bzero(i8* %0, i64 %1) {
%3 = tail call i32 @memset(i8* %0, i32 0, i64 %1)
ret void
}
int inbox(int x, int y, int x0, int y0, int w, int h) {
  return ((x >= x0) && (y >= y0) && (x < x0 + w) && (y < y0 + h));
}


x86 assembly (clang, -O0):
<inbox>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%ecx
xor    %eax,%eax
cmp    -0xc(%rbp),%ecx
mov    %al,-0x19(%rbp)
jl     1161 <inbox+0x61>
mov    -0x8(%rbp),%ecx
xor    %eax,%eax
cmp    -0x10(%rbp),%ecx
mov    %al,-0x19(%rbp)
jl     1161 <inbox+0x61>
mov    -0x4(%rbp),%ecx
mov    -0xc(%rbp),%edx
add    -0x14(%rbp),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x19(%rbp)
jge    1161 <inbox+0x61>
mov    -0x8(%rbp),%eax
mov    -0x10(%rbp),%ecx
add    -0x18(%rbp),%ecx
cmp    %ecx,%eax
setl   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inbox>:
cmp    %edx,%edi
setge  %r10b
cmp    %ecx,%esi
setge  %al
and    %r10b,%al
add    %edx,%r8d
cmp    %edi,%r8d
setg   %dl
and    %al,%dl
add    %ecx,%r9d
cmp    %esi,%r9d
setg   %al
and    %dl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @inbox(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = load i32, i32* %9
%15 = icmp sge i32 %13, %14
br i1 %15, label %16, label %32
16: ; preds = %6
%17 = load i32, i32* %8
%18 = load i32, i32* %10
%19 = icmp sge i32 %17, %18
br i1 %19, label %20, label %32
20: ; preds = %16
%21 = load i32, i32* %7
%22 = load i32, i32* %9
%23 = load i32, i32* %11
%24 = add nsw i32 %22, %23
%25 = icmp slt i32 %21, %24
br i1 %25, label %26, label %32
26: ; preds = %20
%27 = load i32, i32* %8
%28 = load i32, i32* %10
%29 = load i32, i32* %12
%30 = add nsw i32 %28, %29
%31 = icmp slt i32 %27, %30
br label %32
32: ; preds = %26, %20, %16, %6
%33 = phi i1 [ false, %20 ], [ false, %16 ], [ false, %6 ], [ %31, %26 ]
%34 = zext i1 %33 to i32
ret i32 %34
}

LLVM IR (-O2):
define i32 @inbox(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = icmp sge i32 %0, %2
%8 = icmp sge i32 %1, %3
%9 = and i1 %7, %8
%10 = add nsw i32 %4, %2
%11 = icmp sgt i32 %10, %0
%12 = select i1 %9, i1 %11, i1 false
%13 = add nsw i32 %5, %3
%14 = icmp sgt i32 %13, %1
%15 = select i1 %12, i1 %14, i1 false
%16 = zext i1 %15 to i32
ret i32 %16
}
__attribute__((no, noclone)) int foo_i(int i) {
  int a[5] = {};
  int k = i ? a[i] : i;
  return k;
}


x86 assembly (clang, -O0):
<foo_i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x20(%rbp),%rdi
xor    %esi,%esi
mov    $0x14,%edx
call   1030 <memset@plt>
cmpl   $0x0,-0x4(%rbp)
je     1145 <foo_i+0x35>
movslq -0x4(%rbp),%rax
mov    -0x20(%rbp,%rax,4),%eax
mov    %eax,-0x28(%rbp)
jmp    114b <foo_i+0x3b>
mov    -0x4(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x28(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_i>:
xorps  %xmm0,%xmm0
movaps %xmm0,-0x18(%rsp)
movl   $0x0,-0x8(%rsp)
test   %edi,%edi
je     111c <foo_i+0x1c>
movslq %edi,%rax
mov    -0x18(%rsp,%rax,4),%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo_i(i32 %0) {
%2 = alloca i32
%3 = alloca [5 x i32]
%4 = alloca i32
store i32 %0, i32* %2
%5 = bitcast [5 x i32]* %3 to i8*
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i32, i32* %2
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 %10
%12 = load i32, i32* %11
br label %15
13: ; preds = %1
%14 = load i32, i32* %2
br label %15
15: ; preds = %13, %8
%16 = phi i32 [ %12, %8 ], [ %14, %13 ]
store i32 %16, i32* %4
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
define i32 @foo_i(i32 %0) {
%2 = alloca [5 x i32]
%3 = bitcast [5 x i32]* %2 to i8*
%4 = icmp eq i32 %0, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = sext i32 %0 to i64
%7 = getelementptr inbounds [5 x i32], [5 x i32]* %2, i64 0, i64 %6
%8 = load i32, i32* %7
br label %9
9: ; preds = %1, %5
%10 = phi i32 [ %8, %5 ], [ 0, %1 ]
ret i32 %10
}
int do_704() { return 704; }


x86 assembly (clang, -O0):
<do_704>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2c0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_704>:
mov    $0x2c0,%eax
ret

LLVM IR (-O0):
define i32 @do_704() {
ret i32 704
}

LLVM IR (-O2):
define i32 @do_704() {
ret i32 704
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t fread(char *, int, int, int /*<<< orphan*/ *);
size_t readbyte(FILE *file, char *byte) {
  return fread(byte, sizeof(char), 1, file);
}


x86 assembly (clang, -O0):
<readbyte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <fread@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readbyte>:
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x1,%esi
mov    $0x1,%edx
jmp    1030 <fread@plt>

LLVM IR (-O0):
define i64 @readbyte(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i32*, i32** %3
%7 = call i64 @fread(i8* %5, i32 1, i32 1, i32* %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @readbyte(i32* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @fread(i8* %1, i32 1, i32 1, i32* %0)
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ drv_LW_ABP_send(char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
void drv_LW_ABP_clear(void) {
  char cmd[] = "lcd clear\r\n";
  drv_LW_ABP_send(cmd, strlen(cmd));
}


x86 assembly (clang, -O0):
<drv_LW_ABP_clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0xc(%rbp)
mov    0xecf(%rip),%eax
mov    %eax,-0x4(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0xc(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1030 <drv_LW_ABP_send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_LW_ABP_clear>:
push   %rbx
sub    $0x10,%rsp
movabs $0x61656c632064636c,%rax
6c 65 61
mov    %rax,(%rsp)
movl   $0xa0d72,0x8(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <drv_LW_ABP_send@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.drv_LW_ABP_clear.cmd = [12 x i8] c"lcd clear\0D\0A\00"
define void @drv_LW_ABP_clear() {
%1 = alloca [12 x i8]
%2 = bitcast [12 x i8]* %1 to i8*
%3 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @drv_LW_ABP_send(i8* %3, i32 %5)
ret void
}

LLVM IR (-O2):
@__const.drv_LW_ABP_clear.cmd = [12 x i8] c"lcd clear\0D\0A\00"
define void @drv_LW_ABP_clear() {
%1 = alloca [12 x i8]
%2 = getelementptr inbounds [12 x i8], [12 x i8]* %1, i64 0, i64 0
%3 = call i32 @strlen(i8* %2)
%4 = call i32 @drv_LW_ABP_send(i8* %2, i32 %3)
ret void
}
float vdot(const float *v1, const float *v2) {
  return v1[(signed long int)0] * v2[(signed long int)0] +
         v1[(signed long int)1] * v2[(signed long int)1] +
         v1[(signed long int)2] * v2[(signed long int)2];
}


x86 assembly (clang, -O0):
<vdot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x10(%rbp),%rax
mulss  0x4(%rax),%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  0x8(%rax),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<vdot>:
movss  0x4(%rdi),%xmm0
mulss  0x4(%rsi),%xmm0
movss  (%rdi),%xmm1
mulss  (%rsi),%xmm1
addss  %xmm0,%xmm1
movss  0x8(%rdi),%xmm0
mulss  0x8(%rsi),%xmm0
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @vdot(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %3
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = load float*, float** %4
%9 = getelementptr inbounds float, float* %8, i64 0
%10 = load float, float* %9
%11 = load float*, float** %3
%12 = getelementptr inbounds float, float* %11, i64 1
%13 = load float, float* %12
%14 = load float*, float** %4
%15 = getelementptr inbounds float, float* %14, i64 1
%16 = load float, float* %15
%17 = fmul float %13, %16
%18 = call float @llvm.fmuladd.f32(float %7, float %10, float %17)
%19 = load float*, float** %3
%20 = getelementptr inbounds float, float* %19, i64 2
%21 = load float, float* %20
%22 = load float*, float** %4
%23 = getelementptr inbounds float, float* %22, i64 2
%24 = load float, float* %23
%25 = call float @llvm.fmuladd.f32(float %21, float %24, float %18)
ret float %25
}

LLVM IR (-O2):
define float @vdot(float* nocapture %0, float* nocapture %1) {
%3 = load float, float* %0
%4 = load float, float* %1
%5 = getelementptr inbounds float, float* %0, i64 1
%6 = load float, float* %5
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = fmul float %6, %8
%10 = tail call float @llvm.fmuladd.f32(float %3, float %4, float %9)
%11 = getelementptr inbounds float, float* %0, i64 2
%12 = load float, float* %11
%13 = getelementptr inbounds float, float* %1, i64 2
%14 = load float, float* %13
%15 = tail call float @llvm.fmuladd.f32(float %12, float %14, float %10)
ret float %15
}
/* Variables and functions */
int /*<<< orphan*/ adb_killbypackage(char *);
void llsif_kill() { adb_killbypackage("klb.android.lovelive_en"); }


x86 assembly (clang, -O0):
<llsif_kill>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <adb_killbypackage@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<llsif_kill>:
lea    0xee9(%rip),%rdi
jmp    1030 <adb_killbypackage@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"klb.android.lovelive_en\00"
define void @llsif_kill() {
%1 = call i32 @adb_killbypackage(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"klb.android.lovelive_en\00"
define void @llsif_kill() {
%1 = tail call i32 @adb_killbypackage(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}
int regulator_get_voltage(struct regulator *regulator) { return 0; }


x86 assembly (clang, -O0):
<regulator_get_voltage>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<regulator_get_voltage>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.regulator = type opaque
define i32 @regulator_get_voltage(%struct.regulator* %0) {
%2 = alloca %struct.regulator*
store %struct.regulator* %0, %struct.regulator** %2
ret i32 0
}

LLVM IR (-O2):
%struct.regulator = type opaque
define i32 @regulator_get_voltage(%struct.regulator* nocapture readnone %0) {
ret i32 0
}
__attribute__((always_)) void apply_paravirt(struct paravirt_patch_site *start,
                                             struct paravirt_patch_site *end) {}


x86 assembly (clang, -O0):
<apply_paravirt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<apply_paravirt>:
ret

LLVM IR (-O0):
%struct.paravirt_patch_site = type opaque
define void @apply_paravirt(%struct.paravirt_patch_site* %0, %struct.paravirt_patch_site* %1) {
%3 = alloca %struct.paravirt_patch_site*
%4 = alloca %struct.paravirt_patch_site*
store %struct.paravirt_patch_site* %0, %struct.paravirt_patch_site** %3
store %struct.paravirt_patch_site* %1, %struct.paravirt_patch_site** %4
ret void
}

LLVM IR (-O2):
%struct.paravirt_patch_site = type opaque
define void @apply_paravirt(%struct.paravirt_patch_site* nocapture %0, %struct.paravirt_patch_site* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isgraph(int);
void t_isgraph_0x6d() {
  Assert_real((isgraph(109)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              550, ("isgraph should be 1 for m"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x6d>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6d,%edi
call   1040 <isgraph@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x226,%edx
lea    0xf65(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x6d>:
push   %rax
mov    $0x6d,%edi
call   1040 <isgraph@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x226,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for m\00"
define void @t_isgraph_0x6d() {
%1 = call i32 @isgraph(i32 109)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 550, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for m\00"
define void @t_isgraph_0x6d() {
%1 = tail call i32 @isgraph(i32 109)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 550, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned pigpiod_if_version(void) { return 18; }


x86 assembly (clang, -O0):
<pigpiod_if_version>:
push   %rbp
mov    %rsp,%rbp
mov    $0x12,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pigpiod_if_version>:
mov    $0x12,%eax
ret

LLVM IR (-O0):
define i32 @pigpiod_if_version() {
ret i32 18
}

LLVM IR (-O2):
define i32 @pigpiod_if_version() {
ret i32 18
}
/* Variables and functions */
int ENOSYS;
int xntrace_user_freeze(unsigned long v, int once) { return -ENOSYS; }


x86 assembly (clang, -O0):
<xntrace_user_freeze>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
mov    0x2ed4(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xntrace_user_freeze>:
mov    0x2ee1(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @xntrace_user_freeze(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i32, i32* @ENOSYS
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @xntrace_user_freeze(i64 %0, i32 %1) {
%3 = load i32, i32* @ENOSYS
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int strcasecmp(void const *, void const *);
int tld_cmpfunc(const void *a, const void *b) { return strcasecmp(a, b); }


x86 assembly (clang, -O0):
<tld_cmpfunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcasecmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tld_cmpfunc>:
jmp    1030 <strcasecmp@plt>

LLVM IR (-O0):
define i32 @tld_cmpfunc(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcasecmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @tld_cmpfunc(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcasecmp(i8* %0, i8* %1)
ret i32 %3
}
/* Type definitions */
struct trie_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ delete_word_aux(struct trie_node *, char const *,
                                   int /*<<< orphan*/);
void delete_word(struct trie_node *root, const char *word) {
  delete_word_aux(root, word, 0);
}


x86 assembly (clang, -O0):
<delete_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <delete_word_aux@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delete_word>:
xor    %edx,%edx
jmp    1030 <delete_word_aux@plt>

LLVM IR (-O0):
%struct.trie_node = type { i32 }
define void @delete_word(%struct.trie_node* %0, i8* %1) {
%3 = alloca %struct.trie_node*
%4 = alloca i8*
store %struct.trie_node* %0, %struct.trie_node** %3
store i8* %1, i8** %4
%5 = load %struct.trie_node*, %struct.trie_node** %3
%6 = load i8*, i8** %4
%7 = call i32 @delete_word_aux(%struct.trie_node* %5, i8* %6, i32 0)
ret void
}

LLVM IR (-O2):
%struct.trie_node = type { i32 }
define void @delete_word(%struct.trie_node* %0, i8* %1) {
%3 = tail call i32 @delete_word_aux(%struct.trie_node* %0, i8* %1, i32 0)
ret void
}
void __attribute__((section(".after_vectors"))) PendSV_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<PendSV_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <PendSV_Handler+0x9>
jmp    1109 <PendSV_Handler+0x9>

x86 assembly (clang, -O2):
<PendSV_Handler>:
jmp    1100 <PendSV_Handler>

LLVM IR (-O0):
define void @PendSV_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @PendSV_Handler() section ".after_vectors" {
br label %1
1: ; preds = %0, %1
br label %1
}
void over(dummy) int dummy;
{
  statistics();
  exit(0);
}


x86 assembly (clang, -O0):
<over>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <statistics@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<over>:
push   %rax
xor    %eax,%eax
call   1030 <statistics@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @over(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @statistics()
unreachable
}

LLVM IR (-O2):
define void @over(i32 %0) {
%2 = tail call i32 (...) @statistics()
tail call void @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(unsigned char **, unsigned char const *, int);
int ntohl(int /*<<< orphan*/);
void unmarshallInt(unsigned char const buffer[], int *const valueP) {
  union {
    uint32_t value;
    unsigned char bytes[4];
  } converter;
  memcpy(&converter.bytes, buffer, 4);
  *valueP = ntohl(converter.value);
}


x86 assembly (clang, -O0):
<unmarshallInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%edi
call   1040 <ntohl@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unmarshallInt>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
mov    %rdi,%rsi
lea    0x8(%rsp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    0x8(%rsp),%edi
call   1040 <ntohl@plt>
mov    %eax,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%union.anon = type { i32 }
define void @unmarshallInt(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca %union.anon
store i8* %0, i8** %3
store i32* %1, i32** %4
%6 = bitcast %union.anon* %5 to [4 x i8]*
%7 = bitcast [4 x i8]* %6 to i8**
%8 = load i8*, i8** %3
%9 = call i32 @memcpy(i8** %7, i8* %8, i32 4)
%10 = bitcast %union.anon* %5 to i32*
%11 = load i32, i32* %10
%12 = call i32 @ntohl(i32 %11)
%13 = load i32*, i32** %4
store i32 %12, i32* %13
ret void
}

LLVM IR (-O2):
%union.anon = type { i32 }
define void @unmarshallInt(i8* %0, i32* nocapture writeonly %1) {
%3 = alloca %union.anon
%4 = bitcast %union.anon* %3 to i8*
%5 = bitcast %union.anon* %3 to i8**
%6 = call i32 @memcpy(i8** %5, i8* %0, i32 4)
%7 = getelementptr inbounds %union.anon, %union.anon* %3, i64 0, i32 0
%8 = load i32, i32* %7
%9 = call i32 @ntohl(i32 %8)
store i32 %9, i32* %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int write_srecord(int /*<<< orphan*/ *, int /*<<< orphan*/, int,
                  int /*<<< orphan*/, char, int /*<<< orphan*/ *);
int fini_srec(FILE *f) { return write_srecord(f, 0, 4, 0, '7', NULL); }


x86 assembly (clang, -O0):
<fini_srec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %ecx,%ecx
mov    $0x4,%edx
mov    $0x37,%r8d
xor    %eax,%eax
mov    %eax,%r9d
mov    %ecx,%esi
call   1030 <write_srecord@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fini_srec>:
xor    %esi,%esi
mov    $0x4,%edx
xor    %ecx,%ecx
mov    $0x37,%r8d
xor    %r9d,%r9d
jmp    1030 <write_srecord@plt>

LLVM IR (-O0):
define i32 @fini_srec(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @write_srecord(i32* %3, i32 0, i32 4, i32 0, i8 signext 55, i32* null)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fini_srec(i32* %0) {
%2 = tail call i32 @write_srecord(i32* %0, i32 0, i32 4, i32 0, i8 signext 55, i32* null)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3_file;

/* Variables and functions */
int SQLITE_OK;
int scmFileControl(sqlite3_file *pFile, int op, void *pArg) {
  return SQLITE_OK;
}


x86 assembly (clang, -O0):
<scmFileControl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ed2(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scmFileControl>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@SQLITE_OK = global i32 0
define i32 @scmFileControl(i32* %0, i32 %1, i8* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i8*
store i32* %0, i32** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* @SQLITE_OK
ret i32 %7
}

LLVM IR (-O2):
@SQLITE_OK = global i32 0
define i32 @scmFileControl(i32* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
%4 = load i32, i32* @SQLITE_OK
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ VID_MenuInit();
void ResetDefaults(void *unused) { VID_MenuInit(); }


x86 assembly (clang, -O0):
<ResetDefaults>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <VID_MenuInit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ResetDefaults>:
xor    %eax,%eax
jmp    1030 <VID_MenuInit@plt>

LLVM IR (-O0):
define void @ResetDefaults(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @VID_MenuInit()
ret void
}

LLVM IR (-O2):
define void @ResetDefaults(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @VID_MenuInit()
ret void
}
int ld_bun_cr2(long double a1) { return !(__builtin_isunordered(100, a1)); }


x86 assembly (clang, -O0):
<ld_bun_cr2>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fucomip %st(0),%st
setp   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ld_bun_cr2>:
fldt   0x8(%rsp)
xor    %eax,%eax
fucomip %st(0),%st
setnp  %al
ret

LLVM IR (-O0):
define i32 @ld_bun_cr2(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fcmp uno x86_fp80 0xK4005C800000000000000, %3
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @ld_bun_cr2(x86_fp80 %0) {
%2 = fcmp ord x86_fp80 %0, 0xK00000000000000000000
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int epoll_create(int);
int /*<<< orphan*/ epoll_wait(int, int /*<<< orphan*/ *, int, int);
int main() {
  int fd;
  fd = epoll_create(1);
  epoll_wait(fd, NULL, 1, 1100);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1040 <epoll_create@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
xor    %eax,%eax
mov    %eax,%esi
mov    $0x1,%edx
mov    $0x44c,%ecx
call   1030 <epoll_wait@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1040 <epoll_create@plt>
mov    %eax,%edi
xor    %esi,%esi
mov    $0x1,%edx
mov    $0x44c,%ecx
call   1030 <epoll_wait@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @epoll_create(i32 1)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @epoll_wait(i32 %4, i32* null, i32 1, i32 1100)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @epoll_create(i32 1)
%2 = tail call i32 @epoll_wait(i32 %1, i32* null, i32 1, i32 1100)
ret i32 0
}
/* Type definitions */
struct sched_param {
  scalar_t__ sched_priority;
};
typedef int /*<<< orphan*/ sched;

/* Variables and functions */
int /*<<< orphan*/ SCHED_OTHER;
int /*<<< orphan*/ memset(struct sched_param *, int /*<<< orphan*/, int);
int /*<<< orphan*/ sched_setscheduler(int /*<<< orphan*/, int /*<<< orphan*/,
                                      struct sched_param *);
void gpio_default_priority(void) {
  struct sched_param sched;
  memset(&sched, 0, sizeof(sched));
  sched.sched_priority = 0;
  sched_setscheduler(0, SCHED_OTHER, &sched);
}


x86 assembly (clang, -O0):
<gpio_default_priority>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1040 <memset@plt>
movq   $0x0,-0x8(%rbp)
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
lea    -0x8(%rbp),%rdx
call   1030 <sched_setscheduler@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_default_priority>:
push   %rbx
sub    $0x10,%rsp
lea    0x8(%rsp),%rbx
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1040 <memset@plt>
movq   $0x0,0x8(%rsp)
mov    0x2e97(%rip),%rax
mov    (%rax),%esi
xor    %edi,%edi
mov    %rbx,%rdx
call   1030 <sched_setscheduler@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.sched_param = type { i64 }
@SCHED_OTHER = global i32 0
define void @gpio_default_priority() {
%1 = alloca %struct.sched_param
%2 = call i32 @memset(%struct.sched_param* %1, i32 0, i32 8)
%3 = getelementptr inbounds %struct.sched_param, %struct.sched_param* %1, i32 0, i32 0
store i64 0, i64* %3
%4 = load i32, i32* @SCHED_OTHER
%5 = call i32 @sched_setscheduler(i32 0, i32 %4, %struct.sched_param* %1)
ret void
}

LLVM IR (-O2):
%struct.sched_param = type { i64 }
@SCHED_OTHER = global i32 0
define void @gpio_default_priority() {
%1 = alloca %struct.sched_param
%2 = bitcast %struct.sched_param* %1 to i8*
%3 = call i32 @memset(%struct.sched_param* %1, i32 0, i32 8)
%4 = getelementptr inbounds %struct.sched_param, %struct.sched_param* %1, i64 0, i32 0
store i64 0, i64* %4
%5 = load i32, i32* @SCHED_OTHER
%6 = call i32 @sched_setscheduler(i32 0, i32 %5, %struct.sched_param* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ magnitude2(float const *);
float sqrt(int /*<<< orphan*/);
float magnitude(const float vec[3]) { return sqrt(magnitude2(vec)); }


x86 assembly (clang, -O0):
<magnitude>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <magnitude2@plt>
mov    %eax,%edi
call   1040 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<magnitude>:
push   %rax
call   1030 <magnitude2@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <sqrt@plt>

LLVM IR (-O0):
define float @magnitude(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = call i32 @magnitude2(float* %3)
%5 = call float @sqrt(i32 %4)
ret float %5
}

LLVM IR (-O2):
define float @magnitude(float* %0) {
%2 = tail call i32 @magnitude2(float* %0)
%3 = tail call float @sqrt(i32 %2)
ret float %3
}
int conditional(int x, int y, int z) {
  int mask = ~!!x + 1;
  return y & mask | z & ~mask;
}


x86 assembly (clang, -O0):
<conditional>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
xor    $0xffffffff,%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<conditional>:
mov    %esi,%eax
test   %edi,%edi
cmove  %edx,%eax
ret

LLVM IR (-O0):
define i32 @conditional(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
%11 = xor i1 %10, true
%12 = zext i1 %11 to i32
%13 = xor i32 %12, -1
%14 = add nsw i32 %13, 1
store i32 %14, i32* %7
%15 = load i32, i32* %5
%16 = load i32, i32* %7
%17 = and i32 %15, %16
%18 = load i32, i32* %6
%19 = load i32, i32* %7
%20 = xor i32 %19, -1
%21 = and i32 %18, %20
%22 = or i32 %17, %21
ret i32 %22
}

LLVM IR (-O2):
define i32 @conditional(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i32 %2, i32 %1
ret i32 %5
}
int((user_service_info_receive))(struct ss7 *ss7, struct isup_call *c,
                                 int messagetype, unsigned char *parm,
                                 int len) {
  return len;
}


x86 assembly (clang, -O0):
<user_service_info_receive>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<user_service_info_receive>:
mov    %r8d,%eax
ret

LLVM IR (-O0):
%struct.ss7 = type opaque
%struct.isup_call = type opaque
define i32 @user_service_info_receive(%struct.ss7* %0, %struct.isup_call* %1, i32 %2, i8* %3, i32 %4) {
%6 = alloca %struct.ss7*
%7 = alloca %struct.isup_call*
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
store %struct.ss7* %0, %struct.ss7** %6
store %struct.isup_call* %1, %struct.isup_call** %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i32, i32* %10
ret i32 %11
}

LLVM IR (-O2):
%struct.ss7 = type opaque
%struct.isup_call = type opaque
define i32 @user_service_info_receive(%struct.ss7* nocapture readnone %0, %struct.isup_call* nocapture readnone %1, i32 %2, i8* nocapture readnone %3, i32 returned %4) {
ret i32 %4
}
int test_imm_DCint64_midword_reg(long long val) {
  return ((val >> 16) & (0xDC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DCint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xdc,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DCint64_midword_reg>:
test   $0xdc0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DCint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 220
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_DCint64_midword_reg(i64 %0) {
%2 = and i64 %0, 14417920
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void SMC_IRQHandler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<SMC_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <SMC_IRQHandler+0x9>
jmp    1109 <SMC_IRQHandler+0x9>

x86 assembly (clang, -O2):
<SMC_IRQHandler>:
jmp    1100 <SMC_IRQHandler>

LLVM IR (-O0):
define void @SMC_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @SMC_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Type definitions */
struct RNAsnoop_args_info {
  int dummy;
};

/* Variables and functions */
int EXIT_SUCCESS;
int RNAsnoop_cmdline_parser_required(struct RNAsnoop_args_info *args_info,
                                     const char *prog_name) {
  (void)(args_info);
  (void)(prog_name);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<RNAsnoop_cmdline_parser_required>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ecd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNAsnoop_cmdline_parser_required>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct.RNAsnoop_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @RNAsnoop_cmdline_parser_required(%struct.RNAsnoop_args_info* %0, i8* %1) {
%3 = alloca %struct.RNAsnoop_args_info*
%4 = alloca i8*
store %struct.RNAsnoop_args_info* %0, %struct.RNAsnoop_args_info** %3
store i8* %1, i8** %4
%5 = load %struct.RNAsnoop_args_info*, %struct.RNAsnoop_args_info** %3
%6 = load i8*, i8** %4
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
%struct.RNAsnoop_args_info = type { i32 }
@EXIT_SUCCESS = global i32 0
define i32 @RNAsnoop_cmdline_parser_required(%struct.RNAsnoop_args_info* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
__attribute__((__unused__, __always___)) __attribute__((__artificial__)) void
serialize() {}


x86 assembly (clang, -O0):
<serialize>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<serialize>:
ret

LLVM IR (-O0):
define void @serialize() {
ret void
}

LLVM IR (-O2):
define void @serialize() {
ret void
}
void XShmCreatePixmap() {}


x86 assembly (clang, -O0):
<XShmCreatePixmap>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XShmCreatePixmap>:
ret

LLVM IR (-O0):
define void @XShmCreatePixmap() {
ret void
}

LLVM IR (-O2):
define void @XShmCreatePixmap() {
ret void
}
/* Type definitions */
struct sockaddr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int accept(int sockfd, struct sockaddr *addr, void *addrlen) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<accept>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ed2(%rip),%rax
mov    (%rax),%ecx
mov    0x2eb9(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<accept>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @accept(i32 %0, %struct.sockaddr* %1, i8* %2) {
%4 = alloca i32
%5 = alloca %struct.sockaddr*
%6 = alloca i8*
store i32 %0, i32* %4
store %struct.sockaddr* %1, %struct.sockaddr** %5
store i8* %2, i8** %6
%7 = load i32, i32* @ENOSYS
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @accept(i32 %0, %struct.sockaddr* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = load i32, i32* @ENOSYS
store i32 %4, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ _putchar(char);
void print_numbers(void) {
  int i = '0';
  while (i <= '9') {
    _putchar(i);
    i++;
  }
  _putchar('\n');
}


x86 assembly (clang, -O0):
<print_numbers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x30,-0x4(%rbp)
cmpl   $0x39,-0x4(%rbp)
jg     1142 <print_numbers+0x32>
mov    -0x4(%rbp),%eax
movsbl %al,%edi
call   1030 <_putchar@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <print_numbers+0xf>
mov    $0xa,%edi
call   1030 <_putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_numbers>:
push   %rax
mov    $0x30,%edi
call   1030 <_putchar@plt>
mov    $0x31,%edi
call   1030 <_putchar@plt>
mov    $0x32,%edi
call   1030 <_putchar@plt>
mov    $0x33,%edi
call   1030 <_putchar@plt>
mov    $0x34,%edi
call   1030 <_putchar@plt>
mov    $0x35,%edi
call   1030 <_putchar@plt>
mov    $0x36,%edi
call   1030 <_putchar@plt>
mov    $0x37,%edi
call   1030 <_putchar@plt>
mov    $0x38,%edi
call   1030 <_putchar@plt>
mov    $0x39,%edi
call   1030 <_putchar@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <_putchar@plt>

LLVM IR (-O0):
define void @print_numbers() {
%1 = alloca i32
store i32 48, i32* %1
br label %2
2: ; preds = %5, %0
%3 = load i32, i32* %1
%4 = icmp sle i32 %3, 57
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, i32* %1
%7 = trunc i32 %6 to i8
%8 = call i32 @_putchar(i8 signext %7)
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %2
11: ; preds = %2
%12 = call i32 @_putchar(i8 signext 10)
ret void
}

LLVM IR (-O2):
define void @print_numbers() {
%1 = tail call i32 @_putchar(i8 signext 48)
%2 = tail call i32 @_putchar(i8 signext 49)
%3 = tail call i32 @_putchar(i8 signext 50)
%4 = tail call i32 @_putchar(i8 signext 51)
%5 = tail call i32 @_putchar(i8 signext 52)
%6 = tail call i32 @_putchar(i8 signext 53)
%7 = tail call i32 @_putchar(i8 signext 54)
%8 = tail call i32 @_putchar(i8 signext 55)
%9 = tail call i32 @_putchar(i8 signext 56)
%10 = tail call i32 @_putchar(i8 signext 57)
%11 = tail call i32 @_putchar(i8 signext 10)
ret void
}