xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ dev_t;

/* Variables and functions */
int major(int /*<<< orphan*/ const);
int minor(int /*<<< orphan*/ const);
int dev_hash(const dev_t dev) {
  const int hash = (major(dev) << 16) | minor(dev);
  return hash % (1021);
}


x86 assembly (clang, -O0):
<dev_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <major@plt>
shl    $0x10,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <minor@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x3fd,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dev_hash>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1040 <major@plt>
mov    %eax,%ebp
shl    $0x10,%ebp
mov    %ebx,%edi
call   1030 <minor@plt>
or     %ebp,%eax
cltq
imul   $0xffffffff80604837,%rax,%rcx
shr    $0x20,%rcx
add    %eax,%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
sar    $0x9,%ecx
add    %edx,%ecx
imul   $0x3fd,%ecx,%ecx
sub    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @dev_hash(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @major(i32 %4)
%6 = shl i32 %5, 16
%7 = load i32, i32* %2
%8 = call i32 @minor(i32 %7)
%9 = or i32 %6, %8
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = srem i32 %10, 1021
ret i32 %11
}

LLVM IR (-O2):
define i32 @dev_hash(i32 %0) {
%2 = tail call i32 @major(i32 %0)
%3 = shl i32 %2, 16
%4 = tail call i32 @minor(i32 %0)
%5 = or i32 %3, %4
%6 = srem i32 %5, 1021
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
char *fun3(char *p) {
  printf("%s\n", p);
  return p;
}


x86 assembly (clang, -O0):
<fun3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun3>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i8* @fun3(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i8* @fun3(i8* returned %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* %0
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t f3m_calc_tempo_samples(int32_t tempo) {
  return (32768 * 10) / (tempo * 4);
}


x86 assembly (clang, -O0):
<f3m_calc_tempo_samples>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
shl    $0x2,%ecx
mov    $0x50000,%eax
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3m_calc_tempo_samples>:
shl    $0x2,%edi
mov    $0x50000,%eax
xor    %edx,%edx
idiv   %edi
ret

LLVM IR (-O0):
define i32 @f3m_calc_tempo_samples(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 4
%5 = sdiv i32 327680, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @f3m_calc_tempo_samples(i32 %0) {
%2 = shl nsw i32 %0, 2
%3 = sdiv i32 327680, %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int a = 1, b = 0;
loop:
  a += b;
  b += a;
  printf("%i\n%i\n", a, b);
  if (a > 0 && b > 0)
    goto loop;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
cmpl   $0x0,-0x8(%rbp)
jle    116a <main+0x5a>
cmpl   $0x0,-0xc(%rbp)
jle    116a <main+0x5a>
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %rbx
xor    %r15d,%r15d
mov    $0x1,%ebx
lea    0xedc(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    %r15d,%ebx
lea    (%rbx,%r15,1),%edx
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    %ebx,%r15d
jg     1130 <main+0x20>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%i\0A%i\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %19, %0
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = add nsw i32 %6, %5
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = add nsw i32 %9, %8
store i32 %10, i32* %3
%11 = load i32, i32* %2
%12 = load i32, i32* %3
%13 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %12)
%14 = load i32, i32* %2
%15 = icmp sgt i32 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %4
%17 = load i32, i32* %3
%18 = icmp sgt i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %16
br label %4
20: ; preds = %16, %4
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%i\0A%i\0A\00"
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = phi i32 [ 1, %0 ], [ %4, %1 ]
%3 = phi i32 [ 0, %0 ], [ %5, %1 ]
%4 = add nuw nsw i32 %3, %2
%5 = add nuw nsw i32 %4, %3
%6 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
%7 = icmp sgt i32 %5, 0
br i1 %7, label %1, label %8
8: ; preds = %1
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ snprintf(char *, int, char *, char *, char *, char *);
void f_error(char *filename, char *message) {
  char error[50];
  snprintf(error, 50, "%s: %s%s", "ls", (message == NULL) ? "" : message,
           filename);
  perror(error);
}


x86 assembly (clang, -O0):
<f_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x50(%rbp),%rax
mov    %rax,-0x58(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1153 <f_error+0x33>
lea    0xebe(%rip),%rax
mov    %rax,-0x60(%rbp)
jmp    115b <f_error+0x3b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x60(%rbp)
mov    -0x58(%rbp),%rdi
mov    -0x60(%rbp),%r8
mov    -0x8(%rbp),%r9
mov    $0x32,%esi
lea    0xe8d(%rip),%rdx
lea    0xe8f(%rip),%rcx
call   1030 <snprintf@plt>
lea    -0x50(%rbp),%rdi
call   1040 <perror@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_error>:
push   %rbx
sub    $0x40,%rsp
mov    %rdi,%r9
test   %rsi,%rsi
lea    0xed6(%rip),%r8
cmovne %rsi,%r8
lea    0xec3(%rip),%rdx
lea    0xec5(%rip),%rcx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x32,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rdi
call   1040 <perror@plt>
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%s: %s%s\00"
@.str.1 = [3 x i8] c"ls\00"
@.str.2 = [1 x i8] zeroinitializer
define void @f_error(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [50 x i8]
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [50 x i8], [50 x i8]* %5, i64 0, i64 0
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %10
9: ; preds = %2
br label %12
10: ; preds = %2
%11 = load i8*, i8** %4
br label %12
12: ; preds = %10, %9
%13 = phi i8* [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), %9 ], [ %11, %10 ]
%14 = load i8*, i8** %3
%15 = call i32 @snprintf(i8* %6, i32 50, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %13, i8* %14)
%16 = getelementptr inbounds [50 x i8], [50 x i8]* %5, i64 0, i64 0
%17 = call i32 @perror(i8* %16)
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s: %s%s\00"
@.str.1 = [3 x i8] c"ls\00"
@.str.2 = [1 x i8] zeroinitializer
define void @f_error(i8* %0, i8* %1) {
%3 = alloca [50 x i8]
%4 = getelementptr inbounds [50 x i8], [50 x i8]* %3, i64 0, i64 0
%5 = icmp eq i8* %1, null
%6 = select i1 %5, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* %1
%7 = call i32 @snprintf(i8* %4, i32 50, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %6, i8* %0)
%8 = call i32 @perror(i8* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ write_last_10_lines(int, char *);
int main(int argc, char *argv[]) {
  int i;
  for (i = 1; i < argc; i++) {
    write_last_10_lines(argc, argv[i]);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    115b <main+0x4b>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rsi
call   1030 <write_last_10_lines@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    $0x2,%edi
jl     1144 <main+0x34>
mov    %rsi,%r14
mov    %edi,%ebp
mov    %edi,%r15d
mov    $0x1,%ebx
nopl   0x0(%rax)
mov    (%r14,%rbx,8),%rsi
mov    %ebp,%edi
call   1030 <write_last_10_lines@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
br label %7
7: ; preds = %19, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i32, i32* %4
%13 = load i8**, i8*** %5
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8*, i8** %13, i64 %15
%17 = load i8*, i8** %16
%18 = call i32 @write_last_10_lines(i32 %12, i8* %17)
br label %19
19: ; preds = %11
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 1
store i32 %21, i32* %6
br label %7
22: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 1, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = tail call i32 @write_last_10_lines(i32 %0, i8* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ rol8addr(int /*<<< orphan*/);
int /*<<< orphan*/ zeropagex();
void rolZpx8(void) { rol8addr(zeropagex()); }


x86 assembly (clang, -O0):
<rolZpx8>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <zeropagex@plt>
mov    %eax,%edi
call   1040 <rol8addr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rolZpx8>:
push   %rax
xor    %eax,%eax
call   1030 <zeropagex@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <rol8addr@plt>

LLVM IR (-O0):
define void @rolZpx8() {
%1 = call i32 (...) @zeropagex()
%2 = call i32 @rol8addr(i32 %1)
ret void
}

LLVM IR (-O2):
define void @rolZpx8() {
%1 = tail call i32 (...) @zeropagex()
%2 = tail call i32 @rol8addr(i32 %1)
ret void
}
int do_300() { return 300; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x12c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0x12c,%eax
ret

LLVM IR (-O0):
define i32 @do_300() {
ret i32 300
}

LLVM IR (-O2):
define i32 @do_300() {
ret i32 300
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int celcon_initialize_supports(int nbr) {
  int fail, *b;
  double *c;
  fail = _ada_use_c2phc(240, &nbr, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<celcon_initialize_supports>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0xf0,%edi
lea    -0x4(%rbp),%rsi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<celcon_initialize_supports>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0xf0,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @celcon_initialize_supports(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %4
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc(i32 240, i32* %2, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @celcon_initialize_supports(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc(i32 240, i32* %2, i32* undef, double* undef)
ret i32 %3
}
int islower(int c) {
  if (c >= 'a' && c <= 'z')
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<islower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x61,-0x8(%rbp)
jl     1127 <islower+0x27>
cmpl   $0x7a,-0x8(%rbp)
jg     1127 <islower+0x27>
movl   $0x1,-0x4(%rbp)
jmp    112e <islower+0x2e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<islower>:
add    $0xffffff9f,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @islower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 122
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @islower(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
void ff_hevc_put_hevc_bi_w_qpel_v64_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_qpel_v64_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_qpel_v64_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_qpel_v64_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_qpel_v64_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_qsort(int *, int /*<<< orphan*/, int);
void sortPointers(int *vals, int total_elems) {
  do_qsort(vals, 0, total_elems - 1);
}


x86 assembly (clang, -O0):
<sortPointers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <do_qsort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sortPointers>:
lea    -0x1(%rsi),%edx
xor    %esi,%esi
jmp    1030 <do_qsort@plt>

LLVM IR (-O0):
define void @sortPointers(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = call i32 @do_qsort(i32* %5, i32 0, i32 %7)
ret void
}

LLVM IR (-O2):
define void @sortPointers(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = tail call i32 @do_qsort(i32* %0, i32 0, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ perror(char *);
int reboot(int);
int /*<<< orphan*/ sync();
void cmd_halt(int argc, char *argv[]) {
  sync();
  if (reboot(0xcdef0123) == -1)
    perror("halt");
}


x86 assembly (clang, -O0):
<cmd_halt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <sync@plt>
mov    $0xcdef0123,%edi
call   1050 <reboot@plt>
cmp    $0xffffffff,%eax
jne    1165 <cmd_halt+0x35>
lea    0xea0(%rip),%rdi
call   1040 <perror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_halt>:
push   %rax
xor    %eax,%eax
call   1030 <sync@plt>
mov    $0xcdef0123,%edi
call   1050 <reboot@plt>
cmp    $0xffffffff,%eax
je     1149 <cmd_halt+0x19>
pop    %rax
ret
lea    0xeb0(%rip),%rdi
pop    %rax
jmp    1040 <perror@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"halt\00"
define void @cmd_halt(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @sync()
%6 = call i32 @reboot(i32 -839974621)
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"halt\00"
define void @cmd_halt(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @sync()
%4 = tail call i32 @reboot(i32 -839974621)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @perror(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %2
ret void
}
/* Variables and functions */
int errno;
int connect(int sock, const void *addr, unsigned int len) {
  errno = 13;
  return -1;
}


x86 assembly (clang, -O0):
<connect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ecb(%rip),%rax
movl   $0xd,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<connect>:
mov    0x2ed9(%rip),%rax
movl   $0xd,(%rax)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @connect(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
store i32 13, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @connect(i32 %0, i8* nocapture readnone %1, i32 %2) {
store i32 13, i32* @errno
ret i32 -1
}
void vde_chain_nm7_decref(void) {}


x86 assembly (clang, -O0):
<vde_chain_nm7_decref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vde_chain_nm7_decref>:
ret

LLVM IR (-O0):
define void @vde_chain_nm7_decref() {
ret void
}

LLVM IR (-O2):
define void @vde_chain_nm7_decref() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ local_mcu_Pin2_set__E();
void pollen_parts_Led2_on__E() {
  { local_mcu_Pin2_set__E(); }
}


x86 assembly (clang, -O0):
<pollen_parts_Led2_on__E>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <local_mcu_Pin2_set__E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_parts_Led2_on__E>:
xor    %eax,%eax
jmp    1030 <local_mcu_Pin2_set__E@plt>

LLVM IR (-O0):
define void @pollen_parts_Led2_on__E() {
%1 = call i32 (...) @local_mcu_Pin2_set__E()
ret void
}

LLVM IR (-O2):
define void @pollen_parts_Led2_on__E() {
%1 = tail call i32 (...) @local_mcu_Pin2_set__E()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ afficher_carte(int);
int main() {
  int i;
  for (i = 0; i < 52; i++) {
    afficher_carte(i);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x34,-0x8(%rbp)
jge    1146 <main+0x36>
mov    -0x8(%rbp),%edi
call   1030 <afficher_carte@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <afficher_carte@plt>
add    $0x1,%ebx
cmp    $0x34,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 52
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @afficher_carte(i32 %7)
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @afficher_carte(i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 52
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
x() {
  signed char c = -1;
  return c < 0;
}


x86 assembly (clang, -O0):
<x>:
push   %rbp
mov    %rsp,%rbp
movb   $0xff,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x0,%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @x() {
%1 = alloca i8
store i8 -1, i8* %1
%2 = load i8, i8* %1
%3 = sext i8 %2 to i32
%4 = icmp slt i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @x() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ os_setSignalHandlers();
void Squawk_setSignalHandlers(void) { os_setSignalHandlers(); }


x86 assembly (clang, -O0):
<Squawk_setSignalHandlers>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <os_setSignalHandlers@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Squawk_setSignalHandlers>:
xor    %eax,%eax
jmp    1030 <os_setSignalHandlers@plt>

LLVM IR (-O0):
define void @Squawk_setSignalHandlers() {
%1 = call i32 (...) @os_setSignalHandlers()
ret void
}

LLVM IR (-O2):
define void @Squawk_setSignalHandlers() {
%1 = tail call i32 (...) @os_setSignalHandlers()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cnfImpn(char *const, int, int, char *);
int /*<<< orphan*/ emsStune(char *, int, int *const);
void ems_tune_(char *const key, int *const value, int *const status,
               int key_length) {
  char ckey[6 + 1];

  cnfImpn(key, key_length, 6, ckey);
  (void)emsStune(ckey, *value, status);
  return;
}


x86 assembly (clang, -O0):
<ems_tune_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x1c(%rbp),%esi
lea    -0x23(%rbp),%rcx
mov    $0x6,%edx
call   1030 <cnfImpn@plt>
lea    -0x23(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x18(%rbp),%rdx
call   1040 <emsStune@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ems_tune_>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%r14
mov    %rsi,%rbx
lea    0x9(%rsp),%r15
mov    %ecx,%esi
mov    $0x6,%edx
mov    %r15,%rcx
call   1030 <cnfImpn@plt>
mov    (%rbx),%esi
mov    %r15,%rdi
mov    %r14,%rdx
call   1040 <emsStune@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @ems_tune_(i8* %0, i32* %1, i32* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32
%9 = alloca [7 x i8]
store i8* %0, i8** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%10 = load i8*, i8** %5
%11 = load i32, i32* %8
%12 = getelementptr inbounds [7 x i8], [7 x i8]* %9, i64 0, i64 0
%13 = call i32 @cnfImpn(i8* %10, i32 %11, i32 6, i8* %12)
%14 = getelementptr inbounds [7 x i8], [7 x i8]* %9, i64 0, i64 0
%15 = load i32*, i32** %6
%16 = load i32, i32* %15
%17 = load i32*, i32** %7
%18 = call i32 @emsStune(i8* %14, i32 %16, i32* %17)
ret void
}

LLVM IR (-O2):
define void @ems_tune_(i8* %0, i32* nocapture %1, i32* %2, i32 %3) {
%5 = alloca [7 x i8]
%6 = getelementptr inbounds [7 x i8], [7 x i8]* %5, i64 0, i64 0
%7 = call i32 @cnfImpn(i8* %0, i32 %3, i32 6, i8* %6)
%8 = load i32, i32* %1
%9 = call i32 @emsStune(i8* %6, i32 %8, i32* %2)
ret void
}
int base64_encoded_size(int decoded_size) {
  return ((decoded_size + 2) / 3) * 4;
}


x86 assembly (clang, -O0):
<base64_encoded_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2,%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
shl    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<base64_encoded_size>:
add    $0x2,%edi
movslq %edi,%rax
imul   $0x55555556,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
shl    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @base64_encoded_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 2
%5 = sdiv i32 %4, 3
%6 = mul nsw i32 %5, 4
ret i32 %6
}

LLVM IR (-O2):
define i32 @base64_encoded_size(i32 %0) {
%2 = add nsw i32 %0, 2
%3 = sdiv i32 %2, 3
%4 = shl nsw i32 %3, 2
ret i32 %4
}
int Cyc_PP_min(int x, int y) {
  if (x <= y)
    return x;
  else {
    return y;
  }
}


x86 assembly (clang, -O0):
<Cyc_PP_min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1121 <Cyc_PP_min+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <Cyc_PP_min+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_PP_min>:
mov    %edi,%eax
cmp    %esi,%edi
cmovg  %esi,%eax
ret

LLVM IR (-O0):
define i32 @Cyc_PP_min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @Cyc_PP_min(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
int Operand_frs_encode(unsigned int *valp) {
  int error;
  error = (*valp & ~0xf) != 0;
  return error;
}


x86 assembly (clang, -O0):
<Operand_frs_encode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xfffffff0,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Operand_frs_encode>:
xor    %eax,%eax
cmpl   $0x10,(%rdi)
setae  %al
ret

LLVM IR (-O0):
define i32 @Operand_frs_encode(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = and i32 %5, -16
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i32
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @Operand_frs_encode(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp ugt i32 %2, 15
%4 = zext i1 %3 to i32
ret i32 %4
}
unsigned char foo(unsigned char c) { return (c >= '0') && (c <= '9'); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <foo+0x29>
movzbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
add    $0xd0,%dil
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define zeroext i8 @foo(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
%13 = trunc i32 %12 to i8
ret i8 %13
}

LLVM IR (-O2):
define zeroext i8 @foo(i8 zeroext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i8
ret i8 %4
}
/* Variables and functions */
int /*<<< orphan*/ assertEqual(size_t, int /*<<< orphan*/);
int /*<<< orphan*/ memoryUsage();
int /*<<< orphan*/ mfree(void *);
void *mmalloc(size_t);
void *mrealloc(void *, size_t);
int /*<<< orphan*/ msize(void *);
void testReallocSmaller(void) {
  size_t s1 = 4096, s2 = 1024;
  void *ptr = mmalloc(s1);
  ptr = mrealloc(ptr, s2);
  assertEqual(s2, msize(ptr));
  assertEqual(s2, memoryUsage());
  mfree(ptr);
}


x86 assembly (clang, -O0):
<testReallocSmaller>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movq   $0x1000,-0x8(%rbp)
movq   $0x400,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <mmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <mrealloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
call   1080 <msize@plt>
mov    -0x28(%rbp),%rdi
mov    %eax,%esi
call   1050 <assertEqual@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    $0x0,%al
call   1060 <memoryUsage@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%esi
call   1050 <assertEqual@plt>
mov    -0x18(%rbp),%rdi
call   1070 <mfree@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testReallocSmaller>:
push   %rbx
mov    $0x1000,%edi
call   1040 <mmalloc@plt>
mov    $0x400,%esi
mov    %rax,%rdi
call   1030 <mrealloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1080 <msize@plt>
mov    $0x400,%edi
mov    %eax,%esi
call   1050 <assertEqual@plt>
xor    %eax,%eax
call   1060 <memoryUsage@plt>
mov    $0x400,%edi
mov    %eax,%esi
call   1050 <assertEqual@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1070 <mfree@plt>

LLVM IR (-O0):
define void @testReallocSmaller() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i8*
store i64 4096, i64* %1
store i64 1024, i64* %2
%4 = load i64, i64* %1
%5 = call i8* @mmalloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = load i64, i64* %2
%8 = call i8* @mrealloc(i8* %6, i64 %7)
store i8* %8, i8** %3
%9 = load i64, i64* %2
%10 = load i8*, i8** %3
%11 = call i32 @msize(i8* %10)
%12 = call i32 @assertEqual(i64 %9, i32 %11)
%13 = load i64, i64* %2
%14 = call i32 (...) @memoryUsage()
%15 = call i32 @assertEqual(i64 %13, i32 %14)
%16 = load i8*, i8** %3
%17 = call i32 @mfree(i8* %16)
ret void
}

LLVM IR (-O2):
define void @testReallocSmaller() {
%1 = tail call i8* @mmalloc(i64 4096)
%2 = tail call i8* @mrealloc(i8* %1, i64 1024)
%3 = tail call i32 @msize(i8* %2)
%4 = tail call i32 @assertEqual(i64 1024, i32 %3)
%5 = tail call i32 (...) @memoryUsage()
%6 = tail call i32 @assertEqual(i64 1024, i32 %5)
%7 = tail call i32 @mfree(i8* %2)
ret void
}
/* Variables and functions */
int power(int, int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main() {
  int a, b;
  scanf("%d %d", &a, &b);
  printf("%d", power(a, b));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <power@plt>
mov    %eax,%esi
lea    0xe9c(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
mov    (%rsp),%esi
call   1030 <power@plt>
lea    0xeab(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %2, i32* %3)
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = call i32 @power(i32 %5, i32 %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = call i32 @power(i32 %6, i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
/* Variables and functions */
float ldexpkf(float, int);
float xldexpf(float x, int q) { return ldexpkf(x, q); }


x86 assembly (clang, -O0):
<xldexpf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mov    -0x8(%rbp),%edi
call   1030 <ldexpkf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xldexpf>:
jmp    1030 <ldexpkf@plt>

LLVM IR (-O0):
define float @xldexpf(float %0, i32 %1) {
%3 = alloca float
%4 = alloca i32
store float %0, float* %3
store i32 %1, i32* %4
%5 = load float, float* %3
%6 = load i32, i32* %4
%7 = call float @ldexpkf(float %5, i32 %6)
ret float %7
}

LLVM IR (-O2):
define float @xldexpf(float %0, i32 %1) {
%3 = tail call float @ldexpkf(float %0, i32 %1)
ret float %3
}
int test_imm_4Fint32_mem(int *val) {
  return ((*val) & (0x4F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Fint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x4f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Fint32_mem>:
testb  $0x4f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Fint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 79
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_4Fint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 79
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
double fpconv_f32_f64(float x) { return x; }


x86 assembly (clang, -O0):
<fpconv_f32_f64>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fpconv_f32_f64>:
cvtss2sd %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @fpconv_f32_f64(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
ret double %4
}

LLVM IR (-O2):
define double @fpconv_f32_f64(float %0) {
%2 = fpext float %0 to double
ret double %2
}
/* Type definitions */
struct event {
  int dummy;
};

/* Variables and functions */
int close(int);
int /*<<< orphan*/ event_free(struct event *);
int event_get_fd(struct event *);
int AMCEvent_Free(struct event *event) {
  int fd = event_get_fd(event);
  event_free(event);
  if (fd > 2) {
    return close(fd);
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<AMCEvent_Free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <event_get_fd@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <event_free@plt>
cmpl   $0x2,-0x14(%rbp)
jle    116b <AMCEvent_Free+0x3b>
mov    -0x14(%rbp),%edi
call   1050 <close@plt>
mov    %eax,-0x4(%rbp)
jmp    1172 <AMCEvent_Free+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AMCEvent_Free>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <event_get_fd@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <event_free@plt>
cmp    $0x3,%ebp
jl     1157 <AMCEvent_Free+0x27>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <close@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.event = type { i32 }
define i32 @AMCEvent_Free(%struct.event* %0) {
%2 = alloca i32
%3 = alloca %struct.event*
%4 = alloca i32
store %struct.event* %0, %struct.event** %3
%5 = load %struct.event*, %struct.event** %3
%6 = call i32 @event_get_fd(%struct.event* %5)
store i32 %6, i32* %4
%7 = load %struct.event*, %struct.event** %3
%8 = call i32 @event_free(%struct.event* %7)
%9 = load i32, i32* %4
%10 = icmp sgt i32 %9, 2
br i1 %10, label %11, label %14
11: ; preds = %1
%12 = load i32, i32* %4
%13 = call i32 @close(i32 %12)
store i32 %13, i32* %2
br label %15
14: ; preds = %1
store i32 0, i32* %2
br label %15
15: ; preds = %14, %11
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.event = type { i32 }
define i32 @AMCEvent_Free(%struct.event* %0) {
%2 = tail call i32 @event_get_fd(%struct.event* %0)
%3 = tail call i32 @event_free(%struct.event* %0)
%4 = icmp sgt i32 %2, 2
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @close(i32 %2)
br label %7
7: ; preds = %1, %5
%8 = phi i32 [ %6, %5 ], [ 0, %1 ]
ret i32 %8
}
int ft_tolower(int c) { return (c > 64 && c < 91); }


x86 assembly (clang, -O0):
<ft_tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x40,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1120 <ft_tolower+0x20>
cmpl   $0x5b,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_tolower>:
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 64
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 91
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ft_tolower(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_imm_47uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x47 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_47uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x47,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_47uint64_lowword_mem>:
testb  $0x47,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_47uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 71
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_47uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 71
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int close(int const);
int do_close(const int fd) { return close(fd); }


x86 assembly (clang, -O0):
<do_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_close>:
jmp    1030 <close@plt>

LLVM IR (-O0):
define i32 @do_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @close(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @do_close(i32 %0) {
%2 = tail call i32 @close(i32 %0)
ret i32 %2
}
int ceph_fscache_register_fs(struct ceph_fs_client *fsc) { return 0; }


x86 assembly (clang, -O0):
<ceph_fscache_register_fs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceph_fscache_register_fs>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ceph_fs_client = type opaque
define i32 @ceph_fscache_register_fs(%struct.ceph_fs_client* %0) {
%2 = alloca %struct.ceph_fs_client*
store %struct.ceph_fs_client* %0, %struct.ceph_fs_client** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ceph_fs_client = type opaque
define i32 @ceph_fscache_register_fs(%struct.ceph_fs_client* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sequential_(int, int);
void sequential(int a, int b) {
#pragma analysis_check assert defined(square[a][b]) upper_exposed(             \
    square[a][b], square[a - 1][b], square[a][b], square[a][b - 1], a, b)
  sequential_(a, b);
}


x86 assembly (clang, -O0):
<sequential>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <sequential_@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sequential>:
jmp    1030 <sequential_@plt>

LLVM IR (-O0):
define void @sequential(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @sequential_(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @sequential(i32 %0, i32 %1) {
%3 = tail call i32 @sequential_(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int ASCII2HexDigit(char);
int ASCII2HexByte(char hi, char lo) {
  int i, j;
  i = ASCII2HexDigit(hi);
  j = ASCII2HexDigit(lo);
  return (((i >= 0) && (j >= 0)) ? (i * 0x10 + j) : -1);
}


x86 assembly (clang, -O0):
<ASCII2HexByte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <ASCII2HexDigit@plt>
mov    %eax,-0x8(%rbp)
movsbl -0x2(%rbp),%edi
call   1030 <ASCII2HexDigit@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1161 <ASCII2HexByte+0x51>
cmpl   $0x0,-0xc(%rbp)
jl     1161 <ASCII2HexByte+0x51>
mov    -0x8(%rbp),%eax
shl    $0x4,%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    116e <ASCII2HexByte+0x5e>
mov    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    116e <ASCII2HexByte+0x5e>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASCII2HexByte>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
call   1030 <ASCII2HexDigit@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1030 <ASCII2HexDigit@plt>
mov    %ebp,%ecx
shl    $0x4,%ecx
add    %eax,%ecx
or     %eax,%ebp
mov    $0xffffffff,%eax
cmovns %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ASCII2HexByte(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
%7 = load i8, i8* %3
%8 = call i32 @ASCII2HexDigit(i8 signext %7)
store i32 %8, i32* %5
%9 = load i8, i8* %4
%10 = call i32 @ASCII2HexDigit(i8 signext %9)
store i32 %10, i32* %6
%11 = load i32, i32* %5
%12 = icmp sge i32 %11, 0
br i1 %12, label %13, label %21
13: ; preds = %2
%14 = load i32, i32* %6
%15 = icmp sge i32 %14, 0
br i1 %15, label %16, label %21
16: ; preds = %13
%17 = load i32, i32* %5
%18 = mul nsw i32 %17, 16
%19 = load i32, i32* %6
%20 = add nsw i32 %18, %19
br label %22
21: ; preds = %13, %2
br label %22
22: ; preds = %21, %16
%23 = phi i32 [ %20, %16 ], [ -1, %21 ]
ret i32 %23
}

LLVM IR (-O2):
define i32 @ASCII2HexByte(i8 signext %0, i8 signext %1) {
%3 = tail call i32 @ASCII2HexDigit(i8 signext %0)
%4 = tail call i32 @ASCII2HexDigit(i8 signext %1)
%5 = icmp sgt i32 %3, -1
%6 = icmp sgt i32 %4, -1
%7 = select i1 %5, i1 %6, i1 false
%8 = shl nsw i32 %3, 4
%9 = add nsw i32 %8, %4
%10 = select i1 %7, i32 %9, i32 -1
ret i32 %10
}
int rangeBitwiseAnd(int m, int n) {
  while (m < n)
    n &= n - 1;
  return n;
}


x86 assembly (clang, -O0):
<rangeBitwiseAnd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1127 <rangeBitwiseAnd+0x27>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
and    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    110a <rangeBitwiseAnd+0xa>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rangeBitwiseAnd>:
cmp    %edi,%esi
jle    111c <rangeBitwiseAnd+0x1c>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x1(%rsi),%eax
and    %esi,%eax
mov    %eax,%esi
cmp    %edi,%eax
jg     1110 <rangeBitwiseAnd+0x10>
ret
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @rangeBitwiseAnd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 1
%12 = load i32, i32* %4
%13 = and i32 %12, %11
store i32 %13, i32* %4
br label %5
14: ; preds = %5
%15 = load i32, i32* %4
ret i32 %15
}

LLVM IR (-O2):
define i32 @rangeBitwiseAnd(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, %0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = add nsw i32 %5, -1
%7 = and i32 %6, %5
%8 = icmp sgt i32 %7, %0
br i1 %8, label %4, label %9
9: ; preds = %4, %2
%10 = phi i32 [ %1, %2 ], [ %7, %4 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ WIZ_CS(int);
void IINCHIP_CSon(void) { WIZ_CS(1); }


x86 assembly (clang, -O0):
<IINCHIP_CSon>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <WIZ_CS@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IINCHIP_CSon>:
mov    $0x1,%edi
jmp    1030 <WIZ_CS@plt>

LLVM IR (-O0):
define void @IINCHIP_CSon() {
%1 = call i32 @WIZ_CS(i32 1)
ret void
}

LLVM IR (-O2):
define void @IINCHIP_CSon() {
%1 = tail call i32 @WIZ_CS(i32 1)
ret void
}
int __attribute__((no)) a(void) {
  *(volatile int *)32 = 1;
  return 1;
}


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20,%eax
movl   $0x1,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
movl   $0x1,0x20
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @a() {
store volatile i32 1, i32* inttoptr (i64 32 to i32*)
ret i32 1
}

LLVM IR (-O2):
define i32 @a() {
store volatile i32 1, i32* inttoptr (i64 32 to i32*)
ret i32 1
}
struct hostent *gethostbyaddr(const void *addr, unsigned int len, int type) {
  return 0;
}


x86 assembly (clang, -O0):
<gethostbyaddr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gethostbyaddr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.hostent = type opaque
define %struct.hostent* @gethostbyaddr(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret %struct.hostent* null
}

LLVM IR (-O2):
%struct.hostent = type opaque
define noalias %struct.hostent* @gethostbyaddr(i8* nocapture readnone %0, i32 %1, i32 %2) {
ret %struct.hostent* null
}
unsigned char f3(unsigned char a) { return a + 5; }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x5,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
lea    0x5(%rdi),%eax
ret

LLVM IR (-O0):
define zeroext i8 @f3(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = add nsw i32 %4, 5
%6 = trunc i32 %5 to i8
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @f3(i8 zeroext %0) {
%2 = add i8 %0, 5
ret i8 %2
}
/* Variables and functions */
int /*<<< orphan*/ swim_ndelay(int);
int /*<<< orphan*/ swim_send_bit(unsigned char);
void swim_send_ack(unsigned char ack) {
  swim_ndelay(2750);
  swim_send_bit(ack);
}


x86 assembly (clang, -O0):
<swim_send_ack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0xabe,%edi
call   1040 <swim_ndelay@plt>
movzbl -0x1(%rbp),%edi
call   1030 <swim_send_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swim_send_ack>:
push   %rbx
mov    %edi,%ebx
mov    $0xabe,%edi
call   1040 <swim_ndelay@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <swim_send_bit@plt>

LLVM IR (-O0):
define void @swim_send_ack(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @swim_ndelay(i32 2750)
%4 = load i8, i8* %2
%5 = call i32 @swim_send_bit(i8 zeroext %4)
ret void
}

LLVM IR (-O2):
define void @swim_send_ack(i8 zeroext %0) {
%2 = tail call i32 @swim_ndelay(i32 2750)
%3 = tail call i32 @swim_send_bit(i8 zeroext %0)
ret void
}