int get_op(char c) {
  switch (c) {
  case '&':
    return 0;
  case '|':
    return 1;
  case '^':
    return 2;
  case '+':
    return 3;
  case '-':
    return 4;
  case '*':
    return 5;
  case '/':
    return 6;
  case '%':
    return 7;
  default:
    return -1;
  }
}


x86 assembly (clang, -O0):
<get_op>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x25,%eax
je     11ea <get_op+0xea>
jmp    111f <get_op+0x1f>
mov    -0xc(%rbp),%eax
sub    $0x26,%eax
je     1196 <get_op+0x96>
jmp    1130 <get_op+0x30>
mov    -0xc(%rbp),%eax
sub    $0x2a,%eax
je     11d2 <get_op+0xd2>
jmp    1141 <get_op+0x41>
mov    -0xc(%rbp),%eax
sub    $0x2b,%eax
je     11ba <get_op+0xba>
jmp    1152 <get_op+0x52>
mov    -0xc(%rbp),%eax
sub    $0x2d,%eax
je     11c6 <get_op+0xc6>
jmp    1163 <get_op+0x63>
mov    -0xc(%rbp),%eax
sub    $0x2f,%eax
je     11de <get_op+0xde>
jmp    1174 <get_op+0x74>
mov    -0xc(%rbp),%eax
sub    $0x5e,%eax
je     11ae <get_op+0xae>
jmp    1185 <get_op+0x85>
mov    -0xc(%rbp),%eax
sub    $0x7c,%eax
je     11a2 <get_op+0xa2>
jmp    11f6 <get_op+0xf6>
movl   $0x0,-0x4(%rbp)
jmp    11fd <get_op+0xfd>
movl   $0x1,-0x4(%rbp)
jmp    11fd <get_op+0xfd>
movl   $0x2,-0x4(%rbp)
jmp    11fd <get_op+0xfd>
movl   $0x3,-0x4(%rbp)
jmp    11fd <get_op+0xfd>
movl   $0x4,-0x4(%rbp)
jmp    11fd <get_op+0xfd>
movl   $0x5,-0x4(%rbp)
jmp    11fd <get_op+0xfd>
movl   $0x6,-0x4(%rbp)
jmp    11fd <get_op+0xfd>
movl   $0x7,-0x4(%rbp)
jmp    11fd <get_op+0xfd>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_op>:
lea    -0x25(%rdi),%ecx
cmp    $0x39,%ecx
ja     1120 <get_op+0x20>
xor    %eax,%eax
lea    0xeef(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x7,%eax
ret
cmp    $0x7c,%edi
jne    112b <get_op+0x2b>
mov    $0x1,%eax
ret
mov    $0xffffffff,%eax
ret
mov    $0x5,%eax
ret
mov    $0x3,%eax
ret
mov    $0x4,%eax
ret
mov    $0x6,%eax
ret
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @get_op(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %14 [
i32 38, label %6
i32 124, label %7
i32 94, label %8
i32 43, label %9
i32 45, label %10
i32 42, label %11
i32 47, label %12
i32 37, label %13
]
6: ; preds = %1
store i32 0, i32* %2
br label %15
7: ; preds = %1
store i32 1, i32* %2
br label %15
8: ; preds = %1
store i32 2, i32* %2
br label %15
9: ; preds = %1
store i32 3, i32* %2
br label %15
10: ; preds = %1
store i32 4, i32* %2
br label %15
11: ; preds = %1
store i32 5, i32* %2
br label %15
12: ; preds = %1
store i32 6, i32* %2
br label %15
13: ; preds = %1
store i32 7, i32* %2
br label %15
14: ; preds = %1
store i32 -1, i32* %2
br label %15
15: ; preds = %14, %13, %12, %11, %10, %9, %8, %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @get_op(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %10 [
i32 38, label %11
i32 124, label %3
i32 94, label %4
i32 43, label %5
i32 45, label %6
i32 42, label %7
i32 47, label %8
i32 37, label %9
]
3: ; preds = %1
br label %11
4: ; preds = %1
br label %11
5: ; preds = %1
br label %11
6: ; preds = %1
br label %11
7: ; preds = %1
br label %11
8: ; preds = %1
br label %11
9: ; preds = %1
br label %11
10: ; preds = %1
br label %11
11: ; preds = %1, %10, %9, %8, %7, %6, %5, %4, %3
%12 = phi i32 [ -1, %10 ], [ 7, %9 ], [ 6, %8 ], [ 5, %7 ], [ 4, %6 ], [ 3, %5 ], [ 2, %4 ], [ 1, %3 ], [ 0, %1 ]
ret i32 %12
}