int main1(void) {
  foo((__attribute__((vector_size(16))) unsigned int){10, 11, 12, 13},
      (__attribute__((vector_size(16))) unsigned int){20, 21, 22, 23},
      (__attribute__((vector_size(16))) unsigned int){30, 31, 32, 33},
      (__attribute__((vector_size(16))) unsigned int){40, 41, 42, 43});
  bar((__attribute__((vector_size(16))) unsigned int){10, 11, 12, 13}, 2,
      (__attribute__((vector_size(16))) unsigned int){20, 21, 22, 23},
      (__attribute__((vector_size(16))) unsigned int){30, 31, 32, 33});
  return 0;
}


x86 assembly (clang, -O0):
<main1>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa0,%rsp
movaps 0xece(%rip),%xmm0
movaps %xmm0,-0xa0(%rbp)
movaps %xmm0,-0x10(%rbp)
movaps -0x10(%rbp),%xmm0
movaps 0xec8(%rip),%xmm1
movaps %xmm1,-0x90(%rbp)
movaps %xmm1,-0x20(%rbp)
movaps -0x20(%rbp),%xmm1
movaps 0xec2(%rip),%xmm2
movaps %xmm2,-0x80(%rbp)
movaps %xmm2,-0x30(%rbp)
movaps -0x30(%rbp),%xmm2
movaps 0xebf(%rip),%xmm3
movaps %xmm3,-0x40(%rbp)
movaps -0x40(%rbp),%xmm3
mov    $0x4,%al
call   1040 <foo@plt>
movaps -0xa0(%rbp),%xmm0
movaps -0x90(%rbp),%xmm1
movaps -0x80(%rbp),%xmm2
movaps %xmm0,-0x50(%rbp)
movaps -0x50(%rbp),%xmm0
movaps %xmm1,-0x60(%rbp)
movaps -0x60(%rbp),%xmm1
movaps %xmm2,-0x70(%rbp)
movdqa -0x70(%rbp),%xmm2
mov    $0x2,%edi
mov    $0x3,%al
call   1030 <bar@plt>
xor    %eax,%eax
add    $0xa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main1>:
push   %rax
movaps 0xed8(%rip),%xmm0
movaps 0xee1(%rip),%xmm1
movaps 0xeea(%rip),%xmm2
movaps 0xef3(%rip),%xmm3
mov    $0x4,%al
call   1040 <foo@plt>
movaps 0xeb5(%rip),%xmm0
mov    $0x2,%edi
movaps 0xeb9(%rip),%xmm1
movaps 0xec2(%rip),%xmm2
mov    $0x3,%al
call   1030 <bar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main1() {
%1 = alloca <4 x i32>
%2 = alloca <4 x i32>
%3 = alloca <4 x i32>
%4 = alloca <4 x i32>
%5 = alloca <4 x i32>
%6 = alloca <4 x i32>
%7 = alloca <4 x i32>
store <4 x i32> <i32 10, i32 11, i32 12, i32 13>, <4 x i32>* %1
%8 = load <4 x i32>, <4 x i32>* %1
store <4 x i32> <i32 20, i32 21, i32 22, i32 23>, <4 x i32>* %2
%9 = load <4 x i32>, <4 x i32>* %2
store <4 x i32> <i32 30, i32 31, i32 32, i32 33>, <4 x i32>* %3
%10 = load <4 x i32>, <4 x i32>* %3
store <4 x i32> <i32 40, i32 41, i32 42, i32 43>, <4 x i32>* %4
%11 = load <4 x i32>, <4 x i32>* %4
%12 = call i32 (<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, ...) bitcast (i32 (...)* @foo to i32 (<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, ...)*)(<4 x i32> %8, <4 x i32> %9, <4 x i32> %10, <4 x i32> %11)
store <4 x i32> <i32 10, i32 11, i32 12, i32 13>, <4 x i32>* %5
%13 = load <4 x i32>, <4 x i32>* %5
store <4 x i32> <i32 20, i32 21, i32 22, i32 23>, <4 x i32>* %6
%14 = load <4 x i32>, <4 x i32>* %6
store <4 x i32> <i32 30, i32 31, i32 32, i32 33>, <4 x i32>* %7
%15 = load <4 x i32>, <4 x i32>* %7
%16 = call i32 (<4 x i32>, i32, <4 x i32>, <4 x i32>, ...) bitcast (i32 (...)* @bar to i32 (<4 x i32>, i32, <4 x i32>, <4 x i32>, ...)*)(<4 x i32> %13, i32 2, <4 x i32> %14, <4 x i32> %15)
ret i32 0
}

LLVM IR (-O2):
define i32 @main1() {
%1 = tail call i32 (<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, ...) bitcast (i32 (...)* @foo to i32 (<4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, ...)*)(<4 x i32> <i32 10, i32 11, i32 12, i32 13>, <4 x i32> <i32 20, i32 21, i32 22, i32 23>, <4 x i32> <i32 30, i32 31, i32 32, i32 33>, <4 x i32> <i32 40, i32 41, i32 42, i32 43>)
%2 = tail call i32 (<4 x i32>, i32, <4 x i32>, <4 x i32>, ...) bitcast (i32 (...)* @bar to i32 (<4 x i32>, i32, <4 x i32>, <4 x i32>, ...)*)(<4 x i32> <i32 10, i32 11, i32 12, i32 13>, i32 2, <4 x i32> <i32 20, i32 21, i32 22, i32 23>, <4 x i32> <i32 30, i32 31, i32 32, i32 33>)
ret i32 0
}