xunge/DecIR huggingface dataset:
/* Variables and functions */
double atof(char *);
double myround(double);
int /*<<< orphan*/ printf(char *, double);
int main(int argc, char *argv[]) {
  double number;
  number = atof(argv[1]);
  printf("number is %f\n", number);
  printf("myround result is %f\n", myround(number));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <atof@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
lea    0xe9c(%rip),%rdi
call   1040 <printf@plt>
movsd  -0x18(%rbp),%xmm0
call   1050 <myround@plt>
lea    0xe94(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1030 <atof@plt>
movsd  %xmm0,(%rsp)
lea    0xeba(%rip),%rdi
call   1040 <printf@plt>
movsd  (%rsp),%xmm0
call   1050 <myround@plt>
lea    0xeb2(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"number is %f\0A\00"
@.str.1 = [22 x i8] c"myround result is %f\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca double
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i8**, i8*** %5
%8 = getelementptr inbounds i8*, i8** %7, i64 1
%9 = load i8*, i8** %8
%10 = call double @atof(i8* %9)
store double %10, double* %6
%11 = load double, double* %6
%12 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), double %11)
%13 = load double, double* %6
%14 = call double @myround(double %13)
%15 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), double %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"number is %f\0A\00"
@.str.1 = [22 x i8] c"myround result is %f\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call double @atof(i8* %4)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), double %5)
%7 = tail call double @myround(double %5)
%8 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), double %7)
ret i32 0
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
scalar_t__ EINTR;
scalar_t__ errno;
int recv(int, void *, size_t, int);
size_t Wrecv(int s, void *buf, size_t len, int flags) {
  ssize_t res;
retry:
  res = recv(s, buf, len, flags);
  if (res == -1) {
    if (errno == EINTR)
      goto retry;
  }
  return ((size_t)(res));
}


x86 assembly (clang, -O0):
<Wrecv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
call   1030 <recv@plt>
mov    %eax,-0x20(%rbp)
cmpl   $0xffffffff,-0x20(%rbp)
jne    116a <Wrecv+0x5a>
mov    0x2e93(%rip),%rax
mov    (%rax),%rax
mov    0x2e81(%rip),%rcx
cmp    (%rcx),%rax
jne    1165 <Wrecv+0x55>
jmp    1126 <Wrecv+0x16>
jmp    116a <Wrecv+0x5a>
movslq -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Wrecv>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %rdx,%r15
mov    %rsi,%rbp
mov    %edi,%ebx
mov    0x2eb3(%rip),%r12
mov    0x2ea4(%rip),%r13
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %ebx,%edi
mov    %rbp,%rsi
mov    %r15,%rdx
mov    %r14d,%ecx
call   1030 <recv@plt>
cmp    $0xffffffff,%eax
jne    115f <Wrecv+0x4f>
mov    (%r12),%rcx
cmp    0x0(%r13),%rcx
je     1140 <Wrecv+0x30>
cltq
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i64 0
@EINTR = global i64 0
define i64 @Wrecv(i32 %0, i8* %1, i64 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i32 %3, i32* %8
br label %10
10: ; preds = %22, %4
%11 = load i32, i32* %5
%12 = load i8*, i8** %6
%13 = load i64, i64* %7
%14 = load i32, i32* %8
%15 = call i32 @recv(i32 %11, i8* %12, i64 %13, i32 %14)
store i32 %15, i32* %9
%16 = load i32, i32* %9
%17 = icmp eq i32 %16, -1
br i1 %17, label %18, label %24
18: ; preds = %10
%19 = load i64, i64* @errno
%20 = load i64, i64* @EINTR
%21 = icmp eq i64 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
br label %10
23: ; preds = %18
br label %24
24: ; preds = %23, %10
%25 = load i32, i32* %9
%26 = sext i32 %25 to i64
ret i64 %26
}

LLVM IR (-O2):
@errno = global i64 0
@EINTR = global i64 0
define i64 @Wrecv(i32 %0, i8* %1, i64 %2, i32 %3) {
br label %5
5: ; preds = %8, %4
%6 = tail call i32 @recv(i32 %0, i8* %1, i64 %2, i32 %3)
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = load i64, i64* @errno
%10 = load i64, i64* @EINTR
%11 = icmp eq i64 %9, %10
br i1 %11, label %5, label %12
12: ; preds = %8, %5
%13 = sext i32 %6 to i64
ret i64 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_packs_pu16(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 test_mm_packs_pu16(__m64 a, __m64 b) { return _mm_packs_pu16(a, b); }


x86 assembly (clang, -O0):
<test_mm_packs_pu16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_packs_pu16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_packs_pu16>:
jmp    1030 <_mm_packs_pu16@plt>

LLVM IR (-O0):
define i32 @test_mm_packs_pu16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_packs_pu16(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_packs_pu16(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_packs_pu16(i32 %0, i32 %1)
ret i32 %3
}
int cl_int(dummy)
int dummy;
{
  doexit(1, 1);
  return (0);
}


x86 assembly (clang, -O0):
<cl_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%esi
mov    %esi,%edi
mov    $0x0,%al
call   1030 <doexit@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_int>:
push   %rax
mov    $0x1,%edi
mov    $0x1,%esi
xor    %eax,%eax
call   1030 <doexit@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cl_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i32, i32, ...) bitcast (i32 (...)* @doexit to i32 (i32, i32, ...)*)(i32 1, i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @cl_int(i32 %0) {
%2 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @doexit to i32 (i32, i32, ...)*)(i32 1, i32 1)
ret i32 0
}
/* Variables and functions */
unsigned long long OPENSSL_cpu_caps();
int ssl_aes_is_accelerated(void) {
  return ((OPENSSL_cpu_caps() & (1ULL << 57)) != 0);
}


x86 assembly (clang, -O0):
<ssl_aes_is_accelerated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <OPENSSL_cpu_caps@plt>
movabs $0x200000000000000,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssl_aes_is_accelerated>:
push   %rax
xor    %eax,%eax
call   1030 <OPENSSL_cpu_caps@plt>
shr    $0x39,%rax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ssl_aes_is_accelerated() {
%1 = call i64 (...) @OPENSSL_cpu_caps()
%2 = and i64 %1, 144115188075855872
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @ssl_aes_is_accelerated() {
%1 = tail call i64 (...) @OPENSSL_cpu_caps()
%2 = lshr i64 %1, 57
%3 = trunc i64 %2 to i32
%4 = and i32 %3, 1
ret i32 %4
}
int my_countchar(const char *str, char ch) {
  int count = 0;
  while (*str != '\0') {
    if (*str == ch) {
      count++;
    }
    str++;
  }
  return count;
}


x86 assembly (clang, -O0):
<my_countchar>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1152 <my_countchar+0x52>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1141 <my_countchar+0x41>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1115 <my_countchar+0x15>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_countchar>:
mov    (%rdi),%cl
test   %cl,%cl
je     1126 <my_countchar+0x26>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
xor    %edx,%edx
cmp    %sil,%cl
sete   %dl
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <my_countchar+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @my_countchar(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i32
store i8* %0, i8** %3
store i8 %1, i8* %4
store i32 0, i32* %5
br label %6
6: ; preds = %21, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %24
11: ; preds = %6
%12 = load i8*, i8** %3
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = load i8, i8* %4
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %14, %16
br i1 %17, label %18, label %21
18: ; preds = %11
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %21
21: ; preds = %18, %11
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %3
br label %6
24: ; preds = %6
%25 = load i32, i32* %5
ret i32 %25
}

LLVM IR (-O2):
define i32 @my_countchar(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i32 [ %11, %5 ], [ 0, %2 ]
%8 = phi i8* [ %12, %5 ], [ %0, %2 ]
%9 = icmp eq i8 %6, %1
%10 = zext i1 %9 to i32
%11 = add nuw nsw i32 %7, %10
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i32 [ 0, %2 ], [ %11, %5 ]
ret i32 %16
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ _fail(char const *const, int const);
int /*<<< orphan*/ print_error(char *, char const *const);
void _assert_true(const uint64_t result, const char *const expression,
                  const char *const file, const int line) {
  if (!result) {
    print_error("%s\n", expression);
    _fail(file, line);
  }
}


x86 assembly (clang, -O0):
<_assert_true>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    115c <_assert_true+0x3c>
mov    -0x10(%rbp),%rsi
lea    0xeb5(%rip),%rdi
call   1030 <print_error@plt>
mov    -0x18(%rbp),%rdi
mov    -0x1c(%rbp),%esi
call   1040 <_fail@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_assert_true>:
test   %edi,%edi
je     1125 <_assert_true+0x5>
ret
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %rdx,%rbx
lea    0xecc(%rip),%rdi
call   1030 <print_error@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <_fail@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @_assert_true(i32 %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 0
br i1 %10, label %17, label %11
11: ; preds = %4
%12 = load i8*, i8** %6
%13 = call i32 @print_error(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %12)
%14 = load i8*, i8** %7
%15 = load i32, i32* %8
%16 = call i32 @_fail(i8* %14, i32 %15)
br label %17
17: ; preds = %11, %4
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @_assert_true(i32 %0, i8* %1, i8* %2, i32 %3) {
%5 = icmp eq i32 %0, 0
br i1 %5, label %6, label %9
6: ; preds = %4
%7 = tail call i32 @print_error(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
%8 = tail call i32 @_fail(i8* %2, i32 %3)
br label %9
9: ; preds = %6, %4
ret void
}
void ble_evt_hardware_io_port_status(
    const struct ble_msg_hardware_io_port_status_evt_t *msg) {}


x86 assembly (clang, -O0):
<ble_evt_hardware_io_port_status>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_evt_hardware_io_port_status>:
ret

LLVM IR (-O0):
%struct.ble_msg_hardware_io_port_status_evt_t = type opaque
define void @ble_evt_hardware_io_port_status(%struct.ble_msg_hardware_io_port_status_evt_t* %0) {
%2 = alloca %struct.ble_msg_hardware_io_port_status_evt_t*
store %struct.ble_msg_hardware_io_port_status_evt_t* %0, %struct.ble_msg_hardware_io_port_status_evt_t** %2
ret void
}

LLVM IR (-O2):
%struct.ble_msg_hardware_io_port_status_evt_t = type opaque
define void @ble_evt_hardware_io_port_status(%struct.ble_msg_hardware_io_port_status_evt_t* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t decode_voltage_ncp5392p(uint8_t v) {
  if (v == 0xff)
    return 0;
  return (0x59 - (v >> 1)) * 125 + 5000;
}


x86 assembly (clang, -O0):
<decode_voltage_ncp5392p>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xff,-0x8(%rbp)
jne    1120 <decode_voltage_ncp5392p+0x20>
movl   $0x0,-0x4(%rbp)
jmp    1138 <decode_voltage_ncp5392p+0x38>
mov    -0x8(%rbp),%ecx
sar    $0x1,%ecx
mov    $0x59,%eax
sub    %ecx,%eax
imul   $0x7d,%eax,%eax
add    $0x1388,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_voltage_ncp5392p>:
mov    %edi,%eax
sar    %eax
mov    $0x59,%ecx
sub    %eax,%ecx
imul   $0x7d,%ecx,%ecx
add    $0x1388,%ecx
xor    %eax,%eax
cmp    $0xff,%edi
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @decode_voltage_ncp5392p(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 255
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = ashr i32 %8, 1
%10 = sub nsw i32 89, %9
%11 = mul nsw i32 %10, 125
%12 = add nsw i32 %11, 5000
store i32 %12, i32* %2
br label %13
13: ; preds = %7, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @decode_voltage_ncp5392p(i32 %0) {
%2 = icmp eq i32 %0, 255
%3 = ashr i32 %0, 1
%4 = sub nsw i32 89, %3
%5 = mul nsw i32 %4, 125
%6 = add nsw i32 %5, 5000
%7 = select i1 %2, i32 0, i32 %6
ret i32 %7
}
void foo315(int p) {}


x86 assembly (clang, -O0):
<foo315>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo315>:
ret

LLVM IR (-O0):
define void @foo315(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo315(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int mptetd_get(uint64_t data, int offset) {
  const int value = (data >> 4 * offset) & 15;
  return (value & 8) ? -(value & 7) : (value & 7);
}


x86 assembly (clang, -O0):
<mptetd_get>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x2,%ecx
sar    %cl,%eax
and    $0xf,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     113c <mptetd_get+0x3c>
mov    -0xc(%rbp),%ecx
and    $0x7,%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x10(%rbp)
jmp    1145 <mptetd_get+0x45>
mov    -0xc(%rbp),%eax
and    $0x7,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mptetd_get>:
lea    0x0(,%rsi,4),%ecx
sar    %cl,%edi
mov    %edi,%ecx
and    $0x7,%ecx
mov    %ecx,%eax
neg    %eax
test   $0x8,%dil
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @mptetd_get(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = mul nsw i32 4, %7
%9 = ashr i32 %6, %8
%10 = and i32 %9, 15
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = and i32 %11, 8
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %2
%15 = load i32, i32* %5
%16 = and i32 %15, 7
%17 = sub nsw i32 0, %16
br label %21
18: ; preds = %2
%19 = load i32, i32* %5
%20 = and i32 %19, 7
br label %21
21: ; preds = %18, %14
%22 = phi i32 [ %17, %14 ], [ %20, %18 ]
ret i32 %22
}

LLVM IR (-O2):
define i32 @mptetd_get(i32 %0, i32 %1) {
%3 = shl nsw i32 %1, 2
%4 = ashr i32 %0, %3
%5 = and i32 %4, 8
%6 = icmp eq i32 %5, 0
%7 = and i32 %4, 7
%8 = sub nsw i32 0, %7
%9 = select i1 %6, i32 %7, i32 %8
ret i32 %9
}
call1a(uc, us, ui, ul) unsigned char uc;
unsigned short us;
unsigned int ui;
unsigned long ul;
{
  uc = 5;
  us = 6;
  ui = 7;
  ul = 8;
}


x86 assembly (clang, -O0):
<call1a>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
movb   $0x5,-0x5(%rbp)
movw   $0x6,-0x8(%rbp)
movl   $0x7,-0xc(%rbp)
movq   $0x8,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<call1a>:
ret

LLVM IR (-O0):
define i32 @call1a(i32 %0, i32 %1, i32 %2, i64 %3) {
%5 = alloca i32
%6 = alloca i8
%7 = alloca i16
%8 = alloca i32
%9 = alloca i64
%10 = trunc i32 %0 to i8
%11 = trunc i32 %1 to i16
store i8 %10, i8* %6
store i16 %11, i16* %7
store i32 %2, i32* %8
store i64 %3, i64* %9
store i8 5, i8* %6
store i16 6, i16* %7
store i32 7, i32* %8
store i64 8, i64* %9
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @call1a(i32 %0, i32 %1, i32 %2, i64 %3) {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ calloc(int, int);
int /*<<< orphan*/ fread_safe(float *, int, int, int /*<<< orphan*/ *);
float *load_float_array(int length, FILE *fp) {
  float *values = (float *)calloc(length, sizeof(float));
  fread_safe(values, sizeof(float), length, fp);
  return values;
}


x86 assembly (clang, -O0):
<load_float_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x4,%esi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rcx
mov    $0x4,%esi
call   1040 <fread_safe@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_float_array>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %edi,%ebp
mov    $0x4,%esi
call   1030 <calloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    $0x4,%esi
mov    %ebp,%edx
mov    %r14,%rcx
call   1040 <fread_safe@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define float* @load_float_array(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca float*
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32, i32* %3
%7 = call i64 @calloc(i32 %6, i32 4)
%8 = inttoptr i64 %7 to float*
store float* %8, float** %5
%9 = load float*, float** %5
%10 = load i32, i32* %3
%11 = load i32*, i32** %4
%12 = call i32 @fread_safe(float* %9, i32 4, i32 %10, i32* %11)
%13 = load float*, float** %5
ret float* %13
}

LLVM IR (-O2):
define float* @load_float_array(i32 %0, i32* %1) {
%3 = tail call i64 @calloc(i32 %0, i32 4)
%4 = inttoptr i64 %3 to float*
%5 = tail call i32 @fread_safe(float* %4, i32 4, i32 %0, i32* %1)
ret float* %4
}
double Tween_CubicOutEasing(double k) {
  --k;
  return k * k * k + 1;
}


x86 assembly (clang, -O0):
<Tween_CubicOutEasing>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeca(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Tween_CubicOutEasing>:
addsd  0xef8(%rip),%xmm0
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm1,%xmm0
addsd  0xeec(%rip),%xmm0
ret

LLVM IR (-O0):
define double @Tween_CubicOutEasing(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, -1.000000e+00
store double %4, double* %2
%5 = load double, double* %2
%6 = load double, double* %2
%7 = fmul double %5, %6
%8 = load double, double* %2
%9 = call double @llvm.fmuladd.f64(double %7, double %8, double 1.000000e+00)
ret double %9
}

LLVM IR (-O2):
define double @Tween_CubicOutEasing(double %0) {
%2 = fadd double %0, -1.000000e+00
%3 = fmul double %2, %2
%4 = tail call double @llvm.fmuladd.f64(double %3, double %2, double 1.000000e+00)
ret double %4
}
void get_options_and_is_reading(int argc, char *argv[]) {}


x86 assembly (clang, -O0):
<get_options_and_is_reading>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_options_and_is_reading>:
ret

LLVM IR (-O0):
define void @get_options_and_is_reading(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret void
}

LLVM IR (-O2):
define void @get_options_and_is_reading(i32 %0, i8** nocapture %1) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ _UARTBaseValid(int);
void UARTFIFODisable(uint32_t ui32Base) {
  ASSERT(_UARTBaseValid(ui32Base));
  (*((volatile uint32_t *)(ui32Base + 0x0000002C))) &= ~(0x00000010);
}


x86 assembly (clang, -O0):
<UARTFIFODisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x2c,%eax
cltq
mov    (%rax),%ecx
and    $0xffffffef,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTFIFODisable>:
push   %rbx
mov    %edi,%ebx
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
movslq %ebx,%rax
andl   $0xffffffef,0x2c(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @UARTFIFODisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_UARTBaseValid(i32 %3)
%5 = call i32 @ASSERT(i32 %4)
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 44
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = and i32 %10, -17
store volatile i32 %11, i32* %9
ret void
}

LLVM IR (-O2):
define void @UARTFIFODisable(i32 %0) {
%2 = tail call i32 @_UARTBaseValid(i32 %0)
%3 = tail call i32 @ASSERT(i32 %2)
%4 = add nsw i32 %0, 44
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -17
store volatile i32 %8, i32* %6
ret void
}
int modgreater(long a, long b) { return ((a - b) > 0); }


x86 assembly (clang, -O0):
<modgreater>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
cmp    $0x0,%rax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<modgreater>:
xor    %eax,%eax
cmp    %rsi,%rdi
setg   %al
ret

LLVM IR (-O0):
define i32 @modgreater(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 %5, %6
%8 = icmp sgt i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @modgreater(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int foo(int, int, int);
__attribute__((no)) int bar(int x) {
  return foo(x, 2, 3) + foo(x, 4, 3) + foo(x + 6, x, 3) + x;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x2,%esi
mov    $0x3,%edx
call   1030 <foo@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x4,%esi
mov    $0x3,%edx
call   1030 <foo@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
add    $0x6,%edi
mov    -0x4(%rbp),%esi
mov    $0x3,%edx
call   1030 <foo@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebx
mov    $0x2,%esi
mov    $0x3,%edx
call   1030 <foo@plt>
mov    %eax,%ebp
mov    %ebx,%edi
mov    $0x4,%esi
mov    $0x3,%edx
call   1030 <foo@plt>
mov    %eax,%r14d
lea    0x6(%rbx),%edi
mov    %ebx,%esi
mov    $0x3,%edx
call   1030 <foo@plt>
add    %ebx,%ebp
add    %r14d,%ebp
add    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @foo(i32 %3, i32 2, i32 3)
%5 = load i32, i32* %2
%6 = call i32 @foo(i32 %5, i32 4, i32 3)
%7 = add nsw i32 %4, %6
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 6
%10 = load i32, i32* %2
%11 = call i32 @foo(i32 %9, i32 %10, i32 3)
%12 = add nsw i32 %7, %11
%13 = load i32, i32* %2
%14 = add nsw i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @bar(i32 %0) {
%2 = tail call i32 @foo(i32 %0, i32 2, i32 3)
%3 = tail call i32 @foo(i32 %0, i32 4, i32 3)
%4 = add nsw i32 %0, 6
%5 = tail call i32 @foo(i32 %4, i32 %0, i32 3)
%6 = add i32 %2, %0
%7 = add i32 %6, %3
%8 = add i32 %7, %5
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ cnfLock();
int /*<<< orphan*/ cnfUnlock();
int /*<<< orphan*/ ems_fioer_(char *const, int *const, int);
void err_fioer_(char *const TOKEN, int *const IOSTAT, int TOKEN_length) {
  cnfLock();
  ems_fioer_(TOKEN, IOSTAT, TOKEN_length);
  cnfUnlock();
}


x86 assembly (clang, -O0):
<err_fioer_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x0,%al
call   1030 <cnfLock@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1050 <ems_fioer_@plt>
mov    $0x0,%al
call   1040 <cnfUnlock@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<err_fioer_>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
xor    %eax,%eax
call   1030 <cnfLock@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1050 <ems_fioer_@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <cnfUnlock@plt>

LLVM IR (-O0):
define void @err_fioer_(i8* %0, i32* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32
store i8* %0, i8** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = call i32 (...) @cnfLock()
%8 = load i8*, i8** %4
%9 = load i32*, i32** %5
%10 = load i32, i32* %6
%11 = call i32 @ems_fioer_(i8* %8, i32* %9, i32 %10)
%12 = call i32 (...) @cnfUnlock()
ret void
}

LLVM IR (-O2):
define void @err_fioer_(i8* %0, i32* %1, i32 %2) {
%4 = tail call i32 (...) @cnfLock()
%5 = tail call i32 @ems_fioer_(i8* %0, i32* %1, i32 %2)
%6 = tail call i32 (...) @cnfUnlock()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Write_LCD(int, char *, int);
void Disable_Scroll(int fd) {
  char cmd[] = {254, 82, 253};
  Write_LCD(fd, cmd, 3);
}


x86 assembly (clang, -O0):
<Disable_Scroll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0xede(%rip),%ax
mov    %ax,-0x7(%rbp)
mov    0xed6(%rip),%al
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x7(%rbp),%rsi
mov    $0x3,%edx
call   1030 <Write_LCD@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Disable_Scroll>:
push   %rax
movb   $0xfd,0x6(%rsp)
movw   $0x52fe,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x3,%edx
call   1030 <Write_LCD@plt>
pop    %rax
ret

LLVM IR (-O0):
@__const.Disable_Scroll.cmd = [3 x i8] c"\FER\FD"
define void @Disable_Scroll(i32 %0) {
%2 = alloca i32
%3 = alloca [3 x i8]
store i32 %0, i32* %2
%4 = bitcast [3 x i8]* %3 to i8*
%5 = load i32, i32* %2
%6 = getelementptr inbounds [3 x i8], [3 x i8]* %3, i64 0, i64 0
%7 = call i32 @Write_LCD(i32 %5, i8* %6, i32 3)
ret void
}

LLVM IR (-O2):
@__const.Disable_Scroll.cmd = [3 x i8] c"\FER\FD"
define void @Disable_Scroll(i32 %0) {
%2 = alloca [3 x i8]
%3 = getelementptr inbounds [3 x i8], [3 x i8]* %2, i64 0, i64 0
%4 = call i32 @Write_LCD(i32 %0, i8* %3, i32 3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void printStr(void *str) {
  char *temp = (char *)str;
  printf("%-5s", temp);
}


x86 assembly (clang, -O0):
<printStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printStr>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%-5s\00"
define void @printStr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%-5s\00"
define void @printStr(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int dorgqr(int M, int N, int K, double *A, int LDA, double *TAU, double *WORK,
           int LWORK, int *INFO) {
  extern int dorgqr_(int *M, int *N, int *K, double *A, int *LDA, double *TAU,
                     double *WORK, int *LWORK, int *INFO);
  return dorgqr_(&M, &N, &K, A, &LDA, TAU, WORK, &LWORK, INFO);
}


x86 assembly (clang, -O0):
<dorgqr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x20(%rbp),%rax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%rax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x28(%rbp),%r9
mov    0x10(%rbp),%r11
mov    0x20(%rbp),%rax
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x1c(%rbp),%r8
lea    0x18(%rbp),%r10
mov    %r11,(%rsp)
mov    %r10,0x8(%rsp)
mov    %rax,0x10(%rsp)
call   1030 <dorgqr_@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dorgqr>:
sub    $0x18,%rsp
mov    0x20(%rsp),%r10
mov    0x30(%rsp),%r11
mov    %edi,0x14(%rsp)
mov    %esi,0x10(%rsp)
mov    %edx,0xc(%rsp)
mov    %r8d,0x8(%rsp)
sub    $0x8,%rsp
lea    0x30(%rsp),%rax
lea    0x1c(%rsp),%rdi
lea    0x18(%rsp),%rsi
lea    0x14(%rsp),%rdx
lea    0x10(%rsp),%r8
push   %r11
push   %rax
push   %r10
call   1030 <dorgqr_@plt>
add    $0x38,%rsp
ret

LLVM IR (-O0):
define i32 @dorgqr(i32 %0, i32 %1, i32 %2, double* %3, i32 %4, double* %5, double* %6, i32 %7, i32* %8) {
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca double*
%14 = alloca i32
%15 = alloca double*
%16 = alloca double*
%17 = alloca i32
%18 = alloca i32*
store i32 %0, i32* %10
store i32 %1, i32* %11
store i32 %2, i32* %12
store double* %3, double** %13
store i32 %4, i32* %14
store double* %5, double** %15
store double* %6, double** %16
store i32 %7, i32* %17
store i32* %8, i32** %18
%19 = load double*, double** %13
%20 = load double*, double** %15
%21 = load double*, double** %16
%22 = load i32*, i32** %18
%23 = call i32 @dorgqr_(i32* %10, i32* %11, i32* %12, double* %19, i32* %14, double* %20, double* %21, i32* %17, i32* %22)
ret i32 %23
}

LLVM IR (-O2):
define i32 @dorgqr(i32 %0, i32 %1, i32 %2, double* %3, i32 %4, double* %5, double* %6, i32 %7, i32* %8) {
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store i32 %0, i32* %10
store i32 %1, i32* %11
store i32 %2, i32* %12
store i32 %4, i32* %13
store i32 %7, i32* %14
%15 = call i32 @dorgqr_(i32* %10, i32* %11, i32* %12, double* %3, i32* %13, double* %5, double* %6, i32* %14, i32* %8)
ret i32 %15
}
/* Variables and functions */
scalar_t__ EOF;
scalar_t__ fputs(char const *, int /*<<< orphan*/);
scalar_t__ putchar(char);
int /*<<< orphan*/ stdout;
int puts(const char *str) {
  if (fputs(str, stdout) == EOF)
    return EOF;
  if (putchar('\n') == EOF)
    return EOF;
  return 0;
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    0x2ea1(%rip),%rax
mov    (%rax),%esi
call   1040 <fputs@plt>
mov    0x2ea3(%rip),%rcx
cmp    (%rcx),%rax
jne    1160 <puts+0x40>
mov    0x2e93(%rip),%rax
mov    (%rax),%rax
mov    %eax,-0x4(%rbp)
jmp    1193 <puts+0x73>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    0x2e77(%rip),%rcx
cmp    (%rcx),%rax
jne    118c <puts+0x6c>
mov    0x2e67(%rip),%rax
mov    (%rax),%rax
mov    %eax,-0x4(%rbp)
jmp    1193 <puts+0x73>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
mov    0x2eb0(%rip),%rax
mov    (%rax),%esi
call   1040 <fputs@plt>
mov    0x2eb2(%rip),%rbx
cmp    (%rbx),%rax
je     1153 <puts+0x33>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    %rax,%rcx
mov    (%rbx),%rax
xor    %edx,%edx
cmp    %rax,%rcx
cmovne %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@stdout = global i32 0
@EOF = global i64 0
define i32 @puts(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i32, i32* @stdout
%6 = call i64 @fputs(i8* %4, i32 %5)
%7 = load i64, i64* @EOF
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i64, i64* @EOF
%11 = trunc i64 %10 to i32
store i32 %11, i32* %2
br label %20
12: ; preds = %1
%13 = call i64 @putchar(i8 signext 10)
%14 = load i64, i64* @EOF
%15 = icmp eq i64 %13, %14
br i1 %15, label %16, label %19
16: ; preds = %12
%17 = load i64, i64* @EOF
%18 = trunc i64 %17 to i32
store i32 %18, i32* %2
br label %20
19: ; preds = %12
store i32 0, i32* %2
br label %20
20: ; preds = %19, %16, %9
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
@stdout = global i32 0
@EOF = global i64 0
define i32 @puts(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i64 @fputs(i8* %0, i32 %2)
%4 = load i64, i64* @EOF
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = trunc i64 %3 to i32
br label %14
8: ; preds = %1
%9 = tail call i64 @putchar(i8 signext 10)
%10 = load i64, i64* @EOF
%11 = icmp eq i64 %9, %10
%12 = trunc i64 %10 to i32
%13 = select i1 %11, i32 %12, i32 0
br label %14
14: ; preds = %8, %6
%15 = phi i32 [ %7, %6 ], [ %13, %8 ]
ret i32 %15
}
int fib(int param1) {
  int eax;
  int eax_1;
  int local4;
  if (param1 <= 1) {
    local4 = param1;
  } else {
    eax = fib(param1 - 1);
    eax_1 = fib(param1 - 2);
    local4 = eax + eax_1;
  }
  return local4;
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jg     1130 <fib+0x20>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1155 <fib+0x45>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jge    1120 <fib+0x10>
mov    %ebx,%ecx
jmp    1144 <fib+0x34>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1130 <fib+0x20>
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, i32* %2
store i32 %9, i32* %5
br label %20
10: ; preds = %1
%11 = load i32, i32* %2
%12 = sub nsw i32 %11, 1
%13 = call i32 @fib(i32 %12)
store i32 %13, i32* %3
%14 = load i32, i32* %2
%15 = sub nsw i32 %14, 2
%16 = call i32 @fib(i32 %15)
store i32 %16, i32* %4
%17 = load i32, i32* %3
%18 = load i32, i32* %4
%19 = add nsw i32 %17, %18
store i32 %19, i32* %5
br label %20
20: ; preds = %10, %8
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}
void foo(long double *output) { *output = 0.0; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
fldz
fstpt  (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
fldz
fstpt  (%rdi)
ret

LLVM IR (-O0):
define void @foo(x86_fp80* %0) {
%2 = alloca x86_fp80*
store x86_fp80* %0, x86_fp80** %2
%3 = load x86_fp80*, x86_fp80** %2
store x86_fp80 0xK00000000000000000000, x86_fp80* %3
ret void
}

LLVM IR (-O2):
define void @foo(x86_fp80* nocapture writeonly %0) {
store x86_fp80 0xK00000000000000000000, x86_fp80* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x8c() {
  Assert_real((isspace(140) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              705, ("isspace should be 0 for 0x8c"));
}


x86 assembly (clang, -O0):
<t_isspace_0x8c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8c,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2c1,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x8c>:
push   %rax
mov    $0x8c,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2c1,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x8c\00"
define void @t_isspace_0x8c() {
%1 = call i64 @isspace(i32 140)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 705, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x8c\00"
define void @t_isspace_0x8c() {
%1 = tail call i64 @isspace(i32 140)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 705, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
double clNCD(double a, double b, double ab) {
  double min = a, max = a;
  if (a < b) {
    max = b;
  }
  if (a > b) {
    min = b;
  }
  return (ab - min) / max;
}


x86 assembly (clang, -O0):
<clNCD>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1145 <clNCD+0x45>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    115f <clNCD+0x5f>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
subsd  -0x20(%rbp),%xmm0
divsd  -0x28(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<clNCD>:
movapd %xmm1,%xmm3
maxsd  %xmm0,%xmm3
minsd  %xmm0,%xmm1
subsd  %xmm1,%xmm2
divsd  %xmm3,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @clNCD(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%9 = load double, double* %4
store double %9, double* %7
%10 = load double, double* %4
store double %10, double* %8
%11 = load double, double* %4
%12 = load double, double* %5
%13 = fcmp olt double %11, %12
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = load double, double* %5
store double %15, double* %8
br label %16
16: ; preds = %14, %3
%17 = load double, double* %4
%18 = load double, double* %5
%19 = fcmp ogt double %17, %18
br i1 %19, label %20, label %22
20: ; preds = %16
%21 = load double, double* %5
store double %21, double* %7
br label %22
22: ; preds = %20, %16
%23 = load double, double* %6
%24 = load double, double* %7
%25 = fsub double %23, %24
%26 = load double, double* %8
%27 = fdiv double %25, %26
ret double %27
}

LLVM IR (-O2):
define double @clNCD(double %0, double %1, double %2) {
%4 = fcmp olt double %0, %1
%5 = select i1 %4, double %1, double %0
%6 = fcmp ogt double %0, %1
%7 = select i1 %6, double %1, double %0
%8 = fsub double %2, %7
%9 = fdiv double %8, %5
ret double %9
}
/* Variables and functions */
int isdigit(char const);
bool isStrDigit(const char *str) {
  bool is_digit;
  while (*str) {
    is_digit = isdigit(*str);
    str++;
    if (!is_digit) {
      return false;
    }
  }
  return true;
}


x86 assembly (clang, -O0):
<isStrDigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     115f <isStrDigit+0x4f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    115a <isStrDigit+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    1166 <isStrDigit+0x56>
jmp    111c <isStrDigit+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isStrDigit>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl (%rbx),%eax
test   %al,%al
je     113b <isStrDigit+0x2b>
movsbl %al,%edi
call   1030 <isdigit@plt>
add    $0x1,%rbx
test   %eax,%eax
jne    1120 <isStrDigit+0x10>
xor    %eax,%eax
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isStrDigit(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
br label %5
5: ; preds = %18, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call i32 @isdigit(i8 signext %11)
store i32 %12, i32* %4
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
%15 = load i32, i32* %4
%16 = icmp ne i32 %15, 0
br i1 %16, label %18, label %17
17: ; preds = %9
store i32 0, i32* %2
br label %20
18: ; preds = %9
br label %5
19: ; preds = %5
store i32 1, i32* %2
br label %20
20: ; preds = %19, %17
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @isStrDigit(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i8* [ %0, %1 ], [ %8, %6 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i32 @isdigit(i8 signext %4)
%8 = getelementptr inbounds i8, i8* %3, i64 1
%9 = icmp eq i32 %7, 0
br i1 %9, label %10, label %2
10: ; preds = %2, %6
%11 = phi i32 [ 0, %6 ], [ 1, %2 ]
ret i32 %11
}
int kmain() {
  init_fb();
  serial_init();
  init_gdt();
  init_idt();
  asm volatile("int $0x3");
  asm volatile("int $0x4");
  for (;;)
    ;
  return 1;
}


x86 assembly (clang, -O0):
<kmain>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_fb@plt>
mov    $0x0,%al
call   1060 <serial_init@plt>
mov    $0x0,%al
call   1050 <init_gdt@plt>
mov    $0x0,%al
call   1040 <init_idt@plt>
int3
int    $0x4
jmp    1163 <kmain+0x23>

x86 assembly (clang, -O2):
<kmain>:
push   %rax
xor    %eax,%eax
call   1030 <init_fb@plt>
xor    %eax,%eax
call   1060 <serial_init@plt>
xor    %eax,%eax
call   1050 <init_gdt@plt>
xor    %eax,%eax
call   1040 <init_idt@plt>
int3
int    $0x4
jmp    1160 <kmain+0x20>

LLVM IR (-O0):
define i32 @kmain() {
%1 = call i32 (...) @init_fb()
%2 = call i32 (...) @serial_init()
%3 = call i32 (...) @init_gdt()
%4 = call i32 (...) @init_idt()
br label %5
5: ; preds = %5, %0
br label %5
}

LLVM IR (-O2):
define i32 @kmain() {
%1 = tail call i32 (...) @init_fb()
%2 = tail call i32 (...) @serial_init()
%3 = tail call i32 (...) @init_gdt()
%4 = tail call i32 (...) @init_idt()
tail call void asm sideeffect "int $$0x3", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "int $$0x4", "~{dirflag},~{fpsr},~{flags}"()
br label %5
5: ; preds = %5, %0
br label %5
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vfprintf(int /*<<< orphan*/, char const *,
                            int /*<<< orphan*/);
void vyowl(const char *fmt, const char *pfx, va_list v) {
  fprintf(stderr,
          "umx"
          ": %s",
          pfx);
  vfprintf(stderr, fmt, v);
  fprintf(stderr, "\n");
}


x86 assembly (clang, -O0):
<vyowl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
lea    0xeb9(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <vfprintf@plt>
mov    0x2e76(%rip),%rax
mov    (%rax),%edi
lea    0xe95(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vyowl>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%ebp
mov    %rsi,%rdx
mov    %rdi,%rbx
mov    0x2ead(%rip),%r14
mov    (%r14),%edi
lea    0xec3(%rip),%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%r14),%edi
mov    %rbx,%rsi
mov    %ebp,%edx
call   1040 <vfprintf@plt>
mov    (%r14),%edi
lea    0xead(%rip),%rsi
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"umx: %s\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @vyowl(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %5
%9 = call i32 (i32, i8*, ...) @fprintf(i32 %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = load i32, i32* @stderr
%11 = load i8*, i8** %4
%12 = load i32, i32* %6
%13 = call i32 @vfprintf(i32 %10, i8* %11, i32 %12)
%14 = load i32, i32* @stderr
%15 = call i32 (i32, i8*, ...) @fprintf(i32 %14, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"umx: %s\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @vyowl(i8* %0, i8* %1, i32 %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 (i32, i8*, ...) @fprintf(i32 %4, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %1)
%6 = load i32, i32* @stderr
%7 = tail call i32 @vfprintf(i32 %6, i8* %0, i32 %2)
%8 = load i32, i32* @stderr
%9 = tail call i32 (i32, i8*, ...) @fprintf(i32 %8, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}