xunge/DecIR huggingface dataset:
/* Type definitions */
struct tempName {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ trashDirFileExt(struct tempName *, char *, char *, char *,
                                   int /*<<< orphan*/);
void trashDirFile(struct tempName *tn, char *dirName, char *base,
                  char *suffix) {
  trashDirFileExt(tn, dirName, base, suffix, 0);
}


x86 assembly (clang, -O0):
<trashDirFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %r8d,%r8d
call   1030 <trashDirFileExt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trashDirFile>:
xor    %r8d,%r8d
jmp    1030 <trashDirFileExt@plt>

LLVM IR (-O0):
%struct.tempName = type { i32 }
define void @trashDirFile(%struct.tempName* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca %struct.tempName*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store %struct.tempName* %0, %struct.tempName** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load %struct.tempName*, %struct.tempName** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
%13 = call i32 @trashDirFileExt(%struct.tempName* %9, i8* %10, i8* %11, i8* %12, i32 0)
ret void
}

LLVM IR (-O2):
%struct.tempName = type { i32 }
define void @trashDirFile(%struct.tempName* %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call i32 @trashDirFileExt(%struct.tempName* %0, i8* %1, i8* %2, i8* %3, i32 0)
ret void
}
/* Type definitions */
struct event_base {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ event_base_free(struct event_base *);
int AMCEventBase_Free(struct event_base *base) {
  event_base_free(base);
  return 0;
}


x86 assembly (clang, -O0):
<AMCEventBase_Free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <event_base_free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AMCEventBase_Free>:
push   %rax
call   1030 <event_base_free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.event_base = type { i32 }
define i32 @AMCEventBase_Free(%struct.event_base* %0) {
%2 = alloca %struct.event_base*
store %struct.event_base* %0, %struct.event_base** %2
%3 = load %struct.event_base*, %struct.event_base** %2
%4 = call i32 @event_base_free(%struct.event_base* %3)
ret i32 0
}

LLVM IR (-O2):
%struct.event_base = type { i32 }
define i32 @AMCEventBase_Free(%struct.event_base* %0) {
%2 = tail call i32 @event_base_free(%struct.event_base* %0)
ret i32 0
}
/* Variables and functions */
double sqrt(double);
void b_sqrt(double *x) { *x = sqrt(*x); }


x86 assembly (clang, -O0):
<b_sqrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1030 <sqrt@plt>
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_sqrt>:
push   %rbx
mov    %rdi,%rbx
movsd  (%rdi),%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1128 <b_sqrt+0x18>
sqrtsd %xmm0,%xmm0
jmp    112d <b_sqrt+0x1d>
call   1030 <sqrt@plt>
movsd  %xmm0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @b_sqrt(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = load double, double* %3
%5 = call double @sqrt(double %4)
%6 = load double*, double** %2
store double %5, double* %6
ret void
}

LLVM IR (-O2):
define void @b_sqrt(double* nocapture %0) {
%2 = load double, double* %0
%3 = tail call double @sqrt(double %2)
store double %3, double* %0
ret void
}
unsigned int yes_uint(void) { return (1); }


x86 assembly (clang, -O0):
<yes_uint>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<yes_uint>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @yes_uint() {
ret i32 1
}

LLVM IR (-O2):
define i32 @yes_uint() {
ret i32 1
}
int main() {
  int x, y;
  x++;
  ++x;
  y++;
  ++y;
  x = y = 5;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
movl   $0x5,-0x8(%rbp)
movl   $0x5,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* %1
%4 = add nsw i32 %3, 1
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = add nsw i32 %5, 1
store i32 %6, i32* %1
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
store i32 5, i32* %2
store i32 5, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  char *a;
  a = malloc(1024);
  a = (size_t)a * 1024;
  printf("%s\n", a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x400,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shl    $0xa,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x400,%edi
call   1040 <malloc@plt>
shl    $0xa,%rax
lea    0xeca(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i8*
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = call i8* @malloc(i32 1024)
store i8* %6, i8** %5
%7 = load i8*, i8** %5
%8 = ptrtoint i8* %7 to i64
%9 = mul i64 %8, 1024
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call dereferenceable_or_null(1024) i8* @malloc(i32 1024)
%4 = ptrtoint i8* %3 to i64
%5 = shl i64 %4, 10
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ putMessage(unsigned char *, int);
void nrf_powerup() {
  unsigned char cmd;
  cmd = 0x01;
  putMessage(&cmd, 1);
}


x86 assembly (clang, -O0):
<nrf_powerup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x1,-0x1(%rbp)
lea    -0x1(%rbp),%rdi
mov    $0x1,%esi
call   1030 <putMessage@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_powerup>:
push   %rax
movb   $0x1,0x7(%rsp)
lea    0x7(%rsp),%rdi
mov    $0x1,%esi
call   1030 <putMessage@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @nrf_powerup() {
%1 = alloca i8
store i8 1, i8* %1
%2 = call i32 @putMessage(i8* %1, i32 1)
ret void
}

LLVM IR (-O2):
define void @nrf_powerup() {
%1 = alloca i8
store i8 1, i8* %1
%2 = call i32 @putMessage(i8* %1, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_entity_map();
int main() {
  test_entity_map();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_entity_map@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_entity_map@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_entity_map()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_entity_map()
ret i32 0
}
int iscmoji(char a) {
  if (a >= 'a' && a <= 'z') {
    return 1;
  }
  if (a >= 'A' && a <= 'Z') {
    return 1;
  }
  if (a >= '0' && a <= '9') {
    return 1;
  }
  if (a == '_') {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<iscmoji>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1130 <iscmoji+0x30>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jg     1130 <iscmoji+0x30>
movl   $0x1,-0x4(%rbp)
jmp    119c <iscmoji+0x9c>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1156 <iscmoji+0x56>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     1156 <iscmoji+0x56>
movl   $0x1,-0x4(%rbp)
jmp    119c <iscmoji+0x9c>
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     117c <iscmoji+0x7c>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     117c <iscmoji+0x7c>
movl   $0x1,-0x4(%rbp)
jmp    119c <iscmoji+0x9c>
movsbl -0x5(%rbp),%eax
cmp    $0x5f,%eax
jne    1195 <iscmoji+0x95>
movl   $0x1,-0x4(%rbp)
jmp    119c <iscmoji+0x9c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iscmoji>:
mov    %edi,%eax
and    $0xdf,%al
add    $0xbf,%al
cmp    $0x1a,%al
setb   %al
lea    -0x30(%rdi),%ecx
cmp    $0xa,%cl
setb   %cl
cmp    $0x5f,%dil
sete   %dl
or     %cl,%dl
or     %al,%dl
movzbl %dl,%eax
ret

LLVM IR (-O0):
define i32 @iscmoji(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %36
12: ; preds = %7, %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sge i32 %14, 65
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sle i32 %18, 90
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 1, i32* %2
br label %36
21: ; preds = %16, %12
%22 = load i8, i8* %3
%23 = sext i8 %22 to i32
%24 = icmp sge i32 %23, 48
br i1 %24, label %25, label %30
25: ; preds = %21
%26 = load i8, i8* %3
%27 = sext i8 %26 to i32
%28 = icmp sle i32 %27, 57
br i1 %28, label %29, label %30
29: ; preds = %25
store i32 1, i32* %2
br label %36
30: ; preds = %25, %21
%31 = load i8, i8* %3
%32 = sext i8 %31 to i32
%33 = icmp eq i32 %32, 95
br i1 %33, label %34, label %35
34: ; preds = %30
store i32 1, i32* %2
br label %36
35: ; preds = %30
store i32 0, i32* %2
br label %36
36: ; preds = %35, %34, %29, %20, %11
%37 = load i32, i32* %2
ret i32 %37
}

LLVM IR (-O2):
define i32 @iscmoji(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = add i8 %0, -48
%6 = icmp ult i8 %5, 10
%7 = or i1 %6, %4
%8 = icmp eq i8 %0, 95
%9 = or i1 %8, %7
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ flip_double_buffer_on_bus(int);
void flip_double_buffer(void) {
  int i;
  for (i = 0; i < 4; i++)
    flip_double_buffer_on_bus(i);
}


x86 assembly (clang, -O0):
<flip_double_buffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x4,-0x4(%rbp)
jge    113f <flip_double_buffer+0x2f>
mov    -0x4(%rbp),%edi
call   1030 <flip_double_buffer_on_bus@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <flip_double_buffer+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flip_double_buffer>:
push   %rax
xor    %edi,%edi
call   1030 <flip_double_buffer_on_bus@plt>
mov    $0x1,%edi
call   1030 <flip_double_buffer_on_bus@plt>
mov    $0x2,%edi
call   1030 <flip_double_buffer_on_bus@plt>
mov    $0x3,%edi
pop    %rax
jmp    1030 <flip_double_buffer_on_bus@plt>

LLVM IR (-O0):
define void @flip_double_buffer() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %8, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 4
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, i32* %1
%7 = call i32 @flip_double_buffer_on_bus(i32 %6)
br label %8
8: ; preds = %5
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %2
11: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @flip_double_buffer() {
%1 = tail call i32 @flip_double_buffer_on_bus(i32 0)
%2 = tail call i32 @flip_double_buffer_on_bus(i32 1)
%3 = tail call i32 @flip_double_buffer_on_bus(i32 2)
%4 = tail call i32 @flip_double_buffer_on_bus(i32 3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ fd_set;

/* Variables and functions */
int /*<<< orphan*/ FD_SETSIZE;
int /*<<< orphan*/ svc_getreqset2(int /*<<< orphan*/ *, int /*<<< orphan*/);
void svc_getreqset(fd_set *readfds) { svc_getreqset2(readfds, FD_SETSIZE); }


x86 assembly (clang, -O0):
<svc_getreqset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
call   1030 <svc_getreqset2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<svc_getreqset>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <svc_getreqset2@plt>

LLVM IR (-O0):
@FD_SETSIZE = global i32 0
define void @svc_getreqset(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* @FD_SETSIZE
%5 = call i32 @svc_getreqset2(i32* %3, i32 %4)
ret void
}

LLVM IR (-O2):
@FD_SETSIZE = global i32 0
define void @svc_getreqset(i32* %0) {
%2 = load i32, i32* @FD_SETSIZE
%3 = tail call i32 @svc_getreqset2(i32* %0, i32 %2)
ret void
}
/* Type definitions */
struct jid {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ jid_domain(struct jid const *);
int /*<<< orphan*/ jid_local(struct jid const *);
struct jid *jid_new();
int /*<<< orphan*/ jid_set_domain(struct jid *, int /*<<< orphan*/);
int /*<<< orphan*/ jid_set_local(struct jid *, int /*<<< orphan*/);
struct jid *jid_new_from_jid_bare(const struct jid *jid) {
  struct jid *newjid = jid_new();
  jid_set_local(newjid, jid_local(jid));
  jid_set_domain(newjid, jid_domain(jid));
  return newjid;
}


x86 assembly (clang, -O0):
<jid_new_from_jid_bare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1060 <jid_new@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <jid_local@plt>
mov    -0x20(%rbp),%rdi
mov    %eax,%esi
call   1050 <jid_set_local@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1070 <jid_domain@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1030 <jid_set_domain@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jid_new_from_jid_bare>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1060 <jid_new@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1040 <jid_local@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1050 <jid_set_local@plt>
mov    %r14,%rdi
call   1070 <jid_domain@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <jid_set_domain@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.jid = type { i32 }
define %struct.jid* @jid_new_from_jid_bare(%struct.jid* %0) {
%2 = alloca %struct.jid*
%3 = alloca %struct.jid*
store %struct.jid* %0, %struct.jid** %2
%4 = call %struct.jid* (...) @jid_new()
store %struct.jid* %4, %struct.jid** %3
%5 = load %struct.jid*, %struct.jid** %3
%6 = load %struct.jid*, %struct.jid** %2
%7 = call i32 @jid_local(%struct.jid* %6)
%8 = call i32 @jid_set_local(%struct.jid* %5, i32 %7)
%9 = load %struct.jid*, %struct.jid** %3
%10 = load %struct.jid*, %struct.jid** %2
%11 = call i32 @jid_domain(%struct.jid* %10)
%12 = call i32 @jid_set_domain(%struct.jid* %9, i32 %11)
%13 = load %struct.jid*, %struct.jid** %3
ret %struct.jid* %13
}

LLVM IR (-O2):
%struct.jid = type { i32 }
define %struct.jid* @jid_new_from_jid_bare(%struct.jid* %0) {
%2 = tail call %struct.jid* (...) @jid_new()
%3 = tail call i32 @jid_local(%struct.jid* %0)
%4 = tail call i32 @jid_set_local(%struct.jid* %2, i32 %3)
%5 = tail call i32 @jid_domain(%struct.jid* %0)
%6 = tail call i32 @jid_set_domain(%struct.jid* %2, i32 %5)
ret %struct.jid* %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int crc32c_sb8_64_bit(int, unsigned char const *, unsigned int, int);
uint32_t multitable_crc32c(uint32_t crc32c, const unsigned char *buffer,
                           unsigned int length) {
  uint32_t to_even_word;
  if (length == 0)
    return (crc32c);
  to_even_word = (4 - (((uintptr_t)buffer) & 0x3));
  return (crc32c_sb8_64_bit(crc32c, buffer, length, to_even_word));
}


x86 assembly (clang, -O0):
<multitable_crc32c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1137 <multitable_crc32c+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115f <multitable_crc32c+0x4f>
mov    -0x10(%rbp),%rcx
and    $0x3,%rcx
mov    $0x4,%eax
sub    %rcx,%rax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
call   1030 <crc32c_sb8_64_bit@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<multitable_crc32c>:
test   %edx,%edx
je     1125 <multitable_crc32c+0x15>
mov    %esi,%eax
and    $0x3,%eax
mov    $0x4,%ecx
sub    %eax,%ecx
jmp    1030 <crc32c_sb8_64_bit@plt>
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @multitable_crc32c(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%9 = load i32, i32* %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32, i32* %5
store i32 %12, i32* %4
br label %24
13: ; preds = %3
%14 = load i8*, i8** %6
%15 = ptrtoint i8* %14 to i64
%16 = and i64 %15, 3
%17 = sub i64 4, %16
%18 = trunc i64 %17 to i32
store i32 %18, i32* %8
%19 = load i32, i32* %5
%20 = load i8*, i8** %6
%21 = load i32, i32* %7
%22 = load i32, i32* %8
%23 = call i32 @crc32c_sb8_64_bit(i32 %19, i8* %20, i32 %21, i32 %22)
store i32 %23, i32* %4
br label %24
24: ; preds = %13, %11
%25 = load i32, i32* %4
ret i32 %25
}

LLVM IR (-O2):
define i32 @multitable_crc32c(i32 %0, i8* %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %11, label %5
5: ; preds = %3
%6 = ptrtoint i8* %1 to i64
%7 = trunc i64 %6 to i32
%8 = and i32 %7, 3
%9 = sub nuw nsw i32 4, %8
%10 = tail call i32 @crc32c_sb8_64_bit(i32 %0, i8* %1, i32 %2, i32 %9)
br label %11
11: ; preds = %3, %5
%12 = phi i32 [ %10, %5 ], [ %0, %3 ]
ret i32 %12
}
int fun1205() { return 1205; }


x86 assembly (clang, -O0):
<fun1205>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4b5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1205>:
mov    $0x4b5,%eax
ret

LLVM IR (-O0):
define i32 @fun1205() {
ret i32 1205
}

LLVM IR (-O2):
define i32 @fun1205() {
ret i32 1205
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void anna_mid_free(void *key, void *val) {
  free(key);
  free(val);
}


x86 assembly (clang, -O0):
<anna_mid_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<anna_mid_free>:
push   %rbx
mov    %rsi,%rbx
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @anna_mid_free(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @free(i8* %5)
%7 = load i8*, i8** %4
%8 = call i32 @free(i8* %7)
ret void
}

LLVM IR (-O2):
define void @anna_mid_free(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %0)
%4 = tail call i32 @free(i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ activeExpireCycle(int /*<<< orphan*/);
void databasesCron(void) { activeExpireCycle(0); }


x86 assembly (clang, -O0):
<databasesCron>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <activeExpireCycle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<databasesCron>:
xor    %edi,%edi
jmp    1030 <activeExpireCycle@plt>

LLVM IR (-O0):
define void @databasesCron() {
%1 = call i32 @activeExpireCycle(i32 0)
ret void
}

LLVM IR (-O2):
define void @databasesCron() {
%1 = tail call i32 @activeExpireCycle(i32 0)
ret void
}
/* Type definitions */
union bpf_attr {
  int /*<<< orphan*/ btf_id;
};
typedef int /*<<< orphan*/ attr;
typedef int /*<<< orphan*/ __u32;

/* Variables and functions */
int /*<<< orphan*/ BPF_BTF_GET_FD_BY_ID;
int /*<<< orphan*/ bzero(union bpf_attr *, int);
int sys_bpf(int /*<<< orphan*/, union bpf_attr *, int);
int bpf_btf_get_fd_by_id(__u32 id) {
  union bpf_attr attr;
  bzero(&attr, sizeof(attr));
  attr.btf_id = id;
  return sys_bpf(BPF_BTF_GET_FD_BY_ID, &attr, sizeof(attr));
}


x86 assembly (clang, -O0):
<bpf_btf_get_fd_by_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1040 <bzero@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <sys_bpf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_btf_get_fd_by_id>:
push   %rax
mov    %edi,(%rsp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
mov    $0x4,%edx
call   1030 <sys_bpf@plt>
pop    %rcx
ret

LLVM IR (-O0):
%union.bpf_attr = type { i32 }
@BPF_BTF_GET_FD_BY_ID = global i32 0
define i32 @bpf_btf_get_fd_by_id(i32 %0) {
%2 = alloca i32
%3 = alloca %union.bpf_attr
store i32 %0, i32* %2
%4 = call i32 @bzero(%union.bpf_attr* %3, i32 4)
%5 = load i32, i32* %2
%6 = bitcast %union.bpf_attr* %3 to i32*
store i32 %5, i32* %6
%7 = load i32, i32* @BPF_BTF_GET_FD_BY_ID
%8 = call i32 @sys_bpf(i32 %7, %union.bpf_attr* %3, i32 4)
ret i32 %8
}

LLVM IR (-O2):
%union.bpf_attr = type { i32 }
@BPF_BTF_GET_FD_BY_ID = global i32 0
define i32 @bpf_btf_get_fd_by_id(i32 %0) {
%2 = alloca %union.bpf_attr
%3 = bitcast %union.bpf_attr* %2 to i8*
%4 = getelementptr inbounds %union.bpf_attr, %union.bpf_attr* %2, i64 0, i32 0
store i32 %0, i32* %4
%5 = load i32, i32* @BPF_BTF_GET_FD_BY_ID
%6 = call i32 @sys_bpf(i32 %5, %union.bpf_attr* %2, i32 4)
ret i32 %6
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void smpte_hbrmt_set_frate(uint8_t *p_hbrmt, uint8_t frate) {
  p_hbrmt[5] |= (frate >> 4);
  p_hbrmt[6] |= (frate & 0xf) << 4;
}


x86 assembly (clang, -O0):
<smpte_hbrmt_set_frate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x4,%ecx
mov    -0x8(%rbp),%rax
or     0x14(%rax),%ecx
mov    %ecx,0x14(%rax)
mov    -0xc(%rbp),%ecx
and    $0xf,%ecx
shl    $0x4,%ecx
mov    -0x8(%rbp),%rax
or     0x18(%rax),%ecx
mov    %ecx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<smpte_hbrmt_set_frate>:
mov    %esi,%eax
sar    $0x4,%eax
or     %eax,0x14(%rdi)
shl    $0x4,%esi
movzbl %sil,%eax
or     %eax,0x18(%rdi)
ret

LLVM IR (-O0):
define void @smpte_hbrmt_set_frate(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 4
%7 = load i32*, i32** %3
%8 = getelementptr inbounds i32, i32* %7, i64 5
%9 = load i32, i32* %8
%10 = or i32 %9, %6
store i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = and i32 %11, 15
%13 = shl i32 %12, 4
%14 = load i32*, i32** %3
%15 = getelementptr inbounds i32, i32* %14, i64 6
%16 = load i32, i32* %15
%17 = or i32 %16, %13
store i32 %17, i32* %15
ret void
}

LLVM IR (-O2):
define void @smpte_hbrmt_set_frate(i32* nocapture %0, i32 %1) {
%3 = ashr i32 %1, 4
%4 = getelementptr inbounds i32, i32* %0, i64 5
%5 = load i32, i32* %4
%6 = or i32 %5, %3
store i32 %6, i32* %4
%7 = shl i32 %1, 4
%8 = and i32 %7, 240
%9 = getelementptr inbounds i32, i32* %0, i64 6
%10 = load i32, i32* %9
%11 = or i32 %10, %8
store i32 %11, i32* %9
ret void
}
int test_imm_46int8_mem(signed char *val) {
  return ((*val) & (0x46 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_46int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x46,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_46int8_mem>:
testb  $0x46,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_46int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 70
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_46int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 70
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct multiple_ir_text_section_item {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct multiple_ir_text_section_item *);
int multiple_ir_text_section_item_destroy(
    struct multiple_ir_text_section_item *item) {
  free(item);
  return 0;
}


x86 assembly (clang, -O0):
<multiple_ir_text_section_item_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<multiple_ir_text_section_item_destroy>:
push   %rax
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.multiple_ir_text_section_item = type { i32 }
define i32 @multiple_ir_text_section_item_destroy(%struct.multiple_ir_text_section_item* %0) {
%2 = alloca %struct.multiple_ir_text_section_item*
store %struct.multiple_ir_text_section_item* %0, %struct.multiple_ir_text_section_item** %2
%3 = load %struct.multiple_ir_text_section_item*, %struct.multiple_ir_text_section_item** %2
%4 = call i32 @free(%struct.multiple_ir_text_section_item* %3)
ret i32 0
}

LLVM IR (-O2):
%struct.multiple_ir_text_section_item = type { i32 }
define i32 @multiple_ir_text_section_item_destroy(%struct.multiple_ir_text_section_item* nocapture %0) {
%2 = tail call i32 @free(%struct.multiple_ir_text_section_item* %0)
ret i32 0
}
int AnalyseLink(link_fd)
int link_fd;
{
  printf("BRS Information : AnalyseLink() not implemented yet.\r\n");
  return (1);
}


x86 assembly (clang, -O0):
<AnalyseLink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AnalyseLink>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [55 x i8] c"BRS Information : AnalyseLink() not implemented yet.\0D\0A\00"
define i32 @AnalyseLink(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@str = [54 x i8] c"BRS Information : AnalyseLink() not implemented yet.\0D\00"
define i32 @AnalyseLink(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([54 x i8], [54 x i8]* @str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0xab() {
  Assert_real((iscntrl(171) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              860, ("iscntrl should be 0 for 0xab"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0xab>:
push   %rbp
mov    %rsp,%rbp
mov    $0xab,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x35c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0xab>:
push   %rax
mov    $0xab,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x35c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xab\00"
define void @t_iscntrl_0xab() {
%1 = call i64 @iscntrl(i32 171)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 860, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [29 x i8] c"iscntrl should be 0 for 0xab\00"
define void @t_iscntrl_0xab() {
%1 = tail call i64 @iscntrl(i32 171)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 860, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int open_serial_and_set_cflags(char const *, int, int /*<<< orphan*/);
int open_serial(const char *device, int rate) {
  return open_serial_and_set_cflags(device, rate, 0);
}


x86 assembly (clang, -O0):
<open_serial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
call   1030 <open_serial_and_set_cflags@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_serial>:
xor    %edx,%edx
jmp    1030 <open_serial_and_set_cflags@plt>

LLVM IR (-O0):
define i32 @open_serial(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @open_serial_and_set_cflags(i8* %5, i32 %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @open_serial(i8* %0, i32 %1) {
%3 = tail call i32 @open_serial_and_set_cflags(i8* %0, i32 %1, i32 0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ SIGTERM;
int /*<<< orphan*/ atoi(char *);
int /*<<< orphan*/ kill(int /*<<< orphan*/, int /*<<< orphan*/);
int main(int argc, char **argv) {
  for (int i = 1; i < argc; i++)
    kill(atoi(argv[i]), SIGTERM);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1178 <main+0x58>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
mov    0x2e85(%rip),%rax
mov    (%rax),%esi
call   1030 <kill@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
cmp    $0x2,%edi
jl     115d <main+0x3d>
mov    %rsi,%r14
mov    %edi,%r15d
mov    $0x1,%ebx
mov    0x2ea9(%rip),%r12
nop
mov    (%r14,%rbx,8),%rdi
call   1040 <atoi@plt>
mov    (%r12),%esi
mov    %eax,%edi
call   1030 <kill@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1140 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@SIGTERM = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
br label %7
7: ; preds = %20, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %7
%12 = load i8**, i8*** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i32 @atoi(i8* %16)
%18 = load i32, i32* @SIGTERM
%19 = call i32 @kill(i32 %17, i32 %18)
br label %20
20: ; preds = %11
%21 = load i32, i32* %6
%22 = add nsw i32 %21, 1
store i32 %22, i32* %6
br label %7
23: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@SIGTERM = global i32 0
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %7
6: ; preds = %7, %2
ret i32 0
7: ; preds = %4, %7
%8 = phi i64 [ 1, %4 ], [ %14, %7 ]
%9 = getelementptr inbounds i8*, i8** %1, i64 %8
%10 = load i8*, i8** %9
%11 = tail call i32 @atoi(i8* %10)
%12 = load i32, i32* @SIGTERM
%13 = tail call i32 @kill(i32 %11, i32 %12)
%14 = add nuw nsw i64 %8, 1
%15 = icmp eq i64 %14, %5
br i1 %15, label %6, label %7
}
/* Variables and functions */
void stub1(short);
void testClosureSrV(void (*closure)(short), short a1) {
  if (closure != NULL)
    (*closure)(a1);
}


x86 assembly (clang, -O0):
<testClosureSrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1128 <testClosureSrV+0x28>
mov    -0x8(%rbp),%rax
movswl -0xa(%rbp),%edi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureSrV>:
test   %rdi,%rdi
je     110d <testClosureSrV+0xd>
mov    %rdi,%rax
movswl %si,%edi
jmp    *%rax
ret

LLVM IR (-O0):
define void @testClosureSrV(void (i16)* %0, i16 signext %1) {
%3 = alloca void (i16)*
%4 = alloca i16
store void (i16)* %0, void (i16)** %3
store i16 %1, i16* %4
%5 = load void (i16)*, void (i16)** %3
%6 = icmp ne void (i16)* %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load void (i16)*, void (i16)** %3
%9 = load i16, i16* %4
br label %10
10: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
define void @testClosureSrV(void (i16)* %0, i16 signext %1) {
%3 = icmp eq void (i16)* %0, null
br i1 %3, label %5, label %4
4: ; preds = %2
tail call void %0(i16 signext %1)
br label %5
5: ; preds = %4, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ err;

/* Variables and functions */
int send(int, int *, int, int /*<<< orphan*/);
int send_err(int fd, int err) {
  return send(fd, &err, sizeof(err), 0) == sizeof(err) ? 0 : -1;
}


x86 assembly (clang, -O0):
<send_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
xor    %ecx,%ecx
call   1030 <send@plt>
movslq %eax,%rdx
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    $0x4,%rdx
cmove  %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_err>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
xor    %ecx,%ecx
call   1030 <send@plt>
xor    %ecx,%ecx
cmp    $0x4,%eax
setne  %cl
neg    %ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @send_err(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @send(i32 %5, i32* %4, i32 4, i32 0)
%7 = sext i32 %6 to i64
%8 = icmp eq i64 %7, 4
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 0, i32 -1
ret i32 %10
}

LLVM IR (-O2):
define i32 @send_err(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @send(i32 %0, i32* %3, i32 4, i32 0)
%5 = icmp ne i32 %4, 4
%6 = sext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ xref(char *, int);
void decref(char *name) { xref(name, -1); }


x86 assembly (clang, -O0):
<decref>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xffffffff,%esi
call   1030 <xref@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decref>:
mov    $0xffffffff,%esi
jmp    1030 <xref@plt>

LLVM IR (-O0):
define void @decref(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @xref(i8* %3, i32 -1)
ret void
}

LLVM IR (-O2):
define void @decref(i8* %0) {
%2 = tail call i32 @xref(i8* %0, i32 -1)
ret void
}
double
f4_sum_pre_double_double_double_double_double_double_double_double_double(
    double v0, double v1, double v2, double v3, double v4, double v5, double v6,
    double v7, double v) {
  return v0 + v1 + v2 + v3 + v4 + v5 + v6 + v7 + ((double)(v));
}


x86 assembly (clang, -O0):
<f4_sum_pre_double_double_double_double_double_double_double_double_double>:
push   %rbp
mov    %rsp,%rbp
movsd  0x10(%rbp),%xmm8
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  %xmm4,-0x28(%rbp)
movsd  %xmm5,-0x30(%rbp)
movsd  %xmm6,-0x38(%rbp)
movsd  %xmm7,-0x40(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
addsd  -0x20(%rbp),%xmm0
addsd  -0x28(%rbp),%xmm0
addsd  -0x30(%rbp),%xmm0
addsd  -0x38(%rbp),%xmm0
addsd  -0x40(%rbp),%xmm0
addsd  0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4_sum_pre_double_double_double_double_double_double_double_double_double>:
addsd  %xmm1,%xmm0
addsd  %xmm2,%xmm0
addsd  %xmm3,%xmm0
addsd  %xmm4,%xmm0
addsd  %xmm5,%xmm0
addsd  %xmm6,%xmm0
addsd  %xmm7,%xmm0
addsd  0x8(%rsp),%xmm0
ret

LLVM IR (-O0):
define double @f4_sum_pre_double_double_double_double_double_double_double_double_double(double %0, double %1, double %2, double %3, double %4, double %5, double %6, double %7, double %8) {
%10 = alloca double
%11 = alloca double
%12 = alloca double
%13 = alloca double
%14 = alloca double
%15 = alloca double
%16 = alloca double
%17 = alloca double
%18 = alloca double
store double %0, double* %10
store double %1, double* %11
store double %2, double* %12
store double %3, double* %13
store double %4, double* %14
store double %5, double* %15
store double %6, double* %16
store double %7, double* %17
store double %8, double* %18
%19 = load double, double* %10
%20 = load double, double* %11
%21 = fadd double %19, %20
%22 = load double, double* %12
%23 = fadd double %21, %22
%24 = load double, double* %13
%25 = fadd double %23, %24
%26 = load double, double* %14
%27 = fadd double %25, %26
%28 = load double, double* %15
%29 = fadd double %27, %28
%30 = load double, double* %16
%31 = fadd double %29, %30
%32 = load double, double* %17
%33 = fadd double %31, %32
%34 = load double, double* %18
%35 = fadd double %33, %34
ret double %35
}

LLVM IR (-O2):
define double @f4_sum_pre_double_double_double_double_double_double_double_double_double(double %0, double %1, double %2, double %3, double %4, double %5, double %6, double %7, double %8) {
%10 = fadd double %0, %1
%11 = fadd double %10, %2
%12 = fadd double %11, %3
%13 = fadd double %12, %4
%14 = fadd double %13, %5
%15 = fadd double %14, %6
%16 = fadd double %15, %7
%17 = fadd double %16, %8
ret double %17
}
ldisplay(fmt, a1, a2, a3, a4, a5) char *fmt, *a1, *a2, *a3, *a4, *a5;
{ printf(fmt, a1, a2, a3, a4, a5); }


x86 assembly (clang, -O0):
<ldisplay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    %r9,-0x38(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    -0x30(%rbp),%r8
mov    -0x38(%rbp),%r9
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldisplay>:
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
define i32 @ldisplay(i8* %0, i8* %1, i8* %2, i8* %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i8*
%12 = alloca i8*
%13 = alloca i8*
store i8* %0, i8** %8
store i8* %1, i8** %9
store i8* %2, i8** %10
store i8* %3, i8** %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%14 = load i8*, i8** %8
%15 = load i8*, i8** %9
%16 = load i8*, i8** %10
%17 = load i8*, i8** %11
%18 = load i8*, i8** %12
%19 = load i8*, i8** %13
%20 = call i32 (i8*, ...) @printf(i8* %14, i8* %15, i8* %16, i8* %17, i8* %18, i8* %19)
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @ldisplay(i8* nocapture %0, i8* %1, i8* %2, i8* %3, i8* %4, i8* %5) {
%7 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) %0, i8* %1, i8* %2, i8* %3, i8* %4, i8* %5)
ret i32 undef
}
int xor (int register2, int register3) { return (register2 ^ register3); }


x86 assembly (clang, -O0):
<xor>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xor>:
mov    %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define i32 @xor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @xor(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
ret i32 %3
}
int ft_isspace(int c) {
  c = (unsigned char)c;
  if (c == '\t' || c == '\n' || c == '\v' || c == '\f' || c == '\r' || c == ' ')
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x9,-0x8(%rbp)
je     114c <ft_isspace+0x4c>
cmpl   $0xa,-0x8(%rbp)
je     114c <ft_isspace+0x4c>
cmpl   $0xb,-0x8(%rbp)
je     114c <ft_isspace+0x4c>
cmpl   $0xc,-0x8(%rbp)
je     114c <ft_isspace+0x4c>
cmpl   $0xd,-0x8(%rbp)
je     114c <ft_isspace+0x4c>
cmpl   $0x20,-0x8(%rbp)
jne    1158 <ft_isspace+0x58>
movl   $0x1,-0x4(%rbp)
jmp    115f <ft_isspace+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isspace>:
mov    $0x1,%eax
lea    -0x9(%rdi),%ecx
cmp    $0x5,%cl
jae    110e <ft_isspace+0xe>
ret
cmp    $0x20,%dil
je     110d <ft_isspace+0xd>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ft_isspace(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = trunc i32 %4 to i8
%6 = zext i8 %5 to i32
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 9
br i1 %8, label %24, label %9
9: ; preds = %1
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 10
br i1 %11, label %24, label %12
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp eq i32 %13, 11
br i1 %14, label %24, label %15
15: ; preds = %12
%16 = load i32, i32* %3
%17 = icmp eq i32 %16, 12
br i1 %17, label %24, label %18
18: ; preds = %15
%19 = load i32, i32* %3
%20 = icmp eq i32 %19, 13
br i1 %20, label %24, label %21
21: ; preds = %18
%22 = load i32, i32* %3
%23 = icmp eq i32 %22, 32
br i1 %23, label %24, label %25
24: ; preds = %21, %18, %15, %12, %9, %1
store i32 1, i32* %2
br label %26
25: ; preds = %21
store i32 0, i32* %2
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @ft_isspace(i32 %0) {
%2 = trunc i32 %0 to i8
switch i8 %2, label %3 [
i8 32, label %4
i8 13, label %4
i8 12, label %4
i8 11, label %4
i8 10, label %4
i8 9, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %1, %1, %1, %3
%5 = phi i32 [ 0, %3 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %5
}
void setgrent(void) { ; }


x86 assembly (clang, -O0):
<setgrent>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setgrent>:
ret

LLVM IR (-O0):
define void @setgrent() {
ret void
}

LLVM IR (-O2):
define void @setgrent() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;

/* Variables and functions */
int sc_lock_generic(char const *, int /*<<< orphan*/);
int sc_lock_snap_user(const char *snap_name, uid_t uid) {
  return sc_lock_generic(snap_name, uid);
}


x86 assembly (clang, -O0):
<sc_lock_snap_user>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <sc_lock_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sc_lock_snap_user>:
jmp    1030 <sc_lock_generic@plt>

LLVM IR (-O0):
define i32 @sc_lock_snap_user(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @sc_lock_generic(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @sc_lock_snap_user(i8* %0, i32 %1) {
%3 = tail call i32 @sc_lock_generic(i8* %0, i32 %1)
ret i32 %3
}
int fun1034() { return 1034; }


x86 assembly (clang, -O0):
<fun1034>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1034>:
mov    $0x40a,%eax
ret

LLVM IR (-O0):
define i32 @fun1034() {
ret i32 1034
}

LLVM IR (-O2):
define i32 @fun1034() {
ret i32 1034
}
/* Variables and functions */
int /*<<< orphan*/ h2o__fatal(char *);
void *realloc(void *, size_t);
void *h2o_mem_realloc(void *oldp, size_t sz) {
  void *newp = realloc(oldp, sz);
  if (newp == NULL) {
    h2o__fatal("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/nkmideb/h2o-server/refs/"
               "heads/master/include/h2o/memory.h"
               ":"
               "318"
               ":"
               "no memory");
    return oldp;
  }
  return newp;
}


x86 assembly (clang, -O0):
<h2o_mem_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1165 <h2o_mem_realloc+0x45>
lea    0xead(%rip),%rdi
call   1030 <h2o__fatal@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    116d <h2o_mem_realloc+0x4d>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h2o_mem_realloc>:
push   %rbx
mov    %rdi,%rbx
call   1040 <realloc@plt>
test   %rax,%rax
je     1130 <h2o_mem_realloc+0x10>
pop    %rbx
ret
lea    0xec9(%rip),%rdi
call   1030 <h2o__fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/nkmideb/h2o-server/refs/heads/master/include/h2o/memory.h:318:no memory\00"
define i8* @h2o_mem_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = call i8* @realloc(i8* %7, i64 %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = call i32 @h2o__fatal(i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0))
%14 = load i8*, i8** %4
store i8* %14, i8** %3
br label %17
15: ; preds = %2
%16 = load i8*, i8** %6
store i8* %16, i8** %3
br label %17
17: ; preds = %15, %12
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/nkmideb/h2o-server/refs/heads/master/include/h2o/memory.h:318:no memory\00"
define i8* @h2o_mem_realloc(i8* %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @h2o__fatal(i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %2, %5
%8 = phi i8* [ %0, %5 ], [ %3, %2 ]
ret i8* %8
}