xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ mikenet_matrix_vec_mult_t_p(float *, int, float *, int,
                                               float **);
void mikenet_matrix_vec_mult_t(float *outvec, int nout, float *invec, int nin,
                               float **mat) {
  mikenet_matrix_vec_mult_t_p(outvec, nout, invec, nin, mat);
}


x86 assembly (clang, -O0):
<mikenet_matrix_vec_mult_t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x28(%rbp),%r8
call   1030 <mikenet_matrix_vec_mult_t_p@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mikenet_matrix_vec_mult_t>:
jmp    1030 <mikenet_matrix_vec_mult_t_p@plt>

LLVM IR (-O0):
define void @mikenet_matrix_vec_mult_t(float* %0, i32 %1, float* %2, i32 %3, float** %4) {
%6 = alloca float*
%7 = alloca i32
%8 = alloca float*
%9 = alloca i32
%10 = alloca float**
store float* %0, float** %6
store i32 %1, i32* %7
store float* %2, float** %8
store i32 %3, i32* %9
store float** %4, float*** %10
%11 = load float*, float** %6
%12 = load i32, i32* %7
%13 = load float*, float** %8
%14 = load i32, i32* %9
%15 = load float**, float*** %10
%16 = call i32 @mikenet_matrix_vec_mult_t_p(float* %11, i32 %12, float* %13, i32 %14, float** %15)
ret void
}

LLVM IR (-O2):
define void @mikenet_matrix_vec_mult_t(float* %0, i32 %1, float* %2, i32 %3, float** %4) {
%6 = tail call i32 @mikenet_matrix_vec_mult_t_p(float* %0, i32 %1, float* %2, i32 %3, float** %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x61() {
  Assert_real((isascii(97)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              490, ("isascii should be 1 for a"));
}


x86 assembly (clang, -O0):
<t_isascii_0x61>:
push   %rbp
mov    %rsp,%rbp
mov    $0x61,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x1ea,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x61>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x1ea,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for a\00"
define void @t_isascii_0x61() {
%1 = call i32 @isascii(i32 97)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 490, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for a\00"
define void @t_isascii_0x61() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 490, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int serial_get_status() { return 1; }


x86 assembly (clang, -O0):
<serial_get_status>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<serial_get_status>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @serial_get_status() {
ret i32 1
}

LLVM IR (-O2):
define i32 @serial_get_status() {
ret i32 1
}
char func(int a) { return 10; }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xa,%al
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
mov    $0xa,%al
ret

LLVM IR (-O0):
define signext i8 @func(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8 10
}

LLVM IR (-O2):
define signext i8 @func(i32 %0) {
ret i8 10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int /*<<< orphan*/ socket;
void print_socket(void) {
  printf("fake libpython socket: %p\n", socket);
  return;
}


x86 assembly (clang, -O0):
<print_socket>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_socket>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [27 x i8] c"fake libpython socket: %p\0A\00"
@socket = global i32 0
define void @print_socket() {
%1 = load i32, i32* @socket
%2 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [27 x i8] c"fake libpython socket: %p\0A\00"
@socket = global i32 0
define void @print_socket() {
%1 = load i32, i32* @socket
%2 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
void ConsoleEnableInterrupt() {}


x86 assembly (clang, -O0):
<ConsoleEnableInterrupt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ConsoleEnableInterrupt>:
ret

LLVM IR (-O0):
define void @ConsoleEnableInterrupt() {
ret void
}

LLVM IR (-O2):
define void @ConsoleEnableInterrupt() {
ret void
}
__attribute__((fastcall)) int FASTCALLfunc(int a, int b) { return a + b; }


x86 assembly (clang, -O0):
<FASTCALLfunc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FASTCALLfunc>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @FASTCALLfunc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @FASTCALLfunc(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ do_csi(char *, int);
void decsle(int mode) { do_csi("%d'{", mode); }


x86 assembly (clang, -O0):
<decsle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <do_csi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decsle>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <do_csi@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%d'{\00"
define void @decsle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @do_csi(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%d'{\00"
define void @decsle(i32 %0) {
%2 = tail call i32 @do_csi(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
int /*<<< orphan*/ system(char *);
void secret_backdoor() {
  char cmd[128];
  fgets(cmd, 128, stdin);
  system(cmd);
  return;
}


x86 assembly (clang, -O0):
<secret_backdoor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
lea    -0x80(%rbp),%rdi
mov    0x2eb2(%rip),%rax
mov    (%rax),%edx
mov    $0x80,%esi
call   1040 <fgets@plt>
lea    -0x80(%rbp),%rdi
call   1030 <system@plt>
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<secret_backdoor>:
push   %rbx
sub    $0x80,%rsp
mov    0x2eb9(%rip),%rax
mov    (%rax),%edx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x80,%esi
call   1040 <fgets@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
add    $0x80,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@stdin = global i32 0
define void @secret_backdoor() {
%1 = alloca [128 x i8]
%2 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%3 = load i32, i32* @stdin
%4 = call i32 @fgets(i8* %2, i32 128, i32 %3)
%5 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%6 = call i32 @system(i8* %5)
ret void
}

LLVM IR (-O2):
@stdin = global i32 0
define void @secret_backdoor() {
%1 = alloca [128 x i8]
%2 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%3 = load i32, i32* @stdin
%4 = call i32 @fgets(i8* %2, i32 128, i32 %3)
%5 = call i32 @system(i8* %2)
ret void
}
/* Type definitions */
struct irq_timer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ irq_timer_writel(struct irq_timer *, int,
                                    int /*<<< orphan*/);
void irq_timer_reset(struct irq_timer *itmr) { irq_timer_writel(itmr, 0x1, 0); }


x86 assembly (clang, -O0):
<irq_timer_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <irq_timer_writel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irq_timer_reset>:
mov    $0x1,%esi
xor    %edx,%edx
jmp    1030 <irq_timer_writel@plt>

LLVM IR (-O0):
%struct.irq_timer = type { i32 }
define void @irq_timer_reset(%struct.irq_timer* %0) {
%2 = alloca %struct.irq_timer*
store %struct.irq_timer* %0, %struct.irq_timer** %2
%3 = load %struct.irq_timer*, %struct.irq_timer** %2
%4 = call i32 @irq_timer_writel(%struct.irq_timer* %3, i32 1, i32 0)
ret void
}

LLVM IR (-O2):
%struct.irq_timer = type { i32 }
define void @irq_timer_reset(%struct.irq_timer* %0) {
%2 = tail call i32 @irq_timer_writel(%struct.irq_timer* %0, i32 1, i32 0)
ret void
}
int refresh_qlut_kcal_display(void) { return 0; }


x86 assembly (clang, -O0):
<refresh_qlut_kcal_display>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<refresh_qlut_kcal_display>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @refresh_qlut_kcal_display() {
ret i32 0
}

LLVM IR (-O2):
define i32 @refresh_qlut_kcal_display() {
ret i32 0
}
unsigned char f96(unsigned char x, long int y) {
  return (x << (8 * sizeof(unsigned char) - y)) + (x >> y);
}


x86 assembly (clang, -O0):
<f96>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0x8,%ecx
sub    -0x10(%rbp),%rcx
shl    %cl,%eax
movzbl -0x1(%rbp),%edx
mov    -0x10(%rbp),%rcx
sar    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f96>:
mov    $0x8,%cl
sub    %sil,%cl
mov    %edi,%eax
shl    %cl,%eax
mov    %esi,%ecx
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @f96(i8 zeroext %0, i64 %1) {
%3 = alloca i8
%4 = alloca i64
store i8 %0, i8* %3
store i64 %1, i64* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i64, i64* %4
%8 = sub i64 8, %7
%9 = trunc i64 %8 to i32
%10 = shl i32 %6, %9
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = load i64, i64* %4
%14 = trunc i64 %13 to i32
%15 = ashr i32 %12, %14
%16 = add nsw i32 %10, %15
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define zeroext i8 @f96(i8 zeroext %0, i64 %1) {
%3 = zext i8 %0 to i32
%4 = trunc i64 %1 to i32
%5 = sub i32 8, %4
%6 = shl i32 %3, %5
%7 = lshr i32 %3, %4
%8 = add nsw i32 %6, %7
%9 = trunc i32 %8 to i8
ret i8 %9
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void mp2vx_set_id(uint8_t *p_mp2vx, uint8_t id) {
  p_mp2vx[4] &= 0xf;
  p_mp2vx[4] |= id << 4;
}


x86 assembly (clang, -O0):
<mp2vx_set_id>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%ecx
and    $0xf,%ecx
mov    %ecx,0x10(%rax)
mov    -0xc(%rbp),%ecx
shl    $0x4,%ecx
mov    -0x8(%rbp),%rax
or     0x10(%rax),%ecx
mov    %ecx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp2vx_set_id>:
mov    0x10(%rdi),%eax
and    $0xf,%eax
shl    $0x4,%esi
or     %eax,%esi
mov    %esi,0x10(%rdi)
ret

LLVM IR (-O0):
define void @mp2vx_set_id(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = getelementptr inbounds i32, i32* %5, i64 4
%7 = load i32, i32* %6
%8 = and i32 %7, 15
store i32 %8, i32* %6
%9 = load i32, i32* %4
%10 = shl i32 %9, 4
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i64 4
%13 = load i32, i32* %12
%14 = or i32 %13, %10
store i32 %14, i32* %12
ret void
}

LLVM IR (-O2):
define void @mp2vx_set_id(i32* nocapture %0, i32 %1) {
%3 = getelementptr inbounds i32, i32* %0, i64 4
%4 = load i32, i32* %3
%5 = and i32 %4, 15
%6 = shl i32 %1, 4
%7 = or i32 %5, %6
store i32 %7, i32* %3
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int syscon_add_quaddobl_term(int i, int n, int *exp, double *c) {
  int a[2], fail;
  a[0] = n;
  a[1] = i;
  fail = _ada_use_c2phc(386, a, exp, c);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_add_quaddobl_term>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
lea    -0x20(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x182,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_add_quaddobl_term>:
push   %rax
mov    %esi,(%rsp)
mov    %edi,0x4(%rsp)
mov    %rsp,%rsi
mov    $0x182,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @syscon_add_quaddobl_term(i32 %0, i32 %1, i32* %2, double* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca double*
%9 = alloca [2 x i32]
%10 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store double* %3, double** %8
%11 = load i32, i32* %6
%12 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
store i32 %11, i32* %12
%13 = load i32, i32* %5
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 1
store i32 %13, i32* %14
%15 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
%16 = load i32*, i32** %7
%17 = load double*, double** %8
%18 = call i32 @_ada_use_c2phc(i32 386, i32* %15, i32* %16, double* %17)
store i32 %18, i32* %10
%19 = load i32, i32* %10
ret i32 %19
}

LLVM IR (-O2):
define i32 @syscon_add_quaddobl_term(i32 %0, i32 %1, i32* %2, double* %3) {
%5 = alloca [2 x i32]
%6 = bitcast [2 x i32]* %5 to i8*
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 0
store i32 %1, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %5, i64 0, i64 1
store i32 %0, i32* %8
%9 = call i32 @_ada_use_c2phc(i32 386, i32* %7, i32* %2, double* %3)
ret i32 %9
}
void RTTcpGetLocalAddress(void) {}


x86 assembly (clang, -O0):
<RTTcpGetLocalAddress>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTTcpGetLocalAddress>:
ret

LLVM IR (-O0):
define void @RTTcpGetLocalAddress() {
ret void
}

LLVM IR (-O2):
define void @RTTcpGetLocalAddress() {
ret void
}
int getAbsoluteCoordinate(int value, int console, int track) {
  int offset = 0;
  if (1) {
    offset = (console - track) / 2;
    if (offset < 0)
      offset = 0;
  }
  return value + 1 + offset;
}


x86 assembly (clang, -O0):
<getAbsoluteCoordinate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    1136 <getAbsoluteCoordinate+0x36>
movl   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
add    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getAbsoluteCoordinate>:
sub    %edx,%esi
mov    %esi,%eax
shr    $0x1f,%eax
add    %esi,%eax
xor    %ecx,%ecx
sar    %eax
cmovs  %ecx,%eax
add    %edi,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @getAbsoluteCoordinate(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = sub nsw i32 %8, %9
%11 = sdiv i32 %10, 2
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %3
store i32 0, i32* %7
br label %15
15: ; preds = %14, %3
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
%18 = load i32, i32* %7
%19 = add nsw i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @getAbsoluteCoordinate(i32 %0, i32 %1, i32 %2) {
%4 = sub nsw i32 %1, %2
%5 = sdiv i32 %4, 2
%6 = icmp sgt i32 %5, 0
%7 = select i1 %6, i32 %5, i32 0
%8 = add nsw i32 %0, 1
%9 = add nsw i32 %8, %7
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ assert(void *);
unsigned long xt_core_uuid_mod(void *uuid_object, unsigned long divisor) {
  assert(uuid_object);
  unsigned char *uuid = uuid_object;
  unsigned long dividend;
  unsigned long remainder;
  dividend = *((unsigned long *)(uuid + 12));
  remainder = dividend % divisor;
  return remainder;
}


x86 assembly (clang, -O0):
<xt_core_uuid_mod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    0xc(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    %rdx,-0x28(%rbp)
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xt_core_uuid_mod>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    0xc(%rbx),%rax
mov    %rax,%rcx
or     %r14,%rcx
shr    $0x20,%rcx
je     1139 <xt_core_uuid_mod+0x29>
xor    %edx,%edx
div    %r14
mov    %rdx,%rax
jmp    1140 <xt_core_uuid_mod+0x30>
xor    %edx,%edx
div    %r14d
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @xt_core_uuid_mod(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%8 = load i8*, i8** %3
%9 = call i32 @assert(i8* %8)
%10 = load i8*, i8** %3
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i64 12
%13 = bitcast i8* %12 to i64*
%14 = load i64, i64* %13
store i64 %14, i64* %6
%15 = load i64, i64* %6
%16 = load i64, i64* %4
%17 = urem i64 %15, %16
store i64 %17, i64* %7
%18 = load i64, i64* %7
ret i64 %18
}

LLVM IR (-O2):
define i64 @xt_core_uuid_mod(i8* %0, i64 %1) {
%3 = tail call i32 @assert(i8* %0)
%4 = getelementptr inbounds i8, i8* %0, i64 12
%5 = bitcast i8* %4 to i64*
%6 = load i64, i64* %5
%7 = urem i64 %6, %1
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_ext_device_manager_delete() {
  printf("NOT IMPLEMENTED:"
         "pa_ext_device_manager_delete"
         "\n");
}


x86 assembly (clang, -O0):
<pa_ext_device_manager_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_ext_device_manager_delete>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"NOT IMPLEMENTED:pa_ext_device_manager_delete\0A\00"
define i32 @pa_ext_device_manager_delete() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [45 x i8] c"NOT IMPLEMENTED:pa_ext_device_manager_delete\00"
define i32 @pa_ext_device_manager_delete() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int dd_lt_dd_d(const double *a, double b) {
  return (a[0] < b || (a[0] == b && a[1] < 0.0)) ? 1 : 0;
}


x86 assembly (clang, -O0):
<dd_lt_dd_d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
movsd  -0x10(%rbp),%xmm0
mov    $0x1,%al
ucomisd %xmm1,%xmm0
mov    %al,-0x11(%rbp)
ja     115f <dd_lt_dd_d+0x5f>
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
xor    %eax,%eax
ucomisd -0x10(%rbp),%xmm0
mov    %al,-0x12(%rbp)
jne    1159 <dd_lt_dd_d+0x59>
jp     1159 <dd_lt_dd_d+0x59>
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
ucomisd 0x8(%rax),%xmm0
seta   %al
mov    %al,-0x12(%rbp)
mov    -0x12(%rbp),%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dd_lt_dd_d>:
movsd  (%rdi),%xmm1
mov    $0x1,%eax
ucomisd %xmm1,%xmm0
ja     1125 <dd_lt_dd_d+0x25>
ucomisd %xmm0,%xmm1
jne    1126 <dd_lt_dd_d+0x26>
jp     1126 <dd_lt_dd_d+0x26>
xorpd  %xmm0,%xmm0
xor    %eax,%eax
ucomisd 0x8(%rdi),%xmm0
seta   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dd_lt_dd_d(double* %0, double %1) {
%3 = alloca double*
%4 = alloca double
store double* %0, double** %3
store double %1, double* %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double, double* %4
%9 = fcmp olt double %7, %8
br i1 %9, label %23, label %10
10: ; preds = %2
%11 = load double*, double** %3
%12 = getelementptr inbounds double, double* %11, i64 0
%13 = load double, double* %12
%14 = load double, double* %4
%15 = fcmp oeq double %13, %14
br i1 %15, label %16, label %21
16: ; preds = %10
%17 = load double*, double** %3
%18 = getelementptr inbounds double, double* %17, i64 1
%19 = load double, double* %18
%20 = fcmp olt double %19, 0.000000e+00
br label %21
21: ; preds = %16, %10
%22 = phi i1 [ false, %10 ], [ %20, %16 ]
br label %23
23: ; preds = %21, %2
%24 = phi i1 [ true, %2 ], [ %22, %21 ]
%25 = zext i1 %24 to i64
%26 = select i1 %24, i32 1, i32 0
ret i32 %26
}

LLVM IR (-O2):
define i32 @dd_lt_dd_d(double* nocapture %0, double %1) {
%3 = load double, double* %0
%4 = fcmp olt double %3, %1
br i1 %4, label %12, label %5
5: ; preds = %2
%6 = fcmp oeq double %3, %1
br i1 %6, label %7, label %12
7: ; preds = %5
%8 = getelementptr inbounds double, double* %0, i64 1
%9 = load double, double* %8
%10 = fcmp olt double %9, 0.000000e+00
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %5, %7, %2
%13 = phi i32 [ 1, %2 ], [ 0, %5 ], [ %11, %7 ]
ret i32 %13
}
extern int _isatty(int file) {
  (void)file;
  return 1;
}


x86 assembly (clang, -O0):
<_isatty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_isatty>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_isatty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @_isatty(i32 %0) {
ret i32 1
}
/* Variables and functions */
long __millis();
long millis() { return __millis(); }


x86 assembly (clang, -O0):
<millis>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__millis@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<millis>:
xor    %eax,%eax
jmp    1030 <__millis@plt>

LLVM IR (-O0):
define i64 @millis() {
%1 = call i64 (...) @__millis()
ret i64 %1
}

LLVM IR (-O2):
define i64 @millis() {
%1 = tail call i64 (...) @__millis()
ret i64 %1
}
int test_imm_6Bint8_mem(signed char *val) {
  return ((*val) & (-0x6B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Bint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffff95,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Bint8_mem>:
testb  $0x95,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Bint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -107
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_6Bint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -107
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct crypt_cipher {
  int dummy;
};

/* Variables and functions */
int EINVAL;
int crypt_cipher_encrypt(struct crypt_cipher *ctx, const char *in, char *out,
                         size_t length, const char *iv, size_t iv_length) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<crypt_cipher_encrypt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
xor    %eax,%eax
mov    0x2ebb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypt_cipher_encrypt>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.crypt_cipher = type { i32 }
@EINVAL = global i32 0
define i32 @crypt_cipher_encrypt(%struct.crypt_cipher* %0, i8* %1, i8* %2, i64 %3, i8* %4, i64 %5) {
%7 = alloca %struct.crypt_cipher*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i64
%11 = alloca i8*
%12 = alloca i64
store %struct.crypt_cipher* %0, %struct.crypt_cipher** %7
store i8* %1, i8** %8
store i8* %2, i8** %9
store i64 %3, i64* %10
store i8* %4, i8** %11
store i64 %5, i64* %12
%13 = load i32, i32* @EINVAL
%14 = sub nsw i32 0, %13
ret i32 %14
}

LLVM IR (-O2):
%struct.crypt_cipher = type { i32 }
@EINVAL = global i32 0
define i32 @crypt_cipher_encrypt(%struct.crypt_cipher* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i64 %3, i8* nocapture readnone %4, i64 %5) {
%7 = load i32, i32* @EINVAL
%8 = sub nsw i32 0, %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void set_us_g0_charset() { fputs("\033(B\1#0", stdout); }


x86 assembly (clang, -O0):
<set_us_g0_charset>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_us_g0_charset>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"\1B(B\01\00"
@stdout = global i32 0
define void @set_us_g0_charset() {
%1 = load i32, i32* @stdout
%2 = call i32 @fputs(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"\1B(B\01\00"
@stdout = global i32 0
define void @set_us_g0_charset() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef scalar_t__ time_t;
typedef int /*<<< orphan*/ out_msg;

/* Variables and functions */
int /*<<< orphan*/ _xmit(char *);
int /*<<< orphan*/ snprintf(char *, int, char *, int, long);
scalar_t__ time(int /*<<< orphan*/ *);
void _suspend_job(long my_job_id) {
  time_t now = time(NULL);
  char out_msg[128];
  snprintf(out_msg, sizeof(out_msg),
           "TS=%u AUTH=root DT=CMD=SUSPENDJOB ARG=%ld", (uint32_t)now,
           my_job_id);
  _xmit(out_msg);
}


x86 assembly (clang, -O0):
<_suspend_job>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1050 <time@plt>
mov    %rax,-0x10(%rbp)
lea    -0x90(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    -0x8(%rbp),%r8
mov    $0x80,%esi
lea    0xe97(%rip),%rdx
call   1030 <snprintf@plt>
lea    -0x90(%rbp),%rdi
call   1040 <_xmit@plt>
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_suspend_job>:
push   %r14
push   %rbx
sub    $0x88,%rsp
mov    %rdi,%rbx
xor    %edi,%edi
call   1050 <time@plt>
lea    0xeb5(%rip),%rdx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x80,%esi
mov    %eax,%ecx
mov    %rbx,%r8
call   1030 <snprintf@plt>
mov    %r14,%rdi
call   1040 <_xmit@plt>
add    $0x88,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [42 x i8] c"TS=%u AUTH=root DT=CMD=SUSPENDJOB ARG=%ld\00"
define void @_suspend_job(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca [128 x i8]
store i64 %0, i64* %2
%5 = call i64 @time(i32* null)
store i64 %5, i64* %3
%6 = getelementptr inbounds [128 x i8], [128 x i8]* %4, i64 0, i64 0
%7 = load i64, i64* %3
%8 = trunc i64 %7 to i32
%9 = load i64, i64* %2
%10 = call i32 @snprintf(i8* %6, i32 128, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %8, i64 %9)
%11 = getelementptr inbounds [128 x i8], [128 x i8]* %4, i64 0, i64 0
%12 = call i32 @_xmit(i8* %11)
ret void
}

LLVM IR (-O2):
@.str = [42 x i8] c"TS=%u AUTH=root DT=CMD=SUSPENDJOB ARG=%ld\00"
define void @_suspend_job(i64 %0) {
%2 = alloca [128 x i8]
%3 = tail call i64 @time(i32* null)
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%5 = trunc i64 %3 to i32
%6 = call i32 @snprintf(i8* %4, i32 128, i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0), i32 %5, i64 %0)
%7 = call i32 @_xmit(i8* %4)
ret void
}
/* Variables and functions */
size_t key_hash_bad_T(const void *key) {
  (void)key;
  return 0;
}


x86 assembly (clang, -O0):
<key_hash_bad_T>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<key_hash_bad_T>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @key_hash_bad_T(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i64 0
}

LLVM IR (-O2):
define i64 @key_hash_bad_T(i8* nocapture readnone %0) {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ pmu_reg_write(int, int);
void pmu_reset_solar_short() {
  pmu_reg_write(0x0E, ((0 << 12) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8) |
                       (3 << 4) | (0)));
  pmu_reg_write(0x0E, ((0 << 12) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8) |
                       (3 << 4) | (0)));
}


x86 assembly (clang, -O0):
<pmu_reset_solar_short>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe,%edi
mov    $0xe30,%esi
call   1030 <pmu_reg_write@plt>
mov    $0xe,%edi
mov    $0xe30,%esi
call   1030 <pmu_reg_write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_reset_solar_short>:
push   %rax
mov    $0xe,%edi
mov    $0xe30,%esi
call   1030 <pmu_reg_write@plt>
mov    $0xe,%edi
mov    $0xe30,%esi
pop    %rax
jmp    1030 <pmu_reg_write@plt>

LLVM IR (-O0):
define void @pmu_reset_solar_short() {
%1 = call i32 @pmu_reg_write(i32 14, i32 3632)
%2 = call i32 @pmu_reg_write(i32 14, i32 3632)
ret void
}

LLVM IR (-O2):
define void @pmu_reset_solar_short() {
%1 = tail call i32 @pmu_reg_write(i32 14, i32 3632)
%2 = tail call i32 @pmu_reg_write(i32 14, i32 3632)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GL_LINES;
int /*<<< orphan*/ glBegin(int /*<<< orphan*/);
int /*<<< orphan*/ glColor4fv(float const *);
int /*<<< orphan*/ glEnd();
int /*<<< orphan*/ glVertex2f(float, float);
void draw_line(float x1, float y1, float x2, float y2, const float color[4]) {
  glColor4fv(color);
  glBegin(GL_LINES);
  glVertex2f(x1, y1);
  glVertex2f(x2, y2);
  glEnd();
}


x86 assembly (clang, -O0):
<draw_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <glColor4fv@plt>
mov    0x2e80(%rip),%rax
mov    (%rax),%edi
call   1060 <glBegin@plt>
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1050 <glVertex2f@plt>
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
call   1050 <glVertex2f@plt>
mov    $0x0,%al
call   1040 <glEnd@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw_line>:
sub    $0x18,%rsp
movss  %xmm3,0x14(%rsp)
movss  %xmm2,0x10(%rsp)
movss  %xmm1,0xc(%rsp)
movss  %xmm0,0x8(%rsp)
call   1030 <glColor4fv@plt>
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
call   1060 <glBegin@plt>
movss  0x8(%rsp),%xmm0
movss  0xc(%rsp),%xmm1
call   1050 <glVertex2f@plt>
movss  0x10(%rsp),%xmm0
movss  0x14(%rsp),%xmm1
call   1050 <glVertex2f@plt>
xor    %eax,%eax
add    $0x18,%rsp
jmp    1040 <glEnd@plt>

LLVM IR (-O0):
@GL_LINES = global i32 0
define void @draw_line(float %0, float %1, float %2, float %3, float* %4) {
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float*
store float %0, float* %6
store float %1, float* %7
store float %2, float* %8
store float %3, float* %9
store float* %4, float** %10
%11 = load float*, float** %10
%12 = call i32 @glColor4fv(float* %11)
%13 = load i32, i32* @GL_LINES
%14 = call i32 @glBegin(i32 %13)
%15 = load float, float* %6
%16 = load float, float* %7
%17 = call i32 @glVertex2f(float %15, float %16)
%18 = load float, float* %8
%19 = load float, float* %9
%20 = call i32 @glVertex2f(float %18, float %19)
%21 = call i32 (...) @glEnd()
ret void
}

LLVM IR (-O2):
@GL_LINES = global i32 0
define void @draw_line(float %0, float %1, float %2, float %3, float* %4) {
%6 = tail call i32 @glColor4fv(float* %4)
%7 = load i32, i32* @GL_LINES
%8 = tail call i32 @glBegin(i32 %7)
%9 = tail call i32 @glVertex2f(float %0, float %1)
%10 = tail call i32 @glVertex2f(float %2, float %3)
%11 = tail call i32 (...) @glEnd()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ tap_run(char *);
int main(int argc, char **argv) {
  if (argc < 2) {
    printf("Missing an argument\n");
    return (-1);
  }
  tap_run(argv[1]);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1158 <main+0x38>
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    116c <main+0x4c>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1040 <tap_run@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
jg     1139 <main+0x19>
lea    0xed3(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret
mov    0x8(%rsi),%rdi
call   1040 <tap_run@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"Missing an argument\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %3
br label %15
10: ; preds = %2
%11 = load i8**, i8*** %5
%12 = getelementptr inbounds i8*, i8** %11, i64 1
%13 = load i8*, i8** %12
%14 = call i32 @tap_run(i8* %13)
store i32 0, i32* %3
br label %15
15: ; preds = %10, %8
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@str = [20 x i8] c"Missing an argument\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp slt i32 %0, 2
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
br label %10
6: ; preds = %2
%7 = getelementptr inbounds i8*, i8** %1, i64 1
%8 = load i8*, i8** %7
%9 = tail call i32 @tap_run(i8* %8)
br label %10
10: ; preds = %6, %4
%11 = phi i32 [ -1, %4 ], [ 0, %6 ]
ret i32 %11
}
int dequeue(int *a, int *rear, int *front) {
  int i;
  if (*front == *rear) {
    i = *(a + (*front));
    *front = *rear = -1;
  } else {
    i = *(a + (*front));
    (*front)++;
  }
  return i;
}


x86 assembly (clang, -O0):
<dequeue>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
jne    114c <dequeue+0x4c>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movslq (%rcx),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
movl   $0xffffffff,(%rax)
mov    -0x18(%rbp),%rax
movl   $0xffffffff,(%rax)
jmp    1168 <dequeue+0x68>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movslq (%rcx),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dequeue>:
movslq (%rdx),%rcx
mov    (%rdi,%rcx,4),%eax
cmp    (%rsi),%ecx
jne    1118 <dequeue+0x18>
movl   $0xffffffff,(%rsi)
mov    $0xffffffff,%ecx
mov    %ecx,(%rdx)
ret
add    $0x1,%ecx
mov    %ecx,(%rdx)
ret

LLVM IR (-O0):
define i32 @dequeue(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%8 = load i32*, i32** %6
%9 = load i32, i32* %8
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
%12 = icmp eq i32 %9, %11
br i1 %12, label %13, label %22
13: ; preds = %3
%14 = load i32*, i32** %4
%15 = load i32*, i32** %6
%16 = load i32, i32* %15
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %14, i64 %17
%19 = load i32, i32* %18
store i32 %19, i32* %7
%20 = load i32*, i32** %5
store i32 -1, i32* %20
%21 = load i32*, i32** %6
store i32 -1, i32* %21
br label %32
22: ; preds = %3
%23 = load i32*, i32** %4
%24 = load i32*, i32** %6
%25 = load i32, i32* %24
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds i32, i32* %23, i64 %26
%28 = load i32, i32* %27
store i32 %28, i32* %7
%29 = load i32*, i32** %6
%30 = load i32, i32* %29
%31 = add nsw i32 %30, 1
store i32 %31, i32* %29
br label %32
32: ; preds = %22, %13
%33 = load i32, i32* %7
ret i32 %33
}

LLVM IR (-O2):
define i32 @dequeue(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %2
%5 = load i32, i32* %1
%6 = icmp eq i32 %4, %5
%7 = sext i32 %4 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
br i1 %6, label %10, label %11
10: ; preds = %3
store i32 -1, i32* %1
br label %13
11: ; preds = %3
%12 = add nsw i32 %4, 1
br label %13
13: ; preds = %11, %10
%14 = phi i32 [ %12, %11 ], [ -1, %10 ]
store i32 %14, i32* %2
ret i32 %9
}
void simd_fp_handler(struct exception_info *info) {
  asm volatile("" : : :);
  asm volatile("hlt");
}


x86 assembly (clang, -O0):
<simd_fp_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<simd_fp_handler>:
hlt
ret

LLVM IR (-O0):
%struct.exception_info = type opaque
define void @simd_fp_handler(%struct.exception_info* %0) {
%2 = alloca %struct.exception_info*
store %struct.exception_info* %0, %struct.exception_info** %2
ret void
}

LLVM IR (-O2):
%struct.exception_info = type opaque
define void @simd_fp_handler(%struct.exception_info* nocapture readnone %0) {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void v3add(const float *src1, const float *src2, float *dst) {
  dst[0] = src1[0] + src2[0];
  dst[1] = src1[1] + src2[1];
  dst[2] = src1[2] + src2[2];
}


x86 assembly (clang, -O0):
<v3add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
addss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x10(%rbp),%rax
addss  0x4(%rax),%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
addss  0x8(%rax),%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<v3add>:
movss  (%rdi),%xmm0
addss  (%rsi),%xmm0
movss  %xmm0,(%rdx)
movss  0x4(%rdi),%xmm0
addss  0x4(%rsi),%xmm0
movss  %xmm0,0x4(%rdx)
movss  0x8(%rdi),%xmm0
addss  0x8(%rsi),%xmm0
movss  %xmm0,0x8(%rdx)
ret

LLVM IR (-O0):
define void @v3add(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %4
%8 = getelementptr inbounds float, float* %7, i64 0
%9 = load float, float* %8
%10 = load float*, float** %5
%11 = getelementptr inbounds float, float* %10, i64 0
%12 = load float, float* %11
%13 = fadd float %9, %12
%14 = load float*, float** %6
%15 = getelementptr inbounds float, float* %14, i64 0
store float %13, float* %15
%16 = load float*, float** %4
%17 = getelementptr inbounds float, float* %16, i64 1
%18 = load float, float* %17
%19 = load float*, float** %5
%20 = getelementptr inbounds float, float* %19, i64 1
%21 = load float, float* %20
%22 = fadd float %18, %21
%23 = load float*, float** %6
%24 = getelementptr inbounds float, float* %23, i64 1
store float %22, float* %24
%25 = load float*, float** %4
%26 = getelementptr inbounds float, float* %25, i64 2
%27 = load float, float* %26
%28 = load float*, float** %5
%29 = getelementptr inbounds float, float* %28, i64 2
%30 = load float, float* %29
%31 = fadd float %27, %30
%32 = load float*, float** %6
%33 = getelementptr inbounds float, float* %32, i64 2
store float %31, float* %33
ret void
}

LLVM IR (-O2):
define void @v3add(float* nocapture %0, float* nocapture %1, float* nocapture writeonly %2) {
%4 = load float, float* %0
%5 = load float, float* %1
%6 = fadd float %4, %5
store float %6, float* %2
%7 = getelementptr inbounds float, float* %0, i64 1
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %1, i64 1
%10 = load float, float* %9
%11 = fadd float %8, %10
%12 = getelementptr inbounds float, float* %2, i64 1
store float %11, float* %12
%13 = getelementptr inbounds float, float* %0, i64 2
%14 = load float, float* %13
%15 = getelementptr inbounds float, float* %1, i64 2
%16 = load float, float* %15
%17 = fadd float %14, %16
%18 = getelementptr inbounds float, float* %2, i64 2
store float %17, float* %18
ret void
}
int webidl_enumerate_node(struct webidl_node *node, void *ctx) {
  ((void)(node));
  (*((int *)ctx))++;
  return 0;
}


x86 assembly (clang, -O0):
<webidl_enumerate_node>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<webidl_enumerate_node>:
addl   $0x1,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.webidl_node = type opaque
define i32 @webidl_enumerate_node(%struct.webidl_node* %0, i8* %1) {
%3 = alloca %struct.webidl_node*
%4 = alloca i8*
store %struct.webidl_node* %0, %struct.webidl_node** %3
store i8* %1, i8** %4
%5 = load %struct.webidl_node*, %struct.webidl_node** %3
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = add nsw i32 %8, 1
store i32 %9, i32* %7
ret i32 0
}

LLVM IR (-O2):
%struct.webidl_node = type opaque
define i32 @webidl_enumerate_node(%struct.webidl_node* nocapture readnone %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = load i32, i32* %3
%5 = add nsw i32 %4, 1
store i32 %5, i32* %3
ret i32 0
}
long f() {}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define i64 @f() {
%1 = alloca i64
%2 = load i64, i64* %1
ret i64 %2
}

LLVM IR (-O2):
define i64 @f() {
ret i64 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ __u8;
typedef int __u32;

/* Variables and functions */
int /*<<< orphan*/ __put_unaligned_2(int, int /*<<< orphan*/ *);
void __put_unaligned_4(__u32 __v, register __u8 *__p) {
  __put_unaligned_2(__v >> 16, __p + 2);
  __put_unaligned_2(__v, __p);
}


x86 assembly (clang, -O0):
<__put_unaligned_4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x10,%edi
mov    -0x10(%rbp),%rsi
add    $0x8,%rsi
call   1030 <__put_unaligned_2@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <__put_unaligned_2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__put_unaligned_4>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
sar    $0x10,%edi
add    $0x8,%rsi
call   1030 <__put_unaligned_2@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <__put_unaligned_2@plt>

LLVM IR (-O0):
define void @__put_unaligned_4(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = ashr i32 %5, 16
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 2
%9 = call i32 @__put_unaligned_2(i32 %6, i32* %8)
%10 = load i32, i32* %3
%11 = load i32*, i32** %4
%12 = call i32 @__put_unaligned_2(i32 %10, i32* %11)
ret void
}

LLVM IR (-O2):
define void @__put_unaligned_4(i32 %0, i32* %1) {
%3 = ashr i32 %0, 16
%4 = getelementptr inbounds i32, i32* %1, i64 2
%5 = tail call i32 @__put_unaligned_2(i32 %3, i32* %4)
%6 = tail call i32 @__put_unaligned_2(i32 %0, i32* %1)
ret void
}
int do_682() { return 682; }


x86 assembly (clang, -O0):
<do_682>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2aa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_682>:
mov    $0x2aa,%eax
ret

LLVM IR (-O0):
define i32 @do_682() {
ret i32 682
}

LLVM IR (-O2):
define i32 @do_682() {
ret i32 682
}
/* Variables and functions */
int SIGINT;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void SigHandler(int sig) {
  if (sig == SIGINT)
    exit(0);
}


x86 assembly (clang, -O0):
<SigHandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ec3(%rip),%rcx
cmp    (%rcx),%eax
jne    1134 <SigHandler+0x24>
xor    %edi,%edi
call   1030 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SigHandler>:
push   %rax
mov    0x2ed0(%rip),%rax
cmp    %edi,(%rax)
je     111e <SigHandler+0xe>
pop    %rax
ret
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@SIGINT = global i32 0
define void @SigHandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGINT
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @exit(i32 0)
unreachable
8: ; preds = %1
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
define void @SigHandler(i32 %0) {
%2 = load i32, i32* @SIGINT
%3 = icmp eq i32 %2, %0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @exit(i32 0)
unreachable
6: ; preds = %1
ret void
}
/* Variables and functions */
char *malloc(int);
void doit_100M(void) {
  char *buf;
  buf = malloc(100000000);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x5f5e100,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @doit_100M() {
%1 = alloca i8*
%2 = call i8* @malloc(i32 100000000)
store i8* %2, i8** %1
ret void
}

LLVM IR (-O2):
define void @doit_100M() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Cyc_Absyndump_dump_char(int);
void Cyc_Absyndump_dump_semi(void) { Cyc_Absyndump_dump_char(59); }


x86 assembly (clang, -O0):
<Cyc_Absyndump_dump_semi>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3b,%edi
call   1030 <Cyc_Absyndump_dump_char@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Absyndump_dump_semi>:
mov    $0x3b,%edi
jmp    1030 <Cyc_Absyndump_dump_char@plt>

LLVM IR (-O0):
define void @Cyc_Absyndump_dump_semi() {
%1 = call i32 @Cyc_Absyndump_dump_char(i32 59)
ret void
}

LLVM IR (-O2):
define void @Cyc_Absyndump_dump_semi() {
%1 = tail call i32 @Cyc_Absyndump_dump_char(i32 59)
ret void
}