unsigned int GPMCIntStatusGet(unsigned int baseAddr, unsigned int flag) {
  unsigned int retVal;
  retVal = 0;
  switch (flag) {
  case (0):
    retVal =
        (((*((volatile unsigned int *)(baseAddr + (0x18)))) & (0x00000001u)) >>
         (0x00000000u));
    break;
  case (1):
    retVal =
        (((*((volatile unsigned int *)(baseAddr + (0x18)))) & (0x00000002u)) >>
         (0x00000001u));
    break;
  case (2):
    retVal =
        (((*((volatile unsigned int *)(baseAddr + (0x18)))) & (0x00000100u)) >>
         (0x00000008u));
    break;
  case (3):
    retVal =
        (((*((volatile unsigned int *)(baseAddr + (0x18)))) & (0x00000200u)) >>
         (0x00000009u));
    break;
  }
  return (retVal);
}


x86 assembly (clang, -O0):
<GPMCIntStatusGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x18(%rbp)
sub    $0x3,%rax
ja     1195 <GPMCIntStatusGet+0x95>
mov    -0x18(%rbp),%rax
lea    0xed3(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x4(%rbp),%eax
add    $0x18,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x1,%eax
shr    $0x0,%eax
mov    %eax,-0xc(%rbp)
jmp    1195 <GPMCIntStatusGet+0x95>
mov    -0x4(%rbp),%eax
add    $0x18,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x2,%eax
shr    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1195 <GPMCIntStatusGet+0x95>
mov    -0x4(%rbp),%eax
add    $0x18,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x100,%eax
shr    $0x8,%eax
mov    %eax,-0xc(%rbp)
jmp    1195 <GPMCIntStatusGet+0x95>
mov    -0x4(%rbp),%eax
add    $0x18,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x200,%eax
shr    $0x9,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCIntStatusGet>:
cmp    $0x3,%esi
ja     1120 <GPMCIntStatusGet+0x20>
mov    %esi,%eax
lea    0xef2(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
add    $0x18,%edi
mov    (%rdi),%eax
and    $0x1,%eax
ret
xor    %eax,%eax
ret
add    $0x18,%edi
mov    (%rdi),%eax
shr    %eax
and    $0x1,%eax
ret
add    $0x18,%edi
mov    (%rdi),%eax
shr    $0x8,%eax
and    $0x1,%eax
ret
add    $0x18,%edi
mov    (%rdi),%eax
shr    $0x9,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @GPMCIntStatusGet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i32, i32* %4
switch i32 %6, label %39 [
i32 0, label %7
i32 1, label %15
i32 2, label %23
i32 3, label %31
]
7: ; preds = %2
%8 = load i32, i32* %3
%9 = add i32 %8, 24
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = and i32 %12, 1
%14 = lshr i32 %13, 0
store i32 %14, i32* %5
br label %39
15: ; preds = %2
%16 = load i32, i32* %3
%17 = add i32 %16, 24
%18 = zext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
%20 = load volatile i32, i32* %19
%21 = and i32 %20, 2
%22 = lshr i32 %21, 1
store i32 %22, i32* %5
br label %39
23: ; preds = %2
%24 = load i32, i32* %3
%25 = add i32 %24, 24
%26 = zext i32 %25 to i64
%27 = inttoptr i64 %26 to i32*
%28 = load volatile i32, i32* %27
%29 = and i32 %28, 256
%30 = lshr i32 %29, 8
store i32 %30, i32* %5
br label %39
31: ; preds = %2
%32 = load i32, i32* %3
%33 = add i32 %32, 24
%34 = zext i32 %33 to i64
%35 = inttoptr i64 %34 to i32*
%36 = load volatile i32, i32* %35
%37 = and i32 %36, 512
%38 = lshr i32 %37, 9
store i32 %38, i32* %5
br label %39
39: ; preds = %2, %31, %23, %15, %7
%40 = load i32, i32* %5
ret i32 %40
}

LLVM IR (-O2):
define i32 @GPMCIntStatusGet(i32 %0, i32 %1) {
switch i32 %1, label %30 [
i32 0, label %3
i32 1, label %9
i32 2, label %16
i32 3, label %23
]
3: ; preds = %2
%4 = add i32 %0, 24
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, 1
br label %30
9: ; preds = %2
%10 = add i32 %0, 24
%11 = zext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
%14 = lshr i32 %13, 1
%15 = and i32 %14, 1
br label %30
16: ; preds = %2
%17 = add i32 %0, 24
%18 = zext i32 %17 to i64
%19 = inttoptr i64 %18 to i32*
%20 = load volatile i32, i32* %19
%21 = lshr i32 %20, 8
%22 = and i32 %21, 1
br label %30
23: ; preds = %2
%24 = add i32 %0, 24
%25 = zext i32 %24 to i64
%26 = inttoptr i64 %25 to i32*
%27 = load volatile i32, i32* %26
%28 = lshr i32 %27, 9
%29 = and i32 %28, 1
br label %30
30: ; preds = %2, %23, %16, %9, %3
%31 = phi i32 [ 0, %2 ], [ %29, %23 ], [ %22, %16 ], [ %15, %9 ], [ %8, %3 ]
ret i32 %31
}