void _pwmss_eqep_clk_enable(unsigned int device_id) {
  if (0 == device_id) {
    (*((volatile unsigned int *)((0x48300000) + (0x00000008u)))) &= 0xFFFFFFEFu;
    (*((volatile unsigned int *)((0x48300000) + (0x00000008u)))) |=
        (0x00000010u);
    while (!((*((volatile unsigned int *)((0x48300000) + (0x00000008u)))) &
             (0x00000010u)))
      ;
  } else if (1 == device_id) {
    (*((volatile unsigned int *)((0x48302000) + (0x00000008u)))) &= 0xFFFFFFEFu;
    (*((volatile unsigned int *)((0x48302000) + (0x00000008u)))) |=
        (0x00000010u);
    while (!((*((volatile unsigned int *)((0x48302000) + (0x00000008u)))) &
             (0x00000010u)))
      ;
  } else if (2 == device_id) {
    (*((volatile unsigned int *)((0x48304000) + (0x00000008u)))) &= 0xFFFFFFEFu;
    (*((volatile unsigned int *)((0x48304000) + (0x00000008u)))) |=
        (0x00000010u);
    while (!((*((volatile unsigned int *)((0x48304000) + (0x00000008u)))) &
             (0x00000010u)))
      ;
  } else {
    ;
  }
}


x86 assembly (clang, -O0):
<_pwmss_eqep_clk_enable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jne    115d <_pwmss_eqep_clk_enable+0x5d>
mov    $0x48300008,%eax
mov    (%rax),%ecx
and    $0xffffffef,%ecx
mov    $0x48300008,%eax
mov    %ecx,(%rax)
mov    $0x48300008,%eax
mov    (%rax),%ecx
or     $0x10,%ecx
mov    $0x48300008,%eax
mov    %ecx,(%rax)
mov    $0x48300008,%eax
mov    (%rax),%eax
and    $0x10,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1153 <_pwmss_eqep_clk_enable+0x53>
jmp    1158 <_pwmss_eqep_clk_enable+0x58>
jmp    1134 <_pwmss_eqep_clk_enable+0x34>
jmp    121e <_pwmss_eqep_clk_enable+0x11e>
mov    $0x1,%eax
cmp    -0x4(%rbp),%eax
jne    11b6 <_pwmss_eqep_clk_enable+0xb6>
mov    $0x48302008,%eax
mov    (%rax),%ecx
and    $0xffffffef,%ecx
mov    $0x48302008,%eax
mov    %ecx,(%rax)
mov    $0x48302008,%eax
mov    (%rax),%ecx
or     $0x10,%ecx
mov    $0x48302008,%eax
mov    %ecx,(%rax)
mov    $0x48302008,%eax
mov    (%rax),%eax
and    $0x10,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    11ac <_pwmss_eqep_clk_enable+0xac>
jmp    11b1 <_pwmss_eqep_clk_enable+0xb1>
jmp    118d <_pwmss_eqep_clk_enable+0x8d>
jmp    1219 <_pwmss_eqep_clk_enable+0x119>
mov    $0x2,%eax
cmp    -0x4(%rbp),%eax
jne    120f <_pwmss_eqep_clk_enable+0x10f>
mov    $0x48304008,%eax
mov    (%rax),%ecx
and    $0xffffffef,%ecx
mov    $0x48304008,%eax
mov    %ecx,(%rax)
mov    $0x48304008,%eax
mov    (%rax),%ecx
or     $0x10,%ecx
mov    $0x48304008,%eax
mov    %ecx,(%rax)
mov    $0x48304008,%eax
mov    (%rax),%eax
and    $0x10,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1205 <_pwmss_eqep_clk_enable+0x105>
jmp    120a <_pwmss_eqep_clk_enable+0x10a>
jmp    11e6 <_pwmss_eqep_clk_enable+0xe6>
jmp    1214 <_pwmss_eqep_clk_enable+0x114>
jmp    1214 <_pwmss_eqep_clk_enable+0x114>
jmp    1219 <_pwmss_eqep_clk_enable+0x119>
jmp    121e <_pwmss_eqep_clk_enable+0x11e>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pwmss_eqep_clk_enable>:
cmp    $0x2,%edi
je     112f <_pwmss_eqep_clk_enable+0x2f>
cmp    $0x1,%edi
je     114f <_pwmss_eqep_clk_enable+0x4f>
test   %edi,%edi
jne    116d <_pwmss_eqep_clk_enable+0x6d>
andl   $0xffffffef,0x48300008
ef
orl    $0x10,0x48300008
10
xchg   %ax,%ax
testl  $0x10,0x48300008
je     1120 <_pwmss_eqep_clk_enable+0x20>
jmp    116d <_pwmss_eqep_clk_enable+0x6d>
andl   $0xffffffef,0x48304008
ef
orl    $0x10,0x48304008
10
nop
testl  $0x10,0x48304008
je     1140 <_pwmss_eqep_clk_enable+0x40>
jmp    116d <_pwmss_eqep_clk_enable+0x6d>
andl   $0xffffffef,0x48302008
ef
orl    $0x10,0x48302008
10
nop
testl  $0x10,0x48302008
je     1160 <_pwmss_eqep_clk_enable+0x60>
ret

LLVM IR (-O0):
define void @_pwmss_eqep_clk_enable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 0, %3
br i1 %4, label %5, label %17
5: ; preds = %1
%6 = load volatile i32, i32* inttoptr (i64 1211105288 to i32*)
%7 = and i32 %6, -17
store volatile i32 %7, i32* inttoptr (i64 1211105288 to i32*)
%8 = load volatile i32, i32* inttoptr (i64 1211105288 to i32*)
%9 = or i32 %8, 16
store volatile i32 %9, i32* inttoptr (i64 1211105288 to i32*)
br label %10
10: ; preds = %15, %5
%11 = load volatile i32, i32* inttoptr (i64 1211105288 to i32*)
%12 = and i32 %11, 16
%13 = icmp ne i32 %12, 0
%14 = xor i1 %13, true
br i1 %14, label %15, label %16
15: ; preds = %10
br label %10
16: ; preds = %10
br label %50
17: ; preds = %1
%18 = load i32, i32* %2
%19 = icmp eq i32 1, %18
br i1 %19, label %20, label %32
20: ; preds = %17
%21 = load volatile i32, i32* inttoptr (i64 1211113480 to i32*)
%22 = and i32 %21, -17
store volatile i32 %22, i32* inttoptr (i64 1211113480 to i32*)
%23 = load volatile i32, i32* inttoptr (i64 1211113480 to i32*)
%24 = or i32 %23, 16
store volatile i32 %24, i32* inttoptr (i64 1211113480 to i32*)
br label %25
25: ; preds = %30, %20
%26 = load volatile i32, i32* inttoptr (i64 1211113480 to i32*)
%27 = and i32 %26, 16
%28 = icmp ne i32 %27, 0
%29 = xor i1 %28, true
br i1 %29, label %30, label %31
30: ; preds = %25
br label %25
31: ; preds = %25
br label %49
32: ; preds = %17
%33 = load i32, i32* %2
%34 = icmp eq i32 2, %33
br i1 %34, label %35, label %47
35: ; preds = %32
%36 = load volatile i32, i32* inttoptr (i64 1211121672 to i32*)
%37 = and i32 %36, -17
store volatile i32 %37, i32* inttoptr (i64 1211121672 to i32*)
%38 = load volatile i32, i32* inttoptr (i64 1211121672 to i32*)
%39 = or i32 %38, 16
store volatile i32 %39, i32* inttoptr (i64 1211121672 to i32*)
br label %40
40: ; preds = %45, %35
%41 = load volatile i32, i32* inttoptr (i64 1211121672 to i32*)
%42 = and i32 %41, 16
%43 = icmp ne i32 %42, 0
%44 = xor i1 %43, true
br i1 %44, label %45, label %46
45: ; preds = %40
br label %40
46: ; preds = %40
br label %48
47: ; preds = %32
br label %48
48: ; preds = %47, %46
br label %49
49: ; preds = %48, %31
br label %50
50: ; preds = %49, %16
ret void
}

LLVM IR (-O2):
define void @_pwmss_eqep_clk_enable(i32 %0) {
switch i32 %0, label %29 [
i32 0, label %2
i32 1, label %11
i32 2, label %20
]
2: ; preds = %1
%3 = load volatile i32, i32* inttoptr (i64 1211105288 to i32*)
%4 = and i32 %3, -17
store volatile i32 %4, i32* inttoptr (i64 1211105288 to i32*)
%5 = load volatile i32, i32* inttoptr (i64 1211105288 to i32*)
%6 = or i32 %5, 16
store volatile i32 %6, i32* inttoptr (i64 1211105288 to i32*)
br label %7
7: ; preds = %7, %2
%8 = load volatile i32, i32* inttoptr (i64 1211105288 to i32*)
%9 = and i32 %8, 16
%10 = icmp eq i32 %9, 0
br i1 %10, label %7, label %29
11: ; preds = %1
%12 = load volatile i32, i32* inttoptr (i64 1211113480 to i32*)
%13 = and i32 %12, -17
store volatile i32 %13, i32* inttoptr (i64 1211113480 to i32*)
%14 = load volatile i32, i32* inttoptr (i64 1211113480 to i32*)
%15 = or i32 %14, 16
store volatile i32 %15, i32* inttoptr (i64 1211113480 to i32*)
br label %16
16: ; preds = %16, %11
%17 = load volatile i32, i32* inttoptr (i64 1211113480 to i32*)
%18 = and i32 %17, 16
%19 = icmp eq i32 %18, 0
br i1 %19, label %16, label %29
20: ; preds = %1
%21 = load volatile i32, i32* inttoptr (i64 1211121672 to i32*)
%22 = and i32 %21, -17
store volatile i32 %22, i32* inttoptr (i64 1211121672 to i32*)
%23 = load volatile i32, i32* inttoptr (i64 1211121672 to i32*)
%24 = or i32 %23, 16
store volatile i32 %24, i32* inttoptr (i64 1211121672 to i32*)
br label %25
25: ; preds = %25, %20
%26 = load volatile i32, i32* inttoptr (i64 1211121672 to i32*)
%27 = and i32 %26, 16
%28 = icmp eq i32 %27, 0
br i1 %28, label %25, label %29
29: ; preds = %25, %16, %7, %1
ret void
}