xunge/DecIR huggingface dataset:
int is_whitespace(char c) {
  return c == ' ' || c == '\t' || c == '\r' || c == '\n';
}


x86 assembly (clang, -O0):
<is_whitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_whitespace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_whitespace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0xd,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_whitespace+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0xa,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_whitespace>:
cmp    $0x20,%dil
ja     1120 <is_whitespace+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x100002200,%rdx
bt     %rcx,%rdx
jae    1120 <is_whitespace+0x20>
ret
xor    %eax,%eax
cmp    $0xa,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_whitespace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 9
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 13
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 10
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_whitespace(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %5
i8 13, label %5
i8 9, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 10
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
void fa137(void) {
P0A:
  goto P0A;
  ({
    P01A:
      goto P01A;
      ({
        P012A:
          goto P012A;
          0;
      });
    P01B:
      goto P01B;
      ({
        P013A:
          goto P013A;
          0;
      });
    P01C:
      goto P01C;
      0;
  });
P0B:
  goto P0B;
  ({
    P02A:
      goto P02A;
      ({
        P024A:
          goto P024A;
          0;
      });
    p02B:
      goto p02B;
      goto a;
    P02B:
      goto P02B;
      ({
        P025A:
          goto P025A;
          0;
      });
    a:
      0;
  });
P0C:
  goto P0C;
  0;
P0D:
  goto P0D;
}


x86 assembly (clang, -O0):
<fa137>:
push   %rbp
mov    %rsp,%rbp
jmp    1104 <fa137+0x4>

x86 assembly (clang, -O2):
<fa137>:
jmp    1100 <fa137>

LLVM IR (-O0):
define void @fa137() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
br label %7
7: ; preds = %7, %0
br label %7
8: ; No predecessors!
br label %9
9: ; preds = %9, %8
br label %9
10: ; No predecessors!
br label %11
11: ; preds = %11, %10
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
br label %14
14: ; preds = %14, %13
br label %14
15: ; preds = %15
br label %15
16: ; preds = %16
br label %16
17: ; No predecessors!
br label %18
18: ; preds = %18, %17
br label %18
19: ; No predecessors!
br label %20
20: ; preds = %20, %19
br label %20
21: ; preds = %21
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
br label %24
24: ; preds = %24, %23
br label %24
25: ; preds = %25
br label %25
26: ; preds = %26
br label %26
}

LLVM IR (-O2):
define void @fa137() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int av_bswap32(int);
uint64_t av_bswap64(uint64_t x) {
  return (uint64_t)av_bswap32(x) << 32 | av_bswap32(x >> 32);
}


x86 assembly (clang, -O0):
<av_bswap64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <av_bswap32@plt>
mov    $0x20,%ecx
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x20,%ecx
sar    %cl,%edi
call   1030 <av_bswap32@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_bswap64>:
push   %rax
call   1030 <av_bswap32@plt>
pop    %rax
jmp    1030 <av_bswap32@plt>

LLVM IR (-O0):
define i32 @av_bswap64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @av_bswap32(i32 %3)
%5 = shl i32 %4, 32
%6 = load i32, i32* %2
%7 = ashr i32 %6, 32
%8 = call i32 @av_bswap32(i32 %7)
%9 = or i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @av_bswap64(i32 %0) {
%2 = tail call i32 @av_bswap32(i32 %0)
%3 = tail call i32 @av_bswap32(i32 poison)
ret i32 poison
}
/* Variables and functions */
scalar_t__ log(double);
long double logl(long double x) { return (long double)log((double)x); }


x86 assembly (clang, -O0):
<logl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fstpl  -0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
call   1030 <log@plt>
mov    %rax,-0x18(%rbp)
fildll -0x18(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logl>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fstpl  0x8(%rsp)
movsd  0x8(%rsp),%xmm0
call   1030 <log@plt>
mov    %rax,0x10(%rsp)
fildll 0x10(%rsp)
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @logl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fptrunc x86_fp80 %3 to double
%5 = call i64 @log(double %4)
%6 = sitofp i64 %5 to x86_fp80
ret x86_fp80 %6
}

LLVM IR (-O2):
define x86_fp80 @logl(x86_fp80 %0) {
%2 = fptrunc x86_fp80 %0 to double
%3 = tail call i64 @log(double %2)
%4 = sitofp i64 %3 to x86_fp80
ret x86_fp80 %4
}
void *hostap_crypt_null_init(void) { return (void *)1; }


x86 assembly (clang, -O0):
<hostap_crypt_null_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hostap_crypt_null_init>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i8* @hostap_crypt_null_init() {
ret i8* inttoptr (i64 1 to i8*)
}

LLVM IR (-O2):
define i8* @hostap_crypt_null_init() {
ret i8* inttoptr (i64 1 to i8*)
}
/* Type definitions */
struct MidiParser {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct MidiParser *);
void midi_destroy_parser(struct MidiParser *self) { free(self); }


x86 assembly (clang, -O0):
<midi_destroy_parser>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<midi_destroy_parser>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.MidiParser = type { i32 }
define void @midi_destroy_parser(%struct.MidiParser* %0) {
%2 = alloca %struct.MidiParser*
store %struct.MidiParser* %0, %struct.MidiParser** %2
%3 = load %struct.MidiParser*, %struct.MidiParser** %2
%4 = call i32 @free(%struct.MidiParser* %3)
ret void
}

LLVM IR (-O2):
%struct.MidiParser = type { i32 }
define void @midi_destroy_parser(%struct.MidiParser* nocapture %0) {
%2 = tail call i32 @free(%struct.MidiParser* %0)
ret void
}
void gtk_tree_store_set_column_types() {}


x86 assembly (clang, -O0):
<gtk_tree_store_set_column_types>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_store_set_column_types>:
ret

LLVM IR (-O0):
define void @gtk_tree_store_set_column_types() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_store_set_column_types() {
ret void
}
/* Variables and functions */
int expect_zng(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sync_test();
int /*<<< orphan*/ testbreak();
int BasicSync(void) {
  int passed;
  int block = 0;
  testbreak();
  passed = expect_zng(0, sync_test());
  if (passed != 0) {
    printf("\tFailed Phase 2: This call did something unexpected.\n");
    fflush(NULL);
    block = -1;
  };
  testbreak();
  return block;
}


x86 assembly (clang, -O0):
<BasicSync>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1070 <testbreak@plt>
mov    $0x0,%al
call   1040 <sync_test@plt>
mov    %eax,%esi
xor    %edi,%edi
call   1050 <expect_zng@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     119f <BasicSync+0x4f>
lea    0xe76(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1060 <fflush@plt>
movl   $0xffffffff,-0x8(%rbp)
mov    $0x0,%al
call   1070 <testbreak@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BasicSync>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1070 <testbreak@plt>
xor    %eax,%eax
call   1040 <sync_test@plt>
xor    %edi,%edi
mov    %eax,%esi
call   1050 <expect_zng@plt>
test   %eax,%eax
je     1186 <BasicSync+0x36>
lea    0xe8b(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1060 <fflush@plt>
mov    $0xffffffff,%ebx
xor    %eax,%eax
call   1070 <testbreak@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [54 x i8] c"\09Failed Phase 2: This call did something unexpected.\0A\00"
define i32 @BasicSync() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %2
%3 = call i32 (...) @testbreak()
%4 = call i32 (...) @sync_test()
%5 = call i32 @expect_zng(i32 0, i32 %4)
store i32 %5, i32* %1
%6 = load i32, i32* %1
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %0
%9 = call i32 @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
%10 = call i32 @fflush(i32* null)
store i32 -1, i32* %2
br label %11
11: ; preds = %8, %0
%12 = call i32 (...) @testbreak()
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@str = [53 x i8] c"\09Failed Phase 2: This call did something unexpected.\00"
define i32 @BasicSync() {
%1 = tail call i32 (...) @testbreak()
%2 = tail call i32 (...) @sync_test()
%3 = tail call i32 @expect_zng(i32 0, i32 %2)
%4 = icmp eq i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %0
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([53 x i8], [53 x i8]* @str, i64 0, i64 0))
%7 = tail call i32 @fflush(i32* null)
br label %8
8: ; preds = %5, %0
%9 = phi i32 [ -1, %5 ], [ 0, %0 ]
%10 = tail call i32 (...) @testbreak()
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ ft_comb(int, int *, int);
void ft_print_combn(int n) {
  int nb[10];
  int index = 0;
  for (int i = 0; i < 10; i++) {
    nb[i] = 0;
  }
  ft_comb(n, nb, index);
}


x86 assembly (clang, -O0):
<ft_print_combn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x34(%rbp)
movl   $0x0,-0x38(%rbp)
cmpl   $0xa,-0x38(%rbp)
jge    114d <ft_print_combn+0x3d>
movslq -0x38(%rbp),%rax
movl   $0x0,-0x30(%rbp,%rax,4)
mov    -0x38(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x38(%rbp)
jmp    1129 <ft_print_combn+0x19>
mov    -0x4(%rbp),%edi
lea    -0x30(%rbp),%rsi
mov    -0x34(%rbp),%edx
call   1030 <ft_comb@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_print_combn>:
sub    $0x28,%rsp
xorps  %xmm0,%xmm0
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
movq   $0x0,0x20(%rsp)
mov    %rsp,%rsi
xor    %edx,%edx
call   1030 <ft_comb@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define void @ft_print_combn(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i32]
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %1
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 10
br i1 %8, label %9, label %16
9: ; preds = %6
%10 = load i32, i32* %5
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 %11
store i32 0, i32* %12
br label %13
13: ; preds = %9
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
store i32 %15, i32* %5
br label %6
16: ; preds = %6
%17 = load i32, i32* %2
%18 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 0
%19 = load i32, i32* %4
%20 = call i32 @ft_comb(i32 %17, i32* %18, i32 %19)
ret void
}

LLVM IR (-O2):
define void @ft_print_combn(i32 %0) {
%2 = alloca [10 x i32]
%3 = bitcast [10 x i32]* %2 to i8*
%4 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
%5 = call i32 @ft_comb(i32 %0, i32* %4, i32 0)
ret void
}
int main(int argc, char **argv) {
  int ret = 0;
  return ret;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
double ho_recognize_font_1_nine(const double *array_in) {
  double return_value = 0.0;
  return return_value;
}


x86 assembly (clang, -O0):
<ho_recognize_font_1_nine>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ho_recognize_font_1_nine>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @ho_recognize_font_1_nine(double* %0) {
%2 = alloca double*
%3 = alloca double
store double* %0, double** %2
store double 0.000000e+00, double* %3
%4 = load double, double* %3
ret double %4
}

LLVM IR (-O2):
define double @ho_recognize_font_1_nine(double* nocapture readnone %0) {
ret double 0.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ JamesDSPGlobalMemoryDeallocation();
__attribute__((destructor)) void destruction(void) {
  JamesDSPGlobalMemoryDeallocation();
}


x86 assembly (clang, -O0):
<destruction>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <JamesDSPGlobalMemoryDeallocation@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<destruction>:
xor    %eax,%eax
jmp    1030 <JamesDSPGlobalMemoryDeallocation@plt>

LLVM IR (-O0):
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @destruction, i8* null }]
define void @destruction() {
%1 = call i32 (...) @JamesDSPGlobalMemoryDeallocation()
ret void
}

LLVM IR (-O2):
@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @destruction, i8* null }]
define void @destruction() {
%1 = tail call i32 (...) @JamesDSPGlobalMemoryDeallocation()
ret void
}
void task_init() {}


x86 assembly (clang, -O0):
<task_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_init>:
ret

LLVM IR (-O0):
define void @task_init() {
ret void
}

LLVM IR (-O2):
define void @task_init() {
ret void
}
/* Variables and functions */
double strtod(char const *, char **);
__attribute__((always_, used)) double __Tales_atof(const char *__nptr) {
  return strtod(__nptr, (char **)NULL);
}


x86 assembly (clang, -O0):
<__Tales_atof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <strtod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__Tales_atof>:
xor    %esi,%esi
jmp    1030 <strtod@plt>

LLVM IR (-O0):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (double (i8*)* @__Tales_atof to i8*)], section "llvm.metadata"
define double @__Tales_atof(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call double @strtod(i8* %3, i8** null)
ret double %4
}

LLVM IR (-O2):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (double (i8*)* @__Tales_atof to i8*)], section "llvm.metadata"
define double @__Tales_atof(i8* nocapture %0) {
%2 = tail call double @strtod(i8* nocapture %0, i8** null)
ret double %2
}
/* Variables and functions */
scalar_t__ isspace(char);
char *CFG_trimLeadingWhitespace(char *str) {
  if (!str)
    return str;
  while (isspace(*str))
    str++;
  return str;
}


x86 assembly (clang, -O0):
<CFG_trimLeadingWhitespace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <CFG_trimLeadingWhitespace+0x24>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1168 <CFG_trimLeadingWhitespace+0x58>
jmp    1139 <CFG_trimLeadingWhitespace+0x29>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     1160 <CFG_trimLeadingWhitespace+0x50>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1139 <CFG_trimLeadingWhitespace+0x29>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CFG_trimLeadingWhitespace>:
push   %rbx
test   %rdi,%rdi
je     1134 <CFG_trimLeadingWhitespace+0x24>
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   (%rax)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isspace@plt>
test   %rax,%rax
jne    1120 <CFG_trimLeadingWhitespace+0x10>
jmp    1136 <CFG_trimLeadingWhitespace+0x26>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @CFG_trimLeadingWhitespace(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = load i8*, i8** %3
store i8* %7, i8** %2
br label %19
8: ; preds = %1
br label %9
9: ; preds = %14, %8
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call i64 @isspace(i8 signext %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %9
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %3
br label %9
17: ; preds = %9
%18 = load i8*, i8** %3
store i8* %18, i8** %2
br label %19
19: ; preds = %17, %6
%20 = load i8*, i8** %2
ret i8* %20
}

LLVM IR (-O2):
define i8* @CFG_trimLeadingWhitespace(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i8* [ %8, %3 ], [ %0, %1 ]
%5 = load i8, i8* %4
%6 = tail call i64 @isspace(i8 signext %5)
%7 = icmp eq i64 %6, 0
%8 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %7, label %9, label %3
9: ; preds = %3, %1
%10 = phi i8* [ null, %1 ], [ %4, %3 ]
ret i8* %10
}
int tdefault_remove_vfork_catchpoint(struct target_ops *self, int arg1) {
  return 1;
}


x86 assembly (clang, -O0):
<tdefault_remove_vfork_catchpoint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tdefault_remove_vfork_catchpoint>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.target_ops = type opaque
define i32 @tdefault_remove_vfork_catchpoint(%struct.target_ops* %0, i32 %1) {
%3 = alloca %struct.target_ops*
%4 = alloca i32
store %struct.target_ops* %0, %struct.target_ops** %3
store i32 %1, i32* %4
ret i32 1
}

LLVM IR (-O2):
%struct.target_ops = type opaque
define i32 @tdefault_remove_vfork_catchpoint(%struct.target_ops* nocapture readnone %0, i32 %1) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void testTokenize(char c) { putchar(c); }


x86 assembly (clang, -O0):
<testTokenize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testTokenize>:
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define void @testTokenize(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @putchar(i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @testTokenize(i8 signext %0) {
%2 = tail call i32 @putchar(i8 signext %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ output(char *);
void printLoadAvg5Info(const char *cmd) {
  (void)cmd;
  output("Load average 5 min\t0\t0\t\n");
}


x86 assembly (clang, -O0):
<printLoadAvg5Info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <output@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printLoadAvg5Info>:
lea    0xee9(%rip),%rdi
jmp    1030 <output@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Load average 5 min\090\090\09\0A\00"
define void @printLoadAvg5Info(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @output(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"Load average 5 min\090\090\09\0A\00"
define void @printLoadAvg5Info(i8* nocapture readnone %0) {
%2 = tail call i32 @output(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void help(void) {
  static const char help_string[] =
      "\n Usage: ic706_client [options]\n"
      "\n Possible options are:\n\n"
      "  -s    Server IP (default is 127.0.0.1).\n"
      "  -p    Network port number (default is 42000).\n"
      "  -u    Uart port (default is /dev/ttyO1).\n"
      "  -h    This help message.\n\n";
  fprintf(stderr, "%s", help_string);
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xfb7(%rip),%rsi
lea    0xed5(%rip),%rdx
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xfbb(%rip),%rsi
lea    0xed9(%rip),%rdx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@help.help_string = internal constant [219 x i8] c"\0A Usage: ic706_client [options]\0A\0A Possible options are:\0A\0A -s Server IP (default is 127.0.0.1).\0A -p Network port number (default is 42000).\0A -u Uart port (default is /dev/ttyO1).\0A -h This help message.\0A\0A\00"
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
define void @help() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([219 x i8], [219 x i8]* @help.help_string, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@help.help_string = internal constant [219 x i8] c"\0A Usage: ic706_client [options]\0A\0A Possible options are:\0A\0A -s Server IP (default is 127.0.0.1).\0A -p Network port number (default is 42000).\0A -u Uart port (default is /dev/ttyO1).\0A -h This help message.\0A\0A\00"
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
define void @help() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([219 x i8], [219 x i8]* @help.help_string, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cprintf(char *);
imp() { cprintf("|"); }


x86 assembly (clang, -O0):
<imp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <cprintf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<imp>:
lea    0xee9(%rip),%rdi
jmp    1030 <cprintf@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"|\00"
define i32 @imp() {
%1 = alloca i32
%2 = call i32 @cprintf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [2 x i8] c"|\00"
define i32 @imp() {
%1 = tail call i32 @cprintf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int shell_init();
int module_shell_init(void) { return shell_init(); }


x86 assembly (clang, -O0):
<module_shell_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <shell_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_shell_init>:
xor    %eax,%eax
jmp    1030 <shell_init@plt>

LLVM IR (-O0):
define i32 @module_shell_init() {
%1 = call i32 (...) @shell_init()
ret i32 %1
}

LLVM IR (-O2):
define i32 @module_shell_init() {
%1 = tail call i32 (...) @shell_init()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ OAL_OBTAIN_SEMAPHORE();
int /*<<< orphan*/ OAL_RELEASE_SEMAPHORE();
int i2c_bulkwrite(void *, unsigned char, unsigned short, unsigned char *, int);
int fc8300_i2c_longwrite(void *handle, unsigned short devid,
                         unsigned short addr, unsigned int data) {
  int res;
  OAL_OBTAIN_SEMAPHORE();
  res = i2c_bulkwrite(handle, (unsigned char)(devid >> 8) & 0xff, addr,
                      (unsigned char *)&data, 4);
  OAL_RELEASE_SEMAPHORE();
  return res;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dx,%ax
mov    %si,%dx
mov    %rdi,-0x8(%rbp)
mov    %dx,-0xa(%rbp)
mov    %ax,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    $0x0,%al
call   1050 <OAL_OBTAIN_SEMAPHORE@plt>
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%eax
sar    $0x8,%eax
movzbl %al,%eax
and    $0xff,%eax
mov    %al,%dl
mov    -0xc(%rbp),%ax
lea    -0x10(%rbp),%rcx
mov    $0x4,%r8d
movzbl %dl,%esi
movzwl %ax,%edx
call   1040 <i2c_bulkwrite@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%rbx
mov    %ecx,0xc(%rsp)
xor    %eax,%eax
call   1050 <OAL_OBTAIN_SEMAPHORE@plt>
shr    $0x8,%ebp
lea    0xc(%rsp),%rcx
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
mov    $0x4,%r8d
call   1040 <i2c_bulkwrite@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <OAL_RELEASE_SEMAPHORE@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fc8300_i2c_longwrite(i8* %0, i16 zeroext %1, i16 zeroext %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i16
%7 = alloca i16
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %5
store i16 %1, i16* %6
store i16 %2, i16* %7
store i32 %3, i32* %8
%10 = call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%11 = load i8*, i8** %5
%12 = load i16, i16* %6
%13 = zext i16 %12 to i32
%14 = ashr i32 %13, 8
%15 = trunc i32 %14 to i8
%16 = zext i8 %15 to i32
%17 = and i32 %16, 255
%18 = trunc i32 %17 to i8
%19 = load i16, i16* %7
%20 = bitcast i32* %8 to i8*
%21 = call i32 @i2c_bulkwrite(i8* %11, i8 zeroext %18, i16 zeroext %19, i8* %20, i32 4)
store i32 %21, i32* %9
%22 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
%23 = load i32, i32* %9
ret i32 %23
}

LLVM IR (-O2):
define i32 @fc8300_i2c_longwrite(i8* %0, i16 zeroext %1, i16 zeroext %2, i32 %3) {
%5 = alloca i32
store i32 %3, i32* %5
%6 = tail call i32 (...) @OAL_OBTAIN_SEMAPHORE()
%7 = lshr i16 %1, 8
%8 = trunc i16 %7 to i8
%9 = bitcast i32* %5 to i8*
%10 = call i32 @i2c_bulkwrite(i8* %0, i8 zeroext %8, i16 zeroext %2, i8* %9, i32 4)
%11 = call i32 (...) @OAL_RELEASE_SEMAPHORE()
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int error(char *msg) {
  puts(msg);
  return 1;
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
push   %rax
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @puts(i8* %3)
ret i32 1
}

LLVM IR (-O2):
define i32 @error(i8* nocapture %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) %0)
ret i32 1
}
/* Variables and functions */
#define SIGHUP 131
#define SIGINT 130
#define SIGQUIT 129
#define SIGTERM 128
int /*<<< orphan*/ exit(int);
int getpid();
int /*<<< orphan*/ printf(char *, int, int);
void ch_signal_handler(int signum) {
  switch (signum) {
  case SIGTERM:
  case SIGINT:
  case SIGQUIT:
  case SIGHUP:
    exit(-1);
    break;
  default:
    printf("signal %d is sent to process %d\n", signum, getpid());
  }
}


x86 assembly (clang, -O0):
<ch_signal_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffff80,%eax
sub    $0x3,%eax
ja     1159 <ch_signal_handler+0x29>
jmp    114f <ch_signal_handler+0x1f>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    -0x8(%rbp),%esi
mov    %eax,%edx
lea    0xe8e(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ch_signal_handler>:
push   %rbx
mov    %edi,%eax
and    $0xfffffffc,%eax
cmp    $0x80,%eax
je     1157 <ch_signal_handler+0x27>
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xeb3(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
pop    %rbx
jmp    1040 <printf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"signal %d is sent to process %d\0A\00"
define void @ch_signal_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
switch i32 %3, label %6 [
i32 128, label %4
i32 130, label %4
i32 129, label %4
i32 131, label %4
]
4: ; preds = %1, %1, %1, %1
%5 = call i32 @exit(i32 -1)
unreachable
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i32 (...) @getpid()
%9 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
br label %10
10: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"signal %d is sent to process %d\0A\00"
define void @ch_signal_handler(i32 %0) {
%2 = and i32 %0, -4
%3 = icmp eq i32 %2, 128
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @exit(i32 -1)
unreachable
6: ; preds = %1
%7 = tail call i32 (...) @getpid()
%8 = tail call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exynos_5410_gpio_write_mask(unsigned int, unsigned int,
                                               unsigned int);
void odroid_xu_gpio_write_13(unsigned int data) {
  unsigned int bank_offset = 0x0C20;
  unsigned int bit_index = 5;
  exynos_5410_gpio_write_mask(bank_offset, ((data & 1U) << bit_index),
                              (1U << bit_index));
}


x86 assembly (clang, -O0):
<odroid_xu_gpio_write_13>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0xc20,-0x8(%rbp)
movl   $0x5,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%esi
and    $0x1,%esi
mov    -0xc(%rbp),%ecx
shl    %cl,%esi
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
call   1030 <exynos_5410_gpio_write_mask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroid_xu_gpio_write_13>:
mov    %edi,%esi
shl    $0x5,%esi
and    $0x20,%esi
mov    $0xc20,%edi
mov    $0x20,%edx
jmp    1030 <exynos_5410_gpio_write_mask@plt>

LLVM IR (-O0):
define void @odroid_xu_gpio_write_13(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 3104, i32* %3
store i32 5, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = and i32 %6, 1
%8 = load i32, i32* %4
%9 = shl i32 %7, %8
%10 = load i32, i32* %4
%11 = shl i32 1, %10
%12 = call i32 @exynos_5410_gpio_write_mask(i32 %5, i32 %9, i32 %11)
ret void
}

LLVM IR (-O2):
define void @odroid_xu_gpio_write_13(i32 %0) {
%2 = shl i32 %0, 5
%3 = and i32 %2, 32
%4 = tail call i32 @exynos_5410_gpio_write_mask(i32 3104, i32 %3, i32 32)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
int ldl_le_p(int /*<<< orphan*/ const *);
uint64_t ldq_le_p(const void *ptr) {
  const uint8_t *p = ptr;
  uint32_t v1, v2;
  v1 = ldl_le_p(p);
  v2 = ldl_le_p(p + 4);
  return v1 | ((uint64_t)v2 << 32);
}


x86 assembly (clang, -O0):
<ldq_le_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <ldl_le_p@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x10,%rdi
call   1030 <ldl_le_p@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x18(%rbp),%edx
mov    $0x20,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ldq_le_p>:
push   %rbx
mov    %rdi,%rbx
call   1030 <ldl_le_p@plt>
add    $0x10,%rbx
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <ldl_le_p@plt>

LLVM IR (-O0):
define i32 @ldq_le_p(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %3
%8 = load i32*, i32** %3
%9 = call i32 @ldl_le_p(i32* %8)
store i32 %9, i32* %4
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 4
%12 = call i32 @ldl_le_p(i32* %11)
store i32 %12, i32* %5
%13 = load i32, i32* %4
%14 = load i32, i32* %5
%15 = shl i32 %14, 32
%16 = or i32 %13, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @ldq_le_p(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @ldl_le_p(i32* %2)
%4 = getelementptr inbounds i8, i8* %0, i64 16
%5 = bitcast i8* %4 to i32*
%6 = tail call i32 @ldl_le_p(i32* %5)
ret i32 poison
}
void outsl(int port, const void *addr, int cnt) {
  asm volatile("cld\n\trepne\n\toutsl"
               : "=S"(addr), "=c"(cnt)
               : "d"(port), "0"(addr), "1"(cnt)
               : "cc");
}


x86 assembly (clang, -O0):
<outsl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%ecx
cld
repnz outsl %ds:(%rsi),(%dx)
mov    %rsi,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outsl>:
mov    %edx,%ecx
mov    %edi,%edx
cld
repnz outsl %ds:(%rsi),(%dx)
ret

LLVM IR (-O0):
define void @outsl(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call { i8*, i32 } asm sideeffect "cld\0A\09repne\0A\09outsl", "={si},={cx},{dx},0,1,~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %7, i8* %8, i32 %9)
%11 = extractvalue { i8*, i32 } %10, 0
%12 = extractvalue { i8*, i32 } %10, 1
store i8* %11, i8** %5
store i32 %12, i32* %6
ret void
}

LLVM IR (-O2):
define void @outsl(i32 %0, i8* %1, i32 %2) {
%4 = tail call { i8*, i32 } asm sideeffect "cld\0A\09repne\0A\09outsl", "={si},={cx},{dx},0,1,~{cc},~{dirflag},~{fpsr},~{flags}"(i32 %0, i8* %1, i32 %2)
ret void
}
int execute_setresuid() { return 0; }


x86 assembly (clang, -O0):
<execute_setresuid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_setresuid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_setresuid() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_setresuid() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_15518() {
  Assert_real((isqrt(15518) == 124),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              1610, ("Integer square root of 15518 should be 124"));
}


x86 assembly (clang, -O0):
<t_sqrt_15518>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3c9e,%edi
call   1030 <isqrt@plt>
cmp    $0x7c,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x64a,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_15518>:
push   %rax
mov    $0x3c9e,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0x7c,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x64a,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [43 x i8] c"Integer square root of 15518 should be 124\00"
define void @t_sqrt_15518() {
%1 = call i32 @isqrt(i32 15518)
%2 = icmp eq i32 %1, 124
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1610, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [43 x i8] c"Integer square root of 15518 should be 124\00"
define void @t_sqrt_15518() {
%1 = tail call i32 @isqrt(i32 15518)
%2 = icmp eq i32 %1, 124
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1610, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned int b6_utf8_enc_len(unsigned int unicode) {
  if (unicode < 0x80)
    return 1;
  if (unicode < 0x800)
    return 2;
  if (unicode < 0x10000)
    return 3;
  if (unicode < 0x200000)
    return 4;
  return 0;
}


x86 assembly (clang, -O0):
<b6_utf8_enc_len>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x80,-0x8(%rbp)
jae    1120 <b6_utf8_enc_len+0x20>
movl   $0x1,-0x4(%rbp)
jmp    1172 <b6_utf8_enc_len+0x72>
cmpl   $0x800,-0x8(%rbp)
jae    1139 <b6_utf8_enc_len+0x39>
movl   $0x2,-0x4(%rbp)
jmp    1172 <b6_utf8_enc_len+0x72>
cmpl   $0x10000,-0x8(%rbp)
jae    1152 <b6_utf8_enc_len+0x52>
movl   $0x3,-0x4(%rbp)
jmp    1172 <b6_utf8_enc_len+0x72>
cmpl   $0x200000,-0x8(%rbp)
jae    116b <b6_utf8_enc_len+0x6b>
movl   $0x4,-0x4(%rbp)
jmp    1172 <b6_utf8_enc_len+0x72>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<b6_utf8_enc_len>:
mov    $0x1,%eax
cmp    $0x80,%edi
jb     1135 <b6_utf8_enc_len+0x35>
mov    $0x2,%eax
cmp    $0x800,%edi
jb     1135 <b6_utf8_enc_len+0x35>
mov    $0x3,%eax
cmp    $0x10000,%edi
jb     1135 <b6_utf8_enc_len+0x35>
xor    %eax,%eax
cmp    $0x200000,%edi
setb   %al
shl    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @b6_utf8_enc_len(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ult i32 %4, 128
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %20
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp ult i32 %8, 2048
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 2, i32* %2
br label %20
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp ult i32 %12, 65536
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 3, i32* %2
br label %20
15: ; preds = %11
%16 = load i32, i32* %3
%17 = icmp ult i32 %16, 2097152
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 4, i32* %2
br label %20
19: ; preds = %15
store i32 0, i32* %2
br label %20
20: ; preds = %19, %18, %14, %10, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @b6_utf8_enc_len(i32 %0) {
%2 = icmp ult i32 %0, 128
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = icmp ult i32 %0, 2048
br i1 %4, label %10, label %5
5: ; preds = %3
%6 = icmp ult i32 %0, 65536
br i1 %6, label %10, label %7
7: ; preds = %5
%8 = icmp ult i32 %0, 2097152
%9 = select i1 %8, i32 4, i32 0
br label %10
10: ; preds = %7, %5, %3, %1
%11 = phi i32 [ 1, %1 ], [ 2, %3 ], [ 3, %5 ], [ %9, %7 ]
ret i32 %11
}
void CRYPTO_set_dynlock_destroy_callback(void (*dyn_destroy_function)(
    struct CRYPTO_dynlock_value *l, const char *file, int line)) {
  return;
}


x86 assembly (clang, -O0):
<CRYPTO_set_dynlock_destroy_callback>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRYPTO_set_dynlock_destroy_callback>:
ret

LLVM IR (-O0):
%struct.CRYPTO_dynlock_value = type opaque
define void @CRYPTO_set_dynlock_destroy_callback(void (%struct.CRYPTO_dynlock_value*, i8*, i32)* %0) {
%2 = alloca void (%struct.CRYPTO_dynlock_value*, i8*, i32)*
store void (%struct.CRYPTO_dynlock_value*, i8*, i32)* %0, void (%struct.CRYPTO_dynlock_value*, i8*, i32)** %2
ret void
}

LLVM IR (-O2):
%struct.CRYPTO_dynlock_value = type opaque
define void @CRYPTO_set_dynlock_destroy_callback(void (%struct.CRYPTO_dynlock_value*, i8*, i32)* nocapture %0) {
ret void
}
int is_opt_mackerel_readable(int options) { return options & 0x4; }


x86 assembly (clang, -O0):
<is_opt_mackerel_readable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_opt_mackerel_readable>:
mov    %edi,%eax
and    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @is_opt_mackerel_readable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 4
ret i32 %4
}

LLVM IR (-O2):
define i32 @is_opt_mackerel_readable(i32 %0) {
%2 = and i32 %0, 4
ret i32 %2
}
/* Type definitions */
typedef char FILE;

/* Variables and functions */
FILE *gp_open_scratch_file(const char *prefix, char *fname, const char *mode) {
  return (char *)0;
}


x86 assembly (clang, -O0):
<gp_open_scratch_file>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gp_open_scratch_file>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @gp_open_scratch_file(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @gp_open_scratch_file(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i8* null
}
/* Variables and functions */
long __my_random();
__attribute__((visibility("default"))) long int random(void) {
  return __my_random();
}


x86 assembly (clang, -O0):
<random>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__my_random@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<random>:
xor    %eax,%eax
jmp    1030 <__my_random@plt>

LLVM IR (-O0):
define i64 @random() {
%1 = call i64 (...) @__my_random()
ret i64 %1
}

LLVM IR (-O2):
define i64 @random() {
%1 = tail call i64 (...) @__my_random()
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello World\n");
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [12 x i8] c"Hello World\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int GCD(long x, long y) { return y == 0 ? x : GCD(y, x % y); }


x86 assembly (clang, -O0):
<GCD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1138 <GCD+0x28>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    1154 <GCD+0x44>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,%rsi
call   1030 <GCD@plt>
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GCD>:
mov    %rdi,%rax
test   %rsi,%rsi
je     1141 <GCD+0x31>
mov    %rax,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     112b <GCD+0x1b>
cqto
idiv   %rsi
jmp    112f <GCD+0x1f>
xor    %edx,%edx
div    %esi
push   %rax
mov    %rsi,%rdi
mov    %rdx,%rsi
call   1030 <GCD@plt>
mov    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @GCD(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = load i64, i64* %3
br label %16
9: ; preds = %2
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = load i64, i64* %4
%13 = srem i64 %11, %12
%14 = call i32 @GCD(i64 %10, i64 %13)
%15 = sext i32 %14 to i64
br label %16
16: ; preds = %9, %7
%17 = phi i64 [ %8, %7 ], [ %15, %9 ]
%18 = trunc i64 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @GCD(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = srem i64 %0, %1
%6 = tail call i32 @GCD(i64 %1, i64 %5)
%7 = zext i32 %6 to i64
br label %8
8: ; preds = %2, %4
%9 = phi i64 [ %7, %4 ], [ %0, %2 ]
%10 = trunc i64 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "Usage: wordmerge dict ...\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [27 x i8] c"Usage: wordmerge dict ...\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [27 x i8] c"Usage: wordmerge dict ...\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t byte3_to_uint(uint8_t *bytes) {
  return (((uint32_t)bytes[0] << 16) & 0x00FF0000) |
         (((uint32_t)bytes[1] << 8) & 0x0000FF00) | (((uint32_t)bytes[2]));
}


x86 assembly (clang, -O0):
<byte3_to_uint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shl    $0x10,%eax
and    $0xff0000,%eax
mov    -0x8(%rbp),%rcx
mov    0x8(%rcx),%rcx
shl    $0x8,%ecx
and    $0xff00,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    0x10(%rcx),%rcx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<byte3_to_uint>:
mov    (%rdi),%eax
mov    0x8(%rdi),%ecx
movzbl %al,%eax
shl    $0x10,%eax
shl    $0x8,%ecx
movzwl %cx,%ecx
or     0x10(%rdi),%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @byte3_to_uint(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 0
%5 = load i64, i64* %4
%6 = trunc i64 %5 to i32
%7 = shl i32 %6, 16
%8 = and i32 %7, 16711680
%9 = load i64*, i64** %2
%10 = getelementptr inbounds i64, i64* %9, i64 1
%11 = load i64, i64* %10
%12 = trunc i64 %11 to i32
%13 = shl i32 %12, 8
%14 = and i32 %13, 65280
%15 = or i32 %8, %14
%16 = load i64*, i64** %2
%17 = getelementptr inbounds i64, i64* %16, i64 2
%18 = load i64, i64* %17
%19 = trunc i64 %18 to i32
%20 = or i32 %15, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @byte3_to_uint(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = trunc i64 %2 to i32
%4 = shl i32 %3, 16
%5 = and i32 %4, 16711680
%6 = getelementptr inbounds i64, i64* %0, i64 1
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i32
%9 = shl i32 %8, 8
%10 = and i32 %9, 65280
%11 = getelementptr inbounds i64, i64* %0, i64 2
%12 = load i64, i64* %11
%13 = trunc i64 %12 to i32
%14 = or i32 %5, %13
%15 = or i32 %14, %10
ret i32 %15
}