xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int __infer_nondet_int();
int fileno(FILE *stream) {
  int ret = __infer_nondet_int();
  FILE tmp;
  tmp = *stream;
  if (ret < -1 || ret == 0)
    while (1)
      ;
  return ret;
}


x86 assembly (clang, -O0):
<fileno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0xffffffff,-0xc(%rbp)
jl     1143 <fileno+0x33>
cmpl   $0x0,-0xc(%rbp)
jne    114d <fileno+0x3d>
jmp    1148 <fileno+0x38>
jmp    1148 <fileno+0x38>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fileno>:
push   %rax
xor    %eax,%eax
call   1030 <__infer_nondet_int@plt>
cmp    $0xffffffff,%eax
jl     1130 <fileno+0x20>
test   %eax,%eax
je     1130 <fileno+0x20>
pop    %rcx
ret
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
jmp    1130 <fileno+0x20>

LLVM IR (-O0):
define i32 @fileno(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = call i32 (...) @__infer_nondet_int()
store i32 %5, i32* %3
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
store i32 %7, i32* %4
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, -1
br i1 %9, label %13, label %10
10: ; preds = %1
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %10, %1
br label %14
14: ; preds = %13, %14
br label %14
15: ; preds = %10
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @fileno(i32* nocapture readnone %0) {
%2 = tail call i32 (...) @__infer_nondet_int()
%3 = icmp slt i32 %2, -1
%4 = icmp eq i32 %2, 0
%5 = or i1 %3, %4
br i1 %5, label %6, label %7
6: ; preds = %1, %6
br label %6
7: ; preds = %1
ret i32 %2
}
void I420ToAR30() {}


x86 assembly (clang, -O0):
<I420ToAR30>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I420ToAR30>:
ret

LLVM IR (-O0):
define void @I420ToAR30() {
ret void
}

LLVM IR (-O2):
define void @I420ToAR30() {
ret void
}
double foo(int x) { return (double)(float)(x | (int)0xff000000); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0xff000000,%eax
cvtsi2ss %eax,%xmm0
cvtss2sd %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
or     $0xff000000,%edi
cvtsi2ss %edi,%xmm0
cvtss2sd %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = or i32 %3, -16777216
%5 = sitofp i32 %4 to float
%6 = fpext float %5 to double
ret double %6
}

LLVM IR (-O2):
define double @foo(i32 %0) {
%2 = or i32 %0, -16777216
%3 = sitofp i32 %2 to float
%4 = fpext float %3 to double
ret double %4
}
void tegra_tsc_wait_for_suspend(void) {}


x86 assembly (clang, -O0):
<tegra_tsc_wait_for_suspend>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra_tsc_wait_for_suspend>:
ret

LLVM IR (-O0):
define void @tegra_tsc_wait_for_suspend() {
ret void
}

LLVM IR (-O2):
define void @tegra_tsc_wait_for_suspend() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Error(char *);
void *malloc(size_t);
void *GetBlock(size_t nbytes) {
  void *result;
  result = malloc(nbytes);
  if (result == NULL)
    Error("No memory available");
  return (result);
}


x86 assembly (clang, -O0):
<GetBlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <GetBlock+0x30>
lea    0xeb5(%rip),%rdi
call   1030 <Error@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetBlock>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <GetBlock+0x1a>
lea    0xecb(%rip),%rdi
call   1030 <Error@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"No memory available\00"
define i8* @GetBlock(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @Error(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [20 x i8] c"No memory available\00"
define noalias i8* @GetBlock(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @Error(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
void gdk_selection_send_notify_for_display() {}


x86 assembly (clang, -O0):
<gdk_selection_send_notify_for_display>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_selection_send_notify_for_display>:
ret

LLVM IR (-O0):
define void @gdk_selection_send_notify_for_display() {
ret void
}

LLVM IR (-O2):
define void @gdk_selection_send_notify_for_display() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
scalar_t__ malloc(int);
int main() {
  int jhala = 1000;
  int *r;
  int y;
  r = (int *)malloc(4);
  *r = 5;
  y = *r;
  assert(y >= 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x3e8,-0x8(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x5,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
movl   $0x5,(%rax)
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32 0, i32* %1
store i32 1000, i32* %2
%5 = call i64 @malloc(i32 4)
%6 = inttoptr i64 %5 to i32*
store i32* %6, i32** %3
%7 = load i32*, i32** %3
store i32 5, i32* %7
%8 = load i32*, i32** %3
%9 = load i32, i32* %8
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = icmp sge i32 %10, 0
%12 = zext i1 %11 to i32
%13 = call i32 @assert(i32 %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
store i32 5, i32* %2
%3 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
scalar_t__ calloc(int, int);
int /*<<< orphan*/ free(double *);
int /*<<< orphan*/ house(double *, double *, double *, int);
int /*<<< orphan*/ qreval(double *, double *, int);
void eigval(double *a, double *ev, int n) {
  double *dp;
  dp = (double *)calloc(n, sizeof(double));
  house(a, ev, dp, n);
  qreval(ev, dp, n);
  free(dp);
}


x86 assembly (clang, -O0):
<eigval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    $0x8,%esi
call   1040 <calloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x14(%rbp),%ecx
call   1050 <house@plt>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1060 <qreval@plt>
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eigval>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %rsi,%r14
mov    %rdi,%r15
mov    %edx,%edi
mov    $0x8,%esi
call   1040 <calloc@plt>
mov    %rax,%rbx
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rax,%rdx
mov    %ebp,%ecx
call   1050 <house@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %ebp,%edx
call   1060 <qreval@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @eigval(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
%7 = alloca double*
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%8 = load i32, i32* %6
%9 = call i64 @calloc(i32 %8, i32 8)
%10 = inttoptr i64 %9 to double*
store double* %10, double** %7
%11 = load double*, double** %4
%12 = load double*, double** %5
%13 = load double*, double** %7
%14 = load i32, i32* %6
%15 = call i32 @house(double* %11, double* %12, double* %13, i32 %14)
%16 = load double*, double** %5
%17 = load double*, double** %7
%18 = load i32, i32* %6
%19 = call i32 @qreval(double* %16, double* %17, i32 %18)
%20 = load double*, double** %7
%21 = call i32 @free(double* %20)
ret void
}

LLVM IR (-O2):
define void @eigval(double* %0, double* %1, i32 %2) {
%4 = tail call i64 @calloc(i32 %2, i32 8)
%5 = inttoptr i64 %4 to double*
%6 = tail call i32 @house(double* %0, double* %1, double* %5, i32 %2)
%7 = tail call i32 @qreval(double* %1, double* %5, i32 %2)
%8 = tail call i32 @free(double* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  int a = 0;
  int flag;
#pragma acc data copyin(a)
  {
#pragma acc kernels
    a = 1;
#pragma acc update host(a) if (1)
    if (a != 1)
      return 1;
#pragma acc kernels
    a = 2;
#pragma acc update host(a) if (0)
    if (a != 1)
      return 2;
#pragma acc kernels
    a = 3;
    flag = -3;
#pragma acc update host(a) if (flag)
    if (a != 3)
      return 3;
#pragma acc kernels
    a = 4;
    flag = 0;
#pragma acc update host(a) if (flag)
    if (a != 3)
      return 4;
  }
  printf("PASS\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     1143 <main+0x33>
movl   $0x1,-0x4(%rbp)
jmp    11bb <main+0xab>
movl   $0x2,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     1160 <main+0x50>
movl   $0x2,-0x4(%rbp)
jmp    11bb <main+0xab>
movl   $0x3,-0x8(%rbp)
movl   $0xfffffffd,-0xc(%rbp)
cmpl   $0x3,-0x8(%rbp)
je     1184 <main+0x74>
movl   $0x3,-0x4(%rbp)
jmp    11bb <main+0xab>
movl   $0x4,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x3,-0x8(%rbp)
je     11a8 <main+0x98>
movl   $0x4,-0x4(%rbp)
jmp    11bb <main+0xab>
lea    0xe51(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"PASS\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 1, i32* %2
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 1, i32* %1
br label %21
7: ; preds = %0
store i32 2, i32* %2
%8 = load i32, i32* %2
%9 = icmp ne i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 2, i32* %1
br label %21
11: ; preds = %7
store i32 3, i32* %2
store i32 -3, i32* %3
%12 = load i32, i32* %2
%13 = icmp ne i32 %12, 3
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 3, i32* %1
br label %21
15: ; preds = %11
store i32 4, i32* %2
store i32 0, i32* %3
%16 = load i32, i32* %2
%17 = icmp ne i32 %16, 3
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 4, i32* %1
br label %21
19: ; preds = %15
%20 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %1
br label %21
21: ; preds = %19, %18, %14, %10, %6
%22 = load i32, i32* %1
ret i32 %22
}

LLVM IR (-O2):
define i32 @main() {
ret i32 2
}
void CANIntEnable(unsigned long ulBase, unsigned long ulIntFlags) {
  ;

  ;
  (*((volatile unsigned long *)(ulBase + 0x00000000))) =
      (*((volatile unsigned long *)(ulBase + 0x00000000))) | ulIntFlags;
}


x86 assembly (clang, -O0):
<CANIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
or     -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<CANIntEnable>:
or     %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @CANIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = add i64 %5, 0
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = load i64, i64* %4
%10 = or i64 %8, %9
%11 = load i64, i64* %3
%12 = add i64 %11, 0
%13 = inttoptr i64 %12 to i64*
store volatile i64 %10, i64* %13
ret void
}

LLVM IR (-O2):
define void @CANIntEnable(i64 %0, i64 %1) {
%3 = inttoptr i64 %0 to i64*
%4 = load volatile i64, i64* %3
%5 = or i64 %4, %1
store volatile i64 %5, i64* %3
ret void
}
double half(int *x, int *y, char *z) { return *x / 2.0; }


x86 assembly (clang, -O0):
<half>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cvtsi2sdl (%rax),%xmm0
movsd  0xee0(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<half>:
cvtsi2sdl (%rdi),%xmm0
mulsd  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define double @half(i32* %0, i32* %1, i8* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i8*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = sitofp i32 %8 to double
%10 = fdiv double %9, 2.000000e+00
ret double %10
}

LLVM IR (-O2):
define double @half(i32* nocapture %0, i32* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = load i32, i32* %0
%5 = sitofp i32 %4 to double
%6 = fmul double %5, 5.000000e-01
ret double %6
}
/* Type definitions */
struct sync_track {
  int dummy;
};

/* Variables and functions */
int sync_find_key(struct sync_track const *, int);
int key_idx_floor(const struct sync_track *t, int row) {
  int idx = sync_find_key(t, row);
  if (idx < 0)
    idx = -idx - 2;
  return idx;
}


x86 assembly (clang, -O0):
<key_idx_floor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <sync_find_key@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    1143 <key_idx_floor+0x33>
xor    %eax,%eax
sub    -0x10(%rbp),%eax
sub    $0x2,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<key_idx_floor>:
push   %rax
call   1030 <sync_find_key@plt>
mov    $0xfffffffe,%ecx
sub    %eax,%ecx
test   %eax,%eax
cmovs  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sync_track = type { i32 }
define i32 @key_idx_floor(%struct.sync_track* %0, i32 %1) {
%3 = alloca %struct.sync_track*
%4 = alloca i32
%5 = alloca i32
store %struct.sync_track* %0, %struct.sync_track** %3
store i32 %1, i32* %4
%6 = load %struct.sync_track*, %struct.sync_track** %3
%7 = load i32, i32* %4
%8 = call i32 @sync_find_key(%struct.sync_track* %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i32, i32* %5
%13 = sub nsw i32 0, %12
%14 = sub nsw i32 %13, 2
store i32 %14, i32* %5
br label %15
15: ; preds = %11, %2
%16 = load i32, i32* %5
ret i32 %16
}

LLVM IR (-O2):
%struct.sync_track = type { i32 }
define i32 @key_idx_floor(%struct.sync_track* %0, i32 %1) {
%3 = tail call i32 @sync_find_key(%struct.sync_track* %0, i32 %1)
%4 = icmp slt i32 %3, 0
%5 = sub i32 -2, %3
%6 = select i1 %4, i32 %5, i32 %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  printf("Hello from C!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello from C!\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello from C!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
quit() { exit(0); }


x86 assembly (clang, -O0):
<quit>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<quit>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @quit() {
%1 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @quit() {
%1 = tail call i32 @exit(i32 0)
unreachable
}
unsigned xrop3_65_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = T ^ S;
  stk1 = D | stk2;
  stk1 = ~stk1;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_65_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_65_1_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
lea    (%rcx,%rdi,1),%eax
shl    $0x8,%esi
xor    %esi,%ecx
xor    $0xffffff00,%ecx
not    %eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_65_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %7
%23 = load i32, i32* %6
%24 = xor i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %5
%26 = load i32, i32* %9
%27 = or i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = xor i32 %28, -1
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %5
%35 = load i32, i32* %6
%36 = and i32 %34, %35
%37 = or i32 %33, %36
ret i32 %37
}

LLVM IR (-O2):
define i32 @xrop3_65_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = or i32 %4, %3
%6 = zext i8 %1 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = xor i32 %4, %7
%9 = xor i32 %8, -256
%10 = xor i32 %5, -1
%11 = and i32 %9, %10
%12 = or i32 %11, %3
ret i32 %12
}
int is_xmlws(char c) { return c > 0 && c <= 32; }


x86 assembly (clang, -O0):
<is_xmlws>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x2(%rbp)
jle    1129 <is_xmlws+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x20,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_xmlws>:
add    $0xff,%dil
xor    %eax,%eax
cmp    $0x20,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_xmlws(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 32
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_xmlws(i8 signext %0) {
%2 = add i8 %0, -1
%3 = icmp ult i8 %2, 32
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__25__IO__makeInput();
void Msp430GpioC__5__HplGeneralIO__makeInput(void) {
  HplMsp430GeneralIOP__25__IO__makeInput();
}


x86 assembly (clang, -O0):
<Msp430GpioC__5__HplGeneralIO__makeInput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__25__IO__makeInput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430GpioC__5__HplGeneralIO__makeInput>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__25__IO__makeInput@plt>

LLVM IR (-O0):
define void @Msp430GpioC__5__HplGeneralIO__makeInput() {
%1 = call i32 (...) @HplMsp430GeneralIOP__25__IO__makeInput()
ret void
}

LLVM IR (-O2):
define void @Msp430GpioC__5__HplGeneralIO__makeInput() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__25__IO__makeInput()
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void compat_be32enc(void *pp, uint32_t x) {
  uint8_t *p = (uint8_t *)pp;
  p[3] = x & 0xff;
  p[2] = (x >> 8) & 0xff;
  p[1] = (x >> 16) & 0xff;
  p[0] = (x >> 24) & 0xff;
}


x86 assembly (clang, -O0):
<compat_be32enc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0xc(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x10,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
sar    $0x18,%ecx
and    $0xff,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<compat_be32enc>:
mov    %esi,%eax
movzbl %al,%ecx
mov    %ecx,0xc(%rdi)
movzbl %ah,%ecx
mov    %ecx,0x8(%rdi)
mov    %esi,%ecx
shr    $0x10,%ecx
movzbl %cl,%ecx
mov    %ecx,0x4(%rdi)
shr    $0x18,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @compat_be32enc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* %4
%9 = and i32 %8, 255
%10 = load i32*, i32** %5
%11 = getelementptr inbounds i32, i32* %10, i64 3
store i32 %9, i32* %11
%12 = load i32, i32* %4
%13 = ashr i32 %12, 8
%14 = and i32 %13, 255
%15 = load i32*, i32** %5
%16 = getelementptr inbounds i32, i32* %15, i64 2
store i32 %14, i32* %16
%17 = load i32, i32* %4
%18 = ashr i32 %17, 16
%19 = and i32 %18, 255
%20 = load i32*, i32** %5
%21 = getelementptr inbounds i32, i32* %20, i64 1
store i32 %19, i32* %21
%22 = load i32, i32* %4
%23 = ashr i32 %22, 24
%24 = and i32 %23, 255
%25 = load i32*, i32** %5
%26 = getelementptr inbounds i32, i32* %25, i64 0
store i32 %24, i32* %26
ret void
}

LLVM IR (-O2):
define void @compat_be32enc(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = and i32 %1, 255
%5 = getelementptr inbounds i8, i8* %0, i64 12
%6 = bitcast i8* %5 to i32*
store i32 %4, i32* %6
%7 = lshr i32 %1, 8
%8 = and i32 %7, 255
%9 = getelementptr inbounds i8, i8* %0, i64 8
%10 = bitcast i8* %9 to i32*
store i32 %8, i32* %10
%11 = lshr i32 %1, 16
%12 = and i32 %11, 255
%13 = getelementptr inbounds i8, i8* %0, i64 4
%14 = bitcast i8* %13 to i32*
store i32 %12, i32* %14
%15 = lshr i32 %1, 24
store i32 %15, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ arithmetics();
void main() {
  arithmetics();
  ;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <arithmetics@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <arithmetics@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @arithmetics()
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @arithmetics()
ret void
}
void XSyncAwait() {}


x86 assembly (clang, -O0):
<XSyncAwait>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSyncAwait>:
ret

LLVM IR (-O0):
define void @XSyncAwait() {
ret void
}

LLVM IR (-O2):
define void @XSyncAwait() {
ret void
}
void rop3_233_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  unsigned char stk4;
  stk4 = *D & S;
  stk4 = ~stk4;
  stk3 = T & stk4;
  stk2 = S ^ stk3;
  stk1 = *D ^ stk2;
  stk1 = ~stk1;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_233_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xe(%rbp)
movzbl -0xe(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xe(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xe(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xd(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_233_0_0>:
mov    (%rdi),%al
mov    %eax,%ecx
and    %sil,%cl
not    %cl
and    %dl,%cl
xor    %sil,%al
xor    %cl,%al
not    %al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_233_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = load i8, i8* %5
%15 = zext i8 %14 to i32
%16 = and i32 %13, %15
%17 = trunc i32 %16 to i8
store i8 %17, i8* %10
%18 = load i8, i8* %10
%19 = zext i8 %18 to i32
%20 = xor i32 %19, -1
%21 = trunc i32 %20 to i8
store i8 %21, i8* %10
%22 = load i8, i8* %6
%23 = zext i8 %22 to i32
%24 = load i8, i8* %10
%25 = zext i8 %24 to i32
%26 = and i32 %23, %25
%27 = trunc i32 %26 to i8
store i8 %27, i8* %9
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = load i8, i8* %9
%31 = zext i8 %30 to i32
%32 = xor i32 %29, %31
%33 = trunc i32 %32 to i8
store i8 %33, i8* %8
%34 = load i8*, i8** %4
%35 = load i8, i8* %34
%36 = zext i8 %35 to i32
%37 = load i8, i8* %8
%38 = zext i8 %37 to i32
%39 = xor i32 %36, %38
%40 = trunc i32 %39 to i8
store i8 %40, i8* %7
%41 = load i8, i8* %7
%42 = zext i8 %41 to i32
%43 = xor i32 %42, -1
%44 = trunc i32 %43 to i8
store i8 %44, i8* %7
%45 = load i8, i8* %7
%46 = load i8*, i8** %4
store i8 %45, i8* %46
ret void
}

LLVM IR (-O2):
define void @rop3_233_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = and i8 %4, %1
%6 = xor i8 %5, -1
%7 = and i8 %6, %2
%8 = xor i8 %4, %1
%9 = xor i8 %8, %7
%10 = xor i8 %9, -1
store i8 %10, i8* %0
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int hash64_partial_unicode(int /*<<< orphan*/ const *, size_t);
uint64_t hash64_partial_unicode_suffix(const uint32_t *p, size_t len,
                                       size_t suffix_len, size_t min_stem) {
  if (min_stem + suffix_len > len)
    return 0xb9d9d9fb4440f7bbULL;
  return hash64_partial_unicode(p + (len - suffix_len), suffix_len);
}


x86 assembly (clang, -O0):
<hash64_partial_unicode_suffix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x28(%rbp),%rax
add    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jbe    1146 <hash64_partial_unicode_suffix+0x36>
movl   $0x4440f7bb,-0x4(%rbp)
jmp    1165 <hash64_partial_unicode_suffix+0x55>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rax
sub    -0x20(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
mov    -0x20(%rbp),%rsi
call   1030 <hash64_partial_unicode@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash64_partial_unicode_suffix>:
add    %rdx,%rcx
cmp    %rsi,%rcx
jbe    111e <hash64_partial_unicode_suffix+0xe>
mov    $0x4440f7bb,%eax
ret
sub    %rdx,%rsi
lea    (%rdi,%rsi,4),%rdi
mov    %rdx,%rsi
jmp    1030 <hash64_partial_unicode@plt>

LLVM IR (-O0):
define i32 @hash64_partial_unicode_suffix(i32* %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
store i32* %0, i32** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i64 %3, i64* %9
%10 = load i64, i64* %9
%11 = load i64, i64* %8
%12 = add i64 %10, %11
%13 = load i64, i64* %7
%14 = icmp ugt i64 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %4
store i32 1145108411, i32* %5
br label %24
16: ; preds = %4
%17 = load i32*, i32** %6
%18 = load i64, i64* %7
%19 = load i64, i64* %8
%20 = sub i64 %18, %19
%21 = getelementptr inbounds i32, i32* %17, i64 %20
%22 = load i64, i64* %8
%23 = call i32 @hash64_partial_unicode(i32* %21, i64 %22)
store i32 %23, i32* %5
br label %24
24: ; preds = %16, %15
%25 = load i32, i32* %5
ret i32 %25
}

LLVM IR (-O2):
define i32 @hash64_partial_unicode_suffix(i32* %0, i64 %1, i64 %2, i64 %3) {
%5 = add i64 %3, %2
%6 = icmp ugt i64 %5, %1
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = sub i64 %1, %2
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = tail call i32 @hash64_partial_unicode(i32* %9, i64 %2)
br label %11
11: ; preds = %4, %7
%12 = phi i32 [ %10, %7 ], [ 1145108411, %4 ]
ret i32 %12
}
/* Variables and functions */
double floor(double);
double time_convert_hour(double hundredth) { return floor(hundredth); }


x86 assembly (clang, -O0):
<time_convert_hour>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_convert_hour>:
jmp    1030 <floor@plt>

LLVM IR (-O0):
define double @time_convert_hour(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.floor.f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @time_convert_hour(double %0) {
%2 = tail call double @llvm.floor.f64(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void printInt(void *a) { printf("%d\n", *((int *)a)); }


x86 assembly (clang, -O0):
<printInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printInt>:
mov    (%rdi),%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @printInt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @printInt(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M303_f(char *s) {
  debug("M303_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M303_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M303_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M303_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M303_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M303_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M303_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
int slow_multiply(x, y) {
  int i, j, z;
  for (i = 0, z = 0; i < x; i++)
    z = z + y;
  return z;
}


x86 assembly (clang, -O0):
<slow_multiply>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    113b <slow_multiply+0x3b>
mov    -0x14(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1118 <slow_multiply+0x18>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<slow_multiply>:
imul   %edi,%esi
xor    %eax,%eax
test   %edi,%edi
cmovg  %esi,%eax
ret

LLVM IR (-O0):
define i32 @slow_multiply(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %7
br label %8
8: ; preds = %16, %2
%9 = load i32, i32* %5
%10 = load i32, i32* %3
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %19
12: ; preds = %8
%13 = load i32, i32* %7
%14 = load i32, i32* %4
%15 = add nsw i32 %13, %14
store i32 %15, i32* %7
br label %16
16: ; preds = %12
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %8
19: ; preds = %8
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
define i32 @slow_multiply(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 0
%4 = mul i32 %1, %0
%5 = select i1 %3, i32 %4, i32 0
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ DIR;

/* Variables and functions */
int closedir(int /*<<< orphan*/ *);
int lisp_closedir(DIR *dir) { return closedir(dir); }


x86 assembly (clang, -O0):
<lisp_closedir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <closedir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lisp_closedir>:
jmp    1030 <closedir@plt>

LLVM IR (-O0):
define i32 @lisp_closedir(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @closedir(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @lisp_closedir(i32* nocapture %0) {
%2 = tail call i32 @closedir(i32* %0)
ret i32 %2
}
/* Type definitions */
struct rlimit {
  int dummy;
};

/* Variables and functions */
scalar_t__ getrlimit(int, struct rlimit *);
int /*<<< orphan*/ shutdown(int, char *, int);
void getr(int type, struct rlimit *rlim) {
  if (getrlimit(type, rlim)) {
    shutdown(6, "getrlimit()", 170 - 1);
  }
}


x86 assembly (clang, -O0):
<getr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <getrlimit@plt>
cmp    $0x0,%rax
je     115b <getr+0x3b>
mov    $0x6,%edi
lea    0xeaf(%rip),%rsi
mov    $0xa9,%edx
call   1030 <shutdown@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getr>:
push   %rax
call   1040 <getrlimit@plt>
test   %rax,%rax
je     1142 <getr+0x22>
lea    0xece(%rip),%rsi
mov    $0x6,%edi
mov    $0xa9,%edx
pop    %rax
jmp    1030 <shutdown@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.rlimit = type { i32 }
@.str = [12 x i8] c"getrlimit()\00"
define void @getr(i32 %0, %struct.rlimit* %1) {
%3 = alloca i32
%4 = alloca %struct.rlimit*
store i32 %0, i32* %3
store %struct.rlimit* %1, %struct.rlimit** %4
%5 = load i32, i32* %3
%6 = load %struct.rlimit*, %struct.rlimit** %4
%7 = call i64 @getrlimit(i32 %5, %struct.rlimit* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @shutdown(i32 6, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 169)
br label %11
11: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
%struct.rlimit = type { i32 }
@.str = [12 x i8] c"getrlimit()\00"
define void @getr(i32 %0, %struct.rlimit* %1) {
%3 = tail call i64 @getrlimit(i32 %0, %struct.rlimit* %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @shutdown(i32 6, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 169)
br label %7
7: ; preds = %5, %2
ret void
}
/* Type definitions */
typedef scalar_t__ int_least64_t;

/* Variables and functions */
bool SHAREMIND_SET_KEY_EQUALS_int_least64_t(int_least64_t const k1,
                                            int_least64_t const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_SET_KEY_EQUALS_int_least64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_SET_KEY_EQUALS_int_least64_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_SET_KEY_EQUALS_int_least64_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_SET_KEY_EQUALS_int_least64_t(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int nfactors(long long);
int /*<<< orphan*/ printf(char *, long long);
int main() {
  long long t = 0;
  long i;
  for (i = 1; nfactors(t) < 500; ++i) {
    t += i;
  }
  printf("%lld\n", t);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x1,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <nfactors@plt>
cmp    $0x1f4,%eax
jge    1170 <main+0x50>
mov    -0x18(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    113f <main+0x1f>
mov    -0x10(%rbp),%rsi
lea    0xe85(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %r14d,%r14d
xor    %edi,%edi
call   1030 <nfactors@plt>
cmp    $0x1f3,%eax
jg     1156 <main+0x36>
mov    $0x1,%ebx
xor    %r14d,%r14d
nopl   (%rax)
add    %rbx,%r14
add    $0x1,%rbx
mov    %r14,%rdi
call   1030 <nfactors@plt>
cmp    $0x1f4,%eax
jl     1140 <main+0x20>
lea    0xea3(%rip),%rdi
mov    %r14,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%lld\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
store i32 0, i32* %1
store i64 0, i64* %2
store i64 1, i64* %3
br label %4
4: ; preds = %12, %0
%5 = load i64, i64* %2
%6 = call i32 @nfactors(i64 %5)
%7 = icmp slt i32 %6, 500
br i1 %7, label %8, label %15
8: ; preds = %4
%9 = load i64, i64* %3
%10 = load i64, i64* %2
%11 = add nsw i64 %10, %9
store i64 %11, i64* %2
br label %12
12: ; preds = %8
%13 = load i64, i64* %3
%14 = add nsw i64 %13, 1
store i64 %14, i64* %3
br label %4
15: ; preds = %4
%16 = load i64, i64* %2
%17 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 %16)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%lld\0A\00"
define i32 @main() {
%1 = tail call i32 @nfactors(i64 0)
%2 = icmp slt i32 %1, 500
br i1 %2, label %3, label %10
3: ; preds = %0, %3
%4 = phi i64 [ %7, %3 ], [ 1, %0 ]
%5 = phi i64 [ %6, %3 ], [ 0, %0 ]
%6 = add nuw nsw i64 %4, %5
%7 = add nuw nsw i64 %4, 1
%8 = tail call i32 @nfactors(i64 %6)
%9 = icmp slt i32 %8, 500
br i1 %9, label %3, label %10
10: ; preds = %3, %0
%11 = phi i64 [ 0, %0 ], [ %6, %3 ]
%12 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i64 %11)
ret i32 0
}
void gnttab_end_access() {}


x86 assembly (clang, -O0):
<gnttab_end_access>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gnttab_end_access>:
ret

LLVM IR (-O0):
define void @gnttab_end_access() {
ret void
}

LLVM IR (-O2):
define void @gnttab_end_access() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ key_t;

/* Variables and functions */
int IPC_CREAT;
int semget(int /*<<< orphan*/, int, int);
int get_semaphore_id2(void) {
  int sem_id;
  sem_id = semget((key_t)(3556), 2, 0666 | IPC_CREAT);
  return sem_id;
}


x86 assembly (clang, -O0):
<get_semaphore_id2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec1(%rip),%rax
mov    (%rax),%edx
or     $0x1b6,%edx
mov    $0xde4,%edi
mov    $0x2,%esi
call   1030 <semget@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_semaphore_id2>:
mov    0x2ec9(%rip),%rax
mov    $0x1b6,%edx
or     (%rax),%edx
mov    $0xde4,%edi
mov    $0x2,%esi
jmp    1030 <semget@plt>

LLVM IR (-O0):
@IPC_CREAT = global i32 0
define i32 @get_semaphore_id2() {
%1 = alloca i32
%2 = load i32, i32* @IPC_CREAT
%3 = or i32 438, %2
%4 = call i32 @semget(i32 3556, i32 2, i32 %3)
store i32 %4, i32* %1
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
@IPC_CREAT = global i32 0
define i32 @get_semaphore_id2() {
%1 = load i32, i32* @IPC_CREAT
%2 = or i32 %1, 438
%3 = tail call i32 @semget(i32 3556, i32 2, i32 %2)
ret i32 %3
}
void delay(register unsigned int n) {
  __asm__ __volatile__("1: \n"
                       " dec %[n] \n"
                       " jne 1b \n"
                       : [n] "+r"(n));
}


x86 assembly (clang, -O0):
<delay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
dec    %eax
jne    110a <delay+0xa>
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay>:
dec    %edi
jne    1100 <delay>
ret

LLVM IR (-O0):
define void @delay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 asm sideeffect "1: \0A dec $0 \0A jne 1b \0A", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %3)
store i32 %4, i32* %2
ret void
}

LLVM IR (-O2):
define void @delay(i32 %0) {
%2 = tail call i32 asm sideeffect "1: \0A dec $0 \0A jne 1b \0A", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret void
}
/* Type definitions */
struct pollfd {
  int dummy;
};
typedef unsigned long nfds_t;

/* Variables and functions */
int /*<<< orphan*/ __chk_fail();
int __poll(struct pollfd *, unsigned long, int);
int __poll_chk(struct pollfd *fds, nfds_t nfds, int timeout,
               long unsigned int fdslen) {
  if (fdslen / sizeof(*fds) < nfds)
    __chk_fail();
  return __poll(fds, nfds, timeout);
}


x86 assembly (clang, -O0):
<__poll_chk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
shr    $0x2,%rax
cmp    -0x10(%rbp),%rax
jae    1150 <__poll_chk+0x30>
mov    $0x0,%al
call   1040 <__chk_fail@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <__poll@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__poll_chk>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
shr    $0x2,%rcx
cmp    %rsi,%rcx
jae    113d <__poll_chk+0x1d>
xor    %eax,%eax
call   1040 <__chk_fail@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <__poll@plt>

LLVM IR (-O0):
%struct.pollfd = type { i32 }
define i32 @__poll_chk(%struct.pollfd* %0, i64 %1, i32 %2, i64 %3) {
%5 = alloca %struct.pollfd*
%6 = alloca i64
%7 = alloca i32
%8 = alloca i64
store %struct.pollfd* %0, %struct.pollfd** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
store i64 %3, i64* %8
%9 = load i64, i64* %8
%10 = udiv i64 %9, 4
%11 = load i64, i64* %6
%12 = icmp ult i64 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %4
%14 = call i32 (...) @__chk_fail()
br label %15
15: ; preds = %13, %4
%16 = load %struct.pollfd*, %struct.pollfd** %5
%17 = load i64, i64* %6
%18 = load i32, i32* %7
%19 = call i32 @__poll(%struct.pollfd* %16, i64 %17, i32 %18)
ret i32 %19
}

LLVM IR (-O2):
%struct.pollfd = type { i32 }
define i32 @__poll_chk(%struct.pollfd* %0, i64 %1, i32 %2, i64 %3) {
%5 = lshr i64 %3, 2
%6 = icmp ult i64 %5, %1
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i32 (...) @__chk_fail()
br label %9
9: ; preds = %7, %4
%10 = tail call i32 @__poll(%struct.pollfd* %0, i64 %1, i32 %2)
ret i32 %10
}
int Gtermgraphics(void) { return 0; }


x86 assembly (clang, -O0):
<Gtermgraphics>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Gtermgraphics>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Gtermgraphics() {
ret i32 0
}

LLVM IR (-O2):
define i32 @Gtermgraphics() {
ret i32 0
}
/* Type definitions */
typedef char *uint16_t;

/* Variables and functions */
uint16_t __attribute__((always_)) inw(uint16_t port) {
  uint16_t data;
  asm volatile("inw %w1, %w0" : "=a"(data) : "Nd"(port));
  return data;
}


x86 assembly (clang, -O0):
<inw>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
in     (%dx),%ax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inw>:
mov    %rdi,%rdx
in     (%dx),%ax
ret

LLVM IR (-O0):
define i8* @inw(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* asm sideeffect "inw ${1:w}, ${0:w}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define i8* @inw(i8* %0) {
%2 = tail call i8* asm sideeffect "inw ${1:w}, ${0:w}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}