xunge/DecIR huggingface dataset:
/* Type definitions */
struct gheap_ctx {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _gheap_pop_max_item(struct gheap_ctx const *const,
                                       void *const, size_t);
void gheap_sort_heap(const struct gheap_ctx *const ctx, void *const base,
                     const size_t heap_size) {
  for (size_t i = heap_size; i > 1; --i) {
    _gheap_pop_max_item(ctx, base, i - 1);
  }
}


x86 assembly (clang, -O0):
<gheap_sort_heap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x1,-0x20(%rbp)
jbe    115d <gheap_sort_heap+0x4d>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
sub    $0x1,%rdx
call   1030 <_gheap_pop_max_item@plt>
mov    -0x20(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x20(%rbp)
jmp    112c <gheap_sort_heap+0x1c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gheap_sort_heap>:
push   %r15
push   %r14
push   %rbx
cmp    $0x2,%rdx
jb     1148 <gheap_sort_heap+0x38>
mov    %rdx,%rbx
mov    %rsi,%r14
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0xffffffffffffffff,%rbx
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <_gheap_pop_max_item@plt>
cmp    $0x1,%rbx
ja     1130 <gheap_sort_heap+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.gheap_ctx = type { i32 }
define void @gheap_sort_heap(%struct.gheap_ctx* %0, i8* %1, i64 %2) {
%4 = alloca %struct.gheap_ctx*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store %struct.gheap_ctx* %0, %struct.gheap_ctx** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i64, i64* %6
store i64 %8, i64* %7
br label %9
9: ; preds = %18, %3
%10 = load i64, i64* %7
%11 = icmp ugt i64 %10, 1
br i1 %11, label %12, label %21
12: ; preds = %9
%13 = load %struct.gheap_ctx*, %struct.gheap_ctx** %4
%14 = load i8*, i8** %5
%15 = load i64, i64* %7
%16 = sub i64 %15, 1
%17 = call i32 @_gheap_pop_max_item(%struct.gheap_ctx* %13, i8* %14, i64 %16)
br label %18
18: ; preds = %12
%19 = load i64, i64* %7
%20 = add i64 %19, -1
store i64 %20, i64* %7
br label %9
21: ; preds = %9
ret void
}

LLVM IR (-O2):
%struct.gheap_ctx = type { i32 }
define void @gheap_sort_heap(%struct.gheap_ctx* %0, i8* %1, i64 %2) {
%4 = icmp ugt i64 %2, 1
br i1 %4, label %6, label %5
5: ; preds = %6, %3
ret void
6: ; preds = %3, %6
%7 = phi i64 [ %8, %6 ], [ %2, %3 ]
%8 = add i64 %7, -1
%9 = tail call i32 @_gheap_pop_max_item(%struct.gheap_ctx* %0, i8* %1, i64 %8)
%10 = icmp ugt i64 %8, 1
br i1 %10, label %6, label %5
}
void info(char *fmt, ...) {}


x86 assembly (clang, -O0):
<info>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<info>:
ret

LLVM IR (-O0):
define void @info(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @info(i8* nocapture %0, ...) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_latencytop(int /*<<< orphan*/);
void disable_latencytop(void) { set_latencytop(0); }


x86 assembly (clang, -O0):
<disable_latencytop>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <set_latencytop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_latencytop>:
xor    %edi,%edi
jmp    1030 <set_latencytop@plt>

LLVM IR (-O0):
define void @disable_latencytop() {
%1 = call i32 @set_latencytop(i32 0)
ret void
}

LLVM IR (-O2):
define void @disable_latencytop() {
%1 = tail call i32 @set_latencytop(i32 0)
ret void
}
/* Variables and functions */
#define AF_INET 129
#define AF_INET6 128
int /*<<< orphan*/ g_return_val_if_reached(char);
char nm_utils_addr_family_to_char(int addr_family) {
  switch (addr_family) {
  case AF_INET:
    return '4';
  case AF_INET6:
    return '6';
  }
  g_return_val_if_reached('?');
}


x86 assembly (clang, -O0):
<nm_utils_addr_family_to_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x80,%eax
je     114d <nm_utils_addr_family_to_char+0x3d>
jmp    1131 <nm_utils_addr_family_to_char+0x21>
mov    -0xc(%rbp),%eax
sub    $0x81,%eax
jne    1156 <nm_utils_addr_family_to_char+0x46>
jmp    1144 <nm_utils_addr_family_to_char+0x34>
movb   $0x34,-0x1(%rbp)
jmp    1160 <nm_utils_addr_family_to_char+0x50>
movb   $0x36,-0x1(%rbp)
jmp    1160 <nm_utils_addr_family_to_char+0x50>
mov    $0x3f,%edi
call   1030 <g_return_val_if_reached@plt>
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nm_utils_addr_family_to_char>:
cmp    $0x81,%edi
je     1123 <nm_utils_addr_family_to_char+0x13>
cmp    $0x80,%edi
jne    1126 <nm_utils_addr_family_to_char+0x16>
mov    $0x36,%al
ret
mov    $0x34,%al
ret
push   %rax
mov    $0x3f,%edi
call   1030 <g_return_val_if_reached@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define signext i8 @nm_utils_addr_family_to_char(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 129, label %5
i32 128, label %6
]
5: ; preds = %1
store i8 52, i8* %2
br label %9
6: ; preds = %1
store i8 54, i8* %2
br label %9
7: ; preds = %1
%8 = call i32 @g_return_val_if_reached(i8 signext 63)
br label %9
9: ; preds = %7, %6, %5
%10 = load i8, i8* %2
ret i8 %10
}

LLVM IR (-O2):
define signext i8 @nm_utils_addr_family_to_char(i32 %0) {
switch i32 %0, label %3 [
i32 129, label %5
i32 128, label %2
]
2: ; preds = %1
br label %5
3: ; preds = %1
%4 = tail call i32 @g_return_val_if_reached(i8 signext 63)
br label %5
5: ; preds = %1, %3, %2
%6 = phi i8 [ undef, %3 ], [ 54, %2 ], [ 52, %1 ]
ret i8 %6
}
int test_imm_02int16_mem(short *val) {
  return ((*val) & (0x02 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_02int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x2,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_02int16_mem>:
testb  $0x2,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_02int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 2
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_02int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 2
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void double_to_us(double x, unsigned short *p) { p[3] = x; }


x86 assembly (clang, -O0):
<double_to_us>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
cvttsd2si -0x8(%rbp),%eax
mov    %ax,%cx
mov    -0x10(%rbp),%rax
mov    %cx,0x6(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_to_us>:
cvttsd2si %xmm0,%eax
mov    %ax,0x6(%rdi)
ret

LLVM IR (-O0):
define void @double_to_us(double %0, i16* %1) {
%3 = alloca double
%4 = alloca i16*
store double %0, double* %3
store i16* %1, i16** %4
%5 = load double, double* %3
%6 = fptoui double %5 to i16
%7 = load i16*, i16** %4
%8 = getelementptr inbounds i16, i16* %7, i64 3
store i16 %6, i16* %8
ret void
}

LLVM IR (-O2):
define void @double_to_us(double %0, i16* nocapture writeonly %1) {
%3 = fptoui double %0 to i16
%4 = getelementptr inbounds i16, i16* %1, i64 3
store i16 %3, i16* %4
ret void
}
/* Variables and functions */
double fabs(double);
double time_clip(double t) {
  if (fabs(t) > 8.64e15)
    return 0;
  return t;
}


x86 assembly (clang, -O0):
<time_clip>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movaps 0xefb(%rip),%xmm1
pand   %xmm1,%xmm0
movsd  0xedf(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1138 <time_clip+0x38>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1142 <time_clip+0x42>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_clip>:
movapd 0xef8(%rip),%xmm2
andpd  %xmm0,%xmm2
movsd  0xefc(%rip),%xmm1
cmpltsd %xmm2,%xmm1
andnpd %xmm0,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @time_clip(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = call double @llvm.fabs.f64(double %4)
%6 = fcmp ogt double %5, 8.640000e+15
br i1 %6, label %7, label %8
7: ; preds = %1
store double 0.000000e+00, double* %2
br label %10
8: ; preds = %1
%9 = load double, double* %3
store double %9, double* %2
br label %10
10: ; preds = %8, %7
%11 = load double, double* %2
ret double %11
}

LLVM IR (-O2):
define double @time_clip(double %0) {
%2 = tail call double @llvm.fabs.f64(double %0)
%3 = fcmp ogt double %2, 8.640000e+15
%4 = select i1 %3, double 0.000000e+00, double %0
ret double %4
}
A0AX1(r0, r1, x0, x1, p0, p1) unsigned short r0, r1;
unsigned short *p0, *p1;
{
  if ((*((unsigned short *)10000000)) <= (((unsigned short *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<A0AX1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    $0x989680,%eax
movzwl (%rax),%eax
movslq -0x10(%rbp),%rdx
mov    $0xa98ac7,%ecx
movzwl (%rcx,%rdx,2),%ecx
cmp    %ecx,%eax
jg     1148 <A0AX1+0x48>
movl   $0x1,-0x4(%rbp)
jmp    114f <A0AX1+0x4f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<A0AX1>:
movzwl 0x989680,%edx
movslq %ecx,%rcx
xor    %eax,%eax
cmp    0xa98ac7(%rcx,%rcx,1),%dx
setbe  %al
ret

LLVM IR (-O0):
define i32 @A0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16, i16* inttoptr (i64 10000000 to i16*)
%17 = zext i16 %16 to i32
%18 = load i32, i32* %11
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %19
%21 = load i16, i16* %20
%22 = zext i16 %21 to i32
%23 = icmp sle i32 %17, %22
br i1 %23, label %24, label %25
24: ; preds = %6
store i32 1, i32* %7
br label %26
25: ; preds = %6
store i32 0, i32* %7
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %7
ret i32 %27
}

LLVM IR (-O2):
define i32 @A0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
%7 = load i16, i16* inttoptr (i64 10000000 to i16*)
%8 = sext i32 %3 to i64
%9 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %8
%10 = load i16, i16* %9
%11 = icmp ule i16 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ ICPrintMamaPapa(int, int);
int main(int argc, const char *argv[]) {
  ICPrintMamaPapa(2, 4);
  ICPrintMamaPapa(7, 5);
  ICPrintMamaPapa(0, 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x2,%edi
mov    $0x4,%esi
call   1030 <ICPrintMamaPapa@plt>
mov    $0x7,%edi
mov    $0x5,%esi
call   1030 <ICPrintMamaPapa@plt>
xor    %esi,%esi
mov    %esi,%edi
call   1030 <ICPrintMamaPapa@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
mov    $0x4,%esi
call   1030 <ICPrintMamaPapa@plt>
mov    $0x7,%edi
mov    $0x5,%esi
call   1030 <ICPrintMamaPapa@plt>
xor    %edi,%edi
xor    %esi,%esi
call   1030 <ICPrintMamaPapa@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @ICPrintMamaPapa(i32 2, i32 4)
%7 = call i32 @ICPrintMamaPapa(i32 7, i32 5)
%8 = call i32 @ICPrintMamaPapa(i32 0, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @ICPrintMamaPapa(i32 2, i32 4)
%4 = tail call i32 @ICPrintMamaPapa(i32 7, i32 5)
%5 = tail call i32 @ICPrintMamaPapa(i32 0, i32 0)
ret i32 0
}
number(ppa) char **ppa;
{
  int n;
  register char *pa;
  pa = *ppa;
  n = 0;
  while (isdigit(*pa)) {
    n = n * 10 + *pa - '0';
    *ppa = pa++;
  }
  return (n);
}


x86 assembly (clang, -O0):
<number>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
je     1171 <number+0x61>
imul   $0xa,-0xc(%rbp),%eax
mov    -0x18(%rbp),%rcx
movsbl (%rcx),%ecx
add    %ecx,%eax
sub    $0x30,%eax
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rcx
mov    %rcx,%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
jmp    112e <number+0x1e>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<number>:
mov    (%rdi),%rdx
movsbl (%rdx),%ecx
lea    -0x30(%rcx),%esi
xor    %eax,%eax
cmp    $0x9,%esi
ja     113c <number+0x3c>
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    (%rax,%rax,4),%eax
lea    (%rcx,%rax,2),%eax
add    $0xffffffd0,%eax
mov    %rdx,(%rdi)
movsbl 0x1(%rdx),%ecx
add    $0x1,%rdx
lea    -0x30(%rcx),%esi
cmp    $0xa,%esi
jb     1120 <number+0x20>
ret

LLVM IR (-O0):
define i32 @number(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
%4 = alloca i8*
store i8** %0, i8*** %2
%5 = load i8**, i8*** %2
%6 = load i8*, i8** %5
store i8* %6, i8** %4
store i32 0, i32* %3
br label %7
7: ; preds = %13, %1
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = call i32 @isdigit(i32 %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %24
13: ; preds = %7
%14 = load i32, i32* %3
%15 = mul nsw i32 %14, 10
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = add nsw i32 %15, %18
%20 = sub nsw i32 %19, 48
store i32 %20, i32* %3
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %4
%23 = load i8**, i8*** %2
store i8* %21, i8** %23
br label %7
24: ; preds = %7
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @number(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = add nsw i32 %4, -48
%6 = icmp ult i32 %5, 10
br i1 %6, label %7, label %19
7: ; preds = %1, %7
%8 = phi i32 [ %16, %7 ], [ %4, %1 ]
%9 = phi i8* [ %14, %7 ], [ %2, %1 ]
%10 = phi i32 [ %13, %7 ], [ 0, %1 ]
%11 = mul nsw i32 %10, 10
%12 = add nsw i32 %8, -48
%13 = add i32 %12, %11
%14 = getelementptr inbounds i8, i8* %9, i64 1
store i8* %9, i8** %0
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = add nsw i32 %16, -48
%18 = icmp ult i32 %17, 10
br i1 %18, label %7, label %19
19: ; preds = %7, %1
%20 = phi i32 [ 0, %1 ], [ %13, %7 ]
ret i32 %20
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t psector_Read_QspiAppSearchGranularity(void) {
  uint32_t (*p_psector_Read_QspiAppSearchGranularity)(void);
  p_psector_Read_QspiAppSearchGranularity = (uint32_t(*)(void))0x03005305U;
  return p_psector_Read_QspiAppSearchGranularity();
}


x86 assembly (clang, -O0):
<psector_Read_QspiAppSearchGranularity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3005305,%eax
mov    %rax,-0x8(%rbp)
call   *-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psector_Read_QspiAppSearchGranularity>:
mov    $0x3005305,%eax
jmp    *%rax

LLVM IR (-O0):
define i32 @psector_Read_QspiAppSearchGranularity() {
%1 = alloca i32 ()*
store i32 ()* inttoptr (i64 50352901 to i32 ()*), i32 ()** %1
%2 = load i32 ()*, i32 ()** %1
%3 = call i32 %2()
ret i32 %3
}

LLVM IR (-O2):
define i32 @psector_Read_QspiAppSearchGranularity() {
%1 = tail call i32 inttoptr (i64 50352901 to i32 ()*)()
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int /*<<< orphan*/ printA(int *, int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ system(char *);
int sample2(void) {
  int a[][4] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12};
  printA((int *)a, sizeof(a) / sizeof(a[0][0]));
  printf("\n");
  system("pause");
  return 0;
}


x86 assembly (clang, -O0):
<sample2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
lea    -0x30(%rbp),%rdi
lea    0xead(%rip),%rsi
mov    $0x30,%edx
call   1060 <memcpy@plt>
lea    -0x30(%rbp),%rdi
mov    $0xc,%esi
call   1050 <printA@plt>
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
lea    0xeb4(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sample2>:
sub    $0x38,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xec9(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xead(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0xc,%esi
call   1050 <printA@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
lea    0xebb(%rip),%rdi
call   1040 <system@plt>
xor    %eax,%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.sample2.a = [3 x [4 x i32]] [[4 x i32] [i32 1, i32 2, i32 3, i32 4], [4 x i32] [i32 5, i32 6, i32 7, i32 8], [4 x i32] [i32 9, i32 10, i32 11, i32 12]]
@.str = [2 x i8] c"\0A\00"
@.str.1 = [6 x i8] c"pause\00"
define i32 @sample2() {
%1 = alloca [3 x [4 x i32]]
%2 = bitcast [3 x [4 x i32]]* %1 to i8*
%3 = getelementptr inbounds [3 x [4 x i32]], [3 x [4 x i32]]* %1, i64 0, i64 0
%4 = bitcast [4 x i32]* %3 to i32*
%5 = call i32 @printA(i32* %4, i32 12)
%6 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@__const.sample2.a = [3 x [4 x i32]] [[4 x i32] [i32 1, i32 2, i32 3, i32 4], [4 x i32] [i32 5, i32 6, i32 7, i32 8], [4 x i32] [i32 9, i32 10, i32 11, i32 12]]
@.str.1 = [6 x i8] c"pause\00"
define i32 @sample2() {
%1 = alloca [3 x [4 x i32]]
%2 = bitcast [3 x [4 x i32]]* %1 to i8*
%3 = getelementptr inbounds [3 x [4 x i32]], [3 x [4 x i32]]* %1, i64 0, i64 0, i64 0
%4 = call i32 @printA(i32* %3, i32 12)
%5 = call i32 @putchar(i32 10)
%6 = call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int U_WMRCORENONE_get(char *);
int U_WMRE0_get(void) { return U_WMRCORENONE_get("U_WMRE0"); }


x86 assembly (clang, -O0):
<U_WMRE0_get>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_get@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRE0_get>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_get@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMRE0\00"
define i32 @U_WMRE0_get() {
%1 = call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMRE0\00"
define i32 @U_WMRE0_get() {
%1 = tail call i32 @U_WMRCORENONE_get(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int nc__open_mp(char const *, int, int /*<<< orphan*/, size_t *, int *);
int nc__open(const char *path, int ioflags, size_t *chunksizehintp,
             int *ncid_ptr) {
  return nc__open_mp(path, ioflags, 0, chunksizehintp, ncid_ptr);
}


x86 assembly (clang, -O0):
<nc__open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
xor    %edx,%edx
call   1030 <nc__open_mp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nc__open>:
mov    %rcx,%r8
mov    %rdx,%rcx
xor    %edx,%edx
jmp    1030 <nc__open_mp@plt>

LLVM IR (-O0):
define i32 @nc__open(i8* %0, i32 %1, i64* %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i64*
%8 = alloca i32*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i64* %2, i64** %7
store i32* %3, i32** %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = load i64*, i64** %7
%12 = load i32*, i32** %8
%13 = call i32 @nc__open_mp(i8* %9, i32 %10, i32 0, i64* %11, i32* %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @nc__open(i8* %0, i32 %1, i64* %2, i32* %3) {
%5 = tail call i32 @nc__open_mp(i8* %0, i32 %1, i32 0, i64* %2, i32* %3)
ret i32 %5
}
/* Variables and functions */
char *dlerror();
const char *lt_dlerror(void) {
  const char *ret = dlerror();
  return ret;
}


x86 assembly (clang, -O0):
<lt_dlerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <dlerror@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lt_dlerror>:
xor    %eax,%eax
jmp    1030 <dlerror@plt>

LLVM IR (-O0):
define i8* @lt_dlerror() {
%1 = alloca i8*
%2 = call i8* (...) @dlerror()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define i8* @lt_dlerror() {
%1 = tail call i8* (...) @dlerror()
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ SetMotorsAndTime(int /*<<< orphan*/, int, int /*<<< orphan*/,
                                    int);
int second(int seq) {
  SetMotorsAndTime(0, 100, 0, 50);
  return 1;
}


x86 assembly (clang, -O0):
<second>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edx,%edx
mov    $0x64,%esi
mov    $0x32,%ecx
mov    %edx,%edi
call   1030 <SetMotorsAndTime@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<second>:
push   %rax
xor    %edi,%edi
mov    $0x64,%esi
xor    %edx,%edx
mov    $0x32,%ecx
call   1030 <SetMotorsAndTime@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @second(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @SetMotorsAndTime(i32 0, i32 100, i32 0, i32 50)
ret i32 1
}

LLVM IR (-O2):
define i32 @second(i32 %0) {
%2 = tail call i32 @SetMotorsAndTime(i32 0, i32 100, i32 0, i32 50)
ret i32 1
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ decode2(int *, int *);
int lookupB64(int);
void decode3(uint8_t *src, uint8_t *dst) {
  decode2(src, dst);
  dst++;
  *dst = (lookupB64(src[1]) & 0x0f) << 4;
  *dst |= (lookupB64(src[2]) & 0x3c) >> 2;
}


x86 assembly (clang, -O0):
<decode3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <decode2@plt>
mov    -0x10(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%edi
call   1040 <lookupB64@plt>
mov    %eax,%ecx
and    $0xf,%ecx
shl    $0x4,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%edi
call   1040 <lookupB64@plt>
mov    %eax,%ecx
and    $0x3c,%ecx
sar    $0x2,%ecx
mov    -0x10(%rbp),%rax
or     (%rax),%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode3>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <decode2@plt>
mov    0x4(%rbx),%edi
call   1040 <lookupB64@plt>
shl    $0x4,%eax
movzbl %al,%eax
mov    %eax,0x4(%r14)
mov    0x8(%rbx),%edi
call   1040 <lookupB64@plt>
shr    $0x2,%eax
and    $0xf,%eax
or     %eax,0x4(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @decode3(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @decode2(i32* %5, i32* %6)
%8 = load i32*, i32** %4
%9 = getelementptr inbounds i32, i32* %8, i32 1
store i32* %9, i32** %4
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 1
%12 = load i32, i32* %11
%13 = call i32 @lookupB64(i32 %12)
%14 = and i32 %13, 15
%15 = shl i32 %14, 4
%16 = load i32*, i32** %4
store i32 %15, i32* %16
%17 = load i32*, i32** %3
%18 = getelementptr inbounds i32, i32* %17, i64 2
%19 = load i32, i32* %18
%20 = call i32 @lookupB64(i32 %19)
%21 = and i32 %20, 60
%22 = ashr i32 %21, 2
%23 = load i32*, i32** %4
%24 = load i32, i32* %23
%25 = or i32 %24, %22
store i32 %25, i32* %23
ret void
}

LLVM IR (-O2):
define void @decode3(i32* %0, i32* %1) {
%3 = tail call i32 @decode2(i32* %0, i32* %1)
%4 = getelementptr inbounds i32, i32* %1, i64 1
%5 = getelementptr inbounds i32, i32* %0, i64 1
%6 = load i32, i32* %5
%7 = tail call i32 @lookupB64(i32 %6)
%8 = shl i32 %7, 4
%9 = and i32 %8, 240
store i32 %9, i32* %4
%10 = getelementptr inbounds i32, i32* %0, i64 2
%11 = load i32, i32* %10
%12 = tail call i32 @lookupB64(i32 %11)
%13 = lshr i32 %12, 2
%14 = and i32 %13, 15
%15 = load i32, i32* %4
%16 = or i32 %14, %15
store i32 %16, i32* %4
ret void
}
/* Type definitions */
struct isal_zstream {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ isal_deflate_icf_body_hash_hist_base(struct isal_zstream *);
void isal_deflate_icf_body_lvl1(struct isal_zstream *stream) {
  isal_deflate_icf_body_hash_hist_base(stream);
}


x86 assembly (clang, -O0):
<isal_deflate_icf_body_lvl1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <isal_deflate_icf_body_hash_hist_base@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isal_deflate_icf_body_lvl1>:
jmp    1030 <isal_deflate_icf_body_hash_hist_base@plt>

LLVM IR (-O0):
%struct.isal_zstream = type { i32 }
define void @isal_deflate_icf_body_lvl1(%struct.isal_zstream* %0) {
%2 = alloca %struct.isal_zstream*
store %struct.isal_zstream* %0, %struct.isal_zstream** %2
%3 = load %struct.isal_zstream*, %struct.isal_zstream** %2
%4 = call i32 @isal_deflate_icf_body_hash_hist_base(%struct.isal_zstream* %3)
ret void
}

LLVM IR (-O2):
%struct.isal_zstream = type { i32 }
define void @isal_deflate_icf_body_lvl1(%struct.isal_zstream* %0) {
%2 = tail call i32 @isal_deflate_icf_body_hash_hist_base(%struct.isal_zstream* %0)
ret void
}
int ull_compare(void *location1, void *location2) {
  unsigned long long int1 = *((unsigned long long *)location1);
  unsigned long long int2 = *((unsigned long long *)location2);
  if (int1 < int2) {
    return -1;
  } else if (int1 > int2) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<ull_compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jae    113c <ull_compare+0x3c>
movl   $0xffffffff,-0x4(%rbp)
jmp    115d <ull_compare+0x5d>
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jbe    1156 <ull_compare+0x56>
movl   $0x1,-0x4(%rbp)
jmp    115d <ull_compare+0x5d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ull_compare>:
mov    (%rdi),%rax
xor    %ecx,%ecx
cmp    (%rsi),%rax
seta   %cl
mov    $0xffffffff,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ull_compare(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
store i64 %10, i64* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i64*
%13 = load i64, i64* %12
store i64 %13, i64* %7
%14 = load i64, i64* %6
%15 = load i64, i64* %7
%16 = icmp ult i64 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %24
18: ; preds = %2
%19 = load i64, i64* %6
%20 = load i64, i64* %7
%21 = icmp ugt i64 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 1, i32* %3
br label %24
23: ; preds = %18
store i32 0, i32* %3
br label %24
24: ; preds = %23, %22, %17
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @ull_compare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp ult i64 %4, %6
%8 = icmp ugt i64 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
void cvcc_led_cc(void) {
  *(unsigned char *)0x5000 |= (1 << 3);
  *(unsigned char *)0x5002 |= (1 << 3);
}


x86 assembly (clang, -O0):
<cvcc_led_cc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5000,%eax
movzbl (%rax),%eax
or     $0x8,%eax
mov    %al,%cl
mov    $0x5000,%eax
mov    %cl,(%rax)
mov    $0x5002,%eax
movzbl (%rax),%eax
or     $0x8,%eax
mov    %al,%cl
mov    $0x5002,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cvcc_led_cc>:
orb    $0x8,0x5000
08
orb    $0x8,0x5002
08
ret

LLVM IR (-O0):
define void @cvcc_led_cc() {
%1 = load i8, i8* inttoptr (i64 20480 to i8*)
%2 = zext i8 %1 to i32
%3 = or i32 %2, 8
%4 = trunc i32 %3 to i8
store i8 %4, i8* inttoptr (i64 20480 to i8*)
%5 = load i8, i8* inttoptr (i64 20482 to i8*)
%6 = zext i8 %5 to i32
%7 = or i32 %6, 8
%8 = trunc i32 %7 to i8
store i8 %8, i8* inttoptr (i64 20482 to i8*)
ret void
}

LLVM IR (-O2):
define void @cvcc_led_cc() {
%1 = load i8, i8* inttoptr (i64 20480 to i8*)
%2 = or i8 %1, 8
store i8 %2, i8* inttoptr (i64 20480 to i8*)
%3 = load i8, i8* inttoptr (i64 20482 to i8*)
%4 = or i8 %3, 8
store i8 %4, i8* inttoptr (i64 20482 to i8*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ notify_pvcall(char *);
int pvGetExposureMode(char byBoardNum, unsigned int *pnExposureMode,
                      double *pdExposureTime) {
  notify_pvcall("f");
  return (0);
}


x86 assembly (clang, -O0):
<pvGetExposureMode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pvGetExposureMode>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"f\00"
define i32 @pvGetExposureMode(i8 signext %0, i32* %1, double* %2) {
%4 = alloca i8
%5 = alloca i32*
%6 = alloca double*
store i8 %0, i8* %4
store i32* %1, i32** %5
store double* %2, double** %6
%7 = call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c"f\00"
define i32 @pvGetExposureMode(i8 signext %0, i32* nocapture readnone %1, double* nocapture readnone %2) {
%4 = tail call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int _isinstr(const char c, const char *str) {
  while (*str) {
    if (c == *str)
      return 1;
    ++str;
  }
  return 0;
}


x86 assembly (clang, -O0):
<_isinstr>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     114b <_isinstr+0x4b>
movsbl -0x5(%rbp),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jne    113a <_isinstr+0x3a>
movl   $0x1,-0x4(%rbp)
jmp    1152 <_isinstr+0x52>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110e <_isinstr+0xe>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_isinstr>:
mov    (%rsi),%cl
xor    %eax,%eax
test   %cl,%cl
je     1120 <_isinstr+0x20>
add    $0x1,%rsi
nopl   0x0(%rax)
cmp    %dil,%cl
je     1121 <_isinstr+0x21>
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1110 <_isinstr+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_isinstr(i8 signext %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8*
store i8 %0, i8* %4
store i8* %1, i8** %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %5
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = load i8*, i8** %5
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %12, %15
br i1 %16, label %17, label %18
17: ; preds = %10
store i32 1, i32* %3
br label %22
18: ; preds = %10
%19 = load i8*, i8** %5
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %5
br label %6
21: ; preds = %6
store i32 0, i32* %3
br label %22
22: ; preds = %21, %17
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @_isinstr(i8 signext %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %8
5: ; preds = %8
%6 = load i8, i8* %12
%7 = icmp eq i8 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %2, %5
%9 = phi i8 [ %6, %5 ], [ %3, %2 ]
%10 = phi i8* [ %12, %5 ], [ %1, %2 ]
%11 = icmp eq i8 %9, %0
%12 = getelementptr inbounds i8, i8* %10, i64 1
br i1 %11, label %13, label %5
13: ; preds = %8, %5, %2
%14 = phi i32 [ 0, %2 ], [ 0, %5 ], [ 1, %8 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0xcd() {
  Assert_real((isascii(205) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              1030, ("isascii should be 0 for 0xcd"));
}


x86 assembly (clang, -O0):
<t_isascii_0xcd>:
push   %rbp
mov    %rsp,%rbp
mov    $0xcd,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x406,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0xcd>:
push   %rax
mov    $0xcd,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x406,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xcd\00"
define void @t_isascii_0xcd() {
%1 = call i64 @isascii(i32 205)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1030, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xcd\00"
define void @t_isascii_0xcd() {
%1 = tail call i64 @isascii(i32 205)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1030, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int twist_d_on_sliceedge(sliceedge)
int sliceedge;
{
  int temp_arr[12];
  sliceedge_unpack(sliceedge, temp_arr);
  four_cycle(temp_arr, 7, 6, 5, 4);
  return sliceedge_pack(temp_arr);
}


x86 assembly (clang, -O0):
<twist_d_on_sliceedge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x40(%rbp),%rsi
mov    $0x0,%al
call   1050 <sliceedge_unpack@plt>
lea    -0x40(%rbp),%rdi
mov    $0x7,%esi
mov    $0x6,%edx
mov    $0x5,%ecx
mov    $0x4,%r8d
mov    $0x0,%al
call   1040 <four_cycle@plt>
lea    -0x40(%rbp),%rdi
mov    $0x0,%al
call   1030 <sliceedge_pack@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<twist_d_on_sliceedge>:
push   %rbx
sub    $0x30,%rsp
mov    %rsp,%rbx
mov    %rbx,%rsi
xor    %eax,%eax
call   1050 <sliceedge_unpack@plt>
mov    %rbx,%rdi
mov    $0x7,%esi
mov    $0x6,%edx
mov    $0x5,%ecx
mov    $0x4,%r8d
xor    %eax,%eax
call   1040 <four_cycle@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <sliceedge_pack@plt>
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @twist_d_on_sliceedge(i32 %0) {
%2 = alloca i32
%3 = alloca [12 x i32]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [12 x i32], [12 x i32]* %3, i64 0, i64 0
%6 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @sliceedge_unpack to i32 (i32, i32*, ...)*)(i32 %4, i32* %5)
%7 = getelementptr inbounds [12 x i32], [12 x i32]* %3, i64 0, i64 0
%8 = call i32 (i32*, i32, i32, i32, i32, ...) bitcast (i32 (...)* @four_cycle to i32 (i32*, i32, i32, i32, i32, ...)*)(i32* %7, i32 7, i32 6, i32 5, i32 4)
%9 = getelementptr inbounds [12 x i32], [12 x i32]* %3, i64 0, i64 0
%10 = call i32 (i32*, ...) bitcast (i32 (...)* @sliceedge_pack to i32 (i32*, ...)*)(i32* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @twist_d_on_sliceedge(i32 %0) {
%2 = alloca [12 x i32]
%3 = bitcast [12 x i32]* %2 to i8*
%4 = getelementptr inbounds [12 x i32], [12 x i32]* %2, i64 0, i64 0
%5 = call i32 (i32, i32*, ...) bitcast (i32 (...)* @sliceedge_unpack to i32 (i32, i32*, ...)*)(i32 %0, i32* %4)
%6 = call i32 (i32*, i32, i32, i32, i32, ...) bitcast (i32 (...)* @four_cycle to i32 (i32*, i32, i32, i32, i32, ...)*)(i32* %4, i32 7, i32 6, i32 5, i32 4)
%7 = call i32 (i32*, ...) bitcast (i32 (...)* @sliceedge_pack to i32 (i32*, ...)*)(i32* %4)
ret i32 %7
}
int test_imm_DFuint8_mem(unsigned char *val) {
  return ((*val) & (0xDF << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DFuint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0xdf,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DFuint8_mem>:
testb  $0xdf,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DFuint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 223
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_DFuint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -33
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int has_dns_cap() { return 0; }


x86 assembly (clang, -O0):
<has_dns_cap>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_dns_cap>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @has_dns_cap() {
ret i32 0
}

LLVM IR (-O2):
define i32 @has_dns_cap() {
ret i32 0
}
void dummy(void) {
  int o;
  extern unsigned b;
  static int r;
  register int a;
}


x86 assembly (clang, -O0):
<dummy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy>:
ret

LLVM IR (-O0):
@dummy.r = internal global i32 0
define void @dummy() {
%1 = alloca i32
%2 = alloca i32
ret void
}

LLVM IR (-O2):
define void @dummy() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int8_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
void *hcd_malloc(uint32_t Size, int8_t Bank, int32_t tag) { return NULL; }


x86 assembly (clang, -O0):
<hcd_malloc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hcd_malloc>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @hcd_malloc(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @hcd_malloc(i32 %0, i32 %1, i32 %2) {
ret i8* null
}
__attribute__((noclone, no)) double baz(double i) { return i; }


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
ret

LLVM IR (-O0):
define double @baz(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
ret double %3
}

LLVM IR (-O2):
define double @baz(double returned %0) {
ret double %0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
long fwrite(float const *, int, long, int /*<<< orphan*/ *);
int /*<<< orphan*/ perror(char *);
int fvec_fwrite_raw(FILE *fo, const float *v, long d) {
  long ret = fwrite(v, sizeof(float), d, fo);
  if (ret != d) {
    perror("fvec_fwrite_raw: write error 2");
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<fvec_fwrite_raw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x4,%esi
call   1040 <fwrite@plt>
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x20(%rbp),%rax
je     1174 <fvec_fwrite_raw+0x54>
lea    0xe9d(%rip),%rdi
call   1030 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    117b <fvec_fwrite_raw+0x5b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fvec_fwrite_raw>:
push   %rbx
mov    %rdx,%rbx
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x4,%esi
call   1040 <fwrite@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rbx,%rcx
jne    1140 <fvec_fwrite_raw+0x20>
pop    %rbx
ret
lea    0xeb9(%rip),%rdi
call   1030 <perror@plt>
mov    $0xffffffff,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [31 x i8] c"fvec_fwrite_raw: write error 2\00"
define i32 @fvec_fwrite_raw(i32* %0, float* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca float*
%7 = alloca i64
%8 = alloca i64
store i32* %0, i32** %5
store float* %1, float** %6
store i64 %2, i64* %7
%9 = load float*, float** %6
%10 = load i64, i64* %7
%11 = load i32*, i32** %5
%12 = call i64 @fwrite(float* %9, i32 4, i64 %10, i32* %11)
store i64 %12, i64* %8
%13 = load i64, i64* %8
%14 = load i64, i64* %7
%15 = icmp ne i64 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %3
%17 = call i32 @perror(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %4
br label %19
18: ; preds = %3
store i32 0, i32* %4
br label %19
19: ; preds = %18, %16
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
@.str = [31 x i8] c"fvec_fwrite_raw: write error 2\00"
define i32 @fvec_fwrite_raw(i32* nocapture %0, float* nocapture %1, i64 %2) {
%4 = tail call i64 @fwrite(float* %1, i32 4, i64 %2, i32* %0)
%5 = icmp eq i64 %4, %2
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @perror(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ -1, %6 ], [ 0, %3 ]
ret i32 %9
}
double drem(x, y)
double x, y;
{ return remainder(x, y); }


x86 assembly (clang, -O0):
<drem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <remainder@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drem>:
jmp    1030 <remainder@plt>

LLVM IR (-O0):
define double @drem(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @remainder(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @drem(double %0, double %1) {
%3 = tail call double @remainder(double %0, double %1)
ret double %3
}
/* Variables and functions */
scalar_t__ calloc(size_t, int);
int /*<<< orphan*/ nrerror(char *);
int *ivector0(long nl, long nh) {
  int *v;
  v = (int *)calloc((size_t)(nh - nl + 1 + 0), sizeof(int));
  if (!v)
    nrerror("allocation failure in ivector0()");
  return v - nl + 0;
}


x86 assembly (clang, -O0):
<ivector0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
sub    -0x8(%rbp),%rdi
add    $0x1,%rdi
add    $0x0,%rdi
mov    $0x4,%esi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1165 <ivector0+0x45>
lea    0xea0(%rip),%rdi
call   1030 <nrerror@plt>
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
sub    -0x8(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ivector0>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
sub    %rdi,%rsi
lea    0x1(%rsi),%rdi
mov    $0x4,%esi
call   1040 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114c <ivector0+0x2c>
lea    0xeb9(%rip),%rdi
call   1030 <nrerror@plt>
shl    $0x2,%r14
sub    %r14,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [33 x i8] c"allocation failure in ivector0()\00"
define i32* @ivector0(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = load i64, i64* %3
%8 = sub nsw i64 %6, %7
%9 = add nsw i64 %8, 1
%10 = add nsw i64 %9, 0
%11 = call i64 @calloc(i64 %10, i32 4)
%12 = inttoptr i64 %11 to i32*
store i32* %12, i32** %5
%13 = load i32*, i32** %5
%14 = icmp ne i32* %13, null
br i1 %14, label %17, label %15
15: ; preds = %2
%16 = call i32 @nrerror(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %17
17: ; preds = %15, %2
%18 = load i32*, i32** %5
%19 = load i64, i64* %3
%20 = sub i64 0, %19
%21 = getelementptr inbounds i32, i32* %18, i64 %20
%22 = getelementptr inbounds i32, i32* %21, i64 0
ret i32* %22
}

LLVM IR (-O2):
@.str = [33 x i8] c"allocation failure in ivector0()\00"
define i32* @ivector0(i64 %0, i64 %1) {
%3 = sub i64 1, %0
%4 = add i64 %3, %1
%5 = tail call i64 @calloc(i64 %4, i32 4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %2
%8 = tail call i32 @nrerror(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %2
%10 = sub i64 0, %0
%11 = inttoptr i64 %5 to i32*
%12 = getelementptr inbounds i32, i32* %11, i64 %10
ret i32* %12
}
/* Variables and functions */
bool checkThatOnlyOneBitIsSet(int bitVector) {
  return (bitVector & (bitVector - 1)) == 0;
}


x86 assembly (clang, -O0):
<checkThatOnlyOneBitIsSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkThatOnlyOneBitIsSet>:
lea    -0x1(%rdi),%ecx
xor    %eax,%eax
test   %ecx,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @checkThatOnlyOneBitIsSet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 1
%6 = and i32 %3, %5
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @checkThatOnlyOneBitIsSet(i32 %0) {
%2 = tail call i32 @llvm.ctpop.i32(i32 %0)
%3 = icmp ult i32 %2, 2
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void peri_write_nb(volatile uint32_t *paddr, uint32_t value) { *paddr = value; }


x86 assembly (clang, -O0):
<peri_write_nb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<peri_write_nb>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @peri_write_nb(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store volatile i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @peri_write_nb(i32* %0, i32 %1) {
store volatile i32 %1, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ block_func();
int main(int argc, char *argv[]) {
  block_func();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <block_func@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <block_func@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @block_func()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @block_func()
ret i32 0
}