xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void about(void) {
  printf("\n\n******************************************\n");
  printf("Thank you for using this Age calculator.\nThis application writtern "
         "by H.R.Shadhin\n");
  printf("Email:hrshadhin.i386@gmail.com\nCell no.+8801554322707\n");
  printf("******************************************\n");
}


x86 assembly (clang, -O0):
<about>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf07(%rip),%rdi
call   1030 <printf@plt>
lea    0xf4e(%rip),%rdi
call   1030 <printf@plt>
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<about>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf09(%rip),%rdi
call   1030 <puts@plt>
lea    0xf4f(%rip),%rdi
call   1030 <puts@plt>
lea    0xec6(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"\0A\0A******************************************\0A\00"
@.str.1 = [83 x i8] c"Thank you for using this Age calculator.\0AThis application writtern by H.R.Shadhin\0A\00"
@.str.2 = [55 x i8] c"Email:hrshadhin.i386@gmail.com\0ACell no.+8801554322707\0A\00"
@.str.3 = [44 x i8] c"******************************************\0A\00"
define void @about() {
%1 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([83 x i8], [83 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [45 x i8] c"\0A\0A******************************************\00"
@str.4 = [82 x i8] c"Thank you for using this Age calculator.\0AThis application writtern by H.R.Shadhin\00"
@str.5 = [54 x i8] c"Email:hrshadhin.i386@gmail.com\0ACell no.+8801554322707\00"
@str.6 = [43 x i8] c"******************************************\00"
define void @about() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([82 x i8], [82 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([54 x i8], [54 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str.6, i64 0, i64 0))
ret void
}
unsigned int modulo(unsigned int x, unsigned int y) { return x % y; }


x86 assembly (clang, -O0):
<modulo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    %edx,%edx
divl   -0x8(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<modulo>:
mov    %edi,%eax
xor    %edx,%edx
div    %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @modulo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = urem i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @modulo(i32 %0, i32 %1) {
%3 = urem i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ quit(int /*<<< orphan*/);
void c_quit(int argc, char *argv[]) { quit(0); }


x86 assembly (clang, -O0):
<c_quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <quit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_quit>:
xor    %edi,%edi
jmp    1030 <quit@plt>

LLVM IR (-O0):
define void @c_quit(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @quit(i32 0)
ret void
}

LLVM IR (-O2):
define void @c_quit(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @quit(i32 0)
ret void
}
int add_mode(int cur, int add) { return cur | add; }


x86 assembly (clang, -O0):
<add_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
or     -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_mode>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @add_mode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = or i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @add_mode(i32 %0, i32 %1) {
%3 = or i32 %1, %0
ret i32 %3
}
int uipprintf(const char *fmt, ...) {
  (void)fmt;
  return (0);
}


x86 assembly (clang, -O0):
<uipprintf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uipprintf>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @uipprintf(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @uipprintf(i8* nocapture readnone %0, ...) {
ret i32 0
}
int test_imm_A4int8_mem(signed char *val) {
  return ((*val) & (0xA4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A4int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xa4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A4int8_mem>:
testb  $0xa4,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A4int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 164
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A4int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -92
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ IntEnable(int);
int /*<<< orphan*/ IntRegister(int, void (*)());
void FlashIntRegister(void (*pfnHandler)(void)) {
  IntRegister(45, pfnHandler);
  IntEnable(45);
}


x86 assembly (clang, -O0):
<FlashIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x2d,%edi
call   1040 <IntRegister@plt>
mov    $0x2d,%edi
call   1030 <IntEnable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlashIntRegister>:
push   %rax
mov    %rdi,%rsi
mov    $0x2d,%edi
call   1040 <IntRegister@plt>
mov    $0x2d,%edi
pop    %rax
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @FlashIntRegister(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
%3 = load void ()*, void ()** %2
%4 = bitcast void ()* %3 to void (...)*
%5 = call i32 @IntRegister(i32 45, void (...)* %4)
%6 = call i32 @IntEnable(i32 45)
ret void
}

LLVM IR (-O2):
define void @FlashIntRegister(void ()* %0) {
%2 = bitcast void ()* %0 to void (...)*
%3 = tail call i32 @IntRegister(i32 45, void (...)* %2)
%4 = tail call i32 @IntEnable(i32 45)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ silc_free(void *);
void silc_packet_engine_hash_destr(void *key, void *context,
                                   void *user_context) {
  silc_free(key);
}


x86 assembly (clang, -O0):
<silc_packet_engine_hash_destr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <silc_free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<silc_packet_engine_hash_destr>:
jmp    1030 <silc_free@plt>

LLVM IR (-O0):
define void @silc_packet_engine_hash_destr(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = call i32 @silc_free(i8* %7)
ret void
}

LLVM IR (-O2):
define void @silc_packet_engine_hash_destr(i8* %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = tail call i32 @silc_free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("int * -->%ld\n", sizeof(int *));
  printf("float * -->%ld\n", sizeof(float *));
  printf("double * -->%ld\n", sizeof(double *));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
lea    0xee2(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
lea    0xee1(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
lea    0xee5(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
lea    0xee4(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"int * -->%ld\0A\00"
@.str.1 = [16 x i8] c"float * -->%ld\0A\00"
@.str.2 = [17 x i8] c"double * -->%ld\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 8)
%2 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 8)
%3 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.2, i64 0, i64 0), i32 8)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"int * -->%ld\0A\00"
@.str.1 = [16 x i8] c"float * -->%ld\0A\00"
@.str.2 = [17 x i8] c"double * -->%ld\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 8)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i32 8)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.2, i64 0, i64 0), i32 8)
ret i32 0
}
int round_i(double x) { return x > 0.0 ? x + 0.5 : x - 0.5; }


x86 assembly (clang, -O0):
<round_i>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1132 <round_i+0x32>
movsd  0xedd(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1148 <round_i+0x48>
movsd  -0x8(%rbp),%xmm0
movsd  0xec1(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_i>:
xorpd  %xmm1,%xmm1
xor    %eax,%eax
ucomisd %xmm1,%xmm0
seta   %al
lea    0xeec(%rip),%rcx
addsd  (%rcx,%rax,8),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @round_i(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp ogt double %3, 0.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load double, double* %2
%7 = fadd double %6, 5.000000e-01
br label %11
8: ; preds = %1
%9 = load double, double* %2
%10 = fsub double %9, 5.000000e-01
br label %11
11: ; preds = %8, %5
%12 = phi double [ %7, %5 ], [ %10, %8 ]
%13 = fptosi double %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @round_i(double %0) {
%2 = fcmp ogt double %0, 0.000000e+00
%3 = select i1 %2, double 5.000000e-01, double -5.000000e-01
%4 = fadd double %3, %0
%5 = fptosi double %4 to i32
ret i32 %5
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, void *);
void wait_ms(int ms) {
  struct timespec req;
  req.tv_sec = ms / 1000;
  req.tv_nsec = (ms % 1000) * 1000000;
  nanosleep(&req, ((void *)0));
}


x86 assembly (clang, -O0):
<wait_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
imul   $0xf4240,%edx,%eax
mov    %eax,-0xc(%rbp)
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wait_ms>:
push   %rax
movslq %edi,%rax
imul   $0x10624dd3,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rcx
add    %edx,%ecx
mov    %ecx,(%rsp)
imul   $0x3e8,%ecx,%ecx
sub    %ecx,%eax
imul   $0xf4240,%eax,%eax
mov    %eax,0x4(%rsp)
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define void @wait_ms(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sdiv i32 %4, 1000
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i32 %5, i32* %6
%7 = load i32, i32* %2
%8 = srem i32 %7, 1000
%9 = mul nsw i32 %8, 1000000
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i32 %9, i32* %10
%11 = call i32 @nanosleep(%struct.timespec* %3, i8* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define void @wait_ms(i32 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = sdiv i32 %0, 1000
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i32 %4, i32* %5
%6 = srem i32 %0, 1000
%7 = mul nsw i32 %6, 1000000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i32 %7, i32* %8
%9 = call i32 @nanosleep(%struct.timespec* %2, i8* null)
ret void
}
int match_all(char c) { return 1; }


x86 assembly (clang, -O0):
<match_all>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<match_all>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @match_all(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @match_all(i8 signext %0) {
ret i32 1
}
/* Variables and functions */
void CL_Snd_Shutdown(void) {}


x86 assembly (clang, -O0):
<CL_Snd_Shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CL_Snd_Shutdown>:
ret

LLVM IR (-O0):
define void @CL_Snd_Shutdown() {
ret void
}

LLVM IR (-O2):
define void @CL_Snd_Shutdown() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Test1();
int /*<<< orphan*/ Test2();
int /*<<< orphan*/ Test3();
int /*<<< orphan*/ Test4();
int main(int argc, char **argv) {
  Test1();
  Test2();
  Test3();
  Test4();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <Test1@plt>
mov    $0x0,%al
call   1040 <Test2@plt>
mov    $0x0,%al
call   1060 <Test3@plt>
mov    $0x0,%al
call   1030 <Test4@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <Test1@plt>
xor    %eax,%eax
call   1040 <Test2@plt>
xor    %eax,%eax
call   1060 <Test3@plt>
xor    %eax,%eax
call   1030 <Test4@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @Test1()
%7 = call i32 (...) @Test2()
%8 = call i32 (...) @Test3()
%9 = call i32 (...) @Test4()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @Test1()
%4 = tail call i32 (...) @Test2()
%5 = tail call i32 (...) @Test3()
%6 = tail call i32 (...) @Test4()
ret i32 0
}
/* Variables and functions */
int getchar();
int yes_nofunc() {
  register int c, yes_no_res;
  yes_no_res = 1;
  c = getchar();
  while (c != '\n') {
    yes_no_res = 2;
    c = getchar();
  }
  return yes_no_res;
}


x86 assembly (clang, -O0):
<yes_nofunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
je     1149 <yes_nofunc+0x39>
movl   $0x2,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %eax,-0x4(%rbp)
jmp    1129 <yes_nofunc+0x19>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yes_nofunc>:
push   %rax
xor    %eax,%eax
call   1030 <getchar@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cmp    $0xa,%ecx
je     1141 <yes_nofunc+0x31>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
xor    %eax,%eax
call   1030 <getchar@plt>
cmp    $0xa,%eax
jne    1130 <yes_nofunc+0x20>
mov    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @yes_nofunc() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %2
%3 = call i32 (...) @getchar()
store i32 %3, i32* %1
br label %4
4: ; preds = %7, %0
%5 = load i32, i32* %1
%6 = icmp ne i32 %5, 10
br i1 %6, label %7, label %9
7: ; preds = %4
store i32 2, i32* %2
%8 = call i32 (...) @getchar()
store i32 %8, i32* %1
br label %4
9: ; preds = %4
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @yes_nofunc() {
%1 = tail call i32 (...) @getchar()
%2 = icmp eq i32 %1, 10
br i1 %2, label %6, label %3
3: ; preds = %0, %3
%4 = tail call i32 (...) @getchar()
%5 = icmp eq i32 %4, 10
br i1 %5, label %6, label %3
6: ; preds = %3, %0
%7 = phi i32 [ 1, %0 ], [ 2, %3 ]
ret i32 %7
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  char *compose_ptr;
};
typedef TYPE_1__ XComposeStatus;

/* Variables and functions */
void set_XComposeStatus_compose_ptr(void *_p, void *_v) {
  ((XComposeStatus *)_p)->compose_ptr = (char *)_v;
}


x86 assembly (clang, -O0):
<set_XComposeStatus_compose_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XComposeStatus_compose_ptr>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i8* }
define void @set_XComposeStatus_compose_ptr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i8* %5, i8** %8
ret void
}

LLVM IR (-O2):
define void @set_XComposeStatus_compose_ptr(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
/* Variables and functions */
scalar_t__ gen_movsd(unsigned int *, unsigned int *);
int main(void) {
  unsigned x, y;
  x = 13;
  y = 14;
  return (int)gen_movsd(&x, &y);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xd,-0x8(%rbp)
movl   $0xe,-0xc(%rbp)
lea    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <gen_movsd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0xd,0x4(%rsp)
movl   $0xe,(%rsp)
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
call   1030 <gen_movsd@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 13, i32* %2
store i32 14, i32* %3
%4 = call i64 @gen_movsd(i32* %2, i32* %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
store i32 13, i32* %1
store i32 14, i32* %2
%5 = call i64 @gen_movsd(i32* %1, i32* %2)
%6 = trunc i64 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
void error_msg(char *msg) {
  perror(msg);
  exit(1);
}


x86 assembly (clang, -O0):
<error_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error_msg>:
push   %rax
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @error_msg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @error_msg(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
unsigned char crc7_byte(unsigned char, int /*<<< orphan*/);
unsigned char crc7(const unsigned char *buffer, unsigned int len) {
  unsigned char crc = 0;
  while (len--)
    crc = crc7_byte(crc, *buffer++);
  return crc;
}


x86 assembly (clang, -O0):
<crc7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movb   $0x0,-0xd(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
cmp    $0x0,%eax
je     115c <crc7+0x4c>
mov    -0xd(%rbp),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movzbl (%rcx),%esi
movzbl %al,%edi
call   1030 <crc7_byte@plt>
mov    %al,-0xd(%rbp)
jmp    1123 <crc7+0x13>
movzbl -0xd(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc7>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
je     1148 <crc7+0x38>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%r14,%rbx,1),%esi
movzbl %al,%edi
call   1030 <crc7_byte@plt>
add    $0x1,%rbx
cmp    %ebx,%r15d
jne    1130 <crc7+0x20>
jmp    114a <crc7+0x3a>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define zeroext i8 @crc7(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
store i8 0, i8* %5
br label %6
6: ; preds = %10, %2
%7 = load i32, i32* %4
%8 = add i32 %7, -1
store i32 %8, i32* %4
%9 = icmp ne i32 %7, 0
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i8, i8* %5
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %3
%14 = load i8, i8* %12
%15 = zext i8 %14 to i32
%16 = call zeroext i8 @crc7_byte(i8 zeroext %11, i32 %15)
store i8 %16, i8* %5
br label %6
17: ; preds = %6
%18 = load i8, i8* %5
ret i8 %18
}

LLVM IR (-O2):
define zeroext i8 @crc7(i8* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %14, label %4
4: ; preds = %2, %4
%5 = phi i8 [ %12, %4 ], [ 0, %2 ]
%6 = phi i32 [ %8, %4 ], [ %1, %2 ]
%7 = phi i8* [ %9, %4 ], [ %0, %2 ]
%8 = add i32 %6, -1
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = load i8, i8* %7
%11 = zext i8 %10 to i32
%12 = tail call zeroext i8 @crc7_byte(i8 zeroext %5, i32 %11)
%13 = icmp eq i32 %8, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %2
%15 = phi i8 [ 0, %2 ], [ %12, %4 ]
ret i8 %15
}
void RTMd5Init(void) {}


x86 assembly (clang, -O0):
<RTMd5Init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMd5Init>:
ret

LLVM IR (-O0):
define void @RTMd5Init() {
ret void
}

LLVM IR (-O2):
define void @RTMd5Init() {
ret void
}
/* Variables and functions */
unsigned int xatoull_range(char const *, unsigned int, unsigned int);
__attribute__((always_)) unsigned int
xatou_range(const char *str, unsigned int l, unsigned int u) {
  return xatoull_range(str, l, u);
}


x86 assembly (clang, -O0):
<xatou_range>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <xatoull_range@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xatou_range>:
jmp    1030 <xatoull_range@plt>

LLVM IR (-O0):
define i32 @xatou_range(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @xatoull_range(i8* %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @xatou_range(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @xatoull_range(i8* %0, i32 %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ goto_test();
void main(void) { goto_test(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <goto_test@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <goto_test@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 (...) @goto_test()
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @goto_test()
ret void
}
/* Variables and functions */
float pow(double, double);
float colorcorr_lum2duty(double lum) {
  if (lum > 0.07999591993063804) {
    return pow(((lum + 0.16) / 1.16), 3.0);
  } else {
    return lum / 9.033;
  }
}


x86 assembly (clang, -O0):
<colorcorr_lum2duty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1164 <colorcorr_lum2duty+0x54>
movsd  0xee4(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  0xecf(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xebb(%rip),%xmm1
call   1030 <pow@plt>
movss  %xmm0,-0x4(%rbp)
jmp    117e <colorcorr_lum2duty+0x6e>
movsd  -0x10(%rbp),%xmm0
movsd  0xe97(%rip),%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<colorcorr_lum2duty>:
ucomisd 0xee8(%rip),%xmm0
jbe    1137 <colorcorr_lum2duty+0x27>
addsd  0xeee(%rip),%xmm0
divsd  0xeee(%rip),%xmm0
movsd  0xeee(%rip),%xmm1
jmp    1030 <pow@plt>
divsd  0xec9(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @colorcorr_lum2duty(double %0) {
%2 = alloca float
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp ogt double %4, 0x3FB47A9CD3EA5FD8
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load double, double* %3
%8 = fadd double %7, 1.600000e-01
%9 = fdiv double %8, 1.160000e+00
%10 = call float @pow(double %9, double 3.000000e+00)
store float %10, float* %2
br label %15
11: ; preds = %1
%12 = load double, double* %3
%13 = fdiv double %12, 9.033000e+00
%14 = fptrunc double %13 to float
store float %14, float* %2
br label %15
15: ; preds = %11, %6
%16 = load float, float* %2
ret float %16
}

LLVM IR (-O2):
define float @colorcorr_lum2duty(double %0) {
%2 = fcmp ogt double %0, 0x3FB47A9CD3EA5FD8
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = fadd double %0, 1.600000e-01
%5 = fdiv double %4, 1.160000e+00
%6 = tail call float @pow(double %5, double 3.000000e+00)
br label %10
7: ; preds = %1
%8 = fdiv double %0, 9.033000e+00
%9 = fptrunc double %8 to float
br label %10
10: ; preds = %7, %3
%11 = phi float [ %6, %3 ], [ %9, %7 ]
ret float %11
}
/* Type definitions */
typedef int /*<<< orphan*/ uint_fast64_t;

/* Variables and functions */
void SHAREMIND_MAP_KEY_FREE_uint_fast64_t(uint_fast64_t *const dest) {
  (void)dest;
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_FREE_uint_fast64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_FREE_uint_fast64_t>:
ret

LLVM IR (-O0):
define void @SHAREMIND_MAP_KEY_FREE_uint_fast64_t(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret void
}

LLVM IR (-O2):
define void @SHAREMIND_MAP_KEY_FREE_uint_fast64_t(i32* nocapture %0) {
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t bcd2i(uint8_t bcd) { return (bcd >> 4) * 10 + (bcd & 0x0f); }


x86 assembly (clang, -O0):
<bcd2i>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
imul   $0xa,%eax,%eax
mov    -0x4(%rbp),%ecx
and    $0xf,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcd2i>:
mov    %edi,%eax
sar    $0x4,%eax
lea    (%rax,%rax,4),%eax
and    $0xf,%edi
lea    (%rdi,%rax,2),%eax
ret

LLVM IR (-O0):
define i32 @bcd2i(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 4
%5 = mul nsw i32 %4, 10
%6 = load i32, i32* %2
%7 = and i32 %6, 15
%8 = add nsw i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @bcd2i(i32 %0) {
%2 = ashr i32 %0, 4
%3 = mul nsw i32 %2, 10
%4 = and i32 %0, 15
%5 = add nsw i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int initialize_quaddobl_homotopy(int fixed_gamma) {
  int fail, *b;
  double *c;
  fail = _ada_use_c2phc(502, &fixed_gamma, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<initialize_quaddobl_homotopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x1f6,%edi
lea    -0x4(%rbp),%rsi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_quaddobl_homotopy>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1f6,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @initialize_quaddobl_homotopy(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %4
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc(i32 502, i32* %2, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @initialize_quaddobl_homotopy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc(i32 502, i32* %2, i32* undef, double* undef)
ret i32 %3
}
/* Variables and functions */
float sinf(float);
float cosf(float x) { return sinf(x + (0.5f * 3.14159265358979323846f)); }


x86 assembly (clang, -O0):
<cosf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  0xedb(%rip),%xmm0
addss  -0x4(%rbp),%xmm0
call   1030 <sinf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cosf>:
addss  0xee8(%rip),%xmm0
jmp    1030 <sinf@plt>

LLVM IR (-O0):
define float @cosf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fadd float %3, 0x3FF921FB60000000
%5 = call float @sinf(float %4)
ret float %5
}

LLVM IR (-O2):
define float @cosf(float %0) {
%2 = fadd float %0, 0x3FF921FB60000000
%3 = tail call float @sinf(float %2)
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ kbdinit();
int /*<<< orphan*/ seginit();
int /*<<< orphan*/ sysinit();
void archinit(void) {
  seginit();
  sysinit();
  kbdinit();
}


x86 assembly (clang, -O0):
<archinit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <seginit@plt>
mov    $0x0,%al
call   1030 <sysinit@plt>
mov    $0x0,%al
call   1040 <kbdinit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<archinit>:
push   %rax
xor    %eax,%eax
call   1050 <seginit@plt>
xor    %eax,%eax
call   1030 <sysinit@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <kbdinit@plt>

LLVM IR (-O0):
define void @archinit() {
%1 = call i32 (...) @seginit()
%2 = call i32 (...) @sysinit()
%3 = call i32 (...) @kbdinit()
ret void
}

LLVM IR (-O2):
define void @archinit() {
%1 = tail call i32 (...) @seginit()
%2 = tail call i32 (...) @sysinit()
%3 = tail call i32 (...) @kbdinit()
ret void
}
/* Type definitions */
struct l_class_OC_Test2 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _ZN14UecManagerBaseC2Ev(struct l_class_OC_Test2 *);
void _ZN14UecManagerBaseC1Ev(struct l_class_OC_Test2 *llvm_cbe_this) {
  struct l_class_OC_Test2 *llvm_cbe_this_2e_addr;
  struct l_class_OC_Test2 *llvm_cbe_this1;
  *(&llvm_cbe_this_2e_addr) = llvm_cbe_this;
  llvm_cbe_this1 = *(&llvm_cbe_this_2e_addr);
  _ZN14UecManagerBaseC2Ev(llvm_cbe_this1);
  return;
}


x86 assembly (clang, -O0):
<_ZN14UecManagerBaseC1Ev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <_ZN14UecManagerBaseC2Ev@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZN14UecManagerBaseC1Ev>:
jmp    1030 <_ZN14UecManagerBaseC2Ev@plt>

LLVM IR (-O0):
%struct.l_class_OC_Test2 = type { i32 }
define void @_ZN14UecManagerBaseC1Ev(%struct.l_class_OC_Test2* %0) {
%2 = alloca %struct.l_class_OC_Test2*
%3 = alloca %struct.l_class_OC_Test2*
%4 = alloca %struct.l_class_OC_Test2*
store %struct.l_class_OC_Test2* %0, %struct.l_class_OC_Test2** %2
%5 = load %struct.l_class_OC_Test2*, %struct.l_class_OC_Test2** %2
store %struct.l_class_OC_Test2* %5, %struct.l_class_OC_Test2** %3
%6 = load %struct.l_class_OC_Test2*, %struct.l_class_OC_Test2** %3
store %struct.l_class_OC_Test2* %6, %struct.l_class_OC_Test2** %4
%7 = load %struct.l_class_OC_Test2*, %struct.l_class_OC_Test2** %4
%8 = call i32 @_ZN14UecManagerBaseC2Ev(%struct.l_class_OC_Test2* %7)
ret void
}

LLVM IR (-O2):
%struct.l_class_OC_Test2 = type { i32 }
define void @_ZN14UecManagerBaseC1Ev(%struct.l_class_OC_Test2* %0) {
%2 = tail call i32 @_ZN14UecManagerBaseC2Ev(%struct.l_class_OC_Test2* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SA1DirectIndirectIndexedLong(int);
int /*<<< orphan*/ STA16(int /*<<< orphan*/, int);
void Op97M0(void) { STA16(SA1DirectIndirectIndexedLong(2), 0xFFFFFF); }


x86 assembly (clang, -O0):
<Op97M0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <SA1DirectIndirectIndexedLong@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
call   1040 <STA16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op97M0>:
push   %rax
mov    $0x2,%edi
call   1030 <SA1DirectIndirectIndexedLong@plt>
mov    %eax,%edi
mov    $0xffffff,%esi
pop    %rax
jmp    1040 <STA16@plt>

LLVM IR (-O0):
define void @Op97M0() {
%1 = call i32 @SA1DirectIndirectIndexedLong(i32 2)
%2 = call i32 @STA16(i32 %1, i32 16777215)
ret void
}

LLVM IR (-O2):
define void @Op97M0() {
%1 = tail call i32 @SA1DirectIndirectIndexedLong(i32 2)
%2 = tail call i32 @STA16(i32 %1, i32 16777215)
ret void
}
/* Type definitions */
struct cpumask {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gic_raise_softirq(struct cpumask const *, int);
void smp_cross_call(const struct cpumask *mask) { gic_raise_softirq(mask, 1); }


x86 assembly (clang, -O0):
<smp_cross_call>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <gic_raise_softirq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_cross_call>:
mov    $0x1,%esi
jmp    1030 <gic_raise_softirq@plt>

LLVM IR (-O0):
%struct.cpumask = type { i32 }
define void @smp_cross_call(%struct.cpumask* %0) {
%2 = alloca %struct.cpumask*
store %struct.cpumask* %0, %struct.cpumask** %2
%3 = load %struct.cpumask*, %struct.cpumask** %2
%4 = call i32 @gic_raise_softirq(%struct.cpumask* %3, i32 1)
ret void
}

LLVM IR (-O2):
%struct.cpumask = type { i32 }
define void @smp_cross_call(%struct.cpumask* %0) {
%2 = tail call i32 @gic_raise_softirq(%struct.cpumask* %0, i32 1)
ret void
}
int test_imm_95uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x95 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_95uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x95,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_95uint64_highword_mem>:
testb  $0x95,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_95uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 149
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_95uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 639950127104
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int gpio_is_valid(int gpio) {
  if (gpio < 0)
    return 0;
  if (gpio < 256)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<gpio_is_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111d <gpio_is_valid+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    113d <gpio_is_valid+0x3d>
cmpl   $0x100,-0x8(%rbp)
jge    1136 <gpio_is_valid+0x36>
movl   $0x1,-0x4(%rbp)
jmp    113d <gpio_is_valid+0x3d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_is_valid>:
xor    %eax,%eax
cmp    $0x100,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @gpio_is_valid(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 256
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %12
11: ; preds = %7
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @gpio_is_valid(i32 %0) {
%2 = icmp ult i32 %0, 256
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ func_b();
void func_c() { func_b(); }


x86 assembly (clang, -O0):
<func_c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <func_b@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_c>:
xor    %eax,%eax
jmp    1030 <func_b@plt>

LLVM IR (-O0):
define void @func_c() {
%1 = call i32 (...) @func_b()
ret void
}

LLVM IR (-O2):
define void @func_c() {
%1 = tail call i32 (...) @func_b()
ret void
}
/* Type definitions */
struct timeval {
  int member_0;
  int /*<<< orphan*/ member_1;
};
typedef int /*<<< orphan*/ fd_set;

/* Variables and functions */
int FD_ISSET(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ FD_SET(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ FD_ZERO(int /*<<< orphan*/ *);
int /*<<< orphan*/ select(int, int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                          int /*<<< orphan*/ *, struct timeval *);
int _check_socket_in(int fd) {
  static struct timeval tv = {1, 0};
  static fd_set fds;
  FD_ZERO(&fds);
  FD_SET(fd, &fds);
  select(fd + 1, &fds, NULL, NULL, &tv);
  return FD_ISSET(fd, &fds);
}


x86 assembly (clang, -O0):
<_check_socket_in>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0x2efa(%rip),%rdi
call   1040 <FD_ZERO@plt>
mov    -0x4(%rbp),%edi
lea    0x2eeb(%rip),%rsi
call   1060 <FD_SET@plt>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
lea    0x2ed9(%rip),%rsi
xor    %eax,%eax
mov    %eax,%ecx
lea    0x2ec2(%rip),%r8
mov    %rcx,%rdx
call   1050 <select@plt>
mov    -0x4(%rbp),%edi
lea    0x2ebc(%rip),%rsi
call   1030 <FD_ISSET@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_socket_in>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0x2eff(%rip),%r14
mov    %r14,%rdi
call   1040 <FD_ZERO@plt>
mov    %ebx,%edi
mov    %r14,%rsi
call   1060 <FD_SET@plt>
lea    0x1(%rbx),%edi
lea    0x2ed7(%rip),%r8
mov    %r14,%rsi
xor    %edx,%edx
xor    %ecx,%ecx
call   1050 <select@plt>
mov    %ebx,%edi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <FD_ISSET@plt>

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
@_check_socket_in.tv = internal global %struct.timeval { i32 1, i32 0 }
@_check_socket_in.fds = internal global i32 0
define i32 @_check_socket_in(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @FD_ZERO(i32* @_check_socket_in.fds)
%4 = load i32, i32* %2
%5 = call i32 @FD_SET(i32 %4, i32* @_check_socket_in.fds)
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 1
%8 = call i32 @select(i32 %7, i32* @_check_socket_in.fds, i32* null, i32* null, %struct.timeval* @_check_socket_in.tv)
%9 = load i32, i32* %2
%10 = call i32 @FD_ISSET(i32 %9, i32* @_check_socket_in.fds)
ret i32 %10
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
@_check_socket_in.tv = internal global %struct.timeval { i32 1, i32 0 }
@_check_socket_in.fds = internal global i32 0
define i32 @_check_socket_in(i32 %0) {
%2 = tail call i32 @FD_ZERO(i32* @_check_socket_in.fds)
%3 = tail call i32 @FD_SET(i32 %0, i32* @_check_socket_in.fds)
%4 = add nsw i32 %0, 1
%5 = tail call i32 @select(i32 %4, i32* @_check_socket_in.fds, i32* null, i32* null, %struct.timeval* @_check_socket_in.tv)
%6 = tail call i32 @FD_ISSET(i32 %0, i32* @_check_socket_in.fds)
ret i32 %6
}
/* Variables and functions */
scalar_t__ COND_LT();
int /*<<< orphan*/ EA_AY_AI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_slt_8_ai(void) {
  m68ki_write_8(EA_AY_AI_8(), COND_LT() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_slt_8_ai>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <EA_AY_AI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <COND_LT@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_slt_8_ai>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1040 <EA_AY_AI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <COND_LT@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_slt_8_ai() {
%1 = call i32 (...) @EA_AY_AI_8()
%2 = call i64 (...) @COND_LT()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_slt_8_ai() {
%1 = tail call i32 (...) @EA_AY_AI_8()
%2 = tail call i64 (...) @COND_LT()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
/* Variables and functions */
char *strchr(char *, char);
bool should_ignore_case(char *arg, bool orig) {
  if (orig == true) {
    return true;
  }
  char *pos = strchr(arg, 'i');
  if (pos != NULL) {
    return true;
  }
  return false;
}


x86 assembly (clang, -O0):
<should_ignore_case>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    1135 <should_ignore_case+0x25>
movl   $0x1,-0x4(%rbp)
jmp    1165 <should_ignore_case+0x55>
mov    -0x10(%rbp),%rdi
mov    $0x69,%esi
call   1030 <strchr@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     115e <should_ignore_case+0x4e>
movl   $0x1,-0x4(%rbp)
jmp    1165 <should_ignore_case+0x55>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<should_ignore_case>:
mov    $0x1,%eax
cmp    $0x1,%esi
je     1134 <should_ignore_case+0x24>
push   %rax
mov    $0x69,%esi
call   1030 <strchr@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @should_ignore_case(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %17
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = call i8* @strchr(i8* %11, i8 signext 105)
store i8* %12, i8** %6
%13 = load i8*, i8** %6
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %16
15: ; preds = %10
store i32 1, i32* %3
br label %17
16: ; preds = %10
store i32 0, i32* %3
br label %17
17: ; preds = %16, %15, %9
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @should_ignore_case(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 1
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 105)
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %2, %4
%9 = phi i32 [ %7, %4 ], [ 1, %2 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void call_subprojlib() {
  printf("in call_subprojlib: ");
  printf("subprojlib built without zlib\n");
}


x86 assembly (clang, -O0):
<call_subprojlib>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xeee(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_subprojlib>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xee1(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"in call_subprojlib: \00"
@.str.1 = [31 x i8] c"subprojlib built without zlib\0A\00"
define void @call_subprojlib() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"in call_subprojlib: \00"
@str = [30 x i8] c"subprojlib built without zlib\00"
define void @call_subprojlib() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0))
ret void
}
void gtk_rc_set_default_files() {}


x86 assembly (clang, -O0):
<gtk_rc_set_default_files>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_rc_set_default_files>:
ret

LLVM IR (-O0):
define void @gtk_rc_set_default_files() {
ret void
}

LLVM IR (-O2):
define void @gtk_rc_set_default_files() {
ret void
}
/* Variables and functions */
char *__cvt(double, int, int *, int *, int /*<<< orphan*/, int);
char *ecvt(double value, int ndigit, int *__restrict decpt,
           int *__restrict sign) {
  return (__cvt(value, ndigit, decpt, sign, 0, 1));
}


x86 assembly (clang, -O0):
<ecvt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r8d
call   1030 <__cvt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecvt>:
xor    %ecx,%ecx
mov    $0x1,%r8d
jmp    1030 <__cvt@plt>

LLVM IR (-O0):
define i8* @ecvt(double %0, i32 %1, i32* noalias %2, i32* noalias %3) {
%5 = alloca double
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
store double %0, double* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load double, double* %5
%10 = load i32, i32* %6
%11 = load i32*, i32** %7
%12 = load i32*, i32** %8
%13 = call i8* @__cvt(double %9, i32 %10, i32* %11, i32* %12, i32 0, i32 1)
ret i8* %13
}

LLVM IR (-O2):
define i8* @ecvt(double %0, i32 %1, i32* noalias %2, i32* noalias %3) {
%5 = tail call i8* @__cvt(double %0, i32 %1, i32* %2, i32* %3, i32 0, i32 1)
ret i8* %5
}
/* Variables and functions */
int bits_lo(void *ptr) {
  intptr_t int64 = (intptr_t)ptr;
  int64 &= 0x00000000ffffffff;
  return (int)int64;
}


x86 assembly (clang, -O0):
<bits_lo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movabs $0xffffffff,%rax
and    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bits_lo>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32 @bits_lo(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = ptrtoint i8* %4 to i64
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = and i64 %6, 4294967295
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = trunc i64 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @bits_lo(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
ret i32 %3
}