int Expressions_IsAssignOp(int Expressions_sym) {
  return (((Expressions_sym == 31)) || ((Expressions_sym == 76)) ||
          ((Expressions_sym == 77)) || ((Expressions_sym == 78)) ||
          ((Expressions_sym == 79)) || ((Expressions_sym == 75)) ||
          ((Expressions_sym == 80)) || ((Expressions_sym == 81)) ||
          ((Expressions_sym == 82)) || ((Expressions_sym == 83)) ||
          ((Expressions_sym == 84)) || ((Expressions_sym == 85)));
}


x86 assembly (clang, -O0):
<Expressions_IsAssignOp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x1f,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     11b6 <Expressions_IsAssignOp+0xb6>
mov    $0x1,%al
cmpl   $0x4c,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     11b6 <Expressions_IsAssignOp+0xb6>
mov    $0x1,%al
cmpl   $0x4d,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     11b6 <Expressions_IsAssignOp+0xb6>
mov    $0x1,%al
cmpl   $0x4e,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     11b6 <Expressions_IsAssignOp+0xb6>
mov    $0x1,%al
cmpl   $0x4f,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     11b6 <Expressions_IsAssignOp+0xb6>
mov    $0x1,%al
cmpl   $0x4b,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     11b6 <Expressions_IsAssignOp+0xb6>
mov    $0x1,%al
cmpl   $0x50,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     11b6 <Expressions_IsAssignOp+0xb6>
mov    $0x1,%al
cmpl   $0x51,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     11b6 <Expressions_IsAssignOp+0xb6>
mov    $0x1,%al
cmpl   $0x52,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     11b6 <Expressions_IsAssignOp+0xb6>
mov    $0x1,%al
cmpl   $0x53,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     11b6 <Expressions_IsAssignOp+0xb6>
mov    $0x1,%al
cmpl   $0x54,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     11b6 <Expressions_IsAssignOp+0xb6>
cmpl   $0x55,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Expressions_IsAssignOp>:
mov    $0x1,%eax
lea    -0x4b(%rdi),%ecx
cmp    $0xa,%ecx
jae    110e <Expressions_IsAssignOp+0xe>
ret
cmp    $0x1f,%edi
je     110d <Expressions_IsAssignOp+0xd>
xor    %eax,%eax
cmp    $0x55,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @Expressions_IsAssignOp(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 31
br i1 %4, label %38, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 76
br i1 %7, label %38, label %8
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 77
br i1 %10, label %38, label %11
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 78
br i1 %13, label %38, label %14
14: ; preds = %11
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 79
br i1 %16, label %38, label %17
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp eq i32 %18, 75
br i1 %19, label %38, label %20
20: ; preds = %17
%21 = load i32, i32* %2
%22 = icmp eq i32 %21, 80
br i1 %22, label %38, label %23
23: ; preds = %20
%24 = load i32, i32* %2
%25 = icmp eq i32 %24, 81
br i1 %25, label %38, label %26
26: ; preds = %23
%27 = load i32, i32* %2
%28 = icmp eq i32 %27, 82
br i1 %28, label %38, label %29
29: ; preds = %26
%30 = load i32, i32* %2
%31 = icmp eq i32 %30, 83
br i1 %31, label %38, label %32
32: ; preds = %29
%33 = load i32, i32* %2
%34 = icmp eq i32 %33, 84
br i1 %34, label %38, label %35
35: ; preds = %32
%36 = load i32, i32* %2
%37 = icmp eq i32 %36, 85
br label %38
38: ; preds = %35, %32, %29, %26, %23, %20, %17, %14, %11, %8, %5, %1
%39 = phi i1 [ true, %32 ], [ true, %29 ], [ true, %26 ], [ true, %23 ], [ true, %20 ], [ true, %17 ], [ true, %14 ], [ true, %11 ], [ true, %8 ], [ true, %5 ], [ true, %1 ], [ %37, %35 ]
%40 = zext i1 %39 to i32
ret i32 %40
}

LLVM IR (-O2):
define i32 @Expressions_IsAssignOp(i32 %0) {
switch i32 %0, label %2 [
i32 84, label %5
i32 83, label %5
i32 82, label %5
i32 81, label %5
i32 80, label %5
i32 79, label %5
i32 78, label %5
i32 77, label %5
i32 76, label %5
i32 75, label %5
i32 31, label %5
]
2: ; preds = %1
%3 = icmp eq i32 %0, 85
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}