#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ ADXL362_reg_rd(int);
int /*<<< orphan*/ ADXL362_reg_wr(int, int);
int /*<<< orphan*/ delay(int);
void ADXL362_init() {
  ADXL362_reg_wr(0x1F, 0x52);
  ADXL362_reg_rd(0x00);
  ADXL362_reg_rd(0x01);
  ADXL362_reg_rd(0x02);
  ADXL362_reg_rd(0x03);
  ADXL362_reg_wr(0x2A, 0x10);
  ADXL362_reg_wr(0x20, 0x60);
  ADXL362_reg_wr(0x21, 0x00);
  ADXL362_reg_wr(0x27, 0x03);
  ADXL362_reg_wr(0x2D, 0x0A);
  delay(5000);
  ADXL362_reg_rd(0x0B);
}


x86 assembly (clang, -O0):
<ADXL362_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1f,%edi
mov    $0x52,%esi
call   1050 <ADXL362_reg_wr@plt>
xor    %edi,%edi
call   1030 <ADXL362_reg_rd@plt>
mov    $0x1,%edi
call   1030 <ADXL362_reg_rd@plt>
mov    $0x2,%edi
call   1030 <ADXL362_reg_rd@plt>
mov    $0x3,%edi
call   1030 <ADXL362_reg_rd@plt>
mov    $0x2a,%edi
mov    $0x10,%esi
call   1050 <ADXL362_reg_wr@plt>
mov    $0x20,%edi
mov    $0x60,%esi
call   1050 <ADXL362_reg_wr@plt>
mov    $0x21,%edi
xor    %esi,%esi
call   1050 <ADXL362_reg_wr@plt>
mov    $0x27,%edi
mov    $0x3,%esi
call   1050 <ADXL362_reg_wr@plt>
mov    $0x2d,%edi
mov    $0xa,%esi
call   1050 <ADXL362_reg_wr@plt>
mov    $0x1388,%edi
call   1040 <delay@plt>
mov    $0xb,%edi
call   1030 <ADXL362_reg_rd@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADXL362_init>:
push   %rax
mov    $0x1f,%edi
mov    $0x52,%esi
call   1050 <ADXL362_reg_wr@plt>
xor    %edi,%edi
call   1030 <ADXL362_reg_rd@plt>
mov    $0x1,%edi
call   1030 <ADXL362_reg_rd@plt>
mov    $0x2,%edi
call   1030 <ADXL362_reg_rd@plt>
mov    $0x3,%edi
call   1030 <ADXL362_reg_rd@plt>
mov    $0x2a,%edi
mov    $0x10,%esi
call   1050 <ADXL362_reg_wr@plt>
mov    $0x20,%edi
mov    $0x60,%esi
call   1050 <ADXL362_reg_wr@plt>
mov    $0x21,%edi
xor    %esi,%esi
call   1050 <ADXL362_reg_wr@plt>
mov    $0x27,%edi
mov    $0x3,%esi
call   1050 <ADXL362_reg_wr@plt>
mov    $0x2d,%edi
mov    $0xa,%esi
call   1050 <ADXL362_reg_wr@plt>
mov    $0x1388,%edi
call   1040 <delay@plt>
mov    $0xb,%edi
pop    %rax
jmp    1030 <ADXL362_reg_rd@plt>

LLVM IR (-O0):
define void @ADXL362_init() {
%1 = call i32 @ADXL362_reg_wr(i32 31, i32 82)
%2 = call i32 @ADXL362_reg_rd(i32 0)
%3 = call i32 @ADXL362_reg_rd(i32 1)
%4 = call i32 @ADXL362_reg_rd(i32 2)
%5 = call i32 @ADXL362_reg_rd(i32 3)
%6 = call i32 @ADXL362_reg_wr(i32 42, i32 16)
%7 = call i32 @ADXL362_reg_wr(i32 32, i32 96)
%8 = call i32 @ADXL362_reg_wr(i32 33, i32 0)
%9 = call i32 @ADXL362_reg_wr(i32 39, i32 3)
%10 = call i32 @ADXL362_reg_wr(i32 45, i32 10)
%11 = call i32 @delay(i32 5000)
%12 = call i32 @ADXL362_reg_rd(i32 11)
ret void
}

LLVM IR (-O2):
define void @ADXL362_init() {
%1 = tail call i32 @ADXL362_reg_wr(i32 31, i32 82)
%2 = tail call i32 @ADXL362_reg_rd(i32 0)
%3 = tail call i32 @ADXL362_reg_rd(i32 1)
%4 = tail call i32 @ADXL362_reg_rd(i32 2)
%5 = tail call i32 @ADXL362_reg_rd(i32 3)
%6 = tail call i32 @ADXL362_reg_wr(i32 42, i32 16)
%7 = tail call i32 @ADXL362_reg_wr(i32 32, i32 96)
%8 = tail call i32 @ADXL362_reg_wr(i32 33, i32 0)
%9 = tail call i32 @ADXL362_reg_wr(i32 39, i32 3)
%10 = tail call i32 @ADXL362_reg_wr(i32 45, i32 10)
%11 = tail call i32 @delay(i32 5000)
%12 = tail call i32 @ADXL362_reg_rd(i32 11)
ret void
}