void uart_init() {
  register unsigned int r;
  *((volatile unsigned int *)(0x3F000000 + 0x00215004)) |= 1;
  *((volatile unsigned int *)(0x3F000000 + 0x00215060)) = 0;
  *((volatile unsigned int *)(0x3F000000 + 0x0021504C)) = 3;
  *((volatile unsigned int *)(0x3F000000 + 0x00215050)) = 0;
  *((volatile unsigned int *)(0x3F000000 + 0x00215044)) = 0;
  *((volatile unsigned int *)(0x3F000000 + 0x00215048)) = 0xc6;
  *((volatile unsigned int *)(0x3F000000 + 0x00215068)) = 270;
  r = *((volatile unsigned int *)(0x3F000000 + 0x00200004));
  r &= ~((7 << 12) | (7 << 15));
  r |= (2 << 12) | (2 << 15);
  *((volatile unsigned int *)(0x3F000000 + 0x00200004)) = r;
  *((volatile unsigned int *)(0x3F000000 + 0x00200094)) = 0;
  r = 150;
  while (r--) {
    asm volatile("nop");
  }
  *((volatile unsigned int *)(0x3F000000 + 0x00200098)) = (1 << 14) | (1 << 15);
  r = 150;
  while (r--) {
    asm volatile("nop");
  }
  *((volatile unsigned int *)(0x3F000000 + 0x00200098)) = 0;
  *((volatile unsigned int *)(0x3F000000 + 0x00215060)) = 3;
}


x86 assembly (clang, -O0):
<uart_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3f215004,%eax
mov    (%rax),%ecx
or     $0x1,%ecx
mov    $0x3f215004,%eax
mov    %ecx,(%rax)
mov    $0x3f215060,%eax
movl   $0x0,(%rax)
mov    $0x3f21504c,%eax
movl   $0x3,(%rax)
mov    $0x3f215050,%eax
movl   $0x0,(%rax)
mov    $0x3f215044,%eax
movl   $0x0,(%rax)
mov    $0x3f215048,%eax
movl   $0xc6,(%rax)
mov    $0x3f215068,%eax
movl   $0x10e,(%rax)
mov    $0x3f200004,%eax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfffc0fff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     $0x12000,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x3f200004,%eax
mov    %ecx,(%rax)
mov    $0x3f200094,%eax
movl   $0x0,(%rax)
movl   $0x96,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     11ad <uart_init+0xad>
nop
jmp    1193 <uart_init+0x93>
mov    $0x3f200098,%eax
movl   $0xc000,(%rax)
movl   $0x96,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     11d9 <uart_init+0xd9>
nop
jmp    11bf <uart_init+0xbf>
mov    $0x3f200098,%eax
movl   $0x0,(%rax)
mov    $0x3f215060,%eax
movl   $0x3,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_init>:
orl    $0x1,0x3f215004
01
movl   $0x0,0x3f215060
movl   $0x3,0x3f21504c
movl   $0x0,0x3f215050
movl   $0x0,0x3f215044
movl   $0xc6,0x3f215048
movl   $0x10e,0x3f215068
mov    $0xfffc0fff,%eax
and    0x3f200004,%eax
or     $0x12000,%eax
mov    %eax,0x3f200004
movl   $0x0,0x3f200094
mov    $0xffffff6a,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
nop
inc    %eax
jne    1180 <uart_init+0x80>
movl   $0xc000,0x3f200098
mov    $0xffffff6a,%eax
cs nopw 0x0(%rax,%rax,1)
nop
nop
inc    %eax
jne    11a0 <uart_init+0xa0>
movl   $0x0,0x3f200098
movl   $0x3,0x3f215060
ret

LLVM IR (-O0):
define void @uart_init() {
%1 = alloca i32
%2 = load volatile i32, i32* inttoptr (i64 1059147780 to i32*)
%3 = or i32 %2, 1
store volatile i32 %3, i32* inttoptr (i64 1059147780 to i32*)
store volatile i32 0, i32* inttoptr (i64 1059147872 to i32*)
store volatile i32 3, i32* inttoptr (i64 1059147852 to i32*)
store volatile i32 0, i32* inttoptr (i64 1059147856 to i32*)
store volatile i32 0, i32* inttoptr (i64 1059147844 to i32*)
store volatile i32 198, i32* inttoptr (i64 1059147848 to i32*)
store volatile i32 270, i32* inttoptr (i64 1059147880 to i32*)
%4 = load volatile i32, i32* inttoptr (i64 1059061764 to i32*)
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = and i32 %5, -258049
store i32 %6, i32* %1
%7 = load i32, i32* %1
%8 = or i32 %7, 73728
store i32 %8, i32* %1
%9 = load i32, i32* %1
store volatile i32 %9, i32* inttoptr (i64 1059061764 to i32*)
store volatile i32 0, i32* inttoptr (i64 1059061908 to i32*)
store i32 150, i32* %1
br label %10
10: ; preds = %14, %0
%11 = load i32, i32* %1
%12 = add i32 %11, -1
store i32 %12, i32* %1
%13 = icmp ne i32 %11, 0
br i1 %13, label %14, label %15
14: ; preds = %10
br label %10
15: ; preds = %10
store volatile i32 49152, i32* inttoptr (i64 1059061912 to i32*)
store i32 150, i32* %1
br label %16
16: ; preds = %20, %15
%17 = load i32, i32* %1
%18 = add i32 %17, -1
store i32 %18, i32* %1
%19 = icmp ne i32 %17, 0
br i1 %19, label %20, label %21
20: ; preds = %16
br label %16
21: ; preds = %16
store volatile i32 0, i32* inttoptr (i64 1059061912 to i32*)
store volatile i32 3, i32* inttoptr (i64 1059147872 to i32*)
ret void
}

LLVM IR (-O2):
define void @uart_init() {
%1 = load volatile i32, i32* inttoptr (i64 1059147780 to i32*)
%2 = or i32 %1, 1
store volatile i32 %2, i32* inttoptr (i64 1059147780 to i32*)
store volatile i32 0, i32* inttoptr (i64 1059147872 to i32*)
store volatile i32 3, i32* inttoptr (i64 1059147852 to i32*)
store volatile i32 0, i32* inttoptr (i64 1059147856 to i32*)
store volatile i32 0, i32* inttoptr (i64 1059147844 to i32*)
store volatile i32 198, i32* inttoptr (i64 1059147848 to i32*)
store volatile i32 270, i32* inttoptr (i64 1059147880 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 1059061764 to i32*)
%4 = and i32 %3, -258049
%5 = or i32 %4, 73728
store volatile i32 %5, i32* inttoptr (i64 1059061764 to i32*)
store volatile i32 0, i32* inttoptr (i64 1059061908 to i32*)
br label %6
6: ; preds = %0, %6
%7 = phi i32 [ 150, %0 ], [ %8, %6 ]
%8 = add nsw i32 %7, -1
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %6
10: ; preds = %6
store volatile i32 49152, i32* inttoptr (i64 1059061912 to i32*)
br label %11
11: ; preds = %10, %11
%12 = phi i32 [ 150, %10 ], [ %13, %11 ]
%13 = add nsw i32 %12, -1
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %11
15: ; preds = %11
store volatile i32 0, i32* inttoptr (i64 1059061912 to i32*)
store volatile i32 3, i32* inttoptr (i64 1059147872 to i32*)
ret void
}