xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
void setpwent(void) { errno = ENOSYS; }


x86 assembly (clang, -O0):
<setpwent>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec4(%rip),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setpwent>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define void @setpwent() {
%1 = load i32, i32* @ENOSYS
store i32 %1, i32* @errno
ret void
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define void @setpwent() {
%1 = load i32, i32* @ENOSYS
store i32 %1, i32* @errno
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int min_maps;
};
typedef TYPE_1__ Screen;

/* Variables and functions */
void set_Screen_min_maps(void *_p, int _v) {
  ((Screen *)_p)->min_maps = (int)_v;
}


x86 assembly (clang, -O0):
<set_Screen_min_maps>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_Screen_min_maps>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_Screen_min_maps(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_Screen_min_maps(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
int cell_compare(const void *c1, const void *c2) {
  tupi_exception(__FUNCTION__,
                 "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
                 "outputs/2022-01-22/02-19-57/repos/schnorr/viva/refs/heads/"
                 "master/src/libtupi/cell.c",
                 52, "not implemented");
  return 0;
}


x86 assembly (clang, -O0):
<cell_compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
lea    0xedf(%rip),%rsi
mov    $0x34,%edx
lea    0xf5f(%rip),%rcx
mov    $0x0,%al
call   1030 <tupi_exception@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cell_compare>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xeee(%rip),%rsi
lea    0xf73(%rip),%rcx
mov    $0x34,%edx
xor    %eax,%eax
call   1030 <tupi_exception@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__FUNCTION__.cell_compare = [13 x i8] c"cell_compare\00"
@.str = [140 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/schnorr/viva/refs/heads/master/src/libtupi/cell.c\00"
@.str.1 = [16 x i8] c"not implemented\00"
define i32 @cell_compare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = call i32 (i8*, i8*, i32, i8*, ...) bitcast (i32 (...)* @tupi_exception to i32 (i8*, i8*, i32, i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__FUNCTION__.cell_compare, i64 0, i64 0), i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str, i64 0, i64 0), i32 52, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@__FUNCTION__.cell_compare = [13 x i8] c"cell_compare\00"
@.str = [140 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/schnorr/viva/refs/heads/master/src/libtupi/cell.c\00"
@.str.1 = [16 x i8] c"not implemented\00"
define i32 @cell_compare(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 (i8*, i8*, i32, i8*, ...) bitcast (i32 (...)* @tupi_exception to i32 (i8*, i8*, i32, i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__FUNCTION__.cell_compare, i64 0, i64 0), i8* getelementptr inbounds ([140 x i8], [140 x i8]* @.str, i64 0, i64 0), i32 52, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xa5() {
  Assert_real((islower(165) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              830, ("islower should be 0 for 0xa5"));
}


x86 assembly (clang, -O0):
<t_islower_0xa5>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa5,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x33e,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xa5>:
push   %rax
mov    $0xa5,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x33e,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xa5\00"
define void @t_islower_0xa5() {
%1 = call i64 @islower(i32 165)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 830, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xa5\00"
define void @t_islower_0xa5() {
%1 = tail call i64 @islower(i32 165)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 830, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void idr_get_new_above(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<idr_get_new_above>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<idr_get_new_above>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.idr_get_new_above = [18 x i8] c"idr_get_new_above\00"
define void @idr_get_new_above() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @__func__.idr_get_new_above, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.idr_get_new_above = [18 x i8] c"idr_get_new_above\00"
define void @idr_get_new_above() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @__func__.idr_get_new_above, i64 0, i64 0))
ret void
}
void MemClr_OFILM(unsigned char *NcTgtPtr_OFILM,
                  unsigned short UsClrSiz_OFILM) {
  unsigned short UsClrIdx_OFILM;
  for (UsClrIdx_OFILM = 0; UsClrIdx_OFILM < UsClrSiz_OFILM; UsClrIdx_OFILM++) {
    *NcTgtPtr_OFILM = 0;
    NcTgtPtr_OFILM++;
  }
}


x86 assembly (clang, -O0):
<MemClr_OFILM>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
movw   $0x0,-0xc(%rbp)
movzwl -0xc(%rbp),%eax
movzwl -0xa(%rbp),%ecx
cmp    %ecx,%eax
jge    1149 <MemClr_OFILM+0x49>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0xc(%rbp)
jmp    1115 <MemClr_OFILM+0x15>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MemClr_OFILM>:
test   %esi,%esi
je     1123 <MemClr_OFILM+0x13>
push   %rax
movzwl %si,%edx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @MemClr_OFILM(i8* %0, i16 zeroext %1) {
%3 = alloca i8*
%4 = alloca i16
%5 = alloca i16
store i8* %0, i8** %3
store i16 %1, i16* %4
store i16 0, i16* %5
br label %6
6: ; preds = %16, %2
%7 = load i16, i16* %5
%8 = zext i16 %7 to i32
%9 = load i16, i16* %4
%10 = zext i16 %9 to i32
%11 = icmp slt i32 %8, %10
br i1 %11, label %12, label %19
12: ; preds = %6
%13 = load i8*, i8** %3
store i8 0, i8* %13
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %3
br label %16
16: ; preds = %12
%17 = load i16, i16* %5
%18 = add i16 %17, 1
store i16 %18, i16* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @MemClr_OFILM(i8* nocapture writeonly %0, i16 zeroext %1) {
%3 = icmp eq i16 %1, 0
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = zext i16 %1 to i64
br label %6
6: ; preds = %4, %2
ret void
}
/* Variables and functions */
scalar_t__ httplex__is_literal(int /*<<< orphan*/);
size_t httplex__literal_length(const char *str) {
  size_t len = 0;
  while (httplex__is_literal(*str++))
    ++len;
  return len;
}


x86 assembly (clang, -O0):
<httplex__literal_length>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <httplex__is_literal@plt>
cmp    $0x0,%rax
je     1156 <httplex__literal_length+0x46>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <httplex__literal_length+0x14>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<httplex__literal_length>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
movsbl (%rdi),%edi
call   1030 <httplex__is_literal@plt>
xor    %ebx,%ebx
test   %rax,%rax
je     1144 <httplex__literal_length+0x34>
cs nopw 0x0(%rax,%rax,1)
movsbl 0x1(%r14,%rbx,1),%edi
add    $0x1,%rbx
call   1030 <httplex__is_literal@plt>
test   %rax,%rax
jne    1130 <httplex__literal_length+0x20>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @httplex__literal_length(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
%9 = call i64 @httplex__is_literal(i32 %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i64, i64* %3
%13 = add i64 %12, 1
store i64 %13, i64* %3
br label %4
14: ; preds = %4
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @httplex__literal_length(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = tail call i64 @httplex__is_literal(i32 %3)
%5 = icmp eq i64 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %1, %6
%7 = phi i64 [ %10, %6 ], [ 0, %1 ]
%8 = phi i8* [ %9, %6 ], [ %0, %1 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = add i64 %7, 1
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = tail call i64 @httplex__is_literal(i32 %12)
%14 = icmp eq i64 %13, 0
br i1 %14, label %15, label %6
15: ; preds = %6, %1
%16 = phi i64 [ 0, %1 ], [ %10, %6 ]
ret i64 %16
}
long fib(int n) {
  if (n == 0)
    return 0l;
  else if (n == 1)
    return 1l;
  else
    return fib(n - 1) + fib(n - 2);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1132 <fib+0x22>
movq   $0x0,-0x8(%rbp)
jmp    1171 <fib+0x61>
cmpl   $0x1,-0xc(%rbp)
jne    1149 <fib+0x39>
movq   $0x1,-0x8(%rbp)
jmp    1171 <fib+0x61>
mov    -0xc(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %r14d,%r14d
test   %ebx,%ebx
je     1137 <fib+0x27>
nopl   (%rax)
cmp    $0x1,%ebx
je     113b <fib+0x2b>
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
add    %rax,%r14
add    $0xfffffffe,%ebx
test   %ebx,%ebx
jne    1120 <fib+0x10>
xor    %eax,%eax
jmp    1140 <fib+0x30>
mov    $0x1,%eax
add    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @fib(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 1, i64* %2
br label %19
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 1
%14 = call i64 @fib(i32 %13)
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 2
%17 = call i64 @fib(i32 %16)
%18 = add nsw i64 %14, %17
store i64 %18, i64* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i64, i64* %2
ret i64 %20
}

LLVM IR (-O2):
define i64 @fib(i32 %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i64 [ 0, %1 ], [ %9, %5 ]
%4 = phi i32 [ %0, %1 ], [ %8, %5 ]
switch i32 %4, label %5 [
i32 0, label %10
i32 1, label %11
]
5: ; preds = %2
%6 = add nsw i32 %4, -1
%7 = tail call i64 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i64 %7, %3
br label %2
10: ; preds = %2
br label %11
11: ; preds = %2, %10
%12 = phi i64 [ 0, %10 ], [ 1, %2 ]
%13 = add nsw i64 %12, %3
ret i64 %13
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
void *malloc(size_t);
int /*<<< orphan*/ stderr;
void *emalloc(size_t size) {
  void *ret = malloc(size);
  if (ret == NULL) {
    fprintf(stderr, "%s\n", "malloc() has failed.");
    exit(EXIT_FAILURE);
  }
  return ret;
}


x86 assembly (clang, -O0):
<emalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    117e <emalloc+0x4e>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
lea    0xe99(%rip),%rdx
call   1030 <fprintf@plt>
mov    0x2e61(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emalloc>:
push   %rax
call   1040 <malloc@plt>
test   %rax,%rax
je     113d <emalloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
lea    0xeb0(%rip),%rdx
call   1030 <fprintf@plt>
mov    0x2e78(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [21 x i8] c"malloc() has failed.\00"
@EXIT_FAILURE = global i32 0
define i8* @emalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
%11 = load i32, i32* @EXIT_FAILURE
%12 = call i32 @exit(i32 %11)
unreachable
13: ; preds = %1
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [21 x i8] c"malloc() has failed.\00"
@EXIT_FAILURE = global i32 0
define noalias i8* @emalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
9: ; preds = %1
ret i8* %2
}
void gdt_reinit() {}


x86 assembly (clang, -O0):
<gdt_reinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdt_reinit>:
ret

LLVM IR (-O0):
define void @gdt_reinit() {
ret void
}

LLVM IR (-O2):
define void @gdt_reinit() {
ret void
}
/* Variables and functions */
int bar(int);
int __attribute__((no)) foo(int y) { return y + bar(y); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bar@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
mov    %edi,%ebx
call   1030 <bar@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @bar(i32 %4)
%6 = add nsw i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = tail call i32 @bar(i32 %0)
%3 = add nsw i32 %2, %0
ret i32 %3
}
unsigned int name_hash(const char *name) {
  unsigned int hash = 0;
  const char *p;
  p = name;
  while (*p) {
    if (*p == ';') {
      break;
    }
    hash = (hash << 15) + (hash << 3) + (hash >> 3) + *p++;
  }
  return hash % 128;
}


x86 assembly (clang, -O0):
<name_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     116b <name_hash+0x6b>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x3b,%eax
jne    1139 <name_hash+0x39>
jmp    116b <name_hash+0x6b>
mov    -0xc(%rbp),%eax
shl    $0xf,%eax
mov    -0xc(%rbp),%ecx
shl    $0x3,%ecx
add    %ecx,%eax
mov    -0xc(%rbp),%ecx
shr    $0x3,%ecx
add    %ecx,%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movsbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    1117 <name_hash+0x17>
mov    -0xc(%rbp),%eax
and    $0x7f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<name_hash>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl (%rdi),%ecx
test   %ecx,%ecx
je     1131 <name_hash+0x31>
cmp    $0x3b,%cl
je     1131 <name_hash+0x31>
mov    %eax,%edx
shl    $0xf,%edx
lea    (%rdx,%rax,8),%edx
shr    $0x3,%eax
add    %edx,%eax
add    $0x1,%rdi
add    %ecx,%eax
jmp    1110 <name_hash+0x10>
and    $0x7f,%eax
ret

LLVM IR (-O0):
define i32 @name_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
store i32 0, i32* %3
%5 = load i8*, i8** %2
store i8* %5, i8** %4
br label %6
6: ; preds = %16, %1
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %30
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 59
br i1 %14, label %15, label %16
15: ; preds = %10
br label %30
16: ; preds = %10
%17 = load i32, i32* %3
%18 = shl i32 %17, 15
%19 = load i32, i32* %3
%20 = shl i32 %19, 3
%21 = add i32 %18, %20
%22 = load i32, i32* %3
%23 = lshr i32 %22, 3
%24 = add i32 %21, %23
%25 = load i8*, i8** %4
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %4
%27 = load i8, i8* %25
%28 = sext i8 %27 to i32
%29 = add i32 %24, %28
store i32 %29, i32* %3
br label %6
30: ; preds = %15, %6
%31 = load i32, i32* %3
%32 = urem i32 %31, 128
ret i32 %32
}

LLVM IR (-O2):
define i32 @name_hash(i8* nocapture %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i32 [ 0, %1 ], [ %12, %6 ]
%4 = phi i8* [ %0, %1 ], [ %11, %6 ]
%5 = load i8, i8* %4
switch i8 %5, label %6 [
i8 0, label %13
i8 59, label %13
]
6: ; preds = %2
%7 = sext i8 %5 to i32
%8 = mul i32 %3, 32776
%9 = lshr i32 %3, 3
%10 = add i32 %8, %9
%11 = getelementptr inbounds i8, i8* %4, i64 1
%12 = add i32 %10, %7
br label %2
13: ; preds = %2, %2
%14 = and i32 %3, 127
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ liberr_fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void liberr_dlcheck(const char *err) {
  if (err != NULL) {
    liberr_fprintf(stderr, "liberr: Dynamic linking error.");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<liberr_dlcheck>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1156 <liberr_dlcheck+0x36>
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
lea    0xeb9(%rip),%rsi
call   1030 <liberr_fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<liberr_dlcheck>:
test   %rdi,%rdi
jne    1126 <liberr_dlcheck+0x6>
ret
push   %rax
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
lea    0xec9(%rip),%rsi
call   1030 <liberr_fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [31 x i8] c"liberr: Dynamic linking error.\00"
define void @liberr_dlcheck(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* @stderr
%7 = call i32 @liberr_fprintf(i32 %6, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @exit(i32 1)
unreachable
9: ; preds = %1
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [31 x i8] c"liberr: Dynamic linking error.\00"
define void @liberr_dlcheck(i8* readnone %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = load i32, i32* @stderr
%5 = tail call i32 @liberr_fprintf(i32 %4, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putnbr(int);
void ft_putnbr_pt(void *n) {
  ft_putnbr(*(int *)n);
  return;
}


x86 assembly (clang, -O0):
<ft_putnbr_pt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <ft_putnbr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putnbr_pt>:
mov    (%rdi),%edi
jmp    1030 <ft_putnbr@plt>

LLVM IR (-O0):
define void @ft_putnbr_pt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = call i32 @ft_putnbr(i32 %5)
ret void
}

LLVM IR (-O2):
define void @ft_putnbr_pt(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @ft_putnbr(i32 %3)
ret void
}
/* Variables and functions */
scalar_t__ memcpy(char *, void const *, size_t);
char *Memcpy(char *d, const void *s, size_t n) {
  return (char *)memcpy(d, s, n);
}


x86 assembly (clang, -O0):
<Memcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Memcpy>:
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define i8* @Memcpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i64 @memcpy(i8* %7, i8* %8, i64 %9)
%11 = inttoptr i64 %10 to i8*
ret i8* %11
}

LLVM IR (-O2):
define i8* @Memcpy(i8* %0, i8* %1, i64 %2) {
%4 = tail call i64 @memcpy(i8* %0, i8* %1, i64 %2)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}
/* Variables and functions */
int strcasecmp(char const *, char const *);
__attribute__((__weak__, __always___)) int
softboundcets_strcasecmp(const char *s1, const char *s2) {
  return strcasecmp(s1, s2);
}


x86 assembly (clang, -O0):
<softboundcets_strcasecmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcasecmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_strcasecmp>:
jmp    1030 <strcasecmp@plt>

LLVM IR (-O0):
define weak i32 @softboundcets_strcasecmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcasecmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define weak i32 @softboundcets_strcasecmp(i8* %0, i8* %1) {
%3 = tail call i32 @strcasecmp(i8* %0, i8* %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ EAGAIN;
scalar_t__ errno;
int /*<<< orphan*/ *fgets(char *, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ rewind(int /*<<< orphan*/ *);
void fgetfirstline(char *line, int size, FILE *fp) {
  rewind(fp);
  while (fgets(line, size, fp) != NULL || errno == EAGAIN)
    ;
}


x86 assembly (clang, -O0):
<fgetfirstline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <rewind@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1040 <fgets@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x19(%rbp)
jne    1178 <fgetfirstline+0x58>
mov    0x2e7b(%rip),%rax
mov    (%rax),%rax
mov    0x2e61(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    1188 <fgetfirstline+0x68>
jmp    118d <fgetfirstline+0x6d>
jmp    113c <fgetfirstline+0x1c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgetfirstline>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %rdx,%rbx
mov    %esi,%r14d
mov    %rdi,%rbp
mov    %rdx,%rdi
call   1030 <rewind@plt>
mov    0x2ea0(%rip),%r15
mov    0x2e89(%rip),%r12
nopw   0x0(%rax,%rax,1)
mov    %rbp,%rdi
mov    %r14d,%esi
mov    %rbx,%rdx
call   1040 <fgets@plt>
test   %rax,%rax
jne    1150 <fgetfirstline+0x30>
mov    (%r12),%rax
cmp    %rax,(%r15)
je     1150 <fgetfirstline+0x30>
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@errno = global i64 0
@EAGAIN = global i64 0
define void @fgetfirstline(i8* %0, i32 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32*, i32** %6
%8 = call i32 @rewind(i32* %7)
br label %9
9: ; preds = %21, %3
%10 = load i8*, i8** %4
%11 = load i32, i32* %5
%12 = load i32*, i32** %6
%13 = call i32* @fgets(i8* %10, i32 %11, i32* %12)
%14 = icmp ne i32* %13, null
br i1 %14, label %19, label %15
15: ; preds = %9
%16 = load i64, i64* @errno
%17 = load i64, i64* @EAGAIN
%18 = icmp eq i64 %16, %17
br label %19
19: ; preds = %15, %9
%20 = phi i1 [ true, %9 ], [ %18, %15 ]
br i1 %20, label %21, label %22
21: ; preds = %19
br label %9
22: ; preds = %19
ret void
}

LLVM IR (-O2):
@errno = global i64 0
@EAGAIN = global i64 0
define void @fgetfirstline(i8* %0, i32 %1, i32* nocapture %2) {
%4 = tail call i32 @rewind(i32* %2)
br label %5
5: ; preds = %5, %3
%6 = tail call i32* @fgets(i8* %0, i32 %1, i32* %2)
%7 = icmp ne i32* %6, null
%8 = load i64, i64* @errno
%9 = load i64, i64* @EAGAIN
%10 = icmp eq i64 %8, %9
%11 = select i1 %7, i1 true, i1 %10
br i1 %11, label %5, label %12
12: ; preds = %5
ret void
}
int isalpha_separator(const void *arg) {
  char *tmp;
  tmp = (char *)arg;
  if (((*tmp >= 'a') && (*tmp <= 'z')) || ((*tmp >= 'A') && (*tmp <= 'Z'))) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<isalpha_separator>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x61,%eax
jl     1130 <isalpha_separator+0x30>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x7a,%eax
jle    1150 <isalpha_separator+0x50>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x41,%eax
jl     115c <isalpha_separator+0x5c>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5a,%eax
jg     115c <isalpha_separator+0x5c>
movl   $0x1,-0x4(%rbp)
jmp    1163 <isalpha_separator+0x63>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalpha_separator>:
mov    (%rdi),%cl
and    $0xdf,%cl
add    $0xbf,%cl
xor    %eax,%eax
cmp    $0x1a,%cl
setb   %al
ret

LLVM IR (-O0):
define i32 @isalpha_separator(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
store i8* %5, i8** %4
%6 = load i8*, i8** %4
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp sge i32 %8, 97
br i1 %9, label %10, label %15
10: ; preds = %1
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp sle i32 %13, 122
br i1 %14, label %25, label %15
15: ; preds = %10, %1
%16 = load i8*, i8** %4
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp sge i32 %18, 65
br i1 %19, label %20, label %26
20: ; preds = %15
%21 = load i8*, i8** %4
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = icmp sle i32 %23, 90
br i1 %24, label %25, label %26
25: ; preds = %20, %10
store i32 1, i32* %2
br label %27
26: ; preds = %20, %15
store i32 0, i32* %2
br label %27
27: ; preds = %26, %25
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @isalpha_separator(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -33
%4 = add i8 %3, -65
%5 = icmp ult i8 %4, 26
%6 = zext i1 %5 to i32
ret i32 %6
}
void ff_hevc_put_hevc_bi_w_epel_v4_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_v4_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_v4_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_v4_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_v4_12_sse4() {
ret void
}
int counter(int val, int count) {
  if ((val > 2) && (val < 7)) {
    count++;
  } else if (val == 10) {
    count--;
  }
  return count;
}


x86 assembly (clang, -O0):
<counter>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x2,-0x4(%rbp)
jle    112c <counter+0x2c>
cmpl   $0x7,-0x4(%rbp)
jge    112c <counter+0x2c>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1144 <counter+0x44>
cmpl   $0xa,-0x4(%rbp)
jne    113f <counter+0x3f>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    1144 <counter+0x44>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<counter>:
lea    -0x3(%rdi),%eax
xor    %ecx,%ecx
cmp    $0xa,%edi
sete   %cl
neg    %ecx
cmp    $0x4,%eax
mov    $0x1,%eax
cmovae %ecx,%eax
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @counter(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 2
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 7
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
br label %20
13: ; preds = %7, %2
%14 = load i32, i32* %3
%15 = icmp eq i32 %14, 10
br i1 %15, label %16, label %19
16: ; preds = %13
%17 = load i32, i32* %4
%18 = add nsw i32 %17, -1
store i32 %18, i32* %4
br label %19
19: ; preds = %16, %13
br label %20
20: ; preds = %19, %10
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @counter(i32 %0, i32 %1) {
%3 = add i32 %0, -3
%4 = icmp ult i32 %3, 4
%5 = icmp eq i32 %0, 10
%6 = sext i1 %5 to i32
%7 = select i1 %4, i32 1, i32 %6
%8 = add nsw i32 %7, %1
ret i32 %8
}
long double atan2l(long double x, long double y) {
  long double r;
  __asm__ __volatile__("fpatan" : "=t"(r) : "0"(x), "u"(y));
  return r;
}


x86 assembly (clang, -O0):
<atan2l>:
push   %rbp
mov    %rsp,%rbp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
fxch   %st(1)
fpatan
fstp   %st(1)
fstpt  -0x30(%rbp)
fldt   -0x30(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atan2l>:
fldt   0x8(%rsp)
fldt   0x18(%rsp)
fxch   %st(1)
fpatan
fstp   %st(1)
ret

LLVM IR (-O0):
define x86_fp80 @atan2l(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
%5 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%6 = load x86_fp80, x86_fp80* %3
%7 = load x86_fp80, x86_fp80* %4
%8 = call x86_fp80 asm sideeffect "fpatan", "={st},0,{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %6, x86_fp80 %7)
store x86_fp80 %8, x86_fp80* %5
%9 = load x86_fp80, x86_fp80* %5
ret x86_fp80 %9
}

LLVM IR (-O2):
define x86_fp80 @atan2l(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call x86_fp80 asm sideeffect "fpatan", "={st},0,{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %0, x86_fp80 %1)
ret x86_fp80 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void printArray(int a[], int n) {
  int i;
  for (i = 0; i < n; ++i)
    printf("%i ", a[i]);
}


x86 assembly (clang, -O0):
<printArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1157 <printArray+0x47>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <printArray+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printArray>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1145 <printArray+0x35>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <printArray+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%i \00"
define void @printArray(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%i \00"
define void @printArray(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ x;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fwrite(int *, int, int, int /*<<< orphan*/ *);
void DumpInt(int x, FILE *D) { fwrite(&x, sizeof(x), 1, D); }


x86 assembly (clang, -O0):
<DumpInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
lea    -0x4(%rbp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fwrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DumpInt>:
push   %rax
mov    %rsi,%rcx
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fwrite@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @DumpInt(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = call i32 @fwrite(i32* %3, i32 4, i32 1, i32* %5)
ret void
}

LLVM IR (-O2):
define void @DumpInt(i32 %0, i32* nocapture %1) {
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 @fwrite(i32* %3, i32 4, i32 1, i32* %1)
ret void
}
int issquare(unsigned n) {
  unsigned i;
  if (n == 1)
    return 1;
  for (i = 1; i < n && n != i * i; ++i)
    ;
  return i != n;
}


x86 assembly (clang, -O0):
<issquare>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    111d <issquare+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    117b <issquare+0x7b>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
xor    %eax,%eax
cmp    -0x8(%rbp),%ecx
mov    %al,-0xd(%rbp)
jae    1147 <issquare+0x47>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
imul   -0xc(%rbp),%ecx
cmp    %ecx,%eax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1157 <issquare+0x57>
jmp    116a <issquare+0x6a>
jmp    115c <issquare+0x5c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1124 <issquare+0x24>
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<issquare>:
mov    $0x1,%eax
cmp    $0x1,%edi
je     112a <issquare+0x2a>
mov    $0x1,%eax
nop
lea    0x1(%rax),%ecx
cmp    %edi,%eax
jae    1120 <issquare+0x20>
imul   %eax,%eax
cmp    %edi,%eax
mov    %ecx,%eax
jne    1110 <issquare+0x10>
sub    %edi,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
setne  %al
ret

LLVM IR (-O0):
define i32 @issquare(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %30
8: ; preds = %1
store i32 1, i32* %4
br label %9
9: ; preds = %22, %8
%10 = load i32, i32* %4
%11 = load i32, i32* %3
%12 = icmp ult i32 %10, %11
br i1 %12, label %13, label %19
13: ; preds = %9
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = load i32, i32* %4
%17 = mul i32 %15, %16
%18 = icmp ne i32 %14, %17
br label %19
19: ; preds = %13, %9
%20 = phi i1 [ false, %9 ], [ %18, %13 ]
br i1 %20, label %21, label %25
21: ; preds = %19
br label %22
22: ; preds = %21
%23 = load i32, i32* %4
%24 = add i32 %23, 1
store i32 %24, i32* %4
br label %9
25: ; preds = %19
%26 = load i32, i32* %4
%27 = load i32, i32* %3
%28 = icmp ne i32 %26, %27
%29 = zext i1 %28 to i32
store i32 %29, i32* %2
br label %30
30: ; preds = %25, %7
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @issquare(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %9, %3 ], [ 1, %1 ]
%5 = icmp uge i32 %4, %0
%6 = mul i32 %4, %4
%7 = icmp eq i32 %6, %0
%8 = or i1 %5, %7
%9 = add nuw i32 %4, 1
br i1 %8, label %10, label %3
10: ; preds = %3
%11 = icmp ne i32 %4, %0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %1, %10
%14 = phi i32 [ %12, %10 ], [ 1, %1 ]
ret i32 %14
}
/* Type definitions */
typedef int int8_t;

/* Variables and functions */
int8_t av_clip_int8_c(int a) {
  if ((a + 0x80U) & ~0xFF)
    return (a >> 31) ^ 0x7F;
  else
    return a;
}


x86 assembly (clang, -O0):
<av_clip_int8_c>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x80,%eax
and    $0xffffff00,%eax
cmp    $0x0,%eax
je     112e <av_clip_int8_c+0x2e>
mov    -0x8(%rbp),%eax
sar    $0x1f,%eax
xor    $0x7f,%eax
mov    %eax,-0x4(%rbp)
jmp    1134 <av_clip_int8_c+0x34>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_clip_int8_c>:
cmp    $0xffffff81,%edi
mov    $0xffffff80,%ecx
cmovge %edi,%ecx
cmp    $0x7f,%ecx
mov    $0x7f,%eax
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @av_clip_int8_c(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = add i32 %4, 128
%6 = and i32 %5, -256
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32, i32* %3
%10 = ashr i32 %9, 31
%11 = xor i32 %10, 127
store i32 %11, i32* %2
br label %14
12: ; preds = %1
%13 = load i32, i32* %3
store i32 %13, i32* %2
br label %14
14: ; preds = %12, %8
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @av_clip_int8_c(i32 %0) {
%2 = icmp sgt i32 %0, -128
%3 = select i1 %2, i32 %0, i32 -128
%4 = icmp slt i32 %3, 127
%5 = select i1 %4, i32 %3, i32 127
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ putc(short, int /*<<< orphan*/ *);
void write16i(FILE *f, short h) {
  putc(h, f);
  putc(h >> 8, f);
}


x86 assembly (clang, -O0):
<write16i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0xa(%rbp),%ax
mov    -0x8(%rbp),%rsi
movswl %ax,%edi
call   1030 <putc@plt>
movswl -0xa(%rbp),%eax
sar    $0x8,%eax
mov    -0x8(%rbp),%rsi
movswl %ax,%edi
call   1030 <putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write16i>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
mov    %esi,%edi
mov    %r14,%rsi
call   1030 <putc@plt>
sar    $0x8,%ebx
mov    %ebx,%edi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <putc@plt>

LLVM IR (-O0):
define void @write16i(i32* %0, i16 signext %1) {
%3 = alloca i32*
%4 = alloca i16
store i32* %0, i32** %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = load i32*, i32** %3
%7 = call i32 @putc(i16 signext %5, i32* %6)
%8 = load i16, i16* %4
%9 = sext i16 %8 to i32
%10 = ashr i32 %9, 8
%11 = trunc i32 %10 to i16
%12 = load i32*, i32** %3
%13 = call i32 @putc(i16 signext %11, i32* %12)
ret void
}

LLVM IR (-O2):
define void @write16i(i32* nocapture %0, i16 signext %1) {
%3 = tail call i32 @putc(i16 signext %1, i32* %0)
%4 = ashr i16 %1, 8
%5 = tail call i32 @putc(i16 signext %4, i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SYS_tkill;
long syscall(int /*<<< orphan*/, int, int);
long tkill(int tid, int sig) { return syscall(SYS_tkill, tid, sig); }


x86 assembly (clang, -O0):
<tkill>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ed3(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tkill>:
mov    %esi,%edx
mov    %edi,%esi
mov    0x2edd(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_tkill = global i32 0
define i64 @tkill(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @SYS_tkill
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i64 @syscall(i32 %5, i32 %6, i32 %7)
ret i64 %8
}

LLVM IR (-O2):
@SYS_tkill = global i32 0
define i64 @tkill(i32 %0, i32 %1) {
%3 = load i32, i32* @SYS_tkill
%4 = tail call i64 @syscall(i32 %3, i32 %0, i32 %1)
ret i64 %4
}
int rk31sdk_get_sdio_wifi_voltage(void) {
  int voltage;
  voltage = 1800;
  return voltage;
}


x86 assembly (clang, -O0):
<rk31sdk_get_sdio_wifi_voltage>:
push   %rbp
mov    %rsp,%rbp
movl   $0x708,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rk31sdk_get_sdio_wifi_voltage>:
mov    $0x708,%eax
ret

LLVM IR (-O0):
define i32 @rk31sdk_get_sdio_wifi_voltage() {
%1 = alloca i32
store i32 1800, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @rk31sdk_get_sdio_wifi_voltage() {
ret i32 1800
}
void ff_hevc_put_hevc_bi_w_epel_hv4_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_hv4_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_hv4_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_hv4_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_hv4_10_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ default_isr();
__attribute__((weak)) void ADC_Handler() { default_isr(); }


x86 assembly (clang, -O0):
<ADC_Handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <default_isr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC_Handler>:
xor    %eax,%eax
jmp    1030 <default_isr@plt>

LLVM IR (-O0):
define weak void @ADC_Handler() {
%1 = call i32 (...) @default_isr()
ret void
}

LLVM IR (-O2):
define weak void @ADC_Handler() {
%1 = tail call i32 (...) @default_isr()
ret void
}
/* Type definitions */
struct iw_prng {
  int dummy;
};
struct iw_context {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ iw_free(struct iw_context *, void *);
void iwpvt_prng_destroy(struct iw_context *ctx, struct iw_prng *prng) {
  if (prng)
    iw_free(ctx, (void *)prng);
}


x86 assembly (clang, -O0):
<iwpvt_prng_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1138 <iwpvt_prng_destroy+0x28>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <iw_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iwpvt_prng_destroy>:
test   %rsi,%rsi
je     111a <iwpvt_prng_destroy+0xa>
jmp    1030 <iw_free@plt>
ret

LLVM IR (-O0):
%struct.iw_context = type { i32 }
%struct.iw_prng = type { i32 }
define void @iwpvt_prng_destroy(%struct.iw_context* %0, %struct.iw_prng* %1) {
%3 = alloca %struct.iw_context*
%4 = alloca %struct.iw_prng*
store %struct.iw_context* %0, %struct.iw_context** %3
store %struct.iw_prng* %1, %struct.iw_prng** %4
%5 = load %struct.iw_prng*, %struct.iw_prng** %4
%6 = icmp ne %struct.iw_prng* %5, null
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load %struct.iw_context*, %struct.iw_context** %3
%9 = load %struct.iw_prng*, %struct.iw_prng** %4
%10 = bitcast %struct.iw_prng* %9 to i8*
%11 = call i32 @iw_free(%struct.iw_context* %8, i8* %10)
br label %12
12: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
%struct.iw_context = type { i32 }
%struct.iw_prng = type { i32 }
define void @iwpvt_prng_destroy(%struct.iw_context* %0, %struct.iw_prng* %1) {
%3 = icmp eq %struct.iw_prng* %1, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = bitcast %struct.iw_prng* %1 to i8*
%6 = tail call i32 @iw_free(%struct.iw_context* %0, i8* %5)
br label %7
7: ; preds = %4, %2
ret void
}