xunge/DecIR huggingface dataset:
int weird_max(int x, int y) {
  return ({
    int _a = (++x), _b = (--y);
    _a > _b ? _a : _b;
  });
}


x86 assembly (clang, -O0):
<weird_max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    1139 <weird_max+0x39>
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    113f <weird_max+0x3f>
mov    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<weird_max>:
lea    0x1(%rdi),%ecx
lea    -0x1(%rsi),%eax
cmp    %eax,%ecx
cmovg  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @weird_max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = add nsw i32 %10, -1
store i32 %11, i32* %4
store i32 %11, i32* %6
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = icmp sgt i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %2
%16 = load i32, i32* %5
br label %19
17: ; preds = %2
%18 = load i32, i32* %6
br label %19
19: ; preds = %17, %15
%20 = phi i32 [ %16, %15 ], [ %18, %17 ]
store i32 %20, i32* %7
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @weird_max(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 1
%4 = add nsw i32 %1, -1
%5 = icmp sgt i32 %3, %4
%6 = select i1 %5, i32 %3, i32 %4
ret i32 %6
}
/* Variables and functions */
int petcard_value(int);
int valuecomp(const void *a, const void *b) {
  return petcard_value(*(int *)a) - petcard_value(*(int *)b);
}


x86 assembly (clang, -O0):
<valuecomp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <petcard_value@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1030 <petcard_value@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
sub    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<valuecomp>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    (%rdi),%edi
call   1030 <petcard_value@plt>
mov    %eax,%ebp
mov    (%rbx),%edi
call   1030 <petcard_value@plt>
sub    %eax,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @valuecomp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = call i32 @petcard_value(i32 %7)
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
%11 = load i32, i32* %10
%12 = call i32 @petcard_value(i32 %11)
%13 = sub nsw i32 %8, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @valuecomp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = tail call i32 @petcard_value(i32 %4)
%6 = bitcast i8* %1 to i32*
%7 = load i32, i32* %6
%8 = tail call i32 @petcard_value(i32 %7)
%9 = sub nsw i32 %5, %8
ret i32 %9
}
void *pointer_copy(const void *ptr) { return (void *)ptr; }


x86 assembly (clang, -O0):
<pointer_copy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pointer_copy>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @pointer_copy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @pointer_copy(i8* readnone returned %0) {
ret i8* %0
}
void __attribute__((no_instrument_function))
__cyg_profile_func_enter(void *this_fn, void *call_site) {}


x86 assembly (clang, -O0):
<__cyg_profile_func_enter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__cyg_profile_func_enter>:
ret

LLVM IR (-O0):
define void @__cyg_profile_func_enter(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__cyg_profile_func_enter(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
char tolower(char);
char decode_char(char c) {
  c = tolower(c);
  return c <= '9' ? c - '0' : c - 'a' + 10;
}


x86 assembly (clang, -O0):
<decode_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <tolower@plt>
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
jg     1146 <decode_char+0x36>
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
jmp    1153 <decode_char+0x43>
movsbl -0x1(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_char>:
push   %rax
call   1030 <tolower@plt>
cmp    $0x3a,%al
mov    $0xd0,%ecx
mov    $0xa9,%edx
cmovl  %ecx,%edx
add    %dl,%al
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @decode_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call signext i8 @tolower(i8 signext %3)
store i8 %4, i8* %2
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = icmp sle i32 %6, 57
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i8, i8* %2
%10 = sext i8 %9 to i32
%11 = sub nsw i32 %10, 48
br label %17
12: ; preds = %1
%13 = load i8, i8* %2
%14 = sext i8 %13 to i32
%15 = sub nsw i32 %14, 97
%16 = add nsw i32 %15, 10
br label %17
17: ; preds = %12, %8
%18 = phi i32 [ %11, %8 ], [ %16, %12 ]
%19 = trunc i32 %18 to i8
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @decode_char(i8 signext %0) {
%2 = tail call signext i8 @tolower(i8 signext %0)
%3 = icmp slt i8 %2, 58
%4 = select i1 %3, i8 -48, i8 -87
%5 = add i8 %4, %2
ret i8 %5
}
void rop3_58_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = *D ^ S;
  stk2 = T | stk3;
  stk1 = S ^ stk2;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_58_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_58_0_0>:
mov    (%rdi),%al
xor    %sil,%al
or     %dl,%al
xor    %sil,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_58_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = load i8, i8* %5
%14 = zext i8 %13 to i32
%15 = xor i32 %12, %14
%16 = trunc i32 %15 to i8
store i8 %16, i8* %9
%17 = load i8, i8* %6
%18 = zext i8 %17 to i32
%19 = load i8, i8* %9
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %8
%23 = load i8, i8* %5
%24 = zext i8 %23 to i32
%25 = load i8, i8* %8
%26 = zext i8 %25 to i32
%27 = xor i32 %24, %26
%28 = trunc i32 %27 to i8
store i8 %28, i8* %7
%29 = load i8, i8* %7
%30 = load i8*, i8** %4
store i8 %29, i8* %30
ret void
}

LLVM IR (-O2):
define void @rop3_58_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, %1
%6 = or i8 %5, %2
%7 = xor i8 %6, %1
store i8 %7, i8* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int __original_openat(int, char const *, int, int /*<<< orphan*/);
int openat(int dirfd, const char *pathname, int flags, mode_t mode) {
  int ret = 0;
  ret = __original_openat(dirfd, pathname, flags, mode);
  return ret;
}


x86 assembly (clang, -O0):
<openat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
call   1030 <__original_openat@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openat>:
jmp    1030 <__original_openat@plt>

LLVM IR (-O0):
define i32 @openat(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i32 0, i32* %9
%10 = load i32, i32* %5
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i32 @__original_openat(i32 %10, i8* %11, i32 %12, i32 %13)
store i32 %14, i32* %9
%15 = load i32, i32* %9
ret i32 %15
}

LLVM IR (-O2):
define i32 @openat(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @__original_openat(i32 %0, i8* %1, i32 %2, i32 %3)
ret i32 %5
}
int numB(int x) { return x * 3; }


x86 assembly (clang, -O0):
<numB>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x3,-0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<numB>:
lea    (%rdi,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @numB(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 3
ret i32 %4
}

LLVM IR (-O2):
define i32 @numB(i32 %0) {
%2 = mul nsw i32 %0, 3
ret i32 %2
}
int usb_autoresume_device(struct usb_device *udev, int inc_busy_cnt) {
  return 0;
}


x86 assembly (clang, -O0):
<usb_autoresume_device>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<usb_autoresume_device>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.usb_device = type opaque
define i32 @usb_autoresume_device(%struct.usb_device* %0, i32 %1) {
%3 = alloca %struct.usb_device*
%4 = alloca i32
store %struct.usb_device* %0, %struct.usb_device** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
%struct.usb_device = type opaque
define i32 @usb_autoresume_device(%struct.usb_device* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void gssalloc_free(void *value) { free(value); }


x86 assembly (clang, -O0):
<gssalloc_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gssalloc_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @gssalloc_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @gssalloc_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void PrintError(char *message) {
  printf("Error: %s\n", message);
  message[0] = '\0';
}


x86 assembly (clang, -O0):
<PrintError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintError>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
movb   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Error: %s\0A\00"
define void @PrintError(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 0
store i8 0, i8* %6
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"Error: %s\0A\00"
define void @PrintError(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
store i8 0, i8* %0
ret void
}
double b_rand() {
  static int first_time = 1;
  static double rnum;
  extern long time();
  if (first_time) {
    first_time = 0;
    rnum = time((long)0) & 0xffffffl;
  }
  rnum = rnum * ((double)3.141592653589793238) + ((double)2.718281828459045235);
  rnum -= (long)rnum;
  return rnum;
}


x86 assembly (clang, -O0):
<b_rand>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,0x2f0d(%rip)
je     1149 <b_rand+0x39>
movl   $0x0,0x2efd(%rip)
xor    %eax,%eax
mov    %eax,%edi
mov    $0x0,%al
call   1030 <time@plt>
and    $0xffffff,%rax
cvtsi2sd %rax,%xmm0
movsd  %xmm0,0x2eef(%rip)
movsd  0x2ee7(%rip),%xmm0
movsd  0xea7(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xea3(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,0x2ec7(%rip)
cvttsd2si 0x2ebe(%rip),%rax
cvtsi2sd %rax,%xmm1
movsd  0x2eb1(%rip),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,0x2ea5(%rip)
movsd  0x2e9d(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_rand>:
push   %rax
cmpb   $0x1,0x2f18(%rip)
jne    1124 <b_rand+0x14>
movsd  0x2f16(%rip),%xmm0
jmp    113d <b_rand+0x2d>
movb   $0x1,0x2f05(%rip)
xor    %edi,%edi
xor    %eax,%eax
call   1030 <time@plt>
and    $0xffffff,%eax
cvtsi2sd %eax,%xmm0
mulsd  0xebb(%rip),%xmm0
addsd  0xebb(%rip),%xmm0
cvttsd2si %xmm0,%rax
cvtsi2sd %rax,%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,0x2ed5(%rip)
pop    %rax
ret

LLVM IR (-O0):
@b_rand.first_time = internal global i32 1
@b_rand.rnum = internal global double 0.000000e+00
define double @b_rand() {
%1 = load i32, i32* @b_rand.first_time
%2 = icmp ne i32 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
store i32 0, i32* @b_rand.first_time
%4 = call i64 (i64, ...) bitcast (i64 (...)* @time to i64 (i64, ...)*)(i64 0)
%5 = and i64 %4, 16777215
%6 = sitofp i64 %5 to double
store double %6, double* @b_rand.rnum
br label %7
7: ; preds = %3, %0
%8 = load double, double* @b_rand.rnum
%9 = call double @llvm.fmuladd.f64(double %8, double 0x400921FB54442D18, double 0x4005BF0A8B145769)
store double %9, double* @b_rand.rnum
%10 = load double, double* @b_rand.rnum
%11 = fptosi double %10 to i64
%12 = sitofp i64 %11 to double
%13 = load double, double* @b_rand.rnum
%14 = fsub double %13, %12
store double %14, double* @b_rand.rnum
%15 = load double, double* @b_rand.rnum
ret double %15
}

LLVM IR (-O2):
@b_rand.first_time = internal unnamed_addr global i1 false
@b_rand.rnum = internal unnamed_addr global double 0.000000e+00
define double @b_rand() {
%1 = load i1, i1* @b_rand.first_time
br i1 %1, label %2, label %4
2: ; preds = %0
%3 = load double, double* @b_rand.rnum
br label %8
4: ; preds = %0
store i1 true, i1* @b_rand.first_time
%5 = tail call i64 (i64, ...) bitcast (i64 (...)* @time to i64 (i64, ...)*)(i64 0)
%6 = and i64 %5, 16777215
%7 = sitofp i64 %6 to double
br label %8
8: ; preds = %2, %4
%9 = phi double [ %3, %2 ], [ %7, %4 ]
%10 = tail call double @llvm.fmuladd.f64(double %9, double 0x400921FB54442D18, double 0x4005BF0A8B145769)
%11 = fptosi double %10 to i64
%12 = sitofp i64 %11 to double
%13 = fsub double %10, %12
store double %13, double* @b_rand.rnum
ret double %13
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t detect_cpus() {
  int32_t ncpu;
  ncpu = 1;
  if (ncpu < 1)
    ncpu = 1;
  return ncpu;
}


x86 assembly (clang, -O0):
<detect_cpus>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jge    111c <detect_cpus+0x1c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<detect_cpus>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @detect_cpus() {
%1 = alloca i32
store i32 1, i32* %1
%2 = load i32, i32* %1
%3 = icmp slt i32 %2, 1
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 1, i32* %1
br label %5
5: ; preds = %4, %0
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
define i32 @detect_cpus() {
ret i32 1
}
int fun176() { return 176; }


x86 assembly (clang, -O0):
<fun176>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun176>:
mov    $0xb0,%eax
ret

LLVM IR (-O0):
define i32 @fun176() {
ret i32 176
}

LLVM IR (-O2):
define i32 @fun176() {
ret i32 176
}
void testNonFunctionMacro(int *p) {
  int i = (((p) != 0) ? *p : 17);
  (void)i;
  *p = 1;
}


x86 assembly (clang, -O0):
<testNonFunctionMacro>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1121 <testNonFunctionMacro+0x21>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
jmp    112e <testNonFunctionMacro+0x2e>
mov    $0x11,%eax
mov    %eax,-0x10(%rbp)
jmp    112e <testNonFunctionMacro+0x2e>
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<testNonFunctionMacro>:
movl   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @testNonFunctionMacro(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = icmp ne i32* %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32*, i32** %2
%8 = load i32, i32* %7
br label %10
9: ; preds = %1
br label %10
10: ; preds = %9, %6
%11 = phi i32 [ %8, %6 ], [ 17, %9 ]
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = load i32*, i32** %2
store i32 1, i32* %13
ret void
}

LLVM IR (-O2):
define void @testNonFunctionMacro(i32* writeonly %0) {
store i32 1, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _Error(long, char *);
void Error_TooFewArgumentsPassedToHandler(long p_position) {
  _Error(p_position, "Too few arguments for specified handler");
}


x86 assembly (clang, -O0):
<Error_TooFewArgumentsPassedToHandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <_Error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Error_TooFewArgumentsPassedToHandler>:
lea    0xee9(%rip),%rsi
jmp    1030 <_Error@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"Too few arguments for specified handler\00"
define void @Error_TooFewArgumentsPassedToHandler(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @_Error(i64 %3, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [40 x i8] c"Too few arguments for specified handler\00"
define void @Error_TooFewArgumentsPassedToHandler(i64 %0) {
%2 = tail call i32 @_Error(i64 %0, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void deal(int s) { printf("get up!\n"); }


x86 assembly (clang, -O0):
<deal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deal>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"get up!\0A\00"
define void @deal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [8 x i8] c"get up!\00"
define void @deal(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct TreeNode {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ search(struct TreeNode *, int *);
int longestUnivaluePath(struct TreeNode *root) {
  int ret = 0;
  if (root)
    search(root, &ret);
  return ret;
}


x86 assembly (clang, -O0):
<longestUnivaluePath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     113b <longestUnivaluePath+0x2b>
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <search@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<longestUnivaluePath>:
push   %rax
movl   $0x0,0x4(%rsp)
test   %rdi,%rdi
je     112e <longestUnivaluePath+0x1e>
lea    0x4(%rsp),%rsi
call   1030 <search@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TreeNode = type { i32 }
define i32 @longestUnivaluePath(%struct.TreeNode* %0) {
%2 = alloca %struct.TreeNode*
%3 = alloca i32
store %struct.TreeNode* %0, %struct.TreeNode** %2
store i32 0, i32* %3
%4 = load %struct.TreeNode*, %struct.TreeNode** %2
%5 = icmp ne %struct.TreeNode* %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load %struct.TreeNode*, %struct.TreeNode** %2
%8 = call i32 @search(%struct.TreeNode* %7, i32* %3)
br label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
%struct.TreeNode = type { i32 }
define i32 @longestUnivaluePath(%struct.TreeNode* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = icmp eq %struct.TreeNode* %0, null
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = call i32 @search(%struct.TreeNode* %0, i32* %2)
%7 = load i32, i32* %2
br label %8
8: ; preds = %5, %1
%9 = phi i32 [ %7, %5 ], [ 0, %1 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ process_factory();
void entry_to() {
  printf("Factory status: MANUFACTURING\n");
  printf("Dispatching factory lines for order.\n");
  process_factory();
}


x86 assembly (clang, -O0):
<entry_to>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <printf@plt>
lea    0xee8(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <process_factory@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<entry_to>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <puts@plt>
lea    0xeea(%rip),%rdi
call   1040 <puts@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <process_factory@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"Factory status: MANUFACTURING\0A\00"
@.str.1 = [38 x i8] c"Dispatching factory lines for order.\0A\00"
define void @entry_to() {
%1 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 (...) @process_factory()
ret void
}

LLVM IR (-O2):
@str = [30 x i8] c"Factory status: MANUFACTURING\00"
@str.2 = [37 x i8] c"Dispatching factory lines for order.\00"
define void @entry_to() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @str.2, i64 0, i64 0))
%3 = tail call i32 (...) @process_factory()
ret void
}
void g_source_attach() {}


x86 assembly (clang, -O0):
<g_source_attach>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_source_attach>:
ret

LLVM IR (-O0):
define void @g_source_attach() {
ret void
}

LLVM IR (-O2):
define void @g_source_attach() {
ret void
}
/* Variables and functions */
float fmaxf(float, float);
float mreach_dist(float apts_1, float apts_2, float sqd_dist) {
  return fmaxf(fmaxf(apts_1, apts_2), sqd_dist);
}


x86 assembly (clang, -O0):
<mreach_dist>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm2
movss  -0x8(%rbp),%xmm1
movaps %xmm1,%xmm4
movaps %xmm2,%xmm3
cmpunordss %xmm3,%xmm3
movaps %xmm3,%xmm0
pand   %xmm4,%xmm0
maxss  %xmm2,%xmm1
pandn  %xmm1,%xmm3
por    %xmm0,%xmm3
movss  -0xc(%rbp),%xmm2
movaps %xmm2,%xmm4
movaps %xmm3,%xmm0
cmpunordss %xmm0,%xmm0
movaps %xmm0,%xmm1
pand   %xmm4,%xmm1
maxss  %xmm3,%xmm2
pandn  %xmm2,%xmm0
por    %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mreach_dist>:
movaps %xmm0,%xmm3
cmpunordss %xmm0,%xmm3
movaps %xmm3,%xmm4
andps  %xmm1,%xmm4
maxss  %xmm0,%xmm1
andnps %xmm1,%xmm3
orps   %xmm4,%xmm3
movaps %xmm2,%xmm0
maxss  %xmm3,%xmm0
cmpunordss %xmm3,%xmm3
movaps %xmm3,%xmm1
andnps %xmm0,%xmm1
andps  %xmm2,%xmm3
orps   %xmm1,%xmm3
movaps %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @mreach_dist(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = call float @llvm.maxnum.f32(float %7, float %8)
%10 = load float, float* %6
%11 = call float @llvm.maxnum.f32(float %9, float %10)
ret float %11
}

LLVM IR (-O2):
define float @mreach_dist(float %0, float %1, float %2) {
%4 = tail call float @llvm.maxnum.f32(float %0, float %1)
%5 = tail call float @llvm.maxnum.f32(float %4, float %2)
ret float %5
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(int argc, char *argv[]) {
  puts("Hello, Gradle!");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello, Gradle!\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @puts(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"Hello, Gradle!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int OBJFS_MODID(int x) { return x; }


x86 assembly (clang, -O0):
<OBJFS_MODID>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OBJFS_MODID>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @OBJFS_MODID(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @OBJFS_MODID(i32 returned %0) {
ret i32 %0
}
int test_imm_DAint8_mem(signed char *val) {
  return ((*val) & (0xDA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DAint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xda,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DAint8_mem>:
testb  $0xda,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DAint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 218
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_DAint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -38
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int pipe_write(int, unsigned int *, int);
int msgq_write(int task, unsigned int msg) { return pipe_write(task, &msg, 1); }


x86 assembly (clang, -O0):
<msgq_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x1,%edx
call   1030 <pipe_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msgq_write>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1,%edx
call   1030 <pipe_write@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @msgq_write(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @pipe_write(i32 %5, i32* %4, i32 1)
ret i32 %6
}

LLVM IR (-O2):
define i32 @msgq_write(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @pipe_write(i32 %0, i32* %3, i32 1)
ret i32 %4
}
int QRinput_checkModeNum(int size, const char *data) {
  int i;
  for (i = 0; i < size; i++) {
    if (data[i] < '0' || data[i] > '9')
      return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<QRinput_checkModeNum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1167 <QRinput_checkModeNum+0x67>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x30,%eax
jl     1148 <QRinput_checkModeNum+0x48>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x39,%eax
jle    1154 <QRinput_checkModeNum+0x54>
movl   $0xffffffff,-0x4(%rbp)
jmp    116e <QRinput_checkModeNum+0x6e>
jmp    1159 <QRinput_checkModeNum+0x59>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1112 <QRinput_checkModeNum+0x12>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<QRinput_checkModeNum>:
test   %edi,%edi
jle    1125 <QRinput_checkModeNum+0x25>
mov    %edi,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
movzbl (%rsi,%rcx,1),%edx
add    $0xc6,%dl
cmp    $0xf5,%dl
jbe    1128 <QRinput_checkModeNum+0x28>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <QRinput_checkModeNum+0x10>
xor    %eax,%eax
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @QRinput_checkModeNum(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 0, i32* %6
br label %7
7: ; preds = %29, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %32
11: ; preds = %7
%12 = load i8*, i8** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp slt i32 %17, 48
br i1 %18, label %27, label %19
19: ; preds = %11
%20 = load i8*, i8** %5
%21 = load i32, i32* %6
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp sgt i32 %25, 57
br i1 %26, label %27, label %28
27: ; preds = %19, %11
store i32 -1, i32* %3
br label %33
28: ; preds = %19
br label %29
29: ; preds = %28
%30 = load i32, i32* %6
%31 = add nsw i32 %30, 1
store i32 %31, i32* %6
br label %7
32: ; preds = %7
store i32 0, i32* %3
br label %33
33: ; preds = %32, %27
%34 = load i32, i32* %3
ret i32 %34
}

LLVM IR (-O2):
define i32 @QRinput_checkModeNum(i32 %0, i8* nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %15
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %8
6: ; preds = %8
%7 = icmp eq i64 %14, %5
br i1 %7, label %15, label %8
8: ; preds = %4, %6
%9 = phi i64 [ 0, %4 ], [ %14, %6 ]
%10 = getelementptr inbounds i8, i8* %1, i64 %9
%11 = load i8, i8* %10
%12 = add i8 %11, -58
%13 = icmp ult i8 %12, -10
%14 = add nuw nsw i64 %9, 1
br i1 %13, label %15, label %6
15: ; preds = %8, %6, %2
%16 = phi i32 [ 0, %2 ], [ 0, %6 ], [ -1, %8 ]
ret i32 %16
}
int file_createdirs(char *name) { return 1; }


x86 assembly (clang, -O0):
<file_createdirs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_createdirs>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @file_createdirs(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @file_createdirs(i8* nocapture readnone %0) {
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_END;
int /*<<< orphan*/ SEEK_SET;
int /*<<< orphan*/ fseek(int /*<<< orphan*/ *, int /*<<< orphan*/,
                         int /*<<< orphan*/);
int ftell(int /*<<< orphan*/ *);
int fsize(FILE *f) {
  int end;
  fseek(f, 0, SEEK_END);
  end = ftell(f);
  fseek(f, 0, SEEK_SET);
  return end;
}


x86 assembly (clang, -O0):
<fsize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
mov    -0x8(%rbp),%rdi
call   1030 <ftell@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e81(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsize>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ebb(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
mov    %rbx,%rdi
call   1030 <ftell@plt>
mov    %eax,%ebp
mov    0x2e91(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
xor    %esi,%esi
call   1040 <fseek@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i32 @fsize(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* @SEEK_END
%6 = call i32 @fseek(i32* %4, i32 0, i32 %5)
%7 = load i32*, i32** %2
%8 = call i32 @ftell(i32* %7)
store i32 %8, i32* %3
%9 = load i32*, i32** %2
%10 = load i32, i32* @SEEK_SET
%11 = call i32 @fseek(i32* %9, i32 0, i32 %10)
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i32 @fsize(i32* nocapture %0) {
%2 = load i32, i32* @SEEK_END
%3 = tail call i32 @fseek(i32* %0, i32 0, i32 %2)
%4 = tail call i32 @ftell(i32* %0)
%5 = load i32, i32* @SEEK_SET
%6 = tail call i32 @fseek(i32* %0, i32 0, i32 %5)
ret i32 %4
}
unsigned getbits(unsigned integer, unsigned position, unsigned n) {
  return (integer >> (position + 1 - n)) & ~(~0 << n);
}


x86 assembly (clang, -O0):
<getbits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
add    $0x1,%ecx
sub    -0xc(%rbp),%ecx
shr    %cl,%eax
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getbits>:
sub    %edx,%esi
lea    0x1(%rsi),%ecx
shr    %cl,%edi
mov    $0xffffffff,%eax
mov    %edx,%ecx
shl    %cl,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @getbits(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add i32 %8, 1
%10 = load i32, i32* %6
%11 = sub i32 %9, %10
%12 = lshr i32 %7, %11
%13 = load i32, i32* %6
%14 = shl i32 -1, %13
%15 = xor i32 %14, -1
%16 = and i32 %12, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @getbits(i32 %0, i32 %1, i32 %2) {
%4 = add i32 %1, 1
%5 = sub i32 %4, %2
%6 = lshr i32 %0, %5
%7 = shl nsw i32 -1, %2
%8 = xor i32 %7, -1
%9 = and i32 %6, %8
ret i32 %9
}
int minimo(int RGB[], int *color) {
  int min = RGB[0];
  *color = 0;
  if (RGB[1] < min) {
    min = RGB[1];
    *color = 1;
  }
  if (RGB[2] < min) {
    min = RGB[2];
    *color = 2;
  }
  return min;
}


x86 assembly (clang, -O0):
<minimo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
cmp    -0x14(%rbp),%eax
jge    1143 <minimo+0x43>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
cmp    -0x14(%rbp),%eax
jge    1167 <minimo+0x67>
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minimo>:
mov    (%rdi),%eax
movl   $0x0,(%rsi)
mov    0x4(%rdi),%ecx
xor    %edx,%edx
cmp    %eax,%ecx
setl   %dl
mov    %edx,(%rsi)
cmovl  %ecx,%eax
mov    0x8(%rdi),%ecx
cmp    %eax,%ecx
mov    $0x2,%edi
cmovge %edx,%edi
mov    %edi,(%rsi)
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @minimo(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 0
%8 = load i32, i32* %7
store i32 %8, i32* %5
%9 = load i32*, i32** %4
store i32 0, i32* %9
%10 = load i32*, i32** %3
%11 = getelementptr inbounds i32, i32* %10, i64 1
%12 = load i32, i32* %11
%13 = load i32, i32* %5
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %20
15: ; preds = %2
%16 = load i32*, i32** %3
%17 = getelementptr inbounds i32, i32* %16, i64 1
%18 = load i32, i32* %17
store i32 %18, i32* %5
%19 = load i32*, i32** %4
store i32 1, i32* %19
br label %20
20: ; preds = %15, %2
%21 = load i32*, i32** %3
%22 = getelementptr inbounds i32, i32* %21, i64 2
%23 = load i32, i32* %22
%24 = load i32, i32* %5
%25 = icmp slt i32 %23, %24
br i1 %25, label %26, label %31
26: ; preds = %20
%27 = load i32*, i32** %3
%28 = getelementptr inbounds i32, i32* %27, i64 2
%29 = load i32, i32* %28
store i32 %29, i32* %5
%30 = load i32*, i32** %4
store i32 2, i32* %30
br label %31
31: ; preds = %26, %20
%32 = load i32, i32* %5
ret i32 %32
}

LLVM IR (-O2):
define i32 @minimo(i32* nocapture %0, i32* nocapture writeonly %1) {
%3 = load i32, i32* %0
store i32 0, i32* %1
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = icmp slt i32 %5, %3
%7 = zext i1 %6 to i32
store i32 %7, i32* %1
%8 = select i1 %6, i32 %5, i32 %3
%9 = getelementptr inbounds i32, i32* %0, i64 2
%10 = load i32, i32* %9
%11 = icmp slt i32 %10, %8
%12 = select i1 %11, i32 2, i32 %7
store i32 %12, i32* %1
%13 = select i1 %11, i32 %10, i32 %8
ret i32 %13
}
void module1_section3_topic2() {}


x86 assembly (clang, -O0):
<module1_section3_topic2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<module1_section3_topic2>:
ret

LLVM IR (-O0):
define void @module1_section3_topic2() {
ret void
}

LLVM IR (-O2):
define void @module1_section3_topic2() {
ret void
}
/* Variables and functions */
char *strchr(char *, int /*<<< orphan*/);
char *strrchr(char *, char);
char *tcc_basename(char const *);
char *tcc_fileextension(const char *name) {
  char *b = tcc_basename(name);
  char *e = strrchr(b, '.');
  return e ? e : strchr(b, 0);
}


x86 assembly (clang, -O0):
<tcc_fileextension>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <tcc_basename@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2e,%esi
call   1040 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1173 <tcc_fileextension+0x43>
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1182 <tcc_fileextension+0x52>
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1030 <strchr@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcc_fileextension>:
push   %rbx
call   1050 <tcc_basename@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    $0x2e,%esi
call   1040 <strrchr@plt>
test   %rax,%rax
je     114d <tcc_fileextension+0x1d>
pop    %rbx
ret
mov    %rbx,%rdi
call   1030 <strlen@plt>
add    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @tcc_fileextension(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i8* @tcc_basename(i8* %5)
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = call i8* @strrchr(i8* %7, i8 signext 46)
store i8* %8, i8** %4
%9 = load i8*, i8** %4
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %1
%12 = load i8*, i8** %4
br label %16
13: ; preds = %1
%14 = load i8*, i8** %3
%15 = call i8* @strchr(i8* %14, i32 0)
br label %16
16: ; preds = %13, %11
%17 = phi i8* [ %12, %11 ], [ %15, %13 ]
ret i8* %17
}

LLVM IR (-O2):
define i8* @tcc_fileextension(i8* %0) {
%2 = tail call i8* @tcc_basename(i8* %0)
%3 = tail call i8* @strrchr(i8* dereferenceable(1) %2, i8 signext 46)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = tail call i64 @strlen(i8* dereferenceable(1) %2)
%7 = getelementptr i8, i8* %2, i64 %6
br label %8
8: ; preds = %1, %5
%9 = phi i8* [ %7, %5 ], [ %3, %1 ]
ret i8* %9
}
void foo429(int p) {}


x86 assembly (clang, -O0):
<foo429>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo429>:
ret

LLVM IR (-O0):
define void @foo429(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo429(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, long);
void *needLargeMem(long);
void *needLargeZeroedMem(long size) {
  void *v;
  v = needLargeMem(size);
  memset(v, 0, size);
  return v;
}


x86 assembly (clang, -O0):
<needLargeZeroedMem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <needLargeMem@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<needLargeZeroedMem>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <needLargeMem@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %esi,%esi
mov    %r14,%rdx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @needLargeZeroedMem(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @needLargeMem(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = load i64, i64* %2
%8 = call i32 @memset(i8* %6, i32 0, i64 %7)
%9 = load i8*, i8** %3
ret i8* %9
}

LLVM IR (-O2):
define i8* @needLargeZeroedMem(i64 %0) {
%2 = tail call i8* @needLargeMem(i64 %0)
%3 = tail call i32 @memset(i8* %2, i32 0, i64 %0)
ret i8* %2
}
void helpFakeFunc(int d) {}


x86 assembly (clang, -O0):
<helpFakeFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<helpFakeFunc>:
ret

LLVM IR (-O0):
define void @helpFakeFunc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @helpFakeFunc(i32 %0) {
ret void
}
long int longint_ignoring_unsignedint(long int x, unsigned int y) { return x; }


x86 assembly (clang, -O0):
<longint_ignoring_unsignedint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longint_ignoring_unsignedint>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @longint_ignoring_unsignedint(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @longint_ignoring_unsignedint(i64 returned %0, i32 %1) {
ret i64 %0
}
/* Variables and functions */
int /*<<< orphan*/ handleClientRequest(int /*<<< orphan*/);
int /*<<< orphan*/ workQueuePop();
void *serverThreadJob(void *unused) {
  (void)(unused);
  while (true)
    handleClientRequest(workQueuePop());
}


x86 assembly (clang, -O0):
<serverThreadJob>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <workQueuePop@plt>
mov    %eax,%edi
call   1030 <handleClientRequest@plt>
jmp    112c <serverThreadJob+0xc>

x86 assembly (clang, -O2):
<serverThreadJob>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <workQueuePop@plt>
mov    %eax,%edi
call   1030 <handleClientRequest@plt>
jmp    1130 <serverThreadJob+0x10>

LLVM IR (-O0):
define i8* @serverThreadJob(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
br label %4
4: ; preds = %1, %4
%5 = call i32 (...) @workQueuePop()
%6 = call i32 @handleClientRequest(i32 %5)
br label %4
}

LLVM IR (-O2):
define noalias i8* @serverThreadJob(i8* nocapture readnone %0) {
br label %2
2: ; preds = %1, %2
%3 = tail call i32 (...) @workQueuePop()
%4 = tail call i32 @handleClientRequest(i32 %3)
br label %2
}
void RTSemMutexRelease(void) {}


x86 assembly (clang, -O0):
<RTSemMutexRelease>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTSemMutexRelease>:
ret

LLVM IR (-O0):
define void @RTSemMutexRelease() {
ret void
}

LLVM IR (-O2):
define void @RTSemMutexRelease() {
ret void
}
__attribute__((no)) unsigned int andc_vv(unsigned int a, unsigned int b) {
  return ~b & a;
}


x86 assembly (clang, -O0):
<andc_vv>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
and    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<andc_vv>:
mov    %esi,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @andc_vv(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = xor i32 %5, -1
%7 = load i32, i32* %3
%8 = and i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @andc_vv(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = and i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_timeval_age() {
  printf("NOT IMPLEMENTED:"
         "pa_timeval_age"
         "\n");
}


x86 assembly (clang, -O0):
<pa_timeval_age>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_timeval_age>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"NOT IMPLEMENTED:pa_timeval_age\0A\00"
define i32 @pa_timeval_age() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [31 x i8] c"NOT IMPLEMENTED:pa_timeval_age\00"
define i32 @pa_timeval_age() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int strings_cmp(char *, char *);
int names_cmp(const void *first, const void *second) {
  return strings_cmp((char *)first, (char *)second);
}


x86 assembly (clang, -O0):
<names_cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strings_cmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<names_cmp>:
jmp    1030 <strings_cmp@plt>

LLVM IR (-O0):
define i32 @names_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strings_cmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @names_cmp(i8* %0, i8* %1) {
%3 = tail call i32 @strings_cmp(i8* %0, i8* %1)
ret i32 %3
}
int test_imm_BCuint16_reg(unsigned short val) {
  return ((val) & (-0xBC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BCuint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff44,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BCuint16_reg>:
test   $0xff44,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BCuint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -188
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_BCuint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -188
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void _a64_disable_interrupts() { __asm__ __volatile__("cli"); }


x86 assembly (clang, -O0):
<_a64_disable_interrupts>:
push   %rbp
mov    %rsp,%rbp
cli
pop    %rbp
ret

x86 assembly (clang, -O2):
<_a64_disable_interrupts>:
cli
ret

LLVM IR (-O0):
define void @_a64_disable_interrupts() {
ret void
}

LLVM IR (-O2):
define void @_a64_disable_interrupts() {
tail call void asm sideeffect "cli", "~{dirflag},~{fpsr},~{flags}"()
ret void
}