xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ GL_FLAT;
int /*<<< orphan*/ glClearColor(double, double, double, double);
int /*<<< orphan*/ glShadeModel(int /*<<< orphan*/);
void init() {
  glClearColor(0.0, 0.0, 0.0, 0.0);
  glShadeModel(GL_FLAT);
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm3,%xmm3
movaps %xmm3,%xmm0
movaps %xmm3,%xmm1
movaps %xmm3,%xmm2
call   1030 <glClearColor@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
call   1040 <glShadeModel@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
xorps  %xmm0,%xmm0
xorps  %xmm1,%xmm1
xorps  %xmm2,%xmm2
xorps  %xmm3,%xmm3
call   1030 <glClearColor@plt>
mov    0x2eaf(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <glShadeModel@plt>

LLVM IR (-O0):
@GL_FLAT = global i32 0
define void @init() {
%1 = call i32 @glClearColor(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00)
%2 = load i32, i32* @GL_FLAT
%3 = call i32 @glShadeModel(i32 %2)
ret void
}

LLVM IR (-O2):
@GL_FLAT = global i32 0
define void @init() {
%1 = tail call i32 @glClearColor(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00)
%2 = load i32, i32* @GL_FLAT
%3 = tail call i32 @glShadeModel(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fh_cli_quit();
void fh_cli_exit() { fh_cli_quit(); }


x86 assembly (clang, -O0):
<fh_cli_exit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <fh_cli_quit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fh_cli_exit>:
xor    %eax,%eax
jmp    1030 <fh_cli_quit@plt>

LLVM IR (-O0):
define void @fh_cli_exit() {
%1 = call i32 (...) @fh_cli_quit()
ret void
}

LLVM IR (-O2):
define void @fh_cli_exit() {
%1 = tail call i32 (...) @fh_cli_quit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void handler_int(int signum) { printf("this is int\n"); }


x86 assembly (clang, -O0):
<handler_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler_int>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"this is int\0A\00"
define void @handler_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"this is int\00"
define void @handler_int(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
unsigned char setBit(unsigned char x, unsigned char k, unsigned char b) {
  return (b ? (x | (0x01 << k)) : (x & ~(0x01 << k)));
}


x86 assembly (clang, -O0):
<setBit>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %dil,%dl
mov    %dl,-0x1(%rbp)
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
cmp    $0x0,%eax
je     113d <setBit+0x3d>
movzbl -0x1(%rbp),%eax
movzbl -0x2(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
jmp    1156 <setBit+0x56>
movzbl -0x1(%rbp),%eax
movzbl -0x2(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setBit>:
mov    %edi,%eax
bts    %esi,%eax
btr    %esi,%edi
test   %edx,%edx
cmove  %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @setBit(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %3
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
%13 = load i8, i8* %5
%14 = zext i8 %13 to i32
%15 = shl i32 1, %14
%16 = or i32 %12, %15
br label %25
17: ; preds = %3
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = load i8, i8* %5
%21 = zext i8 %20 to i32
%22 = shl i32 1, %21
%23 = xor i32 %22, -1
%24 = and i32 %19, %23
br label %25
25: ; preds = %17, %10
%26 = phi i32 [ %16, %10 ], [ %24, %17 ]
%27 = trunc i32 %26 to i8
ret i8 %27
}

LLVM IR (-O2):
define zeroext i8 @setBit(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2) {
%4 = icmp eq i8 %2, 0
%5 = zext i8 %0 to i32
%6 = zext i8 %1 to i32
%7 = shl nuw i32 1, %6
%8 = or i32 %7, %5
%9 = xor i32 %7, -1
%10 = and i32 %9, %5
%11 = select i1 %4, i32 %10, i32 %8
%12 = trunc i32 %11 to i8
ret i8 %12
}
unsigned int fi(unsigned int modul) {
  unsigned int res = 0;
  int i;
  for (i = 0; i < 15; i++) {
    res = (modul - 1) + modul;
    modul++;
  }
  return res;
}


x86 assembly (clang, -O0):
<fi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0xf,-0xc(%rbp)
jge    1142 <fi+0x42>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <fi+0x15>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fi>:
lea    (%rdi,%rdi,1),%eax
add    $0x1b,%eax
ret

LLVM IR (-O0):
define i32 @fi(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 15
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = load i32, i32* %2
%10 = sub i32 %9, 1
%11 = load i32, i32* %2
%12 = add i32 %10, %11
store i32 %12, i32* %3
%13 = load i32, i32* %2
%14 = add i32 %13, 1
store i32 %14, i32* %2
br label %15
15: ; preds = %8
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
store i32 %17, i32* %4
br label %5
18: ; preds = %5
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @fi(i32 %0) {
%2 = shl i32 %0, 1
%3 = add i32 %2, 27
ret i32 %3
}
int drm_load_edid_firmware(struct drm_connector *connector) { return 0; }


x86 assembly (clang, -O0):
<drm_load_edid_firmware>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<drm_load_edid_firmware>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.drm_connector = type opaque
define i32 @drm_load_edid_firmware(%struct.drm_connector* %0) {
%2 = alloca %struct.drm_connector*
store %struct.drm_connector* %0, %struct.drm_connector** %2
ret i32 0
}

LLVM IR (-O2):
%struct.drm_connector = type opaque
define i32 @drm_load_edid_firmware(%struct.drm_connector* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint8_t;

/* Variables and functions */
uint8_t read8(const void *addr) { return *(volatile uint8_t *)addr; }


x86 assembly (clang, -O0):
<read8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read8>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read8(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load volatile i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @read8(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = load volatile i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int strlen(char *);
int strncmp(char *, char *, int);
int strcmp_to_null(char *s1, char *s2) {
  int len, len1, len2;
  len1 = strlen(s1);
  len2 = strlen(s2);
  len = len1 < len2 ? len1 : len2;
  return (strncmp(s1, s2, len));
}


x86 assembly (clang, -O0):
<strcmp_to_null>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    115f <strcmp_to_null+0x3f>
mov    -0x18(%rbp),%eax
mov    %eax,-0x20(%rbp)
jmp    1165 <strcmp_to_null+0x45>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strncmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp_to_null>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %eax,%ebp
mov    %r14,%rdi
call   1040 <strlen@plt>
cmp    %eax,%ebp
cmovge %eax,%ebp
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %ebp,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <strncmp@plt>

LLVM IR (-O0):
define i32 @strcmp_to_null(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = call i32 @strlen(i8* %8)
store i32 %9, i32* %6
%10 = load i8*, i8** %4
%11 = call i32 @strlen(i8* %10)
store i32 %11, i32* %7
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %2
%16 = load i32, i32* %6
br label %19
17: ; preds = %2
%18 = load i32, i32* %7
br label %19
19: ; preds = %17, %15
%20 = phi i32 [ %16, %15 ], [ %18, %17 ]
store i32 %20, i32* %5
%21 = load i8*, i8** %3
%22 = load i8*, i8** %4
%23 = load i32, i32* %5
%24 = call i32 @strncmp(i8* %21, i8* %22, i32 %23)
ret i32 %24
}

LLVM IR (-O2):
define i32 @strcmp_to_null(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = tail call i32 @strlen(i8* %1)
%5 = icmp slt i32 %3, %4
%6 = select i1 %5, i32 %3, i32 %4
%7 = tail call i32 @strncmp(i8* %0, i8* %1, i32 %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ gui_set_status_text(int, char *);
void gui_set_menu_subtitle(char *text) { gui_set_status_text(1, text); }


x86 assembly (clang, -O0):
<gui_set_menu_subtitle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <gui_set_status_text@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gui_set_menu_subtitle>:
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <gui_set_status_text@plt>

LLVM IR (-O0):
define void @gui_set_menu_subtitle(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @gui_set_status_text(i32 1, i8* %3)
ret void
}

LLVM IR (-O2):
define void @gui_set_menu_subtitle(i8* %0) {
%2 = tail call i32 @gui_set_status_text(i32 1, i8* %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int send_event;
};
typedef TYPE_1__ XPointerMovedEvent;

/* Variables and functions */
void set_XPointerMovedEvent_send_event(void *_p, int _v) {
  ((XPointerMovedEvent *)_p)->send_event = (int)_v;
}


x86 assembly (clang, -O0):
<set_XPointerMovedEvent_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XPointerMovedEvent_send_event>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XPointerMovedEvent_send_event(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XPointerMovedEvent_send_event(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ orgfx_wait(int);
void orgfx_cliprect(unsigned int x0, unsigned int y0, unsigned int x1,
                    unsigned int y1) {
  orgfx_wait(4);
  *((volatile unsigned int *)((0xB8000000 + 0x74))) = x0;
  *((volatile unsigned int *)((0xB8000000 + 0x78))) = y0;
  *((volatile unsigned int *)((0xB8000000 + 0x7c))) = x1;
  *((volatile unsigned int *)((0xB8000000 + 0x80))) = y1;
}


x86 assembly (clang, -O0):
<orgfx_cliprect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    $0x4,%edi
call   1030 <orgfx_wait@plt>
mov    -0x4(%rbp),%ecx
mov    $0xb8000074,%eax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%ecx
mov    $0xb8000078,%eax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
mov    $0xb800007c,%eax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
mov    $0xb8000080,%eax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<orgfx_cliprect>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %edx,%r15d
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x4,%edi
call   1030 <orgfx_wait@plt>
mov    $0xb8000074,%eax
mov    %ebp,(%rax)
mov    %ebx,0x4(%rax)
mov    %r15d,0x8(%rax)
mov    %r14d,0xc(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @orgfx_cliprect(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = call i32 @orgfx_wait(i32 4)
%10 = load i32, i32* %5
store volatile i32 %10, i32* inttoptr (i64 3087007860 to i32*)
%11 = load i32, i32* %6
store volatile i32 %11, i32* inttoptr (i64 3087007864 to i32*)
%12 = load i32, i32* %7
store volatile i32 %12, i32* inttoptr (i64 3087007868 to i32*)
%13 = load i32, i32* %8
store volatile i32 %13, i32* inttoptr (i64 3087007872 to i32*)
ret void
}

LLVM IR (-O2):
define void @orgfx_cliprect(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @orgfx_wait(i32 4)
store volatile i32 %0, i32* inttoptr (i64 3087007860 to i32*)
store volatile i32 %1, i32* inttoptr (i64 3087007864 to i32*)
store volatile i32 %2, i32* inttoptr (i64 3087007868 to i32*)
store volatile i32 %3, i32* inttoptr (i64 3087007872 to i32*)
ret void
}
void gpio_disable_mask(unsigned int port, unsigned int mask) {
  unsigned int bit;
  unsigned int cur = mask;
  while (cur) {
    bit = 31 - __builtin_clz(cur);
    cur &= ~(1 << bit);
    gpio_disable_pin(((port)*16 + (bit)));
  }
}


x86 assembly (clang, -O0):
<gpio_disable_mask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     1169 <gpio_disable_mask+0x59>
mov    -0x10(%rbp),%eax
bsr    %eax,%ecx
xor    $0x1f,%ecx
mov    $0x1f,%eax
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
and    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
shl    $0x4,%edi
add    -0xc(%rbp),%edi
mov    $0x0,%al
call   1030 <gpio_disable_pin@plt>
jmp    1124 <gpio_disable_mask+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_disable_mask>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
je     114a <gpio_disable_mask+0x3a>
mov    %esi,%ebx
mov    %edi,%r14d
shl    $0x4,%r14d
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
bsr    %ebx,%ecx
mov    $0xfffffffe,%ebp
rol    %cl,%ebp
add    %r14d,%ecx
mov    %ecx,%edi
xor    %eax,%eax
call   1030 <gpio_disable_pin@plt>
and    %ebp,%ebx
jne    1130 <gpio_disable_mask+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @gpio_disable_mask(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
store i32 %7, i32* %6
br label %8
8: ; preds = %11, %2
%9 = load i32, i32* %6
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %25
11: ; preds = %8
%12 = load i32, i32* %6
%13 = call i32 @llvm.ctlz.i32(i32 %12, i1 true)
%14 = sub nsw i32 31, %13
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = shl i32 1, %15
%17 = xor i32 %16, -1
%18 = load i32, i32* %6
%19 = and i32 %18, %17
store i32 %19, i32* %6
%20 = load i32, i32* %3
%21 = mul i32 %20, 16
%22 = load i32, i32* %5
%23 = add i32 %21, %22
%24 = call i32 (i32, ...) bitcast (i32 (...)* @gpio_disable_pin to i32 (i32, ...)*)(i32 %23)
br label %8
25: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @gpio_disable_mask(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %16, label %4
4: ; preds = %2
%5 = shl i32 %0, 4
br label %6
6: ; preds = %4, %6
%7 = phi i32 [ %1, %4 ], [ %12, %6 ]
%8 = tail call i32 @llvm.ctlz.i32(i32 %7, i1 true)
%9 = xor i32 %8, 31
%10 = shl nuw i32 1, %9
%11 = xor i32 %10, -1
%12 = and i32 %7, %11
%13 = add i32 %9, %5
%14 = tail call i32 (i32, ...) bitcast (i32 (...)* @gpio_disable_pin to i32 (i32, ...)*)(i32 %13)
%15 = icmp eq i32 %12, 0
br i1 %15, label %16, label %6
16: ; preds = %6, %2
ret void
}
void cluster_list_wrlock_(void) {}


x86 assembly (clang, -O0):
<cluster_list_wrlock_>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cluster_list_wrlock_>:
ret

LLVM IR (-O0):
define void @cluster_list_wrlock_() {
ret void
}

LLVM IR (-O2):
define void @cluster_list_wrlock_() {
ret void
}
void log_system_info(void) {}


x86 assembly (clang, -O0):
<log_system_info>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_system_info>:
ret

LLVM IR (-O0):
define void @log_system_info() {
ret void
}

LLVM IR (-O2):
define void @log_system_info() {
ret void
}
/* Variables and functions */
int GetPindex();
int XYtoIndex(int x, int y) {
  int p = GetPindex();
  int index;
  index = p + 19 * y + x - 1;
  if (index < p)
    index++;
  return index;
}


x86 assembly (clang, -O0):
<XYtoIndex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <GetPindex@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
imul   $0x13,-0x8(%rbp),%ecx
add    %ecx,%eax
add    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    114f <XYtoIndex+0x3f>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XYtoIndex>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <GetPindex@plt>
lea    (%rbx,%rbx,8),%ecx
lea    (%rbx,%rcx,2),%ecx
add    %ebp,%ecx
add    %eax,%ecx
xor    %edx,%edx
cmp    %eax,%ecx
setg   %dl
sub    %edx,%ecx
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @XYtoIndex(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = call i32 (...) @GetPindex()
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = mul nsw i32 19, %9
%11 = add nsw i32 %8, %10
%12 = load i32, i32* %3
%13 = add nsw i32 %11, %12
%14 = sub nsw i32 %13, 1
store i32 %14, i32* %6
%15 = load i32, i32* %6
%16 = load i32, i32* %5
%17 = icmp slt i32 %15, %16
br i1 %17, label %18, label %21
18: ; preds = %2
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
store i32 %20, i32* %6
br label %21
21: ; preds = %18, %2
%22 = load i32, i32* %6
ret i32 %22
}

LLVM IR (-O2):
define i32 @XYtoIndex(i32 %0, i32 %1) {
%3 = tail call i32 (...) @GetPindex()
%4 = mul nsw i32 %1, 19
%5 = add i32 %4, %0
%6 = add i32 %5, %3
%7 = icmp sgt i32 %6, %3
%8 = sext i1 %7 to i32
%9 = add nsw i32 %6, %8
ret i32 %9
}
/* Variables and functions */
int strcmp(void const *, void const *);
int reverse_strcmp(const void *a, const void *b) { return -strcmp(a, b); }


x86 assembly (clang, -O0):
<reverse_strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
mov    %eax,%ecx
xor    %eax,%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse_strcmp>:
push   %rax
call   1030 <strcmp@plt>
neg    %eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @reverse_strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
%8 = sub nsw i32 0, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @reverse_strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x6e() {
  Assert_real((iscntrl(110) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              555, ("iscntrl should be 0 for n"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x6e>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6e,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x22b,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x6e>:
push   %rax
mov    $0x6e,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x22b,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for n\00"
define void @t_iscntrl_0x6e() {
%1 = call i64 @iscntrl(i32 110)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 555, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for n\00"
define void @t_iscntrl_0x6e() {
%1 = tail call i64 @iscntrl(i32 110)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 555, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void exitA22() { printf("A22\n"); }


x86 assembly (clang, -O0):
<exitA22>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<exitA22>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"A22\0A\00"
define void @exitA22() {
%1 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [4 x i8] c"A22\00"
define void @exitA22() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLfloat;
typedef int /*<<< orphan*/ GLenum;

/* Variables and functions */
int /*<<< orphan*/ glTexParameterfv(int /*<<< orphan*/, int /*<<< orphan*/,
                                    int /*<<< orphan*/ *);
void TexParameterfv(GLenum target, GLenum pname, GLfloat *params) {
  glTexParameterfv(target, pname, params);
}


x86 assembly (clang, -O0):
<TexParameterfv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <glTexParameterfv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TexParameterfv>:
jmp    1030 <glTexParameterfv@plt>

LLVM IR (-O0):
define void @TexParameterfv(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32*, i32** %6
%10 = call i32 @glTexParameterfv(i32 %7, i32 %8, i32* %9)
ret void
}

LLVM IR (-O2):
define void @TexParameterfv(i32 %0, i32 %1, i32* %2) {
%4 = tail call i32 @glTexParameterfv(i32 %0, i32 %1, i32* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_brev_ldw(int *, int *, int);
int add(int);
int brev_store_elimination_test2(int *ptr, int mod) {
  int dst = 100;
  __builtin_brev_ldw(ptr, &dst, mod);
  return add(dst);
}


x86 assembly (clang, -O0):
<brev_store_elimination_test2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x64,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    -0x10(%rbp),%rsi
call   1040 <__builtin_brev_ldw@plt>
mov    -0x10(%rbp),%edi
call   1030 <add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<brev_store_elimination_test2>:
push   %rax
mov    %esi,%edx
movl   $0x64,0x4(%rsp)
lea    0x4(%rsp),%rsi
call   1040 <__builtin_brev_ldw@plt>
mov    0x4(%rsp),%edi
call   1030 <add@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @brev_store_elimination_test2(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 100, i32* %5
%6 = load i32*, i32** %3
%7 = load i32, i32* %4
%8 = call i32 @__builtin_brev_ldw(i32* %6, i32* %5, i32 %7)
%9 = load i32, i32* %5
%10 = call i32 @add(i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @brev_store_elimination_test2(i32* %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 100, i32* %3
%5 = call i32 @__builtin_brev_ldw(i32* %0, i32* %3, i32 %1)
%6 = load i32, i32* %3
%7 = call i32 @add(i32 %6)
ret i32 %7
}
/* Variables and functions */
int write(int, char *, int);
int send_keepalive(int fd) {
  char msg[] = {0xFE, 0x0B, 0x00, 0xFD};
  return (write(fd, msg, 4) != 4);
}


x86 assembly (clang, -O0):
<send_keepalive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0xedf(%rip),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
cmp    $0x4,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_keepalive>:
push   %rax
movl   $0xfd000bfe,0x4(%rsp)
fd
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
xor    %ecx,%ecx
cmp    $0x4,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.send_keepalive.msg = [4 x i8] c"\FE\0B\00\FD"
define i32 @send_keepalive(i32 %0) {
%2 = alloca i32
%3 = alloca [4 x i8]
store i32 %0, i32* %2
%4 = bitcast [4 x i8]* %3 to i8*
%5 = load i32, i32* %2
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%7 = call i32 @write(i32 %5, i8* %6, i32 4)
%8 = icmp ne i32 %7, 4
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @send_keepalive(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 -50328578, i32* %2
%4 = call i32 @write(i32 %0, i8* %3, i32 4)
%5 = icmp ne i32 %4, 4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ utest_control();
void utest_adts_time(void) {
  utest_control();
  return;
}


x86 assembly (clang, -O0):
<utest_adts_time>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <utest_control@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<utest_adts_time>:
xor    %eax,%eax
jmp    1030 <utest_control@plt>

LLVM IR (-O0):
define void @utest_adts_time() {
%1 = call i32 (...) @utest_control()
ret void
}

LLVM IR (-O2):
define void @utest_adts_time() {
%1 = tail call i32 (...) @utest_control()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ compiletime_check_equals_1(int *, int);
int /*<<< orphan*/ compiletime_check_equals_2(int *, int);
void foo(int *x) {
  compiletime_check_equals_1(x, 5);
  compiletime_check_equals_2(x, 10);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x5,%esi
call   1040 <compiletime_check_equals_1@plt>
mov    -0x8(%rbp),%rdi
mov    $0xa,%esi
call   1030 <compiletime_check_equals_2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
mov    %rdi,%rbx
mov    $0x5,%esi
call   1040 <compiletime_check_equals_1@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
pop    %rbx
jmp    1030 <compiletime_check_equals_2@plt>

LLVM IR (-O0):
define void @foo(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @compiletime_check_equals_1(i32* %3, i32 5)
%5 = load i32*, i32** %2
%6 = call i32 @compiletime_check_equals_2(i32* %5, i32 10)
ret void
}

LLVM IR (-O2):
define void @foo(i32* %0) {
%2 = tail call i32 @compiletime_check_equals_1(i32* %0, i32 5)
%3 = tail call i32 @compiletime_check_equals_2(i32* %0, i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ModuleSettingsHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void ModuleSettingsUpdated() { UAVObjUpdated(ModuleSettingsHandle()); }


x86 assembly (clang, -O0):
<ModuleSettingsUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <ModuleSettingsHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ModuleSettingsUpdated>:
push   %rax
xor    %eax,%eax
call   1040 <ModuleSettingsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @ModuleSettingsUpdated() {
%1 = call i32 (...) @ModuleSettingsHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @ModuleSettingsUpdated() {
%1 = tail call i32 (...) @ModuleSettingsHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ flp_init();
int /*<<< orphan*/ mbus_enumerate(int);
int /*<<< orphan*/ pmu_init();
int /*<<< orphan*/ vim_init();
void operation_init(void) {
  mbus_enumerate(0x3);
  delay(300);
  mbus_enumerate(0x4);
  delay(300);
  mbus_enumerate(0x5);
  delay(300);
  mbus_enumerate(0x6);
  delay(300);
  pmu_init();
  vim_init();
  flp_init();
}


x86 assembly (clang, -O0):
<operation_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1070 <mbus_enumerate@plt>
mov    $0x12c,%edi
call   1050 <delay@plt>
mov    $0x4,%edi
call   1070 <mbus_enumerate@plt>
mov    $0x12c,%edi
call   1050 <delay@plt>
mov    $0x5,%edi
call   1070 <mbus_enumerate@plt>
mov    $0x12c,%edi
call   1050 <delay@plt>
mov    $0x6,%edi
call   1070 <mbus_enumerate@plt>
mov    $0x12c,%edi
call   1050 <delay@plt>
mov    $0x0,%al
call   1030 <pmu_init@plt>
mov    $0x0,%al
call   1060 <vim_init@plt>
mov    $0x0,%al
call   1040 <flp_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<operation_init>:
push   %rax
mov    $0x3,%edi
call   1070 <mbus_enumerate@plt>
mov    $0x12c,%edi
call   1050 <delay@plt>
mov    $0x4,%edi
call   1070 <mbus_enumerate@plt>
mov    $0x12c,%edi
call   1050 <delay@plt>
mov    $0x5,%edi
call   1070 <mbus_enumerate@plt>
mov    $0x12c,%edi
call   1050 <delay@plt>
mov    $0x6,%edi
call   1070 <mbus_enumerate@plt>
mov    $0x12c,%edi
call   1050 <delay@plt>
xor    %eax,%eax
call   1030 <pmu_init@plt>
xor    %eax,%eax
call   1060 <vim_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <flp_init@plt>

LLVM IR (-O0):
define void @operation_init() {
%1 = call i32 @mbus_enumerate(i32 3)
%2 = call i32 @delay(i32 300)
%3 = call i32 @mbus_enumerate(i32 4)
%4 = call i32 @delay(i32 300)
%5 = call i32 @mbus_enumerate(i32 5)
%6 = call i32 @delay(i32 300)
%7 = call i32 @mbus_enumerate(i32 6)
%8 = call i32 @delay(i32 300)
%9 = call i32 (...) @pmu_init()
%10 = call i32 (...) @vim_init()
%11 = call i32 (...) @flp_init()
ret void
}

LLVM IR (-O2):
define void @operation_init() {
%1 = tail call i32 @mbus_enumerate(i32 3)
%2 = tail call i32 @delay(i32 300)
%3 = tail call i32 @mbus_enumerate(i32 4)
%4 = tail call i32 @delay(i32 300)
%5 = tail call i32 @mbus_enumerate(i32 5)
%6 = tail call i32 @delay(i32 300)
%7 = tail call i32 @mbus_enumerate(i32 6)
%8 = tail call i32 @delay(i32 300)
%9 = tail call i32 (...) @pmu_init()
%10 = tail call i32 (...) @vim_init()
%11 = tail call i32 (...) @flp_init()
ret void
}
/* Variables and functions */
int exp(int);
double pow(int, double);
double get_weight(int x, double sigma) {
  double weight;
  weight = (1 / (pow(2 * 3.1415926, 0.5) * sigma)) *
           exp(-(x * x) / (2 * sigma * sigma));
  return weight;
}


x86 assembly (clang, -O0):
<get_weight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    $0x6,%edi
movsd  0xed3(%rip),%xmm0
call   1040 <pow@plt>
movaps %xmm0,%xmm1
mulsd  -0x10(%rbp),%xmm1
movsd  0xeb6(%rip),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x4(%rbp),%ecx
imul   -0x4(%rbp),%ecx
xor    %eax,%eax
sub    %ecx,%eax
cvtsi2sd %eax,%xmm0
movsd  0xe8e(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <exp@plt>
movsd  -0x20(%rbp),%xmm0
cvtsi2sd %eax,%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_weight>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,(%rsp)
mov    %edi,%ebx
movsd  0xecc(%rip),%xmm0
mov    $0x6,%edi
call   1040 <pow@plt>
movsd  (%rsp),%xmm2
mulsd  %xmm2,%xmm0
movsd  0xeb9(%rip),%xmm1
divsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rsp)
imul   %ebx,%ebx
neg    %ebx
xorps  %xmm0,%xmm0
cvtsi2sd %ebx,%xmm0
movapd %xmm2,%xmm1
addsd  %xmm2,%xmm1
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <exp@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
mulsd  0x8(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @get_weight(i32 %0, double %1) {
%3 = alloca i32
%4 = alloca double
%5 = alloca double
store i32 %0, i32* %3
store double %1, double* %4
%6 = call double @pow(i32 6, double 5.000000e-01)
%7 = load double, double* %4
%8 = fmul double %6, %7
%9 = fdiv double 1.000000e+00, %8
%10 = load i32, i32* %3
%11 = load i32, i32* %3
%12 = mul nsw i32 %10, %11
%13 = sub nsw i32 0, %12
%14 = sitofp i32 %13 to double
%15 = load double, double* %4
%16 = fmul double 2.000000e+00, %15
%17 = load double, double* %4
%18 = fmul double %16, %17
%19 = fdiv double %14, %18
%20 = fptosi double %19 to i32
%21 = call i32 @exp(i32 %20)
%22 = sitofp i32 %21 to double
%23 = fmul double %9, %22
store double %23, double* %5
%24 = load double, double* %5
ret double %24
}

LLVM IR (-O2):
define double @get_weight(i32 %0, double %1) {
%3 = tail call double @pow(i32 6, double 5.000000e-01)
%4 = fmul double %3, %1
%5 = fdiv double 1.000000e+00, %4
%6 = mul i32 %0, %0
%7 = sub i32 0, %6
%8 = sitofp i32 %7 to double
%9 = fmul double %1, 2.000000e+00
%10 = fmul double %9, %1
%11 = fdiv double %8, %10
%12 = fptosi double %11 to i32
%13 = tail call i32 @exp(i32 %12)
%14 = sitofp i32 %13 to double
%15 = fmul double %5, %14
ret double %15
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void g() { printf("void g()\n"); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"void g()\0A\00"
define void @g() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"void g()\00"
define void @g() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
ret void
}
void av_interleaved_write_frame() {}


x86 assembly (clang, -O0):
<av_interleaved_write_frame>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_interleaved_write_frame>:
ret

LLVM IR (-O0):
define void @av_interleaved_write_frame() {
ret void
}

LLVM IR (-O2):
define void @av_interleaved_write_frame() {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void PWMtest(volatile uint16_t *port, uint8_t temp) {
  temp = temp & 0x03;
  if (temp == 0x03) {
    *port = 310;
  } else if (temp == 0x02) {
    *port = 250;
  } else if (temp == 0x01) {
    *port = 190;
  } else {
    *port = 177;
  }
}


x86 assembly (clang, -O0):
<PWMtest>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x3,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x3,-0xc(%rbp)
jne    112d <PWMtest+0x2d>
mov    -0x8(%rbp),%rax
movl   $0x136,(%rax)
jmp    1173 <PWMtest+0x73>
cmpl   $0x2,-0xc(%rbp)
jne    1146 <PWMtest+0x46>
mov    -0x8(%rbp),%rax
movl   $0xfa,(%rax)
jmp    116e <PWMtest+0x6e>
cmpl   $0x1,-0xc(%rbp)
jne    115f <PWMtest+0x5f>
mov    -0x8(%rbp),%rax
movl   $0xbe,(%rax)
jmp    1169 <PWMtest+0x69>
mov    -0x8(%rbp),%rax
movl   $0xb1,(%rax)
jmp    116e <PWMtest+0x6e>
jmp    1173 <PWMtest+0x73>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMtest>:
and    $0x3,%esi
add    $0xffffffff,%esi
imul   $0x3c,%esi,%eax
add    $0xbe,%eax
cmp    $0x3,%esi
mov    $0xb1,%ecx
cmovb  %eax,%ecx
mov    %ecx,(%rdi)
ret

LLVM IR (-O0):
define void @PWMtest(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 3
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 3
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32*, i32** %3
store volatile i32 310, i32* %10
br label %25
11: ; preds = %2
%12 = load i32, i32* %4
%13 = icmp eq i32 %12, 2
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = load i32*, i32** %3
store volatile i32 250, i32* %15
br label %24
16: ; preds = %11
%17 = load i32, i32* %4
%18 = icmp eq i32 %17, 1
br i1 %18, label %19, label %21
19: ; preds = %16
%20 = load i32*, i32** %3
store volatile i32 190, i32* %20
br label %23
21: ; preds = %16
%22 = load i32*, i32** %3
store volatile i32 177, i32* %22
br label %23
23: ; preds = %21, %19
br label %24
24: ; preds = %23, %14
br label %25
25: ; preds = %24, %9
ret void
}

LLVM IR (-O2):
define void @PWMtest(i32* %0, i32 %1) {
%3 = and i32 %1, 3
%4 = add nsw i32 %3, -1
%5 = icmp ult i32 %4, 3
%6 = mul nsw i32 %4, 60
%7 = add nsw i32 %6, 190
%8 = select i1 %5, i32 %7, i32 177
store volatile i32 %8, i32* %0
ret void
}
void RTAvlU32RemoveBestFit(void) {}


x86 assembly (clang, -O0):
<RTAvlU32RemoveBestFit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlU32RemoveBestFit>:
ret

LLVM IR (-O0):
define void @RTAvlU32RemoveBestFit() {
ret void
}

LLVM IR (-O2):
define void @RTAvlU32RemoveBestFit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ serial_close(int /*<<< orphan*/);
void PIC18F45K50_stop(void) {
  serial_close(0);
  ;
}


x86 assembly (clang, -O0):
<PIC18F45K50_stop>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <serial_close@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIC18F45K50_stop>:
xor    %edi,%edi
jmp    1030 <serial_close@plt>

LLVM IR (-O0):
define void @PIC18F45K50_stop() {
%1 = call i32 @serial_close(i32 0)
ret void
}

LLVM IR (-O2):
define void @PIC18F45K50_stop() {
%1 = tail call i32 @serial_close(i32 0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ free(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_mutex_destroy(int /*<<< orphan*/ *);
void SyncObjExit(pthread_mutex_t **mut) {
  if (*mut != NULL) {
    pthread_mutex_destroy(*mut);
    free(*mut);
    *mut = NULL;
  }
}


x86 assembly (clang, -O0):
<SyncObjExit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     115d <SyncObjExit+0x3d>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1040 <pthread_mutex_destroy@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SyncObjExit>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1140 <SyncObjExit+0x20>
call   1040 <pthread_mutex_destroy@plt>
mov    (%rbx),%rdi
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @SyncObjExit(i32** %0) {
%2 = alloca i32**
store i32** %0, i32*** %2
%3 = load i32**, i32*** %2
%4 = load i32*, i32** %3
%5 = icmp ne i32* %4, null
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i32**, i32*** %2
%8 = load i32*, i32** %7
%9 = call i32 @pthread_mutex_destroy(i32* %8)
%10 = load i32**, i32*** %2
%11 = load i32*, i32** %10
%12 = call i32 @free(i32* %11)
%13 = load i32**, i32*** %2
store i32* null, i32** %13
br label %14
14: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @SyncObjExit(i32** nocapture %0) {
%2 = load i32*, i32** %0
%3 = icmp eq i32* %2, null
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i32 @pthread_mutex_destroy(i32* %2)
%6 = load i32*, i32** %0
%7 = tail call i32 @free(i32* %6)
store i32* null, i32** %0
br label %8
8: ; preds = %4, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fun1(int);
int /*<<< orphan*/ fun3(int);
int /*<<< orphan*/ fun4(int);
int main() {
  fun1(1);
  fun3(2);
  fun4(1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1040 <fun1@plt>
mov    $0x2,%edi
call   1050 <fun3@plt>
mov    $0x1,%edi
call   1030 <fun4@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1040 <fun1@plt>
mov    $0x2,%edi
call   1050 <fun3@plt>
mov    $0x1,%edi
call   1030 <fun4@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @fun1(i32 1)
%3 = call i32 @fun3(i32 2)
%4 = call i32 @fun4(i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @fun1(i32 1)
%2 = tail call i32 @fun3(i32 2)
%3 = tail call i32 @fun4(i32 1)
ret i32 0
}
long cong(int s1, int s2) { return s1 + s2; }


x86 assembly (clang, -O0):
<cong>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<cong>:
add    %esi,%edi
movslq %edi,%rax
ret

LLVM IR (-O0):
define i64 @cong(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = sext i32 %7 to i64
ret i64 %8
}

LLVM IR (-O2):
define i64 @cong(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = sext i32 %3 to i64
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ _mm_monitorx(char *, int, int);
int /*<<< orphan*/ _mm_mwaitx(int, int, int);
void foo(char *p, int x, int y, int z, int c) {
  _mm_monitorx(p, y, x);
  _mm_mwaitx(z, y, c);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1040 <_mm_monitorx@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    -0x18(%rbp),%edx
call   1030 <_mm_mwaitx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbp
push   %r14
push   %rbx
mov    %r8d,%r14d
mov    %ecx,%ebp
mov    %edx,%ebx
mov    %esi,%edx
mov    %ebx,%esi
call   1040 <_mm_monitorx@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <_mm_mwaitx@plt>

LLVM IR (-O0):
define void @foo(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i32, i32* %8
%13 = load i32, i32* %7
%14 = call i32 @_mm_monitorx(i8* %11, i32 %12, i32 %13)
%15 = load i32, i32* %9
%16 = load i32, i32* %8
%17 = load i32, i32* %10
%18 = call i32 @_mm_mwaitx(i32 %15, i32 %16, i32 %17)
ret void
}

LLVM IR (-O2):
define void @foo(i8* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @_mm_monitorx(i8* %0, i32 %2, i32 %1)
%7 = tail call i32 @_mm_mwaitx(i32 %3, i32 %2, i32 %4)
ret void
}
int dtu_test(struct ddr_set *ddr_setting, unsigned lane, unsigned char *tra,
             unsigned char phase, unsigned dq, unsigned char *dqs,
             unsigned char *dqsn, unsigned pattern_index,
             unsigned repeat_count) {
  return 0;
}


x86 assembly (clang, -O0):
<dtu_test>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    0x20(%rbp),%ecx
mov    0x18(%rbp),%ecx
mov    0x10(%rbp),%rcx
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %al,-0x19(%rbp)
mov    %r8d,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dtu_test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ddr_set = type opaque
define i32 @dtu_test(%struct.ddr_set* %0, i32 %1, i8* %2, i8 zeroext %3, i32 %4, i8* %5, i8* %6, i32 %7, i32 %8) {
%10 = alloca %struct.ddr_set*
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8
%14 = alloca i32
%15 = alloca i8*
%16 = alloca i8*
%17 = alloca i32
%18 = alloca i32
store %struct.ddr_set* %0, %struct.ddr_set** %10
store i32 %1, i32* %11
store i8* %2, i8** %12
store i8 %3, i8* %13
store i32 %4, i32* %14
store i8* %5, i8** %15
store i8* %6, i8** %16
store i32 %7, i32* %17
store i32 %8, i32* %18
ret i32 0
}

LLVM IR (-O2):
%struct.ddr_set = type opaque
define i32 @dtu_test(%struct.ddr_set* nocapture readnone %0, i32 %1, i8* nocapture readnone %2, i8 zeroext %3, i32 %4, i8* nocapture readnone %5, i8* nocapture readnone %6, i32 %7, i32 %8) {
ret i32 0
}
int constrain(int n, int min, int max) {
  if (n < min)
    return min;
  if (n > max)
    return max;
  return n;
}


x86 assembly (clang, -O0):
<constrain>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1124 <constrain+0x24>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <constrain+0x41>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jle    113b <constrain+0x3b>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <constrain+0x41>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<constrain>:
mov    %edx,%eax
cmp    %edx,%edi
cmovle %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @constrain(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i32, i32* %6
store i32 %12, i32* %4
br label %21
13: ; preds = %3
%14 = load i32, i32* %5
%15 = load i32, i32* %7
%16 = icmp sgt i32 %14, %15
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = load i32, i32* %7
store i32 %18, i32* %4
br label %21
19: ; preds = %13
%20 = load i32, i32* %5
store i32 %20, i32* %4
br label %21
21: ; preds = %19, %17, %11
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @constrain(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = icmp sgt i32 %0, %2
%6 = select i1 %5, i32 %2, i32 %0
%7 = select i1 %4, i32 %1, i32 %6
ret i32 %7
}
/* Variables and functions */
int M_PI;
double rad_to_deg(double angulo) { return 360 * angulo / (2 * M_PI); }


x86 assembly (clang, -O0):
<rad_to_deg>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
mov    0x2ecb(%rip),%rax
mov    (%rax),%eax
shl    $0x1,%eax
cvtsi2sd %eax,%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rad_to_deg>:
mulsd  0xef8(%rip),%xmm0
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
add    %eax,%eax
cvtsi2sd %eax,%xmm1
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
@M_PI = global i32 0
define double @rad_to_deg(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double 3.600000e+02, %3
%5 = load i32, i32* @M_PI
%6 = mul nsw i32 2, %5
%7 = sitofp i32 %6 to double
%8 = fdiv double %4, %7
ret double %8
}

LLVM IR (-O2):
@M_PI = global i32 0
define double @rad_to_deg(double %0) {
%2 = fmul double %0, 3.600000e+02
%3 = load i32, i32* @M_PI
%4 = shl nsw i32 %3, 1
%5 = sitofp i32 %4 to double
%6 = fdiv double %2, %5
ret double %6
}