xunge/DecIR huggingface dataset:
void setop(volatile unsigned int *gpioptr, int portn) {
  *(gpioptr + (portn / 10)) &= ~(7 << ((portn % 10) * 3));
  *(gpioptr + (portn / 10)) |= (1 << ((portn % 10) * 3));
}


x86 assembly (clang, -O0):
<setop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
imul   $0x3,%edx,%ecx
mov    $0x7,%esi
shl    %cl,%esi
xor    $0xffffffff,%esi
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%edx
and    %esi,%edx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
imul   $0x3,%edx,%ecx
mov    $0x1,%esi
shl    %cl,%esi
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%edx
or     %esi,%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setop>:
movslq %esi,%rax
imul   $0x66666667,%rax,%rdx
mov    %rdx,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rdx
add    %ecx,%edx
lea    (%rdx,%rdx,1),%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
lea    (%rax,%rax,2),%ecx
mov    $0x7,%eax
shl    %cl,%eax
not    %eax
movslq %edx,%rdx
and    %eax,(%rdi,%rdx,4)
mov    $0x1,%eax
shl    %cl,%eax
or     %eax,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @setop(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = srem i32 %5, 10
%7 = mul nsw i32 %6, 3
%8 = shl i32 7, %7
%9 = xor i32 %8, -1
%10 = load i32*, i32** %3
%11 = load i32, i32* %4
%12 = sdiv i32 %11, 10
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %10, i64 %13
%15 = load volatile i32, i32* %14
%16 = and i32 %15, %9
store volatile i32 %16, i32* %14
%17 = load i32, i32* %4
%18 = srem i32 %17, 10
%19 = mul nsw i32 %18, 3
%20 = shl i32 1, %19
%21 = load i32*, i32** %3
%22 = load i32, i32* %4
%23 = sdiv i32 %22, 10
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i32, i32* %21, i64 %24
%26 = load volatile i32, i32* %25
%27 = or i32 %26, %20
store volatile i32 %27, i32* %25
ret void
}

LLVM IR (-O2):
define void @setop(i32* %0, i32 %1) {
%3 = srem i32 %1, 10
%4 = mul nsw i32 %3, 3
%5 = shl nuw nsw i32 7, %4
%6 = xor i32 %5, -1
%7 = sdiv i32 %1, 10
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load volatile i32, i32* %9
%11 = and i32 %10, %6
store volatile i32 %11, i32* %9
%12 = shl nuw nsw i32 1, %4
%13 = load volatile i32, i32* %9
%14 = or i32 %13, %12
store volatile i32 %14, i32* %9
ret void
}
isalpha(c) register int c;
{
  return (('A' <= c && c <= 'Z') || ('a' <= c && c <= 'z') || (c == '_') ||
          (c == '.'));
}


x86 assembly (clang, -O0):
<isalpha>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x41,%eax
cmp    -0x4(%rbp),%eax
jg     1124 <isalpha+0x24>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    115a <isalpha+0x5a>
mov    $0x61,%eax
cmp    -0x4(%rbp),%eax
jg     1141 <isalpha+0x41>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    115a <isalpha+0x5a>
mov    $0x1,%al
cmpl   $0x5f,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     115a <isalpha+0x5a>
cmpl   $0x2e,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isalpha>:
lea    -0x41(%rdi),%ecx
mov    $0x1,%eax
cmp    $0x1a,%ecx
jb     1122 <isalpha+0x22>
cmp    $0x5f,%edi
je     1122 <isalpha+0x22>
lea    -0x61(%rdi),%ecx
cmp    $0x1a,%ecx
jb     1122 <isalpha+0x22>
xor    %eax,%eax
cmp    $0x2e,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @isalpha(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 65, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br i1 %7, label %20, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sle i32 97, %9
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 122
br i1 %13, label %20, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp eq i32 %15, 95
br i1 %16, label %20, label %17
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp eq i32 %18, 46
br label %20
20: ; preds = %17, %14, %11, %5
%21 = phi i1 [ true, %14 ], [ true, %11 ], [ true, %5 ], [ %19, %17 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @isalpha(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
br i1 %3, label %12, label %4
4: ; preds = %1
%5 = add i32 %0, -97
%6 = icmp ult i32 %5, 26
%7 = icmp eq i32 %0, 95
%8 = or i1 %7, %6
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = icmp eq i32 %0, 46
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %4, %1, %9
%13 = phi i32 [ %11, %9 ], [ 1, %1 ], [ 1, %4 ]
ret i32 %13
}
/* Variables and functions */
scalar_t__ __isnanl(long double);
scalar_t__ isgreaterequal(long double, long double);
long double fmaxl(long double _x, long double _y) {
  return ((isgreaterequal(_x, _y) || __isnanl(_y)) ? _x : _y);
}


x86 assembly (clang, -O0):
<fmaxl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
call   1040 <isgreaterequal@plt>
cmp    $0x0,%rax
jne    1168 <fmaxl+0x48>
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <__isnanl@plt>
cmp    $0x0,%rax
je     1173 <fmaxl+0x53>
fldt   -0x10(%rbp)
fstpt  -0x2c(%rbp)
jmp    1179 <fmaxl+0x59>
fldt   -0x20(%rbp)
fstpt  -0x2c(%rbp)
fldt   -0x2c(%rbp)
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmaxl>:
sub    $0x38,%rsp
fldt   0x50(%rsp)
fldt   0x40(%rsp)
fld    %st(1)
fstpt  0x20(%rsp)
fxch   %st(1)
fstpt  0x10(%rsp)
fld    %st(0)
fstpt  0x2c(%rsp)
fstpt  (%rsp)
call   1040 <isgreaterequal@plt>
test   %rax,%rax
je     1154 <fmaxl+0x34>
fldt   0x2c(%rsp)
add    $0x38,%rsp
ret
fldt   0x20(%rsp)
fstpt  (%rsp)
call   1030 <__isnanl@plt>
test   %rax,%rax
fldt   0x2c(%rsp)
fldt   0x20(%rsp)
fxch   %st(1)
fcmove %st(1),%st
fstp   %st(1)
add    $0x38,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @fmaxl(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call i64 @isgreaterequal(x86_fp80 %5, x86_fp80 %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %2
%10 = load x86_fp80, x86_fp80* %4
%11 = call i64 @__isnanl(x86_fp80 %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %9, %2
%14 = load x86_fp80, x86_fp80* %3
br label %17
15: ; preds = %9
%16 = load x86_fp80, x86_fp80* %4
br label %17
17: ; preds = %15, %13
%18 = phi x86_fp80 [ %14, %13 ], [ %16, %15 ]
ret x86_fp80 %18
}

LLVM IR (-O2):
define x86_fp80 @fmaxl(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call i64 @isgreaterequal(x86_fp80 %0, x86_fp80 %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i64 @__isnanl(x86_fp80 %1)
%7 = icmp eq i64 %6, 0
%8 = select i1 %7, x86_fp80 %1, x86_fp80 %0
br label %9
9: ; preds = %5, %2
%10 = phi x86_fp80 [ %0, %2 ], [ %8, %5 ]
ret x86_fp80 %10
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char *, int);
void f2(int size) {
  char src[12] = "helloworld";
  char dest[12];
  strncpy(dest, src, size);
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    0xede(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xedc(%rip),%eax
mov    %eax,-0x8(%rbp)
lea    -0x1c(%rbp),%rdi
lea    -0x10(%rbp),%rsi
mov    -0x4(%rbp),%edx
call   1030 <strncpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
sub    $0x18,%rsp
mov    %edi,%edx
movabs $0x726f776f6c6c6568,%rax
77 6f 72
mov    %rax,(%rsp)
movl   $0x646c,0x8(%rsp)
lea    0xc(%rsp),%rdi
mov    %rsp,%rsi
call   1030 <strncpy@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.f2.src = [12 x i8] c"helloworld\00\00"
define void @f2(i32 %0) {
%2 = alloca i32
%3 = alloca [12 x i8]
%4 = alloca [12 x i8]
store i32 %0, i32* %2
%5 = bitcast [12 x i8]* %3 to i8*
%6 = getelementptr inbounds [12 x i8], [12 x i8]* %4, i64 0, i64 0
%7 = getelementptr inbounds [12 x i8], [12 x i8]* %3, i64 0, i64 0
%8 = load i32, i32* %2
%9 = call i32 @strncpy(i8* %6, i8* %7, i32 %8)
ret void
}

LLVM IR (-O2):
@__const.f2.src = [12 x i8] c"helloworld\00\00"
define void @f2(i32 %0) {
%2 = alloca [12 x i8]
%3 = alloca [12 x i8]
%4 = getelementptr inbounds [12 x i8], [12 x i8]* %2, i64 0, i64 0
%5 = getelementptr inbounds [12 x i8], [12 x i8]* %3, i64 0, i64 0
%6 = call i32 @strncpy(i8* %5, i8* %4, i32 %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int type;
};
typedef TYPE_1__ XGraphicsExposeEvent;

/* Variables and functions */
void set_XGraphicsExposeEvent_type(void *_p, int _v) {
  ((XGraphicsExposeEvent *)_p)->type = (int)_v;
}


x86 assembly (clang, -O0):
<set_XGraphicsExposeEvent_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XGraphicsExposeEvent_type>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XGraphicsExposeEvent_type(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XGraphicsExposeEvent_type(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
char *google_chart_get_visualization_function_name(int);
void google_chart_output_chart_instantiation(FILE *output_file,
                                             int chart_number) {
  char *visualization_function_name;
  visualization_function_name =
      google_chart_get_visualization_function_name(chart_number);
  fprintf(output_file,
          "<script type=\"text/javascript\">\n"
          "google.setOnLoadCallback(%s);\n"
          "</script>\n",
          visualization_function_name);
}


x86 assembly (clang, -O0):
<google_chart_output_chart_instantiation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <google_chart_get_visualization_function_name@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
lea    0xeb6(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<google_chart_output_chart_instantiation>:
push   %rbx
mov    %rdi,%rbx
mov    %esi,%edi
call   1030 <google_chart_get_visualization_function_name@plt>
lea    0xece(%rip),%rsi
mov    %rbx,%rdi
mov    %rax,%rdx
pop    %rbx
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@.str = [73 x i8] c"<script type=\22text/javascript\22>\0Agoogle.setOnLoadCallback(%s);\0A</script>\0A\00"
define void @google_chart_output_chart_instantiation(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i8*
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i8* @google_chart_get_visualization_function_name(i32 %6)
store i8* %7, i8** %5
%8 = load i32*, i32** %3
%9 = load i8*, i8** %5
%10 = call i32 @fprintf(i32* %8, i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0), i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [73 x i8] c"<script type=\22text/javascript\22>\0Agoogle.setOnLoadCallback(%s);\0A</script>\0A\00"
define void @google_chart_output_chart_instantiation(i32* nocapture %0, i32 %1) {
%3 = tail call i8* @google_chart_get_visualization_function_name(i32 %1)
%4 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int function(bool enter) {
  if (enter) {
    printf("I'm in!\n");
  } else {
    printf("The answer is 42\n");
  }
}


x86 assembly (clang, -O0):
<function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1136 <function+0x26>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
jmp    1142 <function+0x32>
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function>:
test   %edi,%edi
lea    0xee7(%rip),%rax
lea    0xef1(%rip),%rdi
cmove  %rax,%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"I'm in!\0A\00"
@.str.1 = [18 x i8] c"The answer is 42\0A\00"
define i32 @function(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
br label %10
8: ; preds = %1
%9 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@str = [17 x i8] c"The answer is 42\00"
@str.2 = [8 x i8] c"I'm in!\00"
define i32 @function(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @str.2, i64 0, i64 0)
%4 = tail call i32 @puts(i8* dereferenceable(1) %3)
ret i32 undef
}
void not() {
  asm volatile("popq %%rax\n\t"
               "negq %%rax\n\t"
               "sbbq %%rax, %%rax\n\t"
               "incq %%rax\n\t"
               "pushq %%rax\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<not>:
push   %rbp
mov    %rsp,%rbp
pop    %rax
neg    %rax
sbb    %rax,%rax
inc    %rax
push   %rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<not>:
pop    %rax
neg    %rax
sbb    %rax,%rax
inc    %rax
push   %rax
ret

LLVM IR (-O0):
define void @not() {
ret void
}

LLVM IR (-O2):
define void @not() {
tail call void asm sideeffect "popq %rax\0A\09negq %rax\0A\09sbbq %rax, %rax\0A\09incq %rax\0A\09pushq %rax\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
int main() {
  int return_value = 42 / 2 / 3;
  return return_value;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x7,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x7,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 7, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @main() {
ret i32 7
}
/* Variables and functions */
int rand();
int random_uniform(int a, int b) { return (rand() % (b - a)) - a; }


x86 assembly (clang, -O0):
<random_uniform>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
sub    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_uniform>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
cltd
idiv   %ebx
mov    %edx,%eax
sub    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @random_uniform(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = srem i32 %5, %8
%10 = load i32, i32* %3
%11 = sub nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @random_uniform(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub nsw i32 %1, %0
%5 = srem i32 %3, %4
%6 = sub nsw i32 %5, %0
ret i32 %6
}
void __usage_fault_handler() {
  for (;;) {
    __asm__ volatile("nop");
  }
}


x86 assembly (clang, -O0):
<__usage_fault_handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <__usage_fault_handler+0x9>
nop
jmp    1109 <__usage_fault_handler+0x9>

x86 assembly (clang, -O2):
<__usage_fault_handler>:
nop
jmp    1100 <__usage_fault_handler>

LLVM IR (-O0):
define void @__usage_fault_handler() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @__usage_fault_handler() {
br label %1
1: ; preds = %1, %0
tail call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"()
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void tptp_free(void *ptr) { free((char *)ptr); }


x86 assembly (clang, -O0):
<tptp_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tptp_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @tptp_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @tptp_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Type definitions */
struct sigaction {
  int /*<<< orphan*/ sa_flags;
};

/* Variables and functions */
int /*<<< orphan*/ SA_NOCLDWAIT;
int /*<<< orphan*/ SIGCLD;
int /*<<< orphan*/ memset(struct sigaction *, int /*<<< orphan*/, int);
int /*<<< orphan*/ sigaction(int /*<<< orphan*/, struct sigaction *,
                             int /*<<< orphan*/ *);
void ignore_children() {
  struct sigaction nocld;
  memset(&nocld, 0, sizeof(struct sigaction));
  nocld.sa_flags = SA_NOCLDWAIT;
  sigaction(SIGCLD, &nocld, NULL);
}


x86 assembly (clang, -O0):
<ignore_children>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1040 <memset@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigaction@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ignore_children>:
push   %rbx
sub    $0x10,%rsp
lea    0x8(%rsp),%rbx
mov    %rbx,%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1040 <memset@plt>
mov    0x2ea8(%rip),%rax
mov    (%rax),%eax
mov    %eax,0x8(%rsp)
mov    0x2e93(%rip),%rax
mov    (%rax),%edi
mov    %rbx,%rsi
xor    %edx,%edx
call   1030 <sigaction@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.sigaction = type { i32 }
@SA_NOCLDWAIT = global i32 0
@SIGCLD = global i32 0
define void @ignore_children() {
%1 = alloca %struct.sigaction
%2 = call i32 @memset(%struct.sigaction* %1, i32 0, i32 4)
%3 = load i32, i32* @SA_NOCLDWAIT
%4 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %1, i32 0, i32 0
store i32 %3, i32* %4
%5 = load i32, i32* @SIGCLD
%6 = call i32 @sigaction(i32 %5, %struct.sigaction* %1, i32* null)
ret void
}

LLVM IR (-O2):
%struct.sigaction = type { i32 }
@SA_NOCLDWAIT = global i32 0
@SIGCLD = global i32 0
define void @ignore_children() {
%1 = alloca %struct.sigaction
%2 = bitcast %struct.sigaction* %1 to i8*
%3 = call i32 @memset(%struct.sigaction* %1, i32 0, i32 4)
%4 = load i32, i32* @SA_NOCLDWAIT
%5 = getelementptr inbounds %struct.sigaction, %struct.sigaction* %1, i64 0, i32 0
store i32 %4, i32* %5
%6 = load i32, i32* @SIGCLD
%7 = call i32 @sigaction(i32 %6, %struct.sigaction* %1, i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ unlink(char const *);
void sys_pidf_close(int fd, const char *fn) {
  unlink(fn);
  close(fd);
}


x86 assembly (clang, -O0):
<sys_pidf_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <unlink@plt>
mov    -0x4(%rbp),%edi
call   1040 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_pidf_close>:
push   %rbx
mov    %edi,%ebx
mov    %rsi,%rdi
call   1030 <unlink@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <close@plt>

LLVM IR (-O0):
define void @sys_pidf_close(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @unlink(i8* %5)
%7 = load i32, i32* %3
%8 = call i32 @close(i32 %7)
ret void
}

LLVM IR (-O2):
define void @sys_pidf_close(i32 %0, i8* nocapture %1) {
%3 = tail call i32 @unlink(i8* %1)
%4 = tail call i32 @close(i32 %0)
ret void
}
int setTTyMode(int fd, const char *mode) { return -1; }


x86 assembly (clang, -O0):
<setTTyMode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setTTyMode>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @setTTyMode(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @setTTyMode(i32 %0, i8* nocapture readnone %1) {
ret i32 -1
}
char *get_msg(int msg) { return ("Error: get_msg"); }


x86 assembly (clang, -O0):
<get_msg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    0xef2(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_msg>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Error: get_msg\00"
define i8* @get_msg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [15 x i8] c"Error: get_msg\00"
define i8* @get_msg(i32 %0) {
ret i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ uint_least16_t;
typedef char uint8_t;

/* Variables and functions */
void endian_16(char ptr[2], uint_least16_t word) {
  endian_16((uint8_t *)ptr, word);
}


x86 assembly (clang, -O0):
<endian_16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <endian_16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<endian_16>:
jmp    1100 <endian_16>

LLVM IR (-O0):
define void @endian_16(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @endian_16(i8* nocapture %0, i32 %1) {
br label %3
3: ; preds = %3, %2
br label %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ le64toh(int /*<<< orphan*/);
uint64_t unaligned_read_le64(const void *_u) {
  const struct __attribute__((packed, may_alias)) { uint64_t x; } *u = _u;
  return le64toh(u->x);
}


x86 assembly (clang, -O0):
<unaligned_read_le64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%edi
call   1030 <le64toh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unaligned_read_le64>:
mov    (%rdi),%edi
jmp    1030 <le64toh@plt>

LLVM IR (-O0):
%struct.anon = type { i32 }
define i32 @unaligned_read_le64(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.anon*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.anon*
store %struct.anon* %5, %struct.anon** %3
%6 = load %struct.anon*, %struct.anon** %3
%7 = getelementptr inbounds %struct.anon, %struct.anon* %6, i32 0, i32 0
%8 = load i32, i32* %7
%9 = call i32 @le64toh(i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @unaligned_read_le64(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @le64toh(i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ debugPrintf(int, char *, char *);
int main() {
  debugPrintf(1, "%s", "hello world!\n");
  debugPrintf(~1, "%s", "hello world!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
lea    0xed5(%rip),%rsi
lea    0xed1(%rip),%rdx
call   1030 <debugPrintf@plt>
mov    $0xfffffffe,%edi
lea    0xebd(%rip),%rsi
lea    0xeb9(%rip),%rdx
call   1030 <debugPrintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xee5(%rip),%rbx
lea    0xee1(%rip),%r14
mov    $0x1,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <debugPrintf@plt>
mov    $0xfffffffe,%edi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <debugPrintf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [14 x i8] c"hello world!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @debugPrintf(i32 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @debugPrintf(i32 -2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [14 x i8] c"hello world!\0A\00"
define i32 @main() {
%1 = tail call i32 @debugPrintf(i32 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @debugPrintf(i32 -2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t mp_sizeof_nil() { return 1; }


x86 assembly (clang, -O0):
<mp_sizeof_nil>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_sizeof_nil>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @mp_sizeof_nil() {
ret i32 1
}

LLVM IR (-O2):
define i32 @mp_sizeof_nil() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void printer(void) { printf("hello world !\n"); }


x86 assembly (clang, -O0):
<printer>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printer>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"hello world !\0A\00"
define void @printer() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"hello world !\00"
define void @printer() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ atomic_sub_int32_t(int /*<<< orphan*/ *, int);
int32_t atomic_dec_int32_t(int32_t *var) { return atomic_sub_int32_t(var, 1); }


x86 assembly (clang, -O0):
<atomic_dec_int32_t>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <atomic_sub_int32_t@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_dec_int32_t>:
mov    $0x1,%esi
jmp    1030 <atomic_sub_int32_t@plt>

LLVM IR (-O0):
define i32 @atomic_dec_int32_t(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @atomic_sub_int32_t(i32* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @atomic_dec_int32_t(i32* %0) {
%2 = tail call i32 @atomic_sub_int32_t(i32* %0, i32 1)
ret i32 %2
}
void gsi_get_inst_ram_offset_and_size(unsigned long *base_offset,
                                      unsigned long *size) {}


x86 assembly (clang, -O0):
<gsi_get_inst_ram_offset_and_size>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsi_get_inst_ram_offset_and_size>:
ret

LLVM IR (-O0):
define void @gsi_get_inst_ram_offset_and_size(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
store i64* %0, i64** %3
store i64* %1, i64** %4
ret void
}

LLVM IR (-O2):
define void @gsi_get_inst_ram_offset_and_size(i64* nocapture %0, i64* nocapture %1) {
ret void
}
/* Variables and functions */
int rand();
void test_rand_bytes(void *mem, size_t n) {
  char *bytes = mem;
  for (size_t i = 0; i < n; ++i) {
    bytes[i] = (rand() % 256);
  }
}


x86 assembly (clang, -O0):
<test_rand_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1169 <test_rand_bytes+0x59>
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x100,%ecx
cltd
idiv   %ecx
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1130 <test_rand_bytes+0x20>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_rand_bytes>:
push   %r15
push   %r14
push   %rbx
test   %rsi,%rsi
je     1144 <test_rand_bytes+0x34>
mov    %rsi,%r15
mov    %rdi,%r14
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
xor    %eax,%eax
call   1030 <rand@plt>
mov    %al,(%r14,%rbx,1)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <test_rand_bytes+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @test_rand_bytes(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i8*, i8** %3
store i8* %7, i8** %5
store i64 0, i64* %6
br label %8
8: ; preds = %19, %2
%9 = load i64, i64* %6
%10 = load i64, i64* %4
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = call i32 (...) @rand()
%14 = srem i32 %13, 256
%15 = trunc i32 %14 to i8
%16 = load i8*, i8** %5
%17 = load i64, i64* %6
%18 = getelementptr inbounds i8, i8* %16, i64 %17
store i8 %15, i8* %18
br label %19
19: ; preds = %12
%20 = load i64, i64* %6
%21 = add i64 %20, 1
store i64 %21, i64* %6
br label %8
22: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @test_rand_bytes(i8* nocapture writeonly %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %4, label %5
4: ; preds = %5, %2
ret void
5: ; preds = %2, %5
%6 = phi i64 [ %10, %5 ], [ 0, %2 ]
%7 = tail call i32 (...) @rand()
%8 = trunc i32 %7 to i8
%9 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 %8, i8* %9
%10 = add nuw i64 %6, 1
%11 = icmp eq i64 %10, %1
br i1 %11, label %4, label %5
}
int iand_(a, b)
int *a;
int *b;
{
  static int res;
  res = (*a & *b);
  return (res);
}


x86 assembly (clang, -O0):
<iand_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
and    (%rcx),%eax
mov    %eax,0x2f06(%rip)
mov    0x2f00(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iand_>:
mov    (%rsi),%eax
and    (%rdi),%eax
ret

LLVM IR (-O0):
@iand_.res = internal global i32 0
define i32 @iand_(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = and i32 %6, %8
store i32 %9, i32* @iand_.res
%10 = load i32, i32* @iand_.res
ret i32 %10
}

LLVM IR (-O2):
define i32 @iand_(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = and i32 %4, %3
ret i32 %5
}
long long lldiv(long long a, long long b) { return a / b; }


x86 assembly (clang, -O0):
<lldiv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lldiv>:
mov    %rdi,%rax
mov    %rdi,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1115 <lldiv+0x15>
cqto
idiv   %rsi
ret
xor    %edx,%edx
div    %esi
ret

LLVM IR (-O0):
define i64 @lldiv(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sdiv i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @lldiv(i64 %0, i64 %1) {
%3 = sdiv i64 %0, %1
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ usage(char *);
void parseopts(int argc, char *argv[]) {
  if (argc > 1)
    return;
  usage(argv[0]);
  exit(0);
}


x86 assembly (clang, -O0):
<parseopts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x4(%rbp)
jle    113f <parseopts+0x1f>
add    $0x10,%rsp
pop    %rbp
ret
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <usage@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<parseopts>:
cmp    $0x2,%edi
jl     1126 <parseopts+0x6>
ret
push   %rax
mov    (%rsi),%rdi
call   1030 <usage@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @parseopts(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %2
ret void
8: ; preds = %2
%9 = load i8**, i8*** %4
%10 = getelementptr inbounds i8*, i8** %9, i64 0
%11 = load i8*, i8** %10
%12 = call i32 @usage(i8* %11)
%13 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @parseopts(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %5
4: ; preds = %2
ret void
5: ; preds = %2
%6 = load i8*, i8** %1
%7 = tail call i32 @usage(i8* %6)
%8 = tail call i32 @exit(i32 0)
unreachable
}
int wCodeAddObject(void *ptr) {
  int i, count, length;
  return i;
}


x86 assembly (clang, -O0):
<wCodeAddObject>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wCodeAddObject>:
ret

LLVM IR (-O0):
define i32 @wCodeAddObject(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @wCodeAddObject(i8* nocapture readnone %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ setNoncanonicalMode(int, int /*<<< orphan*/);
void setMenuMode() { setNoncanonicalMode(1, 0); }


x86 assembly (clang, -O0):
<setMenuMode>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <setNoncanonicalMode@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setMenuMode>:
mov    $0x1,%edi
xor    %esi,%esi
jmp    1030 <setNoncanonicalMode@plt>

LLVM IR (-O0):
define void @setMenuMode() {
%1 = call i32 @setNoncanonicalMode(i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @setMenuMode() {
%1 = tail call i32 @setNoncanonicalMode(i32 1, i32 0)
ret void
}
/* Variables and functions */
char *strip_slashes(char *s) {
  char *p;
  if (s != NULL) {
    for (p = s; *p != '\0'; ++p) {
      if (*p == '\\' || *p == '/') {
        *p = '_';
      }
    }
  }
}


x86 assembly (clang, -O0):
<strip_slashes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116d <strip_slashes+0x6d>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1168 <strip_slashes+0x68>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5c,%eax
je     114b <strip_slashes+0x4b>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2f,%eax
jne    1152 <strip_slashes+0x52>
mov    -0x18(%rbp),%rax
movb   $0x5f,(%rax)
jmp    1157 <strip_slashes+0x57>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    111b <strip_slashes+0x1b>
jmp    116d <strip_slashes+0x6d>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strip_slashes>:
test   %rdi,%rdi
jne    1117 <strip_slashes+0x17>
jmp    1126 <strip_slashes+0x26>
nopw   0x0(%rax,%rax,1)
movb   $0x5f,(%rdi)
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0x2f,%al
je     1110 <strip_slashes+0x10>
cmp    $0x5c,%al
je     1110 <strip_slashes+0x10>
test   %al,%al
jne    1113 <strip_slashes+0x13>
ret

LLVM IR (-O0):
define i8* @strip_slashes(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %31
7: ; preds = %1
%8 = load i8*, i8** %3
store i8* %8, i8** %4
br label %9
9: ; preds = %27, %7
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %30
14: ; preds = %9
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 92
br i1 %18, label %24, label %19
19: ; preds = %14
%20 = load i8*, i8** %4
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = icmp eq i32 %22, 47
br i1 %23, label %24, label %26
24: ; preds = %19, %14
%25 = load i8*, i8** %4
store i8 95, i8* %25
br label %26
26: ; preds = %24, %19
br label %27
27: ; preds = %26
%28 = load i8*, i8** %4
%29 = getelementptr inbounds i8, i8* %28, i32 1
store i8* %29, i8** %4
br label %9
30: ; preds = %9
br label %31
31: ; preds = %30, %1
%32 = load i8*, i8** %2
ret i8* %32
}

LLVM IR (-O2):
define noalias i8* @strip_slashes(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %9, label %3
3: ; preds = %1, %7
%4 = phi i8* [ %8, %7 ], [ %0, %1 ]
%5 = load i8, i8* %4
switch i8 %5, label %7 [
i8 0, label %9
i8 92, label %6
i8 47, label %6
]
6: ; preds = %3, %3
store i8 95, i8* %4
br label %7
7: ; preds = %3, %6
%8 = getelementptr inbounds i8, i8* %4, i64 1
br label %3
9: ; preds = %3, %1
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *progname) {
  fprintf(stderr,
          "usage:  %s [-m|-p|t] [file] addr\n"
          "\nWhere:\n\t"
          "-m    Create BPF map fd\n\t"
          "-p    Create BPF prog fd\n\t"
          "-t    Test if BPF enabled\n\t"
          "   If -m or -p not supplied, create a file fd using:\n\t"
          "file  Test file fd sent to server\n\t"
          "addr  Servers address\n",
          progname);
  exit(-1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [232 x i8] c"usage: %s [-m|-p|t] [file] addr\0A\0AWhere:\0A\09-m Create BPF map fd\0A\09-p Create BPF prog fd\0A\09-t Test if BPF enabled\0A\09 If -m or -p not supplied, create a file fd using:\0A\09file Test file fd sent to server\0A\09addr Servers address\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([232 x i8], [232 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [232 x i8] c"usage: %s [-m|-p|t] [file] addr\0A\0AWhere:\0A\09-m Create BPF map fd\0A\09-p Create BPF prog fd\0A\09-t Test if BPF enabled\0A\09 If -m or -p not supplied, create a file fd using:\0A\09file Test file fd sent to server\0A\09addr Servers address\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([232 x i8], [232 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 -1)
unreachable
}
extern int _gettimeofday(void *p1, void *p2) { return 0; }


x86 assembly (clang, -O0):
<_gettimeofday>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_gettimeofday>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_gettimeofday(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @_gettimeofday(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
char *w_newword(size_t *actlen, size_t *maxlen) {
  *actlen = *maxlen = 0;
  return NULL;
}


x86 assembly (clang, -O0):
<w_newword>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movq   $0x0,(%rax)
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<w_newword>:
movq   $0x0,(%rsi)
movq   $0x0,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @w_newword(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
store i64* %0, i64** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
store i64 0, i64* %5
%6 = load i64*, i64** %3
store i64 0, i64* %6
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @w_newword(i64* nocapture writeonly %0, i64* nocapture writeonly %1) {
store i64 0, i64* %1
store i64 0, i64* %0
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ tolower(int);
void uninitvar_tolower(int character) {
  int c;
  (void)tolower(c);
  int *pc = &c;
  (void)tolower(*pc);
  (void)tolower(character);
  int *pChar = &character;
  (void)tolower(*pChar);
}


x86 assembly (clang, -O0):
<uninitvar_tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_tolower>:
ret

LLVM IR (-O0):
define void @uninitvar_tolower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32 %0, i32* %2
%6 = load i32, i32* %3
%7 = call i32 @tolower(i32 %6)
store i32* %3, i32** %4
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = call i32 @tolower(i32 %9)
%11 = load i32, i32* %2
%12 = call i32 @tolower(i32 %11)
store i32* %2, i32** %5
%13 = load i32*, i32** %5
%14 = load i32, i32* %13
%15 = call i32 @tolower(i32 %14)
ret void
}

LLVM IR (-O2):
define void @uninitvar_tolower(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ i2c_smbus_write_byte_data(int, int, int);
int WriteRegister(int _handle, int _reg, int _data) {
  i2c_smbus_write_byte_data(_handle, _reg, _data);
}


x86 assembly (clang, -O0):
<WriteRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <i2c_smbus_write_byte_data@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WriteRegister>:
jmp    1030 <i2c_smbus_write_byte_data@plt>

LLVM IR (-O0):
define i32 @WriteRegister(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = call i32 @i2c_smbus_write_byte_data(i32 %8, i32 %9, i32 %10)
%12 = load i32, i32* %4
ret i32 %12
}

LLVM IR (-O2):
define i32 @WriteRegister(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @i2c_smbus_write_byte_data(i32 %0, i32 %1, i32 %2)
ret i32 undef
}
int conditional(int x, int y, int z) {
  int a = !x;
  --a;
  return (a & (y ^ z)) ^ z;
}


x86 assembly (clang, -O0):
<conditional>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
xor    -0xc(%rbp),%ecx
and    %ecx,%eax
xor    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<conditional>:
mov    %esi,%eax
test   %edi,%edi
cmove  %edx,%eax
ret

LLVM IR (-O0):
define i32 @conditional(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
%11 = zext i1 %10 to i32
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = add nsw i32 %12, -1
store i32 %13, i32* %7
%14 = load i32, i32* %7
%15 = load i32, i32* %5
%16 = load i32, i32* %6
%17 = xor i32 %15, %16
%18 = and i32 %14, %17
%19 = load i32, i32* %6
%20 = xor i32 %18, %19
ret i32 %20
}

LLVM IR (-O2):
define i32 @conditional(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i32 %2, i32 %1
ret i32 %5
}
/* Type definitions */
struct passwd {
  int dummy;
};

/* Variables and functions */
int ENOSYS;
int getpwnam_r(const char *name, struct passwd *pwbuf, char *buf, size_t buflen,
               struct passwd **pwbufp) {
  return ENOSYS;
}


x86 assembly (clang, -O0):
<getpwnam_r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getpwnam_r>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct.passwd = type { i32 }
@ENOSYS = global i32 0
define i32 @getpwnam_r(i8* %0, %struct.passwd* %1, i8* %2, i64 %3, %struct.passwd** %4) {
%6 = alloca i8*
%7 = alloca %struct.passwd*
%8 = alloca i8*
%9 = alloca i64
%10 = alloca %struct.passwd**
store i8* %0, i8** %6
store %struct.passwd* %1, %struct.passwd** %7
store i8* %2, i8** %8
store i64 %3, i64* %9
store %struct.passwd** %4, %struct.passwd*** %10
%11 = load i32, i32* @ENOSYS
ret i32 %11
}

LLVM IR (-O2):
%struct.passwd = type { i32 }
@ENOSYS = global i32 0
define i32 @getpwnam_r(i8* nocapture readnone %0, %struct.passwd* nocapture readnone %1, i8* nocapture readnone %2, i64 %3, %struct.passwd** nocapture readnone %4) {
%6 = load i32, i32* @ENOSYS
ret i32 %6
}
/* Variables and functions */
void tearDown(void) {}


x86 assembly (clang, -O0):
<tearDown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tearDown>:
ret

LLVM IR (-O0):
define void @tearDown() {
ret void
}

LLVM IR (-O2):
define void @tearDown() {
ret void
}