#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned long PRCMHIBRegRead(int);
int /*<<< orphan*/ PRCMHIBRegWrite(int, int);
int /*<<< orphan*/ PRCMPeripheralClkDisable(int, int);
int /*<<< orphan*/ PRCMPeripheralClkEnable(int, int);
int /*<<< orphan*/ PRCMPeripheralReset(int);
int PRCMSysResetCauseGet();
int /*<<< orphan*/ UtilsDelay(int);
void PRCMCC3200MCUInit() {
  if (PRCMSysResetCauseGet() != 0x00000001) {
    if (0x00010001 == (*((volatile unsigned long *)(0x00000400)))) {
      unsigned long ulRegVal;
      (*((volatile unsigned long *)(0x4402F010))) = 0x30031820;
      (*((volatile unsigned long *)(0x4402F00C))) = 0x04000000;
      UtilsDelay(32000);
      (*((volatile unsigned long *)(0x4402F11C))) = 0x099;
      (*((volatile unsigned long *)(0x4402F11C))) = 0x0AA;
      (*((volatile unsigned long *)(0x4402F11C))) = 0x1AA;
      (*((volatile unsigned long *)(0x4402F124))) = 0x099;
      (*((volatile unsigned long *)(0x4402F124))) = 0x0AA;
      (*((volatile unsigned long *)(0x4402F124))) = 0x1AA;
      if (((*((volatile unsigned long *)(0x4402D00C))) & 0xFF) == 0x00000005) {
        (*((volatile unsigned long *)(0x400F707C))) |= 0x01840082;
        (*((volatile unsigned long *)(0x400F70C4))) = 0x1;
        (*((volatile unsigned long *)(0x400F70C4))) = 0x0;
      }
      ulRegVal = (*((volatile unsigned long *)(0x400F7000)));
      ulRegVal = (ulRegVal & ~0x3) | 0x1;
      (*((volatile unsigned long *)(0x400F7000))) = ulRegVal;
      ulRegVal = (*((volatile unsigned long *)(0x400F703C)));
      ulRegVal = (ulRegVal & ~0x3FF) | 0x155;
      (*((volatile unsigned long *)(0x400F703C))) = ulRegVal;
      PRCMHIBRegWrite(0x4402F800 + 0x0000002C, 0x00000101);
      UtilsDelay(8000);
      (*((volatile unsigned long *)(0x4402F000 + 0x000000C4))) = 0x00010008;
      UtilsDelay(8000);
    } else {
      unsigned long ulRegValue;
      (*((volatile unsigned long *)(0x4402F064))) |= 0x800000;
      ulRegValue = PRCMHIBRegRead(0x4402F800 + 0x00000418);
      PRCMHIBRegWrite(0x4402F800 + 0x00000418, ulRegValue | (1 << 4));
      (*((volatile unsigned long *)(0x4402E16C))) |= 0x3C;
    }
    PRCMPeripheralClkEnable(0x00000005, 0x00000001);
    PRCMPeripheralReset(0x00000005);
    PRCMPeripheralClkDisable(0x00000005, 0x00000001);
    if (PRCMSysResetCauseGet() == 0x00000000) {
      PRCMHIBRegWrite(0x4402F804, 0x1);
    }
    if ((((*((volatile unsigned long *)(0x4402F0C8))) & 0xFF) == 0x2)) {
      (*((volatile unsigned long *)(0x4402E110))) =
          (((*((volatile unsigned long *)(0x4402E110))) & ~0xC0F) | 0x2);
      (*((volatile unsigned long *)(0x4402E114))) =
          (((*((volatile unsigned long *)(0x4402E110))) & ~0xC0F) | 0x2);
    }
    (*((volatile unsigned long *)(0x4402E184))) |= 0x2;
    if (((*((volatile unsigned long *)(0x4402E0A4))) & 0xF) == 0x1) {
      (*((volatile unsigned long *)(0x4402E0A4))) =
          (((*((volatile unsigned long *)(0x4402E0A4))) & ~0xF));
    }
    if (((*((volatile unsigned long *)(0x4402E0A8))) & 0xF) == 0x1) {
      (*((volatile unsigned long *)(0x4402E0A8))) =
          (((*((volatile unsigned long *)(0x4402E0A8))) & ~0xF));
    }
    if ((((*((volatile unsigned long *)(0x4402DC78))) >> 22) & 0xF) == 0xE) {
      (*((volatile unsigned long *)(0x4402F0B0))) =
          (((*((volatile unsigned long *)(0x4402F0B0))) & ~(0x00FC0000)) |
           (0x32 << 18));
    } else {
      (*((volatile unsigned long *)(0x4402F0B0))) =
          (((*((volatile unsigned long *)(0x4402F0B0))) & ~(0x00FC0000)) |
           (0x29 << 18));
    }
    (*((volatile unsigned long *)(0x4402FC74))) &= ~(0x10000000);
    if (((*((volatile unsigned long *)(0x00000400))) & 0xFFFF) < 2) {
      (*((volatile unsigned long *)(0x4402F0A8))) |= 0x00000004;
    } else if (((*((volatile unsigned long *)(0x00000400))) >> 16) >= 1) {
      (*((volatile unsigned long *)(0x4402E000 + 0x00000188))) |=
          ((7 << 5) | 0x1);
      if (((*((volatile unsigned long *)(0x4402F800 + 0x00000420))) & 0x1)) {
        (*((volatile unsigned long *)(0x4402F800 + 0x00000420))) &= ~0x1;
        (*((volatile unsigned long *)(0x4402E000 + 0x00000188))) |= (1 << 9);
        (*((volatile unsigned long *)(0x4402F800 + 0x00000018))) &= ~0x1;
        (*((volatile unsigned long *)(0x4402F800 + 0x0000001C))) = 0;
        (*((volatile unsigned long *)(0x4402F800 + 0x00000020))) = 0;
      }
    }
    unsigned long efuse_reg2;
    unsigned long ulDevMajorVer, ulDevMinorVer;
    efuse_reg2 = (*((volatile unsigned long *)(0x4402D000 + 0x00000C80)));
    ulDevMajorVer = ((efuse_reg2 >> 28) & 0xF);
    ulDevMinorVer = ((efuse_reg2 >> 24) & 0xF);
    if (((ulDevMajorVer == 0x3) && (ulDevMinorVer == 0)) ||
        (ulDevMajorVer < 0x3)) {
      unsigned int Scratch, PreRegulatedMode;
      PreRegulatedMode = ((*((volatile unsigned long *)(0x4402F840))) >> 6) & 1;
      if (PreRegulatedMode) {
        Scratch = (*((volatile unsigned long *)(0x4402F028)));
        Scratch &= 0xFFFFFF7F;
        (*((volatile unsigned long *)(0x4402F028))) = Scratch;
        Scratch = (*((volatile unsigned long *)(0x4402F010)));
        Scratch &= 0x0FFFFFFF;
        Scratch |= 0x10000000;
        (*((volatile unsigned long *)(0x4402F010))) = Scratch;
      } else {
        Scratch = (*((volatile unsigned long *)(0x4402F024)));
        Scratch &= 0xFFFFFFF0;
        Scratch |= 0x00000001;
        Scratch &= 0xFFFFF0FF;
        Scratch |= 0x00000500;
        Scratch &= 0xFFFE7FFF;
        Scratch |= 0x00010000;
        (*((volatile unsigned long *)(0x4402F024))) = Scratch;
        Scratch = (*((volatile unsigned long *)(0x4402F028)));
        Scratch &= 0xFFFFFF7F;
        Scratch &= 0x0FFFFFFF;
        Scratch &= 0xFF0FFFFF;
        Scratch |= 0x00300000;
        Scratch &= 0xFFF0FFFF;
        Scratch |= 0x00030000;
        (*((volatile unsigned long *)(0x4402F028))) = Scratch;
        (*((volatile unsigned long *)(0x4402F010))) &= 0x0FFFFFFF;
      }
    } else {
      unsigned int Scratch, PreRegulatedMode;
      PreRegulatedMode = ((*((volatile unsigned long *)(0x4402F840))) >> 6) & 1;
      Scratch = (*((volatile unsigned long *)(0x4402F028)));
      Scratch &= 0xFFFFFF7F;
      (*((volatile unsigned long *)(0x4402F028))) = Scratch;
      (*((volatile unsigned long *)(0x4402F010))) &= 0x0FFFFFFF;
      if (PreRegulatedMode) {
        (*((volatile unsigned long *)(0x4402F010))) |= 0x10000000;
      }
    }
  } else {
    unsigned long ulRegVal;
    ulRegVal = (*((volatile unsigned long *)(0x400F7000 + 0x00000000)));
    ulRegVal = (ulRegVal & ~0x3) | 0x1;
    (*((volatile unsigned long *)(0x400F7000 + 0x00000000))) = ulRegVal;
    ulRegVal = (*((volatile unsigned long *)(0x400F7000 + 0x0000003C)));
    ulRegVal = (ulRegVal & ~0x3FF) | 0x155;
    (*((volatile unsigned long *)(0x400F7000 + 0x0000003C))) = ulRegVal;
  }
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    $0x0,%al
call   1050 <PRCMSysResetCauseGet@plt>
cmp    $0x1,%eax
je     176c <PRCMCC3200MCUInit+0x5fc>
mov    $0x400,%eax
mov    (%rax),%rcx
mov    $0x10001,%eax
cmp    %rcx,%rax
jne    12d7 <PRCMCC3200MCUInit+0x167>
mov    $0x4402f010,%eax
movq   $0x30031820,(%rax)
mov    $0x4402f00c,%eax
movq   $0x4000000,(%rax)
mov    $0x7d00,%edi
call   1080 <UtilsDelay@plt>
mov    $0x4402f11c,%eax
movq   $0x99,(%rax)
mov    $0x4402f11c,%eax
movq   $0xaa,(%rax)
mov    $0x4402f11c,%eax
movq   $0x1aa,(%rax)
mov    $0x4402f124,%eax
movq   $0x99,(%rax)
mov    $0x4402f124,%eax
movq   $0xaa,(%rax)
mov    $0x4402f124,%eax
movq   $0x1aa,(%rax)
mov    $0x4402d00c,%eax
mov    (%rax),%rax
and    $0xff,%rax
cmp    $0x5,%rax
jne    124f <PRCMCC3200MCUInit+0xdf>
mov    $0x400f707c,%eax
mov    (%rax),%rcx
or     $0x1840082,%rcx
mov    $0x400f707c,%eax
mov    %rcx,(%rax)
mov    $0x400f70c4,%eax
movq   $0x1,(%rax)
mov    $0x400f70c4,%eax
movq   $0x0,(%rax)
mov    $0x400f7000,%eax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xfffffffffffffffc,%rax
or     $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x400f7000,%eax
mov    %rcx,(%rax)
mov    $0x400f703c,%eax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xfffffffffffffc00,%rax
or     $0x155,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x400f703c,%eax
mov    %rcx,(%rax)
mov    $0x4402f82c,%edi
mov    $0x101,%esi
call   1060 <PRCMHIBRegWrite@plt>
mov    $0x1f40,%edi
call   1080 <UtilsDelay@plt>
mov    $0x4402f0c4,%eax
movq   $0x10008,(%rax)
mov    $0x1f40,%edi
call   1080 <UtilsDelay@plt>
jmp    1324 <PRCMCC3200MCUInit+0x1b4>
mov    $0x4402f064,%eax
mov    (%rax),%rcx
or     $0x800000,%rcx
mov    $0x4402f064,%eax
mov    %rcx,(%rax)
mov    $0x4402fc18,%edi
call   1070 <PRCMHIBRegRead@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
or     $0x10,%rax
mov    %eax,%esi
mov    $0x4402fc18,%edi
call   1060 <PRCMHIBRegWrite@plt>
mov    $0x4402e16c,%eax
mov    (%rax),%rcx
or     $0x3c,%rcx
mov    $0x4402e16c,%eax
mov    %rcx,(%rax)
mov    $0x5,%edi
mov    $0x1,%esi
call   1040 <PRCMPeripheralClkEnable@plt>
mov    $0x5,%edi
call   1030 <PRCMPeripheralReset@plt>
mov    $0x5,%edi
mov    $0x1,%esi
call   1090 <PRCMPeripheralClkDisable@plt>
mov    $0x0,%al
call   1050 <PRCMSysResetCauseGet@plt>
cmp    $0x0,%eax
jne    136b <PRCMCC3200MCUInit+0x1fb>
mov    $0x4402f804,%edi
mov    $0x1,%esi
call   1060 <PRCMHIBRegWrite@plt>
mov    $0x4402f0c8,%eax
mov    (%rax),%rax
and    $0xff,%rax
cmp    $0x2,%rax
jne    13b9 <PRCMCC3200MCUInit+0x249>
mov    $0x4402e110,%eax
mov    (%rax),%rcx
and    $0xfffffffffffff3f0,%rcx
or     $0x2,%rcx
mov    $0x4402e110,%eax
mov    %rcx,(%rax)
mov    $0x4402e110,%eax
mov    (%rax),%rcx
and    $0xfffffffffffff3f0,%rcx
or     $0x2,%rcx
mov    $0x4402e114,%eax
mov    %rcx,(%rax)
mov    $0x4402e184,%eax
mov    (%rax),%rcx
or     $0x2,%rcx
mov    $0x4402e184,%eax
mov    %rcx,(%rax)
mov    $0x4402e0a4,%eax
mov    (%rax),%rax
and    $0xf,%rax
cmp    $0x1,%rax
jne    13f7 <PRCMCC3200MCUInit+0x287>
mov    $0x4402e0a4,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffff0,%rcx
mov    $0x4402e0a4,%eax
mov    %rcx,(%rax)
mov    $0x4402e0a8,%eax
mov    (%rax),%rax
and    $0xf,%rax
cmp    $0x1,%rax
jne    1421 <PRCMCC3200MCUInit+0x2b1>
mov    $0x4402e0a8,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffff0,%rcx
mov    $0x4402e0a8,%eax
mov    %rcx,(%rax)
mov    $0x4402dc78,%eax
mov    (%rax),%rax
shr    $0x16,%rax
and    $0xf,%rax
cmp    $0xe,%rax
jne    145e <PRCMCC3200MCUInit+0x2ee>
mov    $0x4402f0b0,%eax
mov    (%rax),%rcx
and    $0xffffffffff03ffff,%rcx
or     $0xc80000,%rcx
mov    $0x4402f0b0,%eax
mov    %rcx,(%rax)
jmp    147c <PRCMCC3200MCUInit+0x30c>
mov    $0x4402f0b0,%eax
mov    (%rax),%rcx
and    $0xffffffffff03ffff,%rcx
or     $0xa40000,%rcx
mov    $0x4402f0b0,%eax
mov    %rcx,(%rax)
mov    $0x4402fc74,%eax
mov    (%rax),%rcx
and    $0xffffffffefffffff,%rcx
mov    $0x4402fc74,%eax
mov    %rcx,(%rax)
mov    $0x400,%eax
mov    (%rax),%rax
and    $0xffff,%rax
cmp    $0x2,%rax
jae    14c4 <PRCMCC3200MCUInit+0x354>
mov    $0x4402f0a8,%eax
mov    (%rax),%rcx
or     $0x4,%rcx
mov    $0x4402f0a8,%eax
mov    %rcx,(%rax)
jmp    1568 <PRCMCC3200MCUInit+0x3f8>
mov    $0x400,%eax
mov    (%rax),%rax
shr    $0x10,%rax
cmp    $0x1,%rax
jb     1563 <PRCMCC3200MCUInit+0x3f3>
mov    $0x4402e188,%eax
mov    (%rax),%rcx
or     $0xe1,%rcx
mov    $0x4402e188,%eax
mov    %rcx,(%rax)
mov    $0x4402fc20,%eax
mov    (%rax),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     155e <PRCMCC3200MCUInit+0x3ee>
mov    $0x4402fc20,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffffe,%rcx
mov    $0x4402fc20,%eax
mov    %rcx,(%rax)
mov    $0x4402e188,%eax
mov    (%rax),%rcx
or     $0x200,%rcx
mov    $0x4402e188,%eax
mov    %rcx,(%rax)
mov    $0x4402f818,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffffe,%rcx
mov    $0x4402f818,%eax
mov    %rcx,(%rax)
mov    $0x4402f81c,%eax
movq   $0x0,(%rax)
mov    $0x4402f820,%eax
movq   $0x0,(%rax)
jmp    1563 <PRCMCC3200MCUInit+0x3f3>
jmp    1568 <PRCMCC3200MCUInit+0x3f8>
mov    $0x4402dc80,%eax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shr    $0x1c,%rax
and    $0xf,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
shr    $0x18,%rax
and    $0xf,%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x3,-0x20(%rbp)
jne    15aa <PRCMCC3200MCUInit+0x43a>
cmpq   $0x0,-0x28(%rbp)
je     15b5 <PRCMCC3200MCUInit+0x445>
cmpq   $0x3,-0x20(%rbp)
jae    16f4 <PRCMCC3200MCUInit+0x584>
mov    $0x4402f840,%eax
mov    (%rax),%rax
shr    $0x6,%rax
and    $0x1,%rax
mov    %eax,-0x30(%rbp)
cmpl   $0x0,-0x30(%rbp)
je     1628 <PRCMCC3200MCUInit+0x4b8>
mov    $0x4402f028,%eax
mov    (%rax),%rax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
and    $0xffffff7f,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
mov    %eax,%ecx
mov    $0x4402f028,%eax
mov    %rcx,(%rax)
mov    $0x4402f010,%eax
mov    (%rax),%rax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
and    $0xfffffff,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
or     $0x10000000,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
mov    %eax,%ecx
mov    $0x4402f010,%eax
mov    %rcx,(%rax)
jmp    16ef <PRCMCC3200MCUInit+0x57f>
mov    $0x4402f024,%eax
mov    (%rax),%rax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
and    $0xfffffff0,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
or     $0x1,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
and    $0xfffff0ff,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
or     $0x500,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
and    $0xfffe7fff,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
or     $0x10000,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
mov    %eax,%ecx
mov    $0x4402f024,%eax
mov    %rcx,(%rax)
mov    $0x4402f028,%eax
mov    (%rax),%rax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
and    $0xffffff7f,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
and    $0xfffffff,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
and    $0xff0fffff,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
or     $0x300000,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
and    $0xfff0ffff,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
or     $0x30000,%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
mov    %eax,%ecx
mov    $0x4402f028,%eax
mov    %rcx,(%rax)
mov    $0x4402f010,%eax
mov    (%rax),%rcx
and    $0xfffffff,%rcx
mov    $0x4402f010,%eax
mov    %rcx,(%rax)
jmp    1767 <PRCMCC3200MCUInit+0x5f7>
mov    $0x4402f840,%eax
mov    (%rax),%rax
shr    $0x6,%rax
and    $0x1,%rax
mov    %eax,-0x38(%rbp)
mov    $0x4402f028,%eax
mov    (%rax),%rax
mov    %eax,-0x34(%rbp)
mov    -0x34(%rbp),%eax
and    $0xffffff7f,%eax
mov    %eax,-0x34(%rbp)
mov    -0x34(%rbp),%eax
mov    %eax,%ecx
mov    $0x4402f028,%eax
mov    %rcx,(%rax)
mov    $0x4402f010,%eax
mov    (%rax),%rcx
and    $0xfffffff,%rcx
mov    $0x4402f010,%eax
mov    %rcx,(%rax)
cmpl   $0x0,-0x38(%rbp)
je     1762 <PRCMCC3200MCUInit+0x5f2>
mov    $0x4402f010,%eax
mov    (%rax),%rcx
or     $0x10000000,%rcx
mov    $0x4402f010,%eax
mov    %rcx,(%rax)
jmp    1767 <PRCMCC3200MCUInit+0x5f7>
jmp    17c0 <PRCMCC3200MCUInit+0x650>
mov    $0x400f7000,%eax
mov    (%rax),%rax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rax
and    $0xfffffffffffffffc,%rax
or     $0x1,%rax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rcx
mov    $0x400f7000,%eax
mov    %rcx,(%rax)
mov    $0x400f703c,%eax
mov    (%rax),%rax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rax
and    $0xfffffffffffffc00,%rax
or     $0x155,%rax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rcx
mov    $0x400f703c,%eax
mov    %rcx,(%rax)
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
xor    %eax,%eax
call   1050 <PRCMSysResetCauseGet@plt>
cmp    $0x1,%eax
jne    11b4 <PRCMCC3200MCUInit+0x44>
mov    0x400f7000,%rax
40
and    $0xfffffffffffffffc,%rax
or     $0x1,%rax
mov    %rax,0x400f7000
40
mov    $0xfffffffffffffc00,%rax
and    0x400f703c,%rax
40
or     $0x155,%rax
mov    %rax,0x400f703c
40
pop    %rax
ret
mov    0x400,%rax
cmp    $0x10001,%rax
jne    12c8 <PRCMCC3200MCUInit+0x158>
movq   $0x30031820,0x4402f010
44 20 18 03 30
movq   $0x4000000,0x4402f00c
mov    $0x7d00,%edi
call   1080 <UtilsDelay@plt>
movq   $0x99,0x4402f11c
movq   $0xaa,0x4402f11c
movq   $0x1aa,0x4402f11c
movq   $0x99,0x4402f124
movq   $0xaa,0x4402f124
movq   $0x1aa,0x4402f124
mov    0x4402d00c,%rax
44
cmp    $0x5,%al
jne    1262 <PRCMCC3200MCUInit+0xf2>
orq    $0x1840082,0x400f707c
movq   $0x1,0x400f70c4
movq   $0x0,0x400f70c4
mov    0x400f7000,%rax
40
and    $0xfffffffffffffffc,%rax
or     $0x1,%rax
mov    %rax,0x400f7000
40
mov    $0xfffffffffffffc00,%rax
and    0x400f703c,%rax
40
or     $0x155,%rax
mov    %rax,0x400f703c
40
mov    $0x4402f82c,%edi
mov    $0x101,%esi
call   1060 <PRCMHIBRegWrite@plt>
mov    $0x1f40,%edi
call   1080 <UtilsDelay@plt>
movq   $0x10008,0x4402f0c4
mov    $0x1f40,%edi
call   1080 <UtilsDelay@plt>
jmp    12f6 <PRCMCC3200MCUInit+0x186>
orq    $0x800000,0x4402f064
mov    $0x4402fc18,%edi
call   1070 <PRCMHIBRegRead@plt>
or     $0x10,%eax
mov    $0x4402fc18,%edi
mov    %eax,%esi
call   1060 <PRCMHIBRegWrite@plt>
orq    $0x3c,0x4402e16c
44 3c
mov    $0x5,%edi
mov    $0x1,%esi
call   1040 <PRCMPeripheralClkEnable@plt>
mov    $0x5,%edi
call   1030 <PRCMPeripheralReset@plt>
mov    $0x5,%edi
mov    $0x1,%esi
call   1090 <PRCMPeripheralClkDisable@plt>
xor    %eax,%eax
call   1050 <PRCMSysResetCauseGet@plt>
test   %eax,%eax
jne    1338 <PRCMCC3200MCUInit+0x1c8>
mov    $0x4402f804,%edi
mov    $0x1,%esi
call   1060 <PRCMHIBRegWrite@plt>
mov    0x4402f0c8,%rax
44
cmp    $0x2,%al
jne    1376 <PRCMCC3200MCUInit+0x206>
mov    $0xfffffffffffff3f0,%rax
mov    0x4402e110,%rcx
44
and    %rax,%rcx
or     $0x2,%rcx
mov    %rcx,0x4402e110
44
and    0x4402e110,%rax
44
or     $0x2,%rax
mov    %rax,0x4402e114
44
orq    $0x2,0x4402e184
44 02
mov    0x4402e0a4,%rax
44
and    $0xf,%eax
cmp    $0x1,%eax
jne    1398 <PRCMCC3200MCUInit+0x228>
andq   $0xfffffffffffffff0,0x4402e0a4
44 f0
mov    0x4402e0a8,%rax
44
and    $0xf,%eax
cmp    $0x1,%eax
jne    13b1 <PRCMCC3200MCUInit+0x241>
andq   $0xfffffffffffffff0,0x4402e0a8
44 f0
mov    0x4402dc78,%rax
44
and    $0x3c00000,%eax
mov    $0xffffffffff03ffff,%rcx
and    0x4402f0b0,%rcx
44
cmp    $0x3800000,%eax
mov    $0xc80000,%eax
mov    $0xa40000,%edx
cmove  %rax,%rdx
or     %rcx,%rdx
mov    %rdx,0x4402f0b0
44
andq   $0xffffffffefffffff,0x4402fc74
44 ff ff ff ef
testq  $0xfffe,0x400
je     1467 <PRCMCC3200MCUInit+0x2f7>
mov    0x400,%rax
cmp    $0x10000,%rax
jb     1470 <PRCMCC3200MCUInit+0x300>
orq    $0xe1,0x4402e188
testq  $0x1,0x4402fc20
je     1470 <PRCMCC3200MCUInit+0x300>
andq   $0xfffffffffffffffe,0x4402fc20
44 fe
orq    $0x200,0x4402e188
andq   $0xfffffffffffffffe,0x4402f818
44 fe
movq   $0x0,0x4402f81c
movq   $0x0,0x4402f820
jmp    1470 <PRCMCC3200MCUInit+0x300>
orq    $0x4,0x4402f0a8
44 04
mov    0x4402dc80,%rax
44
mov    %eax,%edx
shr    $0x1c,%edx
mov    %rdx,%rcx
xor    $0x3,%rcx
and    $0xf000000,%eax
or     %rcx,%rax
sete   %cl
mov    0x4402f840,%rax
44
cmp    $0x3,%edx
jb     14cf <PRCMCC3200MCUInit+0x35f>
test   %cl,%cl
jne    14cf <PRCMCC3200MCUInit+0x35f>
mov    $0xffffff7f,%ecx
and    %rcx,0x4402f028
44
andq   $0xfffffff,0x4402f010
44 ff ff ff 0f
test   $0x40,%al
je     11b2 <PRCMCC3200MCUInit+0x42>
orq    $0x10000000,0x4402f010
pop    %rax
ret
test   $0x40,%al
jne    1517 <PRCMCC3200MCUInit+0x3a7>
mov    0x4402f024,%rax
44
and    $0xfffe70f0,%eax
or     $0x10501,%rax
mov    %rax,0x4402f024
44
mov    0x4402f028,%rax
44
and    $0xf00ff7f,%eax
or     $0x330000,%rax
mov    %rax,0x4402f028
44
andq   $0xfffffff,0x4402f010
44 ff ff ff 0f
pop    %rax
ret
mov    $0xffffff7f,%eax
and    %rax,0x4402f028
44
mov    0x4402f010,%rax
44
and    $0xfffffff,%eax
or     $0x10000000,%rax
mov    %rax,0x4402f010
44
pop    %rax
ret

LLVM IR (-O0):
define void @PRCMCC3200MCUInit() {
%1 = alloca i64
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
%11 = call i32 (...) @PRCMSysResetCauseGet()
%12 = icmp ne i32 %11, 1
br i1 %12, label %13, label %218
13: ; preds = %0
%14 = load volatile i64, i64* inttoptr (i64 1024 to i64*)
%15 = icmp eq i64 65537, %14
br i1 %15, label %16, label %38
16: ; preds = %13
store volatile i64 805509152, i64* inttoptr (i64 1141043216 to i64*)
store volatile i64 67108864, i64* inttoptr (i64 1141043212 to i64*)
%17 = call i32 @UtilsDelay(i32 32000)
store volatile i64 153, i64* inttoptr (i64 1141043484 to i64*)
store volatile i64 170, i64* inttoptr (i64 1141043484 to i64*)
store volatile i64 426, i64* inttoptr (i64 1141043484 to i64*)
store volatile i64 153, i64* inttoptr (i64 1141043492 to i64*)
store volatile i64 170, i64* inttoptr (i64 1141043492 to i64*)
store volatile i64 426, i64* inttoptr (i64 1141043492 to i64*)
%18 = load volatile i64, i64* inttoptr (i64 1141035020 to i64*)
%19 = and i64 %18, 255
%20 = icmp eq i64 %19, 5
br i1 %20, label %21, label %24
21: ; preds = %16
%22 = load volatile i64, i64* inttoptr (i64 1074753660 to i64*)
%23 = or i64 %22, 25428098
store volatile i64 %23, i64* inttoptr (i64 1074753660 to i64*)
store volatile i64 1, i64* inttoptr (i64 1074753732 to i64*)
store volatile i64 0, i64* inttoptr (i64 1074753732 to i64*)
br label %24
24: ; preds = %21, %16
%25 = load volatile i64, i64* inttoptr (i64 1074753536 to i64*)
store i64 %25, i64* %1
%26 = load i64, i64* %1
%27 = and i64 %26, -4
%28 = or i64 %27, 1
store i64 %28, i64* %1
%29 = load i64, i64* %1
store volatile i64 %29, i64* inttoptr (i64 1074753536 to i64*)
%30 = load volatile i64, i64* inttoptr (i64 1074753596 to i64*)
store i64 %30, i64* %1
%31 = load i64, i64* %1
%32 = and i64 %31, -1024
%33 = or i64 %32, 341
store i64 %33, i64* %1
%34 = load i64, i64* %1
store volatile i64 %34, i64* inttoptr (i64 1074753596 to i64*)
%35 = call i32 @PRCMHIBRegWrite(i32 1141045292, i32 257)
%36 = call i32 @UtilsDelay(i32 8000)
store volatile i64 65544, i64* inttoptr (i64 1141043396 to i64*)
%37 = call i32 @UtilsDelay(i32 8000)
br label %48
38: ; preds = %13
%39 = load volatile i64, i64* inttoptr (i64 1141043300 to i64*)
%40 = or i64 %39, 8388608
store volatile i64 %40, i64* inttoptr (i64 1141043300 to i64*)
%41 = call i64 @PRCMHIBRegRead(i32 1141046296)
store i64 %41, i64* %2
%42 = load i64, i64* %2
%43 = or i64 %42, 16
%44 = trunc i64 %43 to i32
%45 = call i32 @PRCMHIBRegWrite(i32 1141046296, i32 %44)
%46 = load volatile i64, i64* inttoptr (i64 1141039468 to i64*)
%47 = or i64 %46, 60
store volatile i64 %47, i64* inttoptr (i64 1141039468 to i64*)
br label %48
48: ; preds = %38, %24
%49 = call i32 @PRCMPeripheralClkEnable(i32 5, i32 1)
%50 = call i32 @PRCMPeripheralReset(i32 5)
%51 = call i32 @PRCMPeripheralClkDisable(i32 5, i32 1)
%52 = call i32 (...) @PRCMSysResetCauseGet()
%53 = icmp eq i32 %52, 0
br i1 %53, label %54, label %56
54: ; preds = %48
%55 = call i32 @PRCMHIBRegWrite(i32 1141045252, i32 1)
br label %56
56: ; preds = %54, %48
%57 = load volatile i64, i64* inttoptr (i64 1141043400 to i64*)
%58 = and i64 %57, 255
%59 = icmp eq i64 %58, 2
br i1 %59, label %60, label %67
60: ; preds = %56
%61 = load volatile i64, i64* inttoptr (i64 1141039376 to i64*)
%62 = and i64 %61, -3088
%63 = or i64 %62, 2
store volatile i64 %63, i64* inttoptr (i64 1141039376 to i64*)
%64 = load volatile i64, i64* inttoptr (i64 1141039376 to i64*)
%65 = and i64 %64, -3088
%66 = or i64 %65, 2
store volatile i64 %66, i64* inttoptr (i64 1141039380 to i64*)
br label %67
67: ; preds = %60, %56
%68 = load volatile i64, i64* inttoptr (i64 1141039492 to i64*)
%69 = or i64 %68, 2
store volatile i64 %69, i64* inttoptr (i64 1141039492 to i64*)
%70 = load volatile i64, i64* inttoptr (i64 1141039268 to i64*)
%71 = and i64 %70, 15
%72 = icmp eq i64 %71, 1
br i1 %72, label %73, label %76
73: ; preds = %67
%74 = load volatile i64, i64* inttoptr (i64 1141039268 to i64*)
%75 = and i64 %74, -16
store volatile i64 %75, i64* inttoptr (i64 1141039268 to i64*)
br label %76
76: ; preds = %73, %67
%77 = load volatile i64, i64* inttoptr (i64 1141039272 to i64*)
%78 = and i64 %77, 15
%79 = icmp eq i64 %78, 1
br i1 %79, label %80, label %83
80: ; preds = %76
%81 = load volatile i64, i64* inttoptr (i64 1141039272 to i64*)
%82 = and i64 %81, -16
store volatile i64 %82, i64* inttoptr (i64 1141039272 to i64*)
br label %83
83: ; preds = %80, %76
%84 = load volatile i64, i64* inttoptr (i64 1141038200 to i64*)
%85 = lshr i64 %84, 22
%86 = and i64 %85, 15
%87 = icmp eq i64 %86, 14
br i1 %87, label %88, label %92
88: ; preds = %83
%89 = load volatile i64, i64* inttoptr (i64 1141043376 to i64*)
%90 = and i64 %89, -16515073
%91 = or i64 %90, 13107200
store volatile i64 %91, i64* inttoptr (i64 1141043376 to i64*)
br label %96
92: ; preds = %83
%93 = load volatile i64, i64* inttoptr (i64 1141043376 to i64*)
%94 = and i64 %93, -16515073
%95 = or i64 %94, 10747904
store volatile i64 %95, i64* inttoptr (i64 1141043376 to i64*)
br label %96
96: ; preds = %92, %88
%97 = load volatile i64, i64* inttoptr (i64 1141046388 to i64*)
%98 = and i64 %97, -268435457
store volatile i64 %98, i64* inttoptr (i64 1141046388 to i64*)
%99 = load volatile i64, i64* inttoptr (i64 1024 to i64*)
%100 = and i64 %99, 65535
%101 = icmp ult i64 %100, 2
br i1 %101, label %102, label %105
102: ; preds = %96
%103 = load volatile i64, i64* inttoptr (i64 1141043368 to i64*)
%104 = or i64 %103, 4
store volatile i64 %104, i64* inttoptr (i64 1141043368 to i64*)
br label %124
105: ; preds = %96
%106 = load volatile i64, i64* inttoptr (i64 1024 to i64*)
%107 = lshr i64 %106, 16
%108 = icmp uge i64 %107, 1
br i1 %108, label %109, label %123
109: ; preds = %105
%110 = load volatile i64, i64* inttoptr (i64 1141039496 to i64*)
%111 = or i64 %110, 225
store volatile i64 %111, i64* inttoptr (i64 1141039496 to i64*)
%112 = load volatile i64, i64* inttoptr (i64 1141046304 to i64*)
%113 = and i64 %112, 1
%114 = icmp ne i64 %113, 0
br i1 %114, label %115, label %122
115: ; preds = %109
%116 = load volatile i64, i64* inttoptr (i64 1141046304 to i64*)
%117 = and i64 %116, -2
store volatile i64 %117, i64* inttoptr (i64 1141046304 to i64*)
%118 = load volatile i64, i64* inttoptr (i64 1141039496 to i64*)
%119 = or i64 %118, 512
store volatile i64 %119, i64* inttoptr (i64 1141039496 to i64*)
%120 = load volatile i64, i64* inttoptr (i64 1141045272 to i64*)
%121 = and i64 %120, -2
store volatile i64 %121, i64* inttoptr (i64 1141045272 to i64*)
store volatile i64 0, i64* inttoptr (i64 1141045276 to i64*)
store volatile i64 0, i64* inttoptr (i64 1141045280 to i64*)
br label %122
122: ; preds = %115, %109
br label %123
123: ; preds = %122, %105
br label %124
124: ; preds = %123, %102
%125 = load volatile i64, i64* inttoptr (i64 1141038208 to i64*)
store i64 %125, i64* %3
%126 = load i64, i64* %3
%127 = lshr i64 %126, 28
%128 = and i64 %127, 15
store i64 %128, i64* %4
%129 = load i64, i64* %3
%130 = lshr i64 %129, 24
%131 = and i64 %130, 15
store i64 %131, i64* %5
%132 = load i64, i64* %4
%133 = icmp eq i64 %132, 3
br i1 %133, label %134, label %137
134: ; preds = %124
%135 = load i64, i64* %5
%136 = icmp eq i64 %135, 0
br i1 %136, label %140, label %137
137: ; preds = %134, %124
%138 = load i64, i64* %4
%139 = icmp ult i64 %138, 3
br i1 %139, label %140, label %198
140: ; preds = %137, %134
%141 = load volatile i64, i64* inttoptr (i64 1141045312 to i64*)
%142 = lshr i64 %141, 6
%143 = and i64 %142, 1
%144 = trunc i64 %143 to i32
store i32 %144, i32* %7
%145 = load i32, i32* %7
%146 = icmp ne i32 %145, 0
br i1 %146, label %147, label %162
147: ; preds = %140
%148 = load volatile i64, i64* inttoptr (i64 1141043240 to i64*)
%149 = trunc i64 %148 to i32
store i32 %149, i32* %6
%150 = load i32, i32* %6
%151 = and i32 %150, -129
store i32 %151, i32* %6
%152 = load i32, i32* %6
%153 = zext i32 %152 to i64
store volatile i64 %153, i64* inttoptr (i64 1141043240 to i64*)
%154 = load volatile i64, i64* inttoptr (i64 1141043216 to i64*)
%155 = trunc i64 %154 to i32
store i32 %155, i32* %6
%156 = load i32, i32* %6
%157 = and i32 %156, 268435455
store i32 %157, i32* %6
%158 = load i32, i32* %6
%159 = or i32 %158, 268435456
store i32 %159, i32* %6
%160 = load i32, i32* %6
%161 = zext i32 %160 to i64
store volatile i64 %161, i64* inttoptr (i64 1141043216 to i64*)
br label %197
162: ; preds = %140
%163 = load volatile i64, i64* inttoptr (i64 1141043236 to i64*)
%164 = trunc i64 %163 to i32
store i32 %164, i32* %6
%165 = load i32, i32* %6
%166 = and i32 %165, -16
store i32 %166, i32* %6
%167 = load i32, i32* %6
%168 = or i32 %167, 1
store i32 %168, i32* %6
%169 = load i32, i32* %6
%170 = and i32 %169, -3841
store i32 %170, i32* %6
%171 = load i32, i32* %6
%172 = or i32 %171, 1280
store i32 %172, i32* %6
%173 = load i32, i32* %6
%174 = and i32 %173, -98305
store i32 %174, i32* %6
%175 = load i32, i32* %6
%176 = or i32 %175, 65536
store i32 %176, i32* %6
%177 = load i32, i32* %6
%178 = zext i32 %177 to i64
store volatile i64 %178, i64* inttoptr (i64 1141043236 to i64*)
%179 = load volatile i64, i64* inttoptr (i64 1141043240 to i64*)
%180 = trunc i64 %179 to i32
store i32 %180, i32* %6
%181 = load i32, i32* %6
%182 = and i32 %181, -129
store i32 %182, i32* %6
%183 = load i32, i32* %6
%184 = and i32 %183, 268435455
store i32 %184, i32* %6
%185 = load i32, i32* %6
%186 = and i32 %185, -15728641
store i32 %186, i32* %6
%187 = load i32, i32* %6
%188 = or i32 %187, 3145728
store i32 %188, i32* %6
%189 = load i32, i32* %6
%190 = and i32 %189, -983041
store i32 %190, i32* %6
%191 = load i32, i32* %6
%192 = or i32 %191, 196608
store i32 %192, i32* %6
%193 = load i32, i32* %6
%194 = zext i32 %193 to i64
store volatile i64 %194, i64* inttoptr (i64 1141043240 to i64*)
%195 = load volatile i64, i64* inttoptr (i64 1141043216 to i64*)
%196 = and i64 %195, 268435455
store volatile i64 %196, i64* inttoptr (i64 1141043216 to i64*)
br label %197
197: ; preds = %162, %147
br label %217
198: ; preds = %137
%199 = load volatile i64, i64* inttoptr (i64 1141045312 to i64*)
%200 = lshr i64 %199, 6
%201 = and i64 %200, 1
%202 = trunc i64 %201 to i32
store i32 %202, i32* %9
%203 = load volatile i64, i64* inttoptr (i64 1141043240 to i64*)
%204 = trunc i64 %203 to i32
store i32 %204, i32* %8
%205 = load i32, i32* %8
%206 = and i32 %205, -129
store i32 %206, i32* %8
%207 = load i32, i32* %8
%208 = zext i32 %207 to i64
store volatile i64 %208, i64* inttoptr (i64 1141043240 to i64*)
%209 = load volatile i64, i64* inttoptr (i64 1141043216 to i64*)
%210 = and i64 %209, 268435455
store volatile i64 %210, i64* inttoptr (i64 1141043216 to i64*)
%211 = load i32, i32* %9
%212 = icmp ne i32 %211, 0
br i1 %212, label %213, label %216
213: ; preds = %198
%214 = load volatile i64, i64* inttoptr (i64 1141043216 to i64*)
%215 = or i64 %214, 268435456
store volatile i64 %215, i64* inttoptr (i64 1141043216 to i64*)
br label %216
216: ; preds = %213, %198
br label %217
217: ; preds = %216, %197
br label %229
218: ; preds = %0
%219 = load volatile i64, i64* inttoptr (i64 1074753536 to i64*)
store i64 %219, i64* %10
%220 = load i64, i64* %10
%221 = and i64 %220, -4
%222 = or i64 %221, 1
store i64 %222, i64* %10
%223 = load i64, i64* %10
store volatile i64 %223, i64* inttoptr (i64 1074753536 to i64*)
%224 = load volatile i64, i64* inttoptr (i64 1074753596 to i64*)
store i64 %224, i64* %10
%225 = load i64, i64* %10
%226 = and i64 %225, -1024
%227 = or i64 %226, 341
store i64 %227, i64* %10
%228 = load i64, i64* %10
store volatile i64 %228, i64* inttoptr (i64 1074753596 to i64*)
br label %229
229: ; preds = %218, %217
ret void
}

LLVM IR (-O2):
define void @PRCMCC3200MCUInit() {
%1 = tail call i32 (...) @PRCMSysResetCauseGet()
%2 = icmp eq i32 %1, 1
br i1 %2, label %139, label %3
3: ; preds = %0
%4 = load volatile i64, i64* inttoptr (i64 1024 to i64*)
%5 = icmp eq i64 %4, 65537
br i1 %5, label %6, label %24
6: ; preds = %3
store volatile i64 805509152, i64* inttoptr (i64 1141043216 to i64*)
store volatile i64 67108864, i64* inttoptr (i64 1141043212 to i64*)
%7 = tail call i32 @UtilsDelay(i32 32000)
store volatile i64 153, i64* inttoptr (i64 1141043484 to i64*)
store volatile i64 170, i64* inttoptr (i64 1141043484 to i64*)
store volatile i64 426, i64* inttoptr (i64 1141043484 to i64*)
store volatile i64 153, i64* inttoptr (i64 1141043492 to i64*)
store volatile i64 170, i64* inttoptr (i64 1141043492 to i64*)
store volatile i64 426, i64* inttoptr (i64 1141043492 to i64*)
%8 = load volatile i64, i64* inttoptr (i64 1141035020 to i64*)
%9 = and i64 %8, 255
%10 = icmp eq i64 %9, 5
br i1 %10, label %11, label %14
11: ; preds = %6
%12 = load volatile i64, i64* inttoptr (i64 1074753660 to i64*)
%13 = or i64 %12, 25428098
store volatile i64 %13, i64* inttoptr (i64 1074753660 to i64*)
store volatile i64 1, i64* inttoptr (i64 1074753732 to i64*)
store volatile i64 0, i64* inttoptr (i64 1074753732 to i64*)
br label %14
14: ; preds = %11, %6
%15 = load volatile i64, i64* inttoptr (i64 1074753536 to i64*)
%16 = and i64 %15, -4
%17 = or i64 %16, 1
store volatile i64 %17, i64* inttoptr (i64 1074753536 to i64*)
%18 = load volatile i64, i64* inttoptr (i64 1074753596 to i64*)
%19 = and i64 %18, -1024
%20 = or i64 %19, 341
store volatile i64 %20, i64* inttoptr (i64 1074753596 to i64*)
%21 = tail call i32 @PRCMHIBRegWrite(i32 1141045292, i32 257)
%22 = tail call i32 @UtilsDelay(i32 8000)
store volatile i64 65544, i64* inttoptr (i64 1141043396 to i64*)
%23 = tail call i32 @UtilsDelay(i32 8000)
br label %33
24: ; preds = %3
%25 = load volatile i64, i64* inttoptr (i64 1141043300 to i64*)
%26 = or i64 %25, 8388608
store volatile i64 %26, i64* inttoptr (i64 1141043300 to i64*)
%27 = tail call i64 @PRCMHIBRegRead(i32 1141046296)
%28 = trunc i64 %27 to i32
%29 = or i32 %28, 16
%30 = tail call i32 @PRCMHIBRegWrite(i32 1141046296, i32 %29)
%31 = load volatile i64, i64* inttoptr (i64 1141039468 to i64*)
%32 = or i64 %31, 60
store volatile i64 %32, i64* inttoptr (i64 1141039468 to i64*)
br label %33
33: ; preds = %24, %14
%34 = tail call i32 @PRCMPeripheralClkEnable(i32 5, i32 1)
%35 = tail call i32 @PRCMPeripheralReset(i32 5)
%36 = tail call i32 @PRCMPeripheralClkDisable(i32 5, i32 1)
%37 = tail call i32 (...) @PRCMSysResetCauseGet()
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %41
39: ; preds = %33
%40 = tail call i32 @PRCMHIBRegWrite(i32 1141045252, i32 1)
br label %41
41: ; preds = %39, %33
%42 = load volatile i64, i64* inttoptr (i64 1141043400 to i64*)
%43 = and i64 %42, 255
%44 = icmp eq i64 %43, 2
br i1 %44, label %45, label %52
45: ; preds = %41
%46 = load volatile i64, i64* inttoptr (i64 1141039376 to i64*)
%47 = and i64 %46, -3088
%48 = or i64 %47, 2
store volatile i64 %48, i64* inttoptr (i64 1141039376 to i64*)
%49 = load volatile i64, i64* inttoptr (i64 1141039376 to i64*)
%50 = and i64 %49, -3088
%51 = or i64 %50, 2
store volatile i64 %51, i64* inttoptr (i64 1141039380 to i64*)
br label %52
52: ; preds = %45, %41
%53 = load volatile i64, i64* inttoptr (i64 1141039492 to i64*)
%54 = or i64 %53, 2
store volatile i64 %54, i64* inttoptr (i64 1141039492 to i64*)
%55 = load volatile i64, i64* inttoptr (i64 1141039268 to i64*)
%56 = and i64 %55, 15
%57 = icmp eq i64 %56, 1
br i1 %57, label %58, label %61
58: ; preds = %52
%59 = load volatile i64, i64* inttoptr (i64 1141039268 to i64*)
%60 = and i64 %59, -16
store volatile i64 %60, i64* inttoptr (i64 1141039268 to i64*)
br label %61
61: ; preds = %58, %52
%62 = load volatile i64, i64* inttoptr (i64 1141039272 to i64*)
%63 = and i64 %62, 15
%64 = icmp eq i64 %63, 1
br i1 %64, label %65, label %68
65: ; preds = %61
%66 = load volatile i64, i64* inttoptr (i64 1141039272 to i64*)
%67 = and i64 %66, -16
store volatile i64 %67, i64* inttoptr (i64 1141039272 to i64*)
br label %68
68: ; preds = %65, %61
%69 = load volatile i64, i64* inttoptr (i64 1141038200 to i64*)
%70 = and i64 %69, 62914560
%71 = icmp eq i64 %70, 58720256
%72 = load volatile i64, i64* inttoptr (i64 1141043376 to i64*)
%73 = and i64 %72, -16515073
%74 = select i1 %71, i64 13107200, i64 10747904
%75 = or i64 %73, %74
store volatile i64 %75, i64* inttoptr (i64 1141043376 to i64*)
%76 = load volatile i64, i64* inttoptr (i64 1141046388 to i64*)
%77 = and i64 %76, -268435457
store volatile i64 %77, i64* inttoptr (i64 1141046388 to i64*)
%78 = load volatile i64, i64* inttoptr (i64 1024 to i64*)
%79 = and i64 %78, 65534
%80 = icmp eq i64 %79, 0
br i1 %80, label %81, label %84
81: ; preds = %68
%82 = load volatile i64, i64* inttoptr (i64 1141043368 to i64*)
%83 = or i64 %82, 4
store volatile i64 %83, i64* inttoptr (i64 1141043368 to i64*)
br label %100
84: ; preds = %68
%85 = load volatile i64, i64* inttoptr (i64 1024 to i64*)
%86 = icmp ult i64 %85, 65536
br i1 %86, label %100, label %87
87: ; preds = %84
%88 = load volatile i64, i64* inttoptr (i64 1141039496 to i64*)
%89 = or i64 %88, 225
store volatile i64 %89, i64* inttoptr (i64 1141039496 to i64*)
%90 = load volatile i64, i64* inttoptr (i64 1141046304 to i64*)
%91 = and i64 %90, 1
%92 = icmp eq i64 %91, 0
br i1 %92, label %100, label %93
93: ; preds = %87
%94 = load volatile i64, i64* inttoptr (i64 1141046304 to i64*)
%95 = and i64 %94, -2
store volatile i64 %95, i64* inttoptr (i64 1141046304 to i64*)
%96 = load volatile i64, i64* inttoptr (i64 1141039496 to i64*)
%97 = or i64 %96, 512
store volatile i64 %97, i64* inttoptr (i64 1141039496 to i64*)
%98 = load volatile i64, i64* inttoptr (i64 1141045272 to i64*)
%99 = and i64 %98, -2
store volatile i64 %99, i64* inttoptr (i64 1141045272 to i64*)
store volatile i64 0, i64* inttoptr (i64 1141045276 to i64*)
store volatile i64 0, i64* inttoptr (i64 1141045280 to i64*)
br label %100
100: ; preds = %84, %93, %87, %81
%101 = load volatile i64, i64* inttoptr (i64 1141038208 to i64*)
%102 = lshr i64 %101, 28
%103 = and i64 %102, 15
%104 = icmp eq i64 %103, 3
%105 = and i64 %101, 251658240
%106 = icmp eq i64 %105, 0
%107 = select i1 %104, i1 %106, i1 false
%108 = icmp ult i64 %103, 3
%109 = or i1 %108, %107
%110 = load volatile i64, i64* inttoptr (i64 1141045312 to i64*)
br i1 %109, label %111, label %129
111: ; preds = %100
%112 = and i64 %110, 64
%113 = icmp eq i64 %112, 0
br i1 %113, label %120, label %114
114: ; preds = %111
%115 = load volatile i64, i64* inttoptr (i64 1141043240 to i64*)
%116 = and i64 %115, 4294967167
store volatile i64 %116, i64* inttoptr (i64 1141043240 to i64*)
%117 = load volatile i64, i64* inttoptr (i64 1141043216 to i64*)
%118 = and i64 %117, 268435455
%119 = or i64 %118, 268435456
store volatile i64 %119, i64* inttoptr (i64 1141043216 to i64*)
br label %146
120: ; preds = %111
%121 = load volatile i64, i64* inttoptr (i64 1141043236 to i64*)
%122 = and i64 %121, 4294865136
%123 = or i64 %122, 66817
store volatile i64 %123, i64* inttoptr (i64 1141043236 to i64*)
%124 = load volatile i64, i64* inttoptr (i64 1141043240 to i64*)
%125 = and i64 %124, 251723647
%126 = or i64 %125, 3342336
store volatile i64 %126, i64* inttoptr (i64 1141043240 to i64*)
%127 = load volatile i64, i64* inttoptr (i64 1141043216 to i64*)
%128 = and i64 %127, 268435455
store volatile i64 %128, i64* inttoptr (i64 1141043216 to i64*)
br label %146
129: ; preds = %100
%130 = load volatile i64, i64* inttoptr (i64 1141043240 to i64*)
%131 = and i64 %130, 4294967167
store volatile i64 %131, i64* inttoptr (i64 1141043240 to i64*)
%132 = load volatile i64, i64* inttoptr (i64 1141043216 to i64*)
%133 = and i64 %132, 268435455
store volatile i64 %133, i64* inttoptr (i64 1141043216 to i64*)
%134 = and i64 %110, 64
%135 = icmp eq i64 %134, 0
br i1 %135, label %146, label %136
136: ; preds = %129
%137 = load volatile i64, i64* inttoptr (i64 1141043216 to i64*)
%138 = or i64 %137, 268435456
store volatile i64 %138, i64* inttoptr (i64 1141043216 to i64*)
br label %146
139: ; preds = %0
%140 = load volatile i64, i64* inttoptr (i64 1074753536 to i64*)
%141 = and i64 %140, -4
%142 = or i64 %141, 1
store volatile i64 %142, i64* inttoptr (i64 1074753536 to i64*)
%143 = load volatile i64, i64* inttoptr (i64 1074753596 to i64*)
%144 = and i64 %143, -1024
%145 = or i64 %144, 341
store volatile i64 %145, i64* inttoptr (i64 1074753596 to i64*)
br label %146
146: ; preds = %120, %114, %136, %129, %139
ret void
}