#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t EPIPSRAMConfigRegGet(uint32_t ui32Base, uint32_t ui32CS) {
  uint32_t ui32Offset;
  ;
  ;
  if (ui32CS < 2) {
    ui32Offset = 0x00000010 + (ui32CS << 2);
  } else {
    ui32Offset = 0x00000308 + ((ui32CS - 2) << 2);
  }
  while ((*((volatile uint32_t *)(ui32Base + ui32Offset))) & 0x00020000) {
  }
  return ((*((volatile uint32_t *)(ui32Base + 0x00000360))) & 0xffff);
}


x86 assembly (clang, -O0):
<EPIPSRAMConfigRegGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1125 <EPIPSRAMConfigRegGet+0x25>
mov    -0x8(%rbp),%eax
shl    $0x2,%eax
add    $0x10,%eax
mov    %eax,-0xc(%rbp)
jmp    1136 <EPIPSRAMConfigRegGet+0x36>
mov    -0x8(%rbp),%eax
sub    $0x2,%eax
shl    $0x2,%eax
add    $0x308,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <EPIPSRAMConfigRegGet+0x3b>
mov    -0x4(%rbp),%eax
add    -0xc(%rbp),%eax
cltq
mov    (%rax),%eax
and    $0x20000,%eax
cmp    $0x0,%eax
je     1158 <EPIPSRAMConfigRegGet+0x58>
jmp    113b <EPIPSRAMConfigRegGet+0x3b>
mov    -0x4(%rbp),%eax
add    $0x360,%eax
cltq
mov    (%rax),%eax
and    $0xffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPIPSRAMConfigRegGet>:
cmp    $0x2,%esi
lea    0x10(%rdi,%rsi,4),%eax
lea    0x300(%rdi,%rsi,4),%ecx
cmovl  %eax,%ecx
movslq %ecx,%rax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
testl  $0x20000,(%rax)
jne    1120 <EPIPSRAMConfigRegGet+0x20>
movslq %edi,%rax
mov    0x360(%rax),%eax
movzwl %ax,%eax
ret

LLVM IR (-O0):
define i32 @EPIPSRAMConfigRegGet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* %4
%10 = shl i32 %9, 2
%11 = add nsw i32 16, %10
store i32 %11, i32* %5
br label %17
12: ; preds = %2
%13 = load i32, i32* %4
%14 = sub nsw i32 %13, 2
%15 = shl i32 %14, 2
%16 = add nsw i32 776, %15
store i32 %16, i32* %5
br label %17
17: ; preds = %12, %8
br label %18
18: ; preds = %27, %17
%19 = load i32, i32* %3
%20 = load i32, i32* %5
%21 = add nsw i32 %19, %20
%22 = sext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
%24 = load volatile i32, i32* %23
%25 = and i32 %24, 131072
%26 = icmp ne i32 %25, 0
br i1 %26, label %27, label %28
27: ; preds = %18
br label %18
28: ; preds = %18
%29 = load i32, i32* %3
%30 = add nsw i32 %29, 864
%31 = sext i32 %30 to i64
%32 = inttoptr i64 %31 to i32*
%33 = load volatile i32, i32* %32
%34 = and i32 %33, 65535
ret i32 %34
}

LLVM IR (-O2):
define i32 @EPIPSRAMConfigRegGet(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, 2
%4 = shl i32 %1, 2
%5 = select i1 %3, i32 16, i32 768
%6 = add i32 %4, %0
%7 = add i32 %6, %5
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
br label %10
10: ; preds = %10, %2
%11 = load volatile i32, i32* %9
%12 = and i32 %11, 131072
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %10
14: ; preds = %10
%15 = add nsw i32 %0, 864
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
%19 = and i32 %18, 65535
ret i32 %19
}