xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ notify_pvcall(char *);
int pvWriteBoardIO(char byBoardNum, long dwOffset, long dwData) {
  notify_pvcall("f");
  return (0);
}


x86 assembly (clang, -O0):
<pvWriteBoardIO>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pvWriteBoardIO>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <notify_pvcall@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"f\00"
define i32 @pvWriteBoardIO(i8 signext %0, i64 %1, i64 %2) {
%4 = alloca i8
%5 = alloca i64
%6 = alloca i64
store i8 %0, i8* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c"f\00"
define i32 @pvWriteBoardIO(i8 signext %0, i64 %1, i64 %2) {
%4 = tail call i32 @notify_pvcall(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int fun746() { return 746; }


x86 assembly (clang, -O0):
<fun746>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2ea,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun746>:
mov    $0x2ea,%eax
ret

LLVM IR (-O0):
define i32 @fun746() {
ret i32 746
}

LLVM IR (-O2):
define i32 @fun746() {
ret i32 746
}
/* Variables and functions */
int serial_getc();
int /*<<< orphan*/ serial_puts(char *);
void spinner2(void) {
  int c;
  serial_puts("Ready\n");
  for (;;) {
    c = serial_getc();
  }
}


x86 assembly (clang, -O0):
<spinner2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1040 <serial_puts@plt>
mov    $0x0,%al
call   1030 <serial_getc@plt>
mov    %eax,-0x4(%rbp)
jmp    1134 <spinner2+0x14>

x86 assembly (clang, -O2):
<spinner2>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <serial_puts@plt>
nopl   (%rax)
xor    %eax,%eax
call   1030 <serial_getc@plt>
jmp    1130 <spinner2+0x10>

LLVM IR (-O0):
@.str = [7 x i8] c"Ready\0A\00"
define void @spinner2() {
%1 = alloca i32
%2 = call i32 @serial_puts(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %3, %0
%4 = call i32 (...) @serial_getc()
store i32 %4, i32* %1
br label %3
}

LLVM IR (-O2):
@.str = [7 x i8] c"Ready\0A\00"
define void @spinner2() {
%1 = tail call i32 @serial_puts(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %2, %0
%3 = tail call i32 (...) @serial_getc()
br label %2
}
/* Type definitions */
struct genlist_link {
  int dummy;
};
struct clause_list_link {
  int dummy;
};
struct Clause {
  int dummy;
};

/* Variables and functions */
scalar_t__ genlist_link_data(struct genlist_link const *);
struct Clause *clause_list_link_data(const struct clause_list_link *plink) {
  return (
      (struct Clause *)genlist_link_data((const struct genlist_link *)plink));
}


x86 assembly (clang, -O0):
<clause_list_link_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <genlist_link_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clause_list_link_data>:
jmp    1030 <genlist_link_data@plt>

LLVM IR (-O0):
%struct.Clause = type { i32 }
%struct.clause_list_link = type { i32 }
%struct.genlist_link = type { i32 }
define %struct.Clause* @clause_list_link_data(%struct.clause_list_link* %0) {
%2 = alloca %struct.clause_list_link*
store %struct.clause_list_link* %0, %struct.clause_list_link** %2
%3 = load %struct.clause_list_link*, %struct.clause_list_link** %2
%4 = bitcast %struct.clause_list_link* %3 to %struct.genlist_link*
%5 = call i64 @genlist_link_data(%struct.genlist_link* %4)
%6 = inttoptr i64 %5 to %struct.Clause*
ret %struct.Clause* %6
}

LLVM IR (-O2):
%struct.Clause = type { i32 }
%struct.clause_list_link = type { i32 }
%struct.genlist_link = type { i32 }
define %struct.Clause* @clause_list_link_data(%struct.clause_list_link* %0) {
%2 = bitcast %struct.clause_list_link* %0 to %struct.genlist_link*
%3 = tail call i64 @genlist_link_data(%struct.genlist_link* %2)
%4 = inttoptr i64 %3 to %struct.Clause*
ret %struct.Clause* %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char *, int);
main() {
  char *s = "main() { char *s=%c%s%c; printf(s,34,s,34); }";
  printf(s, 34, s, 34);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    $0x22,%ecx
mov    %ecx,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x22,%esi
mov    %rdi,%rdx
mov    $0x22,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [46 x i8] c"main() { char *s=%c%s%c; printf(s,34,s,34); }\00"
define i32 @main() {
%1 = alloca i8*
store i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @printf(i8* %2, i32 34, i8* %3, i32 34)
ret i32 0
}

LLVM IR (-O2):
@.str = [46 x i8] c"main() { char *s=%c%s%c; printf(s,34,s,34); }\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 34, i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i32 34)
ret i32 0
}
int bitsneeded(int n) {
  int cnt;
  cnt = 0;
  while (n > 0) {
    n = n >> 1;
    cnt += 1;
  }
  return cnt;
}


x86 assembly (clang, -O0):
<bitsneeded>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    112f <bitsneeded+0x2f>
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <bitsneeded+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitsneeded>:
xor    %eax,%eax
test   %edi,%edi
jle    111c <bitsneeded+0x1c>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
shr    %ecx
add    $0x1,%eax
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <bitsneeded+0x10>
ret

LLVM IR (-O0):
define i32 @bitsneeded(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = ashr i32 %8, 1
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @bitsneeded(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = lshr i32 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i32 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
scalar_t__ stat(char const *, struct stat *);
int fileExists(const char *file) {
  struct stat buf;
  return (stat(file, &buf) == 0);
}


x86 assembly (clang, -O0):
<fileExists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fileExists>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @fileExists(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.stat
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @stat(i8* %4, %struct.stat* %3)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @fileExists(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
struct ipam_file {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fprint_ipam_file_fmt(int /*<<< orphan*/,
                                        struct ipam_file const *, char const *);
int /*<<< orphan*/ stdout;
void print_ipam_file_fmt(const struct ipam_file *sf, const char *fmt) {
  fprint_ipam_file_fmt(stdout, sf, fmt);
}


x86 assembly (clang, -O0):
<print_ipam_file_fmt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <fprint_ipam_file_fmt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_ipam_file_fmt>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    0x2ec3(%rip),%rax
mov    (%rax),%edi
jmp    1030 <fprint_ipam_file_fmt@plt>

LLVM IR (-O0):
%struct.ipam_file = type { i32 }
@stdout = global i32 0
define void @print_ipam_file_fmt(%struct.ipam_file* %0, i8* %1) {
%3 = alloca %struct.ipam_file*
%4 = alloca i8*
store %struct.ipam_file* %0, %struct.ipam_file** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stdout
%6 = load %struct.ipam_file*, %struct.ipam_file** %3
%7 = load i8*, i8** %4
%8 = call i32 @fprint_ipam_file_fmt(i32 %5, %struct.ipam_file* %6, i8* %7)
ret void
}

LLVM IR (-O2):
%struct.ipam_file = type { i32 }
@stdout = global i32 0
define void @print_ipam_file_fmt(%struct.ipam_file* %0, i8* %1) {
%3 = load i32, i32* @stdout
%4 = tail call i32 @fprint_ipam_file_fmt(i32 %3, %struct.ipam_file* %0, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FlashLoadData();
int /*<<< orphan*/ LoadFlashFromFile(char *);
int /*<<< orphan*/ SaveFlashToFile(char *);
void testcase_5() {
  LoadFlashFromFile("t6.dat");
  FlashLoadData();
  SaveFlashToFile("t7.dat");
}


x86 assembly (clang, -O0):
<testcase_5>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1050 <LoadFlashFromFile@plt>
mov    $0x0,%al
call   1030 <FlashLoadData@plt>
lea    0xeb9(%rip),%rdi
call   1040 <SaveFlashToFile@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testcase_5>:
push   %rax
lea    0xec8(%rip),%rdi
call   1050 <LoadFlashFromFile@plt>
xor    %eax,%eax
call   1030 <FlashLoadData@plt>
lea    0xebc(%rip),%rdi
pop    %rax
jmp    1040 <SaveFlashToFile@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"t6.dat\00"
@.str.1 = [7 x i8] c"t7.dat\00"
define void @testcase_5() {
%1 = call i32 @LoadFlashFromFile(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @FlashLoadData()
%3 = call i32 @SaveFlashToFile(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"t6.dat\00"
@.str.1 = [7 x i8] c"t7.dat\00"
define void @testcase_5() {
%1 = tail call i32 @LoadFlashFromFile(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @FlashLoadData()
%3 = tail call i32 @SaveFlashToFile(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ r4030_delay();
unsigned int r4030_read_reg32(unsigned addr) {
  unsigned int ret = *((volatile unsigned int *)addr);
  r4030_delay();
  return ret;
}


x86 assembly (clang, -O0):
<r4030_read_reg32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <r4030_delay@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<r4030_read_reg32>:
push   %rbx
mov    %edi,%eax
mov    (%rax),%ebx
xor    %eax,%eax
call   1030 <r4030_delay@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @r4030_read_reg32(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
store i32 %7, i32* %3
%8 = call i32 (...) @r4030_delay()
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @r4030_read_reg32(i32 %0) {
%2 = zext i32 %0 to i64
%3 = inttoptr i64 %2 to i32*
%4 = load volatile i32, i32* %3
%5 = tail call i32 (...) @r4030_delay()
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ bar(int, int);
void foo(int invariant) {
  int i;
  for (i = 0; i < 10; i++) {
    bar(i, invariant);
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    1145 <foo+0x35>
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1030 <bar@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <foo+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
mov    %ebx,%esi
call   1030 <bar@plt>
mov    $0x1,%edi
mov    %ebx,%esi
call   1030 <bar@plt>
mov    $0x2,%edi
mov    %ebx,%esi
call   1030 <bar@plt>
mov    $0x3,%edi
mov    %ebx,%esi
call   1030 <bar@plt>
mov    $0x4,%edi
mov    %ebx,%esi
call   1030 <bar@plt>
mov    $0x5,%edi
mov    %ebx,%esi
call   1030 <bar@plt>
mov    $0x6,%edi
mov    %ebx,%esi
call   1030 <bar@plt>
mov    $0x7,%edi
mov    %ebx,%esi
call   1030 <bar@plt>
mov    $0x8,%edi
mov    %ebx,%esi
call   1030 <bar@plt>
mov    $0x9,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <bar@plt>

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %3
%9 = load i32, i32* %2
%10 = call i32 @bar(i32 %8, i32 %9)
br label %11
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
%2 = tail call i32 @bar(i32 0, i32 %0)
%3 = tail call i32 @bar(i32 1, i32 %0)
%4 = tail call i32 @bar(i32 2, i32 %0)
%5 = tail call i32 @bar(i32 3, i32 %0)
%6 = tail call i32 @bar(i32 4, i32 %0)
%7 = tail call i32 @bar(i32 5, i32 %0)
%8 = tail call i32 @bar(i32 6, i32 %0)
%9 = tail call i32 @bar(i32 7, i32 %0)
%10 = tail call i32 @bar(i32 8, i32 %0)
%11 = tail call i32 @bar(i32 9, i32 %0)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void PWMSyncUpdate(uint32_t ui32Base, uint32_t ui32GenBits) {
  ASSERT((ui32Base == 0x40028000) || (ui32Base == 0x40029000));
  ASSERT(!(ui32GenBits & ~(0x00000001 | 0x00000002 | 0x00000004 | 0x00000008)));
  (*((volatile uint32_t *)(ui32Base + 0x00000000))) = ui32GenBits;
}


x86 assembly (clang, -O0):
<PWMSyncUpdate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x40028000,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     113d <PWMSyncUpdate+0x2d>
cmpl   $0x40029000,-0x4(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%eax
and    $0xfffffff0,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x0,%eax
cltq
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMSyncUpdate>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40028000,%eax
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
cmp    $0x10,%ebx
setb   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
mov    %ebx,(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @PWMSyncUpdate(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1073905664
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1073909760
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @ASSERT(i32 %12)
%14 = load i32, i32* %4
%15 = and i32 %14, -16
%16 = icmp ne i32 %15, 0
%17 = xor i1 %16, true
%18 = zext i1 %17 to i32
%19 = call i32 @ASSERT(i32 %18)
%20 = load i32, i32* %4
%21 = load i32, i32* %3
%22 = add nsw i32 %21, 0
%23 = sext i32 %22 to i64
%24 = inttoptr i64 %23 to i32*
store volatile i32 %20, i32* %24
ret void
}

LLVM IR (-O2):
define void @PWMSyncUpdate(i32 %0, i32 %1) {
%3 = and i32 %0, -4097
%4 = icmp eq i32 %3, 1073905664
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 %5)
%7 = icmp ult i32 %1, 16
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = sext i32 %0 to i64
%11 = inttoptr i64 %10 to i32*
store volatile i32 %1, i32* %11
ret void
}
void testClosureSSSrV(void (*closure)(short, short, short), short a1, short a2,
                      short a3) {
  (*closure)(a1, a2, a3);
}


x86 assembly (clang, -O0):
<testClosureSSSrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cx,%ax
mov    %dx,%cx
mov    %si,%dx
mov    %rdi,-0x8(%rbp)
mov    %dx,-0xa(%rbp)
mov    %cx,-0xc(%rbp)
mov    %ax,-0xe(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xa(%rbp),%dx
mov    -0xc(%rbp),%cx
movswl %dx,%edi
movswl %cx,%esi
movswl -0xe(%rbp),%edx
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureSSSrV>:
mov    %rdi,%rax
mov    %esi,%edi
mov    %edx,%esi
mov    %ecx,%edx
jmp    *%rax

LLVM IR (-O0):
define void @testClosureSSSrV(void (i16, i16, i16)* %0, i16 signext %1, i16 signext %2, i16 signext %3) {
%5 = alloca void (i16, i16, i16)*
%6 = alloca i16
%7 = alloca i16
%8 = alloca i16
store void (i16, i16, i16)* %0, void (i16, i16, i16)** %5
store i16 %1, i16* %6
store i16 %2, i16* %7
store i16 %3, i16* %8
%9 = load void (i16, i16, i16)*, void (i16, i16, i16)** %5
%10 = load i16, i16* %6
%11 = load i16, i16* %7
%12 = load i16, i16* %8
ret void
}

LLVM IR (-O2):
define void @testClosureSSSrV(void (i16, i16, i16)* nocapture %0, i16 signext %1, i16 signext %2, i16 signext %3) {
tail call void %0(i16 signext %1, i16 signext %2, i16 signext %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ value;
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ rgph_xxh64s_finalise(int /*<<< orphan*/ *);
int /*<<< orphan*/ rgph_xxh64s_fmix8(int /*<<< orphan*/, int /*<<< orphan*/ *);
int /*<<< orphan*/ rgph_xxh64s_fold(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ rgph_xxh64s_init(int, uintptr_t, int /*<<< orphan*/ *);
uint64_t rgph_u64_xxh64s_u64(uint64_t value, uintptr_t seed) {
  uint64_t h[4];
  rgph_xxh64s_init(sizeof(value), seed, h);
  rgph_xxh64s_fold(sizeof(value), h);
  rgph_xxh64s_fmix8(value, h);
  rgph_xxh64s_finalise(h);
  return h[0];
}


x86 assembly (clang, -O0):
<rgph_u64_xxh64s_u64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    -0x20(%rbp),%rdx
mov    $0x4,%edi
call   1060 <rgph_xxh64s_init@plt>
lea    -0x20(%rbp),%rsi
mov    $0x4,%edi
call   1040 <rgph_xxh64s_fold@plt>
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
call   1030 <rgph_xxh64s_fmix8@plt>
lea    -0x20(%rbp),%rdi
call   1050 <rgph_xxh64s_finalise@plt>
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgph_u64_xxh64s_u64>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
mov    %edi,%ebp
mov    %rsp,%rbx
mov    $0x4,%edi
mov    %rbx,%rdx
call   1060 <rgph_xxh64s_init@plt>
mov    $0x4,%edi
mov    %rbx,%rsi
call   1040 <rgph_xxh64s_fold@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
call   1030 <rgph_xxh64s_fmix8@plt>
mov    %rbx,%rdi
call   1050 <rgph_xxh64s_finalise@plt>
mov    (%rsp),%eax
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @rgph_u64_xxh64s_u64(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca [4 x i32]
store i32 %0, i32* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 0
%8 = call i32 @rgph_xxh64s_init(i32 4, i64 %6, i32* %7)
%9 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 0
%10 = call i32 @rgph_xxh64s_fold(i32 4, i32* %9)
%11 = load i32, i32* %3
%12 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 0
%13 = call i32 @rgph_xxh64s_fmix8(i32 %11, i32* %12)
%14 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 0
%15 = call i32 @rgph_xxh64s_finalise(i32* %14)
%16 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 0
%17 = load i32, i32* %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @rgph_u64_xxh64s_u64(i32 %0, i64 %1) {
%3 = alloca [4 x i32]
%4 = bitcast [4 x i32]* %3 to i8*
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 0
%6 = call i32 @rgph_xxh64s_init(i32 4, i64 %1, i32* %5)
%7 = call i32 @rgph_xxh64s_fold(i32 4, i32* %5)
%8 = call i32 @rgph_xxh64s_fmix8(i32 %0, i32* %5)
%9 = call i32 @rgph_xxh64s_finalise(i32* %5)
%10 = load i32, i32* %5
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int usage(int argc, char **argv) {
  printf("usage: %s <number of pings>\n", argv[0]);
  return -1;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    (%rsi),%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"usage: %s <number of pings>\0A\00"
define i32 @usage(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %4
%6 = getelementptr inbounds i8*, i8** %5, i64 0
%7 = load i8*, i8** %6
%8 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %7)
ret i32 -1
}

LLVM IR (-O2):
@.str = [29 x i8] c"usage: %s <number of pings>\0A\00"
define i32 @usage(i32 %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
%4 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 -1
}
int __ctzdi2(unsigned long long i) {
  int b;
  if (i == 0)
    return 0;
  for (b = 0; !(i & 1); ++b)
    i = (unsigned long long)i >> 1;
  return b;
}


x86 assembly (clang, -O0):
<__ctzdi2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <__ctzdi2+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    1164 <__ctzdi2+0x64>
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1144 <__ctzdi2+0x44>
jmp    115e <__ctzdi2+0x5e>
mov    -0x10(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <__ctzdi2+0x26>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ctzdi2>:
xor    %eax,%eax
test   %rdi,%rdi
je     112f <__ctzdi2+0x2f>
mov    %edi,%ecx
and    $0x1,%ecx
test   %rcx,%rcx
jne    112f <__ctzdi2+0x2f>
xor    %eax,%eax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
shr    %rcx
add    $0x1,%eax
test   $0x2,%dil
mov    %rcx,%rdi
je     1120 <__ctzdi2+0x20>
ret

LLVM IR (-O0):
define i32 @__ctzdi2(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %22
8: ; preds = %1
store i32 0, i32* %4
br label %9
9: ; preds = %17, %8
%10 = load i64, i64* %3
%11 = and i64 %10, 1
%12 = icmp ne i64 %11, 0
%13 = xor i1 %12, true
br i1 %13, label %14, label %20
14: ; preds = %9
%15 = load i64, i64* %3
%16 = lshr i64 %15, 1
store i64 %16, i64* %3
br label %17
17: ; preds = %14
%18 = load i32, i32* %4
%19 = add nsw i32 %18, 1
store i32 %19, i32* %4
br label %9
20: ; preds = %9
%21 = load i32, i32* %4
store i32 %21, i32* %2
br label %22
22: ; preds = %20, %7
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @__ctzdi2(i64 %0) {
%2 = icmp ne i64 %0, 0
%3 = and i64 %0, 1
%4 = icmp eq i64 %3, 0
%5 = and i1 %2, %4
br i1 %5, label %6, label %13
6: ; preds = %1, %6
%7 = phi i32 [ %10, %6 ], [ 0, %1 ]
%8 = phi i64 [ %9, %6 ], [ %0, %1 ]
%9 = lshr i64 %8, 1
%10 = add nuw nsw i32 %7, 1
%11 = and i64 %8, 2
%12 = icmp eq i64 %11, 0
br i1 %12, label %6, label %13
13: ; preds = %6, %1
%14 = phi i32 [ 0, %1 ], [ %10, %6 ]
ret i32 %14
}
unsigned int lcg() {
  static unsigned int x = 0;
  x = 1664525L * x + 1013904223L;
  return x;
}


x86 assembly (clang, -O0):
<lcg>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
imul   $0x19660d,%rax,%rax
add    $0x3c6ef35f,%rax
mov    %eax,0x2f07(%rip)
mov    0x2f01(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcg>:
imul   $0x19660d,0x2f1a(%rip),%eax
add    $0x3c6ef35f,%eax
mov    %eax,0x2f0f(%rip)
ret

LLVM IR (-O0):
@lcg.x = internal global i32 0
define i32 @lcg() {
%1 = load i32, i32* @lcg.x
%2 = zext i32 %1 to i64
%3 = mul nsw i64 1664525, %2
%4 = add nsw i64 %3, 1013904223
%5 = trunc i64 %4 to i32
store i32 %5, i32* @lcg.x
%6 = load i32, i32* @lcg.x
ret i32 %6
}

LLVM IR (-O2):
@lcg.x = internal unnamed_addr global i32 0
define i32 @lcg() {
%1 = load i32, i32* @lcg.x
%2 = mul i32 %1, 1664525
%3 = add i32 %2, 1013904223
store i32 %3, i32* @lcg.x
ret i32 %3
}
struct TreeNode *mergeTrees(struct TreeNode *t1, struct TreeNode *t2) {}


x86 assembly (clang, -O0):
<mergeTrees>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergeTrees>:
ret

LLVM IR (-O0):
%struct.TreeNode = type opaque
define %struct.TreeNode* @mergeTrees(%struct.TreeNode* %0, %struct.TreeNode* %1) {
%3 = alloca %struct.TreeNode*
%4 = alloca %struct.TreeNode*
%5 = alloca %struct.TreeNode*
store %struct.TreeNode* %0, %struct.TreeNode** %4
store %struct.TreeNode* %1, %struct.TreeNode** %5
%6 = load %struct.TreeNode*, %struct.TreeNode** %3
ret %struct.TreeNode* %6
}

LLVM IR (-O2):
%struct.TreeNode = type opaque
define noalias %struct.TreeNode* @mergeTrees(%struct.TreeNode* nocapture readnone %0, %struct.TreeNode* nocapture readnone %1) {
ret %struct.TreeNode* undef
}
int ctoi(int c) {
  if (c >= 'a' && c <= 'f') {
    return (c - 'a') + 10;
  }
  if (c >= 'A' && c <= 'F') {
    return (c - 'A') + 10;
  }
  if (c >= '0' && c <= '9') {
    return c - '0';
  }
  return 0;
}


x86 assembly (clang, -O0):
<ctoi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x61,-0x8(%rbp)
jl     112c <ctoi+0x2c>
cmpl   $0x66,-0x8(%rbp)
jg     112c <ctoi+0x2c>
mov    -0x8(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <ctoi+0x7a>
cmpl   $0x41,-0x8(%rbp)
jl     1151 <ctoi+0x51>
cmpl   $0x46,-0x8(%rbp)
jg     1151 <ctoi+0x51>
mov    -0x8(%rbp),%eax
sub    $0x41,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <ctoi+0x7a>
cmpl   $0x30,-0x8(%rbp)
jl     1173 <ctoi+0x73>
cmpl   $0x39,-0x8(%rbp)
jg     1173 <ctoi+0x73>
mov    -0x8(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    117a <ctoi+0x7a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctoi>:
mov    %edi,%eax
lea    -0x61(%rax),%ecx
cmp    $0x5,%ecx
ja     110e <ctoi+0xe>
add    $0xffffffa9,%eax
ret
lea    -0x41(%rax),%ecx
cmp    $0x5,%ecx
ja     111a <ctoi+0x1a>
add    $0xffffffc9,%eax
ret
add    $0xffffffd0,%eax
xor    %ecx,%ecx
cmp    $0xa,%eax
cmovb  %eax,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ctoi(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 97
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 102
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 97
%12 = add nsw i32 %11, 10
store i32 %12, i32* %2
br label %33
13: ; preds = %6, %1
%14 = load i32, i32* %3
%15 = icmp sge i32 %14, 65
br i1 %15, label %16, label %23
16: ; preds = %13
%17 = load i32, i32* %3
%18 = icmp sle i32 %17, 70
br i1 %18, label %19, label %23
19: ; preds = %16
%20 = load i32, i32* %3
%21 = sub nsw i32 %20, 65
%22 = add nsw i32 %21, 10
store i32 %22, i32* %2
br label %33
23: ; preds = %16, %13
%24 = load i32, i32* %3
%25 = icmp sge i32 %24, 48
br i1 %25, label %26, label %32
26: ; preds = %23
%27 = load i32, i32* %3
%28 = icmp sle i32 %27, 57
br i1 %28, label %29, label %32
29: ; preds = %26
%30 = load i32, i32* %3
%31 = sub nsw i32 %30, 48
store i32 %31, i32* %2
br label %33
32: ; preds = %26, %23
store i32 0, i32* %2
br label %33
33: ; preds = %32, %29, %19, %9
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @ctoi(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 6
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = add nsw i32 %0, -87
br label %15
6: ; preds = %1
%7 = add i32 %0, -65
%8 = icmp ult i32 %7, 6
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = add nsw i32 %0, -55
br label %15
11: ; preds = %6
%12 = add i32 %0, -48
%13 = icmp ult i32 %12, 10
%14 = select i1 %13, i32 %12, i32 0
br label %15
15: ; preds = %11, %9, %4
%16 = phi i32 [ %5, %4 ], [ %10, %9 ], [ %14, %11 ]
ret i32 %16
}
void gtk_notebook_get_tab_pos() {}


x86 assembly (clang, -O0):
<gtk_notebook_get_tab_pos>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_notebook_get_tab_pos>:
ret

LLVM IR (-O0):
define void @gtk_notebook_get_tab_pos() {
ret void
}

LLVM IR (-O2):
define void @gtk_notebook_get_tab_pos() {
ret void
}
void write_bytes(unsigned long length, void *addr) {
  unsigned long i;
  for (i = 0; i < length; i++)
    *((unsigned char *)(addr + i)) = 0xff;
}


x86 assembly (clang, -O0):
<write_bytes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    113f <write_bytes+0x3f>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
movb   $0xff,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <write_bytes+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_bytes>:
test   %rdi,%rdi
je     112a <write_bytes+0x1a>
push   %rax
mov    %rdi,%rdx
mov    %rsi,%rdi
mov    $0xff,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @write_bytes(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i64
store i64 %0, i64* %3
store i8* %1, i8** %4
store i64 0, i64* %5
br label %6
6: ; preds = %14, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %3
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i64, i64* %5
%13 = getelementptr i8, i8* %11, i64 %12
store i8 -1, i8* %13
br label %14
14: ; preds = %10
%15 = load i64, i64* %5
%16 = add i64 %15, 1
store i64 %16, i64* %5
br label %6
17: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @write_bytes(i64 %0, i8* nocapture writeonly %1) {
%3 = icmp eq i64 %0, 0
br i1 %3, label %5, label %4
4: ; preds = %2
br label %5
5: ; preds = %4, %2
ret void
}
/* Variables and functions */
int isst_send_msr_command(int, int, int, unsigned long long *);
int isst_set_trl(int cpu, unsigned long long trl) {
  int ret;
  if (!trl)
    trl = 0xFFFFFFFFFFFFFFFFULL;
  ret = isst_send_msr_command(cpu, 0x1AD, 1, &trl);
  if (ret)
    return ret;
  return 0;
}


x86 assembly (clang, -O0):
<isst_set_trl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1132 <isst_set_trl+0x22>
movq   $0xffffffffffffffff,-0x10(%rbp)
ff
mov    -0x8(%rbp),%edi
mov    $0x1ad,%esi
mov    $0x1,%edx
lea    -0x10(%rbp),%rcx
call   1030 <isst_send_msr_command@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1160 <isst_set_trl+0x50>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1167 <isst_set_trl+0x57>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isst_set_trl>:
push   %rax
cmp    $0x1,%rsi
sbb    %rax,%rax
or     %rsi,%rax
mov    %rax,(%rsp)
mov    %rsp,%rcx
mov    $0x1ad,%esi
mov    $0x1,%edx
call   1030 <isst_send_msr_command@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @isst_set_trl(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %4
store i64 %1, i64* %5
%7 = load i64, i64* %5
%8 = icmp ne i64 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %2
store i64 -1, i64* %5
br label %10
10: ; preds = %9, %2
%11 = load i32, i32* %4
%12 = call i32 @isst_send_msr_command(i32 %11, i32 429, i32 1, i64* %5)
store i32 %12, i32* %6
%13 = load i32, i32* %6
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %10
%16 = load i32, i32* %6
store i32 %16, i32* %3
br label %18
17: ; preds = %10
store i32 0, i32* %3
br label %18
18: ; preds = %17, %15
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @isst_set_trl(i32 %0, i64 %1) {
%3 = alloca i64
%4 = icmp eq i64 %1, 0
%5 = select i1 %4, i64 -1, i64 %1
store i64 %5, i64* %3
%6 = call i32 @isst_send_msr_command(i32 %0, i32 429, i32 1, i64* %3)
ret i32 %6
}
/* Variables and functions */
int shim_enosys(int /*<<< orphan*/);
int shim_munlockall(void) { return shim_enosys(0); }


x86 assembly (clang, -O0):
<shim_munlockall>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <shim_enosys@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_munlockall>:
xor    %edi,%edi
jmp    1030 <shim_enosys@plt>

LLVM IR (-O0):
define i32 @shim_munlockall() {
%1 = call i32 @shim_enosys(i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @shim_munlockall() {
%1 = tail call i32 @shim_enosys(i32 0)
ret i32 %1
}
void XtWindowOfObject() {}


x86 assembly (clang, -O0):
<XtWindowOfObject>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtWindowOfObject>:
ret

LLVM IR (-O0):
define void @XtWindowOfObject() {
ret void
}

LLVM IR (-O2):
define void @XtWindowOfObject() {
ret void
}
/* Variables and functions */
size_t os_get_home_directory(char *, size_t);
size_t lovrFilesystemGetUserDirectory(char *buffer, size_t size) {
  return os_get_home_directory(buffer, size);
}


x86 assembly (clang, -O0):
<lovrFilesystemGetUserDirectory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <os_get_home_directory@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lovrFilesystemGetUserDirectory>:
jmp    1030 <os_get_home_directory@plt>

LLVM IR (-O0):
define i64 @lovrFilesystemGetUserDirectory(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i64 @os_get_home_directory(i8* %5, i64 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @lovrFilesystemGetUserDirectory(i8* %0, i64 %1) {
%3 = tail call i64 @os_get_home_directory(i8* %0, i64 %1)
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0xf3() {
  Assert_real((isbdigit(243) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              1220, ("isbdigit should be 0 for 0xf3"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0xf3>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf3,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4c4,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0xf3>:
push   %rax
mov    $0xf3,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x4c4,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xf3\00"
define void @t_isbdigit_0xf3() {
%1 = call i64 @isbdigit(i32 243)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1220, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xf3\00"
define void @t_isbdigit_0xf3() {
%1 = tail call i64 @isbdigit(i32 243)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 1220, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ *__ctype_b_loc();
int /*<<< orphan*/ __softboundmpx_metadata_store(char *, char *, char *,
                                                 char *);
void softboundmpx_init_ctype() {
  char *ptr;
  char *base_ptr;
  ptr = (void *)__ctype_b_loc();
  base_ptr = (void *)(*(__ctype_b_loc()));
  __softboundmpx_metadata_store(ptr, ((char *)base_ptr - 129),
                                ((char *)base_ptr + 256), base_ptr);
}


x86 assembly (clang, -O0):
<softboundmpx_init_ctype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <__ctype_b_loc@plt>
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <__ctype_b_loc@plt>
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
add    $0xffffffffffffff7f,%rsi
mov    -0x10(%rbp),%rdx
add    $0x100,%rdx
mov    -0x10(%rbp),%rcx
call   1030 <__softboundmpx_metadata_store@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundmpx_init_ctype>:
push   %rbx
xor    %eax,%eax
call   1040 <__ctype_b_loc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1040 <__ctype_b_loc@plt>
mov    (%rax),%rcx
lea    -0x81(%rcx),%rsi
lea    0x100(%rcx),%rdx
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <__softboundmpx_metadata_store@plt>

LLVM IR (-O0):
define void @softboundmpx_init_ctype() {
%1 = alloca i8*
%2 = alloca i8*
%3 = call i64* (...) @__ctype_b_loc()
%4 = bitcast i64* %3 to i8*
store i8* %4, i8** %1
%5 = call i64* (...) @__ctype_b_loc()
%6 = load i64, i64* %5
%7 = inttoptr i64 %6 to i8*
store i8* %7, i8** %2
%8 = load i8*, i8** %1
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 -129
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i64 256
%13 = load i8*, i8** %2
%14 = call i32 @__softboundmpx_metadata_store(i8* %8, i8* %10, i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
define void @softboundmpx_init_ctype() {
%1 = tail call i64* (...) @__ctype_b_loc()
%2 = bitcast i64* %1 to i8*
%3 = tail call i64* (...) @__ctype_b_loc()
%4 = load i64, i64* %3
%5 = inttoptr i64 %4 to i8*
%6 = getelementptr inbounds i8, i8* %5, i64 -129
%7 = getelementptr inbounds i8, i8* %5, i64 256
%8 = tail call i32 @__softboundmpx_metadata_store(i8* %2, i8* %6, i8* %7, i8* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ slag2d_(int *, int *, float *, int *, double *, int *,
                           int *);
int aa_cla_slag2d(int M, int N, float *SA, int LDSA, double *A, int LDA) {
  int info = 0;
  slag2d_(&M, &N, SA, &LDSA, A, &LDA, &info);
  return info;
}


x86 assembly (clang, -O0):
<aa_cla_slag2d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
movl   $0x0,-0x28(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%r8
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
lea    -0x14(%rbp),%rcx
lea    -0x24(%rbp),%r9
lea    -0x28(%rbp),%rax
mov    %rax,(%rsp)
call   1030 <slag2d_@plt>
mov    -0x28(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aa_cla_slag2d>:
sub    $0x28,%rsp
mov    %edi,0x24(%rsp)
mov    %esi,0x20(%rsp)
mov    %ecx,0x1c(%rsp)
mov    %r9d,0x18(%rsp)
movl   $0x0,0x14(%rsp)
lea    0x14(%rsp),%rax
mov    %rax,(%rsp)
lea    0x24(%rsp),%rdi
lea    0x20(%rsp),%rsi
lea    0x1c(%rsp),%rcx
lea    0x18(%rsp),%r9
call   1030 <slag2d_@plt>
mov    0x14(%rsp),%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
define i32 @aa_cla_slag2d(i32 %0, i32 %1, float* %2, i32 %3, double* %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca float*
%10 = alloca i32
%11 = alloca double*
%12 = alloca i32
%13 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store float* %2, float** %9
store i32 %3, i32* %10
store double* %4, double** %11
store i32 %5, i32* %12
store i32 0, i32* %13
%14 = load float*, float** %9
%15 = load double*, double** %11
%16 = call i32 @slag2d_(i32* %7, i32* %8, float* %14, i32* %10, double* %15, i32* %12, i32* %13)
%17 = load i32, i32* %13
ret i32 %17
}

LLVM IR (-O2):
define i32 @aa_cla_slag2d(i32 %0, i32 %1, float* %2, i32 %3, double* %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %3, i32* %9
store i32 %5, i32* %10
%12 = bitcast i32* %11 to i8*
store i32 0, i32* %11
%13 = call i32 @slag2d_(i32* %7, i32* %8, float* %2, i32* %9, double* %4, i32* %10, i32* %11)
%14 = load i32, i32* %11
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int creat(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
int xcreatx(const char *pathname, mode_t mode) {
  int status = creat(pathname, mode);
  if (status < 0) {
    perror("xcreatx");
  }
  return status;
}


x86 assembly (clang, -O0):
<xcreatx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <creat@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    1154 <xcreatx+0x34>
lea    0xeb1(%rip),%rdi
call   1030 <perror@plt>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcreatx>:
push   %rbx
call   1040 <creat@plt>
mov    %eax,%ebx
test   %eax,%eax
js     1130 <xcreatx+0x10>
mov    %ebx,%eax
pop    %rbx
ret
lea    0xec9(%rip),%rdi
call   1030 <perror@plt>
jmp    112c <xcreatx+0xc>

LLVM IR (-O0):
@.str = [8 x i8] c"xcreatx\00"
define i32 @xcreatx(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @creat(i8* %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @perror(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
@.str = [8 x i8] c"xcreatx\00"
define i32 @xcreatx(i8* %0, i32 %1) {
%3 = tail call i32 @creat(i8* %0, i32 %1)
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @perror(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i32 %3
}
/* Variables and functions */
void *malloc(size_t);
void *ndb_malloc(size_t i_size, char *i_remark) { return malloc(i_size); }


x86 assembly (clang, -O0):
<ndb_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ndb_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @ndb_malloc(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i64, i64* %3
%6 = call i8* @malloc(i64 %5)
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @ndb_malloc(i64 %0, i8* nocapture readnone %1) {
%3 = tail call i8* @malloc(i64 %0)
ret i8* %3
}
int simple_function(void) {
  static int counter = 0;
  counter++;
  return counter;
}


x86 assembly (clang, -O0):
<simple_function>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f1a(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f11(%rip)
mov    0x2f0b(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<simple_function>:
mov    0x2f1e(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f15(%rip)
ret

LLVM IR (-O0):
@simple_function.counter = internal global i32 0
define i32 @simple_function() {
%1 = load i32, i32* @simple_function.counter
%2 = add nsw i32 %1, 1
store i32 %2, i32* @simple_function.counter
%3 = load i32, i32* @simple_function.counter
ret i32 %3
}

LLVM IR (-O2):
@simple_function.counter = internal unnamed_addr global i32 0
define i32 @simple_function() {
%1 = load i32, i32* @simple_function.counter
%2 = add nsw i32 %1, 1
store i32 %2, i32* @simple_function.counter
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float const, float const, float, char const *,
                          double);
void svg_circle(const char *color, const float p1, const float p2,
                float radius) {
  printf("<circle x=\"%fpx\" y=\"%fpx\" radius=\"%fpx\" stroke=\"%s\" "
         "stroke-width=\"%.1fpx\"/>\n",
         p1, -p2, radius, color, 1.0);
}


x86 assembly (clang, -O0):
<svg_circle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
movss  %xmm2,-0x14(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
movss  -0x14(%rbp),%xmm2
mov    -0x8(%rbp),%rsi
lea    0xeb6(%rip),%rdi
movsd  0xea6(%rip),%xmm3
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<svg_circle>:
mov    %rdi,%rsi
xorps  0xee6(%rip),%xmm1
lea    0xef7(%rip),%rdi
movsd  0xee7(%rip),%xmm3
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [77 x i8] c"<circle x=\22%fpx\22 y=\22%fpx\22 radius=\22%fpx\22 stroke=\22%s\22 stroke-width=\22%.1fpx\22/>\0A\00"
define void @svg_circle(i8* %0, float %1, float %2, float %3) {
%5 = alloca i8*
%6 = alloca float
%7 = alloca float
%8 = alloca float
store i8* %0, i8** %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %6
%10 = load float, float* %7
%11 = fneg float %10
%12 = load float, float* %8
%13 = load i8*, i8** %5
%14 = call i32 @printf(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0), float %9, float %11, float %12, i8* %13, double 1.000000e+00)
ret void
}

LLVM IR (-O2):
@.str = [77 x i8] c"<circle x=\22%fpx\22 y=\22%fpx\22 radius=\22%fpx\22 stroke=\22%s\22 stroke-width=\22%.1fpx\22/>\0A\00"
define void @svg_circle(i8* %0, float %1, float %2, float %3) {
%5 = fneg float %2
%6 = tail call i32 @printf(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0), float %1, float %5, float %3, i8* %0, double 1.000000e+00)
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int diff_width(uint64_t diffFlags) {
  int w = (diffFlags & ((uint64_t)0x00ff0000)) / (((uint64_t)0x0000ffff) + 1);
  if (w == 0)
    w = 80;
  return w;
}


x86 assembly (clang, -O0):
<diff_width>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff0000,%eax
mov    $0x10000,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    112b <diff_width+0x2b>
movl   $0x50,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<diff_width>:
shr    $0x10,%edi
movzbl %dil,%ecx
test   %ecx,%ecx
mov    $0x50,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @diff_width(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 16711680
%6 = sdiv i32 %5, 65536
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 80, i32* %3
br label %10
10: ; preds = %9, %1
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @diff_width(i32 %0) {
%2 = lshr i32 %0, 16
%3 = and i32 %2, 255
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 80, i32 %3
ret i32 %5
}