xunge/DecIR huggingface dataset:
char num_to_ascii(char data) {
  char return_data;
  switch (data) {
  case 1:
    return_data = '1';
    break;
  case 2:
    return_data = '2';
    break;
  case 3:
    return_data = '3';
    break;
  case 4:
    return_data = '4';
    break;
  case 5:
    return_data = '5';
    break;
  case 6:
    return_data = '6';
    break;
  case 7:
    return_data = '7';
    break;
  case 8:
    return_data = '8';
    break;
  case 9:
    return_data = '9';
    break;
  default:
    return_data = '0';
    break;
  }
  return return_data;
}


x86 assembly (clang, -O0):
<num_to_ascii>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x8,%eax
ja     1185 <num_to_ascii+0x85>
mov    -0x10(%rbp),%rax
lea    0xed5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movb   $0x31,-0x2(%rbp)
jmp    1189 <num_to_ascii+0x89>
movb   $0x32,-0x2(%rbp)
jmp    1189 <num_to_ascii+0x89>
movb   $0x33,-0x2(%rbp)
jmp    1189 <num_to_ascii+0x89>
movb   $0x34,-0x2(%rbp)
jmp    1189 <num_to_ascii+0x89>
movb   $0x35,-0x2(%rbp)
jmp    1189 <num_to_ascii+0x89>
movb   $0x36,-0x2(%rbp)
jmp    1189 <num_to_ascii+0x89>
movb   $0x37,-0x2(%rbp)
jmp    1189 <num_to_ascii+0x89>
movb   $0x38,-0x2(%rbp)
jmp    1189 <num_to_ascii+0x89>
movb   $0x39,-0x2(%rbp)
jmp    1189 <num_to_ascii+0x89>
movb   $0x30,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_to_ascii>:
add    $0xffffffff,%edi
lea    0x31(%rdi),%eax
cmp    $0x9,%edi
movzbl %al,%ecx
mov    $0x30,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @num_to_ascii(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
switch i32 %5, label %15 [
i32 1, label %6
i32 2, label %7
i32 3, label %8
i32 4, label %9
i32 5, label %10
i32 6, label %11
i32 7, label %12
i32 8, label %13
i32 9, label %14
]
6: ; preds = %1
store i8 49, i8* %3
br label %16
7: ; preds = %1
store i8 50, i8* %3
br label %16
8: ; preds = %1
store i8 51, i8* %3
br label %16
9: ; preds = %1
store i8 52, i8* %3
br label %16
10: ; preds = %1
store i8 53, i8* %3
br label %16
11: ; preds = %1
store i8 54, i8* %3
br label %16
12: ; preds = %1
store i8 55, i8* %3
br label %16
13: ; preds = %1
store i8 56, i8* %3
br label %16
14: ; preds = %1
store i8 57, i8* %3
br label %16
15: ; preds = %1
store i8 48, i8* %3
br label %16
16: ; preds = %15, %14, %13, %12, %11, %10, %9, %8, %7, %6
%17 = load i8, i8* %3
ret i8 %17
}

LLVM IR (-O2):
define signext i8 @num_to_ascii(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -1
%4 = icmp ult i32 %3, 9
%5 = trunc i32 %3 to i8
%6 = add i8 %5, 49
%7 = select i1 %4, i8 %6, i8 48
ret i8 %7
}
/* Variables and functions */
int rand();
double uint_to_double(unsigned int);
double MAP_CONTROL(double x_n, int iteration) {
  unsigned int next = 2 * rand();
  if (rand() % 2 == 0)
    next++;
  return uint_to_double(next);
}


x86 assembly (clang, -O0):
<MAP_CONTROL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
mov    $0x0,%al
call   1040 <rand@plt>
shl    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1040 <rand@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    115e <MAP_CONTROL+0x3e>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
call   1030 <uint_to_double@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MAP_CONTROL>:
push   %rbx
xor    %eax,%eax
call   1040 <rand@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <rand@plt>
and    $0x1,%eax
lea    (%rax,%rbx,2),%edi
xor    $0x1,%edi
pop    %rbx
jmp    1030 <uint_to_double@plt>

LLVM IR (-O0):
define double @MAP_CONTROL(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%6 = call i32 (...) @rand()
%7 = mul nsw i32 2, %6
store i32 %7, i32* %5
%8 = call i32 (...) @rand()
%9 = srem i32 %8, 2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i32, i32* %5
%13 = add i32 %12, 1
store i32 %13, i32* %5
br label %14
14: ; preds = %11, %2
%15 = load i32, i32* %5
%16 = call double @uint_to_double(i32 %15)
ret double %16
}

LLVM IR (-O2):
define double @MAP_CONTROL(double %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = shl nsw i32 %3, 1
%5 = tail call i32 (...) @rand()
%6 = and i32 %5, 1
%7 = or i32 %6, %4
%8 = xor i32 %7, 1
%9 = tail call double @uint_to_double(i32 %8)
ret double %9
}
/* Type definitions */
struct slice {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ wfree(struct slice *);
void sliceFree(struct slice *b) { wfree(b); }


x86 assembly (clang, -O0):
<sliceFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sliceFree>:
jmp    1030 <wfree@plt>

LLVM IR (-O0):
%struct.slice = type { i32 }
define void @sliceFree(%struct.slice* %0) {
%2 = alloca %struct.slice*
store %struct.slice* %0, %struct.slice** %2
%3 = load %struct.slice*, %struct.slice** %2
%4 = call i32 @wfree(%struct.slice* %3)
ret void
}

LLVM IR (-O2):
%struct.slice = type { i32 }
define void @sliceFree(%struct.slice* %0) {
%2 = tail call i32 @wfree(%struct.slice* %0)
ret void
}
/* Variables and functions */
size_t count_chars(char const *, size_t);
unsigned string_lines(const char *str, size_t strlen, unsigned width) {
  size_t chars = count_chars(str, strlen);
  return chars == 0 ? 0 : (chars - 1) / width + 1;
}


x86 assembly (clang, -O0):
<string_lines>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <count_chars@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    114a <string_lines+0x3a>
xor    %eax,%eax
mov    %rax,-0x28(%rbp)
jmp    1162 <string_lines+0x52>
mov    -0x20(%rbp),%rax
sub    $0x1,%rax
mov    -0x14(%rbp),%ecx
xor    %edx,%edx
div    %rcx
add    $0x1,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_lines>:
push   %rbx
mov    %edx,%ebx
call   1030 <count_chars@plt>
test   %rax,%rax
je     1133 <string_lines+0x23>
add    $0xffffffffffffffff,%rax
mov    %ebx,%ecx
mov    %rax,%rdx
shr    $0x20,%rdx
je     1137 <string_lines+0x27>
xor    %edx,%edx
div    %rcx
jmp    113b <string_lines+0x2b>
xor    %eax,%eax
pop    %rbx
ret
xor    %edx,%edx
div    %ecx
add    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @string_lines(i8* %0, i64 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32
%7 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = load i64, i64* %5
%10 = call i64 @count_chars(i8* %8, i64 %9)
store i64 %10, i64* %7
%11 = load i64, i64* %7
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %3
br label %21
14: ; preds = %3
%15 = load i64, i64* %7
%16 = sub i64 %15, 1
%17 = load i32, i32* %6
%18 = zext i32 %17 to i64
%19 = udiv i64 %16, %18
%20 = add i64 %19, 1
br label %21
21: ; preds = %14, %13
%22 = phi i64 [ 0, %13 ], [ %20, %14 ]
%23 = trunc i64 %22 to i32
ret i32 %23
}

LLVM IR (-O2):
define i32 @string_lines(i8* %0, i64 %1, i32 %2) {
%4 = tail call i64 @count_chars(i8* %0, i64 %1)
%5 = icmp eq i64 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %3
%7 = add i64 %4, -1
%8 = zext i32 %2 to i64
%9 = udiv i64 %7, %8
%10 = trunc i64 %9 to i32
%11 = add i32 %10, 1
br label %12
12: ; preds = %3, %6
%13 = phi i32 [ %11, %6 ], [ 0, %3 ]
ret i32 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int8_t stdlib_ndarray_set_ptr_uint16(uint8_t *idx, const uint16_t v) {
  *(uint16_t *)idx = v;
  return 0;
}


x86 assembly (clang, -O0):
<stdlib_ndarray_set_ptr_uint16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdlib_ndarray_set_ptr_uint16>:
mov    %esi,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @stdlib_ndarray_set_ptr_uint16(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32*, i32** %3
store i32 %5, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @stdlib_ndarray_set_ptr_uint16(i32* nocapture writeonly %0, i32 %1) {
store i32 %1, i32* %0
ret i32 0
}
/* Variables and functions */
scalar_t__ ilogb(double);
int /*<<< orphan*/ link_failure_ilogb();
void test_ilogb(double d) {
  if (ilogb(d) != ilogb(d))
    link_failure_ilogb();
}


x86 assembly (clang, -O0):
<test_ilogb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <ilogb@plt>
mov    %rax,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <ilogb@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_ilogb+0x3c>
mov    $0x0,%al
call   1030 <link_failure_ilogb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_ilogb>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
call   1040 <ilogb@plt>
mov    %rax,%rbx
movsd  0x8(%rsp),%xmm0
call   1040 <ilogb@plt>
cmp    %rax,%rbx
jne    1149 <test_ilogb+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1030 <link_failure_ilogb@plt>

LLVM IR (-O0):
define void @test_ilogb(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @ilogb(double %3)
%5 = load double, double* %2
%6 = call i64 @ilogb(double %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_ilogb()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_ilogb(double %0) {
%2 = tail call i64 @ilogb(double %0)
%3 = tail call i64 @ilogb(double %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_ilogb()
br label %7
7: ; preds = %5, %1
ret void
}
/* Variables and functions */
int mf_sensors_is_enabled();
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("[mf_sensors_units] starting...\n");
  int ret = mf_sensors_is_enabled();
  if (ret != 1) {
    printf("[mf_sensors_units] units init failed.\n");
    return -1;
  }
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <mf_sensors_is_enabled@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     1167 <main+0x47>
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    116e <main+0x4e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <mf_sensors_is_enabled@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cmp    $0x1,%ecx
je     1151 <main+0x31>
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [32 x i8] c"[mf_sensors_units] starting...\0A\00"
@.str.1 = [39 x i8] c"[mf_sensors_units] units init failed.\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @mf_sensors_is_enabled()
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str.1, i64 0, i64 0))
store i32 -1, i32* %1
br label %10
9: ; preds = %0
store i32 1, i32* %1
br label %10
10: ; preds = %9, %7
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@str = [31 x i8] c"[mf_sensors_units] starting...\00"
@str.2 = [38 x i8] c"[mf_sensors_units] units init failed.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (...) @mf_sensors_is_enabled()
%3 = icmp eq i32 %2, 1
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str.2, i64 0, i64 0))
br label %6
6: ; preds = %0, %4
%7 = phi i32 [ -1, %4 ], [ 1, %0 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ jet_sleep(int);
int write_block(int, int, int, int, int, int);
int dynamixelMove(int servo, int pos, int speed) {
  int pos0 = pos & 255;
  int pos1 = pos >> 8;
  int speed0 = speed & 255;
  int speed1 = speed >> 8;
  int ret = write_block(102, servo, pos0, pos1, speed0, speed1);
  jet_sleep(50);
  return ret;
}


x86 assembly (clang, -O0):
<dynamixelMove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
mov    -0x1c(%rbp),%r9d
mov    $0x66,%edi
call   1030 <write_block@plt>
mov    %eax,-0x20(%rbp)
mov    $0x32,%edi
call   1040 <jet_sleep@plt>
mov    -0x20(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dynamixelMove>:
push   %rbx
mov    %edx,%r9d
mov    %esi,%ecx
mov    %edi,%esi
movzbl %cl,%edx
sar    $0x8,%ecx
movzbl %r9b,%r8d
sar    $0x8,%r9d
mov    $0x66,%edi
call   1030 <write_block@plt>
mov    %eax,%ebx
mov    $0x32,%edi
call   1040 <jet_sleep@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @dynamixelMove(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%12 = load i32, i32* %5
%13 = and i32 %12, 255
store i32 %13, i32* %7
%14 = load i32, i32* %5
%15 = ashr i32 %14, 8
store i32 %15, i32* %8
%16 = load i32, i32* %6
%17 = and i32 %16, 255
store i32 %17, i32* %9
%18 = load i32, i32* %6
%19 = ashr i32 %18, 8
store i32 %19, i32* %10
%20 = load i32, i32* %4
%21 = load i32, i32* %7
%22 = load i32, i32* %8
%23 = load i32, i32* %9
%24 = load i32, i32* %10
%25 = call i32 @write_block(i32 102, i32 %20, i32 %21, i32 %22, i32 %23, i32 %24)
store i32 %25, i32* %11
%26 = call i32 @jet_sleep(i32 50)
%27 = load i32, i32* %11
ret i32 %27
}

LLVM IR (-O2):
define i32 @dynamixelMove(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %1, 255
%5 = ashr i32 %1, 8
%6 = and i32 %2, 255
%7 = ashr i32 %2, 8
%8 = tail call i32 @write_block(i32 102, i32 %0, i32 %4, i32 %5, i32 %6, i32 %7)
%9 = tail call i32 @jet_sleep(i32 50)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR7D_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR7D_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR7D_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR7D_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR7D_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
void *dlsym(void) { return NULL; }


x86 assembly (clang, -O0):
<dlsym>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlsym>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @dlsym() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @dlsym() {
ret i8* null
}
/* Variables and functions */
scalar_t__ bissexto(int);
int diasDoMes(int mes, int ano) {
  int ndias[] = {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
  if (bissexto(ano))
    ndias[1]++;
  return ndias[mes - 1];
}


x86 assembly (clang, -O0):
<diasDoMes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xec7(%rip),%rsi
mov    $0x30,%edx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%edi
call   1040 <bissexto@plt>
cmp    $0x0,%rax
je     115e <diasDoMes+0x3e>
mov    -0x3c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x3c(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
cltq
mov    -0x40(%rbp,%rax,4),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diasDoMes>:
push   %rbx
sub    $0x30,%rsp
mov    %edi,%ebx
movaps 0xf02(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xee6(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xeca(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %esi,%edi
call   1030 <bissexto@plt>
test   %rax,%rax
je     114e <diasDoMes+0x3e>
movl   $0x1d,0x4(%rsp)
movslq %ebx,%rax
mov    -0x4(%rsp,%rax,4),%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.diasDoMes.ndias = [12 x i32] [i32 31, i32 28, i32 31, i32 30, i32 31, i32 30, i32 31, i32 31, i32 30, i32 31, i32 30, i32 31]
define i32 @diasDoMes(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca [12 x i32]
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = bitcast [12 x i32]* %5 to i8*
%7 = load i32, i32* %4
%8 = call i64 @bissexto(i32 %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = getelementptr inbounds [12 x i32], [12 x i32]* %5, i64 0, i64 1
%12 = load i32, i32* %11
%13 = add nsw i32 %12, 1
store i32 %13, i32* %11
br label %14
14: ; preds = %10, %2
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 1
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds [12 x i32], [12 x i32]* %5, i64 0, i64 %17
%19 = load i32, i32* %18
ret i32 %19
}

LLVM IR (-O2):
@__const.diasDoMes.ndias = [12 x i32] [i32 31, i32 28, i32 31, i32 30, i32 31, i32 30, i32 31, i32 31, i32 30, i32 31, i32 30, i32 31]
define i32 @diasDoMes(i32 %0, i32 %1) {
%3 = alloca [12 x i32]
%4 = bitcast [12 x i32]* %3 to i8*
%5 = tail call i64 @bissexto(i32 %1)
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = getelementptr inbounds [12 x i32], [12 x i32]* %3, i64 0, i64 1
store i32 29, i32* %8
br label %9
9: ; preds = %7, %2
%10 = add nsw i32 %0, -1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [12 x i32], [12 x i32]* %3, i64 0, i64 %11
%13 = load i32, i32* %12
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void printArray(int *arr, int arrSize) {
  for (int i = 0; i < arrSize; i++)
    printf("%d", arr[i]);
  printf("\n");
}


x86 assembly (clang, -O0):
<printArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1159 <printArray+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <printArray+0x16>
lea    0xea3(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printArray>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <printArray+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <printArray+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @printArray(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @printArray(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8, %2
%7 = tail call i32 @putchar(i32 10)
ret void
8: ; preds = %4, %8
%9 = phi i64 [ 0, %4 ], [ %13, %8 ]
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %11)
%13 = add nuw nsw i64 %9, 1
%14 = icmp eq i64 %13, %5
br i1 %14, label %6, label %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int ws_send_data(int, int, int /*<<< orphan*/, int /*<<< orphan*/,
                 int /*<<< orphan*/, int, int /*<<< orphan*/,
                 int /*<<< orphan*/, int /*<<< orphan*/ *, unsigned char *);
int ws_echo_write_callback(int sockfd, unsigned char *payload_data,
                           uint64_t payload_len) {
  int n;
  n = ws_send_data(sockfd, 1, 0, 0, 0, 0x01, 0, payload_len, NULL,
                   payload_data);
  if (n < 0) {
    return -1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<ws_echo_write_callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x14(%rbp),%r10d
mov    -0x10(%rbp),%rax
mov    $0x1,%r9d
xor    %r8d,%r8d
xor    %ecx,%ecx
mov    %r9d,%esi
mov    %r8d,%edx
mov    %r8d,%ecx
movl   $0x0,(%rsp)
mov    %r10d,0x8(%rsp)
movq   $0x0,0x10(%rsp)
mov    %rax,0x18(%rsp)
call   1030 <ws_send_data@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
jge    1179 <ws_echo_write_callback+0x69>
movl   $0xffffffff,-0x4(%rbp)
jmp    1180 <ws_echo_write_callback+0x70>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ws_echo_write_callback>:
push   %rax
mov    %edx,%r10d
mov    %rsi,%rax
mov    $0x1,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
mov    $0x1,%r9d
push   %rax
push   $0x0
push   %r10
push   $0x0
call   1030 <ws_send_data@plt>
add    $0x20,%rsp
sar    $0x1f,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ws_echo_write_callback(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%9 = load i32, i32* %5
%10 = load i32, i32* %7
%11 = load i8*, i8** %6
%12 = call i32 @ws_send_data(i32 %9, i32 1, i32 0, i32 0, i32 0, i32 1, i32 0, i32 %10, i32* null, i8* %11)
store i32 %12, i32* %8
%13 = load i32, i32* %8
%14 = icmp slt i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %3
store i32 -1, i32* %4
br label %17
16: ; preds = %3
store i32 0, i32* %4
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @ws_echo_write_callback(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @ws_send_data(i32 %0, i32 1, i32 0, i32 0, i32 0, i32 1, i32 0, i32 %2, i32* null, i8* %1)
%5 = ashr i32 %4, 31
ret i32 %5
}
/* Variables and functions */
char tolower(char);
void _string_lower_element(char *ch) { *ch = tolower(*ch); }


x86 assembly (clang, -O0):
<_string_lower_element>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <tolower@plt>
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_string_lower_element>:
push   %rbx
mov    %rdi,%rbx
movsbl (%rdi),%edi
call   1030 <tolower@plt>
mov    %al,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @_string_lower_element(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = call signext i8 @tolower(i8 signext %4)
%6 = load i8*, i8** %2
store i8 %5, i8* %6
ret void
}

LLVM IR (-O2):
define void @_string_lower_element(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = tail call signext i8 @tolower(i8 signext %2)
store i8 %3, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ IF_fct_2(char);
void IF_moins(void) { IF_fct_2('-'); }


x86 assembly (clang, -O0):
<IF_moins>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2d,%edi
call   1030 <IF_fct_2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IF_moins>:
mov    $0x2d,%edi
jmp    1030 <IF_fct_2@plt>

LLVM IR (-O0):
define void @IF_moins() {
%1 = call i32 @IF_fct_2(i8 signext 45)
ret void
}

LLVM IR (-O2):
define void @IF_moins() {
%1 = tail call i32 @IF_fct_2(i8 signext 45)
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int div_u32_by_44488(scalar_t__);
uint32_t div_u32_mod_44488(uint32_t val) {
  return val - (div_u32_by_44488(val) * 44488);
}


x86 assembly (clang, -O0):
<div_u32_mod_44488>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <div_u32_by_44488@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
imul   $0xadc8,%ecx,%ecx
movslq %ecx,%rcx
sub    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_u32_mod_44488>:
push   %rbx
mov    %rdi,%rbx
call   1030 <div_u32_by_44488@plt>
imul   $0xadc8,%eax,%eax
cltq
sub    %rax,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @div_u32_mod_44488(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* %2
%5 = call i32 @div_u32_by_44488(i64 %4)
%6 = mul nsw i32 %5, 44488
%7 = sext i32 %6 to i64
%8 = sub nsw i64 %3, %7
ret i64 %8
}

LLVM IR (-O2):
define i64 @div_u32_mod_44488(i64 %0) {
%2 = tail call i32 @div_u32_by_44488(i64 %0)
%3 = mul nsw i32 %2, 44488
%4 = sext i32 %3 to i64
%5 = sub nsw i64 %0, %4
ret i64 %5
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
double tv_seconds(struct timeval const *);
double tv_sum(const struct timeval *tv1, const struct timeval *tv2) {
  return tv_seconds(tv1) + tv_seconds(tv2);
}


x86 assembly (clang, -O0):
<tv_sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <tv_seconds@plt>
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <tv_seconds@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tv_sum>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
call   1030 <tv_seconds@plt>
movsd  %xmm0,0x8(%rsp)
mov    %rbx,%rdi
call   1030 <tv_seconds@plt>
addsd  0x8(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
define double @tv_sum(%struct.timeval* %0, %struct.timeval* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timeval* %1, %struct.timeval** %4
%5 = load %struct.timeval*, %struct.timeval** %3
%6 = call double @tv_seconds(%struct.timeval* %5)
%7 = load %struct.timeval*, %struct.timeval** %4
%8 = call double @tv_seconds(%struct.timeval* %7)
%9 = fadd double %6, %8
ret double %9
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define double @tv_sum(%struct.timeval* %0, %struct.timeval* %1) {
%3 = tail call double @tv_seconds(%struct.timeval* %0)
%4 = tail call double @tv_seconds(%struct.timeval* %1)
%5 = fadd double %3, %4
ret double %5
}
int sd_notify(int unset_environment, const char *state) { return 0; }


x86 assembly (clang, -O0):
<sd_notify>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_notify>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sd_notify(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @sd_notify(i32 %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void JLI_MemFree(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<JLI_MemFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<JLI_MemFree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @JLI_MemFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @JLI_MemFree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn("/scratch/repos/new/home/jordi_armengol_estape/"
                        "c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/"
                        "cyclone/refs/heads/master/bin/genfiles/tcdecl.c",
                        284));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11c,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11c,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [147 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/tcdecl.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([147 x i8], [147 x i8]* @.str, i64 0, i64 0), i32 284)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [147 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/tcdecl.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([147 x i8], [147 x i8]* @.str, i64 0, i64 0), i32 284)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
/* Variables and functions */
int add(int, int);
int main() { return add(3, 4); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x3,%edi
mov    $0x4,%esi
call   1030 <add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x3,%edi
mov    $0x4,%esi
jmp    1030 <add@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @add(i32 3, i32 4)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @add(i32 3, i32 4)
ret i32 %1
}
int islowchac(int ch) { return (ch >= 'a') && (ch <= 'z'); }


x86 assembly (clang, -O0):
<islowchac>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x61,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <islowchac+0x20>
cmpl   $0x7a,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<islowchac>:
add    $0xffffff9f,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @islowchac(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 97
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 122
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @islowchac(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
int getZero() {
  int x;
  int re;
  x = 0;
  re = 1;
  while (x <= 10)
    x = re + x;
  return (x - 11);
}


x86 assembly (clang, -O0):
<getZero>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0xa,-0x4(%rbp)
jg     112a <getZero+0x2a>
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1112 <getZero+0x12>
mov    -0x4(%rbp),%eax
sub    $0xb,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getZero>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @getZero() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %1
%5 = icmp sle i32 %4, 10
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %1
%9 = add nsw i32 %7, %8
store i32 %9, i32* %1
br label %3
10: ; preds = %3
%11 = load i32, i32* %1
%12 = sub nsw i32 %11, 11
ret i32 %12
}

LLVM IR (-O2):
define i32 @getZero() {
ret i32 0
}
void outportw(unsigned short _port, unsigned short _data) {
  asm volatile("outw %1, %0" ::"dN"(_port), "a"(_data));
}


x86 assembly (clang, -O0):
<outportw>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x4(%rbp),%ax
out    %ax,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outportw>:
mov    %esi,%eax
mov    %edi,%edx
out    %ax,(%dx)
ret

LLVM IR (-O0):
define void @outportw(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = load i16, i16* %4
ret void
}

LLVM IR (-O2):
define void @outportw(i16 zeroext %0, i16 zeroext %1) {
tail call void asm sideeffect "outw $1, $0", "{dx}N,{ax},~{dirflag},~{fpsr},~{flags}"(i16 %0, i16 %1)
ret void
}
void XtPopupSpringLoaded() {}


x86 assembly (clang, -O0):
<XtPopupSpringLoaded>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtPopupSpringLoaded>:
ret

LLVM IR (-O0):
define void @XtPopupSpringLoaded() {
ret void
}

LLVM IR (-O2):
define void @XtPopupSpringLoaded() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void hw_set_voltage_dac(uint16_t v_dac) { (void)v_dac; }


x86 assembly (clang, -O0):
<hw_set_voltage_dac>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hw_set_voltage_dac>:
ret

LLVM IR (-O0):
define void @hw_set_voltage_dac(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @hw_set_voltage_dac(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ sleep(int);
int syscall(int);
int main() {
  int pid = syscall(20);
  printf("pid = %d ; sleep a while before exit\n", pid);
  sleep(30);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x14,%edi
call   1040 <syscall@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1e,%edi
call   1050 <sleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x14,%edi
call   1040 <syscall@plt>
lea    0xebe(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    $0x1e,%edi
call   1050 <sleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [38 x i8] c"pid = %d ; sleep a while before exit\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @syscall(i32 20)
store i32 %3, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 @sleep(i32 30)
ret i32 0
}

LLVM IR (-O2):
@.str = [38 x i8] c"pid = %d ; sleep a while before exit\0A\00"
define i32 @main() {
%1 = tail call i32 @syscall(i32 20)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @sleep(i32 30)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ crc_common(int /*<<< orphan*/ const *, int /*<<< orphan*/,
                              int, int);
uint32_t mmcsd_spi_crc16(const void *buffer, uint32_t cnt) {
  return crc_common((const uint8_t *)buffer, cnt, 0x11021, 16);
}


x86 assembly (clang, -O0):
<mmcsd_spi_crc16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x11021,%edx
mov    $0x10,%ecx
call   1030 <crc_common@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmcsd_spi_crc16>:
mov    $0x11021,%edx
mov    $0x10,%ecx
jmp    1030 <crc_common@plt>

LLVM IR (-O0):
define i32 @mmcsd_spi_crc16(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %4
%8 = call i32 @crc_common(i32* %6, i32 %7, i32 69665, i32 16)
ret i32 %8
}

LLVM IR (-O2):
define i32 @mmcsd_spi_crc16(i8* %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = tail call i32 @crc_common(i32* %3, i32 %1, i32 69665, i32 16)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void usage(char *prog) {
  printf("usage: %s in.grib out.grib\n", prog);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"usage: %s in.grib out.grib\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [28 x i8] c"usage: %s in.grib out.grib\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
int next_power_of_two(int i) {
  int r = 1;
  while (r < i)
    r *= 2;
  return r;
}


x86 assembly (clang, -O0):
<next_power_of_two>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1128 <next_power_of_two+0x28>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <next_power_of_two+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_power_of_two>:
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %ecx,%eax
lea    (%rax,%rax,1),%ecx
cmp    %edi,%eax
jl     1110 <next_power_of_two+0x10>
ret

LLVM IR (-O0):
define i32 @next_power_of_two(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, 2
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @next_power_of_two(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 1, %1 ], [ %5, %2 ]
%4 = icmp slt i32 %3, %0
%5 = shl nsw i32 %3, 1
br i1 %4, label %2, label %6
6: ; preds = %2
ret i32 %3
}
__attribute__((noipa)) long double wfaxb(long double x, long double y,
                                         long double z) {
  return x + y + z;
}


x86 assembly (clang, -O0):
<wfaxb>:
push   %rbp
mov    %rsp,%rbp
fldt   0x30(%rbp)
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fstpt  -0x30(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
faddp  %st,%st(1)
fldt   -0x30(%rbp)
faddp  %st,%st(1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wfaxb>:
fldt   0x28(%rsp)
fldt   0x18(%rsp)
fldt   0x8(%rsp)
faddp  %st,%st(1)
faddp  %st,%st(1)
ret

LLVM IR (-O0):
define x86_fp80 @wfaxb(x86_fp80 %0, x86_fp80 %1, x86_fp80 %2) {
%4 = alloca x86_fp80
%5 = alloca x86_fp80
%6 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %4
store x86_fp80 %1, x86_fp80* %5
store x86_fp80 %2, x86_fp80* %6
%7 = load x86_fp80, x86_fp80* %4
%8 = load x86_fp80, x86_fp80* %5
%9 = fadd x86_fp80 %7, %8
%10 = load x86_fp80, x86_fp80* %6
%11 = fadd x86_fp80 %9, %10
ret x86_fp80 %11
}

LLVM IR (-O2):
define x86_fp80 @wfaxb(x86_fp80 %0, x86_fp80 %1, x86_fp80 %2) {
%4 = fadd x86_fp80 %0, %1
%5 = fadd x86_fp80 %4, %2
ret x86_fp80 %5
}
/* Type definitions */
struct iio_channel_info {
  int dummy;
};

/* Variables and functions */
int enable_se(char const *, struct iio_channel_info **, int *, char *, int);
int enable_anglvel_se(const char *device_dir,
                      struct iio_channel_info **ci_array, int *counter,
                      int en) {
  return enable_se(device_dir, ci_array, counter, "anglvel", en);
}


x86 assembly (clang, -O0):
<enable_anglvel_se>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%r8d
lea    0xec2(%rip),%rcx
call   1030 <enable_se@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_anglvel_se>:
mov    %ecx,%r8d
lea    0xee6(%rip),%rcx
jmp    1030 <enable_se@plt>

LLVM IR (-O0):
%struct.iio_channel_info = type { i32 }
@.str = [8 x i8] c"anglvel\00"
define i32 @enable_anglvel_se(i8* %0, %struct.iio_channel_info** %1, i32* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca %struct.iio_channel_info**
%7 = alloca i32*
%8 = alloca i32
store i8* %0, i8** %5
store %struct.iio_channel_info** %1, %struct.iio_channel_info*** %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load %struct.iio_channel_info**, %struct.iio_channel_info*** %6
%11 = load i32*, i32** %7
%12 = load i32, i32* %8
%13 = call i32 @enable_se(i8* %9, %struct.iio_channel_info** %10, i32* %11, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.iio_channel_info = type { i32 }
@.str = [8 x i8] c"anglvel\00"
define i32 @enable_anglvel_se(i8* %0, %struct.iio_channel_info** %1, i32* %2, i32 %3) {
%5 = tail call i32 @enable_se(i8* %0, %struct.iio_channel_info** %1, i32* %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 %5
}
/* Variables and functions */
scalar_t__ RAND_MAX;
unsigned int random();
double drandom(void) {
  unsigned int x;
  x = random();
  return ((double)x) / ((double)RAND_MAX + 1.0);
}


x86 assembly (clang, -O0):
<drandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
call   1030 <random@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cvtsi2sd %rax,%xmm0
mov    0x2eb7(%rip),%rax
cvtsi2sdq (%rax),%xmm1
movsd  0xec2(%rip),%xmm2
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drandom>:
push   %rax
xor    %eax,%eax
call   1030 <random@plt>
mov    %eax,%eax
cvtsi2sd %rax,%xmm0
mov    0x2ec2(%rip),%rax
cvtsi2sdq (%rax),%xmm1
addsd  0xecd(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define double @drandom() {
%1 = alloca i32
%2 = call i32 (...) @random()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = uitofp i32 %3 to double
%5 = load i64, i64* @RAND_MAX
%6 = sitofp i64 %5 to double
%7 = fadd double %6, 1.000000e+00
%8 = fdiv double %4, %7
ret double %8
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define double @drandom() {
%1 = tail call i32 (...) @random()
%2 = uitofp i32 %1 to double
%3 = load i64, i64* @RAND_MAX
%4 = sitofp i64 %3 to double
%5 = fadd double %4, 1.000000e+00
%6 = fdiv double %2, %5
ret double %6
}
void g_object_ref() {}


x86 assembly (clang, -O0):
<g_object_ref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_object_ref>:
ret

LLVM IR (-O0):
define void @g_object_ref() {
ret void
}

LLVM IR (-O2):
define void @g_object_ref() {
ret void
}
int do_903() { return 903; }


x86 assembly (clang, -O0):
<do_903>:
push   %rbp
mov    %rsp,%rbp
mov    $0x387,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_903>:
mov    $0x387,%eax
ret

LLVM IR (-O0):
define i32 @do_903() {
ret i32 903
}

LLVM IR (-O2):
define i32 @do_903() {
ret i32 903
}
__attribute__((no, noclone)) unsigned __int128 t101_5add(unsigned char x) {
  unsigned __int128 r;
  if (__builtin_add_overflow(x, (unsigned char)(5), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t101_5add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %dil,%al
mov    %al,-0x11(%rbp)
movzbl -0x11(%rbp),%eax
mov    %eax,%ecx
add    $0x5,%rcx
xor    %eax,%eax
mov    %rcx,-0x30(%rbp)
movq   $0x0,-0x28(%rbp)
test   $0x1,%al
jne    1143 <t101_5add+0x33>
jmp    114a <t101_5add+0x3a>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x30(%rbp),%rax
mov    -0x28(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t101_5add>:
mov    %edi,%eax
add    $0x5,%rax
xor    %edx,%edx
ret

LLVM IR (-O0):
define { i64, i64 } @t101_5add(i8 zeroext %0) {
%2 = alloca i128
%3 = alloca i8
%4 = alloca i128
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = zext i8 %5 to i128
%7 = call { i128, i1 } @llvm.uadd.with.overflow.i128(i128 %6, i128 5)
%8 = extractvalue { i128, i1 } %7, 1
%9 = extractvalue { i128, i1 } %7, 0
store i128 %9, i128* %4
br i1 %8, label %10, label %12
10: ; preds = %1
%11 = call i32 (...) @bar()
br label %12
12: ; preds = %10, %1
%13 = load i128, i128* %4
store i128 %13, i128* %2
%14 = bitcast i128* %2 to { i64, i64 }*
%15 = load { i64, i64 }, { i64, i64 }* %14
ret { i64, i64 } %15
}

LLVM IR (-O2):
define { i64, i64 } @t101_5add(i8 zeroext %0) {
%2 = zext i8 %0 to i64
%3 = add nuw nsw i64 %2, 5
%4 = insertvalue { i64, i64 } poison, i64 %3, 0
%5 = insertvalue { i64, i64 } %4, i64 0, 1
ret { i64, i64 } %5
}