xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, size_t);
char *size_to_string(char *output, size_t size) {
  if (size >= (1 << 20))
    sprintf(output, "%zu MB", size >> 20);
  else
    sprintf(output, "%zu KB", size >> 10);
  return output;
}


x86 assembly (clang, -O0):
<size_to_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x100000,-0x10(%rbp)
jb     114b <size_to_string+0x3b>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
shr    $0x14,%rdx
lea    0xebf(%rip),%rsi
call   1030 <sprintf@plt>
jmp    1163 <size_to_string+0x53>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
shr    $0xa,%rdx
lea    0xea9(%rip),%rsi
call   1030 <sprintf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_to_string>:
push   %rbx
mov    %rsi,%rdx
cmp    $0x100000,%rsi
lea    0xede(%rip),%rax
lea    0xede(%rip),%rsi
cmovae %rax,%rsi
mov    $0x14,%eax
mov    $0xa,%ecx
cmovae %eax,%ecx
mov    %rdi,%rbx
shr    %cl,%rdx
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%zu MB\00"
@.str.1 = [7 x i8] c"%zu KB\00"
define i8* @size_to_string(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp uge i64 %5, 1048576
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = load i64, i64* %4
%10 = lshr i64 %9, 20
%11 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i64 %10)
br label %17
12: ; preds = %2
%13 = load i8*, i8** %3
%14 = load i64, i64* %4
%15 = lshr i64 %14, 10
%16 = call i32 @sprintf(i8* %13, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i64 %15)
br label %17
17: ; preds = %12, %7
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
@.str = [7 x i8] c"%zu MB\00"
@.str.1 = [7 x i8] c"%zu KB\00"
define i8* @size_to_string(i8* returned writeonly %0, i64 %1) {
%3 = icmp ugt i64 %1, 1048575
%4 = select i1 %3, i64 20, i64 10
%5 = select i1 %3, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0)
%6 = lshr i64 %1, %4
%7 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) %5, i64 %6)
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ dump(char const *);
void dump_command(const char *dir) { dump(dir); }


x86 assembly (clang, -O0):
<dump_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dump@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_command>:
jmp    1030 <dump@plt>

LLVM IR (-O0):
define void @dump_command(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @dump(i8* %3)
ret void
}

LLVM IR (-O2):
define void @dump_command(i8* %0) {
%2 = tail call i32 @dump(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ key_list_destroy();
int /*<<< orphan*/ options_destroy();
int /*<<< orphan*/ perfect_destroy();
void destroy_all() {
  options_destroy();
  key_list_destroy();
  perfect_destroy();
}


x86 assembly (clang, -O0):
<destroy_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <options_destroy@plt>
mov    $0x0,%al
call   1040 <key_list_destroy@plt>
mov    $0x0,%al
call   1030 <perfect_destroy@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy_all>:
push   %rax
xor    %eax,%eax
call   1050 <options_destroy@plt>
xor    %eax,%eax
call   1040 <key_list_destroy@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <perfect_destroy@plt>

LLVM IR (-O0):
define void @destroy_all() {
%1 = call i32 (...) @options_destroy()
%2 = call i32 (...) @key_list_destroy()
%3 = call i32 (...) @perfect_destroy()
ret void
}

LLVM IR (-O2):
define void @destroy_all() {
%1 = tail call i32 (...) @options_destroy()
%2 = tail call i32 (...) @key_list_destroy()
%3 = tail call i32 (...) @perfect_destroy()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) {
  printf("%s", "Hello, world!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
lea    0xecf(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xee4(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [15 x i8] c"Hello, world!\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [15 x i8] c"Hello, world!\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void quit_command() {
  printf("quit"
         "\n");
}


x86 assembly (clang, -O0):
<quit_command>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<quit_command>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"quit\0A\00"
define void @quit_command() {
%1 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [5 x i8] c"quit\00"
define void @quit_command() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int ssize_t;

/* Variables and functions */
int /*<<< orphan*/ basic_test(int);
int /*<<< orphan*/ cleanup_test();
int /*<<< orphan*/ init_test();
int log_write_end(int);
void write_two_pages_end(void) {
  ssize_t n;
  init_test();
  n = log_write_end(8192);
  basic_test(n == 8192);
  cleanup_test();
}


x86 assembly (clang, -O0):
<write_two_pages_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <init_test@plt>
mov    $0x2000,%edi
call   1030 <log_write_end@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x2000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <basic_test@plt>
mov    $0x0,%al
call   1050 <cleanup_test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_two_pages_end>:
push   %rax
xor    %eax,%eax
call   1060 <init_test@plt>
mov    $0x2000,%edi
call   1030 <log_write_end@plt>
xor    %edi,%edi
cmp    $0x2000,%eax
sete   %dil
call   1040 <basic_test@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <cleanup_test@plt>

LLVM IR (-O0):
define void @write_two_pages_end() {
%1 = alloca i32
%2 = call i32 (...) @init_test()
%3 = call i32 @log_write_end(i32 8192)
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, 8192
%6 = zext i1 %5 to i32
%7 = call i32 @basic_test(i32 %6)
%8 = call i32 (...) @cleanup_test()
ret void
}

LLVM IR (-O2):
define void @write_two_pages_end() {
%1 = tail call i32 (...) @init_test()
%2 = tail call i32 @log_write_end(i32 8192)
%3 = icmp eq i32 %2, 8192
%4 = zext i1 %3 to i32
%5 = tail call i32 @basic_test(i32 %4)
%6 = tail call i32 (...) @cleanup_test()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ egcd(int, int, int *, int *);
int modni(int a, int m) {
  int x, y;
  egcd(a, m, &x, &y);
  return (x + m) % m;
}


x86 assembly (clang, -O0):
<modni>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
call   1030 <egcd@plt>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<modni>:
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ebx
lea    0x8(%rsp),%rdx
lea    0xc(%rsp),%rcx
call   1030 <egcd@plt>
mov    0x8(%rsp),%eax
add    %ebx,%eax
cltd
idiv   %ebx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @modni(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 @egcd(i32 %7, i32 %8, i32* %5, i32* %6)
%10 = load i32, i32* %5
%11 = load i32, i32* %4
%12 = add nsw i32 %10, %11
%13 = load i32, i32* %4
%14 = srem i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @modni(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %3 to i8*
%6 = bitcast i32* %4 to i8*
%7 = call i32 @egcd(i32 %0, i32 %1, i32* %3, i32* %4)
%8 = load i32, i32* %3
%9 = add nsw i32 %8, %1
%10 = srem i32 %9, %1
ret i32 %10
}
void ff_h264dsp_init_arm() {}


x86 assembly (clang, -O0):
<ff_h264dsp_init_arm>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_h264dsp_init_arm>:
ret

LLVM IR (-O0):
define void @ff_h264dsp_init_arm() {
ret void
}

LLVM IR (-O2):
define void @ff_h264dsp_init_arm() {
ret void
}
int cpy_asc(unsigned long value, void *arg) {
  unsigned char **p, *q;
  p = arg;
  q = *p;
  *q = value;
  (*p)++;
  return 1;
}


x86 assembly (clang, -O0):
<cpy_asc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpy_asc>:
mov    (%rsi),%rax
mov    %dil,(%rax)
addq   $0x1,(%rsi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @cpy_asc(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%7 = load i8*, i8** %4
%8 = bitcast i8* %7 to i8**
store i8** %8, i8*** %5
%9 = load i8**, i8*** %5
%10 = load i8*, i8** %9
store i8* %10, i8** %6
%11 = load i64, i64* %3
%12 = trunc i64 %11 to i8
%13 = load i8*, i8** %6
store i8 %12, i8* %13
%14 = load i8**, i8*** %5
%15 = load i8*, i8** %14
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %14
ret i32 1
}

LLVM IR (-O2):
define i32 @cpy_asc(i64 %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i8**
%4 = load i8*, i8** %3
%5 = trunc i64 %0 to i8
store i8 %5, i8* %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 1
store i8* %7, i8** %3
ret i32 1
}
float pdifff(float x, float y) {
  if (x != x || y != y) {
    return 0.0f / 0.0f;
  }
  if (x > y) {
    return x - y;
  }
  return 0.0f;
}


x86 assembly (clang, -O0):
<pdifff>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jne    113d <pdifff+0x3d>
jp     113d <pdifff+0x3d>
movss  -0xc(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jne    113d <pdifff+0x3d>
jp     113d <pdifff+0x3d>
jmp    114f <pdifff+0x4f>
movss  0xebb(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    117a <pdifff+0x7a>
movss  -0x8(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1172 <pdifff+0x72>
movss  -0x8(%rbp),%xmm0
subss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    117a <pdifff+0x7a>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pdifff>:
ucomiss %xmm1,%xmm0
jp     1115 <pdifff+0x15>
xorps  %xmm2,%xmm2
jbe    1111 <pdifff+0x11>
subss  %xmm1,%xmm0
movaps %xmm0,%xmm2
movaps %xmm2,%xmm0
ret
movss  0xee3(%rip),%xmm0
ret

LLVM IR (-O0):
define float @pdifff(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %4
%8 = fcmp une float %6, %7
br i1 %8, label %13, label %9
9: ; preds = %2
%10 = load float, float* %5
%11 = load float, float* %5
%12 = fcmp une float %10, %11
br i1 %12, label %13, label %14
13: ; preds = %9, %2
store float 0x7FF8000000000000, float* %3
br label %23
14: ; preds = %9
%15 = load float, float* %4
%16 = load float, float* %5
%17 = fcmp ogt float %15, %16
br i1 %17, label %18, label %22
18: ; preds = %14
%19 = load float, float* %4
%20 = load float, float* %5
%21 = fsub float %19, %20
store float %21, float* %3
br label %23
22: ; preds = %14
store float 0.000000e+00, float* %3
br label %23
23: ; preds = %22, %18, %13
%24 = load float, float* %3
ret float %24
}

LLVM IR (-O2):
define float @pdifff(float %0, float %1) {
%3 = fcmp uno float %0, %1
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = fcmp ogt float %0, %1
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = fsub float %0, %1
br label %8
8: ; preds = %4, %2, %6
%9 = phi float [ %7, %6 ], [ 0x7FF8000000000000, %2 ], [ 0.000000e+00, %4 ]
ret float %9
}
/* Type definitions */
struct exfat_de_iter {
  int dummy;
};

/* Variables and functions */
int EIO;
scalar_t__ write_block(struct exfat_de_iter *, int);
int exfat_de_iter_flush(struct exfat_de_iter *iter) {
  if (write_block(iter, 0) || write_block(iter, 1))
    return -EIO;
  return 0;
}


x86 assembly (clang, -O0):
<exfat_de_iter_flush>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1030 <write_block@plt>
cmp    $0x0,%rax
jne    1149 <exfat_de_iter_flush+0x39>
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
call   1030 <write_block@plt>
cmp    $0x0,%rax
je     115c <exfat_de_iter_flush+0x4c>
xor    %eax,%eax
mov    0x2e8e(%rip),%rcx
sub    (%rcx),%eax
mov    %eax,-0x4(%rbp)
jmp    1163 <exfat_de_iter_flush+0x53>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exfat_de_iter_flush>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
xor    %esi,%esi
call   1030 <write_block@plt>
test   %rax,%rax
jne    1137 <exfat_de_iter_flush+0x27>
mov    %r14,%rdi
mov    $0x1,%esi
call   1030 <write_block@plt>
test   %rax,%rax
je     1140 <exfat_de_iter_flush+0x30>
mov    0x2ea2(%rip),%rax
sub    (%rax),%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.exfat_de_iter = type { i32 }
@EIO = global i32 0
define i32 @exfat_de_iter_flush(%struct.exfat_de_iter* %0) {
%2 = alloca i32
%3 = alloca %struct.exfat_de_iter*
store %struct.exfat_de_iter* %0, %struct.exfat_de_iter** %3
%4 = load %struct.exfat_de_iter*, %struct.exfat_de_iter** %3
%5 = call i64 @write_block(%struct.exfat_de_iter* %4, i32 0)
%6 = icmp ne i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load %struct.exfat_de_iter*, %struct.exfat_de_iter** %3
%9 = call i64 @write_block(%struct.exfat_de_iter* %8, i32 1)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7, %1
%12 = load i32, i32* @EIO
%13 = sub nsw i32 0, %12
store i32 %13, i32* %2
br label %15
14: ; preds = %7
store i32 0, i32* %2
br label %15
15: ; preds = %14, %11
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
%struct.exfat_de_iter = type { i32 }
@EIO = global i32 0
define i32 @exfat_de_iter_flush(%struct.exfat_de_iter* %0) {
%2 = tail call i64 @write_block(%struct.exfat_de_iter* %0, i32 0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i64 @write_block(%struct.exfat_de_iter* %0, i32 1)
%6 = icmp eq i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %4, %1
%8 = load i32, i32* @EIO
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %4, %7
%11 = phi i32 [ %9, %7 ], [ 0, %4 ]
ret i32 %11
}
unsigned hash_string(char *name) {
  unsigned h = 0;
  for (h = 0; *name; name++) {
    unsigned g;
    h = (h << 4) + *(unsigned char *)name;
    g = h & 0xF000U;
    h ^= (g >> 12);
    h &= ~g;
  }
  return h;
}


x86 assembly (clang, -O0):
<hash_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1169 <hash_string+0x69>
mov    -0xc(%rbp),%eax
shl    $0x4,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xf000,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
shr    $0xc,%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
and    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1116 <hash_string+0x16>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_string>:
mov    (%rdi),%cl
test   %cl,%cl
je     1136 <hash_string+0x36>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
shl    $0x4,%eax
movzbl %cl,%ecx
add    %eax,%ecx
mov    %ecx,%eax
and    $0xf000,%eax
mov    %eax,%edx
shr    $0xc,%edx
xor    %ecx,%edx
not    %eax
and    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <hash_string+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash_string(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %5
5: ; preds = %26, %1
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %29
9: ; preds = %5
%10 = load i32, i32* %3
%11 = shl i32 %10, 4
%12 = load i8*, i8** %2
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = add i32 %11, %14
store i32 %15, i32* %3
%16 = load i32, i32* %3
%17 = and i32 %16, 61440
store i32 %17, i32* %4
%18 = load i32, i32* %4
%19 = lshr i32 %18, 12
%20 = load i32, i32* %3
%21 = xor i32 %20, %19
store i32 %21, i32* %3
%22 = load i32, i32* %4
%23 = xor i32 %22, -1
%24 = load i32, i32* %3
%25 = and i32 %24, %23
store i32 %25, i32* %3
br label %26
26: ; preds = %9
%27 = load i8*, i8** %2
%28 = getelementptr inbounds i8, i8* %27, i32 1
store i8* %28, i8** %2
br label %5
29: ; preds = %5
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @hash_string(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %19, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %17, %4 ], [ %2, %1 ]
%6 = phi i8* [ %16, %4 ], [ %0, %1 ]
%7 = phi i32 [ %15, %4 ], [ 0, %1 ]
%8 = shl i32 %7, 4
%9 = zext i8 %5 to i32
%10 = add i32 %8, %9
%11 = and i32 %10, 61440
%12 = lshr exact i32 %11, 12
%13 = xor i32 %12, %10
%14 = xor i32 %11, -1
%15 = and i32 %13, %14
%16 = getelementptr inbounds i8, i8* %6, i64 1
%17 = load i8, i8* %16
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %4
19: ; preds = %4, %1
%20 = phi i32 [ 0, %1 ], [ %15, %4 ]
ret i32 %20
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
main() {
  printf("%i", sizeof("/home/universalpackagemanager/UPM/Tests/PACKAGES/"
                      "zsh-5.4.2-1-x86_64/usr/lib/zsh/5.4.2/zsh/zle.so"));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x61,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x61,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%i\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 97)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%i\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 97)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *);
int /*<<< orphan*/ debug_flush();
void hal_storage_init(void) {
  debug("hal_storage: init\n");
  debug_flush();
}


x86 assembly (clang, -O0):
<hal_storage_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <debug@plt>
mov    $0x0,%al
call   1030 <debug_flush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hal_storage_init>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <debug@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <debug_flush@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"hal_storage: init\0A\00"
define void @hal_storage_init() {
%1 = call i32 @debug(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @debug_flush()
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"hal_storage: init\0A\00"
define void @hal_storage_init() {
%1 = tail call i32 @debug(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @debug_flush()
ret void
}
void gtk_icon_view_set_item_width() {}


x86 assembly (clang, -O0):
<gtk_icon_view_set_item_width>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_view_set_item_width>:
ret

LLVM IR (-O0):
define void @gtk_icon_view_set_item_width() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_view_set_item_width() {
ret void
}
/* Type definitions */
struct render_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ render_list_add_osrxy(struct render_list *, int,
                                         void const *, float, float, int, int,
                                         float, float, float);
void render_list_add_orxy(struct render_list *list, int type, const void *data,
                          float origin_x, float origin_y, float rotate, float x,
                          float y) {
  render_list_add_osrxy(list, type, data, origin_x, origin_y, 1, 1, rotate, x,
                        y);
}


x86 assembly (clang, -O0):
<render_list_add_orxy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
movss  %xmm0,-0x1c(%rbp)
movss  %xmm1,-0x20(%rbp)
movss  %xmm2,-0x24(%rbp)
movss  %xmm3,-0x28(%rbp)
movss  %xmm4,-0x2c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
movss  -0x1c(%rbp),%xmm0
movss  -0x20(%rbp),%xmm1
movss  -0x24(%rbp),%xmm2
movss  -0x28(%rbp),%xmm3
movss  -0x2c(%rbp),%xmm4
mov    $0x1,%r8d
mov    %r8d,%ecx
call   1030 <render_list_add_osrxy@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<render_list_add_orxy>:
mov    $0x1,%ecx
mov    $0x1,%r8d
jmp    1030 <render_list_add_osrxy@plt>

LLVM IR (-O0):
%struct.render_list = type { i32 }
define void @render_list_add_orxy(%struct.render_list* %0, i32 %1, i8* %2, float %3, float %4, float %5, float %6, float %7) {
%9 = alloca %struct.render_list*
%10 = alloca i32
%11 = alloca i8*
%12 = alloca float
%13 = alloca float
%14 = alloca float
%15 = alloca float
%16 = alloca float
store %struct.render_list* %0, %struct.render_list** %9
store i32 %1, i32* %10
store i8* %2, i8** %11
store float %3, float* %12
store float %4, float* %13
store float %5, float* %14
store float %6, float* %15
store float %7, float* %16
%17 = load %struct.render_list*, %struct.render_list** %9
%18 = load i32, i32* %10
%19 = load i8*, i8** %11
%20 = load float, float* %12
%21 = load float, float* %13
%22 = load float, float* %14
%23 = load float, float* %15
%24 = load float, float* %16
%25 = call i32 @render_list_add_osrxy(%struct.render_list* %17, i32 %18, i8* %19, float %20, float %21, i32 1, i32 1, float %22, float %23, float %24)
ret void
}

LLVM IR (-O2):
%struct.render_list = type { i32 }
define void @render_list_add_orxy(%struct.render_list* %0, i32 %1, i8* %2, float %3, float %4, float %5, float %6, float %7) {
%9 = tail call i32 @render_list_add_osrxy(%struct.render_list* %0, i32 %1, i8* %2, float %3, float %4, i32 1, i32 1, float %5, float %6, float %7)
ret void
}
unsigned foo(unsigned a, unsigned b) { return (a & 0xff00) != (b & 0xff00); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
mov    -0x8(%rbp),%ecx
and    $0xff00,%ecx
cmp    %ecx,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %esi,%edi
xor    %eax,%eax
test   $0xff00,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 %5, 65280
%7 = load i32, i32* %4
%8 = and i32 %7, 65280
%9 = icmp ne i32 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = and i32 %3, 65280
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int num_bits(int value) {
  value = ((value & 0xaaaa) >> 1) + (value & 0x5555);
  value = ((value & 0xcccc) >> 2) + (value & 0x3333);
  value = ((value & 0xf0f0) >> 4) + (value & 0x0f0f);
  value = ((value & 0xff00) >> 8) + (value & 0x00ff);
  return value;
}


x86 assembly (clang, -O0):
<num_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xaaaa,%eax
sar    $0x1,%eax
mov    -0x4(%rbp),%ecx
and    $0x5555,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xcccc,%eax
sar    $0x2,%eax
mov    -0x4(%rbp),%ecx
and    $0x3333,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf0f0,%eax
sar    $0x4,%eax
mov    -0x4(%rbp),%ecx
and    $0xf0f,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_bits>:
mov    %edi,%eax
shr    %eax
and    $0x5555,%eax
and    $0x5555,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x2,%eax
and    $0x3333,%eax
and    $0x3333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
and    $0x707,%eax
and    $0x707,%edi
add    %eax,%edi
movzbl %dil,%eax
shr    $0x8,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @num_bits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 43690
%5 = ashr i32 %4, 1
%6 = load i32, i32* %2
%7 = and i32 %6, 21845
%8 = add nsw i32 %5, %7
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = and i32 %9, 52428
%11 = ashr i32 %10, 2
%12 = load i32, i32* %2
%13 = and i32 %12, 13107
%14 = add nsw i32 %11, %13
store i32 %14, i32* %2
%15 = load i32, i32* %2
%16 = and i32 %15, 61680
%17 = ashr i32 %16, 4
%18 = load i32, i32* %2
%19 = and i32 %18, 3855
%20 = add nsw i32 %17, %19
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = and i32 %21, 65280
%23 = ashr i32 %22, 8
%24 = load i32, i32* %2
%25 = and i32 %24, 255
%26 = add nsw i32 %23, %25
store i32 %26, i32* %2
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @num_bits(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 21845
%4 = and i32 %0, 21845
%5 = add nuw nsw i32 %3, %4
%6 = lshr i32 %5, 2
%7 = and i32 %6, 13107
%8 = and i32 %5, 13107
%9 = add nuw nsw i32 %7, %8
%10 = lshr i32 %9, 4
%11 = and i32 %10, 1799
%12 = and i32 %9, 1799
%13 = add nuw nsw i32 %11, %12
%14 = lshr i32 %13, 8
%15 = and i32 %13, 15
%16 = add nuw nsw i32 %14, %15
ret i32 %16
}
int ffs(int i) {
  int j;
  for (j = 1; (i & 1) == 0; j++)
    i >>= 1;
  return j;
}


x86 assembly (clang, -O0):
<ffs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1134 <ffs+0x34>
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <ffs+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffs>:
mov    $0x1,%eax
test   $0x1,%dil
jne    112d <ffs+0x2d>
mov    $0x1,%eax
mov    %edi,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
sar    %ecx
add    $0x1,%eax
test   $0x2,%dil
mov    %ecx,%edi
je     1120 <ffs+0x20>
ret

LLVM IR (-O0):
define i32 @ffs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %2
%6 = and i32 %5, 1
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i32, i32* %2
%10 = ashr i32 %9, 1
store i32 %10, i32* %2
br label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @ffs(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 1, %1 ]
%6 = phi i32 [ %7, %4 ], [ %0, %1 ]
%7 = ashr i32 %6, 1
%8 = add nuw nsw i32 %5, 1
%9 = and i32 %6, 2
%10 = icmp eq i32 %9, 0
br i1 %10, label %4, label %11
11: ; preds = %4, %1
%12 = phi i32 [ 1, %1 ], [ %8, %4 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void fremem_(long int *pointer) {
  void *area = (void *)*pointer;
  free(area);
  return;
}


x86 assembly (clang, -O0):
<fremem_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fremem_>:
mov    (%rdi),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @fremem_(i64* %0) {
%2 = alloca i64*
%3 = alloca i8*
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = load i64, i64* %4
%6 = inttoptr i64 %5 to i8*
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = call i32 @free(i8* %7)
ret void
}

LLVM IR (-O2):
define void @fremem_(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = inttoptr i64 %2 to i8*
%4 = tail call i32 @free(i8* %3)
ret void
}
void EVP_DigestInit(void) {}


x86 assembly (clang, -O0):
<EVP_DigestInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_DigestInit>:
ret

LLVM IR (-O0):
define void @EVP_DigestInit() {
ret void
}

LLVM IR (-O2):
define void @EVP_DigestInit() {
ret void
}
unsigned int f73(unsigned int x, unsigned int y) {
  return (x << y) + (x >> (8 * sizeof(unsigned int) - y));
}


x86 assembly (clang, -O0):
<f73>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
mov    %ecx,%esi
mov    $0x20,%ecx
sub    %rsi,%rcx
shr    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f73>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f73(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = sub i64 32, %10
%12 = trunc i64 %11 to i32
%13 = lshr i32 %8, %12
%14 = add i32 %7, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @f73(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub i32 32, %1
%5 = lshr i32 %0, %4
%6 = add i32 %5, %3
ret i32 %6
}
int __test_and_set_bit(int nr, volatile void *addr) {
  int oldbit;
  asm volatile("btsl %2,%1\n\tsbbl %0,%0"
               : "=r"(oldbit), "=m"((*(volatile long *)addr))
               : "Ir"(nr), "m"((*(volatile long *)addr))
               : "memory");
  return oldbit;
}


x86 assembly (clang, -O0):
<__test_and_set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rdx
bts    %ecx,(%rax)
sbb    %eax,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test_and_set_bit>:
bts    %edi,(%rsi)
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__test_and_set_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i64*
%8 = load i32, i32* %3
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i64*
%11 = call i32 asm sideeffect "btsl $2,$1\0A\09sbbl $0,$0", "=r,=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %7, i32 %8, i64* elementtype(i64) %10)
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @__test_and_set_bit(i32 %0, i8* %1) {
%3 = bitcast i8* %1 to i64*
%4 = tail call i32 asm sideeffect "btsl $2,$1\0A\09sbbl $0,$0", "=r,=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %3, i32 %0, i64* elementtype(i64) %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, double *, int *);
int /*<<< orphan*/ ussu(double, int);
int main() {
  double n;
  int u;
  printf("Us alinacak sayilari giriniz.\n");
  scanf("%lf%d", &n, &u);
  printf("%.02lf\n", ussu(n, u));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xecb(%rip),%rdi
lea    -0x10(%rbp),%rsi
lea    -0x14(%rbp),%rdx
call   1050 <scanf@plt>
movsd  -0x10(%rbp),%xmm0
mov    -0x14(%rbp),%edi
call   1030 <ussu@plt>
mov    %eax,%esi
lea    0xeae(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xec3(%rip),%rdi
call   1030 <puts@plt>
lea    0xea9(%rip),%rdi
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
call   1060 <scanf@plt>
movsd  0x10(%rsp),%xmm0
mov    0xc(%rsp),%edi
call   1040 <ussu@plt>
lea    0xe8a(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1050 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [31 x i8] c"Us alinacak sayilari giriniz.\0A\00"
@.str.1 = [6 x i8] c"%lf%d\00"
@.str.2 = [8 x i8] c"%.02lf\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), double* %2, i32* %3)
%6 = load double, double* %2
%7 = load i32, i32* %3
%8 = call i32 @ussu(double %6, i32 %7)
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [6 x i8] c"%lf%d\00"
@.str.2 = [8 x i8] c"%.02lf\0A\00"
@str = [30 x i8] c"Us alinacak sayilari giriniz.\00"
define i32 @main() {
%1 = alloca double
%2 = alloca i32
%3 = bitcast double* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0))
%6 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), double* %1, i32* %2)
%7 = load double, double* %1
%8 = load i32, i32* %2
%9 = call i32 @ussu(double %7, i32 %8)
%10 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i32 %9)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int do_printf(int /*<<< orphan*/, char const *, int /*<<< orphan*/, int);
int /*<<< orphan*/ stdout;
int tprintf(const char *format, va_list arglist) {
  return do_printf(stdout, format, arglist, 1);
}


x86 assembly (clang, -O0):
<tprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    $0x1,%ecx
call   1030 <do_printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tprintf>:
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
mov    $0x1,%ecx
jmp    1030 <do_printf@plt>

LLVM IR (-O0):
@stdout = global i32 0
define i32 @tprintf(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stdout
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @do_printf(i32 %5, i8* %6, i32 %7, i32 1)
ret i32 %8
}

LLVM IR (-O2):
@stdout = global i32 0
define i32 @tprintf(i8* %0, i32 %1) {
%3 = load i32, i32* @stdout
%4 = tail call i32 @do_printf(i32 %3, i8* %0, i32 %1, i32 1)
ret i32 %4
}
/* Variables and functions */
char *base64_encode(char const *, int);
char *rtsp_encode_base64(const char *buffer, int length) {
  return base64_encode(buffer, length);
}


x86 assembly (clang, -O0):
<rtsp_encode_base64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <base64_encode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtsp_encode_base64>:
jmp    1030 <base64_encode@plt>

LLVM IR (-O0):
define i8* @rtsp_encode_base64(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i8* @base64_encode(i8* %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @rtsp_encode_base64(i8* %0, i32 %1) {
%3 = tail call i8* @base64_encode(i8* %0, i32 %1)
ret i8* %3
}
/* Type definitions */
struct perf_event_attr {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_perf_event_open;
int syscall(int /*<<< orphan*/, struct perf_event_attr *, int /*<<< orphan*/,
            int, int, unsigned long);
int perf_event_open(struct perf_event_attr *attr, pid_t pid, int cpu,
                    int group_fd, unsigned long flags) {
  return syscall(SYS_perf_event_open, attr, pid, cpu, group_fd, flags);
}


x86 assembly (clang, -O0):
<perf_event_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x20(%rbp),%r9
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_event_open>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.perf_event_attr = type { i32 }
@SYS_perf_event_open = global i32 0
define i32 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = alloca %struct.perf_event_attr*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
store %struct.perf_event_attr* %0, %struct.perf_event_attr** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i64 %4, i64* %10
%11 = load i32, i32* @SYS_perf_event_open
%12 = load %struct.perf_event_attr*, %struct.perf_event_attr** %6
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i64, i64* %10
%17 = call i32 @syscall(i32 %11, %struct.perf_event_attr* %12, i32 %13, i32 %14, i32 %15, i64 %16)
ret i32 %17
}

LLVM IR (-O2):
%struct.perf_event_attr = type { i32 }
@SYS_perf_event_open = global i32 0
define i32 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = load i32, i32* @SYS_perf_event_open
%7 = tail call i32 @syscall(i32 %6, %struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4)
ret i32 %7
}
/* Variables and functions */
int randomGaussian_r(int, int, unsigned int *);
int /*<<< orphan*/ sleep(int);
int goStir(int id, void *philoNum) {
  int time;
  time = randomGaussian_r(9, 3, (unsigned int *)philoNum);
  if (time <= 0)
    time = 0;
  sleep(time);
  return time;
}


x86 assembly (clang, -O0):
<goStir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    $0x9,%edi
mov    $0x3,%esi
call   1030 <randomGaussian_r@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jg     1156 <goStir+0x36>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <sleep@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<goStir>:
push   %rbx
mov    %rsi,%rdx
mov    $0x9,%edi
mov    $0x3,%esi
call   1030 <randomGaussian_r@plt>
mov    %eax,%ebx
xor    %eax,%eax
test   %ebx,%ebx
cmovs  %eax,%ebx
mov    %ebx,%edi
call   1040 <sleep@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @goStir(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
%8 = call i32 @randomGaussian_r(i32 9, i32 3, i32* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp sle i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 0, i32* %5
br label %12
12: ; preds = %11, %2
%13 = load i32, i32* %5
%14 = call i32 @sleep(i32 %13)
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
define i32 @goStir(i32 %0, i8* %1) {
%3 = bitcast i8* %1 to i32*
%4 = tail call i32 @randomGaussian_r(i32 9, i32 3, i32* %3)
%5 = icmp sgt i32 %4, 0
%6 = select i1 %5, i32 %4, i32 0
%7 = tail call i32 @sleep(i32 %6)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *solv_free(void *mem) {
  if (mem)
    free(mem);
  return 0;
}


x86 assembly (clang, -O0):
<solv_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <solv_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solv_free>:
test   %rdi,%rdi
je     111f <solv_free+0xf>
push   %rax
call   1030 <free@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @solv_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @solv_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret i8* null
}
/* Variables and functions */
scalar_t__ getchar();
void b_getchar_64(long idx, long *cells, int size) {
  cells[idx] = (long)getchar();
}


x86 assembly (clang, -O0):
<b_getchar_64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %rax,%rdx
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_getchar_64>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <getchar@plt>
mov    %rax,(%r14,%rbx,8)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @b_getchar_64(i64 %0, i64* %1, i32 %2) {
%4 = alloca i64
%5 = alloca i64*
%6 = alloca i32
store i64 %0, i64* %4
store i64* %1, i64** %5
store i32 %2, i32* %6
%7 = call i64 (...) @getchar()
%8 = load i64*, i64** %5
%9 = load i64, i64* %4
%10 = getelementptr inbounds i64, i64* %8, i64 %9
store i64 %7, i64* %10
ret void
}

LLVM IR (-O2):
define void @b_getchar_64(i64 %0, i64* nocapture writeonly %1, i32 %2) {
%4 = tail call i64 (...) @getchar()
%5 = getelementptr inbounds i64, i64* %1, i64 %0
store i64 %4, i64* %5
ret void
}
void GPMCTimeOutFeatureConfig(unsigned int baseAddr, unsigned int flag) {
  if (flag == (1)) {
    (*((volatile unsigned int *)(baseAddr + (0x40)))) |= (0x1u);
  } else if (flag == (0)) {
    (*((volatile unsigned int *)(baseAddr + (0x40)))) &= (~(0x1u));
  }
}


x86 assembly (clang, -O0):
<GPMCTimeOutFeatureConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1128 <GPMCTimeOutFeatureConfig+0x28>
mov    -0x4(%rbp),%eax
add    $0x40,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     $0x1,%ecx
mov    %ecx,(%rax)
jmp    1146 <GPMCTimeOutFeatureConfig+0x46>
cmpl   $0x0,-0x8(%rbp)
jne    1141 <GPMCTimeOutFeatureConfig+0x41>
mov    -0x4(%rbp),%eax
add    $0x40,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    %ecx,(%rax)
jmp    1146 <GPMCTimeOutFeatureConfig+0x46>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCTimeOutFeatureConfig>:
test   %esi,%esi
je     1110 <GPMCTimeOutFeatureConfig+0x10>
cmp    $0x1,%esi
jne    1116 <GPMCTimeOutFeatureConfig+0x16>
add    $0x40,%edi
orl    $0x1,(%rdi)
ret
add    $0x40,%edi
andl   $0xfffffffe,(%rdi)
ret

LLVM IR (-O0):
define void @GPMCTimeOutFeatureConfig(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* %3
%9 = add i32 %8, 64
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = or i32 %12, 1
store volatile i32 %13, i32* %11
br label %25
14: ; preds = %2
%15 = load i32, i32* %4
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %24
17: ; preds = %14
%18 = load i32, i32* %3
%19 = add i32 %18, 64
%20 = zext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
%22 = load volatile i32, i32* %21
%23 = and i32 %22, -2
store volatile i32 %23, i32* %21
br label %24
24: ; preds = %17, %14
br label %25
25: ; preds = %24, %7
ret void
}

LLVM IR (-O2):
define void @GPMCTimeOutFeatureConfig(i32 %0, i32 %1) {
switch i32 %1, label %15 [
i32 1, label %3
i32 0, label %9
]
3: ; preds = %2
%4 = add i32 %0, 64
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = or i32 %7, 1
store volatile i32 %8, i32* %6
br label %15
9: ; preds = %2
%10 = add i32 %0, 64
%11 = zext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
%14 = and i32 %13, -2
store volatile i32 %14, i32* %12
br label %15
15: ; preds = %2, %9, %3
ret void
}
int tstamp_gt(unsigned tstamp0, unsigned tstamp1) {
  return (short)(tstamp0 - tstamp1) > 0;
}


x86 assembly (clang, -O0):
<tstamp_gt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
cwtl
cmp    $0x0,%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tstamp_gt>:
sub    %esi,%edi
xor    %eax,%eax
test   %di,%di
setg   %al
ret

LLVM IR (-O0):
define i32 @tstamp_gt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub i32 %5, %6
%8 = trunc i32 %7 to i16
%9 = sext i16 %8 to i32
%10 = icmp sgt i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @tstamp_gt(i32 %0, i32 %1) {
%3 = sub i32 %0, %1
%4 = trunc i32 %3 to i16
%5 = icmp sgt i16 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
int simulated_while_shortcut(int p) {
  int k = 0;
  int j = 0;
B:
  j++;
  if (k == 1 && j < 100) {
    goto B;
  }
  return k;
}


x86 assembly (clang, -O0):
<simulated_while_shortcut>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1137 <simulated_while_shortcut+0x37>
cmpl   $0x64,-0xc(%rbp)
jge    1137 <simulated_while_shortcut+0x37>
jmp    1115 <simulated_while_shortcut+0x15>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<simulated_while_shortcut>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @simulated_while_shortcut(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %13, %1
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
store i32 %7, i32* %4
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %14
10: ; preds = %5
%11 = load i32, i32* %4
%12 = icmp slt i32 %11, 100
br i1 %12, label %13, label %14
13: ; preds = %10
br label %5
14: ; preds = %10, %5
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @simulated_while_shortcut(i32 %0) {
ret i32 0
}