xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int socklen_t;
typedef int /*<<< orphan*/ size;

/* Variables and functions */
int /*<<< orphan*/ SOL_SOCKET;
int /*<<< orphan*/ SO_RCVBUF;
int getsockopt(int, int /*<<< orphan*/, int /*<<< orphan*/, int *, int *);
int sapi_get_rcvbufsize(int sock) {
  int size;
  socklen_t sizelen = sizeof(size);
  int ret;
  ret = getsockopt(sock, SOL_SOCKET, SO_RCVBUF, &size, &sizelen);
  if (ret < 0) {
    return -1;
  }
  return size;
}


x86 assembly (clang, -O0):
<sapi_get_rcvbufsize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x4,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    0x2ebc(%rip),%rax
mov    (%rax),%esi
mov    0x2ea3(%rip),%rax
mov    (%rax),%edx
lea    -0xc(%rbp),%rcx
lea    -0x10(%rbp),%r8
call   1030 <getsockopt@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jge    115d <sapi_get_rcvbufsize+0x4d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1163 <sapi_get_rcvbufsize+0x53>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sapi_get_rcvbufsize>:
push   %rax
movl   $0x4,(%rsp)
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
mov    0x2eb0(%rip),%rax
mov    (%rax),%edx
lea    0x4(%rsp),%rcx
mov    %rsp,%r8
call   1030 <getsockopt@plt>
mov    %eax,%ecx
mov    $0xffffffff,%eax
test   %ecx,%ecx
js     1146 <sapi_get_rcvbufsize+0x36>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@SOL_SOCKET = global i32 0
@SO_RCVBUF = global i32 0
define i32 @sapi_get_rcvbufsize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 4, i32* %5
%7 = load i32, i32* %3
%8 = load i32, i32* @SOL_SOCKET
%9 = load i32, i32* @SO_RCVBUF
%10 = call i32 @getsockopt(i32 %7, i32 %8, i32 %9, i32* %4, i32* %5)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %1
store i32 -1, i32* %2
br label %16
14: ; preds = %1
%15 = load i32, i32* %4
store i32 %15, i32* %2
br label %16
16: ; preds = %14, %13
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@SOL_SOCKET = global i32 0
@SO_RCVBUF = global i32 0
define i32 @sapi_get_rcvbufsize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
%5 = bitcast i32* %3 to i8*
store i32 4, i32* %3
%6 = load i32, i32* @SOL_SOCKET
%7 = load i32, i32* @SO_RCVBUF
%8 = call i32 @getsockopt(i32 %0, i32 %6, i32 %7, i32* %2, i32* %3)
%9 = load i32, i32* %2
%10 = icmp sgt i32 %8, -1
%11 = select i1 %10, i32 %9, i32 -1
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ byteorder_swap_pointer_64_copy(unsigned char *,
                                                  unsigned char *);
double byteorder_swap_pointer_64_to_float64(unsigned char *p) {
  double f;
  byteorder_swap_pointer_64_copy(p, (unsigned char *)&f);
  return f;
}


x86 assembly (clang, -O0):
<byteorder_swap_pointer_64_to_float64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <byteorder_swap_pointer_64_copy@plt>
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<byteorder_swap_pointer_64_to_float64>:
push   %rax
mov    %rsp,%rsi
call   1030 <byteorder_swap_pointer_64_copy@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @byteorder_swap_pointer_64_to_float64(i8* %0) {
%2 = alloca i8*
%3 = alloca double
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast double* %3 to i8*
%6 = call i32 @byteorder_swap_pointer_64_copy(i8* %4, i8* %5)
%7 = load double, double* %3
ret double %7
}

LLVM IR (-O2):
define double @byteorder_swap_pointer_64_to_float64(i8* %0) {
%2 = alloca double
%3 = bitcast double* %2 to i8*
%4 = call i32 @byteorder_swap_pointer_64_copy(i8* %0, i8* %3)
%5 = load double, double* %2
ret double %5
}
void foo36() {}


x86 assembly (clang, -O0):
<foo36>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo36>:
ret

LLVM IR (-O0):
define void @foo36() {
ret void
}

LLVM IR (-O2):
define void @foo36() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gets(char *);
void inputInto(char *targeted) { gets(targeted); }


x86 assembly (clang, -O0):
<inputInto>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gets@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inputInto>:
jmp    1030 <gets@plt>

LLVM IR (-O0):
define void @inputInto(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @gets(i8* %3)
ret void
}

LLVM IR (-O2):
define void @inputInto(i8* %0) {
%2 = tail call i32 @gets(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
int main01() {
  putchar('h');
  putchar('e');
  putchar('l');
  return 0;
}


x86 assembly (clang, -O0):
<main01>:
push   %rbp
mov    %rsp,%rbp
mov    $0x68,%edi
call   1030 <putchar@plt>
mov    $0x65,%edi
call   1030 <putchar@plt>
mov    $0x6c,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main01>:
push   %rax
mov    $0x68,%edi
call   1030 <putchar@plt>
mov    $0x65,%edi
call   1030 <putchar@plt>
mov    $0x6c,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main01() {
%1 = call i32 @putchar(i8 signext 104)
%2 = call i32 @putchar(i8 signext 101)
%3 = call i32 @putchar(i8 signext 108)
ret i32 0
}

LLVM IR (-O2):
define i32 @main01() {
%1 = tail call i32 @putchar(i8 signext 104)
%2 = tail call i32 @putchar(i8 signext 101)
%3 = tail call i32 @putchar(i8 signext 108)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ perror(int /*<<< orphan*/ *);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ vfprintf(int /*<<< orphan*/, char const *,
                            int /*<<< orphan*/);
void vfailf(const char *fmt, va_list ap) {
  if (fmt) {
    vfprintf(stderr, fmt, ap);
    fputs(": ", stderr);
  }
  perror(NULL);
  exit(1);
}


x86 assembly (clang, -O0):
<vfailf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1184 <vfailf+0x44>
mov    0x2e7f(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1050 <vfprintf@plt>
mov    0x2e6a(%rip),%rax
mov    (%rax),%esi
lea    0xe81(%rip),%rdi
call   1030 <fputs@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<vfailf>:
push   %rbx
test   %rdi,%rdi
je     1167 <vfailf+0x27>
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2e8e(%rip),%rbx
mov    (%rbx),%edi
call   1050 <vfprintf@plt>
mov    (%rbx),%esi
lea    0xe9e(%rip),%rdi
call   1030 <fputs@plt>
xor    %edi,%edi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [3 x i8] c": \00"
define void @vfailf(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* @stderr
%9 = load i8*, i8** %3
%10 = load i32, i32* %4
%11 = call i32 @vfprintf(i32 %8, i8* %9, i32 %10)
%12 = load i32, i32* @stderr
%13 = call i32 @fputs(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %12)
br label %14
14: ; preds = %7, %2
%15 = call i32 @perror(i32* null)
%16 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [3 x i8] c": \00"
define void @vfailf(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = tail call i32 @vfprintf(i32 %5, i8* %0, i32 %1)
%7 = load i32, i32* @stderr
%8 = tail call i32 @fputs(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %7)
br label %9
9: ; preds = %4, %2
%10 = tail call i32 @perror(i32* null)
%11 = tail call i32 @exit(i32 1)
unreachable
}
__attribute((always_)) g(int *a, int *b) {}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
ret

LLVM IR (-O0):
define i32 @g(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @g(i32* nocapture readnone %0, i32* nocapture readnone %1) {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ hexbuf;

/* Variables and functions */
char const *bytes_to_base16hex(char *, int, int /*<<< orphan*/ const *, int);
const char *str_id(const uint8_t id[]) {
  static char hexbuf[(2 * 20) + 1];
  return bytes_to_base16hex(hexbuf, sizeof(hexbuf), id, 20);
}


x86 assembly (clang, -O0):
<str_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0x2f19(%rip),%rdi
mov    $0x29,%esi
mov    $0x14,%ecx
call   1030 <bytes_to_base16hex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_id>:
mov    %rdi,%rdx
lea    0x2f26(%rip),%rdi
mov    $0x29,%esi
mov    $0x14,%ecx
jmp    1030 <bytes_to_base16hex@plt>

LLVM IR (-O0):
@str_id.hexbuf = internal global [41 x i8] zeroinitializer
define i8* @str_id(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i8* @bytes_to_base16hex(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @str_id.hexbuf, i64 0, i64 0), i32 41, i32* %3, i32 20)
ret i8* %4
}

LLVM IR (-O2):
@str_id.hexbuf = internal global [41 x i8] zeroinitializer
define i8* @str_id(i32* %0) {
%2 = tail call i8* @bytes_to_base16hex(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @str_id.hexbuf, i64 0, i64 0), i32 41, i32* %0, i32 20)
ret i8* %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ _UARTBaseValid(int);
bool UARTSpaceAvail(uint32_t ui32Base) {
  ASSERT(_UARTBaseValid(ui32Base));
  return (((*((volatile uint32_t *)(ui32Base + 0x00000018))) & 0x00000020)
              ? false
              : true);
}


x86 assembly (clang, -O0):
<UARTSpaceAvail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x18,%eax
cltq
mov    (%rax),%edx
and    $0x20,%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTSpaceAvail>:
push   %rbx
mov    %edi,%ebx
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
movslq %ebx,%rcx
xor    %eax,%eax
testl  $0x20,0x18(%rcx)
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @UARTSpaceAvail(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_UARTBaseValid(i32 %3)
%5 = call i32 @ASSERT(i32 %4)
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 24
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = and i32 %10, 32
%12 = icmp ne i32 %11, 0
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 0, i32 1
ret i32 %14
}

LLVM IR (-O2):
define i32 @UARTSpaceAvail(i32 %0) {
%2 = tail call i32 @_UARTBaseValid(i32 %0)
%3 = tail call i32 @ASSERT(i32 %2)
%4 = add nsw i32 %0, 24
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = lshr i32 %7, 5
%9 = and i32 %8, 1
%10 = xor i32 %9, 1
ret i32 %10
}
int getchar(void) {}


x86 assembly (clang, -O0):
<getchar>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getchar>:
ret

LLVM IR (-O0):
define i32 @getchar() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @getchar() {
ret i32 undef
}
int isleap(int year) {
  return ((year % 4 == 0) && (year % 100 != 0)) || (year % 400 == 0);
}


x86 assembly (clang, -O0):
<isleap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1134 <isleap+0x34>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
jne    1148 <isleap+0x48>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isleap>:
test   $0x3,%dil
jne    112c <isleap+0x2c>
movslq %edi,%rax
imul   $0x51eb851f,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x25,%rax
add    %ecx,%eax
imul   $0x64,%eax,%ecx
mov    %edi,%edx
mov    $0x1,%eax
sub    %ecx,%edx
je     112c <isleap+0x2c>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
ror    $0x4,%ecx
xor    %eax,%eax
cmp    $0xa3d70b,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @isleap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 4
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 100
%9 = icmp ne i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %6, %1
%11 = load i32, i32* %2
%12 = srem i32 %11, 400
%13 = icmp eq i32 %12, 0
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ true, %6 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @isleap(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp ne i32 %2, 0
%4 = srem i32 %0, 100
%5 = icmp eq i32 %4, 0
%6 = or i1 %3, %5
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = srem i32 %0, 400
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %1, %7
%12 = phi i32 [ %10, %7 ], [ 1, %1 ]
ret i32 %12
}
int do_f_scroll(cnt)
long cnt;
{ (void)scrollf(scro_size((unsigned)cnt), 1); }


x86 assembly (clang, -O0):
<do_f_scroll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%edi
mov    $0x0,%al
call   1040 <scro_size@plt>
mov    %eax,%edi
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <scrollf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_f_scroll>:
push   %rax
xor    %eax,%eax
call   1040 <scro_size@plt>
mov    %eax,%edi
mov    $0x1,%esi
xor    %eax,%eax
pop    %rcx
jmp    1030 <scrollf@plt>

LLVM IR (-O0):
define i32 @do_f_scroll(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = trunc i64 %4 to i32
%6 = call i32 (i32, ...) bitcast (i32 (...)* @scro_size to i32 (i32, ...)*)(i32 %5)
%7 = call i32 (i32, i32, ...) bitcast (i32 (...)* @scrollf to i32 (i32, i32, ...)*)(i32 %6, i32 1)
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @do_f_scroll(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 (i32, ...) bitcast (i32 (...)* @scro_size to i32 (i32, ...)*)(i32 %2)
%4 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @scrollf to i32 (i32, i32, ...)*)(i32 %3, i32 1)
ret i32 undef
}
/* Variables and functions */
int EXIT_SUCCESS;
int LINES;
int /*<<< orphan*/ addstr(char *);
int /*<<< orphan*/ clear();
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ getch();
int /*<<< orphan*/ initscr();
int /*<<< orphan*/ move(int, int);
int /*<<< orphan*/ refresh();
int main(void) {
  initscr();
  clear();
  move(10, 20);
  addstr("Hello, world");
  move(LINES - 1, 0);
  refresh();
  getch();
  endwin();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <initscr@plt>
mov    $0x0,%al
call   1080 <clear@plt>
mov    $0xa,%edi
mov    $0x14,%esi
call   1090 <move@plt>
lea    0xe5d(%rip),%rdi
call   1070 <addstr@plt>
mov    0x2e39(%rip),%rax
mov    (%rax),%edi
sub    $0x1,%edi
xor    %esi,%esi
call   1090 <move@plt>
mov    $0x0,%al
call   1040 <refresh@plt>
mov    $0x0,%al
call   1050 <getch@plt>
mov    $0x0,%al
call   1060 <endwin@plt>
mov    0x2e01(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <initscr@plt>
xor    %eax,%eax
call   1080 <clear@plt>
mov    $0xa,%edi
mov    $0x14,%esi
call   1090 <move@plt>
lea    0xe6b(%rip),%rdi
call   1070 <addstr@plt>
mov    0x2e47(%rip),%rax
mov    (%rax),%edi
add    $0xffffffff,%edi
xor    %esi,%esi
call   1090 <move@plt>
xor    %eax,%eax
call   1040 <refresh@plt>
xor    %eax,%eax
call   1050 <getch@plt>
xor    %eax,%eax
call   1060 <endwin@plt>
mov    0x2e0f(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello, world\00"
@LINES = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @initscr()
%3 = call i32 (...) @clear()
%4 = call i32 @move(i32 10, i32 20)
%5 = call i32 @addstr(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* @LINES
%7 = sub nsw i32 %6, 1
%8 = call i32 @move(i32 %7, i32 0)
%9 = call i32 (...) @refresh()
%10 = call i32 (...) @getch()
%11 = call i32 (...) @endwin()
%12 = load i32, i32* @EXIT_SUCCESS
ret i32 %12
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello, world\00"
@LINES = global i32 0
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @initscr()
%2 = tail call i32 (...) @clear()
%3 = tail call i32 @move(i32 10, i32 20)
%4 = tail call i32 @addstr(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @LINES
%6 = add nsw i32 %5, -1
%7 = tail call i32 @move(i32 %6, i32 0)
%8 = tail call i32 (...) @refresh()
%9 = tail call i32 (...) @getch()
%10 = tail call i32 (...) @endwin()
%11 = load i32, i32* @EXIT_SUCCESS
ret i32 %11
}
int main() {
  int a, b, c;
  a = 1;
  b = 2;
  c = a + b;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 2, i32* %3
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = add nsw i32 %5, %6
store i32 %7, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void khugepaged_exit(struct mm_struct *mm) {}


x86 assembly (clang, -O0):
<khugepaged_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<khugepaged_exit>:
ret

LLVM IR (-O0):
%struct.mm_struct = type opaque
define void @khugepaged_exit(%struct.mm_struct* %0) {
%2 = alloca %struct.mm_struct*
store %struct.mm_struct* %0, %struct.mm_struct** %2
ret void
}

LLVM IR (-O2):
%struct.mm_struct = type opaque
define void @khugepaged_exit(%struct.mm_struct* nocapture %0) {
ret void
}
/* Variables and functions */
float log10f(float);
float futrts_log10_32(float x) { return log10f(x); }


x86 assembly (clang, -O0):
<futrts_log10_32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <log10f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<futrts_log10_32>:
jmp    1030 <log10f@plt>

LLVM IR (-O0):
define float @futrts_log10_32(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @log10f(float %3)
ret float %4
}

LLVM IR (-O2):
define float @futrts_log10_32(float %0) {
%2 = tail call float @log10f(float %0)
ret float %2
}
/* Variables and functions */
scalar_t__ getppid();
long GETPPID() { return ((long)getppid()); }


x86 assembly (clang, -O0):
<GETPPID>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getppid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GETPPID>:
xor    %eax,%eax
jmp    1030 <getppid@plt>

LLVM IR (-O0):
define i64 @GETPPID() {
%1 = call i64 (...) @getppid()
ret i64 %1
}

LLVM IR (-O2):
define i64 @GETPPID() {
%1 = tail call i64 (...) @getppid()
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ test_stream_decode();
int main(void) {
  test_stream_decode();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_stream_decode@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_stream_decode@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_stream_decode()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_stream_decode()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void json_parser_on_free(void *ctx, void *p) { free(p); }


x86 assembly (clang, -O0):
<json_parser_on_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<json_parser_on_free>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @json_parser_on_free(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @json_parser_on_free(i8* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mktime(struct tm *);
__attribute__((__weak__, __always___)) time_t
softboundcets_mktime(struct tm *tm) {
  return mktime(tm);
}


x86 assembly (clang, -O0):
<softboundcets_mktime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mktime@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_mktime>:
jmp    1030 <mktime@plt>

LLVM IR (-O0):
%struct.tm = type { i32 }
define weak i32 @softboundcets_mktime(%struct.tm* %0) {
%2 = alloca %struct.tm*
store %struct.tm* %0, %struct.tm** %2
%3 = load %struct.tm*, %struct.tm** %2
%4 = call i32 @mktime(%struct.tm* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define weak i32 @softboundcets_mktime(%struct.tm* %0) {
%2 = tail call i32 @mktime(%struct.tm* %0)
ret i32 %2
}
/* Type definitions */
struct flashrom_layout {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct flashrom_layout *const);
struct flashrom_layout *const get_global_layout();
void flashrom_layout_release(struct flashrom_layout *const layout) {
  if (layout == get_global_layout())
    return;
  free(layout);
}


x86 assembly (clang, -O0):
<flashrom_layout_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <get_global_layout@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
jne    1150 <flashrom_layout_release+0x30>
jmp    1159 <flashrom_layout_release+0x39>
mov    -0x8(%rbp),%rdi
call   1040 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flashrom_layout_release>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <get_global_layout@plt>
cmp    %rbx,%rax
je     1139 <flashrom_layout_release+0x19>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <free@plt>
pop    %rbx
ret

LLVM IR (-O0):
%struct.flashrom_layout = type { i32 }
define void @flashrom_layout_release(%struct.flashrom_layout* %0) {
%2 = alloca %struct.flashrom_layout*
store %struct.flashrom_layout* %0, %struct.flashrom_layout** %2
%3 = load %struct.flashrom_layout*, %struct.flashrom_layout** %2
%4 = call %struct.flashrom_layout* (...) @get_global_layout()
%5 = icmp eq %struct.flashrom_layout* %3, %4
br i1 %5, label %6, label %7
6: ; preds = %1
br label %10
7: ; preds = %1
%8 = load %struct.flashrom_layout*, %struct.flashrom_layout** %2
%9 = call i32 @free(%struct.flashrom_layout* %8)
br label %10
10: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
%struct.flashrom_layout = type { i32 }
define void @flashrom_layout_release(%struct.flashrom_layout* %0) {
%2 = tail call %struct.flashrom_layout* (...) @get_global_layout()
%3 = icmp eq %struct.flashrom_layout* %2, %0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @free(%struct.flashrom_layout* %0)
br label %6
6: ; preds = %1, %4
ret void
}
/* Variables and functions */
float log10f(float);
float __ocl_half_log10_float(float src) { return log10f(src); }


x86 assembly (clang, -O0):
<__ocl_half_log10_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <log10f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_half_log10_float>:
jmp    1030 <log10f@plt>

LLVM IR (-O0):
define float @__ocl_half_log10_float(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @log10f(float %3)
ret float %4
}

LLVM IR (-O2):
define float @__ocl_half_log10_float(float %0) {
%2 = tail call float @log10f(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ assert_int_equal(int, unsigned long);
void north_one_test(void **state) {
  assert_int_equal(((0x00000000000000FFul) << 8), 0x000000000000FF00ul);
  assert_int_equal(((0xFF00000000000000ul) << 8), 0ul);
}


x86 assembly (clang, -O0):
<north_one_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xff00,%edi
mov    $0xff00,%esi
call   1030 <assert_int_equal@plt>
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <assert_int_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<north_one_test>:
push   %rax
mov    $0xff00,%esi
mov    $0xff00,%edi
call   1030 <assert_int_equal@plt>
xor    %edi,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <assert_int_equal@plt>

LLVM IR (-O0):
define void @north_one_test(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @assert_int_equal(i32 65280, i64 65280)
%4 = call i32 @assert_int_equal(i32 0, i64 0)
ret void
}

LLVM IR (-O2):
define void @north_one_test(i8** nocapture readnone %0) {
%2 = tail call i32 @assert_int_equal(i32 65280, i64 65280)
%3 = tail call i32 @assert_int_equal(i32 0, i64 0)
ret void
}
int printable(int ch) { return (ch > 0x20) && (ch < 0x7f); }


x86 assembly (clang, -O0):
<printable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1120 <printable+0x20>
cmpl   $0x7f,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<printable>:
add    $0xffffffdf,%edi
xor    %eax,%eax
cmp    $0x5e,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @printable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 32
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 127
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @printable(i32 %0) {
%2 = add i32 %0, -33
%3 = icmp ult i32 %2, 94
%4 = zext i1 %3 to i32
ret i32 %4
}
int send_response(char *buffer, int len) { return 6; }


x86 assembly (clang, -O0):
<send_response>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_response>:
mov    $0x6,%eax
ret

LLVM IR (-O0):
define i32 @send_response(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 6
}

LLVM IR (-O2):
define i32 @send_response(i8* nocapture readnone %0, i32 %1) {
ret i32 6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void usage_sentences(void) {
  printf(
      "Usage:\t%s sentences [options] <path>\n\nDescription:\n\tSegment text "
      "into sentences.\n\nOptions:\n\t-f <field>\tGets text from the given "
      "field (defaults to \"text\").\n\t-o <path>\tSaves output at the given "
      "path.\n\t-z\t\tTreats CR and LF like separators, not spaces.\n",
      "corpus");
}


x86 assembly (clang, -O0):
<usage_sentences>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xfd9(%rip),%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage_sentences>:
lea    0xee9(%rip),%rdi
lea    0xfdd(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [251 x i8] c"Usage:\09%s sentences [options] <path>\0A\0ADescription:\0A\09Segment text into sentences.\0A\0AOptions:\0A\09-f <field>\09Gets text from the given field (defaults to \22text\22).\0A\09-o <path>\09Saves output at the given path.\0A\09-z\09\09Treats CR and LF like separators, not spaces.\0A\00"
@.str.1 = [7 x i8] c"corpus\00"
define void @usage_sentences() {
%1 = call i32 @printf(i8* getelementptr inbounds ([251 x i8], [251 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [251 x i8] c"Usage:\09%s sentences [options] <path>\0A\0ADescription:\0A\09Segment text into sentences.\0A\0AOptions:\0A\09-f <field>\09Gets text from the given field (defaults to \22text\22).\0A\09-o <path>\09Saves output at the given path.\0A\09-z\09\09Treats CR and LF like separators, not spaces.\0A\00"
@.str.1 = [7 x i8] c"corpus\00"
define void @usage_sentences() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([251 x i8], [251 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(unsigned int *, unsigned int, unsigned int);
void clear_lines(unsigned int y, unsigned int n, unsigned int c) {
  memset((unsigned int *)0xa5000000 + y * 640 / 2, c, n * 640 * 2);
}


x86 assembly (clang, -O0):
<clear_lines>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
imul   $0x280,-0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,%eax
mov    $0xa5000000,%edi
shl    $0x2,%rax
add    %rax,%rdi
mov    -0xc(%rbp),%esi
imul   $0x280,-0x8(%rbp),%edx
shl    $0x1,%edx
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_lines>:
shl    $0x7,%edi
lea    (%rdi,%rdi,4),%eax
shr    %eax
mov    $0xa5000000,%ecx
lea    (%rcx,%rax,4),%rdi
shl    $0x8,%esi
lea    (%rsi,%rsi,4),%eax
mov    %edx,%esi
mov    %eax,%edx
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @clear_lines(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = mul i32 %7, 640
%9 = udiv i32 %8, 2
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* inttoptr (i64 2768240640 to i32*), i64 %10
%12 = load i32, i32* %6
%13 = load i32, i32* %5
%14 = mul i32 %13, 640
%15 = mul i32 %14, 2
%16 = call i32 @memset(i32* %11, i32 %12, i32 %15)
ret void
}

LLVM IR (-O2):
define void @clear_lines(i32 %0, i32 %1, i32 %2) {
%4 = mul i32 %0, 640
%5 = lshr exact i32 %4, 1
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i32, i32* inttoptr (i64 2768240640 to i32*), i64 %6
%8 = mul i32 %1, 1280
%9 = tail call i32 @memset(i32* %7, i32 %2, i32 %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void main() { printf("ok\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"ok\0A\00"
define void @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [3 x i8] c"ok\00"
define void @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int dci_format1A_sizeof(int);
scalar_t__ is_ambiguous_size(int);
int tpmi_bits(int);
uint32_t dci_format1B_sizeof(uint32_t nof_prb, uint32_t nof_ports) {
  uint32_t n = dci_format1A_sizeof(nof_prb) - 1 + tpmi_bits(nof_ports) + 1;
  while (is_ambiguous_size(n)) {
    n++;
  }
  return n;
}


x86 assembly (clang, -O0):
<dci_format1B_sizeof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <dci_format1A_sizeof@plt>
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <tpmi_bits@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <is_ambiguous_size@plt>
cmp    $0x0,%rax
je     1181 <dci_format1B_sizeof+0x51>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1161 <dci_format1B_sizeof+0x31>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dci_format1B_sizeof>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
call   1050 <dci_format1A_sizeof@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1040 <tpmi_bits@plt>
mov    %eax,%ebx
add    %ebp,%ebx
nopw   0x0(%rax,%rax,1)
mov    %ebx,%edi
call   1030 <is_ambiguous_size@plt>
add    $0x1,%ebx
test   %rax,%rax
jne    1150 <dci_format1B_sizeof+0x20>
add    $0xffffffff,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @dci_format1B_sizeof(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = call i32 @dci_format1A_sizeof(i32 %6)
%8 = sub nsw i32 %7, 1
%9 = load i32, i32* %4
%10 = call i32 @tpmi_bits(i32 %9)
%11 = add nsw i32 %8, %10
%12 = add nsw i32 %11, 1
store i32 %12, i32* %5
br label %13
13: ; preds = %17, %2
%14 = load i32, i32* %5
%15 = call i64 @is_ambiguous_size(i32 %14)
%16 = icmp ne i64 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %13
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %13
20: ; preds = %13
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @dci_format1B_sizeof(i32 %0, i32 %1) {
%3 = tail call i32 @dci_format1A_sizeof(i32 %0)
%4 = tail call i32 @tpmi_bits(i32 %1)
%5 = add i32 %4, %3
br label %6
6: ; preds = %6, %2
%7 = phi i32 [ %5, %2 ], [ %10, %6 ]
%8 = tail call i64 @is_ambiguous_size(i32 %7)
%9 = icmp eq i64 %8, 0
%10 = add nsw i32 %7, 1
br i1 %9, label %11, label %6
11: ; preds = %6
ret i32 %7
}
void equeue_event_dtor(void *event, void (*dtor)(void *)) {}


x86 assembly (clang, -O0):
<equeue_event_dtor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<equeue_event_dtor>:
ret

LLVM IR (-O0):
define void @equeue_event_dtor(i8* %0, void (i8*)* %1) {
%3 = alloca i8*
%4 = alloca void (i8*)*
store i8* %0, i8** %3
store void (i8*)* %1, void (i8*)** %4
ret void
}

LLVM IR (-O2):
define void @equeue_event_dtor(i8* nocapture %0, void (i8*)* nocapture %1) {
ret void
}
/* Variables and functions */
char *malloc(int);
int rand();
char *realloc(char *, int);
int /*<<< orphan*/ strcpy(char *, char *);
char *fn30() {
  char *result;
  result = malloc(20 + rand() % 20);
  result = realloc(result, 30 + rand() % 20);
  strcpy((char *)result, "fn30");
  return result;
}


x86 assembly (clang, -O0):
<fn30>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1060 <rand@plt>
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1060 <rand@plt>
mov    -0x10(%rbp),%rdi
mov    $0x14,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
add    $0x1e,%esi
call   1050 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xe67(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn30>:
push   %rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%edi
add    $0x14,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1060 <rand@plt>
cltq
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x23,%rcx
add    %edx,%ecx
shl    $0x2,%ecx
lea    (%rcx,%rcx,4),%ecx
neg    %ecx
lea    (%rax,%rcx,1),%esi
add    $0x1e,%esi
mov    %rbx,%rdi
call   1050 <realloc@plt>
mov    %rax,%rbx
lea    0xe4f(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"fn30\00"
define i8* @fn30() {
%1 = alloca i8*
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 20
%4 = add nsw i32 20, %3
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %1
%6 = load i8*, i8** %1
%7 = call i32 (...) @rand()
%8 = srem i32 %7, 20
%9 = add nsw i32 30, %8
%10 = call i8* @realloc(i8* %6, i32 %9)
store i8* %10, i8** %1
%11 = load i8*, i8** %1
%12 = call i32 @strcpy(i8* %11, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%13 = load i8*, i8** %1
ret i8* %13
}

LLVM IR (-O2):
@.str = [5 x i8] c"fn30\00"
define i8* @fn30() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 20
%3 = add nsw i32 %2, 20
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, 20
%7 = add nsw i32 %6, 30
%8 = tail call i8* @realloc(i8* %4, i32 %7)
%9 = tail call i32 @strcpy(i8* %8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i8* %8
}
/* Variables and functions */
unsigned long bswap_32(unsigned long);
unsigned long wimaxll_swap_32(unsigned long x) { return bswap_32(x); }


x86 assembly (clang, -O0):
<wimaxll_swap_32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <bswap_32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wimaxll_swap_32>:
jmp    1030 <bswap_32@plt>

LLVM IR (-O0):
define i64 @wimaxll_swap_32(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @bswap_32(i64 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @wimaxll_swap_32(i64 %0) {
%2 = tail call i64 @bswap_32(i64 %0)
ret i64 %2
}
void task1fn(void) {}


x86 assembly (clang, -O0):
<task1fn>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<task1fn>:
ret

LLVM IR (-O0):
define void @task1fn() {
ret void
}

LLVM IR (-O2):
define void @task1fn() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_primes_upto_n(int);
int main() {
  print_primes_upto_n(40);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x28,%edi
call   1030 <print_primes_upto_n@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x28,%edi
call   1030 <print_primes_upto_n@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @print_primes_upto_n(i32 40)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @print_primes_upto_n(i32 40)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ stdout;
int util_cflush_() {
  fflush(stdout);
  fflush(stderr);
  return 0;
}


x86 assembly (clang, -O0):
<util_cflush_>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
call   1030 <fflush@plt>
mov    0x2eb7(%rip),%rax
mov    (%rax),%edi
call   1030 <fflush@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_cflush_>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
call   1030 <fflush@plt>
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
call   1030 <fflush@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdout = global i32 0
@stderr = global i32 0
define i32 @util_cflush_() {
%1 = load i32, i32* @stdout
%2 = call i32 @fflush(i32 %1)
%3 = load i32, i32* @stderr
%4 = call i32 @fflush(i32 %3)
ret i32 0
}

LLVM IR (-O2):
@stdout = global i32 0
@stderr = global i32 0
define i32 @util_cflush_() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fflush(i32 %1)
%3 = load i32, i32* @stderr
%4 = tail call i32 @fflush(i32 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ system(char *);
void initPwm() {
  printf("InitPwm\n\r");
  system("echo 0 > /sys/class/pwm/pwmchip0/export");
  system("echo 1 > /sys/class/pwm/pwmchip0/export");
  system("echo 20000000 > /sys/class/pwm/pwmchip0/pwm0/period");
  system("echo 20000000 > /sys/class/pwm/pwmchip0/pwm1/period");
}


x86 assembly (clang, -O0):
<initPwm>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <printf@plt>
lea    0xed3(%rip),%rdi
call   1030 <system@plt>
lea    0xeef(%rip),%rdi
call   1030 <system@plt>
lea    0xf0b(%rip),%rdi
call   1030 <system@plt>
lea    0xf33(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initPwm>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xed6(%rip),%rdi
call   1030 <system@plt>
lea    0xef2(%rip),%rdi
call   1030 <system@plt>
lea    0xf0e(%rip),%rdi
call   1030 <system@plt>
lea    0xf36(%rip),%rdi
pop    %rax
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"InitPwm\0A\0D\00"
@.str.1 = [40 x i8] c"echo 0 > /sys/class/pwm/pwmchip0/export\00"
@.str.2 = [40 x i8] c"echo 1 > /sys/class/pwm/pwmchip0/export\00"
@.str.3 = [52 x i8] c"echo 20000000 > /sys/class/pwm/pwmchip0/pwm0/period\00"
@.str.4 = [52 x i8] c"echo 20000000 > /sys/class/pwm/pwmchip0/pwm1/period\00"
define void @initPwm() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @system(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @system(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @system(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @system(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"InitPwm\0A\0D\00"
@.str.1 = [40 x i8] c"echo 0 > /sys/class/pwm/pwmchip0/export\00"
@.str.2 = [40 x i8] c"echo 1 > /sys/class/pwm/pwmchip0/export\00"
@.str.3 = [52 x i8] c"echo 20000000 > /sys/class/pwm/pwmchip0/pwm0/period\00"
@.str.4 = [52 x i8] c"echo 20000000 > /sys/class/pwm/pwmchip0/pwm1/period\00"
define void @initPwm() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @system(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @system(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.3, i64 0, i64 0))
%5 = tail call i32 @system(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.4, i64 0, i64 0))
ret void
}
void gdk_pointer_ungrab() {}


x86 assembly (clang, -O0):
<gdk_pointer_ungrab>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_pointer_ungrab>:
ret

LLVM IR (-O0):
define void @gdk_pointer_ungrab() {
ret void
}

LLVM IR (-O2):
define void @gdk_pointer_ungrab() {
ret void
}
/* Variables and functions */
int random();
bool hits(unsigned int chance) { return (random() % 100) < chance; }


x86 assembly (clang, -O0):
<hits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <random@plt>
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    -0x4(%rbp),%edx
setb   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hits>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <random@plt>
movslq %eax,%rcx
imul   $0x51eb851f,%rcx,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x25,%rax
add    %edx,%eax
imul   $0x64,%eax,%eax
sub    %eax,%ecx
xor    %eax,%eax
cmp    %ebx,%ecx
setb   %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @hits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @random()
%4 = srem i32 %3, 100
%5 = load i32, i32* %2
%6 = icmp ult i32 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @hits(i32 %0) {
%2 = tail call i32 (...) @random()
%3 = srem i32 %2, 100
%4 = icmp ult i32 %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ asmerr(int);
int chk_v1(int i) {
  if (i >= -255 && i <= 255)
    return (i);
  else {
    asmerr(5);
    return (0);
  }
}


x86 assembly (clang, -O0):
<chk_v1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0xffffff01,-0x8(%rbp)
jl     1140 <chk_v1+0x30>
cmpl   $0xff,-0x8(%rbp)
jg     1140 <chk_v1+0x30>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1151 <chk_v1+0x41>
mov    $0x5,%edi
call   1030 <asmerr@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chk_v1>:
mov    %edi,%eax
lea    0xff(%rax),%ecx
cmp    $0x1ff,%ecx
jb     1131 <chk_v1+0x21>
push   %rax
mov    $0x5,%edi
call   1030 <asmerr@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @chk_v1(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, -255
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 255
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %13
11: ; preds = %6, %1
%12 = call i32 @asmerr(i32 5)
store i32 0, i32* %2
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @chk_v1(i32 %0) {
%2 = add i32 %0, 255
%3 = icmp ult i32 %2, 511
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @asmerr(i32 5)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 0, %4 ], [ %0, %1 ]
ret i32 %7
}
int gcd(int a, int b) {
  int r;
  r = a % b;
  while (r != 0) {
    a = b;
    b = r;
    r = a % b;
  }
  return b;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1139 <gcd+0x39>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
jmp    1114 <gcd+0x14>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1120 <gcd+0x20>
nopl   0x0(%rax)
mov    %edx,%ecx
mov    %esi,%eax
cltd
idiv   %ecx
mov    %ecx,%esi
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = srem i32 %6, %7
store i32 %8, i32* %5
br label %9
9: ; preds = %12, %2
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %9
%13 = load i32, i32* %4
store i32 %13, i32* %3
%14 = load i32, i32* %5
store i32 %14, i32* %4
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = srem i32 %15, %16
store i32 %17, i32* %5
br label %9
18: ; preds = %9
%19 = load i32, i32* %4
ret i32 %19
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = icmp eq i32 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2, %5
%6 = phi i32 [ %8, %5 ], [ %3, %2 ]
%7 = phi i32 [ %6, %5 ], [ %1, %2 ]
%8 = srem i32 %7, %6
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %5
10: ; preds = %5, %2
%11 = phi i32 [ %1, %2 ], [ %6, %5 ]
ret i32 %11
}