float iir5_c1(float fq) {
  double f, dt1;
  f = fq;
  f += (double).13607;
  dt1 = (double)44.536544420484;
  dt1 += (double)-6.546900527778 / f;
  dt1 += (double)-135.019183000212 * f;
  dt1 += (double)0.298668662095 / (f * f);
  dt1 += (double)185.556866049127 * f * f;
  dt1 += (double)-0.006124743273 / (f * f * f);
  dt1 += (double)-66.083966540342 * f * f * f;
  dt1 += (double)-56.694842234911 * f * f * f * f;
  return (float)dt1;
}


x86 assembly (clang, -O0):
<iir5_c1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xf21(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xf07(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xef2(%rip),%xmm0
divsd  -0x10(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
movsd  0xec9(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
movsd  0xea2(%rip),%xmm0
divsd  %xmm1,%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xe84(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  -0x18(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
movsd  0xe49(%rip),%xmm0
divsd  %xmm1,%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xe2b(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  -0x18(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xdfa(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  -0x18(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<iir5_c1>:
cvtss2sd %xmm0,%xmm0
addsd  0xef4(%rip),%xmm0
movsd  0xef4(%rip),%xmm1
divsd  %xmm0,%xmm1
addsd  0xef0(%rip),%xmm1
movsd  0xef0(%rip),%xmm2
mulsd  %xmm0,%xmm2
addsd  %xmm1,%xmm2
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
movsd  0xee0(%rip),%xmm3
divsd  %xmm1,%xmm3
addsd  %xmm2,%xmm3
movsd  0xed8(%rip),%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
addsd  %xmm3,%xmm2
mulsd  %xmm0,%xmm1
movsd  0xec8(%rip),%xmm3
divsd  %xmm1,%xmm3
addsd  %xmm2,%xmm3
movsd  0xec0(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
addsd  %xmm3,%xmm1
movsd  0xeb0(%rip),%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
mulsd  %xmm0,%xmm2
addsd  %xmm1,%xmm2
xorps  %xmm0,%xmm0
cvtsd2ss %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @iir5_c1(float %0) {
%2 = alloca float
%3 = alloca double
%4 = alloca double
store float %0, float* %2
%5 = load float, float* %2
%6 = fpext float %5 to double
store double %6, double* %3
%7 = load double, double* %3
%8 = fadd double %7, 1.360700e-01
store double %8, double* %3
store double 0x404644AD7CD16A3F, double* %4
%9 = load double, double* %3
%10 = fdiv double 0xC01A3006B123E2F8, %9
%11 = load double, double* %4
%12 = fadd double %11, %10
store double %12, double* %4
%13 = load double, double* %3
%14 = load double, double* %4
%15 = call double @llvm.fmuladd.f64(double 0xC060E09D25AAD197, double %13, double %14)
store double %15, double* %4
%16 = load double, double* %3
%17 = load double, double* %3
%18 = fmul double %16, %17
%19 = fdiv double 0x3FD31D632A02703A, %18
%20 = load double, double* %4
%21 = fadd double %20, %19
store double %21, double* %4
%22 = load double, double* %3
%23 = fmul double 0x406731D1D8BFA81A, %22
%24 = load double, double* %3
%25 = load double, double* %4
%26 = call double @llvm.fmuladd.f64(double %23, double %24, double %25)
store double %26, double* %4
%27 = load double, double* %3
%28 = load double, double* %3
%29 = fmul double %27, %28
%30 = load double, double* %3
%31 = fmul double %29, %30
%32 = fdiv double 0xBF79164240DCE6C1, %31
%33 = load double, double* %4
%34 = fadd double %33, %32
store double %34, double* %4
%35 = load double, double* %3
%36 = fmul double 0xC050855FB5322E8A, %35
%37 = load double, double* %3
%38 = fmul double %36, %37
%39 = load double, double* %3
%40 = load double, double* %4
%41 = call double @llvm.fmuladd.f64(double %38, double %39, double %40)
store double %41, double* %4
%42 = load double, double* %3
%43 = fmul double 0xC04C58F097216941, %42
%44 = load double, double* %3
%45 = fmul double %43, %44
%46 = load double, double* %3
%47 = fmul double %45, %46
%48 = load double, double* %3
%49 = load double, double* %4
%50 = call double @llvm.fmuladd.f64(double %47, double %48, double %49)
store double %50, double* %4
%51 = load double, double* %4
%52 = fptrunc double %51 to float
ret float %52
}

LLVM IR (-O2):
define float @iir5_c1(float %0) {
%2 = fpext float %0 to double
%3 = fadd double %2, 1.360700e-01
%4 = fdiv double 0x401A3006B123E2F8, %3
%5 = fsub double 0x404644AD7CD16A3F, %4
%6 = tail call double @llvm.fmuladd.f64(double %3, double 0xC060E09D25AAD197, double %5)
%7 = fmul double %3, %3
%8 = fdiv double 0x3FD31D632A02703A, %7
%9 = fadd double %8, %6
%10 = fmul double %3, 0x406731D1D8BFA81A
%11 = tail call double @llvm.fmuladd.f64(double %10, double %3, double %9)
%12 = fmul double %3, %7
%13 = fdiv double 0x3F79164240DCE6C1, %12
%14 = fsub double %11, %13
%15 = fmul double %3, 0xC050855FB5322E8A
%16 = fmul double %3, %15
%17 = tail call double @llvm.fmuladd.f64(double %16, double %3, double %14)
%18 = fmul double %3, 0xC04C58F097216941
%19 = fmul double %3, %18
%20 = fmul double %3, %19
%21 = tail call double @llvm.fmuladd.f64(double %20, double %3, double %17)
%22 = fptrunc double %21 to float
ret float %22
}