#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
double sqrt(double);
double find_gradient_h(double *gradient) {
  int i;
  double magnitude = 0.0;
  gradient[0] = 1.0;
  gradient[1] = -5.0;
  for (i = 0; i < 2; i++)
    magnitude += gradient[i] * gradient[i];
  magnitude = sqrt(magnitude);
  for (i = 0; i < 2; i++)
    gradient[i] /= magnitude;
  return magnitude;
}


x86 assembly (clang, -O0):
<find_gradient_h>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xed8(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movsd  0xec0(%rip),%xmm0
movsd  %xmm0,0x8(%rax)
movl   $0x0,-0xc(%rbp)
cmpl   $0x2,-0xc(%rbp)
jge    1190 <find_gradient_h+0x80>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm2
movsd  -0x18(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    114c <find_gradient_h+0x3c>
movsd  -0x18(%rbp),%xmm0
call   1030 <sqrt@plt>
movsd  %xmm0,-0x18(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x2,-0xc(%rbp)
jge    11d9 <find_gradient_h+0xc9>
movsd  -0x18(%rbp),%xmm1
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    11a6 <find_gradient_h+0x96>
movsd  -0x18(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_gradient_h>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
movsd  0xefe(%rip),%xmm0
ret

LLVM IR (-O0):
define double @find_gradient_h(double* %0) {
%2 = alloca double*
%3 = alloca i32
%4 = alloca double
store double* %0, double** %2
store double 0.000000e+00, double* %4
%5 = load double*, double** %2
%6 = getelementptr inbounds double, double* %5, i64 0
store double 1.000000e+00, double* %6
%7 = load double*, double** %2
%8 = getelementptr inbounds double, double* %7, i64 1
store double -5.000000e+00, double* %8
store i32 0, i32* %3
br label %9
9: ; preds = %25, %1
%10 = load i32, i32* %3
%11 = icmp slt i32 %10, 2
br i1 %11, label %12, label %28
12: ; preds = %9
%13 = load double*, double** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds double, double* %13, i64 %15
%17 = load double, double* %16
%18 = load double*, double** %2
%19 = load i32, i32* %3
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds double, double* %18, i64 %20
%22 = load double, double* %21
%23 = load double, double* %4
%24 = call double @llvm.fmuladd.f64(double %17, double %22, double %23)
store double %24, double* %4
br label %25
25: ; preds = %12
%26 = load i32, i32* %3
%27 = add nsw i32 %26, 1
store i32 %27, i32* %3
br label %9
28: ; preds = %9
%29 = load double, double* %4
%30 = call double @sqrt(double %29)
store double %30, double* %4
store i32 0, i32* %3
br label %31
31: ; preds = %42, %28
%32 = load i32, i32* %3
%33 = icmp slt i32 %32, 2
br i1 %33, label %34, label %45
34: ; preds = %31
%35 = load double, double* %4
%36 = load double*, double** %2
%37 = load i32, i32* %3
%38 = sext i32 %37 to i64
%39 = getelementptr inbounds double, double* %36, i64 %38
%40 = load double, double* %39
%41 = fdiv double %40, %35
store double %41, double* %39
br label %42
42: ; preds = %34
%43 = load i32, i32* %3
%44 = add nsw i32 %43, 1
store i32 %44, i32* %3
br label %31
45: ; preds = %31
%46 = load double, double* %4
ret double %46
}

LLVM IR (-O2):
define double @find_gradient_h(double* nocapture %0) {
%2 = bitcast double* %0 to <2 x double>*
store <2 x double> <double 0x3FC91A556151761C, double 0xBFEF60EAB9A5D3A3>, <2 x double>* %2
ret double 0x401465655F122FF6
}