xunge/DecIR huggingface dataset:
int num_of_entries(const char *entries[]) {
  int num_entries;
  for (num_entries = 0; entries[num_entries]; num_entries++)
    ;
  return num_entries;
}


x86 assembly (clang, -O0):
<num_of_entries>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1135 <num_of_entries+0x35>
jmp    1127 <num_of_entries+0x27>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <num_of_entries+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_of_entries>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpq   $0x0,(%rdi)
lea    0x8(%rdi),%rdi
jne    1110 <num_of_entries+0x10>
ret

LLVM IR (-O0):
define i32 @num_of_entries(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %4
br label %12
12: ; preds = %11
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @num_of_entries(i8** nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
%6 = icmp eq i8* %5, null
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
void av_packet_clone() {}


x86 assembly (clang, -O0):
<av_packet_clone>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_packet_clone>:
ret

LLVM IR (-O0):
define void @av_packet_clone() {
ret void
}

LLVM IR (-O2):
define void @av_packet_clone() {
ret void
}
/* Type definitions */
struct rnet_message {
  int dummy;
};

/* Variables and functions */
int rnet_message_expand(struct rnet_message **, int);
struct rnet_message *rnet_message_new(void) {
  struct rnet_message *msg = NULL;
  int r;
  r = rnet_message_expand(&msg, 1118);
  if (r)
    return NULL;
  return msg;
}


x86 assembly (clang, -O0):
<rnet_message_new>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x0,-0x10(%rbp)
lea    -0x10(%rbp),%rdi
mov    $0x45e,%esi
call   1030 <rnet_message_expand@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1148 <rnet_message_new+0x38>
movq   $0x0,-0x8(%rbp)
jmp    1150 <rnet_message_new+0x40>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnet_message_new>:
push   %rax
movq   $0x0,(%rsp)
mov    %rsp,%rdi
mov    $0x45e,%esi
call   1030 <rnet_message_expand@plt>
test   %eax,%eax
jne    1130 <rnet_message_new+0x20>
mov    (%rsp),%rax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.rnet_message = type { i32 }
define %struct.rnet_message* @rnet_message_new() {
%1 = alloca %struct.rnet_message*
%2 = alloca %struct.rnet_message*
%3 = alloca i32
store %struct.rnet_message* null, %struct.rnet_message** %2
%4 = call i32 @rnet_message_expand(%struct.rnet_message** %2, i32 1118)
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %0
store %struct.rnet_message* null, %struct.rnet_message** %1
br label %10
8: ; preds = %0
%9 = load %struct.rnet_message*, %struct.rnet_message** %2
store %struct.rnet_message* %9, %struct.rnet_message** %1
br label %10
10: ; preds = %8, %7
%11 = load %struct.rnet_message*, %struct.rnet_message** %1
ret %struct.rnet_message* %11
}

LLVM IR (-O2):
%struct.rnet_message = type { i32 }
define %struct.rnet_message* @rnet_message_new() {
%1 = alloca %struct.rnet_message*
%2 = bitcast %struct.rnet_message** %1 to i8*
store %struct.rnet_message* null, %struct.rnet_message** %1
%3 = call i32 @rnet_message_expand(%struct.rnet_message** %1, i32 1118)
%4 = icmp eq i32 %3, 0
%5 = load %struct.rnet_message*, %struct.rnet_message** %1
%6 = select i1 %4, %struct.rnet_message* %5, %struct.rnet_message* null
ret %struct.rnet_message* %6
}
int pthread_mutex_trylock() { return 0; }


x86 assembly (clang, -O0):
<pthread_mutex_trylock>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_mutex_trylock>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pthread_mutex_trylock() {
ret i32 0
}

LLVM IR (-O2):
define i32 @pthread_mutex_trylock() {
ret i32 0
}
/* Type definitions */
struct tcb {
  int dummy;
};

/* Variables and functions */
int decode_access(struct tcb *, int /*<<< orphan*/);
int sys_access(struct tcb *tcp) { return decode_access(tcp, 0); }


x86 assembly (clang, -O0):
<sys_access>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <decode_access@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_access>:
xor    %esi,%esi
jmp    1030 <decode_access@plt>

LLVM IR (-O0):
%struct.tcb = type { i32 }
define i32 @sys_access(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
%3 = load %struct.tcb*, %struct.tcb** %2
%4 = call i32 @decode_access(%struct.tcb* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.tcb = type { i32 }
define i32 @sys_access(%struct.tcb* %0) {
%2 = tail call i32 @decode_access(%struct.tcb* %0, i32 0)
ret i32 %2
}
/* Type definitions */
struct work_struct {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ drv_lcd_enable(int /*<<< orphan*/);
void resume_work_0(struct work_struct *work) { drv_lcd_enable(0); }


x86 assembly (clang, -O0):
<resume_work_0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <drv_lcd_enable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resume_work_0>:
xor    %edi,%edi
jmp    1030 <drv_lcd_enable@plt>

LLVM IR (-O0):
%struct.work_struct = type { i32 }
define void @resume_work_0(%struct.work_struct* %0) {
%2 = alloca %struct.work_struct*
store %struct.work_struct* %0, %struct.work_struct** %2
%3 = call i32 @drv_lcd_enable(i32 0)
ret void
}

LLVM IR (-O2):
%struct.work_struct = type { i32 }
define void @resume_work_0(%struct.work_struct* nocapture readnone %0) {
%2 = tail call i32 @drv_lcd_enable(i32 0)
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t cycles_to_ns(uint64_t cycles) { return cycles * 1000 / 3500; }


x86 assembly (clang, -O0):
<cycles_to_ns>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%eax
mov    $0xdac,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<cycles_to_ns>:
imul   $0x3e8,%edi,%eax
cltq
imul   $0x2572fb07,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x29,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @cycles_to_ns(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000
%5 = sdiv i32 %4, 3500
ret i32 %5
}

LLVM IR (-O2):
define i32 @cycles_to_ns(i32 %0) {
%2 = mul nsw i32 %0, 1000
%3 = sdiv i32 %2, 3500
ret i32 %3
}
/* Variables and functions */
scalar_t__ ch_is_slash(char);
const char *get_next_slash_or_end(const char *__attribute__((nonnull))
                                  const path) {
  const char *iter = path;
  for (char ch = *(++iter); ch != '\0'; ch = *(++iter)) {
    if (ch_is_slash(ch)) {
      break;
    }
  }
  return iter;
}


x86 assembly (clang, -O0):
<get_next_slash_or_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    0x1(%rax),%al
mov    %al,-0x11(%rbp)
movsbl -0x11(%rbp),%eax
cmp    $0x0,%eax
je     117d <get_next_slash_or_end+0x6d>
movsbl -0x11(%rbp),%edi
call   1030 <ch_is_slash@plt>
cmp    $0x0,%rax
je     115e <get_next_slash_or_end+0x4e>
jmp    117d <get_next_slash_or_end+0x6d>
jmp    1163 <get_next_slash_or_end+0x53>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    0x1(%rax),%al
mov    %al,-0x11(%rbp)
jmp    1139 <get_next_slash_or_end+0x29>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_next_slash_or_end>:
push   %rbx
add    $0x1,%rdi
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rdi,%rbx
movzbl (%rdi),%eax
test   %al,%al
je     113b <get_next_slash_or_end+0x2b>
movsbl %al,%edi
call   1030 <ch_is_slash@plt>
lea    0x1(%rbx),%rdi
test   %rax,%rax
je     1120 <get_next_slash_or_end+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @get_next_slash_or_end(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %3
%8 = load i8, i8* %7
store i8 %8, i8* %4
br label %9
9: ; preds = %19, %1
%10 = load i8, i8* %4
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %23
13: ; preds = %9
%14 = load i8, i8* %4
%15 = call i64 @ch_is_slash(i8 signext %14)
%16 = icmp ne i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %13
br label %23
18: ; preds = %13
br label %19
19: ; preds = %18
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %3
%22 = load i8, i8* %21
store i8 %22, i8* %4
br label %9
23: ; preds = %17, %9
%24 = load i8*, i8** %3
ret i8* %24
}

LLVM IR (-O2):
define i8* @get_next_slash_or_end(i8* %0) {
br label %2
2: ; preds = %7, %1
%3 = phi i8* [ %0, %1 ], [ %4, %7 ]
%4 = getelementptr inbounds i8, i8* %3, i64 1
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = tail call i64 @ch_is_slash(i8 signext %5)
%9 = icmp eq i64 %8, 0
br i1 %9, label %2, label %10
10: ; preds = %7, %2
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ CRYPTO_MEM_CHECK_DISABLE;
int /*<<< orphan*/ CRYPTO_MEM_CHECK_ENABLE;
int /*<<< orphan*/ CRYPTO_mem_ctrl(int /*<<< orphan*/);
scalar_t__ mem_check_on();
int pop_info();
int CRYPTO_mem_debug_pop(void) {
  int ret = 0;
  if (mem_check_on()) {
    CRYPTO_mem_ctrl(CRYPTO_MEM_CHECK_DISABLE);
    ret = pop_info();
    CRYPTO_mem_ctrl(CRYPTO_MEM_CHECK_ENABLE);
  }
  return (ret);
}


x86 assembly (clang, -O0):
<CRYPTO_mem_debug_pop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <mem_check_on@plt>
cmp    $0x0,%rax
je     1176 <CRYPTO_mem_debug_pop+0x46>
mov    0x2e81(%rip),%rax
mov    (%rax),%edi
call   1050 <CRYPTO_mem_ctrl@plt>
mov    $0x0,%al
call   1040 <pop_info@plt>
mov    %eax,-0x4(%rbp)
mov    0x2e79(%rip),%rax
mov    (%rax),%edi
call   1050 <CRYPTO_mem_ctrl@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRYPTO_mem_debug_pop>:
push   %rbx
xor    %eax,%eax
call   1030 <mem_check_on@plt>
test   %rax,%rax
je     1166 <CRYPTO_mem_debug_pop+0x36>
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
call   1050 <CRYPTO_mem_ctrl@plt>
xor    %eax,%eax
call   1040 <pop_info@plt>
mov    %eax,%ebx
mov    0x2e8d(%rip),%rax
mov    (%rax),%edi
call   1050 <CRYPTO_mem_ctrl@plt>
mov    %ebx,%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@CRYPTO_MEM_CHECK_DISABLE = global i32 0
@CRYPTO_MEM_CHECK_ENABLE = global i32 0
define i32 @CRYPTO_mem_debug_pop() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @mem_check_on()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %10
4: ; preds = %0
%5 = load i32, i32* @CRYPTO_MEM_CHECK_DISABLE
%6 = call i32 @CRYPTO_mem_ctrl(i32 %5)
%7 = call i32 (...) @pop_info()
store i32 %7, i32* %1
%8 = load i32, i32* @CRYPTO_MEM_CHECK_ENABLE
%9 = call i32 @CRYPTO_mem_ctrl(i32 %8)
br label %10
10: ; preds = %4, %0
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@CRYPTO_MEM_CHECK_DISABLE = global i32 0
@CRYPTO_MEM_CHECK_ENABLE = global i32 0
define i32 @CRYPTO_mem_debug_pop() {
%1 = tail call i64 (...) @mem_check_on()
%2 = icmp eq i64 %1, 0
br i1 %2, label %9, label %3
3: ; preds = %0
%4 = load i32, i32* @CRYPTO_MEM_CHECK_DISABLE
%5 = tail call i32 @CRYPTO_mem_ctrl(i32 %4)
%6 = tail call i32 (...) @pop_info()
%7 = load i32, i32* @CRYPTO_MEM_CHECK_ENABLE
%8 = tail call i32 @CRYPTO_mem_ctrl(i32 %7)
br label %9
9: ; preds = %3, %0
%10 = phi i32 [ %6, %3 ], [ 0, %0 ]
ret i32 %10
}
/* Type definitions */
struct hashtable {
  int dummy;
};

/* Variables and functions */
int del(struct hashtable *, int, int);
int ht_deli(struct hashtable *ht, int i) { return del(ht, i, 1); }


x86 assembly (clang, -O0):
<ht_deli>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
call   1030 <del@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ht_deli>:
mov    $0x1,%edx
jmp    1030 <del@plt>

LLVM IR (-O0):
%struct.hashtable = type { i32 }
define i32 @ht_deli(%struct.hashtable* %0, i32 %1) {
%3 = alloca %struct.hashtable*
%4 = alloca i32
store %struct.hashtable* %0, %struct.hashtable** %3
store i32 %1, i32* %4
%5 = load %struct.hashtable*, %struct.hashtable** %3
%6 = load i32, i32* %4
%7 = call i32 @del(%struct.hashtable* %5, i32 %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
%struct.hashtable = type { i32 }
define i32 @ht_deli(%struct.hashtable* %0, i32 %1) {
%3 = tail call i32 @del(%struct.hashtable* %0, i32 %1, i32 1)
ret i32 %3
}
/* Variables and functions */
void *__VERIFIER_nondet_pointer();
int main(void) {
  void *ptr;
  ptr = __VERIFIER_nondet_pointer();
  if (!(((unsigned long)ptr) <= 18446744073709547520UL)) {
    if (((unsigned long)ptr > 18446744073709547520UL)) {
      if (((unsigned long)ptr) > 18446744073709547520UL) {
        long res = (long)ptr;
        int status = (int)res;
        if (status == 0) {
        ERROR:
          return 1;
        }
      }
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_pointer@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    $0xfffffffffffff000,%rax
jbe    1193 <main+0x83>
mov    -0x10(%rbp),%rax
cmp    $0xfffffffffffff000,%rax
jbe    118e <main+0x7e>
mov    -0x10(%rbp),%rax
cmp    $0xfffffffffffff000,%rax
jbe    1189 <main+0x79>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jne    1184 <main+0x74>
jmp    1178 <main+0x68>
movl   $0x1,-0x4(%rbp)
jmp    119a <main+0x8a>
jmp    1189 <main+0x79>
jmp    118e <main+0x7e>
jmp    1193 <main+0x83>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_pointer@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i32 0, i32* %1
%5 = call i8* (...) @__VERIFIER_nondet_pointer()
store i8* %5, i8** %2
%6 = load i8*, i8** %2
%7 = ptrtoint i8* %6 to i64
%8 = icmp ule i64 %7, -4096
br i1 %8, label %29, label %9
9: ; preds = %0
%10 = load i8*, i8** %2
%11 = ptrtoint i8* %10 to i64
%12 = icmp ugt i64 %11, -4096
br i1 %12, label %13, label %28
13: ; preds = %9
%14 = load i8*, i8** %2
%15 = ptrtoint i8* %14 to i64
%16 = icmp ugt i64 %15, -4096
br i1 %16, label %17, label %27
17: ; preds = %13
%18 = load i8*, i8** %2
%19 = ptrtoint i8* %18 to i64
store i64 %19, i64* %3
%20 = load i64, i64* %3
%21 = trunc i64 %20 to i32
store i32 %21, i32* %4
%22 = load i32, i32* %4
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %17
br label %25
25: ; preds = %24
store i32 1, i32* %1
br label %30
26: ; preds = %17
br label %27
27: ; preds = %26, %13
br label %28
28: ; preds = %27, %9
br label %29
29: ; preds = %28, %0
store i32 0, i32* %1
br label %30
30: ; preds = %29, %25
%31 = load i32, i32* %1
ret i32 %31
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i8* (...) @__VERIFIER_nondet_pointer()
ret i32 0
}
/* Variables and functions */
int rand();
int GetRandomIntInRange(int min, int max) { return rand() % max + min; }


x86 assembly (clang, -O0):
<GetRandomIntInRange>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetRandomIntInRange>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @GetRandomIntInRange(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
%8 = load i32, i32* %3
%9 = add nsw i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @GetRandomIntInRange(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = srem i32 %3, %1
%5 = add nsw i32 %4, %0
ret i32 %5
}
int main() {
  while (1) {
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
jmp    110b <main+0xb>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int mvscanw(int, int, char *, int *);
int i_mvscanw(int y, int x, char *fmt, int *i) {
  return (mvscanw(y, x, fmt, i));
}


x86 assembly (clang, -O0):
<i_mvscanw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <mvscanw@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_mvscanw>:
jmp    1030 <mvscanw@plt>

LLVM IR (-O0):
define i32 @i_mvscanw(i32 %0, i32 %1, i8* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i8*, i8** %7
%12 = load i32*, i32** %8
%13 = call i32 @mvscanw(i32 %9, i32 %10, i8* %11, i32* %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @i_mvscanw(i32 %0, i32 %1, i8* %2, i32* %3) {
%5 = tail call i32 @mvscanw(i32 %0, i32 %1, i8* %2, i32* %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ foo(int /*<<< orphan*/);
__attribute__((no, noclone)) unsigned long f6(unsigned long x,
                                              unsigned long y) {
  unsigned long r = x - y;
  if (r < x)
    foo(0);
  return r;
}


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    1141 <f6+0x31>
xor    %edi,%edi
call   1030 <foo@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
push   %rbx
mov    %rdi,%rbx
sub    %rsi,%rbx
cmp    %rdi,%rbx
jae    1123 <f6+0x13>
xor    %edi,%edi
call   1030 <foo@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @f6(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = sub i64 %6, %7
store i64 %8, i64* %5
%9 = load i64, i64* %5
%10 = load i64, i64* %3
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 @foo(i32 0)
br label %14
14: ; preds = %12, %2
%15 = load i64, i64* %5
ret i64 %15
}

LLVM IR (-O2):
define i64 @f6(i64 %0, i64 %1) {
%3 = sub i64 %0, %1
%4 = icmp ult i64 %3, %0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @foo(i32 0)
br label %7
7: ; preds = %5, %2
ret i64 %3
}
/* Variables and functions */
double exp(double);
double Tanh(double x) { return (exp(x) - exp(-x)) / (exp(x) + exp(-x)); }


x86 assembly (clang, -O0):
<Tanh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
call   1030 <exp@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
call   1030 <exp@plt>
movsd  -0x18(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x10(%rbp),%xmm0
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Tanh>:
sub    $0x38,%rsp
movaps %xmm0,0x10(%rsp)
call   1030 <exp@plt>
movsd  %xmm0,0x8(%rsp)
movapd 0xed4(%rip),%xmm0
xorpd  0x10(%rsp),%xmm0
movapd %xmm0,0x20(%rsp)
call   1030 <exp@plt>
movsd  0x8(%rsp),%xmm1
subsd  %xmm0,%xmm1
movsd  %xmm1,0x8(%rsp)
movaps 0x10(%rsp),%xmm0
call   1030 <exp@plt>
movsd  %xmm0,0x10(%rsp)
movapd 0x20(%rsp),%xmm0
call   1030 <exp@plt>
addsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x38,%rsp
ret

LLVM IR (-O0):
define double @Tanh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @exp(double %3)
%5 = load double, double* %2
%6 = fneg double %5
%7 = call double @exp(double %6)
%8 = fsub double %4, %7
%9 = load double, double* %2
%10 = call double @exp(double %9)
%11 = load double, double* %2
%12 = fneg double %11
%13 = call double @exp(double %12)
%14 = fadd double %10, %13
%15 = fdiv double %8, %14
ret double %15
}

LLVM IR (-O2):
define double @Tanh(double %0) {
%2 = tail call double @exp(double %0)
%3 = fneg double %0
%4 = tail call double @exp(double %3)
%5 = fsub double %2, %4
%6 = tail call double @exp(double %0)
%7 = tail call double @exp(double %3)
%8 = fadd double %6, %7
%9 = fdiv double %5, %8
ret double %9
}
/* Variables and functions */
char *strstr(char *, char *);
char *trim(char *);
char *cleanLine(char *line) {
  line = trim(line);
  char *comment = strstr(line, "//");
  if (comment != NULL) {
    *comment = '\0';
    line = trim(line);
  }
  return line;
}


x86 assembly (clang, -O0):
<cleanLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <trim@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xebc(%rip),%rsi
call   1040 <strstr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     116c <cleanLine+0x4c>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rdi
call   1030 <trim@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanLine>:
push   %rbx
call   1030 <trim@plt>
mov    %rax,%rbx
lea    0xed0(%rip),%rsi
mov    %rax,%rdi
call   1040 <strstr@plt>
test   %rax,%rax
je     1149 <cleanLine+0x29>
movb   $0x0,(%rax)
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <trim@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"//\00"
define i8* @cleanLine(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @trim(i8* %4)
store i8* %5, i8** %2
%6 = load i8*, i8** %2
%7 = call i8* @strstr(i8* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %14
10: ; preds = %1
%11 = load i8*, i8** %3
store i8 0, i8* %11
%12 = load i8*, i8** %2
%13 = call i8* @trim(i8* %12)
store i8* %13, i8** %2
br label %14
14: ; preds = %10, %1
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
@.str = [3 x i8] c"//\00"
define i8* @cleanLine(i8* %0) {
%2 = tail call i8* @trim(i8* %0)
%3 = tail call i8* @strstr(i8* dereferenceable(1) %2, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
store i8 0, i8* %3
%6 = tail call i8* @trim(i8* %2)
br label %7
7: ; preds = %5, %1
%8 = phi i8* [ %6, %5 ], [ %2, %1 ]
ret i8* %8
}
/* Type definitions */
struct perf_event_attr {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_perf_event_open;
int syscall(int /*<<< orphan*/, struct perf_event_attr *, int /*<<< orphan*/,
            int, int, unsigned long);
__attribute__((weak)) int perf_event_open(struct perf_event_attr *attr,
                                          pid_t pid, int cpu, int group_fd,
                                          unsigned long flags) {
  return syscall(__NR_perf_event_open, attr, pid, cpu, group_fd, flags);
}


x86 assembly (clang, -O0):
<perf_event_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x20(%rbp),%r9
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<perf_event_open>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ebc(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define weak i32 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = alloca %struct.perf_event_attr*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
store %struct.perf_event_attr* %0, %struct.perf_event_attr** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i64 %4, i64* %10
%11 = load i32, i32* @__NR_perf_event_open
%12 = load %struct.perf_event_attr*, %struct.perf_event_attr** %6
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i64, i64* %10
%17 = call i32 @syscall(i32 %11, %struct.perf_event_attr* %12, i32 %13, i32 %14, i32 %15, i64 %16)
ret i32 %17
}

LLVM IR (-O2):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define weak i32 @perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = load i32, i32* @__NR_perf_event_open
%7 = tail call i32 @syscall(i32 %6, %struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  int status;
  status = 0;
  printf("Hello, World!\n");
  return (status);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello, World!\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* %6
ret i32 %8
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello, World!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void usage(char *program_name) {
  printf("Usage : %s <message> <# of times to repeat>.\n", program_name);
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"Usage : %s <message> <# of times to repeat>.\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [46 x i8] c"Usage : %s <message> <# of times to repeat>.\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
const char *Hash_Definition(void) {
  return "struct Hash {\n"
         "  uint64_t (*hash)(var);\n"
         "};\n";
}


x86 assembly (clang, -O0):
<Hash_Definition>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Hash_Definition>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [43 x i8] c"struct Hash {\0A uint64_t (*hash)(var);\0A};\0A\00"
define i8* @Hash_Definition() {
ret i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [43 x i8] c"struct Hash {\0A uint64_t (*hash)(var);\0A};\0A\00"
define i8* @Hash_Definition() {
ret i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0)
}
double glmDotProduct3d(const double v1[3], const double v2[3]) {
  return v1[0] * v2[0] + v1[1] * v2[1] + v1[2] * v2[2];
}


x86 assembly (clang, -O0):
<glmDotProduct3d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmDotProduct3d>:
movsd  0x8(%rdi),%xmm0
mulsd  0x8(%rsi),%xmm0
movsd  (%rdi),%xmm1
mulsd  (%rsi),%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  0x10(%rsi),%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @glmDotProduct3d(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double*, double** %4
%9 = getelementptr inbounds double, double* %8, i64 0
%10 = load double, double* %9
%11 = load double*, double** %3
%12 = getelementptr inbounds double, double* %11, i64 1
%13 = load double, double* %12
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 1
%16 = load double, double* %15
%17 = fmul double %13, %16
%18 = call double @llvm.fmuladd.f64(double %7, double %10, double %17)
%19 = load double*, double** %3
%20 = getelementptr inbounds double, double* %19, i64 2
%21 = load double, double* %20
%22 = load double*, double** %4
%23 = getelementptr inbounds double, double* %22, i64 2
%24 = load double, double* %23
%25 = call double @llvm.fmuladd.f64(double %21, double %24, double %18)
ret double %25
}

LLVM IR (-O2):
define double @glmDotProduct3d(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = getelementptr inbounds double, double* %0, i64 1
%6 = load double, double* %5
%7 = getelementptr inbounds double, double* %1, i64 1
%8 = load double, double* %7
%9 = fmul double %6, %8
%10 = tail call double @llvm.fmuladd.f64(double %3, double %4, double %9)
%11 = getelementptr inbounds double, double* %0, i64 2
%12 = load double, double* %11
%13 = getelementptr inbounds double, double* %1, i64 2
%14 = load double, double* %13
%15 = tail call double @llvm.fmuladd.f64(double %12, double %14, double %10)
ret double %15
}
void swapElements(int *x, int *y) {
  int temp = *x;
  *x = *y;
  *y = temp;
}


x86 assembly (clang, -O0):
<swapElements>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swapElements>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swapElements(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swapElements(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Variables and functions */
scalar_t__ MP_sema(int);
int /*<<< orphan*/ MP_semaset(int, int /*<<< orphan*/);
void MP_p2wait2(void) {
  MP_semaset(2, 0);
  while (MP_sema(2) == 0)
    ;
}


x86 assembly (clang, -O0):
<MP_p2wait2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
xor    %esi,%esi
call   1030 <MP_semaset@plt>
mov    $0x2,%edi
call   1040 <MP_sema@plt>
cmp    $0x0,%rax
jne    1149 <MP_p2wait2+0x29>
jmp    1130 <MP_p2wait2+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MP_p2wait2>:
push   %rax
mov    $0x2,%edi
xor    %esi,%esi
call   1030 <MP_semaset@plt>
nopl   (%rax)
mov    $0x2,%edi
call   1040 <MP_sema@plt>
test   %rax,%rax
je     1130 <MP_p2wait2+0x10>
pop    %rax
ret

LLVM IR (-O0):
define void @MP_p2wait2() {
%1 = call i32 @MP_semaset(i32 2, i32 0)
br label %2
2: ; preds = %5, %0
%3 = call i64 @MP_sema(i32 2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %2
br label %2
6: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @MP_p2wait2() {
%1 = tail call i32 @MP_semaset(i32 2, i32 0)
br label %2
2: ; preds = %2, %0
%3 = tail call i64 @MP_sema(i32 2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %2, label %5
5: ; preds = %2
ret void
}
int test_and_clear_bit(int nr, volatile unsigned long *addr) {
  int oldbit;
  asm volatile("btr %2,%1\n\t"
               "sbb %0,%0"
               : "=r"(oldbit), "+m"(*(volatile long *)(addr))
               : "Ir"(nr)
               : "memory");
  return oldbit;
}


x86 assembly (clang, -O0):
<test_and_clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
btr    %ecx,(%rax)
sbb    %eax,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_and_clear_bit>:
btr    %edi,(%rsi)
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_and_clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = load i32, i32* %3
%8 = call i32 asm sideeffect "btr $2,$1\0A\09sbb $0,$0", "=r,=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %6, i32 %7, i64* elementtype(i64) %6)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_and_clear_bit(i32 %0, i64* %1) {
%3 = tail call i32 asm sideeffect "btr $2,$1\0A\09sbb $0,$0", "=r,=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0, i64* elementtype(i64) %1)
ret i32 %3
}
/* Variables and functions */
int memcmp(void const *, void const *, size_t);
int bcmp(const void *a, const void *b, size_t size) {
  return memcmp(a, b, size);
}


x86 assembly (clang, -O0):
<bcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcmp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcmp>:
jmp    1030 <memcmp@plt>

LLVM IR (-O0):
define i32 @bcmp(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @memcmp(i8* %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @bcmp(i8* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @memcmp(i8* %0, i8* %1, i64 %2)
ret i32 %4
}
void ARGBToRAWRow_AVX2() {}


x86 assembly (clang, -O0):
<ARGBToRAWRow_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToRAWRow_AVX2>:
ret

LLVM IR (-O0):
define void @ARGBToRAWRow_AVX2() {
ret void
}

LLVM IR (-O2):
define void @ARGBToRAWRow_AVX2() {
ret void
}
unsigned long pgoff_to_dr_index(unsigned long pgoff) {
  return (pgoff / (1 << 10));
}


x86 assembly (clang, -O0):
<pgoff_to_dr_index>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0xa,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pgoff_to_dr_index>:
mov    %rdi,%rax
shr    $0xa,%rax
ret

LLVM IR (-O0):
define i64 @pgoff_to_dr_index(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = udiv i64 %3, 1024
ret i64 %4
}

LLVM IR (-O2):
define i64 @pgoff_to_dr_index(i64 %0) {
%2 = lshr i64 %0, 10
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int foo();
int main() {
  int x = -1;
  if (1)
    x = foo();
#pragma omp taskwait
  assert(x == 1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffffff,-0x4(%rbp)
mov    $0x0,%al
call   1040 <foo@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <foo@plt>
xor    %edi,%edi
cmp    $0x1,%eax
sete   %dil
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = call i32 (...) @foo()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 1
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo()
%2 = icmp eq i32 %1, 1
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret i32 0
}
/* Variables and functions */
void ui_set_clip(int x, int y, int cx, int cy) {}


x86 assembly (clang, -O0):
<ui_set_clip>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_set_clip>:
ret

LLVM IR (-O0):
define void @ui_set_clip(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @ui_set_clip(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
/* Variables and functions */
int cdops_send_cmd(int, void *);
int cdops_wait_cmd(int);
int cdops_exec_cmd(int cmd, void *param) {
  int f = cdops_send_cmd(cmd, param);
  return cdops_wait_cmd(f);
}


x86 assembly (clang, -O0):
<cdops_exec_cmd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <cdops_send_cmd@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <cdops_wait_cmd@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cdops_exec_cmd>:
push   %rax
call   1030 <cdops_send_cmd@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <cdops_wait_cmd@plt>

LLVM IR (-O0):
define i32 @cdops_exec_cmd(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = load i8*, i8** %4
%8 = call i32 @cdops_send_cmd(i32 %6, i8* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = call i32 @cdops_wait_cmd(i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @cdops_exec_cmd(i32 %0, i8* %1) {
%3 = tail call i32 @cdops_send_cmd(i32 %0, i8* %1)
%4 = tail call i32 @cdops_wait_cmd(i32 %3)
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ count_styles;
};
typedef TYPE_1__ XIMStyles;

/* Variables and functions */
unsigned short get_XIMStyles_count_styles(void *_p) {
  return (unsigned short)((XIMStyles *)_p)->count_styles;
}


x86 assembly (clang, -O0):
<get_XIMStyles_count_styles>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XIMStyles_count_styles>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define zeroext i16 @get_XIMStyles_count_styles(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i16
ret i16 %7
}

LLVM IR (-O2):
define zeroext i16 @get_XIMStyles_count_styles(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i16
ret i16 %4
}
/* Variables and functions */
int count_cb(const void *match, const void *key, size_t keylen, void *result) {
  long *ctr = (long *)result;
  (void)keylen;
  (void)key;
  (void)match;
  ++*ctr;
  return 0;
}


x86 assembly (clang, -O0):
<count_cb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_cb>:
addq   $0x1,(%rcx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @count_cb(i8* %0, i8* %1, i64 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i64*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i8* %3, i8** %8
%10 = load i8*, i8** %8
%11 = bitcast i8* %10 to i64*
store i64* %11, i64** %9
%12 = load i64, i64* %7
%13 = load i8*, i8** %6
%14 = load i8*, i8** %5
%15 = load i64*, i64** %9
%16 = load i64, i64* %15
%17 = add nsw i64 %16, 1
store i64 %17, i64* %15
ret i32 0
}

LLVM IR (-O2):
define i32 @count_cb(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2, i8* nocapture %3) {
%5 = bitcast i8* %3 to i64*
%6 = load i64, i64* %5
%7 = add nsw i64 %6, 1
store i64 %7, i64* %5
ret i32 0
}
int iHxFaceVerifyHolderId(int iBypassFlag, unsigned char *pszPrompt,
                          unsigned char *pszPromptIdType,
                          unsigned char *pszIdType,
                          unsigned char *pszPromptIdNo, unsigned char *pszIdNo,
                          unsigned char *pszLanguage) {
  return (5);
}


x86 assembly (clang, -O0):
<iHxFaceVerifyHolderId>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%rax
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iHxFaceVerifyHolderId>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @iHxFaceVerifyHolderId(i32 %0, i8* %1, i8* %2, i8* %3, i8* %4, i8* %5, i8* %6) {
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i8*
%12 = alloca i8*
%13 = alloca i8*
%14 = alloca i8*
store i32 %0, i32* %8
store i8* %1, i8** %9
store i8* %2, i8** %10
store i8* %3, i8** %11
store i8* %4, i8** %12
store i8* %5, i8** %13
store i8* %6, i8** %14
ret i32 5
}

LLVM IR (-O2):
define i32 @iHxFaceVerifyHolderId(i32 %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3, i8* nocapture readnone %4, i8* nocapture readnone %5, i8* nocapture readnone %6) {
ret i32 5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) { printf("Hello, world\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello, world\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"Hello, world\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
long __ocml_rint_f64(double);
long int lrint(double x) { return __ocml_rint_f64(x); }


x86 assembly (clang, -O0):
<lrint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__ocml_rint_f64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lrint>:
jmp    1030 <__ocml_rint_f64@plt>

LLVM IR (-O0):
define i64 @lrint(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @__ocml_rint_f64(double %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @lrint(double %0) {
%2 = tail call i64 @__ocml_rint_f64(double %0)
ret i64 %2
}
void ff_hevc_put_hevc_bi_w_qpel_h8_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_qpel_h8_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_qpel_h8_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_qpel_h8_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_qpel_h8_10_sse4() {
ret void
}