xunge/DecIR huggingface dataset:
void mat_identity(float mat[16]) {
  int i;
  for (i = 0; i < 16; i++) {
    if ((i % 5) == 0) {
      mat[i] = 1.0f;
    } else {
      mat[i] = 0.0f;
    }
  }
}


x86 assembly (clang, -O0):
<mat_identity>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x10,-0xc(%rbp)
jge    116a <mat_identity+0x6a>
mov    -0xc(%rbp),%eax
mov    $0x5,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1147 <mat_identity+0x47>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movss  0xec3(%rip),%xmm0
movss  %xmm0,(%rax,%rcx,4)
jmp    1157 <mat_identity+0x57>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
xorps  %xmm0,%xmm0
movss  %xmm0,(%rax,%rcx,4)
jmp    115c <mat_identity+0x5c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <mat_identity+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat_identity>:
movss  0xef8(%rip),%xmm0
movups %xmm0,(%rdi)
movaps 0xefe(%rip),%xmm0
movups %xmm0,0x10(%rdi)
movaps 0xf03(%rip),%xmm0
movups %xmm0,0x20(%rdi)
movaps 0xf08(%rip),%xmm0
movups %xmm0,0x30(%rdi)
ret

LLVM IR (-O0):
define void @mat_identity(float* %0) {
%2 = alloca float*
%3 = alloca i32
store float* %0, float** %2
store i32 0, i32* %3
br label %4
4: ; preds = %22, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 16
br i1 %6, label %7, label %25
7: ; preds = %4
%8 = load i32, i32* %3
%9 = srem i32 %8, 5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load float*, float** %2
%13 = load i32, i32* %3
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds float, float* %12, i64 %14
store float 1.000000e+00, float* %15
br label %21
16: ; preds = %7
%17 = load float*, float** %2
%18 = load i32, i32* %3
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds float, float* %17, i64 %19
store float 0.000000e+00, float* %20
br label %21
21: ; preds = %16, %11
br label %22
22: ; preds = %21
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
br label %4
25: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @mat_identity(float* nocapture writeonly %0) {
%2 = bitcast float* %0 to <4 x float>*
store <4 x float> <float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, <4 x float>* %2
%3 = getelementptr inbounds float, float* %0, i64 4
%4 = bitcast float* %3 to <4 x float>*
store <4 x float> <float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00>, <4 x float>* %4
%5 = getelementptr inbounds float, float* %0, i64 8
%6 = bitcast float* %5 to <4 x float>*
store <4 x float> <float 0.000000e+00, float 0.000000e+00, float 1.000000e+00, float 0.000000e+00>, <4 x float>* %6
%7 = getelementptr inbounds float, float* %0, i64 12
%8 = bitcast float* %7 to <4 x float>*
store <4 x float> <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, <4 x float>* %8
ret void
}
extern void insw(unsigned short port, void *addr, unsigned long count) {
  __asm__ __volatile__("cld ; rep ; ins"
                       "w"
                       : "=D"(addr), "=c"(count)
                       : "d"(port), "0"(addr), "1"(count));
}


x86 assembly (clang, -O0):
<insw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rcx
cld
rep insw (%dx),%es:(%rdi)
mov    %rdi,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insw>:
mov    %rdx,%rcx
mov    %edi,%edx
mov    %rsi,%rdi
cld
rep insw (%dx),%es:(%rdi)
ret

LLVM IR (-O0):
define void @insw(i16 zeroext %0, i8* %1, i64 %2) {
%4 = alloca i16
%5 = alloca i8*
%6 = alloca i64
store i16 %0, i16* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i16, i16* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call { i8*, i64 } asm sideeffect "cld ; rep ; insw", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i16 %7, i8* %8, i64 %9)
%11 = extractvalue { i8*, i64 } %10, 0
%12 = extractvalue { i8*, i64 } %10, 1
store i8* %11, i8** %5
store i64 %12, i64* %6
ret void
}

LLVM IR (-O2):
define void @insw(i16 zeroext %0, i8* %1, i64 %2) {
%4 = tail call { i8*, i64 } asm sideeffect "cld ; rep ; insw", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i16 %0, i8* %1, i64 %2)
ret void
}
int check_prime(int num) {
  int i;
  for (i = 2; i < num; i++) {
    if (num % i == 0)
      return (0);
  }
  return num;
}


x86 assembly (clang, -O0):
<check_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1149 <check_prime+0x49>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    1136 <check_prime+0x36>
movl   $0x0,-0x4(%rbp)
jmp    114f <check_prime+0x4f>
jmp    113b <check_prime+0x3b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110e <check_prime+0xe>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_prime>:
cmp    $0x3,%edi
jl     1120 <check_prime+0x20>
mov    $0x2,%ecx
nopw   0x0(%rax,%rax,1)
mov    %edi,%eax
cltd
idiv   %ecx
test   %edx,%edx
je     1123 <check_prime+0x23>
add    $0x1,%ecx
cmp    %ecx,%edi
jne    1110 <check_prime+0x10>
mov    %edi,%eax
ret
xor    %edi,%edi
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @check_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 2, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %19
9: ; preds = %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = srem i32 %10, %11
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 0, i32* %2
br label %21
15: ; preds = %9
br label %16
16: ; preds = %15
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %5
19: ; preds = %5
%20 = load i32, i32* %3
store i32 %20, i32* %2
br label %21
21: ; preds = %19, %14
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @check_prime(i32 %0) {
%2 = icmp sgt i32 %0, 2
br i1 %2, label %5, label %10
3: ; preds = %5
%4 = icmp eq i32 %9, %0
br i1 %4, label %10, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ 2, %1 ]
%7 = srem i32 %0, %6
%8 = icmp eq i32 %7, 0
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %3
10: ; preds = %5, %3, %1
%11 = phi i32 [ %0, %1 ], [ %0, %3 ], [ 0, %5 ]
ret i32 %11
}
void MYMODULE(void) {}


x86 assembly (clang, -O0):
<MYMODULE>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MYMODULE>:
ret

LLVM IR (-O0):
define void @MYMODULE() {
ret void
}

LLVM IR (-O2):
define void @MYMODULE() {
ret void
}
/* Type definitions */
typedef union Object {
  int dummy;
} Object;

/* Variables and functions */
int /*<<< orphan*/ free(union Object *);
void hilbert_var_free(union Object *var) { free(var); }


x86 assembly (clang, -O0):
<hilbert_var_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hilbert_var_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%union.Object = type { i32 }
define void @hilbert_var_free(%union.Object* %0) {
%2 = alloca %union.Object*
store %union.Object* %0, %union.Object** %2
%3 = load %union.Object*, %union.Object** %2
%4 = call i32 @free(%union.Object* %3)
ret void
}

LLVM IR (-O2):
%union.Object = type { i32 }
define void @hilbert_var_free(%union.Object* nocapture %0) {
%2 = tail call i32 @free(%union.Object* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WNOHANG;
scalar_t__ waitpid(int, int /*<<< orphan*/ *, int /*<<< orphan*/);
void hand_handle_child(int sig) {
  while (waitpid(-1, NULL, WNOHANG) > 0)
    ;
}


x86 assembly (clang, -O0):
<hand_handle_child>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <waitpid@plt>
cmp    $0x0,%rax
jle    1141 <hand_handle_child+0x31>
jmp    111b <hand_handle_child+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hand_handle_child>:
push   %rbx
mov    0x2ed0(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    (%rbx),%edx
mov    $0xffffffff,%edi
xor    %esi,%esi
call   1030 <waitpid@plt>
test   %rax,%rax
jg     1120 <hand_handle_child+0x10>
pop    %rbx
ret

LLVM IR (-O0):
@WNOHANG = global i32 0
define void @hand_handle_child(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* @WNOHANG
%5 = call i64 @waitpid(i32 -1, i32* null, i32 %4)
%6 = icmp sgt i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
ret void
}

LLVM IR (-O2):
@WNOHANG = global i32 0
define void @hand_handle_child(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load i32, i32* @WNOHANG
%4 = tail call i64 @waitpid(i32 -1, i32* null, i32 %3)
%5 = icmp sgt i64 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
ret void
}
void ff_hevc_put_hevc_uni_qpel_hv4_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_qpel_hv4_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_qpel_hv4_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_qpel_hv4_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_qpel_hv4_12_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char **argv) { printf("%s\n", "hai world!"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
lea    0xed7(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xee5(%rip),%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [11 x i8] c"hai world!\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [11 x i8] c"hai world!\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct ifpga_port_hw {
  int dummy;
};

/* Variables and functions */
int __fpga_port_disable(struct ifpga_port_hw *);
int /*<<< orphan*/ __fpga_port_enable(struct ifpga_port_hw *);
int __fpga_port_reset(struct ifpga_port_hw *port) {
  int ret;
  ret = __fpga_port_disable(port);
  if (ret)
    return ret;
  __fpga_port_enable(port);
  return 0;
}


x86 assembly (clang, -O0):
<__fpga_port_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <__fpga_port_disable@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     114d <__fpga_port_reset+0x2d>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115d <__fpga_port_reset+0x3d>
mov    -0x10(%rbp),%rdi
call   1040 <__fpga_port_enable@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fpga_port_reset>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <__fpga_port_disable@plt>
mov    %eax,%ebp
test   %eax,%eax
jne    1139 <__fpga_port_reset+0x19>
mov    %rbx,%rdi
call   1040 <__fpga_port_enable@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.ifpga_port_hw = type { i32 }
define i32 @__fpga_port_reset(%struct.ifpga_port_hw* %0) {
%2 = alloca i32
%3 = alloca %struct.ifpga_port_hw*
%4 = alloca i32
store %struct.ifpga_port_hw* %0, %struct.ifpga_port_hw** %3
%5 = load %struct.ifpga_port_hw*, %struct.ifpga_port_hw** %3
%6 = call i32 @__fpga_port_disable(%struct.ifpga_port_hw* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %14
11: ; preds = %1
%12 = load %struct.ifpga_port_hw*, %struct.ifpga_port_hw** %3
%13 = call i32 @__fpga_port_enable(%struct.ifpga_port_hw* %12)
store i32 0, i32* %2
br label %14
14: ; preds = %11, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
%struct.ifpga_port_hw = type { i32 }
define i32 @__fpga_port_reset(%struct.ifpga_port_hw* %0) {
%2 = tail call i32 @__fpga_port_disable(%struct.ifpga_port_hw* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @__fpga_port_enable(%struct.ifpga_port_hw* %0)
br label %6
6: ; preds = %1, %4
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ startZteClient(void *);
int /*<<< orphan*/ zteLog(char *);
void *startZteClientAdapter(void *ptr) {
  zteLog("Zte Client thread start\n");
  startZteClient(ptr);
  return NULL;
}


x86 assembly (clang, -O0):
<startZteClientAdapter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1040 <zteLog@plt>
mov    -0x8(%rbp),%rdi
call   1030 <startZteClient@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<startZteClientAdapter>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1040 <zteLog@plt>
mov    %rbx,%rdi
call   1030 <startZteClient@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"Zte Client thread start\0A\00"
define i8* @startZteClientAdapter(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @zteLog(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @startZteClient(i8* %4)
ret i8* null
}

LLVM IR (-O2):
@.str = [25 x i8] c"Zte Client thread start\0A\00"
define noalias i8* @startZteClientAdapter(i8* %0) {
%2 = tail call i32 @zteLog(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @startZteClient(i8* %0)
ret i8* null
}
int main() {
  *(((char *)0xd000) + 0x224) = 'A';
  while (1)
    ;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0xd000,%eax
movb   $0x41,0x224(%rax)
jmp    1117 <main+0x17>

x86 assembly (clang, -O2):
<main>:
movb   $0x41,0xd224
41
nopl   0x0(%rax,%rax,1)
jmp    1110 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
store i8 65, i8* getelementptr inbounds (i8, i8* inttoptr (i64 53248 to i8*), i64 548)
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define i32 @main() {
store i8 65, i8* inttoptr (i64 53796 to i8*)
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ assert_context_process();
int nondet_int();
int __get_user(int size, void *ptr) {
  int tmp;
  {
    assert_context_process();
    tmp = nondet_int();
    return (tmp);
  }
}


x86 assembly (clang, -O0):
<__get_user>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <assert_context_process@plt>
mov    $0x0,%al
call   1030 <nondet_int@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__get_user>:
push   %rax
xor    %eax,%eax
call   1040 <assert_context_process@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <nondet_int@plt>

LLVM IR (-O0):
define i32 @__get_user(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = call i32 (...) @assert_context_process()
%7 = call i32 (...) @nondet_int()
store i32 %7, i32* %5
%8 = load i32, i32* %5
ret i32 %8
}

LLVM IR (-O2):
define i32 @__get_user(i32 %0, i8* nocapture readnone %1) {
%3 = tail call i32 (...) @assert_context_process()
%4 = tail call i32 (...) @nondet_int()
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ par_dependant(int /*<<< orphan*/, int);
int /*<<< orphan*/ par_not_dependant(int);
void call(int x) {
  par_not_dependant(1000);
  par_dependant(0, 1000);
}


x86 assembly (clang, -O0):
<call>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x3e8,%edi
call   1040 <par_not_dependant@plt>
xor    %edi,%edi
mov    $0x3e8,%esi
call   1030 <par_dependant@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<call>:
push   %rax
mov    $0x3e8,%edi
call   1040 <par_not_dependant@plt>
xor    %edi,%edi
mov    $0x3e8,%esi
pop    %rax
jmp    1030 <par_dependant@plt>

LLVM IR (-O0):
define void @call(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @par_not_dependant(i32 1000)
%4 = call i32 @par_dependant(i32 0, i32 1000)
ret void
}

LLVM IR (-O2):
define void @call(i32 %0) {
%2 = tail call i32 @par_not_dependant(i32 1000)
%3 = tail call i32 @par_dependant(i32 0, i32 1000)
ret void
}
int cmdline_dummy_callback(const char *param, void *extra_param) { return 0; }


x86 assembly (clang, -O0):
<cmdline_dummy_callback>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdline_dummy_callback>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cmdline_dummy_callback(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @cmdline_dummy_callback(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long window;
};
struct TYPE_4__ {
  TYPE_1__ xclient;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xclient_window(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xclient.window = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xclient_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xclient_window>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xclient_window(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xclient_window(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
scalar_t__ close(int);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ raiseerr(int);
void close_conn(int sock_fd) {
  if (close(sock_fd) < 0) {
    raiseerr(5);
  }
  exit(0);
}


x86 assembly (clang, -O0):
<close_conn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <close@plt>
cmp    $0x0,%rax
jge    1157 <close_conn+0x27>
mov    $0x5,%edi
call   1030 <raiseerr@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<close_conn>:
push   %rax
call   1040 <close@plt>
test   %rax,%rax
jns    1145 <close_conn+0x15>
mov    $0x5,%edi
call   1030 <raiseerr@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define void @close_conn(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @close(i32 %3)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @raiseerr(i32 5)
br label %8
8: ; preds = %6, %1
%9 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @close_conn(i32 %0) {
%2 = tail call i64 @close(i32 %0)
%3 = icmp slt i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @raiseerr(i32 5)
br label %6
6: ; preds = %4, %1
%7 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
unsigned char *tiger_buffer(unsigned char *, unsigned char const *, size_t);
unsigned char *hash_buffer_tiger(unsigned char *out, const unsigned char *in,
                                 size_t in_len) {
  return tiger_buffer(out, in, in_len);
}


x86 assembly (clang, -O0):
<hash_buffer_tiger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <tiger_buffer@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_buffer_tiger>:
jmp    1030 <tiger_buffer@plt>

LLVM IR (-O0):
define i8* @hash_buffer_tiger(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i8* @tiger_buffer(i8* %7, i8* %8, i64 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @hash_buffer_tiger(i8* %0, i8* %1, i64 %2) {
%4 = tail call i8* @tiger_buffer(i8* %0, i8* %1, i64 %2)
ret i8* %4
}
int main() {
  int i = 3;
  int result = 10;
  switch (i) {
  case 0:
    result = 5;
    break;
  case 1:
    result = 8;
    break;
  case 2:
    result = 9;
    break;
  case 3:
    result = 2;
    break;
  default:
    result = 13;
  }
  return result;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
movl   $0xa,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x18(%rbp)
sub    $0x3,%rax
ja     116e <main+0x6e>
mov    -0x18(%rbp),%rax
lea    0xecb(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x5,-0xc(%rbp)
jmp    1175 <main+0x75>
movl   $0x8,-0xc(%rbp)
jmp    1175 <main+0x75>
movl   $0x9,-0xc(%rbp)
jmp    1175 <main+0x75>
movl   $0x2,-0xc(%rbp)
jmp    1175 <main+0x75>
movl   $0xd,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
store i32 10, i32* %3
%4 = load i32, i32* %2
switch i32 %4, label %9 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
]
5: ; preds = %0
store i32 5, i32* %3
br label %10
6: ; preds = %0
store i32 8, i32* %3
br label %10
7: ; preds = %0
store i32 9, i32* %3
br label %10
8: ; preds = %0
store i32 2, i32* %3
br label %10
9: ; preds = %0
store i32 13, i32* %3
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @main() {
ret i32 2
}
void ff_hevc_put_hevc_qpel_hv64_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_hv64_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_hv64_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_hv64_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_hv64_8_sse4() {
ret void
}
int test_imm_5Buint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x5B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Buint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0x5b,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Buint64_midword_mem>:
testb  $0x5b,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Buint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 91
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_5Buint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 5963776
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_attr_t;

/* Variables and functions */
int pthread_attr_setschedpolicy(pthread_attr_t *attr, int policy) {
  (void)attr;
  (void)policy;
  return 0;
}


x86 assembly (clang, -O0):
<pthread_attr_setschedpolicy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_attr_setschedpolicy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pthread_attr_setschedpolicy(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @pthread_attr_setschedpolicy(i32* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ barrier();
void full_barrier(void) { barrier(); }


x86 assembly (clang, -O0):
<full_barrier>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <barrier@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<full_barrier>:
xor    %eax,%eax
jmp    1030 <barrier@plt>

LLVM IR (-O0):
define void @full_barrier() {
%1 = call i32 (...) @barrier()
ret void
}

LLVM IR (-O2):
define void @full_barrier() {
%1 = tail call i32 (...) @barrier()
ret void
}
/* Type definitions */
struct vink_xmpp_state {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void xmpp_queue_empty(struct vink_xmpp_state *state) {
  fprintf(stderr, "Queue is empty\n");
}


x86 assembly (clang, -O0):
<xmpp_queue_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
lea    0xed4(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmpp_queue_empty>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
%struct.vink_xmpp_state = type { i32 }
@stderr = global i32 0
@.str = [16 x i8] c"Queue is empty\0A\00"
define void @xmpp_queue_empty(%struct.vink_xmpp_state* %0) {
%2 = alloca %struct.vink_xmpp_state*
store %struct.vink_xmpp_state* %0, %struct.vink_xmpp_state** %2
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.vink_xmpp_state = type { i32 }
@stderr = global i32 0
@.str = [16 x i8] c"Queue is empty\0A\00"
define void @xmpp_queue_empty(%struct.vink_xmpp_state* nocapture readnone %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}
int test_512() { return 512; }


x86 assembly (clang, -O0):
<test_512>:
push   %rbp
mov    %rsp,%rbp
mov    $0x200,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_512>:
mov    $0x200,%eax
ret

LLVM IR (-O0):
define i32 @test_512() {
ret i32 512
}

LLVM IR (-O2):
define i32 @test_512() {
ret i32 512
}
void SIO1writeStat16(unsigned short val) {}


x86 assembly (clang, -O0):
<SIO1writeStat16>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SIO1writeStat16>:
ret

LLVM IR (-O0):
define void @SIO1writeStat16(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
ret void
}

LLVM IR (-O2):
define void @SIO1writeStat16(i16 zeroext %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ couleur(unsigned int const);
int /*<<< orphan*/ putchar(char const);
void colorationCaractere(const char caractere, const unsigned int typeCouleur) {
  couleur(typeCouleur);
  putchar(caractere);
  couleur(0);
}


x86 assembly (clang, -O0):
<colorationCaractere>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <couleur@plt>
movsbl -0x1(%rbp),%edi
call   1030 <putchar@plt>
xor    %edi,%edi
call   1040 <couleur@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<colorationCaractere>:
push   %rbx
mov    %edi,%ebx
mov    %esi,%edi
call   1040 <couleur@plt>
mov    %ebx,%edi
call   1030 <putchar@plt>
xor    %edi,%edi
pop    %rbx
jmp    1040 <couleur@plt>

LLVM IR (-O0):
define void @colorationCaractere(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @couleur(i32 %5)
%7 = load i8, i8* %3
%8 = call i32 @putchar(i8 signext %7)
%9 = call i32 @couleur(i32 0)
ret void
}

LLVM IR (-O2):
define void @colorationCaractere(i8 signext %0, i32 %1) {
%3 = tail call i32 @couleur(i32 %1)
%4 = tail call i32 @putchar(i8 signext %0)
%5 = tail call i32 @couleur(i32 0)
ret void
}
/* Variables and functions */
scalar_t__ strlen(char *);
int /*<<< orphan*/ strncpy(char *, char *, scalar_t__);
char *strtok(char *, char *);
char *clean_time(char *raw, char *clean) {
  char *tmp = strtok(raw, " ");
  tmp = strtok(NULL, " ");
  strncpy(clean, tmp, strlen(tmp) + 1);
  return clean;
}


x86 assembly (clang, -O0):
<clean_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1050 <strtok@plt>
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
mov    %eax,%edi
lea    0xea1(%rip),%rsi
call   1050 <strtok@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    %rax,%rdx
add    $0x1,%rdx
call   1030 <strncpy@plt>
mov    -0x10(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clean_time>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
lea    0xec1(%rip),%r14
mov    %r14,%rsi
call   1050 <strtok@plt>
xor    %edi,%edi
mov    %r14,%rsi
call   1050 <strtok@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <strlen@plt>
lea    0x1(%rax),%rdx
mov    %r15,%rdi
mov    %rbx,%rsi
call   1030 <strncpy@plt>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [2 x i8] c" \00"
define i8* @clean_time(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i8* @strtok(i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i8* %7, i8** %5
%8 = call i8* @strtok(i8* null, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i8* %8, i8** %5
%9 = load i8*, i8** %4
%10 = load i8*, i8** %5
%11 = load i8*, i8** %5
%12 = call i64 @strlen(i8* %11)
%13 = add nsw i64 %12, 1
%14 = call i32 @strncpy(i8* %9, i8* %10, i64 %13)
%15 = load i8*, i8** %4
ret i8* %15
}

LLVM IR (-O2):
@.str = [2 x i8] c" \00"
define i8* @clean_time(i8* %0, i8* returned %1) {
%3 = tail call i8* @strtok(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = tail call i8* @strtok(i8* null, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = tail call i64 @strlen(i8* dereferenceable(1) %4)
%6 = add nsw i64 %5, 1
%7 = tail call i32 @strncpy(i8* %1, i8* %4, i64 %6)
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ printf2(char *);
void GenPrintOperandStarter(void) { printf2("("); }


x86 assembly (clang, -O0):
<GenPrintOperandStarter>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GenPrintOperandStarter>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf2@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"(\00"
define void @GenPrintOperandStarter() {
%1 = call i32 @printf2(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"(\00"
define void @GenPrintOperandStarter() {
%1 = tail call i32 @printf2(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int work();
int main() {
  int t = 0, ans;
  while ((ans = work()) != -1)
    printf("Case %d: %d\n", ++t, ans);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <work@plt>
mov    %eax,-0xc(%rbp)
cmp    $0xffffffff,%eax
je     1166 <main+0x46>
mov    -0x8(%rbp),%esi
add    $0x1,%esi
mov    %esi,-0x8(%rbp)
mov    -0xc(%rbp),%edx
lea    0xea4(%rip),%rdi
call   1040 <printf@plt>
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1030 <work@plt>
cmp    $0xffffffff,%eax
je     115b <main+0x3b>
mov    $0x1,%ebx
lea    0xec4(%rip),%r14
nopl   0x0(%rax)
mov    %r14,%rdi
mov    %ebx,%esi
mov    %eax,%edx
call   1040 <printf@plt>
xor    %eax,%eax
call   1030 <work@plt>
add    $0x1,%ebx
cmp    $0xffffffff,%eax
jne    1140 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Case %d: %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %4
4: ; preds = %7, %0
%5 = call i32 (...) @work()
store i32 %5, i32* %3
%6 = icmp ne i32 %5, -1
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10)
br label %4
12: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Case %d: %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @work()
%2 = icmp eq i32 %1, -1
br i1 %2, label %10, label %3
3: ; preds = %0, %3
%4 = phi i32 [ %8, %3 ], [ %1, %0 ]
%5 = phi i32 [ %6, %3 ], [ 0, %0 ]
%6 = add nuw nsw i32 %5, 1
%7 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %6, i32 %4)
%8 = tail call i32 (...) @work()
%9 = icmp eq i32 %8, -1
br i1 %9, label %10, label %3
10: ; preds = %3, %0
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void DisplayNumber(unsigned long v) {
  if (v != 0x9aL)
    abort();
}


x86 assembly (clang, -O0):
<DisplayNumber>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x9a,-0x8(%rbp)
je     1131 <DisplayNumber+0x21>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DisplayNumber>:
cmp    $0x9a,%rdi
jne    111a <DisplayNumber+0xa>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @DisplayNumber(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ne i64 %3, 154
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @DisplayNumber(i64 %0) {
%2 = icmp eq i64 %0, 154
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
ret void
}
/* Variables and functions */
float sinf(float);
float EaseSineOut(float t, float b, float c, float d) {
  return (c * sinf(t / d * (3.14159265358979323846f / 2.0f)) + b);
}


x86 assembly (clang, -O0):
<EaseSineOut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x10(%rbp),%xmm0
movss  0xeb8(%rip),%xmm1
mulss  %xmm1,%xmm0
call   1030 <sinf@plt>
movaps %xmm0,%xmm2
movss  -0x14(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EaseSineOut>:
push   %rax
movss  %xmm2,(%rsp)
movss  %xmm1,0x4(%rsp)
divss  %xmm3,%xmm0
mulss  0xed8(%rip),%xmm0
call   1030 <sinf@plt>
mulss  (%rsp),%xmm0
addss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @EaseSineOut(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %7
%10 = load float, float* %5
%11 = load float, float* %8
%12 = fdiv float %10, %11
%13 = fmul float %12, 0x3FF921FB60000000
%14 = call float @sinf(float %13)
%15 = load float, float* %6
%16 = call float @llvm.fmuladd.f32(float %9, float %14, float %15)
ret float %16
}

LLVM IR (-O2):
define float @EaseSineOut(float %0, float %1, float %2, float %3) {
%5 = fdiv float %0, %3
%6 = fmul float %5, 0x3FF921FB60000000
%7 = tail call float @sinf(float %6)
%8 = tail call float @llvm.fmuladd.f32(float %2, float %7, float %1)
ret float %8
}
int test_imm_A5uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xA5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A5uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xa5,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A5uint64_lowword_mem>:
testb  $0xa5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A5uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 165
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A5uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 165
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
signed long long f35(signed long long v_foo) {
  signed long long v_and = v_foo & 65535;
  signed long long v_shl = ((unsigned long long)v_and) >> 9;
  return v_shl;
}


x86 assembly (clang, -O0):
<f35>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xffff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x9,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f35>:
mov    %rdi,%rax
shr    $0x9,%eax
and    $0x7f,%eax
ret

LLVM IR (-O0):
define i64 @f35(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = and i64 %5, 65535
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = lshr i64 %7, 9
store i64 %8, i64* %4
%9 = load i64, i64* %4
ret i64 %9
}

LLVM IR (-O2):
define i64 @f35(i64 %0) {
%2 = lshr i64 %0, 9
%3 = and i64 %2, 127
ret i64 %3
}
void PROTOCOL_SetSwitch(int module) { (void)module; }


x86 assembly (clang, -O0):
<PROTOCOL_SetSwitch>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PROTOCOL_SetSwitch>:
ret

LLVM IR (-O0):
define void @PROTOCOL_SetSwitch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @PROTOCOL_SetSwitch(i32 %0) {
ret void
}
/* Variables and functions */
void *realloc(void *, size_t);
void *grid_realloc(void *ptr, size_t size) { return realloc(ptr, size); }


x86 assembly (clang, -O0):
<grid_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grid_realloc>:
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @grid_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @realloc(i8* %5, i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define noalias i8* @grid_realloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
ret i8* %3
}
/* Type definitions */
struct times {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sjf_algorithm(struct times **);
void srt_algorithm(struct times **list) {
  sjf_algorithm(list);
  printf("\n");
}


x86 assembly (clang, -O0):
<srt_algorithm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sjf_algorithm@plt>
lea    0xec4(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<srt_algorithm>:
push   %rax
call   1040 <sjf_algorithm@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
%struct.times = type { i32 }
@.str = [2 x i8] c"\0A\00"
define void @srt_algorithm(%struct.times** %0) {
%2 = alloca %struct.times**
store %struct.times** %0, %struct.times*** %2
%3 = load %struct.times**, %struct.times*** %2
%4 = call i32 @sjf_algorithm(%struct.times** %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.times = type { i32 }
define void @srt_algorithm(%struct.times** %0) {
%2 = tail call i32 @sjf_algorithm(%struct.times** %0)
%3 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __swalk_sflush();
void _cleanup() { (void)__swalk_sflush(); }


x86 assembly (clang, -O0):
<_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__swalk_sflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cleanup>:
xor    %eax,%eax
jmp    1030 <__swalk_sflush@plt>

LLVM IR (-O0):
define void @_cleanup() {
%1 = call i32 (...) @__swalk_sflush()
ret void
}

LLVM IR (-O2):
define void @_cleanup() {
%1 = tail call i32 (...) @__swalk_sflush()
ret void
}
void RTPathGetMode(void) {}


x86 assembly (clang, -O0):
<RTPathGetMode>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTPathGetMode>:
ret

LLVM IR (-O0):
define void @RTPathGetMode() {
ret void
}

LLVM IR (-O2):
define void @RTPathGetMode() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ islower(int);
void t_islower_0x68() {
  Assert_real((islower(104)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              525, ("islower should be 1 for h"));
}


x86 assembly (clang, -O0):
<t_islower_0x68>:
push   %rbp
mov    %rsp,%rbp
mov    $0x68,%edi
call   1030 <islower@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x20d,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0x68>:
push   %rax
mov    $0x68,%edi
call   1030 <islower@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x20d,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 1 for h\00"
define void @t_islower_0x68() {
%1 = call i32 @islower(i32 104)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 525, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 1 for h\00"
define void @t_islower_0x68() {
%1 = tail call i32 @islower(i32 104)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 525, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int _glsl_char2elements(char c) {
  switch (c) {
  case '2':
    return 2;
  case '3':
    return 3;
  case '4':
    return 4;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<_glsl_char2elements>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x32,%eax
je     1141 <_glsl_char2elements+0x41>
jmp    111f <_glsl_char2elements+0x1f>
mov    -0xc(%rbp),%eax
sub    $0x33,%eax
je     114d <_glsl_char2elements+0x4d>
jmp    1130 <_glsl_char2elements+0x30>
mov    -0xc(%rbp),%eax
sub    $0x34,%eax
je     1159 <_glsl_char2elements+0x59>
jmp    1165 <_glsl_char2elements+0x65>
movl   $0x2,-0x4(%rbp)
jmp    116c <_glsl_char2elements+0x6c>
movl   $0x3,-0x4(%rbp)
jmp    116c <_glsl_char2elements+0x6c>
movl   $0x4,-0x4(%rbp)
jmp    116c <_glsl_char2elements+0x6c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_glsl_char2elements>:
lea    -0x32(%rdi),%ecx
lea    -0x30(%rdi),%edx
xor    %eax,%eax
cmp    $0x3,%ecx
cmovb  %edx,%eax
ret

LLVM IR (-O0):
define i32 @_glsl_char2elements(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %9 [
i32 50, label %6
i32 51, label %7
i32 52, label %8
]
6: ; preds = %1
store i32 2, i32* %2
br label %10
7: ; preds = %1
store i32 3, i32* %2
br label %10
8: ; preds = %1
store i32 4, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8, %7, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @_glsl_char2elements(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -50
%4 = icmp ult i32 %3, 3
%5 = add nsw i32 %2, -48
%6 = select i1 %4, i32 %5, i32 0
ret i32 %6
}
/* Type definitions */
struct task_struct {
  int dummy;
};
struct sched_dl_entity {
  int dummy;
};

/* Variables and functions */
struct task_struct *dl_task_of(struct sched_dl_entity *);
int task_hosts_cbs(struct task_struct *p, struct sched_dl_entity *dl_se) {
  return (p == dl_task_of(dl_se));
}


x86 assembly (clang, -O0):
<task_hosts_cbs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <dl_task_of@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_hosts_cbs>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <dl_task_of@plt>
xor    %ecx,%ecx
cmp    %rbx,%rax
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.task_struct = type { i32 }
%struct.sched_dl_entity = type { i32 }
define i32 @task_hosts_cbs(%struct.task_struct* %0, %struct.sched_dl_entity* %1) {
%3 = alloca %struct.task_struct*
%4 = alloca %struct.sched_dl_entity*
store %struct.task_struct* %0, %struct.task_struct** %3
store %struct.sched_dl_entity* %1, %struct.sched_dl_entity** %4
%5 = load %struct.task_struct*, %struct.task_struct** %3
%6 = load %struct.sched_dl_entity*, %struct.sched_dl_entity** %4
%7 = call %struct.task_struct* @dl_task_of(%struct.sched_dl_entity* %6)
%8 = icmp eq %struct.task_struct* %5, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
%struct.task_struct = type { i32 }
%struct.sched_dl_entity = type { i32 }
define i32 @task_hosts_cbs(%struct.task_struct* readnone %0, %struct.sched_dl_entity* %1) {
%3 = tail call %struct.task_struct* @dl_task_of(%struct.sched_dl_entity* %1)
%4 = icmp eq %struct.task_struct* %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}