xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ pthread_rwlock_t;

/* Variables and functions */
int /*<<< orphan*/ *hybris_set_realrwlock(int /*<<< orphan*/ *);
int pthread_rwlock_trywrlock(int /*<<< orphan*/ *);
int my_pthread_rwlock_trywrlock(pthread_rwlock_t *__rwlock) {
  pthread_rwlock_t *realrwlock = hybris_set_realrwlock(__rwlock);
  return pthread_rwlock_trywrlock(realrwlock);
}


x86 assembly (clang, -O0):
<my_pthread_rwlock_trywrlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <hybris_set_realrwlock@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <pthread_rwlock_trywrlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_pthread_rwlock_trywrlock>:
push   %rax
call   1040 <hybris_set_realrwlock@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <pthread_rwlock_trywrlock@plt>

LLVM IR (-O0):
define i32 @my_pthread_rwlock_trywrlock(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32* @hybris_set_realrwlock(i32* %4)
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = call i32 @pthread_rwlock_trywrlock(i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @my_pthread_rwlock_trywrlock(i32* %0) {
%2 = tail call i32* @hybris_set_realrwlock(i32* %0)
%3 = tail call i32 @pthread_rwlock_trywrlock(i32* %2)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int close_file(FILE *fp) { fclose(fp); }


x86 assembly (clang, -O0):
<close_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <fclose@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_file>:
jmp    1030 <fclose@plt>

LLVM IR (-O0):
define i32 @close_file(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = call i32 @fclose(i32* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @close_file(i32* nocapture %0) {
%2 = tail call i32 @fclose(i32* %0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ RB_POWER_OFF;
int /*<<< orphan*/ reboot(int /*<<< orphan*/);
int /*<<< orphan*/ sync();
int main() {
  sync();
  reboot(RB_POWER_OFF);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <sync@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1040 <reboot@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <sync@plt>
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
call   1040 <reboot@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@RB_POWER_OFF = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @sync()
%3 = load i32, i32* @RB_POWER_OFF
%4 = call i32 @reboot(i32 %3)
ret i32 0
}

LLVM IR (-O2):
@RB_POWER_OFF = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @sync()
%2 = load i32, i32* @RB_POWER_OFF
%3 = tail call i32 @reboot(i32 %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ display_menu_set_menu_items(int /*<<< orphan*/ *,
                                               int /*<<< orphan*/ *);
int /*<<< orphan*/ display_message_panel_show_text(char *);
void activity_tour_configuration_start() {
  display_message_panel_show_text("Please configure a tour");
  display_menu_set_menu_items(NULL, NULL);
}


x86 assembly (clang, -O0):
<activity_tour_configuration_start>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <display_message_panel_show_text@plt>
xor    %eax,%eax
mov    %eax,%esi
mov    %rsi,%rdi
call   1030 <display_menu_set_menu_items@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<activity_tour_configuration_start>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <display_message_panel_show_text@plt>
xor    %edi,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <display_menu_set_menu_items@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Please configure a tour\00"
define void @activity_tour_configuration_start() {
%1 = call i32 @display_message_panel_show_text(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @display_menu_set_menu_items(i32* null, i32* null)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"Please configure a tour\00"
define void @activity_tour_configuration_start() {
%1 = tail call i32 @display_message_panel_show_text(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @display_menu_set_menu_items(i32* null, i32* null)
ret void
}
void efx_fini_debugfs_channels(struct efx_nic *efx) {}


x86 assembly (clang, -O0):
<efx_fini_debugfs_channels>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<efx_fini_debugfs_channels>:
ret

LLVM IR (-O0):
%struct.efx_nic = type opaque
define void @efx_fini_debugfs_channels(%struct.efx_nic* %0) {
%2 = alloca %struct.efx_nic*
store %struct.efx_nic* %0, %struct.efx_nic** %2
ret void
}

LLVM IR (-O2):
%struct.efx_nic = type opaque
define void @efx_fini_debugfs_channels(%struct.efx_nic* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void sig_hdlr(int signo) {
  printf("caught sig segv\n");
  exit(1);
}


x86 assembly (clang, -O0):
<sig_hdlr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<sig_hdlr>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"caught sig segv\0A\00"
define void @sig_hdlr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [16 x i8] c"caught sig segv\00"
define void @sig_hdlr(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int rd_read_file(int fd, void *ptr, int len) { return 0; }


x86 assembly (clang, -O0):
<rd_read_file>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rd_read_file>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @rd_read_file(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @rd_read_file(i32 %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
test_hashmap_multinsert_profit() {}


x86 assembly (clang, -O0):
<test_hashmap_multinsert_profit>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_hashmap_multinsert_profit>:
ret

LLVM IR (-O0):
define i32 @test_hashmap_multinsert_profit() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @test_hashmap_multinsert_profit() {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ eventsInit();
void eventInit(void) { eventsInit(); }


x86 assembly (clang, -O0):
<eventInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <eventsInit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<eventInit>:
xor    %eax,%eax
jmp    1030 <eventsInit@plt>

LLVM IR (-O0):
define void @eventInit() {
%1 = call i32 (...) @eventsInit()
ret void
}

LLVM IR (-O2):
define void @eventInit() {
%1 = tail call i32 (...) @eventsInit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ i2c_close();
int /*<<< orphan*/ i2c_init();
int /*<<< orphan*/ i2c_start();
int /*<<< orphan*/ i2c_stop();
int /*<<< orphan*/ i2c_write(int);
int main(void) {
  i2c_init();
  i2c_start();
  i2c_write(0x10);
  i2c_write(0x01);
  i2c_write(0x50);
  i2c_stop();
  i2c_close();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <i2c_init@plt>
mov    $0x0,%al
call   1060 <i2c_start@plt>
mov    $0x10,%edi
call   1040 <i2c_write@plt>
mov    $0x1,%edi
call   1040 <i2c_write@plt>
mov    $0x50,%edi
call   1040 <i2c_write@plt>
mov    $0x0,%al
call   1050 <i2c_stop@plt>
mov    $0x0,%al
call   1070 <i2c_close@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <i2c_init@plt>
xor    %eax,%eax
call   1060 <i2c_start@plt>
mov    $0x10,%edi
call   1040 <i2c_write@plt>
mov    $0x1,%edi
call   1040 <i2c_write@plt>
mov    $0x50,%edi
call   1040 <i2c_write@plt>
xor    %eax,%eax
call   1050 <i2c_stop@plt>
xor    %eax,%eax
call   1070 <i2c_close@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @i2c_init()
%2 = call i32 (...) @i2c_start()
%3 = call i32 @i2c_write(i32 16)
%4 = call i32 @i2c_write(i32 1)
%5 = call i32 @i2c_write(i32 80)
%6 = call i32 (...) @i2c_stop()
%7 = call i32 (...) @i2c_close()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @i2c_init()
%2 = tail call i32 (...) @i2c_start()
%3 = tail call i32 @i2c_write(i32 16)
%4 = tail call i32 @i2c_write(i32 1)
%5 = tail call i32 @i2c_write(i32 80)
%6 = tail call i32 (...) @i2c_stop()
%7 = tail call i32 (...) @i2c_close()
ret i32 0
}
int isatty(int fd) { return 1; }


x86 assembly (clang, -O0):
<isatty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isatty>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isatty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @isatty(i32 %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void time_delay(int ms) { usleep(ms * 1000); }


x86 assembly (clang, -O0):
<time_delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_delay>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @time_delay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @time_delay(i32 %0) {
%2 = mul nsw i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ deal_with_declarator(char const *);
char *read_to_first_identifier(char const *);
void c_gibberish_to_english(const char *gibberish) {
  const char *p = read_to_first_identifier(gibberish);
  deal_with_declarator(p);
}


x86 assembly (clang, -O0):
<c_gibberish_to_english>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <read_to_first_identifier@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <deal_with_declarator@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_gibberish_to_english>:
push   %rax
call   1030 <read_to_first_identifier@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <deal_with_declarator@plt>

LLVM IR (-O0):
define void @c_gibberish_to_english(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @read_to_first_identifier(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @deal_with_declarator(i8* %6)
ret void
}

LLVM IR (-O2):
define void @c_gibberish_to_english(i8* %0) {
%2 = tail call i8* @read_to_first_identifier(i8* %0)
%3 = tail call i32 @deal_with_declarator(i8* %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *orig_fopen(char const *, char const *);
int /*<<< orphan*/ printf(char *, char const *, char const *);
FILE *fopen(const char *filepath, const char *restrict mode) {
  printf("[*] Opening filed \"%s\" with mode %s\n", filepath, mode);
  return orig_fopen(filepath, mode);
}


x86 assembly (clang, -O0):
<fopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xec1(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <orig_fopen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fopen>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xecf(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1040 <printf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <orig_fopen@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"[*] Opening filed \22%s\22 with mode %s\0A\00"
define i32* @fopen(i8* %0, i8* noalias %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call i32* @orig_fopen(i8* %8, i8* %9)
ret i32* %10
}

LLVM IR (-O2):
@.str = [37 x i8] c"[*] Opening filed \22%s\22 with mode %s\0A\00"
define i32* @fopen(i8* %0, i8* noalias %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%4 = tail call i32* @orig_fopen(i8* %0, i8* %1)
ret i32* %4
}
int lib2() { return 10; }


x86 assembly (clang, -O0):
<lib2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib2>:
mov    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @lib2() {
ret i32 10
}

LLVM IR (-O2):
define i32 @lib2() {
ret i32 10
}
int compareQDs(const void *a, const void *b) { return *(int *)a < *(int *)b; }


x86 assembly (clang, -O0):
<compareQDs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compareQDs>:
mov    (%rdi),%ecx
xor    %eax,%eax
cmp    (%rsi),%ecx
setl   %al
ret

LLVM IR (-O0):
define i32 @compareQDs(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = icmp slt i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @compareQDs(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp slt i32 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
int fun953() { return 953; }


x86 assembly (clang, -O0):
<fun953>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3b9,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun953>:
mov    $0x3b9,%eax
ret

LLVM IR (-O0):
define i32 @fun953() {
ret i32 953
}

LLVM IR (-O2):
define i32 @fun953() {
ret i32 953
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
double stdlib_strided_dssumpw(int, float *, int);
int main() {
  float x[] = {1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0};
  int64_t N = 4;
  int64_t stride = 2;
  double v = stdlib_strided_dssumpw(N, x, stride);
  printf("sum: %lf\n", v);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0xed1(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xece(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xecb(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xec8(%rip),%rax
mov    %rax,-0x8(%rbp)
movl   $0x4,-0x24(%rbp)
movl   $0x2,-0x28(%rbp)
mov    -0x24(%rbp),%edi
lea    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%edx
call   1040 <stdlib_strided_dssumpw@plt>
movsd  %xmm0,-0x30(%rbp)
movsd  -0x30(%rbp),%xmm0
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rsi
mov    $0x4,%edi
mov    $0x2,%edx
call   1040 <stdlib_strided_dssumpw@plt>
lea    0xecc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.x = [8 x float] [float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00]
@.str = [10 x i8] c"sum: %lf\0A\00"
define i32 @main() {
%1 = alloca [8 x float]
%2 = alloca i32
%3 = alloca i32
%4 = alloca double
%5 = bitcast [8 x float]* %1 to i8*
store i32 4, i32* %2
store i32 2, i32* %3
%6 = load i32, i32* %2
%7 = getelementptr inbounds [8 x float], [8 x float]* %1, i64 0, i64 0
%8 = load i32, i32* %3
%9 = call double @stdlib_strided_dssumpw(i32 %6, float* %7, i32 %8)
store double %9, double* %4
%10 = load double, double* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), double %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.x = [8 x float] [float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00, float 5.000000e+00, float 6.000000e+00, float 7.000000e+00, float 8.000000e+00]
@.str = [10 x i8] c"sum: %lf\0A\00"
define i32 @main() {
%1 = alloca [8 x float]
%2 = bitcast [8 x float]* %1 to i8*
%3 = getelementptr inbounds [8 x float], [8 x float]* %1, i64 0, i64 0
%4 = call double @stdlib_strided_dssumpw(i32 4, float* %3, i32 2)
%5 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), double %4)
ret i32 0
}
void g_scanner_sync_file_offset() {}


x86 assembly (clang, -O0):
<g_scanner_sync_file_offset>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_scanner_sync_file_offset>:
ret

LLVM IR (-O0):
define void @g_scanner_sync_file_offset() {
ret void
}

LLVM IR (-O2):
define void @g_scanner_sync_file_offset() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int read_defect_data_12_len(int /*<<< orphan*/ *);
bool read_defect_data_12_hdr_is_valid(uint8_t *data, unsigned data_len) {
  if (data_len < 8)
    return false;
  if ((read_defect_data_12_len(data) % 4) != 0)
    return false;
  return true;
}


x86 assembly (clang, -O0):
<read_defect_data_12_hdr_is_valid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x8,-0x14(%rbp)
jae    1135 <read_defect_data_12_hdr_is_valid+0x25>
movl   $0x0,-0x4(%rbp)
jmp    1162 <read_defect_data_12_hdr_is_valid+0x52>
mov    -0x10(%rbp),%rdi
call   1030 <read_defect_data_12_len@plt>
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     115b <read_defect_data_12_hdr_is_valid+0x4b>
movl   $0x0,-0x4(%rbp)
jmp    1162 <read_defect_data_12_hdr_is_valid+0x52>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_defect_data_12_hdr_is_valid>:
xor    %eax,%eax
cmp    $0x8,%esi
jb     112b <read_defect_data_12_hdr_is_valid+0x1b>
push   %rax
call   1030 <read_defect_data_12_len@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   $0x3,%cl
sete   %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @read_defect_data_12_hdr_is_valid(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ult i32 %6, 8
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %16
9: ; preds = %2
%10 = load i32*, i32** %4
%11 = call i32 @read_defect_data_12_len(i32* %10)
%12 = srem i32 %11, 4
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 0, i32* %3
br label %16
15: ; preds = %9
store i32 1, i32* %3
br label %16
16: ; preds = %15, %14, %8
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @read_defect_data_12_hdr_is_valid(i32* %0, i32 %1) {
%3 = icmp ult i32 %1, 8
br i1 %3, label %9, label %4
4: ; preds = %2
%5 = tail call i32 @read_defect_data_12_len(i32* %0)
%6 = and i32 %5, 3
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %4, %2
%10 = phi i32 [ 0, %2 ], [ %8, %4 ]
ret i32 %10
}
void gtk_toggle_button_new_with_label() {}


x86 assembly (clang, -O0):
<gtk_toggle_button_new_with_label>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_toggle_button_new_with_label>:
ret

LLVM IR (-O0):
define void @gtk_toggle_button_new_with_label() {
ret void
}

LLVM IR (-O2):
define void @gtk_toggle_button_new_with_label() {
ret void
}
int test_imm_DBuint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xDB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_DBuint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xdb,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_DBuint64_midword_reg>:
test   $0xdb0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_DBuint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 219
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_DBuint64_midword_reg(i64 %0) {
%2 = and i64 %0, 14352384
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int putchar(char ch) {
  *(int *)0x20000000 = ch;
  return 0;
}


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x20000000,%eax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
mov    %edi,0x20000000
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @putchar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
store i32 %4, i32* inttoptr (i64 536870912 to i32*)
ret i32 0
}

LLVM IR (-O2):
define i32 @putchar(i8 signext %0) {
%2 = sext i8 %0 to i32
store i32 %2, i32* inttoptr (i64 536870912 to i32*)
ret i32 0
}
void rlb_argv_shift(int *optind, int *argc, char ***argv) {
  *optind -= 1;
  *argc -= *optind;
  *argv += *optind;
  *optind = 1;
}


x86 assembly (clang, -O0):
<rlb_argv_shift>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
sub    $0x1,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
sub    %edx,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
movslq %edx,%rdx
shl    $0x3,%rdx
add    %rdx,%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rlb_argv_shift>:
mov    (%rdi),%eax
add    $0xffffffff,%eax
mov    %eax,(%rdi)
sub    %eax,(%rsi)
movslq (%rdi),%rax
shl    $0x3,%rax
add    %rax,(%rdx)
movl   $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @rlb_argv_shift(i32* %0, i32* %1, i8*** %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i8***
store i32* %0, i32** %4
store i32* %1, i32** %5
store i8*** %2, i8**** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = sub nsw i32 %8, 1
store i32 %9, i32* %7
%10 = load i32*, i32** %4
%11 = load i32, i32* %10
%12 = load i32*, i32** %5
%13 = load i32, i32* %12
%14 = sub nsw i32 %13, %11
store i32 %14, i32* %12
%15 = load i32*, i32** %4
%16 = load i32, i32* %15
%17 = load i8***, i8**** %6
%18 = load i8**, i8*** %17
%19 = sext i32 %16 to i64
%20 = getelementptr inbounds i8*, i8** %18, i64 %19
store i8** %20, i8*** %17
%21 = load i32*, i32** %4
store i32 1, i32* %21
ret void
}

LLVM IR (-O2):
define void @rlb_argv_shift(i32* nocapture %0, i32* nocapture %1, i8*** nocapture %2) {
%4 = load i32, i32* %0
%5 = add nsw i32 %4, -1
store i32 %5, i32* %0
%6 = load i32, i32* %1
%7 = sub nsw i32 %6, %5
store i32 %7, i32* %1
%8 = load i32, i32* %0
%9 = load i8**, i8*** %2
%10 = sext i32 %8 to i64
%11 = getelementptr inbounds i8*, i8** %9, i64 %10
store i8** %11, i8*** %2
store i32 1, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int test_lahf_sahf();
int main(void) {
  assert(test_lahf_sahf() == 2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_lahf_sahf@plt>
cmp    $0x2,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_lahf_sahf@plt>
xor    %edi,%edi
cmp    $0x2,%eax
sete   %dil
call   1040 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_lahf_sahf()
%3 = icmp eq i32 %2, 2
%4 = zext i1 %3 to i32
%5 = call i32 @assert(i32 %4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_lahf_sahf()
%2 = icmp eq i32 %1, 2
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret i32 0
}
/* Variables and functions */
scalar_t__ is_old_nx_model();
int get_frame_width(void) {
  if (is_old_nx_model()) {
    return 800;
  } else {
    return 720;
  }
}


x86 assembly (clang, -O0):
<get_frame_width>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <is_old_nx_model@plt>
cmp    $0x0,%rax
je     1135 <get_frame_width+0x25>
movl   $0x320,-0x4(%rbp)
jmp    113c <get_frame_width+0x2c>
movl   $0x2d0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_frame_width>:
push   %rax
xor    %eax,%eax
call   1030 <is_old_nx_model@plt>
test   %rax,%rax
mov    $0x2d0,%ecx
mov    $0x320,%eax
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get_frame_width() {
%1 = alloca i32
%2 = call i64 (...) @is_old_nx_model()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 800, i32* %1
br label %6
5: ; preds = %0
store i32 720, i32* %1
br label %6
6: ; preds = %5, %4
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_frame_width() {
%1 = tail call i64 (...) @is_old_nx_model()
%2 = icmp eq i64 %1, 0
%3 = select i1 %2, i32 720, i32 800
ret i32 %3
}
/* Type definitions */
typedef int GLfloat;

/* Variables and functions */
int /*<<< orphan*/ GL_LIGHT0;
int /*<<< orphan*/ GL_POSITION;
int /*<<< orphan*/ glLightfv(int /*<<< orphan*/, int /*<<< orphan*/, int *);
void setupLight(void) {
  static GLfloat lightpos[] = {0, 1, 0, 0};
  glLightfv(GL_LIGHT0, GL_POSITION, lightpos);
}


x86 assembly (clang, -O0):
<setupLight>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
mov    0x2eb4(%rip),%rax
mov    (%rax),%esi
lea    0x2f03(%rip),%rdx
call   1030 <glLightfv@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setupLight>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
lea    0x2f07(%rip),%rdx
jmp    1030 <glLightfv@plt>

LLVM IR (-O0):
@setupLight.lightpos = internal global [4 x i32] [i32 0, i32 1, i32 0, i32 0]
@GL_LIGHT0 = global i32 0
@GL_POSITION = global i32 0
define void @setupLight() {
%1 = load i32, i32* @GL_LIGHT0
%2 = load i32, i32* @GL_POSITION
%3 = call i32 @glLightfv(i32 %1, i32 %2, i32* getelementptr inbounds ([4 x i32], [4 x i32]* @setupLight.lightpos, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@setupLight.lightpos = internal global [4 x i32] [i32 0, i32 1, i32 0, i32 0]
@GL_LIGHT0 = global i32 0
@GL_POSITION = global i32 0
define void @setupLight() {
%1 = load i32, i32* @GL_LIGHT0
%2 = load i32, i32* @GL_POSITION
%3 = tail call i32 @glLightfv(i32 %1, i32 %2, i32* getelementptr inbounds ([4 x i32], [4 x i32]* @setupLight.lightpos, i64 0, i64 0))
ret void
}
double test_fmin(double x, double y) { return __builtin_fmin(x, y); }


x86 assembly (clang, -O0):
<test_fmin>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm3
movsd  -0x10(%rbp),%xmm2
movaps %xmm2,%xmm4
movaps %xmm3,%xmm0
cmpunordsd %xmm0,%xmm0
movaps %xmm0,%xmm1
pand   %xmm4,%xmm1
minsd  %xmm3,%xmm2
pandn  %xmm2,%xmm0
por    %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fmin>:
movapd %xmm0,%xmm2
cmpunordsd %xmm0,%xmm2
movapd %xmm2,%xmm3
andpd  %xmm1,%xmm3
minsd  %xmm0,%xmm1
andnpd %xmm1,%xmm2
orpd   %xmm3,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @test_fmin(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @llvm.minnum.f64(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @test_fmin(double %0, double %1) {
%3 = tail call double @llvm.minnum.f64(double %0, double %1)
ret double %3
}
void vzero(float *v) {
  v[0] = 0.0;
  v[1] = 0.0;
  v[2] = 0.0;
}


x86 assembly (clang, -O0):
<vzero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vzero>:
movq   $0x0,(%rdi)
movl   $0x0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @vzero(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
store float 0.000000e+00, float* %4
%5 = load float*, float** %2
%6 = getelementptr inbounds float, float* %5, i64 1
store float 0.000000e+00, float* %6
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 2
store float 0.000000e+00, float* %8
ret void
}

LLVM IR (-O2):
define void @vzero(float* nocapture writeonly %0) {
store float 0.000000e+00, float* %0
%2 = getelementptr inbounds float, float* %0, i64 1
store float 0.000000e+00, float* %2
%3 = getelementptr inbounds float, float* %0, i64 2
store float 0.000000e+00, float* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HplAtm128GeneralIOPinP__36__IO__clr();
void WaterPumpC__WaterPumpPower__clr(void) {
  HplAtm128GeneralIOPinP__36__IO__clr();
}


x86 assembly (clang, -O0):
<WaterPumpC__WaterPumpPower__clr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplAtm128GeneralIOPinP__36__IO__clr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WaterPumpC__WaterPumpPower__clr>:
xor    %eax,%eax
jmp    1030 <HplAtm128GeneralIOPinP__36__IO__clr@plt>

LLVM IR (-O0):
define void @WaterPumpC__WaterPumpPower__clr() {
%1 = call i32 (...) @HplAtm128GeneralIOPinP__36__IO__clr()
ret void
}

LLVM IR (-O2):
define void @WaterPumpC__WaterPumpPower__clr() {
%1 = tail call i32 (...) @HplAtm128GeneralIOPinP__36__IO__clr()
ret void
}
/* Variables and functions */
long CLOCKS_PER_SEC;
long get_clocks_per_sec(void) { return CLOCKS_PER_SEC; }


x86 assembly (clang, -O0):
<get_clocks_per_sec>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_clocks_per_sec>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%rax
ret

LLVM IR (-O0):
@CLOCKS_PER_SEC = global i64 0
define i64 @get_clocks_per_sec() {
%1 = load i64, i64* @CLOCKS_PER_SEC
ret i64 %1
}

LLVM IR (-O2):
@CLOCKS_PER_SEC = global i64 0
define i64 @get_clocks_per_sec() {
%1 = load i64, i64* @CLOCKS_PER_SEC
ret i64 %1
}
int re_match_2(bufp, string1, size1, string2, size2, pos, regs, stop)
struct re_pattern_buffer *bufp;
const char *string1, *string2;
int size1, size2;
int pos;
struct re_registers *regs;
int stop;
{
  int result;
  result = byte_re_match_2_internal(bufp, string1, size1, string2, size2, pos,
                                    regs, stop);
  return result;
}


x86 assembly (clang, -O0):
<re_match_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    %r9d,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
mov    -0x28(%rbp),%r9d
mov    0x10(%rbp),%r10
mov    0x18(%rbp),%eax
mov    %r10,(%rsp)
mov    %eax,0x8(%rsp)
mov    $0x0,%al
call   1030 <byte_re_match_2_internal@plt>
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<re_match_2>:
push   %rax
mov    0x18(%rsp),%r10d
xor    %eax,%eax
push   %r10
push   0x18(%rsp)
call   1030 <byte_re_match_2_internal@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.re_pattern_buffer = type opaque
%struct.re_registers = type opaque
define i32 @re_match_2(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i8* %3, i32 %4, i32 %5, %struct.re_registers* %6, i32 %7) {
%9 = alloca %struct.re_pattern_buffer*
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i32
%14 = alloca i32
%15 = alloca %struct.re_registers*
%16 = alloca i32
%17 = alloca i32
store %struct.re_pattern_buffer* %0, %struct.re_pattern_buffer** %9
store i8* %1, i8** %10
store i32 %2, i32* %11
store i8* %3, i8** %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store %struct.re_registers* %6, %struct.re_registers** %15
store i32 %7, i32* %16
%18 = load %struct.re_pattern_buffer*, %struct.re_pattern_buffer** %9
%19 = load i8*, i8** %10
%20 = load i32, i32* %11
%21 = load i8*, i8** %12
%22 = load i32, i32* %13
%23 = load i32, i32* %14
%24 = load %struct.re_registers*, %struct.re_registers** %15
%25 = load i32, i32* %16
%26 = call i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...) bitcast (i32 (...)* @byte_re_match_2_internal to i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...)*)(%struct.re_pattern_buffer* %18, i8* %19, i32 %20, i8* %21, i32 %22, i32 %23, %struct.re_registers* %24, i32 %25)
store i32 %26, i32* %17
%27 = load i32, i32* %17
ret i32 %27
}

LLVM IR (-O2):
%struct.re_pattern_buffer = type opaque
%struct.re_registers = type opaque
define i32 @re_match_2(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i8* %3, i32 %4, i32 %5, %struct.re_registers* %6, i32 %7) {
%9 = tail call i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...) bitcast (i32 (...)* @byte_re_match_2_internal to i32 (%struct.re_pattern_buffer*, i8*, i32, i8*, i32, i32, %struct.re_registers*, i32, ...)*)(%struct.re_pattern_buffer* %0, i8* %1, i32 %2, i8* %3, i32 %4, i32 %5, %struct.re_registers* %6, i32 %7)
ret i32 %9
}
void ff_hevc_put_hevc_uni_qpel_hv32_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_qpel_hv32_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_qpel_hv32_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_qpel_hv32_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_qpel_hv32_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bar(int);
void foo(int n) {
  int i;
#pragma omp for schedule(dynamic) ordered
  for (i = 0; i < n; ++i)
    bar(i);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1144 <foo+0x34>
mov    -0x8(%rbp),%edi
call   1030 <bar@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <foo+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
jle    112e <foo+0x1e>
mov    %edi,%ebx
xor    %ebp,%ebp
nopl   0x0(%rax,%rax,1)
mov    %ebp,%edi
call   1030 <bar@plt>
add    $0x1,%ebp
cmp    %ebp,%ebx
jne    1120 <foo+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %4
%9 = load i32, i32* %3
%10 = call i32 @bar(i32 %9)
br label %11
11: ; preds = %8
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = tail call i32 @bar(i32 %4)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void joyStickDaemon(void *package) {
  int i;
  usleep(2);
}


x86 assembly (clang, -O0):
<joyStickDaemon>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2,%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<joyStickDaemon>:
mov    $0x2,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @joyStickDaemon(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = call i32 @usleep(i32 2)
ret void
}

LLVM IR (-O2):
define void @joyStickDaemon(i8* nocapture readnone %0) {
%2 = tail call i32 @usleep(i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void closesocketpair(int *fdp) {
  close(fdp[0]);
  close(fdp[1]);
}


x86 assembly (clang, -O0):
<closesocketpair>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <close@plt>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<closesocketpair>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <close@plt>
mov    0x4(%rbx),%edi
pop    %rbx
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @closesocketpair(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = call i32 @close(i32 %5)
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = call i32 @close(i32 %9)
ret void
}

LLVM IR (-O2):
define void @closesocketpair(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @close(i32 %2)
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = tail call i32 @close(i32 %5)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ EOF;
int /*<<< orphan*/ erreur(char const *);
scalar_t__ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *);
void fermerFichier(FILE *fichier, const char *messageErreur) {
  if (fclose(fichier) == EOF) {
    printf("fermerFichier : \n");
    erreur(messageErreur);
  }
}


x86 assembly (clang, -O0):
<fermerFichier>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
mov    0x2e98(%rip),%rcx
cmp    (%rcx),%rax
jne    116e <fermerFichier+0x3e>
lea    0xea0(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rdi
call   1050 <erreur@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fermerFichier>:
push   %rbx
mov    %rsi,%rbx
call   1040 <fclose@plt>
mov    0x2ea8(%rip),%rcx
cmp    (%rcx),%rax
jne    115a <fermerFichier+0x2a>
lea    0xeb4(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <erreur@plt>
pop    %rbx
ret

LLVM IR (-O0):
@EOF = global i64 0
@.str = [18 x i8] c"fermerFichier : \0A\00"
define void @fermerFichier(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = call i64 @fclose(i32* %5)
%7 = load i64, i64* @EOF
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%11 = load i8*, i8** %4
%12 = call i32 @erreur(i8* %11)
br label %13
13: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
@EOF = global i64 0
@str = [17 x i8] c"fermerFichier : \00"
define void @fermerFichier(i32* nocapture %0, i8* %1) {
%3 = tail call i64 @fclose(i32* %0)
%4 = load i64, i64* @EOF
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
%8 = tail call i32 @erreur(i8* %1)
br label %9
9: ; preds = %6, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ local_mcu_TimerMilli_isRunning__E();
int /*<<< orphan*/ local_mcu_TimerMilli_start__E();
void pollen_time_TimerManager_start__E() {
  if (!local_mcu_TimerMilli_isRunning__E()) {
    local_mcu_TimerMilli_start__E();
  }
}


x86 assembly (clang, -O0):
<pollen_time_TimerManager_start__E>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <local_mcu_TimerMilli_isRunning__E@plt>
cmp    $0x0,%eax
jne    113b <pollen_time_TimerManager_start__E+0x1b>
mov    $0x0,%al
call   1030 <local_mcu_TimerMilli_start__E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_time_TimerManager_start__E>:
push   %rax
xor    %eax,%eax
call   1040 <local_mcu_TimerMilli_isRunning__E@plt>
test   %eax,%eax
je     112e <pollen_time_TimerManager_start__E+0xe>
pop    %rax
ret
xor    %eax,%eax
pop    %rcx
jmp    1030 <local_mcu_TimerMilli_start__E@plt>

LLVM IR (-O0):
define void @pollen_time_TimerManager_start__E() {
%1 = call i32 (...) @local_mcu_TimerMilli_isRunning__E()
%2 = icmp ne i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = call i32 (...) @local_mcu_TimerMilli_start__E()
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
define void @pollen_time_TimerManager_start__E() {
%1 = tail call i32 (...) @local_mcu_TimerMilli_isRunning__E()
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @local_mcu_TimerMilli_start__E()
br label %5
5: ; preds = %3, %0
ret void
}
/* Variables and functions */
scalar_t__ __cmpdi2(long long, long long);
int _COM_CMPLT64s(long long a, long long b) { return __cmpdi2(a, b) == 0; }


x86 assembly (clang, -O0):
<_COM_CMPLT64s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__cmpdi2@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_COM_CMPLT64s>:
push   %rax
call   1030 <__cmpdi2@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @_COM_CMPLT64s(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i64 @__cmpdi2(i64 %5, i64 %6)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @_COM_CMPLT64s(i64 %0, i64 %1) {
%3 = tail call i64 @__cmpdi2(i64 %0, i64 %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int _flashwrite(char *, char *, int);
int /*<<< orphan*/ monLock();
int /*<<< orphan*/ monUnlock();
int mon_flashwrite(char *dest, char *src, int bytecnt) {
  int ret;
  monLock();
  ret = _flashwrite(dest, src, bytecnt);
  monUnlock();
  return (ret);
}


x86 assembly (clang, -O0):
<mon_flashwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x0,%al
call   1040 <monLock@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <_flashwrite@plt>
mov    %eax,-0x18(%rbp)
mov    $0x0,%al
call   1050 <monUnlock@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mon_flashwrite>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
xor    %eax,%eax
call   1040 <monLock@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
call   1030 <_flashwrite@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <monUnlock@plt>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mon_flashwrite(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = call i32 (...) @monLock()
%9 = load i8*, i8** %4
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = call i32 @_flashwrite(i8* %9, i8* %10, i32 %11)
store i32 %12, i32* %7
%13 = call i32 (...) @monUnlock()
%14 = load i32, i32* %7
ret i32 %14
}

LLVM IR (-O2):
define i32 @mon_flashwrite(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 (...) @monLock()
%5 = tail call i32 @_flashwrite(i8* %0, i8* %1, i32 %2)
%6 = tail call i32 (...) @monUnlock()
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int test_yajl_null(void *ctx) {
  printf("null\n");
  return 1;
}


x86 assembly (clang, -O0):
<test_yajl_null>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_yajl_null>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"null\0A\00"
define i32 @test_yajl_null(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@str = [5 x i8] c"null\00"
define i32 @test_yajl_null(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ S_IFIFO;
int w_is_fd_type_internal(int, int /*<<< orphan*/);
int w_is_fd_fifo(int fd) { return w_is_fd_type_internal(fd, S_IFIFO); }


x86 assembly (clang, -O0):
<w_is_fd_fifo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <w_is_fd_type_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<w_is_fd_fifo>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <w_is_fd_type_internal@plt>

LLVM IR (-O0):
@S_IFIFO = global i32 0
define i32 @w_is_fd_fifo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @S_IFIFO
%5 = call i32 @w_is_fd_type_internal(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@S_IFIFO = global i32 0
define i32 @w_is_fd_fifo(i32 %0) {
%2 = load i32, i32* @S_IFIFO
%3 = tail call i32 @w_is_fd_type_internal(i32 %0, i32 %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ increase_speed();
void speed_up() { increase_speed(); }


x86 assembly (clang, -O0):
<speed_up>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <increase_speed@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<speed_up>:
xor    %eax,%eax
jmp    1030 <increase_speed@plt>

LLVM IR (-O0):
define void @speed_up() {
%1 = call i32 (...) @increase_speed()
ret void
}

LLVM IR (-O2):
define void @speed_up() {
%1 = tail call i32 (...) @increase_speed()
ret void
}
/* Variables and functions */
bool nrf91_errata_33(void) { return false; }


x86 assembly (clang, -O0):
<nrf91_errata_33>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf91_errata_33>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf91_errata_33() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf91_errata_33() {
ret i32 0
}