xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void linux_en(void) { printf("Welcome to LINUX!\n"); }


x86 assembly (clang, -O0):
<linux_en>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<linux_en>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"Welcome to LINUX!\0A\00"
define void @linux_en() {
%1 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [18 x i8] c"Welcome to LINUX!\00"
define void @linux_en() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430Adc12ImplP__TimerA__overflow();
int /*<<< orphan*/ Msp430CounterC__1__Msp430Timer__overflow();
int /*<<< orphan*/ Msp430TimerCapComP__0__Timer__overflow();
int /*<<< orphan*/ Msp430TimerCapComP__1__Timer__overflow();
int /*<<< orphan*/ Msp430TimerCapComP__2__Timer__overflow();
void Msp430TimerP__0__Timer__overflow(void) {
  Msp430Adc12ImplP__TimerA__overflow();
  Msp430CounterC__1__Msp430Timer__overflow();
  Msp430TimerCapComP__0__Timer__overflow();
  Msp430TimerCapComP__1__Timer__overflow();
  Msp430TimerCapComP__2__Timer__overflow();
}


x86 assembly (clang, -O0):
<Msp430TimerP__0__Timer__overflow>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1070 <Msp430Adc12ImplP__TimerA__overflow@plt>
mov    $0x0,%al
call   1040 <Msp430CounterC__1__Msp430Timer__overflow@plt>
mov    $0x0,%al
call   1030 <Msp430TimerCapComP__0__Timer__overflow@plt>
mov    $0x0,%al
call   1050 <Msp430TimerCapComP__1__Timer__overflow@plt>
mov    $0x0,%al
call   1060 <Msp430TimerCapComP__2__Timer__overflow@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430TimerP__0__Timer__overflow>:
push   %rax
xor    %eax,%eax
call   1070 <Msp430Adc12ImplP__TimerA__overflow@plt>
xor    %eax,%eax
call   1040 <Msp430CounterC__1__Msp430Timer__overflow@plt>
xor    %eax,%eax
call   1030 <Msp430TimerCapComP__0__Timer__overflow@plt>
xor    %eax,%eax
call   1050 <Msp430TimerCapComP__1__Timer__overflow@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <Msp430TimerCapComP__2__Timer__overflow@plt>

LLVM IR (-O0):
define void @Msp430TimerP__0__Timer__overflow() {
%1 = call i32 (...) @Msp430Adc12ImplP__TimerA__overflow()
%2 = call i32 (...) @Msp430CounterC__1__Msp430Timer__overflow()
%3 = call i32 (...) @Msp430TimerCapComP__0__Timer__overflow()
%4 = call i32 (...) @Msp430TimerCapComP__1__Timer__overflow()
%5 = call i32 (...) @Msp430TimerCapComP__2__Timer__overflow()
ret void
}

LLVM IR (-O2):
define void @Msp430TimerP__0__Timer__overflow() {
%1 = tail call i32 (...) @Msp430Adc12ImplP__TimerA__overflow()
%2 = tail call i32 (...) @Msp430CounterC__1__Msp430Timer__overflow()
%3 = tail call i32 (...) @Msp430TimerCapComP__0__Timer__overflow()
%4 = tail call i32 (...) @Msp430TimerCapComP__1__Timer__overflow()
%5 = tail call i32 (...) @Msp430TimerCapComP__2__Timer__overflow()
ret void
}
void stats_atomic_dec(int *var) { int t = 0, tmp = 0; }


x86 assembly (clang, -O0):
<stats_atomic_dec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<stats_atomic_dec>:
ret

LLVM IR (-O0):
define void @stats_atomic_dec(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
store i32 0, i32* %4
ret void
}

LLVM IR (-O2):
define void @stats_atomic_dec(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int syscall(int, int);
int rfork(int flags) { return syscall(5, flags); }


x86 assembly (clang, -O0):
<rfork>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x5,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfork>:
mov    %edi,%esi
mov    $0x5,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @rfork(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @syscall(i32 5, i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @rfork(i32 %0) {
%2 = tail call i32 @syscall(i32 5, i32 %0)
ret i32 %2
}
int tick_is_broadcast_device(struct clock_event_device *dev) { return 0; }


x86 assembly (clang, -O0):
<tick_is_broadcast_device>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tick_is_broadcast_device>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.clock_event_device = type opaque
define i32 @tick_is_broadcast_device(%struct.clock_event_device* %0) {
%2 = alloca %struct.clock_event_device*
store %struct.clock_event_device* %0, %struct.clock_event_device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.clock_event_device = type opaque
define i32 @tick_is_broadcast_device(%struct.clock_event_device* nocapture readnone %0) {
ret i32 0
}
double get_vol_element(const double *x) { return 1.0; }


x86 assembly (clang, -O0):
<get_vol_element>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  0xef0(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_vol_element>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @get_vol_element(double* %0) {
%2 = alloca double*
store double* %0, double** %2
ret double 1.000000e+00
}

LLVM IR (-O2):
define double @get_vol_element(double* nocapture readnone %0) {
ret double 1.000000e+00
}
/* Variables and functions */
scalar_t__ RAND_MAX;
float abs(float);
scalar_t__ rand();
float randInF(float min, float max) {
  return min + ((float)rand() / (float)RAND_MAX) * abs(min - max);
}


x86 assembly (clang, -O0):
<randInF>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    $0x0,%al
call   1040 <rand@plt>
cvtsi2ss %rax,%xmm0
mov    0x2e99(%rip),%rax
cvtsi2ssq (%rax),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
call   1030 <abs@plt>
movss  -0x10(%rbp),%xmm1
movaps %xmm0,%xmm2
movss  -0xc(%rbp),%xmm0
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<randInF>:
sub    $0x18,%rsp
movss  %xmm1,0x14(%rsp)
movss  %xmm0,0xc(%rsp)
xor    %eax,%eax
call   1040 <rand@plt>
xorps  %xmm1,%xmm1
cvtsi2ss %rax,%xmm1
mov    0x2ea2(%rip),%rax
xorps  %xmm0,%xmm0
cvtsi2ssq (%rax),%xmm0
divss  %xmm0,%xmm1
movss  %xmm1,0x10(%rsp)
movss  0xc(%rsp),%xmm0
subss  0x14(%rsp),%xmm0
call   1030 <abs@plt>
mulss  0x10(%rsp),%xmm0
addss  0xc(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define float @randInF(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = call i64 (...) @rand()
%7 = sitofp i64 %6 to float
%8 = load i64, i64* @RAND_MAX
%9 = sitofp i64 %8 to float
%10 = fdiv float %7, %9
%11 = load float, float* %3
%12 = load float, float* %4
%13 = fsub float %11, %12
%14 = call float @abs(float %13)
%15 = call float @llvm.fmuladd.f32(float %10, float %14, float %5)
ret float %15
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define float @randInF(float %0, float %1) {
%3 = tail call i64 (...) @rand()
%4 = sitofp i64 %3 to float
%5 = load i64, i64* @RAND_MAX
%6 = sitofp i64 %5 to float
%7 = fdiv float %4, %6
%8 = fsub float %0, %1
%9 = tail call float @abs(float %8)
%10 = tail call float @llvm.fmuladd.f32(float %7, float %9, float %0)
ret float %10
}
int test() {
  int i, j, k;
  i = 0;
  while (i < 10) {
    if (i == 5)
      break;
    i++;
  }
  if (i != 5)
    return 1;
  j = 0, k = 0;
  do {
    if (j == 50) {
      j += 50;
      continue;
    }
    j++, k++;
  } while (j < 100);
  if (k != 50)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    1132 <test+0x32>
cmpl   $0x5,-0x8(%rbp)
jne    1124 <test+0x24>
jmp    1132 <test+0x32>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110b <test+0xb>
cmpl   $0x5,-0x8(%rbp)
je     1148 <test+0x48>
movl   $0x1,-0x4(%rbp)
jmp    11a7 <test+0xa7>
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x32,-0xc(%rbp)
jne    116e <test+0x6e>
mov    -0xc(%rbp),%eax
add    $0x32,%eax
mov    %eax,-0xc(%rbp)
jmp    1180 <test+0x80>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpl   $0x64,-0xc(%rbp)
jl     1156 <test+0x56>
cmpl   $0x32,-0x10(%rbp)
je     11a0 <test+0xa0>
movl   $0x1,-0x4(%rbp)
jmp    11a7 <test+0xa7>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %2
br label %5
5: ; preds = %12, %0
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 10
br i1 %7, label %8, label %15
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp eq i32 %9, 5
br i1 %10, label %11, label %12
11: ; preds = %8
br label %15
12: ; preds = %8
%13 = load i32, i32* %2
%14 = add nsw i32 %13, 1
store i32 %14, i32* %2
br label %5
15: ; preds = %11, %5
%16 = load i32, i32* %2
%17 = icmp ne i32 %16, 5
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 1, i32* %1
br label %39
19: ; preds = %15
store i32 0, i32* %3
store i32 0, i32* %4
br label %20
20: ; preds = %31, %19
%21 = load i32, i32* %3
%22 = icmp eq i32 %21, 50
br i1 %22, label %23, label %26
23: ; preds = %20
%24 = load i32, i32* %3
%25 = add nsw i32 %24, 50
store i32 %25, i32* %3
br label %31
26: ; preds = %20
%27 = load i32, i32* %3
%28 = add nsw i32 %27, 1
store i32 %28, i32* %3
%29 = load i32, i32* %4
%30 = add nsw i32 %29, 1
store i32 %30, i32* %4
br label %31
31: ; preds = %26, %23
%32 = load i32, i32* %3
%33 = icmp slt i32 %32, 100
br i1 %33, label %20, label %34
34: ; preds = %31
%35 = load i32, i32* %4
%36 = icmp ne i32 %35, 50
br i1 %36, label %37, label %38
37: ; preds = %34
store i32 1, i32* %1
br label %39
38: ; preds = %34
store i32 0, i32* %1
br label %39
39: ; preds = %38, %37, %18
%40 = load i32, i32* %1
ret i32 %40
}

LLVM IR (-O2):
define i32 @test() {
ret i32 0
}
/* Type definitions */
struct timespec {
  int tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void mydelay(int x) {
  struct timespec ts;
  ts.tv_sec = 0;
  ts.tv_nsec = x * 1000000;
  nanosleep(&ts, NULL);
}


x86 assembly (clang, -O0):
<mydelay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
imul   $0xf4240,-0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
lea    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mydelay>:
sub    $0x18,%rsp
movq   $0x0,0x10(%rsp)
imul   $0xf4240,%edi,%eax
mov    %eax,0x8(%rsp)
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
define void @mydelay(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
store i32 %0, i32* %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i64 0, i64* %4
%5 = load i32, i32* %2
%6 = mul nsw i32 %5, 1000000
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i32 %6, i32* %7
%8 = call i32 @nanosleep(%struct.timespec* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
define void @mydelay(i32 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i64 0, i64* %4
%5 = mul nsw i32 %0, 1000000
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i32 %5, i32* %6
%7 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
__attribute__((no, noclone)) unsigned short foo6(unsigned short arg) {
  unsigned short ret = 1;
  if (arg + 1 < ((!1) ? -(1L << (sizeof(char) * 8 - 1)) : 0) ||
      arg + 1 > ((!1) ? ((1L << (sizeof(char) * 8 - 1)) - 1)
                      : ((1L << (sizeof(char) * 8)) - 1)))
    return ret;
  arg = arg + 1;
  ret = (unsigned char)arg;
  return arg;
}


x86 assembly (clang, -O0):
<foo6>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x4(%rbp)
movw   $0x1,-0x6(%rbp)
movzwl -0x4(%rbp),%eax
add    $0x1,%eax
cltq
cmp    $0x0,%rax
jl     1139 <foo6+0x39>
movzwl -0x4(%rbp),%eax
add    $0x1,%eax
cltq
cmp    $0xff,%rax
jle    1146 <foo6+0x46>
mov    -0x6(%rbp),%ax
mov    %ax,-0x2(%rbp)
jmp    1164 <foo6+0x64>
movzwl -0x4(%rbp),%eax
add    $0x1,%eax
mov    %ax,-0x4(%rbp)
mov    -0x4(%rbp),%ax
movzbl %al,%eax
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo6>:
lea    0x1(%rdi),%ecx
cmp    $0xff,%edi
mov    $0x1,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define zeroext i16 @foo6(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 1, i16* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
%9 = icmp slt i64 %8, 0
br i1 %9, label %16, label %10
10: ; preds = %1
%11 = load i16, i16* %3
%12 = zext i16 %11 to i32
%13 = add nsw i32 %12, 1
%14 = sext i32 %13 to i64
%15 = icmp sgt i64 %14, 255
br i1 %15, label %16, label %18
16: ; preds = %10, %1
%17 = load i16, i16* %4
store i16 %17, i16* %2
br label %27
18: ; preds = %10
%19 = load i16, i16* %3
%20 = zext i16 %19 to i32
%21 = add nsw i32 %20, 1
%22 = trunc i32 %21 to i16
store i16 %22, i16* %3
%23 = load i16, i16* %3
%24 = trunc i16 %23 to i8
%25 = zext i8 %24 to i16
store i16 %25, i16* %4
%26 = load i16, i16* %3
store i16 %26, i16* %2
br label %27
27: ; preds = %18, %16
%28 = load i16, i16* %2
ret i16 %28
}

LLVM IR (-O2):
define zeroext i16 @foo6(i16 zeroext %0) {
%2 = add i16 %0, 1
%3 = icmp ugt i16 %0, 254
%4 = select i1 %3, i16 1, i16 %2
ret i16 %4
}
/* Variables and functions */
int /*<<< orphan*/ execI();
void intExecute() {
  for (;;)
    execI();
}


x86 assembly (clang, -O0):
<intExecute>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <intExecute+0x9>
mov    $0x0,%al
call   1030 <execI@plt>
jmp    1119 <intExecute+0x9>

x86 assembly (clang, -O2):
<intExecute>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <execI@plt>
jmp    1120 <intExecute+0x10>

LLVM IR (-O0):
define void @intExecute() {
br label %1
1: ; preds = %1, %0
%2 = call i32 (...) @execI()
br label %1
}

LLVM IR (-O2):
define void @intExecute() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @execI()
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ GPIOBaseValid(unsigned long);
void GPIODMATriggerDisable(unsigned long ulPort, unsigned char ucPins) {
  DEBUG_ASSERT(GPIOBaseValid(ulPort));
  (*((volatile unsigned long *)(ulPort + 0x00000534))) &= (~ucPins);
}


x86 assembly (clang, -O0):
<GPIODMATriggerDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GPIOBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
movzbl -0x9(%rbp),%eax
xor    $0xffffffff,%eax
movslq %eax,%rdx
mov    -0x8(%rbp),%rax
mov    0x534(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x534(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIODMATriggerDisable>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <GPIOBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    %ebp,%eax
not    %rax
and    %rax,0x534(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @GPIODMATriggerDisable(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i64, i64* %3
%6 = call i32 @GPIOBaseValid(i64 %5)
%7 = call i32 @DEBUG_ASSERT(i32 %6)
%8 = load i8, i8* %4
%9 = zext i8 %8 to i32
%10 = xor i32 %9, -1
%11 = sext i32 %10 to i64
%12 = load i64, i64* %3
%13 = add i64 %12, 1332
%14 = inttoptr i64 %13 to i64*
%15 = load volatile i64, i64* %14
%16 = and i64 %15, %11
store volatile i64 %16, i64* %14
ret void
}

LLVM IR (-O2):
define void @GPIODMATriggerDisable(i64 %0, i8 zeroext %1) {
%3 = tail call i32 @GPIOBaseValid(i64 %0)
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = zext i8 %1 to i64
%6 = xor i64 %5, -1
%7 = add i64 %0, 1332
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, %6
store volatile i64 %10, i64* %8
ret void
}
int test_llist_add() { return 0; }


x86 assembly (clang, -O0):
<test_llist_add>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_llist_add>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test_llist_add() {
ret i32 0
}

LLVM IR (-O2):
define i32 @test_llist_add() {
ret i32 0
}
/* Variables and functions */
int ffs(int);
int find_first_zero(unsigned x) { return ffs((int)(~x)) - 1; }


x86 assembly (clang, -O0):
<find_first_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    $0xffffffff,%edi
call   1030 <ffs@plt>
sub    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_first_zero>:
mov    %edi,%eax
not    %eax
bsf    %eax,%eax
cmp    $0xffffffff,%edi
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @find_first_zero(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, -1
%5 = call i32 @ffs(i32 %4)
%6 = sub nsw i32 %5, 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @find_first_zero(i32 %0) {
%2 = xor i32 %0, -1
%3 = tail call i32 @llvm.cttz.i32(i32 %2, i1 true)
%4 = icmp eq i32 %0, -1
%5 = select i1 %4, i32 -1, i32 %3
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ autogen_comment(int /*<<< orphan*/ *, char *);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/ *);
void emitheader(FILE *fp) {
  autogen_comment(fp, "devsw.c");
  fputs("#include <sys/param.h>\n"
        "#include <sys/conf.h>\n",
        fp);
}


x86 assembly (clang, -O0):
<emitheader>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <autogen_comment@plt>
mov    -0x8(%rbp),%rsi
lea    0xec1(%rip),%rdi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emitheader>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rsi
call   1030 <autogen_comment@plt>
lea    0xed1(%rip),%rdi
mov    $0x2d,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
pop    %rbx
jmp    1040 <fwrite@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"devsw.c\00"
@.str.1 = [46 x i8] c"#include <sys/param.h>\0A#include <sys/conf.h>\0A\00"
define void @emitheader(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @autogen_comment(i32* %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%5 = load i32*, i32** %2
%6 = call i32 @fputs(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.1, i64 0, i64 0), i32* %5)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"devsw.c\00"
@.str.1 = [46 x i8] c"#include <sys/param.h>\0A#include <sys/conf.h>\0A\00"
define void @emitheader(i32* %0) {
%2 = tail call i32 @autogen_comment(i32* %0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = tail call i64 @fwrite(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.1, i64 0, i64 0), i64 45, i64 1, i32* %0)
ret void
}
void RTAvlrUIntPtrGetLeft(void) {}


x86 assembly (clang, -O0):
<RTAvlrUIntPtrGetLeft>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlrUIntPtrGetLeft>:
ret

LLVM IR (-O0):
define void @RTAvlrUIntPtrGetLeft() {
ret void
}

LLVM IR (-O2):
define void @RTAvlrUIntPtrGetLeft() {
ret void
}
/* Variables and functions */
int isgraph(unsigned char);
int isgraph_c(char c) { return isgraph((unsigned char)c); }


x86 assembly (clang, -O0):
<isgraph_c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <isgraph@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isgraph_c>:
movzbl %dil,%edi
jmp    1030 <isgraph@plt>

LLVM IR (-O0):
define i32 @isgraph_c(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @isgraph(i8 zeroext %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @isgraph_c(i8 signext %0) {
%2 = tail call i32 @isgraph(i8 zeroext %0)
ret i32 %2
}
void gtk_frame_new() {}


x86 assembly (clang, -O0):
<gtk_frame_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_frame_new>:
ret

LLVM IR (-O0):
define void @gtk_frame_new() {
ret void
}

LLVM IR (-O2):
define void @gtk_frame_new() {
ret void
}
int gcd(int n, int m) {
  int temp = 0;
  while (m > 0) {
    temp = m;
    m = n % m;
    n = temp;
  }
  return n;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1136 <gcd+0x36>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1111 <gcd+0x11>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
test   %esi,%esi
jle    111d <gcd+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jg     1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load i32, i32* %4
store i32 %10, i32* %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
store i32 %13, i32* %4
%14 = load i32, i32* %5
store i32 %14, i32* %3
br label %6
15: ; preds = %6
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %5, %4 ], [ %0, %2 ]
%7 = srem i32 %6, %5
%8 = icmp sgt i32 %7, 0
br i1 %8, label %4, label %9
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %5, %4 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ restart(int);
void RST_28() { restart(0x28); }


x86 assembly (clang, -O0):
<RST_28>:
push   %rbp
mov    %rsp,%rbp
mov    $0x28,%edi
call   1030 <restart@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RST_28>:
mov    $0x28,%edi
jmp    1030 <restart@plt>

LLVM IR (-O0):
define void @RST_28() {
%1 = call i32 @restart(i32 40)
ret void
}

LLVM IR (-O2):
define void @RST_28() {
%1 = tail call i32 @restart(i32 40)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int runner();
int main() {
  printf("%d ", runner());
  printf("%d ", runner());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <runner@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <runner@plt>
mov    %eax,%esi
lea    0xeac(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <runner@plt>
lea    0xed1(%rip),%rbx
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
call   1040 <runner@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @runner()
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 (...) @runner()
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define i32 @main() {
%1 = tail call i32 (...) @runner()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @runner()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
main() {
  int x;
  void f(__typeof(x) *);
  f(&x);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1030 <f@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ compare_string(char *, char *);
int main(int argc, char *argv[]) {
  char *str1 = "abcbdcfedcba";
  char *str2 = "b\\*dcb";
  compare_string(str1, str2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    0xed5(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <compare_string@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xeee(%rip),%rsi
call   1030 <compare_string@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"abcbdcfedcba\00"
@.str.1 = [7 x i8] c"b\\*dcb\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8** %6
store i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8** %7
%8 = load i8*, i8** %6
%9 = load i8*, i8** %7
%10 = call i32 @compare_string(i8* %8, i8* %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"abcbdcfedcba\00"
@.str.1 = [7 x i8] c"b\\*dcb\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @compare_string(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void route_help(void) {
  printf(
      "route help:\n"
      "	A route has the following format: [ptr:]IP1[/IP2[/IP3...]]\n"
      "	where ptr is the exact value of the pointer that will be used for the "
      "IP\n"
      "	option (be careful, no check is performed on this pointer), and "
      "defaults\n"
      "	to 8, or 4 if provided route is too short for 8;\n"
      "	and each IPx field is an IP address to include in the source route.\n");
}


x86 assembly (clang, -O0):
<route_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<route_help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [340 x i8] c"route help:\0A\09A route has the following format: [ptr:]IP1[/IP2[/IP3...]]\0A\09where ptr is the exact value of the pointer that will be used for the IP\0A\09option (be careful, no check is performed on this pointer), and defaults\0A\09to 8, or 4 if provided route is too short for 8;\0A\09and each IPx field is an IP address to include in the source route.\0A\00"
define void @route_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([340 x i8], [340 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [339 x i8] c"route help:\0A\09A route has the following format: [ptr:]IP1[/IP2[/IP3...]]\0A\09where ptr is the exact value of the pointer that will be used for the IP\0A\09option (be careful, no check is performed on this pointer), and defaults\0A\09to 8, or 4 if provided route is too short for 8;\0A\09and each IPx field is an IP address to include in the source route.\00"
define void @route_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([339 x i8], [339 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ display();
int /*<<< orphan*/ init();
int /*<<< orphan*/ insert(int);
int main() {
  init();
  insert(1);
  insert(2);
  insert(3);
  insert(4);
  insert(5);
  insert(6);
  display();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <init@plt>
mov    $0x1,%edi
call   1050 <insert@plt>
mov    $0x2,%edi
call   1050 <insert@plt>
mov    $0x3,%edi
call   1050 <insert@plt>
mov    $0x4,%edi
call   1050 <insert@plt>
mov    $0x5,%edi
call   1050 <insert@plt>
mov    $0x6,%edi
call   1050 <insert@plt>
mov    $0x0,%al
call   1030 <display@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <init@plt>
mov    $0x1,%edi
call   1050 <insert@plt>
mov    $0x2,%edi
call   1050 <insert@plt>
mov    $0x3,%edi
call   1050 <insert@plt>
mov    $0x4,%edi
call   1050 <insert@plt>
mov    $0x5,%edi
call   1050 <insert@plt>
mov    $0x6,%edi
call   1050 <insert@plt>
xor    %eax,%eax
call   1030 <display@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @init()
%3 = call i32 @insert(i32 1)
%4 = call i32 @insert(i32 2)
%5 = call i32 @insert(i32 3)
%6 = call i32 @insert(i32 4)
%7 = call i32 @insert(i32 5)
%8 = call i32 @insert(i32 6)
%9 = call i32 (...) @display()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @init()
%2 = tail call i32 @insert(i32 1)
%3 = tail call i32 @insert(i32 2)
%4 = tail call i32 @insert(i32 3)
%5 = tail call i32 @insert(i32 4)
%6 = tail call i32 @insert(i32 5)
%7 = tail call i32 @insert(i32 6)
%8 = tail call i32 (...) @display()
ret i32 0
}
const char *ls_costN_nm4_name_out(int i) {
  switch (i) {
  case 0:
    return "o0";
  case 1:
    return "o1";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<ls_costN_nm4_name_out>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     112b <ls_costN_nm4_name_out+0x2b>
jmp    111a <ls_costN_nm4_name_out+0x1a>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
je     113b <ls_costN_nm4_name_out+0x3b>
jmp    114b <ls_costN_nm4_name_out+0x4b>
lea    0xece(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <ls_costN_nm4_name_out+0x53>
lea    0xec1(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1153 <ls_costN_nm4_name_out+0x53>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm4_name_out>:
xor    %ecx,%ecx
cmp    $0x1,%edi
lea    0xef7(%rip),%rax
cmove  %rax,%rcx
test   %edi,%edi
lea    0xee7(%rip),%rax
cmovne %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @ls_costN_nm4_name_out(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %7 [
i32 0, label %5
i32 1, label %6
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %8
6: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %8
7: ; preds = %1
store i8* null, i8** %2
br label %8
8: ; preds = %7, %6, %5
%9 = load i8*, i8** %2
ret i8* %9
}

LLVM IR (-O2):
@.str = [3 x i8] c"o0\00"
@.str.1 = [3 x i8] c"o1\00"
define i8* @ls_costN_nm4_name_out(i32 %0) {
%2 = icmp eq i32 %0, 1
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* null
%4 = icmp eq i32 %0, 0
%5 = select i1 %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3
ret i8* %5
}
/* Type definitions */
typedef int off_t;

/* Variables and functions */
void tea_decode_byte(unsigned char *v, int *k, off_t p) {
  unsigned char y[] = "NpK!TeA";
  *v = *v ^ (unsigned char)(k[p % 4] % 0xFF) ^ y[p];
}


x86 assembly (clang, -O0):
<tea_decode_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0xeea(%rip),%rax
mov    %rax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x14(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    -0x28(%rbp),%rax
movslq %edx,%rcx
mov    (%rax,%rcx,4),%eax
mov    $0xff,%ecx
cltd
idiv   %ecx
mov    -0x20(%rbp),%eax
mov    %dl,%cl
movzbl %cl,%ecx
xor    %ecx,%eax
movslq -0x14(%rbp),%rcx
movzbl -0x1c(%rbp,%rcx,1),%ecx
xor    %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tea_decode_byte>:
lea    0x3(%rdx),%eax
test   %edx,%edx
cmovns %edx,%eax
and    $0xfffffffc,%eax
movslq %edx,%rcx
sub    %eax,%edx
movslq %edx,%rax
movslq (%rsi,%rax,4),%rax
imul   $0xffffffff80808081,%rax,%rdx
shr    $0x20,%rdx
add    %eax,%edx
mov    %edx,%esi
shr    $0x1f,%esi
shr    $0x7,%edx
add    %esi,%edx
add    %eax,%edx
lea    0xec9(%rip),%rax
mov    (%rcx,%rax,1),%al
xor    (%rdi),%al
xor    %dl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
@__const.tea_decode_byte.y = [8 x i8] c"NpK!TeA\00"
define void @tea_decode_byte(i8* %0, i32* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca [8 x i8]
store i8* %0, i8** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%8 = bitcast [8 x i8]* %7 to i8*
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i32*, i32** %5
%13 = load i32, i32* %6
%14 = srem i32 %13, 4
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %12, i64 %15
%17 = load i32, i32* %16
%18 = srem i32 %17, 255
%19 = trunc i32 %18 to i8
%20 = zext i8 %19 to i32
%21 = xor i32 %11, %20
%22 = load i32, i32* %6
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds [8 x i8], [8 x i8]* %7, i64 0, i64 %23
%25 = load i8, i8* %24
%26 = zext i8 %25 to i32
%27 = xor i32 %21, %26
%28 = trunc i32 %27 to i8
%29 = load i8*, i8** %4
store i8 %28, i8* %29
ret void
}

LLVM IR (-O2):
@__const.tea_decode_byte.y = [8 x i8] c"NpK!TeA\00"
define void @tea_decode_byte(i8* nocapture %0, i32* nocapture %1, i32 %2) {
%4 = load i8, i8* %0
%5 = srem i32 %2, 4
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds i32, i32* %1, i64 %6
%8 = load i32, i32* %7
%9 = srem i32 %8, 255
%10 = sext i32 %2 to i64
%11 = getelementptr inbounds [8 x i8], [8 x i8]* @__const.tea_decode_byte.y, i64 0, i64 %10
%12 = load i8, i8* %11
%13 = trunc i32 %9 to i8
%14 = xor i8 %12, %4
%15 = xor i8 %14, %13
store i8 %15, i8* %0
ret void
}
/* Variables and functions */
scalar_t__ isalpha(char);
int hexa(char s) {
  if (isalpha(s)) {
    return s - 'a' + 10;
  } else {
    return s - '0';
  }
}


x86 assembly (clang, -O0):
<hexa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
je     1143 <hexa+0x33>
movsbl -0x5(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    114d <hexa+0x3d>
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexa>:
push   %rbx
mov    %edi,%ebx
call   1030 <isalpha@plt>
lea    -0x57(%rbx),%ecx
add    $0xffffffd0,%ebx
test   %rax,%rax
cmovne %ecx,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @hexa(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = call i64 @isalpha(i8 signext %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = sub nsw i32 %9, 97
%11 = add nsw i32 %10, 10
store i32 %11, i32* %2
br label %16
12: ; preds = %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = sub nsw i32 %14, 48
store i32 %15, i32* %2
br label %16
16: ; preds = %12, %7
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @hexa(i8 signext %0) {
%2 = tail call i64 @isalpha(i8 signext %0)
%3 = icmp eq i64 %2, 0
%4 = sext i8 %0 to i32
%5 = select i1 %3, i32 -48, i32 -87
%6 = add nsw i32 %5, %4
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ test_nc();
int /*<<< orphan*/ test_oc();
int /*<<< orphan*/ test_xc();
int main() {
  test_oc();
  test_nc();
  test_xc();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <test_oc@plt>
mov    $0x0,%al
call   1030 <test_nc@plt>
mov    $0x0,%al
call   1040 <test_xc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <test_oc@plt>
xor    %eax,%eax
call   1030 <test_nc@plt>
xor    %eax,%eax
call   1040 <test_xc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_oc()
%3 = call i32 (...) @test_nc()
%4 = call i32 (...) @test_xc()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_oc()
%2 = tail call i32 (...) @test_nc()
%3 = tail call i32 (...) @test_xc()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *, int);
void captura(int sennal) {
  printf("Capturada la señal %d\n", sennal);
  fflush(NULL);
  return;
}


x86 assembly (clang, -O0):
<captura>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<captura>:
push   %rax
mov    %edi,%esi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Capturada la se\C3\B1al %d\0A\00"
define void @captura(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 @fflush(i32* null)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"Capturada la se\C3\B1al %d\0A\00"
define void @captura(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = tail call i32 @fflush(i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ir_remote_init();
void init_custom_trigger(void) { ir_remote_init(); }


x86 assembly (clang, -O0):
<init_custom_trigger>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ir_remote_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_custom_trigger>:
xor    %eax,%eax
jmp    1030 <ir_remote_init@plt>

LLVM IR (-O0):
define void @init_custom_trigger() {
%1 = call i32 (...) @ir_remote_init()
ret void
}

LLVM IR (-O2):
define void @init_custom_trigger() {
%1 = tail call i32 (...) @ir_remote_init()
ret void
}
int function_with_param(int number, long data, char id) {
  printf("%s: num=%d data=0x%lx id=%c \n", __func__, number, data, id);
  return 0;
}


x86 assembly (clang, -O0):
<function_with_param>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x10(%rbp),%rcx
movsbl -0x11(%rbp),%r8d
lea    0xec9(%rip),%rdi
lea    0xee0(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_with_param>:
push   %rax
mov    %edx,%r8d
mov    %rsi,%rcx
mov    %edi,%edx
lea    0xee0(%rip),%rdi
lea    0xef7(%rip),%rsi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"%s: num=%d data=0x%lx id=%c \0A\00"
@__func__.function_with_param = [20 x i8] c"function_with_param\00"
define i32 @function_with_param(i32 %0, i64 %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i8
store i32 %0, i32* %4
store i64 %1, i64* %5
store i8 %2, i8* %6
%7 = load i32, i32* %4
%8 = load i64, i64* %5
%9 = load i8, i8* %6
%10 = sext i8 %9 to i32
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([20 x i8], [20 x i8]* @__func__.function_with_param, i64 0, i64 0), i32 %7, i64 %8, i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [30 x i8] c"%s: num=%d data=0x%lx id=%c \0A\00"
@__func__.function_with_param = [20 x i8] c"function_with_param\00"
define i32 @function_with_param(i32 %0, i64 %1, i8 signext %2) {
%4 = sext i8 %2 to i32
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([20 x i8], [20 x i8]* @__func__.function_with_param, i64 0, i64 0), i32 %0, i64 %1, i32 %4)
ret i32 0
}
/* Variables and functions */
int rand();
int genRandom(int x_min, int x_max) {
  return (rand() % (x_max - x_min)) + x_min;
}


x86 assembly (clang, -O0):
<genRandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    -0x4(%rbp),%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genRandom>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
sub    %ebp,%ebx
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @genRandom(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @rand()
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = srem i32 %5, %8
%10 = load i32, i32* %3
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @genRandom(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = sub nsw i32 %1, %0
%5 = srem i32 %3, %4
%6 = add nsw i32 %5, %0
ret i32 %6
}
int priority_calc(char op) {
  if (op == '+' || op == '-')
    return 1;
  if (op == '*' || op == '/')
    return 2;
  else
    return 3;
}


x86 assembly (clang, -O0):
<priority_calc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x2b,%eax
je     1124 <priority_calc+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x2d,%eax
jne    1130 <priority_calc+0x30>
movl   $0x1,-0x4(%rbp)
jmp    115d <priority_calc+0x5d>
movsbl -0x5(%rbp),%eax
cmp    $0x2a,%eax
je     114a <priority_calc+0x4a>
movsbl -0x5(%rbp),%eax
cmp    $0x2f,%eax
jne    1156 <priority_calc+0x56>
movl   $0x2,-0x4(%rbp)
jmp    115d <priority_calc+0x5d>
movl   $0x3,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<priority_calc>:
add    $0xd6,%dil
mov    $0x3,%eax
cmp    $0x5,%dil
ja     111d <priority_calc+0x1d>
movsbq %dil,%rax
lea    0xee6(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @priority_calc(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 43
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 45
br i1 %10, label %11, label %12
11: ; preds = %7, %1
store i32 1, i32* %2
br label %22
12: ; preds = %7
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp eq i32 %14, 42
br i1 %15, label %20, label %16
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 47
br i1 %19, label %20, label %21
20: ; preds = %16, %12
store i32 2, i32* %2
br label %22
21: ; preds = %16
store i32 3, i32* %2
br label %22
22: ; preds = %21, %20, %11
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
@switch.table.priority_calc = [6 x i32] [i32 2, i32 1, i32 3, i32 1, i32 3, i32 2]
define i32 @priority_calc(i8 signext %0) {
%2 = add i8 %0, -42
%3 = icmp ult i8 %2, 6
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i8 %2 to i64
%6 = getelementptr inbounds [6 x i32], [6 x i32]* @switch.table.priority_calc, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 3, %1 ]
ret i32 %9
}
int test_imm_CAuint32_mem(unsigned int *val) {
  return ((*val) & (0xCA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CAuint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xca,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CAuint32_mem>:
testb  $0xca,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CAuint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 202
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CAuint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 202
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
char memory_get_bit_from_byte(unsigned char value, unsigned char pos) {
  return ((value >> pos) & 0x1);
}


x86 assembly (clang, -O0):
<memory_get_bit_from_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
movzbl -0x2(%rbp),%ecx
sar    %cl,%eax
and    $0x1,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memory_get_bit_from_byte>:
mov    %esi,%ecx
mov    %edi,%eax
shr    %cl,%eax
and    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @memory_get_bit_from_byte(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = zext i8 %5 to i32
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = ashr i32 %6, %8
%10 = and i32 %9, 1
%11 = trunc i32 %10 to i8
ret i8 %11
}

LLVM IR (-O2):
define signext i8 @memory_get_bit_from_byte(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = lshr i32 %3, %4
%6 = trunc i32 %5 to i8
%7 = and i8 %6, 1
ret i8 %7
}
int main(int argc, char *argv[]) {
  extern int memory_perf(void);
  memory_perf();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
call   1030 <memory_perf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <memory_perf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @memory_perf()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @memory_perf()
ret i32 0
}
/* Type definitions */
struct hlist_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ hlist_unhashed(struct hlist_node *);
int hash_hashed(struct hlist_node *node) { return !hlist_unhashed(node); }


x86 assembly (clang, -O0):
<hash_hashed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <hlist_unhashed@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_hashed>:
push   %rax
call   1030 <hlist_unhashed@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.hlist_node = type { i32 }
define i32 @hash_hashed(%struct.hlist_node* %0) {
%2 = alloca %struct.hlist_node*
store %struct.hlist_node* %0, %struct.hlist_node** %2
%3 = load %struct.hlist_node*, %struct.hlist_node** %2
%4 = call i32 @hlist_unhashed(%struct.hlist_node* %3)
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
%struct.hlist_node = type { i32 }
define i32 @hash_hashed(%struct.hlist_node* %0) {
%2 = tail call i32 @hlist_unhashed(%struct.hlist_node* %0)
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}