xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ ehrpwm_reg_config(int /*<<< orphan*/, int, unsigned char,
                                     int);
int ehrpwm_pc_en_dis(uint8_t module, unsigned char chpen) {
  if (chpen > 1)
    return -1;
  ehrpwm_reg_config(module, 0x3C, chpen, (1 << 0));
  return 0;
}


x86 assembly (clang, -O0):
<ehrpwm_pc_en_dis>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
cmp    $0x1,%eax
jle    113a <ehrpwm_pc_en_dis+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1157 <ehrpwm_pc_en_dis+0x47>
mov    -0x8(%rbp),%edi
mov    $0x3c,%esi
mov    $0x1,%ecx
movzbl -0x9(%rbp),%edx
call   1030 <ehrpwm_reg_config@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ehrpwm_pc_en_dis>:
mov    $0xffffffff,%eax
cmp    $0x1,%sil
ja     1135 <ehrpwm_pc_en_dis+0x25>
push   %rax
movzbl %sil,%edx
mov    $0x3c,%esi
mov    $0x1,%ecx
call   1030 <ehrpwm_reg_config@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @ehrpwm_pc_en_dis(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8
store i32 %0, i32* %4
store i8 %1, i8* %5
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %14
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i8, i8* %5
%13 = call i32 @ehrpwm_reg_config(i32 %11, i32 60, i8 zeroext %12, i32 1)
store i32 0, i32* %3
br label %14
14: ; preds = %10, %9
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @ehrpwm_pc_en_dis(i32 %0, i8 zeroext %1) {
%3 = icmp ugt i8 %1, 1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @ehrpwm_reg_config(i32 %0, i32 60, i8 zeroext %1, i32 1)
br label %6
6: ; preds = %2, %4
%7 = phi i32 [ 0, %4 ], [ -1, %2 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ uart_wait_tx_empty();
int /*<<< orphan*/ uart_write(int, int);
void uart_putc(int c) {
  uart_wait_tx_empty();
  uart_write(0x0, c);
}


x86 assembly (clang, -O0):
<uart_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <uart_wait_tx_empty@plt>
mov    -0x4(%rbp),%esi
xor    %edi,%edi
call   1040 <uart_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_putc>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <uart_wait_tx_empty@plt>
xor    %edi,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1040 <uart_write@plt>

LLVM IR (-O0):
define void @uart_putc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @uart_wait_tx_empty()
%4 = load i32, i32* %2
%5 = call i32 @uart_write(i32 0, i32 %4)
ret void
}

LLVM IR (-O2):
define void @uart_putc(i32 %0) {
%2 = tail call i32 (...) @uart_wait_tx_empty()
%3 = tail call i32 @uart_write(i32 0, i32 %0)
ret void
}
__attribute__((always_)) int profile_init(void) { return 0; }


x86 assembly (clang, -O0):
<profile_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<profile_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @profile_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @profile_init() {
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long serial;
};
typedef TYPE_1__ XDestroyWindowEvent;

/* Variables and functions */
void set_XDestroyWindowEvent_serial(void *_p, unsigned long _v) {
  ((XDestroyWindowEvent *)_p)->serial = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XDestroyWindowEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XDestroyWindowEvent_serial>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XDestroyWindowEvent_serial(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XDestroyWindowEvent_serial(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "usage: ausyscall [arch] name | number | --dump | --exact\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [58 x i8] c"usage: ausyscall [arch] name | number | --dump | --exact\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [58 x i8] c"usage: ausyscall [arch] name | number | --dump | --exact\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
int round_div(int x, int y) {
  int quotient = x / y;
  int dblremain = (x % y) << 1;
  if ((dblremain > y) || (dblremain == y) && (quotient & 1))
    quotient++;
  return quotient;
}


x86 assembly (clang, -O0):
<round_div>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
shl    $0x1,%edx
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1148 <round_div+0x48>
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1151 <round_div+0x51>
mov    -0xc(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1151 <round_div+0x51>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_div>:
mov    %edi,%eax
cltd
idiv   %esi
add    %edx,%edx
cmp    %esi,%edx
jg     1113 <round_div+0x13>
test   $0x1,%al
je     1116 <round_div+0x16>
cmp    %esi,%edx
jne    1116 <round_div+0x16>
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @round_div(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = sdiv i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = srem i32 %10, %11
%13 = shl i32 %12, 1
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = load i32, i32* %4
%16 = icmp sgt i32 %14, %15
br i1 %16, label %25, label %17
17: ; preds = %2
%18 = load i32, i32* %6
%19 = load i32, i32* %4
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %28
21: ; preds = %17
%22 = load i32, i32* %5
%23 = and i32 %22, 1
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %28
25: ; preds = %21, %2
%26 = load i32, i32* %5
%27 = add nsw i32 %26, 1
store i32 %27, i32* %5
br label %28
28: ; preds = %25, %21, %17
%29 = load i32, i32* %5
ret i32 %29
}

LLVM IR (-O2):
define i32 @round_div(i32 %0, i32 %1) {
%3 = sdiv i32 %0, %1
%4 = srem i32 %0, %1
%5 = shl i32 %4, 1
%6 = icmp sgt i32 %5, %1
br i1 %6, label %12, label %7
7: ; preds = %2
%8 = icmp ne i32 %5, %1
%9 = and i32 %3, 1
%10 = icmp eq i32 %9, 0
%11 = or i1 %10, %8
br i1 %11, label %14, label %12
12: ; preds = %7, %2
%13 = add nsw i32 %3, 1
br label %14
14: ; preds = %12, %7
%15 = phi i32 [ %13, %12 ], [ %3, %7 ]
ret i32 %15
}
/* Variables and functions */
scalar_t__ __get_cpuid(int, unsigned int *, unsigned int *, unsigned int *,
                       unsigned int *);
bool cpu_has_msr() {
  unsigned int a, b, c, d;
  if (__get_cpuid(1, &a, &b, &c, &d)) {
    return (d & (1 << 5));
  }
  return false;
}


x86 assembly (clang, -O0):
<cpu_has_msr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x1,%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1030 <__get_cpuid@plt>
cmp    $0x0,%rax
je     114a <cpu_has_msr+0x3a>
mov    -0x14(%rbp),%eax
and    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    1151 <cpu_has_msr+0x41>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_has_msr>:
sub    $0x18,%rsp
lea    0x14(%rsp),%rsi
lea    0x10(%rsp),%rdx
lea    0xc(%rsp),%rcx
lea    0x8(%rsp),%r8
mov    $0x1,%edi
call   1030 <__get_cpuid@plt>
mov    0x8(%rsp),%edx
and    $0x20,%edx
xor    %ecx,%ecx
test   %rax,%rax
cmovne %edx,%ecx
mov    %ecx,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @cpu_has_msr() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = call i64 @__get_cpuid(i32 1, i32* %2, i32* %3, i32* %4, i32* %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %0
%9 = load i32, i32* %5
%10 = and i32 %9, 32
store i32 %10, i32* %1
br label %12
11: ; preds = %0
store i32 0, i32* %1
br label %12
12: ; preds = %11, %8
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @cpu_has_msr() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = call i64 @__get_cpuid(i32 1, i32* %1, i32* %2, i32* %3, i32* %4)
%10 = icmp eq i64 %9, 0
%11 = load i32, i32* %4
%12 = and i32 %11, 32
%13 = select i1 %10, i32 0, i32 %12
ret i32 %13
}
/* Variables and functions */
int assume_default_colors(int, int);
int use_default_colors() { return (assume_default_colors(-1, -1)); }


x86 assembly (clang, -O0):
<use_default_colors>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%esi
mov    %esi,%edi
call   1030 <assume_default_colors@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<use_default_colors>:
mov    $0xffffffff,%edi
mov    $0xffffffff,%esi
jmp    1030 <assume_default_colors@plt>

LLVM IR (-O0):
define i32 @use_default_colors() {
%1 = call i32 @assume_default_colors(i32 -1, i32 -1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @use_default_colors() {
%1 = tail call i32 @assume_default_colors(i32 -1, i32 -1)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_get_binary_name() {
  printf("NOT IMPLEMENTED:"
         "pa_get_binary_name"
         "\n");
}


x86 assembly (clang, -O0):
<pa_get_binary_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_get_binary_name>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"NOT IMPLEMENTED:pa_get_binary_name\0A\00"
define i32 @pa_get_binary_name() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [35 x i8] c"NOT IMPLEMENTED:pa_get_binary_name\00"
define i32 @pa_get_binary_name() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
unsigned long cris_swapnwbrlz(unsigned long);
unsigned long ffz(unsigned long w) { return cris_swapnwbrlz(w); }


x86 assembly (clang, -O0):
<ffz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cris_swapnwbrlz@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffz>:
jmp    1030 <cris_swapnwbrlz@plt>

LLVM IR (-O0):
define i64 @ffz(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @cris_swapnwbrlz(i64 %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @ffz(i64 %0) {
%2 = tail call i64 @cris_swapnwbrlz(i64 %0)
ret i64 %2
}
/* Variables and functions */
scalar_t__ pmalloc_get_rss();
float pmalloc_used_memory();
float pmalloc_get_fragmentation_ratio(void) {
  return (float)pmalloc_get_rss() / pmalloc_used_memory();
}


x86 assembly (clang, -O0):
<pmalloc_get_fragmentation_ratio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <pmalloc_get_rss@plt>
cvtsi2ss %rax,%xmm0
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <pmalloc_used_memory@plt>
movaps %xmm0,%xmm1
movss  -0x4(%rbp),%xmm0
divss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmalloc_get_fragmentation_ratio>:
push   %rax
xor    %eax,%eax
call   1040 <pmalloc_get_rss@plt>
cvtsi2ss %rax,%xmm0
movss  %xmm0,0x4(%rsp)
xor    %eax,%eax
call   1030 <pmalloc_used_memory@plt>
movss  0x4(%rsp),%xmm1
divss  %xmm0,%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @pmalloc_get_fragmentation_ratio() {
%1 = call i64 (...) @pmalloc_get_rss()
%2 = sitofp i64 %1 to float
%3 = call float (...) @pmalloc_used_memory()
%4 = fdiv float %2, %3
ret float %4
}

LLVM IR (-O2):
define float @pmalloc_get_fragmentation_ratio() {
%1 = tail call i64 (...) @pmalloc_get_rss()
%2 = sitofp i64 %1 to float
%3 = tail call float (...) @pmalloc_used_memory()
%4 = fdiv float %2, %3
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ Putw(int, unsigned int);
extern void SetPatternLocation(unsigned offset) { Putw(0x34, offset); }


x86 assembly (clang, -O0):
<SetPatternLocation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x34,%edi
call   1030 <Putw@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetPatternLocation>:
mov    %edi,%esi
mov    $0x34,%edi
jmp    1030 <Putw@plt>

LLVM IR (-O0):
define void @SetPatternLocation(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @Putw(i32 52, i32 %3)
ret void
}

LLVM IR (-O2):
define void @SetPatternLocation(i32 %0) {
%2 = tail call i32 @Putw(i32 52, i32 %0)
ret void
}
/* Variables and functions */
int atoi(char *);
int domain_name_to_id(char *name) { return atoi(name); }


x86 assembly (clang, -O0):
<domain_name_to_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atoi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<domain_name_to_id>:
jmp    1030 <atoi@plt>

LLVM IR (-O0):
define i32 @domain_name_to_id(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @atoi(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @domain_name_to_id(i8* nocapture %0) {
%2 = tail call i32 @atoi(i8* %0)
ret i32 %2
}
float fmul32(float x, float y) { return x * y; }


x86 assembly (clang, -O0):
<fmul32>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmul32>:
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @fmul32(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fmul float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @fmul32(float %0, float %1) {
%3 = fmul float %0, %1
ret float %3
}
void set_bit(long __bit, void *__bitmap) {
  asm volatile("bts %1,%0"
               : "+m"(*(unsigned char *)__bitmap)
               : "Ir"(__bit)
               : "memory");
}


x86 assembly (clang, -O0):
<set_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
bts    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bit>:
bts    %rdi,(%rsi)
ret

LLVM IR (-O0):
define void @set_bit(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i64, i64* %3
ret void
}

LLVM IR (-O2):
define void @set_bit(i64 %0, i8* %1) {
tail call void asm sideeffect "bts $1,$0", "=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %1, i64 %0, i8* elementtype(i8) %1)
ret void
}
void flush_cache_all(void) {}


x86 assembly (clang, -O0):
<flush_cache_all>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_cache_all>:
ret

LLVM IR (-O0):
define void @flush_cache_all() {
ret void
}

LLVM IR (-O2):
define void @flush_cache_all() {
ret void
}
char *pwskip(char *p) {
  while (*p && *p != ':' && *p != '\n')
    ++p;
  if (*p)
    *p++ = 0;
  else
    p[1] = 0;
  return (p);
}


x86 assembly (clang, -O0):
<pwskip>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     1142 <pwskip+0x42>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x3a,%ecx
mov    %al,-0x9(%rbp)
je     1142 <pwskip+0x42>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1152 <pwskip+0x52>
jmp    1163 <pwskip+0x63>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <pwskip+0x8>
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1187 <pwskip+0x87>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movb   $0x0,(%rax)
jmp    118f <pwskip+0x8f>
mov    -0x8(%rbp),%rax
movb   $0x0,0x1(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwskip>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rax),%ecx
test   %cl,%cl
je     1132 <pwskip+0x32>
cmp    $0xa,%cl
je     1127 <pwskip+0x27>
cmp    $0x3a,%cl
je     1127 <pwskip+0x27>
add    $0x1,%rax
jmp    1110 <pwskip+0x10>
mov    %rax,%rcx
add    $0x1,%rax
movb   $0x0,(%rcx)
ret
lea    0x1(%rax),%rcx
movb   $0x0,(%rcx)
ret

LLVM IR (-O0):
define i8* @pwskip(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %20, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 58
br i1 %12, label %13, label %18
13: ; preds = %8
%14 = load i8*, i8** %2
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp ne i32 %16, 10
br label %18
18: ; preds = %13, %8, %3
%19 = phi i1 [ false, %8 ], [ false, %3 ], [ %17, %13 ]
br i1 %19, label %20, label %23
20: ; preds = %18
%21 = load i8*, i8** %2
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %2
br label %3
23: ; preds = %18
%24 = load i8*, i8** %2
%25 = load i8, i8* %24
%26 = icmp ne i8 %25, 0
br i1 %26, label %27, label %30
27: ; preds = %23
%28 = load i8*, i8** %2
%29 = getelementptr inbounds i8, i8* %28, i32 1
store i8* %29, i8** %2
store i8 0, i8* %28
br label %33
30: ; preds = %23
%31 = load i8*, i8** %2
%32 = getelementptr inbounds i8, i8* %31, i64 1
store i8 0, i8* %32
br label %33
33: ; preds = %30, %27
%34 = load i8*, i8** %2
ret i8* %34
}

LLVM IR (-O2):
define i8* @pwskip(i8* %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 0, label %9
i8 10, label %7
i8 58, label %7
]
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2, %2
%8 = getelementptr inbounds i8, i8* %3, i64 1
br label %11
9: ; preds = %2
%10 = getelementptr inbounds i8, i8* %3, i64 1
br label %11
11: ; preds = %9, %7
%12 = phi i8* [ %10, %9 ], [ %3, %7 ]
%13 = phi i8* [ %3, %9 ], [ %8, %7 ]
store i8 0, i8* %12
ret i8* %13
}
void RTAvlGCPtrDoWithAll(void) {}


x86 assembly (clang, -O0):
<RTAvlGCPtrDoWithAll>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlGCPtrDoWithAll>:
ret

LLVM IR (-O0):
define void @RTAvlGCPtrDoWithAll() {
ret void
}

LLVM IR (-O2):
define void @RTAvlGCPtrDoWithAll() {
ret void
}
adrx0regx1(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{
  if ((((int *)10000000)[x0]) <= (p1[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<adrx0regx1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
movslq -0x10(%rbp),%rcx
mov    $0x989680,%eax
mov    (%rax,%rcx,4),%eax
mov    -0x28(%rbp),%rcx
movslq -0x14(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
jg     1141 <adrx0regx1+0x41>
movl   $0x1,-0x4(%rbp)
jmp    1148 <adrx0regx1+0x48>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adrx0regx1>:
movslq %edx,%rax
mov    0x989680(,%rax,4),%edx
movslq %ecx,%rcx
xor    %eax,%eax
cmp    (%r9,%rcx,4),%edx
setle  %al
ret

LLVM IR (-O0):
define i32 @adrx0regx1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32, i32* %10
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* inttoptr (i64 10000000 to i32*), i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %13
%19 = load i32, i32* %11
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
%22 = load i32, i32* %21
%23 = icmp sle i32 %17, %22
br i1 %23, label %24, label %25
24: ; preds = %6
store i32 1, i32* %7
br label %26
25: ; preds = %6
store i32 0, i32* %7
br label %26
26: ; preds = %25, %24
%27 = load i32, i32* %7
ret i32 %27
}

LLVM IR (-O2):
define i32 @adrx0regx1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture readnone %4, i32* nocapture %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* inttoptr (i64 10000000 to i32*), i64 %7
%9 = load i32, i32* %8
%10 = sext i32 %3 to i64
%11 = getelementptr inbounds i32, i32* %5, i64 %10
%12 = load i32, i32* %11
%13 = icmp sle i32 %9, %12
%14 = zext i1 %13 to i32
ret i32 %14
}
/* Type definitions */
struct ttfinfo {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ getushort(int /*<<< orphan*/ *);
int /*<<< orphan*/ showagproperties(int /*<<< orphan*/);
void prop_show(FILE *ttf, struct ttfinfo *info) {
  showagproperties(getushort(ttf));
}


x86 assembly (clang, -O0):
<prop_show>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <getushort@plt>
mov    %eax,%edi
call   1030 <showagproperties@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prop_show>:
push   %rax
call   1040 <getushort@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <showagproperties@plt>

LLVM IR (-O0):
%struct.ttfinfo = type { i32 }
define void @prop_show(i32* %0, %struct.ttfinfo* %1) {
%3 = alloca i32*
%4 = alloca %struct.ttfinfo*
store i32* %0, i32** %3
store %struct.ttfinfo* %1, %struct.ttfinfo** %4
%5 = load i32*, i32** %3
%6 = call i32 @getushort(i32* %5)
%7 = call i32 @showagproperties(i32 %6)
ret void
}

LLVM IR (-O2):
%struct.ttfinfo = type { i32 }
define void @prop_show(i32* %0, %struct.ttfinfo* nocapture readnone %1) {
%3 = tail call i32 @getushort(i32* %0)
%4 = tail call i32 @showagproperties(i32 %3)
ret void
}
/* Type definitions */
struct feed_text_iterator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/
feed_text_iterator_invalidate_glyph(struct feed_text_iterator *const);
int /*<<< orphan*/
feed_text_iterator_invalidate_line(struct feed_text_iterator *const);
void feed_text_iterator_invalidate(
    struct feed_text_iterator *const p_text_iterator) {
  feed_text_iterator_invalidate_line(p_text_iterator);
  feed_text_iterator_invalidate_glyph(p_text_iterator);
}


x86 assembly (clang, -O0):
<feed_text_iterator_invalidate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <feed_text_iterator_invalidate_line@plt>
mov    -0x8(%rbp),%rdi
call   1040 <feed_text_iterator_invalidate_glyph@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<feed_text_iterator_invalidate>:
push   %rbx
mov    %rdi,%rbx
call   1030 <feed_text_iterator_invalidate_line@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <feed_text_iterator_invalidate_glyph@plt>

LLVM IR (-O0):
%struct.feed_text_iterator = type { i32 }
define void @feed_text_iterator_invalidate(%struct.feed_text_iterator* %0) {
%2 = alloca %struct.feed_text_iterator*
store %struct.feed_text_iterator* %0, %struct.feed_text_iterator** %2
%3 = load %struct.feed_text_iterator*, %struct.feed_text_iterator** %2
%4 = call i32 @feed_text_iterator_invalidate_line(%struct.feed_text_iterator* %3)
%5 = load %struct.feed_text_iterator*, %struct.feed_text_iterator** %2
%6 = call i32 @feed_text_iterator_invalidate_glyph(%struct.feed_text_iterator* %5)
ret void
}

LLVM IR (-O2):
%struct.feed_text_iterator = type { i32 }
define void @feed_text_iterator_invalidate(%struct.feed_text_iterator* %0) {
%2 = tail call i32 @feed_text_iterator_invalidate_line(%struct.feed_text_iterator* %0)
%3 = tail call i32 @feed_text_iterator_invalidate_glyph(%struct.feed_text_iterator* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ st103_set_cntr(int);
int /*<<< orphan*/ usb_lld_sys_shutdown();
void usb_lld_shutdown(void) {
  st103_set_cntr((0x0002));
  usb_lld_sys_shutdown();
}


x86 assembly (clang, -O0):
<usb_lld_shutdown>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1040 <st103_set_cntr@plt>
mov    $0x0,%al
call   1030 <usb_lld_sys_shutdown@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usb_lld_shutdown>:
push   %rax
mov    $0x2,%edi
call   1040 <st103_set_cntr@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <usb_lld_sys_shutdown@plt>

LLVM IR (-O0):
define void @usb_lld_shutdown() {
%1 = call i32 @st103_set_cntr(i32 2)
%2 = call i32 (...) @usb_lld_sys_shutdown()
ret void
}

LLVM IR (-O2):
define void @usb_lld_shutdown() {
%1 = tail call i32 @st103_set_cntr(i32 2)
%2 = tail call i32 (...) @usb_lld_sys_shutdown()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pollen_interfaces_Gpio_clear__E();
void pollen_parts_Led_off__E() {
  { pollen_interfaces_Gpio_clear__E(); }
}


x86 assembly (clang, -O0):
<pollen_parts_Led_off__E>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pollen_interfaces_Gpio_clear__E@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_parts_Led_off__E>:
xor    %eax,%eax
jmp    1030 <pollen_interfaces_Gpio_clear__E@plt>

LLVM IR (-O0):
define void @pollen_parts_Led_off__E() {
%1 = call i32 (...) @pollen_interfaces_Gpio_clear__E()
ret void
}

LLVM IR (-O2):
define void @pollen_parts_Led_off__E() {
%1 = tail call i32 (...) @pollen_interfaces_Gpio_clear__E()
ret void
}
void YUY2ToUVRow_C() {}


x86 assembly (clang, -O0):
<YUY2ToUVRow_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<YUY2ToUVRow_C>:
ret

LLVM IR (-O0):
define void @YUY2ToUVRow_C() {
ret void
}

LLVM IR (-O2):
define void @YUY2ToUVRow_C() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float, float, float);
main() {
  float v1 = 5.0, v2 = -4.5, v3 = 11.25;
  printf("Your numbers are:\nv1: %.0f\nv2: %.1f\nv3: %.2f\n", v1, v2, v3);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  0xee8(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  0xed7(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  0xec6(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef4(%rip),%rdi
movss  0xee0(%rip),%xmm0
movss  0xedc(%rip),%xmm1
movss  0xed8(%rip),%xmm2
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [46 x i8] c"Your numbers are:\0Av1: %.0f\0Av2: %.1f\0Av3: %.2f\0A\00"
define i32 @main() {
%1 = alloca float
%2 = alloca float
%3 = alloca float
store float 5.000000e+00, float* %1
store float -4.500000e+00, float* %2
store float 1.125000e+01, float* %3
%4 = load float, float* %1
%5 = load float, float* %2
%6 = load float, float* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), float %4, float %5, float %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [46 x i8] c"Your numbers are:\0Av1: %.0f\0Av2: %.1f\0Av3: %.2f\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0), float 5.000000e+00, float -4.500000e+00, float 1.125000e+01)
ret i32 0
}
void rop3_242_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~S;
  stk2 = *D & stk3;
  stk1 = T | stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_242_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_242_1_1>:
ret

LLVM IR (-O0):
define void @rop3_242_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = xor i32 %11, -1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %9
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = and i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %6
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = or i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = load i8, i8* %6
%34 = zext i8 %33 to i32
%35 = xor i32 %34, -1
%36 = and i32 %32, %35
%37 = load i8*, i8** %4
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = load i8, i8* %5
%41 = zext i8 %40 to i32
%42 = and i32 %39, %41
%43 = or i32 %36, %42
%44 = load i8*, i8** %4
%45 = load i8, i8* %44
%46 = zext i8 %45 to i32
%47 = load i8, i8* %6
%48 = zext i8 %47 to i32
%49 = and i32 %46, %48
%50 = or i32 %43, %49
%51 = trunc i32 %50 to i8
%52 = load i8*, i8** %4
store i8 %51, i8* %52
ret void
}

LLVM IR (-O2):
define void @rop3_242_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
ret void
}
/* Variables and functions */
float powf(float, int);
float cbrtf(float x) { return powf(x, 1. / 3.); }


x86 assembly (clang, -O0):
<cbrtf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xor    %edi,%edi
call   1030 <powf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbrtf>:
xor    %edi,%edi
jmp    1030 <powf@plt>

LLVM IR (-O0):
define float @cbrtf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @powf(float %3, i32 0)
ret float %4
}

LLVM IR (-O2):
define float @cbrtf(float %0) {
%2 = tail call float @powf(float %0, i32 0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ ExtendString(char **, char *, int *);
int /*<<< orphan*/ Free(void **);
void ExtendAndFree(char **Buffer, char *WithThisToFree, int *BufferSize) {
  ExtendString(Buffer, WithThisToFree, BufferSize);
  Free((void **)&WithThisToFree);
}


x86 assembly (clang, -O0):
<ExtendAndFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <ExtendString@plt>
lea    -0x10(%rbp),%rdi
call   1030 <Free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExtendAndFree>:
push   %rax
mov    %rsi,(%rsp)
call   1040 <ExtendString@plt>
mov    %rsp,%rdi
call   1030 <Free@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @ExtendAndFree(i8** %0, i8* %1, i32* %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i32*
store i8** %0, i8*** %4
store i8* %1, i8** %5
store i32* %2, i32** %6
%7 = load i8**, i8*** %4
%8 = load i8*, i8** %5
%9 = load i32*, i32** %6
%10 = call i32 @ExtendString(i8** %7, i8* %8, i32* %9)
%11 = call i32 @Free(i8** %5)
ret void
}

LLVM IR (-O2):
define void @ExtendAndFree(i8** %0, i8* %1, i32* %2) {
%4 = alloca i8*
store i8* %1, i8** %4
%5 = tail call i32 @ExtendString(i8** %0, i8* %1, i32* %2)
%6 = call i32 @Free(i8** %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ handle_47(int /*<<< orphan*/);
int gen_47(void) {
  handle_47(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_47>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_47@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_47>:
push   %rax
xor    %edi,%edi
call   1030 <handle_47@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_47() {
%1 = call i32 @handle_47(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_47() {
%1 = tail call i32 @handle_47(i32 0)
ret i32 0
}
void *f1() {
  int *ptr = (int *)0xabcd;
  return ptr;
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xabcd,%eax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
mov    $0xabcd,%eax
ret

LLVM IR (-O0):
define i8* @f1() {
%1 = alloca i32*
store i32* inttoptr (i64 43981 to i32*), i32** %1
%2 = load i32*, i32** %1
%3 = bitcast i32* %2 to i8*
ret i8* %3
}

LLVM IR (-O2):
define i8* @f1() {
ret i8* inttoptr (i64 43981 to i8*)
}
double radius_from_max_dimension(double radius_equat_minor,
                                 double radius_equat_major,
                                 double radius_polar) {
  const double rad_equat_max =
      (radius_equat_minor < radius_equat_major ? radius_equat_major
                                               : radius_equat_minor);
  return (rad_equat_max > radius_polar ? rad_equat_max : radius_polar);
}


x86 assembly (clang, -O0):
<radius_from_max_dimension>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1136 <radius_from_max_dimension+0x36>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
jmp    1140 <radius_from_max_dimension+0x40>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    1169 <radius_from_max_dimension+0x69>
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
jmp    1173 <radius_from_max_dimension+0x73>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
movsd  -0x30(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<radius_from_max_dimension>:
maxsd  %xmm0,%xmm1
maxsd  %xmm2,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @radius_from_max_dimension(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %4
%9 = load double, double* %5
%10 = fcmp olt double %8, %9
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load double, double* %5
br label %15
13: ; preds = %3
%14 = load double, double* %4
br label %15
15: ; preds = %13, %11
%16 = phi double [ %12, %11 ], [ %14, %13 ]
store double %16, double* %7
%17 = load double, double* %7
%18 = load double, double* %6
%19 = fcmp ogt double %17, %18
br i1 %19, label %20, label %22
20: ; preds = %15
%21 = load double, double* %7
br label %24
22: ; preds = %15
%23 = load double, double* %6
br label %24
24: ; preds = %22, %20
%25 = phi double [ %21, %20 ], [ %23, %22 ]
ret double %25
}

LLVM IR (-O2):
define double @radius_from_max_dimension(double %0, double %1, double %2) {
%4 = fcmp olt double %0, %1
%5 = select i1 %4, double %1, double %0
%6 = fcmp ogt double %5, %2
%7 = select i1 %6, double %5, double %2
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ SetFontSize107(unsigned long, unsigned long);
void setfontsize(unsigned long w, unsigned long h) { SetFontSize107(w, h); }


x86 assembly (clang, -O0):
<setfontsize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <SetFontSize107@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setfontsize>:
jmp    1030 <SetFontSize107@plt>

LLVM IR (-O0):
define void @setfontsize(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @SetFontSize107(i64 %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @setfontsize(i64 %0, i64 %1) {
%3 = tail call i32 @SetFontSize107(i64 %0, i64 %1)
ret void
}
void control_access_block_zap(unsigned char gid) {}


x86 assembly (clang, -O0):
<control_access_block_zap>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<control_access_block_zap>:
ret

LLVM IR (-O0):
define void @control_access_block_zap(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @control_access_block_zap(i8 zeroext %0) {
ret void
}
/* Type definitions */
struct Cyc_List_List {
  int dummy;
};
struct Cyc_IOEffect_Fenv {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Cyc_IOEffect___check_access(struct Cyc_IOEffect_Fenv *,
                                               unsigned int,
                                               struct Cyc_List_List *, void *,
                                               int);
void Cyc_IOEffect_check_live(struct Cyc_IOEffect_Fenv *fe, unsigned loc,
                             struct Cyc_List_List *f, void *t) {
  ({ Cyc_IOEffect___check_access(fe, loc, f, t, 1); });
}


x86 assembly (clang, -O0):
<Cyc_IOEffect_check_live>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x1,%r8d
call   1030 <Cyc_IOEffect___check_access@plt>
mov    %eax,-0x24(%rbp)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_IOEffect_check_live>:
mov    $0x1,%r8d
jmp    1030 <Cyc_IOEffect___check_access@plt>

LLVM IR (-O0):
%struct.Cyc_IOEffect_Fenv = type { i32 }
%struct.Cyc_List_List = type { i32 }
define void @Cyc_IOEffect_check_live(%struct.Cyc_IOEffect_Fenv* %0, i32 %1, %struct.Cyc_List_List* %2, i8* %3) {
%5 = alloca %struct.Cyc_IOEffect_Fenv*
%6 = alloca i32
%7 = alloca %struct.Cyc_List_List*
%8 = alloca i8*
%9 = alloca i32
store %struct.Cyc_IOEffect_Fenv* %0, %struct.Cyc_IOEffect_Fenv** %5
store i32 %1, i32* %6
store %struct.Cyc_List_List* %2, %struct.Cyc_List_List** %7
store i8* %3, i8** %8
%10 = load %struct.Cyc_IOEffect_Fenv*, %struct.Cyc_IOEffect_Fenv** %5
%11 = load i32, i32* %6
%12 = load %struct.Cyc_List_List*, %struct.Cyc_List_List** %7
%13 = load i8*, i8** %8
%14 = call i32 @Cyc_IOEffect___check_access(%struct.Cyc_IOEffect_Fenv* %10, i32 %11, %struct.Cyc_List_List* %12, i8* %13, i32 1)
store i32 %14, i32* %9
%15 = load i32, i32* %9
ret void
}

LLVM IR (-O2):
%struct.Cyc_IOEffect_Fenv = type { i32 }
%struct.Cyc_List_List = type { i32 }
define void @Cyc_IOEffect_check_live(%struct.Cyc_IOEffect_Fenv* %0, i32 %1, %struct.Cyc_List_List* %2, i8* %3) {
%5 = tail call i32 @Cyc_IOEffect___check_access(%struct.Cyc_IOEffect_Fenv* %0, i32 %1, %struct.Cyc_List_List* %2, i8* %3, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CG_Argv(int);
int /*<<< orphan*/ CG_Printf(char *);
int trap_Argc();
int /*<<< orphan*/ trap_SendConsoleCommand(int /*<<< orphan*/);
int /*<<< orphan*/ va(char *, int /*<<< orphan*/);
void CG_vstrUp_f(void) {
  if (trap_Argc() == 5) {
    trap_SendConsoleCommand(va("vstr %s;", CG_Argv(2)));
  } else {
    CG_Printf("[cgnotify]Usage: +vstr [down_vstr] [up_vstr]\n");
  }
}


x86 assembly (clang, -O0):
<CG_vstrUp_f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <trap_Argc@plt>
cmp    $0x5,%eax
jne    1188 <CG_vstrUp_f+0x38>
mov    $0x2,%edi
call   1030 <CG_Argv@plt>
mov    %eax,%esi
lea    0xe89(%rip),%rdi
call   1060 <va@plt>
mov    %eax,%edi
call   1070 <trap_SendConsoleCommand@plt>
jmp    1194 <CG_vstrUp_f+0x44>
lea    0xe7a(%rip),%rdi
call   1050 <CG_Printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_vstrUp_f>:
push   %rax
xor    %eax,%eax
call   1040 <trap_Argc@plt>
cmp    $0x5,%eax
jne    117d <CG_vstrUp_f+0x2d>
mov    $0x2,%edi
call   1030 <CG_Argv@plt>
lea    0xe92(%rip),%rdi
mov    %eax,%esi
call   1060 <va@plt>
mov    %eax,%edi
pop    %rax
jmp    1070 <trap_SendConsoleCommand@plt>
lea    0xe85(%rip),%rdi
pop    %rax
jmp    1050 <CG_Printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"vstr %s;\00"
@.str.1 = [46 x i8] c"[cgnotify]Usage: +vstr [down_vstr] [up_vstr]\0A\00"
define void @CG_vstrUp_f() {
%1 = call i32 (...) @trap_Argc()
%2 = icmp eq i32 %1, 5
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = call i32 @CG_Argv(i32 2)
%5 = call i32 @va(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 @trap_SendConsoleCommand(i32 %5)
br label %9
7: ; preds = %0
%8 = call i32 @CG_Printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %3
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"vstr %s;\00"
@.str.1 = [46 x i8] c"[cgnotify]Usage: +vstr [down_vstr] [up_vstr]\0A\00"
define void @CG_vstrUp_f() {
%1 = tail call i32 (...) @trap_Argc()
%2 = icmp eq i32 %1, 5
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i32 @CG_Argv(i32 2)
%5 = tail call i32 @va(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = tail call i32 @trap_SendConsoleCommand(i32 %5)
br label %9
7: ; preds = %0
%8 = tail call i32 @CG_Printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.1, i64 0, i64 0))
br label %9
9: ; preds = %7, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
void ft_putstr(char *str) {
  int i;
  i = 0;
  while (str[i]) {
    ft_putchar(str[i]);
    i++;
  }
}


x86 assembly (clang, -O0):
<ft_putstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1154 <ft_putstr+0x44>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <ft_putchar@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <ft_putstr+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putstr>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <ft_putstr+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <ft_putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <ft_putstr+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @ft_putstr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %20
11: ; preds = %4
%12 = load i8*, i8** %2
%13 = load i32, i32* %3
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = call i32 @ft_putchar(i8 signext %16)
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %4
20: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @ft_putstr(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8 [ %10, %4 ], [ %2, %1 ]
%7 = tail call i32 @ft_putchar(i8 signext %6)
%8 = add nuw i64 %5, 1
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
void reread(void) {}


x86 assembly (clang, -O0):
<reread>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reread>:
ret

LLVM IR (-O0):
define void @reread() {
ret void
}

LLVM IR (-O2):
define void @reread() {
ret void
}
void shutdownProfiling() {}


x86 assembly (clang, -O0):
<shutdownProfiling>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shutdownProfiling>:
ret

LLVM IR (-O0):
define void @shutdownProfiling() {
ret void
}

LLVM IR (-O2):
define void @shutdownProfiling() {
ret void
}
/* Variables and functions */
unsigned int fib(unsigned int);
void setFib(unsigned *begin, unsigned *end) {
  while (begin < end) {
    *begin = fib(*begin);
    ++begin;
  }
}


x86 assembly (clang, -O0):
<setFib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1152 <setFib+0x42>
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x8(%rbp)
jmp    1120 <setFib+0x10>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setFib>:
push   %r14
push   %rbx
push   %rax
cmp    %rsi,%rdi
jae    1132 <setFib+0x22>
mov    %rsi,%r14
mov    %rdi,%rbx
nop
mov    (%rbx),%edi
call   1030 <fib@plt>
mov    %eax,(%rbx)
add    $0x4,%rbx
cmp    %r14,%rbx
jb     1120 <setFib+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @setFib(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
br label %5
5: ; preds = %9, %2
%6 = load i32*, i32** %3
%7 = load i32*, i32** %4
%8 = icmp ult i32* %6, %7
br i1 %8, label %9, label %16
9: ; preds = %5
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
%12 = call i32 @fib(i32 %11)
%13 = load i32*, i32** %3
store i32 %12, i32* %13
%14 = load i32*, i32** %3
%15 = getelementptr inbounds i32, i32* %14, i32 1
store i32* %15, i32** %3
br label %5
16: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @setFib(i32* %0, i32* readnone %1) {
%3 = icmp ult i32* %0, %1
br i1 %3, label %4, label %10
4: ; preds = %2, %4
%5 = phi i32* [ %8, %4 ], [ %0, %2 ]
%6 = load i32, i32* %5
%7 = tail call i32 @fib(i32 %6)
store i32 %7, i32* %5
%8 = getelementptr inbounds i32, i32* %5, i64 1
%9 = icmp ult i32* %8, %1
br i1 %9, label %4, label %10
10: ; preds = %4, %2
ret void
}