double Tween_BackInOutEasing(double k) {
  double s = 1.70158 * 1.525;
  k *= 2;
  if (k < 1) {
    return 0.5 * (k * k * ((s + 1) * k - s));
  }
  k -= 2;
  return 0.5 * (k * k * ((s + 1) * k + s) + 2);
}


x86 assembly (clang, -O0):
<Tween_BackInOutEasing>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  0xeff(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  0xeea(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xed0(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    1195 <Tween_BackInOutEasing+0x95>
movsd  -0x10(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
movsd  0xeb3(%rip),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm3
movsd  -0x18(%rbp),%xmm2
movq   %xmm2,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm2
mulsd  %xmm3,%xmm0
addsd  %xmm2,%xmm0
mulsd  %xmm0,%xmm1
movsd  0xe91(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    11f5 <Tween_BackInOutEasing+0xf5>
movsd  -0x10(%rbp),%xmm0
movsd  0xe66(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm1
mulsd  -0x10(%rbp),%xmm1
movsd  0xe43(%rip),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm3
movsd  -0x18(%rbp),%xmm2
mulsd  %xmm3,%xmm0
addsd  %xmm2,%xmm0
mulsd  %xmm0,%xmm1
movsd  0xe28(%rip),%xmm0
addsd  %xmm0,%xmm1
movsd  0xe2c(%rip),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Tween_BackInOutEasing>:
addsd  %xmm0,%xmm0
movsd  0xef4(%rip),%xmm1
ucomisd %xmm0,%xmm1
jbe    1137 <Tween_BackInOutEasing+0x37>
movapd %xmm0,%xmm1
mulsd  0xef2(%rip),%xmm0
mulsd  %xmm1,%xmm1
addsd  0xefe(%rip),%xmm0
mulsd  %xmm1,%xmm0
mulsd  0xefa(%rip),%xmm0
ret
addsd  0xec9(%rip),%xmm0
movapd %xmm0,%xmm1
mulsd  0xec5(%rip),%xmm0
addsd  0xec5(%rip),%xmm0
mulsd  %xmm1,%xmm1
mulsd  %xmm1,%xmm0
addsd  0xebd(%rip),%xmm0
mulsd  0xec5(%rip),%xmm0
ret

LLVM IR (-O0):
define double @Tween_BackInOutEasing(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double 0x4004C25FE974A340, double* %4
%5 = load double, double* %3
%6 = fmul double %5, 2.000000e+00
store double %6, double* %3
%7 = load double, double* %3
%8 = fcmp olt double %7, 1.000000e+00
br i1 %8, label %9, label %21
9: ; preds = %1
%10 = load double, double* %3
%11 = load double, double* %3
%12 = fmul double %10, %11
%13 = load double, double* %4
%14 = fadd double %13, 1.000000e+00
%15 = load double, double* %3
%16 = load double, double* %4
%17 = fneg double %16
%18 = call double @llvm.fmuladd.f64(double %14, double %15, double %17)
%19 = fmul double %12, %18
%20 = fmul double 5.000000e-01, %19
store double %20, double* %2
br label %34
21: ; preds = %1
%22 = load double, double* %3
%23 = fsub double %22, 2.000000e+00
store double %23, double* %3
%24 = load double, double* %3
%25 = load double, double* %3
%26 = fmul double %24, %25
%27 = load double, double* %4
%28 = fadd double %27, 1.000000e+00
%29 = load double, double* %3
%30 = load double, double* %4
%31 = call double @llvm.fmuladd.f64(double %28, double %29, double %30)
%32 = call double @llvm.fmuladd.f64(double %26, double %31, double 2.000000e+00)
%33 = fmul double 5.000000e-01, %32
store double %33, double* %2
br label %34
34: ; preds = %21, %9
%35 = load double, double* %2
ret double %35
}

LLVM IR (-O2):
define double @Tween_BackInOutEasing(double %0) {
%2 = fmul double %0, 2.000000e+00
%3 = fcmp olt double %2, 1.000000e+00
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = fmul double %2, %2
%6 = tail call double @llvm.fmuladd.f64(double %2, double 0x400CC25FE974A340, double 0xC004C25FE974A340)
%7 = fmul double %5, %6
br label %13
8: ; preds = %1
%9 = fadd double %2, -2.000000e+00
%10 = fmul double %9, %9
%11 = tail call double @llvm.fmuladd.f64(double %9, double 0x400CC25FE974A340, double 0x4004C25FE974A340)
%12 = tail call double @llvm.fmuladd.f64(double %10, double %11, double 2.000000e+00)
br label %13
13: ; preds = %8, %4
%14 = phi double [ %7, %4 ], [ %12, %8 ]
%15 = fmul double %14, 5.000000e-01
ret double %15
}