xunge/DecIR huggingface dataset:
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void USBHostPwrFaultEnable(uint32_t ui32Base) {
  ;
  (*((volatile unsigned short *)(ui32Base + 0x00000400))) |= 0x00000010;
}


x86 assembly (clang, -O0):
<USBHostPwrFaultEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x400(%rax),%cx
movzwl %cx,%ecx
or     $0x10,%ecx
mov    %cx,0x400(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostPwrFaultEnable>:
orw    $0x10,0x400(%rdi)
10
ret

LLVM IR (-O0):
define void @USBHostPwrFaultEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 1024
%5 = inttoptr i64 %4 to i16*
%6 = load volatile i16, i16* %5
%7 = zext i16 %6 to i32
%8 = or i32 %7, 16
%9 = trunc i32 %8 to i16
store volatile i16 %9, i16* %5
ret void
}

LLVM IR (-O2):
define void @USBHostPwrFaultEnable(i64 %0) {
%2 = add nsw i64 %0, 1024
%3 = inttoptr i64 %2 to i16*
%4 = load volatile i16, i16* %3
%5 = or i16 %4, 16
store volatile i16 %5, i16* %3
ret void
}
int __test_and_clear_bit(int nr, volatile unsigned long *addr) {
  unsigned long mask = (1UL << ((nr) % 32));
  unsigned long *p = ((unsigned long *)addr) + ((nr) / 32);
  unsigned long old = *p;
  *p = old & ~mask;
  return (old & mask) != 0;
}


x86 assembly (clang, -O0):
<__test_and_clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x30(%rbp),%rax
movslq %ecx,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rcx
mov    -0x18(%rbp),%rax
xor    $0xffffffffffffffff,%rax
and    %rax,%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x28(%rbp),%rax
and    -0x18(%rbp),%rax
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test_and_clear_bit>:
lea    0x1f(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
mov    %eax,%ecx
and    $0xffffffe0,%ecx
sub    %ecx,%edi
sar    $0x5,%eax
cltq
mov    (%rsi,%rax,8),%rcx
mov    %rcx,%rdx
btr    %rdi,%rdx
mov    %rdx,(%rsi,%rax,8)
xor    %eax,%eax
bt     %rdi,%rcx
setb   %al
ret

LLVM IR (-O0):
define i32 @__test_and_clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64*
%7 = alloca i64
store i32 %0, i32* %3
store i64* %1, i64** %4
%8 = load i32, i32* %3
%9 = srem i32 %8, 32
%10 = zext i32 %9 to i64
%11 = shl i64 1, %10
store i64 %11, i64* %5
%12 = load i64*, i64** %4
%13 = load i32, i32* %3
%14 = sdiv i32 %13, 32
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i64, i64* %12, i64 %15
store i64* %16, i64** %6
%17 = load i64*, i64** %6
%18 = load i64, i64* %17
store i64 %18, i64* %7
%19 = load i64, i64* %7
%20 = load i64, i64* %5
%21 = xor i64 %20, -1
%22 = and i64 %19, %21
%23 = load i64*, i64** %6
store i64 %22, i64* %23
%24 = load i64, i64* %7
%25 = load i64, i64* %5
%26 = and i64 %24, %25
%27 = icmp ne i64 %26, 0
%28 = zext i1 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @__test_and_clear_bit(i32 %0, i64* nocapture %1) {
%3 = srem i32 %0, 32
%4 = zext i32 %3 to i64
%5 = shl nuw i64 1, %4
%6 = sdiv i32 %0, 32
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %1, i64 %7
%9 = load i64, i64* %8
%10 = xor i64 %5, -1
%11 = and i64 %9, %10
store i64 %11, i64* %8
%12 = and i64 %9, %5
%13 = icmp ne i64 %12, 0
%14 = zext i1 %13 to i32
ret i32 %14
}
void outportb(unsigned short _port, unsigned char _data) {
  __asm volatile("outb %1, %0" : : "dN"(_port), "a"(_data));
}


x86 assembly (clang, -O0):
<outportb>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x3(%rbp),%al
out    %al,(%dx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<outportb>:
mov    %esi,%eax
mov    %edi,%edx
out    %al,(%dx)
ret

LLVM IR (-O0):
define void @outportb(i16 zeroext %0, i8 zeroext %1) {
%3 = alloca i16
%4 = alloca i8
store i16 %0, i16* %3
store i8 %1, i8* %4
%5 = load i16, i16* %3
%6 = load i8, i8* %4
ret void
}

LLVM IR (-O2):
define void @outportb(i16 zeroext %0, i8 zeroext %1) {
tail call void asm sideeffect "outb $1, $0", "{dx}N,{ax},~{dirflag},~{fpsr},~{flags}"(i16 %0, i8 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ns2sisl(int, float);
void ns2sisl_(int *isid, float *level) { ns2sisl(*isid, *level); }


x86 assembly (clang, -O0):
<ns2sisl_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <ns2sisl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ns2sisl_>:
mov    (%rdi),%edi
movss  (%rsi),%xmm0
jmp    1030 <ns2sisl@plt>

LLVM IR (-O0):
define void @ns2sisl_(i32* %0, float* %1) {
%3 = alloca i32*
%4 = alloca float*
store i32* %0, i32** %3
store float* %1, float** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load float*, float** %4
%8 = load float, float* %7
%9 = call i32 @ns2sisl(i32 %6, float %8)
ret void
}

LLVM IR (-O2):
define void @ns2sisl_(i32* nocapture %0, float* nocapture %1) {
%3 = load i32, i32* %0
%4 = load float, float* %1
%5 = tail call i32 @ns2sisl(i32 %3, float %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
int curs_endwin() { endwin(); }


x86 assembly (clang, -O0):
<curs_endwin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <endwin@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<curs_endwin>:
xor    %eax,%eax
jmp    1030 <endwin@plt>

LLVM IR (-O0):
define i32 @curs_endwin() {
%1 = alloca i32
%2 = call i32 (...) @endwin()
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @curs_endwin() {
%1 = tail call i32 (...) @endwin()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ log_msg(char *);
void log_ackPacketSent() { log_msg("NET: ACK packet sent"); }


x86 assembly (clang, -O0):
<log_ackPacketSent>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <log_msg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_ackPacketSent>:
lea    0xee9(%rip),%rdi
jmp    1030 <log_msg@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"NET: ACK packet sent\00"
define void @log_ackPacketSent() {
%1 = call i32 @log_msg(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"NET: ACK packet sent\00"
define void @log_ackPacketSent() {
%1 = tail call i32 @log_msg(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fexp_tab();
int /*<<< orphan*/ sqrt_tab();
void approx_init(void) {
  sqrt_tab();
  fexp_tab();
}


x86 assembly (clang, -O0):
<approx_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sqrt_tab@plt>
mov    $0x0,%al
call   1040 <fexp_tab@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<approx_init>:
push   %rax
xor    %eax,%eax
call   1030 <sqrt_tab@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <fexp_tab@plt>

LLVM IR (-O0):
define void @approx_init() {
%1 = call i32 (...) @sqrt_tab()
%2 = call i32 (...) @fexp_tab()
ret void
}

LLVM IR (-O2):
define void @approx_init() {
%1 = tail call i32 (...) @sqrt_tab()
%2 = tail call i32 (...) @fexp_tab()
ret void
}
void DBG(const char *fmt, ...) {}


x86 assembly (clang, -O0):
<DBG>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBG>:
ret

LLVM IR (-O0):
define void @DBG(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @DBG(i8* nocapture %0, ...) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void timefunc(int value) {
  printf("FAIL: test13\n");
  exit(1);
}


x86 assembly (clang, -O0):
<timefunc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<timefunc>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"FAIL: test13\0A\00"
define void @timefunc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [13 x i8] c"FAIL: test13\00"
define void @timefunc(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
float ANTweenTimingFunctionBounceIn(float, int /*<<< orphan*/, int, float);
float ANTweenProgressTimingFunctionBounceIn(float time, float duration) {
  return ANTweenTimingFunctionBounceIn(time, 0, 1, duration);
}


x86 assembly (clang, -O0):
<ANTweenProgressTimingFunctionBounceIn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <ANTweenTimingFunctionBounceIn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ANTweenProgressTimingFunctionBounceIn>:
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <ANTweenTimingFunctionBounceIn@plt>

LLVM IR (-O0):
define float @ANTweenProgressTimingFunctionBounceIn(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @ANTweenTimingFunctionBounceIn(float %5, i32 0, i32 1, float %6)
ret float %7
}

LLVM IR (-O2):
define float @ANTweenProgressTimingFunctionBounceIn(float %0, float %1) {
%3 = tail call float @ANTweenTimingFunctionBounceIn(float %0, i32 0, i32 1, float %1)
ret float %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void redLEDOff(void) { (*((volatile uint32_t *)0x40025008)) &= ~0x02; }


x86 assembly (clang, -O0):
<redLEDOff>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40025008,%eax
mov    (%rax),%ecx
and    $0xfffffffd,%ecx
mov    $0x40025008,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<redLEDOff>:
andl   $0xfffffffd,0x40025008
fd
ret

LLVM IR (-O0):
define void @redLEDOff() {
%1 = load volatile i32, i32* inttoptr (i64 1073893384 to i32*)
%2 = and i32 %1, -3
store volatile i32 %2, i32* inttoptr (i64 1073893384 to i32*)
ret void
}

LLVM IR (-O2):
define void @redLEDOff() {
%1 = load volatile i32, i32* inttoptr (i64 1073893384 to i32*)
%2 = and i32 %1, -3
store volatile i32 %2, i32* inttoptr (i64 1073893384 to i32*)
ret void
}
le(a, b) { return a <= b; }


x86 assembly (clang, -O0):
<le>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setle  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<le>:
xor    %eax,%eax
cmp    %esi,%edi
setle  %al
ret

LLVM IR (-O0):
define i32 @le(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sle i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @le(i32 %0, i32 %1) {
%3 = icmp sle i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ui_field_navigate_up();
void switch_s2_up(const uint32_t repeat_count) {
  (void)repeat_count;
  ui_field_navigate_up();
}


x86 assembly (clang, -O0):
<switch_s2_up>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <ui_field_navigate_up@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_s2_up>:
xor    %eax,%eax
jmp    1030 <ui_field_navigate_up@plt>

LLVM IR (-O0):
define void @switch_s2_up(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (...) @ui_field_navigate_up()
ret void
}

LLVM IR (-O2):
define void @switch_s2_up(i32 %0) {
%2 = tail call i32 (...) @ui_field_navigate_up()
ret void
}
void copy(char to[], const char from[]) {
  int i;
  i = 0;
  while ((to[i] = from[i]) != '\0')
    ++i;
}


x86 assembly (clang, -O0):
<copy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    -0x8(%rbp),%rcx
movslq -0x14(%rbp),%rdx
mov    %al,(%rcx,%rdx,1)
movsbl %al,%eax
cmp    $0x0,%eax
je     1143 <copy+0x43>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <copy+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rsi,%rax,1),%ecx
mov    %cl,(%rdi,%rax,1)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <copy+0x10>
ret

LLVM IR (-O0):
define void @copy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = load i8*, i8** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
store i8 %11, i8* %15
%16 = sext i8 %11 to i32
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %6
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @copy(i8* nocapture writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ %9, %3 ], [ 0, %2 ]
%5 = getelementptr inbounds i8, i8* %1, i64 %4
%6 = load i8, i8* %5
%7 = getelementptr inbounds i8, i8* %0, i64 %4
store i8 %6, i8* %7
%8 = icmp eq i8 %6, 0
%9 = add nuw i64 %4, 1
br i1 %8, label %10, label %3
10: ; preds = %3
ret void
}
int porta_log(char *fmt, ...) { return 0; }


x86 assembly (clang, -O0):
<porta_log>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<porta_log>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @porta_log(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @porta_log(i8* nocapture readnone %0, ...) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_249() {
  Assert_real((isqrt(249) == 15),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              1250, ("Integer square root of 249 should be 15"));
}


x86 assembly (clang, -O0):
<t_sqrt_249>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf9,%edi
call   1030 <isqrt@plt>
cmp    $0xf,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x4e2,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_249>:
push   %rax
mov    $0xf9,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0xf,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x4e2,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 249 should be 15\00"
define void @t_sqrt_249() {
%1 = call i32 @isqrt(i32 249)
%2 = icmp eq i32 %1, 15
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1250, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 249 should be 15\00"
define void @t_sqrt_249() {
%1 = tail call i32 @isqrt(i32 249)
%2 = icmp eq i32 %1, 15
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1250, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char *);
long hash(char *word) {
  int counter = 0;
  long hash_code = 42;
  while (counter++ < strlen(word)) {
    hash_code += word[counter - 1] * (counter);
  }
  return hash_code;
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movq   $0x2a,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
cmp    %ecx,%eax
jge    1171 <hash+0x61>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
imul   -0xc(%rbp),%eax
cltq
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112b <hash+0x1b>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
mov    $0x2a,%r15d
test   %eax,%eax
jle    1150 <hash+0x40>
xor    %ebx,%ebx
nopl   0x0(%rax)
movsbl (%r14,%rbx,1),%eax
add    $0x1,%rbx
imul   %ebx,%eax
cltq
add    %rax,%r15
mov    %r14,%rdi
call   1030 <strlen@plt>
cltq
cmp    %rax,%rbx
jl     1130 <hash+0x20>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i64
store i8* %0, i8** %2
store i32 0, i32* %3
store i64 42, i64* %4
br label %5
5: ; preds = %11, %1
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 1
store i32 %7, i32* %3
%8 = load i8*, i8** %2
%9 = call i32 @strlen(i8* %8)
%10 = icmp slt i32 %6, %9
br i1 %10, label %11, label %24
11: ; preds = %5
%12 = load i8*, i8** %2
%13 = load i32, i32* %3
%14 = sub nsw i32 %13, 1
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %12, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = load i32, i32* %3
%20 = mul nsw i32 %18, %19
%21 = sext i32 %20 to i64
%22 = load i64, i64* %4
%23 = add nsw i64 %22, %21
store i64 %23, i64* %4
br label %5
24: ; preds = %5
%25 = load i64, i64* %4
ret i64 %25
}

LLVM IR (-O2):
define i64 @hash(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %20
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i64 [ %16, %4 ], [ 1, %1 ]
%7 = phi i64 [ %15, %4 ], [ 42, %1 ]
%8 = add nuw nsw i64 %5, 1
%9 = getelementptr inbounds i8, i8* %0, i64 %5
%10 = load i8, i8* %9
%11 = sext i8 %10 to i64
%12 = mul i64 %6, %11
%13 = shl i64 %12, 32
%14 = ashr exact i64 %13, 32
%15 = add nsw i64 %7, %14
%16 = add nuw nsw i64 %6, 1
%17 = tail call i32 @strlen(i8* %0)
%18 = sext i32 %17 to i64
%19 = icmp slt i64 %6, %18
br i1 %19, label %4, label %20
20: ; preds = %4, %1
%21 = phi i64 [ 42, %1 ], [ %15, %4 ]
ret i64 %21
}
/* Variables and functions */
double __tgamma_r(double, int *);
double tgamma(double x) {
  int local_sgngam = 0;
  return (__tgamma_r(x, &local_sgngam));
}


x86 assembly (clang, -O0):
<tgamma>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
lea    -0xc(%rbp),%rdi
call   1030 <__tgamma_r@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tgamma>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <__tgamma_r@plt>
pop    %rax
ret

LLVM IR (-O0):
define double @tgamma(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
store i32 0, i32* %3
%4 = load double, double* %2
%5 = call double @__tgamma_r(double %4, i32* %3)
ret double %5
}

LLVM IR (-O2):
define double @tgamma(double %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call double @__tgamma_r(double %0, i32* %2)
ret double %4
}
/* Type definitions */
struct termios {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ B115200;
int /*<<< orphan*/ TCSAFLUSH;
int /*<<< orphan*/ cfmakeraw(struct termios *);
int /*<<< orphan*/ cfsetspeed(struct termios *, int /*<<< orphan*/);
int /*<<< orphan*/ tcgetattr(int, struct termios *);
int /*<<< orphan*/ tcsetattr(int, int /*<<< orphan*/, struct termios *);
void uart_init(int fd) {
  struct termios setup;
  tcgetattr(fd, &setup);
  cfmakeraw(&setup);
  cfsetspeed(&setup, B115200);
  tcsetattr(fd, TCSAFLUSH, &setup);
}


x86 assembly (clang, -O0):
<uart_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
call   1050 <tcgetattr@plt>
lea    -0x8(%rbp),%rdi
call   1040 <cfmakeraw@plt>
mov    0x2e71(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdi
call   1030 <cfsetspeed@plt>
mov    -0x4(%rbp),%edi
mov    0x2e6c(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1060 <tcsetattr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_init>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
mov    %rsp,%r14
mov    %r14,%rsi
call   1050 <tcgetattr@plt>
mov    %r14,%rdi
call   1040 <cfmakeraw@plt>
mov    0x2e78(%rip),%rax
mov    (%rax),%esi
mov    %r14,%rdi
call   1030 <cfsetspeed@plt>
mov    0x2e77(%rip),%rax
mov    (%rax),%esi
mov    %ebx,%edi
mov    %r14,%rdx
call   1060 <tcsetattr@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.termios = type { i32 }
@B115200 = global i32 0
@TCSAFLUSH = global i32 0
define void @uart_init(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.termios
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @tcgetattr(i32 %4, %struct.termios* %3)
%6 = call i32 @cfmakeraw(%struct.termios* %3)
%7 = load i32, i32* @B115200
%8 = call i32 @cfsetspeed(%struct.termios* %3, i32 %7)
%9 = load i32, i32* %2
%10 = load i32, i32* @TCSAFLUSH
%11 = call i32 @tcsetattr(i32 %9, i32 %10, %struct.termios* %3)
ret void
}

LLVM IR (-O2):
%struct.termios = type { i32 }
@B115200 = global i32 0
@TCSAFLUSH = global i32 0
define void @uart_init(i32 %0) {
%2 = alloca %struct.termios
%3 = bitcast %struct.termios* %2 to i8*
%4 = call i32 @tcgetattr(i32 %0, %struct.termios* %2)
%5 = call i32 @cfmakeraw(%struct.termios* %2)
%6 = load i32, i32* @B115200
%7 = call i32 @cfsetspeed(%struct.termios* %2, i32 %6)
%8 = load i32, i32* @TCSAFLUSH
%9 = call i32 @tcsetattr(i32 %0, i32 %8, %struct.termios* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char const *);
scalar_t__ strncmp(char const *, char const *, int /*<<< orphan*/);
int startsWith(const char *haystack, const char *needle) {
  return (strncmp(haystack, needle, strlen(needle)) == 0);
}


x86 assembly (clang, -O0):
<startsWith>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<startsWith>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @startsWith(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i64 @strncmp(i8* %5, i8* %6, i32 %8)
%10 = icmp eq i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @startsWith(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i64 @strncmp(i8* %0, i8* %1, i32 %3)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
void Delay(unsigned long uMilliseconds) {
  if (uMilliseconds) {
  }
}


x86 assembly (clang, -O0):
<Delay>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1118 <Delay+0x18>
jmp    1118 <Delay+0x18>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Delay>:
ret

LLVM IR (-O0):
define void @Delay(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %6
6: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @Delay(i64 %0) {
ret void
}
int tolower(int ch) { return ch + (((ch > 64) && (ch < 91)) ? 32 : 0); }


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x40,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1126 <tolower+0x26>
cmpl   $0x5b,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x5(%rbp),%sil
xor    %ecx,%ecx
mov    $0x20,%edx
test   $0x1,%sil
cmovne %edx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
lea    -0x41(%rdi),%ecx
xor    %eax,%eax
cmp    $0x1a,%ecx
setb   %al
shl    $0x5,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 64
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp slt i32 %7, 91
br label %9
9: ; preds = %6, %1
%10 = phi i1 [ false, %1 ], [ %8, %6 ]
%11 = zext i1 %10 to i64
%12 = select i1 %10, i32 32, i32 0
%13 = add nsw i32 %3, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @tolower(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = select i1 %3, i32 32, i32 0
%5 = add nsw i32 %4, %0
ret i32 %5
}
void swap(int *a, int *b) {
  int a_val = *a;
  int b_val = *b;
  *a = b_val;
  *b = a_val;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%7 = load i32*, i32** %3
%8 = load i32, i32* %7
store i32 %8, i32* %5
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = load i32*, i32** %3
store i32 %11, i32* %12
%13 = load i32, i32* %5
%14 = load i32*, i32** %4
store i32 %13, i32* %14
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ serial;
};
typedef TYPE_1__ XAnyEvent;

/* Variables and functions */
unsigned long get_XAnyEvent_serial(void *_p) {
  return (unsigned long)((XAnyEvent *)_p)->serial;
}


x86 assembly (clang, -O0):
<get_XAnyEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XAnyEvent_serial>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XAnyEvent_serial(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XAnyEvent_serial(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
void TPS_ADC_IRQ_Interrupt(void) {}


x86 assembly (clang, -O0):
<TPS_ADC_IRQ_Interrupt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TPS_ADC_IRQ_Interrupt>:
ret

LLVM IR (-O0):
define void @TPS_ADC_IRQ_Interrupt() {
ret void
}

LLVM IR (-O2):
define void @TPS_ADC_IRQ_Interrupt() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ divps_by_zero();
int /*<<< orphan*/ dump_mxcsr();
int main() {
  divps_by_zero();
  dump_mxcsr();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <divps_by_zero@plt>
mov    $0x0,%al
call   1040 <dump_mxcsr@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <divps_by_zero@plt>
xor    %eax,%eax
call   1040 <dump_mxcsr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @divps_by_zero()
%2 = call i32 (...) @dump_mxcsr()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @divps_by_zero()
%2 = tail call i32 (...) @dump_mxcsr()
ret i32 0
}
int ti_typprice_start(double const *options) {
  (void)options;
  return 0;
}


x86 assembly (clang, -O0):
<ti_typprice_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ti_typprice_start>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ti_typprice_start(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ti_typprice_start(double* nocapture readnone %0) {
ret i32 0
}
void stop_child_listen(child_socket_val) int child_socket_val;
{ close(child_socket_val); }


x86 assembly (clang, -O0):
<stop_child_listen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stop_child_listen>:
xor    %eax,%eax
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @stop_child_listen(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i32, ...) bitcast (i32 (...)* @close to i32 (i32, ...)*)(i32 %3)
ret void
}

LLVM IR (-O2):
define void @stop_child_listen(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @close to i32 (i32, ...)*)(i32 %0)
ret void
}
/* Variables and functions */
int _glfwGetClosestVideoMode(int, int *, int *, int *);
int /*<<< orphan*/ _glfwSetVideoModeMODE(int, int, int);
void _glfwSetVideoMode(int screen, int *width, int *height, int *rate) {
  int bestmode;
  bestmode = _glfwGetClosestVideoMode(screen, width, height, rate);
  _glfwSetVideoModeMODE(screen, bestmode, *rate);
}


x86 assembly (clang, -O0):
<_glfwSetVideoMode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1040 <_glfwGetClosestVideoMode@plt>
mov    %eax,-0x24(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x24(%rbp),%esi
mov    -0x20(%rbp),%rax
mov    (%rax),%edx
call   1030 <_glfwSetVideoModeMODE@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_glfwSetVideoMode>:
push   %rbp
push   %rbx
push   %rax
mov    %rcx,%rbx
mov    %edi,%ebp
call   1040 <_glfwGetClosestVideoMode@plt>
mov    (%rbx),%edx
mov    %ebp,%edi
mov    %eax,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <_glfwSetVideoModeMODE@plt>

LLVM IR (-O0):
define void @_glfwSetVideoMode(i32 %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%10 = load i32, i32* %5
%11 = load i32*, i32** %6
%12 = load i32*, i32** %7
%13 = load i32*, i32** %8
%14 = call i32 @_glfwGetClosestVideoMode(i32 %10, i32* %11, i32* %12, i32* %13)
store i32 %14, i32* %9
%15 = load i32, i32* %5
%16 = load i32, i32* %9
%17 = load i32*, i32** %8
%18 = load i32, i32* %17
%19 = call i32 @_glfwSetVideoModeMODE(i32 %15, i32 %16, i32 %18)
ret void
}

LLVM IR (-O2):
define void @_glfwSetVideoMode(i32 %0, i32* %1, i32* %2, i32* %3) {
%5 = tail call i32 @_glfwGetClosestVideoMode(i32 %0, i32* %1, i32* %2, i32* %3)
%6 = load i32, i32* %3
%7 = tail call i32 @_glfwSetVideoModeMODE(i32 %0, i32 %5, i32 %6)
ret void
}
/* Variables and functions */
int close(int);
int Close_device(int fd) {
  if (close(fd) == -1)
    return -1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<Close_device>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <close@plt>
cmp    $0xffffffff,%eax
jne    1138 <Close_device+0x28>
movl   $0xffffffff,-0x4(%rbp)
jmp    113f <Close_device+0x2f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Close_device>:
push   %rax
call   1030 <close@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
sete   %cl
neg    %ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @Close_device(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @close(i32 %4)
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 -1, i32* %2
br label %9
8: ; preds = %1
store i32 0, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @Close_device(i32 %0) {
%2 = tail call i32 @close(i32 %0)
%3 = icmp eq i32 %2, -1
%4 = sext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ print_uint8(int);
void print_uint32(uint32_t val) {
  print_uint8(val >> 24);
  print_uint8(val >> 16);
  print_uint8(val >> 8);
  print_uint8(val);
}


x86 assembly (clang, -O0):
<print_uint32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x18,%edi
call   1030 <print_uint8@plt>
mov    -0x4(%rbp),%edi
sar    $0x10,%edi
call   1030 <print_uint8@plt>
mov    -0x4(%rbp),%edi
sar    $0x8,%edi
call   1030 <print_uint8@plt>
mov    -0x4(%rbp),%edi
call   1030 <print_uint8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_uint32>:
push   %rbx
mov    %edi,%ebx
sar    $0x18,%edi
call   1030 <print_uint8@plt>
mov    %ebx,%edi
sar    $0x10,%edi
call   1030 <print_uint8@plt>
mov    %ebx,%edi
sar    $0x8,%edi
call   1030 <print_uint8@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <print_uint8@plt>

LLVM IR (-O0):
define void @print_uint32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 24
%5 = call i32 @print_uint8(i32 %4)
%6 = load i32, i32* %2
%7 = ashr i32 %6, 16
%8 = call i32 @print_uint8(i32 %7)
%9 = load i32, i32* %2
%10 = ashr i32 %9, 8
%11 = call i32 @print_uint8(i32 %10)
%12 = load i32, i32* %2
%13 = call i32 @print_uint8(i32 %12)
ret void
}

LLVM IR (-O2):
define void @print_uint32(i32 %0) {
%2 = ashr i32 %0, 24
%3 = tail call i32 @print_uint8(i32 %2)
%4 = ashr i32 %0, 16
%5 = tail call i32 @print_uint8(i32 %4)
%6 = ashr i32 %0, 8
%7 = tail call i32 @print_uint8(i32 %6)
%8 = tail call i32 @print_uint8(i32 %0)
ret void
}
int fn1(int x, int y) {
  int tem1 = x | y;
  int tem2 = ~x ^ y;
  return tem1 & tem2;
}


x86 assembly (clang, -O0):
<fn1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
and    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn1>:
mov    %edi,%eax
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @fn1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = or i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = xor i32 %10, -1
%12 = load i32, i32* %4
%13 = xor i32 %11, %12
store i32 %13, i32* %6
%14 = load i32, i32* %5
%15 = load i32, i32* %6
%16 = and i32 %14, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @fn1(i32 %0, i32 %1) {
%3 = and i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ hz_abort(char *);
scalar_t__ strcmp(char const *, char const *);
void hz_assert_str_eq(const char *a, const char *b) {
  if (strcmp(a, b) != 0) {
    hz_abort("Strings not equal: '%s' vs. '%s'");
  }
}


x86 assembly (clang, -O0):
<hz_assert_str_eq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
je     1153 <hz_assert_str_eq+0x33>
lea    0xeb2(%rip),%rdi
call   1030 <hz_abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hz_assert_str_eq>:
push   %rax
call   1040 <strcmp@plt>
test   %rax,%rax
je     1138 <hz_assert_str_eq+0x18>
lea    0xece(%rip),%rdi
pop    %rax
jmp    1030 <hz_abort@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [33 x i8] c"Strings not equal: '%s' vs. '%s'\00"
define void @hz_assert_str_eq(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @strcmp(i8* %5, i8* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @hz_abort(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"Strings not equal: '%s' vs. '%s'\00"
define void @hz_assert_str_eq(i8* %0, i8* %1) {
%3 = tail call i64 @strcmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @hz_abort(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret void
}
unsigned int quickhash(char *str) {
  unsigned int hash = 0, c;
  while (c = *str++)
    hash = c + (hash << 6) + (hash << 16) - hash;
  return hash;
}


x86 assembly (clang, -O0):
<quickhash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x10(%rbp)
cmp    $0x0,%eax
je     114b <quickhash+0x4b>
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x6,%ecx
add    %ecx,%eax
mov    -0xc(%rbp),%ecx
shl    $0x10,%ecx
add    %ecx,%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    110f <quickhash+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickhash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1127 <quickhash+0x27>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
imul   $0x1003f,%eax,%eax
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <quickhash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @quickhash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %5
5: ; preds = %11, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %5
%12 = load i32, i32* %4
%13 = load i32, i32* %3
%14 = shl i32 %13, 6
%15 = add i32 %12, %14
%16 = load i32, i32* %3
%17 = shl i32 %16, 16
%18 = add i32 %15, %17
%19 = load i32, i32* %3
%20 = sub i32 %18, %19
store i32 %20, i32* %3
br label %5
21: ; preds = %5
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @quickhash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %9, %4 ], [ %0, %1 ]
%7 = phi i32 [ %11, %4 ], [ 0, %1 ]
%8 = sext i8 %5 to i32
%9 = getelementptr inbounds i8, i8* %6, i64 1
%10 = mul i32 %7, 65599
%11 = add i32 %10, %8
%12 = load i8, i8* %9
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 0, %1 ], [ %11, %4 ]
ret i32 %15
}
int main(void) {
  int a, r;
  unsigned char kaijou;
  kaijou = 0;
  a = 6;
  r = 1;
  while (a > 0) {
    r = a * r;
    a = a - 1;
  }
  kaijou = r;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movb   $0x0,-0xd(%rbp)
movl   $0x6,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    113f <main+0x3f>
mov    -0x8(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111d <main+0x1d>
mov    -0xc(%rbp),%eax
mov    %al,-0xd(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8
store i32 0, i32* %1
store i8 0, i8* %4
store i32 6, i32* %2
store i32 1, i32* %3
br label %5
5: ; preds = %8, %0
%6 = load i32, i32* %2
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %5
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = mul nsw i32 %9, %10
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = sub nsw i32 %12, 1
store i32 %13, i32* %2
br label %5
14: ; preds = %5
%15 = load i32, i32* %3
%16 = trunc i32 %15 to i8
store i8 %16, i8* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int main(void) {
  int a[1] = {100};
  const int *const b = a;
  const int *c;
  int *const d;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    0xef6(%rip),%eax
mov    %eax,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@__const.main.a = [1 x i32] [i32 100]
define i32 @main() {
%1 = alloca [1 x i32]
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32*
%5 = bitcast [1 x i32]* %1 to i8*
%6 = getelementptr inbounds [1 x i32], [1 x i32]* %1, i64 0, i64 0
store i32* %6, i32** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_mainloop_quit() {
  printf("NOT IMPLEMENTED:"
         "pa_mainloop_quit"
         "\n");
}


x86 assembly (clang, -O0):
<pa_mainloop_quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_mainloop_quit>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [34 x i8] c"NOT IMPLEMENTED:pa_mainloop_quit\0A\00"
define i32 @pa_mainloop_quit() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([34 x i8], [34 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [33 x i8] c"NOT IMPLEMENTED:pa_mainloop_quit\00"
define i32 @pa_mainloop_quit() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ SIGTERM;
int /*<<< orphan*/ SIG_DFL;
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
int pq_implementation_stop(void) {
  signal(SIGINT, SIG_DFL);
  signal(SIGTERM, SIG_DFL);
  return 1;
}


x86 assembly (clang, -O0):
<pq_implementation_stop>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
mov    0x2eac(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
mov    0x2e95(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pq_implementation_stop>:
push   %rbx
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
mov    0x2eaf(%rip),%rbx
mov    (%rbx),%esi
call   1030 <signal@plt>
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
mov    (%rbx),%esi
call   1030 <signal@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@SIGINT = global i32 0
@SIG_DFL = global i32 0
@SIGTERM = global i32 0
define i32 @pq_implementation_stop() {
%1 = load i32, i32* @SIGINT
%2 = load i32, i32* @SIG_DFL
%3 = call i32 @signal(i32 %1, i32 %2)
%4 = load i32, i32* @SIGTERM
%5 = load i32, i32* @SIG_DFL
%6 = call i32 @signal(i32 %4, i32 %5)
ret i32 1
}

LLVM IR (-O2):
@SIGINT = global i32 0
@SIG_DFL = global i32 0
@SIGTERM = global i32 0
define i32 @pq_implementation_stop() {
%1 = load i32, i32* @SIGINT
%2 = load i32, i32* @SIG_DFL
%3 = tail call i32 @signal(i32 %1, i32 %2)
%4 = load i32, i32* @SIGTERM
%5 = load i32, i32* @SIG_DFL
%6 = tail call i32 @signal(i32 %4, i32 %5)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int const, int const, int const, int const);
int compare(const int i, const int j, const int result, const int valid) {
  if (result != valid) {
    printf("error at [%d][%d], expected %d but %d\n", i, j, valid, result);
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
je     1155 <compare+0x45>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%r8d
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
movl   $0x1,-0x4(%rbp)
jmp    115c <compare+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
mov    %edx,%r8d
xor    %eax,%eax
cmp    %ecx,%edx
je     1133 <compare+0x23>
push   %rax
mov    %esi,%edx
mov    %edi,%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
@.str = [39 x i8] c"error at [%d][%d], expected %d but %d\0A\00"
define i32 @compare(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i32, i32* %8
%11 = load i32, i32* %9
%12 = icmp ne i32 %10, %11
br i1 %12, label %13, label %19
13: ; preds = %4
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = load i32, i32* %9
%17 = load i32, i32* %8
%18 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32 %14, i32 %15, i32 %16, i32 %17)
store i32 1, i32* %5
br label %20
19: ; preds = %4
store i32 0, i32* %5
br label %20
20: ; preds = %19, %13
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
@.str = [39 x i8] c"error at [%d][%d], expected %d but %d\0A\00"
define i32 @compare(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp eq i32 %2, %3
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %3, i32 %2)
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ 1, %6 ], [ 0, %4 ]
ret i32 %9
}