xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void foobar(const char *buffer) { printf("%s", buffer); }


x86 assembly (clang, -O0):
<foobar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foobar>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @foobar(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @foobar(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_memblockq_flush_write() {
  printf("NOT IMPLEMENTED:"
         "pa_memblockq_flush_write"
         "\n");
}


x86 assembly (clang, -O0):
<pa_memblockq_flush_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_memblockq_flush_write>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [42 x i8] c"NOT IMPLEMENTED:pa_memblockq_flush_write\0A\00"
define i32 @pa_memblockq_flush_write() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [41 x i8] c"NOT IMPLEMENTED:pa_memblockq_flush_write\00"
define i32 @pa_memblockq_flush_write() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
float f4_get_float() {
  float r = 55.0;
  return r;
}


x86 assembly (clang, -O0):
<f4_get_float>:
push   %rbp
mov    %rsp,%rbp
movss  0xef4(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4_get_float>:
movss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @f4_get_float() {
%1 = alloca float
store float 5.500000e+01, float* %1
%2 = load float, float* %1
ret float %2
}

LLVM IR (-O2):
define float @f4_get_float() {
ret float 5.500000e+01
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void print_array(int n, int arr[]) {
  int i;
  for (i = 0; i < n; i++)
    printf("%d\n", arr[i]);
}


x86 assembly (clang, -O0):
<print_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1157 <print_array+0x47>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <print_array+0x16>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_array>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edi,%edi
jle    1145 <print_array+0x35>
mov    %rsi,%r15
mov    %edi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <print_array+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @print_array(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @print_array(i32 %0, i32* nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %1, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
unsigned int thr_self() { return (1); }


x86 assembly (clang, -O0):
<thr_self>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<thr_self>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @thr_self() {
ret i32 1
}

LLVM IR (-O2):
define i32 @thr_self() {
ret i32 1
}
void fn_extern(void) { printf("extern: %s\n", __func__); }


x86 assembly (clang, -O0):
<fn_extern>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeea(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_extern>:
lea    0xee9(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"extern: %s\0A\00"
@__func__.fn_extern = [10 x i8] c"fn_extern\00"
define void @fn_extern() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__func__.fn_extern, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"extern: %s\0A\00"
@__func__.fn_extern = [10 x i8] c"fn_extern\00"
define void @fn_extern() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @__func__.fn_extern, i64 0, i64 0))
ret void
}
void GPIOTriggerPinInt(unsigned int baseAdd, unsigned int intLine,
                       unsigned int pinNumber) {
  if ((0x0) == intLine) {
    (*((volatile unsigned int *)(baseAdd + (0x24 + (0 * 4))))) =
        (1 << pinNumber);
  } else {
    (*((volatile unsigned int *)(baseAdd + (0x24 + (1 * 4))))) =
        (1 << pinNumber);
  }
}


x86 assembly (clang, -O0):
<GPIOTriggerPinInt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%eax
jne    1133 <GPIOTriggerPinInt+0x33>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0x24,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
jmp    1149 <GPIOTriggerPinInt+0x49>
mov    -0xc(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x4(%rbp),%eax
add    $0x28,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOTriggerPinInt>:
mov    %edx,%ecx
xor    %eax,%eax
test   %esi,%esi
setne  %al
mov    $0x1,%edx
shl    %cl,%edx
lea    (%rdi,%rax,4),%eax
add    $0x24,%eax
mov    %edx,(%rax)
ret

LLVM IR (-O0):
define void @GPIOTriggerPinInt(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = icmp eq i32 0, %7
br i1 %8, label %9, label %16
9: ; preds = %3
%10 = load i32, i32* %6
%11 = shl i32 1, %10
%12 = load i32, i32* %4
%13 = add i32 %12, 36
%14 = zext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
store volatile i32 %11, i32* %15
br label %23
16: ; preds = %3
%17 = load i32, i32* %6
%18 = shl i32 1, %17
%19 = load i32, i32* %4
%20 = add i32 %19, 40
%21 = zext i32 %20 to i64
%22 = inttoptr i64 %21 to i32*
store volatile i32 %18, i32* %22
br label %23
23: ; preds = %16, %9
ret void
}

LLVM IR (-O2):
define void @GPIOTriggerPinInt(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
%5 = shl nuw i32 1, %2
%6 = select i1 %4, i32 36, i32 40
%7 = add i32 %6, %0
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 %5, i32* %9
ret void
}
int test_imm_1Cuint32_reg(unsigned int val) {
  return ((val) & (0x1C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Cuint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x1c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Cuint32_reg>:
test   $0x1c,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Cuint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 28
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_1Cuint32_reg(i32 %0) {
%2 = and i32 %0, 28
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int f(int *i) {
  int *p = i;
  return *p;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
store i32* %0, i32** %2
%4 = load i32*, i32** %2
store i32* %4, i32** %3
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @f(i32* nocapture %0) {
%2 = load i32, i32* %0
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x61() {
  Assert_real((isodigit(97) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              490, ("isodigit should be 0 for a"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x61>:
push   %rbp
mov    %rsp,%rbp
mov    $0x61,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x1ea,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x61>:
push   %rax
mov    $0x61,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x1ea,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for a\00"
define void @t_isodigit_0x61() {
%1 = call i64 @isodigit(i32 97)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 490, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [27 x i8] c"isodigit should be 0 for a\00"
define void @t_isodigit_0x61() {
%1 = tail call i64 @isodigit(i32 97)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 490, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int __attribute__((cold)) bar(int a) { return 1; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    $0x1,%eax
ret
cs nopw 0x0(%rax,%rax,1)

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @bar(i32 %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ outportb(unsigned short, unsigned short);
void io_serial_configure_baud_rate(unsigned short com, unsigned short divisor) {
  outportb((com + 3), 0x80);
  outportb((com), (divisor >> 8) & 0x00FF);
  outportb((com), divisor & 0x00FF);
}


x86 assembly (clang, -O0):
<io_serial_configure_baud_rate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movzwl -0x2(%rbp),%eax
add    $0x3,%eax
mov    $0x80,%esi
movzwl %ax,%edi
call   1030 <outportb@plt>
mov    -0x2(%rbp),%cx
movzwl -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
movzwl %cx,%edi
movzwl %ax,%esi
call   1030 <outportb@plt>
mov    -0x2(%rbp),%cx
movzwl -0x4(%rbp),%eax
and    $0xff,%eax
movzwl %cx,%edi
movzwl %ax,%esi
call   1030 <outportb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_serial_configure_baud_rate>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
lea    0x3(%rbx),%eax
movzwl %ax,%edi
mov    $0x80,%esi
call   1030 <outportb@plt>
mov    %ebp,%esi
shr    $0x8,%esi
mov    %ebx,%edi
call   1030 <outportb@plt>
movzbl %bpl,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <outportb@plt>

LLVM IR (-O0):
define void @io_serial_configure_baud_rate(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = zext i16 %5 to i32
%7 = add nsw i32 %6, 3
%8 = trunc i32 %7 to i16
%9 = call i32 @outportb(i16 zeroext %8, i16 zeroext 128)
%10 = load i16, i16* %3
%11 = load i16, i16* %4
%12 = zext i16 %11 to i32
%13 = ashr i32 %12, 8
%14 = and i32 %13, 255
%15 = trunc i32 %14 to i16
%16 = call i32 @outportb(i16 zeroext %10, i16 zeroext %15)
%17 = load i16, i16* %3
%18 = load i16, i16* %4
%19 = zext i16 %18 to i32
%20 = and i32 %19, 255
%21 = trunc i32 %20 to i16
%22 = call i32 @outportb(i16 zeroext %17, i16 zeroext %21)
ret void
}

LLVM IR (-O2):
define void @io_serial_configure_baud_rate(i16 zeroext %0, i16 zeroext %1) {
%3 = add i16 %0, 3
%4 = tail call i32 @outportb(i16 zeroext %3, i16 zeroext 128)
%5 = lshr i16 %1, 8
%6 = tail call i32 @outportb(i16 zeroext %0, i16 zeroext %5)
%7 = and i16 %1, 255
%8 = tail call i32 @outportb(i16 zeroext %0, i16 zeroext %7)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
scalar_t__ strcmp(char *, char *);
int main(void) {
  char quasi_trigraph[] = {'?', '?', ' ', '?', '?', '?', ' ', '?', '?',
                           '%', ' ', '?', '?', '^', ' ', '?', '#', '\0'};
  assert(strcmp("?? ??? ??% ??^ ???=", quasi_trigraph) == 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec4(%rip),%ax
mov    %ax,-0x10(%rbp)
lea    -0x20(%rbp),%rsi
lea    0xeb7(%rip),%rdi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movaps 0xed5(%rip),%xmm0
movaps %xmm0,(%rsp)
movw   $0x23,0x10(%rsp)
lea    0xed5(%rip),%rdi
mov    %rsp,%rsi
call   1030 <strcmp@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.quasi_trigraph = [18 x i8] c"?? ??? ??% ??^ ?#\00"
@.str = [20 x i8] c"?? ??? ??% ??^ ???=\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [18 x i8]
store i32 0, i32* %1
%3 = bitcast [18 x i8]* %2 to i8*
%4 = getelementptr inbounds [18 x i8], [18 x i8]* %2, i64 0, i64 0
%5 = call i64 @strcmp(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
ret i32 0
}

LLVM IR (-O2):
@__const.main.quasi_trigraph = [18 x i8] c"?? ??? ??% ??^ ?#\00"
@.str = [20 x i8] c"?? ??? ??% ??^ ???=\00"
define i32 @main() {
%1 = alloca [18 x i8]
%2 = getelementptr inbounds [18 x i8], [18 x i8]* %1, i64 0, i64 0
%3 = call i64 @strcmp(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
ret i32 0
}
void smi_larb0_clock_off(void) {}


x86 assembly (clang, -O0):
<smi_larb0_clock_off>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smi_larb0_clock_off>:
ret

LLVM IR (-O0):
define void @smi_larb0_clock_off() {
ret void
}

LLVM IR (-O2):
define void @smi_larb0_clock_off() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void home(void) { printf("\033[1;1H"); }


x86 assembly (clang, -O0):
<home>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<home>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"\1B[1;1H\00"
define void @home() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"\1B[1;1H\00"
define void @home() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
scalar_t__ getpid();
scalar_t__ getppid();
int /*<<< orphan*/ printf(char *, long);
void get_process_info(pid_t pgid) {
  printf("\n             PID: %ld\n", (long)getpid());
  printf("            PPID: %ld\n", (long)getppid());
  printf("Process Group-ID: %ld +\n", (long)pgid);
}


x86 assembly (clang, -O0):
<get_process_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %rax,%rsi
lea    0xeb3(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <getppid@plt>
mov    %rax,%rsi
lea    0xeb5(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xebc(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_process_info>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xebe(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <getppid@plt>
lea    0xec0(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
lea    0xec8(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"\0A PID: %ld\0A\00"
@.str.1 = [23 x i8] c" PPID: %ld\0A\00"
@.str.2 = [25 x i8] c"Process Group-ID: %ld +\0A\00"
define void @get_process_info(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i64 (...) @getpid()
%4 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i64 %3)
%5 = call i64 (...) @getppid()
%6 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i64 %5)
%7 = load i64, i64* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i64 %7)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"\0A PID: %ld\0A\00"
@.str.1 = [23 x i8] c" PPID: %ld\0A\00"
@.str.2 = [25 x i8] c"Process Group-ID: %ld +\0A\00"
define void @get_process_info(i64 %0) {
%2 = tail call i64 (...) @getpid()
%3 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i64 %2)
%4 = tail call i64 (...) @getppid()
%5 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i64 %4)
%6 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i64 %0)
ret void
}
int test_05(unsigned char x, int y, int z) { return ((x << 3) & 192) != 0; }


x86 assembly (clang, -O0):
<test_05>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x3,%eax
and    $0xc0,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_05>:
xor    %eax,%eax
test   $0x18,%dil
setne  %al
ret

LLVM IR (-O0):
define i32 @test_05(i8 zeroext %0, i32 %1, i32 %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = shl i32 %8, 3
%10 = and i32 %9, 192
%11 = icmp ne i32 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @test_05(i8 zeroext %0, i32 %1, i32 %2) {
%4 = and i8 %0, 24
%5 = icmp ne i8 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
int test_RetNonZeroFail() { return 77; }


x86 assembly (clang, -O0):
<test_RetNonZeroFail>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_RetNonZeroFail>:
mov    $0x4d,%eax
ret

LLVM IR (-O0):
define i32 @test_RetNonZeroFail() {
ret i32 77
}

LLVM IR (-O2):
define i32 @test_RetNonZeroFail() {
ret i32 77
}
/* Variables and functions */
int /*<<< orphan*/ PUT32(int, int);
void uart_init(void) {
  PUT32((0x20201000 + 0x44), 0x7FF);
  PUT32((0x20201000 + 0x24), 1);
  PUT32((0x20201000 + 0x28), 40);
  PUT32((0x20201000 + 0x2C), 0x70);
  PUT32((0x20201000 + 0x30), 0x301);
}


x86 assembly (clang, -O0):
<uart_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20201044,%edi
mov    $0x7ff,%esi
call   1030 <PUT32@plt>
mov    $0x20201024,%edi
mov    $0x1,%esi
call   1030 <PUT32@plt>
mov    $0x20201028,%edi
mov    $0x28,%esi
call   1030 <PUT32@plt>
mov    $0x2020102c,%edi
mov    $0x70,%esi
call   1030 <PUT32@plt>
mov    $0x20201030,%edi
mov    $0x301,%esi
call   1030 <PUT32@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_init>:
push   %rax
mov    $0x20201044,%edi
mov    $0x7ff,%esi
call   1030 <PUT32@plt>
mov    $0x20201024,%edi
mov    $0x1,%esi
call   1030 <PUT32@plt>
mov    $0x20201028,%edi
mov    $0x28,%esi
call   1030 <PUT32@plt>
mov    $0x2020102c,%edi
mov    $0x70,%esi
call   1030 <PUT32@plt>
mov    $0x20201030,%edi
mov    $0x301,%esi
pop    %rax
jmp    1030 <PUT32@plt>

LLVM IR (-O0):
define void @uart_init() {
%1 = call i32 @PUT32(i32 538972228, i32 2047)
%2 = call i32 @PUT32(i32 538972196, i32 1)
%3 = call i32 @PUT32(i32 538972200, i32 40)
%4 = call i32 @PUT32(i32 538972204, i32 112)
%5 = call i32 @PUT32(i32 538972208, i32 769)
ret void
}

LLVM IR (-O2):
define void @uart_init() {
%1 = tail call i32 @PUT32(i32 538972228, i32 2047)
%2 = tail call i32 @PUT32(i32 538972196, i32 1)
%3 = tail call i32 @PUT32(i32 538972200, i32 40)
%4 = tail call i32 @PUT32(i32 538972204, i32 112)
%5 = tail call i32 @PUT32(i32 538972208, i32 769)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glad_glEndTransformFeedback();
void glEndTransformFeedback() { glad_glEndTransformFeedback(); }


x86 assembly (clang, -O0):
<glEndTransformFeedback>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <glad_glEndTransformFeedback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<glEndTransformFeedback>:
xor    %eax,%eax
jmp    1030 <glad_glEndTransformFeedback@plt>

LLVM IR (-O0):
define void @glEndTransformFeedback() {
%1 = call i32 (...) @glad_glEndTransformFeedback()
ret void
}

LLVM IR (-O2):
define void @glEndTransformFeedback() {
%1 = tail call i32 (...) @glad_glEndTransformFeedback()
ret void
}
RX0RX1(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{
  if ((p0[x0]) <= (p1[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<RX0RX1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x28(%rbp),%rcx
movslq -0x14(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
jg     1140 <RX0RX1+0x40>
movl   $0x1,-0x4(%rbp)
jmp    1147 <RX0RX1+0x47>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RX0RX1>:
movslq %edx,%rax
mov    (%r8,%rax,4),%edx
movslq %ecx,%rcx
xor    %eax,%eax
cmp    (%r9,%rcx,4),%edx
setle  %al
ret

LLVM IR (-O0):
define i32 @RX0RX1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %12
%15 = load i32, i32* %10
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32*, i32** %13
%20 = load i32, i32* %11
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %19, i64 %21
%23 = load i32, i32* %22
%24 = icmp sle i32 %18, %23
br i1 %24, label %25, label %26
25: ; preds = %6
store i32 1, i32* %7
br label %27
26: ; preds = %6
store i32 0, i32* %7
br label %27
27: ; preds = %26, %25
%28 = load i32, i32* %7
ret i32 %28
}

LLVM IR (-O2):
define i32 @RX0RX1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture %4, i32* nocapture %5) {
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %4, i64 %7
%9 = load i32, i32* %8
%10 = sext i32 %3 to i64
%11 = getelementptr inbounds i32, i32* %5, i64 %10
%12 = load i32, i32* %11
%13 = icmp sle i32 %9, %12
%14 = zext i1 %13 to i32
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ write_ZIGBEE_short(int, short);
void set_short_address(short int *address) {
  write_ZIGBEE_short(0x03, address[0]);
  write_ZIGBEE_short(0x04, address[1]);
}


x86 assembly (clang, -O0):
<set_short_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x3,%edi
movswl (%rax),%esi
call   1030 <write_ZIGBEE_short@plt>
mov    -0x8(%rbp),%rax
mov    $0x4,%edi
movswl 0x2(%rax),%esi
call   1030 <write_ZIGBEE_short@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_short_address>:
push   %rbx
mov    %rdi,%rbx
movswl (%rdi),%esi
mov    $0x3,%edi
call   1030 <write_ZIGBEE_short@plt>
movswl 0x2(%rbx),%esi
mov    $0x4,%edi
pop    %rbx
jmp    1030 <write_ZIGBEE_short@plt>

LLVM IR (-O0):
define void @set_short_address(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = getelementptr inbounds i16, i16* %3, i64 0
%5 = load i16, i16* %4
%6 = call i32 @write_ZIGBEE_short(i32 3, i16 signext %5)
%7 = load i16*, i16** %2
%8 = getelementptr inbounds i16, i16* %7, i64 1
%9 = load i16, i16* %8
%10 = call i32 @write_ZIGBEE_short(i32 4, i16 signext %9)
ret void
}

LLVM IR (-O2):
define void @set_short_address(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = tail call i32 @write_ZIGBEE_short(i32 3, i16 signext %2)
%4 = getelementptr inbounds i16, i16* %0, i64 1
%5 = load i16, i16* %4
%6 = tail call i32 @write_ZIGBEE_short(i32 4, i16 signext %5)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ _rdpkru(int);
int /*<<< orphan*/ expected_pk_fault(int /*<<< orphan*/);
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ pkey_access_deny(int /*<<< orphan*/);
int read_ptr(int *);
int /*<<< orphan*/ sigsafe_printf(char *, int, ...);
void test_read_of_access_disabled_region(int *ptr, uint16_t pkey) {
  int ptr_contents;
  do {
    if (1 <= 0)
      sigsafe_printf("disabling access to PKEY[%02d], doing read @ %p\n", pkey,
                     ptr);
    fflush(NULL);
  } while (0);
  _rdpkru(1018);
  pkey_access_deny(pkey);
  ptr_contents = read_ptr(ptr);
  do {
    if (1 <= 0)
      sigsafe_printf("*ptr: %d\n", ptr_contents);
    fflush(NULL);
  } while (0);
  expected_pk_fault(pkey);
}


x86 assembly (clang, -O0):
<test_read_of_access_disabled_region>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <fflush@plt>
mov    $0x3fa,%edi
call   1070 <_rdpkru@plt>
mov    -0xc(%rbp),%edi
call   1050 <pkey_access_deny@plt>
mov    -0x8(%rbp),%rdi
call   1030 <read_ptr@plt>
mov    %eax,-0x10(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <fflush@plt>
mov    -0xc(%rbp),%edi
call   1060 <expected_pk_fault@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_read_of_access_disabled_region>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
xor    %edi,%edi
call   1040 <fflush@plt>
mov    $0x3fa,%edi
call   1070 <_rdpkru@plt>
mov    %ebx,%edi
call   1050 <pkey_access_deny@plt>
mov    %r14,%rdi
call   1030 <read_ptr@plt>
xor    %edi,%edi
call   1040 <fflush@plt>
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1060 <expected_pk_fault@plt>

LLVM IR (-O0):
define void @test_read_of_access_disabled_region(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
br label %6
6: ; preds = %2
%7 = call i32 @fflush(i32* null)
br label %8
8: ; preds = %6
%9 = call i32 @_rdpkru(i32 1018)
%10 = load i32, i32* %4
%11 = call i32 @pkey_access_deny(i32 %10)
%12 = load i32*, i32** %3
%13 = call i32 @read_ptr(i32* %12)
store i32 %13, i32* %5
br label %14
14: ; preds = %8
%15 = call i32 @fflush(i32* null)
br label %16
16: ; preds = %14
%17 = load i32, i32* %4
%18 = call i32 @expected_pk_fault(i32 %17)
ret void
}

LLVM IR (-O2):
define void @test_read_of_access_disabled_region(i32* %0, i32 %1) {
%3 = tail call i32 @fflush(i32* null)
%4 = tail call i32 @_rdpkru(i32 1018)
%5 = tail call i32 @pkey_access_deny(i32 %1)
%6 = tail call i32 @read_ptr(i32* %0)
%7 = tail call i32 @fflush(i32* null)
%8 = tail call i32 @expected_pk_fault(i32 %1)
ret void
}
/* Variables and functions */
char *get_min_2(char *);
__attribute__((noclone, no, noipa)) void *test_min_2(void) {
  char c;
  char *p = get_min_2(&c);
  void *q = p < &c ? p : &c;
  return q;
}


x86 assembly (clang, -O0):
<test_min_2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x1(%rbp),%rdi
call   1030 <get_min_2@plt>
mov    %rax,-0x10(%rbp)
lea    -0x1(%rbp),%rax
cmp    %rax,-0x10(%rbp)
jae    1140 <test_min_2+0x30>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    114d <test_min_2+0x3d>
lea    -0x1(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    114d <test_min_2+0x3d>
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_min_2>:
push   %rbx
sub    $0x10,%rsp
lea    0xf(%rsp),%rbx
mov    %rbx,%rdi
call   1030 <get_min_2@plt>
cmp    %rbx,%rax
cmovae %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i8* @test_min_2() {
%1 = alloca i8
%2 = alloca i8*
%3 = alloca i8*
%4 = call i8* @get_min_2(i8* %1)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = icmp ult i8* %5, %1
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = load i8*, i8** %2
br label %10
9: ; preds = %0
br label %10
10: ; preds = %9, %7
%11 = phi i8* [ %8, %7 ], [ %1, %9 ]
store i8* %11, i8** %3
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @test_min_2() {
%1 = alloca i8
%2 = call i8* @get_min_2(i8* %1)
%3 = icmp ult i8* %2, %1
%4 = select i1 %3, i8* %2, i8* %1
ret i8* %4
}
OP(fd, fc) {
  illegal_1();
  op_fc();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_fc@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_fc@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_fc()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_fc()
ret i32 undef
}
/* Variables and functions */
char *smp_str_trim(char *);
char *smp_str_trimCRLF(char *);
char *smp_str_trim_complete(char *str) {
  str = smp_str_trimCRLF(str);
  return smp_str_trim(str);
}


x86 assembly (clang, -O0):
<smp_str_trim_complete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <smp_str_trimCRLF@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <smp_str_trim@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_str_trim_complete>:
push   %rax
call   1030 <smp_str_trimCRLF@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <smp_str_trim@plt>

LLVM IR (-O0):
define i8* @smp_str_trim_complete(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @smp_str_trimCRLF(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = call i8* @smp_str_trim(i8* %5)
ret i8* %6
}

LLVM IR (-O2):
define i8* @smp_str_trim_complete(i8* %0) {
%2 = tail call i8* @smp_str_trimCRLF(i8* %0)
%3 = tail call i8* @smp_str_trim(i8* %2)
ret i8* %3
}
int fooNonGnu(int n) { return 0; }


x86 assembly (clang, -O0):
<fooNonGnu>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fooNonGnu>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fooNonGnu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @fooNonGnu(i32 %0) {
ret i32 0
}
void rop3_140_0_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = ~T;
  stk2 = *D | stk3;
  stk1 = S & stk2;
  *D = (stk1 & S) | (stk1 & (~T)) | (T & (~S) & *D);
}


x86 assembly (clang, -O0):
<rop3_140_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
movzbl -0xb(%rbp),%ecx
movzbl -0xa(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl -0xa(%rbp),%ecx
movzbl -0x9(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
mov    -0x8(%rbp),%rdx
movzbl (%rdx),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_140_0_1>:
mov    %edx,%eax
not    %al
mov    (%rdi),%cl
or     %cl,%al
and    %sil,%al
not    %sil
and    %dl,%sil
and    %cl,%sil
or     %al,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_140_0_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = xor i32 %11, -1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %9
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = or i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %8
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = and i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %7
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %5
%30 = zext i8 %29 to i32
%31 = and i32 %28, %30
%32 = load i8, i8* %7
%33 = zext i8 %32 to i32
%34 = load i8, i8* %6
%35 = zext i8 %34 to i32
%36 = xor i32 %35, -1
%37 = and i32 %33, %36
%38 = or i32 %31, %37
%39 = load i8, i8* %6
%40 = zext i8 %39 to i32
%41 = load i8, i8* %5
%42 = zext i8 %41 to i32
%43 = xor i32 %42, -1
%44 = and i32 %40, %43
%45 = load i8*, i8** %4
%46 = load i8, i8* %45
%47 = zext i8 %46 to i32
%48 = and i32 %44, %47
%49 = or i32 %38, %48
%50 = trunc i32 %49 to i8
%51 = load i8*, i8** %4
store i8 %50, i8* %51
ret void
}

LLVM IR (-O2):
define void @rop3_140_0_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %2, -1
%5 = load i8, i8* %0
%6 = or i8 %5, %4
%7 = and i8 %6, %1
%8 = xor i8 %1, -1
%9 = and i8 %8, %2
%10 = and i8 %9, %5
%11 = or i8 %7, %10
store i8 %11, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FixedWingPathFollowerSettingsHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void FixedWingPathFollowerSettingsUpdated() {
  UAVObjUpdated(FixedWingPathFollowerSettingsHandle());
}


x86 assembly (clang, -O0):
<FixedWingPathFollowerSettingsUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FixedWingPathFollowerSettingsHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FixedWingPathFollowerSettingsUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <FixedWingPathFollowerSettingsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @FixedWingPathFollowerSettingsUpdated() {
%1 = call i32 (...) @FixedWingPathFollowerSettingsHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @FixedWingPathFollowerSettingsUpdated() {
%1 = tail call i32 (...) @FixedWingPathFollowerSettingsHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
int diminuto_module_example_dtor(void) {
  fputs("diminuto_module_example_dtor\n", stderr);
  return 0;
}


x86 assembly (clang, -O0):
<diminuto_module_example_dtor>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_module_example_dtor>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <fputs@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"diminuto_module_example_dtor\0A\00"
@stderr = global i32 0
define i32 @diminuto_module_example_dtor() {
%1 = load i32, i32* @stderr
%2 = call i32 @fputs(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [30 x i8] c"diminuto_module_example_dtor\0A\00"
@stderr = global i32 0
define i32 @diminuto_module_example_dtor() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
float rintf(float);
float futrts_round32(float x) { return rintf(x); }


x86 assembly (clang, -O0):
<futrts_round32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <rintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<futrts_round32>:
jmp    1030 <rintf@plt>

LLVM IR (-O0):
define float @futrts_round32(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @llvm.rint.f32(float %3)
ret float %4
}

LLVM IR (-O2):
define float @futrts_round32(float %0) {
%2 = tail call float @llvm.rint.f32(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0x3b() {
  Assert_real((islower(59) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              300, ("islower should be 0 for ;"));
}


x86 assembly (clang, -O0):
<t_islower_0x3b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3b,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x12c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0x3b>:
push   %rax
mov    $0x3b,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x12c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 0 for ;\00"
define void @t_islower_0x3b() {
%1 = call i64 @islower(i32 59)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 300, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [26 x i8] c"islower should be 0 for ;\00"
define void @t_islower_0x3b() {
%1 = tail call i64 @islower(i32 59)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 300, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
scalar_t__ fprintf(int /*<<< orphan*/ *, char *, int);
int /*<<< orphan*/ perror(char *);
void print_int(FILE *f, int i) {
  if (fprintf(f, "%d\n", i) < 0)
    perror("print_int");
}


x86 assembly (clang, -O0):
<print_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xec3(%rip),%rsi
call   1030 <fprintf@plt>
cmp    $0x0,%rax
jge    1158 <print_int+0x38>
lea    0xeb1(%rip),%rdi
call   1040 <perror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_int>:
push   %rax
mov    %esi,%edx
lea    0xed6(%rip),%rsi
call   1030 <fprintf@plt>
test   %rax,%rax
js     1136 <print_int+0x16>
pop    %rax
ret
lea    0xec7(%rip),%rdi
pop    %rax
jmp    1040 <perror@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [10 x i8] c"print_int\00"
define void @print_int(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i64 @fprintf(i32* %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @perror(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [10 x i8] c"print_int\00"
define void @print_int(i32* nocapture %0, i32 %1) {
%3 = tail call i64 @fprintf(i32* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @perror(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret void
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ attach(struct __test_metadata *);
void wrapper_attach(struct __test_metadata *_metadata,
                    struct __fixture_variant_metadata *variant) {
  attach(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_attach>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <attach@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_attach>:
jmp    1030 <attach@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_attach(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @attach(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_attach(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @attach(%struct.__test_metadata* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
unsigned char *malloc(int);
int /*<<< orphan*/ memcpy(unsigned char *, void *, unsigned int);
unsigned char *generate_lenstr(void *str, unsigned int str_len) {
  unsigned char *len_str = malloc(sizeof(unsigned char[str_len + 1]));
  assert(str_len <= 256);
  len_str[0] = str_len - 1;
  memcpy(len_str + 1, str, str_len);
  return len_str;
}


x86 assembly (clang, -O0):
<generate_lenstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,%eax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpl   $0x100,-0xc(%rbp)
setbe  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rdi
add    $0x1,%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_lenstr>:
push   %r15
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %rdi,%r14
lea    0x1(%rbx),%edi
call   1050 <malloc@plt>
mov    %rax,%r15
xor    %edi,%edi
cmp    $0x101,%ebx
setb   %dil
call   1030 <assert@plt>
lea    -0x1(%rbx),%eax
mov    %al,(%r15)
lea    0x1(%r15),%rdi
mov    %r14,%rsi
mov    %ebx,%edx
call   1040 <memcpy@plt>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @generate_lenstr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add i32 %6, 1
%8 = zext i32 %7 to i64
%9 = trunc i64 %8 to i32
%10 = call i8* @malloc(i32 %9)
store i8* %10, i8** %5
%11 = load i32, i32* %4
%12 = icmp ule i32 %11, 256
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
%15 = load i32, i32* %4
%16 = sub i32 %15, 1
%17 = trunc i32 %16 to i8
%18 = load i8*, i8** %5
%19 = getelementptr inbounds i8, i8* %18, i64 0
store i8 %17, i8* %19
%20 = load i8*, i8** %5
%21 = getelementptr inbounds i8, i8* %20, i64 1
%22 = load i8*, i8** %3
%23 = load i32, i32* %4
%24 = call i32 @memcpy(i8* %21, i8* %22, i32 %23)
%25 = load i8*, i8** %5
ret i8* %25
}

LLVM IR (-O2):
define i8* @generate_lenstr(i8* %0, i32 %1) {
%3 = add i32 %1, 1
%4 = tail call i8* @malloc(i32 %3)
%5 = icmp ult i32 %1, 257
%6 = zext i1 %5 to i32
%7 = tail call i32 @assert(i32 %6)
%8 = trunc i32 %1 to i8
%9 = add i8 %8, -1
store i8 %9, i8* %4
%10 = getelementptr inbounds i8, i8* %4, i64 1
%11 = tail call i32 @memcpy(i8* %10, i8* %0, i32 %1)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void htrace_tuple_free(void *ctx, void *key, void *val) {
  free(key);
  free(val);
}


x86 assembly (clang, -O0):
<htrace_tuple_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<htrace_tuple_free>:
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @htrace_tuple_free(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
%8 = call i32 @free(i8* %7)
%9 = load i8*, i8** %6
%10 = call i32 @free(i8* %9)
ret void
}

LLVM IR (-O2):
define void @htrace_tuple_free(i8* nocapture readnone %0, i8* nocapture %1, i8* nocapture %2) {
%4 = tail call i32 @free(i8* %1)
%5 = tail call i32 @free(i8* %2)
ret void
}