xunge/DecIR huggingface dataset:
int padovan(n) {
  if (n == 0 || n == 1 || n == 2)
    return 1;
  return padovan(n - 2) + padovan(n - 3);
}


x86 assembly (clang, -O0):
<padovan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1139 <padovan+0x29>
cmpl   $0x1,-0x8(%rbp)
je     1139 <padovan+0x29>
cmpl   $0x2,-0x8(%rbp)
jne    1145 <padovan+0x35>
movl   $0x1,-0x4(%rbp)
jmp    1168 <padovan+0x58>
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <padovan@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x3,%edi
call   1030 <padovan@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<padovan>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x3,%edi
jb     1145 <padovan+0x35>
mov    %edi,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    -0x2(%rbx),%edi
call   1030 <padovan@plt>
add    $0xfffffffd,%ebx
add    %eax,%ebp
cmp    $0x2,%ebx
ja     1130 <padovan+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @padovan(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 1
br i1 %8, label %12, label %9
9: ; preds = %6
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 2
br i1 %11, label %12, label %13
12: ; preds = %9, %6, %1
store i32 1, i32* %2
br label %21
13: ; preds = %9
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 2
%16 = call i32 @padovan(i32 %15)
%17 = load i32, i32* %3
%18 = sub nsw i32 %17, 3
%19 = call i32 @padovan(i32 %18)
%20 = add nsw i32 %16, %19
store i32 %20, i32* %2
br label %21
21: ; preds = %13, %12
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @padovan(i32 %0) {
%2 = icmp ult i32 %0, 3
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -2
%7 = tail call i32 @padovan(i32 %6)
%8 = add nsw i32 %4, -3
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %8, 3
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
int test_imm_76uint16_mem(unsigned short *val) {
  return ((*val) & (-0x76 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_76uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff8a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_76uint16_mem>:
movzwl (%rdi),%eax
test   $0xff8a,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_76uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -118
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_76uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -118
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
void setsignals() { signal(SIGINT, SIG_IGN); }


x86 assembly (clang, -O0):
<setsignals>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
mov    0x2ebc(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setsignals>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
jmp    1030 <signal@plt>

LLVM IR (-O0):
@SIGINT = global i32 0
@SIG_IGN = global i32 0
define void @setsignals() {
%1 = load i32, i32* @SIGINT
%2 = load i32, i32* @SIG_IGN
%3 = call i32 @signal(i32 %1, i32 %2)
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@SIG_IGN = global i32 0
define void @setsignals() {
%1 = load i32, i32* @SIGINT
%2 = load i32, i32* @SIG_IGN
%3 = tail call i32 @signal(i32 %1, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void command_list(void) {
  printf("\r------------------------------------------\n");
  printf("\r 1: ioctl_test\n");
  printf("\r q: Exit\n");
  printf("\r------------------------------------------\n");
  printf("\r select : ");
}


x86 assembly (clang, -O0):
<command_list>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf06(%rip),%rdi
call   1030 <printf@plt>
lea    0xf0b(%rip),%rdi
call   1030 <printf@plt>
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
lea    0xefe(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<command_list>:
push   %rbx
lea    0xefe(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
lea    0xed9(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
lea    0xea9(%rip),%rdi
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"\0D------------------------------------------\0A\00"
@.str.1 = [17 x i8] c"\0D 1: ioctl_test\0A\00"
@.str.2 = [11 x i8] c"\0D q: Exit\0A\00"
@.str.3 = [12 x i8] c"\0D select : \00"
define void @command_list() {
%1 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.3 = [12 x i8] c"\0D select : \00"
@str.4 = [16 x i8] c"\0D 1: ioctl_test\00"
@str.5 = [10 x i8] c"\0D q: Exit\00"
@str.6 = [44 x i8] c"\0D------------------------------------------\00"
define void @command_list() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str.6, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str.5, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str.6, i64 0, i64 0))
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
ret void
}
int isGreater(int x, int y) {
  long long a = x;
  long long b = y;
  int z = (a + ~b) >> 63;
  return ++z;
}


x86 assembly (clang, -O0):
<isGreater>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
movslq -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
xor    $0xffffffffffffffff,%rcx
add    %rcx,%rax
sar    $0x3f,%rax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<isGreater>:
movslq %edi,%rcx
not    %esi
movslq %esi,%rax
add    %rcx,%rax
sar    $0x3f,%rax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isGreater(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
store i64 %9, i64* %5
%10 = load i32, i32* %4
%11 = sext i32 %10 to i64
store i64 %11, i64* %6
%12 = load i64, i64* %5
%13 = load i64, i64* %6
%14 = xor i64 %13, -1
%15 = add nsw i64 %12, %14
%16 = ashr i64 %15, 63
%17 = trunc i64 %16 to i32
store i32 %17, i32* %7
%18 = load i32, i32* %7
%19 = add nsw i32 %18, 1
store i32 %19, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @isGreater(i32 %0, i32 %1) {
%3 = sext i32 %0 to i64
%4 = xor i32 %1, -1
%5 = sext i32 %4 to i64
%6 = add nsw i64 %5, %3
%7 = ashr i64 %6, 63
%8 = trunc i64 %7 to i32
%9 = add nsw i32 %8, 1
ret i32 %9
}
int test_imm_56int64_midword_reg(long long val) {
  return ((val >> 16) & (0x56 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_56int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x56,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_56int64_midword_reg>:
test   $0x560000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_56int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 86
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_56int64_midword_reg(i64 %0) {
%2 = and i64 %0, 5636096
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3_file;

/* Variables and functions */
int SQLITE_READONLY;
int memLock(sqlite3_file *pFile, int eLock) { return SQLITE_READONLY; }


x86 assembly (clang, -O0):
<memLock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ed6(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memLock>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@SQLITE_READONLY = global i32 0
define i32 @memLock(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* @SQLITE_READONLY
ret i32 %5
}

LLVM IR (-O2):
@SQLITE_READONLY = global i32 0
define i32 @memLock(i32* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @SQLITE_READONLY
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ ReceiverActivityHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void ReceiverActivityUpdated() { UAVObjUpdated(ReceiverActivityHandle()); }


x86 assembly (clang, -O0):
<ReceiverActivityUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ReceiverActivityHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReceiverActivityUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <ReceiverActivityHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @ReceiverActivityUpdated() {
%1 = call i32 (...) @ReceiverActivityHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @ReceiverActivityUpdated() {
%1 = tail call i32 (...) @ReceiverActivityHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
void addroot(double root, double *roots, int *rootnp) {
  if (root >= 0 && root <= 1)
    roots[*rootnp] = root, (*rootnp)++;
}


x86 assembly (clang, -O0):
<addroot>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1156 <addroot+0x56>
movsd  0xed5(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
jb     1156 <addroot+0x56>
movsd  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
movslq (%rcx),%rcx
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<addroot>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1125 <addroot+0x25>
movsd  0xeee(%rip),%xmm1
ucomisd %xmm0,%xmm1
jb     1125 <addroot+0x25>
movslq (%rsi),%rax
movsd  %xmm0,(%rdi,%rax,8)
add    $0x1,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @addroot(double %0, double* %1, i32* %2) {
%4 = alloca double
%5 = alloca double*
%6 = alloca i32*
store double %0, double* %4
store double* %1, double** %5
store i32* %2, i32** %6
%7 = load double, double* %4
%8 = fcmp oge double %7, 0.000000e+00
br i1 %8, label %9, label %22
9: ; preds = %3
%10 = load double, double* %4
%11 = fcmp ole double %10, 1.000000e+00
br i1 %11, label %12, label %22
12: ; preds = %9
%13 = load double, double* %4
%14 = load double*, double** %5
%15 = load i32*, i32** %6
%16 = load i32, i32* %15
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds double, double* %14, i64 %17
store double %13, double* %18
%19 = load i32*, i32** %6
%20 = load i32, i32* %19
%21 = add nsw i32 %20, 1
store i32 %21, i32* %19
br label %22
22: ; preds = %12, %9, %3
ret void
}

LLVM IR (-O2):
define void @addroot(double %0, double* nocapture writeonly %1, i32* nocapture %2) {
%4 = fcmp oge double %0, 0.000000e+00
%5 = fcmp ole double %0, 1.000000e+00
%6 = and i1 %4, %5
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = load i32, i32* %2
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds double, double* %1, i64 %9
store double %0, double* %10
%11 = add nsw i32 %8, 1
store i32 %11, i32* %2
br label %12
12: ; preds = %7, %3
ret void
}
int test_imm_58uint8_reg(unsigned char val) {
  return ((val) & (0x58 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_58uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x58,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_58uint8_reg>:
test   $0x58,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_58uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 88
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_58uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 88
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct kvm_vcpu {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ BUG();
void kvm_deliver_pmi(struct kvm_vcpu *vcpu) { BUG(); }


x86 assembly (clang, -O0):
<kvm_deliver_pmi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <BUG@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kvm_deliver_pmi>:
xor    %eax,%eax
jmp    1030 <BUG@plt>

LLVM IR (-O0):
%struct.kvm_vcpu = type { i32 }
define void @kvm_deliver_pmi(%struct.kvm_vcpu* %0) {
%2 = alloca %struct.kvm_vcpu*
store %struct.kvm_vcpu* %0, %struct.kvm_vcpu** %2
%3 = call i32 (...) @BUG()
ret void
}

LLVM IR (-O2):
%struct.kvm_vcpu = type { i32 }
define void @kvm_deliver_pmi(%struct.kvm_vcpu* nocapture readnone %0) {
%2 = tail call i32 (...) @BUG()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putI2C1(int);
int /*<<< orphan*/ startI2C1();
int /*<<< orphan*/ stopI2C1();
void configDS1631(void) {
  startI2C1();
  putI2C1(0x90);
  putI2C1(0xAC);
  putI2C1(0x0C);
  stopI2C1();
}


x86 assembly (clang, -O0):
<configDS1631>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <startI2C1@plt>
mov    $0x90,%edi
call   1050 <putI2C1@plt>
mov    $0xac,%edi
call   1050 <putI2C1@plt>
mov    $0xc,%edi
call   1050 <putI2C1@plt>
mov    $0x0,%al
call   1040 <stopI2C1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<configDS1631>:
push   %rax
xor    %eax,%eax
call   1030 <startI2C1@plt>
mov    $0x90,%edi
call   1050 <putI2C1@plt>
mov    $0xac,%edi
call   1050 <putI2C1@plt>
mov    $0xc,%edi
call   1050 <putI2C1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <stopI2C1@plt>

LLVM IR (-O0):
define void @configDS1631() {
%1 = call i32 (...) @startI2C1()
%2 = call i32 @putI2C1(i32 144)
%3 = call i32 @putI2C1(i32 172)
%4 = call i32 @putI2C1(i32 12)
%5 = call i32 (...) @stopI2C1()
ret void
}

LLVM IR (-O2):
define void @configDS1631() {
%1 = tail call i32 (...) @startI2C1()
%2 = tail call i32 @putI2C1(i32 144)
%3 = tail call i32 @putI2C1(i32 172)
%4 = tail call i32 @putI2C1(i32 12)
%5 = tail call i32 (...) @stopI2C1()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ my_usleep(int);
void sys_sleep(int us) {
  if (us <= 0)
    return;
  my_usleep(us);
}


x86 assembly (clang, -O0):
<sys_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jg     112a <sys_sleep+0x1a>
jmp    1132 <sys_sleep+0x22>
mov    -0x4(%rbp),%edi
call   1030 <my_usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_sleep>:
test   %edi,%edi
jle    1119 <sys_sleep+0x9>
jmp    1030 <my_usleep@plt>
ret

LLVM IR (-O0):
define void @sys_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i32 @my_usleep(i32 %7)
br label %9
9: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
define void @sys_sleep(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @my_usleep(i32 %0)
br label %5
5: ; preds = %1, %3
ret void
}
int jac_chain_nm2_free(void *mem) {
  (void)mem;
  return 0;
}


x86 assembly (clang, -O0):
<jac_chain_nm2_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jac_chain_nm2_free>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @jac_chain_nm2_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @jac_chain_nm2_free(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ handle_XFSZ(int /*<<< orphan*/);
int gen_XFSZ(void) {
  handle_XFSZ(0);
  return 0;
}


x86 assembly (clang, -O0):
<gen_XFSZ>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <handle_XFSZ@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_XFSZ>:
push   %rax
xor    %edi,%edi
call   1030 <handle_XFSZ@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gen_XFSZ() {
%1 = call i32 @handle_XFSZ(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @gen_XFSZ() {
%1 = tail call i32 @handle_XFSZ(i32 0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ printf(char *, char *);
FILE *abrir_arquivo(FILE *fileTabela, char *nome_arquivo) {
  fileTabela = fopen(nome_arquivo, "r");
  if (fileTabela == NULL) {
    printf("\n%s\n", "Arquivo nao encontrado");
  }
  return fileTabela;
}


x86 assembly (clang, -O0):
<abrir_arquivo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xec5(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1162 <abrir_arquivo+0x42>
lea    0xeac(%rip),%rdi
lea    0xeaa(%rip),%rsi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<abrir_arquivo>:
push   %rbx
mov    %rsi,%rdi
lea    0xed5(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114b <abrir_arquivo+0x2b>
lea    0xec3(%rip),%rdi
lea    0xec1(%rip),%rsi
call   1030 <printf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
@.str.1 = [5 x i8] c"\0A%s\0A\00"
@.str.2 = [23 x i8] c"Arquivo nao encontrado\00"
define i32* @abrir_arquivo(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32* @fopen(i8* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %6, i32** %3
%7 = load i32*, i32** %3
%8 = icmp eq i32* %7, null
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.2, i64 0, i64 0))
br label %11
11: ; preds = %9, %2
%12 = load i32*, i32** %3
ret i32* %12
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
@.str.1 = [5 x i8] c"\0A%s\0A\00"
@.str.2 = [23 x i8] c"Arquivo nao encontrado\00"
define noalias i32* @abrir_arquivo(i32* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i32* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.2, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i32* %3
}
void RSA_blinding_off(void) {}


x86 assembly (clang, -O0):
<RSA_blinding_off>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSA_blinding_off>:
ret

LLVM IR (-O0):
define void @RSA_blinding_off() {
ret void
}

LLVM IR (-O2):
define void @RSA_blinding_off() {
ret void
}
/* Type definitions */
struct timeval {
  long long tv_sec;
  long long tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
long long gu_time_calendar() {
  struct timeval tmp;
  gettimeofday(&tmp, NULL);
  return ((tmp.tv_sec * 1000000000LL) + (tmp.tv_usec * 1000LL));
}


x86 assembly (clang, -O0):
<gu_time_calendar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0x3b9aca00,-0x10(%rbp),%rax
3b
imul   $0x3e8,-0x8(%rbp),%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gu_time_calendar>:
sub    $0x18,%rsp
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0x3b9aca00,0x8(%rsp),%rcx
9a 3b
imul   $0x3e8,0x10(%rsp),%rax
add    %rcx,%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define i64 @gu_time_calendar() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i64, i64* %3
%5 = mul nsw i64 %4, 1000000000
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%7 = load i64, i64* %6
%8 = mul nsw i64 %7, 1000
%9 = add nsw i64 %5, %8
ret i64 %9
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
define i64 @gu_time_calendar() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i64, i64* %4
%6 = mul nsw i64 %5, 1000000000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i64, i64* %7
%9 = mul nsw i64 %8, 1000
%10 = add nsw i64 %9, %6
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ none();
int /*<<< orphan*/ printf(char *);
main() {
  none();
  printf("Undetected: declaration of argument not present in argument list\n");
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <none@plt>
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <none@plt>
lea    0xed1(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [66 x i8] c"Undetected: declaration of argument not present in argument list\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @none()
%3 = call i32 @printf(i8* getelementptr inbounds ([66 x i8], [66 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@str = [65 x i8] c"Undetected: declaration of argument not present in argument list\00"
define i32 @main() {
%1 = tail call i32 (...) @none()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([65 x i8], [65 x i8]* @str, i64 0, i64 0))
ret i32 1
}
void *test_anti_range_64(long n) {
  extern void *alloc_anti_range_64(long) __attribute__((alloc_size(1)));
  if ((-0x7fffffffffffffffL - 1) + 2 <= n && n <= 12)
    n = (-0x7fffffffffffffffL - 1) + 2 - 1;
  return alloc_anti_range_64(n);
}


x86 assembly (clang, -O0):
<test_anti_range_64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movabs $0x8000000000000002,%rax
cmp    -0x8(%rbp),%rax
jg     1149 <test_anti_range_64+0x39>
cmpq   $0xc,-0x8(%rbp)
jg     1149 <test_anti_range_64+0x39>
movabs $0x8000000000000001,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <alloc_anti_range_64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_64>:
movabs $0x7ffffffffffffffe,%rax
ff ff 7f
lea    (%rdi,%rax,1),%rcx
lea    0xd(%rax),%rdx
add    $0x3,%rax
cmp    %rdx,%rcx
cmovb  %rax,%rdi
jmp    1030 <alloc_anti_range_64@plt>

LLVM IR (-O0):
define i8* @test_anti_range_64(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp sle i64 -9223372036854775806, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp sle i64 %6, 12
br i1 %7, label %8, label %9
8: ; preds = %5
store i64 -9223372036854775807, i64* %2
br label %9
9: ; preds = %8, %5, %1
%10 = load i64, i64* %2
%11 = call i8* @alloc_anti_range_64(i64 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @test_anti_range_64(i64 %0) {
%2 = add i64 %0, 9223372036854775806
%3 = icmp ult i64 %2, -9223372036854775797
%4 = select i1 %3, i64 -9223372036854775807, i64 %0
%5 = tail call i8* @alloc_anti_range_64(i64 %4)
ret i8* %5
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int write_start_solutions(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(15, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<write_start_solutions>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0xf,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_start_solutions>:
mov    $0xf,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @write_start_solutions() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 15, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @write_start_solutions() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 15, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
int gcd_opt(int a, int b) {
  int result;
  __asm__ __volatile__("movl %1, %%eax;"
                       "movl %2, %%ebx;"
                       "CONTD: cmpl $0, %%ebx;"
                       "je DONE;"
                       "xorl %%edx, %%edx;"
                       "idivl %%ebx;"
                       "movl %%ebx, %%eax;"
                       "movl %%edx, %%ebx;"
                       "jmp CONTD;"
                       "DONE: movl %%eax, %0;"
                       : "=g"(result)
                       : "g"(a), "g"(b));
  return result;
}


x86 assembly (clang, -O0):
<gcd_opt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x8(%rbp),%eax
mov    %ecx,-0x10(%rbp)
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
mov    -0x14(%rbp),%ebx

x86 assembly (clang, -O2):
<gcd_opt>:
mov    %edi,-0x8(%rsp)
mov    %esi,-0xc(%rsp)
mov    -0x8(%rsp),%eax
mov    -0xc(%rsp),%ebx

LLVM IR (-O0):
define i32 @gcd_opt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = load i32, i32* %5
ret i32 %8
}

LLVM IR (-O2):
define i32 @gcd_opt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = load i32, i32* %3
ret i32 %5
}
unsigned int pampd_remote_node(void *pampd) {
  unsigned long fake_pampd = (unsigned long)pampd;
  return (fake_pampd >> ((0 + 1) + 1)) & ((1UL << (8)) - 1);
}


x86 assembly (clang, -O0):
<pampd_remote_node>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x2,%rax
and    $0xff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pampd_remote_node>:
shr    $0x2,%edi
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @pampd_remote_node(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = ptrtoint i8* %4 to i64
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = lshr i64 %6, 2
%8 = and i64 %7, 255
%9 = trunc i64 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @pampd_remote_node(i8* %0) {
%2 = ptrtoint i8* %0 to i64
%3 = trunc i64 %2 to i32
%4 = lshr i32 %3, 2
%5 = and i32 %4, 255
ret i32 %5
}
int IgorVersion(void) {}


x86 assembly (clang, -O0):
<IgorVersion>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IgorVersion>:
ret

LLVM IR (-O0):
define i32 @IgorVersion() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @IgorVersion() {
ret i32 undef
}
int (*__sx25_set_parse_error_function(int (*func)(char *)))(char *) {
  (void)func;
  return ((int (*)(char *))0);
}


x86 assembly (clang, -O0):
<__sx25_set_parse_error_function>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sx25_set_parse_error_function>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 (i8*)* @__sx25_set_parse_error_function(i32 (i8*)* %0) {
%2 = alloca i32 (i8*)*
store i32 (i8*)* %0, i32 (i8*)** %2
%3 = load i32 (i8*)*, i32 (i8*)** %2
ret i32 (i8*)* null
}

LLVM IR (-O2):
define noalias i32 (i8*)* @__sx25_set_parse_error_function(i32 (i8*)* nocapture readnone %0) {
ret i32 (i8*)* null
}
/* Variables and functions */
int /*<<< orphan*/ pr_crit(char *, int);
void ack_bad_irq(int irq) {
  extern unsigned long irq_err_count;
  irq_err_count++;
  pr_crit("unexpected IRQ trap at vector %02x\n", irq);
}


x86 assembly (clang, -O0):
<ack_bad_irq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    0x2eb8(%rip),%rax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%esi
lea    0xec3(%rip),%rdi
call   1030 <pr_crit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ack_bad_irq>:
mov    %edi,%esi
mov    0x2ecf(%rip),%rax
addq   $0x1,(%rax)
lea    0xedc(%rip),%rdi
jmp    1030 <pr_crit@plt>

LLVM IR (-O0):
@irq_err_count = external global i64
@.str = [36 x i8] c"unexpected IRQ trap at vector %02x\0A\00"
define void @ack_bad_irq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i64, i64* @irq_err_count
%4 = add i64 %3, 1
store i64 %4, i64* @irq_err_count
%5 = load i32, i32* %2
%6 = call i32 @pr_crit(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %5)
ret void
}

LLVM IR (-O2):
@irq_err_count = external global i64
@.str = [36 x i8] c"unexpected IRQ trap at vector %02x\0A\00"
define void @ack_bad_irq(i32 %0) {
%2 = load i64, i64* @irq_err_count
%3 = add i64 %2, 1
store i64 %3, i64* @irq_err_count
%4 = tail call i32 @pr_crit(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
void testClosureLLBrV(void (*closure)(long long, char), long long a1, char a2) {
  (*closure)(a1, a2);
}


x86 assembly (clang, -O0):
<testClosureLLBrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
movsbl -0x11(%rbp),%esi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureLLBrV>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %edx,%esi
jmp    *%rax

LLVM IR (-O0):
define void @testClosureLLBrV(void (i64, i8)* %0, i64 %1, i8 signext %2) {
%4 = alloca void (i64, i8)*
%5 = alloca i64
%6 = alloca i8
store void (i64, i8)* %0, void (i64, i8)** %4
store i64 %1, i64* %5
store i8 %2, i8* %6
%7 = load void (i64, i8)*, void (i64, i8)** %4
%8 = load i64, i64* %5
%9 = load i8, i8* %6
ret void
}

LLVM IR (-O2):
define void @testClosureLLBrV(void (i64, i8)* nocapture %0, i64 %1, i8 signext %2) {
tail call void %0(i64 %1, i8 signext %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ itemDebugDumpInv();
int /*<<< orphan*/ npcDumpState();
void input_cheat_debuginv(void) {
  itemDebugDumpInv();
  npcDumpState();
}


x86 assembly (clang, -O0):
<input_cheat_debuginv>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <itemDebugDumpInv@plt>
mov    $0x0,%al
call   1040 <npcDumpState@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<input_cheat_debuginv>:
push   %rax
xor    %eax,%eax
call   1030 <itemDebugDumpInv@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <npcDumpState@plt>

LLVM IR (-O0):
define void @input_cheat_debuginv() {
%1 = call i32 (...) @itemDebugDumpInv()
%2 = call i32 (...) @npcDumpState()
ret void
}

LLVM IR (-O2):
define void @input_cheat_debuginv() {
%1 = tail call i32 (...) @itemDebugDumpInv()
%2 = tail call i32 (...) @npcDumpState()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  unsigned int u = 1;
  unsigned char *p;
  unsigned char x, y;
  p = (unsigned char *)&u;
  x = *p;
  assert(x == 1);
  y = p[1];
  assert(y == 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x1,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
movzbl -0x11(%rbp),%eax
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rax
mov    0x1(%rax),%al
mov    %al,-0x12(%rbp)
movzbl -0x12(%rbp),%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i32 1, i32* %1
%5 = bitcast i32* %1 to i8*
store i8* %5, i8** %2
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
store i8 %7, i8* %3
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp eq i32 %9, 1
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 1
%15 = load i8, i8* %14
store i8 %15, i8* %4
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = icmp eq i32 %17, 0
%19 = zext i1 %18 to i32
%20 = call i32 @assert(i32 %19)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
%2 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *cmd) {
  fprintf(stderr,
          "Usage: %s [ -m max_procs ] [ -n iterations ] [ -d delay ] [ -s "
          "sort_column ] [ -t ] [ -h ]\n"
          "    -m num  Maximum number of processes to display.\n"
          "    -n num  Updates to show before exiting.\n"
          "    -d num  Seconds to wait between updates.\n"
          "    -s col  Column to sort by (cpu,vss,rss,thr).\n"
          "    -t      Show threads instead of processes.\n"
          "    -h      Display this help screen.\n",
          cmd);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [367 x i8] c"Usage: %s [ -m max_procs ] [ -n iterations ] [ -d delay ] [ -s sort_column ] [ -t ] [ -h ]\0A -m num Maximum number of processes to display.\0A -n num Updates to show before exiting.\0A -d num Seconds to wait between updates.\0A -s col Column to sort by (cpu,vss,rss,thr).\0A -t Show threads instead of processes.\0A -h Display this help screen.\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([367 x i8], [367 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [367 x i8] c"Usage: %s [ -m max_procs ] [ -n iterations ] [ -d delay ] [ -s sort_column ] [ -t ] [ -h ]\0A -m num Maximum number of processes to display.\0A -n num Updates to show before exiting.\0A -d num Seconds to wait between updates.\0A -s col Column to sort by (cpu,vss,rss,thr).\0A -t Show threads instead of processes.\0A -h Display this help screen.\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([367 x i8], [367 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
long const matoi(char const *);
long sper(const char *str, const long cur, const long max) {
  return (matoi(str) * max) / 100 + (str[0] == '+' || str[0] == '-' ? cur : 0);
}


x86 assembly (clang, -O0):
<sper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <matoi@plt>
imul   -0x18(%rbp),%rax
mov    $0x64,%ecx
cqto
idiv   %rcx
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2b,%eax
je     1160 <sper+0x50>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2d,%eax
jne    116d <sper+0x5d>
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    1178 <sper+0x68>
xor    %eax,%eax
mov    %rax,-0x28(%rbp)
jmp    1178 <sper+0x68>
mov    -0x20(%rbp),%rax
mov    -0x28(%rbp),%rcx
add    %rcx,%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sper>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r15
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <matoi@plt>
mov    %rax,%rcx
mov    (%rbx),%al
cmp    $0x2d,%al
je     1133 <sper+0x23>
cmp    $0x2b,%al
je     1133 <sper+0x23>
xor    %r14d,%r14d
imul   %r15,%rcx
movabs $0xa3d70a3d70a3d70b,%rdx
0a d7 a3
mov    %rcx,%rax
imul   %rdx
add    %rdx,%rcx
mov    %rcx,%rax
shr    $0x3f,%rax
sar    $0x6,%rcx
add    %rax,%rcx
add    %r14,%rcx
mov    %rcx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @sper(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = call i64 @matoi(i8* %7)
%9 = load i64, i64* %6
%10 = mul nsw i64 %8, %9
%11 = sdiv i64 %10, 100
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i64 0
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 43
br i1 %16, label %23, label %17
17: ; preds = %3
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i64 0
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 45
br i1 %22, label %23, label %25
23: ; preds = %17, %3
%24 = load i64, i64* %5
br label %26
25: ; preds = %17
br label %26
26: ; preds = %25, %23
%27 = phi i64 [ %24, %23 ], [ 0, %25 ]
%28 = add nsw i64 %11, %27
ret i64 %28
}

LLVM IR (-O2):
define i64 @sper(i8* %0, i64 %1, i64 %2) {
%4 = tail call i64 @matoi(i8* %0)
%5 = load i8, i8* %0
switch i8 %5, label %7 [
i8 43, label %6
i8 45, label %6
]
6: ; preds = %3, %3
br label %7
7: ; preds = %3, %6
%8 = phi i64 [ %1, %6 ], [ 0, %3 ]
%9 = mul nsw i64 %4, %2
%10 = sdiv i64 %9, 100
%11 = add nsw i64 %8, %10
ret i64 %11
}
int test_imm_B3int8_reg(signed char val) {
  return ((val) & (-0xB3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B3int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffff4d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B3int8_reg>:
test   $0xffffff4d,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B3int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -179
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B3int8_reg(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = and i32 %2, -179
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isdigit(int);
void t_isdigit_0x81() {
  Assert_real((isdigit(129) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isdigit.c",
              650, ("isdigit should be 0 for 0x81"));
}


x86 assembly (clang, -O0):
<t_isdigit_0x81>:
push   %rbp
mov    %rsp,%rbp
mov    $0x81,%edi
call   1030 <isdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x28a,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isdigit_0x81>:
push   %rax
mov    $0x81,%edi
call   1030 <isdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x28a,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x81\00"
define void @t_isdigit_0x81() {
%1 = call i64 @isdigit(i32 129)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 650, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isdigit.c\00"
@.str.1 = [29 x i8] c"isdigit should be 0 for 0x81\00"
define void @t_isdigit_0x81() {
%1 = tail call i64 @isdigit(i32 129)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 650, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void usage(char *prog_name) {
  printf("Usage: %s <filename> <mode=acl>\n", prog_name);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"Usage: %s <filename> <mode=acl>\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"Usage: %s <filename> <mode=acl>\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mbedtls_sha256(unsigned char const *, size_t,
                                  unsigned char *, int);
void sha224_wrap(const unsigned char *input, size_t ilen,
                 unsigned char *output) {
  mbedtls_sha256(input, ilen, output, 1);
}


x86 assembly (clang, -O0):
<sha224_wrap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x1,%ecx
call   1030 <mbedtls_sha256@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha224_wrap>:
mov    $0x1,%ecx
jmp    1030 <mbedtls_sha256@plt>

LLVM IR (-O0):
define void @sha224_wrap(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i8*, i8** %6
%10 = call i32 @mbedtls_sha256(i8* %7, i64 %8, i8* %9, i32 1)
ret void
}

LLVM IR (-O2):
define void @sha224_wrap(i8* %0, i64 %1, i8* %2) {
%4 = tail call i32 @mbedtls_sha256(i8* %0, i64 %1, i8* %2, i32 1)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
void gpio_pur(uint32_t *port, uint8_t pins, uint8_t state) {
  if (state)
    port[0x510 / 4] |= pins;
  else
    port[0x510 / 4] &= ~((uint32_t)pins);
}


x86 assembly (clang, -O0):
<gpio_pur>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1136 <gpio_pur+0x36>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
or     0xa20(%rax),%rcx
mov    %rcx,0xa20(%rax)
jmp    1150 <gpio_pur+0x50>
mov    -0x10(%rbp),%rcx
xor    $0xffffffffffffffff,%rcx
mov    -0x8(%rbp),%rax
and    0xa20(%rax),%rcx
mov    %rcx,0xa20(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_pur>:
test   %rdx,%rdx
je     110d <gpio_pur+0xd>
or     %rsi,0xa20(%rdi)
ret
not    %rsi
and    %rsi,0xa20(%rdi)
ret

LLVM IR (-O0):
define void @gpio_pur(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %3
%10 = load i64, i64* %5
%11 = load i64*, i64** %4
%12 = getelementptr inbounds i64, i64* %11, i64 324
%13 = load i64, i64* %12
%14 = or i64 %13, %10
store i64 %14, i64* %12
br label %22
15: ; preds = %3
%16 = load i64, i64* %5
%17 = xor i64 %16, -1
%18 = load i64*, i64** %4
%19 = getelementptr inbounds i64, i64* %18, i64 324
%20 = load i64, i64* %19
%21 = and i64 %20, %17
store i64 %21, i64* %19
br label %22
22: ; preds = %15, %9
ret void
}

LLVM IR (-O2):
define void @gpio_pur(i64* nocapture %0, i64 %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = getelementptr inbounds i64, i64* %0, i64 324
%7 = load i64, i64* %6
%8 = or i64 %7, %1
store i64 %8, i64* %6
br label %14
9: ; preds = %3
%10 = xor i64 %1, -1
%11 = getelementptr inbounds i64, i64* %0, i64 324
%12 = load i64, i64* %11
%13 = and i64 %12, %10
store i64 %13, i64* %11
br label %14
14: ; preds = %9, %5
ret void
}
int os2_netxout(char *s, int n) { return (1); }


x86 assembly (clang, -O0):
<os2_netxout>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<os2_netxout>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @os2_netxout(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 1
}

LLVM IR (-O2):
define i32 @os2_netxout(i8* nocapture readnone %0, i32 %1) {
ret i32 1
}