xunge/DecIR huggingface dataset:
/* Variables and functions */
char tolower(char);
void strlwr(char *s) {
  int i;
  for (i = 0; s[i] != '\0'; s[i] = tolower(s[i]), i++)
    ;
}


x86 assembly (clang, -O0):
<strlwr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1169 <strlwr+0x59>
jmp    113d <strlwr+0x2d>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <tolower@plt>
mov    %al,%dl
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <strlwr+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlwr>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1136 <strlwr+0x26>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <tolower@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <strlwr+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @strlwr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %26
12: ; preds = %4
br label %13
13: ; preds = %12
%14 = load i8*, i8** %2
%15 = load i32, i32* %3
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = call signext i8 @tolower(i8 signext %18)
%20 = load i8*, i8** %2
%21 = load i32, i32* %3
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
store i8 %19, i8* %23
%24 = load i32, i32* %3
%25 = add nsw i32 %24, 1
store i32 %25, i32* %3
br label %4
26: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @strlwr(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %9, %4 ], [ 0, %1 ]
%6 = phi i8 [ %11, %4 ], [ %2, %1 ]
%7 = phi i8* [ %10, %4 ], [ %0, %1 ]
%8 = tail call signext i8 @tolower(i8 signext %6)
store i8 %8, i8* %7
%9 = add nuw i64 %5, 1
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %1
ret void
}
/* Variables and functions */
int yas_bma150_write_reg(unsigned char, unsigned char *, int);
int yas_bma150_write_reg_byte(unsigned char adr, unsigned char val) {
  return yas_bma150_write_reg(adr, &val, 1);
}


x86 assembly (clang, -O0):
<yas_bma150_write_reg_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
lea    -0x2(%rbp),%rsi
mov    $0x1,%edx
movzbl -0x1(%rbp),%edi
call   1030 <yas_bma150_write_reg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yas_bma150_write_reg_byte>:
push   %rax
mov    %sil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <yas_bma150_write_reg@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @yas_bma150_write_reg_byte(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = call i32 @yas_bma150_write_reg(i8 zeroext %5, i8* %4, i32 1)
ret i32 %6
}

LLVM IR (-O2):
define i32 @yas_bma150_write_reg_byte(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
store i8 %1, i8* %3
%4 = call i32 @yas_bma150_write_reg(i8 zeroext %0, i8* %3, i32 1)
ret i32 %4
}
unsigned char digitToHex(unsigned char digit) {
  if (digit < 0xA) {
    return (digit + '0');
  } else {
    return ((digit - 0xA) + 'A');
  }
}


x86 assembly (clang, -O0):
<digitToHex>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
cmp    $0xa,%eax
jge    1126 <digitToHex+0x26>
movzbl -0x2(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    1133 <digitToHex+0x33>
movzbl -0x2(%rbp),%eax
sub    $0xa,%eax
add    $0x41,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<digitToHex>:
cmp    $0xa,%dil
mov    $0x30,%ecx
mov    $0x37,%eax
cmovb  %ecx,%eax
add    %dil,%al
ret

LLVM IR (-O0):
define zeroext i8 @digitToHex(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = add nsw i32 %9, 48
%11 = trunc i32 %10 to i8
store i8 %11, i8* %2
br label %18
12: ; preds = %1
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = sub nsw i32 %14, 10
%16 = add nsw i32 %15, 65
%17 = trunc i32 %16 to i8
store i8 %17, i8* %2
br label %18
18: ; preds = %12, %7
%19 = load i8, i8* %2
ret i8 %19
}

LLVM IR (-O2):
define zeroext i8 @digitToHex(i8 zeroext %0) {
%2 = icmp ult i8 %0, 10
%3 = select i1 %2, i8 48, i8 55
%4 = add i8 %3, %0
ret i8 %4
}
/* Variables and functions */
int syscall(int, int /*<<< orphan*/, int /*<<< orphan*/);
int low_freq(void) { return syscall(295, 0, 0); }


x86 assembly (clang, -O0):
<low_freq>:
push   %rbp
mov    %rsp,%rbp
mov    $0x127,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<low_freq>:
mov    $0x127,%edi
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @low_freq() {
%1 = call i32 @syscall(i32 295, i32 0, i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @low_freq() {
%1 = tail call i32 @syscall(i32 295, i32 0, i32 0)
ret i32 %1
}
int main() {
  int a[3];
  int i;
  for (i = 0; i < 3; i++)
    a[i] = 0;
  return a[0];
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x3,-0x14(%rbp)
jge    1136 <main+0x36>
movslq -0x14(%rbp),%rax
movl   $0x0,-0x10(%rbp,%rax,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1112 <main+0x12>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [3 x i32]
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
br label %4
4: ; preds = %11, %0
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 3
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 %9
store i32 0, i32* %10
br label %11
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = getelementptr inbounds [3 x i32], [3 x i32]* %2, i64 0, i64 0
%16 = load i32, i32* %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
unsigned long strtoul(char const *, char **, int);
unsigned long wsh_strtoul(const char *nptr, char **endptr, int base) {
  return strtoul(nptr, endptr, base);
}


x86 assembly (clang, -O0):
<wsh_strtoul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strtoul@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wsh_strtoul>:
jmp    1030 <strtoul@plt>

LLVM IR (-O0):
define i64 @wsh_strtoul(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %5
%9 = load i32, i32* %6
%10 = call i64 @strtoul(i8* %7, i8** %8, i32 %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @wsh_strtoul(i8* %0, i8** nocapture %1, i32 %2) {
%4 = tail call i64 @strtoul(i8* %0, i8** %1, i32 %2)
ret i64 %4
}
void av_imdct_half() {}


x86 assembly (clang, -O0):
<av_imdct_half>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_imdct_half>:
ret

LLVM IR (-O0):
define void @av_imdct_half() {
ret void
}

LLVM IR (-O2):
define void @av_imdct_half() {
ret void
}
void acceleroInit() {}


x86 assembly (clang, -O0):
<acceleroInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acceleroInit>:
ret

LLVM IR (-O0):
define void @acceleroInit() {
ret void
}

LLVM IR (-O2):
define void @acceleroInit() {
ret void
}
/* Type definitions */
typedef size_t int32_t;

/* Variables and functions */
int32_t isneg(double *y, int32_t sz) {
  for (int32_t i = 0; i < sz; i++)
    if (y[i] < 0)
      return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isneg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    115b <isneg+0x5b>
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
xorps  %xmm0,%xmm0
ucomisd (%rax,%rcx,8),%xmm0
jbe    1145 <isneg+0x45>
movq   $0x1,-0x8(%rbp)
jmp    1163 <isneg+0x63>
jmp    114a <isneg+0x4a>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1114 <isneg+0x14>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isneg>:
test   %rsi,%rsi
je     113c <isneg+0x3c>
mov    $0x1,%eax
xorpd  %xmm0,%xmm0
ucomisd (%rdi),%xmm0
ja     113b <isneg+0x3b>
mov    $0x1,%eax
nopl   0x0(%rax)
mov    %rax,%rcx
cmp    %rax,%rsi
je     1133 <isneg+0x33>
lea    0x1(%rcx),%rax
ucomisd (%rdi,%rcx,8),%xmm0
jbe    1120 <isneg+0x20>
xor    %eax,%eax
cmp    %rsi,%rcx
setb   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @isneg(double* %0, i64 %1) {
%3 = alloca i64
%4 = alloca double*
%5 = alloca i64
%6 = alloca i64
store double* %0, double** %4
store i64 %1, i64* %5
store i64 0, i64* %6
br label %7
7: ; preds = %19, %2
%8 = load i64, i64* %6
%9 = load i64, i64* %5
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load double*, double** %4
%13 = load i64, i64* %6
%14 = getelementptr inbounds double, double* %12, i64 %13
%15 = load double, double* %14
%16 = fcmp olt double %15, 0.000000e+00
br i1 %16, label %17, label %18
17: ; preds = %11
store i64 1, i64* %3
br label %23
18: ; preds = %11
br label %19
19: ; preds = %18
%20 = load i64, i64* %6
%21 = add i64 %20, 1
store i64 %21, i64* %6
br label %7
22: ; preds = %7
store i64 0, i64* %3
br label %23
23: ; preds = %22, %17
%24 = load i64, i64* %3
ret i64 %24
}

LLVM IR (-O2):
define i64 @isneg(double* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %18, label %4
4: ; preds = %2
%5 = load double, double* %0
%6 = fcmp olt double %5, 0.000000e+00
br i1 %6, label %18, label %7
7: ; preds = %4, %10
%8 = phi i64 [ %14, %10 ], [ 1, %4 ]
%9 = icmp eq i64 %8, %1
br i1 %9, label %15, label %10
10: ; preds = %7
%11 = getelementptr inbounds double, double* %0, i64 %8
%12 = load double, double* %11
%13 = fcmp olt double %12, 0.000000e+00
%14 = add nuw i64 %8, 1
br i1 %13, label %15, label %7
15: ; preds = %7, %10
%16 = icmp ult i64 %8, %1
%17 = zext i1 %16 to i64
br label %18
18: ; preds = %15, %4, %2
%19 = phi i64 [ 0, %2 ], [ 1, %4 ], [ %17, %15 ]
ret i64 %19
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ chr4setBank0(int);
void m34setParams7FFE(uint16_t addr, uint8_t val) {
  (void)addr;
  chr4setBank0((val & 0xF) << 12);
}


x86 assembly (clang, -O0):
<m34setParams7FFE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
and    $0xf,%edi
shl    $0xc,%edi
call   1030 <chr4setBank0@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m34setParams7FFE>:
shl    $0xc,%esi
movzwl %si,%edi
jmp    1030 <chr4setBank0@plt>

LLVM IR (-O0):
define void @m34setParams7FFE(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %6, 15
%8 = shl i32 %7, 12
%9 = call i32 @chr4setBank0(i32 %8)
ret void
}

LLVM IR (-O2):
define void @m34setParams7FFE(i32 %0, i32 %1) {
%3 = shl i32 %1, 12
%4 = and i32 %3, 61440
%5 = tail call i32 @chr4setBank0(i32 %4)
ret void
}
void sys_time_init(void) {}


x86 assembly (clang, -O0):
<sys_time_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_time_init>:
ret

LLVM IR (-O0):
define void @sys_time_init() {
ret void
}

LLVM IR (-O2):
define void @sys_time_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void usage() {
  printf("Usage: huffpuff [--character-map=FILE]\n"
         "                [--table-output=FILE] [--data-output=FILE]\n"
         "                [--table-label=LABEL] [--node-label-prefix=PREFIX]\n"
         "                [--string-label-prefix=PREFIX]\n"
         "                [--generate-string-table] [--append-byte=VALUE]\n"
         "                [--ignore-case] [--verbose]\n"
         "                [--help] [--usage] [--version]\n"
         "                FILE\n");
  exit(0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [389 x i8] c"Usage: huffpuff [--character-map=FILE]\0A [--table-output=FILE] [--data-output=FILE]\0A [--table-label=LABEL] [--node-label-prefix=PREFIX]\0A [--string-label-prefix=PREFIX]\0A [--generate-string-table] [--append-byte=VALUE]\0A [--ignore-case] [--verbose]\0A [--help] [--usage] [--version]\0A FILE\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([389 x i8], [389 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [388 x i8] c"Usage: huffpuff [--character-map=FILE]\0A [--table-output=FILE] [--data-output=FILE]\0A [--table-label=LABEL] [--node-label-prefix=PREFIX]\0A [--string-label-prefix=PREFIX]\0A [--generate-string-table] [--append-byte=VALUE]\0A [--ignore-case] [--verbose]\0A [--help] [--usage] [--version]\0A FILE\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([388 x i8], [388 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
double cos(double);
double sin(double);
double f(double x) {
  double value = x * sin(x) + cos(x);
  return value;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sin@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <cos@plt>
movsd  -0x20(%rbp),%xmm2
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1030 <sin@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
call   1040 <cos@plt>
movsd  0x10(%rsp),%xmm1
mulsd  0x8(%rsp),%xmm1
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @f(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = call double @sin(double %5)
%7 = load double, double* %2
%8 = call double @cos(double %7)
%9 = call double @llvm.fmuladd.f64(double %4, double %6, double %8)
store double %9, double* %3
%10 = load double, double* %3
ret double %10
}

LLVM IR (-O2):
define double @f(double %0) {
%2 = tail call double @sin(double %0)
%3 = tail call double @cos(double %0)
%4 = tail call double @llvm.fmuladd.f64(double %0, double %2, double %3)
ret double %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
void gpio_pwm_increase_intensity(uint32_t const index) {}


x86 assembly (clang, -O0):
<gpio_pwm_increase_intensity>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_pwm_increase_intensity>:
ret

LLVM IR (-O0):
define void @gpio_pwm_increase_intensity(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @gpio_pwm_increase_intensity(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;
typedef scalar_t__ int16_t;

/* Variables and functions */
int /*<<< orphan*/ BigEndianWriteU16(int /*<<< orphan*/, int /*<<< orphan*/ *);
void BigEndianWriteS16(int16_t value, uint8_t *bytes) {
  BigEndianWriteU16((uint16_t)value, bytes);
}


x86 assembly (clang, -O0):
<BigEndianWriteS16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1030 <BigEndianWriteU16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BigEndianWriteS16>:
jmp    1030 <BigEndianWriteU16@plt>

LLVM IR (-O0):
define void @BigEndianWriteS16(i64 %0, i32* %1) {
%3 = alloca i64
%4 = alloca i32*
store i64 %0, i64* %3
store i32* %1, i32** %4
%5 = load i64, i64* %3
%6 = trunc i64 %5 to i32
%7 = load i32*, i32** %4
%8 = call i32 @BigEndianWriteU16(i32 %6, i32* %7)
ret void
}

LLVM IR (-O2):
define void @BigEndianWriteS16(i64 %0, i32* %1) {
%3 = trunc i64 %0 to i32
%4 = tail call i32 @BigEndianWriteU16(i32 %3, i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ blue_screen();
int /*<<< orphan*/ gdt_init();
int /*<<< orphan*/ idt_init();
int /*<<< orphan*/ keyboard_init();
int /*<<< orphan*/ vga_init();
int kmain() {
  gdt_init();
  idt_init();
  keyboard_init();
  vga_init();
  blue_screen();
  return 0;
}


x86 assembly (clang, -O0):
<kmain>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1070 <gdt_init@plt>
mov    $0x0,%al
call   1060 <idt_init@plt>
mov    $0x0,%al
call   1050 <keyboard_init@plt>
mov    $0x0,%al
call   1040 <vga_init@plt>
mov    $0x0,%al
call   1030 <blue_screen@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kmain>:
push   %rax
xor    %eax,%eax
call   1070 <gdt_init@plt>
xor    %eax,%eax
call   1060 <idt_init@plt>
xor    %eax,%eax
call   1050 <keyboard_init@plt>
xor    %eax,%eax
call   1040 <vga_init@plt>
xor    %eax,%eax
call   1030 <blue_screen@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @kmain() {
%1 = call i32 (...) @gdt_init()
%2 = call i32 (...) @idt_init()
%3 = call i32 (...) @keyboard_init()
%4 = call i32 (...) @vga_init()
%5 = call i32 (...) @blue_screen()
ret i32 0
}

LLVM IR (-O2):
define i32 @kmain() {
%1 = tail call i32 (...) @gdt_init()
%2 = tail call i32 (...) @idt_init()
%3 = tail call i32 (...) @keyboard_init()
%4 = tail call i32 (...) @vga_init()
%5 = tail call i32 (...) @blue_screen()
ret i32 0
}
void ble_evt_attclient_attribute_found(
    const struct ble_msg_attclient_attribute_found_evt_t *msg) {}


x86 assembly (clang, -O0):
<ble_evt_attclient_attribute_found>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_evt_attclient_attribute_found>:
ret

LLVM IR (-O0):
%struct.ble_msg_attclient_attribute_found_evt_t = type opaque
define void @ble_evt_attclient_attribute_found(%struct.ble_msg_attclient_attribute_found_evt_t* %0) {
%2 = alloca %struct.ble_msg_attclient_attribute_found_evt_t*
store %struct.ble_msg_attclient_attribute_found_evt_t* %0, %struct.ble_msg_attclient_attribute_found_evt_t** %2
ret void
}

LLVM IR (-O2):
%struct.ble_msg_attclient_attribute_found_evt_t = type opaque
define void @ble_evt_attclient_attribute_found(%struct.ble_msg_attclient_attribute_found_evt_t* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fclose(int /*<<< orphan*/ *);
int fancy_fclose(FILE *file) { return fclose(file); }


x86 assembly (clang, -O0):
<fancy_fclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fancy_fclose>:
jmp    1030 <fclose@plt>

LLVM IR (-O0):
define i32 @fancy_fclose(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fclose(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fancy_fclose(i32* nocapture %0) {
%2 = tail call i32 @fclose(i32* %0)
ret i32 %2
}
int isgraph(int c) { return ((c > ' ') && (c < 0x7f)); }


x86 assembly (clang, -O0):
<isgraph>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1120 <isgraph+0x20>
cmpl   $0x7f,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isgraph>:
add    $0xffffffdf,%edi
xor    %eax,%eax
cmp    $0x5e,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isgraph(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 32
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 127
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isgraph(i32 %0) {
%2 = add i32 %0, -33
%3 = icmp ult i32 %2, 94
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ get_serverbyte();
int /*<<< orphan*/ put_serverbyte(int);
void syncall() {
  put_serverbyte(0x11);
  put_serverbyte(0x13);
  (void)get_serverbyte();
}


x86 assembly (clang, -O0):
<syncall>:
push   %rbp
mov    %rsp,%rbp
mov    $0x11,%edi
call   1040 <put_serverbyte@plt>
mov    $0x13,%edi
call   1040 <put_serverbyte@plt>
mov    $0x0,%al
call   1030 <get_serverbyte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<syncall>:
push   %rax
mov    $0x11,%edi
call   1040 <put_serverbyte@plt>
mov    $0x13,%edi
call   1040 <put_serverbyte@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <get_serverbyte@plt>

LLVM IR (-O0):
define void @syncall() {
%1 = call i32 @put_serverbyte(i32 17)
%2 = call i32 @put_serverbyte(i32 19)
%3 = call i32 (...) @get_serverbyte()
ret void
}

LLVM IR (-O2):
define void @syncall() {
%1 = tail call i32 @put_serverbyte(i32 17)
%2 = tail call i32 @put_serverbyte(i32 19)
%3 = tail call i32 (...) @get_serverbyte()
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void UART_OutChar(char data) {
  while (((*((volatile uint32_t *)0x4000C018)) & 0x00000020) != 0)
    ;
  (*((volatile uint32_t *)0x4000C000)) = data;
}


x86 assembly (clang, -O0):
<UART_OutChar>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x4000c018,%eax
mov    (%rax),%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     1122 <UART_OutChar+0x22>
jmp    110a <UART_OutChar+0xa>
movsbl -0x1(%rbp),%ecx
mov    $0x4000c000,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART_OutChar>:
testl  $0x20,0x4000c018
jne    1100 <UART_OutChar>
movsbl %dil,%eax
mov    %eax,0x4000c000
ret

LLVM IR (-O0):
define void @UART_OutChar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %7, %1
%4 = load volatile i32, i32* inttoptr (i64 1073791000 to i32*)
%5 = and i32 %4, 32
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = load i8, i8* %2
%10 = sext i8 %9 to i32
store volatile i32 %10, i32* inttoptr (i64 1073790976 to i32*)
ret void
}

LLVM IR (-O2):
define void @UART_OutChar(i8 signext %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 1073791000 to i32*)
%4 = and i32 %3, 32
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %2
6: ; preds = %2
%7 = sext i8 %0 to i32
store volatile i32 %7, i32* inttoptr (i64 1073790976 to i32*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ MYSQL_ROW;
typedef int /*<<< orphan*/ MYSQL_RES;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
MYSQL_ROW mysql_fetch_row(MYSQL_RES *result) {
  printf("mysql_fetch_row(%s)\n", (result ? "MYSQL_RES" : "NULL"));
  return (0);
}


x86 assembly (clang, -O0):
<mysql_fetch_row>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
lea    0xef8(%rip),%rsi
lea    0xee7(%rip),%rax
cmp    $0x0,%rcx
cmovne %rax,%rsi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mysql_fetch_row>:
push   %rax
test   %rdi,%rdi
lea    0xf04(%rip),%rax
lea    0xef3(%rip),%rsi
cmove  %rax,%rsi
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"mysql_fetch_row(%s)\0A\00"
@.str.1 = [10 x i8] c"MYSQL_RES\00"
@.str.2 = [5 x i8] c"NULL\00"
define i32 @mysql_fetch_row(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
%5 = zext i1 %4 to i64
%6 = select i1 %4, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0)
%7 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [21 x i8] c"mysql_fetch_row(%s)\0A\00"
@.str.1 = [10 x i8] c"MYSQL_RES\00"
@.str.2 = [5 x i8] c"NULL\00"
define i32 @mysql_fetch_row(i32* readnone %0) {
%2 = icmp eq i32* %0, null
%3 = select i1 %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}
/* Variables and functions */
int solve_sudoku(int **, int /*<<< orphan*/, int /*<<< orphan*/);
bool can_solve(int board[][9]) { return solve_sudoku(board, 0, 0); }


x86 assembly (clang, -O0):
<can_solve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <solve_sudoku@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<can_solve>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <solve_sudoku@plt>

LLVM IR (-O0):
define i32 @can_solve([9 x i32]* %0) {
%2 = alloca [9 x i32]*
store [9 x i32]* %0, [9 x i32]** %2
%3 = load [9 x i32]*, [9 x i32]** %2
%4 = bitcast [9 x i32]* %3 to i32**
%5 = call i32 @solve_sudoku(i32** %4, i32 0, i32 0)
ret i32 %5
}

LLVM IR (-O2):
define i32 @can_solve([9 x i32]* %0) {
%2 = bitcast [9 x i32]* %0 to i32**
%3 = tail call i32 @solve_sudoku(i32** %2, i32 0, i32 0)
ret i32 %3
}
void handle_43(sig) int sig;
{}


x86 assembly (clang, -O0):
<handle_43>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_43>:
ret

LLVM IR (-O0):
define void @handle_43(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_43(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, ...);
int main() {
  long long x = 0x100000000LL;
  int i = 1;
  if (i && x) {
    printf("Success\n");
    exit(0);
  };
  {
    printf("Error %d\n", (int)1);
    exit(1);
  };
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movabs $0x100000000,%rax
mov    %rax,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     116e <main+0x4e>
cmpq   $0x0,-0x10(%rbp)
je     116e <main+0x4e>
lea    0xea0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>
lea    0xe94(%rip),%rdi
mov    $0x1,%esi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"Success\0A\00"
@.str.1 = [10 x i8] c"Error %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i32
store i32 0, i32* %1
store i64 4294967296, i64* %2
store i32 1, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %0
%7 = load i64, i64* %2
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @exit(i32 0)
unreachable
12: ; preds = %6, %0
%13 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0), i32 1)
%14 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [8 x i8] c"Success\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
unsigned xrop3_124_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  unsigned stk4;
  stk4 = ~S;
  stk3 = D | stk4;
  stk2 = T & stk3;
  stk1 = S ^ stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_124_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%eax
or     -0x20(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_124_1_1>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_124_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = load i8, i8* %3
%16 = zext i8 %15 to i32
%17 = or i32 %14, %16
store i32 %17, i32* %6
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = shl i32 %19, 8
%21 = load i8, i8* %4
%22 = zext i8 %21 to i32
%23 = or i32 %20, %22
store i32 %23, i32* %7
%24 = load i32, i32* %6
%25 = xor i32 %24, -1
store i32 %25, i32* %11
%26 = load i32, i32* %5
%27 = load i32, i32* %11
%28 = or i32 %26, %27
store i32 %28, i32* %10
%29 = load i32, i32* %7
%30 = load i32, i32* %10
%31 = and i32 %29, %30
store i32 %31, i32* %9
%32 = load i32, i32* %6
%33 = load i32, i32* %9
%34 = xor i32 %32, %33
store i32 %34, i32* %8
%35 = load i32, i32* %8
%36 = load i32, i32* %6
%37 = xor i32 %36, -1
%38 = and i32 %35, %37
%39 = load i32, i32* %7
%40 = xor i32 %39, -1
%41 = and i32 %38, %40
%42 = load i32, i32* %5
%43 = load i32, i32* %6
%44 = and i32 %42, %43
%45 = or i32 %41, %44
%46 = load i32, i32* %5
%47 = load i32, i32* %7
%48 = and i32 %46, %47
%49 = or i32 %45, %48
ret i32 %49
}

LLVM IR (-O2):
define i32 @xrop3_124_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = or i8 %1, %0
%4 = zext i8 %3 to i32
ret i32 %4
}
/* Variables and functions */
double pow(double, double);
double findPower(double a, double b) { return pow(a, b); }


x86 assembly (clang, -O0):
<findPower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<findPower>:
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @findPower(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @pow(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @findPower(double %0, double %1) {
%3 = tail call double @pow(double %0, double %1)
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ __mf_watch(int *, int);
scalar_t__ malloc(int);
int main() {
  int *bar = (int *)malloc(sizeof(int));
  *bar = 5;
  __mf_watch(bar, sizeof(int));
  *bar = 10;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movl   $0x5,(%rax)
mov    -0x10(%rbp),%rdi
mov    $0x4,%esi
call   1030 <__mf_watch@plt>
mov    -0x10(%rbp),%rax
movl   $0xa,(%rax)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
movl   $0x5,(%rax)
mov    %rax,%rdi
mov    $0x4,%esi
call   1030 <__mf_watch@plt>
movl   $0xa,(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i64 @malloc(i32 4)
%4 = inttoptr i64 %3 to i32*
store i32* %4, i32** %2
%5 = load i32*, i32** %2
store i32 5, i32* %5
%6 = load i32*, i32** %2
%7 = call i32 @__mf_watch(i32* %6, i32 4)
%8 = load i32*, i32** %2
store i32 10, i32* %8
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
store i32 5, i32* %2
%3 = tail call i32 @__mf_watch(i32* %2, i32 4)
store i32 10, i32* %2
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ bef_push(int);
int ins_nm2() {
  bef_push(2);
  return 1;
}


x86 assembly (clang, -O0):
<ins_nm2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <bef_push@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ins_nm2>:
push   %rax
mov    $0x2,%edi
call   1030 <bef_push@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ins_nm2() {
%1 = call i32 @bef_push(i32 2)
ret i32 1
}

LLVM IR (-O2):
define i32 @ins_nm2() {
%1 = tail call i32 @bef_push(i32 2)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ OAL_DELETE_SEMAPHORE();
int fc8300_i2c_deinit(void *handle) {
  OAL_DELETE_SEMAPHORE();
  return 0;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <OAL_DELETE_SEMAPHORE@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
xor    %eax,%eax
call   1030 <OAL_DELETE_SEMAPHORE@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fc8300_i2c_deinit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @OAL_DELETE_SEMAPHORE()
ret i32 0
}

LLVM IR (-O2):
define i32 @fc8300_i2c_deinit(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @OAL_DELETE_SEMAPHORE()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ hl_alloc_strbytes(char *);
int /*<<< orphan*/ hl_throw(int /*<<< orphan*/);
void fun_var_args() {
  hl_throw(
      hl_alloc_strbytes(u"Variable fun args was not cast to typed function"));
}


x86 assembly (clang, -O0):
<fun_var_args>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <hl_alloc_strbytes@plt>
mov    %eax,%edi
call   1030 <hl_throw@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_var_args>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <hl_alloc_strbytes@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <hl_throw@plt>

LLVM IR (-O0):
@.str = [49 x i16] [i16 86, i16 97, i16 114, i16 105, i16 97, i16 98, i16 108, i16 101, i16 32, i16 102, i16 117, i16 110, i16 32, i16 97, i16 114, i16 103, i16 115, i16 32, i16 119, i16 97, i16 115, i16 32, i16 110, i16 111, i16 116, i16 32, i16 99, i16 97, i16 115, i16 116, i16 32, i16 116, i16 111, i16 32, i16 116, i16 121, i16 112, i16 101, i16 100, i16 32, i16 102, i16 117, i16 110, i16 99, i16 116, i16 105, i16 111, i16 110, i16 0]
define void @fun_var_args() {
%1 = call i32 @hl_alloc_strbytes(i8* bitcast ([49 x i16]* @.str to i8*))
%2 = call i32 @hl_throw(i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [49 x i16] [i16 86, i16 97, i16 114, i16 105, i16 97, i16 98, i16 108, i16 101, i16 32, i16 102, i16 117, i16 110, i16 32, i16 97, i16 114, i16 103, i16 115, i16 32, i16 119, i16 97, i16 115, i16 32, i16 110, i16 111, i16 116, i16 32, i16 99, i16 97, i16 115, i16 116, i16 32, i16 116, i16 111, i16 32, i16 116, i16 121, i16 112, i16 101, i16 100, i16 32, i16 102, i16 117, i16 110, i16 99, i16 116, i16 105, i16 111, i16 110, i16 0]
define void @fun_var_args() {
%1 = tail call i32 @hl_alloc_strbytes(i8* bitcast ([49 x i16]* @.str to i8*))
%2 = tail call i32 @hl_throw(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nsc_assert(int);
void setrunqueue(void) {
  nsc_assert(0 && "This function is unimplemented.");
  ;
}


x86 assembly (clang, -O0):
<setrunqueue>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setrunqueue>:
xor    %edi,%edi
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
define void @setrunqueue() {
%1 = call i32 @nsc_assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @setrunqueue() {
%1 = tail call i32 @nsc_assert(i32 0)
ret void
}
/* Variables and functions */
int ll_list_length(char **list) {
  int i = 0;
  while (list[i] != NULL)
    i++;
  return i;
}


x86 assembly (clang, -O0):
<ll_list_length>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1130 <ll_list_length+0x30>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <ll_list_length+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ll_list_length>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpq   $0x0,(%rdi)
lea    0x8(%rdi),%rdi
jne    1110 <ll_list_length+0x10>
ret

LLVM IR (-O0):
define i32 @ll_list_length(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @ll_list_length(i8** nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %7, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
%6 = icmp eq i8* %5, null
%7 = add nuw i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = trunc i64 %3 to i32
ret i32 %9
}
OP(fd, da) {
  illegal_1();
  op_da();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_da@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_da@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_da()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_da()
ret i32 undef
}
int isIupacLower(char c) {
  switch (c) {
  case 'a':
  case 'c':
  case 'g':
  case 't':
  case 'u':
  case 'r':
  case 'y':
  case 's':
  case 'w':
  case 'k':
  case 'm':
  case 'b':
  case 'd':
  case 'h':
  case 'v':
  case 'n':
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<isIupacLower>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xffffff9f,%eax
sub    $0x4,%eax
jb     1180 <isIupacLower+0x80>
jmp    1122 <isIupacLower+0x22>
mov    -0xc(%rbp),%eax
add    $0xffffff99,%eax
sub    $0x2,%eax
jb     1180 <isIupacLower+0x80>
jmp    1136 <isIupacLower+0x36>
mov    -0xc(%rbp),%eax
sub    $0x6b,%eax
je     1180 <isIupacLower+0x80>
jmp    1147 <isIupacLower+0x47>
mov    -0xc(%rbp),%eax
add    $0xffffff93,%eax
sub    $0x2,%eax
jb     1180 <isIupacLower+0x80>
jmp    115b <isIupacLower+0x5b>
mov    -0xc(%rbp),%eax
add    $0xffffff8e,%eax
sub    $0x6,%eax
jb     1180 <isIupacLower+0x80>
jmp    116f <isIupacLower+0x6f>
mov    -0xc(%rbp),%eax
sub    $0x79,%eax
jne    118c <isIupacLower+0x8c>
jmp    1180 <isIupacLower+0x80>
movl   $0x1,-0x4(%rbp)
jmp    1193 <isIupacLower+0x93>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isIupacLower>:
add    $0xffffff9f,%edi
xor    %eax,%eax
cmp    $0x18,%edi
ja     1117 <isIupacLower+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @isIupacLower(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %7 [
i32 97, label %6
i32 99, label %6
i32 103, label %6
i32 116, label %6
i32 117, label %6
i32 114, label %6
i32 121, label %6
i32 115, label %6
i32 119, label %6
i32 107, label %6
i32 109, label %6
i32 98, label %6
i32 100, label %6
i32 104, label %6
i32 118, label %6
i32 110, label %6
]
6: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
@switch.table.isIupacLower = [25 x i32] [i32 1, i32 1, i32 1, i32 1, i32 0, i32 0, i32 1, i32 1, i32 0, i32 0, i32 1, i32 0, i32 1, i32 1, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 0, i32 1]
define i32 @isIupacLower(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -97
%4 = icmp ult i32 %3, 25
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = sext i32 %3 to i64
%7 = getelementptr inbounds [25 x i32], [25 x i32]* @switch.table.isIupacLower, i64 0, i64 %6
%8 = load i32, i32* %7
br label %9
9: ; preds = %1, %5
%10 = phi i32 [ %8, %5 ], [ 0, %1 ]
ret i32 %10
}
void gtk_accel_group_lock() {}


x86 assembly (clang, -O0):
<gtk_accel_group_lock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_accel_group_lock>:
ret

LLVM IR (-O0):
define void @gtk_accel_group_lock() {
ret void
}

LLVM IR (-O2):
define void @gtk_accel_group_lock() {
ret void
}
/* Variables and functions */
int do_stream(char *);
int main(int argc, char **argv) {
  int ok = 1;
  for (int argi = 1; argi < argc; argi++) {
    ok = do_stream(argv[argi]);
  }
  return ok ? 0 : 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
movl   $0x1,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1162 <main+0x52>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <do_stream@plt>
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1134 <main+0x24>
mov    -0x14(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
cmp    $0x2,%edi
jl     1150 <main+0x40>
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %edi,%r15d
mov    $0x1,%ebx
nopw   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <do_stream@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <main+0x20>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 1, i32* %6
store i32 1, i32* %7
br label %8
8: ; preds = %19, %2
%9 = load i32, i32* %7
%10 = load i32, i32* %4
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i8**, i8*** %5
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8*, i8** %13, i64 %15
%17 = load i8*, i8** %16
%18 = call i32 @do_stream(i8* %17)
store i32 %18, i32* %6
br label %19
19: ; preds = %12
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
store i32 %21, i32* %7
br label %8
22: ; preds = %8
%23 = load i32, i32* %6
%24 = icmp ne i32 %23, 0
%25 = zext i1 %24 to i64
%26 = select i1 %24, i32 0, i32 1
ret i32 %26
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %11
6: ; preds = %11
%7 = icmp eq i32 %15, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %6, %2
%10 = phi i32 [ 0, %2 ], [ %8, %6 ]
ret i32 %10
11: ; preds = %4, %11
%12 = phi i64 [ 1, %4 ], [ %16, %11 ]
%13 = getelementptr inbounds i8*, i8** %1, i64 %12
%14 = load i8*, i8** %13
%15 = tail call i32 @do_stream(i8* %14)
%16 = add nuw nsw i64 %12, 1
%17 = icmp eq i64 %16, %5
br i1 %17, label %6, label %11
}
/* Type definitions */
struct smc_priv {
  int dummy;
};

/* Variables and functions */
int slot_type(struct smc_priv *, int);
int valid_slot(struct smc_priv *smc_p, int addr) {
  switch (slot_type(smc_p, addr)) {
  case 2:
  case 3:
  case 4:
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<valid_slot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <slot_type@plt>
add    $0xfffffffe,%eax
sub    $0x2,%eax
ja     1148 <valid_slot+0x38>
jmp    113c <valid_slot+0x2c>
movl   $0x1,-0x4(%rbp)
jmp    114f <valid_slot+0x3f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_slot>:
push   %rax
call   1030 <slot_type@plt>
add    $0xfffffffe,%eax
xor    %ecx,%ecx
cmp    $0x3,%eax
setb   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.smc_priv = type { i32 }
define i32 @valid_slot(%struct.smc_priv* %0, i32 %1) {
%3 = alloca i32
%4 = alloca %struct.smc_priv*
%5 = alloca i32
store %struct.smc_priv* %0, %struct.smc_priv** %4
store i32 %1, i32* %5
%6 = load %struct.smc_priv*, %struct.smc_priv** %4
%7 = load i32, i32* %5
%8 = call i32 @slot_type(%struct.smc_priv* %6, i32 %7)
switch i32 %8, label %10 [
i32 2, label %9
i32 3, label %9
i32 4, label %9
]
9: ; preds = %2, %2, %2
store i32 1, i32* %3
br label %11
10: ; preds = %2
store i32 0, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
%struct.smc_priv = type { i32 }
define i32 @valid_slot(%struct.smc_priv* %0, i32 %1) {
%3 = tail call i32 @slot_type(%struct.smc_priv* %0, i32 %1)
%4 = add i32 %3, -2
%5 = icmp ult i32 %4, 3
%6 = zext i1 %5 to i32
ret i32 %6
}