__attribute__((no)) int loop(int zero) {
  int t = zero, i, iter;
  for (iter = 0; iter < 4; ++iter) {
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
    t += 1;
    t *= 2;
    t -= 1;
    t &= 0xFFF00FFF;
    t ^= 0x14022;
    t %= 0xFFFFFF3;
    t += 6;
    t *= 10;
  }
  return t;
}


x86 assembly (clang, -O0):
<loop>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x4,-0x10(%rbp)
jge    1b97d <loop+0x1a87d>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xfff00fff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0x14022,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xffffff3,%ecx
cltd
idiv   %ecx
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x6,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1114 <loop+0x14>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i32 @loop(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
store i32 %6, i32* %3
store i32 0, i32* %5
br label %7
7: ; preds = %22011, %1
%8 = load i32, i32* %5
%9 = icmp slt i32 %8, 4
br i1 %9, label %10, label %22014
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = mul nsw i32 %13, 2
store i32 %14, i32* %3
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 1
store i32 %16, i32* %3
%17 = load i32, i32* %3
%18 = and i32 %17, -1044481
store i32 %18, i32* %3
%19 = load i32, i32* %3
%20 = xor i32 %19, 81954
store i32 %20, i32* %3
%21 = load i32, i32* %3
%22 = srem i32 %21, 268435443
store i32 %22, i32* %3
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 6
store i32 %24, i32* %3
%25 = load i32, i32* %3
%26 = mul nsw i32 %25, 10
store i32 %26, i32* %3
%27 = load i32, i32* %3
%28 = add nsw i32 %27, 1
store i32 %28, i32* %3
%29 = load i32, i32* %3
%30 = mul nsw i32 %29, 2
store i32 %30, i32* %3
%31 = load i32, i32* %3
%32 = sub nsw i32 %31, 1
store i32 %32, i32* %3
%33 = load i32, i32* %3
%34 = and i32 %33, -1044481
store i32 %34, i32* %3
%35 = load i32, i32* %3
%36 = xor i32 %35, 81954
store i32 %36, i32* %3
%37 = load i32, i32* %3
%38 = srem i32 %37, 268435443
store i32 %38, i32* %3
%39 = load i32, i32* %3
%40 = add nsw i32 %39, 6
store i32 %40, i32* %3
%41 = load i32, i32* %3
%42 = mul nsw i32 %41, 10
store i32 %42, i32* %3
%43 = load i32, i32* %3
%44 = add nsw i32 %43, 1
store i32 %44, i32* %3
%45 = load i32, i32* %3
%46 = mul nsw i32 %45, 2
store i32 %46, i32* %3
%47 = load i32, i32* %3
%48 = sub nsw i32 %47, 1
store i32 %48, i32* %3
%49 = load i32, i32* %3
%50 = and i32 %49, -1044481
store i32 %50, i32* %3
%51 = load i32, i32* %3
%52 = xor i32 %51, 81954
store i32 %52, i32* %3
%53 = load i32, i32* %3
%54 = srem i32 %53, 268435443
store i32 %54, i32* %3
%55 = load i32, i32* %3
%56 = add nsw i32 %55, 6
store i32 %56, i32* %3
%57 = load i32, i32* %3
%58 = mul nsw i32 %57, 10
store i32 %58, i32* %3
%59 = load i32, i32* %3
%60 = add nsw i32 %59, 1
store i32 %60, i32* %3
%61 = load i32, i32* %3
%62 = mul nsw i32 %61, 2
store i32 %62, i32* %3
%63 = load i32, i32* %3
%64 = sub nsw i32 %63, 1
store i32 %64, i32* %3
%65 = load i32, i32* %3
%66 = and i32 %65, -1044481
store i32 %66, i32* %3
%67 = load i32, i32* %3
%68 = xor i32 %67, 81954
store i32 %68, i32* %3
%69 = load i32, i32* %3
%70 = srem i32 %69, 268435443
store i32 %70, i32* %3
%71 = load i32, i32* %3
%72 = add nsw i32 %71, 6
store i32 %72, i32* %3
%73 = load i32, i32* %3
%74 = mul nsw i32 %73, 10
store i32 %74, i32* %3
%75 = load i32, i32* %3
%76 = add nsw i32 %75, 1
store i32 %76, i32* %3
%77 = load i32, i32* %3
%78 = mul nsw i32 %77, 2
store i32 %78, i32* %3
%79 = load i32, i32* %3
%80 = sub nsw i32 %79, 1
store i32 %80, i32* %3
%81 = load i32, i32* %3
%82 = and i32 %81, -1044481
store i32 %82, i32* %3
%83 = load i32, i32* %3
%84 = xor i32 %83, 81954
store i32 %84, i32* %3
%85 = load i32, i32* %3
%86 = srem i32 %85, 268435443
store i32 %86, i32* %3
%87 = load i32, i32* %3
%88 = add nsw i32 %87, 6
store i32 %88, i32* %3
%89 = load i32, i32* %3
%90 = mul nsw i32 %89, 10
store i32 %90, i32* %3
%91 = load i32, i32* %3
%92 = add nsw i32 %91, 1
store i32 %92, i32* %3
%93 = load i32, i32* %3
%94 = mul nsw i32 %93, 2
store i32 %94, i32* %3
%95 = load i32, i32* %3
%96 = sub nsw i32 %95, 1
store i32 %96, i32* %3
%97 = load i32, i32* %3
%98 = and i32 %97, -1044481
store i32 %98, i32* %3
%99 = load i32, i32* %3
%100 = xor i32 %99, 81954
store i32 %100, i32* %3
%101 = load i32, i32* %3
%102 = srem i32 %101, 268435443
store i32 %102, i32* %3
%103 = load i32, i32* %3
%104 = add nsw i32 %103, 6
store i32 %104, i32* %3
%105 = load i32, i32* %3
%106 = mul nsw i32 %105, 10
store i32 %106, i32* %3
%107 = load i32, i32* %3
%108 = add nsw i32 %107, 1
store i32 %108, i32* %3
%109 = load i32, i32* %3
%110 = mul nsw i32 %109, 2
store i32 %110, i32* %3
%111 = load i32, i32* %3
%112 = sub nsw i32 %111, 1
store i32 %112, i32* %3
%113 = load i32, i32* %3
%114 = and i32 %113, -1044481
store i32 %114, i32* %3
%115 = load i32, i32* %3
%116 = xor i32 %115, 81954
store i32 %116, i32* %3
%117 = load i32, i32* %3
%118 = srem i32 %117, 268435443
store i32 %118, i32* %3
%119 = load i32, i32* %3
%120 = add nsw i32 %119, 6
store i32 %120, i32* %3
%121 = load i32, i32* %3
%122 = mul nsw i32 %121, 10
store i32 %122, i32* %3
%123 = load i32, i32* %3
%124 = add nsw i32 %123, 1
store i32 %124, i32* %3
%125 = load i32, i32* %3
%126 = mul nsw i32 %125, 2
store i32 %126, i32* %3
%127 = load i32, i32* %3
%128 = sub nsw i32 %127, 1
store i32 %128, i32* %3
%129 = load i32, i32* %3
%130 = and i32 %129, -1044481
store i32 %130, i32* %3
%131 = load i32, i32* %3
%132 = xor i32 %131, 81954
store i32 %132, i32* %3
%133 = load i32, i32* %3
%134 = srem i32 %133, 268435443
store i32 %134, i32* %3
%135 = load i32, i32* %3
%136 = add nsw i32 %135, 6
store i32 %136, i32* %3
%137 = load i32, i32* %3
%138 = mul nsw i32 %137, 10
store i32 %138, i32* %3
%139 = load i32, i32* %3
%140 = add nsw i32 %139, 1
store i32 %140, i32* %3
%141 = load i32, i32* %3
%142 = mul nsw i32 %141, 2
store i32 %142, i32* %3
%143 = load i32, i32* %3
%144 = sub nsw i32 %143, 1
store i32 %144, i32* %3
%145 = load i32, i32* %3
%146 = and i32 %145, -1044481
store i32 %146, i32* %3
%147 = load i32, i32* %3
%148 = xor i32 %147, 81954
store i32 %148, i32* %3
%149 = load i32, i32* %3
%150 = srem i32 %149, 268435443
store i32 %150, i32* %3
%151 = load i32, i32* %3
%152 = add nsw i32 %151, 6
store i32 %152, i32* %3
%153 = load i32, i32* %3
%154 = mul nsw i32 %153, 10
store i32 %154, i32* %3
%155 = load i32, i32* %3
%156 = add nsw i32 %155, 1
store i32 %156, i32* %3
%157 = load i32, i32* %3
%158 = mul nsw i32 %157, 2
store i32 %158, i32* %3
%159 = load i32, i32* %3
%160 = sub nsw i32 %159, 1
store i32 %160, i32* %3
%161 = load i32, i32* %3
%162 = and i32 %161, -1044481
store i32 %162, i32* %3
%163 = load i32, i32* %3
%164 = xor i32 %163, 81954
store i32 %164, i32* %3
%165 = load i32, i32* %3
%166 = srem i32 %165, 268435443
store i32 %166, i32* %3
%167 = load i32, i32* %3
%168 = add nsw i32 %167, 6
store i32 %168, i32* %3
%169 = load i32, i32* %3
%170 = mul nsw i32 %169, 10
store i32 %170, i32* %3
%171 = load i32, i32* %3
%172 = add nsw i32 %171, 1
store i32 %172, i32* %3
%173 = load i32, i32* %3
%174 = mul nsw i32 %173, 2
store i32 %174, i32* %3
%175 = load i32, i32* %3
%176 = sub nsw i32 %175, 1
store i32 %176, i32* %3
%177 = load i32, i32* %3
%178 = and i32 %177, -1044481
store i32 %178, i32* %3
%179 = load i32, i32* %3
%180 = xor i32 %179, 81954
store i32 %180, i32* %3
%181 = load i32, i32* %3
%182 = srem i32 %181, 268435443
store i32 %182, i32* %3
%183 = load i32, i32* %3
%184 = add nsw i32 %183, 6
store i32 %184, i32* %3
%185 = load i32, i32* %3
%186 = mul nsw i32 %185, 10
store i32 %186, i32* %3
%187 = load i32, i32* %3
%188 = add nsw i32 %187, 1
store i32 %188, i32* %3
%189 = load i32, i32* %3
%190 = mul nsw i32 %189, 2
store i32 %190, i32* %3
%191 = load i32, i32* %3
%192 = sub nsw i32 %191, 1
store i32 %192, i32* %3
%193 = load i32, i32* %3
%194 = and i32 %193, -1044481
store i32 %194, i32* %3
%195 = load i32, i32* %3
%196 = xor i32 %195, 81954
store i32 %196, i32* %3
%197 = load i32, i32* %3
%198 = srem i32 %197, 268435443
store i32 %198, i32* %3
%199 = load i32, i32* %3
%200 = add nsw i32 %199, 6
store i32 %200, i32* %3
%201 = load i32, i32* %3
%202 = mul nsw i32 %201, 10
store i32 %202, i32* %3
%203 = load i32, i32* %3
%204 = add nsw i32 %203, 1
store i32 %204, i32* %3
%205 = load i32, i32* %3
%206 = mul nsw i32 %205, 2
store i32 %206, i32* %3
%207 = load i32, i32* %3
%208 = sub nsw i32 %207, 1
store i32 %208, i32* %3
%209 = load i32, i32* %3
%210 = and i32 %209, -1044481
store i32 %210, i32* %3
%211 = load i32, i32* %3
%212 = xor i32 %211, 81954
store i32 %212, i32* %3
%213 = load i32, i32* %3
%214 = srem i32 %213, 268435443
store i32 %214, i32* %3
%215 = load i32, i32* %3
%216 = add nsw i32 %215, 6
store i32 %216, i32* %3
%217 = load i32, i32* %3
%218 = mul nsw i32 %217, 10
store i32 %218, i32* %3
%219 = load i32, i32* %3
%220 = add nsw i32 %219, 1
store i32 %220, i32* %3
%221 = load i32, i32* %3
%222 = mul nsw i32 %221, 2
store i32 %222, i32* %3
%223 = load i32, i32* %3
%224 = sub nsw i32 %223, 1
store i32 %224, i32* %3
%225 = load i32, i32* %3
%226 = and i32 %225, -1044481
store i32 %226, i32* %3
%227 = load i32, i32* %3
%228 = xor i32 %227, 81954
store i32 %228, i32* %3
%229 = load i32, i32* %3
%230 = srem i32 %229, 268435443
store i32 %230, i32* %3
%231 = load i32, i32* %3
%232 = add nsw i32 %231, 6
store i32 %232, i32* %3
%233 = load i32, i32* %3
%234 = mul nsw i32 %233, 10
store i32 %234, i32* %3
%235 = load i32, i32* %3
%236 = add nsw i32 %235, 1
store i32 %236, i32* %3
%237 = load i32, i32* %3
%238 = mul nsw i32 %237, 2
store i32 %238, i32* %3
%239 = load i32, i32* %3
%240 = sub nsw i32 %239, 1
store i32 %240, i32* %3
%241 = load i32, i32* %3
%242 = and i32 %241, -1044481
store i32 %242, i32* %3
%243 = load i32, i32* %3
%244 = xor i32 %243, 81954
store i32 %244, i32* %3
%245 = load i32, i32* %3
%246 = srem i32 %245, 268435443
store i32 %246, i32* %3
%247 = load i32, i32* %3
%248 = add nsw i32 %247, 6
store i32 %248, i32* %3
%249 = load i32, i32* %3
%250 = mul nsw i32 %249, 10
store i32 %250, i32* %3
%251 = load i32, i32* %3
%252 = add nsw i32 %251, 1
store i32 %252, i32* %3
%253 = load i32, i32* %3
%254 = mul nsw i32 %253, 2
store i32 %254, i32* %3
%255 = load i32, i32* %3
%256 = sub nsw i32 %255, 1
store i32 %256, i32* %3
%257 = load i32, i32* %3
%258 = and i32 %257, -1044481
store i32 %258, i32* %3
%259 = load i32, i32* %3
%260 = xor i32 %259, 81954
store i32 %260, i32* %3
%261 = load i32, i32* %3
%262 = srem i32 %261, 268435443
store i32 %262, i32* %3
%263 = load i32, i32* %3
%264 = add nsw i32 %263, 6
store i32 %264, i32* %3
%265 = load i32, i32* %3
%266 = mul nsw i32 %265, 10
store i32 %266, i32* %3
%267 = load i32, i32* %3
%268 = add nsw i32 %267, 1
store i32 %268, i32* %3
%269 = load i32, i32* %3
%270 = mul nsw i32 %269, 2
store i32 %270, i32* %3
%271 = load i32, i32* %3
%272 = sub nsw i32 %271, 1
store i32 %272, i32* %3
%273 = load i32, i32* %3
%274 = and i32 %273, -1044481
store i32 %274, i32* %3
%275 = load i32, i32* %3
%276 = xor i32 %275, 81954
store i32 %276, i32* %3
%277 = load i32, i32* %3
%278 = srem i32 %277, 268435443
store i32 %278, i32* %3
%279 = load i32, i32* %3
%280 = add nsw i32 %279, 6
store i32 %280, i32* %3
%281 = load i32, i32* %3
%282 = mul nsw i32 %281, 10
store i32 %282, i32* %3
%283 = load i32, i32* %3
%284 = add nsw i32 %283, 1
store i32 %284, i32* %3
%285 = load i32, i32* %3
%286 = mul nsw i32 %285, 2
store i32 %286, i32* %3
%287 = load i32, i32* %3
%288 = sub nsw i32 %287, 1
store i32 %288, i32* %3
%289 = load i32, i32* %3
%290 = and i32 %289, -1044481
store i32 %290, i32* %3
%291 = load i32, i32* %3
%292 = xor i32 %291, 81954
store i32 %292, i32* %3
%293 = load i32, i32* %3
%294 = srem i32 %293, 268435443
store i32 %294, i32* %3
%295 = load i32, i32* %3
%296 = add nsw i32 %295, 6
store i32 %296, i32* %3
%297 = load i32, i32* %3
%298 = mul nsw i32 %297, 10
store i32 %298, i32* %3
%299 = load i32, i32* %3
%300 = add nsw i32 %299, 1
store i32 %300, i32* %3
%301 = load i32, i32* %3
%302 = mul nsw i32 %301, 2
store i32 %302, i32* %3
%303 = load i32, i32* %3
%304 = sub nsw i32 %303, 1
store i32 %304, i32* %3
%305 = load i32, i32* %3
%306 = and i32 %305, -1044481
store i32 %306, i32* %3
%307 = load i32, i32* %3
%308 = xor i32 %307, 81954
store i32 %308, i32* %3
%309 = load i32, i32* %3
%310 = srem i32 %309, 268435443
store i32 %310, i32* %3
%311 = load i32, i32* %3
%312 = add nsw i32 %311, 6
store i32 %312, i32* %3
%313 = load i32, i32* %3
%314 = mul nsw i32 %313, 10
store i32 %314, i32* %3
%315 = load i32, i32* %3
%316 = add nsw i32 %315, 1
store i32 %316, i32* %3
%317 = load i32, i32* %3
%318 = mul nsw i32 %317, 2
store i32 %318, i32* %3
%319 = load i32, i32* %3
%320 = sub nsw i32 %319, 1
store i32 %320, i32* %3
%321 = load i32, i32* %3
%322 = and i32 %321, -1044481
store i32 %322, i32* %3
%323 = load i32, i32* %3
%324 = xor i32 %323, 81954
store i32 %324, i32* %3
%325 = load i32, i32* %3
%326 = srem i32 %325, 268435443
store i32 %326, i32* %3
%327 = load i32, i32* %3
%328 = add nsw i32 %327, 6
store i32 %328, i32* %3
%329 = load i32, i32* %3
%330 = mul nsw i32 %329, 10
store i32 %330, i32* %3
%331 = load i32, i32* %3
%332 = add nsw i32 %331, 1
store i32 %332, i32* %3
%333 = load i32, i32* %3
%334 = mul nsw i32 %333, 2
store i32 %334, i32* %3
%335 = load i32, i32* %3
%336 = sub nsw i32 %335, 1
store i32 %336, i32* %3
%337 = load i32, i32* %3
%338 = and i32 %337, -1044481
store i32 %338, i32* %3
%339 = load i32, i32* %3
%340 = xor i32 %339, 81954
store i32 %340, i32* %3
%341 = load i32, i32* %3
%342 = srem i32 %341, 268435443
store i32 %342, i32* %3
%343 = load i32, i32* %3
%344 = add nsw i32 %343, 6
store i32 %344, i32* %3
%345 = load i32, i32* %3
%346 = mul nsw i32 %345, 10
store i32 %346, i32* %3
%347 = load i32, i32* %3
%348 = add nsw i32 %347, 1
store i32 %348, i32* %3
%349 = load i32, i32* %3
%350 = mul nsw i32 %349, 2
store i32 %350, i32* %3
%351 = load i32, i32* %3
%352 = sub nsw i32 %351, 1
store i32 %352, i32* %3
%353 = load i32, i32* %3
%354 = and i32 %353, -1044481
store i32 %354, i32* %3
%355 = load i32, i32* %3
%356 = xor i32 %355, 81954
store i32 %356, i32* %3
%357 = load i32, i32* %3
%358 = srem i32 %357, 268435443
store i32 %358, i32* %3
%359 = load i32, i32* %3
%360 = add nsw i32 %359, 6
store i32 %360, i32* %3
%361 = load i32, i32* %3
%362 = mul nsw i32 %361, 10
store i32 %362, i32* %3
%363 = load i32, i32* %3
%364 = add nsw i32 %363, 1
store i32 %364, i32* %3
%365 = load i32, i32* %3
%366 = mul nsw i32 %365, 2
store i32 %366, i32* %3
%367 = load i32, i32* %3
%368 = sub nsw i32 %367, 1
store i32 %368, i32* %3
%369 = load i32, i32* %3
%370 = and i32 %369, -1044481
store i32 %370, i32* %3
%371 = load i32, i32* %3
%372 = xor i32 %371, 81954
store i32 %372, i32* %3
%373 = load i32, i32* %3
%374 = srem i32 %373, 268435443
store i32 %374, i32* %3
%375 = load i32, i32* %3
%376 = add nsw i32 %375, 6
store i32 %376, i32* %3
%377 = load i32, i32* %3
%378 = mul nsw i32 %377, 10
store i32 %378, i32* %3
%379 = load i32, i32* %3
%380 = add nsw i32 %379, 1
store i32 %380, i32* %3
%381 = load i32, i32* %3
%382 = mul nsw i32 %381, 2
store i32 %382, i32* %3
%383 = load i32, i32* %3
%384 = sub nsw i32 %383, 1
store i32 %384, i32* %3
%385 = load i32, i32* %3
%386 = and i32 %385, -1044481
store i32 %386, i32* %3
%387 = load i32, i32* %3
%388 = xor i32 %387, 81954
store i32 %388, i32* %3
%389 = load i32, i32* %3
%390 = srem i32 %389, 268435443
store i32 %390, i32* %3
%391 = load i32, i32* %3
%392 = add nsw i32 %391, 6
store i32 %392, i32* %3
%393 = load i32, i32* %3
%394 = mul nsw i32 %393, 10
store i32 %394, i32* %3
%395 = load i32, i32* %3
%396 = add nsw i32 %395, 1
store i32 %396, i32* %3
%397 = load i32, i32* %3
%398 = mul nsw i32 %397, 2
store i32 %398, i32* %3
%399 = load i32, i32* %3
%400 = sub nsw i32 %399, 1
store i32 %400, i32* %3
%401 = load i32, i32* %3
%402 = and i32 %401, -1044481
store i32 %402, i32* %3
%403 = load i32, i32* %3
%404 = xor i32 %403, 81954
store i32 %404, i32* %3
%405 = load i32, i32* %3
%406 = srem i32 %405, 268435443
store i32 %406, i32* %3
%407 = load i32, i32* %3
%408 = add nsw i32 %407, 6
store i32 %408, i32* %3
%409 = load i32, i32* %3
%410 = mul nsw i32 %409, 10
store i32 %410, i32* %3
%411 = load i32, i32* %3
%412 = add nsw i32 %411, 1
store i32 %412, i32* %3
%413 = load i32, i32* %3
%414 = mul nsw i32 %413, 2
store i32 %414, i32* %3
%415 = load i32, i32* %3
%416 = sub nsw i32 %415, 1
store i32 %416, i32* %3
%417 = load i32, i32* %3
%418 = and i32 %417, -1044481
store i32 %418, i32* %3
%419 = load i32, i32* %3
%420 = xor i32 %419, 81954
store i32 %420, i32* %3
%421 = load i32, i32* %3
%422 = srem i32 %421, 268435443
store i32 %422, i32* %3
%423 = load i32, i32* %3
%424 = add nsw i32 %423, 6
store i32 %424, i32* %3
%425 = load i32, i32* %3
%426 = mul nsw i32 %425, 10
store i32 %426, i32* %3
%427 = load i32, i32* %3
%428 = add nsw i32 %427, 1
store i32 %428, i32* %3
%429 = load i32, i32* %3
%430 = mul nsw i32 %429, 2
store i32 %430, i32* %3
%431 = load i32, i32* %3
%432 = sub nsw i32 %431, 1
store i32 %432, i32* %3
%433 = load i32, i32* %3
%434 = and i32 %433, -1044481
store i32 %434, i32* %3
%435 = load i32, i32* %3
%436 = xor i32 %435, 81954
store i32 %436, i32* %3
%437 = load i32, i32* %3
%438 = srem i32 %437, 268435443
store i32 %438, i32* %3
%439 = load i32, i32* %3
%440 = add nsw i32 %439, 6
store i32 %440, i32* %3
%441 = load i32, i32* %3
%442 = mul nsw i32 %441, 10
store i32 %442, i32* %3
%443 = load i32, i32* %3
%444 = add nsw i32 %443, 1
store i32 %444, i32* %3
%445 = load i32, i32* %3
%446 = mul nsw i32 %445, 2
store i32 %446, i32* %3
%447 = load i32, i32* %3
%448 = sub nsw i32 %447, 1
store i32 %448, i32* %3
%449 = load i32, i32* %3
%450 = and i32 %449, -1044481
store i32 %450, i32* %3
%451 = load i32, i32* %3
%452 = xor i32 %451, 81954
store i32 %452, i32* %3
%453 = load i32, i32* %3
%454 = srem i32 %453, 268435443
store i32 %454, i32* %3
%455 = load i32, i32* %3
%456 = add nsw i32 %455, 6
store i32 %456, i32* %3
%457 = load i32, i32* %3
%458 = mul nsw i32 %457, 10
store i32 %458, i32* %3
%459 = load i32, i32* %3
%460 = add nsw i32 %459, 1
store i32 %460, i32* %3
%461 = load i32, i32* %3
%462 = mul nsw i32 %461, 2
store i32 %462, i32* %3
%463 = load i32, i32* %3
%464 = sub nsw i32 %463, 1
store i32 %464, i32* %3
%465 = load i32, i32* %3
%466 = and i32 %465, -1044481
store i32 %466, i32* %3
%467 = load i32, i32* %3
%468 = xor i32 %467, 81954
store i32 %468, i32* %3
%469 = load i32, i32* %3
%470 = srem i32 %469, 268435443
store i32 %470, i32* %3
%471 = load i32, i32* %3
%472 = add nsw i32 %471, 6
store i32 %472, i32* %3
%473 = load i32, i32* %3
%474 = mul nsw i32 %473, 10
store i32 %474, i32* %3
%475 = load i32, i32* %3
%476 = add nsw i32 %475, 1
store i32 %476, i32* %3
%477 = load i32, i32* %3
%478 = mul nsw i32 %477, 2
store i32 %478, i32* %3
%479 = load i32, i32* %3
%480 = sub nsw i32 %479, 1
store i32 %480, i32* %3
%481 = load i32, i32* %3
%482 = and i32 %481, -1044481
store i32 %482, i32* %3
%483 = load i32, i32* %3
%484 = xor i32 %483, 81954
store i32 %484, i32* %3
%485 = load i32, i32* %3
%486 = srem i32 %485, 268435443
store i32 %486, i32* %3
%487 = load i32, i32* %3
%488 = add nsw i32 %487, 6
store i32 %488, i32* %3
%489 = load i32, i32* %3
%490 = mul nsw i32 %489, 10
store i32 %490, i32* %3
%491 = load i32, i32* %3
%492 = add nsw i32 %491, 1
store i32 %492, i32* %3
%493 = load i32, i32* %3
%494 = mul nsw i32 %493, 2
store i32 %494, i32* %3
%495 = load i32, i32* %3
%496 = sub nsw i32 %495, 1
store i32 %496, i32* %3
%497 = load i32, i32* %3
%498 = and i32 %497, -1044481
store i32 %498, i32* %3
%499 = load i32, i32* %3
%500 = xor i32 %499, 81954
store i32 %500, i32* %3
%501 = load i32, i32* %3
%502 = srem i32 %501, 268435443
store i32 %502, i32* %3
%503 = load i32, i32* %3
%504 = add nsw i32 %503, 6
store i32 %504, i32* %3
%505 = load i32, i32* %3
%506 = mul nsw i32 %505, 10
store i32 %506, i32* %3
%507 = load i32, i32* %3
%508 = add nsw i32 %507, 1
store i32 %508, i32* %3
%509 = load i32, i32* %3
%510 = mul nsw i32 %509, 2
store i32 %510, i32* %3
%511 = load i32, i32* %3
%512 = sub nsw i32 %511, 1
store i32 %512, i32* %3
%513 = load i32, i32* %3
%514 = and i32 %513, -1044481
store i32 %514, i32* %3
%515 = load i32, i32* %3
%516 = xor i32 %515, 81954
store i32 %516, i32* %3
%517 = load i32, i32* %3
%518 = srem i32 %517, 268435443
store i32 %518, i32* %3
%519 = load i32, i32* %3
%520 = add nsw i32 %519, 6
store i32 %520, i32* %3
%521 = load i32, i32* %3
%522 = mul nsw i32 %521, 10
store i32 %522, i32* %3
%523 = load i32, i32* %3
%524 = add nsw i32 %523, 1
store i32 %524, i32* %3
%525 = load i32, i32* %3
%526 = mul nsw i32 %525, 2
store i32 %526, i32* %3
%527 = load i32, i32* %3
%528 = sub nsw i32 %527, 1
store i32 %528, i32* %3
%529 = load i32, i32* %3
%530 = and i32 %529, -1044481
store i32 %530, i32* %3
%531 = load i32, i32* %3
%532 = xor i32 %531, 81954
store i32 %532, i32* %3
%533 = load i32, i32* %3
%534 = srem i32 %533, 268435443
store i32 %534, i32* %3
%535 = load i32, i32* %3
%536 = add nsw i32 %535, 6
store i32 %536, i32* %3
%537 = load i32, i32* %3
%538 = mul nsw i32 %537, 10
store i32 %538, i32* %3
%539 = load i32, i32* %3
%540 = add nsw i32 %539, 1
store i32 %540, i32* %3
%541 = load i32, i32* %3
%542 = mul nsw i32 %541, 2
store i32 %542, i32* %3
%543 = load i32, i32* %3
%544 = sub nsw i32 %543, 1
store i32 %544, i32* %3
%545 = load i32, i32* %3
%546 = and i32 %545, -1044481
store i32 %546, i32* %3
%547 = load i32, i32* %3
%548 = xor i32 %547, 81954
store i32 %548, i32* %3
%549 = load i32, i32* %3
%550 = srem i32 %549, 268435443
store i32 %550, i32* %3
%551 = load i32, i32* %3
%552 = add nsw i32 %551, 6
store i32 %552, i32* %3
%553 = load i32, i32* %3
%554 = mul nsw i32 %553, 10
store i32 %554, i32* %3
%555 = load i32, i32* %3
%556 = add nsw i32 %555, 1
store i32 %556, i32* %3
%557 = load i32, i32* %3
%558 = mul nsw i32 %557, 2
store i32 %558, i32* %3
%559 = load i32, i32* %3
%560 = sub nsw i32 %559, 1
store i32 %560, i32* %3
%561 = load i32, i32* %3
%562 = and i32 %561, -1044481
store i32 %562, i32* %3
%563 = load i32, i32* %3
%564 = xor i32 %563, 81954
store i32 %564, i32* %3
%565 = load i32, i32* %3
%566 = srem i32 %565, 268435443
store i32 %566, i32* %3
%567 = load i32, i32* %3
%568 = add nsw i32 %567, 6
store i32 %568, i32* %3
%569 = load i32, i32* %3
%570 = mul nsw i32 %569, 10
store i32 %570, i32* %3
%571 = load i32, i32* %3
%572 = add nsw i32 %571, 1
store i32 %572, i32* %3
%573 = load i32, i32* %3
%574 = mul nsw i32 %573, 2
store i32 %574, i32* %3
%575 = load i32, i32* %3
%576 = sub nsw i32 %575, 1
store i32 %576, i32* %3
%577 = load i32, i32* %3
%578 = and i32 %577, -1044481
store i32 %578, i32* %3
%579 = load i32, i32* %3
%580 = xor i32 %579, 81954
store i32 %580, i32* %3
%581 = load i32, i32* %3
%582 = srem i32 %581, 268435443
store i32 %582, i32* %3
%583 = load i32, i32* %3
%584 = add nsw i32 %583, 6
store i32 %584, i32* %3
%585 = load i32, i32* %3
%586 = mul nsw i32 %585, 10
store i32 %586, i32* %3
%587 = load i32, i32* %3
%588 = add nsw i32 %587, 1
store i32 %588, i32* %3
%589 = load i32, i32* %3
%590 = mul nsw i32 %589, 2
store i32 %590, i32* %3
%591 = load i32, i32* %3
%592 = sub nsw i32 %591, 1
store i32 %592, i32* %3
%593 = load i32, i32* %3
%594 = and i32 %593, -1044481
store i32 %594, i32* %3
%595 = load i32, i32* %3
%596 = xor i32 %595, 81954
store i32 %596, i32* %3
%597 = load i32, i32* %3
%598 = srem i32 %597, 268435443
store i32 %598, i32* %3
%599 = load i32, i32* %3
%600 = add nsw i32 %599, 6
store i32 %600, i32* %3
%601 = load i32, i32* %3
%602 = mul nsw i32 %601, 10
store i32 %602, i32* %3
%603 = load i32, i32* %3
%604 = add nsw i32 %603, 1
store i32 %604, i32* %3
%605 = load i32, i32* %3
%606 = mul nsw i32 %605, 2
store i32 %606, i32* %3
%607 = load i32, i32* %3
%608 = sub nsw i32 %607, 1
store i32 %608, i32* %3
%609 = load i32, i32* %3
%610 = and i32 %609, -1044481
store i32 %610, i32* %3
%611 = load i32, i32* %3
%612 = xor i32 %611, 81954
store i32 %612, i32* %3
%613 = load i32, i32* %3
%614 = srem i32 %613, 268435443
store i32 %614, i32* %3
%615 = load i32, i32* %3
%616 = add nsw i32 %615, 6
store i32 %616, i32* %3
%617 = load i32, i32* %3
%618 = mul nsw i32 %617, 10
store i32 %618, i32* %3
%619 = load i32, i32* %3
%620 = add nsw i32 %619, 1
store i32 %620, i32* %3
%621 = load i32, i32* %3
%622 = mul nsw i32 %621, 2
store i32 %622, i32* %3
%623 = load i32, i32* %3
%624 = sub nsw i32 %623, 1
store i32 %624, i32* %3
%625 = load i32, i32* %3
%626 = and i32 %625, -1044481
store i32 %626, i32* %3
%627 = load i32, i32* %3
%628 = xor i32 %627, 81954
store i32 %628, i32* %3
%629 = load i32, i32* %3
%630 = srem i32 %629, 268435443
store i32 %630, i32* %3
%631 = load i32, i32* %3
%632 = add nsw i32 %631, 6
store i32 %632, i32* %3
%633 = load i32, i32* %3
%634 = mul nsw i32 %633, 10
store i32 %634, i32* %3
%635 = load i32, i32* %3
%636 = add nsw i32 %635, 1
store i32 %636, i32* %3
%637 = load i32, i32* %3
%638 = mul nsw i32 %637, 2
store i32 %638, i32* %3
%639 = load i32, i32* %3
%640 = sub nsw i32 %639, 1
store i32 %640, i32* %3
%641 = load i32, i32* %3
%642 = and i32 %641, -1044481
store i32 %642, i32* %3
%643 = load i32, i32* %3
%644 = xor i32 %643, 81954
store i32 %644, i32* %3
%645 = load i32, i32* %3
%646 = srem i32 %645, 268435443
store i32 %646, i32* %3
%647 = load i32, i32* %3
%648 = add nsw i32 %647, 6
store i32 %648, i32* %3
%649 = load i32, i32* %3
%650 = mul nsw i32 %649, 10
store i32 %650, i32* %3
%651 = load i32, i32* %3
%652 = add nsw i32 %651, 1
store i32 %652, i32* %3
%653 = load i32, i32* %3
%654 = mul nsw i32 %653, 2
store i32 %654, i32* %3
%655 = load i32, i32* %3
%656 = sub nsw i32 %655, 1
store i32 %656, i32* %3
%657 = load i32, i32* %3
%658 = and i32 %657, -1044481
store i32 %658, i32* %3
%659 = load i32, i32* %3
%660 = xor i32 %659, 81954
store i32 %660, i32* %3
%661 = load i32, i32* %3
%662 = srem i32 %661, 268435443
store i32 %662, i32* %3
%663 = load i32, i32* %3
%664 = add nsw i32 %663, 6
store i32 %664, i32* %3
%665 = load i32, i32* %3
%666 = mul nsw i32 %665, 10
store i32 %666, i32* %3
%667 = load i32, i32* %3
%668 = add nsw i32 %667, 1
store i32 %668, i32* %3
%669 = load i32, i32* %3
%670 = mul nsw i32 %669, 2
store i32 %670, i32* %3
%671 = load i32, i32* %3
%672 = sub nsw i32 %671, 1
store i32 %672, i32* %3
%673 = load i32, i32* %3
%674 = and i32 %673, -1044481
store i32 %674, i32* %3
%675 = load i32, i32* %3
%676 = xor i32 %675, 81954
store i32 %676, i32* %3
%677 = load i32, i32* %3
%678 = srem i32 %677, 268435443
store i32 %678, i32* %3
%679 = load i32, i32* %3
%680 = add nsw i32 %679, 6
store i32 %680, i32* %3
%681 = load i32, i32* %3
%682 = mul nsw i32 %681, 10
store i32 %682, i32* %3
%683 = load i32, i32* %3
%684 = add nsw i32 %683, 1
store i32 %684, i32* %3
%685 = load i32, i32* %3
%686 = mul nsw i32 %685, 2
store i32 %686, i32* %3
%687 = load i32, i32* %3
%688 = sub nsw i32 %687, 1
store i32 %688, i32* %3
%689 = load i32, i32* %3
%690 = and i32 %689, -1044481
store i32 %690, i32* %3
%691 = load i32, i32* %3
%692 = xor i32 %691, 81954
store i32 %692, i32* %3
%693 = load i32, i32* %3
%694 = srem i32 %693, 268435443
store i32 %694, i32* %3
%695 = load i32, i32* %3
%696 = add nsw i32 %695, 6
store i32 %696, i32* %3
%697 = load i32, i32* %3
%698 = mul nsw i32 %697, 10
store i32 %698, i32* %3
%699 = load i32, i32* %3
%700 = add nsw i32 %699, 1
store i32 %700, i32* %3
%701 = load i32, i32* %3
%702 = mul nsw i32 %701, 2
store i32 %702, i32* %3
%703 = load i32, i32* %3
%704 = sub nsw i32 %703, 1
store i32 %704, i32* %3
%705 = load i32, i32* %3
%706 = and i32 %705, -1044481
store i32 %706, i32* %3
%707 = load i32, i32* %3
%708 = xor i32 %707, 81954
store i32 %708, i32* %3
%709 = load i32, i32* %3
%710 = srem i32 %709, 268435443
store i32 %710, i32* %3
%711 = load i32, i32* %3
%712 = add nsw i32 %711, 6
store i32 %712, i32* %3
%713 = load i32, i32* %3
%714 = mul nsw i32 %713, 10
store i32 %714, i32* %3
%715 = load i32, i32* %3
%716 = add nsw i32 %715, 1
store i32 %716, i32* %3
%717 = load i32, i32* %3
%718 = mul nsw i32 %717, 2
store i32 %718, i32* %3
%719 = load i32, i32* %3
%720 = sub nsw i32 %719, 1
store i32 %720, i32* %3
%721 = load i32, i32* %3
%722 = and i32 %721, -1044481
store i32 %722, i32* %3
%723 = load i32, i32* %3
%724 = xor i32 %723, 81954
store i32 %724, i32* %3
%725 = load i32, i32* %3
%726 = srem i32 %725, 268435443
store i32 %726, i32* %3
%727 = load i32, i32* %3
%728 = add nsw i32 %727, 6
store i32 %728, i32* %3
%729 = load i32, i32* %3
%730 = mul nsw i32 %729, 10
store i32 %730, i32* %3
%731 = load i32, i32* %3
%732 = add nsw i32 %731, 1
store i32 %732, i32* %3
%733 = load i32, i32* %3
%734 = mul nsw i32 %733, 2
store i32 %734, i32* %3
%735 = load i32, i32* %3
%736 = sub nsw i32 %735, 1
store i32 %736, i32* %3
%737 = load i32, i32* %3
%738 = and i32 %737, -1044481
store i32 %738, i32* %3
%739 = load i32, i32* %3
%740 = xor i32 %739, 81954
store i32 %740, i32* %3
%741 = load i32, i32* %3
%742 = srem i32 %741, 268435443
store i32 %742, i32* %3
%743 = load i32, i32* %3
%744 = add nsw i32 %743, 6
store i32 %744, i32* %3
%745 = load i32, i32* %3
%746 = mul nsw i32 %745, 10
store i32 %746, i32* %3
%747 = load i32, i32* %3
%748 = add nsw i32 %747, 1
store i32 %748, i32* %3
%749 = load i32, i32* %3
%750 = mul nsw i32 %749, 2
store i32 %750, i32* %3
%751 = load i32, i32* %3
%752 = sub nsw i32 %751, 1
store i32 %752, i32* %3
%753 = load i32, i32* %3
%754 = and i32 %753, -1044481
store i32 %754, i32* %3
%755 = load i32, i32* %3
%756 = xor i32 %755, 81954
store i32 %756, i32* %3
%757 = load i32, i32* %3
%758 = srem i32 %757, 268435443
store i32 %758, i32* %3
%759 = load i32, i32* %3
%760 = add nsw i32 %759, 6
store i32 %760, i32* %3
%761 = load i32, i32* %3
%762 = mul nsw i32 %761, 10
store i32 %762, i32* %3
%763 = load i32, i32* %3
%764 = add nsw i32 %763, 1
store i32 %764, i32* %3
%765 = load i32, i32* %3
%766 = mul nsw i32 %765, 2
store i32 %766, i32* %3
%767 = load i32, i32* %3
%768 = sub nsw i32 %767, 1
store i32 %768, i32* %3
%769 = load i32, i32* %3
%770 = and i32 %769, -1044481
store i32 %770, i32* %3
%771 = load i32, i32* %3
%772 = xor i32 %771, 81954
store i32 %772, i32* %3
%773 = load i32, i32* %3
%774 = srem i32 %773, 268435443
store i32 %774, i32* %3
%775 = load i32, i32* %3
%776 = add nsw i32 %775, 6
store i32 %776, i32* %3
%777 = load i32, i32* %3
%778 = mul nsw i32 %777, 10
store i32 %778, i32* %3
%779 = load i32, i32* %3
%780 = add nsw i32 %779, 1
store i32 %780, i32* %3
%781 = load i32, i32* %3
%782 = mul nsw i32 %781, 2
store i32 %782, i32* %3
%783 = load i32, i32* %3
%784 = sub nsw i32 %783, 1
store i32 %784, i32* %3
%785 = load i32, i32* %3
%786 = and i32 %785, -1044481
store i32 %786, i32* %3
%787 = load i32, i32* %3
%788 = xor i32 %787, 81954
store i32 %788, i32* %3
%789 = load i32, i32* %3
%790 = srem i32 %789, 268435443
store i32 %790, i32* %3
%791 = load i32, i32* %3
%792 = add nsw i32 %791, 6
store i32 %792, i32* %3
%793 = load i32, i32* %3
%794 = mul nsw i32 %793, 10
store i32 %794, i32* %3
%795 = load i32, i32* %3
%796 = add nsw i32 %795, 1
store i32 %796, i32* %3
%797 = load i32, i32* %3
%798 = mul nsw i32 %797, 2
store i32 %798, i32* %3
%799 = load i32, i32* %3
%800 = sub nsw i32 %799, 1
store i32 %800, i32* %3
%801 = load i32, i32* %3
%802 = and i32 %801, -1044481
store i32 %802, i32* %3
%803 = load i32, i32* %3
%804 = xor i32 %803, 81954
store i32 %804, i32* %3
%805 = load i32, i32* %3
%806 = srem i32 %805, 268435443
store i32 %806, i32* %3
%807 = load i32, i32* %3
%808 = add nsw i32 %807, 6
store i32 %808, i32* %3
%809 = load i32, i32* %3
%810 = mul nsw i32 %809, 10
store i32 %810, i32* %3
%811 = load i32, i32* %3
%812 = add nsw i32 %811, 1
store i32 %812, i32* %3
%813 = load i32, i32* %3
%814 = mul nsw i32 %813, 2
store i32 %814, i32* %3
%815 = load i32, i32* %3
%816 = sub nsw i32 %815, 1
store i32 %816, i32* %3
%817 = load i32, i32* %3
%818 = and i32 %817, -1044481
store i32 %818, i32* %3
%819 = load i32, i32* %3
%820 = xor i32 %819, 81954
store i32 %820, i32* %3
%821 = load i32, i32* %3
%822 = srem i32 %821, 268435443
store i32 %822, i32* %3
%823 = load i32, i32* %3
%824 = add nsw i32 %823, 6
store i32 %824, i32* %3
%825 = load i32, i32* %3
%826 = mul nsw i32 %825, 10
store i32 %826, i32* %3
%827 = load i32, i32* %3
%828 = add nsw i32 %827, 1
store i32 %828, i32* %3
%829 = load i32, i32* %3
%830 = mul nsw i32 %829, 2
store i32 %830, i32* %3
%831 = load i32, i32* %3
%832 = sub nsw i32 %831, 1
store i32 %832, i32* %3
%833 = load i32, i32* %3
%834 = and i32 %833, -1044481
store i32 %834, i32* %3
%835 = load i32, i32* %3
%836 = xor i32 %835, 81954
store i32 %836, i32* %3
%837 = load i32, i32* %3
%838 = srem i32 %837, 268435443
store i32 %838, i32* %3
%839 = load i32, i32* %3
%840 = add nsw i32 %839, 6
store i32 %840, i32* %3
%841 = load i32, i32* %3
%842 = mul nsw i32 %841, 10
store i32 %842, i32* %3
%843 = load i32, i32* %3
%844 = add nsw i32 %843, 1
store i32 %844, i32* %3
%845 = load i32, i32* %3
%846 = mul nsw i32 %845, 2
store i32 %846, i32* %3
%847 = load i32, i32* %3
%848 = sub nsw i32 %847, 1
store i32 %848, i32* %3
%849 = load i32, i32* %3
%850 = and i32 %849, -1044481
store i32 %850, i32* %3
%851 = load i32, i32* %3
%852 = xor i32 %851, 81954
store i32 %852, i32* %3
%853 = load i32, i32* %3
%854 = srem i32 %853, 268435443
store i32 %854, i32* %3
%855 = load i32, i32* %3
%856 = add nsw i32 %855, 6
store i32 %856, i32* %3
%857 = load i32, i32* %3
%858 = mul nsw i32 %857, 10
store i32 %858, i32* %3
%859 = load i32, i32* %3
%860 = add nsw i32 %859, 1
store i32 %860, i32* %3
%861 = load i32, i32* %3
%862 = mul nsw i32 %861, 2
store i32 %862, i32* %3
%863 = load i32, i32* %3
%864 = sub nsw i32 %863, 1
store i32 %864, i32* %3
%865 = load i32, i32* %3
%866 = and i32 %865, -1044481
store i32 %866, i32* %3
%867 = load i32, i32* %3
%868 = xor i32 %867, 81954
store i32 %868, i32* %3
%869 = load i32, i32* %3
%870 = srem i32 %869, 268435443
store i32 %870, i32* %3
%871 = load i32, i32* %3
%872 = add nsw i32 %871, 6
store i32 %872, i32* %3
%873 = load i32, i32* %3
%874 = mul nsw i32 %873, 10
store i32 %874, i32* %3
%875 = load i32, i32* %3
%876 = add nsw i32 %875, 1
store i32 %876, i32* %3
%877 = load i32, i32* %3
%878 = mul nsw i32 %877, 2
store i32 %878, i32* %3
%879 = load i32, i32* %3
%880 = sub nsw i32 %879, 1
store i32 %880, i32* %3
%881 = load i32, i32* %3
%882 = and i32 %881, -1044481
store i32 %882, i32* %3
%883 = load i32, i32* %3
%884 = xor i32 %883, 81954
store i32 %884, i32* %3
%885 = load i32, i32* %3
%886 = srem i32 %885, 268435443
store i32 %886, i32* %3
%887 = load i32, i32* %3
%888 = add nsw i32 %887, 6
store i32 %888, i32* %3
%889 = load i32, i32* %3
%890 = mul nsw i32 %889, 10
store i32 %890, i32* %3
%891 = load i32, i32* %3
%892 = add nsw i32 %891, 1
store i32 %892, i32* %3
%893 = load i32, i32* %3
%894 = mul nsw i32 %893, 2
store i32 %894, i32* %3
%895 = load i32, i32* %3
%896 = sub nsw i32 %895, 1
store i32 %896, i32* %3
%897 = load i32, i32* %3
%898 = and i32 %897, -1044481
store i32 %898, i32* %3
%899 = load i32, i32* %3
%900 = xor i32 %899, 81954
store i32 %900, i32* %3
%901 = load i32, i32* %3
%902 = srem i32 %901, 268435443
store i32 %902, i32* %3
%903 = load i32, i32* %3
%904 = add nsw i32 %903, 6
store i32 %904, i32* %3
%905 = load i32, i32* %3
%906 = mul nsw i32 %905, 10
store i32 %906, i32* %3
%907 = load i32, i32* %3
%908 = add nsw i32 %907, 1
store i32 %908, i32* %3
%909 = load i32, i32* %3
%910 = mul nsw i32 %909, 2
store i32 %910, i32* %3
%911 = load i32, i32* %3
%912 = sub nsw i32 %911, 1
store i32 %912, i32* %3
%913 = load i32, i32* %3
%914 = and i32 %913, -1044481
store i32 %914, i32* %3
%915 = load i32, i32* %3
%916 = xor i32 %915, 81954
store i32 %916, i32* %3
%917 = load i32, i32* %3
%918 = srem i32 %917, 268435443
store i32 %918, i32* %3
%919 = load i32, i32* %3
%920 = add nsw i32 %919, 6
store i32 %920, i32* %3
%921 = load i32, i32* %3
%922 = mul nsw i32 %921, 10
store i32 %922, i32* %3
%923 = load i32, i32* %3
%924 = add nsw i32 %923, 1
store i32 %924, i32* %3
%925 = load i32, i32* %3
%926 = mul nsw i32 %925, 2
store i32 %926, i32* %3
%927 = load i32, i32* %3
%928 = sub nsw i32 %927, 1
store i32 %928, i32* %3
%929 = load i32, i32* %3
%930 = and i32 %929, -1044481
store i32 %930, i32* %3
%931 = load i32, i32* %3
%932 = xor i32 %931, 81954
store i32 %932, i32* %3
%933 = load i32, i32* %3
%934 = srem i32 %933, 268435443
store i32 %934, i32* %3
%935 = load i32, i32* %3
%936 = add nsw i32 %935, 6
store i32 %936, i32* %3
%937 = load i32, i32* %3
%938 = mul nsw i32 %937, 10
store i32 %938, i32* %3
%939 = load i32, i32* %3
%940 = add nsw i32 %939, 1
store i32 %940, i32* %3
%941 = load i32, i32* %3
%942 = mul nsw i32 %941, 2
store i32 %942, i32* %3
%943 = load i32, i32* %3
%944 = sub nsw i32 %943, 1
store i32 %944, i32* %3
%945 = load i32, i32* %3
%946 = and i32 %945, -1044481
store i32 %946, i32* %3
%947 = load i32, i32* %3
%948 = xor i32 %947, 81954
store i32 %948, i32* %3
%949 = load i32, i32* %3
%950 = srem i32 %949, 268435443
store i32 %950, i32* %3
%951 = load i32, i32* %3
%952 = add nsw i32 %951, 6
store i32 %952, i32* %3
%953 = load i32, i32* %3
%954 = mul nsw i32 %953, 10
store i32 %954, i32* %3
%955 = load i32, i32* %3
%956 = add nsw i32 %955, 1
store i32 %956, i32* %3
%957 = load i32, i32* %3
%958 = mul nsw i32 %957, 2
store i32 %958, i32* %3
%959 = load i32, i32* %3
%960 = sub nsw i32 %959, 1
store i32 %960, i32* %3
%961 = load i32, i32* %3
%962 = and i32 %961, -1044481
store i32 %962, i32* %3
%963 = load i32, i32* %3
%964 = xor i32 %963, 81954
store i32 %964, i32* %3
%965 = load i32, i32* %3
%966 = srem i32 %965, 268435443
store i32 %966, i32* %3
%967 = load i32, i32* %3
%968 = add nsw i32 %967, 6
store i32 %968, i32* %3
%969 = load i32, i32* %3
%970 = mul nsw i32 %969, 10
store i32 %970, i32* %3
%971 = load i32, i32* %3
%972 = add nsw i32 %971, 1
store i32 %972, i32* %3
%973 = load i32, i32* %3
%974 = mul nsw i32 %973, 2
store i32 %974, i32* %3
%975 = load i32, i32* %3
%976 = sub nsw i32 %975, 1
store i32 %976, i32* %3
%977 = load i32, i32* %3
%978 = and i32 %977, -1044481
store i32 %978, i32* %3
%979 = load i32, i32* %3
%980 = xor i32 %979, 81954
store i32 %980, i32* %3
%981 = load i32, i32* %3
%982 = srem i32 %981, 268435443
store i32 %982, i32* %3
%983 = load i32, i32* %3
%984 = add nsw i32 %983, 6
store i32 %984, i32* %3
%985 = load i32, i32* %3
%986 = mul nsw i32 %985, 10
store i32 %986, i32* %3
%987 = load i32, i32* %3
%988 = add nsw i32 %987, 1
store i32 %988, i32* %3
%989 = load i32, i32* %3
%990 = mul nsw i32 %989, 2
store i32 %990, i32* %3
%991 = load i32, i32* %3
%992 = sub nsw i32 %991, 1
store i32 %992, i32* %3
%993 = load i32, i32* %3
%994 = and i32 %993, -1044481
store i32 %994, i32* %3
%995 = load i32, i32* %3
%996 = xor i32 %995, 81954
store i32 %996, i32* %3
%997 = load i32, i32* %3
%998 = srem i32 %997, 268435443
store i32 %998, i32* %3
%999 = load i32, i32* %3
%1000 = add nsw i32 %999, 6
store i32 %1000, i32* %3
%1001 = load i32, i32* %3
%1002 = mul nsw i32 %1001, 10
store i32 %1002, i32* %3
%1003 = load i32, i32* %3
%1004 = add nsw i32 %1003, 1
store i32 %1004, i32* %3
%1005 = load i32, i32* %3
%1006 = mul nsw i32 %1005, 2
store i32 %1006, i32* %3
%1007 = load i32, i32* %3
%1008 = sub nsw i32 %1007, 1
store i32 %1008, i32* %3
%1009 = load i32, i32* %3
%1010 = and i32 %1009, -1044481
store i32 %1010, i32* %3
%1011 = load i32, i32* %3
%1012 = xor i32 %1011, 81954
store i32 %1012, i32* %3
%1013 = load i32, i32* %3
%1014 = srem i32 %1013, 268435443
store i32 %1014, i32* %3
%1015 = load i32, i32* %3
%1016 = add nsw i32 %1015, 6
store i32 %1016, i32* %3
%1017 = load i32, i32* %3
%1018 = mul nsw i32 %1017, 10
store i32 %1018, i32* %3
%1019 = load i32, i32* %3
%1020 = add nsw i32 %1019, 1
store i32 %1020, i32* %3
%1021 = load i32, i32* %3
%1022 = mul nsw i32 %1021, 2
store i32 %1022, i32* %3
%1023 = load i32, i32* %3
%1024 = sub nsw i32 %1023, 1
store i32 %1024, i32* %3
%1025 = load i32, i32* %3
%1026 = and i32 %1025, -1044481
store i32 %1026, i32* %3
%1027 = load i32, i32* %3
%1028 = xor i32 %1027, 81954
store i32 %1028, i32* %3
%1029 = load i32, i32* %3
%1030 = srem i32 %1029, 268435443
store i32 %1030, i32* %3
%1031 = load i32, i32* %3
%1032 = add nsw i32 %1031, 6
store i32 %1032, i32* %3
%1033 = load i32, i32* %3
%1034 = mul nsw i32 %1033, 10
store i32 %1034, i32* %3
%1035 = load i32, i32* %3
%1036 = add nsw i32 %1035, 1
store i32 %1036, i32* %3
%1037 = load i32, i32* %3
%1038 = mul nsw i32 %1037, 2
store i32 %1038, i32* %3
%1039 = load i32, i32* %3
%1040 = sub nsw i32 %1039, 1
store i32 %1040, i32* %3
%1041 = load i32, i32* %3
%1042 = and i32 %1041, -1044481
store i32 %1042, i32* %3
%1043 = load i32, i32* %3
%1044 = xor i32 %1043, 81954
store i32 %1044, i32* %3
%1045 = load i32, i32* %3
%1046 = srem i32 %1045, 268435443
store i32 %1046, i32* %3
%1047 = load i32, i32* %3
%1048 = add nsw i32 %1047, 6
store i32 %1048, i32* %3
%1049 = load i32, i32* %3
%1050 = mul nsw i32 %1049, 10
store i32 %1050, i32* %3
%1051 = load i32, i32* %3
%1052 = add nsw i32 %1051, 1
store i32 %1052, i32* %3
%1053 = load i32, i32* %3
%1054 = mul nsw i32 %1053, 2
store i32 %1054, i32* %3
%1055 = load i32, i32* %3
%1056 = sub nsw i32 %1055, 1
store i32 %1056, i32* %3
%1057 = load i32, i32* %3
%1058 = and i32 %1057, -1044481
store i32 %1058, i32* %3
%1059 = load i32, i32* %3
%1060 = xor i32 %1059, 81954
store i32 %1060, i32* %3
%1061 = load i32, i32* %3
%1062 = srem i32 %1061, 268435443
store i32 %1062, i32* %3
%1063 = load i32, i32* %3
%1064 = add nsw i32 %1063, 6
store i32 %1064, i32* %3
%1065 = load i32, i32* %3
%1066 = mul nsw i32 %1065, 10
store i32 %1066, i32* %3
%1067 = load i32, i32* %3
%1068 = add nsw i32 %1067, 1
store i32 %1068, i32* %3
%1069 = load i32, i32* %3
%1070 = mul nsw i32 %1069, 2
store i32 %1070, i32* %3
%1071 = load i32, i32* %3
%1072 = sub nsw i32 %1071, 1
store i32 %1072, i32* %3
%1073 = load i32, i32* %3
%1074 = and i32 %1073, -1044481
store i32 %1074, i32* %3
%1075 = load i32, i32* %3
%1076 = xor i32 %1075, 81954
store i32 %1076, i32* %3
%1077 = load i32, i32* %3
%1078 = srem i32 %1077, 268435443
store i32 %1078, i32* %3
%1079 = load i32, i32* %3
%1080 = add nsw i32 %1079, 6
store i32 %1080, i32* %3
%1081 = load i32, i32* %3
%1082 = mul nsw i32 %1081, 10
store i32 %1082, i32* %3
%1083 = load i32, i32* %3
%1084 = add nsw i32 %1083, 1
store i32 %1084, i32* %3
%1085 = load i32, i32* %3
%1086 = mul nsw i32 %1085, 2
store i32 %1086, i32* %3
%1087 = load i32, i32* %3
%1088 = sub nsw i32 %1087, 1
store i32 %1088, i32* %3
%1089 = load i32, i32* %3
%1090 = and i32 %1089, -1044481
store i32 %1090, i32* %3
%1091 = load i32, i32* %3
%1092 = xor i32 %1091, 81954
store i32 %1092, i32* %3
%1093 = load i32, i32* %3
%1094 = srem i32 %1093, 268435443
store i32 %1094, i32* %3
%1095 = load i32, i32* %3
%1096 = add nsw i32 %1095, 6
store i32 %1096, i32* %3
%1097 = load i32, i32* %3
%1098 = mul nsw i32 %1097, 10
store i32 %1098, i32* %3
%1099 = load i32, i32* %3
%1100 = add nsw i32 %1099, 1
store i32 %1100, i32* %3
%1101 = load i32, i32* %3
%1102 = mul nsw i32 %1101, 2
store i32 %1102, i32* %3
%1103 = load i32, i32* %3
%1104 = sub nsw i32 %1103, 1
store i32 %1104, i32* %3
%1105 = load i32, i32* %3
%1106 = and i32 %1105, -1044481
store i32 %1106, i32* %3
%1107 = load i32, i32* %3
%1108 = xor i32 %1107, 81954
store i32 %1108, i32* %3
%1109 = load i32, i32* %3
%1110 = srem i32 %1109, 268435443
store i32 %1110, i32* %3
%1111 = load i32, i32* %3
%1112 = add nsw i32 %1111, 6
store i32 %1112, i32* %3
%1113 = load i32, i32* %3
%1114 = mul nsw i32 %1113, 10
store i32 %1114, i32* %3
%1115 = load i32, i32* %3
%1116 = add nsw i32 %1115, 1
store i32 %1116, i32* %3
%1117 = load i32, i32* %3
%1118 = mul nsw i32 %1117, 2
store i32 %1118, i32* %3
%1119 = load i32, i32* %3
%1120 = sub nsw i32 %1119, 1
store i32 %1120, i32* %3
%1121 = load i32, i32* %3
%1122 = and i32 %1121, -1044481
store i32 %1122, i32* %3
%1123 = load i32, i32* %3
%1124 = xor i32 %1123, 81954
store i32 %1124, i32* %3
%1125 = load i32, i32* %3
%1126 = srem i32 %1125, 268435443
store i32 %1126, i32* %3
%1127 = load i32, i32* %3
%1128 = add nsw i32 %1127, 6
store i32 %1128, i32* %3
%1129 = load i32, i32* %3
%1130 = mul nsw i32 %1129, 10
store i32 %1130, i32* %3
%1131 = load i32, i32* %3
%1132 = add nsw i32 %1131, 1
store i32 %1132, i32* %3
%1133 = load i32, i32* %3
%1134 = mul nsw i32 %1133, 2
store i32 %1134, i32* %3
%1135 = load i32, i32* %3
%1136 = sub nsw i32 %1135, 1
store i32 %1136, i32* %3
%1137 = load i32, i32* %3
%1138 = and i32 %1137, -1044481
store i32 %1138, i32* %3
%1139 = load i32, i32* %3
%1140 = xor i32 %1139, 81954
store i32 %1140, i32* %3
%1141 = load i32, i32* %3
%1142 = srem i32 %1141, 268435443
store i32 %1142, i32* %3
%1143 = load i32, i32* %3
%1144 = add nsw i32 %1143, 6
store i32 %1144, i32* %3
%1145 = load i32, i32* %3
%1146 = mul nsw i32 %1145, 10
store i32 %1146, i32* %3
%1147 = load i32, i32* %3
%1148 = add nsw i32 %1147, 1
store i32 %1148, i32* %3
%1149 = load i32, i32* %3
%1150 = mul nsw i32 %1149, 2
store i32 %1150, i32* %3
%1151 = load i32, i32* %3
%1152 = sub nsw i32 %1151, 1
store i32 %1152, i32* %3
%1153 = load i32, i32* %3
%1154 = and i32 %1153, -1044481
store i32 %1154, i32* %3
%1155 = load i32, i32* %3
%1156 = xor i32 %1155, 81954
store i32 %1156, i32* %3
%1157 = load i32, i32* %3
%1158 = srem i32 %1157, 268435443
store i32 %1158, i32* %3
%1159 = load i32, i32* %3
%1160 = add nsw i32 %1159, 6
store i32 %1160, i32* %3
%1161 = load i32, i32* %3
%1162 = mul nsw i32 %1161, 10
store i32 %1162, i32* %3
%1163 = load i32, i32* %3
%1164 = add nsw i32 %1163, 1
store i32 %1164, i32* %3
%1165 = load i32, i32* %3
%1166 = mul nsw i32 %1165, 2
store i32 %1166, i32* %3
%1167 = load i32, i32* %3
%1168 = sub nsw i32 %1167, 1
store i32 %1168, i32* %3
%1169 = load i32, i32* %3
%1170 = and i32 %1169, -1044481
store i32 %1170, i32* %3
%1171 = load i32, i32* %3
%1172 = xor i32 %1171, 81954
store i32 %1172, i32* %3
%1173 = load i32, i32* %3
%1174 = srem i32 %1173, 268435443
store i32 %1174, i32* %3
%1175 = load i32, i32* %3
%1176 = add nsw i32 %1175, 6
store i32 %1176, i32* %3
%1177 = load i32, i32* %3
%1178 = mul nsw i32 %1177, 10
store i32 %1178, i32* %3
%1179 = load i32, i32* %3
%1180 = add nsw i32 %1179, 1
store i32 %1180, i32* %3
%1181 = load i32, i32* %3
%1182 = mul nsw i32 %1181, 2
store i32 %1182, i32* %3
%1183 = load i32, i32* %3
%1184 = sub nsw i32 %1183, 1
store i32 %1184, i32* %3
%1185 = load i32, i32* %3
%1186 = and i32 %1185, -1044481
store i32 %1186, i32* %3
%1187 = load i32, i32* %3
%1188 = xor i32 %1187, 81954
store i32 %1188, i32* %3
%1189 = load i32, i32* %3
%1190 = srem i32 %1189, 268435443
store i32 %1190, i32* %3
%1191 = load i32, i32* %3
%1192 = add nsw i32 %1191, 6
store i32 %1192, i32* %3
%1193 = load i32, i32* %3
%1194 = mul nsw i32 %1193, 10
store i32 %1194, i32* %3
%1195 = load i32, i32* %3
%1196 = add nsw i32 %1195, 1
store i32 %1196, i32* %3
%1197 = load i32, i32* %3
%1198 = mul nsw i32 %1197, 2
store i32 %1198, i32* %3
%1199 = load i32, i32* %3
%1200 = sub nsw i32 %1199, 1
store i32 %1200, i32* %3
%1201 = load i32, i32* %3
%1202 = and i32 %1201, -1044481
store i32 %1202, i32* %3
%1203 = load i32, i32* %3
%1204 = xor i32 %1203, 81954
store i32 %1204, i32* %3
%1205 = load i32, i32* %3
%1206 = srem i32 %1205, 268435443
store i32 %1206, i32* %3
%1207 = load i32, i32* %3
%1208 = add nsw i32 %1207, 6
store i32 %1208, i32* %3
%1209 = load i32, i32* %3
%1210 = mul nsw i32 %1209, 10
store i32 %1210, i32* %3
%1211 = load i32, i32* %3
%1212 = add nsw i32 %1211, 1
store i32 %1212, i32* %3
%1213 = load i32, i32* %3
%1214 = mul nsw i32 %1213, 2
store i32 %1214, i32* %3
%1215 = load i32, i32* %3
%1216 = sub nsw i32 %1215, 1
store i32 %1216, i32* %3
%1217 = load i32, i32* %3
%1218 = and i32 %1217, -1044481
store i32 %1218, i32* %3
%1219 = load i32, i32* %3
%1220 = xor i32 %1219, 81954
store i32 %1220, i32* %3
%1221 = load i32, i32* %3
%1222 = srem i32 %1221, 268435443
store i32 %1222, i32* %3
%1223 = load i32, i32* %3
%1224 = add nsw i32 %1223, 6
store i32 %1224, i32* %3
%1225 = load i32, i32* %3
%1226 = mul nsw i32 %1225, 10
store i32 %1226, i32* %3
%1227 = load i32, i32* %3
%1228 = add nsw i32 %1227, 1
store i32 %1228, i32* %3
%1229 = load i32, i32* %3
%1230 = mul nsw i32 %1229, 2
store i32 %1230, i32* %3
%1231 = load i32, i32* %3
%1232 = sub nsw i32 %1231, 1
store i32 %1232, i32* %3
%1233 = load i32, i32* %3
%1234 = and i32 %1233, -1044481
store i32 %1234, i32* %3
%1235 = load i32, i32* %3
%1236 = xor i32 %1235, 81954
store i32 %1236, i32* %3
%1237 = load i32, i32* %3
%1238 = srem i32 %1237, 268435443
store i32 %1238, i32* %3
%1239 = load i32, i32* %3
%1240 = add nsw i32 %1239, 6
store i32 %1240, i32* %3
%1241 = load i32, i32* %3
%1242 = mul nsw i32 %1241, 10
store i32 %1242, i32* %3
%1243 = load i32, i32* %3
%1244 = add nsw i32 %1243, 1
store i32 %1244, i32* %3
%1245 = load i32, i32* %3
%1246 = mul nsw i32 %1245, 2
store i32 %1246, i32* %3
%1247 = load i32, i32* %3
%1248 = sub nsw i32 %1247, 1
store i32 %1248, i32* %3
%1249 = load i32, i32* %3
%1250 = and i32 %1249, -1044481
store i32 %1250, i32* %3
%1251 = load i32, i32* %3
%1252 = xor i32 %1251, 81954
store i32 %1252, i32* %3
%1253 = load i32, i32* %3
%1254 = srem i32 %1253, 268435443
store i32 %1254, i32* %3
%1255 = load i32, i32* %3
%1256 = add nsw i32 %1255, 6
store i32 %1256, i32* %3
%1257 = load i32, i32* %3
%1258 = mul nsw i32 %1257, 10
store i32 %1258, i32* %3
%1259 = load i32, i32* %3
%1260 = add nsw i32 %1259, 1
store i32 %1260, i32* %3
%1261 = load i32, i32* %3
%1262 = mul nsw i32 %1261, 2
store i32 %1262, i32* %3
%1263 = load i32, i32* %3
%1264 = sub nsw i32 %1263, 1
store i32 %1264, i32* %3
%1265 = load i32, i32* %3
%1266 = and i32 %1265, -1044481
store i32 %1266, i32* %3
%1267 = load i32, i32* %3
%1268 = xor i32 %1267, 81954
store i32 %1268, i32* %3
%1269 = load i32, i32* %3
%1270 = srem i32 %1269, 268435443
store i32 %1270, i32* %3
%1271 = load i32, i32* %3
%1272 = add nsw i32 %1271, 6
store i32 %1272, i32* %3
%1273 = load i32, i32* %3
%1274 = mul nsw i32 %1273, 10
store i32 %1274, i32* %3
%1275 = load i32, i32* %3
%1276 = add nsw i32 %1275, 1
store i32 %1276, i32* %3
%1277 = load i32, i32* %3
%1278 = mul nsw i32 %1277, 2
store i32 %1278, i32* %3
%1279 = load i32, i32* %3
%1280 = sub nsw i32 %1279, 1
store i32 %1280, i32* %3
%1281 = load i32, i32* %3
%1282 = and i32 %1281, -1044481
store i32 %1282, i32* %3
%1283 = load i32, i32* %3
%1284 = xor i32 %1283, 81954
store i32 %1284, i32* %3
%1285 = load i32, i32* %3
%1286 = srem i32 %1285, 268435443
store i32 %1286, i32* %3
%1287 = load i32, i32* %3
%1288 = add nsw i32 %1287, 6
store i32 %1288, i32* %3
%1289 = load i32, i32* %3
%1290 = mul nsw i32 %1289, 10
store i32 %1290, i32* %3
%1291 = load i32, i32* %3
%1292 = add nsw i32 %1291, 1
store i32 %1292, i32* %3
%1293 = load i32, i32* %3
%1294 = mul nsw i32 %1293, 2
store i32 %1294, i32* %3
%1295 = load i32, i32* %3
%1296 = sub nsw i32 %1295, 1
store i32 %1296, i32* %3
%1297 = load i32, i32* %3
%1298 = and i32 %1297, -1044481
store i32 %1298, i32* %3
%1299 = load i32, i32* %3
%1300 = xor i32 %1299, 81954
store i32 %1300, i32* %3
%1301 = load i32, i32* %3
%1302 = srem i32 %1301, 268435443
store i32 %1302, i32* %3
%1303 = load i32, i32* %3
%1304 = add nsw i32 %1303, 6
store i32 %1304, i32* %3
%1305 = load i32, i32* %3
%1306 = mul nsw i32 %1305, 10
store i32 %1306, i32* %3
%1307 = load i32, i32* %3
%1308 = add nsw i32 %1307, 1
store i32 %1308, i32* %3
%1309 = load i32, i32* %3
%1310 = mul nsw i32 %1309, 2
store i32 %1310, i32* %3
%1311 = load i32, i32* %3
%1312 = sub nsw i32 %1311, 1
store i32 %1312, i32* %3
%1313 = load i32, i32* %3
%1314 = and i32 %1313, -1044481
store i32 %1314, i32* %3
%1315 = load i32, i32* %3
%1316 = xor i32 %1315, 81954
store i32 %1316, i32* %3
%1317 = load i32, i32* %3
%1318 = srem i32 %1317, 268435443
store i32 %1318, i32* %3
%1319 = load i32, i32* %3
%1320 = add nsw i32 %1319, 6
store i32 %1320, i32* %3
%1321 = load i32, i32* %3
%1322 = mul nsw i32 %1321, 10
store i32 %1322, i32* %3
%1323 = load i32, i32* %3
%1324 = add nsw i32 %1323, 1
store i32 %1324, i32* %3
%1325 = load i32, i32* %3
%1326 = mul nsw i32 %1325, 2
store i32 %1326, i32* %3
%1327 = load i32, i32* %3
%1328 = sub nsw i32 %1327, 1
store i32 %1328, i32* %3
%1329 = load i32, i32* %3
%1330 = and i32 %1329, -1044481
store i32 %1330, i32* %3
%1331 = load i32, i32* %3
%1332 = xor i32 %1331, 81954
store i32 %1332, i32* %3
%1333 = load i32, i32* %3
%1334 = srem i32 %1333, 268435443
store i32 %1334, i32* %3
%1335 = load i32, i32* %3
%1336 = add nsw i32 %1335, 6
store i32 %1336, i32* %3
%1337 = load i32, i32* %3
%1338 = mul nsw i32 %1337, 10
store i32 %1338, i32* %3
%1339 = load i32, i32* %3
%1340 = add nsw i32 %1339, 1
store i32 %1340, i32* %3
%1341 = load i32, i32* %3
%1342 = mul nsw i32 %1341, 2
store i32 %1342, i32* %3
%1343 = load i32, i32* %3
%1344 = sub nsw i32 %1343, 1
store i32 %1344, i32* %3
%1345 = load i32, i32* %3
%1346 = and i32 %1345, -1044481
store i32 %1346, i32* %3
%1347 = load i32, i32* %3
%1348 = xor i32 %1347, 81954
store i32 %1348, i32* %3
%1349 = load i32, i32* %3
%1350 = srem i32 %1349, 268435443
store i32 %1350, i32* %3
%1351 = load i32, i32* %3
%1352 = add nsw i32 %1351, 6
store i32 %1352, i32* %3
%1353 = load i32, i32* %3
%1354 = mul nsw i32 %1353, 10
store i32 %1354, i32* %3
%1355 = load i32, i32* %3
%1356 = add nsw i32 %1355, 1
store i32 %1356, i32* %3
%1357 = load i32, i32* %3
%1358 = mul nsw i32 %1357, 2
store i32 %1358, i32* %3
%1359 = load i32, i32* %3
%1360 = sub nsw i32 %1359, 1
store i32 %1360, i32* %3
%1361 = load i32, i32* %3
%1362 = and i32 %1361, -1044481
store i32 %1362, i32* %3
%1363 = load i32, i32* %3
%1364 = xor i32 %1363, 81954
store i32 %1364, i32* %3
%1365 = load i32, i32* %3
%1366 = srem i32 %1365, 268435443
store i32 %1366, i32* %3
%1367 = load i32, i32* %3
%1368 = add nsw i32 %1367, 6
store i32 %1368, i32* %3
%1369 = load i32, i32* %3
%1370 = mul nsw i32 %1369, 10
store i32 %1370, i32* %3
%1371 = load i32, i32* %3
%1372 = add nsw i32 %1371, 1
store i32 %1372, i32* %3
%1373 = load i32, i32* %3
%1374 = mul nsw i32 %1373, 2
store i32 %1374, i32* %3
%1375 = load i32, i32* %3
%1376 = sub nsw i32 %1375, 1
store i32 %1376, i32* %3
%1377 = load i32, i32* %3
%1378 = and i32 %1377, -1044481
store i32 %1378, i32* %3
%1379 = load i32, i32* %3
%1380 = xor i32 %1379, 81954
store i32 %1380, i32* %3
%1381 = load i32, i32* %3
%1382 = srem i32 %1381, 268435443
store i32 %1382, i32* %3
%1383 = load i32, i32* %3
%1384 = add nsw i32 %1383, 6
store i32 %1384, i32* %3
%1385 = load i32, i32* %3
%1386 = mul nsw i32 %1385, 10
store i32 %1386, i32* %3
%1387 = load i32, i32* %3
%1388 = add nsw i32 %1387, 1
store i32 %1388, i32* %3
%1389 = load i32, i32* %3
%1390 = mul nsw i32 %1389, 2
store i32 %1390, i32* %3
%1391 = load i32, i32* %3
%1392 = sub nsw i32 %1391, 1
store i32 %1392, i32* %3
%1393 = load i32, i32* %3
%1394 = and i32 %1393, -1044481
store i32 %1394, i32* %3
%1395 = load i32, i32* %3
%1396 = xor i32 %1395, 81954
store i32 %1396, i32* %3
%1397 = load i32, i32* %3
%1398 = srem i32 %1397, 268435443
store i32 %1398, i32* %3
%1399 = load i32, i32* %3
%1400 = add nsw i32 %1399, 6
store i32 %1400, i32* %3
%1401 = load i32, i32* %3
%1402 = mul nsw i32 %1401, 10
store i32 %1402, i32* %3
%1403 = load i32, i32* %3
%1404 = add nsw i32 %1403, 1
store i32 %1404, i32* %3
%1405 = load i32, i32* %3
%1406 = mul nsw i32 %1405, 2
store i32 %1406, i32* %3
%1407 = load i32, i32* %3
%1408 = sub nsw i32 %1407, 1
store i32 %1408, i32* %3
%1409 = load i32, i32* %3
%1410 = and i32 %1409, -1044481
store i32 %1410, i32* %3
%1411 = load i32, i32* %3
%1412 = xor i32 %1411, 81954
store i32 %1412, i32* %3
%1413 = load i32, i32* %3
%1414 = srem i32 %1413, 268435443
store i32 %1414, i32* %3
%1415 = load i32, i32* %3
%1416 = add nsw i32 %1415, 6
store i32 %1416, i32* %3
%1417 = load i32, i32* %3
%1418 = mul nsw i32 %1417, 10
store i32 %1418, i32* %3
%1419 = load i32, i32* %3
%1420 = add nsw i32 %1419, 1
store i32 %1420, i32* %3
%1421 = load i32, i32* %3
%1422 = mul nsw i32 %1421, 2
store i32 %1422, i32* %3
%1423 = load i32, i32* %3
%1424 = sub nsw i32 %1423, 1
store i32 %1424, i32* %3
%1425 = load i32, i32* %3
%1426 = and i32 %1425, -1044481
store i32 %1426, i32* %3
%1427 = load i32, i32* %3
%1428 = xor i32 %1427, 81954
store i32 %1428, i32* %3
%1429 = load i32, i32* %3
%1430 = srem i32 %1429, 268435443
store i32 %1430, i32* %3
%1431 = load i32, i32* %3
%1432 = add nsw i32 %1431, 6
store i32 %1432, i32* %3
%1433 = load i32, i32* %3
%1434 = mul nsw i32 %1433, 10
store i32 %1434, i32* %3
%1435 = load i32, i32* %3
%1436 = add nsw i32 %1435, 1
store i32 %1436, i32* %3
%1437 = load i32, i32* %3
%1438 = mul nsw i32 %1437, 2
store i32 %1438, i32* %3
%1439 = load i32, i32* %3
%1440 = sub nsw i32 %1439, 1
store i32 %1440, i32* %3
%1441 = load i32, i32* %3
%1442 = and i32 %1441, -1044481
store i32 %1442, i32* %3
%1443 = load i32, i32* %3
%1444 = xor i32 %1443, 81954
store i32 %1444, i32* %3
%1445 = load i32, i32* %3
%1446 = srem i32 %1445, 268435443
store i32 %1446, i32* %3
%1447 = load i32, i32* %3
%1448 = add nsw i32 %1447, 6
store i32 %1448, i32* %3
%1449 = load i32, i32* %3
%1450 = mul nsw i32 %1449, 10
store i32 %1450, i32* %3
%1451 = load i32, i32* %3
%1452 = add nsw i32 %1451, 1
store i32 %1452, i32* %3
%1453 = load i32, i32* %3
%1454 = mul nsw i32 %1453, 2
store i32 %1454, i32* %3
%1455 = load i32, i32* %3
%1456 = sub nsw i32 %1455, 1
store i32 %1456, i32* %3
%1457 = load i32, i32* %3
%1458 = and i32 %1457, -1044481
store i32 %1458, i32* %3
%1459 = load i32, i32* %3
%1460 = xor i32 %1459, 81954
store i32 %1460, i32* %3
%1461 = load i32, i32* %3
%1462 = srem i32 %1461, 268435443
store i32 %1462, i32* %3
%1463 = load i32, i32* %3
%1464 = add nsw i32 %1463, 6
store i32 %1464, i32* %3
%1465 = load i32, i32* %3
%1466 = mul nsw i32 %1465, 10
store i32 %1466, i32* %3
%1467 = load i32, i32* %3
%1468 = add nsw i32 %1467, 1
store i32 %1468, i32* %3
%1469 = load i32, i32* %3
%1470 = mul nsw i32 %1469, 2
store i32 %1470, i32* %3
%1471 = load i32, i32* %3
%1472 = sub nsw i32 %1471, 1
store i32 %1472, i32* %3
%1473 = load i32, i32* %3
%1474 = and i32 %1473, -1044481
store i32 %1474, i32* %3
%1475 = load i32, i32* %3
%1476 = xor i32 %1475, 81954
store i32 %1476, i32* %3
%1477 = load i32, i32* %3
%1478 = srem i32 %1477, 268435443
store i32 %1478, i32* %3
%1479 = load i32, i32* %3
%1480 = add nsw i32 %1479, 6
store i32 %1480, i32* %3
%1481 = load i32, i32* %3
%1482 = mul nsw i32 %1481, 10
store i32 %1482, i32* %3
%1483 = load i32, i32* %3
%1484 = add nsw i32 %1483, 1
store i32 %1484, i32* %3
%1485 = load i32, i32* %3
%1486 = mul nsw i32 %1485, 2
store i32 %1486, i32* %3
%1487 = load i32, i32* %3
%1488 = sub nsw i32 %1487, 1
store i32 %1488, i32* %3
%1489 = load i32, i32* %3
%1490 = and i32 %1489, -1044481
store i32 %1490, i32* %3
%1491 = load i32, i32* %3
%1492 = xor i32 %1491, 81954
store i32 %1492, i32* %3
%1493 = load i32, i32* %3
%1494 = srem i32 %1493, 268435443
store i32 %1494, i32* %3
%1495 = load i32, i32* %3
%1496 = add nsw i32 %1495, 6
store i32 %1496, i32* %3
%1497 = load i32, i32* %3
%1498 = mul nsw i32 %1497, 10
store i32 %1498, i32* %3
%1499 = load i32, i32* %3
%1500 = add nsw i32 %1499, 1
store i32 %1500, i32* %3
%1501 = load i32, i32* %3
%1502 = mul nsw i32 %1501, 2
store i32 %1502, i32* %3
%1503 = load i32, i32* %3
%1504 = sub nsw i32 %1503, 1
store i32 %1504, i32* %3
%1505 = load i32, i32* %3
%1506 = and i32 %1505, -1044481
store i32 %1506, i32* %3
%1507 = load i32, i32* %3
%1508 = xor i32 %1507, 81954
store i32 %1508, i32* %3
%1509 = load i32, i32* %3
%1510 = srem i32 %1509, 268435443
store i32 %1510, i32* %3
%1511 = load i32, i32* %3
%1512 = add nsw i32 %1511, 6
store i32 %1512, i32* %3
%1513 = load i32, i32* %3
%1514 = mul nsw i32 %1513, 10
store i32 %1514, i32* %3
%1515 = load i32, i32* %3
%1516 = add nsw i32 %1515, 1
store i32 %1516, i32* %3
%1517 = load i32, i32* %3
%1518 = mul nsw i32 %1517, 2
store i32 %1518, i32* %3
%1519 = load i32, i32* %3
%1520 = sub nsw i32 %1519, 1
store i32 %1520, i32* %3
%1521 = load i32, i32* %3
%1522 = and i32 %1521, -1044481
store i32 %1522, i32* %3
%1523 = load i32, i32* %3
%1524 = xor i32 %1523, 81954
store i32 %1524, i32* %3
%1525 = load i32, i32* %3
%1526 = srem i32 %1525, 268435443
store i32 %1526, i32* %3
%1527 = load i32, i32* %3
%1528 = add nsw i32 %1527, 6
store i32 %1528, i32* %3
%1529 = load i32, i32* %3
%1530 = mul nsw i32 %1529, 10
store i32 %1530, i32* %3
%1531 = load i32, i32* %3
%1532 = add nsw i32 %1531, 1
store i32 %1532, i32* %3
%1533 = load i32, i32* %3
%1534 = mul nsw i32 %1533, 2
store i32 %1534, i32* %3
%1535 = load i32, i32* %3
%1536 = sub nsw i32 %1535, 1
store i32 %1536, i32* %3
%1537 = load i32, i32* %3
%1538 = and i32 %1537, -1044481
store i32 %1538, i32* %3
%1539 = load i32, i32* %3
%1540 = xor i32 %1539, 81954
store i32 %1540, i32* %3
%1541 = load i32, i32* %3
%1542 = srem i32 %1541, 268435443
store i32 %1542, i32* %3
%1543 = load i32, i32* %3
%1544 = add nsw i32 %1543, 6
store i32 %1544, i32* %3
%1545 = load i32, i32* %3
%1546 = mul nsw i32 %1545, 10
store i32 %1546, i32* %3
%1547 = load i32, i32* %3
%1548 = add nsw i32 %1547, 1
store i32 %1548, i32* %3
%1549 = load i32, i32* %3
%1550 = mul nsw i32 %1549, 2
store i32 %1550, i32* %3
%1551 = load i32, i32* %3
%1552 = sub nsw i32 %1551, 1
store i32 %1552, i32* %3
%1553 = load i32, i32* %3
%1554 = and i32 %1553, -1044481
store i32 %1554, i32* %3
%1555 = load i32, i32* %3
%1556 = xor i32 %1555, 81954
store i32 %1556, i32* %3
%1557 = load i32, i32* %3
%1558 = srem i32 %1557, 268435443
store i32 %1558, i32* %3
%1559 = load i32, i32* %3
%1560 = add nsw i32 %1559, 6
store i32 %1560, i32* %3
%1561 = load i32, i32* %3
%1562 = mul nsw i32 %1561, 10
store i32 %1562, i32* %3
%1563 = load i32, i32* %3
%1564 = add nsw i32 %1563, 1
store i32 %1564, i32* %3
%1565 = load i32, i32* %3
%1566 = mul nsw i32 %1565, 2
store i32 %1566, i32* %3
%1567 = load i32, i32* %3
%1568 = sub nsw i32 %1567, 1
store i32 %1568, i32* %3
%1569 = load i32, i32* %3
%1570 = and i32 %1569, -1044481
store i32 %1570, i32* %3
%1571 = load i32, i32* %3
%1572 = xor i32 %1571, 81954
store i32 %1572, i32* %3
%1573 = load i32, i32* %3
%1574 = srem i32 %1573, 268435443
store i32 %1574, i32* %3
%1575 = load i32, i32* %3
%1576 = add nsw i32 %1575, 6
store i32 %1576, i32* %3
%1577 = load i32, i32* %3
%1578 = mul nsw i32 %1577, 10
store i32 %1578, i32* %3
%1579 = load i32, i32* %3
%1580 = add nsw i32 %1579, 1
store i32 %1580, i32* %3
%1581 = load i32, i32* %3
%1582 = mul nsw i32 %1581, 2
store i32 %1582, i32* %3
%1583 = load i32, i32* %3
%1584 = sub nsw i32 %1583, 1
store i32 %1584, i32* %3
%1585 = load i32, i32* %3
%1586 = and i32 %1585, -1044481
store i32 %1586, i32* %3
%1587 = load i32, i32* %3
%1588 = xor i32 %1587, 81954
store i32 %1588, i32* %3
%1589 = load i32, i32* %3
%1590 = srem i32 %1589, 268435443
store i32 %1590, i32* %3
%1591 = load i32, i32* %3
%1592 = add nsw i32 %1591, 6
store i32 %1592, i32* %3
%1593 = load i32, i32* %3
%1594 = mul nsw i32 %1593, 10
store i32 %1594, i32* %3
%1595 = load i32, i32* %3
%1596 = add nsw i32 %1595, 1
store i32 %1596, i32* %3
%1597 = load i32, i32* %3
%1598 = mul nsw i32 %1597, 2
store i32 %1598, i32* %3
%1599 = load i32, i32* %3
%1600 = sub nsw i32 %1599, 1
store i32 %1600, i32* %3
%1601 = load i32, i32* %3
%1602 = and i32 %1601, -1044481
store i32 %1602, i32* %3
%1603 = load i32, i32* %3
%1604 = xor i32 %1603, 81954
store i32 %1604, i32* %3
%1605 = load i32, i32* %3
%1606 = srem i32 %1605, 268435443
store i32 %1606, i32* %3
%1607 = load i32, i32* %3
%1608 = add nsw i32 %1607, 6
store i32 %1608, i32* %3
%1609 = load i32, i32* %3
%1610 = mul nsw i32 %1609, 10
store i32 %1610, i32* %3
%1611 = load i32, i32* %3
%1612 = add nsw i32 %1611, 1
store i32 %1612, i32* %3
%1613 = load i32, i32* %3
%1614 = mul nsw i32 %1613, 2
store i32 %1614, i32* %3
%1615 = load i32, i32* %3
%1616 = sub nsw i32 %1615, 1
store i32 %1616, i32* %3
%1617 = load i32, i32* %3
%1618 = and i32 %1617, -1044481
store i32 %1618, i32* %3
%1619 = load i32, i32* %3
%1620 = xor i32 %1619, 81954
store i32 %1620, i32* %3
%1621 = load i32, i32* %3
%1622 = srem i32 %1621, 268435443
store i32 %1622, i32* %3
%1623 = load i32, i32* %3
%1624 = add nsw i32 %1623, 6
store i32 %1624, i32* %3
%1625 = load i32, i32* %3
%1626 = mul nsw i32 %1625, 10
store i32 %1626, i32* %3
%1627 = load i32, i32* %3
%1628 = add nsw i32 %1627, 1
store i32 %1628, i32* %3
%1629 = load i32, i32* %3
%1630 = mul nsw i32 %1629, 2
store i32 %1630, i32* %3
%1631 = load i32, i32* %3
%1632 = sub nsw i32 %1631, 1
store i32 %1632, i32* %3
%1633 = load i32, i32* %3
%1634 = and i32 %1633, -1044481
store i32 %1634, i32* %3
%1635 = load i32, i32* %3
%1636 = xor i32 %1635, 81954
store i32 %1636, i32* %3
%1637 = load i32, i32* %3
%1638 = srem i32 %1637, 268435443
store i32 %1638, i32* %3
%1639 = load i32, i32* %3
%1640 = add nsw i32 %1639, 6
store i32 %1640, i32* %3
%1641 = load i32, i32* %3
%1642 = mul nsw i32 %1641, 10
store i32 %1642, i32* %3
%1643 = load i32, i32* %3
%1644 = add nsw i32 %1643, 1
store i32 %1644, i32* %3
%1645 = load i32, i32* %3
%1646 = mul nsw i32 %1645, 2
store i32 %1646, i32* %3
%1647 = load i32, i32* %3
%1648 = sub nsw i32 %1647, 1
store i32 %1648, i32* %3
%1649 = load i32, i32* %3
%1650 = and i32 %1649, -1044481
store i32 %1650, i32* %3
%1651 = load i32, i32* %3
%1652 = xor i32 %1651, 81954
store i32 %1652, i32* %3
%1653 = load i32, i32* %3
%1654 = srem i32 %1653, 268435443
store i32 %1654, i32* %3
%1655 = load i32, i32* %3
%1656 = add nsw i32 %1655, 6
store i32 %1656, i32* %3
%1657 = load i32, i32* %3
%1658 = mul nsw i32 %1657, 10
store i32 %1658, i32* %3
%1659 = load i32, i32* %3
%1660 = add nsw i32 %1659, 1
store i32 %1660, i32* %3
%1661 = load i32, i32* %3
%1662 = mul nsw i32 %1661, 2
store i32 %1662, i32* %3
%1663 = load i32, i32* %3
%1664 = sub nsw i32 %1663, 1
store i32 %1664, i32* %3
%1665 = load i32, i32* %3
%1666 = and i32 %1665, -1044481
store i32 %1666, i32* %3
%1667 = load i32, i32* %3
%1668 = xor i32 %1667, 81954
store i32 %1668, i32* %3
%1669 = load i32, i32* %3
%1670 = srem i32 %1669, 268435443
store i32 %1670, i32* %3
%1671 = load i32, i32* %3
%1672 = add nsw i32 %1671, 6
store i32 %1672, i32* %3
%1673 = load i32, i32* %3
%1674 = mul nsw i32 %1673, 10
store i32 %1674, i32* %3
%1675 = load i32, i32* %3
%1676 = add nsw i32 %1675, 1
store i32 %1676, i32* %3
%1677 = load i32, i32* %3
%1678 = mul nsw i32 %1677, 2
store i32 %1678, i32* %3
%1679 = load i32, i32* %3
%1680 = sub nsw i32 %1679, 1
store i32 %1680, i32* %3
%1681 = load i32, i32* %3
%1682 = and i32 %1681, -1044481
store i32 %1682, i32* %3
%1683 = load i32, i32* %3
%1684 = xor i32 %1683, 81954
store i32 %1684, i32* %3
%1685 = load i32, i32* %3
%1686 = srem i32 %1685, 268435443
store i32 %1686, i32* %3
%1687 = load i32, i32* %3
%1688 = add nsw i32 %1687, 6
store i32 %1688, i32* %3
%1689 = load i32, i32* %3
%1690 = mul nsw i32 %1689, 10
store i32 %1690, i32* %3
%1691 = load i32, i32* %3
%1692 = add nsw i32 %1691, 1
store i32 %1692, i32* %3
%1693 = load i32, i32* %3
%1694 = mul nsw i32 %1693, 2
store i32 %1694, i32* %3
%1695 = load i32, i32* %3
%1696 = sub nsw i32 %1695, 1
store i32 %1696, i32* %3
%1697 = load i32, i32* %3
%1698 = and i32 %1697, -1044481
store i32 %1698, i32* %3
%1699 = load i32, i32* %3
%1700 = xor i32 %1699, 81954
store i32 %1700, i32* %3
%1701 = load i32, i32* %3
%1702 = srem i32 %1701, 268435443
store i32 %1702, i32* %3
%1703 = load i32, i32* %3
%1704 = add nsw i32 %1703, 6
store i32 %1704, i32* %3
%1705 = load i32, i32* %3
%1706 = mul nsw i32 %1705, 10
store i32 %1706, i32* %3
%1707 = load i32, i32* %3
%1708 = add nsw i32 %1707, 1
store i32 %1708, i32* %3
%1709 = load i32, i32* %3
%1710 = mul nsw i32 %1709, 2
store i32 %1710, i32* %3
%1711 = load i32, i32* %3
%1712 = sub nsw i32 %1711, 1
store i32 %1712, i32* %3
%1713 = load i32, i32* %3
%1714 = and i32 %1713, -1044481
store i32 %1714, i32* %3
%1715 = load i32, i32* %3
%1716 = xor i32 %1715, 81954
store i32 %1716, i32* %3
%1717 = load i32, i32* %3
%1718 = srem i32 %1717, 268435443
store i32 %1718, i32* %3
%1719 = load i32, i32* %3
%1720 = add nsw i32 %1719, 6
store i32 %1720, i32* %3
%1721 = load i32, i32* %3
%1722 = mul nsw i32 %1721, 10
store i32 %1722, i32* %3
%1723 = load i32, i32* %3
%1724 = add nsw i32 %1723, 1
store i32 %1724, i32* %3
%1725 = load i32, i32* %3
%1726 = mul nsw i32 %1725, 2
store i32 %1726, i32* %3
%1727 = load i32, i32* %3
%1728 = sub nsw i32 %1727, 1
store i32 %1728, i32* %3
%1729 = load i32, i32* %3
%1730 = and i32 %1729, -1044481
store i32 %1730, i32* %3
%1731 = load i32, i32* %3
%1732 = xor i32 %1731, 81954
store i32 %1732, i32* %3
%1733 = load i32, i32* %3
%1734 = srem i32 %1733, 268435443
store i32 %1734, i32* %3
%1735 = load i32, i32* %3
%1736 = add nsw i32 %1735, 6
store i32 %1736, i32* %3
%1737 = load i32, i32* %3
%1738 = mul nsw i32 %1737, 10
store i32 %1738, i32* %3
%1739 = load i32, i32* %3
%1740 = add nsw i32 %1739, 1
store i32 %1740, i32* %3
%1741 = load i32, i32* %3
%1742 = mul nsw i32 %1741, 2
store i32 %1742, i32* %3
%1743 = load i32, i32* %3
%1744 = sub nsw i32 %1743, 1
store i32 %1744, i32* %3
%1745 = load i32, i32* %3
%1746 = and i32 %1745, -1044481
store i32 %1746, i32* %3
%1747 = load i32, i32* %3
%1748 = xor i32 %1747, 81954
store i32 %1748, i32* %3
%1749 = load i32, i32* %3
%1750 = srem i32 %1749, 268435443
store i32 %1750, i32* %3
%1751 = load i32, i32* %3
%1752 = add nsw i32 %1751, 6
store i32 %1752, i32* %3
%1753 = load i32, i32* %3
%1754 = mul nsw i32 %1753, 10
store i32 %1754, i32* %3
%1755 = load i32, i32* %3
%1756 = add nsw i32 %1755, 1
store i32 %1756, i32* %3
%1757 = load i32, i32* %3
%1758 = mul nsw i32 %1757, 2
store i32 %1758, i32* %3
%1759 = load i32, i32* %3
%1760 = sub nsw i32 %1759, 1
store i32 %1760, i32* %3
%1761 = load i32, i32* %3
%1762 = and i32 %1761, -1044481
store i32 %1762, i32* %3
%1763 = load i32, i32* %3
%1764 = xor i32 %1763, 81954
store i32 %1764, i32* %3
%1765 = load i32, i32* %3
%1766 = srem i32 %1765, 268435443
store i32 %1766, i32* %3
%1767 = load i32, i32* %3
%1768 = add nsw i32 %1767, 6
store i32 %1768, i32* %3
%1769 = load i32, i32* %3
%1770 = mul nsw i32 %1769, 10
store i32 %1770, i32* %3
%1771 = load i32, i32* %3
%1772 = add nsw i32 %1771, 1
store i32 %1772, i32* %3
%1773 = load i32, i32* %3
%1774 = mul nsw i32 %1773, 2
store i32 %1774, i32* %3
%1775 = load i32, i32* %3
%1776 = sub nsw i32 %1775, 1
store i32 %1776, i32* %3
%1777 = load i32, i32* %3
%1778 = and i32 %1777, -1044481
store i32 %1778, i32* %3
%1779 = load i32, i32* %3
%1780 = xor i32 %1779, 81954
store i32 %1780, i32* %3
%1781 = load i32, i32* %3
%1782 = srem i32 %1781, 268435443
store i32 %1782, i32* %3
%1783 = load i32, i32* %3
%1784 = add nsw i32 %1783, 6
store i32 %1784, i32* %3
%1785 = load i32, i32* %3
%1786 = mul nsw i32 %1785, 10
store i32 %1786, i32* %3
%1787 = load i32, i32* %3
%1788 = add nsw i32 %1787, 1
store i32 %1788, i32* %3
%1789 = load i32, i32* %3
%1790 = mul nsw i32 %1789, 2
store i32 %1790, i32* %3
%1791 = load i32, i32* %3
%1792 = sub nsw i32 %1791, 1
store i32 %1792, i32* %3
%1793 = load i32, i32* %3
%1794 = and i32 %1793, -1044481
store i32 %1794, i32* %3
%1795 = load i32, i32* %3
%1796 = xor i32 %1795, 81954
store i32 %1796, i32* %3
%1797 = load i32, i32* %3
%1798 = srem i32 %1797, 268435443
store i32 %1798, i32* %3
%1799 = load i32, i32* %3
%1800 = add nsw i32 %1799, 6
store i32 %1800, i32* %3
%1801 = load i32, i32* %3
%1802 = mul nsw i32 %1801, 10
store i32 %1802, i32* %3
%1803 = load i32, i32* %3
%1804 = add nsw i32 %1803, 1
store i32 %1804, i32* %3
%1805 = load i32, i32* %3
%1806 = mul nsw i32 %1805, 2
store i32 %1806, i32* %3
%1807 = load i32, i32* %3
%1808 = sub nsw i32 %1807, 1
store i32 %1808, i32* %3
%1809 = load i32, i32* %3
%1810 = and i32 %1809, -1044481
store i32 %1810, i32* %3
%1811 = load i32, i32* %3
%1812 = xor i32 %1811, 81954
store i32 %1812, i32* %3
%1813 = load i32, i32* %3
%1814 = srem i32 %1813, 268435443
store i32 %1814, i32* %3
%1815 = load i32, i32* %3
%1816 = add nsw i32 %1815, 6
store i32 %1816, i32* %3
%1817 = load i32, i32* %3
%1818 = mul nsw i32 %1817, 10
store i32 %1818, i32* %3
%1819 = load i32, i32* %3
%1820 = add nsw i32 %1819, 1
store i32 %1820, i32* %3
%1821 = load i32, i32* %3
%1822 = mul nsw i32 %1821, 2
store i32 %1822, i32* %3
%1823 = load i32, i32* %3
%1824 = sub nsw i32 %1823, 1
store i32 %1824, i32* %3
%1825 = load i32, i32* %3
%1826 = and i32 %1825, -1044481
store i32 %1826, i32* %3
%1827 = load i32, i32* %3
%1828 = xor i32 %1827, 81954
store i32 %1828, i32* %3
%1829 = load i32, i32* %3
%1830 = srem i32 %1829, 268435443
store i32 %1830, i32* %3
%1831 = load i32, i32* %3
%1832 = add nsw i32 %1831, 6
store i32 %1832, i32* %3
%1833 = load i32, i32* %3
%1834 = mul nsw i32 %1833, 10
store i32 %1834, i32* %3
%1835 = load i32, i32* %3
%1836 = add nsw i32 %1835, 1
store i32 %1836, i32* %3
%1837 = load i32, i32* %3
%1838 = mul nsw i32 %1837, 2
store i32 %1838, i32* %3
%1839 = load i32, i32* %3
%1840 = sub nsw i32 %1839, 1
store i32 %1840, i32* %3
%1841 = load i32, i32* %3
%1842 = and i32 %1841, -1044481
store i32 %1842, i32* %3
%1843 = load i32, i32* %3
%1844 = xor i32 %1843, 81954
store i32 %1844, i32* %3
%1845 = load i32, i32* %3
%1846 = srem i32 %1845, 268435443
store i32 %1846, i32* %3
%1847 = load i32, i32* %3
%1848 = add nsw i32 %1847, 6
store i32 %1848, i32* %3
%1849 = load i32, i32* %3
%1850 = mul nsw i32 %1849, 10
store i32 %1850, i32* %3
%1851 = load i32, i32* %3
%1852 = add nsw i32 %1851, 1
store i32 %1852, i32* %3
%1853 = load i32, i32* %3
%1854 = mul nsw i32 %1853, 2
store i32 %1854, i32* %3
%1855 = load i32, i32* %3
%1856 = sub nsw i32 %1855, 1
store i32 %1856, i32* %3
%1857 = load i32, i32* %3
%1858 = and i32 %1857, -1044481
store i32 %1858, i32* %3
%1859 = load i32, i32* %3
%1860 = xor i32 %1859, 81954
store i32 %1860, i32* %3
%1861 = load i32, i32* %3
%1862 = srem i32 %1861, 268435443
store i32 %1862, i32* %3
%1863 = load i32, i32* %3
%1864 = add nsw i32 %1863, 6
store i32 %1864, i32* %3
%1865 = load i32, i32* %3
%1866 = mul nsw i32 %1865, 10
store i32 %1866, i32* %3
%1867 = load i32, i32* %3
%1868 = add nsw i32 %1867, 1
store i32 %1868, i32* %3
%1869 = load i32, i32* %3
%1870 = mul nsw i32 %1869, 2
store i32 %1870, i32* %3
%1871 = load i32, i32* %3
%1872 = sub nsw i32 %1871, 1
store i32 %1872, i32* %3
%1873 = load i32, i32* %3
%1874 = and i32 %1873, -1044481
store i32 %1874, i32* %3
%1875 = load i32, i32* %3
%1876 = xor i32 %1875, 81954
store i32 %1876, i32* %3
%1877 = load i32, i32* %3
%1878 = srem i32 %1877, 268435443
store i32 %1878, i32* %3
%1879 = load i32, i32* %3
%1880 = add nsw i32 %1879, 6
store i32 %1880, i32* %3
%1881 = load i32, i32* %3
%1882 = mul nsw i32 %1881, 10
store i32 %1882, i32* %3
%1883 = load i32, i32* %3
%1884 = add nsw i32 %1883, 1
store i32 %1884, i32* %3
%1885 = load i32, i32* %3
%1886 = mul nsw i32 %1885, 2
store i32 %1886, i32* %3
%1887 = load i32, i32* %3
%1888 = sub nsw i32 %1887, 1
store i32 %1888, i32* %3
%1889 = load i32, i32* %3
%1890 = and i32 %1889, -1044481
store i32 %1890, i32* %3
%1891 = load i32, i32* %3
%1892 = xor i32 %1891, 81954
store i32 %1892, i32* %3
%1893 = load i32, i32* %3
%1894 = srem i32 %1893, 268435443
store i32 %1894, i32* %3
%1895 = load i32, i32* %3
%1896 = add nsw i32 %1895, 6
store i32 %1896, i32* %3
%1897 = load i32, i32* %3
%1898 = mul nsw i32 %1897, 10
store i32 %1898, i32* %3
%1899 = load i32, i32* %3
%1900 = add nsw i32 %1899, 1
store i32 %1900, i32* %3
%1901 = load i32, i32* %3
%1902 = mul nsw i32 %1901, 2
store i32 %1902, i32* %3
%1903 = load i32, i32* %3
%1904 = sub nsw i32 %1903, 1
store i32 %1904, i32* %3
%1905 = load i32, i32* %3
%1906 = and i32 %1905, -1044481
store i32 %1906, i32* %3
%1907 = load i32, i32* %3
%1908 = xor i32 %1907, 81954
store i32 %1908, i32* %3
%1909 = load i32, i32* %3
%1910 = srem i32 %1909, 268435443
store i32 %1910, i32* %3
%1911 = load i32, i32* %3
%1912 = add nsw i32 %1911, 6
store i32 %1912, i32* %3
%1913 = load i32, i32* %3
%1914 = mul nsw i32 %1913, 10
store i32 %1914, i32* %3
%1915 = load i32, i32* %3
%1916 = add nsw i32 %1915, 1
store i32 %1916, i32* %3
%1917 = load i32, i32* %3
%1918 = mul nsw i32 %1917, 2
store i32 %1918, i32* %3
%1919 = load i32, i32* %3
%1920 = sub nsw i32 %1919, 1
store i32 %1920, i32* %3
%1921 = load i32, i32* %3
%1922 = and i32 %1921, -1044481
store i32 %1922, i32* %3
%1923 = load i32, i32* %3
%1924 = xor i32 %1923, 81954
store i32 %1924, i32* %3
%1925 = load i32, i32* %3
%1926 = srem i32 %1925, 268435443
store i32 %1926, i32* %3
%1927 = load i32, i32* %3
%1928 = add nsw i32 %1927, 6
store i32 %1928, i32* %3
%1929 = load i32, i32* %3
%1930 = mul nsw i32 %1929, 10
store i32 %1930, i32* %3
%1931 = load i32, i32* %3
%1932 = add nsw i32 %1931, 1
store i32 %1932, i32* %3
%1933 = load i32, i32* %3
%1934 = mul nsw i32 %1933, 2
store i32 %1934, i32* %3
%1935 = load i32, i32* %3
%1936 = sub nsw i32 %1935, 1
store i32 %1936, i32* %3
%1937 = load i32, i32* %3
%1938 = and i32 %1937, -1044481
store i32 %1938, i32* %3
%1939 = load i32, i32* %3
%1940 = xor i32 %1939, 81954
store i32 %1940, i32* %3
%1941 = load i32, i32* %3
%1942 = srem i32 %1941, 268435443
store i32 %1942, i32* %3
%1943 = load i32, i32* %3
%1944 = add nsw i32 %1943, 6
store i32 %1944, i32* %3
%1945 = load i32, i32* %3
%1946 = mul nsw i32 %1945, 10
store i32 %1946, i32* %3
%1947 = load i32, i32* %3
%1948 = add nsw i32 %1947, 1
store i32 %1948, i32* %3
%1949 = load i32, i32* %3
%1950 = mul nsw i32 %1949, 2
store i32 %1950, i32* %3
%1951 = load i32, i32* %3
%1952 = sub nsw i32 %1951, 1
store i32 %1952, i32* %3
%1953 = load i32, i32* %3
%1954 = and i32 %1953, -1044481
store i32 %1954, i32* %3
%1955 = load i32, i32* %3
%1956 = xor i32 %1955, 81954
store i32 %1956, i32* %3
%1957 = load i32, i32* %3
%1958 = srem i32 %1957, 268435443
store i32 %1958, i32* %3
%1959 = load i32, i32* %3
%1960 = add nsw i32 %1959, 6
store i32 %1960, i32* %3
%1961 = load i32, i32* %3
%1962 = mul nsw i32 %1961, 10
store i32 %1962, i32* %3
%1963 = load i32, i32* %3
%1964 = add nsw i32 %1963, 1
store i32 %1964, i32* %3
%1965 = load i32, i32* %3
%1966 = mul nsw i32 %1965, 2
store i32 %1966, i32* %3
%1967 = load i32, i32* %3
%1968 = sub nsw i32 %1967, 1
store i32 %1968, i32* %3
%1969 = load i32, i32* %3
%1970 = and i32 %1969, -1044481
store i32 %1970, i32* %3
%1971 = load i32, i32* %3
%1972 = xor i32 %1971, 81954
store i32 %1972, i32* %3
%1973 = load i32, i32* %3
%1974 = srem i32 %1973, 268435443
store i32 %1974, i32* %3
%1975 = load i32, i32* %3
%1976 = add nsw i32 %1975, 6
store i32 %1976, i32* %3
%1977 = load i32, i32* %3
%1978 = mul nsw i32 %1977, 10
store i32 %1978, i32* %3
%1979 = load i32, i32* %3
%1980 = add nsw i32 %1979, 1
store i32 %1980, i32* %3
%1981 = load i32, i32* %3
%1982 = mul nsw i32 %1981, 2
store i32 %1982, i32* %3
%1983 = load i32, i32* %3
%1984 = sub nsw i32 %1983, 1
store i32 %1984, i32* %3
%1985 = load i32, i32* %3
%1986 = and i32 %1985, -1044481
store i32 %1986, i32* %3
%1987 = load i32, i32* %3
%1988 = xor i32 %1987, 81954
store i32 %1988, i32* %3
%1989 = load i32, i32* %3
%1990 = srem i32 %1989, 268435443
store i32 %1990, i32* %3
%1991 = load i32, i32* %3
%1992 = add nsw i32 %1991, 6
store i32 %1992, i32* %3
%1993 = load i32, i32* %3
%1994 = mul nsw i32 %1993, 10
store i32 %1994, i32* %3
%1995 = load i32, i32* %3
%1996 = add nsw i32 %1995, 1
store i32 %1996, i32* %3
%1997 = load i32, i32* %3
%1998 = mul nsw i32 %1997, 2
store i32 %1998, i32* %3
%1999 = load i32, i32* %3
%2000 = sub nsw i32 %1999, 1
store i32 %2000, i32* %3
%2001 = load i32, i32* %3
%2002 = and i32 %2001, -1044481
store i32 %2002, i32* %3
%2003 = load i32, i32* %3
%2004 = xor i32 %2003, 81954
store i32 %2004, i32* %3
%2005 = load i32, i32* %3
%2006 = srem i32 %2005, 268435443
store i32 %2006, i32* %3
%2007 = load i32, i32* %3
%2008 = add nsw i32 %2007, 6
store i32 %2008, i32* %3
%2009 = load i32, i32* %3
%2010 = mul nsw i32 %2009, 10
store i32 %2010, i32* %3
%2011 = load i32, i32* %3
%2012 = add nsw i32 %2011, 1
store i32 %2012, i32* %3
%2013 = load i32, i32* %3
%2014 = mul nsw i32 %2013, 2
store i32 %2014, i32* %3
%2015 = load i32, i32* %3
%2016 = sub nsw i32 %2015, 1
store i32 %2016, i32* %3
%2017 = load i32, i32* %3
%2018 = and i32 %2017, -1044481
store i32 %2018, i32* %3
%2019 = load i32, i32* %3
%2020 = xor i32 %2019, 81954
store i32 %2020, i32* %3
%2021 = load i32, i32* %3
%2022 = srem i32 %2021, 268435443
store i32 %2022, i32* %3
%2023 = load i32, i32* %3
%2024 = add nsw i32 %2023, 6
store i32 %2024, i32* %3
%2025 = load i32, i32* %3
%2026 = mul nsw i32 %2025, 10
store i32 %2026, i32* %3
%2027 = load i32, i32* %3
%2028 = add nsw i32 %2027, 1
store i32 %2028, i32* %3
%2029 = load i32, i32* %3
%2030 = mul nsw i32 %2029, 2
store i32 %2030, i32* %3
%2031 = load i32, i32* %3
%2032 = sub nsw i32 %2031, 1
store i32 %2032, i32* %3
%2033 = load i32, i32* %3
%2034 = and i32 %2033, -1044481
store i32 %2034, i32* %3
%2035 = load i32, i32* %3
%2036 = xor i32 %2035, 81954
store i32 %2036, i32* %3
%2037 = load i32, i32* %3
%2038 = srem i32 %2037, 268435443
store i32 %2038, i32* %3
%2039 = load i32, i32* %3
%2040 = add nsw i32 %2039, 6
store i32 %2040, i32* %3
%2041 = load i32, i32* %3
%2042 = mul nsw i32 %2041, 10
store i32 %2042, i32* %3
%2043 = load i32, i32* %3
%2044 = add nsw i32 %2043, 1
store i32 %2044, i32* %3
%2045 = load i32, i32* %3
%2046 = mul nsw i32 %2045, 2
store i32 %2046, i32* %3
%2047 = load i32, i32* %3
%2048 = sub nsw i32 %2047, 1
store i32 %2048, i32* %3
%2049 = load i32, i32* %3
%2050 = and i32 %2049, -1044481
store i32 %2050, i32* %3
%2051 = load i32, i32* %3
%2052 = xor i32 %2051, 81954
store i32 %2052, i32* %3
%2053 = load i32, i32* %3
%2054 = srem i32 %2053, 268435443
store i32 %2054, i32* %3
%2055 = load i32, i32* %3
%2056 = add nsw i32 %2055, 6
store i32 %2056, i32* %3
%2057 = load i32, i32* %3
%2058 = mul nsw i32 %2057, 10
store i32 %2058, i32* %3
%2059 = load i32, i32* %3
%2060 = add nsw i32 %2059, 1
store i32 %2060, i32* %3
%2061 = load i32, i32* %3
%2062 = mul nsw i32 %2061, 2
store i32 %2062, i32* %3
%2063 = load i32, i32* %3
%2064 = sub nsw i32 %2063, 1
store i32 %2064, i32* %3
%2065 = load i32, i32* %3
%2066 = and i32 %2065, -1044481
store i32 %2066, i32* %3
%2067 = load i32, i32* %3
%2068 = xor i32 %2067, 81954
store i32 %2068, i32* %3
%2069 = load i32, i32* %3
%2070 = srem i32 %2069, 268435443
store i32 %2070, i32* %3
%2071 = load i32, i32* %3
%2072 = add nsw i32 %2071, 6
store i32 %2072, i32* %3
%2073 = load i32, i32* %3
%2074 = mul nsw i32 %2073, 10
store i32 %2074, i32* %3
%2075 = load i32, i32* %3
%2076 = add nsw i32 %2075, 1
store i32 %2076, i32* %3
%2077 = load i32, i32* %3
%2078 = mul nsw i32 %2077, 2
store i32 %2078, i32* %3
%2079 = load i32, i32* %3
%2080 = sub nsw i32 %2079, 1
store i32 %2080, i32* %3
%2081 = load i32, i32* %3
%2082 = and i32 %2081, -1044481
store i32 %2082, i32* %3
%2083 = load i32, i32* %3
%2084 = xor i32 %2083, 81954
store i32 %2084, i32* %3
%2085 = load i32, i32* %3
%2086 = srem i32 %2085, 268435443
store i32 %2086, i32* %3
%2087 = load i32, i32* %3
%2088 = add nsw i32 %2087, 6
store i32 %2088, i32* %3
%2089 = load i32, i32* %3
%2090 = mul nsw i32 %2089, 10
store i32 %2090, i32* %3
%2091 = load i32, i32* %3
%2092 = add nsw i32 %2091, 1
store i32 %2092, i32* %3
%2093 = load i32, i32* %3
%2094 = mul nsw i32 %2093, 2
store i32 %2094, i32* %3
%2095 = load i32, i32* %3
%2096 = sub nsw i32 %2095, 1
store i32 %2096, i32* %3
%2097 = load i32, i32* %3
%2098 = and i32 %2097, -1044481
store i32 %2098, i32* %3
%2099 = load i32, i32* %3
%2100 = xor i32 %2099, 81954
store i32 %2100, i32* %3
%2101 = load i32, i32* %3
%2102 = srem i32 %2101, 268435443
store i32 %2102, i32* %3
%2103 = load i32, i32* %3
%2104 = add nsw i32 %2103, 6
store i32 %2104, i32* %3
%2105 = load i32, i32* %3
%2106 = mul nsw i32 %2105, 10
store i32 %2106, i32* %3
%2107 = load i32, i32* %3
%2108 = add nsw i32 %2107, 1
store i32 %2108, i32* %3
%2109 = load i32, i32* %3
%2110 = mul nsw i32 %2109, 2
store i32 %2110, i32* %3
%2111 = load i32, i32* %3
%2112 = sub nsw i32 %2111, 1
store i32 %2112, i32* %3
%2113 = load i32, i32* %3
%2114 = and i32 %2113, -1044481
store i32 %2114, i32* %3
%2115 = load i32, i32* %3
%2116 = xor i32 %2115, 81954
store i32 %2116, i32* %3
%2117 = load i32, i32* %3
%2118 = srem i32 %2117, 268435443
store i32 %2118, i32* %3
%2119 = load i32, i32* %3
%2120 = add nsw i32 %2119, 6
store i32 %2120, i32* %3
%2121 = load i32, i32* %3
%2122 = mul nsw i32 %2121, 10
store i32 %2122, i32* %3
%2123 = load i32, i32* %3
%2124 = add nsw i32 %2123, 1
store i32 %2124, i32* %3
%2125 = load i32, i32* %3
%2126 = mul nsw i32 %2125, 2
store i32 %2126, i32* %3
%2127 = load i32, i32* %3
%2128 = sub nsw i32 %2127, 1
store i32 %2128, i32* %3
%2129 = load i32, i32* %3
%2130 = and i32 %2129, -1044481
store i32 %2130, i32* %3
%2131 = load i32, i32* %3
%2132 = xor i32 %2131, 81954
store i32 %2132, i32* %3
%2133 = load i32, i32* %3
%2134 = srem i32 %2133, 268435443
store i32 %2134, i32* %3
%2135 = load i32, i32* %3
%2136 = add nsw i32 %2135, 6
store i32 %2136, i32* %3
%2137 = load i32, i32* %3
%2138 = mul nsw i32 %2137, 10
store i32 %2138, i32* %3
%2139 = load i32, i32* %3
%2140 = add nsw i32 %2139, 1
store i32 %2140, i32* %3
%2141 = load i32, i32* %3
%2142 = mul nsw i32 %2141, 2
store i32 %2142, i32* %3
%2143 = load i32, i32* %3
%2144 = sub nsw i32 %2143, 1
store i32 %2144, i32* %3
%2145 = load i32, i32* %3
%2146 = and i32 %2145, -1044481
store i32 %2146, i32* %3
%2147 = load i32, i32* %3
%2148 = xor i32 %2147, 81954
store i32 %2148, i32* %3
%2149 = load i32, i32* %3
%2150 = srem i32 %2149, 268435443
store i32 %2150, i32* %3
%2151 = load i32, i32* %3
%2152 = add nsw i32 %2151, 6
store i32 %2152, i32* %3
%2153 = load i32, i32* %3
%2154 = mul nsw i32 %2153, 10
store i32 %2154, i32* %3
%2155 = load i32, i32* %3
%2156 = add nsw i32 %2155, 1
store i32 %2156, i32* %3
%2157 = load i32, i32* %3
%2158 = mul nsw i32 %2157, 2
store i32 %2158, i32* %3
%2159 = load i32, i32* %3
%2160 = sub nsw i32 %2159, 1
store i32 %2160, i32* %3
%2161 = load i32, i32* %3
%2162 = and i32 %2161, -1044481
store i32 %2162, i32* %3
%2163 = load i32, i32* %3
%2164 = xor i32 %2163, 81954
store i32 %2164, i32* %3
%2165 = load i32, i32* %3
%2166 = srem i32 %2165, 268435443
store i32 %2166, i32* %3
%2167 = load i32, i32* %3
%2168 = add nsw i32 %2167, 6
store i32 %2168, i32* %3
%2169 = load i32, i32* %3
%2170 = mul nsw i32 %2169, 10
store i32 %2170, i32* %3
%2171 = load i32, i32* %3
%2172 = add nsw i32 %2171, 1
store i32 %2172, i32* %3
%2173 = load i32, i32* %3
%2174 = mul nsw i32 %2173, 2
store i32 %2174, i32* %3
%2175 = load i32, i32* %3
%2176 = sub nsw i32 %2175, 1
store i32 %2176, i32* %3
%2177 = load i32, i32* %3
%2178 = and i32 %2177, -1044481
store i32 %2178, i32* %3
%2179 = load i32, i32* %3
%2180 = xor i32 %2179, 81954
store i32 %2180, i32* %3
%2181 = load i32, i32* %3
%2182 = srem i32 %2181, 268435443
store i32 %2182, i32* %3
%2183 = load i32, i32* %3
%2184 = add nsw i32 %2183, 6
store i32 %2184, i32* %3
%2185 = load i32, i32* %3
%2186 = mul nsw i32 %2185, 10
store i32 %2186, i32* %3
%2187 = load i32, i32* %3
%2188 = add nsw i32 %2187, 1
store i32 %2188, i32* %3
%2189 = load i32, i32* %3
%2190 = mul nsw i32 %2189, 2
store i32 %2190, i32* %3
%2191 = load i32, i32* %3
%2192 = sub nsw i32 %2191, 1
store i32 %2192, i32* %3
%2193 = load i32, i32* %3
%2194 = and i32 %2193, -1044481
store i32 %2194, i32* %3
%2195 = load i32, i32* %3
%2196 = xor i32 %2195, 81954
store i32 %2196, i32* %3
%2197 = load i32, i32* %3
%2198 = srem i32 %2197, 268435443
store i32 %2198, i32* %3
%2199 = load i32, i32* %3
%2200 = add nsw i32 %2199, 6
store i32 %2200, i32* %3
%2201 = load i32, i32* %3
%2202 = mul nsw i32 %2201, 10
store i32 %2202, i32* %3
%2203 = load i32, i32* %3
%2204 = add nsw i32 %2203, 1
store i32 %2204, i32* %3
%2205 = load i32, i32* %3
%2206 = mul nsw i32 %2205, 2
store i32 %2206, i32* %3
%2207 = load i32, i32* %3
%2208 = sub nsw i32 %2207, 1
store i32 %2208, i32* %3
%2209 = load i32, i32* %3
%2210 = and i32 %2209, -1044481
store i32 %2210, i32* %3
%2211 = load i32, i32* %3
%2212 = xor i32 %2211, 81954
store i32 %2212, i32* %3
%2213 = load i32, i32* %3
%2214 = srem i32 %2213, 268435443
store i32 %2214, i32* %3
%2215 = load i32, i32* %3
%2216 = add nsw i32 %2215, 6
store i32 %2216, i32* %3
%2217 = load i32, i32* %3
%2218 = mul nsw i32 %2217, 10
store i32 %2218, i32* %3
%2219 = load i32, i32* %3
%2220 = add nsw i32 %2219, 1
store i32 %2220, i32* %3
%2221 = load i32, i32* %3
%2222 = mul nsw i32 %2221, 2
store i32 %2222, i32* %3
%2223 = load i32, i32* %3
%2224 = sub nsw i32 %2223, 1
store i32 %2224, i32* %3
%2225 = load i32, i32* %3
%2226 = and i32 %2225, -1044481
store i32 %2226, i32* %3
%2227 = load i32, i32* %3
%2228 = xor i32 %2227, 81954
store i32 %2228, i32* %3
%2229 = load i32, i32* %3
%2230 = srem i32 %2229, 268435443
store i32 %2230, i32* %3
%2231 = load i32, i32* %3
%2232 = add nsw i32 %2231, 6
store i32 %2232, i32* %3
%2233 = load i32, i32* %3
%2234 = mul nsw i32 %2233, 10
store i32 %2234, i32* %3
%2235 = load i32, i32* %3
%2236 = add nsw i32 %2235, 1
store i32 %2236, i32* %3
%2237 = load i32, i32* %3
%2238 = mul nsw i32 %2237, 2
store i32 %2238, i32* %3
%2239 = load i32, i32* %3
%2240 = sub nsw i32 %2239, 1
store i32 %2240, i32* %3
%2241 = load i32, i32* %3
%2242 = and i32 %2241, -1044481
store i32 %2242, i32* %3
%2243 = load i32, i32* %3
%2244 = xor i32 %2243, 81954
store i32 %2244, i32* %3
%2245 = load i32, i32* %3
%2246 = srem i32 %2245, 268435443
store i32 %2246, i32* %3
%2247 = load i32, i32* %3
%2248 = add nsw i32 %2247, 6
store i32 %2248, i32* %3
%2249 = load i32, i32* %3
%2250 = mul nsw i32 %2249, 10
store i32 %2250, i32* %3
%2251 = load i32, i32* %3
%2252 = add nsw i32 %2251, 1
store i32 %2252, i32* %3
%2253 = load i32, i32* %3
%2254 = mul nsw i32 %2253, 2
store i32 %2254, i32* %3
%2255 = load i32, i32* %3
%2256 = sub nsw i32 %2255, 1
store i32 %2256, i32* %3
%2257 = load i32, i32* %3
%2258 = and i32 %2257, -1044481
store i32 %2258, i32* %3
%2259 = load i32, i32* %3
%2260 = xor i32 %2259, 81954
store i32 %2260, i32* %3
%2261 = load i32, i32* %3
%2262 = srem i32 %2261, 268435443
store i32 %2262, i32* %3
%2263 = load i32, i32* %3
%2264 = add nsw i32 %2263, 6
store i32 %2264, i32* %3
%2265 = load i32, i32* %3
%2266 = mul nsw i32 %2265, 10
store i32 %2266, i32* %3
%2267 = load i32, i32* %3
%2268 = add nsw i32 %2267, 1
store i32 %2268, i32* %3
%2269 = load i32, i32* %3
%2270 = mul nsw i32 %2269, 2
store i32 %2270, i32* %3
%2271 = load i32, i32* %3
%2272 = sub nsw i32 %2271, 1
store i32 %2272, i32* %3
%2273 = load i32, i32* %3
%2274 = and i32 %2273, -1044481
store i32 %2274, i32* %3
%2275 = load i32, i32* %3
%2276 = xor i32 %2275, 81954
store i32 %2276, i32* %3
%2277 = load i32, i32* %3
%2278 = srem i32 %2277, 268435443
store i32 %2278, i32* %3
%2279 = load i32, i32* %3
%2280 = add nsw i32 %2279, 6
store i32 %2280, i32* %3
%2281 = load i32, i32* %3
%2282 = mul nsw i32 %2281, 10
store i32 %2282, i32* %3
%2283 = load i32, i32* %3
%2284 = add nsw i32 %2283, 1
store i32 %2284, i32* %3
%2285 = load i32, i32* %3
%2286 = mul nsw i32 %2285, 2
store i32 %2286, i32* %3
%2287 = load i32, i32* %3
%2288 = sub nsw i32 %2287, 1
store i32 %2288, i32* %3
%2289 = load i32, i32* %3
%2290 = and i32 %2289, -1044481
store i32 %2290, i32* %3
%2291 = load i32, i32* %3
%2292 = xor i32 %2291, 81954
store i32 %2292, i32* %3
%2293 = load i32, i32* %3
%2294 = srem i32 %2293, 268435443
store i32 %2294, i32* %3
%2295 = load i32, i32* %3
%2296 = add nsw i32 %2295, 6
store i32 %2296, i32* %3
%2297 = load i32, i32* %3
%2298 = mul nsw i32 %2297, 10
store i32 %2298, i32* %3
%2299 = load i32, i32* %3
%2300 = add nsw i32 %2299, 1
store i32 %2300, i32* %3
%2301 = load i32, i32* %3
%2302 = mul nsw i32 %2301, 2
store i32 %2302, i32* %3
%2303 = load i32, i32* %3
%2304 = sub nsw i32 %2303, 1
store i32 %2304, i32* %3
%2305 = load i32, i32* %3
%2306 = and i32 %2305, -1044481
store i32 %2306, i32* %3
%2307 = load i32, i32* %3
%2308 = xor i32 %2307, 81954
store i32 %2308, i32* %3
%2309 = load i32, i32* %3
%2310 = srem i32 %2309, 268435443
store i32 %2310, i32* %3
%2311 = load i32, i32* %3
%2312 = add nsw i32 %2311, 6
store i32 %2312, i32* %3
%2313 = load i32, i32* %3
%2314 = mul nsw i32 %2313, 10
store i32 %2314, i32* %3
%2315 = load i32, i32* %3
%2316 = add nsw i32 %2315, 1
store i32 %2316, i32* %3
%2317 = load i32, i32* %3
%2318 = mul nsw i32 %2317, 2
store i32 %2318, i32* %3
%2319 = load i32, i32* %3
%2320 = sub nsw i32 %2319, 1
store i32 %2320, i32* %3
%2321 = load i32, i32* %3
%2322 = and i32 %2321, -1044481
store i32 %2322, i32* %3
%2323 = load i32, i32* %3
%2324 = xor i32 %2323, 81954
store i32 %2324, i32* %3
%2325 = load i32, i32* %3
%2326 = srem i32 %2325, 268435443
store i32 %2326, i32* %3
%2327 = load i32, i32* %3
%2328 = add nsw i32 %2327, 6
store i32 %2328, i32* %3
%2329 = load i32, i32* %3
%2330 = mul nsw i32 %2329, 10
store i32 %2330, i32* %3
%2331 = load i32, i32* %3
%2332 = add nsw i32 %2331, 1
store i32 %2332, i32* %3
%2333 = load i32, i32* %3
%2334 = mul nsw i32 %2333, 2
store i32 %2334, i32* %3
%2335 = load i32, i32* %3
%2336 = sub nsw i32 %2335, 1
store i32 %2336, i32* %3
%2337 = load i32, i32* %3
%2338 = and i32 %2337, -1044481
store i32 %2338, i32* %3
%2339 = load i32, i32* %3
%2340 = xor i32 %2339, 81954
store i32 %2340, i32* %3
%2341 = load i32, i32* %3
%2342 = srem i32 %2341, 268435443
store i32 %2342, i32* %3
%2343 = load i32, i32* %3
%2344 = add nsw i32 %2343, 6
store i32 %2344, i32* %3
%2345 = load i32, i32* %3
%2346 = mul nsw i32 %2345, 10
store i32 %2346, i32* %3
%2347 = load i32, i32* %3
%2348 = add nsw i32 %2347, 1
store i32 %2348, i32* %3
%2349 = load i32, i32* %3
%2350 = mul nsw i32 %2349, 2
store i32 %2350, i32* %3
%2351 = load i32, i32* %3
%2352 = sub nsw i32 %2351, 1
store i32 %2352, i32* %3
%2353 = load i32, i32* %3
%2354 = and i32 %2353, -1044481
store i32 %2354, i32* %3
%2355 = load i32, i32* %3
%2356 = xor i32 %2355, 81954
store i32 %2356, i32* %3
%2357 = load i32, i32* %3
%2358 = srem i32 %2357, 268435443
store i32 %2358, i32* %3
%2359 = load i32, i32* %3
%2360 = add nsw i32 %2359, 6
store i32 %2360, i32* %3
%2361 = load i32, i32* %3
%2362 = mul nsw i32 %2361, 10
store i32 %2362, i32* %3
%2363 = load i32, i32* %3
%2364 = add nsw i32 %2363, 1
store i32 %2364, i32* %3
%2365 = load i32, i32* %3
%2366 = mul nsw i32 %2365, 2
store i32 %2366, i32* %3
%2367 = load i32, i32* %3
%2368 = sub nsw i32 %2367, 1
store i32 %2368, i32* %3
%2369 = load i32, i32* %3
%2370 = and i32 %2369, -1044481
store i32 %2370, i32* %3
%2371 = load i32, i32* %3
%2372 = xor i32 %2371, 81954
store i32 %2372, i32* %3
%2373 = load i32, i32* %3
%2374 = srem i32 %2373, 268435443
store i32 %2374, i32* %3
%2375 = load i32, i32* %3
%2376 = add nsw i32 %2375, 6
store i32 %2376, i32* %3
%2377 = load i32, i32* %3
%2378 = mul nsw i32 %2377, 10
store i32 %2378, i32* %3
%2379 = load i32, i32* %3
%2380 = add nsw i32 %2379, 1
store i32 %2380, i32* %3
%2381 = load i32, i32* %3
%2382 = mul nsw i32 %2381, 2
store i32 %2382, i32* %3
%2383 = load i32, i32* %3
%2384 = sub nsw i32 %2383, 1
store i32 %2384, i32* %3
%2385 = load i32, i32* %3
%2386 = and i32 %2385, -1044481
store i32 %2386, i32* %3
%2387 = load i32, i32* %3
%2388 = xor i32 %2387, 81954
store i32 %2388, i32* %3
%2389 = load i32, i32* %3
%2390 = srem i32 %2389, 268435443
store i32 %2390, i32* %3
%2391 = load i32, i32* %3
%2392 = add nsw i32 %2391, 6
store i32 %2392, i32* %3
%2393 = load i32, i32* %3
%2394 = mul nsw i32 %2393, 10
store i32 %2394, i32* %3
%2395 = load i32, i32* %3
%2396 = add nsw i32 %2395, 1
store i32 %2396, i32* %3
%2397 = load i32, i32* %3
%2398 = mul nsw i32 %2397, 2
store i32 %2398, i32* %3
%2399 = load i32, i32* %3
%2400 = sub nsw i32 %2399, 1
store i32 %2400, i32* %3
%2401 = load i32, i32* %3
%2402 = and i32 %2401, -1044481
store i32 %2402, i32* %3
%2403 = load i32, i32* %3
%2404 = xor i32 %2403, 81954
store i32 %2404, i32* %3
%2405 = load i32, i32* %3
%2406 = srem i32 %2405, 268435443
store i32 %2406, i32* %3
%2407 = load i32, i32* %3
%2408 = add nsw i32 %2407, 6
store i32 %2408, i32* %3
%2409 = load i32, i32* %3
%2410 = mul nsw i32 %2409, 10
store i32 %2410, i32* %3
%2411 = load i32, i32* %3
%2412 = add nsw i32 %2411, 1
store i32 %2412, i32* %3
%2413 = load i32, i32* %3
%2414 = mul nsw i32 %2413, 2
store i32 %2414, i32* %3
%2415 = load i32, i32* %3
%2416 = sub nsw i32 %2415, 1
store i32 %2416, i32* %3
%2417 = load i32, i32* %3
%2418 = and i32 %2417, -1044481
store i32 %2418, i32* %3
%2419 = load i32, i32* %3
%2420 = xor i32 %2419, 81954
store i32 %2420, i32* %3
%2421 = load i32, i32* %3
%2422 = srem i32 %2421, 268435443
store i32 %2422, i32* %3
%2423 = load i32, i32* %3
%2424 = add nsw i32 %2423, 6
store i32 %2424, i32* %3
%2425 = load i32, i32* %3
%2426 = mul nsw i32 %2425, 10
store i32 %2426, i32* %3
%2427 = load i32, i32* %3
%2428 = add nsw i32 %2427, 1
store i32 %2428, i32* %3
%2429 = load i32, i32* %3
%2430 = mul nsw i32 %2429, 2
store i32 %2430, i32* %3
%2431 = load i32, i32* %3
%2432 = sub nsw i32 %2431, 1
store i32 %2432, i32* %3
%2433 = load i32, i32* %3
%2434 = and i32 %2433, -1044481
store i32 %2434, i32* %3
%2435 = load i32, i32* %3
%2436 = xor i32 %2435, 81954
store i32 %2436, i32* %3
%2437 = load i32, i32* %3
%2438 = srem i32 %2437, 268435443
store i32 %2438, i32* %3
%2439 = load i32, i32* %3
%2440 = add nsw i32 %2439, 6
store i32 %2440, i32* %3
%2441 = load i32, i32* %3
%2442 = mul nsw i32 %2441, 10
store i32 %2442, i32* %3
%2443 = load i32, i32* %3
%2444 = add nsw i32 %2443, 1
store i32 %2444, i32* %3
%2445 = load i32, i32* %3
%2446 = mul nsw i32 %2445, 2
store i32 %2446, i32* %3
%2447 = load i32, i32* %3
%2448 = sub nsw i32 %2447, 1
store i32 %2448, i32* %3
%2449 = load i32, i32* %3
%2450 = and i32 %2449, -1044481
store i32 %2450, i32* %3
%2451 = load i32, i32* %3
%2452 = xor i32 %2451, 81954
store i32 %2452, i32* %3
%2453 = load i32, i32* %3
%2454 = srem i32 %2453, 268435443
store i32 %2454, i32* %3
%2455 = load i32, i32* %3
%2456 = add nsw i32 %2455, 6
store i32 %2456, i32* %3
%2457 = load i32, i32* %3
%2458 = mul nsw i32 %2457, 10
store i32 %2458, i32* %3
%2459 = load i32, i32* %3
%2460 = add nsw i32 %2459, 1
store i32 %2460, i32* %3
%2461 = load i32, i32* %3
%2462 = mul nsw i32 %2461, 2
store i32 %2462, i32* %3
%2463 = load i32, i32* %3
%2464 = sub nsw i32 %2463, 1
store i32 %2464, i32* %3
%2465 = load i32, i32* %3
%2466 = and i32 %2465, -1044481
store i32 %2466, i32* %3
%2467 = load i32, i32* %3
%2468 = xor i32 %2467, 81954
store i32 %2468, i32* %3
%2469 = load i32, i32* %3
%2470 = srem i32 %2469, 268435443
store i32 %2470, i32* %3
%2471 = load i32, i32* %3
%2472 = add nsw i32 %2471, 6
store i32 %2472, i32* %3
%2473 = load i32, i32* %3
%2474 = mul nsw i32 %2473, 10
store i32 %2474, i32* %3
%2475 = load i32, i32* %3
%2476 = add nsw i32 %2475, 1
store i32 %2476, i32* %3
%2477 = load i32, i32* %3
%2478 = mul nsw i32 %2477, 2
store i32 %2478, i32* %3
%2479 = load i32, i32* %3
%2480 = sub nsw i32 %2479, 1
store i32 %2480, i32* %3
%2481 = load i32, i32* %3
%2482 = and i32 %2481, -1044481
store i32 %2482, i32* %3
%2483 = load i32, i32* %3
%2484 = xor i32 %2483, 81954
store i32 %2484, i32* %3
%2485 = load i32, i32* %3
%2486 = srem i32 %2485, 268435443
store i32 %2486, i32* %3
%2487 = load i32, i32* %3
%2488 = add nsw i32 %2487, 6
store i32 %2488, i32* %3
%2489 = load i32, i32* %3
%2490 = mul nsw i32 %2489, 10
store i32 %2490, i32* %3
%2491 = load i32, i32* %3
%2492 = add nsw i32 %2491, 1
store i32 %2492, i32* %3
%2493 = load i32, i32* %3
%2494 = mul nsw i32 %2493, 2
store i32 %2494, i32* %3
%2495 = load i32, i32* %3
%2496 = sub nsw i32 %2495, 1
store i32 %2496, i32* %3
%2497 = load i32, i32* %3
%2498 = and i32 %2497, -1044481
store i32 %2498, i32* %3
%2499 = load i32, i32* %3
%2500 = xor i32 %2499, 81954
store i32 %2500, i32* %3
%2501 = load i32, i32* %3
%2502 = srem i32 %2501, 268435443
store i32 %2502, i32* %3
%2503 = load i32, i32* %3
%2504 = add nsw i32 %2503, 6
store i32 %2504, i32* %3
%2505 = load i32, i32* %3
%2506 = mul nsw i32 %2505, 10
store i32 %2506, i32* %3
%2507 = load i32, i32* %3
%2508 = add nsw i32 %2507, 1
store i32 %2508, i32* %3
%2509 = load i32, i32* %3
%2510 = mul nsw i32 %2509, 2
store i32 %2510, i32* %3
%2511 = load i32, i32* %3
%2512 = sub nsw i32 %2511, 1
store i32 %2512, i32* %3
%2513 = load i32, i32* %3
%2514 = and i32 %2513, -1044481
store i32 %2514, i32* %3
%2515 = load i32, i32* %3
%2516 = xor i32 %2515, 81954
store i32 %2516, i32* %3
%2517 = load i32, i32* %3
%2518 = srem i32 %2517, 268435443
store i32 %2518, i32* %3
%2519 = load i32, i32* %3
%2520 = add nsw i32 %2519, 6
store i32 %2520, i32* %3
%2521 = load i32, i32* %3
%2522 = mul nsw i32 %2521, 10
store i32 %2522, i32* %3
%2523 = load i32, i32* %3
%2524 = add nsw i32 %2523, 1
store i32 %2524, i32* %3
%2525 = load i32, i32* %3
%2526 = mul nsw i32 %2525, 2
store i32 %2526, i32* %3
%2527 = load i32, i32* %3
%2528 = sub nsw i32 %2527, 1
store i32 %2528, i32* %3
%2529 = load i32, i32* %3
%2530 = and i32 %2529, -1044481
store i32 %2530, i32* %3
%2531 = load i32, i32* %3
%2532 = xor i32 %2531, 81954
store i32 %2532, i32* %3
%2533 = load i32, i32* %3
%2534 = srem i32 %2533, 268435443
store i32 %2534, i32* %3
%2535 = load i32, i32* %3
%2536 = add nsw i32 %2535, 6
store i32 %2536, i32* %3
%2537 = load i32, i32* %3
%2538 = mul nsw i32 %2537, 10
store i32 %2538, i32* %3
%2539 = load i32, i32* %3
%2540 = add nsw i32 %2539, 1
store i32 %2540, i32* %3
%2541 = load i32, i32* %3
%2542 = mul nsw i32 %2541, 2
store i32 %2542, i32* %3
%2543 = load i32, i32* %3
%2544 = sub nsw i32 %2543, 1
store i32 %2544, i32* %3
%2545 = load i32, i32* %3
%2546 = and i32 %2545, -1044481
store i32 %2546, i32* %3
%2547 = load i32, i32* %3
%2548 = xor i32 %2547, 81954
store i32 %2548, i32* %3
%2549 = load i32, i32* %3
%2550 = srem i32 %2549, 268435443
store i32 %2550, i32* %3
%2551 = load i32, i32* %3
%2552 = add nsw i32 %2551, 6
store i32 %2552, i32* %3
%2553 = load i32, i32* %3
%2554 = mul nsw i32 %2553, 10
store i32 %2554, i32* %3
%2555 = load i32, i32* %3
%2556 = add nsw i32 %2555, 1
store i32 %2556, i32* %3
%2557 = load i32, i32* %3
%2558 = mul nsw i32 %2557, 2
store i32 %2558, i32* %3
%2559 = load i32, i32* %3
%2560 = sub nsw i32 %2559, 1
store i32 %2560, i32* %3
%2561 = load i32, i32* %3
%2562 = and i32 %2561, -1044481
store i32 %2562, i32* %3
%2563 = load i32, i32* %3
%2564 = xor i32 %2563, 81954
store i32 %2564, i32* %3
%2565 = load i32, i32* %3
%2566 = srem i32 %2565, 268435443
store i32 %2566, i32* %3
%2567 = load i32, i32* %3
%2568 = add nsw i32 %2567, 6
store i32 %2568, i32* %3
%2569 = load i32, i32* %3
%2570 = mul nsw i32 %2569, 10
store i32 %2570, i32* %3
%2571 = load i32, i32* %3
%2572 = add nsw i32 %2571, 1
store i32 %2572, i32* %3
%2573 = load i32, i32* %3
%2574 = mul nsw i32 %2573, 2
store i32 %2574, i32* %3
%2575 = load i32, i32* %3
%2576 = sub nsw i32 %2575, 1
store i32 %2576, i32* %3
%2577 = load i32, i32* %3
%2578 = and i32 %2577, -1044481
store i32 %2578, i32* %3
%2579 = load i32, i32* %3
%2580 = xor i32 %2579, 81954
store i32 %2580, i32* %3
%2581 = load i32, i32* %3
%2582 = srem i32 %2581, 268435443
store i32 %2582, i32* %3
%2583 = load i32, i32* %3
%2584 = add nsw i32 %2583, 6
store i32 %2584, i32* %3
%2585 = load i32, i32* %3
%2586 = mul nsw i32 %2585, 10
store i32 %2586, i32* %3
%2587 = load i32, i32* %3
%2588 = add nsw i32 %2587, 1
store i32 %2588, i32* %3
%2589 = load i32, i32* %3
%2590 = mul nsw i32 %2589, 2
store i32 %2590, i32* %3
%2591 = load i32, i32* %3
%2592 = sub nsw i32 %2591, 1
store i32 %2592, i32* %3
%2593 = load i32, i32* %3
%2594 = and i32 %2593, -1044481
store i32 %2594, i32* %3
%2595 = load i32, i32* %3
%2596 = xor i32 %2595, 81954
store i32 %2596, i32* %3
%2597 = load i32, i32* %3
%2598 = srem i32 %2597, 268435443
store i32 %2598, i32* %3
%2599 = load i32, i32* %3
%2600 = add nsw i32 %2599, 6
store i32 %2600, i32* %3
%2601 = load i32, i32* %3
%2602 = mul nsw i32 %2601, 10
store i32 %2602, i32* %3
%2603 = load i32, i32* %3
%2604 = add nsw i32 %2603, 1
store i32 %2604, i32* %3
%2605 = load i32, i32* %3
%2606 = mul nsw i32 %2605, 2
store i32 %2606, i32* %3
%2607 = load i32, i32* %3
%2608 = sub nsw i32 %2607, 1
store i32 %2608, i32* %3
%2609 = load i32, i32* %3
%2610 = and i32 %2609, -1044481
store i32 %2610, i32* %3
%2611 = load i32, i32* %3
%2612 = xor i32 %2611, 81954
store i32 %2612, i32* %3
%2613 = load i32, i32* %3
%2614 = srem i32 %2613, 268435443
store i32 %2614, i32* %3
%2615 = load i32, i32* %3
%2616 = add nsw i32 %2615, 6
store i32 %2616, i32* %3
%2617 = load i32, i32* %3
%2618 = mul nsw i32 %2617, 10
store i32 %2618, i32* %3
%2619 = load i32, i32* %3
%2620 = add nsw i32 %2619, 1
store i32 %2620, i32* %3
%2621 = load i32, i32* %3
%2622 = mul nsw i32 %2621, 2
store i32 %2622, i32* %3
%2623 = load i32, i32* %3
%2624 = sub nsw i32 %2623, 1
store i32 %2624, i32* %3
%2625 = load i32, i32* %3
%2626 = and i32 %2625, -1044481
store i32 %2626, i32* %3
%2627 = load i32, i32* %3
%2628 = xor i32 %2627, 81954
store i32 %2628, i32* %3
%2629 = load i32, i32* %3
%2630 = srem i32 %2629, 268435443
store i32 %2630, i32* %3
%2631 = load i32, i32* %3
%2632 = add nsw i32 %2631, 6
store i32 %2632, i32* %3
%2633 = load i32, i32* %3
%2634 = mul nsw i32 %2633, 10
store i32 %2634, i32* %3
%2635 = load i32, i32* %3
%2636 = add nsw i32 %2635, 1
store i32 %2636, i32* %3
%2637 = load i32, i32* %3
%2638 = mul nsw i32 %2637, 2
store i32 %2638, i32* %3
%2639 = load i32, i32* %3
%2640 = sub nsw i32 %2639, 1
store i32 %2640, i32* %3
%2641 = load i32, i32* %3
%2642 = and i32 %2641, -1044481
store i32 %2642, i32* %3
%2643 = load i32, i32* %3
%2644 = xor i32 %2643, 81954
store i32 %2644, i32* %3
%2645 = load i32, i32* %3
%2646 = srem i32 %2645, 268435443
store i32 %2646, i32* %3
%2647 = load i32, i32* %3
%2648 = add nsw i32 %2647, 6
store i32 %2648, i32* %3
%2649 = load i32, i32* %3
%2650 = mul nsw i32 %2649, 10
store i32 %2650, i32* %3
%2651 = load i32, i32* %3
%2652 = add nsw i32 %2651, 1
store i32 %2652, i32* %3
%2653 = load i32, i32* %3
%2654 = mul nsw i32 %2653, 2
store i32 %2654, i32* %3
%2655 = load i32, i32* %3
%2656 = sub nsw i32 %2655, 1
store i32 %2656, i32* %3
%2657 = load i32, i32* %3
%2658 = and i32 %2657, -1044481
store i32 %2658, i32* %3
%2659 = load i32, i32* %3
%2660 = xor i32 %2659, 81954
store i32 %2660, i32* %3
%2661 = load i32, i32* %3
%2662 = srem i32 %2661, 268435443
store i32 %2662, i32* %3
%2663 = load i32, i32* %3
%2664 = add nsw i32 %2663, 6
store i32 %2664, i32* %3
%2665 = load i32, i32* %3
%2666 = mul nsw i32 %2665, 10
store i32 %2666, i32* %3
%2667 = load i32, i32* %3
%2668 = add nsw i32 %2667, 1
store i32 %2668, i32* %3
%2669 = load i32, i32* %3
%2670 = mul nsw i32 %2669, 2
store i32 %2670, i32* %3
%2671 = load i32, i32* %3
%2672 = sub nsw i32 %2671, 1
store i32 %2672, i32* %3
%2673 = load i32, i32* %3
%2674 = and i32 %2673, -1044481
store i32 %2674, i32* %3
%2675 = load i32, i32* %3
%2676 = xor i32 %2675, 81954
store i32 %2676, i32* %3
%2677 = load i32, i32* %3
%2678 = srem i32 %2677, 268435443
store i32 %2678, i32* %3
%2679 = load i32, i32* %3
%2680 = add nsw i32 %2679, 6
store i32 %2680, i32* %3
%2681 = load i32, i32* %3
%2682 = mul nsw i32 %2681, 10
store i32 %2682, i32* %3
%2683 = load i32, i32* %3
%2684 = add nsw i32 %2683, 1
store i32 %2684, i32* %3
%2685 = load i32, i32* %3
%2686 = mul nsw i32 %2685, 2
store i32 %2686, i32* %3
%2687 = load i32, i32* %3
%2688 = sub nsw i32 %2687, 1
store i32 %2688, i32* %3
%2689 = load i32, i32* %3
%2690 = and i32 %2689, -1044481
store i32 %2690, i32* %3
%2691 = load i32, i32* %3
%2692 = xor i32 %2691, 81954
store i32 %2692, i32* %3
%2693 = load i32, i32* %3
%2694 = srem i32 %2693, 268435443
store i32 %2694, i32* %3
%2695 = load i32, i32* %3
%2696 = add nsw i32 %2695, 6
store i32 %2696, i32* %3
%2697 = load i32, i32* %3
%2698 = mul nsw i32 %2697, 10
store i32 %2698, i32* %3
%2699 = load i32, i32* %3
%2700 = add nsw i32 %2699, 1
store i32 %2700, i32* %3
%2701 = load i32, i32* %3
%2702 = mul nsw i32 %2701, 2
store i32 %2702, i32* %3
%2703 = load i32, i32* %3
%2704 = sub nsw i32 %2703, 1
store i32 %2704, i32* %3
%2705 = load i32, i32* %3
%2706 = and i32 %2705, -1044481
store i32 %2706, i32* %3
%2707 = load i32, i32* %3
%2708 = xor i32 %2707, 81954
store i32 %2708, i32* %3
%2709 = load i32, i32* %3
%2710 = srem i32 %2709, 268435443
store i32 %2710, i32* %3
%2711 = load i32, i32* %3
%2712 = add nsw i32 %2711, 6
store i32 %2712, i32* %3
%2713 = load i32, i32* %3
%2714 = mul nsw i32 %2713, 10
store i32 %2714, i32* %3
%2715 = load i32, i32* %3
%2716 = add nsw i32 %2715, 1
store i32 %2716, i32* %3
%2717 = load i32, i32* %3
%2718 = mul nsw i32 %2717, 2
store i32 %2718, i32* %3
%2719 = load i32, i32* %3
%2720 = sub nsw i32 %2719, 1
store i32 %2720, i32* %3
%2721 = load i32, i32* %3
%2722 = and i32 %2721, -1044481
store i32 %2722, i32* %3
%2723 = load i32, i32* %3
%2724 = xor i32 %2723, 81954
store i32 %2724, i32* %3
%2725 = load i32, i32* %3
%2726 = srem i32 %2725, 268435443
store i32 %2726, i32* %3
%2727 = load i32, i32* %3
%2728 = add nsw i32 %2727, 6
store i32 %2728, i32* %3
%2729 = load i32, i32* %3
%2730 = mul nsw i32 %2729, 10
store i32 %2730, i32* %3
%2731 = load i32, i32* %3
%2732 = add nsw i32 %2731, 1
store i32 %2732, i32* %3
%2733 = load i32, i32* %3
%2734 = mul nsw i32 %2733, 2
store i32 %2734, i32* %3
%2735 = load i32, i32* %3
%2736 = sub nsw i32 %2735, 1
store i32 %2736, i32* %3
%2737 = load i32, i32* %3
%2738 = and i32 %2737, -1044481
store i32 %2738, i32* %3
%2739 = load i32, i32* %3
%2740 = xor i32 %2739, 81954
store i32 %2740, i32* %3
%2741 = load i32, i32* %3
%2742 = srem i32 %2741, 268435443
store i32 %2742, i32* %3
%2743 = load i32, i32* %3
%2744 = add nsw i32 %2743, 6
store i32 %2744, i32* %3
%2745 = load i32, i32* %3
%2746 = mul nsw i32 %2745, 10
store i32 %2746, i32* %3
%2747 = load i32, i32* %3
%2748 = add nsw i32 %2747, 1
store i32 %2748, i32* %3
%2749 = load i32, i32* %3
%2750 = mul nsw i32 %2749, 2
store i32 %2750, i32* %3
%2751 = load i32, i32* %3
%2752 = sub nsw i32 %2751, 1
store i32 %2752, i32* %3
%2753 = load i32, i32* %3
%2754 = and i32 %2753, -1044481
store i32 %2754, i32* %3
%2755 = load i32, i32* %3
%2756 = xor i32 %2755, 81954
store i32 %2756, i32* %3
%2757 = load i32, i32* %3
%2758 = srem i32 %2757, 268435443
store i32 %2758, i32* %3
%2759 = load i32, i32* %3
%2760 = add nsw i32 %2759, 6
store i32 %2760, i32* %3
%2761 = load i32, i32* %3
%2762 = mul nsw i32 %2761, 10
store i32 %2762, i32* %3
%2763 = load i32, i32* %3
%2764 = add nsw i32 %2763, 1
store i32 %2764, i32* %3
%2765 = load i32, i32* %3
%2766 = mul nsw i32 %2765, 2
store i32 %2766, i32* %3
%2767 = load i32, i32* %3
%2768 = sub nsw i32 %2767, 1
store i32 %2768, i32* %3
%2769 = load i32, i32* %3
%2770 = and i32 %2769, -1044481
store i32 %2770, i32* %3
%2771 = load i32, i32* %3
%2772 = xor i32 %2771, 81954
store i32 %2772, i32* %3
%2773 = load i32, i32* %3
%2774 = srem i32 %2773, 268435443
store i32 %2774, i32* %3
%2775 = load i32, i32* %3
%2776 = add nsw i32 %2775, 6
store i32 %2776, i32* %3
%2777 = load i32, i32* %3
%2778 = mul nsw i32 %2777, 10
store i32 %2778, i32* %3
%2779 = load i32, i32* %3
%2780 = add nsw i32 %2779, 1
store i32 %2780, i32* %3
%2781 = load i32, i32* %3
%2782 = mul nsw i32 %2781, 2
store i32 %2782, i32* %3
%2783 = load i32, i32* %3
%2784 = sub nsw i32 %2783, 1
store i32 %2784, i32* %3
%2785 = load i32, i32* %3
%2786 = and i32 %2785, -1044481
store i32 %2786, i32* %3
%2787 = load i32, i32* %3
%2788 = xor i32 %2787, 81954
store i32 %2788, i32* %3
%2789 = load i32, i32* %3
%2790 = srem i32 %2789, 268435443
store i32 %2790, i32* %3
%2791 = load i32, i32* %3
%2792 = add nsw i32 %2791, 6
store i32 %2792, i32* %3
%2793 = load i32, i32* %3
%2794 = mul nsw i32 %2793, 10
store i32 %2794, i32* %3
%2795 = load i32, i32* %3
%2796 = add nsw i32 %2795, 1
store i32 %2796, i32* %3
%2797 = load i32, i32* %3
%2798 = mul nsw i32 %2797, 2
store i32 %2798, i32* %3
%2799 = load i32, i32* %3
%2800 = sub nsw i32 %2799, 1
store i32 %2800, i32* %3
%2801 = load i32, i32* %3
%2802 = and i32 %2801, -1044481
store i32 %2802, i32* %3
%2803 = load i32, i32* %3
%2804 = xor i32 %2803, 81954
store i32 %2804, i32* %3
%2805 = load i32, i32* %3
%2806 = srem i32 %2805, 268435443
store i32 %2806, i32* %3
%2807 = load i32, i32* %3
%2808 = add nsw i32 %2807, 6
store i32 %2808, i32* %3
%2809 = load i32, i32* %3
%2810 = mul nsw i32 %2809, 10
store i32 %2810, i32* %3
%2811 = load i32, i32* %3
%2812 = add nsw i32 %2811, 1
store i32 %2812, i32* %3
%2813 = load i32, i32* %3
%2814 = mul nsw i32 %2813, 2
store i32 %2814, i32* %3
%2815 = load i32, i32* %3
%2816 = sub nsw i32 %2815, 1
store i32 %2816, i32* %3
%2817 = load i32, i32* %3
%2818 = and i32 %2817, -1044481
store i32 %2818, i32* %3
%2819 = load i32, i32* %3
%2820 = xor i32 %2819, 81954
store i32 %2820, i32* %3
%2821 = load i32, i32* %3
%2822 = srem i32 %2821, 268435443
store i32 %2822, i32* %3
%2823 = load i32, i32* %3
%2824 = add nsw i32 %2823, 6
store i32 %2824, i32* %3
%2825 = load i32, i32* %3
%2826 = mul nsw i32 %2825, 10
store i32 %2826, i32* %3
%2827 = load i32, i32* %3
%2828 = add nsw i32 %2827, 1
store i32 %2828, i32* %3
%2829 = load i32, i32* %3
%2830 = mul nsw i32 %2829, 2
store i32 %2830, i32* %3
%2831 = load i32, i32* %3
%2832 = sub nsw i32 %2831, 1
store i32 %2832, i32* %3
%2833 = load i32, i32* %3
%2834 = and i32 %2833, -1044481
store i32 %2834, i32* %3
%2835 = load i32, i32* %3
%2836 = xor i32 %2835, 81954
store i32 %2836, i32* %3
%2837 = load i32, i32* %3
%2838 = srem i32 %2837, 268435443
store i32 %2838, i32* %3
%2839 = load i32, i32* %3
%2840 = add nsw i32 %2839, 6
store i32 %2840, i32* %3
%2841 = load i32, i32* %3
%2842 = mul nsw i32 %2841, 10
store i32 %2842, i32* %3
%2843 = load i32, i32* %3
%2844 = add nsw i32 %2843, 1
store i32 %2844, i32* %3
%2845 = load i32, i32* %3
%2846 = mul nsw i32 %2845, 2
store i32 %2846, i32* %3
%2847 = load i32, i32* %3
%2848 = sub nsw i32 %2847, 1
store i32 %2848, i32* %3
%2849 = load i32, i32* %3
%2850 = and i32 %2849, -1044481
store i32 %2850, i32* %3
%2851 = load i32, i32* %3
%2852 = xor i32 %2851, 81954
store i32 %2852, i32* %3
%2853 = load i32, i32* %3
%2854 = srem i32 %2853, 268435443
store i32 %2854, i32* %3
%2855 = load i32, i32* %3
%2856 = add nsw i32 %2855, 6
store i32 %2856, i32* %3
%2857 = load i32, i32* %3
%2858 = mul nsw i32 %2857, 10
store i32 %2858, i32* %3
%2859 = load i32, i32* %3
%2860 = add nsw i32 %2859, 1
store i32 %2860, i32* %3
%2861 = load i32, i32* %3
%2862 = mul nsw i32 %2861, 2
store i32 %2862, i32* %3
%2863 = load i32, i32* %3
%2864 = sub nsw i32 %2863, 1
store i32 %2864, i32* %3
%2865 = load i32, i32* %3
%2866 = and i32 %2865, -1044481
store i32 %2866, i32* %3
%2867 = load i32, i32* %3
%2868 = xor i32 %2867, 81954
store i32 %2868, i32* %3
%2869 = load i32, i32* %3
%2870 = srem i32 %2869, 268435443
store i32 %2870, i32* %3
%2871 = load i32, i32* %3
%2872 = add nsw i32 %2871, 6
store i32 %2872, i32* %3
%2873 = load i32, i32* %3
%2874 = mul nsw i32 %2873, 10
store i32 %2874, i32* %3
%2875 = load i32, i32* %3
%2876 = add nsw i32 %2875, 1
store i32 %2876, i32* %3
%2877 = load i32, i32* %3
%2878 = mul nsw i32 %2877, 2
store i32 %2878, i32* %3
%2879 = load i32, i32* %3
%2880 = sub nsw i32 %2879, 1
store i32 %2880, i32* %3
%2881 = load i32, i32* %3
%2882 = and i32 %2881, -1044481
store i32 %2882, i32* %3
%2883 = load i32, i32* %3
%2884 = xor i32 %2883, 81954
store i32 %2884, i32* %3
%2885 = load i32, i32* %3
%2886 = srem i32 %2885, 268435443
store i32 %2886, i32* %3
%2887 = load i32, i32* %3
%2888 = add nsw i32 %2887, 6
store i32 %2888, i32* %3
%2889 = load i32, i32* %3
%2890 = mul nsw i32 %2889, 10
store i32 %2890, i32* %3
%2891 = load i32, i32* %3
%2892 = add nsw i32 %2891, 1
store i32 %2892, i32* %3
%2893 = load i32, i32* %3
%2894 = mul nsw i32 %2893, 2
store i32 %2894, i32* %3
%2895 = load i32, i32* %3
%2896 = sub nsw i32 %2895, 1
store i32 %2896, i32* %3
%2897 = load i32, i32* %3
%2898 = and i32 %2897, -1044481
store i32 %2898, i32* %3
%2899 = load i32, i32* %3
%2900 = xor i32 %2899, 81954
store i32 %2900, i32* %3
%2901 = load i32, i32* %3
%2902 = srem i32 %2901, 268435443
store i32 %2902, i32* %3
%2903 = load i32, i32* %3
%2904 = add nsw i32 %2903, 6
store i32 %2904, i32* %3
%2905 = load i32, i32* %3
%2906 = mul nsw i32 %2905, 10
store i32 %2906, i32* %3
%2907 = load i32, i32* %3
%2908 = add nsw i32 %2907, 1
store i32 %2908, i32* %3
%2909 = load i32, i32* %3
%2910 = mul nsw i32 %2909, 2
store i32 %2910, i32* %3
%2911 = load i32, i32* %3
%2912 = sub nsw i32 %2911, 1
store i32 %2912, i32* %3
%2913 = load i32, i32* %3
%2914 = and i32 %2913, -1044481
store i32 %2914, i32* %3
%2915 = load i32, i32* %3
%2916 = xor i32 %2915, 81954
store i32 %2916, i32* %3
%2917 = load i32, i32* %3
%2918 = srem i32 %2917, 268435443
store i32 %2918, i32* %3
%2919 = load i32, i32* %3
%2920 = add nsw i32 %2919, 6
store i32 %2920, i32* %3
%2921 = load i32, i32* %3
%2922 = mul nsw i32 %2921, 10
store i32 %2922, i32* %3
%2923 = load i32, i32* %3
%2924 = add nsw i32 %2923, 1
store i32 %2924, i32* %3
%2925 = load i32, i32* %3
%2926 = mul nsw i32 %2925, 2
store i32 %2926, i32* %3
%2927 = load i32, i32* %3
%2928 = sub nsw i32 %2927, 1
store i32 %2928, i32* %3
%2929 = load i32, i32* %3
%2930 = and i32 %2929, -1044481
store i32 %2930, i32* %3
%2931 = load i32, i32* %3
%2932 = xor i32 %2931, 81954
store i32 %2932, i32* %3
%2933 = load i32, i32* %3
%2934 = srem i32 %2933, 268435443
store i32 %2934, i32* %3
%2935 = load i32, i32* %3
%2936 = add nsw i32 %2935, 6
store i32 %2936, i32* %3
%2937 = load i32, i32* %3
%2938 = mul nsw i32 %2937, 10
store i32 %2938, i32* %3
%2939 = load i32, i32* %3
%2940 = add nsw i32 %2939, 1
store i32 %2940, i32* %3
%2941 = load i32, i32* %3
%2942 = mul nsw i32 %2941, 2
store i32 %2942, i32* %3
%2943 = load i32, i32* %3
%2944 = sub nsw i32 %2943, 1
store i32 %2944, i32* %3
%2945 = load i32, i32* %3
%2946 = and i32 %2945, -1044481
store i32 %2946, i32* %3
%2947 = load i32, i32* %3
%2948 = xor i32 %2947, 81954
store i32 %2948, i32* %3
%2949 = load i32, i32* %3
%2950 = srem i32 %2949, 268435443
store i32 %2950, i32* %3
%2951 = load i32, i32* %3
%2952 = add nsw i32 %2951, 6
store i32 %2952, i32* %3
%2953 = load i32, i32* %3
%2954 = mul nsw i32 %2953, 10
store i32 %2954, i32* %3
%2955 = load i32, i32* %3
%2956 = add nsw i32 %2955, 1
store i32 %2956, i32* %3
%2957 = load i32, i32* %3
%2958 = mul nsw i32 %2957, 2
store i32 %2958, i32* %3
%2959 = load i32, i32* %3
%2960 = sub nsw i32 %2959, 1
store i32 %2960, i32* %3
%2961 = load i32, i32* %3
%2962 = and i32 %2961, -1044481
store i32 %2962, i32* %3
%2963 = load i32, i32* %3
%2964 = xor i32 %2963, 81954
store i32 %2964, i32* %3
%2965 = load i32, i32* %3
%2966 = srem i32 %2965, 268435443
store i32 %2966, i32* %3
%2967 = load i32, i32* %3
%2968 = add nsw i32 %2967, 6
store i32 %2968, i32* %3
%2969 = load i32, i32* %3
%2970 = mul nsw i32 %2969, 10
store i32 %2970, i32* %3
%2971 = load i32, i32* %3
%2972 = add nsw i32 %2971, 1
store i32 %2972, i32* %3
%2973 = load i32, i32* %3
%2974 = mul nsw i32 %2973, 2
store i32 %2974, i32* %3
%2975 = load i32, i32* %3
%2976 = sub nsw i32 %2975, 1
store i32 %2976, i32* %3
%2977 = load i32, i32* %3
%2978 = and i32 %2977, -1044481
store i32 %2978, i32* %3
%2979 = load i32, i32* %3
%2980 = xor i32 %2979, 81954
store i32 %2980, i32* %3
%2981 = load i32, i32* %3
%2982 = srem i32 %2981, 268435443
store i32 %2982, i32* %3
%2983 = load i32, i32* %3
%2984 = add nsw i32 %2983, 6
store i32 %2984, i32* %3
%2985 = load i32, i32* %3
%2986 = mul nsw i32 %2985, 10
store i32 %2986, i32* %3
%2987 = load i32, i32* %3
%2988 = add nsw i32 %2987, 1
store i32 %2988, i32* %3
%2989 = load i32, i32* %3
%2990 = mul nsw i32 %2989, 2
store i32 %2990, i32* %3
%2991 = load i32, i32* %3
%2992 = sub nsw i32 %2991, 1
store i32 %2992, i32* %3
%2993 = load i32, i32* %3
%2994 = and i32 %2993, -1044481
store i32 %2994, i32* %3
%2995 = load i32, i32* %3
%2996 = xor i32 %2995, 81954
store i32 %2996, i32* %3
%2997 = load i32, i32* %3
%2998 = srem i32 %2997, 268435443
store i32 %2998, i32* %3
%2999 = load i32, i32* %3
%3000 = add nsw i32 %2999, 6
store i32 %3000, i32* %3
%3001 = load i32, i32* %3
%3002 = mul nsw i32 %3001, 10
store i32 %3002, i32* %3
%3003 = load i32, i32* %3
%3004 = add nsw i32 %3003, 1
store i32 %3004, i32* %3
%3005 = load i32, i32* %3
%3006 = mul nsw i32 %3005, 2
store i32 %3006, i32* %3
%3007 = load i32, i32* %3
%3008 = sub nsw i32 %3007, 1
store i32 %3008, i32* %3
%3009 = load i32, i32* %3
%3010 = and i32 %3009, -1044481
store i32 %3010, i32* %3
%3011 = load i32, i32* %3
%3012 = xor i32 %3011, 81954
store i32 %3012, i32* %3
%3013 = load i32, i32* %3
%3014 = srem i32 %3013, 268435443
store i32 %3014, i32* %3
%3015 = load i32, i32* %3
%3016 = add nsw i32 %3015, 6
store i32 %3016, i32* %3
%3017 = load i32, i32* %3
%3018 = mul nsw i32 %3017, 10
store i32 %3018, i32* %3
%3019 = load i32, i32* %3
%3020 = add nsw i32 %3019, 1
store i32 %3020, i32* %3
%3021 = load i32, i32* %3
%3022 = mul nsw i32 %3021, 2
store i32 %3022, i32* %3
%3023 = load i32, i32* %3
%3024 = sub nsw i32 %3023, 1
store i32 %3024, i32* %3
%3025 = load i32, i32* %3
%3026 = and i32 %3025, -1044481
store i32 %3026, i32* %3
%3027 = load i32, i32* %3
%3028 = xor i32 %3027, 81954
store i32 %3028, i32* %3
%3029 = load i32, i32* %3
%3030 = srem i32 %3029, 268435443
store i32 %3030, i32* %3
%3031 = load i32, i32* %3
%3032 = add nsw i32 %3031, 6
store i32 %3032, i32* %3
%3033 = load i32, i32* %3
%3034 = mul nsw i32 %3033, 10
store i32 %3034, i32* %3
%3035 = load i32, i32* %3
%3036 = add nsw i32 %3035, 1
store i32 %3036, i32* %3
%3037 = load i32, i32* %3
%3038 = mul nsw i32 %3037, 2
store i32 %3038, i32* %3
%3039 = load i32, i32* %3
%3040 = sub nsw i32 %3039, 1
store i32 %3040, i32* %3
%3041 = load i32, i32* %3
%3042 = and i32 %3041, -1044481
store i32 %3042, i32* %3
%3043 = load i32, i32* %3
%3044 = xor i32 %3043, 81954
store i32 %3044, i32* %3
%3045 = load i32, i32* %3
%3046 = srem i32 %3045, 268435443
store i32 %3046, i32* %3
%3047 = load i32, i32* %3
%3048 = add nsw i32 %3047, 6
store i32 %3048, i32* %3
%3049 = load i32, i32* %3
%3050 = mul nsw i32 %3049, 10
store i32 %3050, i32* %3
%3051 = load i32, i32* %3
%3052 = add nsw i32 %3051, 1
store i32 %3052, i32* %3
%3053 = load i32, i32* %3
%3054 = mul nsw i32 %3053, 2
store i32 %3054, i32* %3
%3055 = load i32, i32* %3
%3056 = sub nsw i32 %3055, 1
store i32 %3056, i32* %3
%3057 = load i32, i32* %3
%3058 = and i32 %3057, -1044481
store i32 %3058, i32* %3
%3059 = load i32, i32* %3
%3060 = xor i32 %3059, 81954
store i32 %3060, i32* %3
%3061 = load i32, i32* %3
%3062 = srem i32 %3061, 268435443
store i32 %3062, i32* %3
%3063 = load i32, i32* %3
%3064 = add nsw i32 %3063, 6
store i32 %3064, i32* %3
%3065 = load i32, i32* %3
%3066 = mul nsw i32 %3065, 10
store i32 %3066, i32* %3
%3067 = load i32, i32* %3
%3068 = add nsw i32 %3067, 1
store i32 %3068, i32* %3
%3069 = load i32, i32* %3
%3070 = mul nsw i32 %3069, 2
store i32 %3070, i32* %3
%3071 = load i32, i32* %3
%3072 = sub nsw i32 %3071, 1
store i32 %3072, i32* %3
%3073 = load i32, i32* %3
%3074 = and i32 %3073, -1044481
store i32 %3074, i32* %3
%3075 = load i32, i32* %3
%3076 = xor i32 %3075, 81954
store i32 %3076, i32* %3
%3077 = load i32, i32* %3
%3078 = srem i32 %3077, 268435443
store i32 %3078, i32* %3
%3079 = load i32, i32* %3
%3080 = add nsw i32 %3079, 6
store i32 %3080, i32* %3
%3081 = load i32, i32* %3
%3082 = mul nsw i32 %3081, 10
store i32 %3082, i32* %3
%3083 = load i32, i32* %3
%3084 = add nsw i32 %3083, 1
store i32 %3084, i32* %3
%3085 = load i32, i32* %3
%3086 = mul nsw i32 %3085, 2
store i32 %3086, i32* %3
%3087 = load i32, i32* %3
%3088 = sub nsw i32 %3087, 1
store i32 %3088, i32* %3
%3089 = load i32, i32* %3
%3090 = and i32 %3089, -1044481
store i32 %3090, i32* %3
%3091 = load i32, i32* %3
%3092 = xor i32 %3091, 81954
store i32 %3092, i32* %3
%3093 = load i32, i32* %3
%3094 = srem i32 %3093, 268435443
store i32 %3094, i32* %3
%3095 = load i32, i32* %3
%3096 = add nsw i32 %3095, 6
store i32 %3096, i32* %3
%3097 = load i32, i32* %3
%3098 = mul nsw i32 %3097, 10
store i32 %3098, i32* %3
%3099 = load i32, i32* %3
%3100 = add nsw i32 %3099, 1
store i32 %3100, i32* %3
%3101 = load i32, i32* %3
%3102 = mul nsw i32 %3101, 2
store i32 %3102, i32* %3
%3103 = load i32, i32* %3
%3104 = sub nsw i32 %3103, 1
store i32 %3104, i32* %3
%3105 = load i32, i32* %3
%3106 = and i32 %3105, -1044481
store i32 %3106, i32* %3
%3107 = load i32, i32* %3
%3108 = xor i32 %3107, 81954
store i32 %3108, i32* %3
%3109 = load i32, i32* %3
%3110 = srem i32 %3109, 268435443
store i32 %3110, i32* %3
%3111 = load i32, i32* %3
%3112 = add nsw i32 %3111, 6
store i32 %3112, i32* %3
%3113 = load i32, i32* %3
%3114 = mul nsw i32 %3113, 10
store i32 %3114, i32* %3
%3115 = load i32, i32* %3
%3116 = add nsw i32 %3115, 1
store i32 %3116, i32* %3
%3117 = load i32, i32* %3
%3118 = mul nsw i32 %3117, 2
store i32 %3118, i32* %3
%3119 = load i32, i32* %3
%3120 = sub nsw i32 %3119, 1
store i32 %3120, i32* %3
%3121 = load i32, i32* %3
%3122 = and i32 %3121, -1044481
store i32 %3122, i32* %3
%3123 = load i32, i32* %3
%3124 = xor i32 %3123, 81954
store i32 %3124, i32* %3
%3125 = load i32, i32* %3
%3126 = srem i32 %3125, 268435443
store i32 %3126, i32* %3
%3127 = load i32, i32* %3
%3128 = add nsw i32 %3127, 6
store i32 %3128, i32* %3
%3129 = load i32, i32* %3
%3130 = mul nsw i32 %3129, 10
store i32 %3130, i32* %3
%3131 = load i32, i32* %3
%3132 = add nsw i32 %3131, 1
store i32 %3132, i32* %3
%3133 = load i32, i32* %3
%3134 = mul nsw i32 %3133, 2
store i32 %3134, i32* %3
%3135 = load i32, i32* %3
%3136 = sub nsw i32 %3135, 1
store i32 %3136, i32* %3
%3137 = load i32, i32* %3
%3138 = and i32 %3137, -1044481
store i32 %3138, i32* %3
%3139 = load i32, i32* %3
%3140 = xor i32 %3139, 81954
store i32 %3140, i32* %3
%3141 = load i32, i32* %3
%3142 = srem i32 %3141, 268435443
store i32 %3142, i32* %3
%3143 = load i32, i32* %3
%3144 = add nsw i32 %3143, 6
store i32 %3144, i32* %3
%3145 = load i32, i32* %3
%3146 = mul nsw i32 %3145, 10
store i32 %3146, i32* %3
%3147 = load i32, i32* %3
%3148 = add nsw i32 %3147, 1
store i32 %3148, i32* %3
%3149 = load i32, i32* %3
%3150 = mul nsw i32 %3149, 2
store i32 %3150, i32* %3
%3151 = load i32, i32* %3
%3152 = sub nsw i32 %3151, 1
store i32 %3152, i32* %3
%3153 = load i32, i32* %3
%3154 = and i32 %3153, -1044481
store i32 %3154, i32* %3
%3155 = load i32, i32* %3
%3156 = xor i32 %3155, 81954
store i32 %3156, i32* %3
%3157 = load i32, i32* %3
%3158 = srem i32 %3157, 268435443
store i32 %3158, i32* %3
%3159 = load i32, i32* %3
%3160 = add nsw i32 %3159, 6
store i32 %3160, i32* %3
%3161 = load i32, i32* %3
%3162 = mul nsw i32 %3161, 10
store i32 %3162, i32* %3
%3163 = load i32, i32* %3
%3164 = add nsw i32 %3163, 1
store i32 %3164, i32* %3
%3165 = load i32, i32* %3
%3166 = mul nsw i32 %3165, 2
store i32 %3166, i32* %3
%3167 = load i32, i32* %3
%3168 = sub nsw i32 %3167, 1
store i32 %3168, i32* %3
%3169 = load i32, i32* %3
%3170 = and i32 %3169, -1044481
store i32 %3170, i32* %3
%3171 = load i32, i32* %3
%3172 = xor i32 %3171, 81954
store i32 %3172, i32* %3
%3173 = load i32, i32* %3
%3174 = srem i32 %3173, 268435443
store i32 %3174, i32* %3
%3175 = load i32, i32* %3
%3176 = add nsw i32 %3175, 6
store i32 %3176, i32* %3
%3177 = load i32, i32* %3
%3178 = mul nsw i32 %3177, 10
store i32 %3178, i32* %3
%3179 = load i32, i32* %3
%3180 = add nsw i32 %3179, 1
store i32 %3180, i32* %3
%3181 = load i32, i32* %3
%3182 = mul nsw i32 %3181, 2
store i32 %3182, i32* %3
%3183 = load i32, i32* %3
%3184 = sub nsw i32 %3183, 1
store i32 %3184, i32* %3
%3185 = load i32, i32* %3
%3186 = and i32 %3185, -1044481
store i32 %3186, i32* %3
%3187 = load i32, i32* %3
%3188 = xor i32 %3187, 81954
store i32 %3188, i32* %3
%3189 = load i32, i32* %3
%3190 = srem i32 %3189, 268435443
store i32 %3190, i32* %3
%3191 = load i32, i32* %3
%3192 = add nsw i32 %3191, 6
store i32 %3192, i32* %3
%3193 = load i32, i32* %3
%3194 = mul nsw i32 %3193, 10
store i32 %3194, i32* %3
%3195 = load i32, i32* %3
%3196 = add nsw i32 %3195, 1
store i32 %3196, i32* %3
%3197 = load i32, i32* %3
%3198 = mul nsw i32 %3197, 2
store i32 %3198, i32* %3
%3199 = load i32, i32* %3
%3200 = sub nsw i32 %3199, 1
store i32 %3200, i32* %3
%3201 = load i32, i32* %3
%3202 = and i32 %3201, -1044481
store i32 %3202, i32* %3
%3203 = load i32, i32* %3
%3204 = xor i32 %3203, 81954
store i32 %3204, i32* %3
%3205 = load i32, i32* %3
%3206 = srem i32 %3205, 268435443
store i32 %3206, i32* %3
%3207 = load i32, i32* %3
%3208 = add nsw i32 %3207, 6
store i32 %3208, i32* %3
%3209 = load i32, i32* %3
%3210 = mul nsw i32 %3209, 10
store i32 %3210, i32* %3
%3211 = load i32, i32* %3
%3212 = add nsw i32 %3211, 1
store i32 %3212, i32* %3
%3213 = load i32, i32* %3
%3214 = mul nsw i32 %3213, 2
store i32 %3214, i32* %3
%3215 = load i32, i32* %3
%3216 = sub nsw i32 %3215, 1
store i32 %3216, i32* %3
%3217 = load i32, i32* %3
%3218 = and i32 %3217, -1044481
store i32 %3218, i32* %3
%3219 = load i32, i32* %3
%3220 = xor i32 %3219, 81954
store i32 %3220, i32* %3
%3221 = load i32, i32* %3
%3222 = srem i32 %3221, 268435443
store i32 %3222, i32* %3
%3223 = load i32, i32* %3
%3224 = add nsw i32 %3223, 6
store i32 %3224, i32* %3
%3225 = load i32, i32* %3
%3226 = mul nsw i32 %3225, 10
store i32 %3226, i32* %3
%3227 = load i32, i32* %3
%3228 = add nsw i32 %3227, 1
store i32 %3228, i32* %3
%3229 = load i32, i32* %3
%3230 = mul nsw i32 %3229, 2
store i32 %3230, i32* %3
%3231 = load i32, i32* %3
%3232 = sub nsw i32 %3231, 1
store i32 %3232, i32* %3
%3233 = load i32, i32* %3
%3234 = and i32 %3233, -1044481
store i32 %3234, i32* %3
%3235 = load i32, i32* %3
%3236 = xor i32 %3235, 81954
store i32 %3236, i32* %3
%3237 = load i32, i32* %3
%3238 = srem i32 %3237, 268435443
store i32 %3238, i32* %3
%3239 = load i32, i32* %3
%3240 = add nsw i32 %3239, 6
store i32 %3240, i32* %3
%3241 = load i32, i32* %3
%3242 = mul nsw i32 %3241, 10
store i32 %3242, i32* %3
%3243 = load i32, i32* %3
%3244 = add nsw i32 %3243, 1
store i32 %3244, i32* %3
%3245 = load i32, i32* %3
%3246 = mul nsw i32 %3245, 2
store i32 %3246, i32* %3
%3247 = load i32, i32* %3
%3248 = sub nsw i32 %3247, 1
store i32 %3248, i32* %3
%3249 = load i32, i32* %3
%3250 = and i32 %3249, -1044481
store i32 %3250, i32* %3
%3251 = load i32, i32* %3
%3252 = xor i32 %3251, 81954
store i32 %3252, i32* %3
%3253 = load i32, i32* %3
%3254 = srem i32 %3253, 268435443
store i32 %3254, i32* %3
%3255 = load i32, i32* %3
%3256 = add nsw i32 %3255, 6
store i32 %3256, i32* %3
%3257 = load i32, i32* %3
%3258 = mul nsw i32 %3257, 10
store i32 %3258, i32* %3
%3259 = load i32, i32* %3
%3260 = add nsw i32 %3259, 1
store i32 %3260, i32* %3
%3261 = load i32, i32* %3
%3262 = mul nsw i32 %3261, 2
store i32 %3262, i32* %3
%3263 = load i32, i32* %3
%3264 = sub nsw i32 %3263, 1
store i32 %3264, i32* %3
%3265 = load i32, i32* %3
%3266 = and i32 %3265, -1044481
store i32 %3266, i32* %3
%3267 = load i32, i32* %3
%3268 = xor i32 %3267, 81954
store i32 %3268, i32* %3
%3269 = load i32, i32* %3
%3270 = srem i32 %3269, 268435443
store i32 %3270, i32* %3
%3271 = load i32, i32* %3
%3272 = add nsw i32 %3271, 6
store i32 %3272, i32* %3
%3273 = load i32, i32* %3
%3274 = mul nsw i32 %3273, 10
store i32 %3274, i32* %3
%3275 = load i32, i32* %3
%3276 = add nsw i32 %3275, 1
store i32 %3276, i32* %3
%3277 = load i32, i32* %3
%3278 = mul nsw i32 %3277, 2
store i32 %3278, i32* %3
%3279 = load i32, i32* %3
%3280 = sub nsw i32 %3279, 1
store i32 %3280, i32* %3
%3281 = load i32, i32* %3
%3282 = and i32 %3281, -1044481
store i32 %3282, i32* %3
%3283 = load i32, i32* %3
%3284 = xor i32 %3283, 81954
store i32 %3284, i32* %3
%3285 = load i32, i32* %3
%3286 = srem i32 %3285, 268435443
store i32 %3286, i32* %3
%3287 = load i32, i32* %3
%3288 = add nsw i32 %3287, 6
store i32 %3288, i32* %3
%3289 = load i32, i32* %3
%3290 = mul nsw i32 %3289, 10
store i32 %3290, i32* %3
%3291 = load i32, i32* %3
%3292 = add nsw i32 %3291, 1
store i32 %3292, i32* %3
%3293 = load i32, i32* %3
%3294 = mul nsw i32 %3293, 2
store i32 %3294, i32* %3
%3295 = load i32, i32* %3
%3296 = sub nsw i32 %3295, 1
store i32 %3296, i32* %3
%3297 = load i32, i32* %3
%3298 = and i32 %3297, -1044481
store i32 %3298, i32* %3
%3299 = load i32, i32* %3
%3300 = xor i32 %3299, 81954
store i32 %3300, i32* %3
%3301 = load i32, i32* %3
%3302 = srem i32 %3301, 268435443
store i32 %3302, i32* %3
%3303 = load i32, i32* %3
%3304 = add nsw i32 %3303, 6
store i32 %3304, i32* %3
%3305 = load i32, i32* %3
%3306 = mul nsw i32 %3305, 10
store i32 %3306, i32* %3
%3307 = load i32, i32* %3
%3308 = add nsw i32 %3307, 1
store i32 %3308, i32* %3
%3309 = load i32, i32* %3
%3310 = mul nsw i32 %3309, 2
store i32 %3310, i32* %3
%3311 = load i32, i32* %3
%3312 = sub nsw i32 %3311, 1
store i32 %3312, i32* %3
%3313 = load i32, i32* %3
%3314 = and i32 %3313, -1044481
store i32 %3314, i32* %3
%3315 = load i32, i32* %3
%3316 = xor i32 %3315, 81954
store i32 %3316, i32* %3
%3317 = load i32, i32* %3
%3318 = srem i32 %3317, 268435443
store i32 %3318, i32* %3
%3319 = load i32, i32* %3
%3320 = add nsw i32 %3319, 6
store i32 %3320, i32* %3
%3321 = load i32, i32* %3
%3322 = mul nsw i32 %3321, 10
store i32 %3322, i32* %3
%3323 = load i32, i32* %3
%3324 = add nsw i32 %3323, 1
store i32 %3324, i32* %3
%3325 = load i32, i32* %3
%3326 = mul nsw i32 %3325, 2
store i32 %3326, i32* %3
%3327 = load i32, i32* %3
%3328 = sub nsw i32 %3327, 1
store i32 %3328, i32* %3
%3329 = load i32, i32* %3
%3330 = and i32 %3329, -1044481
store i32 %3330, i32* %3
%3331 = load i32, i32* %3
%3332 = xor i32 %3331, 81954
store i32 %3332, i32* %3
%3333 = load i32, i32* %3
%3334 = srem i32 %3333, 268435443
store i32 %3334, i32* %3
%3335 = load i32, i32* %3
%3336 = add nsw i32 %3335, 6
store i32 %3336, i32* %3
%3337 = load i32, i32* %3
%3338 = mul nsw i32 %3337, 10
store i32 %3338, i32* %3
%3339 = load i32, i32* %3
%3340 = add nsw i32 %3339, 1
store i32 %3340, i32* %3
%3341 = load i32, i32* %3
%3342 = mul nsw i32 %3341, 2
store i32 %3342, i32* %3
%3343 = load i32, i32* %3
%3344 = sub nsw i32 %3343, 1
store i32 %3344, i32* %3
%3345 = load i32, i32* %3
%3346 = and i32 %3345, -1044481
store i32 %3346, i32* %3
%3347 = load i32, i32* %3
%3348 = xor i32 %3347, 81954
store i32 %3348, i32* %3
%3349 = load i32, i32* %3
%3350 = srem i32 %3349, 268435443
store i32 %3350, i32* %3
%3351 = load i32, i32* %3
%3352 = add nsw i32 %3351, 6
store i32 %3352, i32* %3
%3353 = load i32, i32* %3
%3354 = mul nsw i32 %3353, 10
store i32 %3354, i32* %3
%3355 = load i32, i32* %3
%3356 = add nsw i32 %3355, 1
store i32 %3356, i32* %3
%3357 = load i32, i32* %3
%3358 = mul nsw i32 %3357, 2
store i32 %3358, i32* %3
%3359 = load i32, i32* %3
%3360 = sub nsw i32 %3359, 1
store i32 %3360, i32* %3
%3361 = load i32, i32* %3
%3362 = and i32 %3361, -1044481
store i32 %3362, i32* %3
%3363 = load i32, i32* %3
%3364 = xor i32 %3363, 81954
store i32 %3364, i32* %3
%3365 = load i32, i32* %3
%3366 = srem i32 %3365, 268435443
store i32 %3366, i32* %3
%3367 = load i32, i32* %3
%3368 = add nsw i32 %3367, 6
store i32 %3368, i32* %3
%3369 = load i32, i32* %3
%3370 = mul nsw i32 %3369, 10
store i32 %3370, i32* %3
%3371 = load i32, i32* %3
%3372 = add nsw i32 %3371, 1
store i32 %3372, i32* %3
%3373 = load i32, i32* %3
%3374 = mul nsw i32 %3373, 2
store i32 %3374, i32* %3
%3375 = load i32, i32* %3
%3376 = sub nsw i32 %3375, 1
store i32 %3376, i32* %3
%3377 = load i32, i32* %3
%3378 = and i32 %3377, -1044481
store i32 %3378, i32* %3
%3379 = load i32, i32* %3
%3380 = xor i32 %3379, 81954
store i32 %3380, i32* %3
%3381 = load i32, i32* %3
%3382 = srem i32 %3381, 268435443
store i32 %3382, i32* %3
%3383 = load i32, i32* %3
%3384 = add nsw i32 %3383, 6
store i32 %3384, i32* %3
%3385 = load i32, i32* %3
%3386 = mul nsw i32 %3385, 10
store i32 %3386, i32* %3
%3387 = load i32, i32* %3
%3388 = add nsw i32 %3387, 1
store i32 %3388, i32* %3
%3389 = load i32, i32* %3
%3390 = mul nsw i32 %3389, 2
store i32 %3390, i32* %3
%3391 = load i32, i32* %3
%3392 = sub nsw i32 %3391, 1
store i32 %3392, i32* %3
%3393 = load i32, i32* %3
%3394 = and i32 %3393, -1044481
store i32 %3394, i32* %3
%3395 = load i32, i32* %3
%3396 = xor i32 %3395, 81954
store i32 %3396, i32* %3
%3397 = load i32, i32* %3
%3398 = srem i32 %3397, 268435443
store i32 %3398, i32* %3
%3399 = load i32, i32* %3
%3400 = add nsw i32 %3399, 6
store i32 %3400, i32* %3
%3401 = load i32, i32* %3
%3402 = mul nsw i32 %3401, 10
store i32 %3402, i32* %3
%3403 = load i32, i32* %3
%3404 = add nsw i32 %3403, 1
store i32 %3404, i32* %3
%3405 = load i32, i32* %3
%3406 = mul nsw i32 %3405, 2
store i32 %3406, i32* %3
%3407 = load i32, i32* %3
%3408 = sub nsw i32 %3407, 1
store i32 %3408, i32* %3
%3409 = load i32, i32* %3
%3410 = and i32 %3409, -1044481
store i32 %3410, i32* %3
%3411 = load i32, i32* %3
%3412 = xor i32 %3411, 81954
store i32 %3412, i32* %3
%3413 = load i32, i32* %3
%3414 = srem i32 %3413, 268435443
store i32 %3414, i32* %3
%3415 = load i32, i32* %3
%3416 = add nsw i32 %3415, 6
store i32 %3416, i32* %3
%3417 = load i32, i32* %3
%3418 = mul nsw i32 %3417, 10
store i32 %3418, i32* %3
%3419 = load i32, i32* %3
%3420 = add nsw i32 %3419, 1
store i32 %3420, i32* %3
%3421 = load i32, i32* %3
%3422 = mul nsw i32 %3421, 2
store i32 %3422, i32* %3
%3423 = load i32, i32* %3
%3424 = sub nsw i32 %3423, 1
store i32 %3424, i32* %3
%3425 = load i32, i32* %3
%3426 = and i32 %3425, -1044481
store i32 %3426, i32* %3
%3427 = load i32, i32* %3
%3428 = xor i32 %3427, 81954
store i32 %3428, i32* %3
%3429 = load i32, i32* %3
%3430 = srem i32 %3429, 268435443
store i32 %3430, i32* %3
%3431 = load i32, i32* %3
%3432 = add nsw i32 %3431, 6
store i32 %3432, i32* %3
%3433 = load i32, i32* %3
%3434 = mul nsw i32 %3433, 10
store i32 %3434, i32* %3
%3435 = load i32, i32* %3
%3436 = add nsw i32 %3435, 1
store i32 %3436, i32* %3
%3437 = load i32, i32* %3
%3438 = mul nsw i32 %3437, 2
store i32 %3438, i32* %3
%3439 = load i32, i32* %3
%3440 = sub nsw i32 %3439, 1
store i32 %3440, i32* %3
%3441 = load i32, i32* %3
%3442 = and i32 %3441, -1044481
store i32 %3442, i32* %3
%3443 = load i32, i32* %3
%3444 = xor i32 %3443, 81954
store i32 %3444, i32* %3
%3445 = load i32, i32* %3
%3446 = srem i32 %3445, 268435443
store i32 %3446, i32* %3
%3447 = load i32, i32* %3
%3448 = add nsw i32 %3447, 6
store i32 %3448, i32* %3
%3449 = load i32, i32* %3
%3450 = mul nsw i32 %3449, 10
store i32 %3450, i32* %3
%3451 = load i32, i32* %3
%3452 = add nsw i32 %3451, 1
store i32 %3452, i32* %3
%3453 = load i32, i32* %3
%3454 = mul nsw i32 %3453, 2
store i32 %3454, i32* %3
%3455 = load i32, i32* %3
%3456 = sub nsw i32 %3455, 1
store i32 %3456, i32* %3
%3457 = load i32, i32* %3
%3458 = and i32 %3457, -1044481
store i32 %3458, i32* %3
%3459 = load i32, i32* %3
%3460 = xor i32 %3459, 81954
store i32 %3460, i32* %3
%3461 = load i32, i32* %3
%3462 = srem i32 %3461, 268435443
store i32 %3462, i32* %3
%3463 = load i32, i32* %3
%3464 = add nsw i32 %3463, 6
store i32 %3464, i32* %3
%3465 = load i32, i32* %3
%3466 = mul nsw i32 %3465, 10
store i32 %3466, i32* %3
%3467 = load i32, i32* %3
%3468 = add nsw i32 %3467, 1
store i32 %3468, i32* %3
%3469 = load i32, i32* %3
%3470 = mul nsw i32 %3469, 2
store i32 %3470, i32* %3
%3471 = load i32, i32* %3
%3472 = sub nsw i32 %3471, 1
store i32 %3472, i32* %3
%3473 = load i32, i32* %3
%3474 = and i32 %3473, -1044481
store i32 %3474, i32* %3
%3475 = load i32, i32* %3
%3476 = xor i32 %3475, 81954
store i32 %3476, i32* %3
%3477 = load i32, i32* %3
%3478 = srem i32 %3477, 268435443
store i32 %3478, i32* %3
%3479 = load i32, i32* %3
%3480 = add nsw i32 %3479, 6
store i32 %3480, i32* %3
%3481 = load i32, i32* %3
%3482 = mul nsw i32 %3481, 10
store i32 %3482, i32* %3
%3483 = load i32, i32* %3
%3484 = add nsw i32 %3483, 1
store i32 %3484, i32* %3
%3485 = load i32, i32* %3
%3486 = mul nsw i32 %3485, 2
store i32 %3486, i32* %3
%3487 = load i32, i32* %3
%3488 = sub nsw i32 %3487, 1
store i32 %3488, i32* %3
%3489 = load i32, i32* %3
%3490 = and i32 %3489, -1044481
store i32 %3490, i32* %3
%3491 = load i32, i32* %3
%3492 = xor i32 %3491, 81954
store i32 %3492, i32* %3
%3493 = load i32, i32* %3
%3494 = srem i32 %3493, 268435443
store i32 %3494, i32* %3
%3495 = load i32, i32* %3
%3496 = add nsw i32 %3495, 6
store i32 %3496, i32* %3
%3497 = load i32, i32* %3
%3498 = mul nsw i32 %3497, 10
store i32 %3498, i32* %3
%3499 = load i32, i32* %3
%3500 = add nsw i32 %3499, 1
store i32 %3500, i32* %3
%3501 = load i32, i32* %3
%3502 = mul nsw i32 %3501, 2
store i32 %3502, i32* %3
%3503 = load i32, i32* %3
%3504 = sub nsw i32 %3503, 1
store i32 %3504, i32* %3
%3505 = load i32, i32* %3
%3506 = and i32 %3505, -1044481
store i32 %3506, i32* %3
%3507 = load i32, i32* %3
%3508 = xor i32 %3507, 81954
store i32 %3508, i32* %3
%3509 = load i32, i32* %3
%3510 = srem i32 %3509, 268435443
store i32 %3510, i32* %3
%3511 = load i32, i32* %3
%3512 = add nsw i32 %3511, 6
store i32 %3512, i32* %3
%3513 = load i32, i32* %3
%3514 = mul nsw i32 %3513, 10
store i32 %3514, i32* %3
%3515 = load i32, i32* %3
%3516 = add nsw i32 %3515, 1
store i32 %3516, i32* %3
%3517 = load i32, i32* %3
%3518 = mul nsw i32 %3517, 2
store i32 %3518, i32* %3
%3519 = load i32, i32* %3
%3520 = sub nsw i32 %3519, 1
store i32 %3520, i32* %3
%3521 = load i32, i32* %3
%3522 = and i32 %3521, -1044481
store i32 %3522, i32* %3
%3523 = load i32, i32* %3
%3524 = xor i32 %3523, 81954
store i32 %3524, i32* %3
%3525 = load i32, i32* %3
%3526 = srem i32 %3525, 268435443
store i32 %3526, i32* %3
%3527 = load i32, i32* %3
%3528 = add nsw i32 %3527, 6
store i32 %3528, i32* %3
%3529 = load i32, i32* %3
%3530 = mul nsw i32 %3529, 10
store i32 %3530, i32* %3
%3531 = load i32, i32* %3
%3532 = add nsw i32 %3531, 1
store i32 %3532, i32* %3
%3533 = load i32, i32* %3
%3534 = mul nsw i32 %3533, 2
store i32 %3534, i32* %3
%3535 = load i32, i32* %3
%3536 = sub nsw i32 %3535, 1
store i32 %3536, i32* %3
%3537 = load i32, i32* %3
%3538 = and i32 %3537, -1044481
store i32 %3538, i32* %3
%3539 = load i32, i32* %3
%3540 = xor i32 %3539, 81954
store i32 %3540, i32* %3
%3541 = load i32, i32* %3
%3542 = srem i32 %3541, 268435443
store i32 %3542, i32* %3
%3543 = load i32, i32* %3
%3544 = add nsw i32 %3543, 6
store i32 %3544, i32* %3
%3545 = load i32, i32* %3
%3546 = mul nsw i32 %3545, 10
store i32 %3546, i32* %3
%3547 = load i32, i32* %3
%3548 = add nsw i32 %3547, 1
store i32 %3548, i32* %3
%3549 = load i32, i32* %3
%3550 = mul nsw i32 %3549, 2
store i32 %3550, i32* %3
%3551 = load i32, i32* %3
%3552 = sub nsw i32 %3551, 1
store i32 %3552, i32* %3
%3553 = load i32, i32* %3
%3554 = and i32 %3553, -1044481
store i32 %3554, i32* %3
%3555 = load i32, i32* %3
%3556 = xor i32 %3555, 81954
store i32 %3556, i32* %3
%3557 = load i32, i32* %3
%3558 = srem i32 %3557, 268435443
store i32 %3558, i32* %3
%3559 = load i32, i32* %3
%3560 = add nsw i32 %3559, 6
store i32 %3560, i32* %3
%3561 = load i32, i32* %3
%3562 = mul nsw i32 %3561, 10
store i32 %3562, i32* %3
%3563 = load i32, i32* %3
%3564 = add nsw i32 %3563, 1
store i32 %3564, i32* %3
%3565 = load i32, i32* %3
%3566 = mul nsw i32 %3565, 2
store i32 %3566, i32* %3
%3567 = load i32, i32* %3
%3568 = sub nsw i32 %3567, 1
store i32 %3568, i32* %3
%3569 = load i32, i32* %3
%3570 = and i32 %3569, -1044481
store i32 %3570, i32* %3
%3571 = load i32, i32* %3
%3572 = xor i32 %3571, 81954
store i32 %3572, i32* %3
%3573 = load i32, i32* %3
%3574 = srem i32 %3573, 268435443
store i32 %3574, i32* %3
%3575 = load i32, i32* %3
%3576 = add nsw i32 %3575, 6
store i32 %3576, i32* %3
%3577 = load i32, i32* %3
%3578 = mul nsw i32 %3577, 10
store i32 %3578, i32* %3
%3579 = load i32, i32* %3
%3580 = add nsw i32 %3579, 1
store i32 %3580, i32* %3
%3581 = load i32, i32* %3
%3582 = mul nsw i32 %3581, 2
store i32 %3582, i32* %3
%3583 = load i32, i32* %3
%3584 = sub nsw i32 %3583, 1
store i32 %3584, i32* %3
%3585 = load i32, i32* %3
%3586 = and i32 %3585, -1044481
store i32 %3586, i32* %3
%3587 = load i32, i32* %3
%3588 = xor i32 %3587, 81954
store i32 %3588, i32* %3
%3589 = load i32, i32* %3
%3590 = srem i32 %3589, 268435443
store i32 %3590, i32* %3
%3591 = load i32, i32* %3
%3592 = add nsw i32 %3591, 6
store i32 %3592, i32* %3
%3593 = load i32, i32* %3
%3594 = mul nsw i32 %3593, 10
store i32 %3594, i32* %3
%3595 = load i32, i32* %3
%3596 = add nsw i32 %3595, 1
store i32 %3596, i32* %3
%3597 = load i32, i32* %3
%3598 = mul nsw i32 %3597, 2
store i32 %3598, i32* %3
%3599 = load i32, i32* %3
%3600 = sub nsw i32 %3599, 1
store i32 %3600, i32* %3
%3601 = load i32, i32* %3
%3602 = and i32 %3601, -1044481
store i32 %3602, i32* %3
%3603 = load i32, i32* %3
%3604 = xor i32 %3603, 81954
store i32 %3604, i32* %3
%3605 = load i32, i32* %3
%3606 = srem i32 %3605, 268435443
store i32 %3606, i32* %3
%3607 = load i32, i32* %3
%3608 = add nsw i32 %3607, 6
store i32 %3608, i32* %3
%3609 = load i32, i32* %3
%3610 = mul nsw i32 %3609, 10
store i32 %3610, i32* %3
%3611 = load i32, i32* %3
%3612 = add nsw i32 %3611, 1
store i32 %3612, i32* %3
%3613 = load i32, i32* %3
%3614 = mul nsw i32 %3613, 2
store i32 %3614, i32* %3
%3615 = load i32, i32* %3
%3616 = sub nsw i32 %3615, 1
store i32 %3616, i32* %3
%3617 = load i32, i32* %3
%3618 = and i32 %3617, -1044481
store i32 %3618, i32* %3
%3619 = load i32, i32* %3
%3620 = xor i32 %3619, 81954
store i32 %3620, i32* %3
%3621 = load i32, i32* %3
%3622 = srem i32 %3621, 268435443
store i32 %3622, i32* %3
%3623 = load i32, i32* %3
%3624 = add nsw i32 %3623, 6
store i32 %3624, i32* %3
%3625 = load i32, i32* %3
%3626 = mul nsw i32 %3625, 10
store i32 %3626, i32* %3
%3627 = load i32, i32* %3
%3628 = add nsw i32 %3627, 1
store i32 %3628, i32* %3
%3629 = load i32, i32* %3
%3630 = mul nsw i32 %3629, 2
store i32 %3630, i32* %3
%3631 = load i32, i32* %3
%3632 = sub nsw i32 %3631, 1
store i32 %3632, i32* %3
%3633 = load i32, i32* %3
%3634 = and i32 %3633, -1044481
store i32 %3634, i32* %3
%3635 = load i32, i32* %3
%3636 = xor i32 %3635, 81954
store i32 %3636, i32* %3
%3637 = load i32, i32* %3
%3638 = srem i32 %3637, 268435443
store i32 %3638, i32* %3
%3639 = load i32, i32* %3
%3640 = add nsw i32 %3639, 6
store i32 %3640, i32* %3
%3641 = load i32, i32* %3
%3642 = mul nsw i32 %3641, 10
store i32 %3642, i32* %3
%3643 = load i32, i32* %3
%3644 = add nsw i32 %3643, 1
store i32 %3644, i32* %3
%3645 = load i32, i32* %3
%3646 = mul nsw i32 %3645, 2
store i32 %3646, i32* %3
%3647 = load i32, i32* %3
%3648 = sub nsw i32 %3647, 1
store i32 %3648, i32* %3
%3649 = load i32, i32* %3
%3650 = and i32 %3649, -1044481
store i32 %3650, i32* %3
%3651 = load i32, i32* %3
%3652 = xor i32 %3651, 81954
store i32 %3652, i32* %3
%3653 = load i32, i32* %3
%3654 = srem i32 %3653, 268435443
store i32 %3654, i32* %3
%3655 = load i32, i32* %3
%3656 = add nsw i32 %3655, 6
store i32 %3656, i32* %3
%3657 = load i32, i32* %3
%3658 = mul nsw i32 %3657, 10
store i32 %3658, i32* %3
%3659 = load i32, i32* %3
%3660 = add nsw i32 %3659, 1
store i32 %3660, i32* %3
%3661 = load i32, i32* %3
%3662 = mul nsw i32 %3661, 2
store i32 %3662, i32* %3
%3663 = load i32, i32* %3
%3664 = sub nsw i32 %3663, 1
store i32 %3664, i32* %3
%3665 = load i32, i32* %3
%3666 = and i32 %3665, -1044481
store i32 %3666, i32* %3
%3667 = load i32, i32* %3
%3668 = xor i32 %3667, 81954
store i32 %3668, i32* %3
%3669 = load i32, i32* %3
%3670 = srem i32 %3669, 268435443
store i32 %3670, i32* %3
%3671 = load i32, i32* %3
%3672 = add nsw i32 %3671, 6
store i32 %3672, i32* %3
%3673 = load i32, i32* %3
%3674 = mul nsw i32 %3673, 10
store i32 %3674, i32* %3
%3675 = load i32, i32* %3
%3676 = add nsw i32 %3675, 1
store i32 %3676, i32* %3
%3677 = load i32, i32* %3
%3678 = mul nsw i32 %3677, 2
store i32 %3678, i32* %3
%3679 = load i32, i32* %3
%3680 = sub nsw i32 %3679, 1
store i32 %3680, i32* %3
%3681 = load i32, i32* %3
%3682 = and i32 %3681, -1044481
store i32 %3682, i32* %3
%3683 = load i32, i32* %3
%3684 = xor i32 %3683, 81954
store i32 %3684, i32* %3
%3685 = load i32, i32* %3
%3686 = srem i32 %3685, 268435443
store i32 %3686, i32* %3
%3687 = load i32, i32* %3
%3688 = add nsw i32 %3687, 6
store i32 %3688, i32* %3
%3689 = load i32, i32* %3
%3690 = mul nsw i32 %3689, 10
store i32 %3690, i32* %3
%3691 = load i32, i32* %3
%3692 = add nsw i32 %3691, 1
store i32 %3692, i32* %3
%3693 = load i32, i32* %3
%3694 = mul nsw i32 %3693, 2
store i32 %3694, i32* %3
%3695 = load i32, i32* %3
%3696 = sub nsw i32 %3695, 1
store i32 %3696, i32* %3
%3697 = load i32, i32* %3
%3698 = and i32 %3697, -1044481
store i32 %3698, i32* %3
%3699 = load i32, i32* %3
%3700 = xor i32 %3699, 81954
store i32 %3700, i32* %3
%3701 = load i32, i32* %3
%3702 = srem i32 %3701, 268435443
store i32 %3702, i32* %3
%3703 = load i32, i32* %3
%3704 = add nsw i32 %3703, 6
store i32 %3704, i32* %3
%3705 = load i32, i32* %3
%3706 = mul nsw i32 %3705, 10
store i32 %3706, i32* %3
%3707 = load i32, i32* %3
%3708 = add nsw i32 %3707, 1
store i32 %3708, i32* %3
%3709 = load i32, i32* %3
%3710 = mul nsw i32 %3709, 2
store i32 %3710, i32* %3
%3711 = load i32, i32* %3
%3712 = sub nsw i32 %3711, 1
store i32 %3712, i32* %3
%3713 = load i32, i32* %3
%3714 = and i32 %3713, -1044481
store i32 %3714, i32* %3
%3715 = load i32, i32* %3
%3716 = xor i32 %3715, 81954
store i32 %3716, i32* %3
%3717 = load i32, i32* %3
%3718 = srem i32 %3717, 268435443
store i32 %3718, i32* %3
%3719 = load i32, i32* %3
%3720 = add nsw i32 %3719, 6
store i32 %3720, i32* %3
%3721 = load i32, i32* %3
%3722 = mul nsw i32 %3721, 10
store i32 %3722, i32* %3
%3723 = load i32, i32* %3
%3724 = add nsw i32 %3723, 1
store i32 %3724, i32* %3
%3725 = load i32, i32* %3
%3726 = mul nsw i32 %3725, 2
store i32 %3726, i32* %3
%3727 = load i32, i32* %3
%3728 = sub nsw i32 %3727, 1
store i32 %3728, i32* %3
%3729 = load i32, i32* %3
%3730 = and i32 %3729, -1044481
store i32 %3730, i32* %3
%3731 = load i32, i32* %3
%3732 = xor i32 %3731, 81954
store i32 %3732, i32* %3
%3733 = load i32, i32* %3
%3734 = srem i32 %3733, 268435443
store i32 %3734, i32* %3
%3735 = load i32, i32* %3
%3736 = add nsw i32 %3735, 6
store i32 %3736, i32* %3
%3737 = load i32, i32* %3
%3738 = mul nsw i32 %3737, 10
store i32 %3738, i32* %3
%3739 = load i32, i32* %3
%3740 = add nsw i32 %3739, 1
store i32 %3740, i32* %3
%3741 = load i32, i32* %3
%3742 = mul nsw i32 %3741, 2
store i32 %3742, i32* %3
%3743 = load i32, i32* %3
%3744 = sub nsw i32 %3743, 1
store i32 %3744, i32* %3
%3745 = load i32, i32* %3
%3746 = and i32 %3745, -1044481
store i32 %3746, i32* %3
%3747 = load i32, i32* %3
%3748 = xor i32 %3747, 81954
store i32 %3748, i32* %3
%3749 = load i32, i32* %3
%3750 = srem i32 %3749, 268435443
store i32 %3750, i32* %3
%3751 = load i32, i32* %3
%3752 = add nsw i32 %3751, 6
store i32 %3752, i32* %3
%3753 = load i32, i32* %3
%3754 = mul nsw i32 %3753, 10
store i32 %3754, i32* %3
%3755 = load i32, i32* %3
%3756 = add nsw i32 %3755, 1
store i32 %3756, i32* %3
%3757 = load i32, i32* %3
%3758 = mul nsw i32 %3757, 2
store i32 %3758, i32* %3
%3759 = load i32, i32* %3
%3760 = sub nsw i32 %3759, 1
store i32 %3760, i32* %3
%3761 = load i32, i32* %3
%3762 = and i32 %3761, -1044481
store i32 %3762, i32* %3
%3763 = load i32, i32* %3
%3764 = xor i32 %3763, 81954
store i32 %3764, i32* %3
%3765 = load i32, i32* %3
%3766 = srem i32 %3765, 268435443
store i32 %3766, i32* %3
%3767 = load i32, i32* %3
%3768 = add nsw i32 %3767, 6
store i32 %3768, i32* %3
%3769 = load i32, i32* %3
%3770 = mul nsw i32 %3769, 10
store i32 %3770, i32* %3
%3771 = load i32, i32* %3
%3772 = add nsw i32 %3771, 1
store i32 %3772, i32* %3
%3773 = load i32, i32* %3
%3774 = mul nsw i32 %3773, 2
store i32 %3774, i32* %3
%3775 = load i32, i32* %3
%3776 = sub nsw i32 %3775, 1
store i32 %3776, i32* %3
%3777 = load i32, i32* %3
%3778 = and i32 %3777, -1044481
store i32 %3778, i32* %3
%3779 = load i32, i32* %3
%3780 = xor i32 %3779, 81954
store i32 %3780, i32* %3
%3781 = load i32, i32* %3
%3782 = srem i32 %3781, 268435443
store i32 %3782, i32* %3
%3783 = load i32, i32* %3
%3784 = add nsw i32 %3783, 6
store i32 %3784, i32* %3
%3785 = load i32, i32* %3
%3786 = mul nsw i32 %3785, 10
store i32 %3786, i32* %3
%3787 = load i32, i32* %3
%3788 = add nsw i32 %3787, 1
store i32 %3788, i32* %3
%3789 = load i32, i32* %3
%3790 = mul nsw i32 %3789, 2
store i32 %3790, i32* %3
%3791 = load i32, i32* %3
%3792 = sub nsw i32 %3791, 1
store i32 %3792, i32* %3
%3793 = load i32, i32* %3
%3794 = and i32 %3793, -1044481
store i32 %3794, i32* %3
%3795 = load i32, i32* %3
%3796 = xor i32 %3795, 81954
store i32 %3796, i32* %3
%3797 = load i32, i32* %3
%3798 = srem i32 %3797, 268435443
store i32 %3798, i32* %3
%3799 = load i32, i32* %3
%3800 = add nsw i32 %3799, 6
store i32 %3800, i32* %3
%3801 = load i32, i32* %3
%3802 = mul nsw i32 %3801, 10
store i32 %3802, i32* %3
%3803 = load i32, i32* %3
%3804 = add nsw i32 %3803, 1
store i32 %3804, i32* %3
%3805 = load i32, i32* %3
%3806 = mul nsw i32 %3805, 2
store i32 %3806, i32* %3
%3807 = load i32, i32* %3
%3808 = sub nsw i32 %3807, 1
store i32 %3808, i32* %3
%3809 = load i32, i32* %3
%3810 = and i32 %3809, -1044481
store i32 %3810, i32* %3
%3811 = load i32, i32* %3
%3812 = xor i32 %3811, 81954
store i32 %3812, i32* %3
%3813 = load i32, i32* %3
%3814 = srem i32 %3813, 268435443
store i32 %3814, i32* %3
%3815 = load i32, i32* %3
%3816 = add nsw i32 %3815, 6
store i32 %3816, i32* %3
%3817 = load i32, i32* %3
%3818 = mul nsw i32 %3817, 10
store i32 %3818, i32* %3
%3819 = load i32, i32* %3
%3820 = add nsw i32 %3819, 1
store i32 %3820, i32* %3
%3821 = load i32, i32* %3
%3822 = mul nsw i32 %3821, 2
store i32 %3822, i32* %3
%3823 = load i32, i32* %3
%3824 = sub nsw i32 %3823, 1
store i32 %3824, i32* %3
%3825 = load i32, i32* %3
%3826 = and i32 %3825, -1044481
store i32 %3826, i32* %3
%3827 = load i32, i32* %3
%3828 = xor i32 %3827, 81954
store i32 %3828, i32* %3
%3829 = load i32, i32* %3
%3830 = srem i32 %3829, 268435443
store i32 %3830, i32* %3
%3831 = load i32, i32* %3
%3832 = add nsw i32 %3831, 6
store i32 %3832, i32* %3
%3833 = load i32, i32* %3
%3834 = mul nsw i32 %3833, 10
store i32 %3834, i32* %3
%3835 = load i32, i32* %3
%3836 = add nsw i32 %3835, 1
store i32 %3836, i32* %3
%3837 = load i32, i32* %3
%3838 = mul nsw i32 %3837, 2
store i32 %3838, i32* %3
%3839 = load i32, i32* %3
%3840 = sub nsw i32 %3839, 1
store i32 %3840, i32* %3
%3841 = load i32, i32* %3
%3842 = and i32 %3841, -1044481
store i32 %3842, i32* %3
%3843 = load i32, i32* %3
%3844 = xor i32 %3843, 81954
store i32 %3844, i32* %3
%3845 = load i32, i32* %3
%3846 = srem i32 %3845, 268435443
store i32 %3846, i32* %3
%3847 = load i32, i32* %3
%3848 = add nsw i32 %3847, 6
store i32 %3848, i32* %3
%3849 = load i32, i32* %3
%3850 = mul nsw i32 %3849, 10
store i32 %3850, i32* %3
%3851 = load i32, i32* %3
%3852 = add nsw i32 %3851, 1
store i32 %3852, i32* %3
%3853 = load i32, i32* %3
%3854 = mul nsw i32 %3853, 2
store i32 %3854, i32* %3
%3855 = load i32, i32* %3
%3856 = sub nsw i32 %3855, 1
store i32 %3856, i32* %3
%3857 = load i32, i32* %3
%3858 = and i32 %3857, -1044481
store i32 %3858, i32* %3
%3859 = load i32, i32* %3
%3860 = xor i32 %3859, 81954
store i32 %3860, i32* %3
%3861 = load i32, i32* %3
%3862 = srem i32 %3861, 268435443
store i32 %3862, i32* %3
%3863 = load i32, i32* %3
%3864 = add nsw i32 %3863, 6
store i32 %3864, i32* %3
%3865 = load i32, i32* %3
%3866 = mul nsw i32 %3865, 10
store i32 %3866, i32* %3
%3867 = load i32, i32* %3
%3868 = add nsw i32 %3867, 1
store i32 %3868, i32* %3
%3869 = load i32, i32* %3
%3870 = mul nsw i32 %3869, 2
store i32 %3870, i32* %3
%3871 = load i32, i32* %3
%3872 = sub nsw i32 %3871, 1
store i32 %3872, i32* %3
%3873 = load i32, i32* %3
%3874 = and i32 %3873, -1044481
store i32 %3874, i32* %3
%3875 = load i32, i32* %3
%3876 = xor i32 %3875, 81954
store i32 %3876, i32* %3
%3877 = load i32, i32* %3
%3878 = srem i32 %3877, 268435443
store i32 %3878, i32* %3
%3879 = load i32, i32* %3
%3880 = add nsw i32 %3879, 6
store i32 %3880, i32* %3
%3881 = load i32, i32* %3
%3882 = mul nsw i32 %3881, 10
store i32 %3882, i32* %3
%3883 = load i32, i32* %3
%3884 = add nsw i32 %3883, 1
store i32 %3884, i32* %3
%3885 = load i32, i32* %3
%3886 = mul nsw i32 %3885, 2
store i32 %3886, i32* %3
%3887 = load i32, i32* %3
%3888 = sub nsw i32 %3887, 1
store i32 %3888, i32* %3
%3889 = load i32, i32* %3
%3890 = and i32 %3889, -1044481
store i32 %3890, i32* %3
%3891 = load i32, i32* %3
%3892 = xor i32 %3891, 81954
store i32 %3892, i32* %3
%3893 = load i32, i32* %3
%3894 = srem i32 %3893, 268435443
store i32 %3894, i32* %3
%3895 = load i32, i32* %3
%3896 = add nsw i32 %3895, 6
store i32 %3896, i32* %3
%3897 = load i32, i32* %3
%3898 = mul nsw i32 %3897, 10
store i32 %3898, i32* %3
%3899 = load i32, i32* %3
%3900 = add nsw i32 %3899, 1
store i32 %3900, i32* %3
%3901 = load i32, i32* %3
%3902 = mul nsw i32 %3901, 2
store i32 %3902, i32* %3
%3903 = load i32, i32* %3
%3904 = sub nsw i32 %3903, 1
store i32 %3904, i32* %3
%3905 = load i32, i32* %3
%3906 = and i32 %3905, -1044481
store i32 %3906, i32* %3
%3907 = load i32, i32* %3
%3908 = xor i32 %3907, 81954
store i32 %3908, i32* %3
%3909 = load i32, i32* %3
%3910 = srem i32 %3909, 268435443
store i32 %3910, i32* %3
%3911 = load i32, i32* %3
%3912 = add nsw i32 %3911, 6
store i32 %3912, i32* %3
%3913 = load i32, i32* %3
%3914 = mul nsw i32 %3913, 10
store i32 %3914, i32* %3
%3915 = load i32, i32* %3
%3916 = add nsw i32 %3915, 1
store i32 %3916, i32* %3
%3917 = load i32, i32* %3
%3918 = mul nsw i32 %3917, 2
store i32 %3918, i32* %3
%3919 = load i32, i32* %3
%3920 = sub nsw i32 %3919, 1
store i32 %3920, i32* %3
%3921 = load i32, i32* %3
%3922 = and i32 %3921, -1044481
store i32 %3922, i32* %3
%3923 = load i32, i32* %3
%3924 = xor i32 %3923, 81954
store i32 %3924, i32* %3
%3925 = load i32, i32* %3
%3926 = srem i32 %3925, 268435443
store i32 %3926, i32* %3
%3927 = load i32, i32* %3
%3928 = add nsw i32 %3927, 6
store i32 %3928, i32* %3
%3929 = load i32, i32* %3
%3930 = mul nsw i32 %3929, 10
store i32 %3930, i32* %3
%3931 = load i32, i32* %3
%3932 = add nsw i32 %3931, 1
store i32 %3932, i32* %3
%3933 = load i32, i32* %3
%3934 = mul nsw i32 %3933, 2
store i32 %3934, i32* %3
%3935 = load i32, i32* %3
%3936 = sub nsw i32 %3935, 1
store i32 %3936, i32* %3
%3937 = load i32, i32* %3
%3938 = and i32 %3937, -1044481
store i32 %3938, i32* %3
%3939 = load i32, i32* %3
%3940 = xor i32 %3939, 81954
store i32 %3940, i32* %3
%3941 = load i32, i32* %3
%3942 = srem i32 %3941, 268435443
store i32 %3942, i32* %3
%3943 = load i32, i32* %3
%3944 = add nsw i32 %3943, 6
store i32 %3944, i32* %3
%3945 = load i32, i32* %3
%3946 = mul nsw i32 %3945, 10
store i32 %3946, i32* %3
%3947 = load i32, i32* %3
%3948 = add nsw i32 %3947, 1
store i32 %3948, i32* %3
%3949 = load i32, i32* %3
%3950 = mul nsw i32 %3949, 2
store i32 %3950, i32* %3
%3951 = load i32, i32* %3
%3952 = sub nsw i32 %3951, 1
store i32 %3952, i32* %3
%3953 = load i32, i32* %3
%3954 = and i32 %3953, -1044481
store i32 %3954, i32* %3
%3955 = load i32, i32* %3
%3956 = xor i32 %3955, 81954
store i32 %3956, i32* %3
%3957 = load i32, i32* %3
%3958 = srem i32 %3957, 268435443
store i32 %3958, i32* %3
%3959 = load i32, i32* %3
%3960 = add nsw i32 %3959, 6
store i32 %3960, i32* %3
%3961 = load i32, i32* %3
%3962 = mul nsw i32 %3961, 10
store i32 %3962, i32* %3
%3963 = load i32, i32* %3
%3964 = add nsw i32 %3963, 1
store i32 %3964, i32* %3
%3965 = load i32, i32* %3
%3966 = mul nsw i32 %3965, 2
store i32 %3966, i32* %3
%3967 = load i32, i32* %3
%3968 = sub nsw i32 %3967, 1
store i32 %3968, i32* %3
%3969 = load i32, i32* %3
%3970 = and i32 %3969, -1044481
store i32 %3970, i32* %3
%3971 = load i32, i32* %3
%3972 = xor i32 %3971, 81954
store i32 %3972, i32* %3
%3973 = load i32, i32* %3
%3974 = srem i32 %3973, 268435443
store i32 %3974, i32* %3
%3975 = load i32, i32* %3
%3976 = add nsw i32 %3975, 6
store i32 %3976, i32* %3
%3977 = load i32, i32* %3
%3978 = mul nsw i32 %3977, 10
store i32 %3978, i32* %3
%3979 = load i32, i32* %3
%3980 = add nsw i32 %3979, 1
store i32 %3980, i32* %3
%3981 = load i32, i32* %3
%3982 = mul nsw i32 %3981, 2
store i32 %3982, i32* %3
%3983 = load i32, i32* %3
%3984 = sub nsw i32 %3983, 1
store i32 %3984, i32* %3
%3985 = load i32, i32* %3
%3986 = and i32 %3985, -1044481
store i32 %3986, i32* %3
%3987 = load i32, i32* %3
%3988 = xor i32 %3987, 81954
store i32 %3988, i32* %3
%3989 = load i32, i32* %3
%3990 = srem i32 %3989, 268435443
store i32 %3990, i32* %3
%3991 = load i32, i32* %3
%3992 = add nsw i32 %3991, 6
store i32 %3992, i32* %3
%3993 = load i32, i32* %3
%3994 = mul nsw i32 %3993, 10
store i32 %3994, i32* %3
%3995 = load i32, i32* %3
%3996 = add nsw i32 %3995, 1
store i32 %3996, i32* %3
%3997 = load i32, i32* %3
%3998 = mul nsw i32 %3997, 2
store i32 %3998, i32* %3
%3999 = load i32, i32* %3
%4000 = sub nsw i32 %3999, 1
store i32 %4000, i32* %3
%4001 = load i32, i32* %3
%4002 = and i32 %4001, -1044481
store i32 %4002, i32* %3
%4003 = load i32, i32* %3
%4004 = xor i32 %4003, 81954
store i32 %4004, i32* %3
%4005 = load i32, i32* %3
%4006 = srem i32 %4005, 268435443
store i32 %4006, i32* %3
%4007 = load i32, i32* %3
%4008 = add nsw i32 %4007, 6
store i32 %4008, i32* %3
%4009 = load i32, i32* %3
%4010 = mul nsw i32 %4009, 10
store i32 %4010, i32* %3
%4011 = load i32, i32* %3
%4012 = add nsw i32 %4011, 1
store i32 %4012, i32* %3
%4013 = load i32, i32* %3
%4014 = mul nsw i32 %4013, 2
store i32 %4014, i32* %3
%4015 = load i32, i32* %3
%4016 = sub nsw i32 %4015, 1
store i32 %4016, i32* %3
%4017 = load i32, i32* %3
%4018 = and i32 %4017, -1044481
store i32 %4018, i32* %3
%4019 = load i32, i32* %3
%4020 = xor i32 %4019, 81954
store i32 %4020, i32* %3
%4021 = load i32, i32* %3
%4022 = srem i32 %4021, 268435443
store i32 %4022, i32* %3
%4023 = load i32, i32* %3
%4024 = add nsw i32 %4023, 6
store i32 %4024, i32* %3
%4025 = load i32, i32* %3
%4026 = mul nsw i32 %4025, 10
store i32 %4026, i32* %3
%4027 = load i32, i32* %3
%4028 = add nsw i32 %4027, 1
store i32 %4028, i32* %3
%4029 = load i32, i32* %3
%4030 = mul nsw i32 %4029, 2
store i32 %4030, i32* %3
%4031 = load i32, i32* %3
%4032 = sub nsw i32 %4031, 1
store i32 %4032, i32* %3
%4033 = load i32, i32* %3
%4034 = and i32 %4033, -1044481
store i32 %4034, i32* %3
%4035 = load i32, i32* %3
%4036 = xor i32 %4035, 81954
store i32 %4036, i32* %3
%4037 = load i32, i32* %3
%4038 = srem i32 %4037, 268435443
store i32 %4038, i32* %3
%4039 = load i32, i32* %3
%4040 = add nsw i32 %4039, 6
store i32 %4040, i32* %3
%4041 = load i32, i32* %3
%4042 = mul nsw i32 %4041, 10
store i32 %4042, i32* %3
%4043 = load i32, i32* %3
%4044 = add nsw i32 %4043, 1
store i32 %4044, i32* %3
%4045 = load i32, i32* %3
%4046 = mul nsw i32 %4045, 2
store i32 %4046, i32* %3
%4047 = load i32, i32* %3
%4048 = sub nsw i32 %4047, 1
store i32 %4048, i32* %3
%4049 = load i32, i32* %3
%4050 = and i32 %4049, -1044481
store i32 %4050, i32* %3
%4051 = load i32, i32* %3
%4052 = xor i32 %4051, 81954
store i32 %4052, i32* %3
%4053 = load i32, i32* %3
%4054 = srem i32 %4053, 268435443
store i32 %4054, i32* %3
%4055 = load i32, i32* %3
%4056 = add nsw i32 %4055, 6
store i32 %4056, i32* %3
%4057 = load i32, i32* %3
%4058 = mul nsw i32 %4057, 10
store i32 %4058, i32* %3
%4059 = load i32, i32* %3
%4060 = add nsw i32 %4059, 1
store i32 %4060, i32* %3
%4061 = load i32, i32* %3
%4062 = mul nsw i32 %4061, 2
store i32 %4062, i32* %3
%4063 = load i32, i32* %3
%4064 = sub nsw i32 %4063, 1
store i32 %4064, i32* %3
%4065 = load i32, i32* %3
%4066 = and i32 %4065, -1044481
store i32 %4066, i32* %3
%4067 = load i32, i32* %3
%4068 = xor i32 %4067, 81954
store i32 %4068, i32* %3
%4069 = load i32, i32* %3
%4070 = srem i32 %4069, 268435443
store i32 %4070, i32* %3
%4071 = load i32, i32* %3
%4072 = add nsw i32 %4071, 6
store i32 %4072, i32* %3
%4073 = load i32, i32* %3
%4074 = mul nsw i32 %4073, 10
store i32 %4074, i32* %3
%4075 = load i32, i32* %3
%4076 = add nsw i32 %4075, 1
store i32 %4076, i32* %3
%4077 = load i32, i32* %3
%4078 = mul nsw i32 %4077, 2
store i32 %4078, i32* %3
%4079 = load i32, i32* %3
%4080 = sub nsw i32 %4079, 1
store i32 %4080, i32* %3
%4081 = load i32, i32* %3
%4082 = and i32 %4081, -1044481
store i32 %4082, i32* %3
%4083 = load i32, i32* %3
%4084 = xor i32 %4083, 81954
store i32 %4084, i32* %3
%4085 = load i32, i32* %3
%4086 = srem i32 %4085, 268435443
store i32 %4086, i32* %3
%4087 = load i32, i32* %3
%4088 = add nsw i32 %4087, 6
store i32 %4088, i32* %3
%4089 = load i32, i32* %3
%4090 = mul nsw i32 %4089, 10
store i32 %4090, i32* %3
%4091 = load i32, i32* %3
%4092 = add nsw i32 %4091, 1
store i32 %4092, i32* %3
%4093 = load i32, i32* %3
%4094 = mul nsw i32 %4093, 2
store i32 %4094, i32* %3
%4095 = load i32, i32* %3
%4096 = sub nsw i32 %4095, 1
store i32 %4096, i32* %3
%4097 = load i32, i32* %3
%4098 = and i32 %4097, -1044481
store i32 %4098, i32* %3
%4099 = load i32, i32* %3
%4100 = xor i32 %4099, 81954
store i32 %4100, i32* %3
%4101 = load i32, i32* %3
%4102 = srem i32 %4101, 268435443
store i32 %4102, i32* %3
%4103 = load i32, i32* %3
%4104 = add nsw i32 %4103, 6
store i32 %4104, i32* %3
%4105 = load i32, i32* %3
%4106 = mul nsw i32 %4105, 10
store i32 %4106, i32* %3
%4107 = load i32, i32* %3
%4108 = add nsw i32 %4107, 1
store i32 %4108, i32* %3
%4109 = load i32, i32* %3
%4110 = mul nsw i32 %4109, 2
store i32 %4110, i32* %3
%4111 = load i32, i32* %3
%4112 = sub nsw i32 %4111, 1
store i32 %4112, i32* %3
%4113 = load i32, i32* %3
%4114 = and i32 %4113, -1044481
store i32 %4114, i32* %3
%4115 = load i32, i32* %3
%4116 = xor i32 %4115, 81954
store i32 %4116, i32* %3
%4117 = load i32, i32* %3
%4118 = srem i32 %4117, 268435443
store i32 %4118, i32* %3
%4119 = load i32, i32* %3
%4120 = add nsw i32 %4119, 6
store i32 %4120, i32* %3
%4121 = load i32, i32* %3
%4122 = mul nsw i32 %4121, 10
store i32 %4122, i32* %3
%4123 = load i32, i32* %3
%4124 = add nsw i32 %4123, 1
store i32 %4124, i32* %3
%4125 = load i32, i32* %3
%4126 = mul nsw i32 %4125, 2
store i32 %4126, i32* %3
%4127 = load i32, i32* %3
%4128 = sub nsw i32 %4127, 1
store i32 %4128, i32* %3
%4129 = load i32, i32* %3
%4130 = and i32 %4129, -1044481
store i32 %4130, i32* %3
%4131 = load i32, i32* %3
%4132 = xor i32 %4131, 81954
store i32 %4132, i32* %3
%4133 = load i32, i32* %3
%4134 = srem i32 %4133, 268435443
store i32 %4134, i32* %3
%4135 = load i32, i32* %3
%4136 = add nsw i32 %4135, 6
store i32 %4136, i32* %3
%4137 = load i32, i32* %3
%4138 = mul nsw i32 %4137, 10
store i32 %4138, i32* %3
%4139 = load i32, i32* %3
%4140 = add nsw i32 %4139, 1
store i32 %4140, i32* %3
%4141 = load i32, i32* %3
%4142 = mul nsw i32 %4141, 2
store i32 %4142, i32* %3
%4143 = load i32, i32* %3
%4144 = sub nsw i32 %4143, 1
store i32 %4144, i32* %3
%4145 = load i32, i32* %3
%4146 = and i32 %4145, -1044481
store i32 %4146, i32* %3
%4147 = load i32, i32* %3
%4148 = xor i32 %4147, 81954
store i32 %4148, i32* %3
%4149 = load i32, i32* %3
%4150 = srem i32 %4149, 268435443
store i32 %4150, i32* %3
%4151 = load i32, i32* %3
%4152 = add nsw i32 %4151, 6
store i32 %4152, i32* %3
%4153 = load i32, i32* %3
%4154 = mul nsw i32 %4153, 10
store i32 %4154, i32* %3
%4155 = load i32, i32* %3
%4156 = add nsw i32 %4155, 1
store i32 %4156, i32* %3
%4157 = load i32, i32* %3
%4158 = mul nsw i32 %4157, 2
store i32 %4158, i32* %3
%4159 = load i32, i32* %3
%4160 = sub nsw i32 %4159, 1
store i32 %4160, i32* %3
%4161 = load i32, i32* %3
%4162 = and i32 %4161, -1044481
store i32 %4162, i32* %3
%4163 = load i32, i32* %3
%4164 = xor i32 %4163, 81954
store i32 %4164, i32* %3
%4165 = load i32, i32* %3
%4166 = srem i32 %4165, 268435443
store i32 %4166, i32* %3
%4167 = load i32, i32* %3
%4168 = add nsw i32 %4167, 6
store i32 %4168, i32* %3
%4169 = load i32, i32* %3
%4170 = mul nsw i32 %4169, 10
store i32 %4170, i32* %3
%4171 = load i32, i32* %3
%4172 = add nsw i32 %4171, 1
store i32 %4172, i32* %3
%4173 = load i32, i32* %3
%4174 = mul nsw i32 %4173, 2
store i32 %4174, i32* %3
%4175 = load i32, i32* %3
%4176 = sub nsw i32 %4175, 1
store i32 %4176, i32* %3
%4177 = load i32, i32* %3
%4178 = and i32 %4177, -1044481
store i32 %4178, i32* %3
%4179 = load i32, i32* %3
%4180 = xor i32 %4179, 81954
store i32 %4180, i32* %3
%4181 = load i32, i32* %3
%4182 = srem i32 %4181, 268435443
store i32 %4182, i32* %3
%4183 = load i32, i32* %3
%4184 = add nsw i32 %4183, 6
store i32 %4184, i32* %3
%4185 = load i32, i32* %3
%4186 = mul nsw i32 %4185, 10
store i32 %4186, i32* %3
%4187 = load i32, i32* %3
%4188 = add nsw i32 %4187, 1
store i32 %4188, i32* %3
%4189 = load i32, i32* %3
%4190 = mul nsw i32 %4189, 2
store i32 %4190, i32* %3
%4191 = load i32, i32* %3
%4192 = sub nsw i32 %4191, 1
store i32 %4192, i32* %3
%4193 = load i32, i32* %3
%4194 = and i32 %4193, -1044481
store i32 %4194, i32* %3
%4195 = load i32, i32* %3
%4196 = xor i32 %4195, 81954
store i32 %4196, i32* %3
%4197 = load i32, i32* %3
%4198 = srem i32 %4197, 268435443
store i32 %4198, i32* %3
%4199 = load i32, i32* %3
%4200 = add nsw i32 %4199, 6
store i32 %4200, i32* %3
%4201 = load i32, i32* %3
%4202 = mul nsw i32 %4201, 10
store i32 %4202, i32* %3
%4203 = load i32, i32* %3
%4204 = add nsw i32 %4203, 1
store i32 %4204, i32* %3
%4205 = load i32, i32* %3
%4206 = mul nsw i32 %4205, 2
store i32 %4206, i32* %3
%4207 = load i32, i32* %3
%4208 = sub nsw i32 %4207, 1
store i32 %4208, i32* %3
%4209 = load i32, i32* %3
%4210 = and i32 %4209, -1044481
store i32 %4210, i32* %3
%4211 = load i32, i32* %3
%4212 = xor i32 %4211, 81954
store i32 %4212, i32* %3
%4213 = load i32, i32* %3
%4214 = srem i32 %4213, 268435443
store i32 %4214, i32* %3
%4215 = load i32, i32* %3
%4216 = add nsw i32 %4215, 6
store i32 %4216, i32* %3
%4217 = load i32, i32* %3
%4218 = mul nsw i32 %4217, 10
store i32 %4218, i32* %3
%4219 = load i32, i32* %3
%4220 = add nsw i32 %4219, 1
store i32 %4220, i32* %3
%4221 = load i32, i32* %3
%4222 = mul nsw i32 %4221, 2
store i32 %4222, i32* %3
%4223 = load i32, i32* %3
%4224 = sub nsw i32 %4223, 1
store i32 %4224, i32* %3
%4225 = load i32, i32* %3
%4226 = and i32 %4225, -1044481
store i32 %4226, i32* %3
%4227 = load i32, i32* %3
%4228 = xor i32 %4227, 81954
store i32 %4228, i32* %3
%4229 = load i32, i32* %3
%4230 = srem i32 %4229, 268435443
store i32 %4230, i32* %3
%4231 = load i32, i32* %3
%4232 = add nsw i32 %4231, 6
store i32 %4232, i32* %3
%4233 = load i32, i32* %3
%4234 = mul nsw i32 %4233, 10
store i32 %4234, i32* %3
%4235 = load i32, i32* %3
%4236 = add nsw i32 %4235, 1
store i32 %4236, i32* %3
%4237 = load i32, i32* %3
%4238 = mul nsw i32 %4237, 2
store i32 %4238, i32* %3
%4239 = load i32, i32* %3
%4240 = sub nsw i32 %4239, 1
store i32 %4240, i32* %3
%4241 = load i32, i32* %3
%4242 = and i32 %4241, -1044481
store i32 %4242, i32* %3
%4243 = load i32, i32* %3
%4244 = xor i32 %4243, 81954
store i32 %4244, i32* %3
%4245 = load i32, i32* %3
%4246 = srem i32 %4245, 268435443
store i32 %4246, i32* %3
%4247 = load i32, i32* %3
%4248 = add nsw i32 %4247, 6
store i32 %4248, i32* %3
%4249 = load i32, i32* %3
%4250 = mul nsw i32 %4249, 10
store i32 %4250, i32* %3
%4251 = load i32, i32* %3
%4252 = add nsw i32 %4251, 1
store i32 %4252, i32* %3
%4253 = load i32, i32* %3
%4254 = mul nsw i32 %4253, 2
store i32 %4254, i32* %3
%4255 = load i32, i32* %3
%4256 = sub nsw i32 %4255, 1
store i32 %4256, i32* %3
%4257 = load i32, i32* %3
%4258 = and i32 %4257, -1044481
store i32 %4258, i32* %3
%4259 = load i32, i32* %3
%4260 = xor i32 %4259, 81954
store i32 %4260, i32* %3
%4261 = load i32, i32* %3
%4262 = srem i32 %4261, 268435443
store i32 %4262, i32* %3
%4263 = load i32, i32* %3
%4264 = add nsw i32 %4263, 6
store i32 %4264, i32* %3
%4265 = load i32, i32* %3
%4266 = mul nsw i32 %4265, 10
store i32 %4266, i32* %3
%4267 = load i32, i32* %3
%4268 = add nsw i32 %4267, 1
store i32 %4268, i32* %3
%4269 = load i32, i32* %3
%4270 = mul nsw i32 %4269, 2
store i32 %4270, i32* %3
%4271 = load i32, i32* %3
%4272 = sub nsw i32 %4271, 1
store i32 %4272, i32* %3
%4273 = load i32, i32* %3
%4274 = and i32 %4273, -1044481
store i32 %4274, i32* %3
%4275 = load i32, i32* %3
%4276 = xor i32 %4275, 81954
store i32 %4276, i32* %3
%4277 = load i32, i32* %3
%4278 = srem i32 %4277, 268435443
store i32 %4278, i32* %3
%4279 = load i32, i32* %3
%4280 = add nsw i32 %4279, 6
store i32 %4280, i32* %3
%4281 = load i32, i32* %3
%4282 = mul nsw i32 %4281, 10
store i32 %4282, i32* %3
%4283 = load i32, i32* %3
%4284 = add nsw i32 %4283, 1
store i32 %4284, i32* %3
%4285 = load i32, i32* %3
%4286 = mul nsw i32 %4285, 2
store i32 %4286, i32* %3
%4287 = load i32, i32* %3
%4288 = sub nsw i32 %4287, 1
store i32 %4288, i32* %3
%4289 = load i32, i32* %3
%4290 = and i32 %4289, -1044481
store i32 %4290, i32* %3
%4291 = load i32, i32* %3
%4292 = xor i32 %4291, 81954
store i32 %4292, i32* %3
%4293 = load i32, i32* %3
%4294 = srem i32 %4293, 268435443
store i32 %4294, i32* %3
%4295 = load i32, i32* %3
%4296 = add nsw i32 %4295, 6
store i32 %4296, i32* %3
%4297 = load i32, i32* %3
%4298 = mul nsw i32 %4297, 10
store i32 %4298, i32* %3
%4299 = load i32, i32* %3
%4300 = add nsw i32 %4299, 1
store i32 %4300, i32* %3
%4301 = load i32, i32* %3
%4302 = mul nsw i32 %4301, 2
store i32 %4302, i32* %3
%4303 = load i32, i32* %3
%4304 = sub nsw i32 %4303, 1
store i32 %4304, i32* %3
%4305 = load i32, i32* %3
%4306 = and i32 %4305, -1044481
store i32 %4306, i32* %3
%4307 = load i32, i32* %3
%4308 = xor i32 %4307, 81954
store i32 %4308, i32* %3
%4309 = load i32, i32* %3
%4310 = srem i32 %4309, 268435443
store i32 %4310, i32* %3
%4311 = load i32, i32* %3
%4312 = add nsw i32 %4311, 6
store i32 %4312, i32* %3
%4313 = load i32, i32* %3
%4314 = mul nsw i32 %4313, 10
store i32 %4314, i32* %3
%4315 = load i32, i32* %3
%4316 = add nsw i32 %4315, 1
store i32 %4316, i32* %3
%4317 = load i32, i32* %3
%4318 = mul nsw i32 %4317, 2
store i32 %4318, i32* %3
%4319 = load i32, i32* %3
%4320 = sub nsw i32 %4319, 1
store i32 %4320, i32* %3
%4321 = load i32, i32* %3
%4322 = and i32 %4321, -1044481
store i32 %4322, i32* %3
%4323 = load i32, i32* %3
%4324 = xor i32 %4323, 81954
store i32 %4324, i32* %3
%4325 = load i32, i32* %3
%4326 = srem i32 %4325, 268435443
store i32 %4326, i32* %3
%4327 = load i32, i32* %3
%4328 = add nsw i32 %4327, 6
store i32 %4328, i32* %3
%4329 = load i32, i32* %3
%4330 = mul nsw i32 %4329, 10
store i32 %4330, i32* %3
%4331 = load i32, i32* %3
%4332 = add nsw i32 %4331, 1
store i32 %4332, i32* %3
%4333 = load i32, i32* %3
%4334 = mul nsw i32 %4333, 2
store i32 %4334, i32* %3
%4335 = load i32, i32* %3
%4336 = sub nsw i32 %4335, 1
store i32 %4336, i32* %3
%4337 = load i32, i32* %3
%4338 = and i32 %4337, -1044481
store i32 %4338, i32* %3
%4339 = load i32, i32* %3
%4340 = xor i32 %4339, 81954
store i32 %4340, i32* %3
%4341 = load i32, i32* %3
%4342 = srem i32 %4341, 268435443
store i32 %4342, i32* %3
%4343 = load i32, i32* %3
%4344 = add nsw i32 %4343, 6
store i32 %4344, i32* %3
%4345 = load i32, i32* %3
%4346 = mul nsw i32 %4345, 10
store i32 %4346, i32* %3
%4347 = load i32, i32* %3
%4348 = add nsw i32 %4347, 1
store i32 %4348, i32* %3
%4349 = load i32, i32* %3
%4350 = mul nsw i32 %4349, 2
store i32 %4350, i32* %3
%4351 = load i32, i32* %3
%4352 = sub nsw i32 %4351, 1
store i32 %4352, i32* %3
%4353 = load i32, i32* %3
%4354 = and i32 %4353, -1044481
store i32 %4354, i32* %3
%4355 = load i32, i32* %3
%4356 = xor i32 %4355, 81954
store i32 %4356, i32* %3
%4357 = load i32, i32* %3
%4358 = srem i32 %4357, 268435443
store i32 %4358, i32* %3
%4359 = load i32, i32* %3
%4360 = add nsw i32 %4359, 6
store i32 %4360, i32* %3
%4361 = load i32, i32* %3
%4362 = mul nsw i32 %4361, 10
store i32 %4362, i32* %3
%4363 = load i32, i32* %3
%4364 = add nsw i32 %4363, 1
store i32 %4364, i32* %3
%4365 = load i32, i32* %3
%4366 = mul nsw i32 %4365, 2
store i32 %4366, i32* %3
%4367 = load i32, i32* %3
%4368 = sub nsw i32 %4367, 1
store i32 %4368, i32* %3
%4369 = load i32, i32* %3
%4370 = and i32 %4369, -1044481
store i32 %4370, i32* %3
%4371 = load i32, i32* %3
%4372 = xor i32 %4371, 81954
store i32 %4372, i32* %3
%4373 = load i32, i32* %3
%4374 = srem i32 %4373, 268435443
store i32 %4374, i32* %3
%4375 = load i32, i32* %3
%4376 = add nsw i32 %4375, 6
store i32 %4376, i32* %3
%4377 = load i32, i32* %3
%4378 = mul nsw i32 %4377, 10
store i32 %4378, i32* %3
%4379 = load i32, i32* %3
%4380 = add nsw i32 %4379, 1
store i32 %4380, i32* %3
%4381 = load i32, i32* %3
%4382 = mul nsw i32 %4381, 2
store i32 %4382, i32* %3
%4383 = load i32, i32* %3
%4384 = sub nsw i32 %4383, 1
store i32 %4384, i32* %3
%4385 = load i32, i32* %3
%4386 = and i32 %4385, -1044481
store i32 %4386, i32* %3
%4387 = load i32, i32* %3
%4388 = xor i32 %4387, 81954
store i32 %4388, i32* %3
%4389 = load i32, i32* %3
%4390 = srem i32 %4389, 268435443
store i32 %4390, i32* %3
%4391 = load i32, i32* %3
%4392 = add nsw i32 %4391, 6
store i32 %4392, i32* %3
%4393 = load i32, i32* %3
%4394 = mul nsw i32 %4393, 10
store i32 %4394, i32* %3
%4395 = load i32, i32* %3
%4396 = add nsw i32 %4395, 1
store i32 %4396, i32* %3
%4397 = load i32, i32* %3
%4398 = mul nsw i32 %4397, 2
store i32 %4398, i32* %3
%4399 = load i32, i32* %3
%4400 = sub nsw i32 %4399, 1
store i32 %4400, i32* %3
%4401 = load i32, i32* %3
%4402 = and i32 %4401, -1044481
store i32 %4402, i32* %3
%4403 = load i32, i32* %3
%4404 = xor i32 %4403, 81954
store i32 %4404, i32* %3
%4405 = load i32, i32* %3
%4406 = srem i32 %4405, 268435443
store i32 %4406, i32* %3
%4407 = load i32, i32* %3
%4408 = add nsw i32 %4407, 6
store i32 %4408, i32* %3
%4409 = load i32, i32* %3
%4410 = mul nsw i32 %4409, 10
store i32 %4410, i32* %3
%4411 = load i32, i32* %3
%4412 = add nsw i32 %4411, 1
store i32 %4412, i32* %3
%4413 = load i32, i32* %3
%4414 = mul nsw i32 %4413, 2
store i32 %4414, i32* %3
%4415 = load i32, i32* %3
%4416 = sub nsw i32 %4415, 1
store i32 %4416, i32* %3
%4417 = load i32, i32* %3
%4418 = and i32 %4417, -1044481
store i32 %4418, i32* %3
%4419 = load i32, i32* %3
%4420 = xor i32 %4419, 81954
store i32 %4420, i32* %3
%4421 = load i32, i32* %3
%4422 = srem i32 %4421, 268435443
store i32 %4422, i32* %3
%4423 = load i32, i32* %3
%4424 = add nsw i32 %4423, 6
store i32 %4424, i32* %3
%4425 = load i32, i32* %3
%4426 = mul nsw i32 %4425, 10
store i32 %4426, i32* %3
%4427 = load i32, i32* %3
%4428 = add nsw i32 %4427, 1
store i32 %4428, i32* %3
%4429 = load i32, i32* %3
%4430 = mul nsw i32 %4429, 2
store i32 %4430, i32* %3
%4431 = load i32, i32* %3
%4432 = sub nsw i32 %4431, 1
store i32 %4432, i32* %3
%4433 = load i32, i32* %3
%4434 = and i32 %4433, -1044481
store i32 %4434, i32* %3
%4435 = load i32, i32* %3
%4436 = xor i32 %4435, 81954
store i32 %4436, i32* %3
%4437 = load i32, i32* %3
%4438 = srem i32 %4437, 268435443
store i32 %4438, i32* %3
%4439 = load i32, i32* %3
%4440 = add nsw i32 %4439, 6
store i32 %4440, i32* %3
%4441 = load i32, i32* %3
%4442 = mul nsw i32 %4441, 10
store i32 %4442, i32* %3
%4443 = load i32, i32* %3
%4444 = add nsw i32 %4443, 1
store i32 %4444, i32* %3
%4445 = load i32, i32* %3
%4446 = mul nsw i32 %4445, 2
store i32 %4446, i32* %3
%4447 = load i32, i32* %3
%4448 = sub nsw i32 %4447, 1
store i32 %4448, i32* %3
%4449 = load i32, i32* %3
%4450 = and i32 %4449, -1044481
store i32 %4450, i32* %3
%4451 = load i32, i32* %3
%4452 = xor i32 %4451, 81954
store i32 %4452, i32* %3
%4453 = load i32, i32* %3
%4454 = srem i32 %4453, 268435443
store i32 %4454, i32* %3
%4455 = load i32, i32* %3
%4456 = add nsw i32 %4455, 6
store i32 %4456, i32* %3
%4457 = load i32, i32* %3
%4458 = mul nsw i32 %4457, 10
store i32 %4458, i32* %3
%4459 = load i32, i32* %3
%4460 = add nsw i32 %4459, 1
store i32 %4460, i32* %3
%4461 = load i32, i32* %3
%4462 = mul nsw i32 %4461, 2
store i32 %4462, i32* %3
%4463 = load i32, i32* %3
%4464 = sub nsw i32 %4463, 1
store i32 %4464, i32* %3
%4465 = load i32, i32* %3
%4466 = and i32 %4465, -1044481
store i32 %4466, i32* %3
%4467 = load i32, i32* %3
%4468 = xor i32 %4467, 81954
store i32 %4468, i32* %3
%4469 = load i32, i32* %3
%4470 = srem i32 %4469, 268435443
store i32 %4470, i32* %3
%4471 = load i32, i32* %3
%4472 = add nsw i32 %4471, 6
store i32 %4472, i32* %3
%4473 = load i32, i32* %3
%4474 = mul nsw i32 %4473, 10
store i32 %4474, i32* %3
%4475 = load i32, i32* %3
%4476 = add nsw i32 %4475, 1
store i32 %4476, i32* %3
%4477 = load i32, i32* %3
%4478 = mul nsw i32 %4477, 2
store i32 %4478, i32* %3
%4479 = load i32, i32* %3
%4480 = sub nsw i32 %4479, 1
store i32 %4480, i32* %3
%4481 = load i32, i32* %3
%4482 = and i32 %4481, -1044481
store i32 %4482, i32* %3
%4483 = load i32, i32* %3
%4484 = xor i32 %4483, 81954
store i32 %4484, i32* %3
%4485 = load i32, i32* %3
%4486 = srem i32 %4485, 268435443
store i32 %4486, i32* %3
%4487 = load i32, i32* %3
%4488 = add nsw i32 %4487, 6
store i32 %4488, i32* %3
%4489 = load i32, i32* %3
%4490 = mul nsw i32 %4489, 10
store i32 %4490, i32* %3
%4491 = load i32, i32* %3
%4492 = add nsw i32 %4491, 1
store i32 %4492, i32* %3
%4493 = load i32, i32* %3
%4494 = mul nsw i32 %4493, 2
store i32 %4494, i32* %3
%4495 = load i32, i32* %3
%4496 = sub nsw i32 %4495, 1
store i32 %4496, i32* %3
%4497 = load i32, i32* %3
%4498 = and i32 %4497, -1044481
store i32 %4498, i32* %3
%4499 = load i32, i32* %3
%4500 = xor i32 %4499, 81954
store i32 %4500, i32* %3
%4501 = load i32, i32* %3
%4502 = srem i32 %4501, 268435443
store i32 %4502, i32* %3
%4503 = load i32, i32* %3
%4504 = add nsw i32 %4503, 6
store i32 %4504, i32* %3
%4505 = load i32, i32* %3
%4506 = mul nsw i32 %4505, 10
store i32 %4506, i32* %3
%4507 = load i32, i32* %3
%4508 = add nsw i32 %4507, 1
store i32 %4508, i32* %3
%4509 = load i32, i32* %3
%4510 = mul nsw i32 %4509, 2
store i32 %4510, i32* %3
%4511 = load i32, i32* %3
%4512 = sub nsw i32 %4511, 1
store i32 %4512, i32* %3
%4513 = load i32, i32* %3
%4514 = and i32 %4513, -1044481
store i32 %4514, i32* %3
%4515 = load i32, i32* %3
%4516 = xor i32 %4515, 81954
store i32 %4516, i32* %3
%4517 = load i32, i32* %3
%4518 = srem i32 %4517, 268435443
store i32 %4518, i32* %3
%4519 = load i32, i32* %3
%4520 = add nsw i32 %4519, 6
store i32 %4520, i32* %3
%4521 = load i32, i32* %3
%4522 = mul nsw i32 %4521, 10
store i32 %4522, i32* %3
%4523 = load i32, i32* %3
%4524 = add nsw i32 %4523, 1
store i32 %4524, i32* %3
%4525 = load i32, i32* %3
%4526 = mul nsw i32 %4525, 2
store i32 %4526, i32* %3
%4527 = load i32, i32* %3
%4528 = sub nsw i32 %4527, 1
store i32 %4528, i32* %3
%4529 = load i32, i32* %3
%4530 = and i32 %4529, -1044481
store i32 %4530, i32* %3
%4531 = load i32, i32* %3
%4532 = xor i32 %4531, 81954
store i32 %4532, i32* %3
%4533 = load i32, i32* %3
%4534 = srem i32 %4533, 268435443
store i32 %4534, i32* %3
%4535 = load i32, i32* %3
%4536 = add nsw i32 %4535, 6
store i32 %4536, i32* %3
%4537 = load i32, i32* %3
%4538 = mul nsw i32 %4537, 10
store i32 %4538, i32* %3
%4539 = load i32, i32* %3
%4540 = add nsw i32 %4539, 1
store i32 %4540, i32* %3
%4541 = load i32, i32* %3
%4542 = mul nsw i32 %4541, 2
store i32 %4542, i32* %3
%4543 = load i32, i32* %3
%4544 = sub nsw i32 %4543, 1
store i32 %4544, i32* %3
%4545 = load i32, i32* %3
%4546 = and i32 %4545, -1044481
store i32 %4546, i32* %3
%4547 = load i32, i32* %3
%4548 = xor i32 %4547, 81954
store i32 %4548, i32* %3
%4549 = load i32, i32* %3
%4550 = srem i32 %4549, 268435443
store i32 %4550, i32* %3
%4551 = load i32, i32* %3
%4552 = add nsw i32 %4551, 6
store i32 %4552, i32* %3
%4553 = load i32, i32* %3
%4554 = mul nsw i32 %4553, 10
store i32 %4554, i32* %3
%4555 = load i32, i32* %3
%4556 = add nsw i32 %4555, 1
store i32 %4556, i32* %3
%4557 = load i32, i32* %3
%4558 = mul nsw i32 %4557, 2
store i32 %4558, i32* %3
%4559 = load i32, i32* %3
%4560 = sub nsw i32 %4559, 1
store i32 %4560, i32* %3
%4561 = load i32, i32* %3
%4562 = and i32 %4561, -1044481
store i32 %4562, i32* %3
%4563 = load i32, i32* %3
%4564 = xor i32 %4563, 81954
store i32 %4564, i32* %3
%4565 = load i32, i32* %3
%4566 = srem i32 %4565, 268435443
store i32 %4566, i32* %3
%4567 = load i32, i32* %3
%4568 = add nsw i32 %4567, 6
store i32 %4568, i32* %3
%4569 = load i32, i32* %3
%4570 = mul nsw i32 %4569, 10
store i32 %4570, i32* %3
%4571 = load i32, i32* %3
%4572 = add nsw i32 %4571, 1
store i32 %4572, i32* %3
%4573 = load i32, i32* %3
%4574 = mul nsw i32 %4573, 2
store i32 %4574, i32* %3
%4575 = load i32, i32* %3
%4576 = sub nsw i32 %4575, 1
store i32 %4576, i32* %3
%4577 = load i32, i32* %3
%4578 = and i32 %4577, -1044481
store i32 %4578, i32* %3
%4579 = load i32, i32* %3
%4580 = xor i32 %4579, 81954
store i32 %4580, i32* %3
%4581 = load i32, i32* %3
%4582 = srem i32 %4581, 268435443
store i32 %4582, i32* %3
%4583 = load i32, i32* %3
%4584 = add nsw i32 %4583, 6
store i32 %4584, i32* %3
%4585 = load i32, i32* %3
%4586 = mul nsw i32 %4585, 10
store i32 %4586, i32* %3
%4587 = load i32, i32* %3
%4588 = add nsw i32 %4587, 1
store i32 %4588, i32* %3
%4589 = load i32, i32* %3
%4590 = mul nsw i32 %4589, 2
store i32 %4590, i32* %3
%4591 = load i32, i32* %3
%4592 = sub nsw i32 %4591, 1
store i32 %4592, i32* %3
%4593 = load i32, i32* %3
%4594 = and i32 %4593, -1044481
store i32 %4594, i32* %3
%4595 = load i32, i32* %3
%4596 = xor i32 %4595, 81954
store i32 %4596, i32* %3
%4597 = load i32, i32* %3
%4598 = srem i32 %4597, 268435443
store i32 %4598, i32* %3
%4599 = load i32, i32* %3
%4600 = add nsw i32 %4599, 6
store i32 %4600, i32* %3
%4601 = load i32, i32* %3
%4602 = mul nsw i32 %4601, 10
store i32 %4602, i32* %3
%4603 = load i32, i32* %3
%4604 = add nsw i32 %4603, 1
store i32 %4604, i32* %3
%4605 = load i32, i32* %3
%4606 = mul nsw i32 %4605, 2
store i32 %4606, i32* %3
%4607 = load i32, i32* %3
%4608 = sub nsw i32 %4607, 1
store i32 %4608, i32* %3
%4609 = load i32, i32* %3
%4610 = and i32 %4609, -1044481
store i32 %4610, i32* %3
%4611 = load i32, i32* %3
%4612 = xor i32 %4611, 81954
store i32 %4612, i32* %3
%4613 = load i32, i32* %3
%4614 = srem i32 %4613, 268435443
store i32 %4614, i32* %3
%4615 = load i32, i32* %3
%4616 = add nsw i32 %4615, 6
store i32 %4616, i32* %3
%4617 = load i32, i32* %3
%4618 = mul nsw i32 %4617, 10
store i32 %4618, i32* %3
%4619 = load i32, i32* %3
%4620 = add nsw i32 %4619, 1
store i32 %4620, i32* %3
%4621 = load i32, i32* %3
%4622 = mul nsw i32 %4621, 2
store i32 %4622, i32* %3
%4623 = load i32, i32* %3
%4624 = sub nsw i32 %4623, 1
store i32 %4624, i32* %3
%4625 = load i32, i32* %3
%4626 = and i32 %4625, -1044481
store i32 %4626, i32* %3
%4627 = load i32, i32* %3
%4628 = xor i32 %4627, 81954
store i32 %4628, i32* %3
%4629 = load i32, i32* %3
%4630 = srem i32 %4629, 268435443
store i32 %4630, i32* %3
%4631 = load i32, i32* %3
%4632 = add nsw i32 %4631, 6
store i32 %4632, i32* %3
%4633 = load i32, i32* %3
%4634 = mul nsw i32 %4633, 10
store i32 %4634, i32* %3
%4635 = load i32, i32* %3
%4636 = add nsw i32 %4635, 1
store i32 %4636, i32* %3
%4637 = load i32, i32* %3
%4638 = mul nsw i32 %4637, 2
store i32 %4638, i32* %3
%4639 = load i32, i32* %3
%4640 = sub nsw i32 %4639, 1
store i32 %4640, i32* %3
%4641 = load i32, i32* %3
%4642 = and i32 %4641, -1044481
store i32 %4642, i32* %3
%4643 = load i32, i32* %3
%4644 = xor i32 %4643, 81954
store i32 %4644, i32* %3
%4645 = load i32, i32* %3
%4646 = srem i32 %4645, 268435443
store i32 %4646, i32* %3
%4647 = load i32, i32* %3
%4648 = add nsw i32 %4647, 6
store i32 %4648, i32* %3
%4649 = load i32, i32* %3
%4650 = mul nsw i32 %4649, 10
store i32 %4650, i32* %3
%4651 = load i32, i32* %3
%4652 = add nsw i32 %4651, 1
store i32 %4652, i32* %3
%4653 = load i32, i32* %3
%4654 = mul nsw i32 %4653, 2
store i32 %4654, i32* %3
%4655 = load i32, i32* %3
%4656 = sub nsw i32 %4655, 1
store i32 %4656, i32* %3
%4657 = load i32, i32* %3
%4658 = and i32 %4657, -1044481
store i32 %4658, i32* %3
%4659 = load i32, i32* %3
%4660 = xor i32 %4659, 81954
store i32 %4660, i32* %3
%4661 = load i32, i32* %3
%4662 = srem i32 %4661, 268435443
store i32 %4662, i32* %3
%4663 = load i32, i32* %3
%4664 = add nsw i32 %4663, 6
store i32 %4664, i32* %3
%4665 = load i32, i32* %3
%4666 = mul nsw i32 %4665, 10
store i32 %4666, i32* %3
%4667 = load i32, i32* %3
%4668 = add nsw i32 %4667, 1
store i32 %4668, i32* %3
%4669 = load i32, i32* %3
%4670 = mul nsw i32 %4669, 2
store i32 %4670, i32* %3
%4671 = load i32, i32* %3
%4672 = sub nsw i32 %4671, 1
store i32 %4672, i32* %3
%4673 = load i32, i32* %3
%4674 = and i32 %4673, -1044481
store i32 %4674, i32* %3
%4675 = load i32, i32* %3
%4676 = xor i32 %4675, 81954
store i32 %4676, i32* %3
%4677 = load i32, i32* %3
%4678 = srem i32 %4677, 268435443
store i32 %4678, i32* %3
%4679 = load i32, i32* %3
%4680 = add nsw i32 %4679, 6
store i32 %4680, i32* %3
%4681 = load i32, i32* %3
%4682 = mul nsw i32 %4681, 10
store i32 %4682, i32* %3
%4683 = load i32, i32* %3
%4684 = add nsw i32 %4683, 1
store i32 %4684, i32* %3
%4685 = load i32, i32* %3
%4686 = mul nsw i32 %4685, 2
store i32 %4686, i32* %3
%4687 = load i32, i32* %3
%4688 = sub nsw i32 %4687, 1
store i32 %4688, i32* %3
%4689 = load i32, i32* %3
%4690 = and i32 %4689, -1044481
store i32 %4690, i32* %3
%4691 = load i32, i32* %3
%4692 = xor i32 %4691, 81954
store i32 %4692, i32* %3
%4693 = load i32, i32* %3
%4694 = srem i32 %4693, 268435443
store i32 %4694, i32* %3
%4695 = load i32, i32* %3
%4696 = add nsw i32 %4695, 6
store i32 %4696, i32* %3
%4697 = load i32, i32* %3
%4698 = mul nsw i32 %4697, 10
store i32 %4698, i32* %3
%4699 = load i32, i32* %3
%4700 = add nsw i32 %4699, 1
store i32 %4700, i32* %3
%4701 = load i32, i32* %3
%4702 = mul nsw i32 %4701, 2
store i32 %4702, i32* %3
%4703 = load i32, i32* %3
%4704 = sub nsw i32 %4703, 1
store i32 %4704, i32* %3
%4705 = load i32, i32* %3
%4706 = and i32 %4705, -1044481
store i32 %4706, i32* %3
%4707 = load i32, i32* %3
%4708 = xor i32 %4707, 81954
store i32 %4708, i32* %3
%4709 = load i32, i32* %3
%4710 = srem i32 %4709, 268435443
store i32 %4710, i32* %3
%4711 = load i32, i32* %3
%4712 = add nsw i32 %4711, 6
store i32 %4712, i32* %3
%4713 = load i32, i32* %3
%4714 = mul nsw i32 %4713, 10
store i32 %4714, i32* %3
%4715 = load i32, i32* %3
%4716 = add nsw i32 %4715, 1
store i32 %4716, i32* %3
%4717 = load i32, i32* %3
%4718 = mul nsw i32 %4717, 2
store i32 %4718, i32* %3
%4719 = load i32, i32* %3
%4720 = sub nsw i32 %4719, 1
store i32 %4720, i32* %3
%4721 = load i32, i32* %3
%4722 = and i32 %4721, -1044481
store i32 %4722, i32* %3
%4723 = load i32, i32* %3
%4724 = xor i32 %4723, 81954
store i32 %4724, i32* %3
%4725 = load i32, i32* %3
%4726 = srem i32 %4725, 268435443
store i32 %4726, i32* %3
%4727 = load i32, i32* %3
%4728 = add nsw i32 %4727, 6
store i32 %4728, i32* %3
%4729 = load i32, i32* %3
%4730 = mul nsw i32 %4729, 10
store i32 %4730, i32* %3
%4731 = load i32, i32* %3
%4732 = add nsw i32 %4731, 1
store i32 %4732, i32* %3
%4733 = load i32, i32* %3
%4734 = mul nsw i32 %4733, 2
store i32 %4734, i32* %3
%4735 = load i32, i32* %3
%4736 = sub nsw i32 %4735, 1
store i32 %4736, i32* %3
%4737 = load i32, i32* %3
%4738 = and i32 %4737, -1044481
store i32 %4738, i32* %3
%4739 = load i32, i32* %3
%4740 = xor i32 %4739, 81954
store i32 %4740, i32* %3
%4741 = load i32, i32* %3
%4742 = srem i32 %4741, 268435443
store i32 %4742, i32* %3
%4743 = load i32, i32* %3
%4744 = add nsw i32 %4743, 6
store i32 %4744, i32* %3
%4745 = load i32, i32* %3
%4746 = mul nsw i32 %4745, 10
store i32 %4746, i32* %3
%4747 = load i32, i32* %3
%4748 = add nsw i32 %4747, 1
store i32 %4748, i32* %3
%4749 = load i32, i32* %3
%4750 = mul nsw i32 %4749, 2
store i32 %4750, i32* %3
%4751 = load i32, i32* %3
%4752 = sub nsw i32 %4751, 1
store i32 %4752, i32* %3
%4753 = load i32, i32* %3
%4754 = and i32 %4753, -1044481
store i32 %4754, i32* %3
%4755 = load i32, i32* %3
%4756 = xor i32 %4755, 81954
store i32 %4756, i32* %3
%4757 = load i32, i32* %3
%4758 = srem i32 %4757, 268435443
store i32 %4758, i32* %3
%4759 = load i32, i32* %3
%4760 = add nsw i32 %4759, 6
store i32 %4760, i32* %3
%4761 = load i32, i32* %3
%4762 = mul nsw i32 %4761, 10
store i32 %4762, i32* %3
%4763 = load i32, i32* %3
%4764 = add nsw i32 %4763, 1
store i32 %4764, i32* %3
%4765 = load i32, i32* %3
%4766 = mul nsw i32 %4765, 2
store i32 %4766, i32* %3
%4767 = load i32, i32* %3
%4768 = sub nsw i32 %4767, 1
store i32 %4768, i32* %3
%4769 = load i32, i32* %3
%4770 = and i32 %4769, -1044481
store i32 %4770, i32* %3
%4771 = load i32, i32* %3
%4772 = xor i32 %4771, 81954
store i32 %4772, i32* %3
%4773 = load i32, i32* %3
%4774 = srem i32 %4773, 268435443
store i32 %4774, i32* %3
%4775 = load i32, i32* %3
%4776 = add nsw i32 %4775, 6
store i32 %4776, i32* %3
%4777 = load i32, i32* %3
%4778 = mul nsw i32 %4777, 10
store i32 %4778, i32* %3
%4779 = load i32, i32* %3
%4780 = add nsw i32 %4779, 1
store i32 %4780, i32* %3
%4781 = load i32, i32* %3
%4782 = mul nsw i32 %4781, 2
store i32 %4782, i32* %3
%4783 = load i32, i32* %3
%4784 = sub nsw i32 %4783, 1
store i32 %4784, i32* %3
%4785 = load i32, i32* %3
%4786 = and i32 %4785, -1044481
store i32 %4786, i32* %3
%4787 = load i32, i32* %3
%4788 = xor i32 %4787, 81954
store i32 %4788, i32* %3
%4789 = load i32, i32* %3
%4790 = srem i32 %4789, 268435443
store i32 %4790, i32* %3
%4791 = load i32, i32* %3
%4792 = add nsw i32 %4791, 6
store i32 %4792, i32* %3
%4793 = load i32, i32* %3
%4794 = mul nsw i32 %4793, 10
store i32 %4794, i32* %3
%4795 = load i32, i32* %3
%4796 = add nsw i32 %4795, 1
store i32 %4796, i32* %3
%4797 = load i32, i32* %3
%4798 = mul nsw i32 %4797, 2
store i32 %4798, i32* %3
%4799 = load i32, i32* %3
%4800 = sub nsw i32 %4799, 1
store i32 %4800, i32* %3
%4801 = load i32, i32* %3
%4802 = and i32 %4801, -1044481
store i32 %4802, i32* %3
%4803 = load i32, i32* %3
%4804 = xor i32 %4803, 81954
store i32 %4804, i32* %3
%4805 = load i32, i32* %3
%4806 = srem i32 %4805, 268435443
store i32 %4806, i32* %3
%4807 = load i32, i32* %3
%4808 = add nsw i32 %4807, 6
store i32 %4808, i32* %3
%4809 = load i32, i32* %3
%4810 = mul nsw i32 %4809, 10
store i32 %4810, i32* %3
%4811 = load i32, i32* %3
%4812 = add nsw i32 %4811, 1
store i32 %4812, i32* %3
%4813 = load i32, i32* %3
%4814 = mul nsw i32 %4813, 2
store i32 %4814, i32* %3
%4815 = load i32, i32* %3
%4816 = sub nsw i32 %4815, 1
store i32 %4816, i32* %3
%4817 = load i32, i32* %3
%4818 = and i32 %4817, -1044481
store i32 %4818, i32* %3
%4819 = load i32, i32* %3
%4820 = xor i32 %4819, 81954
store i32 %4820, i32* %3
%4821 = load i32, i32* %3
%4822 = srem i32 %4821, 268435443
store i32 %4822, i32* %3
%4823 = load i32, i32* %3
%4824 = add nsw i32 %4823, 6
store i32 %4824, i32* %3
%4825 = load i32, i32* %3
%4826 = mul nsw i32 %4825, 10
store i32 %4826, i32* %3
%4827 = load i32, i32* %3
%4828 = add nsw i32 %4827, 1
store i32 %4828, i32* %3
%4829 = load i32, i32* %3
%4830 = mul nsw i32 %4829, 2
store i32 %4830, i32* %3
%4831 = load i32, i32* %3
%4832 = sub nsw i32 %4831, 1
store i32 %4832, i32* %3
%4833 = load i32, i32* %3
%4834 = and i32 %4833, -1044481
store i32 %4834, i32* %3
%4835 = load i32, i32* %3
%4836 = xor i32 %4835, 81954
store i32 %4836, i32* %3
%4837 = load i32, i32* %3
%4838 = srem i32 %4837, 268435443
store i32 %4838, i32* %3
%4839 = load i32, i32* %3
%4840 = add nsw i32 %4839, 6
store i32 %4840, i32* %3
%4841 = load i32, i32* %3
%4842 = mul nsw i32 %4841, 10
store i32 %4842, i32* %3
%4843 = load i32, i32* %3
%4844 = add nsw i32 %4843, 1
store i32 %4844, i32* %3
%4845 = load i32, i32* %3
%4846 = mul nsw i32 %4845, 2
store i32 %4846, i32* %3
%4847 = load i32, i32* %3
%4848 = sub nsw i32 %4847, 1
store i32 %4848, i32* %3
%4849 = load i32, i32* %3
%4850 = and i32 %4849, -1044481
store i32 %4850, i32* %3
%4851 = load i32, i32* %3
%4852 = xor i32 %4851, 81954
store i32 %4852, i32* %3
%4853 = load i32, i32* %3
%4854 = srem i32 %4853, 268435443
store i32 %4854, i32* %3
%4855 = load i32, i32* %3
%4856 = add nsw i32 %4855, 6
store i32 %4856, i32* %3
%4857 = load i32, i32* %3
%4858 = mul nsw i32 %4857, 10
store i32 %4858, i32* %3
%4859 = load i32, i32* %3
%4860 = add nsw i32 %4859, 1
store i32 %4860, i32* %3
%4861 = load i32, i32* %3
%4862 = mul nsw i32 %4861, 2
store i32 %4862, i32* %3
%4863 = load i32, i32* %3
%4864 = sub nsw i32 %4863, 1
store i32 %4864, i32* %3
%4865 = load i32, i32* %3
%4866 = and i32 %4865, -1044481
store i32 %4866, i32* %3
%4867 = load i32, i32* %3
%4868 = xor i32 %4867, 81954
store i32 %4868, i32* %3
%4869 = load i32, i32* %3
%4870 = srem i32 %4869, 268435443
store i32 %4870, i32* %3
%4871 = load i32, i32* %3
%4872 = add nsw i32 %4871, 6
store i32 %4872, i32* %3
%4873 = load i32, i32* %3
%4874 = mul nsw i32 %4873, 10
store i32 %4874, i32* %3
%4875 = load i32, i32* %3
%4876 = add nsw i32 %4875, 1
store i32 %4876, i32* %3
%4877 = load i32, i32* %3
%4878 = mul nsw i32 %4877, 2
store i32 %4878, i32* %3
%4879 = load i32, i32* %3
%4880 = sub nsw i32 %4879, 1
store i32 %4880, i32* %3
%4881 = load i32, i32* %3
%4882 = and i32 %4881, -1044481
store i32 %4882, i32* %3
%4883 = load i32, i32* %3
%4884 = xor i32 %4883, 81954
store i32 %4884, i32* %3
%4885 = load i32, i32* %3
%4886 = srem i32 %4885, 268435443
store i32 %4886, i32* %3
%4887 = load i32, i32* %3
%4888 = add nsw i32 %4887, 6
store i32 %4888, i32* %3
%4889 = load i32, i32* %3
%4890 = mul nsw i32 %4889, 10
store i32 %4890, i32* %3
%4891 = load i32, i32* %3
%4892 = add nsw i32 %4891, 1
store i32 %4892, i32* %3
%4893 = load i32, i32* %3
%4894 = mul nsw i32 %4893, 2
store i32 %4894, i32* %3
%4895 = load i32, i32* %3
%4896 = sub nsw i32 %4895, 1
store i32 %4896, i32* %3
%4897 = load i32, i32* %3
%4898 = and i32 %4897, -1044481
store i32 %4898, i32* %3
%4899 = load i32, i32* %3
%4900 = xor i32 %4899, 81954
store i32 %4900, i32* %3
%4901 = load i32, i32* %3
%4902 = srem i32 %4901, 268435443
store i32 %4902, i32* %3
%4903 = load i32, i32* %3
%4904 = add nsw i32 %4903, 6
store i32 %4904, i32* %3
%4905 = load i32, i32* %3
%4906 = mul nsw i32 %4905, 10
store i32 %4906, i32* %3
%4907 = load i32, i32* %3
%4908 = add nsw i32 %4907, 1
store i32 %4908, i32* %3
%4909 = load i32, i32* %3
%4910 = mul nsw i32 %4909, 2
store i32 %4910, i32* %3
%4911 = load i32, i32* %3
%4912 = sub nsw i32 %4911, 1
store i32 %4912, i32* %3
%4913 = load i32, i32* %3
%4914 = and i32 %4913, -1044481
store i32 %4914, i32* %3
%4915 = load i32, i32* %3
%4916 = xor i32 %4915, 81954
store i32 %4916, i32* %3
%4917 = load i32, i32* %3
%4918 = srem i32 %4917, 268435443
store i32 %4918, i32* %3
%4919 = load i32, i32* %3
%4920 = add nsw i32 %4919, 6
store i32 %4920, i32* %3
%4921 = load i32, i32* %3
%4922 = mul nsw i32 %4921, 10
store i32 %4922, i32* %3
%4923 = load i32, i32* %3
%4924 = add nsw i32 %4923, 1
store i32 %4924, i32* %3
%4925 = load i32, i32* %3
%4926 = mul nsw i32 %4925, 2
store i32 %4926, i32* %3
%4927 = load i32, i32* %3
%4928 = sub nsw i32 %4927, 1
store i32 %4928, i32* %3
%4929 = load i32, i32* %3
%4930 = and i32 %4929, -1044481
store i32 %4930, i32* %3
%4931 = load i32, i32* %3
%4932 = xor i32 %4931, 81954
store i32 %4932, i32* %3
%4933 = load i32, i32* %3
%4934 = srem i32 %4933, 268435443
store i32 %4934, i32* %3
%4935 = load i32, i32* %3
%4936 = add nsw i32 %4935, 6
store i32 %4936, i32* %3
%4937 = load i32, i32* %3
%4938 = mul nsw i32 %4937, 10
store i32 %4938, i32* %3
%4939 = load i32, i32* %3
%4940 = add nsw i32 %4939, 1
store i32 %4940, i32* %3
%4941 = load i32, i32* %3
%4942 = mul nsw i32 %4941, 2
store i32 %4942, i32* %3
%4943 = load i32, i32* %3
%4944 = sub nsw i32 %4943, 1
store i32 %4944, i32* %3
%4945 = load i32, i32* %3
%4946 = and i32 %4945, -1044481
store i32 %4946, i32* %3
%4947 = load i32, i32* %3
%4948 = xor i32 %4947, 81954
store i32 %4948, i32* %3
%4949 = load i32, i32* %3
%4950 = srem i32 %4949, 268435443
store i32 %4950, i32* %3
%4951 = load i32, i32* %3
%4952 = add nsw i32 %4951, 6
store i32 %4952, i32* %3
%4953 = load i32, i32* %3
%4954 = mul nsw i32 %4953, 10
store i32 %4954, i32* %3
%4955 = load i32, i32* %3
%4956 = add nsw i32 %4955, 1
store i32 %4956, i32* %3
%4957 = load i32, i32* %3
%4958 = mul nsw i32 %4957, 2
store i32 %4958, i32* %3
%4959 = load i32, i32* %3
%4960 = sub nsw i32 %4959, 1
store i32 %4960, i32* %3
%4961 = load i32, i32* %3
%4962 = and i32 %4961, -1044481
store i32 %4962, i32* %3
%4963 = load i32, i32* %3
%4964 = xor i32 %4963, 81954
store i32 %4964, i32* %3
%4965 = load i32, i32* %3
%4966 = srem i32 %4965, 268435443
store i32 %4966, i32* %3
%4967 = load i32, i32* %3
%4968 = add nsw i32 %4967, 6
store i32 %4968, i32* %3
%4969 = load i32, i32* %3
%4970 = mul nsw i32 %4969, 10
store i32 %4970, i32* %3
%4971 = load i32, i32* %3
%4972 = add nsw i32 %4971, 1
store i32 %4972, i32* %3
%4973 = load i32, i32* %3
%4974 = mul nsw i32 %4973, 2
store i32 %4974, i32* %3
%4975 = load i32, i32* %3
%4976 = sub nsw i32 %4975, 1
store i32 %4976, i32* %3
%4977 = load i32, i32* %3
%4978 = and i32 %4977, -1044481
store i32 %4978, i32* %3
%4979 = load i32, i32* %3
%4980 = xor i32 %4979, 81954
store i32 %4980, i32* %3
%4981 = load i32, i32* %3
%4982 = srem i32 %4981, 268435443
store i32 %4982, i32* %3
%4983 = load i32, i32* %3
%4984 = add nsw i32 %4983, 6
store i32 %4984, i32* %3
%4985 = load i32, i32* %3
%4986 = mul nsw i32 %4985, 10
store i32 %4986, i32* %3
%4987 = load i32, i32* %3
%4988 = add nsw i32 %4987, 1
store i32 %4988, i32* %3
%4989 = load i32, i32* %3
%4990 = mul nsw i32 %4989, 2
store i32 %4990, i32* %3
%4991 = load i32, i32* %3
%4992 = sub nsw i32 %4991, 1
store i32 %4992, i32* %3
%4993 = load i32, i32* %3
%4994 = and i32 %4993, -1044481
store i32 %4994, i32* %3
%4995 = load i32, i32* %3
%4996 = xor i32 %4995, 81954
store i32 %4996, i32* %3
%4997 = load i32, i32* %3
%4998 = srem i32 %4997, 268435443
store i32 %4998, i32* %3
%4999 = load i32, i32* %3
%5000 = add nsw i32 %4999, 6
store i32 %5000, i32* %3
%5001 = load i32, i32* %3
%5002 = mul nsw i32 %5001, 10
store i32 %5002, i32* %3
%5003 = load i32, i32* %3
%5004 = add nsw i32 %5003, 1
store i32 %5004, i32* %3
%5005 = load i32, i32* %3
%5006 = mul nsw i32 %5005, 2
store i32 %5006, i32* %3
%5007 = load i32, i32* %3
%5008 = sub nsw i32 %5007, 1
store i32 %5008, i32* %3
%5009 = load i32, i32* %3
%5010 = and i32 %5009, -1044481
store i32 %5010, i32* %3
%5011 = load i32, i32* %3
%5012 = xor i32 %5011, 81954
store i32 %5012, i32* %3
%5013 = load i32, i32* %3
%5014 = srem i32 %5013, 268435443
store i32 %5014, i32* %3
%5015 = load i32, i32* %3
%5016 = add nsw i32 %5015, 6
store i32 %5016, i32* %3
%5017 = load i32, i32* %3
%5018 = mul nsw i32 %5017, 10
store i32 %5018, i32* %3
%5019 = load i32, i32* %3
%5020 = add nsw i32 %5019, 1
store i32 %5020, i32* %3
%5021 = load i32, i32* %3
%5022 = mul nsw i32 %5021, 2
store i32 %5022, i32* %3
%5023 = load i32, i32* %3
%5024 = sub nsw i32 %5023, 1
store i32 %5024, i32* %3
%5025 = load i32, i32* %3
%5026 = and i32 %5025, -1044481
store i32 %5026, i32* %3
%5027 = load i32, i32* %3
%5028 = xor i32 %5027, 81954
store i32 %5028, i32* %3
%5029 = load i32, i32* %3
%5030 = srem i32 %5029, 268435443
store i32 %5030, i32* %3
%5031 = load i32, i32* %3
%5032 = add nsw i32 %5031, 6
store i32 %5032, i32* %3
%5033 = load i32, i32* %3
%5034 = mul nsw i32 %5033, 10
store i32 %5034, i32* %3
%5035 = load i32, i32* %3
%5036 = add nsw i32 %5035, 1
store i32 %5036, i32* %3
%5037 = load i32, i32* %3
%5038 = mul nsw i32 %5037, 2
store i32 %5038, i32* %3
%5039 = load i32, i32* %3
%5040 = sub nsw i32 %5039, 1
store i32 %5040, i32* %3
%5041 = load i32, i32* %3
%5042 = and i32 %5041, -1044481
store i32 %5042, i32* %3
%5043 = load i32, i32* %3
%5044 = xor i32 %5043, 81954
store i32 %5044, i32* %3
%5045 = load i32, i32* %3
%5046 = srem i32 %5045, 268435443
store i32 %5046, i32* %3
%5047 = load i32, i32* %3
%5048 = add nsw i32 %5047, 6
store i32 %5048, i32* %3
%5049 = load i32, i32* %3
%5050 = mul nsw i32 %5049, 10
store i32 %5050, i32* %3
%5051 = load i32, i32* %3
%5052 = add nsw i32 %5051, 1
store i32 %5052, i32* %3
%5053 = load i32, i32* %3
%5054 = mul nsw i32 %5053, 2
store i32 %5054, i32* %3
%5055 = load i32, i32* %3
%5056 = sub nsw i32 %5055, 1
store i32 %5056, i32* %3
%5057 = load i32, i32* %3
%5058 = and i32 %5057, -1044481
store i32 %5058, i32* %3
%5059 = load i32, i32* %3
%5060 = xor i32 %5059, 81954
store i32 %5060, i32* %3
%5061 = load i32, i32* %3
%5062 = srem i32 %5061, 268435443
store i32 %5062, i32* %3
%5063 = load i32, i32* %3
%5064 = add nsw i32 %5063, 6
store i32 %5064, i32* %3
%5065 = load i32, i32* %3
%5066 = mul nsw i32 %5065, 10
store i32 %5066, i32* %3
%5067 = load i32, i32* %3
%5068 = add nsw i32 %5067, 1
store i32 %5068, i32* %3
%5069 = load i32, i32* %3
%5070 = mul nsw i32 %5069, 2
store i32 %5070, i32* %3
%5071 = load i32, i32* %3
%5072 = sub nsw i32 %5071, 1
store i32 %5072, i32* %3
%5073 = load i32, i32* %3
%5074 = and i32 %5073, -1044481
store i32 %5074, i32* %3
%5075 = load i32, i32* %3
%5076 = xor i32 %5075, 81954
store i32 %5076, i32* %3
%5077 = load i32, i32* %3
%5078 = srem i32 %5077, 268435443
store i32 %5078, i32* %3
%5079 = load i32, i32* %3
%5080 = add nsw i32 %5079, 6
store i32 %5080, i32* %3
%5081 = load i32, i32* %3
%5082 = mul nsw i32 %5081, 10
store i32 %5082, i32* %3
%5083 = load i32, i32* %3
%5084 = add nsw i32 %5083, 1
store i32 %5084, i32* %3
%5085 = load i32, i32* %3
%5086 = mul nsw i32 %5085, 2
store i32 %5086, i32* %3
%5087 = load i32, i32* %3
%5088 = sub nsw i32 %5087, 1
store i32 %5088, i32* %3
%5089 = load i32, i32* %3
%5090 = and i32 %5089, -1044481
store i32 %5090, i32* %3
%5091 = load i32, i32* %3
%5092 = xor i32 %5091, 81954
store i32 %5092, i32* %3
%5093 = load i32, i32* %3
%5094 = srem i32 %5093, 268435443
store i32 %5094, i32* %3
%5095 = load i32, i32* %3
%5096 = add nsw i32 %5095, 6
store i32 %5096, i32* %3
%5097 = load i32, i32* %3
%5098 = mul nsw i32 %5097, 10
store i32 %5098, i32* %3
%5099 = load i32, i32* %3
%5100 = add nsw i32 %5099, 1
store i32 %5100, i32* %3
%5101 = load i32, i32* %3
%5102 = mul nsw i32 %5101, 2
store i32 %5102, i32* %3
%5103 = load i32, i32* %3
%5104 = sub nsw i32 %5103, 1
store i32 %5104, i32* %3
%5105 = load i32, i32* %3
%5106 = and i32 %5105, -1044481
store i32 %5106, i32* %3
%5107 = load i32, i32* %3
%5108 = xor i32 %5107, 81954
store i32 %5108, i32* %3
%5109 = load i32, i32* %3
%5110 = srem i32 %5109, 268435443
store i32 %5110, i32* %3
%5111 = load i32, i32* %3
%5112 = add nsw i32 %5111, 6
store i32 %5112, i32* %3
%5113 = load i32, i32* %3
%5114 = mul nsw i32 %5113, 10
store i32 %5114, i32* %3
%5115 = load i32, i32* %3
%5116 = add nsw i32 %5115, 1
store i32 %5116, i32* %3
%5117 = load i32, i32* %3
%5118 = mul nsw i32 %5117, 2
store i32 %5118, i32* %3
%5119 = load i32, i32* %3
%5120 = sub nsw i32 %5119, 1
store i32 %5120, i32* %3
%5121 = load i32, i32* %3
%5122 = and i32 %5121, -1044481
store i32 %5122, i32* %3
%5123 = load i32, i32* %3
%5124 = xor i32 %5123, 81954
store i32 %5124, i32* %3
%5125 = load i32, i32* %3
%5126 = srem i32 %5125, 268435443
store i32 %5126, i32* %3
%5127 = load i32, i32* %3
%5128 = add nsw i32 %5127, 6
store i32 %5128, i32* %3
%5129 = load i32, i32* %3
%5130 = mul nsw i32 %5129, 10
store i32 %5130, i32* %3
%5131 = load i32, i32* %3
%5132 = add nsw i32 %5131, 1
store i32 %5132, i32* %3
%5133 = load i32, i32* %3
%5134 = mul nsw i32 %5133, 2
store i32 %5134, i32* %3
%5135 = load i32, i32* %3
%5136 = sub nsw i32 %5135, 1
store i32 %5136, i32* %3
%5137 = load i32, i32* %3
%5138 = and i32 %5137, -1044481
store i32 %5138, i32* %3
%5139 = load i32, i32* %3
%5140 = xor i32 %5139, 81954
store i32 %5140, i32* %3
%5141 = load i32, i32* %3
%5142 = srem i32 %5141, 268435443
store i32 %5142, i32* %3
%5143 = load i32, i32* %3
%5144 = add nsw i32 %5143, 6
store i32 %5144, i32* %3
%5145 = load i32, i32* %3
%5146 = mul nsw i32 %5145, 10
store i32 %5146, i32* %3
%5147 = load i32, i32* %3
%5148 = add nsw i32 %5147, 1
store i32 %5148, i32* %3
%5149 = load i32, i32* %3
%5150 = mul nsw i32 %5149, 2
store i32 %5150, i32* %3
%5151 = load i32, i32* %3
%5152 = sub nsw i32 %5151, 1
store i32 %5152, i32* %3
%5153 = load i32, i32* %3
%5154 = and i32 %5153, -1044481
store i32 %5154, i32* %3
%5155 = load i32, i32* %3
%5156 = xor i32 %5155, 81954
store i32 %5156, i32* %3
%5157 = load i32, i32* %3
%5158 = srem i32 %5157, 268435443
store i32 %5158, i32* %3
%5159 = load i32, i32* %3
%5160 = add nsw i32 %5159, 6
store i32 %5160, i32* %3
%5161 = load i32, i32* %3
%5162 = mul nsw i32 %5161, 10
store i32 %5162, i32* %3
%5163 = load i32, i32* %3
%5164 = add nsw i32 %5163, 1
store i32 %5164, i32* %3
%5165 = load i32, i32* %3
%5166 = mul nsw i32 %5165, 2
store i32 %5166, i32* %3
%5167 = load i32, i32* %3
%5168 = sub nsw i32 %5167, 1
store i32 %5168, i32* %3
%5169 = load i32, i32* %3
%5170 = and i32 %5169, -1044481
store i32 %5170, i32* %3
%5171 = load i32, i32* %3
%5172 = xor i32 %5171, 81954
store i32 %5172, i32* %3
%5173 = load i32, i32* %3
%5174 = srem i32 %5173, 268435443
store i32 %5174, i32* %3
%5175 = load i32, i32* %3
%5176 = add nsw i32 %5175, 6
store i32 %5176, i32* %3
%5177 = load i32, i32* %3
%5178 = mul nsw i32 %5177, 10
store i32 %5178, i32* %3
%5179 = load i32, i32* %3
%5180 = add nsw i32 %5179, 1
store i32 %5180, i32* %3
%5181 = load i32, i32* %3
%5182 = mul nsw i32 %5181, 2
store i32 %5182, i32* %3
%5183 = load i32, i32* %3
%5184 = sub nsw i32 %5183, 1
store i32 %5184, i32* %3
%5185 = load i32, i32* %3
%5186 = and i32 %5185, -1044481
store i32 %5186, i32* %3
%5187 = load i32, i32* %3
%5188 = xor i32 %5187, 81954
store i32 %5188, i32* %3
%5189 = load i32, i32* %3
%5190 = srem i32 %5189, 268435443
store i32 %5190, i32* %3
%5191 = load i32, i32* %3
%5192 = add nsw i32 %5191, 6
store i32 %5192, i32* %3
%5193 = load i32, i32* %3
%5194 = mul nsw i32 %5193, 10
store i32 %5194, i32* %3
%5195 = load i32, i32* %3
%5196 = add nsw i32 %5195, 1
store i32 %5196, i32* %3
%5197 = load i32, i32* %3
%5198 = mul nsw i32 %5197, 2
store i32 %5198, i32* %3
%5199 = load i32, i32* %3
%5200 = sub nsw i32 %5199, 1
store i32 %5200, i32* %3
%5201 = load i32, i32* %3
%5202 = and i32 %5201, -1044481
store i32 %5202, i32* %3
%5203 = load i32, i32* %3
%5204 = xor i32 %5203, 81954
store i32 %5204, i32* %3
%5205 = load i32, i32* %3
%5206 = srem i32 %5205, 268435443
store i32 %5206, i32* %3
%5207 = load i32, i32* %3
%5208 = add nsw i32 %5207, 6
store i32 %5208, i32* %3
%5209 = load i32, i32* %3
%5210 = mul nsw i32 %5209, 10
store i32 %5210, i32* %3
%5211 = load i32, i32* %3
%5212 = add nsw i32 %5211, 1
store i32 %5212, i32* %3
%5213 = load i32, i32* %3
%5214 = mul nsw i32 %5213, 2
store i32 %5214, i32* %3
%5215 = load i32, i32* %3
%5216 = sub nsw i32 %5215, 1
store i32 %5216, i32* %3
%5217 = load i32, i32* %3
%5218 = and i32 %5217, -1044481
store i32 %5218, i32* %3
%5219 = load i32, i32* %3
%5220 = xor i32 %5219, 81954
store i32 %5220, i32* %3
%5221 = load i32, i32* %3
%5222 = srem i32 %5221, 268435443
store i32 %5222, i32* %3
%5223 = load i32, i32* %3
%5224 = add nsw i32 %5223, 6
store i32 %5224, i32* %3
%5225 = load i32, i32* %3
%5226 = mul nsw i32 %5225, 10
store i32 %5226, i32* %3
%5227 = load i32, i32* %3
%5228 = add nsw i32 %5227, 1
store i32 %5228, i32* %3
%5229 = load i32, i32* %3
%5230 = mul nsw i32 %5229, 2
store i32 %5230, i32* %3
%5231 = load i32, i32* %3
%5232 = sub nsw i32 %5231, 1
store i32 %5232, i32* %3
%5233 = load i32, i32* %3
%5234 = and i32 %5233, -1044481
store i32 %5234, i32* %3
%5235 = load i32, i32* %3
%5236 = xor i32 %5235, 81954
store i32 %5236, i32* %3
%5237 = load i32, i32* %3
%5238 = srem i32 %5237, 268435443
store i32 %5238, i32* %3
%5239 = load i32, i32* %3
%5240 = add nsw i32 %5239, 6
store i32 %5240, i32* %3
%5241 = load i32, i32* %3
%5242 = mul nsw i32 %5241, 10
store i32 %5242, i32* %3
%5243 = load i32, i32* %3
%5244 = add nsw i32 %5243, 1
store i32 %5244, i32* %3
%5245 = load i32, i32* %3
%5246 = mul nsw i32 %5245, 2
store i32 %5246, i32* %3
%5247 = load i32, i32* %3
%5248 = sub nsw i32 %5247, 1
store i32 %5248, i32* %3
%5249 = load i32, i32* %3
%5250 = and i32 %5249, -1044481
store i32 %5250, i32* %3
%5251 = load i32, i32* %3
%5252 = xor i32 %5251, 81954
store i32 %5252, i32* %3
%5253 = load i32, i32* %3
%5254 = srem i32 %5253, 268435443
store i32 %5254, i32* %3
%5255 = load i32, i32* %3
%5256 = add nsw i32 %5255, 6
store i32 %5256, i32* %3
%5257 = load i32, i32* %3
%5258 = mul nsw i32 %5257, 10
store i32 %5258, i32* %3
%5259 = load i32, i32* %3
%5260 = add nsw i32 %5259, 1
store i32 %5260, i32* %3
%5261 = load i32, i32* %3
%5262 = mul nsw i32 %5261, 2
store i32 %5262, i32* %3
%5263 = load i32, i32* %3
%5264 = sub nsw i32 %5263, 1
store i32 %5264, i32* %3
%5265 = load i32, i32* %3
%5266 = and i32 %5265, -1044481
store i32 %5266, i32* %3
%5267 = load i32, i32* %3
%5268 = xor i32 %5267, 81954
store i32 %5268, i32* %3
%5269 = load i32, i32* %3
%5270 = srem i32 %5269, 268435443
store i32 %5270, i32* %3
%5271 = load i32, i32* %3
%5272 = add nsw i32 %5271, 6
store i32 %5272, i32* %3
%5273 = load i32, i32* %3
%5274 = mul nsw i32 %5273, 10
store i32 %5274, i32* %3
%5275 = load i32, i32* %3
%5276 = add nsw i32 %5275, 1
store i32 %5276, i32* %3
%5277 = load i32, i32* %3
%5278 = mul nsw i32 %5277, 2
store i32 %5278, i32* %3
%5279 = load i32, i32* %3
%5280 = sub nsw i32 %5279, 1
store i32 %5280, i32* %3
%5281 = load i32, i32* %3
%5282 = and i32 %5281, -1044481
store i32 %5282, i32* %3
%5283 = load i32, i32* %3
%5284 = xor i32 %5283, 81954
store i32 %5284, i32* %3
%5285 = load i32, i32* %3
%5286 = srem i32 %5285, 268435443
store i32 %5286, i32* %3
%5287 = load i32, i32* %3
%5288 = add nsw i32 %5287, 6
store i32 %5288, i32* %3
%5289 = load i32, i32* %3
%5290 = mul nsw i32 %5289, 10
store i32 %5290, i32* %3
%5291 = load i32, i32* %3
%5292 = add nsw i32 %5291, 1
store i32 %5292, i32* %3
%5293 = load i32, i32* %3
%5294 = mul nsw i32 %5293, 2
store i32 %5294, i32* %3
%5295 = load i32, i32* %3
%5296 = sub nsw i32 %5295, 1
store i32 %5296, i32* %3
%5297 = load i32, i32* %3
%5298 = and i32 %5297, -1044481
store i32 %5298, i32* %3
%5299 = load i32, i32* %3
%5300 = xor i32 %5299, 81954
store i32 %5300, i32* %3
%5301 = load i32, i32* %3
%5302 = srem i32 %5301, 268435443
store i32 %5302, i32* %3
%5303 = load i32, i32* %3
%5304 = add nsw i32 %5303, 6
store i32 %5304, i32* %3
%5305 = load i32, i32* %3
%5306 = mul nsw i32 %5305, 10
store i32 %5306, i32* %3
%5307 = load i32, i32* %3
%5308 = add nsw i32 %5307, 1
store i32 %5308, i32* %3
%5309 = load i32, i32* %3
%5310 = mul nsw i32 %5309, 2
store i32 %5310, i32* %3
%5311 = load i32, i32* %3
%5312 = sub nsw i32 %5311, 1
store i32 %5312, i32* %3
%5313 = load i32, i32* %3
%5314 = and i32 %5313, -1044481
store i32 %5314, i32* %3
%5315 = load i32, i32* %3
%5316 = xor i32 %5315, 81954
store i32 %5316, i32* %3
%5317 = load i32, i32* %3
%5318 = srem i32 %5317, 268435443
store i32 %5318, i32* %3
%5319 = load i32, i32* %3
%5320 = add nsw i32 %5319, 6
store i32 %5320, i32* %3
%5321 = load i32, i32* %3
%5322 = mul nsw i32 %5321, 10
store i32 %5322, i32* %3
%5323 = load i32, i32* %3
%5324 = add nsw i32 %5323, 1
store i32 %5324, i32* %3
%5325 = load i32, i32* %3
%5326 = mul nsw i32 %5325, 2
store i32 %5326, i32* %3
%5327 = load i32, i32* %3
%5328 = sub nsw i32 %5327, 1
store i32 %5328, i32* %3
%5329 = load i32, i32* %3
%5330 = and i32 %5329, -1044481
store i32 %5330, i32* %3
%5331 = load i32, i32* %3
%5332 = xor i32 %5331, 81954
store i32 %5332, i32* %3
%5333 = load i32, i32* %3
%5334 = srem i32 %5333, 268435443
store i32 %5334, i32* %3
%5335 = load i32, i32* %3
%5336 = add nsw i32 %5335, 6
store i32 %5336, i32* %3
%5337 = load i32, i32* %3
%5338 = mul nsw i32 %5337, 10
store i32 %5338, i32* %3
%5339 = load i32, i32* %3
%5340 = add nsw i32 %5339, 1
store i32 %5340, i32* %3
%5341 = load i32, i32* %3
%5342 = mul nsw i32 %5341, 2
store i32 %5342, i32* %3
%5343 = load i32, i32* %3
%5344 = sub nsw i32 %5343, 1
store i32 %5344, i32* %3
%5345 = load i32, i32* %3
%5346 = and i32 %5345, -1044481
store i32 %5346, i32* %3
%5347 = load i32, i32* %3
%5348 = xor i32 %5347, 81954
store i32 %5348, i32* %3
%5349 = load i32, i32* %3
%5350 = srem i32 %5349, 268435443
store i32 %5350, i32* %3
%5351 = load i32, i32* %3
%5352 = add nsw i32 %5351, 6
store i32 %5352, i32* %3
%5353 = load i32, i32* %3
%5354 = mul nsw i32 %5353, 10
store i32 %5354, i32* %3
%5355 = load i32, i32* %3
%5356 = add nsw i32 %5355, 1
store i32 %5356, i32* %3
%5357 = load i32, i32* %3
%5358 = mul nsw i32 %5357, 2
store i32 %5358, i32* %3
%5359 = load i32, i32* %3
%5360 = sub nsw i32 %5359, 1
store i32 %5360, i32* %3
%5361 = load i32, i32* %3
%5362 = and i32 %5361, -1044481
store i32 %5362, i32* %3
%5363 = load i32, i32* %3
%5364 = xor i32 %5363, 81954
store i32 %5364, i32* %3
%5365 = load i32, i32* %3
%5366 = srem i32 %5365, 268435443
store i32 %5366, i32* %3
%5367 = load i32, i32* %3
%5368 = add nsw i32 %5367, 6
store i32 %5368, i32* %3
%5369 = load i32, i32* %3
%5370 = mul nsw i32 %5369, 10
store i32 %5370, i32* %3
%5371 = load i32, i32* %3
%5372 = add nsw i32 %5371, 1
store i32 %5372, i32* %3
%5373 = load i32, i32* %3
%5374 = mul nsw i32 %5373, 2
store i32 %5374, i32* %3
%5375 = load i32, i32* %3
%5376 = sub nsw i32 %5375, 1
store i32 %5376, i32* %3
%5377 = load i32, i32* %3
%5378 = and i32 %5377, -1044481
store i32 %5378, i32* %3
%5379 = load i32, i32* %3
%5380 = xor i32 %5379, 81954
store i32 %5380, i32* %3
%5381 = load i32, i32* %3
%5382 = srem i32 %5381, 268435443
store i32 %5382, i32* %3
%5383 = load i32, i32* %3
%5384 = add nsw i32 %5383, 6
store i32 %5384, i32* %3
%5385 = load i32, i32* %3
%5386 = mul nsw i32 %5385, 10
store i32 %5386, i32* %3
%5387 = load i32, i32* %3
%5388 = add nsw i32 %5387, 1
store i32 %5388, i32* %3
%5389 = load i32, i32* %3
%5390 = mul nsw i32 %5389, 2
store i32 %5390, i32* %3
%5391 = load i32, i32* %3
%5392 = sub nsw i32 %5391, 1
store i32 %5392, i32* %3
%5393 = load i32, i32* %3
%5394 = and i32 %5393, -1044481
store i32 %5394, i32* %3
%5395 = load i32, i32* %3
%5396 = xor i32 %5395, 81954
store i32 %5396, i32* %3
%5397 = load i32, i32* %3
%5398 = srem i32 %5397, 268435443
store i32 %5398, i32* %3
%5399 = load i32, i32* %3
%5400 = add nsw i32 %5399, 6
store i32 %5400, i32* %3
%5401 = load i32, i32* %3
%5402 = mul nsw i32 %5401, 10
store i32 %5402, i32* %3
%5403 = load i32, i32* %3
%5404 = add nsw i32 %5403, 1
store i32 %5404, i32* %3
%5405 = load i32, i32* %3
%5406 = mul nsw i32 %5405, 2
store i32 %5406, i32* %3
%5407 = load i32, i32* %3
%5408 = sub nsw i32 %5407, 1
store i32 %5408, i32* %3
%5409 = load i32, i32* %3
%5410 = and i32 %5409, -1044481
store i32 %5410, i32* %3
%5411 = load i32, i32* %3
%5412 = xor i32 %5411, 81954
store i32 %5412, i32* %3
%5413 = load i32, i32* %3
%5414 = srem i32 %5413, 268435443
store i32 %5414, i32* %3
%5415 = load i32, i32* %3
%5416 = add nsw i32 %5415, 6
store i32 %5416, i32* %3
%5417 = load i32, i32* %3
%5418 = mul nsw i32 %5417, 10
store i32 %5418, i32* %3
%5419 = load i32, i32* %3
%5420 = add nsw i32 %5419, 1
store i32 %5420, i32* %3
%5421 = load i32, i32* %3
%5422 = mul nsw i32 %5421, 2
store i32 %5422, i32* %3
%5423 = load i32, i32* %3
%5424 = sub nsw i32 %5423, 1
store i32 %5424, i32* %3
%5425 = load i32, i32* %3
%5426 = and i32 %5425, -1044481
store i32 %5426, i32* %3
%5427 = load i32, i32* %3
%5428 = xor i32 %5427, 81954
store i32 %5428, i32* %3
%5429 = load i32, i32* %3
%5430 = srem i32 %5429, 268435443
store i32 %5430, i32* %3
%5431 = load i32, i32* %3
%5432 = add nsw i32 %5431, 6
store i32 %5432, i32* %3
%5433 = load i32, i32* %3
%5434 = mul nsw i32 %5433, 10
store i32 %5434, i32* %3
%5435 = load i32, i32* %3
%5436 = add nsw i32 %5435, 1
store i32 %5436, i32* %3
%5437 = load i32, i32* %3
%5438 = mul nsw i32 %5437, 2
store i32 %5438, i32* %3
%5439 = load i32, i32* %3
%5440 = sub nsw i32 %5439, 1
store i32 %5440, i32* %3
%5441 = load i32, i32* %3
%5442 = and i32 %5441, -1044481
store i32 %5442, i32* %3
%5443 = load i32, i32* %3
%5444 = xor i32 %5443, 81954
store i32 %5444, i32* %3
%5445 = load i32, i32* %3
%5446 = srem i32 %5445, 268435443
store i32 %5446, i32* %3
%5447 = load i32, i32* %3
%5448 = add nsw i32 %5447, 6
store i32 %5448, i32* %3
%5449 = load i32, i32* %3
%5450 = mul nsw i32 %5449, 10
store i32 %5450, i32* %3
%5451 = load i32, i32* %3
%5452 = add nsw i32 %5451, 1
store i32 %5452, i32* %3
%5453 = load i32, i32* %3
%5454 = mul nsw i32 %5453, 2
store i32 %5454, i32* %3
%5455 = load i32, i32* %3
%5456 = sub nsw i32 %5455, 1
store i32 %5456, i32* %3
%5457 = load i32, i32* %3
%5458 = and i32 %5457, -1044481
store i32 %5458, i32* %3
%5459 = load i32, i32* %3
%5460 = xor i32 %5459, 81954
store i32 %5460, i32* %3
%5461 = load i32, i32* %3
%5462 = srem i32 %5461, 268435443
store i32 %5462, i32* %3
%5463 = load i32, i32* %3
%5464 = add nsw i32 %5463, 6
store i32 %5464, i32* %3
%5465 = load i32, i32* %3
%5466 = mul nsw i32 %5465, 10
store i32 %5466, i32* %3
%5467 = load i32, i32* %3
%5468 = add nsw i32 %5467, 1
store i32 %5468, i32* %3
%5469 = load i32, i32* %3
%5470 = mul nsw i32 %5469, 2
store i32 %5470, i32* %3
%5471 = load i32, i32* %3
%5472 = sub nsw i32 %5471, 1
store i32 %5472, i32* %3
%5473 = load i32, i32* %3
%5474 = and i32 %5473, -1044481
store i32 %5474, i32* %3
%5475 = load i32, i32* %3
%5476 = xor i32 %5475, 81954
store i32 %5476, i32* %3
%5477 = load i32, i32* %3
%5478 = srem i32 %5477, 268435443
store i32 %5478, i32* %3
%5479 = load i32, i32* %3
%5480 = add nsw i32 %5479, 6
store i32 %5480, i32* %3
%5481 = load i32, i32* %3
%5482 = mul nsw i32 %5481, 10
store i32 %5482, i32* %3
%5483 = load i32, i32* %3
%5484 = add nsw i32 %5483, 1
store i32 %5484, i32* %3
%5485 = load i32, i32* %3
%5486 = mul nsw i32 %5485, 2
store i32 %5486, i32* %3
%5487 = load i32, i32* %3
%5488 = sub nsw i32 %5487, 1
store i32 %5488, i32* %3
%5489 = load i32, i32* %3
%5490 = and i32 %5489, -1044481
store i32 %5490, i32* %3
%5491 = load i32, i32* %3
%5492 = xor i32 %5491, 81954
store i32 %5492, i32* %3
%5493 = load i32, i32* %3
%5494 = srem i32 %5493, 268435443
store i32 %5494, i32* %3
%5495 = load i32, i32* %3
%5496 = add nsw i32 %5495, 6
store i32 %5496, i32* %3
%5497 = load i32, i32* %3
%5498 = mul nsw i32 %5497, 10
store i32 %5498, i32* %3
%5499 = load i32, i32* %3
%5500 = add nsw i32 %5499, 1
store i32 %5500, i32* %3
%5501 = load i32, i32* %3
%5502 = mul nsw i32 %5501, 2
store i32 %5502, i32* %3
%5503 = load i32, i32* %3
%5504 = sub nsw i32 %5503, 1
store i32 %5504, i32* %3
%5505 = load i32, i32* %3
%5506 = and i32 %5505, -1044481
store i32 %5506, i32* %3
%5507 = load i32, i32* %3
%5508 = xor i32 %5507, 81954
store i32 %5508, i32* %3
%5509 = load i32, i32* %3
%5510 = srem i32 %5509, 268435443
store i32 %5510, i32* %3
%5511 = load i32, i32* %3
%5512 = add nsw i32 %5511, 6
store i32 %5512, i32* %3
%5513 = load i32, i32* %3
%5514 = mul nsw i32 %5513, 10
store i32 %5514, i32* %3
%5515 = load i32, i32* %3
%5516 = add nsw i32 %5515, 1
store i32 %5516, i32* %3
%5517 = load i32, i32* %3
%5518 = mul nsw i32 %5517, 2
store i32 %5518, i32* %3
%5519 = load i32, i32* %3
%5520 = sub nsw i32 %5519, 1
store i32 %5520, i32* %3
%5521 = load i32, i32* %3
%5522 = and i32 %5521, -1044481
store i32 %5522, i32* %3
%5523 = load i32, i32* %3
%5524 = xor i32 %5523, 81954
store i32 %5524, i32* %3
%5525 = load i32, i32* %3
%5526 = srem i32 %5525, 268435443
store i32 %5526, i32* %3
%5527 = load i32, i32* %3
%5528 = add nsw i32 %5527, 6
store i32 %5528, i32* %3
%5529 = load i32, i32* %3
%5530 = mul nsw i32 %5529, 10
store i32 %5530, i32* %3
%5531 = load i32, i32* %3
%5532 = add nsw i32 %5531, 1
store i32 %5532, i32* %3
%5533 = load i32, i32* %3
%5534 = mul nsw i32 %5533, 2
store i32 %5534, i32* %3
%5535 = load i32, i32* %3
%5536 = sub nsw i32 %5535, 1
store i32 %5536, i32* %3
%5537 = load i32, i32* %3
%5538 = and i32 %5537, -1044481
store i32 %5538, i32* %3
%5539 = load i32, i32* %3
%5540 = xor i32 %5539, 81954
store i32 %5540, i32* %3
%5541 = load i32, i32* %3
%5542 = srem i32 %5541, 268435443
store i32 %5542, i32* %3
%5543 = load i32, i32* %3
%5544 = add nsw i32 %5543, 6
store i32 %5544, i32* %3
%5545 = load i32, i32* %3
%5546 = mul nsw i32 %5545, 10
store i32 %5546, i32* %3
%5547 = load i32, i32* %3
%5548 = add nsw i32 %5547, 1
store i32 %5548, i32* %3
%5549 = load i32, i32* %3
%5550 = mul nsw i32 %5549, 2
store i32 %5550, i32* %3
%5551 = load i32, i32* %3
%5552 = sub nsw i32 %5551, 1
store i32 %5552, i32* %3
%5553 = load i32, i32* %3
%5554 = and i32 %5553, -1044481
store i32 %5554, i32* %3
%5555 = load i32, i32* %3
%5556 = xor i32 %5555, 81954
store i32 %5556, i32* %3
%5557 = load i32, i32* %3
%5558 = srem i32 %5557, 268435443
store i32 %5558, i32* %3
%5559 = load i32, i32* %3
%5560 = add nsw i32 %5559, 6
store i32 %5560, i32* %3
%5561 = load i32, i32* %3
%5562 = mul nsw i32 %5561, 10
store i32 %5562, i32* %3
%5563 = load i32, i32* %3
%5564 = add nsw i32 %5563, 1
store i32 %5564, i32* %3
%5565 = load i32, i32* %3
%5566 = mul nsw i32 %5565, 2
store i32 %5566, i32* %3
%5567 = load i32, i32* %3
%5568 = sub nsw i32 %5567, 1
store i32 %5568, i32* %3
%5569 = load i32, i32* %3
%5570 = and i32 %5569, -1044481
store i32 %5570, i32* %3
%5571 = load i32, i32* %3
%5572 = xor i32 %5571, 81954
store i32 %5572, i32* %3
%5573 = load i32, i32* %3
%5574 = srem i32 %5573, 268435443
store i32 %5574, i32* %3
%5575 = load i32, i32* %3
%5576 = add nsw i32 %5575, 6
store i32 %5576, i32* %3
%5577 = load i32, i32* %3
%5578 = mul nsw i32 %5577, 10
store i32 %5578, i32* %3
%5579 = load i32, i32* %3
%5580 = add nsw i32 %5579, 1
store i32 %5580, i32* %3
%5581 = load i32, i32* %3
%5582 = mul nsw i32 %5581, 2
store i32 %5582, i32* %3
%5583 = load i32, i32* %3
%5584 = sub nsw i32 %5583, 1
store i32 %5584, i32* %3
%5585 = load i32, i32* %3
%5586 = and i32 %5585, -1044481
store i32 %5586, i32* %3
%5587 = load i32, i32* %3
%5588 = xor i32 %5587, 81954
store i32 %5588, i32* %3
%5589 = load i32, i32* %3
%5590 = srem i32 %5589, 268435443
store i32 %5590, i32* %3
%5591 = load i32, i32* %3
%5592 = add nsw i32 %5591, 6
store i32 %5592, i32* %3
%5593 = load i32, i32* %3
%5594 = mul nsw i32 %5593, 10
store i32 %5594, i32* %3
%5595 = load i32, i32* %3
%5596 = add nsw i32 %5595, 1
store i32 %5596, i32* %3
%5597 = load i32, i32* %3
%5598 = mul nsw i32 %5597, 2
store i32 %5598, i32* %3
%5599 = load i32, i32* %3
%5600 = sub nsw i32 %5599, 1
store i32 %5600, i32* %3
%5601 = load i32, i32* %3
%5602 = and i32 %5601, -1044481
store i32 %5602, i32* %3
%5603 = load i32, i32* %3
%5604 = xor i32 %5603, 81954
store i32 %5604, i32* %3
%5605 = load i32, i32* %3
%5606 = srem i32 %5605, 268435443
store i32 %5606, i32* %3
%5607 = load i32, i32* %3
%5608 = add nsw i32 %5607, 6
store i32 %5608, i32* %3
%5609 = load i32, i32* %3
%5610 = mul nsw i32 %5609, 10
store i32 %5610, i32* %3
%5611 = load i32, i32* %3
%5612 = add nsw i32 %5611, 1
store i32 %5612, i32* %3
%5613 = load i32, i32* %3
%5614 = mul nsw i32 %5613, 2
store i32 %5614, i32* %3
%5615 = load i32, i32* %3
%5616 = sub nsw i32 %5615, 1
store i32 %5616, i32* %3
%5617 = load i32, i32* %3
%5618 = and i32 %5617, -1044481
store i32 %5618, i32* %3
%5619 = load i32, i32* %3
%5620 = xor i32 %5619, 81954
store i32 %5620, i32* %3
%5621 = load i32, i32* %3
%5622 = srem i32 %5621, 268435443
store i32 %5622, i32* %3
%5623 = load i32, i32* %3
%5624 = add nsw i32 %5623, 6
store i32 %5624, i32* %3
%5625 = load i32, i32* %3
%5626 = mul nsw i32 %5625, 10
store i32 %5626, i32* %3
%5627 = load i32, i32* %3
%5628 = add nsw i32 %5627, 1
store i32 %5628, i32* %3
%5629 = load i32, i32* %3
%5630 = mul nsw i32 %5629, 2
store i32 %5630, i32* %3
%5631 = load i32, i32* %3
%5632 = sub nsw i32 %5631, 1
store i32 %5632, i32* %3
%5633 = load i32, i32* %3
%5634 = and i32 %5633, -1044481
store i32 %5634, i32* %3
%5635 = load i32, i32* %3
%5636 = xor i32 %5635, 81954
store i32 %5636, i32* %3
%5637 = load i32, i32* %3
%5638 = srem i32 %5637, 268435443
store i32 %5638, i32* %3
%5639 = load i32, i32* %3
%5640 = add nsw i32 %5639, 6
store i32 %5640, i32* %3
%5641 = load i32, i32* %3
%5642 = mul nsw i32 %5641, 10
store i32 %5642, i32* %3
%5643 = load i32, i32* %3
%5644 = add nsw i32 %5643, 1
store i32 %5644, i32* %3
%5645 = load i32, i32* %3
%5646 = mul nsw i32 %5645, 2
store i32 %5646, i32* %3
%5647 = load i32, i32* %3
%5648 = sub nsw i32 %5647, 1
store i32 %5648, i32* %3
%5649 = load i32, i32* %3
%5650 = and i32 %5649, -1044481
store i32 %5650, i32* %3
%5651 = load i32, i32* %3
%5652 = xor i32 %5651, 81954
store i32 %5652, i32* %3
%5653 = load i32, i32* %3
%5654 = srem i32 %5653, 268435443
store i32 %5654, i32* %3
%5655 = load i32, i32* %3
%5656 = add nsw i32 %5655, 6
store i32 %5656, i32* %3
%5657 = load i32, i32* %3
%5658 = mul nsw i32 %5657, 10
store i32 %5658, i32* %3
%5659 = load i32, i32* %3
%5660 = add nsw i32 %5659, 1
store i32 %5660, i32* %3
%5661 = load i32, i32* %3
%5662 = mul nsw i32 %5661, 2
store i32 %5662, i32* %3
%5663 = load i32, i32* %3
%5664 = sub nsw i32 %5663, 1
store i32 %5664, i32* %3
%5665 = load i32, i32* %3
%5666 = and i32 %5665, -1044481
store i32 %5666, i32* %3
%5667 = load i32, i32* %3
%5668 = xor i32 %5667, 81954
store i32 %5668, i32* %3
%5669 = load i32, i32* %3
%5670 = srem i32 %5669, 268435443
store i32 %5670, i32* %3
%5671 = load i32, i32* %3
%5672 = add nsw i32 %5671, 6
store i32 %5672, i32* %3
%5673 = load i32, i32* %3
%5674 = mul nsw i32 %5673, 10
store i32 %5674, i32* %3
%5675 = load i32, i32* %3
%5676 = add nsw i32 %5675, 1
store i32 %5676, i32* %3
%5677 = load i32, i32* %3
%5678 = mul nsw i32 %5677, 2
store i32 %5678, i32* %3
%5679 = load i32, i32* %3
%5680 = sub nsw i32 %5679, 1
store i32 %5680, i32* %3
%5681 = load i32, i32* %3
%5682 = and i32 %5681, -1044481
store i32 %5682, i32* %3
%5683 = load i32, i32* %3
%5684 = xor i32 %5683, 81954
store i32 %5684, i32* %3
%5685 = load i32, i32* %3
%5686 = srem i32 %5685, 268435443
store i32 %5686, i32* %3
%5687 = load i32, i32* %3
%5688 = add nsw i32 %5687, 6
store i32 %5688, i32* %3
%5689 = load i32, i32* %3
%5690 = mul nsw i32 %5689, 10
store i32 %5690, i32* %3
%5691 = load i32, i32* %3
%5692 = add nsw i32 %5691, 1
store i32 %5692, i32* %3
%5693 = load i32, i32* %3
%5694 = mul nsw i32 %5693, 2
store i32 %5694, i32* %3
%5695 = load i32, i32* %3
%5696 = sub nsw i32 %5695, 1
store i32 %5696, i32* %3
%5697 = load i32, i32* %3
%5698 = and i32 %5697, -1044481
store i32 %5698, i32* %3
%5699 = load i32, i32* %3
%5700 = xor i32 %5699, 81954
store i32 %5700, i32* %3
%5701 = load i32, i32* %3
%5702 = srem i32 %5701, 268435443
store i32 %5702, i32* %3
%5703 = load i32, i32* %3
%5704 = add nsw i32 %5703, 6
store i32 %5704, i32* %3
%5705 = load i32, i32* %3
%5706 = mul nsw i32 %5705, 10
store i32 %5706, i32* %3
%5707 = load i32, i32* %3
%5708 = add nsw i32 %5707, 1
store i32 %5708, i32* %3
%5709 = load i32, i32* %3
%5710 = mul nsw i32 %5709, 2
store i32 %5710, i32* %3
%5711 = load i32, i32* %3
%5712 = sub nsw i32 %5711, 1
store i32 %5712, i32* %3
%5713 = load i32, i32* %3
%5714 = and i32 %5713, -1044481
store i32 %5714, i32* %3
%5715 = load i32, i32* %3
%5716 = xor i32 %5715, 81954
store i32 %5716, i32* %3
%5717 = load i32, i32* %3
%5718 = srem i32 %5717, 268435443
store i32 %5718, i32* %3
%5719 = load i32, i32* %3
%5720 = add nsw i32 %5719, 6
store i32 %5720, i32* %3
%5721 = load i32, i32* %3
%5722 = mul nsw i32 %5721, 10
store i32 %5722, i32* %3
%5723 = load i32, i32* %3
%5724 = add nsw i32 %5723, 1
store i32 %5724, i32* %3
%5725 = load i32, i32* %3
%5726 = mul nsw i32 %5725, 2
store i32 %5726, i32* %3
%5727 = load i32, i32* %3
%5728 = sub nsw i32 %5727, 1
store i32 %5728, i32* %3
%5729 = load i32, i32* %3
%5730 = and i32 %5729, -1044481
store i32 %5730, i32* %3
%5731 = load i32, i32* %3
%5732 = xor i32 %5731, 81954
store i32 %5732, i32* %3
%5733 = load i32, i32* %3
%5734 = srem i32 %5733, 268435443
store i32 %5734, i32* %3
%5735 = load i32, i32* %3
%5736 = add nsw i32 %5735, 6
store i32 %5736, i32* %3
%5737 = load i32, i32* %3
%5738 = mul nsw i32 %5737, 10
store i32 %5738, i32* %3
%5739 = load i32, i32* %3
%5740 = add nsw i32 %5739, 1
store i32 %5740, i32* %3
%5741 = load i32, i32* %3
%5742 = mul nsw i32 %5741, 2
store i32 %5742, i32* %3
%5743 = load i32, i32* %3
%5744 = sub nsw i32 %5743, 1
store i32 %5744, i32* %3
%5745 = load i32, i32* %3
%5746 = and i32 %5745, -1044481
store i32 %5746, i32* %3
%5747 = load i32, i32* %3
%5748 = xor i32 %5747, 81954
store i32 %5748, i32* %3
%5749 = load i32, i32* %3
%5750 = srem i32 %5749, 268435443
store i32 %5750, i32* %3
%5751 = load i32, i32* %3
%5752 = add nsw i32 %5751, 6
store i32 %5752, i32* %3
%5753 = load i32, i32* %3
%5754 = mul nsw i32 %5753, 10
store i32 %5754, i32* %3
%5755 = load i32, i32* %3
%5756 = add nsw i32 %5755, 1
store i32 %5756, i32* %3
%5757 = load i32, i32* %3
%5758 = mul nsw i32 %5757, 2
store i32 %5758, i32* %3
%5759 = load i32, i32* %3
%5760 = sub nsw i32 %5759, 1
store i32 %5760, i32* %3
%5761 = load i32, i32* %3
%5762 = and i32 %5761, -1044481
store i32 %5762, i32* %3
%5763 = load i32, i32* %3
%5764 = xor i32 %5763, 81954
store i32 %5764, i32* %3
%5765 = load i32, i32* %3
%5766 = srem i32 %5765, 268435443
store i32 %5766, i32* %3
%5767 = load i32, i32* %3
%5768 = add nsw i32 %5767, 6
store i32 %5768, i32* %3
%5769 = load i32, i32* %3
%5770 = mul nsw i32 %5769, 10
store i32 %5770, i32* %3
%5771 = load i32, i32* %3
%5772 = add nsw i32 %5771, 1
store i32 %5772, i32* %3
%5773 = load i32, i32* %3
%5774 = mul nsw i32 %5773, 2
store i32 %5774, i32* %3
%5775 = load i32, i32* %3
%5776 = sub nsw i32 %5775, 1
store i32 %5776, i32* %3
%5777 = load i32, i32* %3
%5778 = and i32 %5777, -1044481
store i32 %5778, i32* %3
%5779 = load i32, i32* %3
%5780 = xor i32 %5779, 81954
store i32 %5780, i32* %3
%5781 = load i32, i32* %3
%5782 = srem i32 %5781, 268435443
store i32 %5782, i32* %3
%5783 = load i32, i32* %3
%5784 = add nsw i32 %5783, 6
store i32 %5784, i32* %3
%5785 = load i32, i32* %3
%5786 = mul nsw i32 %5785, 10
store i32 %5786, i32* %3
%5787 = load i32, i32* %3
%5788 = add nsw i32 %5787, 1
store i32 %5788, i32* %3
%5789 = load i32, i32* %3
%5790 = mul nsw i32 %5789, 2
store i32 %5790, i32* %3
%5791 = load i32, i32* %3
%5792 = sub nsw i32 %5791, 1
store i32 %5792, i32* %3
%5793 = load i32, i32* %3
%5794 = and i32 %5793, -1044481
store i32 %5794, i32* %3
%5795 = load i32, i32* %3
%5796 = xor i32 %5795, 81954
store i32 %5796, i32* %3
%5797 = load i32, i32* %3
%5798 = srem i32 %5797, 268435443
store i32 %5798, i32* %3
%5799 = load i32, i32* %3
%5800 = add nsw i32 %5799, 6
store i32 %5800, i32* %3
%5801 = load i32, i32* %3
%5802 = mul nsw i32 %5801, 10
store i32 %5802, i32* %3
%5803 = load i32, i32* %3
%5804 = add nsw i32 %5803, 1
store i32 %5804, i32* %3
%5805 = load i32, i32* %3
%5806 = mul nsw i32 %5805, 2
store i32 %5806, i32* %3
%5807 = load i32, i32* %3
%5808 = sub nsw i32 %5807, 1
store i32 %5808, i32* %3
%5809 = load i32, i32* %3
%5810 = and i32 %5809, -1044481
store i32 %5810, i32* %3
%5811 = load i32, i32* %3
%5812 = xor i32 %5811, 81954
store i32 %5812, i32* %3
%5813 = load i32, i32* %3
%5814 = srem i32 %5813, 268435443
store i32 %5814, i32* %3
%5815 = load i32, i32* %3
%5816 = add nsw i32 %5815, 6
store i32 %5816, i32* %3
%5817 = load i32, i32* %3
%5818 = mul nsw i32 %5817, 10
store i32 %5818, i32* %3
%5819 = load i32, i32* %3
%5820 = add nsw i32 %5819, 1
store i32 %5820, i32* %3
%5821 = load i32, i32* %3
%5822 = mul nsw i32 %5821, 2
store i32 %5822, i32* %3
%5823 = load i32, i32* %3
%5824 = sub nsw i32 %5823, 1
store i32 %5824, i32* %3
%5825 = load i32, i32* %3
%5826 = and i32 %5825, -1044481
store i32 %5826, i32* %3
%5827 = load i32, i32* %3
%5828 = xor i32 %5827, 81954
store i32 %5828, i32* %3
%5829 = load i32, i32* %3
%5830 = srem i32 %5829, 268435443
store i32 %5830, i32* %3
%5831 = load i32, i32* %3
%5832 = add nsw i32 %5831, 6
store i32 %5832, i32* %3
%5833 = load i32, i32* %3
%5834 = mul nsw i32 %5833, 10
store i32 %5834, i32* %3
%5835 = load i32, i32* %3
%5836 = add nsw i32 %5835, 1
store i32 %5836, i32* %3
%5837 = load i32, i32* %3
%5838 = mul nsw i32 %5837, 2
store i32 %5838, i32* %3
%5839 = load i32, i32* %3
%5840 = sub nsw i32 %5839, 1
store i32 %5840, i32* %3
%5841 = load i32, i32* %3
%5842 = and i32 %5841, -1044481
store i32 %5842, i32* %3
%5843 = load i32, i32* %3
%5844 = xor i32 %5843, 81954
store i32 %5844, i32* %3
%5845 = load i32, i32* %3
%5846 = srem i32 %5845, 268435443
store i32 %5846, i32* %3
%5847 = load i32, i32* %3
%5848 = add nsw i32 %5847, 6
store i32 %5848, i32* %3
%5849 = load i32, i32* %3
%5850 = mul nsw i32 %5849, 10
store i32 %5850, i32* %3
%5851 = load i32, i32* %3
%5852 = add nsw i32 %5851, 1
store i32 %5852, i32* %3
%5853 = load i32, i32* %3
%5854 = mul nsw i32 %5853, 2
store i32 %5854, i32* %3
%5855 = load i32, i32* %3
%5856 = sub nsw i32 %5855, 1
store i32 %5856, i32* %3
%5857 = load i32, i32* %3
%5858 = and i32 %5857, -1044481
store i32 %5858, i32* %3
%5859 = load i32, i32* %3
%5860 = xor i32 %5859, 81954
store i32 %5860, i32* %3
%5861 = load i32, i32* %3
%5862 = srem i32 %5861, 268435443
store i32 %5862, i32* %3
%5863 = load i32, i32* %3
%5864 = add nsw i32 %5863, 6
store i32 %5864, i32* %3
%5865 = load i32, i32* %3
%5866 = mul nsw i32 %5865, 10
store i32 %5866, i32* %3
%5867 = load i32, i32* %3
%5868 = add nsw i32 %5867, 1
store i32 %5868, i32* %3
%5869 = load i32, i32* %3
%5870 = mul nsw i32 %5869, 2
store i32 %5870, i32* %3
%5871 = load i32, i32* %3
%5872 = sub nsw i32 %5871, 1
store i32 %5872, i32* %3
%5873 = load i32, i32* %3
%5874 = and i32 %5873, -1044481
store i32 %5874, i32* %3
%5875 = load i32, i32* %3
%5876 = xor i32 %5875, 81954
store i32 %5876, i32* %3
%5877 = load i32, i32* %3
%5878 = srem i32 %5877, 268435443
store i32 %5878, i32* %3
%5879 = load i32, i32* %3
%5880 = add nsw i32 %5879, 6
store i32 %5880, i32* %3
%5881 = load i32, i32* %3
%5882 = mul nsw i32 %5881, 10
store i32 %5882, i32* %3
%5883 = load i32, i32* %3
%5884 = add nsw i32 %5883, 1
store i32 %5884, i32* %3
%5885 = load i32, i32* %3
%5886 = mul nsw i32 %5885, 2
store i32 %5886, i32* %3
%5887 = load i32, i32* %3
%5888 = sub nsw i32 %5887, 1
store i32 %5888, i32* %3
%5889 = load i32, i32* %3
%5890 = and i32 %5889, -1044481
store i32 %5890, i32* %3
%5891 = load i32, i32* %3
%5892 = xor i32 %5891, 81954
store i32 %5892, i32* %3
%5893 = load i32, i32* %3
%5894 = srem i32 %5893, 268435443
store i32 %5894, i32* %3
%5895 = load i32, i32* %3
%5896 = add nsw i32 %5895, 6
store i32 %5896, i32* %3
%5897 = load i32, i32* %3
%5898 = mul nsw i32 %5897, 10
store i32 %5898, i32* %3
%5899 = load i32, i32* %3
%5900 = add nsw i32 %5899, 1
store i32 %5900, i32* %3
%5901 = load i32, i32* %3
%5902 = mul nsw i32 %5901, 2
store i32 %5902, i32* %3
%5903 = load i32, i32* %3
%5904 = sub nsw i32 %5903, 1
store i32 %5904, i32* %3
%5905 = load i32, i32* %3
%5906 = and i32 %5905, -1044481
store i32 %5906, i32* %3
%5907 = load i32, i32* %3
%5908 = xor i32 %5907, 81954
store i32 %5908, i32* %3
%5909 = load i32, i32* %3
%5910 = srem i32 %5909, 268435443
store i32 %5910, i32* %3
%5911 = load i32, i32* %3
%5912 = add nsw i32 %5911, 6
store i32 %5912, i32* %3
%5913 = load i32, i32* %3
%5914 = mul nsw i32 %5913, 10
store i32 %5914, i32* %3
%5915 = load i32, i32* %3
%5916 = add nsw i32 %5915, 1
store i32 %5916, i32* %3
%5917 = load i32, i32* %3
%5918 = mul nsw i32 %5917, 2
store i32 %5918, i32* %3
%5919 = load i32, i32* %3
%5920 = sub nsw i32 %5919, 1
store i32 %5920, i32* %3
%5921 = load i32, i32* %3
%5922 = and i32 %5921, -1044481
store i32 %5922, i32* %3
%5923 = load i32, i32* %3
%5924 = xor i32 %5923, 81954
store i32 %5924, i32* %3
%5925 = load i32, i32* %3
%5926 = srem i32 %5925, 268435443
store i32 %5926, i32* %3
%5927 = load i32, i32* %3
%5928 = add nsw i32 %5927, 6
store i32 %5928, i32* %3
%5929 = load i32, i32* %3
%5930 = mul nsw i32 %5929, 10
store i32 %5930, i32* %3
%5931 = load i32, i32* %3
%5932 = add nsw i32 %5931, 1
store i32 %5932, i32* %3
%5933 = load i32, i32* %3
%5934 = mul nsw i32 %5933, 2
store i32 %5934, i32* %3
%5935 = load i32, i32* %3
%5936 = sub nsw i32 %5935, 1
store i32 %5936, i32* %3
%5937 = load i32, i32* %3
%5938 = and i32 %5937, -1044481
store i32 %5938, i32* %3
%5939 = load i32, i32* %3
%5940 = xor i32 %5939, 81954
store i32 %5940, i32* %3
%5941 = load i32, i32* %3
%5942 = srem i32 %5941, 268435443
store i32 %5942, i32* %3
%5943 = load i32, i32* %3
%5944 = add nsw i32 %5943, 6
store i32 %5944, i32* %3
%5945 = load i32, i32* %3
%5946 = mul nsw i32 %5945, 10
store i32 %5946, i32* %3
%5947 = load i32, i32* %3
%5948 = add nsw i32 %5947, 1
store i32 %5948, i32* %3
%5949 = load i32, i32* %3
%5950 = mul nsw i32 %5949, 2
store i32 %5950, i32* %3
%5951 = load i32, i32* %3
%5952 = sub nsw i32 %5951, 1
store i32 %5952, i32* %3
%5953 = load i32, i32* %3
%5954 = and i32 %5953, -1044481
store i32 %5954, i32* %3
%5955 = load i32, i32* %3
%5956 = xor i32 %5955, 81954
store i32 %5956, i32* %3
%5957 = load i32, i32* %3
%5958 = srem i32 %5957, 268435443
store i32 %5958, i32* %3
%5959 = load i32, i32* %3
%5960 = add nsw i32 %5959, 6
store i32 %5960, i32* %3
%5961 = load i32, i32* %3
%5962 = mul nsw i32 %5961, 10
store i32 %5962, i32* %3
%5963 = load i32, i32* %3
%5964 = add nsw i32 %5963, 1
store i32 %5964, i32* %3
%5965 = load i32, i32* %3
%5966 = mul nsw i32 %5965, 2
store i32 %5966, i32* %3
%5967 = load i32, i32* %3
%5968 = sub nsw i32 %5967, 1
store i32 %5968, i32* %3
%5969 = load i32, i32* %3
%5970 = and i32 %5969, -1044481
store i32 %5970, i32* %3
%5971 = load i32, i32* %3
%5972 = xor i32 %5971, 81954
store i32 %5972, i32* %3
%5973 = load i32, i32* %3
%5974 = srem i32 %5973, 268435443
store i32 %5974, i32* %3
%5975 = load i32, i32* %3
%5976 = add nsw i32 %5975, 6
store i32 %5976, i32* %3
%5977 = load i32, i32* %3
%5978 = mul nsw i32 %5977, 10
store i32 %5978, i32* %3
%5979 = load i32, i32* %3
%5980 = add nsw i32 %5979, 1
store i32 %5980, i32* %3
%5981 = load i32, i32* %3
%5982 = mul nsw i32 %5981, 2
store i32 %5982, i32* %3
%5983 = load i32, i32* %3
%5984 = sub nsw i32 %5983, 1
store i32 %5984, i32* %3
%5985 = load i32, i32* %3
%5986 = and i32 %5985, -1044481
store i32 %5986, i32* %3
%5987 = load i32, i32* %3
%5988 = xor i32 %5987, 81954
store i32 %5988, i32* %3
%5989 = load i32, i32* %3
%5990 = srem i32 %5989, 268435443
store i32 %5990, i32* %3
%5991 = load i32, i32* %3
%5992 = add nsw i32 %5991, 6
store i32 %5992, i32* %3
%5993 = load i32, i32* %3
%5994 = mul nsw i32 %5993, 10
store i32 %5994, i32* %3
%5995 = load i32, i32* %3
%5996 = add nsw i32 %5995, 1
store i32 %5996, i32* %3
%5997 = load i32, i32* %3
%5998 = mul nsw i32 %5997, 2
store i32 %5998, i32* %3
%5999 = load i32, i32* %3
%6000 = sub nsw i32 %5999, 1
store i32 %6000, i32* %3
%6001 = load i32, i32* %3
%6002 = and i32 %6001, -1044481
store i32 %6002, i32* %3
%6003 = load i32, i32* %3
%6004 = xor i32 %6003, 81954
store i32 %6004, i32* %3
%6005 = load i32, i32* %3
%6006 = srem i32 %6005, 268435443
store i32 %6006, i32* %3
%6007 = load i32, i32* %3
%6008 = add nsw i32 %6007, 6
store i32 %6008, i32* %3
%6009 = load i32, i32* %3
%6010 = mul nsw i32 %6009, 10
store i32 %6010, i32* %3
%6011 = load i32, i32* %3
%6012 = add nsw i32 %6011, 1
store i32 %6012, i32* %3
%6013 = load i32, i32* %3
%6014 = mul nsw i32 %6013, 2
store i32 %6014, i32* %3
%6015 = load i32, i32* %3
%6016 = sub nsw i32 %6015, 1
store i32 %6016, i32* %3
%6017 = load i32, i32* %3
%6018 = and i32 %6017, -1044481
store i32 %6018, i32* %3
%6019 = load i32, i32* %3
%6020 = xor i32 %6019, 81954
store i32 %6020, i32* %3
%6021 = load i32, i32* %3
%6022 = srem i32 %6021, 268435443
store i32 %6022, i32* %3
%6023 = load i32, i32* %3
%6024 = add nsw i32 %6023, 6
store i32 %6024, i32* %3
%6025 = load i32, i32* %3
%6026 = mul nsw i32 %6025, 10
store i32 %6026, i32* %3
%6027 = load i32, i32* %3
%6028 = add nsw i32 %6027, 1
store i32 %6028, i32* %3
%6029 = load i32, i32* %3
%6030 = mul nsw i32 %6029, 2
store i32 %6030, i32* %3
%6031 = load i32, i32* %3
%6032 = sub nsw i32 %6031, 1
store i32 %6032, i32* %3
%6033 = load i32, i32* %3
%6034 = and i32 %6033, -1044481
store i32 %6034, i32* %3
%6035 = load i32, i32* %3
%6036 = xor i32 %6035, 81954
store i32 %6036, i32* %3
%6037 = load i32, i32* %3
%6038 = srem i32 %6037, 268435443
store i32 %6038, i32* %3
%6039 = load i32, i32* %3
%6040 = add nsw i32 %6039, 6
store i32 %6040, i32* %3
%6041 = load i32, i32* %3
%6042 = mul nsw i32 %6041, 10
store i32 %6042, i32* %3
%6043 = load i32, i32* %3
%6044 = add nsw i32 %6043, 1
store i32 %6044, i32* %3
%6045 = load i32, i32* %3
%6046 = mul nsw i32 %6045, 2
store i32 %6046, i32* %3
%6047 = load i32, i32* %3
%6048 = sub nsw i32 %6047, 1
store i32 %6048, i32* %3
%6049 = load i32, i32* %3
%6050 = and i32 %6049, -1044481
store i32 %6050, i32* %3
%6051 = load i32, i32* %3
%6052 = xor i32 %6051, 81954
store i32 %6052, i32* %3
%6053 = load i32, i32* %3
%6054 = srem i32 %6053, 268435443
store i32 %6054, i32* %3
%6055 = load i32, i32* %3
%6056 = add nsw i32 %6055, 6
store i32 %6056, i32* %3
%6057 = load i32, i32* %3
%6058 = mul nsw i32 %6057, 10
store i32 %6058, i32* %3
%6059 = load i32, i32* %3
%6060 = add nsw i32 %6059, 1
store i32 %6060, i32* %3
%6061 = load i32, i32* %3
%6062 = mul nsw i32 %6061, 2
store i32 %6062, i32* %3
%6063 = load i32, i32* %3
%6064 = sub nsw i32 %6063, 1
store i32 %6064, i32* %3
%6065 = load i32, i32* %3
%6066 = and i32 %6065, -1044481
store i32 %6066, i32* %3
%6067 = load i32, i32* %3
%6068 = xor i32 %6067, 81954
store i32 %6068, i32* %3
%6069 = load i32, i32* %3
%6070 = srem i32 %6069, 268435443
store i32 %6070, i32* %3
%6071 = load i32, i32* %3
%6072 = add nsw i32 %6071, 6
store i32 %6072, i32* %3
%6073 = load i32, i32* %3
%6074 = mul nsw i32 %6073, 10
store i32 %6074, i32* %3
%6075 = load i32, i32* %3
%6076 = add nsw i32 %6075, 1
store i32 %6076, i32* %3
%6077 = load i32, i32* %3
%6078 = mul nsw i32 %6077, 2
store i32 %6078, i32* %3
%6079 = load i32, i32* %3
%6080 = sub nsw i32 %6079, 1
store i32 %6080, i32* %3
%6081 = load i32, i32* %3
%6082 = and i32 %6081, -1044481
store i32 %6082, i32* %3
%6083 = load i32, i32* %3
%6084 = xor i32 %6083, 81954
store i32 %6084, i32* %3
%6085 = load i32, i32* %3
%6086 = srem i32 %6085, 268435443
store i32 %6086, i32* %3
%6087 = load i32, i32* %3
%6088 = add nsw i32 %6087, 6
store i32 %6088, i32* %3
%6089 = load i32, i32* %3
%6090 = mul nsw i32 %6089, 10
store i32 %6090, i32* %3
%6091 = load i32, i32* %3
%6092 = add nsw i32 %6091, 1
store i32 %6092, i32* %3
%6093 = load i32, i32* %3
%6094 = mul nsw i32 %6093, 2
store i32 %6094, i32* %3
%6095 = load i32, i32* %3
%6096 = sub nsw i32 %6095, 1
store i32 %6096, i32* %3
%6097 = load i32, i32* %3
%6098 = and i32 %6097, -1044481
store i32 %6098, i32* %3
%6099 = load i32, i32* %3
%6100 = xor i32 %6099, 81954
store i32 %6100, i32* %3
%6101 = load i32, i32* %3
%6102 = srem i32 %6101, 268435443
store i32 %6102, i32* %3
%6103 = load i32, i32* %3
%6104 = add nsw i32 %6103, 6
store i32 %6104, i32* %3
%6105 = load i32, i32* %3
%6106 = mul nsw i32 %6105, 10
store i32 %6106, i32* %3
%6107 = load i32, i32* %3
%6108 = add nsw i32 %6107, 1
store i32 %6108, i32* %3
%6109 = load i32, i32* %3
%6110 = mul nsw i32 %6109, 2
store i32 %6110, i32* %3
%6111 = load i32, i32* %3
%6112 = sub nsw i32 %6111, 1
store i32 %6112, i32* %3
%6113 = load i32, i32* %3
%6114 = and i32 %6113, -1044481
store i32 %6114, i32* %3
%6115 = load i32, i32* %3
%6116 = xor i32 %6115, 81954
store i32 %6116, i32* %3
%6117 = load i32, i32* %3
%6118 = srem i32 %6117, 268435443
store i32 %6118, i32* %3
%6119 = load i32, i32* %3
%6120 = add nsw i32 %6119, 6
store i32 %6120, i32* %3
%6121 = load i32, i32* %3
%6122 = mul nsw i32 %6121, 10
store i32 %6122, i32* %3
%6123 = load i32, i32* %3
%6124 = add nsw i32 %6123, 1
store i32 %6124, i32* %3
%6125 = load i32, i32* %3
%6126 = mul nsw i32 %6125, 2
store i32 %6126, i32* %3
%6127 = load i32, i32* %3
%6128 = sub nsw i32 %6127, 1
store i32 %6128, i32* %3
%6129 = load i32, i32* %3
%6130 = and i32 %6129, -1044481
store i32 %6130, i32* %3
%6131 = load i32, i32* %3
%6132 = xor i32 %6131, 81954
store i32 %6132, i32* %3
%6133 = load i32, i32* %3
%6134 = srem i32 %6133, 268435443
store i32 %6134, i32* %3
%6135 = load i32, i32* %3
%6136 = add nsw i32 %6135, 6
store i32 %6136, i32* %3
%6137 = load i32, i32* %3
%6138 = mul nsw i32 %6137, 10
store i32 %6138, i32* %3
%6139 = load i32, i32* %3
%6140 = add nsw i32 %6139, 1
store i32 %6140, i32* %3
%6141 = load i32, i32* %3
%6142 = mul nsw i32 %6141, 2
store i32 %6142, i32* %3
%6143 = load i32, i32* %3
%6144 = sub nsw i32 %6143, 1
store i32 %6144, i32* %3
%6145 = load i32, i32* %3
%6146 = and i32 %6145, -1044481
store i32 %6146, i32* %3
%6147 = load i32, i32* %3
%6148 = xor i32 %6147, 81954
store i32 %6148, i32* %3
%6149 = load i32, i32* %3
%6150 = srem i32 %6149, 268435443
store i32 %6150, i32* %3
%6151 = load i32, i32* %3
%6152 = add nsw i32 %6151, 6
store i32 %6152, i32* %3
%6153 = load i32, i32* %3
%6154 = mul nsw i32 %6153, 10
store i32 %6154, i32* %3
%6155 = load i32, i32* %3
%6156 = add nsw i32 %6155, 1
store i32 %6156, i32* %3
%6157 = load i32, i32* %3
%6158 = mul nsw i32 %6157, 2
store i32 %6158, i32* %3
%6159 = load i32, i32* %3
%6160 = sub nsw i32 %6159, 1
store i32 %6160, i32* %3
%6161 = load i32, i32* %3
%6162 = and i32 %6161, -1044481
store i32 %6162, i32* %3
%6163 = load i32, i32* %3
%6164 = xor i32 %6163, 81954
store i32 %6164, i32* %3
%6165 = load i32, i32* %3
%6166 = srem i32 %6165, 268435443
store i32 %6166, i32* %3
%6167 = load i32, i32* %3
%6168 = add nsw i32 %6167, 6
store i32 %6168, i32* %3
%6169 = load i32, i32* %3
%6170 = mul nsw i32 %6169, 10
store i32 %6170, i32* %3
%6171 = load i32, i32* %3
%6172 = add nsw i32 %6171, 1
store i32 %6172, i32* %3
%6173 = load i32, i32* %3
%6174 = mul nsw i32 %6173, 2
store i32 %6174, i32* %3
%6175 = load i32, i32* %3
%6176 = sub nsw i32 %6175, 1
store i32 %6176, i32* %3
%6177 = load i32, i32* %3
%6178 = and i32 %6177, -1044481
store i32 %6178, i32* %3
%6179 = load i32, i32* %3
%6180 = xor i32 %6179, 81954
store i32 %6180, i32* %3
%6181 = load i32, i32* %3
%6182 = srem i32 %6181, 268435443
store i32 %6182, i32* %3
%6183 = load i32, i32* %3
%6184 = add nsw i32 %6183, 6
store i32 %6184, i32* %3
%6185 = load i32, i32* %3
%6186 = mul nsw i32 %6185, 10
store i32 %6186, i32* %3
%6187 = load i32, i32* %3
%6188 = add nsw i32 %6187, 1
store i32 %6188, i32* %3
%6189 = load i32, i32* %3
%6190 = mul nsw i32 %6189, 2
store i32 %6190, i32* %3
%6191 = load i32, i32* %3
%6192 = sub nsw i32 %6191, 1
store i32 %6192, i32* %3
%6193 = load i32, i32* %3
%6194 = and i32 %6193, -1044481
store i32 %6194, i32* %3
%6195 = load i32, i32* %3
%6196 = xor i32 %6195, 81954
store i32 %6196, i32* %3
%6197 = load i32, i32* %3
%6198 = srem i32 %6197, 268435443
store i32 %6198, i32* %3
%6199 = load i32, i32* %3
%6200 = add nsw i32 %6199, 6
store i32 %6200, i32* %3
%6201 = load i32, i32* %3
%6202 = mul nsw i32 %6201, 10
store i32 %6202, i32* %3
%6203 = load i32, i32* %3
%6204 = add nsw i32 %6203, 1
store i32 %6204, i32* %3
%6205 = load i32, i32* %3
%6206 = mul nsw i32 %6205, 2
store i32 %6206, i32* %3
%6207 = load i32, i32* %3
%6208 = sub nsw i32 %6207, 1
store i32 %6208, i32* %3
%6209 = load i32, i32* %3
%6210 = and i32 %6209, -1044481
store i32 %6210, i32* %3
%6211 = load i32, i32* %3
%6212 = xor i32 %6211, 81954
store i32 %6212, i32* %3
%6213 = load i32, i32* %3
%6214 = srem i32 %6213, 268435443
store i32 %6214, i32* %3
%6215 = load i32, i32* %3
%6216 = add nsw i32 %6215, 6
store i32 %6216, i32* %3
%6217 = load i32, i32* %3
%6218 = mul nsw i32 %6217, 10
store i32 %6218, i32* %3
%6219 = load i32, i32* %3
%6220 = add nsw i32 %6219, 1
store i32 %6220, i32* %3
%6221 = load i32, i32* %3
%6222 = mul nsw i32 %6221, 2
store i32 %6222, i32* %3
%6223 = load i32, i32* %3
%6224 = sub nsw i32 %6223, 1
store i32 %6224, i32* %3
%6225 = load i32, i32* %3
%6226 = and i32 %6225, -1044481
store i32 %6226, i32* %3
%6227 = load i32, i32* %3
%6228 = xor i32 %6227, 81954
store i32 %6228, i32* %3
%6229 = load i32, i32* %3
%6230 = srem i32 %6229, 268435443
store i32 %6230, i32* %3
%6231 = load i32, i32* %3
%6232 = add nsw i32 %6231, 6
store i32 %6232, i32* %3
%6233 = load i32, i32* %3
%6234 = mul nsw i32 %6233, 10
store i32 %6234, i32* %3
%6235 = load i32, i32* %3
%6236 = add nsw i32 %6235, 1
store i32 %6236, i32* %3
%6237 = load i32, i32* %3
%6238 = mul nsw i32 %6237, 2
store i32 %6238, i32* %3
%6239 = load i32, i32* %3
%6240 = sub nsw i32 %6239, 1
store i32 %6240, i32* %3
%6241 = load i32, i32* %3
%6242 = and i32 %6241, -1044481
store i32 %6242, i32* %3
%6243 = load i32, i32* %3
%6244 = xor i32 %6243, 81954
store i32 %6244, i32* %3
%6245 = load i32, i32* %3
%6246 = srem i32 %6245, 268435443
store i32 %6246, i32* %3
%6247 = load i32, i32* %3
%6248 = add nsw i32 %6247, 6
store i32 %6248, i32* %3
%6249 = load i32, i32* %3
%6250 = mul nsw i32 %6249, 10
store i32 %6250, i32* %3
%6251 = load i32, i32* %3
%6252 = add nsw i32 %6251, 1
store i32 %6252, i32* %3
%6253 = load i32, i32* %3
%6254 = mul nsw i32 %6253, 2
store i32 %6254, i32* %3
%6255 = load i32, i32* %3
%6256 = sub nsw i32 %6255, 1
store i32 %6256, i32* %3
%6257 = load i32, i32* %3
%6258 = and i32 %6257, -1044481
store i32 %6258, i32* %3
%6259 = load i32, i32* %3
%6260 = xor i32 %6259, 81954
store i32 %6260, i32* %3
%6261 = load i32, i32* %3
%6262 = srem i32 %6261, 268435443
store i32 %6262, i32* %3
%6263 = load i32, i32* %3
%6264 = add nsw i32 %6263, 6
store i32 %6264, i32* %3
%6265 = load i32, i32* %3
%6266 = mul nsw i32 %6265, 10
store i32 %6266, i32* %3
%6267 = load i32, i32* %3
%6268 = add nsw i32 %6267, 1
store i32 %6268, i32* %3
%6269 = load i32, i32* %3
%6270 = mul nsw i32 %6269, 2
store i32 %6270, i32* %3
%6271 = load i32, i32* %3
%6272 = sub nsw i32 %6271, 1
store i32 %6272, i32* %3
%6273 = load i32, i32* %3
%6274 = and i32 %6273, -1044481
store i32 %6274, i32* %3
%6275 = load i32, i32* %3
%6276 = xor i32 %6275, 81954
store i32 %6276, i32* %3
%6277 = load i32, i32* %3
%6278 = srem i32 %6277, 268435443
store i32 %6278, i32* %3
%6279 = load i32, i32* %3
%6280 = add nsw i32 %6279, 6
store i32 %6280, i32* %3
%6281 = load i32, i32* %3
%6282 = mul nsw i32 %6281, 10
store i32 %6282, i32* %3
%6283 = load i32, i32* %3
%6284 = add nsw i32 %6283, 1
store i32 %6284, i32* %3
%6285 = load i32, i32* %3
%6286 = mul nsw i32 %6285, 2
store i32 %6286, i32* %3
%6287 = load i32, i32* %3
%6288 = sub nsw i32 %6287, 1
store i32 %6288, i32* %3
%6289 = load i32, i32* %3
%6290 = and i32 %6289, -1044481
store i32 %6290, i32* %3
%6291 = load i32, i32* %3
%6292 = xor i32 %6291, 81954
store i32 %6292, i32* %3
%6293 = load i32, i32* %3
%6294 = srem i32 %6293, 268435443
store i32 %6294, i32* %3
%6295 = load i32, i32* %3
%6296 = add nsw i32 %6295, 6
store i32 %6296, i32* %3
%6297 = load i32, i32* %3
%6298 = mul nsw i32 %6297, 10
store i32 %6298, i32* %3
%6299 = load i32, i32* %3
%6300 = add nsw i32 %6299, 1
store i32 %6300, i32* %3
%6301 = load i32, i32* %3
%6302 = mul nsw i32 %6301, 2
store i32 %6302, i32* %3
%6303 = load i32, i32* %3
%6304 = sub nsw i32 %6303, 1
store i32 %6304, i32* %3
%6305 = load i32, i32* %3
%6306 = and i32 %6305, -1044481
store i32 %6306, i32* %3
%6307 = load i32, i32* %3
%6308 = xor i32 %6307, 81954
store i32 %6308, i32* %3
%6309 = load i32, i32* %3
%6310 = srem i32 %6309, 268435443
store i32 %6310, i32* %3
%6311 = load i32, i32* %3
%6312 = add nsw i32 %6311, 6
store i32 %6312, i32* %3
%6313 = load i32, i32* %3
%6314 = mul nsw i32 %6313, 10
store i32 %6314, i32* %3
%6315 = load i32, i32* %3
%6316 = add nsw i32 %6315, 1
store i32 %6316, i32* %3
%6317 = load i32, i32* %3
%6318 = mul nsw i32 %6317, 2
store i32 %6318, i32* %3
%6319 = load i32, i32* %3
%6320 = sub nsw i32 %6319, 1
store i32 %6320, i32* %3
%6321 = load i32, i32* %3
%6322 = and i32 %6321, -1044481
store i32 %6322, i32* %3
%6323 = load i32, i32* %3
%6324 = xor i32 %6323, 81954
store i32 %6324, i32* %3
%6325 = load i32, i32* %3
%6326 = srem i32 %6325, 268435443
store i32 %6326, i32* %3
%6327 = load i32, i32* %3
%6328 = add nsw i32 %6327, 6
store i32 %6328, i32* %3
%6329 = load i32, i32* %3
%6330 = mul nsw i32 %6329, 10
store i32 %6330, i32* %3
%6331 = load i32, i32* %3
%6332 = add nsw i32 %6331, 1
store i32 %6332, i32* %3
%6333 = load i32, i32* %3
%6334 = mul nsw i32 %6333, 2
store i32 %6334, i32* %3
%6335 = load i32, i32* %3
%6336 = sub nsw i32 %6335, 1
store i32 %6336, i32* %3
%6337 = load i32, i32* %3
%6338 = and i32 %6337, -1044481
store i32 %6338, i32* %3
%6339 = load i32, i32* %3
%6340 = xor i32 %6339, 81954
store i32 %6340, i32* %3
%6341 = load i32, i32* %3
%6342 = srem i32 %6341, 268435443
store i32 %6342, i32* %3
%6343 = load i32, i32* %3
%6344 = add nsw i32 %6343, 6
store i32 %6344, i32* %3
%6345 = load i32, i32* %3
%6346 = mul nsw i32 %6345, 10
store i32 %6346, i32* %3
%6347 = load i32, i32* %3
%6348 = add nsw i32 %6347, 1
store i32 %6348, i32* %3
%6349 = load i32, i32* %3
%6350 = mul nsw i32 %6349, 2
store i32 %6350, i32* %3
%6351 = load i32, i32* %3
%6352 = sub nsw i32 %6351, 1
store i32 %6352, i32* %3
%6353 = load i32, i32* %3
%6354 = and i32 %6353, -1044481
store i32 %6354, i32* %3
%6355 = load i32, i32* %3
%6356 = xor i32 %6355, 81954
store i32 %6356, i32* %3
%6357 = load i32, i32* %3
%6358 = srem i32 %6357, 268435443
store i32 %6358, i32* %3
%6359 = load i32, i32* %3
%6360 = add nsw i32 %6359, 6
store i32 %6360, i32* %3
%6361 = load i32, i32* %3
%6362 = mul nsw i32 %6361, 10
store i32 %6362, i32* %3
%6363 = load i32, i32* %3
%6364 = add nsw i32 %6363, 1
store i32 %6364, i32* %3
%6365 = load i32, i32* %3
%6366 = mul nsw i32 %6365, 2
store i32 %6366, i32* %3
%6367 = load i32, i32* %3
%6368 = sub nsw i32 %6367, 1
store i32 %6368, i32* %3
%6369 = load i32, i32* %3
%6370 = and i32 %6369, -1044481
store i32 %6370, i32* %3
%6371 = load i32, i32* %3
%6372 = xor i32 %6371, 81954
store i32 %6372, i32* %3
%6373 = load i32, i32* %3
%6374 = srem i32 %6373, 268435443
store i32 %6374, i32* %3
%6375 = load i32, i32* %3
%6376 = add nsw i32 %6375, 6
store i32 %6376, i32* %3
%6377 = load i32, i32* %3
%6378 = mul nsw i32 %6377, 10
store i32 %6378, i32* %3
%6379 = load i32, i32* %3
%6380 = add nsw i32 %6379, 1
store i32 %6380, i32* %3
%6381 = load i32, i32* %3
%6382 = mul nsw i32 %6381, 2
store i32 %6382, i32* %3
%6383 = load i32, i32* %3
%6384 = sub nsw i32 %6383, 1
store i32 %6384, i32* %3
%6385 = load i32, i32* %3
%6386 = and i32 %6385, -1044481
store i32 %6386, i32* %3
%6387 = load i32, i32* %3
%6388 = xor i32 %6387, 81954
store i32 %6388, i32* %3
%6389 = load i32, i32* %3
%6390 = srem i32 %6389, 268435443
store i32 %6390, i32* %3
%6391 = load i32, i32* %3
%6392 = add nsw i32 %6391, 6
store i32 %6392, i32* %3
%6393 = load i32, i32* %3
%6394 = mul nsw i32 %6393, 10
store i32 %6394, i32* %3
%6395 = load i32, i32* %3
%6396 = add nsw i32 %6395, 1
store i32 %6396, i32* %3
%6397 = load i32, i32* %3
%6398 = mul nsw i32 %6397, 2
store i32 %6398, i32* %3
%6399 = load i32, i32* %3
%6400 = sub nsw i32 %6399, 1
store i32 %6400, i32* %3
%6401 = load i32, i32* %3
%6402 = and i32 %6401, -1044481
store i32 %6402, i32* %3
%6403 = load i32, i32* %3
%6404 = xor i32 %6403, 81954
store i32 %6404, i32* %3
%6405 = load i32, i32* %3
%6406 = srem i32 %6405, 268435443
store i32 %6406, i32* %3
%6407 = load i32, i32* %3
%6408 = add nsw i32 %6407, 6
store i32 %6408, i32* %3
%6409 = load i32, i32* %3
%6410 = mul nsw i32 %6409, 10
store i32 %6410, i32* %3
%6411 = load i32, i32* %3
%6412 = add nsw i32 %6411, 1
store i32 %6412, i32* %3
%6413 = load i32, i32* %3
%6414 = mul nsw i32 %6413, 2
store i32 %6414, i32* %3
%6415 = load i32, i32* %3
%6416 = sub nsw i32 %6415, 1
store i32 %6416, i32* %3
%6417 = load i32, i32* %3
%6418 = and i32 %6417, -1044481
store i32 %6418, i32* %3
%6419 = load i32, i32* %3
%6420 = xor i32 %6419, 81954
store i32 %6420, i32* %3
%6421 = load i32, i32* %3
%6422 = srem i32 %6421, 268435443
store i32 %6422, i32* %3
%6423 = load i32, i32* %3
%6424 = add nsw i32 %6423, 6
store i32 %6424, i32* %3
%6425 = load i32, i32* %3
%6426 = mul nsw i32 %6425, 10
store i32 %6426, i32* %3
%6427 = load i32, i32* %3
%6428 = add nsw i32 %6427, 1
store i32 %6428, i32* %3
%6429 = load i32, i32* %3
%6430 = mul nsw i32 %6429, 2
store i32 %6430, i32* %3
%6431 = load i32, i32* %3
%6432 = sub nsw i32 %6431, 1
store i32 %6432, i32* %3
%6433 = load i32, i32* %3
%6434 = and i32 %6433, -1044481
store i32 %6434, i32* %3
%6435 = load i32, i32* %3
%6436 = xor i32 %6435, 81954
store i32 %6436, i32* %3
%6437 = load i32, i32* %3
%6438 = srem i32 %6437, 268435443
store i32 %6438, i32* %3
%6439 = load i32, i32* %3
%6440 = add nsw i32 %6439, 6
store i32 %6440, i32* %3
%6441 = load i32, i32* %3
%6442 = mul nsw i32 %6441, 10
store i32 %6442, i32* %3
%6443 = load i32, i32* %3
%6444 = add nsw i32 %6443, 1
store i32 %6444, i32* %3
%6445 = load i32, i32* %3
%6446 = mul nsw i32 %6445, 2
store i32 %6446, i32* %3
%6447 = load i32, i32* %3
%6448 = sub nsw i32 %6447, 1
store i32 %6448, i32* %3
%6449 = load i32, i32* %3
%6450 = and i32 %6449, -1044481
store i32 %6450, i32* %3
%6451 = load i32, i32* %3
%6452 = xor i32 %6451, 81954
store i32 %6452, i32* %3
%6453 = load i32, i32* %3
%6454 = srem i32 %6453, 268435443
store i32 %6454, i32* %3
%6455 = load i32, i32* %3
%6456 = add nsw i32 %6455, 6
store i32 %6456, i32* %3
%6457 = load i32, i32* %3
%6458 = mul nsw i32 %6457, 10
store i32 %6458, i32* %3
%6459 = load i32, i32* %3
%6460 = add nsw i32 %6459, 1
store i32 %6460, i32* %3
%6461 = load i32, i32* %3
%6462 = mul nsw i32 %6461, 2
store i32 %6462, i32* %3
%6463 = load i32, i32* %3
%6464 = sub nsw i32 %6463, 1
store i32 %6464, i32* %3
%6465 = load i32, i32* %3
%6466 = and i32 %6465, -1044481
store i32 %6466, i32* %3
%6467 = load i32, i32* %3
%6468 = xor i32 %6467, 81954
store i32 %6468, i32* %3
%6469 = load i32, i32* %3
%6470 = srem i32 %6469, 268435443
store i32 %6470, i32* %3
%6471 = load i32, i32* %3
%6472 = add nsw i32 %6471, 6
store i32 %6472, i32* %3
%6473 = load i32, i32* %3
%6474 = mul nsw i32 %6473, 10
store i32 %6474, i32* %3
%6475 = load i32, i32* %3
%6476 = add nsw i32 %6475, 1
store i32 %6476, i32* %3
%6477 = load i32, i32* %3
%6478 = mul nsw i32 %6477, 2
store i32 %6478, i32* %3
%6479 = load i32, i32* %3
%6480 = sub nsw i32 %6479, 1
store i32 %6480, i32* %3
%6481 = load i32, i32* %3
%6482 = and i32 %6481, -1044481
store i32 %6482, i32* %3
%6483 = load i32, i32* %3
%6484 = xor i32 %6483, 81954
store i32 %6484, i32* %3
%6485 = load i32, i32* %3
%6486 = srem i32 %6485, 268435443
store i32 %6486, i32* %3
%6487 = load i32, i32* %3
%6488 = add nsw i32 %6487, 6
store i32 %6488, i32* %3
%6489 = load i32, i32* %3
%6490 = mul nsw i32 %6489, 10
store i32 %6490, i32* %3
%6491 = load i32, i32* %3
%6492 = add nsw i32 %6491, 1
store i32 %6492, i32* %3
%6493 = load i32, i32* %3
%6494 = mul nsw i32 %6493, 2
store i32 %6494, i32* %3
%6495 = load i32, i32* %3
%6496 = sub nsw i32 %6495, 1
store i32 %6496, i32* %3
%6497 = load i32, i32* %3
%6498 = and i32 %6497, -1044481
store i32 %6498, i32* %3
%6499 = load i32, i32* %3
%6500 = xor i32 %6499, 81954
store i32 %6500, i32* %3
%6501 = load i32, i32* %3
%6502 = srem i32 %6501, 268435443
store i32 %6502, i32* %3
%6503 = load i32, i32* %3
%6504 = add nsw i32 %6503, 6
store i32 %6504, i32* %3
%6505 = load i32, i32* %3
%6506 = mul nsw i32 %6505, 10
store i32 %6506, i32* %3
%6507 = load i32, i32* %3
%6508 = add nsw i32 %6507, 1
store i32 %6508, i32* %3
%6509 = load i32, i32* %3
%6510 = mul nsw i32 %6509, 2
store i32 %6510, i32* %3
%6511 = load i32, i32* %3
%6512 = sub nsw i32 %6511, 1
store i32 %6512, i32* %3
%6513 = load i32, i32* %3
%6514 = and i32 %6513, -1044481
store i32 %6514, i32* %3
%6515 = load i32, i32* %3
%6516 = xor i32 %6515, 81954
store i32 %6516, i32* %3
%6517 = load i32, i32* %3
%6518 = srem i32 %6517, 268435443
store i32 %6518, i32* %3
%6519 = load i32, i32* %3
%6520 = add nsw i32 %6519, 6
store i32 %6520, i32* %3
%6521 = load i32, i32* %3
%6522 = mul nsw i32 %6521, 10
store i32 %6522, i32* %3
%6523 = load i32, i32* %3
%6524 = add nsw i32 %6523, 1
store i32 %6524, i32* %3
%6525 = load i32, i32* %3
%6526 = mul nsw i32 %6525, 2
store i32 %6526, i32* %3
%6527 = load i32, i32* %3
%6528 = sub nsw i32 %6527, 1
store i32 %6528, i32* %3
%6529 = load i32, i32* %3
%6530 = and i32 %6529, -1044481
store i32 %6530, i32* %3
%6531 = load i32, i32* %3
%6532 = xor i32 %6531, 81954
store i32 %6532, i32* %3
%6533 = load i32, i32* %3
%6534 = srem i32 %6533, 268435443
store i32 %6534, i32* %3
%6535 = load i32, i32* %3
%6536 = add nsw i32 %6535, 6
store i32 %6536, i32* %3
%6537 = load i32, i32* %3
%6538 = mul nsw i32 %6537, 10
store i32 %6538, i32* %3
%6539 = load i32, i32* %3
%6540 = add nsw i32 %6539, 1
store i32 %6540, i32* %3
%6541 = load i32, i32* %3
%6542 = mul nsw i32 %6541, 2
store i32 %6542, i32* %3
%6543 = load i32, i32* %3
%6544 = sub nsw i32 %6543, 1
store i32 %6544, i32* %3
%6545 = load i32, i32* %3
%6546 = and i32 %6545, -1044481
store i32 %6546, i32* %3
%6547 = load i32, i32* %3
%6548 = xor i32 %6547, 81954
store i32 %6548, i32* %3
%6549 = load i32, i32* %3
%6550 = srem i32 %6549, 268435443
store i32 %6550, i32* %3
%6551 = load i32, i32* %3
%6552 = add nsw i32 %6551, 6
store i32 %6552, i32* %3
%6553 = load i32, i32* %3
%6554 = mul nsw i32 %6553, 10
store i32 %6554, i32* %3
%6555 = load i32, i32* %3
%6556 = add nsw i32 %6555, 1
store i32 %6556, i32* %3
%6557 = load i32, i32* %3
%6558 = mul nsw i32 %6557, 2
store i32 %6558, i32* %3
%6559 = load i32, i32* %3
%6560 = sub nsw i32 %6559, 1
store i32 %6560, i32* %3
%6561 = load i32, i32* %3
%6562 = and i32 %6561, -1044481
store i32 %6562, i32* %3
%6563 = load i32, i32* %3
%6564 = xor i32 %6563, 81954
store i32 %6564, i32* %3
%6565 = load i32, i32* %3
%6566 = srem i32 %6565, 268435443
store i32 %6566, i32* %3
%6567 = load i32, i32* %3
%6568 = add nsw i32 %6567, 6
store i32 %6568, i32* %3
%6569 = load i32, i32* %3
%6570 = mul nsw i32 %6569, 10
store i32 %6570, i32* %3
%6571 = load i32, i32* %3
%6572 = add nsw i32 %6571, 1
store i32 %6572, i32* %3
%6573 = load i32, i32* %3
%6574 = mul nsw i32 %6573, 2
store i32 %6574, i32* %3
%6575 = load i32, i32* %3
%6576 = sub nsw i32 %6575, 1
store i32 %6576, i32* %3
%6577 = load i32, i32* %3
%6578 = and i32 %6577, -1044481
store i32 %6578, i32* %3
%6579 = load i32, i32* %3
%6580 = xor i32 %6579, 81954
store i32 %6580, i32* %3
%6581 = load i32, i32* %3
%6582 = srem i32 %6581, 268435443
store i32 %6582, i32* %3
%6583 = load i32, i32* %3
%6584 = add nsw i32 %6583, 6
store i32 %6584, i32* %3
%6585 = load i32, i32* %3
%6586 = mul nsw i32 %6585, 10
store i32 %6586, i32* %3
%6587 = load i32, i32* %3
%6588 = add nsw i32 %6587, 1
store i32 %6588, i32* %3
%6589 = load i32, i32* %3
%6590 = mul nsw i32 %6589, 2
store i32 %6590, i32* %3
%6591 = load i32, i32* %3
%6592 = sub nsw i32 %6591, 1
store i32 %6592, i32* %3
%6593 = load i32, i32* %3
%6594 = and i32 %6593, -1044481
store i32 %6594, i32* %3
%6595 = load i32, i32* %3
%6596 = xor i32 %6595, 81954
store i32 %6596, i32* %3
%6597 = load i32, i32* %3
%6598 = srem i32 %6597, 268435443
store i32 %6598, i32* %3
%6599 = load i32, i32* %3
%6600 = add nsw i32 %6599, 6
store i32 %6600, i32* %3
%6601 = load i32, i32* %3
%6602 = mul nsw i32 %6601, 10
store i32 %6602, i32* %3
%6603 = load i32, i32* %3
%6604 = add nsw i32 %6603, 1
store i32 %6604, i32* %3
%6605 = load i32, i32* %3
%6606 = mul nsw i32 %6605, 2
store i32 %6606, i32* %3
%6607 = load i32, i32* %3
%6608 = sub nsw i32 %6607, 1
store i32 %6608, i32* %3
%6609 = load i32, i32* %3
%6610 = and i32 %6609, -1044481
store i32 %6610, i32* %3
%6611 = load i32, i32* %3
%6612 = xor i32 %6611, 81954
store i32 %6612, i32* %3
%6613 = load i32, i32* %3
%6614 = srem i32 %6613, 268435443
store i32 %6614, i32* %3
%6615 = load i32, i32* %3
%6616 = add nsw i32 %6615, 6
store i32 %6616, i32* %3
%6617 = load i32, i32* %3
%6618 = mul nsw i32 %6617, 10
store i32 %6618, i32* %3
%6619 = load i32, i32* %3
%6620 = add nsw i32 %6619, 1
store i32 %6620, i32* %3
%6621 = load i32, i32* %3
%6622 = mul nsw i32 %6621, 2
store i32 %6622, i32* %3
%6623 = load i32, i32* %3
%6624 = sub nsw i32 %6623, 1
store i32 %6624, i32* %3
%6625 = load i32, i32* %3
%6626 = and i32 %6625, -1044481
store i32 %6626, i32* %3
%6627 = load i32, i32* %3
%6628 = xor i32 %6627, 81954
store i32 %6628, i32* %3
%6629 = load i32, i32* %3
%6630 = srem i32 %6629, 268435443
store i32 %6630, i32* %3
%6631 = load i32, i32* %3
%6632 = add nsw i32 %6631, 6
store i32 %6632, i32* %3
%6633 = load i32, i32* %3
%6634 = mul nsw i32 %6633, 10
store i32 %6634, i32* %3
%6635 = load i32, i32* %3
%6636 = add nsw i32 %6635, 1
store i32 %6636, i32* %3
%6637 = load i32, i32* %3
%6638 = mul nsw i32 %6637, 2
store i32 %6638, i32* %3
%6639 = load i32, i32* %3
%6640 = sub nsw i32 %6639, 1
store i32 %6640, i32* %3
%6641 = load i32, i32* %3
%6642 = and i32 %6641, -1044481
store i32 %6642, i32* %3
%6643 = load i32, i32* %3
%6644 = xor i32 %6643, 81954
store i32 %6644, i32* %3
%6645 = load i32, i32* %3
%6646 = srem i32 %6645, 268435443
store i32 %6646, i32* %3
%6647 = load i32, i32* %3
%6648 = add nsw i32 %6647, 6
store i32 %6648, i32* %3
%6649 = load i32, i32* %3
%6650 = mul nsw i32 %6649, 10
store i32 %6650, i32* %3
%6651 = load i32, i32* %3
%6652 = add nsw i32 %6651, 1
store i32 %6652, i32* %3
%6653 = load i32, i32* %3
%6654 = mul nsw i32 %6653, 2
store i32 %6654, i32* %3
%6655 = load i32, i32* %3
%6656 = sub nsw i32 %6655, 1
store i32 %6656, i32* %3
%6657 = load i32, i32* %3
%6658 = and i32 %6657, -1044481
store i32 %6658, i32* %3
%6659 = load i32, i32* %3
%6660 = xor i32 %6659, 81954
store i32 %6660, i32* %3
%6661 = load i32, i32* %3
%6662 = srem i32 %6661, 268435443
store i32 %6662, i32* %3
%6663 = load i32, i32* %3
%6664 = add nsw i32 %6663, 6
store i32 %6664, i32* %3
%6665 = load i32, i32* %3
%6666 = mul nsw i32 %6665, 10
store i32 %6666, i32* %3
%6667 = load i32, i32* %3
%6668 = add nsw i32 %6667, 1
store i32 %6668, i32* %3
%6669 = load i32, i32* %3
%6670 = mul nsw i32 %6669, 2
store i32 %6670, i32* %3
%6671 = load i32, i32* %3
%6672 = sub nsw i32 %6671, 1
store i32 %6672, i32* %3
%6673 = load i32, i32* %3
%6674 = and i32 %6673, -1044481
store i32 %6674, i32* %3
%6675 = load i32, i32* %3
%6676 = xor i32 %6675, 81954
store i32 %6676, i32* %3
%6677 = load i32, i32* %3
%6678 = srem i32 %6677, 268435443
store i32 %6678, i32* %3
%6679 = load i32, i32* %3
%6680 = add nsw i32 %6679, 6
store i32 %6680, i32* %3
%6681 = load i32, i32* %3
%6682 = mul nsw i32 %6681, 10
store i32 %6682, i32* %3
%6683 = load i32, i32* %3
%6684 = add nsw i32 %6683, 1
store i32 %6684, i32* %3
%6685 = load i32, i32* %3
%6686 = mul nsw i32 %6685, 2
store i32 %6686, i32* %3
%6687 = load i32, i32* %3
%6688 = sub nsw i32 %6687, 1
store i32 %6688, i32* %3
%6689 = load i32, i32* %3
%6690 = and i32 %6689, -1044481
store i32 %6690, i32* %3
%6691 = load i32, i32* %3
%6692 = xor i32 %6691, 81954
store i32 %6692, i32* %3
%6693 = load i32, i32* %3
%6694 = srem i32 %6693, 268435443
store i32 %6694, i32* %3
%6695 = load i32, i32* %3
%6696 = add nsw i32 %6695, 6
store i32 %6696, i32* %3
%6697 = load i32, i32* %3
%6698 = mul nsw i32 %6697, 10
store i32 %6698, i32* %3
%6699 = load i32, i32* %3
%6700 = add nsw i32 %6699, 1
store i32 %6700, i32* %3
%6701 = load i32, i32* %3
%6702 = mul nsw i32 %6701, 2
store i32 %6702, i32* %3
%6703 = load i32, i32* %3
%6704 = sub nsw i32 %6703, 1
store i32 %6704, i32* %3
%6705 = load i32, i32* %3
%6706 = and i32 %6705, -1044481
store i32 %6706, i32* %3
%6707 = load i32, i32* %3
%6708 = xor i32 %6707, 81954
store i32 %6708, i32* %3
%6709 = load i32, i32* %3
%6710 = srem i32 %6709, 268435443
store i32 %6710, i32* %3
%6711 = load i32, i32* %3
%6712 = add nsw i32 %6711, 6
store i32 %6712, i32* %3
%6713 = load i32, i32* %3
%6714 = mul nsw i32 %6713, 10
store i32 %6714, i32* %3
%6715 = load i32, i32* %3
%6716 = add nsw i32 %6715, 1
store i32 %6716, i32* %3
%6717 = load i32, i32* %3
%6718 = mul nsw i32 %6717, 2
store i32 %6718, i32* %3
%6719 = load i32, i32* %3
%6720 = sub nsw i32 %6719, 1
store i32 %6720, i32* %3
%6721 = load i32, i32* %3
%6722 = and i32 %6721, -1044481
store i32 %6722, i32* %3
%6723 = load i32, i32* %3
%6724 = xor i32 %6723, 81954
store i32 %6724, i32* %3
%6725 = load i32, i32* %3
%6726 = srem i32 %6725, 268435443
store i32 %6726, i32* %3
%6727 = load i32, i32* %3
%6728 = add nsw i32 %6727, 6
store i32 %6728, i32* %3
%6729 = load i32, i32* %3
%6730 = mul nsw i32 %6729, 10
store i32 %6730, i32* %3
%6731 = load i32, i32* %3
%6732 = add nsw i32 %6731, 1
store i32 %6732, i32* %3
%6733 = load i32, i32* %3
%6734 = mul nsw i32 %6733, 2
store i32 %6734, i32* %3
%6735 = load i32, i32* %3
%6736 = sub nsw i32 %6735, 1
store i32 %6736, i32* %3
%6737 = load i32, i32* %3
%6738 = and i32 %6737, -1044481
store i32 %6738, i32* %3
%6739 = load i32, i32* %3
%6740 = xor i32 %6739, 81954
store i32 %6740, i32* %3
%6741 = load i32, i32* %3
%6742 = srem i32 %6741, 268435443
store i32 %6742, i32* %3
%6743 = load i32, i32* %3
%6744 = add nsw i32 %6743, 6
store i32 %6744, i32* %3
%6745 = load i32, i32* %3
%6746 = mul nsw i32 %6745, 10
store i32 %6746, i32* %3
%6747 = load i32, i32* %3
%6748 = add nsw i32 %6747, 1
store i32 %6748, i32* %3
%6749 = load i32, i32* %3
%6750 = mul nsw i32 %6749, 2
store i32 %6750, i32* %3
%6751 = load i32, i32* %3
%6752 = sub nsw i32 %6751, 1
store i32 %6752, i32* %3
%6753 = load i32, i32* %3
%6754 = and i32 %6753, -1044481
store i32 %6754, i32* %3
%6755 = load i32, i32* %3
%6756 = xor i32 %6755, 81954
store i32 %6756, i32* %3
%6757 = load i32, i32* %3
%6758 = srem i32 %6757, 268435443
store i32 %6758, i32* %3
%6759 = load i32, i32* %3
%6760 = add nsw i32 %6759, 6
store i32 %6760, i32* %3
%6761 = load i32, i32* %3
%6762 = mul nsw i32 %6761, 10
store i32 %6762, i32* %3
%6763 = load i32, i32* %3
%6764 = add nsw i32 %6763, 1
store i32 %6764, i32* %3
%6765 = load i32, i32* %3
%6766 = mul nsw i32 %6765, 2
store i32 %6766, i32* %3
%6767 = load i32, i32* %3
%6768 = sub nsw i32 %6767, 1
store i32 %6768, i32* %3
%6769 = load i32, i32* %3
%6770 = and i32 %6769, -1044481
store i32 %6770, i32* %3
%6771 = load i32, i32* %3
%6772 = xor i32 %6771, 81954
store i32 %6772, i32* %3
%6773 = load i32, i32* %3
%6774 = srem i32 %6773, 268435443
store i32 %6774, i32* %3
%6775 = load i32, i32* %3
%6776 = add nsw i32 %6775, 6
store i32 %6776, i32* %3
%6777 = load i32, i32* %3
%6778 = mul nsw i32 %6777, 10
store i32 %6778, i32* %3
%6779 = load i32, i32* %3
%6780 = add nsw i32 %6779, 1
store i32 %6780, i32* %3
%6781 = load i32, i32* %3
%6782 = mul nsw i32 %6781, 2
store i32 %6782, i32* %3
%6783 = load i32, i32* %3
%6784 = sub nsw i32 %6783, 1
store i32 %6784, i32* %3
%6785 = load i32, i32* %3
%6786 = and i32 %6785, -1044481
store i32 %6786, i32* %3
%6787 = load i32, i32* %3
%6788 = xor i32 %6787, 81954
store i32 %6788, i32* %3
%6789 = load i32, i32* %3
%6790 = srem i32 %6789, 268435443
store i32 %6790, i32* %3
%6791 = load i32, i32* %3
%6792 = add nsw i32 %6791, 6
store i32 %6792, i32* %3
%6793 = load i32, i32* %3
%6794 = mul nsw i32 %6793, 10
store i32 %6794, i32* %3
%6795 = load i32, i32* %3
%6796 = add nsw i32 %6795, 1
store i32 %6796, i32* %3
%6797 = load i32, i32* %3
%6798 = mul nsw i32 %6797, 2
store i32 %6798, i32* %3
%6799 = load i32, i32* %3
%6800 = sub nsw i32 %6799, 1
store i32 %6800, i32* %3
%6801 = load i32, i32* %3
%6802 = and i32 %6801, -1044481
store i32 %6802, i32* %3
%6803 = load i32, i32* %3
%6804 = xor i32 %6803, 81954
store i32 %6804, i32* %3
%6805 = load i32, i32* %3
%6806 = srem i32 %6805, 268435443
store i32 %6806, i32* %3
%6807 = load i32, i32* %3
%6808 = add nsw i32 %6807, 6
store i32 %6808, i32* %3
%6809 = load i32, i32* %3
%6810 = mul nsw i32 %6809, 10
store i32 %6810, i32* %3
%6811 = load i32, i32* %3
%6812 = add nsw i32 %6811, 1
store i32 %6812, i32* %3
%6813 = load i32, i32* %3
%6814 = mul nsw i32 %6813, 2
store i32 %6814, i32* %3
%6815 = load i32, i32* %3
%6816 = sub nsw i32 %6815, 1
store i32 %6816, i32* %3
%6817 = load i32, i32* %3
%6818 = and i32 %6817, -1044481
store i32 %6818, i32* %3
%6819 = load i32, i32* %3
%6820 = xor i32 %6819, 81954
store i32 %6820, i32* %3
%6821 = load i32, i32* %3
%6822 = srem i32 %6821, 268435443
store i32 %6822, i32* %3
%6823 = load i32, i32* %3
%6824 = add nsw i32 %6823, 6
store i32 %6824, i32* %3
%6825 = load i32, i32* %3
%6826 = mul nsw i32 %6825, 10
store i32 %6826, i32* %3
%6827 = load i32, i32* %3
%6828 = add nsw i32 %6827, 1
store i32 %6828, i32* %3
%6829 = load i32, i32* %3
%6830 = mul nsw i32 %6829, 2
store i32 %6830, i32* %3
%6831 = load i32, i32* %3
%6832 = sub nsw i32 %6831, 1
store i32 %6832, i32* %3
%6833 = load i32, i32* %3
%6834 = and i32 %6833, -1044481
store i32 %6834, i32* %3
%6835 = load i32, i32* %3
%6836 = xor i32 %6835, 81954
store i32 %6836, i32* %3
%6837 = load i32, i32* %3
%6838 = srem i32 %6837, 268435443
store i32 %6838, i32* %3
%6839 = load i32, i32* %3
%6840 = add nsw i32 %6839, 6
store i32 %6840, i32* %3
%6841 = load i32, i32* %3
%6842 = mul nsw i32 %6841, 10
store i32 %6842, i32* %3
%6843 = load i32, i32* %3
%6844 = add nsw i32 %6843, 1
store i32 %6844, i32* %3
%6845 = load i32, i32* %3
%6846 = mul nsw i32 %6845, 2
store i32 %6846, i32* %3
%6847 = load i32, i32* %3
%6848 = sub nsw i32 %6847, 1
store i32 %6848, i32* %3
%6849 = load i32, i32* %3
%6850 = and i32 %6849, -1044481
store i32 %6850, i32* %3
%6851 = load i32, i32* %3
%6852 = xor i32 %6851, 81954
store i32 %6852, i32* %3
%6853 = load i32, i32* %3
%6854 = srem i32 %6853, 268435443
store i32 %6854, i32* %3
%6855 = load i32, i32* %3
%6856 = add nsw i32 %6855, 6
store i32 %6856, i32* %3
%6857 = load i32, i32* %3
%6858 = mul nsw i32 %6857, 10
store i32 %6858, i32* %3
%6859 = load i32, i32* %3
%6860 = add nsw i32 %6859, 1
store i32 %6860, i32* %3
%6861 = load i32, i32* %3
%6862 = mul nsw i32 %6861, 2
store i32 %6862, i32* %3
%6863 = load i32, i32* %3
%6864 = sub nsw i32 %6863, 1
store i32 %6864, i32* %3
%6865 = load i32, i32* %3
%6866 = and i32 %6865, -1044481
store i32 %6866, i32* %3
%6867 = load i32, i32* %3
%6868 = xor i32 %6867, 81954
store i32 %6868, i32* %3
%6869 = load i32, i32* %3
%6870 = srem i32 %6869, 268435443
store i32 %6870, i32* %3
%6871 = load i32, i32* %3
%6872 = add nsw i32 %6871, 6
store i32 %6872, i32* %3
%6873 = load i32, i32* %3
%6874 = mul nsw i32 %6873, 10
store i32 %6874, i32* %3
%6875 = load i32, i32* %3
%6876 = add nsw i32 %6875, 1
store i32 %6876, i32* %3
%6877 = load i32, i32* %3
%6878 = mul nsw i32 %6877, 2
store i32 %6878, i32* %3
%6879 = load i32, i32* %3
%6880 = sub nsw i32 %6879, 1
store i32 %6880, i32* %3
%6881 = load i32, i32* %3
%6882 = and i32 %6881, -1044481
store i32 %6882, i32* %3
%6883 = load i32, i32* %3
%6884 = xor i32 %6883, 81954
store i32 %6884, i32* %3
%6885 = load i32, i32* %3
%6886 = srem i32 %6885, 268435443
store i32 %6886, i32* %3
%6887 = load i32, i32* %3
%6888 = add nsw i32 %6887, 6
store i32 %6888, i32* %3
%6889 = load i32, i32* %3
%6890 = mul nsw i32 %6889, 10
store i32 %6890, i32* %3
%6891 = load i32, i32* %3
%6892 = add nsw i32 %6891, 1
store i32 %6892, i32* %3
%6893 = load i32, i32* %3
%6894 = mul nsw i32 %6893, 2
store i32 %6894, i32* %3
%6895 = load i32, i32* %3
%6896 = sub nsw i32 %6895, 1
store i32 %6896, i32* %3
%6897 = load i32, i32* %3
%6898 = and i32 %6897, -1044481
store i32 %6898, i32* %3
%6899 = load i32, i32* %3
%6900 = xor i32 %6899, 81954
store i32 %6900, i32* %3
%6901 = load i32, i32* %3
%6902 = srem i32 %6901, 268435443
store i32 %6902, i32* %3
%6903 = load i32, i32* %3
%6904 = add nsw i32 %6903, 6
store i32 %6904, i32* %3
%6905 = load i32, i32* %3
%6906 = mul nsw i32 %6905, 10
store i32 %6906, i32* %3
%6907 = load i32, i32* %3
%6908 = add nsw i32 %6907, 1
store i32 %6908, i32* %3
%6909 = load i32, i32* %3
%6910 = mul nsw i32 %6909, 2
store i32 %6910, i32* %3
%6911 = load i32, i32* %3
%6912 = sub nsw i32 %6911, 1
store i32 %6912, i32* %3
%6913 = load i32, i32* %3
%6914 = and i32 %6913, -1044481
store i32 %6914, i32* %3
%6915 = load i32, i32* %3
%6916 = xor i32 %6915, 81954
store i32 %6916, i32* %3
%6917 = load i32, i32* %3
%6918 = srem i32 %6917, 268435443
store i32 %6918, i32* %3
%6919 = load i32, i32* %3
%6920 = add nsw i32 %6919, 6
store i32 %6920, i32* %3
%6921 = load i32, i32* %3
%6922 = mul nsw i32 %6921, 10
store i32 %6922, i32* %3
%6923 = load i32, i32* %3
%6924 = add nsw i32 %6923, 1
store i32 %6924, i32* %3
%6925 = load i32, i32* %3
%6926 = mul nsw i32 %6925, 2
store i32 %6926, i32* %3
%6927 = load i32, i32* %3
%6928 = sub nsw i32 %6927, 1
store i32 %6928, i32* %3
%6929 = load i32, i32* %3
%6930 = and i32 %6929, -1044481
store i32 %6930, i32* %3
%6931 = load i32, i32* %3
%6932 = xor i32 %6931, 81954
store i32 %6932, i32* %3
%6933 = load i32, i32* %3
%6934 = srem i32 %6933, 268435443
store i32 %6934, i32* %3
%6935 = load i32, i32* %3
%6936 = add nsw i32 %6935, 6
store i32 %6936, i32* %3
%6937 = load i32, i32* %3
%6938 = mul nsw i32 %6937, 10
store i32 %6938, i32* %3
%6939 = load i32, i32* %3
%6940 = add nsw i32 %6939, 1
store i32 %6940, i32* %3
%6941 = load i32, i32* %3
%6942 = mul nsw i32 %6941, 2
store i32 %6942, i32* %3
%6943 = load i32, i32* %3
%6944 = sub nsw i32 %6943, 1
store i32 %6944, i32* %3
%6945 = load i32, i32* %3
%6946 = and i32 %6945, -1044481
store i32 %6946, i32* %3
%6947 = load i32, i32* %3
%6948 = xor i32 %6947, 81954
store i32 %6948, i32* %3
%6949 = load i32, i32* %3
%6950 = srem i32 %6949, 268435443
store i32 %6950, i32* %3
%6951 = load i32, i32* %3
%6952 = add nsw i32 %6951, 6
store i32 %6952, i32* %3
%6953 = load i32, i32* %3
%6954 = mul nsw i32 %6953, 10
store i32 %6954, i32* %3
%6955 = load i32, i32* %3
%6956 = add nsw i32 %6955, 1
store i32 %6956, i32* %3
%6957 = load i32, i32* %3
%6958 = mul nsw i32 %6957, 2
store i32 %6958, i32* %3
%6959 = load i32, i32* %3
%6960 = sub nsw i32 %6959, 1
store i32 %6960, i32* %3
%6961 = load i32, i32* %3
%6962 = and i32 %6961, -1044481
store i32 %6962, i32* %3
%6963 = load i32, i32* %3
%6964 = xor i32 %6963, 81954
store i32 %6964, i32* %3
%6965 = load i32, i32* %3
%6966 = srem i32 %6965, 268435443
store i32 %6966, i32* %3
%6967 = load i32, i32* %3
%6968 = add nsw i32 %6967, 6
store i32 %6968, i32* %3
%6969 = load i32, i32* %3
%6970 = mul nsw i32 %6969, 10
store i32 %6970, i32* %3
%6971 = load i32, i32* %3
%6972 = add nsw i32 %6971, 1
store i32 %6972, i32* %3
%6973 = load i32, i32* %3
%6974 = mul nsw i32 %6973, 2
store i32 %6974, i32* %3
%6975 = load i32, i32* %3
%6976 = sub nsw i32 %6975, 1
store i32 %6976, i32* %3
%6977 = load i32, i32* %3
%6978 = and i32 %6977, -1044481
store i32 %6978, i32* %3
%6979 = load i32, i32* %3
%6980 = xor i32 %6979, 81954
store i32 %6980, i32* %3
%6981 = load i32, i32* %3
%6982 = srem i32 %6981, 268435443
store i32 %6982, i32* %3
%6983 = load i32, i32* %3
%6984 = add nsw i32 %6983, 6
store i32 %6984, i32* %3
%6985 = load i32, i32* %3
%6986 = mul nsw i32 %6985, 10
store i32 %6986, i32* %3
%6987 = load i32, i32* %3
%6988 = add nsw i32 %6987, 1
store i32 %6988, i32* %3
%6989 = load i32, i32* %3
%6990 = mul nsw i32 %6989, 2
store i32 %6990, i32* %3
%6991 = load i32, i32* %3
%6992 = sub nsw i32 %6991, 1
store i32 %6992, i32* %3
%6993 = load i32, i32* %3
%6994 = and i32 %6993, -1044481
store i32 %6994, i32* %3
%6995 = load i32, i32* %3
%6996 = xor i32 %6995, 81954
store i32 %6996, i32* %3
%6997 = load i32, i32* %3
%6998 = srem i32 %6997, 268435443
store i32 %6998, i32* %3
%6999 = load i32, i32* %3
%7000 = add nsw i32 %6999, 6
store i32 %7000, i32* %3
%7001 = load i32, i32* %3
%7002 = mul nsw i32 %7001, 10
store i32 %7002, i32* %3
%7003 = load i32, i32* %3
%7004 = add nsw i32 %7003, 1
store i32 %7004, i32* %3
%7005 = load i32, i32* %3
%7006 = mul nsw i32 %7005, 2
store i32 %7006, i32* %3
%7007 = load i32, i32* %3
%7008 = sub nsw i32 %7007, 1
store i32 %7008, i32* %3
%7009 = load i32, i32* %3
%7010 = and i32 %7009, -1044481
store i32 %7010, i32* %3
%7011 = load i32, i32* %3
%7012 = xor i32 %7011, 81954
store i32 %7012, i32* %3
%7013 = load i32, i32* %3
%7014 = srem i32 %7013, 268435443
store i32 %7014, i32* %3
%7015 = load i32, i32* %3
%7016 = add nsw i32 %7015, 6
store i32 %7016, i32* %3
%7017 = load i32, i32* %3
%7018 = mul nsw i32 %7017, 10
store i32 %7018, i32* %3
%7019 = load i32, i32* %3
%7020 = add nsw i32 %7019, 1
store i32 %7020, i32* %3
%7021 = load i32, i32* %3
%7022 = mul nsw i32 %7021, 2
store i32 %7022, i32* %3
%7023 = load i32, i32* %3
%7024 = sub nsw i32 %7023, 1
store i32 %7024, i32* %3
%7025 = load i32, i32* %3
%7026 = and i32 %7025, -1044481
store i32 %7026, i32* %3
%7027 = load i32, i32* %3
%7028 = xor i32 %7027, 81954
store i32 %7028, i32* %3
%7029 = load i32, i32* %3
%7030 = srem i32 %7029, 268435443
store i32 %7030, i32* %3
%7031 = load i32, i32* %3
%7032 = add nsw i32 %7031, 6
store i32 %7032, i32* %3
%7033 = load i32, i32* %3
%7034 = mul nsw i32 %7033, 10
store i32 %7034, i32* %3
%7035 = load i32, i32* %3
%7036 = add nsw i32 %7035, 1
store i32 %7036, i32* %3
%7037 = load i32, i32* %3
%7038 = mul nsw i32 %7037, 2
store i32 %7038, i32* %3
%7039 = load i32, i32* %3
%7040 = sub nsw i32 %7039, 1
store i32 %7040, i32* %3
%7041 = load i32, i32* %3
%7042 = and i32 %7041, -1044481
store i32 %7042, i32* %3
%7043 = load i32, i32* %3
%7044 = xor i32 %7043, 81954
store i32 %7044, i32* %3
%7045 = load i32, i32* %3
%7046 = srem i32 %7045, 268435443
store i32 %7046, i32* %3
%7047 = load i32, i32* %3
%7048 = add nsw i32 %7047, 6
store i32 %7048, i32* %3
%7049 = load i32, i32* %3
%7050 = mul nsw i32 %7049, 10
store i32 %7050, i32* %3
%7051 = load i32, i32* %3
%7052 = add nsw i32 %7051, 1
store i32 %7052, i32* %3
%7053 = load i32, i32* %3
%7054 = mul nsw i32 %7053, 2
store i32 %7054, i32* %3
%7055 = load i32, i32* %3
%7056 = sub nsw i32 %7055, 1
store i32 %7056, i32* %3
%7057 = load i32, i32* %3
%7058 = and i32 %7057, -1044481
store i32 %7058, i32* %3
%7059 = load i32, i32* %3
%7060 = xor i32 %7059, 81954
store i32 %7060, i32* %3
%7061 = load i32, i32* %3
%7062 = srem i32 %7061, 268435443
store i32 %7062, i32* %3
%7063 = load i32, i32* %3
%7064 = add nsw i32 %7063, 6
store i32 %7064, i32* %3
%7065 = load i32, i32* %3
%7066 = mul nsw i32 %7065, 10
store i32 %7066, i32* %3
%7067 = load i32, i32* %3
%7068 = add nsw i32 %7067, 1
store i32 %7068, i32* %3
%7069 = load i32, i32* %3
%7070 = mul nsw i32 %7069, 2
store i32 %7070, i32* %3
%7071 = load i32, i32* %3
%7072 = sub nsw i32 %7071, 1
store i32 %7072, i32* %3
%7073 = load i32, i32* %3
%7074 = and i32 %7073, -1044481
store i32 %7074, i32* %3
%7075 = load i32, i32* %3
%7076 = xor i32 %7075, 81954
store i32 %7076, i32* %3
%7077 = load i32, i32* %3
%7078 = srem i32 %7077, 268435443
store i32 %7078, i32* %3
%7079 = load i32, i32* %3
%7080 = add nsw i32 %7079, 6
store i32 %7080, i32* %3
%7081 = load i32, i32* %3
%7082 = mul nsw i32 %7081, 10
store i32 %7082, i32* %3
%7083 = load i32, i32* %3
%7084 = add nsw i32 %7083, 1
store i32 %7084, i32* %3
%7085 = load i32, i32* %3
%7086 = mul nsw i32 %7085, 2
store i32 %7086, i32* %3
%7087 = load i32, i32* %3
%7088 = sub nsw i32 %7087, 1
store i32 %7088, i32* %3
%7089 = load i32, i32* %3
%7090 = and i32 %7089, -1044481
store i32 %7090, i32* %3
%7091 = load i32, i32* %3
%7092 = xor i32 %7091, 81954
store i32 %7092, i32* %3
%7093 = load i32, i32* %3
%7094 = srem i32 %7093, 268435443
store i32 %7094, i32* %3
%7095 = load i32, i32* %3
%7096 = add nsw i32 %7095, 6
store i32 %7096, i32* %3
%7097 = load i32, i32* %3
%7098 = mul nsw i32 %7097, 10
store i32 %7098, i32* %3
%7099 = load i32, i32* %3
%7100 = add nsw i32 %7099, 1
store i32 %7100, i32* %3
%7101 = load i32, i32* %3
%7102 = mul nsw i32 %7101, 2
store i32 %7102, i32* %3
%7103 = load i32, i32* %3
%7104 = sub nsw i32 %7103, 1
store i32 %7104, i32* %3
%7105 = load i32, i32* %3
%7106 = and i32 %7105, -1044481
store i32 %7106, i32* %3
%7107 = load i32, i32* %3
%7108 = xor i32 %7107, 81954
store i32 %7108, i32* %3
%7109 = load i32, i32* %3
%7110 = srem i32 %7109, 268435443
store i32 %7110, i32* %3
%7111 = load i32, i32* %3
%7112 = add nsw i32 %7111, 6
store i32 %7112, i32* %3
%7113 = load i32, i32* %3
%7114 = mul nsw i32 %7113, 10
store i32 %7114, i32* %3
%7115 = load i32, i32* %3
%7116 = add nsw i32 %7115, 1
store i32 %7116, i32* %3
%7117 = load i32, i32* %3
%7118 = mul nsw i32 %7117, 2
store i32 %7118, i32* %3
%7119 = load i32, i32* %3
%7120 = sub nsw i32 %7119, 1
store i32 %7120, i32* %3
%7121 = load i32, i32* %3
%7122 = and i32 %7121, -1044481
store i32 %7122, i32* %3
%7123 = load i32, i32* %3
%7124 = xor i32 %7123, 81954
store i32 %7124, i32* %3
%7125 = load i32, i32* %3
%7126 = srem i32 %7125, 268435443
store i32 %7126, i32* %3
%7127 = load i32, i32* %3
%7128 = add nsw i32 %7127, 6
store i32 %7128, i32* %3
%7129 = load i32, i32* %3
%7130 = mul nsw i32 %7129, 10
store i32 %7130, i32* %3
%7131 = load i32, i32* %3
%7132 = add nsw i32 %7131, 1
store i32 %7132, i32* %3
%7133 = load i32, i32* %3
%7134 = mul nsw i32 %7133, 2
store i32 %7134, i32* %3
%7135 = load i32, i32* %3
%7136 = sub nsw i32 %7135, 1
store i32 %7136, i32* %3
%7137 = load i32, i32* %3
%7138 = and i32 %7137, -1044481
store i32 %7138, i32* %3
%7139 = load i32, i32* %3
%7140 = xor i32 %7139, 81954
store i32 %7140, i32* %3
%7141 = load i32, i32* %3
%7142 = srem i32 %7141, 268435443
store i32 %7142, i32* %3
%7143 = load i32, i32* %3
%7144 = add nsw i32 %7143, 6
store i32 %7144, i32* %3
%7145 = load i32, i32* %3
%7146 = mul nsw i32 %7145, 10
store i32 %7146, i32* %3
%7147 = load i32, i32* %3
%7148 = add nsw i32 %7147, 1
store i32 %7148, i32* %3
%7149 = load i32, i32* %3
%7150 = mul nsw i32 %7149, 2
store i32 %7150, i32* %3
%7151 = load i32, i32* %3
%7152 = sub nsw i32 %7151, 1
store i32 %7152, i32* %3
%7153 = load i32, i32* %3
%7154 = and i32 %7153, -1044481
store i32 %7154, i32* %3
%7155 = load i32, i32* %3
%7156 = xor i32 %7155, 81954
store i32 %7156, i32* %3
%7157 = load i32, i32* %3
%7158 = srem i32 %7157, 268435443
store i32 %7158, i32* %3
%7159 = load i32, i32* %3
%7160 = add nsw i32 %7159, 6
store i32 %7160, i32* %3
%7161 = load i32, i32* %3
%7162 = mul nsw i32 %7161, 10
store i32 %7162, i32* %3
%7163 = load i32, i32* %3
%7164 = add nsw i32 %7163, 1
store i32 %7164, i32* %3
%7165 = load i32, i32* %3
%7166 = mul nsw i32 %7165, 2
store i32 %7166, i32* %3
%7167 = load i32, i32* %3
%7168 = sub nsw i32 %7167, 1
store i32 %7168, i32* %3
%7169 = load i32, i32* %3
%7170 = and i32 %7169, -1044481
store i32 %7170, i32* %3
%7171 = load i32, i32* %3
%7172 = xor i32 %7171, 81954
store i32 %7172, i32* %3
%7173 = load i32, i32* %3
%7174 = srem i32 %7173, 268435443
store i32 %7174, i32* %3
%7175 = load i32, i32* %3
%7176 = add nsw i32 %7175, 6
store i32 %7176, i32* %3
%7177 = load i32, i32* %3
%7178 = mul nsw i32 %7177, 10
store i32 %7178, i32* %3
%7179 = load i32, i32* %3
%7180 = add nsw i32 %7179, 1
store i32 %7180, i32* %3
%7181 = load i32, i32* %3
%7182 = mul nsw i32 %7181, 2
store i32 %7182, i32* %3
%7183 = load i32, i32* %3
%7184 = sub nsw i32 %7183, 1
store i32 %7184, i32* %3
%7185 = load i32, i32* %3
%7186 = and i32 %7185, -1044481
store i32 %7186, i32* %3
%7187 = load i32, i32* %3
%7188 = xor i32 %7187, 81954
store i32 %7188, i32* %3
%7189 = load i32, i32* %3
%7190 = srem i32 %7189, 268435443
store i32 %7190, i32* %3
%7191 = load i32, i32* %3
%7192 = add nsw i32 %7191, 6
store i32 %7192, i32* %3
%7193 = load i32, i32* %3
%7194 = mul nsw i32 %7193, 10
store i32 %7194, i32* %3
%7195 = load i32, i32* %3
%7196 = add nsw i32 %7195, 1
store i32 %7196, i32* %3
%7197 = load i32, i32* %3
%7198 = mul nsw i32 %7197, 2
store i32 %7198, i32* %3
%7199 = load i32, i32* %3
%7200 = sub nsw i32 %7199, 1
store i32 %7200, i32* %3
%7201 = load i32, i32* %3
%7202 = and i32 %7201, -1044481
store i32 %7202, i32* %3
%7203 = load i32, i32* %3
%7204 = xor i32 %7203, 81954
store i32 %7204, i32* %3
%7205 = load i32, i32* %3
%7206 = srem i32 %7205, 268435443
store i32 %7206, i32* %3
%7207 = load i32, i32* %3
%7208 = add nsw i32 %7207, 6
store i32 %7208, i32* %3
%7209 = load i32, i32* %3
%7210 = mul nsw i32 %7209, 10
store i32 %7210, i32* %3
%7211 = load i32, i32* %3
%7212 = add nsw i32 %7211, 1
store i32 %7212, i32* %3
%7213 = load i32, i32* %3
%7214 = mul nsw i32 %7213, 2
store i32 %7214, i32* %3
%7215 = load i32, i32* %3
%7216 = sub nsw i32 %7215, 1
store i32 %7216, i32* %3
%7217 = load i32, i32* %3
%7218 = and i32 %7217, -1044481
store i32 %7218, i32* %3
%7219 = load i32, i32* %3
%7220 = xor i32 %7219, 81954
store i32 %7220, i32* %3
%7221 = load i32, i32* %3
%7222 = srem i32 %7221, 268435443
store i32 %7222, i32* %3
%7223 = load i32, i32* %3
%7224 = add nsw i32 %7223, 6
store i32 %7224, i32* %3
%7225 = load i32, i32* %3
%7226 = mul nsw i32 %7225, 10
store i32 %7226, i32* %3
%7227 = load i32, i32* %3
%7228 = add nsw i32 %7227, 1
store i32 %7228, i32* %3
%7229 = load i32, i32* %3
%7230 = mul nsw i32 %7229, 2
store i32 %7230, i32* %3
%7231 = load i32, i32* %3
%7232 = sub nsw i32 %7231, 1
store i32 %7232, i32* %3
%7233 = load i32, i32* %3
%7234 = and i32 %7233, -1044481
store i32 %7234, i32* %3
%7235 = load i32, i32* %3
%7236 = xor i32 %7235, 81954
store i32 %7236, i32* %3
%7237 = load i32, i32* %3
%7238 = srem i32 %7237, 268435443
store i32 %7238, i32* %3
%7239 = load i32, i32* %3
%7240 = add nsw i32 %7239, 6
store i32 %7240, i32* %3
%7241 = load i32, i32* %3
%7242 = mul nsw i32 %7241, 10
store i32 %7242, i32* %3
%7243 = load i32, i32* %3
%7244 = add nsw i32 %7243, 1
store i32 %7244, i32* %3
%7245 = load i32, i32* %3
%7246 = mul nsw i32 %7245, 2
store i32 %7246, i32* %3
%7247 = load i32, i32* %3
%7248 = sub nsw i32 %7247, 1
store i32 %7248, i32* %3
%7249 = load i32, i32* %3
%7250 = and i32 %7249, -1044481
store i32 %7250, i32* %3
%7251 = load i32, i32* %3
%7252 = xor i32 %7251, 81954
store i32 %7252, i32* %3
%7253 = load i32, i32* %3
%7254 = srem i32 %7253, 268435443
store i32 %7254, i32* %3
%7255 = load i32, i32* %3
%7256 = add nsw i32 %7255, 6
store i32 %7256, i32* %3
%7257 = load i32, i32* %3
%7258 = mul nsw i32 %7257, 10
store i32 %7258, i32* %3
%7259 = load i32, i32* %3
%7260 = add nsw i32 %7259, 1
store i32 %7260, i32* %3
%7261 = load i32, i32* %3
%7262 = mul nsw i32 %7261, 2
store i32 %7262, i32* %3
%7263 = load i32, i32* %3
%7264 = sub nsw i32 %7263, 1
store i32 %7264, i32* %3
%7265 = load i32, i32* %3
%7266 = and i32 %7265, -1044481
store i32 %7266, i32* %3
%7267 = load i32, i32* %3
%7268 = xor i32 %7267, 81954
store i32 %7268, i32* %3
%7269 = load i32, i32* %3
%7270 = srem i32 %7269, 268435443
store i32 %7270, i32* %3
%7271 = load i32, i32* %3
%7272 = add nsw i32 %7271, 6
store i32 %7272, i32* %3
%7273 = load i32, i32* %3
%7274 = mul nsw i32 %7273, 10
store i32 %7274, i32* %3
%7275 = load i32, i32* %3
%7276 = add nsw i32 %7275, 1
store i32 %7276, i32* %3
%7277 = load i32, i32* %3
%7278 = mul nsw i32 %7277, 2
store i32 %7278, i32* %3
%7279 = load i32, i32* %3
%7280 = sub nsw i32 %7279, 1
store i32 %7280, i32* %3
%7281 = load i32, i32* %3
%7282 = and i32 %7281, -1044481
store i32 %7282, i32* %3
%7283 = load i32, i32* %3
%7284 = xor i32 %7283, 81954
store i32 %7284, i32* %3
%7285 = load i32, i32* %3
%7286 = srem i32 %7285, 268435443
store i32 %7286, i32* %3
%7287 = load i32, i32* %3
%7288 = add nsw i32 %7287, 6
store i32 %7288, i32* %3
%7289 = load i32, i32* %3
%7290 = mul nsw i32 %7289, 10
store i32 %7290, i32* %3
%7291 = load i32, i32* %3
%7292 = add nsw i32 %7291, 1
store i32 %7292, i32* %3
%7293 = load i32, i32* %3
%7294 = mul nsw i32 %7293, 2
store i32 %7294, i32* %3
%7295 = load i32, i32* %3
%7296 = sub nsw i32 %7295, 1
store i32 %7296, i32* %3
%7297 = load i32, i32* %3
%7298 = and i32 %7297, -1044481
store i32 %7298, i32* %3
%7299 = load i32, i32* %3
%7300 = xor i32 %7299, 81954
store i32 %7300, i32* %3
%7301 = load i32, i32* %3
%7302 = srem i32 %7301, 268435443
store i32 %7302, i32* %3
%7303 = load i32, i32* %3
%7304 = add nsw i32 %7303, 6
store i32 %7304, i32* %3
%7305 = load i32, i32* %3
%7306 = mul nsw i32 %7305, 10
store i32 %7306, i32* %3
%7307 = load i32, i32* %3
%7308 = add nsw i32 %7307, 1
store i32 %7308, i32* %3
%7309 = load i32, i32* %3
%7310 = mul nsw i32 %7309, 2
store i32 %7310, i32* %3
%7311 = load i32, i32* %3
%7312 = sub nsw i32 %7311, 1
store i32 %7312, i32* %3
%7313 = load i32, i32* %3
%7314 = and i32 %7313, -1044481
store i32 %7314, i32* %3
%7315 = load i32, i32* %3
%7316 = xor i32 %7315, 81954
store i32 %7316, i32* %3
%7317 = load i32, i32* %3
%7318 = srem i32 %7317, 268435443
store i32 %7318, i32* %3
%7319 = load i32, i32* %3
%7320 = add nsw i32 %7319, 6
store i32 %7320, i32* %3
%7321 = load i32, i32* %3
%7322 = mul nsw i32 %7321, 10
store i32 %7322, i32* %3
%7323 = load i32, i32* %3
%7324 = add nsw i32 %7323, 1
store i32 %7324, i32* %3
%7325 = load i32, i32* %3
%7326 = mul nsw i32 %7325, 2
store i32 %7326, i32* %3
%7327 = load i32, i32* %3
%7328 = sub nsw i32 %7327, 1
store i32 %7328, i32* %3
%7329 = load i32, i32* %3
%7330 = and i32 %7329, -1044481
store i32 %7330, i32* %3
%7331 = load i32, i32* %3
%7332 = xor i32 %7331, 81954
store i32 %7332, i32* %3
%7333 = load i32, i32* %3
%7334 = srem i32 %7333, 268435443
store i32 %7334, i32* %3
%7335 = load i32, i32* %3
%7336 = add nsw i32 %7335, 6
store i32 %7336, i32* %3
%7337 = load i32, i32* %3
%7338 = mul nsw i32 %7337, 10
store i32 %7338, i32* %3
%7339 = load i32, i32* %3
%7340 = add nsw i32 %7339, 1
store i32 %7340, i32* %3
%7341 = load i32, i32* %3
%7342 = mul nsw i32 %7341, 2
store i32 %7342, i32* %3
%7343 = load i32, i32* %3
%7344 = sub nsw i32 %7343, 1
store i32 %7344, i32* %3
%7345 = load i32, i32* %3
%7346 = and i32 %7345, -1044481
store i32 %7346, i32* %3
%7347 = load i32, i32* %3
%7348 = xor i32 %7347, 81954
store i32 %7348, i32* %3
%7349 = load i32, i32* %3
%7350 = srem i32 %7349, 268435443
store i32 %7350, i32* %3
%7351 = load i32, i32* %3
%7352 = add nsw i32 %7351, 6
store i32 %7352, i32* %3
%7353 = load i32, i32* %3
%7354 = mul nsw i32 %7353, 10
store i32 %7354, i32* %3
%7355 = load i32, i32* %3
%7356 = add nsw i32 %7355, 1
store i32 %7356, i32* %3
%7357 = load i32, i32* %3
%7358 = mul nsw i32 %7357, 2
store i32 %7358, i32* %3
%7359 = load i32, i32* %3
%7360 = sub nsw i32 %7359, 1
store i32 %7360, i32* %3
%7361 = load i32, i32* %3
%7362 = and i32 %7361, -1044481
store i32 %7362, i32* %3
%7363 = load i32, i32* %3
%7364 = xor i32 %7363, 81954
store i32 %7364, i32* %3
%7365 = load i32, i32* %3
%7366 = srem i32 %7365, 268435443
store i32 %7366, i32* %3
%7367 = load i32, i32* %3
%7368 = add nsw i32 %7367, 6
store i32 %7368, i32* %3
%7369 = load i32, i32* %3
%7370 = mul nsw i32 %7369, 10
store i32 %7370, i32* %3
%7371 = load i32, i32* %3
%7372 = add nsw i32 %7371, 1
store i32 %7372, i32* %3
%7373 = load i32, i32* %3
%7374 = mul nsw i32 %7373, 2
store i32 %7374, i32* %3
%7375 = load i32, i32* %3
%7376 = sub nsw i32 %7375, 1
store i32 %7376, i32* %3
%7377 = load i32, i32* %3
%7378 = and i32 %7377, -1044481
store i32 %7378, i32* %3
%7379 = load i32, i32* %3
%7380 = xor i32 %7379, 81954
store i32 %7380, i32* %3
%7381 = load i32, i32* %3
%7382 = srem i32 %7381, 268435443
store i32 %7382, i32* %3
%7383 = load i32, i32* %3
%7384 = add nsw i32 %7383, 6
store i32 %7384, i32* %3
%7385 = load i32, i32* %3
%7386 = mul nsw i32 %7385, 10
store i32 %7386, i32* %3
%7387 = load i32, i32* %3
%7388 = add nsw i32 %7387, 1
store i32 %7388, i32* %3
%7389 = load i32, i32* %3
%7390 = mul nsw i32 %7389, 2
store i32 %7390, i32* %3
%7391 = load i32, i32* %3
%7392 = sub nsw i32 %7391, 1
store i32 %7392, i32* %3
%7393 = load i32, i32* %3
%7394 = and i32 %7393, -1044481
store i32 %7394, i32* %3
%7395 = load i32, i32* %3
%7396 = xor i32 %7395, 81954
store i32 %7396, i32* %3
%7397 = load i32, i32* %3
%7398 = srem i32 %7397, 268435443
store i32 %7398, i32* %3
%7399 = load i32, i32* %3
%7400 = add nsw i32 %7399, 6
store i32 %7400, i32* %3
%7401 = load i32, i32* %3
%7402 = mul nsw i32 %7401, 10
store i32 %7402, i32* %3
%7403 = load i32, i32* %3
%7404 = add nsw i32 %7403, 1
store i32 %7404, i32* %3
%7405 = load i32, i32* %3
%7406 = mul nsw i32 %7405, 2
store i32 %7406, i32* %3
%7407 = load i32, i32* %3
%7408 = sub nsw i32 %7407, 1
store i32 %7408, i32* %3
%7409 = load i32, i32* %3
%7410 = and i32 %7409, -1044481
store i32 %7410, i32* %3
%7411 = load i32, i32* %3
%7412 = xor i32 %7411, 81954
store i32 %7412, i32* %3
%7413 = load i32, i32* %3
%7414 = srem i32 %7413, 268435443
store i32 %7414, i32* %3
%7415 = load i32, i32* %3
%7416 = add nsw i32 %7415, 6
store i32 %7416, i32* %3
%7417 = load i32, i32* %3
%7418 = mul nsw i32 %7417, 10
store i32 %7418, i32* %3
%7419 = load i32, i32* %3
%7420 = add nsw i32 %7419, 1
store i32 %7420, i32* %3
%7421 = load i32, i32* %3
%7422 = mul nsw i32 %7421, 2
store i32 %7422, i32* %3
%7423 = load i32, i32* %3
%7424 = sub nsw i32 %7423, 1
store i32 %7424, i32* %3
%7425 = load i32, i32* %3
%7426 = and i32 %7425, -1044481
store i32 %7426, i32* %3
%7427 = load i32, i32* %3
%7428 = xor i32 %7427, 81954
store i32 %7428, i32* %3
%7429 = load i32, i32* %3
%7430 = srem i32 %7429, 268435443
store i32 %7430, i32* %3
%7431 = load i32, i32* %3
%7432 = add nsw i32 %7431, 6
store i32 %7432, i32* %3
%7433 = load i32, i32* %3
%7434 = mul nsw i32 %7433, 10
store i32 %7434, i32* %3
%7435 = load i32, i32* %3
%7436 = add nsw i32 %7435, 1
store i32 %7436, i32* %3
%7437 = load i32, i32* %3
%7438 = mul nsw i32 %7437, 2
store i32 %7438, i32* %3
%7439 = load i32, i32* %3
%7440 = sub nsw i32 %7439, 1
store i32 %7440, i32* %3
%7441 = load i32, i32* %3
%7442 = and i32 %7441, -1044481
store i32 %7442, i32* %3
%7443 = load i32, i32* %3
%7444 = xor i32 %7443, 81954
store i32 %7444, i32* %3
%7445 = load i32, i32* %3
%7446 = srem i32 %7445, 268435443
store i32 %7446, i32* %3
%7447 = load i32, i32* %3
%7448 = add nsw i32 %7447, 6
store i32 %7448, i32* %3
%7449 = load i32, i32* %3
%7450 = mul nsw i32 %7449, 10
store i32 %7450, i32* %3
%7451 = load i32, i32* %3
%7452 = add nsw i32 %7451, 1
store i32 %7452, i32* %3
%7453 = load i32, i32* %3
%7454 = mul nsw i32 %7453, 2
store i32 %7454, i32* %3
%7455 = load i32, i32* %3
%7456 = sub nsw i32 %7455, 1
store i32 %7456, i32* %3
%7457 = load i32, i32* %3
%7458 = and i32 %7457, -1044481
store i32 %7458, i32* %3
%7459 = load i32, i32* %3
%7460 = xor i32 %7459, 81954
store i32 %7460, i32* %3
%7461 = load i32, i32* %3
%7462 = srem i32 %7461, 268435443
store i32 %7462, i32* %3
%7463 = load i32, i32* %3
%7464 = add nsw i32 %7463, 6
store i32 %7464, i32* %3
%7465 = load i32, i32* %3
%7466 = mul nsw i32 %7465, 10
store i32 %7466, i32* %3
%7467 = load i32, i32* %3
%7468 = add nsw i32 %7467, 1
store i32 %7468, i32* %3
%7469 = load i32, i32* %3
%7470 = mul nsw i32 %7469, 2
store i32 %7470, i32* %3
%7471 = load i32, i32* %3
%7472 = sub nsw i32 %7471, 1
store i32 %7472, i32* %3
%7473 = load i32, i32* %3
%7474 = and i32 %7473, -1044481
store i32 %7474, i32* %3
%7475 = load i32, i32* %3
%7476 = xor i32 %7475, 81954
store i32 %7476, i32* %3
%7477 = load i32, i32* %3
%7478 = srem i32 %7477, 268435443
store i32 %7478, i32* %3
%7479 = load i32, i32* %3
%7480 = add nsw i32 %7479, 6
store i32 %7480, i32* %3
%7481 = load i32, i32* %3
%7482 = mul nsw i32 %7481, 10
store i32 %7482, i32* %3
%7483 = load i32, i32* %3
%7484 = add nsw i32 %7483, 1
store i32 %7484, i32* %3
%7485 = load i32, i32* %3
%7486 = mul nsw i32 %7485, 2
store i32 %7486, i32* %3
%7487 = load i32, i32* %3
%7488 = sub nsw i32 %7487, 1
store i32 %7488, i32* %3
%7489 = load i32, i32* %3
%7490 = and i32 %7489, -1044481
store i32 %7490, i32* %3
%7491 = load i32, i32* %3
%7492 = xor i32 %7491, 81954
store i32 %7492, i32* %3
%7493 = load i32, i32* %3
%7494 = srem i32 %7493, 268435443
store i32 %7494, i32* %3
%7495 = load i32, i32* %3
%7496 = add nsw i32 %7495, 6
store i32 %7496, i32* %3
%7497 = load i32, i32* %3
%7498 = mul nsw i32 %7497, 10
store i32 %7498, i32* %3
%7499 = load i32, i32* %3
%7500 = add nsw i32 %7499, 1
store i32 %7500, i32* %3
%7501 = load i32, i32* %3
%7502 = mul nsw i32 %7501, 2
store i32 %7502, i32* %3
%7503 = load i32, i32* %3
%7504 = sub nsw i32 %7503, 1
store i32 %7504, i32* %3
%7505 = load i32, i32* %3
%7506 = and i32 %7505, -1044481
store i32 %7506, i32* %3
%7507 = load i32, i32* %3
%7508 = xor i32 %7507, 81954
store i32 %7508, i32* %3
%7509 = load i32, i32* %3
%7510 = srem i32 %7509, 268435443
store i32 %7510, i32* %3
%7511 = load i32, i32* %3
%7512 = add nsw i32 %7511, 6
store i32 %7512, i32* %3
%7513 = load i32, i32* %3
%7514 = mul nsw i32 %7513, 10
store i32 %7514, i32* %3
%7515 = load i32, i32* %3
%7516 = add nsw i32 %7515, 1
store i32 %7516, i32* %3
%7517 = load i32, i32* %3
%7518 = mul nsw i32 %7517, 2
store i32 %7518, i32* %3
%7519 = load i32, i32* %3
%7520 = sub nsw i32 %7519, 1
store i32 %7520, i32* %3
%7521 = load i32, i32* %3
%7522 = and i32 %7521, -1044481
store i32 %7522, i32* %3
%7523 = load i32, i32* %3
%7524 = xor i32 %7523, 81954
store i32 %7524, i32* %3
%7525 = load i32, i32* %3
%7526 = srem i32 %7525, 268435443
store i32 %7526, i32* %3
%7527 = load i32, i32* %3
%7528 = add nsw i32 %7527, 6
store i32 %7528, i32* %3
%7529 = load i32, i32* %3
%7530 = mul nsw i32 %7529, 10
store i32 %7530, i32* %3
%7531 = load i32, i32* %3
%7532 = add nsw i32 %7531, 1
store i32 %7532, i32* %3
%7533 = load i32, i32* %3
%7534 = mul nsw i32 %7533, 2
store i32 %7534, i32* %3
%7535 = load i32, i32* %3
%7536 = sub nsw i32 %7535, 1
store i32 %7536, i32* %3
%7537 = load i32, i32* %3
%7538 = and i32 %7537, -1044481
store i32 %7538, i32* %3
%7539 = load i32, i32* %3
%7540 = xor i32 %7539, 81954
store i32 %7540, i32* %3
%7541 = load i32, i32* %3
%7542 = srem i32 %7541, 268435443
store i32 %7542, i32* %3
%7543 = load i32, i32* %3
%7544 = add nsw i32 %7543, 6
store i32 %7544, i32* %3
%7545 = load i32, i32* %3
%7546 = mul nsw i32 %7545, 10
store i32 %7546, i32* %3
%7547 = load i32, i32* %3
%7548 = add nsw i32 %7547, 1
store i32 %7548, i32* %3
%7549 = load i32, i32* %3
%7550 = mul nsw i32 %7549, 2
store i32 %7550, i32* %3
%7551 = load i32, i32* %3
%7552 = sub nsw i32 %7551, 1
store i32 %7552, i32* %3
%7553 = load i32, i32* %3
%7554 = and i32 %7553, -1044481
store i32 %7554, i32* %3
%7555 = load i32, i32* %3
%7556 = xor i32 %7555, 81954
store i32 %7556, i32* %3
%7557 = load i32, i32* %3
%7558 = srem i32 %7557, 268435443
store i32 %7558, i32* %3
%7559 = load i32, i32* %3
%7560 = add nsw i32 %7559, 6
store i32 %7560, i32* %3
%7561 = load i32, i32* %3
%7562 = mul nsw i32 %7561, 10
store i32 %7562, i32* %3
%7563 = load i32, i32* %3
%7564 = add nsw i32 %7563, 1
store i32 %7564, i32* %3
%7565 = load i32, i32* %3
%7566 = mul nsw i32 %7565, 2
store i32 %7566, i32* %3
%7567 = load i32, i32* %3
%7568 = sub nsw i32 %7567, 1
store i32 %7568, i32* %3
%7569 = load i32, i32* %3
%7570 = and i32 %7569, -1044481
store i32 %7570, i32* %3
%7571 = load i32, i32* %3
%7572 = xor i32 %7571, 81954
store i32 %7572, i32* %3
%7573 = load i32, i32* %3
%7574 = srem i32 %7573, 268435443
store i32 %7574, i32* %3
%7575 = load i32, i32* %3
%7576 = add nsw i32 %7575, 6
store i32 %7576, i32* %3
%7577 = load i32, i32* %3
%7578 = mul nsw i32 %7577, 10
store i32 %7578, i32* %3
%7579 = load i32, i32* %3
%7580 = add nsw i32 %7579, 1
store i32 %7580, i32* %3
%7581 = load i32, i32* %3
%7582 = mul nsw i32 %7581, 2
store i32 %7582, i32* %3
%7583 = load i32, i32* %3
%7584 = sub nsw i32 %7583, 1
store i32 %7584, i32* %3
%7585 = load i32, i32* %3
%7586 = and i32 %7585, -1044481
store i32 %7586, i32* %3
%7587 = load i32, i32* %3
%7588 = xor i32 %7587, 81954
store i32 %7588, i32* %3
%7589 = load i32, i32* %3
%7590 = srem i32 %7589, 268435443
store i32 %7590, i32* %3
%7591 = load i32, i32* %3
%7592 = add nsw i32 %7591, 6
store i32 %7592, i32* %3
%7593 = load i32, i32* %3
%7594 = mul nsw i32 %7593, 10
store i32 %7594, i32* %3
%7595 = load i32, i32* %3
%7596 = add nsw i32 %7595, 1
store i32 %7596, i32* %3
%7597 = load i32, i32* %3
%7598 = mul nsw i32 %7597, 2
store i32 %7598, i32* %3
%7599 = load i32, i32* %3
%7600 = sub nsw i32 %7599, 1
store i32 %7600, i32* %3
%7601 = load i32, i32* %3
%7602 = and i32 %7601, -1044481
store i32 %7602, i32* %3
%7603 = load i32, i32* %3
%7604 = xor i32 %7603, 81954
store i32 %7604, i32* %3
%7605 = load i32, i32* %3
%7606 = srem i32 %7605, 268435443
store i32 %7606, i32* %3
%7607 = load i32, i32* %3
%7608 = add nsw i32 %7607, 6
store i32 %7608, i32* %3
%7609 = load i32, i32* %3
%7610 = mul nsw i32 %7609, 10
store i32 %7610, i32* %3
%7611 = load i32, i32* %3
%7612 = add nsw i32 %7611, 1
store i32 %7612, i32* %3
%7613 = load i32, i32* %3
%7614 = mul nsw i32 %7613, 2
store i32 %7614, i32* %3
%7615 = load i32, i32* %3
%7616 = sub nsw i32 %7615, 1
store i32 %7616, i32* %3
%7617 = load i32, i32* %3
%7618 = and i32 %7617, -1044481
store i32 %7618, i32* %3
%7619 = load i32, i32* %3
%7620 = xor i32 %7619, 81954
store i32 %7620, i32* %3
%7621 = load i32, i32* %3
%7622 = srem i32 %7621, 268435443
store i32 %7622, i32* %3
%7623 = load i32, i32* %3
%7624 = add nsw i32 %7623, 6
store i32 %7624, i32* %3
%7625 = load i32, i32* %3
%7626 = mul nsw i32 %7625, 10
store i32 %7626, i32* %3
%7627 = load i32, i32* %3
%7628 = add nsw i32 %7627, 1
store i32 %7628, i32* %3
%7629 = load i32, i32* %3
%7630 = mul nsw i32 %7629, 2
store i32 %7630, i32* %3
%7631 = load i32, i32* %3
%7632 = sub nsw i32 %7631, 1
store i32 %7632, i32* %3
%7633 = load i32, i32* %3
%7634 = and i32 %7633, -1044481
store i32 %7634, i32* %3
%7635 = load i32, i32* %3
%7636 = xor i32 %7635, 81954
store i32 %7636, i32* %3
%7637 = load i32, i32* %3
%7638 = srem i32 %7637, 268435443
store i32 %7638, i32* %3
%7639 = load i32, i32* %3
%7640 = add nsw i32 %7639, 6
store i32 %7640, i32* %3
%7641 = load i32, i32* %3
%7642 = mul nsw i32 %7641, 10
store i32 %7642, i32* %3
%7643 = load i32, i32* %3
%7644 = add nsw i32 %7643, 1
store i32 %7644, i32* %3
%7645 = load i32, i32* %3
%7646 = mul nsw i32 %7645, 2
store i32 %7646, i32* %3
%7647 = load i32, i32* %3
%7648 = sub nsw i32 %7647, 1
store i32 %7648, i32* %3
%7649 = load i32, i32* %3
%7650 = and i32 %7649, -1044481
store i32 %7650, i32* %3
%7651 = load i32, i32* %3
%7652 = xor i32 %7651, 81954
store i32 %7652, i32* %3
%7653 = load i32, i32* %3
%7654 = srem i32 %7653, 268435443
store i32 %7654, i32* %3
%7655 = load i32, i32* %3
%7656 = add nsw i32 %7655, 6
store i32 %7656, i32* %3
%7657 = load i32, i32* %3
%7658 = mul nsw i32 %7657, 10
store i32 %7658, i32* %3
%7659 = load i32, i32* %3
%7660 = add nsw i32 %7659, 1
store i32 %7660, i32* %3
%7661 = load i32, i32* %3
%7662 = mul nsw i32 %7661, 2
store i32 %7662, i32* %3
%7663 = load i32, i32* %3
%7664 = sub nsw i32 %7663, 1
store i32 %7664, i32* %3
%7665 = load i32, i32* %3
%7666 = and i32 %7665, -1044481
store i32 %7666, i32* %3
%7667 = load i32, i32* %3
%7668 = xor i32 %7667, 81954
store i32 %7668, i32* %3
%7669 = load i32, i32* %3
%7670 = srem i32 %7669, 268435443
store i32 %7670, i32* %3
%7671 = load i32, i32* %3
%7672 = add nsw i32 %7671, 6
store i32 %7672, i32* %3
%7673 = load i32, i32* %3
%7674 = mul nsw i32 %7673, 10
store i32 %7674, i32* %3
%7675 = load i32, i32* %3
%7676 = add nsw i32 %7675, 1
store i32 %7676, i32* %3
%7677 = load i32, i32* %3
%7678 = mul nsw i32 %7677, 2
store i32 %7678, i32* %3
%7679 = load i32, i32* %3
%7680 = sub nsw i32 %7679, 1
store i32 %7680, i32* %3
%7681 = load i32, i32* %3
%7682 = and i32 %7681, -1044481
store i32 %7682, i32* %3
%7683 = load i32, i32* %3
%7684 = xor i32 %7683, 81954
store i32 %7684, i32* %3
%7685 = load i32, i32* %3
%7686 = srem i32 %7685, 268435443
store i32 %7686, i32* %3
%7687 = load i32, i32* %3
%7688 = add nsw i32 %7687, 6
store i32 %7688, i32* %3
%7689 = load i32, i32* %3
%7690 = mul nsw i32 %7689, 10
store i32 %7690, i32* %3
%7691 = load i32, i32* %3
%7692 = add nsw i32 %7691, 1
store i32 %7692, i32* %3
%7693 = load i32, i32* %3
%7694 = mul nsw i32 %7693, 2
store i32 %7694, i32* %3
%7695 = load i32, i32* %3
%7696 = sub nsw i32 %7695, 1
store i32 %7696, i32* %3
%7697 = load i32, i32* %3
%7698 = and i32 %7697, -1044481
store i32 %7698, i32* %3
%7699 = load i32, i32* %3
%7700 = xor i32 %7699, 81954
store i32 %7700, i32* %3
%7701 = load i32, i32* %3
%7702 = srem i32 %7701, 268435443
store i32 %7702, i32* %3
%7703 = load i32, i32* %3
%7704 = add nsw i32 %7703, 6
store i32 %7704, i32* %3
%7705 = load i32, i32* %3
%7706 = mul nsw i32 %7705, 10
store i32 %7706, i32* %3
%7707 = load i32, i32* %3
%7708 = add nsw i32 %7707, 1
store i32 %7708, i32* %3
%7709 = load i32, i32* %3
%7710 = mul nsw i32 %7709, 2
store i32 %7710, i32* %3
%7711 = load i32, i32* %3
%7712 = sub nsw i32 %7711, 1
store i32 %7712, i32* %3
%7713 = load i32, i32* %3
%7714 = and i32 %7713, -1044481
store i32 %7714, i32* %3
%7715 = load i32, i32* %3
%7716 = xor i32 %7715, 81954
store i32 %7716, i32* %3
%7717 = load i32, i32* %3
%7718 = srem i32 %7717, 268435443
store i32 %7718, i32* %3
%7719 = load i32, i32* %3
%7720 = add nsw i32 %7719, 6
store i32 %7720, i32* %3
%7721 = load i32, i32* %3
%7722 = mul nsw i32 %7721, 10
store i32 %7722, i32* %3
%7723 = load i32, i32* %3
%7724 = add nsw i32 %7723, 1
store i32 %7724, i32* %3
%7725 = load i32, i32* %3
%7726 = mul nsw i32 %7725, 2
store i32 %7726, i32* %3
%7727 = load i32, i32* %3
%7728 = sub nsw i32 %7727, 1
store i32 %7728, i32* %3
%7729 = load i32, i32* %3
%7730 = and i32 %7729, -1044481
store i32 %7730, i32* %3
%7731 = load i32, i32* %3
%7732 = xor i32 %7731, 81954
store i32 %7732, i32* %3
%7733 = load i32, i32* %3
%7734 = srem i32 %7733, 268435443
store i32 %7734, i32* %3
%7735 = load i32, i32* %3
%7736 = add nsw i32 %7735, 6
store i32 %7736, i32* %3
%7737 = load i32, i32* %3
%7738 = mul nsw i32 %7737, 10
store i32 %7738, i32* %3
%7739 = load i32, i32* %3
%7740 = add nsw i32 %7739, 1
store i32 %7740, i32* %3
%7741 = load i32, i32* %3
%7742 = mul nsw i32 %7741, 2
store i32 %7742, i32* %3
%7743 = load i32, i32* %3
%7744 = sub nsw i32 %7743, 1
store i32 %7744, i32* %3
%7745 = load i32, i32* %3
%7746 = and i32 %7745, -1044481
store i32 %7746, i32* %3
%7747 = load i32, i32* %3
%7748 = xor i32 %7747, 81954
store i32 %7748, i32* %3
%7749 = load i32, i32* %3
%7750 = srem i32 %7749, 268435443
store i32 %7750, i32* %3
%7751 = load i32, i32* %3
%7752 = add nsw i32 %7751, 6
store i32 %7752, i32* %3
%7753 = load i32, i32* %3
%7754 = mul nsw i32 %7753, 10
store i32 %7754, i32* %3
%7755 = load i32, i32* %3
%7756 = add nsw i32 %7755, 1
store i32 %7756, i32* %3
%7757 = load i32, i32* %3
%7758 = mul nsw i32 %7757, 2
store i32 %7758, i32* %3
%7759 = load i32, i32* %3
%7760 = sub nsw i32 %7759, 1
store i32 %7760, i32* %3
%7761 = load i32, i32* %3
%7762 = and i32 %7761, -1044481
store i32 %7762, i32* %3
%7763 = load i32, i32* %3
%7764 = xor i32 %7763, 81954
store i32 %7764, i32* %3
%7765 = load i32, i32* %3
%7766 = srem i32 %7765, 268435443
store i32 %7766, i32* %3
%7767 = load i32, i32* %3
%7768 = add nsw i32 %7767, 6
store i32 %7768, i32* %3
%7769 = load i32, i32* %3
%7770 = mul nsw i32 %7769, 10
store i32 %7770, i32* %3
%7771 = load i32, i32* %3
%7772 = add nsw i32 %7771, 1
store i32 %7772, i32* %3
%7773 = load i32, i32* %3
%7774 = mul nsw i32 %7773, 2
store i32 %7774, i32* %3
%7775 = load i32, i32* %3
%7776 = sub nsw i32 %7775, 1
store i32 %7776, i32* %3
%7777 = load i32, i32* %3
%7778 = and i32 %7777, -1044481
store i32 %7778, i32* %3
%7779 = load i32, i32* %3
%7780 = xor i32 %7779, 81954
store i32 %7780, i32* %3
%7781 = load i32, i32* %3
%7782 = srem i32 %7781, 268435443
store i32 %7782, i32* %3
%7783 = load i32, i32* %3
%7784 = add nsw i32 %7783, 6
store i32 %7784, i32* %3
%7785 = load i32, i32* %3
%7786 = mul nsw i32 %7785, 10
store i32 %7786, i32* %3
%7787 = load i32, i32* %3
%7788 = add nsw i32 %7787, 1
store i32 %7788, i32* %3
%7789 = load i32, i32* %3
%7790 = mul nsw i32 %7789, 2
store i32 %7790, i32* %3
%7791 = load i32, i32* %3
%7792 = sub nsw i32 %7791, 1
store i32 %7792, i32* %3
%7793 = load i32, i32* %3
%7794 = and i32 %7793, -1044481
store i32 %7794, i32* %3
%7795 = load i32, i32* %3
%7796 = xor i32 %7795, 81954
store i32 %7796, i32* %3
%7797 = load i32, i32* %3
%7798 = srem i32 %7797, 268435443
store i32 %7798, i32* %3
%7799 = load i32, i32* %3
%7800 = add nsw i32 %7799, 6
store i32 %7800, i32* %3
%7801 = load i32, i32* %3
%7802 = mul nsw i32 %7801, 10
store i32 %7802, i32* %3
%7803 = load i32, i32* %3
%7804 = add nsw i32 %7803, 1
store i32 %7804, i32* %3
%7805 = load i32, i32* %3
%7806 = mul nsw i32 %7805, 2
store i32 %7806, i32* %3
%7807 = load i32, i32* %3
%7808 = sub nsw i32 %7807, 1
store i32 %7808, i32* %3
%7809 = load i32, i32* %3
%7810 = and i32 %7809, -1044481
store i32 %7810, i32* %3
%7811 = load i32, i32* %3
%7812 = xor i32 %7811, 81954
store i32 %7812, i32* %3
%7813 = load i32, i32* %3
%7814 = srem i32 %7813, 268435443
store i32 %7814, i32* %3
%7815 = load i32, i32* %3
%7816 = add nsw i32 %7815, 6
store i32 %7816, i32* %3
%7817 = load i32, i32* %3
%7818 = mul nsw i32 %7817, 10
store i32 %7818, i32* %3
%7819 = load i32, i32* %3
%7820 = add nsw i32 %7819, 1
store i32 %7820, i32* %3
%7821 = load i32, i32* %3
%7822 = mul nsw i32 %7821, 2
store i32 %7822, i32* %3
%7823 = load i32, i32* %3
%7824 = sub nsw i32 %7823, 1
store i32 %7824, i32* %3
%7825 = load i32, i32* %3
%7826 = and i32 %7825, -1044481
store i32 %7826, i32* %3
%7827 = load i32, i32* %3
%7828 = xor i32 %7827, 81954
store i32 %7828, i32* %3
%7829 = load i32, i32* %3
%7830 = srem i32 %7829, 268435443
store i32 %7830, i32* %3
%7831 = load i32, i32* %3
%7832 = add nsw i32 %7831, 6
store i32 %7832, i32* %3
%7833 = load i32, i32* %3
%7834 = mul nsw i32 %7833, 10
store i32 %7834, i32* %3
%7835 = load i32, i32* %3
%7836 = add nsw i32 %7835, 1
store i32 %7836, i32* %3
%7837 = load i32, i32* %3
%7838 = mul nsw i32 %7837, 2
store i32 %7838, i32* %3
%7839 = load i32, i32* %3
%7840 = sub nsw i32 %7839, 1
store i32 %7840, i32* %3
%7841 = load i32, i32* %3
%7842 = and i32 %7841, -1044481
store i32 %7842, i32* %3
%7843 = load i32, i32* %3
%7844 = xor i32 %7843, 81954
store i32 %7844, i32* %3
%7845 = load i32, i32* %3
%7846 = srem i32 %7845, 268435443
store i32 %7846, i32* %3
%7847 = load i32, i32* %3
%7848 = add nsw i32 %7847, 6
store i32 %7848, i32* %3
%7849 = load i32, i32* %3
%7850 = mul nsw i32 %7849, 10
store i32 %7850, i32* %3
%7851 = load i32, i32* %3
%7852 = add nsw i32 %7851, 1
store i32 %7852, i32* %3
%7853 = load i32, i32* %3
%7854 = mul nsw i32 %7853, 2
store i32 %7854, i32* %3
%7855 = load i32, i32* %3
%7856 = sub nsw i32 %7855, 1
store i32 %7856, i32* %3
%7857 = load i32, i32* %3
%7858 = and i32 %7857, -1044481
store i32 %7858, i32* %3
%7859 = load i32, i32* %3
%7860 = xor i32 %7859, 81954
store i32 %7860, i32* %3
%7861 = load i32, i32* %3
%7862 = srem i32 %7861, 268435443
store i32 %7862, i32* %3
%7863 = load i32, i32* %3
%7864 = add nsw i32 %7863, 6
store i32 %7864, i32* %3
%7865 = load i32, i32* %3
%7866 = mul nsw i32 %7865, 10
store i32 %7866, i32* %3
%7867 = load i32, i32* %3
%7868 = add nsw i32 %7867, 1
store i32 %7868, i32* %3
%7869 = load i32, i32* %3
%7870 = mul nsw i32 %7869, 2
store i32 %7870, i32* %3
%7871 = load i32, i32* %3
%7872 = sub nsw i32 %7871, 1
store i32 %7872, i32* %3
%7873 = load i32, i32* %3
%7874 = and i32 %7873, -1044481
store i32 %7874, i32* %3
%7875 = load i32, i32* %3
%7876 = xor i32 %7875, 81954
store i32 %7876, i32* %3
%7877 = load i32, i32* %3
%7878 = srem i32 %7877, 268435443
store i32 %7878, i32* %3
%7879 = load i32, i32* %3
%7880 = add nsw i32 %7879, 6
store i32 %7880, i32* %3
%7881 = load i32, i32* %3
%7882 = mul nsw i32 %7881, 10
store i32 %7882, i32* %3
%7883 = load i32, i32* %3
%7884 = add nsw i32 %7883, 1
store i32 %7884, i32* %3
%7885 = load i32, i32* %3
%7886 = mul nsw i32 %7885, 2
store i32 %7886, i32* %3
%7887 = load i32, i32* %3
%7888 = sub nsw i32 %7887, 1
store i32 %7888, i32* %3
%7889 = load i32, i32* %3
%7890 = and i32 %7889, -1044481
store i32 %7890, i32* %3
%7891 = load i32, i32* %3
%7892 = xor i32 %7891, 81954
store i32 %7892, i32* %3
%7893 = load i32, i32* %3
%7894 = srem i32 %7893, 268435443
store i32 %7894, i32* %3
%7895 = load i32, i32* %3
%7896 = add nsw i32 %7895, 6
store i32 %7896, i32* %3
%7897 = load i32, i32* %3
%7898 = mul nsw i32 %7897, 10
store i32 %7898, i32* %3
%7899 = load i32, i32* %3
%7900 = add nsw i32 %7899, 1
store i32 %7900, i32* %3
%7901 = load i32, i32* %3
%7902 = mul nsw i32 %7901, 2
store i32 %7902, i32* %3
%7903 = load i32, i32* %3
%7904 = sub nsw i32 %7903, 1
store i32 %7904, i32* %3
%7905 = load i32, i32* %3
%7906 = and i32 %7905, -1044481
store i32 %7906, i32* %3
%7907 = load i32, i32* %3
%7908 = xor i32 %7907, 81954
store i32 %7908, i32* %3
%7909 = load i32, i32* %3
%7910 = srem i32 %7909, 268435443
store i32 %7910, i32* %3
%7911 = load i32, i32* %3
%7912 = add nsw i32 %7911, 6
store i32 %7912, i32* %3
%7913 = load i32, i32* %3
%7914 = mul nsw i32 %7913, 10
store i32 %7914, i32* %3
%7915 = load i32, i32* %3
%7916 = add nsw i32 %7915, 1
store i32 %7916, i32* %3
%7917 = load i32, i32* %3
%7918 = mul nsw i32 %7917, 2
store i32 %7918, i32* %3
%7919 = load i32, i32* %3
%7920 = sub nsw i32 %7919, 1
store i32 %7920, i32* %3
%7921 = load i32, i32* %3
%7922 = and i32 %7921, -1044481
store i32 %7922, i32* %3
%7923 = load i32, i32* %3
%7924 = xor i32 %7923, 81954
store i32 %7924, i32* %3
%7925 = load i32, i32* %3
%7926 = srem i32 %7925, 268435443
store i32 %7926, i32* %3
%7927 = load i32, i32* %3
%7928 = add nsw i32 %7927, 6
store i32 %7928, i32* %3
%7929 = load i32, i32* %3
%7930 = mul nsw i32 %7929, 10
store i32 %7930, i32* %3
%7931 = load i32, i32* %3
%7932 = add nsw i32 %7931, 1
store i32 %7932, i32* %3
%7933 = load i32, i32* %3
%7934 = mul nsw i32 %7933, 2
store i32 %7934, i32* %3
%7935 = load i32, i32* %3
%7936 = sub nsw i32 %7935, 1
store i32 %7936, i32* %3
%7937 = load i32, i32* %3
%7938 = and i32 %7937, -1044481
store i32 %7938, i32* %3
%7939 = load i32, i32* %3
%7940 = xor i32 %7939, 81954
store i32 %7940, i32* %3
%7941 = load i32, i32* %3
%7942 = srem i32 %7941, 268435443
store i32 %7942, i32* %3
%7943 = load i32, i32* %3
%7944 = add nsw i32 %7943, 6
store i32 %7944, i32* %3
%7945 = load i32, i32* %3
%7946 = mul nsw i32 %7945, 10
store i32 %7946, i32* %3
%7947 = load i32, i32* %3
%7948 = add nsw i32 %7947, 1
store i32 %7948, i32* %3
%7949 = load i32, i32* %3
%7950 = mul nsw i32 %7949, 2
store i32 %7950, i32* %3
%7951 = load i32, i32* %3
%7952 = sub nsw i32 %7951, 1
store i32 %7952, i32* %3
%7953 = load i32, i32* %3
%7954 = and i32 %7953, -1044481
store i32 %7954, i32* %3
%7955 = load i32, i32* %3
%7956 = xor i32 %7955, 81954
store i32 %7956, i32* %3
%7957 = load i32, i32* %3
%7958 = srem i32 %7957, 268435443
store i32 %7958, i32* %3
%7959 = load i32, i32* %3
%7960 = add nsw i32 %7959, 6
store i32 %7960, i32* %3
%7961 = load i32, i32* %3
%7962 = mul nsw i32 %7961, 10
store i32 %7962, i32* %3
%7963 = load i32, i32* %3
%7964 = add nsw i32 %7963, 1
store i32 %7964, i32* %3
%7965 = load i32, i32* %3
%7966 = mul nsw i32 %7965, 2
store i32 %7966, i32* %3
%7967 = load i32, i32* %3
%7968 = sub nsw i32 %7967, 1
store i32 %7968, i32* %3
%7969 = load i32, i32* %3
%7970 = and i32 %7969, -1044481
store i32 %7970, i32* %3
%7971 = load i32, i32* %3
%7972 = xor i32 %7971, 81954
store i32 %7972, i32* %3
%7973 = load i32, i32* %3
%7974 = srem i32 %7973, 268435443
store i32 %7974, i32* %3
%7975 = load i32, i32* %3
%7976 = add nsw i32 %7975, 6
store i32 %7976, i32* %3
%7977 = load i32, i32* %3
%7978 = mul nsw i32 %7977, 10
store i32 %7978, i32* %3
%7979 = load i32, i32* %3
%7980 = add nsw i32 %7979, 1
store i32 %7980, i32* %3
%7981 = load i32, i32* %3
%7982 = mul nsw i32 %7981, 2
store i32 %7982, i32* %3
%7983 = load i32, i32* %3
%7984 = sub nsw i32 %7983, 1
store i32 %7984, i32* %3
%7985 = load i32, i32* %3
%7986 = and i32 %7985, -1044481
store i32 %7986, i32* %3
%7987 = load i32, i32* %3
%7988 = xor i32 %7987, 81954
store i32 %7988, i32* %3
%7989 = load i32, i32* %3
%7990 = srem i32 %7989, 268435443
store i32 %7990, i32* %3
%7991 = load i32, i32* %3
%7992 = add nsw i32 %7991, 6
store i32 %7992, i32* %3
%7993 = load i32, i32* %3
%7994 = mul nsw i32 %7993, 10
store i32 %7994, i32* %3
%7995 = load i32, i32* %3
%7996 = add nsw i32 %7995, 1
store i32 %7996, i32* %3
%7997 = load i32, i32* %3
%7998 = mul nsw i32 %7997, 2
store i32 %7998, i32* %3
%7999 = load i32, i32* %3
%8000 = sub nsw i32 %7999, 1
store i32 %8000, i32* %3
%8001 = load i32, i32* %3
%8002 = and i32 %8001, -1044481
store i32 %8002, i32* %3
%8003 = load i32, i32* %3
%8004 = xor i32 %8003, 81954
store i32 %8004, i32* %3
%8005 = load i32, i32* %3
%8006 = srem i32 %8005, 268435443
store i32 %8006, i32* %3
%8007 = load i32, i32* %3
%8008 = add nsw i32 %8007, 6
store i32 %8008, i32* %3
%8009 = load i32, i32* %3
%8010 = mul nsw i32 %8009, 10
store i32 %8010, i32* %3
%8011 = load i32, i32* %3
%8012 = add nsw i32 %8011, 1
store i32 %8012, i32* %3
%8013 = load i32, i32* %3
%8014 = mul nsw i32 %8013, 2
store i32 %8014, i32* %3
%8015 = load i32, i32* %3
%8016 = sub nsw i32 %8015, 1
store i32 %8016, i32* %3
%8017 = load i32, i32* %3
%8018 = and i32 %8017, -1044481
store i32 %8018, i32* %3
%8019 = load i32, i32* %3
%8020 = xor i32 %8019, 81954
store i32 %8020, i32* %3
%8021 = load i32, i32* %3
%8022 = srem i32 %8021, 268435443
store i32 %8022, i32* %3
%8023 = load i32, i32* %3
%8024 = add nsw i32 %8023, 6
store i32 %8024, i32* %3
%8025 = load i32, i32* %3
%8026 = mul nsw i32 %8025, 10
store i32 %8026, i32* %3
%8027 = load i32, i32* %3
%8028 = add nsw i32 %8027, 1
store i32 %8028, i32* %3
%8029 = load i32, i32* %3
%8030 = mul nsw i32 %8029, 2
store i32 %8030, i32* %3
%8031 = load i32, i32* %3
%8032 = sub nsw i32 %8031, 1
store i32 %8032, i32* %3
%8033 = load i32, i32* %3
%8034 = and i32 %8033, -1044481
store i32 %8034, i32* %3
%8035 = load i32, i32* %3
%8036 = xor i32 %8035, 81954
store i32 %8036, i32* %3
%8037 = load i32, i32* %3
%8038 = srem i32 %8037, 268435443
store i32 %8038, i32* %3
%8039 = load i32, i32* %3
%8040 = add nsw i32 %8039, 6
store i32 %8040, i32* %3
%8041 = load i32, i32* %3
%8042 = mul nsw i32 %8041, 10
store i32 %8042, i32* %3
%8043 = load i32, i32* %3
%8044 = add nsw i32 %8043, 1
store i32 %8044, i32* %3
%8045 = load i32, i32* %3
%8046 = mul nsw i32 %8045, 2
store i32 %8046, i32* %3
%8047 = load i32, i32* %3
%8048 = sub nsw i32 %8047, 1
store i32 %8048, i32* %3
%8049 = load i32, i32* %3
%8050 = and i32 %8049, -1044481
store i32 %8050, i32* %3
%8051 = load i32, i32* %3
%8052 = xor i32 %8051, 81954
store i32 %8052, i32* %3
%8053 = load i32, i32* %3
%8054 = srem i32 %8053, 268435443
store i32 %8054, i32* %3
%8055 = load i32, i32* %3
%8056 = add nsw i32 %8055, 6
store i32 %8056, i32* %3
%8057 = load i32, i32* %3
%8058 = mul nsw i32 %8057, 10
store i32 %8058, i32* %3
%8059 = load i32, i32* %3
%8060 = add nsw i32 %8059, 1
store i32 %8060, i32* %3
%8061 = load i32, i32* %3
%8062 = mul nsw i32 %8061, 2
store i32 %8062, i32* %3
%8063 = load i32, i32* %3
%8064 = sub nsw i32 %8063, 1
store i32 %8064, i32* %3
%8065 = load i32, i32* %3
%8066 = and i32 %8065, -1044481
store i32 %8066, i32* %3
%8067 = load i32, i32* %3
%8068 = xor i32 %8067, 81954
store i32 %8068, i32* %3
%8069 = load i32, i32* %3
%8070 = srem i32 %8069, 268435443
store i32 %8070, i32* %3
%8071 = load i32, i32* %3
%8072 = add nsw i32 %8071, 6
store i32 %8072, i32* %3
%8073 = load i32, i32* %3
%8074 = mul nsw i32 %8073, 10
store i32 %8074, i32* %3
%8075 = load i32, i32* %3
%8076 = add nsw i32 %8075, 1
store i32 %8076, i32* %3
%8077 = load i32, i32* %3
%8078 = mul nsw i32 %8077, 2
store i32 %8078, i32* %3
%8079 = load i32, i32* %3
%8080 = sub nsw i32 %8079, 1
store i32 %8080, i32* %3
%8081 = load i32, i32* %3
%8082 = and i32 %8081, -1044481
store i32 %8082, i32* %3
%8083 = load i32, i32* %3
%8084 = xor i32 %8083, 81954
store i32 %8084, i32* %3
%8085 = load i32, i32* %3
%8086 = srem i32 %8085, 268435443
store i32 %8086, i32* %3
%8087 = load i32, i32* %3
%8088 = add nsw i32 %8087, 6
store i32 %8088, i32* %3
%8089 = load i32, i32* %3
%8090 = mul nsw i32 %8089, 10
store i32 %8090, i32* %3
%8091 = load i32, i32* %3
%8092 = add nsw i32 %8091, 1
store i32 %8092, i32* %3
%8093 = load i32, i32* %3
%8094 = mul nsw i32 %8093, 2
store i32 %8094, i32* %3
%8095 = load i32, i32* %3
%8096 = sub nsw i32 %8095, 1
store i32 %8096, i32* %3
%8097 = load i32, i32* %3
%8098 = and i32 %8097, -1044481
store i32 %8098, i32* %3
%8099 = load i32, i32* %3
%8100 = xor i32 %8099, 81954
store i32 %8100, i32* %3
%8101 = load i32, i32* %3
%8102 = srem i32 %8101, 268435443
store i32 %8102, i32* %3
%8103 = load i32, i32* %3
%8104 = add nsw i32 %8103, 6
store i32 %8104, i32* %3
%8105 = load i32, i32* %3
%8106 = mul nsw i32 %8105, 10
store i32 %8106, i32* %3
%8107 = load i32, i32* %3
%8108 = add nsw i32 %8107, 1
store i32 %8108, i32* %3
%8109 = load i32, i32* %3
%8110 = mul nsw i32 %8109, 2
store i32 %8110, i32* %3
%8111 = load i32, i32* %3
%8112 = sub nsw i32 %8111, 1
store i32 %8112, i32* %3
%8113 = load i32, i32* %3
%8114 = and i32 %8113, -1044481
store i32 %8114, i32* %3
%8115 = load i32, i32* %3
%8116 = xor i32 %8115, 81954
store i32 %8116, i32* %3
%8117 = load i32, i32* %3
%8118 = srem i32 %8117, 268435443
store i32 %8118, i32* %3
%8119 = load i32, i32* %3
%8120 = add nsw i32 %8119, 6
store i32 %8120, i32* %3
%8121 = load i32, i32* %3
%8122 = mul nsw i32 %8121, 10
store i32 %8122, i32* %3
%8123 = load i32, i32* %3
%8124 = add nsw i32 %8123, 1
store i32 %8124, i32* %3
%8125 = load i32, i32* %3
%8126 = mul nsw i32 %8125, 2
store i32 %8126, i32* %3
%8127 = load i32, i32* %3
%8128 = sub nsw i32 %8127, 1
store i32 %8128, i32* %3
%8129 = load i32, i32* %3
%8130 = and i32 %8129, -1044481
store i32 %8130, i32* %3
%8131 = load i32, i32* %3
%8132 = xor i32 %8131, 81954
store i32 %8132, i32* %3
%8133 = load i32, i32* %3
%8134 = srem i32 %8133, 268435443
store i32 %8134, i32* %3
%8135 = load i32, i32* %3
%8136 = add nsw i32 %8135, 6
store i32 %8136, i32* %3
%8137 = load i32, i32* %3
%8138 = mul nsw i32 %8137, 10
store i32 %8138, i32* %3
%8139 = load i32, i32* %3
%8140 = add nsw i32 %8139, 1
store i32 %8140, i32* %3
%8141 = load i32, i32* %3
%8142 = mul nsw i32 %8141, 2
store i32 %8142, i32* %3
%8143 = load i32, i32* %3
%8144 = sub nsw i32 %8143, 1
store i32 %8144, i32* %3
%8145 = load i32, i32* %3
%8146 = and i32 %8145, -1044481
store i32 %8146, i32* %3
%8147 = load i32, i32* %3
%8148 = xor i32 %8147, 81954
store i32 %8148, i32* %3
%8149 = load i32, i32* %3
%8150 = srem i32 %8149, 268435443
store i32 %8150, i32* %3
%8151 = load i32, i32* %3
%8152 = add nsw i32 %8151, 6
store i32 %8152, i32* %3
%8153 = load i32, i32* %3
%8154 = mul nsw i32 %8153, 10
store i32 %8154, i32* %3
%8155 = load i32, i32* %3
%8156 = add nsw i32 %8155, 1
store i32 %8156, i32* %3
%8157 = load i32, i32* %3
%8158 = mul nsw i32 %8157, 2
store i32 %8158, i32* %3
%8159 = load i32, i32* %3
%8160 = sub nsw i32 %8159, 1
store i32 %8160, i32* %3
%8161 = load i32, i32* %3
%8162 = and i32 %8161, -1044481
store i32 %8162, i32* %3
%8163 = load i32, i32* %3
%8164 = xor i32 %8163, 81954
store i32 %8164, i32* %3
%8165 = load i32, i32* %3
%8166 = srem i32 %8165, 268435443
store i32 %8166, i32* %3
%8167 = load i32, i32* %3
%8168 = add nsw i32 %8167, 6
store i32 %8168, i32* %3
%8169 = load i32, i32* %3
%8170 = mul nsw i32 %8169, 10
store i32 %8170, i32* %3
%8171 = load i32, i32* %3
%8172 = add nsw i32 %8171, 1
store i32 %8172, i32* %3
%8173 = load i32, i32* %3
%8174 = mul nsw i32 %8173, 2
store i32 %8174, i32* %3
%8175 = load i32, i32* %3
%8176 = sub nsw i32 %8175, 1
store i32 %8176, i32* %3
%8177 = load i32, i32* %3
%8178 = and i32 %8177, -1044481
store i32 %8178, i32* %3
%8179 = load i32, i32* %3
%8180 = xor i32 %8179, 81954
store i32 %8180, i32* %3
%8181 = load i32, i32* %3
%8182 = srem i32 %8181, 268435443
store i32 %8182, i32* %3
%8183 = load i32, i32* %3
%8184 = add nsw i32 %8183, 6
store i32 %8184, i32* %3
%8185 = load i32, i32* %3
%8186 = mul nsw i32 %8185, 10
store i32 %8186, i32* %3
%8187 = load i32, i32* %3
%8188 = add nsw i32 %8187, 1
store i32 %8188, i32* %3
%8189 = load i32, i32* %3
%8190 = mul nsw i32 %8189, 2
store i32 %8190, i32* %3
%8191 = load i32, i32* %3
%8192 = sub nsw i32 %8191, 1
store i32 %8192, i32* %3
%8193 = load i32, i32* %3
%8194 = and i32 %8193, -1044481
store i32 %8194, i32* %3
%8195 = load i32, i32* %3
%8196 = xor i32 %8195, 81954
store i32 %8196, i32* %3
%8197 = load i32, i32* %3
%8198 = srem i32 %8197, 268435443
store i32 %8198, i32* %3
%8199 = load i32, i32* %3
%8200 = add nsw i32 %8199, 6
store i32 %8200, i32* %3
%8201 = load i32, i32* %3
%8202 = mul nsw i32 %8201, 10
store i32 %8202, i32* %3
%8203 = load i32, i32* %3
%8204 = add nsw i32 %8203, 1
store i32 %8204, i32* %3
%8205 = load i32, i32* %3
%8206 = mul nsw i32 %8205, 2
store i32 %8206, i32* %3
%8207 = load i32, i32* %3
%8208 = sub nsw i32 %8207, 1
store i32 %8208, i32* %3
%8209 = load i32, i32* %3
%8210 = and i32 %8209, -1044481
store i32 %8210, i32* %3
%8211 = load i32, i32* %3
%8212 = xor i32 %8211, 81954
store i32 %8212, i32* %3
%8213 = load i32, i32* %3
%8214 = srem i32 %8213, 268435443
store i32 %8214, i32* %3
%8215 = load i32, i32* %3
%8216 = add nsw i32 %8215, 6
store i32 %8216, i32* %3
%8217 = load i32, i32* %3
%8218 = mul nsw i32 %8217, 10
store i32 %8218, i32* %3
%8219 = load i32, i32* %3
%8220 = add nsw i32 %8219, 1
store i32 %8220, i32* %3
%8221 = load i32, i32* %3
%8222 = mul nsw i32 %8221, 2
store i32 %8222, i32* %3
%8223 = load i32, i32* %3
%8224 = sub nsw i32 %8223, 1
store i32 %8224, i32* %3
%8225 = load i32, i32* %3
%8226 = and i32 %8225, -1044481
store i32 %8226, i32* %3
%8227 = load i32, i32* %3
%8228 = xor i32 %8227, 81954
store i32 %8228, i32* %3
%8229 = load i32, i32* %3
%8230 = srem i32 %8229, 268435443
store i32 %8230, i32* %3
%8231 = load i32, i32* %3
%8232 = add nsw i32 %8231, 6
store i32 %8232, i32* %3
%8233 = load i32, i32* %3
%8234 = mul nsw i32 %8233, 10
store i32 %8234, i32* %3
%8235 = load i32, i32* %3
%8236 = add nsw i32 %8235, 1
store i32 %8236, i32* %3
%8237 = load i32, i32* %3
%8238 = mul nsw i32 %8237, 2
store i32 %8238, i32* %3
%8239 = load i32, i32* %3
%8240 = sub nsw i32 %8239, 1
store i32 %8240, i32* %3
%8241 = load i32, i32* %3
%8242 = and i32 %8241, -1044481
store i32 %8242, i32* %3
%8243 = load i32, i32* %3
%8244 = xor i32 %8243, 81954
store i32 %8244, i32* %3
%8245 = load i32, i32* %3
%8246 = srem i32 %8245, 268435443
store i32 %8246, i32* %3
%8247 = load i32, i32* %3
%8248 = add nsw i32 %8247, 6
store i32 %8248, i32* %3
%8249 = load i32, i32* %3
%8250 = mul nsw i32 %8249, 10
store i32 %8250, i32* %3
%8251 = load i32, i32* %3
%8252 = add nsw i32 %8251, 1
store i32 %8252, i32* %3
%8253 = load i32, i32* %3
%8254 = mul nsw i32 %8253, 2
store i32 %8254, i32* %3
%8255 = load i32, i32* %3
%8256 = sub nsw i32 %8255, 1
store i32 %8256, i32* %3
%8257 = load i32, i32* %3
%8258 = and i32 %8257, -1044481
store i32 %8258, i32* %3
%8259 = load i32, i32* %3
%8260 = xor i32 %8259, 81954
store i32 %8260, i32* %3
%8261 = load i32, i32* %3
%8262 = srem i32 %8261, 268435443
store i32 %8262, i32* %3
%8263 = load i32, i32* %3
%8264 = add nsw i32 %8263, 6
store i32 %8264, i32* %3
%8265 = load i32, i32* %3
%8266 = mul nsw i32 %8265, 10
store i32 %8266, i32* %3
%8267 = load i32, i32* %3
%8268 = add nsw i32 %8267, 1
store i32 %8268, i32* %3
%8269 = load i32, i32* %3
%8270 = mul nsw i32 %8269, 2
store i32 %8270, i32* %3
%8271 = load i32, i32* %3
%8272 = sub nsw i32 %8271, 1
store i32 %8272, i32* %3
%8273 = load i32, i32* %3
%8274 = and i32 %8273, -1044481
store i32 %8274, i32* %3
%8275 = load i32, i32* %3
%8276 = xor i32 %8275, 81954
store i32 %8276, i32* %3
%8277 = load i32, i32* %3
%8278 = srem i32 %8277, 268435443
store i32 %8278, i32* %3
%8279 = load i32, i32* %3
%8280 = add nsw i32 %8279, 6
store i32 %8280, i32* %3
%8281 = load i32, i32* %3
%8282 = mul nsw i32 %8281, 10
store i32 %8282, i32* %3
%8283 = load i32, i32* %3
%8284 = add nsw i32 %8283, 1
store i32 %8284, i32* %3
%8285 = load i32, i32* %3
%8286 = mul nsw i32 %8285, 2
store i32 %8286, i32* %3
%8287 = load i32, i32* %3
%8288 = sub nsw i32 %8287, 1
store i32 %8288, i32* %3
%8289 = load i32, i32* %3
%8290 = and i32 %8289, -1044481
store i32 %8290, i32* %3
%8291 = load i32, i32* %3
%8292 = xor i32 %8291, 81954
store i32 %8292, i32* %3
%8293 = load i32, i32* %3
%8294 = srem i32 %8293, 268435443
store i32 %8294, i32* %3
%8295 = load i32, i32* %3
%8296 = add nsw i32 %8295, 6
store i32 %8296, i32* %3
%8297 = load i32, i32* %3
%8298 = mul nsw i32 %8297, 10
store i32 %8298, i32* %3
%8299 = load i32, i32* %3
%8300 = add nsw i32 %8299, 1
store i32 %8300, i32* %3
%8301 = load i32, i32* %3
%8302 = mul nsw i32 %8301, 2
store i32 %8302, i32* %3
%8303 = load i32, i32* %3
%8304 = sub nsw i32 %8303, 1
store i32 %8304, i32* %3
%8305 = load i32, i32* %3
%8306 = and i32 %8305, -1044481
store i32 %8306, i32* %3
%8307 = load i32, i32* %3
%8308 = xor i32 %8307, 81954
store i32 %8308, i32* %3
%8309 = load i32, i32* %3
%8310 = srem i32 %8309, 268435443
store i32 %8310, i32* %3
%8311 = load i32, i32* %3
%8312 = add nsw i32 %8311, 6
store i32 %8312, i32* %3
%8313 = load i32, i32* %3
%8314 = mul nsw i32 %8313, 10
store i32 %8314, i32* %3
%8315 = load i32, i32* %3
%8316 = add nsw i32 %8315, 1
store i32 %8316, i32* %3
%8317 = load i32, i32* %3
%8318 = mul nsw i32 %8317, 2
store i32 %8318, i32* %3
%8319 = load i32, i32* %3
%8320 = sub nsw i32 %8319, 1
store i32 %8320, i32* %3
%8321 = load i32, i32* %3
%8322 = and i32 %8321, -1044481
store i32 %8322, i32* %3
%8323 = load i32, i32* %3
%8324 = xor i32 %8323, 81954
store i32 %8324, i32* %3
%8325 = load i32, i32* %3
%8326 = srem i32 %8325, 268435443
store i32 %8326, i32* %3
%8327 = load i32, i32* %3
%8328 = add nsw i32 %8327, 6
store i32 %8328, i32* %3
%8329 = load i32, i32* %3
%8330 = mul nsw i32 %8329, 10
store i32 %8330, i32* %3
%8331 = load i32, i32* %3
%8332 = add nsw i32 %8331, 1
store i32 %8332, i32* %3
%8333 = load i32, i32* %3
%8334 = mul nsw i32 %8333, 2
store i32 %8334, i32* %3
%8335 = load i32, i32* %3
%8336 = sub nsw i32 %8335, 1
store i32 %8336, i32* %3
%8337 = load i32, i32* %3
%8338 = and i32 %8337, -1044481
store i32 %8338, i32* %3
%8339 = load i32, i32* %3
%8340 = xor i32 %8339, 81954
store i32 %8340, i32* %3
%8341 = load i32, i32* %3
%8342 = srem i32 %8341, 268435443
store i32 %8342, i32* %3
%8343 = load i32, i32* %3
%8344 = add nsw i32 %8343, 6
store i32 %8344, i32* %3
%8345 = load i32, i32* %3
%8346 = mul nsw i32 %8345, 10
store i32 %8346, i32* %3
%8347 = load i32, i32* %3
%8348 = add nsw i32 %8347, 1
store i32 %8348, i32* %3
%8349 = load i32, i32* %3
%8350 = mul nsw i32 %8349, 2
store i32 %8350, i32* %3
%8351 = load i32, i32* %3
%8352 = sub nsw i32 %8351, 1
store i32 %8352, i32* %3
%8353 = load i32, i32* %3
%8354 = and i32 %8353, -1044481
store i32 %8354, i32* %3
%8355 = load i32, i32* %3
%8356 = xor i32 %8355, 81954
store i32 %8356, i32* %3
%8357 = load i32, i32* %3
%8358 = srem i32 %8357, 268435443
store i32 %8358, i32* %3
%8359 = load i32, i32* %3
%8360 = add nsw i32 %8359, 6
store i32 %8360, i32* %3
%8361 = load i32, i32* %3
%8362 = mul nsw i32 %8361, 10
store i32 %8362, i32* %3
%8363 = load i32, i32* %3
%8364 = add nsw i32 %8363, 1
store i32 %8364, i32* %3
%8365 = load i32, i32* %3
%8366 = mul nsw i32 %8365, 2
store i32 %8366, i32* %3
%8367 = load i32, i32* %3
%8368 = sub nsw i32 %8367, 1
store i32 %8368, i32* %3
%8369 = load i32, i32* %3
%8370 = and i32 %8369, -1044481
store i32 %8370, i32* %3
%8371 = load i32, i32* %3
%8372 = xor i32 %8371, 81954
store i32 %8372, i32* %3
%8373 = load i32, i32* %3
%8374 = srem i32 %8373, 268435443
store i32 %8374, i32* %3
%8375 = load i32, i32* %3
%8376 = add nsw i32 %8375, 6
store i32 %8376, i32* %3
%8377 = load i32, i32* %3
%8378 = mul nsw i32 %8377, 10
store i32 %8378, i32* %3
%8379 = load i32, i32* %3
%8380 = add nsw i32 %8379, 1
store i32 %8380, i32* %3
%8381 = load i32, i32* %3
%8382 = mul nsw i32 %8381, 2
store i32 %8382, i32* %3
%8383 = load i32, i32* %3
%8384 = sub nsw i32 %8383, 1
store i32 %8384, i32* %3
%8385 = load i32, i32* %3
%8386 = and i32 %8385, -1044481
store i32 %8386, i32* %3
%8387 = load i32, i32* %3
%8388 = xor i32 %8387, 81954
store i32 %8388, i32* %3
%8389 = load i32, i32* %3
%8390 = srem i32 %8389, 268435443
store i32 %8390, i32* %3
%8391 = load i32, i32* %3
%8392 = add nsw i32 %8391, 6
store i32 %8392, i32* %3
%8393 = load i32, i32* %3
%8394 = mul nsw i32 %8393, 10
store i32 %8394, i32* %3
%8395 = load i32, i32* %3
%8396 = add nsw i32 %8395, 1
store i32 %8396, i32* %3
%8397 = load i32, i32* %3
%8398 = mul nsw i32 %8397, 2
store i32 %8398, i32* %3
%8399 = load i32, i32* %3
%8400 = sub nsw i32 %8399, 1
store i32 %8400, i32* %3
%8401 = load i32, i32* %3
%8402 = and i32 %8401, -1044481
store i32 %8402, i32* %3
%8403 = load i32, i32* %3
%8404 = xor i32 %8403, 81954
store i32 %8404, i32* %3
%8405 = load i32, i32* %3
%8406 = srem i32 %8405, 268435443
store i32 %8406, i32* %3
%8407 = load i32, i32* %3
%8408 = add nsw i32 %8407, 6
store i32 %8408, i32* %3
%8409 = load i32, i32* %3
%8410 = mul nsw i32 %8409, 10
store i32 %8410, i32* %3
%8411 = load i32, i32* %3
%8412 = add nsw i32 %8411, 1
store i32 %8412, i32* %3
%8413 = load i32, i32* %3
%8414 = mul nsw i32 %8413, 2
store i32 %8414, i32* %3
%8415 = load i32, i32* %3
%8416 = sub nsw i32 %8415, 1
store i32 %8416, i32* %3
%8417 = load i32, i32* %3
%8418 = and i32 %8417, -1044481
store i32 %8418, i32* %3
%8419 = load i32, i32* %3
%8420 = xor i32 %8419, 81954
store i32 %8420, i32* %3
%8421 = load i32, i32* %3
%8422 = srem i32 %8421, 268435443
store i32 %8422, i32* %3
%8423 = load i32, i32* %3
%8424 = add nsw i32 %8423, 6
store i32 %8424, i32* %3
%8425 = load i32, i32* %3
%8426 = mul nsw i32 %8425, 10
store i32 %8426, i32* %3
%8427 = load i32, i32* %3
%8428 = add nsw i32 %8427, 1
store i32 %8428, i32* %3
%8429 = load i32, i32* %3
%8430 = mul nsw i32 %8429, 2
store i32 %8430, i32* %3
%8431 = load i32, i32* %3
%8432 = sub nsw i32 %8431, 1
store i32 %8432, i32* %3
%8433 = load i32, i32* %3
%8434 = and i32 %8433, -1044481
store i32 %8434, i32* %3
%8435 = load i32, i32* %3
%8436 = xor i32 %8435, 81954
store i32 %8436, i32* %3
%8437 = load i32, i32* %3
%8438 = srem i32 %8437, 268435443
store i32 %8438, i32* %3
%8439 = load i32, i32* %3
%8440 = add nsw i32 %8439, 6
store i32 %8440, i32* %3
%8441 = load i32, i32* %3
%8442 = mul nsw i32 %8441, 10
store i32 %8442, i32* %3
%8443 = load i32, i32* %3
%8444 = add nsw i32 %8443, 1
store i32 %8444, i32* %3
%8445 = load i32, i32* %3
%8446 = mul nsw i32 %8445, 2
store i32 %8446, i32* %3
%8447 = load i32, i32* %3
%8448 = sub nsw i32 %8447, 1
store i32 %8448, i32* %3
%8449 = load i32, i32* %3
%8450 = and i32 %8449, -1044481
store i32 %8450, i32* %3
%8451 = load i32, i32* %3
%8452 = xor i32 %8451, 81954
store i32 %8452, i32* %3
%8453 = load i32, i32* %3
%8454 = srem i32 %8453, 268435443
store i32 %8454, i32* %3
%8455 = load i32, i32* %3
%8456 = add nsw i32 %8455, 6
store i32 %8456, i32* %3
%8457 = load i32, i32* %3
%8458 = mul nsw i32 %8457, 10
store i32 %8458, i32* %3
%8459 = load i32, i32* %3
%8460 = add nsw i32 %8459, 1
store i32 %8460, i32* %3
%8461 = load i32, i32* %3
%8462 = mul nsw i32 %8461, 2
store i32 %8462, i32* %3
%8463 = load i32, i32* %3
%8464 = sub nsw i32 %8463, 1
store i32 %8464, i32* %3
%8465 = load i32, i32* %3
%8466 = and i32 %8465, -1044481
store i32 %8466, i32* %3
%8467 = load i32, i32* %3
%8468 = xor i32 %8467, 81954
store i32 %8468, i32* %3
%8469 = load i32, i32* %3
%8470 = srem i32 %8469, 268435443
store i32 %8470, i32* %3
%8471 = load i32, i32* %3
%8472 = add nsw i32 %8471, 6
store i32 %8472, i32* %3
%8473 = load i32, i32* %3
%8474 = mul nsw i32 %8473, 10
store i32 %8474, i32* %3
%8475 = load i32, i32* %3
%8476 = add nsw i32 %8475, 1
store i32 %8476, i32* %3
%8477 = load i32, i32* %3
%8478 = mul nsw i32 %8477, 2
store i32 %8478, i32* %3
%8479 = load i32, i32* %3
%8480 = sub nsw i32 %8479, 1
store i32 %8480, i32* %3
%8481 = load i32, i32* %3
%8482 = and i32 %8481, -1044481
store i32 %8482, i32* %3
%8483 = load i32, i32* %3
%8484 = xor i32 %8483, 81954
store i32 %8484, i32* %3
%8485 = load i32, i32* %3
%8486 = srem i32 %8485, 268435443
store i32 %8486, i32* %3
%8487 = load i32, i32* %3
%8488 = add nsw i32 %8487, 6
store i32 %8488, i32* %3
%8489 = load i32, i32* %3
%8490 = mul nsw i32 %8489, 10
store i32 %8490, i32* %3
%8491 = load i32, i32* %3
%8492 = add nsw i32 %8491, 1
store i32 %8492, i32* %3
%8493 = load i32, i32* %3
%8494 = mul nsw i32 %8493, 2
store i32 %8494, i32* %3
%8495 = load i32, i32* %3
%8496 = sub nsw i32 %8495, 1
store i32 %8496, i32* %3
%8497 = load i32, i32* %3
%8498 = and i32 %8497, -1044481
store i32 %8498, i32* %3
%8499 = load i32, i32* %3
%8500 = xor i32 %8499, 81954
store i32 %8500, i32* %3
%8501 = load i32, i32* %3
%8502 = srem i32 %8501, 268435443
store i32 %8502, i32* %3
%8503 = load i32, i32* %3
%8504 = add nsw i32 %8503, 6
store i32 %8504, i32* %3
%8505 = load i32, i32* %3
%8506 = mul nsw i32 %8505, 10
store i32 %8506, i32* %3
%8507 = load i32, i32* %3
%8508 = add nsw i32 %8507, 1
store i32 %8508, i32* %3
%8509 = load i32, i32* %3
%8510 = mul nsw i32 %8509, 2
store i32 %8510, i32* %3
%8511 = load i32, i32* %3
%8512 = sub nsw i32 %8511, 1
store i32 %8512, i32* %3
%8513 = load i32, i32* %3
%8514 = and i32 %8513, -1044481
store i32 %8514, i32* %3
%8515 = load i32, i32* %3
%8516 = xor i32 %8515, 81954
store i32 %8516, i32* %3
%8517 = load i32, i32* %3
%8518 = srem i32 %8517, 268435443
store i32 %8518, i32* %3
%8519 = load i32, i32* %3
%8520 = add nsw i32 %8519, 6
store i32 %8520, i32* %3
%8521 = load i32, i32* %3
%8522 = mul nsw i32 %8521, 10
store i32 %8522, i32* %3
%8523 = load i32, i32* %3
%8524 = add nsw i32 %8523, 1
store i32 %8524, i32* %3
%8525 = load i32, i32* %3
%8526 = mul nsw i32 %8525, 2
store i32 %8526, i32* %3
%8527 = load i32, i32* %3
%8528 = sub nsw i32 %8527, 1
store i32 %8528, i32* %3
%8529 = load i32, i32* %3
%8530 = and i32 %8529, -1044481
store i32 %8530, i32* %3
%8531 = load i32, i32* %3
%8532 = xor i32 %8531, 81954
store i32 %8532, i32* %3
%8533 = load i32, i32* %3
%8534 = srem i32 %8533, 268435443
store i32 %8534, i32* %3
%8535 = load i32, i32* %3
%8536 = add nsw i32 %8535, 6
store i32 %8536, i32* %3
%8537 = load i32, i32* %3
%8538 = mul nsw i32 %8537, 10
store i32 %8538, i32* %3
%8539 = load i32, i32* %3
%8540 = add nsw i32 %8539, 1
store i32 %8540, i32* %3
%8541 = load i32, i32* %3
%8542 = mul nsw i32 %8541, 2
store i32 %8542, i32* %3
%8543 = load i32, i32* %3
%8544 = sub nsw i32 %8543, 1
store i32 %8544, i32* %3
%8545 = load i32, i32* %3
%8546 = and i32 %8545, -1044481
store i32 %8546, i32* %3
%8547 = load i32, i32* %3
%8548 = xor i32 %8547, 81954
store i32 %8548, i32* %3
%8549 = load i32, i32* %3
%8550 = srem i32 %8549, 268435443
store i32 %8550, i32* %3
%8551 = load i32, i32* %3
%8552 = add nsw i32 %8551, 6
store i32 %8552, i32* %3
%8553 = load i32, i32* %3
%8554 = mul nsw i32 %8553, 10
store i32 %8554, i32* %3
%8555 = load i32, i32* %3
%8556 = add nsw i32 %8555, 1
store i32 %8556, i32* %3
%8557 = load i32, i32* %3
%8558 = mul nsw i32 %8557, 2
store i32 %8558, i32* %3
%8559 = load i32, i32* %3
%8560 = sub nsw i32 %8559, 1
store i32 %8560, i32* %3
%8561 = load i32, i32* %3
%8562 = and i32 %8561, -1044481
store i32 %8562, i32* %3
%8563 = load i32, i32* %3
%8564 = xor i32 %8563, 81954
store i32 %8564, i32* %3
%8565 = load i32, i32* %3
%8566 = srem i32 %8565, 268435443
store i32 %8566, i32* %3
%8567 = load i32, i32* %3
%8568 = add nsw i32 %8567, 6
store i32 %8568, i32* %3
%8569 = load i32, i32* %3
%8570 = mul nsw i32 %8569, 10
store i32 %8570, i32* %3
%8571 = load i32, i32* %3
%8572 = add nsw i32 %8571, 1
store i32 %8572, i32* %3
%8573 = load i32, i32* %3
%8574 = mul nsw i32 %8573, 2
store i32 %8574, i32* %3
%8575 = load i32, i32* %3
%8576 = sub nsw i32 %8575, 1
store i32 %8576, i32* %3
%8577 = load i32, i32* %3
%8578 = and i32 %8577, -1044481
store i32 %8578, i32* %3
%8579 = load i32, i32* %3
%8580 = xor i32 %8579, 81954
store i32 %8580, i32* %3
%8581 = load i32, i32* %3
%8582 = srem i32 %8581, 268435443
store i32 %8582, i32* %3
%8583 = load i32, i32* %3
%8584 = add nsw i32 %8583, 6
store i32 %8584, i32* %3
%8585 = load i32, i32* %3
%8586 = mul nsw i32 %8585, 10
store i32 %8586, i32* %3
%8587 = load i32, i32* %3
%8588 = add nsw i32 %8587, 1
store i32 %8588, i32* %3
%8589 = load i32, i32* %3
%8590 = mul nsw i32 %8589, 2
store i32 %8590, i32* %3
%8591 = load i32, i32* %3
%8592 = sub nsw i32 %8591, 1
store i32 %8592, i32* %3
%8593 = load i32, i32* %3
%8594 = and i32 %8593, -1044481
store i32 %8594, i32* %3
%8595 = load i32, i32* %3
%8596 = xor i32 %8595, 81954
store i32 %8596, i32* %3
%8597 = load i32, i32* %3
%8598 = srem i32 %8597, 268435443
store i32 %8598, i32* %3
%8599 = load i32, i32* %3
%8600 = add nsw i32 %8599, 6
store i32 %8600, i32* %3
%8601 = load i32, i32* %3
%8602 = mul nsw i32 %8601, 10
store i32 %8602, i32* %3
%8603 = load i32, i32* %3
%8604 = add nsw i32 %8603, 1
store i32 %8604, i32* %3
%8605 = load i32, i32* %3
%8606 = mul nsw i32 %8605, 2
store i32 %8606, i32* %3
%8607 = load i32, i32* %3
%8608 = sub nsw i32 %8607, 1
store i32 %8608, i32* %3
%8609 = load i32, i32* %3
%8610 = and i32 %8609, -1044481
store i32 %8610, i32* %3
%8611 = load i32, i32* %3
%8612 = xor i32 %8611, 81954
store i32 %8612, i32* %3
%8613 = load i32, i32* %3
%8614 = srem i32 %8613, 268435443
store i32 %8614, i32* %3
%8615 = load i32, i32* %3
%8616 = add nsw i32 %8615, 6
store i32 %8616, i32* %3
%8617 = load i32, i32* %3
%8618 = mul nsw i32 %8617, 10
store i32 %8618, i32* %3
%8619 = load i32, i32* %3
%8620 = add nsw i32 %8619, 1
store i32 %8620, i32* %3
%8621 = load i32, i32* %3
%8622 = mul nsw i32 %8621, 2
store i32 %8622, i32* %3
%8623 = load i32, i32* %3
%8624 = sub nsw i32 %8623, 1
store i32 %8624, i32* %3
%8625 = load i32, i32* %3
%8626 = and i32 %8625, -1044481
store i32 %8626, i32* %3
%8627 = load i32, i32* %3
%8628 = xor i32 %8627, 81954
store i32 %8628, i32* %3
%8629 = load i32, i32* %3
%8630 = srem i32 %8629, 268435443
store i32 %8630, i32* %3
%8631 = load i32, i32* %3
%8632 = add nsw i32 %8631, 6
store i32 %8632, i32* %3
%8633 = load i32, i32* %3
%8634 = mul nsw i32 %8633, 10
store i32 %8634, i32* %3
%8635 = load i32, i32* %3
%8636 = add nsw i32 %8635, 1
store i32 %8636, i32* %3
%8637 = load i32, i32* %3
%8638 = mul nsw i32 %8637, 2
store i32 %8638, i32* %3
%8639 = load i32, i32* %3
%8640 = sub nsw i32 %8639, 1
store i32 %8640, i32* %3
%8641 = load i32, i32* %3
%8642 = and i32 %8641, -1044481
store i32 %8642, i32* %3
%8643 = load i32, i32* %3
%8644 = xor i32 %8643, 81954
store i32 %8644, i32* %3
%8645 = load i32, i32* %3
%8646 = srem i32 %8645, 268435443
store i32 %8646, i32* %3
%8647 = load i32, i32* %3
%8648 = add nsw i32 %8647, 6
store i32 %8648, i32* %3
%8649 = load i32, i32* %3
%8650 = mul nsw i32 %8649, 10
store i32 %8650, i32* %3
%8651 = load i32, i32* %3
%8652 = add nsw i32 %8651, 1
store i32 %8652, i32* %3
%8653 = load i32, i32* %3
%8654 = mul nsw i32 %8653, 2
store i32 %8654, i32* %3
%8655 = load i32, i32* %3
%8656 = sub nsw i32 %8655, 1
store i32 %8656, i32* %3
%8657 = load i32, i32* %3
%8658 = and i32 %8657, -1044481
store i32 %8658, i32* %3
%8659 = load i32, i32* %3
%8660 = xor i32 %8659, 81954
store i32 %8660, i32* %3
%8661 = load i32, i32* %3
%8662 = srem i32 %8661, 268435443
store i32 %8662, i32* %3
%8663 = load i32, i32* %3
%8664 = add nsw i32 %8663, 6
store i32 %8664, i32* %3
%8665 = load i32, i32* %3
%8666 = mul nsw i32 %8665, 10
store i32 %8666, i32* %3
%8667 = load i32, i32* %3
%8668 = add nsw i32 %8667, 1
store i32 %8668, i32* %3
%8669 = load i32, i32* %3
%8670 = mul nsw i32 %8669, 2
store i32 %8670, i32* %3
%8671 = load i32, i32* %3
%8672 = sub nsw i32 %8671, 1
store i32 %8672, i32* %3
%8673 = load i32, i32* %3
%8674 = and i32 %8673, -1044481
store i32 %8674, i32* %3
%8675 = load i32, i32* %3
%8676 = xor i32 %8675, 81954
store i32 %8676, i32* %3
%8677 = load i32, i32* %3
%8678 = srem i32 %8677, 268435443
store i32 %8678, i32* %3
%8679 = load i32, i32* %3
%8680 = add nsw i32 %8679, 6
store i32 %8680, i32* %3
%8681 = load i32, i32* %3
%8682 = mul nsw i32 %8681, 10
store i32 %8682, i32* %3
%8683 = load i32, i32* %3
%8684 = add nsw i32 %8683, 1
store i32 %8684, i32* %3
%8685 = load i32, i32* %3
%8686 = mul nsw i32 %8685, 2
store i32 %8686, i32* %3
%8687 = load i32, i32* %3
%8688 = sub nsw i32 %8687, 1
store i32 %8688, i32* %3
%8689 = load i32, i32* %3
%8690 = and i32 %8689, -1044481
store i32 %8690, i32* %3
%8691 = load i32, i32* %3
%8692 = xor i32 %8691, 81954
store i32 %8692, i32* %3
%8693 = load i32, i32* %3
%8694 = srem i32 %8693, 268435443
store i32 %8694, i32* %3
%8695 = load i32, i32* %3
%8696 = add nsw i32 %8695, 6
store i32 %8696, i32* %3
%8697 = load i32, i32* %3
%8698 = mul nsw i32 %8697, 10
store i32 %8698, i32* %3
%8699 = load i32, i32* %3
%8700 = add nsw i32 %8699, 1
store i32 %8700, i32* %3
%8701 = load i32, i32* %3
%8702 = mul nsw i32 %8701, 2
store i32 %8702, i32* %3
%8703 = load i32, i32* %3
%8704 = sub nsw i32 %8703, 1
store i32 %8704, i32* %3
%8705 = load i32, i32* %3
%8706 = and i32 %8705, -1044481
store i32 %8706, i32* %3
%8707 = load i32, i32* %3
%8708 = xor i32 %8707, 81954
store i32 %8708, i32* %3
%8709 = load i32, i32* %3
%8710 = srem i32 %8709, 268435443
store i32 %8710, i32* %3
%8711 = load i32, i32* %3
%8712 = add nsw i32 %8711, 6
store i32 %8712, i32* %3
%8713 = load i32, i32* %3
%8714 = mul nsw i32 %8713, 10
store i32 %8714, i32* %3
%8715 = load i32, i32* %3
%8716 = add nsw i32 %8715, 1
store i32 %8716, i32* %3
%8717 = load i32, i32* %3
%8718 = mul nsw i32 %8717, 2
store i32 %8718, i32* %3
%8719 = load i32, i32* %3
%8720 = sub nsw i32 %8719, 1
store i32 %8720, i32* %3
%8721 = load i32, i32* %3
%8722 = and i32 %8721, -1044481
store i32 %8722, i32* %3
%8723 = load i32, i32* %3
%8724 = xor i32 %8723, 81954
store i32 %8724, i32* %3
%8725 = load i32, i32* %3
%8726 = srem i32 %8725, 268435443
store i32 %8726, i32* %3
%8727 = load i32, i32* %3
%8728 = add nsw i32 %8727, 6
store i32 %8728, i32* %3
%8729 = load i32, i32* %3
%8730 = mul nsw i32 %8729, 10
store i32 %8730, i32* %3
%8731 = load i32, i32* %3
%8732 = add nsw i32 %8731, 1
store i32 %8732, i32* %3
%8733 = load i32, i32* %3
%8734 = mul nsw i32 %8733, 2
store i32 %8734, i32* %3
%8735 = load i32, i32* %3
%8736 = sub nsw i32 %8735, 1
store i32 %8736, i32* %3
%8737 = load i32, i32* %3
%8738 = and i32 %8737, -1044481
store i32 %8738, i32* %3
%8739 = load i32, i32* %3
%8740 = xor i32 %8739, 81954
store i32 %8740, i32* %3
%8741 = load i32, i32* %3
%8742 = srem i32 %8741, 268435443
store i32 %8742, i32* %3
%8743 = load i32, i32* %3
%8744 = add nsw i32 %8743, 6
store i32 %8744, i32* %3
%8745 = load i32, i32* %3
%8746 = mul nsw i32 %8745, 10
store i32 %8746, i32* %3
%8747 = load i32, i32* %3
%8748 = add nsw i32 %8747, 1
store i32 %8748, i32* %3
%8749 = load i32, i32* %3
%8750 = mul nsw i32 %8749, 2
store i32 %8750, i32* %3
%8751 = load i32, i32* %3
%8752 = sub nsw i32 %8751, 1
store i32 %8752, i32* %3
%8753 = load i32, i32* %3
%8754 = and i32 %8753, -1044481
store i32 %8754, i32* %3
%8755 = load i32, i32* %3
%8756 = xor i32 %8755, 81954
store i32 %8756, i32* %3
%8757 = load i32, i32* %3
%8758 = srem i32 %8757, 268435443
store i32 %8758, i32* %3
%8759 = load i32, i32* %3
%8760 = add nsw i32 %8759, 6
store i32 %8760, i32* %3
%8761 = load i32, i32* %3
%8762 = mul nsw i32 %8761, 10
store i32 %8762, i32* %3
%8763 = load i32, i32* %3
%8764 = add nsw i32 %8763, 1
store i32 %8764, i32* %3
%8765 = load i32, i32* %3
%8766 = mul nsw i32 %8765, 2
store i32 %8766, i32* %3
%8767 = load i32, i32* %3
%8768 = sub nsw i32 %8767, 1
store i32 %8768, i32* %3
%8769 = load i32, i32* %3
%8770 = and i32 %8769, -1044481
store i32 %8770, i32* %3
%8771 = load i32, i32* %3
%8772 = xor i32 %8771, 81954
store i32 %8772, i32* %3
%8773 = load i32, i32* %3
%8774 = srem i32 %8773, 268435443
store i32 %8774, i32* %3
%8775 = load i32, i32* %3
%8776 = add nsw i32 %8775, 6
store i32 %8776, i32* %3
%8777 = load i32, i32* %3
%8778 = mul nsw i32 %8777, 10
store i32 %8778, i32* %3
%8779 = load i32, i32* %3
%8780 = add nsw i32 %8779, 1
store i32 %8780, i32* %3
%8781 = load i32, i32* %3
%8782 = mul nsw i32 %8781, 2
store i32 %8782, i32* %3
%8783 = load i32, i32* %3
%8784 = sub nsw i32 %8783, 1
store i32 %8784, i32* %3
%8785 = load i32, i32* %3
%8786 = and i32 %8785, -1044481
store i32 %8786, i32* %3
%8787 = load i32, i32* %3
%8788 = xor i32 %8787, 81954
store i32 %8788, i32* %3
%8789 = load i32, i32* %3
%8790 = srem i32 %8789, 268435443
store i32 %8790, i32* %3
%8791 = load i32, i32* %3
%8792 = add nsw i32 %8791, 6
store i32 %8792, i32* %3
%8793 = load i32, i32* %3
%8794 = mul nsw i32 %8793, 10
store i32 %8794, i32* %3
%8795 = load i32, i32* %3
%8796 = add nsw i32 %8795, 1
store i32 %8796, i32* %3
%8797 = load i32, i32* %3
%8798 = mul nsw i32 %8797, 2
store i32 %8798, i32* %3
%8799 = load i32, i32* %3
%8800 = sub nsw i32 %8799, 1
store i32 %8800, i32* %3
%8801 = load i32, i32* %3
%8802 = and i32 %8801, -1044481
store i32 %8802, i32* %3
%8803 = load i32, i32* %3
%8804 = xor i32 %8803, 81954
store i32 %8804, i32* %3
%8805 = load i32, i32* %3
%8806 = srem i32 %8805, 268435443
store i32 %8806, i32* %3
%8807 = load i32, i32* %3
%8808 = add nsw i32 %8807, 6
store i32 %8808, i32* %3
%8809 = load i32, i32* %3
%8810 = mul nsw i32 %8809, 10
store i32 %8810, i32* %3
%8811 = load i32, i32* %3
%8812 = add nsw i32 %8811, 1
store i32 %8812, i32* %3
%8813 = load i32, i32* %3
%8814 = mul nsw i32 %8813, 2
store i32 %8814, i32* %3
%8815 = load i32, i32* %3
%8816 = sub nsw i32 %8815, 1
store i32 %8816, i32* %3
%8817 = load i32, i32* %3
%8818 = and i32 %8817, -1044481
store i32 %8818, i32* %3
%8819 = load i32, i32* %3
%8820 = xor i32 %8819, 81954
store i32 %8820, i32* %3
%8821 = load i32, i32* %3
%8822 = srem i32 %8821, 268435443
store i32 %8822, i32* %3
%8823 = load i32, i32* %3
%8824 = add nsw i32 %8823, 6
store i32 %8824, i32* %3
%8825 = load i32, i32* %3
%8826 = mul nsw i32 %8825, 10
store i32 %8826, i32* %3
%8827 = load i32, i32* %3
%8828 = add nsw i32 %8827, 1
store i32 %8828, i32* %3
%8829 = load i32, i32* %3
%8830 = mul nsw i32 %8829, 2
store i32 %8830, i32* %3
%8831 = load i32, i32* %3
%8832 = sub nsw i32 %8831, 1
store i32 %8832, i32* %3
%8833 = load i32, i32* %3
%8834 = and i32 %8833, -1044481
store i32 %8834, i32* %3
%8835 = load i32, i32* %3
%8836 = xor i32 %8835, 81954
store i32 %8836, i32* %3
%8837 = load i32, i32* %3
%8838 = srem i32 %8837, 268435443
store i32 %8838, i32* %3
%8839 = load i32, i32* %3
%8840 = add nsw i32 %8839, 6
store i32 %8840, i32* %3
%8841 = load i32, i32* %3
%8842 = mul nsw i32 %8841, 10
store i32 %8842, i32* %3
%8843 = load i32, i32* %3
%8844 = add nsw i32 %8843, 1
store i32 %8844, i32* %3
%8845 = load i32, i32* %3
%8846 = mul nsw i32 %8845, 2
store i32 %8846, i32* %3
%8847 = load i32, i32* %3
%8848 = sub nsw i32 %8847, 1
store i32 %8848, i32* %3
%8849 = load i32, i32* %3
%8850 = and i32 %8849, -1044481
store i32 %8850, i32* %3
%8851 = load i32, i32* %3
%8852 = xor i32 %8851, 81954
store i32 %8852, i32* %3
%8853 = load i32, i32* %3
%8854 = srem i32 %8853, 268435443
store i32 %8854, i32* %3
%8855 = load i32, i32* %3
%8856 = add nsw i32 %8855, 6
store i32 %8856, i32* %3
%8857 = load i32, i32* %3
%8858 = mul nsw i32 %8857, 10
store i32 %8858, i32* %3
%8859 = load i32, i32* %3
%8860 = add nsw i32 %8859, 1
store i32 %8860, i32* %3
%8861 = load i32, i32* %3
%8862 = mul nsw i32 %8861, 2
store i32 %8862, i32* %3
%8863 = load i32, i32* %3
%8864 = sub nsw i32 %8863, 1
store i32 %8864, i32* %3
%8865 = load i32, i32* %3
%8866 = and i32 %8865, -1044481
store i32 %8866, i32* %3
%8867 = load i32, i32* %3
%8868 = xor i32 %8867, 81954
store i32 %8868, i32* %3
%8869 = load i32, i32* %3
%8870 = srem i32 %8869, 268435443
store i32 %8870, i32* %3
%8871 = load i32, i32* %3
%8872 = add nsw i32 %8871, 6
store i32 %8872, i32* %3
%8873 = load i32, i32* %3
%8874 = mul nsw i32 %8873, 10
store i32 %8874, i32* %3
%8875 = load i32, i32* %3
%8876 = add nsw i32 %8875, 1
store i32 %8876, i32* %3
%8877 = load i32, i32* %3
%8878 = mul nsw i32 %8877, 2
store i32 %8878, i32* %3
%8879 = load i32, i32* %3
%8880 = sub nsw i32 %8879, 1
store i32 %8880, i32* %3
%8881 = load i32, i32* %3
%8882 = and i32 %8881, -1044481
store i32 %8882, i32* %3
%8883 = load i32, i32* %3
%8884 = xor i32 %8883, 81954
store i32 %8884, i32* %3
%8885 = load i32, i32* %3
%8886 = srem i32 %8885, 268435443
store i32 %8886, i32* %3
%8887 = load i32, i32* %3
%8888 = add nsw i32 %8887, 6
store i32 %8888, i32* %3
%8889 = load i32, i32* %3
%8890 = mul nsw i32 %8889, 10
store i32 %8890, i32* %3
%8891 = load i32, i32* %3
%8892 = add nsw i32 %8891, 1
store i32 %8892, i32* %3
%8893 = load i32, i32* %3
%8894 = mul nsw i32 %8893, 2
store i32 %8894, i32* %3
%8895 = load i32, i32* %3
%8896 = sub nsw i32 %8895, 1
store i32 %8896, i32* %3
%8897 = load i32, i32* %3
%8898 = and i32 %8897, -1044481
store i32 %8898, i32* %3
%8899 = load i32, i32* %3
%8900 = xor i32 %8899, 81954
store i32 %8900, i32* %3
%8901 = load i32, i32* %3
%8902 = srem i32 %8901, 268435443
store i32 %8902, i32* %3
%8903 = load i32, i32* %3
%8904 = add nsw i32 %8903, 6
store i32 %8904, i32* %3
%8905 = load i32, i32* %3
%8906 = mul nsw i32 %8905, 10
store i32 %8906, i32* %3
%8907 = load i32, i32* %3
%8908 = add nsw i32 %8907, 1
store i32 %8908, i32* %3
%8909 = load i32, i32* %3
%8910 = mul nsw i32 %8909, 2
store i32 %8910, i32* %3
%8911 = load i32, i32* %3
%8912 = sub nsw i32 %8911, 1
store i32 %8912, i32* %3
%8913 = load i32, i32* %3
%8914 = and i32 %8913, -1044481
store i32 %8914, i32* %3
%8915 = load i32, i32* %3
%8916 = xor i32 %8915, 81954
store i32 %8916, i32* %3
%8917 = load i32, i32* %3
%8918 = srem i32 %8917, 268435443
store i32 %8918, i32* %3
%8919 = load i32, i32* %3
%8920 = add nsw i32 %8919, 6
store i32 %8920, i32* %3
%8921 = load i32, i32* %3
%8922 = mul nsw i32 %8921, 10
store i32 %8922, i32* %3
%8923 = load i32, i32* %3
%8924 = add nsw i32 %8923, 1
store i32 %8924, i32* %3
%8925 = load i32, i32* %3
%8926 = mul nsw i32 %8925, 2
store i32 %8926, i32* %3
%8927 = load i32, i32* %3
%8928 = sub nsw i32 %8927, 1
store i32 %8928, i32* %3
%8929 = load i32, i32* %3
%8930 = and i32 %8929, -1044481
store i32 %8930, i32* %3
%8931 = load i32, i32* %3
%8932 = xor i32 %8931, 81954
store i32 %8932, i32* %3
%8933 = load i32, i32* %3
%8934 = srem i32 %8933, 268435443
store i32 %8934, i32* %3
%8935 = load i32, i32* %3
%8936 = add nsw i32 %8935, 6
store i32 %8936, i32* %3
%8937 = load i32, i32* %3
%8938 = mul nsw i32 %8937, 10
store i32 %8938, i32* %3
%8939 = load i32, i32* %3
%8940 = add nsw i32 %8939, 1
store i32 %8940, i32* %3
%8941 = load i32, i32* %3
%8942 = mul nsw i32 %8941, 2
store i32 %8942, i32* %3
%8943 = load i32, i32* %3
%8944 = sub nsw i32 %8943, 1
store i32 %8944, i32* %3
%8945 = load i32, i32* %3
%8946 = and i32 %8945, -1044481
store i32 %8946, i32* %3
%8947 = load i32, i32* %3
%8948 = xor i32 %8947, 81954
store i32 %8948, i32* %3
%8949 = load i32, i32* %3
%8950 = srem i32 %8949, 268435443
store i32 %8950, i32* %3
%8951 = load i32, i32* %3
%8952 = add nsw i32 %8951, 6
store i32 %8952, i32* %3
%8953 = load i32, i32* %3
%8954 = mul nsw i32 %8953, 10
store i32 %8954, i32* %3
%8955 = load i32, i32* %3
%8956 = add nsw i32 %8955, 1
store i32 %8956, i32* %3
%8957 = load i32, i32* %3
%8958 = mul nsw i32 %8957, 2
store i32 %8958, i32* %3
%8959 = load i32, i32* %3
%8960 = sub nsw i32 %8959, 1
store i32 %8960, i32* %3
%8961 = load i32, i32* %3
%8962 = and i32 %8961, -1044481
store i32 %8962, i32* %3
%8963 = load i32, i32* %3
%8964 = xor i32 %8963, 81954
store i32 %8964, i32* %3
%8965 = load i32, i32* %3
%8966 = srem i32 %8965, 268435443
store i32 %8966, i32* %3
%8967 = load i32, i32* %3
%8968 = add nsw i32 %8967, 6
store i32 %8968, i32* %3
%8969 = load i32, i32* %3
%8970 = mul nsw i32 %8969, 10
store i32 %8970, i32* %3
%8971 = load i32, i32* %3
%8972 = add nsw i32 %8971, 1
store i32 %8972, i32* %3
%8973 = load i32, i32* %3
%8974 = mul nsw i32 %8973, 2
store i32 %8974, i32* %3
%8975 = load i32, i32* %3
%8976 = sub nsw i32 %8975, 1
store i32 %8976, i32* %3
%8977 = load i32, i32* %3
%8978 = and i32 %8977, -1044481
store i32 %8978, i32* %3
%8979 = load i32, i32* %3
%8980 = xor i32 %8979, 81954
store i32 %8980, i32* %3
%8981 = load i32, i32* %3
%8982 = srem i32 %8981, 268435443
store i32 %8982, i32* %3
%8983 = load i32, i32* %3
%8984 = add nsw i32 %8983, 6
store i32 %8984, i32* %3
%8985 = load i32, i32* %3
%8986 = mul nsw i32 %8985, 10
store i32 %8986, i32* %3
%8987 = load i32, i32* %3
%8988 = add nsw i32 %8987, 1
store i32 %8988, i32* %3
%8989 = load i32, i32* %3
%8990 = mul nsw i32 %8989, 2
store i32 %8990, i32* %3
%8991 = load i32, i32* %3
%8992 = sub nsw i32 %8991, 1
store i32 %8992, i32* %3
%8993 = load i32, i32* %3
%8994 = and i32 %8993, -1044481
store i32 %8994, i32* %3
%8995 = load i32, i32* %3
%8996 = xor i32 %8995, 81954
store i32 %8996, i32* %3
%8997 = load i32, i32* %3
%8998 = srem i32 %8997, 268435443
store i32 %8998, i32* %3
%8999 = load i32, i32* %3
%9000 = add nsw i32 %8999, 6
store i32 %9000, i32* %3
%9001 = load i32, i32* %3
%9002 = mul nsw i32 %9001, 10
store i32 %9002, i32* %3
%9003 = load i32, i32* %3
%9004 = add nsw i32 %9003, 1
store i32 %9004, i32* %3
%9005 = load i32, i32* %3
%9006 = mul nsw i32 %9005, 2
store i32 %9006, i32* %3
%9007 = load i32, i32* %3
%9008 = sub nsw i32 %9007, 1
store i32 %9008, i32* %3
%9009 = load i32, i32* %3
%9010 = and i32 %9009, -1044481
store i32 %9010, i32* %3
%9011 = load i32, i32* %3
%9012 = xor i32 %9011, 81954
store i32 %9012, i32* %3
%9013 = load i32, i32* %3
%9014 = srem i32 %9013, 268435443
store i32 %9014, i32* %3
%9015 = load i32, i32* %3
%9016 = add nsw i32 %9015, 6
store i32 %9016, i32* %3
%9017 = load i32, i32* %3
%9018 = mul nsw i32 %9017, 10
store i32 %9018, i32* %3
%9019 = load i32, i32* %3
%9020 = add nsw i32 %9019, 1
store i32 %9020, i32* %3
%9021 = load i32, i32* %3
%9022 = mul nsw i32 %9021, 2
store i32 %9022, i32* %3
%9023 = load i32, i32* %3
%9024 = sub nsw i32 %9023, 1
store i32 %9024, i32* %3
%9025 = load i32, i32* %3
%9026 = and i32 %9025, -1044481
store i32 %9026, i32* %3
%9027 = load i32, i32* %3
%9028 = xor i32 %9027, 81954
store i32 %9028, i32* %3
%9029 = load i32, i32* %3
%9030 = srem i32 %9029, 268435443
store i32 %9030, i32* %3
%9031 = load i32, i32* %3
%9032 = add nsw i32 %9031, 6
store i32 %9032, i32* %3
%9033 = load i32, i32* %3
%9034 = mul nsw i32 %9033, 10
store i32 %9034, i32* %3
%9035 = load i32, i32* %3
%9036 = add nsw i32 %9035, 1
store i32 %9036, i32* %3
%9037 = load i32, i32* %3
%9038 = mul nsw i32 %9037, 2
store i32 %9038, i32* %3
%9039 = load i32, i32* %3
%9040 = sub nsw i32 %9039, 1
store i32 %9040, i32* %3
%9041 = load i32, i32* %3
%9042 = and i32 %9041, -1044481
store i32 %9042, i32* %3
%9043 = load i32, i32* %3
%9044 = xor i32 %9043, 81954
store i32 %9044, i32* %3
%9045 = load i32, i32* %3
%9046 = srem i32 %9045, 268435443
store i32 %9046, i32* %3
%9047 = load i32, i32* %3
%9048 = add nsw i32 %9047, 6
store i32 %9048, i32* %3
%9049 = load i32, i32* %3
%9050 = mul nsw i32 %9049, 10
store i32 %9050, i32* %3
%9051 = load i32, i32* %3
%9052 = add nsw i32 %9051, 1
store i32 %9052, i32* %3
%9053 = load i32, i32* %3
%9054 = mul nsw i32 %9053, 2
store i32 %9054, i32* %3
%9055 = load i32, i32* %3
%9056 = sub nsw i32 %9055, 1
store i32 %9056, i32* %3
%9057 = load i32, i32* %3
%9058 = and i32 %9057, -1044481
store i32 %9058, i32* %3
%9059 = load i32, i32* %3
%9060 = xor i32 %9059, 81954
store i32 %9060, i32* %3
%9061 = load i32, i32* %3
%9062 = srem i32 %9061, 268435443
store i32 %9062, i32* %3
%9063 = load i32, i32* %3
%9064 = add nsw i32 %9063, 6
store i32 %9064, i32* %3
%9065 = load i32, i32* %3
%9066 = mul nsw i32 %9065, 10
store i32 %9066, i32* %3
%9067 = load i32, i32* %3
%9068 = add nsw i32 %9067, 1
store i32 %9068, i32* %3
%9069 = load i32, i32* %3
%9070 = mul nsw i32 %9069, 2
store i32 %9070, i32* %3
%9071 = load i32, i32* %3
%9072 = sub nsw i32 %9071, 1
store i32 %9072, i32* %3
%9073 = load i32, i32* %3
%9074 = and i32 %9073, -1044481
store i32 %9074, i32* %3
%9075 = load i32, i32* %3
%9076 = xor i32 %9075, 81954
store i32 %9076, i32* %3
%9077 = load i32, i32* %3
%9078 = srem i32 %9077, 268435443
store i32 %9078, i32* %3
%9079 = load i32, i32* %3
%9080 = add nsw i32 %9079, 6
store i32 %9080, i32* %3
%9081 = load i32, i32* %3
%9082 = mul nsw i32 %9081, 10
store i32 %9082, i32* %3
%9083 = load i32, i32* %3
%9084 = add nsw i32 %9083, 1
store i32 %9084, i32* %3
%9085 = load i32, i32* %3
%9086 = mul nsw i32 %9085, 2
store i32 %9086, i32* %3
%9087 = load i32, i32* %3
%9088 = sub nsw i32 %9087, 1
store i32 %9088, i32* %3
%9089 = load i32, i32* %3
%9090 = and i32 %9089, -1044481
store i32 %9090, i32* %3
%9091 = load i32, i32* %3
%9092 = xor i32 %9091, 81954
store i32 %9092, i32* %3
%9093 = load i32, i32* %3
%9094 = srem i32 %9093, 268435443
store i32 %9094, i32* %3
%9095 = load i32, i32* %3
%9096 = add nsw i32 %9095, 6
store i32 %9096, i32* %3
%9097 = load i32, i32* %3
%9098 = mul nsw i32 %9097, 10
store i32 %9098, i32* %3
%9099 = load i32, i32* %3
%9100 = add nsw i32 %9099, 1
store i32 %9100, i32* %3
%9101 = load i32, i32* %3
%9102 = mul nsw i32 %9101, 2
store i32 %9102, i32* %3
%9103 = load i32, i32* %3
%9104 = sub nsw i32 %9103, 1
store i32 %9104, i32* %3
%9105 = load i32, i32* %3
%9106 = and i32 %9105, -1044481
store i32 %9106, i32* %3
%9107 = load i32, i32* %3
%9108 = xor i32 %9107, 81954
store i32 %9108, i32* %3
%9109 = load i32, i32* %3
%9110 = srem i32 %9109, 268435443
store i32 %9110, i32* %3
%9111 = load i32, i32* %3
%9112 = add nsw i32 %9111, 6
store i32 %9112, i32* %3
%9113 = load i32, i32* %3
%9114 = mul nsw i32 %9113, 10
store i32 %9114, i32* %3
%9115 = load i32, i32* %3
%9116 = add nsw i32 %9115, 1
store i32 %9116, i32* %3
%9117 = load i32, i32* %3
%9118 = mul nsw i32 %9117, 2
store i32 %9118, i32* %3
%9119 = load i32, i32* %3
%9120 = sub nsw i32 %9119, 1
store i32 %9120, i32* %3
%9121 = load i32, i32* %3
%9122 = and i32 %9121, -1044481
store i32 %9122, i32* %3
%9123 = load i32, i32* %3
%9124 = xor i32 %9123, 81954
store i32 %9124, i32* %3
%9125 = load i32, i32* %3
%9126 = srem i32 %9125, 268435443
store i32 %9126, i32* %3
%9127 = load i32, i32* %3
%9128 = add nsw i32 %9127, 6
store i32 %9128, i32* %3
%9129 = load i32, i32* %3
%9130 = mul nsw i32 %9129, 10
store i32 %9130, i32* %3
%9131 = load i32, i32* %3
%9132 = add nsw i32 %9131, 1
store i32 %9132, i32* %3
%9133 = load i32, i32* %3
%9134 = mul nsw i32 %9133, 2
store i32 %9134, i32* %3
%9135 = load i32, i32* %3
%9136 = sub nsw i32 %9135, 1
store i32 %9136, i32* %3
%9137 = load i32, i32* %3
%9138 = and i32 %9137, -1044481
store i32 %9138, i32* %3
%9139 = load i32, i32* %3
%9140 = xor i32 %9139, 81954
store i32 %9140, i32* %3
%9141 = load i32, i32* %3
%9142 = srem i32 %9141, 268435443
store i32 %9142, i32* %3
%9143 = load i32, i32* %3
%9144 = add nsw i32 %9143, 6
store i32 %9144, i32* %3
%9145 = load i32, i32* %3
%9146 = mul nsw i32 %9145, 10
store i32 %9146, i32* %3
%9147 = load i32, i32* %3
%9148 = add nsw i32 %9147, 1
store i32 %9148, i32* %3
%9149 = load i32, i32* %3
%9150 = mul nsw i32 %9149, 2
store i32 %9150, i32* %3
%9151 = load i32, i32* %3
%9152 = sub nsw i32 %9151, 1
store i32 %9152, i32* %3
%9153 = load i32, i32* %3
%9154 = and i32 %9153, -1044481
store i32 %9154, i32* %3
%9155 = load i32, i32* %3
%9156 = xor i32 %9155, 81954
store i32 %9156, i32* %3
%9157 = load i32, i32* %3
%9158 = srem i32 %9157, 268435443
store i32 %9158, i32* %3
%9159 = load i32, i32* %3
%9160 = add nsw i32 %9159, 6
store i32 %9160, i32* %3
%9161 = load i32, i32* %3
%9162 = mul nsw i32 %9161, 10
store i32 %9162, i32* %3
%9163 = load i32, i32* %3
%9164 = add nsw i32 %9163, 1
store i32 %9164, i32* %3
%9165 = load i32, i32* %3
%9166 = mul nsw i32 %9165, 2
store i32 %9166, i32* %3
%9167 = load i32, i32* %3
%9168 = sub nsw i32 %9167, 1
store i32 %9168, i32* %3
%9169 = load i32, i32* %3
%9170 = and i32 %9169, -1044481
store i32 %9170, i32* %3
%9171 = load i32, i32* %3
%9172 = xor i32 %9171, 81954
store i32 %9172, i32* %3
%9173 = load i32, i32* %3
%9174 = srem i32 %9173, 268435443
store i32 %9174, i32* %3
%9175 = load i32, i32* %3
%9176 = add nsw i32 %9175, 6
store i32 %9176, i32* %3
%9177 = load i32, i32* %3
%9178 = mul nsw i32 %9177, 10
store i32 %9178, i32* %3
%9179 = load i32, i32* %3
%9180 = add nsw i32 %9179, 1
store i32 %9180, i32* %3
%9181 = load i32, i32* %3
%9182 = mul nsw i32 %9181, 2
store i32 %9182, i32* %3
%9183 = load i32, i32* %3
%9184 = sub nsw i32 %9183, 1
store i32 %9184, i32* %3
%9185 = load i32, i32* %3
%9186 = and i32 %9185, -1044481
store i32 %9186, i32* %3
%9187 = load i32, i32* %3
%9188 = xor i32 %9187, 81954
store i32 %9188, i32* %3
%9189 = load i32, i32* %3
%9190 = srem i32 %9189, 268435443
store i32 %9190, i32* %3
%9191 = load i32, i32* %3
%9192 = add nsw i32 %9191, 6
store i32 %9192, i32* %3
%9193 = load i32, i32* %3
%9194 = mul nsw i32 %9193, 10
store i32 %9194, i32* %3
%9195 = load i32, i32* %3
%9196 = add nsw i32 %9195, 1
store i32 %9196, i32* %3
%9197 = load i32, i32* %3
%9198 = mul nsw i32 %9197, 2
store i32 %9198, i32* %3
%9199 = load i32, i32* %3
%9200 = sub nsw i32 %9199, 1
store i32 %9200, i32* %3
%9201 = load i32, i32* %3
%9202 = and i32 %9201, -1044481
store i32 %9202, i32* %3
%9203 = load i32, i32* %3
%9204 = xor i32 %9203, 81954
store i32 %9204, i32* %3
%9205 = load i32, i32* %3
%9206 = srem i32 %9205, 268435443
store i32 %9206, i32* %3
%9207 = load i32, i32* %3
%9208 = add nsw i32 %9207, 6
store i32 %9208, i32* %3
%9209 = load i32, i32* %3
%9210 = mul nsw i32 %9209, 10
store i32 %9210, i32* %3
%9211 = load i32, i32* %3
%9212 = add nsw i32 %9211, 1
store i32 %9212, i32* %3
%9213 = load i32, i32* %3
%9214 = mul nsw i32 %9213, 2
store i32 %9214, i32* %3
%9215 = load i32, i32* %3
%9216 = sub nsw i32 %9215, 1
store i32 %9216, i32* %3
%9217 = load i32, i32* %3
%9218 = and i32 %9217, -1044481
store i32 %9218, i32* %3
%9219 = load i32, i32* %3
%9220 = xor i32 %9219, 81954
store i32 %9220, i32* %3
%9221 = load i32, i32* %3
%9222 = srem i32 %9221, 268435443
store i32 %9222, i32* %3
%9223 = load i32, i32* %3
%9224 = add nsw i32 %9223, 6
store i32 %9224, i32* %3
%9225 = load i32, i32* %3
%9226 = mul nsw i32 %9225, 10
store i32 %9226, i32* %3
%9227 = load i32, i32* %3
%9228 = add nsw i32 %9227, 1
store i32 %9228, i32* %3
%9229 = load i32, i32* %3
%9230 = mul nsw i32 %9229, 2
store i32 %9230, i32* %3
%9231 = load i32, i32* %3
%9232 = sub nsw i32 %9231, 1
store i32 %9232, i32* %3
%9233 = load i32, i32* %3
%9234 = and i32 %9233, -1044481
store i32 %9234, i32* %3
%9235 = load i32, i32* %3
%9236 = xor i32 %9235, 81954
store i32 %9236, i32* %3
%9237 = load i32, i32* %3
%9238 = srem i32 %9237, 268435443
store i32 %9238, i32* %3
%9239 = load i32, i32* %3
%9240 = add nsw i32 %9239, 6
store i32 %9240, i32* %3
%9241 = load i32, i32* %3
%9242 = mul nsw i32 %9241, 10
store i32 %9242, i32* %3
%9243 = load i32, i32* %3
%9244 = add nsw i32 %9243, 1
store i32 %9244, i32* %3
%9245 = load i32, i32* %3
%9246 = mul nsw i32 %9245, 2
store i32 %9246, i32* %3
%9247 = load i32, i32* %3
%9248 = sub nsw i32 %9247, 1
store i32 %9248, i32* %3
%9249 = load i32, i32* %3
%9250 = and i32 %9249, -1044481
store i32 %9250, i32* %3
%9251 = load i32, i32* %3
%9252 = xor i32 %9251, 81954
store i32 %9252, i32* %3
%9253 = load i32, i32* %3
%9254 = srem i32 %9253, 268435443
store i32 %9254, i32* %3
%9255 = load i32, i32* %3
%9256 = add nsw i32 %9255, 6
store i32 %9256, i32* %3
%9257 = load i32, i32* %3
%9258 = mul nsw i32 %9257, 10
store i32 %9258, i32* %3
%9259 = load i32, i32* %3
%9260 = add nsw i32 %9259, 1
store i32 %9260, i32* %3
%9261 = load i32, i32* %3
%9262 = mul nsw i32 %9261, 2
store i32 %9262, i32* %3
%9263 = load i32, i32* %3
%9264 = sub nsw i32 %9263, 1
store i32 %9264, i32* %3
%9265 = load i32, i32* %3
%9266 = and i32 %9265, -1044481
store i32 %9266, i32* %3
%9267 = load i32, i32* %3
%9268 = xor i32 %9267, 81954
store i32 %9268, i32* %3
%9269 = load i32, i32* %3
%9270 = srem i32 %9269, 268435443
store i32 %9270, i32* %3
%9271 = load i32, i32* %3
%9272 = add nsw i32 %9271, 6
store i32 %9272, i32* %3
%9273 = load i32, i32* %3
%9274 = mul nsw i32 %9273, 10
store i32 %9274, i32* %3
%9275 = load i32, i32* %3
%9276 = add nsw i32 %9275, 1
store i32 %9276, i32* %3
%9277 = load i32, i32* %3
%9278 = mul nsw i32 %9277, 2
store i32 %9278, i32* %3
%9279 = load i32, i32* %3
%9280 = sub nsw i32 %9279, 1
store i32 %9280, i32* %3
%9281 = load i32, i32* %3
%9282 = and i32 %9281, -1044481
store i32 %9282, i32* %3
%9283 = load i32, i32* %3
%9284 = xor i32 %9283, 81954
store i32 %9284, i32* %3
%9285 = load i32, i32* %3
%9286 = srem i32 %9285, 268435443
store i32 %9286, i32* %3
%9287 = load i32, i32* %3
%9288 = add nsw i32 %9287, 6
store i32 %9288, i32* %3
%9289 = load i32, i32* %3
%9290 = mul nsw i32 %9289, 10
store i32 %9290, i32* %3
%9291 = load i32, i32* %3
%9292 = add nsw i32 %9291, 1
store i32 %9292, i32* %3
%9293 = load i32, i32* %3
%9294 = mul nsw i32 %9293, 2
store i32 %9294, i32* %3
%9295 = load i32, i32* %3
%9296 = sub nsw i32 %9295, 1
store i32 %9296, i32* %3
%9297 = load i32, i32* %3
%9298 = and i32 %9297, -1044481
store i32 %9298, i32* %3
%9299 = load i32, i32* %3
%9300 = xor i32 %9299, 81954
store i32 %9300, i32* %3
%9301 = load i32, i32* %3
%9302 = srem i32 %9301, 268435443
store i32 %9302, i32* %3
%9303 = load i32, i32* %3
%9304 = add nsw i32 %9303, 6
store i32 %9304, i32* %3
%9305 = load i32, i32* %3
%9306 = mul nsw i32 %9305, 10
store i32 %9306, i32* %3
%9307 = load i32, i32* %3
%9308 = add nsw i32 %9307, 1
store i32 %9308, i32* %3
%9309 = load i32, i32* %3
%9310 = mul nsw i32 %9309, 2
store i32 %9310, i32* %3
%9311 = load i32, i32* %3
%9312 = sub nsw i32 %9311, 1
store i32 %9312, i32* %3
%9313 = load i32, i32* %3
%9314 = and i32 %9313, -1044481
store i32 %9314, i32* %3
%9315 = load i32, i32* %3
%9316 = xor i32 %9315, 81954
store i32 %9316, i32* %3
%9317 = load i32, i32* %3
%9318 = srem i32 %9317, 268435443
store i32 %9318, i32* %3
%9319 = load i32, i32* %3
%9320 = add nsw i32 %9319, 6
store i32 %9320, i32* %3
%9321 = load i32, i32* %3
%9322 = mul nsw i32 %9321, 10
store i32 %9322, i32* %3
%9323 = load i32, i32* %3
%9324 = add nsw i32 %9323, 1
store i32 %9324, i32* %3
%9325 = load i32, i32* %3
%9326 = mul nsw i32 %9325, 2
store i32 %9326, i32* %3
%9327 = load i32, i32* %3
%9328 = sub nsw i32 %9327, 1
store i32 %9328, i32* %3
%9329 = load i32, i32* %3
%9330 = and i32 %9329, -1044481
store i32 %9330, i32* %3
%9331 = load i32, i32* %3
%9332 = xor i32 %9331, 81954
store i32 %9332, i32* %3
%9333 = load i32, i32* %3
%9334 = srem i32 %9333, 268435443
store i32 %9334, i32* %3
%9335 = load i32, i32* %3
%9336 = add nsw i32 %9335, 6
store i32 %9336, i32* %3
%9337 = load i32, i32* %3
%9338 = mul nsw i32 %9337, 10
store i32 %9338, i32* %3
%9339 = load i32, i32* %3
%9340 = add nsw i32 %9339, 1
store i32 %9340, i32* %3
%9341 = load i32, i32* %3
%9342 = mul nsw i32 %9341, 2
store i32 %9342, i32* %3
%9343 = load i32, i32* %3
%9344 = sub nsw i32 %9343, 1
store i32 %9344, i32* %3
%9345 = load i32, i32* %3
%9346 = and i32 %9345, -1044481
store i32 %9346, i32* %3
%9347 = load i32, i32* %3
%9348 = xor i32 %9347, 81954
store i32 %9348, i32* %3
%9349 = load i32, i32* %3
%9350 = srem i32 %9349, 268435443
store i32 %9350, i32* %3
%9351 = load i32, i32* %3
%9352 = add nsw i32 %9351, 6
store i32 %9352, i32* %3
%9353 = load i32, i32* %3
%9354 = mul nsw i32 %9353, 10
store i32 %9354, i32* %3
%9355 = load i32, i32* %3
%9356 = add nsw i32 %9355, 1
store i32 %9356, i32* %3
%9357 = load i32, i32* %3
%9358 = mul nsw i32 %9357, 2
store i32 %9358, i32* %3
%9359 = load i32, i32* %3
%9360 = sub nsw i32 %9359, 1
store i32 %9360, i32* %3
%9361 = load i32, i32* %3
%9362 = and i32 %9361, -1044481
store i32 %9362, i32* %3
%9363 = load i32, i32* %3
%9364 = xor i32 %9363, 81954
store i32 %9364, i32* %3
%9365 = load i32, i32* %3
%9366 = srem i32 %9365, 268435443
store i32 %9366, i32* %3
%9367 = load i32, i32* %3
%9368 = add nsw i32 %9367, 6
store i32 %9368, i32* %3
%9369 = load i32, i32* %3
%9370 = mul nsw i32 %9369, 10
store i32 %9370, i32* %3
%9371 = load i32, i32* %3
%9372 = add nsw i32 %9371, 1
store i32 %9372, i32* %3
%9373 = load i32, i32* %3
%9374 = mul nsw i32 %9373, 2
store i32 %9374, i32* %3
%9375 = load i32, i32* %3
%9376 = sub nsw i32 %9375, 1
store i32 %9376, i32* %3
%9377 = load i32, i32* %3
%9378 = and i32 %9377, -1044481
store i32 %9378, i32* %3
%9379 = load i32, i32* %3
%9380 = xor i32 %9379, 81954
store i32 %9380, i32* %3
%9381 = load i32, i32* %3
%9382 = srem i32 %9381, 268435443
store i32 %9382, i32* %3
%9383 = load i32, i32* %3
%9384 = add nsw i32 %9383, 6
store i32 %9384, i32* %3
%9385 = load i32, i32* %3
%9386 = mul nsw i32 %9385, 10
store i32 %9386, i32* %3
%9387 = load i32, i32* %3
%9388 = add nsw i32 %9387, 1
store i32 %9388, i32* %3
%9389 = load i32, i32* %3
%9390 = mul nsw i32 %9389, 2
store i32 %9390, i32* %3
%9391 = load i32, i32* %3
%9392 = sub nsw i32 %9391, 1
store i32 %9392, i32* %3
%9393 = load i32, i32* %3
%9394 = and i32 %9393, -1044481
store i32 %9394, i32* %3
%9395 = load i32, i32* %3
%9396 = xor i32 %9395, 81954
store i32 %9396, i32* %3
%9397 = load i32, i32* %3
%9398 = srem i32 %9397, 268435443
store i32 %9398, i32* %3
%9399 = load i32, i32* %3
%9400 = add nsw i32 %9399, 6
store i32 %9400, i32* %3
%9401 = load i32, i32* %3
%9402 = mul nsw i32 %9401, 10
store i32 %9402, i32* %3
%9403 = load i32, i32* %3
%9404 = add nsw i32 %9403, 1
store i32 %9404, i32* %3
%9405 = load i32, i32* %3
%9406 = mul nsw i32 %9405, 2
store i32 %9406, i32* %3
%9407 = load i32, i32* %3
%9408 = sub nsw i32 %9407, 1
store i32 %9408, i32* %3
%9409 = load i32, i32* %3
%9410 = and i32 %9409, -1044481
store i32 %9410, i32* %3
%9411 = load i32, i32* %3
%9412 = xor i32 %9411, 81954
store i32 %9412, i32* %3
%9413 = load i32, i32* %3
%9414 = srem i32 %9413, 268435443
store i32 %9414, i32* %3
%9415 = load i32, i32* %3
%9416 = add nsw i32 %9415, 6
store i32 %9416, i32* %3
%9417 = load i32, i32* %3
%9418 = mul nsw i32 %9417, 10
store i32 %9418, i32* %3
%9419 = load i32, i32* %3
%9420 = add nsw i32 %9419, 1
store i32 %9420, i32* %3
%9421 = load i32, i32* %3
%9422 = mul nsw i32 %9421, 2
store i32 %9422, i32* %3
%9423 = load i32, i32* %3
%9424 = sub nsw i32 %9423, 1
store i32 %9424, i32* %3
%9425 = load i32, i32* %3
%9426 = and i32 %9425, -1044481
store i32 %9426, i32* %3
%9427 = load i32, i32* %3
%9428 = xor i32 %9427, 81954
store i32 %9428, i32* %3
%9429 = load i32, i32* %3
%9430 = srem i32 %9429, 268435443
store i32 %9430, i32* %3
%9431 = load i32, i32* %3
%9432 = add nsw i32 %9431, 6
store i32 %9432, i32* %3
%9433 = load i32, i32* %3
%9434 = mul nsw i32 %9433, 10
store i32 %9434, i32* %3
%9435 = load i32, i32* %3
%9436 = add nsw i32 %9435, 1
store i32 %9436, i32* %3
%9437 = load i32, i32* %3
%9438 = mul nsw i32 %9437, 2
store i32 %9438, i32* %3
%9439 = load i32, i32* %3
%9440 = sub nsw i32 %9439, 1
store i32 %9440, i32* %3
%9441 = load i32, i32* %3
%9442 = and i32 %9441, -1044481
store i32 %9442, i32* %3
%9443 = load i32, i32* %3
%9444 = xor i32 %9443, 81954
store i32 %9444, i32* %3
%9445 = load i32, i32* %3
%9446 = srem i32 %9445, 268435443
store i32 %9446, i32* %3
%9447 = load i32, i32* %3
%9448 = add nsw i32 %9447, 6
store i32 %9448, i32* %3
%9449 = load i32, i32* %3
%9450 = mul nsw i32 %9449, 10
store i32 %9450, i32* %3
%9451 = load i32, i32* %3
%9452 = add nsw i32 %9451, 1
store i32 %9452, i32* %3
%9453 = load i32, i32* %3
%9454 = mul nsw i32 %9453, 2
store i32 %9454, i32* %3
%9455 = load i32, i32* %3
%9456 = sub nsw i32 %9455, 1
store i32 %9456, i32* %3
%9457 = load i32, i32* %3
%9458 = and i32 %9457, -1044481
store i32 %9458, i32* %3
%9459 = load i32, i32* %3
%9460 = xor i32 %9459, 81954
store i32 %9460, i32* %3
%9461 = load i32, i32* %3
%9462 = srem i32 %9461, 268435443
store i32 %9462, i32* %3
%9463 = load i32, i32* %3
%9464 = add nsw i32 %9463, 6
store i32 %9464, i32* %3
%9465 = load i32, i32* %3
%9466 = mul nsw i32 %9465, 10
store i32 %9466, i32* %3
%9467 = load i32, i32* %3
%9468 = add nsw i32 %9467, 1
store i32 %9468, i32* %3
%9469 = load i32, i32* %3
%9470 = mul nsw i32 %9469, 2
store i32 %9470, i32* %3
%9471 = load i32, i32* %3
%9472 = sub nsw i32 %9471, 1
store i32 %9472, i32* %3
%9473 = load i32, i32* %3
%9474 = and i32 %9473, -1044481
store i32 %9474, i32* %3
%9475 = load i32, i32* %3
%9476 = xor i32 %9475, 81954
store i32 %9476, i32* %3
%9477 = load i32, i32* %3
%9478 = srem i32 %9477, 268435443
store i32 %9478, i32* %3
%9479 = load i32, i32* %3
%9480 = add nsw i32 %9479, 6
store i32 %9480, i32* %3
%9481 = load i32, i32* %3
%9482 = mul nsw i32 %9481, 10
store i32 %9482, i32* %3
%9483 = load i32, i32* %3
%9484 = add nsw i32 %9483, 1
store i32 %9484, i32* %3
%9485 = load i32, i32* %3
%9486 = mul nsw i32 %9485, 2
store i32 %9486, i32* %3
%9487 = load i32, i32* %3
%9488 = sub nsw i32 %9487, 1
store i32 %9488, i32* %3
%9489 = load i32, i32* %3
%9490 = and i32 %9489, -1044481
store i32 %9490, i32* %3
%9491 = load i32, i32* %3
%9492 = xor i32 %9491, 81954
store i32 %9492, i32* %3
%9493 = load i32, i32* %3
%9494 = srem i32 %9493, 268435443
store i32 %9494, i32* %3
%9495 = load i32, i32* %3
%9496 = add nsw i32 %9495, 6
store i32 %9496, i32* %3
%9497 = load i32, i32* %3
%9498 = mul nsw i32 %9497, 10
store i32 %9498, i32* %3
%9499 = load i32, i32* %3
%9500 = add nsw i32 %9499, 1
store i32 %9500, i32* %3
%9501 = load i32, i32* %3
%9502 = mul nsw i32 %9501, 2
store i32 %9502, i32* %3
%9503 = load i32, i32* %3
%9504 = sub nsw i32 %9503, 1
store i32 %9504, i32* %3
%9505 = load i32, i32* %3
%9506 = and i32 %9505, -1044481
store i32 %9506, i32* %3
%9507 = load i32, i32* %3
%9508 = xor i32 %9507, 81954
store i32 %9508, i32* %3
%9509 = load i32, i32* %3
%9510 = srem i32 %9509, 268435443
store i32 %9510, i32* %3
%9511 = load i32, i32* %3
%9512 = add nsw i32 %9511, 6
store i32 %9512, i32* %3
%9513 = load i32, i32* %3
%9514 = mul nsw i32 %9513, 10
store i32 %9514, i32* %3
%9515 = load i32, i32* %3
%9516 = add nsw i32 %9515, 1
store i32 %9516, i32* %3
%9517 = load i32, i32* %3
%9518 = mul nsw i32 %9517, 2
store i32 %9518, i32* %3
%9519 = load i32, i32* %3
%9520 = sub nsw i32 %9519, 1
store i32 %9520, i32* %3
%9521 = load i32, i32* %3
%9522 = and i32 %9521, -1044481
store i32 %9522, i32* %3
%9523 = load i32, i32* %3
%9524 = xor i32 %9523, 81954
store i32 %9524, i32* %3
%9525 = load i32, i32* %3
%9526 = srem i32 %9525, 268435443
store i32 %9526, i32* %3
%9527 = load i32, i32* %3
%9528 = add nsw i32 %9527, 6
store i32 %9528, i32* %3
%9529 = load i32, i32* %3
%9530 = mul nsw i32 %9529, 10
store i32 %9530, i32* %3
%9531 = load i32, i32* %3
%9532 = add nsw i32 %9531, 1
store i32 %9532, i32* %3
%9533 = load i32, i32* %3
%9534 = mul nsw i32 %9533, 2
store i32 %9534, i32* %3
%9535 = load i32, i32* %3
%9536 = sub nsw i32 %9535, 1
store i32 %9536, i32* %3
%9537 = load i32, i32* %3
%9538 = and i32 %9537, -1044481
store i32 %9538, i32* %3
%9539 = load i32, i32* %3
%9540 = xor i32 %9539, 81954
store i32 %9540, i32* %3
%9541 = load i32, i32* %3
%9542 = srem i32 %9541, 268435443
store i32 %9542, i32* %3
%9543 = load i32, i32* %3
%9544 = add nsw i32 %9543, 6
store i32 %9544, i32* %3
%9545 = load i32, i32* %3
%9546 = mul nsw i32 %9545, 10
store i32 %9546, i32* %3
%9547 = load i32, i32* %3
%9548 = add nsw i32 %9547, 1
store i32 %9548, i32* %3
%9549 = load i32, i32* %3
%9550 = mul nsw i32 %9549, 2
store i32 %9550, i32* %3
%9551 = load i32, i32* %3
%9552 = sub nsw i32 %9551, 1
store i32 %9552, i32* %3
%9553 = load i32, i32* %3
%9554 = and i32 %9553, -1044481
store i32 %9554, i32* %3
%9555 = load i32, i32* %3
%9556 = xor i32 %9555, 81954
store i32 %9556, i32* %3
%9557 = load i32, i32* %3
%9558 = srem i32 %9557, 268435443
store i32 %9558, i32* %3
%9559 = load i32, i32* %3
%9560 = add nsw i32 %9559, 6
store i32 %9560, i32* %3
%9561 = load i32, i32* %3
%9562 = mul nsw i32 %9561, 10
store i32 %9562, i32* %3
%9563 = load i32, i32* %3
%9564 = add nsw i32 %9563, 1
store i32 %9564, i32* %3
%9565 = load i32, i32* %3
%9566 = mul nsw i32 %9565, 2
store i32 %9566, i32* %3
%9567 = load i32, i32* %3
%9568 = sub nsw i32 %9567, 1
store i32 %9568, i32* %3
%9569 = load i32, i32* %3
%9570 = and i32 %9569, -1044481
store i32 %9570, i32* %3
%9571 = load i32, i32* %3
%9572 = xor i32 %9571, 81954
store i32 %9572, i32* %3
%9573 = load i32, i32* %3
%9574 = srem i32 %9573, 268435443
store i32 %9574, i32* %3
%9575 = load i32, i32* %3
%9576 = add nsw i32 %9575, 6
store i32 %9576, i32* %3
%9577 = load i32, i32* %3
%9578 = mul nsw i32 %9577, 10
store i32 %9578, i32* %3
%9579 = load i32, i32* %3
%9580 = add nsw i32 %9579, 1
store i32 %9580, i32* %3
%9581 = load i32, i32* %3
%9582 = mul nsw i32 %9581, 2
store i32 %9582, i32* %3
%9583 = load i32, i32* %3
%9584 = sub nsw i32 %9583, 1
store i32 %9584, i32* %3
%9585 = load i32, i32* %3
%9586 = and i32 %9585, -1044481
store i32 %9586, i32* %3
%9587 = load i32, i32* %3
%9588 = xor i32 %9587, 81954
store i32 %9588, i32* %3
%9589 = load i32, i32* %3
%9590 = srem i32 %9589, 268435443
store i32 %9590, i32* %3
%9591 = load i32, i32* %3
%9592 = add nsw i32 %9591, 6
store i32 %9592, i32* %3
%9593 = load i32, i32* %3
%9594 = mul nsw i32 %9593, 10
store i32 %9594, i32* %3
%9595 = load i32, i32* %3
%9596 = add nsw i32 %9595, 1
store i32 %9596, i32* %3
%9597 = load i32, i32* %3
%9598 = mul nsw i32 %9597, 2
store i32 %9598, i32* %3
%9599 = load i32, i32* %3
%9600 = sub nsw i32 %9599, 1
store i32 %9600, i32* %3
%9601 = load i32, i32* %3
%9602 = and i32 %9601, -1044481
store i32 %9602, i32* %3
%9603 = load i32, i32* %3
%9604 = xor i32 %9603, 81954
store i32 %9604, i32* %3
%9605 = load i32, i32* %3
%9606 = srem i32 %9605, 268435443
store i32 %9606, i32* %3
%9607 = load i32, i32* %3
%9608 = add nsw i32 %9607, 6
store i32 %9608, i32* %3
%9609 = load i32, i32* %3
%9610 = mul nsw i32 %9609, 10
store i32 %9610, i32* %3
%9611 = load i32, i32* %3
%9612 = add nsw i32 %9611, 1
store i32 %9612, i32* %3
%9613 = load i32, i32* %3
%9614 = mul nsw i32 %9613, 2
store i32 %9614, i32* %3
%9615 = load i32, i32* %3
%9616 = sub nsw i32 %9615, 1
store i32 %9616, i32* %3
%9617 = load i32, i32* %3
%9618 = and i32 %9617, -1044481
store i32 %9618, i32* %3
%9619 = load i32, i32* %3
%9620 = xor i32 %9619, 81954
store i32 %9620, i32* %3
%9621 = load i32, i32* %3
%9622 = srem i32 %9621, 268435443
store i32 %9622, i32* %3
%9623 = load i32, i32* %3
%9624 = add nsw i32 %9623, 6
store i32 %9624, i32* %3
%9625 = load i32, i32* %3
%9626 = mul nsw i32 %9625, 10
store i32 %9626, i32* %3
%9627 = load i32, i32* %3
%9628 = add nsw i32 %9627, 1
store i32 %9628, i32* %3
%9629 = load i32, i32* %3
%9630 = mul nsw i32 %9629, 2
store i32 %9630, i32* %3
%9631 = load i32, i32* %3
%9632 = sub nsw i32 %9631, 1
store i32 %9632, i32* %3
%9633 = load i32, i32* %3
%9634 = and i32 %9633, -1044481
store i32 %9634, i32* %3
%9635 = load i32, i32* %3
%9636 = xor i32 %9635, 81954
store i32 %9636, i32* %3
%9637 = load i32, i32* %3
%9638 = srem i32 %9637, 268435443
store i32 %9638, i32* %3
%9639 = load i32, i32* %3
%9640 = add nsw i32 %9639, 6
store i32 %9640, i32* %3
%9641 = load i32, i32* %3
%9642 = mul nsw i32 %9641, 10
store i32 %9642, i32* %3
%9643 = load i32, i32* %3
%9644 = add nsw i32 %9643, 1
store i32 %9644, i32* %3
%9645 = load i32, i32* %3
%9646 = mul nsw i32 %9645, 2
store i32 %9646, i32* %3
%9647 = load i32, i32* %3
%9648 = sub nsw i32 %9647, 1
store i32 %9648, i32* %3
%9649 = load i32, i32* %3
%9650 = and i32 %9649, -1044481
store i32 %9650, i32* %3
%9651 = load i32, i32* %3
%9652 = xor i32 %9651, 81954
store i32 %9652, i32* %3
%9653 = load i32, i32* %3
%9654 = srem i32 %9653, 268435443
store i32 %9654, i32* %3
%9655 = load i32, i32* %3
%9656 = add nsw i32 %9655, 6
store i32 %9656, i32* %3
%9657 = load i32, i32* %3
%9658 = mul nsw i32 %9657, 10
store i32 %9658, i32* %3
%9659 = load i32, i32* %3
%9660 = add nsw i32 %9659, 1
store i32 %9660, i32* %3
%9661 = load i32, i32* %3
%9662 = mul nsw i32 %9661, 2
store i32 %9662, i32* %3
%9663 = load i32, i32* %3
%9664 = sub nsw i32 %9663, 1
store i32 %9664, i32* %3
%9665 = load i32, i32* %3
%9666 = and i32 %9665, -1044481
store i32 %9666, i32* %3
%9667 = load i32, i32* %3
%9668 = xor i32 %9667, 81954
store i32 %9668, i32* %3
%9669 = load i32, i32* %3
%9670 = srem i32 %9669, 268435443
store i32 %9670, i32* %3
%9671 = load i32, i32* %3
%9672 = add nsw i32 %9671, 6
store i32 %9672, i32* %3
%9673 = load i32, i32* %3
%9674 = mul nsw i32 %9673, 10
store i32 %9674, i32* %3
%9675 = load i32, i32* %3
%9676 = add nsw i32 %9675, 1
store i32 %9676, i32* %3
%9677 = load i32, i32* %3
%9678 = mul nsw i32 %9677, 2
store i32 %9678, i32* %3
%9679 = load i32, i32* %3
%9680 = sub nsw i32 %9679, 1
store i32 %9680, i32* %3
%9681 = load i32, i32* %3
%9682 = and i32 %9681, -1044481
store i32 %9682, i32* %3
%9683 = load i32, i32* %3
%9684 = xor i32 %9683, 81954
store i32 %9684, i32* %3
%9685 = load i32, i32* %3
%9686 = srem i32 %9685, 268435443
store i32 %9686, i32* %3
%9687 = load i32, i32* %3
%9688 = add nsw i32 %9687, 6
store i32 %9688, i32* %3
%9689 = load i32, i32* %3
%9690 = mul nsw i32 %9689, 10
store i32 %9690, i32* %3
%9691 = load i32, i32* %3
%9692 = add nsw i32 %9691, 1
store i32 %9692, i32* %3
%9693 = load i32, i32* %3
%9694 = mul nsw i32 %9693, 2
store i32 %9694, i32* %3
%9695 = load i32, i32* %3
%9696 = sub nsw i32 %9695, 1
store i32 %9696, i32* %3
%9697 = load i32, i32* %3
%9698 = and i32 %9697, -1044481
store i32 %9698, i32* %3
%9699 = load i32, i32* %3
%9700 = xor i32 %9699, 81954
store i32 %9700, i32* %3
%9701 = load i32, i32* %3
%9702 = srem i32 %9701, 268435443
store i32 %9702, i32* %3
%9703 = load i32, i32* %3
%9704 = add nsw i32 %9703, 6
store i32 %9704, i32* %3
%9705 = load i32, i32* %3
%9706 = mul nsw i32 %9705, 10
store i32 %9706, i32* %3
%9707 = load i32, i32* %3
%9708 = add nsw i32 %9707, 1
store i32 %9708, i32* %3
%9709 = load i32, i32* %3
%9710 = mul nsw i32 %9709, 2
store i32 %9710, i32* %3
%9711 = load i32, i32* %3
%9712 = sub nsw i32 %9711, 1
store i32 %9712, i32* %3
%9713 = load i32, i32* %3
%9714 = and i32 %9713, -1044481
store i32 %9714, i32* %3
%9715 = load i32, i32* %3
%9716 = xor i32 %9715, 81954
store i32 %9716, i32* %3
%9717 = load i32, i32* %3
%9718 = srem i32 %9717, 268435443
store i32 %9718, i32* %3
%9719 = load i32, i32* %3
%9720 = add nsw i32 %9719, 6
store i32 %9720, i32* %3
%9721 = load i32, i32* %3
%9722 = mul nsw i32 %9721, 10
store i32 %9722, i32* %3
%9723 = load i32, i32* %3
%9724 = add nsw i32 %9723, 1
store i32 %9724, i32* %3
%9725 = load i32, i32* %3
%9726 = mul nsw i32 %9725, 2
store i32 %9726, i32* %3
%9727 = load i32, i32* %3
%9728 = sub nsw i32 %9727, 1
store i32 %9728, i32* %3
%9729 = load i32, i32* %3
%9730 = and i32 %9729, -1044481
store i32 %9730, i32* %3
%9731 = load i32, i32* %3
%9732 = xor i32 %9731, 81954
store i32 %9732, i32* %3
%9733 = load i32, i32* %3
%9734 = srem i32 %9733, 268435443
store i32 %9734, i32* %3
%9735 = load i32, i32* %3
%9736 = add nsw i32 %9735, 6
store i32 %9736, i32* %3
%9737 = load i32, i32* %3
%9738 = mul nsw i32 %9737, 10
store i32 %9738, i32* %3
%9739 = load i32, i32* %3
%9740 = add nsw i32 %9739, 1
store i32 %9740, i32* %3
%9741 = load i32, i32* %3
%9742 = mul nsw i32 %9741, 2
store i32 %9742, i32* %3
%9743 = load i32, i32* %3
%9744 = sub nsw i32 %9743, 1
store i32 %9744, i32* %3
%9745 = load i32, i32* %3
%9746 = and i32 %9745, -1044481
store i32 %9746, i32* %3
%9747 = load i32, i32* %3
%9748 = xor i32 %9747, 81954
store i32 %9748, i32* %3
%9749 = load i32, i32* %3
%9750 = srem i32 %9749, 268435443
store i32 %9750, i32* %3
%9751 = load i32, i32* %3
%9752 = add nsw i32 %9751, 6
store i32 %9752, i32* %3
%9753 = load i32, i32* %3
%9754 = mul nsw i32 %9753, 10
store i32 %9754, i32* %3
%9755 = load i32, i32* %3
%9756 = add nsw i32 %9755, 1
store i32 %9756, i32* %3
%9757 = load i32, i32* %3
%9758 = mul nsw i32 %9757, 2
store i32 %9758, i32* %3
%9759 = load i32, i32* %3
%9760 = sub nsw i32 %9759, 1
store i32 %9760, i32* %3
%9761 = load i32, i32* %3
%9762 = and i32 %9761, -1044481
store i32 %9762, i32* %3
%9763 = load i32, i32* %3
%9764 = xor i32 %9763, 81954
store i32 %9764, i32* %3
%9765 = load i32, i32* %3
%9766 = srem i32 %9765, 268435443
store i32 %9766, i32* %3
%9767 = load i32, i32* %3
%9768 = add nsw i32 %9767, 6
store i32 %9768, i32* %3
%9769 = load i32, i32* %3
%9770 = mul nsw i32 %9769, 10
store i32 %9770, i32* %3
%9771 = load i32, i32* %3
%9772 = add nsw i32 %9771, 1
store i32 %9772, i32* %3
%9773 = load i32, i32* %3
%9774 = mul nsw i32 %9773, 2
store i32 %9774, i32* %3
%9775 = load i32, i32* %3
%9776 = sub nsw i32 %9775, 1
store i32 %9776, i32* %3
%9777 = load i32, i32* %3
%9778 = and i32 %9777, -1044481
store i32 %9778, i32* %3
%9779 = load i32, i32* %3
%9780 = xor i32 %9779, 81954
store i32 %9780, i32* %3
%9781 = load i32, i32* %3
%9782 = srem i32 %9781, 268435443
store i32 %9782, i32* %3
%9783 = load i32, i32* %3
%9784 = add nsw i32 %9783, 6
store i32 %9784, i32* %3
%9785 = load i32, i32* %3
%9786 = mul nsw i32 %9785, 10
store i32 %9786, i32* %3
%9787 = load i32, i32* %3
%9788 = add nsw i32 %9787, 1
store i32 %9788, i32* %3
%9789 = load i32, i32* %3
%9790 = mul nsw i32 %9789, 2
store i32 %9790, i32* %3
%9791 = load i32, i32* %3
%9792 = sub nsw i32 %9791, 1
store i32 %9792, i32* %3
%9793 = load i32, i32* %3
%9794 = and i32 %9793, -1044481
store i32 %9794, i32* %3
%9795 = load i32, i32* %3
%9796 = xor i32 %9795, 81954
store i32 %9796, i32* %3
%9797 = load i32, i32* %3
%9798 = srem i32 %9797, 268435443
store i32 %9798, i32* %3
%9799 = load i32, i32* %3
%9800 = add nsw i32 %9799, 6
store i32 %9800, i32* %3
%9801 = load i32, i32* %3
%9802 = mul nsw i32 %9801, 10
store i32 %9802, i32* %3
%9803 = load i32, i32* %3
%9804 = add nsw i32 %9803, 1
store i32 %9804, i32* %3
%9805 = load i32, i32* %3
%9806 = mul nsw i32 %9805, 2
store i32 %9806, i32* %3
%9807 = load i32, i32* %3
%9808 = sub nsw i32 %9807, 1
store i32 %9808, i32* %3
%9809 = load i32, i32* %3
%9810 = and i32 %9809, -1044481
store i32 %9810, i32* %3
%9811 = load i32, i32* %3
%9812 = xor i32 %9811, 81954
store i32 %9812, i32* %3
%9813 = load i32, i32* %3
%9814 = srem i32 %9813, 268435443
store i32 %9814, i32* %3
%9815 = load i32, i32* %3
%9816 = add nsw i32 %9815, 6
store i32 %9816, i32* %3
%9817 = load i32, i32* %3
%9818 = mul nsw i32 %9817, 10
store i32 %9818, i32* %3
%9819 = load i32, i32* %3
%9820 = add nsw i32 %9819, 1
store i32 %9820, i32* %3
%9821 = load i32, i32* %3
%9822 = mul nsw i32 %9821, 2
store i32 %9822, i32* %3
%9823 = load i32, i32* %3
%9824 = sub nsw i32 %9823, 1
store i32 %9824, i32* %3
%9825 = load i32, i32* %3
%9826 = and i32 %9825, -1044481
store i32 %9826, i32* %3
%9827 = load i32, i32* %3
%9828 = xor i32 %9827, 81954
store i32 %9828, i32* %3
%9829 = load i32, i32* %3
%9830 = srem i32 %9829, 268435443
store i32 %9830, i32* %3
%9831 = load i32, i32* %3
%9832 = add nsw i32 %9831, 6
store i32 %9832, i32* %3
%9833 = load i32, i32* %3
%9834 = mul nsw i32 %9833, 10
store i32 %9834, i32* %3
%9835 = load i32, i32* %3
%9836 = add nsw i32 %9835, 1
store i32 %9836, i32* %3
%9837 = load i32, i32* %3
%9838 = mul nsw i32 %9837, 2
store i32 %9838, i32* %3
%9839 = load i32, i32* %3
%9840 = sub nsw i32 %9839, 1
store i32 %9840, i32* %3
%9841 = load i32, i32* %3
%9842 = and i32 %9841, -1044481
store i32 %9842, i32* %3
%9843 = load i32, i32* %3
%9844 = xor i32 %9843, 81954
store i32 %9844, i32* %3
%9845 = load i32, i32* %3
%9846 = srem i32 %9845, 268435443
store i32 %9846, i32* %3
%9847 = load i32, i32* %3
%9848 = add nsw i32 %9847, 6
store i32 %9848, i32* %3
%9849 = load i32, i32* %3
%9850 = mul nsw i32 %9849, 10
store i32 %9850, i32* %3
%9851 = load i32, i32* %3
%9852 = add nsw i32 %9851, 1
store i32 %9852, i32* %3
%9853 = load i32, i32* %3
%9854 = mul nsw i32 %9853, 2
store i32 %9854, i32* %3
%9855 = load i32, i32* %3
%9856 = sub nsw i32 %9855, 1
store i32 %9856, i32* %3
%9857 = load i32, i32* %3
%9858 = and i32 %9857, -1044481
store i32 %9858, i32* %3
%9859 = load i32, i32* %3
%9860 = xor i32 %9859, 81954
store i32 %9860, i32* %3
%9861 = load i32, i32* %3
%9862 = srem i32 %9861, 268435443
store i32 %9862, i32* %3
%9863 = load i32, i32* %3
%9864 = add nsw i32 %9863, 6
store i32 %9864, i32* %3
%9865 = load i32, i32* %3
%9866 = mul nsw i32 %9865, 10
store i32 %9866, i32* %3
%9867 = load i32, i32* %3
%9868 = add nsw i32 %9867, 1
store i32 %9868, i32* %3
%9869 = load i32, i32* %3
%9870 = mul nsw i32 %9869, 2
store i32 %9870, i32* %3
%9871 = load i32, i32* %3
%9872 = sub nsw i32 %9871, 1
store i32 %9872, i32* %3
%9873 = load i32, i32* %3
%9874 = and i32 %9873, -1044481
store i32 %9874, i32* %3
%9875 = load i32, i32* %3
%9876 = xor i32 %9875, 81954
store i32 %9876, i32* %3
%9877 = load i32, i32* %3
%9878 = srem i32 %9877, 268435443
store i32 %9878, i32* %3
%9879 = load i32, i32* %3
%9880 = add nsw i32 %9879, 6
store i32 %9880, i32* %3
%9881 = load i32, i32* %3
%9882 = mul nsw i32 %9881, 10
store i32 %9882, i32* %3
%9883 = load i32, i32* %3
%9884 = add nsw i32 %9883, 1
store i32 %9884, i32* %3
%9885 = load i32, i32* %3
%9886 = mul nsw i32 %9885, 2
store i32 %9886, i32* %3
%9887 = load i32, i32* %3
%9888 = sub nsw i32 %9887, 1
store i32 %9888, i32* %3
%9889 = load i32, i32* %3
%9890 = and i32 %9889, -1044481
store i32 %9890, i32* %3
%9891 = load i32, i32* %3
%9892 = xor i32 %9891, 81954
store i32 %9892, i32* %3
%9893 = load i32, i32* %3
%9894 = srem i32 %9893, 268435443
store i32 %9894, i32* %3
%9895 = load i32, i32* %3
%9896 = add nsw i32 %9895, 6
store i32 %9896, i32* %3
%9897 = load i32, i32* %3
%9898 = mul nsw i32 %9897, 10
store i32 %9898, i32* %3
%9899 = load i32, i32* %3
%9900 = add nsw i32 %9899, 1
store i32 %9900, i32* %3
%9901 = load i32, i32* %3
%9902 = mul nsw i32 %9901, 2
store i32 %9902, i32* %3
%9903 = load i32, i32* %3
%9904 = sub nsw i32 %9903, 1
store i32 %9904, i32* %3
%9905 = load i32, i32* %3
%9906 = and i32 %9905, -1044481
store i32 %9906, i32* %3
%9907 = load i32, i32* %3
%9908 = xor i32 %9907, 81954
store i32 %9908, i32* %3
%9909 = load i32, i32* %3
%9910 = srem i32 %9909, 268435443
store i32 %9910, i32* %3
%9911 = load i32, i32* %3
%9912 = add nsw i32 %9911, 6
store i32 %9912, i32* %3
%9913 = load i32, i32* %3
%9914 = mul nsw i32 %9913, 10
store i32 %9914, i32* %3
%9915 = load i32, i32* %3
%9916 = add nsw i32 %9915, 1
store i32 %9916, i32* %3
%9917 = load i32, i32* %3
%9918 = mul nsw i32 %9917, 2
store i32 %9918, i32* %3
%9919 = load i32, i32* %3
%9920 = sub nsw i32 %9919, 1
store i32 %9920, i32* %3
%9921 = load i32, i32* %3
%9922 = and i32 %9921, -1044481
store i32 %9922, i32* %3
%9923 = load i32, i32* %3
%9924 = xor i32 %9923, 81954
store i32 %9924, i32* %3
%9925 = load i32, i32* %3
%9926 = srem i32 %9925, 268435443
store i32 %9926, i32* %3
%9927 = load i32, i32* %3
%9928 = add nsw i32 %9927, 6
store i32 %9928, i32* %3
%9929 = load i32, i32* %3
%9930 = mul nsw i32 %9929, 10
store i32 %9930, i32* %3
%9931 = load i32, i32* %3
%9932 = add nsw i32 %9931, 1
store i32 %9932, i32* %3
%9933 = load i32, i32* %3
%9934 = mul nsw i32 %9933, 2
store i32 %9934, i32* %3
%9935 = load i32, i32* %3
%9936 = sub nsw i32 %9935, 1
store i32 %9936, i32* %3
%9937 = load i32, i32* %3
%9938 = and i32 %9937, -1044481
store i32 %9938, i32* %3
%9939 = load i32, i32* %3
%9940 = xor i32 %9939, 81954
store i32 %9940, i32* %3
%9941 = load i32, i32* %3
%9942 = srem i32 %9941, 268435443
store i32 %9942, i32* %3
%9943 = load i32, i32* %3
%9944 = add nsw i32 %9943, 6
store i32 %9944, i32* %3
%9945 = load i32, i32* %3
%9946 = mul nsw i32 %9945, 10
store i32 %9946, i32* %3
%9947 = load i32, i32* %3
%9948 = add nsw i32 %9947, 1
store i32 %9948, i32* %3
%9949 = load i32, i32* %3
%9950 = mul nsw i32 %9949, 2
store i32 %9950, i32* %3
%9951 = load i32, i32* %3
%9952 = sub nsw i32 %9951, 1
store i32 %9952, i32* %3
%9953 = load i32, i32* %3
%9954 = and i32 %9953, -1044481
store i32 %9954, i32* %3
%9955 = load i32, i32* %3
%9956 = xor i32 %9955, 81954
store i32 %9956, i32* %3
%9957 = load i32, i32* %3
%9958 = srem i32 %9957, 268435443
store i32 %9958, i32* %3
%9959 = load i32, i32* %3
%9960 = add nsw i32 %9959, 6
store i32 %9960, i32* %3
%9961 = load i32, i32* %3
%9962 = mul nsw i32 %9961, 10
store i32 %9962, i32* %3
%9963 = load i32, i32* %3
%9964 = add nsw i32 %9963, 1
store i32 %9964, i32* %3
%9965 = load i32, i32* %3
%9966 = mul nsw i32 %9965, 2
store i32 %9966, i32* %3
%9967 = load i32, i32* %3
%9968 = sub nsw i32 %9967, 1
store i32 %9968, i32* %3
%9969 = load i32, i32* %3
%9970 = and i32 %9969, -1044481
store i32 %9970, i32* %3
%9971 = load i32, i32* %3
%9972 = xor i32 %9971, 81954
store i32 %9972, i32* %3
%9973 = load i32, i32* %3
%9974 = srem i32 %9973, 268435443
store i32 %9974, i32* %3
%9975 = load i32, i32* %3
%9976 = add nsw i32 %9975, 6
store i32 %9976, i32* %3
%9977 = load i32, i32* %3
%9978 = mul nsw i32 %9977, 10
store i32 %9978, i32* %3
%9979 = load i32, i32* %3
%9980 = add nsw i32 %9979, 1
store i32 %9980, i32* %3
%9981 = load i32, i32* %3
%9982 = mul nsw i32 %9981, 2
store i32 %9982, i32* %3
%9983 = load i32, i32* %3
%9984 = sub nsw i32 %9983, 1
store i32 %9984, i32* %3
%9985 = load i32, i32* %3
%9986 = and i32 %9985, -1044481
store i32 %9986, i32* %3
%9987 = load i32, i32* %3
%9988 = xor i32 %9987, 81954
store i32 %9988, i32* %3
%9989 = load i32, i32* %3
%9990 = srem i32 %9989, 268435443
store i32 %9990, i32* %3
%9991 = load i32, i32* %3
%9992 = add nsw i32 %9991, 6
store i32 %9992, i32* %3
%9993 = load i32, i32* %3
%9994 = mul nsw i32 %9993, 10
store i32 %9994, i32* %3
%9995 = load i32, i32* %3
%9996 = add nsw i32 %9995, 1
store i32 %9996, i32* %3
%9997 = load i32, i32* %3
%9998 = mul nsw i32 %9997, 2
store i32 %9998, i32* %3
%9999 = load i32, i32* %3
%10000 = sub nsw i32 %9999, 1
store i32 %10000, i32* %3
%10001 = load i32, i32* %3
%10002 = and i32 %10001, -1044481
store i32 %10002, i32* %3
%10003 = load i32, i32* %3
%10004 = xor i32 %10003, 81954
store i32 %10004, i32* %3
%10005 = load i32, i32* %3
%10006 = srem i32 %10005, 268435443
store i32 %10006, i32* %3
%10007 = load i32, i32* %3
%10008 = add nsw i32 %10007, 6
store i32 %10008, i32* %3
%10009 = load i32, i32* %3
%10010 = mul nsw i32 %10009, 10
store i32 %10010, i32* %3
%10011 = load i32, i32* %3
%10012 = add nsw i32 %10011, 1
store i32 %10012, i32* %3
%10013 = load i32, i32* %3
%10014 = mul nsw i32 %10013, 2
store i32 %10014, i32* %3
%10015 = load i32, i32* %3
%10016 = sub nsw i32 %10015, 1
store i32 %10016, i32* %3
%10017 = load i32, i32* %3
%10018 = and i32 %10017, -1044481
store i32 %10018, i32* %3
%10019 = load i32, i32* %3
%10020 = xor i32 %10019, 81954
store i32 %10020, i32* %3
%10021 = load i32, i32* %3
%10022 = srem i32 %10021, 268435443
store i32 %10022, i32* %3
%10023 = load i32, i32* %3
%10024 = add nsw i32 %10023, 6
store i32 %10024, i32* %3
%10025 = load i32, i32* %3
%10026 = mul nsw i32 %10025, 10
store i32 %10026, i32* %3
%10027 = load i32, i32* %3
%10028 = add nsw i32 %10027, 1
store i32 %10028, i32* %3
%10029 = load i32, i32* %3
%10030 = mul nsw i32 %10029, 2
store i32 %10030, i32* %3
%10031 = load i32, i32* %3
%10032 = sub nsw i32 %10031, 1
store i32 %10032, i32* %3
%10033 = load i32, i32* %3
%10034 = and i32 %10033, -1044481
store i32 %10034, i32* %3
%10035 = load i32, i32* %3
%10036 = xor i32 %10035, 81954
store i32 %10036, i32* %3
%10037 = load i32, i32* %3
%10038 = srem i32 %10037, 268435443
store i32 %10038, i32* %3
%10039 = load i32, i32* %3
%10040 = add nsw i32 %10039, 6
store i32 %10040, i32* %3
%10041 = load i32, i32* %3
%10042 = mul nsw i32 %10041, 10
store i32 %10042, i32* %3
%10043 = load i32, i32* %3
%10044 = add nsw i32 %10043, 1
store i32 %10044, i32* %3
%10045 = load i32, i32* %3
%10046 = mul nsw i32 %10045, 2
store i32 %10046, i32* %3
%10047 = load i32, i32* %3
%10048 = sub nsw i32 %10047, 1
store i32 %10048, i32* %3
%10049 = load i32, i32* %3
%10050 = and i32 %10049, -1044481
store i32 %10050, i32* %3
%10051 = load i32, i32* %3
%10052 = xor i32 %10051, 81954
store i32 %10052, i32* %3
%10053 = load i32, i32* %3
%10054 = srem i32 %10053, 268435443
store i32 %10054, i32* %3
%10055 = load i32, i32* %3
%10056 = add nsw i32 %10055, 6
store i32 %10056, i32* %3
%10057 = load i32, i32* %3
%10058 = mul nsw i32 %10057, 10
store i32 %10058, i32* %3
%10059 = load i32, i32* %3
%10060 = add nsw i32 %10059, 1
store i32 %10060, i32* %3
%10061 = load i32, i32* %3
%10062 = mul nsw i32 %10061, 2
store i32 %10062, i32* %3
%10063 = load i32, i32* %3
%10064 = sub nsw i32 %10063, 1
store i32 %10064, i32* %3
%10065 = load i32, i32* %3
%10066 = and i32 %10065, -1044481
store i32 %10066, i32* %3
%10067 = load i32, i32* %3
%10068 = xor i32 %10067, 81954
store i32 %10068, i32* %3
%10069 = load i32, i32* %3
%10070 = srem i32 %10069, 268435443
store i32 %10070, i32* %3
%10071 = load i32, i32* %3
%10072 = add nsw i32 %10071, 6
store i32 %10072, i32* %3
%10073 = load i32, i32* %3
%10074 = mul nsw i32 %10073, 10
store i32 %10074, i32* %3
%10075 = load i32, i32* %3
%10076 = add nsw i32 %10075, 1
store i32 %10076, i32* %3
%10077 = load i32, i32* %3
%10078 = mul nsw i32 %10077, 2
store i32 %10078, i32* %3
%10079 = load i32, i32* %3
%10080 = sub nsw i32 %10079, 1
store i32 %10080, i32* %3
%10081 = load i32, i32* %3
%10082 = and i32 %10081, -1044481
store i32 %10082, i32* %3
%10083 = load i32, i32* %3
%10084 = xor i32 %10083, 81954
store i32 %10084, i32* %3
%10085 = load i32, i32* %3
%10086 = srem i32 %10085, 268435443
store i32 %10086, i32* %3
%10087 = load i32, i32* %3
%10088 = add nsw i32 %10087, 6
store i32 %10088, i32* %3
%10089 = load i32, i32* %3
%10090 = mul nsw i32 %10089, 10
store i32 %10090, i32* %3
%10091 = load i32, i32* %3
%10092 = add nsw i32 %10091, 1
store i32 %10092, i32* %3
%10093 = load i32, i32* %3
%10094 = mul nsw i32 %10093, 2
store i32 %10094, i32* %3
%10095 = load i32, i32* %3
%10096 = sub nsw i32 %10095, 1
store i32 %10096, i32* %3
%10097 = load i32, i32* %3
%10098 = and i32 %10097, -1044481
store i32 %10098, i32* %3
%10099 = load i32, i32* %3
%10100 = xor i32 %10099, 81954
store i32 %10100, i32* %3
%10101 = load i32, i32* %3
%10102 = srem i32 %10101, 268435443
store i32 %10102, i32* %3
%10103 = load i32, i32* %3
%10104 = add nsw i32 %10103, 6
store i32 %10104, i32* %3
%10105 = load i32, i32* %3
%10106 = mul nsw i32 %10105, 10
store i32 %10106, i32* %3
%10107 = load i32, i32* %3
%10108 = add nsw i32 %10107, 1
store i32 %10108, i32* %3
%10109 = load i32, i32* %3
%10110 = mul nsw i32 %10109, 2
store i32 %10110, i32* %3
%10111 = load i32, i32* %3
%10112 = sub nsw i32 %10111, 1
store i32 %10112, i32* %3
%10113 = load i32, i32* %3
%10114 = and i32 %10113, -1044481
store i32 %10114, i32* %3
%10115 = load i32, i32* %3
%10116 = xor i32 %10115, 81954
store i32 %10116, i32* %3
%10117 = load i32, i32* %3
%10118 = srem i32 %10117, 268435443
store i32 %10118, i32* %3
%10119 = load i32, i32* %3
%10120 = add nsw i32 %10119, 6
store i32 %10120, i32* %3
%10121 = load i32, i32* %3
%10122 = mul nsw i32 %10121, 10
store i32 %10122, i32* %3
%10123 = load i32, i32* %3
%10124 = add nsw i32 %10123, 1
store i32 %10124, i32* %3
%10125 = load i32, i32* %3
%10126 = mul nsw i32 %10125, 2
store i32 %10126, i32* %3
%10127 = load i32, i32* %3
%10128 = sub nsw i32 %10127, 1
store i32 %10128, i32* %3
%10129 = load i32, i32* %3
%10130 = and i32 %10129, -1044481
store i32 %10130, i32* %3
%10131 = load i32, i32* %3
%10132 = xor i32 %10131, 81954
store i32 %10132, i32* %3
%10133 = load i32, i32* %3
%10134 = srem i32 %10133, 268435443
store i32 %10134, i32* %3
%10135 = load i32, i32* %3
%10136 = add nsw i32 %10135, 6
store i32 %10136, i32* %3
%10137 = load i32, i32* %3
%10138 = mul nsw i32 %10137, 10
store i32 %10138, i32* %3
%10139 = load i32, i32* %3
%10140 = add nsw i32 %10139, 1
store i32 %10140, i32* %3
%10141 = load i32, i32* %3
%10142 = mul nsw i32 %10141, 2
store i32 %10142, i32* %3
%10143 = load i32, i32* %3
%10144 = sub nsw i32 %10143, 1
store i32 %10144, i32* %3
%10145 = load i32, i32* %3
%10146 = and i32 %10145, -1044481
store i32 %10146, i32* %3
%10147 = load i32, i32* %3
%10148 = xor i32 %10147, 81954
store i32 %10148, i32* %3
%10149 = load i32, i32* %3
%10150 = srem i32 %10149, 268435443
store i32 %10150, i32* %3
%10151 = load i32, i32* %3
%10152 = add nsw i32 %10151, 6
store i32 %10152, i32* %3
%10153 = load i32, i32* %3
%10154 = mul nsw i32 %10153, 10
store i32 %10154, i32* %3
%10155 = load i32, i32* %3
%10156 = add nsw i32 %10155, 1
store i32 %10156, i32* %3
%10157 = load i32, i32* %3
%10158 = mul nsw i32 %10157, 2
store i32 %10158, i32* %3
%10159 = load i32, i32* %3
%10160 = sub nsw i32 %10159, 1
store i32 %10160, i32* %3
%10161 = load i32, i32* %3
%10162 = and i32 %10161, -1044481
store i32 %10162, i32* %3
%10163 = load i32, i32* %3
%10164 = xor i32 %10163, 81954
store i32 %10164, i32* %3
%10165 = load i32, i32* %3
%10166 = srem i32 %10165, 268435443
store i32 %10166, i32* %3
%10167 = load i32, i32* %3
%10168 = add nsw i32 %10167, 6
store i32 %10168, i32* %3
%10169 = load i32, i32* %3
%10170 = mul nsw i32 %10169, 10
store i32 %10170, i32* %3
%10171 = load i32, i32* %3
%10172 = add nsw i32 %10171, 1
store i32 %10172, i32* %3
%10173 = load i32, i32* %3
%10174 = mul nsw i32 %10173, 2
store i32 %10174, i32* %3
%10175 = load i32, i32* %3
%10176 = sub nsw i32 %10175, 1
store i32 %10176, i32* %3
%10177 = load i32, i32* %3
%10178 = and i32 %10177, -1044481
store i32 %10178, i32* %3
%10179 = load i32, i32* %3
%10180 = xor i32 %10179, 81954
store i32 %10180, i32* %3
%10181 = load i32, i32* %3
%10182 = srem i32 %10181, 268435443
store i32 %10182, i32* %3
%10183 = load i32, i32* %3
%10184 = add nsw i32 %10183, 6
store i32 %10184, i32* %3
%10185 = load i32, i32* %3
%10186 = mul nsw i32 %10185, 10
store i32 %10186, i32* %3
%10187 = load i32, i32* %3
%10188 = add nsw i32 %10187, 1
store i32 %10188, i32* %3
%10189 = load i32, i32* %3
%10190 = mul nsw i32 %10189, 2
store i32 %10190, i32* %3
%10191 = load i32, i32* %3
%10192 = sub nsw i32 %10191, 1
store i32 %10192, i32* %3
%10193 = load i32, i32* %3
%10194 = and i32 %10193, -1044481
store i32 %10194, i32* %3
%10195 = load i32, i32* %3
%10196 = xor i32 %10195, 81954
store i32 %10196, i32* %3
%10197 = load i32, i32* %3
%10198 = srem i32 %10197, 268435443
store i32 %10198, i32* %3
%10199 = load i32, i32* %3
%10200 = add nsw i32 %10199, 6
store i32 %10200, i32* %3
%10201 = load i32, i32* %3
%10202 = mul nsw i32 %10201, 10
store i32 %10202, i32* %3
%10203 = load i32, i32* %3
%10204 = add nsw i32 %10203, 1
store i32 %10204, i32* %3
%10205 = load i32, i32* %3
%10206 = mul nsw i32 %10205, 2
store i32 %10206, i32* %3
%10207 = load i32, i32* %3
%10208 = sub nsw i32 %10207, 1
store i32 %10208, i32* %3
%10209 = load i32, i32* %3
%10210 = and i32 %10209, -1044481
store i32 %10210, i32* %3
%10211 = load i32, i32* %3
%10212 = xor i32 %10211, 81954
store i32 %10212, i32* %3
%10213 = load i32, i32* %3
%10214 = srem i32 %10213, 268435443
store i32 %10214, i32* %3
%10215 = load i32, i32* %3
%10216 = add nsw i32 %10215, 6
store i32 %10216, i32* %3
%10217 = load i32, i32* %3
%10218 = mul nsw i32 %10217, 10
store i32 %10218, i32* %3
%10219 = load i32, i32* %3
%10220 = add nsw i32 %10219, 1
store i32 %10220, i32* %3
%10221 = load i32, i32* %3
%10222 = mul nsw i32 %10221, 2
store i32 %10222, i32* %3
%10223 = load i32, i32* %3
%10224 = sub nsw i32 %10223, 1
store i32 %10224, i32* %3
%10225 = load i32, i32* %3
%10226 = and i32 %10225, -1044481
store i32 %10226, i32* %3
%10227 = load i32, i32* %3
%10228 = xor i32 %10227, 81954
store i32 %10228, i32* %3
%10229 = load i32, i32* %3
%10230 = srem i32 %10229, 268435443
store i32 %10230, i32* %3
%10231 = load i32, i32* %3
%10232 = add nsw i32 %10231, 6
store i32 %10232, i32* %3
%10233 = load i32, i32* %3
%10234 = mul nsw i32 %10233, 10
store i32 %10234, i32* %3
%10235 = load i32, i32* %3
%10236 = add nsw i32 %10235, 1
store i32 %10236, i32* %3
%10237 = load i32, i32* %3
%10238 = mul nsw i32 %10237, 2
store i32 %10238, i32* %3
%10239 = load i32, i32* %3
%10240 = sub nsw i32 %10239, 1
store i32 %10240, i32* %3
%10241 = load i32, i32* %3
%10242 = and i32 %10241, -1044481
store i32 %10242, i32* %3
%10243 = load i32, i32* %3
%10244 = xor i32 %10243, 81954
store i32 %10244, i32* %3
%10245 = load i32, i32* %3
%10246 = srem i32 %10245, 268435443
store i32 %10246, i32* %3
%10247 = load i32, i32* %3
%10248 = add nsw i32 %10247, 6
store i32 %10248, i32* %3
%10249 = load i32, i32* %3
%10250 = mul nsw i32 %10249, 10
store i32 %10250, i32* %3
%10251 = load i32, i32* %3
%10252 = add nsw i32 %10251, 1
store i32 %10252, i32* %3
%10253 = load i32, i32* %3
%10254 = mul nsw i32 %10253, 2
store i32 %10254, i32* %3
%10255 = load i32, i32* %3
%10256 = sub nsw i32 %10255, 1
store i32 %10256, i32* %3
%10257 = load i32, i32* %3
%10258 = and i32 %10257, -1044481
store i32 %10258, i32* %3
%10259 = load i32, i32* %3
%10260 = xor i32 %10259, 81954
store i32 %10260, i32* %3
%10261 = load i32, i32* %3
%10262 = srem i32 %10261, 268435443
store i32 %10262, i32* %3
%10263 = load i32, i32* %3
%10264 = add nsw i32 %10263, 6
store i32 %10264, i32* %3
%10265 = load i32, i32* %3
%10266 = mul nsw i32 %10265, 10
store i32 %10266, i32* %3
%10267 = load i32, i32* %3
%10268 = add nsw i32 %10267, 1
store i32 %10268, i32* %3
%10269 = load i32, i32* %3
%10270 = mul nsw i32 %10269, 2
store i32 %10270, i32* %3
%10271 = load i32, i32* %3
%10272 = sub nsw i32 %10271, 1
store i32 %10272, i32* %3
%10273 = load i32, i32* %3
%10274 = and i32 %10273, -1044481
store i32 %10274, i32* %3
%10275 = load i32, i32* %3
%10276 = xor i32 %10275, 81954
store i32 %10276, i32* %3
%10277 = load i32, i32* %3
%10278 = srem i32 %10277, 268435443
store i32 %10278, i32* %3
%10279 = load i32, i32* %3
%10280 = add nsw i32 %10279, 6
store i32 %10280, i32* %3
%10281 = load i32, i32* %3
%10282 = mul nsw i32 %10281, 10
store i32 %10282, i32* %3
%10283 = load i32, i32* %3
%10284 = add nsw i32 %10283, 1
store i32 %10284, i32* %3
%10285 = load i32, i32* %3
%10286 = mul nsw i32 %10285, 2
store i32 %10286, i32* %3
%10287 = load i32, i32* %3
%10288 = sub nsw i32 %10287, 1
store i32 %10288, i32* %3
%10289 = load i32, i32* %3
%10290 = and i32 %10289, -1044481
store i32 %10290, i32* %3
%10291 = load i32, i32* %3
%10292 = xor i32 %10291, 81954
store i32 %10292, i32* %3
%10293 = load i32, i32* %3
%10294 = srem i32 %10293, 268435443
store i32 %10294, i32* %3
%10295 = load i32, i32* %3
%10296 = add nsw i32 %10295, 6
store i32 %10296, i32* %3
%10297 = load i32, i32* %3
%10298 = mul nsw i32 %10297, 10
store i32 %10298, i32* %3
%10299 = load i32, i32* %3
%10300 = add nsw i32 %10299, 1
store i32 %10300, i32* %3
%10301 = load i32, i32* %3
%10302 = mul nsw i32 %10301, 2
store i32 %10302, i32* %3
%10303 = load i32, i32* %3
%10304 = sub nsw i32 %10303, 1
store i32 %10304, i32* %3
%10305 = load i32, i32* %3
%10306 = and i32 %10305, -1044481
store i32 %10306, i32* %3
%10307 = load i32, i32* %3
%10308 = xor i32 %10307, 81954
store i32 %10308, i32* %3
%10309 = load i32, i32* %3
%10310 = srem i32 %10309, 268435443
store i32 %10310, i32* %3
%10311 = load i32, i32* %3
%10312 = add nsw i32 %10311, 6
store i32 %10312, i32* %3
%10313 = load i32, i32* %3
%10314 = mul nsw i32 %10313, 10
store i32 %10314, i32* %3
%10315 = load i32, i32* %3
%10316 = add nsw i32 %10315, 1
store i32 %10316, i32* %3
%10317 = load i32, i32* %3
%10318 = mul nsw i32 %10317, 2
store i32 %10318, i32* %3
%10319 = load i32, i32* %3
%10320 = sub nsw i32 %10319, 1
store i32 %10320, i32* %3
%10321 = load i32, i32* %3
%10322 = and i32 %10321, -1044481
store i32 %10322, i32* %3
%10323 = load i32, i32* %3
%10324 = xor i32 %10323, 81954
store i32 %10324, i32* %3
%10325 = load i32, i32* %3
%10326 = srem i32 %10325, 268435443
store i32 %10326, i32* %3
%10327 = load i32, i32* %3
%10328 = add nsw i32 %10327, 6
store i32 %10328, i32* %3
%10329 = load i32, i32* %3
%10330 = mul nsw i32 %10329, 10
store i32 %10330, i32* %3
%10331 = load i32, i32* %3
%10332 = add nsw i32 %10331, 1
store i32 %10332, i32* %3
%10333 = load i32, i32* %3
%10334 = mul nsw i32 %10333, 2
store i32 %10334, i32* %3
%10335 = load i32, i32* %3
%10336 = sub nsw i32 %10335, 1
store i32 %10336, i32* %3
%10337 = load i32, i32* %3
%10338 = and i32 %10337, -1044481
store i32 %10338, i32* %3
%10339 = load i32, i32* %3
%10340 = xor i32 %10339, 81954
store i32 %10340, i32* %3
%10341 = load i32, i32* %3
%10342 = srem i32 %10341, 268435443
store i32 %10342, i32* %3
%10343 = load i32, i32* %3
%10344 = add nsw i32 %10343, 6
store i32 %10344, i32* %3
%10345 = load i32, i32* %3
%10346 = mul nsw i32 %10345, 10
store i32 %10346, i32* %3
%10347 = load i32, i32* %3
%10348 = add nsw i32 %10347, 1
store i32 %10348, i32* %3
%10349 = load i32, i32* %3
%10350 = mul nsw i32 %10349, 2
store i32 %10350, i32* %3
%10351 = load i32, i32* %3
%10352 = sub nsw i32 %10351, 1
store i32 %10352, i32* %3
%10353 = load i32, i32* %3
%10354 = and i32 %10353, -1044481
store i32 %10354, i32* %3
%10355 = load i32, i32* %3
%10356 = xor i32 %10355, 81954
store i32 %10356, i32* %3
%10357 = load i32, i32* %3
%10358 = srem i32 %10357, 268435443
store i32 %10358, i32* %3
%10359 = load i32, i32* %3
%10360 = add nsw i32 %10359, 6
store i32 %10360, i32* %3
%10361 = load i32, i32* %3
%10362 = mul nsw i32 %10361, 10
store i32 %10362, i32* %3
%10363 = load i32, i32* %3
%10364 = add nsw i32 %10363, 1
store i32 %10364, i32* %3
%10365 = load i32, i32* %3
%10366 = mul nsw i32 %10365, 2
store i32 %10366, i32* %3
%10367 = load i32, i32* %3
%10368 = sub nsw i32 %10367, 1
store i32 %10368, i32* %3
%10369 = load i32, i32* %3
%10370 = and i32 %10369, -1044481
store i32 %10370, i32* %3
%10371 = load i32, i32* %3
%10372 = xor i32 %10371, 81954
store i32 %10372, i32* %3
%10373 = load i32, i32* %3
%10374 = srem i32 %10373, 268435443
store i32 %10374, i32* %3
%10375 = load i32, i32* %3
%10376 = add nsw i32 %10375, 6
store i32 %10376, i32* %3
%10377 = load i32, i32* %3
%10378 = mul nsw i32 %10377, 10
store i32 %10378, i32* %3
%10379 = load i32, i32* %3
%10380 = add nsw i32 %10379, 1
store i32 %10380, i32* %3
%10381 = load i32, i32* %3
%10382 = mul nsw i32 %10381, 2
store i32 %10382, i32* %3
%10383 = load i32, i32* %3
%10384 = sub nsw i32 %10383, 1
store i32 %10384, i32* %3
%10385 = load i32, i32* %3
%10386 = and i32 %10385, -1044481
store i32 %10386, i32* %3
%10387 = load i32, i32* %3
%10388 = xor i32 %10387, 81954
store i32 %10388, i32* %3
%10389 = load i32, i32* %3
%10390 = srem i32 %10389, 268435443
store i32 %10390, i32* %3
%10391 = load i32, i32* %3
%10392 = add nsw i32 %10391, 6
store i32 %10392, i32* %3
%10393 = load i32, i32* %3
%10394 = mul nsw i32 %10393, 10
store i32 %10394, i32* %3
%10395 = load i32, i32* %3
%10396 = add nsw i32 %10395, 1
store i32 %10396, i32* %3
%10397 = load i32, i32* %3
%10398 = mul nsw i32 %10397, 2
store i32 %10398, i32* %3
%10399 = load i32, i32* %3
%10400 = sub nsw i32 %10399, 1
store i32 %10400, i32* %3
%10401 = load i32, i32* %3
%10402 = and i32 %10401, -1044481
store i32 %10402, i32* %3
%10403 = load i32, i32* %3
%10404 = xor i32 %10403, 81954
store i32 %10404, i32* %3
%10405 = load i32, i32* %3
%10406 = srem i32 %10405, 268435443
store i32 %10406, i32* %3
%10407 = load i32, i32* %3
%10408 = add nsw i32 %10407, 6
store i32 %10408, i32* %3
%10409 = load i32, i32* %3
%10410 = mul nsw i32 %10409, 10
store i32 %10410, i32* %3
%10411 = load i32, i32* %3
%10412 = add nsw i32 %10411, 1
store i32 %10412, i32* %3
%10413 = load i32, i32* %3
%10414 = mul nsw i32 %10413, 2
store i32 %10414, i32* %3
%10415 = load i32, i32* %3
%10416 = sub nsw i32 %10415, 1
store i32 %10416, i32* %3
%10417 = load i32, i32* %3
%10418 = and i32 %10417, -1044481
store i32 %10418, i32* %3
%10419 = load i32, i32* %3
%10420 = xor i32 %10419, 81954
store i32 %10420, i32* %3
%10421 = load i32, i32* %3
%10422 = srem i32 %10421, 268435443
store i32 %10422, i32* %3
%10423 = load i32, i32* %3
%10424 = add nsw i32 %10423, 6
store i32 %10424, i32* %3
%10425 = load i32, i32* %3
%10426 = mul nsw i32 %10425, 10
store i32 %10426, i32* %3
%10427 = load i32, i32* %3
%10428 = add nsw i32 %10427, 1
store i32 %10428, i32* %3
%10429 = load i32, i32* %3
%10430 = mul nsw i32 %10429, 2
store i32 %10430, i32* %3
%10431 = load i32, i32* %3
%10432 = sub nsw i32 %10431, 1
store i32 %10432, i32* %3
%10433 = load i32, i32* %3
%10434 = and i32 %10433, -1044481
store i32 %10434, i32* %3
%10435 = load i32, i32* %3
%10436 = xor i32 %10435, 81954
store i32 %10436, i32* %3
%10437 = load i32, i32* %3
%10438 = srem i32 %10437, 268435443
store i32 %10438, i32* %3
%10439 = load i32, i32* %3
%10440 = add nsw i32 %10439, 6
store i32 %10440, i32* %3
%10441 = load i32, i32* %3
%10442 = mul nsw i32 %10441, 10
store i32 %10442, i32* %3
%10443 = load i32, i32* %3
%10444 = add nsw i32 %10443, 1
store i32 %10444, i32* %3
%10445 = load i32, i32* %3
%10446 = mul nsw i32 %10445, 2
store i32 %10446, i32* %3
%10447 = load i32, i32* %3
%10448 = sub nsw i32 %10447, 1
store i32 %10448, i32* %3
%10449 = load i32, i32* %3
%10450 = and i32 %10449, -1044481
store i32 %10450, i32* %3
%10451 = load i32, i32* %3
%10452 = xor i32 %10451, 81954
store i32 %10452, i32* %3
%10453 = load i32, i32* %3
%10454 = srem i32 %10453, 268435443
store i32 %10454, i32* %3
%10455 = load i32, i32* %3
%10456 = add nsw i32 %10455, 6
store i32 %10456, i32* %3
%10457 = load i32, i32* %3
%10458 = mul nsw i32 %10457, 10
store i32 %10458, i32* %3
%10459 = load i32, i32* %3
%10460 = add nsw i32 %10459, 1
store i32 %10460, i32* %3
%10461 = load i32, i32* %3
%10462 = mul nsw i32 %10461, 2
store i32 %10462, i32* %3
%10463 = load i32, i32* %3
%10464 = sub nsw i32 %10463, 1
store i32 %10464, i32* %3
%10465 = load i32, i32* %3
%10466 = and i32 %10465, -1044481
store i32 %10466, i32* %3
%10467 = load i32, i32* %3
%10468 = xor i32 %10467, 81954
store i32 %10468, i32* %3
%10469 = load i32, i32* %3
%10470 = srem i32 %10469, 268435443
store i32 %10470, i32* %3
%10471 = load i32, i32* %3
%10472 = add nsw i32 %10471, 6
store i32 %10472, i32* %3
%10473 = load i32, i32* %3
%10474 = mul nsw i32 %10473, 10
store i32 %10474, i32* %3
%10475 = load i32, i32* %3
%10476 = add nsw i32 %10475, 1
store i32 %10476, i32* %3
%10477 = load i32, i32* %3
%10478 = mul nsw i32 %10477, 2
store i32 %10478, i32* %3
%10479 = load i32, i32* %3
%10480 = sub nsw i32 %10479, 1
store i32 %10480, i32* %3
%10481 = load i32, i32* %3
%10482 = and i32 %10481, -1044481
store i32 %10482, i32* %3
%10483 = load i32, i32* %3
%10484 = xor i32 %10483, 81954
store i32 %10484, i32* %3
%10485 = load i32, i32* %3
%10486 = srem i32 %10485, 268435443
store i32 %10486, i32* %3
%10487 = load i32, i32* %3
%10488 = add nsw i32 %10487, 6
store i32 %10488, i32* %3
%10489 = load i32, i32* %3
%10490 = mul nsw i32 %10489, 10
store i32 %10490, i32* %3
%10491 = load i32, i32* %3
%10492 = add nsw i32 %10491, 1
store i32 %10492, i32* %3
%10493 = load i32, i32* %3
%10494 = mul nsw i32 %10493, 2
store i32 %10494, i32* %3
%10495 = load i32, i32* %3
%10496 = sub nsw i32 %10495, 1
store i32 %10496, i32* %3
%10497 = load i32, i32* %3
%10498 = and i32 %10497, -1044481
store i32 %10498, i32* %3
%10499 = load i32, i32* %3
%10500 = xor i32 %10499, 81954
store i32 %10500, i32* %3
%10501 = load i32, i32* %3
%10502 = srem i32 %10501, 268435443
store i32 %10502, i32* %3
%10503 = load i32, i32* %3
%10504 = add nsw i32 %10503, 6
store i32 %10504, i32* %3
%10505 = load i32, i32* %3
%10506 = mul nsw i32 %10505, 10
store i32 %10506, i32* %3
%10507 = load i32, i32* %3
%10508 = add nsw i32 %10507, 1
store i32 %10508, i32* %3
%10509 = load i32, i32* %3
%10510 = mul nsw i32 %10509, 2
store i32 %10510, i32* %3
%10511 = load i32, i32* %3
%10512 = sub nsw i32 %10511, 1
store i32 %10512, i32* %3
%10513 = load i32, i32* %3
%10514 = and i32 %10513, -1044481
store i32 %10514, i32* %3
%10515 = load i32, i32* %3
%10516 = xor i32 %10515, 81954
store i32 %10516, i32* %3
%10517 = load i32, i32* %3
%10518 = srem i32 %10517, 268435443
store i32 %10518, i32* %3
%10519 = load i32, i32* %3
%10520 = add nsw i32 %10519, 6
store i32 %10520, i32* %3
%10521 = load i32, i32* %3
%10522 = mul nsw i32 %10521, 10
store i32 %10522, i32* %3
%10523 = load i32, i32* %3
%10524 = add nsw i32 %10523, 1
store i32 %10524, i32* %3
%10525 = load i32, i32* %3
%10526 = mul nsw i32 %10525, 2
store i32 %10526, i32* %3
%10527 = load i32, i32* %3
%10528 = sub nsw i32 %10527, 1
store i32 %10528, i32* %3
%10529 = load i32, i32* %3
%10530 = and i32 %10529, -1044481
store i32 %10530, i32* %3
%10531 = load i32, i32* %3
%10532 = xor i32 %10531, 81954
store i32 %10532, i32* %3
%10533 = load i32, i32* %3
%10534 = srem i32 %10533, 268435443
store i32 %10534, i32* %3
%10535 = load i32, i32* %3
%10536 = add nsw i32 %10535, 6
store i32 %10536, i32* %3
%10537 = load i32, i32* %3
%10538 = mul nsw i32 %10537, 10
store i32 %10538, i32* %3
%10539 = load i32, i32* %3
%10540 = add nsw i32 %10539, 1
store i32 %10540, i32* %3
%10541 = load i32, i32* %3
%10542 = mul nsw i32 %10541, 2
store i32 %10542, i32* %3
%10543 = load i32, i32* %3
%10544 = sub nsw i32 %10543, 1
store i32 %10544, i32* %3
%10545 = load i32, i32* %3
%10546 = and i32 %10545, -1044481
store i32 %10546, i32* %3
%10547 = load i32, i32* %3
%10548 = xor i32 %10547, 81954
store i32 %10548, i32* %3
%10549 = load i32, i32* %3
%10550 = srem i32 %10549, 268435443
store i32 %10550, i32* %3
%10551 = load i32, i32* %3
%10552 = add nsw i32 %10551, 6
store i32 %10552, i32* %3
%10553 = load i32, i32* %3
%10554 = mul nsw i32 %10553, 10
store i32 %10554, i32* %3
%10555 = load i32, i32* %3
%10556 = add nsw i32 %10555, 1
store i32 %10556, i32* %3
%10557 = load i32, i32* %3
%10558 = mul nsw i32 %10557, 2
store i32 %10558, i32* %3
%10559 = load i32, i32* %3
%10560 = sub nsw i32 %10559, 1
store i32 %10560, i32* %3
%10561 = load i32, i32* %3
%10562 = and i32 %10561, -1044481
store i32 %10562, i32* %3
%10563 = load i32, i32* %3
%10564 = xor i32 %10563, 81954
store i32 %10564, i32* %3
%10565 = load i32, i32* %3
%10566 = srem i32 %10565, 268435443
store i32 %10566, i32* %3
%10567 = load i32, i32* %3
%10568 = add nsw i32 %10567, 6
store i32 %10568, i32* %3
%10569 = load i32, i32* %3
%10570 = mul nsw i32 %10569, 10
store i32 %10570, i32* %3
%10571 = load i32, i32* %3
%10572 = add nsw i32 %10571, 1
store i32 %10572, i32* %3
%10573 = load i32, i32* %3
%10574 = mul nsw i32 %10573, 2
store i32 %10574, i32* %3
%10575 = load i32, i32* %3
%10576 = sub nsw i32 %10575, 1
store i32 %10576, i32* %3
%10577 = load i32, i32* %3
%10578 = and i32 %10577, -1044481
store i32 %10578, i32* %3
%10579 = load i32, i32* %3
%10580 = xor i32 %10579, 81954
store i32 %10580, i32* %3
%10581 = load i32, i32* %3
%10582 = srem i32 %10581, 268435443
store i32 %10582, i32* %3
%10583 = load i32, i32* %3
%10584 = add nsw i32 %10583, 6
store i32 %10584, i32* %3
%10585 = load i32, i32* %3
%10586 = mul nsw i32 %10585, 10
store i32 %10586, i32* %3
%10587 = load i32, i32* %3
%10588 = add nsw i32 %10587, 1
store i32 %10588, i32* %3
%10589 = load i32, i32* %3
%10590 = mul nsw i32 %10589, 2
store i32 %10590, i32* %3
%10591 = load i32, i32* %3
%10592 = sub nsw i32 %10591, 1
store i32 %10592, i32* %3
%10593 = load i32, i32* %3
%10594 = and i32 %10593, -1044481
store i32 %10594, i32* %3
%10595 = load i32, i32* %3
%10596 = xor i32 %10595, 81954
store i32 %10596, i32* %3
%10597 = load i32, i32* %3
%10598 = srem i32 %10597, 268435443
store i32 %10598, i32* %3
%10599 = load i32, i32* %3
%10600 = add nsw i32 %10599, 6
store i32 %10600, i32* %3
%10601 = load i32, i32* %3
%10602 = mul nsw i32 %10601, 10
store i32 %10602, i32* %3
%10603 = load i32, i32* %3
%10604 = add nsw i32 %10603, 1
store i32 %10604, i32* %3
%10605 = load i32, i32* %3
%10606 = mul nsw i32 %10605, 2
store i32 %10606, i32* %3
%10607 = load i32, i32* %3
%10608 = sub nsw i32 %10607, 1
store i32 %10608, i32* %3
%10609 = load i32, i32* %3
%10610 = and i32 %10609, -1044481
store i32 %10610, i32* %3
%10611 = load i32, i32* %3
%10612 = xor i32 %10611, 81954
store i32 %10612, i32* %3
%10613 = load i32, i32* %3
%10614 = srem i32 %10613, 268435443
store i32 %10614, i32* %3
%10615 = load i32, i32* %3
%10616 = add nsw i32 %10615, 6
store i32 %10616, i32* %3
%10617 = load i32, i32* %3
%10618 = mul nsw i32 %10617, 10
store i32 %10618, i32* %3
%10619 = load i32, i32* %3
%10620 = add nsw i32 %10619, 1
store i32 %10620, i32* %3
%10621 = load i32, i32* %3
%10622 = mul nsw i32 %10621, 2
store i32 %10622, i32* %3
%10623 = load i32, i32* %3
%10624 = sub nsw i32 %10623, 1
store i32 %10624, i32* %3
%10625 = load i32, i32* %3
%10626 = and i32 %10625, -1044481
store i32 %10626, i32* %3
%10627 = load i32, i32* %3
%10628 = xor i32 %10627, 81954
store i32 %10628, i32* %3
%10629 = load i32, i32* %3
%10630 = srem i32 %10629, 268435443
store i32 %10630, i32* %3
%10631 = load i32, i32* %3
%10632 = add nsw i32 %10631, 6
store i32 %10632, i32* %3
%10633 = load i32, i32* %3
%10634 = mul nsw i32 %10633, 10
store i32 %10634, i32* %3
%10635 = load i32, i32* %3
%10636 = add nsw i32 %10635, 1
store i32 %10636, i32* %3
%10637 = load i32, i32* %3
%10638 = mul nsw i32 %10637, 2
store i32 %10638, i32* %3
%10639 = load i32, i32* %3
%10640 = sub nsw i32 %10639, 1
store i32 %10640, i32* %3
%10641 = load i32, i32* %3
%10642 = and i32 %10641, -1044481
store i32 %10642, i32* %3
%10643 = load i32, i32* %3
%10644 = xor i32 %10643, 81954
store i32 %10644, i32* %3
%10645 = load i32, i32* %3
%10646 = srem i32 %10645, 268435443
store i32 %10646, i32* %3
%10647 = load i32, i32* %3
%10648 = add nsw i32 %10647, 6
store i32 %10648, i32* %3
%10649 = load i32, i32* %3
%10650 = mul nsw i32 %10649, 10
store i32 %10650, i32* %3
%10651 = load i32, i32* %3
%10652 = add nsw i32 %10651, 1
store i32 %10652, i32* %3
%10653 = load i32, i32* %3
%10654 = mul nsw i32 %10653, 2
store i32 %10654, i32* %3
%10655 = load i32, i32* %3
%10656 = sub nsw i32 %10655, 1
store i32 %10656, i32* %3
%10657 = load i32, i32* %3
%10658 = and i32 %10657, -1044481
store i32 %10658, i32* %3
%10659 = load i32, i32* %3
%10660 = xor i32 %10659, 81954
store i32 %10660, i32* %3
%10661 = load i32, i32* %3
%10662 = srem i32 %10661, 268435443
store i32 %10662, i32* %3
%10663 = load i32, i32* %3
%10664 = add nsw i32 %10663, 6
store i32 %10664, i32* %3
%10665 = load i32, i32* %3
%10666 = mul nsw i32 %10665, 10
store i32 %10666, i32* %3
%10667 = load i32, i32* %3
%10668 = add nsw i32 %10667, 1
store i32 %10668, i32* %3
%10669 = load i32, i32* %3
%10670 = mul nsw i32 %10669, 2
store i32 %10670, i32* %3
%10671 = load i32, i32* %3
%10672 = sub nsw i32 %10671, 1
store i32 %10672, i32* %3
%10673 = load i32, i32* %3
%10674 = and i32 %10673, -1044481
store i32 %10674, i32* %3
%10675 = load i32, i32* %3
%10676 = xor i32 %10675, 81954
store i32 %10676, i32* %3
%10677 = load i32, i32* %3
%10678 = srem i32 %10677, 268435443
store i32 %10678, i32* %3
%10679 = load i32, i32* %3
%10680 = add nsw i32 %10679, 6
store i32 %10680, i32* %3
%10681 = load i32, i32* %3
%10682 = mul nsw i32 %10681, 10
store i32 %10682, i32* %3
%10683 = load i32, i32* %3
%10684 = add nsw i32 %10683, 1
store i32 %10684, i32* %3
%10685 = load i32, i32* %3
%10686 = mul nsw i32 %10685, 2
store i32 %10686, i32* %3
%10687 = load i32, i32* %3
%10688 = sub nsw i32 %10687, 1
store i32 %10688, i32* %3
%10689 = load i32, i32* %3
%10690 = and i32 %10689, -1044481
store i32 %10690, i32* %3
%10691 = load i32, i32* %3
%10692 = xor i32 %10691, 81954
store i32 %10692, i32* %3
%10693 = load i32, i32* %3
%10694 = srem i32 %10693, 268435443
store i32 %10694, i32* %3
%10695 = load i32, i32* %3
%10696 = add nsw i32 %10695, 6
store i32 %10696, i32* %3
%10697 = load i32, i32* %3
%10698 = mul nsw i32 %10697, 10
store i32 %10698, i32* %3
%10699 = load i32, i32* %3
%10700 = add nsw i32 %10699, 1
store i32 %10700, i32* %3
%10701 = load i32, i32* %3
%10702 = mul nsw i32 %10701, 2
store i32 %10702, i32* %3
%10703 = load i32, i32* %3
%10704 = sub nsw i32 %10703, 1
store i32 %10704, i32* %3
%10705 = load i32, i32* %3
%10706 = and i32 %10705, -1044481
store i32 %10706, i32* %3
%10707 = load i32, i32* %3
%10708 = xor i32 %10707, 81954
store i32 %10708, i32* %3
%10709 = load i32, i32* %3
%10710 = srem i32 %10709, 268435443
store i32 %10710, i32* %3
%10711 = load i32, i32* %3
%10712 = add nsw i32 %10711, 6
store i32 %10712, i32* %3
%10713 = load i32, i32* %3
%10714 = mul nsw i32 %10713, 10
store i32 %10714, i32* %3
%10715 = load i32, i32* %3
%10716 = add nsw i32 %10715, 1
store i32 %10716, i32* %3
%10717 = load i32, i32* %3
%10718 = mul nsw i32 %10717, 2
store i32 %10718, i32* %3
%10719 = load i32, i32* %3
%10720 = sub nsw i32 %10719, 1
store i32 %10720, i32* %3
%10721 = load i32, i32* %3
%10722 = and i32 %10721, -1044481
store i32 %10722, i32* %3
%10723 = load i32, i32* %3
%10724 = xor i32 %10723, 81954
store i32 %10724, i32* %3
%10725 = load i32, i32* %3
%10726 = srem i32 %10725, 268435443
store i32 %10726, i32* %3
%10727 = load i32, i32* %3
%10728 = add nsw i32 %10727, 6
store i32 %10728, i32* %3
%10729 = load i32, i32* %3
%10730 = mul nsw i32 %10729, 10
store i32 %10730, i32* %3
%10731 = load i32, i32* %3
%10732 = add nsw i32 %10731, 1
store i32 %10732, i32* %3
%10733 = load i32, i32* %3
%10734 = mul nsw i32 %10733, 2
store i32 %10734, i32* %3
%10735 = load i32, i32* %3
%10736 = sub nsw i32 %10735, 1
store i32 %10736, i32* %3
%10737 = load i32, i32* %3
%10738 = and i32 %10737, -1044481
store i32 %10738, i32* %3
%10739 = load i32, i32* %3
%10740 = xor i32 %10739, 81954
store i32 %10740, i32* %3
%10741 = load i32, i32* %3
%10742 = srem i32 %10741, 268435443
store i32 %10742, i32* %3
%10743 = load i32, i32* %3
%10744 = add nsw i32 %10743, 6
store i32 %10744, i32* %3
%10745 = load i32, i32* %3
%10746 = mul nsw i32 %10745, 10
store i32 %10746, i32* %3
%10747 = load i32, i32* %3
%10748 = add nsw i32 %10747, 1
store i32 %10748, i32* %3
%10749 = load i32, i32* %3
%10750 = mul nsw i32 %10749, 2
store i32 %10750, i32* %3
%10751 = load i32, i32* %3
%10752 = sub nsw i32 %10751, 1
store i32 %10752, i32* %3
%10753 = load i32, i32* %3
%10754 = and i32 %10753, -1044481
store i32 %10754, i32* %3
%10755 = load i32, i32* %3
%10756 = xor i32 %10755, 81954
store i32 %10756, i32* %3
%10757 = load i32, i32* %3
%10758 = srem i32 %10757, 268435443
store i32 %10758, i32* %3
%10759 = load i32, i32* %3
%10760 = add nsw i32 %10759, 6
store i32 %10760, i32* %3
%10761 = load i32, i32* %3
%10762 = mul nsw i32 %10761, 10
store i32 %10762, i32* %3
%10763 = load i32, i32* %3
%10764 = add nsw i32 %10763, 1
store i32 %10764, i32* %3
%10765 = load i32, i32* %3
%10766 = mul nsw i32 %10765, 2
store i32 %10766, i32* %3
%10767 = load i32, i32* %3
%10768 = sub nsw i32 %10767, 1
store i32 %10768, i32* %3
%10769 = load i32, i32* %3
%10770 = and i32 %10769, -1044481
store i32 %10770, i32* %3
%10771 = load i32, i32* %3
%10772 = xor i32 %10771, 81954
store i32 %10772, i32* %3
%10773 = load i32, i32* %3
%10774 = srem i32 %10773, 268435443
store i32 %10774, i32* %3
%10775 = load i32, i32* %3
%10776 = add nsw i32 %10775, 6
store i32 %10776, i32* %3
%10777 = load i32, i32* %3
%10778 = mul nsw i32 %10777, 10
store i32 %10778, i32* %3
%10779 = load i32, i32* %3
%10780 = add nsw i32 %10779, 1
store i32 %10780, i32* %3
%10781 = load i32, i32* %3
%10782 = mul nsw i32 %10781, 2
store i32 %10782, i32* %3
%10783 = load i32, i32* %3
%10784 = sub nsw i32 %10783, 1
store i32 %10784, i32* %3
%10785 = load i32, i32* %3
%10786 = and i32 %10785, -1044481
store i32 %10786, i32* %3
%10787 = load i32, i32* %3
%10788 = xor i32 %10787, 81954
store i32 %10788, i32* %3
%10789 = load i32, i32* %3
%10790 = srem i32 %10789, 268435443
store i32 %10790, i32* %3
%10791 = load i32, i32* %3
%10792 = add nsw i32 %10791, 6
store i32 %10792, i32* %3
%10793 = load i32, i32* %3
%10794 = mul nsw i32 %10793, 10
store i32 %10794, i32* %3
%10795 = load i32, i32* %3
%10796 = add nsw i32 %10795, 1
store i32 %10796, i32* %3
%10797 = load i32, i32* %3
%10798 = mul nsw i32 %10797, 2
store i32 %10798, i32* %3
%10799 = load i32, i32* %3
%10800 = sub nsw i32 %10799, 1
store i32 %10800, i32* %3
%10801 = load i32, i32* %3
%10802 = and i32 %10801, -1044481
store i32 %10802, i32* %3
%10803 = load i32, i32* %3
%10804 = xor i32 %10803, 81954
store i32 %10804, i32* %3
%10805 = load i32, i32* %3
%10806 = srem i32 %10805, 268435443
store i32 %10806, i32* %3
%10807 = load i32, i32* %3
%10808 = add nsw i32 %10807, 6
store i32 %10808, i32* %3
%10809 = load i32, i32* %3
%10810 = mul nsw i32 %10809, 10
store i32 %10810, i32* %3
%10811 = load i32, i32* %3
%10812 = add nsw i32 %10811, 1
store i32 %10812, i32* %3
%10813 = load i32, i32* %3
%10814 = mul nsw i32 %10813, 2
store i32 %10814, i32* %3
%10815 = load i32, i32* %3
%10816 = sub nsw i32 %10815, 1
store i32 %10816, i32* %3
%10817 = load i32, i32* %3
%10818 = and i32 %10817, -1044481
store i32 %10818, i32* %3
%10819 = load i32, i32* %3
%10820 = xor i32 %10819, 81954
store i32 %10820, i32* %3
%10821 = load i32, i32* %3
%10822 = srem i32 %10821, 268435443
store i32 %10822, i32* %3
%10823 = load i32, i32* %3
%10824 = add nsw i32 %10823, 6
store i32 %10824, i32* %3
%10825 = load i32, i32* %3
%10826 = mul nsw i32 %10825, 10
store i32 %10826, i32* %3
%10827 = load i32, i32* %3
%10828 = add nsw i32 %10827, 1
store i32 %10828, i32* %3
%10829 = load i32, i32* %3
%10830 = mul nsw i32 %10829, 2
store i32 %10830, i32* %3
%10831 = load i32, i32* %3
%10832 = sub nsw i32 %10831, 1
store i32 %10832, i32* %3
%10833 = load i32, i32* %3
%10834 = and i32 %10833, -1044481
store i32 %10834, i32* %3
%10835 = load i32, i32* %3
%10836 = xor i32 %10835, 81954
store i32 %10836, i32* %3
%10837 = load i32, i32* %3
%10838 = srem i32 %10837, 268435443
store i32 %10838, i32* %3
%10839 = load i32, i32* %3
%10840 = add nsw i32 %10839, 6
store i32 %10840, i32* %3
%10841 = load i32, i32* %3
%10842 = mul nsw i32 %10841, 10
store i32 %10842, i32* %3
%10843 = load i32, i32* %3
%10844 = add nsw i32 %10843, 1
store i32 %10844, i32* %3
%10845 = load i32, i32* %3
%10846 = mul nsw i32 %10845, 2
store i32 %10846, i32* %3
%10847 = load i32, i32* %3
%10848 = sub nsw i32 %10847, 1
store i32 %10848, i32* %3
%10849 = load i32, i32* %3
%10850 = and i32 %10849, -1044481
store i32 %10850, i32* %3
%10851 = load i32, i32* %3
%10852 = xor i32 %10851, 81954
store i32 %10852, i32* %3
%10853 = load i32, i32* %3
%10854 = srem i32 %10853, 268435443
store i32 %10854, i32* %3
%10855 = load i32, i32* %3
%10856 = add nsw i32 %10855, 6
store i32 %10856, i32* %3
%10857 = load i32, i32* %3
%10858 = mul nsw i32 %10857, 10
store i32 %10858, i32* %3
%10859 = load i32, i32* %3
%10860 = add nsw i32 %10859, 1
store i32 %10860, i32* %3
%10861 = load i32, i32* %3
%10862 = mul nsw i32 %10861, 2
store i32 %10862, i32* %3
%10863 = load i32, i32* %3
%10864 = sub nsw i32 %10863, 1
store i32 %10864, i32* %3
%10865 = load i32, i32* %3
%10866 = and i32 %10865, -1044481
store i32 %10866, i32* %3
%10867 = load i32, i32* %3
%10868 = xor i32 %10867, 81954
store i32 %10868, i32* %3
%10869 = load i32, i32* %3
%10870 = srem i32 %10869, 268435443
store i32 %10870, i32* %3
%10871 = load i32, i32* %3
%10872 = add nsw i32 %10871, 6
store i32 %10872, i32* %3
%10873 = load i32, i32* %3
%10874 = mul nsw i32 %10873, 10
store i32 %10874, i32* %3
%10875 = load i32, i32* %3
%10876 = add nsw i32 %10875, 1
store i32 %10876, i32* %3
%10877 = load i32, i32* %3
%10878 = mul nsw i32 %10877, 2
store i32 %10878, i32* %3
%10879 = load i32, i32* %3
%10880 = sub nsw i32 %10879, 1
store i32 %10880, i32* %3
%10881 = load i32, i32* %3
%10882 = and i32 %10881, -1044481
store i32 %10882, i32* %3
%10883 = load i32, i32* %3
%10884 = xor i32 %10883, 81954
store i32 %10884, i32* %3
%10885 = load i32, i32* %3
%10886 = srem i32 %10885, 268435443
store i32 %10886, i32* %3
%10887 = load i32, i32* %3
%10888 = add nsw i32 %10887, 6
store i32 %10888, i32* %3
%10889 = load i32, i32* %3
%10890 = mul nsw i32 %10889, 10
store i32 %10890, i32* %3
%10891 = load i32, i32* %3
%10892 = add nsw i32 %10891, 1
store i32 %10892, i32* %3
%10893 = load i32, i32* %3
%10894 = mul nsw i32 %10893, 2
store i32 %10894, i32* %3
%10895 = load i32, i32* %3
%10896 = sub nsw i32 %10895, 1
store i32 %10896, i32* %3
%10897 = load i32, i32* %3
%10898 = and i32 %10897, -1044481
store i32 %10898, i32* %3
%10899 = load i32, i32* %3
%10900 = xor i32 %10899, 81954
store i32 %10900, i32* %3
%10901 = load i32, i32* %3
%10902 = srem i32 %10901, 268435443
store i32 %10902, i32* %3
%10903 = load i32, i32* %3
%10904 = add nsw i32 %10903, 6
store i32 %10904, i32* %3
%10905 = load i32, i32* %3
%10906 = mul nsw i32 %10905, 10
store i32 %10906, i32* %3
%10907 = load i32, i32* %3
%10908 = add nsw i32 %10907, 1
store i32 %10908, i32* %3
%10909 = load i32, i32* %3
%10910 = mul nsw i32 %10909, 2
store i32 %10910, i32* %3
%10911 = load i32, i32* %3
%10912 = sub nsw i32 %10911, 1
store i32 %10912, i32* %3
%10913 = load i32, i32* %3
%10914 = and i32 %10913, -1044481
store i32 %10914, i32* %3
%10915 = load i32, i32* %3
%10916 = xor i32 %10915, 81954
store i32 %10916, i32* %3
%10917 = load i32, i32* %3
%10918 = srem i32 %10917, 268435443
store i32 %10918, i32* %3
%10919 = load i32, i32* %3
%10920 = add nsw i32 %10919, 6
store i32 %10920, i32* %3
%10921 = load i32, i32* %3
%10922 = mul nsw i32 %10921, 10
store i32 %10922, i32* %3
%10923 = load i32, i32* %3
%10924 = add nsw i32 %10923, 1
store i32 %10924, i32* %3
%10925 = load i32, i32* %3
%10926 = mul nsw i32 %10925, 2
store i32 %10926, i32* %3
%10927 = load i32, i32* %3
%10928 = sub nsw i32 %10927, 1
store i32 %10928, i32* %3
%10929 = load i32, i32* %3
%10930 = and i32 %10929, -1044481
store i32 %10930, i32* %3
%10931 = load i32, i32* %3
%10932 = xor i32 %10931, 81954
store i32 %10932, i32* %3
%10933 = load i32, i32* %3
%10934 = srem i32 %10933, 268435443
store i32 %10934, i32* %3
%10935 = load i32, i32* %3
%10936 = add nsw i32 %10935, 6
store i32 %10936, i32* %3
%10937 = load i32, i32* %3
%10938 = mul nsw i32 %10937, 10
store i32 %10938, i32* %3
%10939 = load i32, i32* %3
%10940 = add nsw i32 %10939, 1
store i32 %10940, i32* %3
%10941 = load i32, i32* %3
%10942 = mul nsw i32 %10941, 2
store i32 %10942, i32* %3
%10943 = load i32, i32* %3
%10944 = sub nsw i32 %10943, 1
store i32 %10944, i32* %3
%10945 = load i32, i32* %3
%10946 = and i32 %10945, -1044481
store i32 %10946, i32* %3
%10947 = load i32, i32* %3
%10948 = xor i32 %10947, 81954
store i32 %10948, i32* %3
%10949 = load i32, i32* %3
%10950 = srem i32 %10949, 268435443
store i32 %10950, i32* %3
%10951 = load i32, i32* %3
%10952 = add nsw i32 %10951, 6
store i32 %10952, i32* %3
%10953 = load i32, i32* %3
%10954 = mul nsw i32 %10953, 10
store i32 %10954, i32* %3
%10955 = load i32, i32* %3
%10956 = add nsw i32 %10955, 1
store i32 %10956, i32* %3
%10957 = load i32, i32* %3
%10958 = mul nsw i32 %10957, 2
store i32 %10958, i32* %3
%10959 = load i32, i32* %3
%10960 = sub nsw i32 %10959, 1
store i32 %10960, i32* %3
%10961 = load i32, i32* %3
%10962 = and i32 %10961, -1044481
store i32 %10962, i32* %3
%10963 = load i32, i32* %3
%10964 = xor i32 %10963, 81954
store i32 %10964, i32* %3
%10965 = load i32, i32* %3
%10966 = srem i32 %10965, 268435443
store i32 %10966, i32* %3
%10967 = load i32, i32* %3
%10968 = add nsw i32 %10967, 6
store i32 %10968, i32* %3
%10969 = load i32, i32* %3
%10970 = mul nsw i32 %10969, 10
store i32 %10970, i32* %3
%10971 = load i32, i32* %3
%10972 = add nsw i32 %10971, 1
store i32 %10972, i32* %3
%10973 = load i32, i32* %3
%10974 = mul nsw i32 %10973, 2
store i32 %10974, i32* %3
%10975 = load i32, i32* %3
%10976 = sub nsw i32 %10975, 1
store i32 %10976, i32* %3
%10977 = load i32, i32* %3
%10978 = and i32 %10977, -1044481
store i32 %10978, i32* %3
%10979 = load i32, i32* %3
%10980 = xor i32 %10979, 81954
store i32 %10980, i32* %3
%10981 = load i32, i32* %3
%10982 = srem i32 %10981, 268435443
store i32 %10982, i32* %3
%10983 = load i32, i32* %3
%10984 = add nsw i32 %10983, 6
store i32 %10984, i32* %3
%10985 = load i32, i32* %3
%10986 = mul nsw i32 %10985, 10
store i32 %10986, i32* %3
%10987 = load i32, i32* %3
%10988 = add nsw i32 %10987, 1
store i32 %10988, i32* %3
%10989 = load i32, i32* %3
%10990 = mul nsw i32 %10989, 2
store i32 %10990, i32* %3
%10991 = load i32, i32* %3
%10992 = sub nsw i32 %10991, 1
store i32 %10992, i32* %3
%10993 = load i32, i32* %3
%10994 = and i32 %10993, -1044481
store i32 %10994, i32* %3
%10995 = load i32, i32* %3
%10996 = xor i32 %10995, 81954
store i32 %10996, i32* %3
%10997 = load i32, i32* %3
%10998 = srem i32 %10997, 268435443
store i32 %10998, i32* %3
%10999 = load i32, i32* %3
%11000 = add nsw i32 %10999, 6
store i32 %11000, i32* %3
%11001 = load i32, i32* %3
%11002 = mul nsw i32 %11001, 10
store i32 %11002, i32* %3
%11003 = load i32, i32* %3
%11004 = add nsw i32 %11003, 1
store i32 %11004, i32* %3
%11005 = load i32, i32* %3
%11006 = mul nsw i32 %11005, 2
store i32 %11006, i32* %3
%11007 = load i32, i32* %3
%11008 = sub nsw i32 %11007, 1
store i32 %11008, i32* %3
%11009 = load i32, i32* %3
%11010 = and i32 %11009, -1044481
store i32 %11010, i32* %3
%11011 = load i32, i32* %3
%11012 = xor i32 %11011, 81954
store i32 %11012, i32* %3
%11013 = load i32, i32* %3
%11014 = srem i32 %11013, 268435443
store i32 %11014, i32* %3
%11015 = load i32, i32* %3
%11016 = add nsw i32 %11015, 6
store i32 %11016, i32* %3
%11017 = load i32, i32* %3
%11018 = mul nsw i32 %11017, 10
store i32 %11018, i32* %3
%11019 = load i32, i32* %3
%11020 = add nsw i32 %11019, 1
store i32 %11020, i32* %3
%11021 = load i32, i32* %3
%11022 = mul nsw i32 %11021, 2
store i32 %11022, i32* %3
%11023 = load i32, i32* %3
%11024 = sub nsw i32 %11023, 1
store i32 %11024, i32* %3
%11025 = load i32, i32* %3
%11026 = and i32 %11025, -1044481
store i32 %11026, i32* %3
%11027 = load i32, i32* %3
%11028 = xor i32 %11027, 81954
store i32 %11028, i32* %3
%11029 = load i32, i32* %3
%11030 = srem i32 %11029, 268435443
store i32 %11030, i32* %3
%11031 = load i32, i32* %3
%11032 = add nsw i32 %11031, 6
store i32 %11032, i32* %3
%11033 = load i32, i32* %3
%11034 = mul nsw i32 %11033, 10
store i32 %11034, i32* %3
%11035 = load i32, i32* %3
%11036 = add nsw i32 %11035, 1
store i32 %11036, i32* %3
%11037 = load i32, i32* %3
%11038 = mul nsw i32 %11037, 2
store i32 %11038, i32* %3
%11039 = load i32, i32* %3
%11040 = sub nsw i32 %11039, 1
store i32 %11040, i32* %3
%11041 = load i32, i32* %3
%11042 = and i32 %11041, -1044481
store i32 %11042, i32* %3
%11043 = load i32, i32* %3
%11044 = xor i32 %11043, 81954
store i32 %11044, i32* %3
%11045 = load i32, i32* %3
%11046 = srem i32 %11045, 268435443
store i32 %11046, i32* %3
%11047 = load i32, i32* %3
%11048 = add nsw i32 %11047, 6
store i32 %11048, i32* %3
%11049 = load i32, i32* %3
%11050 = mul nsw i32 %11049, 10
store i32 %11050, i32* %3
%11051 = load i32, i32* %3
%11052 = add nsw i32 %11051, 1
store i32 %11052, i32* %3
%11053 = load i32, i32* %3
%11054 = mul nsw i32 %11053, 2
store i32 %11054, i32* %3
%11055 = load i32, i32* %3
%11056 = sub nsw i32 %11055, 1
store i32 %11056, i32* %3
%11057 = load i32, i32* %3
%11058 = and i32 %11057, -1044481
store i32 %11058, i32* %3
%11059 = load i32, i32* %3
%11060 = xor i32 %11059, 81954
store i32 %11060, i32* %3
%11061 = load i32, i32* %3
%11062 = srem i32 %11061, 268435443
store i32 %11062, i32* %3
%11063 = load i32, i32* %3
%11064 = add nsw i32 %11063, 6
store i32 %11064, i32* %3
%11065 = load i32, i32* %3
%11066 = mul nsw i32 %11065, 10
store i32 %11066, i32* %3
%11067 = load i32, i32* %3
%11068 = add nsw i32 %11067, 1
store i32 %11068, i32* %3
%11069 = load i32, i32* %3
%11070 = mul nsw i32 %11069, 2
store i32 %11070, i32* %3
%11071 = load i32, i32* %3
%11072 = sub nsw i32 %11071, 1
store i32 %11072, i32* %3
%11073 = load i32, i32* %3
%11074 = and i32 %11073, -1044481
store i32 %11074, i32* %3
%11075 = load i32, i32* %3
%11076 = xor i32 %11075, 81954
store i32 %11076, i32* %3
%11077 = load i32, i32* %3
%11078 = srem i32 %11077, 268435443
store i32 %11078, i32* %3
%11079 = load i32, i32* %3
%11080 = add nsw i32 %11079, 6
store i32 %11080, i32* %3
%11081 = load i32, i32* %3
%11082 = mul nsw i32 %11081, 10
store i32 %11082, i32* %3
%11083 = load i32, i32* %3
%11084 = add nsw i32 %11083, 1
store i32 %11084, i32* %3
%11085 = load i32, i32* %3
%11086 = mul nsw i32 %11085, 2
store i32 %11086, i32* %3
%11087 = load i32, i32* %3
%11088 = sub nsw i32 %11087, 1
store i32 %11088, i32* %3
%11089 = load i32, i32* %3
%11090 = and i32 %11089, -1044481
store i32 %11090, i32* %3
%11091 = load i32, i32* %3
%11092 = xor i32 %11091, 81954
store i32 %11092, i32* %3
%11093 = load i32, i32* %3
%11094 = srem i32 %11093, 268435443
store i32 %11094, i32* %3
%11095 = load i32, i32* %3
%11096 = add nsw i32 %11095, 6
store i32 %11096, i32* %3
%11097 = load i32, i32* %3
%11098 = mul nsw i32 %11097, 10
store i32 %11098, i32* %3
%11099 = load i32, i32* %3
%11100 = add nsw i32 %11099, 1
store i32 %11100, i32* %3
%11101 = load i32, i32* %3
%11102 = mul nsw i32 %11101, 2
store i32 %11102, i32* %3
%11103 = load i32, i32* %3
%11104 = sub nsw i32 %11103, 1
store i32 %11104, i32* %3
%11105 = load i32, i32* %3
%11106 = and i32 %11105, -1044481
store i32 %11106, i32* %3
%11107 = load i32, i32* %3
%11108 = xor i32 %11107, 81954
store i32 %11108, i32* %3
%11109 = load i32, i32* %3
%11110 = srem i32 %11109, 268435443
store i32 %11110, i32* %3
%11111 = load i32, i32* %3
%11112 = add nsw i32 %11111, 6
store i32 %11112, i32* %3
%11113 = load i32, i32* %3
%11114 = mul nsw i32 %11113, 10
store i32 %11114, i32* %3
%11115 = load i32, i32* %3
%11116 = add nsw i32 %11115, 1
store i32 %11116, i32* %3
%11117 = load i32, i32* %3
%11118 = mul nsw i32 %11117, 2
store i32 %11118, i32* %3
%11119 = load i32, i32* %3
%11120 = sub nsw i32 %11119, 1
store i32 %11120, i32* %3
%11121 = load i32, i32* %3
%11122 = and i32 %11121, -1044481
store i32 %11122, i32* %3
%11123 = load i32, i32* %3
%11124 = xor i32 %11123, 81954
store i32 %11124, i32* %3
%11125 = load i32, i32* %3
%11126 = srem i32 %11125, 268435443
store i32 %11126, i32* %3
%11127 = load i32, i32* %3
%11128 = add nsw i32 %11127, 6
store i32 %11128, i32* %3
%11129 = load i32, i32* %3
%11130 = mul nsw i32 %11129, 10
store i32 %11130, i32* %3
%11131 = load i32, i32* %3
%11132 = add nsw i32 %11131, 1
store i32 %11132, i32* %3
%11133 = load i32, i32* %3
%11134 = mul nsw i32 %11133, 2
store i32 %11134, i32* %3
%11135 = load i32, i32* %3
%11136 = sub nsw i32 %11135, 1
store i32 %11136, i32* %3
%11137 = load i32, i32* %3
%11138 = and i32 %11137, -1044481
store i32 %11138, i32* %3
%11139 = load i32, i32* %3
%11140 = xor i32 %11139, 81954
store i32 %11140, i32* %3
%11141 = load i32, i32* %3
%11142 = srem i32 %11141, 268435443
store i32 %11142, i32* %3
%11143 = load i32, i32* %3
%11144 = add nsw i32 %11143, 6
store i32 %11144, i32* %3
%11145 = load i32, i32* %3
%11146 = mul nsw i32 %11145, 10
store i32 %11146, i32* %3
%11147 = load i32, i32* %3
%11148 = add nsw i32 %11147, 1
store i32 %11148, i32* %3
%11149 = load i32, i32* %3
%11150 = mul nsw i32 %11149, 2
store i32 %11150, i32* %3
%11151 = load i32, i32* %3
%11152 = sub nsw i32 %11151, 1
store i32 %11152, i32* %3
%11153 = load i32, i32* %3
%11154 = and i32 %11153, -1044481
store i32 %11154, i32* %3
%11155 = load i32, i32* %3
%11156 = xor i32 %11155, 81954
store i32 %11156, i32* %3
%11157 = load i32, i32* %3
%11158 = srem i32 %11157, 268435443
store i32 %11158, i32* %3
%11159 = load i32, i32* %3
%11160 = add nsw i32 %11159, 6
store i32 %11160, i32* %3
%11161 = load i32, i32* %3
%11162 = mul nsw i32 %11161, 10
store i32 %11162, i32* %3
%11163 = load i32, i32* %3
%11164 = add nsw i32 %11163, 1
store i32 %11164, i32* %3
%11165 = load i32, i32* %3
%11166 = mul nsw i32 %11165, 2
store i32 %11166, i32* %3
%11167 = load i32, i32* %3
%11168 = sub nsw i32 %11167, 1
store i32 %11168, i32* %3
%11169 = load i32, i32* %3
%11170 = and i32 %11169, -1044481
store i32 %11170, i32* %3
%11171 = load i32, i32* %3
%11172 = xor i32 %11171, 81954
store i32 %11172, i32* %3
%11173 = load i32, i32* %3
%11174 = srem i32 %11173, 268435443
store i32 %11174, i32* %3
%11175 = load i32, i32* %3
%11176 = add nsw i32 %11175, 6
store i32 %11176, i32* %3
%11177 = load i32, i32* %3
%11178 = mul nsw i32 %11177, 10
store i32 %11178, i32* %3
%11179 = load i32, i32* %3
%11180 = add nsw i32 %11179, 1
store i32 %11180, i32* %3
%11181 = load i32, i32* %3
%11182 = mul nsw i32 %11181, 2
store i32 %11182, i32* %3
%11183 = load i32, i32* %3
%11184 = sub nsw i32 %11183, 1
store i32 %11184, i32* %3
%11185 = load i32, i32* %3
%11186 = and i32 %11185, -1044481
store i32 %11186, i32* %3
%11187 = load i32, i32* %3
%11188 = xor i32 %11187, 81954
store i32 %11188, i32* %3
%11189 = load i32, i32* %3
%11190 = srem i32 %11189, 268435443
store i32 %11190, i32* %3
%11191 = load i32, i32* %3
%11192 = add nsw i32 %11191, 6
store i32 %11192, i32* %3
%11193 = load i32, i32* %3
%11194 = mul nsw i32 %11193, 10
store i32 %11194, i32* %3
%11195 = load i32, i32* %3
%11196 = add nsw i32 %11195, 1
store i32 %11196, i32* %3
%11197 = load i32, i32* %3
%11198 = mul nsw i32 %11197, 2
store i32 %11198, i32* %3
%11199 = load i32, i32* %3
%11200 = sub nsw i32 %11199, 1
store i32 %11200, i32* %3
%11201 = load i32, i32* %3
%11202 = and i32 %11201, -1044481
store i32 %11202, i32* %3
%11203 = load i32, i32* %3
%11204 = xor i32 %11203, 81954
store i32 %11204, i32* %3
%11205 = load i32, i32* %3
%11206 = srem i32 %11205, 268435443
store i32 %11206, i32* %3
%11207 = load i32, i32* %3
%11208 = add nsw i32 %11207, 6
store i32 %11208, i32* %3
%11209 = load i32, i32* %3
%11210 = mul nsw i32 %11209, 10
store i32 %11210, i32* %3
%11211 = load i32, i32* %3
%11212 = add nsw i32 %11211, 1
store i32 %11212, i32* %3
%11213 = load i32, i32* %3
%11214 = mul nsw i32 %11213, 2
store i32 %11214, i32* %3
%11215 = load i32, i32* %3
%11216 = sub nsw i32 %11215, 1
store i32 %11216, i32* %3
%11217 = load i32, i32* %3
%11218 = and i32 %11217, -1044481
store i32 %11218, i32* %3
%11219 = load i32, i32* %3
%11220 = xor i32 %11219, 81954
store i32 %11220, i32* %3
%11221 = load i32, i32* %3
%11222 = srem i32 %11221, 268435443
store i32 %11222, i32* %3
%11223 = load i32, i32* %3
%11224 = add nsw i32 %11223, 6
store i32 %11224, i32* %3
%11225 = load i32, i32* %3
%11226 = mul nsw i32 %11225, 10
store i32 %11226, i32* %3
%11227 = load i32, i32* %3
%11228 = add nsw i32 %11227, 1
store i32 %11228, i32* %3
%11229 = load i32, i32* %3
%11230 = mul nsw i32 %11229, 2
store i32 %11230, i32* %3
%11231 = load i32, i32* %3
%11232 = sub nsw i32 %11231, 1
store i32 %11232, i32* %3
%11233 = load i32, i32* %3
%11234 = and i32 %11233, -1044481
store i32 %11234, i32* %3
%11235 = load i32, i32* %3
%11236 = xor i32 %11235, 81954
store i32 %11236, i32* %3
%11237 = load i32, i32* %3
%11238 = srem i32 %11237, 268435443
store i32 %11238, i32* %3
%11239 = load i32, i32* %3
%11240 = add nsw i32 %11239, 6
store i32 %11240, i32* %3
%11241 = load i32, i32* %3
%11242 = mul nsw i32 %11241, 10
store i32 %11242, i32* %3
%11243 = load i32, i32* %3
%11244 = add nsw i32 %11243, 1
store i32 %11244, i32* %3
%11245 = load i32, i32* %3
%11246 = mul nsw i32 %11245, 2
store i32 %11246, i32* %3
%11247 = load i32, i32* %3
%11248 = sub nsw i32 %11247, 1
store i32 %11248, i32* %3
%11249 = load i32, i32* %3
%11250 = and i32 %11249, -1044481
store i32 %11250, i32* %3
%11251 = load i32, i32* %3
%11252 = xor i32 %11251, 81954
store i32 %11252, i32* %3
%11253 = load i32, i32* %3
%11254 = srem i32 %11253, 268435443
store i32 %11254, i32* %3
%11255 = load i32, i32* %3
%11256 = add nsw i32 %11255, 6
store i32 %11256, i32* %3
%11257 = load i32, i32* %3
%11258 = mul nsw i32 %11257, 10
store i32 %11258, i32* %3
%11259 = load i32, i32* %3
%11260 = add nsw i32 %11259, 1
store i32 %11260, i32* %3
%11261 = load i32, i32* %3
%11262 = mul nsw i32 %11261, 2
store i32 %11262, i32* %3
%11263 = load i32, i32* %3
%11264 = sub nsw i32 %11263, 1
store i32 %11264, i32* %3
%11265 = load i32, i32* %3
%11266 = and i32 %11265, -1044481
store i32 %11266, i32* %3
%11267 = load i32, i32* %3
%11268 = xor i32 %11267, 81954
store i32 %11268, i32* %3
%11269 = load i32, i32* %3
%11270 = srem i32 %11269, 268435443
store i32 %11270, i32* %3
%11271 = load i32, i32* %3
%11272 = add nsw i32 %11271, 6
store i32 %11272, i32* %3
%11273 = load i32, i32* %3
%11274 = mul nsw i32 %11273, 10
store i32 %11274, i32* %3
%11275 = load i32, i32* %3
%11276 = add nsw i32 %11275, 1
store i32 %11276, i32* %3
%11277 = load i32, i32* %3
%11278 = mul nsw i32 %11277, 2
store i32 %11278, i32* %3
%11279 = load i32, i32* %3
%11280 = sub nsw i32 %11279, 1
store i32 %11280, i32* %3
%11281 = load i32, i32* %3
%11282 = and i32 %11281, -1044481
store i32 %11282, i32* %3
%11283 = load i32, i32* %3
%11284 = xor i32 %11283, 81954
store i32 %11284, i32* %3
%11285 = load i32, i32* %3
%11286 = srem i32 %11285, 268435443
store i32 %11286, i32* %3
%11287 = load i32, i32* %3
%11288 = add nsw i32 %11287, 6
store i32 %11288, i32* %3
%11289 = load i32, i32* %3
%11290 = mul nsw i32 %11289, 10
store i32 %11290, i32* %3
%11291 = load i32, i32* %3
%11292 = add nsw i32 %11291, 1
store i32 %11292, i32* %3
%11293 = load i32, i32* %3
%11294 = mul nsw i32 %11293, 2
store i32 %11294, i32* %3
%11295 = load i32, i32* %3
%11296 = sub nsw i32 %11295, 1
store i32 %11296, i32* %3
%11297 = load i32, i32* %3
%11298 = and i32 %11297, -1044481
store i32 %11298, i32* %3
%11299 = load i32, i32* %3
%11300 = xor i32 %11299, 81954
store i32 %11300, i32* %3
%11301 = load i32, i32* %3
%11302 = srem i32 %11301, 268435443
store i32 %11302, i32* %3
%11303 = load i32, i32* %3
%11304 = add nsw i32 %11303, 6
store i32 %11304, i32* %3
%11305 = load i32, i32* %3
%11306 = mul nsw i32 %11305, 10
store i32 %11306, i32* %3
%11307 = load i32, i32* %3
%11308 = add nsw i32 %11307, 1
store i32 %11308, i32* %3
%11309 = load i32, i32* %3
%11310 = mul nsw i32 %11309, 2
store i32 %11310, i32* %3
%11311 = load i32, i32* %3
%11312 = sub nsw i32 %11311, 1
store i32 %11312, i32* %3
%11313 = load i32, i32* %3
%11314 = and i32 %11313, -1044481
store i32 %11314, i32* %3
%11315 = load i32, i32* %3
%11316 = xor i32 %11315, 81954
store i32 %11316, i32* %3
%11317 = load i32, i32* %3
%11318 = srem i32 %11317, 268435443
store i32 %11318, i32* %3
%11319 = load i32, i32* %3
%11320 = add nsw i32 %11319, 6
store i32 %11320, i32* %3
%11321 = load i32, i32* %3
%11322 = mul nsw i32 %11321, 10
store i32 %11322, i32* %3
%11323 = load i32, i32* %3
%11324 = add nsw i32 %11323, 1
store i32 %11324, i32* %3
%11325 = load i32, i32* %3
%11326 = mul nsw i32 %11325, 2
store i32 %11326, i32* %3
%11327 = load i32, i32* %3
%11328 = sub nsw i32 %11327, 1
store i32 %11328, i32* %3
%11329 = load i32, i32* %3
%11330 = and i32 %11329, -1044481
store i32 %11330, i32* %3
%11331 = load i32, i32* %3
%11332 = xor i32 %11331, 81954
store i32 %11332, i32* %3
%11333 = load i32, i32* %3
%11334 = srem i32 %11333, 268435443
store i32 %11334, i32* %3
%11335 = load i32, i32* %3
%11336 = add nsw i32 %11335, 6
store i32 %11336, i32* %3
%11337 = load i32, i32* %3
%11338 = mul nsw i32 %11337, 10
store i32 %11338, i32* %3
%11339 = load i32, i32* %3
%11340 = add nsw i32 %11339, 1
store i32 %11340, i32* %3
%11341 = load i32, i32* %3
%11342 = mul nsw i32 %11341, 2
store i32 %11342, i32* %3
%11343 = load i32, i32* %3
%11344 = sub nsw i32 %11343, 1
store i32 %11344, i32* %3
%11345 = load i32, i32* %3
%11346 = and i32 %11345, -1044481
store i32 %11346, i32* %3
%11347 = load i32, i32* %3
%11348 = xor i32 %11347, 81954
store i32 %11348, i32* %3
%11349 = load i32, i32* %3
%11350 = srem i32 %11349, 268435443
store i32 %11350, i32* %3
%11351 = load i32, i32* %3
%11352 = add nsw i32 %11351, 6
store i32 %11352, i32* %3
%11353 = load i32, i32* %3
%11354 = mul nsw i32 %11353, 10
store i32 %11354, i32* %3
%11355 = load i32, i32* %3
%11356 = add nsw i32 %11355, 1
store i32 %11356, i32* %3
%11357 = load i32, i32* %3
%11358 = mul nsw i32 %11357, 2
store i32 %11358, i32* %3
%11359 = load i32, i32* %3
%11360 = sub nsw i32 %11359, 1
store i32 %11360, i32* %3
%11361 = load i32, i32* %3
%11362 = and i32 %11361, -1044481
store i32 %11362, i32* %3
%11363 = load i32, i32* %3
%11364 = xor i32 %11363, 81954
store i32 %11364, i32* %3
%11365 = load i32, i32* %3
%11366 = srem i32 %11365, 268435443
store i32 %11366, i32* %3
%11367 = load i32, i32* %3
%11368 = add nsw i32 %11367, 6
store i32 %11368, i32* %3
%11369 = load i32, i32* %3
%11370 = mul nsw i32 %11369, 10
store i32 %11370, i32* %3
%11371 = load i32, i32* %3
%11372 = add nsw i32 %11371, 1
store i32 %11372, i32* %3
%11373 = load i32, i32* %3
%11374 = mul nsw i32 %11373, 2
store i32 %11374, i32* %3
%11375 = load i32, i32* %3
%11376 = sub nsw i32 %11375, 1
store i32 %11376, i32* %3
%11377 = load i32, i32* %3
%11378 = and i32 %11377, -1044481
store i32 %11378, i32* %3
%11379 = load i32, i32* %3
%11380 = xor i32 %11379, 81954
store i32 %11380, i32* %3
%11381 = load i32, i32* %3
%11382 = srem i32 %11381, 268435443
store i32 %11382, i32* %3
%11383 = load i32, i32* %3
%11384 = add nsw i32 %11383, 6
store i32 %11384, i32* %3
%11385 = load i32, i32* %3
%11386 = mul nsw i32 %11385, 10
store i32 %11386, i32* %3
%11387 = load i32, i32* %3
%11388 = add nsw i32 %11387, 1
store i32 %11388, i32* %3
%11389 = load i32, i32* %3
%11390 = mul nsw i32 %11389, 2
store i32 %11390, i32* %3
%11391 = load i32, i32* %3
%11392 = sub nsw i32 %11391, 1
store i32 %11392, i32* %3
%11393 = load i32, i32* %3
%11394 = and i32 %11393, -1044481
store i32 %11394, i32* %3
%11395 = load i32, i32* %3
%11396 = xor i32 %11395, 81954
store i32 %11396, i32* %3
%11397 = load i32, i32* %3
%11398 = srem i32 %11397, 268435443
store i32 %11398, i32* %3
%11399 = load i32, i32* %3
%11400 = add nsw i32 %11399, 6
store i32 %11400, i32* %3
%11401 = load i32, i32* %3
%11402 = mul nsw i32 %11401, 10
store i32 %11402, i32* %3
%11403 = load i32, i32* %3
%11404 = add nsw i32 %11403, 1
store i32 %11404, i32* %3
%11405 = load i32, i32* %3
%11406 = mul nsw i32 %11405, 2
store i32 %11406, i32* %3
%11407 = load i32, i32* %3
%11408 = sub nsw i32 %11407, 1
store i32 %11408, i32* %3
%11409 = load i32, i32* %3
%11410 = and i32 %11409, -1044481
store i32 %11410, i32* %3
%11411 = load i32, i32* %3
%11412 = xor i32 %11411, 81954
store i32 %11412, i32* %3
%11413 = load i32, i32* %3
%11414 = srem i32 %11413, 268435443
store i32 %11414, i32* %3
%11415 = load i32, i32* %3
%11416 = add nsw i32 %11415, 6
store i32 %11416, i32* %3
%11417 = load i32, i32* %3
%11418 = mul nsw i32 %11417, 10
store i32 %11418, i32* %3
%11419 = load i32, i32* %3
%11420 = add nsw i32 %11419, 1
store i32 %11420, i32* %3
%11421 = load i32, i32* %3
%11422 = mul nsw i32 %11421, 2
store i32 %11422, i32* %3
%11423 = load i32, i32* %3
%11424 = sub nsw i32 %11423, 1
store i32 %11424, i32* %3
%11425 = load i32, i32* %3
%11426 = and i32 %11425, -1044481
store i32 %11426, i32* %3
%11427 = load i32, i32* %3
%11428 = xor i32 %11427, 81954
store i32 %11428, i32* %3
%11429 = load i32, i32* %3
%11430 = srem i32 %11429, 268435443
store i32 %11430, i32* %3
%11431 = load i32, i32* %3
%11432 = add nsw i32 %11431, 6
store i32 %11432, i32* %3
%11433 = load i32, i32* %3
%11434 = mul nsw i32 %11433, 10
store i32 %11434, i32* %3
%11435 = load i32, i32* %3
%11436 = add nsw i32 %11435, 1
store i32 %11436, i32* %3
%11437 = load i32, i32* %3
%11438 = mul nsw i32 %11437, 2
store i32 %11438, i32* %3
%11439 = load i32, i32* %3
%11440 = sub nsw i32 %11439, 1
store i32 %11440, i32* %3
%11441 = load i32, i32* %3
%11442 = and i32 %11441, -1044481
store i32 %11442, i32* %3
%11443 = load i32, i32* %3
%11444 = xor i32 %11443, 81954
store i32 %11444, i32* %3
%11445 = load i32, i32* %3
%11446 = srem i32 %11445, 268435443
store i32 %11446, i32* %3
%11447 = load i32, i32* %3
%11448 = add nsw i32 %11447, 6
store i32 %11448, i32* %3
%11449 = load i32, i32* %3
%11450 = mul nsw i32 %11449, 10
store i32 %11450, i32* %3
%11451 = load i32, i32* %3
%11452 = add nsw i32 %11451, 1
store i32 %11452, i32* %3
%11453 = load i32, i32* %3
%11454 = mul nsw i32 %11453, 2
store i32 %11454, i32* %3
%11455 = load i32, i32* %3
%11456 = sub nsw i32 %11455, 1
store i32 %11456, i32* %3
%11457 = load i32, i32* %3
%11458 = and i32 %11457, -1044481
store i32 %11458, i32* %3
%11459 = load i32, i32* %3
%11460 = xor i32 %11459, 81954
store i32 %11460, i32* %3
%11461 = load i32, i32* %3
%11462 = srem i32 %11461, 268435443
store i32 %11462, i32* %3
%11463 = load i32, i32* %3
%11464 = add nsw i32 %11463, 6
store i32 %11464, i32* %3
%11465 = load i32, i32* %3
%11466 = mul nsw i32 %11465, 10
store i32 %11466, i32* %3
%11467 = load i32, i32* %3
%11468 = add nsw i32 %11467, 1
store i32 %11468, i32* %3
%11469 = load i32, i32* %3
%11470 = mul nsw i32 %11469, 2
store i32 %11470, i32* %3
%11471 = load i32, i32* %3
%11472 = sub nsw i32 %11471, 1
store i32 %11472, i32* %3
%11473 = load i32, i32* %3
%11474 = and i32 %11473, -1044481
store i32 %11474, i32* %3
%11475 = load i32, i32* %3
%11476 = xor i32 %11475, 81954
store i32 %11476, i32* %3
%11477 = load i32, i32* %3
%11478 = srem i32 %11477, 268435443
store i32 %11478, i32* %3
%11479 = load i32, i32* %3
%11480 = add nsw i32 %11479, 6
store i32 %11480, i32* %3
%11481 = load i32, i32* %3
%11482 = mul nsw i32 %11481, 10
store i32 %11482, i32* %3
%11483 = load i32, i32* %3
%11484 = add nsw i32 %11483, 1
store i32 %11484, i32* %3
%11485 = load i32, i32* %3
%11486 = mul nsw i32 %11485, 2
store i32 %11486, i32* %3
%11487 = load i32, i32* %3
%11488 = sub nsw i32 %11487, 1
store i32 %11488, i32* %3
%11489 = load i32, i32* %3
%11490 = and i32 %11489, -1044481
store i32 %11490, i32* %3
%11491 = load i32, i32* %3
%11492 = xor i32 %11491, 81954
store i32 %11492, i32* %3
%11493 = load i32, i32* %3
%11494 = srem i32 %11493, 268435443
store i32 %11494, i32* %3
%11495 = load i32, i32* %3
%11496 = add nsw i32 %11495, 6
store i32 %11496, i32* %3
%11497 = load i32, i32* %3
%11498 = mul nsw i32 %11497, 10
store i32 %11498, i32* %3
%11499 = load i32, i32* %3
%11500 = add nsw i32 %11499, 1
store i32 %11500, i32* %3
%11501 = load i32, i32* %3
%11502 = mul nsw i32 %11501, 2
store i32 %11502, i32* %3
%11503 = load i32, i32* %3
%11504 = sub nsw i32 %11503, 1
store i32 %11504, i32* %3
%11505 = load i32, i32* %3
%11506 = and i32 %11505, -1044481
store i32 %11506, i32* %3
%11507 = load i32, i32* %3
%11508 = xor i32 %11507, 81954
store i32 %11508, i32* %3
%11509 = load i32, i32* %3
%11510 = srem i32 %11509, 268435443
store i32 %11510, i32* %3
%11511 = load i32, i32* %3
%11512 = add nsw i32 %11511, 6
store i32 %11512, i32* %3
%11513 = load i32, i32* %3
%11514 = mul nsw i32 %11513, 10
store i32 %11514, i32* %3
%11515 = load i32, i32* %3
%11516 = add nsw i32 %11515, 1
store i32 %11516, i32* %3
%11517 = load i32, i32* %3
%11518 = mul nsw i32 %11517, 2
store i32 %11518, i32* %3
%11519 = load i32, i32* %3
%11520 = sub nsw i32 %11519, 1
store i32 %11520, i32* %3
%11521 = load i32, i32* %3
%11522 = and i32 %11521, -1044481
store i32 %11522, i32* %3
%11523 = load i32, i32* %3
%11524 = xor i32 %11523, 81954
store i32 %11524, i32* %3
%11525 = load i32, i32* %3
%11526 = srem i32 %11525, 268435443
store i32 %11526, i32* %3
%11527 = load i32, i32* %3
%11528 = add nsw i32 %11527, 6
store i32 %11528, i32* %3
%11529 = load i32, i32* %3
%11530 = mul nsw i32 %11529, 10
store i32 %11530, i32* %3
%11531 = load i32, i32* %3
%11532 = add nsw i32 %11531, 1
store i32 %11532, i32* %3
%11533 = load i32, i32* %3
%11534 = mul nsw i32 %11533, 2
store i32 %11534, i32* %3
%11535 = load i32, i32* %3
%11536 = sub nsw i32 %11535, 1
store i32 %11536, i32* %3
%11537 = load i32, i32* %3
%11538 = and i32 %11537, -1044481
store i32 %11538, i32* %3
%11539 = load i32, i32* %3
%11540 = xor i32 %11539, 81954
store i32 %11540, i32* %3
%11541 = load i32, i32* %3
%11542 = srem i32 %11541, 268435443
store i32 %11542, i32* %3
%11543 = load i32, i32* %3
%11544 = add nsw i32 %11543, 6
store i32 %11544, i32* %3
%11545 = load i32, i32* %3
%11546 = mul nsw i32 %11545, 10
store i32 %11546, i32* %3
%11547 = load i32, i32* %3
%11548 = add nsw i32 %11547, 1
store i32 %11548, i32* %3
%11549 = load i32, i32* %3
%11550 = mul nsw i32 %11549, 2
store i32 %11550, i32* %3
%11551 = load i32, i32* %3
%11552 = sub nsw i32 %11551, 1
store i32 %11552, i32* %3
%11553 = load i32, i32* %3
%11554 = and i32 %11553, -1044481
store i32 %11554, i32* %3
%11555 = load i32, i32* %3
%11556 = xor i32 %11555, 81954
store i32 %11556, i32* %3
%11557 = load i32, i32* %3
%11558 = srem i32 %11557, 268435443
store i32 %11558, i32* %3
%11559 = load i32, i32* %3
%11560 = add nsw i32 %11559, 6
store i32 %11560, i32* %3
%11561 = load i32, i32* %3
%11562 = mul nsw i32 %11561, 10
store i32 %11562, i32* %3
%11563 = load i32, i32* %3
%11564 = add nsw i32 %11563, 1
store i32 %11564, i32* %3
%11565 = load i32, i32* %3
%11566 = mul nsw i32 %11565, 2
store i32 %11566, i32* %3
%11567 = load i32, i32* %3
%11568 = sub nsw i32 %11567, 1
store i32 %11568, i32* %3
%11569 = load i32, i32* %3
%11570 = and i32 %11569, -1044481
store i32 %11570, i32* %3
%11571 = load i32, i32* %3
%11572 = xor i32 %11571, 81954
store i32 %11572, i32* %3
%11573 = load i32, i32* %3
%11574 = srem i32 %11573, 268435443
store i32 %11574, i32* %3
%11575 = load i32, i32* %3
%11576 = add nsw i32 %11575, 6
store i32 %11576, i32* %3
%11577 = load i32, i32* %3
%11578 = mul nsw i32 %11577, 10
store i32 %11578, i32* %3
%11579 = load i32, i32* %3
%11580 = add nsw i32 %11579, 1
store i32 %11580, i32* %3
%11581 = load i32, i32* %3
%11582 = mul nsw i32 %11581, 2
store i32 %11582, i32* %3
%11583 = load i32, i32* %3
%11584 = sub nsw i32 %11583, 1
store i32 %11584, i32* %3
%11585 = load i32, i32* %3
%11586 = and i32 %11585, -1044481
store i32 %11586, i32* %3
%11587 = load i32, i32* %3
%11588 = xor i32 %11587, 81954
store i32 %11588, i32* %3
%11589 = load i32, i32* %3
%11590 = srem i32 %11589, 268435443
store i32 %11590, i32* %3
%11591 = load i32, i32* %3
%11592 = add nsw i32 %11591, 6
store i32 %11592, i32* %3
%11593 = load i32, i32* %3
%11594 = mul nsw i32 %11593, 10
store i32 %11594, i32* %3
%11595 = load i32, i32* %3
%11596 = add nsw i32 %11595, 1
store i32 %11596, i32* %3
%11597 = load i32, i32* %3
%11598 = mul nsw i32 %11597, 2
store i32 %11598, i32* %3
%11599 = load i32, i32* %3
%11600 = sub nsw i32 %11599, 1
store i32 %11600, i32* %3
%11601 = load i32, i32* %3
%11602 = and i32 %11601, -1044481
store i32 %11602, i32* %3
%11603 = load i32, i32* %3
%11604 = xor i32 %11603, 81954
store i32 %11604, i32* %3
%11605 = load i32, i32* %3
%11606 = srem i32 %11605, 268435443
store i32 %11606, i32* %3
%11607 = load i32, i32* %3
%11608 = add nsw i32 %11607, 6
store i32 %11608, i32* %3
%11609 = load i32, i32* %3
%11610 = mul nsw i32 %11609, 10
store i32 %11610, i32* %3
%11611 = load i32, i32* %3
%11612 = add nsw i32 %11611, 1
store i32 %11612, i32* %3
%11613 = load i32, i32* %3
%11614 = mul nsw i32 %11613, 2
store i32 %11614, i32* %3
%11615 = load i32, i32* %3
%11616 = sub nsw i32 %11615, 1
store i32 %11616, i32* %3
%11617 = load i32, i32* %3
%11618 = and i32 %11617, -1044481
store i32 %11618, i32* %3
%11619 = load i32, i32* %3
%11620 = xor i32 %11619, 81954
store i32 %11620, i32* %3
%11621 = load i32, i32* %3
%11622 = srem i32 %11621, 268435443
store i32 %11622, i32* %3
%11623 = load i32, i32* %3
%11624 = add nsw i32 %11623, 6
store i32 %11624, i32* %3
%11625 = load i32, i32* %3
%11626 = mul nsw i32 %11625, 10
store i32 %11626, i32* %3
%11627 = load i32, i32* %3
%11628 = add nsw i32 %11627, 1
store i32 %11628, i32* %3
%11629 = load i32, i32* %3
%11630 = mul nsw i32 %11629, 2
store i32 %11630, i32* %3
%11631 = load i32, i32* %3
%11632 = sub nsw i32 %11631, 1
store i32 %11632, i32* %3
%11633 = load i32, i32* %3
%11634 = and i32 %11633, -1044481
store i32 %11634, i32* %3
%11635 = load i32, i32* %3
%11636 = xor i32 %11635, 81954
store i32 %11636, i32* %3
%11637 = load i32, i32* %3
%11638 = srem i32 %11637, 268435443
store i32 %11638, i32* %3
%11639 = load i32, i32* %3
%11640 = add nsw i32 %11639, 6
store i32 %11640, i32* %3
%11641 = load i32, i32* %3
%11642 = mul nsw i32 %11641, 10
store i32 %11642, i32* %3
%11643 = load i32, i32* %3
%11644 = add nsw i32 %11643, 1
store i32 %11644, i32* %3
%11645 = load i32, i32* %3
%11646 = mul nsw i32 %11645, 2
store i32 %11646, i32* %3
%11647 = load i32, i32* %3
%11648 = sub nsw i32 %11647, 1
store i32 %11648, i32* %3
%11649 = load i32, i32* %3
%11650 = and i32 %11649, -1044481
store i32 %11650, i32* %3
%11651 = load i32, i32* %3
%11652 = xor i32 %11651, 81954
store i32 %11652, i32* %3
%11653 = load i32, i32* %3
%11654 = srem i32 %11653, 268435443
store i32 %11654, i32* %3
%11655 = load i32, i32* %3
%11656 = add nsw i32 %11655, 6
store i32 %11656, i32* %3
%11657 = load i32, i32* %3
%11658 = mul nsw i32 %11657, 10
store i32 %11658, i32* %3
%11659 = load i32, i32* %3
%11660 = add nsw i32 %11659, 1
store i32 %11660, i32* %3
%11661 = load i32, i32* %3
%11662 = mul nsw i32 %11661, 2
store i32 %11662, i32* %3
%11663 = load i32, i32* %3
%11664 = sub nsw i32 %11663, 1
store i32 %11664, i32* %3
%11665 = load i32, i32* %3
%11666 = and i32 %11665, -1044481
store i32 %11666, i32* %3
%11667 = load i32, i32* %3
%11668 = xor i32 %11667, 81954
store i32 %11668, i32* %3
%11669 = load i32, i32* %3
%11670 = srem i32 %11669, 268435443
store i32 %11670, i32* %3
%11671 = load i32, i32* %3
%11672 = add nsw i32 %11671, 6
store i32 %11672, i32* %3
%11673 = load i32, i32* %3
%11674 = mul nsw i32 %11673, 10
store i32 %11674, i32* %3
%11675 = load i32, i32* %3
%11676 = add nsw i32 %11675, 1
store i32 %11676, i32* %3
%11677 = load i32, i32* %3
%11678 = mul nsw i32 %11677, 2
store i32 %11678, i32* %3
%11679 = load i32, i32* %3
%11680 = sub nsw i32 %11679, 1
store i32 %11680, i32* %3
%11681 = load i32, i32* %3
%11682 = and i32 %11681, -1044481
store i32 %11682, i32* %3
%11683 = load i32, i32* %3
%11684 = xor i32 %11683, 81954
store i32 %11684, i32* %3
%11685 = load i32, i32* %3
%11686 = srem i32 %11685, 268435443
store i32 %11686, i32* %3
%11687 = load i32, i32* %3
%11688 = add nsw i32 %11687, 6
store i32 %11688, i32* %3
%11689 = load i32, i32* %3
%11690 = mul nsw i32 %11689, 10
store i32 %11690, i32* %3
%11691 = load i32, i32* %3
%11692 = add nsw i32 %11691, 1
store i32 %11692, i32* %3
%11693 = load i32, i32* %3
%11694 = mul nsw i32 %11693, 2
store i32 %11694, i32* %3
%11695 = load i32, i32* %3
%11696 = sub nsw i32 %11695, 1
store i32 %11696, i32* %3
%11697 = load i32, i32* %3
%11698 = and i32 %11697, -1044481
store i32 %11698, i32* %3
%11699 = load i32, i32* %3
%11700 = xor i32 %11699, 81954
store i32 %11700, i32* %3
%11701 = load i32, i32* %3
%11702 = srem i32 %11701, 268435443
store i32 %11702, i32* %3
%11703 = load i32, i32* %3
%11704 = add nsw i32 %11703, 6
store i32 %11704, i32* %3
%11705 = load i32, i32* %3
%11706 = mul nsw i32 %11705, 10
store i32 %11706, i32* %3
%11707 = load i32, i32* %3
%11708 = add nsw i32 %11707, 1
store i32 %11708, i32* %3
%11709 = load i32, i32* %3
%11710 = mul nsw i32 %11709, 2
store i32 %11710, i32* %3
%11711 = load i32, i32* %3
%11712 = sub nsw i32 %11711, 1
store i32 %11712, i32* %3
%11713 = load i32, i32* %3
%11714 = and i32 %11713, -1044481
store i32 %11714, i32* %3
%11715 = load i32, i32* %3
%11716 = xor i32 %11715, 81954
store i32 %11716, i32* %3
%11717 = load i32, i32* %3
%11718 = srem i32 %11717, 268435443
store i32 %11718, i32* %3
%11719 = load i32, i32* %3
%11720 = add nsw i32 %11719, 6
store i32 %11720, i32* %3
%11721 = load i32, i32* %3
%11722 = mul nsw i32 %11721, 10
store i32 %11722, i32* %3
%11723 = load i32, i32* %3
%11724 = add nsw i32 %11723, 1
store i32 %11724, i32* %3
%11725 = load i32, i32* %3
%11726 = mul nsw i32 %11725, 2
store i32 %11726, i32* %3
%11727 = load i32, i32* %3
%11728 = sub nsw i32 %11727, 1
store i32 %11728, i32* %3
%11729 = load i32, i32* %3
%11730 = and i32 %11729, -1044481
store i32 %11730, i32* %3
%11731 = load i32, i32* %3
%11732 = xor i32 %11731, 81954
store i32 %11732, i32* %3
%11733 = load i32, i32* %3
%11734 = srem i32 %11733, 268435443
store i32 %11734, i32* %3
%11735 = load i32, i32* %3
%11736 = add nsw i32 %11735, 6
store i32 %11736, i32* %3
%11737 = load i32, i32* %3
%11738 = mul nsw i32 %11737, 10
store i32 %11738, i32* %3
%11739 = load i32, i32* %3
%11740 = add nsw i32 %11739, 1
store i32 %11740, i32* %3
%11741 = load i32, i32* %3
%11742 = mul nsw i32 %11741, 2
store i32 %11742, i32* %3
%11743 = load i32, i32* %3
%11744 = sub nsw i32 %11743, 1
store i32 %11744, i32* %3
%11745 = load i32, i32* %3
%11746 = and i32 %11745, -1044481
store i32 %11746, i32* %3
%11747 = load i32, i32* %3
%11748 = xor i32 %11747, 81954
store i32 %11748, i32* %3
%11749 = load i32, i32* %3
%11750 = srem i32 %11749, 268435443
store i32 %11750, i32* %3
%11751 = load i32, i32* %3
%11752 = add nsw i32 %11751, 6
store i32 %11752, i32* %3
%11753 = load i32, i32* %3
%11754 = mul nsw i32 %11753, 10
store i32 %11754, i32* %3
%11755 = load i32, i32* %3
%11756 = add nsw i32 %11755, 1
store i32 %11756, i32* %3
%11757 = load i32, i32* %3
%11758 = mul nsw i32 %11757, 2
store i32 %11758, i32* %3
%11759 = load i32, i32* %3
%11760 = sub nsw i32 %11759, 1
store i32 %11760, i32* %3
%11761 = load i32, i32* %3
%11762 = and i32 %11761, -1044481
store i32 %11762, i32* %3
%11763 = load i32, i32* %3
%11764 = xor i32 %11763, 81954
store i32 %11764, i32* %3
%11765 = load i32, i32* %3
%11766 = srem i32 %11765, 268435443
store i32 %11766, i32* %3
%11767 = load i32, i32* %3
%11768 = add nsw i32 %11767, 6
store i32 %11768, i32* %3
%11769 = load i32, i32* %3
%11770 = mul nsw i32 %11769, 10
store i32 %11770, i32* %3
%11771 = load i32, i32* %3
%11772 = add nsw i32 %11771, 1
store i32 %11772, i32* %3
%11773 = load i32, i32* %3
%11774 = mul nsw i32 %11773, 2
store i32 %11774, i32* %3
%11775 = load i32, i32* %3
%11776 = sub nsw i32 %11775, 1
store i32 %11776, i32* %3
%11777 = load i32, i32* %3
%11778 = and i32 %11777, -1044481
store i32 %11778, i32* %3
%11779 = load i32, i32* %3
%11780 = xor i32 %11779, 81954
store i32 %11780, i32* %3
%11781 = load i32, i32* %3
%11782 = srem i32 %11781, 268435443
store i32 %11782, i32* %3
%11783 = load i32, i32* %3
%11784 = add nsw i32 %11783, 6
store i32 %11784, i32* %3
%11785 = load i32, i32* %3
%11786 = mul nsw i32 %11785, 10
store i32 %11786, i32* %3
%11787 = load i32, i32* %3
%11788 = add nsw i32 %11787, 1
store i32 %11788, i32* %3
%11789 = load i32, i32* %3
%11790 = mul nsw i32 %11789, 2
store i32 %11790, i32* %3
%11791 = load i32, i32* %3
%11792 = sub nsw i32 %11791, 1
store i32 %11792, i32* %3
%11793 = load i32, i32* %3
%11794 = and i32 %11793, -1044481
store i32 %11794, i32* %3
%11795 = load i32, i32* %3
%11796 = xor i32 %11795, 81954
store i32 %11796, i32* %3
%11797 = load i32, i32* %3
%11798 = srem i32 %11797, 268435443
store i32 %11798, i32* %3
%11799 = load i32, i32* %3
%11800 = add nsw i32 %11799, 6
store i32 %11800, i32* %3
%11801 = load i32, i32* %3
%11802 = mul nsw i32 %11801, 10
store i32 %11802, i32* %3
%11803 = load i32, i32* %3
%11804 = add nsw i32 %11803, 1
store i32 %11804, i32* %3
%11805 = load i32, i32* %3
%11806 = mul nsw i32 %11805, 2
store i32 %11806, i32* %3
%11807 = load i32, i32* %3
%11808 = sub nsw i32 %11807, 1
store i32 %11808, i32* %3
%11809 = load i32, i32* %3
%11810 = and i32 %11809, -1044481
store i32 %11810, i32* %3
%11811 = load i32, i32* %3
%11812 = xor i32 %11811, 81954
store i32 %11812, i32* %3
%11813 = load i32, i32* %3
%11814 = srem i32 %11813, 268435443
store i32 %11814, i32* %3
%11815 = load i32, i32* %3
%11816 = add nsw i32 %11815, 6
store i32 %11816, i32* %3
%11817 = load i32, i32* %3
%11818 = mul nsw i32 %11817, 10
store i32 %11818, i32* %3
%11819 = load i32, i32* %3
%11820 = add nsw i32 %11819, 1
store i32 %11820, i32* %3
%11821 = load i32, i32* %3
%11822 = mul nsw i32 %11821, 2
store i32 %11822, i32* %3
%11823 = load i32, i32* %3
%11824 = sub nsw i32 %11823, 1
store i32 %11824, i32* %3
%11825 = load i32, i32* %3
%11826 = and i32 %11825, -1044481
store i32 %11826, i32* %3
%11827 = load i32, i32* %3
%11828 = xor i32 %11827, 81954
store i32 %11828, i32* %3
%11829 = load i32, i32* %3
%11830 = srem i32 %11829, 268435443
store i32 %11830, i32* %3
%11831 = load i32, i32* %3
%11832 = add nsw i32 %11831, 6
store i32 %11832, i32* %3
%11833 = load i32, i32* %3
%11834 = mul nsw i32 %11833, 10
store i32 %11834, i32* %3
%11835 = load i32, i32* %3
%11836 = add nsw i32 %11835, 1
store i32 %11836, i32* %3
%11837 = load i32, i32* %3
%11838 = mul nsw i32 %11837, 2
store i32 %11838, i32* %3
%11839 = load i32, i32* %3
%11840 = sub nsw i32 %11839, 1
store i32 %11840, i32* %3
%11841 = load i32, i32* %3
%11842 = and i32 %11841, -1044481
store i32 %11842, i32* %3
%11843 = load i32, i32* %3
%11844 = xor i32 %11843, 81954
store i32 %11844, i32* %3
%11845 = load i32, i32* %3
%11846 = srem i32 %11845, 268435443
store i32 %11846, i32* %3
%11847 = load i32, i32* %3
%11848 = add nsw i32 %11847, 6
store i32 %11848, i32* %3
%11849 = load i32, i32* %3
%11850 = mul nsw i32 %11849, 10
store i32 %11850, i32* %3
%11851 = load i32, i32* %3
%11852 = add nsw i32 %11851, 1
store i32 %11852, i32* %3
%11853 = load i32, i32* %3
%11854 = mul nsw i32 %11853, 2
store i32 %11854, i32* %3
%11855 = load i32, i32* %3
%11856 = sub nsw i32 %11855, 1
store i32 %11856, i32* %3
%11857 = load i32, i32* %3
%11858 = and i32 %11857, -1044481
store i32 %11858, i32* %3
%11859 = load i32, i32* %3
%11860 = xor i32 %11859, 81954
store i32 %11860, i32* %3
%11861 = load i32, i32* %3
%11862 = srem i32 %11861, 268435443
store i32 %11862, i32* %3
%11863 = load i32, i32* %3
%11864 = add nsw i32 %11863, 6
store i32 %11864, i32* %3
%11865 = load i32, i32* %3
%11866 = mul nsw i32 %11865, 10
store i32 %11866, i32* %3
%11867 = load i32, i32* %3
%11868 = add nsw i32 %11867, 1
store i32 %11868, i32* %3
%11869 = load i32, i32* %3
%11870 = mul nsw i32 %11869, 2
store i32 %11870, i32* %3
%11871 = load i32, i32* %3
%11872 = sub nsw i32 %11871, 1
store i32 %11872, i32* %3
%11873 = load i32, i32* %3
%11874 = and i32 %11873, -1044481
store i32 %11874, i32* %3
%11875 = load i32, i32* %3
%11876 = xor i32 %11875, 81954
store i32 %11876, i32* %3
%11877 = load i32, i32* %3
%11878 = srem i32 %11877, 268435443
store i32 %11878, i32* %3
%11879 = load i32, i32* %3
%11880 = add nsw i32 %11879, 6
store i32 %11880, i32* %3
%11881 = load i32, i32* %3
%11882 = mul nsw i32 %11881, 10
store i32 %11882, i32* %3
%11883 = load i32, i32* %3
%11884 = add nsw i32 %11883, 1
store i32 %11884, i32* %3
%11885 = load i32, i32* %3
%11886 = mul nsw i32 %11885, 2
store i32 %11886, i32* %3
%11887 = load i32, i32* %3
%11888 = sub nsw i32 %11887, 1
store i32 %11888, i32* %3
%11889 = load i32, i32* %3
%11890 = and i32 %11889, -1044481
store i32 %11890, i32* %3
%11891 = load i32, i32* %3
%11892 = xor i32 %11891, 81954
store i32 %11892, i32* %3
%11893 = load i32, i32* %3
%11894 = srem i32 %11893, 268435443
store i32 %11894, i32* %3
%11895 = load i32, i32* %3
%11896 = add nsw i32 %11895, 6
store i32 %11896, i32* %3
%11897 = load i32, i32* %3
%11898 = mul nsw i32 %11897, 10
store i32 %11898, i32* %3
%11899 = load i32, i32* %3
%11900 = add nsw i32 %11899, 1
store i32 %11900, i32* %3
%11901 = load i32, i32* %3
%11902 = mul nsw i32 %11901, 2
store i32 %11902, i32* %3
%11903 = load i32, i32* %3
%11904 = sub nsw i32 %11903, 1
store i32 %11904, i32* %3
%11905 = load i32, i32* %3
%11906 = and i32 %11905, -1044481
store i32 %11906, i32* %3
%11907 = load i32, i32* %3
%11908 = xor i32 %11907, 81954
store i32 %11908, i32* %3
%11909 = load i32, i32* %3
%11910 = srem i32 %11909, 268435443
store i32 %11910, i32* %3
%11911 = load i32, i32* %3
%11912 = add nsw i32 %11911, 6
store i32 %11912, i32* %3
%11913 = load i32, i32* %3
%11914 = mul nsw i32 %11913, 10
store i32 %11914, i32* %3
%11915 = load i32, i32* %3
%11916 = add nsw i32 %11915, 1
store i32 %11916, i32* %3
%11917 = load i32, i32* %3
%11918 = mul nsw i32 %11917, 2
store i32 %11918, i32* %3
%11919 = load i32, i32* %3
%11920 = sub nsw i32 %11919, 1
store i32 %11920, i32* %3
%11921 = load i32, i32* %3
%11922 = and i32 %11921, -1044481
store i32 %11922, i32* %3
%11923 = load i32, i32* %3
%11924 = xor i32 %11923, 81954
store i32 %11924, i32* %3
%11925 = load i32, i32* %3
%11926 = srem i32 %11925, 268435443
store i32 %11926, i32* %3
%11927 = load i32, i32* %3
%11928 = add nsw i32 %11927, 6
store i32 %11928, i32* %3
%11929 = load i32, i32* %3
%11930 = mul nsw i32 %11929, 10
store i32 %11930, i32* %3
%11931 = load i32, i32* %3
%11932 = add nsw i32 %11931, 1
store i32 %11932, i32* %3
%11933 = load i32, i32* %3
%11934 = mul nsw i32 %11933, 2
store i32 %11934, i32* %3
%11935 = load i32, i32* %3
%11936 = sub nsw i32 %11935, 1
store i32 %11936, i32* %3
%11937 = load i32, i32* %3
%11938 = and i32 %11937, -1044481
store i32 %11938, i32* %3
%11939 = load i32, i32* %3
%11940 = xor i32 %11939, 81954
store i32 %11940, i32* %3
%11941 = load i32, i32* %3
%11942 = srem i32 %11941, 268435443
store i32 %11942, i32* %3
%11943 = load i32, i32* %3
%11944 = add nsw i32 %11943, 6
store i32 %11944, i32* %3
%11945 = load i32, i32* %3
%11946 = mul nsw i32 %11945, 10
store i32 %11946, i32* %3
%11947 = load i32, i32* %3
%11948 = add nsw i32 %11947, 1
store i32 %11948, i32* %3
%11949 = load i32, i32* %3
%11950 = mul nsw i32 %11949, 2
store i32 %11950, i32* %3
%11951 = load i32, i32* %3
%11952 = sub nsw i32 %11951, 1
store i32 %11952, i32* %3
%11953 = load i32, i32* %3
%11954 = and i32 %11953, -1044481
store i32 %11954, i32* %3
%11955 = load i32, i32* %3
%11956 = xor i32 %11955, 81954
store i32 %11956, i32* %3
%11957 = load i32, i32* %3
%11958 = srem i32 %11957, 268435443
store i32 %11958, i32* %3
%11959 = load i32, i32* %3
%11960 = add nsw i32 %11959, 6
store i32 %11960, i32* %3
%11961 = load i32, i32* %3
%11962 = mul nsw i32 %11961, 10
store i32 %11962, i32* %3
%11963 = load i32, i32* %3
%11964 = add nsw i32 %11963, 1
store i32 %11964, i32* %3
%11965 = load i32, i32* %3
%11966 = mul nsw i32 %11965, 2
store i32 %11966, i32* %3
%11967 = load i32, i32* %3
%11968 = sub nsw i32 %11967, 1
store i32 %11968, i32* %3
%11969 = load i32, i32* %3
%11970 = and i32 %11969, -1044481
store i32 %11970, i32* %3
%11971 = load i32, i32* %3
%11972 = xor i32 %11971, 81954
store i32 %11972, i32* %3
%11973 = load i32, i32* %3
%11974 = srem i32 %11973, 268435443
store i32 %11974, i32* %3
%11975 = load i32, i32* %3
%11976 = add nsw i32 %11975, 6
store i32 %11976, i32* %3
%11977 = load i32, i32* %3
%11978 = mul nsw i32 %11977, 10
store i32 %11978, i32* %3
%11979 = load i32, i32* %3
%11980 = add nsw i32 %11979, 1
store i32 %11980, i32* %3
%11981 = load i32, i32* %3
%11982 = mul nsw i32 %11981, 2
store i32 %11982, i32* %3
%11983 = load i32, i32* %3
%11984 = sub nsw i32 %11983, 1
store i32 %11984, i32* %3
%11985 = load i32, i32* %3
%11986 = and i32 %11985, -1044481
store i32 %11986, i32* %3
%11987 = load i32, i32* %3
%11988 = xor i32 %11987, 81954
store i32 %11988, i32* %3
%11989 = load i32, i32* %3
%11990 = srem i32 %11989, 268435443
store i32 %11990, i32* %3
%11991 = load i32, i32* %3
%11992 = add nsw i32 %11991, 6
store i32 %11992, i32* %3
%11993 = load i32, i32* %3
%11994 = mul nsw i32 %11993, 10
store i32 %11994, i32* %3
%11995 = load i32, i32* %3
%11996 = add nsw i32 %11995, 1
store i32 %11996, i32* %3
%11997 = load i32, i32* %3
%11998 = mul nsw i32 %11997, 2
store i32 %11998, i32* %3
%11999 = load i32, i32* %3
%12000 = sub nsw i32 %11999, 1
store i32 %12000, i32* %3
%12001 = load i32, i32* %3
%12002 = and i32 %12001, -1044481
store i32 %12002, i32* %3
%12003 = load i32, i32* %3
%12004 = xor i32 %12003, 81954
store i32 %12004, i32* %3
%12005 = load i32, i32* %3
%12006 = srem i32 %12005, 268435443
store i32 %12006, i32* %3
%12007 = load i32, i32* %3
%12008 = add nsw i32 %12007, 6
store i32 %12008, i32* %3
%12009 = load i32, i32* %3
%12010 = mul nsw i32 %12009, 10
store i32 %12010, i32* %3
%12011 = load i32, i32* %3
%12012 = add nsw i32 %12011, 1
store i32 %12012, i32* %3
%12013 = load i32, i32* %3
%12014 = mul nsw i32 %12013, 2
store i32 %12014, i32* %3
%12015 = load i32, i32* %3
%12016 = sub nsw i32 %12015, 1
store i32 %12016, i32* %3
%12017 = load i32, i32* %3
%12018 = and i32 %12017, -1044481
store i32 %12018, i32* %3
%12019 = load i32, i32* %3
%12020 = xor i32 %12019, 81954
store i32 %12020, i32* %3
%12021 = load i32, i32* %3
%12022 = srem i32 %12021, 268435443
store i32 %12022, i32* %3
%12023 = load i32, i32* %3
%12024 = add nsw i32 %12023, 6
store i32 %12024, i32* %3
%12025 = load i32, i32* %3
%12026 = mul nsw i32 %12025, 10
store i32 %12026, i32* %3
%12027 = load i32, i32* %3
%12028 = add nsw i32 %12027, 1
store i32 %12028, i32* %3
%12029 = load i32, i32* %3
%12030 = mul nsw i32 %12029, 2
store i32 %12030, i32* %3
%12031 = load i32, i32* %3
%12032 = sub nsw i32 %12031, 1
store i32 %12032, i32* %3
%12033 = load i32, i32* %3
%12034 = and i32 %12033, -1044481
store i32 %12034, i32* %3
%12035 = load i32, i32* %3
%12036 = xor i32 %12035, 81954
store i32 %12036, i32* %3
%12037 = load i32, i32* %3
%12038 = srem i32 %12037, 268435443
store i32 %12038, i32* %3
%12039 = load i32, i32* %3
%12040 = add nsw i32 %12039, 6
store i32 %12040, i32* %3
%12041 = load i32, i32* %3
%12042 = mul nsw i32 %12041, 10
store i32 %12042, i32* %3
%12043 = load i32, i32* %3
%12044 = add nsw i32 %12043, 1
store i32 %12044, i32* %3
%12045 = load i32, i32* %3
%12046 = mul nsw i32 %12045, 2
store i32 %12046, i32* %3
%12047 = load i32, i32* %3
%12048 = sub nsw i32 %12047, 1
store i32 %12048, i32* %3
%12049 = load i32, i32* %3
%12050 = and i32 %12049, -1044481
store i32 %12050, i32* %3
%12051 = load i32, i32* %3
%12052 = xor i32 %12051, 81954
store i32 %12052, i32* %3
%12053 = load i32, i32* %3
%12054 = srem i32 %12053, 268435443
store i32 %12054, i32* %3
%12055 = load i32, i32* %3
%12056 = add nsw i32 %12055, 6
store i32 %12056, i32* %3
%12057 = load i32, i32* %3
%12058 = mul nsw i32 %12057, 10
store i32 %12058, i32* %3
%12059 = load i32, i32* %3
%12060 = add nsw i32 %12059, 1
store i32 %12060, i32* %3
%12061 = load i32, i32* %3
%12062 = mul nsw i32 %12061, 2
store i32 %12062, i32* %3
%12063 = load i32, i32* %3
%12064 = sub nsw i32 %12063, 1
store i32 %12064, i32* %3
%12065 = load i32, i32* %3
%12066 = and i32 %12065, -1044481
store i32 %12066, i32* %3
%12067 = load i32, i32* %3
%12068 = xor i32 %12067, 81954
store i32 %12068, i32* %3
%12069 = load i32, i32* %3
%12070 = srem i32 %12069, 268435443
store i32 %12070, i32* %3
%12071 = load i32, i32* %3
%12072 = add nsw i32 %12071, 6
store i32 %12072, i32* %3
%12073 = load i32, i32* %3
%12074 = mul nsw i32 %12073, 10
store i32 %12074, i32* %3
%12075 = load i32, i32* %3
%12076 = add nsw i32 %12075, 1
store i32 %12076, i32* %3
%12077 = load i32, i32* %3
%12078 = mul nsw i32 %12077, 2
store i32 %12078, i32* %3
%12079 = load i32, i32* %3
%12080 = sub nsw i32 %12079, 1
store i32 %12080, i32* %3
%12081 = load i32, i32* %3
%12082 = and i32 %12081, -1044481
store i32 %12082, i32* %3
%12083 = load i32, i32* %3
%12084 = xor i32 %12083, 81954
store i32 %12084, i32* %3
%12085 = load i32, i32* %3
%12086 = srem i32 %12085, 268435443
store i32 %12086, i32* %3
%12087 = load i32, i32* %3
%12088 = add nsw i32 %12087, 6
store i32 %12088, i32* %3
%12089 = load i32, i32* %3
%12090 = mul nsw i32 %12089, 10
store i32 %12090, i32* %3
%12091 = load i32, i32* %3
%12092 = add nsw i32 %12091, 1
store i32 %12092, i32* %3
%12093 = load i32, i32* %3
%12094 = mul nsw i32 %12093, 2
store i32 %12094, i32* %3
%12095 = load i32, i32* %3
%12096 = sub nsw i32 %12095, 1
store i32 %12096, i32* %3
%12097 = load i32, i32* %3
%12098 = and i32 %12097, -1044481
store i32 %12098, i32* %3
%12099 = load i32, i32* %3
%12100 = xor i32 %12099, 81954
store i32 %12100, i32* %3
%12101 = load i32, i32* %3
%12102 = srem i32 %12101, 268435443
store i32 %12102, i32* %3
%12103 = load i32, i32* %3
%12104 = add nsw i32 %12103, 6
store i32 %12104, i32* %3
%12105 = load i32, i32* %3
%12106 = mul nsw i32 %12105, 10
store i32 %12106, i32* %3
%12107 = load i32, i32* %3
%12108 = add nsw i32 %12107, 1
store i32 %12108, i32* %3
%12109 = load i32, i32* %3
%12110 = mul nsw i32 %12109, 2
store i32 %12110, i32* %3
%12111 = load i32, i32* %3
%12112 = sub nsw i32 %12111, 1
store i32 %12112, i32* %3
%12113 = load i32, i32* %3
%12114 = and i32 %12113, -1044481
store i32 %12114, i32* %3
%12115 = load i32, i32* %3
%12116 = xor i32 %12115, 81954
store i32 %12116, i32* %3
%12117 = load i32, i32* %3
%12118 = srem i32 %12117, 268435443
store i32 %12118, i32* %3
%12119 = load i32, i32* %3
%12120 = add nsw i32 %12119, 6
store i32 %12120, i32* %3
%12121 = load i32, i32* %3
%12122 = mul nsw i32 %12121, 10
store i32 %12122, i32* %3
%12123 = load i32, i32* %3
%12124 = add nsw i32 %12123, 1
store i32 %12124, i32* %3
%12125 = load i32, i32* %3
%12126 = mul nsw i32 %12125, 2
store i32 %12126, i32* %3
%12127 = load i32, i32* %3
%12128 = sub nsw i32 %12127, 1
store i32 %12128, i32* %3
%12129 = load i32, i32* %3
%12130 = and i32 %12129, -1044481
store i32 %12130, i32* %3
%12131 = load i32, i32* %3
%12132 = xor i32 %12131, 81954
store i32 %12132, i32* %3
%12133 = load i32, i32* %3
%12134 = srem i32 %12133, 268435443
store i32 %12134, i32* %3
%12135 = load i32, i32* %3
%12136 = add nsw i32 %12135, 6
store i32 %12136, i32* %3
%12137 = load i32, i32* %3
%12138 = mul nsw i32 %12137, 10
store i32 %12138, i32* %3
%12139 = load i32, i32* %3
%12140 = add nsw i32 %12139, 1
store i32 %12140, i32* %3
%12141 = load i32, i32* %3
%12142 = mul nsw i32 %12141, 2
store i32 %12142, i32* %3
%12143 = load i32, i32* %3
%12144 = sub nsw i32 %12143, 1
store i32 %12144, i32* %3
%12145 = load i32, i32* %3
%12146 = and i32 %12145, -1044481
store i32 %12146, i32* %3
%12147 = load i32, i32* %3
%12148 = xor i32 %12147, 81954
store i32 %12148, i32* %3
%12149 = load i32, i32* %3
%12150 = srem i32 %12149, 268435443
store i32 %12150, i32* %3
%12151 = load i32, i32* %3
%12152 = add nsw i32 %12151, 6
store i32 %12152, i32* %3
%12153 = load i32, i32* %3
%12154 = mul nsw i32 %12153, 10
store i32 %12154, i32* %3
%12155 = load i32, i32* %3
%12156 = add nsw i32 %12155, 1
store i32 %12156, i32* %3
%12157 = load i32, i32* %3
%12158 = mul nsw i32 %12157, 2
store i32 %12158, i32* %3
%12159 = load i32, i32* %3
%12160 = sub nsw i32 %12159, 1
store i32 %12160, i32* %3
%12161 = load i32, i32* %3
%12162 = and i32 %12161, -1044481
store i32 %12162, i32* %3
%12163 = load i32, i32* %3
%12164 = xor i32 %12163, 81954
store i32 %12164, i32* %3
%12165 = load i32, i32* %3
%12166 = srem i32 %12165, 268435443
store i32 %12166, i32* %3
%12167 = load i32, i32* %3
%12168 = add nsw i32 %12167, 6
store i32 %12168, i32* %3
%12169 = load i32, i32* %3
%12170 = mul nsw i32 %12169, 10
store i32 %12170, i32* %3
%12171 = load i32, i32* %3
%12172 = add nsw i32 %12171, 1
store i32 %12172, i32* %3
%12173 = load i32, i32* %3
%12174 = mul nsw i32 %12173, 2
store i32 %12174, i32* %3
%12175 = load i32, i32* %3
%12176 = sub nsw i32 %12175, 1
store i32 %12176, i32* %3
%12177 = load i32, i32* %3
%12178 = and i32 %12177, -1044481
store i32 %12178, i32* %3
%12179 = load i32, i32* %3
%12180 = xor i32 %12179, 81954
store i32 %12180, i32* %3
%12181 = load i32, i32* %3
%12182 = srem i32 %12181, 268435443
store i32 %12182, i32* %3
%12183 = load i32, i32* %3
%12184 = add nsw i32 %12183, 6
store i32 %12184, i32* %3
%12185 = load i32, i32* %3
%12186 = mul nsw i32 %12185, 10
store i32 %12186, i32* %3
%12187 = load i32, i32* %3
%12188 = add nsw i32 %12187, 1
store i32 %12188, i32* %3
%12189 = load i32, i32* %3
%12190 = mul nsw i32 %12189, 2
store i32 %12190, i32* %3
%12191 = load i32, i32* %3
%12192 = sub nsw i32 %12191, 1
store i32 %12192, i32* %3
%12193 = load i32, i32* %3
%12194 = and i32 %12193, -1044481
store i32 %12194, i32* %3
%12195 = load i32, i32* %3
%12196 = xor i32 %12195, 81954
store i32 %12196, i32* %3
%12197 = load i32, i32* %3
%12198 = srem i32 %12197, 268435443
store i32 %12198, i32* %3
%12199 = load i32, i32* %3
%12200 = add nsw i32 %12199, 6
store i32 %12200, i32* %3
%12201 = load i32, i32* %3
%12202 = mul nsw i32 %12201, 10
store i32 %12202, i32* %3
%12203 = load i32, i32* %3
%12204 = add nsw i32 %12203, 1
store i32 %12204, i32* %3
%12205 = load i32, i32* %3
%12206 = mul nsw i32 %12205, 2
store i32 %12206, i32* %3
%12207 = load i32, i32* %3
%12208 = sub nsw i32 %12207, 1
store i32 %12208, i32* %3
%12209 = load i32, i32* %3
%12210 = and i32 %12209, -1044481
store i32 %12210, i32* %3
%12211 = load i32, i32* %3
%12212 = xor i32 %12211, 81954
store i32 %12212, i32* %3
%12213 = load i32, i32* %3
%12214 = srem i32 %12213, 268435443
store i32 %12214, i32* %3
%12215 = load i32, i32* %3
%12216 = add nsw i32 %12215, 6
store i32 %12216, i32* %3
%12217 = load i32, i32* %3
%12218 = mul nsw i32 %12217, 10
store i32 %12218, i32* %3
%12219 = load i32, i32* %3
%12220 = add nsw i32 %12219, 1
store i32 %12220, i32* %3
%12221 = load i32, i32* %3
%12222 = mul nsw i32 %12221, 2
store i32 %12222, i32* %3
%12223 = load i32, i32* %3
%12224 = sub nsw i32 %12223, 1
store i32 %12224, i32* %3
%12225 = load i32, i32* %3
%12226 = and i32 %12225, -1044481
store i32 %12226, i32* %3
%12227 = load i32, i32* %3
%12228 = xor i32 %12227, 81954
store i32 %12228, i32* %3
%12229 = load i32, i32* %3
%12230 = srem i32 %12229, 268435443
store i32 %12230, i32* %3
%12231 = load i32, i32* %3
%12232 = add nsw i32 %12231, 6
store i32 %12232, i32* %3
%12233 = load i32, i32* %3
%12234 = mul nsw i32 %12233, 10
store i32 %12234, i32* %3
%12235 = load i32, i32* %3
%12236 = add nsw i32 %12235, 1
store i32 %12236, i32* %3
%12237 = load i32, i32* %3
%12238 = mul nsw i32 %12237, 2
store i32 %12238, i32* %3
%12239 = load i32, i32* %3
%12240 = sub nsw i32 %12239, 1
store i32 %12240, i32* %3
%12241 = load i32, i32* %3
%12242 = and i32 %12241, -1044481
store i32 %12242, i32* %3
%12243 = load i32, i32* %3
%12244 = xor i32 %12243, 81954
store i32 %12244, i32* %3
%12245 = load i32, i32* %3
%12246 = srem i32 %12245, 268435443
store i32 %12246, i32* %3
%12247 = load i32, i32* %3
%12248 = add nsw i32 %12247, 6
store i32 %12248, i32* %3
%12249 = load i32, i32* %3
%12250 = mul nsw i32 %12249, 10
store i32 %12250, i32* %3
%12251 = load i32, i32* %3
%12252 = add nsw i32 %12251, 1
store i32 %12252, i32* %3
%12253 = load i32, i32* %3
%12254 = mul nsw i32 %12253, 2
store i32 %12254, i32* %3
%12255 = load i32, i32* %3
%12256 = sub nsw i32 %12255, 1
store i32 %12256, i32* %3
%12257 = load i32, i32* %3
%12258 = and i32 %12257, -1044481
store i32 %12258, i32* %3
%12259 = load i32, i32* %3
%12260 = xor i32 %12259, 81954
store i32 %12260, i32* %3
%12261 = load i32, i32* %3
%12262 = srem i32 %12261, 268435443
store i32 %12262, i32* %3
%12263 = load i32, i32* %3
%12264 = add nsw i32 %12263, 6
store i32 %12264, i32* %3
%12265 = load i32, i32* %3
%12266 = mul nsw i32 %12265, 10
store i32 %12266, i32* %3
%12267 = load i32, i32* %3
%12268 = add nsw i32 %12267, 1
store i32 %12268, i32* %3
%12269 = load i32, i32* %3
%12270 = mul nsw i32 %12269, 2
store i32 %12270, i32* %3
%12271 = load i32, i32* %3
%12272 = sub nsw i32 %12271, 1
store i32 %12272, i32* %3
%12273 = load i32, i32* %3
%12274 = and i32 %12273, -1044481
store i32 %12274, i32* %3
%12275 = load i32, i32* %3
%12276 = xor i32 %12275, 81954
store i32 %12276, i32* %3
%12277 = load i32, i32* %3
%12278 = srem i32 %12277, 268435443
store i32 %12278, i32* %3
%12279 = load i32, i32* %3
%12280 = add nsw i32 %12279, 6
store i32 %12280, i32* %3
%12281 = load i32, i32* %3
%12282 = mul nsw i32 %12281, 10
store i32 %12282, i32* %3
%12283 = load i32, i32* %3
%12284 = add nsw i32 %12283, 1
store i32 %12284, i32* %3
%12285 = load i32, i32* %3
%12286 = mul nsw i32 %12285, 2
store i32 %12286, i32* %3
%12287 = load i32, i32* %3
%12288 = sub nsw i32 %12287, 1
store i32 %12288, i32* %3
%12289 = load i32, i32* %3
%12290 = and i32 %12289, -1044481
store i32 %12290, i32* %3
%12291 = load i32, i32* %3
%12292 = xor i32 %12291, 81954
store i32 %12292, i32* %3
%12293 = load i32, i32* %3
%12294 = srem i32 %12293, 268435443
store i32 %12294, i32* %3
%12295 = load i32, i32* %3
%12296 = add nsw i32 %12295, 6
store i32 %12296, i32* %3
%12297 = load i32, i32* %3
%12298 = mul nsw i32 %12297, 10
store i32 %12298, i32* %3
%12299 = load i32, i32* %3
%12300 = add nsw i32 %12299, 1
store i32 %12300, i32* %3
%12301 = load i32, i32* %3
%12302 = mul nsw i32 %12301, 2
store i32 %12302, i32* %3
%12303 = load i32, i32* %3
%12304 = sub nsw i32 %12303, 1
store i32 %12304, i32* %3
%12305 = load i32, i32* %3
%12306 = and i32 %12305, -1044481
store i32 %12306, i32* %3
%12307 = load i32, i32* %3
%12308 = xor i32 %12307, 81954
store i32 %12308, i32* %3
%12309 = load i32, i32* %3
%12310 = srem i32 %12309, 268435443
store i32 %12310, i32* %3
%12311 = load i32, i32* %3
%12312 = add nsw i32 %12311, 6
store i32 %12312, i32* %3
%12313 = load i32, i32* %3
%12314 = mul nsw i32 %12313, 10
store i32 %12314, i32* %3
%12315 = load i32, i32* %3
%12316 = add nsw i32 %12315, 1
store i32 %12316, i32* %3
%12317 = load i32, i32* %3
%12318 = mul nsw i32 %12317, 2
store i32 %12318, i32* %3
%12319 = load i32, i32* %3
%12320 = sub nsw i32 %12319, 1
store i32 %12320, i32* %3
%12321 = load i32, i32* %3
%12322 = and i32 %12321, -1044481
store i32 %12322, i32* %3
%12323 = load i32, i32* %3
%12324 = xor i32 %12323, 81954
store i32 %12324, i32* %3
%12325 = load i32, i32* %3
%12326 = srem i32 %12325, 268435443
store i32 %12326, i32* %3
%12327 = load i32, i32* %3
%12328 = add nsw i32 %12327, 6
store i32 %12328, i32* %3
%12329 = load i32, i32* %3
%12330 = mul nsw i32 %12329, 10
store i32 %12330, i32* %3
%12331 = load i32, i32* %3
%12332 = add nsw i32 %12331, 1
store i32 %12332, i32* %3
%12333 = load i32, i32* %3
%12334 = mul nsw i32 %12333, 2
store i32 %12334, i32* %3
%12335 = load i32, i32* %3
%12336 = sub nsw i32 %12335, 1
store i32 %12336, i32* %3
%12337 = load i32, i32* %3
%12338 = and i32 %12337, -1044481
store i32 %12338, i32* %3
%12339 = load i32, i32* %3
%12340 = xor i32 %12339, 81954
store i32 %12340, i32* %3
%12341 = load i32, i32* %3
%12342 = srem i32 %12341, 268435443
store i32 %12342, i32* %3
%12343 = load i32, i32* %3
%12344 = add nsw i32 %12343, 6
store i32 %12344, i32* %3
%12345 = load i32, i32* %3
%12346 = mul nsw i32 %12345, 10
store i32 %12346, i32* %3
%12347 = load i32, i32* %3
%12348 = add nsw i32 %12347, 1
store i32 %12348, i32* %3
%12349 = load i32, i32* %3
%12350 = mul nsw i32 %12349, 2
store i32 %12350, i32* %3
%12351 = load i32, i32* %3
%12352 = sub nsw i32 %12351, 1
store i32 %12352, i32* %3
%12353 = load i32, i32* %3
%12354 = and i32 %12353, -1044481
store i32 %12354, i32* %3
%12355 = load i32, i32* %3
%12356 = xor i32 %12355, 81954
store i32 %12356, i32* %3
%12357 = load i32, i32* %3
%12358 = srem i32 %12357, 268435443
store i32 %12358, i32* %3
%12359 = load i32, i32* %3
%12360 = add nsw i32 %12359, 6
store i32 %12360, i32* %3
%12361 = load i32, i32* %3
%12362 = mul nsw i32 %12361, 10
store i32 %12362, i32* %3
%12363 = load i32, i32* %3
%12364 = add nsw i32 %12363, 1
store i32 %12364, i32* %3
%12365 = load i32, i32* %3
%12366 = mul nsw i32 %12365, 2
store i32 %12366, i32* %3
%12367 = load i32, i32* %3
%12368 = sub nsw i32 %12367, 1
store i32 %12368, i32* %3
%12369 = load i32, i32* %3
%12370 = and i32 %12369, -1044481
store i32 %12370, i32* %3
%12371 = load i32, i32* %3
%12372 = xor i32 %12371, 81954
store i32 %12372, i32* %3
%12373 = load i32, i32* %3
%12374 = srem i32 %12373, 268435443
store i32 %12374, i32* %3
%12375 = load i32, i32* %3
%12376 = add nsw i32 %12375, 6
store i32 %12376, i32* %3
%12377 = load i32, i32* %3
%12378 = mul nsw i32 %12377, 10
store i32 %12378, i32* %3
%12379 = load i32, i32* %3
%12380 = add nsw i32 %12379, 1
store i32 %12380, i32* %3
%12381 = load i32, i32* %3
%12382 = mul nsw i32 %12381, 2
store i32 %12382, i32* %3
%12383 = load i32, i32* %3
%12384 = sub nsw i32 %12383, 1
store i32 %12384, i32* %3
%12385 = load i32, i32* %3
%12386 = and i32 %12385, -1044481
store i32 %12386, i32* %3
%12387 = load i32, i32* %3
%12388 = xor i32 %12387, 81954
store i32 %12388, i32* %3
%12389 = load i32, i32* %3
%12390 = srem i32 %12389, 268435443
store i32 %12390, i32* %3
%12391 = load i32, i32* %3
%12392 = add nsw i32 %12391, 6
store i32 %12392, i32* %3
%12393 = load i32, i32* %3
%12394 = mul nsw i32 %12393, 10
store i32 %12394, i32* %3
%12395 = load i32, i32* %3
%12396 = add nsw i32 %12395, 1
store i32 %12396, i32* %3
%12397 = load i32, i32* %3
%12398 = mul nsw i32 %12397, 2
store i32 %12398, i32* %3
%12399 = load i32, i32* %3
%12400 = sub nsw i32 %12399, 1
store i32 %12400, i32* %3
%12401 = load i32, i32* %3
%12402 = and i32 %12401, -1044481
store i32 %12402, i32* %3
%12403 = load i32, i32* %3
%12404 = xor i32 %12403, 81954
store i32 %12404, i32* %3
%12405 = load i32, i32* %3
%12406 = srem i32 %12405, 268435443
store i32 %12406, i32* %3
%12407 = load i32, i32* %3
%12408 = add nsw i32 %12407, 6
store i32 %12408, i32* %3
%12409 = load i32, i32* %3
%12410 = mul nsw i32 %12409, 10
store i32 %12410, i32* %3
%12411 = load i32, i32* %3
%12412 = add nsw i32 %12411, 1
store i32 %12412, i32* %3
%12413 = load i32, i32* %3
%12414 = mul nsw i32 %12413, 2
store i32 %12414, i32* %3
%12415 = load i32, i32* %3
%12416 = sub nsw i32 %12415, 1
store i32 %12416, i32* %3
%12417 = load i32, i32* %3
%12418 = and i32 %12417, -1044481
store i32 %12418, i32* %3
%12419 = load i32, i32* %3
%12420 = xor i32 %12419, 81954
store i32 %12420, i32* %3
%12421 = load i32, i32* %3
%12422 = srem i32 %12421, 268435443
store i32 %12422, i32* %3
%12423 = load i32, i32* %3
%12424 = add nsw i32 %12423, 6
store i32 %12424, i32* %3
%12425 = load i32, i32* %3
%12426 = mul nsw i32 %12425, 10
store i32 %12426, i32* %3
%12427 = load i32, i32* %3
%12428 = add nsw i32 %12427, 1
store i32 %12428, i32* %3
%12429 = load i32, i32* %3
%12430 = mul nsw i32 %12429, 2
store i32 %12430, i32* %3
%12431 = load i32, i32* %3
%12432 = sub nsw i32 %12431, 1
store i32 %12432, i32* %3
%12433 = load i32, i32* %3
%12434 = and i32 %12433, -1044481
store i32 %12434, i32* %3
%12435 = load i32, i32* %3
%12436 = xor i32 %12435, 81954
store i32 %12436, i32* %3
%12437 = load i32, i32* %3
%12438 = srem i32 %12437, 268435443
store i32 %12438, i32* %3
%12439 = load i32, i32* %3
%12440 = add nsw i32 %12439, 6
store i32 %12440, i32* %3
%12441 = load i32, i32* %3
%12442 = mul nsw i32 %12441, 10
store i32 %12442, i32* %3
%12443 = load i32, i32* %3
%12444 = add nsw i32 %12443, 1
store i32 %12444, i32* %3
%12445 = load i32, i32* %3
%12446 = mul nsw i32 %12445, 2
store i32 %12446, i32* %3
%12447 = load i32, i32* %3
%12448 = sub nsw i32 %12447, 1
store i32 %12448, i32* %3
%12449 = load i32, i32* %3
%12450 = and i32 %12449, -1044481
store i32 %12450, i32* %3
%12451 = load i32, i32* %3
%12452 = xor i32 %12451, 81954
store i32 %12452, i32* %3
%12453 = load i32, i32* %3
%12454 = srem i32 %12453, 268435443
store i32 %12454, i32* %3
%12455 = load i32, i32* %3
%12456 = add nsw i32 %12455, 6
store i32 %12456, i32* %3
%12457 = load i32, i32* %3
%12458 = mul nsw i32 %12457, 10
store i32 %12458, i32* %3
%12459 = load i32, i32* %3
%12460 = add nsw i32 %12459, 1
store i32 %12460, i32* %3
%12461 = load i32, i32* %3
%12462 = mul nsw i32 %12461, 2
store i32 %12462, i32* %3
%12463 = load i32, i32* %3
%12464 = sub nsw i32 %12463, 1
store i32 %12464, i32* %3
%12465 = load i32, i32* %3
%12466 = and i32 %12465, -1044481
store i32 %12466, i32* %3
%12467 = load i32, i32* %3
%12468 = xor i32 %12467, 81954
store i32 %12468, i32* %3
%12469 = load i32, i32* %3
%12470 = srem i32 %12469, 268435443
store i32 %12470, i32* %3
%12471 = load i32, i32* %3
%12472 = add nsw i32 %12471, 6
store i32 %12472, i32* %3
%12473 = load i32, i32* %3
%12474 = mul nsw i32 %12473, 10
store i32 %12474, i32* %3
%12475 = load i32, i32* %3
%12476 = add nsw i32 %12475, 1
store i32 %12476, i32* %3
%12477 = load i32, i32* %3
%12478 = mul nsw i32 %12477, 2
store i32 %12478, i32* %3
%12479 = load i32, i32* %3
%12480 = sub nsw i32 %12479, 1
store i32 %12480, i32* %3
%12481 = load i32, i32* %3
%12482 = and i32 %12481, -1044481
store i32 %12482, i32* %3
%12483 = load i32, i32* %3
%12484 = xor i32 %12483, 81954
store i32 %12484, i32* %3
%12485 = load i32, i32* %3
%12486 = srem i32 %12485, 268435443
store i32 %12486, i32* %3
%12487 = load i32, i32* %3
%12488 = add nsw i32 %12487, 6
store i32 %12488, i32* %3
%12489 = load i32, i32* %3
%12490 = mul nsw i32 %12489, 10
store i32 %12490, i32* %3
%12491 = load i32, i32* %3
%12492 = add nsw i32 %12491, 1
store i32 %12492, i32* %3
%12493 = load i32, i32* %3
%12494 = mul nsw i32 %12493, 2
store i32 %12494, i32* %3
%12495 = load i32, i32* %3
%12496 = sub nsw i32 %12495, 1
store i32 %12496, i32* %3
%12497 = load i32, i32* %3
%12498 = and i32 %12497, -1044481
store i32 %12498, i32* %3
%12499 = load i32, i32* %3
%12500 = xor i32 %12499, 81954
store i32 %12500, i32* %3
%12501 = load i32, i32* %3
%12502 = srem i32 %12501, 268435443
store i32 %12502, i32* %3
%12503 = load i32, i32* %3
%12504 = add nsw i32 %12503, 6
store i32 %12504, i32* %3
%12505 = load i32, i32* %3
%12506 = mul nsw i32 %12505, 10
store i32 %12506, i32* %3
%12507 = load i32, i32* %3
%12508 = add nsw i32 %12507, 1
store i32 %12508, i32* %3
%12509 = load i32, i32* %3
%12510 = mul nsw i32 %12509, 2
store i32 %12510, i32* %3
%12511 = load i32, i32* %3
%12512 = sub nsw i32 %12511, 1
store i32 %12512, i32* %3
%12513 = load i32, i32* %3
%12514 = and i32 %12513, -1044481
store i32 %12514, i32* %3
%12515 = load i32, i32* %3
%12516 = xor i32 %12515, 81954
store i32 %12516, i32* %3
%12517 = load i32, i32* %3
%12518 = srem i32 %12517, 268435443
store i32 %12518, i32* %3
%12519 = load i32, i32* %3
%12520 = add nsw i32 %12519, 6
store i32 %12520, i32* %3
%12521 = load i32, i32* %3
%12522 = mul nsw i32 %12521, 10
store i32 %12522, i32* %3
%12523 = load i32, i32* %3
%12524 = add nsw i32 %12523, 1
store i32 %12524, i32* %3
%12525 = load i32, i32* %3
%12526 = mul nsw i32 %12525, 2
store i32 %12526, i32* %3
%12527 = load i32, i32* %3
%12528 = sub nsw i32 %12527, 1
store i32 %12528, i32* %3
%12529 = load i32, i32* %3
%12530 = and i32 %12529, -1044481
store i32 %12530, i32* %3
%12531 = load i32, i32* %3
%12532 = xor i32 %12531, 81954
store i32 %12532, i32* %3
%12533 = load i32, i32* %3
%12534 = srem i32 %12533, 268435443
store i32 %12534, i32* %3
%12535 = load i32, i32* %3
%12536 = add nsw i32 %12535, 6
store i32 %12536, i32* %3
%12537 = load i32, i32* %3
%12538 = mul nsw i32 %12537, 10
store i32 %12538, i32* %3
%12539 = load i32, i32* %3
%12540 = add nsw i32 %12539, 1
store i32 %12540, i32* %3
%12541 = load i32, i32* %3
%12542 = mul nsw i32 %12541, 2
store i32 %12542, i32* %3
%12543 = load i32, i32* %3
%12544 = sub nsw i32 %12543, 1
store i32 %12544, i32* %3
%12545 = load i32, i32* %3
%12546 = and i32 %12545, -1044481
store i32 %12546, i32* %3
%12547 = load i32, i32* %3
%12548 = xor i32 %12547, 81954
store i32 %12548, i32* %3
%12549 = load i32, i32* %3
%12550 = srem i32 %12549, 268435443
store i32 %12550, i32* %3
%12551 = load i32, i32* %3
%12552 = add nsw i32 %12551, 6
store i32 %12552, i32* %3
%12553 = load i32, i32* %3
%12554 = mul nsw i32 %12553, 10
store i32 %12554, i32* %3
%12555 = load i32, i32* %3
%12556 = add nsw i32 %12555, 1
store i32 %12556, i32* %3
%12557 = load i32, i32* %3
%12558 = mul nsw i32 %12557, 2
store i32 %12558, i32* %3
%12559 = load i32, i32* %3
%12560 = sub nsw i32 %12559, 1
store i32 %12560, i32* %3
%12561 = load i32, i32* %3
%12562 = and i32 %12561, -1044481
store i32 %12562, i32* %3
%12563 = load i32, i32* %3
%12564 = xor i32 %12563, 81954
store i32 %12564, i32* %3
%12565 = load i32, i32* %3
%12566 = srem i32 %12565, 268435443
store i32 %12566, i32* %3
%12567 = load i32, i32* %3
%12568 = add nsw i32 %12567, 6
store i32 %12568, i32* %3
%12569 = load i32, i32* %3
%12570 = mul nsw i32 %12569, 10
store i32 %12570, i32* %3
%12571 = load i32, i32* %3
%12572 = add nsw i32 %12571, 1
store i32 %12572, i32* %3
%12573 = load i32, i32* %3
%12574 = mul nsw i32 %12573, 2
store i32 %12574, i32* %3
%12575 = load i32, i32* %3
%12576 = sub nsw i32 %12575, 1
store i32 %12576, i32* %3
%12577 = load i32, i32* %3
%12578 = and i32 %12577, -1044481
store i32 %12578, i32* %3
%12579 = load i32, i32* %3
%12580 = xor i32 %12579, 81954
store i32 %12580, i32* %3
%12581 = load i32, i32* %3
%12582 = srem i32 %12581, 268435443
store i32 %12582, i32* %3
%12583 = load i32, i32* %3
%12584 = add nsw i32 %12583, 6
store i32 %12584, i32* %3
%12585 = load i32, i32* %3
%12586 = mul nsw i32 %12585, 10
store i32 %12586, i32* %3
%12587 = load i32, i32* %3
%12588 = add nsw i32 %12587, 1
store i32 %12588, i32* %3
%12589 = load i32, i32* %3
%12590 = mul nsw i32 %12589, 2
store i32 %12590, i32* %3
%12591 = load i32, i32* %3
%12592 = sub nsw i32 %12591, 1
store i32 %12592, i32* %3
%12593 = load i32, i32* %3
%12594 = and i32 %12593, -1044481
store i32 %12594, i32* %3
%12595 = load i32, i32* %3
%12596 = xor i32 %12595, 81954
store i32 %12596, i32* %3
%12597 = load i32, i32* %3
%12598 = srem i32 %12597, 268435443
store i32 %12598, i32* %3
%12599 = load i32, i32* %3
%12600 = add nsw i32 %12599, 6
store i32 %12600, i32* %3
%12601 = load i32, i32* %3
%12602 = mul nsw i32 %12601, 10
store i32 %12602, i32* %3
%12603 = load i32, i32* %3
%12604 = add nsw i32 %12603, 1
store i32 %12604, i32* %3
%12605 = load i32, i32* %3
%12606 = mul nsw i32 %12605, 2
store i32 %12606, i32* %3
%12607 = load i32, i32* %3
%12608 = sub nsw i32 %12607, 1
store i32 %12608, i32* %3
%12609 = load i32, i32* %3
%12610 = and i32 %12609, -1044481
store i32 %12610, i32* %3
%12611 = load i32, i32* %3
%12612 = xor i32 %12611, 81954
store i32 %12612, i32* %3
%12613 = load i32, i32* %3
%12614 = srem i32 %12613, 268435443
store i32 %12614, i32* %3
%12615 = load i32, i32* %3
%12616 = add nsw i32 %12615, 6
store i32 %12616, i32* %3
%12617 = load i32, i32* %3
%12618 = mul nsw i32 %12617, 10
store i32 %12618, i32* %3
%12619 = load i32, i32* %3
%12620 = add nsw i32 %12619, 1
store i32 %12620, i32* %3
%12621 = load i32, i32* %3
%12622 = mul nsw i32 %12621, 2
store i32 %12622, i32* %3
%12623 = load i32, i32* %3
%12624 = sub nsw i32 %12623, 1
store i32 %12624, i32* %3
%12625 = load i32, i32* %3
%12626 = and i32 %12625, -1044481
store i32 %12626, i32* %3
%12627 = load i32, i32* %3
%12628 = xor i32 %12627, 81954
store i32 %12628, i32* %3
%12629 = load i32, i32* %3
%12630 = srem i32 %12629, 268435443
store i32 %12630, i32* %3
%12631 = load i32, i32* %3
%12632 = add nsw i32 %12631, 6
store i32 %12632, i32* %3
%12633 = load i32, i32* %3
%12634 = mul nsw i32 %12633, 10
store i32 %12634, i32* %3
%12635 = load i32, i32* %3
%12636 = add nsw i32 %12635, 1
store i32 %12636, i32* %3
%12637 = load i32, i32* %3
%12638 = mul nsw i32 %12637, 2
store i32 %12638, i32* %3
%12639 = load i32, i32* %3
%12640 = sub nsw i32 %12639, 1
store i32 %12640, i32* %3
%12641 = load i32, i32* %3
%12642 = and i32 %12641, -1044481
store i32 %12642, i32* %3
%12643 = load i32, i32* %3
%12644 = xor i32 %12643, 81954
store i32 %12644, i32* %3
%12645 = load i32, i32* %3
%12646 = srem i32 %12645, 268435443
store i32 %12646, i32* %3
%12647 = load i32, i32* %3
%12648 = add nsw i32 %12647, 6
store i32 %12648, i32* %3
%12649 = load i32, i32* %3
%12650 = mul nsw i32 %12649, 10
store i32 %12650, i32* %3
%12651 = load i32, i32* %3
%12652 = add nsw i32 %12651, 1
store i32 %12652, i32* %3
%12653 = load i32, i32* %3
%12654 = mul nsw i32 %12653, 2
store i32 %12654, i32* %3
%12655 = load i32, i32* %3
%12656 = sub nsw i32 %12655, 1
store i32 %12656, i32* %3
%12657 = load i32, i32* %3
%12658 = and i32 %12657, -1044481
store i32 %12658, i32* %3
%12659 = load i32, i32* %3
%12660 = xor i32 %12659, 81954
store i32 %12660, i32* %3
%12661 = load i32, i32* %3
%12662 = srem i32 %12661, 268435443
store i32 %12662, i32* %3
%12663 = load i32, i32* %3
%12664 = add nsw i32 %12663, 6
store i32 %12664, i32* %3
%12665 = load i32, i32* %3
%12666 = mul nsw i32 %12665, 10
store i32 %12666, i32* %3
%12667 = load i32, i32* %3
%12668 = add nsw i32 %12667, 1
store i32 %12668, i32* %3
%12669 = load i32, i32* %3
%12670 = mul nsw i32 %12669, 2
store i32 %12670, i32* %3
%12671 = load i32, i32* %3
%12672 = sub nsw i32 %12671, 1
store i32 %12672, i32* %3
%12673 = load i32, i32* %3
%12674 = and i32 %12673, -1044481
store i32 %12674, i32* %3
%12675 = load i32, i32* %3
%12676 = xor i32 %12675, 81954
store i32 %12676, i32* %3
%12677 = load i32, i32* %3
%12678 = srem i32 %12677, 268435443
store i32 %12678, i32* %3
%12679 = load i32, i32* %3
%12680 = add nsw i32 %12679, 6
store i32 %12680, i32* %3
%12681 = load i32, i32* %3
%12682 = mul nsw i32 %12681, 10
store i32 %12682, i32* %3
%12683 = load i32, i32* %3
%12684 = add nsw i32 %12683, 1
store i32 %12684, i32* %3
%12685 = load i32, i32* %3
%12686 = mul nsw i32 %12685, 2
store i32 %12686, i32* %3
%12687 = load i32, i32* %3
%12688 = sub nsw i32 %12687, 1
store i32 %12688, i32* %3
%12689 = load i32, i32* %3
%12690 = and i32 %12689, -1044481
store i32 %12690, i32* %3
%12691 = load i32, i32* %3
%12692 = xor i32 %12691, 81954
store i32 %12692, i32* %3
%12693 = load i32, i32* %3
%12694 = srem i32 %12693, 268435443
store i32 %12694, i32* %3
%12695 = load i32, i32* %3
%12696 = add nsw i32 %12695, 6
store i32 %12696, i32* %3
%12697 = load i32, i32* %3
%12698 = mul nsw i32 %12697, 10
store i32 %12698, i32* %3
%12699 = load i32, i32* %3
%12700 = add nsw i32 %12699, 1
store i32 %12700, i32* %3
%12701 = load i32, i32* %3
%12702 = mul nsw i32 %12701, 2
store i32 %12702, i32* %3
%12703 = load i32, i32* %3
%12704 = sub nsw i32 %12703, 1
store i32 %12704, i32* %3
%12705 = load i32, i32* %3
%12706 = and i32 %12705, -1044481
store i32 %12706, i32* %3
%12707 = load i32, i32* %3
%12708 = xor i32 %12707, 81954
store i32 %12708, i32* %3
%12709 = load i32, i32* %3
%12710 = srem i32 %12709, 268435443
store i32 %12710, i32* %3
%12711 = load i32, i32* %3
%12712 = add nsw i32 %12711, 6
store i32 %12712, i32* %3
%12713 = load i32, i32* %3
%12714 = mul nsw i32 %12713, 10
store i32 %12714, i32* %3
%12715 = load i32, i32* %3
%12716 = add nsw i32 %12715, 1
store i32 %12716, i32* %3
%12717 = load i32, i32* %3
%12718 = mul nsw i32 %12717, 2
store i32 %12718, i32* %3
%12719 = load i32, i32* %3
%12720 = sub nsw i32 %12719, 1
store i32 %12720, i32* %3
%12721 = load i32, i32* %3
%12722 = and i32 %12721, -1044481
store i32 %12722, i32* %3
%12723 = load i32, i32* %3
%12724 = xor i32 %12723, 81954
store i32 %12724, i32* %3
%12725 = load i32, i32* %3
%12726 = srem i32 %12725, 268435443
store i32 %12726, i32* %3
%12727 = load i32, i32* %3
%12728 = add nsw i32 %12727, 6
store i32 %12728, i32* %3
%12729 = load i32, i32* %3
%12730 = mul nsw i32 %12729, 10
store i32 %12730, i32* %3
%12731 = load i32, i32* %3
%12732 = add nsw i32 %12731, 1
store i32 %12732, i32* %3
%12733 = load i32, i32* %3
%12734 = mul nsw i32 %12733, 2
store i32 %12734, i32* %3
%12735 = load i32, i32* %3
%12736 = sub nsw i32 %12735, 1
store i32 %12736, i32* %3
%12737 = load i32, i32* %3
%12738 = and i32 %12737, -1044481
store i32 %12738, i32* %3
%12739 = load i32, i32* %3
%12740 = xor i32 %12739, 81954
store i32 %12740, i32* %3
%12741 = load i32, i32* %3
%12742 = srem i32 %12741, 268435443
store i32 %12742, i32* %3
%12743 = load i32, i32* %3
%12744 = add nsw i32 %12743, 6
store i32 %12744, i32* %3
%12745 = load i32, i32* %3
%12746 = mul nsw i32 %12745, 10
store i32 %12746, i32* %3
%12747 = load i32, i32* %3
%12748 = add nsw i32 %12747, 1
store i32 %12748, i32* %3
%12749 = load i32, i32* %3
%12750 = mul nsw i32 %12749, 2
store i32 %12750, i32* %3
%12751 = load i32, i32* %3
%12752 = sub nsw i32 %12751, 1
store i32 %12752, i32* %3
%12753 = load i32, i32* %3
%12754 = and i32 %12753, -1044481
store i32 %12754, i32* %3
%12755 = load i32, i32* %3
%12756 = xor i32 %12755, 81954
store i32 %12756, i32* %3
%12757 = load i32, i32* %3
%12758 = srem i32 %12757, 268435443
store i32 %12758, i32* %3
%12759 = load i32, i32* %3
%12760 = add nsw i32 %12759, 6
store i32 %12760, i32* %3
%12761 = load i32, i32* %3
%12762 = mul nsw i32 %12761, 10
store i32 %12762, i32* %3
%12763 = load i32, i32* %3
%12764 = add nsw i32 %12763, 1
store i32 %12764, i32* %3
%12765 = load i32, i32* %3
%12766 = mul nsw i32 %12765, 2
store i32 %12766, i32* %3
%12767 = load i32, i32* %3
%12768 = sub nsw i32 %12767, 1
store i32 %12768, i32* %3
%12769 = load i32, i32* %3
%12770 = and i32 %12769, -1044481
store i32 %12770, i32* %3
%12771 = load i32, i32* %3
%12772 = xor i32 %12771, 81954
store i32 %12772, i32* %3
%12773 = load i32, i32* %3
%12774 = srem i32 %12773, 268435443
store i32 %12774, i32* %3
%12775 = load i32, i32* %3
%12776 = add nsw i32 %12775, 6
store i32 %12776, i32* %3
%12777 = load i32, i32* %3
%12778 = mul nsw i32 %12777, 10
store i32 %12778, i32* %3
%12779 = load i32, i32* %3
%12780 = add nsw i32 %12779, 1
store i32 %12780, i32* %3
%12781 = load i32, i32* %3
%12782 = mul nsw i32 %12781, 2
store i32 %12782, i32* %3
%12783 = load i32, i32* %3
%12784 = sub nsw i32 %12783, 1
store i32 %12784, i32* %3
%12785 = load i32, i32* %3
%12786 = and i32 %12785, -1044481
store i32 %12786, i32* %3
%12787 = load i32, i32* %3
%12788 = xor i32 %12787, 81954
store i32 %12788, i32* %3
%12789 = load i32, i32* %3
%12790 = srem i32 %12789, 268435443
store i32 %12790, i32* %3
%12791 = load i32, i32* %3
%12792 = add nsw i32 %12791, 6
store i32 %12792, i32* %3
%12793 = load i32, i32* %3
%12794 = mul nsw i32 %12793, 10
store i32 %12794, i32* %3
%12795 = load i32, i32* %3
%12796 = add nsw i32 %12795, 1
store i32 %12796, i32* %3
%12797 = load i32, i32* %3
%12798 = mul nsw i32 %12797, 2
store i32 %12798, i32* %3
%12799 = load i32, i32* %3
%12800 = sub nsw i32 %12799, 1
store i32 %12800, i32* %3
%12801 = load i32, i32* %3
%12802 = and i32 %12801, -1044481
store i32 %12802, i32* %3
%12803 = load i32, i32* %3
%12804 = xor i32 %12803, 81954
store i32 %12804, i32* %3
%12805 = load i32, i32* %3
%12806 = srem i32 %12805, 268435443
store i32 %12806, i32* %3
%12807 = load i32, i32* %3
%12808 = add nsw i32 %12807, 6
store i32 %12808, i32* %3
%12809 = load i32, i32* %3
%12810 = mul nsw i32 %12809, 10
store i32 %12810, i32* %3
%12811 = load i32, i32* %3
%12812 = add nsw i32 %12811, 1
store i32 %12812, i32* %3
%12813 = load i32, i32* %3
%12814 = mul nsw i32 %12813, 2
store i32 %12814, i32* %3
%12815 = load i32, i32* %3
%12816 = sub nsw i32 %12815, 1
store i32 %12816, i32* %3
%12817 = load i32, i32* %3
%12818 = and i32 %12817, -1044481
store i32 %12818, i32* %3
%12819 = load i32, i32* %3
%12820 = xor i32 %12819, 81954
store i32 %12820, i32* %3
%12821 = load i32, i32* %3
%12822 = srem i32 %12821, 268435443
store i32 %12822, i32* %3
%12823 = load i32, i32* %3
%12824 = add nsw i32 %12823, 6
store i32 %12824, i32* %3
%12825 = load i32, i32* %3
%12826 = mul nsw i32 %12825, 10
store i32 %12826, i32* %3
%12827 = load i32, i32* %3
%12828 = add nsw i32 %12827, 1
store i32 %12828, i32* %3
%12829 = load i32, i32* %3
%12830 = mul nsw i32 %12829, 2
store i32 %12830, i32* %3
%12831 = load i32, i32* %3
%12832 = sub nsw i32 %12831, 1
store i32 %12832, i32* %3
%12833 = load i32, i32* %3
%12834 = and i32 %12833, -1044481
store i32 %12834, i32* %3
%12835 = load i32, i32* %3
%12836 = xor i32 %12835, 81954
store i32 %12836, i32* %3
%12837 = load i32, i32* %3
%12838 = srem i32 %12837, 268435443
store i32 %12838, i32* %3
%12839 = load i32, i32* %3
%12840 = add nsw i32 %12839, 6
store i32 %12840, i32* %3
%12841 = load i32, i32* %3
%12842 = mul nsw i32 %12841, 10
store i32 %12842, i32* %3
%12843 = load i32, i32* %3
%12844 = add nsw i32 %12843, 1
store i32 %12844, i32* %3
%12845 = load i32, i32* %3
%12846 = mul nsw i32 %12845, 2
store i32 %12846, i32* %3
%12847 = load i32, i32* %3
%12848 = sub nsw i32 %12847, 1
store i32 %12848, i32* %3
%12849 = load i32, i32* %3
%12850 = and i32 %12849, -1044481
store i32 %12850, i32* %3
%12851 = load i32, i32* %3
%12852 = xor i32 %12851, 81954
store i32 %12852, i32* %3
%12853 = load i32, i32* %3
%12854 = srem i32 %12853, 268435443
store i32 %12854, i32* %3
%12855 = load i32, i32* %3
%12856 = add nsw i32 %12855, 6
store i32 %12856, i32* %3
%12857 = load i32, i32* %3
%12858 = mul nsw i32 %12857, 10
store i32 %12858, i32* %3
%12859 = load i32, i32* %3
%12860 = add nsw i32 %12859, 1
store i32 %12860, i32* %3
%12861 = load i32, i32* %3
%12862 = mul nsw i32 %12861, 2
store i32 %12862, i32* %3
%12863 = load i32, i32* %3
%12864 = sub nsw i32 %12863, 1
store i32 %12864, i32* %3
%12865 = load i32, i32* %3
%12866 = and i32 %12865, -1044481
store i32 %12866, i32* %3
%12867 = load i32, i32* %3
%12868 = xor i32 %12867, 81954
store i32 %12868, i32* %3
%12869 = load i32, i32* %3
%12870 = srem i32 %12869, 268435443
store i32 %12870, i32* %3
%12871 = load i32, i32* %3
%12872 = add nsw i32 %12871, 6
store i32 %12872, i32* %3
%12873 = load i32, i32* %3
%12874 = mul nsw i32 %12873, 10
store i32 %12874, i32* %3
%12875 = load i32, i32* %3
%12876 = add nsw i32 %12875, 1
store i32 %12876, i32* %3
%12877 = load i32, i32* %3
%12878 = mul nsw i32 %12877, 2
store i32 %12878, i32* %3
%12879 = load i32, i32* %3
%12880 = sub nsw i32 %12879, 1
store i32 %12880, i32* %3
%12881 = load i32, i32* %3
%12882 = and i32 %12881, -1044481
store i32 %12882, i32* %3
%12883 = load i32, i32* %3
%12884 = xor i32 %12883, 81954
store i32 %12884, i32* %3
%12885 = load i32, i32* %3
%12886 = srem i32 %12885, 268435443
store i32 %12886, i32* %3
%12887 = load i32, i32* %3
%12888 = add nsw i32 %12887, 6
store i32 %12888, i32* %3
%12889 = load i32, i32* %3
%12890 = mul nsw i32 %12889, 10
store i32 %12890, i32* %3
%12891 = load i32, i32* %3
%12892 = add nsw i32 %12891, 1
store i32 %12892, i32* %3
%12893 = load i32, i32* %3
%12894 = mul nsw i32 %12893, 2
store i32 %12894, i32* %3
%12895 = load i32, i32* %3
%12896 = sub nsw i32 %12895, 1
store i32 %12896, i32* %3
%12897 = load i32, i32* %3
%12898 = and i32 %12897, -1044481
store i32 %12898, i32* %3
%12899 = load i32, i32* %3
%12900 = xor i32 %12899, 81954
store i32 %12900, i32* %3
%12901 = load i32, i32* %3
%12902 = srem i32 %12901, 268435443
store i32 %12902, i32* %3
%12903 = load i32, i32* %3
%12904 = add nsw i32 %12903, 6
store i32 %12904, i32* %3
%12905 = load i32, i32* %3
%12906 = mul nsw i32 %12905, 10
store i32 %12906, i32* %3
%12907 = load i32, i32* %3
%12908 = add nsw i32 %12907, 1
store i32 %12908, i32* %3
%12909 = load i32, i32* %3
%12910 = mul nsw i32 %12909, 2
store i32 %12910, i32* %3
%12911 = load i32, i32* %3
%12912 = sub nsw i32 %12911, 1
store i32 %12912, i32* %3
%12913 = load i32, i32* %3
%12914 = and i32 %12913, -1044481
store i32 %12914, i32* %3
%12915 = load i32, i32* %3
%12916 = xor i32 %12915, 81954
store i32 %12916, i32* %3
%12917 = load i32, i32* %3
%12918 = srem i32 %12917, 268435443
store i32 %12918, i32* %3
%12919 = load i32, i32* %3
%12920 = add nsw i32 %12919, 6
store i32 %12920, i32* %3
%12921 = load i32, i32* %3
%12922 = mul nsw i32 %12921, 10
store i32 %12922, i32* %3
%12923 = load i32, i32* %3
%12924 = add nsw i32 %12923, 1
store i32 %12924, i32* %3
%12925 = load i32, i32* %3
%12926 = mul nsw i32 %12925, 2
store i32 %12926, i32* %3
%12927 = load i32, i32* %3
%12928 = sub nsw i32 %12927, 1
store i32 %12928, i32* %3
%12929 = load i32, i32* %3
%12930 = and i32 %12929, -1044481
store i32 %12930, i32* %3
%12931 = load i32, i32* %3
%12932 = xor i32 %12931, 81954
store i32 %12932, i32* %3
%12933 = load i32, i32* %3
%12934 = srem i32 %12933, 268435443
store i32 %12934, i32* %3
%12935 = load i32, i32* %3
%12936 = add nsw i32 %12935, 6
store i32 %12936, i32* %3
%12937 = load i32, i32* %3
%12938 = mul nsw i32 %12937, 10
store i32 %12938, i32* %3
%12939 = load i32, i32* %3
%12940 = add nsw i32 %12939, 1
store i32 %12940, i32* %3
%12941 = load i32, i32* %3
%12942 = mul nsw i32 %12941, 2
store i32 %12942, i32* %3
%12943 = load i32, i32* %3
%12944 = sub nsw i32 %12943, 1
store i32 %12944, i32* %3
%12945 = load i32, i32* %3
%12946 = and i32 %12945, -1044481
store i32 %12946, i32* %3
%12947 = load i32, i32* %3
%12948 = xor i32 %12947, 81954
store i32 %12948, i32* %3
%12949 = load i32, i32* %3
%12950 = srem i32 %12949, 268435443
store i32 %12950, i32* %3
%12951 = load i32, i32* %3
%12952 = add nsw i32 %12951, 6
store i32 %12952, i32* %3
%12953 = load i32, i32* %3
%12954 = mul nsw i32 %12953, 10
store i32 %12954, i32* %3
%12955 = load i32, i32* %3
%12956 = add nsw i32 %12955, 1
store i32 %12956, i32* %3
%12957 = load i32, i32* %3
%12958 = mul nsw i32 %12957, 2
store i32 %12958, i32* %3
%12959 = load i32, i32* %3
%12960 = sub nsw i32 %12959, 1
store i32 %12960, i32* %3
%12961 = load i32, i32* %3
%12962 = and i32 %12961, -1044481
store i32 %12962, i32* %3
%12963 = load i32, i32* %3
%12964 = xor i32 %12963, 81954
store i32 %12964, i32* %3
%12965 = load i32, i32* %3
%12966 = srem i32 %12965, 268435443
store i32 %12966, i32* %3
%12967 = load i32, i32* %3
%12968 = add nsw i32 %12967, 6
store i32 %12968, i32* %3
%12969 = load i32, i32* %3
%12970 = mul nsw i32 %12969, 10
store i32 %12970, i32* %3
%12971 = load i32, i32* %3
%12972 = add nsw i32 %12971, 1
store i32 %12972, i32* %3
%12973 = load i32, i32* %3
%12974 = mul nsw i32 %12973, 2
store i32 %12974, i32* %3
%12975 = load i32, i32* %3
%12976 = sub nsw i32 %12975, 1
store i32 %12976, i32* %3
%12977 = load i32, i32* %3
%12978 = and i32 %12977, -1044481
store i32 %12978, i32* %3
%12979 = load i32, i32* %3
%12980 = xor i32 %12979, 81954
store i32 %12980, i32* %3
%12981 = load i32, i32* %3
%12982 = srem i32 %12981, 268435443
store i32 %12982, i32* %3
%12983 = load i32, i32* %3
%12984 = add nsw i32 %12983, 6
store i32 %12984, i32* %3
%12985 = load i32, i32* %3
%12986 = mul nsw i32 %12985, 10
store i32 %12986, i32* %3
%12987 = load i32, i32* %3
%12988 = add nsw i32 %12987, 1
store i32 %12988, i32* %3
%12989 = load i32, i32* %3
%12990 = mul nsw i32 %12989, 2
store i32 %12990, i32* %3
%12991 = load i32, i32* %3
%12992 = sub nsw i32 %12991, 1
store i32 %12992, i32* %3
%12993 = load i32, i32* %3
%12994 = and i32 %12993, -1044481
store i32 %12994, i32* %3
%12995 = load i32, i32* %3
%12996 = xor i32 %12995, 81954
store i32 %12996, i32* %3
%12997 = load i32, i32* %3
%12998 = srem i32 %12997, 268435443
store i32 %12998, i32* %3
%12999 = load i32, i32* %3
%13000 = add nsw i32 %12999, 6
store i32 %13000, i32* %3
%13001 = load i32, i32* %3
%13002 = mul nsw i32 %13001, 10
store i32 %13002, i32* %3
%13003 = load i32, i32* %3
%13004 = add nsw i32 %13003, 1
store i32 %13004, i32* %3
%13005 = load i32, i32* %3
%13006 = mul nsw i32 %13005, 2
store i32 %13006, i32* %3
%13007 = load i32, i32* %3
%13008 = sub nsw i32 %13007, 1
store i32 %13008, i32* %3
%13009 = load i32, i32* %3
%13010 = and i32 %13009, -1044481
store i32 %13010, i32* %3
%13011 = load i32, i32* %3
%13012 = xor i32 %13011, 81954
store i32 %13012, i32* %3
%13013 = load i32, i32* %3
%13014 = srem i32 %13013, 268435443
store i32 %13014, i32* %3
%13015 = load i32, i32* %3
%13016 = add nsw i32 %13015, 6
store i32 %13016, i32* %3
%13017 = load i32, i32* %3
%13018 = mul nsw i32 %13017, 10
store i32 %13018, i32* %3
%13019 = load i32, i32* %3
%13020 = add nsw i32 %13019, 1
store i32 %13020, i32* %3
%13021 = load i32, i32* %3
%13022 = mul nsw i32 %13021, 2
store i32 %13022, i32* %3
%13023 = load i32, i32* %3
%13024 = sub nsw i32 %13023, 1
store i32 %13024, i32* %3
%13025 = load i32, i32* %3
%13026 = and i32 %13025, -1044481
store i32 %13026, i32* %3
%13027 = load i32, i32* %3
%13028 = xor i32 %13027, 81954
store i32 %13028, i32* %3
%13029 = load i32, i32* %3
%13030 = srem i32 %13029, 268435443
store i32 %13030, i32* %3
%13031 = load i32, i32* %3
%13032 = add nsw i32 %13031, 6
store i32 %13032, i32* %3
%13033 = load i32, i32* %3
%13034 = mul nsw i32 %13033, 10
store i32 %13034, i32* %3
%13035 = load i32, i32* %3
%13036 = add nsw i32 %13035, 1
store i32 %13036, i32* %3
%13037 = load i32, i32* %3
%13038 = mul nsw i32 %13037, 2
store i32 %13038, i32* %3
%13039 = load i32, i32* %3
%13040 = sub nsw i32 %13039, 1
store i32 %13040, i32* %3
%13041 = load i32, i32* %3
%13042 = and i32 %13041, -1044481
store i32 %13042, i32* %3
%13043 = load i32, i32* %3
%13044 = xor i32 %13043, 81954
store i32 %13044, i32* %3
%13045 = load i32, i32* %3
%13046 = srem i32 %13045, 268435443
store i32 %13046, i32* %3
%13047 = load i32, i32* %3
%13048 = add nsw i32 %13047, 6
store i32 %13048, i32* %3
%13049 = load i32, i32* %3
%13050 = mul nsw i32 %13049, 10
store i32 %13050, i32* %3
%13051 = load i32, i32* %3
%13052 = add nsw i32 %13051, 1
store i32 %13052, i32* %3
%13053 = load i32, i32* %3
%13054 = mul nsw i32 %13053, 2
store i32 %13054, i32* %3
%13055 = load i32, i32* %3
%13056 = sub nsw i32 %13055, 1
store i32 %13056, i32* %3
%13057 = load i32, i32* %3
%13058 = and i32 %13057, -1044481
store i32 %13058, i32* %3
%13059 = load i32, i32* %3
%13060 = xor i32 %13059, 81954
store i32 %13060, i32* %3
%13061 = load i32, i32* %3
%13062 = srem i32 %13061, 268435443
store i32 %13062, i32* %3
%13063 = load i32, i32* %3
%13064 = add nsw i32 %13063, 6
store i32 %13064, i32* %3
%13065 = load i32, i32* %3
%13066 = mul nsw i32 %13065, 10
store i32 %13066, i32* %3
%13067 = load i32, i32* %3
%13068 = add nsw i32 %13067, 1
store i32 %13068, i32* %3
%13069 = load i32, i32* %3
%13070 = mul nsw i32 %13069, 2
store i32 %13070, i32* %3
%13071 = load i32, i32* %3
%13072 = sub nsw i32 %13071, 1
store i32 %13072, i32* %3
%13073 = load i32, i32* %3
%13074 = and i32 %13073, -1044481
store i32 %13074, i32* %3
%13075 = load i32, i32* %3
%13076 = xor i32 %13075, 81954
store i32 %13076, i32* %3
%13077 = load i32, i32* %3
%13078 = srem i32 %13077, 268435443
store i32 %13078, i32* %3
%13079 = load i32, i32* %3
%13080 = add nsw i32 %13079, 6
store i32 %13080, i32* %3
%13081 = load i32, i32* %3
%13082 = mul nsw i32 %13081, 10
store i32 %13082, i32* %3
%13083 = load i32, i32* %3
%13084 = add nsw i32 %13083, 1
store i32 %13084, i32* %3
%13085 = load i32, i32* %3
%13086 = mul nsw i32 %13085, 2
store i32 %13086, i32* %3
%13087 = load i32, i32* %3
%13088 = sub nsw i32 %13087, 1
store i32 %13088, i32* %3
%13089 = load i32, i32* %3
%13090 = and i32 %13089, -1044481
store i32 %13090, i32* %3
%13091 = load i32, i32* %3
%13092 = xor i32 %13091, 81954
store i32 %13092, i32* %3
%13093 = load i32, i32* %3
%13094 = srem i32 %13093, 268435443
store i32 %13094, i32* %3
%13095 = load i32, i32* %3
%13096 = add nsw i32 %13095, 6
store i32 %13096, i32* %3
%13097 = load i32, i32* %3
%13098 = mul nsw i32 %13097, 10
store i32 %13098, i32* %3
%13099 = load i32, i32* %3
%13100 = add nsw i32 %13099, 1
store i32 %13100, i32* %3
%13101 = load i32, i32* %3
%13102 = mul nsw i32 %13101, 2
store i32 %13102, i32* %3
%13103 = load i32, i32* %3
%13104 = sub nsw i32 %13103, 1
store i32 %13104, i32* %3
%13105 = load i32, i32* %3
%13106 = and i32 %13105, -1044481
store i32 %13106, i32* %3
%13107 = load i32, i32* %3
%13108 = xor i32 %13107, 81954
store i32 %13108, i32* %3
%13109 = load i32, i32* %3
%13110 = srem i32 %13109, 268435443
store i32 %13110, i32* %3
%13111 = load i32, i32* %3
%13112 = add nsw i32 %13111, 6
store i32 %13112, i32* %3
%13113 = load i32, i32* %3
%13114 = mul nsw i32 %13113, 10
store i32 %13114, i32* %3
%13115 = load i32, i32* %3
%13116 = add nsw i32 %13115, 1
store i32 %13116, i32* %3
%13117 = load i32, i32* %3
%13118 = mul nsw i32 %13117, 2
store i32 %13118, i32* %3
%13119 = load i32, i32* %3
%13120 = sub nsw i32 %13119, 1
store i32 %13120, i32* %3
%13121 = load i32, i32* %3
%13122 = and i32 %13121, -1044481
store i32 %13122, i32* %3
%13123 = load i32, i32* %3
%13124 = xor i32 %13123, 81954
store i32 %13124, i32* %3
%13125 = load i32, i32* %3
%13126 = srem i32 %13125, 268435443
store i32 %13126, i32* %3
%13127 = load i32, i32* %3
%13128 = add nsw i32 %13127, 6
store i32 %13128, i32* %3
%13129 = load i32, i32* %3
%13130 = mul nsw i32 %13129, 10
store i32 %13130, i32* %3
%13131 = load i32, i32* %3
%13132 = add nsw i32 %13131, 1
store i32 %13132, i32* %3
%13133 = load i32, i32* %3
%13134 = mul nsw i32 %13133, 2
store i32 %13134, i32* %3
%13135 = load i32, i32* %3
%13136 = sub nsw i32 %13135, 1
store i32 %13136, i32* %3
%13137 = load i32, i32* %3
%13138 = and i32 %13137, -1044481
store i32 %13138, i32* %3
%13139 = load i32, i32* %3
%13140 = xor i32 %13139, 81954
store i32 %13140, i32* %3
%13141 = load i32, i32* %3
%13142 = srem i32 %13141, 268435443
store i32 %13142, i32* %3
%13143 = load i32, i32* %3
%13144 = add nsw i32 %13143, 6
store i32 %13144, i32* %3
%13145 = load i32, i32* %3
%13146 = mul nsw i32 %13145, 10
store i32 %13146, i32* %3
%13147 = load i32, i32* %3
%13148 = add nsw i32 %13147, 1
store i32 %13148, i32* %3
%13149 = load i32, i32* %3
%13150 = mul nsw i32 %13149, 2
store i32 %13150, i32* %3
%13151 = load i32, i32* %3
%13152 = sub nsw i32 %13151, 1
store i32 %13152, i32* %3
%13153 = load i32, i32* %3
%13154 = and i32 %13153, -1044481
store i32 %13154, i32* %3
%13155 = load i32, i32* %3
%13156 = xor i32 %13155, 81954
store i32 %13156, i32* %3
%13157 = load i32, i32* %3
%13158 = srem i32 %13157, 268435443
store i32 %13158, i32* %3
%13159 = load i32, i32* %3
%13160 = add nsw i32 %13159, 6
store i32 %13160, i32* %3
%13161 = load i32, i32* %3
%13162 = mul nsw i32 %13161, 10
store i32 %13162, i32* %3
%13163 = load i32, i32* %3
%13164 = add nsw i32 %13163, 1
store i32 %13164, i32* %3
%13165 = load i32, i32* %3
%13166 = mul nsw i32 %13165, 2
store i32 %13166, i32* %3
%13167 = load i32, i32* %3
%13168 = sub nsw i32 %13167, 1
store i32 %13168, i32* %3
%13169 = load i32, i32* %3
%13170 = and i32 %13169, -1044481
store i32 %13170, i32* %3
%13171 = load i32, i32* %3
%13172 = xor i32 %13171, 81954
store i32 %13172, i32* %3
%13173 = load i32, i32* %3
%13174 = srem i32 %13173, 268435443
store i32 %13174, i32* %3
%13175 = load i32, i32* %3
%13176 = add nsw i32 %13175, 6
store i32 %13176, i32* %3
%13177 = load i32, i32* %3
%13178 = mul nsw i32 %13177, 10
store i32 %13178, i32* %3
%13179 = load i32, i32* %3
%13180 = add nsw i32 %13179, 1
store i32 %13180, i32* %3
%13181 = load i32, i32* %3
%13182 = mul nsw i32 %13181, 2
store i32 %13182, i32* %3
%13183 = load i32, i32* %3
%13184 = sub nsw i32 %13183, 1
store i32 %13184, i32* %3
%13185 = load i32, i32* %3
%13186 = and i32 %13185, -1044481
store i32 %13186, i32* %3
%13187 = load i32, i32* %3
%13188 = xor i32 %13187, 81954
store i32 %13188, i32* %3
%13189 = load i32, i32* %3
%13190 = srem i32 %13189, 268435443
store i32 %13190, i32* %3
%13191 = load i32, i32* %3
%13192 = add nsw i32 %13191, 6
store i32 %13192, i32* %3
%13193 = load i32, i32* %3
%13194 = mul nsw i32 %13193, 10
store i32 %13194, i32* %3
%13195 = load i32, i32* %3
%13196 = add nsw i32 %13195, 1
store i32 %13196, i32* %3
%13197 = load i32, i32* %3
%13198 = mul nsw i32 %13197, 2
store i32 %13198, i32* %3
%13199 = load i32, i32* %3
%13200 = sub nsw i32 %13199, 1
store i32 %13200, i32* %3
%13201 = load i32, i32* %3
%13202 = and i32 %13201, -1044481
store i32 %13202, i32* %3
%13203 = load i32, i32* %3
%13204 = xor i32 %13203, 81954
store i32 %13204, i32* %3
%13205 = load i32, i32* %3
%13206 = srem i32 %13205, 268435443
store i32 %13206, i32* %3
%13207 = load i32, i32* %3
%13208 = add nsw i32 %13207, 6
store i32 %13208, i32* %3
%13209 = load i32, i32* %3
%13210 = mul nsw i32 %13209, 10
store i32 %13210, i32* %3
%13211 = load i32, i32* %3
%13212 = add nsw i32 %13211, 1
store i32 %13212, i32* %3
%13213 = load i32, i32* %3
%13214 = mul nsw i32 %13213, 2
store i32 %13214, i32* %3
%13215 = load i32, i32* %3
%13216 = sub nsw i32 %13215, 1
store i32 %13216, i32* %3
%13217 = load i32, i32* %3
%13218 = and i32 %13217, -1044481
store i32 %13218, i32* %3
%13219 = load i32, i32* %3
%13220 = xor i32 %13219, 81954
store i32 %13220, i32* %3
%13221 = load i32, i32* %3
%13222 = srem i32 %13221, 268435443
store i32 %13222, i32* %3
%13223 = load i32, i32* %3
%13224 = add nsw i32 %13223, 6
store i32 %13224, i32* %3
%13225 = load i32, i32* %3
%13226 = mul nsw i32 %13225, 10
store i32 %13226, i32* %3
%13227 = load i32, i32* %3
%13228 = add nsw i32 %13227, 1
store i32 %13228, i32* %3
%13229 = load i32, i32* %3
%13230 = mul nsw i32 %13229, 2
store i32 %13230, i32* %3
%13231 = load i32, i32* %3
%13232 = sub nsw i32 %13231, 1
store i32 %13232, i32* %3
%13233 = load i32, i32* %3
%13234 = and i32 %13233, -1044481
store i32 %13234, i32* %3
%13235 = load i32, i32* %3
%13236 = xor i32 %13235, 81954
store i32 %13236, i32* %3
%13237 = load i32, i32* %3
%13238 = srem i32 %13237, 268435443
store i32 %13238, i32* %3
%13239 = load i32, i32* %3
%13240 = add nsw i32 %13239, 6
store i32 %13240, i32* %3
%13241 = load i32, i32* %3
%13242 = mul nsw i32 %13241, 10
store i32 %13242, i32* %3
%13243 = load i32, i32* %3
%13244 = add nsw i32 %13243, 1
store i32 %13244, i32* %3
%13245 = load i32, i32* %3
%13246 = mul nsw i32 %13245, 2
store i32 %13246, i32* %3
%13247 = load i32, i32* %3
%13248 = sub nsw i32 %13247, 1
store i32 %13248, i32* %3
%13249 = load i32, i32* %3
%13250 = and i32 %13249, -1044481
store i32 %13250, i32* %3
%13251 = load i32, i32* %3
%13252 = xor i32 %13251, 81954
store i32 %13252, i32* %3
%13253 = load i32, i32* %3
%13254 = srem i32 %13253, 268435443
store i32 %13254, i32* %3
%13255 = load i32, i32* %3
%13256 = add nsw i32 %13255, 6
store i32 %13256, i32* %3
%13257 = load i32, i32* %3
%13258 = mul nsw i32 %13257, 10
store i32 %13258, i32* %3
%13259 = load i32, i32* %3
%13260 = add nsw i32 %13259, 1
store i32 %13260, i32* %3
%13261 = load i32, i32* %3
%13262 = mul nsw i32 %13261, 2
store i32 %13262, i32* %3
%13263 = load i32, i32* %3
%13264 = sub nsw i32 %13263, 1
store i32 %13264, i32* %3
%13265 = load i32, i32* %3
%13266 = and i32 %13265, -1044481
store i32 %13266, i32* %3
%13267 = load i32, i32* %3
%13268 = xor i32 %13267, 81954
store i32 %13268, i32* %3
%13269 = load i32, i32* %3
%13270 = srem i32 %13269, 268435443
store i32 %13270, i32* %3
%13271 = load i32, i32* %3
%13272 = add nsw i32 %13271, 6
store i32 %13272, i32* %3
%13273 = load i32, i32* %3
%13274 = mul nsw i32 %13273, 10
store i32 %13274, i32* %3
%13275 = load i32, i32* %3
%13276 = add nsw i32 %13275, 1
store i32 %13276, i32* %3
%13277 = load i32, i32* %3
%13278 = mul nsw i32 %13277, 2
store i32 %13278, i32* %3
%13279 = load i32, i32* %3
%13280 = sub nsw i32 %13279, 1
store i32 %13280, i32* %3
%13281 = load i32, i32* %3
%13282 = and i32 %13281, -1044481
store i32 %13282, i32* %3
%13283 = load i32, i32* %3
%13284 = xor i32 %13283, 81954
store i32 %13284, i32* %3
%13285 = load i32, i32* %3
%13286 = srem i32 %13285, 268435443
store i32 %13286, i32* %3
%13287 = load i32, i32* %3
%13288 = add nsw i32 %13287, 6
store i32 %13288, i32* %3
%13289 = load i32, i32* %3
%13290 = mul nsw i32 %13289, 10
store i32 %13290, i32* %3
%13291 = load i32, i32* %3
%13292 = add nsw i32 %13291, 1
store i32 %13292, i32* %3
%13293 = load i32, i32* %3
%13294 = mul nsw i32 %13293, 2
store i32 %13294, i32* %3
%13295 = load i32, i32* %3
%13296 = sub nsw i32 %13295, 1
store i32 %13296, i32* %3
%13297 = load i32, i32* %3
%13298 = and i32 %13297, -1044481
store i32 %13298, i32* %3
%13299 = load i32, i32* %3
%13300 = xor i32 %13299, 81954
store i32 %13300, i32* %3
%13301 = load i32, i32* %3
%13302 = srem i32 %13301, 268435443
store i32 %13302, i32* %3
%13303 = load i32, i32* %3
%13304 = add nsw i32 %13303, 6
store i32 %13304, i32* %3
%13305 = load i32, i32* %3
%13306 = mul nsw i32 %13305, 10
store i32 %13306, i32* %3
%13307 = load i32, i32* %3
%13308 = add nsw i32 %13307, 1
store i32 %13308, i32* %3
%13309 = load i32, i32* %3
%13310 = mul nsw i32 %13309, 2
store i32 %13310, i32* %3
%13311 = load i32, i32* %3
%13312 = sub nsw i32 %13311, 1
store i32 %13312, i32* %3
%13313 = load i32, i32* %3
%13314 = and i32 %13313, -1044481
store i32 %13314, i32* %3
%13315 = load i32, i32* %3
%13316 = xor i32 %13315, 81954
store i32 %13316, i32* %3
%13317 = load i32, i32* %3
%13318 = srem i32 %13317, 268435443
store i32 %13318, i32* %3
%13319 = load i32, i32* %3
%13320 = add nsw i32 %13319, 6
store i32 %13320, i32* %3
%13321 = load i32, i32* %3
%13322 = mul nsw i32 %13321, 10
store i32 %13322, i32* %3
%13323 = load i32, i32* %3
%13324 = add nsw i32 %13323, 1
store i32 %13324, i32* %3
%13325 = load i32, i32* %3
%13326 = mul nsw i32 %13325, 2
store i32 %13326, i32* %3
%13327 = load i32, i32* %3
%13328 = sub nsw i32 %13327, 1
store i32 %13328, i32* %3
%13329 = load i32, i32* %3
%13330 = and i32 %13329, -1044481
store i32 %13330, i32* %3
%13331 = load i32, i32* %3
%13332 = xor i32 %13331, 81954
store i32 %13332, i32* %3
%13333 = load i32, i32* %3
%13334 = srem i32 %13333, 268435443
store i32 %13334, i32* %3
%13335 = load i32, i32* %3
%13336 = add nsw i32 %13335, 6
store i32 %13336, i32* %3
%13337 = load i32, i32* %3
%13338 = mul nsw i32 %13337, 10
store i32 %13338, i32* %3
%13339 = load i32, i32* %3
%13340 = add nsw i32 %13339, 1
store i32 %13340, i32* %3
%13341 = load i32, i32* %3
%13342 = mul nsw i32 %13341, 2
store i32 %13342, i32* %3
%13343 = load i32, i32* %3
%13344 = sub nsw i32 %13343, 1
store i32 %13344, i32* %3
%13345 = load i32, i32* %3
%13346 = and i32 %13345, -1044481
store i32 %13346, i32* %3
%13347 = load i32, i32* %3
%13348 = xor i32 %13347, 81954
store i32 %13348, i32* %3
%13349 = load i32, i32* %3
%13350 = srem i32 %13349, 268435443
store i32 %13350, i32* %3
%13351 = load i32, i32* %3
%13352 = add nsw i32 %13351, 6
store i32 %13352, i32* %3
%13353 = load i32, i32* %3
%13354 = mul nsw i32 %13353, 10
store i32 %13354, i32* %3
%13355 = load i32, i32* %3
%13356 = add nsw i32 %13355, 1
store i32 %13356, i32* %3
%13357 = load i32, i32* %3
%13358 = mul nsw i32 %13357, 2
store i32 %13358, i32* %3
%13359 = load i32, i32* %3
%13360 = sub nsw i32 %13359, 1
store i32 %13360, i32* %3
%13361 = load i32, i32* %3
%13362 = and i32 %13361, -1044481
store i32 %13362, i32* %3
%13363 = load i32, i32* %3
%13364 = xor i32 %13363, 81954
store i32 %13364, i32* %3
%13365 = load i32, i32* %3
%13366 = srem i32 %13365, 268435443
store i32 %13366, i32* %3
%13367 = load i32, i32* %3
%13368 = add nsw i32 %13367, 6
store i32 %13368, i32* %3
%13369 = load i32, i32* %3
%13370 = mul nsw i32 %13369, 10
store i32 %13370, i32* %3
%13371 = load i32, i32* %3
%13372 = add nsw i32 %13371, 1
store i32 %13372, i32* %3
%13373 = load i32, i32* %3
%13374 = mul nsw i32 %13373, 2
store i32 %13374, i32* %3
%13375 = load i32, i32* %3
%13376 = sub nsw i32 %13375, 1
store i32 %13376, i32* %3
%13377 = load i32, i32* %3
%13378 = and i32 %13377, -1044481
store i32 %13378, i32* %3
%13379 = load i32, i32* %3
%13380 = xor i32 %13379, 81954
store i32 %13380, i32* %3
%13381 = load i32, i32* %3
%13382 = srem i32 %13381, 268435443
store i32 %13382, i32* %3
%13383 = load i32, i32* %3
%13384 = add nsw i32 %13383, 6
store i32 %13384, i32* %3
%13385 = load i32, i32* %3
%13386 = mul nsw i32 %13385, 10
store i32 %13386, i32* %3
%13387 = load i32, i32* %3
%13388 = add nsw i32 %13387, 1
store i32 %13388, i32* %3
%13389 = load i32, i32* %3
%13390 = mul nsw i32 %13389, 2
store i32 %13390, i32* %3
%13391 = load i32, i32* %3
%13392 = sub nsw i32 %13391, 1
store i32 %13392, i32* %3
%13393 = load i32, i32* %3
%13394 = and i32 %13393, -1044481
store i32 %13394, i32* %3
%13395 = load i32, i32* %3
%13396 = xor i32 %13395, 81954
store i32 %13396, i32* %3
%13397 = load i32, i32* %3
%13398 = srem i32 %13397, 268435443
store i32 %13398, i32* %3
%13399 = load i32, i32* %3
%13400 = add nsw i32 %13399, 6
store i32 %13400, i32* %3
%13401 = load i32, i32* %3
%13402 = mul nsw i32 %13401, 10
store i32 %13402, i32* %3
%13403 = load i32, i32* %3
%13404 = add nsw i32 %13403, 1
store i32 %13404, i32* %3
%13405 = load i32, i32* %3
%13406 = mul nsw i32 %13405, 2
store i32 %13406, i32* %3
%13407 = load i32, i32* %3
%13408 = sub nsw i32 %13407, 1
store i32 %13408, i32* %3
%13409 = load i32, i32* %3
%13410 = and i32 %13409, -1044481
store i32 %13410, i32* %3
%13411 = load i32, i32* %3
%13412 = xor i32 %13411, 81954
store i32 %13412, i32* %3
%13413 = load i32, i32* %3
%13414 = srem i32 %13413, 268435443
store i32 %13414, i32* %3
%13415 = load i32, i32* %3
%13416 = add nsw i32 %13415, 6
store i32 %13416, i32* %3
%13417 = load i32, i32* %3
%13418 = mul nsw i32 %13417, 10
store i32 %13418, i32* %3
%13419 = load i32, i32* %3
%13420 = add nsw i32 %13419, 1
store i32 %13420, i32* %3
%13421 = load i32, i32* %3
%13422 = mul nsw i32 %13421, 2
store i32 %13422, i32* %3
%13423 = load i32, i32* %3
%13424 = sub nsw i32 %13423, 1
store i32 %13424, i32* %3
%13425 = load i32, i32* %3
%13426 = and i32 %13425, -1044481
store i32 %13426, i32* %3
%13427 = load i32, i32* %3
%13428 = xor i32 %13427, 81954
store i32 %13428, i32* %3
%13429 = load i32, i32* %3
%13430 = srem i32 %13429, 268435443
store i32 %13430, i32* %3
%13431 = load i32, i32* %3
%13432 = add nsw i32 %13431, 6
store i32 %13432, i32* %3
%13433 = load i32, i32* %3
%13434 = mul nsw i32 %13433, 10
store i32 %13434, i32* %3
%13435 = load i32, i32* %3
%13436 = add nsw i32 %13435, 1
store i32 %13436, i32* %3
%13437 = load i32, i32* %3
%13438 = mul nsw i32 %13437, 2
store i32 %13438, i32* %3
%13439 = load i32, i32* %3
%13440 = sub nsw i32 %13439, 1
store i32 %13440, i32* %3
%13441 = load i32, i32* %3
%13442 = and i32 %13441, -1044481
store i32 %13442, i32* %3
%13443 = load i32, i32* %3
%13444 = xor i32 %13443, 81954
store i32 %13444, i32* %3
%13445 = load i32, i32* %3
%13446 = srem i32 %13445, 268435443
store i32 %13446, i32* %3
%13447 = load i32, i32* %3
%13448 = add nsw i32 %13447, 6
store i32 %13448, i32* %3
%13449 = load i32, i32* %3
%13450 = mul nsw i32 %13449, 10
store i32 %13450, i32* %3
%13451 = load i32, i32* %3
%13452 = add nsw i32 %13451, 1
store i32 %13452, i32* %3
%13453 = load i32, i32* %3
%13454 = mul nsw i32 %13453, 2
store i32 %13454, i32* %3
%13455 = load i32, i32* %3
%13456 = sub nsw i32 %13455, 1
store i32 %13456, i32* %3
%13457 = load i32, i32* %3
%13458 = and i32 %13457, -1044481
store i32 %13458, i32* %3
%13459 = load i32, i32* %3
%13460 = xor i32 %13459, 81954
store i32 %13460, i32* %3
%13461 = load i32, i32* %3
%13462 = srem i32 %13461, 268435443
store i32 %13462, i32* %3
%13463 = load i32, i32* %3
%13464 = add nsw i32 %13463, 6
store i32 %13464, i32* %3
%13465 = load i32, i32* %3
%13466 = mul nsw i32 %13465, 10
store i32 %13466, i32* %3
%13467 = load i32, i32* %3
%13468 = add nsw i32 %13467, 1
store i32 %13468, i32* %3
%13469 = load i32, i32* %3
%13470 = mul nsw i32 %13469, 2
store i32 %13470, i32* %3
%13471 = load i32, i32* %3
%13472 = sub nsw i32 %13471, 1
store i32 %13472, i32* %3
%13473 = load i32, i32* %3
%13474 = and i32 %13473, -1044481
store i32 %13474, i32* %3
%13475 = load i32, i32* %3
%13476 = xor i32 %13475, 81954
store i32 %13476, i32* %3
%13477 = load i32, i32* %3
%13478 = srem i32 %13477, 268435443
store i32 %13478, i32* %3
%13479 = load i32, i32* %3
%13480 = add nsw i32 %13479, 6
store i32 %13480, i32* %3
%13481 = load i32, i32* %3
%13482 = mul nsw i32 %13481, 10
store i32 %13482, i32* %3
%13483 = load i32, i32* %3
%13484 = add nsw i32 %13483, 1
store i32 %13484, i32* %3
%13485 = load i32, i32* %3
%13486 = mul nsw i32 %13485, 2
store i32 %13486, i32* %3
%13487 = load i32, i32* %3
%13488 = sub nsw i32 %13487, 1
store i32 %13488, i32* %3
%13489 = load i32, i32* %3
%13490 = and i32 %13489, -1044481
store i32 %13490, i32* %3
%13491 = load i32, i32* %3
%13492 = xor i32 %13491, 81954
store i32 %13492, i32* %3
%13493 = load i32, i32* %3
%13494 = srem i32 %13493, 268435443
store i32 %13494, i32* %3
%13495 = load i32, i32* %3
%13496 = add nsw i32 %13495, 6
store i32 %13496, i32* %3
%13497 = load i32, i32* %3
%13498 = mul nsw i32 %13497, 10
store i32 %13498, i32* %3
%13499 = load i32, i32* %3
%13500 = add nsw i32 %13499, 1
store i32 %13500, i32* %3
%13501 = load i32, i32* %3
%13502 = mul nsw i32 %13501, 2
store i32 %13502, i32* %3
%13503 = load i32, i32* %3
%13504 = sub nsw i32 %13503, 1
store i32 %13504, i32* %3
%13505 = load i32, i32* %3
%13506 = and i32 %13505, -1044481
store i32 %13506, i32* %3
%13507 = load i32, i32* %3
%13508 = xor i32 %13507, 81954
store i32 %13508, i32* %3
%13509 = load i32, i32* %3
%13510 = srem i32 %13509, 268435443
store i32 %13510, i32* %3
%13511 = load i32, i32* %3
%13512 = add nsw i32 %13511, 6
store i32 %13512, i32* %3
%13513 = load i32, i32* %3
%13514 = mul nsw i32 %13513, 10
store i32 %13514, i32* %3
%13515 = load i32, i32* %3
%13516 = add nsw i32 %13515, 1
store i32 %13516, i32* %3
%13517 = load i32, i32* %3
%13518 = mul nsw i32 %13517, 2
store i32 %13518, i32* %3
%13519 = load i32, i32* %3
%13520 = sub nsw i32 %13519, 1
store i32 %13520, i32* %3
%13521 = load i32, i32* %3
%13522 = and i32 %13521, -1044481
store i32 %13522, i32* %3
%13523 = load i32, i32* %3
%13524 = xor i32 %13523, 81954
store i32 %13524, i32* %3
%13525 = load i32, i32* %3
%13526 = srem i32 %13525, 268435443
store i32 %13526, i32* %3
%13527 = load i32, i32* %3
%13528 = add nsw i32 %13527, 6
store i32 %13528, i32* %3
%13529 = load i32, i32* %3
%13530 = mul nsw i32 %13529, 10
store i32 %13530, i32* %3
%13531 = load i32, i32* %3
%13532 = add nsw i32 %13531, 1
store i32 %13532, i32* %3
%13533 = load i32, i32* %3
%13534 = mul nsw i32 %13533, 2
store i32 %13534, i32* %3
%13535 = load i32, i32* %3
%13536 = sub nsw i32 %13535, 1
store i32 %13536, i32* %3
%13537 = load i32, i32* %3
%13538 = and i32 %13537, -1044481
store i32 %13538, i32* %3
%13539 = load i32, i32* %3
%13540 = xor i32 %13539, 81954
store i32 %13540, i32* %3
%13541 = load i32, i32* %3
%13542 = srem i32 %13541, 268435443
store i32 %13542, i32* %3
%13543 = load i32, i32* %3
%13544 = add nsw i32 %13543, 6
store i32 %13544, i32* %3
%13545 = load i32, i32* %3
%13546 = mul nsw i32 %13545, 10
store i32 %13546, i32* %3
%13547 = load i32, i32* %3
%13548 = add nsw i32 %13547, 1
store i32 %13548, i32* %3
%13549 = load i32, i32* %3
%13550 = mul nsw i32 %13549, 2
store i32 %13550, i32* %3
%13551 = load i32, i32* %3
%13552 = sub nsw i32 %13551, 1
store i32 %13552, i32* %3
%13553 = load i32, i32* %3
%13554 = and i32 %13553, -1044481
store i32 %13554, i32* %3
%13555 = load i32, i32* %3
%13556 = xor i32 %13555, 81954
store i32 %13556, i32* %3
%13557 = load i32, i32* %3
%13558 = srem i32 %13557, 268435443
store i32 %13558, i32* %3
%13559 = load i32, i32* %3
%13560 = add nsw i32 %13559, 6
store i32 %13560, i32* %3
%13561 = load i32, i32* %3
%13562 = mul nsw i32 %13561, 10
store i32 %13562, i32* %3
%13563 = load i32, i32* %3
%13564 = add nsw i32 %13563, 1
store i32 %13564, i32* %3
%13565 = load i32, i32* %3
%13566 = mul nsw i32 %13565, 2
store i32 %13566, i32* %3
%13567 = load i32, i32* %3
%13568 = sub nsw i32 %13567, 1
store i32 %13568, i32* %3
%13569 = load i32, i32* %3
%13570 = and i32 %13569, -1044481
store i32 %13570, i32* %3
%13571 = load i32, i32* %3
%13572 = xor i32 %13571, 81954
store i32 %13572, i32* %3
%13573 = load i32, i32* %3
%13574 = srem i32 %13573, 268435443
store i32 %13574, i32* %3
%13575 = load i32, i32* %3
%13576 = add nsw i32 %13575, 6
store i32 %13576, i32* %3
%13577 = load i32, i32* %3
%13578 = mul nsw i32 %13577, 10
store i32 %13578, i32* %3
%13579 = load i32, i32* %3
%13580 = add nsw i32 %13579, 1
store i32 %13580, i32* %3
%13581 = load i32, i32* %3
%13582 = mul nsw i32 %13581, 2
store i32 %13582, i32* %3
%13583 = load i32, i32* %3
%13584 = sub nsw i32 %13583, 1
store i32 %13584, i32* %3
%13585 = load i32, i32* %3
%13586 = and i32 %13585, -1044481
store i32 %13586, i32* %3
%13587 = load i32, i32* %3
%13588 = xor i32 %13587, 81954
store i32 %13588, i32* %3
%13589 = load i32, i32* %3
%13590 = srem i32 %13589, 268435443
store i32 %13590, i32* %3
%13591 = load i32, i32* %3
%13592 = add nsw i32 %13591, 6
store i32 %13592, i32* %3
%13593 = load i32, i32* %3
%13594 = mul nsw i32 %13593, 10
store i32 %13594, i32* %3
%13595 = load i32, i32* %3
%13596 = add nsw i32 %13595, 1
store i32 %13596, i32* %3
%13597 = load i32, i32* %3
%13598 = mul nsw i32 %13597, 2
store i32 %13598, i32* %3
%13599 = load i32, i32* %3
%13600 = sub nsw i32 %13599, 1
store i32 %13600, i32* %3
%13601 = load i32, i32* %3
%13602 = and i32 %13601, -1044481
store i32 %13602, i32* %3
%13603 = load i32, i32* %3
%13604 = xor i32 %13603, 81954
store i32 %13604, i32* %3
%13605 = load i32, i32* %3
%13606 = srem i32 %13605, 268435443
store i32 %13606, i32* %3
%13607 = load i32, i32* %3
%13608 = add nsw i32 %13607, 6
store i32 %13608, i32* %3
%13609 = load i32, i32* %3
%13610 = mul nsw i32 %13609, 10
store i32 %13610, i32* %3
%13611 = load i32, i32* %3
%13612 = add nsw i32 %13611, 1
store i32 %13612, i32* %3
%13613 = load i32, i32* %3
%13614 = mul nsw i32 %13613, 2
store i32 %13614, i32* %3
%13615 = load i32, i32* %3
%13616 = sub nsw i32 %13615, 1
store i32 %13616, i32* %3
%13617 = load i32, i32* %3
%13618 = and i32 %13617, -1044481
store i32 %13618, i32* %3
%13619 = load i32, i32* %3
%13620 = xor i32 %13619, 81954
store i32 %13620, i32* %3
%13621 = load i32, i32* %3
%13622 = srem i32 %13621, 268435443
store i32 %13622, i32* %3
%13623 = load i32, i32* %3
%13624 = add nsw i32 %13623, 6
store i32 %13624, i32* %3
%13625 = load i32, i32* %3
%13626 = mul nsw i32 %13625, 10
store i32 %13626, i32* %3
%13627 = load i32, i32* %3
%13628 = add nsw i32 %13627, 1
store i32 %13628, i32* %3
%13629 = load i32, i32* %3
%13630 = mul nsw i32 %13629, 2
store i32 %13630, i32* %3
%13631 = load i32, i32* %3
%13632 = sub nsw i32 %13631, 1
store i32 %13632, i32* %3
%13633 = load i32, i32* %3
%13634 = and i32 %13633, -1044481
store i32 %13634, i32* %3
%13635 = load i32, i32* %3
%13636 = xor i32 %13635, 81954
store i32 %13636, i32* %3
%13637 = load i32, i32* %3
%13638 = srem i32 %13637, 268435443
store i32 %13638, i32* %3
%13639 = load i32, i32* %3
%13640 = add nsw i32 %13639, 6
store i32 %13640, i32* %3
%13641 = load i32, i32* %3
%13642 = mul nsw i32 %13641, 10
store i32 %13642, i32* %3
%13643 = load i32, i32* %3
%13644 = add nsw i32 %13643, 1
store i32 %13644, i32* %3
%13645 = load i32, i32* %3
%13646 = mul nsw i32 %13645, 2
store i32 %13646, i32* %3
%13647 = load i32, i32* %3
%13648 = sub nsw i32 %13647, 1
store i32 %13648, i32* %3
%13649 = load i32, i32* %3
%13650 = and i32 %13649, -1044481
store i32 %13650, i32* %3
%13651 = load i32, i32* %3
%13652 = xor i32 %13651, 81954
store i32 %13652, i32* %3
%13653 = load i32, i32* %3
%13654 = srem i32 %13653, 268435443
store i32 %13654, i32* %3
%13655 = load i32, i32* %3
%13656 = add nsw i32 %13655, 6
store i32 %13656, i32* %3
%13657 = load i32, i32* %3
%13658 = mul nsw i32 %13657, 10
store i32 %13658, i32* %3
%13659 = load i32, i32* %3
%13660 = add nsw i32 %13659, 1
store i32 %13660, i32* %3
%13661 = load i32, i32* %3
%13662 = mul nsw i32 %13661, 2
store i32 %13662, i32* %3
%13663 = load i32, i32* %3
%13664 = sub nsw i32 %13663, 1
store i32 %13664, i32* %3
%13665 = load i32, i32* %3
%13666 = and i32 %13665, -1044481
store i32 %13666, i32* %3
%13667 = load i32, i32* %3
%13668 = xor i32 %13667, 81954
store i32 %13668, i32* %3
%13669 = load i32, i32* %3
%13670 = srem i32 %13669, 268435443
store i32 %13670, i32* %3
%13671 = load i32, i32* %3
%13672 = add nsw i32 %13671, 6
store i32 %13672, i32* %3
%13673 = load i32, i32* %3
%13674 = mul nsw i32 %13673, 10
store i32 %13674, i32* %3
%13675 = load i32, i32* %3
%13676 = add nsw i32 %13675, 1
store i32 %13676, i32* %3
%13677 = load i32, i32* %3
%13678 = mul nsw i32 %13677, 2
store i32 %13678, i32* %3
%13679 = load i32, i32* %3
%13680 = sub nsw i32 %13679, 1
store i32 %13680, i32* %3
%13681 = load i32, i32* %3
%13682 = and i32 %13681, -1044481
store i32 %13682, i32* %3
%13683 = load i32, i32* %3
%13684 = xor i32 %13683, 81954
store i32 %13684, i32* %3
%13685 = load i32, i32* %3
%13686 = srem i32 %13685, 268435443
store i32 %13686, i32* %3
%13687 = load i32, i32* %3
%13688 = add nsw i32 %13687, 6
store i32 %13688, i32* %3
%13689 = load i32, i32* %3
%13690 = mul nsw i32 %13689, 10
store i32 %13690, i32* %3
%13691 = load i32, i32* %3
%13692 = add nsw i32 %13691, 1
store i32 %13692, i32* %3
%13693 = load i32, i32* %3
%13694 = mul nsw i32 %13693, 2
store i32 %13694, i32* %3
%13695 = load i32, i32* %3
%13696 = sub nsw i32 %13695, 1
store i32 %13696, i32* %3
%13697 = load i32, i32* %3
%13698 = and i32 %13697, -1044481
store i32 %13698, i32* %3
%13699 = load i32, i32* %3
%13700 = xor i32 %13699, 81954
store i32 %13700, i32* %3
%13701 = load i32, i32* %3
%13702 = srem i32 %13701, 268435443
store i32 %13702, i32* %3
%13703 = load i32, i32* %3
%13704 = add nsw i32 %13703, 6
store i32 %13704, i32* %3
%13705 = load i32, i32* %3
%13706 = mul nsw i32 %13705, 10
store i32 %13706, i32* %3
%13707 = load i32, i32* %3
%13708 = add nsw i32 %13707, 1
store i32 %13708, i32* %3
%13709 = load i32, i32* %3
%13710 = mul nsw i32 %13709, 2
store i32 %13710, i32* %3
%13711 = load i32, i32* %3
%13712 = sub nsw i32 %13711, 1
store i32 %13712, i32* %3
%13713 = load i32, i32* %3
%13714 = and i32 %13713, -1044481
store i32 %13714, i32* %3
%13715 = load i32, i32* %3
%13716 = xor i32 %13715, 81954
store i32 %13716, i32* %3
%13717 = load i32, i32* %3
%13718 = srem i32 %13717, 268435443
store i32 %13718, i32* %3
%13719 = load i32, i32* %3
%13720 = add nsw i32 %13719, 6
store i32 %13720, i32* %3
%13721 = load i32, i32* %3
%13722 = mul nsw i32 %13721, 10
store i32 %13722, i32* %3
%13723 = load i32, i32* %3
%13724 = add nsw i32 %13723, 1
store i32 %13724, i32* %3
%13725 = load i32, i32* %3
%13726 = mul nsw i32 %13725, 2
store i32 %13726, i32* %3
%13727 = load i32, i32* %3
%13728 = sub nsw i32 %13727, 1
store i32 %13728, i32* %3
%13729 = load i32, i32* %3
%13730 = and i32 %13729, -1044481
store i32 %13730, i32* %3
%13731 = load i32, i32* %3
%13732 = xor i32 %13731, 81954
store i32 %13732, i32* %3
%13733 = load i32, i32* %3
%13734 = srem i32 %13733, 268435443
store i32 %13734, i32* %3
%13735 = load i32, i32* %3
%13736 = add nsw i32 %13735, 6
store i32 %13736, i32* %3
%13737 = load i32, i32* %3
%13738 = mul nsw i32 %13737, 10
store i32 %13738, i32* %3
%13739 = load i32, i32* %3
%13740 = add nsw i32 %13739, 1
store i32 %13740, i32* %3
%13741 = load i32, i32* %3
%13742 = mul nsw i32 %13741, 2
store i32 %13742, i32* %3
%13743 = load i32, i32* %3
%13744 = sub nsw i32 %13743, 1
store i32 %13744, i32* %3
%13745 = load i32, i32* %3
%13746 = and i32 %13745, -1044481
store i32 %13746, i32* %3
%13747 = load i32, i32* %3
%13748 = xor i32 %13747, 81954
store i32 %13748, i32* %3
%13749 = load i32, i32* %3
%13750 = srem i32 %13749, 268435443
store i32 %13750, i32* %3
%13751 = load i32, i32* %3
%13752 = add nsw i32 %13751, 6
store i32 %13752, i32* %3
%13753 = load i32, i32* %3
%13754 = mul nsw i32 %13753, 10
store i32 %13754, i32* %3
%13755 = load i32, i32* %3
%13756 = add nsw i32 %13755, 1
store i32 %13756, i32* %3
%13757 = load i32, i32* %3
%13758 = mul nsw i32 %13757, 2
store i32 %13758, i32* %3
%13759 = load i32, i32* %3
%13760 = sub nsw i32 %13759, 1
store i32 %13760, i32* %3
%13761 = load i32, i32* %3
%13762 = and i32 %13761, -1044481
store i32 %13762, i32* %3
%13763 = load i32, i32* %3
%13764 = xor i32 %13763, 81954
store i32 %13764, i32* %3
%13765 = load i32, i32* %3
%13766 = srem i32 %13765, 268435443
store i32 %13766, i32* %3
%13767 = load i32, i32* %3
%13768 = add nsw i32 %13767, 6
store i32 %13768, i32* %3
%13769 = load i32, i32* %3
%13770 = mul nsw i32 %13769, 10
store i32 %13770, i32* %3
%13771 = load i32, i32* %3
%13772 = add nsw i32 %13771, 1
store i32 %13772, i32* %3
%13773 = load i32, i32* %3
%13774 = mul nsw i32 %13773, 2
store i32 %13774, i32* %3
%13775 = load i32, i32* %3
%13776 = sub nsw i32 %13775, 1
store i32 %13776, i32* %3
%13777 = load i32, i32* %3
%13778 = and i32 %13777, -1044481
store i32 %13778, i32* %3
%13779 = load i32, i32* %3
%13780 = xor i32 %13779, 81954
store i32 %13780, i32* %3
%13781 = load i32, i32* %3
%13782 = srem i32 %13781, 268435443
store i32 %13782, i32* %3
%13783 = load i32, i32* %3
%13784 = add nsw i32 %13783, 6
store i32 %13784, i32* %3
%13785 = load i32, i32* %3
%13786 = mul nsw i32 %13785, 10
store i32 %13786, i32* %3
%13787 = load i32, i32* %3
%13788 = add nsw i32 %13787, 1
store i32 %13788, i32* %3
%13789 = load i32, i32* %3
%13790 = mul nsw i32 %13789, 2
store i32 %13790, i32* %3
%13791 = load i32, i32* %3
%13792 = sub nsw i32 %13791, 1
store i32 %13792, i32* %3
%13793 = load i32, i32* %3
%13794 = and i32 %13793, -1044481
store i32 %13794, i32* %3
%13795 = load i32, i32* %3
%13796 = xor i32 %13795, 81954
store i32 %13796, i32* %3
%13797 = load i32, i32* %3
%13798 = srem i32 %13797, 268435443
store i32 %13798, i32* %3
%13799 = load i32, i32* %3
%13800 = add nsw i32 %13799, 6
store i32 %13800, i32* %3
%13801 = load i32, i32* %3
%13802 = mul nsw i32 %13801, 10
store i32 %13802, i32* %3
%13803 = load i32, i32* %3
%13804 = add nsw i32 %13803, 1
store i32 %13804, i32* %3
%13805 = load i32, i32* %3
%13806 = mul nsw i32 %13805, 2
store i32 %13806, i32* %3
%13807 = load i32, i32* %3
%13808 = sub nsw i32 %13807, 1
store i32 %13808, i32* %3
%13809 = load i32, i32* %3
%13810 = and i32 %13809, -1044481
store i32 %13810, i32* %3
%13811 = load i32, i32* %3
%13812 = xor i32 %13811, 81954
store i32 %13812, i32* %3
%13813 = load i32, i32* %3
%13814 = srem i32 %13813, 268435443
store i32 %13814, i32* %3
%13815 = load i32, i32* %3
%13816 = add nsw i32 %13815, 6
store i32 %13816, i32* %3
%13817 = load i32, i32* %3
%13818 = mul nsw i32 %13817, 10
store i32 %13818, i32* %3
%13819 = load i32, i32* %3
%13820 = add nsw i32 %13819, 1
store i32 %13820, i32* %3
%13821 = load i32, i32* %3
%13822 = mul nsw i32 %13821, 2
store i32 %13822, i32* %3
%13823 = load i32, i32* %3
%13824 = sub nsw i32 %13823, 1
store i32 %13824, i32* %3
%13825 = load i32, i32* %3
%13826 = and i32 %13825, -1044481
store i32 %13826, i32* %3
%13827 = load i32, i32* %3
%13828 = xor i32 %13827, 81954
store i32 %13828, i32* %3
%13829 = load i32, i32* %3
%13830 = srem i32 %13829, 268435443
store i32 %13830, i32* %3
%13831 = load i32, i32* %3
%13832 = add nsw i32 %13831, 6
store i32 %13832, i32* %3
%13833 = load i32, i32* %3
%13834 = mul nsw i32 %13833, 10
store i32 %13834, i32* %3
%13835 = load i32, i32* %3
%13836 = add nsw i32 %13835, 1
store i32 %13836, i32* %3
%13837 = load i32, i32* %3
%13838 = mul nsw i32 %13837, 2
store i32 %13838, i32* %3
%13839 = load i32, i32* %3
%13840 = sub nsw i32 %13839, 1
store i32 %13840, i32* %3
%13841 = load i32, i32* %3
%13842 = and i32 %13841, -1044481
store i32 %13842, i32* %3
%13843 = load i32, i32* %3
%13844 = xor i32 %13843, 81954
store i32 %13844, i32* %3
%13845 = load i32, i32* %3
%13846 = srem i32 %13845, 268435443
store i32 %13846, i32* %3
%13847 = load i32, i32* %3
%13848 = add nsw i32 %13847, 6
store i32 %13848, i32* %3
%13849 = load i32, i32* %3
%13850 = mul nsw i32 %13849, 10
store i32 %13850, i32* %3
%13851 = load i32, i32* %3
%13852 = add nsw i32 %13851, 1
store i32 %13852, i32* %3
%13853 = load i32, i32* %3
%13854 = mul nsw i32 %13853, 2
store i32 %13854, i32* %3
%13855 = load i32, i32* %3
%13856 = sub nsw i32 %13855, 1
store i32 %13856, i32* %3
%13857 = load i32, i32* %3
%13858 = and i32 %13857, -1044481
store i32 %13858, i32* %3
%13859 = load i32, i32* %3
%13860 = xor i32 %13859, 81954
store i32 %13860, i32* %3
%13861 = load i32, i32* %3
%13862 = srem i32 %13861, 268435443
store i32 %13862, i32* %3
%13863 = load i32, i32* %3
%13864 = add nsw i32 %13863, 6
store i32 %13864, i32* %3
%13865 = load i32, i32* %3
%13866 = mul nsw i32 %13865, 10
store i32 %13866, i32* %3
%13867 = load i32, i32* %3
%13868 = add nsw i32 %13867, 1
store i32 %13868, i32* %3
%13869 = load i32, i32* %3
%13870 = mul nsw i32 %13869, 2
store i32 %13870, i32* %3
%13871 = load i32, i32* %3
%13872 = sub nsw i32 %13871, 1
store i32 %13872, i32* %3
%13873 = load i32, i32* %3
%13874 = and i32 %13873, -1044481
store i32 %13874, i32* %3
%13875 = load i32, i32* %3
%13876 = xor i32 %13875, 81954
store i32 %13876, i32* %3
%13877 = load i32, i32* %3
%13878 = srem i32 %13877, 268435443
store i32 %13878, i32* %3
%13879 = load i32, i32* %3
%13880 = add nsw i32 %13879, 6
store i32 %13880, i32* %3
%13881 = load i32, i32* %3
%13882 = mul nsw i32 %13881, 10
store i32 %13882, i32* %3
%13883 = load i32, i32* %3
%13884 = add nsw i32 %13883, 1
store i32 %13884, i32* %3
%13885 = load i32, i32* %3
%13886 = mul nsw i32 %13885, 2
store i32 %13886, i32* %3
%13887 = load i32, i32* %3
%13888 = sub nsw i32 %13887, 1
store i32 %13888, i32* %3
%13889 = load i32, i32* %3
%13890 = and i32 %13889, -1044481
store i32 %13890, i32* %3
%13891 = load i32, i32* %3
%13892 = xor i32 %13891, 81954
store i32 %13892, i32* %3
%13893 = load i32, i32* %3
%13894 = srem i32 %13893, 268435443
store i32 %13894, i32* %3
%13895 = load i32, i32* %3
%13896 = add nsw i32 %13895, 6
store i32 %13896, i32* %3
%13897 = load i32, i32* %3
%13898 = mul nsw i32 %13897, 10
store i32 %13898, i32* %3
%13899 = load i32, i32* %3
%13900 = add nsw i32 %13899, 1
store i32 %13900, i32* %3
%13901 = load i32, i32* %3
%13902 = mul nsw i32 %13901, 2
store i32 %13902, i32* %3
%13903 = load i32, i32* %3
%13904 = sub nsw i32 %13903, 1
store i32 %13904, i32* %3
%13905 = load i32, i32* %3
%13906 = and i32 %13905, -1044481
store i32 %13906, i32* %3
%13907 = load i32, i32* %3
%13908 = xor i32 %13907, 81954
store i32 %13908, i32* %3
%13909 = load i32, i32* %3
%13910 = srem i32 %13909, 268435443
store i32 %13910, i32* %3
%13911 = load i32, i32* %3
%13912 = add nsw i32 %13911, 6
store i32 %13912, i32* %3
%13913 = load i32, i32* %3
%13914 = mul nsw i32 %13913, 10
store i32 %13914, i32* %3
%13915 = load i32, i32* %3
%13916 = add nsw i32 %13915, 1
store i32 %13916, i32* %3
%13917 = load i32, i32* %3
%13918 = mul nsw i32 %13917, 2
store i32 %13918, i32* %3
%13919 = load i32, i32* %3
%13920 = sub nsw i32 %13919, 1
store i32 %13920, i32* %3
%13921 = load i32, i32* %3
%13922 = and i32 %13921, -1044481
store i32 %13922, i32* %3
%13923 = load i32, i32* %3
%13924 = xor i32 %13923, 81954
store i32 %13924, i32* %3
%13925 = load i32, i32* %3
%13926 = srem i32 %13925, 268435443
store i32 %13926, i32* %3
%13927 = load i32, i32* %3
%13928 = add nsw i32 %13927, 6
store i32 %13928, i32* %3
%13929 = load i32, i32* %3
%13930 = mul nsw i32 %13929, 10
store i32 %13930, i32* %3
%13931 = load i32, i32* %3
%13932 = add nsw i32 %13931, 1
store i32 %13932, i32* %3
%13933 = load i32, i32* %3
%13934 = mul nsw i32 %13933, 2
store i32 %13934, i32* %3
%13935 = load i32, i32* %3
%13936 = sub nsw i32 %13935, 1
store i32 %13936, i32* %3
%13937 = load i32, i32* %3
%13938 = and i32 %13937, -1044481
store i32 %13938, i32* %3
%13939 = load i32, i32* %3
%13940 = xor i32 %13939, 81954
store i32 %13940, i32* %3
%13941 = load i32, i32* %3
%13942 = srem i32 %13941, 268435443
store i32 %13942, i32* %3
%13943 = load i32, i32* %3
%13944 = add nsw i32 %13943, 6
store i32 %13944, i32* %3
%13945 = load i32, i32* %3
%13946 = mul nsw i32 %13945, 10
store i32 %13946, i32* %3
%13947 = load i32, i32* %3
%13948 = add nsw i32 %13947, 1
store i32 %13948, i32* %3
%13949 = load i32, i32* %3
%13950 = mul nsw i32 %13949, 2
store i32 %13950, i32* %3
%13951 = load i32, i32* %3
%13952 = sub nsw i32 %13951, 1
store i32 %13952, i32* %3
%13953 = load i32, i32* %3
%13954 = and i32 %13953, -1044481
store i32 %13954, i32* %3
%13955 = load i32, i32* %3
%13956 = xor i32 %13955, 81954
store i32 %13956, i32* %3
%13957 = load i32, i32* %3
%13958 = srem i32 %13957, 268435443
store i32 %13958, i32* %3
%13959 = load i32, i32* %3
%13960 = add nsw i32 %13959, 6
store i32 %13960, i32* %3
%13961 = load i32, i32* %3
%13962 = mul nsw i32 %13961, 10
store i32 %13962, i32* %3
%13963 = load i32, i32* %3
%13964 = add nsw i32 %13963, 1
store i32 %13964, i32* %3
%13965 = load i32, i32* %3
%13966 = mul nsw i32 %13965, 2
store i32 %13966, i32* %3
%13967 = load i32, i32* %3
%13968 = sub nsw i32 %13967, 1
store i32 %13968, i32* %3
%13969 = load i32, i32* %3
%13970 = and i32 %13969, -1044481
store i32 %13970, i32* %3
%13971 = load i32, i32* %3
%13972 = xor i32 %13971, 81954
store i32 %13972, i32* %3
%13973 = load i32, i32* %3
%13974 = srem i32 %13973, 268435443
store i32 %13974, i32* %3
%13975 = load i32, i32* %3
%13976 = add nsw i32 %13975, 6
store i32 %13976, i32* %3
%13977 = load i32, i32* %3
%13978 = mul nsw i32 %13977, 10
store i32 %13978, i32* %3
%13979 = load i32, i32* %3
%13980 = add nsw i32 %13979, 1
store i32 %13980, i32* %3
%13981 = load i32, i32* %3
%13982 = mul nsw i32 %13981, 2
store i32 %13982, i32* %3
%13983 = load i32, i32* %3
%13984 = sub nsw i32 %13983, 1
store i32 %13984, i32* %3
%13985 = load i32, i32* %3
%13986 = and i32 %13985, -1044481
store i32 %13986, i32* %3
%13987 = load i32, i32* %3
%13988 = xor i32 %13987, 81954
store i32 %13988, i32* %3
%13989 = load i32, i32* %3
%13990 = srem i32 %13989, 268435443
store i32 %13990, i32* %3
%13991 = load i32, i32* %3
%13992 = add nsw i32 %13991, 6
store i32 %13992, i32* %3
%13993 = load i32, i32* %3
%13994 = mul nsw i32 %13993, 10
store i32 %13994, i32* %3
%13995 = load i32, i32* %3
%13996 = add nsw i32 %13995, 1
store i32 %13996, i32* %3
%13997 = load i32, i32* %3
%13998 = mul nsw i32 %13997, 2
store i32 %13998, i32* %3
%13999 = load i32, i32* %3
%14000 = sub nsw i32 %13999, 1
store i32 %14000, i32* %3
%14001 = load i32, i32* %3
%14002 = and i32 %14001, -1044481
store i32 %14002, i32* %3
%14003 = load i32, i32* %3
%14004 = xor i32 %14003, 81954
store i32 %14004, i32* %3
%14005 = load i32, i32* %3
%14006 = srem i32 %14005, 268435443
store i32 %14006, i32* %3
%14007 = load i32, i32* %3
%14008 = add nsw i32 %14007, 6
store i32 %14008, i32* %3
%14009 = load i32, i32* %3
%14010 = mul nsw i32 %14009, 10
store i32 %14010, i32* %3
%14011 = load i32, i32* %3
%14012 = add nsw i32 %14011, 1
store i32 %14012, i32* %3
%14013 = load i32, i32* %3
%14014 = mul nsw i32 %14013, 2
store i32 %14014, i32* %3
%14015 = load i32, i32* %3
%14016 = sub nsw i32 %14015, 1
store i32 %14016, i32* %3
%14017 = load i32, i32* %3
%14018 = and i32 %14017, -1044481
store i32 %14018, i32* %3
%14019 = load i32, i32* %3
%14020 = xor i32 %14019, 81954
store i32 %14020, i32* %3
%14021 = load i32, i32* %3
%14022 = srem i32 %14021, 268435443
store i32 %14022, i32* %3
%14023 = load i32, i32* %3
%14024 = add nsw i32 %14023, 6
store i32 %14024, i32* %3
%14025 = load i32, i32* %3
%14026 = mul nsw i32 %14025, 10
store i32 %14026, i32* %3
%14027 = load i32, i32* %3
%14028 = add nsw i32 %14027, 1
store i32 %14028, i32* %3
%14029 = load i32, i32* %3
%14030 = mul nsw i32 %14029, 2
store i32 %14030, i32* %3
%14031 = load i32, i32* %3
%14032 = sub nsw i32 %14031, 1
store i32 %14032, i32* %3
%14033 = load i32, i32* %3
%14034 = and i32 %14033, -1044481
store i32 %14034, i32* %3
%14035 = load i32, i32* %3
%14036 = xor i32 %14035, 81954
store i32 %14036, i32* %3
%14037 = load i32, i32* %3
%14038 = srem i32 %14037, 268435443
store i32 %14038, i32* %3
%14039 = load i32, i32* %3
%14040 = add nsw i32 %14039, 6
store i32 %14040, i32* %3
%14041 = load i32, i32* %3
%14042 = mul nsw i32 %14041, 10
store i32 %14042, i32* %3
%14043 = load i32, i32* %3
%14044 = add nsw i32 %14043, 1
store i32 %14044, i32* %3
%14045 = load i32, i32* %3
%14046 = mul nsw i32 %14045, 2
store i32 %14046, i32* %3
%14047 = load i32, i32* %3
%14048 = sub nsw i32 %14047, 1
store i32 %14048, i32* %3
%14049 = load i32, i32* %3
%14050 = and i32 %14049, -1044481
store i32 %14050, i32* %3
%14051 = load i32, i32* %3
%14052 = xor i32 %14051, 81954
store i32 %14052, i32* %3
%14053 = load i32, i32* %3
%14054 = srem i32 %14053, 268435443
store i32 %14054, i32* %3
%14055 = load i32, i32* %3
%14056 = add nsw i32 %14055, 6
store i32 %14056, i32* %3
%14057 = load i32, i32* %3
%14058 = mul nsw i32 %14057, 10
store i32 %14058, i32* %3
%14059 = load i32, i32* %3
%14060 = add nsw i32 %14059, 1
store i32 %14060, i32* %3
%14061 = load i32, i32* %3
%14062 = mul nsw i32 %14061, 2
store i32 %14062, i32* %3
%14063 = load i32, i32* %3
%14064 = sub nsw i32 %14063, 1
store i32 %14064, i32* %3
%14065 = load i32, i32* %3
%14066 = and i32 %14065, -1044481
store i32 %14066, i32* %3
%14067 = load i32, i32* %3
%14068 = xor i32 %14067, 81954
store i32 %14068, i32* %3
%14069 = load i32, i32* %3
%14070 = srem i32 %14069, 268435443
store i32 %14070, i32* %3
%14071 = load i32, i32* %3
%14072 = add nsw i32 %14071, 6
store i32 %14072, i32* %3
%14073 = load i32, i32* %3
%14074 = mul nsw i32 %14073, 10
store i32 %14074, i32* %3
%14075 = load i32, i32* %3
%14076 = add nsw i32 %14075, 1
store i32 %14076, i32* %3
%14077 = load i32, i32* %3
%14078 = mul nsw i32 %14077, 2
store i32 %14078, i32* %3
%14079 = load i32, i32* %3
%14080 = sub nsw i32 %14079, 1
store i32 %14080, i32* %3
%14081 = load i32, i32* %3
%14082 = and i32 %14081, -1044481
store i32 %14082, i32* %3
%14083 = load i32, i32* %3
%14084 = xor i32 %14083, 81954
store i32 %14084, i32* %3
%14085 = load i32, i32* %3
%14086 = srem i32 %14085, 268435443
store i32 %14086, i32* %3
%14087 = load i32, i32* %3
%14088 = add nsw i32 %14087, 6
store i32 %14088, i32* %3
%14089 = load i32, i32* %3
%14090 = mul nsw i32 %14089, 10
store i32 %14090, i32* %3
%14091 = load i32, i32* %3
%14092 = add nsw i32 %14091, 1
store i32 %14092, i32* %3
%14093 = load i32, i32* %3
%14094 = mul nsw i32 %14093, 2
store i32 %14094, i32* %3
%14095 = load i32, i32* %3
%14096 = sub nsw i32 %14095, 1
store i32 %14096, i32* %3
%14097 = load i32, i32* %3
%14098 = and i32 %14097, -1044481
store i32 %14098, i32* %3
%14099 = load i32, i32* %3
%14100 = xor i32 %14099, 81954
store i32 %14100, i32* %3
%14101 = load i32, i32* %3
%14102 = srem i32 %14101, 268435443
store i32 %14102, i32* %3
%14103 = load i32, i32* %3
%14104 = add nsw i32 %14103, 6
store i32 %14104, i32* %3
%14105 = load i32, i32* %3
%14106 = mul nsw i32 %14105, 10
store i32 %14106, i32* %3
%14107 = load i32, i32* %3
%14108 = add nsw i32 %14107, 1
store i32 %14108, i32* %3
%14109 = load i32, i32* %3
%14110 = mul nsw i32 %14109, 2
store i32 %14110, i32* %3
%14111 = load i32, i32* %3
%14112 = sub nsw i32 %14111, 1
store i32 %14112, i32* %3
%14113 = load i32, i32* %3
%14114 = and i32 %14113, -1044481
store i32 %14114, i32* %3
%14115 = load i32, i32* %3
%14116 = xor i32 %14115, 81954
store i32 %14116, i32* %3
%14117 = load i32, i32* %3
%14118 = srem i32 %14117, 268435443
store i32 %14118, i32* %3
%14119 = load i32, i32* %3
%14120 = add nsw i32 %14119, 6
store i32 %14120, i32* %3
%14121 = load i32, i32* %3
%14122 = mul nsw i32 %14121, 10
store i32 %14122, i32* %3
%14123 = load i32, i32* %3
%14124 = add nsw i32 %14123, 1
store i32 %14124, i32* %3
%14125 = load i32, i32* %3
%14126 = mul nsw i32 %14125, 2
store i32 %14126, i32* %3
%14127 = load i32, i32* %3
%14128 = sub nsw i32 %14127, 1
store i32 %14128, i32* %3
%14129 = load i32, i32* %3
%14130 = and i32 %14129, -1044481
store i32 %14130, i32* %3
%14131 = load i32, i32* %3
%14132 = xor i32 %14131, 81954
store i32 %14132, i32* %3
%14133 = load i32, i32* %3
%14134 = srem i32 %14133, 268435443
store i32 %14134, i32* %3
%14135 = load i32, i32* %3
%14136 = add nsw i32 %14135, 6
store i32 %14136, i32* %3
%14137 = load i32, i32* %3
%14138 = mul nsw i32 %14137, 10
store i32 %14138, i32* %3
%14139 = load i32, i32* %3
%14140 = add nsw i32 %14139, 1
store i32 %14140, i32* %3
%14141 = load i32, i32* %3
%14142 = mul nsw i32 %14141, 2
store i32 %14142, i32* %3
%14143 = load i32, i32* %3
%14144 = sub nsw i32 %14143, 1
store i32 %14144, i32* %3
%14145 = load i32, i32* %3
%14146 = and i32 %14145, -1044481
store i32 %14146, i32* %3
%14147 = load i32, i32* %3
%14148 = xor i32 %14147, 81954
store i32 %14148, i32* %3
%14149 = load i32, i32* %3
%14150 = srem i32 %14149, 268435443
store i32 %14150, i32* %3
%14151 = load i32, i32* %3
%14152 = add nsw i32 %14151, 6
store i32 %14152, i32* %3
%14153 = load i32, i32* %3
%14154 = mul nsw i32 %14153, 10
store i32 %14154, i32* %3
%14155 = load i32, i32* %3
%14156 = add nsw i32 %14155, 1
store i32 %14156, i32* %3
%14157 = load i32, i32* %3
%14158 = mul nsw i32 %14157, 2
store i32 %14158, i32* %3
%14159 = load i32, i32* %3
%14160 = sub nsw i32 %14159, 1
store i32 %14160, i32* %3
%14161 = load i32, i32* %3
%14162 = and i32 %14161, -1044481
store i32 %14162, i32* %3
%14163 = load i32, i32* %3
%14164 = xor i32 %14163, 81954
store i32 %14164, i32* %3
%14165 = load i32, i32* %3
%14166 = srem i32 %14165, 268435443
store i32 %14166, i32* %3
%14167 = load i32, i32* %3
%14168 = add nsw i32 %14167, 6
store i32 %14168, i32* %3
%14169 = load i32, i32* %3
%14170 = mul nsw i32 %14169, 10
store i32 %14170, i32* %3
%14171 = load i32, i32* %3
%14172 = add nsw i32 %14171, 1
store i32 %14172, i32* %3
%14173 = load i32, i32* %3
%14174 = mul nsw i32 %14173, 2
store i32 %14174, i32* %3
%14175 = load i32, i32* %3
%14176 = sub nsw i32 %14175, 1
store i32 %14176, i32* %3
%14177 = load i32, i32* %3
%14178 = and i32 %14177, -1044481
store i32 %14178, i32* %3
%14179 = load i32, i32* %3
%14180 = xor i32 %14179, 81954
store i32 %14180, i32* %3
%14181 = load i32, i32* %3
%14182 = srem i32 %14181, 268435443
store i32 %14182, i32* %3
%14183 = load i32, i32* %3
%14184 = add nsw i32 %14183, 6
store i32 %14184, i32* %3
%14185 = load i32, i32* %3
%14186 = mul nsw i32 %14185, 10
store i32 %14186, i32* %3
%14187 = load i32, i32* %3
%14188 = add nsw i32 %14187, 1
store i32 %14188, i32* %3
%14189 = load i32, i32* %3
%14190 = mul nsw i32 %14189, 2
store i32 %14190, i32* %3
%14191 = load i32, i32* %3
%14192 = sub nsw i32 %14191, 1
store i32 %14192, i32* %3
%14193 = load i32, i32* %3
%14194 = and i32 %14193, -1044481
store i32 %14194, i32* %3
%14195 = load i32, i32* %3
%14196 = xor i32 %14195, 81954
store i32 %14196, i32* %3
%14197 = load i32, i32* %3
%14198 = srem i32 %14197, 268435443
store i32 %14198, i32* %3
%14199 = load i32, i32* %3
%14200 = add nsw i32 %14199, 6
store i32 %14200, i32* %3
%14201 = load i32, i32* %3
%14202 = mul nsw i32 %14201, 10
store i32 %14202, i32* %3
%14203 = load i32, i32* %3
%14204 = add nsw i32 %14203, 1
store i32 %14204, i32* %3
%14205 = load i32, i32* %3
%14206 = mul nsw i32 %14205, 2
store i32 %14206, i32* %3
%14207 = load i32, i32* %3
%14208 = sub nsw i32 %14207, 1
store i32 %14208, i32* %3
%14209 = load i32, i32* %3
%14210 = and i32 %14209, -1044481
store i32 %14210, i32* %3
%14211 = load i32, i32* %3
%14212 = xor i32 %14211, 81954
store i32 %14212, i32* %3
%14213 = load i32, i32* %3
%14214 = srem i32 %14213, 268435443
store i32 %14214, i32* %3
%14215 = load i32, i32* %3
%14216 = add nsw i32 %14215, 6
store i32 %14216, i32* %3
%14217 = load i32, i32* %3
%14218 = mul nsw i32 %14217, 10
store i32 %14218, i32* %3
%14219 = load i32, i32* %3
%14220 = add nsw i32 %14219, 1
store i32 %14220, i32* %3
%14221 = load i32, i32* %3
%14222 = mul nsw i32 %14221, 2
store i32 %14222, i32* %3
%14223 = load i32, i32* %3
%14224 = sub nsw i32 %14223, 1
store i32 %14224, i32* %3
%14225 = load i32, i32* %3
%14226 = and i32 %14225, -1044481
store i32 %14226, i32* %3
%14227 = load i32, i32* %3
%14228 = xor i32 %14227, 81954
store i32 %14228, i32* %3
%14229 = load i32, i32* %3
%14230 = srem i32 %14229, 268435443
store i32 %14230, i32* %3
%14231 = load i32, i32* %3
%14232 = add nsw i32 %14231, 6
store i32 %14232, i32* %3
%14233 = load i32, i32* %3
%14234 = mul nsw i32 %14233, 10
store i32 %14234, i32* %3
%14235 = load i32, i32* %3
%14236 = add nsw i32 %14235, 1
store i32 %14236, i32* %3
%14237 = load i32, i32* %3
%14238 = mul nsw i32 %14237, 2
store i32 %14238, i32* %3
%14239 = load i32, i32* %3
%14240 = sub nsw i32 %14239, 1
store i32 %14240, i32* %3
%14241 = load i32, i32* %3
%14242 = and i32 %14241, -1044481
store i32 %14242, i32* %3
%14243 = load i32, i32* %3
%14244 = xor i32 %14243, 81954
store i32 %14244, i32* %3
%14245 = load i32, i32* %3
%14246 = srem i32 %14245, 268435443
store i32 %14246, i32* %3
%14247 = load i32, i32* %3
%14248 = add nsw i32 %14247, 6
store i32 %14248, i32* %3
%14249 = load i32, i32* %3
%14250 = mul nsw i32 %14249, 10
store i32 %14250, i32* %3
%14251 = load i32, i32* %3
%14252 = add nsw i32 %14251, 1
store i32 %14252, i32* %3
%14253 = load i32, i32* %3
%14254 = mul nsw i32 %14253, 2
store i32 %14254, i32* %3
%14255 = load i32, i32* %3
%14256 = sub nsw i32 %14255, 1
store i32 %14256, i32* %3
%14257 = load i32, i32* %3
%14258 = and i32 %14257, -1044481
store i32 %14258, i32* %3
%14259 = load i32, i32* %3
%14260 = xor i32 %14259, 81954
store i32 %14260, i32* %3
%14261 = load i32, i32* %3
%14262 = srem i32 %14261, 268435443
store i32 %14262, i32* %3
%14263 = load i32, i32* %3
%14264 = add nsw i32 %14263, 6
store i32 %14264, i32* %3
%14265 = load i32, i32* %3
%14266 = mul nsw i32 %14265, 10
store i32 %14266, i32* %3
%14267 = load i32, i32* %3
%14268 = add nsw i32 %14267, 1
store i32 %14268, i32* %3
%14269 = load i32, i32* %3
%14270 = mul nsw i32 %14269, 2
store i32 %14270, i32* %3
%14271 = load i32, i32* %3
%14272 = sub nsw i32 %14271, 1
store i32 %14272, i32* %3
%14273 = load i32, i32* %3
%14274 = and i32 %14273, -1044481
store i32 %14274, i32* %3
%14275 = load i32, i32* %3
%14276 = xor i32 %14275, 81954
store i32 %14276, i32* %3
%14277 = load i32, i32* %3
%14278 = srem i32 %14277, 268435443
store i32 %14278, i32* %3
%14279 = load i32, i32* %3
%14280 = add nsw i32 %14279, 6
store i32 %14280, i32* %3
%14281 = load i32, i32* %3
%14282 = mul nsw i32 %14281, 10
store i32 %14282, i32* %3
%14283 = load i32, i32* %3
%14284 = add nsw i32 %14283, 1
store i32 %14284, i32* %3
%14285 = load i32, i32* %3
%14286 = mul nsw i32 %14285, 2
store i32 %14286, i32* %3
%14287 = load i32, i32* %3
%14288 = sub nsw i32 %14287, 1
store i32 %14288, i32* %3
%14289 = load i32, i32* %3
%14290 = and i32 %14289, -1044481
store i32 %14290, i32* %3
%14291 = load i32, i32* %3
%14292 = xor i32 %14291, 81954
store i32 %14292, i32* %3
%14293 = load i32, i32* %3
%14294 = srem i32 %14293, 268435443
store i32 %14294, i32* %3
%14295 = load i32, i32* %3
%14296 = add nsw i32 %14295, 6
store i32 %14296, i32* %3
%14297 = load i32, i32* %3
%14298 = mul nsw i32 %14297, 10
store i32 %14298, i32* %3
%14299 = load i32, i32* %3
%14300 = add nsw i32 %14299, 1
store i32 %14300, i32* %3
%14301 = load i32, i32* %3
%14302 = mul nsw i32 %14301, 2
store i32 %14302, i32* %3
%14303 = load i32, i32* %3
%14304 = sub nsw i32 %14303, 1
store i32 %14304, i32* %3
%14305 = load i32, i32* %3
%14306 = and i32 %14305, -1044481
store i32 %14306, i32* %3
%14307 = load i32, i32* %3
%14308 = xor i32 %14307, 81954
store i32 %14308, i32* %3
%14309 = load i32, i32* %3
%14310 = srem i32 %14309, 268435443
store i32 %14310, i32* %3
%14311 = load i32, i32* %3
%14312 = add nsw i32 %14311, 6
store i32 %14312, i32* %3
%14313 = load i32, i32* %3
%14314 = mul nsw i32 %14313, 10
store i32 %14314, i32* %3
%14315 = load i32, i32* %3
%14316 = add nsw i32 %14315, 1
store i32 %14316, i32* %3
%14317 = load i32, i32* %3
%14318 = mul nsw i32 %14317, 2
store i32 %14318, i32* %3
%14319 = load i32, i32* %3
%14320 = sub nsw i32 %14319, 1
store i32 %14320, i32* %3
%14321 = load i32, i32* %3
%14322 = and i32 %14321, -1044481
store i32 %14322, i32* %3
%14323 = load i32, i32* %3
%14324 = xor i32 %14323, 81954
store i32 %14324, i32* %3
%14325 = load i32, i32* %3
%14326 = srem i32 %14325, 268435443
store i32 %14326, i32* %3
%14327 = load i32, i32* %3
%14328 = add nsw i32 %14327, 6
store i32 %14328, i32* %3
%14329 = load i32, i32* %3
%14330 = mul nsw i32 %14329, 10
store i32 %14330, i32* %3
%14331 = load i32, i32* %3
%14332 = add nsw i32 %14331, 1
store i32 %14332, i32* %3
%14333 = load i32, i32* %3
%14334 = mul nsw i32 %14333, 2
store i32 %14334, i32* %3
%14335 = load i32, i32* %3
%14336 = sub nsw i32 %14335, 1
store i32 %14336, i32* %3
%14337 = load i32, i32* %3
%14338 = and i32 %14337, -1044481
store i32 %14338, i32* %3
%14339 = load i32, i32* %3
%14340 = xor i32 %14339, 81954
store i32 %14340, i32* %3
%14341 = load i32, i32* %3
%14342 = srem i32 %14341, 268435443
store i32 %14342, i32* %3
%14343 = load i32, i32* %3
%14344 = add nsw i32 %14343, 6
store i32 %14344, i32* %3
%14345 = load i32, i32* %3
%14346 = mul nsw i32 %14345, 10
store i32 %14346, i32* %3
%14347 = load i32, i32* %3
%14348 = add nsw i32 %14347, 1
store i32 %14348, i32* %3
%14349 = load i32, i32* %3
%14350 = mul nsw i32 %14349, 2
store i32 %14350, i32* %3
%14351 = load i32, i32* %3
%14352 = sub nsw i32 %14351, 1
store i32 %14352, i32* %3
%14353 = load i32, i32* %3
%14354 = and i32 %14353, -1044481
store i32 %14354, i32* %3
%14355 = load i32, i32* %3
%14356 = xor i32 %14355, 81954
store i32 %14356, i32* %3
%14357 = load i32, i32* %3
%14358 = srem i32 %14357, 268435443
store i32 %14358, i32* %3
%14359 = load i32, i32* %3
%14360 = add nsw i32 %14359, 6
store i32 %14360, i32* %3
%14361 = load i32, i32* %3
%14362 = mul nsw i32 %14361, 10
store i32 %14362, i32* %3
%14363 = load i32, i32* %3
%14364 = add nsw i32 %14363, 1
store i32 %14364, i32* %3
%14365 = load i32, i32* %3
%14366 = mul nsw i32 %14365, 2
store i32 %14366, i32* %3
%14367 = load i32, i32* %3
%14368 = sub nsw i32 %14367, 1
store i32 %14368, i32* %3
%14369 = load i32, i32* %3
%14370 = and i32 %14369, -1044481
store i32 %14370, i32* %3
%14371 = load i32, i32* %3
%14372 = xor i32 %14371, 81954
store i32 %14372, i32* %3
%14373 = load i32, i32* %3
%14374 = srem i32 %14373, 268435443
store i32 %14374, i32* %3
%14375 = load i32, i32* %3
%14376 = add nsw i32 %14375, 6
store i32 %14376, i32* %3
%14377 = load i32, i32* %3
%14378 = mul nsw i32 %14377, 10
store i32 %14378, i32* %3
%14379 = load i32, i32* %3
%14380 = add nsw i32 %14379, 1
store i32 %14380, i32* %3
%14381 = load i32, i32* %3
%14382 = mul nsw i32 %14381, 2
store i32 %14382, i32* %3
%14383 = load i32, i32* %3
%14384 = sub nsw i32 %14383, 1
store i32 %14384, i32* %3
%14385 = load i32, i32* %3
%14386 = and i32 %14385, -1044481
store i32 %14386, i32* %3
%14387 = load i32, i32* %3
%14388 = xor i32 %14387, 81954
store i32 %14388, i32* %3
%14389 = load i32, i32* %3
%14390 = srem i32 %14389, 268435443
store i32 %14390, i32* %3
%14391 = load i32, i32* %3
%14392 = add nsw i32 %14391, 6
store i32 %14392, i32* %3
%14393 = load i32, i32* %3
%14394 = mul nsw i32 %14393, 10
store i32 %14394, i32* %3
%14395 = load i32, i32* %3
%14396 = add nsw i32 %14395, 1
store i32 %14396, i32* %3
%14397 = load i32, i32* %3
%14398 = mul nsw i32 %14397, 2
store i32 %14398, i32* %3
%14399 = load i32, i32* %3
%14400 = sub nsw i32 %14399, 1
store i32 %14400, i32* %3
%14401 = load i32, i32* %3
%14402 = and i32 %14401, -1044481
store i32 %14402, i32* %3
%14403 = load i32, i32* %3
%14404 = xor i32 %14403, 81954
store i32 %14404, i32* %3
%14405 = load i32, i32* %3
%14406 = srem i32 %14405, 268435443
store i32 %14406, i32* %3
%14407 = load i32, i32* %3
%14408 = add nsw i32 %14407, 6
store i32 %14408, i32* %3
%14409 = load i32, i32* %3
%14410 = mul nsw i32 %14409, 10
store i32 %14410, i32* %3
%14411 = load i32, i32* %3
%14412 = add nsw i32 %14411, 1
store i32 %14412, i32* %3
%14413 = load i32, i32* %3
%14414 = mul nsw i32 %14413, 2
store i32 %14414, i32* %3
%14415 = load i32, i32* %3
%14416 = sub nsw i32 %14415, 1
store i32 %14416, i32* %3
%14417 = load i32, i32* %3
%14418 = and i32 %14417, -1044481
store i32 %14418, i32* %3
%14419 = load i32, i32* %3
%14420 = xor i32 %14419, 81954
store i32 %14420, i32* %3
%14421 = load i32, i32* %3
%14422 = srem i32 %14421, 268435443
store i32 %14422, i32* %3
%14423 = load i32, i32* %3
%14424 = add nsw i32 %14423, 6
store i32 %14424, i32* %3
%14425 = load i32, i32* %3
%14426 = mul nsw i32 %14425, 10
store i32 %14426, i32* %3
%14427 = load i32, i32* %3
%14428 = add nsw i32 %14427, 1
store i32 %14428, i32* %3
%14429 = load i32, i32* %3
%14430 = mul nsw i32 %14429, 2
store i32 %14430, i32* %3
%14431 = load i32, i32* %3
%14432 = sub nsw i32 %14431, 1
store i32 %14432, i32* %3
%14433 = load i32, i32* %3
%14434 = and i32 %14433, -1044481
store i32 %14434, i32* %3
%14435 = load i32, i32* %3
%14436 = xor i32 %14435, 81954
store i32 %14436, i32* %3
%14437 = load i32, i32* %3
%14438 = srem i32 %14437, 268435443
store i32 %14438, i32* %3
%14439 = load i32, i32* %3
%14440 = add nsw i32 %14439, 6
store i32 %14440, i32* %3
%14441 = load i32, i32* %3
%14442 = mul nsw i32 %14441, 10
store i32 %14442, i32* %3
%14443 = load i32, i32* %3
%14444 = add nsw i32 %14443, 1
store i32 %14444, i32* %3
%14445 = load i32, i32* %3
%14446 = mul nsw i32 %14445, 2
store i32 %14446, i32* %3
%14447 = load i32, i32* %3
%14448 = sub nsw i32 %14447, 1
store i32 %14448, i32* %3
%14449 = load i32, i32* %3
%14450 = and i32 %14449, -1044481
store i32 %14450, i32* %3
%14451 = load i32, i32* %3
%14452 = xor i32 %14451, 81954
store i32 %14452, i32* %3
%14453 = load i32, i32* %3
%14454 = srem i32 %14453, 268435443
store i32 %14454, i32* %3
%14455 = load i32, i32* %3
%14456 = add nsw i32 %14455, 6
store i32 %14456, i32* %3
%14457 = load i32, i32* %3
%14458 = mul nsw i32 %14457, 10
store i32 %14458, i32* %3
%14459 = load i32, i32* %3
%14460 = add nsw i32 %14459, 1
store i32 %14460, i32* %3
%14461 = load i32, i32* %3
%14462 = mul nsw i32 %14461, 2
store i32 %14462, i32* %3
%14463 = load i32, i32* %3
%14464 = sub nsw i32 %14463, 1
store i32 %14464, i32* %3
%14465 = load i32, i32* %3
%14466 = and i32 %14465, -1044481
store i32 %14466, i32* %3
%14467 = load i32, i32* %3
%14468 = xor i32 %14467, 81954
store i32 %14468, i32* %3
%14469 = load i32, i32* %3
%14470 = srem i32 %14469, 268435443
store i32 %14470, i32* %3
%14471 = load i32, i32* %3
%14472 = add nsw i32 %14471, 6
store i32 %14472, i32* %3
%14473 = load i32, i32* %3
%14474 = mul nsw i32 %14473, 10
store i32 %14474, i32* %3
%14475 = load i32, i32* %3
%14476 = add nsw i32 %14475, 1
store i32 %14476, i32* %3
%14477 = load i32, i32* %3
%14478 = mul nsw i32 %14477, 2
store i32 %14478, i32* %3
%14479 = load i32, i32* %3
%14480 = sub nsw i32 %14479, 1
store i32 %14480, i32* %3
%14481 = load i32, i32* %3
%14482 = and i32 %14481, -1044481
store i32 %14482, i32* %3
%14483 = load i32, i32* %3
%14484 = xor i32 %14483, 81954
store i32 %14484, i32* %3
%14485 = load i32, i32* %3
%14486 = srem i32 %14485, 268435443
store i32 %14486, i32* %3
%14487 = load i32, i32* %3
%14488 = add nsw i32 %14487, 6
store i32 %14488, i32* %3
%14489 = load i32, i32* %3
%14490 = mul nsw i32 %14489, 10
store i32 %14490, i32* %3
%14491 = load i32, i32* %3
%14492 = add nsw i32 %14491, 1
store i32 %14492, i32* %3
%14493 = load i32, i32* %3
%14494 = mul nsw i32 %14493, 2
store i32 %14494, i32* %3
%14495 = load i32, i32* %3
%14496 = sub nsw i32 %14495, 1
store i32 %14496, i32* %3
%14497 = load i32, i32* %3
%14498 = and i32 %14497, -1044481
store i32 %14498, i32* %3
%14499 = load i32, i32* %3
%14500 = xor i32 %14499, 81954
store i32 %14500, i32* %3
%14501 = load i32, i32* %3
%14502 = srem i32 %14501, 268435443
store i32 %14502, i32* %3
%14503 = load i32, i32* %3
%14504 = add nsw i32 %14503, 6
store i32 %14504, i32* %3
%14505 = load i32, i32* %3
%14506 = mul nsw i32 %14505, 10
store i32 %14506, i32* %3
%14507 = load i32, i32* %3
%14508 = add nsw i32 %14507, 1
store i32 %14508, i32* %3
%14509 = load i32, i32* %3
%14510 = mul nsw i32 %14509, 2
store i32 %14510, i32* %3
%14511 = load i32, i32* %3
%14512 = sub nsw i32 %14511, 1
store i32 %14512, i32* %3
%14513 = load i32, i32* %3
%14514 = and i32 %14513, -1044481
store i32 %14514, i32* %3
%14515 = load i32, i32* %3
%14516 = xor i32 %14515, 81954
store i32 %14516, i32* %3
%14517 = load i32, i32* %3
%14518 = srem i32 %14517, 268435443
store i32 %14518, i32* %3
%14519 = load i32, i32* %3
%14520 = add nsw i32 %14519, 6
store i32 %14520, i32* %3
%14521 = load i32, i32* %3
%14522 = mul nsw i32 %14521, 10
store i32 %14522, i32* %3
%14523 = load i32, i32* %3
%14524 = add nsw i32 %14523, 1
store i32 %14524, i32* %3
%14525 = load i32, i32* %3
%14526 = mul nsw i32 %14525, 2
store i32 %14526, i32* %3
%14527 = load i32, i32* %3
%14528 = sub nsw i32 %14527, 1
store i32 %14528, i32* %3
%14529 = load i32, i32* %3
%14530 = and i32 %14529, -1044481
store i32 %14530, i32* %3
%14531 = load i32, i32* %3
%14532 = xor i32 %14531, 81954
store i32 %14532, i32* %3
%14533 = load i32, i32* %3
%14534 = srem i32 %14533, 268435443
store i32 %14534, i32* %3
%14535 = load i32, i32* %3
%14536 = add nsw i32 %14535, 6
store i32 %14536, i32* %3
%14537 = load i32, i32* %3
%14538 = mul nsw i32 %14537, 10
store i32 %14538, i32* %3
%14539 = load i32, i32* %3
%14540 = add nsw i32 %14539, 1
store i32 %14540, i32* %3
%14541 = load i32, i32* %3
%14542 = mul nsw i32 %14541, 2
store i32 %14542, i32* %3
%14543 = load i32, i32* %3
%14544 = sub nsw i32 %14543, 1
store i32 %14544, i32* %3
%14545 = load i32, i32* %3
%14546 = and i32 %14545, -1044481
store i32 %14546, i32* %3
%14547 = load i32, i32* %3
%14548 = xor i32 %14547, 81954
store i32 %14548, i32* %3
%14549 = load i32, i32* %3
%14550 = srem i32 %14549, 268435443
store i32 %14550, i32* %3
%14551 = load i32, i32* %3
%14552 = add nsw i32 %14551, 6
store i32 %14552, i32* %3
%14553 = load i32, i32* %3
%14554 = mul nsw i32 %14553, 10
store i32 %14554, i32* %3
%14555 = load i32, i32* %3
%14556 = add nsw i32 %14555, 1
store i32 %14556, i32* %3
%14557 = load i32, i32* %3
%14558 = mul nsw i32 %14557, 2
store i32 %14558, i32* %3
%14559 = load i32, i32* %3
%14560 = sub nsw i32 %14559, 1
store i32 %14560, i32* %3
%14561 = load i32, i32* %3
%14562 = and i32 %14561, -1044481
store i32 %14562, i32* %3
%14563 = load i32, i32* %3
%14564 = xor i32 %14563, 81954
store i32 %14564, i32* %3
%14565 = load i32, i32* %3
%14566 = srem i32 %14565, 268435443
store i32 %14566, i32* %3
%14567 = load i32, i32* %3
%14568 = add nsw i32 %14567, 6
store i32 %14568, i32* %3
%14569 = load i32, i32* %3
%14570 = mul nsw i32 %14569, 10
store i32 %14570, i32* %3
%14571 = load i32, i32* %3
%14572 = add nsw i32 %14571, 1
store i32 %14572, i32* %3
%14573 = load i32, i32* %3
%14574 = mul nsw i32 %14573, 2
store i32 %14574, i32* %3
%14575 = load i32, i32* %3
%14576 = sub nsw i32 %14575, 1
store i32 %14576, i32* %3
%14577 = load i32, i32* %3
%14578 = and i32 %14577, -1044481
store i32 %14578, i32* %3
%14579 = load i32, i32* %3
%14580 = xor i32 %14579, 81954
store i32 %14580, i32* %3
%14581 = load i32, i32* %3
%14582 = srem i32 %14581, 268435443
store i32 %14582, i32* %3
%14583 = load i32, i32* %3
%14584 = add nsw i32 %14583, 6
store i32 %14584, i32* %3
%14585 = load i32, i32* %3
%14586 = mul nsw i32 %14585, 10
store i32 %14586, i32* %3
%14587 = load i32, i32* %3
%14588 = add nsw i32 %14587, 1
store i32 %14588, i32* %3
%14589 = load i32, i32* %3
%14590 = mul nsw i32 %14589, 2
store i32 %14590, i32* %3
%14591 = load i32, i32* %3
%14592 = sub nsw i32 %14591, 1
store i32 %14592, i32* %3
%14593 = load i32, i32* %3
%14594 = and i32 %14593, -1044481
store i32 %14594, i32* %3
%14595 = load i32, i32* %3
%14596 = xor i32 %14595, 81954
store i32 %14596, i32* %3
%14597 = load i32, i32* %3
%14598 = srem i32 %14597, 268435443
store i32 %14598, i32* %3
%14599 = load i32, i32* %3
%14600 = add nsw i32 %14599, 6
store i32 %14600, i32* %3
%14601 = load i32, i32* %3
%14602 = mul nsw i32 %14601, 10
store i32 %14602, i32* %3
%14603 = load i32, i32* %3
%14604 = add nsw i32 %14603, 1
store i32 %14604, i32* %3
%14605 = load i32, i32* %3
%14606 = mul nsw i32 %14605, 2
store i32 %14606, i32* %3
%14607 = load i32, i32* %3
%14608 = sub nsw i32 %14607, 1
store i32 %14608, i32* %3
%14609 = load i32, i32* %3
%14610 = and i32 %14609, -1044481
store i32 %14610, i32* %3
%14611 = load i32, i32* %3
%14612 = xor i32 %14611, 81954
store i32 %14612, i32* %3
%14613 = load i32, i32* %3
%14614 = srem i32 %14613, 268435443
store i32 %14614, i32* %3
%14615 = load i32, i32* %3
%14616 = add nsw i32 %14615, 6
store i32 %14616, i32* %3
%14617 = load i32, i32* %3
%14618 = mul nsw i32 %14617, 10
store i32 %14618, i32* %3
%14619 = load i32, i32* %3
%14620 = add nsw i32 %14619, 1
store i32 %14620, i32* %3
%14621 = load i32, i32* %3
%14622 = mul nsw i32 %14621, 2
store i32 %14622, i32* %3
%14623 = load i32, i32* %3
%14624 = sub nsw i32 %14623, 1
store i32 %14624, i32* %3
%14625 = load i32, i32* %3
%14626 = and i32 %14625, -1044481
store i32 %14626, i32* %3
%14627 = load i32, i32* %3
%14628 = xor i32 %14627, 81954
store i32 %14628, i32* %3
%14629 = load i32, i32* %3
%14630 = srem i32 %14629, 268435443
store i32 %14630, i32* %3
%14631 = load i32, i32* %3
%14632 = add nsw i32 %14631, 6
store i32 %14632, i32* %3
%14633 = load i32, i32* %3
%14634 = mul nsw i32 %14633, 10
store i32 %14634, i32* %3
%14635 = load i32, i32* %3
%14636 = add nsw i32 %14635, 1
store i32 %14636, i32* %3
%14637 = load i32, i32* %3
%14638 = mul nsw i32 %14637, 2
store i32 %14638, i32* %3
%14639 = load i32, i32* %3
%14640 = sub nsw i32 %14639, 1
store i32 %14640, i32* %3
%14641 = load i32, i32* %3
%14642 = and i32 %14641, -1044481
store i32 %14642, i32* %3
%14643 = load i32, i32* %3
%14644 = xor i32 %14643, 81954
store i32 %14644, i32* %3
%14645 = load i32, i32* %3
%14646 = srem i32 %14645, 268435443
store i32 %14646, i32* %3
%14647 = load i32, i32* %3
%14648 = add nsw i32 %14647, 6
store i32 %14648, i32* %3
%14649 = load i32, i32* %3
%14650 = mul nsw i32 %14649, 10
store i32 %14650, i32* %3
%14651 = load i32, i32* %3
%14652 = add nsw i32 %14651, 1
store i32 %14652, i32* %3
%14653 = load i32, i32* %3
%14654 = mul nsw i32 %14653, 2
store i32 %14654, i32* %3
%14655 = load i32, i32* %3
%14656 = sub nsw i32 %14655, 1
store i32 %14656, i32* %3
%14657 = load i32, i32* %3
%14658 = and i32 %14657, -1044481
store i32 %14658, i32* %3
%14659 = load i32, i32* %3
%14660 = xor i32 %14659, 81954
store i32 %14660, i32* %3
%14661 = load i32, i32* %3
%14662 = srem i32 %14661, 268435443
store i32 %14662, i32* %3
%14663 = load i32, i32* %3
%14664 = add nsw i32 %14663, 6
store i32 %14664, i32* %3
%14665 = load i32, i32* %3
%14666 = mul nsw i32 %14665, 10
store i32 %14666, i32* %3
%14667 = load i32, i32* %3
%14668 = add nsw i32 %14667, 1
store i32 %14668, i32* %3
%14669 = load i32, i32* %3
%14670 = mul nsw i32 %14669, 2
store i32 %14670, i32* %3
%14671 = load i32, i32* %3
%14672 = sub nsw i32 %14671, 1
store i32 %14672, i32* %3
%14673 = load i32, i32* %3
%14674 = and i32 %14673, -1044481
store i32 %14674, i32* %3
%14675 = load i32, i32* %3
%14676 = xor i32 %14675, 81954
store i32 %14676, i32* %3
%14677 = load i32, i32* %3
%14678 = srem i32 %14677, 268435443
store i32 %14678, i32* %3
%14679 = load i32, i32* %3
%14680 = add nsw i32 %14679, 6
store i32 %14680, i32* %3
%14681 = load i32, i32* %3
%14682 = mul nsw i32 %14681, 10
store i32 %14682, i32* %3
%14683 = load i32, i32* %3
%14684 = add nsw i32 %14683, 1
store i32 %14684, i32* %3
%14685 = load i32, i32* %3
%14686 = mul nsw i32 %14685, 2
store i32 %14686, i32* %3
%14687 = load i32, i32* %3
%14688 = sub nsw i32 %14687, 1
store i32 %14688, i32* %3
%14689 = load i32, i32* %3
%14690 = and i32 %14689, -1044481
store i32 %14690, i32* %3
%14691 = load i32, i32* %3
%14692 = xor i32 %14691, 81954
store i32 %14692, i32* %3
%14693 = load i32, i32* %3
%14694 = srem i32 %14693, 268435443
store i32 %14694, i32* %3
%14695 = load i32, i32* %3
%14696 = add nsw i32 %14695, 6
store i32 %14696, i32* %3
%14697 = load i32, i32* %3
%14698 = mul nsw i32 %14697, 10
store i32 %14698, i32* %3
%14699 = load i32, i32* %3
%14700 = add nsw i32 %14699, 1
store i32 %14700, i32* %3
%14701 = load i32, i32* %3
%14702 = mul nsw i32 %14701, 2
store i32 %14702, i32* %3
%14703 = load i32, i32* %3
%14704 = sub nsw i32 %14703, 1
store i32 %14704, i32* %3
%14705 = load i32, i32* %3
%14706 = and i32 %14705, -1044481
store i32 %14706, i32* %3
%14707 = load i32, i32* %3
%14708 = xor i32 %14707, 81954
store i32 %14708, i32* %3
%14709 = load i32, i32* %3
%14710 = srem i32 %14709, 268435443
store i32 %14710, i32* %3
%14711 = load i32, i32* %3
%14712 = add nsw i32 %14711, 6
store i32 %14712, i32* %3
%14713 = load i32, i32* %3
%14714 = mul nsw i32 %14713, 10
store i32 %14714, i32* %3
%14715 = load i32, i32* %3
%14716 = add nsw i32 %14715, 1
store i32 %14716, i32* %3
%14717 = load i32, i32* %3
%14718 = mul nsw i32 %14717, 2
store i32 %14718, i32* %3
%14719 = load i32, i32* %3
%14720 = sub nsw i32 %14719, 1
store i32 %14720, i32* %3
%14721 = load i32, i32* %3
%14722 = and i32 %14721, -1044481
store i32 %14722, i32* %3
%14723 = load i32, i32* %3
%14724 = xor i32 %14723, 81954
store i32 %14724, i32* %3
%14725 = load i32, i32* %3
%14726 = srem i32 %14725, 268435443
store i32 %14726, i32* %3
%14727 = load i32, i32* %3
%14728 = add nsw i32 %14727, 6
store i32 %14728, i32* %3
%14729 = load i32, i32* %3
%14730 = mul nsw i32 %14729, 10
store i32 %14730, i32* %3
%14731 = load i32, i32* %3
%14732 = add nsw i32 %14731, 1
store i32 %14732, i32* %3
%14733 = load i32, i32* %3
%14734 = mul nsw i32 %14733, 2
store i32 %14734, i32* %3
%14735 = load i32, i32* %3
%14736 = sub nsw i32 %14735, 1
store i32 %14736, i32* %3
%14737 = load i32, i32* %3
%14738 = and i32 %14737, -1044481
store i32 %14738, i32* %3
%14739 = load i32, i32* %3
%14740 = xor i32 %14739, 81954
store i32 %14740, i32* %3
%14741 = load i32, i32* %3
%14742 = srem i32 %14741, 268435443
store i32 %14742, i32* %3
%14743 = load i32, i32* %3
%14744 = add nsw i32 %14743, 6
store i32 %14744, i32* %3
%14745 = load i32, i32* %3
%14746 = mul nsw i32 %14745, 10
store i32 %14746, i32* %3
%14747 = load i32, i32* %3
%14748 = add nsw i32 %14747, 1
store i32 %14748, i32* %3
%14749 = load i32, i32* %3
%14750 = mul nsw i32 %14749, 2
store i32 %14750, i32* %3
%14751 = load i32, i32* %3
%14752 = sub nsw i32 %14751, 1
store i32 %14752, i32* %3
%14753 = load i32, i32* %3
%14754 = and i32 %14753, -1044481
store i32 %14754, i32* %3
%14755 = load i32, i32* %3
%14756 = xor i32 %14755, 81954
store i32 %14756, i32* %3
%14757 = load i32, i32* %3
%14758 = srem i32 %14757, 268435443
store i32 %14758, i32* %3
%14759 = load i32, i32* %3
%14760 = add nsw i32 %14759, 6
store i32 %14760, i32* %3
%14761 = load i32, i32* %3
%14762 = mul nsw i32 %14761, 10
store i32 %14762, i32* %3
%14763 = load i32, i32* %3
%14764 = add nsw i32 %14763, 1
store i32 %14764, i32* %3
%14765 = load i32, i32* %3
%14766 = mul nsw i32 %14765, 2
store i32 %14766, i32* %3
%14767 = load i32, i32* %3
%14768 = sub nsw i32 %14767, 1
store i32 %14768, i32* %3
%14769 = load i32, i32* %3
%14770 = and i32 %14769, -1044481
store i32 %14770, i32* %3
%14771 = load i32, i32* %3
%14772 = xor i32 %14771, 81954
store i32 %14772, i32* %3
%14773 = load i32, i32* %3
%14774 = srem i32 %14773, 268435443
store i32 %14774, i32* %3
%14775 = load i32, i32* %3
%14776 = add nsw i32 %14775, 6
store i32 %14776, i32* %3
%14777 = load i32, i32* %3
%14778 = mul nsw i32 %14777, 10
store i32 %14778, i32* %3
%14779 = load i32, i32* %3
%14780 = add nsw i32 %14779, 1
store i32 %14780, i32* %3
%14781 = load i32, i32* %3
%14782 = mul nsw i32 %14781, 2
store i32 %14782, i32* %3
%14783 = load i32, i32* %3
%14784 = sub nsw i32 %14783, 1
store i32 %14784, i32* %3
%14785 = load i32, i32* %3
%14786 = and i32 %14785, -1044481
store i32 %14786, i32* %3
%14787 = load i32, i32* %3
%14788 = xor i32 %14787, 81954
store i32 %14788, i32* %3
%14789 = load i32, i32* %3
%14790 = srem i32 %14789, 268435443
store i32 %14790, i32* %3
%14791 = load i32, i32* %3
%14792 = add nsw i32 %14791, 6
store i32 %14792, i32* %3
%14793 = load i32, i32* %3
%14794 = mul nsw i32 %14793, 10
store i32 %14794, i32* %3
%14795 = load i32, i32* %3
%14796 = add nsw i32 %14795, 1
store i32 %14796, i32* %3
%14797 = load i32, i32* %3
%14798 = mul nsw i32 %14797, 2
store i32 %14798, i32* %3
%14799 = load i32, i32* %3
%14800 = sub nsw i32 %14799, 1
store i32 %14800, i32* %3
%14801 = load i32, i32* %3
%14802 = and i32 %14801, -1044481
store i32 %14802, i32* %3
%14803 = load i32, i32* %3
%14804 = xor i32 %14803, 81954
store i32 %14804, i32* %3
%14805 = load i32, i32* %3
%14806 = srem i32 %14805, 268435443
store i32 %14806, i32* %3
%14807 = load i32, i32* %3
%14808 = add nsw i32 %14807, 6
store i32 %14808, i32* %3
%14809 = load i32, i32* %3
%14810 = mul nsw i32 %14809, 10
store i32 %14810, i32* %3
%14811 = load i32, i32* %3
%14812 = add nsw i32 %14811, 1
store i32 %14812, i32* %3
%14813 = load i32, i32* %3
%14814 = mul nsw i32 %14813, 2
store i32 %14814, i32* %3
%14815 = load i32, i32* %3
%14816 = sub nsw i32 %14815, 1
store i32 %14816, i32* %3
%14817 = load i32, i32* %3
%14818 = and i32 %14817, -1044481
store i32 %14818, i32* %3
%14819 = load i32, i32* %3
%14820 = xor i32 %14819, 81954
store i32 %14820, i32* %3
%14821 = load i32, i32* %3
%14822 = srem i32 %14821, 268435443
store i32 %14822, i32* %3
%14823 = load i32, i32* %3
%14824 = add nsw i32 %14823, 6
store i32 %14824, i32* %3
%14825 = load i32, i32* %3
%14826 = mul nsw i32 %14825, 10
store i32 %14826, i32* %3
%14827 = load i32, i32* %3
%14828 = add nsw i32 %14827, 1
store i32 %14828, i32* %3
%14829 = load i32, i32* %3
%14830 = mul nsw i32 %14829, 2
store i32 %14830, i32* %3
%14831 = load i32, i32* %3
%14832 = sub nsw i32 %14831, 1
store i32 %14832, i32* %3
%14833 = load i32, i32* %3
%14834 = and i32 %14833, -1044481
store i32 %14834, i32* %3
%14835 = load i32, i32* %3
%14836 = xor i32 %14835, 81954
store i32 %14836, i32* %3
%14837 = load i32, i32* %3
%14838 = srem i32 %14837, 268435443
store i32 %14838, i32* %3
%14839 = load i32, i32* %3
%14840 = add nsw i32 %14839, 6
store i32 %14840, i32* %3
%14841 = load i32, i32* %3
%14842 = mul nsw i32 %14841, 10
store i32 %14842, i32* %3
%14843 = load i32, i32* %3
%14844 = add nsw i32 %14843, 1
store i32 %14844, i32* %3
%14845 = load i32, i32* %3
%14846 = mul nsw i32 %14845, 2
store i32 %14846, i32* %3
%14847 = load i32, i32* %3
%14848 = sub nsw i32 %14847, 1
store i32 %14848, i32* %3
%14849 = load i32, i32* %3
%14850 = and i32 %14849, -1044481
store i32 %14850, i32* %3
%14851 = load i32, i32* %3
%14852 = xor i32 %14851, 81954
store i32 %14852, i32* %3
%14853 = load i32, i32* %3
%14854 = srem i32 %14853, 268435443
store i32 %14854, i32* %3
%14855 = load i32, i32* %3
%14856 = add nsw i32 %14855, 6
store i32 %14856, i32* %3
%14857 = load i32, i32* %3
%14858 = mul nsw i32 %14857, 10
store i32 %14858, i32* %3
%14859 = load i32, i32* %3
%14860 = add nsw i32 %14859, 1
store i32 %14860, i32* %3
%14861 = load i32, i32* %3
%14862 = mul nsw i32 %14861, 2
store i32 %14862, i32* %3
%14863 = load i32, i32* %3
%14864 = sub nsw i32 %14863, 1
store i32 %14864, i32* %3
%14865 = load i32, i32* %3
%14866 = and i32 %14865, -1044481
store i32 %14866, i32* %3
%14867 = load i32, i32* %3
%14868 = xor i32 %14867, 81954
store i32 %14868, i32* %3
%14869 = load i32, i32* %3
%14870 = srem i32 %14869, 268435443
store i32 %14870, i32* %3
%14871 = load i32, i32* %3
%14872 = add nsw i32 %14871, 6
store i32 %14872, i32* %3
%14873 = load i32, i32* %3
%14874 = mul nsw i32 %14873, 10
store i32 %14874, i32* %3
%14875 = load i32, i32* %3
%14876 = add nsw i32 %14875, 1
store i32 %14876, i32* %3
%14877 = load i32, i32* %3
%14878 = mul nsw i32 %14877, 2
store i32 %14878, i32* %3
%14879 = load i32, i32* %3
%14880 = sub nsw i32 %14879, 1
store i32 %14880, i32* %3
%14881 = load i32, i32* %3
%14882 = and i32 %14881, -1044481
store i32 %14882, i32* %3
%14883 = load i32, i32* %3
%14884 = xor i32 %14883, 81954
store i32 %14884, i32* %3
%14885 = load i32, i32* %3
%14886 = srem i32 %14885, 268435443
store i32 %14886, i32* %3
%14887 = load i32, i32* %3
%14888 = add nsw i32 %14887, 6
store i32 %14888, i32* %3
%14889 = load i32, i32* %3
%14890 = mul nsw i32 %14889, 10
store i32 %14890, i32* %3
%14891 = load i32, i32* %3
%14892 = add nsw i32 %14891, 1
store i32 %14892, i32* %3
%14893 = load i32, i32* %3
%14894 = mul nsw i32 %14893, 2
store i32 %14894, i32* %3
%14895 = load i32, i32* %3
%14896 = sub nsw i32 %14895, 1
store i32 %14896, i32* %3
%14897 = load i32, i32* %3
%14898 = and i32 %14897, -1044481
store i32 %14898, i32* %3
%14899 = load i32, i32* %3
%14900 = xor i32 %14899, 81954
store i32 %14900, i32* %3
%14901 = load i32, i32* %3
%14902 = srem i32 %14901, 268435443
store i32 %14902, i32* %3
%14903 = load i32, i32* %3
%14904 = add nsw i32 %14903, 6
store i32 %14904, i32* %3
%14905 = load i32, i32* %3
%14906 = mul nsw i32 %14905, 10
store i32 %14906, i32* %3
%14907 = load i32, i32* %3
%14908 = add nsw i32 %14907, 1
store i32 %14908, i32* %3
%14909 = load i32, i32* %3
%14910 = mul nsw i32 %14909, 2
store i32 %14910, i32* %3
%14911 = load i32, i32* %3
%14912 = sub nsw i32 %14911, 1
store i32 %14912, i32* %3
%14913 = load i32, i32* %3
%14914 = and i32 %14913, -1044481
store i32 %14914, i32* %3
%14915 = load i32, i32* %3
%14916 = xor i32 %14915, 81954
store i32 %14916, i32* %3
%14917 = load i32, i32* %3
%14918 = srem i32 %14917, 268435443
store i32 %14918, i32* %3
%14919 = load i32, i32* %3
%14920 = add nsw i32 %14919, 6
store i32 %14920, i32* %3
%14921 = load i32, i32* %3
%14922 = mul nsw i32 %14921, 10
store i32 %14922, i32* %3
%14923 = load i32, i32* %3
%14924 = add nsw i32 %14923, 1
store i32 %14924, i32* %3
%14925 = load i32, i32* %3
%14926 = mul nsw i32 %14925, 2
store i32 %14926, i32* %3
%14927 = load i32, i32* %3
%14928 = sub nsw i32 %14927, 1
store i32 %14928, i32* %3
%14929 = load i32, i32* %3
%14930 = and i32 %14929, -1044481
store i32 %14930, i32* %3
%14931 = load i32, i32* %3
%14932 = xor i32 %14931, 81954
store i32 %14932, i32* %3
%14933 = load i32, i32* %3
%14934 = srem i32 %14933, 268435443
store i32 %14934, i32* %3
%14935 = load i32, i32* %3
%14936 = add nsw i32 %14935, 6
store i32 %14936, i32* %3
%14937 = load i32, i32* %3
%14938 = mul nsw i32 %14937, 10
store i32 %14938, i32* %3
%14939 = load i32, i32* %3
%14940 = add nsw i32 %14939, 1
store i32 %14940, i32* %3
%14941 = load i32, i32* %3
%14942 = mul nsw i32 %14941, 2
store i32 %14942, i32* %3
%14943 = load i32, i32* %3
%14944 = sub nsw i32 %14943, 1
store i32 %14944, i32* %3
%14945 = load i32, i32* %3
%14946 = and i32 %14945, -1044481
store i32 %14946, i32* %3
%14947 = load i32, i32* %3
%14948 = xor i32 %14947, 81954
store i32 %14948, i32* %3
%14949 = load i32, i32* %3
%14950 = srem i32 %14949, 268435443
store i32 %14950, i32* %3
%14951 = load i32, i32* %3
%14952 = add nsw i32 %14951, 6
store i32 %14952, i32* %3
%14953 = load i32, i32* %3
%14954 = mul nsw i32 %14953, 10
store i32 %14954, i32* %3
%14955 = load i32, i32* %3
%14956 = add nsw i32 %14955, 1
store i32 %14956, i32* %3
%14957 = load i32, i32* %3
%14958 = mul nsw i32 %14957, 2
store i32 %14958, i32* %3
%14959 = load i32, i32* %3
%14960 = sub nsw i32 %14959, 1
store i32 %14960, i32* %3
%14961 = load i32, i32* %3
%14962 = and i32 %14961, -1044481
store i32 %14962, i32* %3
%14963 = load i32, i32* %3
%14964 = xor i32 %14963, 81954
store i32 %14964, i32* %3
%14965 = load i32, i32* %3
%14966 = srem i32 %14965, 268435443
store i32 %14966, i32* %3
%14967 = load i32, i32* %3
%14968 = add nsw i32 %14967, 6
store i32 %14968, i32* %3
%14969 = load i32, i32* %3
%14970 = mul nsw i32 %14969, 10
store i32 %14970, i32* %3
%14971 = load i32, i32* %3
%14972 = add nsw i32 %14971, 1
store i32 %14972, i32* %3
%14973 = load i32, i32* %3
%14974 = mul nsw i32 %14973, 2
store i32 %14974, i32* %3
%14975 = load i32, i32* %3
%14976 = sub nsw i32 %14975, 1
store i32 %14976, i32* %3
%14977 = load i32, i32* %3
%14978 = and i32 %14977, -1044481
store i32 %14978, i32* %3
%14979 = load i32, i32* %3
%14980 = xor i32 %14979, 81954
store i32 %14980, i32* %3
%14981 = load i32, i32* %3
%14982 = srem i32 %14981, 268435443
store i32 %14982, i32* %3
%14983 = load i32, i32* %3
%14984 = add nsw i32 %14983, 6
store i32 %14984, i32* %3
%14985 = load i32, i32* %3
%14986 = mul nsw i32 %14985, 10
store i32 %14986, i32* %3
%14987 = load i32, i32* %3
%14988 = add nsw i32 %14987, 1
store i32 %14988, i32* %3
%14989 = load i32, i32* %3
%14990 = mul nsw i32 %14989, 2
store i32 %14990, i32* %3
%14991 = load i32, i32* %3
%14992 = sub nsw i32 %14991, 1
store i32 %14992, i32* %3
%14993 = load i32, i32* %3
%14994 = and i32 %14993, -1044481
store i32 %14994, i32* %3
%14995 = load i32, i32* %3
%14996 = xor i32 %14995, 81954
store i32 %14996, i32* %3
%14997 = load i32, i32* %3
%14998 = srem i32 %14997, 268435443
store i32 %14998, i32* %3
%14999 = load i32, i32* %3
%15000 = add nsw i32 %14999, 6
store i32 %15000, i32* %3
%15001 = load i32, i32* %3
%15002 = mul nsw i32 %15001, 10
store i32 %15002, i32* %3
%15003 = load i32, i32* %3
%15004 = add nsw i32 %15003, 1
store i32 %15004, i32* %3
%15005 = load i32, i32* %3
%15006 = mul nsw i32 %15005, 2
store i32 %15006, i32* %3
%15007 = load i32, i32* %3
%15008 = sub nsw i32 %15007, 1
store i32 %15008, i32* %3
%15009 = load i32, i32* %3
%15010 = and i32 %15009, -1044481
store i32 %15010, i32* %3
%15011 = load i32, i32* %3
%15012 = xor i32 %15011, 81954
store i32 %15012, i32* %3
%15013 = load i32, i32* %3
%15014 = srem i32 %15013, 268435443
store i32 %15014, i32* %3
%15015 = load i32, i32* %3
%15016 = add nsw i32 %15015, 6
store i32 %15016, i32* %3
%15017 = load i32, i32* %3
%15018 = mul nsw i32 %15017, 10
store i32 %15018, i32* %3
%15019 = load i32, i32* %3
%15020 = add nsw i32 %15019, 1
store i32 %15020, i32* %3
%15021 = load i32, i32* %3
%15022 = mul nsw i32 %15021, 2
store i32 %15022, i32* %3
%15023 = load i32, i32* %3
%15024 = sub nsw i32 %15023, 1
store i32 %15024, i32* %3
%15025 = load i32, i32* %3
%15026 = and i32 %15025, -1044481
store i32 %15026, i32* %3
%15027 = load i32, i32* %3
%15028 = xor i32 %15027, 81954
store i32 %15028, i32* %3
%15029 = load i32, i32* %3
%15030 = srem i32 %15029, 268435443
store i32 %15030, i32* %3
%15031 = load i32, i32* %3
%15032 = add nsw i32 %15031, 6
store i32 %15032, i32* %3
%15033 = load i32, i32* %3
%15034 = mul nsw i32 %15033, 10
store i32 %15034, i32* %3
%15035 = load i32, i32* %3
%15036 = add nsw i32 %15035, 1
store i32 %15036, i32* %3
%15037 = load i32, i32* %3
%15038 = mul nsw i32 %15037, 2
store i32 %15038, i32* %3
%15039 = load i32, i32* %3
%15040 = sub nsw i32 %15039, 1
store i32 %15040, i32* %3
%15041 = load i32, i32* %3
%15042 = and i32 %15041, -1044481
store i32 %15042, i32* %3
%15043 = load i32, i32* %3
%15044 = xor i32 %15043, 81954
store i32 %15044, i32* %3
%15045 = load i32, i32* %3
%15046 = srem i32 %15045, 268435443
store i32 %15046, i32* %3
%15047 = load i32, i32* %3
%15048 = add nsw i32 %15047, 6
store i32 %15048, i32* %3
%15049 = load i32, i32* %3
%15050 = mul nsw i32 %15049, 10
store i32 %15050, i32* %3
%15051 = load i32, i32* %3
%15052 = add nsw i32 %15051, 1
store i32 %15052, i32* %3
%15053 = load i32, i32* %3
%15054 = mul nsw i32 %15053, 2
store i32 %15054, i32* %3
%15055 = load i32, i32* %3
%15056 = sub nsw i32 %15055, 1
store i32 %15056, i32* %3
%15057 = load i32, i32* %3
%15058 = and i32 %15057, -1044481
store i32 %15058, i32* %3
%15059 = load i32, i32* %3
%15060 = xor i32 %15059, 81954
store i32 %15060, i32* %3
%15061 = load i32, i32* %3
%15062 = srem i32 %15061, 268435443
store i32 %15062, i32* %3
%15063 = load i32, i32* %3
%15064 = add nsw i32 %15063, 6
store i32 %15064, i32* %3
%15065 = load i32, i32* %3
%15066 = mul nsw i32 %15065, 10
store i32 %15066, i32* %3
%15067 = load i32, i32* %3
%15068 = add nsw i32 %15067, 1
store i32 %15068, i32* %3
%15069 = load i32, i32* %3
%15070 = mul nsw i32 %15069, 2
store i32 %15070, i32* %3
%15071 = load i32, i32* %3
%15072 = sub nsw i32 %15071, 1
store i32 %15072, i32* %3
%15073 = load i32, i32* %3
%15074 = and i32 %15073, -1044481
store i32 %15074, i32* %3
%15075 = load i32, i32* %3
%15076 = xor i32 %15075, 81954
store i32 %15076, i32* %3
%15077 = load i32, i32* %3
%15078 = srem i32 %15077, 268435443
store i32 %15078, i32* %3
%15079 = load i32, i32* %3
%15080 = add nsw i32 %15079, 6
store i32 %15080, i32* %3
%15081 = load i32, i32* %3
%15082 = mul nsw i32 %15081, 10
store i32 %15082, i32* %3
%15083 = load i32, i32* %3
%15084 = add nsw i32 %15083, 1
store i32 %15084, i32* %3
%15085 = load i32, i32* %3
%15086 = mul nsw i32 %15085, 2
store i32 %15086, i32* %3
%15087 = load i32, i32* %3
%15088 = sub nsw i32 %15087, 1
store i32 %15088, i32* %3
%15089 = load i32, i32* %3
%15090 = and i32 %15089, -1044481
store i32 %15090, i32* %3
%15091 = load i32, i32* %3
%15092 = xor i32 %15091, 81954
store i32 %15092, i32* %3
%15093 = load i32, i32* %3
%15094 = srem i32 %15093, 268435443
store i32 %15094, i32* %3
%15095 = load i32, i32* %3
%15096 = add nsw i32 %15095, 6
store i32 %15096, i32* %3
%15097 = load i32, i32* %3
%15098 = mul nsw i32 %15097, 10
store i32 %15098, i32* %3
%15099 = load i32, i32* %3
%15100 = add nsw i32 %15099, 1
store i32 %15100, i32* %3
%15101 = load i32, i32* %3
%15102 = mul nsw i32 %15101, 2
store i32 %15102, i32* %3
%15103 = load i32, i32* %3
%15104 = sub nsw i32 %15103, 1
store i32 %15104, i32* %3
%15105 = load i32, i32* %3
%15106 = and i32 %15105, -1044481
store i32 %15106, i32* %3
%15107 = load i32, i32* %3
%15108 = xor i32 %15107, 81954
store i32 %15108, i32* %3
%15109 = load i32, i32* %3
%15110 = srem i32 %15109, 268435443
store i32 %15110, i32* %3
%15111 = load i32, i32* %3
%15112 = add nsw i32 %15111, 6
store i32 %15112, i32* %3
%15113 = load i32, i32* %3
%15114 = mul nsw i32 %15113, 10
store i32 %15114, i32* %3
%15115 = load i32, i32* %3
%15116 = add nsw i32 %15115, 1
store i32 %15116, i32* %3
%15117 = load i32, i32* %3
%15118 = mul nsw i32 %15117, 2
store i32 %15118, i32* %3
%15119 = load i32, i32* %3
%15120 = sub nsw i32 %15119, 1
store i32 %15120, i32* %3
%15121 = load i32, i32* %3
%15122 = and i32 %15121, -1044481
store i32 %15122, i32* %3
%15123 = load i32, i32* %3
%15124 = xor i32 %15123, 81954
store i32 %15124, i32* %3
%15125 = load i32, i32* %3
%15126 = srem i32 %15125, 268435443
store i32 %15126, i32* %3
%15127 = load i32, i32* %3
%15128 = add nsw i32 %15127, 6
store i32 %15128, i32* %3
%15129 = load i32, i32* %3
%15130 = mul nsw i32 %15129, 10
store i32 %15130, i32* %3
%15131 = load i32, i32* %3
%15132 = add nsw i32 %15131, 1
store i32 %15132, i32* %3
%15133 = load i32, i32* %3
%15134 = mul nsw i32 %15133, 2
store i32 %15134, i32* %3
%15135 = load i32, i32* %3
%15136 = sub nsw i32 %15135, 1
store i32 %15136, i32* %3
%15137 = load i32, i32* %3
%15138 = and i32 %15137, -1044481
store i32 %15138, i32* %3
%15139 = load i32, i32* %3
%15140 = xor i32 %15139, 81954
store i32 %15140, i32* %3
%15141 = load i32, i32* %3
%15142 = srem i32 %15141, 268435443
store i32 %15142, i32* %3
%15143 = load i32, i32* %3
%15144 = add nsw i32 %15143, 6
store i32 %15144, i32* %3
%15145 = load i32, i32* %3
%15146 = mul nsw i32 %15145, 10
store i32 %15146, i32* %3
%15147 = load i32, i32* %3
%15148 = add nsw i32 %15147, 1
store i32 %15148, i32* %3
%15149 = load i32, i32* %3
%15150 = mul nsw i32 %15149, 2
store i32 %15150, i32* %3
%15151 = load i32, i32* %3
%15152 = sub nsw i32 %15151, 1
store i32 %15152, i32* %3
%15153 = load i32, i32* %3
%15154 = and i32 %15153, -1044481
store i32 %15154, i32* %3
%15155 = load i32, i32* %3
%15156 = xor i32 %15155, 81954
store i32 %15156, i32* %3
%15157 = load i32, i32* %3
%15158 = srem i32 %15157, 268435443
store i32 %15158, i32* %3
%15159 = load i32, i32* %3
%15160 = add nsw i32 %15159, 6
store i32 %15160, i32* %3
%15161 = load i32, i32* %3
%15162 = mul nsw i32 %15161, 10
store i32 %15162, i32* %3
%15163 = load i32, i32* %3
%15164 = add nsw i32 %15163, 1
store i32 %15164, i32* %3
%15165 = load i32, i32* %3
%15166 = mul nsw i32 %15165, 2
store i32 %15166, i32* %3
%15167 = load i32, i32* %3
%15168 = sub nsw i32 %15167, 1
store i32 %15168, i32* %3
%15169 = load i32, i32* %3
%15170 = and i32 %15169, -1044481
store i32 %15170, i32* %3
%15171 = load i32, i32* %3
%15172 = xor i32 %15171, 81954
store i32 %15172, i32* %3
%15173 = load i32, i32* %3
%15174 = srem i32 %15173, 268435443
store i32 %15174, i32* %3
%15175 = load i32, i32* %3
%15176 = add nsw i32 %15175, 6
store i32 %15176, i32* %3
%15177 = load i32, i32* %3
%15178 = mul nsw i32 %15177, 10
store i32 %15178, i32* %3
%15179 = load i32, i32* %3
%15180 = add nsw i32 %15179, 1
store i32 %15180, i32* %3
%15181 = load i32, i32* %3
%15182 = mul nsw i32 %15181, 2
store i32 %15182, i32* %3
%15183 = load i32, i32* %3
%15184 = sub nsw i32 %15183, 1
store i32 %15184, i32* %3
%15185 = load i32, i32* %3
%15186 = and i32 %15185, -1044481
store i32 %15186, i32* %3
%15187 = load i32, i32* %3
%15188 = xor i32 %15187, 81954
store i32 %15188, i32* %3
%15189 = load i32, i32* %3
%15190 = srem i32 %15189, 268435443
store i32 %15190, i32* %3
%15191 = load i32, i32* %3
%15192 = add nsw i32 %15191, 6
store i32 %15192, i32* %3
%15193 = load i32, i32* %3
%15194 = mul nsw i32 %15193, 10
store i32 %15194, i32* %3
%15195 = load i32, i32* %3
%15196 = add nsw i32 %15195, 1
store i32 %15196, i32* %3
%15197 = load i32, i32* %3
%15198 = mul nsw i32 %15197, 2
store i32 %15198, i32* %3
%15199 = load i32, i32* %3
%15200 = sub nsw i32 %15199, 1
store i32 %15200, i32* %3
%15201 = load i32, i32* %3
%15202 = and i32 %15201, -1044481
store i32 %15202, i32* %3
%15203 = load i32, i32* %3
%15204 = xor i32 %15203, 81954
store i32 %15204, i32* %3
%15205 = load i32, i32* %3
%15206 = srem i32 %15205, 268435443
store i32 %15206, i32* %3
%15207 = load i32, i32* %3
%15208 = add nsw i32 %15207, 6
store i32 %15208, i32* %3
%15209 = load i32, i32* %3
%15210 = mul nsw i32 %15209, 10
store i32 %15210, i32* %3
%15211 = load i32, i32* %3
%15212 = add nsw i32 %15211, 1
store i32 %15212, i32* %3
%15213 = load i32, i32* %3
%15214 = mul nsw i32 %15213, 2
store i32 %15214, i32* %3
%15215 = load i32, i32* %3
%15216 = sub nsw i32 %15215, 1
store i32 %15216, i32* %3
%15217 = load i32, i32* %3
%15218 = and i32 %15217, -1044481
store i32 %15218, i32* %3
%15219 = load i32, i32* %3
%15220 = xor i32 %15219, 81954
store i32 %15220, i32* %3
%15221 = load i32, i32* %3
%15222 = srem i32 %15221, 268435443
store i32 %15222, i32* %3
%15223 = load i32, i32* %3
%15224 = add nsw i32 %15223, 6
store i32 %15224, i32* %3
%15225 = load i32, i32* %3
%15226 = mul nsw i32 %15225, 10
store i32 %15226, i32* %3
%15227 = load i32, i32* %3
%15228 = add nsw i32 %15227, 1
store i32 %15228, i32* %3
%15229 = load i32, i32* %3
%15230 = mul nsw i32 %15229, 2
store i32 %15230, i32* %3
%15231 = load i32, i32* %3
%15232 = sub nsw i32 %15231, 1
store i32 %15232, i32* %3
%15233 = load i32, i32* %3
%15234 = and i32 %15233, -1044481
store i32 %15234, i32* %3
%15235 = load i32, i32* %3
%15236 = xor i32 %15235, 81954
store i32 %15236, i32* %3
%15237 = load i32, i32* %3
%15238 = srem i32 %15237, 268435443
store i32 %15238, i32* %3
%15239 = load i32, i32* %3
%15240 = add nsw i32 %15239, 6
store i32 %15240, i32* %3
%15241 = load i32, i32* %3
%15242 = mul nsw i32 %15241, 10
store i32 %15242, i32* %3
%15243 = load i32, i32* %3
%15244 = add nsw i32 %15243, 1
store i32 %15244, i32* %3
%15245 = load i32, i32* %3
%15246 = mul nsw i32 %15245, 2
store i32 %15246, i32* %3
%15247 = load i32, i32* %3
%15248 = sub nsw i32 %15247, 1
store i32 %15248, i32* %3
%15249 = load i32, i32* %3
%15250 = and i32 %15249, -1044481
store i32 %15250, i32* %3
%15251 = load i32, i32* %3
%15252 = xor i32 %15251, 81954
store i32 %15252, i32* %3
%15253 = load i32, i32* %3
%15254 = srem i32 %15253, 268435443
store i32 %15254, i32* %3
%15255 = load i32, i32* %3
%15256 = add nsw i32 %15255, 6
store i32 %15256, i32* %3
%15257 = load i32, i32* %3
%15258 = mul nsw i32 %15257, 10
store i32 %15258, i32* %3
%15259 = load i32, i32* %3
%15260 = add nsw i32 %15259, 1
store i32 %15260, i32* %3
%15261 = load i32, i32* %3
%15262 = mul nsw i32 %15261, 2
store i32 %15262, i32* %3
%15263 = load i32, i32* %3
%15264 = sub nsw i32 %15263, 1
store i32 %15264, i32* %3
%15265 = load i32, i32* %3
%15266 = and i32 %15265, -1044481
store i32 %15266, i32* %3
%15267 = load i32, i32* %3
%15268 = xor i32 %15267, 81954
store i32 %15268, i32* %3
%15269 = load i32, i32* %3
%15270 = srem i32 %15269, 268435443
store i32 %15270, i32* %3
%15271 = load i32, i32* %3
%15272 = add nsw i32 %15271, 6
store i32 %15272, i32* %3
%15273 = load i32, i32* %3
%15274 = mul nsw i32 %15273, 10
store i32 %15274, i32* %3
%15275 = load i32, i32* %3
%15276 = add nsw i32 %15275, 1
store i32 %15276, i32* %3
%15277 = load i32, i32* %3
%15278 = mul nsw i32 %15277, 2
store i32 %15278, i32* %3
%15279 = load i32, i32* %3
%15280 = sub nsw i32 %15279, 1
store i32 %15280, i32* %3
%15281 = load i32, i32* %3
%15282 = and i32 %15281, -1044481
store i32 %15282, i32* %3
%15283 = load i32, i32* %3
%15284 = xor i32 %15283, 81954
store i32 %15284, i32* %3
%15285 = load i32, i32* %3
%15286 = srem i32 %15285, 268435443
store i32 %15286, i32* %3
%15287 = load i32, i32* %3
%15288 = add nsw i32 %15287, 6
store i32 %15288, i32* %3
%15289 = load i32, i32* %3
%15290 = mul nsw i32 %15289, 10
store i32 %15290, i32* %3
%15291 = load i32, i32* %3
%15292 = add nsw i32 %15291, 1
store i32 %15292, i32* %3
%15293 = load i32, i32* %3
%15294 = mul nsw i32 %15293, 2
store i32 %15294, i32* %3
%15295 = load i32, i32* %3
%15296 = sub nsw i32 %15295, 1
store i32 %15296, i32* %3
%15297 = load i32, i32* %3
%15298 = and i32 %15297, -1044481
store i32 %15298, i32* %3
%15299 = load i32, i32* %3
%15300 = xor i32 %15299, 81954
store i32 %15300, i32* %3
%15301 = load i32, i32* %3
%15302 = srem i32 %15301, 268435443
store i32 %15302, i32* %3
%15303 = load i32, i32* %3
%15304 = add nsw i32 %15303, 6
store i32 %15304, i32* %3
%15305 = load i32, i32* %3
%15306 = mul nsw i32 %15305, 10
store i32 %15306, i32* %3
%15307 = load i32, i32* %3
%15308 = add nsw i32 %15307, 1
store i32 %15308, i32* %3
%15309 = load i32, i32* %3
%15310 = mul nsw i32 %15309, 2
store i32 %15310, i32* %3
%15311 = load i32, i32* %3
%15312 = sub nsw i32 %15311, 1
store i32 %15312, i32* %3
%15313 = load i32, i32* %3
%15314 = and i32 %15313, -1044481
store i32 %15314, i32* %3
%15315 = load i32, i32* %3
%15316 = xor i32 %15315, 81954
store i32 %15316, i32* %3
%15317 = load i32, i32* %3
%15318 = srem i32 %15317, 268435443
store i32 %15318, i32* %3
%15319 = load i32, i32* %3
%15320 = add nsw i32 %15319, 6
store i32 %15320, i32* %3
%15321 = load i32, i32* %3
%15322 = mul nsw i32 %15321, 10
store i32 %15322, i32* %3
%15323 = load i32, i32* %3
%15324 = add nsw i32 %15323, 1
store i32 %15324, i32* %3
%15325 = load i32, i32* %3
%15326 = mul nsw i32 %15325, 2
store i32 %15326, i32* %3
%15327 = load i32, i32* %3
%15328 = sub nsw i32 %15327, 1
store i32 %15328, i32* %3
%15329 = load i32, i32* %3
%15330 = and i32 %15329, -1044481
store i32 %15330, i32* %3
%15331 = load i32, i32* %3
%15332 = xor i32 %15331, 81954
store i32 %15332, i32* %3
%15333 = load i32, i32* %3
%15334 = srem i32 %15333, 268435443
store i32 %15334, i32* %3
%15335 = load i32, i32* %3
%15336 = add nsw i32 %15335, 6
store i32 %15336, i32* %3
%15337 = load i32, i32* %3
%15338 = mul nsw i32 %15337, 10
store i32 %15338, i32* %3
%15339 = load i32, i32* %3
%15340 = add nsw i32 %15339, 1
store i32 %15340, i32* %3
%15341 = load i32, i32* %3
%15342 = mul nsw i32 %15341, 2
store i32 %15342, i32* %3
%15343 = load i32, i32* %3
%15344 = sub nsw i32 %15343, 1
store i32 %15344, i32* %3
%15345 = load i32, i32* %3
%15346 = and i32 %15345, -1044481
store i32 %15346, i32* %3
%15347 = load i32, i32* %3
%15348 = xor i32 %15347, 81954
store i32 %15348, i32* %3
%15349 = load i32, i32* %3
%15350 = srem i32 %15349, 268435443
store i32 %15350, i32* %3
%15351 = load i32, i32* %3
%15352 = add nsw i32 %15351, 6
store i32 %15352, i32* %3
%15353 = load i32, i32* %3
%15354 = mul nsw i32 %15353, 10
store i32 %15354, i32* %3
%15355 = load i32, i32* %3
%15356 = add nsw i32 %15355, 1
store i32 %15356, i32* %3
%15357 = load i32, i32* %3
%15358 = mul nsw i32 %15357, 2
store i32 %15358, i32* %3
%15359 = load i32, i32* %3
%15360 = sub nsw i32 %15359, 1
store i32 %15360, i32* %3
%15361 = load i32, i32* %3
%15362 = and i32 %15361, -1044481
store i32 %15362, i32* %3
%15363 = load i32, i32* %3
%15364 = xor i32 %15363, 81954
store i32 %15364, i32* %3
%15365 = load i32, i32* %3
%15366 = srem i32 %15365, 268435443
store i32 %15366, i32* %3
%15367 = load i32, i32* %3
%15368 = add nsw i32 %15367, 6
store i32 %15368, i32* %3
%15369 = load i32, i32* %3
%15370 = mul nsw i32 %15369, 10
store i32 %15370, i32* %3
%15371 = load i32, i32* %3
%15372 = add nsw i32 %15371, 1
store i32 %15372, i32* %3
%15373 = load i32, i32* %3
%15374 = mul nsw i32 %15373, 2
store i32 %15374, i32* %3
%15375 = load i32, i32* %3
%15376 = sub nsw i32 %15375, 1
store i32 %15376, i32* %3
%15377 = load i32, i32* %3
%15378 = and i32 %15377, -1044481
store i32 %15378, i32* %3
%15379 = load i32, i32* %3
%15380 = xor i32 %15379, 81954
store i32 %15380, i32* %3
%15381 = load i32, i32* %3
%15382 = srem i32 %15381, 268435443
store i32 %15382, i32* %3
%15383 = load i32, i32* %3
%15384 = add nsw i32 %15383, 6
store i32 %15384, i32* %3
%15385 = load i32, i32* %3
%15386 = mul nsw i32 %15385, 10
store i32 %15386, i32* %3
%15387 = load i32, i32* %3
%15388 = add nsw i32 %15387, 1
store i32 %15388, i32* %3
%15389 = load i32, i32* %3
%15390 = mul nsw i32 %15389, 2
store i32 %15390, i32* %3
%15391 = load i32, i32* %3
%15392 = sub nsw i32 %15391, 1
store i32 %15392, i32* %3
%15393 = load i32, i32* %3
%15394 = and i32 %15393, -1044481
store i32 %15394, i32* %3
%15395 = load i32, i32* %3
%15396 = xor i32 %15395, 81954
store i32 %15396, i32* %3
%15397 = load i32, i32* %3
%15398 = srem i32 %15397, 268435443
store i32 %15398, i32* %3
%15399 = load i32, i32* %3
%15400 = add nsw i32 %15399, 6
store i32 %15400, i32* %3
%15401 = load i32, i32* %3
%15402 = mul nsw i32 %15401, 10
store i32 %15402, i32* %3
%15403 = load i32, i32* %3
%15404 = add nsw i32 %15403, 1
store i32 %15404, i32* %3
%15405 = load i32, i32* %3
%15406 = mul nsw i32 %15405, 2
store i32 %15406, i32* %3
%15407 = load i32, i32* %3
%15408 = sub nsw i32 %15407, 1
store i32 %15408, i32* %3
%15409 = load i32, i32* %3
%15410 = and i32 %15409, -1044481
store i32 %15410, i32* %3
%15411 = load i32, i32* %3
%15412 = xor i32 %15411, 81954
store i32 %15412, i32* %3
%15413 = load i32, i32* %3
%15414 = srem i32 %15413, 268435443
store i32 %15414, i32* %3
%15415 = load i32, i32* %3
%15416 = add nsw i32 %15415, 6
store i32 %15416, i32* %3
%15417 = load i32, i32* %3
%15418 = mul nsw i32 %15417, 10
store i32 %15418, i32* %3
%15419 = load i32, i32* %3
%15420 = add nsw i32 %15419, 1
store i32 %15420, i32* %3
%15421 = load i32, i32* %3
%15422 = mul nsw i32 %15421, 2
store i32 %15422, i32* %3
%15423 = load i32, i32* %3
%15424 = sub nsw i32 %15423, 1
store i32 %15424, i32* %3
%15425 = load i32, i32* %3
%15426 = and i32 %15425, -1044481
store i32 %15426, i32* %3
%15427 = load i32, i32* %3
%15428 = xor i32 %15427, 81954
store i32 %15428, i32* %3
%15429 = load i32, i32* %3
%15430 = srem i32 %15429, 268435443
store i32 %15430, i32* %3
%15431 = load i32, i32* %3
%15432 = add nsw i32 %15431, 6
store i32 %15432, i32* %3
%15433 = load i32, i32* %3
%15434 = mul nsw i32 %15433, 10
store i32 %15434, i32* %3
%15435 = load i32, i32* %3
%15436 = add nsw i32 %15435, 1
store i32 %15436, i32* %3
%15437 = load i32, i32* %3
%15438 = mul nsw i32 %15437, 2
store i32 %15438, i32* %3
%15439 = load i32, i32* %3
%15440 = sub nsw i32 %15439, 1
store i32 %15440, i32* %3
%15441 = load i32, i32* %3
%15442 = and i32 %15441, -1044481
store i32 %15442, i32* %3
%15443 = load i32, i32* %3
%15444 = xor i32 %15443, 81954
store i32 %15444, i32* %3
%15445 = load i32, i32* %3
%15446 = srem i32 %15445, 268435443
store i32 %15446, i32* %3
%15447 = load i32, i32* %3
%15448 = add nsw i32 %15447, 6
store i32 %15448, i32* %3
%15449 = load i32, i32* %3
%15450 = mul nsw i32 %15449, 10
store i32 %15450, i32* %3
%15451 = load i32, i32* %3
%15452 = add nsw i32 %15451, 1
store i32 %15452, i32* %3
%15453 = load i32, i32* %3
%15454 = mul nsw i32 %15453, 2
store i32 %15454, i32* %3
%15455 = load i32, i32* %3
%15456 = sub nsw i32 %15455, 1
store i32 %15456, i32* %3
%15457 = load i32, i32* %3
%15458 = and i32 %15457, -1044481
store i32 %15458, i32* %3
%15459 = load i32, i32* %3
%15460 = xor i32 %15459, 81954
store i32 %15460, i32* %3
%15461 = load i32, i32* %3
%15462 = srem i32 %15461, 268435443
store i32 %15462, i32* %3
%15463 = load i32, i32* %3
%15464 = add nsw i32 %15463, 6
store i32 %15464, i32* %3
%15465 = load i32, i32* %3
%15466 = mul nsw i32 %15465, 10
store i32 %15466, i32* %3
%15467 = load i32, i32* %3
%15468 = add nsw i32 %15467, 1
store i32 %15468, i32* %3
%15469 = load i32, i32* %3
%15470 = mul nsw i32 %15469, 2
store i32 %15470, i32* %3
%15471 = load i32, i32* %3
%15472 = sub nsw i32 %15471, 1
store i32 %15472, i32* %3
%15473 = load i32, i32* %3
%15474 = and i32 %15473, -1044481
store i32 %15474, i32* %3
%15475 = load i32, i32* %3
%15476 = xor i32 %15475, 81954
store i32 %15476, i32* %3
%15477 = load i32, i32* %3
%15478 = srem i32 %15477, 268435443
store i32 %15478, i32* %3
%15479 = load i32, i32* %3
%15480 = add nsw i32 %15479, 6
store i32 %15480, i32* %3
%15481 = load i32, i32* %3
%15482 = mul nsw i32 %15481, 10
store i32 %15482, i32* %3
%15483 = load i32, i32* %3
%15484 = add nsw i32 %15483, 1
store i32 %15484, i32* %3
%15485 = load i32, i32* %3
%15486 = mul nsw i32 %15485, 2
store i32 %15486, i32* %3
%15487 = load i32, i32* %3
%15488 = sub nsw i32 %15487, 1
store i32 %15488, i32* %3
%15489 = load i32, i32* %3
%15490 = and i32 %15489, -1044481
store i32 %15490, i32* %3
%15491 = load i32, i32* %3
%15492 = xor i32 %15491, 81954
store i32 %15492, i32* %3
%15493 = load i32, i32* %3
%15494 = srem i32 %15493, 268435443
store i32 %15494, i32* %3
%15495 = load i32, i32* %3
%15496 = add nsw i32 %15495, 6
store i32 %15496, i32* %3
%15497 = load i32, i32* %3
%15498 = mul nsw i32 %15497, 10
store i32 %15498, i32* %3
%15499 = load i32, i32* %3
%15500 = add nsw i32 %15499, 1
store i32 %15500, i32* %3
%15501 = load i32, i32* %3
%15502 = mul nsw i32 %15501, 2
store i32 %15502, i32* %3
%15503 = load i32, i32* %3
%15504 = sub nsw i32 %15503, 1
store i32 %15504, i32* %3
%15505 = load i32, i32* %3
%15506 = and i32 %15505, -1044481
store i32 %15506, i32* %3
%15507 = load i32, i32* %3
%15508 = xor i32 %15507, 81954
store i32 %15508, i32* %3
%15509 = load i32, i32* %3
%15510 = srem i32 %15509, 268435443
store i32 %15510, i32* %3
%15511 = load i32, i32* %3
%15512 = add nsw i32 %15511, 6
store i32 %15512, i32* %3
%15513 = load i32, i32* %3
%15514 = mul nsw i32 %15513, 10
store i32 %15514, i32* %3
%15515 = load i32, i32* %3
%15516 = add nsw i32 %15515, 1
store i32 %15516, i32* %3
%15517 = load i32, i32* %3
%15518 = mul nsw i32 %15517, 2
store i32 %15518, i32* %3
%15519 = load i32, i32* %3
%15520 = sub nsw i32 %15519, 1
store i32 %15520, i32* %3
%15521 = load i32, i32* %3
%15522 = and i32 %15521, -1044481
store i32 %15522, i32* %3
%15523 = load i32, i32* %3
%15524 = xor i32 %15523, 81954
store i32 %15524, i32* %3
%15525 = load i32, i32* %3
%15526 = srem i32 %15525, 268435443
store i32 %15526, i32* %3
%15527 = load i32, i32* %3
%15528 = add nsw i32 %15527, 6
store i32 %15528, i32* %3
%15529 = load i32, i32* %3
%15530 = mul nsw i32 %15529, 10
store i32 %15530, i32* %3
%15531 = load i32, i32* %3
%15532 = add nsw i32 %15531, 1
store i32 %15532, i32* %3
%15533 = load i32, i32* %3
%15534 = mul nsw i32 %15533, 2
store i32 %15534, i32* %3
%15535 = load i32, i32* %3
%15536 = sub nsw i32 %15535, 1
store i32 %15536, i32* %3
%15537 = load i32, i32* %3
%15538 = and i32 %15537, -1044481
store i32 %15538, i32* %3
%15539 = load i32, i32* %3
%15540 = xor i32 %15539, 81954
store i32 %15540, i32* %3
%15541 = load i32, i32* %3
%15542 = srem i32 %15541, 268435443
store i32 %15542, i32* %3
%15543 = load i32, i32* %3
%15544 = add nsw i32 %15543, 6
store i32 %15544, i32* %3
%15545 = load i32, i32* %3
%15546 = mul nsw i32 %15545, 10
store i32 %15546, i32* %3
%15547 = load i32, i32* %3
%15548 = add nsw i32 %15547, 1
store i32 %15548, i32* %3
%15549 = load i32, i32* %3
%15550 = mul nsw i32 %15549, 2
store i32 %15550, i32* %3
%15551 = load i32, i32* %3
%15552 = sub nsw i32 %15551, 1
store i32 %15552, i32* %3
%15553 = load i32, i32* %3
%15554 = and i32 %15553, -1044481
store i32 %15554, i32* %3
%15555 = load i32, i32* %3
%15556 = xor i32 %15555, 81954
store i32 %15556, i32* %3
%15557 = load i32, i32* %3
%15558 = srem i32 %15557, 268435443
store i32 %15558, i32* %3
%15559 = load i32, i32* %3
%15560 = add nsw i32 %15559, 6
store i32 %15560, i32* %3
%15561 = load i32, i32* %3
%15562 = mul nsw i32 %15561, 10
store i32 %15562, i32* %3
%15563 = load i32, i32* %3
%15564 = add nsw i32 %15563, 1
store i32 %15564, i32* %3
%15565 = load i32, i32* %3
%15566 = mul nsw i32 %15565, 2
store i32 %15566, i32* %3
%15567 = load i32, i32* %3
%15568 = sub nsw i32 %15567, 1
store i32 %15568, i32* %3
%15569 = load i32, i32* %3
%15570 = and i32 %15569, -1044481
store i32 %15570, i32* %3
%15571 = load i32, i32* %3
%15572 = xor i32 %15571, 81954
store i32 %15572, i32* %3
%15573 = load i32, i32* %3
%15574 = srem i32 %15573, 268435443
store i32 %15574, i32* %3
%15575 = load i32, i32* %3
%15576 = add nsw i32 %15575, 6
store i32 %15576, i32* %3
%15577 = load i32, i32* %3
%15578 = mul nsw i32 %15577, 10
store i32 %15578, i32* %3
%15579 = load i32, i32* %3
%15580 = add nsw i32 %15579, 1
store i32 %15580, i32* %3
%15581 = load i32, i32* %3
%15582 = mul nsw i32 %15581, 2
store i32 %15582, i32* %3
%15583 = load i32, i32* %3
%15584 = sub nsw i32 %15583, 1
store i32 %15584, i32* %3
%15585 = load i32, i32* %3
%15586 = and i32 %15585, -1044481
store i32 %15586, i32* %3
%15587 = load i32, i32* %3
%15588 = xor i32 %15587, 81954
store i32 %15588, i32* %3
%15589 = load i32, i32* %3
%15590 = srem i32 %15589, 268435443
store i32 %15590, i32* %3
%15591 = load i32, i32* %3
%15592 = add nsw i32 %15591, 6
store i32 %15592, i32* %3
%15593 = load i32, i32* %3
%15594 = mul nsw i32 %15593, 10
store i32 %15594, i32* %3
%15595 = load i32, i32* %3
%15596 = add nsw i32 %15595, 1
store i32 %15596, i32* %3
%15597 = load i32, i32* %3
%15598 = mul nsw i32 %15597, 2
store i32 %15598, i32* %3
%15599 = load i32, i32* %3
%15600 = sub nsw i32 %15599, 1
store i32 %15600, i32* %3
%15601 = load i32, i32* %3
%15602 = and i32 %15601, -1044481
store i32 %15602, i32* %3
%15603 = load i32, i32* %3
%15604 = xor i32 %15603, 81954
store i32 %15604, i32* %3
%15605 = load i32, i32* %3
%15606 = srem i32 %15605, 268435443
store i32 %15606, i32* %3
%15607 = load i32, i32* %3
%15608 = add nsw i32 %15607, 6
store i32 %15608, i32* %3
%15609 = load i32, i32* %3
%15610 = mul nsw i32 %15609, 10
store i32 %15610, i32* %3
%15611 = load i32, i32* %3
%15612 = add nsw i32 %15611, 1
store i32 %15612, i32* %3
%15613 = load i32, i32* %3
%15614 = mul nsw i32 %15613, 2
store i32 %15614, i32* %3
%15615 = load i32, i32* %3
%15616 = sub nsw i32 %15615, 1
store i32 %15616, i32* %3
%15617 = load i32, i32* %3
%15618 = and i32 %15617, -1044481
store i32 %15618, i32* %3
%15619 = load i32, i32* %3
%15620 = xor i32 %15619, 81954
store i32 %15620, i32* %3
%15621 = load i32, i32* %3
%15622 = srem i32 %15621, 268435443
store i32 %15622, i32* %3
%15623 = load i32, i32* %3
%15624 = add nsw i32 %15623, 6
store i32 %15624, i32* %3
%15625 = load i32, i32* %3
%15626 = mul nsw i32 %15625, 10
store i32 %15626, i32* %3
%15627 = load i32, i32* %3
%15628 = add nsw i32 %15627, 1
store i32 %15628, i32* %3
%15629 = load i32, i32* %3
%15630 = mul nsw i32 %15629, 2
store i32 %15630, i32* %3
%15631 = load i32, i32* %3
%15632 = sub nsw i32 %15631, 1
store i32 %15632, i32* %3
%15633 = load i32, i32* %3
%15634 = and i32 %15633, -1044481
store i32 %15634, i32* %3
%15635 = load i32, i32* %3
%15636 = xor i32 %15635, 81954
store i32 %15636, i32* %3
%15637 = load i32, i32* %3
%15638 = srem i32 %15637, 268435443
store i32 %15638, i32* %3
%15639 = load i32, i32* %3
%15640 = add nsw i32 %15639, 6
store i32 %15640, i32* %3
%15641 = load i32, i32* %3
%15642 = mul nsw i32 %15641, 10
store i32 %15642, i32* %3
%15643 = load i32, i32* %3
%15644 = add nsw i32 %15643, 1
store i32 %15644, i32* %3
%15645 = load i32, i32* %3
%15646 = mul nsw i32 %15645, 2
store i32 %15646, i32* %3
%15647 = load i32, i32* %3
%15648 = sub nsw i32 %15647, 1
store i32 %15648, i32* %3
%15649 = load i32, i32* %3
%15650 = and i32 %15649, -1044481
store i32 %15650, i32* %3
%15651 = load i32, i32* %3
%15652 = xor i32 %15651, 81954
store i32 %15652, i32* %3
%15653 = load i32, i32* %3
%15654 = srem i32 %15653, 268435443
store i32 %15654, i32* %3
%15655 = load i32, i32* %3
%15656 = add nsw i32 %15655, 6
store i32 %15656, i32* %3
%15657 = load i32, i32* %3
%15658 = mul nsw i32 %15657, 10
store i32 %15658, i32* %3
%15659 = load i32, i32* %3
%15660 = add nsw i32 %15659, 1
store i32 %15660, i32* %3
%15661 = load i32, i32* %3
%15662 = mul nsw i32 %15661, 2
store i32 %15662, i32* %3
%15663 = load i32, i32* %3
%15664 = sub nsw i32 %15663, 1
store i32 %15664, i32* %3
%15665 = load i32, i32* %3
%15666 = and i32 %15665, -1044481
store i32 %15666, i32* %3
%15667 = load i32, i32* %3
%15668 = xor i32 %15667, 81954
store i32 %15668, i32* %3
%15669 = load i32, i32* %3
%15670 = srem i32 %15669, 268435443
store i32 %15670, i32* %3
%15671 = load i32, i32* %3
%15672 = add nsw i32 %15671, 6
store i32 %15672, i32* %3
%15673 = load i32, i32* %3
%15674 = mul nsw i32 %15673, 10
store i32 %15674, i32* %3
%15675 = load i32, i32* %3
%15676 = add nsw i32 %15675, 1
store i32 %15676, i32* %3
%15677 = load i32, i32* %3
%15678 = mul nsw i32 %15677, 2
store i32 %15678, i32* %3
%15679 = load i32, i32* %3
%15680 = sub nsw i32 %15679, 1
store i32 %15680, i32* %3
%15681 = load i32, i32* %3
%15682 = and i32 %15681, -1044481
store i32 %15682, i32* %3
%15683 = load i32, i32* %3
%15684 = xor i32 %15683, 81954
store i32 %15684, i32* %3
%15685 = load i32, i32* %3
%15686 = srem i32 %15685, 268435443
store i32 %15686, i32* %3
%15687 = load i32, i32* %3
%15688 = add nsw i32 %15687, 6
store i32 %15688, i32* %3
%15689 = load i32, i32* %3
%15690 = mul nsw i32 %15689, 10
store i32 %15690, i32* %3
%15691 = load i32, i32* %3
%15692 = add nsw i32 %15691, 1
store i32 %15692, i32* %3
%15693 = load i32, i32* %3
%15694 = mul nsw i32 %15693, 2
store i32 %15694, i32* %3
%15695 = load i32, i32* %3
%15696 = sub nsw i32 %15695, 1
store i32 %15696, i32* %3
%15697 = load i32, i32* %3
%15698 = and i32 %15697, -1044481
store i32 %15698, i32* %3
%15699 = load i32, i32* %3
%15700 = xor i32 %15699, 81954
store i32 %15700, i32* %3
%15701 = load i32, i32* %3
%15702 = srem i32 %15701, 268435443
store i32 %15702, i32* %3
%15703 = load i32, i32* %3
%15704 = add nsw i32 %15703, 6
store i32 %15704, i32* %3
%15705 = load i32, i32* %3
%15706 = mul nsw i32 %15705, 10
store i32 %15706, i32* %3
%15707 = load i32, i32* %3
%15708 = add nsw i32 %15707, 1
store i32 %15708, i32* %3
%15709 = load i32, i32* %3
%15710 = mul nsw i32 %15709, 2
store i32 %15710, i32* %3
%15711 = load i32, i32* %3
%15712 = sub nsw i32 %15711, 1
store i32 %15712, i32* %3
%15713 = load i32, i32* %3
%15714 = and i32 %15713, -1044481
store i32 %15714, i32* %3
%15715 = load i32, i32* %3
%15716 = xor i32 %15715, 81954
store i32 %15716, i32* %3
%15717 = load i32, i32* %3
%15718 = srem i32 %15717, 268435443
store i32 %15718, i32* %3
%15719 = load i32, i32* %3
%15720 = add nsw i32 %15719, 6
store i32 %15720, i32* %3
%15721 = load i32, i32* %3
%15722 = mul nsw i32 %15721, 10
store i32 %15722, i32* %3
%15723 = load i32, i32* %3
%15724 = add nsw i32 %15723, 1
store i32 %15724, i32* %3
%15725 = load i32, i32* %3
%15726 = mul nsw i32 %15725, 2
store i32 %15726, i32* %3
%15727 = load i32, i32* %3
%15728 = sub nsw i32 %15727, 1
store i32 %15728, i32* %3
%15729 = load i32, i32* %3
%15730 = and i32 %15729, -1044481
store i32 %15730, i32* %3
%15731 = load i32, i32* %3
%15732 = xor i32 %15731, 81954
store i32 %15732, i32* %3
%15733 = load i32, i32* %3
%15734 = srem i32 %15733, 268435443
store i32 %15734, i32* %3
%15735 = load i32, i32* %3
%15736 = add nsw i32 %15735, 6
store i32 %15736, i32* %3
%15737 = load i32, i32* %3
%15738 = mul nsw i32 %15737, 10
store i32 %15738, i32* %3
%15739 = load i32, i32* %3
%15740 = add nsw i32 %15739, 1
store i32 %15740, i32* %3
%15741 = load i32, i32* %3
%15742 = mul nsw i32 %15741, 2
store i32 %15742, i32* %3
%15743 = load i32, i32* %3
%15744 = sub nsw i32 %15743, 1
store i32 %15744, i32* %3
%15745 = load i32, i32* %3
%15746 = and i32 %15745, -1044481
store i32 %15746, i32* %3
%15747 = load i32, i32* %3
%15748 = xor i32 %15747, 81954
store i32 %15748, i32* %3
%15749 = load i32, i32* %3
%15750 = srem i32 %15749, 268435443
store i32 %15750, i32* %3
%15751 = load i32, i32* %3
%15752 = add nsw i32 %15751, 6
store i32 %15752, i32* %3
%15753 = load i32, i32* %3
%15754 = mul nsw i32 %15753, 10
store i32 %15754, i32* %3
%15755 = load i32, i32* %3
%15756 = add nsw i32 %15755, 1
store i32 %15756, i32* %3
%15757 = load i32, i32* %3
%15758 = mul nsw i32 %15757, 2
store i32 %15758, i32* %3
%15759 = load i32, i32* %3
%15760 = sub nsw i32 %15759, 1
store i32 %15760, i32* %3
%15761 = load i32, i32* %3
%15762 = and i32 %15761, -1044481
store i32 %15762, i32* %3
%15763 = load i32, i32* %3
%15764 = xor i32 %15763, 81954
store i32 %15764, i32* %3
%15765 = load i32, i32* %3
%15766 = srem i32 %15765, 268435443
store i32 %15766, i32* %3
%15767 = load i32, i32* %3
%15768 = add nsw i32 %15767, 6
store i32 %15768, i32* %3
%15769 = load i32, i32* %3
%15770 = mul nsw i32 %15769, 10
store i32 %15770, i32* %3
%15771 = load i32, i32* %3
%15772 = add nsw i32 %15771, 1
store i32 %15772, i32* %3
%15773 = load i32, i32* %3
%15774 = mul nsw i32 %15773, 2
store i32 %15774, i32* %3
%15775 = load i32, i32* %3
%15776 = sub nsw i32 %15775, 1
store i32 %15776, i32* %3
%15777 = load i32, i32* %3
%15778 = and i32 %15777, -1044481
store i32 %15778, i32* %3
%15779 = load i32, i32* %3
%15780 = xor i32 %15779, 81954
store i32 %15780, i32* %3
%15781 = load i32, i32* %3
%15782 = srem i32 %15781, 268435443
store i32 %15782, i32* %3
%15783 = load i32, i32* %3
%15784 = add nsw i32 %15783, 6
store i32 %15784, i32* %3
%15785 = load i32, i32* %3
%15786 = mul nsw i32 %15785, 10
store i32 %15786, i32* %3
%15787 = load i32, i32* %3
%15788 = add nsw i32 %15787, 1
store i32 %15788, i32* %3
%15789 = load i32, i32* %3
%15790 = mul nsw i32 %15789, 2
store i32 %15790, i32* %3
%15791 = load i32, i32* %3
%15792 = sub nsw i32 %15791, 1
store i32 %15792, i32* %3
%15793 = load i32, i32* %3
%15794 = and i32 %15793, -1044481
store i32 %15794, i32* %3
%15795 = load i32, i32* %3
%15796 = xor i32 %15795, 81954
store i32 %15796, i32* %3
%15797 = load i32, i32* %3
%15798 = srem i32 %15797, 268435443
store i32 %15798, i32* %3
%15799 = load i32, i32* %3
%15800 = add nsw i32 %15799, 6
store i32 %15800, i32* %3
%15801 = load i32, i32* %3
%15802 = mul nsw i32 %15801, 10
store i32 %15802, i32* %3
%15803 = load i32, i32* %3
%15804 = add nsw i32 %15803, 1
store i32 %15804, i32* %3
%15805 = load i32, i32* %3
%15806 = mul nsw i32 %15805, 2
store i32 %15806, i32* %3
%15807 = load i32, i32* %3
%15808 = sub nsw i32 %15807, 1
store i32 %15808, i32* %3
%15809 = load i32, i32* %3
%15810 = and i32 %15809, -1044481
store i32 %15810, i32* %3
%15811 = load i32, i32* %3
%15812 = xor i32 %15811, 81954
store i32 %15812, i32* %3
%15813 = load i32, i32* %3
%15814 = srem i32 %15813, 268435443
store i32 %15814, i32* %3
%15815 = load i32, i32* %3
%15816 = add nsw i32 %15815, 6
store i32 %15816, i32* %3
%15817 = load i32, i32* %3
%15818 = mul nsw i32 %15817, 10
store i32 %15818, i32* %3
%15819 = load i32, i32* %3
%15820 = add nsw i32 %15819, 1
store i32 %15820, i32* %3
%15821 = load i32, i32* %3
%15822 = mul nsw i32 %15821, 2
store i32 %15822, i32* %3
%15823 = load i32, i32* %3
%15824 = sub nsw i32 %15823, 1
store i32 %15824, i32* %3
%15825 = load i32, i32* %3
%15826 = and i32 %15825, -1044481
store i32 %15826, i32* %3
%15827 = load i32, i32* %3
%15828 = xor i32 %15827, 81954
store i32 %15828, i32* %3
%15829 = load i32, i32* %3
%15830 = srem i32 %15829, 268435443
store i32 %15830, i32* %3
%15831 = load i32, i32* %3
%15832 = add nsw i32 %15831, 6
store i32 %15832, i32* %3
%15833 = load i32, i32* %3
%15834 = mul nsw i32 %15833, 10
store i32 %15834, i32* %3
%15835 = load i32, i32* %3
%15836 = add nsw i32 %15835, 1
store i32 %15836, i32* %3
%15837 = load i32, i32* %3
%15838 = mul nsw i32 %15837, 2
store i32 %15838, i32* %3
%15839 = load i32, i32* %3
%15840 = sub nsw i32 %15839, 1
store i32 %15840, i32* %3
%15841 = load i32, i32* %3
%15842 = and i32 %15841, -1044481
store i32 %15842, i32* %3
%15843 = load i32, i32* %3
%15844 = xor i32 %15843, 81954
store i32 %15844, i32* %3
%15845 = load i32, i32* %3
%15846 = srem i32 %15845, 268435443
store i32 %15846, i32* %3
%15847 = load i32, i32* %3
%15848 = add nsw i32 %15847, 6
store i32 %15848, i32* %3
%15849 = load i32, i32* %3
%15850 = mul nsw i32 %15849, 10
store i32 %15850, i32* %3
%15851 = load i32, i32* %3
%15852 = add nsw i32 %15851, 1
store i32 %15852, i32* %3
%15853 = load i32, i32* %3
%15854 = mul nsw i32 %15853, 2
store i32 %15854, i32* %3
%15855 = load i32, i32* %3
%15856 = sub nsw i32 %15855, 1
store i32 %15856, i32* %3
%15857 = load i32, i32* %3
%15858 = and i32 %15857, -1044481
store i32 %15858, i32* %3
%15859 = load i32, i32* %3
%15860 = xor i32 %15859, 81954
store i32 %15860, i32* %3
%15861 = load i32, i32* %3
%15862 = srem i32 %15861, 268435443
store i32 %15862, i32* %3
%15863 = load i32, i32* %3
%15864 = add nsw i32 %15863, 6
store i32 %15864, i32* %3
%15865 = load i32, i32* %3
%15866 = mul nsw i32 %15865, 10
store i32 %15866, i32* %3
%15867 = load i32, i32* %3
%15868 = add nsw i32 %15867, 1
store i32 %15868, i32* %3
%15869 = load i32, i32* %3
%15870 = mul nsw i32 %15869, 2
store i32 %15870, i32* %3
%15871 = load i32, i32* %3
%15872 = sub nsw i32 %15871, 1
store i32 %15872, i32* %3
%15873 = load i32, i32* %3
%15874 = and i32 %15873, -1044481
store i32 %15874, i32* %3
%15875 = load i32, i32* %3
%15876 = xor i32 %15875, 81954
store i32 %15876, i32* %3
%15877 = load i32, i32* %3
%15878 = srem i32 %15877, 268435443
store i32 %15878, i32* %3
%15879 = load i32, i32* %3
%15880 = add nsw i32 %15879, 6
store i32 %15880, i32* %3
%15881 = load i32, i32* %3
%15882 = mul nsw i32 %15881, 10
store i32 %15882, i32* %3
%15883 = load i32, i32* %3
%15884 = add nsw i32 %15883, 1
store i32 %15884, i32* %3
%15885 = load i32, i32* %3
%15886 = mul nsw i32 %15885, 2
store i32 %15886, i32* %3
%15887 = load i32, i32* %3
%15888 = sub nsw i32 %15887, 1
store i32 %15888, i32* %3
%15889 = load i32, i32* %3
%15890 = and i32 %15889, -1044481
store i32 %15890, i32* %3
%15891 = load i32, i32* %3
%15892 = xor i32 %15891, 81954
store i32 %15892, i32* %3
%15893 = load i32, i32* %3
%15894 = srem i32 %15893, 268435443
store i32 %15894, i32* %3
%15895 = load i32, i32* %3
%15896 = add nsw i32 %15895, 6
store i32 %15896, i32* %3
%15897 = load i32, i32* %3
%15898 = mul nsw i32 %15897, 10
store i32 %15898, i32* %3
%15899 = load i32, i32* %3
%15900 = add nsw i32 %15899, 1
store i32 %15900, i32* %3
%15901 = load i32, i32* %3
%15902 = mul nsw i32 %15901, 2
store i32 %15902, i32* %3
%15903 = load i32, i32* %3
%15904 = sub nsw i32 %15903, 1
store i32 %15904, i32* %3
%15905 = load i32, i32* %3
%15906 = and i32 %15905, -1044481
store i32 %15906, i32* %3
%15907 = load i32, i32* %3
%15908 = xor i32 %15907, 81954
store i32 %15908, i32* %3
%15909 = load i32, i32* %3
%15910 = srem i32 %15909, 268435443
store i32 %15910, i32* %3
%15911 = load i32, i32* %3
%15912 = add nsw i32 %15911, 6
store i32 %15912, i32* %3
%15913 = load i32, i32* %3
%15914 = mul nsw i32 %15913, 10
store i32 %15914, i32* %3
%15915 = load i32, i32* %3
%15916 = add nsw i32 %15915, 1
store i32 %15916, i32* %3
%15917 = load i32, i32* %3
%15918 = mul nsw i32 %15917, 2
store i32 %15918, i32* %3
%15919 = load i32, i32* %3
%15920 = sub nsw i32 %15919, 1
store i32 %15920, i32* %3
%15921 = load i32, i32* %3
%15922 = and i32 %15921, -1044481
store i32 %15922, i32* %3
%15923 = load i32, i32* %3
%15924 = xor i32 %15923, 81954
store i32 %15924, i32* %3
%15925 = load i32, i32* %3
%15926 = srem i32 %15925, 268435443
store i32 %15926, i32* %3
%15927 = load i32, i32* %3
%15928 = add nsw i32 %15927, 6
store i32 %15928, i32* %3
%15929 = load i32, i32* %3
%15930 = mul nsw i32 %15929, 10
store i32 %15930, i32* %3
%15931 = load i32, i32* %3
%15932 = add nsw i32 %15931, 1
store i32 %15932, i32* %3
%15933 = load i32, i32* %3
%15934 = mul nsw i32 %15933, 2
store i32 %15934, i32* %3
%15935 = load i32, i32* %3
%15936 = sub nsw i32 %15935, 1
store i32 %15936, i32* %3
%15937 = load i32, i32* %3
%15938 = and i32 %15937, -1044481
store i32 %15938, i32* %3
%15939 = load i32, i32* %3
%15940 = xor i32 %15939, 81954
store i32 %15940, i32* %3
%15941 = load i32, i32* %3
%15942 = srem i32 %15941, 268435443
store i32 %15942, i32* %3
%15943 = load i32, i32* %3
%15944 = add nsw i32 %15943, 6
store i32 %15944, i32* %3
%15945 = load i32, i32* %3
%15946 = mul nsw i32 %15945, 10
store i32 %15946, i32* %3
%15947 = load i32, i32* %3
%15948 = add nsw i32 %15947, 1
store i32 %15948, i32* %3
%15949 = load i32, i32* %3
%15950 = mul nsw i32 %15949, 2
store i32 %15950, i32* %3
%15951 = load i32, i32* %3
%15952 = sub nsw i32 %15951, 1
store i32 %15952, i32* %3
%15953 = load i32, i32* %3
%15954 = and i32 %15953, -1044481
store i32 %15954, i32* %3
%15955 = load i32, i32* %3
%15956 = xor i32 %15955, 81954
store i32 %15956, i32* %3
%15957 = load i32, i32* %3
%15958 = srem i32 %15957, 268435443
store i32 %15958, i32* %3
%15959 = load i32, i32* %3
%15960 = add nsw i32 %15959, 6
store i32 %15960, i32* %3
%15961 = load i32, i32* %3
%15962 = mul nsw i32 %15961, 10
store i32 %15962, i32* %3
%15963 = load i32, i32* %3
%15964 = add nsw i32 %15963, 1
store i32 %15964, i32* %3
%15965 = load i32, i32* %3
%15966 = mul nsw i32 %15965, 2
store i32 %15966, i32* %3
%15967 = load i32, i32* %3
%15968 = sub nsw i32 %15967, 1
store i32 %15968, i32* %3
%15969 = load i32, i32* %3
%15970 = and i32 %15969, -1044481
store i32 %15970, i32* %3
%15971 = load i32, i32* %3
%15972 = xor i32 %15971, 81954
store i32 %15972, i32* %3
%15973 = load i32, i32* %3
%15974 = srem i32 %15973, 268435443
store i32 %15974, i32* %3
%15975 = load i32, i32* %3
%15976 = add nsw i32 %15975, 6
store i32 %15976, i32* %3
%15977 = load i32, i32* %3
%15978 = mul nsw i32 %15977, 10
store i32 %15978, i32* %3
%15979 = load i32, i32* %3
%15980 = add nsw i32 %15979, 1
store i32 %15980, i32* %3
%15981 = load i32, i32* %3
%15982 = mul nsw i32 %15981, 2
store i32 %15982, i32* %3
%15983 = load i32, i32* %3
%15984 = sub nsw i32 %15983, 1
store i32 %15984, i32* %3
%15985 = load i32, i32* %3
%15986 = and i32 %15985, -1044481
store i32 %15986, i32* %3
%15987 = load i32, i32* %3
%15988 = xor i32 %15987, 81954
store i32 %15988, i32* %3
%15989 = load i32, i32* %3
%15990 = srem i32 %15989, 268435443
store i32 %15990, i32* %3
%15991 = load i32, i32* %3
%15992 = add nsw i32 %15991, 6
store i32 %15992, i32* %3
%15993 = load i32, i32* %3
%15994 = mul nsw i32 %15993, 10
store i32 %15994, i32* %3
%15995 = load i32, i32* %3
%15996 = add nsw i32 %15995, 1
store i32 %15996, i32* %3
%15997 = load i32, i32* %3
%15998 = mul nsw i32 %15997, 2
store i32 %15998, i32* %3
%15999 = load i32, i32* %3
%16000 = sub nsw i32 %15999, 1
store i32 %16000, i32* %3
%16001 = load i32, i32* %3
%16002 = and i32 %16001, -1044481
store i32 %16002, i32* %3
%16003 = load i32, i32* %3
%16004 = xor i32 %16003, 81954
store i32 %16004, i32* %3
%16005 = load i32, i32* %3
%16006 = srem i32 %16005, 268435443
store i32 %16006, i32* %3
%16007 = load i32, i32* %3
%16008 = add nsw i32 %16007, 6
store i32 %16008, i32* %3
%16009 = load i32, i32* %3
%16010 = mul nsw i32 %16009, 10
store i32 %16010, i32* %3
%16011 = load i32, i32* %3
%16012 = add nsw i32 %16011, 1
store i32 %16012, i32* %3
%16013 = load i32, i32* %3
%16014 = mul nsw i32 %16013, 2
store i32 %16014, i32* %3
%16015 = load i32, i32* %3
%16016 = sub nsw i32 %16015, 1
store i32 %16016, i32* %3
%16017 = load i32, i32* %3
%16018 = and i32 %16017, -1044481
store i32 %16018, i32* %3
%16019 = load i32, i32* %3
%16020 = xor i32 %16019, 81954
store i32 %16020, i32* %3
%16021 = load i32, i32* %3
%16022 = srem i32 %16021, 268435443
store i32 %16022, i32* %3
%16023 = load i32, i32* %3
%16024 = add nsw i32 %16023, 6
store i32 %16024, i32* %3
%16025 = load i32, i32* %3
%16026 = mul nsw i32 %16025, 10
store i32 %16026, i32* %3
%16027 = load i32, i32* %3
%16028 = add nsw i32 %16027, 1
store i32 %16028, i32* %3
%16029 = load i32, i32* %3
%16030 = mul nsw i32 %16029, 2
store i32 %16030, i32* %3
%16031 = load i32, i32* %3
%16032 = sub nsw i32 %16031, 1
store i32 %16032, i32* %3
%16033 = load i32, i32* %3
%16034 = and i32 %16033, -1044481
store i32 %16034, i32* %3
%16035 = load i32, i32* %3
%16036 = xor i32 %16035, 81954
store i32 %16036, i32* %3
%16037 = load i32, i32* %3
%16038 = srem i32 %16037, 268435443
store i32 %16038, i32* %3
%16039 = load i32, i32* %3
%16040 = add nsw i32 %16039, 6
store i32 %16040, i32* %3
%16041 = load i32, i32* %3
%16042 = mul nsw i32 %16041, 10
store i32 %16042, i32* %3
%16043 = load i32, i32* %3
%16044 = add nsw i32 %16043, 1
store i32 %16044, i32* %3
%16045 = load i32, i32* %3
%16046 = mul nsw i32 %16045, 2
store i32 %16046, i32* %3
%16047 = load i32, i32* %3
%16048 = sub nsw i32 %16047, 1
store i32 %16048, i32* %3
%16049 = load i32, i32* %3
%16050 = and i32 %16049, -1044481
store i32 %16050, i32* %3
%16051 = load i32, i32* %3
%16052 = xor i32 %16051, 81954
store i32 %16052, i32* %3
%16053 = load i32, i32* %3
%16054 = srem i32 %16053, 268435443
store i32 %16054, i32* %3
%16055 = load i32, i32* %3
%16056 = add nsw i32 %16055, 6
store i32 %16056, i32* %3
%16057 = load i32, i32* %3
%16058 = mul nsw i32 %16057, 10
store i32 %16058, i32* %3
%16059 = load i32, i32* %3
%16060 = add nsw i32 %16059, 1
store i32 %16060, i32* %3
%16061 = load i32, i32* %3
%16062 = mul nsw i32 %16061, 2
store i32 %16062, i32* %3
%16063 = load i32, i32* %3
%16064 = sub nsw i32 %16063, 1
store i32 %16064, i32* %3
%16065 = load i32, i32* %3
%16066 = and i32 %16065, -1044481
store i32 %16066, i32* %3
%16067 = load i32, i32* %3
%16068 = xor i32 %16067, 81954
store i32 %16068, i32* %3
%16069 = load i32, i32* %3
%16070 = srem i32 %16069, 268435443
store i32 %16070, i32* %3
%16071 = load i32, i32* %3
%16072 = add nsw i32 %16071, 6
store i32 %16072, i32* %3
%16073 = load i32, i32* %3
%16074 = mul nsw i32 %16073, 10
store i32 %16074, i32* %3
%16075 = load i32, i32* %3
%16076 = add nsw i32 %16075, 1
store i32 %16076, i32* %3
%16077 = load i32, i32* %3
%16078 = mul nsw i32 %16077, 2
store i32 %16078, i32* %3
%16079 = load i32, i32* %3
%16080 = sub nsw i32 %16079, 1
store i32 %16080, i32* %3
%16081 = load i32, i32* %3
%16082 = and i32 %16081, -1044481
store i32 %16082, i32* %3
%16083 = load i32, i32* %3
%16084 = xor i32 %16083, 81954
store i32 %16084, i32* %3
%16085 = load i32, i32* %3
%16086 = srem i32 %16085, 268435443
store i32 %16086, i32* %3
%16087 = load i32, i32* %3
%16088 = add nsw i32 %16087, 6
store i32 %16088, i32* %3
%16089 = load i32, i32* %3
%16090 = mul nsw i32 %16089, 10
store i32 %16090, i32* %3
%16091 = load i32, i32* %3
%16092 = add nsw i32 %16091, 1
store i32 %16092, i32* %3
%16093 = load i32, i32* %3
%16094 = mul nsw i32 %16093, 2
store i32 %16094, i32* %3
%16095 = load i32, i32* %3
%16096 = sub nsw i32 %16095, 1
store i32 %16096, i32* %3
%16097 = load i32, i32* %3
%16098 = and i32 %16097, -1044481
store i32 %16098, i32* %3
%16099 = load i32, i32* %3
%16100 = xor i32 %16099, 81954
store i32 %16100, i32* %3
%16101 = load i32, i32* %3
%16102 = srem i32 %16101, 268435443
store i32 %16102, i32* %3
%16103 = load i32, i32* %3
%16104 = add nsw i32 %16103, 6
store i32 %16104, i32* %3
%16105 = load i32, i32* %3
%16106 = mul nsw i32 %16105, 10
store i32 %16106, i32* %3
%16107 = load i32, i32* %3
%16108 = add nsw i32 %16107, 1
store i32 %16108, i32* %3
%16109 = load i32, i32* %3
%16110 = mul nsw i32 %16109, 2
store i32 %16110, i32* %3
%16111 = load i32, i32* %3
%16112 = sub nsw i32 %16111, 1
store i32 %16112, i32* %3
%16113 = load i32, i32* %3
%16114 = and i32 %16113, -1044481
store i32 %16114, i32* %3
%16115 = load i32, i32* %3
%16116 = xor i32 %16115, 81954
store i32 %16116, i32* %3
%16117 = load i32, i32* %3
%16118 = srem i32 %16117, 268435443
store i32 %16118, i32* %3
%16119 = load i32, i32* %3
%16120 = add nsw i32 %16119, 6
store i32 %16120, i32* %3
%16121 = load i32, i32* %3
%16122 = mul nsw i32 %16121, 10
store i32 %16122, i32* %3
%16123 = load i32, i32* %3
%16124 = add nsw i32 %16123, 1
store i32 %16124, i32* %3
%16125 = load i32, i32* %3
%16126 = mul nsw i32 %16125, 2
store i32 %16126, i32* %3
%16127 = load i32, i32* %3
%16128 = sub nsw i32 %16127, 1
store i32 %16128, i32* %3
%16129 = load i32, i32* %3
%16130 = and i32 %16129, -1044481
store i32 %16130, i32* %3
%16131 = load i32, i32* %3
%16132 = xor i32 %16131, 81954
store i32 %16132, i32* %3
%16133 = load i32, i32* %3
%16134 = srem i32 %16133, 268435443
store i32 %16134, i32* %3
%16135 = load i32, i32* %3
%16136 = add nsw i32 %16135, 6
store i32 %16136, i32* %3
%16137 = load i32, i32* %3
%16138 = mul nsw i32 %16137, 10
store i32 %16138, i32* %3
%16139 = load i32, i32* %3
%16140 = add nsw i32 %16139, 1
store i32 %16140, i32* %3
%16141 = load i32, i32* %3
%16142 = mul nsw i32 %16141, 2
store i32 %16142, i32* %3
%16143 = load i32, i32* %3
%16144 = sub nsw i32 %16143, 1
store i32 %16144, i32* %3
%16145 = load i32, i32* %3
%16146 = and i32 %16145, -1044481
store i32 %16146, i32* %3
%16147 = load i32, i32* %3
%16148 = xor i32 %16147, 81954
store i32 %16148, i32* %3
%16149 = load i32, i32* %3
%16150 = srem i32 %16149, 268435443
store i32 %16150, i32* %3
%16151 = load i32, i32* %3
%16152 = add nsw i32 %16151, 6
store i32 %16152, i32* %3
%16153 = load i32, i32* %3
%16154 = mul nsw i32 %16153, 10
store i32 %16154, i32* %3
%16155 = load i32, i32* %3
%16156 = add nsw i32 %16155, 1
store i32 %16156, i32* %3
%16157 = load i32, i32* %3
%16158 = mul nsw i32 %16157, 2
store i32 %16158, i32* %3
%16159 = load i32, i32* %3
%16160 = sub nsw i32 %16159, 1
store i32 %16160, i32* %3
%16161 = load i32, i32* %3
%16162 = and i32 %16161, -1044481
store i32 %16162, i32* %3
%16163 = load i32, i32* %3
%16164 = xor i32 %16163, 81954
store i32 %16164, i32* %3
%16165 = load i32, i32* %3
%16166 = srem i32 %16165, 268435443
store i32 %16166, i32* %3
%16167 = load i32, i32* %3
%16168 = add nsw i32 %16167, 6
store i32 %16168, i32* %3
%16169 = load i32, i32* %3
%16170 = mul nsw i32 %16169, 10
store i32 %16170, i32* %3
%16171 = load i32, i32* %3
%16172 = add nsw i32 %16171, 1
store i32 %16172, i32* %3
%16173 = load i32, i32* %3
%16174 = mul nsw i32 %16173, 2
store i32 %16174, i32* %3
%16175 = load i32, i32* %3
%16176 = sub nsw i32 %16175, 1
store i32 %16176, i32* %3
%16177 = load i32, i32* %3
%16178 = and i32 %16177, -1044481
store i32 %16178, i32* %3
%16179 = load i32, i32* %3
%16180 = xor i32 %16179, 81954
store i32 %16180, i32* %3
%16181 = load i32, i32* %3
%16182 = srem i32 %16181, 268435443
store i32 %16182, i32* %3
%16183 = load i32, i32* %3
%16184 = add nsw i32 %16183, 6
store i32 %16184, i32* %3
%16185 = load i32, i32* %3
%16186 = mul nsw i32 %16185, 10
store i32 %16186, i32* %3
%16187 = load i32, i32* %3
%16188 = add nsw i32 %16187, 1
store i32 %16188, i32* %3
%16189 = load i32, i32* %3
%16190 = mul nsw i32 %16189, 2
store i32 %16190, i32* %3
%16191 = load i32, i32* %3
%16192 = sub nsw i32 %16191, 1
store i32 %16192, i32* %3
%16193 = load i32, i32* %3
%16194 = and i32 %16193, -1044481
store i32 %16194, i32* %3
%16195 = load i32, i32* %3
%16196 = xor i32 %16195, 81954
store i32 %16196, i32* %3
%16197 = load i32, i32* %3
%16198 = srem i32 %16197, 268435443
store i32 %16198, i32* %3
%16199 = load i32, i32* %3
%16200 = add nsw i32 %16199, 6
store i32 %16200, i32* %3
%16201 = load i32, i32* %3
%16202 = mul nsw i32 %16201, 10
store i32 %16202, i32* %3
%16203 = load i32, i32* %3
%16204 = add nsw i32 %16203, 1
store i32 %16204, i32* %3
%16205 = load i32, i32* %3
%16206 = mul nsw i32 %16205, 2
store i32 %16206, i32* %3
%16207 = load i32, i32* %3
%16208 = sub nsw i32 %16207, 1
store i32 %16208, i32* %3
%16209 = load i32, i32* %3
%16210 = and i32 %16209, -1044481
store i32 %16210, i32* %3
%16211 = load i32, i32* %3
%16212 = xor i32 %16211, 81954
store i32 %16212, i32* %3
%16213 = load i32, i32* %3
%16214 = srem i32 %16213, 268435443
store i32 %16214, i32* %3
%16215 = load i32, i32* %3
%16216 = add nsw i32 %16215, 6
store i32 %16216, i32* %3
%16217 = load i32, i32* %3
%16218 = mul nsw i32 %16217, 10
store i32 %16218, i32* %3
%16219 = load i32, i32* %3
%16220 = add nsw i32 %16219, 1
store i32 %16220, i32* %3
%16221 = load i32, i32* %3
%16222 = mul nsw i32 %16221, 2
store i32 %16222, i32* %3
%16223 = load i32, i32* %3
%16224 = sub nsw i32 %16223, 1
store i32 %16224, i32* %3
%16225 = load i32, i32* %3
%16226 = and i32 %16225, -1044481
store i32 %16226, i32* %3
%16227 = load i32, i32* %3
%16228 = xor i32 %16227, 81954
store i32 %16228, i32* %3
%16229 = load i32, i32* %3
%16230 = srem i32 %16229, 268435443
store i32 %16230, i32* %3
%16231 = load i32, i32* %3
%16232 = add nsw i32 %16231, 6
store i32 %16232, i32* %3
%16233 = load i32, i32* %3
%16234 = mul nsw i32 %16233, 10
store i32 %16234, i32* %3
%16235 = load i32, i32* %3
%16236 = add nsw i32 %16235, 1
store i32 %16236, i32* %3
%16237 = load i32, i32* %3
%16238 = mul nsw i32 %16237, 2
store i32 %16238, i32* %3
%16239 = load i32, i32* %3
%16240 = sub nsw i32 %16239, 1
store i32 %16240, i32* %3
%16241 = load i32, i32* %3
%16242 = and i32 %16241, -1044481
store i32 %16242, i32* %3
%16243 = load i32, i32* %3
%16244 = xor i32 %16243, 81954
store i32 %16244, i32* %3
%16245 = load i32, i32* %3
%16246 = srem i32 %16245, 268435443
store i32 %16246, i32* %3
%16247 = load i32, i32* %3
%16248 = add nsw i32 %16247, 6
store i32 %16248, i32* %3
%16249 = load i32, i32* %3
%16250 = mul nsw i32 %16249, 10
store i32 %16250, i32* %3
%16251 = load i32, i32* %3
%16252 = add nsw i32 %16251, 1
store i32 %16252, i32* %3
%16253 = load i32, i32* %3
%16254 = mul nsw i32 %16253, 2
store i32 %16254, i32* %3
%16255 = load i32, i32* %3
%16256 = sub nsw i32 %16255, 1
store i32 %16256, i32* %3
%16257 = load i32, i32* %3
%16258 = and i32 %16257, -1044481
store i32 %16258, i32* %3
%16259 = load i32, i32* %3
%16260 = xor i32 %16259, 81954
store i32 %16260, i32* %3
%16261 = load i32, i32* %3
%16262 = srem i32 %16261, 268435443
store i32 %16262, i32* %3
%16263 = load i32, i32* %3
%16264 = add nsw i32 %16263, 6
store i32 %16264, i32* %3
%16265 = load i32, i32* %3
%16266 = mul nsw i32 %16265, 10
store i32 %16266, i32* %3
%16267 = load i32, i32* %3
%16268 = add nsw i32 %16267, 1
store i32 %16268, i32* %3
%16269 = load i32, i32* %3
%16270 = mul nsw i32 %16269, 2
store i32 %16270, i32* %3
%16271 = load i32, i32* %3
%16272 = sub nsw i32 %16271, 1
store i32 %16272, i32* %3
%16273 = load i32, i32* %3
%16274 = and i32 %16273, -1044481
store i32 %16274, i32* %3
%16275 = load i32, i32* %3
%16276 = xor i32 %16275, 81954
store i32 %16276, i32* %3
%16277 = load i32, i32* %3
%16278 = srem i32 %16277, 268435443
store i32 %16278, i32* %3
%16279 = load i32, i32* %3
%16280 = add nsw i32 %16279, 6
store i32 %16280, i32* %3
%16281 = load i32, i32* %3
%16282 = mul nsw i32 %16281, 10
store i32 %16282, i32* %3
%16283 = load i32, i32* %3
%16284 = add nsw i32 %16283, 1
store i32 %16284, i32* %3
%16285 = load i32, i32* %3
%16286 = mul nsw i32 %16285, 2
store i32 %16286, i32* %3
%16287 = load i32, i32* %3
%16288 = sub nsw i32 %16287, 1
store i32 %16288, i32* %3
%16289 = load i32, i32* %3
%16290 = and i32 %16289, -1044481
store i32 %16290, i32* %3
%16291 = load i32, i32* %3
%16292 = xor i32 %16291, 81954
store i32 %16292, i32* %3
%16293 = load i32, i32* %3
%16294 = srem i32 %16293, 268435443
store i32 %16294, i32* %3
%16295 = load i32, i32* %3
%16296 = add nsw i32 %16295, 6
store i32 %16296, i32* %3
%16297 = load i32, i32* %3
%16298 = mul nsw i32 %16297, 10
store i32 %16298, i32* %3
%16299 = load i32, i32* %3
%16300 = add nsw i32 %16299, 1
store i32 %16300, i32* %3
%16301 = load i32, i32* %3
%16302 = mul nsw i32 %16301, 2
store i32 %16302, i32* %3
%16303 = load i32, i32* %3
%16304 = sub nsw i32 %16303, 1
store i32 %16304, i32* %3
%16305 = load i32, i32* %3
%16306 = and i32 %16305, -1044481
store i32 %16306, i32* %3
%16307 = load i32, i32* %3
%16308 = xor i32 %16307, 81954
store i32 %16308, i32* %3
%16309 = load i32, i32* %3
%16310 = srem i32 %16309, 268435443
store i32 %16310, i32* %3
%16311 = load i32, i32* %3
%16312 = add nsw i32 %16311, 6
store i32 %16312, i32* %3
%16313 = load i32, i32* %3
%16314 = mul nsw i32 %16313, 10
store i32 %16314, i32* %3
%16315 = load i32, i32* %3
%16316 = add nsw i32 %16315, 1
store i32 %16316, i32* %3
%16317 = load i32, i32* %3
%16318 = mul nsw i32 %16317, 2
store i32 %16318, i32* %3
%16319 = load i32, i32* %3
%16320 = sub nsw i32 %16319, 1
store i32 %16320, i32* %3
%16321 = load i32, i32* %3
%16322 = and i32 %16321, -1044481
store i32 %16322, i32* %3
%16323 = load i32, i32* %3
%16324 = xor i32 %16323, 81954
store i32 %16324, i32* %3
%16325 = load i32, i32* %3
%16326 = srem i32 %16325, 268435443
store i32 %16326, i32* %3
%16327 = load i32, i32* %3
%16328 = add nsw i32 %16327, 6
store i32 %16328, i32* %3
%16329 = load i32, i32* %3
%16330 = mul nsw i32 %16329, 10
store i32 %16330, i32* %3
%16331 = load i32, i32* %3
%16332 = add nsw i32 %16331, 1
store i32 %16332, i32* %3
%16333 = load i32, i32* %3
%16334 = mul nsw i32 %16333, 2
store i32 %16334, i32* %3
%16335 = load i32, i32* %3
%16336 = sub nsw i32 %16335, 1
store i32 %16336, i32* %3
%16337 = load i32, i32* %3
%16338 = and i32 %16337, -1044481
store i32 %16338, i32* %3
%16339 = load i32, i32* %3
%16340 = xor i32 %16339, 81954
store i32 %16340, i32* %3
%16341 = load i32, i32* %3
%16342 = srem i32 %16341, 268435443
store i32 %16342, i32* %3
%16343 = load i32, i32* %3
%16344 = add nsw i32 %16343, 6
store i32 %16344, i32* %3
%16345 = load i32, i32* %3
%16346 = mul nsw i32 %16345, 10
store i32 %16346, i32* %3
%16347 = load i32, i32* %3
%16348 = add nsw i32 %16347, 1
store i32 %16348, i32* %3
%16349 = load i32, i32* %3
%16350 = mul nsw i32 %16349, 2
store i32 %16350, i32* %3
%16351 = load i32, i32* %3
%16352 = sub nsw i32 %16351, 1
store i32 %16352, i32* %3
%16353 = load i32, i32* %3
%16354 = and i32 %16353, -1044481
store i32 %16354, i32* %3
%16355 = load i32, i32* %3
%16356 = xor i32 %16355, 81954
store i32 %16356, i32* %3
%16357 = load i32, i32* %3
%16358 = srem i32 %16357, 268435443
store i32 %16358, i32* %3
%16359 = load i32, i32* %3
%16360 = add nsw i32 %16359, 6
store i32 %16360, i32* %3
%16361 = load i32, i32* %3
%16362 = mul nsw i32 %16361, 10
store i32 %16362, i32* %3
%16363 = load i32, i32* %3
%16364 = add nsw i32 %16363, 1
store i32 %16364, i32* %3
%16365 = load i32, i32* %3
%16366 = mul nsw i32 %16365, 2
store i32 %16366, i32* %3
%16367 = load i32, i32* %3
%16368 = sub nsw i32 %16367, 1
store i32 %16368, i32* %3
%16369 = load i32, i32* %3
%16370 = and i32 %16369, -1044481
store i32 %16370, i32* %3
%16371 = load i32, i32* %3
%16372 = xor i32 %16371, 81954
store i32 %16372, i32* %3
%16373 = load i32, i32* %3
%16374 = srem i32 %16373, 268435443
store i32 %16374, i32* %3
%16375 = load i32, i32* %3
%16376 = add nsw i32 %16375, 6
store i32 %16376, i32* %3
%16377 = load i32, i32* %3
%16378 = mul nsw i32 %16377, 10
store i32 %16378, i32* %3
%16379 = load i32, i32* %3
%16380 = add nsw i32 %16379, 1
store i32 %16380, i32* %3
%16381 = load i32, i32* %3
%16382 = mul nsw i32 %16381, 2
store i32 %16382, i32* %3
%16383 = load i32, i32* %3
%16384 = sub nsw i32 %16383, 1
store i32 %16384, i32* %3
%16385 = load i32, i32* %3
%16386 = and i32 %16385, -1044481
store i32 %16386, i32* %3
%16387 = load i32, i32* %3
%16388 = xor i32 %16387, 81954
store i32 %16388, i32* %3
%16389 = load i32, i32* %3
%16390 = srem i32 %16389, 268435443
store i32 %16390, i32* %3
%16391 = load i32, i32* %3
%16392 = add nsw i32 %16391, 6
store i32 %16392, i32* %3
%16393 = load i32, i32* %3
%16394 = mul nsw i32 %16393, 10
store i32 %16394, i32* %3
%16395 = load i32, i32* %3
%16396 = add nsw i32 %16395, 1
store i32 %16396, i32* %3
%16397 = load i32, i32* %3
%16398 = mul nsw i32 %16397, 2
store i32 %16398, i32* %3
%16399 = load i32, i32* %3
%16400 = sub nsw i32 %16399, 1
store i32 %16400, i32* %3
%16401 = load i32, i32* %3
%16402 = and i32 %16401, -1044481
store i32 %16402, i32* %3
%16403 = load i32, i32* %3
%16404 = xor i32 %16403, 81954
store i32 %16404, i32* %3
%16405 = load i32, i32* %3
%16406 = srem i32 %16405, 268435443
store i32 %16406, i32* %3
%16407 = load i32, i32* %3
%16408 = add nsw i32 %16407, 6
store i32 %16408, i32* %3
%16409 = load i32, i32* %3
%16410 = mul nsw i32 %16409, 10
store i32 %16410, i32* %3
%16411 = load i32, i32* %3
%16412 = add nsw i32 %16411, 1
store i32 %16412, i32* %3
%16413 = load i32, i32* %3
%16414 = mul nsw i32 %16413, 2
store i32 %16414, i32* %3
%16415 = load i32, i32* %3
%16416 = sub nsw i32 %16415, 1
store i32 %16416, i32* %3
%16417 = load i32, i32* %3
%16418 = and i32 %16417, -1044481
store i32 %16418, i32* %3
%16419 = load i32, i32* %3
%16420 = xor i32 %16419, 81954
store i32 %16420, i32* %3
%16421 = load i32, i32* %3
%16422 = srem i32 %16421, 268435443
store i32 %16422, i32* %3
%16423 = load i32, i32* %3
%16424 = add nsw i32 %16423, 6
store i32 %16424, i32* %3
%16425 = load i32, i32* %3
%16426 = mul nsw i32 %16425, 10
store i32 %16426, i32* %3
%16427 = load i32, i32* %3
%16428 = add nsw i32 %16427, 1
store i32 %16428, i32* %3
%16429 = load i32, i32* %3
%16430 = mul nsw i32 %16429, 2
store i32 %16430, i32* %3
%16431 = load i32, i32* %3
%16432 = sub nsw i32 %16431, 1
store i32 %16432, i32* %3
%16433 = load i32, i32* %3
%16434 = and i32 %16433, -1044481
store i32 %16434, i32* %3
%16435 = load i32, i32* %3
%16436 = xor i32 %16435, 81954
store i32 %16436, i32* %3
%16437 = load i32, i32* %3
%16438 = srem i32 %16437, 268435443
store i32 %16438, i32* %3
%16439 = load i32, i32* %3
%16440 = add nsw i32 %16439, 6
store i32 %16440, i32* %3
%16441 = load i32, i32* %3
%16442 = mul nsw i32 %16441, 10
store i32 %16442, i32* %3
%16443 = load i32, i32* %3
%16444 = add nsw i32 %16443, 1
store i32 %16444, i32* %3
%16445 = load i32, i32* %3
%16446 = mul nsw i32 %16445, 2
store i32 %16446, i32* %3
%16447 = load i32, i32* %3
%16448 = sub nsw i32 %16447, 1
store i32 %16448, i32* %3
%16449 = load i32, i32* %3
%16450 = and i32 %16449, -1044481
store i32 %16450, i32* %3
%16451 = load i32, i32* %3
%16452 = xor i32 %16451, 81954
store i32 %16452, i32* %3
%16453 = load i32, i32* %3
%16454 = srem i32 %16453, 268435443
store i32 %16454, i32* %3
%16455 = load i32, i32* %3
%16456 = add nsw i32 %16455, 6
store i32 %16456, i32* %3
%16457 = load i32, i32* %3
%16458 = mul nsw i32 %16457, 10
store i32 %16458, i32* %3
%16459 = load i32, i32* %3
%16460 = add nsw i32 %16459, 1
store i32 %16460, i32* %3
%16461 = load i32, i32* %3
%16462 = mul nsw i32 %16461, 2
store i32 %16462, i32* %3
%16463 = load i32, i32* %3
%16464 = sub nsw i32 %16463, 1
store i32 %16464, i32* %3
%16465 = load i32, i32* %3
%16466 = and i32 %16465, -1044481
store i32 %16466, i32* %3
%16467 = load i32, i32* %3
%16468 = xor i32 %16467, 81954
store i32 %16468, i32* %3
%16469 = load i32, i32* %3
%16470 = srem i32 %16469, 268435443
store i32 %16470, i32* %3
%16471 = load i32, i32* %3
%16472 = add nsw i32 %16471, 6
store i32 %16472, i32* %3
%16473 = load i32, i32* %3
%16474 = mul nsw i32 %16473, 10
store i32 %16474, i32* %3
%16475 = load i32, i32* %3
%16476 = add nsw i32 %16475, 1
store i32 %16476, i32* %3
%16477 = load i32, i32* %3
%16478 = mul nsw i32 %16477, 2
store i32 %16478, i32* %3
%16479 = load i32, i32* %3
%16480 = sub nsw i32 %16479, 1
store i32 %16480, i32* %3
%16481 = load i32, i32* %3
%16482 = and i32 %16481, -1044481
store i32 %16482, i32* %3
%16483 = load i32, i32* %3
%16484 = xor i32 %16483, 81954
store i32 %16484, i32* %3
%16485 = load i32, i32* %3
%16486 = srem i32 %16485, 268435443
store i32 %16486, i32* %3
%16487 = load i32, i32* %3
%16488 = add nsw i32 %16487, 6
store i32 %16488, i32* %3
%16489 = load i32, i32* %3
%16490 = mul nsw i32 %16489, 10
store i32 %16490, i32* %3
%16491 = load i32, i32* %3
%16492 = add nsw i32 %16491, 1
store i32 %16492, i32* %3
%16493 = load i32, i32* %3
%16494 = mul nsw i32 %16493, 2
store i32 %16494, i32* %3
%16495 = load i32, i32* %3
%16496 = sub nsw i32 %16495, 1
store i32 %16496, i32* %3
%16497 = load i32, i32* %3
%16498 = and i32 %16497, -1044481
store i32 %16498, i32* %3
%16499 = load i32, i32* %3
%16500 = xor i32 %16499, 81954
store i32 %16500, i32* %3
%16501 = load i32, i32* %3
%16502 = srem i32 %16501, 268435443
store i32 %16502, i32* %3
%16503 = load i32, i32* %3
%16504 = add nsw i32 %16503, 6
store i32 %16504, i32* %3
%16505 = load i32, i32* %3
%16506 = mul nsw i32 %16505, 10
store i32 %16506, i32* %3
%16507 = load i32, i32* %3
%16508 = add nsw i32 %16507, 1
store i32 %16508, i32* %3
%16509 = load i32, i32* %3
%16510 = mul nsw i32 %16509, 2
store i32 %16510, i32* %3
%16511 = load i32, i32* %3
%16512 = sub nsw i32 %16511, 1
store i32 %16512, i32* %3
%16513 = load i32, i32* %3
%16514 = and i32 %16513, -1044481
store i32 %16514, i32* %3
%16515 = load i32, i32* %3
%16516 = xor i32 %16515, 81954
store i32 %16516, i32* %3
%16517 = load i32, i32* %3
%16518 = srem i32 %16517, 268435443
store i32 %16518, i32* %3
%16519 = load i32, i32* %3
%16520 = add nsw i32 %16519, 6
store i32 %16520, i32* %3
%16521 = load i32, i32* %3
%16522 = mul nsw i32 %16521, 10
store i32 %16522, i32* %3
%16523 = load i32, i32* %3
%16524 = add nsw i32 %16523, 1
store i32 %16524, i32* %3
%16525 = load i32, i32* %3
%16526 = mul nsw i32 %16525, 2
store i32 %16526, i32* %3
%16527 = load i32, i32* %3
%16528 = sub nsw i32 %16527, 1
store i32 %16528, i32* %3
%16529 = load i32, i32* %3
%16530 = and i32 %16529, -1044481
store i32 %16530, i32* %3
%16531 = load i32, i32* %3
%16532 = xor i32 %16531, 81954
store i32 %16532, i32* %3
%16533 = load i32, i32* %3
%16534 = srem i32 %16533, 268435443
store i32 %16534, i32* %3
%16535 = load i32, i32* %3
%16536 = add nsw i32 %16535, 6
store i32 %16536, i32* %3
%16537 = load i32, i32* %3
%16538 = mul nsw i32 %16537, 10
store i32 %16538, i32* %3
%16539 = load i32, i32* %3
%16540 = add nsw i32 %16539, 1
store i32 %16540, i32* %3
%16541 = load i32, i32* %3
%16542 = mul nsw i32 %16541, 2
store i32 %16542, i32* %3
%16543 = load i32, i32* %3
%16544 = sub nsw i32 %16543, 1
store i32 %16544, i32* %3
%16545 = load i32, i32* %3
%16546 = and i32 %16545, -1044481
store i32 %16546, i32* %3
%16547 = load i32, i32* %3
%16548 = xor i32 %16547, 81954
store i32 %16548, i32* %3
%16549 = load i32, i32* %3
%16550 = srem i32 %16549, 268435443
store i32 %16550, i32* %3
%16551 = load i32, i32* %3
%16552 = add nsw i32 %16551, 6
store i32 %16552, i32* %3
%16553 = load i32, i32* %3
%16554 = mul nsw i32 %16553, 10
store i32 %16554, i32* %3
%16555 = load i32, i32* %3
%16556 = add nsw i32 %16555, 1
store i32 %16556, i32* %3
%16557 = load i32, i32* %3
%16558 = mul nsw i32 %16557, 2
store i32 %16558, i32* %3
%16559 = load i32, i32* %3
%16560 = sub nsw i32 %16559, 1
store i32 %16560, i32* %3
%16561 = load i32, i32* %3
%16562 = and i32 %16561, -1044481
store i32 %16562, i32* %3
%16563 = load i32, i32* %3
%16564 = xor i32 %16563, 81954
store i32 %16564, i32* %3
%16565 = load i32, i32* %3
%16566 = srem i32 %16565, 268435443
store i32 %16566, i32* %3
%16567 = load i32, i32* %3
%16568 = add nsw i32 %16567, 6
store i32 %16568, i32* %3
%16569 = load i32, i32* %3
%16570 = mul nsw i32 %16569, 10
store i32 %16570, i32* %3
%16571 = load i32, i32* %3
%16572 = add nsw i32 %16571, 1
store i32 %16572, i32* %3
%16573 = load i32, i32* %3
%16574 = mul nsw i32 %16573, 2
store i32 %16574, i32* %3
%16575 = load i32, i32* %3
%16576 = sub nsw i32 %16575, 1
store i32 %16576, i32* %3
%16577 = load i32, i32* %3
%16578 = and i32 %16577, -1044481
store i32 %16578, i32* %3
%16579 = load i32, i32* %3
%16580 = xor i32 %16579, 81954
store i32 %16580, i32* %3
%16581 = load i32, i32* %3
%16582 = srem i32 %16581, 268435443
store i32 %16582, i32* %3
%16583 = load i32, i32* %3
%16584 = add nsw i32 %16583, 6
store i32 %16584, i32* %3
%16585 = load i32, i32* %3
%16586 = mul nsw i32 %16585, 10
store i32 %16586, i32* %3
%16587 = load i32, i32* %3
%16588 = add nsw i32 %16587, 1
store i32 %16588, i32* %3
%16589 = load i32, i32* %3
%16590 = mul nsw i32 %16589, 2
store i32 %16590, i32* %3
%16591 = load i32, i32* %3
%16592 = sub nsw i32 %16591, 1
store i32 %16592, i32* %3
%16593 = load i32, i32* %3
%16594 = and i32 %16593, -1044481
store i32 %16594, i32* %3
%16595 = load i32, i32* %3
%16596 = xor i32 %16595, 81954
store i32 %16596, i32* %3
%16597 = load i32, i32* %3
%16598 = srem i32 %16597, 268435443
store i32 %16598, i32* %3
%16599 = load i32, i32* %3
%16600 = add nsw i32 %16599, 6
store i32 %16600, i32* %3
%16601 = load i32, i32* %3
%16602 = mul nsw i32 %16601, 10
store i32 %16602, i32* %3
%16603 = load i32, i32* %3
%16604 = add nsw i32 %16603, 1
store i32 %16604, i32* %3
%16605 = load i32, i32* %3
%16606 = mul nsw i32 %16605, 2
store i32 %16606, i32* %3
%16607 = load i32, i32* %3
%16608 = sub nsw i32 %16607, 1
store i32 %16608, i32* %3
%16609 = load i32, i32* %3
%16610 = and i32 %16609, -1044481
store i32 %16610, i32* %3
%16611 = load i32, i32* %3
%16612 = xor i32 %16611, 81954
store i32 %16612, i32* %3
%16613 = load i32, i32* %3
%16614 = srem i32 %16613, 268435443
store i32 %16614, i32* %3
%16615 = load i32, i32* %3
%16616 = add nsw i32 %16615, 6
store i32 %16616, i32* %3
%16617 = load i32, i32* %3
%16618 = mul nsw i32 %16617, 10
store i32 %16618, i32* %3
%16619 = load i32, i32* %3
%16620 = add nsw i32 %16619, 1
store i32 %16620, i32* %3
%16621 = load i32, i32* %3
%16622 = mul nsw i32 %16621, 2
store i32 %16622, i32* %3
%16623 = load i32, i32* %3
%16624 = sub nsw i32 %16623, 1
store i32 %16624, i32* %3
%16625 = load i32, i32* %3
%16626 = and i32 %16625, -1044481
store i32 %16626, i32* %3
%16627 = load i32, i32* %3
%16628 = xor i32 %16627, 81954
store i32 %16628, i32* %3
%16629 = load i32, i32* %3
%16630 = srem i32 %16629, 268435443
store i32 %16630, i32* %3
%16631 = load i32, i32* %3
%16632 = add nsw i32 %16631, 6
store i32 %16632, i32* %3
%16633 = load i32, i32* %3
%16634 = mul nsw i32 %16633, 10
store i32 %16634, i32* %3
%16635 = load i32, i32* %3
%16636 = add nsw i32 %16635, 1
store i32 %16636, i32* %3
%16637 = load i32, i32* %3
%16638 = mul nsw i32 %16637, 2
store i32 %16638, i32* %3
%16639 = load i32, i32* %3
%16640 = sub nsw i32 %16639, 1
store i32 %16640, i32* %3
%16641 = load i32, i32* %3
%16642 = and i32 %16641, -1044481
store i32 %16642, i32* %3
%16643 = load i32, i32* %3
%16644 = xor i32 %16643, 81954
store i32 %16644, i32* %3
%16645 = load i32, i32* %3
%16646 = srem i32 %16645, 268435443
store i32 %16646, i32* %3
%16647 = load i32, i32* %3
%16648 = add nsw i32 %16647, 6
store i32 %16648, i32* %3
%16649 = load i32, i32* %3
%16650 = mul nsw i32 %16649, 10
store i32 %16650, i32* %3
%16651 = load i32, i32* %3
%16652 = add nsw i32 %16651, 1
store i32 %16652, i32* %3
%16653 = load i32, i32* %3
%16654 = mul nsw i32 %16653, 2
store i32 %16654, i32* %3
%16655 = load i32, i32* %3
%16656 = sub nsw i32 %16655, 1
store i32 %16656, i32* %3
%16657 = load i32, i32* %3
%16658 = and i32 %16657, -1044481
store i32 %16658, i32* %3
%16659 = load i32, i32* %3
%16660 = xor i32 %16659, 81954
store i32 %16660, i32* %3
%16661 = load i32, i32* %3
%16662 = srem i32 %16661, 268435443
store i32 %16662, i32* %3
%16663 = load i32, i32* %3
%16664 = add nsw i32 %16663, 6
store i32 %16664, i32* %3
%16665 = load i32, i32* %3
%16666 = mul nsw i32 %16665, 10
store i32 %16666, i32* %3
%16667 = load i32, i32* %3
%16668 = add nsw i32 %16667, 1
store i32 %16668, i32* %3
%16669 = load i32, i32* %3
%16670 = mul nsw i32 %16669, 2
store i32 %16670, i32* %3
%16671 = load i32, i32* %3
%16672 = sub nsw i32 %16671, 1
store i32 %16672, i32* %3
%16673 = load i32, i32* %3
%16674 = and i32 %16673, -1044481
store i32 %16674, i32* %3
%16675 = load i32, i32* %3
%16676 = xor i32 %16675, 81954
store i32 %16676, i32* %3
%16677 = load i32, i32* %3
%16678 = srem i32 %16677, 268435443
store i32 %16678, i32* %3
%16679 = load i32, i32* %3
%16680 = add nsw i32 %16679, 6
store i32 %16680, i32* %3
%16681 = load i32, i32* %3
%16682 = mul nsw i32 %16681, 10
store i32 %16682, i32* %3
%16683 = load i32, i32* %3
%16684 = add nsw i32 %16683, 1
store i32 %16684, i32* %3
%16685 = load i32, i32* %3
%16686 = mul nsw i32 %16685, 2
store i32 %16686, i32* %3
%16687 = load i32, i32* %3
%16688 = sub nsw i32 %16687, 1
store i32 %16688, i32* %3
%16689 = load i32, i32* %3
%16690 = and i32 %16689, -1044481
store i32 %16690, i32* %3
%16691 = load i32, i32* %3
%16692 = xor i32 %16691, 81954
store i32 %16692, i32* %3
%16693 = load i32, i32* %3
%16694 = srem i32 %16693, 268435443
store i32 %16694, i32* %3
%16695 = load i32, i32* %3
%16696 = add nsw i32 %16695, 6
store i32 %16696, i32* %3
%16697 = load i32, i32* %3
%16698 = mul nsw i32 %16697, 10
store i32 %16698, i32* %3
%16699 = load i32, i32* %3
%16700 = add nsw i32 %16699, 1
store i32 %16700, i32* %3
%16701 = load i32, i32* %3
%16702 = mul nsw i32 %16701, 2
store i32 %16702, i32* %3
%16703 = load i32, i32* %3
%16704 = sub nsw i32 %16703, 1
store i32 %16704, i32* %3
%16705 = load i32, i32* %3
%16706 = and i32 %16705, -1044481
store i32 %16706, i32* %3
%16707 = load i32, i32* %3
%16708 = xor i32 %16707, 81954
store i32 %16708, i32* %3
%16709 = load i32, i32* %3
%16710 = srem i32 %16709, 268435443
store i32 %16710, i32* %3
%16711 = load i32, i32* %3
%16712 = add nsw i32 %16711, 6
store i32 %16712, i32* %3
%16713 = load i32, i32* %3
%16714 = mul nsw i32 %16713, 10
store i32 %16714, i32* %3
%16715 = load i32, i32* %3
%16716 = add nsw i32 %16715, 1
store i32 %16716, i32* %3
%16717 = load i32, i32* %3
%16718 = mul nsw i32 %16717, 2
store i32 %16718, i32* %3
%16719 = load i32, i32* %3
%16720 = sub nsw i32 %16719, 1
store i32 %16720, i32* %3
%16721 = load i32, i32* %3
%16722 = and i32 %16721, -1044481
store i32 %16722, i32* %3
%16723 = load i32, i32* %3
%16724 = xor i32 %16723, 81954
store i32 %16724, i32* %3
%16725 = load i32, i32* %3
%16726 = srem i32 %16725, 268435443
store i32 %16726, i32* %3
%16727 = load i32, i32* %3
%16728 = add nsw i32 %16727, 6
store i32 %16728, i32* %3
%16729 = load i32, i32* %3
%16730 = mul nsw i32 %16729, 10
store i32 %16730, i32* %3
%16731 = load i32, i32* %3
%16732 = add nsw i32 %16731, 1
store i32 %16732, i32* %3
%16733 = load i32, i32* %3
%16734 = mul nsw i32 %16733, 2
store i32 %16734, i32* %3
%16735 = load i32, i32* %3
%16736 = sub nsw i32 %16735, 1
store i32 %16736, i32* %3
%16737 = load i32, i32* %3
%16738 = and i32 %16737, -1044481
store i32 %16738, i32* %3
%16739 = load i32, i32* %3
%16740 = xor i32 %16739, 81954
store i32 %16740, i32* %3
%16741 = load i32, i32* %3
%16742 = srem i32 %16741, 268435443
store i32 %16742, i32* %3
%16743 = load i32, i32* %3
%16744 = add nsw i32 %16743, 6
store i32 %16744, i32* %3
%16745 = load i32, i32* %3
%16746 = mul nsw i32 %16745, 10
store i32 %16746, i32* %3
%16747 = load i32, i32* %3
%16748 = add nsw i32 %16747, 1
store i32 %16748, i32* %3
%16749 = load i32, i32* %3
%16750 = mul nsw i32 %16749, 2
store i32 %16750, i32* %3
%16751 = load i32, i32* %3
%16752 = sub nsw i32 %16751, 1
store i32 %16752, i32* %3
%16753 = load i32, i32* %3
%16754 = and i32 %16753, -1044481
store i32 %16754, i32* %3
%16755 = load i32, i32* %3
%16756 = xor i32 %16755, 81954
store i32 %16756, i32* %3
%16757 = load i32, i32* %3
%16758 = srem i32 %16757, 268435443
store i32 %16758, i32* %3
%16759 = load i32, i32* %3
%16760 = add nsw i32 %16759, 6
store i32 %16760, i32* %3
%16761 = load i32, i32* %3
%16762 = mul nsw i32 %16761, 10
store i32 %16762, i32* %3
%16763 = load i32, i32* %3
%16764 = add nsw i32 %16763, 1
store i32 %16764, i32* %3
%16765 = load i32, i32* %3
%16766 = mul nsw i32 %16765, 2
store i32 %16766, i32* %3
%16767 = load i32, i32* %3
%16768 = sub nsw i32 %16767, 1
store i32 %16768, i32* %3
%16769 = load i32, i32* %3
%16770 = and i32 %16769, -1044481
store i32 %16770, i32* %3
%16771 = load i32, i32* %3
%16772 = xor i32 %16771, 81954
store i32 %16772, i32* %3
%16773 = load i32, i32* %3
%16774 = srem i32 %16773, 268435443
store i32 %16774, i32* %3
%16775 = load i32, i32* %3
%16776 = add nsw i32 %16775, 6
store i32 %16776, i32* %3
%16777 = load i32, i32* %3
%16778 = mul nsw i32 %16777, 10
store i32 %16778, i32* %3
%16779 = load i32, i32* %3
%16780 = add nsw i32 %16779, 1
store i32 %16780, i32* %3
%16781 = load i32, i32* %3
%16782 = mul nsw i32 %16781, 2
store i32 %16782, i32* %3
%16783 = load i32, i32* %3
%16784 = sub nsw i32 %16783, 1
store i32 %16784, i32* %3
%16785 = load i32, i32* %3
%16786 = and i32 %16785, -1044481
store i32 %16786, i32* %3
%16787 = load i32, i32* %3
%16788 = xor i32 %16787, 81954
store i32 %16788, i32* %3
%16789 = load i32, i32* %3
%16790 = srem i32 %16789, 268435443
store i32 %16790, i32* %3
%16791 = load i32, i32* %3
%16792 = add nsw i32 %16791, 6
store i32 %16792, i32* %3
%16793 = load i32, i32* %3
%16794 = mul nsw i32 %16793, 10
store i32 %16794, i32* %3
%16795 = load i32, i32* %3
%16796 = add nsw i32 %16795, 1
store i32 %16796, i32* %3
%16797 = load i32, i32* %3
%16798 = mul nsw i32 %16797, 2
store i32 %16798, i32* %3
%16799 = load i32, i32* %3
%16800 = sub nsw i32 %16799, 1
store i32 %16800, i32* %3
%16801 = load i32, i32* %3
%16802 = and i32 %16801, -1044481
store i32 %16802, i32* %3
%16803 = load i32, i32* %3
%16804 = xor i32 %16803, 81954
store i32 %16804, i32* %3
%16805 = load i32, i32* %3
%16806 = srem i32 %16805, 268435443
store i32 %16806, i32* %3
%16807 = load i32, i32* %3
%16808 = add nsw i32 %16807, 6
store i32 %16808, i32* %3
%16809 = load i32, i32* %3
%16810 = mul nsw i32 %16809, 10
store i32 %16810, i32* %3
%16811 = load i32, i32* %3
%16812 = add nsw i32 %16811, 1
store i32 %16812, i32* %3
%16813 = load i32, i32* %3
%16814 = mul nsw i32 %16813, 2
store i32 %16814, i32* %3
%16815 = load i32, i32* %3
%16816 = sub nsw i32 %16815, 1
store i32 %16816, i32* %3
%16817 = load i32, i32* %3
%16818 = and i32 %16817, -1044481
store i32 %16818, i32* %3
%16819 = load i32, i32* %3
%16820 = xor i32 %16819, 81954
store i32 %16820, i32* %3
%16821 = load i32, i32* %3
%16822 = srem i32 %16821, 268435443
store i32 %16822, i32* %3
%16823 = load i32, i32* %3
%16824 = add nsw i32 %16823, 6
store i32 %16824, i32* %3
%16825 = load i32, i32* %3
%16826 = mul nsw i32 %16825, 10
store i32 %16826, i32* %3
%16827 = load i32, i32* %3
%16828 = add nsw i32 %16827, 1
store i32 %16828, i32* %3
%16829 = load i32, i32* %3
%16830 = mul nsw i32 %16829, 2
store i32 %16830, i32* %3
%16831 = load i32, i32* %3
%16832 = sub nsw i32 %16831, 1
store i32 %16832, i32* %3
%16833 = load i32, i32* %3
%16834 = and i32 %16833, -1044481
store i32 %16834, i32* %3
%16835 = load i32, i32* %3
%16836 = xor i32 %16835, 81954
store i32 %16836, i32* %3
%16837 = load i32, i32* %3
%16838 = srem i32 %16837, 268435443
store i32 %16838, i32* %3
%16839 = load i32, i32* %3
%16840 = add nsw i32 %16839, 6
store i32 %16840, i32* %3
%16841 = load i32, i32* %3
%16842 = mul nsw i32 %16841, 10
store i32 %16842, i32* %3
%16843 = load i32, i32* %3
%16844 = add nsw i32 %16843, 1
store i32 %16844, i32* %3
%16845 = load i32, i32* %3
%16846 = mul nsw i32 %16845, 2
store i32 %16846, i32* %3
%16847 = load i32, i32* %3
%16848 = sub nsw i32 %16847, 1
store i32 %16848, i32* %3
%16849 = load i32, i32* %3
%16850 = and i32 %16849, -1044481
store i32 %16850, i32* %3
%16851 = load i32, i32* %3
%16852 = xor i32 %16851, 81954
store i32 %16852, i32* %3
%16853 = load i32, i32* %3
%16854 = srem i32 %16853, 268435443
store i32 %16854, i32* %3
%16855 = load i32, i32* %3
%16856 = add nsw i32 %16855, 6
store i32 %16856, i32* %3
%16857 = load i32, i32* %3
%16858 = mul nsw i32 %16857, 10
store i32 %16858, i32* %3
%16859 = load i32, i32* %3
%16860 = add nsw i32 %16859, 1
store i32 %16860, i32* %3
%16861 = load i32, i32* %3
%16862 = mul nsw i32 %16861, 2
store i32 %16862, i32* %3
%16863 = load i32, i32* %3
%16864 = sub nsw i32 %16863, 1
store i32 %16864, i32* %3
%16865 = load i32, i32* %3
%16866 = and i32 %16865, -1044481
store i32 %16866, i32* %3
%16867 = load i32, i32* %3
%16868 = xor i32 %16867, 81954
store i32 %16868, i32* %3
%16869 = load i32, i32* %3
%16870 = srem i32 %16869, 268435443
store i32 %16870, i32* %3
%16871 = load i32, i32* %3
%16872 = add nsw i32 %16871, 6
store i32 %16872, i32* %3
%16873 = load i32, i32* %3
%16874 = mul nsw i32 %16873, 10
store i32 %16874, i32* %3
%16875 = load i32, i32* %3
%16876 = add nsw i32 %16875, 1
store i32 %16876, i32* %3
%16877 = load i32, i32* %3
%16878 = mul nsw i32 %16877, 2
store i32 %16878, i32* %3
%16879 = load i32, i32* %3
%16880 = sub nsw i32 %16879, 1
store i32 %16880, i32* %3
%16881 = load i32, i32* %3
%16882 = and i32 %16881, -1044481
store i32 %16882, i32* %3
%16883 = load i32, i32* %3
%16884 = xor i32 %16883, 81954
store i32 %16884, i32* %3
%16885 = load i32, i32* %3
%16886 = srem i32 %16885, 268435443
store i32 %16886, i32* %3
%16887 = load i32, i32* %3
%16888 = add nsw i32 %16887, 6
store i32 %16888, i32* %3
%16889 = load i32, i32* %3
%16890 = mul nsw i32 %16889, 10
store i32 %16890, i32* %3
%16891 = load i32, i32* %3
%16892 = add nsw i32 %16891, 1
store i32 %16892, i32* %3
%16893 = load i32, i32* %3
%16894 = mul nsw i32 %16893, 2
store i32 %16894, i32* %3
%16895 = load i32, i32* %3
%16896 = sub nsw i32 %16895, 1
store i32 %16896, i32* %3
%16897 = load i32, i32* %3
%16898 = and i32 %16897, -1044481
store i32 %16898, i32* %3
%16899 = load i32, i32* %3
%16900 = xor i32 %16899, 81954
store i32 %16900, i32* %3
%16901 = load i32, i32* %3
%16902 = srem i32 %16901, 268435443
store i32 %16902, i32* %3
%16903 = load i32, i32* %3
%16904 = add nsw i32 %16903, 6
store i32 %16904, i32* %3
%16905 = load i32, i32* %3
%16906 = mul nsw i32 %16905, 10
store i32 %16906, i32* %3
%16907 = load i32, i32* %3
%16908 = add nsw i32 %16907, 1
store i32 %16908, i32* %3
%16909 = load i32, i32* %3
%16910 = mul nsw i32 %16909, 2
store i32 %16910, i32* %3
%16911 = load i32, i32* %3
%16912 = sub nsw i32 %16911, 1
store i32 %16912, i32* %3
%16913 = load i32, i32* %3
%16914 = and i32 %16913, -1044481
store i32 %16914, i32* %3
%16915 = load i32, i32* %3
%16916 = xor i32 %16915, 81954
store i32 %16916, i32* %3
%16917 = load i32, i32* %3
%16918 = srem i32 %16917, 268435443
store i32 %16918, i32* %3
%16919 = load i32, i32* %3
%16920 = add nsw i32 %16919, 6
store i32 %16920, i32* %3
%16921 = load i32, i32* %3
%16922 = mul nsw i32 %16921, 10
store i32 %16922, i32* %3
%16923 = load i32, i32* %3
%16924 = add nsw i32 %16923, 1
store i32 %16924, i32* %3
%16925 = load i32, i32* %3
%16926 = mul nsw i32 %16925, 2
store i32 %16926, i32* %3
%16927 = load i32, i32* %3
%16928 = sub nsw i32 %16927, 1
store i32 %16928, i32* %3
%16929 = load i32, i32* %3
%16930 = and i32 %16929, -1044481
store i32 %16930, i32* %3
%16931 = load i32, i32* %3
%16932 = xor i32 %16931, 81954
store i32 %16932, i32* %3
%16933 = load i32, i32* %3
%16934 = srem i32 %16933, 268435443
store i32 %16934, i32* %3
%16935 = load i32, i32* %3
%16936 = add nsw i32 %16935, 6
store i32 %16936, i32* %3
%16937 = load i32, i32* %3
%16938 = mul nsw i32 %16937, 10
store i32 %16938, i32* %3
%16939 = load i32, i32* %3
%16940 = add nsw i32 %16939, 1
store i32 %16940, i32* %3
%16941 = load i32, i32* %3
%16942 = mul nsw i32 %16941, 2
store i32 %16942, i32* %3
%16943 = load i32, i32* %3
%16944 = sub nsw i32 %16943, 1
store i32 %16944, i32* %3
%16945 = load i32, i32* %3
%16946 = and i32 %16945, -1044481
store i32 %16946, i32* %3
%16947 = load i32, i32* %3
%16948 = xor i32 %16947, 81954
store i32 %16948, i32* %3
%16949 = load i32, i32* %3
%16950 = srem i32 %16949, 268435443
store i32 %16950, i32* %3
%16951 = load i32, i32* %3
%16952 = add nsw i32 %16951, 6
store i32 %16952, i32* %3
%16953 = load i32, i32* %3
%16954 = mul nsw i32 %16953, 10
store i32 %16954, i32* %3
%16955 = load i32, i32* %3
%16956 = add nsw i32 %16955, 1
store i32 %16956, i32* %3
%16957 = load i32, i32* %3
%16958 = mul nsw i32 %16957, 2
store i32 %16958, i32* %3
%16959 = load i32, i32* %3
%16960 = sub nsw i32 %16959, 1
store i32 %16960, i32* %3
%16961 = load i32, i32* %3
%16962 = and i32 %16961, -1044481
store i32 %16962, i32* %3
%16963 = load i32, i32* %3
%16964 = xor i32 %16963, 81954
store i32 %16964, i32* %3
%16965 = load i32, i32* %3
%16966 = srem i32 %16965, 268435443
store i32 %16966, i32* %3
%16967 = load i32, i32* %3
%16968 = add nsw i32 %16967, 6
store i32 %16968, i32* %3
%16969 = load i32, i32* %3
%16970 = mul nsw i32 %16969, 10
store i32 %16970, i32* %3
%16971 = load i32, i32* %3
%16972 = add nsw i32 %16971, 1
store i32 %16972, i32* %3
%16973 = load i32, i32* %3
%16974 = mul nsw i32 %16973, 2
store i32 %16974, i32* %3
%16975 = load i32, i32* %3
%16976 = sub nsw i32 %16975, 1
store i32 %16976, i32* %3
%16977 = load i32, i32* %3
%16978 = and i32 %16977, -1044481
store i32 %16978, i32* %3
%16979 = load i32, i32* %3
%16980 = xor i32 %16979, 81954
store i32 %16980, i32* %3
%16981 = load i32, i32* %3
%16982 = srem i32 %16981, 268435443
store i32 %16982, i32* %3
%16983 = load i32, i32* %3
%16984 = add nsw i32 %16983, 6
store i32 %16984, i32* %3
%16985 = load i32, i32* %3
%16986 = mul nsw i32 %16985, 10
store i32 %16986, i32* %3
%16987 = load i32, i32* %3
%16988 = add nsw i32 %16987, 1
store i32 %16988, i32* %3
%16989 = load i32, i32* %3
%16990 = mul nsw i32 %16989, 2
store i32 %16990, i32* %3
%16991 = load i32, i32* %3
%16992 = sub nsw i32 %16991, 1
store i32 %16992, i32* %3
%16993 = load i32, i32* %3
%16994 = and i32 %16993, -1044481
store i32 %16994, i32* %3
%16995 = load i32, i32* %3
%16996 = xor i32 %16995, 81954
store i32 %16996, i32* %3
%16997 = load i32, i32* %3
%16998 = srem i32 %16997, 268435443
store i32 %16998, i32* %3
%16999 = load i32, i32* %3
%17000 = add nsw i32 %16999, 6
store i32 %17000, i32* %3
%17001 = load i32, i32* %3
%17002 = mul nsw i32 %17001, 10
store i32 %17002, i32* %3
%17003 = load i32, i32* %3
%17004 = add nsw i32 %17003, 1
store i32 %17004, i32* %3
%17005 = load i32, i32* %3
%17006 = mul nsw i32 %17005, 2
store i32 %17006, i32* %3
%17007 = load i32, i32* %3
%17008 = sub nsw i32 %17007, 1
store i32 %17008, i32* %3
%17009 = load i32, i32* %3
%17010 = and i32 %17009, -1044481
store i32 %17010, i32* %3
%17011 = load i32, i32* %3
%17012 = xor i32 %17011, 81954
store i32 %17012, i32* %3
%17013 = load i32, i32* %3
%17014 = srem i32 %17013, 268435443
store i32 %17014, i32* %3
%17015 = load i32, i32* %3
%17016 = add nsw i32 %17015, 6
store i32 %17016, i32* %3
%17017 = load i32, i32* %3
%17018 = mul nsw i32 %17017, 10
store i32 %17018, i32* %3
%17019 = load i32, i32* %3
%17020 = add nsw i32 %17019, 1
store i32 %17020, i32* %3
%17021 = load i32, i32* %3
%17022 = mul nsw i32 %17021, 2
store i32 %17022, i32* %3
%17023 = load i32, i32* %3
%17024 = sub nsw i32 %17023, 1
store i32 %17024, i32* %3
%17025 = load i32, i32* %3
%17026 = and i32 %17025, -1044481
store i32 %17026, i32* %3
%17027 = load i32, i32* %3
%17028 = xor i32 %17027, 81954
store i32 %17028, i32* %3
%17029 = load i32, i32* %3
%17030 = srem i32 %17029, 268435443
store i32 %17030, i32* %3
%17031 = load i32, i32* %3
%17032 = add nsw i32 %17031, 6
store i32 %17032, i32* %3
%17033 = load i32, i32* %3
%17034 = mul nsw i32 %17033, 10
store i32 %17034, i32* %3
%17035 = load i32, i32* %3
%17036 = add nsw i32 %17035, 1
store i32 %17036, i32* %3
%17037 = load i32, i32* %3
%17038 = mul nsw i32 %17037, 2
store i32 %17038, i32* %3
%17039 = load i32, i32* %3
%17040 = sub nsw i32 %17039, 1
store i32 %17040, i32* %3
%17041 = load i32, i32* %3
%17042 = and i32 %17041, -1044481
store i32 %17042, i32* %3
%17043 = load i32, i32* %3
%17044 = xor i32 %17043, 81954
store i32 %17044, i32* %3
%17045 = load i32, i32* %3
%17046 = srem i32 %17045, 268435443
store i32 %17046, i32* %3
%17047 = load i32, i32* %3
%17048 = add nsw i32 %17047, 6
store i32 %17048, i32* %3
%17049 = load i32, i32* %3
%17050 = mul nsw i32 %17049, 10
store i32 %17050, i32* %3
%17051 = load i32, i32* %3
%17052 = add nsw i32 %17051, 1
store i32 %17052, i32* %3
%17053 = load i32, i32* %3
%17054 = mul nsw i32 %17053, 2
store i32 %17054, i32* %3
%17055 = load i32, i32* %3
%17056 = sub nsw i32 %17055, 1
store i32 %17056, i32* %3
%17057 = load i32, i32* %3
%17058 = and i32 %17057, -1044481
store i32 %17058, i32* %3
%17059 = load i32, i32* %3
%17060 = xor i32 %17059, 81954
store i32 %17060, i32* %3
%17061 = load i32, i32* %3
%17062 = srem i32 %17061, 268435443
store i32 %17062, i32* %3
%17063 = load i32, i32* %3
%17064 = add nsw i32 %17063, 6
store i32 %17064, i32* %3
%17065 = load i32, i32* %3
%17066 = mul nsw i32 %17065, 10
store i32 %17066, i32* %3
%17067 = load i32, i32* %3
%17068 = add nsw i32 %17067, 1
store i32 %17068, i32* %3
%17069 = load i32, i32* %3
%17070 = mul nsw i32 %17069, 2
store i32 %17070, i32* %3
%17071 = load i32, i32* %3
%17072 = sub nsw i32 %17071, 1
store i32 %17072, i32* %3
%17073 = load i32, i32* %3
%17074 = and i32 %17073, -1044481
store i32 %17074, i32* %3
%17075 = load i32, i32* %3
%17076 = xor i32 %17075, 81954
store i32 %17076, i32* %3
%17077 = load i32, i32* %3
%17078 = srem i32 %17077, 268435443
store i32 %17078, i32* %3
%17079 = load i32, i32* %3
%17080 = add nsw i32 %17079, 6
store i32 %17080, i32* %3
%17081 = load i32, i32* %3
%17082 = mul nsw i32 %17081, 10
store i32 %17082, i32* %3
%17083 = load i32, i32* %3
%17084 = add nsw i32 %17083, 1
store i32 %17084, i32* %3
%17085 = load i32, i32* %3
%17086 = mul nsw i32 %17085, 2
store i32 %17086, i32* %3
%17087 = load i32, i32* %3
%17088 = sub nsw i32 %17087, 1
store i32 %17088, i32* %3
%17089 = load i32, i32* %3
%17090 = and i32 %17089, -1044481
store i32 %17090, i32* %3
%17091 = load i32, i32* %3
%17092 = xor i32 %17091, 81954
store i32 %17092, i32* %3
%17093 = load i32, i32* %3
%17094 = srem i32 %17093, 268435443
store i32 %17094, i32* %3
%17095 = load i32, i32* %3
%17096 = add nsw i32 %17095, 6
store i32 %17096, i32* %3
%17097 = load i32, i32* %3
%17098 = mul nsw i32 %17097, 10
store i32 %17098, i32* %3
%17099 = load i32, i32* %3
%17100 = add nsw i32 %17099, 1
store i32 %17100, i32* %3
%17101 = load i32, i32* %3
%17102 = mul nsw i32 %17101, 2
store i32 %17102, i32* %3
%17103 = load i32, i32* %3
%17104 = sub nsw i32 %17103, 1
store i32 %17104, i32* %3
%17105 = load i32, i32* %3
%17106 = and i32 %17105, -1044481
store i32 %17106, i32* %3
%17107 = load i32, i32* %3
%17108 = xor i32 %17107, 81954
store i32 %17108, i32* %3
%17109 = load i32, i32* %3
%17110 = srem i32 %17109, 268435443
store i32 %17110, i32* %3
%17111 = load i32, i32* %3
%17112 = add nsw i32 %17111, 6
store i32 %17112, i32* %3
%17113 = load i32, i32* %3
%17114 = mul nsw i32 %17113, 10
store i32 %17114, i32* %3
%17115 = load i32, i32* %3
%17116 = add nsw i32 %17115, 1
store i32 %17116, i32* %3
%17117 = load i32, i32* %3
%17118 = mul nsw i32 %17117, 2
store i32 %17118, i32* %3
%17119 = load i32, i32* %3
%17120 = sub nsw i32 %17119, 1
store i32 %17120, i32* %3
%17121 = load i32, i32* %3
%17122 = and i32 %17121, -1044481
store i32 %17122, i32* %3
%17123 = load i32, i32* %3
%17124 = xor i32 %17123, 81954
store i32 %17124, i32* %3
%17125 = load i32, i32* %3
%17126 = srem i32 %17125, 268435443
store i32 %17126, i32* %3
%17127 = load i32, i32* %3
%17128 = add nsw i32 %17127, 6
store i32 %17128, i32* %3
%17129 = load i32, i32* %3
%17130 = mul nsw i32 %17129, 10
store i32 %17130, i32* %3
%17131 = load i32, i32* %3
%17132 = add nsw i32 %17131, 1
store i32 %17132, i32* %3
%17133 = load i32, i32* %3
%17134 = mul nsw i32 %17133, 2
store i32 %17134, i32* %3
%17135 = load i32, i32* %3
%17136 = sub nsw i32 %17135, 1
store i32 %17136, i32* %3
%17137 = load i32, i32* %3
%17138 = and i32 %17137, -1044481
store i32 %17138, i32* %3
%17139 = load i32, i32* %3
%17140 = xor i32 %17139, 81954
store i32 %17140, i32* %3
%17141 = load i32, i32* %3
%17142 = srem i32 %17141, 268435443
store i32 %17142, i32* %3
%17143 = load i32, i32* %3
%17144 = add nsw i32 %17143, 6
store i32 %17144, i32* %3
%17145 = load i32, i32* %3
%17146 = mul nsw i32 %17145, 10
store i32 %17146, i32* %3
%17147 = load i32, i32* %3
%17148 = add nsw i32 %17147, 1
store i32 %17148, i32* %3
%17149 = load i32, i32* %3
%17150 = mul nsw i32 %17149, 2
store i32 %17150, i32* %3
%17151 = load i32, i32* %3
%17152 = sub nsw i32 %17151, 1
store i32 %17152, i32* %3
%17153 = load i32, i32* %3
%17154 = and i32 %17153, -1044481
store i32 %17154, i32* %3
%17155 = load i32, i32* %3
%17156 = xor i32 %17155, 81954
store i32 %17156, i32* %3
%17157 = load i32, i32* %3
%17158 = srem i32 %17157, 268435443
store i32 %17158, i32* %3
%17159 = load i32, i32* %3
%17160 = add nsw i32 %17159, 6
store i32 %17160, i32* %3
%17161 = load i32, i32* %3
%17162 = mul nsw i32 %17161, 10
store i32 %17162, i32* %3
%17163 = load i32, i32* %3
%17164 = add nsw i32 %17163, 1
store i32 %17164, i32* %3
%17165 = load i32, i32* %3
%17166 = mul nsw i32 %17165, 2
store i32 %17166, i32* %3
%17167 = load i32, i32* %3
%17168 = sub nsw i32 %17167, 1
store i32 %17168, i32* %3
%17169 = load i32, i32* %3
%17170 = and i32 %17169, -1044481
store i32 %17170, i32* %3
%17171 = load i32, i32* %3
%17172 = xor i32 %17171, 81954
store i32 %17172, i32* %3
%17173 = load i32, i32* %3
%17174 = srem i32 %17173, 268435443
store i32 %17174, i32* %3
%17175 = load i32, i32* %3
%17176 = add nsw i32 %17175, 6
store i32 %17176, i32* %3
%17177 = load i32, i32* %3
%17178 = mul nsw i32 %17177, 10
store i32 %17178, i32* %3
%17179 = load i32, i32* %3
%17180 = add nsw i32 %17179, 1
store i32 %17180, i32* %3
%17181 = load i32, i32* %3
%17182 = mul nsw i32 %17181, 2
store i32 %17182, i32* %3
%17183 = load i32, i32* %3
%17184 = sub nsw i32 %17183, 1
store i32 %17184, i32* %3
%17185 = load i32, i32* %3
%17186 = and i32 %17185, -1044481
store i32 %17186, i32* %3
%17187 = load i32, i32* %3
%17188 = xor i32 %17187, 81954
store i32 %17188, i32* %3
%17189 = load i32, i32* %3
%17190 = srem i32 %17189, 268435443
store i32 %17190, i32* %3
%17191 = load i32, i32* %3
%17192 = add nsw i32 %17191, 6
store i32 %17192, i32* %3
%17193 = load i32, i32* %3
%17194 = mul nsw i32 %17193, 10
store i32 %17194, i32* %3
%17195 = load i32, i32* %3
%17196 = add nsw i32 %17195, 1
store i32 %17196, i32* %3
%17197 = load i32, i32* %3
%17198 = mul nsw i32 %17197, 2
store i32 %17198, i32* %3
%17199 = load i32, i32* %3
%17200 = sub nsw i32 %17199, 1
store i32 %17200, i32* %3
%17201 = load i32, i32* %3
%17202 = and i32 %17201, -1044481
store i32 %17202, i32* %3
%17203 = load i32, i32* %3
%17204 = xor i32 %17203, 81954
store i32 %17204, i32* %3
%17205 = load i32, i32* %3
%17206 = srem i32 %17205, 268435443
store i32 %17206, i32* %3
%17207 = load i32, i32* %3
%17208 = add nsw i32 %17207, 6
store i32 %17208, i32* %3
%17209 = load i32, i32* %3
%17210 = mul nsw i32 %17209, 10
store i32 %17210, i32* %3
%17211 = load i32, i32* %3
%17212 = add nsw i32 %17211, 1
store i32 %17212, i32* %3
%17213 = load i32, i32* %3
%17214 = mul nsw i32 %17213, 2
store i32 %17214, i32* %3
%17215 = load i32, i32* %3
%17216 = sub nsw i32 %17215, 1
store i32 %17216, i32* %3
%17217 = load i32, i32* %3
%17218 = and i32 %17217, -1044481
store i32 %17218, i32* %3
%17219 = load i32, i32* %3
%17220 = xor i32 %17219, 81954
store i32 %17220, i32* %3
%17221 = load i32, i32* %3
%17222 = srem i32 %17221, 268435443
store i32 %17222, i32* %3
%17223 = load i32, i32* %3
%17224 = add nsw i32 %17223, 6
store i32 %17224, i32* %3
%17225 = load i32, i32* %3
%17226 = mul nsw i32 %17225, 10
store i32 %17226, i32* %3
%17227 = load i32, i32* %3
%17228 = add nsw i32 %17227, 1
store i32 %17228, i32* %3
%17229 = load i32, i32* %3
%17230 = mul nsw i32 %17229, 2
store i32 %17230, i32* %3
%17231 = load i32, i32* %3
%17232 = sub nsw i32 %17231, 1
store i32 %17232, i32* %3
%17233 = load i32, i32* %3
%17234 = and i32 %17233, -1044481
store i32 %17234, i32* %3
%17235 = load i32, i32* %3
%17236 = xor i32 %17235, 81954
store i32 %17236, i32* %3
%17237 = load i32, i32* %3
%17238 = srem i32 %17237, 268435443
store i32 %17238, i32* %3
%17239 = load i32, i32* %3
%17240 = add nsw i32 %17239, 6
store i32 %17240, i32* %3
%17241 = load i32, i32* %3
%17242 = mul nsw i32 %17241, 10
store i32 %17242, i32* %3
%17243 = load i32, i32* %3
%17244 = add nsw i32 %17243, 1
store i32 %17244, i32* %3
%17245 = load i32, i32* %3
%17246 = mul nsw i32 %17245, 2
store i32 %17246, i32* %3
%17247 = load i32, i32* %3
%17248 = sub nsw i32 %17247, 1
store i32 %17248, i32* %3
%17249 = load i32, i32* %3
%17250 = and i32 %17249, -1044481
store i32 %17250, i32* %3
%17251 = load i32, i32* %3
%17252 = xor i32 %17251, 81954
store i32 %17252, i32* %3
%17253 = load i32, i32* %3
%17254 = srem i32 %17253, 268435443
store i32 %17254, i32* %3
%17255 = load i32, i32* %3
%17256 = add nsw i32 %17255, 6
store i32 %17256, i32* %3
%17257 = load i32, i32* %3
%17258 = mul nsw i32 %17257, 10
store i32 %17258, i32* %3
%17259 = load i32, i32* %3
%17260 = add nsw i32 %17259, 1
store i32 %17260, i32* %3
%17261 = load i32, i32* %3
%17262 = mul nsw i32 %17261, 2
store i32 %17262, i32* %3
%17263 = load i32, i32* %3
%17264 = sub nsw i32 %17263, 1
store i32 %17264, i32* %3
%17265 = load i32, i32* %3
%17266 = and i32 %17265, -1044481
store i32 %17266, i32* %3
%17267 = load i32, i32* %3
%17268 = xor i32 %17267, 81954
store i32 %17268, i32* %3
%17269 = load i32, i32* %3
%17270 = srem i32 %17269, 268435443
store i32 %17270, i32* %3
%17271 = load i32, i32* %3
%17272 = add nsw i32 %17271, 6
store i32 %17272, i32* %3
%17273 = load i32, i32* %3
%17274 = mul nsw i32 %17273, 10
store i32 %17274, i32* %3
%17275 = load i32, i32* %3
%17276 = add nsw i32 %17275, 1
store i32 %17276, i32* %3
%17277 = load i32, i32* %3
%17278 = mul nsw i32 %17277, 2
store i32 %17278, i32* %3
%17279 = load i32, i32* %3
%17280 = sub nsw i32 %17279, 1
store i32 %17280, i32* %3
%17281 = load i32, i32* %3
%17282 = and i32 %17281, -1044481
store i32 %17282, i32* %3
%17283 = load i32, i32* %3
%17284 = xor i32 %17283, 81954
store i32 %17284, i32* %3
%17285 = load i32, i32* %3
%17286 = srem i32 %17285, 268435443
store i32 %17286, i32* %3
%17287 = load i32, i32* %3
%17288 = add nsw i32 %17287, 6
store i32 %17288, i32* %3
%17289 = load i32, i32* %3
%17290 = mul nsw i32 %17289, 10
store i32 %17290, i32* %3
%17291 = load i32, i32* %3
%17292 = add nsw i32 %17291, 1
store i32 %17292, i32* %3
%17293 = load i32, i32* %3
%17294 = mul nsw i32 %17293, 2
store i32 %17294, i32* %3
%17295 = load i32, i32* %3
%17296 = sub nsw i32 %17295, 1
store i32 %17296, i32* %3
%17297 = load i32, i32* %3
%17298 = and i32 %17297, -1044481
store i32 %17298, i32* %3
%17299 = load i32, i32* %3
%17300 = xor i32 %17299, 81954
store i32 %17300, i32* %3
%17301 = load i32, i32* %3
%17302 = srem i32 %17301, 268435443
store i32 %17302, i32* %3
%17303 = load i32, i32* %3
%17304 = add nsw i32 %17303, 6
store i32 %17304, i32* %3
%17305 = load i32, i32* %3
%17306 = mul nsw i32 %17305, 10
store i32 %17306, i32* %3
%17307 = load i32, i32* %3
%17308 = add nsw i32 %17307, 1
store i32 %17308, i32* %3
%17309 = load i32, i32* %3
%17310 = mul nsw i32 %17309, 2
store i32 %17310, i32* %3
%17311 = load i32, i32* %3
%17312 = sub nsw i32 %17311, 1
store i32 %17312, i32* %3
%17313 = load i32, i32* %3
%17314 = and i32 %17313, -1044481
store i32 %17314, i32* %3
%17315 = load i32, i32* %3
%17316 = xor i32 %17315, 81954
store i32 %17316, i32* %3
%17317 = load i32, i32* %3
%17318 = srem i32 %17317, 268435443
store i32 %17318, i32* %3
%17319 = load i32, i32* %3
%17320 = add nsw i32 %17319, 6
store i32 %17320, i32* %3
%17321 = load i32, i32* %3
%17322 = mul nsw i32 %17321, 10
store i32 %17322, i32* %3
%17323 = load i32, i32* %3
%17324 = add nsw i32 %17323, 1
store i32 %17324, i32* %3
%17325 = load i32, i32* %3
%17326 = mul nsw i32 %17325, 2
store i32 %17326, i32* %3
%17327 = load i32, i32* %3
%17328 = sub nsw i32 %17327, 1
store i32 %17328, i32* %3
%17329 = load i32, i32* %3
%17330 = and i32 %17329, -1044481
store i32 %17330, i32* %3
%17331 = load i32, i32* %3
%17332 = xor i32 %17331, 81954
store i32 %17332, i32* %3
%17333 = load i32, i32* %3
%17334 = srem i32 %17333, 268435443
store i32 %17334, i32* %3
%17335 = load i32, i32* %3
%17336 = add nsw i32 %17335, 6
store i32 %17336, i32* %3
%17337 = load i32, i32* %3
%17338 = mul nsw i32 %17337, 10
store i32 %17338, i32* %3
%17339 = load i32, i32* %3
%17340 = add nsw i32 %17339, 1
store i32 %17340, i32* %3
%17341 = load i32, i32* %3
%17342 = mul nsw i32 %17341, 2
store i32 %17342, i32* %3
%17343 = load i32, i32* %3
%17344 = sub nsw i32 %17343, 1
store i32 %17344, i32* %3
%17345 = load i32, i32* %3
%17346 = and i32 %17345, -1044481
store i32 %17346, i32* %3
%17347 = load i32, i32* %3
%17348 = xor i32 %17347, 81954
store i32 %17348, i32* %3
%17349 = load i32, i32* %3
%17350 = srem i32 %17349, 268435443
store i32 %17350, i32* %3
%17351 = load i32, i32* %3
%17352 = add nsw i32 %17351, 6
store i32 %17352, i32* %3
%17353 = load i32, i32* %3
%17354 = mul nsw i32 %17353, 10
store i32 %17354, i32* %3
%17355 = load i32, i32* %3
%17356 = add nsw i32 %17355, 1
store i32 %17356, i32* %3
%17357 = load i32, i32* %3
%17358 = mul nsw i32 %17357, 2
store i32 %17358, i32* %3
%17359 = load i32, i32* %3
%17360 = sub nsw i32 %17359, 1
store i32 %17360, i32* %3
%17361 = load i32, i32* %3
%17362 = and i32 %17361, -1044481
store i32 %17362, i32* %3
%17363 = load i32, i32* %3
%17364 = xor i32 %17363, 81954
store i32 %17364, i32* %3
%17365 = load i32, i32* %3
%17366 = srem i32 %17365, 268435443
store i32 %17366, i32* %3
%17367 = load i32, i32* %3
%17368 = add nsw i32 %17367, 6
store i32 %17368, i32* %3
%17369 = load i32, i32* %3
%17370 = mul nsw i32 %17369, 10
store i32 %17370, i32* %3
%17371 = load i32, i32* %3
%17372 = add nsw i32 %17371, 1
store i32 %17372, i32* %3
%17373 = load i32, i32* %3
%17374 = mul nsw i32 %17373, 2
store i32 %17374, i32* %3
%17375 = load i32, i32* %3
%17376 = sub nsw i32 %17375, 1
store i32 %17376, i32* %3
%17377 = load i32, i32* %3
%17378 = and i32 %17377, -1044481
store i32 %17378, i32* %3
%17379 = load i32, i32* %3
%17380 = xor i32 %17379, 81954
store i32 %17380, i32* %3
%17381 = load i32, i32* %3
%17382 = srem i32 %17381, 268435443
store i32 %17382, i32* %3
%17383 = load i32, i32* %3
%17384 = add nsw i32 %17383, 6
store i32 %17384, i32* %3
%17385 = load i32, i32* %3
%17386 = mul nsw i32 %17385, 10
store i32 %17386, i32* %3
%17387 = load i32, i32* %3
%17388 = add nsw i32 %17387, 1
store i32 %17388, i32* %3
%17389 = load i32, i32* %3
%17390 = mul nsw i32 %17389, 2
store i32 %17390, i32* %3
%17391 = load i32, i32* %3
%17392 = sub nsw i32 %17391, 1
store i32 %17392, i32* %3
%17393 = load i32, i32* %3
%17394 = and i32 %17393, -1044481
store i32 %17394, i32* %3
%17395 = load i32, i32* %3
%17396 = xor i32 %17395, 81954
store i32 %17396, i32* %3
%17397 = load i32, i32* %3
%17398 = srem i32 %17397, 268435443
store i32 %17398, i32* %3
%17399 = load i32, i32* %3
%17400 = add nsw i32 %17399, 6
store i32 %17400, i32* %3
%17401 = load i32, i32* %3
%17402 = mul nsw i32 %17401, 10
store i32 %17402, i32* %3
%17403 = load i32, i32* %3
%17404 = add nsw i32 %17403, 1
store i32 %17404, i32* %3
%17405 = load i32, i32* %3
%17406 = mul nsw i32 %17405, 2
store i32 %17406, i32* %3
%17407 = load i32, i32* %3
%17408 = sub nsw i32 %17407, 1
store i32 %17408, i32* %3
%17409 = load i32, i32* %3
%17410 = and i32 %17409, -1044481
store i32 %17410, i32* %3
%17411 = load i32, i32* %3
%17412 = xor i32 %17411, 81954
store i32 %17412, i32* %3
%17413 = load i32, i32* %3
%17414 = srem i32 %17413, 268435443
store i32 %17414, i32* %3
%17415 = load i32, i32* %3
%17416 = add nsw i32 %17415, 6
store i32 %17416, i32* %3
%17417 = load i32, i32* %3
%17418 = mul nsw i32 %17417, 10
store i32 %17418, i32* %3
%17419 = load i32, i32* %3
%17420 = add nsw i32 %17419, 1
store i32 %17420, i32* %3
%17421 = load i32, i32* %3
%17422 = mul nsw i32 %17421, 2
store i32 %17422, i32* %3
%17423 = load i32, i32* %3
%17424 = sub nsw i32 %17423, 1
store i32 %17424, i32* %3
%17425 = load i32, i32* %3
%17426 = and i32 %17425, -1044481
store i32 %17426, i32* %3
%17427 = load i32, i32* %3
%17428 = xor i32 %17427, 81954
store i32 %17428, i32* %3
%17429 = load i32, i32* %3
%17430 = srem i32 %17429, 268435443
store i32 %17430, i32* %3
%17431 = load i32, i32* %3
%17432 = add nsw i32 %17431, 6
store i32 %17432, i32* %3
%17433 = load i32, i32* %3
%17434 = mul nsw i32 %17433, 10
store i32 %17434, i32* %3
%17435 = load i32, i32* %3
%17436 = add nsw i32 %17435, 1
store i32 %17436, i32* %3
%17437 = load i32, i32* %3
%17438 = mul nsw i32 %17437, 2
store i32 %17438, i32* %3
%17439 = load i32, i32* %3
%17440 = sub nsw i32 %17439, 1
store i32 %17440, i32* %3
%17441 = load i32, i32* %3
%17442 = and i32 %17441, -1044481
store i32 %17442, i32* %3
%17443 = load i32, i32* %3
%17444 = xor i32 %17443, 81954
store i32 %17444, i32* %3
%17445 = load i32, i32* %3
%17446 = srem i32 %17445, 268435443
store i32 %17446, i32* %3
%17447 = load i32, i32* %3
%17448 = add nsw i32 %17447, 6
store i32 %17448, i32* %3
%17449 = load i32, i32* %3
%17450 = mul nsw i32 %17449, 10
store i32 %17450, i32* %3
%17451 = load i32, i32* %3
%17452 = add nsw i32 %17451, 1
store i32 %17452, i32* %3
%17453 = load i32, i32* %3
%17454 = mul nsw i32 %17453, 2
store i32 %17454, i32* %3
%17455 = load i32, i32* %3
%17456 = sub nsw i32 %17455, 1
store i32 %17456, i32* %3
%17457 = load i32, i32* %3
%17458 = and i32 %17457, -1044481
store i32 %17458, i32* %3
%17459 = load i32, i32* %3
%17460 = xor i32 %17459, 81954
store i32 %17460, i32* %3
%17461 = load i32, i32* %3
%17462 = srem i32 %17461, 268435443
store i32 %17462, i32* %3
%17463 = load i32, i32* %3
%17464 = add nsw i32 %17463, 6
store i32 %17464, i32* %3
%17465 = load i32, i32* %3
%17466 = mul nsw i32 %17465, 10
store i32 %17466, i32* %3
%17467 = load i32, i32* %3
%17468 = add nsw i32 %17467, 1
store i32 %17468, i32* %3
%17469 = load i32, i32* %3
%17470 = mul nsw i32 %17469, 2
store i32 %17470, i32* %3
%17471 = load i32, i32* %3
%17472 = sub nsw i32 %17471, 1
store i32 %17472, i32* %3
%17473 = load i32, i32* %3
%17474 = and i32 %17473, -1044481
store i32 %17474, i32* %3
%17475 = load i32, i32* %3
%17476 = xor i32 %17475, 81954
store i32 %17476, i32* %3
%17477 = load i32, i32* %3
%17478 = srem i32 %17477, 268435443
store i32 %17478, i32* %3
%17479 = load i32, i32* %3
%17480 = add nsw i32 %17479, 6
store i32 %17480, i32* %3
%17481 = load i32, i32* %3
%17482 = mul nsw i32 %17481, 10
store i32 %17482, i32* %3
%17483 = load i32, i32* %3
%17484 = add nsw i32 %17483, 1
store i32 %17484, i32* %3
%17485 = load i32, i32* %3
%17486 = mul nsw i32 %17485, 2
store i32 %17486, i32* %3
%17487 = load i32, i32* %3
%17488 = sub nsw i32 %17487, 1
store i32 %17488, i32* %3
%17489 = load i32, i32* %3
%17490 = and i32 %17489, -1044481
store i32 %17490, i32* %3
%17491 = load i32, i32* %3
%17492 = xor i32 %17491, 81954
store i32 %17492, i32* %3
%17493 = load i32, i32* %3
%17494 = srem i32 %17493, 268435443
store i32 %17494, i32* %3
%17495 = load i32, i32* %3
%17496 = add nsw i32 %17495, 6
store i32 %17496, i32* %3
%17497 = load i32, i32* %3
%17498 = mul nsw i32 %17497, 10
store i32 %17498, i32* %3
%17499 = load i32, i32* %3
%17500 = add nsw i32 %17499, 1
store i32 %17500, i32* %3
%17501 = load i32, i32* %3
%17502 = mul nsw i32 %17501, 2
store i32 %17502, i32* %3
%17503 = load i32, i32* %3
%17504 = sub nsw i32 %17503, 1
store i32 %17504, i32* %3
%17505 = load i32, i32* %3
%17506 = and i32 %17505, -1044481
store i32 %17506, i32* %3
%17507 = load i32, i32* %3
%17508 = xor i32 %17507, 81954
store i32 %17508, i32* %3
%17509 = load i32, i32* %3
%17510 = srem i32 %17509, 268435443
store i32 %17510, i32* %3
%17511 = load i32, i32* %3
%17512 = add nsw i32 %17511, 6
store i32 %17512, i32* %3
%17513 = load i32, i32* %3
%17514 = mul nsw i32 %17513, 10
store i32 %17514, i32* %3
%17515 = load i32, i32* %3
%17516 = add nsw i32 %17515, 1
store i32 %17516, i32* %3
%17517 = load i32, i32* %3
%17518 = mul nsw i32 %17517, 2
store i32 %17518, i32* %3
%17519 = load i32, i32* %3
%17520 = sub nsw i32 %17519, 1
store i32 %17520, i32* %3
%17521 = load i32, i32* %3
%17522 = and i32 %17521, -1044481
store i32 %17522, i32* %3
%17523 = load i32, i32* %3
%17524 = xor i32 %17523, 81954
store i32 %17524, i32* %3
%17525 = load i32, i32* %3
%17526 = srem i32 %17525, 268435443
store i32 %17526, i32* %3
%17527 = load i32, i32* %3
%17528 = add nsw i32 %17527, 6
store i32 %17528, i32* %3
%17529 = load i32, i32* %3
%17530 = mul nsw i32 %17529, 10
store i32 %17530, i32* %3
%17531 = load i32, i32* %3
%17532 = add nsw i32 %17531, 1
store i32 %17532, i32* %3
%17533 = load i32, i32* %3
%17534 = mul nsw i32 %17533, 2
store i32 %17534, i32* %3
%17535 = load i32, i32* %3
%17536 = sub nsw i32 %17535, 1
store i32 %17536, i32* %3
%17537 = load i32, i32* %3
%17538 = and i32 %17537, -1044481
store i32 %17538, i32* %3
%17539 = load i32, i32* %3
%17540 = xor i32 %17539, 81954
store i32 %17540, i32* %3
%17541 = load i32, i32* %3
%17542 = srem i32 %17541, 268435443
store i32 %17542, i32* %3
%17543 = load i32, i32* %3
%17544 = add nsw i32 %17543, 6
store i32 %17544, i32* %3
%17545 = load i32, i32* %3
%17546 = mul nsw i32 %17545, 10
store i32 %17546, i32* %3
%17547 = load i32, i32* %3
%17548 = add nsw i32 %17547, 1
store i32 %17548, i32* %3
%17549 = load i32, i32* %3
%17550 = mul nsw i32 %17549, 2
store i32 %17550, i32* %3
%17551 = load i32, i32* %3
%17552 = sub nsw i32 %17551, 1
store i32 %17552, i32* %3
%17553 = load i32, i32* %3
%17554 = and i32 %17553, -1044481
store i32 %17554, i32* %3
%17555 = load i32, i32* %3
%17556 = xor i32 %17555, 81954
store i32 %17556, i32* %3
%17557 = load i32, i32* %3
%17558 = srem i32 %17557, 268435443
store i32 %17558, i32* %3
%17559 = load i32, i32* %3
%17560 = add nsw i32 %17559, 6
store i32 %17560, i32* %3
%17561 = load i32, i32* %3
%17562 = mul nsw i32 %17561, 10
store i32 %17562, i32* %3
%17563 = load i32, i32* %3
%17564 = add nsw i32 %17563, 1
store i32 %17564, i32* %3
%17565 = load i32, i32* %3
%17566 = mul nsw i32 %17565, 2
store i32 %17566, i32* %3
%17567 = load i32, i32* %3
%17568 = sub nsw i32 %17567, 1
store i32 %17568, i32* %3
%17569 = load i32, i32* %3
%17570 = and i32 %17569, -1044481
store i32 %17570, i32* %3
%17571 = load i32, i32* %3
%17572 = xor i32 %17571, 81954
store i32 %17572, i32* %3
%17573 = load i32, i32* %3
%17574 = srem i32 %17573, 268435443
store i32 %17574, i32* %3
%17575 = load i32, i32* %3
%17576 = add nsw i32 %17575, 6
store i32 %17576, i32* %3
%17577 = load i32, i32* %3
%17578 = mul nsw i32 %17577, 10
store i32 %17578, i32* %3
%17579 = load i32, i32* %3
%17580 = add nsw i32 %17579, 1
store i32 %17580, i32* %3
%17581 = load i32, i32* %3
%17582 = mul nsw i32 %17581, 2
store i32 %17582, i32* %3
%17583 = load i32, i32* %3
%17584 = sub nsw i32 %17583, 1
store i32 %17584, i32* %3
%17585 = load i32, i32* %3
%17586 = and i32 %17585, -1044481
store i32 %17586, i32* %3
%17587 = load i32, i32* %3
%17588 = xor i32 %17587, 81954
store i32 %17588, i32* %3
%17589 = load i32, i32* %3
%17590 = srem i32 %17589, 268435443
store i32 %17590, i32* %3
%17591 = load i32, i32* %3
%17592 = add nsw i32 %17591, 6
store i32 %17592, i32* %3
%17593 = load i32, i32* %3
%17594 = mul nsw i32 %17593, 10
store i32 %17594, i32* %3
%17595 = load i32, i32* %3
%17596 = add nsw i32 %17595, 1
store i32 %17596, i32* %3
%17597 = load i32, i32* %3
%17598 = mul nsw i32 %17597, 2
store i32 %17598, i32* %3
%17599 = load i32, i32* %3
%17600 = sub nsw i32 %17599, 1
store i32 %17600, i32* %3
%17601 = load i32, i32* %3
%17602 = and i32 %17601, -1044481
store i32 %17602, i32* %3
%17603 = load i32, i32* %3
%17604 = xor i32 %17603, 81954
store i32 %17604, i32* %3
%17605 = load i32, i32* %3
%17606 = srem i32 %17605, 268435443
store i32 %17606, i32* %3
%17607 = load i32, i32* %3
%17608 = add nsw i32 %17607, 6
store i32 %17608, i32* %3
%17609 = load i32, i32* %3
%17610 = mul nsw i32 %17609, 10
store i32 %17610, i32* %3
%17611 = load i32, i32* %3
%17612 = add nsw i32 %17611, 1
store i32 %17612, i32* %3
%17613 = load i32, i32* %3
%17614 = mul nsw i32 %17613, 2
store i32 %17614, i32* %3
%17615 = load i32, i32* %3
%17616 = sub nsw i32 %17615, 1
store i32 %17616, i32* %3
%17617 = load i32, i32* %3
%17618 = and i32 %17617, -1044481
store i32 %17618, i32* %3
%17619 = load i32, i32* %3
%17620 = xor i32 %17619, 81954
store i32 %17620, i32* %3
%17621 = load i32, i32* %3
%17622 = srem i32 %17621, 268435443
store i32 %17622, i32* %3
%17623 = load i32, i32* %3
%17624 = add nsw i32 %17623, 6
store i32 %17624, i32* %3
%17625 = load i32, i32* %3
%17626 = mul nsw i32 %17625, 10
store i32 %17626, i32* %3
%17627 = load i32, i32* %3
%17628 = add nsw i32 %17627, 1
store i32 %17628, i32* %3
%17629 = load i32, i32* %3
%17630 = mul nsw i32 %17629, 2
store i32 %17630, i32* %3
%17631 = load i32, i32* %3
%17632 = sub nsw i32 %17631, 1
store i32 %17632, i32* %3
%17633 = load i32, i32* %3
%17634 = and i32 %17633, -1044481
store i32 %17634, i32* %3
%17635 = load i32, i32* %3
%17636 = xor i32 %17635, 81954
store i32 %17636, i32* %3
%17637 = load i32, i32* %3
%17638 = srem i32 %17637, 268435443
store i32 %17638, i32* %3
%17639 = load i32, i32* %3
%17640 = add nsw i32 %17639, 6
store i32 %17640, i32* %3
%17641 = load i32, i32* %3
%17642 = mul nsw i32 %17641, 10
store i32 %17642, i32* %3
%17643 = load i32, i32* %3
%17644 = add nsw i32 %17643, 1
store i32 %17644, i32* %3
%17645 = load i32, i32* %3
%17646 = mul nsw i32 %17645, 2
store i32 %17646, i32* %3
%17647 = load i32, i32* %3
%17648 = sub nsw i32 %17647, 1
store i32 %17648, i32* %3
%17649 = load i32, i32* %3
%17650 = and i32 %17649, -1044481
store i32 %17650, i32* %3
%17651 = load i32, i32* %3
%17652 = xor i32 %17651, 81954
store i32 %17652, i32* %3
%17653 = load i32, i32* %3
%17654 = srem i32 %17653, 268435443
store i32 %17654, i32* %3
%17655 = load i32, i32* %3
%17656 = add nsw i32 %17655, 6
store i32 %17656, i32* %3
%17657 = load i32, i32* %3
%17658 = mul nsw i32 %17657, 10
store i32 %17658, i32* %3
%17659 = load i32, i32* %3
%17660 = add nsw i32 %17659, 1
store i32 %17660, i32* %3
%17661 = load i32, i32* %3
%17662 = mul nsw i32 %17661, 2
store i32 %17662, i32* %3
%17663 = load i32, i32* %3
%17664 = sub nsw i32 %17663, 1
store i32 %17664, i32* %3
%17665 = load i32, i32* %3
%17666 = and i32 %17665, -1044481
store i32 %17666, i32* %3
%17667 = load i32, i32* %3
%17668 = xor i32 %17667, 81954
store i32 %17668, i32* %3
%17669 = load i32, i32* %3
%17670 = srem i32 %17669, 268435443
store i32 %17670, i32* %3
%17671 = load i32, i32* %3
%17672 = add nsw i32 %17671, 6
store i32 %17672, i32* %3
%17673 = load i32, i32* %3
%17674 = mul nsw i32 %17673, 10
store i32 %17674, i32* %3
%17675 = load i32, i32* %3
%17676 = add nsw i32 %17675, 1
store i32 %17676, i32* %3
%17677 = load i32, i32* %3
%17678 = mul nsw i32 %17677, 2
store i32 %17678, i32* %3
%17679 = load i32, i32* %3
%17680 = sub nsw i32 %17679, 1
store i32 %17680, i32* %3
%17681 = load i32, i32* %3
%17682 = and i32 %17681, -1044481
store i32 %17682, i32* %3
%17683 = load i32, i32* %3
%17684 = xor i32 %17683, 81954
store i32 %17684, i32* %3
%17685 = load i32, i32* %3
%17686 = srem i32 %17685, 268435443
store i32 %17686, i32* %3
%17687 = load i32, i32* %3
%17688 = add nsw i32 %17687, 6
store i32 %17688, i32* %3
%17689 = load i32, i32* %3
%17690 = mul nsw i32 %17689, 10
store i32 %17690, i32* %3
%17691 = load i32, i32* %3
%17692 = add nsw i32 %17691, 1
store i32 %17692, i32* %3
%17693 = load i32, i32* %3
%17694 = mul nsw i32 %17693, 2
store i32 %17694, i32* %3
%17695 = load i32, i32* %3
%17696 = sub nsw i32 %17695, 1
store i32 %17696, i32* %3
%17697 = load i32, i32* %3
%17698 = and i32 %17697, -1044481
store i32 %17698, i32* %3
%17699 = load i32, i32* %3
%17700 = xor i32 %17699, 81954
store i32 %17700, i32* %3
%17701 = load i32, i32* %3
%17702 = srem i32 %17701, 268435443
store i32 %17702, i32* %3
%17703 = load i32, i32* %3
%17704 = add nsw i32 %17703, 6
store i32 %17704, i32* %3
%17705 = load i32, i32* %3
%17706 = mul nsw i32 %17705, 10
store i32 %17706, i32* %3
%17707 = load i32, i32* %3
%17708 = add nsw i32 %17707, 1
store i32 %17708, i32* %3
%17709 = load i32, i32* %3
%17710 = mul nsw i32 %17709, 2
store i32 %17710, i32* %3
%17711 = load i32, i32* %3
%17712 = sub nsw i32 %17711, 1
store i32 %17712, i32* %3
%17713 = load i32, i32* %3
%17714 = and i32 %17713, -1044481
store i32 %17714, i32* %3
%17715 = load i32, i32* %3
%17716 = xor i32 %17715, 81954
store i32 %17716, i32* %3
%17717 = load i32, i32* %3
%17718 = srem i32 %17717, 268435443
store i32 %17718, i32* %3
%17719 = load i32, i32* %3
%17720 = add nsw i32 %17719, 6
store i32 %17720, i32* %3
%17721 = load i32, i32* %3
%17722 = mul nsw i32 %17721, 10
store i32 %17722, i32* %3
%17723 = load i32, i32* %3
%17724 = add nsw i32 %17723, 1
store i32 %17724, i32* %3
%17725 = load i32, i32* %3
%17726 = mul nsw i32 %17725, 2
store i32 %17726, i32* %3
%17727 = load i32, i32* %3
%17728 = sub nsw i32 %17727, 1
store i32 %17728, i32* %3
%17729 = load i32, i32* %3
%17730 = and i32 %17729, -1044481
store i32 %17730, i32* %3
%17731 = load i32, i32* %3
%17732 = xor i32 %17731, 81954
store i32 %17732, i32* %3
%17733 = load i32, i32* %3
%17734 = srem i32 %17733, 268435443
store i32 %17734, i32* %3
%17735 = load i32, i32* %3
%17736 = add nsw i32 %17735, 6
store i32 %17736, i32* %3
%17737 = load i32, i32* %3
%17738 = mul nsw i32 %17737, 10
store i32 %17738, i32* %3
%17739 = load i32, i32* %3
%17740 = add nsw i32 %17739, 1
store i32 %17740, i32* %3
%17741 = load i32, i32* %3
%17742 = mul nsw i32 %17741, 2
store i32 %17742, i32* %3
%17743 = load i32, i32* %3
%17744 = sub nsw i32 %17743, 1
store i32 %17744, i32* %3
%17745 = load i32, i32* %3
%17746 = and i32 %17745, -1044481
store i32 %17746, i32* %3
%17747 = load i32, i32* %3
%17748 = xor i32 %17747, 81954
store i32 %17748, i32* %3
%17749 = load i32, i32* %3
%17750 = srem i32 %17749, 268435443
store i32 %17750, i32* %3
%17751 = load i32, i32* %3
%17752 = add nsw i32 %17751, 6
store i32 %17752, i32* %3
%17753 = load i32, i32* %3
%17754 = mul nsw i32 %17753, 10
store i32 %17754, i32* %3
%17755 = load i32, i32* %3
%17756 = add nsw i32 %17755, 1
store i32 %17756, i32* %3
%17757 = load i32, i32* %3
%17758 = mul nsw i32 %17757, 2
store i32 %17758, i32* %3
%17759 = load i32, i32* %3
%17760 = sub nsw i32 %17759, 1
store i32 %17760, i32* %3
%17761 = load i32, i32* %3
%17762 = and i32 %17761, -1044481
store i32 %17762, i32* %3
%17763 = load i32, i32* %3
%17764 = xor i32 %17763, 81954
store i32 %17764, i32* %3
%17765 = load i32, i32* %3
%17766 = srem i32 %17765, 268435443
store i32 %17766, i32* %3
%17767 = load i32, i32* %3
%17768 = add nsw i32 %17767, 6
store i32 %17768, i32* %3
%17769 = load i32, i32* %3
%17770 = mul nsw i32 %17769, 10
store i32 %17770, i32* %3
%17771 = load i32, i32* %3
%17772 = add nsw i32 %17771, 1
store i32 %17772, i32* %3
%17773 = load i32, i32* %3
%17774 = mul nsw i32 %17773, 2
store i32 %17774, i32* %3
%17775 = load i32, i32* %3
%17776 = sub nsw i32 %17775, 1
store i32 %17776, i32* %3
%17777 = load i32, i32* %3
%17778 = and i32 %17777, -1044481
store i32 %17778, i32* %3
%17779 = load i32, i32* %3
%17780 = xor i32 %17779, 81954
store i32 %17780, i32* %3
%17781 = load i32, i32* %3
%17782 = srem i32 %17781, 268435443
store i32 %17782, i32* %3
%17783 = load i32, i32* %3
%17784 = add nsw i32 %17783, 6
store i32 %17784, i32* %3
%17785 = load i32, i32* %3
%17786 = mul nsw i32 %17785, 10
store i32 %17786, i32* %3
%17787 = load i32, i32* %3
%17788 = add nsw i32 %17787, 1
store i32 %17788, i32* %3
%17789 = load i32, i32* %3
%17790 = mul nsw i32 %17789, 2
store i32 %17790, i32* %3
%17791 = load i32, i32* %3
%17792 = sub nsw i32 %17791, 1
store i32 %17792, i32* %3
%17793 = load i32, i32* %3
%17794 = and i32 %17793, -1044481
store i32 %17794, i32* %3
%17795 = load i32, i32* %3
%17796 = xor i32 %17795, 81954
store i32 %17796, i32* %3
%17797 = load i32, i32* %3
%17798 = srem i32 %17797, 268435443
store i32 %17798, i32* %3
%17799 = load i32, i32* %3
%17800 = add nsw i32 %17799, 6
store i32 %17800, i32* %3
%17801 = load i32, i32* %3
%17802 = mul nsw i32 %17801, 10
store i32 %17802, i32* %3
%17803 = load i32, i32* %3
%17804 = add nsw i32 %17803, 1
store i32 %17804, i32* %3
%17805 = load i32, i32* %3
%17806 = mul nsw i32 %17805, 2
store i32 %17806, i32* %3
%17807 = load i32, i32* %3
%17808 = sub nsw i32 %17807, 1
store i32 %17808, i32* %3
%17809 = load i32, i32* %3
%17810 = and i32 %17809, -1044481
store i32 %17810, i32* %3
%17811 = load i32, i32* %3
%17812 = xor i32 %17811, 81954
store i32 %17812, i32* %3
%17813 = load i32, i32* %3
%17814 = srem i32 %17813, 268435443
store i32 %17814, i32* %3
%17815 = load i32, i32* %3
%17816 = add nsw i32 %17815, 6
store i32 %17816, i32* %3
%17817 = load i32, i32* %3
%17818 = mul nsw i32 %17817, 10
store i32 %17818, i32* %3
%17819 = load i32, i32* %3
%17820 = add nsw i32 %17819, 1
store i32 %17820, i32* %3
%17821 = load i32, i32* %3
%17822 = mul nsw i32 %17821, 2
store i32 %17822, i32* %3
%17823 = load i32, i32* %3
%17824 = sub nsw i32 %17823, 1
store i32 %17824, i32* %3
%17825 = load i32, i32* %3
%17826 = and i32 %17825, -1044481
store i32 %17826, i32* %3
%17827 = load i32, i32* %3
%17828 = xor i32 %17827, 81954
store i32 %17828, i32* %3
%17829 = load i32, i32* %3
%17830 = srem i32 %17829, 268435443
store i32 %17830, i32* %3
%17831 = load i32, i32* %3
%17832 = add nsw i32 %17831, 6
store i32 %17832, i32* %3
%17833 = load i32, i32* %3
%17834 = mul nsw i32 %17833, 10
store i32 %17834, i32* %3
%17835 = load i32, i32* %3
%17836 = add nsw i32 %17835, 1
store i32 %17836, i32* %3
%17837 = load i32, i32* %3
%17838 = mul nsw i32 %17837, 2
store i32 %17838, i32* %3
%17839 = load i32, i32* %3
%17840 = sub nsw i32 %17839, 1
store i32 %17840, i32* %3
%17841 = load i32, i32* %3
%17842 = and i32 %17841, -1044481
store i32 %17842, i32* %3
%17843 = load i32, i32* %3
%17844 = xor i32 %17843, 81954
store i32 %17844, i32* %3
%17845 = load i32, i32* %3
%17846 = srem i32 %17845, 268435443
store i32 %17846, i32* %3
%17847 = load i32, i32* %3
%17848 = add nsw i32 %17847, 6
store i32 %17848, i32* %3
%17849 = load i32, i32* %3
%17850 = mul nsw i32 %17849, 10
store i32 %17850, i32* %3
%17851 = load i32, i32* %3
%17852 = add nsw i32 %17851, 1
store i32 %17852, i32* %3
%17853 = load i32, i32* %3
%17854 = mul nsw i32 %17853, 2
store i32 %17854, i32* %3
%17855 = load i32, i32* %3
%17856 = sub nsw i32 %17855, 1
store i32 %17856, i32* %3
%17857 = load i32, i32* %3
%17858 = and i32 %17857, -1044481
store i32 %17858, i32* %3
%17859 = load i32, i32* %3
%17860 = xor i32 %17859, 81954
store i32 %17860, i32* %3
%17861 = load i32, i32* %3
%17862 = srem i32 %17861, 268435443
store i32 %17862, i32* %3
%17863 = load i32, i32* %3
%17864 = add nsw i32 %17863, 6
store i32 %17864, i32* %3
%17865 = load i32, i32* %3
%17866 = mul nsw i32 %17865, 10
store i32 %17866, i32* %3
%17867 = load i32, i32* %3
%17868 = add nsw i32 %17867, 1
store i32 %17868, i32* %3
%17869 = load i32, i32* %3
%17870 = mul nsw i32 %17869, 2
store i32 %17870, i32* %3
%17871 = load i32, i32* %3
%17872 = sub nsw i32 %17871, 1
store i32 %17872, i32* %3
%17873 = load i32, i32* %3
%17874 = and i32 %17873, -1044481
store i32 %17874, i32* %3
%17875 = load i32, i32* %3
%17876 = xor i32 %17875, 81954
store i32 %17876, i32* %3
%17877 = load i32, i32* %3
%17878 = srem i32 %17877, 268435443
store i32 %17878, i32* %3
%17879 = load i32, i32* %3
%17880 = add nsw i32 %17879, 6
store i32 %17880, i32* %3
%17881 = load i32, i32* %3
%17882 = mul nsw i32 %17881, 10
store i32 %17882, i32* %3
%17883 = load i32, i32* %3
%17884 = add nsw i32 %17883, 1
store i32 %17884, i32* %3
%17885 = load i32, i32* %3
%17886 = mul nsw i32 %17885, 2
store i32 %17886, i32* %3
%17887 = load i32, i32* %3
%17888 = sub nsw i32 %17887, 1
store i32 %17888, i32* %3
%17889 = load i32, i32* %3
%17890 = and i32 %17889, -1044481
store i32 %17890, i32* %3
%17891 = load i32, i32* %3
%17892 = xor i32 %17891, 81954
store i32 %17892, i32* %3
%17893 = load i32, i32* %3
%17894 = srem i32 %17893, 268435443
store i32 %17894, i32* %3
%17895 = load i32, i32* %3
%17896 = add nsw i32 %17895, 6
store i32 %17896, i32* %3
%17897 = load i32, i32* %3
%17898 = mul nsw i32 %17897, 10
store i32 %17898, i32* %3
%17899 = load i32, i32* %3
%17900 = add nsw i32 %17899, 1
store i32 %17900, i32* %3
%17901 = load i32, i32* %3
%17902 = mul nsw i32 %17901, 2
store i32 %17902, i32* %3
%17903 = load i32, i32* %3
%17904 = sub nsw i32 %17903, 1
store i32 %17904, i32* %3
%17905 = load i32, i32* %3
%17906 = and i32 %17905, -1044481
store i32 %17906, i32* %3
%17907 = load i32, i32* %3
%17908 = xor i32 %17907, 81954
store i32 %17908, i32* %3
%17909 = load i32, i32* %3
%17910 = srem i32 %17909, 268435443
store i32 %17910, i32* %3
%17911 = load i32, i32* %3
%17912 = add nsw i32 %17911, 6
store i32 %17912, i32* %3
%17913 = load i32, i32* %3
%17914 = mul nsw i32 %17913, 10
store i32 %17914, i32* %3
%17915 = load i32, i32* %3
%17916 = add nsw i32 %17915, 1
store i32 %17916, i32* %3
%17917 = load i32, i32* %3
%17918 = mul nsw i32 %17917, 2
store i32 %17918, i32* %3
%17919 = load i32, i32* %3
%17920 = sub nsw i32 %17919, 1
store i32 %17920, i32* %3
%17921 = load i32, i32* %3
%17922 = and i32 %17921, -1044481
store i32 %17922, i32* %3
%17923 = load i32, i32* %3
%17924 = xor i32 %17923, 81954
store i32 %17924, i32* %3
%17925 = load i32, i32* %3
%17926 = srem i32 %17925, 268435443
store i32 %17926, i32* %3
%17927 = load i32, i32* %3
%17928 = add nsw i32 %17927, 6
store i32 %17928, i32* %3
%17929 = load i32, i32* %3
%17930 = mul nsw i32 %17929, 10
store i32 %17930, i32* %3
%17931 = load i32, i32* %3
%17932 = add nsw i32 %17931, 1
store i32 %17932, i32* %3
%17933 = load i32, i32* %3
%17934 = mul nsw i32 %17933, 2
store i32 %17934, i32* %3
%17935 = load i32, i32* %3
%17936 = sub nsw i32 %17935, 1
store i32 %17936, i32* %3
%17937 = load i32, i32* %3
%17938 = and i32 %17937, -1044481
store i32 %17938, i32* %3
%17939 = load i32, i32* %3
%17940 = xor i32 %17939, 81954
store i32 %17940, i32* %3
%17941 = load i32, i32* %3
%17942 = srem i32 %17941, 268435443
store i32 %17942, i32* %3
%17943 = load i32, i32* %3
%17944 = add nsw i32 %17943, 6
store i32 %17944, i32* %3
%17945 = load i32, i32* %3
%17946 = mul nsw i32 %17945, 10
store i32 %17946, i32* %3
%17947 = load i32, i32* %3
%17948 = add nsw i32 %17947, 1
store i32 %17948, i32* %3
%17949 = load i32, i32* %3
%17950 = mul nsw i32 %17949, 2
store i32 %17950, i32* %3
%17951 = load i32, i32* %3
%17952 = sub nsw i32 %17951, 1
store i32 %17952, i32* %3
%17953 = load i32, i32* %3
%17954 = and i32 %17953, -1044481
store i32 %17954, i32* %3
%17955 = load i32, i32* %3
%17956 = xor i32 %17955, 81954
store i32 %17956, i32* %3
%17957 = load i32, i32* %3
%17958 = srem i32 %17957, 268435443
store i32 %17958, i32* %3
%17959 = load i32, i32* %3
%17960 = add nsw i32 %17959, 6
store i32 %17960, i32* %3
%17961 = load i32, i32* %3
%17962 = mul nsw i32 %17961, 10
store i32 %17962, i32* %3
%17963 = load i32, i32* %3
%17964 = add nsw i32 %17963, 1
store i32 %17964, i32* %3
%17965 = load i32, i32* %3
%17966 = mul nsw i32 %17965, 2
store i32 %17966, i32* %3
%17967 = load i32, i32* %3
%17968 = sub nsw i32 %17967, 1
store i32 %17968, i32* %3
%17969 = load i32, i32* %3
%17970 = and i32 %17969, -1044481
store i32 %17970, i32* %3
%17971 = load i32, i32* %3
%17972 = xor i32 %17971, 81954
store i32 %17972, i32* %3
%17973 = load i32, i32* %3
%17974 = srem i32 %17973, 268435443
store i32 %17974, i32* %3
%17975 = load i32, i32* %3
%17976 = add nsw i32 %17975, 6
store i32 %17976, i32* %3
%17977 = load i32, i32* %3
%17978 = mul nsw i32 %17977, 10
store i32 %17978, i32* %3
%17979 = load i32, i32* %3
%17980 = add nsw i32 %17979, 1
store i32 %17980, i32* %3
%17981 = load i32, i32* %3
%17982 = mul nsw i32 %17981, 2
store i32 %17982, i32* %3
%17983 = load i32, i32* %3
%17984 = sub nsw i32 %17983, 1
store i32 %17984, i32* %3
%17985 = load i32, i32* %3
%17986 = and i32 %17985, -1044481
store i32 %17986, i32* %3
%17987 = load i32, i32* %3
%17988 = xor i32 %17987, 81954
store i32 %17988, i32* %3
%17989 = load i32, i32* %3
%17990 = srem i32 %17989, 268435443
store i32 %17990, i32* %3
%17991 = load i32, i32* %3
%17992 = add nsw i32 %17991, 6
store i32 %17992, i32* %3
%17993 = load i32, i32* %3
%17994 = mul nsw i32 %17993, 10
store i32 %17994, i32* %3
%17995 = load i32, i32* %3
%17996 = add nsw i32 %17995, 1
store i32 %17996, i32* %3
%17997 = load i32, i32* %3
%17998 = mul nsw i32 %17997, 2
store i32 %17998, i32* %3
%17999 = load i32, i32* %3
%18000 = sub nsw i32 %17999, 1
store i32 %18000, i32* %3
%18001 = load i32, i32* %3
%18002 = and i32 %18001, -1044481
store i32 %18002, i32* %3
%18003 = load i32, i32* %3
%18004 = xor i32 %18003, 81954
store i32 %18004, i32* %3
%18005 = load i32, i32* %3
%18006 = srem i32 %18005, 268435443
store i32 %18006, i32* %3
%18007 = load i32, i32* %3
%18008 = add nsw i32 %18007, 6
store i32 %18008, i32* %3
%18009 = load i32, i32* %3
%18010 = mul nsw i32 %18009, 10
store i32 %18010, i32* %3
%18011 = load i32, i32* %3
%18012 = add nsw i32 %18011, 1
store i32 %18012, i32* %3
%18013 = load i32, i32* %3
%18014 = mul nsw i32 %18013, 2
store i32 %18014, i32* %3
%18015 = load i32, i32* %3
%18016 = sub nsw i32 %18015, 1
store i32 %18016, i32* %3
%18017 = load i32, i32* %3
%18018 = and i32 %18017, -1044481
store i32 %18018, i32* %3
%18019 = load i32, i32* %3
%18020 = xor i32 %18019, 81954
store i32 %18020, i32* %3
%18021 = load i32, i32* %3
%18022 = srem i32 %18021, 268435443
store i32 %18022, i32* %3
%18023 = load i32, i32* %3
%18024 = add nsw i32 %18023, 6
store i32 %18024, i32* %3
%18025 = load i32, i32* %3
%18026 = mul nsw i32 %18025, 10
store i32 %18026, i32* %3
%18027 = load i32, i32* %3
%18028 = add nsw i32 %18027, 1
store i32 %18028, i32* %3
%18029 = load i32, i32* %3
%18030 = mul nsw i32 %18029, 2
store i32 %18030, i32* %3
%18031 = load i32, i32* %3
%18032 = sub nsw i32 %18031, 1
store i32 %18032, i32* %3
%18033 = load i32, i32* %3
%18034 = and i32 %18033, -1044481
store i32 %18034, i32* %3
%18035 = load i32, i32* %3
%18036 = xor i32 %18035, 81954
store i32 %18036, i32* %3
%18037 = load i32, i32* %3
%18038 = srem i32 %18037, 268435443
store i32 %18038, i32* %3
%18039 = load i32, i32* %3
%18040 = add nsw i32 %18039, 6
store i32 %18040, i32* %3
%18041 = load i32, i32* %3
%18042 = mul nsw i32 %18041, 10
store i32 %18042, i32* %3
%18043 = load i32, i32* %3
%18044 = add nsw i32 %18043, 1
store i32 %18044, i32* %3
%18045 = load i32, i32* %3
%18046 = mul nsw i32 %18045, 2
store i32 %18046, i32* %3
%18047 = load i32, i32* %3
%18048 = sub nsw i32 %18047, 1
store i32 %18048, i32* %3
%18049 = load i32, i32* %3
%18050 = and i32 %18049, -1044481
store i32 %18050, i32* %3
%18051 = load i32, i32* %3
%18052 = xor i32 %18051, 81954
store i32 %18052, i32* %3
%18053 = load i32, i32* %3
%18054 = srem i32 %18053, 268435443
store i32 %18054, i32* %3
%18055 = load i32, i32* %3
%18056 = add nsw i32 %18055, 6
store i32 %18056, i32* %3
%18057 = load i32, i32* %3
%18058 = mul nsw i32 %18057, 10
store i32 %18058, i32* %3
%18059 = load i32, i32* %3
%18060 = add nsw i32 %18059, 1
store i32 %18060, i32* %3
%18061 = load i32, i32* %3
%18062 = mul nsw i32 %18061, 2
store i32 %18062, i32* %3
%18063 = load i32, i32* %3
%18064 = sub nsw i32 %18063, 1
store i32 %18064, i32* %3
%18065 = load i32, i32* %3
%18066 = and i32 %18065, -1044481
store i32 %18066, i32* %3
%18067 = load i32, i32* %3
%18068 = xor i32 %18067, 81954
store i32 %18068, i32* %3
%18069 = load i32, i32* %3
%18070 = srem i32 %18069, 268435443
store i32 %18070, i32* %3
%18071 = load i32, i32* %3
%18072 = add nsw i32 %18071, 6
store i32 %18072, i32* %3
%18073 = load i32, i32* %3
%18074 = mul nsw i32 %18073, 10
store i32 %18074, i32* %3
%18075 = load i32, i32* %3
%18076 = add nsw i32 %18075, 1
store i32 %18076, i32* %3
%18077 = load i32, i32* %3
%18078 = mul nsw i32 %18077, 2
store i32 %18078, i32* %3
%18079 = load i32, i32* %3
%18080 = sub nsw i32 %18079, 1
store i32 %18080, i32* %3
%18081 = load i32, i32* %3
%18082 = and i32 %18081, -1044481
store i32 %18082, i32* %3
%18083 = load i32, i32* %3
%18084 = xor i32 %18083, 81954
store i32 %18084, i32* %3
%18085 = load i32, i32* %3
%18086 = srem i32 %18085, 268435443
store i32 %18086, i32* %3
%18087 = load i32, i32* %3
%18088 = add nsw i32 %18087, 6
store i32 %18088, i32* %3
%18089 = load i32, i32* %3
%18090 = mul nsw i32 %18089, 10
store i32 %18090, i32* %3
%18091 = load i32, i32* %3
%18092 = add nsw i32 %18091, 1
store i32 %18092, i32* %3
%18093 = load i32, i32* %3
%18094 = mul nsw i32 %18093, 2
store i32 %18094, i32* %3
%18095 = load i32, i32* %3
%18096 = sub nsw i32 %18095, 1
store i32 %18096, i32* %3
%18097 = load i32, i32* %3
%18098 = and i32 %18097, -1044481
store i32 %18098, i32* %3
%18099 = load i32, i32* %3
%18100 = xor i32 %18099, 81954
store i32 %18100, i32* %3
%18101 = load i32, i32* %3
%18102 = srem i32 %18101, 268435443
store i32 %18102, i32* %3
%18103 = load i32, i32* %3
%18104 = add nsw i32 %18103, 6
store i32 %18104, i32* %3
%18105 = load i32, i32* %3
%18106 = mul nsw i32 %18105, 10
store i32 %18106, i32* %3
%18107 = load i32, i32* %3
%18108 = add nsw i32 %18107, 1
store i32 %18108, i32* %3
%18109 = load i32, i32* %3
%18110 = mul nsw i32 %18109, 2
store i32 %18110, i32* %3
%18111 = load i32, i32* %3
%18112 = sub nsw i32 %18111, 1
store i32 %18112, i32* %3
%18113 = load i32, i32* %3
%18114 = and i32 %18113, -1044481
store i32 %18114, i32* %3
%18115 = load i32, i32* %3
%18116 = xor i32 %18115, 81954
store i32 %18116, i32* %3
%18117 = load i32, i32* %3
%18118 = srem i32 %18117, 268435443
store i32 %18118, i32* %3
%18119 = load i32, i32* %3
%18120 = add nsw i32 %18119, 6
store i32 %18120, i32* %3
%18121 = load i32, i32* %3
%18122 = mul nsw i32 %18121, 10
store i32 %18122, i32* %3
%18123 = load i32, i32* %3
%18124 = add nsw i32 %18123, 1
store i32 %18124, i32* %3
%18125 = load i32, i32* %3
%18126 = mul nsw i32 %18125, 2
store i32 %18126, i32* %3
%18127 = load i32, i32* %3
%18128 = sub nsw i32 %18127, 1
store i32 %18128, i32* %3
%18129 = load i32, i32* %3
%18130 = and i32 %18129, -1044481
store i32 %18130, i32* %3
%18131 = load i32, i32* %3
%18132 = xor i32 %18131, 81954
store i32 %18132, i32* %3
%18133 = load i32, i32* %3
%18134 = srem i32 %18133, 268435443
store i32 %18134, i32* %3
%18135 = load i32, i32* %3
%18136 = add nsw i32 %18135, 6
store i32 %18136, i32* %3
%18137 = load i32, i32* %3
%18138 = mul nsw i32 %18137, 10
store i32 %18138, i32* %3
%18139 = load i32, i32* %3
%18140 = add nsw i32 %18139, 1
store i32 %18140, i32* %3
%18141 = load i32, i32* %3
%18142 = mul nsw i32 %18141, 2
store i32 %18142, i32* %3
%18143 = load i32, i32* %3
%18144 = sub nsw i32 %18143, 1
store i32 %18144, i32* %3
%18145 = load i32, i32* %3
%18146 = and i32 %18145, -1044481
store i32 %18146, i32* %3
%18147 = load i32, i32* %3
%18148 = xor i32 %18147, 81954
store i32 %18148, i32* %3
%18149 = load i32, i32* %3
%18150 = srem i32 %18149, 268435443
store i32 %18150, i32* %3
%18151 = load i32, i32* %3
%18152 = add nsw i32 %18151, 6
store i32 %18152, i32* %3
%18153 = load i32, i32* %3
%18154 = mul nsw i32 %18153, 10
store i32 %18154, i32* %3
%18155 = load i32, i32* %3
%18156 = add nsw i32 %18155, 1
store i32 %18156, i32* %3
%18157 = load i32, i32* %3
%18158 = mul nsw i32 %18157, 2
store i32 %18158, i32* %3
%18159 = load i32, i32* %3
%18160 = sub nsw i32 %18159, 1
store i32 %18160, i32* %3
%18161 = load i32, i32* %3
%18162 = and i32 %18161, -1044481
store i32 %18162, i32* %3
%18163 = load i32, i32* %3
%18164 = xor i32 %18163, 81954
store i32 %18164, i32* %3
%18165 = load i32, i32* %3
%18166 = srem i32 %18165, 268435443
store i32 %18166, i32* %3
%18167 = load i32, i32* %3
%18168 = add nsw i32 %18167, 6
store i32 %18168, i32* %3
%18169 = load i32, i32* %3
%18170 = mul nsw i32 %18169, 10
store i32 %18170, i32* %3
%18171 = load i32, i32* %3
%18172 = add nsw i32 %18171, 1
store i32 %18172, i32* %3
%18173 = load i32, i32* %3
%18174 = mul nsw i32 %18173, 2
store i32 %18174, i32* %3
%18175 = load i32, i32* %3
%18176 = sub nsw i32 %18175, 1
store i32 %18176, i32* %3
%18177 = load i32, i32* %3
%18178 = and i32 %18177, -1044481
store i32 %18178, i32* %3
%18179 = load i32, i32* %3
%18180 = xor i32 %18179, 81954
store i32 %18180, i32* %3
%18181 = load i32, i32* %3
%18182 = srem i32 %18181, 268435443
store i32 %18182, i32* %3
%18183 = load i32, i32* %3
%18184 = add nsw i32 %18183, 6
store i32 %18184, i32* %3
%18185 = load i32, i32* %3
%18186 = mul nsw i32 %18185, 10
store i32 %18186, i32* %3
%18187 = load i32, i32* %3
%18188 = add nsw i32 %18187, 1
store i32 %18188, i32* %3
%18189 = load i32, i32* %3
%18190 = mul nsw i32 %18189, 2
store i32 %18190, i32* %3
%18191 = load i32, i32* %3
%18192 = sub nsw i32 %18191, 1
store i32 %18192, i32* %3
%18193 = load i32, i32* %3
%18194 = and i32 %18193, -1044481
store i32 %18194, i32* %3
%18195 = load i32, i32* %3
%18196 = xor i32 %18195, 81954
store i32 %18196, i32* %3
%18197 = load i32, i32* %3
%18198 = srem i32 %18197, 268435443
store i32 %18198, i32* %3
%18199 = load i32, i32* %3
%18200 = add nsw i32 %18199, 6
store i32 %18200, i32* %3
%18201 = load i32, i32* %3
%18202 = mul nsw i32 %18201, 10
store i32 %18202, i32* %3
%18203 = load i32, i32* %3
%18204 = add nsw i32 %18203, 1
store i32 %18204, i32* %3
%18205 = load i32, i32* %3
%18206 = mul nsw i32 %18205, 2
store i32 %18206, i32* %3
%18207 = load i32, i32* %3
%18208 = sub nsw i32 %18207, 1
store i32 %18208, i32* %3
%18209 = load i32, i32* %3
%18210 = and i32 %18209, -1044481
store i32 %18210, i32* %3
%18211 = load i32, i32* %3
%18212 = xor i32 %18211, 81954
store i32 %18212, i32* %3
%18213 = load i32, i32* %3
%18214 = srem i32 %18213, 268435443
store i32 %18214, i32* %3
%18215 = load i32, i32* %3
%18216 = add nsw i32 %18215, 6
store i32 %18216, i32* %3
%18217 = load i32, i32* %3
%18218 = mul nsw i32 %18217, 10
store i32 %18218, i32* %3
%18219 = load i32, i32* %3
%18220 = add nsw i32 %18219, 1
store i32 %18220, i32* %3
%18221 = load i32, i32* %3
%18222 = mul nsw i32 %18221, 2
store i32 %18222, i32* %3
%18223 = load i32, i32* %3
%18224 = sub nsw i32 %18223, 1
store i32 %18224, i32* %3
%18225 = load i32, i32* %3
%18226 = and i32 %18225, -1044481
store i32 %18226, i32* %3
%18227 = load i32, i32* %3
%18228 = xor i32 %18227, 81954
store i32 %18228, i32* %3
%18229 = load i32, i32* %3
%18230 = srem i32 %18229, 268435443
store i32 %18230, i32* %3
%18231 = load i32, i32* %3
%18232 = add nsw i32 %18231, 6
store i32 %18232, i32* %3
%18233 = load i32, i32* %3
%18234 = mul nsw i32 %18233, 10
store i32 %18234, i32* %3
%18235 = load i32, i32* %3
%18236 = add nsw i32 %18235, 1
store i32 %18236, i32* %3
%18237 = load i32, i32* %3
%18238 = mul nsw i32 %18237, 2
store i32 %18238, i32* %3
%18239 = load i32, i32* %3
%18240 = sub nsw i32 %18239, 1
store i32 %18240, i32* %3
%18241 = load i32, i32* %3
%18242 = and i32 %18241, -1044481
store i32 %18242, i32* %3
%18243 = load i32, i32* %3
%18244 = xor i32 %18243, 81954
store i32 %18244, i32* %3
%18245 = load i32, i32* %3
%18246 = srem i32 %18245, 268435443
store i32 %18246, i32* %3
%18247 = load i32, i32* %3
%18248 = add nsw i32 %18247, 6
store i32 %18248, i32* %3
%18249 = load i32, i32* %3
%18250 = mul nsw i32 %18249, 10
store i32 %18250, i32* %3
%18251 = load i32, i32* %3
%18252 = add nsw i32 %18251, 1
store i32 %18252, i32* %3
%18253 = load i32, i32* %3
%18254 = mul nsw i32 %18253, 2
store i32 %18254, i32* %3
%18255 = load i32, i32* %3
%18256 = sub nsw i32 %18255, 1
store i32 %18256, i32* %3
%18257 = load i32, i32* %3
%18258 = and i32 %18257, -1044481
store i32 %18258, i32* %3
%18259 = load i32, i32* %3
%18260 = xor i32 %18259, 81954
store i32 %18260, i32* %3
%18261 = load i32, i32* %3
%18262 = srem i32 %18261, 268435443
store i32 %18262, i32* %3
%18263 = load i32, i32* %3
%18264 = add nsw i32 %18263, 6
store i32 %18264, i32* %3
%18265 = load i32, i32* %3
%18266 = mul nsw i32 %18265, 10
store i32 %18266, i32* %3
%18267 = load i32, i32* %3
%18268 = add nsw i32 %18267, 1
store i32 %18268, i32* %3
%18269 = load i32, i32* %3
%18270 = mul nsw i32 %18269, 2
store i32 %18270, i32* %3
%18271 = load i32, i32* %3
%18272 = sub nsw i32 %18271, 1
store i32 %18272, i32* %3
%18273 = load i32, i32* %3
%18274 = and i32 %18273, -1044481
store i32 %18274, i32* %3
%18275 = load i32, i32* %3
%18276 = xor i32 %18275, 81954
store i32 %18276, i32* %3
%18277 = load i32, i32* %3
%18278 = srem i32 %18277, 268435443
store i32 %18278, i32* %3
%18279 = load i32, i32* %3
%18280 = add nsw i32 %18279, 6
store i32 %18280, i32* %3
%18281 = load i32, i32* %3
%18282 = mul nsw i32 %18281, 10
store i32 %18282, i32* %3
%18283 = load i32, i32* %3
%18284 = add nsw i32 %18283, 1
store i32 %18284, i32* %3
%18285 = load i32, i32* %3
%18286 = mul nsw i32 %18285, 2
store i32 %18286, i32* %3
%18287 = load i32, i32* %3
%18288 = sub nsw i32 %18287, 1
store i32 %18288, i32* %3
%18289 = load i32, i32* %3
%18290 = and i32 %18289, -1044481
store i32 %18290, i32* %3
%18291 = load i32, i32* %3
%18292 = xor i32 %18291, 81954
store i32 %18292, i32* %3
%18293 = load i32, i32* %3
%18294 = srem i32 %18293, 268435443
store i32 %18294, i32* %3
%18295 = load i32, i32* %3
%18296 = add nsw i32 %18295, 6
store i32 %18296, i32* %3
%18297 = load i32, i32* %3
%18298 = mul nsw i32 %18297, 10
store i32 %18298, i32* %3
%18299 = load i32, i32* %3
%18300 = add nsw i32 %18299, 1
store i32 %18300, i32* %3
%18301 = load i32, i32* %3
%18302 = mul nsw i32 %18301, 2
store i32 %18302, i32* %3
%18303 = load i32, i32* %3
%18304 = sub nsw i32 %18303, 1
store i32 %18304, i32* %3
%18305 = load i32, i32* %3
%18306 = and i32 %18305, -1044481
store i32 %18306, i32* %3
%18307 = load i32, i32* %3
%18308 = xor i32 %18307, 81954
store i32 %18308, i32* %3
%18309 = load i32, i32* %3
%18310 = srem i32 %18309, 268435443
store i32 %18310, i32* %3
%18311 = load i32, i32* %3
%18312 = add nsw i32 %18311, 6
store i32 %18312, i32* %3
%18313 = load i32, i32* %3
%18314 = mul nsw i32 %18313, 10
store i32 %18314, i32* %3
%18315 = load i32, i32* %3
%18316 = add nsw i32 %18315, 1
store i32 %18316, i32* %3
%18317 = load i32, i32* %3
%18318 = mul nsw i32 %18317, 2
store i32 %18318, i32* %3
%18319 = load i32, i32* %3
%18320 = sub nsw i32 %18319, 1
store i32 %18320, i32* %3
%18321 = load i32, i32* %3
%18322 = and i32 %18321, -1044481
store i32 %18322, i32* %3
%18323 = load i32, i32* %3
%18324 = xor i32 %18323, 81954
store i32 %18324, i32* %3
%18325 = load i32, i32* %3
%18326 = srem i32 %18325, 268435443
store i32 %18326, i32* %3
%18327 = load i32, i32* %3
%18328 = add nsw i32 %18327, 6
store i32 %18328, i32* %3
%18329 = load i32, i32* %3
%18330 = mul nsw i32 %18329, 10
store i32 %18330, i32* %3
%18331 = load i32, i32* %3
%18332 = add nsw i32 %18331, 1
store i32 %18332, i32* %3
%18333 = load i32, i32* %3
%18334 = mul nsw i32 %18333, 2
store i32 %18334, i32* %3
%18335 = load i32, i32* %3
%18336 = sub nsw i32 %18335, 1
store i32 %18336, i32* %3
%18337 = load i32, i32* %3
%18338 = and i32 %18337, -1044481
store i32 %18338, i32* %3
%18339 = load i32, i32* %3
%18340 = xor i32 %18339, 81954
store i32 %18340, i32* %3
%18341 = load i32, i32* %3
%18342 = srem i32 %18341, 268435443
store i32 %18342, i32* %3
%18343 = load i32, i32* %3
%18344 = add nsw i32 %18343, 6
store i32 %18344, i32* %3
%18345 = load i32, i32* %3
%18346 = mul nsw i32 %18345, 10
store i32 %18346, i32* %3
%18347 = load i32, i32* %3
%18348 = add nsw i32 %18347, 1
store i32 %18348, i32* %3
%18349 = load i32, i32* %3
%18350 = mul nsw i32 %18349, 2
store i32 %18350, i32* %3
%18351 = load i32, i32* %3
%18352 = sub nsw i32 %18351, 1
store i32 %18352, i32* %3
%18353 = load i32, i32* %3
%18354 = and i32 %18353, -1044481
store i32 %18354, i32* %3
%18355 = load i32, i32* %3
%18356 = xor i32 %18355, 81954
store i32 %18356, i32* %3
%18357 = load i32, i32* %3
%18358 = srem i32 %18357, 268435443
store i32 %18358, i32* %3
%18359 = load i32, i32* %3
%18360 = add nsw i32 %18359, 6
store i32 %18360, i32* %3
%18361 = load i32, i32* %3
%18362 = mul nsw i32 %18361, 10
store i32 %18362, i32* %3
%18363 = load i32, i32* %3
%18364 = add nsw i32 %18363, 1
store i32 %18364, i32* %3
%18365 = load i32, i32* %3
%18366 = mul nsw i32 %18365, 2
store i32 %18366, i32* %3
%18367 = load i32, i32* %3
%18368 = sub nsw i32 %18367, 1
store i32 %18368, i32* %3
%18369 = load i32, i32* %3
%18370 = and i32 %18369, -1044481
store i32 %18370, i32* %3
%18371 = load i32, i32* %3
%18372 = xor i32 %18371, 81954
store i32 %18372, i32* %3
%18373 = load i32, i32* %3
%18374 = srem i32 %18373, 268435443
store i32 %18374, i32* %3
%18375 = load i32, i32* %3
%18376 = add nsw i32 %18375, 6
store i32 %18376, i32* %3
%18377 = load i32, i32* %3
%18378 = mul nsw i32 %18377, 10
store i32 %18378, i32* %3
%18379 = load i32, i32* %3
%18380 = add nsw i32 %18379, 1
store i32 %18380, i32* %3
%18381 = load i32, i32* %3
%18382 = mul nsw i32 %18381, 2
store i32 %18382, i32* %3
%18383 = load i32, i32* %3
%18384 = sub nsw i32 %18383, 1
store i32 %18384, i32* %3
%18385 = load i32, i32* %3
%18386 = and i32 %18385, -1044481
store i32 %18386, i32* %3
%18387 = load i32, i32* %3
%18388 = xor i32 %18387, 81954
store i32 %18388, i32* %3
%18389 = load i32, i32* %3
%18390 = srem i32 %18389, 268435443
store i32 %18390, i32* %3
%18391 = load i32, i32* %3
%18392 = add nsw i32 %18391, 6
store i32 %18392, i32* %3
%18393 = load i32, i32* %3
%18394 = mul nsw i32 %18393, 10
store i32 %18394, i32* %3
%18395 = load i32, i32* %3
%18396 = add nsw i32 %18395, 1
store i32 %18396, i32* %3
%18397 = load i32, i32* %3
%18398 = mul nsw i32 %18397, 2
store i32 %18398, i32* %3
%18399 = load i32, i32* %3
%18400 = sub nsw i32 %18399, 1
store i32 %18400, i32* %3
%18401 = load i32, i32* %3
%18402 = and i32 %18401, -1044481
store i32 %18402, i32* %3
%18403 = load i32, i32* %3
%18404 = xor i32 %18403, 81954
store i32 %18404, i32* %3
%18405 = load i32, i32* %3
%18406 = srem i32 %18405, 268435443
store i32 %18406, i32* %3
%18407 = load i32, i32* %3
%18408 = add nsw i32 %18407, 6
store i32 %18408, i32* %3
%18409 = load i32, i32* %3
%18410 = mul nsw i32 %18409, 10
store i32 %18410, i32* %3
%18411 = load i32, i32* %3
%18412 = add nsw i32 %18411, 1
store i32 %18412, i32* %3
%18413 = load i32, i32* %3
%18414 = mul nsw i32 %18413, 2
store i32 %18414, i32* %3
%18415 = load i32, i32* %3
%18416 = sub nsw i32 %18415, 1
store i32 %18416, i32* %3
%18417 = load i32, i32* %3
%18418 = and i32 %18417, -1044481
store i32 %18418, i32* %3
%18419 = load i32, i32* %3
%18420 = xor i32 %18419, 81954
store i32 %18420, i32* %3
%18421 = load i32, i32* %3
%18422 = srem i32 %18421, 268435443
store i32 %18422, i32* %3
%18423 = load i32, i32* %3
%18424 = add nsw i32 %18423, 6
store i32 %18424, i32* %3
%18425 = load i32, i32* %3
%18426 = mul nsw i32 %18425, 10
store i32 %18426, i32* %3
%18427 = load i32, i32* %3
%18428 = add nsw i32 %18427, 1
store i32 %18428, i32* %3
%18429 = load i32, i32* %3
%18430 = mul nsw i32 %18429, 2
store i32 %18430, i32* %3
%18431 = load i32, i32* %3
%18432 = sub nsw i32 %18431, 1
store i32 %18432, i32* %3
%18433 = load i32, i32* %3
%18434 = and i32 %18433, -1044481
store i32 %18434, i32* %3
%18435 = load i32, i32* %3
%18436 = xor i32 %18435, 81954
store i32 %18436, i32* %3
%18437 = load i32, i32* %3
%18438 = srem i32 %18437, 268435443
store i32 %18438, i32* %3
%18439 = load i32, i32* %3
%18440 = add nsw i32 %18439, 6
store i32 %18440, i32* %3
%18441 = load i32, i32* %3
%18442 = mul nsw i32 %18441, 10
store i32 %18442, i32* %3
%18443 = load i32, i32* %3
%18444 = add nsw i32 %18443, 1
store i32 %18444, i32* %3
%18445 = load i32, i32* %3
%18446 = mul nsw i32 %18445, 2
store i32 %18446, i32* %3
%18447 = load i32, i32* %3
%18448 = sub nsw i32 %18447, 1
store i32 %18448, i32* %3
%18449 = load i32, i32* %3
%18450 = and i32 %18449, -1044481
store i32 %18450, i32* %3
%18451 = load i32, i32* %3
%18452 = xor i32 %18451, 81954
store i32 %18452, i32* %3
%18453 = load i32, i32* %3
%18454 = srem i32 %18453, 268435443
store i32 %18454, i32* %3
%18455 = load i32, i32* %3
%18456 = add nsw i32 %18455, 6
store i32 %18456, i32* %3
%18457 = load i32, i32* %3
%18458 = mul nsw i32 %18457, 10
store i32 %18458, i32* %3
%18459 = load i32, i32* %3
%18460 = add nsw i32 %18459, 1
store i32 %18460, i32* %3
%18461 = load i32, i32* %3
%18462 = mul nsw i32 %18461, 2
store i32 %18462, i32* %3
%18463 = load i32, i32* %3
%18464 = sub nsw i32 %18463, 1
store i32 %18464, i32* %3
%18465 = load i32, i32* %3
%18466 = and i32 %18465, -1044481
store i32 %18466, i32* %3
%18467 = load i32, i32* %3
%18468 = xor i32 %18467, 81954
store i32 %18468, i32* %3
%18469 = load i32, i32* %3
%18470 = srem i32 %18469, 268435443
store i32 %18470, i32* %3
%18471 = load i32, i32* %3
%18472 = add nsw i32 %18471, 6
store i32 %18472, i32* %3
%18473 = load i32, i32* %3
%18474 = mul nsw i32 %18473, 10
store i32 %18474, i32* %3
%18475 = load i32, i32* %3
%18476 = add nsw i32 %18475, 1
store i32 %18476, i32* %3
%18477 = load i32, i32* %3
%18478 = mul nsw i32 %18477, 2
store i32 %18478, i32* %3
%18479 = load i32, i32* %3
%18480 = sub nsw i32 %18479, 1
store i32 %18480, i32* %3
%18481 = load i32, i32* %3
%18482 = and i32 %18481, -1044481
store i32 %18482, i32* %3
%18483 = load i32, i32* %3
%18484 = xor i32 %18483, 81954
store i32 %18484, i32* %3
%18485 = load i32, i32* %3
%18486 = srem i32 %18485, 268435443
store i32 %18486, i32* %3
%18487 = load i32, i32* %3
%18488 = add nsw i32 %18487, 6
store i32 %18488, i32* %3
%18489 = load i32, i32* %3
%18490 = mul nsw i32 %18489, 10
store i32 %18490, i32* %3
%18491 = load i32, i32* %3
%18492 = add nsw i32 %18491, 1
store i32 %18492, i32* %3
%18493 = load i32, i32* %3
%18494 = mul nsw i32 %18493, 2
store i32 %18494, i32* %3
%18495 = load i32, i32* %3
%18496 = sub nsw i32 %18495, 1
store i32 %18496, i32* %3
%18497 = load i32, i32* %3
%18498 = and i32 %18497, -1044481
store i32 %18498, i32* %3
%18499 = load i32, i32* %3
%18500 = xor i32 %18499, 81954
store i32 %18500, i32* %3
%18501 = load i32, i32* %3
%18502 = srem i32 %18501, 268435443
store i32 %18502, i32* %3
%18503 = load i32, i32* %3
%18504 = add nsw i32 %18503, 6
store i32 %18504, i32* %3
%18505 = load i32, i32* %3
%18506 = mul nsw i32 %18505, 10
store i32 %18506, i32* %3
%18507 = load i32, i32* %3
%18508 = add nsw i32 %18507, 1
store i32 %18508, i32* %3
%18509 = load i32, i32* %3
%18510 = mul nsw i32 %18509, 2
store i32 %18510, i32* %3
%18511 = load i32, i32* %3
%18512 = sub nsw i32 %18511, 1
store i32 %18512, i32* %3
%18513 = load i32, i32* %3
%18514 = and i32 %18513, -1044481
store i32 %18514, i32* %3
%18515 = load i32, i32* %3
%18516 = xor i32 %18515, 81954
store i32 %18516, i32* %3
%18517 = load i32, i32* %3
%18518 = srem i32 %18517, 268435443
store i32 %18518, i32* %3
%18519 = load i32, i32* %3
%18520 = add nsw i32 %18519, 6
store i32 %18520, i32* %3
%18521 = load i32, i32* %3
%18522 = mul nsw i32 %18521, 10
store i32 %18522, i32* %3
%18523 = load i32, i32* %3
%18524 = add nsw i32 %18523, 1
store i32 %18524, i32* %3
%18525 = load i32, i32* %3
%18526 = mul nsw i32 %18525, 2
store i32 %18526, i32* %3
%18527 = load i32, i32* %3
%18528 = sub nsw i32 %18527, 1
store i32 %18528, i32* %3
%18529 = load i32, i32* %3
%18530 = and i32 %18529, -1044481
store i32 %18530, i32* %3
%18531 = load i32, i32* %3
%18532 = xor i32 %18531, 81954
store i32 %18532, i32* %3
%18533 = load i32, i32* %3
%18534 = srem i32 %18533, 268435443
store i32 %18534, i32* %3
%18535 = load i32, i32* %3
%18536 = add nsw i32 %18535, 6
store i32 %18536, i32* %3
%18537 = load i32, i32* %3
%18538 = mul nsw i32 %18537, 10
store i32 %18538, i32* %3
%18539 = load i32, i32* %3
%18540 = add nsw i32 %18539, 1
store i32 %18540, i32* %3
%18541 = load i32, i32* %3
%18542 = mul nsw i32 %18541, 2
store i32 %18542, i32* %3
%18543 = load i32, i32* %3
%18544 = sub nsw i32 %18543, 1
store i32 %18544, i32* %3
%18545 = load i32, i32* %3
%18546 = and i32 %18545, -1044481
store i32 %18546, i32* %3
%18547 = load i32, i32* %3
%18548 = xor i32 %18547, 81954
store i32 %18548, i32* %3
%18549 = load i32, i32* %3
%18550 = srem i32 %18549, 268435443
store i32 %18550, i32* %3
%18551 = load i32, i32* %3
%18552 = add nsw i32 %18551, 6
store i32 %18552, i32* %3
%18553 = load i32, i32* %3
%18554 = mul nsw i32 %18553, 10
store i32 %18554, i32* %3
%18555 = load i32, i32* %3
%18556 = add nsw i32 %18555, 1
store i32 %18556, i32* %3
%18557 = load i32, i32* %3
%18558 = mul nsw i32 %18557, 2
store i32 %18558, i32* %3
%18559 = load i32, i32* %3
%18560 = sub nsw i32 %18559, 1
store i32 %18560, i32* %3
%18561 = load i32, i32* %3
%18562 = and i32 %18561, -1044481
store i32 %18562, i32* %3
%18563 = load i32, i32* %3
%18564 = xor i32 %18563, 81954
store i32 %18564, i32* %3
%18565 = load i32, i32* %3
%18566 = srem i32 %18565, 268435443
store i32 %18566, i32* %3
%18567 = load i32, i32* %3
%18568 = add nsw i32 %18567, 6
store i32 %18568, i32* %3
%18569 = load i32, i32* %3
%18570 = mul nsw i32 %18569, 10
store i32 %18570, i32* %3
%18571 = load i32, i32* %3
%18572 = add nsw i32 %18571, 1
store i32 %18572, i32* %3
%18573 = load i32, i32* %3
%18574 = mul nsw i32 %18573, 2
store i32 %18574, i32* %3
%18575 = load i32, i32* %3
%18576 = sub nsw i32 %18575, 1
store i32 %18576, i32* %3
%18577 = load i32, i32* %3
%18578 = and i32 %18577, -1044481
store i32 %18578, i32* %3
%18579 = load i32, i32* %3
%18580 = xor i32 %18579, 81954
store i32 %18580, i32* %3
%18581 = load i32, i32* %3
%18582 = srem i32 %18581, 268435443
store i32 %18582, i32* %3
%18583 = load i32, i32* %3
%18584 = add nsw i32 %18583, 6
store i32 %18584, i32* %3
%18585 = load i32, i32* %3
%18586 = mul nsw i32 %18585, 10
store i32 %18586, i32* %3
%18587 = load i32, i32* %3
%18588 = add nsw i32 %18587, 1
store i32 %18588, i32* %3
%18589 = load i32, i32* %3
%18590 = mul nsw i32 %18589, 2
store i32 %18590, i32* %3
%18591 = load i32, i32* %3
%18592 = sub nsw i32 %18591, 1
store i32 %18592, i32* %3
%18593 = load i32, i32* %3
%18594 = and i32 %18593, -1044481
store i32 %18594, i32* %3
%18595 = load i32, i32* %3
%18596 = xor i32 %18595, 81954
store i32 %18596, i32* %3
%18597 = load i32, i32* %3
%18598 = srem i32 %18597, 268435443
store i32 %18598, i32* %3
%18599 = load i32, i32* %3
%18600 = add nsw i32 %18599, 6
store i32 %18600, i32* %3
%18601 = load i32, i32* %3
%18602 = mul nsw i32 %18601, 10
store i32 %18602, i32* %3
%18603 = load i32, i32* %3
%18604 = add nsw i32 %18603, 1
store i32 %18604, i32* %3
%18605 = load i32, i32* %3
%18606 = mul nsw i32 %18605, 2
store i32 %18606, i32* %3
%18607 = load i32, i32* %3
%18608 = sub nsw i32 %18607, 1
store i32 %18608, i32* %3
%18609 = load i32, i32* %3
%18610 = and i32 %18609, -1044481
store i32 %18610, i32* %3
%18611 = load i32, i32* %3
%18612 = xor i32 %18611, 81954
store i32 %18612, i32* %3
%18613 = load i32, i32* %3
%18614 = srem i32 %18613, 268435443
store i32 %18614, i32* %3
%18615 = load i32, i32* %3
%18616 = add nsw i32 %18615, 6
store i32 %18616, i32* %3
%18617 = load i32, i32* %3
%18618 = mul nsw i32 %18617, 10
store i32 %18618, i32* %3
%18619 = load i32, i32* %3
%18620 = add nsw i32 %18619, 1
store i32 %18620, i32* %3
%18621 = load i32, i32* %3
%18622 = mul nsw i32 %18621, 2
store i32 %18622, i32* %3
%18623 = load i32, i32* %3
%18624 = sub nsw i32 %18623, 1
store i32 %18624, i32* %3
%18625 = load i32, i32* %3
%18626 = and i32 %18625, -1044481
store i32 %18626, i32* %3
%18627 = load i32, i32* %3
%18628 = xor i32 %18627, 81954
store i32 %18628, i32* %3
%18629 = load i32, i32* %3
%18630 = srem i32 %18629, 268435443
store i32 %18630, i32* %3
%18631 = load i32, i32* %3
%18632 = add nsw i32 %18631, 6
store i32 %18632, i32* %3
%18633 = load i32, i32* %3
%18634 = mul nsw i32 %18633, 10
store i32 %18634, i32* %3
%18635 = load i32, i32* %3
%18636 = add nsw i32 %18635, 1
store i32 %18636, i32* %3
%18637 = load i32, i32* %3
%18638 = mul nsw i32 %18637, 2
store i32 %18638, i32* %3
%18639 = load i32, i32* %3
%18640 = sub nsw i32 %18639, 1
store i32 %18640, i32* %3
%18641 = load i32, i32* %3
%18642 = and i32 %18641, -1044481
store i32 %18642, i32* %3
%18643 = load i32, i32* %3
%18644 = xor i32 %18643, 81954
store i32 %18644, i32* %3
%18645 = load i32, i32* %3
%18646 = srem i32 %18645, 268435443
store i32 %18646, i32* %3
%18647 = load i32, i32* %3
%18648 = add nsw i32 %18647, 6
store i32 %18648, i32* %3
%18649 = load i32, i32* %3
%18650 = mul nsw i32 %18649, 10
store i32 %18650, i32* %3
%18651 = load i32, i32* %3
%18652 = add nsw i32 %18651, 1
store i32 %18652, i32* %3
%18653 = load i32, i32* %3
%18654 = mul nsw i32 %18653, 2
store i32 %18654, i32* %3
%18655 = load i32, i32* %3
%18656 = sub nsw i32 %18655, 1
store i32 %18656, i32* %3
%18657 = load i32, i32* %3
%18658 = and i32 %18657, -1044481
store i32 %18658, i32* %3
%18659 = load i32, i32* %3
%18660 = xor i32 %18659, 81954
store i32 %18660, i32* %3
%18661 = load i32, i32* %3
%18662 = srem i32 %18661, 268435443
store i32 %18662, i32* %3
%18663 = load i32, i32* %3
%18664 = add nsw i32 %18663, 6
store i32 %18664, i32* %3
%18665 = load i32, i32* %3
%18666 = mul nsw i32 %18665, 10
store i32 %18666, i32* %3
%18667 = load i32, i32* %3
%18668 = add nsw i32 %18667, 1
store i32 %18668, i32* %3
%18669 = load i32, i32* %3
%18670 = mul nsw i32 %18669, 2
store i32 %18670, i32* %3
%18671 = load i32, i32* %3
%18672 = sub nsw i32 %18671, 1
store i32 %18672, i32* %3
%18673 = load i32, i32* %3
%18674 = and i32 %18673, -1044481
store i32 %18674, i32* %3
%18675 = load i32, i32* %3
%18676 = xor i32 %18675, 81954
store i32 %18676, i32* %3
%18677 = load i32, i32* %3
%18678 = srem i32 %18677, 268435443
store i32 %18678, i32* %3
%18679 = load i32, i32* %3
%18680 = add nsw i32 %18679, 6
store i32 %18680, i32* %3
%18681 = load i32, i32* %3
%18682 = mul nsw i32 %18681, 10
store i32 %18682, i32* %3
%18683 = load i32, i32* %3
%18684 = add nsw i32 %18683, 1
store i32 %18684, i32* %3
%18685 = load i32, i32* %3
%18686 = mul nsw i32 %18685, 2
store i32 %18686, i32* %3
%18687 = load i32, i32* %3
%18688 = sub nsw i32 %18687, 1
store i32 %18688, i32* %3
%18689 = load i32, i32* %3
%18690 = and i32 %18689, -1044481
store i32 %18690, i32* %3
%18691 = load i32, i32* %3
%18692 = xor i32 %18691, 81954
store i32 %18692, i32* %3
%18693 = load i32, i32* %3
%18694 = srem i32 %18693, 268435443
store i32 %18694, i32* %3
%18695 = load i32, i32* %3
%18696 = add nsw i32 %18695, 6
store i32 %18696, i32* %3
%18697 = load i32, i32* %3
%18698 = mul nsw i32 %18697, 10
store i32 %18698, i32* %3
%18699 = load i32, i32* %3
%18700 = add nsw i32 %18699, 1
store i32 %18700, i32* %3
%18701 = load i32, i32* %3
%18702 = mul nsw i32 %18701, 2
store i32 %18702, i32* %3
%18703 = load i32, i32* %3
%18704 = sub nsw i32 %18703, 1
store i32 %18704, i32* %3
%18705 = load i32, i32* %3
%18706 = and i32 %18705, -1044481
store i32 %18706, i32* %3
%18707 = load i32, i32* %3
%18708 = xor i32 %18707, 81954
store i32 %18708, i32* %3
%18709 = load i32, i32* %3
%18710 = srem i32 %18709, 268435443
store i32 %18710, i32* %3
%18711 = load i32, i32* %3
%18712 = add nsw i32 %18711, 6
store i32 %18712, i32* %3
%18713 = load i32, i32* %3
%18714 = mul nsw i32 %18713, 10
store i32 %18714, i32* %3
%18715 = load i32, i32* %3
%18716 = add nsw i32 %18715, 1
store i32 %18716, i32* %3
%18717 = load i32, i32* %3
%18718 = mul nsw i32 %18717, 2
store i32 %18718, i32* %3
%18719 = load i32, i32* %3
%18720 = sub nsw i32 %18719, 1
store i32 %18720, i32* %3
%18721 = load i32, i32* %3
%18722 = and i32 %18721, -1044481
store i32 %18722, i32* %3
%18723 = load i32, i32* %3
%18724 = xor i32 %18723, 81954
store i32 %18724, i32* %3
%18725 = load i32, i32* %3
%18726 = srem i32 %18725, 268435443
store i32 %18726, i32* %3
%18727 = load i32, i32* %3
%18728 = add nsw i32 %18727, 6
store i32 %18728, i32* %3
%18729 = load i32, i32* %3
%18730 = mul nsw i32 %18729, 10
store i32 %18730, i32* %3
%18731 = load i32, i32* %3
%18732 = add nsw i32 %18731, 1
store i32 %18732, i32* %3
%18733 = load i32, i32* %3
%18734 = mul nsw i32 %18733, 2
store i32 %18734, i32* %3
%18735 = load i32, i32* %3
%18736 = sub nsw i32 %18735, 1
store i32 %18736, i32* %3
%18737 = load i32, i32* %3
%18738 = and i32 %18737, -1044481
store i32 %18738, i32* %3
%18739 = load i32, i32* %3
%18740 = xor i32 %18739, 81954
store i32 %18740, i32* %3
%18741 = load i32, i32* %3
%18742 = srem i32 %18741, 268435443
store i32 %18742, i32* %3
%18743 = load i32, i32* %3
%18744 = add nsw i32 %18743, 6
store i32 %18744, i32* %3
%18745 = load i32, i32* %3
%18746 = mul nsw i32 %18745, 10
store i32 %18746, i32* %3
%18747 = load i32, i32* %3
%18748 = add nsw i32 %18747, 1
store i32 %18748, i32* %3
%18749 = load i32, i32* %3
%18750 = mul nsw i32 %18749, 2
store i32 %18750, i32* %3
%18751 = load i32, i32* %3
%18752 = sub nsw i32 %18751, 1
store i32 %18752, i32* %3
%18753 = load i32, i32* %3
%18754 = and i32 %18753, -1044481
store i32 %18754, i32* %3
%18755 = load i32, i32* %3
%18756 = xor i32 %18755, 81954
store i32 %18756, i32* %3
%18757 = load i32, i32* %3
%18758 = srem i32 %18757, 268435443
store i32 %18758, i32* %3
%18759 = load i32, i32* %3
%18760 = add nsw i32 %18759, 6
store i32 %18760, i32* %3
%18761 = load i32, i32* %3
%18762 = mul nsw i32 %18761, 10
store i32 %18762, i32* %3
%18763 = load i32, i32* %3
%18764 = add nsw i32 %18763, 1
store i32 %18764, i32* %3
%18765 = load i32, i32* %3
%18766 = mul nsw i32 %18765, 2
store i32 %18766, i32* %3
%18767 = load i32, i32* %3
%18768 = sub nsw i32 %18767, 1
store i32 %18768, i32* %3
%18769 = load i32, i32* %3
%18770 = and i32 %18769, -1044481
store i32 %18770, i32* %3
%18771 = load i32, i32* %3
%18772 = xor i32 %18771, 81954
store i32 %18772, i32* %3
%18773 = load i32, i32* %3
%18774 = srem i32 %18773, 268435443
store i32 %18774, i32* %3
%18775 = load i32, i32* %3
%18776 = add nsw i32 %18775, 6
store i32 %18776, i32* %3
%18777 = load i32, i32* %3
%18778 = mul nsw i32 %18777, 10
store i32 %18778, i32* %3
%18779 = load i32, i32* %3
%18780 = add nsw i32 %18779, 1
store i32 %18780, i32* %3
%18781 = load i32, i32* %3
%18782 = mul nsw i32 %18781, 2
store i32 %18782, i32* %3
%18783 = load i32, i32* %3
%18784 = sub nsw i32 %18783, 1
store i32 %18784, i32* %3
%18785 = load i32, i32* %3
%18786 = and i32 %18785, -1044481
store i32 %18786, i32* %3
%18787 = load i32, i32* %3
%18788 = xor i32 %18787, 81954
store i32 %18788, i32* %3
%18789 = load i32, i32* %3
%18790 = srem i32 %18789, 268435443
store i32 %18790, i32* %3
%18791 = load i32, i32* %3
%18792 = add nsw i32 %18791, 6
store i32 %18792, i32* %3
%18793 = load i32, i32* %3
%18794 = mul nsw i32 %18793, 10
store i32 %18794, i32* %3
%18795 = load i32, i32* %3
%18796 = add nsw i32 %18795, 1
store i32 %18796, i32* %3
%18797 = load i32, i32* %3
%18798 = mul nsw i32 %18797, 2
store i32 %18798, i32* %3
%18799 = load i32, i32* %3
%18800 = sub nsw i32 %18799, 1
store i32 %18800, i32* %3
%18801 = load i32, i32* %3
%18802 = and i32 %18801, -1044481
store i32 %18802, i32* %3
%18803 = load i32, i32* %3
%18804 = xor i32 %18803, 81954
store i32 %18804, i32* %3
%18805 = load i32, i32* %3
%18806 = srem i32 %18805, 268435443
store i32 %18806, i32* %3
%18807 = load i32, i32* %3
%18808 = add nsw i32 %18807, 6
store i32 %18808, i32* %3
%18809 = load i32, i32* %3
%18810 = mul nsw i32 %18809, 10
store i32 %18810, i32* %3
%18811 = load i32, i32* %3
%18812 = add nsw i32 %18811, 1
store i32 %18812, i32* %3
%18813 = load i32, i32* %3
%18814 = mul nsw i32 %18813, 2
store i32 %18814, i32* %3
%18815 = load i32, i32* %3
%18816 = sub nsw i32 %18815, 1
store i32 %18816, i32* %3
%18817 = load i32, i32* %3
%18818 = and i32 %18817, -1044481
store i32 %18818, i32* %3
%18819 = load i32, i32* %3
%18820 = xor i32 %18819, 81954
store i32 %18820, i32* %3
%18821 = load i32, i32* %3
%18822 = srem i32 %18821, 268435443
store i32 %18822, i32* %3
%18823 = load i32, i32* %3
%18824 = add nsw i32 %18823, 6
store i32 %18824, i32* %3
%18825 = load i32, i32* %3
%18826 = mul nsw i32 %18825, 10
store i32 %18826, i32* %3
%18827 = load i32, i32* %3
%18828 = add nsw i32 %18827, 1
store i32 %18828, i32* %3
%18829 = load i32, i32* %3
%18830 = mul nsw i32 %18829, 2
store i32 %18830, i32* %3
%18831 = load i32, i32* %3
%18832 = sub nsw i32 %18831, 1
store i32 %18832, i32* %3
%18833 = load i32, i32* %3
%18834 = and i32 %18833, -1044481
store i32 %18834, i32* %3
%18835 = load i32, i32* %3
%18836 = xor i32 %18835, 81954
store i32 %18836, i32* %3
%18837 = load i32, i32* %3
%18838 = srem i32 %18837, 268435443
store i32 %18838, i32* %3
%18839 = load i32, i32* %3
%18840 = add nsw i32 %18839, 6
store i32 %18840, i32* %3
%18841 = load i32, i32* %3
%18842 = mul nsw i32 %18841, 10
store i32 %18842, i32* %3
%18843 = load i32, i32* %3
%18844 = add nsw i32 %18843, 1
store i32 %18844, i32* %3
%18845 = load i32, i32* %3
%18846 = mul nsw i32 %18845, 2
store i32 %18846, i32* %3
%18847 = load i32, i32* %3
%18848 = sub nsw i32 %18847, 1
store i32 %18848, i32* %3
%18849 = load i32, i32* %3
%18850 = and i32 %18849, -1044481
store i32 %18850, i32* %3
%18851 = load i32, i32* %3
%18852 = xor i32 %18851, 81954
store i32 %18852, i32* %3
%18853 = load i32, i32* %3
%18854 = srem i32 %18853, 268435443
store i32 %18854, i32* %3
%18855 = load i32, i32* %3
%18856 = add nsw i32 %18855, 6
store i32 %18856, i32* %3
%18857 = load i32, i32* %3
%18858 = mul nsw i32 %18857, 10
store i32 %18858, i32* %3
%18859 = load i32, i32* %3
%18860 = add nsw i32 %18859, 1
store i32 %18860, i32* %3
%18861 = load i32, i32* %3
%18862 = mul nsw i32 %18861, 2
store i32 %18862, i32* %3
%18863 = load i32, i32* %3
%18864 = sub nsw i32 %18863, 1
store i32 %18864, i32* %3
%18865 = load i32, i32* %3
%18866 = and i32 %18865, -1044481
store i32 %18866, i32* %3
%18867 = load i32, i32* %3
%18868 = xor i32 %18867, 81954
store i32 %18868, i32* %3
%18869 = load i32, i32* %3
%18870 = srem i32 %18869, 268435443
store i32 %18870, i32* %3
%18871 = load i32, i32* %3
%18872 = add nsw i32 %18871, 6
store i32 %18872, i32* %3
%18873 = load i32, i32* %3
%18874 = mul nsw i32 %18873, 10
store i32 %18874, i32* %3
%18875 = load i32, i32* %3
%18876 = add nsw i32 %18875, 1
store i32 %18876, i32* %3
%18877 = load i32, i32* %3
%18878 = mul nsw i32 %18877, 2
store i32 %18878, i32* %3
%18879 = load i32, i32* %3
%18880 = sub nsw i32 %18879, 1
store i32 %18880, i32* %3
%18881 = load i32, i32* %3
%18882 = and i32 %18881, -1044481
store i32 %18882, i32* %3
%18883 = load i32, i32* %3
%18884 = xor i32 %18883, 81954
store i32 %18884, i32* %3
%18885 = load i32, i32* %3
%18886 = srem i32 %18885, 268435443
store i32 %18886, i32* %3
%18887 = load i32, i32* %3
%18888 = add nsw i32 %18887, 6
store i32 %18888, i32* %3
%18889 = load i32, i32* %3
%18890 = mul nsw i32 %18889, 10
store i32 %18890, i32* %3
%18891 = load i32, i32* %3
%18892 = add nsw i32 %18891, 1
store i32 %18892, i32* %3
%18893 = load i32, i32* %3
%18894 = mul nsw i32 %18893, 2
store i32 %18894, i32* %3
%18895 = load i32, i32* %3
%18896 = sub nsw i32 %18895, 1
store i32 %18896, i32* %3
%18897 = load i32, i32* %3
%18898 = and i32 %18897, -1044481
store i32 %18898, i32* %3
%18899 = load i32, i32* %3
%18900 = xor i32 %18899, 81954
store i32 %18900, i32* %3
%18901 = load i32, i32* %3
%18902 = srem i32 %18901, 268435443
store i32 %18902, i32* %3
%18903 = load i32, i32* %3
%18904 = add nsw i32 %18903, 6
store i32 %18904, i32* %3
%18905 = load i32, i32* %3
%18906 = mul nsw i32 %18905, 10
store i32 %18906, i32* %3
%18907 = load i32, i32* %3
%18908 = add nsw i32 %18907, 1
store i32 %18908, i32* %3
%18909 = load i32, i32* %3
%18910 = mul nsw i32 %18909, 2
store i32 %18910, i32* %3
%18911 = load i32, i32* %3
%18912 = sub nsw i32 %18911, 1
store i32 %18912, i32* %3
%18913 = load i32, i32* %3
%18914 = and i32 %18913, -1044481
store i32 %18914, i32* %3
%18915 = load i32, i32* %3
%18916 = xor i32 %18915, 81954
store i32 %18916, i32* %3
%18917 = load i32, i32* %3
%18918 = srem i32 %18917, 268435443
store i32 %18918, i32* %3
%18919 = load i32, i32* %3
%18920 = add nsw i32 %18919, 6
store i32 %18920, i32* %3
%18921 = load i32, i32* %3
%18922 = mul nsw i32 %18921, 10
store i32 %18922, i32* %3
%18923 = load i32, i32* %3
%18924 = add nsw i32 %18923, 1
store i32 %18924, i32* %3
%18925 = load i32, i32* %3
%18926 = mul nsw i32 %18925, 2
store i32 %18926, i32* %3
%18927 = load i32, i32* %3
%18928 = sub nsw i32 %18927, 1
store i32 %18928, i32* %3
%18929 = load i32, i32* %3
%18930 = and i32 %18929, -1044481
store i32 %18930, i32* %3
%18931 = load i32, i32* %3
%18932 = xor i32 %18931, 81954
store i32 %18932, i32* %3
%18933 = load i32, i32* %3
%18934 = srem i32 %18933, 268435443
store i32 %18934, i32* %3
%18935 = load i32, i32* %3
%18936 = add nsw i32 %18935, 6
store i32 %18936, i32* %3
%18937 = load i32, i32* %3
%18938 = mul nsw i32 %18937, 10
store i32 %18938, i32* %3
%18939 = load i32, i32* %3
%18940 = add nsw i32 %18939, 1
store i32 %18940, i32* %3
%18941 = load i32, i32* %3
%18942 = mul nsw i32 %18941, 2
store i32 %18942, i32* %3
%18943 = load i32, i32* %3
%18944 = sub nsw i32 %18943, 1
store i32 %18944, i32* %3
%18945 = load i32, i32* %3
%18946 = and i32 %18945, -1044481
store i32 %18946, i32* %3
%18947 = load i32, i32* %3
%18948 = xor i32 %18947, 81954
store i32 %18948, i32* %3
%18949 = load i32, i32* %3
%18950 = srem i32 %18949, 268435443
store i32 %18950, i32* %3
%18951 = load i32, i32* %3
%18952 = add nsw i32 %18951, 6
store i32 %18952, i32* %3
%18953 = load i32, i32* %3
%18954 = mul nsw i32 %18953, 10
store i32 %18954, i32* %3
%18955 = load i32, i32* %3
%18956 = add nsw i32 %18955, 1
store i32 %18956, i32* %3
%18957 = load i32, i32* %3
%18958 = mul nsw i32 %18957, 2
store i32 %18958, i32* %3
%18959 = load i32, i32* %3
%18960 = sub nsw i32 %18959, 1
store i32 %18960, i32* %3
%18961 = load i32, i32* %3
%18962 = and i32 %18961, -1044481
store i32 %18962, i32* %3
%18963 = load i32, i32* %3
%18964 = xor i32 %18963, 81954
store i32 %18964, i32* %3
%18965 = load i32, i32* %3
%18966 = srem i32 %18965, 268435443
store i32 %18966, i32* %3
%18967 = load i32, i32* %3
%18968 = add nsw i32 %18967, 6
store i32 %18968, i32* %3
%18969 = load i32, i32* %3
%18970 = mul nsw i32 %18969, 10
store i32 %18970, i32* %3
%18971 = load i32, i32* %3
%18972 = add nsw i32 %18971, 1
store i32 %18972, i32* %3
%18973 = load i32, i32* %3
%18974 = mul nsw i32 %18973, 2
store i32 %18974, i32* %3
%18975 = load i32, i32* %3
%18976 = sub nsw i32 %18975, 1
store i32 %18976, i32* %3
%18977 = load i32, i32* %3
%18978 = and i32 %18977, -1044481
store i32 %18978, i32* %3
%18979 = load i32, i32* %3
%18980 = xor i32 %18979, 81954
store i32 %18980, i32* %3
%18981 = load i32, i32* %3
%18982 = srem i32 %18981, 268435443
store i32 %18982, i32* %3
%18983 = load i32, i32* %3
%18984 = add nsw i32 %18983, 6
store i32 %18984, i32* %3
%18985 = load i32, i32* %3
%18986 = mul nsw i32 %18985, 10
store i32 %18986, i32* %3
%18987 = load i32, i32* %3
%18988 = add nsw i32 %18987, 1
store i32 %18988, i32* %3
%18989 = load i32, i32* %3
%18990 = mul nsw i32 %18989, 2
store i32 %18990, i32* %3
%18991 = load i32, i32* %3
%18992 = sub nsw i32 %18991, 1
store i32 %18992, i32* %3
%18993 = load i32, i32* %3
%18994 = and i32 %18993, -1044481
store i32 %18994, i32* %3
%18995 = load i32, i32* %3
%18996 = xor i32 %18995, 81954
store i32 %18996, i32* %3
%18997 = load i32, i32* %3
%18998 = srem i32 %18997, 268435443
store i32 %18998, i32* %3
%18999 = load i32, i32* %3
%19000 = add nsw i32 %18999, 6
store i32 %19000, i32* %3
%19001 = load i32, i32* %3
%19002 = mul nsw i32 %19001, 10
store i32 %19002, i32* %3
%19003 = load i32, i32* %3
%19004 = add nsw i32 %19003, 1
store i32 %19004, i32* %3
%19005 = load i32, i32* %3
%19006 = mul nsw i32 %19005, 2
store i32 %19006, i32* %3
%19007 = load i32, i32* %3
%19008 = sub nsw i32 %19007, 1
store i32 %19008, i32* %3
%19009 = load i32, i32* %3
%19010 = and i32 %19009, -1044481
store i32 %19010, i32* %3
%19011 = load i32, i32* %3
%19012 = xor i32 %19011, 81954
store i32 %19012, i32* %3
%19013 = load i32, i32* %3
%19014 = srem i32 %19013, 268435443
store i32 %19014, i32* %3
%19015 = load i32, i32* %3
%19016 = add nsw i32 %19015, 6
store i32 %19016, i32* %3
%19017 = load i32, i32* %3
%19018 = mul nsw i32 %19017, 10
store i32 %19018, i32* %3
%19019 = load i32, i32* %3
%19020 = add nsw i32 %19019, 1
store i32 %19020, i32* %3
%19021 = load i32, i32* %3
%19022 = mul nsw i32 %19021, 2
store i32 %19022, i32* %3
%19023 = load i32, i32* %3
%19024 = sub nsw i32 %19023, 1
store i32 %19024, i32* %3
%19025 = load i32, i32* %3
%19026 = and i32 %19025, -1044481
store i32 %19026, i32* %3
%19027 = load i32, i32* %3
%19028 = xor i32 %19027, 81954
store i32 %19028, i32* %3
%19029 = load i32, i32* %3
%19030 = srem i32 %19029, 268435443
store i32 %19030, i32* %3
%19031 = load i32, i32* %3
%19032 = add nsw i32 %19031, 6
store i32 %19032, i32* %3
%19033 = load i32, i32* %3
%19034 = mul nsw i32 %19033, 10
store i32 %19034, i32* %3
%19035 = load i32, i32* %3
%19036 = add nsw i32 %19035, 1
store i32 %19036, i32* %3
%19037 = load i32, i32* %3
%19038 = mul nsw i32 %19037, 2
store i32 %19038, i32* %3
%19039 = load i32, i32* %3
%19040 = sub nsw i32 %19039, 1
store i32 %19040, i32* %3
%19041 = load i32, i32* %3
%19042 = and i32 %19041, -1044481
store i32 %19042, i32* %3
%19043 = load i32, i32* %3
%19044 = xor i32 %19043, 81954
store i32 %19044, i32* %3
%19045 = load i32, i32* %3
%19046 = srem i32 %19045, 268435443
store i32 %19046, i32* %3
%19047 = load i32, i32* %3
%19048 = add nsw i32 %19047, 6
store i32 %19048, i32* %3
%19049 = load i32, i32* %3
%19050 = mul nsw i32 %19049, 10
store i32 %19050, i32* %3
%19051 = load i32, i32* %3
%19052 = add nsw i32 %19051, 1
store i32 %19052, i32* %3
%19053 = load i32, i32* %3
%19054 = mul nsw i32 %19053, 2
store i32 %19054, i32* %3
%19055 = load i32, i32* %3
%19056 = sub nsw i32 %19055, 1
store i32 %19056, i32* %3
%19057 = load i32, i32* %3
%19058 = and i32 %19057, -1044481
store i32 %19058, i32* %3
%19059 = load i32, i32* %3
%19060 = xor i32 %19059, 81954
store i32 %19060, i32* %3
%19061 = load i32, i32* %3
%19062 = srem i32 %19061, 268435443
store i32 %19062, i32* %3
%19063 = load i32, i32* %3
%19064 = add nsw i32 %19063, 6
store i32 %19064, i32* %3
%19065 = load i32, i32* %3
%19066 = mul nsw i32 %19065, 10
store i32 %19066, i32* %3
%19067 = load i32, i32* %3
%19068 = add nsw i32 %19067, 1
store i32 %19068, i32* %3
%19069 = load i32, i32* %3
%19070 = mul nsw i32 %19069, 2
store i32 %19070, i32* %3
%19071 = load i32, i32* %3
%19072 = sub nsw i32 %19071, 1
store i32 %19072, i32* %3
%19073 = load i32, i32* %3
%19074 = and i32 %19073, -1044481
store i32 %19074, i32* %3
%19075 = load i32, i32* %3
%19076 = xor i32 %19075, 81954
store i32 %19076, i32* %3
%19077 = load i32, i32* %3
%19078 = srem i32 %19077, 268435443
store i32 %19078, i32* %3
%19079 = load i32, i32* %3
%19080 = add nsw i32 %19079, 6
store i32 %19080, i32* %3
%19081 = load i32, i32* %3
%19082 = mul nsw i32 %19081, 10
store i32 %19082, i32* %3
%19083 = load i32, i32* %3
%19084 = add nsw i32 %19083, 1
store i32 %19084, i32* %3
%19085 = load i32, i32* %3
%19086 = mul nsw i32 %19085, 2
store i32 %19086, i32* %3
%19087 = load i32, i32* %3
%19088 = sub nsw i32 %19087, 1
store i32 %19088, i32* %3
%19089 = load i32, i32* %3
%19090 = and i32 %19089, -1044481
store i32 %19090, i32* %3
%19091 = load i32, i32* %3
%19092 = xor i32 %19091, 81954
store i32 %19092, i32* %3
%19093 = load i32, i32* %3
%19094 = srem i32 %19093, 268435443
store i32 %19094, i32* %3
%19095 = load i32, i32* %3
%19096 = add nsw i32 %19095, 6
store i32 %19096, i32* %3
%19097 = load i32, i32* %3
%19098 = mul nsw i32 %19097, 10
store i32 %19098, i32* %3
%19099 = load i32, i32* %3
%19100 = add nsw i32 %19099, 1
store i32 %19100, i32* %3
%19101 = load i32, i32* %3
%19102 = mul nsw i32 %19101, 2
store i32 %19102, i32* %3
%19103 = load i32, i32* %3
%19104 = sub nsw i32 %19103, 1
store i32 %19104, i32* %3
%19105 = load i32, i32* %3
%19106 = and i32 %19105, -1044481
store i32 %19106, i32* %3
%19107 = load i32, i32* %3
%19108 = xor i32 %19107, 81954
store i32 %19108, i32* %3
%19109 = load i32, i32* %3
%19110 = srem i32 %19109, 268435443
store i32 %19110, i32* %3
%19111 = load i32, i32* %3
%19112 = add nsw i32 %19111, 6
store i32 %19112, i32* %3
%19113 = load i32, i32* %3
%19114 = mul nsw i32 %19113, 10
store i32 %19114, i32* %3
%19115 = load i32, i32* %3
%19116 = add nsw i32 %19115, 1
store i32 %19116, i32* %3
%19117 = load i32, i32* %3
%19118 = mul nsw i32 %19117, 2
store i32 %19118, i32* %3
%19119 = load i32, i32* %3
%19120 = sub nsw i32 %19119, 1
store i32 %19120, i32* %3
%19121 = load i32, i32* %3
%19122 = and i32 %19121, -1044481
store i32 %19122, i32* %3
%19123 = load i32, i32* %3
%19124 = xor i32 %19123, 81954
store i32 %19124, i32* %3
%19125 = load i32, i32* %3
%19126 = srem i32 %19125, 268435443
store i32 %19126, i32* %3
%19127 = load i32, i32* %3
%19128 = add nsw i32 %19127, 6
store i32 %19128, i32* %3
%19129 = load i32, i32* %3
%19130 = mul nsw i32 %19129, 10
store i32 %19130, i32* %3
%19131 = load i32, i32* %3
%19132 = add nsw i32 %19131, 1
store i32 %19132, i32* %3
%19133 = load i32, i32* %3
%19134 = mul nsw i32 %19133, 2
store i32 %19134, i32* %3
%19135 = load i32, i32* %3
%19136 = sub nsw i32 %19135, 1
store i32 %19136, i32* %3
%19137 = load i32, i32* %3
%19138 = and i32 %19137, -1044481
store i32 %19138, i32* %3
%19139 = load i32, i32* %3
%19140 = xor i32 %19139, 81954
store i32 %19140, i32* %3
%19141 = load i32, i32* %3
%19142 = srem i32 %19141, 268435443
store i32 %19142, i32* %3
%19143 = load i32, i32* %3
%19144 = add nsw i32 %19143, 6
store i32 %19144, i32* %3
%19145 = load i32, i32* %3
%19146 = mul nsw i32 %19145, 10
store i32 %19146, i32* %3
%19147 = load i32, i32* %3
%19148 = add nsw i32 %19147, 1
store i32 %19148, i32* %3
%19149 = load i32, i32* %3
%19150 = mul nsw i32 %19149, 2
store i32 %19150, i32* %3
%19151 = load i32, i32* %3
%19152 = sub nsw i32 %19151, 1
store i32 %19152, i32* %3
%19153 = load i32, i32* %3
%19154 = and i32 %19153, -1044481
store i32 %19154, i32* %3
%19155 = load i32, i32* %3
%19156 = xor i32 %19155, 81954
store i32 %19156, i32* %3
%19157 = load i32, i32* %3
%19158 = srem i32 %19157, 268435443
store i32 %19158, i32* %3
%19159 = load i32, i32* %3
%19160 = add nsw i32 %19159, 6
store i32 %19160, i32* %3
%19161 = load i32, i32* %3
%19162 = mul nsw i32 %19161, 10
store i32 %19162, i32* %3
%19163 = load i32, i32* %3
%19164 = add nsw i32 %19163, 1
store i32 %19164, i32* %3
%19165 = load i32, i32* %3
%19166 = mul nsw i32 %19165, 2
store i32 %19166, i32* %3
%19167 = load i32, i32* %3
%19168 = sub nsw i32 %19167, 1
store i32 %19168, i32* %3
%19169 = load i32, i32* %3
%19170 = and i32 %19169, -1044481
store i32 %19170, i32* %3
%19171 = load i32, i32* %3
%19172 = xor i32 %19171, 81954
store i32 %19172, i32* %3
%19173 = load i32, i32* %3
%19174 = srem i32 %19173, 268435443
store i32 %19174, i32* %3
%19175 = load i32, i32* %3
%19176 = add nsw i32 %19175, 6
store i32 %19176, i32* %3
%19177 = load i32, i32* %3
%19178 = mul nsw i32 %19177, 10
store i32 %19178, i32* %3
%19179 = load i32, i32* %3
%19180 = add nsw i32 %19179, 1
store i32 %19180, i32* %3
%19181 = load i32, i32* %3
%19182 = mul nsw i32 %19181, 2
store i32 %19182, i32* %3
%19183 = load i32, i32* %3
%19184 = sub nsw i32 %19183, 1
store i32 %19184, i32* %3
%19185 = load i32, i32* %3
%19186 = and i32 %19185, -1044481
store i32 %19186, i32* %3
%19187 = load i32, i32* %3
%19188 = xor i32 %19187, 81954
store i32 %19188, i32* %3
%19189 = load i32, i32* %3
%19190 = srem i32 %19189, 268435443
store i32 %19190, i32* %3
%19191 = load i32, i32* %3
%19192 = add nsw i32 %19191, 6
store i32 %19192, i32* %3
%19193 = load i32, i32* %3
%19194 = mul nsw i32 %19193, 10
store i32 %19194, i32* %3
%19195 = load i32, i32* %3
%19196 = add nsw i32 %19195, 1
store i32 %19196, i32* %3
%19197 = load i32, i32* %3
%19198 = mul nsw i32 %19197, 2
store i32 %19198, i32* %3
%19199 = load i32, i32* %3
%19200 = sub nsw i32 %19199, 1
store i32 %19200, i32* %3
%19201 = load i32, i32* %3
%19202 = and i32 %19201, -1044481
store i32 %19202, i32* %3
%19203 = load i32, i32* %3
%19204 = xor i32 %19203, 81954
store i32 %19204, i32* %3
%19205 = load i32, i32* %3
%19206 = srem i32 %19205, 268435443
store i32 %19206, i32* %3
%19207 = load i32, i32* %3
%19208 = add nsw i32 %19207, 6
store i32 %19208, i32* %3
%19209 = load i32, i32* %3
%19210 = mul nsw i32 %19209, 10
store i32 %19210, i32* %3
%19211 = load i32, i32* %3
%19212 = add nsw i32 %19211, 1
store i32 %19212, i32* %3
%19213 = load i32, i32* %3
%19214 = mul nsw i32 %19213, 2
store i32 %19214, i32* %3
%19215 = load i32, i32* %3
%19216 = sub nsw i32 %19215, 1
store i32 %19216, i32* %3
%19217 = load i32, i32* %3
%19218 = and i32 %19217, -1044481
store i32 %19218, i32* %3
%19219 = load i32, i32* %3
%19220 = xor i32 %19219, 81954
store i32 %19220, i32* %3
%19221 = load i32, i32* %3
%19222 = srem i32 %19221, 268435443
store i32 %19222, i32* %3
%19223 = load i32, i32* %3
%19224 = add nsw i32 %19223, 6
store i32 %19224, i32* %3
%19225 = load i32, i32* %3
%19226 = mul nsw i32 %19225, 10
store i32 %19226, i32* %3
%19227 = load i32, i32* %3
%19228 = add nsw i32 %19227, 1
store i32 %19228, i32* %3
%19229 = load i32, i32* %3
%19230 = mul nsw i32 %19229, 2
store i32 %19230, i32* %3
%19231 = load i32, i32* %3
%19232 = sub nsw i32 %19231, 1
store i32 %19232, i32* %3
%19233 = load i32, i32* %3
%19234 = and i32 %19233, -1044481
store i32 %19234, i32* %3
%19235 = load i32, i32* %3
%19236 = xor i32 %19235, 81954
store i32 %19236, i32* %3
%19237 = load i32, i32* %3
%19238 = srem i32 %19237, 268435443
store i32 %19238, i32* %3
%19239 = load i32, i32* %3
%19240 = add nsw i32 %19239, 6
store i32 %19240, i32* %3
%19241 = load i32, i32* %3
%19242 = mul nsw i32 %19241, 10
store i32 %19242, i32* %3
%19243 = load i32, i32* %3
%19244 = add nsw i32 %19243, 1
store i32 %19244, i32* %3
%19245 = load i32, i32* %3
%19246 = mul nsw i32 %19245, 2
store i32 %19246, i32* %3
%19247 = load i32, i32* %3
%19248 = sub nsw i32 %19247, 1
store i32 %19248, i32* %3
%19249 = load i32, i32* %3
%19250 = and i32 %19249, -1044481
store i32 %19250, i32* %3
%19251 = load i32, i32* %3
%19252 = xor i32 %19251, 81954
store i32 %19252, i32* %3
%19253 = load i32, i32* %3
%19254 = srem i32 %19253, 268435443
store i32 %19254, i32* %3
%19255 = load i32, i32* %3
%19256 = add nsw i32 %19255, 6
store i32 %19256, i32* %3
%19257 = load i32, i32* %3
%19258 = mul nsw i32 %19257, 10
store i32 %19258, i32* %3
%19259 = load i32, i32* %3
%19260 = add nsw i32 %19259, 1
store i32 %19260, i32* %3
%19261 = load i32, i32* %3
%19262 = mul nsw i32 %19261, 2
store i32 %19262, i32* %3
%19263 = load i32, i32* %3
%19264 = sub nsw i32 %19263, 1
store i32 %19264, i32* %3
%19265 = load i32, i32* %3
%19266 = and i32 %19265, -1044481
store i32 %19266, i32* %3
%19267 = load i32, i32* %3
%19268 = xor i32 %19267, 81954
store i32 %19268, i32* %3
%19269 = load i32, i32* %3
%19270 = srem i32 %19269, 268435443
store i32 %19270, i32* %3
%19271 = load i32, i32* %3
%19272 = add nsw i32 %19271, 6
store i32 %19272, i32* %3
%19273 = load i32, i32* %3
%19274 = mul nsw i32 %19273, 10
store i32 %19274, i32* %3
%19275 = load i32, i32* %3
%19276 = add nsw i32 %19275, 1
store i32 %19276, i32* %3
%19277 = load i32, i32* %3
%19278 = mul nsw i32 %19277, 2
store i32 %19278, i32* %3
%19279 = load i32, i32* %3
%19280 = sub nsw i32 %19279, 1
store i32 %19280, i32* %3
%19281 = load i32, i32* %3
%19282 = and i32 %19281, -1044481
store i32 %19282, i32* %3
%19283 = load i32, i32* %3
%19284 = xor i32 %19283, 81954
store i32 %19284, i32* %3
%19285 = load i32, i32* %3
%19286 = srem i32 %19285, 268435443
store i32 %19286, i32* %3
%19287 = load i32, i32* %3
%19288 = add nsw i32 %19287, 6
store i32 %19288, i32* %3
%19289 = load i32, i32* %3
%19290 = mul nsw i32 %19289, 10
store i32 %19290, i32* %3
%19291 = load i32, i32* %3
%19292 = add nsw i32 %19291, 1
store i32 %19292, i32* %3
%19293 = load i32, i32* %3
%19294 = mul nsw i32 %19293, 2
store i32 %19294, i32* %3
%19295 = load i32, i32* %3
%19296 = sub nsw i32 %19295, 1
store i32 %19296, i32* %3
%19297 = load i32, i32* %3
%19298 = and i32 %19297, -1044481
store i32 %19298, i32* %3
%19299 = load i32, i32* %3
%19300 = xor i32 %19299, 81954
store i32 %19300, i32* %3
%19301 = load i32, i32* %3
%19302 = srem i32 %19301, 268435443
store i32 %19302, i32* %3
%19303 = load i32, i32* %3
%19304 = add nsw i32 %19303, 6
store i32 %19304, i32* %3
%19305 = load i32, i32* %3
%19306 = mul nsw i32 %19305, 10
store i32 %19306, i32* %3
%19307 = load i32, i32* %3
%19308 = add nsw i32 %19307, 1
store i32 %19308, i32* %3
%19309 = load i32, i32* %3
%19310 = mul nsw i32 %19309, 2
store i32 %19310, i32* %3
%19311 = load i32, i32* %3
%19312 = sub nsw i32 %19311, 1
store i32 %19312, i32* %3
%19313 = load i32, i32* %3
%19314 = and i32 %19313, -1044481
store i32 %19314, i32* %3
%19315 = load i32, i32* %3
%19316 = xor i32 %19315, 81954
store i32 %19316, i32* %3
%19317 = load i32, i32* %3
%19318 = srem i32 %19317, 268435443
store i32 %19318, i32* %3
%19319 = load i32, i32* %3
%19320 = add nsw i32 %19319, 6
store i32 %19320, i32* %3
%19321 = load i32, i32* %3
%19322 = mul nsw i32 %19321, 10
store i32 %19322, i32* %3
%19323 = load i32, i32* %3
%19324 = add nsw i32 %19323, 1
store i32 %19324, i32* %3
%19325 = load i32, i32* %3
%19326 = mul nsw i32 %19325, 2
store i32 %19326, i32* %3
%19327 = load i32, i32* %3
%19328 = sub nsw i32 %19327, 1
store i32 %19328, i32* %3
%19329 = load i32, i32* %3
%19330 = and i32 %19329, -1044481
store i32 %19330, i32* %3
%19331 = load i32, i32* %3
%19332 = xor i32 %19331, 81954
store i32 %19332, i32* %3
%19333 = load i32, i32* %3
%19334 = srem i32 %19333, 268435443
store i32 %19334, i32* %3
%19335 = load i32, i32* %3
%19336 = add nsw i32 %19335, 6
store i32 %19336, i32* %3
%19337 = load i32, i32* %3
%19338 = mul nsw i32 %19337, 10
store i32 %19338, i32* %3
%19339 = load i32, i32* %3
%19340 = add nsw i32 %19339, 1
store i32 %19340, i32* %3
%19341 = load i32, i32* %3
%19342 = mul nsw i32 %19341, 2
store i32 %19342, i32* %3
%19343 = load i32, i32* %3
%19344 = sub nsw i32 %19343, 1
store i32 %19344, i32* %3
%19345 = load i32, i32* %3
%19346 = and i32 %19345, -1044481
store i32 %19346, i32* %3
%19347 = load i32, i32* %3
%19348 = xor i32 %19347, 81954
store i32 %19348, i32* %3
%19349 = load i32, i32* %3
%19350 = srem i32 %19349, 268435443
store i32 %19350, i32* %3
%19351 = load i32, i32* %3
%19352 = add nsw i32 %19351, 6
store i32 %19352, i32* %3
%19353 = load i32, i32* %3
%19354 = mul nsw i32 %19353, 10
store i32 %19354, i32* %3
%19355 = load i32, i32* %3
%19356 = add nsw i32 %19355, 1
store i32 %19356, i32* %3
%19357 = load i32, i32* %3
%19358 = mul nsw i32 %19357, 2
store i32 %19358, i32* %3
%19359 = load i32, i32* %3
%19360 = sub nsw i32 %19359, 1
store i32 %19360, i32* %3
%19361 = load i32, i32* %3
%19362 = and i32 %19361, -1044481
store i32 %19362, i32* %3
%19363 = load i32, i32* %3
%19364 = xor i32 %19363, 81954
store i32 %19364, i32* %3
%19365 = load i32, i32* %3
%19366 = srem i32 %19365, 268435443
store i32 %19366, i32* %3
%19367 = load i32, i32* %3
%19368 = add nsw i32 %19367, 6
store i32 %19368, i32* %3
%19369 = load i32, i32* %3
%19370 = mul nsw i32 %19369, 10
store i32 %19370, i32* %3
%19371 = load i32, i32* %3
%19372 = add nsw i32 %19371, 1
store i32 %19372, i32* %3
%19373 = load i32, i32* %3
%19374 = mul nsw i32 %19373, 2
store i32 %19374, i32* %3
%19375 = load i32, i32* %3
%19376 = sub nsw i32 %19375, 1
store i32 %19376, i32* %3
%19377 = load i32, i32* %3
%19378 = and i32 %19377, -1044481
store i32 %19378, i32* %3
%19379 = load i32, i32* %3
%19380 = xor i32 %19379, 81954
store i32 %19380, i32* %3
%19381 = load i32, i32* %3
%19382 = srem i32 %19381, 268435443
store i32 %19382, i32* %3
%19383 = load i32, i32* %3
%19384 = add nsw i32 %19383, 6
store i32 %19384, i32* %3
%19385 = load i32, i32* %3
%19386 = mul nsw i32 %19385, 10
store i32 %19386, i32* %3
%19387 = load i32, i32* %3
%19388 = add nsw i32 %19387, 1
store i32 %19388, i32* %3
%19389 = load i32, i32* %3
%19390 = mul nsw i32 %19389, 2
store i32 %19390, i32* %3
%19391 = load i32, i32* %3
%19392 = sub nsw i32 %19391, 1
store i32 %19392, i32* %3
%19393 = load i32, i32* %3
%19394 = and i32 %19393, -1044481
store i32 %19394, i32* %3
%19395 = load i32, i32* %3
%19396 = xor i32 %19395, 81954
store i32 %19396, i32* %3
%19397 = load i32, i32* %3
%19398 = srem i32 %19397, 268435443
store i32 %19398, i32* %3
%19399 = load i32, i32* %3
%19400 = add nsw i32 %19399, 6
store i32 %19400, i32* %3
%19401 = load i32, i32* %3
%19402 = mul nsw i32 %19401, 10
store i32 %19402, i32* %3
%19403 = load i32, i32* %3
%19404 = add nsw i32 %19403, 1
store i32 %19404, i32* %3
%19405 = load i32, i32* %3
%19406 = mul nsw i32 %19405, 2
store i32 %19406, i32* %3
%19407 = load i32, i32* %3
%19408 = sub nsw i32 %19407, 1
store i32 %19408, i32* %3
%19409 = load i32, i32* %3
%19410 = and i32 %19409, -1044481
store i32 %19410, i32* %3
%19411 = load i32, i32* %3
%19412 = xor i32 %19411, 81954
store i32 %19412, i32* %3
%19413 = load i32, i32* %3
%19414 = srem i32 %19413, 268435443
store i32 %19414, i32* %3
%19415 = load i32, i32* %3
%19416 = add nsw i32 %19415, 6
store i32 %19416, i32* %3
%19417 = load i32, i32* %3
%19418 = mul nsw i32 %19417, 10
store i32 %19418, i32* %3
%19419 = load i32, i32* %3
%19420 = add nsw i32 %19419, 1
store i32 %19420, i32* %3
%19421 = load i32, i32* %3
%19422 = mul nsw i32 %19421, 2
store i32 %19422, i32* %3
%19423 = load i32, i32* %3
%19424 = sub nsw i32 %19423, 1
store i32 %19424, i32* %3
%19425 = load i32, i32* %3
%19426 = and i32 %19425, -1044481
store i32 %19426, i32* %3
%19427 = load i32, i32* %3
%19428 = xor i32 %19427, 81954
store i32 %19428, i32* %3
%19429 = load i32, i32* %3
%19430 = srem i32 %19429, 268435443
store i32 %19430, i32* %3
%19431 = load i32, i32* %3
%19432 = add nsw i32 %19431, 6
store i32 %19432, i32* %3
%19433 = load i32, i32* %3
%19434 = mul nsw i32 %19433, 10
store i32 %19434, i32* %3
%19435 = load i32, i32* %3
%19436 = add nsw i32 %19435, 1
store i32 %19436, i32* %3
%19437 = load i32, i32* %3
%19438 = mul nsw i32 %19437, 2
store i32 %19438, i32* %3
%19439 = load i32, i32* %3
%19440 = sub nsw i32 %19439, 1
store i32 %19440, i32* %3
%19441 = load i32, i32* %3
%19442 = and i32 %19441, -1044481
store i32 %19442, i32* %3
%19443 = load i32, i32* %3
%19444 = xor i32 %19443, 81954
store i32 %19444, i32* %3
%19445 = load i32, i32* %3
%19446 = srem i32 %19445, 268435443
store i32 %19446, i32* %3
%19447 = load i32, i32* %3
%19448 = add nsw i32 %19447, 6
store i32 %19448, i32* %3
%19449 = load i32, i32* %3
%19450 = mul nsw i32 %19449, 10
store i32 %19450, i32* %3
%19451 = load i32, i32* %3
%19452 = add nsw i32 %19451, 1
store i32 %19452, i32* %3
%19453 = load i32, i32* %3
%19454 = mul nsw i32 %19453, 2
store i32 %19454, i32* %3
%19455 = load i32, i32* %3
%19456 = sub nsw i32 %19455, 1
store i32 %19456, i32* %3
%19457 = load i32, i32* %3
%19458 = and i32 %19457, -1044481
store i32 %19458, i32* %3
%19459 = load i32, i32* %3
%19460 = xor i32 %19459, 81954
store i32 %19460, i32* %3
%19461 = load i32, i32* %3
%19462 = srem i32 %19461, 268435443
store i32 %19462, i32* %3
%19463 = load i32, i32* %3
%19464 = add nsw i32 %19463, 6
store i32 %19464, i32* %3
%19465 = load i32, i32* %3
%19466 = mul nsw i32 %19465, 10
store i32 %19466, i32* %3
%19467 = load i32, i32* %3
%19468 = add nsw i32 %19467, 1
store i32 %19468, i32* %3
%19469 = load i32, i32* %3
%19470 = mul nsw i32 %19469, 2
store i32 %19470, i32* %3
%19471 = load i32, i32* %3
%19472 = sub nsw i32 %19471, 1
store i32 %19472, i32* %3
%19473 = load i32, i32* %3
%19474 = and i32 %19473, -1044481
store i32 %19474, i32* %3
%19475 = load i32, i32* %3
%19476 = xor i32 %19475, 81954
store i32 %19476, i32* %3
%19477 = load i32, i32* %3
%19478 = srem i32 %19477, 268435443
store i32 %19478, i32* %3
%19479 = load i32, i32* %3
%19480 = add nsw i32 %19479, 6
store i32 %19480, i32* %3
%19481 = load i32, i32* %3
%19482 = mul nsw i32 %19481, 10
store i32 %19482, i32* %3
%19483 = load i32, i32* %3
%19484 = add nsw i32 %19483, 1
store i32 %19484, i32* %3
%19485 = load i32, i32* %3
%19486 = mul nsw i32 %19485, 2
store i32 %19486, i32* %3
%19487 = load i32, i32* %3
%19488 = sub nsw i32 %19487, 1
store i32 %19488, i32* %3
%19489 = load i32, i32* %3
%19490 = and i32 %19489, -1044481
store i32 %19490, i32* %3
%19491 = load i32, i32* %3
%19492 = xor i32 %19491, 81954
store i32 %19492, i32* %3
%19493 = load i32, i32* %3
%19494 = srem i32 %19493, 268435443
store i32 %19494, i32* %3
%19495 = load i32, i32* %3
%19496 = add nsw i32 %19495, 6
store i32 %19496, i32* %3
%19497 = load i32, i32* %3
%19498 = mul nsw i32 %19497, 10
store i32 %19498, i32* %3
%19499 = load i32, i32* %3
%19500 = add nsw i32 %19499, 1
store i32 %19500, i32* %3
%19501 = load i32, i32* %3
%19502 = mul nsw i32 %19501, 2
store i32 %19502, i32* %3
%19503 = load i32, i32* %3
%19504 = sub nsw i32 %19503, 1
store i32 %19504, i32* %3
%19505 = load i32, i32* %3
%19506 = and i32 %19505, -1044481
store i32 %19506, i32* %3
%19507 = load i32, i32* %3
%19508 = xor i32 %19507, 81954
store i32 %19508, i32* %3
%19509 = load i32, i32* %3
%19510 = srem i32 %19509, 268435443
store i32 %19510, i32* %3
%19511 = load i32, i32* %3
%19512 = add nsw i32 %19511, 6
store i32 %19512, i32* %3
%19513 = load i32, i32* %3
%19514 = mul nsw i32 %19513, 10
store i32 %19514, i32* %3
%19515 = load i32, i32* %3
%19516 = add nsw i32 %19515, 1
store i32 %19516, i32* %3
%19517 = load i32, i32* %3
%19518 = mul nsw i32 %19517, 2
store i32 %19518, i32* %3
%19519 = load i32, i32* %3
%19520 = sub nsw i32 %19519, 1
store i32 %19520, i32* %3
%19521 = load i32, i32* %3
%19522 = and i32 %19521, -1044481
store i32 %19522, i32* %3
%19523 = load i32, i32* %3
%19524 = xor i32 %19523, 81954
store i32 %19524, i32* %3
%19525 = load i32, i32* %3
%19526 = srem i32 %19525, 268435443
store i32 %19526, i32* %3
%19527 = load i32, i32* %3
%19528 = add nsw i32 %19527, 6
store i32 %19528, i32* %3
%19529 = load i32, i32* %3
%19530 = mul nsw i32 %19529, 10
store i32 %19530, i32* %3
%19531 = load i32, i32* %3
%19532 = add nsw i32 %19531, 1
store i32 %19532, i32* %3
%19533 = load i32, i32* %3
%19534 = mul nsw i32 %19533, 2
store i32 %19534, i32* %3
%19535 = load i32, i32* %3
%19536 = sub nsw i32 %19535, 1
store i32 %19536, i32* %3
%19537 = load i32, i32* %3
%19538 = and i32 %19537, -1044481
store i32 %19538, i32* %3
%19539 = load i32, i32* %3
%19540 = xor i32 %19539, 81954
store i32 %19540, i32* %3
%19541 = load i32, i32* %3
%19542 = srem i32 %19541, 268435443
store i32 %19542, i32* %3
%19543 = load i32, i32* %3
%19544 = add nsw i32 %19543, 6
store i32 %19544, i32* %3
%19545 = load i32, i32* %3
%19546 = mul nsw i32 %19545, 10
store i32 %19546, i32* %3
%19547 = load i32, i32* %3
%19548 = add nsw i32 %19547, 1
store i32 %19548, i32* %3
%19549 = load i32, i32* %3
%19550 = mul nsw i32 %19549, 2
store i32 %19550, i32* %3
%19551 = load i32, i32* %3
%19552 = sub nsw i32 %19551, 1
store i32 %19552, i32* %3
%19553 = load i32, i32* %3
%19554 = and i32 %19553, -1044481
store i32 %19554, i32* %3
%19555 = load i32, i32* %3
%19556 = xor i32 %19555, 81954
store i32 %19556, i32* %3
%19557 = load i32, i32* %3
%19558 = srem i32 %19557, 268435443
store i32 %19558, i32* %3
%19559 = load i32, i32* %3
%19560 = add nsw i32 %19559, 6
store i32 %19560, i32* %3
%19561 = load i32, i32* %3
%19562 = mul nsw i32 %19561, 10
store i32 %19562, i32* %3
%19563 = load i32, i32* %3
%19564 = add nsw i32 %19563, 1
store i32 %19564, i32* %3
%19565 = load i32, i32* %3
%19566 = mul nsw i32 %19565, 2
store i32 %19566, i32* %3
%19567 = load i32, i32* %3
%19568 = sub nsw i32 %19567, 1
store i32 %19568, i32* %3
%19569 = load i32, i32* %3
%19570 = and i32 %19569, -1044481
store i32 %19570, i32* %3
%19571 = load i32, i32* %3
%19572 = xor i32 %19571, 81954
store i32 %19572, i32* %3
%19573 = load i32, i32* %3
%19574 = srem i32 %19573, 268435443
store i32 %19574, i32* %3
%19575 = load i32, i32* %3
%19576 = add nsw i32 %19575, 6
store i32 %19576, i32* %3
%19577 = load i32, i32* %3
%19578 = mul nsw i32 %19577, 10
store i32 %19578, i32* %3
%19579 = load i32, i32* %3
%19580 = add nsw i32 %19579, 1
store i32 %19580, i32* %3
%19581 = load i32, i32* %3
%19582 = mul nsw i32 %19581, 2
store i32 %19582, i32* %3
%19583 = load i32, i32* %3
%19584 = sub nsw i32 %19583, 1
store i32 %19584, i32* %3
%19585 = load i32, i32* %3
%19586 = and i32 %19585, -1044481
store i32 %19586, i32* %3
%19587 = load i32, i32* %3
%19588 = xor i32 %19587, 81954
store i32 %19588, i32* %3
%19589 = load i32, i32* %3
%19590 = srem i32 %19589, 268435443
store i32 %19590, i32* %3
%19591 = load i32, i32* %3
%19592 = add nsw i32 %19591, 6
store i32 %19592, i32* %3
%19593 = load i32, i32* %3
%19594 = mul nsw i32 %19593, 10
store i32 %19594, i32* %3
%19595 = load i32, i32* %3
%19596 = add nsw i32 %19595, 1
store i32 %19596, i32* %3
%19597 = load i32, i32* %3
%19598 = mul nsw i32 %19597, 2
store i32 %19598, i32* %3
%19599 = load i32, i32* %3
%19600 = sub nsw i32 %19599, 1
store i32 %19600, i32* %3
%19601 = load i32, i32* %3
%19602 = and i32 %19601, -1044481
store i32 %19602, i32* %3
%19603 = load i32, i32* %3
%19604 = xor i32 %19603, 81954
store i32 %19604, i32* %3
%19605 = load i32, i32* %3
%19606 = srem i32 %19605, 268435443
store i32 %19606, i32* %3
%19607 = load i32, i32* %3
%19608 = add nsw i32 %19607, 6
store i32 %19608, i32* %3
%19609 = load i32, i32* %3
%19610 = mul nsw i32 %19609, 10
store i32 %19610, i32* %3
%19611 = load i32, i32* %3
%19612 = add nsw i32 %19611, 1
store i32 %19612, i32* %3
%19613 = load i32, i32* %3
%19614 = mul nsw i32 %19613, 2
store i32 %19614, i32* %3
%19615 = load i32, i32* %3
%19616 = sub nsw i32 %19615, 1
store i32 %19616, i32* %3
%19617 = load i32, i32* %3
%19618 = and i32 %19617, -1044481
store i32 %19618, i32* %3
%19619 = load i32, i32* %3
%19620 = xor i32 %19619, 81954
store i32 %19620, i32* %3
%19621 = load i32, i32* %3
%19622 = srem i32 %19621, 268435443
store i32 %19622, i32* %3
%19623 = load i32, i32* %3
%19624 = add nsw i32 %19623, 6
store i32 %19624, i32* %3
%19625 = load i32, i32* %3
%19626 = mul nsw i32 %19625, 10
store i32 %19626, i32* %3
%19627 = load i32, i32* %3
%19628 = add nsw i32 %19627, 1
store i32 %19628, i32* %3
%19629 = load i32, i32* %3
%19630 = mul nsw i32 %19629, 2
store i32 %19630, i32* %3
%19631 = load i32, i32* %3
%19632 = sub nsw i32 %19631, 1
store i32 %19632, i32* %3
%19633 = load i32, i32* %3
%19634 = and i32 %19633, -1044481
store i32 %19634, i32* %3
%19635 = load i32, i32* %3
%19636 = xor i32 %19635, 81954
store i32 %19636, i32* %3
%19637 = load i32, i32* %3
%19638 = srem i32 %19637, 268435443
store i32 %19638, i32* %3
%19639 = load i32, i32* %3
%19640 = add nsw i32 %19639, 6
store i32 %19640, i32* %3
%19641 = load i32, i32* %3
%19642 = mul nsw i32 %19641, 10
store i32 %19642, i32* %3
%19643 = load i32, i32* %3
%19644 = add nsw i32 %19643, 1
store i32 %19644, i32* %3
%19645 = load i32, i32* %3
%19646 = mul nsw i32 %19645, 2
store i32 %19646, i32* %3
%19647 = load i32, i32* %3
%19648 = sub nsw i32 %19647, 1
store i32 %19648, i32* %3
%19649 = load i32, i32* %3
%19650 = and i32 %19649, -1044481
store i32 %19650, i32* %3
%19651 = load i32, i32* %3
%19652 = xor i32 %19651, 81954
store i32 %19652, i32* %3
%19653 = load i32, i32* %3
%19654 = srem i32 %19653, 268435443
store i32 %19654, i32* %3
%19655 = load i32, i32* %3
%19656 = add nsw i32 %19655, 6
store i32 %19656, i32* %3
%19657 = load i32, i32* %3
%19658 = mul nsw i32 %19657, 10
store i32 %19658, i32* %3
%19659 = load i32, i32* %3
%19660 = add nsw i32 %19659, 1
store i32 %19660, i32* %3
%19661 = load i32, i32* %3
%19662 = mul nsw i32 %19661, 2
store i32 %19662, i32* %3
%19663 = load i32, i32* %3
%19664 = sub nsw i32 %19663, 1
store i32 %19664, i32* %3
%19665 = load i32, i32* %3
%19666 = and i32 %19665, -1044481
store i32 %19666, i32* %3
%19667 = load i32, i32* %3
%19668 = xor i32 %19667, 81954
store i32 %19668, i32* %3
%19669 = load i32, i32* %3
%19670 = srem i32 %19669, 268435443
store i32 %19670, i32* %3
%19671 = load i32, i32* %3
%19672 = add nsw i32 %19671, 6
store i32 %19672, i32* %3
%19673 = load i32, i32* %3
%19674 = mul nsw i32 %19673, 10
store i32 %19674, i32* %3
%19675 = load i32, i32* %3
%19676 = add nsw i32 %19675, 1
store i32 %19676, i32* %3
%19677 = load i32, i32* %3
%19678 = mul nsw i32 %19677, 2
store i32 %19678, i32* %3
%19679 = load i32, i32* %3
%19680 = sub nsw i32 %19679, 1
store i32 %19680, i32* %3
%19681 = load i32, i32* %3
%19682 = and i32 %19681, -1044481
store i32 %19682, i32* %3
%19683 = load i32, i32* %3
%19684 = xor i32 %19683, 81954
store i32 %19684, i32* %3
%19685 = load i32, i32* %3
%19686 = srem i32 %19685, 268435443
store i32 %19686, i32* %3
%19687 = load i32, i32* %3
%19688 = add nsw i32 %19687, 6
store i32 %19688, i32* %3
%19689 = load i32, i32* %3
%19690 = mul nsw i32 %19689, 10
store i32 %19690, i32* %3
%19691 = load i32, i32* %3
%19692 = add nsw i32 %19691, 1
store i32 %19692, i32* %3
%19693 = load i32, i32* %3
%19694 = mul nsw i32 %19693, 2
store i32 %19694, i32* %3
%19695 = load i32, i32* %3
%19696 = sub nsw i32 %19695, 1
store i32 %19696, i32* %3
%19697 = load i32, i32* %3
%19698 = and i32 %19697, -1044481
store i32 %19698, i32* %3
%19699 = load i32, i32* %3
%19700 = xor i32 %19699, 81954
store i32 %19700, i32* %3
%19701 = load i32, i32* %3
%19702 = srem i32 %19701, 268435443
store i32 %19702, i32* %3
%19703 = load i32, i32* %3
%19704 = add nsw i32 %19703, 6
store i32 %19704, i32* %3
%19705 = load i32, i32* %3
%19706 = mul nsw i32 %19705, 10
store i32 %19706, i32* %3
%19707 = load i32, i32* %3
%19708 = add nsw i32 %19707, 1
store i32 %19708, i32* %3
%19709 = load i32, i32* %3
%19710 = mul nsw i32 %19709, 2
store i32 %19710, i32* %3
%19711 = load i32, i32* %3
%19712 = sub nsw i32 %19711, 1
store i32 %19712, i32* %3
%19713 = load i32, i32* %3
%19714 = and i32 %19713, -1044481
store i32 %19714, i32* %3
%19715 = load i32, i32* %3
%19716 = xor i32 %19715, 81954
store i32 %19716, i32* %3
%19717 = load i32, i32* %3
%19718 = srem i32 %19717, 268435443
store i32 %19718, i32* %3
%19719 = load i32, i32* %3
%19720 = add nsw i32 %19719, 6
store i32 %19720, i32* %3
%19721 = load i32, i32* %3
%19722 = mul nsw i32 %19721, 10
store i32 %19722, i32* %3
%19723 = load i32, i32* %3
%19724 = add nsw i32 %19723, 1
store i32 %19724, i32* %3
%19725 = load i32, i32* %3
%19726 = mul nsw i32 %19725, 2
store i32 %19726, i32* %3
%19727 = load i32, i32* %3
%19728 = sub nsw i32 %19727, 1
store i32 %19728, i32* %3
%19729 = load i32, i32* %3
%19730 = and i32 %19729, -1044481
store i32 %19730, i32* %3
%19731 = load i32, i32* %3
%19732 = xor i32 %19731, 81954
store i32 %19732, i32* %3
%19733 = load i32, i32* %3
%19734 = srem i32 %19733, 268435443
store i32 %19734, i32* %3
%19735 = load i32, i32* %3
%19736 = add nsw i32 %19735, 6
store i32 %19736, i32* %3
%19737 = load i32, i32* %3
%19738 = mul nsw i32 %19737, 10
store i32 %19738, i32* %3
%19739 = load i32, i32* %3
%19740 = add nsw i32 %19739, 1
store i32 %19740, i32* %3
%19741 = load i32, i32* %3
%19742 = mul nsw i32 %19741, 2
store i32 %19742, i32* %3
%19743 = load i32, i32* %3
%19744 = sub nsw i32 %19743, 1
store i32 %19744, i32* %3
%19745 = load i32, i32* %3
%19746 = and i32 %19745, -1044481
store i32 %19746, i32* %3
%19747 = load i32, i32* %3
%19748 = xor i32 %19747, 81954
store i32 %19748, i32* %3
%19749 = load i32, i32* %3
%19750 = srem i32 %19749, 268435443
store i32 %19750, i32* %3
%19751 = load i32, i32* %3
%19752 = add nsw i32 %19751, 6
store i32 %19752, i32* %3
%19753 = load i32, i32* %3
%19754 = mul nsw i32 %19753, 10
store i32 %19754, i32* %3
%19755 = load i32, i32* %3
%19756 = add nsw i32 %19755, 1
store i32 %19756, i32* %3
%19757 = load i32, i32* %3
%19758 = mul nsw i32 %19757, 2
store i32 %19758, i32* %3
%19759 = load i32, i32* %3
%19760 = sub nsw i32 %19759, 1
store i32 %19760, i32* %3
%19761 = load i32, i32* %3
%19762 = and i32 %19761, -1044481
store i32 %19762, i32* %3
%19763 = load i32, i32* %3
%19764 = xor i32 %19763, 81954
store i32 %19764, i32* %3
%19765 = load i32, i32* %3
%19766 = srem i32 %19765, 268435443
store i32 %19766, i32* %3
%19767 = load i32, i32* %3
%19768 = add nsw i32 %19767, 6
store i32 %19768, i32* %3
%19769 = load i32, i32* %3
%19770 = mul nsw i32 %19769, 10
store i32 %19770, i32* %3
%19771 = load i32, i32* %3
%19772 = add nsw i32 %19771, 1
store i32 %19772, i32* %3
%19773 = load i32, i32* %3
%19774 = mul nsw i32 %19773, 2
store i32 %19774, i32* %3
%19775 = load i32, i32* %3
%19776 = sub nsw i32 %19775, 1
store i32 %19776, i32* %3
%19777 = load i32, i32* %3
%19778 = and i32 %19777, -1044481
store i32 %19778, i32* %3
%19779 = load i32, i32* %3
%19780 = xor i32 %19779, 81954
store i32 %19780, i32* %3
%19781 = load i32, i32* %3
%19782 = srem i32 %19781, 268435443
store i32 %19782, i32* %3
%19783 = load i32, i32* %3
%19784 = add nsw i32 %19783, 6
store i32 %19784, i32* %3
%19785 = load i32, i32* %3
%19786 = mul nsw i32 %19785, 10
store i32 %19786, i32* %3
%19787 = load i32, i32* %3
%19788 = add nsw i32 %19787, 1
store i32 %19788, i32* %3
%19789 = load i32, i32* %3
%19790 = mul nsw i32 %19789, 2
store i32 %19790, i32* %3
%19791 = load i32, i32* %3
%19792 = sub nsw i32 %19791, 1
store i32 %19792, i32* %3
%19793 = load i32, i32* %3
%19794 = and i32 %19793, -1044481
store i32 %19794, i32* %3
%19795 = load i32, i32* %3
%19796 = xor i32 %19795, 81954
store i32 %19796, i32* %3
%19797 = load i32, i32* %3
%19798 = srem i32 %19797, 268435443
store i32 %19798, i32* %3
%19799 = load i32, i32* %3
%19800 = add nsw i32 %19799, 6
store i32 %19800, i32* %3
%19801 = load i32, i32* %3
%19802 = mul nsw i32 %19801, 10
store i32 %19802, i32* %3
%19803 = load i32, i32* %3
%19804 = add nsw i32 %19803, 1
store i32 %19804, i32* %3
%19805 = load i32, i32* %3
%19806 = mul nsw i32 %19805, 2
store i32 %19806, i32* %3
%19807 = load i32, i32* %3
%19808 = sub nsw i32 %19807, 1
store i32 %19808, i32* %3
%19809 = load i32, i32* %3
%19810 = and i32 %19809, -1044481
store i32 %19810, i32* %3
%19811 = load i32, i32* %3
%19812 = xor i32 %19811, 81954
store i32 %19812, i32* %3
%19813 = load i32, i32* %3
%19814 = srem i32 %19813, 268435443
store i32 %19814, i32* %3
%19815 = load i32, i32* %3
%19816 = add nsw i32 %19815, 6
store i32 %19816, i32* %3
%19817 = load i32, i32* %3
%19818 = mul nsw i32 %19817, 10
store i32 %19818, i32* %3
%19819 = load i32, i32* %3
%19820 = add nsw i32 %19819, 1
store i32 %19820, i32* %3
%19821 = load i32, i32* %3
%19822 = mul nsw i32 %19821, 2
store i32 %19822, i32* %3
%19823 = load i32, i32* %3
%19824 = sub nsw i32 %19823, 1
store i32 %19824, i32* %3
%19825 = load i32, i32* %3
%19826 = and i32 %19825, -1044481
store i32 %19826, i32* %3
%19827 = load i32, i32* %3
%19828 = xor i32 %19827, 81954
store i32 %19828, i32* %3
%19829 = load i32, i32* %3
%19830 = srem i32 %19829, 268435443
store i32 %19830, i32* %3
%19831 = load i32, i32* %3
%19832 = add nsw i32 %19831, 6
store i32 %19832, i32* %3
%19833 = load i32, i32* %3
%19834 = mul nsw i32 %19833, 10
store i32 %19834, i32* %3
%19835 = load i32, i32* %3
%19836 = add nsw i32 %19835, 1
store i32 %19836, i32* %3
%19837 = load i32, i32* %3
%19838 = mul nsw i32 %19837, 2
store i32 %19838, i32* %3
%19839 = load i32, i32* %3
%19840 = sub nsw i32 %19839, 1
store i32 %19840, i32* %3
%19841 = load i32, i32* %3
%19842 = and i32 %19841, -1044481
store i32 %19842, i32* %3
%19843 = load i32, i32* %3
%19844 = xor i32 %19843, 81954
store i32 %19844, i32* %3
%19845 = load i32, i32* %3
%19846 = srem i32 %19845, 268435443
store i32 %19846, i32* %3
%19847 = load i32, i32* %3
%19848 = add nsw i32 %19847, 6
store i32 %19848, i32* %3
%19849 = load i32, i32* %3
%19850 = mul nsw i32 %19849, 10
store i32 %19850, i32* %3
%19851 = load i32, i32* %3
%19852 = add nsw i32 %19851, 1
store i32 %19852, i32* %3
%19853 = load i32, i32* %3
%19854 = mul nsw i32 %19853, 2
store i32 %19854, i32* %3
%19855 = load i32, i32* %3
%19856 = sub nsw i32 %19855, 1
store i32 %19856, i32* %3
%19857 = load i32, i32* %3
%19858 = and i32 %19857, -1044481
store i32 %19858, i32* %3
%19859 = load i32, i32* %3
%19860 = xor i32 %19859, 81954
store i32 %19860, i32* %3
%19861 = load i32, i32* %3
%19862 = srem i32 %19861, 268435443
store i32 %19862, i32* %3
%19863 = load i32, i32* %3
%19864 = add nsw i32 %19863, 6
store i32 %19864, i32* %3
%19865 = load i32, i32* %3
%19866 = mul nsw i32 %19865, 10
store i32 %19866, i32* %3
%19867 = load i32, i32* %3
%19868 = add nsw i32 %19867, 1
store i32 %19868, i32* %3
%19869 = load i32, i32* %3
%19870 = mul nsw i32 %19869, 2
store i32 %19870, i32* %3
%19871 = load i32, i32* %3
%19872 = sub nsw i32 %19871, 1
store i32 %19872, i32* %3
%19873 = load i32, i32* %3
%19874 = and i32 %19873, -1044481
store i32 %19874, i32* %3
%19875 = load i32, i32* %3
%19876 = xor i32 %19875, 81954
store i32 %19876, i32* %3
%19877 = load i32, i32* %3
%19878 = srem i32 %19877, 268435443
store i32 %19878, i32* %3
%19879 = load i32, i32* %3
%19880 = add nsw i32 %19879, 6
store i32 %19880, i32* %3
%19881 = load i32, i32* %3
%19882 = mul nsw i32 %19881, 10
store i32 %19882, i32* %3
%19883 = load i32, i32* %3
%19884 = add nsw i32 %19883, 1
store i32 %19884, i32* %3
%19885 = load i32, i32* %3
%19886 = mul nsw i32 %19885, 2
store i32 %19886, i32* %3
%19887 = load i32, i32* %3
%19888 = sub nsw i32 %19887, 1
store i32 %19888, i32* %3
%19889 = load i32, i32* %3
%19890 = and i32 %19889, -1044481
store i32 %19890, i32* %3
%19891 = load i32, i32* %3
%19892 = xor i32 %19891, 81954
store i32 %19892, i32* %3
%19893 = load i32, i32* %3
%19894 = srem i32 %19893, 268435443
store i32 %19894, i32* %3
%19895 = load i32, i32* %3
%19896 = add nsw i32 %19895, 6
store i32 %19896, i32* %3
%19897 = load i32, i32* %3
%19898 = mul nsw i32 %19897, 10
store i32 %19898, i32* %3
%19899 = load i32, i32* %3
%19900 = add nsw i32 %19899, 1
store i32 %19900, i32* %3
%19901 = load i32, i32* %3
%19902 = mul nsw i32 %19901, 2
store i32 %19902, i32* %3
%19903 = load i32, i32* %3
%19904 = sub nsw i32 %19903, 1
store i32 %19904, i32* %3
%19905 = load i32, i32* %3
%19906 = and i32 %19905, -1044481
store i32 %19906, i32* %3
%19907 = load i32, i32* %3
%19908 = xor i32 %19907, 81954
store i32 %19908, i32* %3
%19909 = load i32, i32* %3
%19910 = srem i32 %19909, 268435443
store i32 %19910, i32* %3
%19911 = load i32, i32* %3
%19912 = add nsw i32 %19911, 6
store i32 %19912, i32* %3
%19913 = load i32, i32* %3
%19914 = mul nsw i32 %19913, 10
store i32 %19914, i32* %3
%19915 = load i32, i32* %3
%19916 = add nsw i32 %19915, 1
store i32 %19916, i32* %3
%19917 = load i32, i32* %3
%19918 = mul nsw i32 %19917, 2
store i32 %19918, i32* %3
%19919 = load i32, i32* %3
%19920 = sub nsw i32 %19919, 1
store i32 %19920, i32* %3
%19921 = load i32, i32* %3
%19922 = and i32 %19921, -1044481
store i32 %19922, i32* %3
%19923 = load i32, i32* %3
%19924 = xor i32 %19923, 81954
store i32 %19924, i32* %3
%19925 = load i32, i32* %3
%19926 = srem i32 %19925, 268435443
store i32 %19926, i32* %3
%19927 = load i32, i32* %3
%19928 = add nsw i32 %19927, 6
store i32 %19928, i32* %3
%19929 = load i32, i32* %3
%19930 = mul nsw i32 %19929, 10
store i32 %19930, i32* %3
%19931 = load i32, i32* %3
%19932 = add nsw i32 %19931, 1
store i32 %19932, i32* %3
%19933 = load i32, i32* %3
%19934 = mul nsw i32 %19933, 2
store i32 %19934, i32* %3
%19935 = load i32, i32* %3
%19936 = sub nsw i32 %19935, 1
store i32 %19936, i32* %3
%19937 = load i32, i32* %3
%19938 = and i32 %19937, -1044481
store i32 %19938, i32* %3
%19939 = load i32, i32* %3
%19940 = xor i32 %19939, 81954
store i32 %19940, i32* %3
%19941 = load i32, i32* %3
%19942 = srem i32 %19941, 268435443
store i32 %19942, i32* %3
%19943 = load i32, i32* %3
%19944 = add nsw i32 %19943, 6
store i32 %19944, i32* %3
%19945 = load i32, i32* %3
%19946 = mul nsw i32 %19945, 10
store i32 %19946, i32* %3
%19947 = load i32, i32* %3
%19948 = add nsw i32 %19947, 1
store i32 %19948, i32* %3
%19949 = load i32, i32* %3
%19950 = mul nsw i32 %19949, 2
store i32 %19950, i32* %3
%19951 = load i32, i32* %3
%19952 = sub nsw i32 %19951, 1
store i32 %19952, i32* %3
%19953 = load i32, i32* %3
%19954 = and i32 %19953, -1044481
store i32 %19954, i32* %3
%19955 = load i32, i32* %3
%19956 = xor i32 %19955, 81954
store i32 %19956, i32* %3
%19957 = load i32, i32* %3
%19958 = srem i32 %19957, 268435443
store i32 %19958, i32* %3
%19959 = load i32, i32* %3
%19960 = add nsw i32 %19959, 6
store i32 %19960, i32* %3
%19961 = load i32, i32* %3
%19962 = mul nsw i32 %19961, 10
store i32 %19962, i32* %3
%19963 = load i32, i32* %3
%19964 = add nsw i32 %19963, 1
store i32 %19964, i32* %3
%19965 = load i32, i32* %3
%19966 = mul nsw i32 %19965, 2
store i32 %19966, i32* %3
%19967 = load i32, i32* %3
%19968 = sub nsw i32 %19967, 1
store i32 %19968, i32* %3
%19969 = load i32, i32* %3
%19970 = and i32 %19969, -1044481
store i32 %19970, i32* %3
%19971 = load i32, i32* %3
%19972 = xor i32 %19971, 81954
store i32 %19972, i32* %3
%19973 = load i32, i32* %3
%19974 = srem i32 %19973, 268435443
store i32 %19974, i32* %3
%19975 = load i32, i32* %3
%19976 = add nsw i32 %19975, 6
store i32 %19976, i32* %3
%19977 = load i32, i32* %3
%19978 = mul nsw i32 %19977, 10
store i32 %19978, i32* %3
%19979 = load i32, i32* %3
%19980 = add nsw i32 %19979, 1
store i32 %19980, i32* %3
%19981 = load i32, i32* %3
%19982 = mul nsw i32 %19981, 2
store i32 %19982, i32* %3
%19983 = load i32, i32* %3
%19984 = sub nsw i32 %19983, 1
store i32 %19984, i32* %3
%19985 = load i32, i32* %3
%19986 = and i32 %19985, -1044481
store i32 %19986, i32* %3
%19987 = load i32, i32* %3
%19988 = xor i32 %19987, 81954
store i32 %19988, i32* %3
%19989 = load i32, i32* %3
%19990 = srem i32 %19989, 268435443
store i32 %19990, i32* %3
%19991 = load i32, i32* %3
%19992 = add nsw i32 %19991, 6
store i32 %19992, i32* %3
%19993 = load i32, i32* %3
%19994 = mul nsw i32 %19993, 10
store i32 %19994, i32* %3
%19995 = load i32, i32* %3
%19996 = add nsw i32 %19995, 1
store i32 %19996, i32* %3
%19997 = load i32, i32* %3
%19998 = mul nsw i32 %19997, 2
store i32 %19998, i32* %3
%19999 = load i32, i32* %3
%20000 = sub nsw i32 %19999, 1
store i32 %20000, i32* %3
%20001 = load i32, i32* %3
%20002 = and i32 %20001, -1044481
store i32 %20002, i32* %3
%20003 = load i32, i32* %3
%20004 = xor i32 %20003, 81954
store i32 %20004, i32* %3
%20005 = load i32, i32* %3
%20006 = srem i32 %20005, 268435443
store i32 %20006, i32* %3
%20007 = load i32, i32* %3
%20008 = add nsw i32 %20007, 6
store i32 %20008, i32* %3
%20009 = load i32, i32* %3
%20010 = mul nsw i32 %20009, 10
store i32 %20010, i32* %3
%20011 = load i32, i32* %3
%20012 = add nsw i32 %20011, 1
store i32 %20012, i32* %3
%20013 = load i32, i32* %3
%20014 = mul nsw i32 %20013, 2
store i32 %20014, i32* %3
%20015 = load i32, i32* %3
%20016 = sub nsw i32 %20015, 1
store i32 %20016, i32* %3
%20017 = load i32, i32* %3
%20018 = and i32 %20017, -1044481
store i32 %20018, i32* %3
%20019 = load i32, i32* %3
%20020 = xor i32 %20019, 81954
store i32 %20020, i32* %3
%20021 = load i32, i32* %3
%20022 = srem i32 %20021, 268435443
store i32 %20022, i32* %3
%20023 = load i32, i32* %3
%20024 = add nsw i32 %20023, 6
store i32 %20024, i32* %3
%20025 = load i32, i32* %3
%20026 = mul nsw i32 %20025, 10
store i32 %20026, i32* %3
%20027 = load i32, i32* %3
%20028 = add nsw i32 %20027, 1
store i32 %20028, i32* %3
%20029 = load i32, i32* %3
%20030 = mul nsw i32 %20029, 2
store i32 %20030, i32* %3
%20031 = load i32, i32* %3
%20032 = sub nsw i32 %20031, 1
store i32 %20032, i32* %3
%20033 = load i32, i32* %3
%20034 = and i32 %20033, -1044481
store i32 %20034, i32* %3
%20035 = load i32, i32* %3
%20036 = xor i32 %20035, 81954
store i32 %20036, i32* %3
%20037 = load i32, i32* %3
%20038 = srem i32 %20037, 268435443
store i32 %20038, i32* %3
%20039 = load i32, i32* %3
%20040 = add nsw i32 %20039, 6
store i32 %20040, i32* %3
%20041 = load i32, i32* %3
%20042 = mul nsw i32 %20041, 10
store i32 %20042, i32* %3
%20043 = load i32, i32* %3
%20044 = add nsw i32 %20043, 1
store i32 %20044, i32* %3
%20045 = load i32, i32* %3
%20046 = mul nsw i32 %20045, 2
store i32 %20046, i32* %3
%20047 = load i32, i32* %3
%20048 = sub nsw i32 %20047, 1
store i32 %20048, i32* %3
%20049 = load i32, i32* %3
%20050 = and i32 %20049, -1044481
store i32 %20050, i32* %3
%20051 = load i32, i32* %3
%20052 = xor i32 %20051, 81954
store i32 %20052, i32* %3
%20053 = load i32, i32* %3
%20054 = srem i32 %20053, 268435443
store i32 %20054, i32* %3
%20055 = load i32, i32* %3
%20056 = add nsw i32 %20055, 6
store i32 %20056, i32* %3
%20057 = load i32, i32* %3
%20058 = mul nsw i32 %20057, 10
store i32 %20058, i32* %3
%20059 = load i32, i32* %3
%20060 = add nsw i32 %20059, 1
store i32 %20060, i32* %3
%20061 = load i32, i32* %3
%20062 = mul nsw i32 %20061, 2
store i32 %20062, i32* %3
%20063 = load i32, i32* %3
%20064 = sub nsw i32 %20063, 1
store i32 %20064, i32* %3
%20065 = load i32, i32* %3
%20066 = and i32 %20065, -1044481
store i32 %20066, i32* %3
%20067 = load i32, i32* %3
%20068 = xor i32 %20067, 81954
store i32 %20068, i32* %3
%20069 = load i32, i32* %3
%20070 = srem i32 %20069, 268435443
store i32 %20070, i32* %3
%20071 = load i32, i32* %3
%20072 = add nsw i32 %20071, 6
store i32 %20072, i32* %3
%20073 = load i32, i32* %3
%20074 = mul nsw i32 %20073, 10
store i32 %20074, i32* %3
%20075 = load i32, i32* %3
%20076 = add nsw i32 %20075, 1
store i32 %20076, i32* %3
%20077 = load i32, i32* %3
%20078 = mul nsw i32 %20077, 2
store i32 %20078, i32* %3
%20079 = load i32, i32* %3
%20080 = sub nsw i32 %20079, 1
store i32 %20080, i32* %3
%20081 = load i32, i32* %3
%20082 = and i32 %20081, -1044481
store i32 %20082, i32* %3
%20083 = load i32, i32* %3
%20084 = xor i32 %20083, 81954
store i32 %20084, i32* %3
%20085 = load i32, i32* %3
%20086 = srem i32 %20085, 268435443
store i32 %20086, i32* %3
%20087 = load i32, i32* %3
%20088 = add nsw i32 %20087, 6
store i32 %20088, i32* %3
%20089 = load i32, i32* %3
%20090 = mul nsw i32 %20089, 10
store i32 %20090, i32* %3
%20091 = load i32, i32* %3
%20092 = add nsw i32 %20091, 1
store i32 %20092, i32* %3
%20093 = load i32, i32* %3
%20094 = mul nsw i32 %20093, 2
store i32 %20094, i32* %3
%20095 = load i32, i32* %3
%20096 = sub nsw i32 %20095, 1
store i32 %20096, i32* %3
%20097 = load i32, i32* %3
%20098 = and i32 %20097, -1044481
store i32 %20098, i32* %3
%20099 = load i32, i32* %3
%20100 = xor i32 %20099, 81954
store i32 %20100, i32* %3
%20101 = load i32, i32* %3
%20102 = srem i32 %20101, 268435443
store i32 %20102, i32* %3
%20103 = load i32, i32* %3
%20104 = add nsw i32 %20103, 6
store i32 %20104, i32* %3
%20105 = load i32, i32* %3
%20106 = mul nsw i32 %20105, 10
store i32 %20106, i32* %3
%20107 = load i32, i32* %3
%20108 = add nsw i32 %20107, 1
store i32 %20108, i32* %3
%20109 = load i32, i32* %3
%20110 = mul nsw i32 %20109, 2
store i32 %20110, i32* %3
%20111 = load i32, i32* %3
%20112 = sub nsw i32 %20111, 1
store i32 %20112, i32* %3
%20113 = load i32, i32* %3
%20114 = and i32 %20113, -1044481
store i32 %20114, i32* %3
%20115 = load i32, i32* %3
%20116 = xor i32 %20115, 81954
store i32 %20116, i32* %3
%20117 = load i32, i32* %3
%20118 = srem i32 %20117, 268435443
store i32 %20118, i32* %3
%20119 = load i32, i32* %3
%20120 = add nsw i32 %20119, 6
store i32 %20120, i32* %3
%20121 = load i32, i32* %3
%20122 = mul nsw i32 %20121, 10
store i32 %20122, i32* %3
%20123 = load i32, i32* %3
%20124 = add nsw i32 %20123, 1
store i32 %20124, i32* %3
%20125 = load i32, i32* %3
%20126 = mul nsw i32 %20125, 2
store i32 %20126, i32* %3
%20127 = load i32, i32* %3
%20128 = sub nsw i32 %20127, 1
store i32 %20128, i32* %3
%20129 = load i32, i32* %3
%20130 = and i32 %20129, -1044481
store i32 %20130, i32* %3
%20131 = load i32, i32* %3
%20132 = xor i32 %20131, 81954
store i32 %20132, i32* %3
%20133 = load i32, i32* %3
%20134 = srem i32 %20133, 268435443
store i32 %20134, i32* %3
%20135 = load i32, i32* %3
%20136 = add nsw i32 %20135, 6
store i32 %20136, i32* %3
%20137 = load i32, i32* %3
%20138 = mul nsw i32 %20137, 10
store i32 %20138, i32* %3
%20139 = load i32, i32* %3
%20140 = add nsw i32 %20139, 1
store i32 %20140, i32* %3
%20141 = load i32, i32* %3
%20142 = mul nsw i32 %20141, 2
store i32 %20142, i32* %3
%20143 = load i32, i32* %3
%20144 = sub nsw i32 %20143, 1
store i32 %20144, i32* %3
%20145 = load i32, i32* %3
%20146 = and i32 %20145, -1044481
store i32 %20146, i32* %3
%20147 = load i32, i32* %3
%20148 = xor i32 %20147, 81954
store i32 %20148, i32* %3
%20149 = load i32, i32* %3
%20150 = srem i32 %20149, 268435443
store i32 %20150, i32* %3
%20151 = load i32, i32* %3
%20152 = add nsw i32 %20151, 6
store i32 %20152, i32* %3
%20153 = load i32, i32* %3
%20154 = mul nsw i32 %20153, 10
store i32 %20154, i32* %3
%20155 = load i32, i32* %3
%20156 = add nsw i32 %20155, 1
store i32 %20156, i32* %3
%20157 = load i32, i32* %3
%20158 = mul nsw i32 %20157, 2
store i32 %20158, i32* %3
%20159 = load i32, i32* %3
%20160 = sub nsw i32 %20159, 1
store i32 %20160, i32* %3
%20161 = load i32, i32* %3
%20162 = and i32 %20161, -1044481
store i32 %20162, i32* %3
%20163 = load i32, i32* %3
%20164 = xor i32 %20163, 81954
store i32 %20164, i32* %3
%20165 = load i32, i32* %3
%20166 = srem i32 %20165, 268435443
store i32 %20166, i32* %3
%20167 = load i32, i32* %3
%20168 = add nsw i32 %20167, 6
store i32 %20168, i32* %3
%20169 = load i32, i32* %3
%20170 = mul nsw i32 %20169, 10
store i32 %20170, i32* %3
%20171 = load i32, i32* %3
%20172 = add nsw i32 %20171, 1
store i32 %20172, i32* %3
%20173 = load i32, i32* %3
%20174 = mul nsw i32 %20173, 2
store i32 %20174, i32* %3
%20175 = load i32, i32* %3
%20176 = sub nsw i32 %20175, 1
store i32 %20176, i32* %3
%20177 = load i32, i32* %3
%20178 = and i32 %20177, -1044481
store i32 %20178, i32* %3
%20179 = load i32, i32* %3
%20180 = xor i32 %20179, 81954
store i32 %20180, i32* %3
%20181 = load i32, i32* %3
%20182 = srem i32 %20181, 268435443
store i32 %20182, i32* %3
%20183 = load i32, i32* %3
%20184 = add nsw i32 %20183, 6
store i32 %20184, i32* %3
%20185 = load i32, i32* %3
%20186 = mul nsw i32 %20185, 10
store i32 %20186, i32* %3
%20187 = load i32, i32* %3
%20188 = add nsw i32 %20187, 1
store i32 %20188, i32* %3
%20189 = load i32, i32* %3
%20190 = mul nsw i32 %20189, 2
store i32 %20190, i32* %3
%20191 = load i32, i32* %3
%20192 = sub nsw i32 %20191, 1
store i32 %20192, i32* %3
%20193 = load i32, i32* %3
%20194 = and i32 %20193, -1044481
store i32 %20194, i32* %3
%20195 = load i32, i32* %3
%20196 = xor i32 %20195, 81954
store i32 %20196, i32* %3
%20197 = load i32, i32* %3
%20198 = srem i32 %20197, 268435443
store i32 %20198, i32* %3
%20199 = load i32, i32* %3
%20200 = add nsw i32 %20199, 6
store i32 %20200, i32* %3
%20201 = load i32, i32* %3
%20202 = mul nsw i32 %20201, 10
store i32 %20202, i32* %3
%20203 = load i32, i32* %3
%20204 = add nsw i32 %20203, 1
store i32 %20204, i32* %3
%20205 = load i32, i32* %3
%20206 = mul nsw i32 %20205, 2
store i32 %20206, i32* %3
%20207 = load i32, i32* %3
%20208 = sub nsw i32 %20207, 1
store i32 %20208, i32* %3
%20209 = load i32, i32* %3
%20210 = and i32 %20209, -1044481
store i32 %20210, i32* %3
%20211 = load i32, i32* %3
%20212 = xor i32 %20211, 81954
store i32 %20212, i32* %3
%20213 = load i32, i32* %3
%20214 = srem i32 %20213, 268435443
store i32 %20214, i32* %3
%20215 = load i32, i32* %3
%20216 = add nsw i32 %20215, 6
store i32 %20216, i32* %3
%20217 = load i32, i32* %3
%20218 = mul nsw i32 %20217, 10
store i32 %20218, i32* %3
%20219 = load i32, i32* %3
%20220 = add nsw i32 %20219, 1
store i32 %20220, i32* %3
%20221 = load i32, i32* %3
%20222 = mul nsw i32 %20221, 2
store i32 %20222, i32* %3
%20223 = load i32, i32* %3
%20224 = sub nsw i32 %20223, 1
store i32 %20224, i32* %3
%20225 = load i32, i32* %3
%20226 = and i32 %20225, -1044481
store i32 %20226, i32* %3
%20227 = load i32, i32* %3
%20228 = xor i32 %20227, 81954
store i32 %20228, i32* %3
%20229 = load i32, i32* %3
%20230 = srem i32 %20229, 268435443
store i32 %20230, i32* %3
%20231 = load i32, i32* %3
%20232 = add nsw i32 %20231, 6
store i32 %20232, i32* %3
%20233 = load i32, i32* %3
%20234 = mul nsw i32 %20233, 10
store i32 %20234, i32* %3
%20235 = load i32, i32* %3
%20236 = add nsw i32 %20235, 1
store i32 %20236, i32* %3
%20237 = load i32, i32* %3
%20238 = mul nsw i32 %20237, 2
store i32 %20238, i32* %3
%20239 = load i32, i32* %3
%20240 = sub nsw i32 %20239, 1
store i32 %20240, i32* %3
%20241 = load i32, i32* %3
%20242 = and i32 %20241, -1044481
store i32 %20242, i32* %3
%20243 = load i32, i32* %3
%20244 = xor i32 %20243, 81954
store i32 %20244, i32* %3
%20245 = load i32, i32* %3
%20246 = srem i32 %20245, 268435443
store i32 %20246, i32* %3
%20247 = load i32, i32* %3
%20248 = add nsw i32 %20247, 6
store i32 %20248, i32* %3
%20249 = load i32, i32* %3
%20250 = mul nsw i32 %20249, 10
store i32 %20250, i32* %3
%20251 = load i32, i32* %3
%20252 = add nsw i32 %20251, 1
store i32 %20252, i32* %3
%20253 = load i32, i32* %3
%20254 = mul nsw i32 %20253, 2
store i32 %20254, i32* %3
%20255 = load i32, i32* %3
%20256 = sub nsw i32 %20255, 1
store i32 %20256, i32* %3
%20257 = load i32, i32* %3
%20258 = and i32 %20257, -1044481
store i32 %20258, i32* %3
%20259 = load i32, i32* %3
%20260 = xor i32 %20259, 81954
store i32 %20260, i32* %3
%20261 = load i32, i32* %3
%20262 = srem i32 %20261, 268435443
store i32 %20262, i32* %3
%20263 = load i32, i32* %3
%20264 = add nsw i32 %20263, 6
store i32 %20264, i32* %3
%20265 = load i32, i32* %3
%20266 = mul nsw i32 %20265, 10
store i32 %20266, i32* %3
%20267 = load i32, i32* %3
%20268 = add nsw i32 %20267, 1
store i32 %20268, i32* %3
%20269 = load i32, i32* %3
%20270 = mul nsw i32 %20269, 2
store i32 %20270, i32* %3
%20271 = load i32, i32* %3
%20272 = sub nsw i32 %20271, 1
store i32 %20272, i32* %3
%20273 = load i32, i32* %3
%20274 = and i32 %20273, -1044481
store i32 %20274, i32* %3
%20275 = load i32, i32* %3
%20276 = xor i32 %20275, 81954
store i32 %20276, i32* %3
%20277 = load i32, i32* %3
%20278 = srem i32 %20277, 268435443
store i32 %20278, i32* %3
%20279 = load i32, i32* %3
%20280 = add nsw i32 %20279, 6
store i32 %20280, i32* %3
%20281 = load i32, i32* %3
%20282 = mul nsw i32 %20281, 10
store i32 %20282, i32* %3
%20283 = load i32, i32* %3
%20284 = add nsw i32 %20283, 1
store i32 %20284, i32* %3
%20285 = load i32, i32* %3
%20286 = mul nsw i32 %20285, 2
store i32 %20286, i32* %3
%20287 = load i32, i32* %3
%20288 = sub nsw i32 %20287, 1
store i32 %20288, i32* %3
%20289 = load i32, i32* %3
%20290 = and i32 %20289, -1044481
store i32 %20290, i32* %3
%20291 = load i32, i32* %3
%20292 = xor i32 %20291, 81954
store i32 %20292, i32* %3
%20293 = load i32, i32* %3
%20294 = srem i32 %20293, 268435443
store i32 %20294, i32* %3
%20295 = load i32, i32* %3
%20296 = add nsw i32 %20295, 6
store i32 %20296, i32* %3
%20297 = load i32, i32* %3
%20298 = mul nsw i32 %20297, 10
store i32 %20298, i32* %3
%20299 = load i32, i32* %3
%20300 = add nsw i32 %20299, 1
store i32 %20300, i32* %3
%20301 = load i32, i32* %3
%20302 = mul nsw i32 %20301, 2
store i32 %20302, i32* %3
%20303 = load i32, i32* %3
%20304 = sub nsw i32 %20303, 1
store i32 %20304, i32* %3
%20305 = load i32, i32* %3
%20306 = and i32 %20305, -1044481
store i32 %20306, i32* %3
%20307 = load i32, i32* %3
%20308 = xor i32 %20307, 81954
store i32 %20308, i32* %3
%20309 = load i32, i32* %3
%20310 = srem i32 %20309, 268435443
store i32 %20310, i32* %3
%20311 = load i32, i32* %3
%20312 = add nsw i32 %20311, 6
store i32 %20312, i32* %3
%20313 = load i32, i32* %3
%20314 = mul nsw i32 %20313, 10
store i32 %20314, i32* %3
%20315 = load i32, i32* %3
%20316 = add nsw i32 %20315, 1
store i32 %20316, i32* %3
%20317 = load i32, i32* %3
%20318 = mul nsw i32 %20317, 2
store i32 %20318, i32* %3
%20319 = load i32, i32* %3
%20320 = sub nsw i32 %20319, 1
store i32 %20320, i32* %3
%20321 = load i32, i32* %3
%20322 = and i32 %20321, -1044481
store i32 %20322, i32* %3
%20323 = load i32, i32* %3
%20324 = xor i32 %20323, 81954
store i32 %20324, i32* %3
%20325 = load i32, i32* %3
%20326 = srem i32 %20325, 268435443
store i32 %20326, i32* %3
%20327 = load i32, i32* %3
%20328 = add nsw i32 %20327, 6
store i32 %20328, i32* %3
%20329 = load i32, i32* %3
%20330 = mul nsw i32 %20329, 10
store i32 %20330, i32* %3
%20331 = load i32, i32* %3
%20332 = add nsw i32 %20331, 1
store i32 %20332, i32* %3
%20333 = load i32, i32* %3
%20334 = mul nsw i32 %20333, 2
store i32 %20334, i32* %3
%20335 = load i32, i32* %3
%20336 = sub nsw i32 %20335, 1
store i32 %20336, i32* %3
%20337 = load i32, i32* %3
%20338 = and i32 %20337, -1044481
store i32 %20338, i32* %3
%20339 = load i32, i32* %3
%20340 = xor i32 %20339, 81954
store i32 %20340, i32* %3
%20341 = load i32, i32* %3
%20342 = srem i32 %20341, 268435443
store i32 %20342, i32* %3
%20343 = load i32, i32* %3
%20344 = add nsw i32 %20343, 6
store i32 %20344, i32* %3
%20345 = load i32, i32* %3
%20346 = mul nsw i32 %20345, 10
store i32 %20346, i32* %3
%20347 = load i32, i32* %3
%20348 = add nsw i32 %20347, 1
store i32 %20348, i32* %3
%20349 = load i32, i32* %3
%20350 = mul nsw i32 %20349, 2
store i32 %20350, i32* %3
%20351 = load i32, i32* %3
%20352 = sub nsw i32 %20351, 1
store i32 %20352, i32* %3
%20353 = load i32, i32* %3
%20354 = and i32 %20353, -1044481
store i32 %20354, i32* %3
%20355 = load i32, i32* %3
%20356 = xor i32 %20355, 81954
store i32 %20356, i32* %3
%20357 = load i32, i32* %3
%20358 = srem i32 %20357, 268435443
store i32 %20358, i32* %3
%20359 = load i32, i32* %3
%20360 = add nsw i32 %20359, 6
store i32 %20360, i32* %3
%20361 = load i32, i32* %3
%20362 = mul nsw i32 %20361, 10
store i32 %20362, i32* %3
%20363 = load i32, i32* %3
%20364 = add nsw i32 %20363, 1
store i32 %20364, i32* %3
%20365 = load i32, i32* %3
%20366 = mul nsw i32 %20365, 2
store i32 %20366, i32* %3
%20367 = load i32, i32* %3
%20368 = sub nsw i32 %20367, 1
store i32 %20368, i32* %3
%20369 = load i32, i32* %3
%20370 = and i32 %20369, -1044481
store i32 %20370, i32* %3
%20371 = load i32, i32* %3
%20372 = xor i32 %20371, 81954
store i32 %20372, i32* %3
%20373 = load i32, i32* %3
%20374 = srem i32 %20373, 268435443
store i32 %20374, i32* %3
%20375 = load i32, i32* %3
%20376 = add nsw i32 %20375, 6
store i32 %20376, i32* %3
%20377 = load i32, i32* %3
%20378 = mul nsw i32 %20377, 10
store i32 %20378, i32* %3
%20379 = load i32, i32* %3
%20380 = add nsw i32 %20379, 1
store i32 %20380, i32* %3
%20381 = load i32, i32* %3
%20382 = mul nsw i32 %20381, 2
store i32 %20382, i32* %3
%20383 = load i32, i32* %3
%20384 = sub nsw i32 %20383, 1
store i32 %20384, i32* %3
%20385 = load i32, i32* %3
%20386 = and i32 %20385, -1044481
store i32 %20386, i32* %3
%20387 = load i32, i32* %3
%20388 = xor i32 %20387, 81954
store i32 %20388, i32* %3
%20389 = load i32, i32* %3
%20390 = srem i32 %20389, 268435443
store i32 %20390, i32* %3
%20391 = load i32, i32* %3
%20392 = add nsw i32 %20391, 6
store i32 %20392, i32* %3
%20393 = load i32, i32* %3
%20394 = mul nsw i32 %20393, 10
store i32 %20394, i32* %3
%20395 = load i32, i32* %3
%20396 = add nsw i32 %20395, 1
store i32 %20396, i32* %3
%20397 = load i32, i32* %3
%20398 = mul nsw i32 %20397, 2
store i32 %20398, i32* %3
%20399 = load i32, i32* %3
%20400 = sub nsw i32 %20399, 1
store i32 %20400, i32* %3
%20401 = load i32, i32* %3
%20402 = and i32 %20401, -1044481
store i32 %20402, i32* %3
%20403 = load i32, i32* %3
%20404 = xor i32 %20403, 81954
store i32 %20404, i32* %3
%20405 = load i32, i32* %3
%20406 = srem i32 %20405, 268435443
store i32 %20406, i32* %3
%20407 = load i32, i32* %3
%20408 = add nsw i32 %20407, 6
store i32 %20408, i32* %3
%20409 = load i32, i32* %3
%20410 = mul nsw i32 %20409, 10
store i32 %20410, i32* %3
%20411 = load i32, i32* %3
%20412 = add nsw i32 %20411, 1
store i32 %20412, i32* %3
%20413 = load i32, i32* %3
%20414 = mul nsw i32 %20413, 2
store i32 %20414, i32* %3
%20415 = load i32, i32* %3
%20416 = sub nsw i32 %20415, 1
store i32 %20416, i32* %3
%20417 = load i32, i32* %3
%20418 = and i32 %20417, -1044481
store i32 %20418, i32* %3
%20419 = load i32, i32* %3
%20420 = xor i32 %20419, 81954
store i32 %20420, i32* %3
%20421 = load i32, i32* %3
%20422 = srem i32 %20421, 268435443
store i32 %20422, i32* %3
%20423 = load i32, i32* %3
%20424 = add nsw i32 %20423, 6
store i32 %20424, i32* %3
%20425 = load i32, i32* %3
%20426 = mul nsw i32 %20425, 10
store i32 %20426, i32* %3
%20427 = load i32, i32* %3
%20428 = add nsw i32 %20427, 1
store i32 %20428, i32* %3
%20429 = load i32, i32* %3
%20430 = mul nsw i32 %20429, 2
store i32 %20430, i32* %3
%20431 = load i32, i32* %3
%20432 = sub nsw i32 %20431, 1
store i32 %20432, i32* %3
%20433 = load i32, i32* %3
%20434 = and i32 %20433, -1044481
store i32 %20434, i32* %3
%20435 = load i32, i32* %3
%20436 = xor i32 %20435, 81954
store i32 %20436, i32* %3
%20437 = load i32, i32* %3
%20438 = srem i32 %20437, 268435443
store i32 %20438, i32* %3
%20439 = load i32, i32* %3
%20440 = add nsw i32 %20439, 6
store i32 %20440, i32* %3
%20441 = load i32, i32* %3
%20442 = mul nsw i32 %20441, 10
store i32 %20442, i32* %3
%20443 = load i32, i32* %3
%20444 = add nsw i32 %20443, 1
store i32 %20444, i32* %3
%20445 = load i32, i32* %3
%20446 = mul nsw i32 %20445, 2
store i32 %20446, i32* %3
%20447 = load i32, i32* %3
%20448 = sub nsw i32 %20447, 1
store i32 %20448, i32* %3
%20449 = load i32, i32* %3
%20450 = and i32 %20449, -1044481
store i32 %20450, i32* %3
%20451 = load i32, i32* %3
%20452 = xor i32 %20451, 81954
store i32 %20452, i32* %3
%20453 = load i32, i32* %3
%20454 = srem i32 %20453, 268435443
store i32 %20454, i32* %3
%20455 = load i32, i32* %3
%20456 = add nsw i32 %20455, 6
store i32 %20456, i32* %3
%20457 = load i32, i32* %3
%20458 = mul nsw i32 %20457, 10
store i32 %20458, i32* %3
%20459 = load i32, i32* %3
%20460 = add nsw i32 %20459, 1
store i32 %20460, i32* %3
%20461 = load i32, i32* %3
%20462 = mul nsw i32 %20461, 2
store i32 %20462, i32* %3
%20463 = load i32, i32* %3
%20464 = sub nsw i32 %20463, 1
store i32 %20464, i32* %3
%20465 = load i32, i32* %3
%20466 = and i32 %20465, -1044481
store i32 %20466, i32* %3
%20467 = load i32, i32* %3
%20468 = xor i32 %20467, 81954
store i32 %20468, i32* %3
%20469 = load i32, i32* %3
%20470 = srem i32 %20469, 268435443
store i32 %20470, i32* %3
%20471 = load i32, i32* %3
%20472 = add nsw i32 %20471, 6
store i32 %20472, i32* %3
%20473 = load i32, i32* %3
%20474 = mul nsw i32 %20473, 10
store i32 %20474, i32* %3
%20475 = load i32, i32* %3
%20476 = add nsw i32 %20475, 1
store i32 %20476, i32* %3
%20477 = load i32, i32* %3
%20478 = mul nsw i32 %20477, 2
store i32 %20478, i32* %3
%20479 = load i32, i32* %3
%20480 = sub nsw i32 %20479, 1
store i32 %20480, i32* %3
%20481 = load i32, i32* %3
%20482 = and i32 %20481, -1044481
store i32 %20482, i32* %3
%20483 = load i32, i32* %3
%20484 = xor i32 %20483, 81954
store i32 %20484, i32* %3
%20485 = load i32, i32* %3
%20486 = srem i32 %20485, 268435443
store i32 %20486, i32* %3
%20487 = load i32, i32* %3
%20488 = add nsw i32 %20487, 6
store i32 %20488, i32* %3
%20489 = load i32, i32* %3
%20490 = mul nsw i32 %20489, 10
store i32 %20490, i32* %3
%20491 = load i32, i32* %3
%20492 = add nsw i32 %20491, 1
store i32 %20492, i32* %3
%20493 = load i32, i32* %3
%20494 = mul nsw i32 %20493, 2
store i32 %20494, i32* %3
%20495 = load i32, i32* %3
%20496 = sub nsw i32 %20495, 1
store i32 %20496, i32* %3
%20497 = load i32, i32* %3
%20498 = and i32 %20497, -1044481
store i32 %20498, i32* %3
%20499 = load i32, i32* %3
%20500 = xor i32 %20499, 81954
store i32 %20500, i32* %3
%20501 = load i32, i32* %3
%20502 = srem i32 %20501, 268435443
store i32 %20502, i32* %3
%20503 = load i32, i32* %3
%20504 = add nsw i32 %20503, 6
store i32 %20504, i32* %3
%20505 = load i32, i32* %3
%20506 = mul nsw i32 %20505, 10
store i32 %20506, i32* %3
%20507 = load i32, i32* %3
%20508 = add nsw i32 %20507, 1
store i32 %20508, i32* %3
%20509 = load i32, i32* %3
%20510 = mul nsw i32 %20509, 2
store i32 %20510, i32* %3
%20511 = load i32, i32* %3
%20512 = sub nsw i32 %20511, 1
store i32 %20512, i32* %3
%20513 = load i32, i32* %3
%20514 = and i32 %20513, -1044481
store i32 %20514, i32* %3
%20515 = load i32, i32* %3
%20516 = xor i32 %20515, 81954
store i32 %20516, i32* %3
%20517 = load i32, i32* %3
%20518 = srem i32 %20517, 268435443
store i32 %20518, i32* %3
%20519 = load i32, i32* %3
%20520 = add nsw i32 %20519, 6
store i32 %20520, i32* %3
%20521 = load i32, i32* %3
%20522 = mul nsw i32 %20521, 10
store i32 %20522, i32* %3
%20523 = load i32, i32* %3
%20524 = add nsw i32 %20523, 1
store i32 %20524, i32* %3
%20525 = load i32, i32* %3
%20526 = mul nsw i32 %20525, 2
store i32 %20526, i32* %3
%20527 = load i32, i32* %3
%20528 = sub nsw i32 %20527, 1
store i32 %20528, i32* %3
%20529 = load i32, i32* %3
%20530 = and i32 %20529, -1044481
store i32 %20530, i32* %3
%20531 = load i32, i32* %3
%20532 = xor i32 %20531, 81954
store i32 %20532, i32* %3
%20533 = load i32, i32* %3
%20534 = srem i32 %20533, 268435443
store i32 %20534, i32* %3
%20535 = load i32, i32* %3
%20536 = add nsw i32 %20535, 6
store i32 %20536, i32* %3
%20537 = load i32, i32* %3
%20538 = mul nsw i32 %20537, 10
store i32 %20538, i32* %3
%20539 = load i32, i32* %3
%20540 = add nsw i32 %20539, 1
store i32 %20540, i32* %3
%20541 = load i32, i32* %3
%20542 = mul nsw i32 %20541, 2
store i32 %20542, i32* %3
%20543 = load i32, i32* %3
%20544 = sub nsw i32 %20543, 1
store i32 %20544, i32* %3
%20545 = load i32, i32* %3
%20546 = and i32 %20545, -1044481
store i32 %20546, i32* %3
%20547 = load i32, i32* %3
%20548 = xor i32 %20547, 81954
store i32 %20548, i32* %3
%20549 = load i32, i32* %3
%20550 = srem i32 %20549, 268435443
store i32 %20550, i32* %3
%20551 = load i32, i32* %3
%20552 = add nsw i32 %20551, 6
store i32 %20552, i32* %3
%20553 = load i32, i32* %3
%20554 = mul nsw i32 %20553, 10
store i32 %20554, i32* %3
%20555 = load i32, i32* %3
%20556 = add nsw i32 %20555, 1
store i32 %20556, i32* %3
%20557 = load i32, i32* %3
%20558 = mul nsw i32 %20557, 2
store i32 %20558, i32* %3
%20559 = load i32, i32* %3
%20560 = sub nsw i32 %20559, 1
store i32 %20560, i32* %3
%20561 = load i32, i32* %3
%20562 = and i32 %20561, -1044481
store i32 %20562, i32* %3
%20563 = load i32, i32* %3
%20564 = xor i32 %20563, 81954
store i32 %20564, i32* %3
%20565 = load i32, i32* %3
%20566 = srem i32 %20565, 268435443
store i32 %20566, i32* %3
%20567 = load i32, i32* %3
%20568 = add nsw i32 %20567, 6
store i32 %20568, i32* %3
%20569 = load i32, i32* %3
%20570 = mul nsw i32 %20569, 10
store i32 %20570, i32* %3
%20571 = load i32, i32* %3
%20572 = add nsw i32 %20571, 1
store i32 %20572, i32* %3
%20573 = load i32, i32* %3
%20574 = mul nsw i32 %20573, 2
store i32 %20574, i32* %3
%20575 = load i32, i32* %3
%20576 = sub nsw i32 %20575, 1
store i32 %20576, i32* %3
%20577 = load i32, i32* %3
%20578 = and i32 %20577, -1044481
store i32 %20578, i32* %3
%20579 = load i32, i32* %3
%20580 = xor i32 %20579, 81954
store i32 %20580, i32* %3
%20581 = load i32, i32* %3
%20582 = srem i32 %20581, 268435443
store i32 %20582, i32* %3
%20583 = load i32, i32* %3
%20584 = add nsw i32 %20583, 6
store i32 %20584, i32* %3
%20585 = load i32, i32* %3
%20586 = mul nsw i32 %20585, 10
store i32 %20586, i32* %3
%20587 = load i32, i32* %3
%20588 = add nsw i32 %20587, 1
store i32 %20588, i32* %3
%20589 = load i32, i32* %3
%20590 = mul nsw i32 %20589, 2
store i32 %20590, i32* %3
%20591 = load i32, i32* %3
%20592 = sub nsw i32 %20591, 1
store i32 %20592, i32* %3
%20593 = load i32, i32* %3
%20594 = and i32 %20593, -1044481
store i32 %20594, i32* %3
%20595 = load i32, i32* %3
%20596 = xor i32 %20595, 81954
store i32 %20596, i32* %3
%20597 = load i32, i32* %3
%20598 = srem i32 %20597, 268435443
store i32 %20598, i32* %3
%20599 = load i32, i32* %3
%20600 = add nsw i32 %20599, 6
store i32 %20600, i32* %3
%20601 = load i32, i32* %3
%20602 = mul nsw i32 %20601, 10
store i32 %20602, i32* %3
%20603 = load i32, i32* %3
%20604 = add nsw i32 %20603, 1
store i32 %20604, i32* %3
%20605 = load i32, i32* %3
%20606 = mul nsw i32 %20605, 2
store i32 %20606, i32* %3
%20607 = load i32, i32* %3
%20608 = sub nsw i32 %20607, 1
store i32 %20608, i32* %3
%20609 = load i32, i32* %3
%20610 = and i32 %20609, -1044481
store i32 %20610, i32* %3
%20611 = load i32, i32* %3
%20612 = xor i32 %20611, 81954
store i32 %20612, i32* %3
%20613 = load i32, i32* %3
%20614 = srem i32 %20613, 268435443
store i32 %20614, i32* %3
%20615 = load i32, i32* %3
%20616 = add nsw i32 %20615, 6
store i32 %20616, i32* %3
%20617 = load i32, i32* %3
%20618 = mul nsw i32 %20617, 10
store i32 %20618, i32* %3
%20619 = load i32, i32* %3
%20620 = add nsw i32 %20619, 1
store i32 %20620, i32* %3
%20621 = load i32, i32* %3
%20622 = mul nsw i32 %20621, 2
store i32 %20622, i32* %3
%20623 = load i32, i32* %3
%20624 = sub nsw i32 %20623, 1
store i32 %20624, i32* %3
%20625 = load i32, i32* %3
%20626 = and i32 %20625, -1044481
store i32 %20626, i32* %3
%20627 = load i32, i32* %3
%20628 = xor i32 %20627, 81954
store i32 %20628, i32* %3
%20629 = load i32, i32* %3
%20630 = srem i32 %20629, 268435443
store i32 %20630, i32* %3
%20631 = load i32, i32* %3
%20632 = add nsw i32 %20631, 6
store i32 %20632, i32* %3
%20633 = load i32, i32* %3
%20634 = mul nsw i32 %20633, 10
store i32 %20634, i32* %3
%20635 = load i32, i32* %3
%20636 = add nsw i32 %20635, 1
store i32 %20636, i32* %3
%20637 = load i32, i32* %3
%20638 = mul nsw i32 %20637, 2
store i32 %20638, i32* %3
%20639 = load i32, i32* %3
%20640 = sub nsw i32 %20639, 1
store i32 %20640, i32* %3
%20641 = load i32, i32* %3
%20642 = and i32 %20641, -1044481
store i32 %20642, i32* %3
%20643 = load i32, i32* %3
%20644 = xor i32 %20643, 81954
store i32 %20644, i32* %3
%20645 = load i32, i32* %3
%20646 = srem i32 %20645, 268435443
store i32 %20646, i32* %3
%20647 = load i32, i32* %3
%20648 = add nsw i32 %20647, 6
store i32 %20648, i32* %3
%20649 = load i32, i32* %3
%20650 = mul nsw i32 %20649, 10
store i32 %20650, i32* %3
%20651 = load i32, i32* %3
%20652 = add nsw i32 %20651, 1
store i32 %20652, i32* %3
%20653 = load i32, i32* %3
%20654 = mul nsw i32 %20653, 2
store i32 %20654, i32* %3
%20655 = load i32, i32* %3
%20656 = sub nsw i32 %20655, 1
store i32 %20656, i32* %3
%20657 = load i32, i32* %3
%20658 = and i32 %20657, -1044481
store i32 %20658, i32* %3
%20659 = load i32, i32* %3
%20660 = xor i32 %20659, 81954
store i32 %20660, i32* %3
%20661 = load i32, i32* %3
%20662 = srem i32 %20661, 268435443
store i32 %20662, i32* %3
%20663 = load i32, i32* %3
%20664 = add nsw i32 %20663, 6
store i32 %20664, i32* %3
%20665 = load i32, i32* %3
%20666 = mul nsw i32 %20665, 10
store i32 %20666, i32* %3
%20667 = load i32, i32* %3
%20668 = add nsw i32 %20667, 1
store i32 %20668, i32* %3
%20669 = load i32, i32* %3
%20670 = mul nsw i32 %20669, 2
store i32 %20670, i32* %3
%20671 = load i32, i32* %3
%20672 = sub nsw i32 %20671, 1
store i32 %20672, i32* %3
%20673 = load i32, i32* %3
%20674 = and i32 %20673, -1044481
store i32 %20674, i32* %3
%20675 = load i32, i32* %3
%20676 = xor i32 %20675, 81954
store i32 %20676, i32* %3
%20677 = load i32, i32* %3
%20678 = srem i32 %20677, 268435443
store i32 %20678, i32* %3
%20679 = load i32, i32* %3
%20680 = add nsw i32 %20679, 6
store i32 %20680, i32* %3
%20681 = load i32, i32* %3
%20682 = mul nsw i32 %20681, 10
store i32 %20682, i32* %3
%20683 = load i32, i32* %3
%20684 = add nsw i32 %20683, 1
store i32 %20684, i32* %3
%20685 = load i32, i32* %3
%20686 = mul nsw i32 %20685, 2
store i32 %20686, i32* %3
%20687 = load i32, i32* %3
%20688 = sub nsw i32 %20687, 1
store i32 %20688, i32* %3
%20689 = load i32, i32* %3
%20690 = and i32 %20689, -1044481
store i32 %20690, i32* %3
%20691 = load i32, i32* %3
%20692 = xor i32 %20691, 81954
store i32 %20692, i32* %3
%20693 = load i32, i32* %3
%20694 = srem i32 %20693, 268435443
store i32 %20694, i32* %3
%20695 = load i32, i32* %3
%20696 = add nsw i32 %20695, 6
store i32 %20696, i32* %3
%20697 = load i32, i32* %3
%20698 = mul nsw i32 %20697, 10
store i32 %20698, i32* %3
%20699 = load i32, i32* %3
%20700 = add nsw i32 %20699, 1
store i32 %20700, i32* %3
%20701 = load i32, i32* %3
%20702 = mul nsw i32 %20701, 2
store i32 %20702, i32* %3
%20703 = load i32, i32* %3
%20704 = sub nsw i32 %20703, 1
store i32 %20704, i32* %3
%20705 = load i32, i32* %3
%20706 = and i32 %20705, -1044481
store i32 %20706, i32* %3
%20707 = load i32, i32* %3
%20708 = xor i32 %20707, 81954
store i32 %20708, i32* %3
%20709 = load i32, i32* %3
%20710 = srem i32 %20709, 268435443
store i32 %20710, i32* %3
%20711 = load i32, i32* %3
%20712 = add nsw i32 %20711, 6
store i32 %20712, i32* %3
%20713 = load i32, i32* %3
%20714 = mul nsw i32 %20713, 10
store i32 %20714, i32* %3
%20715 = load i32, i32* %3
%20716 = add nsw i32 %20715, 1
store i32 %20716, i32* %3
%20717 = load i32, i32* %3
%20718 = mul nsw i32 %20717, 2
store i32 %20718, i32* %3
%20719 = load i32, i32* %3
%20720 = sub nsw i32 %20719, 1
store i32 %20720, i32* %3
%20721 = load i32, i32* %3
%20722 = and i32 %20721, -1044481
store i32 %20722, i32* %3
%20723 = load i32, i32* %3
%20724 = xor i32 %20723, 81954
store i32 %20724, i32* %3
%20725 = load i32, i32* %3
%20726 = srem i32 %20725, 268435443
store i32 %20726, i32* %3
%20727 = load i32, i32* %3
%20728 = add nsw i32 %20727, 6
store i32 %20728, i32* %3
%20729 = load i32, i32* %3
%20730 = mul nsw i32 %20729, 10
store i32 %20730, i32* %3
%20731 = load i32, i32* %3
%20732 = add nsw i32 %20731, 1
store i32 %20732, i32* %3
%20733 = load i32, i32* %3
%20734 = mul nsw i32 %20733, 2
store i32 %20734, i32* %3
%20735 = load i32, i32* %3
%20736 = sub nsw i32 %20735, 1
store i32 %20736, i32* %3
%20737 = load i32, i32* %3
%20738 = and i32 %20737, -1044481
store i32 %20738, i32* %3
%20739 = load i32, i32* %3
%20740 = xor i32 %20739, 81954
store i32 %20740, i32* %3
%20741 = load i32, i32* %3
%20742 = srem i32 %20741, 268435443
store i32 %20742, i32* %3
%20743 = load i32, i32* %3
%20744 = add nsw i32 %20743, 6
store i32 %20744, i32* %3
%20745 = load i32, i32* %3
%20746 = mul nsw i32 %20745, 10
store i32 %20746, i32* %3
%20747 = load i32, i32* %3
%20748 = add nsw i32 %20747, 1
store i32 %20748, i32* %3
%20749 = load i32, i32* %3
%20750 = mul nsw i32 %20749, 2
store i32 %20750, i32* %3
%20751 = load i32, i32* %3
%20752 = sub nsw i32 %20751, 1
store i32 %20752, i32* %3
%20753 = load i32, i32* %3
%20754 = and i32 %20753, -1044481
store i32 %20754, i32* %3
%20755 = load i32, i32* %3
%20756 = xor i32 %20755, 81954
store i32 %20756, i32* %3
%20757 = load i32, i32* %3
%20758 = srem i32 %20757, 268435443
store i32 %20758, i32* %3
%20759 = load i32, i32* %3
%20760 = add nsw i32 %20759, 6
store i32 %20760, i32* %3
%20761 = load i32, i32* %3
%20762 = mul nsw i32 %20761, 10
store i32 %20762, i32* %3
%20763 = load i32, i32* %3
%20764 = add nsw i32 %20763, 1
store i32 %20764, i32* %3
%20765 = load i32, i32* %3
%20766 = mul nsw i32 %20765, 2
store i32 %20766, i32* %3
%20767 = load i32, i32* %3
%20768 = sub nsw i32 %20767, 1
store i32 %20768, i32* %3
%20769 = load i32, i32* %3
%20770 = and i32 %20769, -1044481
store i32 %20770, i32* %3
%20771 = load i32, i32* %3
%20772 = xor i32 %20771, 81954
store i32 %20772, i32* %3
%20773 = load i32, i32* %3
%20774 = srem i32 %20773, 268435443
store i32 %20774, i32* %3
%20775 = load i32, i32* %3
%20776 = add nsw i32 %20775, 6
store i32 %20776, i32* %3
%20777 = load i32, i32* %3
%20778 = mul nsw i32 %20777, 10
store i32 %20778, i32* %3
%20779 = load i32, i32* %3
%20780 = add nsw i32 %20779, 1
store i32 %20780, i32* %3
%20781 = load i32, i32* %3
%20782 = mul nsw i32 %20781, 2
store i32 %20782, i32* %3
%20783 = load i32, i32* %3
%20784 = sub nsw i32 %20783, 1
store i32 %20784, i32* %3
%20785 = load i32, i32* %3
%20786 = and i32 %20785, -1044481
store i32 %20786, i32* %3
%20787 = load i32, i32* %3
%20788 = xor i32 %20787, 81954
store i32 %20788, i32* %3
%20789 = load i32, i32* %3
%20790 = srem i32 %20789, 268435443
store i32 %20790, i32* %3
%20791 = load i32, i32* %3
%20792 = add nsw i32 %20791, 6
store i32 %20792, i32* %3
%20793 = load i32, i32* %3
%20794 = mul nsw i32 %20793, 10
store i32 %20794, i32* %3
%20795 = load i32, i32* %3
%20796 = add nsw i32 %20795, 1
store i32 %20796, i32* %3
%20797 = load i32, i32* %3
%20798 = mul nsw i32 %20797, 2
store i32 %20798, i32* %3
%20799 = load i32, i32* %3
%20800 = sub nsw i32 %20799, 1
store i32 %20800, i32* %3
%20801 = load i32, i32* %3
%20802 = and i32 %20801, -1044481
store i32 %20802, i32* %3
%20803 = load i32, i32* %3
%20804 = xor i32 %20803, 81954
store i32 %20804, i32* %3
%20805 = load i32, i32* %3
%20806 = srem i32 %20805, 268435443
store i32 %20806, i32* %3
%20807 = load i32, i32* %3
%20808 = add nsw i32 %20807, 6
store i32 %20808, i32* %3
%20809 = load i32, i32* %3
%20810 = mul nsw i32 %20809, 10
store i32 %20810, i32* %3
%20811 = load i32, i32* %3
%20812 = add nsw i32 %20811, 1
store i32 %20812, i32* %3
%20813 = load i32, i32* %3
%20814 = mul nsw i32 %20813, 2
store i32 %20814, i32* %3
%20815 = load i32, i32* %3
%20816 = sub nsw i32 %20815, 1
store i32 %20816, i32* %3
%20817 = load i32, i32* %3
%20818 = and i32 %20817, -1044481
store i32 %20818, i32* %3
%20819 = load i32, i32* %3
%20820 = xor i32 %20819, 81954
store i32 %20820, i32* %3
%20821 = load i32, i32* %3
%20822 = srem i32 %20821, 268435443
store i32 %20822, i32* %3
%20823 = load i32, i32* %3
%20824 = add nsw i32 %20823, 6
store i32 %20824, i32* %3
%20825 = load i32, i32* %3
%20826 = mul nsw i32 %20825, 10
store i32 %20826, i32* %3
%20827 = load i32, i32* %3
%20828 = add nsw i32 %20827, 1
store i32 %20828, i32* %3
%20829 = load i32, i32* %3
%20830 = mul nsw i32 %20829, 2
store i32 %20830, i32* %3
%20831 = load i32, i32* %3
%20832 = sub nsw i32 %20831, 1
store i32 %20832, i32* %3
%20833 = load i32, i32* %3
%20834 = and i32 %20833, -1044481
store i32 %20834, i32* %3
%20835 = load i32, i32* %3
%20836 = xor i32 %20835, 81954
store i32 %20836, i32* %3
%20837 = load i32, i32* %3
%20838 = srem i32 %20837, 268435443
store i32 %20838, i32* %3
%20839 = load i32, i32* %3
%20840 = add nsw i32 %20839, 6
store i32 %20840, i32* %3
%20841 = load i32, i32* %3
%20842 = mul nsw i32 %20841, 10
store i32 %20842, i32* %3
%20843 = load i32, i32* %3
%20844 = add nsw i32 %20843, 1
store i32 %20844, i32* %3
%20845 = load i32, i32* %3
%20846 = mul nsw i32 %20845, 2
store i32 %20846, i32* %3
%20847 = load i32, i32* %3
%20848 = sub nsw i32 %20847, 1
store i32 %20848, i32* %3
%20849 = load i32, i32* %3
%20850 = and i32 %20849, -1044481
store i32 %20850, i32* %3
%20851 = load i32, i32* %3
%20852 = xor i32 %20851, 81954
store i32 %20852, i32* %3
%20853 = load i32, i32* %3
%20854 = srem i32 %20853, 268435443
store i32 %20854, i32* %3
%20855 = load i32, i32* %3
%20856 = add nsw i32 %20855, 6
store i32 %20856, i32* %3
%20857 = load i32, i32* %3
%20858 = mul nsw i32 %20857, 10
store i32 %20858, i32* %3
%20859 = load i32, i32* %3
%20860 = add nsw i32 %20859, 1
store i32 %20860, i32* %3
%20861 = load i32, i32* %3
%20862 = mul nsw i32 %20861, 2
store i32 %20862, i32* %3
%20863 = load i32, i32* %3
%20864 = sub nsw i32 %20863, 1
store i32 %20864, i32* %3
%20865 = load i32, i32* %3
%20866 = and i32 %20865, -1044481
store i32 %20866, i32* %3
%20867 = load i32, i32* %3
%20868 = xor i32 %20867, 81954
store i32 %20868, i32* %3
%20869 = load i32, i32* %3
%20870 = srem i32 %20869, 268435443
store i32 %20870, i32* %3
%20871 = load i32, i32* %3
%20872 = add nsw i32 %20871, 6
store i32 %20872, i32* %3
%20873 = load i32, i32* %3
%20874 = mul nsw i32 %20873, 10
store i32 %20874, i32* %3
%20875 = load i32, i32* %3
%20876 = add nsw i32 %20875, 1
store i32 %20876, i32* %3
%20877 = load i32, i32* %3
%20878 = mul nsw i32 %20877, 2
store i32 %20878, i32* %3
%20879 = load i32, i32* %3
%20880 = sub nsw i32 %20879, 1
store i32 %20880, i32* %3
%20881 = load i32, i32* %3
%20882 = and i32 %20881, -1044481
store i32 %20882, i32* %3
%20883 = load i32, i32* %3
%20884 = xor i32 %20883, 81954
store i32 %20884, i32* %3
%20885 = load i32, i32* %3
%20886 = srem i32 %20885, 268435443
store i32 %20886, i32* %3
%20887 = load i32, i32* %3
%20888 = add nsw i32 %20887, 6
store i32 %20888, i32* %3
%20889 = load i32, i32* %3
%20890 = mul nsw i32 %20889, 10
store i32 %20890, i32* %3
%20891 = load i32, i32* %3
%20892 = add nsw i32 %20891, 1
store i32 %20892, i32* %3
%20893 = load i32, i32* %3
%20894 = mul nsw i32 %20893, 2
store i32 %20894, i32* %3
%20895 = load i32, i32* %3
%20896 = sub nsw i32 %20895, 1
store i32 %20896, i32* %3
%20897 = load i32, i32* %3
%20898 = and i32 %20897, -1044481
store i32 %20898, i32* %3
%20899 = load i32, i32* %3
%20900 = xor i32 %20899, 81954
store i32 %20900, i32* %3
%20901 = load i32, i32* %3
%20902 = srem i32 %20901, 268435443
store i32 %20902, i32* %3
%20903 = load i32, i32* %3
%20904 = add nsw i32 %20903, 6
store i32 %20904, i32* %3
%20905 = load i32, i32* %3
%20906 = mul nsw i32 %20905, 10
store i32 %20906, i32* %3
%20907 = load i32, i32* %3
%20908 = add nsw i32 %20907, 1
store i32 %20908, i32* %3
%20909 = load i32, i32* %3
%20910 = mul nsw i32 %20909, 2
store i32 %20910, i32* %3
%20911 = load i32, i32* %3
%20912 = sub nsw i32 %20911, 1
store i32 %20912, i32* %3
%20913 = load i32, i32* %3
%20914 = and i32 %20913, -1044481
store i32 %20914, i32* %3
%20915 = load i32, i32* %3
%20916 = xor i32 %20915, 81954
store i32 %20916, i32* %3
%20917 = load i32, i32* %3
%20918 = srem i32 %20917, 268435443
store i32 %20918, i32* %3
%20919 = load i32, i32* %3
%20920 = add nsw i32 %20919, 6
store i32 %20920, i32* %3
%20921 = load i32, i32* %3
%20922 = mul nsw i32 %20921, 10
store i32 %20922, i32* %3
%20923 = load i32, i32* %3
%20924 = add nsw i32 %20923, 1
store i32 %20924, i32* %3
%20925 = load i32, i32* %3
%20926 = mul nsw i32 %20925, 2
store i32 %20926, i32* %3
%20927 = load i32, i32* %3
%20928 = sub nsw i32 %20927, 1
store i32 %20928, i32* %3
%20929 = load i32, i32* %3
%20930 = and i32 %20929, -1044481
store i32 %20930, i32* %3
%20931 = load i32, i32* %3
%20932 = xor i32 %20931, 81954
store i32 %20932, i32* %3
%20933 = load i32, i32* %3
%20934 = srem i32 %20933, 268435443
store i32 %20934, i32* %3
%20935 = load i32, i32* %3
%20936 = add nsw i32 %20935, 6
store i32 %20936, i32* %3
%20937 = load i32, i32* %3
%20938 = mul nsw i32 %20937, 10
store i32 %20938, i32* %3
%20939 = load i32, i32* %3
%20940 = add nsw i32 %20939, 1
store i32 %20940, i32* %3
%20941 = load i32, i32* %3
%20942 = mul nsw i32 %20941, 2
store i32 %20942, i32* %3
%20943 = load i32, i32* %3
%20944 = sub nsw i32 %20943, 1
store i32 %20944, i32* %3
%20945 = load i32, i32* %3
%20946 = and i32 %20945, -1044481
store i32 %20946, i32* %3
%20947 = load i32, i32* %3
%20948 = xor i32 %20947, 81954
store i32 %20948, i32* %3
%20949 = load i32, i32* %3
%20950 = srem i32 %20949, 268435443
store i32 %20950, i32* %3
%20951 = load i32, i32* %3
%20952 = add nsw i32 %20951, 6
store i32 %20952, i32* %3
%20953 = load i32, i32* %3
%20954 = mul nsw i32 %20953, 10
store i32 %20954, i32* %3
%20955 = load i32, i32* %3
%20956 = add nsw i32 %20955, 1
store i32 %20956, i32* %3
%20957 = load i32, i32* %3
%20958 = mul nsw i32 %20957, 2
store i32 %20958, i32* %3
%20959 = load i32, i32* %3
%20960 = sub nsw i32 %20959, 1
store i32 %20960, i32* %3
%20961 = load i32, i32* %3
%20962 = and i32 %20961, -1044481
store i32 %20962, i32* %3
%20963 = load i32, i32* %3
%20964 = xor i32 %20963, 81954
store i32 %20964, i32* %3
%20965 = load i32, i32* %3
%20966 = srem i32 %20965, 268435443
store i32 %20966, i32* %3
%20967 = load i32, i32* %3
%20968 = add nsw i32 %20967, 6
store i32 %20968, i32* %3
%20969 = load i32, i32* %3
%20970 = mul nsw i32 %20969, 10
store i32 %20970, i32* %3
%20971 = load i32, i32* %3
%20972 = add nsw i32 %20971, 1
store i32 %20972, i32* %3
%20973 = load i32, i32* %3
%20974 = mul nsw i32 %20973, 2
store i32 %20974, i32* %3
%20975 = load i32, i32* %3
%20976 = sub nsw i32 %20975, 1
store i32 %20976, i32* %3
%20977 = load i32, i32* %3
%20978 = and i32 %20977, -1044481
store i32 %20978, i32* %3
%20979 = load i32, i32* %3
%20980 = xor i32 %20979, 81954
store i32 %20980, i32* %3
%20981 = load i32, i32* %3
%20982 = srem i32 %20981, 268435443
store i32 %20982, i32* %3
%20983 = load i32, i32* %3
%20984 = add nsw i32 %20983, 6
store i32 %20984, i32* %3
%20985 = load i32, i32* %3
%20986 = mul nsw i32 %20985, 10
store i32 %20986, i32* %3
%20987 = load i32, i32* %3
%20988 = add nsw i32 %20987, 1
store i32 %20988, i32* %3
%20989 = load i32, i32* %3
%20990 = mul nsw i32 %20989, 2
store i32 %20990, i32* %3
%20991 = load i32, i32* %3
%20992 = sub nsw i32 %20991, 1
store i32 %20992, i32* %3
%20993 = load i32, i32* %3
%20994 = and i32 %20993, -1044481
store i32 %20994, i32* %3
%20995 = load i32, i32* %3
%20996 = xor i32 %20995, 81954
store i32 %20996, i32* %3
%20997 = load i32, i32* %3
%20998 = srem i32 %20997, 268435443
store i32 %20998, i32* %3
%20999 = load i32, i32* %3
%21000 = add nsw i32 %20999, 6
store i32 %21000, i32* %3
%21001 = load i32, i32* %3
%21002 = mul nsw i32 %21001, 10
store i32 %21002, i32* %3
%21003 = load i32, i32* %3
%21004 = add nsw i32 %21003, 1
store i32 %21004, i32* %3
%21005 = load i32, i32* %3
%21006 = mul nsw i32 %21005, 2
store i32 %21006, i32* %3
%21007 = load i32, i32* %3
%21008 = sub nsw i32 %21007, 1
store i32 %21008, i32* %3
%21009 = load i32, i32* %3
%21010 = and i32 %21009, -1044481
store i32 %21010, i32* %3
%21011 = load i32, i32* %3
%21012 = xor i32 %21011, 81954
store i32 %21012, i32* %3
%21013 = load i32, i32* %3
%21014 = srem i32 %21013, 268435443
store i32 %21014, i32* %3
%21015 = load i32, i32* %3
%21016 = add nsw i32 %21015, 6
store i32 %21016, i32* %3
%21017 = load i32, i32* %3
%21018 = mul nsw i32 %21017, 10
store i32 %21018, i32* %3
%21019 = load i32, i32* %3
%21020 = add nsw i32 %21019, 1
store i32 %21020, i32* %3
%21021 = load i32, i32* %3
%21022 = mul nsw i32 %21021, 2
store i32 %21022, i32* %3
%21023 = load i32, i32* %3
%21024 = sub nsw i32 %21023, 1
store i32 %21024, i32* %3
%21025 = load i32, i32* %3
%21026 = and i32 %21025, -1044481
store i32 %21026, i32* %3
%21027 = load i32, i32* %3
%21028 = xor i32 %21027, 81954
store i32 %21028, i32* %3
%21029 = load i32, i32* %3
%21030 = srem i32 %21029, 268435443
store i32 %21030, i32* %3
%21031 = load i32, i32* %3
%21032 = add nsw i32 %21031, 6
store i32 %21032, i32* %3
%21033 = load i32, i32* %3
%21034 = mul nsw i32 %21033, 10
store i32 %21034, i32* %3
%21035 = load i32, i32* %3
%21036 = add nsw i32 %21035, 1
store i32 %21036, i32* %3
%21037 = load i32, i32* %3
%21038 = mul nsw i32 %21037, 2
store i32 %21038, i32* %3
%21039 = load i32, i32* %3
%21040 = sub nsw i32 %21039, 1
store i32 %21040, i32* %3
%21041 = load i32, i32* %3
%21042 = and i32 %21041, -1044481
store i32 %21042, i32* %3
%21043 = load i32, i32* %3
%21044 = xor i32 %21043, 81954
store i32 %21044, i32* %3
%21045 = load i32, i32* %3
%21046 = srem i32 %21045, 268435443
store i32 %21046, i32* %3
%21047 = load i32, i32* %3
%21048 = add nsw i32 %21047, 6
store i32 %21048, i32* %3
%21049 = load i32, i32* %3
%21050 = mul nsw i32 %21049, 10
store i32 %21050, i32* %3
%21051 = load i32, i32* %3
%21052 = add nsw i32 %21051, 1
store i32 %21052, i32* %3
%21053 = load i32, i32* %3
%21054 = mul nsw i32 %21053, 2
store i32 %21054, i32* %3
%21055 = load i32, i32* %3
%21056 = sub nsw i32 %21055, 1
store i32 %21056, i32* %3
%21057 = load i32, i32* %3
%21058 = and i32 %21057, -1044481
store i32 %21058, i32* %3
%21059 = load i32, i32* %3
%21060 = xor i32 %21059, 81954
store i32 %21060, i32* %3
%21061 = load i32, i32* %3
%21062 = srem i32 %21061, 268435443
store i32 %21062, i32* %3
%21063 = load i32, i32* %3
%21064 = add nsw i32 %21063, 6
store i32 %21064, i32* %3
%21065 = load i32, i32* %3
%21066 = mul nsw i32 %21065, 10
store i32 %21066, i32* %3
%21067 = load i32, i32* %3
%21068 = add nsw i32 %21067, 1
store i32 %21068, i32* %3
%21069 = load i32, i32* %3
%21070 = mul nsw i32 %21069, 2
store i32 %21070, i32* %3
%21071 = load i32, i32* %3
%21072 = sub nsw i32 %21071, 1
store i32 %21072, i32* %3
%21073 = load i32, i32* %3
%21074 = and i32 %21073, -1044481
store i32 %21074, i32* %3
%21075 = load i32, i32* %3
%21076 = xor i32 %21075, 81954
store i32 %21076, i32* %3
%21077 = load i32, i32* %3
%21078 = srem i32 %21077, 268435443
store i32 %21078, i32* %3
%21079 = load i32, i32* %3
%21080 = add nsw i32 %21079, 6
store i32 %21080, i32* %3
%21081 = load i32, i32* %3
%21082 = mul nsw i32 %21081, 10
store i32 %21082, i32* %3
%21083 = load i32, i32* %3
%21084 = add nsw i32 %21083, 1
store i32 %21084, i32* %3
%21085 = load i32, i32* %3
%21086 = mul nsw i32 %21085, 2
store i32 %21086, i32* %3
%21087 = load i32, i32* %3
%21088 = sub nsw i32 %21087, 1
store i32 %21088, i32* %3
%21089 = load i32, i32* %3
%21090 = and i32 %21089, -1044481
store i32 %21090, i32* %3
%21091 = load i32, i32* %3
%21092 = xor i32 %21091, 81954
store i32 %21092, i32* %3
%21093 = load i32, i32* %3
%21094 = srem i32 %21093, 268435443
store i32 %21094, i32* %3
%21095 = load i32, i32* %3
%21096 = add nsw i32 %21095, 6
store i32 %21096, i32* %3
%21097 = load i32, i32* %3
%21098 = mul nsw i32 %21097, 10
store i32 %21098, i32* %3
%21099 = load i32, i32* %3
%21100 = add nsw i32 %21099, 1
store i32 %21100, i32* %3
%21101 = load i32, i32* %3
%21102 = mul nsw i32 %21101, 2
store i32 %21102, i32* %3
%21103 = load i32, i32* %3
%21104 = sub nsw i32 %21103, 1
store i32 %21104, i32* %3
%21105 = load i32, i32* %3
%21106 = and i32 %21105, -1044481
store i32 %21106, i32* %3
%21107 = load i32, i32* %3
%21108 = xor i32 %21107, 81954
store i32 %21108, i32* %3
%21109 = load i32, i32* %3
%21110 = srem i32 %21109, 268435443
store i32 %21110, i32* %3
%21111 = load i32, i32* %3
%21112 = add nsw i32 %21111, 6
store i32 %21112, i32* %3
%21113 = load i32, i32* %3
%21114 = mul nsw i32 %21113, 10
store i32 %21114, i32* %3
%21115 = load i32, i32* %3
%21116 = add nsw i32 %21115, 1
store i32 %21116, i32* %3
%21117 = load i32, i32* %3
%21118 = mul nsw i32 %21117, 2
store i32 %21118, i32* %3
%21119 = load i32, i32* %3
%21120 = sub nsw i32 %21119, 1
store i32 %21120, i32* %3
%21121 = load i32, i32* %3
%21122 = and i32 %21121, -1044481
store i32 %21122, i32* %3
%21123 = load i32, i32* %3
%21124 = xor i32 %21123, 81954
store i32 %21124, i32* %3
%21125 = load i32, i32* %3
%21126 = srem i32 %21125, 268435443
store i32 %21126, i32* %3
%21127 = load i32, i32* %3
%21128 = add nsw i32 %21127, 6
store i32 %21128, i32* %3
%21129 = load i32, i32* %3
%21130 = mul nsw i32 %21129, 10
store i32 %21130, i32* %3
%21131 = load i32, i32* %3
%21132 = add nsw i32 %21131, 1
store i32 %21132, i32* %3
%21133 = load i32, i32* %3
%21134 = mul nsw i32 %21133, 2
store i32 %21134, i32* %3
%21135 = load i32, i32* %3
%21136 = sub nsw i32 %21135, 1
store i32 %21136, i32* %3
%21137 = load i32, i32* %3
%21138 = and i32 %21137, -1044481
store i32 %21138, i32* %3
%21139 = load i32, i32* %3
%21140 = xor i32 %21139, 81954
store i32 %21140, i32* %3
%21141 = load i32, i32* %3
%21142 = srem i32 %21141, 268435443
store i32 %21142, i32* %3
%21143 = load i32, i32* %3
%21144 = add nsw i32 %21143, 6
store i32 %21144, i32* %3
%21145 = load i32, i32* %3
%21146 = mul nsw i32 %21145, 10
store i32 %21146, i32* %3
%21147 = load i32, i32* %3
%21148 = add nsw i32 %21147, 1
store i32 %21148, i32* %3
%21149 = load i32, i32* %3
%21150 = mul nsw i32 %21149, 2
store i32 %21150, i32* %3
%21151 = load i32, i32* %3
%21152 = sub nsw i32 %21151, 1
store i32 %21152, i32* %3
%21153 = load i32, i32* %3
%21154 = and i32 %21153, -1044481
store i32 %21154, i32* %3
%21155 = load i32, i32* %3
%21156 = xor i32 %21155, 81954
store i32 %21156, i32* %3
%21157 = load i32, i32* %3
%21158 = srem i32 %21157, 268435443
store i32 %21158, i32* %3
%21159 = load i32, i32* %3
%21160 = add nsw i32 %21159, 6
store i32 %21160, i32* %3
%21161 = load i32, i32* %3
%21162 = mul nsw i32 %21161, 10
store i32 %21162, i32* %3
%21163 = load i32, i32* %3
%21164 = add nsw i32 %21163, 1
store i32 %21164, i32* %3
%21165 = load i32, i32* %3
%21166 = mul nsw i32 %21165, 2
store i32 %21166, i32* %3
%21167 = load i32, i32* %3
%21168 = sub nsw i32 %21167, 1
store i32 %21168, i32* %3
%21169 = load i32, i32* %3
%21170 = and i32 %21169, -1044481
store i32 %21170, i32* %3
%21171 = load i32, i32* %3
%21172 = xor i32 %21171, 81954
store i32 %21172, i32* %3
%21173 = load i32, i32* %3
%21174 = srem i32 %21173, 268435443
store i32 %21174, i32* %3
%21175 = load i32, i32* %3
%21176 = add nsw i32 %21175, 6
store i32 %21176, i32* %3
%21177 = load i32, i32* %3
%21178 = mul nsw i32 %21177, 10
store i32 %21178, i32* %3
%21179 = load i32, i32* %3
%21180 = add nsw i32 %21179, 1
store i32 %21180, i32* %3
%21181 = load i32, i32* %3
%21182 = mul nsw i32 %21181, 2
store i32 %21182, i32* %3
%21183 = load i32, i32* %3
%21184 = sub nsw i32 %21183, 1
store i32 %21184, i32* %3
%21185 = load i32, i32* %3
%21186 = and i32 %21185, -1044481
store i32 %21186, i32* %3
%21187 = load i32, i32* %3
%21188 = xor i32 %21187, 81954
store i32 %21188, i32* %3
%21189 = load i32, i32* %3
%21190 = srem i32 %21189, 268435443
store i32 %21190, i32* %3
%21191 = load i32, i32* %3
%21192 = add nsw i32 %21191, 6
store i32 %21192, i32* %3
%21193 = load i32, i32* %3
%21194 = mul nsw i32 %21193, 10
store i32 %21194, i32* %3
%21195 = load i32, i32* %3
%21196 = add nsw i32 %21195, 1
store i32 %21196, i32* %3
%21197 = load i32, i32* %3
%21198 = mul nsw i32 %21197, 2
store i32 %21198, i32* %3
%21199 = load i32, i32* %3
%21200 = sub nsw i32 %21199, 1
store i32 %21200, i32* %3
%21201 = load i32, i32* %3
%21202 = and i32 %21201, -1044481
store i32 %21202, i32* %3
%21203 = load i32, i32* %3
%21204 = xor i32 %21203, 81954
store i32 %21204, i32* %3
%21205 = load i32, i32* %3
%21206 = srem i32 %21205, 268435443
store i32 %21206, i32* %3
%21207 = load i32, i32* %3
%21208 = add nsw i32 %21207, 6
store i32 %21208, i32* %3
%21209 = load i32, i32* %3
%21210 = mul nsw i32 %21209, 10
store i32 %21210, i32* %3
%21211 = load i32, i32* %3
%21212 = add nsw i32 %21211, 1
store i32 %21212, i32* %3
%21213 = load i32, i32* %3
%21214 = mul nsw i32 %21213, 2
store i32 %21214, i32* %3
%21215 = load i32, i32* %3
%21216 = sub nsw i32 %21215, 1
store i32 %21216, i32* %3
%21217 = load i32, i32* %3
%21218 = and i32 %21217, -1044481
store i32 %21218, i32* %3
%21219 = load i32, i32* %3
%21220 = xor i32 %21219, 81954
store i32 %21220, i32* %3
%21221 = load i32, i32* %3
%21222 = srem i32 %21221, 268435443
store i32 %21222, i32* %3
%21223 = load i32, i32* %3
%21224 = add nsw i32 %21223, 6
store i32 %21224, i32* %3
%21225 = load i32, i32* %3
%21226 = mul nsw i32 %21225, 10
store i32 %21226, i32* %3
%21227 = load i32, i32* %3
%21228 = add nsw i32 %21227, 1
store i32 %21228, i32* %3
%21229 = load i32, i32* %3
%21230 = mul nsw i32 %21229, 2
store i32 %21230, i32* %3
%21231 = load i32, i32* %3
%21232 = sub nsw i32 %21231, 1
store i32 %21232, i32* %3
%21233 = load i32, i32* %3
%21234 = and i32 %21233, -1044481
store i32 %21234, i32* %3
%21235 = load i32, i32* %3
%21236 = xor i32 %21235, 81954
store i32 %21236, i32* %3
%21237 = load i32, i32* %3
%21238 = srem i32 %21237, 268435443
store i32 %21238, i32* %3
%21239 = load i32, i32* %3
%21240 = add nsw i32 %21239, 6
store i32 %21240, i32* %3
%21241 = load i32, i32* %3
%21242 = mul nsw i32 %21241, 10
store i32 %21242, i32* %3
%21243 = load i32, i32* %3
%21244 = add nsw i32 %21243, 1
store i32 %21244, i32* %3
%21245 = load i32, i32* %3
%21246 = mul nsw i32 %21245, 2
store i32 %21246, i32* %3
%21247 = load i32, i32* %3
%21248 = sub nsw i32 %21247, 1
store i32 %21248, i32* %3
%21249 = load i32, i32* %3
%21250 = and i32 %21249, -1044481
store i32 %21250, i32* %3
%21251 = load i32, i32* %3
%21252 = xor i32 %21251, 81954
store i32 %21252, i32* %3
%21253 = load i32, i32* %3
%21254 = srem i32 %21253, 268435443
store i32 %21254, i32* %3
%21255 = load i32, i32* %3
%21256 = add nsw i32 %21255, 6
store i32 %21256, i32* %3
%21257 = load i32, i32* %3
%21258 = mul nsw i32 %21257, 10
store i32 %21258, i32* %3
%21259 = load i32, i32* %3
%21260 = add nsw i32 %21259, 1
store i32 %21260, i32* %3
%21261 = load i32, i32* %3
%21262 = mul nsw i32 %21261, 2
store i32 %21262, i32* %3
%21263 = load i32, i32* %3
%21264 = sub nsw i32 %21263, 1
store i32 %21264, i32* %3
%21265 = load i32, i32* %3
%21266 = and i32 %21265, -1044481
store i32 %21266, i32* %3
%21267 = load i32, i32* %3
%21268 = xor i32 %21267, 81954
store i32 %21268, i32* %3
%21269 = load i32, i32* %3
%21270 = srem i32 %21269, 268435443
store i32 %21270, i32* %3
%21271 = load i32, i32* %3
%21272 = add nsw i32 %21271, 6
store i32 %21272, i32* %3
%21273 = load i32, i32* %3
%21274 = mul nsw i32 %21273, 10
store i32 %21274, i32* %3
%21275 = load i32, i32* %3
%21276 = add nsw i32 %21275, 1
store i32 %21276, i32* %3
%21277 = load i32, i32* %3
%21278 = mul nsw i32 %21277, 2
store i32 %21278, i32* %3
%21279 = load i32, i32* %3
%21280 = sub nsw i32 %21279, 1
store i32 %21280, i32* %3
%21281 = load i32, i32* %3
%21282 = and i32 %21281, -1044481
store i32 %21282, i32* %3
%21283 = load i32, i32* %3
%21284 = xor i32 %21283, 81954
store i32 %21284, i32* %3
%21285 = load i32, i32* %3
%21286 = srem i32 %21285, 268435443
store i32 %21286, i32* %3
%21287 = load i32, i32* %3
%21288 = add nsw i32 %21287, 6
store i32 %21288, i32* %3
%21289 = load i32, i32* %3
%21290 = mul nsw i32 %21289, 10
store i32 %21290, i32* %3
%21291 = load i32, i32* %3
%21292 = add nsw i32 %21291, 1
store i32 %21292, i32* %3
%21293 = load i32, i32* %3
%21294 = mul nsw i32 %21293, 2
store i32 %21294, i32* %3
%21295 = load i32, i32* %3
%21296 = sub nsw i32 %21295, 1
store i32 %21296, i32* %3
%21297 = load i32, i32* %3
%21298 = and i32 %21297, -1044481
store i32 %21298, i32* %3
%21299 = load i32, i32* %3
%21300 = xor i32 %21299, 81954
store i32 %21300, i32* %3
%21301 = load i32, i32* %3
%21302 = srem i32 %21301, 268435443
store i32 %21302, i32* %3
%21303 = load i32, i32* %3
%21304 = add nsw i32 %21303, 6
store i32 %21304, i32* %3
%21305 = load i32, i32* %3
%21306 = mul nsw i32 %21305, 10
store i32 %21306, i32* %3
%21307 = load i32, i32* %3
%21308 = add nsw i32 %21307, 1
store i32 %21308, i32* %3
%21309 = load i32, i32* %3
%21310 = mul nsw i32 %21309, 2
store i32 %21310, i32* %3
%21311 = load i32, i32* %3
%21312 = sub nsw i32 %21311, 1
store i32 %21312, i32* %3
%21313 = load i32, i32* %3
%21314 = and i32 %21313, -1044481
store i32 %21314, i32* %3
%21315 = load i32, i32* %3
%21316 = xor i32 %21315, 81954
store i32 %21316, i32* %3
%21317 = load i32, i32* %3
%21318 = srem i32 %21317, 268435443
store i32 %21318, i32* %3
%21319 = load i32, i32* %3
%21320 = add nsw i32 %21319, 6
store i32 %21320, i32* %3
%21321 = load i32, i32* %3
%21322 = mul nsw i32 %21321, 10
store i32 %21322, i32* %3
%21323 = load i32, i32* %3
%21324 = add nsw i32 %21323, 1
store i32 %21324, i32* %3
%21325 = load i32, i32* %3
%21326 = mul nsw i32 %21325, 2
store i32 %21326, i32* %3
%21327 = load i32, i32* %3
%21328 = sub nsw i32 %21327, 1
store i32 %21328, i32* %3
%21329 = load i32, i32* %3
%21330 = and i32 %21329, -1044481
store i32 %21330, i32* %3
%21331 = load i32, i32* %3
%21332 = xor i32 %21331, 81954
store i32 %21332, i32* %3
%21333 = load i32, i32* %3
%21334 = srem i32 %21333, 268435443
store i32 %21334, i32* %3
%21335 = load i32, i32* %3
%21336 = add nsw i32 %21335, 6
store i32 %21336, i32* %3
%21337 = load i32, i32* %3
%21338 = mul nsw i32 %21337, 10
store i32 %21338, i32* %3
%21339 = load i32, i32* %3
%21340 = add nsw i32 %21339, 1
store i32 %21340, i32* %3
%21341 = load i32, i32* %3
%21342 = mul nsw i32 %21341, 2
store i32 %21342, i32* %3
%21343 = load i32, i32* %3
%21344 = sub nsw i32 %21343, 1
store i32 %21344, i32* %3
%21345 = load i32, i32* %3
%21346 = and i32 %21345, -1044481
store i32 %21346, i32* %3
%21347 = load i32, i32* %3
%21348 = xor i32 %21347, 81954
store i32 %21348, i32* %3
%21349 = load i32, i32* %3
%21350 = srem i32 %21349, 268435443
store i32 %21350, i32* %3
%21351 = load i32, i32* %3
%21352 = add nsw i32 %21351, 6
store i32 %21352, i32* %3
%21353 = load i32, i32* %3
%21354 = mul nsw i32 %21353, 10
store i32 %21354, i32* %3
%21355 = load i32, i32* %3
%21356 = add nsw i32 %21355, 1
store i32 %21356, i32* %3
%21357 = load i32, i32* %3
%21358 = mul nsw i32 %21357, 2
store i32 %21358, i32* %3
%21359 = load i32, i32* %3
%21360 = sub nsw i32 %21359, 1
store i32 %21360, i32* %3
%21361 = load i32, i32* %3
%21362 = and i32 %21361, -1044481
store i32 %21362, i32* %3
%21363 = load i32, i32* %3
%21364 = xor i32 %21363, 81954
store i32 %21364, i32* %3
%21365 = load i32, i32* %3
%21366 = srem i32 %21365, 268435443
store i32 %21366, i32* %3
%21367 = load i32, i32* %3
%21368 = add nsw i32 %21367, 6
store i32 %21368, i32* %3
%21369 = load i32, i32* %3
%21370 = mul nsw i32 %21369, 10
store i32 %21370, i32* %3
%21371 = load i32, i32* %3
%21372 = add nsw i32 %21371, 1
store i32 %21372, i32* %3
%21373 = load i32, i32* %3
%21374 = mul nsw i32 %21373, 2
store i32 %21374, i32* %3
%21375 = load i32, i32* %3
%21376 = sub nsw i32 %21375, 1
store i32 %21376, i32* %3
%21377 = load i32, i32* %3
%21378 = and i32 %21377, -1044481
store i32 %21378, i32* %3
%21379 = load i32, i32* %3
%21380 = xor i32 %21379, 81954
store i32 %21380, i32* %3
%21381 = load i32, i32* %3
%21382 = srem i32 %21381, 268435443
store i32 %21382, i32* %3
%21383 = load i32, i32* %3
%21384 = add nsw i32 %21383, 6
store i32 %21384, i32* %3
%21385 = load i32, i32* %3
%21386 = mul nsw i32 %21385, 10
store i32 %21386, i32* %3
%21387 = load i32, i32* %3
%21388 = add nsw i32 %21387, 1
store i32 %21388, i32* %3
%21389 = load i32, i32* %3
%21390 = mul nsw i32 %21389, 2
store i32 %21390, i32* %3
%21391 = load i32, i32* %3
%21392 = sub nsw i32 %21391, 1
store i32 %21392, i32* %3
%21393 = load i32, i32* %3
%21394 = and i32 %21393, -1044481
store i32 %21394, i32* %3
%21395 = load i32, i32* %3
%21396 = xor i32 %21395, 81954
store i32 %21396, i32* %3
%21397 = load i32, i32* %3
%21398 = srem i32 %21397, 268435443
store i32 %21398, i32* %3
%21399 = load i32, i32* %3
%21400 = add nsw i32 %21399, 6
store i32 %21400, i32* %3
%21401 = load i32, i32* %3
%21402 = mul nsw i32 %21401, 10
store i32 %21402, i32* %3
%21403 = load i32, i32* %3
%21404 = add nsw i32 %21403, 1
store i32 %21404, i32* %3
%21405 = load i32, i32* %3
%21406 = mul nsw i32 %21405, 2
store i32 %21406, i32* %3
%21407 = load i32, i32* %3
%21408 = sub nsw i32 %21407, 1
store i32 %21408, i32* %3
%21409 = load i32, i32* %3
%21410 = and i32 %21409, -1044481
store i32 %21410, i32* %3
%21411 = load i32, i32* %3
%21412 = xor i32 %21411, 81954
store i32 %21412, i32* %3
%21413 = load i32, i32* %3
%21414 = srem i32 %21413, 268435443
store i32 %21414, i32* %3
%21415 = load i32, i32* %3
%21416 = add nsw i32 %21415, 6
store i32 %21416, i32* %3
%21417 = load i32, i32* %3
%21418 = mul nsw i32 %21417, 10
store i32 %21418, i32* %3
%21419 = load i32, i32* %3
%21420 = add nsw i32 %21419, 1
store i32 %21420, i32* %3
%21421 = load i32, i32* %3
%21422 = mul nsw i32 %21421, 2
store i32 %21422, i32* %3
%21423 = load i32, i32* %3
%21424 = sub nsw i32 %21423, 1
store i32 %21424, i32* %3
%21425 = load i32, i32* %3
%21426 = and i32 %21425, -1044481
store i32 %21426, i32* %3
%21427 = load i32, i32* %3
%21428 = xor i32 %21427, 81954
store i32 %21428, i32* %3
%21429 = load i32, i32* %3
%21430 = srem i32 %21429, 268435443
store i32 %21430, i32* %3
%21431 = load i32, i32* %3
%21432 = add nsw i32 %21431, 6
store i32 %21432, i32* %3
%21433 = load i32, i32* %3
%21434 = mul nsw i32 %21433, 10
store i32 %21434, i32* %3
%21435 = load i32, i32* %3
%21436 = add nsw i32 %21435, 1
store i32 %21436, i32* %3
%21437 = load i32, i32* %3
%21438 = mul nsw i32 %21437, 2
store i32 %21438, i32* %3
%21439 = load i32, i32* %3
%21440 = sub nsw i32 %21439, 1
store i32 %21440, i32* %3
%21441 = load i32, i32* %3
%21442 = and i32 %21441, -1044481
store i32 %21442, i32* %3
%21443 = load i32, i32* %3
%21444 = xor i32 %21443, 81954
store i32 %21444, i32* %3
%21445 = load i32, i32* %3
%21446 = srem i32 %21445, 268435443
store i32 %21446, i32* %3
%21447 = load i32, i32* %3
%21448 = add nsw i32 %21447, 6
store i32 %21448, i32* %3
%21449 = load i32, i32* %3
%21450 = mul nsw i32 %21449, 10
store i32 %21450, i32* %3
%21451 = load i32, i32* %3
%21452 = add nsw i32 %21451, 1
store i32 %21452, i32* %3
%21453 = load i32, i32* %3
%21454 = mul nsw i32 %21453, 2
store i32 %21454, i32* %3
%21455 = load i32, i32* %3
%21456 = sub nsw i32 %21455, 1
store i32 %21456, i32* %3
%21457 = load i32, i32* %3
%21458 = and i32 %21457, -1044481
store i32 %21458, i32* %3
%21459 = load i32, i32* %3
%21460 = xor i32 %21459, 81954
store i32 %21460, i32* %3
%21461 = load i32, i32* %3
%21462 = srem i32 %21461, 268435443
store i32 %21462, i32* %3
%21463 = load i32, i32* %3
%21464 = add nsw i32 %21463, 6
store i32 %21464, i32* %3
%21465 = load i32, i32* %3
%21466 = mul nsw i32 %21465, 10
store i32 %21466, i32* %3
%21467 = load i32, i32* %3
%21468 = add nsw i32 %21467, 1
store i32 %21468, i32* %3
%21469 = load i32, i32* %3
%21470 = mul nsw i32 %21469, 2
store i32 %21470, i32* %3
%21471 = load i32, i32* %3
%21472 = sub nsw i32 %21471, 1
store i32 %21472, i32* %3
%21473 = load i32, i32* %3
%21474 = and i32 %21473, -1044481
store i32 %21474, i32* %3
%21475 = load i32, i32* %3
%21476 = xor i32 %21475, 81954
store i32 %21476, i32* %3
%21477 = load i32, i32* %3
%21478 = srem i32 %21477, 268435443
store i32 %21478, i32* %3
%21479 = load i32, i32* %3
%21480 = add nsw i32 %21479, 6
store i32 %21480, i32* %3
%21481 = load i32, i32* %3
%21482 = mul nsw i32 %21481, 10
store i32 %21482, i32* %3
%21483 = load i32, i32* %3
%21484 = add nsw i32 %21483, 1
store i32 %21484, i32* %3
%21485 = load i32, i32* %3
%21486 = mul nsw i32 %21485, 2
store i32 %21486, i32* %3
%21487 = load i32, i32* %3
%21488 = sub nsw i32 %21487, 1
store i32 %21488, i32* %3
%21489 = load i32, i32* %3
%21490 = and i32 %21489, -1044481
store i32 %21490, i32* %3
%21491 = load i32, i32* %3
%21492 = xor i32 %21491, 81954
store i32 %21492, i32* %3
%21493 = load i32, i32* %3
%21494 = srem i32 %21493, 268435443
store i32 %21494, i32* %3
%21495 = load i32, i32* %3
%21496 = add nsw i32 %21495, 6
store i32 %21496, i32* %3
%21497 = load i32, i32* %3
%21498 = mul nsw i32 %21497, 10
store i32 %21498, i32* %3
%21499 = load i32, i32* %3
%21500 = add nsw i32 %21499, 1
store i32 %21500, i32* %3
%21501 = load i32, i32* %3
%21502 = mul nsw i32 %21501, 2
store i32 %21502, i32* %3
%21503 = load i32, i32* %3
%21504 = sub nsw i32 %21503, 1
store i32 %21504, i32* %3
%21505 = load i32, i32* %3
%21506 = and i32 %21505, -1044481
store i32 %21506, i32* %3
%21507 = load i32, i32* %3
%21508 = xor i32 %21507, 81954
store i32 %21508, i32* %3
%21509 = load i32, i32* %3
%21510 = srem i32 %21509, 268435443
store i32 %21510, i32* %3
%21511 = load i32, i32* %3
%21512 = add nsw i32 %21511, 6
store i32 %21512, i32* %3
%21513 = load i32, i32* %3
%21514 = mul nsw i32 %21513, 10
store i32 %21514, i32* %3
%21515 = load i32, i32* %3
%21516 = add nsw i32 %21515, 1
store i32 %21516, i32* %3
%21517 = load i32, i32* %3
%21518 = mul nsw i32 %21517, 2
store i32 %21518, i32* %3
%21519 = load i32, i32* %3
%21520 = sub nsw i32 %21519, 1
store i32 %21520, i32* %3
%21521 = load i32, i32* %3
%21522 = and i32 %21521, -1044481
store i32 %21522, i32* %3
%21523 = load i32, i32* %3
%21524 = xor i32 %21523, 81954
store i32 %21524, i32* %3
%21525 = load i32, i32* %3
%21526 = srem i32 %21525, 268435443
store i32 %21526, i32* %3
%21527 = load i32, i32* %3
%21528 = add nsw i32 %21527, 6
store i32 %21528, i32* %3
%21529 = load i32, i32* %3
%21530 = mul nsw i32 %21529, 10
store i32 %21530, i32* %3
%21531 = load i32, i32* %3
%21532 = add nsw i32 %21531, 1
store i32 %21532, i32* %3
%21533 = load i32, i32* %3
%21534 = mul nsw i32 %21533, 2
store i32 %21534, i32* %3
%21535 = load i32, i32* %3
%21536 = sub nsw i32 %21535, 1
store i32 %21536, i32* %3
%21537 = load i32, i32* %3
%21538 = and i32 %21537, -1044481
store i32 %21538, i32* %3
%21539 = load i32, i32* %3
%21540 = xor i32 %21539, 81954
store i32 %21540, i32* %3
%21541 = load i32, i32* %3
%21542 = srem i32 %21541, 268435443
store i32 %21542, i32* %3
%21543 = load i32, i32* %3
%21544 = add nsw i32 %21543, 6
store i32 %21544, i32* %3
%21545 = load i32, i32* %3
%21546 = mul nsw i32 %21545, 10
store i32 %21546, i32* %3
%21547 = load i32, i32* %3
%21548 = add nsw i32 %21547, 1
store i32 %21548, i32* %3
%21549 = load i32, i32* %3
%21550 = mul nsw i32 %21549, 2
store i32 %21550, i32* %3
%21551 = load i32, i32* %3
%21552 = sub nsw i32 %21551, 1
store i32 %21552, i32* %3
%21553 = load i32, i32* %3
%21554 = and i32 %21553, -1044481
store i32 %21554, i32* %3
%21555 = load i32, i32* %3
%21556 = xor i32 %21555, 81954
store i32 %21556, i32* %3
%21557 = load i32, i32* %3
%21558 = srem i32 %21557, 268435443
store i32 %21558, i32* %3
%21559 = load i32, i32* %3
%21560 = add nsw i32 %21559, 6
store i32 %21560, i32* %3
%21561 = load i32, i32* %3
%21562 = mul nsw i32 %21561, 10
store i32 %21562, i32* %3
%21563 = load i32, i32* %3
%21564 = add nsw i32 %21563, 1
store i32 %21564, i32* %3
%21565 = load i32, i32* %3
%21566 = mul nsw i32 %21565, 2
store i32 %21566, i32* %3
%21567 = load i32, i32* %3
%21568 = sub nsw i32 %21567, 1
store i32 %21568, i32* %3
%21569 = load i32, i32* %3
%21570 = and i32 %21569, -1044481
store i32 %21570, i32* %3
%21571 = load i32, i32* %3
%21572 = xor i32 %21571, 81954
store i32 %21572, i32* %3
%21573 = load i32, i32* %3
%21574 = srem i32 %21573, 268435443
store i32 %21574, i32* %3
%21575 = load i32, i32* %3
%21576 = add nsw i32 %21575, 6
store i32 %21576, i32* %3
%21577 = load i32, i32* %3
%21578 = mul nsw i32 %21577, 10
store i32 %21578, i32* %3
%21579 = load i32, i32* %3
%21580 = add nsw i32 %21579, 1
store i32 %21580, i32* %3
%21581 = load i32, i32* %3
%21582 = mul nsw i32 %21581, 2
store i32 %21582, i32* %3
%21583 = load i32, i32* %3
%21584 = sub nsw i32 %21583, 1
store i32 %21584, i32* %3
%21585 = load i32, i32* %3
%21586 = and i32 %21585, -1044481
store i32 %21586, i32* %3
%21587 = load i32, i32* %3
%21588 = xor i32 %21587, 81954
store i32 %21588, i32* %3
%21589 = load i32, i32* %3
%21590 = srem i32 %21589, 268435443
store i32 %21590, i32* %3
%21591 = load i32, i32* %3
%21592 = add nsw i32 %21591, 6
store i32 %21592, i32* %3
%21593 = load i32, i32* %3
%21594 = mul nsw i32 %21593, 10
store i32 %21594, i32* %3
%21595 = load i32, i32* %3
%21596 = add nsw i32 %21595, 1
store i32 %21596, i32* %3
%21597 = load i32, i32* %3
%21598 = mul nsw i32 %21597, 2
store i32 %21598, i32* %3
%21599 = load i32, i32* %3
%21600 = sub nsw i32 %21599, 1
store i32 %21600, i32* %3
%21601 = load i32, i32* %3
%21602 = and i32 %21601, -1044481
store i32 %21602, i32* %3
%21603 = load i32, i32* %3
%21604 = xor i32 %21603, 81954
store i32 %21604, i32* %3
%21605 = load i32, i32* %3
%21606 = srem i32 %21605, 268435443
store i32 %21606, i32* %3
%21607 = load i32, i32* %3
%21608 = add nsw i32 %21607, 6
store i32 %21608, i32* %3
%21609 = load i32, i32* %3
%21610 = mul nsw i32 %21609, 10
store i32 %21610, i32* %3
%21611 = load i32, i32* %3
%21612 = add nsw i32 %21611, 1
store i32 %21612, i32* %3
%21613 = load i32, i32* %3
%21614 = mul nsw i32 %21613, 2
store i32 %21614, i32* %3
%21615 = load i32, i32* %3
%21616 = sub nsw i32 %21615, 1
store i32 %21616, i32* %3
%21617 = load i32, i32* %3
%21618 = and i32 %21617, -1044481
store i32 %21618, i32* %3
%21619 = load i32, i32* %3
%21620 = xor i32 %21619, 81954
store i32 %21620, i32* %3
%21621 = load i32, i32* %3
%21622 = srem i32 %21621, 268435443
store i32 %21622, i32* %3
%21623 = load i32, i32* %3
%21624 = add nsw i32 %21623, 6
store i32 %21624, i32* %3
%21625 = load i32, i32* %3
%21626 = mul nsw i32 %21625, 10
store i32 %21626, i32* %3
%21627 = load i32, i32* %3
%21628 = add nsw i32 %21627, 1
store i32 %21628, i32* %3
%21629 = load i32, i32* %3
%21630 = mul nsw i32 %21629, 2
store i32 %21630, i32* %3
%21631 = load i32, i32* %3
%21632 = sub nsw i32 %21631, 1
store i32 %21632, i32* %3
%21633 = load i32, i32* %3
%21634 = and i32 %21633, -1044481
store i32 %21634, i32* %3
%21635 = load i32, i32* %3
%21636 = xor i32 %21635, 81954
store i32 %21636, i32* %3
%21637 = load i32, i32* %3
%21638 = srem i32 %21637, 268435443
store i32 %21638, i32* %3
%21639 = load i32, i32* %3
%21640 = add nsw i32 %21639, 6
store i32 %21640, i32* %3
%21641 = load i32, i32* %3
%21642 = mul nsw i32 %21641, 10
store i32 %21642, i32* %3
%21643 = load i32, i32* %3
%21644 = add nsw i32 %21643, 1
store i32 %21644, i32* %3
%21645 = load i32, i32* %3
%21646 = mul nsw i32 %21645, 2
store i32 %21646, i32* %3
%21647 = load i32, i32* %3
%21648 = sub nsw i32 %21647, 1
store i32 %21648, i32* %3
%21649 = load i32, i32* %3
%21650 = and i32 %21649, -1044481
store i32 %21650, i32* %3
%21651 = load i32, i32* %3
%21652 = xor i32 %21651, 81954
store i32 %21652, i32* %3
%21653 = load i32, i32* %3
%21654 = srem i32 %21653, 268435443
store i32 %21654, i32* %3
%21655 = load i32, i32* %3
%21656 = add nsw i32 %21655, 6
store i32 %21656, i32* %3
%21657 = load i32, i32* %3
%21658 = mul nsw i32 %21657, 10
store i32 %21658, i32* %3
%21659 = load i32, i32* %3
%21660 = add nsw i32 %21659, 1
store i32 %21660, i32* %3
%21661 = load i32, i32* %3
%21662 = mul nsw i32 %21661, 2
store i32 %21662, i32* %3
%21663 = load i32, i32* %3
%21664 = sub nsw i32 %21663, 1
store i32 %21664, i32* %3
%21665 = load i32, i32* %3
%21666 = and i32 %21665, -1044481
store i32 %21666, i32* %3
%21667 = load i32, i32* %3
%21668 = xor i32 %21667, 81954
store i32 %21668, i32* %3
%21669 = load i32, i32* %3
%21670 = srem i32 %21669, 268435443
store i32 %21670, i32* %3
%21671 = load i32, i32* %3
%21672 = add nsw i32 %21671, 6
store i32 %21672, i32* %3
%21673 = load i32, i32* %3
%21674 = mul nsw i32 %21673, 10
store i32 %21674, i32* %3
%21675 = load i32, i32* %3
%21676 = add nsw i32 %21675, 1
store i32 %21676, i32* %3
%21677 = load i32, i32* %3
%21678 = mul nsw i32 %21677, 2
store i32 %21678, i32* %3
%21679 = load i32, i32* %3
%21680 = sub nsw i32 %21679, 1
store i32 %21680, i32* %3
%21681 = load i32, i32* %3
%21682 = and i32 %21681, -1044481
store i32 %21682, i32* %3
%21683 = load i32, i32* %3
%21684 = xor i32 %21683, 81954
store i32 %21684, i32* %3
%21685 = load i32, i32* %3
%21686 = srem i32 %21685, 268435443
store i32 %21686, i32* %3
%21687 = load i32, i32* %3
%21688 = add nsw i32 %21687, 6
store i32 %21688, i32* %3
%21689 = load i32, i32* %3
%21690 = mul nsw i32 %21689, 10
store i32 %21690, i32* %3
%21691 = load i32, i32* %3
%21692 = add nsw i32 %21691, 1
store i32 %21692, i32* %3
%21693 = load i32, i32* %3
%21694 = mul nsw i32 %21693, 2
store i32 %21694, i32* %3
%21695 = load i32, i32* %3
%21696 = sub nsw i32 %21695, 1
store i32 %21696, i32* %3
%21697 = load i32, i32* %3
%21698 = and i32 %21697, -1044481
store i32 %21698, i32* %3
%21699 = load i32, i32* %3
%21700 = xor i32 %21699, 81954
store i32 %21700, i32* %3
%21701 = load i32, i32* %3
%21702 = srem i32 %21701, 268435443
store i32 %21702, i32* %3
%21703 = load i32, i32* %3
%21704 = add nsw i32 %21703, 6
store i32 %21704, i32* %3
%21705 = load i32, i32* %3
%21706 = mul nsw i32 %21705, 10
store i32 %21706, i32* %3
%21707 = load i32, i32* %3
%21708 = add nsw i32 %21707, 1
store i32 %21708, i32* %3
%21709 = load i32, i32* %3
%21710 = mul nsw i32 %21709, 2
store i32 %21710, i32* %3
%21711 = load i32, i32* %3
%21712 = sub nsw i32 %21711, 1
store i32 %21712, i32* %3
%21713 = load i32, i32* %3
%21714 = and i32 %21713, -1044481
store i32 %21714, i32* %3
%21715 = load i32, i32* %3
%21716 = xor i32 %21715, 81954
store i32 %21716, i32* %3
%21717 = load i32, i32* %3
%21718 = srem i32 %21717, 268435443
store i32 %21718, i32* %3
%21719 = load i32, i32* %3
%21720 = add nsw i32 %21719, 6
store i32 %21720, i32* %3
%21721 = load i32, i32* %3
%21722 = mul nsw i32 %21721, 10
store i32 %21722, i32* %3
%21723 = load i32, i32* %3
%21724 = add nsw i32 %21723, 1
store i32 %21724, i32* %3
%21725 = load i32, i32* %3
%21726 = mul nsw i32 %21725, 2
store i32 %21726, i32* %3
%21727 = load i32, i32* %3
%21728 = sub nsw i32 %21727, 1
store i32 %21728, i32* %3
%21729 = load i32, i32* %3
%21730 = and i32 %21729, -1044481
store i32 %21730, i32* %3
%21731 = load i32, i32* %3
%21732 = xor i32 %21731, 81954
store i32 %21732, i32* %3
%21733 = load i32, i32* %3
%21734 = srem i32 %21733, 268435443
store i32 %21734, i32* %3
%21735 = load i32, i32* %3
%21736 = add nsw i32 %21735, 6
store i32 %21736, i32* %3
%21737 = load i32, i32* %3
%21738 = mul nsw i32 %21737, 10
store i32 %21738, i32* %3
%21739 = load i32, i32* %3
%21740 = add nsw i32 %21739, 1
store i32 %21740, i32* %3
%21741 = load i32, i32* %3
%21742 = mul nsw i32 %21741, 2
store i32 %21742, i32* %3
%21743 = load i32, i32* %3
%21744 = sub nsw i32 %21743, 1
store i32 %21744, i32* %3
%21745 = load i32, i32* %3
%21746 = and i32 %21745, -1044481
store i32 %21746, i32* %3
%21747 = load i32, i32* %3
%21748 = xor i32 %21747, 81954
store i32 %21748, i32* %3
%21749 = load i32, i32* %3
%21750 = srem i32 %21749, 268435443
store i32 %21750, i32* %3
%21751 = load i32, i32* %3
%21752 = add nsw i32 %21751, 6
store i32 %21752, i32* %3
%21753 = load i32, i32* %3
%21754 = mul nsw i32 %21753, 10
store i32 %21754, i32* %3
%21755 = load i32, i32* %3
%21756 = add nsw i32 %21755, 1
store i32 %21756, i32* %3
%21757 = load i32, i32* %3
%21758 = mul nsw i32 %21757, 2
store i32 %21758, i32* %3
%21759 = load i32, i32* %3
%21760 = sub nsw i32 %21759, 1
store i32 %21760, i32* %3
%21761 = load i32, i32* %3
%21762 = and i32 %21761, -1044481
store i32 %21762, i32* %3
%21763 = load i32, i32* %3
%21764 = xor i32 %21763, 81954
store i32 %21764, i32* %3
%21765 = load i32, i32* %3
%21766 = srem i32 %21765, 268435443
store i32 %21766, i32* %3
%21767 = load i32, i32* %3
%21768 = add nsw i32 %21767, 6
store i32 %21768, i32* %3
%21769 = load i32, i32* %3
%21770 = mul nsw i32 %21769, 10
store i32 %21770, i32* %3
%21771 = load i32, i32* %3
%21772 = add nsw i32 %21771, 1
store i32 %21772, i32* %3
%21773 = load i32, i32* %3
%21774 = mul nsw i32 %21773, 2
store i32 %21774, i32* %3
%21775 = load i32, i32* %3
%21776 = sub nsw i32 %21775, 1
store i32 %21776, i32* %3
%21777 = load i32, i32* %3
%21778 = and i32 %21777, -1044481
store i32 %21778, i32* %3
%21779 = load i32, i32* %3
%21780 = xor i32 %21779, 81954
store i32 %21780, i32* %3
%21781 = load i32, i32* %3
%21782 = srem i32 %21781, 268435443
store i32 %21782, i32* %3
%21783 = load i32, i32* %3
%21784 = add nsw i32 %21783, 6
store i32 %21784, i32* %3
%21785 = load i32, i32* %3
%21786 = mul nsw i32 %21785, 10
store i32 %21786, i32* %3
%21787 = load i32, i32* %3
%21788 = add nsw i32 %21787, 1
store i32 %21788, i32* %3
%21789 = load i32, i32* %3
%21790 = mul nsw i32 %21789, 2
store i32 %21790, i32* %3
%21791 = load i32, i32* %3
%21792 = sub nsw i32 %21791, 1
store i32 %21792, i32* %3
%21793 = load i32, i32* %3
%21794 = and i32 %21793, -1044481
store i32 %21794, i32* %3
%21795 = load i32, i32* %3
%21796 = xor i32 %21795, 81954
store i32 %21796, i32* %3
%21797 = load i32, i32* %3
%21798 = srem i32 %21797, 268435443
store i32 %21798, i32* %3
%21799 = load i32, i32* %3
%21800 = add nsw i32 %21799, 6
store i32 %21800, i32* %3
%21801 = load i32, i32* %3
%21802 = mul nsw i32 %21801, 10
store i32 %21802, i32* %3
%21803 = load i32, i32* %3
%21804 = add nsw i32 %21803, 1
store i32 %21804, i32* %3
%21805 = load i32, i32* %3
%21806 = mul nsw i32 %21805, 2
store i32 %21806, i32* %3
%21807 = load i32, i32* %3
%21808 = sub nsw i32 %21807, 1
store i32 %21808, i32* %3
%21809 = load i32, i32* %3
%21810 = and i32 %21809, -1044481
store i32 %21810, i32* %3
%21811 = load i32, i32* %3
%21812 = xor i32 %21811, 81954
store i32 %21812, i32* %3
%21813 = load i32, i32* %3
%21814 = srem i32 %21813, 268435443
store i32 %21814, i32* %3
%21815 = load i32, i32* %3
%21816 = add nsw i32 %21815, 6
store i32 %21816, i32* %3
%21817 = load i32, i32* %3
%21818 = mul nsw i32 %21817, 10
store i32 %21818, i32* %3
%21819 = load i32, i32* %3
%21820 = add nsw i32 %21819, 1
store i32 %21820, i32* %3
%21821 = load i32, i32* %3
%21822 = mul nsw i32 %21821, 2
store i32 %21822, i32* %3
%21823 = load i32, i32* %3
%21824 = sub nsw i32 %21823, 1
store i32 %21824, i32* %3
%21825 = load i32, i32* %3
%21826 = and i32 %21825, -1044481
store i32 %21826, i32* %3
%21827 = load i32, i32* %3
%21828 = xor i32 %21827, 81954
store i32 %21828, i32* %3
%21829 = load i32, i32* %3
%21830 = srem i32 %21829, 268435443
store i32 %21830, i32* %3
%21831 = load i32, i32* %3
%21832 = add nsw i32 %21831, 6
store i32 %21832, i32* %3
%21833 = load i32, i32* %3
%21834 = mul nsw i32 %21833, 10
store i32 %21834, i32* %3
%21835 = load i32, i32* %3
%21836 = add nsw i32 %21835, 1
store i32 %21836, i32* %3
%21837 = load i32, i32* %3
%21838 = mul nsw i32 %21837, 2
store i32 %21838, i32* %3
%21839 = load i32, i32* %3
%21840 = sub nsw i32 %21839, 1
store i32 %21840, i32* %3
%21841 = load i32, i32* %3
%21842 = and i32 %21841, -1044481
store i32 %21842, i32* %3
%21843 = load i32, i32* %3
%21844 = xor i32 %21843, 81954
store i32 %21844, i32* %3
%21845 = load i32, i32* %3
%21846 = srem i32 %21845, 268435443
store i32 %21846, i32* %3
%21847 = load i32, i32* %3
%21848 = add nsw i32 %21847, 6
store i32 %21848, i32* %3
%21849 = load i32, i32* %3
%21850 = mul nsw i32 %21849, 10
store i32 %21850, i32* %3
%21851 = load i32, i32* %3
%21852 = add nsw i32 %21851, 1
store i32 %21852, i32* %3
%21853 = load i32, i32* %3
%21854 = mul nsw i32 %21853, 2
store i32 %21854, i32* %3
%21855 = load i32, i32* %3
%21856 = sub nsw i32 %21855, 1
store i32 %21856, i32* %3
%21857 = load i32, i32* %3
%21858 = and i32 %21857, -1044481
store i32 %21858, i32* %3
%21859 = load i32, i32* %3
%21860 = xor i32 %21859, 81954
store i32 %21860, i32* %3
%21861 = load i32, i32* %3
%21862 = srem i32 %21861, 268435443
store i32 %21862, i32* %3
%21863 = load i32, i32* %3
%21864 = add nsw i32 %21863, 6
store i32 %21864, i32* %3
%21865 = load i32, i32* %3
%21866 = mul nsw i32 %21865, 10
store i32 %21866, i32* %3
%21867 = load i32, i32* %3
%21868 = add nsw i32 %21867, 1
store i32 %21868, i32* %3
%21869 = load i32, i32* %3
%21870 = mul nsw i32 %21869, 2
store i32 %21870, i32* %3
%21871 = load i32, i32* %3
%21872 = sub nsw i32 %21871, 1
store i32 %21872, i32* %3
%21873 = load i32, i32* %3
%21874 = and i32 %21873, -1044481
store i32 %21874, i32* %3
%21875 = load i32, i32* %3
%21876 = xor i32 %21875, 81954
store i32 %21876, i32* %3
%21877 = load i32, i32* %3
%21878 = srem i32 %21877, 268435443
store i32 %21878, i32* %3
%21879 = load i32, i32* %3
%21880 = add nsw i32 %21879, 6
store i32 %21880, i32* %3
%21881 = load i32, i32* %3
%21882 = mul nsw i32 %21881, 10
store i32 %21882, i32* %3
%21883 = load i32, i32* %3
%21884 = add nsw i32 %21883, 1
store i32 %21884, i32* %3
%21885 = load i32, i32* %3
%21886 = mul nsw i32 %21885, 2
store i32 %21886, i32* %3
%21887 = load i32, i32* %3
%21888 = sub nsw i32 %21887, 1
store i32 %21888, i32* %3
%21889 = load i32, i32* %3
%21890 = and i32 %21889, -1044481
store i32 %21890, i32* %3
%21891 = load i32, i32* %3
%21892 = xor i32 %21891, 81954
store i32 %21892, i32* %3
%21893 = load i32, i32* %3
%21894 = srem i32 %21893, 268435443
store i32 %21894, i32* %3
%21895 = load i32, i32* %3
%21896 = add nsw i32 %21895, 6
store i32 %21896, i32* %3
%21897 = load i32, i32* %3
%21898 = mul nsw i32 %21897, 10
store i32 %21898, i32* %3
%21899 = load i32, i32* %3
%21900 = add nsw i32 %21899, 1
store i32 %21900, i32* %3
%21901 = load i32, i32* %3
%21902 = mul nsw i32 %21901, 2
store i32 %21902, i32* %3
%21903 = load i32, i32* %3
%21904 = sub nsw i32 %21903, 1
store i32 %21904, i32* %3
%21905 = load i32, i32* %3
%21906 = and i32 %21905, -1044481
store i32 %21906, i32* %3
%21907 = load i32, i32* %3
%21908 = xor i32 %21907, 81954
store i32 %21908, i32* %3
%21909 = load i32, i32* %3
%21910 = srem i32 %21909, 268435443
store i32 %21910, i32* %3
%21911 = load i32, i32* %3
%21912 = add nsw i32 %21911, 6
store i32 %21912, i32* %3
%21913 = load i32, i32* %3
%21914 = mul nsw i32 %21913, 10
store i32 %21914, i32* %3
%21915 = load i32, i32* %3
%21916 = add nsw i32 %21915, 1
store i32 %21916, i32* %3
%21917 = load i32, i32* %3
%21918 = mul nsw i32 %21917, 2
store i32 %21918, i32* %3
%21919 = load i32, i32* %3
%21920 = sub nsw i32 %21919, 1
store i32 %21920, i32* %3
%21921 = load i32, i32* %3
%21922 = and i32 %21921, -1044481
store i32 %21922, i32* %3
%21923 = load i32, i32* %3
%21924 = xor i32 %21923, 81954
store i32 %21924, i32* %3
%21925 = load i32, i32* %3
%21926 = srem i32 %21925, 268435443
store i32 %21926, i32* %3
%21927 = load i32, i32* %3
%21928 = add nsw i32 %21927, 6
store i32 %21928, i32* %3
%21929 = load i32, i32* %3
%21930 = mul nsw i32 %21929, 10
store i32 %21930, i32* %3
%21931 = load i32, i32* %3
%21932 = add nsw i32 %21931, 1
store i32 %21932, i32* %3
%21933 = load i32, i32* %3
%21934 = mul nsw i32 %21933, 2
store i32 %21934, i32* %3
%21935 = load i32, i32* %3
%21936 = sub nsw i32 %21935, 1
store i32 %21936, i32* %3
%21937 = load i32, i32* %3
%21938 = and i32 %21937, -1044481
store i32 %21938, i32* %3
%21939 = load i32, i32* %3
%21940 = xor i32 %21939, 81954
store i32 %21940, i32* %3
%21941 = load i32, i32* %3
%21942 = srem i32 %21941, 268435443
store i32 %21942, i32* %3
%21943 = load i32, i32* %3
%21944 = add nsw i32 %21943, 6
store i32 %21944, i32* %3
%21945 = load i32, i32* %3
%21946 = mul nsw i32 %21945, 10
store i32 %21946, i32* %3
%21947 = load i32, i32* %3
%21948 = add nsw i32 %21947, 1
store i32 %21948, i32* %3
%21949 = load i32, i32* %3
%21950 = mul nsw i32 %21949, 2
store i32 %21950, i32* %3
%21951 = load i32, i32* %3
%21952 = sub nsw i32 %21951, 1
store i32 %21952, i32* %3
%21953 = load i32, i32* %3
%21954 = and i32 %21953, -1044481
store i32 %21954, i32* %3
%21955 = load i32, i32* %3
%21956 = xor i32 %21955, 81954
store i32 %21956, i32* %3
%21957 = load i32, i32* %3
%21958 = srem i32 %21957, 268435443
store i32 %21958, i32* %3
%21959 = load i32, i32* %3
%21960 = add nsw i32 %21959, 6
store i32 %21960, i32* %3
%21961 = load i32, i32* %3
%21962 = mul nsw i32 %21961, 10
store i32 %21962, i32* %3
%21963 = load i32, i32* %3
%21964 = add nsw i32 %21963, 1
store i32 %21964, i32* %3
%21965 = load i32, i32* %3
%21966 = mul nsw i32 %21965, 2
store i32 %21966, i32* %3
%21967 = load i32, i32* %3
%21968 = sub nsw i32 %21967, 1
store i32 %21968, i32* %3
%21969 = load i32, i32* %3
%21970 = and i32 %21969, -1044481
store i32 %21970, i32* %3
%21971 = load i32, i32* %3
%21972 = xor i32 %21971, 81954
store i32 %21972, i32* %3
%21973 = load i32, i32* %3
%21974 = srem i32 %21973, 268435443
store i32 %21974, i32* %3
%21975 = load i32, i32* %3
%21976 = add nsw i32 %21975, 6
store i32 %21976, i32* %3
%21977 = load i32, i32* %3
%21978 = mul nsw i32 %21977, 10
store i32 %21978, i32* %3
%21979 = load i32, i32* %3
%21980 = add nsw i32 %21979, 1
store i32 %21980, i32* %3
%21981 = load i32, i32* %3
%21982 = mul nsw i32 %21981, 2
store i32 %21982, i32* %3
%21983 = load i32, i32* %3
%21984 = sub nsw i32 %21983, 1
store i32 %21984, i32* %3
%21985 = load i32, i32* %3
%21986 = and i32 %21985, -1044481
store i32 %21986, i32* %3
%21987 = load i32, i32* %3
%21988 = xor i32 %21987, 81954
store i32 %21988, i32* %3
%21989 = load i32, i32* %3
%21990 = srem i32 %21989, 268435443
store i32 %21990, i32* %3
%21991 = load i32, i32* %3
%21992 = add nsw i32 %21991, 6
store i32 %21992, i32* %3
%21993 = load i32, i32* %3
%21994 = mul nsw i32 %21993, 10
store i32 %21994, i32* %3
%21995 = load i32, i32* %3
%21996 = add nsw i32 %21995, 1
store i32 %21996, i32* %3
%21997 = load i32, i32* %3
%21998 = mul nsw i32 %21997, 2
store i32 %21998, i32* %3
%21999 = load i32, i32* %3
%22000 = sub nsw i32 %21999, 1
store i32 %22000, i32* %3
%22001 = load i32, i32* %3
%22002 = and i32 %22001, -1044481
store i32 %22002, i32* %3
%22003 = load i32, i32* %3
%22004 = xor i32 %22003, 81954
store i32 %22004, i32* %3
%22005 = load i32, i32* %3
%22006 = srem i32 %22005, 268435443
store i32 %22006, i32* %3
%22007 = load i32, i32* %3
%22008 = add nsw i32 %22007, 6
store i32 %22008, i32* %3
%22009 = load i32, i32* %3
%22010 = mul nsw i32 %22009, 10
store i32 %22010, i32* %3
br label %22011
22011: ; preds = %10
%22012 = load i32, i32* %5
%22013 = add nsw i32 %22012, 1
store i32 %22013, i32* %5
br label %7
22014: ; preds = %7
%22015 = load i32, i32* %3
ret i32 %22015
}

LLVM IR (-O2):