#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
scalar_t__ ea_address(int);
int /*<<< orphan*/ ea_alterable_na(int);
scalar_t__ is_checking(int);
int /*<<< orphan*/ printf(char *);
int bchg_handler(int opcode) {
  if (!ea_alterable_na(opcode))
    return -1;
  if ((opcode & 0x100) == 0 && ((opcode >> 9) & 7) != 4)
    return -1;
  if (is_checking(opcode))
    return 0;
  if (ea_address(opcode)) {
    printf("\t{\n\t\tuint8_t result = EV^(1<<(OP&7));\n");
    printf("\t\tSET_Z_FLAG((result>>(OP&7))&1);\n");
  } else {
    printf("\t{\n\t\tuint32_t result = EV^(1<<(OP&31));\n");
    printf("\t\tSET_Z_FLAG((result>>(OP&31))&1);\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<bchg_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1050 <ea_alterable_na@plt>
cmp    $0x0,%eax
jne    1168 <bchg_handler+0x28>
movl   $0xffffffff,-0x4(%rbp)
jmp    1203 <bchg_handler+0xc3>
mov    -0x8(%rbp),%eax
and    $0x100,%eax
cmp    $0x0,%eax
jne    1197 <bchg_handler+0x57>
mov    -0x8(%rbp),%eax
sar    $0x9,%eax
and    $0x7,%eax
cmp    $0x4,%eax
je     1197 <bchg_handler+0x57>
movl   $0xffffffff,-0x4(%rbp)
jmp    1203 <bchg_handler+0xc3>
mov    -0x8(%rbp),%edi
call   1030 <is_checking@plt>
cmp    $0x0,%rax
je     11b5 <bchg_handler+0x75>
movl   $0x0,-0x4(%rbp)
jmp    1203 <bchg_handler+0xc3>
mov    -0x8(%rbp),%edi
call   1060 <ea_address@plt>
cmp    $0x0,%rax
je     11e4 <bchg_handler+0xa4>
lea    0xe32(%rip),%rdi
call   1040 <printf@plt>
lea    0xe4d(%rip),%rdi
call   1040 <printf@plt>
jmp    11fc <bchg_handler+0xbc>
lea    0xe5f(%rip),%rdi
call   1040 <printf@plt>
lea    0xe7c(%rip),%rdi
call   1040 <printf@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bchg_handler>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1050 <ea_alterable_na@plt>
mov    $0xffffffff,%ebx
test   %eax,%eax
je     11b2 <bchg_handler+0x72>
test   $0x100,%ebp
jne    1169 <bchg_handler+0x29>
mov    %ebp,%eax
and    $0xe00,%eax
cmp    $0x800,%eax
jne    11b2 <bchg_handler+0x72>
mov    %ebp,%edi
call   1040 <is_checking@plt>
xor    %ebx,%ebx
test   %rax,%rax
jne    11b2 <bchg_handler+0x72>
mov    %ebp,%edi
call   1060 <ea_address@plt>
test   %rax,%rax
lea    0xe78(%rip),%rax
lea    0xebc(%rip),%rdi
cmove  %rax,%rdi
lea    0xe8e(%rip),%rax
lea    0xed0(%rip),%rbp
cmove  %rax,%rbp
call   1030 <puts@plt>
mov    %rbp,%rdi
call   1030 <puts@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [39 x i8] c"\09{\0A\09\09uint8_t result = EV^(1<<(OP&7));\0A\00"
@.str.1 = [35 x i8] c"\09\09SET_Z_FLAG((result>>(OP&7))&1);\0A\00"
@.str.2 = [41 x i8] c"\09{\0A\09\09uint32_t result = EV^(1<<(OP&31));\0A\00"
@.str.3 = [36 x i8] c"\09\09SET_Z_FLAG((result>>(OP&31))&1);\0A\00"
define i32 @bchg_handler(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @ea_alterable_na(i32 %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 -1, i32* %2
br label %34
8: ; preds = %1
%9 = load i32, i32* %3
%10 = and i32 %9, 256
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %8
%13 = load i32, i32* %3
%14 = ashr i32 %13, 9
%15 = and i32 %14, 7
%16 = icmp ne i32 %15, 4
br i1 %16, label %17, label %18
17: ; preds = %12
store i32 -1, i32* %2
br label %34
18: ; preds = %12, %8
%19 = load i32, i32* %3
%20 = call i64 @is_checking(i32 %19)
%21 = icmp ne i64 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 0, i32* %2
br label %34
23: ; preds = %18
%24 = load i32, i32* %3
%25 = call i64 @ea_address(i32 %24)
%26 = icmp ne i64 %25, 0
br i1 %26, label %27, label %30
27: ; preds = %23
%28 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
%29 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0))
br label %33
30: ; preds = %23
%31 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str.2, i64 0, i64 0))
%32 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.3, i64 0, i64 0))
br label %33
33: ; preds = %30, %27
store i32 0, i32* %2
br label %34
34: ; preds = %33, %22, %17, %7
%35 = load i32, i32* %2
ret i32 %35
}

LLVM IR (-O2):
@str = [40 x i8] c"\09{\0A\09\09uint32_t result = EV^(1<<(OP&31));\00"
@str.4 = [35 x i8] c"\09\09SET_Z_FLAG((result>>(OP&31))&1);\00"
@str.5 = [38 x i8] c"\09{\0A\09\09uint8_t result = EV^(1<<(OP&7));\00"
@str.6 = [34 x i8] c"\09\09SET_Z_FLAG((result>>(OP&7))&1);\00"
define i32 @bchg_handler(i32 %0) {
%2 = tail call i32 @ea_alterable_na(i32 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %20, label %4
4: ; preds = %1
%5 = and i32 %0, 256
%6 = icmp ne i32 %5, 0
%7 = and i32 %0, 3584
%8 = icmp eq i32 %7, 2048
%9 = or i1 %6, %8
br i1 %9, label %10, label %20
10: ; preds = %4
%11 = tail call i64 @is_checking(i32 %0)
%12 = icmp eq i64 %11, 0
br i1 %12, label %13, label %20
13: ; preds = %10
%14 = tail call i64 @ea_address(i32 %0)
%15 = icmp eq i64 %14, 0
%16 = select i1 %15, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @str, i64 0, i64 0), i8* getelementptr inbounds ([38 x i8], [38 x i8]* @str.5, i64 0, i64 0)
%17 = select i1 %15, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @str.4, i64 0, i64 0), i8* getelementptr inbounds ([34 x i8], [34 x i8]* @str.6, i64 0, i64 0)
%18 = tail call i32 @puts(i8* dereferenceable(1) %16)
%19 = tail call i32 @puts(i8* dereferenceable(1) %17)
br label %20
20: ; preds = %13, %10, %4, %1
%21 = phi i32 [ -1, %1 ], [ -1, %4 ], [ 0, %10 ], [ 0, %13 ]
ret i32 %21
}