xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ calloc(scalar_t__, int);
char *strcat(char *, char *);
scalar_t__ strlen(char *);
char *utils_strcat(char *_str1, char *_str2) {
  char *str3 = (char *)calloc((strlen(_str1) + strlen(_str2)), sizeof(char));
  str3 = strcat(str3, _str1);
  str3 = strcat(str3, _str2);
  return str3;
}


x86 assembly (clang, -O0):
<utils_strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
add    %rax,%rdi
mov    $0x1,%esi
call   1040 <calloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1050 <strcat@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <strcat@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utils_strcat>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
call   1030 <strlen@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <strlen@plt>
add    %rax,%rbx
mov    %rbx,%rdi
mov    $0x1,%esi
call   1040 <calloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r15,%rsi
call   1050 <strcat@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <strcat@plt>

LLVM IR (-O0):
define i8* @utils_strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
%8 = load i8*, i8** %4
%9 = call i64 @strlen(i8* %8)
%10 = add nsw i64 %7, %9
%11 = call i64 @calloc(i64 %10, i32 1)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %5
%13 = load i8*, i8** %5
%14 = load i8*, i8** %3
%15 = call i8* @strcat(i8* %13, i8* %14)
store i8* %15, i8** %5
%16 = load i8*, i8** %5
%17 = load i8*, i8** %4
%18 = call i8* @strcat(i8* %16, i8* %17)
store i8* %18, i8** %5
%19 = load i8*, i8** %5
ret i8* %19
}

LLVM IR (-O2):
define i8* @utils_strcat(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = add nsw i64 %4, %3
%6 = tail call i64 @calloc(i64 %5, i32 1)
%7 = inttoptr i64 %6 to i8*
%8 = tail call i8* @strcat(i8* dereferenceable(1) %7, i8* dereferenceable(1) %0)
%9 = tail call i8* @strcat(i8* dereferenceable(1) %7, i8* dereferenceable(1) %1)
ret i8* %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void cpu_to_le16s(uint16_t *p) {}


x86 assembly (clang, -O0):
<cpu_to_le16s>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_to_le16s>:
ret

LLVM IR (-O0):
define void @cpu_to_le16s(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @cpu_to_le16s(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _usage(int /*<<< orphan*/);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ stderr;
void _usage_error() {
  _usage(stderr);
  exit(1);
}


x86 assembly (clang, -O0):
<_usage_error>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
call   1030 <_usage@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<_usage_error>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
call   1030 <_usage@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @_usage_error() {
%1 = load i32, i32* @stderr
%2 = call i32 @_usage(i32 %1)
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
define void @_usage_error() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @_usage(i32 %1)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void bit_set16(volatile uint16_t *ptr, uint8_t bit) { *ptr |= (1 << (bit)); }


x86 assembly (clang, -O0):
<bit_set16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_set16>:
mov    %esi,%ecx
mov    $0x1,%eax
shl    %cl,%eax
or     %eax,(%rdi)
ret

LLVM IR (-O0):
define void @bit_set16(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 1, %5
%7 = load i32*, i32** %3
%8 = load volatile i32, i32* %7
%9 = or i32 %8, %6
store volatile i32 %9, i32* %7
ret void
}

LLVM IR (-O2):
define void @bit_set16(i32* %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = load volatile i32, i32* %0
%5 = or i32 %4, %3
store volatile i32 %5, i32* %0
ret void
}
void lcdl_exit(void) {}


x86 assembly (clang, -O0):
<lcdl_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcdl_exit>:
ret

LLVM IR (-O0):
define void @lcdl_exit() {
ret void
}

LLVM IR (-O2):
define void @lcdl_exit() {
ret void
}
OP(ed, f4) {}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
ret

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ glcRenderCountedString(int, char *);
void glcRenderChar(char c) { glcRenderCountedString(1, &c); }


x86 assembly (clang, -O0):
<glcRenderChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x1,%edi
lea    -0x1(%rbp),%rsi
call   1030 <glcRenderCountedString@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glcRenderChar>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edi
call   1030 <glcRenderCountedString@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @glcRenderChar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @glcRenderCountedString(i32 1, i8* %2)
ret void
}

LLVM IR (-O2):
define void @glcRenderChar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @glcRenderCountedString(i32 1, i8* %2)
ret void
}
/* Variables and functions */
float random_float(float const, float const);
void random_float_array(float array[], const unsigned int length,
                        const float min, const float max) {
  for (int i = 0; i < length; ++i)
    array[i] = random_float(min, max);
}


x86 assembly (clang, -O0):
<random_float_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movss  %xmm0,-0x10(%rbp)
movss  %xmm1,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0xc(%rbp),%eax
jae    1166 <random_float_array+0x56>
movss  -0x10(%rbp),%xmm0
movss  -0x14(%rbp),%xmm1
call   1030 <random_float@plt>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1130 <random_float_array+0x20>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_float_array>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
test   %esi,%esi
je     1160 <random_float_array+0x50>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
movss  %xmm1,0xc(%rsp)
movss  %xmm0,0x8(%rsp)
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movss  0x8(%rsp),%xmm0
movss  0xc(%rsp),%xmm1
call   1030 <random_float@plt>
movss  %xmm0,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1140 <random_float_array+0x30>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @random_float_array(float* %0, i32 %1, float %2, float %3) {
%5 = alloca float*
%6 = alloca i32
%7 = alloca float
%8 = alloca float
%9 = alloca i32
store float* %0, float** %5
store i32 %1, i32* %6
store float %2, float* %7
store float %3, float* %8
store i32 0, i32* %9
br label %10
10: ; preds = %22, %4
%11 = load i32, i32* %9
%12 = load i32, i32* %6
%13 = icmp ult i32 %11, %12
br i1 %13, label %14, label %25
14: ; preds = %10
%15 = load float, float* %7
%16 = load float, float* %8
%17 = call float @random_float(float %15, float %16)
%18 = load float*, float** %5
%19 = load i32, i32* %9
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds float, float* %18, i64 %20
store float %17, float* %21
br label %22
22: ; preds = %14
%23 = load i32, i32* %9
%24 = add nsw i32 %23, 1
store i32 %24, i32* %9
br label %10
25: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @random_float_array(float* nocapture writeonly %0, i32 %1, float %2, float %3) {
%5 = icmp eq i32 %1, 0
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = zext i32 %1 to i64
br label %9
8: ; preds = %9, %4
ret void
9: ; preds = %6, %9
%10 = phi i64 [ 0, %6 ], [ %13, %9 ]
%11 = tail call float @random_float(float %2, float %3)
%12 = getelementptr inbounds float, float* %0, i64 %10
store float %11, float* %12
%13 = add nuw nsw i64 %10, 1
%14 = icmp eq i64 %13, %7
br i1 %14, label %8, label %9
}
int main() { return 99; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x63,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x63,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 99
}

LLVM IR (-O2):
define i32 @main() {
ret i32 99
}
void openblocks_a6_init(void) {}


x86 assembly (clang, -O0):
<openblocks_a6_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openblocks_a6_init>:
ret

LLVM IR (-O0):
define void @openblocks_a6_init() {
ret void
}

LLVM IR (-O2):
define void @openblocks_a6_init() {
ret void
}
void foo_1_1_1_1_2_1_1_1_1() {}


x86 assembly (clang, -O0):
<foo_1_1_1_1_2_1_1_1_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_1_1_1_1_2_1_1_1_1>:
ret

LLVM IR (-O0):
define void @foo_1_1_1_1_2_1_1_1_1() {
ret void
}

LLVM IR (-O2):
define void @foo_1_1_1_1_2_1_1_1_1() {
ret void
}
long long ft_llongmin(long long n1, long long n2) {
  return ((n1 < n2) ? n1 : n2);
}


x86 assembly (clang, -O0):
<ft_llongmin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jge    1127 <ft_llongmin+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <ft_llongmin+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_llongmin>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovl  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @ft_llongmin(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @ft_llongmin(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int unlink(char const *);
int removelock(const char *path) { return unlink(path); }


x86 assembly (clang, -O0):
<removelock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <unlink@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<removelock>:
jmp    1030 <unlink@plt>

LLVM IR (-O0):
define i32 @removelock(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @unlink(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @removelock(i8* nocapture %0) {
%2 = tail call i32 @unlink(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
void idt_irq7(void) { print("IRQ 7"); }


x86 assembly (clang, -O0):
<idt_irq7>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <print@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<idt_irq7>:
lea    0xee9(%rip),%rdi
jmp    1030 <print@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"IRQ 7\00"
define void @idt_irq7() {
%1 = call i32 @print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"IRQ 7\00"
define void @idt_irq7() {
%1 = tail call i32 @print(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
int do_513() { return 513; }


x86 assembly (clang, -O0):
<do_513>:
push   %rbp
mov    %rsp,%rbp
mov    $0x201,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_513>:
mov    $0x201,%eax
ret

LLVM IR (-O0):
define i32 @do_513() {
ret i32 513
}

LLVM IR (-O2):
define i32 @do_513() {
ret i32 513
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;

/* Variables and functions */
int /*<<< orphan*/ glVertex3iv(int /*<<< orphan*/ *);
void Vertex3iv(GLint v[3]) { glVertex3iv(v); }


x86 assembly (clang, -O0):
<Vertex3iv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <glVertex3iv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Vertex3iv>:
jmp    1030 <glVertex3iv@plt>

LLVM IR (-O0):
define void @Vertex3iv(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @glVertex3iv(i32* %3)
ret void
}

LLVM IR (-O2):
define void @Vertex3iv(i32* %0) {
%2 = tail call i32 @glVertex3iv(i32* %0)
ret void
}
/* Variables and functions */
int _floor(float);
int _round(float n) { return _floor(n + 0.5f); }


x86 assembly (clang, -O0):
<_round>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  0xedb(%rip),%xmm0
addss  -0x4(%rbp),%xmm0
call   1030 <_floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_round>:
addss  0xee8(%rip),%xmm0
jmp    1030 <_floor@plt>

LLVM IR (-O0):
define i32 @_round(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fadd float %3, 5.000000e-01
%5 = call i32 @_floor(float %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @_round(float %0) {
%2 = fadd float %0, 5.000000e-01
%3 = tail call i32 @_floor(float %2)
ret i32 %3
}
int ppce500_pci_map_irq_slot(int devno, int irq_num) {
  return (devno + irq_num) % 4;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
lea    (%rsi,%rdi,1),%ecx
add    $0x3,%ecx
mov    %esi,%eax
add    %edi,%eax
cmovns %eax,%ecx
and    $0xfffffffc,%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ppce500_pci_map_irq_slot(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = srem i32 %7, 4
ret i32 %8
}

LLVM IR (-O2):
define i32 @ppce500_pci_map_irq_slot(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = srem i32 %3, 4
ret i32 %4
}
double add(double a, double b) { return (a + b); }


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @add(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @add(double %0, double %1) {
%3 = fadd double %0, %1
ret double %3
}
void RTAvlrGCPtrRemove(void) {}


x86 assembly (clang, -O0):
<RTAvlrGCPtrRemove>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAvlrGCPtrRemove>:
ret

LLVM IR (-O0):
define void @RTAvlrGCPtrRemove() {
ret void
}

LLVM IR (-O2):
define void @RTAvlrGCPtrRemove() {
ret void
}
/* Variables and functions */
unsigned char *b64_decode_ex(char const *, size_t, int /*<<< orphan*/ *);
unsigned char *b64_decode(const char *src, size_t len) {
  return b64_decode_ex(src, len, NULL);
}


x86 assembly (clang, -O0):
<b64_decode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <b64_decode_ex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b64_decode>:
xor    %edx,%edx
jmp    1030 <b64_decode_ex@plt>

LLVM IR (-O0):
define i8* @b64_decode(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i8* @b64_decode_ex(i8* %5, i64 %6, i32* null)
ret i8* %7
}

LLVM IR (-O2):
define i8* @b64_decode(i8* %0, i64 %1) {
%3 = tail call i8* @b64_decode_ex(i8* %0, i64 %1, i32* null)
ret i8* %3
}
void register_ebln_implementation(struct ebln_implementation *imp) {}


x86 assembly (clang, -O0):
<register_ebln_implementation>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<register_ebln_implementation>:
ret

LLVM IR (-O0):
%struct.ebln_implementation = type opaque
define void @register_ebln_implementation(%struct.ebln_implementation* %0) {
%2 = alloca %struct.ebln_implementation*
store %struct.ebln_implementation* %0, %struct.ebln_implementation** %2
ret void
}

LLVM IR (-O2):
%struct.ebln_implementation = type opaque
define void @register_ebln_implementation(%struct.ebln_implementation* nocapture %0) {
ret void
}
void test3() {
  struct A {
    unsigned int foo : 2;
    int bar : 2;
  };
  struct A a = {0, 10};
  struct A b[] = {0, 10, 0, 0};
  struct A c[] = {{10, 0}};
  struct A d = (struct A){10, 0};
  struct A e = {.foo = 10};
}


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
mov    0xef6(%rip),%eax
mov    %eax,-0x8(%rbp)
mov    0xef4(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xee6(%rip),%eax
mov    %eax,-0x18(%rbp)
mov    0xedd(%rip),%eax
mov    %eax,-0x20(%rbp)
mov    0xed4(%rip),%eax
mov    %eax,-0x28(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
ret

LLVM IR (-O0):
%struct.A = type { i8, [3 x i8] }
@__const.test3.a = %struct.A { i8 8, [3 x i8] undef }
@__const.test3.b = [2 x %struct.A] [%struct.A { i8 8, [3 x i8] undef }, %struct.A { i8 0, [3 x i8] undef }]
@__const.test3.c = [1 x %struct.A] [%struct.A { i8 2, [3 x i8] undef }]
@__const.test3.d = %struct.A { i8 2, [3 x i8] undef }
@__const.test3.e = %struct.A { i8 2, [3 x i8] undef }
define void @test3() {
%1 = alloca %struct.A
%2 = alloca [2 x %struct.A]
%3 = alloca [1 x %struct.A]
%4 = alloca %struct.A
%5 = alloca %struct.A
%6 = bitcast %struct.A* %1 to i8*
%7 = bitcast [2 x %struct.A]* %2 to i8*
%8 = bitcast [1 x %struct.A]* %3 to i8*
%9 = bitcast %struct.A* %4 to i8*
%10 = bitcast %struct.A* %5 to i8*
ret void
}

LLVM IR (-O2):
define void @test3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ STDOUT_FILENO;
int /*<<< orphan*/ write(int /*<<< orphan*/, char *, int);
void fini_0(void) { write(STDOUT_FILENO, "DSO fini array 0\n", 17); }


x86 assembly (clang, -O0):
<fini_0>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
mov    $0x11,%edx
call   1030 <write@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fini_0>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
mov    $0x11,%edx
jmp    1030 <write@plt>

LLVM IR (-O0):
@STDOUT_FILENO = global i32 0
@.str = [18 x i8] c"DSO fini array 0\0A\00"
define void @fini_0() {
%1 = load i32, i32* @STDOUT_FILENO
%2 = call i32 @write(i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 17)
ret void
}

LLVM IR (-O2):
@STDOUT_FILENO = global i32 0
@.str = [18 x i8] c"DSO fini array 0\0A\00"
define void @fini_0() {
%1 = load i32, i32* @STDOUT_FILENO
%2 = tail call i32 @write(i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 17)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ STDIN_FILENO;
int /*<<< orphan*/ init_symtbl();
int lispcalc(int /*<<< orphan*/);
int main(int argc, char **argv) {
  init_symtbl();
  return lispcalc(STDIN_FILENO);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <init_symtbl@plt>
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
call   1030 <lispcalc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <init_symtbl@plt>
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1030 <lispcalc@plt>

LLVM IR (-O0):
@STDIN_FILENO = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @init_symtbl()
%7 = load i32, i32* @STDIN_FILENO
%8 = call i32 @lispcalc(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@STDIN_FILENO = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @init_symtbl()
%4 = load i32, i32* @STDIN_FILENO
%5 = tail call i32 @lispcalc(i32 %4)
ret i32 %5
}
indreg0adrx1(r0, r1, x0, x1, p0, p1) unsigned short r0, r1;
unsigned short *p0, *p1;
{
  if ((*p0) <= (((unsigned short *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<indreg0adrx1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movzwl (%rax),%eax
movslq -0x10(%rbp),%rdx
mov    $0xa98ac7,%ecx
movzwl (%rcx,%rdx,2),%ecx
cmp    %ecx,%eax
jg     1147 <indreg0adrx1+0x47>
movl   $0x1,-0x4(%rbp)
jmp    114e <indreg0adrx1+0x4e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indreg0adrx1>:
movzwl (%r8),%edx
movslq %ecx,%rcx
xor    %eax,%eax
cmp    0xa98ac7(%rcx,%rcx,1),%dx
setbe  %al
ret

LLVM IR (-O0):
define i32 @indreg0adrx1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %12
%17 = load i16, i16* %16
%18 = zext i16 %17 to i32
%19 = load i32, i32* %11
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %20
%22 = load i16, i16* %21
%23 = zext i16 %22 to i32
%24 = icmp sle i32 %18, %23
br i1 %24, label %25, label %26
25: ; preds = %6
store i32 1, i32* %7
br label %27
26: ; preds = %6
store i32 0, i32* %7
br label %27
27: ; preds = %26, %25
%28 = load i32, i32* %7
ret i32 %28
}

LLVM IR (-O2):
define i32 @indreg0adrx1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture %4, i16* nocapture readnone %5) {
%7 = load i16, i16* %4
%8 = sext i32 %3 to i64
%9 = getelementptr inbounds i16, i16* inttoptr (i64 11111111 to i16*), i64 %8
%10 = load i16, i16* %9
%11 = icmp ule i16 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Type definitions */
typedef int pid_t;

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ err_msg(char *, int /*<<< orphan*/);
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int setsid();
int /*<<< orphan*/ strerror(int /*<<< orphan*/);
pid_t Setsid(void) {
  pid_t ret;
  if ((ret = setsid()) == -1) {
    err_msg("error setsid: %s", strerror(errno));
    exit(EXIT_FAILURE);
  }
  return ret;
}


x86 assembly (clang, -O0):
<Setsid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <setsid@plt>
mov    %eax,-0x4(%rbp)
cmp    $0xffffffff,%eax
jne    1185 <Setsid+0x45>
mov    0x2e7e(%rip),%rax
mov    (%rax),%edi
call   1060 <strerror@plt>
mov    %eax,%esi
lea    0xe8e(%rip),%rdi
call   1040 <err_msg@plt>
mov    0x2e5a(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Setsid>:
push   %rax
xor    %eax,%eax
call   1030 <setsid@plt>
cmp    $0xffffffff,%eax
je     114f <Setsid+0xf>
pop    %rcx
ret
mov    0x2e8a(%rip),%rax
mov    (%rax),%edi
call   1060 <strerror@plt>
lea    0xe9c(%rip),%rdi
mov    %eax,%esi
call   1040 <err_msg@plt>
mov    0x2e66(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"error setsid: %s\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define i32 @Setsid() {
%1 = alloca i32
%2 = call i32 (...) @setsid()
store i32 %2, i32* %1
%3 = icmp eq i32 %2, -1
br i1 %3, label %4, label %10
4: ; preds = %0
%5 = load i32, i32* @errno
%6 = call i32 @strerror(i32 %5)
%7 = call i32 @err_msg(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i32, i32* @EXIT_FAILURE
%9 = call i32 @exit(i32 %8)
unreachable
10: ; preds = %0
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@.str = [17 x i8] c"error setsid: %s\00"
@errno = global i32 0
@EXIT_FAILURE = global i32 0
define i32 @Setsid() {
%1 = tail call i32 (...) @setsid()
%2 = icmp eq i32 %1, -1
br i1 %2, label %3, label %9
3: ; preds = %0
%4 = load i32, i32* @errno
%5 = tail call i32 @strerror(i32 %4)
%6 = tail call i32 @err_msg(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
9: ; preds = %0
ret i32 %1
}
/* Variables and functions */
size_t findNotEmpty(size_t *shared, size_t size) {
  size_t i;
  for (i = 0; i < size; i++) {
    if (shared[i] != 0) {
      return i;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<findNotEmpty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1158 <findNotEmpty+0x58>
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1142 <findNotEmpty+0x42>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1160 <findNotEmpty+0x60>
jmp    1147 <findNotEmpty+0x47>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1114 <findNotEmpty+0x14>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<findNotEmpty>:
mov    $0xffffffffffffffff,%rax
test   %rsi,%rsi
je     1120 <findNotEmpty+0x20>
xor    %ecx,%ecx
xchg   %ax,%ax
cmpq   $0x0,(%rdi,%rcx,8)
jne    1121 <findNotEmpty+0x21>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <findNotEmpty+0x10>
ret
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @findNotEmpty(i64* %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 0, i64* %6
br label %7
7: ; preds = %20, %2
%8 = load i64, i64* %6
%9 = load i64, i64* %5
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %7
%12 = load i64*, i64** %4
%13 = load i64, i64* %6
%14 = getelementptr inbounds i64, i64* %12, i64 %13
%15 = load i64, i64* %14
%16 = icmp ne i64 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %11
%18 = load i64, i64* %6
store i64 %18, i64* %3
br label %24
19: ; preds = %11
br label %20
20: ; preds = %19
%21 = load i64, i64* %6
%22 = add i64 %21, 1
store i64 %22, i64* %6
br label %7
23: ; preds = %7
store i64 -1, i64* %3
br label %24
24: ; preds = %23, %17
%25 = load i64, i64* %3
ret i64 %25
}

LLVM IR (-O2):
define i64 @findNotEmpty(i64* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %12, label %4
4: ; preds = %2, %9
%5 = phi i64 [ %10, %9 ], [ 0, %2 ]
%6 = getelementptr inbounds i64, i64* %0, i64 %5
%7 = load i64, i64* %6
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = add nuw i64 %5, 1
%11 = icmp eq i64 %10, %1
br i1 %11, label %12, label %4
12: ; preds = %4, %9, %2
%13 = phi i64 [ -1, %2 ], [ -1, %9 ], [ %5, %4 ]
ret i64 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
short int existFile(char *filePath) {
  FILE *myFile = fopen(filePath, "r");
  if (myFile) {
    fclose(myFile);
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<existFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     115f <existFile+0x3f>
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
movw   $0x1,-0x2(%rbp)
jmp    1165 <existFile+0x45>
movw   $0x0,-0x2(%rbp)
movswl -0x2(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<existFile>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <fopen@plt>
test   %rax,%rax
je     1140 <existFile+0x20>
mov    %rax,%rdi
call   1030 <fclose@plt>
mov    $0x1,%ax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define signext i16 @existFile(i8* %0) {
%2 = alloca i16
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32* @fopen(i8* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %6, i32** %4
%7 = load i32*, i32** %4
%8 = icmp ne i32* %7, null
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i32*, i32** %4
%11 = call i32 @fclose(i32* %10)
store i16 1, i16* %2
br label %13
12: ; preds = %1
store i16 0, i16* %2
br label %13
13: ; preds = %12, %9
%14 = load i16, i16* %2
ret i16 %14
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define signext i16 @existFile(i8* nocapture %0) {
%2 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @fclose(i32* %2)
br label %6
6: ; preds = %1, %4
%7 = phi i16 [ 1, %4 ], [ 0, %1 ]
ret i16 %7
}
void cc_arduino_Lifecycle_pollen__ready__E() {}


x86 assembly (clang, -O0):
<cc_arduino_Lifecycle_pollen__ready__E>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cc_arduino_Lifecycle_pollen__ready__E>:
ret

LLVM IR (-O0):
define void @cc_arduino_Lifecycle_pollen__ready__E() {
ret void
}

LLVM IR (-O2):
define void @cc_arduino_Lifecycle_pollen__ready__E() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void ADCSequenceDMAEnable(uint32_t ui32Base, uint32_t ui32SequenceNum) {
  ;
  ;
  (*((volatile uint32_t *)(ui32Base + 0x00000000))) |= 0x100 << ui32SequenceNum;
}


x86 assembly (clang, -O0):
<ADCSequenceDMAEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
mov    $0x100,%edx
shl    %cl,%edx
mov    -0x4(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCSequenceDMAEnable>:
mov    %esi,%ecx
mov    $0x100,%eax
shl    %cl,%eax
movslq %edi,%rcx
or     %eax,(%rcx)
ret

LLVM IR (-O0):
define void @ADCSequenceDMAEnable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 256, %5
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 0
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = or i32 %11, %6
store volatile i32 %12, i32* %10
ret void
}

LLVM IR (-O2):
define void @ADCSequenceDMAEnable(i32 %0, i32 %1) {
%3 = shl i32 256, %1
%4 = sext i32 %0 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = or i32 %6, %3
store volatile i32 %7, i32* %5
ret void
}
void gtk_hscale_get_type() {}


x86 assembly (clang, -O0):
<gtk_hscale_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_hscale_get_type>:
ret

LLVM IR (-O0):
define void @gtk_hscale_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_hscale_get_type() {
ret void
}
/* Type definitions */
struct clone_args {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ syscall(int, struct clone_args *, int);
pid_t sys_clone3(struct clone_args *args) {
  return syscall(-1, args, sizeof(struct clone_args));
}


x86 assembly (clang, -O0):
<sys_clone3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0xffffffff,%edi
mov    $0x4,%edx
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_clone3>:
mov    %rdi,%rsi
mov    $0xffffffff,%edi
mov    $0x4,%edx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.clone_args = type { i32 }
define i32 @sys_clone3(%struct.clone_args* %0) {
%2 = alloca %struct.clone_args*
store %struct.clone_args* %0, %struct.clone_args** %2
%3 = load %struct.clone_args*, %struct.clone_args** %2
%4 = call i32 @syscall(i32 -1, %struct.clone_args* %3, i32 4)
ret i32 %4
}

LLVM IR (-O2):
%struct.clone_args = type { i32 }
define i32 @sys_clone3(%struct.clone_args* %0) {
%2 = tail call i32 @syscall(i32 -1, %struct.clone_args* %0, i32 4)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_help() {
  printf(
      "\n"
      " memctl is a commandline tool which allows you to read or write "
      "directly \n"
      " to the beaglebone's registers. It uses the mmap system call to map the "
      "\n"
      " register you want to use.\n"
      "\n"
      " USAGE: memctl {ADDRESS} [OFFSET] [OPTIONS]\n"
      "      arguments in curly brackets are necessary, but those in square\n"
      "      brackets are optional.\n"
      "\n"
      " OPTIONS:\n"
      "      w=[HEX_DATA]  ... hexadecimal data to write\n"
      "      r=[REG_SIZE]  ... size of the register in Bit\n"
      "      -s|--simple   ... print only the content of the register\n"
      "      -h|--help     ... print this message\n"
      "\n");
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [539 x i8] c"\0A memctl is a commandline tool which allows you to read or write directly \0A to the beaglebone's registers. It uses the mmap system call to map the \0A register you want to use.\0A\0A USAGE: memctl {ADDRESS} [OFFSET] [OPTIONS]\0A arguments in curly brackets are necessary, but those in square\0A brackets are optional.\0A\0A OPTIONS:\0A w=[HEX_DATA] ... hexadecimal data to write\0A r=[REG_SIZE] ... size of the register in Bit\0A -s|--simple ... print only the content of the register\0A -h|--help ... print this message\0A\0A\00"
define void @print_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([539 x i8], [539 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [538 x i8] c"\0A memctl is a commandline tool which allows you to read or write directly \0A to the beaglebone's registers. It uses the mmap system call to map the \0A register you want to use.\0A\0A USAGE: memctl {ADDRESS} [OFFSET] [OPTIONS]\0A arguments in curly brackets are necessary, but those in square\0A brackets are optional.\0A\0A OPTIONS:\0A w=[HEX_DATA] ... hexadecimal data to write\0A r=[REG_SIZE] ... size of the register in Bit\0A -s|--simple ... print only the content of the register\0A -h|--help ... print this message\0A\00"
define void @print_help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([538 x i8], [538 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo(int *);
int main() {
  int a = 0;
  foo(&a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @foo(i32* %2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = call i32 @foo(i32* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cpu_to_le32(unsigned long);
int /*<<< orphan*/ outl(int /*<<< orphan*/, unsigned int);
void nsp32_write4(unsigned int base, unsigned int index, unsigned long val) {
  outl(cpu_to_le32(val), (base + index));
}


x86 assembly (clang, -O0):
<nsp32_write4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <cpu_to_le32@plt>
mov    %eax,%edi
mov    -0x4(%rbp),%esi
add    -0x8(%rbp),%esi
call   1040 <outl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nsp32_write4>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %rdx,%rdi
call   1030 <cpu_to_le32@plt>
add    %ebp,%ebx
mov    %eax,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <outl@plt>

LLVM IR (-O0):
define void @nsp32_write4(i32 %0, i32 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
store i32 %0, i32* %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = call i32 @cpu_to_le32(i64 %7)
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = add i32 %9, %10
%12 = call i32 @outl(i32 %8, i32 %11)
ret void
}

LLVM IR (-O2):
define void @nsp32_write4(i32 %0, i32 %1, i64 %2) {
%4 = tail call i32 @cpu_to_le32(i64 %2)
%5 = add i32 %1, %0
%6 = tail call i32 @outl(i32 %4, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ die(char *);
int /*<<< orphan*/ show_dll_error_code(int);
void die_with_code(int res, char *msg) {
  show_dll_error_code(res);
  die(msg);
}


x86 assembly (clang, -O0):
<die_with_code>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <show_dll_error_code@plt>
mov    -0x10(%rbp),%rdi
call   1040 <die@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<die_with_code>:
push   %rbx
mov    %rsi,%rbx
call   1030 <show_dll_error_code@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <die@plt>

LLVM IR (-O0):
define void @die_with_code(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = call i32 @show_dll_error_code(i32 %5)
%7 = load i8*, i8** %4
%8 = call i32 @die(i8* %7)
ret void
}

LLVM IR (-O2):
define void @die_with_code(i32 %0, i8* %1) {
%3 = tail call i32 @show_dll_error_code(i32 %0)
%4 = tail call i32 @die(i8* %1)
ret void
}
txt_sysex(leng, mess) char *mess;
{
  prtime();
  printf("Sysex, leng=%d\n", leng);
}


x86 assembly (clang, -O0):
<txt_sysex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <prtime@plt>
mov    -0x8(%rbp),%esi
lea    0xec0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<txt_sysex>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <prtime@plt>
lea    0xecf(%rip),%rdi
mov    %ebx,%esi
xor    %eax,%eax
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"Sysex, leng=%d\0A\00"
define i32 @txt_sysex(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = call i32 (...) @prtime()
%7 = load i32, i32* %4
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
@.str = [16 x i8] c"Sysex, leng=%d\0A\00"
define i32 @txt_sysex(i32 %0, i8* nocapture readnone %1) {
%3 = tail call i32 (...) @prtime()
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 undef
}
int poissonsEquationExp3D_dr(int *iwork, double *rwork, int nPoints, double t,
                             double *X, double *u, double *dr) {
  int i;
  for (i = 0; i < nPoints; i++) {
    dr[i] = 0.0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<poissonsEquationExp3D_dr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movsd  %xmm0,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
mov    %r9,-0x38(%rbp)
movl   $0x0,-0x3c(%rbp)
mov    -0x3c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1151 <poissonsEquationExp3D_dr+0x51>
mov    -0x38(%rbp),%rax
movslq -0x3c(%rbp),%rcx
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x3c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x3c(%rbp)
jmp    1127 <poissonsEquationExp3D_dr+0x27>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<poissonsEquationExp3D_dr>:
test   %edx,%edx
jle    1129 <poissonsEquationExp3D_dr+0x19>
push   %rax
mov    %edx,%edx
shl    $0x3,%rdx
mov    %r9,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @poissonsEquationExp3D_dr(i32* %0, double* %1, i32 %2, double %3, double* %4, double* %5, double* %6) {
%8 = alloca i32*
%9 = alloca double*
%10 = alloca i32
%11 = alloca double
%12 = alloca double*
%13 = alloca double*
%14 = alloca double*
%15 = alloca i32
store i32* %0, i32** %8
store double* %1, double** %9
store i32 %2, i32* %10
store double %3, double* %11
store double* %4, double** %12
store double* %5, double** %13
store double* %6, double** %14
store i32 0, i32* %15
br label %16
16: ; preds = %25, %7
%17 = load i32, i32* %15
%18 = load i32, i32* %10
%19 = icmp slt i32 %17, %18
br i1 %19, label %20, label %28
20: ; preds = %16
%21 = load double*, double** %14
%22 = load i32, i32* %15
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds double, double* %21, i64 %23
store double 0.000000e+00, double* %24
br label %25
25: ; preds = %20
%26 = load i32, i32* %15
%27 = add nsw i32 %26, 1
store i32 %27, i32* %15
br label %16
28: ; preds = %16
ret i32 0
}

LLVM IR (-O2):
define i32 @poissonsEquationExp3D_dr(i32* nocapture readnone %0, double* nocapture readnone %1, i32 %2, double %3, double* nocapture readnone %4, double* nocapture readnone %5, double* nocapture writeonly %6) {
%8 = icmp sgt i32 %2, 0
br i1 %8, label %9, label %13
9: ; preds = %7
%10 = bitcast double* %6 to i8*
%11 = zext i32 %2 to i64
%12 = shl nuw nsw i64 %11, 3
br label %13
13: ; preds = %9, %7
ret i32 0
}
void *ft_addi_pt(void *p1, void *p2) {
  int *i;
  i = (int *)(malloc(sizeof(int)));
  *i = (*(int *)p1) + (*(int *)p2);
  return (i);
}


x86 assembly (clang, -O0):
<ft_addi_pt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
add    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_addi_pt>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    (%rbx),%ecx
add    (%r14),%ecx
mov    %ecx,(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @ft_addi_pt(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = call i8* @malloc(i64 4)
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i8*, i8** %3
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = load i8*, i8** %4
%12 = bitcast i8* %11 to i32*
%13 = load i32, i32* %12
%14 = add nsw i32 %10, %13
%15 = load i32*, i32** %5
store i32 %14, i32* %15
%16 = load i32*, i32** %5
%17 = bitcast i32* %16 to i8*
ret i8* %17
}

LLVM IR (-O2):
define noalias i8* @ft_addi_pt(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call dereferenceable_or_null(4) i8* @malloc(i64 4)
%4 = bitcast i8* %3 to i32*
%5 = bitcast i8* %0 to i32*
%6 = load i32, i32* %5
%7 = bitcast i8* %1 to i32*
%8 = load i32, i32* %7
%9 = add nsw i32 %8, %6
store i32 %9, i32* %4
ret i8* %3
}
void r_link_fini(struct r_link *link) {
  do {
    ;
  } while (0);
}


x86 assembly (clang, -O0):
<r_link_fini>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
jmp    110d <r_link_fini+0xd>
pop    %rbp
ret

x86 assembly (clang, -O2):
<r_link_fini>:
ret

LLVM IR (-O0):
%struct.r_link = type opaque
define void @r_link_fini(%struct.r_link* %0) {
%2 = alloca %struct.r_link*
store %struct.r_link* %0, %struct.r_link** %2
br label %3
3: ; preds = %1
br label %4
4: ; preds = %3
ret void
}

LLVM IR (-O2):
%struct.r_link = type opaque
define void @r_link_fini(%struct.r_link* nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ _U_Qfcmp(long double, long double, int);
int _U_Qfle(long double a, long double b) {
  return (_U_Qfcmp(a, b, 1 | 4 | 8) != 0);
}


x86 assembly (clang, -O0):
<_U_Qfle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
mov    $0xd,%edi
call   1030 <_U_Qfcmp@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_U_Qfle>:
sub    $0x28,%rsp
fldt   0x30(%rsp)
fldt   0x40(%rsp)
fstpt  0x10(%rsp)
fstpt  (%rsp)
mov    $0xd,%edi
call   1030 <_U_Qfcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
define i32 @_U_Qfle(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call i64 @_U_Qfcmp(x86_fp80 %5, x86_fp80 %6, i32 13)
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @_U_Qfle(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call i64 @_U_Qfcmp(x86_fp80 %0, x86_fp80 %1, i32 13)
%4 = icmp ne i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}