int opcode_is_nullified_branch(int opcode) {
  switch (opcode) {
  case 280:
  case 282:
  case 284:
  case 286:
  case 288:
  case 291:
  case 292:
  case 294:
  case 296:
  case 299:
  case 300:
  case 302:
    return (1);
  default:
    return (0);
  }
}


x86 assembly (clang, -O0):
<opcode_is_nullified_branch>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x118,%eax
je     11ce <opcode_is_nullified_branch+0xce>
jmp    111d <opcode_is_nullified_branch+0x1d>
mov    -0xc(%rbp),%eax
sub    $0x11a,%eax
je     11ce <opcode_is_nullified_branch+0xce>
jmp    1130 <opcode_is_nullified_branch+0x30>
mov    -0xc(%rbp),%eax
sub    $0x11c,%eax
je     11ce <opcode_is_nullified_branch+0xce>
jmp    1143 <opcode_is_nullified_branch+0x43>
mov    -0xc(%rbp),%eax
sub    $0x11e,%eax
je     11ce <opcode_is_nullified_branch+0xce>
jmp    1156 <opcode_is_nullified_branch+0x56>
mov    -0xc(%rbp),%eax
sub    $0x120,%eax
je     11ce <opcode_is_nullified_branch+0xce>
jmp    1169 <opcode_is_nullified_branch+0x69>
mov    -0xc(%rbp),%eax
add    $0xfffffedd,%eax
sub    $0x2,%eax
jb     11ce <opcode_is_nullified_branch+0xce>
jmp    117f <opcode_is_nullified_branch+0x7f>
mov    -0xc(%rbp),%eax
sub    $0x126,%eax
je     11ce <opcode_is_nullified_branch+0xce>
jmp    1192 <opcode_is_nullified_branch+0x92>
mov    -0xc(%rbp),%eax
sub    $0x128,%eax
je     11ce <opcode_is_nullified_branch+0xce>
jmp    11a5 <opcode_is_nullified_branch+0xa5>
mov    -0xc(%rbp),%eax
add    $0xfffffed5,%eax
sub    $0x2,%eax
jb     11ce <opcode_is_nullified_branch+0xce>
jmp    11bb <opcode_is_nullified_branch+0xbb>
mov    -0xc(%rbp),%eax
sub    $0x12e,%eax
jne    11da <opcode_is_nullified_branch+0xda>
jmp    11ce <opcode_is_nullified_branch+0xce>
movl   $0x1,-0x4(%rbp)
jmp    11e1 <opcode_is_nullified_branch+0xe1>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<opcode_is_nullified_branch>:
add    $0xfffffee8,%edi
xor    %eax,%eax
cmp    $0x16,%edi
ja     111a <opcode_is_nullified_branch+0x1a>
movslq %edi,%rax
lea    0xee9(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @opcode_is_nullified_branch(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 280, label %5
i32 282, label %5
i32 284, label %5
i32 286, label %5
i32 288, label %5
i32 291, label %5
i32 292, label %5
i32 294, label %5
i32 296, label %5
i32 299, label %5
i32 300, label %5
i32 302, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
@switch.table.opcode_is_nullified_branch = [23 x i32] [i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 1, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0, i32 1, i32 1, i32 0, i32 1]
define i32 @opcode_is_nullified_branch(i32 %0) {
%2 = add i32 %0, -280
%3 = icmp ult i32 %2, 23
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [23 x i32], [23 x i32]* @switch.table.opcode_is_nullified_branch, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}