#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t convert_24bit_to_16bit(uint8_t red, uint8_t green, uint8_t blue) {
  int r = red * 31;
  int d = r / 255;
  int q = r % 255;
  uint16_t o;
  if (q < 128)
    o = d << 11;
  else
    o = (d + 1) << 11;
  r = green * 63;
  d = r / 255;
  q = r % 255;
  if (q < 128)
    o |= d << 5;
  else
    o |= (d + 1) << 5;
  r = blue * 31;
  d = r / 255;
  q = r % 255;
  if (q < 128)
    o |= d;
  else
    o |= d + 1;
  return o;
}


x86 assembly (clang, -O0):
<convert_24bit_to_16bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
imul   $0x1f,-0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    $0xff,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
mov    $0xff,%ecx
cltd
idiv   %ecx
mov    %edx,-0x18(%rbp)
cmpl   $0x80,-0x18(%rbp)
jge    114b <convert_24bit_to_16bit+0x4b>
mov    -0x14(%rbp),%eax
shl    $0xb,%eax
mov    %eax,-0x1c(%rbp)
jmp    1157 <convert_24bit_to_16bit+0x57>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
shl    $0xb,%eax
mov    %eax,-0x1c(%rbp)
imul   $0x3f,-0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    $0xff,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
mov    $0xff,%ecx
cltd
idiv   %ecx
mov    %edx,-0x18(%rbp)
cmpl   $0x80,-0x18(%rbp)
jge    1198 <convert_24bit_to_16bit+0x98>
mov    -0x14(%rbp),%eax
shl    $0x5,%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
jmp    11a7 <convert_24bit_to_16bit+0xa7>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
shl    $0x5,%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
imul   $0x1f,-0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    $0xff,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
mov    $0xff,%ecx
cltd
idiv   %ecx
mov    %edx,-0x18(%rbp)
cmpl   $0x80,-0x18(%rbp)
jge    11e5 <convert_24bit_to_16bit+0xe5>
mov    -0x14(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
jmp    11f1 <convert_24bit_to_16bit+0xf1>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_24bit_to_16bit>:
mov    %edi,%eax
shl    $0x5,%eax
sub    %edi,%eax
movslq %eax,%r8
imul   $0xffffffff80808081,%r8,%rdi
shr    $0x20,%rdi
add    %r8d,%edi
mov    %edi,%ecx
shr    $0x1f,%ecx
sar    $0x7,%edi
add    %ecx,%edi
mov    %edi,%ecx
shl    $0x8,%ecx
mov    %edi,%eax
sub    %ecx,%eax
add    %r8d,%eax
shl    $0xb,%edi
lea    0x800(%rdi),%r8d
cmp    $0x80,%eax
cmovl  %edi,%r8d
mov    %esi,%eax
shl    $0x6,%eax
sub    %esi,%eax
cltq
imul   $0xffffffff80808081,%rax,%rsi
shr    $0x20,%rsi
add    %eax,%esi
mov    %esi,%edi
shr    $0x1f,%edi
sar    $0x7,%esi
add    %edi,%esi
mov    %esi,%edi
shl    $0x8,%edi
mov    %esi,%ecx
sub    %edi,%ecx
add    %eax,%ecx
shl    $0x5,%esi
lea    0x20(%rsi),%eax
cmp    $0x80,%ecx
cmovl  %esi,%eax
mov    %edx,%ecx
shl    $0x5,%ecx
sub    %edx,%ecx
movslq %ecx,%rcx
imul   $0xffffffff80808081,%rcx,%rdx
shr    $0x20,%rdx
add    %ecx,%edx
mov    %edx,%esi
shr    $0x1f,%esi
sar    $0x7,%edx
add    %esi,%edx
mov    %edx,%esi
shl    $0x8,%esi
mov    %edx,%edi
sub    %esi,%edi
add    %ecx,%edi
xor    %ecx,%ecx
cmp    $0x7f,%edi
setg   %cl
add    %edx,%ecx
or     %r8d,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @convert_24bit_to_16bit(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%11 = load i32, i32* %4
%12 = mul nsw i32 %11, 31
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = sdiv i32 %13, 255
store i32 %14, i32* %8
%15 = load i32, i32* %7
%16 = srem i32 %15, 255
store i32 %16, i32* %9
%17 = load i32, i32* %9
%18 = icmp slt i32 %17, 128
br i1 %18, label %19, label %22
19: ; preds = %3
%20 = load i32, i32* %8
%21 = shl i32 %20, 11
store i32 %21, i32* %10
br label %26
22: ; preds = %3
%23 = load i32, i32* %8
%24 = add nsw i32 %23, 1
%25 = shl i32 %24, 11
store i32 %25, i32* %10
br label %26
26: ; preds = %22, %19
%27 = load i32, i32* %5
%28 = mul nsw i32 %27, 63
store i32 %28, i32* %7
%29 = load i32, i32* %7
%30 = sdiv i32 %29, 255
store i32 %30, i32* %8
%31 = load i32, i32* %7
%32 = srem i32 %31, 255
store i32 %32, i32* %9
%33 = load i32, i32* %9
%34 = icmp slt i32 %33, 128
br i1 %34, label %35, label %40
35: ; preds = %26
%36 = load i32, i32* %8
%37 = shl i32 %36, 5
%38 = load i32, i32* %10
%39 = or i32 %38, %37
store i32 %39, i32* %10
br label %46
40: ; preds = %26
%41 = load i32, i32* %8
%42 = add nsw i32 %41, 1
%43 = shl i32 %42, 5
%44 = load i32, i32* %10
%45 = or i32 %44, %43
store i32 %45, i32* %10
br label %46
46: ; preds = %40, %35
%47 = load i32, i32* %6
%48 = mul nsw i32 %47, 31
store i32 %48, i32* %7
%49 = load i32, i32* %7
%50 = sdiv i32 %49, 255
store i32 %50, i32* %8
%51 = load i32, i32* %7
%52 = srem i32 %51, 255
store i32 %52, i32* %9
%53 = load i32, i32* %9
%54 = icmp slt i32 %53, 128
br i1 %54, label %55, label %59
55: ; preds = %46
%56 = load i32, i32* %8
%57 = load i32, i32* %10
%58 = or i32 %57, %56
store i32 %58, i32* %10
br label %64
59: ; preds = %46
%60 = load i32, i32* %8
%61 = add nsw i32 %60, 1
%62 = load i32, i32* %10
%63 = or i32 %62, %61
store i32 %63, i32* %10
br label %64
64: ; preds = %59, %55
%65 = load i32, i32* %10
ret i32 %65
}

LLVM IR (-O2):
define i32 @convert_24bit_to_16bit(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %0, 31
%5 = sdiv i32 %4, 255
%6 = srem i32 %4, 255
%7 = icmp slt i32 %6, 128
%8 = shl i32 %5, 11
%9 = add i32 %8, 2048
%10 = select i1 %7, i32 %8, i32 %9
%11 = mul nsw i32 %1, 63
%12 = sdiv i32 %11, 255
%13 = srem i32 %11, 255
%14 = icmp slt i32 %13, 128
%15 = shl nsw i32 %12, 5
%16 = add nsw i32 %15, 32
%17 = select i1 %14, i32 %15, i32 %16
%18 = mul nsw i32 %2, 31
%19 = sdiv i32 %18, 255
%20 = srem i32 %18, 255
%21 = icmp sgt i32 %20, 127
%22 = zext i1 %21 to i32
%23 = add nsw i32 %19, %22
%24 = or i32 %17, %10
%25 = or i32 %24, %23
ret i32 %25
}