xunge/DecIR huggingface dataset:
/* Variables and functions */
char *strrchr(char const *, char);
const char *getname(const char *fname) {
  char *result;
  result = strrchr(fname, '/');
  if (result)
    return ++result;
  result = strrchr(fname, '\\');
  if (result)
    return ++result;
  return fname;
}


x86 assembly (clang, -O0):
<getname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     114e <getname+0x3e>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    %rax,-0x8(%rbp)
jmp    1188 <getname+0x78>
mov    -0x10(%rbp),%rdi
mov    $0x5c,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1180 <getname+0x70>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    %rax,-0x8(%rbp)
jmp    1188 <getname+0x78>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getname>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2f,%esi
call   1030 <strrchr@plt>
test   %rax,%rax
je     1129 <getname+0x19>
add    $0x1,%rax
pop    %rbx
ret
mov    %rbx,%rdi
mov    $0x5c,%esi
call   1030 <strrchr@plt>
mov    %rax,%rcx
add    $0x1,%rax
test   %rcx,%rcx
cmove  %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @getname(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i8* @strrchr(i8* %5, i8 signext 47)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %1
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %4
store i8* %11, i8** %2
br label %22
12: ; preds = %1
%13 = load i8*, i8** %3
%14 = call i8* @strrchr(i8* %13, i8 signext 92)
store i8* %14, i8** %4
%15 = load i8*, i8** %4
%16 = icmp ne i8* %15, null
br i1 %16, label %17, label %20
17: ; preds = %12
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %4
store i8* %19, i8** %2
br label %22
20: ; preds = %12
%21 = load i8*, i8** %3
store i8* %21, i8** %2
br label %22
22: ; preds = %20, %17, %9
%23 = load i8*, i8** %2
ret i8* %23
}

LLVM IR (-O2):
define i8* @getname(i8* %0) {
%2 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %2, i64 1
br label %11
6: ; preds = %1
%7 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 92)
%8 = icmp eq i8* %7, null
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = select i1 %8, i8* %0, i8* %9
br label %11
11: ; preds = %6, %4
%12 = phi i8* [ %5, %4 ], [ %10, %6 ]
ret i8* %12
}
/* Variables and functions */
int /*<<< orphan*/ uart1_clear_rts();
int /*<<< orphan*/ uart1_set_rts();
int uart1GetchRTS(void) {
  uart1_set_rts();
  if ((*((volatile unsigned char *)0xE0010014)) & (1 << 0)) {
    uart1_clear_rts();
    return (*((volatile unsigned char *)0xE0010000));
  }
  uart1_clear_rts();
  return -1;
}


x86 assembly (clang, -O0):
<uart1GetchRTS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <uart1_set_rts@plt>
mov    $0xe0010014,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     115e <uart1GetchRTS+0x3e>
mov    $0x0,%al
call   1040 <uart1_clear_rts@plt>
mov    $0xe0010000,%eax
mov    (%rax),%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    116c <uart1GetchRTS+0x4c>
mov    $0x0,%al
call   1040 <uart1_clear_rts@plt>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart1GetchRTS>:
push   %r14
push   %rbx
push   %rax
xor    %eax,%eax
call   1030 <uart1_set_rts@plt>
mov    $0xe0010000,%r14d
mov    0x14(%r14),%bl
xor    %eax,%eax
call   1040 <uart1_clear_rts@plt>
mov    $0xffffffff,%eax
test   $0x1,%bl
je     114a <uart1GetchRTS+0x2a>
movzbl (%r14),%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @uart1GetchRTS() {
%1 = alloca i32
%2 = call i32 (...) @uart1_set_rts()
%3 = load volatile i8, i8* inttoptr (i64 3758161940 to i8*)
%4 = zext i8 %3 to i32
%5 = and i32 %4, 1
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %0
%8 = call i32 (...) @uart1_clear_rts()
%9 = load volatile i8, i8* inttoptr (i64 3758161920 to i8*)
%10 = zext i8 %9 to i32
store i32 %10, i32* %1
br label %13
11: ; preds = %0
%12 = call i32 (...) @uart1_clear_rts()
store i32 -1, i32* %1
br label %13
13: ; preds = %11, %7
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @uart1GetchRTS() {
%1 = tail call i32 (...) @uart1_set_rts()
%2 = load volatile i8, i8* inttoptr (i64 3758161940 to i8*)
%3 = and i8 %2, 1
%4 = icmp eq i8 %3, 0
%5 = tail call i32 (...) @uart1_clear_rts()
br i1 %4, label %9, label %6
6: ; preds = %0
%7 = load volatile i8, i8* inttoptr (i64 3758161920 to i8*)
%8 = zext i8 %7 to i32
br label %9
9: ; preds = %0, %6
%10 = phi i32 [ %8, %6 ], [ -1, %0 ]
ret i32 %10
}
/* Type definitions */
struct t_gui_completion {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct t_gui_completion *);
int /*<<< orphan*/ gui_completion_free_data(struct t_gui_completion *);
void gui_completion_free(struct t_gui_completion *completion) {
  gui_completion_free_data(completion);
  free(completion);
}


x86 assembly (clang, -O0):
<gui_completion_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gui_completion_free_data@plt>
mov    -0x8(%rbp),%rdi
call   1040 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gui_completion_free>:
push   %rbx
mov    %rdi,%rbx
call   1030 <gui_completion_free_data@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <free@plt>

LLVM IR (-O0):
%struct.t_gui_completion = type { i32 }
define void @gui_completion_free(%struct.t_gui_completion* %0) {
%2 = alloca %struct.t_gui_completion*
store %struct.t_gui_completion* %0, %struct.t_gui_completion** %2
%3 = load %struct.t_gui_completion*, %struct.t_gui_completion** %2
%4 = call i32 @gui_completion_free_data(%struct.t_gui_completion* %3)
%5 = load %struct.t_gui_completion*, %struct.t_gui_completion** %2
%6 = call i32 @free(%struct.t_gui_completion* %5)
ret void
}

LLVM IR (-O2):
%struct.t_gui_completion = type { i32 }
define void @gui_completion_free(%struct.t_gui_completion* %0) {
%2 = tail call i32 @gui_completion_free_data(%struct.t_gui_completion* %0)
%3 = tail call i32 @free(%struct.t_gui_completion* %0)
ret void
}
/* Variables and functions */
double pof(double, int, int);
double rtlf(int df1, int df2, double F) { return pof(F, df1, df2); }


x86 assembly (clang, -O0):
<rtlf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <pof@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtlf>:
jmp    1030 <pof@plt>

LLVM IR (-O0):
define double @rtlf(i32 %0, i32 %1, double %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca double
store i32 %0, i32* %4
store i32 %1, i32* %5
store double %2, double* %6
%7 = load double, double* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = call double @pof(double %7, i32 %8, i32 %9)
ret double %10
}

LLVM IR (-O2):
define double @rtlf(i32 %0, i32 %1, double %2) {
%4 = tail call double @pof(double %2, i32 %0, i32 %1)
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ mem_list_add(char *);
char *strdup(char *);
char *m_strdup(char *str) {
  char *ret;
  if (str == NULL)
    return NULL;
  ret = strdup(str);
  mem_list_add(ret);
  return ret;
}


x86 assembly (clang, -O0):
<m_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1144 <m_strdup+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1162 <m_strdup+0x42>
mov    -0x10(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <mem_list_add@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_strdup>:
push   %rbx
test   %rdi,%rdi
je     1138 <m_strdup+0x18>
call   1040 <strdup@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <mem_list_add@plt>
jmp    113a <m_strdup+0x1a>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @m_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* null, i8** %2
br label %14
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i8* @strdup(i8* %9)
store i8* %10, i8** %4
%11 = load i8*, i8** %4
%12 = call i32 @mem_list_add(i8* %11)
%13 = load i8*, i8** %4
store i8* %13, i8** %2
br label %14
14: ; preds = %8, %7
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define i8* @m_strdup(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i8* @strdup(i8* %0)
%5 = tail call i32 @mem_list_add(i8* %4)
br label %6
6: ; preds = %1, %3
%7 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %7
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ epoll62(struct __test_metadata *);
void wrapper_epoll62(struct __test_metadata *_metadata,
                     struct __fixture_variant_metadata *variant) {
  epoll62(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_epoll62>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <epoll62@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_epoll62>:
jmp    1030 <epoll62@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll62(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @epoll62(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll62(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @epoll62(%struct.__test_metadata* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ n;

/* Variables and functions */
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/);
scalar_t__ malloc(int);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ stdin;
char *input(char *s) {
  printf("%s", s);
  char *n = (char *)malloc(1000 * sizeof(char));
  fgets(n, sizeof(n), stdin);
  return n;
}


x86 assembly (clang, -O0):
<input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x3e8,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    0x2e83(%rip),%rax
mov    (%rax),%edx
mov    $0x8,%esi
call   1040 <fgets@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<input>:
push   %rbx
mov    %rdi,%rsi
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x3e8,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    0x2e94(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
mov    $0x8,%esi
call   1040 <fgets@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@stdin = global i32 0
define i8* @input(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i64 @malloc(i32 1000)
%7 = inttoptr i64 %6 to i8*
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i32, i32* @stdin
%10 = call i32 @fgets(i8* %8, i32 8, i32 %9)
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@stdin = global i32 0
define i8* @input(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i64 @malloc(i32 1000)
%4 = inttoptr i64 %3 to i8*
%5 = load i32, i32* @stdin
%6 = tail call i32 @fgets(i8* %4, i32 8, i32 %5)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ gcd(int, int);
int main(void) {
  gcd(150, 35);
  gcd(1026, 405);
  gcd(83, 240);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x96,%edi
mov    $0x23,%esi
call   1030 <gcd@plt>
mov    $0x402,%edi
mov    $0x195,%esi
call   1030 <gcd@plt>
mov    $0x53,%edi
mov    $0xf0,%esi
call   1030 <gcd@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x96,%edi
mov    $0x23,%esi
call   1030 <gcd@plt>
mov    $0x402,%edi
mov    $0x195,%esi
call   1030 <gcd@plt>
mov    $0x53,%edi
mov    $0xf0,%esi
call   1030 <gcd@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @gcd(i32 150, i32 35)
%3 = call i32 @gcd(i32 1026, i32 405)
%4 = call i32 @gcd(i32 83, i32 240)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @gcd(i32 150, i32 35)
%2 = tail call i32 @gcd(i32 1026, i32 405)
%3 = tail call i32 @gcd(i32 83, i32 240)
ret i32 0
}
void __main(void) {
  asm(".section .drectve\n"
      "  .ascii \" -aligncomm:_r,4\"\n"
      "  .ascii \" -aligncomm:r,4\"\n"
      "  .text");
}


x86 assembly (clang, -O0):
<__main>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__main>:
ret

LLVM IR (-O0):
define void @__main() {
ret void
}

LLVM IR (-O2):
define void @__main() {
tail call void asm sideeffect ".section .drectve\0A .ascii \22 -aligncomm:_r,4\22\0A .ascii \22 -aligncomm:r,4\22\0A .text", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef scalar_t__ ssize_t;

/* Variables and functions */
scalar_t__ _hurd_set_host_config(char *, char const *, size_t);
int sethostname(const char *name, size_t len) {
  ssize_t n = _hurd_set_host_config("/etc/hostname", name, len);
  return n < 0 ? -1 : 0;
}


x86 assembly (clang, -O0):
<sethostname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <_hurd_set_host_config@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%rdx
cmovl  %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sethostname>:
push   %rax
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee2(%rip),%rdi
call   1030 <_hurd_set_host_config@plt>
sar    $0x3f,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"/etc/hostname\00"
define i32 @sethostname(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i64 @_hurd_set_host_config(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %6, i64 %7)
store i64 %8, i64* %5
%9 = load i64, i64* %5
%10 = icmp slt i64 %9, 0
%11 = zext i1 %10 to i64
%12 = select i1 %10, i32 -1, i32 0
ret i32 %12
}

LLVM IR (-O2):
@.str = [14 x i8] c"/etc/hostname\00"
define i32 @sethostname(i8* %0, i64 %1) {
%3 = tail call i64 @_hurd_set_host_config(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0, i64 %1)
%4 = ashr i64 %3, 63
%5 = trunc i64 %4 to i32
ret i32 %5
}
int main() {
  int a = 99;
  int b = 47;
  return a & b;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x63,-0x8(%rbp)
movl   $0x2f,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x23,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 99, i32* %2
store i32 47, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = and i32 %4, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @main() {
ret i32 35
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_error();
int sum(int, int);
void main() {
  int a = 2;
  int b = 3;
  int result = sum(a, b);
  if (result != a + b) {
    __VERIFIER_error();
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x2,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <sum@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    -0x8(%rbp),%ecx
cmp    %ecx,%eax
je     115c <main+0x3c>
mov    $0x0,%al
call   1040 <__VERIFIER_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
mov    $0x3,%esi
call   1030 <sum@plt>
cmp    $0x5,%eax
jne    1137 <main+0x17>
pop    %rax
ret
xor    %eax,%eax
pop    %rcx
jmp    1040 <__VERIFIER_error@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 2, i32* %1
store i32 3, i32* %2
%4 = load i32, i32* %1
%5 = load i32, i32* %2
%6 = call i32 @sum(i32 %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = load i32, i32* %1
%9 = load i32, i32* %2
%10 = add nsw i32 %8, %9
%11 = icmp ne i32 %7, %10
br i1 %11, label %12, label %14
12: ; preds = %0
%13 = call i32 (...) @__VERIFIER_error()
br label %14
14: ; preds = %12, %0
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @sum(i32 2, i32 3)
%2 = icmp eq i32 %1, 5
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @__VERIFIER_error()
br label %5
5: ; preds = %3, %0
ret void
}
int test_imm_C2int64_lowword_mem(long long *val) {
  return ((*val) & (0xC2 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C2int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xc2,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C2int64_lowword_mem>:
testb  $0xc2,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C2int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 194
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_C2int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 194
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int Kit_DsdLitRegular(int Lit) { return Lit & 0xfe; }


x86 assembly (clang, -O0):
<Kit_DsdLitRegular>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfe,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Kit_DsdLitRegular>:
mov    %edi,%eax
and    $0xfe,%eax
ret

LLVM IR (-O0):
define i32 @Kit_DsdLitRegular(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 254
ret i32 %4
}

LLVM IR (-O2):
define i32 @Kit_DsdLitRegular(i32 %0) {
%2 = and i32 %0, 254
ret i32 %2
}
int hex2asc(int n) {
  n &= 15;
  if (n > 9) {
    return ('a' - 10) + n;
  } else {
    return '0' + n;
  }
}


x86 assembly (clang, -O0):
<hex2asc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xf,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x9,-0x8(%rbp)
jle    1128 <hex2asc+0x28>
mov    -0x8(%rbp),%eax
add    $0x57,%eax
mov    %eax,-0x4(%rbp)
jmp    1131 <hex2asc+0x31>
mov    -0x8(%rbp),%eax
add    $0x30,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex2asc>:
and    $0xf,%edi
lea    0x57(%rdi),%ecx
lea    0x30(%rdi),%eax
cmp    $0xa,%edi
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @hex2asc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, 15
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 9
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %3
%10 = add nsw i32 87, %9
store i32 %10, i32* %2
br label %14
11: ; preds = %1
%12 = load i32, i32* %3
%13 = add nsw i32 48, %12
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @hex2asc(i32 %0) {
%2 = and i32 %0, 15
%3 = icmp ugt i32 %2, 9
%4 = add nuw nsw i32 %2, 87
%5 = or i32 %2, 48
%6 = select i1 %3, i32 %4, i32 %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ SIGCHLD;
int /*<<< orphan*/ sig_unblock(int /*<<< orphan*/);
extern void sig_child_unblock(void) { sig_unblock(SIGCHLD); }


x86 assembly (clang, -O0):
<sig_child_unblock>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <sig_unblock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_child_unblock>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <sig_unblock@plt>

LLVM IR (-O0):
@SIGCHLD = global i32 0
define void @sig_child_unblock() {
%1 = load i32, i32* @SIGCHLD
%2 = call i32 @sig_unblock(i32 %1)
ret void
}

LLVM IR (-O2):
@SIGCHLD = global i32 0
define void @sig_child_unblock() {
%1 = load i32, i32* @SIGCHLD
%2 = tail call i32 @sig_unblock(i32 %1)
ret void
}
/* Variables and functions */
int xor_check_base(int, int, void **);
int xor_check(int vects, int len, void **array) {
  return xor_check_base(vects, len, array);
}


x86 assembly (clang, -O0):
<xor_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <xor_check_base@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xor_check>:
jmp    1030 <xor_check_base@plt>

LLVM IR (-O0):
define i32 @xor_check(i32 %0, i32 %1, i8** %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8**
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8** %2, i8*** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i8**, i8*** %6
%10 = call i32 @xor_check_base(i32 %7, i32 %8, i8** %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @xor_check(i32 %0, i32 %1, i8** %2) {
%4 = tail call i32 @xor_check_base(i32 %0, i32 %1, i8** %2)
ret i32 %4
}
imm0regx1(r0, r1, x0, x1, p0, p1) unsigned short r0, r1;
unsigned short *p0, *p1;
{
  if (22 <= (p1[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<imm0regx1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
movzwl (%rax,%rcx,2),%ecx
mov    $0x16,%eax
cmp    %ecx,%eax
jg     1144 <imm0regx1+0x44>
movl   $0x1,-0x4(%rbp)
jmp    114b <imm0regx1+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imm0regx1>:
movslq %ecx,%rcx
xor    %eax,%eax
cmpw   $0x16,(%r9,%rcx,2)
setae  %al
ret

LLVM IR (-O0):
define i32 @imm0regx1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16*, i16** %13
%17 = load i32, i32* %11
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i16, i16* %16, i64 %18
%20 = load i16, i16* %19
%21 = zext i16 %20 to i32
%22 = icmp sle i32 22, %21
br i1 %22, label %23, label %24
23: ; preds = %6
store i32 1, i32* %7
br label %25
24: ; preds = %6
store i32 0, i32* %7
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %7
ret i32 %26
}

LLVM IR (-O2):
define i32 @imm0regx1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture %5) {
%7 = sext i32 %3 to i64
%8 = getelementptr inbounds i16, i16* %5, i64 %7
%9 = load i16, i16* %8
%10 = icmp ugt i16 %9, 21
%11 = zext i1 %10 to i32
ret i32 %11
}
/* Type definitions */
struct device {
  int dummy;
};

/* Variables and functions */
int _dev_close(struct device *, int /*<<< orphan*/);
int dev_close(struct device *dev) {
  int tmp;
  {
    { tmp = _dev_close(dev, 0); }
    return (tmp);
  }
}


x86 assembly (clang, -O0):
<dev_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <_dev_close@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dev_close>:
xor    %esi,%esi
jmp    1030 <_dev_close@plt>

LLVM IR (-O0):
%struct.device = type { i32 }
define i32 @dev_close(%struct.device* %0) {
%2 = alloca %struct.device*
%3 = alloca i32
store %struct.device* %0, %struct.device** %2
%4 = load %struct.device*, %struct.device** %2
%5 = call i32 @_dev_close(%struct.device* %4, i32 0)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.device = type { i32 }
define i32 @dev_close(%struct.device* %0) {
%2 = tail call i32 @_dev_close(%struct.device* %0, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ sub_string_v2(char *, char *);
int main() {
  char *s = "abcd";
  char new[100] = {0};
  sub_string_v2(new, s);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    -0x70(%rbp),%rdi
xor    %esi,%esi
mov    $0x64,%edx
call   1030 <memset@plt>
lea    -0x70(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <sub_string_v2@plt>
xor    %eax,%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x68,%rsp
xorps  %xmm0,%xmm0
movaps %xmm0,0x50(%rsp)
movaps %xmm0,0x40(%rsp)
movaps %xmm0,0x30(%rsp)
movaps %xmm0,0x20(%rsp)
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
movl   $0x0,0x60(%rsp)
lea    0xebd(%rip),%rsi
mov    %rsp,%rdi
call   1030 <sub_string_v2@plt>
xor    %eax,%eax
add    $0x68,%rsp
ret

LLVM IR (-O0):
@.str = [5 x i8] c"abcd\00"
define i32 @main() {
%1 = alloca i8*
%2 = alloca [100 x i8]
store i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8** %1
%3 = bitcast [100 x i8]* %2 to i8*
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%5 = load i8*, i8** %1
%6 = call i32 @sub_string_v2(i8* %4, i8* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"abcd\00"
define i32 @main() {
%1 = alloca [100 x i8]
%2 = getelementptr inbounds [100 x i8], [100 x i8]* %1, i64 0, i64 0
%3 = call i32 @sub_string_v2(i8* %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct PatternGen_Settings {
  int dummy;
};
struct PatternGen_Params {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ PatternGen_LoadDefaults(struct PatternGen_Settings *,
                                           struct PatternGen_Params *);
void __attribute__((weak))
PatternGen_LoadSettings(struct PatternGen_Settings *S,
                        struct PatternGen_Params *P) {
  PatternGen_LoadDefaults(S, P);
}


x86 assembly (clang, -O0):
<PatternGen_LoadSettings>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <PatternGen_LoadDefaults@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PatternGen_LoadSettings>:
jmp    1030 <PatternGen_LoadDefaults@plt>

LLVM IR (-O0):
%struct.PatternGen_Settings = type { i32 }
%struct.PatternGen_Params = type { i32 }
define weak void @PatternGen_LoadSettings(%struct.PatternGen_Settings* %0, %struct.PatternGen_Params* %1) {
%3 = alloca %struct.PatternGen_Settings*
%4 = alloca %struct.PatternGen_Params*
store %struct.PatternGen_Settings* %0, %struct.PatternGen_Settings** %3
store %struct.PatternGen_Params* %1, %struct.PatternGen_Params** %4
%5 = load %struct.PatternGen_Settings*, %struct.PatternGen_Settings** %3
%6 = load %struct.PatternGen_Params*, %struct.PatternGen_Params** %4
%7 = call i32 @PatternGen_LoadDefaults(%struct.PatternGen_Settings* %5, %struct.PatternGen_Params* %6)
ret void
}

LLVM IR (-O2):
%struct.PatternGen_Settings = type { i32 }
%struct.PatternGen_Params = type { i32 }
define weak void @PatternGen_LoadSettings(%struct.PatternGen_Settings* %0, %struct.PatternGen_Params* %1) {
%3 = tail call i32 @PatternGen_LoadDefaults(%struct.PatternGen_Settings* %0, %struct.PatternGen_Params* %1)
ret void
}
/* Variables and functions */
double floor(double);
double round(double a) { return floor(a + 0.5); }


x86 assembly (clang, -O0):
<round>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<round>:
addsd  0xee8(%rip),%xmm0
jmp    1030 <floor@plt>

LLVM IR (-O0):
define double @round(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 5.000000e-01
%5 = call double @llvm.floor.f64(double %4)
ret double %5
}

LLVM IR (-O2):
define double @round(double %0) {
%2 = fadd double %0, 5.000000e-01
%3 = tail call double @llvm.floor.f64(double %2)
ret double %3
}
/* Variables and functions */
float *malloc(int);
float *float_arr_init(int size) {
  float *array;
  array = malloc(sizeof(int) * size);
  int i;
  for (i = 0; i < size; i++) {
    array[i] = 0;
  }
  return array;
}


x86 assembly (clang, -O0):
<float_arr_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x2,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    115f <float_arr_init+0x4f>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
xorps  %xmm0,%xmm0
movss  %xmm0,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1135 <float_arr_init+0x25>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<float_arr_init>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
lea    0x0(,%rbx,4),%edi
call   1040 <malloc@plt>
mov    %rax,%r14
test   %ebx,%ebx
jle    1149 <float_arr_init+0x29>
mov    %ebx,%edx
shl    $0x2,%rdx
mov    %r14,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define float* @float_arr_init(i32 %0) {
%2 = alloca i32
%3 = alloca float*
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sext i32 %5 to i64
%7 = mul i64 4, %6
%8 = trunc i64 %7 to i32
%9 = call float* @malloc(i32 %8)
store float* %9, float** %3
store i32 0, i32* %4
br label %10
10: ; preds = %19, %1
%11 = load i32, i32* %4
%12 = load i32, i32* %2
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %22
14: ; preds = %10
%15 = load float*, float** %3
%16 = load i32, i32* %4
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds float, float* %15, i64 %17
store float 0.000000e+00, float* %18
br label %19
19: ; preds = %14
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %10
22: ; preds = %10
%23 = load float*, float** %3
ret float* %23
}

LLVM IR (-O2):
define noalias float* @float_arr_init(i32 %0) {
%2 = shl i32 %0, 2
%3 = tail call float* @malloc(i32 %2)
%4 = icmp sgt i32 %0, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = bitcast float* %3 to i8*
%7 = zext i32 %0 to i64
%8 = shl nuw nsw i64 %7, 2
br label %9
9: ; preds = %5, %1
ret float* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void print_point(int x, int y) { printf("	{%d, %d},\n", x, y); }


x86 assembly (clang, -O0):
<print_point>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_point>:
mov    %esi,%edx
mov    %edi,%esi
lea    0xee5(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"\09{%d, %d},\0A\00"
define void @print_point(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"\09{%d, %d},\0A\00"
define void @print_point(i32 %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1)
ret void
}
void avio_rb64() {}


x86 assembly (clang, -O0):
<avio_rb64>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avio_rb64>:
ret

LLVM IR (-O0):
define void @avio_rb64() {
ret void
}

LLVM IR (-O2):
define void @avio_rb64() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ message(int, char *);
void udelay_init(void) {
  message(1, "udelay: using gettimeofday() delay loop");
}


x86 assembly (clang, -O0):
<udelay_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
lea    0xee0(%rip),%rsi
call   1030 <message@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<udelay_init>:
lea    0xee9(%rip),%rsi
mov    $0x1,%edi
jmp    1030 <message@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"udelay: using gettimeofday() delay loop\00"
define void @udelay_init() {
%1 = call i32 @message(i32 1, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [40 x i8] c"udelay: using gettimeofday() delay loop\00"
define void @udelay_init() {
%1 = tail call i32 @message(i32 1, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
ret void
}
void close_getkey(void) {
  ;
  { return; };
}


x86 assembly (clang, -O0):
<close_getkey>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_getkey>:
ret

LLVM IR (-O0):
define void @close_getkey() {
ret void
}

LLVM IR (-O2):
define void @close_getkey() {
ret void
}
void SHAREMIND_MAP_KEY_FREE_unsigned(unsigned *const dest) { (void)dest; }


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_FREE_unsigned>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_FREE_unsigned>:
ret

LLVM IR (-O0):
define void @SHAREMIND_MAP_KEY_FREE_unsigned(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret void
}

LLVM IR (-O2):
define void @SHAREMIND_MAP_KEY_FREE_unsigned(i32* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/ *);
void print_spaces(FILE *fp, int count) {
  int i;
  for (i = 0; i < count; i++) {
    fputc(' ', fp);
  }
}


x86 assembly (clang, -O0):
<print_spaces>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    114e <print_spaces+0x3e>
mov    -0x8(%rbp),%rsi
mov    $0x20,%edi
call   1030 <fputc@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print_spaces+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_spaces>:
push   %r14
push   %rbx
push   %rax
test   %esi,%esi
jle    1132 <print_spaces+0x22>
mov    %esi,%ebx
mov    %rdi,%r14
nopl   (%rax)
mov    $0x20,%edi
mov    %r14,%rsi
call   1030 <fputc@plt>
add    $0xffffffff,%ebx
jne    1120 <print_spaces+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @print_spaces(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = call i32 @fputc(i8 signext 32, i32* %11)
br label %13
13: ; preds = %10
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
store i32 %15, i32* %5
br label %6
16: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @print_spaces(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ 0, %2 ]
%6 = tail call i32 @fputc(i8 signext 32, i32* %0)
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, %1
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret void
}
void glHint(void) { return; }


x86 assembly (clang, -O0):
<glHint>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glHint>:
ret

LLVM IR (-O0):
define void @glHint() {
ret void
}

LLVM IR (-O2):
define void @glHint() {
ret void
}
void gpuFree(int *d_array) {}


x86 assembly (clang, -O0):
<gpuFree>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpuFree>:
ret

LLVM IR (-O0):
define void @gpuFree(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @gpuFree(i32* nocapture %0) {
ret void
}
char *langRomTypeTurborPause() { return "Turbo-R Pause"; }


x86 assembly (clang, -O0):
<langRomTypeTurborPause>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeTurborPause>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Turbo-R Pause\00"
define i8* @langRomTypeTurborPause() {
ret i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [14 x i8] c"Turbo-R Pause\00"
define i8* @langRomTypeTurborPause() {
ret i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_unescape() {
  printf("NOT IMPLEMENTED:"
         "pa_unescape"
         "\n");
}


x86 assembly (clang, -O0):
<pa_unescape>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_unescape>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"NOT IMPLEMENTED:pa_unescape\0A\00"
define i32 @pa_unescape() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [28 x i8] c"NOT IMPLEMENTED:pa_unescape\00"
define i32 @pa_unescape() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int run_unit_tests_dlinkedlist();
int run_unit_tests_all() { return run_unit_tests_dlinkedlist(); }


x86 assembly (clang, -O0):
<run_unit_tests_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <run_unit_tests_dlinkedlist@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_unit_tests_all>:
xor    %eax,%eax
jmp    1030 <run_unit_tests_dlinkedlist@plt>

LLVM IR (-O0):
define i32 @run_unit_tests_all() {
%1 = call i32 (...) @run_unit_tests_dlinkedlist()
ret i32 %1
}

LLVM IR (-O2):
define i32 @run_unit_tests_all() {
%1 = tail call i32 (...) @run_unit_tests_dlinkedlist()
ret i32 %1
}
int longest_increasing_sequence(int *src, int *dst, int num) {
  int last = 0, cur = 1, next = 2;
  int index = 0;
  for (int i = 1; i < num; i++) {
    cur = i;
    {}
  }
}


x86 assembly (clang, -O0):
<longest_increasing_sequence>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
movl   $0x0,-0x20(%rbp)
movl   $0x1,-0x24(%rbp)
movl   $0x2,-0x28(%rbp)
movl   $0x0,-0x2c(%rbp)
movl   $0x1,-0x30(%rbp)
mov    -0x30(%rbp),%eax
cmp    -0x1c(%rbp),%eax
jge    1152 <longest_increasing_sequence+0x52>
mov    -0x30(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x30(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x30(%rbp)
jmp    1132 <longest_increasing_sequence+0x32>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longest_increasing_sequence>:
ret

LLVM IR (-O0):
define i32 @longest_increasing_sequence(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32 0, i32* %8
store i32 1, i32* %9
store i32 2, i32* %10
store i32 0, i32* %11
store i32 1, i32* %12
br label %13
13: ; preds = %19, %3
%14 = load i32, i32* %12
%15 = load i32, i32* %7
%16 = icmp slt i32 %14, %15
br i1 %16, label %17, label %22
17: ; preds = %13
%18 = load i32, i32* %12
store i32 %18, i32* %9
br label %19
19: ; preds = %17
%20 = load i32, i32* %12
%21 = add nsw i32 %20, 1
store i32 %21, i32* %12
br label %13
22: ; preds = %13
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @longest_increasing_sequence(i32* nocapture readnone %0, i32* nocapture readnone %1, i32 %2) {
ret i32 undef
}
int test_imm_56uint32_mem(unsigned int *val) {
  return ((*val) & (0x56 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_56uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x56,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_56uint32_mem>:
testb  $0x56,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_56uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 86
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_56uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 86
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void jg2() {}


x86 assembly (clang, -O0):
<jg2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jg2>:
ret

LLVM IR (-O0):
define void @jg2() {
ret void
}

LLVM IR (-O2):
define void @jg2() {
ret void
}
/* Type definitions */
struct sockaddr_in {
  int dummy;
};
struct sockaddr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
scalar_t__ bind(int, struct sockaddr *, int);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
void safe_bind(int socket, const struct sockaddr_in *address) {
  if (bind(socket, (struct sockaddr *)address, sizeof(*address)) != 0) {
    perror("safe_bind - Failed to bind");
    exit(EXIT_FAILURE);
  }
}


x86 assembly (clang, -O0):
<safe_bind>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <bind@plt>
cmp    $0x0,%rax
je     1174 <safe_bind+0x44>
lea    0xe9f(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e73(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_bind>:
push   %rax
mov    $0x4,%edx
call   1030 <bind@plt>
test   %rax,%rax
jne    1142 <safe_bind+0x12>
pop    %rax
ret
lea    0xeb7(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
@.str = [27 x i8] c"safe_bind - Failed to bind\00"
@EXIT_FAILURE = global i32 0
define void @safe_bind(i32 %0, %struct.sockaddr_in* %1) {
%3 = alloca i32
%4 = alloca %struct.sockaddr_in*
store i32 %0, i32* %3
store %struct.sockaddr_in* %1, %struct.sockaddr_in** %4
%5 = load i32, i32* %3
%6 = load %struct.sockaddr_in*, %struct.sockaddr_in** %4
%7 = bitcast %struct.sockaddr_in* %6 to %struct.sockaddr*
%8 = call i64 @bind(i32 %5, %struct.sockaddr* %7, i32 4)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = call i32 @perror(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%12 = load i32, i32* @EXIT_FAILURE
%13 = call i32 @exit(i32 %12)
unreachable
14: ; preds = %2
ret void
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
@.str = [27 x i8] c"safe_bind - Failed to bind\00"
@EXIT_FAILURE = global i32 0
define void @safe_bind(i32 %0, %struct.sockaddr_in* %1) {
%3 = bitcast %struct.sockaddr_in* %1 to %struct.sockaddr*
%4 = tail call i64 @bind(i32 %0, %struct.sockaddr* %3, i32 4)
%5 = icmp eq i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i32 @perror(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
10: ; preds = %2
ret void
}
int the_switch(int key) {
  switch (key) {
  case 1:
    return 10;
  case 2:
    return 20;
  case 3:
    return 30;
  default:
    return 42;
  }
}


x86 assembly (clang, -O0):
<the_switch>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x1,%eax
je     113d <the_switch+0x3d>
jmp    111b <the_switch+0x1b>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     1149 <the_switch+0x49>
jmp    112c <the_switch+0x2c>
mov    -0xc(%rbp),%eax
sub    $0x3,%eax
je     1155 <the_switch+0x55>
jmp    1161 <the_switch+0x61>
movl   $0xa,-0x4(%rbp)
jmp    1168 <the_switch+0x68>
movl   $0x14,-0x4(%rbp)
jmp    1168 <the_switch+0x68>
movl   $0x1e,-0x4(%rbp)
jmp    1168 <the_switch+0x68>
movl   $0x2a,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<the_switch>:
add    $0xffffffff,%edi
cmp    $0x3,%edi
lea    (%rdi,%rdi,4),%eax
lea    0xa(%rax,%rax,1),%ecx
mov    $0x2a,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @the_switch(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %8 [
i32 1, label %5
i32 2, label %6
i32 3, label %7
]
5: ; preds = %1
store i32 10, i32* %2
br label %9
6: ; preds = %1
store i32 20, i32* %2
br label %9
7: ; preds = %1
store i32 30, i32* %2
br label %9
8: ; preds = %1
store i32 42, i32* %2
br label %9
9: ; preds = %8, %7, %6, %5
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @the_switch(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 3
%4 = mul i32 %2, 10
%5 = add i32 %4, 10
%6 = select i1 %3, i32 %5, i32 42
ret i32 %6
}
/* Variables and functions */
int memunlock(char *addr, size_t size) { return (-1); }


x86 assembly (clang, -O0):
<memunlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memunlock>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @memunlock(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
ret i32 -1
}

LLVM IR (-O2):
define i32 @memunlock(i8* nocapture readnone %0, i64 %1) {
ret i32 -1
}