xunge/DecIR huggingface dataset:
/* Type definitions */
struct in_addr {
  int s_addr;
};
struct hostent {
  int dummy;
};

/* Variables and functions */
int inet_addr(unsigned char *);
int getHost(unsigned char *toGet, struct in_addr *i) {
  struct hostent *h;
  if ((i->s_addr = inet_addr(toGet)) == -1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<getHost>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <inet_addr@plt>
mov    -0x18(%rbp),%rcx
mov    %eax,(%rcx)
cmp    $0xffffffff,%eax
jne    1144 <getHost+0x34>
movl   $0x1,-0x4(%rbp)
jmp    114b <getHost+0x3b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getHost>:
push   %rbx
mov    %rsi,%rbx
call   1030 <inet_addr@plt>
mov    %eax,(%rbx)
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.in_addr = type { i32 }
%struct.hostent = type { i32 }
define i32 @getHost(i8* %0, %struct.in_addr* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca %struct.in_addr*
%6 = alloca %struct.hostent*
store i8* %0, i8** %4
store %struct.in_addr* %1, %struct.in_addr** %5
%7 = load i8*, i8** %4
%8 = call i32 @inet_addr(i8* %7)
%9 = load %struct.in_addr*, %struct.in_addr** %5
%10 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %9, i32 0, i32 0
store i32 %8, i32* %10
%11 = icmp eq i32 %8, -1
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 1, i32* %3
br label %14
13: ; preds = %2
store i32 0, i32* %3
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
%struct.in_addr = type { i32 }
%struct.hostent = type { i32 }
define i32 @getHost(i8* %0, %struct.in_addr* nocapture writeonly %1) {
%3 = tail call i32 @inet_addr(i8* %0)
%4 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %1, i64 0, i32 0
store i32 %3, i32* %4
%5 = icmp eq i32 %3, -1
%6 = zext i1 %5 to i32
ret i32 %6
}
void thd_mutex_reset(int *p) {}


x86 assembly (clang, -O0):
<thd_mutex_reset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<thd_mutex_reset>:
ret

LLVM IR (-O0):
define void @thd_mutex_reset(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @thd_mutex_reset(i32* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ RSA;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
scalar_t__ ASN1_item_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ *);
int /*<<< orphan*/ RSAPublicKey_it;
RSA *d2i_RSAPublicKey(RSA **a, const unsigned char **in, long len) {
  return (RSA *)ASN1_item_d2i((ASN1_VALUE **)a, in, len, &RSAPublicKey_it);
}


x86 assembly (clang, -O0):
<d2i_RSAPublicKey>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2ea9(%rip),%rcx
call   1030 <ASN1_item_d2i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_RSAPublicKey>:
mov    0x2ec9(%rip),%rcx
jmp    1030 <ASN1_item_d2i@plt>

LLVM IR (-O0):
@RSAPublicKey_it = global i32 0
define i32* @d2i_RSAPublicKey(i32** %0, i8** %1, i64 %2) {
%4 = alloca i32**
%5 = alloca i8**
%6 = alloca i64
store i32** %0, i32*** %4
store i8** %1, i8*** %5
store i64 %2, i64* %6
%7 = load i32**, i32*** %4
%8 = load i8**, i8*** %5
%9 = load i64, i64* %6
%10 = call i64 @ASN1_item_d2i(i32** %7, i8** %8, i64 %9, i32* @RSAPublicKey_it)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
@RSAPublicKey_it = global i32 0
define i32* @d2i_RSAPublicKey(i32** %0, i8** %1, i64 %2) {
%4 = tail call i64 @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* @RSAPublicKey_it)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
void SteamAPI_ISteamFriends_SetPlayedWith(void *self) {
  xlogf("%s(self = %p)\n", __func__, self);
}


x86 assembly (clang, -O0):
<SteamAPI_ISteamFriends_SetPlayedWith>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x0,%al
call   1030 <xlogf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SteamAPI_ISteamFriends_SetPlayedWith>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <xlogf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamFriends_SetPlayedWith = [37 x i8] c"SteamAPI_ISteamFriends_SetPlayedWith\00"
define void @SteamAPI_ISteamFriends_SetPlayedWith(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([37 x i8], [37 x i8]* @__func__.SteamAPI_ISteamFriends_SetPlayedWith, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamFriends_SetPlayedWith = [37 x i8] c"SteamAPI_ISteamFriends_SetPlayedWith\00"
define void @SteamAPI_ISteamFriends_SetPlayedWith(i8* %0) {
%2 = tail call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([37 x i8], [37 x i8]* @__func__.SteamAPI_ISteamFriends_SetPlayedWith, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct timespec {
  int tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
unsigned long long use_clock() {
  struct timespec ts;
  clock_gettime(CLOCK_REALTIME, &ts);
  return (((unsigned long long)ts.tv_sec) * 1000) + (ts.tv_nsec / 1000000);
}


x86 assembly (clang, -O0):
<use_clock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
lea    -0x10(%rbp),%rsi
call   1030 <clock_gettime@plt>
imul   $0x3e8,-0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<use_clock>:
sub    $0x18,%rsp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0x8(%rsp),%rsi
call   1030 <clock_gettime@plt>
imul   $0x3e8,0x10(%rsp),%rcx
movslq 0x8(%rsp),%rax
imul   $0x431bde83,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x32,%rax
add    %edx,%eax
cltq
add    %rcx,%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
@CLOCK_REALTIME = global i32 0
define i64 @use_clock() {
%1 = alloca %struct.timespec
%2 = load i32, i32* @CLOCK_REALTIME
%3 = call i32 @clock_gettime(i32 %2, %struct.timespec* %1)
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 1
%5 = load i64, i64* %4
%6 = mul i64 %5, 1000
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000000
%10 = sext i32 %9 to i64
%11 = add i64 %6, %10
ret i64 %11
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
@CLOCK_REALTIME = global i32 0
define i64 @use_clock() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_REALTIME
%4 = call i32 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%6 = load i64, i64* %5
%7 = mul i64 %6, 1000
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%9 = load i32, i32* %8
%10 = sdiv i32 %9, 1000000
%11 = sext i32 %10 to i64
%12 = add i64 %7, %11
ret i64 %12
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *realloc(void *, size_t);
int /*<<< orphan*/ stderr;
void *g2_realloc(void *p, size_t size) {
  void *rv;
  if ((rv = realloc(p, size)) == NULL) {
    fprintf(stderr, "g2_realloc: Can not allocate memory\n");
    exit(-1);
  }
  return rv;
}


x86 assembly (clang, -O0):
<g2_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    117a <g2_realloc+0x4a>
mov    0x2e7e(%rip),%rax
mov    (%rax),%edi
lea    0xe95(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2_realloc>:
push   %rax
call   1040 <realloc@plt>
test   %rax,%rax
je     113d <g2_realloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [37 x i8] c"g2_realloc: Can not allocate memory\0A\00"
define i8* @g2_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32, i32* @stderr
%12 = call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%13 = call i32 @exit(i32 -1)
unreachable
14: ; preds = %2
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [37 x i8] c"g2_realloc: Can not allocate memory\0A\00"
define noalias i8* @g2_realloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 -1)
unreachable
9: ; preds = %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ malloc(int);
void alloc_is_big_Bad() { malloc(2 * 1000 * 1000 * 1000); }


x86 assembly (clang, -O0):
<alloc_is_big_Bad>:
push   %rbp
mov    %rsp,%rbp
mov    $0x77359400,%edi
call   1030 <malloc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_is_big_Bad>:
mov    $0x77359400,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define void @alloc_is_big_Bad() {
%1 = call i32 @malloc(i32 2000000000)
ret void
}

LLVM IR (-O2):
define void @alloc_is_big_Bad() {
%1 = tail call i32 @malloc(i32 2000000000)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char *);
int sys_write(int /*<<< orphan*/, char *, int /*<<< orphan*/);
int puts(char *str) { return sys_write(0, str, strlen(str)); }


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x10(%rbp),%rsi
mov    %eax,%edx
xor    %edi,%edi
call   1040 <sys_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
xor    %edi,%edi
mov    %rbx,%rsi
mov    %eax,%edx
pop    %rbx
jmp    1040 <sys_write@plt>

LLVM IR (-O0):
define i32 @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = call i32 @sys_write(i32 0, i8* %3, i32 %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @puts(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = tail call i32 @sys_write(i32 0, i8* %0, i32 %2)
ret i32 %3
}
/* Variables and functions */
unsigned int GET32(int);
unsigned int uart_getc(void) {
  while (1) {
    if ((GET32((0x20201000 + 0x18)) & 0x10) == 0)
      break;
  }
  return (GET32((0x20201000 + 0x00)));
}


x86 assembly (clang, -O0):
<uart_getc>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <uart_getc+0x9>
mov    $0x20201018,%edi
call   1030 <GET32@plt>
and    $0x10,%eax
cmp    $0x0,%eax
jne    1134 <uart_getc+0x24>
jmp    1139 <uart_getc+0x29>
jmp    1119 <uart_getc+0x9>
mov    $0x20201000,%edi
call   1030 <GET32@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_getc>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x20201018,%edi
call   1030 <GET32@plt>
test   $0x10,%al
jne    1120 <uart_getc+0x10>
mov    $0x20201000,%edi
pop    %rax
jmp    1030 <GET32@plt>

LLVM IR (-O0):
define i32 @uart_getc() {
br label %1
1: ; preds = %0, %6
%2 = call i32 @GET32(i32 538972184)
%3 = and i32 %2, 16
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %7
6: ; preds = %1
br label %1
7: ; preds = %5
%8 = call i32 @GET32(i32 538972160)
ret i32 %8
}

LLVM IR (-O2):
define i32 @uart_getc() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 @GET32(i32 538972184)
%3 = and i32 %2, 16
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %1
5: ; preds = %1
%6 = tail call i32 @GET32(i32 538972160)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ dxl_write_word(unsigned char, int, unsigned char);
void setCWComplianceSlope(unsigned char id, unsigned char step) {
  dxl_write_word(id, (28), step);
}


x86 assembly (clang, -O0):
<setCWComplianceSlope>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    -0x1(%rbp),%al
mov    $0x1c,%esi
movzbl %al,%edi
movzbl -0x2(%rbp),%edx
call   1030 <dxl_write_word@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setCWComplianceSlope>:
mov    %esi,%edx
mov    $0x1c,%esi
jmp    1030 <dxl_write_word@plt>

LLVM IR (-O0):
define void @setCWComplianceSlope(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = load i8, i8* %4
%7 = call i32 @dxl_write_word(i8 zeroext %5, i32 28, i8 zeroext %6)
ret void
}

LLVM IR (-O2):
define void @setCWComplianceSlope(i8 zeroext %0, i8 zeroext %1) {
%3 = tail call i32 @dxl_write_word(i8 zeroext %0, i32 28, i8 zeroext %1)
ret void
}
/* Variables and functions */
int return_verification_int(int /*<<< orphan*/, int);
int /*<<< orphan*/ write(int, char *, int);
int my_putchar(char c) {
  return return_verification_int(write(1, &c, sizeof(char)), 1);
}


x86 assembly (clang, -O0):
<my_putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x1,%edx
lea    -0x1(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
mov    %eax,%edi
mov    $0x1,%esi
call   1040 <return_verification_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_putchar>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
call   1030 <write@plt>
mov    %eax,%edi
mov    $0x1,%esi
pop    %rax
jmp    1040 <return_verification_int@plt>

LLVM IR (-O0):
define i32 @my_putchar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @write(i32 1, i8* %2, i32 1)
%4 = call i32 @return_verification_int(i32 %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @my_putchar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @write(i32 1, i8* %2, i32 1)
%4 = tail call i32 @return_verification_int(i32 %3, i32 1)
ret i32 %4
}
/* Variables and functions */
long rand();
float ranf(void) {
  float rv;
  long r = rand();
  r &= 077777;
  rv = ((float)r / 32767.);
  return rv;
}


x86 assembly (clang, -O0):
<ranf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x7fff,%rax
mov    %rax,-0x10(%rbp)
cvtsi2ssq -0x10(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xebd(%rip),%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ranf>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
and    $0x7fff,%eax
cvtsi2ss %eax,%xmm0
divss  0xed7(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @ranf() {
%1 = alloca float
%2 = alloca i64
%3 = call i64 (...) @rand()
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, 32767
store i64 %5, i64* %2
%6 = load i64, i64* %2
%7 = sitofp i64 %6 to float
%8 = fpext float %7 to double
%9 = fdiv double %8, 3.276700e+04
%10 = fptrunc double %9 to float
store float %10, float* %1
%11 = load float, float* %1
ret float %11
}

LLVM IR (-O2):
define float @ranf() {
%1 = tail call i64 (...) @rand()
%2 = and i64 %1, 32767
%3 = sitofp i64 %2 to float
%4 = fdiv float %3, 3.276700e+04
ret float %4
}
/* Variables and functions */
unsigned long pow(int, int);
float FixpointToFloat(unsigned long int FixedPointDigit) {
  return (float)(FixedPointDigit * pow(2, -23));
}


x86 assembly (clang, -O0):
<FixpointToFloat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x2,%edi
mov    $0xffffffe9,%esi
call   1030 <pow@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
imul   %rcx,%rax
mov    %rax,%rdx
shr    %rdx
mov    %eax,%ecx
and    $0x1,%ecx
or     %rdx,%rcx
cvtsi2ss %rcx,%xmm0
addss  %xmm0,%xmm0
cvtsi2ss %rax,%xmm1
movss  %xmm1,-0x10(%rbp)
test   %rax,%rax
movss  %xmm0,-0xc(%rbp)
js     1177 <FixpointToFloat+0x67>
movss  -0x10(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FixpointToFloat>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2,%edi
mov    $0xffffffe9,%esi
call   1030 <pow@plt>
imul   %rbx,%rax
test   %rax,%rax
js     1133 <FixpointToFloat+0x23>
cvtsi2ss %rax,%xmm0
pop    %rbx
ret
mov    %rax,%rcx
shr    %rcx
and    $0x1,%eax
or     %rcx,%rax
cvtsi2ss %rax,%xmm0
addss  %xmm0,%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define float @FixpointToFloat(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @pow(i32 2, i32 -23)
%5 = mul i64 %3, %4
%6 = uitofp i64 %5 to float
ret float %6
}

LLVM IR (-O2):
define float @FixpointToFloat(i64 %0) {
%2 = tail call i64 @pow(i32 2, i32 -23)
%3 = mul i64 %2, %0
%4 = uitofp i64 %3 to float
ret float %4
}
/* Variables and functions */
char *appaserver_parameter_file_get_dbms();
int /*<<< orphan*/ printf(char *, char *);
int main(void) {
  printf("%s\n", appaserver_parameter_file_get_dbms());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <appaserver_parameter_file_get_dbms@plt>
mov    %rax,%rsi
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <appaserver_parameter_file_get_dbms@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i8* (...) @appaserver_parameter_file_get_dbms()
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = tail call i8* (...) @appaserver_parameter_file_get_dbms()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ VIM_HIF_SetReg8(int, unsigned char);
void VIM_JPEG_SetLineBlank(unsigned short bHblank) {
  VIM_HIF_SetReg8((0x0C00 + 0x007), (unsigned char)bHblank);
  VIM_HIF_SetReg8((0x0C00 + 0x006), (unsigned char)(bHblank >> 8));
  bHblank++;
  VIM_HIF_SetReg8((0x0000 + 0x04D), (unsigned char)bHblank);
  VIM_HIF_SetReg8((0x0000 + 0x04C), (unsigned char)(bHblank >> 8));
}


x86 assembly (clang, -O0):
<VIM_JPEG_SetLineBlank>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%ax
mov    $0xc07,%edi
movzbl %al,%esi
call   1030 <VIM_HIF_SetReg8@plt>
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
mov    $0xc06,%edi
movzbl %al,%esi
call   1030 <VIM_HIF_SetReg8@plt>
mov    -0x2(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%ax
mov    $0x4d,%edi
movzbl %al,%esi
call   1030 <VIM_HIF_SetReg8@plt>
movzwl -0x2(%rbp),%eax
sar    $0x8,%eax
mov    $0x4c,%edi
movzbl %al,%esi
call   1030 <VIM_HIF_SetReg8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VIM_JPEG_SetLineBlank>:
push   %rbx
mov    %edi,%ebx
movzbl %bl,%esi
mov    $0xc07,%edi
call   1030 <VIM_HIF_SetReg8@plt>
mov    %ebx,%esi
shr    $0x8,%esi
mov    $0xc06,%edi
call   1030 <VIM_HIF_SetReg8@plt>
add    $0x1,%ebx
movzbl %bl,%esi
mov    $0x4d,%edi
call   1030 <VIM_HIF_SetReg8@plt>
movzbl %bh,%esi
mov    $0x4c,%edi
pop    %rbx
jmp    1030 <VIM_HIF_SetReg8@plt>

LLVM IR (-O0):
define void @VIM_JPEG_SetLineBlank(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = trunc i16 %3 to i8
%5 = call i32 @VIM_HIF_SetReg8(i32 3079, i8 zeroext %4)
%6 = load i16, i16* %2
%7 = zext i16 %6 to i32
%8 = ashr i32 %7, 8
%9 = trunc i32 %8 to i8
%10 = call i32 @VIM_HIF_SetReg8(i32 3078, i8 zeroext %9)
%11 = load i16, i16* %2
%12 = add i16 %11, 1
store i16 %12, i16* %2
%13 = load i16, i16* %2
%14 = trunc i16 %13 to i8
%15 = call i32 @VIM_HIF_SetReg8(i32 77, i8 zeroext %14)
%16 = load i16, i16* %2
%17 = zext i16 %16 to i32
%18 = ashr i32 %17, 8
%19 = trunc i32 %18 to i8
%20 = call i32 @VIM_HIF_SetReg8(i32 76, i8 zeroext %19)
ret void
}

LLVM IR (-O2):
define void @VIM_JPEG_SetLineBlank(i16 zeroext %0) {
%2 = trunc i16 %0 to i8
%3 = tail call i32 @VIM_HIF_SetReg8(i32 3079, i8 zeroext %2)
%4 = lshr i16 %0, 8
%5 = trunc i16 %4 to i8
%6 = tail call i32 @VIM_HIF_SetReg8(i32 3078, i8 zeroext %5)
%7 = add i16 %0, 1
%8 = trunc i16 %7 to i8
%9 = tail call i32 @VIM_HIF_SetReg8(i32 77, i8 zeroext %8)
%10 = lshr i16 %7, 8
%11 = trunc i16 %10 to i8
%12 = tail call i32 @VIM_HIF_SetReg8(i32 76, i8 zeroext %11)
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int solcon_quaddobl_one_homogenization(void) {
  int fail, *a, *b;
  double *c;
  fail = _ada_use_c2phc4c(896, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_quaddobl_one_homogenization>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x380,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_quaddobl_one_homogenization>:
mov    $0x380,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @solcon_quaddobl_one_homogenization() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca double*
%5 = load i32*, i32** %2
%6 = load i32*, i32** %3
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 896, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %1
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @solcon_quaddobl_one_homogenization() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 896, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
unsigned xrop3_182_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  unsigned stk4;
  stk4 = D & T;
  stk3 = S | stk4;
  stk2 = T ^ stk3;
  stk1 = D ^ stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_182_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0x10(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
or     -0x20(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_182_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
not    %esi
xor    %eax,%ecx
and    %esi,%ecx
xor    $0xff,%ecx
not    %eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_182_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = load i8, i8* %3
%16 = zext i8 %15 to i32
%17 = or i32 %14, %16
store i32 %17, i32* %6
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = shl i32 %19, 8
%21 = load i8, i8* %4
%22 = zext i8 %21 to i32
%23 = or i32 %20, %22
store i32 %23, i32* %7
%24 = load i32, i32* %5
%25 = load i32, i32* %7
%26 = and i32 %24, %25
store i32 %26, i32* %11
%27 = load i32, i32* %6
%28 = load i32, i32* %11
%29 = or i32 %27, %28
store i32 %29, i32* %10
%30 = load i32, i32* %7
%31 = load i32, i32* %10
%32 = xor i32 %30, %31
store i32 %32, i32* %9
%33 = load i32, i32* %5
%34 = load i32, i32* %9
%35 = xor i32 %33, %34
store i32 %35, i32* %8
%36 = load i32, i32* %8
%37 = load i32, i32* %6
%38 = xor i32 %37, -1
%39 = and i32 %36, %38
%40 = load i32, i32* %5
%41 = load i32, i32* %6
%42 = and i32 %40, %41
%43 = or i32 %39, %42
ret i32 %43
}

LLVM IR (-O2):
define i32 @xrop3_182_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = xor i32 %5, -1
%8 = xor i32 %6, %4
%9 = and i32 %8, %7
%10 = xor i32 %9, 255
%11 = xor i32 %4, -1
%12 = and i32 %10, %11
%13 = or i32 %12, %3
ret i32 %13
}
void dpl_eventq_deinit(struct dpl_eventq *evq) { (void)evq; }


x86 assembly (clang, -O0):
<dpl_eventq_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dpl_eventq_deinit>:
ret

LLVM IR (-O0):
%struct.dpl_eventq = type opaque
define void @dpl_eventq_deinit(%struct.dpl_eventq* %0) {
%2 = alloca %struct.dpl_eventq*
store %struct.dpl_eventq* %0, %struct.dpl_eventq** %2
%3 = load %struct.dpl_eventq*, %struct.dpl_eventq** %2
ret void
}

LLVM IR (-O2):
%struct.dpl_eventq = type opaque
define void @dpl_eventq_deinit(%struct.dpl_eventq* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ GPIOBaseValid(unsigned long);
void GPIOPinIntEnable(unsigned long ulPort, unsigned char ucPins) {
  DEBUG_ASSERT(GPIOBaseValid(ulPort));
  (*((volatile unsigned long *)(ulPort + 0x00000410))) |= ucPins;
}


x86 assembly (clang, -O0):
<GPIOPinIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <GPIOBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
movzbl -0x9(%rbp),%eax
mov    %eax,%edx
mov    -0x8(%rbp),%rax
mov    0x410(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x410(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinIntEnable>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <GPIOBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    %ebp,%eax
or     %rax,0x410(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @GPIOPinIntEnable(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i64, i64* %3
%6 = call i32 @GPIOBaseValid(i64 %5)
%7 = call i32 @DEBUG_ASSERT(i32 %6)
%8 = load i8, i8* %4
%9 = zext i8 %8 to i64
%10 = load i64, i64* %3
%11 = add i64 %10, 1040
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
%14 = or i64 %13, %9
store volatile i64 %14, i64* %12
ret void
}

LLVM IR (-O2):
define void @GPIOPinIntEnable(i64 %0, i8 zeroext %1) {
%3 = tail call i32 @GPIOBaseValid(i64 %0)
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = zext i8 %1 to i64
%6 = add i64 %0, 1040
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = or i64 %8, %5
store volatile i64 %9, i64* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void _FP_free(void *ptr) {
  if (ptr)
    free(ptr);
}


x86 assembly (clang, -O0):
<_FP_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <_FP_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_FP_free>:
test   %rdi,%rdi
je     111a <_FP_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @_FP_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @_FP_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ barrier();
void read_barrier(void) { barrier(); }


x86 assembly (clang, -O0):
<read_barrier>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <barrier@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_barrier>:
xor    %eax,%eax
jmp    1030 <barrier@plt>

LLVM IR (-O0):
define void @read_barrier() {
%1 = call i32 (...) @barrier()
ret void
}

LLVM IR (-O2):
define void @read_barrier() {
%1 = tail call i32 (...) @barrier()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, char *);
int /*<<< orphan*/ poweroff();
int /*<<< orphan*/ stderr;
char *strerror(int /*<<< orphan*/);
void panic(const char *what) {
  fprintf(stderr,
          "\n\n\x1b[37m\x1b[41m\x1b[1mSOMETHING WENT HORRIBLY WRONG\x1b[0m\n\n "
          "   \x1b[31m\x1b[1m%s: %s\x1b[0m\n\n\x1b[37m\x1b[44m\x1b[1mPower "
          "off...\x1b[0m\n\n",
          what, strerror(errno));
  poweroff();
}


x86 assembly (clang, -O0):
<panic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    0x2e81(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    %rax,%rcx
lea    0xe91(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x0,%al
call   1040 <poweroff@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<panic>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ea3(%rip),%rax
mov    (%rax),%ebp
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
call   1050 <strerror@plt>
lea    0xeac(%rip),%rsi
mov    %ebp,%edi
mov    %rbx,%rdx
mov    %rax,%rcx
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <poweroff@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [109 x i8] c"\0A\0A\1B[37m\1B[41m\1B[1mSOMETHING WENT HORRIBLY WRONG\1B[0m\0A\0A \1B[31m\1B[1m%s: %s\1B[0m\0A\0A\1B[37m\1B[44m\1B[1mPower off...\1B[0m\0A\0A\00"
@errno = global i32 0
define void @panic(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = load i32, i32* @errno
%6 = call i8* @strerror(i32 %5)
%7 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([109 x i8], [109 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %6)
%8 = call i32 (...) @poweroff()
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [109 x i8] c"\0A\0A\1B[37m\1B[41m\1B[1mSOMETHING WENT HORRIBLY WRONG\1B[0m\0A\0A \1B[31m\1B[1m%s: %s\1B[0m\0A\0A\1B[37m\1B[44m\1B[1mPower off...\1B[0m\0A\0A\00"
@errno = global i32 0
define void @panic(i8* %0) {
%2 = load i32, i32* @stderr
%3 = load i32, i32* @errno
%4 = tail call i8* @strerror(i32 %3)
%5 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([109 x i8], [109 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %4)
%6 = tail call i32 (...) @poweroff()
ret void
}
/* Variables and functions */
int bar(int);
int filter() { return bar(3); }


x86 assembly (clang, -O0):
<filter>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <bar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<filter>:
mov    $0x3,%edi
jmp    1030 <bar@plt>

LLVM IR (-O0):
define i32 @filter() {
%1 = call i32 @bar(i32 3)
ret i32 %1
}

LLVM IR (-O2):
define i32 @filter() {
%1 = tail call i32 @bar(i32 3)
ret i32 %1
}
float dist_point_plane(float x, float y, float z, float nx, float ny, float nz,
                       float x0, float y0, float z0) {
  float dx = x - x0;
  float dy = y - y0;
  float dz = z - z0;
  return nx * dx + ny * dy + nz * dz;
}


x86 assembly (clang, -O0):
<dist_point_plane>:
push   %rbp
mov    %rsp,%rbp
movss  0x10(%rbp),%xmm8
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  %xmm5,-0x18(%rbp)
movss  %xmm6,-0x1c(%rbp)
movss  %xmm7,-0x20(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x1c(%rbp),%xmm0
movss  %xmm0,-0x24(%rbp)
movss  -0x8(%rbp),%xmm0
subss  -0x20(%rbp),%xmm0
movss  %xmm0,-0x28(%rbp)
movss  -0xc(%rbp),%xmm0
subss  0x10(%rbp),%xmm0
movss  %xmm0,-0x2c(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0x24(%rbp),%xmm2
movss  -0x14(%rbp),%xmm0
mulss  -0x28(%rbp),%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
movss  -0x18(%rbp),%xmm0
movss  -0x2c(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dist_point_plane>:
subss  %xmm6,%xmm0
subss  %xmm7,%xmm1
subss  0x8(%rsp),%xmm2
mulss  %xmm4,%xmm1
mulss  %xmm3,%xmm0
addss  %xmm1,%xmm0
mulss  %xmm5,%xmm2
addss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @dist_point_plane(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7, float %8) {
%10 = alloca float
%11 = alloca float
%12 = alloca float
%13 = alloca float
%14 = alloca float
%15 = alloca float
%16 = alloca float
%17 = alloca float
%18 = alloca float
%19 = alloca float
%20 = alloca float
%21 = alloca float
store float %0, float* %10
store float %1, float* %11
store float %2, float* %12
store float %3, float* %13
store float %4, float* %14
store float %5, float* %15
store float %6, float* %16
store float %7, float* %17
store float %8, float* %18
%22 = load float, float* %10
%23 = load float, float* %16
%24 = fsub float %22, %23
store float %24, float* %19
%25 = load float, float* %11
%26 = load float, float* %17
%27 = fsub float %25, %26
store float %27, float* %20
%28 = load float, float* %12
%29 = load float, float* %18
%30 = fsub float %28, %29
store float %30, float* %21
%31 = load float, float* %13
%32 = load float, float* %19
%33 = load float, float* %14
%34 = load float, float* %20
%35 = fmul float %33, %34
%36 = call float @llvm.fmuladd.f32(float %31, float %32, float %35)
%37 = load float, float* %15
%38 = load float, float* %21
%39 = call float @llvm.fmuladd.f32(float %37, float %38, float %36)
ret float %39
}

LLVM IR (-O2):
define float @dist_point_plane(float %0, float %1, float %2, float %3, float %4, float %5, float %6, float %7, float %8) {
%10 = fsub float %0, %6
%11 = fsub float %1, %7
%12 = fsub float %2, %8
%13 = fmul float %11, %4
%14 = tail call float @llvm.fmuladd.f32(float %3, float %10, float %13)
%15 = tail call float @llvm.fmuladd.f32(float %5, float %12, float %14)
ret float %15
}
/* Type definitions */
typedef int /*<<< orphan*/ val;
typedef int /*<<< orphan*/ uint8_t;
struct rnet_message {
  int dummy;
};

/* Variables and functions */
int add_field(struct rnet_message **, char *, int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ strlen(char *);
int rnet_message_add_u8(struct rnet_message **msg, char *key, uint8_t val) {
  return add_field(msg, key, strlen(key), (char *)&val, sizeof(val));
}


x86 assembly (clang, -O0):
<rnet_message_add_u8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x28(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    %eax,%edx
lea    -0x14(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <add_field@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnet_message_add_u8>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %edx,0x4(%rsp)
mov    %rsi,%rdi
call   1040 <strlen@plt>
lea    0x4(%rsp),%rcx
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
mov    $0x4,%r8d
call   1030 <add_field@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.rnet_message = type { i32 }
define i32 @rnet_message_add_u8(%struct.rnet_message** %0, i8* %1, i32 %2) {
%4 = alloca %struct.rnet_message**
%5 = alloca i8*
%6 = alloca i32
store %struct.rnet_message** %0, %struct.rnet_message*** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.rnet_message**, %struct.rnet_message*** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %5
%10 = call i32 @strlen(i8* %9)
%11 = bitcast i32* %6 to i8*
%12 = call i32 @add_field(%struct.rnet_message** %7, i8* %8, i32 %10, i8* %11, i32 4)
ret i32 %12
}

LLVM IR (-O2):
%struct.rnet_message = type { i32 }
define i32 @rnet_message_add_u8(%struct.rnet_message** %0, i8* %1, i32 %2) {
%4 = alloca i32
store i32 %2, i32* %4
%5 = tail call i32 @strlen(i8* %1)
%6 = bitcast i32* %4 to i8*
%7 = call i32 @add_field(%struct.rnet_message** %0, i8* %1, i32 %5, i8* %6, i32 4)
ret i32 %7
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int now_us();
int64_t now_ms() { return now_us() / 1000; }


x86 assembly (clang, -O0):
<now_ms>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <now_us@plt>
mov    $0x3e8,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<now_ms>:
push   %rax
xor    %eax,%eax
call   1030 <now_us@plt>
cltq
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x26,%rax
add    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @now_ms() {
%1 = call i32 (...) @now_us()
%2 = sdiv i32 %1, 1000
ret i32 %2
}

LLVM IR (-O2):
define i32 @now_ms() {
%1 = tail call i32 (...) @now_us()
%2 = sdiv i32 %1, 1000
ret i32 %2
}
void halt(void) { __asm__ __volatile__("hlt" : : : "memory"); }


x86 assembly (clang, -O0):
<halt>:
push   %rbp
mov    %rsp,%rbp
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<halt>:
hlt
ret

LLVM IR (-O0):
define void @halt() {
ret void
}

LLVM IR (-O2):
define void @halt() {
tail call void asm sideeffect "hlt", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ final(int, char *);
void sigcatch(int sig) { final(1, "SIGNAL"); }


x86 assembly (clang, -O0):
<sigcatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
lea    0xed9(%rip),%rsi
call   1030 <final@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigcatch>:
lea    0xee9(%rip),%rsi
mov    $0x1,%edi
jmp    1030 <final@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"SIGNAL\00"
define void @sigcatch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @final(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"SIGNAL\00"
define void @sigcatch(i32 %0) {
%2 = tail call i32 @final(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
int *ivector(nl, nh)
int nl, nh;
{
  int *v;
  v = (int *)calloc((unsigned)(nh - nl + 1), sizeof(int));
  if (!v)
    nrerror("allocation failure in ivector()");
  return v - nl;
}


x86 assembly (clang, -O0):
<ivector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,%eax
mov    %eax,%edi
mov    $0x4,%esi
call   1040 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1162 <ivector+0x42>
lea    0xea5(%rip),%rdi
mov    $0x0,%al
call   1030 <nrerror@plt>
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rdx
xor    %ecx,%ecx
sub    %rdx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ivector>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
sub    %edi,%esi
lea    0x1(%rsi),%edi
mov    $0x4,%esi
call   1040 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    114a <ivector+0x2a>
lea    0xebd(%rip),%rdi
xor    %eax,%eax
call   1030 <nrerror@plt>
movslq %ebp,%rax
shl    $0x2,%rax
sub    %rax,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [32 x i8] c"allocation failure in ivector()\00"
define i32* @ivector(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = zext i32 %9 to i64
%11 = call i8* @calloc(i64 %10, i64 4)
%12 = bitcast i8* %11 to i32*
store i32* %12, i32** %5
%13 = load i32*, i32** %5
%14 = icmp ne i32* %13, null
br i1 %14, label %17, label %15
15: ; preds = %2
%16 = call i32 (i8*, ...) bitcast (i32 (...)* @nrerror to i32 (i8*, ...)*)(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %17
17: ; preds = %15, %2
%18 = load i32*, i32** %5
%19 = load i32, i32* %3
%20 = sext i32 %19 to i64
%21 = sub i64 0, %20
%22 = getelementptr inbounds i32, i32* %18, i64 %21
ret i32* %22
}

LLVM IR (-O2):
@.str = [32 x i8] c"allocation failure in ivector()\00"
define i32* @ivector(i32 %0, i32 %1) {
%3 = sub i32 1, %0
%4 = add i32 %3, %1
%5 = zext i32 %4 to i64
%6 = tail call i8* @calloc(i64 %5, i64 4)
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, ...) bitcast (i32 (...)* @nrerror to i32 (i8*, ...)*)(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %2
%11 = bitcast i8* %6 to i32*
%12 = sext i32 %0 to i64
%13 = sub nsw i64 0, %12
%14 = getelementptr inbounds i32, i32* %11, i64 %13
ret i32* %14
}
/* Variables and functions */
int /*<<< orphan*/ amcguard2l_(float *, int *, int *, int *, int *, int *);
void camcguard2l(float amu[], int nx, int ny, int nxe, int nye, int ndim) {
  amcguard2l_(amu, &nx, &ny, &nxe, &nye, &ndim);
  return;
}


x86 assembly (clang, -O0):
<camcguard2l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
lea    -0x10(%rbp),%rdx
lea    -0x14(%rbp),%rcx
lea    -0x18(%rbp),%r8
lea    -0x1c(%rbp),%r9
call   1030 <amcguard2l_@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<camcguard2l>:
sub    $0x18,%rsp
mov    %esi,0x14(%rsp)
mov    %edx,0x10(%rsp)
mov    %ecx,0xc(%rsp)
mov    %r8d,0x8(%rsp)
mov    %r9d,0x4(%rsp)
lea    0x14(%rsp),%rsi
lea    0x10(%rsp),%rdx
lea    0xc(%rsp),%rcx
lea    0x8(%rsp),%r8
lea    0x4(%rsp),%r9
call   1030 <amcguard2l_@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @camcguard2l(float* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca float*
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store float* %0, float** %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load float*, float** %7
%14 = call i32 @amcguard2l_(float* %13, i32* %8, i32* %9, i32* %10, i32* %11, i32* %12)
ret void
}

LLVM IR (-O2):
define void @camcguard2l(float* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
store i32 %5, i32* %11
%12 = call i32 @amcguard2l_(float* %0, i32* %7, i32* %8, i32* %9, i32* %10, i32* %11)
ret void
}
int _is_power_of_two(unsigned int x) { return ((x != 0) && !(x & (x - 1))); }


x86 assembly (clang, -O0):
<_is_power_of_two>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     112c <_is_power_of_two+0x2c>
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_power_of_two>:
test   %edi,%edi
je     110f <_is_power_of_two+0xf>
lea    -0x1(%rdi),%ecx
xor    %eax,%eax
test   %ecx,%edi
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_is_power_of_two(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = load i32, i32* %2
%7 = load i32, i32* %2
%8 = sub i32 %7, 1
%9 = and i32 %6, %8
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
br label %12
12: ; preds = %5, %1
%13 = phi i1 [ false, %1 ], [ %11, %5 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @_is_power_of_two(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.ctpop.i32(i32 %0)
%5 = icmp ult i32 %4, 2
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
void vetor_libera(int *v) { free(v); }


x86 assembly (clang, -O0):
<vetor_libera>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vetor_libera>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @vetor_libera(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @free(i32* %3)
ret void
}

LLVM IR (-O2):
define void @vetor_libera(i32* nocapture %0) {
%2 = tail call i32 @free(i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, int);
void ZSTD_copy4(void *dst, const void *src) { memcpy(dst, src, 4); }


x86 assembly (clang, -O0):
<ZSTD_copy4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZSTD_copy4>:
mov    $0x4,%edx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @ZSTD_copy4(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @memcpy(i8* %5, i8* %6, i32 4)
ret void
}

LLVM IR (-O2):
define void @ZSTD_copy4(i8* %0, i8* %1) {
%3 = tail call i32 @memcpy(i8* %0, i8* %1, i32 4)
ret void
}
/* Variables and functions */
int rand();
int random_int(void) {
  int r;
  r = rand();
  return r;
}


x86 assembly (clang, -O0):
<random_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_int>:
xor    %eax,%eax
jmp    1030 <rand@plt>

LLVM IR (-O0):
define i32 @random_int() {
%1 = alloca i32
%2 = call i32 (...) @rand()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @random_int() {
%1 = tail call i32 (...) @rand()
ret i32 %1
}