xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void fatal(char *error) {
  printf("Sieve Error: \"%s\"\n", error);
  exit(-1);
}


x86 assembly (clang, -O0):
<fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fatal>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"Sieve Error: \22%s\22\0A\00"
define void @fatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@.str = [19 x i8] c"Sieve Error: \22%s\22\0A\00"
define void @fatal(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
void print_help(char **argv) {
  fprintf(stderr, "Syntax: %s -i <input file> -o <output file> [options]\n",
          argv[0]);
  fprintf(stderr, "Options:\n\t-g generate cartridge header\n");
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
lea    0xecd(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
lea    0xeed(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
push   %rbx
mov    0x2ec8(%rip),%rbx
mov    (%rbx),%eax
mov    (%rdi),%rdx
lea    0xedc(%rip),%rsi
mov    %eax,%edi
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xf01(%rip),%rsi
xor    %eax,%eax
pop    %rbx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [55 x i8] c"Syntax: %s -i <input file> -o <output file> [options]\0A\00"
@.str.1 = [40 x i8] c"Options:\0A\09-g generate cartridge header\0A\00"
define void @print_help(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i32, i32* @stderr
%4 = load i8**, i8*** %2
%5 = getelementptr inbounds i8*, i8** %4, i64 0
%6 = load i8*, i8** %5
%7 = call i32 (i32, i8*, ...) @fprintf(i32 %3, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = load i32, i32* @stderr
%9 = call i32 (i32, i8*, ...) @fprintf(i32 %8, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [55 x i8] c"Syntax: %s -i <input file> -o <output file> [options]\0A\00"
@.str.1 = [40 x i8] c"Options:\0A\09-g generate cartridge header\0A\00"
define void @print_help(i8** nocapture %0) {
%2 = load i32, i32* @stderr
%3 = load i8*, i8** %0
%4 = tail call i32 (i32, i8*, ...) @fprintf(i32 %2, i8* getelementptr inbounds ([55 x i8], [55 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i32, i32* @stderr
%6 = tail call i32 (i32, i8*, ...) @fprintf(i32 %5, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int f();
int /*<<< orphan*/ g();
int /*<<< orphan*/ h();
void upto(int x) {
  while (x > f())
    g();
  while (f() < 3)
    h();
}


x86 assembly (clang, -O0):
<upto>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <f@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
cmp    %ecx,%eax
jle    1161 <upto+0x31>
mov    $0x0,%al
call   1050 <g@plt>
jmp    113b <upto+0xb>
jmp    1166 <upto+0x36>
mov    $0x0,%al
call   1040 <f@plt>
cmp    $0x3,%eax
jge    1182 <upto+0x52>
mov    $0x0,%al
call   1030 <h@plt>
jmp    1166 <upto+0x36>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<upto>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %eax,%eax
call   1040 <f@plt>
cmp    %ebx,%eax
jge    1154 <upto+0x24>
xor    %eax,%eax
call   1050 <g@plt>
jmp    1140 <upto+0x10>
xor    %eax,%eax
call   1040 <f@plt>
cmp    $0x2,%eax
jg     1173 <upto+0x43>
xor    %eax,%eax
call   1030 <h@plt>
xor    %eax,%eax
call   1040 <f@plt>
cmp    $0x3,%eax
jl     1160 <upto+0x30>
pop    %rbx
ret

LLVM IR (-O0):
define void @upto(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = call i32 (...) @f()
%6 = icmp sgt i32 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 (...) @g()
br label %3
9: ; preds = %3
br label %10
10: ; preds = %13, %9
%11 = call i32 (...) @f()
%12 = icmp slt i32 %11, 3
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = call i32 (...) @h()
br label %10
15: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @upto(i32 %0) {
%2 = tail call i32 (...) @f()
%3 = icmp slt i32 %2, %0
br i1 %3, label %7, label %4
4: ; preds = %7, %1
%5 = tail call i32 (...) @f()
%6 = icmp slt i32 %5, 3
br i1 %6, label %11, label %15
7: ; preds = %1, %7
%8 = tail call i32 (...) @g()
%9 = tail call i32 (...) @f()
%10 = icmp slt i32 %9, %0
br i1 %10, label %7, label %4
11: ; preds = %4, %11
%12 = tail call i32 (...) @h()
%13 = tail call i32 (...) @f()
%14 = icmp slt i32 %13, 3
br i1 %14, label %11, label %15
15: ; preds = %11, %4
ret void
}
int test_imm_4Cuint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x4C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Cuint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x4c,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Cuint64_lowword_reg>:
test   $0x4c,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Cuint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 76
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_4Cuint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 76
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int write(int, char *, int);
int tunio_write(int fd, char *buf, int len) { return write(fd, buf, len); }


x86 assembly (clang, -O0):
<tunio_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tunio_write>:
jmp    1030 <write@plt>

LLVM IR (-O0):
define i32 @tunio_write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @write(i32 %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @tunio_write(i32 %0, i8* nocapture %1, i32 %2) {
%4 = tail call i32 @write(i32 %0, i8* %1, i32 %2)
ret i32 %4
}
void main() {
  int people[50];
  int i = 0;
  for (i = 0; i < 50; i++) {
    people[i] = i + 1;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
movl   $0x0,-0xd4(%rbp)
movl   $0x0,-0xd4(%rbp)
cmpl   $0x32,-0xd4(%rbp)
jge    1154 <main+0x54>
mov    -0xd4(%rbp),%ecx
add    $0x1,%ecx
movslq -0xd4(%rbp),%rax
mov    %ecx,-0xd0(%rbp,%rax,4)
mov    -0xd4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xd4(%rbp)
jmp    111c <main+0x1c>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca [50 x i32]
%2 = alloca i32
store i32 0, i32* %2
store i32 0, i32* %2
br label %3
3: ; preds = %12, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 50
br i1 %5, label %6, label %15
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
%9 = load i32, i32* %2
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds [50 x i32], [50 x i32]* %1, i64 0, i64 %10
store i32 %8, i32* %11
br label %12
12: ; preds = %6
%13 = load i32, i32* %2
%14 = add nsw i32 %13, 1
store i32 %14, i32* %2
br label %3
15: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
outasm1(ptr) char *ptr;
{
  while (outbyte1(*ptr++))
    ;
}


x86 assembly (clang, -O0):
<outasm1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%edi
mov    $0x0,%al
call   1030 <outbyte1@plt>
cmp    $0x0,%eax
je     1143 <outasm1+0x33>
jmp    111c <outasm1+0xc>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outasm1>:
push   %rbx
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl (%rbx),%edi
add    $0x1,%rbx
xor    %eax,%eax
call   1030 <outbyte1@plt>
test   %eax,%eax
jne    1120 <outasm1+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define i32 @outasm1(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %3
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
%9 = call i32 (i32, ...) bitcast (i32 (...)* @outbyte1 to i32 (i32, ...)*)(i32 %8)
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %4
br label %4
12: ; preds = %4
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @outasm1(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %4, %2 ]
%4 = getelementptr inbounds i8, i8* %3, i64 1
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = tail call i32 (i32, ...) bitcast (i32 (...)* @outbyte1 to i32 (i32, ...)*)(i32 %6)
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %2
9: ; preds = %2
ret i32 undef
}
void bar(unsigned p, unsigned a) {
  unsigned q = p + 7;
  if (a - (1U + 0x7fffffff) >= 2)
    __builtin_unreachable();
  int c = p;
  int d = p + a;
  if (c - d != -0x7fffffff - 1)
    __builtin_abort();
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x7,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x80000000,%eax
cmp    $0x2,%eax
jb     1138 <bar+0x28>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
sub    -0x14(%rbp),%eax
cmp    $0x80000000,%eax
je     115d <bar+0x4d>
call   1030 <abort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
cmp    $0x80000000,%esi
jne    1119 <bar+0x9>
ret
push   %rax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @bar(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %3
%9 = add i32 %8, 7
store i32 %9, i32* %5
%10 = load i32, i32* %4
%11 = sub i32 %10, -2147483648
%12 = icmp uge i32 %11, 2
br i1 %12, label %13, label %14
13: ; preds = %2
unreachable
14: ; preds = %2
%15 = load i32, i32* %3
store i32 %15, i32* %6
%16 = load i32, i32* %3
%17 = load i32, i32* %4
%18 = add i32 %16, %17
store i32 %18, i32* %7
%19 = load i32, i32* %6
%20 = load i32, i32* %7
%21 = sub nsw i32 %19, %20
%22 = icmp ne i32 %21, -2147483648
br i1 %22, label %23, label %24
23: ; preds = %14
unreachable
24: ; preds = %14
ret void
}

LLVM IR (-O2):
define void @bar(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, -2147483646
tail call void @llvm.assume(i1 %3)
%4 = icmp eq i32 %1, -2147483648
br i1 %4, label %6, label %5
5: ; preds = %2
tail call void @abort()
unreachable
6: ; preds = %2
ret void
}
int getNumber() { return 2; }


x86 assembly (clang, -O0):
<getNumber>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getNumber>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @getNumber() {
ret i32 2
}

LLVM IR (-O2):
define i32 @getNumber() {
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void say2(char const *s) { printf("%s\n", s); }


x86 assembly (clang, -O0):
<say2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<say2>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @say2(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @say2(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void assert(int val, const char *str, int lineno) {
  if (!val) {
    printf("ASSERT HIT @ %s: %d\n", str, lineno);
    asm volatile("mov $0xDEADBEEF, %eax");
    while (1)
      ;
  }
}


x86 assembly (clang, -O0):
<assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    114b <assert+0x3b>
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
lea    0xec6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0xdeadbeef,%eax
jmp    1146 <assert+0x36>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert>:
test   %edi,%edi
je     1115 <assert+0x5>
ret
push   %rax
lea    0xee3(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0xdeadbeef,%eax
add    $0x8,%rsp
nopl   (%rax)
jmp    1130 <assert+0x20>

LLVM IR (-O0):
@.str = [21 x i8] c"ASSERT HIT @ %s: %d\0A\00"
define void @assert(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %3
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %10, i32 %11)
br label %13
13: ; preds = %9, %13
br label %13
14: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"ASSERT HIT @ %s: %d\0A\00"
define void @assert(i32 %0, i8* %1, i32 %2) {
%4 = icmp eq i32 %0, 0
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %2)
tail call void asm sideeffect "mov $$0xDEADBEEF, %eax", "~{dirflag},~{fpsr},~{flags}"()
br label %7
7: ; preds = %5, %7
br label %7
8: ; preds = %3
ret void
}
int suite_all(struct ctest *t) {
  ((void)&(t));
  return 1;
}


x86 assembly (clang, -O0):
<suite_all>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<suite_all>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.ctest = type opaque
define i32 @suite_all(%struct.ctest* %0) {
%2 = alloca %struct.ctest*
store %struct.ctest* %0, %struct.ctest** %2
ret i32 1
}

LLVM IR (-O2):
%struct.ctest = type opaque
define i32 @suite_all(%struct.ctest* nocapture readnone %0) {
ret i32 1
}
void glwin_swap_buffers(void *voidhandle) { return; }


x86 assembly (clang, -O0):
<glwin_swap_buffers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glwin_swap_buffers>:
ret

LLVM IR (-O0):
define void @glwin_swap_buffers(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @glwin_swap_buffers(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int type1(int *, int, int);
int more(int *msgvec) { return (type1(msgvec, 1, 1)); }


x86 assembly (clang, -O0):
<more>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <type1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<more>:
mov    $0x1,%esi
mov    $0x1,%edx
jmp    1030 <type1@plt>

LLVM IR (-O0):
define i32 @more(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @type1(i32* %3, i32 1, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @more(i32* %0) {
%2 = tail call i32 @type1(i32* %0, i32 1, i32 1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ alpha_expand_prologue(int);
int main(void) {
  alpha_expand_prologue(10);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xa,%edi
call   1030 <alpha_expand_prologue@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1030 <alpha_expand_prologue@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @alpha_expand_prologue(i32 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @alpha_expand_prologue(i32 10)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void bz_internal_error(int errcode) { assert(0); }


x86 assembly (clang, -O0):
<bz_internal_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bz_internal_error>:
xor    %edi,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @bz_internal_error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @bz_internal_error(i32 %0) {
%2 = tail call i32 @assert(i32 0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ FifoProtocol_memcpy(int /*<<< orphan*/ *, void const *, int);
void inv_fifo_protocol_helper_decode_proximity_data(const void *in,
                                                    uint16_t len,
                                                    uint16_t *distance) {
  FifoProtocol_memcpy((distance), (in), (sizeof(uint16_t)));
  *distance = *distance;
  (void)len;
}


x86 assembly (clang, -O0):
<inv_fifo_protocol_helper_decode_proximity_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <FifoProtocol_memcpy@plt>
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inv_fifo_protocol_helper_decode_proximity_data>:
mov    %rdi,%rsi
mov    %rdx,%rdi
mov    $0x4,%edx
jmp    1030 <FifoProtocol_memcpy@plt>

LLVM IR (-O0):
define void @inv_fifo_protocol_helper_decode_proximity_data(i8* %0, i32 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32*, i32** %6
%8 = load i8*, i8** %4
%9 = call i32 @FifoProtocol_memcpy(i32* %7, i8* %8, i32 4)
%10 = load i32*, i32** %6
%11 = load i32, i32* %10
%12 = load i32*, i32** %6
store i32 %11, i32* %12
%13 = load i32, i32* %5
ret void
}

LLVM IR (-O2):
define void @inv_fifo_protocol_helper_decode_proximity_data(i8* %0, i32 %1, i32* %2) {
%4 = tail call i32 @FifoProtocol_memcpy(i32* %2, i8* %0, i32 4)
ret void
}
int clk_disable_before(void *privdata) {
  printk("[%s] :%s\n", __func__, privdata);
  return 0;
}


x86 assembly (clang, -O0):
<clk_disable_before>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xedc(%rip),%rsi
mov    $0x0,%al
call   1030 <printk@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clk_disable_before>:
push   %rax
mov    %rdi,%rdx
lea    0xee5(%rip),%rdi
lea    0xee8(%rip),%rsi
xor    %eax,%eax
call   1030 <printk@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"[%s] :%s\0A\00"
@__func__.clk_disable_before = [19 x i8] c"clk_disable_before\00"
define i32 @clk_disable_before(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @printk to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @__func__.clk_disable_before, i64 0, i64 0), i8* %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"[%s] :%s\0A\00"
@__func__.clk_disable_before = [19 x i8] c"clk_disable_before\00"
define i32 @clk_disable_before(i8* %0) {
%2 = tail call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @printk to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([19 x i8], [19 x i8]* @__func__.clk_disable_before, i64 0, i64 0), i8* %0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_END;
int /*<<< orphan*/ SEEK_SET;
int /*<<< orphan*/ fseek(int /*<<< orphan*/ *, int /*<<< orphan*/,
                         int /*<<< orphan*/);
int ftell(int /*<<< orphan*/ *);
int filesize(FILE *f) {
  fseek(f, 0, SEEK_END);
  int s = ftell(f);
  fseek(f, 0, SEEK_SET);
  return s;
}


x86 assembly (clang, -O0):
<filesize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
mov    -0x8(%rbp),%rdi
call   1030 <ftell@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e81(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filesize>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ebb(%rip),%rax
mov    (%rax),%edx
xor    %esi,%esi
call   1040 <fseek@plt>
mov    %rbx,%rdi
call   1030 <ftell@plt>
mov    %eax,%ebp
mov    0x2e91(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
xor    %esi,%esi
call   1040 <fseek@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i32 @filesize(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* @SEEK_END
%6 = call i32 @fseek(i32* %4, i32 0, i32 %5)
%7 = load i32*, i32** %2
%8 = call i32 @ftell(i32* %7)
store i32 %8, i32* %3
%9 = load i32*, i32** %2
%10 = load i32, i32* @SEEK_SET
%11 = call i32 @fseek(i32* %9, i32 0, i32 %10)
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
@SEEK_END = global i32 0
@SEEK_SET = global i32 0
define i32 @filesize(i32* nocapture %0) {
%2 = load i32, i32* @SEEK_END
%3 = tail call i32 @fseek(i32* %0, i32 0, i32 %2)
%4 = tail call i32 @ftell(i32* %0)
%5 = load i32, i32* @SEEK_SET
%6 = tail call i32 @fseek(i32* %0, i32 0, i32 %5)
ret i32 %4
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t getSuffix64(uint64_t *sequence, int newStartPos, int suffixStart) {
  uint64_t result = ((*sequence) << (suffixStart));
  result >>= newStartPos;
  return result;
}


x86 assembly (clang, -O0):
<getSuffix64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x14(%rbp),%eax
sar    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getSuffix64>:
mov    %edx,%ecx
mov    (%rdi),%eax
shl    %cl,%eax
mov    %esi,%ecx
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @getSuffix64(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32, i32* %6
%11 = shl i32 %9, %10
store i32 %11, i32* %7
%12 = load i32, i32* %5
%13 = load i32, i32* %7
%14 = ashr i32 %13, %12
store i32 %14, i32* %7
%15 = load i32, i32* %7
ret i32 %15
}

LLVM IR (-O2):
define i32 @getSuffix64(i32* nocapture %0, i32 %1, i32 %2) {
%4 = load i32, i32* %0
%5 = shl i32 %4, %2
%6 = ashr i32 %5, %1
ret i32 %6
}
int mainshr1(g)
int g;
{ return 2 * g; }


x86 assembly (clang, -O0):
<mainshr1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mainshr1>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @mainshr1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @mainshr1(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
/* Variables and functions */
int mdc(int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("o mdc entr 434 e 35 eh: %d", mdc(434, 35));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1b2,%edi
mov    $0x23,%esi
call   1040 <mdc@plt>
mov    %eax,%esi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1b2,%edi
mov    $0x23,%esi
call   1040 <mdc@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"o mdc entr 434 e 35 eh: %d\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @mdc(i32 434, i32 35)
%3 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [27 x i8] c"o mdc entr 434 e 35 eh: %d\00"
define i32 @main() {
%1 = tail call i32 @mdc(i32 434, i32 35)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
void initializeCero(double *array) {
  int i;
  for (i = 0; i < 2048 * 2048; i++)
    array[i] = 0.0;
}


x86 assembly (clang, -O0):
<initializeCero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x400000,-0xc(%rbp)
jge    113a <initializeCero+0x3a>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <initializeCero+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initializeCero>:
push   %rax
mov    $0x2000000,%edx
xor    %esi,%esi
call   1030 <memset@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @initializeCero(double* %0) {
%2 = alloca double*
%3 = alloca i32
store double* %0, double** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 4194304
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load double*, double** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds double, double* %8, i64 %10
store double 0.000000e+00, double* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @initializeCero(double* nocapture writeonly %0) {
%2 = bitcast double* %0 to i8*
ret void
}
int test_imm_7Euint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0x7E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Euint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0x7e,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Euint64_midword_reg>:
test   $0x7e0000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Euint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 126
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Euint64_midword_reg(i64 %0) {
%2 = and i64 %0, 8257536
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void MMX_PSLLD(int dst_reg, int src_reg) {
  addbyte(0x66);
  addbyte(0x0f);
  addbyte(0xf2);
  addbyte(0xc0 | (dst_reg << 3) | src_reg);
}


x86 assembly (clang, -O0):
<MMX_PSLLD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0xf2,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0xc0,%edi
or     -0x8(%rbp),%edi
call   1030 <addbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMX_PSLLD>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0xf2,%edi
call   1030 <addbyte@plt>
shl    $0x3,%ebp
or     %ebx,%ebp
or     $0xc0,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @MMX_PSLLD(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @addbyte(i32 102)
%6 = call i32 @addbyte(i32 15)
%7 = call i32 @addbyte(i32 242)
%8 = load i32, i32* %3
%9 = shl i32 %8, 3
%10 = or i32 192, %9
%11 = load i32, i32* %4
%12 = or i32 %10, %11
%13 = call i32 @addbyte(i32 %12)
ret void
}

LLVM IR (-O2):
define void @MMX_PSLLD(i32 %0, i32 %1) {
%3 = tail call i32 @addbyte(i32 102)
%4 = tail call i32 @addbyte(i32 15)
%5 = tail call i32 @addbyte(i32 242)
%6 = shl i32 %0, 3
%7 = or i32 %6, %1
%8 = or i32 %7, 192
%9 = tail call i32 @addbyte(i32 %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f2();
void main(void) {
  int i;
  for (i = 0; i < 10; i++)
    f2();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    113e <main+0x2e>
mov    $0x0,%al
call   1030 <f2@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <main+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <f2@plt>
xor    %eax,%eax
call   1030 <f2@plt>
xor    %eax,%eax
call   1030 <f2@plt>
xor    %eax,%eax
call   1030 <f2@plt>
xor    %eax,%eax
call   1030 <f2@plt>
xor    %eax,%eax
call   1030 <f2@plt>
xor    %eax,%eax
call   1030 <f2@plt>
xor    %eax,%eax
call   1030 <f2@plt>
xor    %eax,%eax
call   1030 <f2@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <f2@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %7, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 10
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = call i32 (...) @f2()
br label %7
7: ; preds = %5
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %2
10: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @f2()
%2 = tail call i32 (...) @f2()
%3 = tail call i32 (...) @f2()
%4 = tail call i32 (...) @f2()
%5 = tail call i32 (...) @f2()
%6 = tail call i32 (...) @f2()
%7 = tail call i32 (...) @f2()
%8 = tail call i32 (...) @f2()
%9 = tail call i32 (...) @f2()
%10 = tail call i32 (...) @f2()
ret void
}
int hexdigitp(int c) {
  int ret = 0;
  switch (c) {
  case '0':
  case '1':
  case '2':
  case '3':
  case '4':
  case '5':
  case '6':
  case '7':
  case '8':
  case '9':
  case 'A':
  case 'B':
  case 'C':
  case 'D':
  case 'E':
  case 'F':
  case 'a':
  case 'b':
  case 'c':
  case 'd':
  case 'e':
  case 'f':
    ret = 1;
    break;
  }
  return ret;
}


x86 assembly (clang, -O0):
<hexdigitp>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xffffffd0,%eax
sub    $0xa,%eax
jb     114d <hexdigitp+0x4d>
jmp    1125 <hexdigitp+0x25>
mov    -0xc(%rbp),%eax
add    $0xffffffbf,%eax
sub    $0x6,%eax
jb     114d <hexdigitp+0x4d>
jmp    1139 <hexdigitp+0x39>
mov    -0xc(%rbp),%eax
add    $0xffffff9f,%eax
sub    $0x5,%eax
ja     1154 <hexdigitp+0x54>
jmp    114d <hexdigitp+0x4d>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexdigitp>:
add    $0xffffffd0,%edi
xor    %eax,%eax
cmp    $0x36,%edi
ja     1117 <hexdigitp+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @hexdigitp(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
switch i32 %4, label %6 [
i32 48, label %5
i32 49, label %5
i32 50, label %5
i32 51, label %5
i32 52, label %5
i32 53, label %5
i32 54, label %5
i32 55, label %5
i32 56, label %5
i32 57, label %5
i32 65, label %5
i32 66, label %5
i32 67, label %5
i32 68, label %5
i32 69, label %5
i32 70, label %5
i32 97, label %5
i32 98, label %5
i32 99, label %5
i32 100, label %5
i32 101, label %5
i32 102, label %5
]
5: ; preds = %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1, %1
store i32 1, i32* %3
br label %6
6: ; preds = %1, %5
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
@switch.table.hexdigitp = [55 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1]
define i32 @hexdigitp(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 55
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [55 x i32], [55 x i32]* @switch.table.hexdigitp, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}
RCU_DEF_INIT_FUNC(user_m5_destroy, param) {}


x86 assembly (clang, -O0):
<RCU_DEF_INIT_FUNC>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RCU_DEF_INIT_FUNC>:
ret

LLVM IR (-O0):
define i32 @RCU_DEF_INIT_FUNC(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @RCU_DEF_INIT_FUNC(i32 %0, i32 %1) {
ret i32 undef
}
void __dpl_error(int errno, unsigned char critical, unsigned int line) {
  critical = (unsigned char)errno;
}


x86 assembly (clang, -O0):
<__dpl_error>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,-0x5(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dpl_error>:
ret

LLVM IR (-O0):
define void @__dpl_error(i32 %0, i8 zeroext %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i32
store i32 %0, i32* %4
store i8 %1, i8* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = trunc i32 %7 to i8
store i8 %8, i8* %5
ret void
}

LLVM IR (-O2):
define void @__dpl_error(i32 %0, i8 zeroext %1, i32 %2) {
ret void
}
const char (*f())[] { return &__func__; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@__func__.f = [2 x i8] c"f\00"
define [0 x i8]* @f() {
ret [0 x i8]* bitcast ([2 x i8]* @__func__.f to [0 x i8]*)
}

LLVM IR (-O2):
@__func__.f = [2 x i8] c"f\00"
define [0 x i8]* @f() {
ret [0 x i8]* bitcast ([2 x i8]* @__func__.f to [0 x i8]*)
}
void panel_utils_scroll_list(int numslots, int edit_pos, int *display_pos) {
  if (*display_pos > edit_pos) {
    *display_pos = edit_pos;
  } else if (edit_pos > (*display_pos + (numslots - 1))) {
    *display_pos = edit_pos - (numslots - 1);
  }
}


x86 assembly (clang, -O0):
<panel_utils_scroll_list>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
cmp    -0x8(%rbp),%eax
jle    112b <panel_utils_scroll_list+0x2b>
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
jmp    115a <panel_utils_scroll_list+0x5a>
mov    -0x8(%rbp),%eax
mov    -0x10(%rbp),%rcx
mov    (%rcx),%ecx
mov    -0x4(%rbp),%edx
sub    $0x1,%edx
add    %edx,%ecx
cmp    %ecx,%eax
jle    1155 <panel_utils_scroll_list+0x55>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
sub    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
jmp    115a <panel_utils_scroll_list+0x5a>
pop    %rbp
ret

x86 assembly (clang, -O2):
<panel_utils_scroll_list>:
mov    (%rdx),%eax
cmp    %esi,%eax
jg     1114 <panel_utils_scroll_list+0x14>
add    %edi,%eax
add    $0xffffffff,%eax
cmp    %esi,%eax
jge    1116 <panel_utils_scroll_list+0x16>
add    $0xffffffff,%edi
sub    %edi,%esi
mov    %esi,(%rdx)
ret

LLVM IR (-O0):
define void @panel_utils_scroll_list(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32*, i32** %6
%8 = load i32, i32* %7
%9 = load i32, i32* %5
%10 = icmp sgt i32 %8, %9
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32*, i32** %6
store i32 %12, i32* %13
br label %29
14: ; preds = %3
%15 = load i32, i32* %5
%16 = load i32*, i32** %6
%17 = load i32, i32* %16
%18 = load i32, i32* %4
%19 = sub nsw i32 %18, 1
%20 = add nsw i32 %17, %19
%21 = icmp sgt i32 %15, %20
br i1 %21, label %22, label %28
22: ; preds = %14
%23 = load i32, i32* %5
%24 = load i32, i32* %4
%25 = sub nsw i32 %24, 1
%26 = sub nsw i32 %23, %25
%27 = load i32*, i32** %6
store i32 %26, i32* %27
br label %28
28: ; preds = %22, %14
br label %29
29: ; preds = %28, %11
ret void
}

LLVM IR (-O2):
define void @panel_utils_scroll_list(i32 %0, i32 %1, i32* nocapture %2) {
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, %1
br i1 %5, label %12, label %6
6: ; preds = %3
%7 = add nsw i32 %0, -1
%8 = add nsw i32 %4, %7
%9 = icmp slt i32 %8, %1
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = sub nsw i32 %1, %7
br label %12
12: ; preds = %3, %10
%13 = phi i32 [ %11, %10 ], [ %1, %3 ]
store i32 %13, i32* %2
br label %14
14: ; preds = %12, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ini_getint_default(int *, char *);
int ini_getint_default_def(char *param, int def) {
  int value;
  if (!ini_getint_default(&value, param))
    return def;
  return value;
}


x86 assembly (clang, -O0):
<ini_getint_default_def>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdi
call   1030 <ini_getint_default@plt>
cmp    $0x0,%eax
jne    1140 <ini_getint_default_def+0x30>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1146 <ini_getint_default_def+0x36>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ini_getint_default_def>:
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ebx
mov    %rdi,%rsi
lea    0xc(%rsp),%rdi
call   1030 <ini_getint_default@plt>
test   %eax,%eax
je     112c <ini_getint_default_def+0x1c>
mov    0xc(%rsp),%ebx
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ini_getint_default_def(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = call i32 @ini_getint_default(i32* %6, i8* %7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %2
%11 = load i32, i32* %5
store i32 %11, i32* %3
br label %14
12: ; preds = %2
%13 = load i32, i32* %6
store i32 %13, i32* %3
br label %14
14: ; preds = %12, %10
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @ini_getint_default_def(i8* %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @ini_getint_default(i32* %3, i8* %0)
%6 = icmp eq i32 %5, 0
%7 = load i32, i32* %3
%8 = select i1 %6, i32 %1, i32 %7
ret i32 %8
}
/* Type definitions */
struct pattern {
  int dummy;
};

/* Variables and functions */
int offset(int, int /*<<< orphan*/, int, int);
int play_attack_defend_n(int, int, int, int, int, int);
int autohelperowl_attackpat45(struct pattern *patt, int transformation,
                              int move, int color, int action) {
  int a;
  (void)patt;
  (void)color;
  (void)action;
  a = offset(-1, 0, move, transformation);
  return play_attack_defend_n(color, 1, 2, move, a, a);
}


x86 assembly (clang, -O0):
<autohelperowl_attackpat45>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%edi
xor    %esi,%esi
call   1040 <offset@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%ecx
mov    -0x1c(%rbp),%r8d
mov    -0x1c(%rbp),%r9d
mov    $0x1,%esi
mov    $0x2,%edx
call   1030 <play_attack_defend_n@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<autohelperowl_attackpat45>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebx
mov    %edx,%ebp
mov    %esi,%ecx
mov    $0xffffffff,%edi
xor    %esi,%esi
call   1040 <offset@plt>
mov    %ebx,%edi
mov    $0x1,%esi
mov    $0x2,%edx
mov    %ebp,%ecx
mov    %eax,%r8d
mov    %eax,%r9d
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <play_attack_defend_n@plt>

LLVM IR (-O0):
%struct.pattern = type { i32 }
define i32 @autohelperowl_attackpat45(%struct.pattern* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.pattern*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store %struct.pattern* %0, %struct.pattern** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load %struct.pattern*, %struct.pattern** %6
%13 = load i32, i32* %9
%14 = load i32, i32* %10
%15 = load i32, i32* %8
%16 = load i32, i32* %7
%17 = call i32 @offset(i32 -1, i32 0, i32 %15, i32 %16)
store i32 %17, i32* %11
%18 = load i32, i32* %9
%19 = load i32, i32* %8
%20 = load i32, i32* %11
%21 = load i32, i32* %11
%22 = call i32 @play_attack_defend_n(i32 %18, i32 1, i32 2, i32 %19, i32 %20, i32 %21)
ret i32 %22
}

LLVM IR (-O2):
%struct.pattern = type { i32 }
define i32 @autohelperowl_attackpat45(%struct.pattern* nocapture readnone %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @offset(i32 -1, i32 0, i32 %2, i32 %1)
%7 = tail call i32 @play_attack_defend_n(i32 %3, i32 1, i32 2, i32 %2, i32 %6, i32 %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ SIG_DFL;
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
void ctrlc(int sig) {
  static int ctas;
  if (++ctas > 5)
    signal(SIGINT, SIG_DFL);
}


x86 assembly (clang, -O0):
<ctrlc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2f0b(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f02(%rip)
cmp    $0x5,%eax
jle    114a <ctrlc+0x3a>
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
mov    0x2e95(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctrlc>:
mov    0x2f16(%rip),%eax
lea    0x1(%rax),%ecx
mov    %ecx,0x2f0d(%rip)
cmp    $0x5,%eax
jl     113b <ctrlc+0x2b>
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    0x2ea4(%rip),%rax
mov    (%rax),%esi
jmp    1030 <signal@plt>
ret

LLVM IR (-O0):
@ctrlc.ctas = internal global i32 0
@SIGINT = global i32 0
@SIG_DFL = global i32 0
define void @ctrlc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @ctrlc.ctas
%4 = add nsw i32 %3, 1
store i32 %4, i32* @ctrlc.ctas
%5 = icmp sgt i32 %4, 5
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* @SIGINT
%8 = load i32, i32* @SIG_DFL
%9 = call i32 @signal(i32 %7, i32 %8)
br label %10
10: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@ctrlc.ctas = internal unnamed_addr global i32 0
@SIGINT = global i32 0
@SIG_DFL = global i32 0
define void @ctrlc(i32 %0) {
%2 = load i32, i32* @ctrlc.ctas
%3 = add nsw i32 %2, 1
store i32 %3, i32* @ctrlc.ctas
%4 = icmp sgt i32 %2, 4
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* @SIGINT
%7 = load i32, i32* @SIG_DFL
%8 = tail call i32 @signal(i32 %6, i32 %7)
br label %9
9: ; preds = %5, %1
ret void
}
void delay_one_ms(void) {
  volatile int count = 7273;
  while (count--)
    ;
}


x86 assembly (clang, -O0):
<delay_one_ms>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1c69,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     1124 <delay_one_ms+0x24>
jmp    110b <delay_one_ms+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<delay_one_ms>:
movl   $0x1c69,-0x4(%rsp)
nopl   0x0(%rax,%rax,1)
subl   $0x1,-0x4(%rsp)
jae    1110 <delay_one_ms+0x10>
ret

LLVM IR (-O0):
define void @delay_one_ms() {
%1 = alloca i32
store volatile i32 7273, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load volatile i32, i32* %1
%4 = add nsw i32 %3, -1
store volatile i32 %4, i32* %1
%5 = icmp ne i32 %3, 0
br i1 %5, label %6, label %7
6: ; preds = %2
br label %2
7: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @delay_one_ms() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 7273, i32* %1
br label %3
3: ; preds = %3, %0
%4 = load volatile i32, i32* %1
%5 = add nsw i32 %4, -1
store volatile i32 %5, i32* %1
%6 = icmp eq i32 %4, 0
br i1 %6, label %7, label %3
7: ; preds = %3
ret void
}
int test_imm_5Cint32_reg(int val) { return ((val) & (0x5C << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_5Cint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x5c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Cint32_reg>:
test   $0x5c,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Cint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 92
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_5Cint32_reg(i32 %0) {
%2 = and i32 %0, 92
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}