#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned long CANIntNumberGet(unsigned long);
int /*<<< orphan*/ IntDisable(unsigned long);
int /*<<< orphan*/ IntEnable(unsigned long);
unsigned long CANRegRead(unsigned long ulRegAddress) {
  volatile unsigned long ulDelay;
  unsigned long ulRetVal;
  unsigned long ulIntNumber;
  unsigned long ulReenableInts;
  ulIntNumber = CANIntNumberGet(ulRegAddress & 0xfffff000);
  ;
  ulReenableInts =
      (*((volatile unsigned long *)(0xE000E104))) & (1 << (ulIntNumber - 48));
  if (ulReenableInts) {
    IntDisable(ulIntNumber);
  }
  (*((volatile unsigned long *)(ulRegAddress)));
  for (ulDelay = 0; ulDelay < 5; ulDelay++) {
  }
  ulRetVal = (*((volatile unsigned long *)(ulRegAddress)));
  if (ulReenableInts) {
    IntEnable(ulIntNumber);
  }
  return (ulRetVal);
}


x86 assembly (clang, -O0):
<CANRegRead>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
movabs $0xfffff000,%rdi
and    -0x8(%rbp),%rdi
call   1050 <CANIntNumberGet@plt>
mov    %rax,-0x20(%rbp)
mov    $0xe000e104,%eax
mov    (%rax),%rax
mov    -0x20(%rbp),%rcx
sub    $0x30,%rcx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     118a <CANRegRead+0x5a>
mov    -0x20(%rbp),%rdi
call   1040 <IntDisable@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    $0x5,%rax
jae    11bd <CANRegRead+0x8d>
jmp    11ac <CANRegRead+0x7c>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1199 <CANRegRead+0x69>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     11dc <CANRegRead+0xac>
mov    -0x20(%rbp),%rdi
call   1030 <IntEnable@plt>
mov    -0x18(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CANRegRead>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%r15
and    $0xfffff000,%edi
call   1050 <CANIntNumberGet@plt>
mov    %rax,%r14
lea    -0x30(%rax),%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rbx
mov    $0xe000e104,%eax
and    (%rax),%rbx
je     1169 <CANRegRead+0x39>
mov    %r14,%rdi
call   1040 <IntDisable@plt>
mov    (%r15),%rax
movq   $0x0,0x8(%rsp)
mov    0x8(%rsp),%rax
cmp    $0x4,%rax
ja     1191 <CANRegRead+0x61>
addq   $0x1,0x8(%rsp)
mov    0x8(%rsp),%rax
cmp    $0x5,%rax
jb     1180 <CANRegRead+0x50>
mov    (%r15),%r15
test   %rbx,%rbx
je     11a1 <CANRegRead+0x71>
mov    %r14,%rdi
call   1030 <IntEnable@plt>
mov    %r15,%rax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @CANRegRead(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %2
%7 = load i64, i64* %2
%8 = and i64 %7, 4294963200
%9 = call i64 @CANIntNumberGet(i64 %8)
store i64 %9, i64* %5
%10 = load volatile i64, i64* inttoptr (i64 3758153988 to i64*)
%11 = load i64, i64* %5
%12 = sub i64 %11, 48
%13 = trunc i64 %12 to i32
%14 = shl i32 1, %13
%15 = sext i32 %14 to i64
%16 = and i64 %10, %15
store i64 %16, i64* %6
%17 = load i64, i64* %6
%18 = icmp ne i64 %17, 0
br i1 %18, label %19, label %22
19: ; preds = %1
%20 = load i64, i64* %5
%21 = call i32 @IntDisable(i64 %20)
br label %22
22: ; preds = %19, %1
%23 = load i64, i64* %2
%24 = inttoptr i64 %23 to i64*
%25 = load volatile i64, i64* %24
store volatile i64 0, i64* %3
br label %26
26: ; preds = %30, %22
%27 = load volatile i64, i64* %3
%28 = icmp ult i64 %27, 5
br i1 %28, label %29, label %33
29: ; preds = %26
br label %30
30: ; preds = %29
%31 = load volatile i64, i64* %3
%32 = add i64 %31, 1
store volatile i64 %32, i64* %3
br label %26
33: ; preds = %26
%34 = load i64, i64* %2
%35 = inttoptr i64 %34 to i64*
%36 = load volatile i64, i64* %35
store i64 %36, i64* %4
%37 = load i64, i64* %6
%38 = icmp ne i64 %37, 0
br i1 %38, label %39, label %42
39: ; preds = %33
%40 = load i64, i64* %5
%41 = call i32 @IntEnable(i64 %40)
br label %42
42: ; preds = %39, %33
%43 = load i64, i64* %4
ret i64 %43
}

LLVM IR (-O2):
define i64 @CANRegRead(i64 %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = and i64 %0, 4294963200
%5 = tail call i64 @CANIntNumberGet(i64 %4)
%6 = load volatile i64, i64* inttoptr (i64 3758153988 to i64*)
%7 = trunc i64 %5 to i32
%8 = add i32 %7, -48
%9 = shl nuw i32 1, %8
%10 = sext i32 %9 to i64
%11 = and i64 %6, %10
%12 = icmp eq i64 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %1
%14 = tail call i32 @IntDisable(i64 %5)
br label %15
15: ; preds = %13, %1
%16 = inttoptr i64 %0 to i64*
%17 = load volatile i64, i64* %16
store volatile i64 0, i64* %2
%18 = load volatile i64, i64* %2
%19 = icmp ult i64 %18, 5
br i1 %19, label %20, label %25
20: ; preds = %15, %20
%21 = load volatile i64, i64* %2
%22 = add i64 %21, 1
store volatile i64 %22, i64* %2
%23 = load volatile i64, i64* %2
%24 = icmp ult i64 %23, 5
br i1 %24, label %20, label %25
25: ; preds = %20, %15
%26 = load volatile i64, i64* %16
br i1 %12, label %29, label %27
27: ; preds = %25
%28 = tail call i32 @IntEnable(i64 %5)
br label %29
29: ; preds = %27, %25
ret i64 %26
}