xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ simpleudp_init_commands();
void network_before_start() { simpleudp_init_commands(); }


x86 assembly (clang, -O0):
<network_before_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <simpleudp_init_commands@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<network_before_start>:
xor    %eax,%eax
jmp    1030 <simpleudp_init_commands@plt>

LLVM IR (-O0):
define void @network_before_start() {
%1 = call i32 (...) @simpleudp_init_commands()
ret void
}

LLVM IR (-O2):
define void @network_before_start() {
%1 = tail call i32 (...) @simpleudp_init_commands()
ret void
}
int adis16400_probe_trigger(struct iio_dev *indio_dev) { return 0; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define i32 @adis16400_probe_trigger(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define i32 @adis16400_probe_trigger(%struct.iio_dev* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ a();
int /*<<< orphan*/ b();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("before a()\n");
  a();
  printf("before b()\n");
  b();
  printf("after b()\n");
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xea3(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <a@plt>
lea    0xe9c(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <b@plt>
lea    0xe95(%rip),%rdi
call   1040 <printf@plt>
mov    0x2e51(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1050 <a@plt>
lea    0xeb0(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <b@plt>
lea    0xea8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e66(%rip),%rax
mov    (%rax),%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"before a()\0A\00"
@.str.1 = [12 x i8] c"before b()\0A\00"
@.str.2 = [11 x i8] c"after b()\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%7 = call i32 (...) @a()
%8 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0))
%9 = call i32 (...) @b()
%10 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0))
%11 = load i32, i32* @EXIT_SUCCESS
%12 = call i32 @exit(i32 %11)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
@str = [11 x i8] c"before a()\00"
@str.3 = [11 x i8] c"before b()\00"
@str.4 = [10 x i8] c"after b()\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 (...) @a()
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str.3, i64 0, i64 0))
%6 = tail call i32 (...) @b()
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str.4, i64 0, i64 0))
%8 = load i32, i32* @EXIT_SUCCESS
%9 = tail call i32 @exit(i32 %8)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ GPTLerror(char *, char const *);
double utr_mpiwtime() {
  static const char *thisfunc = "utr_mpiwtime";
  (void)GPTLerror("%s: not enabled\n", thisfunc);
  return -1.;
}


x86 assembly (clang, -O0):
<utr_mpiwtime>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f0d(%rip),%rsi
lea    0xef3(%rip),%rdi
call   1030 <GPTLerror@plt>
movsd  0xed1(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<utr_mpiwtime>:
push   %rax
lea    0xefd(%rip),%rdi
lea    0xee9(%rip),%rsi
call   1030 <GPTLerror@plt>
movsd  0xed4(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@utr_mpiwtime.thisfunc = internal global i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i32 0, i32 0)
@.str = [13 x i8] c"utr_mpiwtime\00"
@.str.1 = [17 x i8] c"%s: not enabled\0A\00"
define double @utr_mpiwtime() {
%1 = load i8*, i8** @utr_mpiwtime.thisfunc
%2 = call i32 @GPTLerror(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8* %1)
ret double -1.000000e+00
}

LLVM IR (-O2):
@.str = [13 x i8] c"utr_mpiwtime\00"
@.str.1 = [17 x i8] c"%s: not enabled\0A\00"
define double @utr_mpiwtime() {
%1 = tail call i32 @GPTLerror(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret double -1.000000e+00
}
/* Variables and functions */
uintptr_t atomic_read(void *addr) { return *((uintptr_t *)addr); }


x86 assembly (clang, -O0):
<atomic_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_read>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
define i64 @atomic_read(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i64*
%5 = load i64, i64* %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @atomic_read(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ qsort(void *, size_t, size_t,
                         int (*)(void const *, void const *));
void sort(void *base, size_t num, size_t size,
          int (*cmp)(const void *, const void *),
          void (*swap)(void *, void *, int)) {
  qsort(base, num, size, cmp);
}


x86 assembly (clang, -O0):
<sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <qsort@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort>:
jmp    1030 <qsort@plt>

LLVM IR (-O0):
define void @sort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3, void (i8*, i8*, i32)* %4) {
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i32 (i8*, i8*)*
%10 = alloca void (i8*, i8*, i32)*
store i8* %0, i8** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i32 (i8*, i8*)* %3, i32 (i8*, i8*)** %9
store void (i8*, i8*, i32)* %4, void (i8*, i8*, i32)** %10
%11 = load i8*, i8** %6
%12 = load i64, i64* %7
%13 = load i64, i64* %8
%14 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %9
%15 = call i32 @qsort(i8* %11, i64 %12, i64 %13, i32 (i8*, i8*)* %14)
ret void
}

LLVM IR (-O2):
define void @sort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* nocapture %3, void (i8*, i8*, i32)* nocapture readnone %4) {
%6 = tail call i32 @qsort(i8* %0, i64 %1, i64 %2, i32 (i8*, i8*)* %3)
ret void
}
__float128 plm_Plm(int l, int m, __float128 x) {
  int sign;
  __float128 value = plm_lnPlm(l, m, x, &sign);
  return sign * expq(value);
}


x86 assembly (clang, -O0):
<plm_Plm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movaps %xmm0,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
movaps -0x20(%rbp),%xmm0
lea    -0x24(%rbp),%rdx
mov    $0x1,%al
mov    %al,-0x45(%rbp)
call   1030 <plm_lnPlm@plt>
mov    %eax,%edi
call   1180 <__floatsitf>
mov    -0x45(%rbp),%al
movaps %xmm0,-0x40(%rbp)
mov    -0x24(%rbp),%ecx
mov    %ecx,-0x44(%rbp)
movaps -0x40(%rbp),%xmm0
call   1040 <expq@plt>
mov    -0x44(%rbp),%edi
imul   %eax,%edi
call   1180 <__floatsitf>
add    $0x50,%rsp
pop    %rbp
ret
nopl   0x0(%rax,%rax,1)

x86 assembly (clang, -O2):
<plm_Plm>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rdx
mov    $0x1,%al
call   1030 <plm_lnPlm@plt>
mov    %eax,%edi
call   1160 <__floatsitf>
mov    0xc(%rsp),%ebx
mov    $0x1,%al
call   1040 <expq@plt>
imul   %eax,%ebx
mov    %ebx,%edi
call   1160 <__floatsitf>
add    $0x10,%rsp
pop    %rbx
ret
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)

LLVM IR (-O0):
define fp128 @plm_Plm(i32 %0, i32 %1, fp128 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca fp128
%7 = alloca i32
%8 = alloca fp128
store i32 %0, i32* %4
store i32 %1, i32* %5
store fp128 %2, fp128* %6
%9 = load i32, i32* %4
%10 = load i32, i32* %5
%11 = load fp128, fp128* %6
%12 = call i32 (i32, i32, fp128, i32*, ...) bitcast (i32 (...)* @plm_lnPlm to i32 (i32, i32, fp128, i32*, ...)*)(i32 %9, i32 %10, fp128 %11, i32* %7)
%13 = sitofp i32 %12 to fp128
store fp128 %13, fp128* %8
%14 = load i32, i32* %7
%15 = load fp128, fp128* %8
%16 = call i32 (fp128, ...) bitcast (i32 (...)* @expq to i32 (fp128, ...)*)(fp128 %15)
%17 = mul nsw i32 %14, %16
%18 = sitofp i32 %17 to fp128
ret fp128 %18
}

LLVM IR (-O2):
define fp128 @plm_Plm(i32 %0, i32 %1, fp128 %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
%6 = call i32 (i32, i32, fp128, i32*, ...) bitcast (i32 (...)* @plm_lnPlm to i32 (i32, i32, fp128, i32*, ...)*)(i32 %0, i32 %1, fp128 %2, i32* %4)
%7 = sitofp i32 %6 to fp128
%8 = load i32, i32* %4
%9 = call i32 (fp128, ...) bitcast (i32 (...)* @expq to i32 (fp128, ...)*)(fp128 %7)
%10 = mul nsw i32 %9, %8
%11 = sitofp i32 %10 to fp128
ret fp128 %11
}
void test_assertions_setup(struct mu_test_desc *desc) {}


x86 assembly (clang, -O0):
<test_assertions_setup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_assertions_setup>:
ret

LLVM IR (-O0):
%struct.mu_test_desc = type opaque
define void @test_assertions_setup(%struct.mu_test_desc* %0) {
%2 = alloca %struct.mu_test_desc*
store %struct.mu_test_desc* %0, %struct.mu_test_desc** %2
ret void
}

LLVM IR (-O2):
%struct.mu_test_desc = type opaque
define void @test_assertions_setup(%struct.mu_test_desc* nocapture %0) {
ret void
}
/* Type definitions */
struct sysrq_key_op {
  int dummy;
};

/* Variables and functions */
int EINVAL;
int unregister_sysrq_key(int key, const struct sysrq_key_op *op) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<unregister_sysrq_key>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecc(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unregister_sysrq_key>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.sysrq_key_op = type { i32 }
@EINVAL = global i32 0
define i32 @unregister_sysrq_key(i32 %0, %struct.sysrq_key_op* %1) {
%3 = alloca i32
%4 = alloca %struct.sysrq_key_op*
store i32 %0, i32* %3
store %struct.sysrq_key_op* %1, %struct.sysrq_key_op** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
%struct.sysrq_key_op = type { i32 }
@EINVAL = global i32 0
define i32 @unregister_sysrq_key(i32 %0, %struct.sysrq_key_op* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char const *);
void ExitMessage(const char *m) {
  printf("Error: %s\n", m);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<ExitMessage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<ExitMessage>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Error: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @ExitMessage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@.str = [11 x i8] c"Error: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @ExitMessage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Variables and functions */
int command(int, int, unsigned int);
int gpio_set(unsigned int pin) { return command(1, 2, pin); }


x86 assembly (clang, -O0):
<gpio_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
mov    $0x1,%edi
mov    $0x2,%esi
call   1030 <command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_set>:
mov    %edi,%edx
mov    $0x1,%edi
mov    $0x2,%esi
jmp    1030 <command@plt>

LLVM IR (-O0):
define i32 @gpio_set(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @command(i32 1, i32 2, i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @gpio_set(i32 %0) {
%2 = tail call i32 @command(i32 1, i32 2, i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_timeval_sub() {
  printf("NOT IMPLEMENTED:"
         "pa_timeval_sub"
         "\n");
}


x86 assembly (clang, -O0):
<pa_timeval_sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_timeval_sub>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"NOT IMPLEMENTED:pa_timeval_sub\0A\00"
define i32 @pa_timeval_sub() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [31 x i8] c"NOT IMPLEMENTED:pa_timeval_sub\00"
define i32 @pa_timeval_sub() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
struct codec {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
ssize_t null_delay(struct codec *c) { return 0; }


x86 assembly (clang, -O0):
<null_delay>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<null_delay>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.codec = type { i32 }
define i32 @null_delay(%struct.codec* %0) {
%2 = alloca %struct.codec*
store %struct.codec* %0, %struct.codec** %2
ret i32 0
}

LLVM IR (-O2):
%struct.codec = type { i32 }
define i32 @null_delay(%struct.codec* nocapture readnone %0) {
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int type;
};
struct TYPE_4__ {
  TYPE_1__ xmotion;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xmotion_type(void *_p, int _v) {
  ((XEvent *)_p)->xmotion.type = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xmotion_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xmotion_type>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xmotion_type(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xmotion_type(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
void *malloc(int);
int main() { void *v = malloc(1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i8*
%2 = call i8* @malloc(i32 1)
store i8* %2, i8** %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void BootComUartInit(void) {
  unsigned long baud_reg_value;
  (*((volatile unsigned long *)0xE002C000)) |= 0x05;
  (*((volatile unsigned char *)0xE000C004)) = 0;
  (*((volatile unsigned char *)0xE000C008)) = 0;
  (*((volatile unsigned char *)0xE000C014)) = 0;
  (*((volatile unsigned char *)0xE000C00C)) = (0x80);
  baud_reg_value = ((((60000) * 1000 / 16) + (((57600) + 1) / 2)) / (57600));
  (*((volatile unsigned char *)0xE000C000)) = (unsigned char)baud_reg_value;
  (*((volatile unsigned char *)0xE000C004)) =
      (unsigned char)(baud_reg_value >> 8);
  (*((volatile unsigned char *)0xE000C00C)) = (0x03);
  (*((volatile unsigned char *)0xE000C008)) = (0x07);
}


x86 assembly (clang, -O0):
<BootComUartInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe002c000,%eax
mov    (%rax),%rcx
or     $0x5,%rcx
mov    $0xe002c000,%eax
mov    %rcx,(%rax)
mov    $0xe000c004,%eax
movb   $0x0,(%rax)
mov    $0xe000c008,%eax
movb   $0x0,(%rax)
mov    $0xe000c014,%eax
movb   $0x0,(%rax)
mov    $0xe000c00c,%eax
movb   $0x80,(%rax)
movq   $0x41,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %al,%cl
mov    $0xe000c000,%eax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
mov    %al,%cl
mov    $0xe000c004,%eax
mov    %cl,(%rax)
mov    $0xe000c00c,%eax
movb   $0x3,(%rax)
mov    $0xe000c008,%eax
movb   $0x7,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<BootComUartInit>:
mov    $0xe000c004,%eax
orq    $0x5,0x1fffc(%rax)
05
movb   $0x0,(%rax)
movb   $0x0,0x4(%rax)
movb   $0x0,0x10(%rax)
movb   $0x80,0x8(%rax)
movb   $0x41,-0x4(%rax)
movb   $0x0,(%rax)
movb   $0x3,0x8(%rax)
movb   $0x7,0x4(%rax)
ret

LLVM IR (-O0):
define void @BootComUartInit() {
%1 = alloca i64
%2 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%3 = or i64 %2, 5
store volatile i64 %3, i64* inttoptr (i64 3758276608 to i64*)
store volatile i8 0, i8* inttoptr (i64 3758145540 to i8*)
store volatile i8 0, i8* inttoptr (i64 3758145544 to i8*)
store volatile i8 0, i8* inttoptr (i64 3758145556 to i8*)
store volatile i8 -128, i8* inttoptr (i64 3758145548 to i8*)
store i64 65, i64* %1
%4 = load i64, i64* %1
%5 = trunc i64 %4 to i8
store volatile i8 %5, i8* inttoptr (i64 3758145536 to i8*)
%6 = load i64, i64* %1
%7 = lshr i64 %6, 8
%8 = trunc i64 %7 to i8
store volatile i8 %8, i8* inttoptr (i64 3758145540 to i8*)
store volatile i8 3, i8* inttoptr (i64 3758145548 to i8*)
store volatile i8 7, i8* inttoptr (i64 3758145544 to i8*)
ret void
}

LLVM IR (-O2):
define void @BootComUartInit() {
%1 = load volatile i64, i64* inttoptr (i64 3758276608 to i64*)
%2 = or i64 %1, 5
store volatile i64 %2, i64* inttoptr (i64 3758276608 to i64*)
store volatile i8 0, i8* inttoptr (i64 3758145540 to i8*)
store volatile i8 0, i8* inttoptr (i64 3758145544 to i8*)
store volatile i8 0, i8* inttoptr (i64 3758145556 to i8*)
store volatile i8 -128, i8* inttoptr (i64 3758145548 to i8*)
store volatile i8 65, i8* inttoptr (i64 3758145536 to i8*)
store volatile i8 0, i8* inttoptr (i64 3758145540 to i8*)
store volatile i8 3, i8* inttoptr (i64 3758145548 to i8*)
store volatile i8 7, i8* inttoptr (i64 3758145544 to i8*)
ret void
}
/* Variables and functions */
double fabs(double);
int compare(double x, double y, double eps) {
  double dx = x - y;
  if (fabs(dx) < eps)
    return 0;
  return dx > 0 ? 1 : -1;
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  %xmm2,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
subsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm1
movaps 0xed2(%rip),%xmm0
pand   %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    114d <compare+0x4d>
movl   $0x0,-0x4(%rbp)
jmp    1169 <compare+0x69>
movsd  -0x28(%rbp),%xmm0
xorps  %xmm1,%xmm1
mov    $0xffffffff,%eax
mov    $0x1,%ecx
ucomisd %xmm1,%xmm0
cmova  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
subsd  %xmm1,%xmm0
movapd 0xef4(%rip),%xmm1
xorpd  %xmm3,%xmm3
xor    %eax,%eax
ucomisd %xmm3,%xmm0
seta   %al
andpd  %xmm0,%xmm1
xor    %ecx,%ecx
ucomisd %xmm1,%xmm2
lea    -0x1(%rax,%rax,1),%eax
cmova  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare(double %0, double %1, double %2) {
%4 = alloca i32
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
%9 = load double, double* %5
%10 = load double, double* %6
%11 = fsub double %9, %10
store double %11, double* %8
%12 = load double, double* %8
%13 = call double @llvm.fabs.f64(double %12)
%14 = load double, double* %7
%15 = fcmp olt double %13, %14
br i1 %15, label %16, label %17
16: ; preds = %3
store i32 0, i32* %4
br label %22
17: ; preds = %3
%18 = load double, double* %8
%19 = fcmp ogt double %18, 0.000000e+00
%20 = zext i1 %19 to i64
%21 = select i1 %19, i32 1, i32 -1
store i32 %21, i32* %4
br label %22
22: ; preds = %17, %16
%23 = load i32, i32* %4
ret i32 %23
}

LLVM IR (-O2):
define i32 @compare(double %0, double %1, double %2) {
%4 = fsub double %0, %1
%5 = tail call double @llvm.fabs.f64(double %4)
%6 = fcmp olt double %5, %2
%7 = fcmp ogt double %4, 0.000000e+00
%8 = select i1 %7, i32 1, i32 -1
%9 = select i1 %6, i32 0, i32 %8
ret i32 %9
}
void RTVfsNewFile(void) {}


x86 assembly (clang, -O0):
<RTVfsNewFile>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTVfsNewFile>:
ret

LLVM IR (-O0):
define void @RTVfsNewFile() {
ret void
}

LLVM IR (-O2):
define void @RTVfsNewFile() {
ret void
}
void ft_get_values(int *data, int *nb, int *power, int *actual) {
  *nb = data[0];
  *power = data[1];
  *actual = data[2];
}


x86 assembly (clang, -O0):
<ft_get_values>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_get_values>:
mov    (%rdi),%eax
mov    %eax,(%rsi)
mov    0x4(%rdi),%eax
mov    %eax,(%rdx)
mov    0x8(%rdi),%eax
mov    %eax,(%rcx)
ret

LLVM IR (-O0):
define void @ft_get_values(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = getelementptr inbounds i32, i32* %9, i64 0
%11 = load i32, i32* %10
%12 = load i32*, i32** %6
store i32 %11, i32* %12
%13 = load i32*, i32** %5
%14 = getelementptr inbounds i32, i32* %13, i64 1
%15 = load i32, i32* %14
%16 = load i32*, i32** %7
store i32 %15, i32* %16
%17 = load i32*, i32** %5
%18 = getelementptr inbounds i32, i32* %17, i64 2
%19 = load i32, i32* %18
%20 = load i32*, i32** %8
store i32 %19, i32* %20
ret void
}

LLVM IR (-O2):
define void @ft_get_values(i32* nocapture %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = load i32, i32* %0
store i32 %5, i32* %1
%6 = getelementptr inbounds i32, i32* %0, i64 1
%7 = load i32, i32* %6
store i32 %7, i32* %2
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
store i32 %9, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(void const *);
int object_class_is_a(int /*<<< orphan*/, void const *);
int /*<<< orphan*/ object_get_class(void const *);
bool object_is_a(const void *object, const void *name) {
  assert(object);
  return object_class_is_a(object_get_class(object), name);
}


x86 assembly (clang, -O0):
<object_is_a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1050 <object_get_class@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rsi
call   1030 <object_class_is_a@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<object_is_a>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <assert@plt>
mov    %rbx,%rdi
call   1050 <object_get_class@plt>
mov    %eax,%edi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <object_class_is_a@plt>

LLVM IR (-O0):
define i32 @object_is_a(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @assert(i8* %5)
%7 = load i8*, i8** %3
%8 = call i32 @object_get_class(i8* %7)
%9 = load i8*, i8** %4
%10 = call i32 @object_class_is_a(i32 %8, i8* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @object_is_a(i8* %0, i8* %1) {
%3 = tail call i32 @assert(i8* %0)
%4 = tail call i32 @object_get_class(i8* %0)
%5 = tail call i32 @object_class_is_a(i32 %4, i8* %1)
ret i32 %5
}
int reverse(int x) {
  long long r = 0;
  while (x) {
    r = r * 10 + x % 10;
    x /= 10;
  }
  return r > ((int)((unsigned int)-1 >> 1)) ||
                 r < -((int)((unsigned int)-1 >> 1)) - 1
             ? 0
             : r;
}


x86 assembly (clang, -O0):
<reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     114e <reverse+0x4e>
imul   $0xa,-0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x18(%rbp),%rax
movslq %edx,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110f <reverse+0xf>
cmpq   $0x7fffffff,-0x10(%rbp)
7f
jg     116a <reverse+0x6a>
cmpq   $0xffffffff80000000,-0x10(%rbp)
80
jge    1175 <reverse+0x75>
xor    %eax,%eax
mov    %rax,-0x20(%rbp)
jmp    117d <reverse+0x7d>
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse>:
xor    %r8d,%r8d
xor    %edx,%edx
test   %edi,%edi
je     1144 <reverse+0x44>
nopl   0x0(%rax)
lea    (%rdx,%rdx,4),%rax
movslq %edi,%rsi
imul   $0x66666667,%rsi,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
lea    (%rdi,%rdi,1),%edx
lea    (%rdx,%rdx,4),%edx
mov    %esi,%ecx
sub    %edx,%ecx
movslq %ecx,%rcx
lea    (%rcx,%rax,2),%rdx
add    $0x9,%esi
cmp    $0x12,%esi
ja     1110 <reverse+0x10>
movslq %edx,%rax
cmp    %rdx,%rax
cmovne %r8d,%eax
ret

LLVM IR (-O0):
define i32 @reverse(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
store i64 0, i64* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %4
%8 = load i64, i64* %3
%9 = mul nsw i64 %8, 10
%10 = load i32, i32* %2
%11 = srem i32 %10, 10
%12 = sext i32 %11 to i64
%13 = add nsw i64 %9, %12
store i64 %13, i64* %3
%14 = load i32, i32* %2
%15 = sdiv i32 %14, 10
store i32 %15, i32* %2
br label %4
16: ; preds = %4
%17 = load i64, i64* %3
%18 = icmp sgt i64 %17, 2147483647
br i1 %18, label %22, label %19
19: ; preds = %16
%20 = load i64, i64* %3
%21 = icmp slt i64 %20, -2147483648
br i1 %21, label %22, label %23
22: ; preds = %19, %16
br label %25
23: ; preds = %19
%24 = load i64, i64* %3
br label %25
25: ; preds = %23, %22
%26 = phi i64 [ 0, %22 ], [ %24, %23 ]
%27 = trunc i64 %26 to i32
ret i32 %27
}

LLVM IR (-O2):
define i32 @reverse(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %9, %3 ], [ 0, %1 ]
%5 = phi i32 [ %10, %3 ], [ %0, %1 ]
%6 = mul nsw i64 %4, 10
%7 = srem i32 %5, 10
%8 = sext i32 %7 to i64
%9 = add nsw i64 %6, %8
%10 = sdiv i32 %5, 10
%11 = add i32 %5, 9
%12 = icmp ult i32 %11, 19
br i1 %12, label %13, label %3
13: ; preds = %3, %1
%14 = phi i64 [ 0, %1 ], [ %9, %3 ]
%15 = add i64 %14, -2147483648
%16 = icmp ult i64 %15, -4294967296
%17 = trunc i64 %14 to i32
%18 = select i1 %16, i32 0, i32 %17
ret i32 %18
}
/* Variables and functions */
char *gs_ltrim(int /*<<< orphan*/);
int /*<<< orphan*/ gs_rtrim(char *);
char *gs_trim(char *str) { return gs_ltrim(gs_rtrim(str)); }


x86 assembly (clang, -O0):
<gs_trim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <gs_rtrim@plt>
mov    %eax,%edi
call   1030 <gs_ltrim@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gs_trim>:
push   %rax
call   1040 <gs_rtrim@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <gs_ltrim@plt>

LLVM IR (-O0):
define i8* @gs_trim(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @gs_rtrim(i8* %3)
%5 = call i8* @gs_ltrim(i32 %4)
ret i8* %5
}

LLVM IR (-O2):
define i8* @gs_trim(i8* %0) {
%2 = tail call i32 @gs_rtrim(i8* %0)
%3 = tail call i8* @gs_ltrim(i32 %2)
ret i8* %3
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int sd_event_get_exit_code(void *e,
                                                                  int *code) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_event_get_exit_code>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
mov    0x2ecb(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_event_get_exit_code>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_event_get_exit_code(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i32, i32* @EINVAL
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_event_get_exit_code(i8* nocapture readnone %0, i32* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void volatile_fetch_sub_u32(uint32_t *dest, uint32_t val) {
  *((volatile uint32_t *)dest) -= val;
}


x86 assembly (clang, -O0):
<volatile_fetch_sub_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
sub    %rdx,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<volatile_fetch_sub_u32>:
sub    %rsi,(%rdi)
ret

LLVM IR (-O0):
define void @volatile_fetch_sub_u32(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64*, i64** %3
%7 = load volatile i64, i64* %6
%8 = sub nsw i64 %7, %5
store volatile i64 %8, i64* %6
ret void
}

LLVM IR (-O2):
define void @volatile_fetch_sub_u32(i64* %0, i64 %1) {
%3 = load volatile i64, i64* %0
%4 = sub nsw i64 %3, %1
store volatile i64 %4, i64* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_NONBLOCK;
int /*<<< orphan*/ clr_fl(int, int /*<<< orphan*/);
void set_block(int fd) { clr_fl(fd, O_NONBLOCK); }


x86 assembly (clang, -O0):
<set_block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ec3(%rip),%rax
mov    (%rax),%esi
call   1030 <clr_fl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_block>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <clr_fl@plt>

LLVM IR (-O0):
@O_NONBLOCK = global i32 0
define void @set_block(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @O_NONBLOCK
%5 = call i32 @clr_fl(i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@O_NONBLOCK = global i32 0
define void @set_block(i32 %0) {
%2 = load i32, i32* @O_NONBLOCK
%3 = tail call i32 @clr_fl(i32 %0, i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ atoi(char *);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ is_kernel_thread(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  if (argc != 2) {
    printf("usage %s pid\n", argv[0]);
    exit(-1);
  }
  is_kernel_thread(atoi(argv[1]));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x4(%rbp)
je     1176 <main+0x36>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xe99(%rip),%rdi
call   1040 <printf@plt>
mov    $0xffffffff,%edi
call   1060 <exit@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1050 <atoi@plt>
mov    %eax,%edi
call   1030 <is_kernel_thread@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jne    115a <main+0x1a>
mov    0x8(%rsi),%rdi
call   1050 <atoi@plt>
mov    %eax,%edi
call   1030 <is_kernel_thread@plt>
xor    %eax,%eax
pop    %rcx
ret
mov    (%rsi),%rsi
lea    0xe9c(%rip),%rdi
call   1040 <printf@plt>
mov    $0xffffffff,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"usage %s pid\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 2
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = load i8**, i8*** %4
%9 = getelementptr inbounds i8*, i8** %8, i64 0
%10 = load i8*, i8** %9
%11 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %10)
%12 = call i32 @exit(i32 -1)
unreachable
13: ; preds = %2
%14 = load i8**, i8*** %4
%15 = getelementptr inbounds i8*, i8** %14, i64 1
%16 = load i8*, i8** %15
%17 = call i32 @atoi(i8* %16)
%18 = call i32 @is_kernel_thread(i32 %17)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"usage %s pid\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = tail call i32 @exit(i32 -1)
unreachable
8: ; preds = %2
%9 = getelementptr inbounds i8*, i8** %1, i64 1
%10 = load i8*, i8** %9
%11 = tail call i32 @atoi(i8* %10)
%12 = tail call i32 @is_kernel_thread(i32 %11)
ret i32 0
}
void sh_mobile_meram_cache_free(struct sh_mobile_meram_info *dev, void *data) {}


x86 assembly (clang, -O0):
<sh_mobile_meram_cache_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sh_mobile_meram_cache_free>:
ret

LLVM IR (-O0):
%struct.sh_mobile_meram_info = type opaque
define void @sh_mobile_meram_cache_free(%struct.sh_mobile_meram_info* %0, i8* %1) {
%3 = alloca %struct.sh_mobile_meram_info*
%4 = alloca i8*
store %struct.sh_mobile_meram_info* %0, %struct.sh_mobile_meram_info** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.sh_mobile_meram_info = type opaque
define void @sh_mobile_meram_cache_free(%struct.sh_mobile_meram_info* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char *);
void ecrire_chaine_ascii(FILE *handle, char *chaine) {
  fprintf(handle, "\"%s\"\n", chaine);
}


x86 assembly (clang, -O0):
<ecrire_chaine_ascii>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecrire_chaine_ascii>:
mov    %rsi,%rdx
lea    0xee6(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\22%s\22\0A\00"
define void @ecrire_chaine_ascii(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\22%s\22\0A\00"
define void @ecrire_chaine_ascii(i32* nocapture %0, i8* %1) {
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
stty(fildes, arg) char *arg;
{ return ioctl(fildes, ('t' << 8) | 9, arg); }


x86 assembly (clang, -O0):
<stty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    $0x7409,%esi
mov    $0x0,%al
call   1030 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stty>:
mov    %rsi,%rdx
mov    $0x7409,%esi
xor    %eax,%eax
jmp    1030 <ioctl@plt>

LLVM IR (-O0):
define i32 @stty(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 (i32, i32, i8*, ...) bitcast (i32 (...)* @ioctl to i32 (i32, i32, i8*, ...)*)(i32 %5, i32 29705, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @stty(i32 %0, i8* %1) {
%3 = tail call i32 (i32, i32, i8*, ...) bitcast (i32 (...)* @ioctl to i32 (i32, i32, i8*, ...)*)(i32 %0, i32 29705, i8* %1)
ret i32 %3
}
void g_queue_new() {}


x86 assembly (clang, -O0):
<g_queue_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_queue_new>:
ret

LLVM IR (-O0):
define void @g_queue_new() {
ret void
}

LLVM IR (-O2):
define void @g_queue_new() {
ret void
}
long long ruleOne(long long x) {
  x = x / 2;
  return x;
}


x86 assembly (clang, -O0):
<ruleOne>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x2,%ecx
cqto
idiv   %rcx
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ruleOne>:
mov    %rdi,%rax
shr    $0x3f,%rax
add    %rdi,%rax
sar    %rax
ret

LLVM IR (-O0):
define i64 @ruleOne(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sdiv i64 %3, 2
store i64 %4, i64* %2
%5 = load i64, i64* %2
ret i64 %5
}

LLVM IR (-O2):
define i64 @ruleOne(i64 %0) {
%2 = sdiv i64 %0, 2
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ usleep(int);
void jm_sleep(int millisec) { usleep(millisec * 1000); }


x86 assembly (clang, -O0):
<jm_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jm_sleep>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @jm_sleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @jm_sleep(i32 %0) {
%2 = mul nsw i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
void NV12ToRGB565() {}


x86 assembly (clang, -O0):
<NV12ToRGB565>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NV12ToRGB565>:
ret

LLVM IR (-O0):
define void @NV12ToRGB565() {
ret void
}

LLVM IR (-O2):
define void @NV12ToRGB565() {
ret void
}
/* Variables and functions */
scalar_t__ isspace(char);
void fix(char *p) {
  while (*p) {
    if (isspace(*p))
      *p = '_';
    p++;
  }
}


x86 assembly (clang, -O0):
<fix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1157 <fix+0x47>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     1146 <fix+0x36>
mov    -0x8(%rbp),%rax
movb   $0x5f,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <fix+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fix>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     113e <fix+0x2e>
mov    %rdi,%rbx
add    $0x1,%rbx
jmp    112b <fix+0x1b>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
je     113e <fix+0x2e>
movsbl %al,%edi
call   1030 <isspace@plt>
test   %rax,%rax
je     1120 <fix+0x10>
movb   $0x5f,-0x1(%rbx)
jmp    1120 <fix+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @fix(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %14, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call i64 @isspace(i8 signext %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %7
%13 = load i8*, i8** %2
store i8 95, i8* %13
br label %14
14: ; preds = %12, %7
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %2
br label %3
17: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @fix(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %10
%5 = phi i8 [ %12, %10 ], [ %2, %1 ]
%6 = phi i8* [ %11, %10 ], [ %0, %1 ]
%7 = tail call i64 @isspace(i8 signext %5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %4
store i8 95, i8* %6
br label %10
10: ; preds = %9, %4
%11 = getelementptr inbounds i8, i8* %6, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %10, %1
ret void
}
/* Variables and functions */
scalar_t__ ceil(float);
scalar_t__ floor(float);
int roundToInteger(float num) {
  int out;
  int itg;
  float dec;
  itg = (int)num;
  dec = num - itg;
  if (dec <= 0.5)
    out = (int)floor(num);
  else
    out = (int)ceil(num);
  return out;
}


x86 assembly (clang, -O0):
<roundToInteger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
cvttss2si -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
cvtsi2ssl -0xc(%rbp),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xea7(%rip),%xmm0
ucomisd %xmm1,%xmm0
jb     1175 <roundToInteger+0x55>
movss  -0x4(%rbp),%xmm0
call   1040 <floor@plt>
mov    %eax,-0x8(%rbp)
jmp    1182 <roundToInteger+0x62>
movss  -0x4(%rbp),%xmm0
call   1030 <ceil@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roundToInteger>:
push   %rax
cvttps2dq %xmm0,%xmm1
cvtdq2ps %xmm1,%xmm1
movaps %xmm0,%xmm2
subss  %xmm1,%xmm2
movss  0xec9(%rip),%xmm1
ucomiss %xmm2,%xmm1
jae    1143 <roundToInteger+0x23>
call   1030 <ceil@plt>
pop    %rcx
ret
call   1040 <floor@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @roundToInteger(float %0) {
%2 = alloca float
%3 = alloca i32
%4 = alloca i32
%5 = alloca float
store float %0, float* %2
%6 = load float, float* %2
%7 = fptosi float %6 to i32
store i32 %7, i32* %4
%8 = load float, float* %2
%9 = load i32, i32* %4
%10 = sitofp i32 %9 to float
%11 = fsub float %8, %10
store float %11, float* %5
%12 = load float, float* %5
%13 = fpext float %12 to double
%14 = fcmp ole double %13, 5.000000e-01
br i1 %14, label %15, label %19
15: ; preds = %1
%16 = load float, float* %2
%17 = call i64 @floor(float %16)
%18 = trunc i64 %17 to i32
store i32 %18, i32* %3
br label %23
19: ; preds = %1
%20 = load float, float* %2
%21 = call i64 @ceil(float %20)
%22 = trunc i64 %21 to i32
store i32 %22, i32* %3
br label %23
23: ; preds = %19, %15
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @roundToInteger(float %0) {
%2 = fptosi float %0 to i32
%3 = sitofp i32 %2 to float
%4 = fsub float %0, %3
%5 = fcmp ugt float %4, 5.000000e-01
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i64 @floor(float %0)
br label %10
8: ; preds = %1
%9 = tail call i64 @ceil(float %0)
br label %10
10: ; preds = %8, %6
%11 = phi i64 [ %7, %6 ], [ %9, %8 ]
%12 = trunc i64 %11 to i32
ret i32 %12
}
/* Variables and functions */
int optfiltn(float, float, float);
int optdelt1(int n, float delt1, float delt2, float df) {
  return (n - optfiltn(delt1, delt2, df));
}


x86 assembly (clang, -O0):
<optdelt1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
movss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
movss  -0x10(%rbp),%xmm2
call   1030 <optfiltn@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
sub    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<optdelt1>:
push   %rbx
mov    %edi,%ebx
call   1030 <optfiltn@plt>
sub    %eax,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @optdelt1(i32 %0, float %1, float %2, float %3) {
%5 = alloca i32
%6 = alloca float
%7 = alloca float
%8 = alloca float
store i32 %0, i32* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load i32, i32* %5
%10 = load float, float* %6
%11 = load float, float* %7
%12 = load float, float* %8
%13 = call i32 @optfiltn(float %10, float %11, float %12)
%14 = sub nsw i32 %9, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @optdelt1(i32 %0, float %1, float %2, float %3) {
%5 = tail call i32 @optfiltn(float %1, float %2, float %3)
%6 = sub nsw i32 %0, %5
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int hash(int /*<<< orphan*/ *, size_t, int /*<<< orphan*/ const *, size_t, int,
         int);
int sha3_256(uint8_t *out, size_t outlen, const uint8_t *in, size_t inlen) {
  if (outlen > (256 / 8)) {
    return -1;
  }
  return hash(out, outlen, in, inlen, 200 - (256 / 4), 0x06);
}


x86 assembly (clang, -O0):
<sha3_256>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
cmpq   $0x20,-0x18(%rbp)
jbe    113f <sha3_256+0x2f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1163 <sha3_256+0x53>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    $0x88,%r8d
mov    $0x6,%r9d
call   1030 <hash@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha3_256>:
cmp    $0x20,%rsi
jbe    111c <sha3_256+0xc>
mov    $0xffffffff,%eax
ret
mov    $0x88,%r8d
mov    $0x6,%r9d
jmp    1030 <hash@plt>

LLVM IR (-O0):
define i32 @sha3_256(i32* %0, i64 %1, i32* %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i32*
%9 = alloca i64
store i32* %0, i32** %6
store i64 %1, i64* %7
store i32* %2, i32** %8
store i64 %3, i64* %9
%10 = load i64, i64* %7
%11 = icmp ugt i64 %10, 32
br i1 %11, label %12, label %13
12: ; preds = %4
store i32 -1, i32* %5
br label %19
13: ; preds = %4
%14 = load i32*, i32** %6
%15 = load i64, i64* %7
%16 = load i32*, i32** %8
%17 = load i64, i64* %9
%18 = call i32 @hash(i32* %14, i64 %15, i32* %16, i64 %17, i32 136, i32 6)
store i32 %18, i32* %5
br label %19
19: ; preds = %13, %12
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @sha3_256(i32* %0, i64 %1, i32* %2, i64 %3) {
%5 = icmp ugt i64 %1, 32
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @hash(i32* %0, i64 %1, i32* %2, i64 %3, i32 136, i32 6)
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ %7, %6 ], [ -1, %4 ]
ret i32 %9
}