xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
void main(void) {
  unsigned int x = 1;
  unsigned int y = 0;
  while (y < 1024) {
    x = 0;
    y++;
  }
  __VERIFIER_assert(x == 1);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x400,-0x8(%rbp)
jae    1148 <main+0x38>
movl   $0x0,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
cmpl   $0x1,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %edi,%edi
jmp    1030 <__VERIFIER_assert@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp ult i32 %4, 1024
br i1 %5, label %6, label %9
6: ; preds = %3
store i32 0, i32* %1
%7 = load i32, i32* %2
%8 = add i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
%10 = load i32, i32* %1
%11 = icmp eq i32 %10, 1
%12 = zext i1 %11 to i32
%13 = call i32 @__VERIFIER_assert(i32 %12)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @__VERIFIER_assert(i32 0)
ret void
}
/* Variables and functions */
float fmin(float, float);
float fmin3(float _a, float _b, float _c) { return fmin(_a, fmin(_b, _c)); }


x86 assembly (clang, -O0):
<fmin3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
call   1030 <fmin@plt>
movaps %xmm0,%xmm1
movss  -0x10(%rbp),%xmm0
call   1030 <fmin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmin3>:
movaps %xmm1,%xmm3
cmpunordss %xmm1,%xmm3
movaps %xmm3,%xmm4
andps  %xmm2,%xmm4
minss  %xmm1,%xmm2
andnps %xmm2,%xmm3
orps   %xmm4,%xmm3
movaps %xmm3,%xmm1
minss  %xmm0,%xmm1
cmpunordss %xmm0,%xmm0
movaps %xmm0,%xmm2
andps  %xmm3,%xmm2
andnps %xmm1,%xmm0
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @fmin3(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call float @fmin(float %8, float %9)
%11 = call float @fmin(float %7, float %10)
ret float %11
}

LLVM IR (-O2):
define float @fmin3(float %0, float %1, float %2) {
%4 = tail call nsz float @llvm.minnum.f32(float %1, float %2)
%5 = tail call nsz float @llvm.minnum.f32(float %0, float %4)
ret float %5
}
/* Type definitions */
typedef double uint8_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
uint8_t get_color(double d) {
  assert(d >= -1.0 && d <= 1.0);
  return (d + 1.0) / 2.0 * 255.0;
}


x86 assembly (clang, -O0):
<get_color>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xor    %eax,%eax
movsd  0xed4(%rip),%xmm1
ucomisd %xmm1,%xmm0
mov    %al,-0x9(%rbp)
jb     114c <get_color+0x3c>
movsd  0xec7(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
setae  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
movsd  0xea7(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  0xeaa(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xe96(%rip),%xmm1
mulsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_color>:
push   %rax
movsd  %xmm0,(%rsp)
ucomisd 0xee2(%rip),%xmm0
setae  %al
movsd  0xedf(%rip),%xmm1
ucomisd %xmm0,%xmm1
setae  %cl
and    %al,%cl
movzbl %cl,%edi
call   1030 <assert@plt>
movsd  (%rsp),%xmm0
addsd  0xec1(%rip),%xmm0
mulsd  0xec1(%rip),%xmm0
mulsd  0xec1(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @get_color(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp oge double %3, -1.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load double, double* %2
%7 = fcmp ole double %6, 1.000000e+00
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
%12 = load double, double* %2
%13 = fadd double %12, 1.000000e+00
%14 = fdiv double %13, 2.000000e+00
%15 = fmul double %14, 2.550000e+02
ret double %15
}

LLVM IR (-O2):
define double @get_color(double %0) {
%2 = fcmp oge double %0, -1.000000e+00
%3 = fcmp ole double %0, 1.000000e+00
%4 = and i1 %2, %3
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = fadd double %0, 1.000000e+00
%8 = fmul double %7, 5.000000e-01
%9 = fmul double %8, 2.550000e+02
ret double %9
}
/* Variables and functions */
float pow(int, int);
float exponentialEaseInf(float p) {
  return (p == 0.0) ? p : pow(2, 10 * (p - 1));
}


x86 assembly (clang, -O0):
<exponentialEaseInf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1148 <exponentialEaseInf+0x38>
jp     1148 <exponentialEaseInf+0x38>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
jmp    1178 <exponentialEaseInf+0x68>
movss  -0x4(%rbp),%xmm1
movss  0xeaf(%rip),%xmm0
subss  %xmm0,%xmm1
movss  0xe9f(%rip),%xmm0
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%esi
mov    $0x2,%edi
call   1030 <pow@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exponentialEaseInf>:
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jne    111b <exponentialEaseInf+0xb>
jp     111b <exponentialEaseInf+0xb>
ret
addss  0xedd(%rip),%xmm0
mulss  0xed9(%rip),%xmm0
cvttss2si %xmm0,%esi
mov    $0x2,%edi
jmp    1030 <pow@plt>

LLVM IR (-O0):
define float @exponentialEaseInf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fcmp oeq double %4, 0.000000e+00
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load float, float* %2
br label %14
8: ; preds = %1
%9 = load float, float* %2
%10 = fsub float %9, 1.000000e+00
%11 = fmul float 1.000000e+01, %10
%12 = fptosi float %11 to i32
%13 = call float @pow(i32 2, i32 %12)
br label %14
14: ; preds = %8, %6
%15 = phi float [ %7, %6 ], [ %13, %8 ]
ret float %15
}

LLVM IR (-O2):
define float @exponentialEaseInf(float %0) {
%2 = fcmp oeq float %0, 0.000000e+00
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = fadd float %0, -1.000000e+00
%5 = fmul float %4, 1.000000e+01
%6 = fptosi float %5 to i32
%7 = tail call float @pow(i32 2, i32 %6)
br label %8
8: ; preds = %1, %3
%9 = phi float [ %7, %3 ], [ %0, %1 ]
ret float %9
}
__attribute__((noreturn, no)) void abrt(const char *fi, const char *fu) {
  __builtin_abort();
}


x86 assembly (clang, -O0):
<abrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<abrt>:
push   %rax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @abrt(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
unreachable
}

LLVM IR (-O2):
define void @abrt(i8* nocapture readnone %0, i8* nocapture readnone %1) {
tail call void @abort()
unreachable
}
void f(int ciu_sum) {
  int t1;
  _Bool t = ciu_sum != 0;
  int __r1 = t;
  g(__r1);
  if (__r1)
    t1 = ciu_sum == 0;
  else
    t1 = 0;
  if (t1 != 0)
    link_failure();
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
and    $0x1,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
mov    $0x0,%al
call   1040 <g@plt>
cmpl   $0x0,-0x10(%rbp)
je     116a <f+0x4a>
cmpl   $0x0,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x8(%rbp)
jmp    1171 <f+0x51>
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1182 <f+0x62>
mov    $0x0,%al
call   1030 <link_failure@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
test   %edi,%edi
setne  %al
mov    %eax,%edi
xor    %eax,%eax
jmp    1030 <g@plt>

LLVM IR (-O0):
define void @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i8
store i8 %8, i8* %4
%9 = load i8, i8* %4
%10 = trunc i8 %9 to i1
%11 = zext i1 %10 to i32
store i32 %11, i32* %5
%12 = load i32, i32* %5
%13 = call i32 (i32, ...) bitcast (i32 (...)* @g to i32 (i32, ...)*)(i32 %12)
%14 = load i32, i32* %5
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %1
%17 = load i32, i32* %2
%18 = icmp eq i32 %17, 0
%19 = zext i1 %18 to i32
store i32 %19, i32* %3
br label %21
20: ; preds = %1
store i32 0, i32* %3
br label %21
21: ; preds = %20, %16
%22 = load i32, i32* %3
%23 = icmp ne i32 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %21
%25 = call i32 (...) @link_failure()
br label %26
26: ; preds = %24, %21
ret void
}

LLVM IR (-O2):
define void @f(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @g to i32 (i32, ...)*)(i32 %3)
ret void
}
int fib_sum(long limit) {
  int a1 = 1, b1 = 1;
  long b2 = 0, total = 0;
  while (b2 <= limit) {
    b2 = a1 + b1;
    a1 = b1;
    b1 = b2;
    total += b2 % 2 == 0 ? b2 : 0;
  }
  return total;
}


x86 assembly (clang, -O0):
<fib_sum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jg     118e <fib_sum+0x8e>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x18(%rbp),%rax
mov    %eax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    $0x2,%ecx
cqto
idiv   %rcx
cmp    $0x0,%rdx
jne    1172 <fib_sum+0x72>
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
jmp    117d <fib_sum+0x7d>
xor    %eax,%eax
mov    %rax,-0x28(%rbp)
jmp    117d <fib_sum+0x7d>
mov    -0x28(%rbp),%rax
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1126 <fib_sum+0x26>
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib_sum>:
test   %rdi,%rdi
js     1143 <fib_sum+0x43>
mov    $0x1,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %edx,%r8d
add    %edx,%ecx
movslq %ecx,%rsi
test   $0x1,%sil
mov    $0x0,%edx
cmove  %rsi,%rdx
add    %rdx,%rax
mov    %ecx,%edx
mov    %r8d,%ecx
cmp    %rdi,%rsi
jle    1120 <fib_sum+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fib_sum(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %2
store i32 1, i32* %3
store i32 1, i32* %4
store i64 0, i64* %5
store i64 0, i64* %6
br label %7
7: ; preds = %25, %1
%8 = load i64, i64* %5
%9 = load i64, i64* %2
%10 = icmp sle i64 %8, %9
br i1 %10, label %11, label %29
11: ; preds = %7
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = add nsw i32 %12, %13
%15 = sext i32 %14 to i64
store i64 %15, i64* %5
%16 = load i32, i32* %4
store i32 %16, i32* %3
%17 = load i64, i64* %5
%18 = trunc i64 %17 to i32
store i32 %18, i32* %4
%19 = load i64, i64* %5
%20 = srem i64 %19, 2
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %24
22: ; preds = %11
%23 = load i64, i64* %5
br label %25
24: ; preds = %11
br label %25
25: ; preds = %24, %22
%26 = phi i64 [ %23, %22 ], [ 0, %24 ]
%27 = load i64, i64* %6
%28 = add nsw i64 %27, %26
store i64 %28, i64* %6
br label %7
29: ; preds = %7
%30 = load i64, i64* %6
%31 = trunc i64 %30 to i32
ret i32 %31
}

LLVM IR (-O2):
define i32 @fib_sum(i64 %0) {
%2 = icmp slt i64 %0, 0
br i1 %2, label %16, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %12, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ 1, %1 ]
%6 = phi i32 [ %5, %3 ], [ 1, %1 ]
%7 = add nsw i32 %5, %6
%8 = sext i32 %7 to i64
%9 = and i64 %8, 1
%10 = icmp eq i64 %9, 0
%11 = select i1 %10, i64 %8, i64 0
%12 = add nsw i64 %11, %4
%13 = icmp sgt i64 %8, %0
br i1 %13, label %14, label %3
14: ; preds = %3
%15 = trunc i64 %12 to i32
br label %16
16: ; preds = %14, %1
%17 = phi i32 [ 0, %1 ], [ %15, %14 ]
ret i32 %17
}
/* Type definitions */
typedef unsigned int uint64_t;

/* Variables and functions */
unsigned int UINT64_C(int);
uint64_t aeron_hash_code(uint64_t value) {
  uint64_t x = value;
  x = (x ^ (x >> 30u)) * UINT64_C(0xbf58476d1ce4e5b9);
  x = (x ^ (x >> 27u)) * UINT64_C(0x94d049bb133111eb);
  x = x ^ (x >> 31u);
  return x;
}


x86 assembly (clang, -O0):
<aeron_hash_code>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    $0x1e,%ecx
xor    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    $0x1ce4e5b9,%edi
call   1030 <UINT64_C@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
imul   %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    $0x1b,%ecx
xor    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    $0x133111eb,%edi
call   1030 <UINT64_C@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
imul   %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x8(%rbp),%ecx
shr    $0x1f,%ecx
xor    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aeron_hash_code>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
shr    $0x1e,%ebp
xor    %edi,%ebp
mov    $0x1ce4e5b9,%edi
call   1030 <UINT64_C@plt>
mov    %eax,%ebx
imul   %ebp,%ebx
mov    %ebx,%eax
shr    $0x1b,%eax
xor    %eax,%ebx
mov    $0x133111eb,%edi
call   1030 <UINT64_C@plt>
imul   %ebx,%eax
mov    %eax,%ecx
shr    $0x1f,%ecx
xor    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @aeron_hash_code(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = load i32, i32* %3
%7 = lshr i32 %6, 30
%8 = xor i32 %5, %7
%9 = call i32 @UINT64_C(i32 484763065)
%10 = mul i32 %8, %9
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = load i32, i32* %3
%13 = lshr i32 %12, 27
%14 = xor i32 %11, %13
%15 = call i32 @UINT64_C(i32 321982955)
%16 = mul i32 %14, %15
store i32 %16, i32* %3
%17 = load i32, i32* %3
%18 = load i32, i32* %3
%19 = lshr i32 %18, 31
%20 = xor i32 %17, %19
store i32 %20, i32* %3
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @aeron_hash_code(i32 %0) {
%2 = lshr i32 %0, 30
%3 = xor i32 %2, %0
%4 = tail call i32 @UINT64_C(i32 484763065)
%5 = mul i32 %4, %3
%6 = lshr i32 %5, 27
%7 = xor i32 %6, %5
%8 = tail call i32 @UINT64_C(i32 321982955)
%9 = mul i32 %7, %8
%10 = lshr i32 %9, 31
%11 = xor i32 %10, %9
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char *);
char *strcat(char *d, const char *s) {
  strcpy(d + strlen(d), s);
  return d;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x18(%rbp),%rdi
cltq
add    %rax,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <strlen@plt>
movslq %eax,%rdi
add    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
%10 = load i8*, i8** %4
%11 = call i32 @strcpy(i8* %9, i8* %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @strcat(i8* returned %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %0)
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = tail call i32 @strcpy(i8* %5, i8* %1)
ret i8* %0
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ execl(char *, char *, char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *);
int internetip(void) {
  printf("Internet facing IP address.\n");
  execl("/usr/bin/curl", "/usr/bin/curl", "http://myexternalip.com/raw", NULL);
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<internetip>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee6(%rip),%rsi
lea    0xeed(%rip),%rdx
xor    %eax,%eax
mov    %eax,%ecx
mov    %rsi,%rdi
call   1040 <execl@plt>
mov    0x2e8f(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<internetip>:
push   %rax
lea    0xf02(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
lea    0xed3(%rip),%rdx
mov    %rdi,%rsi
xor    %ecx,%ecx
call   1040 <execl@plt>
mov    0x2e94(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [29 x i8] c"Internet facing IP address.\0A\00"
@.str.1 = [14 x i8] c"/usr/bin/curl\00"
@.str.2 = [28 x i8] c"http://myexternalip.com/raw\00"
@EXIT_SUCCESS = global i32 0
define i32 @internetip() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @execl(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.2, i64 0, i64 0), i32* null)
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}

LLVM IR (-O2):
@.str.1 = [14 x i8] c"/usr/bin/curl\00"
@.str.2 = [28 x i8] c"http://myexternalip.com/raw\00"
@EXIT_SUCCESS = global i32 0
@str = [28 x i8] c"Internet facing IP address.\00"
define i32 @internetip() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @execl(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.2, i64 0, i64 0), i32* null)
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Input();
scalar_t__ Work();
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("Input ..");
  Input();
  printf("OK\n");
  int i;
  while (Work())
    ;
  printf("Bye~\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <Input@plt>
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1050 <Work@plt>
cmp    $0x0,%rax
je     117b <main+0x4b>
jmp    1165 <main+0x35>
lea    0xe8b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <Input@plt>
lea    0xeae(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1060 <Work@plt>
test   %rax,%rax
jne    1160 <main+0x20>
lea    0xe99(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"Input ..\00"
@.str.1 = [4 x i8] c"OK\0A\00"
@.str.2 = [6 x i8] c"Bye~\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%8 = call i32 (...) @Input()
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %13, %2
%11 = call i64 (...) @Work()
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10
br label %10
14: ; preds = %10
%15 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"Input ..\00"
@str = [3 x i8] c"OK\00"
@str.3 = [5 x i8] c"Bye~\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 (...) @Input()
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
br label %6
6: ; preds = %6, %2
%7 = tail call i64 (...) @Work()
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %6
9: ; preds = %6
%10 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str.3, i64 0, i64 0))
ret i32 0
}
extern int strcmp(const char *cs, const char *ct) {
  int d0, d1;
  register int __res;
  __asm__ __volatile__("cld\n"
                       "1:\tlodsb\n\t"
                       "scasb\n\t"
                       "jne 2f\n\t"
                       "testb %%al,%%al\n\t"
                       "jne 1b\n\t"
                       "xorl %%eax,%%eax\n\t"
                       "jmp 3f\n"
                       "2:\tsbbl %%eax,%%eax\n\t"
                       "orb $1,%%al\n"
                       "3:"
                       : "=a"(__res), "=&S"(d0), "=&D"(d1)
                       : "1"(cs), "2"(ct));
  return __res;
}


x86 assembly (clang, -O0):
<strcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdi
cld
lods   %ds:(%rsi),%al
scas   %es:(%rdi),%al
jne    112c <strcmp+0x2c>
test   %al,%al
jne    1115 <strcmp+0x15>
xor    %eax,%eax
jmp    1130 <strcmp+0x30>
sbb    %eax,%eax
or     $0x1,%al
mov    %eax,-0x1c(%rbp)
mov    %esi,%eax
mov    %eax,-0x14(%rbp)
mov    %edi,%eax
mov    %eax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp>:
mov    %rsi,%rax
mov    %rdi,%rsi
mov    %rax,%rdi
cld
lods   %ds:(%rsi),%al
scas   %es:(%rdi),%al
jne    1116 <strcmp+0x16>
test   %al,%al
jne    110a <strcmp+0xa>
xor    %eax,%eax
jmp    111a <strcmp+0x1a>
sbb    %eax,%eax
or     $0x1,%al
ret

LLVM IR (-O0):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call { i32, i8*, i8* } asm sideeffect "cld\0A1:\09lodsb\0A\09scasb\0A\09jne 2f\0A\09testb %al,%al\0A\09jne 1b\0A\09xorl %eax,%eax\0A\09jmp 3f\0A2:\09sbbl %eax,%eax\0A\09orb $$1,%al\0A3:", "={ax},=&{si},=&{di},1,2,~{dirflag},~{fpsr},~{flags}"(i8* %8, i8* %9)
%11 = extractvalue { i32, i8*, i8* } %10, 0
%12 = extractvalue { i32, i8*, i8* } %10, 1
%13 = extractvalue { i32, i8*, i8* } %10, 2
store i32 %11, i32* %7
%14 = ptrtoint i8* %12 to i64
%15 = trunc i64 %14 to i32
store i32 %15, i32* %5
%16 = ptrtoint i8* %13 to i64
%17 = trunc i64 %16 to i32
store i32 %17, i32* %6
%18 = load i32, i32* %7
ret i32 %18
}

LLVM IR (-O2):
define i32 @strcmp(i8* %0, i8* %1) {
%3 = tail call { i32, i8*, i8* } asm sideeffect "cld\0A1:\09lodsb\0A\09scasb\0A\09jne 2f\0A\09testb %al,%al\0A\09jne 1b\0A\09xorl %eax,%eax\0A\09jmp 3f\0A2:\09sbbl %eax,%eax\0A\09orb $$1,%al\0A3:", "={ax},=&{si},=&{di},1,2,~{dirflag},~{fpsr},~{flags}"(i8* %0, i8* %1)
%4 = extractvalue { i32, i8*, i8* } %3, 0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ op_write1(int);
void op_enc_dec_c(void) { op_write1(0x0d); }


x86 assembly (clang, -O0):
<op_enc_dec_c>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd,%edi
call   1030 <op_write1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_enc_dec_c>:
mov    $0xd,%edi
jmp    1030 <op_write1@plt>

LLVM IR (-O0):
define void @op_enc_dec_c() {
%1 = call i32 @op_write1(i32 13)
ret void
}

LLVM IR (-O2):
define void @op_enc_dec_c() {
%1 = tail call i32 @op_write1(i32 13)
ret void
}
int compare_int(const int a, const int b) {
  if (a < b)
    return -1;
  else if (a > b)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<compare_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1122 <compare_int+0x22>
movl   $0xffffffff,-0x4(%rbp)
jmp    1141 <compare_int+0x41>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    113a <compare_int+0x3a>
movl   $0x1,-0x4(%rbp)
jmp    1141 <compare_int+0x41>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_int>:
xor    %ecx,%ecx
cmp    %esi,%edi
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @compare_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %3
br label %16
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = icmp sgt i32 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %10
store i32 1, i32* %3
br label %16
15: ; preds = %10
store i32 0, i32* %3
br label %16
16: ; preds = %15, %14, %9
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @compare_int(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = icmp sgt i32 %0, %1
%5 = zext i1 %4 to i32
%6 = select i1 %3, i32 -1, i32 %5
ret i32 %6
}
/* Type definitions */
struct sockaddr_in6 {
  int /*<<< orphan*/ sin6_addr;
};
struct in6_addr {
  int dummy;
};

/* Variables and functions */
scalar_t__ memcmp(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
int sin6_addr_eq(struct sockaddr_in6 *a, struct sockaddr_in6 *b) {
  return 0 == memcmp(&a->sin6_addr, &b->sin6_addr, sizeof(struct in6_addr));
}


x86 assembly (clang, -O0):
<sin6_addr_eq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcmp@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sin6_addr_eq>:
push   %rax
mov    $0x4,%edx
call   1030 <memcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr_in6 = type { i32 }
define i32 @sin6_addr_eq(%struct.sockaddr_in6* %0, %struct.sockaddr_in6* %1) {
%3 = alloca %struct.sockaddr_in6*
%4 = alloca %struct.sockaddr_in6*
store %struct.sockaddr_in6* %0, %struct.sockaddr_in6** %3
store %struct.sockaddr_in6* %1, %struct.sockaddr_in6** %4
%5 = load %struct.sockaddr_in6*, %struct.sockaddr_in6** %3
%6 = getelementptr inbounds %struct.sockaddr_in6, %struct.sockaddr_in6* %5, i32 0, i32 0
%7 = load %struct.sockaddr_in6*, %struct.sockaddr_in6** %4
%8 = getelementptr inbounds %struct.sockaddr_in6, %struct.sockaddr_in6* %7, i32 0, i32 0
%9 = call i64 @memcmp(i32* %6, i32* %8, i32 4)
%10 = icmp eq i64 0, %9
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
%struct.sockaddr_in6 = type { i32 }
define i32 @sin6_addr_eq(%struct.sockaddr_in6* %0, %struct.sockaddr_in6* %1) {
%3 = getelementptr inbounds %struct.sockaddr_in6, %struct.sockaddr_in6* %0, i64 0, i32 0
%4 = getelementptr inbounds %struct.sockaddr_in6, %struct.sockaddr_in6* %1, i64 0, i32 0
%5 = tail call i64 @memcmp(i32* %3, i32* %4, i32 4)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
void gtk_text_iter_backward_sentence_starts() {}


x86 assembly (clang, -O0):
<gtk_text_iter_backward_sentence_starts>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_iter_backward_sentence_starts>:
ret

LLVM IR (-O0):
define void @gtk_text_iter_backward_sentence_starts() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_iter_backward_sentence_starts() {
ret void
}
/* Type definitions */
struct gg_http {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ gg_debug(int, char *);
struct gg_http *gg_register2(const char *email, const char *password,
                             const char *qa, int async) {
  gg_debug(16, "// gg_register2() is obsolete. use gg_register3() instead!\n");
  errno = EINVAL;
  return NULL;
}


x86 assembly (clang, -O0):
<gg_register2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    $0x10,%edi
lea    0xecd(%rip),%rsi
call   1030 <gg_debug@plt>
mov    0x2e99(%rip),%rax
mov    (%rax),%ecx
mov    0x2e98(%rip),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gg_register2>:
push   %rax
lea    0xee8(%rip),%rsi
mov    $0x10,%edi
call   1030 <gg_debug@plt>
mov    0x2eaf(%rip),%rax
mov    (%rax),%eax
mov    0x2eae(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.gg_http = type { i32 }
@.str = [60 x i8] c"// gg_register2() is obsolete. use gg_register3() instead!\0A\00"
@EINVAL = global i32 0
@errno = global i32 0
define %struct.gg_http* @gg_register2(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = call i32 @gg_debug(i32 16, i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
%10 = load i32, i32* @EINVAL
store i32 %10, i32* @errno
ret %struct.gg_http* null
}

LLVM IR (-O2):
%struct.gg_http = type { i32 }
@.str = [60 x i8] c"// gg_register2() is obsolete. use gg_register3() instead!\0A\00"
@EINVAL = global i32 0
@errno = global i32 0
define noalias %struct.gg_http* @gg_register2(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i32 %3) {
%5 = tail call i32 @gg_debug(i32 16, i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* @EINVAL
store i32 %6, i32* @errno
ret %struct.gg_http* null
}
/* Variables and functions */
char *getenv(char const *);
int TR_LOOKUP(const char *name) {
  const char *out = getenv(name);
  return out ? 1 : 0;
}


x86 assembly (clang, -O0):
<TR_LOOKUP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TR_LOOKUP>:
push   %rax
call   1030 <getenv@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @TR_LOOKUP(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @getenv(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 1, i32 0
ret i32 %9
}

LLVM IR (-O2):
define i32 @TR_LOOKUP(i8* nocapture %0) {
%2 = tail call i8* @getenv(i8* %0)
%3 = icmp ne i8* %2, null
%4 = zext i1 %3 to i32
ret i32 %4
}
void glTexEnvi(void) { return; }


x86 assembly (clang, -O0):
<glTexEnvi>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glTexEnvi>:
ret

LLVM IR (-O0):
define void @glTexEnvi() {
ret void
}

LLVM IR (-O2):
define void @glTexEnvi() {
ret void
}
void ol_target_ready(struct ol_softc *scn, void *cfg_ctx) {}


x86 assembly (clang, -O0):
<ol_target_ready>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ol_target_ready>:
ret

LLVM IR (-O0):
%struct.ol_softc = type opaque
define void @ol_target_ready(%struct.ol_softc* %0, i8* %1) {
%3 = alloca %struct.ol_softc*
%4 = alloca i8*
store %struct.ol_softc* %0, %struct.ol_softc** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.ol_softc = type opaque
define void @ol_target_ready(%struct.ol_softc* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
float dds_lookupx(int /*<<< orphan*/);
float ddsf(uint32_t *phase_acc, int32_t phase_rate) {
  float amp;
  amp = dds_lookupx(*phase_acc);
  *phase_acc += phase_rate;
  return amp;
}


x86 assembly (clang, -O0):
<ddsf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <dds_lookupx@plt>
movss  %xmm0,-0x14(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
movslq (%rax),%rcx
add    %rdx,%rcx
mov    %ecx,(%rax)
movss  -0x14(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ddsf>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <dds_lookupx@plt>
add    %r14d,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define float @ddsf(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca float
store i32* %0, i32** %3
store i64 %1, i64* %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
%8 = call float @dds_lookupx(i32 %7)
store float %8, float* %5
%9 = load i64, i64* %4
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
%12 = sext i32 %11 to i64
%13 = add nsw i64 %12, %9
%14 = trunc i64 %13 to i32
store i32 %14, i32* %10
%15 = load float, float* %5
ret float %15
}

LLVM IR (-O2):
define float @ddsf(i32* nocapture %0, i64 %1) {
%3 = load i32, i32* %0
%4 = tail call float @dds_lookupx(i32 %3)
%5 = load i32, i32* %0
%6 = trunc i64 %1 to i32
%7 = add i32 %5, %6
store i32 %7, i32* %0
ret float %4
}
/* Variables and functions */
double rndu();
double tan(double);
double rndCauchy(void) {
  return tan(3.1415926535897932384626433832795 * (rndu() - 0.5));
}


x86 assembly (clang, -O0):
<rndCauchy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rndu@plt>
movaps %xmm0,%xmm1
movsd  0xed2(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xebe(%rip),%xmm0
mulsd  %xmm1,%xmm0
call   1040 <tan@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rndCauchy>:
push   %rax
xor    %eax,%eax
call   1030 <rndu@plt>
addsd  0xed0(%rip),%xmm0
mulsd  0xed0(%rip),%xmm0
pop    %rax
jmp    1040 <tan@plt>

LLVM IR (-O0):
define double @rndCauchy() {
%1 = call double (...) @rndu()
%2 = fsub double %1, 5.000000e-01
%3 = fmul double 0x400921FB54442D18, %2
%4 = call double @tan(double %3)
ret double %4
}

LLVM IR (-O2):
define double @rndCauchy() {
%1 = tail call double (...) @rndu()
%2 = fadd double %1, -5.000000e-01
%3 = fmul double %2, 0x400921FB54442D18
%4 = tail call double @tan(double %3)
ret double %4
}
/* Variables and functions */
double atof(char *);
int fieldncmp(char *a, char *b) {
  double v1, v2;
  v1 = atof(a);
  v2 = atof(b);
  if (v1 < v2) {
    return -1;
  } else if (v1 > v2) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<fieldncmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <atof@plt>
movsd  %xmm0,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <atof@plt>
movsd  %xmm0,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    115c <fieldncmp+0x4c>
movl   $0xffffffff,-0x4(%rbp)
jmp    117f <fieldncmp+0x6f>
movsd  -0x20(%rbp),%xmm0
ucomisd -0x28(%rbp),%xmm0
jbe    1178 <fieldncmp+0x68>
movl   $0x1,-0x4(%rbp)
jmp    117f <fieldncmp+0x6f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fieldncmp>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
call   1030 <atof@plt>
movsd  %xmm0,0x8(%rsp)
mov    %rbx,%rdi
call   1030 <atof@plt>
xor    %ecx,%ecx
movsd  0x8(%rsp),%xmm1
ucomisd %xmm0,%xmm1
seta   %cl
ucomisd %xmm1,%xmm0
mov    $0xffffffff,%eax
cmovbe %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fieldncmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca double
%7 = alloca double
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = call double @atof(i8* %8)
store double %9, double* %6
%10 = load i8*, i8** %5
%11 = call double @atof(i8* %10)
store double %11, double* %7
%12 = load double, double* %6
%13 = load double, double* %7
%14 = fcmp olt double %12, %13
br i1 %14, label %15, label %16
15: ; preds = %2
store i32 -1, i32* %3
br label %22
16: ; preds = %2
%17 = load double, double* %6
%18 = load double, double* %7
%19 = fcmp ogt double %17, %18
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 1, i32* %3
br label %22
21: ; preds = %16
store i32 0, i32* %3
br label %22
22: ; preds = %21, %20, %15
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @fieldncmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call double @atof(i8* %0)
%4 = tail call double @atof(i8* %1)
%5 = fcmp olt double %3, %4
%6 = fcmp ogt double %3, %4
%7 = zext i1 %6 to i32
%8 = select i1 %5, i32 -1, i32 %7
ret i32 %8
}
int test_imm_26int64_lowword_mem(long long *val) {
  return ((*val) & (0x26 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_26int64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x26,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_26int64_lowword_mem>:
testb  $0x26,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_26int64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 38
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_26int64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 38
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void maybe_fault(int delta) {
  char *x = memalign(16, 32);
  assert(x);
  assert(0 == ((16 - 1) & (unsigned long)x));
  memset(x, 0, 32);
  __asm__ __volatile__("pabsb (%0),%%xmm7" : : "r"(x + delta) : "xmm7");
  free(x);
}


x86 assembly (clang, -O0):
<maybe_fault>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x10,%edi
mov    $0x20,%esi
call   1060 <memalign@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1050 <assert@plt>
mov    -0x10(%rbp),%rcx
and    $0xf,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1050 <assert@plt>
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x20,%edx
call   1040 <memset@plt>
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
add    %rcx,%rax
pabsb  (%rax),%xmm7
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<maybe_fault>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x10,%edi
mov    $0x20,%esi
call   1050 <memalign@plt>
mov    %rax,%rbx
mov    %rax,%rdi
xor    %eax,%eax
call   1040 <assert@plt>
mov    $0x1,%edi
xor    %eax,%eax
call   1040 <assert@plt>
xorps  %xmm0,%xmm0
movaps %xmm0,(%rbx)
movaps %xmm0,0x10(%rbx)
movslq %ebp,%rax
add    %rbx,%rax
pabsb  (%rax),%xmm7
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @maybe_fault(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = call i8* @memalign(i64 16, i64 32)
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %5)
%7 = load i8*, i8** %3
%8 = ptrtoint i8* %7 to i64
%9 = and i64 15, %8
%10 = icmp eq i64 0, %9
%11 = zext i1 %10 to i32
%12 = call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 %11)
%13 = load i8*, i8** %3
%14 = load i8*, i8** %3
%15 = load i32, i32* %2
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8*, i8** %3
ret void
}

LLVM IR (-O2):
define void @maybe_fault(i32 %0) {
%2 = tail call align 16 dereferenceable_or_null(32) i8* @memalign(i64 16, i64 32)
%3 = tail call i32 (i8*, ...) bitcast (i32 (...)* @assert to i32 (i8*, ...)*)(i8* %2)
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @assert to i32 (i32, ...)*)(i32 1)
tail call void @llvm.memset.p0i8.i64(i8* align 16 dereferenceable(32) %2, i8 0, i64 32, i1 false)
%5 = sext i32 %0 to i64
%6 = getelementptr inbounds i8, i8* %2, i64 %5
tail call void asm sideeffect "pabsb ($0),%xmm7", "r,~{xmm7},~{dirflag},~{fpsr},~{flags}"(i8* %6)
tail call void @free(i8* %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;
typedef int /*<<< orphan*/ buffer;

/* Variables and functions */
int /*<<< orphan*/ bzero(char **, int);
int /*<<< orphan*/ strlen(char *);
int /*<<< orphan*/ vsprintf(char *, char const *, int /*<<< orphan*/);
int write(int, char *, int /*<<< orphan*/);
int vwritef(int fd, const char *fmt, va_list ap) {
  char buffer[256];
  bzero(&buffer, sizeof(buffer));
  vsprintf(buffer, fmt, ap);
  return write(fd, buffer, strlen(buffer));
}


x86 assembly (clang, -O0):
<vwritef>:
push   %rbp
mov    %rsp,%rbp
sub    $0x130,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
lea    -0x120(%rbp),%rdi
mov    $0x100,%esi
call   1060 <bzero@plt>
lea    -0x120(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1050 <vsprintf@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x12c(%rbp)
lea    -0x120(%rbp),%rax
mov    %rax,-0x128(%rbp)
lea    -0x120(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x12c(%rbp),%edi
mov    -0x128(%rbp),%rsi
mov    %eax,%edx
call   1030 <write@plt>
add    $0x130,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vwritef>:
push   %rbp
push   %r15
push   %r14
push   %rbx
sub    $0x108,%rsp
mov    %edx,%r15d
mov    %rsi,%rbx
mov    %edi,%r14d
mov    %rsp,%rbp
mov    %rbp,%rdi
mov    $0x100,%esi
call   1060 <bzero@plt>
mov    %rbp,%rdi
mov    %rbx,%rsi
mov    %r15d,%edx
call   1050 <vsprintf@plt>
mov    %rbp,%rdi
call   1040 <strlen@plt>
mov    %r14d,%edi
mov    %rbp,%rsi
mov    %eax,%edx
call   1030 <write@plt>
add    $0x108,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @vwritef(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca [256 x i8]
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = bitcast [256 x i8]* %7 to i8**
%9 = call i32 @bzero(i8** %8, i32 256)
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %7, i64 0, i64 0
%11 = load i8*, i8** %5
%12 = load i32, i32* %6
%13 = call i32 @vsprintf(i8* %10, i8* %11, i32 %12)
%14 = load i32, i32* %4
%15 = getelementptr inbounds [256 x i8], [256 x i8]* %7, i64 0, i64 0
%16 = getelementptr inbounds [256 x i8], [256 x i8]* %7, i64 0, i64 0
%17 = call i32 @strlen(i8* %16)
%18 = call i32 @write(i32 %14, i8* %15, i32 %17)
ret i32 %18
}

LLVM IR (-O2):
define i32 @vwritef(i32 %0, i8* nocapture %1, i32 %2) {
%4 = alloca [256 x i8]
%5 = getelementptr inbounds [256 x i8], [256 x i8]* %4, i64 0, i64 0
%6 = bitcast [256 x i8]* %4 to i8**
%7 = call i32 @bzero(i8** %6, i32 256)
%8 = call i32 @vsprintf(i8* %5, i8* %1, i32 %2)
%9 = call i32 @strlen(i8* %5)
%10 = call i32 @write(i32 %0, i8* %5, i32 %9)
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ memmove(void *, void const *, size_t);
void bcopy(const void *b1, void *b2, size_t length) { memmove(b2, b1, length); }


x86 assembly (clang, -O0):
<bcopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memmove@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcopy>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <memmove@plt>

LLVM IR (-O0):
define void @bcopy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i8*, i8** %4
%9 = load i64, i64* %6
%10 = call i32 @memmove(i8* %7, i8* %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @bcopy(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @memmove(i8* %1, i8* %0, i64 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __u64;

/* Variables and functions */
int /*<<< orphan*/ __put_unaligned_be64(int /*<<< orphan*/, void *);
void put_unaligned_be64(__u64 val, void *p) { __put_unaligned_be64(val, p); }


x86 assembly (clang, -O0):
<put_unaligned_be64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <__put_unaligned_be64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_unaligned_be64>:
jmp    1030 <__put_unaligned_be64@plt>

LLVM IR (-O0):
define void @put_unaligned_be64(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @__put_unaligned_be64(i32 %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @put_unaligned_be64(i32 %0, i8* %1) {
%3 = tail call i32 @__put_unaligned_be64(i32 %0, i8* %1)
ret void
}
void MUSIC_SetVolume(int volume) {}


x86 assembly (clang, -O0):
<MUSIC_SetVolume>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MUSIC_SetVolume>:
ret

LLVM IR (-O0):
define void @MUSIC_SetVolume(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @MUSIC_SetVolume(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
long jrand48(unsigned short xsubi[3]) {
  uint64_t x;
  x = (uint64_t)xsubi[0] + ((uint64_t)xsubi[1] << 16) +
      ((uint64_t)xsubi[2] << 32);
  x = (0x5deece66dULL * x) + 0xb;
  xsubi[0] = (unsigned short)x;
  xsubi[1] = (unsigned short)(x >> 16);
  xsubi[2] = (unsigned short)(x >> 32);
  return (long)(int32_t)(x >> 16);
}


x86 assembly (clang, -O0):
<jrand48>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
mov    -0x8(%rbp),%rcx
movzwl 0x2(%rcx),%ecx
shl    $0x10,%ecx
add    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzwl 0x4(%rcx),%edx
mov    $0x20,%ecx
shl    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
movslq -0xc(%rbp),%rax
movabs $0x5deece66d,%rcx
imul   %rcx,%rax
add    $0xb,%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %ax,%cx
mov    -0x8(%rbp),%rax
mov    %cx,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
mov    %ax,%cx
mov    -0x8(%rbp),%rax
mov    %cx,0x2(%rax)
mov    -0xc(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
mov    %ax,%cx
mov    -0x8(%rbp),%rax
mov    %cx,0x4(%rax)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<jrand48>:
ret

LLVM IR (-O0):
define i64 @jrand48(i16* %0) {
%2 = alloca i16*
%3 = alloca i32
store i16* %0, i16** %2
%4 = load i16*, i16** %2
%5 = getelementptr inbounds i16, i16* %4, i64 0
%6 = load i16, i16* %5
%7 = zext i16 %6 to i32
%8 = load i16*, i16** %2
%9 = getelementptr inbounds i16, i16* %8, i64 1
%10 = load i16, i16* %9
%11 = zext i16 %10 to i32
%12 = shl i32 %11, 16
%13 = add nsw i32 %7, %12
%14 = load i16*, i16** %2
%15 = getelementptr inbounds i16, i16* %14, i64 2
%16 = load i16, i16* %15
%17 = zext i16 %16 to i32
%18 = shl i32 %17, 32
%19 = add nsw i32 %13, %18
store i32 %19, i32* %3
%20 = load i32, i32* %3
%21 = sext i32 %20 to i64
%22 = mul i64 25214903917, %21
%23 = add i64 %22, 11
%24 = trunc i64 %23 to i32
store i32 %24, i32* %3
%25 = load i32, i32* %3
%26 = trunc i32 %25 to i16
%27 = load i16*, i16** %2
%28 = getelementptr inbounds i16, i16* %27, i64 0
store i16 %26, i16* %28
%29 = load i32, i32* %3
%30 = ashr i32 %29, 16
%31 = trunc i32 %30 to i16
%32 = load i16*, i16** %2
%33 = getelementptr inbounds i16, i16* %32, i64 1
store i16 %31, i16* %33
%34 = load i32, i32* %3
%35 = ashr i32 %34, 32
%36 = trunc i32 %35 to i16
%37 = load i16*, i16** %2
%38 = getelementptr inbounds i16, i16* %37, i64 2
store i16 %36, i16* %38
%39 = load i32, i32* %3
%40 = ashr i32 %39, 16
%41 = sext i32 %40 to i64
ret i64 %41
}

LLVM IR (-O2):
define i64 @jrand48(i16* nocapture readnone %0) {
ret i64 poison
}