xunge/DecIR huggingface dataset:
/* Type definitions */
struct tm {
  int dummy;
};

/* Variables and functions */
char *dnk_calloc(int, int);
int /*<<< orphan*/ strftime(char *, int, char *, struct tm *);
char *dnk_date_time_fmtd(struct tm *tmp) {
  char *buf = dnk_calloc(255, sizeof(char));
  strftime(buf, 255, "%a, %d %b %Y %H:%M:%S %Z", tmp);
  return buf;
}


x86 assembly (clang, -O0):
<dnk_date_time_fmtd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xff,%edi
mov    $0x1,%esi
call   1040 <dnk_calloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    $0xff,%esi
lea    0xead(%rip),%rdx
call   1030 <strftime@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dnk_date_time_fmtd>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0xff,%edi
mov    $0x1,%esi
call   1040 <dnk_calloc@plt>
mov    %rax,%rbx
lea    0xec0(%rip),%rdx
mov    %rax,%rdi
mov    $0xff,%esi
mov    %r14,%rcx
call   1030 <strftime@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
@.str = [25 x i8] c"%a, %d %b %Y %H:%M:%S %Z\00"
define i8* @dnk_date_time_fmtd(%struct.tm* %0) {
%2 = alloca %struct.tm*
%3 = alloca i8*
store %struct.tm* %0, %struct.tm** %2
%4 = call i8* @dnk_calloc(i32 255, i32 1)
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = load %struct.tm*, %struct.tm** %2
%7 = call i32 @strftime(i8* %5, i32 255, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), %struct.tm* %6)
%8 = load i8*, i8** %3
ret i8* %8
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@.str = [25 x i8] c"%a, %d %b %Y %H:%M:%S %Z\00"
define i8* @dnk_date_time_fmtd(%struct.tm* %0) {
%2 = tail call i8* @dnk_calloc(i32 255, i32 1)
%3 = tail call i32 @strftime(i8* %2, i32 255, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), %struct.tm* %0)
ret i8* %2
}
/* Variables and functions */
char *index(char *, char);
int /*<<< orphan*/ strcpy(char *, char *);
void get_id(char *buf, char *id) {
  char *ptr;
  if (!buf || !id)
    return;
  ptr = index(buf, ')') + 1;
  *ptr = 0;
  strcpy(id, buf);
  *ptr = ' ';
  return;
}


x86 assembly (clang, -O0):
<get_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1146 <get_id+0x26>
cmpq   $0x0,-0x10(%rbp)
jne    114b <get_id+0x2b>
jmp    117c <get_id+0x5c>
mov    -0x8(%rbp),%rdi
mov    $0x29,%esi
call   1040 <index@plt>
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
movb   $0x20,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_id>:
push   %r15
push   %r14
push   %rbx
test   %rdi,%rdi
je     1156 <get_id+0x36>
mov    %rsi,%r14
test   %rsi,%rsi
je     1156 <get_id+0x36>
mov    %rdi,%rbx
mov    $0x29,%esi
call   1040 <index@plt>
mov    %rax,%r15
movb   $0x0,0x1(%rax)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <strcpy@plt>
movb   $0x20,0x1(%r15)
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @get_id(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8*, i8** %4
%10 = icmp ne i8* %9, null
br i1 %10, label %12, label %11
11: ; preds = %8, %2
br label %21
12: ; preds = %8
%13 = load i8*, i8** %3
%14 = call i8* @index(i8* %13, i8 signext 41)
%15 = getelementptr inbounds i8, i8* %14, i64 1
store i8* %15, i8** %5
%16 = load i8*, i8** %5
store i8 0, i8* %16
%17 = load i8*, i8** %4
%18 = load i8*, i8** %3
%19 = call i32 @strcpy(i8* %17, i8* %18)
%20 = load i8*, i8** %5
store i8 32, i8* %20
br label %21
21: ; preds = %12, %11
ret void
}

LLVM IR (-O2):
define void @get_id(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = tail call i8* @index(i8* %0, i8 signext 41)
%8 = getelementptr inbounds i8, i8* %7, i64 1
store i8 0, i8* %8
%9 = tail call i32 @strcpy(i8* %1, i8* %0)
store i8 32, i8* %8
br label %10
10: ; preds = %2, %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(unsigned char *, unsigned char *, unsigned int);
int RSA_padding_add_none(unsigned char *to, int tlen, unsigned char *from,
                         int flen) {
  if (flen > tlen)
    return (0);
  if (flen < tlen)
    return (0);
  memcpy(to, from, (unsigned int)flen);
  return (1);
}


x86 assembly (clang, -O0):
<RSA_padding_add_none>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    -0x24(%rbp),%eax
cmp    -0x14(%rbp),%eax
jle    113e <RSA_padding_add_none+0x2e>
movl   $0x0,-0x4(%rbp)
jmp    116d <RSA_padding_add_none+0x5d>
mov    -0x24(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1156 <RSA_padding_add_none+0x46>
movl   $0x0,-0x4(%rbp)
jmp    116d <RSA_padding_add_none+0x5d>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x24(%rbp),%edx
call   1030 <memcpy@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RSA_padding_add_none>:
xor    %eax,%eax
cmp    %esi,%ecx
jne    112a <RSA_padding_add_none+0x1a>
push   %rax
mov    %rdx,%rsi
mov    %ecx,%edx
call   1030 <memcpy@plt>
mov    $0x1,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @RSA_padding_add_none(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
store i8* %0, i8** %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
%10 = load i32, i32* %9
%11 = load i32, i32* %7
%12 = icmp sgt i32 %10, %11
br i1 %12, label %13, label %14
13: ; preds = %4
store i32 0, i32* %5
br label %24
14: ; preds = %4
%15 = load i32, i32* %9
%16 = load i32, i32* %7
%17 = icmp slt i32 %15, %16
br i1 %17, label %18, label %19
18: ; preds = %14
store i32 0, i32* %5
br label %24
19: ; preds = %14
%20 = load i8*, i8** %6
%21 = load i8*, i8** %8
%22 = load i32, i32* %9
%23 = call i32 @memcpy(i8* %20, i8* %21, i32 %22)
store i32 1, i32* %5
br label %24
24: ; preds = %19, %18, %13
%25 = load i32, i32* %5
ret i32 %25
}

LLVM IR (-O2):
define i32 @RSA_padding_add_none(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = icmp eq i32 %3, %1
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @memcpy(i8* %0, i8* %2, i32 %3)
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ 1, %6 ], [ 0, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ puts(int /*<<< orphan*/);
int /*<<< orphan*/ strupr(char *);
int main(int argc, char *argv[]) {
  puts(strupr("abc"));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
call   1040 <strupr@plt>
mov    %eax,%edi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <strupr@plt>
mov    %eax,%edi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"abc\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @strupr(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @puts(i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"abc\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @strupr(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @puts(i32 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ psmi_mq_mtucpy(void *, void const *, size_t);
void *psmi_memcpyo(void *dst, const void *src, size_t n) {
  psmi_mq_mtucpy(dst, src, n);
  return dst;
}


x86 assembly (clang, -O0):
<psmi_memcpyo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <psmi_mq_mtucpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psmi_memcpyo>:
push   %rbx
mov    %rdi,%rbx
call   1030 <psmi_mq_mtucpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @psmi_memcpyo(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @psmi_mq_mtucpy(i8* %7, i8* %8, i64 %9)
%11 = load i8*, i8** %4
ret i8* %11
}

LLVM IR (-O2):
define i8* @psmi_memcpyo(i8* returned %0, i8* %1, i64 %2) {
%4 = tail call i32 @psmi_mq_mtucpy(i8* %0, i8* %1, i64 %2)
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ EchoP__uart0__putDone();
void HalCC2430SimpleUartP__uart0__putDone(void) { EchoP__uart0__putDone(); }


x86 assembly (clang, -O0):
<HalCC2430SimpleUartP__uart0__putDone>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <EchoP__uart0__putDone@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HalCC2430SimpleUartP__uart0__putDone>:
xor    %eax,%eax
jmp    1030 <EchoP__uart0__putDone@plt>

LLVM IR (-O0):
define void @HalCC2430SimpleUartP__uart0__putDone() {
%1 = call i32 (...) @EchoP__uart0__putDone()
ret void
}

LLVM IR (-O2):
define void @HalCC2430SimpleUartP__uart0__putDone() {
%1 = tail call i32 (...) @EchoP__uart0__putDone()
ret void
}
int dir_sep(unsigned char x) { return x == '/'; }


x86 assembly (clang, -O0):
<dir_sep>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x2f,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dir_sep>:
xor    %eax,%eax
cmp    $0x2f,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @dir_sep(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp eq i32 %4, 47
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @dir_sep(i8 zeroext %0) {
%2 = icmp eq i8 %0, 47
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: fauxmezz <ipcfile> <frame0> [frame1 frame2]\n"
                  "\n"
                  "Fake mezzanine that updates an IPC file with frame\n"
                  "data from a separate run of mezzanine.  It is intended\n"
                  "for use with mezzcal, simply start this program with\n"
                  "the list of frames you wish to examine and then direct\n"
                  "mezzcal to this program's IPC file.\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [303 x i8] c"Usage: fauxmezz <ipcfile> <frame0> [frame1 frame2]\0A\0AFake mezzanine that updates an IPC file with frame\0Adata from a separate run of mezzanine. It is intended\0Afor use with mezzcal, simply start this program with\0Athe list of frames you wish to examine and then direct\0Amezzcal to this program's IPC file.\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([303 x i8], [303 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [303 x i8] c"Usage: fauxmezz <ipcfile> <frame0> [frame1 frame2]\0A\0AFake mezzanine that updates an IPC file with frame\0Adata from a separate run of mezzanine. It is intended\0Afor use with mezzcal, simply start this program with\0Athe list of frames you wish to examine and then direct\0Amezzcal to this program's IPC file.\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([303 x i8], [303 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ addFoncT(char *, void (*)(), int /*<<< orphan*/, int);
void addFonM(char *l, void (*f)(void)) { addFoncT(l, f, 0, 2); }


x86 assembly (clang, -O0):
<addFonM>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
mov    $0x2,%ecx
call   1030 <addFoncT@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addFonM>:
xor    %edx,%edx
mov    $0x2,%ecx
jmp    1030 <addFoncT@plt>

LLVM IR (-O0):
define void @addFonM(i8* %0, void ()* %1) {
%3 = alloca i8*
%4 = alloca void ()*
store i8* %0, i8** %3
store void ()* %1, void ()** %4
%5 = load i8*, i8** %3
%6 = load void ()*, void ()** %4
%7 = bitcast void ()* %6 to void (...)*
%8 = call i32 @addFoncT(i8* %5, void (...)* %7, i32 0, i32 2)
ret void
}

LLVM IR (-O2):
define void @addFonM(i8* %0, void ()* %1) {
%3 = bitcast void ()* %1 to void (...)*
%4 = tail call i32 @addFoncT(i8* %0, void (...)* %3, i32 0, i32 2)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ set_black(int *, int);
int /*<<< orphan*/ set_white(int *, int);
void set_bw(uint8_t *bw, int i, uint8_t val) {
  if (val > 127) {
    set_black(bw, i);
  } else {
    set_white(bw, i);
  }
}


x86 assembly (clang, -O0):
<set_bw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x7f,-0x10(%rbp)
jle    114d <set_bw+0x2d>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <set_black@plt>
jmp    1159 <set_bw+0x39>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <set_white@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_bw>:
cmp    $0x80,%edx
jl     112d <set_bw+0xd>
jmp    1030 <set_black@plt>
jmp    1040 <set_white@plt>

LLVM IR (-O0):
define void @set_bw(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp sgt i32 %7, 127
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i32*, i32** %4
%11 = load i32, i32* %5
%12 = call i32 @set_black(i32* %10, i32 %11)
br label %17
13: ; preds = %3
%14 = load i32*, i32** %4
%15 = load i32, i32* %5
%16 = call i32 @set_white(i32* %14, i32 %15)
br label %17
17: ; preds = %13, %9
ret void
}

LLVM IR (-O2):
define void @set_bw(i32* %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, 127
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @set_black(i32* %0, i32 %1)
br label %9
7: ; preds = %3
%8 = tail call i32 @set_white(i32* %0, i32 %1)
br label %9
9: ; preds = %7, %5
ret void
}
/* Variables and functions */
double sqrt(int);
double stat_stddev(double *, int);
double stat_stderr(double *data, int size) {
  return stat_stddev(data, size) / sqrt(size);
}


x86 assembly (clang, -O0):
<stat_stderr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <stat_stddev@plt>
movsd  %xmm0,-0x18(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <sqrt@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stat_stderr>:
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ebx
call   1030 <stat_stddev@plt>
movsd  %xmm0,0x8(%rsp)
mov    %ebx,%edi
call   1040 <sqrt@plt>
movsd  0x8(%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @stat_stderr(double* %0, i32 %1) {
%3 = alloca double*
%4 = alloca i32
store double* %0, double** %3
store i32 %1, i32* %4
%5 = load double*, double** %3
%6 = load i32, i32* %4
%7 = call double @stat_stddev(double* %5, i32 %6)
%8 = load i32, i32* %4
%9 = call double @sqrt(i32 %8)
%10 = fdiv double %7, %9
ret double %10
}

LLVM IR (-O2):
define double @stat_stderr(double* %0, i32 %1) {
%3 = tail call double @stat_stddev(double* %0, i32 %1)
%4 = tail call double @sqrt(i32 %1)
%5 = fdiv double %3, %4
ret double %5
}
char *path_base(char *path) {
  char *ret = path;
  for (char *p = path; *p != '\0'; p++)
    if (*p == '/')
      ret = p + 1;
  if (*ret == '\0')
    ret = path;
  return ret;
}


x86 assembly (clang, -O0):
<path_base>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     115a <path_base+0x5a>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2f,%eax
jne    1144 <path_base+0x44>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1149 <path_base+0x49>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1118 <path_base+0x18>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1172 <path_base+0x72>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<path_base>:
mov    %rdi,%rax
lea    0x1(%rdi),%rcx
mov    %rdi,%rsi
jmp    1117 <path_base+0x17>
nopl   0x0(%rax)
mov    %rcx,%rsi
add    $0x1,%rcx
movzbl -0x1(%rcx),%edx
cmp    $0x2f,%dl
je     1110 <path_base+0x10>
test   %dl,%dl
jne    1113 <path_base+0x13>
cmpb   $0x0,(%rsi)
cmovne %rsi,%rax
ret

LLVM IR (-O0):
define i8* @path_base(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
%6 = load i8*, i8** %2
store i8* %6, i8** %4
br label %7
7: ; preds = %21, %1
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %24
12: ; preds = %7
%13 = load i8*, i8** %4
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 47
br i1 %16, label %17, label %20
17: ; preds = %12
%18 = load i8*, i8** %4
%19 = getelementptr inbounds i8, i8* %18, i64 1
store i8* %19, i8** %3
br label %20
20: ; preds = %17, %12
br label %21
21: ; preds = %20
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %4
br label %7
24: ; preds = %7
%25 = load i8*, i8** %3
%26 = load i8, i8* %25
%27 = sext i8 %26 to i32
%28 = icmp eq i32 %27, 0
br i1 %28, label %29, label %31
29: ; preds = %24
%30 = load i8*, i8** %2
store i8* %30, i8** %3
br label %31
31: ; preds = %29, %24
%32 = load i8*, i8** %3
ret i8* %32
}

LLVM IR (-O2):
define i8* @path_base(i8* %0) {
br label %2
2: ; preds = %12, %1
%3 = phi i8* [ %0, %1 ], [ %13, %12 ]
%4 = phi i8* [ %0, %1 ], [ %14, %12 ]
%5 = load i8, i8* %4
switch i8 %5, label %12 [
i8 0, label %6
i8 47, label %10
]
6: ; preds = %2
%7 = load i8, i8* %3
%8 = icmp eq i8 %7, 0
%9 = select i1 %8, i8* %0, i8* %3
ret i8* %9
10: ; preds = %2
%11 = getelementptr inbounds i8, i8* %4, i64 1
br label %12
12: ; preds = %2, %10
%13 = phi i8* [ %11, %10 ], [ %3, %2 ]
%14 = getelementptr inbounds i8, i8* %4, i64 1
br label %2
}
/* Type definitions */
typedef char *int64_t;

/* Variables and functions */
int64_t neg64(int64_t in) {
  int64_t out;
  asm("neg %%rax" : "=a"(out) : "0"(in));
  return out;
}


x86 assembly (clang, -O0):
<neg64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
neg    %rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<neg64>:
mov    %rdi,%rax
neg    %rax
ret

LLVM IR (-O0):
define i8* @neg64(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* asm "neg %rax", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define i8* @neg64(i8* readnone %0) {
%2 = tail call i8* asm "neg %rax", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
int game_quit() { return 0; }


x86 assembly (clang, -O0):
<game_quit>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<game_quit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @game_quit() {
ret i32 0
}

LLVM IR (-O2):
define i32 @game_quit() {
ret i32 0
}
/* Variables and functions */
int compare_int(const void *k1, const void *k2) {
  return (intptr_t)k1 != (intptr_t)k2;
}


x86 assembly (clang, -O0):
<compare_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmp    %rcx,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_int>:
xor    %eax,%eax
cmp    %rsi,%rdi
setne  %al
ret

LLVM IR (-O0):
define i32 @compare_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i64
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i64
%9 = icmp ne i64 %6, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @compare_int(i8* readnone %0, i8* readnone %1) {
%3 = icmp ne i8* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ notifyEvent(char *, int, int, void *);
void sesc_preevent(int vaddr, int type, void *sptr) {
  notifyEvent("sesc_preevent", vaddr, type, sptr);
}


x86 assembly (clang, -O0):
<sesc_preevent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0x10(%rbp),%rcx
lea    0xecd(%rip),%rdi
call   1030 <notifyEvent@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sesc_preevent>:
mov    %rdx,%rcx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee2(%rip),%rdi
jmp    1030 <notifyEvent@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"sesc_preevent\00"
define void @sesc_preevent(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @notifyEvent(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8, i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"sesc_preevent\00"
define void @sesc_preevent(i32 %0, i32 %1, i8* %2) {
%4 = tail call i32 @notifyEvent(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i8* %2)
ret void
}
void d003s(n) int n;
{
  int i, j;
#pragma omp parallel default(shared)
  {
#pragma omp for
    for (i = 0; i < n; i++) {
#pragma omp parallel shared(i, n)
#pragma omp for
      for (j = 0; j < n; j++)
        work(i, j);
    }
  }
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    116f <d003s+0x5f>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    115c <d003s+0x4c>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
mov    $0x0,%al
call   1030 <work@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1135 <d003s+0x25>
jmp    1161 <d003s+0x51>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <d003s+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rbp
push   %r14
push   %rbx
test   %edi,%edi
jle    114b <d003s+0x3b>
mov    %edi,%r14d
xor    %ebp,%ebp
nopl   (%rax)
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %ebp,%edi
mov    %ebx,%esi
xor    %eax,%eax
call   1030 <work@plt>
add    $0x1,%ebx
cmp    %ebx,%r14d
jne    1130 <d003s+0x20>
add    $0x1,%ebp
cmp    %r14d,%ebp
jne    1120 <d003s+0x10>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @d003s(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %22, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %25
9: ; preds = %5
store i32 0, i32* %4
br label %10
10: ; preds = %18, %9
%11 = load i32, i32* %4
%12 = load i32, i32* %2
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %21
14: ; preds = %10
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = call i32 (i32, i32, ...) bitcast (i32 (...)* @work to i32 (i32, i32, ...)*)(i32 %15, i32 %16)
br label %18
18: ; preds = %14
%19 = load i32, i32* %4
%20 = add nsw i32 %19, 1
store i32 %20, i32* %4
br label %10
21: ; preds = %10
br label %22
22: ; preds = %21
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
br label %5
25: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @d003s(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %13
3: ; preds = %1, %10
%4 = phi i32 [ %11, %10 ], [ 0, %1 ]
br label %5
5: ; preds = %3, %5
%6 = phi i32 [ %8, %5 ], [ 0, %3 ]
%7 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @work to i32 (i32, i32, ...)*)(i32 %4, i32 %6)
%8 = add nuw nsw i32 %6, 1
%9 = icmp eq i32 %8, %0
br i1 %9, label %10, label %5
10: ; preds = %5
%11 = add nuw nsw i32 %4, 1
%12 = icmp eq i32 %11, %0
br i1 %12, label %13, label %3
13: ; preds = %10, %1
ret void
}
/* Type definitions */
struct sockaddr_in {
  int /*<<< orphan*/ sin_addr;
};

/* Variables and functions */
int /*<<< orphan*/ inet_ntoa(int /*<<< orphan*/);
int /*<<< orphan*/ strncmp(int /*<<< orphan*/, char *, int);
int antpservd_validateAddr(struct sockaddr_in addr) {
  if (!strncmp(inet_ntoa(addr.sin_addr), "206.17.", 7))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<antpservd_validateAddr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <inet_ntoa@plt>
mov    %eax,%edi
lea    0xec4(%rip),%rsi
mov    $0x7,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%eax
jne    115b <antpservd_validateAddr+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1162 <antpservd_validateAddr+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<antpservd_validateAddr>:
push   %rax
call   1040 <inet_ntoa@plt>
lea    0xed3(%rip),%rsi
mov    %eax,%edi
mov    $0x7,%edx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
@.str = [8 x i8] c"206.17.\00"
define i32 @antpservd_validateAddr(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.sockaddr_in
%4 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %3, i32 0, i32 0
store i32 %0, i32* %4
%5 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %3, i32 0, i32 0
%6 = load i32, i32* %5
%7 = call i32 @inet_ntoa(i32 %6)
%8 = call i32 @strncmp(i32 %7, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %1
store i32 1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [8 x i8] c"206.17.\00"
define i32 @antpservd_validateAddr(i32 %0) {
%2 = tail call i32 @inet_ntoa(i32 %0)
%3 = tail call i32 @strncmp(i32 %2, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 7)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
struct gb_module {
  int dummy;
};
struct device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ kfree(struct gb_module *);
struct gb_module *to_gb_module(struct device *);
void gb_module_release(struct device *dev) {
  struct gb_module *module = to_gb_module(dev);
  kfree(module);
}


x86 assembly (clang, -O0):
<gb_module_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <to_gb_module@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <kfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gb_module_release>:
push   %rax
call   1030 <to_gb_module@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <kfree@plt>

LLVM IR (-O0):
%struct.device = type { i32 }
%struct.gb_module = type { i32 }
define void @gb_module_release(%struct.device* %0) {
%2 = alloca %struct.device*
%3 = alloca %struct.gb_module*
store %struct.device* %0, %struct.device** %2
%4 = load %struct.device*, %struct.device** %2
%5 = call %struct.gb_module* @to_gb_module(%struct.device* %4)
store %struct.gb_module* %5, %struct.gb_module** %3
%6 = load %struct.gb_module*, %struct.gb_module** %3
%7 = call i32 @kfree(%struct.gb_module* %6)
ret void
}

LLVM IR (-O2):
%struct.device = type { i32 }
%struct.gb_module = type { i32 }
define void @gb_module_release(%struct.device* %0) {
%2 = tail call %struct.gb_module* @to_gb_module(%struct.device* %0)
%3 = tail call i32 @kfree(%struct.gb_module* %2)
ret void
}
unsigned int m2u32(unsigned int *src) {
  unsigned char *a = ((unsigned char *)src);
  unsigned char *b = ((unsigned char *)src) + 1;
  unsigned char *c = ((unsigned char *)src) + 2;
  unsigned char *d = ((unsigned char *)src) + 3;
  return ((unsigned int)(*d)) + (((unsigned int)(*c)) << 8) +
         (((unsigned int)(*b)) << 16) + (((unsigned int)(*a)) << 24);
}


x86 assembly (clang, -O0):
<m2u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
add    $0x3,%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
movzbl (%rax),%eax
mov    -0x20(%rbp),%rcx
movzbl (%rcx),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
mov    -0x18(%rbp),%rcx
movzbl (%rcx),%ecx
shl    $0x10,%ecx
add    %ecx,%eax
mov    -0x10(%rbp),%rcx
movzbl (%rcx),%ecx
shl    $0x18,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<m2u32>:
mov    (%rdi),%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @m2u32(i32* %0) {
%2 = alloca i32*
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i32* %0, i32** %2
%7 = load i32*, i32** %2
%8 = bitcast i32* %7 to i8*
store i8* %8, i8** %3
%9 = load i32*, i32** %2
%10 = bitcast i32* %9 to i8*
%11 = getelementptr inbounds i8, i8* %10, i64 1
store i8* %11, i8** %4
%12 = load i32*, i32** %2
%13 = bitcast i32* %12 to i8*
%14 = getelementptr inbounds i8, i8* %13, i64 2
store i8* %14, i8** %5
%15 = load i32*, i32** %2
%16 = bitcast i32* %15 to i8*
%17 = getelementptr inbounds i8, i8* %16, i64 3
store i8* %17, i8** %6
%18 = load i8*, i8** %6
%19 = load i8, i8* %18
%20 = zext i8 %19 to i32
%21 = load i8*, i8** %5
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = shl i32 %23, 8
%25 = add i32 %20, %24
%26 = load i8*, i8** %4
%27 = load i8, i8* %26
%28 = zext i8 %27 to i32
%29 = shl i32 %28, 16
%30 = add i32 %25, %29
%31 = load i8*, i8** %3
%32 = load i8, i8* %31
%33 = zext i8 %32 to i32
%34 = shl i32 %33, 24
%35 = add i32 %30, %34
ret i32 %35
}

LLVM IR (-O2):
define i32 @m2u32(i32* nocapture %0) {
%2 = bitcast i32* %0 to i8*
%3 = getelementptr inbounds i8, i8* %2, i64 1
%4 = getelementptr inbounds i8, i8* %2, i64 2
%5 = getelementptr inbounds i8, i8* %2, i64 3
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = load i8, i8* %4
%9 = zext i8 %8 to i32
%10 = shl nuw nsw i32 %9, 8
%11 = or i32 %10, %7
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = shl nuw nsw i32 %13, 16
%15 = or i32 %11, %14
%16 = load i8, i8* %2
%17 = zext i8 %16 to i32
%18 = shl nuw i32 %17, 24
%19 = or i32 %15, %18
ret i32 %19
}
/* Type definitions */
struct tm {
  int tm_mon;
};

/* Variables and functions */
unsigned Sys_Month(void *t) { return ((struct tm *)t)->tm_mon + 1; }


x86 assembly (clang, -O0):
<Sys_Month>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sys_Month>:
mov    (%rdi),%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i32 @Sys_Month(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.tm*
%5 = getelementptr inbounds %struct.tm, %struct.tm* %4, i32 0, i32 0
%6 = load i32, i32* %5
%7 = add nsw i32 %6, 1
ret i32 %7
}

LLVM IR (-O2):
define i32 @Sys_Month(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
ret i32 %4
}
float makeIntoDollars(int cents) { return cents / 100.0; }


x86 assembly (clang, -O0):
<makeIntoDollars>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xeec(%rip),%xmm1
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<makeIntoDollars>:
cvtsi2sd %edi,%xmm0
divsd  0xef4(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @makeIntoDollars(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sitofp i32 %3 to double
%5 = fdiv double %4, 1.000000e+02
%6 = fptrunc double %5 to float
ret float %6
}

LLVM IR (-O2):
define float @makeIntoDollars(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = fdiv double %2, 1.000000e+02
%4 = fptrunc double %3 to float
ret float %4
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
void print_l_N(int64_t number) { printf("%ld\n", number); }


x86 assembly (clang, -O0):
<print_l_N>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_l_N>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%ld\0A\00"
define void @print_l_N(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%ld\0A\00"
define void @print_l_N(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lcd_putchar(int /*<<< orphan*/, int, char, int);
void lcd_puts(char *string, int forground_color,
              char background_color_activation, int background_color) {
  while (*string)
    lcd_putchar(*string++, forground_color, background_color_activation,
                background_color);
}


x86 assembly (clang, -O0):
<lcd_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %al,-0xd(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     115c <lcd_puts+0x4c>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
mov    -0xc(%rbp),%esi
mov    -0xd(%rbp),%al
mov    -0x14(%rbp),%ecx
movsbl %al,%edx
call   1030 <lcd_putchar@plt>
jmp    1127 <lcd_puts+0x17>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_puts>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     114b <lcd_puts+0x3b>
mov    %ecx,%r14d
mov    %esi,%r15d
mov    %rdi,%rbx
add    $0x1,%rbx
movsbl %dl,%ebp
nopl   (%rax)
movsbl %al,%edi
mov    %r15d,%esi
mov    %ebp,%edx
mov    %r14d,%ecx
call   1030 <lcd_putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <lcd_puts+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @lcd_puts(i8* %0, i32 %1, i8 signext %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8 %2, i8* %7
store i32 %3, i32* %8
br label %9
9: ; preds = %13, %4
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
%12 = icmp ne i8 %11, 0
br i1 %12, label %13, label %22
13: ; preds = %9
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %5
%16 = load i8, i8* %14
%17 = sext i8 %16 to i32
%18 = load i32, i32* %6
%19 = load i8, i8* %7
%20 = load i32, i32* %8
%21 = call i32 @lcd_putchar(i32 %17, i32 %18, i8 signext %19, i32 %20)
br label %9
22: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @lcd_puts(i8* nocapture %0, i32 %1, i8 signext %2, i32 %3) {
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %4, %7
%8 = phi i8 [ %13, %7 ], [ %5, %4 ]
%9 = phi i8* [ %10, %7 ], [ %0, %4 ]
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = sext i8 %8 to i32
%12 = tail call i32 @lcd_putchar(i32 %11, i32 %1, i8 signext %2, i32 %3)
%13 = load i8, i8* %10
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %7
15: ; preds = %7, %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ PKCS7;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ PKCS7_it;
scalar_t__ SMIME_read_ASN1(int /*<<< orphan*/ *, int /*<<< orphan*/ **,
                           int /*<<< orphan*/ *);
PKCS7 *SMIME_read_PKCS7(BIO *bio, BIO **bcont) {
  return (PKCS7 *)SMIME_read_ASN1(bio, bcont, &PKCS7_it);
}


x86 assembly (clang, -O0):
<SMIME_read_PKCS7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb1(%rip),%rdx
call   1030 <SMIME_read_ASN1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SMIME_read_PKCS7>:
mov    0x2ec9(%rip),%rdx
jmp    1030 <SMIME_read_ASN1@plt>

LLVM IR (-O0):
@PKCS7_it = global i32 0
define i32* @SMIME_read_PKCS7(i32* %0, i32** %1) {
%3 = alloca i32*
%4 = alloca i32**
store i32* %0, i32** %3
store i32** %1, i32*** %4
%5 = load i32*, i32** %3
%6 = load i32**, i32*** %4
%7 = call i64 @SMIME_read_ASN1(i32* %5, i32** %6, i32* @PKCS7_it)
%8 = inttoptr i64 %7 to i32*
ret i32* %8
}

LLVM IR (-O2):
@PKCS7_it = global i32 0
define i32* @SMIME_read_PKCS7(i32* %0, i32** %1) {
%3 = tail call i64 @SMIME_read_ASN1(i32* %0, i32** %1, i32* @PKCS7_it)
%4 = inttoptr i64 %3 to i32*
ret i32* %4
}
int smull_fxp16(int x, int y) {
  return (int)(((long long)x * (long long)y) >> 16);
}


x86 assembly (clang, -O0):
<smull_fxp16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movslq -0x4(%rbp),%rax
movslq -0x8(%rbp),%rcx
imul   %rcx,%rax
sar    $0x10,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smull_fxp16>:
movslq %edi,%rcx
movslq %esi,%rax
imul   %rcx,%rax
shr    $0x10,%rax
ret

LLVM IR (-O0):
define i32 @smull_fxp16(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = sext i32 %5 to i64
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = mul nsw i64 %6, %8
%10 = ashr i64 %9, 16
%11 = trunc i64 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @smull_fxp16(i32 %0, i32 %1) {
%3 = sext i32 %0 to i64
%4 = sext i32 %1 to i64
%5 = mul nsw i64 %4, %3
%6 = lshr i64 %5, 16
%7 = trunc i64 %6 to i32
ret i32 %7
}
void PEM_ASN1_write_bio(void) {}


x86 assembly (clang, -O0):
<PEM_ASN1_write_bio>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PEM_ASN1_write_bio>:
ret

LLVM IR (-O0):
define void @PEM_ASN1_write_bio() {
ret void
}

LLVM IR (-O2):
define void @PEM_ASN1_write_bio() {
ret void
}
void foo546() {}


x86 assembly (clang, -O0):
<foo546>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo546>:
ret

LLVM IR (-O0):
define void @foo546() {
ret void
}

LLVM IR (-O2):
define void @foo546() {
ret void
}
int fun337() { return 337; }


x86 assembly (clang, -O0):
<fun337>:
push   %rbp
mov    %rsp,%rbp
mov    $0x151,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun337>:
mov    $0x151,%eax
ret

LLVM IR (-O0):
define i32 @fun337() {
ret i32 337
}

LLVM IR (-O2):
define i32 @fun337() {
ret i32 337
}
void matfree(float **mat) {
  int i;
  for (i = 0; i < 4; i++)
    free(mat[i]);
  free(mat);
}


x86 assembly (clang, -O0):
<matfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x4,-0xc(%rbp)
jge    114c <matfree+0x3c>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <matfree+0x13>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<matfree>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
mov    0x8(%rbx),%rdi
call   1030 <free@plt>
mov    0x10(%rbx),%rdi
call   1030 <free@plt>
mov    0x18(%rbx),%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @matfree(float** %0) {
%2 = alloca float**
%3 = alloca i32
store float** %0, float*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 4
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load float**, float*** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds float*, float** %8, i64 %10
%12 = load float*, float** %11
%13 = bitcast float* %12 to i8*
br label %14
14: ; preds = %7
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %4
17: ; preds = %4
%18 = load float**, float*** %2
%19 = bitcast float** %18 to i8*
ret void
}

LLVM IR (-O2):
define void @matfree(float** nocapture %0) {
%2 = bitcast float** %0 to i8**
%3 = load i8*, i8** %2
tail call void @free(i8* %3)
%4 = getelementptr inbounds float*, float** %0, i64 1
%5 = bitcast float** %4 to i8**
%6 = load i8*, i8** %5
tail call void @free(i8* %6)
%7 = getelementptr inbounds float*, float** %0, i64 2
%8 = bitcast float** %7 to i8**
%9 = load i8*, i8** %8
tail call void @free(i8* %9)
%10 = getelementptr inbounds float*, float** %0, i64 3
%11 = bitcast float** %10 to i8**
%12 = load i8*, i8** %11
tail call void @free(i8* %12)
%13 = bitcast float** %0 to i8*
tail call void @free(i8* %13)
ret void
}
float signf(float d) { return d < 0 ? -1 : 1; }


x86 assembly (clang, -O0):
<signf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm1
xorps  %xmm0,%xmm0
mov    $0x1,%eax
mov    $0xffffffff,%ecx
ucomiss %xmm1,%xmm0
cmova  %ecx,%eax
cvtsi2ss %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<signf>:
xorps  %xmm1,%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
seta   %al
lea    0xeee(%rip),%rcx
movss  (%rcx,%rax,4),%xmm0
ret

LLVM IR (-O0):
define float @signf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp olt float %3, 0.000000e+00
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 -1, i32 1
%7 = sitofp i32 %6 to float
ret float %7
}

LLVM IR (-O2):
define float @signf(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
%3 = select i1 %2, float -1.000000e+00, float 1.000000e+00
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ snoopy_configuration_dtor();
int /*<<< orphan*/ snoopy_inputdatastorage_dtor();
void snoopy_cleanup() {
  snoopy_inputdatastorage_dtor();
  snoopy_configuration_dtor();
}


x86 assembly (clang, -O0):
<snoopy_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <snoopy_inputdatastorage_dtor@plt>
mov    $0x0,%al
call   1030 <snoopy_configuration_dtor@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<snoopy_cleanup>:
push   %rax
xor    %eax,%eax
call   1040 <snoopy_inputdatastorage_dtor@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <snoopy_configuration_dtor@plt>

LLVM IR (-O0):
define void @snoopy_cleanup() {
%1 = call i32 (...) @snoopy_inputdatastorage_dtor()
%2 = call i32 (...) @snoopy_configuration_dtor()
ret void
}

LLVM IR (-O2):
define void @snoopy_cleanup() {
%1 = tail call i32 (...) @snoopy_inputdatastorage_dtor()
%2 = tail call i32 (...) @snoopy_configuration_dtor()
ret void
}
/* Variables and functions */
scalar_t__ alloca(int);
int /*<<< orphan*/ test10a(char *);
void __attribute__((no)) test10(void) {
  char *save = (char *)alloca(4);
  test10a(save);
}


x86 assembly (clang, -O0):
<test10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1030 <alloca@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <test10a@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test10>:
push   %rax
mov    $0x4,%edi
call   1030 <alloca@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <test10a@plt>

LLVM IR (-O0):
define void @test10() {
%1 = alloca i8*
%2 = call i64 @alloca(i32 4)
%3 = inttoptr i64 %2 to i8*
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = call i32 @test10a(i8* %4)
ret void
}

LLVM IR (-O2):
define void @test10() {
%1 = tail call i64 @alloca(i32 4)
%2 = inttoptr i64 %1 to i8*
%3 = tail call i32 @test10a(i8* %2)
ret void
}
void ReverseGPIOP$0$In$set(void) { HplMcs51GeneralIOC$P10$set(); }


x86 assembly (clang, -O0):
<ReverseGPIOP$0$In$set>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMcs51GeneralIOC$P10$set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReverseGPIOP$0$In$set>:
xor    %eax,%eax
jmp    1030 <HplMcs51GeneralIOC$P10$set@plt>

LLVM IR (-O0):
define void @"ReverseGPIOP$0$In$set"() {
%1 = call i32 (...) @"HplMcs51GeneralIOC$P10$set"()
ret void
}

LLVM IR (-O2):
define void @"ReverseGPIOP$0$In$set"() {
%1 = tail call i32 (...) @"HplMcs51GeneralIOC$P10$set"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void license() {
  printf("\n\n\tccmd  Copyright (C) 2012  Khaled Abdullah Khunaifer\n\tThis "
         "program comes with ABSOLUTELY NO WARRANTY; for how to use use "
         "`-h'.\n\tThis is free software, and you are welcome to redistribute "
         "it\n\tunder certain conditions; see license.txt for details.\n\n");
}


x86 assembly (clang, -O0):
<license>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<license>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [250 x i8] c"\0A\0A\09ccmd Copyright (C) 2012 Khaled Abdullah Khunaifer\0A\09This program comes with ABSOLUTELY NO WARRANTY; for how to use use `-h'.\0A\09This is free software, and you are welcome to redistribute it\0A\09under certain conditions; see license.txt for details.\0A\0A\00"
define void @license() {
%1 = call i32 @printf(i8* getelementptr inbounds ([250 x i8], [250 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [249 x i8] c"\0A\0A\09ccmd Copyright (C) 2012 Khaled Abdullah Khunaifer\0A\09This program comes with ABSOLUTELY NO WARRANTY; for how to use use `-h'.\0A\09This is free software, and you are welcome to redistribute it\0A\09under certain conditions; see license.txt for details.\0A\00"
define void @license() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([249 x i8], [249 x i8]* @str, i64 0, i64 0))
ret void
}
void clockevents_resume(void) {}


x86 assembly (clang, -O0):
<clockevents_resume>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clockevents_resume>:
ret

LLVM IR (-O0):
define void @clockevents_resume() {
ret void
}

LLVM IR (-O2):
define void @clockevents_resume() {
ret void
}