xunge/DecIR huggingface dataset:
feq(float x, float y) {
  if (x == y)
    return 13;
  else
    return 140;
}


x86 assembly (clang, -O0):
<feq>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jne    112f <feq+0x2f>
jp     112f <feq+0x2f>
movl   $0xd,-0x4(%rbp)
jmp    1136 <feq+0x36>
movl   $0x8c,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<feq>:
ucomiss %xmm1,%xmm0
setnp  %al
sete   %cl
test   %al,%cl
mov    $0xd,%ecx
mov    $0x8c,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @feq(float %0, float %1) {
%3 = alloca i32
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fcmp oeq float %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 13, i32* %3
br label %11
10: ; preds = %2
store i32 140, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @feq(float %0, float %1) {
%3 = fcmp oeq float %0, %1
%4 = select i1 %3, i32 13, i32 140
ret i32 %4
}
/* Variables and functions */
char *Com_SkipTokens(char *, int, char *);
int /*<<< orphan*/ Field_CompleteKeyname();
void Key_CompleteUnbind(char *args, int argNum) {
  if (argNum == 2) {
    char *p = Com_SkipTokens(args, 1, " ");
    if (p > args)
      Field_CompleteKeyname();
  }
}


x86 assembly (clang, -O0):
<Key_CompleteUnbind>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x2,-0xc(%rbp)
jne    116c <Key_CompleteUnbind+0x4c>
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
lea    0xeb7(%rip),%rdx
call   1030 <Com_SkipTokens@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jbe    1167 <Key_CompleteUnbind+0x47>
mov    $0x0,%al
call   1040 <Field_CompleteKeyname@plt>
jmp    116c <Key_CompleteUnbind+0x4c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Key_CompleteUnbind>:
cmp    $0x2,%esi
jne    1147 <Key_CompleteUnbind+0x27>
push   %rbx
mov    %rdi,%rbx
lea    0xed0(%rip),%rdx
mov    $0x1,%esi
call   1030 <Com_SkipTokens@plt>
cmp    %rbx,%rax
pop    %rbx
jbe    1147 <Key_CompleteUnbind+0x27>
xor    %eax,%eax
jmp    1040 <Field_CompleteKeyname@plt>
ret

LLVM IR (-O0):
@.str = [2 x i8] c" \00"
define void @Key_CompleteUnbind(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 2
br i1 %7, label %8, label %17
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = call i8* @Com_SkipTokens(i8* %9, i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = load i8*, i8** %3
%13 = icmp ugt i8* %11, %12
br i1 %13, label %14, label %16
14: ; preds = %8
%15 = call i32 (...) @Field_CompleteKeyname()
br label %16
16: ; preds = %14, %8
br label %17
17: ; preds = %16, %2
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c" \00"
define void @Key_CompleteUnbind(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 2
br i1 %3, label %4, label %9
4: ; preds = %2
%5 = tail call i8* @Com_SkipTokens(i8* %0, i32 1, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%6 = icmp ugt i8* %5, %0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i32 (...) @Field_CompleteKeyname()
br label %9
9: ; preds = %4, %7, %2
ret void
}
/* Variables and functions */
scalar_t__ calloc(size_t, int);
double entropy_internal(int *, int, size_t);
int makehist(char const *, int *, size_t);
double sc_entropy(const char *str, size_t len) {
  int *hist = (int *)calloc(len, sizeof(int));
  int histlen = makehist(str, hist, len);
  return entropy_internal(hist, histlen, len);
}


x86 assembly (clang, -O0):
<sc_entropy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x4,%esi
call   1050 <calloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <makehist@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x1c(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1040 <entropy_internal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sc_entropy>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
mov    $0x4,%esi
call   1050 <calloc@plt>
mov    %rax,%r15
mov    %r14,%rdi
mov    %rax,%rsi
mov    %rbx,%rdx
call   1030 <makehist@plt>
mov    %r15,%rdi
mov    %eax,%esi
mov    %rbx,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <entropy_internal@plt>

LLVM IR (-O0):
define double @sc_entropy(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32*
%6 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i64, i64* %4
%8 = call i64 @calloc(i64 %7, i32 4)
%9 = inttoptr i64 %8 to i32*
store i32* %9, i32** %5
%10 = load i8*, i8** %3
%11 = load i32*, i32** %5
%12 = load i64, i64* %4
%13 = call i32 @makehist(i8* %10, i32* %11, i64 %12)
store i32 %13, i32* %6
%14 = load i32*, i32** %5
%15 = load i32, i32* %6
%16 = load i64, i64* %4
%17 = call double @entropy_internal(i32* %14, i32 %15, i64 %16)
ret double %17
}

LLVM IR (-O2):
define double @sc_entropy(i8* %0, i64 %1) {
%3 = tail call i64 @calloc(i64 %1, i32 4)
%4 = inttoptr i64 %3 to i32*
%5 = tail call i32 @makehist(i8* %0, i32* %4, i64 %1)
%6 = tail call double @entropy_internal(i32* %4, i32 %5, i64 %1)
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ _vbx_sync();
void vbx_sync() { _vbx_sync(); }


x86 assembly (clang, -O0):
<vbx_sync>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_vbx_sync@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vbx_sync>:
xor    %eax,%eax
jmp    1030 <_vbx_sync@plt>

LLVM IR (-O0):
define void @vbx_sync() {
%1 = call i32 (...) @_vbx_sync()
ret void
}

LLVM IR (-O2):
define void @vbx_sync() {
%1 = tail call i32 (...) @_vbx_sync()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "touch: usage: touch [-alm] [-t time_t] <file>\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [47 x i8] c"touch: usage: touch [-alm] [-t time_t] <file>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [47 x i8] c"touch: usage: touch [-alm] [-t time_t] <file>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
void debug_msg(char *message) {}


x86 assembly (clang, -O0):
<debug_msg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_msg>:
ret

LLVM IR (-O0):
define void @debug_msg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @debug_msg(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcasecmp(char const *, char const *);
int string_cmp_nocase(const void *s1, const void *s2) {
  return !strcasecmp((const char *)s1, (const char *)s2);
}


x86 assembly (clang, -O0):
<string_cmp_nocase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcasecmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_cmp_nocase>:
push   %rax
call   1030 <strcasecmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @string_cmp_nocase(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcasecmp(i8* %5, i8* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @string_cmp_nocase(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcasecmp(i8* %0, i8* %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
int sum_digits_iter(int n) {
  int sum = 0;
  while (n > 0) {
    sum += n % 10;
    n = n / 10;
  }
  return sum;
}


x86 assembly (clang, -O0):
<sum_digits_iter>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    113c <sum_digits_iter+0x3c>
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
add    -0x8(%rbp),%edx
mov    %edx,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    110e <sum_digits_iter+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_digits_iter>:
xor    %eax,%eax
test   %edi,%edi
jle    112d <sum_digits_iter+0x2d>
mov    $0xcccccccd,%r8d
nopl   0x0(%rax)
mov    %edi,%edx
imul   %r8,%rdx
shr    $0x23,%rdx
lea    (%rdx,%rdx,1),%esi
lea    (%rsi,%rsi,4),%esi
mov    %edi,%ecx
sub    %esi,%ecx
add    %ecx,%eax
cmp    $0x9,%edi
mov    %edx,%edi
ja     1110 <sum_digits_iter+0x10>
ret

LLVM IR (-O0):
define i32 @sum_digits_iter(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %2
%9 = srem i32 %8, 10
%10 = load i32, i32* %3
%11 = add nsw i32 %10, %9
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = sdiv i32 %12, 10
store i32 %13, i32* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @sum_digits_iter(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %10
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = urem i32 %5, 10
%7 = add nuw nsw i32 %4, %6
%8 = udiv i32 %5, 10
%9 = icmp ult i32 %5, 10
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
unsigned int f76(unsigned int x, int y __attribute__((unused))) {
  return (x << (8 * sizeof(unsigned int) - 1)) + (x >> 1);
}


x86 assembly (clang, -O0):
<f76>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1f,%eax
mov    -0x4(%rbp),%ecx
shr    $0x1,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f76>:
mov    %edi,%eax
ror    %eax
ret

LLVM IR (-O0):
define i32 @f76(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 31
%7 = load i32, i32* %3
%8 = lshr i32 %7, 1
%9 = add i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @f76(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.fshl.i32(i32 %0, i32 %0, i32 31)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ e_comm_send(char *, char *, char *);
void error(char *type, char *command) {
  e_comm_send("Error (%s): %s\n", type, command);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <e_comm_send@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
jmp    1030 <e_comm_send@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"Error (%s): %s\0A\00"
define void @error(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @e_comm_send(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"Error (%s): %s\0A\00"
define void @error(i8* %0, i8* %1) {
%3 = tail call i32 @e_comm_send(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret void
}
int main(void) {
  int x;
  if (1 < 2)
    x = 1;
  else
    x = 2;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 1, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
unsigned taa_h264_info_len(unsigned code) {
  return code == 0 ? 0 : (31 - __builtin_clz(code));
}


x86 assembly (clang, -O0):
<taa_h264_info_len>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    111b <taa_h264_info_len+0x1b>
xor    %eax,%eax
mov    %eax,-0x8(%rbp)
jmp    112e <taa_h264_info_len+0x2e>
mov    -0x4(%rbp),%eax
bsr    %eax,%ecx
xor    $0x1f,%ecx
mov    $0x1f,%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<taa_h264_info_len>:
test   %edi,%edi
je     1108 <taa_h264_info_len+0x8>
bsr    %edi,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @taa_h264_info_len(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i32 @llvm.ctlz.i32(i32 %7, i1 true)
%9 = sub nsw i32 31, %8
br label %10
10: ; preds = %6, %5
%11 = phi i32 [ 0, %5 ], [ %9, %6 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @taa_h264_info_len(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.ctlz.i32(i32 %0, i1 true)
%5 = xor i32 %4, 31
br label %6
6: ; preds = %1, %3
%7 = phi i32 [ %5, %3 ], [ 0, %1 ]
ret i32 %7
}
void ff_hevc_put_hevc_bi_qpel_v64_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_v64_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_v64_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_v64_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_v64_12_sse4() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fgetc(int /*<<< orphan*/ *);
int getc(FILE *fp) { return (fgetc(fp)); }


x86 assembly (clang, -O0):
<getc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getc>:
jmp    1030 <fgetc@plt>

LLVM IR (-O0):
define i32 @getc(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fgetc(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @getc(i32* nocapture %0) {
%2 = tail call i32 @fgetc(i32* %0)
ret i32 %2
}
int test_imm_2Aint16_reg(short val) {
  return ((val) & (0x2A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Aint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x2a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Aint16_reg>:
test   $0x2a,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Aint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 42
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_2Aint16_reg(i16 signext %0) {
%2 = and i16 %0, 42
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ trap_R_RegisterShaderNoMip(char *);
void Login_Cache(void) { trap_R_RegisterShaderNoMip("menu/art/cut_frame"); }


x86 assembly (clang, -O0):
<Login_Cache>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <trap_R_RegisterShaderNoMip@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Login_Cache>:
lea    0xee9(%rip),%rdi
jmp    1030 <trap_R_RegisterShaderNoMip@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"menu/art/cut_frame\00"
define void @Login_Cache() {
%1 = call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"menu/art/cut_frame\00"
define void @Login_Cache() {
%1 = tail call i32 @trap_R_RegisterShaderNoMip(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
void idt_int16(void) { print("!! Coprocessor error "); }


x86 assembly (clang, -O0):
<idt_int16>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <print@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<idt_int16>:
lea    0xee9(%rip),%rdi
jmp    1030 <print@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"!! Coprocessor error \00"
define void @idt_int16() {
%1 = call i32 @print(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"!! Coprocessor error \00"
define void @idt_int16() {
%1 = tail call i32 @print(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret void
}
void rop3_165_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  stk1 = T ^ *D;
  stk1 = ~stk1;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_165_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_165_1_0>:
mov    (%rdi),%al
xor    %al,%dl
or     %sil,%dl
not    %dl
and    %sil,%al
or     %dl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_165_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8, i8* %6
%9 = zext i8 %8 to i32
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = xor i32 %9, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %7
%15 = load i8, i8* %7
%16 = zext i8 %15 to i32
%17 = xor i32 %16, -1
%18 = trunc i32 %17 to i8
store i8 %18, i8* %7
%19 = load i8, i8* %7
%20 = zext i8 %19 to i32
%21 = load i8, i8* %5
%22 = zext i8 %21 to i32
%23 = xor i32 %22, -1
%24 = and i32 %20, %23
%25 = load i8*, i8** %4
%26 = load i8, i8* %25
%27 = zext i8 %26 to i32
%28 = load i8, i8* %5
%29 = zext i8 %28 to i32
%30 = and i32 %27, %29
%31 = or i32 %24, %30
%32 = trunc i32 %31 to i8
%33 = load i8*, i8** %4
store i8 %32, i8* %33
ret void
}

LLVM IR (-O2):
define void @rop3_165_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, %2
%6 = or i8 %5, %1
%7 = xor i8 %6, -1
%8 = and i8 %4, %1
%9 = or i8 %8, %7
store i8 %9, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ UARTBaseValid(unsigned long);
void UARTRxErrorClear(unsigned long ulBase) {
  DEBUG_ASSERT(UARTBaseValid(ulBase));
  (*((volatile unsigned long *)(ulBase + 0x00000004))) = 0;
}


x86 assembly (clang, -O0):
<UARTRxErrorClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <UARTBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,0x4(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTRxErrorClear>:
push   %rbx
mov    %rdi,%rbx
call   1040 <UARTBaseValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
movq   $0x0,0x4(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @UARTRxErrorClear(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @UARTBaseValid(i64 %3)
%5 = call i32 @DEBUG_ASSERT(i32 %4)
%6 = load i64, i64* %2
%7 = add i64 %6, 4
%8 = inttoptr i64 %7 to i64*
store volatile i64 0, i64* %8
ret void
}

LLVM IR (-O2):
define void @UARTRxErrorClear(i64 %0) {
%2 = tail call i32 @UARTBaseValid(i64 %0)
%3 = tail call i32 @DEBUG_ASSERT(i32 %2)
%4 = add i64 %0, 4
%5 = inttoptr i64 %4 to i64*
store volatile i64 0, i64* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ loop();
int /*<<< orphan*/ setup();
int main(void) {
  setup();
  while (1) {
    loop();
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <setup@plt>
mov    $0x0,%al
call   1030 <loop@plt>
jmp    1136 <main+0x16>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <setup@plt>
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <loop@plt>
jmp    1130 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @setup()
br label %3
3: ; preds = %0, %3
%4 = call i32 (...) @loop()
br label %3
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @setup()
br label %2
2: ; preds = %0, %2
%3 = tail call i32 (...) @loop()
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ system(char *);
int main() {
  printf("Starting network server...\n");
  system("python /kovan/network/networkHandler.py");
  printf("Terminating server..\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1040 <printf@plt>
lea    0xeda(%rip),%rdi
call   1030 <system@plt>
lea    0xef6(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xf00(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
call   1040 <system@plt>
lea    0xf03(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"Starting network server...\0A\00"
@.str.1 = [40 x i8] c"python /kovan/network/networkHandler.py\00"
@.str.2 = [22 x i8] c"Terminating server..\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @system(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [40 x i8] c"python /kovan/network/networkHandler.py\00"
@str = [27 x i8] c"Starting network server...\00"
@str.3 = [21 x i8] c"Terminating server..\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str.3, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ RenderMeshii(unsigned long, unsigned long);
void zlRender(unsigned long first, unsigned long pcount) {
  RenderMeshii(first, pcount);
}


x86 assembly (clang, -O0):
<zlRender>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <RenderMeshii@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zlRender>:
jmp    1030 <RenderMeshii@plt>

LLVM IR (-O0):
define void @zlRender(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @RenderMeshii(i64 %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @zlRender(i64 %0, i64 %1) {
%3 = tail call i32 @RenderMeshii(i64 %0, i64 %1)
ret void
}
int test_imm_B6int8_reg(signed char val) {
  return ((val) & (0xB6 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B6int8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xb6,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B6int8_reg>:
test   $0xb6,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B6int8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 182
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B6int8_reg(i8 signext %0) {
%2 = and i8 %0, -74
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
unsigned long long unsignedlonglong_ignoring_signedshort(unsigned long long x,
                                                         signed short y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedlonglong_ignoring_signedshort>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedlonglong_ignoring_signedshort>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @unsignedlonglong_ignoring_signedshort(i64 %0, i16 signext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @unsignedlonglong_ignoring_signedshort(i64 returned %0, i16 signext %1) {
ret i64 %0
}
int main() {
  int i;
  int sum = 0;
  for (i = 0; i < 10; i++) {
    sum += i;
  }
  return sum;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    113a <main+0x3a>
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1119 <main+0x19>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2d,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
store i32 0, i32* %2
br label %4
4: ; preds = %11, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = add nsw i32 %9, %8
store i32 %10, i32* %3
br label %11
11: ; preds = %7
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @main() {
ret i32 45
}
void ff_hevc_put_hevc_bi_w_epel_h6_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_h6_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_h6_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_h6_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_h6_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pushbit(int);
void pushcontrol1b(int cc) { pushbit(cc); }


x86 assembly (clang, -O0):
<pushcontrol1b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <pushbit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pushcontrol1b>:
jmp    1030 <pushbit@plt>

LLVM IR (-O0):
define void @pushcontrol1b(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @pushbit(i32 %3)
ret void
}

LLVM IR (-O2):
define void @pushcontrol1b(i32 %0) {
%2 = tail call i32 @pushbit(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __free_cf(void *);
void CGPatternRelease(void *item) { __free_cf(item); }


x86 assembly (clang, -O0):
<CGPatternRelease>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__free_cf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CGPatternRelease>:
jmp    1030 <__free_cf@plt>

LLVM IR (-O0):
define void @CGPatternRelease(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__free_cf(i8* %3)
ret void
}

LLVM IR (-O2):
define void @CGPatternRelease(i8* %0) {
%2 = tail call i32 @__free_cf(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, int);
void *sqlite3MallocRaw(int, int);
void *sqlite3Malloc(int n, int doMemManage) {
  void *p = sqlite3MallocRaw(n, doMemManage);
  if (p) {
    memset(p, 0, n);
  }
  return p;
}


x86 assembly (clang, -O0):
<sqlite3Malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <sqlite3MallocRaw@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1156 <sqlite3Malloc+0x36>
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqlite3Malloc>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1040 <sqlite3MallocRaw@plt>
mov    %rax,%rbx
test   %rax,%rax
je     113e <sqlite3Malloc+0x1e>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %ebp,%edx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @sqlite3Malloc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i8* @sqlite3MallocRaw(i32 %6, i32 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i8*, i8** %5
%13 = load i32, i32* %3
%14 = call i32 @memset(i8* %12, i32 0, i32 %13)
br label %15
15: ; preds = %11, %2
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
define i8* @sqlite3Malloc(i32 %0, i32 %1) {
%3 = tail call i8* @sqlite3MallocRaw(i32 %0, i32 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @memset(i8* %3, i32 0, i32 %0)
br label %7
7: ; preds = %5, %2
ret i8* %3
}
int sum(int n) {
  if (1 == n) {
    return 1;
  } else {
    return n + sum(n - 1);
  }
}


x86 assembly (clang, -O0):
<sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x1,%eax
cmp    -0x8(%rbp),%eax
jne    1135 <sum+0x25>
movl   $0x1,-0x4(%rbp)
jmp    1150 <sum+0x40>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <sum@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum>:
mov    $0x1,%eax
cmp    $0x1,%edi
je     1124 <sum+0x24>
lea    -0x1(%rdi),%eax
lea    -0x2(%rdi),%ecx
imul   %ecx,%eax
lea    -0x3(%rdi),%edx
imul   %rcx,%rdx
shr    %rdx
add    %edi,%eax
sub    %edx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @sum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 1, %4
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %13
7: ; preds = %1
%8 = load i32, i32* %3
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 1
%11 = call i32 @sum(i32 %10)
%12 = add nsw i32 %8, %11
store i32 %12, i32* %2
br label %13
13: ; preds = %7, %6
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @sum(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %16, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = add i32 %0, -2
%6 = mul i32 %4, %5
%7 = zext i32 %5 to i33
%8 = add i32 %0, -3
%9 = zext i32 %8 to i33
%10 = mul i33 %7, %9
%11 = lshr i33 %10, 1
%12 = trunc i33 %11 to i32
%13 = add i32 %6, %0
%14 = sub i32 %13, %12
%15 = add i32 %14, 1
br label %16
16: ; preds = %3, %1
%17 = phi i32 [ 1, %1 ], [ %15, %3 ]
ret i32 %17
}
/* Type definitions */
struct ctrl_command {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ send_error(char *);
void cmd_start_zip_out(struct ctrl_command *cmd) {
  send_error("can't start compression - no libz support!");
}


x86 assembly (clang, -O0):
<cmd_start_zip_out>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <send_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_start_zip_out>:
lea    0xee9(%rip),%rdi
jmp    1030 <send_error@plt>

LLVM IR (-O0):
%struct.ctrl_command = type { i32 }
@.str = [43 x i8] c"can't start compression - no libz support!\00"
define void @cmd_start_zip_out(%struct.ctrl_command* %0) {
%2 = alloca %struct.ctrl_command*
store %struct.ctrl_command* %0, %struct.ctrl_command** %2
%3 = call i32 @send_error(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.ctrl_command = type { i32 }
@.str = [43 x i8] c"can't start compression - no libz support!\00"
define void @cmd_start_zip_out(%struct.ctrl_command* nocapture readnone %0) {
%2 = tail call i32 @send_error(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct flashctx {
  int dummy;
};

/* Variables and functions */
int spi_disable_blockprotect_generic(struct flashctx *, int, int,
                                     int /*<<< orphan*/);
int spi_disable_blockprotect_at25f(struct flashctx *flash) {
  return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0);
}


x86 assembly (clang, -O0):
<spi_disable_blockprotect_at25f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xc,%esi
mov    $0x80,%edx
xor    %ecx,%ecx
call   1030 <spi_disable_blockprotect_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_disable_blockprotect_at25f>:
mov    $0xc,%esi
mov    $0x80,%edx
xor    %ecx,%ecx
jmp    1030 <spi_disable_blockprotect_generic@plt>

LLVM IR (-O0):
%struct.flashctx = type { i32 }
define i32 @spi_disable_blockprotect_at25f(%struct.flashctx* %0) {
%2 = alloca %struct.flashctx*
store %struct.flashctx* %0, %struct.flashctx** %2
%3 = load %struct.flashctx*, %struct.flashctx** %2
%4 = call i32 @spi_disable_blockprotect_generic(%struct.flashctx* %3, i32 12, i32 128, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.flashctx = type { i32 }
define i32 @spi_disable_blockprotect_at25f(%struct.flashctx* %0) {
%2 = tail call i32 @spi_disable_blockprotect_generic(%struct.flashctx* %0, i32 12, i32 128, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ am_util_string_strcpy(char *, char const *);
char *am_util_string_strcat(char *pcDst, const char *pcSrc) {
  char *pcRet = pcDst;
  while (*pcDst++)
    ;
  pcDst--;
  am_util_string_strcpy(pcDst, pcSrc);
  return pcRet;
}


x86 assembly (clang, -O0):
<am_util_string_strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     1145 <am_util_string_strcat+0x35>
jmp    1128 <am_util_string_strcat+0x18>
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <am_util_string_strcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<am_util_string_strcat>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rdi
nopl   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi)
lea    0x1(%rdi),%rdi
jne    1120 <am_util_string_strcat+0x10>
call   1030 <am_util_string_strcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @am_util_string_strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %12, %2
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %3
%10 = load i8, i8* %8
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %7
br label %7
13: ; preds = %7
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 -1
store i8* %15, i8** %3
%16 = load i8*, i8** %3
%17 = load i8*, i8** %4
%18 = call i32 @am_util_string_strcpy(i8* %16, i8* %17)
%19 = load i8*, i8** %5
ret i8* %19
}

LLVM IR (-O2):
define i8* @am_util_string_strcat(i8* returned %0, i8* %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %5, %3 ]
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = load i8, i8* %4
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3
%9 = tail call i32 @am_util_string_strcpy(i8* %4, i8* %1)
ret i8* %0
}
/* Variables and functions */
scalar_t__ strtod(char const *, int /*<<< orphan*/ *);
float get_float(const char *v) { return (float)strtod(v, NULL); }


x86 assembly (clang, -O0):
<get_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <strtod@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_float>:
push   %rax
xor    %esi,%esi
call   1030 <strtod@plt>
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @get_float(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @strtod(i8* %3, i32* null)
%5 = sitofp i64 %4 to float
ret float %5
}

LLVM IR (-O2):
define float @get_float(i8* nocapture %0) {
%2 = tail call i64 @strtod(i8* nocapture %0, i32* null)
%3 = sitofp i64 %2 to float
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ STDERR_FILENO;
int snprintf(char *, int, char *, char const *, char *);
int /*<<< orphan*/ write(int /*<<< orphan*/, char *, int);
void print_file_error(const char *filename, char *message) {
  char buf[256];
  int res = snprintf(buf, 256, "tail: cannot open '%s' for reading: %s\n",
                     filename, message);
  write(STDERR_FILENO, buf, res);
}


x86 assembly (clang, -O0):
<print_file_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x110(%rbp),%rdi
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%r8
mov    $0x100,%esi
lea    0xeb2(%rip),%rdx
call   1040 <snprintf@plt>
mov    %eax,-0x114(%rbp)
mov    0x2e80(%rip),%rax
mov    (%rax),%edi
lea    -0x110(%rbp),%rsi
mov    -0x114(%rbp),%edx
call   1030 <write@plt>
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_file_error>:
push   %rbx
sub    $0x100,%rsp
mov    %rsi,%r8
mov    %rdi,%rcx
lea    0xecb(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x100,%esi
call   1040 <snprintf@plt>
mov    0x2e94(%rip),%rcx
mov    (%rcx),%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [40 x i8] c"tail: cannot open '%s' for reading: %s\0A\00"
@STDERR_FILENO = global i32 0
define void @print_file_error(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca [256 x i8]
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call i32 @snprintf(i8* %7, i32 256, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %8, i8* %9)
store i32 %10, i32* %6
%11 = load i32, i32* @STDERR_FILENO
%12 = getelementptr inbounds [256 x i8], [256 x i8]* %5, i64 0, i64 0
%13 = load i32, i32* %6
%14 = call i32 @write(i32 %11, i8* %12, i32 %13)
ret void
}

LLVM IR (-O2):
@.str = [40 x i8] c"tail: cannot open '%s' for reading: %s\0A\00"
@STDERR_FILENO = global i32 0
define void @print_file_error(i8* %0, i8* %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = call i32 @snprintf(i8* %4, i32 256, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%6 = load i32, i32* @STDERR_FILENO
%7 = call i32 @write(i32 %6, i8* %4, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
main() {
  printf("Hello ");
  printf("world!");
  printf("\n");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee0(%rip),%rdi
call   1030 <printf@plt>
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xed3(%rip),%rdi
call   1040 <printf@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"Hello \00"
@.str.1 = [7 x i8] c"world!\00"
@.str.2 = [2 x i8] c"\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"Hello \00"
@.str.1 = [7 x i8] c"world!\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @putchar(i32 10)
ret i32 0
}
/* Variables and functions */
int system(char *);
void isystem(char *name, int *ierr) { *ierr = system(name); }


x86 assembly (clang, -O0):
<isystem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <system@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isystem>:
push   %rbx
mov    %rsi,%rbx
call   1030 <system@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @isystem(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = call i32 @system(i8* %5)
%7 = load i32*, i32** %4
store i32 %6, i32* %7
ret void
}

LLVM IR (-O2):
define void @isystem(i8* nocapture %0, i32* nocapture writeonly %1) {
%3 = tail call i32 @system(i8* %0)
store i32 %3, i32* %1
ret void
}
void reset_hdlr(void) { asm volatile("nop \n"); }


x86 assembly (clang, -O0):
<reset_hdlr>:
push   %rbp
mov    %rsp,%rbp
nop
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_hdlr>:
nop
ret

LLVM IR (-O0):
define void @reset_hdlr() {
ret void
}

LLVM IR (-O2):
define void @reset_hdlr() {
tail call void asm sideeffect "nop \0A", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ safe_inc(int);
void *t_fun(void *arg) {
  safe_inc(3);
  safe_inc(4);
  return NULL;
}


x86 assembly (clang, -O0):
<t_fun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x3,%edi
call   1030 <safe_inc@plt>
mov    $0x4,%edi
call   1030 <safe_inc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_fun>:
push   %rax
mov    $0x3,%edi
call   1030 <safe_inc@plt>
mov    $0x4,%edi
call   1030 <safe_inc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @t_fun(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @safe_inc(i32 3)
%4 = call i32 @safe_inc(i32 4)
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @t_fun(i8* nocapture readnone %0) {
%2 = tail call i32 @safe_inc(i32 3)
%3 = tail call i32 @safe_inc(i32 4)
ret i8* null
}
void XQueryColors() {}


x86 assembly (clang, -O0):
<XQueryColors>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XQueryColors>:
ret

LLVM IR (-O0):
define void @XQueryColors() {
ret void
}

LLVM IR (-O2):
define void @XQueryColors() {
ret void
}
int lcdl_changeToLine(unsigned int line_p) { return 0; }


x86 assembly (clang, -O0):
<lcdl_changeToLine>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcdl_changeToLine>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @lcdl_changeToLine(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @lcdl_changeToLine(i32 %0) {
ret i32 0
}
/* Variables and functions */
int f494(int *);
int f495(int *p) { return f494(p); }


x86 assembly (clang, -O0):
<f495>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f494@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f495>:
jmp    1030 <f494@plt>

LLVM IR (-O0):
define i32 @f495(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f494(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f495(i32* %0) {
%2 = tail call i32 @f494(i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int in, square, cube;
  scanf("%d", &in);
  square = in * in;
  cube = in * in * in;
  printf("%d\n", square);
  printf("%d\n", cube);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
imul   -0x8(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%esi
lea    0xea2(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%esi
lea    0xe93(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xed5(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%ebx
mov    %ebx,%esi
imul   %ebx,%esi
imul   %esi,%ebx
lea    0xebb(%rip),%r14
mov    %r14,%rdi
call   1030 <printf@plt>
mov    %r14,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%6 = load i32, i32* %2
%7 = load i32, i32* %2
%8 = mul nsw i32 %6, %7
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = load i32, i32* %2
%11 = mul nsw i32 %9, %10
%12 = load i32, i32* %2
%13 = mul nsw i32 %11, %12
store i32 %13, i32* %4
%14 = load i32, i32* %3
%15 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %14)
%16 = load i32, i32* %4
%17 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %16)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = mul nsw i32 %4, %4
%6 = mul nsw i32 %5, %4
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}