xunge/DecIR huggingface dataset:
/* Type definitions */
struct vec2i {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vec2i_subtract(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                                  int /*<<< orphan*/ *);
__attribute__((always_)) struct vec2i *
psvec2i_subtract(struct vec2i *result, struct vec2i *a, struct vec2i *b) {
  vec2i_subtract((int32_t *)result, (int32_t *)a, (int32_t *)b);
  return result;
}


x86 assembly (clang, -O0):
<psvec2i_subtract>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <vec2i_subtract@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec2i_subtract>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec2i_subtract@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec2i = type { i32 }
define %struct.vec2i* @psvec2i_subtract(%struct.vec2i* %0, %struct.vec2i* %1, %struct.vec2i* %2) {
%4 = alloca %struct.vec2i*
%5 = alloca %struct.vec2i*
%6 = alloca %struct.vec2i*
store %struct.vec2i* %0, %struct.vec2i** %4
store %struct.vec2i* %1, %struct.vec2i** %5
store %struct.vec2i* %2, %struct.vec2i** %6
%7 = load %struct.vec2i*, %struct.vec2i** %4
%8 = bitcast %struct.vec2i* %7 to i32*
%9 = load %struct.vec2i*, %struct.vec2i** %5
%10 = bitcast %struct.vec2i* %9 to i32*
%11 = load %struct.vec2i*, %struct.vec2i** %6
%12 = bitcast %struct.vec2i* %11 to i32*
%13 = call i32 @vec2i_subtract(i32* %8, i32* %10, i32* %12)
%14 = load %struct.vec2i*, %struct.vec2i** %4
ret %struct.vec2i* %14
}

LLVM IR (-O2):
%struct.vec2i = type { i32 }
define %struct.vec2i* @psvec2i_subtract(%struct.vec2i* returned %0, %struct.vec2i* %1, %struct.vec2i* %2) {
%4 = getelementptr %struct.vec2i, %struct.vec2i* %0, i64 0, i32 0
%5 = getelementptr %struct.vec2i, %struct.vec2i* %1, i64 0, i32 0
%6 = getelementptr %struct.vec2i, %struct.vec2i* %2, i64 0, i32 0
%7 = tail call i32 @vec2i_subtract(i32* %4, i32* %5, i32* %6)
ret %struct.vec2i* %0
}
void set_ones(int arr[10]) {
  int i;
  for (i = 0; i < 10; i++) {
    arr[i] = 1;
  }
}


x86 assembly (clang, -O0):
<set_ones>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0xa,-0xc(%rbp)
jge    1136 <set_ones+0x36>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movl   $0x1,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <set_ones+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_ones>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
movups %xmm0,0x10(%rdi)
movabs $0x100000001,%rax
mov    %rax,0x20(%rdi)
ret

LLVM IR (-O0):
define void @set_ones(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
store i32 1, i32* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @set_ones(i32* nocapture writeonly %0) {
%2 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32>* %2
%3 = getelementptr inbounds i32, i32* %0, i64 4
%4 = bitcast i32* %3 to <4 x i32>*
store <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32>* %4
%5 = getelementptr inbounds i32, i32* %0, i64 8
store i32 1, i32* %5
%6 = getelementptr inbounds i32, i32* %0, i64 9
store i32 1, i32* %6
ret void
}
/* Variables and functions */
void *do_malloc_pages(size_t, size_t, int);
void *malloc_dirty_pages(size_t len, size_t alignment) {
  return do_malloc_pages(len, alignment, 1);
}


x86 assembly (clang, -O0):
<malloc_dirty_pages>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <do_malloc_pages@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_dirty_pages>:
mov    $0x1,%edx
jmp    1030 <do_malloc_pages@plt>

LLVM IR (-O0):
define i8* @malloc_dirty_pages(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i8* @do_malloc_pages(i64 %5, i64 %6, i32 1)
ret i8* %7
}

LLVM IR (-O2):
define i8* @malloc_dirty_pages(i64 %0, i64 %1) {
%3 = tail call i8* @do_malloc_pages(i64 %0, i64 %1, i32 1)
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ prf_addr(unsigned char *, unsigned char const *,
                            int /*<<< orphan*/ *);
void fors_gen_sk(unsigned char *sk, const unsigned char *sk_seed,
                 uint32_t fors_leaf_addr[8]) {
  prf_addr(sk, sk_seed, fors_leaf_addr);
}


x86 assembly (clang, -O0):
<fors_gen_sk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <prf_addr@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fors_gen_sk>:
jmp    1030 <prf_addr@plt>

LLVM IR (-O0):
define void @fors_gen_sk(i8* %0, i8* %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i32*, i32** %6
%10 = call i32 @prf_addr(i8* %7, i8* %8, i32* %9)
ret void
}

LLVM IR (-O2):
define void @fors_gen_sk(i8* %0, i8* %1, i32* %2) {
%4 = tail call i32 @prf_addr(i8* %0, i8* %1, i32* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ display_help();
int /*<<< orphan*/ printf(char *);
void event_help() {
  printf("\033[H\033[2J");
  display_help();
}


x86 assembly (clang, -O0):
<event_help>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <display_help@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<event_help>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <display_help@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"\1B[H\1B[2J\00"
define void @event_help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @display_help()
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"\1B[H\1B[2J\00"
define void @event_help() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @display_help()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ blast(char const *);
int main(int argc, char **argv) {
  const char *addr = "127.0.0.1";
  if (argc > 1)
    addr = argv[1];
  blast(addr);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    1147 <main+0x37>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <blast@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jl     111c <main+0xc>
mov    0x8(%rsi),%rdi
jmp    1123 <main+0x13>
lea    0xedd(%rip),%rdi
call   1030 <blast@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"127.0.0.1\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8** %6
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
store i8* %12, i8** %6
br label %13
13: ; preds = %9, %2
%14 = load i8*, i8** %6
%15 = call i32 @blast(i8* %14)
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@.str = [10 x i8] c"127.0.0.1\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
br label %7
7: ; preds = %4, %2
%8 = phi i8* [ %6, %4 ], [ getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), %2 ]
%9 = tail call i32 @blast(i8* %8)
ret i32 0
}
void adis16130_unconfigure_ring(struct iio_dev *indio_dev) {}


x86 assembly (clang, -O0):
<adis16130_unconfigure_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<adis16130_unconfigure_ring>:
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define void @adis16130_unconfigure_ring(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret void
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define void @adis16130_unconfigure_ring(%struct.iio_dev* nocapture %0) {
ret void
}
void BackSpace(HowMany) int HowMany;
{
  int i;
  char Str[20];
  for (i = 0; i < HowMany - 1; i++) {
    sprintf(Str, "%c", 010);
    WRITETEST(Str);
  }
}


x86 assembly (clang, -O0):
<BackSpace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jge    1173 <BackSpace+0x53>
lea    -0x20(%rbp),%rdi
lea    0xeb2(%rip),%rsi
mov    $0x8,%edx
mov    $0x0,%al
call   1040 <sprintf@plt>
lea    -0x20(%rbp),%rdi
mov    $0x0,%al
call   1030 <WRITETEST@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1132 <BackSpace+0x12>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BackSpace>:
push   %r14
push   %rbx
sub    $0x18,%rsp
cmp    $0x2,%edi
jl     1145 <BackSpace+0x35>
mov    %edi,%ebx
add    $0xffffffff,%ebx
mov    %rsp,%r14
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movw   $0x8,(%rsp)
mov    %r14,%rdi
xor    %eax,%eax
call   1030 <WRITETEST@plt>
add    $0xffffffff,%ebx
jne    1130 <BackSpace+0x20>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @BackSpace(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca [20 x i8]
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %18
10: ; preds = %5
%11 = getelementptr inbounds [20 x i8], [20 x i8]* %4, i64 0, i64 0
%12 = call i32 (i8*, i8*, ...) @sprintf(i8* %11, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 8)
%13 = getelementptr inbounds [20 x i8], [20 x i8]* %4, i64 0, i64 0
%14 = call i32 (i8*, ...) bitcast (i32 (...)* @WRITETEST to i32 (i8*, ...)*)(i8* %13)
br label %15
15: ; preds = %10
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %5
18: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @BackSpace(i32 %0) {
%2 = alloca [20 x i8]
%3 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%4 = add i32 %0, -1
%5 = icmp sgt i32 %0, 1
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 1
br label %8
8: ; preds = %6, %8
%9 = phi i32 [ 0, %6 ], [ %11, %8 ]
store i8 8, i8* %3
store i8 0, i8* %7
%10 = call i32 (i8*, ...) bitcast (i32 (...)* @WRITETEST to i32 (i8*, ...)*)(i8* %3)
%11 = add nuw nsw i32 %9, 1
%12 = icmp eq i32 %11, %4
br i1 %12, label %13, label %8
13: ; preds = %8, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430GpioC__0__GeneralIO__makeOutput();
void LedsP__Led0__makeOutput(void) { Msp430GpioC__0__GeneralIO__makeOutput(); }


x86 assembly (clang, -O0):
<LedsP__Led0__makeOutput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430GpioC__0__GeneralIO__makeOutput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedsP__Led0__makeOutput>:
xor    %eax,%eax
jmp    1030 <Msp430GpioC__0__GeneralIO__makeOutput@plt>

LLVM IR (-O0):
define void @LedsP__Led0__makeOutput() {
%1 = call i32 (...) @Msp430GpioC__0__GeneralIO__makeOutput()
ret void
}

LLVM IR (-O2):
define void @LedsP__Led0__makeOutput() {
%1 = tail call i32 (...) @Msp430GpioC__0__GeneralIO__makeOutput()
ret void
}
void test_assemble_rc(void) {}


x86 assembly (clang, -O0):
<test_assemble_rc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_assemble_rc>:
ret

LLVM IR (-O0):
define void @test_assemble_rc() {
ret void
}

LLVM IR (-O2):
define void @test_assemble_rc() {
ret void
}
/* Variables and functions */
int f252(int *);
int f253(int *p) { return f252(p); }


x86 assembly (clang, -O0):
<f253>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f252@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f253>:
jmp    1030 <f252@plt>

LLVM IR (-O0):
define i32 @f253(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f252(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f253(i32* %0) {
%2 = tail call i32 @f252(i32* %0)
ret i32 %2
}
int unhex(char h) {
  if ('0' <= h && h <= '9')
    return (h - '0');
  else if ('a' <= h && h <= 'f')
    return (10 + h - 'a');
  else
    return (10 + h - 'A');
}


x86 assembly (clang, -O0):
<unhex>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%ecx
mov    $0x30,%eax
cmp    %ecx,%eax
jg     1137 <unhex+0x37>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1137 <unhex+0x37>
movsbl -0x5(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1174 <unhex+0x74>
movsbl -0x5(%rbp),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     1167 <unhex+0x67>
movsbl -0x5(%rbp),%eax
cmp    $0x66,%eax
jg     1167 <unhex+0x67>
movsbl -0x5(%rbp),%eax
add    $0xa,%eax
sub    $0x61,%eax
mov    %eax,-0x4(%rbp)
jmp    1174 <unhex+0x74>
movsbl -0x5(%rbp),%eax
add    $0xa,%eax
sub    $0x41,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unhex>:
lea    -0x30(%rdi),%eax
lea    -0x61(%rdi),%ecx
xor    %edx,%edx
cmp    $0x6,%cl
setae  %dl
shl    $0x5,%edx
add    $0xffffffa9,%edx
cmp    $0xa,%al
mov    $0xffffffd0,%eax
cmovae %edx,%eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @unhex(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sle i32 48, %5
br i1 %6, label %7, label %15
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %15
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 48
store i32 %14, i32* %2
br label %33
15: ; preds = %7, %1
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 97, %17
br i1 %18, label %19, label %28
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sle i32 %21, 102
br i1 %22, label %23, label %28
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = add nsw i32 10, %25
%27 = sub nsw i32 %26, 97
store i32 %27, i32* %2
br label %33
28: ; preds = %19, %15
%29 = load i8, i8* %3
%30 = sext i8 %29 to i32
%31 = add nsw i32 10, %30
%32 = sub nsw i32 %31, 65
store i32 %32, i32* %2
br label %33
33: ; preds = %28, %23, %11
%34 = load i32, i32* %2
ret i32 %34
}

LLVM IR (-O2):
define i32 @unhex(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add i8 %0, -48
%4 = icmp ult i8 %3, 10
%5 = add i8 %0, -97
%6 = icmp ult i8 %5, 6
%7 = select i1 %6, i32 -87, i32 -55
%8 = select i1 %4, i32 -48, i32 %7
%9 = add nsw i32 %8, %2
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char *);
char *strcat(char *__restrict s, const char *__restrict ct) {
  assert(s != NULL);
  assert(ct != NULL);
  (void)strcpy(s + strlen(s), ct);
  return s;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x18(%rbp),%rdi
cltq
add    %rax,%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1050 <assert@plt>
xor    %edi,%edi
test   %r14,%r14
setne  %dil
call   1050 <assert@plt>
mov    %rbx,%rdi
call   1040 <strlen@plt>
movslq %eax,%rdi
add    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strcat(i8* noalias %0, i8* noalias %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i8*, i8** %4
%10 = icmp ne i8* %9, null
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i8*, i8** %3
%14 = load i8*, i8** %3
%15 = call i32 @strlen(i8* %14)
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %13, i64 %16
%18 = load i8*, i8** %4
%19 = call i32 @strcpy(i8* %17, i8* %18)
%20 = load i8*, i8** %3
ret i8* %20
}

LLVM IR (-O2):
define i8* @strcat(i8* noalias returned %0, i8* noalias %1) {
%3 = icmp ne i8* %0, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = icmp ne i8* %1, null
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = tail call i32 @strlen(i8* %0)
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = tail call i32 @strcpy(i8* %11, i8* %1)
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ read(int, void *, size_t);
ssize_t read_bytes(int f, void *b, size_t n) { return read(f, b, n); }


x86 assembly (clang, -O0):
<read_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <read@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_bytes>:
jmp    1030 <read@plt>

LLVM IR (-O0):
define i32 @read_bytes(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @read(i32 %7, i8* %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @read_bytes(i32 %0, i8* nocapture %1, i64 %2) {
%4 = tail call i32 @read(i32 %0, i8* %1, i64 %2)
ret i32 %4
}
int powerTwoCeiling(int n) {
  int k = 1;
  while (k < n)
    k = k << 1;
  return k;
}


x86 assembly (clang, -O0):
<powerTwoCeiling>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1128 <powerTwoCeiling+0x28>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <powerTwoCeiling+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<powerTwoCeiling>:
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %ecx,%eax
lea    (%rax,%rax,1),%ecx
cmp    %edi,%eax
jl     1110 <powerTwoCeiling+0x10>
ret

LLVM IR (-O0):
define i32 @powerTwoCeiling(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i32, i32* %3
%10 = shl i32 %9, 1
store i32 %10, i32* %3
br label %4
11: ; preds = %4
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @powerTwoCeiling(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 1, %1 ], [ %5, %2 ]
%4 = icmp slt i32 %3, %0
%5 = shl i32 %3, 1
br i1 %4, label %2, label %6
6: ; preds = %2
ret i32 %3
}
/* Variables and functions */
long rand();
void _vSetTimer(unsigned long *pulTimer, unsigned long ulNTick) {
  *pulTimer = ((rand() << 16L) + rand());
}


x86 assembly (clang, -O0):
<_vSetTimer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
shl    $0x10,%rax
mov    %rax,-0x18(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x18(%rbp),%rcx
add    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_vSetTimer>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %eax,%eax
call   1030 <rand@plt>
mov    %rax,%rbx
shl    $0x10,%rbx
xor    %eax,%eax
call   1030 <rand@plt>
add    %rbx,%rax
mov    %rax,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @_vSetTimer(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
%5 = call i64 (...) @rand()
%6 = shl i64 %5, 16
%7 = call i64 (...) @rand()
%8 = add nsw i64 %6, %7
%9 = load i64*, i64** %3
store i64 %8, i64* %9
ret void
}

LLVM IR (-O2):
define void @_vSetTimer(i64* nocapture writeonly %0, i64 %1) {
%3 = tail call i64 (...) @rand()
%4 = shl i64 %3, 16
%5 = tail call i64 (...) @rand()
%6 = add nsw i64 %4, %5
store i64 %6, i64* %0
ret void
}
void __clear_bit(int nr, volatile unsigned long *addr) {
  __asm__ volatile("btr %1,%0" : "+m"(*(volatile long *)(addr)) : "Ir"(nr));
}


x86 assembly (clang, -O0):
<__clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
btr    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__clear_bit>:
btr    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @__clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
%6 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @__clear_bit(i32 %0, i64* %1) {
tail call void asm sideeffect "btr $1,$0", "=*m,Ir,*m,~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0, i64* elementtype(i64) %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0x0f() {
  Assert_real((isalnum(15) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              80, ("isalnum should be 0 for 0x0f"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x0f>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x50,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x0f>:
push   %rax
mov    $0xf,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x50,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x0f\00"
define void @t_isalnum_0x0f() {
%1 = call i64 @isalnum(i32 15)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 80, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0x0f\00"
define void @t_isalnum_0x0f() {
%1 = tail call i64 @isalnum(i32 15)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 80, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ free(int *);
int *malloc(int);
int main(int argc, char *argv[]) {
  int *p = malloc(100);
  *p = 1;
  if (argc == 1)
    abort();
  free(p);
  return p == 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x64,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movl   $0x1,(%rax)
cmpl   $0x1,-0x8(%rbp)
jne    116f <main+0x3f>
mov    $0x0,%al
call   1040 <abort@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
cmpq   $0x0,-0x18(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %edi,%ebx
mov    $0x64,%edi
call   1050 <malloc@plt>
movl   $0x1,(%rax)
cmp    $0x1,%ebx
je     1154 <main+0x24>
mov    %rax,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret
xor    %eax,%eax
call   1040 <abort@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32* @malloc(i32 100)
store i32* %7, i32** %6
%8 = load i32*, i32** %6
store i32 1, i32* %8
%9 = load i32, i32* %4
%10 = icmp eq i32 %9, 1
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 (...) @abort()
unreachable
13: ; preds = %2
%14 = load i32*, i32** %6
%15 = call i32 @free(i32* %14)
%16 = load i32*, i32** %6
%17 = icmp eq i32* %16, null
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32* @malloc(i32 100)
store i32 1, i32* %3
%4 = icmp eq i32 %0, 1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (...) @abort()
unreachable
7: ; preds = %2
%8 = tail call i32 @free(i32* %3)
ret i32 0
}
void DMA2_Stream5_IRQHandler() {}


x86 assembly (clang, -O0):
<DMA2_Stream5_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMA2_Stream5_IRQHandler>:
ret

LLVM IR (-O0):
define void @DMA2_Stream5_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @DMA2_Stream5_IRQHandler() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __u8;
typedef int __u32;

/* Variables and functions */
extern void __put_unaligned_2(__u32 __v, register __u8 *__p) {
  *__p++ = __v >> 8;
  *__p++ = __v;
}


x86 assembly (clang, -O0):
<__put_unaligned_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x10(%rbp)
mov    %ecx,(%rax)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x10(%rbp)
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__put_unaligned_2>:
mov    %edi,%eax
sar    $0x8,%eax
mov    %eax,(%rsi)
mov    %edi,0x4(%rsi)
ret

LLVM IR (-O0):
define void @__put_unaligned_2(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = ashr i32 %5, 8
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i32 1
store i32* %8, i32** %4
store i32 %6, i32* %7
%9 = load i32, i32* %3
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i32 1
store i32* %11, i32** %4
store i32 %9, i32* %10
ret void
}

LLVM IR (-O2):
define void @__put_unaligned_2(i32 %0, i32* nocapture writeonly %1) {
%3 = ashr i32 %0, 8
%4 = getelementptr inbounds i32, i32* %1, i64 1
store i32 %3, i32* %1
store i32 %0, i32* %4
ret void
}
/* Variables and functions */
double floor(double);
double modulusDymola(double x, double y) { return x - floor(x / y) * y; }


x86 assembly (clang, -O0):
<modulusDymola>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
call   1030 <floor@plt>
movsd  -0x18(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm2
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<modulusDymola>:
sub    $0x18,%rsp
movsd  %xmm1,0x8(%rsp)
movsd  %xmm0,0x10(%rsp)
divsd  %xmm1,%xmm0
call   1030 <floor@plt>
mulsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
subsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @modulusDymola(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fdiv double %6, %7
%9 = call double @llvm.floor.f64(double %8)
%10 = load double, double* %4
%11 = fneg double %9
%12 = call double @llvm.fmuladd.f64(double %11, double %10, double %5)
ret double %12
}

LLVM IR (-O2):
define double @modulusDymola(double %0, double %1) {
%3 = fdiv double %0, %1
%4 = tail call double @llvm.floor.f64(double %3)
%5 = fneg double %4
%6 = tail call double @llvm.fmuladd.f64(double %5, double %1, double %0)
ret double %6
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ *wmemcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                            size_t);
wchar_t *wmempcpy(wchar_t *restrict whither, const wchar_t *restrict whence,
                  size_t size) {
  return wmemcpy(whither, whence, size) + size;
}


x86 assembly (clang, -O0):
<wmempcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <wmemcpy@plt>
mov    -0x18(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wmempcpy>:
push   %rbx
mov    %rdx,%rbx
call   1030 <wmemcpy@plt>
lea    (%rax,%rbx,4),%rax
pop    %rbx
ret

LLVM IR (-O0):
define i32* @wmempcpy(i32* noalias %0, i32* noalias %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i64
store i32* %0, i32** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = load i32*, i32** %5
%9 = load i64, i64* %6
%10 = call i32* @wmemcpy(i32* %7, i32* %8, i64 %9)
%11 = load i64, i64* %6
%12 = getelementptr inbounds i32, i32* %10, i64 %11
ret i32* %12
}

LLVM IR (-O2):
define i32* @wmempcpy(i32* noalias %0, i32* noalias %1, i64 %2) {
%4 = tail call i32* @wmemcpy(i32* %0, i32* %1, i64 %2)
%5 = getelementptr inbounds i32, i32* %4, i64 %2
ret i32* %5
}
/* Variables and functions */
void *__coverity_alloc__(int);
int /*<<< orphan*/ __coverity_mark_as_afm_allocated__(void *, char *);
void *H5Tcopy(void *dtype_id) {
  void *id = __coverity_alloc__(10);
  __coverity_mark_as_afm_allocated__(id, "H5Tclose");
  return id;
}


x86 assembly (clang, -O0):
<H5Tcopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xa,%edi
call   1040 <__coverity_alloc__@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xebb(%rip),%rsi
call   1030 <__coverity_mark_as_afm_allocated__@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<H5Tcopy>:
push   %rbx
mov    $0xa,%edi
call   1040 <__coverity_alloc__@plt>
mov    %rax,%rbx
lea    0xecb(%rip),%rsi
mov    %rax,%rdi
call   1030 <__coverity_mark_as_afm_allocated__@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"H5Tclose\00"
define i8* @H5Tcopy(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = call i8* @__coverity_alloc__(i32 10)
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @__coverity_mark_as_afm_allocated__(i8* %5, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%7 = load i8*, i8** %3
ret i8* %7
}

LLVM IR (-O2):
@.str = [9 x i8] c"H5Tclose\00"
define i8* @H5Tcopy(i8* nocapture readnone %0) {
%2 = tail call i8* @__coverity_alloc__(i32 10)
%3 = tail call i32 @__coverity_mark_as_afm_allocated__(i8* %2, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret i8* %2
}
/* Variables and functions */
int fputs(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int puts(const char *s) { return fputs(s, stdout); }


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@stdout = global i32 0
define i32 @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @stdout
%5 = call i32 @fputs(i8* %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@stdout = global i32 0
define i32 @puts(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fputs(i8* %0, i32 %2)
ret i32 %3
}
/* Variables and functions */
scalar_t__ CheckHitT();
scalar_t__ CheckRightOn();
unsigned char CheckEventsHardRight(void) {
  if (CheckHitT() != 0)
    return 7;
  if (CheckRightOn() != 0)
    return 5;
}


x86 assembly (clang, -O0):
<CheckEventsHardRight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <CheckHitT@plt>
cmp    $0x0,%rax
je     1142 <CheckEventsHardRight+0x22>
movb   $0x7,-0x1(%rbp)
jmp    1157 <CheckEventsHardRight+0x37>
mov    $0x0,%al
call   1040 <CheckRightOn@plt>
cmp    $0x0,%rax
je     1157 <CheckEventsHardRight+0x37>
movb   $0x5,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckEventsHardRight>:
push   %rax
xor    %eax,%eax
call   1030 <CheckHitT@plt>
mov    %rax,%rcx
mov    $0x7,%al
test   %rcx,%rcx
je     1134 <CheckEventsHardRight+0x14>
pop    %rcx
ret
xor    %eax,%eax
call   1040 <CheckRightOn@plt>
mov    $0x5,%al
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i8 @CheckEventsHardRight() {
%1 = alloca i8
%2 = call i64 (...) @CheckHitT()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i8 7, i8* %1
br label %9
5: ; preds = %0
%6 = call i64 (...) @CheckRightOn()
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %5
store i8 5, i8* %1
br label %9
9: ; preds = %4, %8, %5
%10 = load i8, i8* %1
ret i8 %10
}

LLVM IR (-O2):
define zeroext i8 @CheckEventsHardRight() {
%1 = tail call i64 (...) @CheckHitT()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i64 (...) @CheckRightOn()
br label %5
5: ; preds = %3, %0
%6 = phi i8 [ 7, %0 ], [ 5, %3 ]
ret i8 %6
}
int pqueue_compare(unsigned long a, unsigned long b) { return (int)(b - a); }


x86 assembly (clang, -O0):
<pqueue_compare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
sub    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pqueue_compare>:
mov    %rsi,%rax
sub    %edi,%eax
ret

LLVM IR (-O0):
define i32 @pqueue_compare(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = sub i64 %5, %6
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @pqueue_compare(i64 %0, i64 %1) {
%3 = sub i64 %1, %0
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
void strncat(char *s, char *t, int n) {
  void strncpy(char *s, char *t, int n);
  int strlen(char *);
  strncpy(s + strlen(s), t, n);
}


x86 assembly (clang, -O0):
<strncat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
cltq
add    %rax,%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <strncpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncat>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
call   1040 <strlen@plt>
movslq %eax,%rdi
add    %rbp,%rdi
mov    %rbx,%rsi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <strncpy@plt>

LLVM IR (-O0):
define void @strncat(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %4
%9 = call i32 @strlen(i8* %8)
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %7, i64 %10
%12 = load i8*, i8** %5
%13 = load i32, i32* %6
ret void
}

LLVM IR (-O2):
define void @strncat(i8* %0, i8* %1, i32 %2) {
%4 = tail call i32 @strlen(i8* %0)
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i8, i8* %0, i64 %5
tail call void @strncpy(i8* %6, i8* %1, i32 %2)
ret void
}
int test_imm_32int64_highword_reg(long long val) {
  return ((val >> 32) & (0x32 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_32int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x32,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_32int64_highword_reg>:
movabs $0x3200000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_32int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 50
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_32int64_highword_reg(i64 %0) {
%2 = and i64 %0, 214748364800
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int x = 4;
  printf("%d\n", x | (-x));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x4,-0x8(%rbp)
mov    -0x8(%rbp),%esi
xor    %eax,%eax
sub    -0x8(%rbp),%eax
or     %eax,%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xfffffffc,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 4, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 0, %4
%6 = or i32 %3, %5
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 -4)
ret i32 0
}
int *B() {}


x86 assembly (clang, -O0):
<B>:
push   %rbp
mov    %rsp,%rbp
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<B>:
ret

LLVM IR (-O0):
define i32* @B() {
%1 = alloca i32*
%2 = load i32*, i32** %1
ret i32* %2
}

LLVM IR (-O2):
define noalias i32* @B() {
ret i32* undef
}
/* Type definitions */
typedef scalar_t__ uintmax_t;

/* Variables and functions */
int /*<<< orphan*/ ERANGE;
scalar_t__ ULONG_MAX;
int /*<<< orphan*/ errno;
scalar_t__ strtoumax(char const *, char **, int);
unsigned long strtoul(const char *s, char **p, int base) {
  uintmax_t x = strtoumax(s, p, base);
  if (x > ULONG_MAX) {
    errno = ERANGE;
    return ULONG_MAX;
  }
  return x;
}


x86 assembly (clang, -O0):
<strtoul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <strtoumax@plt>
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    0x2e86(%rip),%rcx
cmp    (%rcx),%rax
jle    1170 <strtoul+0x60>
mov    0x2e96(%rip),%rax
mov    (%rax),%ecx
mov    0x2e7d(%rip),%rax
mov    %ecx,(%rax)
mov    0x2e64(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    1178 <strtoul+0x68>
mov    -0x28(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtoul>:
push   %rax
call   1030 <strtoumax@plt>
mov    0x2eab(%rip),%rcx
mov    (%rcx),%rcx
cmp    %rcx,%rax
jle    113a <strtoul+0x2a>
mov    0x2ebc(%rip),%rax
mov    (%rax),%eax
mov    0x2ea3(%rip),%rdx
mov    %eax,(%rdx)
mov    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
@ULONG_MAX = global i64 0
@ERANGE = global i32 0
@errno = global i32 0
define i64 @strtoul(i8* %0, i8** %1, i32 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i8**
%7 = alloca i32
%8 = alloca i64
store i8* %0, i8** %5
store i8** %1, i8*** %6
store i32 %2, i32* %7
%9 = load i8*, i8** %5
%10 = load i8**, i8*** %6
%11 = load i32, i32* %7
%12 = call i64 @strtoumax(i8* %9, i8** %10, i32 %11)
store i64 %12, i64* %8
%13 = load i64, i64* %8
%14 = load i64, i64* @ULONG_MAX
%15 = icmp sgt i64 %13, %14
br i1 %15, label %16, label %19
16: ; preds = %3
%17 = load i32, i32* @ERANGE
store i32 %17, i32* @errno
%18 = load i64, i64* @ULONG_MAX
store i64 %18, i64* %4
br label %21
19: ; preds = %3
%20 = load i64, i64* %8
store i64 %20, i64* %4
br label %21
21: ; preds = %19, %16
%22 = load i64, i64* %4
ret i64 %22
}

LLVM IR (-O2):
@ULONG_MAX = global i64 0
@ERANGE = global i32 0
@errno = global i32 0
define i64 @strtoul(i8* %0, i8** %1, i32 %2) {
%4 = tail call i64 @strtoumax(i8* %0, i8** %1, i32 %2)
%5 = load i64, i64* @ULONG_MAX
%6 = icmp sgt i64 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = load i32, i32* @ERANGE
store i32 %8, i32* @errno
br label %9
9: ; preds = %3, %7
%10 = phi i64 [ %5, %7 ], [ %4, %3 ]
ret i64 %10
}
/* Variables and functions */
double sin(double);
double BGBMID_Sinc(double x) {
  if (x == 0)
    return (1);
  return (sin(3.1415926535897932384626433832795 * x) /
          (3.1415926535897932384626433832795 * x));
}


x86 assembly (clang, -O0):
<BGBMID_Sinc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1147 <BGBMID_Sinc+0x37>
jp     1147 <BGBMID_Sinc+0x37>
movsd  0xecb(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    116f <BGBMID_Sinc+0x5f>
movsd  0xeb1(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
call   1030 <sin@plt>
movsd  0xe9f(%rip),%xmm1
mulsd  -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BGBMID_Sinc>:
push   %rax
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1127 <BGBMID_Sinc+0x17>
jp     1127 <BGBMID_Sinc+0x17>
movsd  0xedb(%rip),%xmm0
pop    %rax
ret
mulsd  0xed9(%rip),%xmm0
movsd  %xmm0,(%rsp)
call   1030 <sin@plt>
divsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @BGBMID_Sinc(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp oeq double %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store double 1.000000e+00, double* %2
br label %14
7: ; preds = %1
%8 = load double, double* %3
%9 = fmul double 0x400921FB54442D18, %8
%10 = call double @sin(double %9)
%11 = load double, double* %3
%12 = fmul double 0x400921FB54442D18, %11
%13 = fdiv double %10, %12
store double %13, double* %2
br label %14
14: ; preds = %7, %6
%15 = load double, double* %2
ret double %15
}

LLVM IR (-O2):
define double @BGBMID_Sinc(double %0) {
%2 = fcmp oeq double %0, 0.000000e+00
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = fmul double %0, 0x400921FB54442D18
%5 = tail call double @sin(double %4)
%6 = fdiv double %5, %4
br label %7
7: ; preds = %1, %3
%8 = phi double [ %6, %3 ], [ 1.000000e+00, %1 ]
ret double %8
}
void tegra_overlay_unregister(struct tegra_overlay_info *overlay_info) {}


x86 assembly (clang, -O0):
<tegra_overlay_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tegra_overlay_unregister>:
ret

LLVM IR (-O0):
%struct.tegra_overlay_info = type opaque
define void @tegra_overlay_unregister(%struct.tegra_overlay_info* %0) {
%2 = alloca %struct.tegra_overlay_info*
store %struct.tegra_overlay_info* %0, %struct.tegra_overlay_info** %2
ret void
}

LLVM IR (-O2):
%struct.tegra_overlay_info = type opaque
define void @tegra_overlay_unregister(%struct.tegra_overlay_info* nocapture %0) {
ret void
}
int f(int i) { return (i - 2) > i; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x2,%eax
cmp    -0x4(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 2
%5 = load i32, i32* %2
%6 = icmp sgt i32 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, unsigned int *);
int main() {
  unsigned a, b, c, d;
  printf("please enter a:");
  scanf("%o", &a);
  b = a >> 4;
  c = ~(~0 << 4);
  d = b & c;
  printf("%o,%d\n%o,%d", a, a, d, d);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xecc(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
shr    $0x4,%eax
mov    %eax,-0xc(%rbp)
movl   $0xf,-0x10(%rbp)
mov    -0xc(%rbp),%eax
and    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    -0x14(%rbp),%r8d
lea    0xe99(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xeda(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edx
mov    %edx,%ecx
shr    $0x4,%ecx
and    $0xf,%ecx
lea    0xec0(%rip),%rdi
mov    %edx,%esi
mov    %ecx,%r8d
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"please enter a:\00"
@.str.1 = [3 x i8] c"%o\00"
@.str.2 = [12 x i8] c"%o,%d\0A%o,%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%8 = load i32, i32* %2
%9 = lshr i32 %8, 4
store i32 %9, i32* %3
store i32 15, i32* %4
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = and i32 %10, %11
store i32 %12, i32* %5
%13 = load i32, i32* %2
%14 = load i32, i32* %2
%15 = load i32, i32* %5
%16 = load i32, i32* %5
%17 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i32 %13, i32 %14, i32 %15, i32 %16)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"please enter a:\00"
@.str.1 = [3 x i8] c"%o\00"
@.str.2 = [12 x i8] c"%o,%d\0A%o,%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = lshr i32 %5, 4
%7 = and i32 %6, 15
%8 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i32 %5, i32 %5, i32 %7, i32 %7)
ret i32 0
}