xunge/DecIR huggingface dataset:
/* Variables and functions */
double MINN(double, int);
double fps_estimate_simple(double ifps, double frame_s, double scale) {
  double t;
  t = frame_s * scale;
  t = MINN(t, 1.);
  ifps = frame_s * t + ifps * (1. - t);
  return ifps;
}


x86 assembly (clang, -O0):
<fps_estimate_simple>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
mov    $0x1,%edi
call   1030 <MINN@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x20(%rbp),%xmm2
movsd  -0x8(%rbp),%xmm1
movsd  0xe9f(%rip),%xmm3
subsd  -0x20(%rbp),%xmm3
mulsd  %xmm3,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fps_estimate_simple>:
sub    $0x18,%rsp
movsd  %xmm1,0x8(%rsp)
movsd  %xmm0,0x10(%rsp)
mulsd  %xmm1,%xmm2
movapd %xmm2,%xmm0
mov    $0x1,%edi
call   1030 <MINN@plt>
movsd  0xec6(%rip),%xmm1
subsd  %xmm0,%xmm1
mulsd  0x10(%rsp),%xmm1
mulsd  0x8(%rsp),%xmm0
addsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @fps_estimate_simple(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %5
%9 = load double, double* %6
%10 = fmul double %8, %9
store double %10, double* %7
%11 = load double, double* %7
%12 = call double @MINN(double %11, i32 1)
store double %12, double* %7
%13 = load double, double* %5
%14 = load double, double* %7
%15 = load double, double* %4
%16 = load double, double* %7
%17 = fsub double 1.000000e+00, %16
%18 = fmul double %15, %17
%19 = call double @llvm.fmuladd.f64(double %13, double %14, double %18)
store double %19, double* %4
%20 = load double, double* %4
ret double %20
}

LLVM IR (-O2):
define double @fps_estimate_simple(double %0, double %1, double %2) {
%4 = fmul double %1, %2
%5 = tail call double @MINN(double %4, i32 1)
%6 = fsub double 1.000000e+00, %5
%7 = fmul double %6, %0
%8 = tail call double @llvm.fmuladd.f64(double %1, double %5, double %7)
ret double %8
}
/* Variables and functions */
double g(double *x, size_t xlen) { return -x[0] * x[0] + 10 - x[1]; }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xec1(%rip),%xmm1
addsd  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
subsd  0x8(%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
movsd  (%rdi),%xmm1
mulsd  %xmm1,%xmm1
movsd  0xef0(%rip),%xmm0
subsd  %xmm1,%xmm0
subsd  0x8(%rdi),%xmm0
ret

LLVM IR (-O0):
define double @g(double* %0, i64 %1) {
%3 = alloca double*
%4 = alloca i64
store double* %0, double** %3
store i64 %1, i64* %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = fneg double %7
%9 = load double*, double** %3
%10 = getelementptr inbounds double, double* %9, i64 0
%11 = load double, double* %10
%12 = call double @llvm.fmuladd.f64(double %8, double %11, double 1.000000e+01)
%13 = load double*, double** %3
%14 = getelementptr inbounds double, double* %13, i64 1
%15 = load double, double* %14
%16 = fsub double %12, %15
ret double %16
}

LLVM IR (-O2):
define double @g(double* nocapture %0, i64 %1) {
%3 = load double, double* %0
%4 = fneg double %3
%5 = tail call double @llvm.fmuladd.f64(double %4, double %3, double 1.000000e+01)
%6 = getelementptr inbounds double, double* %0, i64 1
%7 = load double, double* %6
%8 = fsub double %5, %7
ret double %8
}
/* Type definitions */
struct hdr_iter {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ has_next(struct hdr_iter *);
int /*<<< orphan*/ move_next(struct hdr_iter *);
bool _basic_iter_next(struct hdr_iter *iter) {
  if (!has_next(iter)) {
    return false;
  }
  move_next(iter);
  return true;
}


x86 assembly (clang, -O0):
<_basic_iter_next>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <has_next@plt>
cmp    $0x0,%eax
jne    114a <_basic_iter_next+0x2a>
movl   $0x0,-0x4(%rbp)
jmp    115a <_basic_iter_next+0x3a>
mov    -0x10(%rbp),%rdi
call   1040 <move_next@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_basic_iter_next>:
push   %rbx
mov    %rdi,%rbx
call   1030 <has_next@plt>
test   %eax,%eax
je     113c <_basic_iter_next+0x1c>
mov    %rbx,%rdi
call   1040 <move_next@plt>
mov    $0x1,%eax
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.hdr_iter = type { i32 }
define i32 @_basic_iter_next(%struct.hdr_iter* %0) {
%2 = alloca i32
%3 = alloca %struct.hdr_iter*
store %struct.hdr_iter* %0, %struct.hdr_iter** %3
%4 = load %struct.hdr_iter*, %struct.hdr_iter** %3
%5 = call i32 @has_next(%struct.hdr_iter* %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %8, label %7
7: ; preds = %1
store i32 0, i32* %2
br label %11
8: ; preds = %1
%9 = load %struct.hdr_iter*, %struct.hdr_iter** %3
%10 = call i32 @move_next(%struct.hdr_iter* %9)
store i32 1, i32* %2
br label %11
11: ; preds = %8, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
%struct.hdr_iter = type { i32 }
define i32 @_basic_iter_next(%struct.hdr_iter* %0) {
%2 = tail call i32 @has_next(%struct.hdr_iter* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @move_next(%struct.hdr_iter* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ chr1setBank5(int);
void m33setParamsAXX1(uint16_t addr, uint8_t val) {
  (void)addr;
  chr1setBank5(val << 10);
}


x86 assembly (clang, -O0):
<m33setParamsAXX1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
shl    $0xa,%edi
call   1030 <chr1setBank5@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m33setParamsAXX1>:
mov    %esi,%edi
shl    $0xa,%edi
jmp    1030 <chr1setBank5@plt>

LLVM IR (-O0):
define void @m33setParamsAXX1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %6, 10
%8 = call i32 @chr1setBank5(i32 %7)
ret void
}

LLVM IR (-O2):
define void @m33setParamsAXX1(i32 %0, i32 %1) {
%3 = shl i32 %1, 10
%4 = tail call i32 @chr1setBank5(i32 %3)
ret void
}
void mul() {
  asm volatile("popq %%rax\n\t"
               "popq %%rbx\n\t"
               "mulq %%rbx\n\t"
               "pushq %%rax\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<mul>:
push   %rbp
mov    %rsp,%rbp
pop    %rax
pop    %rbx
mul    %rbx
push   %rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul>:
pop    %rax
pop    %rbx
mul    %rbx
push   %rax
ret

LLVM IR (-O0):
define void @mul() {
ret void
}

LLVM IR (-O2):
define void @mul() {
tail call void asm sideeffect "popq %rax\0A\09popq %rbx\0A\09mulq %rbx\0A\09pushq %rax\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *qe_malloc_bytes(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<qe_malloc_bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qe_malloc_bytes>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @qe_malloc_bytes(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @qe_malloc_bytes(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Variables and functions */
char readKey();
int /*<<< orphan*/ terminal_putchar(char);
char terminal_readkey() {
  char c = readKey();
  terminal_putchar(c);
  return c;
}


x86 assembly (clang, -O0):
<terminal_readkey>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <readKey@plt>
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1040 <terminal_putchar@plt>
movsbl -0x1(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminal_readkey>:
push   %rbx
xor    %eax,%eax
call   1030 <readKey@plt>
movsbl %al,%ebx
mov    %ebx,%edi
call   1040 <terminal_putchar@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define signext i8 @terminal_readkey() {
%1 = alloca i8
%2 = call signext i8 (...) @readKey()
store i8 %2, i8* %1
%3 = load i8, i8* %1
%4 = call i32 @terminal_putchar(i8 signext %3)
%5 = load i8, i8* %1
ret i8 %5
}

LLVM IR (-O2):
define signext i8 @terminal_readkey() {
%1 = tail call signext i8 (...) @readKey()
%2 = tail call i32 @terminal_putchar(i8 signext %1)
ret i8 %1
}
/* Variables and functions */
int /*<<< orphan*/ gen_pop();
int /*<<< orphan*/ output_line(char *);
void callstk(void) {
  gen_pop();
  output_line("jsr ,x");
}


x86 assembly (clang, -O0):
<callstk>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gen_pop@plt>
lea    0xece(%rip),%rdi
call   1040 <output_line@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<callstk>:
push   %rax
xor    %eax,%eax
call   1030 <gen_pop@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <output_line@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"jsr ,x\00"
define void @callstk() {
%1 = call i32 (...) @gen_pop()
%2 = call i32 @output_line(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"jsr ,x\00"
define void @callstk() {
%1 = tail call i32 (...) @gen_pop()
%2 = tail call i32 @output_line(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
void errorFn(void) {
  goto ERROR;
ERROR:
  return;
}


x86 assembly (clang, -O0):
<errorFn>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <errorFn+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<errorFn>:
ret

LLVM IR (-O0):
define void @errorFn() {
br label %1
1: ; preds = %0
ret void
}

LLVM IR (-O2):
define void @errorFn() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char const *);
void success_message(const char *string) {
  va_list args;
  extern char *program_invocation_name;
  printf("%s: %s\n", program_invocation_name, string);
}


x86 assembly (clang, -O0):
<success_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%rsi
mov    -0x8(%rbp),%rdx
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<success_message>:
mov    %rdi,%rdx
mov    0x2ece(%rip),%rax
mov    (%rax),%rsi
lea    0xedc(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s: %s\0A\00"
@program_invocation_name = external global i8*
define void @success_message(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** @program_invocation_name
%5 = load i8*, i8** %2
%6 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s: %s\0A\00"
@program_invocation_name = external global i8*
define void @success_message(i8* %0) {
%2 = load i8*, i8** @program_invocation_name
%3 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %2, i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  struct {
    int a, b;
  } foo[2] = {{1, 2}, {3, 4}};
  assert(foo[0].a == 1);
  assert(foo[0].b == 2);
  assert(foo[1].a == 3);
  assert(foo[1].b == 4);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x1,-0x20(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpl   $0x2,-0x1c(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpl   $0x3,-0x18(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpl   $0x4,-0x14(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.anon = type { i32, i32 }
@__const.main.foo = [2 x %struct.anon] [%struct.anon { i32 1, i32 2 }, %struct.anon { i32 3, i32 4 }]
define i32 @main() {
%1 = alloca i32
%2 = alloca [2 x %struct.anon]
store i32 0, i32* %1
%3 = bitcast [2 x %struct.anon]* %2 to i8*
%4 = getelementptr inbounds [2 x %struct.anon], [2 x %struct.anon]* %2, i64 0, i64 0
%5 = getelementptr inbounds %struct.anon, %struct.anon* %4, i32 0, i32 0
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 1
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = getelementptr inbounds [2 x %struct.anon], [2 x %struct.anon]* %2, i64 0, i64 0
%11 = getelementptr inbounds %struct.anon, %struct.anon* %10, i32 0, i32 1
%12 = load i32, i32* %11
%13 = icmp eq i32 %12, 2
%14 = zext i1 %13 to i32
%15 = call i32 @assert(i32 %14)
%16 = getelementptr inbounds [2 x %struct.anon], [2 x %struct.anon]* %2, i64 0, i64 1
%17 = getelementptr inbounds %struct.anon, %struct.anon* %16, i32 0, i32 0
%18 = load i32, i32* %17
%19 = icmp eq i32 %18, 3
%20 = zext i1 %19 to i32
%21 = call i32 @assert(i32 %20)
%22 = getelementptr inbounds [2 x %struct.anon], [2 x %struct.anon]* %2, i64 0, i64 1
%23 = getelementptr inbounds %struct.anon, %struct.anon* %22, i32 0, i32 1
%24 = load i32, i32* %23
%25 = icmp eq i32 %24, 4
%26 = zext i1 %25 to i32
%27 = call i32 @assert(i32 %26)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
%2 = tail call i32 @assert(i32 1)
%3 = tail call i32 @assert(i32 1)
%4 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int div(int, int);
void div_test() {
  int i = 0;
  for (i = 0; i < 2; ++i)
    assert(div(2 * i, i) == 2);
}


x86 assembly (clang, -O0):
<div_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x2,-0x4(%rbp)
jge    116c <div_test+0x4c>
mov    -0x4(%rbp),%edi
shl    $0x1,%edi
mov    -0x4(%rbp),%esi
call   1040 <div@plt>
cmp    $0x2,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1136 <div_test+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<div_test>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1040 <div@plt>
xor    %edi,%edi
cmp    $0x2,%eax
sete   %dil
call   1030 <assert@plt>
mov    $0x2,%edi
mov    $0x1,%esi
call   1040 <div@plt>
xor    %edi,%edi
cmp    $0x2,%eax
sete   %dil
pop    %rax
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @div_test() {
%1 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %1
br label %2
2: ; preds = %13, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 2
br i1 %4, label %5, label %16
5: ; preds = %2
%6 = load i32, i32* %1
%7 = mul nsw i32 2, %6
%8 = load i32, i32* %1
%9 = call i32 @div(i32 %7, i32 %8)
%10 = icmp eq i32 %9, 2
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
br label %13
13: ; preds = %5
%14 = load i32, i32* %1
%15 = add nsw i32 %14, 1
store i32 %15, i32* %1
br label %2
16: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @div_test() {
%1 = tail call i32 @div(i32 0, i32 0)
%2 = icmp eq i32 %1, 2
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = tail call i32 @div(i32 2, i32 1)
%6 = icmp eq i32 %5, 2
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
ret void
}
void disable_dclk_interrupt() {
  (*(volatile unsigned long *)(((0xFFFFF000) + 0x014))) = 0x04000;
  (*(volatile unsigned long *)((0xE01FC140))) = 0x1;
}


x86 assembly (clang, -O0):
<disable_dclk_interrupt>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffff014,%eax
movq   $0x4000,(%rax)
mov    $0xe01fc140,%eax
movq   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_dclk_interrupt>:
mov    $0xe01fc140,%eax
movq   $0x4000,0x1fe02ed4(%rax)
movq   $0x1,(%rax)
ret

LLVM IR (-O0):
define void @disable_dclk_interrupt() {
store volatile i64 16384, i64* inttoptr (i64 4294963220 to i64*)
store volatile i64 1, i64* inttoptr (i64 3760177472 to i64*)
ret void
}

LLVM IR (-O2):
define void @disable_dclk_interrupt() {
store volatile i64 16384, i64* inttoptr (i64 4294963220 to i64*)
store volatile i64 1, i64* inttoptr (i64 3760177472 to i64*)
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ ncr53c8xx_ram_writeb(scalar_t__, int, void *);
void ncr53c8xx_ram_writew(uint32_t addr, uint16_t val, void *p) {
  ncr53c8xx_ram_writeb(addr, val & 0xff, p);
  ncr53c8xx_ram_writeb(addr + 1, (val >> 8) & 0xff, p);
}


x86 assembly (clang, -O0):
<ncr53c8xx_ram_writew>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
and    $0xff,%esi
mov    -0x18(%rbp),%rdx
call   1030 <ncr53c8xx_ram_writeb@plt>
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
mov    -0xc(%rbp),%esi
sar    $0x8,%esi
and    $0xff,%esi
mov    -0x18(%rbp),%rdx
call   1030 <ncr53c8xx_ram_writeb@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ncr53c8xx_ram_writew>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %esi,%eax
mov    %rdi,%rbx
movzbl %al,%esi
mov    %eax,%ebp
call   1030 <ncr53c8xx_ram_writeb@plt>
add    $0x1,%rbx
mov    %ebp,%eax
movzbl %ah,%esi
mov    %rbx,%rdi
mov    %r14,%rdx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <ncr53c8xx_ram_writeb@plt>

LLVM IR (-O0):
define void @ncr53c8xx_ram_writew(i64 %0, i32 %1, i8* %2) {
%4 = alloca i64
%5 = alloca i32
%6 = alloca i8*
store i64 %0, i64* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i64, i64* %4
%8 = load i32, i32* %5
%9 = and i32 %8, 255
%10 = load i8*, i8** %6
%11 = call i32 @ncr53c8xx_ram_writeb(i64 %7, i32 %9, i8* %10)
%12 = load i64, i64* %4
%13 = add nsw i64 %12, 1
%14 = load i32, i32* %5
%15 = ashr i32 %14, 8
%16 = and i32 %15, 255
%17 = load i8*, i8** %6
%18 = call i32 @ncr53c8xx_ram_writeb(i64 %13, i32 %16, i8* %17)
ret void
}

LLVM IR (-O2):
define void @ncr53c8xx_ram_writew(i64 %0, i32 %1, i8* %2) {
%4 = and i32 %1, 255
%5 = tail call i32 @ncr53c8xx_ram_writeb(i64 %0, i32 %4, i8* %2)
%6 = add nsw i64 %0, 1
%7 = lshr i32 %1, 8
%8 = and i32 %7, 255
%9 = tail call i32 @ncr53c8xx_ram_writeb(i64 %6, i32 %8, i8* %2)
ret void
}
int my_compute_power_rec(int nb, int p) {
  if (nb == 0)
    return (1);
  if (nb < 0)
    return (0);
  return (nb * (my_compute_power_rec(nb, p - 1)));
}


x86 assembly (clang, -O0):
<my_compute_power_rec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1134 <my_compute_power_rec+0x24>
movl   $0x1,-0x4(%rbp)
jmp    1169 <my_compute_power_rec+0x59>
cmpl   $0x0,-0x8(%rbp)
jge    114a <my_compute_power_rec+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    1169 <my_compute_power_rec+0x59>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
call   1030 <my_compute_power_rec@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
imul   %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_compute_power_rec>:
test   %edi,%edi
je     1117 <my_compute_power_rec+0x17>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
test   %edi,%edi
jns    1110 <my_compute_power_rec+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @my_compute_power_rec(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, i32* %3
br label %20
9: ; preds = %2
%10 = load i32, i32* %4
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 0, i32* %3
br label %20
13: ; preds = %9
%14 = load i32, i32* %4
%15 = load i32, i32* %4
%16 = load i32, i32* %5
%17 = sub nsw i32 %16, 1
%18 = call i32 @my_compute_power_rec(i32 %15, i32 %17)
%19 = mul nsw i32 %14, %18
store i32 %19, i32* %3
br label %20
20: ; preds = %13, %12, %8
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @my_compute_power_rec(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = icmp slt i32 %0, 0
br label %6
6: ; preds = %6, %4
br i1 %5, label %7, label %6
7: ; preds = %6, %2
%8 = phi i32 [ 1, %2 ], [ 0, %6 ]
ret i32 %8
}
void gtk_list_store_remove() {}


x86 assembly (clang, -O0):
<gtk_list_store_remove>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_list_store_remove>:
ret

LLVM IR (-O0):
define void @gtk_list_store_remove() {
ret void
}

LLVM IR (-O2):
define void @gtk_list_store_remove() {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int int32_t;

/* Variables and functions */
int32_t translateint32_t(int32_t in) {
  int32_t r;
  uint8_t *i;
  i = (uint8_t *)&in;
  r = i[3];
  r = (r << 8) + i[2];
  r = (r << 8) + i[1];
  r = (r << 8) + *i;
  return r;
}


x86 assembly (clang, -O0):
<translateint32_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0xc(%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    -0x10(%rbp),%rcx
add    0x8(%rcx),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    -0x10(%rbp),%rcx
add    0x4(%rcx),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x8,%eax
mov    -0x10(%rbp),%rcx
add    (%rcx),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<translateint32_t>:
ret

LLVM IR (-O0):
define i32 @translateint32_t(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %2
store i32* %2, i32** %4
%5 = load i32*, i32** %4
%6 = getelementptr inbounds i32, i32* %5, i64 3
%7 = load i32, i32* %6
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = shl i32 %8, 8
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i64 2
%12 = load i32, i32* %11
%13 = add nsw i32 %9, %12
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = shl i32 %14, 8
%16 = load i32*, i32** %4
%17 = getelementptr inbounds i32, i32* %16, i64 1
%18 = load i32, i32* %17
%19 = add nsw i32 %15, %18
store i32 %19, i32* %3
%20 = load i32, i32* %3
%21 = shl i32 %20, 8
%22 = load i32*, i32** %4
%23 = load i32, i32* %22
%24 = add nsw i32 %21, %23
store i32 %24, i32* %3
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @translateint32_t(i32 %0) {
ret i32 poison
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_PKEY;
typedef int /*<<< orphan*/ BIO;
typedef int /*<<< orphan*/ ASN1_PCTX;

/* Variables and functions */
int print_gost_94(int /*<<< orphan*/ *, int /*<<< orphan*/ const *, int,
                  int /*<<< orphan*/ *, int /*<<< orphan*/);
int param_print_gost94(BIO *out, const EVP_PKEY *pkey, int indent,
                       ASN1_PCTX *pctx) {
  return print_gost_94(out, pkey, indent, pctx, 0);
}


x86 assembly (clang, -O0):
<param_print_gost94>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
xor    %r8d,%r8d
call   1030 <print_gost_94@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<param_print_gost94>:
xor    %r8d,%r8d
jmp    1030 <print_gost_94@plt>

LLVM IR (-O0):
define i32 @param_print_gost94(i32* %0, i32* %1, i32 %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32, i32* %7
%12 = load i32*, i32** %8
%13 = call i32 @print_gost_94(i32* %9, i32* %10, i32 %11, i32* %12, i32 0)
ret i32 %13
}

LLVM IR (-O2):
define i32 @param_print_gost94(i32* %0, i32* %1, i32 %2, i32* %3) {
%5 = tail call i32 @print_gost_94(i32* %0, i32* %1, i32 %2, i32* %3, i32 0)
ret i32 %5
}
int pathcon_nm8_n_out(void) { return 2; }


x86 assembly (clang, -O0):
<pathcon_nm8_n_out>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm8_n_out>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @pathcon_nm8_n_out() {
ret i32 2
}

LLVM IR (-O2):
define i32 @pathcon_nm8_n_out() {
ret i32 2
}
/* Type definitions */
typedef int /*<<< orphan*/ GLenum;

/* Variables and functions */
int glutVideoResizeGet(GLenum eWhat) { return (0x00); }


x86 assembly (clang, -O0):
<glutVideoResizeGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutVideoResizeGet>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @glutVideoResizeGet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @glutVideoResizeGet(i32 %0) {
ret i32 0
}
int _close(int file) {
  if (file) {
  }
  return -1;
}


x86 assembly (clang, -O0):
<_close>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1116 <_close+0x16>
jmp    1116 <_close+0x16>
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_close>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @_close(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
br label %6
6: ; preds = %5, %1
ret i32 -1
}

LLVM IR (-O2):
define i32 @_close(i32 %0) {
ret i32 -1
}
void thetaphipv2cv(theta, phi, polar_vec, cart_vec) double theta;
float phi;
double *polar_vec;
double *cart_vec;
{
  double polar_base[9];
  calc_polar_base_at_theta_phi(theta, phi, polar_base);
  lonlatpv2cv_with_base(polar_vec, polar_base, cart_vec);
}


x86 assembly (clang, -O0):
<thetaphipv2cv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
movsd  %xmm1,-0x78(%rbp)
movaps %xmm0,%xmm1
movsd  -0x78(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
movsd  %xmm1,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
mov    %rdi,-0x18(%rbp)
mov    %rsi,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
lea    -0x70(%rbp),%rdi
mov    $0x2,%al
call   1030 <calc_polar_base_at_theta_phi@plt>
mov    -0x18(%rbp),%rdi
lea    -0x70(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    $0x0,%al
call   1040 <lonlatpv2cv_with_base@plt>
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thetaphipv2cv>:
push   %r15
push   %r14
push   %rbx
sub    $0x50,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
cvtsd2ss %xmm1,%xmm1
cvtss2sd %xmm1,%xmm1
mov    %rsp,%r15
mov    %r15,%rdi
mov    $0x2,%al
call   1030 <calc_polar_base_at_theta_phi@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
xor    %eax,%eax
call   1040 <lonlatpv2cv_with_base@plt>
add    $0x50,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @thetaphipv2cv(double %0, double %1, double* %2, double* %3) {
%5 = alloca double
%6 = alloca float
%7 = alloca double*
%8 = alloca double*
%9 = alloca [9 x double]
%10 = fptrunc double %1 to float
store double %0, double* %5
store float %10, float* %6
store double* %2, double** %7
store double* %3, double** %8
%11 = load double, double* %5
%12 = load float, float* %6
%13 = fpext float %12 to double
%14 = getelementptr inbounds [9 x double], [9 x double]* %9, i64 0, i64 0
%15 = call i32 (double, double, double*, ...) bitcast (i32 (...)* @calc_polar_base_at_theta_phi to i32 (double, double, double*, ...)*)(double %11, double %13, double* %14)
%16 = load double*, double** %7
%17 = getelementptr inbounds [9 x double], [9 x double]* %9, i64 0, i64 0
%18 = load double*, double** %8
%19 = call i32 (double*, double*, double*, ...) bitcast (i32 (...)* @lonlatpv2cv_with_base to i32 (double*, double*, double*, ...)*)(double* %16, double* %17, double* %18)
ret void
}

LLVM IR (-O2):
define void @thetaphipv2cv(double %0, double %1, double* %2, double* %3) {
%5 = alloca [9 x double]
%6 = fptrunc double %1 to float
%7 = bitcast [9 x double]* %5 to i8*
%8 = fpext float %6 to double
%9 = getelementptr inbounds [9 x double], [9 x double]* %5, i64 0, i64 0
%10 = call i32 (double, double, double*, ...) bitcast (i32 (...)* @calc_polar_base_at_theta_phi to i32 (double, double, double*, ...)*)(double %0, double %8, double* %9)
%11 = call i32 (double*, double*, double*, ...) bitcast (i32 (...)* @lonlatpv2cv_with_base to i32 (double*, double*, double*, ...)*)(double* %2, double* %9, double* %3)
ret void
}
/* Variables and functions */
int lib_f(int);
int lib_e(int i) { return lib_f(i - 1) + 1; }


x86 assembly (clang, -O0):
<lib_e>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <lib_f@plt>
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib_e>:
push   %rax
add    $0xffffffff,%edi
call   1030 <lib_f@plt>
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @lib_e(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 1
%5 = call i32 @lib_f(i32 %4)
%6 = add nsw i32 %5, 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @lib_e(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = tail call i32 @lib_f(i32 %2)
%4 = add nsw i32 %3, 1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
void *calloc(unsigned int, int);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void *callocate(unsigned int size) {
  void *ptr = calloc(size, 1);
  if (ptr == NULL) {
    fprintf(stderr, "Memory allocation error, terminating\n");
    exit(EXIT_FAILURE);
  }
  return (ptr);
}


x86 assembly (clang, -O0):
<callocate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    117a <callocate+0x4a>
mov    0x2e82(%rip),%rax
mov    (%rax),%edi
lea    0xe99(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e65(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<callocate>:
push   %rax
mov    $0x1,%esi
call   1030 <calloc@plt>
test   %rax,%rax
je     1142 <callocate+0x12>
pop    %rcx
ret
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
lea    0xeae(%rip),%rsi
call   1040 <fprintf@plt>
mov    0x2e7a(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [38 x i8] c"Memory allocation error, terminating\0A\00"
@EXIT_FAILURE = global i32 0
define i8* @callocate(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @calloc(i32 %4, i32 1)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%11 = load i32, i32* @EXIT_FAILURE
%12 = call i32 @exit(i32 %11)
unreachable
13: ; preds = %1
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [38 x i8] c"Memory allocation error, terminating\0A\00"
@EXIT_FAILURE = global i32 0
define noalias i8* @callocate(i32 %0) {
%2 = tail call i8* @calloc(i32 %0, i32 1)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
9: ; preds = %1
ret i8* %2
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int syspool_standard_size(int *n) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(301, n, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<syspool_standard_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x12d,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syspool_standard_size>:
mov    %rdi,%rsi
mov    $0x12d,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @syspool_standard_size(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32* %0, i32** %2
%6 = load i32*, i32** %2
%7 = load i32*, i32** %3
%8 = load double*, double** %5
%9 = call i32 @_ada_use_c2phc4c(i32 301, i32* %6, i32* %7, double* %8, i32 0)
store i32 %9, i32* %4
%10 = load i32, i32* %4
ret i32 %10
}

LLVM IR (-O2):
define i32 @syspool_standard_size(i32* %0) {
%2 = tail call i32 @_ada_use_c2phc4c(i32 301, i32* %0, i32* undef, double* undef, i32 0)
ret i32 %2
}
char *strchrnul(const char *str, int ch) {
  char c = (char)ch;
  while (*str && *str != c) {
    ++str;
  }
  return (char *)str;
}


x86 assembly (clang, -O0):
<strchrnul>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0xe(%rbp)
je     1139 <strchrnul+0x39>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
movsbl -0xd(%rbp),%ecx
cmp    %ecx,%eax
setne  %al
mov    %al,-0xe(%rbp)
mov    -0xe(%rbp),%al
test   $0x1,%al
jne    1149 <strchrnul+0x49>
jmp    115a <strchrnul+0x5a>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1111 <strchrnul+0x11>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchrnul>:
mov    %rdi,%rax
mov    (%rdi),%cl
test   %cl,%cl
je     1123 <strchrnul+0x23>
movsbl %sil,%edx
nopl   (%rax)
movsbl %cl,%ecx
cmp    %ecx,%edx
je     1123 <strchrnul+0x23>
movzbl 0x1(%rax),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strchrnul+0x10>
ret

LLVM IR (-O0):
define i8* @strchrnul(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = trunc i32 %6 to i8
store i8 %7, i8* %5
br label %8
8: ; preds = %22, %2
%9 = load i8*, i8** %3
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %20
13: ; preds = %8
%14 = load i8*, i8** %3
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %5
%18 = sext i8 %17 to i32
%19 = icmp ne i32 %16, %18
br label %20
20: ; preds = %13, %8
%21 = phi i1 [ false, %8 ], [ %19, %13 ]
br i1 %21, label %22, label %25
22: ; preds = %20
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %3
br label %8
25: ; preds = %20
%26 = load i8*, i8** %3
ret i8* %26
}

LLVM IR (-O2):
define i8* @strchrnul(i8* %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %2
%6 = shl i32 %1, 24
%7 = ashr exact i32 %6, 24
br label %8
8: ; preds = %5, %13
%9 = phi i8 [ %3, %5 ], [ %15, %13 ]
%10 = phi i8* [ %0, %5 ], [ %14, %13 ]
%11 = sext i8 %9 to i32
%12 = icmp eq i32 %7, %11
br i1 %12, label %17, label %13
13: ; preds = %8
%14 = getelementptr inbounds i8, i8* %10, i64 1
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %8
17: ; preds = %8, %13, %2
%18 = phi i8* [ %0, %2 ], [ %14, %13 ], [ %10, %8 ]
ret i8* %18
}
/* Variables and functions */
int /*<<< orphan*/ _defaults_set(char *, char *);
void defaults_add(char *key, char *value) { _defaults_set(key, value); }


x86 assembly (clang, -O0):
<defaults_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <_defaults_set@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<defaults_add>:
jmp    1030 <_defaults_set@plt>

LLVM IR (-O0):
define void @defaults_add(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @_defaults_set(i8* %5, i8* %6)
ret void
}

LLVM IR (-O2):
define void @defaults_add(i8* %0, i8* %1) {
%3 = tail call i32 @_defaults_set(i8* %0, i8* %1)
ret void
}
/* Variables and functions */
int nepim_str_split_at(char *, int, char **);
int addr_split_iface(char *buf, int buf_size, char **iface) {
  return nepim_str_split_at(buf, buf_size, iface);
}


x86 assembly (clang, -O0):
<addr_split_iface>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <nepim_str_split_at@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<addr_split_iface>:
jmp    1030 <nepim_str_split_at@plt>

LLVM IR (-O0):
define i32 @addr_split_iface(i8* %0, i32 %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8**
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8** %2, i8*** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i8**, i8*** %6
%10 = call i32 @nepim_str_split_at(i8* %7, i32 %8, i8** %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @addr_split_iface(i8* %0, i32 %1, i8** %2) {
%4 = tail call i32 @nepim_str_split_at(i8* %0, i32 %1, i8** %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ badfmt(char *);
scalar_t__ malloc(unsigned int);
char *Alloc(unsigned len) {
  char *pointer = (char *)malloc(len);
  if (pointer == 0)
    badfmt("bug: not enough memory");
  return pointer;
}


x86 assembly (clang, -O0):
<Alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114e <Alloc+0x2e>
lea    0xeb7(%rip),%rdi
call   1040 <badfmt@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Alloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <Alloc+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <badfmt@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"bug: not enough memory\00"
define i8* @Alloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i64 @malloc(i32 %4)
%6 = inttoptr i64 %5 to i8*
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @badfmt(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [23 x i8] c"bug: not enough memory\00"
define i8* @Alloc(i32 %0) {
%2 = tail call i64 @malloc(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @badfmt(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
%7 = inttoptr i64 %2 to i8*
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int _XVIDtoVisual() {
  printf("_XVIDtoVisual called\n");
  return 0;
}


x86 assembly (clang, -O0):
<_XVIDtoVisual>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_XVIDtoVisual>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"_XVIDtoVisual called\0A\00"
define i32 @_XVIDtoVisual() {
%1 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [21 x i8] c"_XVIDtoVisual called\00"
define i32 @_XVIDtoVisual() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int main() { return 0UL <= 0UL; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ EVP_cleanup();
int /*<<< orphan*/ SSL_CTX_free(void *);
void ssl_fini(void *priv) {
  SSL_CTX_free(priv);
  EVP_cleanup();
  return;
}


x86 assembly (clang, -O0):
<ssl_fini>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <SSL_CTX_free@plt>
mov    $0x0,%al
call   1030 <EVP_cleanup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssl_fini>:
push   %rax
call   1040 <SSL_CTX_free@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <EVP_cleanup@plt>

LLVM IR (-O0):
define void @ssl_fini(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @SSL_CTX_free(i8* %3)
%5 = call i32 (...) @EVP_cleanup()
ret void
}

LLVM IR (-O2):
define void @ssl_fini(i8* %0) {
%2 = tail call i32 @SSL_CTX_free(i8* %0)
%3 = tail call i32 (...) @EVP_cleanup()
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int multprec_Newton_Laurent_step(int deci) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(329, &deci, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<multprec_Newton_Laurent_step>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x149,%edi
lea    -0x4(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<multprec_Newton_Laurent_step>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x149,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @multprec_Newton_Laurent_step(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %3
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc4c(i32 329, i32* %2, i32* %6, double* %7, i32 0)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @multprec_Newton_Laurent_step(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc4c(i32 329, i32* %2, i32* undef, double* undef, i32 0)
ret i32 %3
}
/* Variables and functions */
int date_utc_offset();
int date_get_utc_offset(void) { return date_utc_offset(); }


x86 assembly (clang, -O0):
<date_get_utc_offset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <date_utc_offset@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<date_get_utc_offset>:
xor    %eax,%eax
jmp    1030 <date_utc_offset@plt>

LLVM IR (-O0):
define i32 @date_get_utc_offset() {
%1 = call i32 (...) @date_utc_offset()
ret i32 %1
}

LLVM IR (-O2):
define i32 @date_get_utc_offset() {
%1 = tail call i32 (...) @date_utc_offset()
ret i32 %1
}
int MediaSetGovLength(int streamid, int value) { return 0; }


x86 assembly (clang, -O0):
<MediaSetGovLength>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MediaSetGovLength>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @MediaSetGovLength(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @MediaSetGovLength(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ _hmt_register_covercase(char *, char *);
void _hmt_covercase_HMM_DotVec4_init(void) {
  _hmt_register_covercase("HMM_DotVec4", "1");
}


x86 assembly (clang, -O0):
<_hmt_covercase_HMM_DotVec4_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xeea(%rip),%rsi
call   1030 <_hmt_register_covercase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hmt_covercase_HMM_DotVec4_init>:
lea    0xee9(%rip),%rdi
lea    0xeee(%rip),%rsi
jmp    1030 <_hmt_register_covercase@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"HMM_DotVec4\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_DotVec4_init() {
%1 = call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"HMM_DotVec4\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_DotVec4_init() {
%1 = tail call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void iface1_func2(void) { printf("B - version 0 func2\n"); }


x86 assembly (clang, -O0):
<iface1_func2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<iface1_func2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"B - version 0 func2\0A\00"
define void @iface1_func2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"B - version 0 func2\00"
define void @iface1_func2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
int hash2(int val) {
  static int seed = 0x87654321;
  seed *= val;
  if (seed == 0) {
    seed = 0x87654321;
  }
  return val ^ seed;
}


x86 assembly (clang, -O0):
<hash2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   0x2f0f(%rip),%eax
mov    %eax,0x2f09(%rip)
cmpl   $0x0,0x2f02(%rip)
jne    112e <hash2+0x2e>
movl   $0x87654321,0x2ef2(%rip)
43 65 87
mov    -0x4(%rbp),%eax
xor    0x2ee9(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash2>:
mov    0x2f1a(%rip),%ecx
imul   %edi,%ecx
test   %ecx,%ecx
mov    $0x87654321,%eax
cmovne %ecx,%eax
mov    %eax,0x2f07(%rip)
xor    %edi,%eax
ret

LLVM IR (-O0):
@hash2.seed = internal global i32 -2023406815
define i32 @hash2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @hash2.seed
%5 = mul nsw i32 %4, %3
store i32 %5, i32* @hash2.seed
%6 = load i32, i32* @hash2.seed
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -2023406815, i32* @hash2.seed
br label %9
9: ; preds = %8, %1
%10 = load i32, i32* %2
%11 = load i32, i32* @hash2.seed
%12 = xor i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
@hash2.seed = internal unnamed_addr global i32 -2023406815
define i32 @hash2(i32 %0) {
%2 = load i32, i32* @hash2.seed
%3 = mul nsw i32 %2, %0
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -2023406815, i32 %3
store i32 %5, i32* @hash2.seed
%6 = xor i32 %5, %0
ret i32 %6
}