int sys$setimr(unsigned int efn, signed long long *daytim, void (*astadr)(long),
               unsigned long reqidt, unsigned int flags) {
  return ({
    unsigned long resultvar;
    register long int _a5 asm("r8") = (long)(flags);
    register long int _a4 asm("r10") = (long)(reqidt);
    register long int _a3 asm("rdx") = (long)(astadr);
    register long int _a2 asm("rsi") = (long)(daytim);
    register long int _a1 asm("rdi") = (long)(efn);
    asm volatile("movq %1, %%rax\n\t"
                 "int $0x81\n\t"
                 : "=a"(resultvar)
                 : "i"(11), "r"(_a1), "r"(_a2), "r"(_a3), "r"(_a4), "r"(_a5)
                 : "memory", "cc", "r11", "cx");
    (long)resultvar;
  });
}


x86 assembly (clang, -O0):
<sys$setimr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x24(%rbp),%eax
mov    %rax,-0x38(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x48(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x50(%rbp)
mov    -0x4(%rbp),%eax
mov    %rax,-0x58(%rbp)
mov    -0x58(%rbp),%rdi
mov    -0x50(%rbp),%rsi
mov    -0x48(%rbp),%rdx
mov    -0x40(%rbp),%r10
mov    -0x38(%rbp),%r8
mov    $0xb,%rax
int    $0x81
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x60(%rbp)
mov    -0x60(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys$setimr>:
mov    %r8d,%r8d
mov    %edi,%edi
mov    %rcx,%r10
mov    $0xb,%rax
int    $0x81
ret

LLVM IR (-O0):
define i32 @"sys$setimr"(i32 %0, i64* %1, void (i64)* %2, i64 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i64*
%8 = alloca void (i64)*
%9 = alloca i64
%10 = alloca i32
%11 = alloca i64
%12 = alloca i64
%13 = alloca i64
%14 = alloca i64
%15 = alloca i64
%16 = alloca i64
%17 = alloca i64
store i32 %0, i32* %6
store i64* %1, i64** %7
store void (i64)* %2, void (i64)** %8
store i64 %3, i64* %9
store i32 %4, i32* %10
%18 = load i32, i32* %10
%19 = zext i32 %18 to i64
store i64 %19, i64* %12
%20 = load i64, i64* %9
store i64 %20, i64* %13
%21 = load void (i64)*, void (i64)** %8
%22 = ptrtoint void (i64)* %21 to i64
store i64 %22, i64* %14
%23 = load i64*, i64** %7
%24 = ptrtoint i64* %23 to i64
store i64 %24, i64* %15
%25 = load i32, i32* %6
%26 = zext i32 %25 to i64
store i64 %26, i64* %16
%27 = load i64, i64* %16
%28 = load i64, i64* %15
%29 = load i64, i64* %14
%30 = load i64, i64* %13
%31 = load i64, i64* %12
%32 = call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x81\0A\09", "={ax},i,{rdi},{rsi},{rdx},{r10},{r8},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 11, i64 %27, i64 %28, i64 %29, i64 %30, i64 %31)
store i64 %32, i64* %11
%33 = load i64, i64* %11
store i64 %33, i64* %17
%34 = load i64, i64* %17
%35 = trunc i64 %34 to i32
ret i32 %35
}

LLVM IR (-O2):
define i32 @"sys$setimr"(i32 %0, i64* %1, void (i64)* %2, i64 %3, i32 %4) {
%6 = zext i32 %4 to i64
%7 = ptrtoint void (i64)* %2 to i64
%8 = ptrtoint i64* %1 to i64
%9 = zext i32 %0 to i64
%10 = tail call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x81\0A\09", "={ax},i,{rdi},{rsi},{rdx},{r10},{r8},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 11, i64 %9, i64 %8, i64 %7, i64 %3, i64 %6)
%11 = trunc i64 %10 to i32
ret i32 %11
}