xunge/DecIR huggingface dataset:
unsigned int areCountsBelowThreshold(unsigned int *counts, unsigned int start,
                                     unsigned int end,
                                     const unsigned int THRESHOLD) {
  for (int i = start; i < end; i++) {
    if (counts[i] > THRESHOLD) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<areCountsBelowThreshold>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
cmp    -0x18(%rbp),%eax
jae    1156 <areCountsBelowThreshold+0x56>
mov    -0x10(%rbp),%rax
movslq -0x20(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x1c(%rbp),%eax
jbe    1143 <areCountsBelowThreshold+0x43>
movl   $0x0,-0x4(%rbp)
jmp    115d <areCountsBelowThreshold+0x5d>
jmp    1148 <areCountsBelowThreshold+0x48>
mov    -0x20(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    1117 <areCountsBelowThreshold+0x17>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<areCountsBelowThreshold>:
mov    $0x1,%eax
cmp    %edx,%esi
jae    111f <areCountsBelowThreshold+0x1f>
movslq %esi,%r8
lea    (%rdi,%r8,4),%rdi
cmp    %ecx,(%rdi)
ja     1120 <areCountsBelowThreshold+0x20>
add    $0x4,%rdi
add    $0x1,%esi
cmp    %edx,%esi
jb     1110 <areCountsBelowThreshold+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @areCountsBelowThreshold(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%11 = load i32, i32* %7
store i32 %11, i32* %10
br label %12
12: ; preds = %26, %4
%13 = load i32, i32* %10
%14 = load i32, i32* %8
%15 = icmp ult i32 %13, %14
br i1 %15, label %16, label %29
16: ; preds = %12
%17 = load i32*, i32** %6
%18 = load i32, i32* %10
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %17, i64 %19
%21 = load i32, i32* %20
%22 = load i32, i32* %9
%23 = icmp ugt i32 %21, %22
br i1 %23, label %24, label %25
24: ; preds = %16
store i32 0, i32* %5
br label %30
25: ; preds = %16
br label %26
26: ; preds = %25
%27 = load i32, i32* %10
%28 = add nsw i32 %27, 1
store i32 %28, i32* %10
br label %12
29: ; preds = %12
store i32 1, i32* %5
br label %30
30: ; preds = %29, %24
%31 = load i32, i32* %5
ret i32 %31
}

LLVM IR (-O2):
define i32 @areCountsBelowThreshold(i32* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp ult i32 %1, %2
br i1 %5, label %6, label %17
6: ; preds = %4
%7 = sext i32 %1 to i64
br label %11
8: ; preds = %11
%9 = trunc i64 %16 to i32
%10 = icmp ult i32 %9, %2
br i1 %10, label %11, label %17
11: ; preds = %6, %8
%12 = phi i64 [ %7, %6 ], [ %16, %8 ]
%13 = getelementptr inbounds i32, i32* %0, i64 %12
%14 = load i32, i32* %13
%15 = icmp ugt i32 %14, %3
%16 = add nsw i64 %12, 1
br i1 %15, label %17, label %8
17: ; preds = %8, %11, %4
%18 = phi i32 [ 1, %4 ], [ 0, %11 ], [ 1, %8 ]
ret i32 %18
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int mapcon_degree_of_map(int dim, int ind, int *deg) {
  int a[2], fail;
  double *c;
  a[0] = dim;
  a[1] = ind;
  fail = _ada_use_c2phc4c(435, a, deg, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<mapcon_degree_of_map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
lea    -0x18(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    $0x1b3,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mapcon_degree_of_map>:
push   %rax
mov    %edi,(%rsp)
mov    %esi,0x4(%rsp)
mov    %rsp,%rsi
mov    $0x1b3,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @mapcon_degree_of_map(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
%7 = alloca [2 x i32]
%8 = alloca i32
%9 = alloca double*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%10 = load i32, i32* %4
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
store i32 %10, i32* %11
%12 = load i32, i32* %5
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 1
store i32 %12, i32* %13
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 0
%15 = load i32*, i32** %6
%16 = load double*, double** %9
%17 = call i32 @_ada_use_c2phc4c(i32 435, i32* %14, i32* %15, double* %16, i32 0)
store i32 %17, i32* %8
%18 = load i32, i32* %8
ret i32 %18
}

LLVM IR (-O2):
define i32 @mapcon_degree_of_map(i32 %0, i32 %1, i32* %2) {
%4 = alloca [2 x i32]
%5 = bitcast [2 x i32]* %4 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 %0, i32* %6
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 %1, i32* %7
%8 = call i32 @_ada_use_c2phc4c(i32 435, i32* %6, i32* %2, double* undef, i32 0)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ _Error(long, char *);
void Error_SyntaxMarksMustBeConstant(long p_position) {
  _Error(p_position, "Syntax marks must be constant");
}


x86 assembly (clang, -O0):
<Error_SyntaxMarksMustBeConstant>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <_Error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Error_SyntaxMarksMustBeConstant>:
lea    0xee9(%rip),%rsi
jmp    1030 <_Error@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"Syntax marks must be constant\00"
define void @Error_SyntaxMarksMustBeConstant(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @_Error(i64 %3, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"Syntax marks must be constant\00"
define void @Error_SyntaxMarksMustBeConstant(i64 %0) {
%2 = tail call i32 @_Error(i64 %0, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fprintf(int /*<<< orphan*/ *, char *, void *, int, char *);
scalar_t__ strlen(char *);
int deque_dump_str_cb(FILE *o, void *data) {
  return fprintf(o, "%p = [len: %d] \"%s\"\n", data, (int)strlen((char *)data),
                 (char *)data);
}


x86 assembly (clang, -O0):
<deque_dump_str_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    %eax,%ecx
mov    -0x10(%rbp),%r8
lea    0xea2(%rip),%rsi
call   1040 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<deque_dump_str_cb>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
lea    0xec7(%rip),%rsi
mov    %r14,%rdi
mov    %rbx,%rdx
mov    %eax,%ecx
mov    %rbx,%r8
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <fprintf@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"%p = [len: %d] \22%s\22\0A\00"
define i32 @deque_dump_str_cb(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
store i32* %0, i32** %3
store i8* %1, i8** %4
%5 = load i32*, i32** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i64 @strlen(i8* %7)
%9 = trunc i64 %8 to i32
%10 = load i8*, i8** %4
%11 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %6, i32 %9, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
@.str = [21 x i8] c"%p = [len: %d] \22%s\22\0A\00"
define i32 @deque_dump_str_cb(i32* nocapture %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%4 = trunc i64 %3 to i32
%5 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %4, i8* %1)
ret i32 %5
}
/* Type definitions */
struct string {
  int dummy;
};
struct dict {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sets(struct dict *, char const *, struct string *);
int /*<<< orphan*/ string_destroy(struct string *);
struct string *string_init(char const *);
void set(struct dict *dict, const char *key, const char *value) {
  struct string *value_string = string_init(value);
  sets(dict, key, value_string);
  string_destroy(value_string);
}


x86 assembly (clang, -O0):
<set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <string_init@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <sets@plt>
mov    -0x20(%rbp),%rdi
call   1050 <string_destroy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
mov    %rdx,%rdi
call   1030 <string_init@plt>
mov    %rax,%rbx
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rax,%rdx
call   1040 <sets@plt>
mov    %rbx,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <string_destroy@plt>

LLVM IR (-O0):
%struct.dict = type { i32 }
%struct.string = type { i32 }
define void @set(%struct.dict* %0, i8* %1, i8* %2) {
%4 = alloca %struct.dict*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca %struct.string*
store %struct.dict* %0, %struct.dict** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = load i8*, i8** %6
%9 = call %struct.string* @string_init(i8* %8)
store %struct.string* %9, %struct.string** %7
%10 = load %struct.dict*, %struct.dict** %4
%11 = load i8*, i8** %5
%12 = load %struct.string*, %struct.string** %7
%13 = call i32 @sets(%struct.dict* %10, i8* %11, %struct.string* %12)
%14 = load %struct.string*, %struct.string** %7
%15 = call i32 @string_destroy(%struct.string* %14)
ret void
}

LLVM IR (-O2):
%struct.dict = type { i32 }
%struct.string = type { i32 }
define void @set(%struct.dict* %0, i8* %1, i8* %2) {
%4 = tail call %struct.string* @string_init(i8* %2)
%5 = tail call i32 @sets(%struct.dict* %0, i8* %1, %struct.string* %4)
%6 = tail call i32 @string_destroy(%struct.string* %4)
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
int32_t __le_s24(const void *p) {
  return ((int32_t)(*((uint32_t *)(p)) << 8)) >> 8;
}


x86 assembly (clang, -O0):
<__le_s24>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x8,%eax
sar    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__le_s24>:
mov    (%rdi),%eax
shl    $0x8,%eax
sar    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @__le_s24(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = ashr i32 %6, 8
ret i32 %7
}

LLVM IR (-O2):
define i32 @__le_s24(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = shl i32 %3, 8
%5 = ashr exact i32 %4, 8
ret i32 %5
}
int checkIfEqual(int *set1, int len, int *set2) {
  int i;
  for (i = 0; i < len; i++) {
    if (set1[i] != set2[i]) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<checkIfEqual>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
mov    -0x24(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115d <checkIfEqual+0x5d>
mov    -0x10(%rbp),%rax
movslq -0x24(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x20(%rbp),%rcx
movslq -0x24(%rbp),%rdx
cmp    (%rcx,%rdx,4),%eax
je     114a <checkIfEqual+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    1164 <checkIfEqual+0x64>
jmp    114f <checkIfEqual+0x4f>
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1116 <checkIfEqual+0x16>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkIfEqual>:
mov    $0x1,%eax
test   %esi,%esi
jle    1121 <checkIfEqual+0x21>
mov    %esi,%r8d
xor    %esi,%esi
xchg   %ax,%ax
mov    (%rdi,%rsi,4),%ecx
cmp    (%rdx,%rsi,4),%ecx
jne    1122 <checkIfEqual+0x22>
add    $0x1,%rsi
cmp    %rsi,%r8
jne    1110 <checkIfEqual+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @checkIfEqual(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 0, i32* %8
br label %9
9: ; preds = %27, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %30
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32*, i32** %7
%20 = load i32, i32* %8
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %19, i64 %21
%23 = load i32, i32* %22
%24 = icmp ne i32 %18, %23
br i1 %24, label %25, label %26
25: ; preds = %13
store i32 0, i32* %4
br label %31
26: ; preds = %13
br label %27
27: ; preds = %26
%28 = load i32, i32* %8
%29 = add nsw i32 %28, 1
store i32 %29, i32* %8
br label %9
30: ; preds = %9
store i32 1, i32* %4
br label %31
31: ; preds = %30, %25
%32 = load i32, i32* %4
ret i32 %32
}

LLVM IR (-O2):
define i32 @checkIfEqual(i32* nocapture %0, i32 %1, i32* nocapture %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %16, %6
br i1 %8, label %17, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %16, %7 ]
%11 = getelementptr inbounds i32, i32* %0, i64 %10
%12 = load i32, i32* %11
%13 = getelementptr inbounds i32, i32* %2, i64 %10
%14 = load i32, i32* %13
%15 = icmp eq i32 %12, %14
%16 = add nuw nsw i64 %10, 1
br i1 %15, label %7, label %17
17: ; preds = %9, %7, %3
%18 = phi i32 [ 1, %3 ], [ 1, %7 ], [ 0, %9 ]
ret i32 %18
}
int close_accept(int idx, int sidx) { return 0; }


x86 assembly (clang, -O0):
<close_accept>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_accept>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @close_accept(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @close_accept(i32 %0, i32 %1) {
ret i32 0
}
int xycompare(const void *x1, const void *x2) {
  return (*(int *)x1 > *(int *)x2) - (*(int *)x1 < *(int *)x2);
}


x86 assembly (clang, -O0):
<xycompare>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
mov    -0x10(%rbp),%rdx
cmp    (%rdx),%ecx
setl   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xycompare>:
mov    (%rdi),%ecx
xor    %eax,%eax
xor    %edx,%edx
cmp    (%rsi),%ecx
setg   %al
setl   %dl
sub    %edx,%eax
ret

LLVM IR (-O0):
define i32 @xycompare(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = icmp sgt i32 %7, %10
%12 = zext i1 %11 to i32
%13 = load i8*, i8** %3
%14 = bitcast i8* %13 to i32*
%15 = load i32, i32* %14
%16 = load i8*, i8** %4
%17 = bitcast i8* %16 to i32*
%18 = load i32, i32* %17
%19 = icmp slt i32 %15, %18
%20 = zext i1 %19 to i32
%21 = sub nsw i32 %12, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @xycompare(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = zext i1 %7 to i32
%9 = icmp slt i32 %4, %6
%10 = sext i1 %9 to i32
%11 = add nsw i32 %10, %8
ret i32 %11
}
/* Type definitions */
struct sockaddr {
  int dummy;
};

/* Variables and functions */
int memcmp(struct sockaddr *, struct sockaddr *, int);
int sockaddrcmp(struct sockaddr *a, int a_len, struct sockaddr *b, int b_len) {
  if (a_len != b_len)
    return -1;
  else {
    return memcmp(a, b, a_len);
  }
  return -1;
}


x86 assembly (clang, -O0):
<sockaddrcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x24(%rbp),%eax
je     113e <sockaddrcmp+0x2e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1151 <sockaddrcmp+0x41>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <memcmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sockaddrcmp>:
cmp    %ecx,%esi
jne    1120 <sockaddrcmp+0x10>
mov    %esi,%eax
mov    %rdx,%rsi
mov    %eax,%edx
jmp    1030 <memcmp@plt>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @sockaddrcmp(%struct.sockaddr* %0, i32 %1, %struct.sockaddr* %2, i32 %3) {
%5 = alloca i32
%6 = alloca %struct.sockaddr*
%7 = alloca i32
%8 = alloca %struct.sockaddr*
%9 = alloca i32
store %struct.sockaddr* %0, %struct.sockaddr** %6
store i32 %1, i32* %7
store %struct.sockaddr* %2, %struct.sockaddr** %8
store i32 %3, i32* %9
%10 = load i32, i32* %7
%11 = load i32, i32* %9
%12 = icmp ne i32 %10, %11
br i1 %12, label %13, label %14
13: ; preds = %4
store i32 -1, i32* %5
br label %19
14: ; preds = %4
%15 = load %struct.sockaddr*, %struct.sockaddr** %6
%16 = load %struct.sockaddr*, %struct.sockaddr** %8
%17 = load i32, i32* %7
%18 = call i32 @memcmp(%struct.sockaddr* %15, %struct.sockaddr* %16, i32 %17)
store i32 %18, i32* %5
br label %19
19: ; preds = %14, %13
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @sockaddrcmp(%struct.sockaddr* %0, i32 %1, %struct.sockaddr* %2, i32 %3) {
%5 = icmp eq i32 %1, %3
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @memcmp(%struct.sockaddr* %0, %struct.sockaddr* %2, i32 %1)
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ %7, %6 ], [ -1, %4 ]
ret i32 %9
}
int cvmx_spi4000_is_present(int interface) { return 0; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @cvmx_spi4000_is_present(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @cvmx_spi4000_is_present(i32 %0) {
ret i32 0
}
int pm8xxx_dump_mpp(struct seq_file *m, int curr_len, char *gpio_buffer) {
  return curr_len;
}


x86 assembly (clang, -O0):
<pm8xxx_dump_mpp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pm8xxx_dump_mpp>:
mov    %esi,%eax
ret

LLVM IR (-O0):
%struct.seq_file = type opaque
define i32 @pm8xxx_dump_mpp(%struct.seq_file* %0, i32 %1, i8* %2) {
%4 = alloca %struct.seq_file*
%5 = alloca i32
%6 = alloca i8*
store %struct.seq_file* %0, %struct.seq_file** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %5
ret i32 %7
}

LLVM IR (-O2):
%struct.seq_file = type opaque
define i32 @pm8xxx_dump_mpp(%struct.seq_file* nocapture readnone %0, i32 returned %1, i8* nocapture readnone %2) {
ret i32 %1
}
/* Type definitions */
struct flashrom_flashctx {
  int dummy;
};

/* Variables and functions */
int spi_write_cmd(struct flashrom_flashctx *, int, int, unsigned int,
                  int /*<<< orphan*/ *, int /*<<< orphan*/, int);
int spi_block_erase_20(struct flashrom_flashctx *flash, unsigned int addr,
                       unsigned int blocklen) {
  return spi_write_cmd(flash, 0x20, false, addr, NULL, 0, 10 * 1000);
}


x86 assembly (clang, -O0):
<spi_block_erase_20>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%ecx
mov    $0x20,%esi
xor    %r9d,%r9d
xor    %eax,%eax
mov    %eax,%r8d
mov    %r9d,%edx
movl   $0x2710,(%rsp)
call   1030 <spi_write_cmd@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_block_erase_20>:
push   %rax
mov    %esi,%ecx
movl   $0x2710,(%rsp)
mov    $0x20,%esi
xor    %edx,%edx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <spi_write_cmd@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_block_erase_20(%struct.flashrom_flashctx* %0, i32 %1, i32 %2) {
%4 = alloca %struct.flashrom_flashctx*
%5 = alloca i32
%6 = alloca i32
store %struct.flashrom_flashctx* %0, %struct.flashrom_flashctx** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %4
%8 = load i32, i32* %5
%9 = call i32 @spi_write_cmd(%struct.flashrom_flashctx* %7, i32 32, i32 0, i32 %8, i32* null, i32 0, i32 10000)
ret i32 %9
}

LLVM IR (-O2):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_block_erase_20(%struct.flashrom_flashctx* %0, i32 %1, i32 %2) {
%4 = tail call i32 @spi_write_cmd(%struct.flashrom_flashctx* %0, i32 32, i32 0, i32 %1, i32* null, i32 0, i32 10000)
ret i32 %4
}
char identity(char x) { return x; }


x86 assembly (clang, -O0):
<identity>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<identity>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @identity(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
ret i8 %3
}

LLVM IR (-O2):
define signext i8 @identity(i8 returned signext %0) {
ret i8 %0
}
/* Variables and functions */
int /*<<< orphan*/ err(char *);
scalar_t__ isrunning();
int /*<<< orphan*/ keytoggle(char *);
int /*<<< orphan*/ typestr(char *);
void cpu_ioreset(void) {
  typestr("<RESET>\r\n");
  if (isrunning())
    err("?R? ");
  keytoggle("RESET");
}


x86 assembly (clang, -O0):
<cpu_ioreset>:
push   %rbp
mov    %rsp,%rbp
lea    0xeb5(%rip),%rdi
call   1060 <typestr@plt>
mov    $0x0,%al
call   1050 <isrunning@plt>
cmp    $0x0,%rax
je     116d <cpu_ioreset+0x2d>
lea    0xea2(%rip),%rdi
call   1040 <err@plt>
lea    0xe9b(%rip),%rdi
call   1030 <keytoggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_ioreset>:
push   %rax
lea    0xeb8(%rip),%rdi
call   1060 <typestr@plt>
xor    %eax,%eax
call   1050 <isrunning@plt>
test   %rax,%rax
je     1165 <cpu_ioreset+0x25>
lea    0xeaa(%rip),%rdi
call   1040 <err@plt>
lea    0xea3(%rip),%rdi
pop    %rax
jmp    1030 <keytoggle@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"<RESET>\0D\0A\00"
@.str.1 = [5 x i8] c"?R? \00"
@.str.2 = [6 x i8] c"RESET\00"
define void @cpu_ioreset() {
%1 = call i32 @typestr(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = call i64 (...) @isrunning()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @err(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = call i32 @keytoggle(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"<RESET>\0D\0A\00"
@.str.1 = [5 x i8] c"?R? \00"
@.str.2 = [6 x i8] c"RESET\00"
define void @cpu_ioreset() {
%1 = tail call i32 @typestr(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = tail call i64 (...) @isrunning()
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 @err(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = tail call i32 @keytoggle(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *convolve_h_alloc(size_t len) { return malloc(len * 2 * sizeof(float)); }


x86 assembly (clang, -O0):
<convolve_h_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
shl    $0x1,%rdi
shl    $0x2,%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<convolve_h_alloc>:
shl    $0x3,%rdi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @convolve_h_alloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = mul i64 %3, 2
%5 = mul i64 %4, 4
%6 = call i8* @malloc(i64 %5)
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @convolve_h_alloc(i64 %0) {
%2 = shl i64 %0, 3
%3 = tail call i8* @malloc(i64 %2)
ret i8* %3
}
/* Variables and functions */
int loop_my_atoi(char *, int /*<<< orphan*/, int);
int my_atoi(char *str) {
  if (str == NULL)
    return (0);
  return (loop_my_atoi(str, 0, 1));
}


x86 assembly (clang, -O0):
<my_atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1133 <my_atoi+0x23>
movl   $0x0,-0x4(%rbp)
jmp    1146 <my_atoi+0x36>
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x1,%edx
call   1030 <loop_my_atoi@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_atoi>:
test   %rdi,%rdi
je     1121 <my_atoi+0x11>
xor    %esi,%esi
mov    $0x1,%edx
jmp    1030 <loop_my_atoi@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @my_atoi(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i32 @loop_my_atoi(i8* %8, i32 0, i32 1)
store i32 %9, i32* %2
br label %10
10: ; preds = %7, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @my_atoi(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @loop_my_atoi(i8* %0, i32 0, i32 1)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ 0, %1 ]
ret i32 %6
}
void av_spherical_from_name() {}


x86 assembly (clang, -O0):
<av_spherical_from_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_spherical_from_name>:
ret

LLVM IR (-O0):
define void @av_spherical_from_name() {
ret void
}

LLVM IR (-O2):
define void @av_spherical_from_name() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memmove(unsigned char *, unsigned char *, size_t);
size_t raop_cust_cb(void *user_data, unsigned char *buffer, size_t len) {
  (void)user_data;
  if (len < 16)
    return -1;
  len -= 4;
  memmove(buffer, buffer + 4, len);
  return len;
}


x86 assembly (clang, -O0):
<raop_cust_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x10,-0x20(%rbp)
jae    113c <raop_cust_cb+0x2c>
movq   $0xffffffffffffffff,-0x8(%rbp)
ff
jmp    1165 <raop_cust_cb+0x55>
mov    -0x20(%rbp),%rax
sub    $0x4,%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x18(%rbp),%rsi
add    $0x4,%rsi
mov    -0x20(%rbp),%rdx
call   1030 <memmove@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<raop_cust_cb>:
mov    $0xffffffffffffffff,%rax
cmp    $0x10,%rdx
jb     113b <raop_cust_cb+0x2b>
push   %rbx
mov    %rdx,%rbx
add    $0xfffffffffffffffc,%rbx
lea    0x4(%rsi),%rax
mov    %rsi,%rdi
mov    %rax,%rsi
mov    %rbx,%rdx
call   1030 <memmove@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @raop_cust_cb(i8* %0, i8* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%8 = load i8*, i8** %5
%9 = load i64, i64* %7
%10 = icmp ult i64 %9, 16
br i1 %10, label %11, label %12
11: ; preds = %3
store i64 -1, i64* %4
br label %21
12: ; preds = %3
%13 = load i64, i64* %7
%14 = sub i64 %13, 4
store i64 %14, i64* %7
%15 = load i8*, i8** %6
%16 = load i8*, i8** %6
%17 = getelementptr inbounds i8, i8* %16, i64 4
%18 = load i64, i64* %7
%19 = call i32 @memmove(i8* %15, i8* %17, i64 %18)
%20 = load i64, i64* %7
store i64 %20, i64* %4
br label %21
21: ; preds = %12, %11
%22 = load i64, i64* %4
ret i64 %22
}

LLVM IR (-O2):
define i64 @raop_cust_cb(i8* nocapture readnone %0, i8* %1, i64 %2) {
%4 = icmp ult i64 %2, 16
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = add i64 %2, -4
%7 = getelementptr inbounds i8, i8* %1, i64 4
%8 = tail call i32 @memmove(i8* %1, i8* %7, i64 %6)
br label %9
9: ; preds = %3, %5
%10 = phi i64 [ %6, %5 ], [ -1, %3 ]
ret i64 %10
}
int vout_finish(void) { return 0; }


x86 assembly (clang, -O0):
<vout_finish>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vout_finish>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @vout_finish() {
ret i32 0
}

LLVM IR (-O2):
define i32 @vout_finish() {
ret i32 0
}
int __attribute__((target("avx,sse4.2,arch=ivybridge"))) foo(int a) {
  return 4;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 4
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
ret i32 4
}
int driver_init(void) {}


x86 assembly (clang, -O0):
<driver_init>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<driver_init>:
ret

LLVM IR (-O0):
define i32 @driver_init() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @driver_init() {
ret i32 undef
}
/* Variables and functions */
scalar_t__ RAND_MAX;
scalar_t__ rand();
double random01() { return (double)((double)rand() / (double)RAND_MAX + 1.0); }


x86 assembly (clang, -O0):
<random01>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec1(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
movsd  0xec8(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<random01>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec4(%rip),%rax
cvtsi2sdq (%rax),%xmm1
divsd  %xmm1,%xmm0
addsd  0xecb(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define double @random01() {
%1 = call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load i64, i64* @RAND_MAX
%4 = sitofp i64 %3 to double
%5 = fdiv double %2, %4
%6 = fadd double %5, 1.000000e+00
ret double %6
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define double @random01() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load i64, i64* @RAND_MAX
%4 = sitofp i64 %3 to double
%5 = fdiv double %2, %4
%6 = fadd double %5, 1.000000e+00
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ bsp_irq_unmask(int);
void irq_8259_unmask(int irq) { bsp_irq_unmask(irq); }


x86 assembly (clang, -O0):
<irq_8259_unmask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bsp_irq_unmask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irq_8259_unmask>:
jmp    1030 <bsp_irq_unmask@plt>

LLVM IR (-O0):
define void @irq_8259_unmask(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @bsp_irq_unmask(i32 %3)
ret void
}

LLVM IR (-O2):
define void @irq_8259_unmask(i32 %0) {
%2 = tail call i32 @bsp_irq_unmask(i32 %0)
ret void
}
void f(unsigned *s) {
  int n;
  for (n = 0; n < 256; n++)
    s[n] = 0;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x100,-0xc(%rbp)
jge    1139 <f+0x39>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <f+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rax
mov    $0x400,%edx
xor    %esi,%esi
call   1030 <memset@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @f(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 256
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
store i32 0, i32* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @f(i32* nocapture writeonly %0) {
%2 = bitcast i32* %0 to i8*
ret void
}
int pathcon_nm2_f0(const double **arg, double **res, int *iw, double *w,
                   int mem) {
  return 0;
}


x86 assembly (clang, -O0):
<pathcon_nm2_f0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathcon_nm2_f0>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @pathcon_nm2_f0(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = alloca double**
%7 = alloca double**
%8 = alloca i32*
%9 = alloca double*
%10 = alloca i32
store double** %0, double*** %6
store double** %1, double*** %7
store i32* %2, i32** %8
store double* %3, double** %9
store i32 %4, i32* %10
ret i32 0
}

LLVM IR (-O2):
define i32 @pathcon_nm2_f0(double** nocapture readnone %0, double** nocapture readnone %1, i32* nocapture readnone %2, double* nocapture readnone %3, i32 %4) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char fgetc(int /*<<< orphan*/ *);
void in_comment(FILE *in) {
  char ch, d;
  ch = fgetc(in);
  d = fgetc(in);
  while (ch != '*' || d != '/') {
    ch = d;
    d = fgetc(in);
  }
}


x86 assembly (clang, -O0):
<in_comment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %al,-0xa(%rbp)
movsbl -0x9(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2a,%ecx
mov    %al,-0xb(%rbp)
jne    1153 <in_comment+0x43>
movsbl -0xa(%rbp),%eax
cmp    $0x2f,%eax
setne  %al
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%al
test   $0x1,%al
jne    1163 <in_comment+0x53>
jmp    117a <in_comment+0x6a>
mov    -0xa(%rbp),%al
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %al,-0xa(%rbp)
jmp    1134 <in_comment+0x24>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<in_comment>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbp
call   1030 <fgetc@plt>
nopl   0x0(%rax,%rax,1)
mov    %eax,%ebx
mov    %rbp,%rdi
call   1030 <fgetc@plt>
cmp    $0x2a,%bl
jne    1120 <in_comment+0x10>
cmp    $0x2f,%al
jne    1120 <in_comment+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @in_comment(i32* %0) {
%2 = alloca i32*
%3 = alloca i8
%4 = alloca i8
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = call signext i8 @fgetc(i32* %5)
store i8 %6, i8* %3
%7 = load i32*, i32** %2
%8 = call signext i8 @fgetc(i32* %7)
store i8 %8, i8* %4
br label %9
9: ; preds = %19, %1
%10 = load i8, i8* %3
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 42
br i1 %12, label %17, label %13
13: ; preds = %9
%14 = load i8, i8* %4
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 47
br label %17
17: ; preds = %13, %9
%18 = phi i1 [ true, %9 ], [ %16, %13 ]
br i1 %18, label %19, label %23
19: ; preds = %17
%20 = load i8, i8* %4
store i8 %20, i8* %3
%21 = load i32*, i32** %2
%22 = call signext i8 @fgetc(i32* %21)
store i8 %22, i8* %4
br label %9
23: ; preds = %17
ret void
}

LLVM IR (-O2):
define void @in_comment(i32* nocapture %0) {
%2 = tail call signext i8 @fgetc(i32* %0)
%3 = tail call signext i8 @fgetc(i32* %0)
%4 = icmp ne i8 %2, 42
%5 = icmp ne i8 %3, 47
%6 = or i1 %4, %5
br i1 %6, label %7, label %13
7: ; preds = %1, %7
%8 = phi i8 [ %9, %7 ], [ %3, %1 ]
%9 = tail call signext i8 @fgetc(i32* %0)
%10 = icmp ne i8 %8, 42
%11 = icmp ne i8 %9, 47
%12 = or i1 %10, %11
br i1 %12, label %7, label %13
13: ; preds = %7, %1
ret void
}
int parse_rank(int num, int ch) {
  switch (ch) {
  case 'k':
  case 'K':
    num = 31 - num;
    break;
  case 'd':
  case 'D':
    num += 30;
    break;
  case 'p':
  case 'P':
    num += 40;
    break;
  default:
    break;
  }
  return num;
}


x86 assembly (clang, -O0):
<parse_rank>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x44,%eax
je     1183 <parse_rank+0x83>
jmp    111e <parse_rank+0x1e>
mov    -0xc(%rbp),%eax
sub    $0x4b,%eax
je     1173 <parse_rank+0x73>
jmp    112f <parse_rank+0x2f>
mov    -0xc(%rbp),%eax
sub    $0x50,%eax
je     1191 <parse_rank+0x91>
jmp    1140 <parse_rank+0x40>
mov    -0xc(%rbp),%eax
sub    $0x64,%eax
je     1183 <parse_rank+0x83>
jmp    1151 <parse_rank+0x51>
mov    -0xc(%rbp),%eax
sub    $0x6b,%eax
je     1173 <parse_rank+0x73>
jmp    1162 <parse_rank+0x62>
mov    -0xc(%rbp),%eax
sub    $0x70,%eax
je     1191 <parse_rank+0x91>
jmp    119f <parse_rank+0x9f>
mov    $0x1f,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    11a4 <parse_rank+0xa4>
mov    -0x4(%rbp),%eax
add    $0x1e,%eax
mov    %eax,-0x4(%rbp)
jmp    11a4 <parse_rank+0xa4>
mov    -0x4(%rbp),%eax
add    $0x28,%eax
mov    %eax,-0x4(%rbp)
jmp    11a4 <parse_rank+0xa4>
jmp    11a4 <parse_rank+0xa4>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_rank>:
mov    %edi,%eax
add    $0xffffffbc,%esi
cmp    $0x2c,%esi
ja     1141 <parse_rank+0x41>
movabs $0x100000001,%rcx
bt     %rsi,%rcx
jb     113e <parse_rank+0x3e>
movabs $0x8000000080,%rcx
bt     %rsi,%rcx
jb     1142 <parse_rank+0x42>
movabs $0x100000001000,%rcx
bt     %rsi,%rcx
jae    1141 <parse_rank+0x41>
add    $0x28,%eax
ret
add    $0x1e,%eax
ret
mov    $0x1f,%ecx
sub    %eax,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @parse_rank(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
switch i32 %5, label %15 [
i32 107, label %6
i32 75, label %6
i32 100, label %9
i32 68, label %9
i32 112, label %12
i32 80, label %12
]
6: ; preds = %2, %2
%7 = load i32, i32* %3
%8 = sub nsw i32 31, %7
store i32 %8, i32* %3
br label %16
9: ; preds = %2, %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 30
store i32 %11, i32* %3
br label %16
12: ; preds = %2, %2
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 40
store i32 %14, i32* %3
br label %16
15: ; preds = %2
br label %16
16: ; preds = %15, %12, %9, %6
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @parse_rank(i32 %0, i32 %1) {
switch i32 %1, label %9 [
i32 107, label %3
i32 75, label %3
i32 100, label %5
i32 68, label %5
i32 112, label %7
i32 80, label %7
]
3: ; preds = %2, %2
%4 = sub nsw i32 31, %0
br label %9
5: ; preds = %2, %2
%6 = add nsw i32 %0, 30
br label %9
7: ; preds = %2, %2
%8 = add nsw i32 %0, 40
br label %9
9: ; preds = %2, %7, %5, %3
%10 = phi i32 [ %0, %2 ], [ %8, %7 ], [ %6, %5 ], [ %4, %3 ]
ret i32 %10
}
int f2(int y, int x) { return ((~x) | y) & x; }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
or     -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
mov    %edi,%eax
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @f2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = xor i32 %5, -1
%7 = load i32, i32* %3
%8 = or i32 %6, %7
%9 = load i32, i32* %4
%10 = and i32 %8, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @f2(i32 %0, i32 %1) {
%3 = and i32 %1, %0
ret i32 %3
}
void foo471(int p) {}


x86 assembly (clang, -O0):
<foo471>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo471>:
ret

LLVM IR (-O0):
define void @foo471(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo471(i32 %0) {
ret void
}
int i4_min(int i1, int i2) {
  int value;
  if (i1 < i2) {
    value = i1;
  } else {
    value = i2;
  }
  return value;
}


x86 assembly (clang, -O0):
<i4_min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <i4_min+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <i4_min+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<i4_min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @i4_min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %3
store i32 %10, i32* %5
br label %13
11: ; preds = %2
%12 = load i32, i32* %4
store i32 %12, i32* %5
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @i4_min(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
void kthrow(unsigned int reason) {}


x86 assembly (clang, -O0):
<kthrow>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kthrow>:
ret

LLVM IR (-O0):
define void @kthrow(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @kthrow(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printS(char *);
int main(void) {
  printS("haha");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printS@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printS@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"haha\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printS(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"haha\00"
define i32 @main() {
%1 = tail call i32 @printS(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int motion_decode(int vec, int pmv) {
  if (vec > 31) {
    vec -= 64;
  }
  vec += pmv;
  if (vec > 31) {
    vec -= 64;
  }
  if (vec < -32) {
    vec += 64;
  }
  return vec;
}


x86 assembly (clang, -O0):
<motion_decode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x1f,-0x4(%rbp)
jle    111d <motion_decode+0x1d>
mov    -0x4(%rbp),%eax
sub    $0x40,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x1f,-0x4(%rbp)
jle    1139 <motion_decode+0x39>
mov    -0x4(%rbp),%eax
sub    $0x40,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0xffffffe0,-0x4(%rbp)
jge    114c <motion_decode+0x4c>
mov    -0x4(%rbp),%eax
add    $0x40,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<motion_decode>:
lea    -0x40(%rdi),%eax
cmp    $0x20,%edi
cmovl  %edi,%eax
lea    (%rax,%rsi,1),%ecx
cmp    $0x20,%ecx
lea    -0x40(%rax,%rsi,1),%edx
cmovl  %ecx,%edx
lea    0x40(%rdx),%eax
cmp    $0xffffffe0,%edx
cmovge %edx,%eax
ret

LLVM IR (-O0):
define i32 @motion_decode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sgt i32 %5, 31
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 64
store i32 %9, i32* %3
br label %10
10: ; preds = %7, %2
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, %11
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = icmp sgt i32 %14, 31
br i1 %15, label %16, label %19
16: ; preds = %10
%17 = load i32, i32* %3
%18 = sub nsw i32 %17, 64
store i32 %18, i32* %3
br label %19
19: ; preds = %16, %10
%20 = load i32, i32* %3
%21 = icmp slt i32 %20, -32
br i1 %21, label %22, label %25
22: ; preds = %19
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 64
store i32 %24, i32* %3
br label %25
25: ; preds = %22, %19
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @motion_decode(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 31
%4 = add nsw i32 %0, -64
%5 = select i1 %3, i32 %4, i32 %0
%6 = add nsw i32 %5, %1
%7 = icmp sgt i32 %6, 31
%8 = add nsw i32 %6, -64
%9 = select i1 %7, i32 %8, i32 %6
%10 = icmp slt i32 %9, -32
%11 = add nsw i32 %9, 64
%12 = select i1 %10, i32 %11, i32 %9
ret i32 %12
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void mpga_set_sync(uint8_t *p_mpga) {
  p_mpga[0] = 0xff;
  p_mpga[1] = 0xf9;
  p_mpga[2] = 0x0;
  p_mpga[3] = 0x0;
}


x86 assembly (clang, -O0):
<mpga_set_sync>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0xff,(%rax)
mov    -0x8(%rbp),%rax
movl   $0xf9,0x4(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0x8(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpga_set_sync>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @mpga_set_sync(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
store i32 255, i32* %4
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 1
store i32 249, i32* %6
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 2
store i32 0, i32* %8
%9 = load i32*, i32** %2
%10 = getelementptr inbounds i32, i32* %9, i64 3
store i32 0, i32* %10
ret void
}

LLVM IR (-O2):
define void @mpga_set_sync(i32* nocapture writeonly %0) {
%2 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> <i32 255, i32 249, i32 0, i32 0>, <4 x i32>* %2
ret void
}
/* Variables and functions */
scalar_t__ str_has_prefix(char const *, char *);
size_t encoding_char_size(const char *encoding) {
  if (str_has_prefix(encoding, "UTF-16")) {
    return 2;
  }
  if (str_has_prefix(encoding, "UTF-32")) {
    return 4;
  }
  return 1;
}


x86 assembly (clang, -O0):
<encoding_char_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <str_has_prefix@plt>
cmp    $0x0,%rax
je     1143 <encoding_char_size+0x33>
movq   $0x2,-0x8(%rbp)
jmp    1172 <encoding_char_size+0x62>
mov    -0x10(%rbp),%rdi
lea    0xeb9(%rip),%rsi
call   1030 <str_has_prefix@plt>
cmp    $0x0,%rax
je     116a <encoding_char_size+0x5a>
movq   $0x4,-0x8(%rbp)
jmp    1172 <encoding_char_size+0x62>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<encoding_char_size>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <str_has_prefix@plt>
mov    %rax,%rcx
mov    $0x2,%eax
test   %rcx,%rcx
je     112f <encoding_char_size+0x1f>
pop    %rbx
ret
lea    0xed1(%rip),%rsi
mov    %rbx,%rdi
call   1030 <str_has_prefix@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
lea    (%rcx,%rcx,2),%rax
add    $0x1,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"UTF-16\00"
@.str.1 = [7 x i8] c"UTF-32\00"
define i64 @encoding_char_size(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @str_has_prefix(i8* %4, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i64 2, i64* %2
br label %14
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @str_has_prefix(i8* %9, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i64 4, i64* %2
br label %14
13: ; preds = %8
store i64 1, i64* %2
br label %14
14: ; preds = %13, %12, %7
%15 = load i64, i64* %2
ret i64 %15
}

LLVM IR (-O2):
@.str = [7 x i8] c"UTF-16\00"
@.str.1 = [7 x i8] c"UTF-32\00"
define i64 @encoding_char_size(i8* %0) {
%2 = tail call i64 @str_has_prefix(i8* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @str_has_prefix(i8* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, i64 1, i64 4
br label %8
8: ; preds = %4, %1
%9 = phi i64 [ 2, %1 ], [ %7, %4 ]
ret i64 %9
}