xunge/DecIR huggingface dataset:
int snd_info_init(void) { return 0; }


x86 assembly (clang, -O0):
<snd_info_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<snd_info_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @snd_info_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @snd_info_init() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int8_t new_int8_t(void) { return 0; }


x86 assembly (clang, -O0):
<new_int8_t>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_int8_t>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @new_int8_t() {
ret i32 0
}

LLVM IR (-O2):
define i32 @new_int8_t() {
ret i32 0
}
int fun661() { return 661; }


x86 assembly (clang, -O0):
<fun661>:
push   %rbp
mov    %rsp,%rbp
mov    $0x295,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun661>:
mov    $0x295,%eax
ret

LLVM IR (-O0):
define i32 @fun661() {
ret i32 661
}

LLVM IR (-O2):
define i32 @fun661() {
ret i32 661
}
int test_imm_CEuint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0xCE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_CEuint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0xce,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_CEuint64_lowword_mem>:
testb  $0xce,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_CEuint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 206
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_CEuint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 206
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned long loBit(unsigned long u) { return u & 0x00000001UL; }


x86 assembly (clang, -O0):
<loBit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<loBit>:
mov    %rdi,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @loBit(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 1
ret i64 %4
}

LLVM IR (-O2):
define i64 @loBit(i64 %0) {
%2 = and i64 %0, 1
ret i64 %2
}
/* Type definitions */
struct Simhasher {
  int dummy;
};

/* Variables and functions */
struct Simhasher *NewSimhasher(char const *, char const *, char const *,
                               char const *);
struct Simhasher *sim_engine(const char *dict_path, const char *hmm_path,
                             const char *idf_path, const char *stop_path) {
  return NewSimhasher(dict_path, hmm_path, idf_path, stop_path);
}


x86 assembly (clang, -O0):
<sim_engine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <NewSimhasher@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sim_engine>:
jmp    1030 <NewSimhasher@plt>

LLVM IR (-O0):
%struct.Simhasher = type { i32 }
define %struct.Simhasher* @sim_engine(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
%13 = call %struct.Simhasher* @NewSimhasher(i8* %9, i8* %10, i8* %11, i8* %12)
ret %struct.Simhasher* %13
}

LLVM IR (-O2):
%struct.Simhasher = type { i32 }
define %struct.Simhasher* @sim_engine(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call %struct.Simhasher* @NewSimhasher(i8* %0, i8* %1, i8* %2, i8* %3)
ret %struct.Simhasher* %5
}
int test_imm_C9uint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0xC9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C9uint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0xc9,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C9uint64_midword_mem>:
testb  $0xc9,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C9uint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 201
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C9uint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 13172736
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ drv_PHAnderson_send(char *, int);
void drv_PHAnderson_clear(void) {
  char cmd[2];
  cmd[0] = '?';
  cmd[1] = 'f';
  drv_PHAnderson_send(cmd, 2);
}


x86 assembly (clang, -O0):
<drv_PHAnderson_clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x3f,-0x2(%rbp)
movb   $0x66,-0x1(%rbp)
lea    -0x2(%rbp),%rdi
mov    $0x2,%esi
call   1030 <drv_PHAnderson_send@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drv_PHAnderson_clear>:
push   %rax
movw   $0x663f,0x6(%rsp)
lea    0x6(%rsp),%rdi
mov    $0x2,%esi
call   1030 <drv_PHAnderson_send@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @drv_PHAnderson_clear() {
%1 = alloca [2 x i8]
%2 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i64 0, i64 0
store i8 63, i8* %2
%3 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i64 0, i64 1
store i8 102, i8* %3
%4 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i64 0, i64 0
%5 = call i32 @drv_PHAnderson_send(i8* %4, i32 2)
ret void
}

LLVM IR (-O2):
define void @drv_PHAnderson_clear() {
%1 = alloca [2 x i8]
%2 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i64 0, i64 0
store i8 63, i8* %2
%3 = getelementptr inbounds [2 x i8], [2 x i8]* %1, i64 0, i64 1
store i8 102, i8* %3
%4 = call i32 @drv_PHAnderson_send(i8* %2, i32 2)
ret void
}
unsigned int f74(unsigned int x, long int y) {
  return (x << y) + (x >> ((-y) & (8 * sizeof(unsigned int) - 1)));
}


x86 assembly (clang, -O0):
<f74>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%rcx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
xor    %ecx,%ecx
sub    -0x10(%rbp),%rcx
and    $0x1f,%rcx
shr    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f74>:
mov    %rsi,%rcx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f74(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = load i64, i64* %4
%7 = trunc i64 %6 to i32
%8 = shl i32 %5, %7
%9 = load i32, i32* %3
%10 = load i64, i64* %4
%11 = sub nsw i64 0, %10
%12 = and i64 %11, 31
%13 = trunc i64 %12 to i32
%14 = lshr i32 %9, %13
%15 = add i32 %8, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @f74(i32 %0, i64 %1) {
%3 = trunc i64 %1 to i32
%4 = shl i32 %0, %3
%5 = sub i32 0, %3
%6 = and i32 %5, 31
%7 = lshr i32 %0, %6
%8 = add i32 %7, %4
ret i32 %8
}
int dump_string() {
  char *dump_str = "my_string";
  return 0;
}


x86 assembly (clang, -O0):
<dump_string>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_string>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [10 x i8] c"my_string\00"
define i32 @dump_string() {
%1 = alloca i8*
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8** %1
ret i32 0
}

LLVM IR (-O2):
define i32 @dump_string() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ terminal_writestring(char const *);
void puts(const char *data) { terminal_writestring(data); }


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <terminal_writestring@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
jmp    1030 <terminal_writestring@plt>

LLVM IR (-O0):
define void @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @terminal_writestring(i8* %3)
ret void
}

LLVM IR (-O2):
define void @puts(i8* %0) {
%2 = tail call i32 @terminal_writestring(i8* %0)
ret void
}
void test45_M_bar__E() {}


x86 assembly (clang, -O0):
<test45_M_bar__E>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test45_M_bar__E>:
ret

LLVM IR (-O0):
define void @test45_M_bar__E() {
ret void
}

LLVM IR (-O2):
define void @test45_M_bar__E() {
ret void
}
/* Variables and functions */
scalar_t__ geteuid();
scalar_t__ getuid();
int /*<<< orphan*/ log_fatal(char *);
int /*<<< orphan*/ setreuid(int /*<<< orphan*/, int /*<<< orphan*/);
void rpctest_resume_privileges(void) {
  setreuid(0, 0);
  if (getuid() != 0)
    log_fatal("lost real uid 0");
  if (geteuid() != 0)
    log_fatal("lost effective uid 0");
}


x86 assembly (clang, -O0):
<rpctest_resume_privileges>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1050 <setreuid@plt>
mov    $0x0,%al
call   1030 <getuid@plt>
cmp    $0x0,%rax
je     116a <rpctest_resume_privileges+0x2a>
lea    0xe9b(%rip),%rdi
call   1060 <log_fatal@plt>
mov    $0x0,%al
call   1040 <geteuid@plt>
cmp    $0x0,%rax
je     1187 <rpctest_resume_privileges+0x47>
lea    0xe8e(%rip),%rdi
call   1060 <log_fatal@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpctest_resume_privileges>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1050 <setreuid@plt>
xor    %eax,%eax
call   1030 <getuid@plt>
test   %rax,%rax
je     1162 <rpctest_resume_privileges+0x22>
lea    0xea3(%rip),%rdi
call   1060 <log_fatal@plt>
xor    %eax,%eax
call   1040 <geteuid@plt>
test   %rax,%rax
je     117b <rpctest_resume_privileges+0x3b>
lea    0xe9b(%rip),%rdi
pop    %rax
jmp    1060 <log_fatal@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [16 x i8] c"lost real uid 0\00"
@.str.1 = [21 x i8] c"lost effective uid 0\00"
define void @rpctest_resume_privileges() {
%1 = call i32 @setreuid(i32 0, i32 0)
%2 = call i64 (...) @getuid()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @log_fatal(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = call i64 (...) @geteuid()
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = call i32 @log_fatal(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9, %6
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"lost real uid 0\00"
@.str.1 = [21 x i8] c"lost effective uid 0\00"
define void @rpctest_resume_privileges() {
%1 = tail call i32 @setreuid(i32 0, i32 0)
%2 = tail call i64 (...) @getuid()
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 @log_fatal(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
%7 = tail call i64 (...) @geteuid()
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %6
%10 = tail call i32 @log_fatal(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
br label %11
11: ; preds = %9, %6
ret void
}
void nowarn(unsigned char *a, unsigned char *b) {
  unsigned char c = 1;
  *a |= c, *b += c;
  int y, x;
  ((void)0), y = x;
}


x86 assembly (clang, -O0):
<nowarn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movb   $0x1,-0x11(%rbp)
movzbl -0x11(%rbp),%edx
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
or     %edx,%ecx
mov    %cl,(%rax)
movzbl -0x11(%rbp),%edx
mov    -0x10(%rbp),%rax
movzbl (%rax),%ecx
add    %edx,%ecx
mov    %cl,(%rax)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nowarn>:
orb    $0x1,(%rdi)
addb   $0x1,(%rsi)
ret

LLVM IR (-O0):
define void @nowarn(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i8 1, i8* %5
%8 = load i8, i8* %5
%9 = zext i8 %8 to i32
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = or i32 %12, %9
%14 = trunc i32 %13 to i8
store i8 %14, i8* %10
%15 = load i8, i8* %5
%16 = zext i8 %15 to i32
%17 = load i8*, i8** %4
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = add nsw i32 %19, %16
%21 = trunc i32 %20 to i8
store i8 %21, i8* %17
%22 = load i32, i32* %7
store i32 %22, i32* %6
ret void
}

LLVM IR (-O2):
define void @nowarn(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = or i8 %3, 1
store i8 %4, i8* %0
%5 = load i8, i8* %1
%6 = add i8 %5, 1
store i8 %6, i8* %1
ret void
}
int resi(int y, int x) {
  int tmp;
  if (y == 0) {
    return x;
  }
  tmp = x % y;
  if (tmp == 0 || (x > 0 && y > 0) || (x < 0 && y < 0)) {
    return tmp;
  } else {
    return tmp + y;
  }
}


x86 assembly (clang, -O0):
<resi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111f <resi+0x1f>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116f <resi+0x6f>
mov    -0xc(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     115b <resi+0x5b>
cmpl   $0x0,-0xc(%rbp)
jle    1147 <resi+0x47>
cmpl   $0x0,-0x8(%rbp)
jg     115b <resi+0x5b>
cmpl   $0x0,-0xc(%rbp)
jge    1166 <resi+0x66>
cmpl   $0x0,-0x8(%rbp)
jge    1166 <resi+0x66>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116f <resi+0x6f>
mov    -0x10(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<resi>:
test   %edi,%edi
je     1124 <resi+0x24>
mov    %esi,%eax
cltd
idiv   %edi
test   %edx,%edx
je     1127 <resi+0x27>
xor    %eax,%eax
test   %edi,%esi
mov    %edi,%ecx
cmovs  %eax,%ecx
test   %esi,%esi
cmovle %ecx,%eax
test   %edi,%edi
cmovle %ecx,%eax
add    %eax,%edx
mov    %edx,%esi
mov    %esi,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @resi(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %5
store i32 %10, i32* %3
br label %35
11: ; preds = %2
%12 = load i32, i32* %5
%13 = load i32, i32* %4
%14 = srem i32 %12, %13
store i32 %14, i32* %6
%15 = load i32, i32* %6
%16 = icmp eq i32 %15, 0
br i1 %16, label %29, label %17
17: ; preds = %11
%18 = load i32, i32* %5
%19 = icmp sgt i32 %18, 0
br i1 %19, label %20, label %23
20: ; preds = %17
%21 = load i32, i32* %4
%22 = icmp sgt i32 %21, 0
br i1 %22, label %29, label %23
23: ; preds = %20, %17
%24 = load i32, i32* %5
%25 = icmp slt i32 %24, 0
br i1 %25, label %26, label %31
26: ; preds = %23
%27 = load i32, i32* %4
%28 = icmp slt i32 %27, 0
br i1 %28, label %29, label %31
29: ; preds = %26, %20, %11
%30 = load i32, i32* %6
store i32 %30, i32* %3
br label %35
31: ; preds = %26, %23
%32 = load i32, i32* %6
%33 = load i32, i32* %4
%34 = add nsw i32 %32, %33
store i32 %34, i32* %3
br label %35
35: ; preds = %31, %29, %9
%36 = load i32, i32* %3
ret i32 %36
}

LLVM IR (-O2):
define i32 @resi(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %16, label %4
4: ; preds = %2
%5 = srem i32 %1, %0
%6 = icmp eq i32 %5, 0
br i1 %6, label %16, label %7
7: ; preds = %4
%8 = icmp sgt i32 %1, 0
%9 = icmp sgt i32 %0, 0
%10 = and i1 %9, %8
%11 = and i32 %1, %0
%12 = icmp slt i32 %11, 0
%13 = or i1 %10, %12
%14 = select i1 %13, i32 0, i32 %0
%15 = add nsw i32 %5, %14
br label %16
16: ; preds = %7, %4, %2
%17 = phi i32 [ %1, %2 ], [ 0, %4 ], [ %15, %7 ]
ret i32 %17
}
int trigger_code_warning(void) {}


x86 assembly (clang, -O0):
<trigger_code_warning>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trigger_code_warning>:
ret

LLVM IR (-O0):
define i32 @trigger_code_warning() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @trigger_code_warning() {
ret i32 undef
}
int getprojid() { return 0; }


x86 assembly (clang, -O0):
<getprojid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getprojid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @getprojid() {
ret i32 0
}

LLVM IR (-O2):
define i32 @getprojid() {
ret i32 0
}
/* Variables and functions */
int rand();
int HASH_(int k) {
  int p = 1713;
  int a = rand() % (p - 1) + 1;
  int b = rand() % p;
  return (((a * k + b) % p) % 16);
}


x86 assembly (clang, -O0):
<HASH_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x6b1,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
cltd
idiv   %ecx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
imul   -0x4(%rbp),%eax
add    -0x10(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
mov    $0x10,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HASH_>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x4c8f8d29,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x29,%rcx
add    %edx,%ecx
imul   $0x6b0,%ecx,%ecx
neg    %ecx
lea    (%rax,%rcx,1),%ebp
add    $0x1,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x4c841c19,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x29,%rcx
add    %edx,%ecx
imul   $0x6b1,%ecx,%ecx
sub    %ecx,%eax
imul   %ebx,%ebp
add    %eax,%ebp
movslq %ebp,%rax
imul   $0x4c841c19,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x29,%rcx
add    %edx,%ecx
imul   $0x6b1,%ecx,%ecx
sub    %ecx,%eax
lea    0xf(%rax),%ecx
test   %ax,%ax
cmovns %eax,%ecx
and    $0xfffffff0,%ecx
sub    %ecx,%eax
cwtl
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @HASH_(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 1713, i32* %3
%6 = call i32 (...) @rand()
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
%9 = srem i32 %6, %8
%10 = add nsw i32 %9, 1
store i32 %10, i32* %4
%11 = call i32 (...) @rand()
%12 = load i32, i32* %3
%13 = srem i32 %11, %12
store i32 %13, i32* %5
%14 = load i32, i32* %4
%15 = load i32, i32* %2
%16 = mul nsw i32 %14, %15
%17 = load i32, i32* %5
%18 = add nsw i32 %16, %17
%19 = load i32, i32* %3
%20 = srem i32 %18, %19
%21 = srem i32 %20, 16
ret i32 %21
}

LLVM IR (-O2):
define i32 @HASH_(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = srem i32 %2, 1712
%4 = add nsw i32 %3, 1
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, 1713
%7 = mul nsw i32 %4, %0
%8 = add nsw i32 %7, %6
%9 = srem i32 %8, 1713
%10 = trunc i32 %9 to i16
%11 = srem i16 %10, 16
%12 = sext i16 %11 to i32
ret i32 %12
}
void *utl_retptr(void *x) { return x; }


x86 assembly (clang, -O0):
<utl_retptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utl_retptr>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @utl_retptr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @utl_retptr(i8* readnone returned %0) {
ret i8* %0
}
void swap(int *array, int i, int j) {
  if (i == j)
    return;
  int tmp = array[i];
  array[i] = array[j];
  array[j] = tmp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jne    111f <swap+0x1f>
jmp    1151 <swap+0x51>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
cmp    %edx,%esi
je     1116 <swap+0x16>
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp eq i32 %8, %9
br i1 %10, label %11, label %12
11: ; preds = %3
br label %32
12: ; preds = %3
%13 = load i32*, i32** %4
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
store i32 %17, i32* %7
%18 = load i32*, i32** %4
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
%22 = load i32, i32* %21
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
%27 = load i32, i32* %7
%28 = load i32*, i32** %4
%29 = load i32, i32* %6
%30 = sext i32 %29 to i64
%31 = getelementptr inbounds i32, i32* %28, i64 %30
store i32 %27, i32* %31
br label %32
32: ; preds = %12, %11
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, %2
br i1 %4, label %12, label %5
5: ; preds = %3
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = load i32, i32* %7
%9 = sext i32 %2 to i64
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
store i32 %11, i32* %7
store i32 %8, i32* %10
br label %12
12: ; preds = %3, %5
ret void
}
/* Variables and functions */
int fun2(int);
int fun1(int n) { return fun2(n); }


x86 assembly (clang, -O0):
<fun1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fun2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1>:
jmp    1030 <fun2@plt>

LLVM IR (-O0):
define i32 @fun1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @fun2(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @fun1(i32 %0) {
%2 = tail call i32 @fun2(i32 %0)
ret i32 %2
}
/* Type definitions */
typedef unsigned long uint32_t;
typedef scalar_t__ ui32Base;

/* Variables and functions */
void PWMGenIntClear(uint32_t ui32Base, uint32_t ui32Gen, uint32_t ui32Ints) {
  ;
  ;

  ;
  (*((volatile unsigned long *)(((ui32Base) + (ui32Gen)) + 0x0000000C))) =
      ui32Ints;
}


x86 assembly (clang, -O0):
<PWMGenIntClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rcx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenIntClear>:
mov    %rdx,0xc(%rdi,%rsi,1)
ret

LLVM IR (-O0):
define void @PWMGenIntClear(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = load i64, i64* %4
%9 = load i64, i64* %5
%10 = add i64 %8, %9
%11 = add i64 %10, 12
%12 = inttoptr i64 %11 to i64*
store volatile i64 %7, i64* %12
ret void
}

LLVM IR (-O2):
define void @PWMGenIntClear(i64 %0, i64 %1, i64 %2) {
%4 = add i64 %0, 12
%5 = add i64 %4, %1
%6 = inttoptr i64 %5 to i64*
store volatile i64 %2, i64* %6
ret void
}
/* Variables and functions */
char toupper(int);
char *lmsc_l2U(char *p) {
  char *s;
  for (s = p; *s; s++) {
    *s = toupper((int)*s);
  }
  return p;
}


x86 assembly (clang, -O0):
<lmsc_l2U>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1156 <lmsc_l2U+0x46>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <toupper@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <lmsc_l2U+0x14>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lmsc_l2U>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%al
test   %al,%al
je     1146 <lmsc_l2U+0x36>
lea    0x1(%r14),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsbl %al,%edi
call   1030 <toupper@plt>
mov    %al,-0x1(%rbx)
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <lmsc_l2U+0x20>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @lmsc_l2U(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %15, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %18
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = call signext i8 @toupper(i32 %12)
%14 = load i8*, i8** %3
store i8 %13, i8* %14
br label %15
15: ; preds = %9
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %3
br label %5
18: ; preds = %5
%19 = load i8*, i8** %2
ret i8* %19
}

LLVM IR (-O2):
define i8* @lmsc_l2U(i8* returned %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %9, %4 ], [ %0, %1 ]
%7 = sext i8 %5 to i32
%8 = tail call signext i8 @toupper(i32 %7)
store i8 %8, i8* %6
%9 = getelementptr inbounds i8, i8* %6, i64 1
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ set_error(int);
void set_errno(int code) { set_error(-code); }


x86 assembly (clang, -O0):
<set_errno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
sub    -0x4(%rbp),%edi
call   1030 <set_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_errno>:
neg    %edi
jmp    1030 <set_error@plt>

LLVM IR (-O0):
define void @set_errno(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 0, %3
%5 = call i32 @set_error(i32 %4)
ret void
}

LLVM IR (-O2):
define void @set_errno(i32 %0) {
%2 = sub nsw i32 0, %0
%3 = tail call i32 @set_error(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char **argv) {
  printf("here in source_3\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"here in source_3\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [17 x i8] c"here in source_3\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct timeval {
  unsigned long long tv_sec;
  int tv_usec;
};

/* Variables and functions */
unsigned long long tv2msec(struct timeval *tv) {
  return tv->tv_sec * 1000ull + tv->tv_usec / 1000;
}


x86 assembly (clang, -O0):
<tv2msec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   $0x3e8,(%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
movslq %ecx,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tv2msec>:
imul   $0x3e8,(%rdi),%rcx
movslq 0x8(%rdi),%rax
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rax
add    %edx,%eax
cltq
add    %rcx,%rax
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i32 }
define i64 @tv2msec(%struct.timeval* %0) {
%2 = alloca %struct.timeval*
store %struct.timeval* %0, %struct.timeval** %2
%3 = load %struct.timeval*, %struct.timeval** %2
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i32 0, i32 0
%5 = load i64, i64* %4
%6 = mul i64 %5, 1000
%7 = load %struct.timeval*, %struct.timeval** %2
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %7, i32 0, i32 1
%9 = load i32, i32* %8
%10 = sdiv i32 %9, 1000
%11 = sext i32 %10 to i64
%12 = add i64 %6, %11
ret i64 %12
}

LLVM IR (-O2):
%struct.timeval = type { i64, i32 }
define i64 @tv2msec(%struct.timeval* nocapture %0) {
%2 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
%3 = load i64, i64* %2
%4 = mul i64 %3, 1000
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
%6 = load i32, i32* %5
%7 = sdiv i32 %6, 1000
%8 = sext i32 %7 to i64
%9 = add i64 %4, %8
ret i64 %9
}
int and5(int a) { return (a & 5) != 0; }


x86 assembly (clang, -O0):
<and5>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x5,%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<and5>:
xor    %eax,%eax
test   $0x5,%dil
setne  %al
ret

LLVM IR (-O0):
define i32 @and5(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 5
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @and5(i32 %0) {
%2 = and i32 %0, 5
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
int logic() { return 42; }


x86 assembly (clang, -O0):
<logic>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<logic>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @logic() {
ret i32 42
}

LLVM IR (-O2):
define i32 @logic() {
ret i32 42
}
int maximum(int *queue) { return queue[1]; }


x86 assembly (clang, -O0):
<maximum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<maximum>:
mov    0x4(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @maximum(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 1
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @maximum(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int setcns(int, int, char *);
int cmd_reset(int argc, char **argv) {
  char ver[2] = {0x00, 0x01};
  return setcns(0x0010, 2, ver);
}


x86 assembly (clang, -O0):
<cmd_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xeda(%rip),%ax
mov    %ax,-0x12(%rbp)
lea    -0x12(%rbp),%rdx
mov    $0x10,%edi
mov    $0x2,%esi
call   1030 <setcns@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_reset>:
push   %rax
movw   $0x100,0x6(%rsp)
lea    0x6(%rsp),%rdx
mov    $0x10,%edi
mov    $0x2,%esi
call   1030 <setcns@plt>
pop    %rcx
ret

LLVM IR (-O0):
@__const.cmd_reset.ver = [2 x i8] c"\00\01"
define i32 @cmd_reset(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca [2 x i8]
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = bitcast [2 x i8]* %5 to i8*
%7 = getelementptr inbounds [2 x i8], [2 x i8]* %5, i64 0, i64 0
%8 = call i32 @setcns(i32 16, i32 2, i8* %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @cmd_reset(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i16
%4 = bitcast i16* %3 to i8*
store i16 256, i16* %3
%5 = call i32 @setcns(i32 16, i32 2, i8* %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ pr_inf_skip(char *, char const *);
int stress_sigtrap_supported(const char *name) {
  pr_inf_skip("%s stressor will be skipped, system "
              "does not support the SIGTRAP signal\n",
              name);
  return -1;
}


x86 assembly (clang, -O0):
<stress_sigtrap_supported>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <pr_inf_skip@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stress_sigtrap_supported>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <pr_inf_skip@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [73 x i8] c"%s stressor will be skipped, system does not support the SIGTRAP signal\0A\00"
define i32 @stress_sigtrap_supported(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @pr_inf_skip(i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 -1
}

LLVM IR (-O2):
@.str = [73 x i8] c"%s stressor will be skipped, system does not support the SIGTRAP signal\0A\00"
define i32 @stress_sigtrap_supported(i8* %0) {
%2 = tail call i32 @pr_inf_skip(i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 -1
}
void McASPSerializerTxSet(unsigned int baseAddr, unsigned int serNum) {
  (*((volatile unsigned int *)(baseAddr + (0x180 + (serNum * 4))))) &=
      ~(0x00000003u);
  (*((volatile unsigned int *)(baseAddr + (0x180 + (serNum * 4))))) |=
      (0x00000001u);
}


x86 assembly (clang, -O0):
<McASPSerializerTxSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x2,%ecx
add    $0x180,%ecx
add    %ecx,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xfffffffc,%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x2,%ecx
add    $0x180,%ecx
add    %ecx,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<McASPSerializerTxSet>:
lea    (%rdi,%rsi,4),%eax
add    $0x180,%eax
andl   $0xfffffffc,(%rax)
orl    $0x1,(%rax)
ret

LLVM IR (-O0):
define void @McASPSerializerTxSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul i32 %6, 4
%8 = add i32 384, %7
%9 = add i32 %5, %8
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = and i32 %12, -4
store volatile i32 %13, i32* %11
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = mul i32 %15, 4
%17 = add i32 384, %16
%18 = add i32 %14, %17
%19 = zext i32 %18 to i64
%20 = inttoptr i64 %19 to i32*
%21 = load volatile i32, i32* %20
%22 = or i32 %21, 1
store volatile i32 %22, i32* %20
ret void
}

LLVM IR (-O2):
define void @McASPSerializerTxSet(i32 %0, i32 %1) {
%3 = shl i32 %1, 2
%4 = add i32 %0, 384
%5 = add i32 %4, %3
%6 = zext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = and i32 %8, -4
store volatile i32 %9, i32* %7
%10 = load volatile i32, i32* %7
%11 = or i32 %10, 1
store volatile i32 %11, i32* %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void print_help(char **argv) {
  fprintf(
      stderr,
      "Usage:\n"
      "%s [-h|-?] -i ID -s SIGNAL [-c]\n\n"
      "-h        | Print this help message.\n"
      "-?        | Print this help message.\n"
      "-c        | Only the client will be active. Ensure that msmonitor\n"
      "          | runs before executing this application with the -c flag.\n"
      "-i ID     | ID to send to server.\n"
      "-s SIGNAL | Signal to send to server.\n"
      "\n",
      argv[0]);
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
lea    0xecd(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%eax
mov    (%rdi),%rdx
lea    0xedd(%rip),%rsi
mov    %eax,%edi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [323 x i8] c"Usage:\0A%s [-h|-?] -i ID -s SIGNAL [-c]\0A\0A-h | Print this help message.\0A-? | Print this help message.\0A-c | Only the client will be active. Ensure that msmonitor\0A | runs before executing this application with the -c flag.\0A-i ID | ID to send to server.\0A-s SIGNAL | Signal to send to server.\0A\0A\00"
define void @print_help(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i32, i32* @stderr
%4 = load i8**, i8*** %2
%5 = getelementptr inbounds i8*, i8** %4, i64 0
%6 = load i8*, i8** %5
%7 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([323 x i8], [323 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [323 x i8] c"Usage:\0A%s [-h|-?] -i ID -s SIGNAL [-c]\0A\0A-h | Print this help message.\0A-? | Print this help message.\0A-c | Only the client will be active. Ensure that msmonitor\0A | runs before executing this application with the -c flag.\0A-i ID | ID to send to server.\0A-s SIGNAL | Signal to send to server.\0A\0A\00"
define void @print_help(i8** nocapture %0) {
%2 = load i32, i32* @stderr
%3 = load i8*, i8** %0
%4 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([323 x i8], [323 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}
void RTAssertMsg2(void) {}


x86 assembly (clang, -O0):
<RTAssertMsg2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTAssertMsg2>:
ret

LLVM IR (-O0):
define void @RTAssertMsg2() {
ret void
}

LLVM IR (-O2):
define void @RTAssertMsg2() {
ret void
}
int arrayDoublecmp(double *dp1, double *dp2) {
  if (*dp1 == *dp2)
    return 0;
  return (*dp1 < *dp2) ? -1 : 1;
}


x86 assembly (clang, -O0):
<arrayDoublecmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
ucomisd (%rax),%xmm0
jne    1134 <arrayDoublecmp+0x34>
jp     1134 <arrayDoublecmp+0x34>
movl   $0x0,-0x4(%rbp)
jmp    1158 <arrayDoublecmp+0x58>
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x18(%rbp),%rax
movsd  (%rax),%xmm0
mov    $0x1,%eax
mov    $0xffffffff,%ecx
ucomisd %xmm1,%xmm0
cmova  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arrayDoublecmp>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
xor    %ecx,%ecx
ucomisd %xmm0,%xmm1
setbe  %cl
xor    %eax,%eax
ucomisd %xmm1,%xmm0
lea    -0x1(%rcx,%rcx,1),%ecx
cmovne %ecx,%eax
cmovp  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @arrayDoublecmp(double* %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca double*
store double* %0, double** %4
store double* %1, double** %5
%6 = load double*, double** %4
%7 = load double, double* %6
%8 = load double*, double** %5
%9 = load double, double* %8
%10 = fcmp oeq double %7, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 0, i32* %3
br label %20
12: ; preds = %2
%13 = load double*, double** %4
%14 = load double, double* %13
%15 = load double*, double** %5
%16 = load double, double* %15
%17 = fcmp olt double %14, %16
%18 = zext i1 %17 to i64
%19 = select i1 %17, i32 -1, i32 1
store i32 %19, i32* %3
br label %20
20: ; preds = %12, %11
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @arrayDoublecmp(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = fcmp oeq double %3, %4
%6 = fcmp olt double %3, %4
%7 = select i1 %6, i32 -1, i32 1
%8 = select i1 %5, i32 0, i32 %7
ret i32 %8
}
/* Type definitions */
struct evbuffer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ evbuffer_add(struct evbuffer *, char *, int);
int strlen(char *);
void irc_cmd_ping(struct evbuffer *out, char *target) {
  evbuffer_add(out, "PING ", 5);
  evbuffer_add(out, target, strlen(target));
  evbuffer_add(out, "\n", 1);
}


x86 assembly (clang, -O0):
<irc_cmd_ping>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec5(%rip),%rsi
mov    $0x5,%edx
call   1040 <evbuffer_add@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <evbuffer_add@plt>
mov    -0x8(%rbp),%rdi
lea    0xe8e(%rip),%rsi
mov    $0x1,%edx
call   1040 <evbuffer_add@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_cmd_ping>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xecf(%rip),%rsi
mov    $0x5,%edx
call   1040 <evbuffer_add@plt>
mov    %r14,%rdi
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %eax,%edx
call   1040 <evbuffer_add@plt>
lea    0xeaf(%rip),%rsi
mov    %rbx,%rdi
mov    $0x1,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <evbuffer_add@plt>

LLVM IR (-O0):
%struct.evbuffer = type { i32 }
@.str = [6 x i8] c"PING \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @irc_cmd_ping(%struct.evbuffer* %0, i8* %1) {
%3 = alloca %struct.evbuffer*
%4 = alloca i8*
store %struct.evbuffer* %0, %struct.evbuffer** %3
store i8* %1, i8** %4
%5 = load %struct.evbuffer*, %struct.evbuffer** %3
%6 = call i32 @evbuffer_add(%struct.evbuffer* %5, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 5)
%7 = load %struct.evbuffer*, %struct.evbuffer** %3
%8 = load i8*, i8** %4
%9 = load i8*, i8** %4
%10 = call i32 @strlen(i8* %9)
%11 = call i32 @evbuffer_add(%struct.evbuffer* %7, i8* %8, i32 %10)
%12 = load %struct.evbuffer*, %struct.evbuffer** %3
%13 = call i32 @evbuffer_add(%struct.evbuffer* %12, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
%struct.evbuffer = type { i32 }
@.str = [6 x i8] c"PING \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @irc_cmd_ping(%struct.evbuffer* %0, i8* %1) {
%3 = tail call i32 @evbuffer_add(%struct.evbuffer* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 5)
%4 = tail call i32 @strlen(i8* %1)
%5 = tail call i32 @evbuffer_add(%struct.evbuffer* %0, i8* %1, i32 %4)
%6 = tail call i32 @evbuffer_add(%struct.evbuffer* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0), i32 1)
ret void
}
void pm_feed_null(int const pipeToFeedFd, void *const feederParm) {}


x86 assembly (clang, -O0):
<pm_feed_null>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pm_feed_null>:
ret

LLVM IR (-O0):
define void @pm_feed_null(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @pm_feed_null(i32 %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;
typedef size_t uint16_t;

/* Variables and functions */
uint8_t us_bits_get_octet(const void *base, uint16_t offset) {
  const uint8_t *data = (const uint8_t *)base;
  return data[offset];
}


x86 assembly (clang, -O0):
<us_bits_get_octet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<us_bits_get_octet>:
mov    (%rdi,%rsi,4),%eax
ret

LLVM IR (-O0):
define i32 @us_bits_get_octet(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32*, i32** %5
%9 = load i64, i64* %4
%10 = getelementptr inbounds i32, i32* %8, i64 %9
%11 = load i32, i32* %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @us_bits_get_octet(i8* nocapture %0, i64 %1) {
%3 = bitcast i8* %0 to i32*
%4 = getelementptr inbounds i32, i32* %3, i64 %1
%5 = load i32, i32* %4
ret i32 %5
}
int change_drive(int drive) {
  if (drive != 2)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<change_drive>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     111d <change_drive+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1124 <change_drive+0x24>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<change_drive>:
xor    %eax,%eax
cmp    $0x2,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @change_drive(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @change_drive(i32 %0) {
%2 = icmp ne i32 %0, 2
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
struct expr {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ log_error(char *);
int _expr_bool_value(struct expr *this, void *context) {
  log_error("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
            "2022-01-22/02-19-57/repos/Uga-Agga/Game/refs/heads/master/src/"
            "ticker/expression.c"
            ":"
            "61"
            ": "
            "error: "
            "type error: boolean expected");
  return 0;
}


x86 assembly (clang, -O0):
<_expr_bool_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
call   1030 <log_error@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_expr_bool_value>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <log_error@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.expr = type { i32 }
@.str = [186 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Uga-Agga/Game/refs/heads/master/src/ticker/expression.c:61: error: type error: boolean expected\00"
define i32 @_expr_bool_value(%struct.expr* %0, i8* %1) {
%3 = alloca %struct.expr*
%4 = alloca i8*
store %struct.expr* %0, %struct.expr** %3
store i8* %1, i8** %4
%5 = call i32 @log_error(i8* getelementptr inbounds ([186 x i8], [186 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
%struct.expr = type { i32 }
@.str = [186 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Uga-Agga/Game/refs/heads/master/src/ticker/expression.c:61: error: type error: boolean expected\00"
define i32 @_expr_bool_value(%struct.expr* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 @log_error(i8* getelementptr inbounds ([186 x i8], [186 x i8]* @.str, i64 0, i64 0))
ret i32 0
}