xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ io_delay();
int /*<<< orphan*/ outb(int, int);
void mask_all_interrupts(void) {
  outb(0xff, 0xa1);
  io_delay();
  outb(0xfb, 0x21);
  io_delay();
}


x86 assembly (clang, -O0):
<mask_all_interrupts>:
push   %rbp
mov    %rsp,%rbp
mov    $0xff,%edi
mov    $0xa1,%esi
call   1040 <outb@plt>
mov    $0x0,%al
call   1030 <io_delay@plt>
mov    $0xfb,%edi
mov    $0x21,%esi
call   1040 <outb@plt>
mov    $0x0,%al
call   1030 <io_delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mask_all_interrupts>:
push   %rax
mov    $0xff,%edi
mov    $0xa1,%esi
call   1040 <outb@plt>
xor    %eax,%eax
call   1030 <io_delay@plt>
mov    $0xfb,%edi
mov    $0x21,%esi
call   1040 <outb@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <io_delay@plt>

LLVM IR (-O0):
define void @mask_all_interrupts() {
%1 = call i32 @outb(i32 255, i32 161)
%2 = call i32 (...) @io_delay()
%3 = call i32 @outb(i32 251, i32 33)
%4 = call i32 (...) @io_delay()
ret void
}

LLVM IR (-O2):
define void @mask_all_interrupts() {
%1 = tail call i32 @outb(i32 255, i32 161)
%2 = tail call i32 (...) @io_delay()
%3 = tail call i32 @outb(i32 251, i32 33)
%4 = tail call i32 (...) @io_delay()
ret void
}
u_to_int_fd(fd) {
  if (fd > 2) {
  }
  return (fd);
}


x86 assembly (clang, -O0):
<u_to_int_fd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x2,-0x4(%rbp)
jle    1116 <u_to_int_fd+0x16>
jmp    1116 <u_to_int_fd+0x16>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<u_to_int_fd>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @u_to_int_fd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 2
br i1 %4, label %5, label %6
5: ; preds = %1
br label %6
6: ; preds = %5, %1
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
define i32 @u_to_int_fd(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a = 0xdeadbeef;
  printf("%X\n", a ^ 0xd00dfeed);
  printf("%X\n", a ^ 0);
  printf("%X\n", a ^ 1);
  printf("%X\n", a ^ a);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xdeadbeef,-0x8(%rbp)
mov    -0x8(%rbp),%esi
xor    $0xd00dfeed,%esi
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
xor    $0x0,%esi
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
xor    $0x1,%esi
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%esi
xor    -0x8(%rbp),%esi
lea    0xe94(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0xea04002,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0xdeadbeef,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0xdeadbeee,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%X\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 -559038737, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, -804389139
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = load i32, i32* %2
%7 = xor i32 %6, 0
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %2
%10 = xor i32 %9, 1
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = load i32, i32* %2
%13 = load i32, i32* %2
%14 = xor i32 %12, %13
%15 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%X\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 245383170)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 -559038737)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 -559038738)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
void updateBIT(int BITree[], int n, int index, int val) {
  index = index + 1;
  while (index <= n) {
    BITree[index] += val;
    index += index & (-index);
  }
}


x86 assembly (clang, -O0):
<updateBIT>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     114c <updateBIT+0x4c>
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
add    (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
mov    -0x10(%rbp),%eax
xor    %ecx,%ecx
sub    -0x10(%rbp),%ecx
and    %ecx,%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    111a <updateBIT+0x1a>
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateBIT>:
cmp    %esi,%edx
jge    1122 <updateBIT+0x22>
add    $0x1,%edx
nopw   0x0(%rax,%rax,1)
movslq %edx,%rax
add    %ecx,(%rdi,%rax,4)
mov    %eax,%edx
neg    %edx
and    %eax,%edx
add    %eax,%edx
cmp    %esi,%edx
jle    1110 <updateBIT+0x10>
ret

LLVM IR (-O0):
define void @updateBIT(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %7
%10 = add nsw i32 %9, 1
store i32 %10, i32* %7
br label %11
11: ; preds = %15, %4
%12 = load i32, i32* %7
%13 = load i32, i32* %6
%14 = icmp sle i32 %12, %13
br i1 %14, label %15, label %29
15: ; preds = %11
%16 = load i32, i32* %8
%17 = load i32*, i32** %5
%18 = load i32, i32* %7
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %17, i64 %19
%21 = load i32, i32* %20
%22 = add nsw i32 %21, %16
store i32 %22, i32* %20
%23 = load i32, i32* %7
%24 = load i32, i32* %7
%25 = sub nsw i32 0, %24
%26 = and i32 %23, %25
%27 = load i32, i32* %7
%28 = add nsw i32 %27, %26
store i32 %28, i32* %7
br label %11
29: ; preds = %11
ret void
}

LLVM IR (-O2):
define void @updateBIT(i32* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp slt i32 %2, %1
br i1 %5, label %6, label %18
6: ; preds = %4
%7 = add nsw i32 %2, 1
br label %8
8: ; preds = %6, %8
%9 = phi i32 [ %16, %8 ], [ %7, %6 ]
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %0, i64 %10
%12 = load i32, i32* %11
%13 = add nsw i32 %12, %3
store i32 %13, i32* %11
%14 = sub nsw i32 0, %9
%15 = and i32 %9, %14
%16 = add nsw i32 %15, %9
%17 = icmp sgt i32 %16, %1
br i1 %17, label %18, label %8
18: ; preds = %8, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ scanf(char *, int *);
void read_array(int inArray[], int n) {
  for (int i = 0; i < n; ++i) {
    scanf("%d", inArray + i);
  }
}


x86 assembly (clang, -O0):
<read_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115b <read_array+0x4b>
mov    -0x8(%rbp),%rsi
movslq -0x10(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rsi
lea    0xeb8(%rip),%rdi
call   1030 <scanf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <read_array+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_array>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1145 <read_array+0x35>
mov    %rdi,%rbx
mov    %esi,%r15d
lea    0xeda(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <scanf@plt>
add    $0x4,%rbx
add    $0xffffffffffffffff,%r15
jne    1130 <read_array+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @read_array(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %16, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %14)
br label %16
16: ; preds = %10
%17 = load i32, i32* %5
%18 = add nsw i32 %17, 1
store i32 %18, i32* %5
br label %6
19: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @read_array(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %7
6: ; preds = %7, %2
ret void
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %11, %7 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = tail call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %9)
%11 = add nuw nsw i64 %8, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %6, label %7
}
long __syscall5(long n, long a1, long a2, long a3, long a4, long a5) {
  unsigned long ret;
  register long r10 __asm__("r10") = a4;
  register long r8 __asm__("r8") = a5;
  __asm__ __volatile__("syscall"
                       : "=a"(ret)
                       : "a"(n), "D"(a1), "S"(a2), "d"(a3), "r"(r10), "r"(r8)
                       : "rcx", "r11", "memory");
  return ret;
}


x86 assembly (clang, -O0):
<__syscall5>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x28(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x48(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x40(%rbp),%r10
mov    -0x48(%rbp),%r8
syscall
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__syscall5>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %rcx,%rdx
mov    %r8,%r10
mov    %r9,%r8
syscall
ret

LLVM IR (-O0):
define i64 @__syscall5(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5) {
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca i64
%13 = alloca i64
%14 = alloca i64
%15 = alloca i64
store i64 %0, i64* %7
store i64 %1, i64* %8
store i64 %2, i64* %9
store i64 %3, i64* %10
store i64 %4, i64* %11
store i64 %5, i64* %12
%16 = load i64, i64* %11
store i64 %16, i64* %14
%17 = load i64, i64* %12
store i64 %17, i64* %15
%18 = load i64, i64* %7
%19 = load i64, i64* %8
%20 = load i64, i64* %9
%21 = load i64, i64* %10
%22 = load i64, i64* %14
%23 = load i64, i64* %15
%24 = call i64 asm sideeffect "syscall", "={ax},{ax},{di},{si},{dx},{r10},{r8},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %18, i64 %19, i64 %20, i64 %21, i64 %22, i64 %23)
store i64 %24, i64* %13
%25 = load i64, i64* %13
ret i64 %25
}

LLVM IR (-O2):
define i64 @__syscall5(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5) {
%7 = tail call i64 asm sideeffect "syscall", "={ax},{ax},{di},{si},{dx},{r10},{r8},~{rcx},~{r11},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %0, i64 %1, i64 %2, i64 %3, i64 %4, i64 %5)
ret i64 %7
}
void mvpw_get_rgba(unsigned long c, unsigned char *r, unsigned char *g,
                   unsigned char *b, unsigned char *a) {
  *a = (c >> 24) & 0xff;
  *b = (c >> 16) & 0xff;
  *g = (c >> 8) & 0xff;
  *r = (c >> 0) & 0xff;
}


x86 assembly (clang, -O0):
<mvpw_get_rgba>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x18,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x28(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
shr    $0x10,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x20(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
shr    $0x8,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
shr    $0x0,%rax
and    $0xff,%rax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mvpw_get_rgba>:
mov    %rdi,%rax
shr    $0x18,%rdi
mov    %dil,(%r8)
mov    %rax,%rdi
shr    $0x10,%rdi
mov    %dil,(%rcx)
mov    %ah,(%rdx)
mov    %al,(%rsi)
ret

LLVM IR (-O0):
define void @mvpw_get_rgba(i64 %0, i8* %1, i8* %2, i8* %3, i8* %4) {
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i8*
store i64 %0, i64* %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i8* %4, i8** %10
%11 = load i64, i64* %6
%12 = lshr i64 %11, 24
%13 = and i64 %12, 255
%14 = trunc i64 %13 to i8
%15 = load i8*, i8** %10
store i8 %14, i8* %15
%16 = load i64, i64* %6
%17 = lshr i64 %16, 16
%18 = and i64 %17, 255
%19 = trunc i64 %18 to i8
%20 = load i8*, i8** %9
store i8 %19, i8* %20
%21 = load i64, i64* %6
%22 = lshr i64 %21, 8
%23 = and i64 %22, 255
%24 = trunc i64 %23 to i8
%25 = load i8*, i8** %8
store i8 %24, i8* %25
%26 = load i64, i64* %6
%27 = lshr i64 %26, 0
%28 = and i64 %27, 255
%29 = trunc i64 %28 to i8
%30 = load i8*, i8** %7
store i8 %29, i8* %30
ret void
}

LLVM IR (-O2):
define void @mvpw_get_rgba(i64 %0, i8* nocapture writeonly %1, i8* nocapture writeonly %2, i8* nocapture writeonly %3, i8* nocapture writeonly %4) {
%6 = lshr i64 %0, 24
%7 = trunc i64 %6 to i8
store i8 %7, i8* %4
%8 = lshr i64 %0, 16
%9 = trunc i64 %8 to i8
store i8 %9, i8* %3
%10 = lshr i64 %0, 8
%11 = trunc i64 %10 to i8
store i8 %11, i8* %2
%12 = trunc i64 %0 to i8
store i8 %12, i8* %1
ret void
}
void __DELETE_org_apache_harmony_luni_platform_OSFileSystem(void *me,
                                                            void *client_data) {
}


x86 assembly (clang, -O0):
<__DELETE_org_apache_harmony_luni_platform_OSFileSystem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__DELETE_org_apache_harmony_luni_platform_OSFileSystem>:
ret

LLVM IR (-O0):
define void @__DELETE_org_apache_harmony_luni_platform_OSFileSystem(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @__DELETE_org_apache_harmony_luni_platform_OSFileSystem(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glutBitmapCharacter(void *, char const);
void printstring(void *font, const char *string) {
  const char *c;
  for (c = string; *c; c++)
    glutBitmapCharacter(font, *c);
}


x86 assembly (clang, -O0):
<printstring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1156 <printstring+0x46>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rax
movsbl (%rax),%esi
call   1030 <glutBitmapCharacter@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <printstring+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printstring>:
push   %r14
push   %rbx
push   %rax
mov    (%rsi),%al
test   %al,%al
je     1146 <printstring+0x36>
mov    %rsi,%rbx
mov    %rdi,%r14
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl %al,%esi
mov    %r14,%rdi
call   1030 <glutBitmapCharacter@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <printstring+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @printstring(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
store i8* %6, i8** %5
br label %7
7: ; preds = %16, %2
%8 = load i8*, i8** %5
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %7
%12 = load i8*, i8** %3
%13 = load i8*, i8** %5
%14 = load i8, i8* %13
%15 = call i32 @glutBitmapCharacter(i8* %12, i8 signext %14)
br label %16
16: ; preds = %11
%17 = load i8*, i8** %5
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %5
br label %7
19: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @printstring(i8* %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %12, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %10, %5 ], [ %3, %2 ]
%7 = phi i8* [ %9, %5 ], [ %1, %2 ]
%8 = tail call i32 @glutBitmapCharacter(i8* %0, i8 signext %6)
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = load i8, i8* %9
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %5
12: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _I8080_RAR();
void do0x1F() { _I8080_RAR(); }


x86 assembly (clang, -O0):
<do0x1F>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_I8080_RAR@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do0x1F>:
xor    %eax,%eax
jmp    1030 <_I8080_RAR@plt>

LLVM IR (-O0):
define void @do0x1F() {
%1 = call i32 (...) @_I8080_RAR()
ret void
}

LLVM IR (-O2):
define void @do0x1F() {
%1 = tail call i32 (...) @_I8080_RAR()
ret void
}
/* Variables and functions */
int ft_strequ(char const *, char const *);
bool compare_str(const char *a, const char *b) { return ft_strequ(a, b); }


x86 assembly (clang, -O0):
<compare_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ft_strequ@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_str>:
jmp    1030 <ft_strequ@plt>

LLVM IR (-O0):
define i32 @compare_str(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @ft_strequ(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @compare_str(i8* %0, i8* %1) {
%3 = tail call i32 @ft_strequ(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0x95() {
  Assert_real((isalpha(149) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              750, ("isalpha should be 0 for 0x95"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x95>:
push   %rbp
mov    %rsp,%rbp
mov    $0x95,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2ee,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x95>:
push   %rax
mov    $0x95,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2ee,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x95\00"
define void @t_isalpha_0x95() {
%1 = call i64 @isalpha(i32 149)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 750, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x95\00"
define void @t_isalpha_0x95() {
%1 = tail call i64 @isalpha(i32 149)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 750, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int test_imm_95uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x95 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_95uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x95,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_95uint64_lowword_reg>:
test   $0x95,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_95uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 149
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_95uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 149
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ net_checksum_add_cont(int, int /*<<< orphan*/ *,
                                         int /*<<< orphan*/);
uint32_t net_checksum_add(int len, uint8_t *buf) {
  return net_checksum_add_cont(len, buf, 0);
}


x86 assembly (clang, -O0):
<net_checksum_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <net_checksum_add_cont@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<net_checksum_add>:
xor    %edx,%edx
jmp    1030 <net_checksum_add_cont@plt>

LLVM IR (-O0):
define i32 @net_checksum_add(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @net_checksum_add_cont(i32 %5, i32* %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @net_checksum_add(i32 %0, i32* %1) {
%3 = tail call i32 @net_checksum_add_cont(i32 %0, i32* %1, i32 0)
ret i32 %3
}
void discardnewline(char s[]) {
  int i;
  for (i = 0; s[i] != '\0'; i++) {
    if (s[i] == '\n')
      s[i] = '\0';
  }
}


x86 assembly (clang, -O0):
<discardnewline>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1158 <discardnewline+0x58>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    1145 <discardnewline+0x45>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
jmp    114a <discardnewline+0x4a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <discardnewline+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<discardnewline>:
jmp    1117 <discardnewline+0x17>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movb   $0x0,(%rdi)
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0xa,%al
je     1110 <discardnewline+0x10>
test   %al,%al
jne    1113 <discardnewline+0x13>
ret

LLVM IR (-O0):
define void @discardnewline(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %26, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %29
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 10
br i1 %19, label %20, label %25
20: ; preds = %12
%21 = load i8*, i8** %2
%22 = load i32, i32* %3
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
store i8 0, i8* %24
br label %25
25: ; preds = %20, %12
br label %26
26: ; preds = %25
%27 = load i32, i32* %3
%28 = add nsw i32 %27, 1
store i32 %28, i32* %3
br label %4
29: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @discardnewline(i8* nocapture %0) {
br label %2
2: ; preds = %7, %1
%3 = phi i64 [ %8, %7 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
switch i8 %5, label %7 [
i8 0, label %9
i8 10, label %6
]
6: ; preds = %2
store i8 0, i8* %4
br label %7
7: ; preds = %2, %6
%8 = add nuw i64 %3, 1
br label %2
9: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void util_restart(char const *old, char const *neW, int interval) {
  (void)fprintf(
      stderr,
      "util_restart: not supported on your operating system/hardware\n");
}


x86 assembly (clang, -O0):
<util_restart>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
lea    0xecd(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_restart>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [63 x i8] c"util_restart: not supported on your operating system/hardware\0A\00"
define void @util_restart(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* @stderr
%8 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [63 x i8] c"util_restart: not supported on your operating system/hardware\0A\00"
define void @util_restart(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([63 x i8], [63 x i8]* @.str, i64 0, i64 0))
ret void
}
int iabs(int i) { return (i < 0) ? -i : i; }


x86 assembly (clang, -O0):
<iabs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111e <iabs+0x1e>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <iabs+0x24>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iabs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @iabs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 0, %6
br label %10
8: ; preds = %1
%9 = load i32, i32* %2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ %7, %5 ], [ %9, %8 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @iabs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
void api_init() {}


x86 assembly (clang, -O0):
<api_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<api_init>:
ret

LLVM IR (-O0):
define void @api_init() {
ret void
}

LLVM IR (-O2):
define void @api_init() {
ret void
}
/* Variables and functions */
char *ncuridecodeonly(char *, int /*<<< orphan*/ *);
char *ncuridecode(char *s) { return ncuridecodeonly(s, NULL); }


x86 assembly (clang, -O0):
<ncuridecode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <ncuridecodeonly@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ncuridecode>:
xor    %esi,%esi
jmp    1030 <ncuridecodeonly@plt>

LLVM IR (-O0):
define i8* @ncuridecode(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @ncuridecodeonly(i8* %3, i32* null)
ret i8* %4
}

LLVM IR (-O2):
define i8* @ncuridecode(i8* %0) {
%2 = tail call i8* @ncuridecodeonly(i8* %0, i32* null)
ret i8* %2
}
void *netsnmp_generic_clone_row(void *row) {}


x86 assembly (clang, -O0):
<netsnmp_generic_clone_row>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<netsnmp_generic_clone_row>:
ret

LLVM IR (-O0):
define i8* @netsnmp_generic_clone_row(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %2
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @netsnmp_generic_clone_row(i8* nocapture readnone %0) {
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("victim [options]\n"
         "	-a|--address vaddr=val, pid=val	Translate process virtual "
         "address into physical address\n"
         "	-d|--data			Inject data error(DCU error) "
         "under user context\n"
         "	-i|--instruction		Inject instruction error(IFU "
         "error) under user context\n"
         "	-k|--kick 0/1			Kick off trigger. Auto(0), "
         "Manual(1, by default)\n"
         "	-p|--pfa			help to test memory "
         "PFA(Predictive Failure Analysis) function\n"
         "	-h|--help			Show this usage message\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [419 x i8] c"victim [options]\0A\09-a|--address vaddr=val, pid=val\09Translate process virtual address into physical address\0A\09-d|--data\09\09\09Inject data error(DCU error) under user context\0A\09-i|--instruction\09\09Inject instruction error(IFU error) under user context\0A\09-k|--kick 0/1\09\09\09Kick off trigger. Auto(0), Manual(1, by default)\0A\09-p|--pfa\09\09\09help to test memory PFA(Predictive Failure Analysis) function\0A\09-h|--help\09\09\09Show this usage message\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([419 x i8], [419 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [418 x i8] c"victim [options]\0A\09-a|--address vaddr=val, pid=val\09Translate process virtual address into physical address\0A\09-d|--data\09\09\09Inject data error(DCU error) under user context\0A\09-i|--instruction\09\09Inject instruction error(IFU error) under user context\0A\09-k|--kick 0/1\09\09\09Kick off trigger. Auto(0), Manual(1, by default)\0A\09-p|--pfa\09\09\09help to test memory PFA(Predictive Failure Analysis) function\0A\09-h|--help\09\09\09Show this usage message\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([418 x i8], [418 x i8]* @str, i64 0, i64 0))
ret void
}
void PSG_init() {
  volatile unsigned char *pb;
  unsigned short i;
  pb = (unsigned char *)0xC00011;
  for (i = 0; i < 4; i++) {
    *pb = 0x80 | (i << 5) | 0x00;
    *pb = 0x00;
    *pb = 0x90 | (i << 5) | 0x0F;
  }
}


x86 assembly (clang, -O0):
<PSG_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc00011,%eax
mov    %rax,-0x8(%rbp)
movw   $0x0,-0xa(%rbp)
movzwl -0xa(%rbp),%eax
cmp    $0x4,%eax
jge    1166 <PSG_init+0x66>
movzwl -0xa(%rbp),%eax
shl    $0x5,%eax
or     $0x80,%eax
or     $0x0,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
movzwl -0xa(%rbp),%eax
shl    $0x5,%eax
or     $0x90,%eax
or     $0xf,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0xa(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0xa(%rbp)
jmp    1113 <PSG_init+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PSG_init>:
movb   $0x80,0xc00011
80
movb   $0x0,0xc00011
movb   $0x9f,0xc00011
9f
movb   $0xa0,0xc00011
a0
movb   $0x0,0xc00011
movb   $0xbf,0xc00011
bf
movb   $0xc0,0xc00011
c0
movb   $0x0,0xc00011
movb   $0xdf,0xc00011
df
movb   $0xe0,0xc00011
e0
movb   $0x0,0xc00011
movb   $0xff,0xc00011
ff
ret

LLVM IR (-O0):
define void @PSG_init() {
%1 = alloca i8*
%2 = alloca i16
store i8* inttoptr (i64 12582929 to i8*), i8** %1
store i16 0, i16* %2
br label %3
3: ; preds = %23, %0
%4 = load i16, i16* %2
%5 = zext i16 %4 to i32
%6 = icmp slt i32 %5, 4
br i1 %6, label %7, label %26
7: ; preds = %3
%8 = load i16, i16* %2
%9 = zext i16 %8 to i32
%10 = shl i32 %9, 5
%11 = or i32 128, %10
%12 = or i32 %11, 0
%13 = trunc i32 %12 to i8
%14 = load i8*, i8** %1
store volatile i8 %13, i8* %14
%15 = load i8*, i8** %1
store volatile i8 0, i8* %15
%16 = load i16, i16* %2
%17 = zext i16 %16 to i32
%18 = shl i32 %17, 5
%19 = or i32 144, %18
%20 = or i32 %19, 15
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %1
store volatile i8 %21, i8* %22
br label %23
23: ; preds = %7
%24 = load i16, i16* %2
%25 = add i16 %24, 1
store i16 %25, i16* %2
br label %3
26: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @PSG_init() {
store volatile i8 -128, i8* inttoptr (i64 12582929 to i8*)
store volatile i8 0, i8* inttoptr (i64 12582929 to i8*)
store volatile i8 -97, i8* inttoptr (i64 12582929 to i8*)
store volatile i8 -96, i8* inttoptr (i64 12582929 to i8*)
store volatile i8 0, i8* inttoptr (i64 12582929 to i8*)
store volatile i8 -65, i8* inttoptr (i64 12582929 to i8*)
store volatile i8 -64, i8* inttoptr (i64 12582929 to i8*)
store volatile i8 0, i8* inttoptr (i64 12582929 to i8*)
store volatile i8 -33, i8* inttoptr (i64 12582929 to i8*)
store volatile i8 -32, i8* inttoptr (i64 12582929 to i8*)
store volatile i8 0, i8* inttoptr (i64 12582929 to i8*)
store volatile i8 -1, i8* inttoptr (i64 12582929 to i8*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("\033[0;34m"
         "hello"
         "\033[1;37m"
         " world\n"
         "\x1B[0m");
  printf("\033[0;36m"
         "Sup"
         "\033[1;36m"
         " guyz\n"
         "\x1B[0m");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xeed(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
lea    0xefb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [31 x i8] c"\1B[0;34mhello\1B[1;37m world\0A\1B[0m\00"
@.str.1 = [28 x i8] c"\1B[0;36mSup\1B[1;36m guyz\0A\1B[0m\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [31 x i8] c"\1B[0;34mhello\1B[1;37m world\0A\1B[0m\00"
@.str.1 = [28 x i8] c"\1B[0;36mSup\1B[1;36m guyz\0A\1B[0m\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ crc32_add(void const *, size_t, int /*<<< orphan*/);
uint32_t crc32(const void *buf, size_t len) { return crc32_add(buf, len, 0); }


x86 assembly (clang, -O0):
<crc32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <crc32_add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc32>:
xor    %edx,%edx
jmp    1030 <crc32_add@plt>

LLVM IR (-O0):
define i32 @crc32(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @crc32_add(i8* %5, i64 %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
define i32 @crc32(i8* %0, i64 %1) {
%3 = tail call i32 @crc32_add(i8* %0, i64 %1, i32 0)
ret i32 %3
}
/* Variables and functions */
char *kore_strndup(char const *, int /*<<< orphan*/);
char *kore_strdup(const char *str) { return kore_strndup(str, 0); }


x86 assembly (clang, -O0):
<kore_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <kore_strndup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kore_strdup>:
xor    %esi,%esi
jmp    1030 <kore_strndup@plt>

LLVM IR (-O0):
define i8* @kore_strdup(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @kore_strndup(i8* %3, i32 0)
ret i8* %4
}

LLVM IR (-O2):
define i8* @kore_strdup(i8* %0) {
%2 = tail call i8* @kore_strndup(i8* %0, i32 0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ schedule_nick_change(int);
void schedule_regain_nick(int seconds) { schedule_nick_change(seconds); }


x86 assembly (clang, -O0):
<schedule_regain_nick>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <schedule_nick_change@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<schedule_regain_nick>:
jmp    1030 <schedule_nick_change@plt>

LLVM IR (-O0):
define void @schedule_regain_nick(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @schedule_nick_change(i32 %3)
ret void
}

LLVM IR (-O2):
define void @schedule_regain_nick(i32 %0) {
%2 = tail call i32 @schedule_nick_change(i32 %0)
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int is_power_of_2(uint64_t v) { return (v != 0 && ((v & (v - 1)) == 0)); }


x86 assembly (clang, -O0):
<is_power_of_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     112a <is_power_of_2+0x2a>
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_power_of_2>:
test   %edi,%edi
je     110f <is_power_of_2+0xf>
lea    -0x1(%rdi),%ecx
xor    %eax,%eax
test   %ecx,%edi
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_power_of_2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load i32, i32* %2
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = and i32 %6, %8
%10 = icmp eq i32 %9, 0
br label %11
11: ; preds = %5, %1
%12 = phi i1 [ false, %1 ], [ %10, %5 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @is_power_of_2(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 @llvm.ctpop.i32(i32 %0)
%5 = icmp ult i32 %4, 2
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
int test_imm_85uint8_reg(unsigned char val) {
  return ((val) & (0x85 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_85uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x85,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_85uint8_reg>:
test   $0x85,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_85uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 133
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_85uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, -123
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
struct sock {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printk(char *, int);
void *tmalloc(struct sock *, int);
void *tmalloc_helperin(struct sock *sk, int len) {
  printk("tmalloc_helperin'ing %d\n", len);
  return tmalloc(sk, len);
}


x86 assembly (clang, -O0):
<tmalloc_helperin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xec7(%rip),%rdi
call   1030 <printk@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <tmalloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tmalloc_helperin>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
lea    0xed0(%rip),%rdi
call   1030 <printk@plt>
mov    %r14,%rdi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <tmalloc@plt>

LLVM IR (-O0):
%struct.sock = type { i32 }
@.str = [25 x i8] c"tmalloc_helperin'ing %d\0A\00"
define i8* @tmalloc_helperin(%struct.sock* %0, i32 %1) {
%3 = alloca %struct.sock*
%4 = alloca i32
store %struct.sock* %0, %struct.sock** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = call i32 @printk(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load %struct.sock*, %struct.sock** %3
%8 = load i32, i32* %4
%9 = call i8* @tmalloc(%struct.sock* %7, i32 %8)
ret i8* %9
}

LLVM IR (-O2):
%struct.sock = type { i32 }
@.str = [25 x i8] c"tmalloc_helperin'ing %d\0A\00"
define i8* @tmalloc_helperin(%struct.sock* %0, i32 %1) {
%3 = tail call i32 @printk(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %1)
%4 = tail call i8* @tmalloc(%struct.sock* %0, i32 %1)
ret i8* %4
}
int f(int n) { return n + 1; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
unsigned f1(unsigned x, unsigned *y) {
  *y = x / 679U;
  return (x % 679U) == 0;
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2a7,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
mov    $0x2a7,%ecx
xor    %edx,%edx
div    %ecx
cmp    $0x0,%edx
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
mov    %edi,%eax
imul   $0x6084b67b,%rax,%rax
shr    $0x28,%rax
mov    %eax,(%rsi)
imul   $0x7b498517,%edi,%ecx
xor    %eax,%eax
cmp    $0x6084b7,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @f1(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = udiv i32 %5, 679
%7 = load i32*, i32** %4
store i32 %6, i32* %7
%8 = load i32, i32* %3
%9 = urem i32 %8, 679
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @f1(i32 %0, i32* nocapture writeonly %1) {
%3 = udiv i32 %0, 679
store i32 %3, i32* %1
%4 = urem i32 %0, 679
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
void gart_parse_options(char *options) {}


x86 assembly (clang, -O0):
<gart_parse_options>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gart_parse_options>:
ret

LLVM IR (-O0):
define void @gart_parse_options(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @gart_parse_options(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ merge(int *, int, int, int);
void msort(int a[], int begin, int end) {
  int middle;
  if (begin < end) {
    middle = (begin + end) / 2;
    msort(a, begin, middle);
    msort(a, middle + 1, end);
    merge(a, begin, middle, end);
  }
}


x86 assembly (clang, -O0):
<msort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1182 <msort+0x62>
mov    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <msort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1030 <msort@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1040 <merge@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msort>:
cmp    %edx,%esi
jge    1172 <msort+0x52>
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%r12d
mov    %rdi,%r15
lea    (%r14,%r12,1),%eax
mov    %eax,%ebx
shr    $0x1f,%ebx
add    %eax,%ebx
sar    %ebx
mov    %ebx,%edx
call   1030 <msort@plt>
lea    0x1(%rbx),%esi
mov    %r15,%rdi
mov    %r14d,%edx
call   1030 <msort@plt>
mov    %r15,%rdi
mov    %r12d,%esi
mov    %ebx,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1040 <merge@plt>
ret

LLVM IR (-O0):
define void @msort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %28
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
%15 = sdiv i32 %14, 2
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = load i32*, i32** %4
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
%22 = load i32, i32* %6
%23 = load i32*, i32** %4
%24 = load i32, i32* %5
%25 = load i32, i32* %7
%26 = load i32, i32* %6
%27 = call i32 @merge(i32* %23, i32 %24, i32 %25, i32 %26)
br label %28
28: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @msort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %6, label %5
5: ; preds = %3, %6
ret void
6: ; preds = %3
%7 = add nsw i32 %2, %1
%8 = sdiv i32 %7, 2
tail call void @msort(i32* %0, i32 %1, i32 %8)
%9 = add nsw i32 %8, 1
tail call void @msort(i32* %0, i32 %9, i32 %2)
%10 = tail call i32 @merge(i32* %0, i32 %1, i32 %8, i32 %2)
br label %5
}
void av_hwdevice_ctx_create_derived() {}


x86 assembly (clang, -O0):
<av_hwdevice_ctx_create_derived>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_hwdevice_ctx_create_derived>:
ret

LLVM IR (-O0):
define void @av_hwdevice_ctx_create_derived() {
ret void
}

LLVM IR (-O2):
define void @av_hwdevice_ctx_create_derived() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void cleanup_test(void) {
  system("rmmod "
         "af_stp");
}


x86 assembly (clang, -O0):
<cleanup_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanup_test>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"rmmod af_stp\00"
define void @cleanup_test() {
%1 = call i32 @system(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"rmmod af_stp\00"
define void @cleanup_test() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
int map_comp_int(const void *a, const void *b) { return ((int)a) - ((int)b); }


x86 assembly (clang, -O0):
<map_comp_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_comp_int>:
mov    %rdi,%rax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @map_comp_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i32
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i32
%9 = sub nsw i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @map_comp_int(i8* %0, i8* %1) {
%3 = ptrtoint i8* %0 to i64
%4 = trunc i64 %3 to i32
%5 = ptrtoint i8* %1 to i64
%6 = trunc i64 %5 to i32
%7 = sub nsw i32 %4, %6
ret i32 %7
}
void WideTimer0B_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<WideTimer0B_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <WideTimer0B_Handler+0x9>
jmp    1109 <WideTimer0B_Handler+0x9>

x86 assembly (clang, -O2):
<WideTimer0B_Handler>:
jmp    1100 <WideTimer0B_Handler>

LLVM IR (-O0):
define void @WideTimer0B_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @WideTimer0B_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}