xunge/DecIR huggingface dataset:
/* Type definitions */
struct statvfs64 {
  int dummy;
};

/* Variables and functions */
int dll_fstatvfs64(int, struct statvfs64 *);
int __wrap_fstatvfs64(int fd, struct statvfs64 *buf) {
  return dll_fstatvfs64(fd, buf);
}


x86 assembly (clang, -O0):
<__wrap_fstatvfs64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <dll_fstatvfs64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__wrap_fstatvfs64>:
jmp    1030 <dll_fstatvfs64@plt>

LLVM IR (-O0):
%struct.statvfs64 = type { i32 }
define i32 @__wrap_fstatvfs64(i32 %0, %struct.statvfs64* %1) {
%3 = alloca i32
%4 = alloca %struct.statvfs64*
store i32 %0, i32* %3
store %struct.statvfs64* %1, %struct.statvfs64** %4
%5 = load i32, i32* %3
%6 = load %struct.statvfs64*, %struct.statvfs64** %4
%7 = call i32 @dll_fstatvfs64(i32 %5, %struct.statvfs64* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.statvfs64 = type { i32 }
define i32 @__wrap_fstatvfs64(i32 %0, %struct.statvfs64* %1) {
%3 = tail call i32 @dll_fstatvfs64(i32 %0, %struct.statvfs64* %1)
ret i32 %3
}
void quantify_unit2unit_quantify() {}


x86 assembly (clang, -O0):
<quantify_unit2unit_quantify>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quantify_unit2unit_quantify>:
ret

LLVM IR (-O0):
define void @quantify_unit2unit_quantify() {
ret void
}

LLVM IR (-O2):
define void @quantify_unit2unit_quantify() {
ret void
}
double fast(int step, int maxstep) {
  double t;
  t = 1.0 - (double)step / (double)maxstep;
  return 0.1 * t;
}


x86 assembly (clang, -O0):
<fast>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm1
cvtsi2sdl -0x8(%rbp),%xmm0
divsd  %xmm0,%xmm1
movsd  0xee8(%rip),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xecf(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fast>:
cvtsi2sd %edi,%xmm1
cvtsi2sd %esi,%xmm0
divsd  %xmm0,%xmm1
movsd  0xeec(%rip),%xmm0
subsd  %xmm1,%xmm0
mulsd  0xee8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @fast(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca double
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = sitofp i32 %6 to double
%8 = load i32, i32* %4
%9 = sitofp i32 %8 to double
%10 = fdiv double %7, %9
%11 = fsub double 1.000000e+00, %10
store double %11, double* %5
%12 = load double, double* %5
%13 = fmul double 1.000000e-01, %12
ret double %13
}

LLVM IR (-O2):
define double @fast(i32 %0, i32 %1) {
%3 = sitofp i32 %0 to double
%4 = sitofp i32 %1 to double
%5 = fdiv double %3, %4
%6 = fsub double 1.000000e+00, %5
%7 = fmul double %6, 1.000000e-01
ret double %7
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ free(void *);
int guild_storage_db_final(void *key, void *data, va_list ap) {
  free(data);
  return 0;
}


x86 assembly (clang, -O0):
<guild_storage_db_final>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<guild_storage_db_final>:
push   %rax
mov    %rsi,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @guild_storage_db_final(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = call i32 @free(i8* %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @guild_storage_db_final(i8* nocapture readnone %0, i8* nocapture %1, i32 %2) {
%4 = tail call i32 @free(i8* %1)
ret i32 0
}
/* Variables and functions */
scalar_t__ isSameTree(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ printf(char *, char *);
int main(void) {
  printf("%s\n", isSameTree(NULL, NULL) ? "true" : "false");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%esi
mov    %rsi,%rdi
call   1040 <isSameTree@plt>
mov    %rax,%rcx
lea    0xec4(%rip),%rsi
lea    0xeb8(%rip),%rax
cmp    $0x0,%rcx
cmovne %rax,%rsi
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1040 <isSameTree@plt>
test   %rax,%rax
lea    0xed5(%rip),%rax
lea    0xec9(%rip),%rsi
cmove  %rax,%rsi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [5 x i8] c"true\00"
@.str.2 = [6 x i8] c"false\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 @isSameTree(i32* null, i32* null)
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [5 x i8] c"true\00"
@.str.2 = [6 x i8] c"false\00"
define i32 @main() {
%1 = tail call i64 @isSameTree(i32* null, i32* null)
%2 = icmp eq i64 %1, 0
%3 = select i1 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free_cmd_sys(int /*<<< orphan*/);
void free_cmds() { free_cmd_sys(0); }


x86 assembly (clang, -O0):
<free_cmds>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <free_cmd_sys@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_cmds>:
xor    %edi,%edi
jmp    1030 <free_cmd_sys@plt>

LLVM IR (-O0):
define void @free_cmds() {
%1 = call i32 @free_cmd_sys(i32 0)
ret void
}

LLVM IR (-O2):
define void @free_cmds() {
%1 = tail call i32 @free_cmd_sys(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ psw_write_bit(int, int);
void psw_set_ac(void) { psw_write_bit(6, 1); }


x86 assembly (clang, -O0):
<psw_set_ac>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
mov    $0x1,%esi
call   1030 <psw_write_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<psw_set_ac>:
mov    $0x6,%edi
mov    $0x1,%esi
jmp    1030 <psw_write_bit@plt>

LLVM IR (-O0):
define void @psw_set_ac() {
%1 = call i32 @psw_write_bit(i32 6, i32 1)
ret void
}

LLVM IR (-O2):
define void @psw_set_ac() {
%1 = tail call i32 @psw_write_bit(i32 6, i32 1)
ret void
}
int test() { return 0; }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @test() {
ret i32 0
}

LLVM IR (-O2):
define i32 @test() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint8_t is_little_endian(void) {
  union {
    uint16_t x;
    uint8_t y[2];
  } u;
  u.x = 1;
  return u.y[0];
}


x86 assembly (clang, -O0):
<is_little_endian>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_little_endian>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%union.anon = type { [2 x i32] }
define i32 @is_little_endian() {
%1 = alloca %union.anon
%2 = bitcast %union.anon* %1 to i32*
store i32 1, i32* %2
%3 = bitcast %union.anon* %1 to [2 x i32]*
%4 = getelementptr inbounds [2 x i32], [2 x i32]* %3, i64 0, i64 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @is_little_endian() {
ret i32 1
}
/* Variables and functions */
int imax(int, int);
int imax4(int a, int b, int c, int d) { return imax(imax(a, b), imax(c, d)); }


x86 assembly (clang, -O0):
<imax4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <imax@plt>
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1030 <imax@plt>
mov    -0x14(%rbp),%edi
mov    %eax,%esi
call   1030 <imax@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<imax4>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %edx,%ebp
call   1030 <imax@plt>
mov    %eax,%ebx
mov    %ebp,%edi
mov    %r14d,%esi
call   1030 <imax@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <imax@plt>

LLVM IR (-O0):
define i32 @imax4(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @imax(i32 %9, i32 %10)
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = call i32 @imax(i32 %12, i32 %13)
%15 = call i32 @imax(i32 %11, i32 %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @imax4(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @imax(i32 %0, i32 %1)
%6 = tail call i32 @imax(i32 %2, i32 %3)
%7 = tail call i32 @imax(i32 %5, i32 %6)
ret i32 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
#define AF_INET 129
#define AF_INET6 128
char const *inet_ntop4(void const *, char *, int /*<<< orphan*/);
char const *inet_ntop6(void const *, char *, int /*<<< orphan*/);
const char *inet_ntop(int af, const void *src, char *dst, socklen_t cnt) {
  switch (af) {
  case AF_INET:
    return inet_ntop4(src, dst, cnt);
  case AF_INET6:
    return inet_ntop6(src, dst, cnt);
  default:
    return NULL;
  }
}


x86 assembly (clang, -O0):
<inet_ntop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x28(%rbp)
sub    $0x80,%eax
je     1178 <inet_ntop+0x58>
jmp    114c <inet_ntop+0x2c>
mov    -0x28(%rbp),%eax
sub    $0x81,%eax
jne    1191 <inet_ntop+0x71>
jmp    115f <inet_ntop+0x3f>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x24(%rbp),%edx
call   1040 <inet_ntop4@plt>
mov    %rax,-0x8(%rbp)
jmp    1199 <inet_ntop+0x79>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x24(%rbp),%edx
call   1030 <inet_ntop6@plt>
mov    %rax,-0x8(%rbp)
jmp    1199 <inet_ntop+0x79>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inet_ntop>:
cmp    $0x80,%edi
je     113d <inet_ntop+0x1d>
cmp    $0x81,%edi
jne    114a <inet_ntop+0x2a>
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %ecx,%edx
jmp    1040 <inet_ntop4@plt>
mov    %rsi,%rdi
mov    %rdx,%rsi
mov    %ecx,%edx
jmp    1030 <inet_ntop6@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @inet_ntop(i32 %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
store i32 %0, i32* %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
%10 = load i32, i32* %6
switch i32 %10, label %21 [
i32 129, label %11
i32 128, label %16
]
11: ; preds = %4
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = call i8* @inet_ntop4(i8* %12, i8* %13, i32 %14)
store i8* %15, i8** %5
br label %22
16: ; preds = %4
%17 = load i8*, i8** %7
%18 = load i8*, i8** %8
%19 = load i32, i32* %9
%20 = call i8* @inet_ntop6(i8* %17, i8* %18, i32 %19)
store i8* %20, i8** %5
br label %22
21: ; preds = %4
store i8* null, i8** %5
br label %22
22: ; preds = %21, %16, %11
%23 = load i8*, i8** %5
ret i8* %23
}

LLVM IR (-O2):
define i8* @inet_ntop(i32 %0, i8* %1, i8* %2, i32 %3) {
switch i32 %0, label %9 [
i32 129, label %5
i32 128, label %7
]
5: ; preds = %4
%6 = tail call i8* @inet_ntop4(i8* %1, i8* %2, i32 %3)
br label %9
7: ; preds = %4
%8 = tail call i8* @inet_ntop6(i8* %1, i8* %2, i32 %3)
br label %9
9: ; preds = %4, %7, %5
%10 = phi i8* [ %8, %7 ], [ %6, %5 ], [ null, %4 ]
ret i8* %10
}
void check(int x) {}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
ret

LLVM IR (-O0):
define void @check(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @check(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Prim(int /*<<< orphan*/);
int main(int argc, char *argv[]) {
  Prim(0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <Prim@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <Prim@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @Prim(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @Prim(i32 0)
ret i32 0
}
char *MemZeroAlloc(nbytes) {
  char *p;
  register long *x;
  register nlongs;
  p = MemAlloc(nbytes);
  if (p) {
    nlongs = (nbytes + sizeof(long) - 1) / sizeof(long);
    x = (long *)p;
    while (--nlongs >= 0)
      *x++ = 0;
  }
  return (p);
}


x86 assembly (clang, -O0):
<MemZeroAlloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <MemAlloc@plt>
cltq
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1183 <MemZeroAlloc+0x73>
movslq -0x4(%rbp),%rax
add    $0x8,%rax
sub    $0x1,%rax
shr    $0x3,%rax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x1c(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
cmp    $0x0,%eax
jl     117e <MemZeroAlloc+0x6e>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x18(%rbp)
movq   $0x0,(%rax)
jmp    1151 <MemZeroAlloc+0x41>
jmp    1183 <MemZeroAlloc+0x73>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MemZeroAlloc>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
xor    %eax,%eax
call   1040 <MemAlloc@plt>
movslq %eax,%rbx
test   %ebx,%ebx
je     115c <MemZeroAlloc+0x3c>
movslq %ebp,%rdx
add    $0x7,%rdx
mov    %rdx,%rax
shr    $0x3,%rax
test   %eax,%eax
jle    115c <MemZeroAlloc+0x3c>
movabs $0x7fffffff8,%rax
and    %rax,%rdx
mov    %rbx,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @MemZeroAlloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = call i32 (i32, ...) bitcast (i32 (...)* @MemAlloc to i32 (i32, ...)*)(i32 %6)
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %3
%10 = load i8*, i8** %3
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %29
12: ; preds = %1
%13 = load i32, i32* %2
%14 = sext i32 %13 to i64
%15 = add i64 %14, 8
%16 = sub i64 %15, 1
%17 = udiv i64 %16, 8
%18 = trunc i64 %17 to i32
store i32 %18, i32* %5
%19 = load i8*, i8** %3
%20 = bitcast i8* %19 to i64*
store i64* %20, i64** %4
br label %21
21: ; preds = %25, %12
%22 = load i32, i32* %5
%23 = add nsw i32 %22, -1
store i32 %23, i32* %5
%24 = icmp sge i32 %23, 0
br i1 %24, label %25, label %28
25: ; preds = %21
%26 = load i64*, i64** %4
%27 = getelementptr inbounds i64, i64* %26, i32 1
store i64* %27, i64** %4
store i64 0, i64* %26
br label %21
28: ; preds = %21
br label %29
29: ; preds = %28, %1
%30 = load i8*, i8** %3
ret i8* %30
}

LLVM IR (-O2):
define i8* @MemZeroAlloc(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @MemAlloc to i32 (i32, ...)*)(i32 %0)
%3 = sext i32 %2 to i64
%4 = icmp eq i32 %2, 0
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = sext i32 %0 to i64
%7 = add nsw i64 %6, 7
%8 = lshr i64 %7, 3
%9 = trunc i64 %8 to i32
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %5
%12 = inttoptr i64 %3 to i8*
%13 = and i64 %7, 34359738360
br label %14
14: ; preds = %11, %5, %1
%15 = inttoptr i64 %3 to i8*
ret i8* %15
}
/* Variables and functions */
int /*<<< orphan*/ gd_filetype_function(int);
void jpeg_filetype_function(void) { gd_filetype_function(3); }


x86 assembly (clang, -O0):
<jpeg_filetype_function>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <gd_filetype_function@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<jpeg_filetype_function>:
mov    $0x3,%edi
jmp    1030 <gd_filetype_function@plt>

LLVM IR (-O0):
define void @jpeg_filetype_function() {
%1 = call i32 @gd_filetype_function(i32 3)
ret void
}

LLVM IR (-O2):
define void @jpeg_filetype_function() {
%1 = tail call i32 @gd_filetype_function(i32 3)
ret void
}
/* Variables and functions */
int get_cpu_affinity();
int get_cpu_affinity_(void) { return get_cpu_affinity(); }


x86 assembly (clang, -O0):
<get_cpu_affinity_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <get_cpu_affinity@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cpu_affinity_>:
xor    %eax,%eax
jmp    1030 <get_cpu_affinity@plt>

LLVM IR (-O0):
define i32 @get_cpu_affinity_() {
%1 = call i32 (...) @get_cpu_affinity()
ret i32 %1
}

LLVM IR (-O2):
define i32 @get_cpu_affinity_() {
%1 = tail call i32 (...) @get_cpu_affinity()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ DoneCharSource();
void DoneScanner(void) { DoneCharSource(); }


x86 assembly (clang, -O0):
<DoneScanner>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DoneCharSource@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoneScanner>:
xor    %eax,%eax
jmp    1030 <DoneCharSource@plt>

LLVM IR (-O0):
define void @DoneScanner() {
%1 = call i32 (...) @DoneCharSource()
ret void
}

LLVM IR (-O2):
define void @DoneScanner() {
%1 = tail call i32 (...) @DoneCharSource()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
int /*<<< orphan*/ good_jump();
scalar_t__ malloc(int);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ strcpy(char *, char *);
int main(int argc, char *argv[]) {
  char *buffer;
  buffer = (char *)malloc(64);
  strcpy(buffer, "abc");
  printf("%s\n", buffer);
  good_jump();
  printf("returned from good_jump.\n");
  free(buffer);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x40,%edi
call   1070 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xe81(%rip),%rsi
call   1040 <strcpy@plt>
mov    -0x18(%rbp),%rsi
lea    0xe75(%rip),%rdi
mov    $0x0,%al
call   1050 <printf@plt>
mov    $0x0,%al
call   1060 <good_jump@plt>
lea    0xe64(%rip),%rdi
mov    $0x0,%al
call   1050 <printf@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x40,%edi
call   1070 <malloc@plt>
mov    %rax,%rbx
lea    0xe9b(%rip),%rsi
mov    %rax,%rdi
call   1040 <strcpy@plt>
mov    %rbx,%rdi
call   1050 <puts@plt>
xor    %eax,%eax
call   1060 <good_jump@plt>
lea    0xe81(%rip),%rdi
call   1050 <puts@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"abc\00"
@.str.1 = [4 x i8] c"%s\0A\00"
@.str.2 = [26 x i8] c"returned from good_jump.\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i64 @malloc(i32 64)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %6
%9 = load i8*, i8** %6
%10 = call i32 @strcpy(i8* %9, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%11 = load i8*, i8** %6
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %11)
%13 = call i32 (...) @good_jump()
%14 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0))
%15 = load i8*, i8** %6
%16 = call i32 @free(i8* %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"abc\00"
@str = [25 x i8] c"returned from good_jump.\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 @malloc(i32 64)
%4 = inttoptr i64 %3 to i8*
%5 = tail call i32 @strcpy(i8* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @puts(i8* dereferenceable(1) %4)
%7 = tail call i32 (...) @good_jump()
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
%9 = tail call i32 @free(i8* %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char *, int);
char *midstr(char *d, char *s, int start, int how_many) {
  strncpy(d, s + start, how_many);
  *(d + how_many) = '\0';
  return d;
}


x86 assembly (clang, -O0):
<midstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movslq -0x14(%rbp),%rax
add    %rax,%rsi
mov    -0x18(%rbp),%edx
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<midstr>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %rdi,%rbx
movslq %edx,%rax
add    %rax,%rsi
mov    %ecx,%edx
call   1030 <strncpy@plt>
movslq %ebp,%rax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @midstr(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i32, i32* %8
%15 = call i32 @strncpy(i8* %9, i8* %13, i32 %14)
%16 = load i8*, i8** %5
%17 = load i32, i32* %8
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
store i8 0, i8* %19
%20 = load i8*, i8** %5
ret i8* %20
}

LLVM IR (-O2):
define i8* @midstr(i8* returned %0, i8* %1, i32 %2, i32 %3) {
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds i8, i8* %1, i64 %5
%7 = tail call i32 @strncpy(i8* %0, i8* %6, i32 %3)
%8 = sext i32 %3 to i64
%9 = getelementptr inbounds i8, i8* %0, i64 %8
store i8 0, i8* %9
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int syscall(int, int, int /*<<< orphan*/);
int uv__inotify_rm_watch(int fd, int32_t wd) { return syscall(255, fd, wd); }


x86 assembly (clang, -O0):
<uv__inotify_rm_watch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
mov    $0xff,%edi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uv__inotify_rm_watch>:
mov    %esi,%edx
mov    %edi,%esi
mov    $0xff,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @uv__inotify_rm_watch(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @syscall(i32 255, i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @uv__inotify_rm_watch(i32 %0, i32 %1) {
%3 = tail call i32 @syscall(i32 255, i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
char *gu_str_append(char *, size_t *, char *, size_t);
size_t snprintf(char *, int, char *, size_t);
char *gu_str_table_append_size(char *str, size_t *off, size_t n) {
  char buf[10];
  size_t len = snprintf(buf, sizeof(buf), "%zu", n);
  return gu_str_append(str, off, buf, len);
}


x86 assembly (clang, -O0):
<gu_str_table_append_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x22(%rbp),%rdi
mov    -0x18(%rbp),%rcx
mov    $0xa,%esi
lea    0xeb8(%rip),%rdx
call   1030 <snprintf@plt>
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x22(%rbp),%rdx
mov    -0x30(%rbp),%rcx
call   1040 <gu_str_append@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gu_str_table_append_size>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%rcx
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xec7(%rip),%rdx
lea    0x6(%rsp),%r15
mov    %r15,%rdi
mov    $0xa,%esi
call   1030 <snprintf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
mov    %rax,%rcx
call   1040 <gu_str_append@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%zu\00"
define i8* @gu_str_table_append_size(i8* %0, i64* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64*
%6 = alloca i64
%7 = alloca [10 x i8]
%8 = alloca i64
store i8* %0, i8** %4
store i64* %1, i64** %5
store i64 %2, i64* %6
%9 = getelementptr inbounds [10 x i8], [10 x i8]* %7, i64 0, i64 0
%10 = load i64, i64* %6
%11 = call i64 @snprintf(i8* %9, i32 10, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %10)
store i64 %11, i64* %8
%12 = load i8*, i8** %4
%13 = load i64*, i64** %5
%14 = getelementptr inbounds [10 x i8], [10 x i8]* %7, i64 0, i64 0
%15 = load i64, i64* %8
%16 = call i8* @gu_str_append(i8* %12, i64* %13, i8* %14, i64 %15)
ret i8* %16
}

LLVM IR (-O2):
@.str = [4 x i8] c"%zu\00"
define i8* @gu_str_table_append_size(i8* %0, i64* %1, i64 %2) {
%4 = alloca [10 x i8]
%5 = getelementptr inbounds [10 x i8], [10 x i8]* %4, i64 0, i64 0
%6 = call i64 @snprintf(i8* %5, i32 10, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %2)
%7 = call i8* @gu_str_append(i8* %0, i64* %1, i8* %5, i64 %6)
ret i8* %7
}
void gtk_text_view_get_pixels_below_lines() {}


x86 assembly (clang, -O0):
<gtk_text_view_get_pixels_below_lines>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_view_get_pixels_below_lines>:
ret

LLVM IR (-O0):
define void @gtk_text_view_get_pixels_below_lines() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_view_get_pixels_below_lines() {
ret void
}
/* Variables and functions */
char *fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
char *NV_gets(char *str, int size) { return fgets(str, size, stdin); }


x86 assembly (clang, -O0):
<NV_gets>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    0x2ebb(%rip),%rax
mov    (%rax),%edx
call   1030 <fgets@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NV_gets>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edx
jmp    1030 <fgets@plt>

LLVM IR (-O0):
@stdin = global i32 0
define i8* @NV_gets(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = load i32, i32* @stdin
%8 = call i8* @fgets(i8* %5, i32 %6, i32 %7)
ret i8* %8
}

LLVM IR (-O2):
@stdin = global i32 0
define i8* @NV_gets(i8* %0, i32 %1) {
%3 = load i32, i32* @stdin
%4 = tail call i8* @fgets(i8* %0, i32 %1, i32 %3)
ret i8* %4
}
/* Type definitions */
struct parsed_config {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ *getField(char const *, char const *,
                             struct parsed_config const *);
int fieldExist(const char *section_name, const char *field_name,
               const struct parsed_config *c) {
  return NULL != getField(section_name, field_name, c);
}


x86 assembly (clang, -O0):
<fieldExist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <getField@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fieldExist>:
push   %rax
call   1030 <getField@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.parsed_config = type { i32 }
define i32 @fieldExist(i8* %0, i8* %1, %struct.parsed_config* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca %struct.parsed_config*
store i8* %0, i8** %4
store i8* %1, i8** %5
store %struct.parsed_config* %2, %struct.parsed_config** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load %struct.parsed_config*, %struct.parsed_config** %6
%10 = call i32* @getField(i8* %7, i8* %8, %struct.parsed_config* %9)
%11 = icmp ne i32* null, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
%struct.parsed_config = type { i32 }
define i32 @fieldExist(i8* %0, i8* %1, %struct.parsed_config* %2) {
%4 = tail call i32* @getField(i8* %0, i8* %1, %struct.parsed_config* %2)
%5 = icmp ne i32* %4, null
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char **argv) {
  int i, lsum, sum;
  sum = 0;
#pragma omp parallel private(i, lsum) reduction(+ : sum)
  {
    lsum = 0;
#pragma omp for
    for (i = 0; i < 21; i++) {
      lsum += i;
    }
    printf("local sum: %d\n", lsum);
    sum += lsum;
  }
  printf("total sum: %d\n", sum);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x1c(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x15,-0x14(%rbp)
jge    115c <main+0x4c>
mov    -0x14(%rbp),%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113b <main+0x2b>
mov    -0x18(%rbp),%esi
lea    0xe9a(%rip),%rdi
call   1030 <printf@plt>
mov    -0x18(%rbp),%eax
add    -0x1c(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%esi
lea    0xe91(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xd2,%esi
call   1030 <printf@plt>
lea    0xee6(%rip),%rdi
mov    $0xd2,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"local sum: %d\0A\00"
@.str.1 = [15 x i8] c"total sum: %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %8
store i32 0, i32* %7
store i32 0, i32* %6
br label %9
9: ; preds = %16, %2
%10 = load i32, i32* %6
%11 = icmp slt i32 %10, 21
br i1 %11, label %12, label %19
12: ; preds = %9
%13 = load i32, i32* %6
%14 = load i32, i32* %7
%15 = add nsw i32 %14, %13
store i32 %15, i32* %7
br label %16
16: ; preds = %12
%17 = load i32, i32* %6
%18 = add nsw i32 %17, 1
store i32 %18, i32* %6
br label %9
19: ; preds = %9
%20 = load i32, i32* %7
%21 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %20)
%22 = load i32, i32* %7
%23 = load i32, i32* %8
%24 = add nsw i32 %23, %22
store i32 %24, i32* %8
%25 = load i32, i32* %8
%26 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i32 %25)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"local sum: %d\0A\00"
@.str.1 = [15 x i8] c"total sum: %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 210)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i32 210)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_version(void) {
  printf("spi-hdlc-adapter "
         "0.07"
         " ("
         "19:00:45"
         " "
         "Mar 15 2022"
         ")\n");
  printf("Copyright (c) 2017 The OpenThread Authors, All Rights Reserved\n");
}


x86 assembly (clang, -O0):
<print_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf07(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_version>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf09(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"spi-hdlc-adapter 0.07 (19:00:45 Mar 15 2022)\0A\00"
@.str.1 = [64 x i8] c"Copyright (c) 2017 The OpenThread Authors, All Rights Reserved\0A\00"
define void @print_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [45 x i8] c"spi-hdlc-adapter 0.07 (19:00:45 Mar 15 2022)\00"
@str.2 = [63 x i8] c"Copyright (c) 2017 The OpenThread Authors, All Rights Reserved\00"
define void @print_version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([63 x i8], [63 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_spinlock_t;

/* Variables and functions */
int pthread_spin_init(int /*<<< orphan*/ *, int);
int __attribute__((unused))
___pthread_spin_init(pthread_spinlock_t *spin, int i, char *spin_name, char *fn,
                     int ln) {
  return pthread_spin_init(spin, i);
}


x86 assembly (clang, -O0):
<___pthread_spin_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <pthread_spin_init@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<___pthread_spin_init>:
jmp    1030 <pthread_spin_init@plt>

LLVM IR (-O0):
define i32 @___pthread_spin_init(i32* %0, i32 %1, i8* %2, i8* %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = call i32 @pthread_spin_init(i32* %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @___pthread_spin_init(i32* %0, i32 %1, i8* nocapture readnone %2, i8* nocapture readnone %3, i32 %4) {
%6 = tail call i32 @pthread_spin_init(i32* %0, i32 %1)
ret i32 %6
}
void lcd_on(void) { (*((volatile unsigned long *)0x7F008084)) |= (1 << 0); }


x86 assembly (clang, -O0):
<lcd_on>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7f008084,%eax
mov    (%rax),%rcx
or     $0x1,%rcx
mov    $0x7f008084,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_on>:
orq    $0x1,0x7f008084
7f 01
ret

LLVM IR (-O0):
define void @lcd_on() {
%1 = load volatile i64, i64* inttoptr (i64 2130739332 to i64*)
%2 = or i64 %1, 1
store volatile i64 %2, i64* inttoptr (i64 2130739332 to i64*)
ret void
}

LLVM IR (-O2):
define void @lcd_on() {
%1 = load volatile i64, i64* inttoptr (i64 2130739332 to i64*)
%2 = or i64 %1, 1
store volatile i64 %2, i64* inttoptr (i64 2130739332 to i64*)
ret void
}
/* Variables and functions */
double strtod(char const *, int /*<<< orphan*/);
double atof(const char *ascii) { return strtod(ascii, 0); }


x86 assembly (clang, -O0):
<atof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <strtod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atof>:
xor    %esi,%esi
jmp    1030 <strtod@plt>

LLVM IR (-O0):
define double @atof(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call double @strtod(i8* %3, i32 0)
ret double %4
}

LLVM IR (-O2):
define double @atof(i8* %0) {
%2 = tail call double @strtod(i8* %0, i32 0)
ret double %2
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void fprintBasis(FILE *fp, int c) {
  if (c == '0') {
    fprintf(fp, "+");
  } else if (c == '1') {
    fprintf(fp, "×");
  }
}


x86 assembly (clang, -O0):
<fprintBasis>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x30,-0xc(%rbp)
jne    113e <fprintBasis+0x2e>
mov    -0x8(%rbp),%rdi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
jmp    115d <fprintBasis+0x4d>
cmpl   $0x31,-0xc(%rbp)
jne    1158 <fprintBasis+0x48>
mov    -0x8(%rbp),%rdi
lea    0xeaf(%rip),%rsi
call   1030 <fprintf@plt>
jmp    115d <fprintBasis+0x4d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fprintBasis>:
mov    %rdi,%rcx
cmp    $0x31,%esi
je     113a <fprintBasis+0x1a>
cmp    $0x30,%esi
jne    1150 <fprintBasis+0x30>
mov    $0x2b,%edi
mov    %rcx,%rsi
jmp    1030 <fputc@plt>
lea    0xebf(%rip),%rdi
mov    $0x2,%esi
mov    $0x1,%edx
jmp    1040 <fwrite@plt>
ret

LLVM IR (-O0):
@.str = [2 x i8] c"+\00"
@.str.1 = [3 x i8] c"\C3\97\00"
define void @fprintBasis(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 48
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32*, i32** %3
%9 = call i32 @fprintf(i32* %8, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %17
10: ; preds = %2
%11 = load i32, i32* %4
%12 = icmp eq i32 %11, 49
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32*, i32** %3
%15 = call i32 @fprintf(i32* %14, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
br label %16
16: ; preds = %13, %10
br label %17
17: ; preds = %16, %7
ret void
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"\C3\97\00"
define void @fprintBasis(i32* nocapture %0, i32 %1) {
switch i32 %1, label %7 [
i32 48, label %3
i32 49, label %5
]
3: ; preds = %2
%4 = tail call i32 @fputc(i32 43, i32* %0)
br label %7
5: ; preds = %2
%6 = tail call i64 @fwrite(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i64 2, i64 1, i32* %0)
br label %7
7: ; preds = %2, %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char const *argv[]) {
  printf("\a\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"\07\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [2 x i8] c"\07\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int ssize_t;

/* Variables and functions */
int /*<<< orphan*/ ntohl(int /*<<< orphan*/);
int read_msg(int, int /*<<< orphan*/ *);
ssize_t read_uint32(uint32_t *data) {
  ssize_t r;
  r = read_msg(sizeof(uint32_t), data);
  if (r != -1)
    *data = ntohl(*data);
  return r;
}


x86 assembly (clang, -O0):
<read_uint32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x4,%edi
call   1030 <read_msg@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0xffffffff,-0xc(%rbp)
je     115a <read_uint32+0x3a>
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1040 <ntohl@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_uint32>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    $0x4,%edi
mov    %rbx,%rsi
call   1030 <read_msg@plt>
mov    %eax,%ebp
cmp    $0xffffffff,%eax
je     1143 <read_uint32+0x23>
mov    (%rbx),%edi
call   1040 <ntohl@plt>
mov    %eax,(%rbx)
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @read_uint32(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @read_msg(i32 4, i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, -1
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i32*, i32** %2
%10 = load i32, i32* %9
%11 = call i32 @ntohl(i32 %10)
%12 = load i32*, i32** %2
store i32 %11, i32* %12
br label %13
13: ; preds = %8, %1
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @read_uint32(i32* %0) {
%2 = tail call i32 @read_msg(i32 4, i32* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i32, i32* %0
%6 = tail call i32 @ntohl(i32 %5)
store i32 %6, i32* %0
br label %7
7: ; preds = %4, %1
ret i32 %2
}
int is_digit(char c) { return ((c >= '0' && c <= '9') ? 1 : 0); }


x86 assembly (clang, -O0):
<is_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <is_digit+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_digit>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_digit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 1, i32 0
ret i32 %13
}

LLVM IR (-O2):
define i32 @is_digit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
void test45_Test3_targetInit__I() {}


x86 assembly (clang, -O0):
<test45_Test3_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test45_Test3_targetInit__I>:
ret

LLVM IR (-O0):
define void @test45_Test3_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @test45_Test3_targetInit__I() {
ret void
}
void MD_BlankFunction(void) {}


x86 assembly (clang, -O0):
<MD_BlankFunction>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MD_BlankFunction>:
ret

LLVM IR (-O0):
define void @MD_BlankFunction() {
ret void
}

LLVM IR (-O2):
define void @MD_BlankFunction() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getwd(char *);
int strlen(char *);
void fsel_cwd(char *cwd_path) {
  int len;
  getwd(cwd_path);
  len = strlen(cwd_path);
  cwd_path[len] = '/';
  cwd_path[len + 1] = '\0';
}


x86 assembly (clang, -O0):
<fsel_cwd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <getwd@plt>
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x2f,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsel_cwd>:
push   %rbx
mov    %rdi,%rbx
call   1040 <getwd@plt>
mov    %rbx,%rdi
call   1030 <strlen@plt>
cltq
movw   $0x2f,(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
define void @fsel_cwd(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @getwd(i8* %4)
%6 = load i8*, i8** %2
%7 = call i32 @strlen(i8* %6)
store i32 %7, i32* %3
%8 = load i8*, i8** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
store i8 47, i8* %11
%12 = load i8*, i8** %2
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %12, i64 %15
store i8 0, i8* %16
ret void
}

LLVM IR (-O2):
define void @fsel_cwd(i8* %0) {
%2 = tail call i32 @getwd(i8* %0)
%3 = tail call i32 @strlen(i8* %0)
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
store i8 47, i8* %5
%6 = add nsw i32 %3, 1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %0, i64 %7
store i8 0, i8* %8
ret void
}
long main(void) { return 42; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i64 @main() {
ret i64 42
}

LLVM IR (-O2):
define i64 @main() {
ret i64 42
}
/* Variables and functions */
double dist(int /*<<< orphan*/, int);
double rand01() { return dist(0, 1); }


x86 assembly (clang, -O0):
<rand01>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x1,%esi
call   1030 <dist@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand01>:
xor    %edi,%edi
mov    $0x1,%esi
jmp    1030 <dist@plt>

LLVM IR (-O0):
define double @rand01() {
%1 = call double @dist(i32 0, i32 1)
ret double %1
}

LLVM IR (-O2):
define double @rand01() {
%1 = tail call double @dist(i32 0, i32 1)
ret double %1
}
const char *__malidrv_build_info(void) {
  return "malidrv:  API_VERSION=401 REPO_URL=android-4.4.4_r5 "
         "REVISION=-android-4.4.4_r5 CHANGED_REVISION=android-4.4.4_r5 "
         "CHANGE_DATE=2014-11-13 13:48:36 +0000 BUILD_DATE=Thu Mar 12 22:54:58 "
         "WIB 2015 BUILD=debug TARGET_PLATFORM= MALI_PLATFORM= KDIR= "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= "
         "USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 "
         "USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [418 x i8] c"malidrv: API_VERSION=401 REPO_URL=android-4.4.4_r5 REVISION=-android-4.4.4_r5 CHANGED_REVISION=android-4.4.4_r5 CHANGE_DATE=2014-11-13 13:48:36 +0000 BUILD_DATE=Thu Mar 12 22:54:58 WIB 2015 BUILD=debug TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([418 x i8], [418 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [418 x i8] c"malidrv: API_VERSION=401 REPO_URL=android-4.4.4_r5 REVISION=-android-4.4.4_r5 CHANGED_REVISION=android-4.4.4_r5 CHANGE_DATE=2014-11-13 13:48:36 +0000 BUILD_DATE=Thu Mar 12 22:54:58 WIB 2015 BUILD=debug TARGET_PLATFORM= MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP= USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([418 x i8], [418 x i8]* @.str, i64 0, i64 0)
}