xunge/DecIR huggingface dataset:
/* Variables and functions */
scalar_t__ alloc(scalar_t__);
int /*<<< orphan*/ dealloc(char *);
int /*<<< orphan*/ strcat(char *, char *);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *s_cat2(char *a, char *b) {
  char *ret = (char *)alloc(strlen(a) + strlen(b) + 1);
  strcpy(ret, a);
  strcat(ret, b);
  dealloc(a);
  dealloc(b);
  return ret;
}


x86 assembly (clang, -O0):
<s_cat2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strlen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <strlen@plt>
mov    -0x20(%rbp),%rdi
add    %rax,%rdi
add    $0x1,%rdi
call   1060 <alloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <strcpy@plt>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1070 <strcat@plt>
mov    -0x8(%rbp),%rdi
call   1030 <dealloc@plt>
mov    -0x10(%rbp),%rdi
call   1030 <dealloc@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_cat2>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%r12
call   1050 <strlen@plt>
mov    %rax,%r15
mov    %r14,%rdi
call   1050 <strlen@plt>
lea    (%r15,%rax,1),%rdi
add    $0x1,%rdi
call   1060 <alloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r12,%rsi
call   1040 <strcpy@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1070 <strcat@plt>
mov    %r12,%rdi
call   1030 <dealloc@plt>
mov    %r14,%rdi
call   1030 <dealloc@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @s_cat2(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
%8 = load i8*, i8** %4
%9 = call i64 @strlen(i8* %8)
%10 = add nsw i64 %7, %9
%11 = add nsw i64 %10, 1
%12 = call i64 @alloc(i64 %11)
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** %5
%14 = load i8*, i8** %5
%15 = load i8*, i8** %3
%16 = call i32 @strcpy(i8* %14, i8* %15)
%17 = load i8*, i8** %5
%18 = load i8*, i8** %4
%19 = call i32 @strcat(i8* %17, i8* %18)
%20 = load i8*, i8** %3
%21 = call i32 @dealloc(i8* %20)
%22 = load i8*, i8** %4
%23 = call i32 @dealloc(i8* %22)
%24 = load i8*, i8** %5
ret i8* %24
}

LLVM IR (-O2):
define i8* @s_cat2(i8* %0, i8* %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = tail call i64 @strlen(i8* dereferenceable(1) %1)
%5 = add i64 %3, 1
%6 = add i64 %5, %4
%7 = tail call i64 @alloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
%9 = tail call i32 @strcpy(i8* %8, i8* %0)
%10 = tail call i32 @strcat(i8* %8, i8* %1)
%11 = tail call i32 @dealloc(i8* %0)
%12 = tail call i32 @dealloc(i8* %1)
ret i8* %8
}
/* Variables and functions */
int /*<<< orphan*/ DeinitFields();
void SwitchFrom_7700(void) { DeinitFields(); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DeinitFields@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
jmp    1030 <DeinitFields@plt>

LLVM IR (-O0):
define void @SwitchFrom_7700() {
%1 = call i32 (...) @DeinitFields()
ret void
}

LLVM IR (-O2):
define void @SwitchFrom_7700() {
%1 = tail call i32 (...) @DeinitFields()
ret void
}
unsigned long funcHashExpressions_DEFAULT(unsigned char *key) {
  unsigned long hashval = 5381;
  while (*key) {
    hashval += (hashval << 5) + (*key++);
  }
  return hashval;
}


x86 assembly (clang, -O0):
<funcHashExpressions_DEFAULT>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1147 <funcHashExpressions_DEFAULT+0x47>
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movzbl (%rcx),%ecx
add    %rcx,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <funcHashExpressions_DEFAULT+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcHashExpressions_DEFAULT>:
mov    (%rdi),%cl
test   %cl,%cl
je     113c <funcHashExpressions_DEFAULT+0x3c>
add    $0x1,%rdi
mov    $0x1505,%edx
mov    %rdx,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl %cl,%ecx
shl    $0x5,%rax
add    %rdx,%rax
add    %rcx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
mov    %rax,%rdx
test   %cl,%cl
jne    1120 <funcHashExpressions_DEFAULT+0x20>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @funcHashExpressions_DEFAULT(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %4
%9 = load i64, i64* %3
%10 = shl i64 %9, 5
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
%13 = load i8, i8* %11
%14 = zext i8 %13 to i64
%15 = add i64 %10, %14
%16 = load i64, i64* %3
%17 = add i64 %16, %15
store i64 %17, i64* %3
br label %4
18: ; preds = %4
%19 = load i64, i64* %3
ret i64 %19
}

LLVM IR (-O2):
define i64 @funcHashExpressions_DEFAULT(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i64 [ %11, %4 ], [ 5381, %1 ]
%7 = phi i8* [ %8, %4 ], [ %0, %1 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = zext i8 %5 to i64
%10 = mul i64 %6, 33
%11 = add i64 %10, %9
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i64 [ 5381, %1 ], [ %11, %4 ]
ret i64 %15
}
int test_imm_1Aint16_reg(short val) {
  return ((val) & (0x1A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_1Aint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x1a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_1Aint16_reg>:
test   $0x1a,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_1Aint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 26
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_1Aint16_reg(i16 signext %0) {
%2 = and i16 %0, 26
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int sweep_set_standard_start(int n, double *c) {
  int fail, ptos[2];
  ptos[0] = 0;
  ptos[1] = 0;
  fail = _ada_use_c2phc(618, ptos, &n, c);
  return fail;
}


x86 assembly (clang, -O0):
<sweep_set_standard_start>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x1c(%rbp)
movl   $0x0,-0x18(%rbp)
lea    -0x1c(%rbp),%rsi
mov    -0x10(%rbp),%rcx
mov    $0x26a,%edi
lea    -0x4(%rbp),%rdx
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sweep_set_standard_start>:
sub    $0x18,%rsp
mov    %rsi,%rcx
mov    %edi,0xc(%rsp)
movq   $0x0,0x10(%rsp)
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
mov    $0x26a,%edi
call   1030 <_ada_use_c2phc@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @sweep_set_standard_start(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca i32
%6 = alloca [2 x i32]
store i32 %0, i32* %3
store double* %1, double** %4
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
store i32 0, i32* %7
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 1
store i32 0, i32* %8
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
%10 = load double*, double** %4
%11 = call i32 @_ada_use_c2phc(i32 618, i32* %9, i32* %3, double* %10)
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @sweep_set_standard_start(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca [2 x i32]
store i32 %0, i32* %3
%5 = bitcast [2 x i32]* %4 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 0, i32* %6
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 0, i32* %7
%8 = call i32 @_ada_use_c2phc(i32 618, i32* %6, i32* %3, double* %1)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ w_wait(int /*<<< orphan*/);
void m_line_destroyed(void) { w_wait(0); }


x86 assembly (clang, -O0):
<m_line_destroyed>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <w_wait@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_line_destroyed>:
xor    %edi,%edi
jmp    1030 <w_wait@plt>

LLVM IR (-O0):
define void @m_line_destroyed() {
%1 = call i32 @w_wait(i32 0)
ret void
}

LLVM IR (-O2):
define void @m_line_destroyed() {
%1 = tail call i32 @w_wait(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ POP();
int /*<<< orphan*/ PUSH(int /*<<< orphan*/);
scalar_t__ cell2pointer(int /*<<< orphan*/);
int /*<<< orphan*/ unaligned_read_word(unsigned char const *);
void unalignedwordread(void) {
  const unsigned char *addr = (const unsigned char *)cell2pointer(POP());
  PUSH(unaligned_read_word(addr));
}


x86 assembly (clang, -O0):
<unalignedwordread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <POP@plt>
mov    %eax,%edi
call   1030 <cell2pointer@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <unaligned_read_word@plt>
mov    %eax,%edi
call   1050 <PUSH@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unalignedwordread>:
push   %rax
xor    %eax,%eax
call   1040 <POP@plt>
mov    %eax,%edi
call   1030 <cell2pointer@plt>
mov    %rax,%rdi
call   1060 <unaligned_read_word@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <PUSH@plt>

LLVM IR (-O0):
define void @unalignedwordread() {
%1 = alloca i8*
%2 = call i32 (...) @POP()
%3 = call i64 @cell2pointer(i32 %2)
%4 = inttoptr i64 %3 to i8*
store i8* %4, i8** %1
%5 = load i8*, i8** %1
%6 = call i32 @unaligned_read_word(i8* %5)
%7 = call i32 @PUSH(i32 %6)
ret void
}

LLVM IR (-O2):
define void @unalignedwordread() {
%1 = tail call i32 (...) @POP()
%2 = tail call i64 @cell2pointer(i32 %1)
%3 = inttoptr i64 %2 to i8*
%4 = tail call i32 @unaligned_read_word(i8* %3)
%5 = tail call i32 @PUSH(i32 %4)
ret void
}
void RTTestInitAndCreate(void) {}


x86 assembly (clang, -O0):
<RTTestInitAndCreate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTTestInitAndCreate>:
ret

LLVM IR (-O0):
define void @RTTestInitAndCreate() {
ret void
}

LLVM IR (-O2):
define void @RTTestInitAndCreate() {
ret void
}
/* Variables and functions */
void *utf8dup_ex(void const *, int /*<<< orphan*/, int /*<<< orphan*/);
void *utf8dup(const void *src) { return utf8dup_ex(src, 0, 0); }


x86 assembly (clang, -O0):
<utf8dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <utf8dup_ex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf8dup>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <utf8dup_ex@plt>

LLVM IR (-O0):
define i8* @utf8dup(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @utf8dup_ex(i8* %3, i32 0, i32 0)
ret i8* %4
}

LLVM IR (-O2):
define i8* @utf8dup(i8* %0) {
%2 = tail call i8* @utf8dup_ex(i8* %0, i32 0, i32 0)
ret i8* %2
}
/* Type definitions */
typedef int __u32;

/* Variables and functions */
int test_bit(unsigned int nr, const void *addr) {
  const __u32 *p = (const __u32 *)addr;
  nr = nr ^ 0;
  return ((1 << (nr & 31)) & (p[nr >> 5])) != 0;
}


x86 assembly (clang, -O0):
<test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
xor    $0x0,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
and    $0x1f,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    -0x18(%rbp),%rcx
mov    -0x4(%rbp),%edx
shr    $0x5,%edx
mov    %edx,%edx
and    (%rcx,%rdx,4),%eax
cmp    $0x0,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bit>:
mov    %edi,%ecx
mov    %edi,%eax
shr    $0x5,%eax
mov    (%rsi,%rax,4),%eax
shr    %cl,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @test_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32*
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* %3
%9 = xor i32 %8, 0
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = and i32 %10, 31
%12 = shl i32 1, %11
%13 = load i32*, i32** %5
%14 = load i32, i32* %3
%15 = lshr i32 %14, 5
%16 = zext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %13, i64 %16
%18 = load i32, i32* %17
%19 = and i32 %12, %18
%20 = icmp ne i32 %19, 0
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @test_bit(i32 %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = and i32 %0, 31
%5 = lshr i32 %0, 5
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i32, i32* %3, i64 %6
%8 = load i32, i32* %7
%9 = lshr i32 %8, %4
%10 = and i32 %9, 1
ret i32 %10
}
void USB_Suspend_Event(void) {}


x86 assembly (clang, -O0):
<USB_Suspend_Event>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<USB_Suspend_Event>:
ret

LLVM IR (-O0):
define void @USB_Suspend_Event() {
ret void
}

LLVM IR (-O2):
define void @USB_Suspend_Event() {
ret void
}
void _Jv_MonitorEnter() {}


x86 assembly (clang, -O0):
<_Jv_MonitorEnter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Jv_MonitorEnter>:
ret

LLVM IR (-O0):
define void @_Jv_MonitorEnter() {
ret void
}

LLVM IR (-O2):
define void @_Jv_MonitorEnter() {
ret void
}
/* Type definitions */
struct vnic_rq {
  int dummy;
};

/* Variables and functions */
int fnic_rq_desc_avail(struct vnic_rq *);
int stub1(struct vnic_rq *);
int fnic_rq_fill(struct vnic_rq *rq, int (*buf_fill)(struct vnic_rq *rq)) {
  int err;
  while (fnic_rq_desc_avail(rq) > 1) {
    err = (*buf_fill)(rq);
    if (err) {
      return err;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<fnic_rq_fill>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <fnic_rq_desc_avail@plt>
cmp    $0x1,%eax
jle    1159 <fnic_rq_fill+0x49>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rdi
call   *%rax
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1154 <fnic_rq_fill+0x44>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1160 <fnic_rq_fill+0x50>
jmp    1120 <fnic_rq_fill+0x10>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fnic_rq_fill>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
nopw   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <fnic_rq_desc_avail@plt>
cmp    $0x2,%eax
jl     1139 <fnic_rq_fill+0x29>
mov    %rbx,%rdi
call   *%r14
test   %eax,%eax
je     1120 <fnic_rq_fill+0x10>
jmp    113b <fnic_rq_fill+0x2b>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.vnic_rq = type { i32 }
define i32 @fnic_rq_fill(%struct.vnic_rq* %0, i32 (%struct.vnic_rq*)* %1) {
%3 = alloca i32
%4 = alloca %struct.vnic_rq*
%5 = alloca i32 (%struct.vnic_rq*)*
%6 = alloca i32
store %struct.vnic_rq* %0, %struct.vnic_rq** %4
store i32 (%struct.vnic_rq*)* %1, i32 (%struct.vnic_rq*)** %5
br label %7
7: ; preds = %19, %2
%8 = load %struct.vnic_rq*, %struct.vnic_rq** %4
%9 = call i32 @fnic_rq_desc_avail(%struct.vnic_rq* %8)
%10 = icmp sgt i32 %9, 1
br i1 %10, label %11, label %20
11: ; preds = %7
%12 = load i32 (%struct.vnic_rq*)*, i32 (%struct.vnic_rq*)** %5
%13 = load %struct.vnic_rq*, %struct.vnic_rq** %4
%14 = call i32 %12(%struct.vnic_rq* %13)
store i32 %14, i32* %6
%15 = load i32, i32* %6
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %11
%18 = load i32, i32* %6
store i32 %18, i32* %3
br label %21
19: ; preds = %11
br label %7
20: ; preds = %7
store i32 0, i32* %3
br label %21
21: ; preds = %20, %17
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
%struct.vnic_rq = type { i32 }
define i32 @fnic_rq_fill(%struct.vnic_rq* %0, i32 (%struct.vnic_rq*)* nocapture %1) {
br label %3
3: ; preds = %6, %2
%4 = tail call i32 @fnic_rq_desc_avail(%struct.vnic_rq* %0)
%5 = icmp sgt i32 %4, 1
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i32 %1(%struct.vnic_rq* %0)
%8 = icmp eq i32 %7, 0
br i1 %8, label %3, label %9
9: ; preds = %3, %6
%10 = phi i32 [ %7, %6 ], [ 0, %3 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ _BIOS_RET();
void _BIOS_LISTST() { _BIOS_RET(); }


x86 assembly (clang, -O0):
<_BIOS_LISTST>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_BIOS_RET@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_BIOS_LISTST>:
xor    %eax,%eax
jmp    1030 <_BIOS_RET@plt>

LLVM IR (-O0):
define void @_BIOS_LISTST() {
%1 = call i32 (...) @_BIOS_RET()
ret void
}

LLVM IR (-O2):
define void @_BIOS_LISTST() {
%1 = tail call i32 (...) @_BIOS_RET()
ret void
}
void _exit(int i) {
  (void)i;
  for (;;)
    ;
}


x86 assembly (clang, -O0):
<_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <_exit+0x7>

x86 assembly (clang, -O2):
<_exit>:
jmp    1100 <_exit>

LLVM IR (-O0):
define void @_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
br label %4
4: ; preds = %4, %1
br label %4
}

LLVM IR (-O2):
define void @_exit(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
int main() {
  int x[2];
  int *p;
  x[1] = 7;
  p = &x[0];
  p = p + 1;
  if (*p != 7)
    return 1;
  if (&x[1] - &x[0] != 1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x7,-0x8(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpl   $0x7,(%rax)
je     113f <main+0x3f>
movl   $0x1,-0x4(%rbp)
jmp    1146 <main+0x46>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [2 x i32]
%3 = alloca i32*
store i32 0, i32* %1
%4 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 1
store i32 7, i32* %4
%5 = getelementptr inbounds [2 x i32], [2 x i32]* %2, i64 0, i64 0
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 1
store i32* %7, i32** %3
%8 = load i32*, i32** %3
%9 = load i32, i32* %8
%10 = icmp ne i32 %9, 7
br i1 %10, label %11, label %12
11: ; preds = %0
store i32 1, i32* %1
br label %13
12: ; preds = %0
store i32 0, i32* %1
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Type definitions */
typedef int u_int;

/* Variables and functions */
#define AF_INET 129
#define AF_INET6 128
int masklen_valid(int af, u_int masklen) {
  switch (af) {
  case AF_INET:
    return masklen <= 32 ? 0 : -1;
  case AF_INET6:
    return masklen <= 128 ? 0 : -1;
  default:
    return -1;
  }
}


x86 assembly (clang, -O0):
<masklen_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
sub    $0x80,%eax
je     114b <masklen_valid+0x4b>
jmp    1120 <masklen_valid+0x20>
mov    -0x10(%rbp),%eax
sub    $0x81,%eax
jne    1166 <masklen_valid+0x66>
jmp    1133 <masklen_valid+0x33>
mov    -0xc(%rbp),%edx
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    $0x20,%edx
cmovle %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    116d <masklen_valid+0x6d>
mov    -0xc(%rbp),%edx
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    $0x80,%edx
cmovle %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    116d <masklen_valid+0x6d>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<masklen_valid>:
cmp    $0x80,%edi
je     111c <masklen_valid+0x1c>
mov    $0xffffffff,%eax
cmp    $0x81,%edi
jne    1129 <masklen_valid+0x29>
xor    %eax,%eax
cmp    $0x21,%esi
jmp    1124 <masklen_valid+0x24>
xor    %eax,%eax
cmp    $0x81,%esi
setge  %al
neg    %eax
ret

LLVM IR (-O0):
define i32 @masklen_valid(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
switch i32 %6, label %17 [
i32 129, label %7
i32 128, label %12
]
7: ; preds = %2
%8 = load i32, i32* %5
%9 = icmp sle i32 %8, 32
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 0, i32 -1
store i32 %11, i32* %3
br label %18
12: ; preds = %2
%13 = load i32, i32* %5
%14 = icmp sle i32 %13, 128
%15 = zext i1 %14 to i64
%16 = select i1 %14, i32 0, i32 -1
store i32 %16, i32* %3
br label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %18
18: ; preds = %17, %12, %7
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @masklen_valid(i32 %0, i32 %1) {
switch i32 %0, label %9 [
i32 129, label %3
i32 128, label %6
]
3: ; preds = %2
%4 = icmp sgt i32 %1, 32
%5 = sext i1 %4 to i32
br label %9
6: ; preds = %2
%7 = icmp sgt i32 %1, 128
%8 = sext i1 %7 to i32
br label %9
9: ; preds = %2, %6, %3
%10 = phi i32 [ %8, %6 ], [ %5, %3 ], [ -1, %2 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ gen_call(char *);
void gen_logical_negation(void) { gen_call("_lneg"); }


x86 assembly (clang, -O0):
<gen_logical_negation>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gen_call@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_logical_negation>:
lea    0xee9(%rip),%rdi
jmp    1030 <gen_call@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"_lneg\00"
define void @gen_logical_negation() {
%1 = call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"_lneg\00"
define void @gen_logical_negation() {
%1 = tail call i32 @gen_call(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ native_io_delay();
void slow_down_io(void) { native_io_delay(); }


x86 assembly (clang, -O0):
<slow_down_io>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <native_io_delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<slow_down_io>:
xor    %eax,%eax
jmp    1030 <native_io_delay@plt>

LLVM IR (-O0):
define void @slow_down_io() {
%1 = call i32 (...) @native_io_delay()
ret void
}

LLVM IR (-O2):
define void @slow_down_io() {
%1 = tail call i32 (...) @native_io_delay()
ret void
}
void *HadTu_begin(const void *my) { return (void *)my; }


x86 assembly (clang, -O0):
<HadTu_begin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HadTu_begin>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @HadTu_begin(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @HadTu_begin(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
int homo_ch_cmpV(double **, double **, int);
int homo_ch_cmp(double A[3][4], double B[3][4]) {
  return homo_ch_cmpV(A, B, 1e-10);
}


x86 assembly (clang, -O0):
<homo_ch_cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <homo_ch_cmpV@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<homo_ch_cmp>:
xor    %edx,%edx
jmp    1030 <homo_ch_cmpV@plt>

LLVM IR (-O0):
define i32 @homo_ch_cmp([4 x double]* %0, [4 x double]* %1) {
%3 = alloca [4 x double]*
%4 = alloca [4 x double]*
store [4 x double]* %0, [4 x double]** %3
store [4 x double]* %1, [4 x double]** %4
%5 = load [4 x double]*, [4 x double]** %3
%6 = bitcast [4 x double]* %5 to double**
%7 = load [4 x double]*, [4 x double]** %4
%8 = bitcast [4 x double]* %7 to double**
%9 = call i32 @homo_ch_cmpV(double** %6, double** %8, i32 0)
ret i32 %9
}

LLVM IR (-O2):
define i32 @homo_ch_cmp([4 x double]* %0, [4 x double]* %1) {
%3 = bitcast [4 x double]* %0 to double**
%4 = bitcast [4 x double]* %1 to double**
%5 = tail call i32 @homo_ch_cmpV(double** %3, double** %4, i32 0)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void roaring_bitmap_aligned_free(void *memblock) { free(memblock); }


x86 assembly (clang, -O0):
<roaring_bitmap_aligned_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roaring_bitmap_aligned_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @roaring_bitmap_aligned_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @roaring_bitmap_aligned_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
scalar_t__ __isnanf(float);
scalar_t__ isgreaterequal(float, float);
float fmaxf(float _x, float _y) {
  return ((isgreaterequal(_x, _y) || __isnanf(_y)) ? _x : _y);
}


x86 assembly (clang, -O0):
<fmaxf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1040 <isgreaterequal@plt>
cmp    $0x0,%rax
jne    115f <fmaxf+0x3f>
movss  -0x8(%rbp),%xmm0
call   1030 <__isnanf@plt>
cmp    $0x0,%rax
je     116e <fmaxf+0x4e>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1178 <fmaxf+0x58>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmaxf>:
push   %rax
movss  %xmm0,0x4(%rsp)
movss  %xmm1,(%rsp)
call   1040 <isgreaterequal@plt>
test   %rax,%rax
je     113e <fmaxf+0x1e>
movss  0x4(%rsp),%xmm0
pop    %rax
ret
movss  (%rsp),%xmm0
call   1030 <__isnanf@plt>
test   %rax,%rax
je     1158 <fmaxf+0x38>
movss  0x4(%rsp),%xmm0
movss  %xmm0,(%rsp)
movss  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @fmaxf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call i64 @isgreaterequal(float %5, float %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %2
%10 = load float, float* %4
%11 = call i64 @__isnanf(float %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %9, %2
%14 = load float, float* %3
br label %17
15: ; preds = %9
%16 = load float, float* %4
br label %17
17: ; preds = %15, %13
%18 = phi float [ %14, %13 ], [ %16, %15 ]
ret float %18
}

LLVM IR (-O2):
define float @fmaxf(float %0, float %1) {
%3 = tail call i64 @isgreaterequal(float %0, float %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = tail call i64 @__isnanf(float %1)
%7 = icmp eq i64 %6, 0
%8 = select i1 %7, float %1, float %0
br label %9
9: ; preds = %5, %2
%10 = phi float [ %0, %2 ], [ %8, %5 ]
ret float %10
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isbdigit(int);
void t_isbdigit_0xb5() {
  Assert_real((isbdigit(181) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isbdigit.c",
              910, ("isbdigit should be 0 for 0xb5"));
}


x86 assembly (clang, -O0):
<t_isbdigit_0xb5>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb5,%edi
call   1040 <isbdigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x38e,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isbdigit_0xb5>:
push   %rax
mov    $0xb5,%edi
call   1040 <isbdigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x38e,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xb5\00"
define void @t_isbdigit_0xb5() {
%1 = call i64 @isbdigit(i32 181)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 910, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isbdigit.c\00"
@.str.1 = [30 x i8] c"isbdigit should be 0 for 0xb5\00"
define void @t_isbdigit_0xb5() {
%1 = tail call i64 @isbdigit(i32 181)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 910, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ SSL;

/* Variables and functions */
int SSL_write(int /*<<< orphan*/ *, char *, int);
int write(int, char *, int);
int ssl_or_tcp_write(SSL *ssl, int sock, char *buf, int n) {
  if (sock) {
    return write(sock, buf, n);
  } else {
    return SSL_write(ssl, buf, n);
  }
}


x86 assembly (clang, -O0):
<ssl_or_tcp_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1157 <ssl_or_tcp_write+0x37>
mov    -0x14(%rbp),%edi
mov    -0x20(%rbp),%rsi
mov    -0x24(%rbp),%edx
call   1040 <write@plt>
mov    %eax,-0x4(%rbp)
jmp    116a <ssl_or_tcp_write+0x4a>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x24(%rbp),%edx
call   1030 <SSL_write@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssl_or_tcp_write>:
test   %esi,%esi
je     1130 <ssl_or_tcp_write+0x10>
mov    %esi,%edi
mov    %rdx,%rsi
mov    %ecx,%edx
jmp    1040 <write@plt>
mov    %rdx,%rsi
mov    %ecx,%edx
jmp    1030 <SSL_write@plt>

LLVM IR (-O0):
define i32 @ssl_or_tcp_write(i32* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
%10 = load i32, i32* %7
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %4
%13 = load i32, i32* %7
%14 = load i8*, i8** %8
%15 = load i32, i32* %9
%16 = call i32 @write(i32 %13, i8* %14, i32 %15)
store i32 %16, i32* %5
br label %22
17: ; preds = %4
%18 = load i32*, i32** %6
%19 = load i8*, i8** %8
%20 = load i32, i32* %9
%21 = call i32 @SSL_write(i32* %18, i8* %19, i32 %20)
store i32 %21, i32* %5
br label %22
22: ; preds = %17, %12
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @ssl_or_tcp_write(i32* %0, i32 %1, i8* %2, i32 %3) {
%5 = icmp eq i32 %1, 0
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @write(i32 %1, i8* %2, i32 %3)
br label %10
8: ; preds = %4
%9 = tail call i32 @SSL_write(i32* %0, i8* %2, i32 %3)
br label %10
10: ; preds = %8, %6
%11 = phi i32 [ %7, %6 ], [ %9, %8 ]
ret i32 %11
}
/* Variables and functions */
size_t __fs_MAX(size_t a, size_t b) {
  if (a > b) {
    return a;
  } else {
    return b;
  }
}


x86 assembly (clang, -O0):
<__fs_MAX>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jbe    1127 <__fs_MAX+0x27>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    112f <__fs_MAX+0x2f>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__fs_MAX>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmova  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @__fs_MAX(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %4
%7 = load i64, i64* %5
%8 = icmp ugt i64 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i64, i64* %4
store i64 %10, i64* %3
br label %13
11: ; preds = %2
%12 = load i64, i64* %5
store i64 %12, i64* %3
br label %13
13: ; preds = %11, %9
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @__fs_MAX(i64 %0, i64 %1) {
%3 = icmp ugt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void main(void) { printf("hello world!\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"hello world!\0A\00"
define void @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [13 x i8] c"hello world!\00"
define void @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret void
}
unsigned long long int
unsignedlonglongint_ignoring_unsignedlong(unsigned long long int x,
                                          unsigned long y) {
  return x;
}


x86 assembly (clang, -O0):
<unsignedlonglongint_ignoring_unsignedlong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsignedlonglongint_ignoring_unsignedlong>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @unsignedlonglongint_ignoring_unsignedlong(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @unsignedlonglongint_ignoring_unsignedlong(i64 returned %0, i64 %1) {
ret i64 %0
}
/* Variables and functions */
size_t SIZE_MAX;
int /*<<< orphan*/ assert(int /*<<< orphan*/);
bool CheckedAddSizeT(size_t addend0, size_t addend1, size_t *sum) {
  assert(sum != NULL);
  if (SIZE_MAX - addend0 < addend1) {
    return false;
  }
  *sum = addend0 + addend1;
  return true;
}


x86 assembly (clang, -O0):
<CheckedAddSizeT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%rax
sub    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    115a <CheckedAddSizeT+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    1170 <CheckedAddSizeT+0x60>
mov    -0x10(%rbp),%rcx
add    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckedAddSizeT>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rdi,%r15
xor    %edi,%edi
test   %rdx,%rdx
setne  %dil
call   1030 <assert@plt>
mov    0x2ea5(%rip),%rax
mov    (%rax),%rcx
sub    %r15,%rcx
xor    %eax,%eax
cmp    %rbx,%rcx
jb     114b <CheckedAddSizeT+0x3b>
add    %r15,%rbx
mov    %rbx,(%r14)
mov    $0x1,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@SIZE_MAX = global i64 0
define i32 @CheckedAddSizeT(i64 %0, i64 %1, i64* %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64*
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64* %2, i64** %7
%8 = load i64*, i64** %7
%9 = icmp ne i64* %8, null
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
%12 = load i64, i64* @SIZE_MAX
%13 = load i64, i64* %5
%14 = sub i64 %12, %13
%15 = load i64, i64* %6
%16 = icmp ult i64 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %3
store i32 0, i32* %4
br label %23
18: ; preds = %3
%19 = load i64, i64* %5
%20 = load i64, i64* %6
%21 = add i64 %19, %20
%22 = load i64*, i64** %7
store i64 %21, i64* %22
store i32 1, i32* %4
br label %23
23: ; preds = %18, %17
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
@SIZE_MAX = global i64 0
define i32 @CheckedAddSizeT(i64 %0, i64 %1, i64* writeonly %2) {
%4 = icmp ne i64* %2, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
%7 = load i64, i64* @SIZE_MAX
%8 = sub i64 %7, %0
%9 = icmp ult i64 %8, %1
br i1 %9, label %12, label %10
10: ; preds = %3
%11 = add i64 %1, %0
store i64 %11, i64* %2
br label %12
12: ; preds = %3, %10
%13 = phi i32 [ 1, %10 ], [ 0, %3 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ decodeSprite(int, int, int, char *);
void decodeSprites() { decodeSprite(31, 184, 8, "jag_sprites"); }


x86 assembly (clang, -O0):
<decodeSprites>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1f,%edi
mov    $0xb8,%esi
mov    $0x8,%edx
lea    0xed6(%rip),%rcx
call   1030 <decodeSprite@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<decodeSprites>:
lea    0xee9(%rip),%rcx
mov    $0x1f,%edi
mov    $0xb8,%esi
mov    $0x8,%edx
jmp    1030 <decodeSprite@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"jag_sprites\00"
define void @decodeSprites() {
%1 = call i32 @decodeSprite(i32 31, i32 184, i32 8, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"jag_sprites\00"
define void @decodeSprites() {
%1 = tail call i32 @decodeSprite(i32 31, i32 184, i32 8, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret void
}
void ASN_DEBUG(const char *fmt, ...) { (void)fmt; }


x86 assembly (clang, -O0):
<ASN_DEBUG>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN_DEBUG>:
ret

LLVM IR (-O0):
define void @ASN_DEBUG(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @ASN_DEBUG(i8* nocapture %0, ...) {
ret void
}
int suma(int a, int b) {
  int total = a + b;
  a = a + 10;
  b = b - 10;
  return total;
}


x86 assembly (clang, -O0):
<suma>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
sub    $0xa,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<suma>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @suma(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 10
store i32 %10, i32* %3
%11 = load i32, i32* %4
%12 = sub nsw i32 %11, 10
store i32 %12, i32* %4
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
define i32 @suma(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
int main(void) { return -42; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0xffffffd6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xffffffd6,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 -42
}

LLVM IR (-O2):
define i32 @main() {
ret i32 -42
}
/* Variables and functions */
int /*<<< orphan*/ foo(int *);
int /*<<< orphan*/ xxx(int *);
int /*<<< orphan*/ yyy(int **);
int main() {
  int **q;
  foo(*q + 12);
  xxx(q[0] + 12);
  yyy(q + 12);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
add    $0x30,%rdi
call   1040 <foo@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
add    $0x30,%rdi
call   1030 <xxx@plt>
mov    -0x8(%rbp),%rdi
add    $0x60,%rdi
call   1050 <yyy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1040 <foo@plt>
call   1030 <xxx@plt>
call   1050 <yyy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32**
%2 = load i32**, i32*** %1
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 12
%5 = call i32 @foo(i32* %4)
%6 = load i32**, i32*** %1
%7 = getelementptr inbounds i32*, i32** %6, i64 0
%8 = load i32*, i32** %7
%9 = getelementptr inbounds i32, i32* %8, i64 12
%10 = call i32 @xxx(i32* %9)
%11 = load i32**, i32*** %1
%12 = getelementptr inbounds i32*, i32** %11, i64 12
%13 = call i32 @yyy(i32** %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32* poison)
%2 = tail call i32 @xxx(i32* poison)
%3 = tail call i32 @yyy(i32** poison)
ret i32 0
}
/* Variables and functions */
scalar_t__ isupper(int);
int tolower(int c) { return (isupper(c) ? (c + 32) : c); }


x86 assembly (clang, -O0):
<tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
je     113b <tolower+0x2b>
mov    -0x4(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x8(%rbp)
jmp    1141 <tolower+0x31>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tolower>:
push   %rbx
mov    %edi,%ebx
call   1030 <isupper@plt>
lea    0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @tolower(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isupper(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 32
br label %11
9: ; preds = %1
%10 = load i32, i32* %2
br label %11
11: ; preds = %9, %6
%12 = phi i32 [ %8, %6 ], [ %10, %9 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @tolower(i32 %0) {
%2 = tail call i64 @isupper(i32 %0)
%3 = icmp eq i64 %2, 0
%4 = add nsw i32 %0, 32
%5 = select i1 %3, i32 %0, i32 %4
ret i32 %5
}
int harmless(void) { return (0); }


x86 assembly (clang, -O0):
<harmless>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<harmless>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @harmless() {
ret i32 0
}

LLVM IR (-O2):
define i32 @harmless() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_tagstruct_gets() {
  printf("NOT IMPLEMENTED:"
         "pa_tagstruct_gets"
         "\n");
}


x86 assembly (clang, -O0):
<pa_tagstruct_gets>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_tagstruct_gets>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"NOT IMPLEMENTED:pa_tagstruct_gets\0A\00"
define i32 @pa_tagstruct_gets() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [34 x i8] c"NOT IMPLEMENTED:pa_tagstruct_gets\00"
define i32 @pa_tagstruct_gets() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
void termop_vt52(struct ansiseq *s) {
  tnc_log_log(
      6, 4, -1,
      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/vt100.c",
      216, __func__, "unhandled");
  ansiseq_dump(s);
}


x86 assembly (clang, -O0):
<termop_vt52>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x6,%edi
mov    $0x4,%esi
mov    $0xffffffff,%edx
lea    0xebe(%rip),%rcx
mov    $0xd8,%r8d
lea    0xf37(%rip),%r9
lea    0xf3c(%rip),%rax
mov    %rax,(%rsp)
mov    $0x0,%al
call   1030 <tnc_log_log@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <ansiseq_dump@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<termop_vt52>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0xf63(%rip),%rax
mov    %rax,(%rsp)
lea    0xec6(%rip),%rcx
lea    0xf45(%rip),%r9
mov    $0x6,%edi
mov    $0x4,%esi
mov    $0xffffffff,%edx
mov    $0xd8,%r8d
xor    %eax,%eax
call   1030 <tnc_log_log@plt>
mov    %rbx,%rdi
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <ansiseq_dump@plt>

LLVM IR (-O0):
%struct.ansiseq = type opaque
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/vt100.c\00"
@__func__.termop_vt52 = [12 x i8] c"termop_vt52\00"
@.str.1 = [10 x i8] c"unhandled\00"
define void @termop_vt52(%struct.ansiseq* %0) {
%2 = alloca %struct.ansiseq*
store %struct.ansiseq* %0, %struct.ansiseq** %2
%3 = call i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @tnc_log_log to i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...)*)(i32 6, i32 4, i32 -1, i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 216, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__func__.termop_vt52, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%4 = load %struct.ansiseq*, %struct.ansiseq** %2
%5 = call i32 (%struct.ansiseq*, ...) bitcast (i32 (...)* @ansiseq_dump to i32 (%struct.ansiseq*, ...)*)(%struct.ansiseq* %4)
ret void
}

LLVM IR (-O2):
%struct.ansiseq = type opaque
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/vt100.c\00"
@__func__.termop_vt52 = [12 x i8] c"termop_vt52\00"
@.str.1 = [10 x i8] c"unhandled\00"
define void @termop_vt52(%struct.ansiseq* %0) {
%2 = tail call i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @tnc_log_log to i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...)*)(i32 6, i32 4, i32 -1, i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 216, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__func__.termop_vt52, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 (%struct.ansiseq*, ...) bitcast (i32 (...)* @ansiseq_dump to i32 (%struct.ansiseq*, ...)*)(%struct.ansiseq* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  (void)fprintf(stderr, "usage: xargs [-t0] [[-x] -n number] [-s size] "
                        "[utility [argument ...]]\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [72 x i8] c"usage: xargs [-t0] [[-x] -n number] [-s size] [utility [argument ...]]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([72 x i8], [72 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [72 x i8] c"usage: xargs [-t0] [[-x] -n number] [-s size] [utility [argument ...]]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([72 x i8], [72 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}