xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint16_t;
struct pcg_state_32 {
  int dummy;
};

/* Variables and functions */
int pcg_mcg_32_xsh_rs_16_random_r(struct pcg_state_32 *);
uint16_t pcg_mcg_32_xsh_rs_16_boundedrand_r(struct pcg_state_32 *rng,
                                            uint16_t bound) {
  uint16_t threshold = ((uint16_t)(-bound)) % bound;
  for (;;) {
    uint16_t r = pcg_mcg_32_xsh_rs_16_random_r(rng);
    if (r >= threshold)
      return r % bound;
  }
}


x86 assembly (clang, -O0):
<pcg_mcg_32_xsh_rs_16_boundedrand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
sub    -0xc(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pcg_mcg_32_xsh_rs_16_random_r@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jl     1152 <pcg_mcg_32_xsh_rs_16_boundedrand_r+0x42>
mov    -0x14(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
add    $0x20,%rsp
pop    %rbp
ret
jmp    112b <pcg_mcg_32_xsh_rs_16_boundedrand_r+0x1b>

x86 assembly (clang, -O2):
<pcg_mcg_32_xsh_rs_16_boundedrand_r>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <pcg_mcg_32_xsh_rs_16_random_r@plt>
test   %eax,%eax
js     1120 <pcg_mcg_32_xsh_rs_16_boundedrand_r+0x10>
cltd
idiv   %ebp
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.pcg_state_32 = type { i32 }
define i32 @pcg_mcg_32_xsh_rs_16_boundedrand_r(%struct.pcg_state_32* %0, i32 %1) {
%3 = alloca %struct.pcg_state_32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store %struct.pcg_state_32* %0, %struct.pcg_state_32** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = sub nsw i32 0, %7
%9 = load i32, i32* %4
%10 = srem i32 %8, %9
store i32 %10, i32* %5
br label %11
11: ; preds = %21, %2
%12 = load %struct.pcg_state_32*, %struct.pcg_state_32** %3
%13 = call i32 @pcg_mcg_32_xsh_rs_16_random_r(%struct.pcg_state_32* %12)
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = load i32, i32* %5
%16 = icmp sge i32 %14, %15
br i1 %16, label %17, label %21
17: ; preds = %11
%18 = load i32, i32* %6
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
ret i32 %20
21: ; preds = %11
br label %11
}

LLVM IR (-O2):
%struct.pcg_state_32 = type { i32 }
define i32 @pcg_mcg_32_xsh_rs_16_boundedrand_r(%struct.pcg_state_32* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @pcg_mcg_32_xsh_rs_16_random_r(%struct.pcg_state_32* %0)
%5 = icmp sgt i32 %4, -1
br i1 %5, label %6, label %3
6: ; preds = %3
%7 = srem i32 %4, %1
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ LedsP__Leds__led2Toggle();
void OscilloscopeC__Leds__led2Toggle(void) { LedsP__Leds__led2Toggle(); }


x86 assembly (clang, -O0):
<OscilloscopeC__Leds__led2Toggle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <LedsP__Leds__led2Toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OscilloscopeC__Leds__led2Toggle>:
xor    %eax,%eax
jmp    1030 <LedsP__Leds__led2Toggle@plt>

LLVM IR (-O0):
define void @OscilloscopeC__Leds__led2Toggle() {
%1 = call i32 (...) @LedsP__Leds__led2Toggle()
ret void
}

LLVM IR (-O2):
define void @OscilloscopeC__Leds__led2Toggle() {
%1 = tail call i32 (...) @LedsP__Leds__led2Toggle()
ret void
}
void rc6_advance_pulse(unsigned *buf, unsigned *n, unsigned length) {
  if (*n % 2)
    buf[++(*n)] = length;
  else
    buf[*n] += length;
}


x86 assembly (clang, -O0):
<rc6_advance_pulse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     113d <rc6_advance_pulse+0x3d>
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rsi
mov    (%rsi),%ecx
add    $0x1,%ecx
mov    %ecx,(%rsi)
mov    %ecx,%ecx
mov    %edx,(%rax,%rcx,4)
jmp    1150 <rc6_advance_pulse+0x50>
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rcx),%ecx
add    (%rax,%rcx,4),%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rc6_advance_pulse>:
mov    (%rsi),%eax
test   $0x1,%al
jne    110a <rc6_advance_pulse+0xa>
add    %edx,(%rdi,%rax,4)
ret
add    $0x1,%eax
mov    %eax,(%rsi)
mov    %edx,(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @rc6_advance_pulse(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %5
%8 = load i32, i32* %7
%9 = urem i32 %8, 2
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %3
%12 = load i32, i32* %6
%13 = load i32*, i32** %4
%14 = load i32*, i32** %5
%15 = load i32, i32* %14
%16 = add i32 %15, 1
store i32 %16, i32* %14
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %13, i64 %17
store i32 %12, i32* %18
br label %28
19: ; preds = %3
%20 = load i32, i32* %6
%21 = load i32*, i32** %4
%22 = load i32*, i32** %5
%23 = load i32, i32* %22
%24 = zext i32 %23 to i64
%25 = getelementptr inbounds i32, i32* %21, i64 %24
%26 = load i32, i32* %25
%27 = add i32 %26, %20
store i32 %27, i32* %25
br label %28
28: ; preds = %19, %11
ret void
}

LLVM IR (-O2):
define void @rc6_advance_pulse(i32* nocapture %0, i32* nocapture %1, i32 %2) {
%4 = load i32, i32* %1
%5 = and i32 %4, 1
%6 = icmp eq i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %3
%8 = add i32 %4, 1
store i32 %8, i32* %1
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %0, i64 %9
store i32 %2, i32* %10
br label %16
11: ; preds = %3
%12 = zext i32 %4 to i64
%13 = getelementptr inbounds i32, i32* %0, i64 %12
%14 = load i32, i32* %13
%15 = add i32 %14, %2
store i32 %15, i32* %13
br label %16
16: ; preds = %11, %7
ret void
}
struct s27 {
  struct {
    char a, b, c;
  } a;
  struct {
    char a;
  } b;
} f27(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<f27>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <f27+0x9>
jmp    1109 <f27+0x9>

x86 assembly (clang, -O2):
<f27>:
jmp    1100 <f27>

LLVM IR (-O0):
define i32 @f27() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define i32 @f27() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Type definitions */
struct fb_cmap {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ FBIOGETCMAP;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
scalar_t__ ioctl(int, int /*<<< orphan*/, struct fb_cmap *);
int /*<<< orphan*/ stderr;
void get8map(int fh, struct fb_cmap *map) {
  if (ioctl(fh, FBIOGETCMAP, map) < 0) {
    fprintf(stderr, "Error getting colormap");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<get8map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e9f(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
call   1030 <ioctl@plt>
cmp    $0x0,%rax
jge    117d <get8map+0x4d>
mov    0x2e73(%rip),%rax
mov    (%rax),%edi
lea    0xe92(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get8map>:
push   %rax
mov    %rsi,%rdx
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
call   1030 <ioctl@plt>
test   %rax,%rax
js     1149 <get8map+0x19>
pop    %rax
ret
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
lea    0xea7(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
%struct.fb_cmap = type { i32 }
@FBIOGETCMAP = global i32 0
@stderr = global i32 0
@.str = [23 x i8] c"Error getting colormap\00"
define void @get8map(i32 %0, %struct.fb_cmap* %1) {
%3 = alloca i32
%4 = alloca %struct.fb_cmap*
store i32 %0, i32* %3
store %struct.fb_cmap* %1, %struct.fb_cmap** %4
%5 = load i32, i32* %3
%6 = load i32, i32* @FBIOGETCMAP
%7 = load %struct.fb_cmap*, %struct.fb_cmap** %4
%8 = call i64 @ioctl(i32 %5, i32 %6, %struct.fb_cmap* %7)
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32, i32* @stderr
%12 = call i32 @fprintf(i32 %11, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%13 = call i32 @exit(i32 1)
unreachable
14: ; preds = %2
ret void
}

LLVM IR (-O2):
%struct.fb_cmap = type { i32 }
@FBIOGETCMAP = global i32 0
@stderr = global i32 0
@.str = [23 x i8] c"Error getting colormap\00"
define void @get8map(i32 %0, %struct.fb_cmap* %1) {
%3 = load i32, i32* @FBIOGETCMAP
%4 = tail call i64 @ioctl(i32 %0, i32 %3, %struct.fb_cmap* %1)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %2
%7 = load i32, i32* @stderr
%8 = tail call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%9 = tail call i32 @exit(i32 1)
unreachable
10: ; preds = %2
ret void
}
/* Variables and functions */
void *mem_alloc(size_t);
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void *mem_dupe(const void *mem, size_t size) {
  void *newAlloc = mem_alloc(size);
  memcpy(newAlloc, mem, size);
  return newAlloc;
}


x86 assembly (clang, -O0):
<mem_dupe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <mem_alloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_dupe>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <mem_alloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1030 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @mem_dupe(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
%7 = call i8* @mem_alloc(i64 %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = load i8*, i8** %3
%10 = load i64, i64* %4
%11 = call i32 @memcpy(i8* %8, i8* %9, i64 %10)
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
define i8* @mem_dupe(i8* %0, i64 %1) {
%3 = tail call i8* @mem_alloc(i64 %1)
%4 = tail call i32 @memcpy(i8* %3, i8* %0, i64 %1)
ret i8* %3
}
void qword_addeol(char **bpp, int *lp) {
  if (*lp <= 0)
    return;
  **bpp = '\n';
  (*bpp)++;
  (*lp)--;
}


x86 assembly (clang, -O0):
<qword_addeol>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
jg     111e <qword_addeol+0x1e>
jmp    1141 <qword_addeol+0x41>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movb   $0xa,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0xffffffff,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<qword_addeol>:
cmpl   $0x0,(%rsi)
jle    1112 <qword_addeol+0x12>
mov    (%rdi),%rax
movb   $0xa,(%rax)
addq   $0x1,(%rdi)
addl   $0xffffffff,(%rsi)
ret

LLVM IR (-O0):
define void @qword_addeol(i8** %0, i32* %1) {
%3 = alloca i8**
%4 = alloca i32*
store i8** %0, i8*** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32, i32* %5
%7 = icmp sle i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
br label %18
9: ; preds = %2
%10 = load i8**, i8*** %3
%11 = load i8*, i8** %10
store i8 10, i8* %11
%12 = load i8**, i8*** %3
%13 = load i8*, i8** %12
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %12
%15 = load i32*, i32** %4
%16 = load i32, i32* %15
%17 = add nsw i32 %16, -1
store i32 %17, i32* %15
br label %18
18: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
define void @qword_addeol(i8** nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 1
br i1 %4, label %11, label %5
5: ; preds = %2
%6 = load i8*, i8** %0
store i8 10, i8* %6
%7 = load i8*, i8** %0
%8 = getelementptr inbounds i8, i8* %7, i64 1
store i8* %8, i8** %0
%9 = load i32, i32* %1
%10 = add nsw i32 %9, -1
store i32 %10, i32* %1
br label %11
11: ; preds = %2, %5
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
float stdlib_strided_sdsnanmeanors(int /*<<< orphan*/ const, float const *,
                                   int /*<<< orphan*/ const);
float stdlib_strided_sdsnanmean(const int64_t N, const float *X,
                                const int64_t stride) {
  return stdlib_strided_sdsnanmeanors(N, X, stride);
}


x86 assembly (clang, -O0):
<stdlib_strided_sdsnanmean>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <stdlib_strided_sdsnanmeanors@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stdlib_strided_sdsnanmean>:
jmp    1030 <stdlib_strided_sdsnanmeanors@plt>

LLVM IR (-O0):
define float @stdlib_strided_sdsnanmean(i32 %0, float* %1, i32 %2) {
%4 = alloca i32
%5 = alloca float*
%6 = alloca i32
store i32 %0, i32* %4
store float* %1, float** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load float*, float** %5
%9 = load i32, i32* %6
%10 = call float @stdlib_strided_sdsnanmeanors(i32 %7, float* %8, i32 %9)
ret float %10
}

LLVM IR (-O2):
define float @stdlib_strided_sdsnanmean(i32 %0, float* %1, i32 %2) {
%4 = tail call float @stdlib_strided_sdsnanmeanors(i32 %0, float* %1, i32 %2)
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void afficheEtoile(int i) { printf("%d * * * \n", i); }


x86 assembly (clang, -O0):
<afficheEtoile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<afficheEtoile>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"%d * * * \0A\00"
define void @afficheEtoile(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"%d * * * \0A\00"
define void @afficheEtoile(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int CTRL_ATTR_MCAST_GROUPS;
void f(void) { int i = CTRL_ATTR_MCAST_GROUPS; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
@CTRL_ATTR_MCAST_GROUPS = global i32 0
define void @f() {
%1 = alloca i32
%2 = load i32, i32* @CTRL_ATTR_MCAST_GROUPS
store i32 %2, i32* %1
ret void
}

LLVM IR (-O2):
@CTRL_ATTR_MCAST_GROUPS = global i32 0
define void @f() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ lib2_func4();
void lib1_func3(void) { lib2_func4(); }


x86 assembly (clang, -O0):
<lib1_func3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <lib2_func4@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib1_func3>:
xor    %eax,%eax
jmp    1030 <lib2_func4@plt>

LLVM IR (-O0):
define void @lib1_func3() {
%1 = call i32 (...) @lib2_func4()
ret void
}

LLVM IR (-O2):
define void @lib1_func3() {
%1 = tail call i32 (...) @lib2_func4()
ret void
}
void ResetVideoHost(void) {
  *(volatile unsigned long *)((unsigned long)(0x1E6E0000) +
                              (unsigned long)(0x04 + 0x2000)) =
      (((*(volatile unsigned long *)((unsigned long)(0x1E6E0000) +
                                     (unsigned long)(0x04 + 0x2000))) &
        (~0x00000040)) |
       (unsigned long)((1 << 6) & (0x00000040)));
  *(volatile unsigned long *)((unsigned long)(0x1E6E0000) +
                              (unsigned long)(0x04 + 0x2000)) =
      (((*(volatile unsigned long *)((unsigned long)(0x1E6E0000) +
                                     (unsigned long)(0x04 + 0x2000))) &
        (~0x00000040)) |
       (unsigned long)((0 << 6) & (0x00000040)));
}


x86 assembly (clang, -O0):
<ResetVideoHost>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1e6e2004,%eax
mov    (%rax),%rcx
and    $0xffffffffffffffbf,%rcx
or     $0x40,%rcx
mov    $0x1e6e2004,%eax
mov    %rcx,(%rax)
mov    $0x1e6e2004,%eax
mov    (%rax),%rcx
and    $0xffffffffffffffbf,%rcx
or     $0x0,%rcx
mov    $0x1e6e2004,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ResetVideoHost>:
orq    $0x40,0x1e6e2004
1e 40
andq   $0xffffffffffffffbf,0x1e6e2004
1e bf
ret

LLVM IR (-O0):
define void @ResetVideoHost() {
%1 = load volatile i64, i64* inttoptr (i64 510533636 to i64*)
%2 = and i64 %1, -65
%3 = or i64 %2, 64
store volatile i64 %3, i64* inttoptr (i64 510533636 to i64*)
%4 = load volatile i64, i64* inttoptr (i64 510533636 to i64*)
%5 = and i64 %4, -65
%6 = or i64 %5, 0
store volatile i64 %6, i64* inttoptr (i64 510533636 to i64*)
ret void
}

LLVM IR (-O2):
define void @ResetVideoHost() {
%1 = load volatile i64, i64* inttoptr (i64 510533636 to i64*)
%2 = or i64 %1, 64
store volatile i64 %2, i64* inttoptr (i64 510533636 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 510533636 to i64*)
%4 = and i64 %3, -65
store volatile i64 %4, i64* inttoptr (i64 510533636 to i64*)
ret void
}
int test_imm_81uint64_highword_reg(unsigned long long val) {
  return ((val >> 32) & (0x81 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_81uint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x20,%rdx
and    $0x81,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_81uint64_highword_reg>:
movabs $0x8100000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_81uint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 32
%5 = and i64 %4, 129
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_81uint64_highword_reg(i64 %0) {
%2 = and i64 %0, 554050781184
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *malloc(int);
int /*<<< orphan*/ strncpy(char *, char *, int);
void cstringchecker_bounds_nocrash() {
  char *p = malloc(2);
  strncpy(p, "AAA", sizeof("AAA"));
  free(p);
}


x86 assembly (clang, -O0):
<cstringchecker_bounds_nocrash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x2,%edi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeaf(%rip),%rsi
mov    $0x4,%edx
call   1040 <strncpy@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cstringchecker_bounds_nocrash>:
push   %rbx
mov    $0x2,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
lea    0xebb(%rip),%rsi
mov    %rax,%rdi
mov    $0x4,%edx
call   1040 <strncpy@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"AAA\00"
define void @cstringchecker_bounds_nocrash() {
%1 = alloca i8*
%2 = call i8* @malloc(i32 2)
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @strncpy(i8* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 4)
%5 = load i8*, i8** %1
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"AAA\00"
define void @cstringchecker_bounds_nocrash() {
%1 = tail call dereferenceable_or_null(2) i8* @malloc(i32 2)
%2 = tail call i32 @strncpy(i8* %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 4)
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
void efclose(FILE *file) {
  fclose(file);
  file = NULL;
}


x86 assembly (clang, -O0):
<efclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
movq   $0x0,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<efclose>:
jmp    1030 <fclose@plt>

LLVM IR (-O0):
define void @efclose(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fclose(i32* %3)
store i32* null, i32** %2
ret void
}

LLVM IR (-O2):
define void @efclose(i32* nocapture %0) {
%2 = tail call i32 @fclose(i32* %0)
ret void
}
/* Variables and functions */
double modf(double, double *);
int TrioIsNan(double number) {
  double integral, fraction;
  return ((number != number) ||
          ((number != 0.0) &&
           (fraction = modf(number, &integral), integral == fraction)));
}


x86 assembly (clang, -O0):
<TrioIsNan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    $0x1,%al
ucomisd -0x8(%rbp),%xmm0
mov    %al,-0x19(%rbp)
jne    1188 <TrioIsNan+0x78>
jp     1188 <TrioIsNan+0x78>
movsd  -0x8(%rbp),%xmm0
xor    %eax,%eax
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
mov    %al,-0x1a(%rbp)
jne    115a <TrioIsNan+0x4a>
jp     115a <TrioIsNan+0x4a>
jmp    1182 <TrioIsNan+0x72>
movsd  -0x8(%rbp),%xmm0
lea    -0x10(%rbp),%rdi
call   1030 <modf@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
sete   %al
setnp  %cl
and    %cl,%al
mov    %al,-0x1a(%rbp)
mov    -0x1a(%rbp),%al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TrioIsNan>:
ucomisd %xmm0,%xmm0
jp     1141 <TrioIsNan+0x31>
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1122 <TrioIsNan+0x12>
jnp    113e <TrioIsNan+0x2e>
push   %rax
mov    %rsp,%rdi
call   1030 <modf@plt>
cmpeqsd (%rsp),%xmm0
movq   %xmm0,%rax
and    $0x1,%eax
add    $0x8,%rsp
ret
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @TrioIsNan(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = load double, double* %2
%7 = fcmp une double %5, %6
br i1 %7, label %19, label %8
8: ; preds = %1
%9 = load double, double* %2
%10 = fcmp une double %9, 0.000000e+00
br i1 %10, label %11, label %17
11: ; preds = %8
%12 = load double, double* %2
%13 = call double @modf(double %12, double* %3)
store double %13, double* %4
%14 = load double, double* %3
%15 = load double, double* %4
%16 = fcmp oeq double %14, %15
br label %17
17: ; preds = %11, %8
%18 = phi i1 [ false, %8 ], [ %16, %11 ]
br label %19
19: ; preds = %17, %1
%20 = phi i1 [ true, %1 ], [ %18, %17 ]
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
define i32 @TrioIsNan(double %0) {
%2 = alloca double
%3 = bitcast double* %2 to i8*
%4 = fcmp uno double %0, 0.000000e+00
br i1 %4, label %12, label %5
5: ; preds = %1
%6 = fcmp une double %0, 0.000000e+00
br i1 %6, label %7, label %12
7: ; preds = %5
%8 = call double @modf(double %0, double* %2)
%9 = load double, double* %2
%10 = fcmp oeq double %9, %8
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %5, %7, %1
%13 = phi i32 [ 1, %1 ], [ 0, %5 ], [ %11, %7 ]
ret i32 %13
}
void dummy_cleanup(void *v) {}


x86 assembly (clang, -O0):
<dummy_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_cleanup>:
ret

LLVM IR (-O0):
define void @dummy_cleanup(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @dummy_cleanup(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void tpm_free(const void *ptr) {
  if (ptr != NULL)
    free((void *)ptr);
}


x86 assembly (clang, -O0):
<tpm_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <tpm_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tpm_free>:
test   %rdi,%rdi
je     111a <tpm_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @tpm_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @tpm_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Type definitions */
struct game_event {
  int dummy;
};

/* Variables and functions */
int rand();
void run_game(void (*event_handler)(struct game_event *event),
              struct game_event *events[], int num_events) {
  int i = rand() % num_events;
  event_handler(events[i]);
}


x86 assembly (clang, -O0):
<run_game>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
mov    (%rcx,%rdx,8),%rdi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_game>:
push   %r15
push   %r14
push   %rbx
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
movslq %edx,%rax
mov    (%r14,%rax,8),%rdi
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
jmp    *%rax

LLVM IR (-O0):
%struct.game_event = type { i32 }
define void @run_game(void (%struct.game_event*)* %0, %struct.game_event** %1, i32 %2) {
%4 = alloca void (%struct.game_event*)*
%5 = alloca %struct.game_event**
%6 = alloca i32
%7 = alloca i32
store void (%struct.game_event*)* %0, void (%struct.game_event*)** %4
store %struct.game_event** %1, %struct.game_event*** %5
store i32 %2, i32* %6
%8 = call i32 (...) @rand()
%9 = load i32, i32* %6
%10 = srem i32 %8, %9
store i32 %10, i32* %7
%11 = load void (%struct.game_event*)*, void (%struct.game_event*)** %4
%12 = load %struct.game_event**, %struct.game_event*** %5
%13 = load i32, i32* %7
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds %struct.game_event*, %struct.game_event** %12, i64 %14
%16 = load %struct.game_event*, %struct.game_event** %15
ret void
}

LLVM IR (-O2):
%struct.game_event = type { i32 }
define void @run_game(void (%struct.game_event*)* nocapture %0, %struct.game_event** nocapture %1, i32 %2) {
%4 = tail call i32 (...) @rand()
%5 = srem i32 %4, %2
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds %struct.game_event*, %struct.game_event** %1, i64 %6
%8 = load %struct.game_event*, %struct.game_event** %7
tail call void %0(%struct.game_event* %8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ catch_FPEs();
int /*<<< orphan*/ check_fpe_traps();
int /*<<< orphan*/ check_strtod_ovf();
int /*<<< orphan*/ get_fpe_codes();
int main(int argc, char *argv[]) {
  catch_FPEs();
  switch (argc) {
  case 1:
    check_fpe_traps();
    break;
  case 2:
    get_fpe_codes();
    break;
  default:
    check_strtod_ovf();
    break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
call   1030 <catch_FPEs@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
sub    $0x1,%eax
je     1182 <main+0x42>
jmp    1171 <main+0x31>
mov    -0x14(%rbp),%eax
sub    $0x2,%eax
je     118e <main+0x4e>
jmp    119a <main+0x5a>
mov    $0x0,%al
call   1050 <check_fpe_traps@plt>
jmp    11a1 <main+0x61>
mov    $0x0,%al
call   1040 <get_fpe_codes@plt>
jmp    11a1 <main+0x61>
mov    $0x0,%al
call   1060 <check_strtod_ovf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <catch_FPEs@plt>
xor    %eax,%eax
cmp    $0x2,%ebx
je     115d <main+0x1d>
cmp    $0x1,%ebx
jne    1164 <main+0x24>
call   1050 <check_fpe_traps@plt>
jmp    1169 <main+0x29>
call   1040 <get_fpe_codes@plt>
jmp    1169 <main+0x29>
call   1060 <check_strtod_ovf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @catch_FPEs()
%7 = load i32, i32* %4
switch i32 %7, label %12 [
i32 1, label %8
i32 2, label %10
]
8: ; preds = %2
%9 = call i32 (...) @check_fpe_traps()
br label %14
10: ; preds = %2
%11 = call i32 (...) @get_fpe_codes()
br label %14
12: ; preds = %2
%13 = call i32 (...) @check_strtod_ovf()
br label %14
14: ; preds = %12, %10, %8
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @catch_FPEs()
switch i32 %0, label %8 [
i32 1, label %4
i32 2, label %6
]
4: ; preds = %2
%5 = tail call i32 (...) @check_fpe_traps()
br label %10
6: ; preds = %2
%7 = tail call i32 (...) @get_fpe_codes()
br label %10
8: ; preds = %2
%9 = tail call i32 (...) @check_strtod_ovf()
br label %10
10: ; preds = %8, %6, %4
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ myitoa(int, char *);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  char str[10] = "";
  scanf("%d", &n);
  myitoa(n, str);
  printf("%s", str);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x12(%rbp),%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1040 <memset@plt>
lea    0xe9a(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
lea    -0x12(%rbp),%rsi
call   1060 <myitoa@plt>
lea    -0x12(%rbp),%rsi
lea    0xe7d(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x20,%rsp
movw   $0x0,0x18(%rsp)
movq   $0x0,0x10(%rsp)
lea    0xeb4(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1040 <scanf@plt>
mov    0xc(%rsp),%edi
lea    0x10(%rsp),%rbx
mov    %rbx,%rsi
call   1050 <myitoa@plt>
lea    0xe95(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [10 x i8]
store i32 0, i32* %1
%4 = bitcast [10 x i8]* %3 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%6 = load i32, i32* %2
%7 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%8 = call i32 @myitoa(i32 %6, i8* %7)
%9 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [10 x i8]
%3 = bitcast i32* %1 to i8*
%4 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%6 = load i32, i32* %1
%7 = call i32 @myitoa(i32 %6, i8* %4)
%8 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("polynomes-cli available commands are: \n"
         "help : shows this message\n"
         "exit : quits the program\n"
         "def : define a new polynome (def P 1 2 0 4)\n"
         "print : prints a polynome (print P x)\n"
         "val : calculates value (val P 2)\n"
         "add : adds two polynomes and stores result in the first parameter "
         "(add p q)\n"
         "\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [283 x i8] c"polynomes-cli available commands are: \0Ahelp : shows this message\0Aexit : quits the program\0Adef : define a new polynome (def P 1 2 0 4)\0Aprint : prints a polynome (print P x)\0Aval : calculates value (val P 2)\0Aadd : adds two polynomes and stores result in the first parameter (add p q)\0A\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([283 x i8], [283 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [282 x i8] c"polynomes-cli available commands are: \0Ahelp : shows this message\0Aexit : quits the program\0Adef : define a new polynome (def P 1 2 0 4)\0Aprint : prints a polynome (print P x)\0Aval : calculates value (val P 2)\0Aadd : adds two polynomes and stores result in the first parameter (add p q)\0A\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([282 x i8], [282 x i8]* @str, i64 0, i64 0))
ret void
}
void start_suite(const char *name) {}


x86 assembly (clang, -O0):
<start_suite>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_suite>:
ret

LLVM IR (-O0):
define void @start_suite(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @start_suite(i8* nocapture %0) {
ret void
}
/* Variables and functions */
char hdigit(char);
char *hex(char ch, char *area) {
  area[0] = hdigit(ch >> 4);
  area[1] = hdigit(ch);
  area[2] = 0;
  return area;
}


x86 assembly (clang, -O0):
<hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
movsbl -0x1(%rbp),%eax
sar    $0x4,%eax
movsbl %al,%edi
call   1030 <hdigit@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
movsbl -0x1(%rbp),%edi
call   1030 <hdigit@plt>
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x10(%rbp),%rax
movb   $0x0,0x2(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %ebp,%eax
sar    $0x4,%al
movsbl %al,%edi
call   1030 <hdigit@plt>
mov    %al,(%rbx)
mov    %ebp,%edi
call   1030 <hdigit@plt>
mov    %al,0x1(%rbx)
movb   $0x0,0x2(%rbx)
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @hex(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
store i8 %0, i8* %3
store i8* %1, i8** %4
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = ashr i32 %6, 4
%8 = trunc i32 %7 to i8
%9 = call signext i8 @hdigit(i8 signext %8)
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 0
store i8 %9, i8* %11
%12 = load i8, i8* %3
%13 = call signext i8 @hdigit(i8 signext %12)
%14 = load i8*, i8** %4
%15 = getelementptr inbounds i8, i8* %14, i64 1
store i8 %13, i8* %15
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i64 2
store i8 0, i8* %17
%18 = load i8*, i8** %4
ret i8* %18
}

LLVM IR (-O2):
define i8* @hex(i8 signext %0, i8* returned writeonly %1) {
%3 = ashr i8 %0, 4
%4 = tail call signext i8 @hdigit(i8 signext %3)
store i8 %4, i8* %1
%5 = tail call signext i8 @hdigit(i8 signext %0)
%6 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %5, i8* %6
%7 = getelementptr inbounds i8, i8* %1, i64 2
store i8 0, i8* %7
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ flash_writecommand(int, int);
void flash_softwareentry() {
  flash_writecommand(0x5555, 0xAA);
  flash_writecommand(0x2AAA, 0x55);
  flash_writecommand(0x5555, 0x90);
}


x86 assembly (clang, -O0):
<flash_softwareentry>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5555,%edi
mov    $0xaa,%esi
call   1030 <flash_writecommand@plt>
mov    $0x2aaa,%edi
mov    $0x55,%esi
call   1030 <flash_writecommand@plt>
mov    $0x5555,%edi
mov    $0x90,%esi
call   1030 <flash_writecommand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<flash_softwareentry>:
push   %rax
mov    $0x5555,%edi
mov    $0xaa,%esi
call   1030 <flash_writecommand@plt>
mov    $0x2aaa,%edi
mov    $0x55,%esi
call   1030 <flash_writecommand@plt>
mov    $0x5555,%edi
mov    $0x90,%esi
pop    %rax
jmp    1030 <flash_writecommand@plt>

LLVM IR (-O0):
define void @flash_softwareentry() {
%1 = call i32 @flash_writecommand(i32 21845, i32 170)
%2 = call i32 @flash_writecommand(i32 10922, i32 85)
%3 = call i32 @flash_writecommand(i32 21845, i32 144)
ret void
}

LLVM IR (-O2):
define void @flash_softwareentry() {
%1 = tail call i32 @flash_writecommand(i32 21845, i32 170)
%2 = tail call i32 @flash_writecommand(i32 10922, i32 85)
%3 = tail call i32 @flash_writecommand(i32 21845, i32 144)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vga_puts(int /*<<< orphan*/, char const *, int);
int sysc_write(int fd, const char *buf, unsigned long size) {
  if (size < 0)
    return -1;
  switch (fd) {
  case 0:
    vga_puts(0, buf, 0xF);
    break;
  default:
    return -1;
  }
  return size;
}


x86 assembly (clang, -O0):
<sysc_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jae    113a <sysc_write+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1172 <sysc_write+0x62>
mov    -0x8(%rbp),%eax
test   %eax,%eax
jne    115f <sysc_write+0x4f>
jmp    114a <sysc_write+0x3a>
mov    -0x10(%rbp),%rsi
xor    %edi,%edi
mov    $0xf,%edx
call   1030 <vga_puts@plt>
jmp    116b <sysc_write+0x5b>
movl   $0xffffffff,-0x4(%rbp)
jmp    1172 <sysc_write+0x62>
mov    -0x18(%rbp),%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysc_write>:
mov    $0xffffffff,%eax
test   %edi,%edi
je     111a <sysc_write+0xa>
ret
push   %rbx
mov    %rdx,%rbx
xor    %edi,%edi
mov    $0xf,%edx
call   1030 <vga_puts@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @sysc_write(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%8 = load i64, i64* %7
%9 = icmp ult i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
store i32 -1, i32* %4
br label %20
11: ; preds = %3
%12 = load i32, i32* %5
switch i32 %12, label %16 [
i32 0, label %13
]
13: ; preds = %11
%14 = load i8*, i8** %6
%15 = call i32 @vga_puts(i32 0, i8* %14, i32 15)
br label %17
16: ; preds = %11
store i32 -1, i32* %4
br label %20
17: ; preds = %13
%18 = load i64, i64* %7
%19 = trunc i64 %18 to i32
store i32 %19, i32* %4
br label %20
20: ; preds = %17, %16, %10
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @sysc_write(i32 %0, i8* %1, i64 %2) {
%4 = icmp eq i32 %0, 0
br i1 %4, label %5, label %8
5: ; preds = %3
%6 = tail call i32 @vga_puts(i32 0, i8* %1, i32 15)
%7 = trunc i64 %2 to i32
br label %8
8: ; preds = %3, %5
%9 = phi i32 [ %7, %5 ], [ -1, %3 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(unsigned long, unsigned char, int);
int /*<<< orphan*/ GPIOPadConfigSet(unsigned long, unsigned char, int, int);
void GPIOPinTypeI2CSCL(unsigned long ulPort, unsigned char ucPins) {
  ;
  GPIODirModeSet(ulPort, ucPins, 0x00000002);
  if ((((*((volatile unsigned long *)(0x400FE000))) &
        (0x70000000 | 0x00FF0000)) == (0x10000000 | 0x00050000))) {
    GPIOPadConfigSet(ulPort, ucPins, 0x00000001, 0x00000008);
  } else {
    GPIOPadConfigSet(ulPort, ucPins, 0x00000001, 0x00000009);
  }
}


x86 assembly (clang, -O0):
<GPIOPinTypeI2CSCL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%edx
movzbl -0x9(%rbp),%esi
call   1040 <GPIODirModeSet@plt>
mov    $0x400fe000,%eax
mov    (%rax),%rax
and    $0x70ff0000,%rax
cmp    $0x10050000,%rax
jne    117a <GPIOPinTypeI2CSCL+0x5a>
mov    -0x8(%rbp),%rdi
mov    $0x1,%edx
mov    $0x8,%ecx
movzbl -0x9(%rbp),%esi
call   1030 <GPIOPadConfigSet@plt>
jmp    1191 <GPIOPinTypeI2CSCL+0x71>
mov    -0x8(%rbp),%rdi
mov    $0x1,%edx
mov    $0x9,%ecx
movzbl -0x9(%rbp),%esi
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeI2CSCL>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    0x400fe000,%rax
40
and    $0x70ff0000,%eax
xor    %ecx,%ecx
cmp    $0x10050000,%eax
sete   %cl
xor    $0x9,%ecx
mov    %rbx,%rdi
mov    %ebp,%esi
mov    $0x1,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeI2CSCL(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i64, i64* %3
%6 = load i8, i8* %4
%7 = call i32 @GPIODirModeSet(i64 %5, i8 zeroext %6, i32 2)
%8 = load volatile i64, i64* inttoptr (i64 1074782208 to i64*)
%9 = and i64 %8, 1895759872
%10 = icmp eq i64 %9, 268763136
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i64, i64* %3
%13 = load i8, i8* %4
%14 = call i32 @GPIOPadConfigSet(i64 %12, i8 zeroext %13, i32 1, i32 8)
br label %19
15: ; preds = %2
%16 = load i64, i64* %3
%17 = load i8, i8* %4
%18 = call i32 @GPIOPadConfigSet(i64 %16, i8 zeroext %17, i32 1, i32 9)
br label %19
19: ; preds = %15, %11
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeI2CSCL(i64 %0, i8 zeroext %1) {
%3 = tail call i32 @GPIODirModeSet(i64 %0, i8 zeroext %1, i32 2)
%4 = load volatile i64, i64* inttoptr (i64 1074782208 to i64*)
%5 = and i64 %4, 1895759872
%6 = icmp eq i64 %5, 268763136
%7 = select i1 %6, i32 8, i32 9
%8 = tail call i32 @GPIOPadConfigSet(i64 %0, i8 zeroext %1, i32 1, i32 %7)
ret void
}
void ff_hevc_put_hevc_uni_w_qpel_v4_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_qpel_v4_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_qpel_v4_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_qpel_v4_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_qpel_v4_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__36__IO__toggle();
void Msp430GpioC__0__HplGeneralIO__toggle(void) {
  HplMsp430GeneralIOP__36__IO__toggle();
}


x86 assembly (clang, -O0):
<Msp430GpioC__0__HplGeneralIO__toggle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__36__IO__toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430GpioC__0__HplGeneralIO__toggle>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__36__IO__toggle@plt>

LLVM IR (-O0):
define void @Msp430GpioC__0__HplGeneralIO__toggle() {
%1 = call i32 (...) @HplMsp430GeneralIOP__36__IO__toggle()
ret void
}

LLVM IR (-O2):
define void @Msp430GpioC__0__HplGeneralIO__toggle() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__36__IO__toggle()
ret void
}
/* Variables and functions */
char *get_path_cmd(char *);
scalar_t__ is_builtin(char *);
scalar_t__ is_inthisdir(char *);
char *get_place_cmd(char *cmd) {
  char *cmd_out = NULL;
  if (is_builtin(cmd)) {
    cmd_out = cmd;
  } else if (is_inthisdir(cmd)) {
    cmd_out = cmd;
  } else {
    cmd_out = get_path_cmd(cmd);
  }
  return cmd_out;
}


x86 assembly (clang, -O0):
<get_place_cmd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <is_builtin@plt>
cmp    $0x0,%rax
je     1164 <get_place_cmd+0x34>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1196 <get_place_cmd+0x66>
mov    -0x8(%rbp),%rdi
call   1050 <is_inthisdir@plt>
cmp    $0x0,%rax
je     1184 <get_place_cmd+0x54>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1191 <get_place_cmd+0x61>
mov    -0x8(%rbp),%rdi
call   1030 <get_path_cmd@plt>
mov    %rax,-0x10(%rbp)
jmp    1196 <get_place_cmd+0x66>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_place_cmd>:
push   %rbx
mov    %rdi,%rbx
call   1040 <is_builtin@plt>
test   %rax,%rax
jne    114b <get_place_cmd+0x1b>
mov    %rbx,%rdi
call   1050 <is_inthisdir@plt>
test   %rax,%rax
je     1150 <get_place_cmd+0x20>
mov    %rbx,%rax
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <get_path_cmd@plt>

LLVM IR (-O0):
define i8* @get_place_cmd(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %3
%4 = load i8*, i8** %2
%5 = call i64 @is_builtin(i8* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i8*, i8** %2
store i8* %8, i8** %3
br label %19
9: ; preds = %1
%10 = load i8*, i8** %2
%11 = call i64 @is_inthisdir(i8* %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = load i8*, i8** %2
store i8* %14, i8** %3
br label %18
15: ; preds = %9
%16 = load i8*, i8** %2
%17 = call i8* @get_path_cmd(i8* %16)
store i8* %17, i8** %3
br label %18
18: ; preds = %15, %13
br label %19
19: ; preds = %18, %7
%20 = load i8*, i8** %3
ret i8* %20
}

LLVM IR (-O2):
define i8* @get_place_cmd(i8* %0) {
%2 = tail call i64 @is_builtin(i8* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = tail call i64 @is_inthisdir(i8* %0)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i8* @get_path_cmd(i8* %0)
br label %9
9: ; preds = %4, %1, %7
%10 = phi i8* [ %8, %7 ], [ %0, %1 ], [ %0, %4 ]
ret i8* %10
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ con_flush();
int read(int /*<<< orphan*/, int *, int);
int con_getch(void) {
  uint8_t c;
  con_flush();
  if (read(0, &c, 1) != 1)
    return -1;
  return c;
}


x86 assembly (clang, -O0):
<con_getch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <con_flush@plt>
xor    %edi,%edi
lea    -0x8(%rbp),%rsi
mov    $0x1,%edx
call   1040 <read@plt>
cmp    $0x1,%eax
je     1154 <con_getch+0x34>
movl   $0xffffffff,-0x4(%rbp)
jmp    115a <con_getch+0x3a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<con_getch>:
push   %rax
xor    %eax,%eax
call   1030 <con_flush@plt>
lea    0x4(%rsp),%rsi
xor    %edi,%edi
mov    $0x1,%edx
call   1040 <read@plt>
mov    %eax,%ecx
mov    $0xffffffff,%eax
cmp    $0x1,%ecx
jne    1149 <con_getch+0x29>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @con_getch() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @con_flush()
%4 = call i32 @read(i32 0, i32* %2, i32 1)
%5 = icmp ne i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 -1, i32* %1
br label %9
7: ; preds = %0
%8 = load i32, i32* %2
store i32 %8, i32* %1
br label %9
9: ; preds = %7, %6
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @con_getch() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 (...) @con_flush()
%4 = call i32 @read(i32 0, i32* %1, i32 1)
%5 = icmp eq i32 %4, 1
%6 = load i32, i32* %1
%7 = select i1 %5, i32 %6, i32 -1
ret i32 %7
}
/* Variables and functions */
unsigned long FDD_CalculatePositionInTrack();
unsigned long FDC_GetNopsToNextIndex(void) {
  unsigned long PositionInTrack;
  PositionInTrack = FDD_CalculatePositionInTrack();
  return ((6656 - PositionInTrack) << 5);
}


x86 assembly (clang, -O0):
<FDC_GetNopsToNextIndex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <FDD_CalculatePositionInTrack@plt>
mov    %rax,-0x8(%rbp)
mov    $0x1a00,%eax
sub    -0x8(%rbp),%rax
shl    $0x5,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FDC_GetNopsToNextIndex>:
push   %rax
xor    %eax,%eax
call   1030 <FDD_CalculatePositionInTrack@plt>
shl    $0x5,%rax
mov    $0x34000,%ecx
sub    %rax,%rcx
mov    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @FDC_GetNopsToNextIndex() {
%1 = alloca i64
%2 = call i64 (...) @FDD_CalculatePositionInTrack()
store i64 %2, i64* %1
%3 = load i64, i64* %1
%4 = sub i64 6656, %3
%5 = shl i64 %4, 5
ret i64 %5
}

LLVM IR (-O2):
define i64 @FDC_GetNopsToNextIndex() {
%1 = tail call i64 (...) @FDD_CalculatePositionInTrack()
%2 = mul i64 %1, -32
%3 = add i64 %2, 212992
ret i64 %3
}