xunge/DecIR huggingface dataset:
int libesmtp_to_eai(int code) {
  switch (code) {
  case 12:
    return 2;
  case 11:
    return 4;
  case 13:
    return 6;
  case 9:
    return 1;
  case 10:
    return 7;
  case 14:
    return 5;
  case 15:
    return 3;
  case 16:
    return 8;
  case 17:
    return 9;
  case 18:
    return 10;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<libesmtp_to_eai>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xfffffff7,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x9,%eax
ja     11a8 <libesmtp_to_eai+0xa8>
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x2,-0x4(%rbp)
jmp    11af <libesmtp_to_eai+0xaf>
movl   $0x4,-0x4(%rbp)
jmp    11af <libesmtp_to_eai+0xaf>
movl   $0x6,-0x4(%rbp)
jmp    11af <libesmtp_to_eai+0xaf>
movl   $0x1,-0x4(%rbp)
jmp    11af <libesmtp_to_eai+0xaf>
movl   $0x7,-0x4(%rbp)
jmp    11af <libesmtp_to_eai+0xaf>
movl   $0x5,-0x4(%rbp)
jmp    11af <libesmtp_to_eai+0xaf>
movl   $0x3,-0x4(%rbp)
jmp    11af <libesmtp_to_eai+0xaf>
movl   $0x8,-0x4(%rbp)
jmp    11af <libesmtp_to_eai+0xaf>
movl   $0x9,-0x4(%rbp)
jmp    11af <libesmtp_to_eai+0xaf>
movl   $0xa,-0x4(%rbp)
jmp    11af <libesmtp_to_eai+0xaf>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libesmtp_to_eai>:
add    $0xfffffff7,%edi
xor    %eax,%eax
cmp    $0x9,%edi
ja     1117 <libesmtp_to_eai+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @libesmtp_to_eai(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %15 [
i32 12, label %5
i32 11, label %6
i32 13, label %7
i32 9, label %8
i32 10, label %9
i32 14, label %10
i32 15, label %11
i32 16, label %12
i32 17, label %13
i32 18, label %14
]
5: ; preds = %1
store i32 2, i32* %2
br label %16
6: ; preds = %1
store i32 4, i32* %2
br label %16
7: ; preds = %1
store i32 6, i32* %2
br label %16
8: ; preds = %1
store i32 1, i32* %2
br label %16
9: ; preds = %1
store i32 7, i32* %2
br label %16
10: ; preds = %1
store i32 5, i32* %2
br label %16
11: ; preds = %1
store i32 3, i32* %2
br label %16
12: ; preds = %1
store i32 8, i32* %2
br label %16
13: ; preds = %1
store i32 9, i32* %2
br label %16
14: ; preds = %1
store i32 10, i32* %2
br label %16
15: ; preds = %1
store i32 0, i32* %2
br label %16
16: ; preds = %15, %14, %13, %12, %11, %10, %9, %8, %7, %6, %5
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@switch.table.libesmtp_to_eai = [10 x i32] [i32 1, i32 7, i32 4, i32 2, i32 6, i32 5, i32 3, i32 8, i32 9, i32 10]
define i32 @libesmtp_to_eai(i32 %0) {
%2 = add i32 %0, -9
%3 = icmp ult i32 %2, 10
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [10 x i32], [10 x i32]* @switch.table.libesmtp_to_eai, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ SIGUSR1;
int /*<<< orphan*/ signal(int /*<<< orphan*/, void (*)(int));
int /*<<< orphan*/ vt_do_switch(int /*<<< orphan*/ *);
void vt_switch(int sig) {
  signal(SIGUSR1, vt_switch);
  vt_do_switch(NULL);
}


x86 assembly (clang, -O0):
<vt_switch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    0x2e9d(%rip),%rsi
call   1040 <signal@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1030 <vt_do_switch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vt_switch>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
mov    0x2ea7(%rip),%rsi
call   1040 <signal@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <vt_do_switch@plt>

LLVM IR (-O0):
@SIGUSR1 = global i32 0
define void @vt_switch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @SIGUSR1
%4 = call i32 @signal(i32 %3, void (i32)* @vt_switch)
%5 = call i32 @vt_do_switch(i32* null)
ret void
}

LLVM IR (-O2):
@SIGUSR1 = global i32 0
define void @vt_switch(i32 %0) {
%2 = load i32, i32* @SIGUSR1
%3 = tail call i32 @signal(i32 %2, void (i32)* @vt_switch)
%4 = tail call i32 @vt_do_switch(i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void alloc_error() { puts("\nErreur d'alloc. dynamique -> abort !\n"); }


x86 assembly (clang, -O0):
<alloc_error>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_error>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"\0AErreur d'alloc. dynamique -> abort !\0A\00"
define void @alloc_error() {
%1 = call i32 @puts(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [39 x i8] c"\0AErreur d'alloc. dynamique -> abort !\0A\00"
define void @alloc_error() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int, char *);
char *Off_Reg_Bank(int offset) {
  static char str[20];
  sprintf(str, "%d(%s)", offset, "%r12");
  return str;
}


x86 assembly (clang, -O0):
<Off_Reg_Bank>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0x2f1b(%rip),%rdi
lea    0xed4(%rip),%rsi
lea    0xed4(%rip),%rcx
call   1030 <sprintf@plt>
lea    0x2f01(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Off_Reg_Bank>:
push   %rbx
mov    %edi,%edx
lea    0x2f26(%rip),%rbx
lea    0xedf(%rip),%rsi
lea    0xedf(%rip),%rcx
mov    %rbx,%rdi
call   1030 <sprintf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@Off_Reg_Bank.str = internal global [20 x i8] zeroinitializer
@.str = [7 x i8] c"%d(%s)\00"
@.str.1 = [5 x i8] c"%r12\00"
define i8* @Off_Reg_Bank(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @sprintf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @Off_Reg_Bank.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret i8* getelementptr inbounds ([20 x i8], [20 x i8]* @Off_Reg_Bank.str, i64 0, i64 0)
}

LLVM IR (-O2):
@Off_Reg_Bank.str = internal global [20 x i8] zeroinitializer
@.str = [7 x i8] c"%d(%s)\00"
@.str.1 = [5 x i8] c"%r12\00"
define i8* @Off_Reg_Bank(i32 %0) {
%2 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @Off_Reg_Bank.str, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret i8* getelementptr inbounds ([20 x i8], [20 x i8]* @Off_Reg_Bank.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char *, char *);
void mpeg3io_joinpath(char *title_path, char *directory, char *new_filename) {
  sprintf(title_path, "%s/%s", directory, new_filename);
}


x86 assembly (clang, -O0):
<mpeg3io_joinpath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
lea    0xec9(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mpeg3io_joinpath>:
mov    %rdx,%rcx
mov    %rsi,%rdx
lea    0xee3(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%s/%s\00"
define void @mpeg3io_joinpath(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %8, i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s/%s\00"
define void @mpeg3io_joinpath(i8* nocapture writeonly %0, i8* %1, i8* %2) {
%4 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %2)
ret void
}
void CRYPTO_mem_leaks_fp(void) {}


x86 assembly (clang, -O0):
<CRYPTO_mem_leaks_fp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRYPTO_mem_leaks_fp>:
ret

LLVM IR (-O0):
define void @CRYPTO_mem_leaks_fp() {
ret void
}

LLVM IR (-O2):
define void @CRYPTO_mem_leaks_fp() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *);
int main(int argc, char *argv[]) {
  printf("It's %s on %s\n", "06:23:04", "Mar 18 2022");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
lea    0xedb(%rip),%rsi
lea    0xedd(%rip),%rdx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
lea    0xef0(%rip),%rsi
lea    0xef2(%rip),%rdx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"It's %s on %s\0A\00"
@.str.1 = [9 x i8] c"06:23:04\00"
@.str.2 = [12 x i8] c"Mar 18 2022\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"It's %s on %s\0A\00"
@.str.1 = [9 x i8] c"06:23:04\00"
@.str.2 = [12 x i8] c"Mar 18 2022\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}
int testWeak1() { return 0; }


x86 assembly (clang, -O0):
<testWeak1>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testWeak1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @testWeak1() {
ret i32 0
}

LLVM IR (-O2):
define i32 @testWeak1() {
ret i32 0
}
/* Type definitions */
struct task_struct {
  int dummy;
};

/* Variables and functions */
int copy_thread(unsigned long, unsigned long, unsigned long,
                struct task_struct *);
int copy_thread_tls(unsigned long clone_flags, unsigned long sp,
                    unsigned long arg, struct task_struct *p,
                    unsigned long tls) {
  return copy_thread(clone_flags, sp, arg, p);
}


x86 assembly (clang, -O0):
<copy_thread_tls>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <copy_thread@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_thread_tls>:
jmp    1030 <copy_thread@plt>

LLVM IR (-O0):
%struct.task_struct = type { i32 }
define i32 @copy_thread_tls(i64 %0, i64 %1, i64 %2, %struct.task_struct* %3, i64 %4) {
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca %struct.task_struct*
%10 = alloca i64
store i64 %0, i64* %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store %struct.task_struct* %3, %struct.task_struct** %9
store i64 %4, i64* %10
%11 = load i64, i64* %6
%12 = load i64, i64* %7
%13 = load i64, i64* %8
%14 = load %struct.task_struct*, %struct.task_struct** %9
%15 = call i32 @copy_thread(i64 %11, i64 %12, i64 %13, %struct.task_struct* %14)
ret i32 %15
}

LLVM IR (-O2):
%struct.task_struct = type { i32 }
define i32 @copy_thread_tls(i64 %0, i64 %1, i64 %2, %struct.task_struct* %3, i64 %4) {
%6 = tail call i32 @copy_thread(i64 %0, i64 %1, i64 %2, %struct.task_struct* %3)
ret i32 %6
}
void setup_utf8(void) {}


x86 assembly (clang, -O0):
<setup_utf8>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_utf8>:
ret

LLVM IR (-O0):
define void @setup_utf8() {
ret void
}

LLVM IR (-O2):
define void @setup_utf8() {
ret void
}
int do_917() { return 917; }


x86 assembly (clang, -O0):
<do_917>:
push   %rbp
mov    %rsp,%rbp
mov    $0x395,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_917>:
mov    $0x395,%eax
ret

LLVM IR (-O0):
define i32 @do_917() {
ret i32 917
}

LLVM IR (-O2):
define i32 @do_917() {
ret i32 917
}
/* Variables and functions */
int /*<<< orphan*/ SSL_library_init();
int /*<<< orphan*/ SSL_load_error_strings();
void kore_server_sslstart(void) {
  SSL_library_init();
  SSL_load_error_strings();
}


x86 assembly (clang, -O0):
<kore_server_sslstart>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SSL_library_init@plt>
mov    $0x0,%al
call   1040 <SSL_load_error_strings@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<kore_server_sslstart>:
push   %rax
xor    %eax,%eax
call   1030 <SSL_library_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <SSL_load_error_strings@plt>

LLVM IR (-O0):
define void @kore_server_sslstart() {
%1 = call i32 (...) @SSL_library_init()
%2 = call i32 (...) @SSL_load_error_strings()
ret void
}

LLVM IR (-O2):
define void @kore_server_sslstart() {
%1 = tail call i32 (...) @SSL_library_init()
%2 = tail call i32 (...) @SSL_load_error_strings()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ mark;

/* Variables and functions */
int /*<<< orphan*/ SOL_SOCKET;
int /*<<< orphan*/ SO_MARK;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
int setsockopt(int, int /*<<< orphan*/, int /*<<< orphan*/,
               int /*<<< orphan*/ *, int);
void set_mark(int fd, uint32_t mark) {
  int err;
  err = setsockopt(fd, SOL_SOCKET, SO_MARK, &mark, sizeof(mark));
  if (err) {
    perror("set SO_MARK");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<set_mark>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
mov    0x2e8f(%rip),%rax
mov    (%rax),%edx
lea    -0x8(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1185 <set_mark+0x55>
lea    0xe8a(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_mark>:
push   %rax
mov    %esi,0x4(%rsp)
mov    0x2eac(%rip),%rax
mov    (%rax),%esi
mov    0x2e9b(%rip),%rax
mov    (%rax),%edx
lea    0x4(%rsp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
test   %eax,%eax
jne    115d <set_mark+0x2d>
pop    %rax
ret
lea    0xe9c(%rip),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@SOL_SOCKET = global i32 0
@SO_MARK = global i32 0
@.str = [12 x i8] c"set SO_MARK\00"
define void @set_mark(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* @SOL_SOCKET
%8 = load i32, i32* @SO_MARK
%9 = call i32 @setsockopt(i32 %6, i32 %7, i32 %8, i32* %4, i32 4)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = call i32 @perror(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %2
ret void
}

LLVM IR (-O2):
@SOL_SOCKET = global i32 0
@SO_MARK = global i32 0
@.str = [12 x i8] c"set SO_MARK\00"
define void @set_mark(i32 %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = load i32, i32* @SOL_SOCKET
%5 = load i32, i32* @SO_MARK
%6 = call i32 @setsockopt(i32 %0, i32 %4, i32 %5, i32* %3, i32 4)
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = call i32 @perror(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%10 = call i32 @exit(i32 1)
unreachable
11: ; preds = %2
ret void
}
__attribute__((no)) unsigned short nondet_ushort() {}


x86 assembly (clang, -O0):
<nondet_ushort>:
push   %rbp
mov    %rsp,%rbp
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nondet_ushort>:
ret

LLVM IR (-O0):
define zeroext i16 @nondet_ushort() {
%1 = alloca i16
%2 = load i16, i16* %1
ret i16 %2
}

LLVM IR (-O2):
define zeroext i16 @nondet_ushort() {
ret i16 undef
}
__attribute__((always_)) void rcu_read_unlock_sched(void) {
  do {
  } while (0);
  (void)0;
  do {
  } while (0);
}


x86 assembly (clang, -O0):
<rcu_read_unlock_sched>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <rcu_read_unlock_sched+0x9>
jmp    110e <rcu_read_unlock_sched+0xe>
jmp    1113 <rcu_read_unlock_sched+0x13>
jmp    1118 <rcu_read_unlock_sched+0x18>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_read_unlock_sched>:
ret

LLVM IR (-O0):
define void @rcu_read_unlock_sched() {
br label %1
1: ; preds = %0
br label %2
2: ; preds = %1
br label %3
3: ; preds = %2
br label %4
4: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @rcu_read_unlock_sched() {
ret void
}
unsigned grid3x_generic_output_fmts(unsigned input_fmts) { return input_fmts; }


x86 assembly (clang, -O0):
<grid3x_generic_output_fmts>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<grid3x_generic_output_fmts>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @grid3x_generic_output_fmts(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @grid3x_generic_output_fmts(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ ui_clip_set_mode(char const *);
void cliprdr_set_mode(const char *optarg) { ui_clip_set_mode(optarg); }


x86 assembly (clang, -O0):
<cliprdr_set_mode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ui_clip_set_mode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cliprdr_set_mode>:
jmp    1030 <ui_clip_set_mode@plt>

LLVM IR (-O0):
define void @cliprdr_set_mode(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @ui_clip_set_mode(i8* %3)
ret void
}

LLVM IR (-O2):
define void @cliprdr_set_mode(i8* %0) {
%2 = tail call i32 @ui_clip_set_mode(i8* %0)
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int cmx_shm_pack_value_handle(const uint16_t id, const int index) {
  return ((0x7fff & id) << 16) | (0xffff & index);
}


x86 assembly (clang, -O0):
<cmx_shm_pack_value_handle>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7fff,%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%ecx
and    $0xffff,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmx_shm_pack_value_handle>:
shl    $0x10,%edi
and    $0x7fff0000,%edi
movzwl %si,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @cmx_shm_pack_value_handle(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = and i32 32767, %5
%7 = shl i32 %6, 16
%8 = load i32, i32* %4
%9 = and i32 65535, %8
%10 = or i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @cmx_shm_pack_value_handle(i32 %0, i32 %1) {
%3 = shl i32 %0, 16
%4 = and i32 %3, 2147418112
%5 = and i32 %1, 65535
%6 = or i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ cosh(float);
float powf(int /*<<< orphan*/, double);
float tanhf_d(float x) { return powf(cosh(x), -2.0); }


x86 assembly (clang, -O0):
<tanhf_d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <cosh@plt>
mov    %eax,%edi
movsd  0xebf(%rip),%xmm0
call   1030 <powf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tanhf_d>:
push   %rax
call   1040 <cosh@plt>
movsd  0xed2(%rip),%xmm0
mov    %eax,%edi
pop    %rax
jmp    1030 <powf@plt>

LLVM IR (-O0):
define float @tanhf_d(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @cosh(float %3)
%5 = call float @powf(i32 %4, double -2.000000e+00)
ret float %5
}

LLVM IR (-O2):
define float @tanhf_d(float %0) {
%2 = tail call i32 @cosh(float %0)
%3 = tail call float @powf(i32 %2, double -2.000000e+00)
ret float %3
}
int linear_search(const int *arr, int size, int search_element) {
  int i;
  for (i = 0; i < size; i++) {
    if (arr[i] == search_element)
      return i;
  }
  return -1;
}


x86 assembly (clang, -O0):
<linear_search>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1153 <linear_search+0x53>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
jne    1140 <linear_search+0x40>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <linear_search+0x5a>
jmp    1145 <linear_search+0x45>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <linear_search+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<linear_search>:
mov    $0xffffffff,%eax
test   %esi,%esi
jle    111e <linear_search+0x1e>
mov    %esi,%esi
xor    %ecx,%ecx
nopl   (%rax)
cmp    %edx,(%rdi,%rcx,4)
je     111f <linear_search+0x1f>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <linear_search+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @linear_search(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %7
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 -1, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @linear_search(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, %2
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ -1, %3 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void C11(void) { printf("Test3\n"); }


x86 assembly (clang, -O0):
<C11>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<C11>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"Test3\0A\00"
define void @C11() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"Test3\00"
define void @C11() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dprepair(char const *);
int /*<<< orphan*/ pdperror(char const *);
int dorepair(const char *name) {
  if (!dprepair(name)) {
    pdperror(name);
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<dorepair>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <dprepair@plt>
cmp    $0x0,%eax
jne    1153 <dorepair+0x33>
mov    -0x10(%rbp),%rdi
call   1030 <pdperror@plt>
movl   $0x1,-0x4(%rbp)
jmp    115a <dorepair+0x3a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dorepair>:
push   %rbx
mov    %rdi,%rbx
call   1040 <dprepair@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
je     1133 <dorepair+0x13>
pop    %rbx
ret
mov    %rbx,%rdi
call   1030 <pdperror@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @dorepair(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @dprepair(i8* %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i32 @pdperror(i8* %8)
store i32 1, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @dorepair(i8* %0) {
%2 = tail call i32 @dprepair(i8* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @pdperror(i8* %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Type definitions */
struct timespec {
  int /*<<< orphan*/ tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_THREAD_CPUTIME_ID;
int /*<<< orphan*/ clock_gettime(int /*<<< orphan*/, struct timespec *);
int /*<<< orphan*/ memset(struct timespec *, int /*<<< orphan*/, int);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int timer_start(struct timespec *start_time) {
  memset((start_time), 0, sizeof(struct timespec));
  clock_gettime(CLOCK_THREAD_CPUTIME_ID, start_time);
  printf("start: %ld\n", start_time->tv_nsec);
  return 0;
}


x86 assembly (clang, -O0):
<timer_start>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1050 <memset@plt>
mov    0x2e95(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <clock_gettime@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    0xe95(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer_start>:
push   %rbx
mov    %rdi,%rbx
xor    %esi,%esi
mov    $0x4,%edx
call   1050 <memset@plt>
mov    0x2ea1(%rip),%rax
mov    (%rax),%edi
mov    %rbx,%rsi
call   1030 <clock_gettime@plt>
mov    (%rbx),%esi
lea    0xea6(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@CLOCK_THREAD_CPUTIME_ID = global i32 0
@.str = [12 x i8] c"start: %ld\0A\00"
define i32 @timer_start(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %2
%3 = load %struct.timespec*, %struct.timespec** %2
%4 = call i32 @memset(%struct.timespec* %3, i32 0, i32 4)
%5 = load i32, i32* @CLOCK_THREAD_CPUTIME_ID
%6 = load %struct.timespec*, %struct.timespec** %2
%7 = call i32 @clock_gettime(i32 %5, %struct.timespec* %6)
%8 = load %struct.timespec*, %struct.timespec** %2
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %8, i32 0, i32 0
%10 = load i32, i32* %9
%11 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %10)
ret i32 0
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@CLOCK_THREAD_CPUTIME_ID = global i32 0
@.str = [12 x i8] c"start: %ld\0A\00"
define i32 @timer_start(%struct.timespec* %0) {
%2 = tail call i32 @memset(%struct.timespec* %0, i32 0, i32 4)
%3 = load i32, i32* @CLOCK_THREAD_CPUTIME_ID
%4 = tail call i32 @clock_gettime(i32 %3, %struct.timespec* %0)
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%6 = load i32, i32* %5
%7 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
char *FLineSpace(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ printf(char *, char *);
int main(void) {
  FILE *fin = fopen("Valgrind_Test_Input.in", "r");
  printf("%s\n", FLineSpace(fin));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
lea    0xed1(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <FLineSpace@plt>
mov    %rax,%rsi
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0xed8(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,%rdi
call   1050 <FLineSpace@plt>
lea    0xec6(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Valgrind_Test_Input.in\00"
@.str.1 = [2 x i8] c"r\00"
@.str.2 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32*
%2 = call i32* @fopen(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = call i8* @FLineSpace(i32* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [23 x i8] c"Valgrind_Test_Input.in\00"
@.str.1 = [2 x i8] c"r\00"
@.str.2 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i8* @FLineSpace(i32* %1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SetGameBlock(int, int, int /*<<< orphan*/,
                                int /*<<< orphan*/, int /*<<< orphan*/);
void ClearGameBlock(int x, int y) { SetGameBlock(x, y, 0, 0, 0); }


x86 assembly (clang, -O0):
<ClearGameBlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
xor    %r8d,%r8d
mov    %r8d,%edx
mov    %r8d,%ecx
call   1030 <SetGameBlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ClearGameBlock>:
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <SetGameBlock@plt>

LLVM IR (-O0):
define void @ClearGameBlock(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @SetGameBlock(i32 %5, i32 %6, i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @ClearGameBlock(i32 %0, i32 %1) {
%3 = tail call i32 @SetGameBlock(i32 %0, i32 %1, i32 0, i32 0, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dtoi(float);
int /*<<< orphan*/ g2_set_ld(int /*<<< orphan*/);
void g2_set_ld_(float *dev) { g2_set_ld(dtoi(*dev)); }


x86 assembly (clang, -O0):
<g2_set_ld_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
call   1030 <dtoi@plt>
mov    %eax,%edi
call   1040 <g2_set_ld@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2_set_ld_>:
push   %rax
movss  (%rdi),%xmm0
call   1030 <dtoi@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <g2_set_ld@plt>

LLVM IR (-O0):
define void @g2_set_ld_(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = load float, float* %3
%5 = call i32 @dtoi(float %4)
%6 = call i32 @g2_set_ld(i32 %5)
ret void
}

LLVM IR (-O2):
define void @g2_set_ld_(float* nocapture %0) {
%2 = load float, float* %0
%3 = tail call i32 @dtoi(float %2)
%4 = tail call i32 @g2_set_ld(i32 %3)
ret void
}
void dj_set_dma_time(unsigned short time) {}


x86 assembly (clang, -O0):
<dj_set_dma_time>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dj_set_dma_time>:
ret

LLVM IR (-O0):
define void @dj_set_dma_time(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
ret void
}

LLVM IR (-O2):
define void @dj_set_dma_time(i16 zeroext %0) {
ret void
}
OP(fd, e6) { op_e6(); }


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <op_e6@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
xor    %eax,%eax
jmp    1030 <op_e6@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @op_e6()
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @op_e6()
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int /*<<< orphan*/ LLONG_MIN;
long long wcstox(int /*<<< orphan*/ const *, int /*<<< orphan*/ **, int,
                 int /*<<< orphan*/);
long long wcstoll(const wchar_t *restrict s, wchar_t **restrict p, int base) {
  return wcstox(s, p, base, LLONG_MIN);
}


x86 assembly (clang, -O0):
<wcstoll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
mov    0x2eab(%rip),%rax
mov    (%rax),%ecx
call   1030 <wcstox@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcstoll>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%ecx
jmp    1030 <wcstox@plt>

LLVM IR (-O0):
@LLONG_MIN = global i32 0
define i64 @wcstoll(i32* noalias %0, i32** noalias %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32**
%6 = alloca i32
store i32* %0, i32** %4
store i32** %1, i32*** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32**, i32*** %5
%9 = load i32, i32* %6
%10 = load i32, i32* @LLONG_MIN
%11 = call i64 @wcstox(i32* %7, i32** %8, i32 %9, i32 %10)
ret i64 %11
}

LLVM IR (-O2):
@LLONG_MIN = global i32 0
define i64 @wcstoll(i32* noalias %0, i32** noalias %1, i32 %2) {
%4 = load i32, i32* @LLONG_MIN
%5 = tail call i64 @wcstox(i32* %0, i32** %1, i32 %2, i32 %4)
ret i64 %5
}
int gensdf_dfcn1(int x0, int y0, int x1, int y1) {
  int dy, dx, dx1, dy1, d0, d1, d;
  dx = x1 - x0;
  dy = y1 - y0;
  dy1 = dy >> 2;
  d0 = dx * dx + dy * dy;
  d1 = dx * dx + dy1 * dy1;
  d = 2 * d0 - d1;
  return (d);
}


x86 assembly (clang, -O0):
<gensdf_dfcn1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sar    $0x2,%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%eax
imul   -0x18(%rbp),%eax
mov    -0x14(%rbp),%ecx
imul   -0x14(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%eax
imul   -0x18(%rbp),%eax
mov    -0x20(%rbp),%ecx
imul   -0x20(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x28(%rbp)
mov    -0x24(%rbp),%eax
shl    $0x1,%eax
sub    -0x28(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x2c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gensdf_dfcn1>:
sub    %edi,%edx
sub    %esi,%ecx
mov    %ecx,%esi
sar    $0x2,%esi
imul   %edx,%edx
imul   %ecx,%ecx
lea    (%rcx,%rdx,1),%eax
imul   %esi,%esi
add    %eax,%eax
add    %edx,%esi
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @gensdf_dfcn1(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%16 = load i32, i32* %7
%17 = load i32, i32* %5
%18 = sub nsw i32 %16, %17
store i32 %18, i32* %10
%19 = load i32, i32* %8
%20 = load i32, i32* %6
%21 = sub nsw i32 %19, %20
store i32 %21, i32* %9
%22 = load i32, i32* %9
%23 = ashr i32 %22, 2
store i32 %23, i32* %12
%24 = load i32, i32* %10
%25 = load i32, i32* %10
%26 = mul nsw i32 %24, %25
%27 = load i32, i32* %9
%28 = load i32, i32* %9
%29 = mul nsw i32 %27, %28
%30 = add nsw i32 %26, %29
store i32 %30, i32* %13
%31 = load i32, i32* %10
%32 = load i32, i32* %10
%33 = mul nsw i32 %31, %32
%34 = load i32, i32* %12
%35 = load i32, i32* %12
%36 = mul nsw i32 %34, %35
%37 = add nsw i32 %33, %36
store i32 %37, i32* %14
%38 = load i32, i32* %13
%39 = mul nsw i32 2, %38
%40 = load i32, i32* %14
%41 = sub nsw i32 %39, %40
store i32 %41, i32* %15
%42 = load i32, i32* %15
ret i32 %42
}

LLVM IR (-O2):
define i32 @gensdf_dfcn1(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = sub nsw i32 %2, %0
%6 = sub nsw i32 %3, %1
%7 = ashr i32 %6, 2
%8 = mul nsw i32 %5, %5
%9 = mul nsw i32 %6, %6
%10 = add nuw nsw i32 %9, %8
%11 = mul nsw i32 %7, %7
%12 = shl nuw nsw i32 %10, 1
%13 = add nuw i32 %11, %8
%14 = sub i32 %12, %13
ret i32 %14
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ m62_reset();
int /*<<< orphan*/ p16c8init(int /*<<< orphan*/ *, int /*<<< orphan*/,
                             int /*<<< orphan*/ *, int /*<<< orphan*/,
                             int /*<<< orphan*/ *, int /*<<< orphan*/);
void m62_init(uint8_t *prgROMin, uint32_t prgROMsizeIn, uint8_t *prgRAMin,
              uint32_t prgRAMsizeIn, uint8_t *chrROMin, uint32_t chrROMsizeIn) {
  p16c8init(prgROMin, prgROMsizeIn, prgRAMin, prgRAMsizeIn, chrROMin,
            chrROMsizeIn);
  m62_reset();
}


x86 assembly (clang, -O0):
<m62_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x28(%rbp),%r8
mov    -0x2c(%rbp),%r9d
call   1040 <p16c8init@plt>
mov    $0x0,%al
call   1030 <m62_reset@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m62_init>:
push   %rax
call   1040 <p16c8init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <m62_reset@plt>

LLVM IR (-O0):
define void @m62_init(i32* %0, i32 %1, i32* %2, i32 %3, i32* %4, i32 %5) {
%7 = alloca i32*
%8 = alloca i32
%9 = alloca i32*
%10 = alloca i32
%11 = alloca i32*
%12 = alloca i32
store i32* %0, i32** %7
store i32 %1, i32* %8
store i32* %2, i32** %9
store i32 %3, i32* %10
store i32* %4, i32** %11
store i32 %5, i32* %12
%13 = load i32*, i32** %7
%14 = load i32, i32* %8
%15 = load i32*, i32** %9
%16 = load i32, i32* %10
%17 = load i32*, i32** %11
%18 = load i32, i32* %12
%19 = call i32 @p16c8init(i32* %13, i32 %14, i32* %15, i32 %16, i32* %17, i32 %18)
%20 = call i32 (...) @m62_reset()
ret void
}

LLVM IR (-O2):
define void @m62_init(i32* %0, i32 %1, i32* %2, i32 %3, i32* %4, i32 %5) {
%7 = tail call i32 @p16c8init(i32* %0, i32 %1, i32* %2, i32 %3, i32* %4, i32 %5)
%8 = tail call i32 (...) @m62_reset()
ret void
}
haskXDrawString(int x, int y, char *str) { return (0); }


x86 assembly (clang, -O0):
<haskXDrawString>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<haskXDrawString>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @haskXDrawString(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @haskXDrawString(i32 %0, i32 %1, i8* nocapture readnone %2) {
ret i32 0
}
/* Variables and functions */
long generate_key(char *, int);
long int secondary_hash(char *string, int a, int b) {
  long int key = generate_key(string, 10010101);
  return (a * key + b) % 10010101;
}


x86 assembly (clang, -O0):
<secondary_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x98bdf5,%esi
call   1030 <generate_key@plt>
mov    %rax,-0x18(%rbp)
movslq -0xc(%rbp),%rax
imul   -0x18(%rbp),%rax
movslq -0x10(%rbp),%rcx
add    %rcx,%rax
mov    $0x98bdf5,%ecx
cqto
idiv   %rcx
mov    %rdx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<secondary_hash>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %esi,%ebp
mov    $0x98bdf5,%esi
call   1030 <generate_key@plt>
mov    %rax,%rcx
movslq %ebp,%rax
imul   %rax,%rcx
movslq %ebx,%rax
add    %rax,%rcx
movabs $0xd6881b496cedfe65,%rdx
1b 88 d6
mov    %rcx,%rax
imul   %rdx
add    %rcx,%rdx
mov    %rdx,%rax
shr    $0x3f,%rax
sar    $0x17,%rdx
add    %rax,%rdx
imul   $0x98bdf5,%rdx,%rax
sub    %rax,%rcx
mov    %rcx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i64 @secondary_hash(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = call i64 @generate_key(i8* %8, i32 10010101)
store i64 %9, i64* %7
%10 = load i32, i32* %5
%11 = sext i32 %10 to i64
%12 = load i64, i64* %7
%13 = mul nsw i64 %11, %12
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = add nsw i64 %13, %15
%17 = srem i64 %16, 10010101
ret i64 %17
}

LLVM IR (-O2):
define i64 @secondary_hash(i8* %0, i32 %1, i32 %2) {
%4 = tail call i64 @generate_key(i8* %0, i32 10010101)
%5 = sext i32 %1 to i64
%6 = mul nsw i64 %4, %5
%7 = sext i32 %2 to i64
%8 = add nsw i64 %6, %7
%9 = srem i64 %8, 10010101
ret i64 %9
}
/* Type definitions */
struct addrinfo {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ freeaddrinfo(struct addrinfo *);
struct addrinfo *sxi_gethostai(char const *);
int sxi_is_valid_host(const char *host) {
  struct addrinfo *res = sxi_gethostai(host);
  if (!res)
    return 0;
  freeaddrinfo(res);
  return 1;
}


x86 assembly (clang, -O0):
<sxi_is_valid_host>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <sxi_gethostai@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1150 <sxi_is_valid_host+0x30>
movl   $0x0,-0x4(%rbp)
jmp    1160 <sxi_is_valid_host+0x40>
mov    -0x18(%rbp),%rdi
call   1040 <freeaddrinfo@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sxi_is_valid_host>:
push   %rax
call   1030 <sxi_gethostai@plt>
test   %rax,%rax
je     113a <sxi_is_valid_host+0x1a>
mov    %rax,%rdi
call   1040 <freeaddrinfo@plt>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.addrinfo = type { i32 }
define i32 @sxi_is_valid_host(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca %struct.addrinfo*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call %struct.addrinfo* @sxi_gethostai(i8* %5)
store %struct.addrinfo* %6, %struct.addrinfo** %4
%7 = load %struct.addrinfo*, %struct.addrinfo** %4
%8 = icmp ne %struct.addrinfo* %7, null
br i1 %8, label %10, label %9
9: ; preds = %1
store i32 0, i32* %2
br label %13
10: ; preds = %1
%11 = load %struct.addrinfo*, %struct.addrinfo** %4
%12 = call i32 @freeaddrinfo(%struct.addrinfo* %11)
store i32 1, i32* %2
br label %13
13: ; preds = %10, %9
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
%struct.addrinfo = type { i32 }
define i32 @sxi_is_valid_host(i8* %0) {
%2 = tail call %struct.addrinfo* @sxi_gethostai(i8* %0)
%3 = icmp eq %struct.addrinfo* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @freeaddrinfo(%struct.addrinfo* %2)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ geteuid();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ setreuid(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ system(char *);
int main() {
  setreuid(geteuid(), geteuid());
  printf("Regenerating authorized_keys file...\n");
  system("/srv/hg/bin/genauth --update");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <geteuid@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1050 <geteuid@plt>
mov    -0x4(%rbp),%edi
mov    %eax,%esi
call   1060 <setreuid@plt>
lea    0xe96(%rip),%rdi
call   1040 <printf@plt>
lea    0xeb0(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1050 <geteuid@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <geteuid@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   1060 <setreuid@plt>
lea    0xebc(%rip),%rdi
call   1030 <puts@plt>
lea    0xe93(%rip),%rdi
call   1040 <system@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [38 x i8] c"Regenerating authorized_keys file...\0A\00"
@.str.1 = [29 x i8] c"/srv/hg/bin/genauth --update\00"
define i32 @main() {
%1 = call i32 (...) @geteuid()
%2 = call i32 (...) @geteuid()
%3 = call i32 @setreuid(i32 %1, i32 %2)
%4 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @system(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [29 x i8] c"/srv/hg/bin/genauth --update\00"
@str = [37 x i8] c"Regenerating authorized_keys file...\00"
define i32 @main() {
%1 = tail call i32 (...) @geteuid()
%2 = tail call i32 (...) @geteuid()
%3 = tail call i32 @setreuid(i32 %1, i32 %2)
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @str, i64 0, i64 0))
%5 = tail call i32 @system(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
unsigned long inb(unsigned long port) {
  return *(volatile unsigned char *)((0xfffffc0000000000UL + 0x8900000000UL) +
                                     port);
}


x86 assembly (clang, -O0):
<inb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movabs $0xfffffc8900000000,%rax
fc ff ff
add    -0x8(%rbp),%rax
mov    (%rax),%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inb>:
movabs $0xfffffc8900000000,%rax
fc ff ff
movzbl (%rdi,%rax,1),%eax
ret

LLVM IR (-O0):
define i64 @inb(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 -3809635991552, %3
%5 = inttoptr i64 %4 to i8*
%6 = load volatile i8, i8* %5
%7 = zext i8 %6 to i64
ret i64 %7
}

LLVM IR (-O2):
define i64 @inb(i64 %0) {
%2 = add i64 %0, -3809635991552
%3 = inttoptr i64 %2 to i8*
%4 = load volatile i8, i8* %3
%5 = zext i8 %4 to i64
ret i64 %5
}
int is_space_or_tab(char c) { return (c == ' ' || c == '\t'); }


x86 assembly (clang, -O0):
<is_space_or_tab>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     1129 <is_space_or_tab+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x9,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_space_or_tab>:
cmp    $0x20,%dil
sete   %al
cmp    $0x9,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_space_or_tab(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 9
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_space_or_tab(i8 signext %0) {
%2 = icmp eq i8 %0, 32
%3 = icmp eq i8 %0, 9
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}