xunge/DecIR huggingface dataset:
float mlaf(float x, float y, float z) { return x * y + z; }


x86 assembly (clang, -O0):
<mlaf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm2
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlaf>:
mulss  %xmm1,%xmm0
addss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @mlaf(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call float @llvm.fmuladd.f32(float %7, float %8, float %9)
ret float %10
}

LLVM IR (-O2):
define float @mlaf(float %0, float %1, float %2) {
%4 = tail call float @llvm.fmuladd.f32(float %0, float %1, float %2)
ret float %4
}
int check(char *user_pass, char *pass) {
  int index = 0;
  while (user_pass[index] != 0) {
    if (user_pass[index] != pass[index]) {
      return 0;
    }
    index++;
  }
  return 1;
}


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1162 <check+0x62>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
mov    -0x18(%rbp),%rcx
movslq -0x1c(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
je     1154 <check+0x54>
movl   $0x0,-0x4(%rbp)
jmp    1169 <check+0x69>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1113 <check+0x13>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
mov    (%rdi),%cl
mov    $0x1,%eax
test   %cl,%cl
je     1122 <check+0x22>
xor    %edx,%edx
nopl   (%rax)
cmp    (%rsi,%rdx,1),%cl
jne    1123 <check+0x23>
movzbl 0x1(%rdi,%rdx,1),%ecx
add    $0x1,%rdx
test   %cl,%cl
jne    1110 <check+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @check(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 0, i32* %6
br label %7
7: ; preds = %30, %2
%8 = load i8*, i8** %4
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %33
15: ; preds = %7
%16 = load i8*, i8** %4
%17 = load i32, i32* %6
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = load i8*, i8** %5
%23 = load i32, i32* %6
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i8, i8* %22, i64 %24
%26 = load i8, i8* %25
%27 = sext i8 %26 to i32
%28 = icmp ne i32 %21, %27
br i1 %28, label %29, label %30
29: ; preds = %15
store i32 0, i32* %3
br label %34
30: ; preds = %15
%31 = load i32, i32* %6
%32 = add nsw i32 %31, 1
store i32 %32, i32* %6
br label %7
33: ; preds = %7
store i32 1, i32* %3
br label %34
34: ; preds = %33, %29
%35 = load i32, i32* %3
ret i32 %35
}

LLVM IR (-O2):
define i32 @check(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %9
5: ; preds = %9
%6 = getelementptr inbounds i8, i8* %0, i64 %15
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %16, label %9
9: ; preds = %2, %5
%10 = phi i64 [ %15, %5 ], [ 0, %2 ]
%11 = phi i8 [ %7, %5 ], [ %3, %2 ]
%12 = getelementptr inbounds i8, i8* %1, i64 %10
%13 = load i8, i8* %12
%14 = icmp eq i8 %11, %13
%15 = add nuw i64 %10, 1
br i1 %14, label %5, label %16
16: ; preds = %9, %5, %2
%17 = phi i32 [ 1, %2 ], [ 1, %5 ], [ 0, %9 ]
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_mainloop_dispatch() {
  printf("NOT IMPLEMENTED:"
         "pa_mainloop_dispatch"
         "\n");
}


x86 assembly (clang, -O0):
<pa_mainloop_dispatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_mainloop_dispatch>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [38 x i8] c"NOT IMPLEMENTED:pa_mainloop_dispatch\0A\00"
define i32 @pa_mainloop_dispatch() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [37 x i8] c"NOT IMPLEMENTED:pa_mainloop_dispatch\00"
define i32 @pa_mainloop_dispatch() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0xa1() {
  Assert_real((isascii(161) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              810, ("isascii should be 0 for 0xa1"));
}


x86 assembly (clang, -O0):
<t_isascii_0xa1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa1,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x32a,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0xa1>:
push   %rax
mov    $0xa1,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x32a,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xa1\00"
define void @t_isascii_0xa1() {
%1 = call i64 @isascii(i32 161)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 810, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xa1\00"
define void @t_isascii_0xa1() {
%1 = tail call i64 @isascii(i32 161)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 810, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef void class;

/* Variables and functions */
scalar_t__ IS_ERR(void *);
int /*<<< orphan*/ class_unregister(void *);
void class_destroy(struct class *cls) {
  if ((cls == ((void *)0)) || (IS_ERR(cls)))
    return;
  class_unregister(cls);
}


x86 assembly (clang, -O0):
<class_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     114a <class_destroy+0x2a>
mov    -0x8(%rbp),%rdi
call   1040 <IS_ERR@plt>
cmp    $0x0,%rax
je     114f <class_destroy+0x2f>
jmp    1158 <class_destroy+0x38>
mov    -0x8(%rbp),%rdi
call   1030 <class_unregister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<class_destroy>:
push   %rbx
test   %rdi,%rdi
je     1133 <class_destroy+0x13>
mov    %rdi,%rbx
call   1040 <IS_ERR@plt>
test   %rax,%rax
je     1135 <class_destroy+0x15>
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <class_unregister@plt>

LLVM IR (-O0):
%struct.class = type opaque
define void @class_destroy(%struct.class* %0) {
%2 = alloca %struct.class*
store %struct.class* %0, %struct.class** %2
%3 = load %struct.class*, %struct.class** %2
%4 = icmp eq %struct.class* %3, null
br i1 %4, label %10, label %5
5: ; preds = %1
%6 = load %struct.class*, %struct.class** %2
%7 = bitcast %struct.class* %6 to i8*
%8 = call i64 @IS_ERR(i8* %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %5, %1
br label %15
11: ; preds = %5
%12 = load %struct.class*, %struct.class** %2
%13 = bitcast %struct.class* %12 to i8*
%14 = call i32 @class_unregister(i8* %13)
br label %15
15: ; preds = %11, %10
ret void
}

LLVM IR (-O2):
%struct.class = type opaque
define void @class_destroy(%struct.class* %0) {
%2 = icmp eq %struct.class* %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = bitcast %struct.class* %0 to i8*
%5 = tail call i64 @IS_ERR(i8* %4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = tail call i32 @class_unregister(i8* %4)
br label %9
9: ; preds = %1, %3, %7
ret void
}
void f6(void) {
  char buf[4096 * 10 + 512];
  asm volatile("" : : "g"(&buf) : "memory");
}


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa190,%rsp
lea    -0xa200(%rbp),%rax
mov    %rax,-0xa208(%rbp)
add    $0xa190,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
sub    $0xa198,%rsp
lea    -0x70(%rsp),%rax
mov    %rax,-0x78(%rsp)
add    $0xa198,%rsp
ret

LLVM IR (-O0):
define void @f6() {
%1 = alloca [41472 x i8]
ret void
}

LLVM IR (-O2):
define void @f6() {
%1 = alloca [41472 x i8]
%2 = getelementptr inbounds [41472 x i8], [41472 x i8]* %1, i64 0, i64 0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MWRateSettingsHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void MWRateSettingsUpdated() { UAVObjUpdated(MWRateSettingsHandle()); }


x86 assembly (clang, -O0):
<MWRateSettingsUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <MWRateSettingsHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MWRateSettingsUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <MWRateSettingsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @MWRateSettingsUpdated() {
%1 = call i32 (...) @MWRateSettingsHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @MWRateSettingsUpdated() {
%1 = tail call i32 (...) @MWRateSettingsHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
/* Variables and functions */
double lrand();
double frand(void) { return lrand() * (1.0 / (0x7FFFFFFFL + 1.0)); }


x86 assembly (clang, -O0):
<frand>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <lrand@plt>
movsd  0xedd(%rip),%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<frand>:
push   %rax
xor    %eax,%eax
call   1030 <lrand@plt>
mulsd  0xee0(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @frand() {
%1 = call double (...) @lrand()
%2 = fmul double %1, 0x3E00000000000000
ret double %2
}

LLVM IR (-O2):
define double @frand() {
%1 = tail call double (...) @lrand()
%2 = fmul double %1, 0x3E00000000000000
ret double %2
}
int main() { return sizeof(unsigned long); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 8
}

LLVM IR (-O2):
define i32 @main() {
ret i32 8
}
int square(int num1) { return num1 * num1; }


x86 assembly (clang, -O0):
<square>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<square>:
mov    %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @square(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @square(i32 %0) {
%2 = mul nsw i32 %0, %0
ret i32 %2
}
unsigned int devicePinGetSoftwareRevision() { return 1; }


x86 assembly (clang, -O0):
<devicePinGetSoftwareRevision>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<devicePinGetSoftwareRevision>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @devicePinGetSoftwareRevision() {
ret i32 1
}

LLVM IR (-O2):
define i32 @devicePinGetSoftwareRevision() {
ret i32 1
}
/* Variables and functions */
int s5p_sdhci_init(unsigned int, int, int);
int samsung_get_base_mmc();
int s5p_mmc_init(int index, int bus_width) {
  unsigned int base = samsung_get_base_mmc() + (0x100000 * index);
  return s5p_sdhci_init(base, index, bus_width);
}


x86 assembly (clang, -O0):
<s5p_mmc_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <samsung_get_base_mmc@plt>
mov    -0x4(%rbp),%ecx
shl    $0x14,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x4(%rbp),%esi
mov    -0x8(%rbp),%edx
call   1030 <s5p_sdhci_init@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s5p_mmc_init>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1040 <samsung_get_base_mmc@plt>
mov    %ebp,%edi
shl    $0x14,%edi
add    %eax,%edi
mov    %ebp,%esi
mov    %ebx,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <s5p_sdhci_init@plt>

LLVM IR (-O0):
define i32 @s5p_mmc_init(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = call i32 (...) @samsung_get_base_mmc()
%7 = load i32, i32* %3
%8 = mul nsw i32 1048576, %7
%9 = add nsw i32 %6, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = call i32 @s5p_sdhci_init(i32 %10, i32 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @s5p_mmc_init(i32 %0, i32 %1) {
%3 = tail call i32 (...) @samsung_get_base_mmc()
%4 = shl nsw i32 %0, 20
%5 = add nsw i32 %3, %4
%6 = tail call i32 @s5p_sdhci_init(i32 %5, i32 %0, i32 %1)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: tget [-flag id] [-num id] [-str id] [-goto col line] "
                  "[[-echo] string]\n");
  exit(-1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [78 x i8] c"Usage: tget [-flag id] [-num id] [-str id] [-goto col line] [[-echo] string]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [78 x i8] c"Usage: tget [-flag id] [-num id] [-str id] [-goto col line] [[-echo] string]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([78 x i8], [78 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 -1)
unreachable
}
double ls_costN_nm2_sq(double x) { return x * x; }


x86 assembly (clang, -O0):
<ls_costN_nm2_sq>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm2_sq>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @ls_costN_nm2_sq(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @ls_costN_nm2_sq(double %0) {
%2 = fmul double %0, %0
ret double %2
}
void timer_setup(void) {}


x86 assembly (clang, -O0):
<timer_setup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timer_setup>:
ret

LLVM IR (-O0):
define void @timer_setup() {
ret void
}

LLVM IR (-O2):
define void @timer_setup() {
ret void
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ close_range_cloexec(struct __test_metadata *);
void wrapper_close_range_cloexec(struct __test_metadata *_metadata,
                                 struct __fixture_variant_metadata *variant) {
  close_range_cloexec(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_close_range_cloexec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <close_range_cloexec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_close_range_cloexec>:
jmp    1030 <close_range_cloexec@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_close_range_cloexec(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @close_range_cloexec(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_close_range_cloexec(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @close_range_cloexec(%struct.__test_metadata* %0)
ret void
}
int whitespace(char x) { return (x == ' ' || x == '\t'); }


x86 assembly (clang, -O0):
<whitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     1129 <whitespace+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x9,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<whitespace>:
cmp    $0x20,%dil
sete   %al
cmp    $0x9,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @whitespace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 9
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @whitespace(i8 signext %0) {
%2 = icmp eq i8 %0, 32
%3 = icmp eq i8 %0, 9
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ hs_init(int *, char ***);
void dexInit() {
  int argc = 0;
  char *argv[] = {NULL};
  char **pargv = argv;
  hs_init(&argc, &pargv);
}


x86 assembly (clang, -O0):
<dexInit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1030 <memset@plt>
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0x4(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1040 <hs_init@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dexInit>:
sub    $0x18,%rsp
movl   $0x0,0x4(%rsp)
movq   $0x0,0x10(%rsp)
lea    0x10(%rsp),%rax
mov    %rax,0x8(%rsp)
lea    0x4(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <hs_init@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @dexInit() {
%1 = alloca i32
%2 = alloca [1 x i8*]
%3 = alloca i8**
store i32 0, i32* %1
%4 = bitcast [1 x i8*]* %2 to i8*
%5 = getelementptr inbounds [1 x i8*], [1 x i8*]* %2, i64 0, i64 0
store i8** %5, i8*** %3
%6 = call i32 @hs_init(i32* %1, i8*** %3)
ret void
}

LLVM IR (-O2):
define void @dexInit() {
%1 = alloca i32
%2 = alloca [1 x i8*]
%3 = alloca i8**
%4 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%5 = bitcast [1 x i8*]* %2 to i8*
%6 = bitcast [1 x i8*]* %2 to i64*
store i64 0, i64* %6
%7 = bitcast i8*** %3 to i8*
%8 = getelementptr inbounds [1 x i8*], [1 x i8*]* %2, i64 0, i64 0
store i8** %8, i8*** %3
%9 = call i32 @hs_init(i32* %1, i8*** %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void main() {
  int n, m;
  int i = 1;
  m = 10;
  while (i < n) {
    while (m > 0) {
      m--;
      i = 2 * i;
    }
  }
  assert(i > 0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0xc(%rbp)
movl   $0xa,-0x8(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    115d <main+0x4d>
jmp    1137 <main+0x27>
cmpl   $0x0,-0x8(%rbp)
jle    1158 <main+0x48>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1137 <main+0x27>
jmp    1126 <main+0x16>
cmpl   $0x0,-0xc(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 1, i32* %3
store i32 10, i32* %2
br label %4
4: ; preds = %17, %0
%5 = load i32, i32* %3
%6 = load i32, i32* %1
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %18
8: ; preds = %4
br label %9
9: ; preds = %12, %8
%10 = load i32, i32* %2
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %9
%13 = load i32, i32* %2
%14 = add nsw i32 %13, -1
store i32 %14, i32* %2
%15 = load i32, i32* %3
%16 = mul nsw i32 2, %15
store i32 %16, i32* %3
br label %9
17: ; preds = %9
br label %4
18: ; preds = %4
%19 = load i32, i32* %3
%20 = icmp sgt i32 %19, 0
%21 = zext i1 %20 to i32
%22 = call i32 @assert(i32 %21)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @assert(i32 1)
ret void
}
void h_cgact(char *name, int argc, char **argv, void *user_data) {
  printf("Called: %s\n", __FUNCTION__);
}


x86 assembly (clang, -O0):
<h_cgact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    0xed2(%rip),%rdi
lea    0xed7(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h_cgact>:
lea    0xee9(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"Called: %s\0A\00"
@__FUNCTION__.h_cgact = [8 x i8] c"h_cgact\00"
define void @h_cgact(i8* %0, i32 %1, i8** %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
store i8* %3, i8** %8
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__FUNCTION__.h_cgact, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"Called: %s\0A\00"
@__FUNCTION__.h_cgact = [8 x i8] c"h_cgact\00"
define void @h_cgact(i8* nocapture readnone %0, i32 %1, i8** nocapture readnone %2, i8* nocapture readnone %3) {
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__FUNCTION__.h_cgact, i64 0, i64 0))
ret void
}
/* Type definitions */
struct query {
  int dummy;
};
struct module {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ decorate(struct module *, struct query *, int);
void postProcess(struct module *module, struct query *query) {
  decorate(module, query, 1);
}


x86 assembly (clang, -O0):
<postProcess>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <decorate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<postProcess>:
mov    $0x1,%edx
jmp    1030 <decorate@plt>

LLVM IR (-O0):
%struct.module = type { i32 }
%struct.query = type { i32 }
define void @postProcess(%struct.module* %0, %struct.query* %1) {
%3 = alloca %struct.module*
%4 = alloca %struct.query*
store %struct.module* %0, %struct.module** %3
store %struct.query* %1, %struct.query** %4
%5 = load %struct.module*, %struct.module** %3
%6 = load %struct.query*, %struct.query** %4
%7 = call i32 @decorate(%struct.module* %5, %struct.query* %6, i32 1)
ret void
}

LLVM IR (-O2):
%struct.module = type { i32 }
%struct.query = type { i32 }
define void @postProcess(%struct.module* %0, %struct.query* %1) {
%3 = tail call i32 @decorate(%struct.module* %0, %struct.query* %1, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalpha(int);
void t_isalpha_0x50() {
  Assert_real((isalpha(80)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              405, ("isalpha should be 1 for P"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x50>:
push   %rbp
mov    %rsp,%rbp
mov    $0x50,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x195,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x50>:
push   %rax
mov    $0x50,%edi
call   1030 <isalpha@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x195,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for P\00"
define void @t_isalpha_0x50() {
%1 = call i32 @isalpha(i32 80)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 405, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for P\00"
define void @t_isalpha_0x50() {
%1 = tail call i32 @isalpha(i32 80)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 405, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
int sigtimedwait(int /*<<< orphan*/ const *, int /*<<< orphan*/ *,
                 int /*<<< orphan*/ *);
int sigwaitinfo(const sigset_t *__restrict set, siginfo_t *__restrict info) {
  return sigtimedwait(set, info, NULL);
}


x86 assembly (clang, -O0):
<sigwaitinfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigtimedwait@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigwaitinfo>:
xor    %edx,%edx
jmp    1030 <sigtimedwait@plt>

LLVM IR (-O0):
define i32 @sigwaitinfo(i32* noalias %0, i32* noalias %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @sigtimedwait(i32* %5, i32* %6, i32* null)
ret i32 %7
}

LLVM IR (-O2):
define i32 @sigwaitinfo(i32* noalias %0, i32* noalias %1) {
%3 = tail call i32 @sigtimedwait(i32* %0, i32* %1, i32* null)
ret i32 %3
}
/* Type definitions */
struct tcb {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ CDE_end_mkdir(struct tcb *, int);
void CDE_end_mkdirat(struct tcb *tcp) { CDE_end_mkdir(tcp, 1); }


x86 assembly (clang, -O0):
<CDE_end_mkdirat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <CDE_end_mkdir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CDE_end_mkdirat>:
mov    $0x1,%esi
jmp    1030 <CDE_end_mkdir@plt>

LLVM IR (-O0):
%struct.tcb = type { i32 }
define void @CDE_end_mkdirat(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
%3 = load %struct.tcb*, %struct.tcb** %2
%4 = call i32 @CDE_end_mkdir(%struct.tcb* %3, i32 1)
ret void
}

LLVM IR (-O2):
%struct.tcb = type { i32 }
define void @CDE_end_mkdirat(%struct.tcb* %0) {
%2 = tail call i32 @CDE_end_mkdir(%struct.tcb* %0, i32 1)
ret void
}
int do_642() { return 642; }


x86 assembly (clang, -O0):
<do_642>:
push   %rbp
mov    %rsp,%rbp
mov    $0x282,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_642>:
mov    $0x282,%eax
ret

LLVM IR (-O0):
define i32 @do_642() {
ret i32 642
}

LLVM IR (-O2):
define i32 @do_642() {
ret i32 642
}
int StressTestMaybeGetChar() {
  static int i;
  char c = "dir\r"[i];
  i = (i + 1) & 3;
  return c;
}


x86 assembly (clang, -O0):
<StressTestMaybeGetChar>:
push   %rbp
mov    %rsp,%rbp
movslq 0x2f19(%rip),%rcx
lea    0xeee(%rip),%rax
mov    (%rax,%rcx,1),%al
mov    %al,-0x1(%rbp)
mov    0x2f06(%rip),%eax
add    $0x1,%eax
and    $0x3,%eax
mov    %eax,0x2efa(%rip)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<StressTestMaybeGetChar>:
mov    0x2f1e(%rip),%ecx
lea    0xef3(%rip),%rax
movsbl (%rcx,%rax,1),%eax
add    $0x1,%ecx
and    $0x3,%ecx
mov    %ecx,0x2f07(%rip)
ret

LLVM IR (-O0):
@StressTestMaybeGetChar.i = internal global i32 0
@.str = [5 x i8] c"dir\0D\00"
define i32 @StressTestMaybeGetChar() {
%1 = alloca i8
%2 = load i32, i32* @StressTestMaybeGetChar.i
%3 = sext i32 %2 to i64
%4 = getelementptr inbounds [5 x i8], [5 x i8]* @.str, i64 0, i64 %3
%5 = load i8, i8* %4
store i8 %5, i8* %1
%6 = load i32, i32* @StressTestMaybeGetChar.i
%7 = add nsw i32 %6, 1
%8 = and i32 %7, 3
store i32 %8, i32* @StressTestMaybeGetChar.i
%9 = load i8, i8* %1
%10 = sext i8 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
@StressTestMaybeGetChar.i = internal unnamed_addr global i32 0
@.str = [5 x i8] c"dir\0D\00"
define i32 @StressTestMaybeGetChar() {
%1 = load i32, i32* @StressTestMaybeGetChar.i
%2 = zext i32 %1 to i64
%3 = getelementptr inbounds [5 x i8], [5 x i8]* @.str, i64 0, i64 %2
%4 = load i8, i8* %3
%5 = add nsw i32 %1, 1
%6 = and i32 %5, 3
store i32 %6, i32* @StressTestMaybeGetChar.i
%7 = sext i8 %4 to i32
ret i32 %7
}
void a_or(volatile void *p, int v) {
  __asm__("lock ; orl %1, %0" : "=m"(*(int *)p) : "r"(v) : "memory");
}


x86 assembly (clang, -O0):
<a_or>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
lock or %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<a_or>:
lock or %esi,(%rdi)
ret

LLVM IR (-O0):
define void @a_or(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @a_or(i8* %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
tail call void asm "lock ; orl $1, $0", "=*m,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %3, i32 %1)
ret void
}
/* Variables and functions */
size_t leftChild(size_t);
size_t rightChild(size_t parent) { return leftChild(parent) + 1; }


x86 assembly (clang, -O0):
<rightChild>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <leftChild@plt>
add    $0x1,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rightChild>:
push   %rax
call   1030 <leftChild@plt>
add    $0x1,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @rightChild(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @leftChild(i64 %3)
%5 = add i64 %4, 1
ret i64 %5
}

LLVM IR (-O2):
define i64 @rightChild(i64 %0) {
%2 = tail call i64 @leftChild(i64 %0)
%3 = add i64 %2, 1
ret i64 %3
}
int vecEqual(double a[3], double b[3]) {
  return (a[0] == b[0] && a[1] == b[1] && a[2] == b[2]);
}


x86 assembly (clang, -O0):
<vecEqual>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
ucomisd (%rcx),%xmm0
mov    %al,-0x11(%rbp)
jne    116d <vecEqual+0x6d>
jp     116d <vecEqual+0x6d>
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
ucomisd 0x8(%rcx),%xmm0
mov    %al,-0x11(%rbp)
jne    116d <vecEqual+0x6d>
jp     116d <vecEqual+0x6d>
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x10(%rbp),%rax
ucomisd 0x10(%rax),%xmm0
sete   %al
setnp  %cl
and    %cl,%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vecEqual>:
movsd  (%rdi),%xmm0
xor    %eax,%eax
ucomisd (%rsi),%xmm0
jne    112f <vecEqual+0x2f>
jp     112f <vecEqual+0x2f>
movsd  0x8(%rdi),%xmm0
ucomisd 0x8(%rsi),%xmm0
jne    112f <vecEqual+0x2f>
jp     112f <vecEqual+0x2f>
movsd  0x10(%rsi),%xmm0
cmpeqsd 0x10(%rdi),%xmm0
movq   %xmm0,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @vecEqual(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double*, double** %4
%9 = getelementptr inbounds double, double* %8, i64 0
%10 = load double, double* %9
%11 = fcmp oeq double %7, %10
br i1 %11, label %12, label %28
12: ; preds = %2
%13 = load double*, double** %3
%14 = getelementptr inbounds double, double* %13, i64 1
%15 = load double, double* %14
%16 = load double*, double** %4
%17 = getelementptr inbounds double, double* %16, i64 1
%18 = load double, double* %17
%19 = fcmp oeq double %15, %18
br i1 %19, label %20, label %28
20: ; preds = %12
%21 = load double*, double** %3
%22 = getelementptr inbounds double, double* %21, i64 2
%23 = load double, double* %22
%24 = load double*, double** %4
%25 = getelementptr inbounds double, double* %24, i64 2
%26 = load double, double* %25
%27 = fcmp oeq double %23, %26
br label %28
28: ; preds = %20, %12, %2
%29 = phi i1 [ false, %12 ], [ false, %2 ], [ %27, %20 ]
%30 = zext i1 %29 to i32
ret i32 %30
}

LLVM IR (-O2):
define i32 @vecEqual(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = fcmp oeq double %3, %4
br i1 %5, label %6, label %19
6: ; preds = %2
%7 = getelementptr inbounds double, double* %0, i64 1
%8 = load double, double* %7
%9 = getelementptr inbounds double, double* %1, i64 1
%10 = load double, double* %9
%11 = fcmp oeq double %8, %10
br i1 %11, label %12, label %19
12: ; preds = %6
%13 = getelementptr inbounds double, double* %0, i64 2
%14 = load double, double* %13
%15 = getelementptr inbounds double, double* %1, i64 2
%16 = load double, double* %15
%17 = fcmp oeq double %14, %16
%18 = zext i1 %17 to i32
br label %19
19: ; preds = %12, %6, %2
%20 = phi i32 [ 0, %6 ], [ 0, %2 ], [ %18, %12 ]
ret i32 %20
}
/* Variables and functions */
int ssds_get_gen_num(int, char *, char *, char *);
int ssds_get_item_id(int pcfd, char *class_def) {
  return ssds_get_gen_num(pcfd, class_def, "gi", "i_id");
}


x86 assembly (clang, -O0):
<ssds_get_item_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
lea    0xed3(%rip),%rdx
lea    0xecf(%rip),%rcx
call   1030 <ssds_get_gen_num@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssds_get_item_id>:
lea    0xee9(%rip),%rdx
lea    0xee5(%rip),%rcx
jmp    1030 <ssds_get_gen_num@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"gi\00"
@.str.1 = [5 x i8] c"i_id\00"
define i32 @ssds_get_item_id(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @ssds_get_gen_num(i32 %5, i8* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret i32 %7
}

LLVM IR (-O2):
@.str = [3 x i8] c"gi\00"
@.str.1 = [5 x i8] c"i_id\00"
define i32 @ssds_get_item_id(i32 %0, i8* %1) {
%3 = tail call i32 @ssds_get_gen_num(i32 %0, i8* %1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret i32 %3
}
void INT_Excep_PERIB_INTB145(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIB_INTB145>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIB_INTB145>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIB_INTB145() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIB_INTB145() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isgraph(int);
void t_isgraph_0x2c() {
  Assert_real((isgraph(44)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              225, ("isgraph should be 1 for ,"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x2c>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2c,%edi
call   1040 <isgraph@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0xe1,%edx
lea    0xf65(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x2c>:
push   %rax
mov    $0x2c,%edi
call   1040 <isgraph@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0xe1,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for ,\00"
define void @t_isgraph_0x2c() {
%1 = call i32 @isgraph(i32 44)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 225, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for ,\00"
define void @t_isgraph_0x2c() {
%1 = tail call i32 @isgraph(i32 44)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 225, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void mdp4_dtv_vsync_ctrl(int cndx, long long *vtime) {}


x86 assembly (clang, -O0):
<mdp4_dtv_vsync_ctrl>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp4_dtv_vsync_ctrl>:
ret

LLVM IR (-O0):
define void @mdp4_dtv_vsync_ctrl(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
ret void
}

LLVM IR (-O2):
define void @mdp4_dtv_vsync_ctrl(i32 %0, i64* nocapture %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t fwrite(void const *, int, int, int /*<<< orphan*/ *);
size_t write_bin(FILE *fp, const void *array, int arrayBytes) {
  return fwrite(array, 1, arrayBytes, fp);
}


x86 assembly (clang, -O0):
<write_bin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rcx
mov    $0x1,%esi
call   1030 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_bin>:
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x1,%esi
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
define i64 @write_bin(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = load i32, i32* %6
%9 = load i32*, i32** %4
%10 = call i64 @fwrite(i8* %7, i32 1, i32 %8, i32* %9)
ret i64 %10
}

LLVM IR (-O2):
define i64 @write_bin(i32* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = tail call i64 @fwrite(i8* %1, i32 1, i32 %2, i32* %0)
ret i64 %4
}
void mdp4_dsi_cmd_blt_stop(struct msm_fb_data_type *mfd) {}


x86 assembly (clang, -O0):
<mdp4_dsi_cmd_blt_stop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp4_dsi_cmd_blt_stop>:
ret

LLVM IR (-O0):
%struct.msm_fb_data_type = type opaque
define void @mdp4_dsi_cmd_blt_stop(%struct.msm_fb_data_type* %0) {
%2 = alloca %struct.msm_fb_data_type*
store %struct.msm_fb_data_type* %0, %struct.msm_fb_data_type** %2
ret void
}

LLVM IR (-O2):
%struct.msm_fb_data_type = type opaque
define void @mdp4_dsi_cmd_blt_stop(%struct.msm_fb_data_type* nocapture %0) {
ret void
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
scalar_t__ getpid();
int /*<<< orphan*/ printf(char *, long);
int main(int argc, char **argv) {
  pid_t my_id;
  my_id = getpid();
  printf("my process id is %ld\n", (long)my_id);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xeb4(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"my process id is %ld\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i64 (...) @getpid()
store i64 %7, i64* %6
%8 = load i64, i64* %6
%9 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i64 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"my process id is %ld\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @getpid()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i64 %3)
ret i32 0
}
void gtk_alignment_set() {}


x86 assembly (clang, -O0):
<gtk_alignment_set>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_alignment_set>:
ret

LLVM IR (-O0):
define void @gtk_alignment_set() {
ret void
}

LLVM IR (-O2):
define void @gtk_alignment_set() {
ret void
}
/* Variables and functions */
int fn_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110(
    char const *);
int fn_al_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110(
    const char *text) {
  int pos = 0;
  pos =
      fn_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110(
          text);
  if (pos != -1)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
<fn_al_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <fn_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0xffffffff,-0x14(%rbp)
je     1144 <fn_al_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114b <fn_al_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110+0x3b>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_al_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110>:
jmp    1030 <fn_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110@plt>

LLVM IR (-O0):
define i32 @fn_al_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @fn_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, -1
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %12
11: ; preds = %1
store i32 -1, i32* %2
br label %12
12: ; preds = %11, %9
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @fn_al_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110(i8* %0) {
%2 = tail call i32 @fn_sq_ch_67_ch_108_ch_97_ch_115_ch_115_ch_65_ch_115_ch_115_ch_101_ch_114_ch_116_ch_105_ch_111_ch_110(i8* %0)
ret i32 %2
}
int fsize(int fd) {
  int int_num = 7;
  int tmp;
  __asm__("int $0x80" : "=a"(tmp) : "a"(int_num), "b"(fd));
  return tmp;
}


x86 assembly (clang, -O0):
<fsize>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
movl   $0x7,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ebx
int    $0x80
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsize>:
push   %rbx
mov    %edi,%ebx
mov    $0x7,%eax
int    $0x80
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fsize(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 7, i32* %3
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = call i32 asm "int $$0x80", "={ax},{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 %5, i32 %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
ret i32 %8
}

LLVM IR (-O2):
define i32 @fsize(i32 %0) {
%2 = tail call i32 asm "int $$0x80", "={ax},{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 7, i32 %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ buffer;

/* Variables and functions */
int /*<<< orphan*/ lex(char *, char *);
int main() {
  char buffer[] = "int buffer [1024]";
  return !lex(buffer, buffer + sizeof(buffer));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xed4(%rip),%ax
mov    %ax,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
lea    -0x20(%rbp),%rsi
add    $0x12,%rsi
call   1030 <lex@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,(%rsp)
movw   $0x5d,0x10(%rsp)
lea    0x12(%rsp),%rsi
mov    %rsp,%rdi
call   1030 <lex@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.buffer = [18 x i8] c"int buffer [1024]\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [18 x i8]
store i32 0, i32* %1
%3 = bitcast [18 x i8]* %2 to i8*
%4 = getelementptr inbounds [18 x i8], [18 x i8]* %2, i64 0, i64 0
%5 = getelementptr inbounds [18 x i8], [18 x i8]* %2, i64 0, i64 0
%6 = getelementptr inbounds i8, i8* %5, i64 18
%7 = call i32 @lex(i8* %4, i8* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
@__const.main.buffer = [18 x i8] c"int buffer [1024]\00"
define i32 @main() {
%1 = alloca [18 x i8]
%2 = getelementptr inbounds [18 x i8], [18 x i8]* %1, i64 0, i64 0
%3 = getelementptr inbounds [18 x i8], [18 x i8]* %1, i64 0, i64 18
%4 = call i32 @lex(i8* %2, i8* %3)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}