xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char const *);
int /*<<< orphan*/ puts(char *);
void print_usage(const char *prog) {
  printf("Usage: %s [-DsbdlHOLC3]\n", prog);
  puts("  -D --device   device to use (default /dev/spidev1.1)\n"
       "  -s --speed    max speed (Hz)\n"
       "  -d --delay    delay (usec)\n"
       "  -b --bpw      bits per word \n"
       "  -l --loop     loopback\n"
       "  -H --cpha     clock phase\n"
       "  -O --cpol     clock polarity\n"
       "  -L --lsb      least significant bit first\n"
       "  -C --cs-high  chip select active high\n"
       "  -3 --3wire    SI/SO signals shared\n");
  exit(1);
}


x86 assembly (clang, -O0):
<print_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xeb9(%rip),%rdi
call   1040 <printf@plt>
lea    0xec6(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<print_usage>:
push   %rax
mov    %rdi,%rsi
lea    0xec5(%rip),%rdi
call   1040 <printf@plt>
lea    0xed2(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"Usage: %s [-DsbdlHOLC3]\0A\00"
@.str.1 = [352 x i8] c" -D --device device to use (default /dev/spidev1.1)\0A -s --speed max speed (Hz)\0A -d --delay delay (usec)\0A -b --bpw bits per word \0A -l --loop loopback\0A -H --cpha clock phase\0A -O --cpol clock polarity\0A -L --lsb least significant bit first\0A -C --cs-high chip select active high\0A -3 --3wire SI/SO signals shared\0A\00"
define void @print_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @puts(i8* getelementptr inbounds ([352 x i8], [352 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [25 x i8] c"Usage: %s [-DsbdlHOLC3]\0A\00"
@.str.1 = [352 x i8] c" -D --device device to use (default /dev/spidev1.1)\0A -s --speed max speed (Hz)\0A -d --delay delay (usec)\0A -b --bpw bits per word \0A -l --loop loopback\0A -H --cpha clock phase\0A -O --cpol clock polarity\0A -L --lsb least significant bit first\0A -C --cs-high chip select active high\0A -3 --3wire SI/SO signals shared\0A\00"
define void @print_usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([352 x i8], [352 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_arm_dmb(int);
int /*<<< orphan*/ __builtin_arm_dsb(int);
void test_barrier() {
  __builtin_arm_dmb(1);
  __builtin_arm_dsb(2);
}


x86 assembly (clang, -O0):
<test_barrier>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <__builtin_arm_dmb@plt>
mov    $0x2,%edi
call   1030 <__builtin_arm_dsb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_barrier>:
push   %rax
mov    $0x1,%edi
call   1040 <__builtin_arm_dmb@plt>
mov    $0x2,%edi
pop    %rax
jmp    1030 <__builtin_arm_dsb@plt>

LLVM IR (-O0):
define void @test_barrier() {
%1 = call i32 @__builtin_arm_dmb(i32 1)
%2 = call i32 @__builtin_arm_dsb(i32 2)
ret void
}

LLVM IR (-O2):
define void @test_barrier() {
%1 = tail call i32 @__builtin_arm_dmb(i32 1)
%2 = tail call i32 @__builtin_arm_dsb(i32 2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ chtype;

/* Variables and functions */
int check_arg_count(int, int /*<<< orphan*/);
int /*<<< orphan*/ inchstr(int /*<<< orphan*/ *);
int /*<<< orphan*/ report_count(int);
int /*<<< orphan*/ report_nstr(int /*<<< orphan*/ *);
int /*<<< orphan*/ report_return(int /*<<< orphan*/);
void cmd_inchstr(int nargs, char **args) {
  chtype string[256];
  if (check_arg_count(nargs, 0) == 1)
    return;
  report_count(2);
  report_return(inchstr(string));
  report_nstr(string);
}


x86 assembly (clang, -O0):
<cmd_inchstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1050 <check_arg_count@plt>
cmp    $0x1,%eax
jne    117a <cmd_inchstr+0x2a>
jmp    11a3 <cmd_inchstr+0x53>
mov    $0x2,%edi
call   1060 <report_count@plt>
lea    -0x410(%rbp),%rdi
call   1070 <inchstr@plt>
mov    %eax,%edi
call   1040 <report_return@plt>
lea    -0x410(%rbp),%rdi
call   1030 <report_nstr@plt>
add    $0x410,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_inchstr>:
push   %rbx
sub    $0x400,%rsp
xor    %esi,%esi
call   1050 <check_arg_count@plt>
cmp    $0x1,%eax
je     1188 <cmd_inchstr+0x38>
mov    $0x2,%edi
call   1060 <report_count@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1070 <inchstr@plt>
mov    %eax,%edi
call   1040 <report_return@plt>
mov    %rbx,%rdi
call   1030 <report_nstr@plt>
add    $0x400,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @cmd_inchstr(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca [256 x i32]
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = load i32, i32* %3
%7 = call i32 @check_arg_count(i32 %6, i32 0)
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %2
br label %17
10: ; preds = %2
%11 = call i32 @report_count(i32 2)
%12 = getelementptr inbounds [256 x i32], [256 x i32]* %5, i64 0, i64 0
%13 = call i32 @inchstr(i32* %12)
%14 = call i32 @report_return(i32 %13)
%15 = getelementptr inbounds [256 x i32], [256 x i32]* %5, i64 0, i64 0
%16 = call i32 @report_nstr(i32* %15)
br label %17
17: ; preds = %10, %9
ret void
}

LLVM IR (-O2):
define void @cmd_inchstr(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [256 x i32]
%4 = bitcast [256 x i32]* %3 to i8*
%5 = tail call i32 @check_arg_count(i32 %0, i32 0)
%6 = icmp eq i32 %5, 1
br i1 %6, label %13, label %7
7: ; preds = %2
%8 = tail call i32 @report_count(i32 2)
%9 = getelementptr inbounds [256 x i32], [256 x i32]* %3, i64 0, i64 0
%10 = call i32 @inchstr(i32* %9)
%11 = call i32 @report_return(i32 %10)
%12 = call i32 @report_nstr(i32* %9)
br label %13
13: ; preds = %2, %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __inc_remove_counter();
int __rename(char const *, char const *);
int rename(const char *old, const char *new) {
  int res = __rename(old, new);
  if (res == 0) {
    __inc_remove_counter();
  }
  return res;
}


x86 assembly (clang, -O0):
<rename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__rename@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1151 <rename+0x31>
mov    $0x0,%al
call   1040 <__inc_remove_counter@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rename>:
push   %rbx
call   1030 <__rename@plt>
mov    %eax,%ebx
test   %eax,%eax
jne    1133 <rename+0x13>
xor    %eax,%eax
call   1040 <__inc_remove_counter@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rename(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32 @__rename(i8* %6, i8* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 (...) @__inc_remove_counter()
br label %13
13: ; preds = %11, %2
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @rename(i8* %0, i8* %1) {
%3 = tail call i32 @__rename(i8* %0, i8* %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 (...) @__inc_remove_counter()
br label %7
7: ; preds = %5, %2
ret i32 %3
}
int big5_lead_p(int c) {
  return c >= 0xa1 && c <= 0xc7 || c >= 0xc9 && c <= 0xf9;
}


x86 assembly (clang, -O0):
<big5_lead_p>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xa1,-0x4(%rbp)
jl     1126 <big5_lead_p+0x26>
mov    $0x1,%al
cmpl   $0xc7,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    114b <big5_lead_p+0x4b>
xor    %eax,%eax
cmpl   $0xc9,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1145 <big5_lead_p+0x45>
cmpl   $0xf9,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<big5_lead_p>:
lea    -0xa1(%rdi),%eax
cmp    $0x27,%eax
setb   %al
add    $0xffffff37,%edi
cmp    $0x31,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @big5_lead_p(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 161
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 199
br i1 %7, label %16, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 201
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 249
br label %14
14: ; preds = %11, %8
%15 = phi i1 [ false, %8 ], [ %13, %11 ]
br label %16
16: ; preds = %14, %5
%17 = phi i1 [ true, %5 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @big5_lead_p(i32 %0) {
%2 = add i32 %0, -161
%3 = icmp ult i32 %2, 39
%4 = add i32 %0, -201
%5 = icmp ult i32 %4, 49
%6 = or i1 %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
void g_closure_add_invalidate_notifier() {}


x86 assembly (clang, -O0):
<g_closure_add_invalidate_notifier>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_closure_add_invalidate_notifier>:
ret

LLVM IR (-O0):
define void @g_closure_add_invalidate_notifier() {
ret void
}

LLVM IR (-O2):
define void @g_closure_add_invalidate_notifier() {
ret void
}
int getWaitExitSig(int *a) { return -1; }


x86 assembly (clang, -O0):
<getWaitExitSig>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getWaitExitSig>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @getWaitExitSig(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @getWaitExitSig(i32* nocapture readnone %0) {
ret i32 -1
}
/* Type definitions */
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int /*<<< orphan*/ print_array(int *, int);
int main(int argc, const char *argv[]) {
  int a[] = {522, 200, 350, 4, 8, 9, 12};
  int len = sizeof(a) / sizeof(a[0]);
  print_array(a, len);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xed3(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xed0(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xecd(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xecb(%rip),%eax
mov    %eax,-0x18(%rbp)
movl   $0x7,-0x34(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%esi
call   1030 <print_array@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movups 0xef1(%rip),%xmm0
movups %xmm0,0xc(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x7,%esi
call   1030 <print_array@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.a = [7 x i32] [i32 522, i32 200, i32 350, i32 4, i32 8, i32 9, i32 12]
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [7 x i32]
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = bitcast [7 x i32]* %6 to i8*
store i32 7, i32* %7
%9 = getelementptr inbounds [7 x i32], [7 x i32]* %6, i64 0, i64 0
%10 = load i32, i32* %7
%11 = call i32 @print_array(i32* %9, i32 %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.a = [7 x i32] [i32 522, i32 200, i32 350, i32 4, i32 8, i32 9, i32 12]
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [7 x i32]
%4 = bitcast [7 x i32]* %3 to i8*
%5 = getelementptr inbounds [7 x i32], [7 x i32]* %3, i64 0, i64 0
%6 = call i32 @print_array(i32* %5, i32 7)
ret i32 0
}
int f8(unsigned x) { return x - 1 >= 0x7fffffff; }


x86 assembly (clang, -O0):
<f8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
cmp    $0x7fffffff,%eax
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f8>:
xor    %eax,%eax
test   %edi,%edi
setle  %al
ret

LLVM IR (-O0):
define i32 @f8(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub i32 %3, 1
%5 = icmp uge i32 %4, 2147483647
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @f8(i32 %0) {
%2 = icmp slt i32 %0, 1
%3 = zext i1 %2 to i32
ret i32 %3
}
int libmesh_C_isnan_float(float a) { return (a != a); }


x86 assembly (clang, -O0):
<libmesh_C_isnan_float>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x4(%rbp),%xmm0
setne  %al
setp   %cl
or     %cl,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<libmesh_C_isnan_float>:
xor    %eax,%eax
ucomiss %xmm0,%xmm0
setp   %al
ret

LLVM IR (-O0):
define i32 @libmesh_C_isnan_float(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fcmp une float %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @libmesh_C_isnan_float(float %0) {
%2 = fcmp uno float %0, 0.000000e+00
%3 = zext i1 %2 to i32
ret i32 %3
}
main() {
  goto a;
b:
  goto c;
a:
  goto b;
c:
  return 3;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
jmp    1115 <main+0x15>
jmp    111a <main+0x1a>
jmp    1110 <main+0x10>
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %3
2: ; preds = %3
br label %4
3: ; preds = %0
br label %2
4: ; preds = %2
ret i32 3
}

LLVM IR (-O2):
define i32 @main() {
ret i32 3
}
/* Variables and functions */
int tolower(int);
scalar_t__ vowel(int);
int not_usually_after_l(int c0) {
  int c;
  c = tolower(c0);
  return (!(vowel(c) || c == 'h' || c == 'l'));
}


x86 assembly (clang, -O0):
<not_usually_after_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <tolower@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <vowel@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x9(%rbp)
jne    1169 <not_usually_after_l+0x49>
mov    $0x1,%al
cmpl   $0x68,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1169 <not_usually_after_l+0x49>
cmpl   $0x6c,-0x8(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<not_usually_after_l>:
push   %rbx
call   1030 <tolower@plt>
mov    %eax,%ebx
mov    %eax,%edi
call   1040 <vowel@plt>
test   %rax,%rax
sete   %al
and    $0xfffffffb,%ebx
cmp    $0x68,%ebx
setne  %cl
and    %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @not_usually_after_l(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @tolower(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = call i64 @vowel(i32 %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %15, label %9
9: ; preds = %1
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 104
br i1 %11, label %15, label %12
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp eq i32 %13, 108
br label %15
15: ; preds = %12, %9, %1
%16 = phi i1 [ true, %9 ], [ true, %1 ], [ %14, %12 ]
%17 = xor i1 %16, true
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @not_usually_after_l(i32 %0) {
%2 = tail call i32 @tolower(i32 %0)
%3 = tail call i64 @vowel(i32 %2)
%4 = icmp eq i64 %3, 0
%5 = and i32 %2, -5
%6 = icmp ne i32 %5, 104
%7 = and i1 %6, %4
%8 = zext i1 %7 to i32
ret i32 %8
}
void foo556() {}


x86 assembly (clang, -O0):
<foo556>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo556>:
ret

LLVM IR (-O0):
define void @foo556() {
ret void
}

LLVM IR (-O2):
define void @foo556() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello World.\n");
  printf("Welcome to 30 Days of Code.");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xedc(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef4(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello World.\0A\00"
@.str.1 = [28 x i8] c"Welcome to 30 Days of Code.\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [28 x i8] c"Welcome to 30 Days of Code.\00"
@str = [13 x i8] c"Hello World.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
int audio_set_channels(struct audio_info_struct *ai) { return 0; }


x86 assembly (clang, -O0):
<audio_set_channels>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<audio_set_channels>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.audio_info_struct = type opaque
define i32 @audio_set_channels(%struct.audio_info_struct* %0) {
%2 = alloca %struct.audio_info_struct*
store %struct.audio_info_struct* %0, %struct.audio_info_struct** %2
ret i32 0
}

LLVM IR (-O2):
%struct.audio_info_struct = type opaque
define i32 @audio_set_channels(%struct.audio_info_struct* nocapture readnone %0) {
ret i32 0
}
R0R1(r0, r1, x0, x1, p0, p1) unsigned int r0, r1;
unsigned int *p0, *p1;
{
  if (r0 <= r1)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<R0R1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
ja     1130 <R0R1+0x30>
movl   $0x1,-0x4(%rbp)
jmp    1137 <R0R1+0x37>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<R0R1>:
xor    %eax,%eax
cmp    %esi,%edi
setbe  %al
ret

LLVM IR (-O0):
define i32 @R0R1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = icmp ule i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %6
store i32 1, i32* %7
br label %19
18: ; preds = %6
store i32 0, i32* %7
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %7
ret i32 %20
}

LLVM IR (-O2):
define i32 @R0R1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture readnone %4, i32* nocapture readnone %5) {
%7 = icmp ule i32 %0, %1
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ move_file(char *, char *);
int /*<<< orphan*/ pre_write(char *);
void sendans(char *path) {
  pre_write(" all ans ");
  move_file("all.msh", path);
}


x86 assembly (clang, -O0):
<sendans>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1040 <pre_write@plt>
mov    -0x8(%rbp),%rsi
lea    0xec7(%rip),%rdi
call   1030 <move_file@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sendans>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
call   1040 <pre_write@plt>
lea    0xed3(%rip),%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <move_file@plt>

LLVM IR (-O0):
@.str = [10 x i8] c" all ans \00"
@.str.1 = [8 x i8] c"all.msh\00"
define void @sendans(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @pre_write(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 @move_file(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c" all ans \00"
@.str.1 = [8 x i8] c"all.msh\00"
define void @sendans(i8* %0) {
%2 = tail call i32 @pre_write(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @move_file(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
int __attribute__((const)) lw6sys_chr_is_space(char c) {
  return (c == ' ' || c == '\t');
}


x86 assembly (clang, -O0):
<lw6sys_chr_is_space>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     1129 <lw6sys_chr_is_space+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x9,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lw6sys_chr_is_space>:
cmp    $0x20,%dil
sete   %al
cmp    $0x9,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @lw6sys_chr_is_space(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 32
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 9
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @lw6sys_chr_is_space(i8 signext %0) {
%2 = icmp eq i8 %0, 32
%3 = icmp eq i8 %0, 9
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ printf(char *);
int sigprocmask(int how __attribute__((unused)),
                const sigset_t *set __attribute__((unused)),
                sigset_t *oldset __attribute__((unused))) {
  printf("sigprocmask\n");
  errno = EINVAL;
  return -1;
}


x86 assembly (clang, -O0):
<sigprocmask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea2(%rip),%rax
mov    (%rax),%ecx
mov    0x2ea1(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigprocmask>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eb4(%rip),%rax
mov    (%rax),%eax
mov    0x2eb3(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"sigprocmask\0A\00"
@EINVAL = global i32 0
@errno = global i32 0
define i32 @sigprocmask(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EINVAL
store i32 %8, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EINVAL = global i32 0
@errno = global i32 0
@str = [12 x i8] c"sigprocmask\00"
define i32 @sigprocmask(i32 %0, i32* nocapture readnone %1, i32* nocapture readnone %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
%5 = load i32, i32* @EINVAL
store i32 %5, i32* @errno
ret i32 -1
}
int isInRange(int x, int minx, int maxx) {
  if (minx <= x && x < maxx)
    return 1;
  if (x < minx)
    x += 360000000;
  else
    x -= 360000000;
  if (minx <= x && x < maxx)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isInRange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     1131 <isInRange+0x31>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1131 <isInRange+0x31>
movl   $0x1,-0x4(%rbp)
jmp    1183 <isInRange+0x83>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    114d <isInRange+0x4d>
mov    -0x8(%rbp),%eax
add    $0x15752a00,%eax
mov    %eax,-0x8(%rbp)
jmp    1158 <isInRange+0x58>
mov    -0x8(%rbp),%eax
sub    $0x15752a00,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jg     117c <isInRange+0x7c>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    117c <isInRange+0x7c>
movl   $0x1,-0x4(%rbp)
jmp    1183 <isInRange+0x83>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isInRange>:
cmp    %edi,%esi
jg     110e <isInRange+0xe>
mov    $0x1,%eax
cmp    %edx,%edi
jge    110e <isInRange+0xe>
ret
lea    -0x15752a00(%rdi),%eax
lea    0x15752a00(%rdi),%ecx
cmp    %esi,%edi
cmovge %eax,%ecx
cmp    %esi,%ecx
setge  %al
cmp    %edx,%ecx
setl   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isInRange(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %16
11: ; preds = %3
%12 = load i32, i32* %5
%13 = load i32, i32* %7
%14 = icmp slt i32 %12, %13
br i1 %14, label %15, label %16
15: ; preds = %11
store i32 1, i32* %4
br label %36
16: ; preds = %11, %3
%17 = load i32, i32* %5
%18 = load i32, i32* %6
%19 = icmp slt i32 %17, %18
br i1 %19, label %20, label %23
20: ; preds = %16
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 360000000
store i32 %22, i32* %5
br label %26
23: ; preds = %16
%24 = load i32, i32* %5
%25 = sub nsw i32 %24, 360000000
store i32 %25, i32* %5
br label %26
26: ; preds = %23, %20
%27 = load i32, i32* %6
%28 = load i32, i32* %5
%29 = icmp sle i32 %27, %28
br i1 %29, label %30, label %35
30: ; preds = %26
%31 = load i32, i32* %5
%32 = load i32, i32* %7
%33 = icmp slt i32 %31, %32
br i1 %33, label %34, label %35
34: ; preds = %30
store i32 1, i32* %4
br label %36
35: ; preds = %30, %26
store i32 0, i32* %4
br label %36
36: ; preds = %35, %34, %15
%37 = load i32, i32* %4
ret i32 %37
}

LLVM IR (-O2):
define i32 @isInRange(i32 %0, i32 %1, i32 %2) {
%4 = icmp sle i32 %1, %0
%5 = icmp slt i32 %0, %2
%6 = and i1 %4, %5
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = icmp slt i32 %0, %1
%9 = select i1 %8, i32 360000000, i32 -360000000
%10 = add nsw i32 %9, %0
%11 = icmp sge i32 %10, %1
%12 = icmp slt i32 %10, %2
%13 = and i1 %11, %12
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %7, %3
%16 = phi i32 [ 1, %3 ], [ %14, %7 ]
ret i32 %16
}
/* Variables and functions */
char terminalsLeft(char *marker, size_t numberOfTerminal) {
  for (size_t j = 0; j < numberOfTerminal; ++j) {
    if (!marker[j]) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<terminalsLeft>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    1153 <terminalsLeft+0x53>
mov    -0x10(%rbp),%rax
mov    -0x20(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
jne    113d <terminalsLeft+0x3d>
movb   $0x1,-0x1(%rbp)
jmp    1157 <terminalsLeft+0x57>
jmp    1142 <terminalsLeft+0x42>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1114 <terminalsLeft+0x14>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminalsLeft>:
test   %rsi,%rsi
je     1129 <terminalsLeft+0x29>
cmpb   $0x0,(%rdi)
je     112c <terminalsLeft+0x2c>
mov    $0x1,%ecx
nop
mov    %rcx,%rax
cmp    %rcx,%rsi
je     1122 <terminalsLeft+0x22>
lea    0x1(%rax),%rcx
cmpb   $0x0,(%rdi,%rax,1)
jne    1110 <terminalsLeft+0x10>
cmp    %rsi,%rax
setb   %al
ret
xor    %eax,%eax
ret
mov    $0x1,%al
ret

LLVM IR (-O0):
define signext i8 @terminalsLeft(i8* %0, i64 %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 0, i64* %6
br label %7
7: ; preds = %19, %2
%8 = load i64, i64* %6
%9 = load i64, i64* %5
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %22
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i64, i64* %6
%14 = getelementptr inbounds i8, i8* %12, i64 %13
%15 = load i8, i8* %14
%16 = icmp ne i8 %15, 0
br i1 %16, label %18, label %17
17: ; preds = %11
store i8 1, i8* %3
br label %23
18: ; preds = %11
br label %19
19: ; preds = %18
%20 = load i64, i64* %6
%21 = add i64 %20, 1
store i64 %21, i64* %6
br label %7
22: ; preds = %7
store i8 0, i8* %3
br label %23
23: ; preds = %22, %17
%24 = load i8, i8* %3
ret i8 %24
}

LLVM IR (-O2):
define signext i8 @terminalsLeft(i8* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %18, label %4
4: ; preds = %2
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, 0
br i1 %6, label %18, label %7
7: ; preds = %4, %10
%8 = phi i64 [ %14, %10 ], [ 1, %4 ]
%9 = icmp eq i64 %8, %1
br i1 %9, label %15, label %10
10: ; preds = %7
%11 = getelementptr inbounds i8, i8* %0, i64 %8
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
%14 = add nuw i64 %8, 1
br i1 %13, label %15, label %7
15: ; preds = %7, %10
%16 = icmp ult i64 %8, %1
%17 = zext i1 %16 to i8
br label %18
18: ; preds = %15, %4, %2
%19 = phi i8 [ 0, %2 ], [ 1, %4 ], [ %17, %15 ]
ret i8 %19
}
int HelpItem94(void) { return 0; }


x86 assembly (clang, -O0):
<HelpItem94>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HelpItem94>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @HelpItem94() {
ret i32 0
}

LLVM IR (-O2):
define i32 @HelpItem94() {
ret i32 0
}
/* Type definitions */
typedef int int32_t;
typedef scalar_t__ int16_t;

/* Variables and functions */
void smac_24(int32_t *ac, int16_t coef, int16_t data) {
  *ac += (int32_t)coef * (int32_t)data;
}


x86 assembly (clang, -O0):
<smac_24>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
imul   %eax,%ecx
mov    -0x8(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<smac_24>:
imul   %esi,%edx
add    %edx,(%rdi)
ret

LLVM IR (-O0):
define void @smac_24(i32* %0, i64 %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i64
%6 = alloca i64
store i32* %0, i32** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %5
%8 = trunc i64 %7 to i32
%9 = load i64, i64* %6
%10 = trunc i64 %9 to i32
%11 = mul nsw i32 %8, %10
%12 = load i32*, i32** %4
%13 = load i32, i32* %12
%14 = add nsw i32 %13, %11
store i32 %14, i32* %12
ret void
}

LLVM IR (-O2):
define void @smac_24(i32* nocapture %0, i64 %1, i64 %2) {
%4 = trunc i64 %1 to i32
%5 = trunc i64 %2 to i32
%6 = mul nsw i32 %5, %4
%7 = load i32, i32* %0
%8 = add nsw i32 %7, %6
store i32 %8, i32* %0
ret void
}
/* Variables and functions */
scalar_t__ lt_dlerror();
char *strdup(char *);
char *dlerrordup(char *errormsg) {
  char *error = (char *)lt_dlerror();
  if (error && !errormsg)
    errormsg = strdup(error);
  return errormsg;
}


x86 assembly (clang, -O0):
<dlerrordup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <lt_dlerror@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115a <dlerrordup+0x3a>
cmpq   $0x0,-0x8(%rbp)
jne    115a <dlerrordup+0x3a>
mov    -0x10(%rbp),%rdi
call   1040 <strdup@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlerrordup>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <lt_dlerror@plt>
test   %rbx,%rbx
jne    113e <dlerrordup+0x1e>
test   %rax,%rax
je     113e <dlerrordup+0x1e>
mov    %rax,%rdi
pop    %rbx
jmp    1040 <strdup@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @dlerrordup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = call i64 (...) @lt_dlerror()
%5 = inttoptr i64 %4 to i8*
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = icmp ne i8* %9, null
br i1 %10, label %14, label %11
11: ; preds = %8
%12 = load i8*, i8** %3
%13 = call i8* @strdup(i8* %12)
store i8* %13, i8** %2
br label %14
14: ; preds = %11, %8, %1
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define i8* @dlerrordup(i8* readnone %0) {
%2 = tail call i64 (...) @lt_dlerror()
%3 = icmp eq i64 %2, 0
%4 = icmp ne i8* %0, null
%5 = or i1 %4, %3
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = inttoptr i64 %2 to i8*
%8 = tail call i8* @strdup(i8* %7)
br label %9
9: ; preds = %6, %1
%10 = phi i8* [ %0, %1 ], [ %8, %6 ]
ret i8* %10
}
/* Variables and functions */
char *appaserver_parameter_file_get_appaserver_mount_point();
int /*<<< orphan*/ set_environment(char *, char *);
void add_appaserver_home_to_python_path(void) {
  char *appaserver_mount_point;
  appaserver_mount_point =
      appaserver_parameter_file_get_appaserver_mount_point();
  set_environment("PYTHONPATH", appaserver_mount_point);
}


x86 assembly (clang, -O0):
<add_appaserver_home_to_python_path>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <appaserver_parameter_file_get_appaserver_mount_point@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec2(%rip),%rdi
call   1030 <set_environment@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_appaserver_home_to_python_path>:
push   %rax
xor    %eax,%eax
call   1040 <appaserver_parameter_file_get_appaserver_mount_point@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
pop    %rax
jmp    1030 <set_environment@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"PYTHONPATH\00"
define void @add_appaserver_home_to_python_path() {
%1 = alloca i8*
%2 = call i8* (...) @appaserver_parameter_file_get_appaserver_mount_point()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @set_environment(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"PYTHONPATH\00"
define void @add_appaserver_home_to_python_path() {
%1 = tail call i8* (...) @appaserver_parameter_file_get_appaserver_mount_point()
%2 = tail call i32 @set_environment(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
/* Variables and functions */
scalar_t__ set_selector(int, int);
int setup_sound_driver(int fd_audio) {
  int err = 0;
  err += set_selector(fd_audio, (1 << 0) | (1 << 4) | (1 << 5) | (1 << 21));
  return err;
}


x86 assembly (clang, -O0):
<setup_sound_driver>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x200031,%esi
call   1030 <set_selector@plt>
mov    %rax,%rcx
movslq -0x8(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_sound_driver>:
mov    $0x200031,%esi
jmp    1030 <set_selector@plt>

LLVM IR (-O0):
define i32 @setup_sound_driver(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = call i64 @set_selector(i32 %4, i32 2097201)
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = add nsw i64 %7, %5
%9 = trunc i64 %8 to i32
store i32 %9, i32* %3
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @setup_sound_driver(i32 %0) {
%2 = tail call i64 @set_selector(i32 %0, i32 2097201)
%3 = trunc i64 %2 to i32
ret i32 %3
}
void USBPHYPowerOff(unsigned long ulBase) {
  (*((volatile unsigned char *)(ulBase + 0x00000001))) |= 0x00000001;
}


x86 assembly (clang, -O0):
<USBPHYPowerOff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1(%rax),%cl
movzbl %cl,%ecx
or     $0x1,%ecx
mov    %cl,0x1(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBPHYPowerOff>:
orb    $0x1,0x1(%rdi)
ret

LLVM IR (-O0):
define void @USBPHYPowerOff(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 1
%5 = inttoptr i64 %4 to i8*
%6 = load volatile i8, i8* %5
%7 = zext i8 %6 to i32
%8 = or i32 %7, 1
%9 = trunc i32 %8 to i8
store volatile i8 %9, i8* %5
ret void
}

LLVM IR (-O2):
define void @USBPHYPowerOff(i64 %0) {
%2 = add i64 %0, 1
%3 = inttoptr i64 %2 to i8*
%4 = load volatile i8, i8* %3
%5 = or i8 %4, 1
store volatile i8 %5, i8* %3
ret void
}
int sysinfo(struct sysinfo *info) { return -1; }


x86 assembly (clang, -O0):
<sysinfo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysinfo>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.sysinfo = type opaque
define i32 @sysinfo(%struct.sysinfo* %0) {
%2 = alloca %struct.sysinfo*
store %struct.sysinfo* %0, %struct.sysinfo** %2
ret i32 -1
}

LLVM IR (-O2):
%struct.sysinfo = type opaque
define i32 @sysinfo(%struct.sysinfo* nocapture readnone %0) {
ret i32 -1
}
int checkTLB(int vAddress) {}


x86 assembly (clang, -O0):
<checkTLB>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkTLB>:
ret

LLVM IR (-O0):
define i32 @checkTLB(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @checkTLB(i32 %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ lisp_atan2(long volatile, long volatile);
int main() {
  volatile long dy = 63, dx = -77;
  if (lisp_atan2(dy, dx))
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x3f,-0x10(%rbp)
movq   $0xffffffffffffffb3,-0x18(%rbp)
ff
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <lisp_atan2@plt>
cmp    $0x0,%rax
je     115d <main+0x3d>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movq   $0x3f,0x10(%rsp)
movq   $0xffffffffffffffb3,0x8(%rsp)
ff ff
mov    0x10(%rsp),%rdi
mov    0x8(%rsp),%rsi
call   1040 <lisp_atan2@plt>
test   %rax,%rax
jne    1151 <main+0x31>
xor    %eax,%eax
add    $0x18,%rsp
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i64
%3 = alloca i64
store i32 0, i32* %1
store volatile i64 63, i64* %2
store volatile i64 -77, i64* %3
%4 = load volatile i64, i64* %2
%5 = load volatile i64, i64* %3
%6 = call i64 @lisp_atan2(i64 %4, i64 %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i64
%2 = alloca i64
%3 = bitcast i64* %1 to i8*
store volatile i64 63, i64* %1
%4 = bitcast i64* %2 to i8*
store volatile i64 -77, i64* %2
%5 = load volatile i64, i64* %1
%6 = load volatile i64, i64* %2
%7 = tail call i64 @lisp_atan2(i64 %5, i64 %6)
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %0
%10 = tail call i32 (...) @abort()
unreachable
11: ; preds = %0
ret i32 0
}
int c064(void) { return 0; }


x86 assembly (clang, -O0):
<c064>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c064>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c064() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c064() {
ret i32 0
}
void f16() {
  __extension__({ goto lbl; });
lbl:;
}


x86 assembly (clang, -O0):
<f16>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <f16+0x9>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f16>:
ret

LLVM IR (-O0):
define void @f16() {
br label %1
1: ; preds = %0
ret void
}

LLVM IR (-O2):
define void @f16() {
ret void
}
int min2(int a, int b) {
  if (a <= b)
    return a;
  else
    return b;
}


x86 assembly (clang, -O0):
<min2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1121 <min2+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <min2+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min2>:
mov    %edi,%eax
cmp    %esi,%edi
cmovg  %esi,%eax
ret

LLVM IR (-O0):
define i32 @min2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sle i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @min2(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
int floor(float);
int floori(float a) { return floor(a); }


x86 assembly (clang, -O0):
<floori>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <floor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<floori>:
jmp    1030 <floor@plt>

LLVM IR (-O0):
define i32 @floori(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i32 @floor(float %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @floori(float %0) {
%2 = tail call i32 @floor(float %0)
ret i32 %2
}
void glutShowWindow() {}


x86 assembly (clang, -O0):
<glutShowWindow>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutShowWindow>:
ret

LLVM IR (-O0):
define void @glutShowWindow() {
ret void
}

LLVM IR (-O2):
define void @glutShowWindow() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mlSphereCopy(float *, float *);
int /*<<< orphan*/ mlSphereMergeTo(float *, float const *, float *);
void mlSphereMergeInPlace(float *a, const float *b) {
  float result[4];
  mlSphereMergeTo(a, b, result);
  mlSphereCopy(result, a);
}


x86 assembly (clang, -O0):
<mlSphereMergeInPlace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x20(%rbp),%rdx
call   1040 <mlSphereMergeTo@plt>
lea    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <mlSphereCopy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlSphereMergeInPlace>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %rdi,%rbx
mov    %rsp,%r14
mov    %r14,%rdx
call   1040 <mlSphereMergeTo@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <mlSphereCopy@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @mlSphereMergeInPlace(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
%5 = alloca [4 x float]
store float* %0, float** %3
store float* %1, float** %4
%6 = load float*, float** %3
%7 = load float*, float** %4
%8 = getelementptr inbounds [4 x float], [4 x float]* %5, i64 0, i64 0
%9 = call i32 @mlSphereMergeTo(float* %6, float* %7, float* %8)
%10 = getelementptr inbounds [4 x float], [4 x float]* %5, i64 0, i64 0
%11 = load float*, float** %3
%12 = call i32 @mlSphereCopy(float* %10, float* %11)
ret void
}

LLVM IR (-O2):
define void @mlSphereMergeInPlace(float* %0, float* %1) {
%3 = alloca [4 x float]
%4 = bitcast [4 x float]* %3 to i8*
%5 = getelementptr inbounds [4 x float], [4 x float]* %3, i64 0, i64 0
%6 = call i32 @mlSphereMergeTo(float* %0, float* %1, float* %5)
%7 = call i32 @mlSphereCopy(float* %5, float* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int set_default_cell_property(int /*<<< orphan*/, int);
int ft_set_default_cell_prop(uint32_t property, int value) {
  return set_default_cell_property(property, value);
}


x86 assembly (clang, -O0):
<ft_set_default_cell_prop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <set_default_cell_property@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_set_default_cell_prop>:
jmp    1030 <set_default_cell_property@plt>

LLVM IR (-O0):
define i32 @ft_set_default_cell_prop(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @set_default_cell_property(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @ft_set_default_cell_prop(i32 %0, i32 %1) {
%3 = tail call i32 @set_default_cell_property(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
double sqrt(double);
double root(int sq, double value) {
  switch (sq) {
  case 2:
    return sqrt(value);
  default:
    return 0.0;
  }
  return 0.0;
}


x86 assembly (clang, -O0):
<root>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
jne    1145 <root+0x35>
jmp    1131 <root+0x21>
movsd  -0x18(%rbp),%xmm0
call   1030 <sqrt@plt>
movsd  %xmm0,-0x8(%rbp)
jmp    114d <root+0x3d>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<root>:
xorpd  %xmm1,%xmm1
cmp    $0x2,%edi
jne    112a <root+0x1a>
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     112f <root+0x1f>
xorps  %xmm1,%xmm1
sqrtsd %xmm0,%xmm1
movapd %xmm1,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @root(i32 %0, double %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca double
store i32 %0, i32* %4
store double %1, double* %5
%6 = load i32, i32* %4
switch i32 %6, label %10 [
i32 2, label %7
]
7: ; preds = %2
%8 = load double, double* %5
%9 = call double @sqrt(double %8)
store double %9, double* %3
br label %11
10: ; preds = %2
store double 0.000000e+00, double* %3
br label %11
11: ; preds = %10, %7
%12 = load double, double* %3
ret double %12
}

LLVM IR (-O2):
define double @root(i32 %0, double %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call double @sqrt(double %1)
br label %6
6: ; preds = %2, %4
%7 = phi double [ %5, %4 ], [ 0.000000e+00, %2 ]
ret double %7
}