xunge/DecIR huggingface dataset:
/* Variables and functions */
char *Z_Malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *CopyString(char *in) {
  char *out;
  out = Z_Malloc(strlen(in) + 1);
  strcpy(out, in);
  return out;
}


x86 assembly (clang, -O0):
<CopyString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <Z_Malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CopyString>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <Z_Malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @CopyString(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @Z_Malloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i8*, i8** %2
%10 = call i32 @strcpy(i8* %8, i8* %9)
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
define i8* @CopyString(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @Z_Malloc(i64 %3)
%5 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
/* Variables and functions */
int rand();
int main(int argc, char **argv) {
  int x;
  int r = rand();
  if (!(0 >= r)) {
    x = 42;
  } else {
    x = 7;
  }
  return x;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x18(%rbp)
xor    %eax,%eax
cmp    -0x18(%rbp),%eax
jge    1147 <main+0x37>
movl   $0x2a,-0x14(%rbp)
jmp    114e <main+0x3e>
movl   $0x7,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
test   %eax,%eax
mov    $0x7,%ecx
mov    $0x2a,%eax
cmovle %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i32 (...) @rand()
store i32 %8, i32* %7
%9 = load i32, i32* %7
%10 = icmp sge i32 0, %9
br i1 %10, label %12, label %11
11: ; preds = %2
store i32 42, i32* %6
br label %13
12: ; preds = %2
store i32 7, i32* %6
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %6
ret i32 %14
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @rand()
%4 = icmp slt i32 %3, 1
%5 = select i1 %4, i32 7, i32 42
ret i32 %5
}
void kfunc(const int i __attribute__((unused))) {}


x86 assembly (clang, -O0):
<kfunc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kfunc>:
ret

LLVM IR (-O0):
define void @kfunc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @kfunc(i32 %0) {
ret void
}
/* Variables and functions */
char *malloc(scalar_t__);
int /*<<< orphan*/ memcpy(char *, char *, scalar_t__);
scalar_t__ strlen(char *);
char *str_copy(char *str) {
  char *result = malloc(strlen(str) + 1);
  memcpy(result, str, strlen(str) + 1);
  return result;
}


x86 assembly (clang, -O0):
<str_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %rax,%rdx
add    $0x1,%rdx
call   1040 <memcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_copy>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
lea    0x1(%rax),%r15
mov    %r15,%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @str_copy(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @malloc(i64 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %3
%9 = load i8*, i8** %2
%10 = load i8*, i8** %2
%11 = call i64 @strlen(i8* %10)
%12 = add nsw i64 %11, 1
%13 = call i32 @memcpy(i8* %8, i8* %9, i64 %12)
%14 = load i8*, i8** %3
ret i8* %14
}

LLVM IR (-O2):
define i8* @str_copy(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = tail call i32 @memcpy(i8* %4, i8* %0, i64 %3)
ret i8* %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
__attribute__((always_, unused)) uint16_t otfcc_byteswap_u16(uint16_t x) {
  union {
    uint8_t i1[2];
    uint16_t i2;
  } src, dst;
  src.i2 = x;
  dst.i1[0] = src.i1[1];
  dst.i1[1] = src.i1[0];
  return dst.i2;
}


x86 assembly (clang, -O0):
<otfcc_byteswap_u16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<otfcc_byteswap_u16>:
ret

LLVM IR (-O0):
%union.anon = type { [2 x i32] }
define i32 @otfcc_byteswap_u16(i32 %0) {
%2 = alloca i32
%3 = alloca %union.anon
%4 = alloca %union.anon
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = bitcast %union.anon* %3 to i32*
store i32 %5, i32* %6
%7 = bitcast %union.anon* %3 to [2 x i32]*
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %7, i64 0, i64 1
%9 = load i32, i32* %8
%10 = bitcast %union.anon* %4 to [2 x i32]*
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %10, i64 0, i64 0
store i32 %9, i32* %11
%12 = bitcast %union.anon* %3 to [2 x i32]*
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %12, i64 0, i64 0
%14 = load i32, i32* %13
%15 = bitcast %union.anon* %4 to [2 x i32]*
%16 = getelementptr inbounds [2 x i32], [2 x i32]* %15, i64 0, i64 1
store i32 %14, i32* %16
%17 = bitcast %union.anon* %4 to i32*
%18 = load i32, i32* %17
ret i32 %18
}

LLVM IR (-O2):
define i32 @otfcc_byteswap_u16(i32 %0) {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fprintf(int /*<<< orphan*/ *, char *, double, double);
int writestop(double x, double v, FILE *st) {
  return fprintf(st, "(%.5g,%.5g)", x, v);
}


x86 assembly (clang, -O0):
<writestop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
lea    0xec5(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writestop>:
lea    0xee9(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"(%.5g,%.5g)\00"
define i32 @writestop(double %0, double %1, i32* %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca i32*
store double %0, double* %4
store double %1, double* %5
store i32* %2, i32** %6
%7 = load i32*, i32** %6
%8 = load double, double* %4
%9 = load double, double* %5
%10 = call i32 @fprintf(i32* %7, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), double %8, double %9)
ret i32 %10
}

LLVM IR (-O2):
@.str = [12 x i8] c"(%.5g,%.5g)\00"
define i32 @writestop(double %0, double %1, i32* nocapture %2) {
%4 = tail call i32 @fprintf(i32* %2, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), double %0, double %1)
ret i32 %4
}
int WebPGetDecoderVersion(void) { return (0 << 16) | (4 << 8) | 2; }


x86 assembly (clang, -O0):
<WebPGetDecoderVersion>:
push   %rbp
mov    %rsp,%rbp
mov    $0x402,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WebPGetDecoderVersion>:
mov    $0x402,%eax
ret

LLVM IR (-O0):
define i32 @WebPGetDecoderVersion() {
ret i32 1026
}

LLVM IR (-O2):
define i32 @WebPGetDecoderVersion() {
ret i32 1026
}
void GPIOWakeupGlobalEnable(unsigned int baseAdd) {
  (*((volatile unsigned int *)(baseAdd + (0x10)))) |= ((0x00000004u));
}


x86 assembly (clang, -O0):
<GPIOWakeupGlobalEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     $0x4,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOWakeupGlobalEnable>:
add    $0x10,%edi
orl    $0x4,(%rdi)
ret

LLVM IR (-O0):
define void @GPIOWakeupGlobalEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 16
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = or i32 %7, 4
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @GPIOWakeupGlobalEnable(i32 %0) {
%2 = add i32 %0, 16
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = or i32 %5, 4
store volatile i32 %6, i32* %4
ret void
}
/* Variables and functions */
double log(double const);
double igraph_log2(const double a) { return log(a) / log(2.0); }


x86 assembly (clang, -O0):
<igraph_log2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <log@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  0xecc(%rip),%xmm0
call   1030 <log@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<igraph_log2>:
push   %rax
call   1030 <log@plt>
divsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @igraph_log2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @log(double %3)
%5 = call double @log(double 2.000000e+00)
%6 = fdiv double %4, %5
ret double %6
}

LLVM IR (-O2):
define double @igraph_log2(double %0) {
%2 = tail call double @log(double %0)
%3 = fdiv double %2, 0x3FE62E42FEFA39EF
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef scalar_t__ uint32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
scalar_t__ get_eqep_base(int /*<<< orphan*/);
scalar_t__ raw_read32(scalar_t__);
int32_t eqep_get(uint8_t eqep_num) {
  uint32_t eqep_base = get_eqep_base(eqep_num);
  if (eqep_base == 0)
    return 0;
  uint32_t eqep_cnt = raw_read32(eqep_base + (0x0));
  return (int32_t)(eqep_cnt - (0x80000000));
}


x86 assembly (clang, -O0):
<eqep_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <get_eqep_base@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114e <eqep_get+0x2e>
movl   $0x0,-0x4(%rbp)
jmp    1173 <eqep_get+0x53>
mov    -0x10(%rbp),%rdi
add    $0x0,%rdi
call   1040 <raw_read32@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movabs $0x80000000,%rcx
sub    %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eqep_get>:
push   %rax
call   1030 <get_eqep_base@plt>
test   %rax,%rax
je     113a <eqep_get+0x1a>
mov    %rax,%rdi
call   1040 <raw_read32@plt>
xor    $0x80000000,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @eqep_get(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = call i64 @get_eqep_base(i32 %6)
store i64 %7, i64* %4
%8 = load i64, i64* %4
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 0, i32* %2
br label %18
11: ; preds = %1
%12 = load i64, i64* %4
%13 = add nsw i64 %12, 0
%14 = call i64 @raw_read32(i64 %13)
store i64 %14, i64* %5
%15 = load i64, i64* %5
%16 = sub nsw i64 %15, 2147483648
%17 = trunc i64 %16 to i32
store i32 %17, i32* %2
br label %18
18: ; preds = %11, %10
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @eqep_get(i32 %0) {
%2 = tail call i64 @get_eqep_base(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i64 @raw_read32(i64 %2)
%6 = trunc i64 %5 to i32
%7 = xor i32 %6, -2147483648
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
int startqwcl_nochecks(char *cmd, char *cmdline) { return 0; }


x86 assembly (clang, -O0):
<startqwcl_nochecks>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<startqwcl_nochecks>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @startqwcl_nochecks(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @startqwcl_nochecks(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int is_anagram(char *, char *);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, char *, char *);
int main() {
  char a[50], b[50];
  scanf("%s %s", a, b);
  printf("%d", is_anagram(a, b));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
lea    -0x40(%rbp),%rsi
lea    -0x80(%rbp),%rdx
lea    0xeb6(%rip),%rdi
call   1050 <scanf@plt>
lea    -0x40(%rbp),%rdi
lea    -0x80(%rbp),%rsi
call   1030 <is_anagram@plt>
mov    %eax,%esi
lea    0xea1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x78,%rsp
lea    0xec2(%rip),%rdi
lea    0x40(%rsp),%rbx
mov    %rsp,%r14
mov    %rbx,%rsi
mov    %r14,%rdx
call   1050 <scanf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <is_anagram@plt>
lea    0xea3(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x78,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%s %s\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca [50 x i8]
%2 = alloca [50 x i8]
%3 = getelementptr inbounds [50 x i8], [50 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [50 x i8], [50 x i8]* %2, i64 0, i64 0
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %4)
%6 = getelementptr inbounds [50 x i8], [50 x i8]* %1, i64 0, i64 0
%7 = getelementptr inbounds [50 x i8], [50 x i8]* %2, i64 0, i64 0
%8 = call i32 @is_anagram(i8* %6, i8* %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s %s\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca [50 x i8]
%2 = alloca [50 x i8]
%3 = getelementptr inbounds [50 x i8], [50 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [50 x i8], [50 x i8]* %2, i64 0, i64 0
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %4)
%6 = call i32 @is_anagram(i8* %3, i8* %4)
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ pad;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
#pragma pack(1)
  struct {
    char a;
    int b;
    double c;
  } pad;
  printf("sizeof(char)"
         " ==> %d\n",
         sizeof(char));
  printf("sizeof(int)"
         " ==> %d\n",
         sizeof(int));
  printf("sizeof(double)"
         " ==> %d\n",
         sizeof(double));
  printf("sizeof(pad)"
         " ==> %d\n",
         sizeof(pad));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
lea    0xede(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
lea    0xee1(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
lea    0xee7(%rip),%rdi
mov    $0xd,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
lea    0xeec(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
lea    0xeef(%rip),%rdi
mov    $0x8,%esi
call   1030 <printf@plt>
lea    0xef5(%rip),%rdi
mov    $0xd,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.anon = type <{ i8, i32, double }>
@.str = [21 x i8] c"sizeof(char) ==> %d\0A\00"
@.str.1 = [20 x i8] c"sizeof(int) ==> %d\0A\00"
@.str.2 = [23 x i8] c"sizeof(double) ==> %d\0A\00"
@.str.3 = [20 x i8] c"sizeof(pad) ==> %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.anon
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i32 4)
%5 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.2, i64 0, i64 0), i32 8)
%6 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.3, i64 0, i64 0), i32 13)
ret i32 0
}

LLVM IR (-O2):
%struct.anon = type <{ i8, i32, double }>
@.str = [21 x i8] c"sizeof(char) ==> %d\0A\00"
@.str.1 = [20 x i8] c"sizeof(int) ==> %d\0A\00"
@.str.2 = [23 x i8] c"sizeof(double) ==> %d\0A\00"
@.str.3 = [20 x i8] c"sizeof(pad) ==> %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i32 1)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.1, i64 0, i64 0), i32 4)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.2, i64 0, i64 0), i32 8)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.3, i64 0, i64 0), i32 13)
ret i32 0
}
void PILI_RTMP_TLS_Init() {}


x86 assembly (clang, -O0):
<PILI_RTMP_TLS_Init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PILI_RTMP_TLS_Init>:
ret

LLVM IR (-O0):
define void @PILI_RTMP_TLS_Init() {
ret void
}

LLVM IR (-O2):
define void @PILI_RTMP_TLS_Init() {
ret void
}
long long fib(long long x) {
  if (x <= 2) {
    return 1;
  } else {
    return fib(x - 1) + fib(x - 2);
  }
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x2,-0x10(%rbp)
jg     1134 <fib+0x24>
movq   $0x1,-0x8(%rbp)
jmp    1160 <fib+0x50>
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <fib@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x2,%rdi
call   1030 <fib@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %r14
push   %rbx
push   %rax
mov    $0x1,%r14d
cmp    $0x3,%rdi
jl     114a <fib+0x3a>
mov    %rdi,%rbx
add    $0x2,%rbx
xor    %r14d,%r14d
nopw   0x0(%rax,%rax,1)
lea    -0x3(%rbx),%rdi
call   1030 <fib@plt>
add    %rax,%r14
add    $0xfffffffffffffffe,%rbx
cmp    $0x4,%rbx
ja     1130 <fib+0x20>
add    $0x1,%r14
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @fib(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp sle i64 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 1, i64* %2
br label %15
7: ; preds = %1
%8 = load i64, i64* %3
%9 = sub nsw i64 %8, 1
%10 = call i64 @fib(i64 %9)
%11 = load i64, i64* %3
%12 = sub nsw i64 %11, 2
%13 = call i64 @fib(i64 %12)
%14 = add nsw i64 %10, %13
store i64 %14, i64* %2
br label %15
15: ; preds = %7, %6
%16 = load i64, i64* %2
ret i64 %16
}

LLVM IR (-O2):
define i64 @fib(i64 %0) {
%2 = icmp slt i64 %0, 3
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %8, %3 ], [ %0, %1 ]
%5 = phi i64 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i64 %4, -1
%7 = tail call i64 @fib(i64 %6)
%8 = add nsw i64 %4, -2
%9 = add nsw i64 %7, %5
%10 = icmp ult i64 %4, 5
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i64 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i64 [ 1, %1 ], [ %12, %11 ]
ret i64 %14
}
void rocker_tlv_nest_cancel(char *buf, int *buf_pos, struct rocker_tlv *start) {
  *buf_pos = (char *)start - buf;
}


x86 assembly (clang, -O0):
<rocker_tlv_nest_cancel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rocker_tlv_nest_cancel>:
sub    %edi,%edx
mov    %edx,(%rsi)
ret

LLVM IR (-O0):
%struct.rocker_tlv = type opaque
define void @rocker_tlv_nest_cancel(i8* %0, i32* %1, %struct.rocker_tlv* %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca %struct.rocker_tlv*
store i8* %0, i8** %4
store i32* %1, i32** %5
store %struct.rocker_tlv* %2, %struct.rocker_tlv** %6
%7 = load %struct.rocker_tlv*, %struct.rocker_tlv** %6
%8 = bitcast %struct.rocker_tlv* %7 to i8*
%9 = load i8*, i8** %4
%10 = ptrtoint i8* %8 to i64
%11 = ptrtoint i8* %9 to i64
%12 = sub i64 %10, %11
%13 = trunc i64 %12 to i32
%14 = load i32*, i32** %5
store i32 %13, i32* %14
ret void
}

LLVM IR (-O2):
%struct.rocker_tlv = type opaque
define void @rocker_tlv_nest_cancel(i8* %0, i32* nocapture writeonly %1, %struct.rocker_tlv* %2) {
%4 = ptrtoint %struct.rocker_tlv* %2 to i64
%5 = ptrtoint i8* %0 to i64
%6 = sub i64 %4, %5
%7 = trunc i64 %6 to i32
store i32 %7, i32* %1
ret void
}
/* Variables and functions */
int ATstatus_reg();
int /*<<< orphan*/ sleep(int);
unsigned int ATready(void) {
  int status;
  for (;;) {
    status = ATstatus_reg();
    status = (status & 0xF << 7);
    if (status != 0x80) {
      status = 0;
      sleep((10000) / 1000000000);
    }
    if (status == 0x80)
      return status;
  }
}


x86 assembly (clang, -O0):
<ATready>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <ATstatus_reg@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x780,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x80,-0x4(%rbp)
je     1158 <ATready+0x38>
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1040 <sleep@plt>
cmpl   $0x80,-0x4(%rbp)
jne    116e <ATready+0x4e>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret
jmp    1128 <ATready+0x8>

x86 assembly (clang, -O2):
<ATready>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <ATstatus_reg@plt>
and    $0x780,%eax
cmp    $0x80,%eax
je     114c <ATready+0x2c>
xor    %edi,%edi
call   1040 <sleep@plt>
jmp    1130 <ATready+0x10>
mov    $0x80,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ATready() {
%1 = alloca i32
br label %2
2: ; preds = %15, %0
%3 = call i32 (...) @ATstatus_reg()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = and i32 %4, 1920
store i32 %5, i32* %1
%6 = load i32, i32* %1
%7 = icmp ne i32 %6, 128
br i1 %7, label %8, label %10
8: ; preds = %2
store i32 0, i32* %1
%9 = call i32 @sleep(i32 0)
br label %10
10: ; preds = %8, %2
%11 = load i32, i32* %1
%12 = icmp eq i32 %11, 128
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = load i32, i32* %1
ret i32 %14
15: ; preds = %10
br label %2
}

LLVM IR (-O2):
define i32 @ATready() {
%1 = tail call i32 (...) @ATstatus_reg()
%2 = and i32 %1, 1920
%3 = icmp eq i32 %2, 128
br i1 %3, label %9, label %4
4: ; preds = %0, %4
%5 = tail call i32 @sleep(i32 0)
%6 = tail call i32 (...) @ATstatus_reg()
%7 = and i32 %6, 1920
%8 = icmp eq i32 %7, 128
br i1 %8, label %9, label %4
9: ; preds = %4, %0
ret i32 128
}
void C$_Clrbuffs(unsigned length, char **arglist, char **eargv) {
  unsigned i;
  for (i = 0; i < length; i++) {
    free(arglist[i]);
    eargv[i] = 0;
    arglist[i] = 0;
  }
}


x86 assembly (clang, -O0):
<C$_Clrbuffs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    1172 <C$_Clrbuffs+0x62>
mov    -0x10(%rbp),%rax
mov    -0x1c(%rbp),%ecx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x18(%rbp),%rax
mov    -0x1c(%rbp),%ecx
movq   $0x0,(%rax,%rcx,8)
mov    -0x10(%rbp),%rax
mov    -0x1c(%rbp),%ecx
movq   $0x0,(%rax,%rcx,8)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    112a <C$_Clrbuffs+0x1a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<C$_Clrbuffs>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edi,%edi
je     1152 <C$_Clrbuffs+0x42>
mov    %rdx,%r14
mov    %rsi,%r12
mov    %edi,%r15d
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
mov    (%r12,%rbx,8),%rdi
call   1030 <free@plt>
movq   $0x0,(%r14,%rbx,8)
movq   $0x0,(%r12,%rbx,8)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <C$_Clrbuffs+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @"C$_Clrbuffs"(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8**
%7 = alloca i32
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
store i32 0, i32* %7
br label %8
8: ; preds = %26, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %4
%11 = icmp ult i32 %9, %10
br i1 %11, label %12, label %29
12: ; preds = %8
%13 = load i8**, i8*** %5
%14 = load i32, i32* %7
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i8*, i8** %13, i64 %15
%17 = load i8*, i8** %16
%18 = load i8**, i8*** %6
%19 = load i32, i32* %7
%20 = zext i32 %19 to i64
%21 = getelementptr inbounds i8*, i8** %18, i64 %20
store i8* null, i8** %21
%22 = load i8**, i8*** %5
%23 = load i32, i32* %7
%24 = zext i32 %23 to i64
%25 = getelementptr inbounds i8*, i8** %22, i64 %24
store i8* null, i8** %25
br label %26
26: ; preds = %12
%27 = load i32, i32* %7
%28 = add i32 %27, 1
store i32 %28, i32* %7
br label %8
29: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @"C$_Clrbuffs"(i32 %0, i8** nocapture %1, i8** nocapture writeonly %2) {
%4 = icmp eq i32 %0, 0
br i1 %4, label %14, label %5
5: ; preds = %3
%6 = zext i32 %0 to i64
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ 0, %5 ], [ %12, %7 ]
%9 = getelementptr inbounds i8*, i8** %1, i64 %8
%10 = load i8*, i8** %9
tail call void @free(i8* %10)
%11 = getelementptr inbounds i8*, i8** %2, i64 %8
store i8* null, i8** %11
store i8* null, i8** %9
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %6
br i1 %13, label %14, label %7
14: ; preds = %7, %3
ret void
}
/* Variables and functions */
double owon_b35_get_value(int /*<<< orphan*/);
float get_fusor_voltage_kv(void) {
  double ua, kv;
  ua = owon_b35_get_value(0);
  if (ua == 1000002) {
    return 1000002;
  }
  kv = ua;
  return kv;
}


x86 assembly (clang, -O0):
<get_fusor_voltage_kv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
xor    %edi,%edi
call   1030 <owon_b35_get_value@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xecf(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    1153 <get_fusor_voltage_kv+0x43>
jp     1153 <get_fusor_voltage_kv+0x43>
movss  0xebf(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    116b <get_fusor_voltage_kv+0x5b>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fusor_voltage_kv>:
push   %rax
xor    %edi,%edi
call   1030 <owon_b35_get_value@plt>
ucomisd 0xee0(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
jne    1130 <get_fusor_voltage_kv+0x20>
jp     1130 <get_fusor_voltage_kv+0x20>
movss  0xed8(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @get_fusor_voltage_kv() {
%1 = alloca float
%2 = alloca double
%3 = alloca double
%4 = call double @owon_b35_get_value(i32 0)
store double %4, double* %2
%5 = load double, double* %2
%6 = fcmp oeq double %5, 0x412E848400000000
br i1 %6, label %7, label %8
7: ; preds = %0
store float 0x412E848400000000, float* %1
br label %12
8: ; preds = %0
%9 = load double, double* %2
store double %9, double* %3
%10 = load double, double* %3
%11 = fptrunc double %10 to float
store float %11, float* %1
br label %12
12: ; preds = %8, %7
%13 = load float, float* %1
ret float %13
}

LLVM IR (-O2):
define float @get_fusor_voltage_kv() {
%1 = tail call double @owon_b35_get_value(i32 0)
%2 = fcmp oeq double %1, 0x412E848400000000
%3 = fptrunc double %1 to float
%4 = select i1 %2, float 0x412E848400000000, float %3
ret float %4
}
unsigned long HibernateRTCMatch1Get(void) {
  return ((*((volatile unsigned long *)(0x400FC008))));
}


x86 assembly (clang, -O0):
<HibernateRTCMatch1Get>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400fc008,%eax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateRTCMatch1Get>:
mov    0x400fc008,%rax
40
ret

LLVM IR (-O0):
define i64 @HibernateRTCMatch1Get() {
%1 = load volatile i64, i64* inttoptr (i64 1074774024 to i64*)
ret i64 %1
}

LLVM IR (-O2):
define i64 @HibernateRTCMatch1Get() {
%1 = load volatile i64, i64* inttoptr (i64 1074774024 to i64*)
ret i64 %1
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ errno;
int xfutimens(int fd, const struct timespec times[2]) {
  (void)fd;
  (void)times;
  errno = EINVAL;
  return -1;
}


x86 assembly (clang, -O0):
<xfutimens>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec5(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfutimens>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
@EINVAL = global i32 0
@errno = global i32 0
define i32 @xfutimens(i32 %0, %struct.timespec* %1) {
%3 = alloca i32
%4 = alloca %struct.timespec*
store i32 %0, i32* %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load i32, i32* %3
%6 = load %struct.timespec*, %struct.timespec** %4
%7 = load i32, i32* @EINVAL
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@EINVAL = global i32 0
@errno = global i32 0
define i32 @xfutimens(i32 %0, %struct.timespec* nocapture readnone %1) {
%3 = load i32, i32* @EINVAL
store i32 %3, i32* @errno
ret i32 -1
}
__attribute__((no, noclone)) int foo(int x) { return (x << 2) | 4; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
or     $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0x0(,%rdi,4),%eax
or     $0x4,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 2
%5 = or i32 %4, 4
ret i32 %5
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = shl i32 %0, 2
%3 = or i32 %2, 4
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ can_init(int);
void can_init_all() {
  for (int i = 0; i < 2; i++) {
    can_init(i);
  }
}


x86 assembly (clang, -O0):
<can_init_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x2,-0x4(%rbp)
jge    113f <can_init_all+0x2f>
mov    -0x4(%rbp),%edi
call   1030 <can_init@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <can_init_all+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<can_init_all>:
push   %rax
xor    %edi,%edi
call   1030 <can_init@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <can_init@plt>

LLVM IR (-O0):
define void @can_init_all() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %8, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 2
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = load i32, i32* %1
%7 = call i32 @can_init(i32 %6)
br label %8
8: ; preds = %5
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 1
store i32 %10, i32* %1
br label %2
11: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @can_init_all() {
%1 = tail call i32 @can_init(i32 0)
%2 = tail call i32 @can_init(i32 1)
ret void
}
/* Variables and functions */
scalar_t__ __sqrt(double);
long double __sqrtl(long double x) { return ((long double)__sqrt((double)x)); }


x86 assembly (clang, -O0):
<__sqrtl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fstpl  -0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
call   1030 <__sqrt@plt>
mov    %rax,-0x18(%rbp)
fildll -0x18(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sqrtl>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fstpl  0x8(%rsp)
movsd  0x8(%rsp),%xmm0
call   1030 <__sqrt@plt>
mov    %rax,0x10(%rsp)
fildll 0x10(%rsp)
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @__sqrtl(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = fptrunc x86_fp80 %3 to double
%5 = call i64 @__sqrt(double %4)
%6 = sitofp i64 %5 to x86_fp80
ret x86_fp80 %6
}

LLVM IR (-O2):
define x86_fp80 @__sqrtl(x86_fp80 %0) {
%2 = fptrunc x86_fp80 %0 to double
%3 = tail call i64 @__sqrt(double %2)
%4 = sitofp i64 %3 to x86_fp80
ret x86_fp80 %4
}
/* Variables and functions */
int /*<<< orphan*/ iicaF(char *);
void iicaF2(char *x) { iicaF(x); }


x86 assembly (clang, -O0):
<iicaF2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <iicaF@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iicaF2>:
jmp    1030 <iicaF@plt>

LLVM IR (-O0):
define void @iicaF2(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @iicaF(i8* %3)
ret void
}

LLVM IR (-O2):
define void @iicaF2(i8* %0) {
%2 = tail call i32 @iicaF(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void throwing_fork_errors(int fk) {
  if (fk == -1) {
    printf("Unable to fork\n");
    exit(EXIT_FAILURE);
  }
}


x86 assembly (clang, -O0):
<throwing_fork_errors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jne    114f <throwing_fork_errors+0x2f>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<throwing_fork_errors>:
cmp    $0xffffffff,%edi
je     1126 <throwing_fork_errors+0x6>
ret
push   %rax
lea    0xed2(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"Unable to fork\0A\00"
@EXIT_FAILURE = global i32 0
define void @throwing_fork_errors(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_FAILURE
%8 = call i32 @exit(i32 %7)
unreachable
9: ; preds = %1
ret void
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@str = [15 x i8] c"Unable to fork\00"
define void @throwing_fork_errors(i32 %0) {
%2 = icmp eq i32 %0, -1
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str, i64 0, i64 0))
%5 = load i32, i32* @EXIT_FAILURE
%6 = tail call i32 @exit(i32 %5)
unreachable
7: ; preds = %1
ret void
}
int pbcGetHandlerPreconditionAssertLevel() { return 3; }


x86 assembly (clang, -O0):
<pbcGetHandlerPreconditionAssertLevel>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pbcGetHandlerPreconditionAssertLevel>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @pbcGetHandlerPreconditionAssertLevel() {
ret i32 3
}

LLVM IR (-O2):
define i32 @pbcGetHandlerPreconditionAssertLevel() {
ret i32 3
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stdout;
void lib2_function(void) {
  fprintf(stdout, "Hello from lib2.c\n");
  fflush(stdout);
}


x86 assembly (clang, -O0):
<lib2_function>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib2_function>:
push   %rbx
mov    0x2eb8(%rip),%rbx
mov    (%rbx),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
pop    %rbx
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [19 x i8] c"Hello from lib2.c\0A\00"
define void @lib2_function() {
%1 = load i32, i32* @stdout
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stdout
%4 = call i32 @fflush(i32 %3)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [19 x i8] c"Hello from lib2.c\0A\00"
define void @lib2_function() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stdout
%4 = tail call i32 @fflush(i32 %3)
ret void
}
/* Variables and functions */
int rand();
int /*<<< orphan*/ srand(unsigned int);
scalar_t__ time(int /*<<< orphan*/ *);
int generateRandomNumber(int n) {
  srand((unsigned)time(NULL));
  return rand() % n + 1;
}


x86 assembly (clang, -O0):
<generateRandomNumber>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
mov    $0x0,%al
call   1050 <rand@plt>
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generateRandomNumber>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,%edi
call   1030 <srand@plt>
xor    %eax,%eax
call   1050 <rand@plt>
cltd
idiv   %ebx
lea    0x1(%rdx),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @generateRandomNumber(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i64 @time(i32* null)
%4 = trunc i64 %3 to i32
%5 = call i32 @srand(i32 %4)
%6 = call i32 (...) @rand()
%7 = load i32, i32* %2
%8 = srem i32 %6, %7
%9 = add nsw i32 %8, 1
ret i32 %9
}

LLVM IR (-O2):
define i32 @generateRandomNumber(i32 %0) {
%2 = tail call i64 @time(i32* null)
%3 = trunc i64 %2 to i32
%4 = tail call i32 @srand(i32 %3)
%5 = tail call i32 (...) @rand()
%6 = srem i32 %5, %0
%7 = add nsw i32 %6, 1
ret i32 %7
}
int valid_product(void) {
  int retValue_acc;
  {
    retValue_acc = 1;
    return (retValue_acc);
    return (retValue_acc);
  }
}


x86 assembly (clang, -O0):
<valid_product>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_product>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @valid_product() {
%1 = alloca i32
store i32 1, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @valid_product() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ test_add();
int /*<<< orphan*/ test_find();
int /*<<< orphan*/ test_read();
int main(int argc, char **argv) {
  test_read();
  test_add();
  test_find();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <test_read@plt>
mov    $0x0,%al
call   1050 <test_add@plt>
mov    $0x0,%al
call   1040 <test_find@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_read@plt>
xor    %eax,%eax
call   1050 <test_add@plt>
xor    %eax,%eax
call   1040 <test_find@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test_read()
%7 = call i32 (...) @test_add()
%8 = call i32 (...) @test_find()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_read()
%4 = tail call i32 (...) @test_add()
%5 = tail call i32 (...) @test_find()
ret i32 0
}
/* Variables and functions */
void lib_free(void *);
void free(void *p) { return lib_free(p); }


x86 assembly (clang, -O0):
<free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <lib_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free>:
jmp    1030 <lib_free@plt>

LLVM IR (-O0):
define void @free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @free(i8* %0) {
tail call void @lib_free(i8* %0)
ret void
}
/* Variables and functions */
double TdUtcDeltatT(double);
double TdUtcDeltatT2(double jd2k) {
  return TdUtcDeltatT(jd2k / 365.2425 + 2000) / 86400.0;
}


x86 assembly (clang, -O0):
<TdUtcDeltatT2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xee6(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xed2(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1030 <TdUtcDeltatT@plt>
movsd  0xeb9(%rip),%xmm1
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TdUtcDeltatT2>:
push   %rax
divsd  0xee7(%rip),%xmm0
addsd  0xee7(%rip),%xmm0
call   1030 <TdUtcDeltatT@plt>
divsd  0xee2(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @TdUtcDeltatT2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 0x4076D3E147AE147B
%5 = fadd double %4, 2.000000e+03
%6 = call double @TdUtcDeltatT(double %5)
%7 = fdiv double %6, 8.640000e+04
ret double %7
}

LLVM IR (-O2):
define double @TdUtcDeltatT2(double %0) {
%2 = fdiv double %0, 0x4076D3E147AE147B
%3 = fadd double %2, 2.000000e+03
%4 = tail call double @TdUtcDeltatT(double %3)
%5 = fdiv double %4, 8.640000e+04
ret double %5
}
/* Type definitions */
struct j_state {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ i_instr_ri(struct j_state *, int, int /*<<< orphan*/, int,
                              int /*<<< orphan*/);
void i_add_i(struct j_state *s, int reg, int32_t imm) {
  i_instr_ri(s, 1, 0, reg, imm);
}


x86 assembly (clang, -O0):
<i_add_i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <i_instr_ri@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_add_i>:
mov    %edx,%r8d
mov    %esi,%ecx
mov    $0x1,%esi
xor    %edx,%edx
jmp    1030 <i_instr_ri@plt>

LLVM IR (-O0):
%struct.j_state = type { i32 }
define void @i_add_i(%struct.j_state* %0, i32 %1, i32 %2) {
%4 = alloca %struct.j_state*
%5 = alloca i32
%6 = alloca i32
store %struct.j_state* %0, %struct.j_state** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.j_state*, %struct.j_state** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @i_instr_ri(%struct.j_state* %7, i32 1, i32 0, i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
%struct.j_state = type { i32 }
define void @i_add_i(%struct.j_state* %0, i32 %1, i32 %2) {
%4 = tail call i32 @i_instr_ri(%struct.j_state* %0, i32 1, i32 0, i32 %1, i32 %2)
ret void
}
int nested_while_and_or(int p) {
  int i = 0;
  int j = 3 * i;
  while (p == 1 || (i < 30 && i >= 0)) {
    while (p == 1 || (j < 5 && j >= 0)) {
      return j;
    }
    i++;
  }
  return j;
}


x86 assembly (clang, -O0):
<nested_while_and_or>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
imul   $0x3,-0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    $0x1,%al
cmpl   $0x1,-0x8(%rbp)
mov    %al,-0x11(%rbp)
je     1143 <nested_while_and_or+0x43>
xor    %eax,%eax
cmpl   $0x1e,-0xc(%rbp)
mov    %al,-0x12(%rbp)
jge    113d <nested_while_and_or+0x3d>
cmpl   $0x0,-0xc(%rbp)
setge  %al
mov    %al,-0x12(%rbp)
mov    -0x12(%rbp),%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1153 <nested_while_and_or+0x53>
jmp    11af <nested_while_and_or+0xaf>
jmp    1158 <nested_while_and_or+0x58>
mov    $0x1,%al
cmpl   $0x1,-0x8(%rbp)
mov    %al,-0x13(%rbp)
je     1186 <nested_while_and_or+0x86>
xor    %eax,%eax
cmpl   $0x5,-0x10(%rbp)
mov    %al,-0x14(%rbp)
jge    1180 <nested_while_and_or+0x80>
cmpl   $0x0,-0x10(%rbp)
setge  %al
mov    %al,-0x14(%rbp)
mov    -0x14(%rbp),%al
mov    %al,-0x13(%rbp)
mov    -0x13(%rbp),%al
test   $0x1,%al
jne    1196 <nested_while_and_or+0x96>
jmp    11a1 <nested_while_and_or+0xa1>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    11b5 <nested_while_and_or+0xb5>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1115 <nested_while_and_or+0x15>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nested_while_and_or>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nested_while_and_or(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
%6 = load i32, i32* %4
%7 = mul nsw i32 3, %6
store i32 %7, i32* %5
br label %8
8: ; preds = %37, %1
%9 = load i32, i32* %3
%10 = icmp eq i32 %9, 1
br i1 %10, label %19, label %11
11: ; preds = %8
%12 = load i32, i32* %4
%13 = icmp slt i32 %12, 30
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %4
%16 = icmp sge i32 %15, 0
br label %17
17: ; preds = %14, %11
%18 = phi i1 [ false, %11 ], [ %16, %14 ]
br label %19
19: ; preds = %17, %8
%20 = phi i1 [ true, %8 ], [ %18, %17 ]
br i1 %20, label %21, label %40
21: ; preds = %19
br label %22
22: ; preds = %21
%23 = load i32, i32* %3
%24 = icmp eq i32 %23, 1
br i1 %24, label %33, label %25
25: ; preds = %22
%26 = load i32, i32* %5
%27 = icmp slt i32 %26, 5
br i1 %27, label %28, label %31
28: ; preds = %25
%29 = load i32, i32* %5
%30 = icmp sge i32 %29, 0
br label %31
31: ; preds = %28, %25
%32 = phi i1 [ false, %25 ], [ %30, %28 ]
br label %33
33: ; preds = %31, %22
%34 = phi i1 [ true, %22 ], [ %32, %31 ]
br i1 %34, label %35, label %37
35: ; preds = %33
%36 = load i32, i32* %5
store i32 %36, i32* %2
br label %42
37: ; preds = %33
%38 = load i32, i32* %4
%39 = add nsw i32 %38, 1
store i32 %39, i32* %4
br label %8
40: ; preds = %19
%41 = load i32, i32* %5
store i32 %41, i32* %2
br label %42
42: ; preds = %40, %35
%43 = load i32, i32* %2
ret i32 %43
}

LLVM IR (-O2):
define i32 @nested_while_and_or(i32 %0) {
ret i32 0
}
int grid_X509_empty_callback(char *buf, int buf_size, int verify,
                             void *cb_tmp) {
  if (buf_size > 0)
    buf = '\0';
  return 0;
}


x86 assembly (clang, -O0):
<grid_X509_empty_callback>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1124 <grid_X509_empty_callback+0x24>
movq   $0x0,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<grid_X509_empty_callback>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @grid_X509_empty_callback(i8* %0, i32 %1, i32 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i8* %3, i8** %8
%9 = load i32, i32* %6
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %4
store i8* null, i8** %5
br label %12
12: ; preds = %11, %4
ret i32 0
}

LLVM IR (-O2):
define i32 @grid_X509_empty_callback(i8* nocapture readnone %0, i32 %1, i32 %2, i8* nocapture readnone %3) {
ret i32 0
}