xunge/DecIR huggingface dataset:
/* Type definitions */
struct svc_req {
  int dummy;
};

/* Variables and functions */
int initw();
int *initw_1_svc(void *argp, struct svc_req *rqstp) {
  static int result;
  result = initw();
  return &result;
}


x86 assembly (clang, -O0):
<initw_1_svc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <initw@plt>
mov    %eax,0x2eff(%rip)
lea    0x2ef8(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initw_1_svc>:
push   %rax
xor    %eax,%eax
call   1030 <initw@plt>
mov    %eax,0x2f0e(%rip)
lea    0x2f07(%rip),%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.svc_req = type { i32 }
@initw_1_svc.result = internal global i32 0
define i32* @initw_1_svc(i8* %0, %struct.svc_req* %1) {
%3 = alloca i8*
%4 = alloca %struct.svc_req*
store i8* %0, i8** %3
store %struct.svc_req* %1, %struct.svc_req** %4
%5 = call i32 (...) @initw()
store i32 %5, i32* @initw_1_svc.result
ret i32* @initw_1_svc.result
}

LLVM IR (-O2):
%struct.svc_req = type { i32 }
@initw_1_svc.result = internal global i32 0
define i32* @initw_1_svc(i8* nocapture readnone %0, %struct.svc_req* nocapture readnone %1) {
%3 = tail call i32 (...) @initw()
store i32 %3, i32* @initw_1_svc.result
ret i32* @initw_1_svc.result
}
int _dl_geteuid(void) { return 0; }


x86 assembly (clang, -O0):
<_dl_geteuid>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dl_geteuid>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_dl_geteuid() {
ret i32 0
}

LLVM IR (-O2):
define i32 @_dl_geteuid() {
ret i32 0
}
/* Type definitions */
struct mat4 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mat4_scaling(float *, float *);
__attribute__((always_)) struct mat4 *psmat4_scaling(struct mat4 *result,
                                                     struct mat4 *v) {
  mat4_scaling((float *)result, (float *)v);
  return result;
}


x86 assembly (clang, -O0):
<psmat4_scaling>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <mat4_scaling@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psmat4_scaling>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mat4_scaling@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.mat4 = type { i32 }
define %struct.mat4* @psmat4_scaling(%struct.mat4* %0, %struct.mat4* %1) {
%3 = alloca %struct.mat4*
%4 = alloca %struct.mat4*
store %struct.mat4* %0, %struct.mat4** %3
store %struct.mat4* %1, %struct.mat4** %4
%5 = load %struct.mat4*, %struct.mat4** %3
%6 = bitcast %struct.mat4* %5 to float*
%7 = load %struct.mat4*, %struct.mat4** %4
%8 = bitcast %struct.mat4* %7 to float*
%9 = call i32 @mat4_scaling(float* %6, float* %8)
%10 = load %struct.mat4*, %struct.mat4** %3
ret %struct.mat4* %10
}

LLVM IR (-O2):
%struct.mat4 = type { i32 }
define %struct.mat4* @psmat4_scaling(%struct.mat4* returned %0, %struct.mat4* %1) {
%3 = bitcast %struct.mat4* %0 to float*
%4 = bitcast %struct.mat4* %1 to float*
%5 = tail call i32 @mat4_scaling(float* %3, float* %4)
ret %struct.mat4* %0
}
/* Variables and functions */
int /*<<< orphan*/ exec_shell(int);
void *child_thread(void *arg) {
  int sock = *(int *)arg;
  exec_shell(sock);
}


x86 assembly (clang, -O0):
<child_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <exec_shell@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<child_thread>:
mov    (%rdi),%edi
jmp    1030 <exec_shell@plt>

LLVM IR (-O0):
define i8* @child_thread(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = call i32 @exec_shell(i32 %8)
%10 = load i8*, i8** %2
ret i8* %10
}

LLVM IR (-O2):
define noalias i8* @child_thread(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @exec_shell(i32 %3)
ret i8* undef
}
/* Variables and functions */
int bit_floor_log2_impl(int);
int bit_floor_log2(int n) {
  if (n <= 0)
    return -1;
  else
    return bit_floor_log2_impl(n);
}


x86 assembly (clang, -O0):
<bit_floor_log2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jg     1131 <bit_floor_log2+0x21>
movl   $0xffffffff,-0x4(%rbp)
jmp    113c <bit_floor_log2+0x2c>
mov    -0x8(%rbp),%edi
call   1030 <bit_floor_log2_impl@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_floor_log2>:
test   %edi,%edi
jle    1119 <bit_floor_log2+0x9>
jmp    1030 <bit_floor_log2_impl@plt>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @bit_floor_log2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = call i32 @bit_floor_log2_impl(i32 %8)
store i32 %9, i32* %2
br label %10
10: ; preds = %7, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @bit_floor_log2(i32 %0) {
%2 = icmp slt i32 %0, 1
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @bit_floor_log2_impl(i32 %0)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ -1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ assert(void const *);
scalar_t__ strcmp(void const *, void const *);
int hash_string_equal(const void *string_one, const void *string_two) {
  assert(string_one);
  assert(string_two);
  return strcmp(string_one, string_two) == 0;
}


x86 assembly (clang, -O0):
<hash_string_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_string_equal>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <assert@plt>
mov    %r14,%rdi
call   1040 <assert@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @hash_string_equal(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @assert(i8* %5)
%7 = load i8*, i8** %4
%8 = call i32 @assert(i8* %7)
%9 = load i8*, i8** %3
%10 = load i8*, i8** %4
%11 = call i64 @strcmp(i8* %9, i8* %10)
%12 = icmp eq i64 %11, 0
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @hash_string_equal(i8* %0, i8* %1) {
%3 = tail call i32 @assert(i8* %0)
%4 = tail call i32 @assert(i8* %1)
%5 = tail call i64 @strcmp(i8* %0, i8* %1)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
char getchar();
int /*<<< orphan*/ puts(char *);
void SystemPause() {
  puts("\nPress Enter to continue...");
  while (getchar() != '\n') {
  }
}


x86 assembly (clang, -O0):
<SystemPause>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
movsbl %al,%eax
cmp    $0xa,%eax
je     1148 <SystemPause+0x28>
jmp    1130 <SystemPause+0x10>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SystemPause>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
nopl   (%rax)
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    $0xa,%al
jne    1130 <SystemPause+0x10>
pop    %rax
ret

LLVM IR (-O0):
@.str = [28 x i8] c"\0APress Enter to continue...\00"
define void @SystemPause() {
%1 = call i32 @puts(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %6, %0
%3 = call signext i8 (...) @getchar()
%4 = sext i8 %3 to i32
%5 = icmp ne i32 %4, 10
br i1 %5, label %6, label %7
6: ; preds = %2
br label %2
7: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"\0APress Enter to continue...\00"
define void @SystemPause() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
br label %2
2: ; preds = %2, %0
%3 = tail call signext i8 (...) @getchar()
%4 = icmp eq i8 %3, 10
br i1 %4, label %5, label %2
5: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOMEM;
int /*<<< orphan*/ _sizeof_flexarr(size_t *, size_t, size_t, size_t);
void *calloc(int, size_t);
int /*<<< orphan*/ errno;
void *_zalloc_flexarr(size_t sz0, size_t cnt, size_t sz1) {
  size_t sz;
  if (!_sizeof_flexarr(&sz, sz0, cnt, sz1)) {
    errno = ENOMEM;
    return NULL;
  }
  return calloc(1, sz);
}


x86 assembly (clang, -O0):
<_zalloc_flexarr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
lea    -0x28(%rbp),%rdi
call   1030 <_sizeof_flexarr@plt>
cmp    $0x0,%eax
jne    1171 <_zalloc_flexarr+0x51>
mov    0x2e87(%rip),%rax
mov    (%rax),%ecx
mov    0x2e76(%rip),%rax
mov    %ecx,(%rax)
movq   $0x0,-0x8(%rbp)
jmp    1183 <_zalloc_flexarr+0x63>
mov    -0x28(%rbp),%rsi
mov    $0x1,%edi
call   1040 <calloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_zalloc_flexarr>:
push   %rax
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    %rsp,%rdi
call   1030 <_sizeof_flexarr@plt>
test   %eax,%eax
je     1146 <_zalloc_flexarr+0x26>
mov    (%rsp),%rsi
mov    $0x1,%edi
call   1040 <calloc@plt>
pop    %rcx
ret
mov    0x2e93(%rip),%rax
mov    (%rax),%eax
mov    0x2e82(%rip),%rcx
mov    %eax,(%rcx)
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOMEM = global i32 0
@errno = global i32 0
define i8* @_zalloc_flexarr(i64 %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%9 = load i64, i64* %5
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = call i32 @_sizeof_flexarr(i64* %8, i64 %9, i64 %10, i64 %11)
%13 = icmp ne i32 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %3
%15 = load i32, i32* @ENOMEM
store i32 %15, i32* @errno
store i8* null, i8** %4
br label %19
16: ; preds = %3
%17 = load i64, i64* %8
%18 = call i8* @calloc(i32 1, i64 %17)
store i8* %18, i8** %4
br label %19
19: ; preds = %16, %14
%20 = load i8*, i8** %4
ret i8* %20
}

LLVM IR (-O2):
@ENOMEM = global i32 0
@errno = global i32 0
define i8* @_zalloc_flexarr(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = bitcast i64* %4 to i8*
%6 = call i32 @_sizeof_flexarr(i64* %4, i64 %0, i64 %1, i64 %2)
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = load i32, i32* @ENOMEM
store i32 %9, i32* @errno
br label %13
10: ; preds = %3
%11 = load i64, i64* %4
%12 = call i8* @calloc(i32 1, i64 %11)
br label %13
13: ; preds = %10, %8
%14 = phi i8* [ %12, %10 ], [ null, %8 ]
ret i8* %14
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *malloc(size_t);
int /*<<< orphan*/ stderr;
void *jt_safemalloc(size_t bytes) {
  void *mem = malloc(bytes);
  if (!mem) {
    fprintf(stderr, "Out of memory!\n");
    exit(1);
  }
  return mem;
}


x86 assembly (clang, -O0):
<jt_safemalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1173 <jt_safemalloc+0x43>
mov    0x2e85(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jt_safemalloc>:
push   %rax
call   1040 <malloc@plt>
test   %rax,%rax
je     113d <jt_safemalloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [16 x i8] c"Out of memory!\0A\00"
define i8* @jt_safemalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load i32, i32* @stderr
%10 = call i32 @fprintf(i32 %9, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [16 x i8] c"Out of memory!\0A\00"
define noalias i8* @jt_safemalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %1
ret i8* %2
}
void genlbu() {}


x86 assembly (clang, -O0):
<genlbu>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genlbu>:
ret

LLVM IR (-O0):
define void @genlbu() {
ret void
}

LLVM IR (-O2):
define void @genlbu() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *malloc(int);
void tautologyGT(unsigned a) {
  char *b = malloc(1);
  if (a > -1U)
    return;
  free(b);
}


x86 assembly (clang, -O0):
<tautologyGT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jbe    1148 <tautologyGT+0x28>
jmp    1151 <tautologyGT+0x31>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tautologyGT>:
push   %rax
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @tautologyGT(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = call i8* @malloc(i32 1)
store i8* %4, i8** %3
%5 = load i32, i32* %2
%6 = icmp ugt i32 %5, -1
br i1 %6, label %7, label %8
7: ; preds = %1
br label %11
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i32 @free(i8* %9)
br label %11
11: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
define void @tautologyGT(i32 %0) {
%2 = tail call dereferenceable_or_null(1) i8* @malloc(i32 1)
%3 = tail call i32 @free(i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bzero(void *, size_t);
void *memory_clear(void *p, size_t n) {
  if (NULL != p) {
    bzero(p, n);
  }
  return p;
}


x86 assembly (clang, -O0):
<memory_clear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
je     1139 <memory_clear+0x29>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <bzero@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memory_clear>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
je     1121 <memory_clear+0x11>
mov    %rbx,%rdi
call   1030 <bzero@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @memory_clear(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* null, %5
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = load i64, i64* %4
%10 = call i32 @bzero(i8* %8, i64 %9)
br label %11
11: ; preds = %7, %2
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @memory_clear(i8* returned writeonly %0, i64 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 @bzero(i8* %0, i64 %1)
br label %6
6: ; preds = %4, %2
ret i8* %0
}
unsigned f4(unsigned x, int y) {
  unsigned a = (int)x - y;
  return a - x;
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
mov    %esi,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @f4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = sub nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i32, i32* %3
%11 = sub i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @f4(i32 %0, i32 %1) {
%3 = sub i32 0, %1
ret i32 %3
}
int nop() { return (0); }


x86 assembly (clang, -O0):
<nop>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nop>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nop() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nop() {
ret i32 0
}
/* Type definitions */
struct array_s {
  int dummy;
};

/* Variables and functions */
int array_shrink_with_ratio(struct array_s *, double);
int array_shrink(struct array_s *a) { return array_shrink_with_ratio(a, 1.0); }


x86 assembly (clang, -O0):
<array_shrink>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
movsd  0xed8(%rip),%xmm0
call   1030 <array_shrink_with_ratio@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<array_shrink>:
movsd  0xee8(%rip),%xmm0
jmp    1030 <array_shrink_with_ratio@plt>

LLVM IR (-O0):
%struct.array_s = type { i32 }
define i32 @array_shrink(%struct.array_s* %0) {
%2 = alloca %struct.array_s*
store %struct.array_s* %0, %struct.array_s** %2
%3 = load %struct.array_s*, %struct.array_s** %2
%4 = call i32 @array_shrink_with_ratio(%struct.array_s* %3, double 1.000000e+00)
ret i32 %4
}

LLVM IR (-O2):
%struct.array_s = type { i32 }
define i32 @array_shrink(%struct.array_s* %0) {
%2 = tail call i32 @array_shrink_with_ratio(%struct.array_s* %0, double 1.000000e+00)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void writeb(uint8_t val, void *addr) { *((volatile uint8_t *)addr) = val; }


x86 assembly (clang, -O0):
<writeb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeb>:
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @writeb(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
store volatile i32 %5, i32* %7
ret void
}

LLVM IR (-O2):
define void @writeb(i32 %0, i8* %1) {
%3 = bitcast i8* %1 to i32*
store volatile i32 %0, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
size_t strlcat(char *, char const *, size_t);
size_t strlwcat(char *dst, const char *src, size_t siz) {
  size_t len;
  len = strlcat(dst, src, siz);
  if (len >= siz) {
    printf("strlwcat: ENAMETOOLONG\n");
  }
  return len;
}


x86 assembly (clang, -O0):
<strlwcat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strlcat@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jb     1163 <strlwcat+0x43>
lea    0xea2(%rip),%rdi
call   1040 <printf@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlwcat>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
call   1040 <strlcat@plt>
mov    %rax,%r14
cmp    %rbx,%rax
jb     1140 <strlwcat+0x20>
lea    0xec5(%rip),%rdi
call   1030 <puts@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [24 x i8] c"strlwcat: ENAMETOOLONG\0A\00"
define i64 @strlwcat(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = call i64 @strlcat(i8* %8, i8* %9, i64 %10)
store i64 %11, i64* %7
%12 = load i64, i64* %7
%13 = load i64, i64* %6
%14 = icmp uge i64 %12, %13
br i1 %14, label %15, label %17
15: ; preds = %3
%16 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %17
17: ; preds = %15, %3
%18 = load i64, i64* %7
ret i64 %18
}

LLVM IR (-O2):
@str = [23 x i8] c"strlwcat: ENAMETOOLONG\00"
define i64 @strlwcat(i8* %0, i8* %1, i64 %2) {
%4 = tail call i64 @strlcat(i8* %0, i8* %1, i64 %2)
%5 = icmp ult i64 %4, %2
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
br label %8
8: ; preds = %6, %3
ret i64 %4
}
unsigned xrop3_244_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~D;
  stk2 = S & stk3;
  stk1 = T | stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_244_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_244_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
not    %eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_244_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %6
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %7
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %5
%36 = load i32, i32* %6
%37 = and i32 %35, %36
%38 = or i32 %34, %37
ret i32 %38
}

LLVM IR (-O2):
define i32 @xrop3_244_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, -1
%8 = and i32 %6, %7
%9 = or i32 %8, %3
ret i32 %9
}
void xfrm4_tunnel_deregister(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<xfrm4_tunnel_deregister>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfrm4_tunnel_deregister>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.xfrm4_tunnel_deregister = [24 x i8] c"xfrm4_tunnel_deregister\00"
define void @xfrm4_tunnel_deregister() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @__func__.xfrm4_tunnel_deregister, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.xfrm4_tunnel_deregister = [24 x i8] c"xfrm4_tunnel_deregister\00"
define void @xfrm4_tunnel_deregister() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @__func__.xfrm4_tunnel_deregister, i64 0, i64 0))
ret void
}
unsigned replace_byte(unsigned x, int i, unsigned char b) {
  unsigned mask = 0xff << (i * 8);
  unsigned replace_byte = b << (i * 8);
  return (x & ~mask) ^ replace_byte;
}


x86 assembly (clang, -O0):
<replace_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%ecx
shl    $0x3,%ecx
mov    $0xff,%eax
shl    %cl,%eax
mov    %eax,-0x10(%rbp)
movzbl -0x9(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    $0x3,%ecx
shl    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
xor    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<replace_byte>:
lea    0x0(,%rsi,8),%ecx
mov    $0xff,%eax
shl    %cl,%eax
shl    %cl,%edx
not    %eax
and    %edi,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @replace_byte(i32 %0, i32 %1, i8 zeroext %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8 %2, i8* %6
%9 = load i32, i32* %5
%10 = mul nsw i32 %9, 8
%11 = shl i32 255, %10
store i32 %11, i32* %7
%12 = load i8, i8* %6
%13 = zext i8 %12 to i32
%14 = load i32, i32* %5
%15 = mul nsw i32 %14, 8
%16 = shl i32 %13, %15
store i32 %16, i32* %8
%17 = load i32, i32* %4
%18 = load i32, i32* %7
%19 = xor i32 %18, -1
%20 = and i32 %17, %19
%21 = load i32, i32* %8
%22 = xor i32 %20, %21
ret i32 %22
}

LLVM IR (-O2):
define i32 @replace_byte(i32 %0, i32 %1, i8 zeroext %2) {
%4 = shl nsw i32 %1, 3
%5 = shl i32 255, %4
%6 = zext i8 %2 to i32
%7 = shl i32 %6, %4
%8 = xor i32 %5, -1
%9 = and i32 %8, %0
%10 = xor i32 %9, %7
ret i32 %10
}
const char *__malidrv_build_info(void) {
  return "malidrv:  API_VERSION=401 REPO_URL=heads/odroidc_2014.05 "
         "REVISION=-2014.05-3-gf4cc986 CHANGED_REVISION=2014.05-3-gf4cc986 "
         "CHANGE_DATE=2014-09-22 15:09:31 +0900 BUILD_DATE=Seg Out 13 07:21:28 "
         "BRT 2014 BUILD=release TARGET_PLATFORM=meson_m450 MALI_PLATFORM= "
         "KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP=y "
         "USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 "
         "USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [440 x i8] c"malidrv: API_VERSION=401 REPO_URL=heads/odroidc_2014.05 REVISION=-2014.05-3-gf4cc986 CHANGED_REVISION=2014.05-3-gf4cc986 CHANGE_DATE=2014-09-22 15:09:31 +0900 BUILD_DATE=Seg Out 13 07:21:28 BRT 2014 BUILD=release TARGET_PLATFORM=meson_m450 MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP=y USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([440 x i8], [440 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [440 x i8] c"malidrv: API_VERSION=401 REPO_URL=heads/odroidc_2014.05 REVISION=-2014.05-3-gf4cc986 CHANGED_REVISION=2014.05-3-gf4cc986 CHANGE_DATE=2014-09-22 15:09:31 +0900 BUILD_DATE=Seg Out 13 07:21:28 BRT 2014 BUILD=release TARGET_PLATFORM=meson_m450 MALI_PLATFORM= KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP=y USING_PROFILING= USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=1 USING_POWER_PERFORMANCE_POLICY= MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([440 x i8], [440 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ enomem();
char *malloc(size_t);
char *memcpy(char *, char const *, size_t);
int strlen(char const *);
char *bmake_strdup(const char *str) {
  size_t len;
  char *p;
  len = strlen(str) + 1;
  if ((p = malloc(len)) == NULL)
    enomem();
  return memcpy(p, str, len);
}


x86 assembly (clang, -O0):
<bmake_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1060 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    117c <bmake_strdup+0x3c>
mov    $0x0,%al
call   1050 <enomem@plt>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bmake_strdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1060 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    116a <bmake_strdup+0x2a>
xor    %eax,%eax
call   1050 <enomem@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
pop    %rbx
pop    %r14
pop    %r15
jmp    1040 <memcpy@plt>

LLVM IR (-O0):
define i8* @bmake_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = call i8* @malloc(i64 %9)
store i8* %10, i8** %4
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %14
12: ; preds = %1
%13 = call i32 (...) @enomem()
br label %14
14: ; preds = %12, %1
%15 = load i8*, i8** %4
%16 = load i8*, i8** %2
%17 = load i64, i64* %3
%18 = call i8* @memcpy(i8* %15, i8* %16, i64 %17)
ret i8* %18
}

LLVM IR (-O2):
define noalias i8* @bmake_strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i8* @malloc(i64 %4)
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = tail call i32 (...) @enomem()
br label %9
9: ; preds = %7, %1
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %5, i8* align 1 %0, i64 %4, i1 false)
ret i8* %5
}
void foo074(int p) {}


x86 assembly (clang, -O0):
<foo074>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo074>:
ret

LLVM IR (-O0):
define void @foo074(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo074(i32 %0) {
ret void
}
int bad(int ch) {
  if (ch >= 0 && ch < 8)
    return 1;
  if (ch == 11)
    return 1;
  if (ch > 13 && ch <= 31)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<bad>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1127 <bad+0x27>
cmpl   $0x8,-0x8(%rbp)
jge    1127 <bad+0x27>
movl   $0x1,-0x4(%rbp)
jmp    1164 <bad+0x64>
cmpl   $0xb,-0x8(%rbp)
jne    113d <bad+0x3d>
movl   $0x1,-0x4(%rbp)
jmp    1164 <bad+0x64>
cmpl   $0xd,-0x8(%rbp)
jle    115d <bad+0x5d>
cmpl   $0x1f,-0x8(%rbp)
jg     115d <bad+0x5d>
movl   $0x1,-0x4(%rbp)
jmp    1164 <bad+0x64>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bad>:
cmp    $0x8,%edi
setb   %al
cmp    $0xb,%edi
sete   %cl
or     %al,%cl
add    $0xfffffff2,%edi
cmp    $0x12,%edi
setb   %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @bad(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp slt i32 %7, 8
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %22
10: ; preds = %6, %1
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 11
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 1, i32* %2
br label %22
14: ; preds = %10
%15 = load i32, i32* %3
%16 = icmp sgt i32 %15, 13
br i1 %16, label %17, label %21
17: ; preds = %14
%18 = load i32, i32* %3
%19 = icmp sle i32 %18, 31
br i1 %19, label %20, label %21
20: ; preds = %17
store i32 1, i32* %2
br label %22
21: ; preds = %17, %14
store i32 0, i32* %2
br label %22
22: ; preds = %21, %20, %13, %9
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @bad(i32 %0) {
%2 = icmp ult i32 %0, 8
%3 = icmp eq i32 %0, 11
%4 = or i1 %2, %3
%5 = add i32 %0, -14
%6 = icmp ult i32 %5, 18
%7 = or i1 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Type definitions */
typedef scalar_t__ uint16_t;
typedef scalar_t__ int16_t;

/* Variables and functions */
bool InsSequenceLt(uint16_t a, uint16_t b) { return (int16_t)(a - b) < 0; }


x86 assembly (clang, -O0):
<InsSequenceLt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    -0x10(%rbp),%rax
cmp    $0x0,%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<InsSequenceLt>:
xor    %eax,%eax
cmp    %rsi,%rdi
setl   %al
ret

LLVM IR (-O0):
define i32 @InsSequenceLt(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub nsw i64 %5, %6
%8 = icmp slt i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @InsSequenceLt(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ fenv_t;

/* Variables and functions */
int /*<<< orphan*/ fegetenv(int /*<<< orphan*/ *);
void nullPointer_fegetenv(void) {
  fenv_t *envp = 0;
  (void)fegetenv(envp);
  (void)fegetenv(0);
}


x86 assembly (clang, -O0):
<nullPointer_fegetenv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fegetenv@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1030 <fegetenv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nullPointer_fegetenv>:
push   %rax
xor    %edi,%edi
call   1030 <fegetenv@plt>
xor    %edi,%edi
pop    %rax
jmp    1030 <fegetenv@plt>

LLVM IR (-O0):
define void @nullPointer_fegetenv() {
%1 = alloca i32*
store i32* null, i32** %1
%2 = load i32*, i32** %1
%3 = call i32 @fegetenv(i32* %2)
%4 = call i32 @fegetenv(i32* null)
ret void
}

LLVM IR (-O2):
define void @nullPointer_fegetenv() {
%1 = tail call i32 @fegetenv(i32* null)
%2 = tail call i32 @fegetenv(i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _SC_NPROCESSORS_ONLN;
scalar_t__ sysconf(int /*<<< orphan*/);
int GetNumCPUCores(void) { return (int)sysconf(_SC_NPROCESSORS_ONLN); }


x86 assembly (clang, -O0):
<GetNumCPUCores>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <sysconf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetNumCPUCores>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <sysconf@plt>

LLVM IR (-O0):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @GetNumCPUCores() {
%1 = load i32, i32* @_SC_NPROCESSORS_ONLN
%2 = call i64 @sysconf(i32 %1)
%3 = trunc i64 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
@_SC_NPROCESSORS_ONLN = global i32 0
define i32 @GetNumCPUCores() {
%1 = load i32, i32* @_SC_NPROCESSORS_ONLN
%2 = tail call i64 @sysconf(i32 %1)
%3 = trunc i64 %2 to i32
ret i32 %3
}
void _infix_operator_div_float_float(float lhs, float rhs, float *__rval_1) {
  *__rval_1 = lhs / rhs;
}


x86 assembly (clang, -O0):
<_infix_operator_div_float_float>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_infix_operator_div_float_float>:
divss  %xmm1,%xmm0
movss  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @_infix_operator_div_float_float(float %0, float %1, float* %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float*
store float %0, float* %4
store float %1, float* %5
store float* %2, float** %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fdiv float %7, %8
%10 = load float*, float** %6
store float %9, float* %10
ret void
}

LLVM IR (-O2):
define void @_infix_operator_div_float_float(float %0, float %1, float* nocapture writeonly %2) {
%4 = fdiv float %0, %1
store float %4, float* %2
ret void
}
/* Variables and functions */
char *m_strn(int, int /*<<< orphan*/);
char *m_str(int value) { return m_strn(value, 0); }


x86 assembly (clang, -O0):
<m_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <m_strn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_str>:
xor    %esi,%esi
jmp    1030 <m_strn@plt>

LLVM IR (-O0):
define i8* @m_str(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @m_strn(i32 %3, i32 0)
ret i8* %4
}

LLVM IR (-O2):
define i8* @m_str(i32 %0) {
%2 = tail call i8* @m_strn(i32 %0, i32 0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ lmrpe3_(double *, double *, int *);
void clmrpe3(double *para, double *xmom, int nmom) {
  lmrpe3_(para, xmom, &nmom);
}


x86 assembly (clang, -O0):
<clmrpe3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x14(%rbp),%rdx
call   1030 <lmrpe3_@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clmrpe3>:
push   %rax
mov    %edx,0x4(%rsp)
lea    0x4(%rsp),%rdx
call   1030 <lmrpe3_@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @clmrpe3(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = load double*, double** %4
%8 = load double*, double** %5
%9 = call i32 @lmrpe3_(double* %7, double* %8, i32* %6)
ret void
}

LLVM IR (-O2):
define void @clmrpe3(double* %0, double* %1, i32 %2) {
%4 = alloca i32
store i32 %2, i32* %4
%5 = call i32 @lmrpe3_(double* %0, double* %1, i32* %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
int /*<<< orphan*/ ntohl(int /*<<< orphan*/);
u_int32_t store_swp_ntoh32(u_int32_t v) { return ntohl(v); }


x86 assembly (clang, -O0):
<store_swp_ntoh32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ntohl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<store_swp_ntoh32>:
jmp    1030 <ntohl@plt>

LLVM IR (-O0):
define i32 @store_swp_ntoh32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ntohl(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @store_swp_ntoh32(i32 %0) {
%2 = tail call i32 @ntohl(i32 %0)
ret i32 %2
}
void sub_d(double *source1, double *source2, double *target) {
  *target = (*source1) - (*source2);
}


x86 assembly (clang, -O0):
<sub_d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rax
subsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub_d>:
movsd  (%rdi),%xmm0
subsd  (%rsi),%xmm0
movsd  %xmm0,(%rdx)
ret

LLVM IR (-O0):
define void @sub_d(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
%7 = load double*, double** %4
%8 = load double, double* %7
%9 = load double*, double** %5
%10 = load double, double* %9
%11 = fsub double %8, %10
%12 = load double*, double** %6
store double %11, double* %12
ret void
}

LLVM IR (-O2):
define void @sub_d(double* nocapture %0, double* nocapture %1, double* nocapture writeonly %2) {
%4 = load double, double* %0
%5 = load double, double* %1
%6 = fsub double %4, %5
store double %6, double* %2
ret void
}
__attribute__((__always___)) void mmx_zero_reg() {
  __asm__ __volatile__("pxor"
                       " %"
                       "mm0"
                       ", %"
                       "mm0");
}


x86 assembly (clang, -O0):
<mmx_zero_reg>:
push   %rbp
mov    %rsp,%rbp
pxor   %mm0,%mm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmx_zero_reg>:
pxor   %mm0,%mm0
ret

LLVM IR (-O0):
define void @mmx_zero_reg() {
ret void
}

LLVM IR (-O2):
define void @mmx_zero_reg() {
tail call void asm sideeffect "pxor %mm0, %mm0", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x42() {
  Assert_real((iscntrl(66) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              335, ("iscntrl should be 0 for B"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x42>:
push   %rbp
mov    %rsp,%rbp
mov    $0x42,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x14f,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x42>:
push   %rax
mov    $0x42,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x14f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for B\00"
define void @t_iscntrl_0x42() {
%1 = call i64 @iscntrl(i32 66)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 335, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for B\00"
define void @t_iscntrl_0x42() {
%1 = tail call i64 @iscntrl(i32 66)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 335, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int commlen(const char *str1, const char *str2) {
  int i = 0;
  while (*str1 && (*str1++ == *str2++))
    i++;
  return (i);
}


x86 assembly (clang, -O0):
<commlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x15(%rbp)
je     1154 <commlen+0x54>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
movsbl (%rcx),%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    1164 <commlen+0x64>
jmp    1172 <commlen+0x72>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <commlen+0x13>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<commlen>:
mov    (%rdi),%cl
xor    %eax,%eax
test   %cl,%cl
je     1122 <commlen+0x22>
nopl   0x0(%rax,%rax,1)
cmp    (%rsi,%rax,1),%cl
jne    1122 <commlen+0x22>
movzbl 0x1(%rdi,%rax,1),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <commlen+0x10>
ret

LLVM IR (-O0):
define i32 @commlen(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %23, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %6
%12 = load i8*, i8** %3
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %3
%14 = load i8, i8* %12
%15 = sext i8 %14 to i32
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %4
%18 = load i8, i8* %16
%19 = sext i8 %18 to i32
%20 = icmp eq i32 %15, %19
br label %21
21: ; preds = %11, %6
%22 = phi i1 [ false, %6 ], [ %20, %11 ]
br i1 %22, label %23, label %26
23: ; preds = %21
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
br label %6
26: ; preds = %21
%27 = load i32, i32* %5
ret i32 %27
}

LLVM IR (-O2):
define i32 @commlen(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %18, label %5
5: ; preds = %2, %12
%6 = phi i8 [ %16, %12 ], [ %3, %2 ]
%7 = phi i32 [ %15, %12 ], [ 0, %2 ]
%8 = phi i8* [ %13, %12 ], [ %1, %2 ]
%9 = phi i8* [ %14, %12 ], [ %0, %2 ]
%10 = load i8, i8* %8
%11 = icmp eq i8 %6, %10
br i1 %11, label %12, label %18
12: ; preds = %5
%13 = getelementptr inbounds i8, i8* %8, i64 1
%14 = getelementptr inbounds i8, i8* %9, i64 1
%15 = add nuw nsw i32 %7, 1
%16 = load i8, i8* %14
%17 = icmp eq i8 %16, 0
br i1 %17, label %18, label %5
18: ; preds = %5, %12, %2
%19 = phi i32 [ 0, %2 ], [ %15, %12 ], [ %7, %5 ]
ret i32 %19
}
/* Variables and functions */
unsigned char dxl_read_byte(unsigned char, int);
unsigned char getCCWComplianceSlope(unsigned char id) {
  return dxl_read_byte(id, (27));
}


x86 assembly (clang, -O0):
<getCCWComplianceSlope>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x1b,%esi
movzbl -0x1(%rbp),%edi
call   1030 <dxl_read_byte@plt>
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCCWComplianceSlope>:
mov    $0x1b,%esi
jmp    1030 <dxl_read_byte@plt>

LLVM IR (-O0):
define zeroext i8 @getCCWComplianceSlope(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call zeroext i8 @dxl_read_byte(i8 zeroext %3, i32 27)
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @getCCWComplianceSlope(i8 zeroext %0) {
%2 = tail call zeroext i8 @dxl_read_byte(i8 zeroext %0, i32 27)
ret i8 %2
}
/* Variables and functions */
int printf(char *, char *);
int Sys_Printf(char *s, ...) { return printf("%s", s); }


x86 assembly (clang, -O0):
<Sys_Printf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sys_Printf>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @Sys_Printf(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 %4
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @Sys_Printf(i8* %0, ...) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 %2
}
char meat_string_is_digit(unsigned char const c_buf) {
  return (char)(((unsigned char)('0') <= c_buf) &&
                ((unsigned char)('9') >= c_buf));
}


x86 assembly (clang, -O0):
<meat_string_is_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
xor    %eax,%eax
mov    $0x30,%ecx
cmp    %edx,%ecx
mov    %al,-0x2(%rbp)
jg     1131 <meat_string_is_digit+0x31>
movzbl -0x1(%rbp),%ecx
mov    $0x39,%eax
cmp    %ecx,%eax
setge  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<meat_string_is_digit>:
add    $0xd0,%dil
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define signext i8 @meat_string_is_digit(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = icmp sle i32 48, %4
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = zext i8 %7 to i32
%9 = icmp sge i32 57, %8
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
%13 = trunc i32 %12 to i8
ret i8 %13
}

LLVM IR (-O2):
define signext i8 @meat_string_is_digit(i8 zeroext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i8
ret i8 %4
}