xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void _f_f_f(float a, float b) { printf("a:float, b:float\n"); }


x86 assembly (clang, -O0):
<_f_f_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_f_f_f>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"a:float, b:float\0A\00"
define void @_f_f_f(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [17 x i8] c"a:float, b:float\00"
define void @_f_f_f(float %0, float %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
ret void
}
int nand_cfg_interface(void) { return 1 ? 1 : 0; }


x86 assembly (clang, -O0):
<nand_cfg_interface>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_cfg_interface>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @nand_cfg_interface() {
ret i32 1
}

LLVM IR (-O2):
define i32 @nand_cfg_interface() {
ret i32 1
}
void diesig(dummy) int dummy __attribute__((__unused__));
{ die(); }


x86 assembly (clang, -O0):
<diesig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <die@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diesig>:
xor    %eax,%eax
jmp    1030 <die@plt>

LLVM IR (-O0):
define void @diesig(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @die()
ret void
}

LLVM IR (-O2):
define void @diesig(i32 %0) {
%2 = tail call i32 (...) @die()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ setup_exec();
int /*<<< orphan*/ setup_reader();
void setup() {
  setup_reader();
  setup_exec();
}


x86 assembly (clang, -O0):
<setup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <setup_reader@plt>
mov    $0x0,%al
call   1040 <setup_exec@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup>:
push   %rax
xor    %eax,%eax
call   1030 <setup_reader@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <setup_exec@plt>

LLVM IR (-O0):
define void @setup() {
%1 = call i32 (...) @setup_reader()
%2 = call i32 (...) @setup_exec()
ret void
}

LLVM IR (-O2):
define void @setup() {
%1 = tail call i32 (...) @setup_reader()
%2 = tail call i32 (...) @setup_exec()
ret void
}
long __mulsi3(unsigned long a, unsigned long b) {
  long res = 0;
  while (a) {
    if (a & 1) {
      res += b;
    }
    b <<= 1;
    a >>= 1;
  }
  return res;
}


x86 assembly (clang, -O0):
<__mulsi3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     115a <__mulsi3+0x5a>
mov    -0x8(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     113d <__mulsi3+0x3d>
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1114 <__mulsi3+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__mulsi3>:
xor    %eax,%eax
test   %rdi,%rdi
je     112d <__mulsi3+0x2d>
mov    %rdi,%rcx
nopw   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
neg    %rdx
and    %rsi,%rdx
add    %rdx,%rax
add    %rsi,%rsi
shr    %rcx
cmp    $0x1,%rdi
mov    %rcx,%rdi
ja     1110 <__mulsi3+0x10>
ret

LLVM IR (-O0):
define i64 @__mulsi3(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %17, %2
%7 = load i64, i64* %3
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %22
9: ; preds = %6
%10 = load i64, i64* %3
%11 = and i64 %10, 1
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i64, i64* %4
%15 = load i64, i64* %5
%16 = add i64 %15, %14
store i64 %16, i64* %5
br label %17
17: ; preds = %13, %9
%18 = load i64, i64* %4
%19 = shl i64 %18, 1
store i64 %19, i64* %4
%20 = load i64, i64* %3
%21 = lshr i64 %20, 1
store i64 %21, i64* %3
br label %6
22: ; preds = %6
%23 = load i64, i64* %5
ret i64 %23
}

LLVM IR (-O2):
define i64 @__mulsi3(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 0
br i1 %3, label %15, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %11, %4 ], [ 0, %2 ]
%6 = phi i64 [ %12, %4 ], [ %1, %2 ]
%7 = phi i64 [ %13, %4 ], [ %0, %2 ]
%8 = and i64 %7, 1
%9 = icmp eq i64 %8, 0
%10 = select i1 %9, i64 0, i64 %6
%11 = add i64 %10, %5
%12 = shl i64 %6, 1
%13 = lshr i64 %7, 1
%14 = icmp ult i64 %7, 2
br i1 %14, label %15, label %4
15: ; preds = %4, %2
%16 = phi i64 [ 0, %2 ], [ %11, %4 ]
ret i64 %16
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char const *);
char *strdup2(const char *str) {
  int n = strlen(str) + 1;
  char *dup = malloc(n);
  if (dup) {
    strcpy(dup, str);
  }
  return dup;
}


x86 assembly (clang, -O0):
<strdup2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     116f <strdup2+0x3f>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup2>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1157 <strdup2+0x27>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strdup2(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i8* @malloc(i32 %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %16
12: ; preds = %1
%13 = load i8*, i8** %4
%14 = load i8*, i8** %2
%15 = call i32 @strcpy(i8* %13, i8* %14)
br label %16
16: ; preds = %12, %1
%17 = load i8*, i8** %4
ret i8* %17
}

LLVM IR (-O2):
define i8* @strdup2(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i8* @malloc(i32 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @strcpy(i8* %4, i8* %0)
br label %8
8: ; preds = %6, %1
ret i8* %4
}
void compute_forces_acoustic_cuda_(long *Mesh_pointer, int *iphase,
                                   int *nspec_outer_acoustic,
                                   int *nspec_inner_acoustic) {}


x86 assembly (clang, -O0):
<compute_forces_acoustic_cuda_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_forces_acoustic_cuda_>:
ret

LLVM IR (-O0):
define void @compute_forces_acoustic_cuda_(i64* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i64*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
store i64* %0, i64** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
ret void
}

LLVM IR (-O2):
define void @compute_forces_acoustic_cuda_(i64* nocapture %0, i32* nocapture %1, i32* nocapture %2, i32* nocapture %3) {
ret void
}
int samplestosize(int s) { return (s + 0x1e) / 0x20 * 0x24; }


x86 assembly (clang, -O0):
<samplestosize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1e,%eax
mov    $0x20,%ecx
cltd
idiv   %ecx
imul   $0x24,%eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<samplestosize>:
lea    0x1e(%rdi),%eax
add    $0x3d,%edi
test   %eax,%eax
cmovns %eax,%edi
sar    $0x5,%edi
shl    $0x2,%edi
lea    (%rdi,%rdi,8),%eax
ret

LLVM IR (-O0):
define i32 @samplestosize(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 30
%5 = sdiv i32 %4, 32
%6 = mul nsw i32 %5, 36
ret i32 %6
}

LLVM IR (-O2):
define i32 @samplestosize(i32 %0) {
%2 = add nsw i32 %0, 30
%3 = sdiv i32 %2, 32
%4 = mul nsw i32 %3, 36
ret i32 %4
}
void swap(int *a, int *b) {
  int temp;
  temp = *b;
  *b = *a;
  *a = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rsi),%eax
mov    (%rdi),%ecx
mov    %ecx,(%rsi)
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %3
%9 = load i32, i32* %8
%10 = load i32*, i32** %4
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %3
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = load i32, i32* %0
store i32 %4, i32* %1
store i32 %3, i32* %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ ****iconv_t;

/* Variables and functions */
int /*<<< orphan*/ iconv_close(int /*<<< orphan*/ ****);
void xml_iconv_release(void *data) {
  iconv_t cd = (iconv_t *)data;
  iconv_close(cd);
}


x86 assembly (clang, -O0):
<xml_iconv_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <iconv_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xml_iconv_release>:
jmp    1030 <iconv_close@plt>

LLVM IR (-O0):
define void @xml_iconv_release(i8* %0) {
%2 = alloca i8*
%3 = alloca i32****
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*****
%6 = bitcast i32***** %5 to i32****
store i32**** %6, i32***** %3
%7 = load i32****, i32***** %3
%8 = call i32 @iconv_close(i32**** %7)
ret void
}

LLVM IR (-O2):
define void @xml_iconv_release(i8* %0) {
%2 = bitcast i8* %0 to i32****
%3 = tail call i32 @iconv_close(i32**** %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EnableCursor(int);
int /*<<< orphan*/ SetCursorLocation(int, int);
void InitCursor(void) {
  EnableCursor(1);
  SetCursorLocation((14 >> 1) - 1, (10 >> 1) - 1);
}


x86 assembly (clang, -O0):
<InitCursor>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <EnableCursor@plt>
mov    $0x6,%edi
mov    $0x4,%esi
call   1040 <SetCursorLocation@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<InitCursor>:
push   %rax
mov    $0x1,%edi
call   1030 <EnableCursor@plt>
mov    $0x6,%edi
mov    $0x4,%esi
pop    %rax
jmp    1040 <SetCursorLocation@plt>

LLVM IR (-O0):
define void @InitCursor() {
%1 = call i32 @EnableCursor(i32 1)
%2 = call i32 @SetCursorLocation(i32 6, i32 4)
ret void
}

LLVM IR (-O2):
define void @InitCursor() {
%1 = tail call i32 @EnableCursor(i32 1)
%2 = tail call i32 @SetCursorLocation(i32 6, i32 4)
ret void
}
/* Variables and functions */
int recv(int, void *, size_t, int /*<<< orphan*/);
int udp_recv(void *arg, void *buf, size_t len) {
  int *fd = (int *)arg;
  return recv(*fd, buf, len, 0);
}


x86 assembly (clang, -O0):
<udp_recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <recv@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<udp_recv>:
mov    (%rdi),%edi
xor    %ecx,%ecx
jmp    1030 <recv@plt>

LLVM IR (-O0):
define i32 @udp_recv(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %7
%10 = load i32*, i32** %7
%11 = load i32, i32* %10
%12 = load i8*, i8** %5
%13 = load i64, i64* %6
%14 = call i32 @recv(i32 %11, i8* %12, i64 %13, i32 0)
ret i32 %14
}

LLVM IR (-O2):
define i32 @udp_recv(i8* nocapture %0, i8* %1, i64 %2) {
%4 = bitcast i8* %0 to i32*
%5 = load i32, i32* %4
%6 = tail call i32 @recv(i32 %5, i8* %1, i64 %2, i32 0)
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ OCSP_RESPBYTES;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
int /*<<< orphan*/ ASN1_item_free(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ OCSP_RESPBYTES_it;
void OCSP_RESPBYTES_free(OCSP_RESPBYTES *a) {
  ASN1_item_free((ASN1_VALUE *)a, &OCSP_RESPBYTES_it);
}


x86 assembly (clang, -O0):
<OCSP_RESPBYTES_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rsi
call   1030 <ASN1_item_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OCSP_RESPBYTES_free>:
mov    0x2ed1(%rip),%rsi
jmp    1030 <ASN1_item_free@plt>

LLVM IR (-O0):
@OCSP_RESPBYTES_it = global i32 0
define void @OCSP_RESPBYTES_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @ASN1_item_free(i32* %3, i32* @OCSP_RESPBYTES_it)
ret void
}

LLVM IR (-O2):
@OCSP_RESPBYTES_it = global i32 0
define void @OCSP_RESPBYTES_free(i32* %0) {
%2 = tail call i32 @ASN1_item_free(i32* %0, i32* @OCSP_RESPBYTES_it)
ret void
}
int dbg_is_chk_gen(const struct ubifs_info *c) { return 0; }


x86 assembly (clang, -O0):
<dbg_is_chk_gen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_is_chk_gen>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ubifs_info = type opaque
define i32 @dbg_is_chk_gen(%struct.ubifs_info* %0) {
%2 = alloca %struct.ubifs_info*
store %struct.ubifs_info* %0, %struct.ubifs_info** %2
ret i32 0
}

LLVM IR (-O2):
%struct.ubifs_info = type opaque
define i32 @dbg_is_chk_gen(%struct.ubifs_info* nocapture readnone %0) {
ret i32 0
}
double no_crash_reinterpret_double_as_sym_int(double a, int b) {
  *(int *)&a = b;
  return a * a;
}


x86 assembly (clang, -O0):
<no_crash_reinterpret_double_as_sym_int>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_crash_reinterpret_double_as_sym_int>:
movq   %xmm0,%rax
mov    %edi,%ecx
movabs $0xffffffff00000000,%rdx
ff ff ff
and    %rax,%rdx
or     %rcx,%rdx
movq   %rdx,%xmm0
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @no_crash_reinterpret_double_as_sym_int(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = bitcast double* %3 to i32*
store i32 %5, i32* %6
%7 = load double, double* %3
%8 = load double, double* %3
%9 = fmul double %7, %8
ret double %9
}

LLVM IR (-O2):
define double @no_crash_reinterpret_double_as_sym_int(double %0, i32 %1) {
%3 = bitcast double %0 to i64
%4 = zext i32 %1 to i64
%5 = and i64 %3, -4294967296
%6 = or i64 %5, %4
%7 = bitcast i64 %6 to double
%8 = fmul double %7, %7
ret double %8
}
int leap_year(int n) { return (n % 400 == 0) || (n % 4 == 0 && n % 100 != 0); }


x86 assembly (clang, -O0):
<leap_year>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
je     1153 <leap_year+0x53>
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
cmp    $0x0,%edx
mov    %al,-0x6(%rbp)
jne    114d <leap_year+0x4d>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
setne  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<leap_year>:
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
mov    %ecx,%eax
ror    $0x4,%eax
cmp    $0xa3d70b,%eax
jb     1121 <leap_year+0x21>
xor    %eax,%eax
test   $0x3,%dil
je     1127 <leap_year+0x27>
ret
mov    $0x1,%eax
ret
ror    $0x2,%ecx
xor    %eax,%eax
cmp    $0x28f5c29,%ecx
setae  %al
ret

LLVM IR (-O0):
define i32 @leap_year(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 400
%5 = icmp eq i32 %4, 0
br i1 %5, label %16, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i32, i32* %2
%12 = srem i32 %11, 100
%13 = icmp ne i32 %12, 0
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ false, %6 ], [ %13, %10 ]
br label %16
16: ; preds = %14, %1
%17 = phi i1 [ true, %1 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @leap_year(i32 %0) {
%2 = srem i32 %0, 400
%3 = icmp eq i32 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = and i32 %0, 3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = srem i32 %0, 100
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %7, %1
%12 = phi i32 [ 1, %1 ], [ 0, %4 ], [ %10, %7 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned int, unsigned int, unsigned int,
                          unsigned int);
void ipv4_print_address(unsigned int address) {
  printf("%ld.%ld.%ld.%ld", ((address & 0x000000ff) >> 0),
         ((address & 0x0000ff00) >> 8), ((address & 0x00ff0000) >> 16),
         ((address & 0xff000000) >> 24));
}


x86 assembly (clang, -O0):
<ipv4_print_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
and    $0xff,%esi
shr    $0x0,%esi
mov    -0x4(%rbp),%edx
and    $0xff00,%edx
shr    $0x8,%edx
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
shr    $0x10,%ecx
mov    -0x4(%rbp),%r8d
and    $0xff000000,%r8d
shr    $0x18,%r8d
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipv4_print_address>:
mov    %edi,%eax
movzbl %al,%esi
movzbl %ah,%edx
mov    %edi,%ecx
shr    $0x10,%ecx
movzbl %cl,%ecx
shr    $0x18,%eax
lea    0xed6(%rip),%rdi
mov    %eax,%r8d
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"%ld.%ld.%ld.%ld\00"
define void @ipv4_print_address(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = lshr i32 %4, 0
%6 = load i32, i32* %2
%7 = and i32 %6, 65280
%8 = lshr i32 %7, 8
%9 = load i32, i32* %2
%10 = and i32 %9, 16711680
%11 = lshr i32 %10, 16
%12 = load i32, i32* %2
%13 = and i32 %12, -16777216
%14 = lshr i32 %13, 24
%15 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %8, i32 %11, i32 %14)
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"%ld.%ld.%ld.%ld\00"
define void @ipv4_print_address(i32 %0) {
%2 = and i32 %0, 255
%3 = lshr i32 %0, 8
%4 = and i32 %3, 255
%5 = lshr i32 %0, 16
%6 = and i32 %5, 255
%7 = lshr i32 %0, 24
%8 = tail call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %4, i32 %6, i32 %7)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ reuseon;

/* Variables and functions */
int /*<<< orphan*/ SOL_SOCKET;
int /*<<< orphan*/ SO_BROADCAST;
int /*<<< orphan*/ setsockopt(int, int /*<<< orphan*/, int /*<<< orphan*/,
                              int *, int);
void enable_broadcast(int socket_fd) {
  int reuseon = 1;
  setsockopt(socket_fd, SOL_SOCKET, SO_BROADCAST, &reuseon, sizeof(reuseon));
}


x86 assembly (clang, -O0):
<enable_broadcast>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebc(%rip),%rax
mov    (%rax),%esi
mov    0x2eab(%rip),%rax
mov    (%rax),%edx
lea    -0x8(%rbp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<enable_broadcast>:
push   %rax
movl   $0x1,0x4(%rsp)
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
mov    0x2eb7(%rip),%rax
mov    (%rax),%edx
lea    0x4(%rsp),%rcx
mov    $0x4,%r8d
call   1030 <setsockopt@plt>
pop    %rax
ret

LLVM IR (-O0):
@SOL_SOCKET = global i32 0
@SO_BROADCAST = global i32 0
define void @enable_broadcast(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* @SOL_SOCKET
%6 = load i32, i32* @SO_BROADCAST
%7 = call i32 @setsockopt(i32 %4, i32 %5, i32 %6, i32* %3, i32 4)
ret void
}

LLVM IR (-O2):
@SOL_SOCKET = global i32 0
@SO_BROADCAST = global i32 0
define void @enable_broadcast(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 1, i32* %2
%4 = load i32, i32* @SOL_SOCKET
%5 = load i32, i32* @SO_BROADCAST
%6 = call i32 @setsockopt(i32 %0, i32 %4, i32 %5, i32* %2, i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("trigraph ??! trigraph\n");
  printf("trigraph \?\?! trigraph\n");
  printf("trigraph ?"
         "?! trigraph\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"trigraph ??! trigraph\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str.2 = [22 x i8] c"trigraph ??! trigraph\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str.2, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str.2, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int /*<<< orphan*/ desencode(int, int);
int main(int argc, char **argv) {
  uint64_t k = 0x133457799BBCDFF1;
  uint64_t m = 0x0123456789ABCDEF;
  desencode(k, m);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x9bbcdff1,-0x14(%rbp)
movl   $0x89abcdef,-0x18(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x18(%rbp),%esi
call   1030 <desencode@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x9bbcdff1,%edi
mov    $0x89abcdef,%esi
call   1030 <desencode@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 -1682120719, i32* %6
store i32 -1985229329, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %7
%10 = call i32 @desencode(i32 %8, i32 %9)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @desencode(i32 -1682120719, i32 -1985229329)
ret i32 0
}
double erf(double x) { return 0.0; }


x86 assembly (clang, -O0):
<erf>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<erf>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @erf(double %0) {
%2 = alloca double
store double %0, double* %2
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @erf(double %0) {
ret double 0.000000e+00
}
/* Variables and functions */
int FCEUI_EndWaveRecord();
int CloseWave(void) { return (FCEUI_EndWaveRecord()); }


x86 assembly (clang, -O0):
<CloseWave>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FCEUI_EndWaveRecord@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CloseWave>:
xor    %eax,%eax
jmp    1030 <FCEUI_EndWaveRecord@plt>

LLVM IR (-O0):
define i32 @CloseWave() {
%1 = call i32 (...) @FCEUI_EndWaveRecord()
ret i32 %1
}

LLVM IR (-O2):
define i32 @CloseWave() {
%1 = tail call i32 (...) @FCEUI_EndWaveRecord()
ret i32 %1
}
/* Variables and functions */
int server(int);
int main(int argc, char *argv[]) {
  bool multicast = false;
  if (argc >= 2 && argv[1][0] == 'm')
    multicast = true;
  return server(multicast);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x2,-0x8(%rbp)
jl     1152 <main+0x42>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
movsbl (%rax),%eax
cmp    $0x6d,%eax
jne    1152 <main+0x42>
movl   $0x1,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <server@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    %edi,%eax
xor    %edi,%edi
cmp    $0x2,%eax
jl     1126 <main+0x16>
mov    0x8(%rsi),%rax
xor    %edi,%edi
cmpb   $0x6d,(%rax)
sete   %dil
jmp    1030 <server@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = load i32, i32* %4
%8 = icmp sge i32 %7, 2
br i1 %8, label %9, label %18
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 1
%12 = load i8*, i8** %11
%13 = getelementptr inbounds i8, i8* %12, i64 0
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 109
br i1 %16, label %17, label %18
17: ; preds = %9
store i32 1, i32* %6
br label %18
18: ; preds = %17, %9, %2
%19 = load i32, i32* %6
%20 = call i32 @server(i32 %19)
ret i32 %20
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 1
br i1 %3, label %4, label %10
4: ; preds = %2
%5 = getelementptr inbounds i8*, i8** %1, i64 1
%6 = load i8*, i8** %5
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 109
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %4, %2
%11 = phi i32 [ 0, %2 ], [ %9, %4 ]
%12 = tail call i32 @server(i32 %11)
ret i32 %12
}
int doadd(int a, int b) { return a + b; }


x86 assembly (clang, -O0):
<doadd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<doadd>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @doadd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @doadd(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf2(char *);
void GenPrintOperandSeparator(void) { printf2(", "); }


x86 assembly (clang, -O0):
<GenPrintOperandSeparator>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<GenPrintOperandSeparator>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf2@plt>

LLVM IR (-O0):
@.str = [3 x i8] c", \00"
define void @GenPrintOperandSeparator() {
%1 = call i32 @printf2(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c", \00"
define void @GenPrintOperandSeparator() {
%1 = tail call i32 @printf2(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
int is_bigendian(void) {
  int i = 1;
  char *p = (char *)&i;
  if (*p == 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<is_bigendian>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    112f <is_bigendian+0x2f>
movl   $0x1,-0x4(%rbp)
jmp    1136 <is_bigendian+0x36>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_bigendian>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_bigendian() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i8*
store i32 1, i32* %2
%4 = bitcast i32* %2 to i8*
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %0
store i32 1, i32* %1
br label %11
10: ; preds = %0
store i32 0, i32* %1
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_bigendian() {
ret i32 0
}
short ssh_glue_installed(void) { return 0; }


x86 assembly (clang, -O0):
<ssh_glue_installed>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssh_glue_installed>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i16 @ssh_glue_installed() {
ret i16 0
}

LLVM IR (-O2):
define signext i16 @ssh_glue_installed() {
ret i16 0
}
/* Variables and functions */
char *malloc(size_t);
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
int strlen(char const *);
char *strclone(const char *s) {
  size_t len = strlen(s) + 1;
  char *ns = malloc(len);
  if (!ns)
    return NULL;
  memcpy(ns, s, len);
  return ns;
}


x86 assembly (clang, -O0):
<strclone>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1173 <strclone+0x43>
movq   $0x0,-0x8(%rbp)
jmp    118c <strclone+0x5c>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strclone>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
add    $0x1,%eax
movslq %eax,%r15
mov    %r15,%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1161 <strclone+0x31>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @strclone(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = add nsw i32 %7, 1
%9 = sext i32 %8 to i64
store i64 %9, i64* %4
%10 = load i64, i64* %4
%11 = call i8* @malloc(i64 %10)
store i8* %11, i8** %5
%12 = load i8*, i8** %5
%13 = icmp ne i8* %12, null
br i1 %13, label %15, label %14
14: ; preds = %1
store i8* null, i8** %2
br label %21
15: ; preds = %1
%16 = load i8*, i8** %5
%17 = load i8*, i8** %3
%18 = load i64, i64* %4
%19 = call i32 @memcpy(i8* %16, i8* %17, i64 %18)
%20 = load i8*, i8** %5
store i8* %20, i8** %2
br label %21
21: ; preds = %15, %14
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @strclone(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = sext i32 %3 to i64
%5 = tail call i8* @malloc(i64 %4)
%6 = icmp eq i8* %5, null
br i1 %6, label %9, label %7
7: ; preds = %1
%8 = tail call i32 @memcpy(i8* %5, i8* %0, i64 %4)
br label %9
9: ; preds = %1, %7
ret i8* %5
}
int sliding_scale(int dividend, int factor, unsigned long divisor) {
  double d = dividend;
  if (divisor) {
    d = (d * (double)factor) / (double)divisor;
    return (int)(d + 0.5);
  }
  return 0;
}


x86 assembly (clang, -O0):
<sliding_scale>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
cvtsi2sdl -0x8(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     117a <sliding_scale+0x7a>
movsd  -0x20(%rbp),%xmm0
cvtsi2sdl -0xc(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movaps 0xed8(%rip),%xmm2
movq   -0x18(%rbp),%xmm1
punpckldq %xmm2,%xmm1
movapd 0xed7(%rip),%xmm2
subpd  %xmm2,%xmm1
movaps %xmm1,%xmm2
unpckhpd %xmm1,%xmm1
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  0xe97(%rip),%xmm0
addsd  -0x20(%rbp),%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
jmp    1181 <sliding_scale+0x81>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sliding_scale>:
test   %rdx,%rdx
je     1143 <sliding_scale+0x43>
cvtsi2sd %edi,%xmm0
cvtsi2sd %esi,%xmm1
movq   %rdx,%xmm2
punpckldq 0xee6(%rip),%xmm2
subpd  0xeee(%rip),%xmm2
mulsd  %xmm0,%xmm1
movapd %xmm2,%xmm0
unpckhpd %xmm2,%xmm0
addsd  %xmm2,%xmm0
divsd  %xmm0,%xmm1
addsd  0xee2(%rip),%xmm1
cvttsd2si %xmm1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sliding_scale(i32 %0, i32 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i64
%8 = alloca double
store i32 %0, i32* %5
store i32 %1, i32* %6
store i64 %2, i64* %7
%9 = load i32, i32* %5
%10 = sitofp i32 %9 to double
store double %10, double* %8
%11 = load i64, i64* %7
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %24
13: ; preds = %3
%14 = load double, double* %8
%15 = load i32, i32* %6
%16 = sitofp i32 %15 to double
%17 = fmul double %14, %16
%18 = load i64, i64* %7
%19 = uitofp i64 %18 to double
%20 = fdiv double %17, %19
store double %20, double* %8
%21 = load double, double* %8
%22 = fadd double %21, 5.000000e-01
%23 = fptosi double %22 to i32
store i32 %23, i32* %4
br label %25
24: ; preds = %3
store i32 0, i32* %4
br label %25
25: ; preds = %24, %13
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @sliding_scale(i32 %0, i32 %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %13, label %5
5: ; preds = %3
%6 = sitofp i32 %0 to double
%7 = sitofp i32 %1 to double
%8 = fmul double %6, %7
%9 = uitofp i64 %2 to double
%10 = fdiv double %8, %9
%11 = fadd double %10, 5.000000e-01
%12 = fptosi double %11 to i32
br label %13
13: ; preds = %3, %5
%14 = phi i32 [ %12, %5 ], [ 0, %3 ]
ret i32 %14
}
unsigned xma_be16(unsigned n) {
  static const int endianess = 1;
  if (!*(char *)&endianess)
    return (n);
  n = (((n & 0xff00) >> 8) | ((n & 0x00ff) << 8));
  return (n);
}


x86 assembly (clang, -O0):
<xma_be16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpb   $0x0,0xef2(%rip)
jne    111f <xma_be16+0x1f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <xma_be16+0x41>
mov    -0x8(%rbp),%eax
and    $0xff00,%eax
shr    $0x8,%eax
mov    -0x8(%rbp),%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xma_be16>:
rol    $0x8,%di
movzwl %di,%eax
ret

LLVM IR (-O0):
@xma_be16.endianess = internal constant i32 1
define i32 @xma_be16(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i8, i8* bitcast (i32* @xma_be16.endianess to i8*)
%5 = icmp ne i8 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %17
8: ; preds = %1
%9 = load i32, i32* %3
%10 = and i32 %9, 65280
%11 = lshr i32 %10, 8
%12 = load i32, i32* %3
%13 = and i32 %12, 255
%14 = shl i32 %13, 8
%15 = or i32 %11, %14
store i32 %15, i32* %3
%16 = load i32, i32* %3
store i32 %16, i32* %2
br label %17
17: ; preds = %8, %6
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @xma_be16(i32 %0) {
%2 = trunc i32 %0 to i16
%3 = tail call i16 @llvm.bswap.i16(i16 %2)
%4 = zext i16 %3 to i32
ret i32 %4
}
unsigned char decode_5bit(unsigned char encoded) {
  unsigned char map[] = {'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'B',
                         'C', 'D', 'F', 'G', 'H', 'J', 'K', 'L', 'M', 'N', 'P',
                         'Q', 'R', 'S', 'T', 'V', 'W', 'X', 'Y', 'Z'};
  return map[(int)encoded];
}


x86 assembly (clang, -O0):
<decode_5bit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    0xeef(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xeec(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xee9(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xee7(%rip),%eax
mov    %eax,-0x8(%rbp)
mov    0xee1(%rip),%ax
mov    %ax,-0x4(%rbp)
mov    0xed9(%rip),%al
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
cltq
movzbl -0x20(%rbp,%rax,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_5bit>:
mov    %edi,%eax
lea    0xef7(%rip),%rcx
mov    (%rax,%rcx,1),%al
ret

LLVM IR (-O0):
@__const.decode_5bit.map = [31 x i8] c"0123456789BCDFGHJKLMNPQRSTVWXYZ"
define zeroext i8 @decode_5bit(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca [31 x i8]
store i8 %0, i8* %2
%4 = bitcast [31 x i8]* %3 to i8*
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds [31 x i8], [31 x i8]* %3, i64 0, i64 %7
%9 = load i8, i8* %8
ret i8 %9
}

LLVM IR (-O2):
@__const.decode_5bit.map = [31 x i8] c"0123456789BCDFGHJKLMNPQRSTVWXYZ"
define zeroext i8 @decode_5bit(i8 zeroext %0) {
%2 = zext i8 %0 to i64
%3 = getelementptr inbounds [31 x i8], [31 x i8]* @__const.decode_5bit.map, i64 0, i64 %2
%4 = load i8, i8* %3
ret i8 %4
}
void f(void) {
  int a, b;
  a &&b;
  a || b;
  !a;
  !!a;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     111d <f+0x1d>
cmpl   $0x0,-0x8(%rbp)
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
mov    $0x1,%al
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0xa(%rbp)
jne    1139 <f+0x39>
cmpl   $0x0,-0x8(%rbp)
setne  %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
ret

LLVM IR (-O0):
define void @f() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* %1
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 0
br label %8
8: ; preds = %5, %0
%9 = phi i1 [ false, %0 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = load i32, i32* %1
%12 = icmp ne i32 %11, 0
br i1 %12, label %16, label %13
13: ; preds = %8
%14 = load i32, i32* %2
%15 = icmp ne i32 %14, 0
br label %16
16: ; preds = %13, %8
%17 = phi i1 [ true, %8 ], [ %15, %13 ]
%18 = zext i1 %17 to i32
%19 = load i32, i32* %1
%20 = icmp ne i32 %19, 0
%21 = xor i1 %20, true
%22 = zext i1 %21 to i32
%23 = load i32, i32* %1
%24 = icmp ne i32 %23, 0
%25 = xor i1 %24, true
%26 = xor i1 %25, true
%27 = zext i1 %26 to i32
ret void
}

LLVM IR (-O2):
define void @f() {
ret void
}
unsigned long U8TO32(const unsigned char *p) {
  return (((unsigned long)(p[0] & 0xff)) | ((unsigned long)(p[1] & 0xff) << 8) |
          ((unsigned long)(p[2] & 0xff) << 16) |
          ((unsigned long)(p[3] & 0xff) << 24));
}


x86 assembly (clang, -O0):
<U8TO32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
and    $0xff,%eax
cltq
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
and    $0xff,%ecx
movslq %ecx,%rcx
shl    $0x8,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
and    $0xff,%ecx
movslq %ecx,%rcx
shl    $0x10,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
and    $0xff,%ecx
movslq %ecx,%rcx
shl    $0x18,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<U8TO32>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i64 @U8TO32(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = and i32 %6, 255
%8 = sext i32 %7 to i64
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = and i32 %12, 255
%14 = sext i32 %13 to i64
%15 = shl i64 %14, 8
%16 = or i64 %8, %15
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i64 2
%19 = load i8, i8* %18
%20 = zext i8 %19 to i32
%21 = and i32 %20, 255
%22 = sext i32 %21 to i64
%23 = shl i64 %22, 16
%24 = or i64 %16, %23
%25 = load i8*, i8** %2
%26 = getelementptr inbounds i8, i8* %25, i64 3
%27 = load i8, i8* %26
%28 = zext i8 %27 to i32
%29 = and i32 %28, 255
%30 = sext i32 %29 to i64
%31 = shl i64 %30, 24
%32 = or i64 %24, %31
ret i64 %32
}

LLVM IR (-O2):
define i64 @U8TO32(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i64
%7 = shl nuw nsw i64 %6, 8
%8 = or i64 %7, %3
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = zext i8 %10 to i64
%12 = shl nuw nsw i64 %11, 16
%13 = or i64 %8, %12
%14 = getelementptr inbounds i8, i8* %0, i64 3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i64
%17 = shl nuw nsw i64 %16, 24
%18 = or i64 %13, %17
ret i64 %18
}
int cmp(const void *xv, const void *yv) {
  unsigned long x = *((unsigned long *)xv), y = *((unsigned long *)yv);
  if (x < y)
    return -1;
  return x != y;
}


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
jae    113c <cmp+0x3c>
movl   $0xffffffff,-0x4(%rbp)
jmp    114f <cmp+0x4f>
mov    -0x20(%rbp),%rax
cmp    -0x28(%rbp),%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
mov    (%rdi),%rax
xor    %ecx,%ecx
cmp    (%rsi),%rax
setne  %cl
mov    $0xffffffff,%eax
cmovae %ecx,%eax
ret

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
store i64 %10, i64* %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i64*
%13 = load i64, i64* %12
store i64 %13, i64* %7
%14 = load i64, i64* %6
%15 = load i64, i64* %7
%16 = icmp ult i64 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %23
18: ; preds = %2
%19 = load i64, i64* %6
%20 = load i64, i64* %7
%21 = icmp ne i64 %19, %20
%22 = zext i1 %21 to i32
store i32 %22, i32* %3
br label %23
23: ; preds = %18, %17
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = icmp ult i64 %4, %6
%8 = icmp ne i64 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
int donothing(char *fmt, ...) {}


x86 assembly (clang, -O0):
<donothing>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<donothing>:
ret

LLVM IR (-O0):
define i32 @donothing(i8* %0, ...) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @donothing(i8* nocapture readnone %0, ...) {
ret i32 undef
}
int host_request_exec_env(char *buffer, int max_buffer_size) {
  int ret;
  memset(buffer, 0, max_buffer_size);
  __asm__ __volatile__(".byte 0x0f, 0x3f\n"
                       ".byte 0x00, "
                       "0x20"
                       "\n"
                       ".byte "
                       "0x02"
                       ", 0x00\n"
                       ".byte 0x00, 0x00, 0x00\n"
                       ".byte 0x00\n"
                       : "=a"(ret)
                       : "a"(buffer), "b"(max_buffer_size));
  return ret;
}


x86 assembly (clang, -O0):
<host_request_exec_env>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
sub    $0x18,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
movslq -0x14(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ebx
(bad)
add    %ah,(%rax)
add    (%rax),%al
add    %al,(%rax)
add    %al,(%rax)
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<host_request_exec_env>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
movslq %esi,%rbx
xor    %esi,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
mov    %r14,%rax
(bad)
add    %ah,(%rax)
add    (%rax),%al
add    %al,(%rax)
add    %al,(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @host_request_exec_env(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sext i32 %7 to i64
%9 = load i8*, i8** %3
%10 = load i32, i32* %4
%11 = call i32 asm sideeffect ".byte 0x0f, 0x3f\0A.byte 0x00, 0x20\0A.byte 0x02, 0x00\0A.byte 0x00, 0x00, 0x00\0A.byte 0x00\0A", "={ax},{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i8* %9, i32 %10)
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @host_request_exec_env(i8* %0, i32 %1) {
%3 = sext i32 %1 to i64
tail call void @llvm.memset.p0i8.i64(i8* align 1 %0, i8 0, i64 %3, i1 false)
%4 = tail call i32 asm sideeffect ".byte 0x0f, 0x3f\0A.byte 0x00, 0x20\0A.byte 0x02, 0x00\0A.byte 0x00, 0x00, 0x00\0A.byte 0x00\0A", "={ax},{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i8* %0, i32 %1)
ret i32 %4
}
int test_imm_80uint16_reg(unsigned short val) {
  return ((val) & (-0x80 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_80uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff80,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_80uint16_reg>:
cmp    $0x80,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_80uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -128
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_80uint16_reg(i16 zeroext %0) {
%2 = icmp ult i16 %0, 128
%3 = select i1 %2, i32 -40, i32 -20
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printErr(char const *);
void rp_fatal(char const *str) {
  printErr(str);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<rp_fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <printErr@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<rp_fatal>:
push   %rax
call   1030 <printErr@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define void @rp_fatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printErr(i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define void @rp_fatal(i8* %0) {
%2 = tail call i32 @printErr(i8* %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
void EndSession() {}


x86 assembly (clang, -O0):
<EndSession>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EndSession>:
ret

LLVM IR (-O0):
define void @EndSession() {
ret void
}

LLVM IR (-O2):
define void @EndSession() {
ret void
}