xunge/DecIR huggingface dataset:
int IsNotCompatible(int feature, int num_items) {
  return (feature != 0) != (num_items > 0);
}


x86 assembly (clang, -O0):
<IsNotCompatible>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
cmpl   $0x0,-0x8(%rbp)
setg   %cl
and    $0x1,%cl
movzbl %cl,%ecx
cmp    %ecx,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsNotCompatible>:
test   %edi,%edi
setne  %al
test   %esi,%esi
setg   %cl
xor    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @IsNotCompatible(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i32
%8 = load i32, i32* %4
%9 = icmp sgt i32 %8, 0
%10 = zext i1 %9 to i32
%11 = icmp ne i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @IsNotCompatible(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, 0
%4 = icmp sgt i32 %1, 0
%5 = xor i1 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
double call_with_trampolines(double d1) { return d1; }


x86 assembly (clang, -O0):
<call_with_trampolines>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<call_with_trampolines>:
ret

LLVM IR (-O0):
define double @call_with_trampolines(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
ret double %3
}

LLVM IR (-O2):
define double @call_with_trampolines(double returned %0) {
ret double %0
}
int checkbuff(char buffer[], int size, char c) {
  int failed = 0;
  int i;
  for (i = 0; i < size; i++)
    if (buffer[i] != c) {
      failed = 1;
      break;
    }
  return (failed);
}


x86 assembly (clang, -O0):
<checkbuff>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %al,-0xd(%rbp)
movl   $0x0,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1161 <checkbuff+0x61>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0xd(%rbp),%ecx
cmp    %ecx,%eax
je     114e <checkbuff+0x4e>
movl   $0x1,-0x14(%rbp)
jmp    1161 <checkbuff+0x61>
jmp    1153 <checkbuff+0x53>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    111e <checkbuff+0x1e>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkbuff>:
test   %esi,%esi
jle    111e <checkbuff+0x1e>
mov    %esi,%eax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
cmp    %dl,(%rdi,%rcx,1)
jne    1121 <checkbuff+0x21>
add    $0x1,%rcx
cmp    %rcx,%rax
jne    1110 <checkbuff+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @checkbuff(i8* %0, i32 %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8 %2, i8* %6
store i32 0, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %25, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %5
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %28
13: ; preds = %9
%14 = load i8*, i8** %4
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = load i8, i8* %6
%21 = sext i8 %20 to i32
%22 = icmp ne i32 %19, %21
br i1 %22, label %23, label %24
23: ; preds = %13
store i32 1, i32* %7
br label %28
24: ; preds = %13
br label %25
25: ; preds = %24
%26 = load i32, i32* %8
%27 = add nsw i32 %26, 1
store i32 %27, i32* %8
br label %9
28: ; preds = %23, %9
%29 = load i32, i32* %7
ret i32 %29
}

LLVM IR (-O2):
define i32 @checkbuff(i8* nocapture %0, i32 %1, i8 signext %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %14, %6
br i1 %8, label %15, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %14, %7 ]
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, %2
%14 = add nuw nsw i64 %10, 1
br i1 %13, label %7, label %15
15: ; preds = %7, %9, %3
%16 = phi i32 [ 0, %3 ], [ 1, %9 ], [ 0, %7 ]
ret i32 %16
}
/* Variables and functions */
char *strchr(char *, char);
char *trim_comment(char *s) {
  char *semicolon = strchr(s, ';');
  if (semicolon != NULL)
    *semicolon = '\0';
  return s;
}


x86 assembly (clang, -O0):
<trim_comment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3b,%esi
call   1030 <strchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1140 <trim_comment+0x30>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trim_comment>:
push   %rbx
mov    %rdi,%rbx
mov    $0x3b,%esi
call   1030 <strchr@plt>
test   %rax,%rax
je     1126 <trim_comment+0x16>
movb   $0x0,(%rax)
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @trim_comment(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strchr(i8* %4, i8 signext 59)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i8*, i8** %3
store i8 0, i8* %9
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
define i8* @trim_comment(i8* returned %0) {
%2 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 59)
%3 = icmp eq i8* %2, null
br i1 %3, label %5, label %4
4: ; preds = %1
store i8 0, i8* %2
br label %5
5: ; preds = %4, %1
ret i8* %0
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int IoQueryDeviceDescription(int BusType, int BusNumber, int ControllerType,
                             int ControllerNumber, int PeripheralType,
                             int PeripheralNumber, int CalloutRoutine,
                             int Context) {
  {
    int tmp_ndt_4;
    tmp_ndt_4 = __VERIFIER_nondet_int();
    if (tmp_ndt_4 == 0) {
      goto switch_5_0;
    } else {
      goto switch_5_default;
      if (0) {
      switch_5_0:
        return (0);
      switch_5_default:;
        return (-1073741823);
      } else {
      }
    }
  }
}


x86 assembly (clang, -O0):
<IoQueryDeviceDescription>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x20(%rbp)
cmpl   $0x0,-0x20(%rbp)
jne    114b <IoQueryDeviceDescription+0x3b>
jmp    1150 <IoQueryDeviceDescription+0x40>
jmp    115c <IoQueryDeviceDescription+0x4c>
movl   $0x0,-0x4(%rbp)
jmp    1163 <IoQueryDeviceDescription+0x53>
movl   $0xc0000001,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IoQueryDeviceDescription>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
test   %eax,%eax
mov    $0xc0000001,%ecx
cmovne %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @IoQueryDeviceDescription(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
store i32 %0, i32* %10
store i32 %1, i32* %11
store i32 %2, i32* %12
store i32 %3, i32* %13
store i32 %4, i32* %14
store i32 %5, i32* %15
store i32 %6, i32* %16
store i32 %7, i32* %17
%19 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %19, i32* %18
%20 = load i32, i32* %18
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %8
br label %26
23: ; preds = %8
br label %27
24: ; No predecessors!
br i1 false, label %25, label %28
25: ; preds = %24
br label %26
26: ; preds = %25, %22
store i32 0, i32* %9
br label %30
27: ; preds = %23
store i32 -1073741823, i32* %9
br label %30
28: ; preds = %24
br label %29
29: ; preds = %28
br label %30
30: ; preds = %26, %27, %29
%31 = load i32, i32* %9
ret i32 %31
}

LLVM IR (-O2):
define i32 @IoQueryDeviceDescription(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = tail call i32 (...) @__VERIFIER_nondet_int()
%10 = icmp eq i32 %9, 0
%11 = select i1 %10, i32 0, i32 -1073741823
ret i32 %11
}
void Interrupt_Disable(void) {}


x86 assembly (clang, -O0):
<Interrupt_Disable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Interrupt_Disable>:
ret

LLVM IR (-O0):
define void @Interrupt_Disable() {
ret void
}

LLVM IR (-O2):
define void @Interrupt_Disable() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dhcp6_sendmessage(void *, void (*)(void *));
void dhcp6_sendrebind(void *arg) { dhcp6_sendmessage(arg, dhcp6_sendrebind); }


x86 assembly (clang, -O0):
<dhcp6_sendrebind>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rsi
call   1030 <dhcp6_sendmessage@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dhcp6_sendrebind>:
mov    0x2ec9(%rip),%rsi
jmp    1030 <dhcp6_sendmessage@plt>

LLVM IR (-O0):
define void @dhcp6_sendrebind(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @dhcp6_sendmessage(i8* %3, void (i8*)* @dhcp6_sendrebind)
ret void
}

LLVM IR (-O2):
define void @dhcp6_sendrebind(i8* %0) {
%2 = tail call i32 @dhcp6_sendmessage(i8* %0, void (i8*)* @dhcp6_sendrebind)
ret void
}
/* Variables and functions */
char getchar();
int /*<<< orphan*/ printf(char *, char);
int main() {
  char n1, n2, n3;
  n1 = getchar();
  n2 = n1 - 'a';
  n3 = 'z' - n2;
  printf("%c", n3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
sub    $0x61,%eax
mov    %al,-0x6(%rbp)
movsbl -0x6(%rbp),%ecx
mov    $0x7a,%eax
sub    %ecx,%eax
mov    %al,-0x7(%rbp)
lea    0xea8(%rip),%rdi
movsbl -0x7(%rbp),%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    $0xdb,%cl
sub    %al,%cl
movsbl %cl,%esi
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
%4 = alloca i8
store i32 0, i32* %1
%5 = call signext i8 (...) @getchar()
store i8 %5, i8* %2
%6 = load i8, i8* %2
%7 = sext i8 %6 to i32
%8 = sub nsw i32 %7, 97
%9 = trunc i32 %8 to i8
store i8 %9, i8* %3
%10 = load i8, i8* %3
%11 = sext i8 %10 to i32
%12 = sub nsw i32 122, %11
%13 = trunc i32 %12 to i8
store i8 %13, i8* %4
%14 = load i8, i8* %4
%15 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define i32 @main() {
%1 = tail call signext i8 (...) @getchar()
%2 = sub i8 -37, %1
%3 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %2)
ret i32 0
}
/* Variables and functions */
char *filespecdotext(char const *);
char *mem_strdup(char const *);
char *filespecgetroot(const char *name) {
  char *root, *p, c;
  p = filespecdotext(name);
  c = *p;
  *p = 0;
  root = mem_strdup(name);
  *p = c;
  return root;
}


x86 assembly (clang, -O0):
<filespecgetroot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <filespecdotext@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x19(%rbp)
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rdi
call   1040 <mem_strdup@plt>
mov    %rax,-0x10(%rbp)
mov    -0x19(%rbp),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<filespecgetroot>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <filespecdotext@plt>
mov    %rax,%rbx
mov    (%rax),%bpl
movb   $0x0,(%rax)
mov    %r14,%rdi
call   1040 <mem_strdup@plt>
mov    %bpl,(%rbx)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @filespecgetroot(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i8* @filespecdotext(i8* %6)
store i8* %7, i8** %4
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
store i8 %9, i8* %5
%10 = load i8*, i8** %4
store i8 0, i8* %10
%11 = load i8*, i8** %2
%12 = call i8* @mem_strdup(i8* %11)
store i8* %12, i8** %3
%13 = load i8, i8* %5
%14 = load i8*, i8** %4
store i8 %13, i8* %14
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @filespecgetroot(i8* %0) {
%2 = tail call i8* @filespecdotext(i8* %0)
%3 = load i8, i8* %2
store i8 0, i8* %2
%4 = tail call i8* @mem_strdup(i8* %0)
store i8 %3, i8* %2
ret i8* %4
}
int foo(int x) {
  if (x == 0)
    return 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1118 <foo+0x18>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %1
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ tile;
};
typedef TYPE_1__ XGCValues;

/* Variables and functions */
unsigned long get_XGCValues_tile(void *_p) {
  return (unsigned long)((XGCValues *)_p)->tile;
}


x86 assembly (clang, -O0):
<get_XGCValues_tile>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XGCValues_tile>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XGCValues_tile(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XGCValues_tile(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Type definitions */
typedef enum nss_status { ____Placeholder_nss_status } nss_status;

/* Variables and functions */
int /*<<< orphan*/ exfiles_trace_msg(char *);
int nss_exfiles_setup();
enum nss_status _nss_exfiles_setpwent(void) {
  exfiles_trace_msg("Entering _nss_exfiles_setpwent");
  return nss_exfiles_setup();
}


x86 assembly (clang, -O0):
<_nss_exfiles_setpwent>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <exfiles_trace_msg@plt>
mov    $0x0,%al
call   1040 <nss_exfiles_setup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nss_exfiles_setpwent>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <exfiles_trace_msg@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <nss_exfiles_setup@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"Entering _nss_exfiles_setpwent\00"
define i32 @_nss_exfiles_setpwent() {
%1 = call i32 @exfiles_trace_msg(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @nss_exfiles_setup()
ret i32 %2
}

LLVM IR (-O2):
@.str = [31 x i8] c"Entering _nss_exfiles_setpwent\00"
define i32 @_nss_exfiles_setpwent() {
%1 = tail call i32 @exfiles_trace_msg(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @nss_exfiles_setup()
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int a;
  for (a = 0; a <= 255; a++) {
    printf("%d, %c \n ", a, a);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xff,-0x8(%rbp)
jg     1153 <main+0x43>
mov    -0x8(%rbp),%esi
mov    -0x8(%rbp),%edx
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xee3(%rip),%r14
nopl   (%rax)
mov    %r14,%rdi
mov    %ebx,%esi
mov    %ebx,%edx
call   1030 <printf@plt>
add    $0x1,%ebx
cmp    $0x100,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [10 x i8] c"%d, %c \0A \00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 255
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %7, i32 %8)
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"%d, %c \0A \00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %2)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 256
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
/* Variables and functions */
long grg_get_grid_index(long const *, long const *);
long ksp_get_grgrid_index(const long address[3], const long D_diag[3]) {
  return grg_get_grid_index(address, D_diag);
}


x86 assembly (clang, -O0):
<ksp_get_grgrid_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <grg_get_grid_index@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ksp_get_grgrid_index>:
jmp    1030 <grg_get_grid_index@plt>

LLVM IR (-O0):
define i64 @ksp_get_grgrid_index(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
store i64* %0, i64** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %3
%6 = load i64*, i64** %4
%7 = call i64 @grg_get_grid_index(i64* %5, i64* %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @ksp_get_grgrid_index(i64* %0, i64* %1) {
%3 = tail call i64 @grg_get_grid_index(i64* %0, i64* %1)
ret i64 %3
}
/* Type definitions */
typedef scalar_t__ int8_t;
typedef scalar_t__ const int32_t;

/* Variables and functions */
int32_t int8p_comparator(const void *pl, const void *pr) {
  return *(const int8_t *)pl - *(const int8_t *)pr;
}


x86 assembly (clang, -O0):
<int8p_comparator>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int8p_comparator>:
mov    (%rdi),%rax
sub    (%rsi),%rax
ret

LLVM IR (-O0):
define i64 @int8p_comparator(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i64*
%7 = load i64, i64* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
%11 = sub nsw i64 %7, %10
ret i64 %11
}

LLVM IR (-O2):
define i64 @int8p_comparator(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = sub nsw i64 %4, %6
ret i64 %7
}
int tempGyroFix(int degree) { return degree < 0 ? degree + 3600 : degree; }


x86 assembly (clang, -O0):
<tempGyroFix>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1121 <tempGyroFix+0x21>
mov    -0x4(%rbp),%eax
add    $0xe10,%eax
mov    %eax,-0x8(%rbp)
jmp    1127 <tempGyroFix+0x27>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tempGyroFix>:
lea    0xe10(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
ret

LLVM IR (-O0):
define i32 @tempGyroFix(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 3600
br label %10
8: ; preds = %1
%9 = load i32, i32* %2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ %7, %5 ], [ %9, %8 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @tempGyroFix(i32 %0) {
%2 = icmp slt i32 %0, 0
%3 = add nsw i32 %0, 3600
%4 = select i1 %2, i32 %3, i32 %0
ret i32 %4
}
int test_imm_7Euint8_mem(unsigned char *val) {
  return ((*val) & (0x7E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Euint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%edx
and    $0x7e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Euint8_mem>:
testb  $0x7e,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Euint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 126
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_7Euint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 126
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
float bar(float x) { return x; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
ret

LLVM IR (-O0):
define float @bar(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
ret float %3
}

LLVM IR (-O2):
define float @bar(float returned %0) {
ret float %0
}
/* Type definitions */
struct server_list {
  int dummy;
};
struct genlist {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ genlist_free(struct genlist *);
void server_list_free(struct server_list *tthis) {
  genlist_free(((struct genlist *)(tthis)));
}


x86 assembly (clang, -O0):
<server_list_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <genlist_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<server_list_free>:
jmp    1030 <genlist_free@plt>

LLVM IR (-O0):
%struct.server_list = type { i32 }
%struct.genlist = type { i32 }
define void @server_list_free(%struct.server_list* %0) {
%2 = alloca %struct.server_list*
store %struct.server_list* %0, %struct.server_list** %2
%3 = load %struct.server_list*, %struct.server_list** %2
%4 = bitcast %struct.server_list* %3 to %struct.genlist*
%5 = call i32 @genlist_free(%struct.genlist* %4)
ret void
}

LLVM IR (-O2):
%struct.server_list = type { i32 }
%struct.genlist = type { i32 }
define void @server_list_free(%struct.server_list* %0) {
%2 = bitcast %struct.server_list* %0 to %struct.genlist*
%3 = tail call i32 @genlist_free(%struct.genlist* %2)
ret void
}
int test_imm_FBint32_mem(int *val) {
  return ((*val) & (0xFB << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FBint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0xfb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FBint32_mem>:
testb  $0xfb,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FBint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 251
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FBint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 251
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ mib_set(scalar_t__, void *);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ restart_acl();
int setAclCapability(int enable) {
  unsigned char vChar;
  vChar = (enable == 0) ? 0 : 1;
  if (!mib_set(0 + 70, (void *)&vChar)) {
    printf("set acl capability error!\n");
    return -1;
  }
  restart_acl();
  return 0;
}


x86 assembly (clang, -O0):
<setAclCapability>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x0,%edx
cmove  %ecx,%eax
mov    %al,-0x9(%rbp)
mov    $0x46,%edi
lea    -0x9(%rbp),%rsi
call   1040 <mib_set@plt>
cmp    $0x0,%eax
jne    117d <setAclCapability+0x4d>
lea    0xe94(%rip),%rdi
call   1050 <printf@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    118b <setAclCapability+0x5b>
mov    $0x0,%al
call   1030 <restart_acl@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setAclCapability>:
push   %rbx
sub    $0x10,%rsp
test   %edi,%edi
setne  0xf(%rsp)
lea    0xf(%rsp),%rsi
mov    $0x46,%edi
call   1050 <mib_set@plt>
test   %eax,%eax
je     115a <setAclCapability+0x2a>
xor    %ebx,%ebx
xor    %eax,%eax
call   1040 <restart_acl@plt>
jmp    116b <setAclCapability+0x3b>
lea    0xe9f(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%ebx
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"set acl capability error!\0A\00"
define i32 @setAclCapability(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 0, i32 1
%9 = trunc i32 %8 to i8
store i8 %9, i8* %4
%10 = call i32 @mib_set(i64 70, i8* %4)
%11 = icmp ne i32 %10, 0
br i1 %11, label %14, label %12
12: ; preds = %1
%13 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %2
br label %16
14: ; preds = %1
%15 = call i32 (...) @restart_acl()
store i32 0, i32* %2
br label %16
16: ; preds = %14, %12
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@str = [26 x i8] c"set acl capability error!\00"
define i32 @setAclCapability(i32 %0) {
%2 = alloca i8
%3 = icmp ne i32 %0, 0
%4 = zext i1 %3 to i8
store i8 %4, i8* %2
%5 = call i32 @mib_set(i64 70, i8* %2)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
br label %11
9: ; preds = %1
%10 = call i32 (...) @restart_acl()
br label %11
11: ; preds = %9, %7
%12 = phi i32 [ 0, %9 ], [ -1, %7 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ DIR;

/* Variables and functions */
int /*<<< orphan*/ *fdopendir(int);
DIR *zfs_fdopendir_nofd_dup(int fd) { return fdopendir(fd); }


x86 assembly (clang, -O0):
<zfs_fdopendir_nofd_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <fdopendir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zfs_fdopendir_nofd_dup>:
jmp    1030 <fdopendir@plt>

LLVM IR (-O0):
define i32* @zfs_fdopendir_nofd_dup(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32* @fdopendir(i32 %3)
ret i32* %4
}

LLVM IR (-O2):
define i32* @zfs_fdopendir_nofd_dup(i32 %0) {
%2 = tail call i32* @fdopendir(i32 %0)
ret i32* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int isalnum(unsigned char);
int /*<<< orphan*/ wctomb(char *, int /*<<< orphan*/);
int _Xaw_iswalnum(wchar_t ch) {
  unsigned char mb[sizeof(wchar_t)];
  wctomb((char *)mb, ch);
  return (isalnum(*mb));
}


x86 assembly (clang, -O0):
<_Xaw_iswalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
mov    -0x4(%rbp),%esi
call   1040 <wctomb@plt>
movzbl -0x8(%rbp),%edi
call   1030 <isalnum@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Xaw_iswalnum>:
push   %rax
mov    %edi,%esi
lea    0x4(%rsp),%rdi
call   1040 <wctomb@plt>
movzbl 0x4(%rsp),%edi
call   1030 <isalnum@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @_Xaw_iswalnum(i32 %0) {
%2 = alloca i32
%3 = alloca [4 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%5 = load i32, i32* %2
%6 = call i32 @wctomb(i8* %4, i32 %5)
%7 = getelementptr inbounds [4 x i8], [4 x i8]* %3, i64 0, i64 0
%8 = load i8, i8* %7
%9 = call i32 @isalnum(i8 zeroext %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @_Xaw_iswalnum(i32 %0) {
%2 = alloca [4 x i8]
%3 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%4 = call i32 @wctomb(i8* %3, i32 %0)
%5 = load i8, i8* %3
%6 = call i32 @isalnum(i8 zeroext %5)
ret i32 %6
}
reg0adr1_set(r0, r1, x0, x1, p0, p1) short r0, r1;
short *p0, *p1;
{ r0 = (*((short *)11111111)); }


x86 assembly (clang, -O0):
<reg0adr1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    $0xa98ac7,%eax
mov    (%rax),%ax
mov    %ax,-0x6(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg0adr1_set>:
ret

LLVM IR (-O0):
define i32 @reg0adr1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16, i16* inttoptr (i64 11111111 to i16*)
store i16 %16, i16* %8
%17 = load i32, i32* %7
ret i32 %17
}

LLVM IR (-O2):
define i32 @reg0adr1_set(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture readnone %5) {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ sigjmp_buf;

/* Variables and functions */
int /*<<< orphan*/ siglongjmp(int /*<<< orphan*/, int);
scalar_t__ sigsetjmp(int /*<<< orphan*/, int);
void time_sigsetjmp(int count) {
  int i;
  sigjmp_buf buf;
  for (i = 0; i < count; i++) {
    if (sigsetjmp(buf, 1))
      continue;
    siglongjmp(buf, 1);
  }
}


x86 assembly (clang, -O0):
<time_sigsetjmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1175 <time_sigsetjmp+0x55>
mov    -0xc(%rbp),%edi
mov    $0x1,%esi
call   1040 <sigsetjmp@plt>
cmp    $0x0,%rax
je     115a <time_sigsetjmp+0x3a>
jmp    1167 <time_sigsetjmp+0x47>
mov    -0xc(%rbp),%edi
mov    $0x1,%esi
call   1030 <siglongjmp@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1132 <time_sigsetjmp+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_sigsetjmp>:
push   %rbx
test   %edi,%edi
jle    1144 <time_sigsetjmp+0x24>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x1,%esi
call   1040 <sigsetjmp@plt>
test   %rax,%rax
je     1146 <time_sigsetjmp+0x26>
add    $0xffffffff,%ebx
jne    1130 <time_sigsetjmp+0x10>
pop    %rbx
ret
mov    $0x1,%esi
call   1030 <siglongjmp@plt>

LLVM IR (-O0):
define void @time_sigsetjmp(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %5
5: ; preds = %17, %1
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %20
9: ; preds = %5
%10 = load i32, i32* %4
%11 = call i64 @sigsetjmp(i32 %10, i32 1)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %9
br label %17
14: ; preds = %9
%15 = load i32, i32* %4
%16 = call i32 @siglongjmp(i32 %15, i32 1)
unreachable
17: ; preds = %13
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %5
20: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @time_sigsetjmp(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %5, label %12
3: ; preds = %5
%4 = icmp eq i32 %9, %0
br i1 %4, label %12, label %5
5: ; preds = %1, %3
%6 = phi i32 [ %9, %3 ], [ 0, %1 ]
%7 = tail call i64 @sigsetjmp(i32 undef, i32 1)
%8 = icmp eq i64 %7, 0
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %3
10: ; preds = %5
%11 = tail call i32 @siglongjmp(i32 undef, i32 1)
unreachable
12: ; preds = %3, %1
ret void
}
void path_track(void) {}


x86 assembly (clang, -O0):
<path_track>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<path_track>:
ret

LLVM IR (-O0):
define void @path_track() {
ret void
}

LLVM IR (-O2):
define void @path_track() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ vinwpg();
vdnwpg() { vinwpg(); }


x86 assembly (clang, -O0):
<vdnwpg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <vinwpg@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vdnwpg>:
xor    %eax,%eax
jmp    1030 <vinwpg@plt>

LLVM IR (-O0):
define i32 @vdnwpg() {
%1 = alloca i32
%2 = call i32 (...) @vinwpg()
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @vdnwpg() {
%1 = tail call i32 (...) @vinwpg()
ret i32 undef
}
/* Variables and functions */
void *calloc(int, size_t);
void sd_array_create(void **mem, size_t item_size, int num_size) {
  *mem = calloc(num_size, item_size);
}


x86 assembly (clang, -O0):
<sd_array_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_array_create>:
push   %rbx
mov    %rdi,%rbx
mov    %edx,%edi
call   1030 <calloc@plt>
mov    %rax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @sd_array_create(i8** %0, i64 %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i64
%6 = alloca i32
store i8** %0, i8*** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i64, i64* %5
%9 = call i8* @calloc(i32 %7, i64 %8)
%10 = load i8**, i8*** %4
store i8* %9, i8** %10
ret void
}

LLVM IR (-O2):
define void @sd_array_create(i8** nocapture writeonly %0, i64 %1, i32 %2) {
%4 = tail call i8* @calloc(i32 %2, i64 %1)
store i8* %4, i8** %0
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t fread(unsigned char *, int, int, int /*<<< orphan*/ *);
int get_byte(FILE *fp) {
  unsigned char temp;
  size_t r = fread(&temp, 1, 1, fp);
  if (r != 1)
    return -1;
  return (int)temp;
}


x86 assembly (clang, -O0):
<get_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
lea    -0x11(%rbp),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <fread@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x1,-0x20(%rbp)
je     114b <get_byte+0x3b>
movl   $0xffffffff,-0x4(%rbp)
jmp    1152 <get_byte+0x42>
movzbl -0x11(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_byte>:
push   %rax
mov    %rdi,%rcx
lea    0x7(%rsp),%rdi
mov    $0x1,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
cmp    $0x1,%rax
movzbl 0x7(%rsp),%ecx
mov    $0xffffffff,%eax
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get_byte(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i8
%5 = alloca i64
store i32* %0, i32** %3
%6 = load i32*, i32** %3
%7 = call i64 @fread(i8* %4, i32 1, i32 1, i32* %6)
store i64 %7, i64* %5
%8 = load i64, i64* %5
%9 = icmp ne i64 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %14
11: ; preds = %1
%12 = load i8, i8* %4
%13 = zext i8 %12 to i32
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %10
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @get_byte(i32* nocapture %0) {
%2 = alloca i8
%3 = call i64 @fread(i8* %2, i32 1, i32 1, i32* %0)
%4 = icmp eq i64 %3, 1
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
%7 = select i1 %4, i32 %6, i32 -1
ret i32 %7
}
/* Type definitions */
struct Cyc_Lexing_lexbuf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Cyc_args_rec(struct Cyc_Lexing_lexbuf *, int);
int Cyc_args(struct Cyc_Lexing_lexbuf *lexbuf) {
  return ({ Cyc_args_rec(lexbuf, 2); });
}


x86 assembly (clang, -O0):
<Cyc_args>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
call   1030 <Cyc_args_rec@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_args>:
mov    $0x2,%esi
jmp    1030 <Cyc_args_rec@plt>

LLVM IR (-O0):
%struct.Cyc_Lexing_lexbuf = type { i32 }
define i32 @Cyc_args(%struct.Cyc_Lexing_lexbuf* %0) {
%2 = alloca %struct.Cyc_Lexing_lexbuf*
%3 = alloca i32
store %struct.Cyc_Lexing_lexbuf* %0, %struct.Cyc_Lexing_lexbuf** %2
%4 = load %struct.Cyc_Lexing_lexbuf*, %struct.Cyc_Lexing_lexbuf** %2
%5 = call i32 @Cyc_args_rec(%struct.Cyc_Lexing_lexbuf* %4, i32 2)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.Cyc_Lexing_lexbuf = type { i32 }
define i32 @Cyc_args(%struct.Cyc_Lexing_lexbuf* %0) {
%2 = tail call i32 @Cyc_args_rec(%struct.Cyc_Lexing_lexbuf* %0, i32 2)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void my_exit2(void) { printf("call my_exit2\n"); }


x86 assembly (clang, -O0):
<my_exit2>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_exit2>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"call my_exit2\0A\00"
define void @my_exit2() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"call my_exit2\00"
define void @my_exit2() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char const *);
int /*<<< orphan*/ *stderr;
int /*<<< orphan*/ *stdout;
void helpAndLeave(const char *progname, int status) {
  FILE *stream = stderr;
  if (status == EXIT_SUCCESS)
    stream = stdout;
  fprintf(stream, "Usage: %s [-i ident] [-l level] message\n", progname);
  exit(status);
}


x86 assembly (clang, -O0):
<helpAndLeave>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    0x2e89(%rip),%rcx
cmp    (%rcx),%eax
jne    115d <helpAndLeave+0x3d>
mov    0x2e82(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    0xe94(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0xc(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<helpAndLeave>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rdx
mov    0x2ea3(%rip),%rax
cmp    %esi,(%rax)
jne    113a <helpAndLeave+0x1a>
mov    0x2ea0(%rip),%rax
jmp    1141 <helpAndLeave+0x21>
mov    0x2e9f(%rip),%rax
mov    (%rax),%rdi
lea    0xeb5(%rip),%rsi
call   1030 <fprintf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32* null
@EXIT_SUCCESS = global i32 0
@stdout = global i32* null
@.str = [41 x i8] c"Usage: %s [-i ident] [-l level] message\0A\00"
define void @helpAndLeave(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32*, i32** @stderr
store i32* %6, i32** %5
%7 = load i32, i32* %4
%8 = load i32, i32* @EXIT_SUCCESS
%9 = icmp eq i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load i32*, i32** @stdout
store i32* %11, i32** %5
br label %12
12: ; preds = %10, %2
%13 = load i32*, i32** %5
%14 = load i8*, i8** %3
%15 = call i32 @fprintf(i32* %13, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %14)
%16 = load i32, i32* %4
%17 = call i32 @exit(i32 %16)
unreachable
}

LLVM IR (-O2):
@stderr = global i32* null
@EXIT_SUCCESS = global i32 0
@stdout = global i32* null
@.str = [41 x i8] c"Usage: %s [-i ident] [-l level] message\0A\00"
define void @helpAndLeave(i8* %0, i32 %1) {
%3 = load i32, i32* @EXIT_SUCCESS
%4 = icmp eq i32 %3, %1
%5 = load i32*, i32** @stdout
%6 = load i32*, i32** @stderr
%7 = select i1 %4, i32* %5, i32* %6
%8 = tail call i32 @fprintf(i32* %7, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %0)
%9 = tail call i32 @exit(i32 %1)
unreachable
}
/* Type definitions */
struct fnode {
  int dummy;
};

/* Variables and functions */
int fatfs_read(struct fnode *, void *, int);
int vfs_read(struct fnode *fno, void *buf, int len) {
  return fatfs_read(fno, buf, len);
}


x86 assembly (clang, -O0):
<vfs_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <fatfs_read@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vfs_read>:
jmp    1030 <fatfs_read@plt>

LLVM IR (-O0):
%struct.fnode = type { i32 }
define i32 @vfs_read(%struct.fnode* %0, i8* %1, i32 %2) {
%4 = alloca %struct.fnode*
%5 = alloca i8*
%6 = alloca i32
store %struct.fnode* %0, %struct.fnode** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load %struct.fnode*, %struct.fnode** %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @fatfs_read(%struct.fnode* %7, i8* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
%struct.fnode = type { i32 }
define i32 @vfs_read(%struct.fnode* %0, i8* %1, i32 %2) {
%4 = tail call i32 @fatfs_read(%struct.fnode* %0, i8* %1, i32 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0x21() {
  Assert_real((isalpha(33) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              170, ("isalpha should be 0 for !"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x21>:
push   %rbp
mov    %rsp,%rbp
mov    $0x21,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xaa,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x21>:
push   %rax
mov    $0x21,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xaa,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 0 for !\00"
define void @t_isalpha_0x21() {
%1 = call i64 @isalpha(i32 33)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 170, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 0 for !\00"
define void @t_isalpha_0x21() {
%1 = tail call i64 @isalpha(i32 33)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 170, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
float sqrt(float);
int main() {
  float side1 = 20;
  float side2 = 30;
  float hypotenuse = 0;
  hypotenuse = sqrt((side1 * side1) + (side2 * side2));
  printf("Hypotenusan borde vara %f\n", hypotenuse);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movss  0xecd(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  0xebc(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
movss  -0x8(%rbp),%xmm2
movss  -0xc(%rbp),%xmm1
mulss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
call   1040 <sqrt@plt>
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
lea    0xe85(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeec(%rip),%rdi
movss  0xee0(%rip),%xmm0
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"Hypotenusan borde vara %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca float
%4 = alloca float
store i32 0, i32* %1
store float 2.000000e+01, float* %2
store float 3.000000e+01, float* %3
store float 0.000000e+00, float* %4
%5 = load float, float* %2
%6 = load float, float* %2
%7 = load float, float* %3
%8 = load float, float* %3
%9 = fmul float %7, %8
%10 = call float @llvm.fmuladd.f32(float %5, float %6, float %9)
%11 = call float @sqrt(float %10)
store float %11, float* %4
%12 = load float, float* %4
%13 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), float %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [27 x i8] c"Hypotenusan borde vara %f\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), float 0x4042071B00000000)
ret i32 0
}
void RTRandS64(void) {}


x86 assembly (clang, -O0):
<RTRandS64>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTRandS64>:
ret

LLVM IR (-O0):
define void @RTRandS64() {
ret void
}

LLVM IR (-O2):
define void @RTRandS64() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_usage(char const *);
int /*<<< orphan*/ printf(char *);
void print_help(const char *bin) {
  print_usage(bin);
  printf("Options are:\n");
  printf("\tv <version>    -- Specify the version to show\n");
  printf("\th              -- Display this help prompt\n");
}


x86 assembly (clang, -O0):
<print_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <print_usage@plt>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
lea    0xec6(%rip),%rdi
call   1030 <printf@plt>
lea    0xeea(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help>:
push   %rax
call   1040 <print_usage@plt>
lea    0xed3(%rip),%rdi
call   1030 <puts@plt>
lea    0xed4(%rip),%rdi
call   1030 <puts@plt>
lea    0xef7(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Options are:\0A\00"
@.str.1 = [48 x i8] c"\09v <version> -- Specify the version to show\0A\00"
@.str.2 = [45 x i8] c"\09h -- Display this help prompt\0A\00"
define void @print_help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @print_usage(i8* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str.1, i64 0, i64 0))
%7 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [13 x i8] c"Options are:\00"
@str.3 = [47 x i8] c"\09v <version> -- Specify the version to show\00"
@str.4 = [44 x i8] c"\09h -- Display this help prompt\00"
define void @print_help(i8* %0) {
%2 = tail call i32 @print_usage(i8* %0)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([47 x i8], [47 x i8]* @str.3, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str.4, i64 0, i64 0))
ret void
}