xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ __svgalib_driver8p_getbox(int, int, int, int, void *, int);
void __svgalib_driver32p_getbox(int x, int y, int w, int h, void *b, int bw) {
  __svgalib_driver8p_getbox(x * 4, y, w * 4, h, b, bw * 4);
}


x86 assembly (clang, -O0):
<__svgalib_driver32p_getbox>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
shl    $0x2,%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
shl    $0x2,%edx
mov    -0x10(%rbp),%ecx
mov    -0x18(%rbp),%r8
mov    -0x1c(%rbp),%r9d
shl    $0x2,%r9d
call   1030 <__svgalib_driver8p_getbox@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__svgalib_driver32p_getbox>:
shl    $0x2,%edi
shl    $0x2,%edx
shl    $0x2,%r9d
jmp    1030 <__svgalib_driver8p_getbox@plt>

LLVM IR (-O0):
define void @__svgalib_driver32p_getbox(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i8*
%12 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i8* %4, i8** %11
store i32 %5, i32* %12
%13 = load i32, i32* %7
%14 = mul nsw i32 %13, 4
%15 = load i32, i32* %8
%16 = load i32, i32* %9
%17 = mul nsw i32 %16, 4
%18 = load i32, i32* %10
%19 = load i8*, i8** %11
%20 = load i32, i32* %12
%21 = mul nsw i32 %20, 4
%22 = call i32 @__svgalib_driver8p_getbox(i32 %14, i32 %15, i32 %17, i32 %18, i8* %19, i32 %21)
ret void
}

LLVM IR (-O2):
define void @__svgalib_driver32p_getbox(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i32 %5) {
%7 = shl nsw i32 %0, 2
%8 = shl nsw i32 %2, 2
%9 = shl nsw i32 %5, 2
%10 = tail call i32 @__svgalib_driver8p_getbox(i32 %7, i32 %1, i32 %8, i32 %3, i8* %4, i32 %9)
ret void
}
int security_ipc_permission(struct kern_ipc_perm *ipcp, short flag) {
  return 0;
}


x86 assembly (clang, -O0):
<security_ipc_permission>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_ipc_permission>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.kern_ipc_perm = type opaque
define i32 @security_ipc_permission(%struct.kern_ipc_perm* %0, i16 signext %1) {
%3 = alloca %struct.kern_ipc_perm*
%4 = alloca i16
store %struct.kern_ipc_perm* %0, %struct.kern_ipc_perm** %3
store i16 %1, i16* %4
ret i32 0
}

LLVM IR (-O2):
%struct.kern_ipc_perm = type opaque
define i32 @security_ipc_permission(%struct.kern_ipc_perm* nocapture readnone %0, i16 signext %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ output(char *, char const *);
void message(const char *text) { output("MESSAGE\n%s\n", text); }


x86 assembly (clang, -O0):
<message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <output@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<message>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <output@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"MESSAGE\0A%s\0A\00"
define void @message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @output(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"MESSAGE\0A%s\0A\00"
define void @message(i8* %0) {
%2 = tail call i32 @output(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
scalar_t__ _U_Qfcmp(long double, long double, int);
int _U_Qford(long double a, long double b) {
  return (_U_Qfcmp(a, b, 1 | 4 | 8 | 16) != 0);
}


x86 assembly (clang, -O0):
<_U_Qford>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
fldt   0x20(%rbp)
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  0x10(%rax)
fstpt  (%rax)
mov    $0x1d,%edi
call   1030 <_U_Qfcmp@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_U_Qford>:
sub    $0x28,%rsp
fldt   0x30(%rsp)
fldt   0x40(%rsp)
fstpt  0x10(%rsp)
fstpt  (%rsp)
mov    $0x1d,%edi
call   1030 <_U_Qfcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
define i32 @_U_Qford(x86_fp80 %0, x86_fp80 %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
store x86_fp80 %1, x86_fp80* %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %4
%7 = call i64 @_U_Qfcmp(x86_fp80 %5, x86_fp80 %6, i32 29)
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @_U_Qford(x86_fp80 %0, x86_fp80 %1) {
%3 = tail call i64 @_U_Qfcmp(x86_fp80 %0, x86_fp80 %1, i32 29)
%4 = icmp ne i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main(void) {
  puts("SUCCESS: Libcoap compiled!");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"SUCCESS: Libcoap compiled!\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [27 x i8] c"SUCCESS: Libcoap compiled!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int clearbpt(tcp)
struct tcb *tcp;
{
  return 0;
}


x86 assembly (clang, -O0):
<clearbpt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearbpt>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.tcb = type opaque
define i32 @clearbpt(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
ret i32 0
}

LLVM IR (-O2):
%struct.tcb = type opaque
define i32 @clearbpt(%struct.tcb* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ execv(char *, char **);
int /*<<< orphan*/ setresuid(int, int, int);
int main(int argc, char **argv) {
  setresuid(2002, 2002, 2002);
  execv("/wargame/bin/tmpserver1.sh", argv);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x7d2,%edx
mov    %edx,%edi
mov    %edx,%esi
call   1030 <setresuid@plt>
mov    -0x10(%rbp),%rsi
lea    0xeb8(%rip),%rdi
call   1040 <execv@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %rsi,%rbx
mov    $0x7d2,%edi
mov    $0x7d2,%esi
mov    $0x7d2,%edx
call   1030 <setresuid@plt>
lea    0xec1(%rip),%rdi
mov    %rbx,%rsi
call   1040 <execv@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"/wargame/bin/tmpserver1.sh\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @setresuid(i32 2002, i32 2002, i32 2002)
%6 = load i8**, i8*** %4
%7 = call i32 @execv(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8** %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [27 x i8] c"/wargame/bin/tmpserver1.sh\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @setresuid(i32 2002, i32 2002, i32 2002)
%4 = tail call i32 @execv(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8** %1)
ret i32 0
}
float Sleef_log10f_u10(float x) { return __builtin_log10f(x); }


x86 assembly (clang, -O0):
<Sleef_log10f_u10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <log10f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleef_log10f_u10>:
jmp    1030 <log10f@plt>

LLVM IR (-O0):
define float @Sleef_log10f_u10(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @log10f(float %3)
ret float %4
}

LLVM IR (-O2):
define float @Sleef_log10f_u10(float %0) {
%2 = tail call float @log10f(float %0)
ret float %2
}
/* Variables and functions */
long unlikely(int);
long IS_ERR(const void *ptr) {
  return unlikely(((unsigned long)ptr) > (unsigned long)-1000L);
}


x86 assembly (clang, -O0):
<IS_ERR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0xfffffffffffffc18,%rax
seta   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <unlikely@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IS_ERR>:
xor    %eax,%eax
cmp    $0xfffffffffffffc19,%rdi
setae  %al
mov    %eax,%edi
jmp    1030 <unlikely@plt>

LLVM IR (-O0):
define i64 @IS_ERR(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = icmp ugt i64 %4, -1000
%6 = zext i1 %5 to i32
%7 = call i64 @unlikely(i32 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @IS_ERR(i8* readnone %0) {
%2 = icmp ugt i8* %0, inttoptr (i64 -1000 to i8*)
%3 = zext i1 %2 to i32
%4 = tail call i64 @unlikely(i32 %3)
ret i64 %4
}
/* Variables and functions */
int p_colour(char *, char *);
int io_init(void) { return p_colour("\033[00;37m", "> "); }


x86 assembly (clang, -O0):
<io_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee7(%rip),%rsi
call   1030 <p_colour@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_init>:
lea    0xee9(%rip),%rdi
lea    0xeeb(%rip),%rsi
jmp    1030 <p_colour@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"\1B[00;37m\00"
@.str.1 = [3 x i8] c"> \00"
define i32 @io_init() {
%1 = call i32 @p_colour(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [9 x i8] c"\1B[00;37m\00"
@.str.1 = [3 x i8] c"> \00"
define i32 @io_init() {
%1 = tail call i32 @p_colour(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret i32 %1
}
double piemathMultiply(double a, double b) { return a * b; }


x86 assembly (clang, -O0):
<piemathMultiply>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<piemathMultiply>:
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @piemathMultiply(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fmul double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @piemathMultiply(double %0, double %1) {
%3 = fmul double %0, %1
ret double %3
}
/* Type definitions */
struct rtattr {
  int dummy;
};
typedef int /*<<< orphan*/ __be32;

/* Variables and functions */
int /*<<< orphan*/ ntohl(int /*<<< orphan*/);
int /*<<< orphan*/ rta_getattr_u32(struct rtattr const *);
__be32 rta_getattr_be32(const struct rtattr *rta) {
  return ntohl(rta_getattr_u32(rta));
}


x86 assembly (clang, -O0):
<rta_getattr_be32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rta_getattr_u32@plt>
mov    %eax,%edi
call   1040 <ntohl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rta_getattr_be32>:
push   %rax
call   1030 <rta_getattr_u32@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <ntohl@plt>

LLVM IR (-O0):
%struct.rtattr = type { i32 }
define i32 @rta_getattr_be32(%struct.rtattr* %0) {
%2 = alloca %struct.rtattr*
store %struct.rtattr* %0, %struct.rtattr** %2
%3 = load %struct.rtattr*, %struct.rtattr** %2
%4 = call i32 @rta_getattr_u32(%struct.rtattr* %3)
%5 = call i32 @ntohl(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.rtattr = type { i32 }
define i32 @rta_getattr_be32(%struct.rtattr* %0) {
%2 = tail call i32 @rta_getattr_u32(%struct.rtattr* %0)
%3 = tail call i32 @ntohl(i32 %2)
ret i32 %3
}
void toggle_DIR(int port, int pin) {
  if ((pin > 31) || (pin < 0)) {
    return;
  }
  if (port == 0x00) {
    *(unsigned int volatile *)(0x41004400 + 0x0C) = (1 << pin);
  } else if (port == 0x80) {
    *(unsigned int volatile *)(0x41004400 + 0x8C) = (1 << pin);
  }
}


x86 assembly (clang, -O0):
<toggle_DIR>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x1f,-0x8(%rbp)
jg     111e <toggle_DIR+0x1e>
cmpl   $0x0,-0x8(%rbp)
jge    1123 <toggle_DIR+0x23>
jmp    116a <toggle_DIR+0x6a>
cmpl   $0x0,-0x4(%rbp)
jne    1145 <toggle_DIR+0x45>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x4100440c,%eax
mov    %ecx,(%rax)
jmp    116a <toggle_DIR+0x6a>
cmpl   $0x80,-0x4(%rbp)
jne    1165 <toggle_DIR+0x65>
mov    -0x8(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%ecx
mov    $0x4100448c,%eax
mov    %ecx,(%rax)
jmp    116a <toggle_DIR+0x6a>
pop    %rbp
ret

x86 assembly (clang, -O2):
<toggle_DIR>:
cmp    $0x1f,%esi
ja     1128 <toggle_DIR+0x28>
test   %edi,%edi
je     1118 <toggle_DIR+0x18>
cmp    $0x80,%edi
jne    1128 <toggle_DIR+0x28>
mov    $0x4100448c,%eax
jmp    111d <toggle_DIR+0x1d>
mov    $0x4100440c,%eax
mov    $0x1,%edx
mov    %esi,%ecx
shl    %cl,%edx
mov    %edx,(%rax)
ret

LLVM IR (-O0):
define void @toggle_DIR(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sgt i32 %5, 31
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %7, %2
br label %24
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %4
%16 = shl i32 1, %15
store volatile i32 %16, i32* inttoptr (i64 1090536460 to i32*)
br label %24
17: ; preds = %11
%18 = load i32, i32* %3
%19 = icmp eq i32 %18, 128
br i1 %19, label %20, label %23
20: ; preds = %17
%21 = load i32, i32* %4
%22 = shl i32 1, %21
store volatile i32 %22, i32* inttoptr (i64 1090536588 to i32*)
br label %23
23: ; preds = %20, %17
br label %24
24: ; preds = %10, %23, %14
ret void
}

LLVM IR (-O2):
define void @toggle_DIR(i32 %0, i32 %1) {
%3 = icmp ugt i32 %1, 31
br i1 %3, label %9, label %4
4: ; preds = %2
switch i32 %0, label %9 [
i32 0, label %6
i32 128, label %5
]
5: ; preds = %4
br label %6
6: ; preds = %4, %5
%7 = phi i32* [ inttoptr (i64 1090536588 to i32*), %5 ], [ inttoptr (i64 1090536460 to i32*), %4 ]
%8 = shl nuw i32 1, %1
store volatile i32 %8, i32* %7
br label %9
9: ; preds = %6, %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ hyptop_text_mode();
void __attribute__((noreturn)) hyptop_exit(int rc) {
  hyptop_text_mode();
  exit(rc);
}


x86 assembly (clang, -O0):
<hyptop_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <hyptop_text_mode@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<hyptop_exit>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <hyptop_text_mode@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @hyptop_exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @hyptop_text_mode()
%4 = load i32, i32* %2
%5 = call i32 @exit(i32 %4)
unreachable
}

LLVM IR (-O2):
define void @hyptop_exit(i32 %0) {
%2 = tail call i32 (...) @hyptop_text_mode()
%3 = tail call i32 @exit(i32 %0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
testBitNot() { printf("~%d = %d\n", 10, ~10); }


x86 assembly (clang, -O0):
<testBitNot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
mov    $0xa,%esi
mov    $0xfffffff5,%edx
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testBitNot>:
lea    0xee9(%rip),%rdi
mov    $0xa,%esi
mov    $0xfffffff5,%edx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"~%d = %d\0A\00"
define i32 @testBitNot() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 10, i32 -11)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [10 x i8] c"~%d = %d\0A\00"
define i32 @testBitNot() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 10, i32 -11)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ lt_timer_load_from_rom();
int /*<<< orphan*/ lt_timer_stop_rtc();
int /*<<< orphan*/ lt_timer_sync_to_rtc();
int /*<<< orphan*/ rtc_dump();
void lt_timer_switch_on(void) {
  ;
  lt_timer_load_from_rom();
  lt_timer_sync_to_rtc();
  lt_timer_stop_rtc();
  rtc_dump();
}


x86 assembly (clang, -O0):
<lt_timer_switch_on>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <lt_timer_load_from_rom@plt>
mov    $0x0,%al
call   1040 <lt_timer_sync_to_rtc@plt>
mov    $0x0,%al
call   1050 <lt_timer_stop_rtc@plt>
mov    $0x0,%al
call   1030 <rtc_dump@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<lt_timer_switch_on>:
push   %rax
xor    %eax,%eax
call   1060 <lt_timer_load_from_rom@plt>
xor    %eax,%eax
call   1040 <lt_timer_sync_to_rtc@plt>
xor    %eax,%eax
call   1050 <lt_timer_stop_rtc@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <rtc_dump@plt>

LLVM IR (-O0):
define void @lt_timer_switch_on() {
%1 = call i32 (...) @lt_timer_load_from_rom()
%2 = call i32 (...) @lt_timer_sync_to_rtc()
%3 = call i32 (...) @lt_timer_stop_rtc()
%4 = call i32 (...) @rtc_dump()
ret void
}

LLVM IR (-O2):
define void @lt_timer_switch_on() {
%1 = tail call i32 (...) @lt_timer_load_from_rom()
%2 = tail call i32 (...) @lt_timer_sync_to_rtc()
%3 = tail call i32 (...) @lt_timer_stop_rtc()
%4 = tail call i32 (...) @rtc_dump()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ str;

/* Variables and functions */
int /*<<< orphan*/ AddIP(char *);
int /*<<< orphan*/ G_Printf(char *);
int trap_Argc();
int /*<<< orphan*/ trap_Argv(int, char *, int);
void Svcmd_AddIP_f(void) {
  char str[1024];
  if (trap_Argc() < 2) {
    G_Printf("Usage:  addip <ip-mask>\n");
    return;
  }
  trap_Argv(1, str, sizeof(str));
  AddIP(str);
}


x86 assembly (clang, -O0):
<Svcmd_AddIP_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x400,%rsp
mov    $0x0,%al
call   1030 <trap_Argc@plt>
cmp    $0x2,%eax
jge    116c <Svcmd_AddIP_f+0x2c>
lea    0xe9e(%rip),%rdi
call   1050 <G_Printf@plt>
jmp    118e <Svcmd_AddIP_f+0x4e>
lea    -0x400(%rbp),%rsi
mov    $0x1,%edi
mov    $0x400,%edx
call   1060 <trap_Argv@plt>
lea    -0x400(%rbp),%rdi
call   1040 <AddIP@plt>
add    $0x400,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Svcmd_AddIP_f>:
push   %rbx
sub    $0x400,%rsp
xor    %eax,%eax
call   1030 <trap_Argc@plt>
cmp    $0x1,%eax
jg     1168 <Svcmd_AddIP_f+0x28>
lea    0xea5(%rip),%rdi
add    $0x400,%rsp
pop    %rbx
jmp    1050 <G_Printf@plt>
mov    %rsp,%rbx
mov    $0x1,%edi
mov    %rbx,%rsi
mov    $0x400,%edx
call   1060 <trap_Argv@plt>
mov    %rbx,%rdi
call   1040 <AddIP@plt>
add    $0x400,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [25 x i8] c"Usage: addip <ip-mask>\0A\00"
define void @Svcmd_AddIP_f() {
%1 = alloca [1024 x i8]
%2 = call i32 (...) @trap_Argc()
%3 = icmp slt i32 %2, 2
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @G_Printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %11
6: ; preds = %0
%7 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%8 = call i32 @trap_Argv(i32 1, i8* %7, i32 1024)
%9 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%10 = call i32 @AddIP(i8* %9)
br label %11
11: ; preds = %6, %4
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"Usage: addip <ip-mask>\0A\00"
define void @Svcmd_AddIP_f() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = tail call i32 (...) @trap_Argc()
%4 = icmp slt i32 %3, 2
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = tail call i32 @G_Printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %10
7: ; preds = %0
%8 = call i32 @trap_Argv(i32 1, i8* %2, i32 1024)
%9 = call i32 @AddIP(i8* %2)
br label %10
10: ; preds = %7, %5
ret void
}
void _ipa_write_dbg_cnt_v1_1(int option) {}


x86 assembly (clang, -O0):
<_ipa_write_dbg_cnt_v1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ipa_write_dbg_cnt_v1_1>:
ret

LLVM IR (-O0):
define void @_ipa_write_dbg_cnt_v1_1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @_ipa_write_dbg_cnt_v1_1(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ _UARTBaseValid(int);
void UARTLoopbackEnable(uint32_t ui32Base) {
  ASSERT(_UARTBaseValid(ui32Base));
  (*((volatile uint32_t *)(ui32Base + 0x00000030))) |= 0x00000080;
}


x86 assembly (clang, -O0):
<UARTLoopbackEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x30,%eax
cltq
mov    (%rax),%ecx
or     $0x80,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTLoopbackEnable>:
push   %rbx
mov    %edi,%ebx
call   1030 <_UARTBaseValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
movslq %ebx,%rax
orl    $0x80,0x30(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @UARTLoopbackEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_UARTBaseValid(i32 %3)
%5 = call i32 @ASSERT(i32 %4)
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 48
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = or i32 %10, 128
store volatile i32 %11, i32* %9
ret void
}

LLVM IR (-O2):
define void @UARTLoopbackEnable(i32 %0) {
%2 = tail call i32 @_UARTBaseValid(i32 %0)
%3 = tail call i32 @ASSERT(i32 %2)
%4 = add nsw i32 %0, 48
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = or i32 %7, 128
store volatile i32 %8, i32* %6
ret void
}
void border_sw_ext_diagonal_special_sand_short_hori(unsigned char *pic,
                                                    unsigned char *mirr) {
  *pic = 0x2B;
  *mirr = 0x01;
}


x86 assembly (clang, -O0):
<border_sw_ext_diagonal_special_sand_short_hori>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x2b,(%rax)
mov    -0x10(%rbp),%rax
movb   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<border_sw_ext_diagonal_special_sand_short_hori>:
movb   $0x2b,(%rdi)
movb   $0x1,(%rsi)
ret

LLVM IR (-O0):
define void @border_sw_ext_diagonal_special_sand_short_hori(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
store i8 43, i8* %5
%6 = load i8*, i8** %4
store i8 1, i8* %6
ret void
}

LLVM IR (-O2):
define void @border_sw_ext_diagonal_special_sand_short_hori(i8* nocapture writeonly %0, i8* nocapture writeonly %1) {
store i8 43, i8* %0
store i8 1, i8* %1
ret void
}
int rev_comparator(const void *n1, const void *n2) {
  int l = *((int *)n1), r = *((int *)n2);
  return l > r ? -1 : l < r ? 1 : 0;
}


x86 assembly (clang, -O0):
<rev_comparator>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jle    1137 <rev_comparator+0x37>
mov    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
jmp    114c <rev_comparator+0x4c>
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%esi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmovl  %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev_comparator>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setl   %cl
mov    $0xffffffff,%eax
cmovle %ecx,%eax
ret

LLVM IR (-O0):
define i32 @rev_comparator(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load i32, i32* %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = icmp sgt i32 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %23
17: ; preds = %2
%18 = load i32, i32* %5
%19 = load i32, i32* %6
%20 = icmp slt i32 %18, %19
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 1, i32 0
br label %23
23: ; preds = %17, %16
%24 = phi i32 [ -1, %16 ], [ %22, %17 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @rev_comparator(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = icmp slt i32 %4, %6
%9 = zext i1 %8 to i32
%10 = select i1 %7, i32 -1, i32 %9
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(int);
int *realloc_wrapper(int *, int);
void realloc_free_ok() {
  int *p = (int *)malloc(sizeof(int));
  int *q = realloc_wrapper(p, sizeof(int));
  free(q);
}


x86 assembly (clang, -O0):
<realloc_free_ok>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1040 <realloc_wrapper@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<realloc_free_ok>:
push   %rax
mov    $0x4,%edi
call   1050 <malloc@plt>
mov    %rax,%rdi
mov    $0x4,%esi
call   1040 <realloc_wrapper@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @realloc_free_ok() {
%1 = alloca i32*
%2 = alloca i32*
%3 = call i64 @malloc(i32 4)
%4 = inttoptr i64 %3 to i32*
store i32* %4, i32** %1
%5 = load i32*, i32** %1
%6 = call i32* @realloc_wrapper(i32* %5, i32 4)
store i32* %6, i32** %2
%7 = load i32*, i32** %2
%8 = call i32 @free(i32* %7)
ret void
}

LLVM IR (-O2):
define void @realloc_free_ok() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
%3 = tail call i32* @realloc_wrapper(i32* %2, i32 4)
%4 = tail call i32 @free(i32* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LoadMapPalette();
int /*<<< orphan*/ V_SetPalette(int /*<<< orphan*/);
void CV_palette_OnChange(void) {
  LoadMapPalette();
  V_SetPalette(0);
}


x86 assembly (clang, -O0):
<CV_palette_OnChange>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <LoadMapPalette@plt>
xor    %edi,%edi
call   1040 <V_SetPalette@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CV_palette_OnChange>:
push   %rax
xor    %eax,%eax
call   1030 <LoadMapPalette@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <V_SetPalette@plt>

LLVM IR (-O0):
define void @CV_palette_OnChange() {
%1 = call i32 (...) @LoadMapPalette()
%2 = call i32 @V_SetPalette(i32 0)
ret void
}

LLVM IR (-O2):
define void @CV_palette_OnChange() {
%1 = tail call i32 (...) @LoadMapPalette()
%2 = tail call i32 @V_SetPalette(i32 0)
ret void
}
void glutSpaceballRotateFunc(void (*func)(int x, int y, int z)) {}


x86 assembly (clang, -O0):
<glutSpaceballRotateFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutSpaceballRotateFunc>:
ret

LLVM IR (-O0):
define void @glutSpaceballRotateFunc(void (i32, i32, i32)* %0) {
%2 = alloca void (i32, i32, i32)*
store void (i32, i32, i32)* %0, void (i32, i32, i32)** %2
ret void
}

LLVM IR (-O2):
define void @glutSpaceballRotateFunc(void (i32, i32, i32)* nocapture %0) {
ret void
}
/* Variables and functions */
void *memcpy(void *destination, const void *source, size_t num) {}


x86 assembly (clang, -O0):
<memcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcpy>:
ret

LLVM IR (-O0):
define i8* @memcpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%8 = load i8*, i8** %4
ret i8* %8
}

LLVM IR (-O2):
define noalias i8* @memcpy(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2) {
ret i8* undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ ENOMEM;
int /*<<< orphan*/ errno;
int _execve(const uint8_t *name, uint8_t *const *argv, uint8_t *const *env) {
  errno = ENOMEM;
  return -1;
}


x86 assembly (clang, -O0):
<_execve>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ec9(%rip),%rax
mov    (%rax),%ecx
mov    0x2eb8(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_execve>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOMEM = global i32 0
@errno = global i32 0
define i32 @_execve(i32* %0, i32** %1, i32** %2) {
%4 = alloca i32*
%5 = alloca i32**
%6 = alloca i32**
store i32* %0, i32** %4
store i32** %1, i32*** %5
store i32** %2, i32*** %6
%7 = load i32, i32* @ENOMEM
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOMEM = global i32 0
@errno = global i32 0
define i32 @_execve(i32* nocapture readnone %0, i32** nocapture readnone %1, i32** nocapture readnone %2) {
%4 = load i32, i32* @ENOMEM
store i32 %4, i32* @errno
ret i32 -1
}
int internal_get_rank(void) { return 0; }


x86 assembly (clang, -O0):
<internal_get_rank>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal_get_rank>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @internal_get_rank() {
ret i32 0
}

LLVM IR (-O2):
define i32 @internal_get_rank() {
ret i32 0
}
/* Variables and functions */
scalar_t__ isdigit(int);
int isxdigit(int c) {
  return isdigit(c) || ((c >= 'a' && c <= 'h') || (c >= 'A' && c <= 'H'));
}


x86 assembly (clang, -O0):
<isxdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1173 <isxdigit+0x63>
cmpl   $0x61,-0x4(%rbp)
jl     114e <isxdigit+0x3e>
mov    $0x1,%al
cmpl   $0x68,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jle    116d <isxdigit+0x5d>
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x7(%rbp)
jl     1167 <isxdigit+0x57>
cmpl   $0x48,-0x4(%rbp)
setle  %al
mov    %al,-0x7(%rbp)
mov    -0x7(%rbp),%al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isxdigit>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
test   %rax,%rax
setne  %al
and    $0xffffffdf,%ebx
add    $0xffffffbf,%ebx
cmp    $0x8,%ebx
setb   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isxdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isdigit(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %22, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sge i32 %7, 97
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %2
%11 = icmp sle i32 %10, 104
br i1 %11, label %20, label %12
12: ; preds = %9, %6
%13 = load i32, i32* %2
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %2
%17 = icmp sle i32 %16, 72
br label %18
18: ; preds = %15, %12
%19 = phi i1 [ false, %12 ], [ %17, %15 ]
br label %20
20: ; preds = %18, %9
%21 = phi i1 [ true, %9 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %1
%23 = phi i1 [ true, %1 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @isxdigit(i32 %0) {
%2 = tail call i64 @isdigit(i32 %0)
%3 = icmp ne i64 %2, 0
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 8
%7 = or i1 %6, %3
%8 = zext i1 %7 to i32
ret i32 %8
}
int ft_isspace(int c) { return ((c == 32 || (c >= 9 && c <= 13)) ? 1 : 0); }


x86 assembly (clang, -O0):
<ft_isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1135 <ft_isspace+0x35>
xor    %eax,%eax
cmpl   $0x9,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     112f <ft_isspace+0x2f>
cmpl   $0xd,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isspace>:
cmp    $0x20,%edi
sete   %al
add    $0xfffffff7,%edi
cmp    $0x5,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ft_isspace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %13, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sge i32 %6, 9
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = icmp sle i32 %9, 13
br label %11
11: ; preds = %8, %5
%12 = phi i1 [ false, %5 ], [ %10, %8 ]
br label %13
13: ; preds = %11, %1
%14 = phi i1 [ true, %1 ], [ %12, %11 ]
%15 = zext i1 %14 to i64
%16 = select i1 %14, i32 1, i32 0
ret i32 %16
}

LLVM IR (-O2):
define i32 @ft_isspace(i32 %0) {
%2 = icmp eq i32 %0, 32
%3 = add i32 %0, -9
%4 = icmp ult i32 %3, 5
%5 = or i1 %2, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
int elantech_detect(void) { return -38; }


x86 assembly (clang, -O0):
<elantech_detect>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffda,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<elantech_detect>:
mov    $0xffffffda,%eax
ret

LLVM IR (-O0):
define i32 @elantech_detect() {
ret i32 -38
}

LLVM IR (-O2):
define i32 @elantech_detect() {
ret i32 -38
}
struct elem *alloc_elem(void) {
  return 0;
}


x86 assembly (clang, -O0):
<alloc_elem>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_elem>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.elem = type opaque
define %struct.elem* @alloc_elem() {
ret %struct.elem* null
}

LLVM IR (-O2):
%struct.elem = type opaque
define noalias %struct.elem* @alloc_elem() {
ret %struct.elem* null
}
/* Variables and functions */
int /*<<< orphan*/ assert_int_equal(int, unsigned long);
void south_one_test(void **state) {
  assert_int_equal(((0x000000000000FF00ul) >> 8), 0x00000000000000FFul);
  assert_int_equal(((0x00000000000000FFul) >> 8), 0ul);
}


x86 assembly (clang, -O0):
<south_one_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xff,%edi
mov    $0xff,%esi
call   1030 <assert_int_equal@plt>
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <assert_int_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<south_one_test>:
push   %rax
mov    $0xff,%esi
mov    $0xff,%edi
call   1030 <assert_int_equal@plt>
xor    %edi,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <assert_int_equal@plt>

LLVM IR (-O0):
define void @south_one_test(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @assert_int_equal(i32 255, i64 255)
%4 = call i32 @assert_int_equal(i32 0, i64 0)
ret void
}

LLVM IR (-O2):
define void @south_one_test(i8** nocapture readnone %0) {
%2 = tail call i32 @assert_int_equal(i32 255, i64 255)
%3 = tail call i32 @assert_int_equal(i32 0, i64 0)
ret void
}
/* Type definitions */
typedef int fexcept_t;

/* Variables and functions */
int /*<<< orphan*/ _FPU_GETFLAGS(int);
int fegetexceptflag(fexcept_t *flagp, int excepts) {
  _FPU_GETFLAGS(*flagp);
  *flagp &= excepts;
  return 0;
}


x86 assembly (clang, -O0):
<fegetexceptflag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <_FPU_GETFLAGS@plt>
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
and    (%rax),%ecx
mov    %ecx,(%rax)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fegetexceptflag>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    (%rdi),%edi
call   1030 <_FPU_GETFLAGS@plt>
and    %ebp,(%rbx)
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fegetexceptflag(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = call i32 @_FPU_GETFLAGS(i32 %6)
%8 = load i32, i32* %4
%9 = load i32*, i32** %3
%10 = load i32, i32* %9
%11 = and i32 %10, %8
store i32 %11, i32* %9
ret i32 0
}

LLVM IR (-O2):
define i32 @fegetexceptflag(i32* nocapture %0, i32 %1) {
%3 = load i32, i32* %0
%4 = tail call i32 @_FPU_GETFLAGS(i32 %3)
%5 = load i32, i32* %0
%6 = and i32 %5, %1
store i32 %6, i32* %0
ret i32 0
}
long int longint_ignoring_signedshort(long int x, signed short y) { return x; }


x86 assembly (clang, -O0):
<longint_ignoring_signedshort>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longint_ignoring_signedshort>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @longint_ignoring_signedshort(i64 %0, i16 signext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @longint_ignoring_signedshort(i64 returned %0, i16 signext %1) {
ret i64 %0
}
double HeatLoss(double HeatCoef, double DeltaTemp, double SArea) {
  double HeatL;
  HeatL = HeatCoef * SArea * DeltaTemp;
  return HeatL;
}


x86 assembly (clang, -O0):
<HeatLoss>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<HeatLoss>:
mulsd  %xmm2,%xmm0
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @HeatLoss(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
%7 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%8 = load double, double* %4
%9 = load double, double* %6
%10 = fmul double %8, %9
%11 = load double, double* %5
%12 = fmul double %10, %11
store double %12, double* %7
%13 = load double, double* %7
ret double %13
}

LLVM IR (-O2):
define double @HeatLoss(double %0, double %1, double %2) {
%4 = fmul double %0, %2
%5 = fmul double %4, %1
ret double %5
}
/* Variables and functions */
int syscall(int, char const *, char const *, void *, size_t, int);
int lsetxattr(const char *path, const char *name, void *value, size_t size,
              int flags) {
  return syscall(189, path, name, value, size, flags);
}


x86 assembly (clang, -O0):
<lsetxattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
mov    -0x24(%rbp),%r9d
mov    $0xbd,%edi
call   1030 <syscall@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsetxattr>:
mov    %r8d,%r9d
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0xbd,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @lsetxattr(i8* %0, i8* %1, i8* %2, i64 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i64 %3, i64* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i64, i64* %9
%15 = load i32, i32* %10
%16 = call i32 @syscall(i32 189, i8* %11, i8* %12, i8* %13, i64 %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @lsetxattr(i8* %0, i8* %1, i8* %2, i64 %3, i32 %4) {
%6 = tail call i32 @syscall(i32 189, i8* %0, i8* %1, i8* %2, i64 %3, i32 %4)
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fscanf(int /*<<< orphan*/ *, char *, long double *);
int mem_total() {
  long double a;
  int i_mem_total;
  FILE *fp;
  fp = fopen("/proc/meminfo", "r");
  fscanf(fp, "%*s %Lf", &a);
  fclose(fp);
  i_mem_total = (int)a;
  return (i_mem_total);
}


x86 assembly (clang, -O0):
<mem_total>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
lea    0xec1(%rip),%rdi
lea    0xec8(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
lea    0xeb6(%rip),%rsi
lea    -0x10(%rbp),%rdx
call   1040 <fscanf@plt>
mov    -0x20(%rbp),%rdi
call   1030 <fclose@plt>
fldt   -0x10(%rbp)
fnstcw -0x26(%rbp)
movzwl -0x26(%rbp),%eax
or     $0xc00,%eax
mov    %ax,-0x28(%rbp)
fldcw  -0x28(%rbp)
fistpl -0x24(%rbp)
fldcw  -0x26(%rbp)
mov    -0x24(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_total>:
push   %rbx
sub    $0x20,%rsp
lea    0xec4(%rip),%rdi
lea    0xecb(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,%rbx
lea    0xebe(%rip),%rsi
lea    0x10(%rsp),%rdx
mov    %rax,%rdi
call   1040 <fscanf@plt>
mov    %rbx,%rdi
call   1030 <fclose@plt>
fldt   0x10(%rsp)
fnstcw 0x8(%rsp)
movzwl 0x8(%rsp),%eax
or     $0xc00,%eax
mov    %ax,0xa(%rsp)
fldcw  0xa(%rsp)
fistpl 0xc(%rsp)
fldcw  0x8(%rsp)
mov    0xc(%rsp),%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"/proc/meminfo\00"
@.str.1 = [2 x i8] c"r\00"
@.str.2 = [8 x i8] c"%*s %Lf\00"
define i32 @mem_total() {
%1 = alloca x86_fp80
%2 = alloca i32
%3 = alloca i32*
%4 = call i32* @fopen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %4, i32** %3
%5 = load i32*, i32** %3
%6 = call i32 @fscanf(i32* %5, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), x86_fp80* %1)
%7 = load i32*, i32** %3
%8 = call i32 @fclose(i32* %7)
%9 = load x86_fp80, x86_fp80* %1
%10 = fptosi x86_fp80 %9 to i32
store i32 %10, i32* %2
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [14 x i8] c"/proc/meminfo\00"
@.str.1 = [2 x i8] c"r\00"
@.str.2 = [8 x i8] c"%*s %Lf\00"
define i32 @mem_total() {
%1 = alloca x86_fp80
%2 = bitcast x86_fp80* %1 to i8*
%3 = tail call i32* @fopen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @fscanf(i32* %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), x86_fp80* %1)
%5 = call i32 @fclose(i32* %3)
%6 = load x86_fp80, x86_fp80* %1
%7 = fptosi x86_fp80 %6 to i32
ret i32 %7
}
int main() {
  int aa;
  short bb;
  test(&aa);
  test(&bb);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <test@plt>
lea    -0xa(%rbp),%rdi
mov    $0x0,%al
call   1030 <test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0x4(%rsp),%rdi
xor    %eax,%eax
call   1030 <test@plt>
lea    0x2(%rsp),%rdi
xor    %eax,%eax
call   1030 <test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i16
store i32 0, i32* %1
%4 = call i32 (i32*, ...) bitcast (i32 (...)* @test to i32 (i32*, ...)*)(i32* %2)
%5 = call i32 (i16*, ...) bitcast (i32 (...)* @test to i32 (i16*, ...)*)(i16* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = alloca i16
%3 = bitcast i32* %1 to i8*
%4 = bitcast i16* %2 to i8*
%5 = call i32 (i32*, ...) bitcast (i32 (...)* @test to i32 (i32*, ...)*)(i32* %1)
%6 = call i32 (i16*, ...) bitcast (i32 (...)* @test to i32 (i16*, ...)*)(i16* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ WNOHANG;
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ waitpid(int, int /*<<< orphan*/ *, int /*<<< orphan*/);
void traitement_signal(int sig) {
  printf("Signal %d reçu \n", sig);
  waitpid(-1, NULL, WNOHANG);
}


x86 assembly (clang, -O0):
<traitement_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea7(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <waitpid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<traitement_signal>:
push   %rax
mov    %edi,%esi
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eb2(%rip),%rax
mov    (%rax),%edx
mov    $0xffffffff,%edi
xor    %esi,%esi
pop    %rax
jmp    1040 <waitpid@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Signal %d re\C3\A7u \0A\00"
@WNOHANG = global i32 0
define void @traitement_signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @WNOHANG
%6 = call i32 @waitpid(i32 -1, i32* null, i32 %5)
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"Signal %d re\C3\A7u \0A\00"
@WNOHANG = global i32 0
define void @traitement_signal(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = load i32, i32* @WNOHANG
%4 = tail call i32 @waitpid(i32 -1, i32* null, i32 %3)
ret void
}
/* Variables and functions */
char *malloc(size_t);
size_t strlen(char *);
int /*<<< orphan*/ strncpy(char *, char *, size_t);
char *getInfo() {
  char *name;
  size_t size;
  size = strlen("Dither (C) 2004 Panayotis Katsaloulis "
                "http://www.panayotis.com under GNU GPL");
  name = malloc(size + 1);
  strncpy(name,
          ("Dither (C) 2004 Panayotis Katsaloulis http://www.panayotis.com "
           "under GNU GPL"),
          size + 1);
  return name;
}


x86 assembly (clang, -O0):
<getInfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
add    $0x1,%rdx
lea    0xe94(%rip),%rsi
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getInfo>:
push   %rbx
mov    $0x4d,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
lea    0xecb(%rip),%rsi
mov    $0x4d,%edx
mov    %rax,%rdi
call   1030 <strncpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [77 x i8] c"Dither (C) 2004 Panayotis Katsaloulis http://www.panayotis.com under GNU GPL\00"
define i8* @getInfo() {
%1 = alloca i8*
%2 = alloca i64
%3 = call i64 @strlen(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0))
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = add i64 %4, 1
%6 = call i8* @malloc(i64 %5)
store i8* %6, i8** %1
%7 = load i8*, i8** %1
%8 = load i64, i64* %2
%9 = add i64 %8, 1
%10 = call i32 @strncpy(i8* %7, i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0), i64 %9)
%11 = load i8*, i8** %1
ret i8* %11
}

LLVM IR (-O2):
@.str = [77 x i8] c"Dither (C) 2004 Panayotis Katsaloulis http://www.panayotis.com under GNU GPL\00"
define i8* @getInfo() {
%1 = tail call dereferenceable_or_null(77) i8* @malloc(i64 77)
%2 = tail call i32 @strncpy(i8* %1, i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0), i64 77)
ret i8* %1
}
int bla_claim_table_seq_print_text(struct seq_file *seq, void *offset) {
  return 0;
}


x86 assembly (clang, -O0):
<bla_claim_table_seq_print_text>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bla_claim_table_seq_print_text>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.seq_file = type opaque
define i32 @bla_claim_table_seq_print_text(%struct.seq_file* %0, i8* %1) {
%3 = alloca %struct.seq_file*
%4 = alloca i8*
store %struct.seq_file* %0, %struct.seq_file** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
%struct.seq_file = type opaque
define i32 @bla_claim_table_seq_print_text(%struct.seq_file* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}