void hvline(float *hcheckerx1, float *hcheckery1, float *lcheckerx1,
            float *lcheckery1, float *hcheckerx2, float *hcheckery2,
            float *lcheckerx2, float *lcheckery2) {
  if (*hcheckery2 > *hcheckery1) {
    float tempx1 = *hcheckerx1, tempy1 = *hcheckery1, tempx2 = *lcheckerx1,
          tempy2 = *lcheckery1;
    *hcheckerx1 = *hcheckerx2;
    *hcheckerx2 = tempx1;
    *hcheckery1 = *hcheckery2;
    *hcheckery2 = tempy1;
    *lcheckerx1 = *lcheckerx2;
    *lcheckerx2 = tempx2;
    *lcheckery1 = *lcheckery2;
    *lcheckery2 = tempy2;
  }
}


x86 assembly (clang, -O0):
<hvline>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x30(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
ucomiss (%rax),%xmm0
jbe    11e1 <hvline+0xe1>
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x34(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x38(%rbp)
mov    -0x18(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x3c(%rbp)
mov    -0x20(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x40(%rbp)
mov    -0x28(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x34(%rbp),%xmm0
mov    -0x28(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x30(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x38(%rbp),%xmm0
mov    -0x30(%rbp),%rax
movss  %xmm0,(%rax)
mov    0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x3c(%rbp),%xmm0
mov    0x10(%rbp),%rax
movss  %xmm0,(%rax)
mov    0x18(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x20(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x40(%rbp),%xmm0
mov    0x18(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<hvline>:
movss  (%r9),%xmm1
movss  (%rsi),%xmm0
ucomiss %xmm0,%xmm1
jbe    115a <hvline+0x5a>
mov    0x10(%rsp),%r10
mov    0x8(%rsp),%rax
movss  (%rdi),%xmm1
movss  (%rdx),%xmm2
movss  (%rcx),%xmm3
movss  (%r8),%xmm4
movss  %xmm4,(%rdi)
movss  %xmm1,(%r8)
movss  (%r9),%xmm1
movss  %xmm1,(%rsi)
movss  %xmm0,(%r9)
movss  (%rax),%xmm0
movss  %xmm0,(%rdx)
movss  %xmm2,(%rax)
movss  (%r10),%xmm0
movss  %xmm0,(%rcx)
movss  %xmm3,(%r10)
ret

LLVM IR (-O0):
define void @hvline(float* %0, float* %1, float* %2, float* %3, float* %4, float* %5, float* %6, float* %7) {
%9 = alloca float*
%10 = alloca float*
%11 = alloca float*
%12 = alloca float*
%13 = alloca float*
%14 = alloca float*
%15 = alloca float*
%16 = alloca float*
%17 = alloca float
%18 = alloca float
%19 = alloca float
%20 = alloca float
store float* %0, float** %9
store float* %1, float** %10
store float* %2, float** %11
store float* %3, float** %12
store float* %4, float** %13
store float* %5, float** %14
store float* %6, float** %15
store float* %7, float** %16
%21 = load float*, float** %14
%22 = load float, float* %21
%23 = load float*, float** %10
%24 = load float, float* %23
%25 = fcmp ogt float %22, %24
br i1 %25, label %26, label %55
26: ; preds = %8
%27 = load float*, float** %9
%28 = load float, float* %27
store float %28, float* %17
%29 = load float*, float** %10
%30 = load float, float* %29
store float %30, float* %18
%31 = load float*, float** %11
%32 = load float, float* %31
store float %32, float* %19
%33 = load float*, float** %12
%34 = load float, float* %33
store float %34, float* %20
%35 = load float*, float** %13
%36 = load float, float* %35
%37 = load float*, float** %9
store float %36, float* %37
%38 = load float, float* %17
%39 = load float*, float** %13
store float %38, float* %39
%40 = load float*, float** %14
%41 = load float, float* %40
%42 = load float*, float** %10
store float %41, float* %42
%43 = load float, float* %18
%44 = load float*, float** %14
store float %43, float* %44
%45 = load float*, float** %15
%46 = load float, float* %45
%47 = load float*, float** %11
store float %46, float* %47
%48 = load float, float* %19
%49 = load float*, float** %15
store float %48, float* %49
%50 = load float*, float** %16
%51 = load float, float* %50
%52 = load float*, float** %12
store float %51, float* %52
%53 = load float, float* %20
%54 = load float*, float** %16
store float %53, float* %54
br label %55
55: ; preds = %26, %8
ret void
}

LLVM IR (-O2):
define void @hvline(float* nocapture %0, float* nocapture %1, float* nocapture %2, float* nocapture %3, float* nocapture %4, float* nocapture %5, float* nocapture %6, float* nocapture %7) {
%9 = load float, float* %5
%10 = load float, float* %1
%11 = fcmp ogt float %9, %10
br i1 %11, label %12, label %20
12: ; preds = %8
%13 = load float, float* %0
%14 = load float, float* %2
%15 = load float, float* %3
%16 = load float, float* %4
store float %16, float* %0
store float %13, float* %4
%17 = load float, float* %5
store float %17, float* %1
store float %10, float* %5
%18 = load float, float* %6
store float %18, float* %2
store float %14, float* %6
%19 = load float, float* %7
store float %19, float* %3
store float %15, float* %7
br label %20
20: ; preds = %12, %8
ret void
}