xunge/DecIR huggingface dataset:
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int /*<<< orphan*/ *display;
};
struct TYPE_4__ {
  TYPE_1__ xconfigure;
};
typedef TYPE_2__ XEvent;
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
void set_XEvent_xconfigure_display(void *_p, void *_v) {
  ((XEvent *)_p)->xconfigure.display = (Display *)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xconfigure_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xconfigure_display>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32* }
define void @set_XEvent_xconfigure_display(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.TYPE_4__*
%9 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %8, i32 0, i32 0
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %9, i32 0, i32 0
store i32* %6, i32** %10
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xconfigure_display(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
/* Variables and functions */
scalar_t__ gets(char *);
int /*<<< orphan*/ puts(char *);
int main(void) {
  char buf[4096];
  while (gets(buf))
    puts(buf);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1010,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x1010(%rbp),%rdi
call   1040 <gets@plt>
cmp    $0x0,%rax
je     1159 <main+0x39>
lea    -0x1010(%rbp),%rdi
call   1030 <puts@plt>
jmp    1132 <main+0x12>
xor    %eax,%eax
add    $0x1010,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x1000,%rsp
mov    %rsp,%rdi
call   1040 <gets@plt>
test   %rax,%rax
je     1155 <main+0x35>
mov    %rsp,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1040 <gets@plt>
test   %rax,%rax
jne    1140 <main+0x20>
xor    %eax,%eax
add    $0x1000,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [4096 x i8]
store i32 0, i32* %1
br label %3
3: ; preds = %7, %0
%4 = getelementptr inbounds [4096 x i8], [4096 x i8]* %2, i64 0, i64 0
%5 = call i64 @gets(i8* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = getelementptr inbounds [4096 x i8], [4096 x i8]* %2, i64 0, i64 0
%9 = call i32 @puts(i8* %8)
br label %3
10: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [4096 x i8]
%2 = getelementptr inbounds [4096 x i8], [4096 x i8]* %1, i64 0, i64 0
%3 = call i64 @gets(i8* %2)
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %0, %5
%6 = call i32 @puts(i8* %2)
%7 = call i64 @gets(i8* %2)
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %5
9: ; preds = %5, %0
ret i32 0
}
/* Variables and functions */
char *mem_begin(char *);
char *str_create(char *);
int /*<<< orphan*/ str_destroy(char *);
char *str_shrink_reserve(char *str) {
  char *new_str = NULL;
  char *str_begin = mem_begin(str);
  if (str_begin != NULL)
    str = str_begin;
  new_str = str_create(str);
  str_destroy(str);
  return (new_str);
}


x86 assembly (clang, -O0):
<str_shrink_reserve>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <mem_begin@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1164 <str_shrink_reserve+0x34>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <str_create@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <str_destroy@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_shrink_reserve>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1040 <mem_begin@plt>
test   %rax,%rax
cmovne %rax,%rbx
mov    %rbx,%rdi
call   1050 <str_create@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1030 <str_destroy@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @str_shrink_reserve(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %3
%5 = load i8*, i8** %2
%6 = call i8* @mem_begin(i8* %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i8*, i8** %4
store i8* %10, i8** %2
br label %11
11: ; preds = %9, %1
%12 = load i8*, i8** %2
%13 = call i8* @str_create(i8* %12)
store i8* %13, i8** %3
%14 = load i8*, i8** %2
%15 = call i32 @str_destroy(i8* %14)
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
define i8* @str_shrink_reserve(i8* %0) {
%2 = tail call i8* @mem_begin(i8* %0)
%3 = icmp eq i8* %2, null
%4 = select i1 %3, i8* %0, i8* %2
%5 = tail call i8* @str_create(i8* %4)
%6 = tail call i32 @str_destroy(i8* %4)
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ return_struct_vc5();
int /*<<< orphan*/ take_struct_vc5(int /*<<< orphan*/);
void test_struct_vc5() { take_struct_vc5(return_struct_vc5()); }


x86 assembly (clang, -O0):
<test_struct_vc5>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <return_struct_vc5@plt>
mov    %eax,%edi
call   1030 <take_struct_vc5@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_struct_vc5>:
push   %rax
xor    %eax,%eax
call   1040 <return_struct_vc5@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <take_struct_vc5@plt>

LLVM IR (-O0):
define void @test_struct_vc5() {
%1 = call i32 (...) @return_struct_vc5()
%2 = call i32 @take_struct_vc5(i32 %1)
ret void
}

LLVM IR (-O2):
define void @test_struct_vc5() {
%1 = tail call i32 (...) @return_struct_vc5()
%2 = tail call i32 @take_struct_vc5(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ errx(int /*<<< orphan*/, char *);
int /*<<< orphan*/ free(void *);
void xfree(void *ptr) {
  if (ptr == NULL) {
    errx(EXIT_FAILURE, "null pointer");
  }
  free(ptr);
}


x86 assembly (clang, -O0):
<xfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    114c <xfree+0x2c>
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
lea    0xeb9(%rip),%rsi
call   1040 <errx@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfree>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
jne    113e <xfree+0x1e>
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xec7(%rip),%rsi
call   1040 <errx@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
@.str = [13 x i8] c"null pointer\00"
define void @xfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @errx(i32 %6, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %5, %1
%9 = load i8*, i8** %2
%10 = call i32 @free(i8* %9)
ret void
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
@.str = [13 x i8] c"null pointer\00"
define void @xfree(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @errx(i32 %4, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %3, %1
%7 = tail call i32 @free(i8* %0)
ret void
}
void nfs_fscache_enable_cookie(struct inode *inode) {}


x86 assembly (clang, -O0):
<nfs_fscache_enable_cookie>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nfs_fscache_enable_cookie>:
ret

LLVM IR (-O0):
%struct.inode = type opaque
define void @nfs_fscache_enable_cookie(%struct.inode* %0) {
%2 = alloca %struct.inode*
store %struct.inode* %0, %struct.inode** %2
ret void
}

LLVM IR (-O2):
%struct.inode = type opaque
define void @nfs_fscache_enable_cookie(%struct.inode* nocapture %0) {
ret void
}
/* Variables and functions */
scalar_t__ isdigit(int);
int isxdigit(int c) {
  return (isdigit(c) || (c >= 'A' && c <= 'F') || (c >= 'a' && c <= 'F'));
}


x86 assembly (clang, -O0):
<isxdigit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isdigit@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    116d <isxdigit+0x5d>
cmpl   $0x41,-0x4(%rbp)
jl     114e <isxdigit+0x3e>
mov    $0x1,%al
cmpl   $0x46,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116d <isxdigit+0x5d>
xor    %eax,%eax
cmpl   $0x61,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1167 <isxdigit+0x57>
cmpl   $0x46,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isxdigit>:
push   %rbx
mov    %edi,%ebx
call   1030 <isdigit@plt>
test   %rax,%rax
setne  %al
add    $0xffffffbf,%ebx
cmp    $0x6,%ebx
setb   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isxdigit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isdigit(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %20, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = icmp sge i32 %7, 65
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %2
%11 = icmp sle i32 %10, 70
br i1 %11, label %20, label %12
12: ; preds = %9, %6
%13 = load i32, i32* %2
%14 = icmp sge i32 %13, 97
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %2
%17 = icmp sle i32 %16, 70
br label %18
18: ; preds = %15, %12
%19 = phi i1 [ false, %12 ], [ %17, %15 ]
br label %20
20: ; preds = %18, %9, %1
%21 = phi i1 [ true, %9 ], [ true, %1 ], [ %19, %18 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @isxdigit(i32 %0) {
%2 = tail call i64 @isdigit(i32 %0)
%3 = icmp ne i64 %2, 0
%4 = add i32 %0, -65
%5 = icmp ult i32 %4, 6
%6 = or i1 %5, %3
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ arm_memio_ldr(int /*<<< orphan*/);
int /*<<< orphan*/ t16_memio_reg_op();
void t16_ldr_reg() { arm_memio_ldr(t16_memio_reg_op()); }


x86 assembly (clang, -O0):
<t16_ldr_reg>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <t16_memio_reg_op@plt>
mov    %eax,%edi
call   1040 <arm_memio_ldr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t16_ldr_reg>:
push   %rax
xor    %eax,%eax
call   1030 <t16_memio_reg_op@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <arm_memio_ldr@plt>

LLVM IR (-O0):
define void @t16_ldr_reg() {
%1 = call i32 (...) @t16_memio_reg_op()
%2 = call i32 @arm_memio_ldr(i32 %1)
ret void
}

LLVM IR (-O2):
define void @t16_ldr_reg() {
%1 = tail call i32 (...) @t16_memio_reg_op()
%2 = tail call i32 @arm_memio_ldr(i32 %1)
ret void
}
int swap(int c) {
  if (c >= 'A' && c <= 'Z') {
    return c + 32;
  } else if (c >= 'a' && c <= 'z') {
    return c - 32;
  }
  return c;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x41,-0x8(%rbp)
jl     1129 <swap+0x29>
cmpl   $0x5a,-0x8(%rbp)
jg     1129 <swap+0x29>
mov    -0x8(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    1156 <swap+0x56>
cmpl   $0x61,-0x8(%rbp)
jl     114b <swap+0x4b>
cmpl   $0x7a,-0x8(%rbp)
jg     114b <swap+0x4b>
mov    -0x8(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    1156 <swap+0x56>
jmp    1150 <swap+0x50>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    %edi,%eax
lea    -0x41(%rax),%ecx
cmp    $0x19,%ecx
ja     110e <swap+0xe>
add    $0x20,%eax
ret
lea    -0x61(%rax),%ecx
lea    -0x20(%rax),%edx
cmp    $0x1a,%ecx
cmovae %eax,%edx
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @swap(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 65
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 90
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 32
store i32 %11, i32* %2
br label %24
12: ; preds = %6, %1
%13 = load i32, i32* %3
%14 = icmp sge i32 %13, 97
br i1 %14, label %15, label %21
15: ; preds = %12
%16 = load i32, i32* %3
%17 = icmp sle i32 %16, 122
br i1 %17, label %18, label %21
18: ; preds = %15
%19 = load i32, i32* %3
%20 = sub nsw i32 %19, 32
store i32 %20, i32* %2
br label %24
21: ; preds = %15, %12
br label %22
22: ; preds = %21
%23 = load i32, i32* %3
store i32 %23, i32* %2
br label %24
24: ; preds = %22, %18, %9
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @swap(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = add nuw nsw i32 %0, 32
br label %11
6: ; preds = %1
%7 = add i32 %0, -97
%8 = icmp ult i32 %7, 26
%9 = add nsw i32 %0, -32
%10 = select i1 %8, i32 %9, i32 %0
br label %11
11: ; preds = %6, %4
%12 = phi i32 [ %5, %4 ], [ %10, %6 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ ACUTE_assert_print(int, unsigned char *);
void ACUTE_assert_true(int result, int line, unsigned char *exception) {
  if (result != 1) {
    ACUTE_assert_print(line, exception);
  }
}


x86 assembly (clang, -O0):
<ACUTE_assert_true>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
cmpl   $0x1,-0x4(%rbp)
je     1138 <ACUTE_assert_true+0x28>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <ACUTE_assert_print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ACUTE_assert_true>:
cmp    $0x1,%edi
jne    1116 <ACUTE_assert_true+0x6>
ret
mov    %esi,%edi
mov    %rdx,%rsi
jmp    1030 <ACUTE_assert_print@plt>

LLVM IR (-O0):
define void @ACUTE_assert_true(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 1
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i32, i32* %5
%11 = load i8*, i8** %6
%12 = call i32 @ACUTE_assert_print(i32 %10, i8* %11)
br label %13
13: ; preds = %9, %3
ret void
}

LLVM IR (-O2):
define void @ACUTE_assert_true(i32 %0, i32 %1, i8* %2) {
%4 = icmp eq i32 %0, 1
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @ACUTE_assert_print(i32 %1, i8* %2)
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
int strlen(char *);
double sleng(char *p, double h, double w) {
  int len = strlen(p);
  double ret = (len - 1) * w + 0.8 * w;
  return (ret);
}


x86 assembly (clang, -O0):
<sleng>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
sub    $0x1,%eax
cvtsi2sd %eax,%xmm0
movsd  -0x18(%rbp),%xmm2
movsd  0xeb7(%rip),%xmm1
mulsd  -0x18(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleng>:
push   %rax
movsd  %xmm1,(%rsp)
call   1030 <strlen@plt>
add    $0xffffffff,%eax
xorps  %xmm1,%xmm1
cvtsi2sd %eax,%xmm1
movsd  (%rsp),%xmm0
mulsd  %xmm0,%xmm1
mulsd  0xeca(%rip),%xmm0
addsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @sleng(i8* %0, double %1, double %2) {
%4 = alloca i8*
%5 = alloca double
%6 = alloca double
%7 = alloca i32
%8 = alloca double
store i8* %0, i8** %4
store double %1, double* %5
store double %2, double* %6
%9 = load i8*, i8** %4
%10 = call i32 @strlen(i8* %9)
store i32 %10, i32* %7
%11 = load i32, i32* %7
%12 = sub nsw i32 %11, 1
%13 = sitofp i32 %12 to double
%14 = load double, double* %6
%15 = load double, double* %6
%16 = fmul double 8.000000e-01, %15
%17 = call double @llvm.fmuladd.f64(double %13, double %14, double %16)
store double %17, double* %8
%18 = load double, double* %8
ret double %18
}

LLVM IR (-O2):
define double @sleng(i8* %0, double %1, double %2) {
%4 = tail call i32 @strlen(i8* %0)
%5 = add nsw i32 %4, -1
%6 = sitofp i32 %5 to double
%7 = fmul double %2, 8.000000e-01
%8 = tail call double @llvm.fmuladd.f64(double %6, double %2, double %7)
ret double %8
}
/* Variables and functions */
char *getenv(char *);
char *getlogin(void) { return getenv("LOGNAME"); }


x86 assembly (clang, -O0):
<getlogin>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <getenv@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getlogin>:
lea    0xee9(%rip),%rdi
jmp    1030 <getenv@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"LOGNAME\00"
define i8* @getlogin() {
%1 = call i8* @getenv(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"LOGNAME\00"
define i8* @getlogin() {
%1 = tail call i8* @getenv(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
void putc(int c) {
  while (!(*(volatile unsigned char *)(0xC1009000 + 0x14) & 0x20))
    ;
  *(volatile unsigned char *)(0xC1009000 + 0x0) = c;
}


x86 assembly (clang, -O0):
<putc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xc1009014,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x20,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1129 <putc+0x29>
jmp    112e <putc+0x2e>
jmp    1107 <putc+0x7>
mov    -0x4(%rbp),%eax
mov    %al,%cl
mov    $0xc1009000,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<putc>:
mov    $0xc1009000,%eax
cs nopw 0x0(%rax,%rax,1)
nop
testb  $0x20,0x14(%rax)
je     1110 <putc+0x10>
mov    %dil,(%rax)
ret

LLVM IR (-O0):
define void @putc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %9, %1
%4 = load volatile i8, i8* inttoptr (i64 3238039572 to i8*)
%5 = zext i8 %4 to i32
%6 = and i32 %5, 32
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
br i1 %8, label %9, label %10
9: ; preds = %3
br label %3
10: ; preds = %3
%11 = load i32, i32* %2
%12 = trunc i32 %11 to i8
store volatile i8 %12, i8* inttoptr (i64 3238039552 to i8*)
ret void
}

LLVM IR (-O2):
define void @putc(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i8, i8* inttoptr (i64 3238039572 to i8*)
%4 = and i8 %3, 32
%5 = icmp eq i8 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
%7 = trunc i32 %0 to i8
store volatile i8 %7, i8* inttoptr (i64 3238039552 to i8*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sqlite3;

/* Variables and functions */
int /*<<< orphan*/ sqlite3_exec(int /*<<< orphan*/ *, char *,
                                int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                                int /*<<< orphan*/ *);
void configure_db(sqlite3 *db) {
  sqlite3_exec(db, "PRAGMA foreign_keys  = ON", NULL, NULL, NULL);
}


x86 assembly (clang, -O0):
<configure_db>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
xor    %eax,%eax
mov    %eax,%r8d
mov    %r8,%rdx
mov    %r8,%rcx
call   1030 <sqlite3_exec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<configure_db>:
lea    0xee9(%rip),%rsi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <sqlite3_exec@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"PRAGMA foreign_keys = ON\00"
define void @configure_db(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @sqlite3_exec(i32* %3, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32* null, i32* null, i32* null)
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"PRAGMA foreign_keys = ON\00"
define void @configure_db(i32* %0) {
%2 = tail call i32 @sqlite3_exec(i32* %0, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32* null, i32* null, i32* null)
ret void
}
/* Variables and functions */
bool SHAREMIND_MAP_KEY_LESS_long(long const k1, long const k2) {
  return k1 < k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_LESS_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_LESS_long>:
xor    %eax,%eax
cmp    %rsi,%rdi
setl   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_LESS_long(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_LESS_long(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_imm_87int64_highword_reg(long long val) {
  return ((val >> 32) & (0x87 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_87int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x87,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_87int64_highword_reg>:
movabs $0x8700000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_87int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 135
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_87int64_highword_reg(i64 %0) {
%2 = and i64 %0, 579820584960
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int comprimento(char *string) {
  unsigned int quantidade = 0;
  while (*string != '\0') {
    quantidade++;
    string++;
  }
  return quantidade;
}


x86 assembly (clang, -O0):
<comprimento>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1139 <comprimento+0x39>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <comprimento+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comprimento>:
cmpb   $0x0,(%rdi)
je     111c <comprimento+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <comprimento+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @comprimento(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %4
%10 = load i32, i32* %3
%11 = add i32 %10, 1
store i32 %11, i32* %3
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @comprimento(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = add i32 %5, 1
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, double);
char *md_double2string04(double number) {
  static char str[2048];
  int i;
  for (i = 0; i < 2048; i++) {
    str[i] = '\0';
  }
  sprintf(str, "%.4f", number);
  return (str);
}


x86 assembly (clang, -O0):
<md_double2string04>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x800,-0xc(%rbp)
jge    114e <md_double2string04+0x3e>
movslq -0xc(%rbp),%rcx
lea    0x2f04(%rip),%rax
movb   $0x0,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1124 <md_double2string04+0x14>
movsd  -0x8(%rbp),%xmm0
lea    0x2ee6(%rip),%rdi
lea    0xe9f(%rip),%rsi
call   1030 <sprintf@plt>
lea    0x2ed3(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<md_double2string04>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
lea    0x2f0e(%rip),%rbx
mov    $0x800,%edx
mov    %rbx,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
lea    0xeb8(%rip),%rsi
mov    %rbx,%rdi
movsd  0x8(%rsp),%xmm0
call   1040 <sprintf@plt>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@md_double2string04.str = internal global [2048 x i8] zeroinitializer
@.str = [5 x i8] c"%.4f\00"
define i8* @md_double2string04(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 2048
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [2048 x i8], [2048 x i8]* @md_double2string04.str, i64 0, i64 %9
store i8 0, i8* %10
br label %11
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load double, double* %2
%16 = call i32 @sprintf(i8* getelementptr inbounds ([2048 x i8], [2048 x i8]* @md_double2string04.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), double %15)
ret i8* getelementptr inbounds ([2048 x i8], [2048 x i8]* @md_double2string04.str, i64 0, i64 0)
}

LLVM IR (-O2):
@md_double2string04.str = internal global [2048 x i8] zeroinitializer
@.str = [5 x i8] c"%.4f\00"
define i8* @md_double2string04(double %0) {
%2 = tail call i32 @sprintf(i8* dereferenceable(1) getelementptr inbounds ([2048 x i8], [2048 x i8]* @md_double2string04.str, i64 0, i64 0), i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), double %0)
ret i8* getelementptr inbounds ([2048 x i8], [2048 x i8]* @md_double2string04.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ _k_heap_init();
int /*<<< orphan*/ _k_memproof_init();
void _k_mem_init(void) {
  _k_heap_init();
  _k_memproof_init();
}


x86 assembly (clang, -O0):
<_k_mem_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <_k_heap_init@plt>
mov    $0x0,%al
call   1030 <_k_memproof_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_k_mem_init>:
push   %rax
xor    %eax,%eax
call   1040 <_k_heap_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <_k_memproof_init@plt>

LLVM IR (-O0):
define void @_k_mem_init() {
%1 = call i32 (...) @_k_heap_init()
%2 = call i32 (...) @_k_memproof_init()
ret void
}

LLVM IR (-O2):
define void @_k_mem_init() {
%1 = tail call i32 (...) @_k_heap_init()
%2 = tail call i32 (...) @_k_memproof_init()
ret void
}
void byte_swap(long *entry) {
  unsigned char *p = (unsigned char *)entry;
  unsigned char tmp;
  tmp = p[0];
  p[0] = p[3];
  p[3] = tmp;
  tmp = p[1];
  p[1] = p[2];
  p[2] = tmp;
}


x86 assembly (clang, -O0):
<byte_swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    0x3(%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x3(%rax)
mov    -0x10(%rbp),%rax
mov    0x1(%rax),%al
mov    %al,-0x11(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x11(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x2(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<byte_swap>:
mov    (%rdi),%al
mov    0x3(%rdi),%cl
mov    %cl,(%rdi)
mov    %al,0x3(%rdi)
rolw   $0x8,0x1(%rdi)
ret

LLVM IR (-O0):
define void @byte_swap(i64* %0) {
%2 = alloca i64*
%3 = alloca i8*
%4 = alloca i8
store i64* %0, i64** %2
%5 = load i64*, i64** %2
%6 = bitcast i64* %5 to i8*
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i64 0
%9 = load i8, i8* %8
store i8 %9, i8* %4
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 3
%12 = load i8, i8* %11
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i64 0
store i8 %12, i8* %14
%15 = load i8, i8* %4
%16 = load i8*, i8** %3
%17 = getelementptr inbounds i8, i8* %16, i64 3
store i8 %15, i8* %17
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i64 1
%20 = load i8, i8* %19
store i8 %20, i8* %4
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i64 2
%23 = load i8, i8* %22
%24 = load i8*, i8** %3
%25 = getelementptr inbounds i8, i8* %24, i64 1
store i8 %23, i8* %25
%26 = load i8, i8* %4
%27 = load i8*, i8** %3
%28 = getelementptr inbounds i8, i8* %27, i64 2
store i8 %26, i8* %28
ret void
}

LLVM IR (-O2):
define void @byte_swap(i64* nocapture %0) {
%2 = bitcast i64* %0 to i8*
%3 = load i8, i8* %2
%4 = getelementptr inbounds i8, i8* %2, i64 3
%5 = load i8, i8* %4
store i8 %5, i8* %2
store i8 %3, i8* %4
%6 = getelementptr inbounds i8, i8* %2, i64 1
%7 = load i8, i8* %6
%8 = getelementptr inbounds i8, i8* %2, i64 2
%9 = load i8, i8* %8
store i8 %9, i8* %6
store i8 %7, i8* %8
ret void
}
/* Variables and functions */
char *doasprintf(char *, char const *);
int /*<<< orphan*/ warn(char *);
char *json_fmt_newreg(const char *license) {
  char *p;
  p = doasprintf("{"
                 "\"resource\": \"new-reg\", "
                 "\"agreement\": \"%s\""
                 "}",
                 license);
  if (NULL == p)
    warn("asprintf");
  return (p);
}


x86 assembly (clang, -O0):
<json_fmt_newreg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1040 <doasprintf@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
cmp    -0x10(%rbp),%rax
jne    1158 <json_fmt_newreg+0x38>
lea    0xed8(%rip),%rdi
call   1030 <warn@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<json_fmt_newreg>:
push   %rbx
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1040 <doasprintf@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1144 <json_fmt_newreg+0x24>
lea    0xeec(%rip),%rdi
call   1030 <warn@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [43 x i8] c"{\22resource\22: \22new-reg\22, \22agreement\22: \22%s\22}\00"
@.str.1 = [9 x i8] c"asprintf\00"
define i8* @json_fmt_newreg(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @doasprintf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* null, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @warn(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %1
%11 = load i8*, i8** %3
ret i8* %11
}

LLVM IR (-O2):
@.str = [43 x i8] c"{\22resource\22: \22new-reg\22, \22agreement\22: \22%s\22}\00"
@.str.1 = [9 x i8] c"asprintf\00"
define i8* @json_fmt_newreg(i8* %0) {
%2 = tail call i8* @doasprintf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @warn(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char *, size_t);
char *sp_mem_alloc(size_t);
size_t strlen(char *);
char *sp_mem_dup(char *sz) {
  size_t len = strlen(sz);
  char *szp = sp_mem_alloc(len + 1);
  if (szp == NULL)
    return NULL;
  memcpy(szp, sz, len + 1);
  return szp;
}


x86 assembly (clang, -O0):
<sp_mem_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
add    $0x1,%rdi
call   1040 <sp_mem_alloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1172 <sp_mem_dup+0x42>
movq   $0x0,-0x8(%rbp)
jmp    118f <sp_mem_dup+0x5f>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
add    $0x1,%rdx
call   1050 <memcpy@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sp_mem_dup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
mov    %rax,%rbx
add    $0x1,%rbx
mov    %rbx,%rdi
call   1040 <sp_mem_alloc@plt>
mov    %rax,%r15
test   %rax,%rax
je     1162 <sp_mem_dup+0x32>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1050 <memcpy@plt>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @sp_mem_dup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
store i64 %7, i64* %4
%8 = load i64, i64* %4
%9 = add i64 %8, 1
%10 = call i8* @sp_mem_alloc(i64 %9)
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = icmp eq i8* %11, null
br i1 %12, label %13, label %14
13: ; preds = %1
store i8* null, i8** %2
br label %21
14: ; preds = %1
%15 = load i8*, i8** %5
%16 = load i8*, i8** %3
%17 = load i64, i64* %4
%18 = add i64 %17, 1
%19 = call i32 @memcpy(i8* %15, i8* %16, i64 %18)
%20 = load i8*, i8** %5
store i8* %20, i8** %2
br label %21
21: ; preds = %14, %13
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @sp_mem_dup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add i64 %2, 1
%4 = tail call i8* @sp_mem_alloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @memcpy(i8* %4, i8* %0, i64 %3)
br label %8
8: ; preds = %1, %6
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ FD_CLOEXEC;
int fcntl_fd_on(int, int /*<<< orphan*/);
int cloexec_on(int fd) { return fcntl_fd_on(fd, FD_CLOEXEC); }


x86 assembly (clang, -O0):
<cloexec_on>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <fcntl_fd_on@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cloexec_on>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <fcntl_fd_on@plt>

LLVM IR (-O0):
@FD_CLOEXEC = global i32 0
define i32 @cloexec_on(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @FD_CLOEXEC
%5 = call i32 @fcntl_fd_on(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@FD_CLOEXEC = global i32 0
define i32 @cloexec_on(i32 %0) {
%2 = load i32, i32* @FD_CLOEXEC
%3 = tail call i32 @fcntl_fd_on(i32 %0, i32 %2)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_unpackhi_pi8(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 __attribute__((no, unused)) test(__m64 s1, __m64 s2) {
  return _mm_unpackhi_pi8(s1, s2);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_unpackhi_pi8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
jmp    1030 <_mm_unpackhi_pi8@plt>

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_unpackhi_pi8(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_unpackhi_pi8(i32 %0, i32 %1)
ret i32 %3
}
__attribute__((no, noclone)) unsigned __int128 t121_5mul(signed __int128 x) {
  unsigned __int128 r;
  if (__builtin_mul_overflow(x, (signed __int128)(0), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t121_5mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
xor    %eax,%eax
movq   $0x0,-0x38(%rbp)
movq   $0x0,-0x40(%rbp)
test   $0x1,%al
jne    114f <t121_5mul+0x3f>
jmp    1156 <t121_5mul+0x46>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t121_5mul>:
xor    %eax,%eax
xor    %edx,%edx
ret

LLVM IR (-O0):
define { i64, i64 } @t121_5mul(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = sext i128 %11 to i129
%13 = call { i129, i1 } @llvm.smul.with.overflow.i129(i129 %12, i129 0)
%14 = extractvalue { i129, i1 } %13, 1
%15 = extractvalue { i129, i1 } %13, 0
%16 = trunc i129 %15 to i128
%17 = zext i128 %16 to i129
%18 = icmp ne i129 %15, %17
%19 = or i1 %14, %18
store i128 %16, i128* %6
br i1 %19, label %20, label %22
20: ; preds = %2
%21 = call i32 (...) @bar()
br label %22
22: ; preds = %20, %2
%23 = load i128, i128* %6
store i128 %23, i128* %3
%24 = bitcast i128* %3 to { i64, i64 }*
%25 = load { i64, i64 }, { i64, i64 }* %24
ret { i64, i64 } %25
}

LLVM IR (-O2):
define { i64, i64 } @t121_5mul(i64 %0, i64 %1) {
ret { i64, i64 } zeroinitializer
}
/* Variables and functions */
int up8(int);
unsigned int vga_imagesize(int w, int h) {
  int w8;
  unsigned int s;
  w8 = up8(w);
  s = 4 + w8 / 2 * h + 2;
  return s;
}


x86 assembly (clang, -O0):
<vga_imagesize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <up8@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
imul   -0x8(%rbp),%eax
add    $0x4,%eax
add    $0x2,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vga_imagesize>:
push   %rbx
mov    %esi,%ebx
call   1030 <up8@plt>
mov    %eax,%ecx
shr    $0x1f,%ecx
add    %ecx,%eax
sar    %eax
imul   %ebx,%eax
add    $0x6,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @vga_imagesize(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = call i32 @up8(i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = sdiv i32 %9, 2
%11 = load i32, i32* %4
%12 = mul nsw i32 %10, %11
%13 = add nsw i32 4, %12
%14 = add nsw i32 %13, 2
store i32 %14, i32* %6
%15 = load i32, i32* %6
ret i32 %15
}

LLVM IR (-O2):
define i32 @vga_imagesize(i32 %0, i32 %1) {
%3 = tail call i32 @up8(i32 %0)
%4 = sdiv i32 %3, 2
%5 = mul nsw i32 %4, %1
%6 = add nsw i32 %5, 6
ret i32 %6
}
/* Variables and functions */
char *strchr(const char *string, int ch) {
  while (*string && *string != ch)
    string++;
  if (*string == ch)
    return ((char *)string);
  return (NULL);
}


x86 assembly (clang, -O0):
<strchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x15(%rbp)
je     1130 <strchr+0x30>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    1140 <strchr+0x40>
jmp    1151 <strchr+0x51>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <strchr+0xb>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
jne    116e <strchr+0x6e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1176 <strchr+0x76>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strchr>:
add    $0xffffffffffffffff,%rdi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl 0x1(%rdi),%ecx
add    $0x1,%rdi
test   %ecx,%ecx
je     1120 <strchr+0x20>
cmp    %esi,%ecx
jne    1110 <strchr+0x10>
xor    %eax,%eax
cmp    %esi,%ecx
cmove  %rdi,%rax
ret

LLVM IR (-O0):
define i8* @strchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %19, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %6
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = load i32, i32* %5
%16 = icmp ne i32 %14, %15
br label %17
17: ; preds = %11, %6
%18 = phi i1 [ false, %6 ], [ %16, %11 ]
br i1 %18, label %19, label %22
19: ; preds = %17
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %4
br label %6
22: ; preds = %17
%23 = load i8*, i8** %4
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = load i32, i32* %5
%27 = icmp eq i32 %25, %26
br i1 %27, label %28, label %30
28: ; preds = %22
%29 = load i8*, i8** %4
store i8* %29, i8** %3
br label %31
30: ; preds = %22
store i8* null, i8** %3
br label %31
31: ; preds = %30, %28
%32 = load i8*, i8** %3
ret i8* %32
}

LLVM IR (-O2):
define i8* @strchr(i8* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %10, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = sext i8 %5 to i32
%8 = icmp eq i32 %7, %1
%9 = or i1 %6, %8
%10 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %9, label %11, label %3
11: ; preds = %3
%12 = select i1 %8, i8* %4, i8* null
ret i8* %12
}
void av_audio_fifo_alloc() {}


x86 assembly (clang, -O0):
<av_audio_fifo_alloc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_audio_fifo_alloc>:
ret

LLVM IR (-O0):
define void @av_audio_fifo_alloc() {
ret void
}

LLVM IR (-O2):
define void @av_audio_fifo_alloc() {
ret void
}
double toRadians(double degrees) {
  return degrees * 3.14159265358979323846 / 180;
}


x86 assembly (clang, -O0):
<toRadians>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xee2(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<toRadians>:
mulsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @toRadians(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 0x400921FB54442D18
%5 = fdiv double %4, 1.800000e+02
ret double %5
}

LLVM IR (-O2):
define double @toRadians(double %0) {
%2 = fmul double %0, 0x400921FB54442D18
%3 = fdiv double %2, 1.800000e+02
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ logmsg(int, char *, size_t);
void *malloc(size_t);
void *smalloc(size_t size) {
  void *result = malloc(size);
  if (result == NULL) {
    logmsg(0x03, "malloc(%zu) failed\n", size);
    exit(1);
  }
  return result;
}


x86 assembly (clang, -O0):
<smalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1173 <smalloc+0x43>
mov    -0x8(%rbp),%rdx
mov    $0x3,%edi
lea    0xe9c(%rip),%rsi
call   1040 <logmsg@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smalloc>:
push   %rbx
mov    %rdi,%rbx
call   1030 <malloc@plt>
test   %rax,%rax
je     1140 <smalloc+0x10>
pop    %rbx
ret
lea    0xeb9(%rip),%rsi
mov    $0x3,%edi
mov    %rbx,%rdx
call   1040 <logmsg@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"malloc(%zu) failed\0A\00"
define i8* @smalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i64, i64* %2
%10 = call i32 @logmsg(i32 3, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i64 %9)
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@.str = [20 x i8] c"malloc(%zu) failed\0A\00"
define noalias i8* @smalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @logmsg(i32 3, i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i64 %0)
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %1
ret i8* %2
}
/* Type definitions */
struct iio_dev {
  int dummy;
};

/* Variables and functions */
int iio_device_unregister_trigger_consumer(struct iio_dev *dev_info) {
  return 0;
}


x86 assembly (clang, -O0):
<iio_device_unregister_trigger_consumer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iio_device_unregister_trigger_consumer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iio_dev = type { i32 }
define i32 @iio_device_unregister_trigger_consumer(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.iio_dev = type { i32 }
define i32 @iio_device_unregister_trigger_consumer(%struct.iio_dev* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
struct sockaddr {
  int dummy;
};

/* Variables and functions */
int recvfrom(int, char *, int, int /*<<< orphan*/, struct sockaddr *, int *);
int recv_packet(int fd, char *buffer, struct sockaddr *addr, int *slen) {
  return recvfrom(fd, buffer, 516, 0, addr, slen);
}


x86 assembly (clang, -O0):
<recv_packet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%r8
mov    -0x20(%rbp),%r9
mov    $0x204,%edx
xor    %ecx,%ecx
call   1030 <recvfrom@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<recv_packet>:
mov    %rcx,%r9
mov    %rdx,%r8
mov    $0x204,%edx
xor    %ecx,%ecx
jmp    1030 <recvfrom@plt>

LLVM IR (-O0):
%struct.sockaddr = type { i32 }
define i32 @recv_packet(i32 %0, i8* %1, %struct.sockaddr* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca %struct.sockaddr*
%8 = alloca i32*
store i32 %0, i32* %5
store i8* %1, i8** %6
store %struct.sockaddr* %2, %struct.sockaddr** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load %struct.sockaddr*, %struct.sockaddr** %7
%12 = load i32*, i32** %8
%13 = call i32 @recvfrom(i32 %9, i8* %10, i32 516, i32 0, %struct.sockaddr* %11, i32* %12)
ret i32 %13
}

LLVM IR (-O2):
%struct.sockaddr = type { i32 }
define i32 @recv_packet(i32 %0, i8* %1, %struct.sockaddr* %2, i32* %3) {
%5 = tail call i32 @recvfrom(i32 %0, i8* %1, i32 516, i32 0, %struct.sockaddr* %2, i32* %3)
ret i32 %5
}