#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned short arc_crc_instruction(unsigned short, unsigned short, int);
unsigned short arc_a1h_crc_16(unsigned short *indata) {
  unsigned long i;
  unsigned short nAccum = 0;
  unsigned short *p;
  p = indata;
  for (i = 0; i < 0x1b0 / 2; i++)
    nAccum = arc_crc_instruction(p[i], nAccum, 0x8005);
  for (i = 512 / 2; i < 8 * 1024 / 2; i++)
    nAccum = arc_crc_instruction(p[i], nAccum, 0x8005);
  return nAccum;
}


x86 assembly (clang, -O0):
<arc_a1h_crc_16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movw   $0x0,-0x12(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0xd8,-0x10(%rbp)
jae    1172 <arc_a1h_crc_16+0x62>
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rax,%rcx,2),%ax
mov    $0x8005,%edx
movzwl %ax,%edi
movzwl -0x12(%rbp),%esi
call   1030 <arc_crc_instruction@plt>
mov    %ax,-0x12(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1132 <arc_a1h_crc_16+0x22>
movq   $0x100,-0x10(%rbp)
cmpq   $0x1000,-0x10(%rbp)
jae    11ba <arc_a1h_crc_16+0xaa>
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rax,%rcx,2),%ax
mov    $0x8005,%edx
movzwl %ax,%edi
movzwl -0x12(%rbp),%esi
call   1030 <arc_crc_instruction@plt>
mov    %ax,-0x12(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    117a <arc_a1h_crc_16+0x6a>
movzwl -0x12(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arc_a1h_crc_16>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
movzwl (%r14,%rbx,2),%edi
movzwl %ax,%esi
mov    $0x8005,%edx
call   1030 <arc_crc_instruction@plt>
add    $0x1,%rbx
cmp    $0xd8,%rbx
jne    1120 <arc_a1h_crc_16+0x10>
mov    $0x100,%ebx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzwl (%r14,%rbx,2),%edi
movzwl %ax,%esi
mov    $0x8005,%edx
call   1030 <arc_crc_instruction@plt>
add    $0x1,%rbx
cmp    $0x1000,%rbx
jne    1150 <arc_a1h_crc_16+0x40>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define zeroext i16 @arc_a1h_crc_16(i16* %0) {
%2 = alloca i16*
%3 = alloca i64
%4 = alloca i16
%5 = alloca i16*
store i16* %0, i16** %2
store i16 0, i16* %4
%6 = load i16*, i16** %2
store i16* %6, i16** %5
store i64 0, i64* %3
br label %7
7: ; preds = %17, %1
%8 = load i64, i64* %3
%9 = icmp ult i64 %8, 216
br i1 %9, label %10, label %20
10: ; preds = %7
%11 = load i16*, i16** %5
%12 = load i64, i64* %3
%13 = getelementptr inbounds i16, i16* %11, i64 %12
%14 = load i16, i16* %13
%15 = load i16, i16* %4
%16 = call zeroext i16 @arc_crc_instruction(i16 zeroext %14, i16 zeroext %15, i32 32773)
store i16 %16, i16* %4
br label %17
17: ; preds = %10
%18 = load i64, i64* %3
%19 = add i64 %18, 1
store i64 %19, i64* %3
br label %7
20: ; preds = %7
store i64 256, i64* %3
br label %21
21: ; preds = %31, %20
%22 = load i64, i64* %3
%23 = icmp ult i64 %22, 4096
br i1 %23, label %24, label %34
24: ; preds = %21
%25 = load i16*, i16** %5
%26 = load i64, i64* %3
%27 = getelementptr inbounds i16, i16* %25, i64 %26
%28 = load i16, i16* %27
%29 = load i16, i16* %4
%30 = call zeroext i16 @arc_crc_instruction(i16 zeroext %28, i16 zeroext %29, i32 32773)
store i16 %30, i16* %4
br label %31
31: ; preds = %24
%32 = load i64, i64* %3
%33 = add i64 %32, 1
store i64 %33, i64* %3
br label %21
34: ; preds = %21
%35 = load i16, i16* %4
ret i16 %35
}

LLVM IR (-O2):
define zeroext i16 @arc_a1h_crc_16(i16* nocapture %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i64 [ 0, %1 ], [ %8, %2 ]
%4 = phi i16 [ 0, %1 ], [ %7, %2 ]
%5 = getelementptr inbounds i16, i16* %0, i64 %3
%6 = load i16, i16* %5
%7 = tail call zeroext i16 @arc_crc_instruction(i16 zeroext %6, i16 zeroext %4, i32 32773)
%8 = add nuw nsw i64 %3, 1
%9 = icmp eq i64 %8, 216
br i1 %9, label %10, label %2
10: ; preds = %2, %10
%11 = phi i64 [ %16, %10 ], [ 256, %2 ]
%12 = phi i16 [ %15, %10 ], [ %7, %2 ]
%13 = getelementptr inbounds i16, i16* %0, i64 %11
%14 = load i16, i16* %13
%15 = tail call zeroext i16 @arc_crc_instruction(i16 zeroext %14, i16 zeroext %12, i32 32773)
%16 = add nuw nsw i64 %11, 1
%17 = icmp eq i64 %16, 4096
br i1 %17, label %18, label %10
18: ; preds = %10
ret i16 %15
}