xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ pic24_six(int, int /*<<< orphan*/);
void pic24_nvmcon_write_initiate(void) {
  pic24_six(0x200550, 0);
  pic24_six(0x883B30, 0);
  pic24_six(0x200AA0, 0);
  pic24_six(0x883B30, 0);
}


x86 assembly (clang, -O0):
<pic24_nvmcon_write_initiate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x200550,%edi
xor    %esi,%esi
call   1030 <pic24_six@plt>
mov    $0x883b30,%edi
xor    %esi,%esi
call   1030 <pic24_six@plt>
mov    $0x200aa0,%edi
xor    %esi,%esi
call   1030 <pic24_six@plt>
mov    $0x883b30,%edi
xor    %esi,%esi
call   1030 <pic24_six@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic24_nvmcon_write_initiate>:
push   %rax
mov    $0x200550,%edi
xor    %esi,%esi
call   1030 <pic24_six@plt>
mov    $0x883b30,%edi
xor    %esi,%esi
call   1030 <pic24_six@plt>
mov    $0x200aa0,%edi
xor    %esi,%esi
call   1030 <pic24_six@plt>
mov    $0x883b30,%edi
xor    %esi,%esi
pop    %rax
jmp    1030 <pic24_six@plt>

LLVM IR (-O0):
define void @pic24_nvmcon_write_initiate() {
%1 = call i32 @pic24_six(i32 2098512, i32 0)
%2 = call i32 @pic24_six(i32 8928048, i32 0)
%3 = call i32 @pic24_six(i32 2099872, i32 0)
%4 = call i32 @pic24_six(i32 8928048, i32 0)
ret void
}

LLVM IR (-O2):
define void @pic24_nvmcon_write_initiate() {
%1 = tail call i32 @pic24_six(i32 2098512, i32 0)
%2 = tail call i32 @pic24_six(i32 8928048, i32 0)
%3 = tail call i32 @pic24_six(i32 2099872, i32 0)
%4 = tail call i32 @pic24_six(i32 8928048, i32 0)
ret void
}
void rte(p, a, s) struct h8_opcode *p;
char *a;
int s;
{
  printf("reg[7]+=2;\n");
  printf("tmp = reg[7];\n");
  printf("reg[7]+=2;\n");
  printf("SET_CCR(tmp);\n");
  printf("npc = saved_state.mem + (WORD_MEM(tmp)>>1);\n");
}


x86 assembly (clang, -O0):
<rte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
lea    0xed6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xed4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xec7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xec8(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rte>:
push   %rbx
lea    0xef6(%rip),%rbx
mov    %rbx,%rdi
call   1030 <puts@plt>
lea    0xed9(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
lea    0xede(%rip),%rdi
call   1030 <puts@plt>
lea    0xee0(%rip),%rdi
pop    %rbx
jmp    1030 <puts@plt>

LLVM IR (-O0):
%struct.h8_opcode = type opaque
@.str = [12 x i8] c"reg[7]+=2;\0A\00"
@.str.1 = [15 x i8] c"tmp = reg[7];\0A\00"
@.str.2 = [15 x i8] c"SET_CCR(tmp);\0A\00"
@.str.3 = [45 x i8] c"npc = saved_state.mem + (WORD_MEM(tmp)>>1);\0A\00"
define void @rte(%struct.h8_opcode* %0, i8* %1, i32 %2) {
%4 = alloca %struct.h8_opcode*
%5 = alloca i8*
%6 = alloca i32
store %struct.h8_opcode* %0, %struct.h8_opcode** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0))
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.2, i64 0, i64 0))
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.h8_opcode = type opaque
@str.4 = [14 x i8] c"tmp = reg[7];\00"
@str.5 = [11 x i8] c"reg[7]+=2;\00"
@str.6 = [14 x i8] c"SET_CCR(tmp);\00"
@str.7 = [44 x i8] c"npc = saved_state.mem + (WORD_MEM(tmp)>>1);\00"
define void @rte(%struct.h8_opcode* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str.5, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.4, i64 0, i64 0))
%6 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str.5, i64 0, i64 0))
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str.6, i64 0, i64 0))
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @str.7, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void say_hello_to_jenkins_again(void) {
  printf("Hello Jenkins, glad to see you again 1...\n");
  printf("Hello Jenkins, glad to see you again 2...\n");
}


x86 assembly (clang, -O0):
<say_hello_to_jenkins_again>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf04(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<say_hello_to_jenkins_again>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf06(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"Hello Jenkins, glad to see you again 1...\0A\00"
@.str.1 = [43 x i8] c"Hello Jenkins, glad to see you again 2...\0A\00"
define void @say_hello_to_jenkins_again() {
%1 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [42 x i8] c"Hello Jenkins, glad to see you again 1...\00"
@str.2 = [42 x i8] c"Hello Jenkins, glad to see you again 2...\00"
define void @say_hello_to_jenkins_again() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str.2, i64 0, i64 0))
ret void
}
void UART_1_SCB_IRQ_Interrupt(void) {}


x86 assembly (clang, -O0):
<UART_1_SCB_IRQ_Interrupt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UART_1_SCB_IRQ_Interrupt>:
ret

LLVM IR (-O0):
define void @UART_1_SCB_IRQ_Interrupt() {
ret void
}

LLVM IR (-O2):
define void @UART_1_SCB_IRQ_Interrupt() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ap_str(char *);
void ap_quest() { ap_str("?"); }


x86 assembly (clang, -O0):
<ap_quest>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <ap_str@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ap_quest>:
lea    0xee9(%rip),%rdi
jmp    1030 <ap_str@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"?\00"
define void @ap_quest() {
%1 = call i32 @ap_str(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"?\00"
define void @ap_quest() {
%1 = tail call i32 @ap_str(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int SIGINT;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void signal_handler(int signo) {
  if (signo == SIGINT) {
    printf("caught SIGNINT, exit\n");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<signal_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2eb3(%rip),%rcx
cmp    (%rcx),%eax
jne    1153 <signal_handler+0x33>
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal_handler>:
push   %rax
mov    0x2ec0(%rip),%rax
cmp    %edi,(%rax)
je     112e <signal_handler+0xe>
pop    %rax
ret
lea    0xecb(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@SIGINT = global i32 0
@.str = [22 x i8] c"caught SIGNINT, exit\0A\00"
define void @signal_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGINT
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @exit(i32 1)
unreachable
9: ; preds = %1
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@str = [21 x i8] c"caught SIGNINT, exit\00"
define void @signal_handler(i32 %0) {
%2 = load i32, i32* @SIGINT
%3 = icmp eq i32 %2, %0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %1
ret void
}
void b(int x) { int z = x; }


x86 assembly (clang, -O0):
<b>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<b>:
ret

LLVM IR (-O0):
define void @b(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
ret void
}

LLVM IR (-O2):
define void @b(i32 %0) {
ret void
}
/* Variables and functions */
scalar_t__ isinf(float);
int __ocl_isinf_float(float src) { return isinf(src) ? 1 : 0; }


x86 assembly (clang, -O0):
<__ocl_isinf_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <isinf@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_isinf_float>:
push   %rax
call   1030 <isinf@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__ocl_isinf_float(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call i64 @isinf(float %3)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 1, i32 0
ret i32 %7
}

LLVM IR (-O2):
define i32 @__ocl_isinf_float(float %0) {
%2 = tail call i64 @isinf(float %0)
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
unsigned int calculateNeededElementCount(unsigned int currentCount,
                                         const unsigned int requested,
                                         const unsigned int maxGrowthCount) {
  while (currentCount < requested)
    if (currentCount < maxGrowthCount)
      currentCount = currentCount << 1;
    else
      currentCount = currentCount + maxGrowthCount;
  return currentCount;
}


x86 assembly (clang, -O0):
<calculateNeededElementCount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1141 <calculateNeededElementCount+0x41>
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jae    1133 <calculateNeededElementCount+0x33>
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    113c <calculateNeededElementCount+0x3c>
mov    -0x4(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110d <calculateNeededElementCount+0xd>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculateNeededElementCount>:
cmp    %esi,%edi
jae    1122 <calculateNeededElementCount+0x22>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    (%rdi,%rdi,1),%ecx
lea    (%rdi,%rdx,1),%eax
cmp    %edx,%edi
cmovb  %ecx,%eax
mov    %eax,%edi
cmp    %esi,%eax
jb     1110 <calculateNeededElementCount+0x10>
ret
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @calculateNeededElementCount(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
br label %7
7: ; preds = %22, %3
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = icmp ult i32 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %7
%12 = load i32, i32* %4
%13 = load i32, i32* %6
%14 = icmp ult i32 %12, %13
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, i32* %4
%17 = shl i32 %16, 1
store i32 %17, i32* %4
br label %22
18: ; preds = %11
%19 = load i32, i32* %4
%20 = load i32, i32* %6
%21 = add i32 %19, %20
store i32 %21, i32* %4
br label %22
22: ; preds = %18, %15
br label %7
23: ; preds = %7
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @calculateNeededElementCount(i32 %0, i32 %1, i32 %2) {
%4 = icmp ult i32 %0, %1
br i1 %4, label %5, label %12
5: ; preds = %3, %5
%6 = phi i32 [ %10, %5 ], [ %0, %3 ]
%7 = icmp ult i32 %6, %2
%8 = shl i32 %6, 1
%9 = add i32 %6, %2
%10 = select i1 %7, i32 %8, i32 %9
%11 = icmp ult i32 %10, %1
br i1 %11, label %5, label %12
12: ; preds = %5, %3
%13 = phi i32 [ %0, %3 ], [ %10, %5 ]
ret i32 %13
}
unsigned int do_system_call(int function_number, int p1, int p2, int p3, int p4,
                            int p5) {
  int return_value;
  __asm__ volatile("int $0x80"
                   : "=a"(return_value)
                   : "0"((long)(function_number)), "b"((long)(p1)),
                     "c"((long)(p2)), "d"((long)(p3)), "S"((long)(p4)),
                     "D"((long)(p5)));
  return return_value;
}


x86 assembly (clang, -O0):
<do_system_call>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
movslq -0xc(%rbp),%rax
movslq -0x10(%rbp),%rbx
movslq -0x14(%rbp),%rcx
movslq -0x18(%rbp),%rdx
movslq -0x1c(%rbp),%rsi
movslq -0x20(%rbp),%rdi
int    $0x80
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_system_call>:
push   %rbx
movslq %edi,%rax
movslq %esi,%rbx
movslq %edx,%r10
movslq %ecx,%rdx
movslq %r8d,%rsi
movslq %r9d,%rdi
mov    %r10,%rcx
int    $0x80
pop    %rbx
ret

LLVM IR (-O0):
define i32 @do_system_call(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = load i32, i32* %9
%19 = sext i32 %18 to i64
%20 = load i32, i32* %10
%21 = sext i32 %20 to i64
%22 = load i32, i32* %11
%23 = sext i32 %22 to i64
%24 = load i32, i32* %12
%25 = sext i32 %24 to i64
%26 = call i64 asm sideeffect "int $$0x80", "={ax},0,{bx},{cx},{dx},{si},{di},~{dirflag},~{fpsr},~{flags}"(i64 %15, i64 %17, i64 %19, i64 %21, i64 %23, i64 %25)
%27 = trunc i64 %26 to i32
store i32 %27, i32* %13
%28 = load i32, i32* %13
ret i32 %28
}

LLVM IR (-O2):
define i32 @do_system_call(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = sext i32 %0 to i64
%8 = sext i32 %1 to i64
%9 = sext i32 %2 to i64
%10 = sext i32 %3 to i64
%11 = sext i32 %4 to i64
%12 = sext i32 %5 to i64
%13 = tail call i64 asm sideeffect "int $$0x80", "={ax},0,{bx},{cx},{dx},{si},{di},~{dirflag},~{fpsr},~{flags}"(i64 %7, i64 %8, i64 %9, i64 %10, i64 %11, i64 %12)
%14 = trunc i64 %13 to i32
ret i32 %14
}
int test_imm_FCint64_highword_reg(long long val) {
  return ((val >> 32) & (0xFC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FCint64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0xfc,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FCint64_highword_reg>:
movabs $0xfc00000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FCint64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 252
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FCint64_highword_reg(i64 %0) {
%2 = and i64 %0, 1082331758592
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int raise(int sig) {
  (void)sig;
  puts("raise: not implemented");
  return 1;
}


x86 assembly (clang, -O0):
<raise>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<raise>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"raise: not implemented\00"
define i32 @raise(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @puts(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@.str = [23 x i8] c"raise: not implemented\00"
define i32 @raise(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
size_t SIZE_MAX;
int /*<<< orphan*/ abort();
size_t size_mul(size_t a, size_t b) {
  if (b > 1 && SIZE_MAX / b < a)
    abort();
  return a * b;
}


x86 assembly (clang, -O0):
<size_mul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x1,-0x10(%rbp)
jbe    114e <size_mul+0x3e>
mov    0x2ea6(%rip),%rax
mov    (%rax),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
cmp    -0x8(%rbp),%rax
jae    114e <size_mul+0x3e>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
imul   -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<size_mul>:
push   %rax
cmp    $0x2,%rsi
jb     1137 <size_mul+0x27>
mov    0x2eba(%rip),%rax
mov    (%rax),%rax
mov    %rax,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1140 <size_mul+0x30>
xor    %edx,%edx
div    %rsi
cmp    %rdi,%rax
jb     1149 <size_mul+0x39>
imul   %rdi,%rsi
mov    %rsi,%rax
pop    %rcx
ret
xor    %edx,%edx
div    %esi
cmp    %rdi,%rax
jae    1137 <size_mul+0x27>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@SIZE_MAX = global i64 0
define i64 @size_mul(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp ugt i64 %5, 1
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i64, i64* @SIZE_MAX
%9 = load i64, i64* %4
%10 = udiv i64 %8, %9
%11 = load i64, i64* %3
%12 = icmp ult i64 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %7
%14 = call i32 (...) @abort()
unreachable
15: ; preds = %7, %2
%16 = load i64, i64* %3
%17 = load i64, i64* %4
%18 = mul i64 %16, %17
ret i64 %18
}

LLVM IR (-O2):
@SIZE_MAX = global i64 0
define i64 @size_mul(i64 %0, i64 %1) {
%3 = icmp ugt i64 %1, 1
br i1 %3, label %4, label %10
4: ; preds = %2
%5 = load i64, i64* @SIZE_MAX
%6 = udiv i64 %5, %1
%7 = icmp ult i64 %6, %0
br i1 %7, label %8, label %10
8: ; preds = %4
%9 = tail call i32 (...) @abort()
unreachable
10: ; preds = %4, %2
%11 = mul i64 %1, %0
ret i64 %11
}
/* Variables and functions */
scalar_t__ strcmp(char *, char *);
int snoopy_genericregistry_getCount(char *regArray[]) {
  int i;
  i = 0;
  while (strcmp(regArray[i], "") != 0) {
    i++;
  }
  return i;
}


x86 assembly (clang, -O0):
<snoopy_genericregistry_getCount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
lea    0xeca(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     1153 <snoopy_genericregistry_getCount+0x43>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <snoopy_genericregistry_getCount+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<snoopy_genericregistry_getCount>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
mov    $0xffffffff,%ebp
lea    0xedd(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    (%rbx),%rdi
mov    %r14,%rsi
call   1030 <strcmp@plt>
add    $0x1,%ebp
add    $0x8,%rbx
test   %rax,%rax
jne    1130 <snoopy_genericregistry_getCount+0x20>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i32 @snoopy_genericregistry_getCount(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
%10 = call i64 @strcmp(i8* %9, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %4
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i32 @snoopy_genericregistry_getCount(i8** nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %8, %2 ], [ 0, %1 ]
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
%6 = tail call i64 @strcmp(i8* %5, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%7 = icmp eq i64 %6, 0
%8 = add nuw i64 %3, 1
br i1 %7, label %9, label %2
9: ; preds = %2
%10 = trunc i64 %3 to i32
ret i32 %10
}
unsigned long long encode_zig_zag64(signed long long n) {
  return (n << 1) ^ (n >> 63);
}


x86 assembly (clang, -O0):
<encode_zig_zag64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x1,%rax
mov    -0x8(%rbp),%rcx
sar    $0x3f,%rcx
xor    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<encode_zig_zag64>:
lea    (%rdi,%rdi,1),%rax
sar    $0x3f,%rdi
xor    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @encode_zig_zag64(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = shl i64 %3, 1
%5 = load i64, i64* %2
%6 = ashr i64 %5, 63
%7 = xor i64 %4, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @encode_zig_zag64(i64 %0) {
%2 = shl i64 %0, 1
%3 = ashr i64 %0, 63
%4 = xor i64 %2, %3
ret i64 %4
}
int check_hd_param(void) { return 0; }


x86 assembly (clang, -O0):
<check_hd_param>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_hd_param>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @check_hd_param() {
ret i32 0
}

LLVM IR (-O2):
define i32 @check_hd_param() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
void get_environment_variables(char *DATA_DIR, char *TEMP_DIR, char *CODE_DIR) {
  sprintf(DATA_DIR, "/data/kreiman");
  sprintf(TEMP_DIR, "/data/kreiman/temp");
  sprintf(CODE_DIR, "/cbcl/cbcl01/kreiman/life");
}


x86 assembly (clang, -O0):
<get_environment_variables>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed1(%rip),%rsi
call   1030 <sprintf@plt>
mov    -0x10(%rbp),%rdi
lea    0xecf(%rip),%rsi
call   1030 <sprintf@plt>
mov    -0x18(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_environment_variables>:
movabs $0x6e616d6965726b,%rax
mov    %rax,0x6(%rdi)
movabs $0x726b2f617461642f,%rax
2f 6b 72
mov    %rax,(%rdi)
movups 0xeec(%rip),%xmm0
movups %xmm0,(%rsi)
movl   $0x706d65,0xf(%rsi)
movups 0xef8(%rip),%xmm0
movups %xmm0,0xa(%rdx)
movups 0xee3(%rip),%xmm0
movups %xmm0,(%rdx)
ret

LLVM IR (-O0):
@.str = [14 x i8] c"/data/kreiman\00"
@.str.1 = [19 x i8] c"/data/kreiman/temp\00"
@.str.2 = [26 x i8] c"/cbcl/cbcl01/kreiman/life\00"
define void @get_environment_variables(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%9 = load i8*, i8** %5
%10 = call i32 @sprintf(i8* %9, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0))
%11 = load i8*, i8** %6
%12 = call i32 @sprintf(i8* %11, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"/data/kreiman\00"
@.str.1 = [19 x i8] c"/data/kreiman/temp\00"
@.str.2 = [26 x i8] c"/cbcl/cbcl01/kreiman/life\00"
define void @get_environment_variables(i8* nocapture writeonly %0, i8* nocapture writeonly %1, i8* nocapture writeonly %2) {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(14) %0, i8* align 1 dereferenceable(14) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i64 14, i1 false)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(19) %1, i8* align 1 dereferenceable(19) getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), i64 19, i1 false)
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(26) %2, i8* align 1 dereferenceable(26) getelementptr inbounds ([26 x i8], [26 x i8]* @.str.2, i64 0, i64 0), i64 26, i1 false)
ret void
}
int mem_read16(const unsigned char *p) {
  unsigned int r = 0;
  r |= (unsigned int)(*(p + 0));
  r |= (unsigned int)(*(p + 1)) << 8;
  return r;
}


x86 assembly (clang, -O0):
<mem_read16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%eax
shl    $0x8,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_read16>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @mem_read16(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = load i32, i32* %3
%9 = or i32 %8, %7
store i32 %9, i32* %3
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 8
%15 = load i32, i32* %3
%16 = or i32 %15, %14
store i32 %16, i32* %3
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
define i32 @mem_read16(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %3
ret i32 %8
}
/* Variables and functions */
int strtol(char const *, void *, int /*<<< orphan*/);
int atoi(const char *str) { return strtol(str, ((void *)0), 0); }


x86 assembly (clang, -O0):
<atoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
xor    %edx,%edx
call   1030 <strtol@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoi>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <strtol@plt>

LLVM IR (-O0):
define i32 @atoi(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strtol(i8* %3, i8* null, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @atoi(i8* nocapture %0) {
%2 = tail call i32 @strtol(i8* nocapture %0, i8* null, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ grtestmod_write(int, int);
report_end() {
  grtestmod_write(5, 1);
  return (0);
}


x86 assembly (clang, -O0):
<report_end>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
mov    $0x1,%esi
call   1030 <grtestmod_write@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<report_end>:
push   %rax
mov    $0x5,%edi
mov    $0x1,%esi
call   1030 <grtestmod_write@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @report_end() {
%1 = call i32 @grtestmod_write(i32 5, i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @report_end() {
%1 = tail call i32 @grtestmod_write(i32 5, i32 1)
ret i32 0
}
/* Variables and functions */
int rand();
double aleatoire(double min, double max) {
  double res = min;
  int alea = rand() % 10000;
  double norm = (double)alea / 10000.;
  return res + (max - min) * norm;
}


x86 assembly (clang, -O0):
<aleatoire>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x2710,%ecx
cltd
idiv   %ecx
mov    %edx,-0x1c(%rbp)
cvtsi2sdl -0x1c(%rbp),%xmm0
movsd  0xeb5(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x18(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  -0x28(%rbp),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aleatoire>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x68db8bad,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x2c,%rcx
add    %edx,%ecx
imul   $0x2710,%ecx,%ecx
sub    %ecx,%eax
xorps  %xmm1,%xmm1
cvtsi2sd %eax,%xmm1
divsd  0xeac(%rip),%xmm1
movsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm2
subsd  %xmm2,%xmm0
mulsd  %xmm1,%xmm0
addsd  %xmm2,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @aleatoire(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca i32
%7 = alloca double
store double %0, double* %3
store double %1, double* %4
%8 = load double, double* %3
store double %8, double* %5
%9 = call i32 (...) @rand()
%10 = srem i32 %9, 10000
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = sitofp i32 %11 to double
%13 = fdiv double %12, 1.000000e+04
store double %13, double* %7
%14 = load double, double* %5
%15 = load double, double* %4
%16 = load double, double* %3
%17 = fsub double %15, %16
%18 = load double, double* %7
%19 = call double @llvm.fmuladd.f64(double %17, double %18, double %14)
ret double %19
}

LLVM IR (-O2):
define double @aleatoire(double %0, double %1) {
%3 = tail call i32 (...) @rand()
%4 = srem i32 %3, 10000
%5 = sitofp i32 %4 to double
%6 = fdiv double %5, 1.000000e+04
%7 = fsub double %1, %0
%8 = tail call double @llvm.fmuladd.f64(double %7, double %6, double %0)
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ gen_call(char *);
int /*<<< orphan*/ gen_pop();
void gen_equal(void) {
  gen_pop();
  gen_call("cceq");
}


x86 assembly (clang, -O0):
<gen_equal>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <gen_pop@plt>
lea    0xece(%rip),%rdi
call   1040 <gen_call@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_equal>:
push   %rax
xor    %eax,%eax
call   1030 <gen_pop@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1040 <gen_call@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"cceq\00"
define void @gen_equal() {
%1 = call i32 (...) @gen_pop()
%2 = call i32 @gen_call(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"cceq\00"
define void @gen_equal() {
%1 = tail call i32 (...) @gen_pop()
%2 = tail call i32 @gen_call(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
unsigned bitScan_fun_short(short x) {
  unsigned r = 0;
  short s = (x & 0x8000);
  if (x == 0)
    return 15;
  while (((x <<= 1) & 0x8000) == s)
    ++r;
  return r;
}


x86 assembly (clang, -O0):
<bitScan_fun_short>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x6(%rbp)
movl   $0x0,-0xc(%rbp)
movswl -0x6(%rbp),%eax
and    $0x8000,%eax
mov    %ax,-0xe(%rbp)
movswl -0x6(%rbp),%eax
cmp    $0x0,%eax
jne    1138 <bitScan_fun_short+0x38>
movl   $0xf,-0x4(%rbp)
jmp    116e <bitScan_fun_short+0x6e>
jmp    113d <bitScan_fun_short+0x3d>
movswl -0x6(%rbp),%eax
shl    $0x1,%eax
mov    %ax,-0x6(%rbp)
cwtl
and    $0x8000,%eax
movswl -0xe(%rbp),%ecx
cmp    %ecx,%eax
jne    1168 <bitScan_fun_short+0x68>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113d <bitScan_fun_short+0x3d>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitScan_fun_short>:
test   %di,%di
je     1132 <bitScan_fun_short+0x32>
mov    %edi,%eax
and    $0x8000,%eax
movswl %ax,%ecx
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    %edi,%edi
mov    %edi,%edx
and    $0x8000,%edx
add    $0x1,%eax
cmp    %ecx,%edx
je     1120 <bitScan_fun_short+0x20>
ret
mov    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @bitScan_fun_short(i16 signext %0) {
%2 = alloca i32
%3 = alloca i16
%4 = alloca i32
%5 = alloca i16
store i16 %0, i16* %3
store i32 0, i32* %4
%6 = load i16, i16* %3
%7 = sext i16 %6 to i32
%8 = and i32 %7, 32768
%9 = trunc i32 %8 to i16
store i16 %9, i16* %5
%10 = load i16, i16* %3
%11 = sext i16 %10 to i32
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %1
store i32 15, i32* %2
br label %30
14: ; preds = %1
br label %15
15: ; preds = %25, %14
%16 = load i16, i16* %3
%17 = sext i16 %16 to i32
%18 = shl i32 %17, 1
%19 = trunc i32 %18 to i16
store i16 %19, i16* %3
%20 = sext i16 %19 to i32
%21 = and i32 %20, 32768
%22 = load i16, i16* %5
%23 = sext i16 %22 to i32
%24 = icmp eq i32 %21, %23
br i1 %24, label %25, label %28
25: ; preds = %15
%26 = load i32, i32* %4
%27 = add i32 %26, 1
store i32 %27, i32* %4
br label %15
28: ; preds = %15
%29 = load i32, i32* %4
store i32 %29, i32* %2
br label %30
30: ; preds = %28, %13
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @bitScan_fun_short(i16 signext %0) {
%2 = icmp eq i16 %0, 0
br i1 %2, label %14, label %3
3: ; preds = %1
%4 = and i16 %0, -32768
%5 = sext i16 %4 to i32
br label %6
6: ; preds = %6, %3
%7 = phi i16 [ %9, %6 ], [ %0, %3 ]
%8 = phi i32 [ %13, %6 ], [ 0, %3 ]
%9 = shl i16 %7, 1
%10 = and i16 %9, -32768
%11 = zext i16 %10 to i32
%12 = icmp eq i32 %11, %5
%13 = add i32 %8, 1
br i1 %12, label %6, label %14
14: ; preds = %6, %1
%15 = phi i32 [ 15, %1 ], [ %8, %6 ]
ret i32 %15
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ nios_pkt_8x64_unpack(int const *, int *, int *, int *,
                                        int /*<<< orphan*/ *);
void nios_pkt_8x64_resp_unpack(const uint8_t *buf, uint8_t *target, bool *write,
                               uint8_t *addr, uint64_t *data, bool *success) {
  nios_pkt_8x64_unpack(buf, target, write, addr, data);
  if ((buf[2] & (1 << 1)) != 0) {
    *success = true;
  } else {
    *success = false;
  }
}


x86 assembly (clang, -O0):
<nios_pkt_8x64_resp_unpack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
call   1030 <nios_pkt_8x64_unpack@plt>
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     116b <nios_pkt_8x64_resp_unpack+0x5b>
mov    -0x30(%rbp),%rax
movl   $0x1,(%rax)
jmp    1175 <nios_pkt_8x64_resp_unpack+0x65>
mov    -0x30(%rbp),%rax
movl   $0x0,(%rax)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nios_pkt_8x64_resp_unpack>:
push   %r14
push   %rbx
push   %rax
mov    %r9,%r14
mov    %rdi,%rbx
call   1030 <nios_pkt_8x64_unpack@plt>
mov    0x8(%rbx),%eax
shr    %eax
and    $0x1,%eax
mov    %eax,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @nios_pkt_8x64_resp_unpack(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4, i32* %5) {
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i32*
%12 = alloca i32*
store i32* %0, i32** %7
store i32* %1, i32** %8
store i32* %2, i32** %9
store i32* %3, i32** %10
store i32* %4, i32** %11
store i32* %5, i32** %12
%13 = load i32*, i32** %7
%14 = load i32*, i32** %8
%15 = load i32*, i32** %9
%16 = load i32*, i32** %10
%17 = load i32*, i32** %11
%18 = call i32 @nios_pkt_8x64_unpack(i32* %13, i32* %14, i32* %15, i32* %16, i32* %17)
%19 = load i32*, i32** %7
%20 = getelementptr inbounds i32, i32* %19, i64 2
%21 = load i32, i32* %20
%22 = and i32 %21, 2
%23 = icmp ne i32 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %6
%25 = load i32*, i32** %12
store i32 1, i32* %25
br label %28
26: ; preds = %6
%27 = load i32*, i32** %12
store i32 0, i32* %27
br label %28
28: ; preds = %26, %24
ret void
}

LLVM IR (-O2):
define void @nios_pkt_8x64_resp_unpack(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4, i32* nocapture writeonly %5) {
%7 = tail call i32 @nios_pkt_8x64_unpack(i32* %0, i32* %1, i32* %2, i32* %3, i32* %4)
%8 = getelementptr inbounds i32, i32* %0, i64 2
%9 = load i32, i32* %8
%10 = lshr i32 %9, 1
%11 = and i32 %10, 1
store i32 %11, i32* %5
ret void
}
void CRYPTO_get_ex_data(void) {}


x86 assembly (clang, -O0):
<CRYPTO_get_ex_data>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CRYPTO_get_ex_data>:
ret

LLVM IR (-O0):
define void @CRYPTO_get_ex_data() {
ret void
}

LLVM IR (-O2):
define void @CRYPTO_get_ex_data() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int fun_stub_base_0_stub() {
  printf("fun_stub_base_0_stub: \n");
  return 5;
}


x86 assembly (clang, -O0):
<fun_stub_base_0_stub>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_stub_base_0_stub>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x5,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"fun_stub_base_0_stub: \0A\00"
define i32 @fun_stub_base_0_stub() {
%1 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret i32 5
}

LLVM IR (-O2):
@str = [23 x i8] c"fun_stub_base_0_stub: \00"
define i32 @fun_stub_base_0_stub() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
ret i32 5
}
int smallerOf(int a, int b) { return (b > a) ? a : b; }


x86 assembly (clang, -O0):
<smallerOf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jle    1121 <smallerOf+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <smallerOf+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<smallerOf>:
mov    %esi,%eax
cmp    %edi,%esi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @smallerOf(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @smallerOf(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, %0
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *diminuto_pin_setup(int, int);
FILE *diminuto_pin_output(int pin) { return diminuto_pin_setup(pin, !0); }


x86 assembly (clang, -O0):
<diminuto_pin_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <diminuto_pin_setup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<diminuto_pin_output>:
mov    $0x1,%esi
jmp    1030 <diminuto_pin_setup@plt>

LLVM IR (-O0):
define i32* @diminuto_pin_output(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32* @diminuto_pin_setup(i32 %3, i32 1)
ret i32* %4
}

LLVM IR (-O2):
define i32* @diminuto_pin_output(i32 %0) {
%2 = tail call i32* @diminuto_pin_setup(i32 %0, i32 1)
ret i32* %2
}
/* Variables and functions */
int /*<<< orphan*/ ap_base64encode(char *, char *, int);
int ap_base64encode_len(int);
scalar_t__ malloc(int);
int strlen(char *);
char *b64_encode(char *buf, int len) {
  int elen;
  char *out;
  if (len == 0)
    len = strlen(buf);
  elen = ap_base64encode_len(len);
  out = (char *)malloc(sizeof(char) * (elen + 1));
  ap_base64encode(out, buf, len);
  return out;
}


x86 assembly (clang, -O0):
<b64_encode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1165 <b64_encode+0x25>
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1050 <ap_base64encode_len@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1060 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <ap_base64encode@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b64_encode>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%r14
test   %esi,%esi
jne    1157 <b64_encode+0x17>
mov    %r14,%rdi
call   1030 <strlen@plt>
mov    %eax,%ebp
mov    %ebp,%edi
call   1050 <ap_base64encode_len@plt>
lea    0x1(%rax),%edi
call   1060 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebp,%edx
call   1040 <ap_base64encode@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @b64_encode(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %2
%10 = load i8*, i8** %3
%11 = call i32 @strlen(i8* %10)
store i32 %11, i32* %4
br label %12
12: ; preds = %9, %2
%13 = load i32, i32* %4
%14 = call i32 @ap_base64encode_len(i32 %13)
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = add nsw i32 %15, 1
%17 = sext i32 %16 to i64
%18 = mul i64 1, %17
%19 = trunc i64 %18 to i32
%20 = call i64 @malloc(i32 %19)
%21 = inttoptr i64 %20 to i8*
store i8* %21, i8** %6
%22 = load i8*, i8** %6
%23 = load i8*, i8** %3
%24 = load i32, i32* %4
%25 = call i32 @ap_base64encode(i8* %22, i8* %23, i32 %24)
%26 = load i8*, i8** %6
ret i8* %26
}

LLVM IR (-O2):
define i8* @b64_encode(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @strlen(i8* %0)
br label %6
6: ; preds = %4, %2
%7 = phi i32 [ %5, %4 ], [ %1, %2 ]
%8 = tail call i32 @ap_base64encode_len(i32 %7)
%9 = add nsw i32 %8, 1
%10 = tail call i64 @malloc(i32 %9)
%11 = inttoptr i64 %10 to i8*
%12 = tail call i32 @ap_base64encode(i8* %11, i8* %0, i32 %7)
ret i8* %11
}
void g_unichar_isgraph() {}


x86 assembly (clang, -O0):
<g_unichar_isgraph>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_unichar_isgraph>:
ret

LLVM IR (-O0):
define void @g_unichar_isgraph() {
ret void
}

LLVM IR (-O2):
define void @g_unichar_isgraph() {
ret void
}
/* Variables and functions */
scalar_t__ __builtin_yn(int, double);
int /*<<< orphan*/ link_failure_builtin_yn();
void test_builtin_yn(int x, double d) {
  if (__builtin_yn(x, d) != __builtin_yn(x, d))
    link_failure_builtin_yn();
}


x86 assembly (clang, -O0):
<test_builtin_yn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    -0x4(%rbp),%edi
movsd  -0x10(%rbp),%xmm0
call   1040 <__builtin_yn@plt>
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%edi
movsd  -0x10(%rbp),%xmm0
call   1040 <__builtin_yn@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
je     1165 <test_builtin_yn+0x45>
mov    $0x0,%al
call   1030 <link_failure_builtin_yn@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_builtin_yn>:
push   %r14
push   %rbx
push   %rax
movsd  %xmm0,(%rsp)
mov    %edi,%ebx
call   1040 <__builtin_yn@plt>
mov    %rax,%r14
mov    %ebx,%edi
movsd  (%rsp),%xmm0
call   1040 <__builtin_yn@plt>
cmp    %rax,%r14
jne    114c <test_builtin_yn+0x2c>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <link_failure_builtin_yn@plt>

LLVM IR (-O0):
define void @test_builtin_yn(i32 %0, double %1) {
%3 = alloca i32
%4 = alloca double
store i32 %0, i32* %3
store double %1, double* %4
%5 = load i32, i32* %3
%6 = load double, double* %4
%7 = call i64 @__builtin_yn(i32 %5, double %6)
%8 = load i32, i32* %3
%9 = load double, double* %4
%10 = call i64 @__builtin_yn(i32 %8, double %9)
%11 = icmp ne i64 %7, %10
br i1 %11, label %12, label %14
12: ; preds = %2
%13 = call i32 (...) @link_failure_builtin_yn()
br label %14
14: ; preds = %12, %2
ret void
}

LLVM IR (-O2):
define void @test_builtin_yn(i32 %0, double %1) {
%3 = tail call i64 @__builtin_yn(i32 %0, double %1)
%4 = tail call i64 @__builtin_yn(i32 %0, double %1)
%5 = icmp eq i64 %3, %4
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 (...) @link_failure_builtin_yn()
br label %8
8: ; preds = %6, %2
ret void
}
int _CsvParser_delimiterIsAccepted(const char *delimiter) {
  char actualDelimiter = *delimiter;
  if (actualDelimiter == '\n' || actualDelimiter == '\r' ||
      actualDelimiter == '\0' || actualDelimiter == '\"') {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<_CsvParser_delimiterIsAccepted>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x11(%rbp)
movsbl -0x11(%rbp),%eax
cmp    $0xa,%eax
je     1145 <_CsvParser_delimiterIsAccepted+0x45>
movsbl -0x11(%rbp),%eax
cmp    $0xd,%eax
je     1145 <_CsvParser_delimiterIsAccepted+0x45>
movsbl -0x11(%rbp),%eax
cmp    $0x0,%eax
je     1145 <_CsvParser_delimiterIsAccepted+0x45>
movsbl -0x11(%rbp),%eax
cmp    $0x22,%eax
jne    1151 <_CsvParser_delimiterIsAccepted+0x51>
movl   $0x0,-0x4(%rbp)
jmp    1158 <_CsvParser_delimiterIsAccepted+0x58>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_CsvParser_delimiterIsAccepted>:
movzbl (%rdi),%ecx
cmp    $0x22,%rcx
ja     111c <_CsvParser_delimiterIsAccepted+0x1c>
xor    %eax,%eax
movabs $0x400002401,%rdx
bt     %rcx,%rdx
jae    111c <_CsvParser_delimiterIsAccepted+0x1c>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_CsvParser_delimiterIsAccepted(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
store i8 %6, i8* %4
%7 = load i8, i8* %4
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 10
br i1 %9, label %22, label %10
10: ; preds = %1
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 13
br i1 %13, label %22, label %14
14: ; preds = %10
%15 = load i8, i8* %4
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 0
br i1 %17, label %22, label %18
18: ; preds = %14
%19 = load i8, i8* %4
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 34
br i1 %21, label %22, label %23
22: ; preds = %18, %14, %10, %1
store i32 0, i32* %2
br label %24
23: ; preds = %18
store i32 1, i32* %2
br label %24
24: ; preds = %23, %22
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @_CsvParser_delimiterIsAccepted(i8* nocapture %0) {
%2 = load i8, i8* %0
switch i8 %2, label %3 [
i8 34, label %4
i8 13, label %4
i8 10, label %4
i8 0, label %4
]
3: ; preds = %1
br label %4
4: ; preds = %1, %1, %1, %1, %3
%5 = phi i32 [ 1, %3 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ]
ret i32 %5
}
int debug_init() { return 0; }


x86 assembly (clang, -O0):
<debug_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @debug_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @debug_init() {
ret i32 0
}
void gtk_file_filter_set_name() {}


x86 assembly (clang, -O0):
<gtk_file_filter_set_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_file_filter_set_name>:
ret

LLVM IR (-O0):
define void @gtk_file_filter_set_name() {
ret void
}

LLVM IR (-O2):
define void @gtk_file_filter_set_name() {
ret void
}
void __test__myiniconf__iniconf__test__() {}


x86 assembly (clang, -O0):
<__test__myiniconf__iniconf__test__>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test__myiniconf__iniconf__test__>:
ret

LLVM IR (-O0):
define void @__test__myiniconf__iniconf__test__() {
ret void
}

LLVM IR (-O2):
define void @__test__myiniconf__iniconf__test__() {
ret void
}