xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, char, char);
void print_hanoi(int ceil, char from, char to) {
  printf("no.%d disk, %c -> %c\n", ceil, from, to);
}


x86 assembly (clang, -O0):
<print_hanoi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %edi,-0x4(%rbp)
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x5(%rbp),%al
lea    0xecd(%rip),%rdi
movsbl %al,%edx
movsbl -0x6(%rbp),%ecx
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hanoi>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"no.%d disk, %c -> %c\0A\00"
define void @print_hanoi(i32 %0, i8 signext %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8
store i32 %0, i32* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i32, i32* %4
%8 = load i8, i8* %5
%9 = load i8, i8* %6
%10 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %7, i8 signext %8, i8 signext %9)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"no.%d disk, %c -> %c\0A\00"
define void @print_hanoi(i32 %0, i8 signext %1, i8 signext %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 %0, i8 signext %1, i8 signext %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
int /*<<< orphan*/ cfs_time_current();
int /*<<< orphan*/ cfs_time_seconds(int /*<<< orphan*/);
time_t cfs_time_current_sec(void) {
  return cfs_time_seconds(cfs_time_current());
}


x86 assembly (clang, -O0):
<cfs_time_current_sec>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <cfs_time_current@plt>
mov    %eax,%edi
call   1030 <cfs_time_seconds@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfs_time_current_sec>:
push   %rax
xor    %eax,%eax
call   1040 <cfs_time_current@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <cfs_time_seconds@plt>

LLVM IR (-O0):
define i32 @cfs_time_current_sec() {
%1 = call i32 (...) @cfs_time_current()
%2 = call i32 @cfs_time_seconds(i32 %1)
ret i32 %2
}

LLVM IR (-O2):
define i32 @cfs_time_current_sec() {
%1 = tail call i32 (...) @cfs_time_current()
%2 = tail call i32 @cfs_time_seconds(i32 %1)
ret i32 %2
}
const char *vde_chain_nm5_name_in(int i) {
  switch (i) {
  case 0:
    return "i0";
  case 1:
    return "i1";
  case 2:
    return "i2";
  case 3:
    return "i3";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<vde_chain_nm5_name_in>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %rax,-0x18(%rbp)
sub    $0x3,%rax
ja     116c <vde_chain_nm5_name_in+0x6c>
mov    -0x18(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
lea    0xedd(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1174 <vde_chain_nm5_name_in+0x74>
lea    0xed0(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1174 <vde_chain_nm5_name_in+0x74>
lea    0xec3(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1174 <vde_chain_nm5_name_in+0x74>
lea    0xeb6(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1174 <vde_chain_nm5_name_in+0x74>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vde_chain_nm5_name_in>:
cmp    $0x3,%edi
ja     1117 <vde_chain_nm5_name_in+0x17>
movslq %edi,%rax
lea    0xefd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"i0\00"
@.str.1 = [3 x i8] c"i1\00"
@.str.2 = [3 x i8] c"i2\00"
@.str.3 = [3 x i8] c"i3\00"
define i8* @vde_chain_nm5_name_in(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 3, label %8
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %10
6: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %10
7: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8** %2
br label %10
8: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.3, i64 0, i64 0), i8** %2
br label %10
9: ; preds = %1
store i8* null, i8** %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i8*, i8** %2
ret i8* %11
}

LLVM IR (-O2):
@.str = [3 x i8] c"i0\00"
@.str.1 = [3 x i8] c"i1\00"
@.str.2 = [3 x i8] c"i2\00"
@.str.3 = [3 x i8] c"i3\00"
@reltable.vde_chain_nm5_name_in = [4 x i32] [i32 trunc (i64 sub (i64 ptrtoint ([3 x i8]* @.str to i64), i64 ptrtoint ([4 x i32]* @reltable.vde_chain_nm5_name_in to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([3 x i8]* @.str.1 to i64), i64 ptrtoint ([4 x i32]* @reltable.vde_chain_nm5_name_in to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([3 x i8]* @.str.2 to i64), i64 ptrtoint ([4 x i32]* @reltable.vde_chain_nm5_name_in to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint ([3 x i8]* @.str.3 to i64), i64 ptrtoint ([4 x i32]* @reltable.vde_chain_nm5_name_in to i64)) to i32)]
define i8* @vde_chain_nm5_name_in(i32 %0) {
%2 = icmp ult i32 %0, 4
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = sext i32 %0 to i64
%5 = shl i64 %4, 2
%6 = call i8* @llvm.load.relative.i64(i8* bitcast ([4 x i32]* @reltable.vde_chain_nm5_name_in to i8*), i64 %5)
br label %7
7: ; preds = %1, %3
%8 = phi i8* [ %6, %3 ], [ null, %1 ]
ret i8* %8
}
/* Type definitions */
struct struct_def {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ v_bits(struct struct_def const *);
int /*<<< orphan*/ v_bytes(struct struct_def const *);
int s_fixed(const struct struct_def *s) { return !v_bytes(s) && !v_bits(s); }


x86 assembly (clang, -O0):
<s_fixed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <v_bytes@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    1159 <s_fixed+0x39>
mov    -0x8(%rbp),%rdi
call   1030 <v_bits@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_fixed>:
push   %rbx
mov    %rdi,%rbx
call   1040 <v_bytes@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
je     1133 <s_fixed+0x13>
pop    %rbx
ret
mov    %rbx,%rdi
call   1030 <v_bits@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
%struct.struct_def = type { i32 }
define i32 @s_fixed(%struct.struct_def* %0) {
%2 = alloca %struct.struct_def*
store %struct.struct_def* %0, %struct.struct_def** %2
%3 = load %struct.struct_def*, %struct.struct_def** %2
%4 = call i32 @v_bytes(%struct.struct_def* %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %1
%7 = load %struct.struct_def*, %struct.struct_def** %2
%8 = call i32 @v_bits(%struct.struct_def* %7)
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ false, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
%struct.struct_def = type { i32 }
define i32 @s_fixed(%struct.struct_def* %0) {
%2 = tail call i32 @v_bytes(%struct.struct_def* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i32 @v_bits(%struct.struct_def* %0)
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
unsigned short htons(unsigned short);
unsigned short sl_ntohs(unsigned short netshort) { return htons(netshort); }


x86 assembly (clang, -O0):
<sl_ntohs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edi
call   1030 <htons@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sl_ntohs>:
jmp    1030 <htons@plt>

LLVM IR (-O0):
define zeroext i16 @sl_ntohs(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = call zeroext i16 @htons(i16 zeroext %3)
ret i16 %4
}

LLVM IR (-O2):
define zeroext i16 @sl_ntohs(i16 zeroext %0) {
%2 = tail call zeroext i16 @htons(i16 zeroext %0)
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void get_flow_usage(void) {
  printf("get_flows table <num> min <id> max <id>\n");
}


x86 assembly (clang, -O0):
<get_flow_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_flow_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"get_flows table <num> min <id> max <id>\0A\00"
define void @get_flow_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [40 x i8] c"get_flows table <num> min <id> max <id>\00"
define void @get_flow_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([40 x i8], [40 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ myasmfunc(int);
int main(void) {
  int a = 10;
  myasmfunc(a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xa,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <myasmfunc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1030 <myasmfunc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 10, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @myasmfunc(i32 %2)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @myasmfunc(i32 10)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *, int, int);
int /*<<< orphan*/ stderr;
void usage(char *av0, int depth, int nthreads) {
  fprintf(stderr,
          "Usage: %s [-d <n>] [-n <n>] [-b] [-q] [-s <n>] <N>\n"
          " -d        parallel recursion depth, default %d\n"
          " -n        number of threads in pool, default %d\n",
          av0, depth, nthreads);
  abort();
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    0x2ea7(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
lea    0xeb3(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %edx,%r8d
mov    %esi,%ecx
mov    %rdi,%rdx
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xec7(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [149 x i8] c"Usage: %s [-d <n>] [-n <n>] [-b] [-q] [-s <n>] <N>\0A -d parallel recursion depth, default %d\0A -n number of threads in pool, default %d\0A\00"
define void @usage(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([149 x i8], [149 x i8]* @.str, i64 0, i64 0), i8* %8, i32 %9, i32 %10)
%12 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [149 x i8] c"Usage: %s [-d <n>] [-n <n>] [-b] [-q] [-s <n>] <N>\0A -d parallel recursion depth, default %d\0A -n number of threads in pool, default %d\0A\00"
define void @usage(i8* %0, i32 %1, i32 %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([149 x i8], [149 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1, i32 %2)
%6 = tail call i32 (...) @abort()
unreachable
}
int nvg__clampi(int a, int mn, int mx) {
  return a < mn ? mn : (a > mx ? mx : a);
}


x86 assembly (clang, -O0):
<nvg__clampi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1124 <nvg__clampi+0x24>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1147 <nvg__clampi+0x47>
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    113b <nvg__clampi+0x3b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1141 <nvg__clampi+0x41>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nvg__clampi>:
mov    %edx,%eax
cmp    %edx,%edi
cmovle %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @nvg__clampi(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i32, i32* %5
br label %22
12: ; preds = %3
%13 = load i32, i32* %4
%14 = load i32, i32* %6
%15 = icmp sgt i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load i32, i32* %6
br label %20
18: ; preds = %12
%19 = load i32, i32* %4
br label %20
20: ; preds = %18, %16
%21 = phi i32 [ %17, %16 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %10
%23 = phi i32 [ %11, %10 ], [ %21, %20 ]
ret i32 %23
}

LLVM IR (-O2):
define i32 @nvg__clampi(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %0, %1
%5 = icmp sgt i32 %0, %2
%6 = select i1 %5, i32 %2, i32 %0
%7 = select i1 %4, i32 %1, i32 %6
ret i32 %7
}
int c016(void) { return 0; }


x86 assembly (clang, -O0):
<c016>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c016>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c016() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c016() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
int main(void) {
  extern char **environ;
  char **env;
  for (env = environ; *env != NULL; env++)
    printf("%s\n", *env);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     116f <main+0x4f>
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x10(%rbp)
jmp    113d <main+0x1d>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    0x2ebd(%rip),%rax
mov    (%rax),%rbx
mov    (%rbx),%rsi
test   %rsi,%rsi
je     1164 <main+0x44>
add    $0x8,%rbx
lea    0xebf(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %r14,%rdi
call   1030 <printf@plt>
mov    (%rbx),%rsi
add    $0x8,%rbx
test   %rsi,%rsi
jne    1150 <main+0x30>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@environ = external global i8**
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8**
store i32 0, i32* %1
%3 = load i8**, i8*** @environ
store i8** %3, i8*** %2
br label %4
4: ; preds = %12, %0
%5 = load i8**, i8*** %2
%6 = load i8*, i8** %5
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %15
8: ; preds = %4
%9 = load i8**, i8*** %2
%10 = load i8*, i8** %9
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %10)
br label %12
12: ; preds = %8
%13 = load i8**, i8*** %2
%14 = getelementptr inbounds i8*, i8** %13, i32 1
store i8** %14, i8*** %2
br label %4
15: ; preds = %4
%16 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@environ = external global i8**
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = load i8**, i8*** @environ
%2 = load i8*, i8** %1
%3 = icmp eq i8* %2, null
br i1 %3, label %11, label %4
4: ; preds = %0, %4
%5 = phi i8* [ %9, %4 ], [ %2, %0 ]
%6 = phi i8** [ %8, %4 ], [ %1, %0 ]
%7 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %5)
%8 = getelementptr inbounds i8*, i8** %6, i64 1
%9 = load i8*, i8** %8
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %4
11: ; preds = %4, %0
%12 = tail call i32 @exit(i32 0)
unreachable
}
unsigned int test7(unsigned int g) { return (g & -2) | 1; }


x86 assembly (clang, -O0):
<test7>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfffffffe,%eax
or     $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test7>:
mov    %edi,%eax
or     $0x1,%eax
ret

LLVM IR (-O0):
define i32 @test7(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -2
%5 = or i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @test7(i32 %0) {
%2 = or i32 %0, 1
ret i32 %2
}
void pop_item(struct item **head_ref) { ; }


x86 assembly (clang, -O0):
<pop_item>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pop_item>:
ret

LLVM IR (-O0):
%struct.item = type opaque
define void @pop_item(%struct.item** %0) {
%2 = alloca %struct.item**
store %struct.item** %0, %struct.item*** %2
ret void
}

LLVM IR (-O2):
%struct.item = type opaque
define void @pop_item(%struct.item** nocapture %0) {
ret void
}
/* Variables and functions */
bool nrf51_errata_37(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_37>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_37>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_37() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_37() {
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t minutes_since_midnight(uint8_t hours, uint8_t minutes) {
  return ((hours * 60) + minutes);
}


x86 assembly (clang, -O0):
<minutes_since_midnight>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0x3c,-0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minutes_since_midnight>:
imul   $0x3c,%edi,%eax
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @minutes_since_midnight(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = mul nsw i32 %5, 60
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @minutes_since_midnight(i32 %0, i32 %1) {
%3 = mul nsw i32 %0, 60
%4 = add nsw i32 %3, %1
ret i32 %4
}
unsigned char encode_6bit(unsigned char c) {
  if (c >= '0' && c <= '9')
    return (c - '0') | 0x30;
  else if (c >= 'A' && c <= 'Z')
    return (c - 'A' + 1) | 0x40;
  else
    return 0xFF;
}


x86 assembly (clang, -O0):
<encode_6bit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
cmp    $0x30,%eax
jl     1136 <encode_6bit+0x36>
movzbl -0x2(%rbp),%eax
cmp    $0x39,%eax
jg     1136 <encode_6bit+0x36>
movzbl -0x2(%rbp),%eax
sub    $0x30,%eax
or     $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    1169 <encode_6bit+0x69>
movzbl -0x2(%rbp),%eax
cmp    $0x41,%eax
jl     1165 <encode_6bit+0x65>
movzbl -0x2(%rbp),%eax
cmp    $0x5a,%eax
jg     1165 <encode_6bit+0x65>
movzbl -0x2(%rbp),%eax
sub    $0x41,%eax
add    $0x1,%eax
or     $0x40,%eax
mov    %al,-0x1(%rbp)
jmp    1169 <encode_6bit+0x69>
movb   $0xff,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<encode_6bit>:
lea    -0x30(%rdi),%eax
cmp    $0x9,%al
ja     110a <encode_6bit+0xa>
or     $0x30,%al
ret
lea    -0x41(%rdi),%ecx
mov    $0xff,%al
cmp    $0x19,%cl
ja     111e <encode_6bit+0x1e>
add    $0xc0,%dil
or     $0x40,%dil
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @encode_6bit(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = sub nsw i32 %13, 48
%15 = or i32 %14, 48
%16 = trunc i32 %15 to i8
store i8 %16, i8* %2
br label %33
17: ; preds = %7, %1
%18 = load i8, i8* %3
%19 = zext i8 %18 to i32
%20 = icmp sge i32 %19, 65
br i1 %20, label %21, label %32
21: ; preds = %17
%22 = load i8, i8* %3
%23 = zext i8 %22 to i32
%24 = icmp sle i32 %23, 90
br i1 %24, label %25, label %32
25: ; preds = %21
%26 = load i8, i8* %3
%27 = zext i8 %26 to i32
%28 = sub nsw i32 %27, 65
%29 = add nsw i32 %28, 1
%30 = or i32 %29, 64
%31 = trunc i32 %30 to i8
store i8 %31, i8* %2
br label %33
32: ; preds = %21, %17
store i8 -1, i8* %2
br label %33
33: ; preds = %32, %25, %11
%34 = load i8, i8* %2
ret i8 %34
}

LLVM IR (-O2):
define zeroext i8 @encode_6bit(i8 zeroext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = or i8 %2, 48
br label %12
6: ; preds = %1
%7 = add i8 %0, -65
%8 = icmp ult i8 %7, 26
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = add nsw i8 %0, -64
%11 = or i8 %10, 64
br label %12
12: ; preds = %6, %9, %4
%13 = phi i8 [ %5, %4 ], [ %11, %9 ], [ -1, %6 ]
ret i8 %13
}
/* Type definitions */
struct line_map {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ linemap_macro_expansion_map_p(struct line_map const *);
const struct line_map *linemap_check_ordinary(const struct line_map *map) {
  ((void)(0 && (!linemap_macro_expansion_map_p(map))));
  return map;
}


x86 assembly (clang, -O0):
<linemap_check_ordinary>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<linemap_check_ordinary>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.line_map = type { i32 }
define %struct.line_map* @linemap_check_ordinary(%struct.line_map* %0) {
%2 = alloca %struct.line_map*
store %struct.line_map* %0, %struct.line_map** %2
%3 = load %struct.line_map*, %struct.line_map** %2
ret %struct.line_map* %3
}

LLVM IR (-O2):
%struct.line_map = type { i32 }
define %struct.line_map* @linemap_check_ordinary(%struct.line_map* readnone returned %0) {
ret %struct.line_map* %0
}
/* Variables and functions */
int /*<<< orphan*/ assem_debug(char *, unsigned int);
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ output_byte(int);
void emit_fucomip(unsigned int r) {
  assem_debug("fucomip %d\n", r);
  assert(r < 8);
  output_byte(0xdf);
  output_byte(0xe8 + r);
}


x86 assembly (clang, -O0):
<emit_fucomip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xebb(%rip),%rdi
call   1030 <assem_debug@plt>
cmpl   $0x8,-0x4(%rbp)
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    $0xdf,%edi
call   1040 <output_byte@plt>
mov    -0x4(%rbp),%edi
add    $0xe8,%edi
call   1040 <output_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_fucomip>:
push   %rbx
mov    %edi,%ebx
lea    0xec6(%rip),%rdi
mov    %ebx,%esi
call   1030 <assem_debug@plt>
xor    %edi,%edi
cmp    $0x8,%ebx
setb   %dil
call   1050 <assert@plt>
mov    $0xdf,%edi
call   1040 <output_byte@plt>
add    $0xe8,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <output_byte@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"fucomip %d\0A\00"
define void @emit_fucomip(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @assem_debug(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = icmp ult i32 %5, 8
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = call i32 @output_byte(i32 223)
%10 = load i32, i32* %2
%11 = add i32 232, %10
%12 = call i32 @output_byte(i32 %11)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"fucomip %d\0A\00"
define void @emit_fucomip(i32 %0) {
%2 = tail call i32 @assem_debug(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = icmp ult i32 %0, 8
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 @output_byte(i32 223)
%7 = add i32 %0, 232
%8 = tail call i32 @output_byte(i32 %7)
ret void
}
int test_imm_FAuint8_reg(unsigned char val) {
  return ((val) & (-0xFA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_FAuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff06,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_FAuint8_reg>:
test   $0x6,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_FAuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -250
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_FAuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 6
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ O_RDONLY;
int /*<<< orphan*/ R_OK;
int access(char const *, int /*<<< orphan*/);
int open(char const *, int /*<<< orphan*/);
int assign_read_fd(const char *path) {
  int rc = 0;
  rc = access(path, R_OK);
  if (rc)
    return -1;
  rc = open(path, O_RDONLY);
  return rc;
}


x86 assembly (clang, -O0):
<assign_read_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    0x2e9a(%rip),%rax
mov    (%rax),%esi
call   1040 <access@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     115e <assign_read_fd+0x3e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1179 <assign_read_fd+0x59>
mov    -0x10(%rbp),%rdi
mov    0x2e7f(%rip),%rax
mov    (%rax),%esi
call   1030 <open@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assign_read_fd>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
call   1040 <access@plt>
test   %eax,%eax
je     113d <assign_read_fd+0x1d>
mov    $0xffffffff,%eax
pop    %rbx
ret
mov    0x2ea4(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <open@plt>

LLVM IR (-O0):
@R_OK = global i32 0
@O_RDONLY = global i32 0
define i32 @assign_read_fd(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* @R_OK
%7 = call i32 @access(i8* %5, i32 %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %16
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i32, i32* @O_RDONLY
%14 = call i32 @open(i8* %12, i32 %13)
store i32 %14, i32* %4
%15 = load i32, i32* %4
store i32 %15, i32* %2
br label %16
16: ; preds = %11, %10
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
@R_OK = global i32 0
@O_RDONLY = global i32 0
define i32 @assign_read_fd(i8* nocapture %0) {
%2 = load i32, i32* @R_OK
%3 = tail call i32 @access(i8* %0, i32 %2)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* @O_RDONLY
%7 = tail call i32 @open(i8* %0, i32 %6)
br label %8
8: ; preds = %1, %5
%9 = phi i32 [ %7, %5 ], [ -1, %1 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ outw_local(unsigned short, int);
int /*<<< orphan*/ slow_down_io();
__attribute__((always_)) void outw_local_p(unsigned short value, int port) {
  outw_local(value, port);
  slow_down_io();
}


x86 assembly (clang, -O0):
<outw_local_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x2(%rbp),%ax
mov    -0x8(%rbp),%esi
movzwl %ax,%edi
call   1030 <outw_local@plt>
mov    $0x0,%al
call   1040 <slow_down_io@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outw_local_p>:
push   %rax
call   1030 <outw_local@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <slow_down_io@plt>

LLVM IR (-O0):
define void @outw_local_p(i16 zeroext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
store i16 %0, i16* %3
store i32 %1, i32* %4
%5 = load i16, i16* %3
%6 = load i32, i32* %4
%7 = call i32 @outw_local(i16 zeroext %5, i32 %6)
%8 = call i32 (...) @slow_down_io()
ret void
}

LLVM IR (-O2):
define void @outw_local_p(i16 zeroext %0, i32 %1) {
%3 = tail call i32 @outw_local(i16 zeroext %0, i32 %1)
%4 = tail call i32 (...) @slow_down_io()
ret void
}
/* Variables and functions */
double RAND_MAX;
double rand();
double frand(void) { return rand() / (RAND_MAX + 1.0); }


x86 assembly (clang, -O0):
<frand>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
movsd  0xedd(%rip),%xmm1
mov    0x2ebe(%rip),%rax
addsd  (%rax),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<frand>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
mov    0x2ec9(%rip),%rax
movsd  (%rax),%xmm1
addsd  0xed5(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define double @frand() {
%1 = call double (...) @rand()
%2 = load double, double* @RAND_MAX
%3 = fadd double %2, 1.000000e+00
%4 = fdiv double %1, %3
ret double %4
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define double @frand() {
%1 = tail call double (...) @rand()
%2 = load double, double* @RAND_MAX
%3 = fadd double %2, 1.000000e+00
%4 = fdiv double %1, %3
ret double %4
}
__attribute__((constructor)) void fb_ctor__objinfo(void) {
label$0:;
label$1:;
}


x86 assembly (clang, -O0):
<fb_ctor__objinfo>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <fb_ctor__objinfo+0x9>
jmp    110e <fb_ctor__objinfo+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fb_ctor__objinfo>:
ret

LLVM IR (-O0):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @fb_ctor__objinfo, i8* null }]
define void @fb_ctor__objinfo() {
br label %1
1: ; preds = %0
br label %2
2: ; preds = %1
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [0 x { i32, void ()*, i8* }] zeroinitializer
define void @fb_ctor__objinfo() {
ret void
}
/* Variables and functions */
scalar_t__ ft_strchr(char const *, int);
int ft_strichr(const char *s, int c) {
  return ((unsigned char *)ft_strchr(s, c) - (unsigned char *)s);
}


x86 assembly (clang, -O0):
<ft_strichr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <ft_strchr@plt>
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strichr>:
push   %rbx
mov    %rdi,%rbx
call   1030 <ft_strchr@plt>
sub    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ft_strichr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i64 @ft_strchr(i8* %5, i32 %6)
%8 = inttoptr i64 %7 to i8*
%9 = load i8*, i8** %3
%10 = ptrtoint i8* %8 to i64
%11 = ptrtoint i8* %9 to i64
%12 = sub i64 %10, %11
%13 = trunc i64 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @ft_strichr(i8* %0, i32 %1) {
%3 = tail call i64 @ft_strchr(i8* %0, i32 %1)
%4 = ptrtoint i8* %0 to i64
%5 = sub i64 %3, %4
%6 = trunc i64 %5 to i32
ret i32 %6
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int EOF;
int fgetc(int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
uint32_t bear_read() {
  int value = fgetc(stdin);
  if (value == EOF) {
    return -1;
  }
  return value;
}


x86 assembly (clang, -O0):
<bear_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
call   1030 <fgetc@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    0x2ead(%rip),%rcx
cmp    (%rcx),%eax
jne    1147 <bear_read+0x37>
movl   $0xffffffff,-0x4(%rbp)
jmp    114d <bear_read+0x3d>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bear_read>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <fgetc@plt>
mov    0x2eba(%rip),%rcx
cmp    (%rcx),%eax
mov    $0xffffffff,%ecx
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdin = global i32 0
@EOF = global i32 0
define i32 @bear_read() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* @stdin
%4 = call i32 @fgetc(i32 %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = load i32, i32* @EOF
%7 = icmp eq i32 %5, %6
br i1 %7, label %8, label %9
8: ; preds = %0
store i32 -1, i32* %1
br label %11
9: ; preds = %0
%10 = load i32, i32* %2
store i32 %10, i32* %1
br label %11
11: ; preds = %9, %8
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
@stdin = global i32 0
@EOF = global i32 0
define i32 @bear_read() {
%1 = load i32, i32* @stdin
%2 = tail call i32 @fgetc(i32 %1)
%3 = load i32, i32* @EOF
%4 = icmp eq i32 %2, %3
%5 = select i1 %4, i32 -1, i32 %2
ret i32 %5
}
void worker_wakeup() {}


x86 assembly (clang, -O0):
<worker_wakeup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<worker_wakeup>:
ret

LLVM IR (-O0):
define void @worker_wakeup() {
ret void
}

LLVM IR (-O2):
define void @worker_wakeup() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
void reg32_toggle_bits(volatile uint32_t *reg, uint32_t value) {
  *reg ^= value;
}


x86 assembly (clang, -O0):
<reg32_toggle_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
xor    %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg32_toggle_bits>:
mov    %esi,-0x4(%rsp)
mov    -0x4(%rsp),%eax
xor    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @reg32_toggle_bits(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store volatile i32 %1, i32* %4
%5 = load volatile i32, i32* %4
%6 = load i32*, i32** %3
%7 = load volatile i32, i32* %6
%8 = xor i32 %7, %5
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @reg32_toggle_bits(i32* %0, i32 %1) {
%3 = alloca i32
store volatile i32 %1, i32* %3
%4 = load volatile i32, i32* %3
%5 = load volatile i32, i32* %0
%6 = xor i32 %5, %4
store volatile i32 %6, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fabs(double const);
scalar_t__ pow(int /*<<< orphan*/, int);
double sqrt(scalar_t__);
double f_seal_MagnitudeOfVector(const double p_xComponent,
                                const double p_yComponent) {
  return sqrt(pow(fabs(p_xComponent), 2) + pow(fabs(p_yComponent), 2));
}


x86 assembly (clang, -O0):
<f_seal_MagnitudeOfVector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <fabs@plt>
mov    %eax,%edi
mov    $0x2,%esi
call   1040 <pow@plt>
mov    %rax,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <fabs@plt>
mov    %eax,%edi
mov    $0x2,%esi
call   1040 <pow@plt>
mov    -0x18(%rbp),%rdi
add    %rax,%rdi
call   1050 <sqrt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_seal_MagnitudeOfVector>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm1,0x8(%rsp)
call   1030 <fabs@plt>
mov    %eax,%edi
mov    $0x2,%esi
call   1040 <pow@plt>
mov    %rax,%rbx
movsd  0x8(%rsp),%xmm0
call   1030 <fabs@plt>
mov    %eax,%edi
mov    $0x2,%esi
call   1040 <pow@plt>
add    %rax,%rbx
mov    %rbx,%rdi
add    $0x10,%rsp
pop    %rbx
jmp    1050 <sqrt@plt>

LLVM IR (-O0):
define double @f_seal_MagnitudeOfVector(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = call i32 @fabs(double %5)
%7 = call i64 @pow(i32 %6, i32 2)
%8 = load double, double* %4
%9 = call i32 @fabs(double %8)
%10 = call i64 @pow(i32 %9, i32 2)
%11 = add nsw i64 %7, %10
%12 = call double @sqrt(i64 %11)
ret double %12
}

LLVM IR (-O2):
define double @f_seal_MagnitudeOfVector(double %0, double %1) {
%3 = tail call i32 @fabs(double %0)
%4 = tail call i64 @pow(i32 %3, i32 2)
%5 = tail call i32 @fabs(double %1)
%6 = tail call i64 @pow(i32 %5, i32 2)
%7 = add nsw i64 %6, %4
%8 = tail call double @sqrt(i64 %7)
ret double %8
}
/* Type definitions */
typedef scalar_t__ uint_fast8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int /*<<< orphan*/ IntDisable(scalar_t__);
int /*<<< orphan*/ IntUnregister(scalar_t__);
int _CANBaseValid(int /*<<< orphan*/);
scalar_t__ _CANIntNumberGet(int /*<<< orphan*/);
void CANIntUnregister(uint32_t ui32Base) {
  uint_fast8_t ui8IntNumber;
  ASSERT(_CANBaseValid(ui32Base));
  ui8IntNumber = _CANIntNumberGet(ui32Base);
  ASSERT(ui8IntNumber != 0);
  IntDisable(ui8IntNumber);
  IntUnregister(ui8IntNumber);
}


x86 assembly (clang, -O0):
<CANIntUnregister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <_CANBaseValid@plt>
mov    %eax,%edi
call   1060 <ASSERT@plt>
mov    -0x4(%rbp),%edi
call   1040 <_CANIntNumberGet@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1060 <ASSERT@plt>
mov    -0x10(%rbp),%rdi
call   1030 <IntDisable@plt>
mov    -0x10(%rbp),%rdi
call   1070 <IntUnregister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CANIntUnregister>:
push   %rbx
mov    %edi,%ebx
call   1050 <_CANBaseValid@plt>
mov    %eax,%edi
call   1060 <ASSERT@plt>
mov    %ebx,%edi
call   1040 <_CANIntNumberGet@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1060 <ASSERT@plt>
mov    %rbx,%rdi
call   1030 <IntDisable@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1070 <IntUnregister@plt>

LLVM IR (-O0):
define void @CANIntUnregister(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @_CANBaseValid(i32 %4)
%6 = call i32 @ASSERT(i32 %5)
%7 = load i32, i32* %2
%8 = call i64 @_CANIntNumberGet(i32 %7)
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i32
%12 = call i32 @ASSERT(i32 %11)
%13 = load i64, i64* %3
%14 = call i32 @IntDisable(i64 %13)
%15 = load i64, i64* %3
%16 = call i32 @IntUnregister(i64 %15)
ret void
}

LLVM IR (-O2):
define void @CANIntUnregister(i32 %0) {
%2 = tail call i32 @_CANBaseValid(i32 %0)
%3 = tail call i32 @ASSERT(i32 %2)
%4 = tail call i64 @_CANIntNumberGet(i32 %0)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
%7 = tail call i32 @ASSERT(i32 %6)
%8 = tail call i32 @IntDisable(i64 %4)
%9 = tail call i32 @IntUnregister(i64 %4)
ret void
}
/* Variables and functions */
int K_change_priority(int, int);
int /*<<< orphan*/ atomic(int);
int change_priority(int new_priority, int target_pid) {
  atomic(1);
  int ret = K_change_priority(new_priority, target_pid);
  atomic(0);
  return ret;
}


x86 assembly (clang, -O0):
<change_priority>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%edi
call   1040 <atomic@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <K_change_priority@plt>
mov    %eax,-0xc(%rbp)
xor    %edi,%edi
call   1040 <atomic@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<change_priority>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x1,%edi
call   1040 <atomic@plt>
mov    %ebp,%edi
mov    %ebx,%esi
call   1030 <K_change_priority@plt>
mov    %eax,%ebx
xor    %edi,%edi
call   1040 <atomic@plt>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @change_priority(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = call i32 @atomic(i32 1)
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 @K_change_priority(i32 %7, i32 %8)
store i32 %9, i32* %5
%10 = call i32 @atomic(i32 0)
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @change_priority(i32 %0, i32 %1) {
%3 = tail call i32 @atomic(i32 1)
%4 = tail call i32 @K_change_priority(i32 %0, i32 %1)
%5 = tail call i32 @atomic(i32 0)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fgetc(int /*<<< orphan*/ *);
int fgeti(FILE *f) {
  return (fgetc(f) + (fgetc(f) << 8) + (fgetc(f) << 16) + (fgetc(f) << 24));
}


x86 assembly (clang, -O0):
<fgeti>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
shl    $0x8,%ecx
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
shl    $0x10,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
shl    $0x18,%ecx
add    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgeti>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r15
call   1030 <fgetc@plt>
mov    %eax,%r14d
mov    %r15,%rdi
call   1030 <fgetc@plt>
mov    %eax,%ebp
shl    $0x8,%ebp
add    %r14d,%ebp
mov    %r15,%rdi
call   1030 <fgetc@plt>
mov    %eax,%ebx
shl    $0x10,%ebx
add    %ebp,%ebx
mov    %r15,%rdi
call   1030 <fgetc@plt>
shl    $0x18,%eax
add    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fgeti(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fgetc(i32* %3)
%5 = load i32*, i32** %2
%6 = call i32 @fgetc(i32* %5)
%7 = shl i32 %6, 8
%8 = add nsw i32 %4, %7
%9 = load i32*, i32** %2
%10 = call i32 @fgetc(i32* %9)
%11 = shl i32 %10, 16
%12 = add nsw i32 %8, %11
%13 = load i32*, i32** %2
%14 = call i32 @fgetc(i32* %13)
%15 = shl i32 %14, 24
%16 = add nsw i32 %12, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @fgeti(i32* nocapture %0) {
%2 = tail call i32 @fgetc(i32* %0)
%3 = tail call i32 @fgetc(i32* %0)
%4 = shl i32 %3, 8
%5 = add nsw i32 %4, %2
%6 = tail call i32 @fgetc(i32* %0)
%7 = shl i32 %6, 16
%8 = add nsw i32 %5, %7
%9 = tail call i32 @fgetc(i32* %0)
%10 = shl i32 %9, 24
%11 = add nsw i32 %8, %10
ret i32 %11
}
/* Variables and functions */
size_t packet_size_2fsk_rx() { return (0x00 << 8) + 0x7C; }


x86 assembly (clang, -O0):
<packet_size_2fsk_rx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<packet_size_2fsk_rx>:
mov    $0x7c,%eax
ret

LLVM IR (-O0):
define i64 @packet_size_2fsk_rx() {
ret i64 124
}

LLVM IR (-O2):
define i64 @packet_size_2fsk_rx() {
ret i64 124
}
void strength_test9(int *data) {
  int i = 0;
  do {
    data[data[2]] = i;
    i = i + 1;
  } while (21 * i < data[3]);
}


x86 assembly (clang, -O0):
<strength_test9>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
movslq 0x8(%rcx),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
imul   $0x15,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
cmp    0xc(%rcx),%eax
jl     110f <strength_test9+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<strength_test9>:
xor    %eax,%eax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movslq 0x8(%rdi),%rdx
mov    %ecx,(%rdi,%rdx,4)
add    $0x1,%ecx
add    $0x15,%eax
cmp    0xc(%rdi),%eax
jl     1110 <strength_test9+0x10>
ret

LLVM IR (-O0):
define void @strength_test9(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = load i32*, i32** %2
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 2
%9 = load i32, i32* %8
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %6, i64 %10
store i32 %5, i32* %11
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %4
%15 = load i32, i32* %3
%16 = mul nsw i32 21, %15
%17 = load i32*, i32** %2
%18 = getelementptr inbounds i32, i32* %17, i64 3
%19 = load i32, i32* %18
%20 = icmp slt i32 %16, %19
br i1 %20, label %4, label %21
21: ; preds = %14
ret void
}

LLVM IR (-O2):
define void @strength_test9(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = getelementptr inbounds i32, i32* %0, i64 3
br label %4
4: ; preds = %4, %1
%5 = phi i32 [ 0, %1 ], [ %9, %4 ]
%6 = load i32, i32* %2
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
store i32 %5, i32* %8
%9 = add nuw nsw i32 %5, 1
%10 = mul nsw i32 %9, 21
%11 = load i32, i32* %3
%12 = icmp slt i32 %10, %11
br i1 %12, label %4, label %13
13: ; preds = %4
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t umax(uint64_t u, uint64_t v) { return ((u ^ v) & -(u >= v)) ^ v; }


x86 assembly (clang, -O0):
<umax>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    -0x4(%rbp),%ecx
cmp    -0x8(%rbp),%ecx
setge  %cl
and    $0x1,%cl
movzbl %cl,%edx
xor    %ecx,%ecx
sub    %edx,%ecx
and    %ecx,%eax
xor    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umax>:
mov    %edi,%eax
cmp    %esi,%edi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @umax(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = icmp sge i32 %8, %9
%11 = zext i1 %10 to i32
%12 = sub nsw i32 0, %11
%13 = and i32 %7, %12
%14 = load i32, i32* %4
%15 = xor i32 %13, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @umax(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ R_ADC_Create();
int /*<<< orphan*/ R_ADC_Set_Operation_On();
char initAdc(void *parameters) {
  R_ADC_Create();
  R_ADC_Set_Operation_On();
  return 0;
}


x86 assembly (clang, -O0):
<initAdc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <R_ADC_Create@plt>
mov    $0x0,%al
call   1030 <R_ADC_Set_Operation_On@plt>
xor    %eax,%eax
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initAdc>:
push   %rax
xor    %eax,%eax
call   1040 <R_ADC_Create@plt>
xor    %eax,%eax
call   1030 <R_ADC_Set_Operation_On@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define signext i8 @initAdc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @R_ADC_Create()
%4 = call i32 (...) @R_ADC_Set_Operation_On()
ret i8 0
}

LLVM IR (-O2):
define signext i8 @initAdc(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @R_ADC_Create()
%3 = tail call i32 (...) @R_ADC_Set_Operation_On()
ret i8 0
}
/* Type definitions */
struct UPnPService {
  int dummy;
};
struct UPnPDevice {
  int dummy;
};

/* Variables and functions */
struct UPnPService *RNDGetService(struct UPnPDevice *, char *, int);
struct UPnPService *RNDGetService_AVTransport(struct UPnPDevice *device) {
  return (
      RNDGetService(device, "urn:schemas-upnp-org:service:AVTransport:1", 42));
}


x86 assembly (clang, -O0):
<RNDGetService_AVTransport>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
mov    $0x2a,%edx
call   1030 <RNDGetService@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RNDGetService_AVTransport>:
lea    0xee9(%rip),%rsi
mov    $0x2a,%edx
jmp    1030 <RNDGetService@plt>

LLVM IR (-O0):
%struct.UPnPService = type { i32 }
%struct.UPnPDevice = type { i32 }
@.str = [43 x i8] c"urn:schemas-upnp-org:service:AVTransport:1\00"
define %struct.UPnPService* @RNDGetService_AVTransport(%struct.UPnPDevice* %0) {
%2 = alloca %struct.UPnPDevice*
store %struct.UPnPDevice* %0, %struct.UPnPDevice** %2
%3 = load %struct.UPnPDevice*, %struct.UPnPDevice** %2
%4 = call %struct.UPnPService* @RNDGetService(%struct.UPnPDevice* %3, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i32 42)
ret %struct.UPnPService* %4
}

LLVM IR (-O2):
%struct.UPnPService = type { i32 }
%struct.UPnPDevice = type { i32 }
@.str = [43 x i8] c"urn:schemas-upnp-org:service:AVTransport:1\00"
define %struct.UPnPService* @RNDGetService_AVTransport(%struct.UPnPDevice* %0) {
%2 = tail call %struct.UPnPService* @RNDGetService(%struct.UPnPDevice* %0, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0), i32 42)
ret %struct.UPnPService* %2
}