xunge/DecIR huggingface dataset:
char *bar3(void *_printk, int a, char *c) {
  void (*ptr)(const char *fmt, ...);
  ptr = _printk;
  ptr("The attacking code just called printk! : "
      "With parameters passing \n");
  ptr(c);
  ptr("%d\n", a);
  return "Hello World!";
}


x86 assembly (clang, -O0):
<bar3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    0xede(%rip),%rdi
mov    $0x0,%al
call   *-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%rdi
mov    $0x0,%al
call   *%rcx
mov    -0x20(%rbp),%rcx
mov    -0xc(%rbp),%esi
lea    0xf02(%rip),%rdi
mov    $0x0,%al
call   *%rcx
lea    0xefb(%rip),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar3>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %esi,%r14d
mov    %rdi,%rbp
lea    0xeec(%rip),%rdi
xor    %eax,%eax
call   *%rbp
mov    %rbx,%rdi
xor    %eax,%eax
call   *%rbp
lea    0xf1d(%rip),%rdi
mov    %r14d,%esi
xor    %eax,%eax
call   *%rbp
lea    0xf13(%rip),%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [67 x i8] c"The attacking code just called printk! : With parameters passing \0A\00"
@.str.1 = [4 x i8] c"%d\0A\00"
@.str.2 = [13 x i8] c"Hello World!\00"
define i8* @bar3(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca void (i8*, ...)*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to void (i8*, ...)*
store void (i8*, ...)* %9, void (i8*, ...)** %7
%10 = load void (i8*, ...)*, void (i8*, ...)** %7
%11 = load void (i8*, ...)*, void (i8*, ...)** %7
%12 = load i8*, i8** %6
%13 = load void (i8*, ...)*, void (i8*, ...)** %7
%14 = load i32, i32* %5
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [67 x i8] c"The attacking code just called printk! : With parameters passing \0A\00"
@.str.1 = [4 x i8] c"%d\0A\00"
@.str.2 = [13 x i8] c"Hello World!\00"
define i8* @bar3(i8* nocapture %0, i32 %1, i8* %2) {
%4 = bitcast i8* %0 to void (i8*, ...)*
tail call void (i8*, ...) %4(i8* getelementptr inbounds ([67 x i8], [67 x i8]* @.str, i64 0, i64 0))
tail call void (i8*, ...) %4(i8* %2)
tail call void (i8*, ...) %4(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %1)
ret i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.2, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void help_help(void) {
  fputs("usage: unrez help [<command>]\n"
        "Print help for the unrez or an unrez command.\n",
        stdout);
}


x86 assembly (clang, -O0):
<help_help>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help_help>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
lea    0xee0(%rip),%rdi
jmp    1030 <fputs@plt>

LLVM IR (-O0):
@.str = [77 x i8] c"usage: unrez help [<command>]\0APrint help for the unrez or an unrez command.\0A\00"
@stdout = global i32 0
define void @help_help() {
%1 = load i32, i32* @stdout
%2 = call i32 @fputs(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [77 x i8] c"usage: unrez help [<command>]\0APrint help for the unrez or an unrez command.\0A\00"
@stdout = global i32 0
define void @help_help() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Type definitions */
struct cart {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _cartVarDbName(char *, char *);
int /*<<< orphan*/ cartSetBoolean(struct cart *, int /*<<< orphan*/, int);
void cartSetBooleanDb(struct cart *cart, char *db, char *var, int val) {
  cartSetBoolean(cart, _cartVarDbName(db, var), val);
}


x86 assembly (clang, -O0):
<cartSetBooleanDb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <_cartVarDbName@plt>
mov    -0x28(%rbp),%rdi
mov    %eax,%esi
mov    -0x1c(%rbp),%edx
call   1030 <cartSetBoolean@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cartSetBooleanDb>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %rdi,%rbx
mov    %rsi,%rdi
mov    %rdx,%rsi
call   1040 <_cartVarDbName@plt>
mov    %rbx,%rdi
mov    %eax,%esi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <cartSetBoolean@plt>

LLVM IR (-O0):
%struct.cart = type { i32 }
define void @cartSetBooleanDb(%struct.cart* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca %struct.cart*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store %struct.cart* %0, %struct.cart** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load %struct.cart*, %struct.cart** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = call i32 @_cartVarDbName(i8* %10, i8* %11)
%13 = load i32, i32* %8
%14 = call i32 @cartSetBoolean(%struct.cart* %9, i32 %12, i32 %13)
ret void
}

LLVM IR (-O2):
%struct.cart = type { i32 }
define void @cartSetBooleanDb(%struct.cart* %0, i8* %1, i8* %2, i32 %3) {
%5 = tail call i32 @_cartVarDbName(i8* %1, i8* %2)
%6 = tail call i32 @cartSetBoolean(%struct.cart* %0, i32 %5, i32 %3)
ret void
}
/* Variables and functions */
int spgat_standardize_cell(double **, double **, int *, int const, int const,
                           int const, double const, double);
int spg_standardize_cell(double lattice[3][3], double position[][3],
                         int types[], const int num_atom,
                         const int to_primitive, const int no_idealize,
                         const double symprec) {
  return spgat_standardize_cell(lattice, position, types, num_atom,
                                to_primitive, no_idealize, symprec, -1.0);
}


x86 assembly (clang, -O0):
<spg_standardize_cell>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
movsd  %xmm0,-0x30(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
mov    -0x24(%rbp),%r9d
movsd  -0x30(%rbp),%xmm0
movsd  0xea8(%rip),%xmm1
call   1030 <spgat_standardize_cell@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spg_standardize_cell>:
movsd  0xee8(%rip),%xmm1
jmp    1030 <spgat_standardize_cell@plt>

LLVM IR (-O0):
define i32 @spg_standardize_cell([3 x double]* %0, [3 x double]* %1, i32* %2, i32 %3, i32 %4, i32 %5, double %6) {
%8 = alloca [3 x double]*
%9 = alloca [3 x double]*
%10 = alloca i32*
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca double
store [3 x double]* %0, [3 x double]** %8
store [3 x double]* %1, [3 x double]** %9
store i32* %2, i32** %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store double %6, double* %14
%15 = load [3 x double]*, [3 x double]** %8
%16 = bitcast [3 x double]* %15 to double**
%17 = load [3 x double]*, [3 x double]** %9
%18 = bitcast [3 x double]* %17 to double**
%19 = load i32*, i32** %10
%20 = load i32, i32* %11
%21 = load i32, i32* %12
%22 = load i32, i32* %13
%23 = load double, double* %14
%24 = call i32 @spgat_standardize_cell(double** %16, double** %18, i32* %19, i32 %20, i32 %21, i32 %22, double %23, double -1.000000e+00)
ret i32 %24
}

LLVM IR (-O2):
define i32 @spg_standardize_cell([3 x double]* %0, [3 x double]* %1, i32* %2, i32 %3, i32 %4, i32 %5, double %6) {
%8 = bitcast [3 x double]* %0 to double**
%9 = bitcast [3 x double]* %1 to double**
%10 = tail call i32 @spgat_standardize_cell(double** %8, double** %9, i32* %2, i32 %3, i32 %4, i32 %5, double %6, double -1.000000e+00)
ret i32 %10
}
/* Variables and functions */
char *U_EMR_CORE5(int);
char *U_EMRENDPATH_set(void) { return (U_EMR_CORE5(60)); }


x86 assembly (clang, -O0):
<U_EMRENDPATH_set>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3c,%edi
call   1030 <U_EMR_CORE5@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRENDPATH_set>:
mov    $0x3c,%edi
jmp    1030 <U_EMR_CORE5@plt>

LLVM IR (-O0):
define i8* @U_EMRENDPATH_set() {
%1 = call i8* @U_EMR_CORE5(i32 60)
ret i8* %1
}

LLVM IR (-O2):
define i8* @U_EMRENDPATH_set() {
%1 = tail call i8* @U_EMR_CORE5(i32 60)
ret i8* %1
}
int test_imm_00uint32_mem(unsigned int *val) {
  return ((*val) & (0x00 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0xffffffd8,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_00uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 0
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_00uint32_mem(i32* nocapture readnone %0) {
ret i32 -40
}
/* Type definitions */
struct ipr_ioa {
  int dummy;
};

/* Variables and functions */
int ipr_get_saved_attr(struct ipr_ioa *, char *, char *, char *);
int /*<<< orphan*/ sprintf(char *, char *, char *);
int ipr_get_saved_ioa_attr(struct ipr_ioa *ioa, char *field, char *value) {
  char category[16];
  sprintf(category, "[%s]", "Adapter");
  return ipr_get_saved_attr(ioa, category, field, value);
}


x86 assembly (clang, -O0):
<ipr_get_saved_ioa_attr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x30(%rbp),%rdi
lea    0xec1(%rip),%rsi
lea    0xebf(%rip),%rdx
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
lea    -0x30(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <ipr_get_saved_attr@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipr_get_saved_ioa_attr>:
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x18,%rsp
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%rbx
lea    0xec5(%rip),%rsi
lea    0xec3(%rip),%rdx
mov    %rsp,%r12
mov    %r12,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
mov    %r12,%rsi
mov    %r15,%rdx
mov    %r14,%rcx
call   1030 <ipr_get_saved_attr@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.ipr_ioa = type { i32 }
@.str = [5 x i8] c"[%s]\00"
@.str.1 = [8 x i8] c"Adapter\00"
define i32 @ipr_get_saved_ioa_attr(%struct.ipr_ioa* %0, i8* %1, i8* %2) {
%4 = alloca %struct.ipr_ioa*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca [16 x i8]
store %struct.ipr_ioa* %0, %struct.ipr_ioa** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = getelementptr inbounds [16 x i8], [16 x i8]* %7, i64 0, i64 0
%9 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%10 = load %struct.ipr_ioa*, %struct.ipr_ioa** %4
%11 = getelementptr inbounds [16 x i8], [16 x i8]* %7, i64 0, i64 0
%12 = load i8*, i8** %5
%13 = load i8*, i8** %6
%14 = call i32 @ipr_get_saved_attr(%struct.ipr_ioa* %10, i8* %11, i8* %12, i8* %13)
ret i32 %14
}

LLVM IR (-O2):
%struct.ipr_ioa = type { i32 }
@.str = [5 x i8] c"[%s]\00"
@.str.1 = [8 x i8] c"Adapter\00"
define i32 @ipr_get_saved_ioa_attr(%struct.ipr_ioa* %0, i8* %1, i8* %2) {
%4 = alloca [16 x i8]
%5 = getelementptr inbounds [16 x i8], [16 x i8]* %4, i64 0, i64 0
%6 = call i32 @sprintf(i8* %5, i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%7 = call i32 @ipr_get_saved_attr(%struct.ipr_ioa* %0, i8* %5, i8* %1, i8* %2)
ret i32 %7
}
/* Type definitions */
typedef int uint8_t;
typedef scalar_t__ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ __wbeu64(int *, scalar_t__);
int i2c_transact(int, int, int *, int, int /*<<< orphan*/);
int i2c_write_beuint64(int fd, int chip_addr, int reg, uint64_t value) {
  uint8_t data[1 + sizeof(uint64_t)];
  data[0] = reg;
  __wbeu64(&data[1], (uint64_t)value);
  return i2c_transact(fd, chip_addr, data, 1 + sizeof(uint64_t), 0);
}


x86 assembly (clang, -O0):
<i2c_write_beuint64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x40(%rbp)
lea    -0x40(%rbp),%rdi
add    $0x4,%rdi
mov    -0x18(%rbp),%rsi
call   1030 <__wbeu64@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
lea    -0x40(%rbp),%rdx
mov    $0x9,%ecx
xor    %r8d,%r8d
call   1040 <i2c_transact@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_write_beuint64>:
push   %rbp
push   %rbx
sub    $0x28,%rsp
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edx,(%rsp)
lea    0x4(%rsp),%rdi
mov    %rcx,%rsi
call   1030 <__wbeu64@plt>
mov    %rsp,%rdx
mov    %ebp,%edi
mov    %ebx,%esi
mov    $0x9,%ecx
xor    %r8d,%r8d
call   1040 <i2c_transact@plt>
add    $0x28,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @i2c_write_beuint64(i32 %0, i32 %1, i32 %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i64
%9 = alloca [9 x i32]
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i64 %3, i64* %8
%10 = load i32, i32* %7
%11 = getelementptr inbounds [9 x i32], [9 x i32]* %9, i64 0, i64 0
store i32 %10, i32* %11
%12 = getelementptr inbounds [9 x i32], [9 x i32]* %9, i64 0, i64 1
%13 = load i64, i64* %8
%14 = call i32 @__wbeu64(i32* %12, i64 %13)
%15 = load i32, i32* %5
%16 = load i32, i32* %6
%17 = getelementptr inbounds [9 x i32], [9 x i32]* %9, i64 0, i64 0
%18 = call i32 @i2c_transact(i32 %15, i32 %16, i32* %17, i32 9, i32 0)
ret i32 %18
}

LLVM IR (-O2):
define i32 @i2c_write_beuint64(i32 %0, i32 %1, i32 %2, i64 %3) {
%5 = alloca [9 x i32]
%6 = bitcast [9 x i32]* %5 to i8*
%7 = getelementptr inbounds [9 x i32], [9 x i32]* %5, i64 0, i64 0
store i32 %2, i32* %7
%8 = getelementptr inbounds [9 x i32], [9 x i32]* %5, i64 0, i64 1
%9 = call i32 @__wbeu64(i32* %8, i64 %3)
%10 = call i32 @i2c_transact(i32 %0, i32 %1, i32* %7, i32 9, i32 0)
ret i32 %10
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t sys_get_be16(const uint8_t src[2]) {
  return ((uint16_t)src[0] << 8) | src[1];
}


x86 assembly (clang, -O0):
<sys_get_be16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
or     0x4(%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_get_be16>:
mov    (%rdi),%eax
shl    $0x8,%eax
or     0x4(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @sys_get_be16(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
%5 = load i32, i32* %4
%6 = shl i32 %5, 8
%7 = load i32*, i32** %2
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = or i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @sys_get_be16(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = shl i32 %2, 8
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = or i32 %3, %5
ret i32 %6
}
int main_lease_show(int argc, char **argv) {
  (void)argc, (void)argv;
  return 0;
}


x86 assembly (clang, -O0):
<main_lease_show>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main_lease_show>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main_lease_show(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i8**, i8*** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main_lease_show(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Type definitions */
struct vec4 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vec4_multiply(float *, float *, float *);
__attribute__((always_)) struct vec4 *
psvec4_multiply(struct vec4 *result, struct vec4 *a, struct vec4 *b) {
  vec4_multiply((float *)result, (float *)a, (float *)b);
  return result;
}


x86 assembly (clang, -O0):
<psvec4_multiply>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <vec4_multiply@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec4_multiply>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec4_multiply@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec4 = type { i32 }
define %struct.vec4* @psvec4_multiply(%struct.vec4* %0, %struct.vec4* %1, %struct.vec4* %2) {
%4 = alloca %struct.vec4*
%5 = alloca %struct.vec4*
%6 = alloca %struct.vec4*
store %struct.vec4* %0, %struct.vec4** %4
store %struct.vec4* %1, %struct.vec4** %5
store %struct.vec4* %2, %struct.vec4** %6
%7 = load %struct.vec4*, %struct.vec4** %4
%8 = bitcast %struct.vec4* %7 to float*
%9 = load %struct.vec4*, %struct.vec4** %5
%10 = bitcast %struct.vec4* %9 to float*
%11 = load %struct.vec4*, %struct.vec4** %6
%12 = bitcast %struct.vec4* %11 to float*
%13 = call i32 @vec4_multiply(float* %8, float* %10, float* %12)
%14 = load %struct.vec4*, %struct.vec4** %4
ret %struct.vec4* %14
}

LLVM IR (-O2):
%struct.vec4 = type { i32 }
define %struct.vec4* @psvec4_multiply(%struct.vec4* returned %0, %struct.vec4* %1, %struct.vec4* %2) {
%4 = bitcast %struct.vec4* %0 to float*
%5 = bitcast %struct.vec4* %1 to float*
%6 = bitcast %struct.vec4* %2 to float*
%7 = tail call i32 @vec4_multiply(float* %4, float* %5, float* %6)
ret %struct.vec4* %0
}
int fun606() { return 606; }


x86 assembly (clang, -O0):
<fun606>:
push   %rbp
mov    %rsp,%rbp
mov    $0x25e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun606>:
mov    $0x25e,%eax
ret

LLVM IR (-O0):
define i32 @fun606() {
ret i32 606
}

LLVM IR (-O2):
define i32 @fun606() {
ret i32 606
}
/* Type definitions */
struct in_addr {
  int /*<<< orphan*/ s_addr;
};
typedef int /*<<< orphan*/ in_addr_t;

/* Variables and functions */
int /*<<< orphan*/ ETHER_MAP_IP_MULTICAST(struct in_addr *, unsigned char *);
void ether_mtoe(in_addr_t addr, unsigned char *ea) {
  struct in_addr in = {.s_addr = addr};
  ETHER_MAP_IP_MULTICAST(&in, ea);
}


x86 assembly (clang, -O0):
<ether_mtoe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdi
call   1030 <ETHER_MAP_IP_MULTICAST@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ether_mtoe>:
push   %rax
mov    %edi,(%rsp)
mov    %rsp,%rdi
call   1030 <ETHER_MAP_IP_MULTICAST@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.in_addr = type { i32 }
define void @ether_mtoe(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca %struct.in_addr
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %5, i32 0, i32 0
%7 = load i32, i32* %3
store i32 %7, i32* %6
%8 = load i8*, i8** %4
%9 = call i32 @ETHER_MAP_IP_MULTICAST(%struct.in_addr* %5, i8* %8)
ret void
}

LLVM IR (-O2):
%struct.in_addr = type { i32 }
define void @ether_mtoe(i32 %0, i8* %1) {
%3 = alloca %struct.in_addr
%4 = bitcast %struct.in_addr* %3 to i8*
%5 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %3, i64 0, i32 0
store i32 %0, i32* %5
%6 = call i32 @ETHER_MAP_IP_MULTICAST(%struct.in_addr* %3, i8* %1)
ret void
}
int DB_EndReadWords_Native(void *db) { return 0; }


x86 assembly (clang, -O0):
<DB_EndReadWords_Native>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DB_EndReadWords_Native>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @DB_EndReadWords_Native(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @DB_EndReadWords_Native(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ benchmark_blocks(int, int);
int main(int argc, char **argv) {
  benchmark_blocks(1024, 1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x400,%edi
mov    $0x1,%esi
call   1030 <benchmark_blocks@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x400,%edi
mov    $0x1,%esi
call   1030 <benchmark_blocks@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @benchmark_blocks(i32 1024, i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @benchmark_blocks(i32 1024, i32 1)
ret i32 0
}
/* Variables and functions */
int atoi(char *);
int integrity_match_chassis(char *chassis_name, int chassis_num) {
  return !(atoi(chassis_name) == chassis_num);
}


x86 assembly (clang, -O0):
<integrity_match_chassis>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atoi@plt>
cmp    -0xc(%rbp),%eax
sete   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<integrity_match_chassis>:
push   %rbx
mov    %esi,%ebx
call   1030 <atoi@plt>
xor    %ecx,%ecx
cmp    %ebx,%eax
setne  %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @integrity_match_chassis(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @atoi(i8* %5)
%7 = load i32, i32* %4
%8 = icmp eq i32 %6, %7
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @integrity_match_chassis(i8* nocapture %0, i32 %1) {
%3 = tail call i32 @atoi(i8* %0)
%4 = icmp ne i32 %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
void free_array(char **din_array) {
  char **orig = din_array;
  for (; *din_array; din_array++)
    free(*din_array);
  free(orig);
}


x86 assembly (clang, -O0):
<free_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     114f <free_array+0x3f>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x8(%rbp)
jmp    1124 <free_array+0x14>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_array>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1141 <free_array+0x31>
lea    0x8(%r14),%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1130 <free_array+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_array(i8** %0) {
%2 = alloca i8**
%3 = alloca i8**
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
store i8** %4, i8*** %3
br label %5
5: ; preds = %12, %1
%6 = load i8**, i8*** %2
%7 = load i8*, i8** %6
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %15
9: ; preds = %5
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
br label %12
12: ; preds = %9
%13 = load i8**, i8*** %2
%14 = getelementptr inbounds i8*, i8** %13, i32 1
store i8** %14, i8*** %2
br label %5
15: ; preds = %5
%16 = load i8**, i8*** %3
%17 = bitcast i8** %16 to i8*
ret void
}

LLVM IR (-O2):
define void @free_array(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %10, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %8, %4 ], [ %2, %1 ]
%6 = phi i8** [ %7, %4 ], [ %0, %1 ]
tail call void @free(i8* %5)
%7 = getelementptr inbounds i8*, i8** %6, i64 1
%8 = load i8*, i8** %7
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %4
10: ; preds = %4, %1
%11 = bitcast i8** %0 to i8*
tail call void @free(i8* %11)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *, int);
void compResults(char *string, int rc) {
  if (rc) {
    printf("Error on : %s, rc=%d", string, rc);
    exit(EXIT_FAILURE);
  }
  return;
}


x86 assembly (clang, -O0):
<compResults>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     115a <compResults+0x3a>
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e8d(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compResults>:
mov    %esi,%edx
test   %esi,%esi
jne    1127 <compResults+0x7>
ret
push   %rax
mov    %rdi,%rsi
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"Error on : %s, rc=%d\00"
@EXIT_FAILURE = global i32 0
define void @compResults(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %2
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %8, i32 %9)
%11 = load i32, i32* @EXIT_FAILURE
%12 = call i32 @exit(i32 %11)
unreachable
13: ; preds = %2
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c"Error on : %s, rc=%d\00"
@EXIT_FAILURE = global i32 0
define void @compResults(i8* %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = tail call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
8: ; preds = %2
ret void
}
/* Variables and functions */
int sub(int, int);
int main() {
  int a;
  int b = 1;
  int c = 2;
  int d = 3;
  a = 10 / 2;
  c = (b + 3) * 4 - 5;
  b = sub(10, 8);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0xc(%rbp)
movl   $0x2,-0x10(%rbp)
movl   $0x3,-0x14(%rbp)
movl   $0x5,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x3,%eax
shl    $0x2,%eax
sub    $0x5,%eax
mov    %eax,-0x10(%rbp)
mov    $0xa,%edi
mov    $0x8,%esi
call   1030 <sub@plt>
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
mov    $0x8,%esi
call   1030 <sub@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %3
store i32 2, i32* %4
store i32 3, i32* %5
store i32 5, i32* %2
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 3
%8 = mul nsw i32 %7, 4
%9 = sub nsw i32 %8, 5
store i32 %9, i32* %4
%10 = call i32 @sub(i32 10, i32 8)
store i32 %10, i32* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @sub(i32 10, i32 8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ cm_accent_generic(int, int, int, char *, char, int, char *);
void cm_accent_umlaut(int arg, int start, int end) {
  cm_accent_generic(arg, start, end, "aouAOUEeIiy", '"', 1, "uml");
}


x86 assembly (clang, -O0):
<cm_accent_umlaut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xecf(%rip),%rcx
mov    $0x22,%r8d
mov    $0x1,%r9d
lea    0xec8(%rip),%rax
mov    %rax,(%rsp)
call   1030 <cm_accent_generic@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cm_accent_umlaut>:
push   %rax
lea    0xef4(%rip),%rax
mov    %rax,(%rsp)
lea    0xedd(%rip),%rcx
mov    $0x22,%r8d
mov    $0x1,%r9d
call   1030 <cm_accent_generic@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [12 x i8] c"aouAOUEeIiy\00"
@.str.1 = [4 x i8] c"uml\00"
define void @cm_accent_umlaut(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @cm_accent_generic(i32 %7, i32 %8, i32 %9, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext 34, i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"aouAOUEeIiy\00"
@.str.1 = [4 x i8] c"uml\00"
define void @cm_accent_umlaut(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @cm_accent_generic(i32 %0, i32 %1, i32 %2, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext 34, i32 1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ t();
main() {
  int i;
  for (i = 0; i < 1000; i++)
    t();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x3e8,-0x8(%rbp)
jge    1148 <main+0x38>
mov    $0x0,%al
call   1030 <t@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x3e8,%ebx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <t@plt>
add    $0xffffffff,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %8, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 1000
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 (...) @t()
br label %8
8: ; preds = %6
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 (...) @t()
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 1000
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
int cs_diag(int i, int j, double aij, void *other) {
  (void)aij;
  (void)other;
  return (i != j);
}


x86 assembly (clang, -O0):
<cs_diag>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cs_diag>:
xor    %eax,%eax
cmp    %esi,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @cs_diag(i32 %0, i32 %1, double %2, i8* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca double
%8 = alloca i8*
store i32 %0, i32* %5
store i32 %1, i32* %6
store double %2, double* %7
store i8* %3, i8** %8
%9 = load double, double* %7
%10 = load i8*, i8** %8
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = icmp ne i32 %11, %12
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @cs_diag(i32 %0, i32 %1, double %2, i8* nocapture readnone %3) {
%5 = icmp ne i32 %0, %1
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
scalar_t__ bar(int);
scalar_t__ foo(int);
int main() {
  volatile int a = 0;
  a += foo(100);
  a += bar(100);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    $0x64,%edi
call   1040 <foo@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%eax
cltq
add    %rcx,%rax
mov    %eax,-0x8(%rbp)
mov    $0x64,%edi
call   1030 <bar@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%eax
cltq
add    %rcx,%rax
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x0,0x4(%rsp)
mov    $0x64,%edi
call   1040 <foo@plt>
add    %eax,0x4(%rsp)
mov    $0x64,%edi
call   1030 <bar@plt>
add    %eax,0x4(%rsp)
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store volatile i32 0, i32* %2
%3 = call i64 @foo(i32 100)
%4 = load volatile i32, i32* %2
%5 = sext i32 %4 to i64
%6 = add nsw i64 %5, %3
%7 = trunc i64 %6 to i32
store volatile i32 %7, i32* %2
%8 = call i64 @bar(i32 100)
%9 = load volatile i32, i32* %2
%10 = sext i32 %9 to i64
%11 = add nsw i64 %10, %8
%12 = trunc i64 %11 to i32
store volatile i32 %12, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store volatile i32 0, i32* %1
%3 = tail call i64 @foo(i32 100)
%4 = load volatile i32, i32* %1
%5 = trunc i64 %3 to i32
%6 = add i32 %4, %5
store volatile i32 %6, i32* %1
%7 = tail call i64 @bar(i32 100)
%8 = load volatile i32, i32* %1
%9 = trunc i64 %7 to i32
%10 = add i32 %8, %9
store volatile i32 %10, i32* %1
ret i32 0
}
int test_imm_39uint8_reg(unsigned char val) {
  return ((val) & (0x39 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_39uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0x39,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_39uint8_reg>:
test   $0x39,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_39uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, 57
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_39uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 57
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ target_function();
int main(int argc, const char *argv[]) {
  target_function();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <target_function@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <target_function@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @target_function()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @target_function()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ varcmp(char const *, char const *);
int varequal(const char *a, const char *b) { return !varcmp(a, b); }


x86 assembly (clang, -O0):
<varequal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <varcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<varequal>:
push   %rax
call   1030 <varcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @varequal(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @varcmp(i8* %5, i8* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @varequal(i8* %0, i8* %1) {
%3 = tail call i32 @varcmp(i8* %0, i8* %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ ndisplays;
  int /*<<< orphan*/ *cur;
  int /*<<< orphan*/ *head;
};
typedef TYPE_1__ XExtensionInfo;

/* Variables and functions */
scalar_t__ Xmalloc(int);
XExtensionInfo *XextCreateExtension() {
  register XExtensionInfo *info =
      (XExtensionInfo *)Xmalloc(sizeof(XExtensionInfo));
  if (info) {
    info->head = NULL;
    info->cur = NULL;
    info->ndisplays = 0;
  }
  return info;
}


x86 assembly (clang, -O0):
<XextCreateExtension>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x18,%edi
call   1030 <Xmalloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1154 <XextCreateExtension+0x44>
mov    -0x8(%rbp),%rax
movq   $0x0,0x10(%rax)
mov    -0x8(%rbp),%rax
movq   $0x0,0x8(%rax)
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XextCreateExtension>:
push   %rax
mov    $0x18,%edi
call   1030 <Xmalloc@plt>
test   %rax,%rax
je     112e <XextCreateExtension+0x1e>
xorps  %xmm0,%xmm0
movups %xmm0,(%rax)
movq   $0x0,0x10(%rax)
pop    %rcx
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i64, i32*, i32* }
define %struct.TYPE_3__* @XextCreateExtension() {
%1 = alloca %struct.TYPE_3__*
%2 = call i64 @Xmalloc(i32 24)
%3 = inttoptr i64 %2 to %struct.TYPE_3__*
store %struct.TYPE_3__* %3, %struct.TYPE_3__** %1
%4 = load %struct.TYPE_3__*, %struct.TYPE_3__** %1
%5 = icmp ne %struct.TYPE_3__* %4, null
br i1 %5, label %6, label %13
6: ; preds = %0
%7 = load %struct.TYPE_3__*, %struct.TYPE_3__** %1
%8 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %7, i32 0, i32 2
store i32* null, i32** %8
%9 = load %struct.TYPE_3__*, %struct.TYPE_3__** %1
%10 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %9, i32 0, i32 1
store i32* null, i32** %10
%11 = load %struct.TYPE_3__*, %struct.TYPE_3__** %1
%12 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %11, i32 0, i32 0
store i64 0, i64* %12
br label %13
13: ; preds = %6, %0
%14 = load %struct.TYPE_3__*, %struct.TYPE_3__** %1
ret %struct.TYPE_3__* %14
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i64, i32*, i32* }
define %struct.TYPE_3__* @XextCreateExtension() {
%1 = tail call i64 @Xmalloc(i32 24)
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = inttoptr i64 %1 to i8*
br label %5
5: ; preds = %3, %0
%6 = inttoptr i64 %1 to %struct.TYPE_3__*
ret %struct.TYPE_3__* %6
}
/* Variables and functions */
size_t alignedNumber(size_t num, size_t alignment) {
  size_t ret = num;
  if (alignment) {
    ret = num / alignment;
    if (num % alignment > num / 2) {
      ret++;
    }
    ret = ret * alignment;
  }
  return ret;
}


x86 assembly (clang, -O0):
<alignedNumber>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1165 <alignedNumber+0x65>
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
cmp    %rax,%rdx
jbe    1158 <alignedNumber+0x58>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
imul   -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alignedNumber>:
test   %rsi,%rsi
je     1132 <alignedNumber+0x32>
mov    %rdi,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     111b <alignedNumber+0x1b>
mov    %rdi,%rax
xor    %edx,%edx
div    %rsi
jmp    1121 <alignedNumber+0x21>
mov    %edi,%eax
xor    %edx,%edx
div    %esi
shr    %rdi
cmp    %rdx,%rdi
adc    $0x0,%rax
imul   %rsi,%rax
mov    %rax,%rdi
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @alignedNumber(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
store i64 %6, i64* %5
%7 = load i64, i64* %4
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %26
9: ; preds = %2
%10 = load i64, i64* %3
%11 = load i64, i64* %4
%12 = udiv i64 %10, %11
store i64 %12, i64* %5
%13 = load i64, i64* %3
%14 = load i64, i64* %4
%15 = urem i64 %13, %14
%16 = load i64, i64* %3
%17 = udiv i64 %16, 2
%18 = icmp ugt i64 %15, %17
br i1 %18, label %19, label %22
19: ; preds = %9
%20 = load i64, i64* %5
%21 = add i64 %20, 1
store i64 %21, i64* %5
br label %22
22: ; preds = %19, %9
%23 = load i64, i64* %5
%24 = load i64, i64* %4
%25 = mul i64 %23, %24
store i64 %25, i64* %5
br label %26
26: ; preds = %22, %2
%27 = load i64, i64* %5
ret i64 %27
}

LLVM IR (-O2):
define i64 @alignedNumber(i64 %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %12, label %4
4: ; preds = %2
%5 = udiv i64 %0, %1
%6 = urem i64 %0, %1
%7 = lshr i64 %0, 1
%8 = icmp ugt i64 %6, %7
%9 = zext i1 %8 to i64
%10 = add i64 %5, %9
%11 = mul i64 %10, %1
br label %12
12: ; preds = %4, %2
%13 = phi i64 [ %11, %4 ], [ %0, %2 ]
ret i64 %13
}
void bpop_intro() { return; }


x86 assembly (clang, -O0):
<bpop_intro>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpop_intro>:
ret

LLVM IR (-O0):
define void @bpop_intro() {
ret void
}

LLVM IR (-O2):
define void @bpop_intro() {
ret void
}
long kernel__Int___37d(long self, long p0) {
  long var;
  long var1;
  var1 = self % p0;
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<kernel__Int___37d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cqto
idivq  -0x10(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kernel__Int___37d>:
mov    %rdi,%rax
mov    %rdi,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     1118 <kernel__Int___37d+0x18>
cqto
idiv   %rsi
mov    %rdx,%rax
ret
xor    %edx,%edx
div    %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i64 @kernel__Int___37d(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %3
%8 = load i64, i64* %4
%9 = srem i64 %7, %8
store i64 %9, i64* %6
%10 = load i64, i64* %6
store i64 %10, i64* %5
br label %11
11: ; preds = %2
%12 = load i64, i64* %5
ret i64 %12
}

LLVM IR (-O2):
define i64 @kernel__Int___37d(i64 %0, i64 %1) {
%3 = srem i64 %0, %1
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
void *calloc(int /*<<< orphan*/, int /*<<< orphan*/);
void *ll_malloc(int64_t n, int64_t size) { return calloc(n, size); }


x86 assembly (clang, -O0):
<ll_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <calloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ll_malloc>:
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @ll_malloc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i8* @calloc(i32 %5, i32 %6)
ret i8* %7
}

LLVM IR (-O2):
define noalias i8* @ll_malloc(i32 %0, i32 %1) {
%3 = tail call i8* @calloc(i32 %0, i32 %1)
ret i8* %3
}
void g_type_class_unref() {}


x86 assembly (clang, -O0):
<g_type_class_unref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_type_class_unref>:
ret

LLVM IR (-O0):
define void @g_type_class_unref() {
ret void
}

LLVM IR (-O2):
define void @g_type_class_unref() {
ret void
}
void EPIIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) {
  DEBUG_ASSERT(ulBase == 0x400D0000);
  DEBUG_ASSERT(pfnHandler);
  IntRegister(69, pfnHandler);
  IntEnable(69);
}


x86 assembly (clang, -O0):
<EPIIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x400d0000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1050 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rdi
mov    $0x0,%al
call   1050 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rsi
mov    $0x45,%edi
mov    $0x0,%al
call   1040 <IntRegister@plt>
mov    $0x45,%edi
mov    $0x0,%al
call   1030 <IntEnable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPIIntRegister>:
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
cmp    $0x400d0000,%rdi
sete   %al
mov    %eax,%edi
xor    %eax,%eax
call   1050 <DEBUG_ASSERT@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1050 <DEBUG_ASSERT@plt>
mov    $0x45,%edi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <IntRegister@plt>
mov    $0x45,%edi
xor    %eax,%eax
pop    %rbx
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @EPIIntRegister(i64 %0, void ()* %1) {
%3 = alloca i64
%4 = alloca void ()*
store i64 %0, i64* %3
store void ()* %1, void ()** %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 1074593792
%7 = zext i1 %6 to i32
%8 = call i32 (i32, ...) bitcast (i32 (...)* @DEBUG_ASSERT to i32 (i32, ...)*)(i32 %7)
%9 = load void ()*, void ()** %4
%10 = call i32 (void ()*, ...) bitcast (i32 (...)* @DEBUG_ASSERT to i32 (void ()*, ...)*)(void ()* %9)
%11 = load void ()*, void ()** %4
%12 = call i32 (i32, void ()*, ...) bitcast (i32 (...)* @IntRegister to i32 (i32, void ()*, ...)*)(i32 69, void ()* %11)
%13 = call i32 (i32, ...) bitcast (i32 (...)* @IntEnable to i32 (i32, ...)*)(i32 69)
ret void
}

LLVM IR (-O2):
define void @EPIIntRegister(i64 %0, void ()* %1) {
%3 = icmp eq i64 %0, 1074593792
%4 = zext i1 %3 to i32
%5 = tail call i32 (i32, ...) bitcast (i32 (...)* @DEBUG_ASSERT to i32 (i32, ...)*)(i32 %4)
%6 = tail call i32 (void ()*, ...) bitcast (i32 (...)* @DEBUG_ASSERT to i32 (void ()*, ...)*)(void ()* %1)
%7 = tail call i32 (i32, void ()*, ...) bitcast (i32 (...)* @IntRegister to i32 (i32, void ()*, ...)*)(i32 69, void ()* %1)
%8 = tail call i32 (i32, ...) bitcast (i32 (...)* @IntEnable to i32 (i32, ...)*)(i32 69)
ret void
}
/* Variables and functions */
char *env_lookup(char const *, char const *);
int /*<<< orphan*/ free(char *);
int strlen(char *);
int env_lookup_len(const char *p, const char *q) {
  char *foo;
  int len;
  foo = env_lookup(p, q);
  if (!foo)
    len = 0;
  else {
    len = strlen(foo);
    free(foo);
  }
  return len;
}


x86 assembly (clang, -O0):
<env_lookup_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <env_lookup@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1168 <env_lookup_len+0x38>
movl   $0x0,-0x1c(%rbp)
jmp    117d <env_lookup_len+0x4d>
mov    -0x18(%rbp),%rdi
call   1050 <strlen@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<env_lookup_len>:
push   %rbp
push   %rbx
push   %rax
call   1040 <env_lookup@plt>
test   %rax,%rax
je     1156 <env_lookup_len+0x26>
mov    %rax,%rbx
mov    %rax,%rdi
call   1050 <strlen@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
jmp    1158 <env_lookup_len+0x28>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @env_lookup_len(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = load i8*, i8** %4
%9 = call i8* @env_lookup(i8* %7, i8* %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = icmp ne i8* %10, null
br i1 %11, label %13, label %12
12: ; preds = %2
store i32 0, i32* %6
br label %18
13: ; preds = %2
%14 = load i8*, i8** %5
%15 = call i32 @strlen(i8* %14)
store i32 %15, i32* %6
%16 = load i8*, i8** %5
%17 = call i32 @free(i8* %16)
br label %18
18: ; preds = %13, %12
%19 = load i32, i32* %6
ret i32 %19
}

LLVM IR (-O2):
define i32 @env_lookup_len(i8* %0, i8* %1) {
%3 = tail call i8* @env_lookup(i8* %0, i8* %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @strlen(i8* %3)
%7 = tail call i32 @free(i8* %3)
br label %8
8: ; preds = %2, %5
%9 = phi i32 [ %6, %5 ], [ 0, %2 ]
ret i32 %9
}