#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
int /*<<< orphan*/ IntEnable(unsigned long);
int /*<<< orphan*/ IntRegister(unsigned long, void (*)());
void QEIIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) {
  unsigned long ulInt;
  DEBUG_ASSERT((ulBase == 0x4002C000) || (ulBase == 0x4002D000));
  ulInt = (ulBase == 0x4002C000) ? 29 : 54;
  IntRegister(ulInt, pfnHandler);
  IntEnable(ulInt);
}


x86 assembly (clang, -O0):
<QEIIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%al
cmpq   $0x4002c000,-0x8(%rbp)
40
mov    %al,-0x19(%rbp)
je     1161 <QEIIntRegister+0x31>
cmpq   $0x4002d000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1050 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rdx
mov    $0x36,%eax
mov    $0x1d,%ecx
cmp    $0x4002c000,%rdx
cmove  %ecx,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <IntRegister@plt>
mov    -0x18(%rbp),%rdi
call   1030 <IntEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QEIIntRegister>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x4002c000,%rax
sete   %dil
call   1050 <DEBUG_ASSERT@plt>
cmp    $0x4002c000,%rbx
mov    $0x1d,%eax
mov    $0x36,%ebx
cmove  %rax,%rbx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <IntRegister@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @QEIIntRegister(i64 %0, void ()* %1) {
%3 = alloca i64
%4 = alloca void ()*
%5 = alloca i64
store i64 %0, i64* %3
store void ()* %1, void ()** %4
%6 = load i64, i64* %3
%7 = icmp eq i64 %6, 1073922048
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i64, i64* %3
%10 = icmp eq i64 %9, 1073926144
br label %11
11: ; preds = %8, %2
%12 = phi i1 [ true, %2 ], [ %10, %8 ]
%13 = zext i1 %12 to i32
%14 = call i32 @DEBUG_ASSERT(i32 %13)
%15 = load i64, i64* %3
%16 = icmp eq i64 %15, 1073922048
%17 = zext i1 %16 to i64
%18 = select i1 %16, i32 29, i32 54
%19 = sext i32 %18 to i64
store i64 %19, i64* %5
%20 = load i64, i64* %5
%21 = load void ()*, void ()** %4
%22 = bitcast void ()* %21 to void (...)*
%23 = call i32 @IntRegister(i64 %20, void (...)* %22)
%24 = load i64, i64* %5
%25 = call i32 @IntEnable(i64 %24)
ret void
}

LLVM IR (-O2):
define void @QEIIntRegister(i64 %0, void ()* %1) {
%3 = icmp eq i64 %0, 1073922048
%4 = and i64 %0, -4097
%5 = icmp eq i64 %4, 1073922048
%6 = zext i1 %5 to i32
%7 = tail call i32 @DEBUG_ASSERT(i32 %6)
%8 = select i1 %3, i64 29, i64 54
%9 = bitcast void ()* %1 to void (...)*
%10 = tail call i32 @IntRegister(i64 %8, void (...)* %9)
%11 = tail call i32 @IntEnable(i64 %8)
ret void
}