xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ testIsSorted();
int main(void) {
  testIsSorted();
  printf("i am satisifed with your function. congratulations. asian father "
         "approves.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <testIsSorted@plt>
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <testIsSorted@plt>
lea    0xed1(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [76 x i8] c"i am satisifed with your function. congratulations. asian father approves.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @testIsSorted()
%3 = call i32 @printf(i8* getelementptr inbounds ([76 x i8], [76 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [75 x i8] c"i am satisifed with your function. congratulations. asian father approves.\00"
define i32 @main() {
%1 = tail call i32 (...) @testIsSorted()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([75 x i8], [75 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ init_exp_table();
void init_galois_tables(void) { init_exp_table(); }


x86 assembly (clang, -O0):
<init_galois_tables>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_exp_table@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_galois_tables>:
xor    %eax,%eax
jmp    1030 <init_exp_table@plt>

LLVM IR (-O0):
define void @init_galois_tables() {
%1 = call i32 (...) @init_exp_table()
ret void
}

LLVM IR (-O2):
define void @init_galois_tables() {
%1 = tail call i32 (...) @init_exp_table()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
int /*<<< orphan*/ strlen(char *);
int /*<<< orphan*/ usleep(int);
int /*<<< orphan*/ write(int, char *, int /*<<< orphan*/);
void quitCw(int fd) {
  char cmd[15];
  sprintf(cmd, "RX;");
  write(fd, cmd, strlen(cmd));
  usleep(100e3);
}


x86 assembly (clang, -O0):
<quitCw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x13(%rbp),%rdi
lea    0xeaa(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x24(%rbp)
lea    -0x13(%rbp),%rax
mov    %rax,-0x20(%rbp)
lea    -0x13(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x24(%rbp),%edi
mov    -0x20(%rbp),%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    $0x186a0,%edi
call   1060 <usleep@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quitCw>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %edi,%ebx
movl   $0x3b5852,0x8(%rsp)
lea    0x8(%rsp),%r14
mov    %r14,%rdi
call   1040 <strlen@plt>
mov    %ebx,%edi
mov    %r14,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    $0x186a0,%edi
call   1050 <usleep@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"RX;\00"
define void @quitCw(i32 %0) {
%2 = alloca i32
%3 = alloca [15 x i8]
store i32 %0, i32* %2
%4 = getelementptr inbounds [15 x i8], [15 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%6 = load i32, i32* %2
%7 = getelementptr inbounds [15 x i8], [15 x i8]* %3, i64 0, i64 0
%8 = getelementptr inbounds [15 x i8], [15 x i8]* %3, i64 0, i64 0
%9 = call i32 @strlen(i8* %8)
%10 = call i32 @write(i32 %6, i8* %7, i32 %9)
%11 = call i32 @usleep(i32 100000)
ret void
}

LLVM IR (-O2):
define void @quitCw(i32 %0) {
%2 = alloca [15 x i8]
%3 = getelementptr inbounds [15 x i8], [15 x i8]* %2, i64 0, i64 0
%4 = bitcast [15 x i8]* %2 to i32*
store i32 3889234, i32* %4
%5 = call i32 @strlen(i8* %3)
%6 = call i32 @write(i32 %0, i8* %3, i32 %5)
%7 = call i32 @usleep(i32 100000)
ret void
}
void BN_mul(void) {}


x86 assembly (clang, -O0):
<BN_mul>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_mul>:
ret

LLVM IR (-O0):
define void @BN_mul() {
ret void
}

LLVM IR (-O2):
define void @BN_mul() {
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ width;
};
typedef TYPE_1__ Screen;

/* Variables and functions */
int get_Screen_width(void *_p) { return (int)((Screen *)_p)->width; }


x86 assembly (clang, -O0):
<get_Screen_width>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_Screen_width>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_Screen_width(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_Screen_width(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
int vexpress_muxfpga_init(void) { return 0; }


x86 assembly (clang, -O0):
<vexpress_muxfpga_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vexpress_muxfpga_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @vexpress_muxfpga_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @vexpress_muxfpga_init() {
ret i32 0
}
/* Type definitions */
struct RadarSite {
  int dummy;
};
struct Radar {
  int dummy;
};

/* Variables and functions */
struct RadarSite *RadarEpochGetSite(struct Radar *, double);
double TimeYMDHMSToEpoch(int, int, int, int, int, int);
struct RadarSite *RadarYMDHMSGetSite(struct Radar *ptr, int yr, int mo, int dy,
                                     int hr, int mt, int sc) {
  double tval;
  tval = TimeYMDHMSToEpoch(yr, mo, dy, hr, mt, sc);
  return RadarEpochGetSite(ptr, tval);
}


x86 assembly (clang, -O0):
<RadarYMDHMSGetSite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
mov    -0x1c(%rbp),%r8d
mov    0x10(%rbp),%r9d
call   1030 <TimeYMDHMSToEpoch@plt>
movsd  %xmm0,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
movsd  -0x28(%rbp),%xmm0
call   1040 <RadarEpochGetSite@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RadarYMDHMSGetSite>:
push   %rbx
mov    %r9d,%eax
mov    %rdi,%rbx
mov    0x10(%rsp),%r9d
mov    %esi,%edi
mov    %edx,%esi
mov    %ecx,%edx
mov    %r8d,%ecx
mov    %eax,%r8d
call   1030 <TimeYMDHMSToEpoch@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <RadarEpochGetSite@plt>

LLVM IR (-O0):
%struct.RadarSite = type { i32 }
%struct.Radar = type { i32 }
define %struct.RadarSite* @RadarYMDHMSGetSite(%struct.Radar* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = alloca %struct.Radar*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca double
store %struct.Radar* %0, %struct.Radar** %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store i32 %6, i32* %14
%16 = load i32, i32* %9
%17 = load i32, i32* %10
%18 = load i32, i32* %11
%19 = load i32, i32* %12
%20 = load i32, i32* %13
%21 = load i32, i32* %14
%22 = call double @TimeYMDHMSToEpoch(i32 %16, i32 %17, i32 %18, i32 %19, i32 %20, i32 %21)
store double %22, double* %15
%23 = load %struct.Radar*, %struct.Radar** %8
%24 = load double, double* %15
%25 = call %struct.RadarSite* @RadarEpochGetSite(%struct.Radar* %23, double %24)
ret %struct.RadarSite* %25
}

LLVM IR (-O2):
%struct.RadarSite = type { i32 }
%struct.Radar = type { i32 }
define %struct.RadarSite* @RadarYMDHMSGetSite(%struct.Radar* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = tail call double @TimeYMDHMSToEpoch(i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6)
%9 = tail call %struct.RadarSite* @RadarEpochGetSite(%struct.Radar* %0, double %8)
ret %struct.RadarSite* %9
}
/* Variables and functions */
char EOF;
void mk_printable(char *buf) {
  for (; *buf; buf++) {
    if (*buf <= ' ' || *buf >= EOF) {
      *buf = 0;
    }
  }
}


x86 assembly (clang, -O0):
<mk_printable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     115b <mk_printable+0x5b>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
jle    113e <mk_printable+0x3e>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    0x2eb5(%rip),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
jl     1145 <mk_printable+0x45>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
jmp    114a <mk_printable+0x4a>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <mk_printable+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mk_printable>:
mov    (%rdi),%dl
test   %dl,%dl
je     113d <mk_printable+0x3d>
mov    0x2edb(%rip),%rax
mov    (%rax),%cl
add    $0x1,%rdi
jmp    1132 <mk_printable+0x32>
cs nopw 0x0(%rax,%rax,1)
nop
movb   $0x0,-0x1(%rdi)
movzbl (%rax),%ecx
movzbl (%rdi),%edx
add    $0x1,%rdi
test   %dl,%dl
je     113d <mk_printable+0x3d>
cmp    $0x21,%dl
jl     1120 <mk_printable+0x20>
cmp    %cl,%dl
jl     1127 <mk_printable+0x27>
jmp    1120 <mk_printable+0x20>
ret

LLVM IR (-O0):
@EOF = global i8 0
define void @mk_printable(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %22, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %25
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp sle i32 %10, 32
br i1 %11, label %19, label %12
12: ; preds = %7
%13 = load i8*, i8** %2
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = load i8, i8* @EOF
%17 = sext i8 %16 to i32
%18 = icmp sge i32 %15, %17
br i1 %18, label %19, label %21
19: ; preds = %12, %7
%20 = load i8*, i8** %2
store i8 0, i8* %20
br label %21
21: ; preds = %19, %12
br label %22
22: ; preds = %21
%23 = load i8*, i8** %2
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %2
br label %3
25: ; preds = %3
ret void
}

LLVM IR (-O2):
@EOF = global i8 0
define void @mk_printable(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %20, label %4
4: ; preds = %1
%5 = load i8, i8* @EOF
br label %6
6: ; preds = %4, %15
%7 = phi i8 [ %16, %15 ], [ %5, %4 ]
%8 = phi i8 [ %18, %15 ], [ %2, %4 ]
%9 = phi i8* [ %17, %15 ], [ %0, %4 ]
%10 = icmp sgt i8 %8, 32
%11 = icmp slt i8 %8, %7
%12 = select i1 %10, i1 %11, i1 false
br i1 %12, label %15, label %13
13: ; preds = %6
store i8 0, i8* %9
%14 = load i8, i8* @EOF
br label %15
15: ; preds = %6, %13
%16 = phi i8 [ %7, %6 ], [ %14, %13 ]
%17 = getelementptr inbounds i8, i8* %9, i64 1
%18 = load i8, i8* %17
%19 = icmp eq i8 %18, 0
br i1 %19, label %20, label %6
20: ; preds = %15, %1
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int hammingWeight(uint32_t n) {
  int count = 0;
  while (n > 0) {
    count += (n & 1);
    n >>= 1;
  }
  return count;
}


x86 assembly (clang, -O0):
<hammingWeight>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1132 <hammingWeight+0x32>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <hammingWeight+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hammingWeight>:
xor    %eax,%eax
test   %edi,%edi
jle    1120 <hammingWeight+0x20>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <hammingWeight+0x10>
ret

LLVM IR (-O0):
define i32 @hammingWeight(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = load i32, i32* %3
%11 = add nsw i32 %10, %9
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = ashr i32 %12, 1
store i32 %13, i32* %2
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @hammingWeight(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %10
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = add nuw nsw i32 %4, %6
%8 = lshr i32 %5, 1
%9 = icmp ult i32 %5, 2
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
void VIDDummyVdp1LineDraw(void) {}


x86 assembly (clang, -O0):
<VIDDummyVdp1LineDraw>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VIDDummyVdp1LineDraw>:
ret

LLVM IR (-O0):
define void @VIDDummyVdp1LineDraw() {
ret void
}

LLVM IR (-O2):
define void @VIDDummyVdp1LineDraw() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
uint32_t USBLPMIntStatus(uint32_t ui32Base) {
  ;
  return ((*((volatile uint8_t *)(ui32Base + 0x00000364))));
}


x86 assembly (clang, -O0):
<USBLPMIntStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x364(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBLPMIntStatus>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
mov    0x364(%rax),%rax
ret

LLVM IR (-O0):
define i64 @USBLPMIntStatus(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add nsw i64 %3, 868
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @USBLPMIntStatus(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = add nsw i64 %3, 868
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}
/* Type definitions */
typedef int uint;

/* Variables and functions */
uint _uint() { return 1 << 31; }


x86 assembly (clang, -O0):
<_uint>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_uint>:
mov    $0x80000000,%eax
ret

LLVM IR (-O0):
define i32 @_uint() {
ret i32 -2147483648
}

LLVM IR (-O2):
define i32 @_uint() {
ret i32 -2147483648
}
int finite(double x) {
  if (x < ((float)3.40282346638528860e+38) &&
      x > -((float)3.40282346638528860e+38))
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<finite>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  0xeef(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    113f <finite+0x3f>
movsd  -0x10(%rbp),%xmm0
movsd  0xedf(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    113f <finite+0x3f>
movl   $0x1,-0x4(%rbp)
jmp    1146 <finite+0x46>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<finite>:
movsd  0xef8(%rip),%xmm1
ucomisd %xmm0,%xmm1
seta   %al
ucomisd 0xef1(%rip),%xmm0
seta   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @finite(double %0) {
%2 = alloca i32
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 0x47EFFFFFE0000000
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load double, double* %3
%8 = fcmp ogt double %7, 0xC7EFFFFFE0000000
br i1 %8, label %9, label %10
9: ; preds = %6
store i32 1, i32* %2
br label %11
10: ; preds = %6, %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @finite(double %0) {
%2 = fcmp olt double %0, 0x47EFFFFFE0000000
%3 = fcmp ogt double %0, 0xC7EFFFFFE0000000
%4 = and i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
int execute_oldfstat() { return 0; }


x86 assembly (clang, -O0):
<execute_oldfstat>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_oldfstat>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_oldfstat() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_oldfstat() {
ret i32 0
}
void DaoGC_UnlockData() {}


x86 assembly (clang, -O0):
<DaoGC_UnlockData>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DaoGC_UnlockData>:
ret

LLVM IR (-O0):
define void @DaoGC_UnlockData() {
ret void
}

LLVM IR (-O2):
define void @DaoGC_UnlockData() {
ret void
}
/* Type definitions */
typedef int u_long;

/* Variables and functions */
int do_rand(int *);
int rand_r(unsigned int *ctx) {
  u_long val;
  int r;
  val = (*ctx % 0x7ffffffe) + 1;
  r = do_rand(&val);
  *ctx = (unsigned int)(val - 1);
  return (r);
}


x86 assembly (clang, -O0):
<rand_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    $0x7ffffffe,%ecx
xor    %edx,%edx
div    %ecx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
lea    -0xc(%rbp),%rdi
call   1030 <do_rand@plt>
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_r>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    (%rdi),%eax
mov    %eax,%ecx
shr    %ecx
mov    $0x80000003,%edx
imul   %rcx,%rdx
shr    $0x3d,%rdx
mov    %edx,%ecx
shl    $0x1f,%ecx
mov    %edx,%esi
sub    %ecx,%esi
add    %edx,%esi
add    %esi,%eax
add    $0x1,%eax
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rdi
call   1030 <do_rand@plt>
mov    0xc(%rsp),%ecx
add    $0xffffffff,%ecx
mov    %ecx,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rand_r(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
%7 = urem i32 %6, 2147483646
%8 = add i32 %7, 1
store i32 %8, i32* %3
%9 = call i32 @do_rand(i32* %3)
store i32 %9, i32* %4
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 1
%12 = load i32*, i32** %2
store i32 %11, i32* %12
%13 = load i32, i32* %4
ret i32 %13
}

LLVM IR (-O2):
define i32 @rand_r(i32* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* %0
%5 = urem i32 %4, 2147483646
%6 = add nuw nsw i32 %5, 1
store i32 %6, i32* %2
%7 = call i32 @do_rand(i32* %2)
%8 = load i32, i32* %2
%9 = add nsw i32 %8, -1
store i32 %9, i32* %0
ret i32 %7
}
/* Variables and functions */
double expm1(double);
double test4(double x) { return expm1(x); }


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <expm1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
jmp    1030 <expm1@plt>

LLVM IR (-O0):
define double @test4(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @expm1(double %3)
ret double %4
}

LLVM IR (-O2):
define double @test4(double %0) {
%2 = tail call double @expm1(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ putchar(int /*<<< orphan*/);
void puts(char *s) {
  while (*s) {
    putchar(*s++);
  }
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <puts+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <putchar@plt>
jmp    111c <puts+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <puts+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <putchar@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <puts+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 @putchar(i32 %11)
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @puts(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 @putchar(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
int power2(int num) {
  if (num < 0)
    num = -num;
  if (num == 1)
    return 1;
  while (num > 1) {
    if (num % 2)
      return 0;
    num = num / 2;
  }
  return 1;
}


x86 assembly (clang, -O0):
<power2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1119 <power2+0x19>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    112f <power2+0x2f>
movl   $0x1,-0x4(%rbp)
jmp    1178 <power2+0x78>
jmp    1134 <power2+0x34>
cmpl   $0x1,-0x8(%rbp)
jle    1171 <power2+0x71>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     115e <power2+0x5e>
movl   $0x0,-0x4(%rbp)
jmp    1178 <power2+0x78>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    1134 <power2+0x34>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<power2>:
mov    %edi,%ecx
neg    %ecx
cmovs  %edi,%ecx
mov    $0x1,%eax
cmp    $0x2,%ecx
jb     1130 <power2+0x30>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
test   $0x1,%cl
jne    1131 <power2+0x31>
mov    %ecx,%edx
shr    %edx
cmp    $0x4,%ecx
mov    %edx,%ecx
jae    1120 <power2+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @power2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 0, %7
store i32 %8, i32* %3
br label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %13
12: ; preds = %9
store i32 1, i32* %2
br label %26
13: ; preds = %9
br label %14
14: ; preds = %22, %13
%15 = load i32, i32* %3
%16 = icmp sgt i32 %15, 1
br i1 %16, label %17, label %25
17: ; preds = %14
%18 = load i32, i32* %3
%19 = srem i32 %18, 2
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %17
store i32 0, i32* %2
br label %26
22: ; preds = %17
%23 = load i32, i32* %3
%24 = sdiv i32 %23, 2
store i32 %24, i32* %3
br label %14
25: ; preds = %14
store i32 1, i32* %2
br label %26
26: ; preds = %25, %21, %12
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @power2(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
%3 = icmp ult i32 %2, 2
br i1 %3, label %11, label %7
4: ; preds = %7
%5 = lshr i32 %8, 1
%6 = icmp ugt i32 %8, 3
br i1 %6, label %7, label %11
7: ; preds = %1, %4
%8 = phi i32 [ %5, %4 ], [ %2, %1 ]
%9 = and i32 %8, 1
%10 = icmp eq i32 %9, 0
br i1 %10, label %4, label %11
11: ; preds = %7, %4, %1
%12 = phi i32 [ 1, %1 ], [ 0, %7 ], [ 1, %4 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void display(int *a, int n) {
  int i = 0;
  while (*(a + i)) {
    printf("%d ", *(a + i));
    i++;
  }
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
je     115d <display+0x4d>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <display+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%esi
test   %esi,%esi
je     1142 <display+0x32>
mov    %rdi,%rbx
add    $0x4,%rbx
lea    0xed8(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    %r14,%rdi
call   1030 <printf@plt>
mov    (%rbx),%esi
add    $0x4,%rbx
test   %esi,%esi
jne    1130 <display+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
define void @display(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %2
%7 = load i32*, i32** %3
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %7, i64 %9
%11 = load i32, i32* %10
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %22
13: ; preds = %6
%14 = load i32*, i32** %3
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %18)
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %6
22: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define void @display(i32* nocapture %0, i32 %1) {
%3 = load i32, i32* %0
%4 = icmp eq i32 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %9, %5 ], [ 0, %2 ]
%7 = phi i32 [ %11, %5 ], [ %3, %2 ]
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
%9 = add nuw i64 %6, 1
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _rob(int *, int);
int max(int /*<<< orphan*/, int /*<<< orphan*/);
int rob(int *nums, int numsSize) {
  if (numsSize == 1) {
    return nums[0];
  } else {
    return max(_rob(nums + 1, numsSize - 1), _rob(nums, numsSize - 1));
  }
}


x86 assembly (clang, -O0):
<rob>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    1147 <rob+0x27>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1179 <rob+0x59>
mov    -0x10(%rbp),%rdi
add    $0x4,%rdi
mov    -0x14(%rbp),%esi
sub    $0x1,%esi
call   1040 <_rob@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
sub    $0x1,%esi
call   1040 <_rob@plt>
mov    -0x18(%rbp),%edi
mov    %eax,%esi
call   1030 <max@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rob>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
cmp    $0x1,%esi
jne    1134 <rob+0x14>
mov    (%r14),%eax
pop    %rbx
pop    %r14
pop    %rbp
ret
mov    %esi,%ebx
lea    0x4(%r14),%rdi
add    $0xffffffff,%ebx
mov    %ebx,%esi
call   1040 <_rob@plt>
mov    %eax,%ebp
mov    %r14,%rdi
mov    %ebx,%esi
call   1040 <_rob@plt>
mov    %ebp,%edi
mov    %eax,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <max@plt>

LLVM IR (-O0):
define i32 @rob(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32*, i32** %4
%10 = getelementptr inbounds i32, i32* %9, i64 0
%11 = load i32, i32* %10
store i32 %11, i32* %3
br label %23
12: ; preds = %2
%13 = load i32*, i32** %4
%14 = getelementptr inbounds i32, i32* %13, i64 1
%15 = load i32, i32* %5
%16 = sub nsw i32 %15, 1
%17 = call i32 @_rob(i32* %14, i32 %16)
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sub nsw i32 %19, 1
%21 = call i32 @_rob(i32* %18, i32 %20)
%22 = call i32 @max(i32 %17, i32 %21)
store i32 %22, i32* %3
br label %23
23: ; preds = %12, %8
%24 = load i32, i32* %3
ret i32 %24
}

LLVM IR (-O2):
define i32 @rob(i32* %0, i32 %1) {
%3 = icmp eq i32 %1, 1
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = load i32, i32* %0
br label %12
6: ; preds = %2
%7 = getelementptr inbounds i32, i32* %0, i64 1
%8 = add nsw i32 %1, -1
%9 = tail call i32 @_rob(i32* %7, i32 %8)
%10 = tail call i32 @_rob(i32* %0, i32 %8)
%11 = tail call i32 @max(i32 %9, i32 %10)
br label %12
12: ; preds = %6, %4
%13 = phi i32 [ %5, %4 ], [ %11, %6 ]
ret i32 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ data;

/* Variables and functions */
int /*<<< orphan*/ vla_arg_func(int, int *);
int main(void) {
  int data[32];
  vla_arg_func(sizeof(data) / sizeof(data[0]), data);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x90(%rbp),%rsi
mov    $0x20,%edi
call   1030 <vla_arg_func@plt>
xor    %eax,%eax
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x88,%rsp
mov    %rsp,%rsi
mov    $0x20,%edi
call   1030 <vla_arg_func@plt>
xor    %eax,%eax
add    $0x88,%rsp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [32 x i32]
store i32 0, i32* %1
%3 = getelementptr inbounds [32 x i32], [32 x i32]* %2, i64 0, i64 0
%4 = call i32 @vla_arg_func(i32 32, i32* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [32 x i32]
%2 = bitcast [32 x i32]* %1 to i8*
%3 = getelementptr inbounds [32 x i32], [32 x i32]* %1, i64 0, i64 0
%4 = call i32 @vla_arg_func(i32 32, i32* %3)
ret i32 0
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
__attribute__((const)) uint16_t av_clip_uint16(int a) {
  if (a & (~0xFFFF))
    return (-a) >> 31;
  else
    return a;
}


x86 assembly (clang, -O0):
<av_clip_uint16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xffff0000,%eax
cmp    $0x0,%eax
je     1128 <av_clip_uint16+0x28>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
sar    $0x1f,%eax
mov    %eax,-0x4(%rbp)
jmp    112e <av_clip_uint16+0x2e>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_clip_uint16>:
xor    %eax,%eax
test   %edi,%edi
setg   %al
neg    %eax
cmp    $0x10000,%edi
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @av_clip_uint16(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, -65536
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 0, %8
%10 = ashr i32 %9, 31
store i32 %10, i32* %2
br label %13
11: ; preds = %1
%12 = load i32, i32* %3
store i32 %12, i32* %2
br label %13
13: ; preds = %11, %7
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @av_clip_uint16(i32 %0) {
%2 = icmp ult i32 %0, 65536
%3 = icmp sgt i32 %0, 0
%4 = sext i1 %3 to i32
%5 = select i1 %2, i32 %0, i32 %4
ret i32 %5
}
/* Variables and functions */
double get_ms_time();
void benchmark_begin(double *bc) { *bc = get_ms_time(); }


x86 assembly (clang, -O0):
<benchmark_begin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <get_ms_time@plt>
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<benchmark_begin>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <get_ms_time@plt>
movsd  %xmm0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @benchmark_begin(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = call double (...) @get_ms_time()
%4 = load double*, double** %2
store double %3, double* %4
ret void
}

LLVM IR (-O2):
define void @benchmark_begin(double* nocapture writeonly %0) {
%2 = tail call double (...) @get_ms_time()
store double %2, double* %0
ret void
}
/* Variables and functions */
int __WORDSIZE;
void change_bit(int nr, volatile unsigned long *addr) {
  *(addr + ((nr) / __WORDSIZE)) ^= (1UL << ((nr) % __WORDSIZE));
}


x86 assembly (clang, -O0):
<change_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ed3(%rip),%rcx
cltd
idivl  (%rcx)
mov    %edx,%eax
mov    %eax,%ecx
mov    $0x1,%esi
shl    %cl,%rsi
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2eb2(%rip),%rcx
cltd
idivl  (%rcx)
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
mov    (%rax,%rcx,8),%rdx
xor    %rsi,%rdx
mov    %rdx,(%rax,%rcx,8)
pop    %rbp
ret

x86 assembly (clang, -O2):
<change_bit>:
mov    %edi,%eax
mov    0x2edf(%rip),%rcx
cltd
idivl  (%rcx)
mov    %edx,%ecx
mov    $0x1,%edx
shl    %cl,%rdx
cltq
xor    %rdx,(%rsi,%rax,8)
ret

LLVM IR (-O0):
@__WORDSIZE = global i32 0
define void @change_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
store i32 %0, i32* %3
store i64* %1, i64** %4
%5 = load i32, i32* %3
%6 = load i32, i32* @__WORDSIZE
%7 = srem i32 %5, %6
%8 = zext i32 %7 to i64
%9 = shl i64 1, %8
%10 = load i64*, i64** %4
%11 = load i32, i32* %3
%12 = load i32, i32* @__WORDSIZE
%13 = sdiv i32 %11, %12
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i64, i64* %10, i64 %14
%16 = load volatile i64, i64* %15
%17 = xor i64 %16, %9
store volatile i64 %17, i64* %15
ret void
}

LLVM IR (-O2):
@__WORDSIZE = global i32 0
define void @change_bit(i32 %0, i64* %1) {
%3 = load i32, i32* @__WORDSIZE
%4 = srem i32 %0, %3
%5 = zext i32 %4 to i64
%6 = shl nuw i64 1, %5
%7 = sdiv i32 %0, %3
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i64, i64* %1, i64 %8
%10 = load volatile i64, i64* %9
%11 = xor i64 %10, %6
store volatile i64 %11, i64* %9
ret void
}
/* Variables and functions */
bool nrf53_errata_105(void) { return false; }


x86 assembly (clang, -O0):
<nrf53_errata_105>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf53_errata_105>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf53_errata_105() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf53_errata_105() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
int /*<<< orphan*/ system(char *);
int x1_teardown() {
  char cmd[256];
  sprintf(cmd,
          "iptables -D INPUT -p tcp -m multiport --sport 53,80 --tcp-flags "
          "SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d",
          1);
  system(cmd);
  return 0;
}


x86 assembly (clang, -O0):
<x1_teardown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    -0x100(%rbp),%rdi
lea    0xec7(%rip),%rsi
mov    $0x1,%edx
call   1040 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x1_teardown>:
push   %rbx
sub    $0x100,%rsp
lea    0xed1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x1,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [106 x i8] c"iptables -D INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x1_teardown() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%5 = call i32 @system(i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [106 x i8] c"iptables -D INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x1_teardown() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* dereferenceable(1) getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = call i32 @system(i8* %2)
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
struct in_addr {
  int /*<<< orphan*/ s_addr;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ htonl(int);
void MaskIP4(struct in_addr *addr, uint8_t bits) {
  assert(addr != NULL);
  assert(bits <= 32);
  addr->s_addr &= htonl(0xffffffff << (32 - bits));
}


x86 assembly (clang, -O0):
<MaskIP4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
cmpl   $0x20,-0xc(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    $0x20,%ecx
sub    -0xc(%rbp),%ecx
mov    $0xffffffff,%edi
shl    %cl,%edi
call   1030 <htonl@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
and    (%rax),%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MaskIP4>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1040 <assert@plt>
xor    %edi,%edi
cmp    $0x21,%ebp
setl   %dil
call   1040 <assert@plt>
neg    %bpl
mov    $0xffffffff,%edi
mov    %ebp,%ecx
shl    %cl,%edi
call   1030 <htonl@plt>
and    %eax,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.in_addr = type { i32 }
define void @MaskIP4(%struct.in_addr* %0, i32 %1) {
%3 = alloca %struct.in_addr*
%4 = alloca i32
store %struct.in_addr* %0, %struct.in_addr** %3
store i32 %1, i32* %4
%5 = load %struct.in_addr*, %struct.in_addr** %3
%6 = icmp ne %struct.in_addr* %5, null
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %4
%10 = icmp sle i32 %9, 32
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i32, i32* %4
%14 = sub nsw i32 32, %13
%15 = shl i32 -1, %14
%16 = call i32 @htonl(i32 %15)
%17 = load %struct.in_addr*, %struct.in_addr** %3
%18 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %17, i32 0, i32 0
%19 = load i32, i32* %18
%20 = and i32 %19, %16
store i32 %20, i32* %18
ret void
}

LLVM IR (-O2):
%struct.in_addr = type { i32 }
define void @MaskIP4(%struct.in_addr* %0, i32 %1) {
%3 = icmp ne %struct.in_addr* %0, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = icmp slt i32 %1, 33
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = sub nsw i32 32, %1
%10 = shl nsw i32 -1, %9
%11 = tail call i32 @htonl(i32 %10)
%12 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %0, i64 0, i32 0
%13 = load i32, i32* %12
%14 = and i32 %13, %11
store i32 %14, i32* %12
ret void
}
long int labs(long int x) {
  if (x < 0) {
    x = -x;
  }
  return x;
}


x86 assembly (clang, -O0):
<labs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    111d <labs+0x1d>
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<labs>:
mov    %rdi,%rax
neg    %rax
cmovs  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @labs(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i64, i64* %2
%7 = sub nsw i64 0, %6
store i64 %7, i64* %2
br label %8
8: ; preds = %5, %1
%9 = load i64, i64* %2
ret i64 %9
}

LLVM IR (-O2):
define i64 @labs(i64 %0) {
%2 = tail call i64 @llvm.abs.i64(i64 %0, i1 true)
ret i64 %2
}
fge(int x, int y) {
  if (x >= y)
    return 13;
  else
    return 140;
}


x86 assembly (clang, -O0):
<fge>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jl     1122 <fge+0x22>
movl   $0xd,-0x4(%rbp)
jmp    1129 <fge+0x29>
movl   $0x8c,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fge>:
cmp    %esi,%edi
mov    $0x8c,%ecx
mov    $0xd,%eax
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @fge(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sge i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 13, i32* %3
br label %11
10: ; preds = %2
store i32 140, i32* %3
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @fge(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 140, i32 13
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430InterruptP__Port10__clear();
void Msp430InterruptC__1__HplInterrupt__clear(void) {
  HplMsp430InterruptP__Port10__clear();
}


x86 assembly (clang, -O0):
<Msp430InterruptC__1__HplInterrupt__clear>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430InterruptP__Port10__clear@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430InterruptC__1__HplInterrupt__clear>:
xor    %eax,%eax
jmp    1030 <HplMsp430InterruptP__Port10__clear@plt>

LLVM IR (-O0):
define void @Msp430InterruptC__1__HplInterrupt__clear() {
%1 = call i32 (...) @HplMsp430InterruptP__Port10__clear()
ret void
}

LLVM IR (-O2):
define void @Msp430InterruptC__1__HplInterrupt__clear() {
%1 = tail call i32 (...) @HplMsp430InterruptP__Port10__clear()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getTime();
void test_getData() { getTime(); }


x86 assembly (clang, -O0):
<test_getData>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getTime@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_getData>:
xor    %eax,%eax
jmp    1030 <getTime@plt>

LLVM IR (-O0):
define void @test_getData() {
%1 = call i32 (...) @getTime()
ret void
}

LLVM IR (-O2):
define void @test_getData() {
%1 = tail call i32 (...) @getTime()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct timeval {
  int /*<<< orphan*/ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
time_t _time_now(void) {
  struct timeval tv;
  gettimeofday(&tv, NULL);
  return tv.tv_sec;
}


x86 assembly (clang, -O0):
<_time_now>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_time_now>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
mov    (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
define i32 @_time_now() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define i32 @_time_now() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}
__attribute__((always_)) void trace_mm_page_free_direct(struct page *page,
                                                        unsigned int order) {}


x86 assembly (clang, -O0):
<trace_mm_page_free_direct>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace_mm_page_free_direct>:
ret

LLVM IR (-O0):
%struct.page = type opaque
define void @trace_mm_page_free_direct(%struct.page* %0, i32 %1) {
%3 = alloca %struct.page*
%4 = alloca i32
store %struct.page* %0, %struct.page** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.page = type opaque
define void @trace_mm_page_free_direct(%struct.page* nocapture %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ tmp;

/* Variables and functions */
int /*<<< orphan*/ get_random_bytes(unsigned int *, int);
unsigned int get_random_int(void) {
  unsigned int tmp;
  get_random_bytes(&tmp, sizeof(tmp));
  return tmp;
}


x86 assembly (clang, -O0):
<get_random_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
mov    $0x4,%esi
call   1030 <get_random_bytes@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_random_int>:
push   %rax
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
call   1030 <get_random_bytes@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @get_random_int() {
%1 = alloca i32
%2 = call i32 @get_random_bytes(i32* %1, i32 4)
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @get_random_int() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @get_random_bytes(i32* %1, i32 4)
%4 = load i32, i32* %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ const_func(int);
void const_warn_test(void) { const_func(1); }


x86 assembly (clang, -O0):
<const_warn_test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <const_func@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<const_warn_test>:
mov    $0x1,%edi
jmp    1030 <const_func@plt>

LLVM IR (-O0):
define void @const_warn_test() {
%1 = call i32 @const_func(i32 1)
ret void
}

LLVM IR (-O2):
define void @const_warn_test() {
%1 = tail call i32 @const_func(i32 1)
ret void
}
/* Variables and functions */
void terminal_uninit(void) {}


x86 assembly (clang, -O0):
<terminal_uninit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminal_uninit>:
ret

LLVM IR (-O0):
define void @terminal_uninit() {
ret void
}

LLVM IR (-O2):
define void @terminal_uninit() {
ret void
}
void foo(int n, int (*b)[n]) { (*b)[n] = 1; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
movl   $0x1,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
movslq %edi,%rax
movl   $0x1,(%rsi,%rax,4)
ret

LLVM IR (-O0):
define void @foo(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = zext i32 %5 to i64
%7 = load i32*, i32** %4
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %7, i64 %9
store i32 1, i32* %10
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, i32* nocapture writeonly %1) {
%3 = sext i32 %0 to i64
%4 = getelementptr inbounds i32, i32* %1, i64 %3
store i32 1, i32* %4
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
uint8_t updatebyte(uint8_t byte, uint8_t bit, uint8_t value) {
  if (value == 0) {
    return (byte &= ~(1 << bit));
  } else {
    return (byte |= 1 << bit);
  }
}


x86 assembly (clang, -O0):
<updatebyte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    113e <updatebyte+0x3e>
mov    -0x18(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
cltq
and    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    %rax,-0x8(%rbp)
jmp    1159 <updatebyte+0x59>
mov    -0x18(%rbp),%rax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<updatebyte>:
mov    %rsi,%rcx
mov    $0x1,%eax
shl    %cl,%eax
test   %rdx,%rdx
je     1115 <updatebyte+0x15>
cltq
or     %rdi,%rax
ret
not    %eax
cltq
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @updatebyte(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i64, i64* %7
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %18
10: ; preds = %3
%11 = load i64, i64* %6
%12 = trunc i64 %11 to i32
%13 = shl i32 1, %12
%14 = xor i32 %13, -1
%15 = sext i32 %14 to i64
%16 = load i64, i64* %5
%17 = and i64 %16, %15
store i64 %17, i64* %5
store i64 %17, i64* %4
br label %25
18: ; preds = %3
%19 = load i64, i64* %6
%20 = trunc i64 %19 to i32
%21 = shl i32 1, %20
%22 = sext i32 %21 to i64
%23 = load i64, i64* %5
%24 = or i64 %23, %22
store i64 %24, i64* %5
store i64 %24, i64* %4
br label %25
25: ; preds = %18, %10
%26 = load i64, i64* %4
ret i64 %26
}

LLVM IR (-O2):
define i64 @updatebyte(i64 %0, i64 %1, i64 %2) {
%4 = icmp eq i64 %2, 0
%5 = trunc i64 %1 to i32
%6 = shl nuw i32 1, %5
br i1 %4, label %7, label %11
7: ; preds = %3
%8 = xor i32 %6, -1
%9 = sext i32 %8 to i64
%10 = and i64 %9, %0
br label %14
11: ; preds = %3
%12 = sext i32 %6 to i64
%13 = or i64 %12, %0
br label %14
14: ; preds = %11, %7
%15 = phi i64 [ %10, %7 ], [ %13, %11 ]
ret i64 %15
}