xunge/DecIR huggingface dataset:
float _testfunc_f_bhilfd(signed char b, short h, int i, long l, float f,
                         double d) {
  return (float)(b + h + i + l + f + d);
}


x86 assembly (clang, -O0):
<_testfunc_f_bhilfd>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %ax,-0x4(%rbp)
mov    %edx,-0x8(%rbp)
mov    %rcx,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
movsd  %xmm1,-0x20(%rbp)
movsbl -0x1(%rbp),%eax
movswl -0x4(%rbp),%ecx
add    %ecx,%eax
add    -0x8(%rbp),%eax
cltq
add    -0x10(%rbp),%rax
cvtsi2ss %rax,%xmm0
addss  -0x14(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
addsd  -0x20(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_testfunc_f_bhilfd>:
add    %esi,%edi
add    %edx,%edi
movslq %edi,%rax
add    %rcx,%rax
cvtsi2ss %rax,%xmm2
addss  %xmm0,%xmm2
xorps  %xmm0,%xmm0
cvtss2sd %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @_testfunc_f_bhilfd(i8 signext %0, i16 signext %1, i32 %2, i64 %3, float %4, double %5) {
%7 = alloca i8
%8 = alloca i16
%9 = alloca i32
%10 = alloca i64
%11 = alloca float
%12 = alloca double
store i8 %0, i8* %7
store i16 %1, i16* %8
store i32 %2, i32* %9
store i64 %3, i64* %10
store float %4, float* %11
store double %5, double* %12
%13 = load i8, i8* %7
%14 = sext i8 %13 to i32
%15 = load i16, i16* %8
%16 = sext i16 %15 to i32
%17 = add nsw i32 %14, %16
%18 = load i32, i32* %9
%19 = add nsw i32 %17, %18
%20 = sext i32 %19 to i64
%21 = load i64, i64* %10
%22 = add nsw i64 %20, %21
%23 = sitofp i64 %22 to float
%24 = load float, float* %11
%25 = fadd float %23, %24
%26 = fpext float %25 to double
%27 = load double, double* %12
%28 = fadd double %26, %27
%29 = fptrunc double %28 to float
ret float %29
}

LLVM IR (-O2):
define float @_testfunc_f_bhilfd(i8 signext %0, i16 signext %1, i32 %2, i64 %3, float %4, double %5) {
%7 = sext i8 %0 to i32
%8 = sext i16 %1 to i32
%9 = add nsw i32 %8, %7
%10 = add nsw i32 %9, %2
%11 = sext i32 %10 to i64
%12 = add nsw i64 %11, %3
%13 = sitofp i64 %12 to float
%14 = fadd float %13, %4
%15 = fpext float %14 to double
%16 = fadd double %15, %5
%17 = fptrunc double %16 to float
ret float %17
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0x19() {
  Assert_real((isgraph(25) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              130, ("isgraph should be 0 for 0x19"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x19>:
push   %rbp
mov    %rsp,%rbp
mov    $0x19,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x82,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x19>:
push   %rax
mov    $0x19,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x82,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x19\00"
define void @t_isgraph_0x19() {
%1 = call i64 @isgraph(i32 25)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 130, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x19\00"
define void @t_isgraph_0x19() {
%1 = tail call i64 @isgraph(i32 25)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 130, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int g_DIRECT_call_object(int);
int g_get_object_id(char *);
int g_DIRECT_call_object_byname(char *label) {
  int id;
  if ((id = g_get_object_id(label)) == -1)
    return -1;
  return g_DIRECT_call_object(id);
}


x86 assembly (clang, -O0):
<g_DIRECT_call_object_byname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <g_get_object_id@plt>
mov    %eax,-0x14(%rbp)
cmp    $0xffffffff,%eax
jne    114d <g_DIRECT_call_object_byname+0x2d>
movl   $0xffffffff,-0x4(%rbp)
jmp    1158 <g_DIRECT_call_object_byname+0x38>
mov    -0x14(%rbp),%edi
call   1040 <g_DIRECT_call_object@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_DIRECT_call_object_byname>:
push   %rax
call   1030 <g_get_object_id@plt>
cmp    $0xffffffff,%eax
je     1133 <g_DIRECT_call_object_byname+0x13>
mov    %eax,%edi
pop    %rax
jmp    1040 <g_DIRECT_call_object@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @g_DIRECT_call_object_byname(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @g_get_object_id(i8* %5)
store i32 %6, i32* %4
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %12
9: ; preds = %1
%10 = load i32, i32* %4
%11 = call i32 @g_DIRECT_call_object(i32 %10)
store i32 %11, i32* %2
br label %12
12: ; preds = %9, %8
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @g_DIRECT_call_object_byname(i8* %0) {
%2 = tail call i32 @g_get_object_id(i8* %0)
%3 = icmp eq i32 %2, -1
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @g_DIRECT_call_object(i32 %2)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ -1, %1 ]
ret i32 %7
}
int shiftsome(short s, int n) { return s << n; }


x86 assembly (clang, -O0):
<shiftsome>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %esi,-0x8(%rbp)
movswl -0x2(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shiftsome>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @shiftsome(i16 signext %0, i32 %1) {
%3 = alloca i16
%4 = alloca i32
store i16 %0, i16* %3
store i32 %1, i32* %4
%5 = load i16, i16* %3
%6 = sext i16 %5 to i32
%7 = load i32, i32* %4
%8 = shl i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @shiftsome(i16 signext %0, i32 %1) {
%3 = sext i16 %0 to i32
%4 = shl i32 %3, %1
ret i32 %4
}
char intToHexChar(int n) {
  if (n < 10) {
    return n + '0';
  } else {
    return n - 10 + 'A';
  }
}


x86 assembly (clang, -O0):
<intToHexChar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    111f <intToHexChar+0x1f>
mov    -0x8(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    112b <intToHexChar+0x2b>
mov    -0x8(%rbp),%eax
sub    $0xa,%eax
add    $0x41,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intToHexChar>:
cmp    $0xa,%edi
mov    $0x30,%ecx
mov    $0x37,%eax
cmovl  %ecx,%eax
add    %dil,%al
ret

LLVM IR (-O0):
define signext i8 @intToHexChar(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 48
%9 = trunc i32 %8 to i8
store i8 %9, i8* %2
br label %15
10: ; preds = %1
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 10
%13 = add nsw i32 %12, 65
%14 = trunc i32 %13 to i8
store i8 %14, i8* %2
br label %15
15: ; preds = %10, %6
%16 = load i8, i8* %2
ret i8 %16
}

LLVM IR (-O2):
define signext i8 @intToHexChar(i32 %0) {
%2 = icmp slt i32 %0, 10
%3 = trunc i32 %0 to i8
%4 = select i1 %2, i8 48, i8 55
%5 = add i8 %4, %3
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ sendCmd(int, char *, int, int, char const *);
void sketchText(int fd, char const *text, int x, int y) {
  sendCmd(fd, "text %i %i \"%s\"\n", x, y, text);
}


x86 assembly (clang, -O0):
<sketchText>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%ecx
mov    -0x10(%rbp),%r8
lea    0xec7(%rip),%rsi
call   1030 <sendCmd@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sketchText>:
mov    %rsi,%r8
lea    0xee6(%rip),%rsi
jmp    1030 <sendCmd@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"text %i %i \22%s\22\0A\00"
define void @sketchText(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %7
%11 = load i32, i32* %8
%12 = load i8*, i8** %6
%13 = call i32 @sendCmd(i32 %9, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %11, i8* %12)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"text %i %i \22%s\22\0A\00"
define void @sketchText(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @sendCmd(i32 %0, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %3, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ chaz_ConfWriter_append_conf(char *, char const *,
                                               char const *);
void chaz_ConfWriter_shorten_macro(const char *sym) {
  chaz_ConfWriter_append_conf("  #define %s CHY_%s\n", sym, sym);
}


x86 assembly (clang, -O0):
<chaz_ConfWriter_shorten_macro>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x8(%rbp),%rdx
lea    0xed5(%rip),%rdi
call   1030 <chaz_ConfWriter_append_conf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chaz_ConfWriter_shorten_macro>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
mov    %rdx,%rsi
jmp    1030 <chaz_ConfWriter_append_conf@plt>

LLVM IR (-O0):
@.str = [21 x i8] c" #define %s CHY_%s\0A\00"
define void @chaz_ConfWriter_shorten_macro(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @chaz_ConfWriter_append_conf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [21 x i8] c" #define %s CHY_%s\0A\00"
define void @chaz_ConfWriter_shorten_macro(i8* %0) {
%2 = tail call i32 @chaz_ConfWriter_append_conf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fortchartocfield(char *, int);
int /*<<< orphan*/ gmvwrite_cell_type(int /*<<< orphan*/, int, char *);
void fgmvwrite_cell_type_(char cell_type[], int *nverts, char *nodes) {
  gmvwrite_cell_type(fortchartocfield(cell_type, 8), *nverts, nodes);
}


x86 assembly (clang, -O0):
<fgmvwrite_cell_type_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x8,%esi
call   1030 <fortchartocfield@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
mov    -0x18(%rbp),%rdx
call   1040 <gmvwrite_cell_type@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgmvwrite_cell_type_>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
mov    $0x8,%esi
call   1030 <fortchartocfield@plt>
mov    (%rbx),%esi
mov    %eax,%edi
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <gmvwrite_cell_type@plt>

LLVM IR (-O0):
define void @fgmvwrite_cell_type_(i8* %0, i32* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i8*
store i8* %0, i8** %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = call i32 @fortchartocfield(i8* %7, i32 8)
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = load i8*, i8** %6
%12 = call i32 @gmvwrite_cell_type(i32 %8, i32 %10, i8* %11)
ret void
}

LLVM IR (-O2):
define void @fgmvwrite_cell_type_(i8* %0, i32* nocapture %1, i8* %2) {
%4 = tail call i32 @fortchartocfield(i8* %0, i32 8)
%5 = load i32, i32* %1
%6 = tail call i32 @gmvwrite_cell_type(i32 %4, i32 %5, i8* %2)
ret void
}
/* Variables and functions */
unsigned char gfmultby02(unsigned char);
unsigned char gfmultby09(unsigned char b) {
  return (unsigned char)((int)gfmultby02(gfmultby02(gfmultby02(b))) ^ (int)b);
}


x86 assembly (clang, -O0):
<gfmultby09>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <gfmultby02@plt>
movzbl %al,%edi
call   1030 <gfmultby02@plt>
movzbl %al,%edi
call   1030 <gfmultby02@plt>
movzbl %al,%eax
movzbl -0x1(%rbp),%ecx
xor    %ecx,%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfmultby09>:
push   %rbx
mov    %edi,%ebx
call   1030 <gfmultby02@plt>
movzbl %al,%edi
call   1030 <gfmultby02@plt>
movzbl %al,%edi
call   1030 <gfmultby02@plt>
xor    %bl,%al
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i8 @gfmultby09(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call zeroext i8 @gfmultby02(i8 zeroext %3)
%5 = call zeroext i8 @gfmultby02(i8 zeroext %4)
%6 = call zeroext i8 @gfmultby02(i8 zeroext %5)
%7 = zext i8 %6 to i32
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = xor i32 %7, %9
%11 = trunc i32 %10 to i8
ret i8 %11
}

LLVM IR (-O2):
define zeroext i8 @gfmultby09(i8 zeroext %0) {
%2 = tail call zeroext i8 @gfmultby02(i8 zeroext %0)
%3 = tail call zeroext i8 @gfmultby02(i8 zeroext %2)
%4 = tail call zeroext i8 @gfmultby02(i8 zeroext %3)
%5 = xor i8 %4, %0
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ usleep(double);
void _delay_ms(double __ms) { usleep(__ms * 1000); }


x86 assembly (clang, -O0):
<_delay_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_delay_ms>:
mulsd  0xee8(%rip),%xmm0
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @_delay_ms(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 1.000000e+03
%5 = call i32 @usleep(double %4)
ret void
}

LLVM IR (-O2):
define void @_delay_ms(double %0) {
%2 = fmul double %0, 1.000000e+03
%3 = tail call i32 @usleep(double %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlcpy(char *, char *, int);
char *strrchr(char *, char);
void program_name(char *in, char *out, int size) {
  char *p;
  p = strrchr(in, '/');
  if (p != NULL)
    p++;
  else
    p = in;
  strlcpy(out, p, size);
}


x86 assembly (clang, -O0):
<program_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1030 <strrchr@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     1161 <program_name+0x41>
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    1169 <program_name+0x49>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <strlcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<program_name>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rsi,%rbx
mov    %rdi,%rbp
mov    $0x2f,%esi
call   1030 <strrchr@plt>
lea    0x1(%rax),%rsi
test   %rax,%rax
cmove  %rbp,%rsi
mov    %rbx,%rdi
mov    %r14d,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <strlcpy@plt>

LLVM IR (-O0):
define void @program_name(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = call i8* @strrchr(i8* %8, i8 signext 47)
store i8* %9, i8** %7
%10 = load i8*, i8** %7
%11 = icmp ne i8* %10, null
br i1 %11, label %12, label %15
12: ; preds = %3
%13 = load i8*, i8** %7
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %7
br label %17
15: ; preds = %3
%16 = load i8*, i8** %4
store i8* %16, i8** %7
br label %17
17: ; preds = %15, %12
%18 = load i8*, i8** %5
%19 = load i8*, i8** %7
%20 = load i32, i32* %6
%21 = call i32 @strlcpy(i8* %18, i8* %19, i32 %20)
ret void
}

LLVM IR (-O2):
define void @program_name(i8* %0, i8* %1, i32 %2) {
%4 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 47)
%5 = icmp eq i8* %4, null
%6 = getelementptr inbounds i8, i8* %4, i64 1
%7 = select i1 %5, i8* %0, i8* %6
%8 = tail call i32 @strlcpy(i8* %1, i8* %7, i32 %2)
ret void
}
/* Variables and functions */
int loadBitBltFromwarping(int, int);
int loadWarpBltFrom(int bbObj) { return loadBitBltFromwarping(bbObj, 1); }


x86 assembly (clang, -O0):
<loadWarpBltFrom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <loadBitBltFromwarping@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loadWarpBltFrom>:
mov    $0x1,%esi
jmp    1030 <loadBitBltFromwarping@plt>

LLVM IR (-O0):
define i32 @loadWarpBltFrom(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @loadBitBltFromwarping(i32 %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @loadWarpBltFrom(i32 %0) {
%2 = tail call i32 @loadBitBltFromwarping(i32 %0, i32 1)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ daemonise();
int /*<<< orphan*/ system(char *);
int main(int argc, char *argv[]) {
  daemonise();
  char cmd[22] = "java ClassifierServer";
  system(cmd);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <daemonise@plt>
mov    0xebc(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xeb9(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xeb7(%rip),%eax
mov    %eax,-0x20(%rbp)
mov    0xeb1(%rip),%ax
mov    %ax,-0x1c(%rbp)
lea    -0x30(%rbp),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
xor    %eax,%eax
call   1040 <daemonise@plt>
movaps 0xece(%rip),%xmm0
movaps %xmm0,(%rsp)
movabs $0x72657672655372,%rax
mov    %rax,0xe(%rsp)
mov    %rsp,%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.cmd = [22 x i8] c"java ClassifierServer\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [22 x i8]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 (...) @daemonise()
%8 = bitcast [22 x i8]* %6 to i8*
%9 = getelementptr inbounds [22 x i8], [22 x i8]* %6, i64 0, i64 0
%10 = call i32 @system(i8* %9)
ret i32 0
}

LLVM IR (-O2):
@__const.main.cmd = [22 x i8] c"java ClassifierServer\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [22 x i8]
%4 = tail call i32 (...) @daemonise()
%5 = getelementptr inbounds [22 x i8], [22 x i8]* %3, i64 0, i64 0
%6 = call i32 @system(i8* %5)
ret i32 0
}
unsigned int r2h_bits(int cmd) {
  unsigned int mask = (((cmd) > 0) ? (1 << ((cmd)-1)) : 0);
  if (cmd == 13)
    mask |= ((((14) > 0) ? (1 << ((14) - 1)) : 0) |
             (((9) > 0) ? (1 << ((9) - 1)) : 0) |
             (((15) > 0) ? (1 << ((15) - 1)) : 0) |
             (((4) > 0) ? (1 << ((4) - 1)) : 0));
  else if (cmd == 4)
    mask |= ((((14) > 0) ? (1 << ((14) - 1)) : 0) |
             (((15) > 0) ? (1 << ((15) - 1)) : 0) |
             (((13) > 0) ? (1 << ((13) - 1)) : 0));
  return (mask |= (((32) > 0) ? (1 << ((32) - 1)) : 0));
}


x86 assembly (clang, -O0):
<r2h_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1126 <r2h_bits+0x26>
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0xc(%rbp)
jmp    1130 <r2h_bits+0x30>
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
jmp    1130 <r2h_bits+0x30>
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0xd,-0x4(%rbp)
jne    1150 <r2h_bits+0x50>
mov    -0x8(%rbp),%eax
or     $0x6108,%eax
mov    %eax,-0x8(%rbp)
jmp    116a <r2h_bits+0x6a>
cmpl   $0x4,-0x4(%rbp)
jne    1165 <r2h_bits+0x65>
mov    -0x8(%rbp),%eax
or     $0x7000,%eax
mov    %eax,-0x8(%rbp)
jmp    116a <r2h_bits+0x6a>
mov    -0x8(%rbp),%eax
or     $0x80000000,%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<r2h_bits>:
lea    -0x1(%rdi),%ecx
mov    $0x1,%edx
shl    %cl,%edx
xor    %eax,%eax
test   %edi,%edi
cmovg  %edx,%eax
cmp    $0x4,%edi
je     1126 <r2h_bits+0x26>
cmp    $0xd,%edi
jne    112b <r2h_bits+0x2b>
or     $0x6108,%eax
or     $0x80000000,%eax
ret
or     $0x7000,%eax
or     $0x80000000,%eax
ret

LLVM IR (-O0):
define i32 @r2h_bits(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = shl i32 1, %8
br label %11
10: ; preds = %1
br label %11
11: ; preds = %10, %6
%12 = phi i32 [ %9, %6 ], [ 0, %10 ]
store i32 %12, i32* %3
%13 = load i32, i32* %2
%14 = icmp eq i32 %13, 13
br i1 %14, label %15, label %18
15: ; preds = %11
%16 = load i32, i32* %3
%17 = or i32 %16, 24840
store i32 %17, i32* %3
br label %25
18: ; preds = %11
%19 = load i32, i32* %2
%20 = icmp eq i32 %19, 4
br i1 %20, label %21, label %24
21: ; preds = %18
%22 = load i32, i32* %3
%23 = or i32 %22, 28672
store i32 %23, i32* %3
br label %24
24: ; preds = %21, %18
br label %25
25: ; preds = %24, %15
%26 = load i32, i32* %3
%27 = or i32 %26, -2147483648
store i32 %27, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @r2h_bits(i32 %0) {
%2 = icmp sgt i32 %0, 0
%3 = add nsw i32 %0, -1
%4 = shl nuw i32 1, %3
%5 = select i1 %2, i32 %4, i32 0
switch i32 %0, label %10 [
i32 13, label %6
i32 4, label %8
]
6: ; preds = %1
%7 = or i32 %5, 24840
br label %10
8: ; preds = %1
%9 = or i32 %5, 28672
br label %10
10: ; preds = %1, %8, %6
%11 = phi i32 [ %7, %6 ], [ %9, %8 ], [ %5, %1 ]
%12 = or i32 %11, -2147483648
ret i32 %12
}
/* Variables and functions */
char *strings_trim_imp(char *, int);
char *strings_trim_back(char *string) { return strings_trim_imp(string, 2); }


x86 assembly (clang, -O0):
<strings_trim_back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
call   1030 <strings_trim_imp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strings_trim_back>:
mov    $0x2,%esi
jmp    1030 <strings_trim_imp@plt>

LLVM IR (-O0):
define i8* @strings_trim_back(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @strings_trim_imp(i8* %3, i32 2)
ret i8* %4
}

LLVM IR (-O2):
define i8* @strings_trim_back(i8* %0) {
%2 = tail call i8* @strings_trim_imp(i8* %0, i32 2)
ret i8* %2
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, int const, int const,
                            int const, int const);
const char *ipv4_addr_to_string(const uint32_t addr) {
  static char buf[64];
  snprintf(buf, sizeof(buf), "%d.%d.%d.%d", (addr >> 24) & 0xff,
           (addr >> 16) & 0xff, (addr >> 8) & 0xff, (addr & 0xff));
  return buf;
}


x86 assembly (clang, -O0):
<ipv4_addr_to_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
sar    $0x18,%ecx
and    $0xff,%ecx
mov    -0x4(%rbp),%r8d
sar    $0x10,%r8d
and    $0xff,%r8d
mov    -0x4(%rbp),%r9d
sar    $0x8,%r9d
and    $0xff,%r9d
mov    -0x4(%rbp),%eax
and    $0xff,%eax
lea    0x2eec(%rip),%rdi
mov    $0x40,%esi
lea    0xea0(%rip),%rdx
mov    %eax,(%rsp)
call   1030 <snprintf@plt>
lea    0x2ed1(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipv4_addr_to_string>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ecx
mov    %edi,%eax
movzbl %ch,%ebp
movzbl %cl,%edx
shr    $0x18,%ecx
shr    $0x10,%eax
movzbl %al,%r8d
mov    %edx,(%rsp)
lea    0x2f0f(%rip),%rbx
lea    0xec8(%rip),%rdx
mov    %rbx,%rdi
mov    $0x40,%esi
mov    %ebp,%r9d
call   1030 <snprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@ipv4_addr_to_string.buf = internal global [64 x i8] zeroinitializer
@.str = [12 x i8] c"%d.%d.%d.%d\00"
define i8* @ipv4_addr_to_string(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 24
%5 = and i32 %4, 255
%6 = load i32, i32* %2
%7 = ashr i32 %6, 16
%8 = and i32 %7, 255
%9 = load i32, i32* %2
%10 = ashr i32 %9, 8
%11 = and i32 %10, 255
%12 = load i32, i32* %2
%13 = and i32 %12, 255
%14 = call i32 @snprintf(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @ipv4_addr_to_string.buf, i64 0, i64 0), i32 64, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %8, i32 %11, i32 %13)
ret i8* getelementptr inbounds ([64 x i8], [64 x i8]* @ipv4_addr_to_string.buf, i64 0, i64 0)
}

LLVM IR (-O2):
@ipv4_addr_to_string.buf = internal global [64 x i8] zeroinitializer
@.str = [12 x i8] c"%d.%d.%d.%d\00"
define i8* @ipv4_addr_to_string(i32 %0) {
%2 = lshr i32 %0, 24
%3 = lshr i32 %0, 16
%4 = and i32 %3, 255
%5 = lshr i32 %0, 8
%6 = and i32 %5, 255
%7 = and i32 %0, 255
%8 = tail call i32 @snprintf(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @ipv4_addr_to_string.buf, i64 0, i64 0), i32 64, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %4, i32 %6, i32 %7)
ret i8* getelementptr inbounds ([64 x i8], [64 x i8]* @ipv4_addr_to_string.buf, i64 0, i64 0)
}
/* Variables and functions */
void *av_malloc(unsigned int);
void *av_mallocUncached(unsigned int size) {
  void *buffer = av_malloc(size);
  return buffer;
}


x86 assembly (clang, -O0):
<av_mallocUncached>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <av_malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_mallocUncached>:
jmp    1030 <av_malloc@plt>

LLVM IR (-O0):
define i8* @av_mallocUncached(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @av_malloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
ret i8* %6
}

LLVM IR (-O2):
define i8* @av_mallocUncached(i32 %0) {
%2 = tail call i8* @av_malloc(i32 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage() { printf("usage: %s  in_filename out_filename\n"); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"usage: %s in_filename out_filename\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [37 x i8] c"usage: %s in_filename out_filename\0A\00"
define void @usage() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
ret void
}
unsigned long long pgt_popcount(unsigned long long _value) {
  return __builtin_popcount(_value);
}


x86 assembly (clang, -O0):
<pgt_popcount>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%ecx
mov    %ecx,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%ecx
mov    %ecx,%eax
and    $0x33333333,%eax
shr    $0x2,%ecx
and    $0x33333333,%ecx
add    %ecx,%eax
mov    %eax,%ecx
shr    $0x4,%ecx
add    %ecx,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<pgt_popcount>:
mov    %edi,%eax
shr    %eax
and    $0x55555555,%eax
sub    %eax,%edi
mov    %edi,%eax
and    $0x33333333,%eax
shr    $0x2,%edi
and    $0x33333333,%edi
add    %eax,%edi
mov    %edi,%eax
shr    $0x4,%eax
add    %edi,%eax
and    $0xf0f0f0f,%eax
imul   $0x1010101,%eax,%eax
shr    $0x18,%eax
ret

LLVM IR (-O0):
define i64 @pgt_popcount(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = call i32 @llvm.ctpop.i32(i32 %4)
%6 = sext i32 %5 to i64
ret i64 %6
}

LLVM IR (-O2):
define i64 @pgt_popcount(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 @llvm.ctpop.i32(i32 %2)
%4 = zext i32 %3 to i64
ret i64 %4
}
/* Variables and functions */
char pop();
int /*<<< orphan*/ putc(char, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void emit() {
  char c = pop();
  putc(c, stdout);
}


x86 assembly (clang, -O0):
<emit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <pop@plt>
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
mov    0x2ea4(%rip),%rcx
mov    (%rcx),%esi
movsbl %al,%edi
call   1040 <putc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit>:
push   %rax
xor    %eax,%eax
call   1030 <pop@plt>
mov    0x2eb1(%rip),%rcx
mov    (%rcx),%esi
movsbl %al,%edi
pop    %rax
jmp    1040 <putc@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @emit() {
%1 = alloca i8
%2 = call signext i8 (...) @pop()
store i8 %2, i8* %1
%3 = load i8, i8* %1
%4 = load i32, i32* @stdout
%5 = call i32 @putc(i8 signext %3, i32 %4)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @emit() {
%1 = tail call signext i8 (...) @pop()
%2 = load i32, i32* @stdout
%3 = tail call i32 @putc(i8 signext %1, i32 %2)
ret void
}
int test4(int x, int y) {
  if (x & y) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
cmp    $0x0,%eax
je     1125 <test4+0x25>
movl   $0x1,-0x4(%rbp)
jmp    112c <test4+0x2c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
xor    %eax,%eax
test   %edi,%esi
setne  %al
ret

LLVM IR (-O0):
define i32 @test4(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = and i32 %6, %7
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 1, i32* %3
br label %12
11: ; preds = %2
store i32 0, i32* %3
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @test4(i32 %0, i32 %1) {
%3 = and i32 %1, %0
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
void dill_print_size(char x) {}


x86 assembly (clang, -O0):
<dill_print_size>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<dill_print_size>:
ret

LLVM IR (-O0):
define void @dill_print_size(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @dill_print_size(i8 signext %0) {
ret void
}
int cairo_code_draw_lushShapeLabel_get_width() { return 52; }


x86 assembly (clang, -O0):
<cairo_code_draw_lushShapeLabel_get_width>:
push   %rbp
mov    %rsp,%rbp
mov    $0x34,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cairo_code_draw_lushShapeLabel_get_width>:
mov    $0x34,%eax
ret

LLVM IR (-O0):
define i32 @cairo_code_draw_lushShapeLabel_get_width() {
ret i32 52
}

LLVM IR (-O2):
define i32 @cairo_code_draw_lushShapeLabel_get_width() {
ret i32 52
}
/* Variables and functions */
int /*<<< orphan*/ smp_test_list_create();
void smp_test_list_main() { smp_test_list_create(); }


x86 assembly (clang, -O0):
<smp_test_list_main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <smp_test_list_create@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_test_list_main>:
xor    %eax,%eax
jmp    1030 <smp_test_list_create@plt>

LLVM IR (-O0):
define void @smp_test_list_main() {
%1 = call i32 (...) @smp_test_list_create()
ret void
}

LLVM IR (-O2):
define void @smp_test_list_main() {
%1 = tail call i32 (...) @smp_test_list_create()
ret void
}
int CG_OwnerDrawWidth(int ownerDraw, float scale) { return 0; }


x86 assembly (clang, -O0):
<CG_OwnerDrawWidth>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CG_OwnerDrawWidth>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @CG_OwnerDrawWidth(i32 %0, float %1) {
%3 = alloca i32
%4 = alloca float
store i32 %0, i32* %3
store float %1, float* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @CG_OwnerDrawWidth(i32 %0, float %1) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateRTCSSMatchSet(uint32_t ui32Match, uint32_t ui32Value) {
  ;
  (*((volatile uint32_t *)(0x400FC028))) = ui32Value << 16;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateRTCSSMatchSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%ecx
shl    $0x10,%ecx
mov    $0x400fc028,%eax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateRTCSSMatchSet>:
shl    $0x10,%esi
mov    %esi,0x400fc028
xor    %eax,%eax
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateRTCSSMatchSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 %5, 16
store volatile i32 %6, i32* inttoptr (i64 1074774056 to i32*)
%7 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateRTCSSMatchSet(i32 %0, i32 %1) {
%3 = shl i32 %1, 16
store volatile i32 %3, i32* inttoptr (i64 1074774056 to i32*)
%4 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sem_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int sem_post(int /*<<< orphan*/ *);
int semaRelease(sem_t *sem, char *name) {
  int rc;
  rc = sem_post(sem);
  printf("[Work_%s] - Release Resource\n", name);
  return rc;
}


x86 assembly (clang, -O0):
<semaRelease>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <sem_post@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semaRelease>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1040 <sem_post@plt>
mov    %eax,%ebp
lea    0xecc(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [30 x i8] c"[Work_%s] - Release Resource\0A\00"
define i32 @semaRelease(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i32
store i32* %0, i32** %3
store i8* %1, i8** %4
%6 = load i32*, i32** %3
%7 = call i32 @sem_post(i32* %6)
store i32 %7, i32* %5
%8 = load i8*, i8** %4
%9 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = load i32, i32* %5
ret i32 %10
}

LLVM IR (-O2):
@.str = [30 x i8] c"[Work_%s] - Release Resource\0A\00"
define i32 @semaRelease(i32* %0, i8* %1) {
%3 = tail call i32 @sem_post(i32* %0)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ gen(char *);
void cgneg(void) { gen("negl\t%eax"); }


x86 assembly (clang, -O0):
<cgneg>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <gen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgneg>:
lea    0xee9(%rip),%rdi
jmp    1030 <gen@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"negl\09%eax\00"
define void @cgneg() {
%1 = call i32 @gen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"negl\09%eax\00"
define void @cgneg() {
%1 = tail call i32 @gen(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}
void nested_loop4_Bad() {
  double arr[10];
  int i, j;
  for (i = 0; i < 10; i++) {
    for (j = 5; j <= 15; j++) {
      arr[j - 5] = 0.0;
    }
  }
}


x86 assembly (clang, -O0):
<nested_loop4_Bad>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x54(%rbp)
cmpl   $0xa,-0x54(%rbp)
jge    1158 <nested_loop4_Bad+0x58>
movl   $0x5,-0x58(%rbp)
cmpl   $0xf,-0x58(%rbp)
jg     1145 <nested_loop4_Bad+0x45>
mov    -0x58(%rbp),%eax
sub    $0x5,%eax
cltq
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x50(%rbp,%rax,8)
mov    -0x58(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x58(%rbp)
jmp    111c <nested_loop4_Bad+0x1c>
jmp    114a <nested_loop4_Bad+0x4a>
mov    -0x54(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x54(%rbp)
jmp    110b <nested_loop4_Bad+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nested_loop4_Bad>:
ret

LLVM IR (-O0):
define void @nested_loop4_Bad() {
%1 = alloca [10 x double]
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %2
br label %4
4: ; preds = %20, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %23
7: ; preds = %4
store i32 5, i32* %3
br label %8
8: ; preds = %16, %7
%9 = load i32, i32* %3
%10 = icmp sle i32 %9, 15
br i1 %10, label %11, label %19
11: ; preds = %8
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds [10 x double], [10 x double]* %1, i64 0, i64 %14
store double 0.000000e+00, double* %15
br label %16
16: ; preds = %11
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %8
19: ; preds = %8
br label %20
20: ; preds = %19
%21 = load i32, i32* %2
%22 = add nsw i32 %21, 1
store i32 %22, i32* %2
br label %4
23: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @nested_loop4_Bad() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void vprint(int n, double *vec) {
  int i;
  for (i = 0; i < n; i++)
    printf(" %8.3lf \n", vec[i]);
  printf("\n");
}


x86 assembly (clang, -O0):
<vprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    115b <vprint+0x4b>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
lea    0xeba(%rip),%rdi
mov    $0x1,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <vprint+0x16>
lea    0xea6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vprint>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edi,%edi
jle    1159 <vprint+0x39>
mov    %rsi,%r15
mov    %edi,%r12d
xor    %ebx,%ebx
lea    0xec5(%rip),%r14
nopl   0x0(%rax,%rax,1)
movsd  (%r15,%rbx,8),%xmm0
mov    %r14,%rdi
mov    $0x1,%al
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <vprint+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [10 x i8] c" %8.3lf \0A\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @vprint(i32 %0, double* %1) {
%3 = alloca i32
%4 = alloca double*
%5 = alloca i32
store i32 %0, i32* %3
store double* %1, double** %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load double*, double** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds double, double* %11, i64 %13
%15 = load double, double* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), double %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c" %8.3lf \0A\00"
define void @vprint(i32 %0, double* nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds double, double* %1, i64 %7
%9 = load double, double* %8
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), double %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
void *malloc_locked_func(size_t);
void *default_malloc_locked_ex(size_t num, const char *file, int line) {
  return malloc_locked_func(num);
}


x86 assembly (clang, -O0):
<default_malloc_locked_ex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc_locked_func@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_malloc_locked_ex>:
jmp    1030 <malloc_locked_func@plt>

LLVM IR (-O0):
define i8* @default_malloc_locked_ex(i64 %0, i8* %1, i32 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i32
store i64 %0, i64* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i64, i64* %4
%8 = call i8* @malloc_locked_func(i64 %7)
ret i8* %8
}

LLVM IR (-O2):
define i8* @default_malloc_locked_ex(i64 %0, i8* nocapture readnone %1, i32 %2) {
%4 = tail call i8* @malloc_locked_func(i64 %0)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char const *);
void ereport(const char *msg) {
  printf("%s\n", msg);
  assert(0);
}


x86 assembly (clang, -O0):
<ereport>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ereport>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @ereport(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @assert(i32 0)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @ereport(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @assert(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int socket_error(int i) {
  printf("Error creating socket %d\n", i);
  return 0;
}


x86 assembly (clang, -O0):
<socket_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<socket_error>:
push   %rax
mov    %edi,%esi
lea    0xee6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Error creating socket %d\0A\00"
define i32 @socket_error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [26 x i8] c"Error creating socket %d\0A\00"
define i32 @socket_error(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ isAObject(int);
int /*<<< orphan*/ output(char *);
int /*<<< orphan*/ showInstance(int);
int /*<<< orphan*/ sprintf(char *, char *, int);
void showObject(int obj) {
  char str[80];
  if (!isAObject(obj)) {
    sprintf(str, "Instance %d is not an object", obj);
    output(str);
    return;
  }
  showInstance(obj);
}


x86 assembly (clang, -O0):
<showObject>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <isAObject@plt>
cmp    $0x0,%eax
jne    117d <showObject+0x3d>
lea    -0x60(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xe96(%rip),%rsi
call   1060 <sprintf@plt>
lea    -0x60(%rbp),%rdi
call   1030 <output@plt>
jmp    1185 <showObject+0x45>
mov    -0x4(%rbp),%edi
call   1040 <showInstance@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<showObject>:
push   %r14
push   %rbx
sub    $0x58,%rsp
mov    %edi,%ebx
call   1050 <isAObject@plt>
test   %eax,%eax
je     1160 <showObject+0x20>
mov    %ebx,%edi
add    $0x58,%rsp
pop    %rbx
pop    %r14
jmp    1040 <showInstance@plt>
lea    0xe99(%rip),%rsi
mov    %rsp,%r14
mov    %r14,%rdi
mov    %ebx,%edx
call   1060 <sprintf@plt>
mov    %r14,%rdi
call   1030 <output@plt>
add    $0x58,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [29 x i8] c"Instance %d is not an object\00"
define void @showObject(i32 %0) {
%2 = alloca i32
%3 = alloca [80 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @isAObject(i32 %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1
%8 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 0
%9 = load i32, i32* %2
%10 = call i32 @sprintf(i8* %8, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 0
%12 = call i32 @output(i8* %11)
br label %16
13: ; preds = %1
%14 = load i32, i32* %2
%15 = call i32 @showInstance(i32 %14)
br label %16
16: ; preds = %13, %7
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"Instance %d is not an object\00"
define void @showObject(i32 %0) {
%2 = alloca [80 x i8]
%3 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%4 = tail call i32 @isAObject(i32 %0)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i32 %0)
%8 = call i32 @output(i8* %3)
br label %11
9: ; preds = %1
%10 = tail call i32 @showInstance(i32 %0)
br label %11
11: ; preds = %9, %6
ret void
}
/* Variables and functions */
int LZ5_compress_HC_extStateHC(void *, char const *, char *, int, int);
int LZ5_compressHC_limitedOutput_withStateHC(void *state, const char *src,
                                             char *dst, int srcSize,
                                             int maxDstSize) {
  return LZ5_compress_HC_extStateHC(state, src, dst, srcSize, maxDstSize);
}


x86 assembly (clang, -O0):
<LZ5_compressHC_limitedOutput_withStateHC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
call   1030 <LZ5_compress_HC_extStateHC@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ5_compressHC_limitedOutput_withStateHC>:
jmp    1030 <LZ5_compress_HC_extStateHC@plt>

LLVM IR (-O0):
define i32 @LZ5_compressHC_limitedOutput_withStateHC(i8* %0, i8* %1, i8* %2, i32 %3, i32 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = load i32, i32* %9
%15 = load i32, i32* %10
%16 = call i32 @LZ5_compress_HC_extStateHC(i8* %11, i8* %12, i8* %13, i32 %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @LZ5_compressHC_limitedOutput_withStateHC(i8* %0, i8* %1, i8* %2, i32 %3, i32 %4) {
%6 = tail call i32 @LZ5_compress_HC_extStateHC(i8* %0, i8* %1, i8* %2, i32 %3, i32 %4)
ret i32 %6
}