void MDreverse(unsigned int *X) {
  register unsigned int t;
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
  {
    t = (*X << 16) | (*X >> 16);
    *X++ = ((t & 0xFF00FF00) >> 8) | ((t & 0x00FF00FF) << 8);
  };
}


x86 assembly (clang, -O0):
<MDreverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
shl    $0x10,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%ecx
shr    $0x10,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00ff00,%ecx
shr    $0x8,%ecx
mov    -0xc(%rbp),%eax
and    $0xff00ff,%eax
shl    $0x8,%eax
or     %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x8(%rbp)
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<MDreverse>:
pxor   %xmm0,%xmm0
movdqu (%rdi),%xmm2
movdqu 0x10(%rdi),%xmm3
movdqu 0x20(%rdi),%xmm4
movdqu 0x30(%rdi),%xmm1
movdqa %xmm2,%xmm5
punpckhbw %xmm0,%xmm5
pshuflw $0x1b,%xmm5,%xmm5
pshufhw $0x1b,%xmm5,%xmm5
punpcklbw %xmm0,%xmm2
pshuflw $0x1b,%xmm2,%xmm2
pshufhw $0x1b,%xmm2,%xmm2
packuswb %xmm5,%xmm2
movdqu %xmm2,(%rdi)
movdqa %xmm3,%xmm2
punpckhbw %xmm0,%xmm2
pshuflw $0x1b,%xmm2,%xmm2
pshufhw $0x1b,%xmm2,%xmm2
punpcklbw %xmm0,%xmm3
pshuflw $0x1b,%xmm3,%xmm3
pshufhw $0x1b,%xmm3,%xmm3
packuswb %xmm2,%xmm3
movdqu %xmm3,0x10(%rdi)
movdqa %xmm4,%xmm2
punpckhbw %xmm0,%xmm2
pshuflw $0x1b,%xmm2,%xmm2
pshufhw $0x1b,%xmm2,%xmm2
punpcklbw %xmm0,%xmm4
pshuflw $0x1b,%xmm4,%xmm3
pshufhw $0x1b,%xmm3,%xmm3
packuswb %xmm2,%xmm3
movdqu %xmm3,0x20(%rdi)
movdqa %xmm1,%xmm2
punpckhbw %xmm0,%xmm2
pshuflw $0x1b,%xmm2,%xmm2
pshufhw $0x1b,%xmm2,%xmm2
punpcklbw %xmm0,%xmm1
pshuflw $0x1b,%xmm1,%xmm0
pshufhw $0x1b,%xmm0,%xmm0
packuswb %xmm2,%xmm0
movdqu %xmm0,0x30(%rdi)
ret

LLVM IR (-O0):
define void @MDreverse(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = shl i32 %5, 16
%7 = load i32*, i32** %2
%8 = load i32, i32* %7
%9 = lshr i32 %8, 16
%10 = or i32 %6, %9
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = and i32 %11, -16711936
%13 = lshr i32 %12, 8
%14 = load i32, i32* %3
%15 = and i32 %14, 16711935
%16 = shl i32 %15, 8
%17 = or i32 %13, %16
%18 = load i32*, i32** %2
%19 = getelementptr inbounds i32, i32* %18, i32 1
store i32* %19, i32** %2
store i32 %17, i32* %18
%20 = load i32*, i32** %2
%21 = load i32, i32* %20
%22 = shl i32 %21, 16
%23 = load i32*, i32** %2
%24 = load i32, i32* %23
%25 = lshr i32 %24, 16
%26 = or i32 %22, %25
store i32 %26, i32* %3
%27 = load i32, i32* %3
%28 = and i32 %27, -16711936
%29 = lshr i32 %28, 8
%30 = load i32, i32* %3
%31 = and i32 %30, 16711935
%32 = shl i32 %31, 8
%33 = or i32 %29, %32
%34 = load i32*, i32** %2
%35 = getelementptr inbounds i32, i32* %34, i32 1
store i32* %35, i32** %2
store i32 %33, i32* %34
%36 = load i32*, i32** %2
%37 = load i32, i32* %36
%38 = shl i32 %37, 16
%39 = load i32*, i32** %2
%40 = load i32, i32* %39
%41 = lshr i32 %40, 16
%42 = or i32 %38, %41
store i32 %42, i32* %3
%43 = load i32, i32* %3
%44 = and i32 %43, -16711936
%45 = lshr i32 %44, 8
%46 = load i32, i32* %3
%47 = and i32 %46, 16711935
%48 = shl i32 %47, 8
%49 = or i32 %45, %48
%50 = load i32*, i32** %2
%51 = getelementptr inbounds i32, i32* %50, i32 1
store i32* %51, i32** %2
store i32 %49, i32* %50
%52 = load i32*, i32** %2
%53 = load i32, i32* %52
%54 = shl i32 %53, 16
%55 = load i32*, i32** %2
%56 = load i32, i32* %55
%57 = lshr i32 %56, 16
%58 = or i32 %54, %57
store i32 %58, i32* %3
%59 = load i32, i32* %3
%60 = and i32 %59, -16711936
%61 = lshr i32 %60, 8
%62 = load i32, i32* %3
%63 = and i32 %62, 16711935
%64 = shl i32 %63, 8
%65 = or i32 %61, %64
%66 = load i32*, i32** %2
%67 = getelementptr inbounds i32, i32* %66, i32 1
store i32* %67, i32** %2
store i32 %65, i32* %66
%68 = load i32*, i32** %2
%69 = load i32, i32* %68
%70 = shl i32 %69, 16
%71 = load i32*, i32** %2
%72 = load i32, i32* %71
%73 = lshr i32 %72, 16
%74 = or i32 %70, %73
store i32 %74, i32* %3
%75 = load i32, i32* %3
%76 = and i32 %75, -16711936
%77 = lshr i32 %76, 8
%78 = load i32, i32* %3
%79 = and i32 %78, 16711935
%80 = shl i32 %79, 8
%81 = or i32 %77, %80
%82 = load i32*, i32** %2
%83 = getelementptr inbounds i32, i32* %82, i32 1
store i32* %83, i32** %2
store i32 %81, i32* %82
%84 = load i32*, i32** %2
%85 = load i32, i32* %84
%86 = shl i32 %85, 16
%87 = load i32*, i32** %2
%88 = load i32, i32* %87
%89 = lshr i32 %88, 16
%90 = or i32 %86, %89
store i32 %90, i32* %3
%91 = load i32, i32* %3
%92 = and i32 %91, -16711936
%93 = lshr i32 %92, 8
%94 = load i32, i32* %3
%95 = and i32 %94, 16711935
%96 = shl i32 %95, 8
%97 = or i32 %93, %96
%98 = load i32*, i32** %2
%99 = getelementptr inbounds i32, i32* %98, i32 1
store i32* %99, i32** %2
store i32 %97, i32* %98
%100 = load i32*, i32** %2
%101 = load i32, i32* %100
%102 = shl i32 %101, 16
%103 = load i32*, i32** %2
%104 = load i32, i32* %103
%105 = lshr i32 %104, 16
%106 = or i32 %102, %105
store i32 %106, i32* %3
%107 = load i32, i32* %3
%108 = and i32 %107, -16711936
%109 = lshr i32 %108, 8
%110 = load i32, i32* %3
%111 = and i32 %110, 16711935
%112 = shl i32 %111, 8
%113 = or i32 %109, %112
%114 = load i32*, i32** %2
%115 = getelementptr inbounds i32, i32* %114, i32 1
store i32* %115, i32** %2
store i32 %113, i32* %114
%116 = load i32*, i32** %2
%117 = load i32, i32* %116
%118 = shl i32 %117, 16
%119 = load i32*, i32** %2
%120 = load i32, i32* %119
%121 = lshr i32 %120, 16
%122 = or i32 %118, %121
store i32 %122, i32* %3
%123 = load i32, i32* %3
%124 = and i32 %123, -16711936
%125 = lshr i32 %124, 8
%126 = load i32, i32* %3
%127 = and i32 %126, 16711935
%128 = shl i32 %127, 8
%129 = or i32 %125, %128
%130 = load i32*, i32** %2
%131 = getelementptr inbounds i32, i32* %130, i32 1
store i32* %131, i32** %2
store i32 %129, i32* %130
%132 = load i32*, i32** %2
%133 = load i32, i32* %132
%134 = shl i32 %133, 16
%135 = load i32*, i32** %2
%136 = load i32, i32* %135
%137 = lshr i32 %136, 16
%138 = or i32 %134, %137
store i32 %138, i32* %3
%139 = load i32, i32* %3
%140 = and i32 %139, -16711936
%141 = lshr i32 %140, 8
%142 = load i32, i32* %3
%143 = and i32 %142, 16711935
%144 = shl i32 %143, 8
%145 = or i32 %141, %144
%146 = load i32*, i32** %2
%147 = getelementptr inbounds i32, i32* %146, i32 1
store i32* %147, i32** %2
store i32 %145, i32* %146
%148 = load i32*, i32** %2
%149 = load i32, i32* %148
%150 = shl i32 %149, 16
%151 = load i32*, i32** %2
%152 = load i32, i32* %151
%153 = lshr i32 %152, 16
%154 = or i32 %150, %153
store i32 %154, i32* %3
%155 = load i32, i32* %3
%156 = and i32 %155, -16711936
%157 = lshr i32 %156, 8
%158 = load i32, i32* %3
%159 = and i32 %158, 16711935
%160 = shl i32 %159, 8
%161 = or i32 %157, %160
%162 = load i32*, i32** %2
%163 = getelementptr inbounds i32, i32* %162, i32 1
store i32* %163, i32** %2
store i32 %161, i32* %162
%164 = load i32*, i32** %2
%165 = load i32, i32* %164
%166 = shl i32 %165, 16
%167 = load i32*, i32** %2
%168 = load i32, i32* %167
%169 = lshr i32 %168, 16
%170 = or i32 %166, %169
store i32 %170, i32* %3
%171 = load i32, i32* %3
%172 = and i32 %171, -16711936
%173 = lshr i32 %172, 8
%174 = load i32, i32* %3
%175 = and i32 %174, 16711935
%176 = shl i32 %175, 8
%177 = or i32 %173, %176
%178 = load i32*, i32** %2
%179 = getelementptr inbounds i32, i32* %178, i32 1
store i32* %179, i32** %2
store i32 %177, i32* %178
%180 = load i32*, i32** %2
%181 = load i32, i32* %180
%182 = shl i32 %181, 16
%183 = load i32*, i32** %2
%184 = load i32, i32* %183
%185 = lshr i32 %184, 16
%186 = or i32 %182, %185
store i32 %186, i32* %3
%187 = load i32, i32* %3
%188 = and i32 %187, -16711936
%189 = lshr i32 %188, 8
%190 = load i32, i32* %3
%191 = and i32 %190, 16711935
%192 = shl i32 %191, 8
%193 = or i32 %189, %192
%194 = load i32*, i32** %2
%195 = getelementptr inbounds i32, i32* %194, i32 1
store i32* %195, i32** %2
store i32 %193, i32* %194
%196 = load i32*, i32** %2
%197 = load i32, i32* %196
%198 = shl i32 %197, 16
%199 = load i32*, i32** %2
%200 = load i32, i32* %199
%201 = lshr i32 %200, 16
%202 = or i32 %198, %201
store i32 %202, i32* %3
%203 = load i32, i32* %3
%204 = and i32 %203, -16711936
%205 = lshr i32 %204, 8
%206 = load i32, i32* %3
%207 = and i32 %206, 16711935
%208 = shl i32 %207, 8
%209 = or i32 %205, %208
%210 = load i32*, i32** %2
%211 = getelementptr inbounds i32, i32* %210, i32 1
store i32* %211, i32** %2
store i32 %209, i32* %210
%212 = load i32*, i32** %2
%213 = load i32, i32* %212
%214 = shl i32 %213, 16
%215 = load i32*, i32** %2
%216 = load i32, i32* %215
%217 = lshr i32 %216, 16
%218 = or i32 %214, %217
store i32 %218, i32* %3
%219 = load i32, i32* %3
%220 = and i32 %219, -16711936
%221 = lshr i32 %220, 8
%222 = load i32, i32* %3
%223 = and i32 %222, 16711935
%224 = shl i32 %223, 8
%225 = or i32 %221, %224
%226 = load i32*, i32** %2
%227 = getelementptr inbounds i32, i32* %226, i32 1
store i32* %227, i32** %2
store i32 %225, i32* %226
%228 = load i32*, i32** %2
%229 = load i32, i32* %228
%230 = shl i32 %229, 16
%231 = load i32*, i32** %2
%232 = load i32, i32* %231
%233 = lshr i32 %232, 16
%234 = or i32 %230, %233
store i32 %234, i32* %3
%235 = load i32, i32* %3
%236 = and i32 %235, -16711936
%237 = lshr i32 %236, 8
%238 = load i32, i32* %3
%239 = and i32 %238, 16711935
%240 = shl i32 %239, 8
%241 = or i32 %237, %240
%242 = load i32*, i32** %2
%243 = getelementptr inbounds i32, i32* %242, i32 1
store i32* %243, i32** %2
store i32 %241, i32* %242
%244 = load i32*, i32** %2
%245 = load i32, i32* %244
%246 = shl i32 %245, 16
%247 = load i32*, i32** %2
%248 = load i32, i32* %247
%249 = lshr i32 %248, 16
%250 = or i32 %246, %249
store i32 %250, i32* %3
%251 = load i32, i32* %3
%252 = and i32 %251, -16711936
%253 = lshr i32 %252, 8
%254 = load i32, i32* %3
%255 = and i32 %254, 16711935
%256 = shl i32 %255, 8
%257 = or i32 %253, %256
%258 = load i32*, i32** %2
%259 = getelementptr inbounds i32, i32* %258, i32 1
store i32* %259, i32** %2
store i32 %257, i32* %258
ret void
}

LLVM IR (-O2):
define void @MDreverse(i32* nocapture %0) {
%2 = bitcast i32* %0 to <4 x i32>*
%3 = load <4 x i32>, <4 x i32>* %2
%4 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %3)
%5 = getelementptr inbounds i32, i32* %0, i64 4
%6 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> %4, <4 x i32>* %6
%7 = bitcast i32* %5 to <4 x i32>*
%8 = load <4 x i32>, <4 x i32>* %7
%9 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %8)
%10 = getelementptr inbounds i32, i32* %0, i64 8
%11 = bitcast i32* %5 to <4 x i32>*
store <4 x i32> %9, <4 x i32>* %11
%12 = bitcast i32* %10 to <4 x i32>*
%13 = load <4 x i32>, <4 x i32>* %12
%14 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %13)
%15 = getelementptr inbounds i32, i32* %0, i64 12
%16 = bitcast i32* %10 to <4 x i32>*
store <4 x i32> %14, <4 x i32>* %16
%17 = bitcast i32* %15 to <4 x i32>*
%18 = load <4 x i32>, <4 x i32>* %17
%19 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %18)
%20 = bitcast i32* %15 to <4 x i32>*
store <4 x i32> %19, <4 x i32>* %20
ret void
}