xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int wchar_t;

/* Variables and functions */
int towlower(int);
void wcstolower(wchar_t s[]) {
  while (*s != L'\0') {
    *s = towlower(*s);
    s++;
  }
}


x86 assembly (clang, -O0):
<wcstolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
je     114d <wcstolower+0x3d>
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <towlower@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <wcstolower+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcstolower>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%edi
test   %edi,%edi
je     1132 <wcstolower+0x22>
add    $0x4,%rbx
xchg   %ax,%ax
call   1030 <towlower@plt>
mov    %eax,-0x4(%rbx)
mov    (%rbx),%edi
add    $0x4,%rbx
test   %edi,%edi
jne    1120 <wcstolower+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @wcstolower(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
br label %3
3: ; preds = %7, %1
%4 = load i32*, i32** %2
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = load i32*, i32** %2
%9 = load i32, i32* %8
%10 = call i32 @towlower(i32 %9)
%11 = load i32*, i32** %2
store i32 %10, i32* %11
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i32 1
store i32* %13, i32** %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @wcstolower(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = icmp eq i32 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %9, %4 ], [ %2, %1 ]
%6 = phi i32* [ %8, %4 ], [ %0, %1 ]
%7 = tail call i32 @towlower(i32 %5)
store i32 %7, i32* %6
%8 = getelementptr inbounds i32, i32* %6, i64 1
%9 = load i32, i32* %8
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
void vk(volatile int *vp) {
  int *p = vp;
  (void)p;
}


x86 assembly (clang, -O0):
<vk>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vk>:
ret

LLVM IR (-O0):
define void @vk(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
store i32* %0, i32** %2
%4 = load i32*, i32** %2
store i32* %4, i32** %3
%5 = load i32*, i32** %3
ret void
}

LLVM IR (-O2):
define void @vk(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GL_PROJECTION;
int /*<<< orphan*/ glLoadIdentity();
int /*<<< orphan*/ glMatrixMode(int /*<<< orphan*/);
int /*<<< orphan*/ glOrtho(double, double, double, double, int, int);
void geom(int w, int h) {
  glMatrixMode(GL_PROJECTION);
  glLoadIdentity();
  glOrtho(-2.4, 2.4, -2.4, 2.4, -25, 25);
}


x86 assembly (clang, -O0):
<geom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
mov    $0x0,%al
call   1050 <glLoadIdentity@plt>
movsd  0xea5(%rip),%xmm2
movsd  0xea5(%rip),%xmm3
mov    $0xffffffe7,%edi
mov    $0x19,%esi
movaps %xmm2,%xmm0
movaps %xmm3,%xmm1
call   1040 <glOrtho@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<geom>:
push   %rax
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
call   1030 <glMatrixMode@plt>
xor    %eax,%eax
call   1050 <glLoadIdentity@plt>
movsd  0xeb2(%rip),%xmm0
movsd  0xeb2(%rip),%xmm1
movaps %xmm0,%xmm2
movaps %xmm1,%xmm3
mov    $0xffffffe7,%edi
mov    $0x19,%esi
pop    %rax
jmp    1040 <glOrtho@plt>

LLVM IR (-O0):
@GL_PROJECTION = global i32 0
define void @geom(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @GL_PROJECTION
%6 = call i32 @glMatrixMode(i32 %5)
%7 = call i32 (...) @glLoadIdentity()
%8 = call i32 @glOrtho(double -2.400000e+00, double 2.400000e+00, double -2.400000e+00, double 2.400000e+00, i32 -25, i32 25)
ret void
}

LLVM IR (-O2):
@GL_PROJECTION = global i32 0
define void @geom(i32 %0, i32 %1) {
%3 = load i32, i32* @GL_PROJECTION
%4 = tail call i32 @glMatrixMode(i32 %3)
%5 = tail call i32 (...) @glLoadIdentity()
%6 = tail call i32 @glOrtho(double -2.400000e+00, double 2.400000e+00, double -2.400000e+00, double 2.400000e+00, i32 -25, i32 25)
ret void
}
extern void cset_gate_Unlock(volatile int *gate) {
  asm volatile("mov %[unlock], %[gate]\n"
               : [gate] "=m"(*gate)
               : [unlock] "r"(0));
}


x86 assembly (clang, -O0):
<cset_gate_Unlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cset_gate_Unlock>:
xor    %eax,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @cset_gate_Unlock(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
ret void
}

LLVM IR (-O2):
define void @cset_gate_Unlock(i32* %0) {
tail call void asm sideeffect "mov $1, $0\0A", "=*m,r,~{dirflag},~{fpsr},~{flags}"(i32* elementtype(i32) %0, i32 0)
ret void
}
void instruc_26() {}


x86 assembly (clang, -O0):
<instruc_26>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<instruc_26>:
ret

LLVM IR (-O0):
define void @instruc_26() {
ret void
}

LLVM IR (-O2):
define void @instruc_26() {
ret void
}
void ff_hevc_put_hevc_uni_qpel_v32_8_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_qpel_v32_8_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_qpel_v32_8_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_qpel_v32_8_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_qpel_v32_8_avx2() {
ret void
}
void ble_rsp_attributes_read_type(
    const struct ble_msg_attributes_read_type_rsp_t *msg) {}


x86 assembly (clang, -O0):
<ble_rsp_attributes_read_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_rsp_attributes_read_type>:
ret

LLVM IR (-O0):
%struct.ble_msg_attributes_read_type_rsp_t = type opaque
define void @ble_rsp_attributes_read_type(%struct.ble_msg_attributes_read_type_rsp_t* %0) {
%2 = alloca %struct.ble_msg_attributes_read_type_rsp_t*
store %struct.ble_msg_attributes_read_type_rsp_t* %0, %struct.ble_msg_attributes_read_type_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.ble_msg_attributes_read_type_rsp_t = type opaque
define void @ble_rsp_attributes_read_type(%struct.ble_msg_attributes_read_type_rsp_t* nocapture %0) {
ret void
}
/* Type definitions */
typedef long time_t;

/* Variables and functions */
long clock();
int rand();
int /*<<< orphan*/ srand(unsigned int);
long time(int /*<<< orphan*/ *);
long tmp;
void seed(int *iseed) {
  unsigned int sd;
  time_t tmp = time(&tmp);
  long lseed = tmp - clock();
  sd = (unsigned int)lseed;
  srand(sd);
  *iseed = -rand();
  return;
}


x86 assembly (clang, -O0):
<seed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x18(%rbp),%rdi
call   1050 <time@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    $0x0,%al
call   1030 <clock@plt>
mov    %rax,%rcx
mov    -0x28(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <srand@plt>
mov    $0x0,%al
call   1060 <rand@plt>
xor    %ecx,%ecx
sub    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seed>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    %rsp,%rdi
call   1050 <time@plt>
mov    %rax,%rbx
mov    %rax,(%rsp)
xor    %eax,%eax
call   1030 <clock@plt>
sub    %eax,%ebx
mov    %ebx,%edi
call   1040 <srand@plt>
xor    %eax,%eax
call   1060 <rand@plt>
neg    %eax
mov    %eax,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@tmp = global i64 0
define void @seed(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
store i32* %0, i32** %2
%6 = bitcast i64* %4 to i32*
%7 = call i64 @time(i32* %6)
store i64 %7, i64* %4
%8 = load i64, i64* %4
%9 = call i64 (...) @clock()
%10 = sub nsw i64 %8, %9
store i64 %10, i64* %5
%11 = load i64, i64* %5
%12 = trunc i64 %11 to i32
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = call i32 @srand(i32 %13)
%15 = call i32 (...) @rand()
%16 = sub nsw i32 0, %15
%17 = load i32*, i32** %2
store i32 %16, i32* %17
ret void
}

LLVM IR (-O2):
@tmp = global i64 0
define void @seed(i32* nocapture writeonly %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = bitcast i64* %2 to i32*
%5 = call i64 @time(i32* %4)
store i64 %5, i64* %2
%6 = call i64 (...) @clock()
%7 = sub nsw i64 %5, %6
%8 = trunc i64 %7 to i32
%9 = call i32 @srand(i32 %8)
%10 = call i32 (...) @rand()
%11 = sub nsw i32 0, %10
store i32 %11, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dbarr(int **, int);
int /*<<< orphan*/ showarr(int **, int);
int main(void) {
  int ar[3][5] = {{1, 2, 3, 4, 5}, {3, 4, 5, 6, 7}, {5, 7, 9, 1, 3}};
  showarr(ar, 3);
  dbarr(ar, 3);
  showarr(ar, 3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xeb6(%rip),%rsi
mov    $0x3c,%edx
call   1050 <memcpy@plt>
lea    -0x40(%rbp),%rdi
mov    $0x3,%esi
call   1030 <showarr@plt>
lea    -0x40(%rbp),%rdi
mov    $0x3,%esi
call   1040 <dbarr@plt>
lea    -0x40(%rbp),%rdi
mov    $0x3,%esi
call   1030 <showarr@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x40,%rsp
movups 0xf00(%rip),%xmm0
movups %xmm0,0x2c(%rsp)
movaps 0xee8(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xecc(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xeb0(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x3,%esi
call   1030 <showarr@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
call   1040 <dbarr@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
call   1030 <showarr@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.ar = [3 x [5 x i32]] [[5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5], [5 x i32] [i32 3, i32 4, i32 5, i32 6, i32 7], [5 x i32] [i32 5, i32 7, i32 9, i32 1, i32 3]]
define i32 @main() {
%1 = alloca i32
%2 = alloca [3 x [5 x i32]]
store i32 0, i32* %1
%3 = bitcast [3 x [5 x i32]]* %2 to i8*
%4 = getelementptr inbounds [3 x [5 x i32]], [3 x [5 x i32]]* %2, i64 0, i64 0
%5 = bitcast [5 x i32]* %4 to i32**
%6 = call i32 @showarr(i32** %5, i32 3)
%7 = getelementptr inbounds [3 x [5 x i32]], [3 x [5 x i32]]* %2, i64 0, i64 0
%8 = bitcast [5 x i32]* %7 to i32**
%9 = call i32 @dbarr(i32** %8, i32 3)
%10 = getelementptr inbounds [3 x [5 x i32]], [3 x [5 x i32]]* %2, i64 0, i64 0
%11 = bitcast [5 x i32]* %10 to i32**
%12 = call i32 @showarr(i32** %11, i32 3)
ret i32 0
}

LLVM IR (-O2):
@__const.main.ar = [3 x [5 x i32]] [[5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5], [5 x i32] [i32 3, i32 4, i32 5, i32 6, i32 7], [5 x i32] [i32 5, i32 7, i32 9, i32 1, i32 3]]
define i32 @main() {
%1 = alloca [3 x [5 x i32]]
%2 = bitcast [3 x [5 x i32]]* %1 to i8*
%3 = bitcast [3 x [5 x i32]]* %1 to i32**
%4 = call i32 @showarr(i32** %3, i32 3)
%5 = call i32 @dbarr(i32** %3, i32 3)
%6 = call i32 @showarr(i32** %3, i32 3)
ret i32 0
}
/* Type definitions */
struct cseq_body {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct cseq_body *const);
void free_cseq(struct cseq_body *const cb) { free((cb)); }


x86 assembly (clang, -O0):
<free_cseq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_cseq>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.cseq_body = type { i32 }
define void @free_cseq(%struct.cseq_body* %0) {
%2 = alloca %struct.cseq_body*
store %struct.cseq_body* %0, %struct.cseq_body** %2
%3 = load %struct.cseq_body*, %struct.cseq_body** %2
%4 = call i32 @free(%struct.cseq_body* %3)
ret void
}

LLVM IR (-O2):
%struct.cseq_body = type { i32 }
define void @free_cseq(%struct.cseq_body* nocapture %0) {
%2 = tail call i32 @free(%struct.cseq_body* %0)
ret void
}
/* Variables and functions */
int ho2cu(double *, double *, int);
int qu2ho(double *, double *, int);
int qu2cu(double *qu, double *cu, int p) {
  double ho[3];
  int trash;
  trash = qu2ho(qu, ho, p);
  trash = ho2cu(ho, cu, p);
  return 1;
}


x86 assembly (clang, -O0):
<qu2cu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x30(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <qu2ho@plt>
mov    %eax,-0x34(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <ho2cu@plt>
mov    %eax,-0x34(%rbp)
mov    $0x1,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<qu2cu>:
push   %r15
push   %r14
push   %rbx
sub    $0x20,%rsp
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rsp,%r15
mov    %r15,%rsi
call   1030 <qu2ho@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %ebx,%edx
call   1040 <ho2cu@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @qu2cu(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
%7 = alloca [3 x double]
%8 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%9 = load double*, double** %4
%10 = getelementptr inbounds [3 x double], [3 x double]* %7, i64 0, i64 0
%11 = load i32, i32* %6
%12 = call i32 @qu2ho(double* %9, double* %10, i32 %11)
store i32 %12, i32* %8
%13 = getelementptr inbounds [3 x double], [3 x double]* %7, i64 0, i64 0
%14 = load double*, double** %5
%15 = load i32, i32* %6
%16 = call i32 @ho2cu(double* %13, double* %14, i32 %15)
store i32 %16, i32* %8
ret i32 1
}

LLVM IR (-O2):
define i32 @qu2cu(double* %0, double* %1, i32 %2) {
%4 = alloca [3 x double]
%5 = bitcast [3 x double]* %4 to i8*
%6 = getelementptr inbounds [3 x double], [3 x double]* %4, i64 0, i64 0
%7 = call i32 @qu2ho(double* %0, double* %6, i32 %2)
%8 = call i32 @ho2cu(double* %6, double* %1, i32 %2)
ret i32 1
}
/* Variables and functions */
int escape_json(char *, char *);
int /*<<< orphan*/ free(char *);
scalar_t__ malloc(int);
char *escape_json_pro(char *buf) {
  char *dst;
  int size;
  size = escape_json(buf, NULL);
  if (size != 0) {
    dst = (char *)malloc(size);
    escape_json(buf, dst);
    free(buf);
  } else {
    dst = buf;
  }
  return dst;
}


x86 assembly (clang, -O0):
<escape_json_pro>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1050 <escape_json@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     117d <escape_json_pro+0x4d>
mov    -0x14(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <escape_json@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
jmp    1185 <escape_json_pro+0x55>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<escape_json_pro>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %esi,%esi
call   1050 <escape_json@plt>
test   %eax,%eax
je     1162 <escape_json_pro+0x32>
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,%r14
mov    %rbx,%rdi
mov    %rax,%rsi
call   1050 <escape_json@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %r14,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @escape_json_pro(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @escape_json(i8* %5, i8* null)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %18
9: ; preds = %1
%10 = load i32, i32* %4
%11 = call i64 @malloc(i32 %10)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %3
%13 = load i8*, i8** %2
%14 = load i8*, i8** %3
%15 = call i32 @escape_json(i8* %13, i8* %14)
%16 = load i8*, i8** %2
%17 = call i32 @free(i8* %16)
br label %20
18: ; preds = %1
%19 = load i8*, i8** %2
store i8* %19, i8** %3
br label %20
20: ; preds = %18, %9
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @escape_json_pro(i8* %0) {
%2 = tail call i32 @escape_json(i8* %0, i8* null)
%3 = icmp eq i32 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = tail call i64 @malloc(i32 %2)
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 @escape_json(i8* %0, i8* %6)
%8 = tail call i32 @free(i8* %0)
br label %9
9: ; preds = %1, %4
%10 = phi i8* [ %6, %4 ], [ %0, %1 ]
ret i8* %10
}
int test_imm_9Eint16_mem(short *val) {
  return ((*val) & (0x9E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Eint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0x9e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Eint16_mem>:
testb  $0x9e,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Eint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 158
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_9Eint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 158
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct iam_rec {
  int dummy;
};
struct iam_leaf {
  int dummy;
};
struct iam_key {
  int dummy;
};

/* Variables and functions */
scalar_t__ leaf_count_limit(struct iam_leaf const *);
scalar_t__ lentry_count_get(struct iam_leaf const *);
int iam_lfix_can_add(const struct iam_leaf *l, const struct iam_key *k,
                     const struct iam_rec *r) {
  return lentry_count_get(l) < leaf_count_limit(l);
}


x86 assembly (clang, -O0):
<iam_lfix_can_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <lentry_count_get@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <leaf_count_limit@plt>
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
cmp    %rcx,%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iam_lfix_can_add>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <lentry_count_get@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1040 <leaf_count_limit@plt>
xor    %ecx,%ecx
cmp    %rax,%r14
setl   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.iam_leaf = type { i32 }
%struct.iam_key = type { i32 }
%struct.iam_rec = type { i32 }
define i32 @iam_lfix_can_add(%struct.iam_leaf* %0, %struct.iam_key* %1, %struct.iam_rec* %2) {
%4 = alloca %struct.iam_leaf*
%5 = alloca %struct.iam_key*
%6 = alloca %struct.iam_rec*
store %struct.iam_leaf* %0, %struct.iam_leaf** %4
store %struct.iam_key* %1, %struct.iam_key** %5
store %struct.iam_rec* %2, %struct.iam_rec** %6
%7 = load %struct.iam_leaf*, %struct.iam_leaf** %4
%8 = call i64 @lentry_count_get(%struct.iam_leaf* %7)
%9 = load %struct.iam_leaf*, %struct.iam_leaf** %4
%10 = call i64 @leaf_count_limit(%struct.iam_leaf* %9)
%11 = icmp slt i64 %8, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
%struct.iam_leaf = type { i32 }
%struct.iam_key = type { i32 }
%struct.iam_rec = type { i32 }
define i32 @iam_lfix_can_add(%struct.iam_leaf* %0, %struct.iam_key* nocapture readnone %1, %struct.iam_rec* nocapture readnone %2) {
%4 = tail call i64 @lentry_count_get(%struct.iam_leaf* %0)
%5 = tail call i64 @leaf_count_limit(%struct.iam_leaf* %0)
%6 = icmp slt i64 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
int STC3100_Write(unsigned char ByteCount, unsigned char RegisterAddr,
                  unsigned char *TxBuffer) {
  int Status = 1;
  int retry;
  for (retry = 0; retry < 2; retry++) {
    if (Status != 0) {
    } else {
      break;
    }
  }
  return Status;
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    %rdx,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
cmpl   $0x2,-0x18(%rbp)
jge    1153 <STC3100_Write+0x53>
cmpl   $0x0,-0x14(%rbp)
je     113b <STC3100_Write+0x3b>
jmp    1140 <STC3100_Write+0x40>
jmp    1153 <STC3100_Write+0x53>
jmp    1145 <STC3100_Write+0x45>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1122 <STC3100_Write+0x22>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @STC3100_Write(i8 zeroext %0, i8 zeroext %1, i8* %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8* %2, i8** %6
store i32 1, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %18, %3
%10 = load i32, i32* %8
%11 = icmp slt i32 %10, 2
br i1 %11, label %12, label %21
12: ; preds = %9
%13 = load i32, i32* %7
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %12
br label %17
16: ; preds = %12
br label %21
17: ; preds = %15
br label %18
18: ; preds = %17
%19 = load i32, i32* %8
%20 = add nsw i32 %19, 1
store i32 %20, i32* %8
br label %9
21: ; preds = %16, %9
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @STC3100_Write(i8 zeroext %0, i8 zeroext %1, i8* nocapture readnone %2) {
ret i32 1
}
void buttons_setup() { return; }


x86 assembly (clang, -O0):
<buttons_setup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<buttons_setup>:
ret

LLVM IR (-O0):
define void @buttons_setup() {
ret void
}

LLVM IR (-O2):
define void @buttons_setup() {
ret void
}
int my_is_prime(int nb) {
  int i = nb - 1;
  if (nb == 0 || nb == 1)
    return (0);
  while (i > 1) {
    if (nb % i == 0)
      return (0);
    i--;
  }
  return (1);
}


x86 assembly (clang, -O0):
<my_is_prime>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1124 <my_is_prime+0x24>
cmpl   $0x1,-0x8(%rbp)
jne    1130 <my_is_prime+0x30>
movl   $0x0,-0x4(%rbp)
jmp    1170 <my_is_prime+0x70>
jmp    1135 <my_is_prime+0x35>
cmpl   $0x1,-0xc(%rbp)
jle    1169 <my_is_prime+0x69>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
jne    115b <my_is_prime+0x5b>
movl   $0x0,-0x4(%rbp)
jmp    1170 <my_is_prime+0x70>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1135 <my_is_prime+0x35>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_is_prime>:
xor    %ecx,%ecx
cmp    $0x2,%edi
jb     1121 <my_is_prime+0x21>
mov    %edi,%esi
nopl   0x0(%rax)
cmp    $0x3,%esi
jl     1124 <my_is_prime+0x24>
add    $0xffffffff,%esi
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
jne    1110 <my_is_prime+0x10>
mov    %ecx,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @my_is_prime(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = sub nsw i32 %5, 1
store i32 %6, i32* %4
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %1
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, 1
br i1 %11, label %12, label %13
12: ; preds = %9, %1
store i32 0, i32* %2
br label %27
13: ; preds = %9
br label %14
14: ; preds = %23, %13
%15 = load i32, i32* %4
%16 = icmp sgt i32 %15, 1
br i1 %16, label %17, label %26
17: ; preds = %14
%18 = load i32, i32* %3
%19 = load i32, i32* %4
%20 = srem i32 %18, %19
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %17
store i32 0, i32* %2
br label %27
23: ; preds = %17
%24 = load i32, i32* %4
%25 = add nsw i32 %24, -1
store i32 %25, i32* %4
br label %14
26: ; preds = %14
store i32 1, i32* %2
br label %27
27: ; preds = %26, %22, %12
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @my_is_prime(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %10, label %3
3: ; preds = %1, %7
%4 = phi i32 [ %5, %7 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = icmp sgt i32 %4, 2
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = srem i32 %0, %5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %3
10: ; preds = %3, %7, %1
%11 = phi i32 [ 0, %1 ], [ 1, %3 ], [ 0, %7 ]
ret i32 %11
}
/* Forward declarations */
typedef struct TYPE_6__ TYPE_2__;
typedef struct TYPE_5__ TYPE_1__;

/* Type definitions */
struct TYPE_5__ {
  scalar_t__ __lock;
};
struct TYPE_6__ {
  TYPE_1__ __data;
};
typedef TYPE_2__ pthread_mutex_t;

/* Variables and functions */
int EBUSY;
int /*<<< orphan*/ pthread_mutex_lock(TYPE_2__ *);
int pthread_mutex_trylock(pthread_mutex_t *mutex) {
  if (((*mutex).__data.__lock) != 0) {
    return EBUSY;
  } else {
    pthread_mutex_lock(mutex);
    return 0;
  }
}


x86 assembly (clang, -O0):
<pthread_mutex_trylock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpq   $0x0,(%rax)
je     113b <pthread_mutex_trylock+0x2b>
mov    0x2eaf(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    114b <pthread_mutex_trylock+0x3b>
mov    -0x10(%rbp),%rdi
call   1030 <pthread_mutex_lock@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_mutex_trylock>:
push   %rax
cmpq   $0x0,(%rdi)
je     1122 <pthread_mutex_trylock+0x12>
mov    0x2ec2(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret
call   1030 <pthread_mutex_lock@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.TYPE_6__ = type { %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i64 }
@EBUSY = global i32 0
define i32 @pthread_mutex_trylock(%struct.TYPE_6__* %0) {
%2 = alloca i32
%3 = alloca %struct.TYPE_6__*
store %struct.TYPE_6__* %0, %struct.TYPE_6__** %3
%4 = load %struct.TYPE_6__*, %struct.TYPE_6__** %3
%5 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* @EBUSY
store i32 %10, i32* %2
br label %14
11: ; preds = %1
%12 = load %struct.TYPE_6__*, %struct.TYPE_6__** %3
%13 = call i32 @pthread_mutex_lock(%struct.TYPE_6__* %12)
store i32 0, i32* %2
br label %14
14: ; preds = %11, %9
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
%struct.TYPE_6__ = type { %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i64 }
@EBUSY = global i32 0
define i32 @pthread_mutex_trylock(%struct.TYPE_6__* %0) {
%2 = getelementptr inbounds %struct.TYPE_6__, %struct.TYPE_6__* %0, i64 0, i32 0, i32 0
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = load i32, i32* @EBUSY
br label %9
7: ; preds = %1
%8 = tail call i32 @pthread_mutex_lock(%struct.TYPE_6__* %0)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ 0, %7 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_tagstruct_gets64() {
  printf("NOT IMPLEMENTED:"
         "pa_tagstruct_gets64"
         "\n");
}


x86 assembly (clang, -O0):
<pa_tagstruct_gets64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_tagstruct_gets64>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [37 x i8] c"NOT IMPLEMENTED:pa_tagstruct_gets64\0A\00"
define i32 @pa_tagstruct_gets64() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [36 x i8] c"NOT IMPLEMENTED:pa_tagstruct_gets64\00"
define i32 @pa_tagstruct_gets64() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ microblaze_invalidate_cache_ext();
int /*<<< orphan*/ microblaze_invalidate_icache();
int /*<<< orphan*/ xil_printf(char *);
int Xil_TestICacheAll(void) {
  microblaze_invalidate_cache_ext();
  microblaze_invalidate_icache();
  ;
  xil_printf("-- Invalidate icache all done --\r\n");
  return 0;
}


x86 assembly (clang, -O0):
<Xil_TestICacheAll>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <microblaze_invalidate_cache_ext@plt>
mov    $0x0,%al
call   1050 <microblaze_invalidate_icache@plt>
lea    0xeb7(%rip),%rdi
call   1030 <xil_printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Xil_TestICacheAll>:
push   %rax
xor    %eax,%eax
call   1040 <microblaze_invalidate_cache_ext@plt>
xor    %eax,%eax
call   1050 <microblaze_invalidate_icache@plt>
lea    0xeba(%rip),%rdi
call   1030 <xil_printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"-- Invalidate icache all done --\0D\0A\00"
define i32 @Xil_TestICacheAll() {
%1 = call i32 (...) @microblaze_invalidate_cache_ext()
%2 = call i32 (...) @microblaze_invalidate_icache()
%3 = call i32 @xil_printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [35 x i8] c"-- Invalidate icache all done --\0D\0A\00"
define i32 @Xil_TestICacheAll() {
%1 = tail call i32 (...) @microblaze_invalidate_cache_ext()
%2 = tail call i32 (...) @microblaze_invalidate_icache()
%3 = tail call i32 @xil_printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct proc_rotator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct proc_rotator *);
void rot_destroy(struct proc_rotator *rot) { free(rot); }


x86 assembly (clang, -O0):
<rot_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rot_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.proc_rotator = type { i32 }
define void @rot_destroy(%struct.proc_rotator* %0) {
%2 = alloca %struct.proc_rotator*
store %struct.proc_rotator* %0, %struct.proc_rotator** %2
%3 = load %struct.proc_rotator*, %struct.proc_rotator** %2
%4 = call i32 @free(%struct.proc_rotator* %3)
ret void
}

LLVM IR (-O2):
%struct.proc_rotator = type { i32 }
define void @rot_destroy(%struct.proc_rotator* nocapture %0) {
%2 = tail call i32 @free(%struct.proc_rotator* %0)
ret void
}
char complementBit_fun_char(char x, unsigned i) { return x ^ 1 << i; }


x86 assembly (clang, -O0):
<complementBit_fun_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
mov    -0x8(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    %ecx,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<complementBit_fun_char>:
mov    %edi,%eax
btc    %esi,%eax
ret

LLVM IR (-O0):
define signext i8 @complementBit_fun_char(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = load i32, i32* %4
%8 = shl i32 1, %7
%9 = xor i32 %6, %8
%10 = trunc i32 %9 to i8
ret i8 %10
}

LLVM IR (-O2):
define signext i8 @complementBit_fun_char(i8 signext %0, i32 %1) {
%3 = shl nuw i32 1, %1
%4 = trunc i32 %3 to i8
%5 = xor i8 %4, %0
ret i8 %5
}
/* Type definitions */
struct timeval {
  int /*<<< orphan*/ tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ finalize();
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
int /*<<< orphan*/ opencscad_init();
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ tree(int /*<<< orphan*/, double);
int main(int argc, char *argv[]) {
  struct timeval tv;
  gettimeofday(&tv, NULL);
  srand(tv.tv_usec);
  opencscad_init();
  tree(0, 20.0);
  finalize();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <gettimeofday@plt>
mov    -0x18(%rbp),%edi
call   1050 <srand@plt>
mov    $0x0,%al
call   1060 <opencscad_init@plt>
xor    %edi,%edi
movsd  0xe7b(%rip),%xmm0
call   1070 <tree@plt>
mov    $0x0,%al
call   1030 <finalize@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1040 <gettimeofday@plt>
mov    (%rsp),%edi
call   1050 <srand@plt>
xor    %eax,%eax
call   1060 <opencscad_init@plt>
movsd  0xe8e(%rip),%xmm0
xor    %edi,%edi
call   1070 <tree@plt>
xor    %eax,%eax
call   1030 <finalize@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca %struct.timeval
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = call i32 @gettimeofday(%struct.timeval* %5, i32* null)
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %5, i32 0, i32 0
%8 = load i32, i32* %7
%9 = call i32 @srand(i32 %8)
%10 = call i32 (...) @opencscad_init()
%11 = call i32 @tree(i32 0, double 2.000000e+01)
%12 = call i32 (...) @finalize()
ret i32 0
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca %struct.timeval
%4 = bitcast %struct.timeval* %3 to i8*
%5 = call i32 @gettimeofday(%struct.timeval* %3, i32* null)
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i64 0, i32 0
%7 = load i32, i32* %6
%8 = tail call i32 @srand(i32 %7)
%9 = tail call i32 (...) @opencscad_init()
%10 = tail call i32 @tree(i32 0, double 2.000000e+01)
%11 = tail call i32 (...) @finalize()
ret i32 0
}
void INT_Excep_MTU10_TGID10(void) {}


x86 assembly (clang, -O0):
<INT_Excep_MTU10_TGID10>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_MTU10_TGID10>:
ret

LLVM IR (-O0):
define void @INT_Excep_MTU10_TGID10() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_MTU10_TGID10() {
ret void
}
/* Type definitions */
struct opts {
  int dummy;
};
struct argument {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ apply_value_to_arg(struct argument *, char const *);
char *get_value(struct opts *, struct argument *);
void parse_arg(struct opts *opts, struct argument *match) {
  const char *value = get_value(opts, match);
  apply_value_to_arg(match, value);
}


x86 assembly (clang, -O0):
<parse_arg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <get_value@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <apply_value_to_arg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_arg>:
push   %rbx
mov    %rsi,%rbx
call   1040 <get_value@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
pop    %rbx
jmp    1030 <apply_value_to_arg@plt>

LLVM IR (-O0):
%struct.opts = type { i32 }
%struct.argument = type { i32 }
define void @parse_arg(%struct.opts* %0, %struct.argument* %1) {
%3 = alloca %struct.opts*
%4 = alloca %struct.argument*
%5 = alloca i8*
store %struct.opts* %0, %struct.opts** %3
store %struct.argument* %1, %struct.argument** %4
%6 = load %struct.opts*, %struct.opts** %3
%7 = load %struct.argument*, %struct.argument** %4
%8 = call i8* @get_value(%struct.opts* %6, %struct.argument* %7)
store i8* %8, i8** %5
%9 = load %struct.argument*, %struct.argument** %4
%10 = load i8*, i8** %5
%11 = call i32 @apply_value_to_arg(%struct.argument* %9, i8* %10)
ret void
}

LLVM IR (-O2):
%struct.opts = type { i32 }
%struct.argument = type { i32 }
define void @parse_arg(%struct.opts* %0, %struct.argument* %1) {
%3 = tail call i8* @get_value(%struct.opts* %0, %struct.argument* %1)
%4 = tail call i32 @apply_value_to_arg(%struct.argument* %1, i8* %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ int64_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ ReadUint64Le(void const *, int /*<<< orphan*/ *);
int32_t ReadInt64Le(const void *in, int64_t *value) {
  return ReadUint64Le(in, (uint64_t *)value);
}


x86 assembly (clang, -O0):
<ReadInt64Le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <ReadUint64Le@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadInt64Le>:
jmp    1030 <ReadUint64Le@plt>

LLVM IR (-O0):
define i32 @ReadInt64Le(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = call i32 @ReadUint64Le(i8* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @ReadInt64Le(i8* %0, i32* %1) {
%3 = tail call i32 @ReadUint64Le(i8* %0, i32* %1)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ _select64(int /*<<< orphan*/, int);
uint64_t bitselect(uint64_t val, int rank) { return _select64(val, rank); }


x86 assembly (clang, -O0):
<bitselect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_select64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitselect>:
jmp    1030 <_select64@plt>

LLVM IR (-O0):
define i32 @bitselect(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_select64(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @bitselect(i32 %0, i32 %1) {
%3 = tail call i32 @_select64(i32 %0, i32 %1)
ret i32 %3
}
void Test1() {}


x86 assembly (clang, -O0):
<Test1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Test1>:
ret

LLVM IR (-O0):
define void @Test1() {
ret void
}

LLVM IR (-O2):
define void @Test1() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _deq(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _f2d(int);
int _fneq(int a, int b) { return !_deq(_f2d(a), _f2d(b)); }


x86 assembly (clang, -O0):
<_fneq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <_f2d@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <_f2d@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1030 <_deq@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fneq>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
call   1040 <_f2d@plt>
mov    %eax,%ebp
mov    %ebx,%edi
call   1040 <_f2d@plt>
mov    %ebp,%edi
mov    %eax,%esi
call   1030 <_deq@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @_fneq(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @_f2d(i32 %5)
%7 = load i32, i32* %4
%8 = call i32 @_f2d(i32 %7)
%9 = call i32 @_deq(i32 %6, i32 %8)
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @_fneq(i32 %0, i32 %1) {
%3 = tail call i32 @_f2d(i32 %0)
%4 = tail call i32 @_f2d(i32 %1)
%5 = tail call i32 @_deq(i32 %3, i32 %4)
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
int is_ddf(int layout) {
  switch (layout) {
  default:
    return 0;
  case 10:
  case 9:
  case 8:
    return 1;
  }
}


x86 assembly (clang, -O0):
<is_ddf>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xfffffff8,%eax
sub    $0x3,%eax
jb     1127 <is_ddf+0x27>
jmp    111b <is_ddf+0x1b>
movl   $0x0,-0x4(%rbp)
jmp    112e <is_ddf+0x2e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_ddf>:
add    $0xfffffff8,%edi
xor    %eax,%eax
cmp    $0x3,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @is_ddf(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %5 [
i32 10, label %6
i32 9, label %6
i32 8, label %6
]
5: ; preds = %1
store i32 0, i32* %2
br label %7
6: ; preds = %1, %1, %1
store i32 1, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @is_ddf(i32 %0) {
%2 = add i32 %0, -8
%3 = icmp ult i32 %2, 3
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ putchar(char);
void presskey() {
  printf("press any key:");
  getchar();
  putchar('\n');
}


x86 assembly (clang, -O0):
<presskey>:
push   %rbp
mov    %rsp,%rbp
lea    0xec5(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <getchar@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<presskey>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <getchar@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"press any key:\00"
define void @presskey() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @getchar()
%3 = call i32 @putchar(i8 signext 10)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"press any key:\00"
define void @presskey() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @getchar()
%3 = tail call i32 @putchar(i8 signext 10)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ writeidew(int, int /*<<< orphan*/);
void ide_write_ter_w(uint16_t addr, uint16_t val, void *priv) {
  writeidew(2, val);
}


x86 assembly (clang, -O0):
<ide_write_ter_w>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x8(%rbp),%esi
mov    $0x2,%edi
call   1030 <writeidew@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ide_write_ter_w>:
mov    $0x2,%edi
jmp    1030 <writeidew@plt>

LLVM IR (-O0):
define void @ide_write_ter_w(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %5
%8 = call i32 @writeidew(i32 2, i32 %7)
ret void
}

LLVM IR (-O2):
define void @ide_write_ter_w(i32 %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @writeidew(i32 2, i32 %1)
ret void
}
/* Variables and functions */
int num_online_cpus();
int rcu_blocking_is_gp(void) { return num_online_cpus() == 1; }


x86 assembly (clang, -O0):
<rcu_blocking_is_gp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <num_online_cpus@plt>
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_blocking_is_gp>:
push   %rax
xor    %eax,%eax
call   1030 <num_online_cpus@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @rcu_blocking_is_gp() {
%1 = call i32 (...) @num_online_cpus()
%2 = icmp eq i32 %1, 1
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @rcu_blocking_is_gp() {
%1 = tail call i32 (...) @num_online_cpus()
%2 = icmp eq i32 %1, 1
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ trigger();
int main() {
  trigger();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <trigger@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <trigger@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @trigger()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @trigger()
ret i32 0
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ edie(char *);
scalar_t__ stat(char const *, struct stat *);
void xstat(const char *fn) {
  struct stat st;
  if (stat(fn, &st))
    edie("stat");
}


x86 assembly (clang, -O0):
<xstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <stat@plt>
cmp    $0x0,%rax
je     114f <xstat+0x2f>
lea    0xeb6(%rip),%rdi
call   1040 <edie@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstat>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
test   %rax,%rax
je     113a <xstat+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <edie@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@.str = [5 x i8] c"stat\00"
define void @xstat(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.stat
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @stat(i8* %4, %struct.stat* %3)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @edie(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@.str = [5 x i8] c"stat\00"
define void @xstat(i8* %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i64 @stat(i8* %0, %struct.stat* %2)
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call i32 @edie(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
ret void
}
/* Variables and functions */
char *reset_io();
int main() {
  char *buf = reset_io();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <reset_io@plt>
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <reset_io@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* (...) @reset_io()
store i8* %3, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i8* (...) @reset_io()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ execvp(char *, char **);
int /*<<< orphan*/ setuid(int /*<<< orphan*/);
int main(int argc, char **argv) {
  setuid(0);
  execvp("DASHVEND_DIRECTORY/bin/show_image.sh", &argv[0]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1040 <setuid@plt>
mov    -0x10(%rbp),%rsi
lea    0xeb8(%rip),%rdi
call   1030 <execvp@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %rsi,%rbx
xor    %edi,%edi
call   1040 <setuid@plt>
lea    0xece(%rip),%rdi
mov    %rbx,%rsi
call   1030 <execvp@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"DASHVEND_DIRECTORY/bin/show_image.sh\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @setuid(i32 0)
%7 = load i8**, i8*** %5
%8 = getelementptr inbounds i8*, i8** %7, i64 0
%9 = call i32 @execvp(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8** %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [37 x i8] c"DASHVEND_DIRECTORY/bin/show_image.sh\00"
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @setuid(i32 0)
%4 = tail call i32 @execvp(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0), i8** %1)
ret i32 0
}