xunge/DecIR huggingface dataset:
/* Variables and functions */
int partition(int *, int, int);
void quickSort(int arr[], int low, int high) {
  int pivotLocation;
  if (low < high) {
    pivotLocation = partition(arr, low, high);
    quickSort(arr, low, pivotLocation - 1);
    quickSort(arr, pivotLocation + 1, high);
  }
}


x86 assembly (clang, -O0):
<quickSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quickSort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quickSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quickSort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickSort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quickSort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quickSort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quickSort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quickSort(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(i32* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load i32*, i32** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load i32*, i32** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quickSort(i32* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(i32* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quickSort(i32* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
unsigned int read_word(unsigned char *buf) {
  return (((unsigned int)buf[0]) << 8) + (unsigned int)buf[1];
}


x86 assembly (clang, -O0):
<read_word>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_word>:
movzwl (%rdi),%eax
shl    $0x10,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @read_word(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 8
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = add i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @read_word(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = shl nuw nsw i32 %3, 8
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = or i32 %4, %7
ret i32 %8
}
int main(void) {
  if (99.5 >= 99.4 && 2) {
    return 40 + (1 < 2 && 1 < 2) + (99 && 99);
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 42
}

LLVM IR (-O2):
define i32 @main() {
ret i32 42
}
/* Variables and functions */
int /*<<< orphan*/ sscanf(char *, char *, char *);
char *zmodem_ver(char *buf) {
  sscanf("$Revision: 1.118 $", "%*s %s", buf);
  return (buf);
}


x86 assembly (clang, -O0):
<zmodem_ver>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee5(%rip),%rsi
call   1030 <sscanf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zmodem_ver>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
lea    0xef1(%rip),%rsi
mov    %rbx,%rdx
call   1030 <sscanf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"$Revision: 1.118 $\00"
@.str.1 = [7 x i8] c"%*s %s\00"
define i8* @zmodem_ver(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @sscanf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %3)
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
@.str = [19 x i8] c"$Revision: 1.118 $\00"
@.str.1 = [7 x i8] c"%*s %s\00"
define i8* @zmodem_ver(i8* returned %0) {
%2 = tail call i32 @sscanf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i8* %0
}
/* Type definitions */
typedef scalar_t__ __v16qi;
typedef scalar_t__ __m128i;

/* Variables and functions */
__m128i __attribute__((__always___, __nodebug__))
_mm_cmpeq_epi8(__m128i a, __m128i b) {
  return (__m128i)((__v16qi)a == (__v16qi)b);
}


x86 assembly (clang, -O0):
<_mm_cmpeq_epi8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_cmpeq_epi8>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i64 @_mm_cmpeq_epi8(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
%9 = sext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @_mm_cmpeq_epi8(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i64
ret i64 %4
}
void dnskw_init(void) {}


x86 assembly (clang, -O0):
<dnskw_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dnskw_init>:
ret

LLVM IR (-O0):
define void @dnskw_init() {
ret void
}

LLVM IR (-O2):
define void @dnskw_init() {
ret void
}
const char *scamper_do_trace_usage(void) {
  return "trace [-MQT] [-c confidence] [-d dport] [-f firsthop]\n"
         "      [-g gaplimit] [-G gapaction] [-l loops] [-L loopaction]\n"
         "      [-m maxttl] [-o offset] [-p payload] [-P method]\n"
         "      [-q attempts] [-s sport] [-S srcaddr] [-t tos] [-U userid]\n"
         "      [-w wait-timeout] [-W wait-probe]\n"
         "      [-z gss-entry] [-Z lss-name]";
}


x86 assembly (clang, -O0):
<scamper_do_trace_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scamper_do_trace_usage>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [311 x i8] c"trace [-MQT] [-c confidence] [-d dport] [-f firsthop]\0A [-g gaplimit] [-G gapaction] [-l loops] [-L loopaction]\0A [-m maxttl] [-o offset] [-p payload] [-P method]\0A [-q attempts] [-s sport] [-S srcaddr] [-t tos] [-U userid]\0A [-w wait-timeout] [-W wait-probe]\0A [-z gss-entry] [-Z lss-name]\00"
define i8* @scamper_do_trace_usage() {
ret i8* getelementptr inbounds ([311 x i8], [311 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [311 x i8] c"trace [-MQT] [-c confidence] [-d dport] [-f firsthop]\0A [-g gaplimit] [-G gapaction] [-l loops] [-L loopaction]\0A [-m maxttl] [-o offset] [-p payload] [-P method]\0A [-q attempts] [-s sport] [-S srcaddr] [-t tos] [-U userid]\0A [-w wait-timeout] [-W wait-probe]\0A [-z gss-entry] [-Z lss-name]\00"
define i8* @scamper_do_trace_usage() {
ret i8* getelementptr inbounds ([311 x i8], [311 x i8]* @.str, i64 0, i64 0)
}
__attribute__((weak)) void UsageFault_Handler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<UsageFault_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <UsageFault_Handler+0x9>
jmp    1109 <UsageFault_Handler+0x9>

x86 assembly (clang, -O2):
<UsageFault_Handler>:
jmp    1100 <UsageFault_Handler>

LLVM IR (-O0):
define weak void @UsageFault_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define weak void @UsageFault_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
unsigned int ReadConfigReg(int);
void readFpgaGrb(int addr, unsigned int *value) {
  *value = ReadConfigReg(0xf9000000 + addr);
}


x86 assembly (clang, -O0):
<readFpgaGrb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
add    $0xf9000000,%edi
call   1030 <ReadConfigReg@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readFpgaGrb>:
push   %rbx
mov    %rsi,%rbx
add    $0xf9000000,%edi
call   1030 <ReadConfigReg@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @readFpgaGrb(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = add i32 -117440512, %5
%7 = call i32 @ReadConfigReg(i32 %6)
%8 = load i32*, i32** %4
store i32 %7, i32* %8
ret void
}

LLVM IR (-O2):
define void @readFpgaGrb(i32 %0, i32* nocapture writeonly %1) {
%3 = add i32 %0, -117440512
%4 = tail call i32 @ReadConfigReg(i32 %3)
store i32 %4, i32* %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ s;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int strlen(char *);
int main(int argc, char *argv[]) {
  char s[] = "hello world";
  printf("sizeof %d\n", sizeof(s));
  printf("strlen %d\n", strlen(s));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xec3(%rip),%rax
mov    %rax,-0x1c(%rbp)
mov    0xec1(%rip),%eax
mov    %eax,-0x14(%rbp)
lea    0xebb(%rip),%rdi
mov    $0xc,%esi
call   1040 <printf@plt>
lea    -0x1c(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%esi
lea    0xeaa(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movabs $0x6f77206f6c6c6568,%rax
20 77 6f
mov    %rax,0x8(%rsp)
movl   $0x646c72,0x10(%rsp)
lea    0xeca(%rip),%rdi
mov    $0xc,%esi
call   1040 <printf@plt>
lea    0x8(%rsp),%rdi
call   1030 <strlen@plt>
lea    0xeba(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.s = [12 x i8] c"hello world\00"
@.str = [11 x i8] c"sizeof %d\0A\00"
@.str.1 = [11 x i8] c"strlen %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [12 x i8]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = bitcast [12 x i8]* %6 to i8*
%8 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 12)
%9 = getelementptr inbounds [12 x i8], [12 x i8]* %6, i64 0, i64 0
%10 = call i32 @strlen(i8* %9)
%11 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.s = [12 x i8] c"hello world\00"
@.str = [11 x i8] c"sizeof %d\0A\00"
@.str.1 = [11 x i8] c"strlen %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [12 x i8]
%4 = getelementptr inbounds [12 x i8], [12 x i8]* %3, i64 0, i64 0
%5 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 12)
%6 = call i32 @strlen(i8* %4)
%7 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}
int test_imm_D4int32_reg(int val) { return ((val) & (0xD4 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_D4int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xd4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D4int32_reg>:
test   $0xd4,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D4int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 212
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_D4int32_reg(i32 %0) {
%2 = and i32 %0, 212
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void blk_mq_debugfs_register_hctxs(struct request_queue *q) {}


x86 assembly (clang, -O0):
<blk_mq_debugfs_register_hctxs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<blk_mq_debugfs_register_hctxs>:
ret

LLVM IR (-O0):
%struct.request_queue = type opaque
define void @blk_mq_debugfs_register_hctxs(%struct.request_queue* %0) {
%2 = alloca %struct.request_queue*
store %struct.request_queue* %0, %struct.request_queue** %2
ret void
}

LLVM IR (-O2):
%struct.request_queue = type opaque
define void @blk_mq_debugfs_register_hctxs(%struct.request_queue* nocapture %0) {
ret void
}
void set_731(void *pnt, unsigned int i) {
  unsigned char *p = (unsigned char *)pnt;
  p[0] = i & 0xff;
  p[1] = (i >> 8) & 0xff;
  p[2] = (i >> 16) & 0xff;
  p[3] = (i >> 24) & 0xff;
}


x86 assembly (clang, -O0):
<set_731>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
shr    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0xc(%rbp),%eax
shr    $0x10,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0xc(%rbp),%eax
shr    $0x18,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_731>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @set_731(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
%7 = load i32, i32* %4
%8 = and i32 %7, 255
%9 = trunc i32 %8 to i8
%10 = load i8*, i8** %5
%11 = getelementptr inbounds i8, i8* %10, i64 0
store i8 %9, i8* %11
%12 = load i32, i32* %4
%13 = lshr i32 %12, 8
%14 = and i32 %13, 255
%15 = trunc i32 %14 to i8
%16 = load i8*, i8** %5
%17 = getelementptr inbounds i8, i8* %16, i64 1
store i8 %15, i8* %17
%18 = load i32, i32* %4
%19 = lshr i32 %18, 16
%20 = and i32 %19, 255
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %5
%23 = getelementptr inbounds i8, i8* %22, i64 2
store i8 %21, i8* %23
%24 = load i32, i32* %4
%25 = lshr i32 %24, 24
%26 = and i32 %25, 255
%27 = trunc i32 %26 to i8
%28 = load i8*, i8** %5
%29 = getelementptr inbounds i8, i8* %28, i64 3
store i8 %27, i8* %29
ret void
}

LLVM IR (-O2):
define void @set_731(i8* nocapture writeonly %0, i32 %1) {
%3 = trunc i32 %1 to i8
store i8 %3, i8* %0
%4 = lshr i32 %1, 8
%5 = trunc i32 %4 to i8
%6 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %5, i8* %6
%7 = lshr i32 %1, 16
%8 = trunc i32 %7 to i8
%9 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %8, i8* %9
%10 = lshr i32 %1, 24
%11 = trunc i32 %10 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
/* Variables and functions */
char *allocate_string(int);
int /*<<< orphan*/ memcpy(char *, char *, int);
char *substring(char *begin, int len) {
  char *new_string;
  new_string = allocate_string(len);
  memcpy(new_string, begin, len);
  new_string[len] = 0;
  return new_string;
}


x86 assembly (clang, -O0):
<substring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <allocate_string@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<substring>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%r14
mov    %esi,%edi
call   1040 <allocate_string@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebp,%edx
call   1030 <memcpy@plt>
movslq %ebp,%rax
movb   $0x0,(%rbx,%rax,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @substring(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i8* @allocate_string(i32 %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = load i8*, i8** %3
%10 = load i32, i32* %4
%11 = call i32 @memcpy(i8* %8, i8* %9, i32 %10)
%12 = load i8*, i8** %5
%13 = load i32, i32* %4
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
store i8 0, i8* %15
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
define i8* @substring(i8* %0, i32 %1) {
%3 = tail call i8* @allocate_string(i32 %1)
%4 = tail call i32 @memcpy(i8* %3, i8* %0, i32 %1)
%5 = sext i32 %1 to i64
%6 = getelementptr inbounds i8, i8* %3, i64 %5
store i8 0, i8* %6
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int singleNumber(int *, int);
int main(int argc, char const *argv[]) {
  int arr[] = {1, 2, 1, 1, 2, 2, 3};
  printf("%d\n", singleNumber(arr, 7));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xec3(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xec0(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xebd(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xebb(%rip),%eax
mov    %eax,-0x18(%rbp)
lea    -0x30(%rbp),%rdi
mov    $0x7,%esi
call   1030 <singleNumber@plt>
mov    %eax,%esi
lea    0xea5(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movups 0xee1(%rip),%xmm0
movups %xmm0,0xc(%rsp)
movaps 0xec9(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x7,%esi
call   1030 <singleNumber@plt>
lea    0xecd(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.arr = [7 x i32] [i32 1, i32 2, i32 1, i32 1, i32 2, i32 2, i32 3]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [7 x i32]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = bitcast [7 x i32]* %6 to i8*
%8 = getelementptr inbounds [7 x i32], [7 x i32]* %6, i64 0, i64 0
%9 = call i32 @singleNumber(i32* %8, i32 7)
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [7 x i32] [i32 1, i32 2, i32 1, i32 1, i32 2, i32 2, i32 3]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [7 x i32]
%4 = bitcast [7 x i32]* %3 to i8*
%5 = getelementptr inbounds [7 x i32], [7 x i32]* %3, i64 0, i64 0
%6 = call i32 @singleNumber(i32* %5, i32 7)
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ I2CBusNotBusy();
int /*<<< orphan*/ SelectI2CprinterPort(int);
int /*<<< orphan*/ SetI2cBusdelay(int);
void initialize(void) {
  SelectI2CprinterPort(1);
  SetI2cBusdelay(1000);
  I2CBusNotBusy();
}


x86 assembly (clang, -O0):
<initialize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1050 <SelectI2CprinterPort@plt>
mov    $0x3e8,%edi
call   1030 <SetI2cBusdelay@plt>
mov    $0x0,%al
call   1040 <I2CBusNotBusy@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize>:
push   %rax
mov    $0x1,%edi
call   1050 <SelectI2CprinterPort@plt>
mov    $0x3e8,%edi
call   1030 <SetI2cBusdelay@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <I2CBusNotBusy@plt>

LLVM IR (-O0):
define void @initialize() {
%1 = call i32 @SelectI2CprinterPort(i32 1)
%2 = call i32 @SetI2cBusdelay(i32 1000)
%3 = call i32 (...) @I2CBusNotBusy()
ret void
}

LLVM IR (-O2):
define void @initialize() {
%1 = tail call i32 @SelectI2CprinterPort(i32 1)
%2 = tail call i32 @SetI2cBusdelay(i32 1000)
%3 = tail call i32 (...) @I2CBusNotBusy()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ start_compiling();
void define_noname(void) { start_compiling(); }


x86 assembly (clang, -O0):
<define_noname>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <start_compiling@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<define_noname>:
xor    %eax,%eax
jmp    1030 <start_compiling@plt>

LLVM IR (-O0):
define void @define_noname() {
%1 = call i32 (...) @start_compiling()
ret void
}

LLVM IR (-O2):
define void @define_noname() {
%1 = tail call i32 (...) @start_compiling()
ret void
}
void BN_get0_nist_prime_192(void) {}


x86 assembly (clang, -O0):
<BN_get0_nist_prime_192>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_get0_nist_prime_192>:
ret

LLVM IR (-O0):
define void @BN_get0_nist_prime_192() {
ret void
}

LLVM IR (-O2):
define void @BN_get0_nist_prime_192() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ handler_not_implemented(char *);
void defaultUnusedSWIHandler() {
  handler_not_implemented("UNUSED_SWI_HANDLER");
}


x86 assembly (clang, -O0):
<defaultUnusedSWIHandler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <handler_not_implemented@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<defaultUnusedSWIHandler>:
lea    0xee9(%rip),%rdi
jmp    1030 <handler_not_implemented@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"UNUSED_SWI_HANDLER\00"
define void @defaultUnusedSWIHandler() {
%1 = call i32 @handler_not_implemented(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"UNUSED_SWI_HANDLER\00"
define void @defaultUnusedSWIHandler() {
%1 = tail call i32 @handler_not_implemented(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
void *xmalloc(size_t);
void *xmalloc_large(size_t sz) { return xmalloc(sz); }


x86 assembly (clang, -O0):
<xmalloc_large>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <xmalloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc_large>:
jmp    1030 <xmalloc@plt>

LLVM IR (-O0):
define i8* @xmalloc_large(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @xmalloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @xmalloc_large(i64 %0) {
%2 = tail call i8* @xmalloc(i64 %0)
ret i8* %2
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t adts_get_sampling_freq(const uint8_t *p_adts) {
  return (p_adts[2] & 0x3c) >> 2;
}


x86 assembly (clang, -O0):
<adts_get_sampling_freq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
and    $0x3c,%eax
sar    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adts_get_sampling_freq>:
mov    0x8(%rdi),%eax
shr    $0x2,%eax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @adts_get_sampling_freq(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 2
%5 = load i32, i32* %4
%6 = and i32 %5, 60
%7 = ashr i32 %6, 2
ret i32 %7
}

LLVM IR (-O2):
define i32 @adts_get_sampling_freq(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 2
%5 = and i32 %4, 15
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ Cppi41DmaControlScheduler(unsigned int, int, int);
void cppiDmaHandleError(unsigned int usbDevInst) {
  Cppi41DmaControlScheduler(usbDevInst, 0x1, 8);
}


x86 assembly (clang, -O0):
<cppiDmaHandleError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
mov    $0x8,%edx
call   1030 <Cppi41DmaControlScheduler@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cppiDmaHandleError>:
mov    $0x1,%esi
mov    $0x8,%edx
jmp    1030 <Cppi41DmaControlScheduler@plt>

LLVM IR (-O0):
define void @cppiDmaHandleError(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @Cppi41DmaControlScheduler(i32 %3, i32 1, i32 8)
ret void
}

LLVM IR (-O2):
define void @cppiDmaHandleError(i32 %0) {
%2 = tail call i32 @Cppi41DmaControlScheduler(i32 %0, i32 1, i32 8)
ret void
}
/* Variables and functions */
long double __qexp(long double);
long double __q_exp(long double *arg) { return (__qexp(*arg)); }


x86 assembly (clang, -O0):
<__q_exp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
fldt   (%rax)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <__qexp@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__q_exp>:
sub    $0x18,%rsp
fldt   (%rdi)
fstpt  (%rsp)
call   1030 <__qexp@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @__q_exp(x86_fp80* %0) {
%2 = alloca x86_fp80*
store x86_fp80* %0, x86_fp80** %2
%3 = load x86_fp80*, x86_fp80** %2
%4 = load x86_fp80, x86_fp80* %3
%5 = call x86_fp80 @__qexp(x86_fp80 %4)
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @__q_exp(x86_fp80* nocapture %0) {
%2 = load x86_fp80, x86_fp80* %0
%3 = tail call x86_fp80 @__qexp(x86_fp80 %2)
ret x86_fp80 %3
}
void system_sound_silence(void) {}


x86 assembly (clang, -O0):
<system_sound_silence>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<system_sound_silence>:
ret

LLVM IR (-O0):
define void @system_sound_silence() {
ret void
}

LLVM IR (-O2):
define void @system_sound_silence() {
ret void
}
int spudec_yuv_under_threshold(unsigned int yuv, unsigned int y_threshold) {
  return (yuv >> 16 & 0xFF) < y_threshold;
}


x86 assembly (clang, -O0):
<spudec_yuv_under_threshold>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
and    $0xff,%eax
cmp    -0x8(%rbp),%eax
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spudec_yuv_under_threshold>:
shr    $0x10,%edi
movzbl %dil,%ecx
xor    %eax,%eax
cmp    %esi,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @spudec_yuv_under_threshold(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = lshr i32 %5, 16
%7 = and i32 %6, 255
%8 = load i32, i32* %4
%9 = icmp ult i32 %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @spudec_yuv_under_threshold(i32 %0, i32 %1) {
%3 = lshr i32 %0, 16
%4 = and i32 %3, 255
%5 = icmp ult i32 %4, %1
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ AccessoryDesiredHandle();
int /*<<< orphan*/ UAVObjUpdated(int /*<<< orphan*/);
void AccessoryDesiredUpdated() { UAVObjUpdated(AccessoryDesiredHandle()); }


x86 assembly (clang, -O0):
<AccessoryDesiredUpdated>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AccessoryDesiredHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjUpdated@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AccessoryDesiredUpdated>:
push   %rax
xor    %eax,%eax
call   1030 <AccessoryDesiredHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjUpdated@plt>

LLVM IR (-O0):
define void @AccessoryDesiredUpdated() {
%1 = call i32 (...) @AccessoryDesiredHandle()
%2 = call i32 @UAVObjUpdated(i32 %1)
ret void
}

LLVM IR (-O2):
define void @AccessoryDesiredUpdated() {
%1 = tail call i32 (...) @AccessoryDesiredHandle()
%2 = tail call i32 @UAVObjUpdated(i32 %1)
ret void
}
int abs(int num) {
  if (num < 0)
    return num * -1;
  else
    return num;
}


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    111d <abs+0x1d>
imul   $0xffffffff,-0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1123 <abs+0x23>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = mul nsw i32 %7, -1
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* %3
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
int f(int s, int c) {
  int a1, a2, a3, x1, x2, x3, x;
  a1 = 2 * s;
  x1 = a1 + c;
  a2 = 4 * s;
  x2 = a2 + c;
  a3 = 6 * s;
  x3 = a3 + c;
  x = x1 + x2 + x3;
  return x;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
imul   $0x6,-0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%eax
add    -0x1c(%rbp),%eax
add    -0x20(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    (%rsi,%rsi,2),%eax
lea    (%rdi,%rdi,2),%ecx
lea    (%rax,%rcx,4),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%12 = load i32, i32* %3
%13 = mul nsw i32 2, %12
store i32 %13, i32* %5
%14 = load i32, i32* %5
%15 = load i32, i32* %4
%16 = add nsw i32 %14, %15
store i32 %16, i32* %8
%17 = load i32, i32* %3
%18 = mul nsw i32 4, %17
store i32 %18, i32* %6
%19 = load i32, i32* %6
%20 = load i32, i32* %4
%21 = add nsw i32 %19, %20
store i32 %21, i32* %9
%22 = load i32, i32* %3
%23 = mul nsw i32 6, %22
store i32 %23, i32* %7
%24 = load i32, i32* %7
%25 = load i32, i32* %4
%26 = add nsw i32 %24, %25
store i32 %26, i32* %10
%27 = load i32, i32* %8
%28 = load i32, i32* %9
%29 = add nsw i32 %27, %28
%30 = load i32, i32* %10
%31 = add nsw i32 %29, %30
store i32 %31, i32* %11
%32 = load i32, i32* %11
ret i32 %32
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1) {
%3 = mul i32 %1, 3
%4 = mul i32 %0, 12
%5 = add i32 %3, %4
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
char *strstr(const char *s1, const char *s2) {
  (void)s1;
  (void)s2;
  puts("strstr: not implemented");
  return NULL;
}


x86 assembly (clang, -O0):
<strstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strstr>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"strstr: not implemented\00"
define i8* @strstr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @puts(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret i8* null
}

LLVM IR (-O2):
@.str = [24 x i8] c"strstr: not implemented\00"
define noalias i8* @strstr(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret i8* null
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int read(int, char *, int);
int /*<<< orphan*/ write(int, char *, int);
void cat(int fd) {
  char buf[80];
  int c;
  while ((c = read(fd, buf, sizeof(buf))) > 0) {
    write(1, buf, c);
  }
}


x86 assembly (clang, -O0):
<cat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x60(%rbp),%rsi
mov    $0x50,%edx
call   1040 <read@plt>
mov    %eax,-0x64(%rbp)
cmp    $0x0,%eax
jle    115e <cat+0x3e>
lea    -0x60(%rbp),%rsi
mov    -0x64(%rbp),%edx
mov    $0x1,%edi
call   1030 <write@plt>
jmp    112b <cat+0xb>
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cat>:
push   %rbp
push   %rbx
sub    $0x58,%rsp
mov    %edi,%ebp
mov    %rsp,%rsi
mov    $0x50,%edx
call   1040 <read@plt>
test   %eax,%eax
jle    1162 <cat+0x42>
mov    %rsp,%rbx
nopl   0x0(%rax)
mov    $0x1,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    $0x50,%edx
call   1040 <read@plt>
test   %eax,%eax
jg     1140 <cat+0x20>
add    $0x58,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @cat(i32 %0) {
%2 = alloca i32
%3 = alloca [80 x i8]
%4 = alloca i32
store i32 %0, i32* %2
br label %5
5: ; preds = %10, %1
%6 = load i32, i32* %2
%7 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 0
%8 = call i32 @read(i32 %6, i8* %7, i32 80)
store i32 %8, i32* %4
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %5
%11 = getelementptr inbounds [80 x i8], [80 x i8]* %3, i64 0, i64 0
%12 = load i32, i32* %4
%13 = call i32 @write(i32 1, i8* %11, i32 %12)
br label %5
14: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @cat(i32 %0) {
%2 = alloca [80 x i8]
%3 = getelementptr inbounds [80 x i8], [80 x i8]* %2, i64 0, i64 0
%4 = call i32 @read(i32 %0, i8* %3, i32 80)
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1, %6
%7 = phi i32 [ %9, %6 ], [ %4, %1 ]
%8 = call i32 @write(i32 1, i8* %3, i32 %7)
%9 = call i32 @read(i32 %0, i8* %3, i32 80)
%10 = icmp sgt i32 %9, 0
br i1 %10, label %6, label %11
11: ; preds = %6, %1
ret void
}
unsigned ZSTD_32bits(void) { return sizeof(void *) == 4; }


x86 assembly (clang, -O0):
<ZSTD_32bits>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZSTD_32bits>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ZSTD_32bits() {
ret i32 0
}

LLVM IR (-O2):
define i32 @ZSTD_32bits() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ FCEU_DispMessage(char *);
void FCEUD_TurboOff(void) { FCEU_DispMessage("Not implemented."); }


x86 assembly (clang, -O0):
<FCEUD_TurboOff>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <FCEU_DispMessage@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FCEUD_TurboOff>:
lea    0xee9(%rip),%rdi
jmp    1030 <FCEU_DispMessage@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"Not implemented.\00"
define void @FCEUD_TurboOff() {
%1 = call i32 @FCEU_DispMessage(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"Not implemented.\00"
define void @FCEUD_TurboOff() {
%1 = tail call i32 @FCEU_DispMessage(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ log_debug(char *, int);
int /*<<< orphan*/ log_error(char *, int);
int /*<<< orphan*/ log_info(char *, int);
int /*<<< orphan*/ log_warning(char *, int);
int main(int argc, char *argv[]) {
  log_error("test %d", 1);
  log_warning("test %d", 2);
  log_info("test %d", 3);
  log_debug("test %d", 4);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xea3(%rip),%rdi
mov    $0x1,%esi
call   1040 <log_error@plt>
lea    0xe92(%rip),%rdi
mov    $0x2,%esi
call   1060 <log_warning@plt>
lea    0xe81(%rip),%rdi
mov    $0x3,%esi
call   1030 <log_info@plt>
lea    0xe70(%rip),%rdi
mov    $0x4,%esi
call   1050 <log_debug@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xeb8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x1,%esi
call   1040 <log_error@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
call   1060 <log_warning@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
call   1030 <log_info@plt>
mov    %rbx,%rdi
mov    $0x4,%esi
call   1050 <log_debug@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"test %d\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @log_error(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 1)
%7 = call i32 @log_warning(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 2)
%8 = call i32 @log_info(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 3)
%9 = call i32 @log_debug(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"test %d\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @log_error(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = tail call i32 @log_warning(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 2)
%5 = tail call i32 @log_info(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 3)
%6 = tail call i32 @log_debug(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 0
}
void PIOB_IRQHandler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<PIOB_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <PIOB_IRQHandler+0x9>
jmp    1109 <PIOB_IRQHandler+0x9>

x86 assembly (clang, -O2):
<PIOB_IRQHandler>:
jmp    1100 <PIOB_IRQHandler>

LLVM IR (-O0):
define void @PIOB_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @PIOB_IRQHandler() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ MMOUTL(unsigned int, unsigned int);
void ert_write(unsigned int reg, unsigned int data) {
  ;
  MMOUTL(reg, data);
}


x86 assembly (clang, -O0):
<ert_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <MMOUTL@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ert_write>:
jmp    1030 <MMOUTL@plt>

LLVM IR (-O0):
define void @ert_write(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @MMOUTL(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @ert_write(i32 %0, i32 %1) {
%3 = tail call i32 @MMOUTL(i32 %0, i32 %1)
ret void
}
signed long ValidateMaskGp(unsigned char bMask) {
  signed long sdRet = ((signed long)0);
  if ((bMask != (1)) && (bMask != (0))) {
    sdRet = (-1);
  }
  return sdRet;
}


x86 assembly (clang, -O0):
<ValidateMaskGp>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movq   $0x0,-0x10(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x1,%eax
je     1134 <ValidateMaskGp+0x34>
movzbl -0x1(%rbp),%eax
cmp    $0x0,%eax
je     1134 <ValidateMaskGp+0x34>
movq   $0xffffffffffffffff,-0x10(%rbp)
ff
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ValidateMaskGp>:
xor    %eax,%eax
cmp    $0x2,%dil
adc    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i64 @ValidateMaskGp(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i64
store i8 %0, i8* %2
store i64 0, i64* %3
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
store i64 -1, i64* %3
br label %12
12: ; preds = %11, %7, %1
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
define i64 @ValidateMaskGp(i8 zeroext %0) {
%2 = icmp ugt i8 %0, 1
%3 = sext i1 %2 to i64
ret i64 %3
}
double floor(double x) {
  return ({
    extern __typeof__(floor) module_libc_floor;
    &module_libc_floor;
  })(x);
}


x86 assembly (clang, -O0):
<floor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    0x2ee4(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsd  -0x8(%rbp),%xmm0
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<floor>:
jmp    1030 <module_libc_floor@plt>

LLVM IR (-O0):
define double @floor(double %0) {
%2 = alloca double
%3 = alloca double (double)*
store double %0, double* %2
store double (double)* @module_libc_floor, double (double)** %3
%4 = load double (double)*, double (double)** %3
%5 = load double, double* %2
%6 = call double %4(double %5)
ret double %6
}

LLVM IR (-O2):
define double @floor(double %0) {
%2 = tail call double @module_libc_floor(double %0)
ret double %2
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t get_tag_bits(uint8_t tag) {
  return ((tag << 1) & 0x02) | ((tag >> 1) & 0x01);
}


x86 assembly (clang, -O0):
<get_tag_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
and    $0x2,%eax
mov    -0x4(%rbp),%ecx
sar    $0x1,%ecx
and    $0x1,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_tag_bits>:
rol    $0x4,%dil
mov    %edi,%eax
and    $0x33,%al
shl    $0x2,%al
shr    $0x2,%dil
and    $0x33,%dil
or     %al,%dil
mov    %edi,%eax
shr    %al
and    $0x40,%dil
add    %dil,%dil
or     %al,%dil
shr    $0x6,%dil
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @get_tag_bits(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 1
%5 = and i32 %4, 2
%6 = load i32, i32* %2
%7 = ashr i32 %6, 1
%8 = and i32 %7, 1
%9 = or i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @get_tag_bits(i32 %0) {
%2 = trunc i32 %0 to i2
%3 = tail call i2 @llvm.bitreverse.i2(i2 %2)
%4 = zext i2 %3 to i32
ret i32 %4
}
int test_imm_7Duint16_reg(unsigned short val) {
  return ((val) & (0x7D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Duint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x7d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Duint16_reg>:
test   $0x7d,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Duint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 125
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_7Duint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 125
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void vis_netjson_postamble(void) {
  printf("\n  ]\n");
  printf("}\n");
}


x86 assembly (clang, -O0):
<vis_netjson_postamble>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vis_netjson_postamble>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee1(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\0A ]\0A\00"
@.str.1 = [3 x i8] c"}\0A\00"
define void @vis_netjson_postamble() {
%1 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [5 x i8] c"\0A ]\00"
@str.2 = [2 x i8] c"}\00"
define void @vis_netjson_postamble() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([2 x i8], [2 x i8]* @str.2, i64 0, i64 0))
ret void
}
float Sqr(float x) { return x * x; }


x86 assembly (clang, -O0):
<Sqr>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sqr>:
mulss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @Sqr(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
ret float %5
}

LLVM IR (-O2):
define float @Sqr(float %0) {
%2 = fmul float %0, %0
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0xa5() {
  Assert_real((isgraph(165) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              830, ("isgraph should be 0 for 0xa5"));
}


x86 assembly (clang, -O0):
<t_isgraph_0xa5>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa5,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x33e,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0xa5>:
push   %rax
mov    $0xa5,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x33e,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xa5\00"
define void @t_isgraph_0xa5() {
%1 = call i64 @isgraph(i32 165)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 830, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0xa5\00"
define void @t_isgraph_0xa5() {
%1 = tail call i64 @isgraph(i32 165)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 830, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int uevent_init() { return -1; }


x86 assembly (clang, -O0):
<uevent_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uevent_init>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @uevent_init() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @uevent_init() {
ret i32 -1
}