xunge/DecIR huggingface dataset:
int intslen(const int *ints) {
  const int *p;
  for (p = ints; *p; p++)
    ;
  return p - ints;
}


x86 assembly (clang, -O0):
<intslen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
je     1133 <intslen+0x33>
jmp    1122 <intslen+0x22>
mov    -0x10(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <intslen+0x10>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
sar    $0x2,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intslen>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
cmpl   $0x0,(%rdi)
lea    0x4(%rdi),%rdi
jne    1110 <intslen+0x10>
ret

LLVM IR (-O0):
define i32 @intslen(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
store i32* %0, i32** %2
%4 = load i32*, i32** %2
store i32* %4, i32** %3
br label %5
5: ; preds = %10, %1
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %5
br label %10
10: ; preds = %9
%11 = load i32*, i32** %3
%12 = getelementptr inbounds i32, i32* %11, i32 1
store i32* %12, i32** %3
br label %5
13: ; preds = %5
%14 = load i32*, i32** %3
%15 = load i32*, i32** %2
%16 = ptrtoint i32* %14 to i64
%17 = ptrtoint i32* %15 to i64
%18 = sub i64 %16, %17
%19 = sdiv exact i64 %18, 4
%20 = trunc i64 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @intslen(i32* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32* [ %0, %1 ], [ %6, %2 ]
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
%6 = getelementptr inbounds i32, i32* %3, i64 1
br i1 %5, label %7, label %2
7: ; preds = %2
%8 = ptrtoint i32* %3 to i64
%9 = ptrtoint i32* %0 to i64
%10 = sub i64 %8, %9
%11 = lshr exact i64 %10, 2
%12 = trunc i64 %11 to i32
ret i32 %12
}
/* Variables and functions */
int *malloc(int);
int *new_int(int i) {
  int *p = malloc(sizeof(int));
  *p = i;
  return p;
}


x86 assembly (clang, -O0):
<new_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<new_int>:
push   %rbx
mov    %edi,%ebx
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %ebx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i32* @new_int(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = call i32* @malloc(i32 4)
store i32* %4, i32** %3
%5 = load i32, i32* %2
%6 = load i32*, i32** %3
store i32 %5, i32* %6
%7 = load i32*, i32** %3
ret i32* %7
}

LLVM IR (-O2):
define noalias i32* @new_int(i32 %0) {
%2 = tail call i32* @malloc(i32 4)
store i32 %0, i32* %2
ret i32* %2
}
int Util_chrieq(char c1, char c2) {
  switch (c1 ^ c2) {
  case 0x00:
    return 1;
  case 0x20:
    return (c1 >= 'A' && c1 <= 'Z') || (c1 >= 'a' && c1 <= 'z');
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<Util_chrieq>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    -0x5(%rbp),%al
mov    -0x6(%rbp),%cl
xor    %cl,%al
movsbl %al,%eax
mov    %eax,-0xc(%rbp)
test   %eax,%eax
je     113c <Util_chrieq+0x3c>
jmp    112b <Util_chrieq+0x2b>
mov    -0xc(%rbp),%eax
sub    $0x20,%eax
je     1148 <Util_chrieq+0x48>
jmp    119c <Util_chrieq+0x9c>
movl   $0x1,-0x4(%rbp)
jmp    11a3 <Util_chrieq+0xa3>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     1167 <Util_chrieq+0x67>
movsbl -0x5(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5a,%ecx
mov    %al,-0xd(%rbp)
jle    118c <Util_chrieq+0x8c>
movsbl -0x5(%rbp),%ecx
xor    %eax,%eax
cmp    $0x61,%ecx
mov    %al,-0xe(%rbp)
jl     1186 <Util_chrieq+0x86>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
setle  %al
mov    %al,-0xe(%rbp)
mov    -0xe(%rbp),%al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    11a3 <Util_chrieq+0xa3>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Util_chrieq>:
xor    %edi,%esi
je     111b <Util_chrieq+0x1b>
cmp    $0x20,%esi
jne    1121 <Util_chrieq+0x21>
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @Util_chrieq(i8 signext %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
%8 = load i8, i8* %5
%9 = sext i8 %8 to i32
%10 = xor i32 %7, %9
switch i32 %10, label %33 [
i32 0, label %11
i32 32, label %12
]
11: ; preds = %2
store i32 1, i32* %3
br label %34
12: ; preds = %2
%13 = load i8, i8* %4
%14 = sext i8 %13 to i32
%15 = icmp sge i32 %14, 65
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load i8, i8* %4
%18 = sext i8 %17 to i32
%19 = icmp sle i32 %18, 90
br i1 %19, label %30, label %20
20: ; preds = %16, %12
%21 = load i8, i8* %4
%22 = sext i8 %21 to i32
%23 = icmp sge i32 %22, 97
br i1 %23, label %24, label %28
24: ; preds = %20
%25 = load i8, i8* %4
%26 = sext i8 %25 to i32
%27 = icmp sle i32 %26, 122
br label %28
28: ; preds = %24, %20
%29 = phi i1 [ false, %20 ], [ %27, %24 ]
br label %30
30: ; preds = %28, %16
%31 = phi i1 [ true, %16 ], [ %29, %28 ]
%32 = zext i1 %31 to i32
store i32 %32, i32* %3
br label %34
33: ; preds = %2
store i32 0, i32* %3
br label %34
34: ; preds = %33, %30, %11
%35 = load i32, i32* %3
ret i32 %35
}

LLVM IR (-O2):
define i32 @Util_chrieq(i8 signext %0, i8 signext %1) {
%3 = xor i8 %1, %0
%4 = sext i8 %3 to i32
switch i32 %4, label %10 [
i32 0, label %11
i32 32, label %5
]
5: ; preds = %2
%6 = and i8 %0, -33
%7 = add i8 %6, -65
%8 = icmp ult i8 %7, 26
%9 = zext i1 %8 to i32
br label %11
10: ; preds = %2
br label %11
11: ; preds = %2, %10, %5
%12 = phi i32 [ 0, %10 ], [ %9, %5 ], [ 1, %2 ]
ret i32 %12
}
/* Variables and functions */
int copieTexteDeConfig(char *, char *, char *);
int /*<<< orphan*/ printf(char *);
void testCopieTexteDeConfig() {
  char *parametre;
  char *ligne;
  char *configParam;
  int result = copieTexteDeConfig(parametre, ligne, configParam);
  if (1) {
    printf("%%TEST_FAILED%% time=0 testname=testCopieTexteDeConfig "
           "(Test_gestionfichier) message=error message sample\n");
  }
}


x86 assembly (clang, -O0):
<testCopieTexteDeConfig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <copieTexteDeConfig@plt>
mov    %eax,-0x1c(%rbp)
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testCopieTexteDeConfig>:
push   %rax
call   1040 <copieTexteDeConfig@plt>
lea    0xed3(%rip),%rdi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [107 x i8] c"%%TEST_FAILED%% time=0 testname=testCopieTexteDeConfig (Test_gestionfichier) message=error message sample\0A\00"
define void @testCopieTexteDeConfig() {
%1 = alloca i8*
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
%5 = load i8*, i8** %1
%6 = load i8*, i8** %2
%7 = load i8*, i8** %3
%8 = call i32 @copieTexteDeConfig(i8* %5, i8* %6, i8* %7)
store i32 %8, i32* %4
%9 = call i32 @printf(i8* getelementptr inbounds ([107 x i8], [107 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [107 x i8] c"%%TEST_FAILED%% time=0 testname=testCopieTexteDeConfig (Test_gestionfichier) message=error message sample\0A\00"
define void @testCopieTexteDeConfig() {
%1 = tail call i32 @copieTexteDeConfig(i8* undef, i8* undef, i8* undef)
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([107 x i8], [107 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ core7_swap(char *, int);
void U_EMRSETWINDOWEXTEX_swap(char *record, int torev) {
  core7_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_EMRSETWINDOWEXTEX_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core7_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRSETWINDOWEXTEX_swap>:
jmp    1030 <core7_swap@plt>

LLVM IR (-O0):
define void @U_EMRSETWINDOWEXTEX_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core7_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_EMRSETWINDOWEXTEX_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core7_swap(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Circle188(long, long, long);
void circle(long x, long y, long r) { Circle188(x, y, r); }


x86 assembly (clang, -O0):
<circle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <Circle188@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<circle>:
jmp    1030 <Circle188@plt>

LLVM IR (-O0):
define void @circle(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i32 @Circle188(i64 %7, i64 %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @circle(i64 %0, i64 %1, i64 %2) {
%4 = tail call i32 @Circle188(i64 %0, i64 %1, i64 %2)
ret void
}
void XSharpDrawStringStruct(void *dpy, unsigned long drawable, void *gc,
                            void *fontSet, int x, int y, void *str, long offset,
                            long count, int style) {}


x86 assembly (clang, -O0):
<XSharpDrawStringStruct>:
push   %rbp
mov    %rsp,%rbp
mov    0x28(%rbp),%eax
mov    0x20(%rbp),%rax
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    %r9d,-0x28(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSharpDrawStringStruct>:
ret

LLVM IR (-O0):
define void @XSharpDrawStringStruct(i8* %0, i64 %1, i8* %2, i8* %3, i32 %4, i32 %5, i8* %6, i64 %7, i64 %8, i32 %9) {
%11 = alloca i8*
%12 = alloca i64
%13 = alloca i8*
%14 = alloca i8*
%15 = alloca i32
%16 = alloca i32
%17 = alloca i8*
%18 = alloca i64
%19 = alloca i64
%20 = alloca i32
store i8* %0, i8** %11
store i64 %1, i64* %12
store i8* %2, i8** %13
store i8* %3, i8** %14
store i32 %4, i32* %15
store i32 %5, i32* %16
store i8* %6, i8** %17
store i64 %7, i64* %18
store i64 %8, i64* %19
store i32 %9, i32* %20
ret void
}

LLVM IR (-O2):
define void @XSharpDrawStringStruct(i8* nocapture %0, i64 %1, i8* nocapture %2, i8* nocapture %3, i32 %4, i32 %5, i8* nocapture %6, i64 %7, i64 %8, i32 %9) {
ret void
}
int mkstemp(char *template) {
  ;
  typeof(mkstemp) *orig_mkstemp = osym("mkstemp");
  int rc = (*orig_mkstemp)(template);
  if (rc >= 0) {
    trace_openat(rc);
  }
  return rc;
}


x86 assembly (clang, -O0):
<mkstemp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
mov    $0x0,%al
call   1040 <osym@plt>
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdi
call   *%rax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     1161 <mkstemp+0x41>
mov    -0x14(%rbp),%edi
mov    $0x0,%al
call   1030 <trace_openat@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkstemp>:
push   %rbx
mov    %rdi,%rbx
lea    0xed5(%rip),%rdi
xor    %eax,%eax
call   1040 <osym@plt>
cltq
mov    %rbx,%rdi
call   *%rax
mov    %eax,%ebx
test   %eax,%eax
js     1148 <mkstemp+0x28>
mov    %ebx,%edi
xor    %eax,%eax
call   1030 <trace_openat@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"mkstemp\00"
define i32 @mkstemp(i8* %0) {
%2 = alloca i8*
%3 = alloca i32 (i8*)*
%4 = alloca i32
store i8* %0, i8** %2
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @osym to i32 (i8*, ...)*)(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32 (i8*)*
store i32 (i8*)* %7, i32 (i8*)** %3
%8 = load i32 (i8*)*, i32 (i8*)** %3
%9 = load i8*, i8** %2
%10 = call i32 %8(i8* %9)
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = icmp sge i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %1
%14 = load i32, i32* %4
%15 = call i32 (i32, ...) bitcast (i32 (...)* @trace_openat to i32 (i32, ...)*)(i32 %14)
br label %16
16: ; preds = %13, %1
%17 = load i32, i32* %4
ret i32 %17
}

LLVM IR (-O2):
@.str = [8 x i8] c"mkstemp\00"
define i32 @mkstemp(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @osym to i32 (i8*, ...)*)(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32 (i8*)*
%5 = tail call i32 %4(i8* %0)
%6 = icmp sgt i32 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = tail call i32 (i32, ...) bitcast (i32 (...)* @trace_openat to i32 (i32, ...)*)(i32 %5)
br label %9
9: ; preds = %7, %1
ret i32 %5
}
int subtraction(int x, int y) { return x - y; }


x86 assembly (clang, -O0):
<subtraction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<subtraction>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @subtraction(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @subtraction(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
/* Type definitions */
struct timeval {
  int /*<<< orphan*/ member_1;
  int /*<<< orphan*/ member_0;
};
typedef int /*<<< orphan*/ fd_set;

/* Variables and functions */
int /*<<< orphan*/ FD_SET(int, int /*<<< orphan*/ *);
int /*<<< orphan*/ FD_ZERO(int /*<<< orphan*/ *);
int select(int, int /*<<< orphan*/ *, int /*<<< orphan*/ *,
           int /*<<< orphan*/ *, struct timeval *);
bool will_block(int fd) {
  fd_set fdset;
  struct timeval zero = {0, 0};
  FD_ZERO(&fdset);
  FD_SET(fd, &fdset);
  return select(fd + 1, &fdset, NULL, NULL, &zero) != 1;
}


x86 assembly (clang, -O0):
<will_block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1030 <memset@plt>
lea    -0x8(%rbp),%rdi
call   1040 <FD_ZERO@plt>
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
call   1060 <FD_SET@plt>
mov    -0x4(%rbp),%edi
add    $0x1,%edi
lea    -0x8(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%ecx
lea    -0x10(%rbp),%r8
mov    %rcx,%rdx
call   1050 <select@plt>
cmp    $0x1,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<will_block>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %edi,%ebx
movq   $0x0,0x8(%rsp)
lea    0x14(%rsp),%r14
mov    %r14,%rdi
call   1030 <FD_ZERO@plt>
mov    %ebx,%edi
mov    %r14,%rsi
call   1050 <FD_SET@plt>
add    $0x1,%ebx
lea    0x8(%rsp),%r8
mov    %ebx,%edi
mov    %r14,%rsi
xor    %edx,%edx
xor    %ecx,%ecx
call   1040 <select@plt>
xor    %ecx,%ecx
cmp    $0x1,%eax
setne  %cl
mov    %ecx,%eax
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i32 @will_block(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca %struct.timeval
store i32 %0, i32* %2
%5 = bitcast %struct.timeval* %4 to i8*
%6 = call i32 @FD_ZERO(i32* %3)
%7 = load i32, i32* %2
%8 = call i32 @FD_SET(i32 %7, i32* %3)
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
%11 = call i32 @select(i32 %10, i32* %3, i32* null, i32* null, %struct.timeval* %4)
%12 = icmp ne i32 %11, 1
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i32 @will_block(i32 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = bitcast i64* %3 to %struct.timeval*
%5 = bitcast i32* %2 to i8*
%6 = bitcast i64* %3 to i8*
store i64 0, i64* %3
%7 = call i32 @FD_ZERO(i32* %2)
%8 = call i32 @FD_SET(i32 %0, i32* %2)
%9 = add nsw i32 %0, 1
%10 = call i32 @select(i32 %9, i32* %2, i32* null, i32* null, %struct.timeval* %4)
%11 = icmp ne i32 %10, 1
%12 = zext i1 %11 to i32
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, char const *);
void info_callback(const char *msg, void *client_data) {
  FILE *stream = (FILE *)client_data;
  fprintf(stream, "[INFO] %s", msg);
}


x86 assembly (clang, -O0):
<info_callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
lea    0xec9(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<info_callback>:
mov    %rsi,%rax
mov    %rdi,%rdx
lea    0xee3(%rip),%rsi
mov    %rax,%rdi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"[INFO] %s\00"
define void @info_callback(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32*, i32** %5
%9 = load i8*, i8** %3
%10 = call i32 @fprintf(i32* %8, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"[INFO] %s\00"
define void @info_callback(i8* %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = tail call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GL_TRIANGLES;
int /*<<< orphan*/ glDrawArrays(int /*<<< orphan*/, unsigned short,
                                unsigned short);
void zlForceRender(unsigned short i_start, unsigned short i_end) {
  glDrawArrays(GL_TRIANGLES, i_start, i_end);
}


x86 assembly (clang, -O0):
<zlForceRender>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
mov    -0x2(%rbp),%ax
movzwl %ax,%esi
movzwl -0x4(%rbp),%edx
call   1030 <glDrawArrays@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zlForceRender>:
mov    %esi,%edx
mov    %edi,%esi
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
jmp    1030 <glDrawArrays@plt>

LLVM IR (-O0):
@GL_TRIANGLES = global i32 0
define void @zlForceRender(i16 zeroext %0, i16 zeroext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i32, i32* @GL_TRIANGLES
%6 = load i16, i16* %3
%7 = load i16, i16* %4
%8 = call i32 @glDrawArrays(i32 %5, i16 zeroext %6, i16 zeroext %7)
ret void
}

LLVM IR (-O2):
@GL_TRIANGLES = global i32 0
define void @zlForceRender(i16 zeroext %0, i16 zeroext %1) {
%3 = load i32, i32* @GL_TRIANGLES
%4 = tail call i32 @glDrawArrays(i32 %3, i16 zeroext %0, i16 zeroext %1)
ret void
}
void inst_nop() {}


x86 assembly (clang, -O0):
<inst_nop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inst_nop>:
ret

LLVM IR (-O0):
define void @inst_nop() {
ret void
}

LLVM IR (-O2):
define void @inst_nop() {
ret void
}
void console_echo(int on) {}


x86 assembly (clang, -O0):
<console_echo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_echo>:
ret

LLVM IR (-O0):
define void @console_echo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @console_echo(i32 %0) {
ret void
}
/* Variables and functions */
int open(char *, int);
int open_(char filnam[], int *mode) { return (open(filnam, *mode)); }


x86 assembly (clang, -O0):
<open_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
call   1030 <open@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_>:
mov    (%rsi),%esi
jmp    1030 <open@plt>

LLVM IR (-O0):
define i32 @open_(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = call i32 @open(i8* %5, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @open_(i8* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %1
%4 = tail call i32 @open(i8* %0, i32 %3)
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ pid_t;

/* Variables and functions */
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ dprintf(int, char *, unsigned int);
void write_pid(int pid_fd, pid_t pid) {
  if (pid_fd != -1) {
    dprintf(pid_fd, "%u\n", (unsigned int)pid);
    close(pid_fd);
  }
}


x86 assembly (clang, -O0):
<write_pid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
je     1156 <write_pid+0x36>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rax
mov    %eax,%edx
lea    0xeb7(%rip),%rsi
call   1040 <dprintf@plt>
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_pid>:
cmp    $0xffffffff,%edi
je     113f <write_pid+0x1f>
push   %rbx
mov    %rsi,%rdx
mov    %edi,%ebx
lea    0xece(%rip),%rsi
call   1040 <dprintf@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <close@plt>
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%u\0A\00"
define void @write_pid(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, -1
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load i64, i64* %4
%10 = trunc i64 %9 to i32
%11 = call i32 @dprintf(i32 %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %10)
%12 = load i32, i32* %3
%13 = call i32 @close(i32 %12)
br label %14
14: ; preds = %7, %2
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%u\0A\00"
define void @write_pid(i32 %0, i64 %1) {
%3 = icmp eq i32 %0, -1
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = trunc i64 %1 to i32
%6 = tail call i32 @dprintf(i32 %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = tail call i32 @close(i32 %0)
br label %8
8: ; preds = %4, %2
ret void
}
void __mew_flash_read_sector_async_handler(void) {}


x86 assembly (clang, -O0):
<__mew_flash_read_sector_async_handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__mew_flash_read_sector_async_handler>:
ret

LLVM IR (-O0):
define void @__mew_flash_read_sector_async_handler() {
ret void
}

LLVM IR (-O2):
define void @__mew_flash_read_sector_async_handler() {
ret void
}
/* Variables and functions */
int ObjectSize1(void *const);
int IndirectObjectSize1(void *const p __attribute__((pass_object_size(1)))) {
  return ObjectSize1(p);
}


x86 assembly (clang, -O0):
<IndirectObjectSize1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ObjectSize1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IndirectObjectSize1>:
jmp    1030 <ObjectSize1@plt>

LLVM IR (-O0):
define i32 @IndirectObjectSize1(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = call i32 @ObjectSize1(i8* %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @IndirectObjectSize1(i8* %0, i64 %1) {
%3 = tail call i32 @ObjectSize1(i8* %0)
ret i32 %3
}
void PNALDebugTraceNone(const char *pMessage, ...) {}


x86 assembly (clang, -O0):
<PNALDebugTraceNone>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PNALDebugTraceNone>:
ret

LLVM IR (-O0):
define void @PNALDebugTraceNone(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @PNALDebugTraceNone(i8* nocapture %0, ...) {
ret void
}
/* Variables and functions */
unsigned long __raw_local_save_flags();
int /*<<< orphan*/ raw_local_irq_disable();
unsigned long __raw_local_irq_save(void) {
  unsigned long flags = __raw_local_save_flags();
  raw_local_irq_disable();
  return flags;
}


x86 assembly (clang, -O0):
<__raw_local_irq_save>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <__raw_local_save_flags@plt>
mov    %rax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <raw_local_irq_disable@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__raw_local_irq_save>:
push   %rbx
xor    %eax,%eax
call   1030 <__raw_local_save_flags@plt>
mov    %rax,%rbx
xor    %eax,%eax
call   1040 <raw_local_irq_disable@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @__raw_local_irq_save() {
%1 = alloca i64
%2 = call i64 (...) @__raw_local_save_flags()
store i64 %2, i64* %1
%3 = call i32 (...) @raw_local_irq_disable()
%4 = load i64, i64* %1
ret i64 %4
}

LLVM IR (-O2):
define i64 @__raw_local_irq_save() {
%1 = tail call i64 (...) @__raw_local_save_flags()
%2 = tail call i32 (...) @raw_local_irq_disable()
ret i64 %1
}
int iszero(double a) { return a * a < 2.2204460492503131e-16; }


x86 assembly (clang, -O0):
<iszero>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm1
mulsd  -0x8(%rbp),%xmm1
movsd  0xee5(%rip),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iszero>:
mulsd  %xmm0,%xmm0
movsd  0xef4(%rip),%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
seta   %al
ret

LLVM IR (-O0):
define i32 @iszero(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
%6 = fcmp olt double %5, 0x3CB0000000000000
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @iszero(double %0) {
%2 = fmul double %0, %0
%3 = fcmp olt double %2, 0x3CB0000000000000
%4 = zext i1 %3 to i32
ret i32 %4
}
int test_imm_E1int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xE1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E1int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xe1,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E1int64_midword_mem>:
testb  $0xe1,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E1int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 225
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_E1int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 14745600
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ screen_putch(char);
void console_putch(char c) { screen_putch(c); }


x86 assembly (clang, -O0):
<console_putch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <screen_putch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_putch>:
jmp    1030 <screen_putch@plt>

LLVM IR (-O0):
define void @console_putch(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @screen_putch(i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @console_putch(i8 signext %0) {
%2 = tail call i32 @screen_putch(i8 signext %0)
ret void
}
void UYVYToARGBRow_Any_SSSE3() {}


x86 assembly (clang, -O0):
<UYVYToARGBRow_Any_SSSE3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UYVYToARGBRow_Any_SSSE3>:
ret

LLVM IR (-O0):
define void @UYVYToARGBRow_Any_SSSE3() {
ret void
}

LLVM IR (-O2):
define void @UYVYToARGBRow_Any_SSSE3() {
ret void
}
void ERR_load_ERR_strings(void) {}


x86 assembly (clang, -O0):
<ERR_load_ERR_strings>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ERR_load_ERR_strings>:
ret

LLVM IR (-O0):
define void @ERR_load_ERR_strings() {
ret void
}

LLVM IR (-O2):
define void @ERR_load_ERR_strings() {
ret void
}
__attribute__((no)) char *Ident(char *x) { return x; }


x86 assembly (clang, -O0):
<Ident>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ident>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @Ident(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @Ident(i8* readnone returned %0) {
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int __syscall_ret(int /*<<< orphan*/);
int sched_getscheduler(pid_t pid) { return __syscall_ret(-ENOSYS); }


x86 assembly (clang, -O0):
<sched_getscheduler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
mov    0x2ec4(%rip),%rax
sub    (%rax),%edi
call   1030 <__syscall_ret@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_getscheduler>:
mov    0x2ed1(%rip),%rax
xor    %edi,%edi
sub    (%rax),%edi
jmp    1030 <__syscall_ret@plt>

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @sched_getscheduler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @ENOSYS
%4 = sub nsw i32 0, %3
%5 = call i32 @__syscall_ret(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @sched_getscheduler(i32 %0) {
%2 = load i32, i32* @ENOSYS
%3 = sub nsw i32 0, %2
%4 = tail call i32 @__syscall_ret(i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) { printf("Hello, python\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello, python\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello, python\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int move_obstacle(long obs[2 * 10 + 1], long dx, long dy) {
  obs[0] = obs[0];
  dx = dx;
  dy = dy;
  return (1);
}


x86 assembly (clang, -O0):
<move_obstacle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<move_obstacle>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @move_obstacle(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64*, i64** %4
%8 = getelementptr inbounds i64, i64* %7, i64 0
%9 = load i64, i64* %8
%10 = load i64*, i64** %4
%11 = getelementptr inbounds i64, i64* %10, i64 0
store i64 %9, i64* %11
%12 = load i64, i64* %5
store i64 %12, i64* %5
%13 = load i64, i64* %6
store i64 %13, i64* %6
ret i32 1
}

LLVM IR (-O2):
define i32 @move_obstacle(i64* nocapture readnone %0, i64 %1, i64 %2) {
ret i32 1
}
int test_imm_22uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x22 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_22uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x22,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_22uint64_lowword_reg>:
test   $0x22,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_22uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 34
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_22uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 34
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ part_nd_address_rec(int, int /*<<< orphan*/, int,
                                       unsigned int, unsigned int const *,
                                       unsigned int *);
void part_nd_address(int dim, unsigned int addr, const unsigned int *size,
                     unsigned int *pos) {
  part_nd_address_rec(1, 0, dim, addr, size, pos);
}


x86 assembly (clang, -O0):
<part_nd_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%r8
mov    -0x18(%rbp),%r9
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <part_nd_address_rec@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<part_nd_address>:
mov    %rcx,%r9
mov    %rdx,%r8
mov    %esi,%ecx
mov    %edi,%edx
mov    $0x1,%edi
xor    %esi,%esi
jmp    1030 <part_nd_address_rec@plt>

LLVM IR (-O0):
define void @part_nd_address(i32 %0, i32 %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32*, i32** %7
%12 = load i32*, i32** %8
%13 = call i32 @part_nd_address_rec(i32 1, i32 0, i32 %9, i32 %10, i32* %11, i32* %12)
ret void
}

LLVM IR (-O2):
define void @part_nd_address(i32 %0, i32 %1, i32* %2, i32* %3) {
%5 = tail call i32 @part_nd_address_rec(i32 1, i32 0, i32 %0, i32 %1, i32* %2, i32* %3)
ret void
}
/* Variables and functions */
size_t Minsz(size_t a, size_t b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<Minsz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1127 <Minsz+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <Minsz+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Minsz>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovb  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @Minsz(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @Minsz(i64 %0, i64 %1) {
%3 = icmp ult i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
void swap(int *a, int *b) {
  *a = *a ^ *b;
  *b = *b ^ *a;
  *a = *a ^ *b;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
xor    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
xor    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
xor    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rsi),%eax
xor    (%rdi),%eax
mov    %eax,(%rdi)
xor    (%rsi),%eax
mov    %eax,(%rsi)
xor    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = xor i32 %6, %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32*, i32** %4
%12 = load i32, i32* %11
%13 = load i32*, i32** %3
%14 = load i32, i32* %13
%15 = xor i32 %12, %14
%16 = load i32*, i32** %4
store i32 %15, i32* %16
%17 = load i32*, i32** %3
%18 = load i32, i32* %17
%19 = load i32*, i32** %4
%20 = load i32, i32* %19
%21 = xor i32 %18, %20
%22 = load i32*, i32** %3
store i32 %21, i32* %22
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = xor i32 %4, %3
store i32 %5, i32* %0
%6 = load i32, i32* %1
%7 = xor i32 %6, %5
store i32 %7, i32* %1
%8 = load i32, i32* %0
%9 = xor i32 %8, %7
store i32 %9, i32* %0
ret void
}
int main() { return +15; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0xf,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 15
}

LLVM IR (-O2):
define i32 @main() {
ret i32 15
}
int maxDivide(int a, int b) {
  while (a % b == 0)
    a = a / b;
  return a;
}


x86 assembly (clang, -O0):
<maxDivide>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
cmp    $0x0,%edx
jne    1129 <maxDivide+0x29>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0x4(%rbp)
jmp    110a <maxDivide+0xa>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxDivide>:
mov    %edi,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cltd
idiv   %esi
mov    %edi,%eax
test   %edx,%edx
jne    1120 <maxDivide+0x20>
cltd
idiv   %esi
mov    %eax,%edi
jmp    1110 <maxDivide+0x10>
ret

LLVM IR (-O0):
define i32 @maxDivide(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %5
5: ; preds = %10, %2
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = srem i32 %6, %7
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = sdiv i32 %11, %12
store i32 %13, i32* %3
br label %5
14: ; preds = %5
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @maxDivide(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %10
5: ; preds = %2, %5
%6 = phi i32 [ %7, %5 ], [ %0, %2 ]
%7 = sdiv i32 %6, %1
%8 = srem i32 %7, %1
%9 = icmp eq i32 %8, 0
br i1 %9, label %5, label %10
10: ; preds = %5, %2
%11 = phi i32 [ %0, %2 ], [ %7, %5 ]
ret i32 %11
}
void sna_vertex_unlock(struct sna_render *r) {}


x86 assembly (clang, -O0):
<sna_vertex_unlock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sna_vertex_unlock>:
ret

LLVM IR (-O0):
%struct.sna_render = type opaque
define void @sna_vertex_unlock(%struct.sna_render* %0) {
%2 = alloca %struct.sna_render*
store %struct.sna_render* %0, %struct.sna_render** %2
ret void
}

LLVM IR (-O2):
%struct.sna_render = type opaque
define void @sna_vertex_unlock(%struct.sna_render* nocapture %0) {
ret void
}
/* Variables and functions */
int __SIGRTMIN;
int __nptl_is_internal_signal(int sig) {
  return (sig == __SIGRTMIN) || (sig == __SIGRTMIN) ||
         (sig == (__SIGRTMIN + 1));
}


x86 assembly (clang, -O0):
<__nptl_is_internal_signal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x1,%al
mov    0x2ed5(%rip),%rdx
cmp    (%rdx),%ecx
mov    %al,-0x5(%rbp)
je     114c <__nptl_is_internal_signal+0x4c>
mov    -0x4(%rbp),%ecx
mov    $0x1,%al
mov    0x2ebe(%rip),%rdx
cmp    (%rdx),%ecx
mov    %al,-0x5(%rbp)
je     114c <__nptl_is_internal_signal+0x4c>
mov    -0x4(%rbp),%eax
mov    0x2ea9(%rip),%rcx
mov    (%rcx),%ecx
add    $0x1,%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__nptl_is_internal_signal>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
cmp    %edi,%eax
sete   %cl
add    $0x1,%eax
cmp    %edi,%eax
sete   %al
or     %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
@__SIGRTMIN = global i32 0
define i32 @__nptl_is_internal_signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @__SIGRTMIN
%5 = icmp eq i32 %3, %4
br i1 %5, label %15, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = load i32, i32* @__SIGRTMIN
%9 = icmp eq i32 %7, %8
br i1 %9, label %15, label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = load i32, i32* @__SIGRTMIN
%13 = add nsw i32 %12, 1
%14 = icmp eq i32 %11, %13
br label %15
15: ; preds = %10, %6, %1
%16 = phi i1 [ true, %6 ], [ true, %1 ], [ %14, %10 ]
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
@__SIGRTMIN = global i32 0
define i32 @__nptl_is_internal_signal(i32 %0) {
%2 = load i32, i32* @__SIGRTMIN
%3 = icmp eq i32 %2, %0
%4 = add nsw i32 %2, 1
%5 = icmp eq i32 %4, %0
%6 = select i1 %3, i1 true, i1 %5
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ GPIOPinTypeGPIOOutput(int, int);
int /*<<< orphan*/ GPIOPinWrite(int, int, int /*<<< orphan*/);
int /*<<< orphan*/ SysCtlPeripheralEnable(int);
void LedInit(void) {
  SysCtlPeripheralEnable(0x20000020);
  GPIOPinTypeGPIOOutput(0x40025000, 0x01);
  GPIOPinWrite(0x40025000, 0x01, 0);
}


x86 assembly (clang, -O0):
<LedInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20000020,%edi
call   1030 <SysCtlPeripheralEnable@plt>
mov    $0x40025000,%edi
mov    $0x1,%esi
call   1040 <GPIOPinTypeGPIOOutput@plt>
mov    $0x40025000,%edi
mov    $0x1,%esi
xor    %edx,%edx
call   1050 <GPIOPinWrite@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedInit>:
push   %rax
mov    $0x20000020,%edi
call   1030 <SysCtlPeripheralEnable@plt>
mov    $0x40025000,%edi
mov    $0x1,%esi
call   1040 <GPIOPinTypeGPIOOutput@plt>
mov    $0x40025000,%edi
mov    $0x1,%esi
xor    %edx,%edx
pop    %rax
jmp    1050 <GPIOPinWrite@plt>

LLVM IR (-O0):
define void @LedInit() {
%1 = call i32 @SysCtlPeripheralEnable(i32 536870944)
%2 = call i32 @GPIOPinTypeGPIOOutput(i32 1073893376, i32 1)
%3 = call i32 @GPIOPinWrite(i32 1073893376, i32 1, i32 0)
ret void
}

LLVM IR (-O2):
define void @LedInit() {
%1 = tail call i32 @SysCtlPeripheralEnable(i32 536870944)
%2 = tail call i32 @GPIOPinTypeGPIOOutput(i32 1073893376, i32 1)
%3 = tail call i32 @GPIOPinWrite(i32 1073893376, i32 1, i32 0)
ret void
}
int do_253() { return 253; }


x86 assembly (clang, -O0):
<do_253>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfd,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_253>:
mov    $0xfd,%eax
ret

LLVM IR (-O0):
define i32 @do_253() {
ret i32 253
}

LLVM IR (-O2):
define i32 @do_253() {
ret i32 253
}
float check(float x, float y) { return __builtin_copysignf(x, y); }


x86 assembly (clang, -O0):
<check>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
movaps 0xee1(%rip),%xmm2
pand   %xmm2,%xmm1
movaps 0xee6(%rip),%xmm2
pand   %xmm2,%xmm0
por    %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<check>:
andps  0xef9(%rip),%xmm1
andps  0xf02(%rip),%xmm0
orps   %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @check(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @llvm.copysign.f32(float %5, float %6)
ret float %7
}

LLVM IR (-O2):
define float @check(float %0, float %1) {
%3 = tail call float @llvm.copysign.f32(float %0, float %1)
ret float %3
}
int cmp(const void *x, const void *y) { return *((int *)x) - *((int *)y); }


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
int json_find(const char *text, char test) {
  int index = 0;
  char current = text[index];
  while (current != 0) {
    if ((current = text[index++]) == test) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<json_find>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x19(%rbp)
movsbl -0x19(%rbp),%eax
cmp    $0x0,%eax
je     1168 <json_find+0x68>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0x18(%rbp)
movslq %ecx,%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x19(%rbp)
movsbl %al,%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    1163 <json_find+0x63>
movl   $0x1,-0x4(%rbp)
jmp    116f <json_find+0x6f>
jmp    1123 <json_find+0x23>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<json_find>:
mov    (%rdi),%al
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
test   %al,%al
je     1126 <json_find+0x26>
movzbl (%rdi),%eax
add    $0x1,%rdi
cmp    %sil,%al
jne    1110 <json_find+0x10>
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @json_find(i8* %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
%7 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 0, i32* %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
store i8 %12, i8* %7
br label %13
13: ; preds = %29, %2
%14 = load i8, i8* %7
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %30
17: ; preds = %13
%18 = load i8*, i8** %4
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
store i32 %20, i32* %6
%21 = sext i32 %19 to i64
%22 = getelementptr inbounds i8, i8* %18, i64 %21
%23 = load i8, i8* %22
store i8 %23, i8* %7
%24 = sext i8 %23 to i32
%25 = load i8, i8* %5
%26 = sext i8 %25 to i32
%27 = icmp eq i32 %24, %26
br i1 %27, label %28, label %29
28: ; preds = %17
store i32 1, i32* %3
br label %31
29: ; preds = %17
br label %13
30: ; preds = %13
store i32 0, i32* %3
br label %31
31: ; preds = %30, %28
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @json_find(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
br label %4
4: ; preds = %8, %2
%5 = phi i64 [ %9, %8 ], [ 0, %2 ]
%6 = phi i8 [ %11, %8 ], [ %3, %2 ]
%7 = icmp eq i8 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %4
%9 = add nuw i64 %5, 1
%10 = getelementptr inbounds i8, i8* %0, i64 %5
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, %1
br i1 %12, label %13, label %4
13: ; preds = %4, %8
%14 = phi i32 [ 1, %8 ], [ 0, %4 ]
ret i32 %14
}
unsigned short test1(unsigned short a) {
  a ^= 0x4002;
  a >>= 1;
  a |= 0x8000;
  return a;
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
xor    $0x4002,%eax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
sar    $0x1,%eax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
or     $0x8000,%eax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
mov    %edi,%eax
shr    %eax
xor    $0xa001,%eax
ret

LLVM IR (-O0):
define zeroext i16 @test1(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = xor i32 %4, 16386
%6 = trunc i32 %5 to i16
store i16 %6, i16* %2
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = ashr i32 %8, 1
%10 = trunc i32 %9 to i16
store i16 %10, i16* %2
%11 = load i16, i16* %2
%12 = zext i16 %11 to i32
%13 = or i32 %12, 32768
%14 = trunc i32 %13 to i16
store i16 %14, i16* %2
%15 = load i16, i16* %2
ret i16 %15
}

LLVM IR (-O2):
define zeroext i16 @test1(i16 zeroext %0) {
%2 = lshr i16 %0, 1
%3 = xor i16 %2, -24575
ret i16 %3
}