xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ condition_run_test();
int /*<<< orphan*/ dst_and_src_run_test();
int /*<<< orphan*/ dst_run_test();
int /*<<< orphan*/ none_run_test();
int /*<<< orphan*/ rp_run_test();
int /*<<< orphan*/ simple_run_test();
int /*<<< orphan*/ src_run_test();
int main(int argc, const char *argv[]) {
  simple_run_test();
  dst_run_test();
  src_run_test();
  rp_run_test();
  dst_and_src_run_test();
  condition_run_test();
  none_run_test();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1080 <simple_run_test@plt>
mov    $0x0,%al
call   1030 <dst_run_test@plt>
mov    $0x0,%al
call   1060 <src_run_test@plt>
mov    $0x0,%al
call   1040 <rp_run_test@plt>
mov    $0x0,%al
call   1090 <dst_and_src_run_test@plt>
mov    $0x0,%al
call   1070 <condition_run_test@plt>
mov    $0x0,%al
call   1050 <none_run_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1080 <simple_run_test@plt>
xor    %eax,%eax
call   1030 <dst_run_test@plt>
xor    %eax,%eax
call   1060 <src_run_test@plt>
xor    %eax,%eax
call   1040 <rp_run_test@plt>
xor    %eax,%eax
call   1090 <dst_and_src_run_test@plt>
xor    %eax,%eax
call   1070 <condition_run_test@plt>
xor    %eax,%eax
call   1050 <none_run_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @simple_run_test()
%7 = call i32 (...) @dst_run_test()
%8 = call i32 (...) @src_run_test()
%9 = call i32 (...) @rp_run_test()
%10 = call i32 (...) @dst_and_src_run_test()
%11 = call i32 (...) @condition_run_test()
%12 = call i32 (...) @none_run_test()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @simple_run_test()
%4 = tail call i32 (...) @dst_run_test()
%5 = tail call i32 (...) @src_run_test()
%6 = tail call i32 (...) @rp_run_test()
%7 = tail call i32 (...) @dst_and_src_run_test()
%8 = tail call i32 (...) @condition_run_test()
%9 = tail call i32 (...) @none_run_test()
ret i32 0
}
void gdk_x11_screen_lookup_visual() {}


x86 assembly (clang, -O0):
<gdk_x11_screen_lookup_visual>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_x11_screen_lookup_visual>:
ret

LLVM IR (-O0):
define void @gdk_x11_screen_lookup_visual() {
ret void
}

LLVM IR (-O2):
define void @gdk_x11_screen_lookup_visual() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Show_library(int /*<<< orphan*/);
int /*<<< orphan*/ triList(int);
void IF_show_libusr(void) { Show_library(triList(64)); }


x86 assembly (clang, -O0):
<IF_show_libusr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40,%edi
call   1040 <triList@plt>
mov    %eax,%edi
call   1030 <Show_library@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IF_show_libusr>:
push   %rax
mov    $0x40,%edi
call   1040 <triList@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <Show_library@plt>

LLVM IR (-O0):
define void @IF_show_libusr() {
%1 = call i32 @triList(i32 64)
%2 = call i32 @Show_library(i32 %1)
ret void
}

LLVM IR (-O2):
define void @IF_show_libusr() {
%1 = tail call i32 @triList(i32 64)
%2 = tail call i32 @Show_library(i32 %1)
ret void
}
/* Type definitions */
struct util_list {
  int dummy;
};

/* Variables and functions */
void *util_list_next(struct util_list *, void *);
void *util_list_start(struct util_list *);
unsigned long util_list_len(struct util_list *list) {
  unsigned long cnt = 0;
  void *entry;
  for (entry = util_list_start(list); entry != NULL;
       entry = util_list_next(list, entry))
    cnt++;
  return cnt;
}


x86 assembly (clang, -O0):
<util_list_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <util_list_start@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     116e <util_list_len+0x4e>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <util_list_next@plt>
mov    %rax,-0x18(%rbp)
jmp    1141 <util_list_len+0x21>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_list_len>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <util_list_start@plt>
xor    %ebx,%ebx
test   %rax,%rax
je     1154 <util_list_len+0x34>
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
add    $0x1,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1030 <util_list_next@plt>
test   %rax,%rax
jne    1140 <util_list_len+0x20>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.util_list = type { i32 }
define i64 @util_list_len(%struct.util_list* %0) {
%2 = alloca %struct.util_list*
%3 = alloca i64
%4 = alloca i8*
store %struct.util_list* %0, %struct.util_list** %2
store i64 0, i64* %3
%5 = load %struct.util_list*, %struct.util_list** %2
%6 = call i8* @util_list_start(%struct.util_list* %5)
store i8* %6, i8** %4
br label %7
7: ; preds = %13, %1
%8 = load i8*, i8** %4
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = load i64, i64* %3
%12 = add i64 %11, 1
store i64 %12, i64* %3
br label %13
13: ; preds = %10
%14 = load %struct.util_list*, %struct.util_list** %2
%15 = load i8*, i8** %4
%16 = call i8* @util_list_next(%struct.util_list* %14, i8* %15)
store i8* %16, i8** %4
br label %7
17: ; preds = %7
%18 = load i64, i64* %3
ret i64 %18
}

LLVM IR (-O2):
%struct.util_list = type { i32 }
define i64 @util_list_len(%struct.util_list* %0) {
%2 = tail call i8* @util_list_start(%struct.util_list* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %10, label %4
4: ; preds = %1, %4
%5 = phi i8* [ %8, %4 ], [ %2, %1 ]
%6 = phi i64 [ %7, %4 ], [ 0, %1 ]
%7 = add i64 %6, 1
%8 = tail call i8* @util_list_next(%struct.util_list* %0, i8* %5)
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %4
10: ; preds = %4, %1
%11 = phi i64 [ 0, %1 ], [ %7, %4 ]
ret i64 %11
}
void jz_writeb(unsigned int address, unsigned char value) {
  *((volatile unsigned char *)address) = value;
}


x86 assembly (clang, -O0):
<jz_writeb>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%cl
mov    -0x4(%rbp),%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<jz_writeb>:
mov    %edi,%eax
mov    %sil,(%rax)
ret

LLVM IR (-O0):
define void @jz_writeb(i32 %0, i8 zeroext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i32, i32* %3
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i8*
store volatile i8 %5, i8* %8
ret void
}

LLVM IR (-O2):
define void @jz_writeb(i32 %0, i8 zeroext %1) {
%3 = zext i32 %0 to i64
%4 = inttoptr i64 %3 to i8*
store volatile i8 %1, i8* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int strend(char *, char *);
int main() {
  char s[] = "our shareholder";
  char t[] = "holder";
  printf("%d\n", strend(s, t));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xec7(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0xec5(%rip),%eax
mov    %eax,-0x27(%rbp)
mov    0xebf(%rip),%ax
mov    %ax,-0x23(%rbp)
mov    0xeb7(%rip),%al
mov    %al,-0x21(%rbp)
lea    -0x20(%rbp),%rdi
lea    -0x27(%rbp),%rsi
call   1040 <strend@plt>
mov    %eax,%esi
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
movaps 0xed5(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movl   $0x726564,0xb(%rsp)
movl   $0x646c6f68,0x8(%rsp)
64
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1040 <strend@plt>
lea    0xec1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@__const.main.s = [16 x i8] c"our shareholder\00"
@__const.main.t = [7 x i8] c"holder\00"
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [16 x i8]
%3 = alloca [7 x i8]
store i32 0, i32* %1
%4 = bitcast [16 x i8]* %2 to i8*
%5 = bitcast [7 x i8]* %3 to i8*
%6 = getelementptr inbounds [16 x i8], [16 x i8]* %2, i64 0, i64 0
%7 = getelementptr inbounds [7 x i8], [7 x i8]* %3, i64 0, i64 0
%8 = call i32 @strend(i8* %6, i8* %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@__const.main.s = [16 x i8] c"our shareholder\00"
@__const.main.t = [7 x i8] c"holder\00"
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [16 x i8]
%2 = alloca [7 x i8]
%3 = getelementptr inbounds [16 x i8], [16 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [7 x i8], [7 x i8]* %2, i64 0, i64 0
%5 = call i32 @strend(i8* %3, i8* %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
reg0regx1(r0, r1, x0, x1, p0, p1) unsigned short r0, r1;
unsigned short *p0, *p1;
{
  if (r0 <= (p1[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<reg0regx1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %di,%si
mov    %si,-0x6(%rbp)
mov    %ax,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
movzwl -0x6(%rbp),%eax
mov    -0x20(%rbp),%rcx
movslq -0x10(%rbp),%rdx
movzwl (%rcx,%rdx,2),%ecx
cmp    %ecx,%eax
jg     1143 <reg0regx1+0x43>
movl   $0x1,-0x4(%rbp)
jmp    114a <reg0regx1+0x4a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg0regx1>:
movzwl %di,%edx
movslq %ecx,%rax
movzwl (%r9,%rax,2),%ecx
xor    %eax,%eax
cmp    %ecx,%edx
setbe  %al
ret

LLVM IR (-O0):
define i32 @reg0regx1(i32 %0, i32 %1, i32 %2, i32 %3, i16* %4, i16* %5) {
%7 = alloca i32
%8 = alloca i16
%9 = alloca i16
%10 = alloca i32
%11 = alloca i32
%12 = alloca i16*
%13 = alloca i16*
%14 = trunc i32 %0 to i16
%15 = trunc i32 %1 to i16
store i16 %14, i16* %8
store i16 %15, i16* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i16* %4, i16** %12
store i16* %5, i16** %13
%16 = load i16, i16* %8
%17 = zext i16 %16 to i32
%18 = load i16*, i16** %13
%19 = load i32, i32* %11
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i16, i16* %18, i64 %20
%22 = load i16, i16* %21
%23 = zext i16 %22 to i32
%24 = icmp sle i32 %17, %23
br i1 %24, label %25, label %26
25: ; preds = %6
store i32 1, i32* %7
br label %27
26: ; preds = %6
store i32 0, i32* %7
br label %27
27: ; preds = %26, %25
%28 = load i32, i32* %7
ret i32 %28
}

LLVM IR (-O2):
define i32 @reg0regx1(i32 %0, i32 %1, i32 %2, i32 %3, i16* nocapture readnone %4, i16* nocapture %5) {
%7 = and i32 %0, 65535
%8 = sext i32 %3 to i64
%9 = getelementptr inbounds i16, i16* %5, i64 %8
%10 = load i16, i16* %9
%11 = zext i16 %10 to i32
%12 = icmp ule i32 %7, %11
%13 = zext i1 %12 to i32
ret i32 %13
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t ADC_One_In(void) {
  (*((volatile uint32_t *)0x400380A0)) =
      ((*((volatile uint32_t *)0x400380A0)) & 0xFFFFFFF0) + 3;
  uint32_t data;
  (*((volatile uint32_t *)0x40038028)) = 0x0008;
  while (((*((volatile uint32_t *)0x40038004)) & 0x08) == 0) {
  };
  data = (*((volatile uint32_t *)0x400380A8)) & 0xFFF;
  (*((volatile uint32_t *)0x4003800C)) = 0x0008;
  return data;
}


x86 assembly (clang, -O0):
<ADC_One_In>:
push   %rbp
mov    %rsp,%rbp
mov    $0x400380a0,%eax
mov    (%rax),%ecx
and    $0xfffffff0,%ecx
add    $0x3,%ecx
mov    $0x400380a0,%eax
mov    %ecx,(%rax)
mov    $0x40038028,%eax
movl   $0x8,(%rax)
mov    $0x40038004,%eax
mov    (%rax),%eax
and    $0x8,%eax
cmp    $0x0,%eax
jne    113b <ADC_One_In+0x3b>
jmp    1123 <ADC_One_In+0x23>
mov    $0x400380a8,%eax
mov    (%rax),%eax
and    $0xfff,%eax
mov    %eax,-0x4(%rbp)
mov    $0x4003800c,%eax
movl   $0x8,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADC_One_In>:
mov    0x400380a0,%eax
and    $0xfffffff0,%eax
or     $0x3,%eax
mov    %eax,0x400380a0
movl   $0x8,0x40038028
nop
testl  $0x8,0x40038004
je     1120 <ADC_One_In+0x20>
mov    $0xfff,%eax
and    0x400380a8,%eax
movl   $0x8,0x4003800c
ret

LLVM IR (-O0):
define i32 @ADC_One_In() {
%1 = alloca i32
%2 = load volatile i32, i32* inttoptr (i64 1073971360 to i32*)
%3 = and i32 %2, -16
%4 = add i32 %3, 3
store volatile i32 %4, i32* inttoptr (i64 1073971360 to i32*)
store volatile i32 8, i32* inttoptr (i64 1073971240 to i32*)
br label %5
5: ; preds = %9, %0
%6 = load volatile i32, i32* inttoptr (i64 1073971204 to i32*)
%7 = and i32 %6, 8
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %5
br label %5
10: ; preds = %5
%11 = load volatile i32, i32* inttoptr (i64 1073971368 to i32*)
%12 = and i32 %11, 4095
store i32 %12, i32* %1
store volatile i32 8, i32* inttoptr (i64 1073971212 to i32*)
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @ADC_One_In() {
%1 = load volatile i32, i32* inttoptr (i64 1073971360 to i32*)
%2 = and i32 %1, -16
%3 = or i32 %2, 3
store volatile i32 %3, i32* inttoptr (i64 1073971360 to i32*)
store volatile i32 8, i32* inttoptr (i64 1073971240 to i32*)
br label %4
4: ; preds = %4, %0
%5 = load volatile i32, i32* inttoptr (i64 1073971204 to i32*)
%6 = and i32 %5, 8
%7 = icmp eq i32 %6, 0
br i1 %7, label %4, label %8
8: ; preds = %4
%9 = load volatile i32, i32* inttoptr (i64 1073971368 to i32*)
%10 = and i32 %9, 4095
store volatile i32 8, i32* inttoptr (i64 1073971212 to i32*)
ret i32 %10
}
void main() {
  int i = 0;
  int j = 0;
  if ((i = j) + 0) {
    i = j;
  }
  if ((i = j) + 0 != 0) {
    i = j;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
add    $0x0,%eax
cmp    $0x0,%eax
je     112a <main+0x2a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
add    $0x0,%eax
cmp    $0x0,%eax
je     1142 <main+0x42>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
store i32 %3, i32* %1
%4 = add nsw i32 %3, 0
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i32, i32* %2
store i32 %7, i32* %1
br label %8
8: ; preds = %6, %0
%9 = load i32, i32* %2
store i32 %9, i32* %1
%10 = add nsw i32 %9, 0
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = load i32, i32* %2
store i32 %13, i32* %1
br label %14
14: ; preds = %12, %8
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
void gtk_cell_renderer_pixbuf_new() {}


x86 assembly (clang, -O0):
<gtk_cell_renderer_pixbuf_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_cell_renderer_pixbuf_new>:
ret

LLVM IR (-O0):
define void @gtk_cell_renderer_pixbuf_new() {
ret void
}

LLVM IR (-O2):
define void @gtk_cell_renderer_pixbuf_new() {
ret void
}
/* Variables and functions */
bool nrf53_errata_22(void) { return false; }


x86 assembly (clang, -O0):
<nrf53_errata_22>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf53_errata_22>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf53_errata_22() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf53_errata_22() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ pretty_print_colour_enable();
void pretty_print_color_enable(void) { pretty_print_colour_enable(); }


x86 assembly (clang, -O0):
<pretty_print_color_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <pretty_print_colour_enable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pretty_print_color_enable>:
xor    %eax,%eax
jmp    1030 <pretty_print_colour_enable@plt>

LLVM IR (-O0):
define void @pretty_print_color_enable() {
%1 = call i32 (...) @pretty_print_colour_enable()
ret void
}

LLVM IR (-O2):
define void @pretty_print_color_enable() {
%1 = tail call i32 (...) @pretty_print_colour_enable()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LLWU_DriverIRQHandler();
__attribute__((weak)) void LLWU_IRQHandler(void) { LLWU_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<LLWU_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <LLWU_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LLWU_IRQHandler>:
xor    %eax,%eax
jmp    1030 <LLWU_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @LLWU_IRQHandler() {
%1 = call i32 (...) @LLWU_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @LLWU_IRQHandler() {
%1 = tail call i32 (...) @LLWU_DriverIRQHandler()
ret void
}
/* Variables and functions */
void *get_pointer(void) { return NULL; }


x86 assembly (clang, -O0):
<get_pointer>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pointer>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @get_pointer() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @get_pointer() {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ islower(int);
void t_islower_0xae() {
  Assert_real((islower(174) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_islower.c",
              875, ("islower should be 0 for 0xae"));
}


x86 assembly (clang, -O0):
<t_islower_0xae>:
push   %rbp
mov    %rsp,%rbp
mov    $0xae,%edi
call   1030 <islower@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x36b,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_islower_0xae>:
push   %rax
mov    $0xae,%edi
call   1030 <islower@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x36b,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xae\00"
define void @t_islower_0xae() {
%1 = call i64 @islower(i32 174)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 875, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_islower.c\00"
@.str.1 = [29 x i8] c"islower should be 0 for 0xae\00"
define void @t_islower_0xae() {
%1 = tail call i64 @islower(i32 174)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 875, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int x86_efi_autoload(void) { return (0); }


x86 assembly (clang, -O0):
<x86_efi_autoload>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<x86_efi_autoload>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @x86_efi_autoload() {
ret i32 0
}

LLVM IR (-O2):
define i32 @x86_efi_autoload() {
ret i32 0
}
unsigned xrop3_105_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D ^ S;
  stk1 = T ^ stk2;
  stk1 = ~stk1;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_105_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_105_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
mov    %eax,%edx
xor    %ecx,%edx
xor    $0xffffff00,%edx
not    %ecx
or     %eax,%ecx
and    %edx,%ecx
not    %eax
and    %esi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_105_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = xor i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %7
%26 = load i32, i32* %9
%27 = xor i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = xor i32 %28, -1
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = and i32 %30, %31
%33 = load i32, i32* %8
%34 = load i32, i32* %7
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = or i32 %32, %36
%38 = load i32, i32* %7
%39 = load i32, i32* %6
%40 = xor i32 %39, -1
%41 = and i32 %38, %40
%42 = load i32, i32* %5
%43 = and i32 %41, %42
%44 = or i32 %37, %43
ret i32 %44
}

LLVM IR (-O2):
define i32 @xrop3_105_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, %6
%8 = xor i32 %7, -256
%9 = xor i32 %6, -1
%10 = or i32 %4, %9
%11 = and i32 %8, %10
%12 = xor i32 %4, -1
%13 = and i32 %12, %5
%14 = or i32 %11, %13
ret i32 %14
}
XDisplayKeycodes() {}


x86 assembly (clang, -O0):
<XDisplayKeycodes>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XDisplayKeycodes>:
ret

LLVM IR (-O0):
define i32 @XDisplayKeycodes() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XDisplayKeycodes() {
ret i32 undef
}
int test_imm_C4uint16_mem(unsigned short *val) {
  return ((*val) & (0xC4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C4uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xc4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C4uint16_mem>:
testb  $0xc4,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C4uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 196
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C4uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 196
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int test_imm_E8int16_reg(short val) {
  return ((val) & (-0xE8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E8int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff18,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E8int16_reg>:
test   $0xff18,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E8int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -232
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_E8int16_reg(i16 signext %0) {
%2 = and i16 %0, -232
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ putchar(unsigned int);
void emit_u(unsigned u) {
  putchar((u >> 24) & 0xFFU);
  putchar((u >> 16) & 0xFFU);
  putchar((u >> 8) & 0xFFU);
  putchar((u >> 0) & 0xFFU);
}


x86 assembly (clang, -O0):
<emit_u>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
shr    $0x18,%edi
and    $0xff,%edi
call   1030 <putchar@plt>
mov    -0x4(%rbp),%edi
shr    $0x10,%edi
and    $0xff,%edi
call   1030 <putchar@plt>
mov    -0x4(%rbp),%edi
shr    $0x8,%edi
and    $0xff,%edi
call   1030 <putchar@plt>
mov    -0x4(%rbp),%edi
shr    $0x0,%edi
and    $0xff,%edi
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_u>:
push   %rbx
mov    %edi,%ebx
mov    %edi,%eax
shr    $0x18,%eax
mov    %eax,%edi
call   1030 <putchar@plt>
mov    %ebx,%eax
shr    $0x10,%eax
movzbl %al,%edi
call   1030 <putchar@plt>
movzbl %bh,%edi
call   1030 <putchar@plt>
movzbl %bl,%edi
pop    %rbx
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define void @emit_u(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 24
%5 = and i32 %4, 255
%6 = call i32 @putchar(i32 %5)
%7 = load i32, i32* %2
%8 = lshr i32 %7, 16
%9 = and i32 %8, 255
%10 = call i32 @putchar(i32 %9)
%11 = load i32, i32* %2
%12 = lshr i32 %11, 8
%13 = and i32 %12, 255
%14 = call i32 @putchar(i32 %13)
%15 = load i32, i32* %2
%16 = lshr i32 %15, 0
%17 = and i32 %16, 255
%18 = call i32 @putchar(i32 %17)
ret void
}

LLVM IR (-O2):
define void @emit_u(i32 %0) {
%2 = lshr i32 %0, 24
%3 = tail call i32 @putchar(i32 %2)
%4 = lshr i32 %0, 16
%5 = and i32 %4, 255
%6 = tail call i32 @putchar(i32 %5)
%7 = lshr i32 %0, 8
%8 = and i32 %7, 255
%9 = tail call i32 @putchar(i32 %8)
%10 = and i32 %0, 255
%11 = tail call i32 @putchar(i32 %10)
ret void
}
void init_tcp(void) { return; }


x86 assembly (clang, -O0):
<init_tcp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_tcp>:
ret

LLVM IR (-O0):
define void @init_tcp() {
ret void
}

LLVM IR (-O2):
define void @init_tcp() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0xb3() {
  Assert_real((isalpha(179) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              900, ("isalpha should be 0 for 0xb3"));
}


x86 assembly (clang, -O0):
<t_isalpha_0xb3>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb3,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x384,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0xb3>:
push   %rax
mov    $0xb3,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x384,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xb3\00"
define void @t_isalpha_0xb3() {
%1 = call i64 @isalpha(i32 179)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 900, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0xb3\00"
define void @t_isalpha_0xb3() {
%1 = tail call i64 @isalpha(i32 179)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 900, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fun(int, int *, int *, int *, int *, int /*<<< orphan*/ *);
int /*<<< orphan*/ fun2(int, char *, char *, int /*<<< orphan*/ *);
int main() {
  int a = 1, b = 2, c = 3, d = 4;
  fun(4, &a, &b, &c, &d, NULL);
  char *e = "hello=world2", *f = "world";
  fun2(4, e, f, NULL);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0x3,-0x10(%rbp)
movl   $0x4,-0x14(%rbp)
mov    $0x4,%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
xor    %eax,%eax
mov    %eax,%r9d
call   1040 <fun@plt>
lea    0xe8f(%rip),%rax
mov    %rax,-0x20(%rbp)
lea    0xe91(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rdx
mov    $0x4,%edi
xor    %eax,%eax
mov    %eax,%ecx
call   1030 <fun2@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
movl   $0x1,0x14(%rsp)
movl   $0x2,0x10(%rsp)
movl   $0x3,0xc(%rsp)
movl   $0x4,0x8(%rsp)
lea    0x14(%rsp),%rsi
lea    0x10(%rsp),%rdx
lea    0xc(%rsp),%rcx
lea    0x8(%rsp),%r8
mov    $0x4,%edi
xor    %r9d,%r9d
call   1040 <fun@plt>
lea    0xe94(%rip),%rsi
lea    0xe9a(%rip),%rdx
mov    $0x4,%edi
xor    %ecx,%ecx
call   1030 <fun2@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [13 x i8] c"hello=world2\00"
@.str.1 = [6 x i8] c"world\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
store i32 0, i32* %1
store i32 1, i32* %2
store i32 2, i32* %3
store i32 3, i32* %4
store i32 4, i32* %5
%8 = call i32 @fun(i32 4, i32* %2, i32* %3, i32* %4, i32* %5, i32* null)
store i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8** %6
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %7
%9 = load i8*, i8** %6
%10 = load i8*, i8** %7
%11 = call i32 @fun2(i32 4, i8* %9, i8* %10, i32* null)
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"hello=world2\00"
@.str.1 = [6 x i8] c"world\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
store i32 1, i32* %1
%6 = bitcast i32* %2 to i8*
store i32 2, i32* %2
%7 = bitcast i32* %3 to i8*
store i32 3, i32* %3
%8 = bitcast i32* %4 to i8*
store i32 4, i32* %4
%9 = call i32 @fun(i32 4, i32* %1, i32* %2, i32* %3, i32* %4, i32* null)
%10 = call i32 @fun2(i32 4, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32* null)
ret i32 0
}
const char *Sort_Description(void) {
  return "The `Sort` class can be implemented by types which can be sorted in "
         "some "
         "way such as `Array`. By default the sorting function uses the `lt` "
         "method "
         "to compare elements, but a custom function can also be provided.";
}


x86 assembly (clang, -O0):
<Sort_Description>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sort_Description>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [212 x i8] c"The `Sort` class can be implemented by types which can be sorted in some way such as `Array`. By default the sorting function uses the `lt` method to compare elements, but a custom function can also be provided.\00"
define i8* @Sort_Description() {
ret i8* getelementptr inbounds ([212 x i8], [212 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [212 x i8] c"The `Sort` class can be implemented by types which can be sorted in some way such as `Array`. By default the sorting function uses the `lt` method to compare elements, but a custom function can also be provided.\00"
define i8* @Sort_Description() {
ret i8* getelementptr inbounds ([212 x i8], [212 x i8]* @.str, i64 0, i64 0)
}
int db5500_prcmu_enable_dsipll(void) { return 0; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @db5500_prcmu_enable_dsipll() {
ret i32 0
}

LLVM IR (-O2):
define i32 @db5500_prcmu_enable_dsipll() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ change(char *);
int main() {
  change("Hello");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <change@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <change@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"Hello\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @change(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"Hello\00"
define i32 @main() {
%1 = tail call i32 @change(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int foo(int x, char wait) {
  if (wait) {
    for (int i = 0; i < 10000; ++i) {
      for (int j = 0; j < 100; ++j) {
      }
    }
  }
  return x + 1;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
cmpb   $0x0,-0x5(%rbp)
je     1167 <foo+0x67>
movl   $0x0,-0xc(%rbp)
cmpl   $0x2710,-0xc(%rbp)
jge    1162 <foo+0x62>
movl   $0x0,-0x10(%rbp)
cmpl   $0x64,-0x10(%rbp)
jge    114f <foo+0x4f>
jmp    1141 <foo+0x41>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1132 <foo+0x32>
jmp    1154 <foo+0x54>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111e <foo+0x1e>
jmp    1167 <foo+0x67>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i8 %1, i8* %4
%7 = load i8, i8* %4
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %26
9: ; preds = %2
store i32 0, i32* %5
br label %10
10: ; preds = %22, %9
%11 = load i32, i32* %5
%12 = icmp slt i32 %11, 10000
br i1 %12, label %13, label %25
13: ; preds = %10
store i32 0, i32* %6
br label %14
14: ; preds = %18, %13
%15 = load i32, i32* %6
%16 = icmp slt i32 %15, 100
br i1 %16, label %17, label %21
17: ; preds = %14
br label %18
18: ; preds = %17
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
store i32 %20, i32* %6
br label %14
21: ; preds = %14
br label %22
22: ; preds = %21
%23 = load i32, i32* %5
%24 = add nsw i32 %23, 1
store i32 %24, i32* %5
br label %10
25: ; preds = %10
br label %26
26: ; preds = %25, %2
%27 = load i32, i32* %3
%28 = add nsw i32 %27, 1
ret i32 %28
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i8 signext %1) {
%3 = add nsw i32 %0, 1
ret i32 %3
}
void XkbComputeShapeBounds() {}


x86 assembly (clang, -O0):
<XkbComputeShapeBounds>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XkbComputeShapeBounds>:
ret

LLVM IR (-O0):
define void @XkbComputeShapeBounds() {
ret void
}

LLVM IR (-O2):
define void @XkbComputeShapeBounds() {
ret void
}
/* Variables and functions */
double RAND_MAX;
scalar_t__ rand();
float rand_float(void) { return (float)((double)rand() / RAND_MAX); }


x86 assembly (clang, -O0):
<rand_float>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec1(%rip),%rax
divsd  (%rax),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_float>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %rax,%xmm0
mov    0x2ec4(%rip),%rax
divsd  (%rax),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define float @rand_float() {
%1 = call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load double, double* @RAND_MAX
%4 = fdiv double %2, %3
%5 = fptrunc double %4 to float
ret float %5
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define float @rand_float() {
%1 = tail call i64 (...) @rand()
%2 = sitofp i64 %1 to double
%3 = load double, double* @RAND_MAX
%4 = fdiv double %2, %3
%5 = fptrunc double %4 to float
ret float %5
}
void ps3_spu_set_platform(void) {}


x86 assembly (clang, -O0):
<ps3_spu_set_platform>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps3_spu_set_platform>:
ret

LLVM IR (-O0):
define void @ps3_spu_set_platform() {
ret void
}

LLVM IR (-O2):
define void @ps3_spu_set_platform() {
ret void
}
int deflateEnd(struct z_stream_s *strm) { return -2; }


x86 assembly (clang, -O0):
<deflateEnd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xfffffffe,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<deflateEnd>:
mov    $0xfffffffe,%eax
ret

LLVM IR (-O0):
%struct.z_stream_s = type opaque
define i32 @deflateEnd(%struct.z_stream_s* %0) {
%2 = alloca %struct.z_stream_s*
store %struct.z_stream_s* %0, %struct.z_stream_s** %2
ret i32 -2
}

LLVM IR (-O2):
%struct.z_stream_s = type opaque
define i32 @deflateEnd(%struct.z_stream_s* nocapture readnone %0) {
ret i32 -2
}
/* Variables and functions */
int atoi(char const *);
int atoi_null0(const char *str) {
  if (str)
    return atoi(str);
  else
    return 0;
}


x86 assembly (clang, -O0):
<atoi_null0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1138 <atoi_null0+0x28>
mov    -0x10(%rbp),%rdi
call   1030 <atoi@plt>
mov    %eax,-0x4(%rbp)
jmp    113f <atoi_null0+0x2f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoi_null0>:
test   %rdi,%rdi
je     111a <atoi_null0+0xa>
jmp    1030 <atoi@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @atoi_null0(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i8*, i8** %3
%8 = call i32 @atoi(i8* %7)
store i32 %8, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @atoi_null0(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @atoi(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ 0, %1 ]
ret i32 %6
}
/* Variables and functions */
void *stackvars_stack_init(void) { return NULL; }


x86 assembly (clang, -O0):
<stackvars_stack_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stackvars_stack_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @stackvars_stack_init() {
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @stackvars_stack_init() {
ret i8* null
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;

/* Variables and functions */
void grid_putl(uint8_t *buf, uint32_t val) {
  buf[0] = (uint8_t)(((val) >> 24) & 0xff);
  buf[1] = (uint8_t)(((val) >> 16) & 0xff);
  buf[2] = (uint8_t)(((val) >> 8) & 0xff);
  buf[3] = (uint8_t)(val & 0xff);
}


x86 assembly (clang, -O0):
<grid_putl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10(%rax)
mov    -0xc(%rbp),%eax
and    $0xff,%eax
movslq %eax,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<grid_putl>:
mov    %esi,%eax
mov    %esi,%ecx
movzbl %ah,%edx
movzbl %al,%esi
shr    $0x18,%eax
mov    %rax,(%rdi)
shr    $0x10,%ecx
movzbl %cl,%eax
mov    %rax,0x8(%rdi)
mov    %rdx,0x10(%rdi)
mov    %rsi,0x18(%rdi)
ret

LLVM IR (-O0):
define void @grid_putl(i64* %0, i32 %1) {
%3 = alloca i64*
%4 = alloca i32
store i64* %0, i64** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = ashr i32 %5, 24
%7 = and i32 %6, 255
%8 = sext i32 %7 to i64
%9 = load i64*, i64** %3
%10 = getelementptr inbounds i64, i64* %9, i64 0
store i64 %8, i64* %10
%11 = load i32, i32* %4
%12 = ashr i32 %11, 16
%13 = and i32 %12, 255
%14 = sext i32 %13 to i64
%15 = load i64*, i64** %3
%16 = getelementptr inbounds i64, i64* %15, i64 1
store i64 %14, i64* %16
%17 = load i32, i32* %4
%18 = ashr i32 %17, 8
%19 = and i32 %18, 255
%20 = sext i32 %19 to i64
%21 = load i64*, i64** %3
%22 = getelementptr inbounds i64, i64* %21, i64 2
store i64 %20, i64* %22
%23 = load i32, i32* %4
%24 = and i32 %23, 255
%25 = sext i32 %24 to i64
%26 = load i64*, i64** %3
%27 = getelementptr inbounds i64, i64* %26, i64 3
store i64 %25, i64* %27
ret void
}

LLVM IR (-O2):
define void @grid_putl(i64* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 24
%4 = zext i32 %3 to i64
store i64 %4, i64* %0
%5 = lshr i32 %1, 16
%6 = and i32 %5, 255
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %0, i64 1
store i64 %7, i64* %8
%9 = lshr i32 %1, 8
%10 = and i32 %9, 255
%11 = zext i32 %10 to i64
%12 = getelementptr inbounds i64, i64* %0, i64 2
store i64 %11, i64* %12
%13 = and i32 %1, 255
%14 = zext i32 %13 to i64
%15 = getelementptr inbounds i64, i64* %0, i64 3
store i64 %14, i64* %15
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  assert(1);
  assert(1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @assert(i32 1)
%3 = call i32 @assert(i32 1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 1)
%2 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fib_division(int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int x = -1;
  while (x < 0 || x >= 10)
    scanf("%d", &x);
  fib_division(x);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
jl     114f <main+0x2f>
cmpl   $0xa,-0x8(%rbp)
setge  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    115f <main+0x3f>
jmp    1174 <main+0x54>
lea    0xe9a(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <scanf@plt>
jmp    1136 <main+0x16>
mov    -0x8(%rbp),%edi
call   1040 <fib_division@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
movl   $0xffffffff,0x4(%rsp)
ff
lea    0xecd(%rip),%r14
lea    0x4(%rsp),%rbx
nopl   0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <scanf@plt>
mov    0x4(%rsp),%edi
cmp    $0x9,%edi
ja     1140 <main+0x20>
call   1040 <fib_division@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 -1, i32* %2
br label %3
3: ; preds = %11, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = load i32, i32* %2
%8 = icmp sge i32 %7, 10
br label %9
9: ; preds = %6, %3
%10 = phi i1 [ true, %3 ], [ %8, %6 ]
br i1 %10, label %11, label %13
11: ; preds = %9
%12 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
br label %3
13: ; preds = %9
%14 = load i32, i32* %2
%15 = call i32 @fib_division(i32 %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 -1, i32* %1
br label %3
3: ; preds = %0, %3
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = icmp ugt i32 %5, 9
br i1 %6, label %3, label %7
7: ; preds = %3
%8 = call i32 @fib_division(i32 %5)
ret i32 0
}
int PicoGetHashTableSize(void) { return 7919; }


x86 assembly (clang, -O0):
<PicoGetHashTableSize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1eef,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PicoGetHashTableSize>:
mov    $0x1eef,%eax
ret

LLVM IR (-O0):
define i32 @PicoGetHashTableSize() {
ret i32 7919
}

LLVM IR (-O2):
define i32 @PicoGetHashTableSize() {
ret i32 7919
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ write_createtimestamp(int /*<<< orphan*/, char *);
int /*<<< orphan*/ write_str(char *);
void write_timestamp(uint64_t v) {
  char s[30];
  write_createtimestamp(v, s);
  write_str(s);
}


x86 assembly (clang, -O0):
<write_timestamp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x30(%rbp),%rsi
call   1040 <write_createtimestamp@plt>
lea    -0x30(%rbp),%rdi
call   1030 <write_str@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_timestamp>:
push   %rbx
sub    $0x20,%rsp
mov    %rsp,%rbx
mov    %rbx,%rsi
call   1040 <write_createtimestamp@plt>
mov    %rbx,%rdi
call   1030 <write_str@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @write_timestamp(i32 %0) {
%2 = alloca i32
%3 = alloca [30 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [30 x i8], [30 x i8]* %3, i64 0, i64 0
%6 = call i32 @write_createtimestamp(i32 %4, i8* %5)
%7 = getelementptr inbounds [30 x i8], [30 x i8]* %3, i64 0, i64 0
%8 = call i32 @write_str(i8* %7)
ret void
}

LLVM IR (-O2):
define void @write_timestamp(i32 %0) {
%2 = alloca [30 x i8]
%3 = getelementptr inbounds [30 x i8], [30 x i8]* %2, i64 0, i64 0
%4 = call i32 @write_createtimestamp(i32 %0, i8* %3)
%5 = call i32 @write_str(i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ thr_exit();
void *child(void *arg) {
  printf("child\n");
  thr_exit();
  return NULL;
}


x86 assembly (clang, -O0):
<child>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <thr_exit@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<child>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <thr_exit@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"child\0A\00"
define i8* @child(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @thr_exit()
ret i8* null
}

LLVM IR (-O2):
@str = [6 x i8] c"child\00"
define noalias i8* @child(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @thr_exit()
ret i8* null
}