xunge/DecIR huggingface dataset:
/* Variables and functions */
int dbar(double, double);
int dv(double, double);
int sb(double, double);
int ubar(double, double);
double F2_nc_p(double xx, double Q2) {
  return 2 * (dv(xx, Q2) + sb(xx, Q2) + dbar(xx, Q2) + ubar(xx, Q2));
}


x86 assembly (clang, -O0):
<F2_nc_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1050 <dv@plt>
mov    %eax,-0x1c(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <sb@plt>
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1060 <dbar@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x14(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1040 <ubar@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
shl    $0x1,%eax
cvtsi2sd %eax,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<F2_nc_p>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
movsd  %xmm0,0x8(%rsp)
call   1050 <dv@plt>
mov    %eax,%ebx
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
call   1030 <sb@plt>
mov    %eax,%ebp
add    %ebx,%ebp
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
call   1060 <dbar@plt>
mov    %eax,%ebx
add    %ebp,%ebx
movsd  0x8(%rsp),%xmm0
movsd  0x10(%rsp),%xmm1
call   1040 <ubar@plt>
add    %ebx,%eax
add    %eax,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define double @F2_nc_p(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i32 @dv(double %5, double %6)
%8 = load double, double* %3
%9 = load double, double* %4
%10 = call i32 @sb(double %8, double %9)
%11 = add nsw i32 %7, %10
%12 = load double, double* %3
%13 = load double, double* %4
%14 = call i32 @dbar(double %12, double %13)
%15 = add nsw i32 %11, %14
%16 = load double, double* %3
%17 = load double, double* %4
%18 = call i32 @ubar(double %16, double %17)
%19 = add nsw i32 %15, %18
%20 = mul nsw i32 2, %19
%21 = sitofp i32 %20 to double
ret double %21
}

LLVM IR (-O2):
define double @F2_nc_p(double %0, double %1) {
%3 = tail call i32 @dv(double %0, double %1)
%4 = tail call i32 @sb(double %0, double %1)
%5 = add nsw i32 %4, %3
%6 = tail call i32 @dbar(double %0, double %1)
%7 = add nsw i32 %5, %6
%8 = tail call i32 @ubar(double %0, double %1)
%9 = add nsw i32 %7, %8
%10 = shl nsw i32 %9, 1
%11 = sitofp i32 %10 to double
ret double %11
}
double jso_number_cstr_to_double(char *str) { return 0.0; }


x86 assembly (clang, -O0):
<jso_number_cstr_to_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<jso_number_cstr_to_double>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @jso_number_cstr_to_double(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @jso_number_cstr_to_double(i8* nocapture readnone %0) {
ret double 0.000000e+00
}
void transfer_YUV_PLANAR_to_YUVA8888(unsigned char *(*output),
                                     unsigned char *input_y,
                                     unsigned char *input_u,
                                     unsigned char *input_v) {
  (*output)[0] = *input_y;
  (*output)[1] = *input_u;
  (*output)[2] = *input_v;
  (*output)[3] = 0xff;
  (*output) += 4;
}


x86 assembly (clang, -O0):
<transfer_YUV_PLANAR_to_YUVA8888>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %cl,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %cl,0x1(%rax)
mov    -0x20(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %cl,0x2(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movb   $0xff,0x3(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x4,%rcx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<transfer_YUV_PLANAR_to_YUVA8888>:
mov    (%rsi),%al
mov    (%rdi),%rsi
mov    %al,(%rsi)
mov    (%rdx),%al
mov    (%rdi),%rdx
mov    %al,0x1(%rdx)
mov    (%rcx),%al
mov    (%rdi),%rcx
mov    %al,0x2(%rcx)
mov    (%rdi),%rax
movb   $0xff,0x3(%rax)
addq   $0x4,(%rdi)
ret

LLVM IR (-O0):
define void @transfer_YUV_PLANAR_to_YUVA8888(i8** %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i8** %0, i8*** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %6
%10 = load i8, i8* %9
%11 = load i8**, i8*** %5
%12 = load i8*, i8** %11
%13 = getelementptr inbounds i8, i8* %12, i64 0
store i8 %10, i8* %13
%14 = load i8*, i8** %7
%15 = load i8, i8* %14
%16 = load i8**, i8*** %5
%17 = load i8*, i8** %16
%18 = getelementptr inbounds i8, i8* %17, i64 1
store i8 %15, i8* %18
%19 = load i8*, i8** %8
%20 = load i8, i8* %19
%21 = load i8**, i8*** %5
%22 = load i8*, i8** %21
%23 = getelementptr inbounds i8, i8* %22, i64 2
store i8 %20, i8* %23
%24 = load i8**, i8*** %5
%25 = load i8*, i8** %24
%26 = getelementptr inbounds i8, i8* %25, i64 3
store i8 -1, i8* %26
%27 = load i8**, i8*** %5
%28 = load i8*, i8** %27
%29 = getelementptr inbounds i8, i8* %28, i64 4
store i8* %29, i8** %27
ret void
}

LLVM IR (-O2):
define void @transfer_YUV_PLANAR_to_YUVA8888(i8** nocapture %0, i8* nocapture %1, i8* nocapture %2, i8* nocapture %3) {
%5 = load i8, i8* %1
%6 = load i8*, i8** %0
store i8 %5, i8* %6
%7 = load i8, i8* %2
%8 = load i8*, i8** %0
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8 %7, i8* %9
%10 = load i8, i8* %3
%11 = load i8*, i8** %0
%12 = getelementptr inbounds i8, i8* %11, i64 2
store i8 %10, i8* %12
%13 = load i8*, i8** %0
%14 = getelementptr inbounds i8, i8* %13, i64 3
store i8 -1, i8* %14
%15 = load i8*, i8** %0
%16 = getelementptr inbounds i8, i8* %15, i64 4
store i8* %16, i8** %0
ret void
}
void flush_icache_range(unsigned long start, unsigned long stop) {}


x86 assembly (clang, -O0):
<flush_icache_range>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_icache_range>:
ret

LLVM IR (-O0):
define void @flush_icache_range(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
ret void
}

LLVM IR (-O2):
define void @flush_icache_range(i64 %0, i64 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ol(char *);
div() {
  ol("xchgl %eax, %edx");
  ol("movl %edx, %ecx");
  ol("cltd");
  ol("idivl %ecx");
}


x86 assembly (clang, -O0):
<div>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <ol@plt>
lea    0xee6(%rip),%rdi
call   1030 <ol@plt>
lea    0xeea(%rip),%rdi
call   1030 <ol@plt>
lea    0xee3(%rip),%rdi
call   1030 <ol@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<div>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <ol@plt>
lea    0xeed(%rip),%rdi
call   1030 <ol@plt>
lea    0xef1(%rip),%rdi
call   1030 <ol@plt>
lea    0xeea(%rip),%rdi
pop    %rax
jmp    1030 <ol@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"xchgl %eax, %edx\00"
@.str.1 = [16 x i8] c"movl %edx, %ecx\00"
@.str.2 = [5 x i8] c"cltd\00"
@.str.3 = [11 x i8] c"idivl %ecx\00"
define i32 @div() {
%1 = alloca i32
%2 = call i32 @ol(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @ol(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @ol(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0))
%5 = call i32 @ol(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.3, i64 0, i64 0))
%6 = load i32, i32* %1
ret i32 %6
}

LLVM IR (-O2):
@.str = [17 x i8] c"xchgl %eax, %edx\00"
@.str.1 = [16 x i8] c"movl %edx, %ecx\00"
@.str.2 = [5 x i8] c"cltd\00"
@.str.3 = [11 x i8] c"idivl %ecx\00"
define i32 @div() {
%1 = tail call i32 @ol(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @ol(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @ol(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0))
%4 = tail call i32 @ol(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.3, i64 0, i64 0))
ret i32 undef
}
int main(int ac, char **av) { int a; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ clean_screen();
int cleanup() {
  clean_screen();
  return 0;
}


x86 assembly (clang, -O0):
<cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <clean_screen@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanup>:
push   %rax
xor    %eax,%eax
call   1030 <clean_screen@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cleanup() {
%1 = call i32 (...) @clean_screen()
ret i32 0
}

LLVM IR (-O2):
define i32 @cleanup() {
%1 = tail call i32 (...) @clean_screen()
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int same_screen;
};
typedef TYPE_1__ XCrossingEvent;

/* Variables and functions */
void set_XCrossingEvent_same_screen(void *_p, int _v) {
  ((XCrossingEvent *)_p)->same_screen = (int)_v;
}


x86 assembly (clang, -O0):
<set_XCrossingEvent_same_screen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XCrossingEvent_same_screen>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XCrossingEvent_same_screen(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XCrossingEvent_same_screen(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
char *g_DUMMY_popup_saveas(int win_id, char *title, char *filename) {
  win_id = win_id;
  title = title;
  filename = filename;
  return NULL;
}


x86 assembly (clang, -O0):
<g_DUMMY_popup_saveas>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_DUMMY_popup_saveas>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @g_DUMMY_popup_saveas(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
store i32 %7, i32* %4
%8 = load i8*, i8** %5
store i8* %8, i8** %5
%9 = load i8*, i8** %6
store i8* %9, i8** %6
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @g_DUMMY_popup_saveas(i32 %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i8* null
}
/* Variables and functions */
int gcd(int, int);
int /*<<< orphan*/ printf(char *, int, int, int);
int main(int arc, char **argv) {
  int a = 10;
  int b = 15;
  printf("C - gcd of %d and %d is %d\n", a, b, gcd(a, b));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0xa,-0x14(%rbp)
movl   $0xf,-0x18(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x18(%rbp),%esi
call   1040 <gcd@plt>
mov    -0x20(%rbp),%esi
mov    -0x1c(%rbp),%edx
mov    %eax,%ecx
lea    0xe96(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
mov    $0xf,%esi
call   1040 <gcd@plt>
lea    0xec9(%rip),%rdi
mov    $0xa,%esi
mov    $0xf,%edx
mov    %eax,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"C - gcd of %d and %d is %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 10, i32* %6
store i32 15, i32* %7
%8 = load i32, i32* %6
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = call i32 @gcd(i32 %10, i32 %11)
%13 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %8, i32 %9, i32 %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [28 x i8] c"C - gcd of %d and %d is %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @gcd(i32 10, i32 15)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 10, i32 15, i32 %3)
ret i32 0
}
void rcstub(void) {}


x86 assembly (clang, -O0):
<rcstub>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcstub>:
ret

LLVM IR (-O0):
define void @rcstub() {
ret void
}

LLVM IR (-O2):
define void @rcstub() {
ret void
}
/* Variables and functions */
char *get_opt(char *, int);
char **star_wrap(char **arg) {
  char *wrap = get_opt("wrap", 1);
  return arg;
}


x86 assembly (clang, -O0):
<star_wrap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x1,%esi
call   1030 <get_opt@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<star_wrap>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
call   1030 <get_opt@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"wrap\00"
define i8** @star_wrap(i8** %0) {
%2 = alloca i8**
%3 = alloca i8*
store i8** %0, i8*** %2
%4 = call i8* @get_opt(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 1)
store i8* %4, i8** %3
%5 = load i8**, i8*** %2
ret i8** %5
}

LLVM IR (-O2):
@.str = [5 x i8] c"wrap\00"
define i8** @star_wrap(i8** readnone returned %0) {
%2 = tail call i8* @get_opt(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 1)
ret i8** %0
}
__attribute__((always_)) unsigned int
cpumask_first(const struct cpumask *srcp) {
  return 0;
}


x86 assembly (clang, -O0):
<cpumask_first>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpumask_first>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.cpumask = type opaque
define i32 @cpumask_first(%struct.cpumask* %0) {
%2 = alloca %struct.cpumask*
store %struct.cpumask* %0, %struct.cpumask** %2
ret i32 0
}

LLVM IR (-O2):
%struct.cpumask = type opaque
define i32 @cpumask_first(%struct.cpumask* nocapture readnone %0) {
ret i32 0
}
int test(int i, int j) { return (i + j); }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
double calc_ponto_medio(double a, double b) {
  double x;
  x = (a + b) / 2;
  return x;
}


x86 assembly (clang, -O0):
<calc_ponto_medio>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  0xee0(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_ponto_medio>:
addsd  %xmm1,%xmm0
mulsd  0xef4(%rip),%xmm0
ret

LLVM IR (-O0):
define double @calc_ponto_medio(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fadd double %6, %7
%9 = fdiv double %8, 2.000000e+00
store double %9, double* %5
%10 = load double, double* %5
ret double %10
}

LLVM IR (-O2):
define double @calc_ponto_medio(double %0, double %1) {
%3 = fadd double %0, %1
%4 = fmul double %3, 5.000000e-01
ret double %4
}
void _Z1fIA3_dlEvPT_T0_() {}


x86 assembly (clang, -O0):
<_Z1fIA3_dlEvPT_T0_>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Z1fIA3_dlEvPT_T0_>:
ret

LLVM IR (-O0):
define void @_Z1fIA3_dlEvPT_T0_() {
ret void
}

LLVM IR (-O2):
define void @_Z1fIA3_dlEvPT_T0_() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ send_command_byte(int);
void goto_xy(int x, int y) {
  send_command_byte(0x40 + y);
  send_command_byte(0x80 + x * 6);
}


x86 assembly (clang, -O0):
<goto_xy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
add    $0x40,%edi
call   1030 <send_command_byte@plt>
imul   $0x6,-0x4(%rbp),%edi
add    $0x80,%edi
call   1030 <send_command_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<goto_xy>:
push   %rbx
mov    %edi,%ebx
lea    0x40(%rsi),%edi
call   1030 <send_command_byte@plt>
lea    (%rbx,%rbx,2),%eax
lea    (%rax,%rax,1),%edi
add    $0x80,%edi
pop    %rbx
jmp    1030 <send_command_byte@plt>

LLVM IR (-O0):
define void @goto_xy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = add nsw i32 64, %5
%7 = call i32 @send_command_byte(i32 %6)
%8 = load i32, i32* %3
%9 = mul nsw i32 %8, 6
%10 = add nsw i32 128, %9
%11 = call i32 @send_command_byte(i32 %10)
ret void
}

LLVM IR (-O2):
define void @goto_xy(i32 %0, i32 %1) {
%3 = add nsw i32 %1, 64
%4 = tail call i32 @send_command_byte(i32 %3)
%5 = mul nsw i32 %0, 6
%6 = add nsw i32 %5, 128
%7 = tail call i32 @send_command_byte(i32 %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x25() {
  Assert_real((isspace(37) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              190, ("isspace should be 0 for %"));
}


x86 assembly (clang, -O0):
<t_isspace_0x25>:
push   %rbp
mov    %rsp,%rbp
mov    $0x25,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xbe,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x25>:
push   %rax
mov    $0x25,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xbe,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for %\00"
define void @t_isspace_0x25() {
%1 = call i64 @isspace(i32 37)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 190, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for %\00"
define void @t_isspace_0x25() {
%1 = tail call i64 @isspace(i32 37)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 190, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int shft_l(int *, int *);
int intr_wrap_559(int p1, int p2) { return shft_l(&p1, &p2); }


x86 assembly (clang, -O0):
<intr_wrap_559>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <shft_l@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intr_wrap_559>:
push   %rax
mov    %edi,0x4(%rsp)
mov    %esi,(%rsp)
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
call   1030 <shft_l@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @intr_wrap_559(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @shft_l(i32* %3, i32* %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @intr_wrap_559(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @shft_l(i32* %3, i32* %4)
ret i32 %5
}
/* Variables and functions */
void stub1(short, long long);
void testClosureSLLrV(void (*closure)(short, long long), short a1,
                      long long a2) {
  if (closure != NULL)
    (*closure)(a1, a2);
}


x86 assembly (clang, -O0):
<testClosureSLLrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1133 <testClosureSLLrV+0x33>
mov    -0x8(%rbp),%rax
mov    -0xa(%rbp),%cx
mov    -0x18(%rbp),%rsi
movswl %cx,%edi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureSLLrV>:
test   %rdi,%rdi
je     1110 <testClosureSLLrV+0x10>
mov    %rdi,%rax
movswl %si,%edi
mov    %rdx,%rsi
jmp    *%rax
ret

LLVM IR (-O0):
define void @testClosureSLLrV(void (i16, i64)* %0, i16 signext %1, i64 %2) {
%4 = alloca void (i16, i64)*
%5 = alloca i16
%6 = alloca i64
store void (i16, i64)* %0, void (i16, i64)** %4
store i16 %1, i16* %5
store i64 %2, i64* %6
%7 = load void (i16, i64)*, void (i16, i64)** %4
%8 = icmp ne void (i16, i64)* %7, null
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load void (i16, i64)*, void (i16, i64)** %4
%11 = load i16, i16* %5
%12 = load i64, i64* %6
br label %13
13: ; preds = %9, %3
ret void
}

LLVM IR (-O2):
define void @testClosureSLLrV(void (i16, i64)* %0, i16 signext %1, i64 %2) {
%4 = icmp eq void (i16, i64)* %0, null
br i1 %4, label %6, label %5
5: ; preds = %3
tail call void %0(i16 signext %1, i64 %2)
br label %6
6: ; preds = %5, %3
ret void
}
int ait_kad_validation(int mode, int ukad, int akad) { return 0; }


x86 assembly (clang, -O0):
<ait_kad_validation>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ait_kad_validation>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ait_kad_validation(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @ait_kad_validation(i32 %0, i32 %1, i32 %2) {
ret i32 0
}
int test_imm_73int64_highword_reg(long long val) {
  return ((val >> 32) & (0x73 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_73int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x73,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_73int64_highword_reg>:
movabs $0x7300000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_73int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 115
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_73int64_highword_reg(i64 %0) {
%2 = and i64 %0, 493921239040
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int bang(int x) {
  int tmp;
  tmp = ~((x | (~x + 1)) >> 31);
  return tmp & 1;
}


x86 assembly (clang, -O0):
<bang>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
xor    $0xffffffff,%ecx
add    $0x1,%ecx
or     %ecx,%eax
sar    $0x1f,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bang>:
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @bang(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = xor i32 %5, -1
%7 = add nsw i32 %6, 1
%8 = or i32 %4, %7
%9 = ashr i32 %8, 31
%10 = xor i32 %9, -1
store i32 %10, i32* %3
%11 = load i32, i32* %3
%12 = and i32 %11, 1
ret i32 %12
}

LLVM IR (-O2):
define i32 @bang(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
int XSharpUseXft() { return 0; }


x86 assembly (clang, -O0):
<XSharpUseXft>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XSharpUseXft>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @XSharpUseXft() {
ret i32 0
}

LLVM IR (-O2):
define i32 @XSharpUseXft() {
ret i32 0
}
int test_imm_0Fuint16_reg(unsigned short val) {
  return ((val) & (-0x0F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Fuint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xfffffff1,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Fuint16_reg>:
test   $0xfff1,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Fuint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -15
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Fuint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -15
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main(int argc, char *argv[]) {
  int i;
  int s = 0;
#pragma omp for reduction(+ : s)
  for (i = 0; i < 100; i++) {
    s = s + i;
  }
  if (s != (((100 - 1) * 100) / 2))
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x64,-0x14(%rbp)
jge    1155 <main+0x45>
mov    -0x18(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1134 <main+0x24>
cmpl   $0x1356,-0x18(%rbp)
je     1169 <main+0x59>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %7
store i32 0, i32* %6
br label %8
8: ; preds = %15, %2
%9 = load i32, i32* %6
%10 = icmp slt i32 %9, 100
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = load i32, i32* %7
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
store i32 %14, i32* %7
br label %15
15: ; preds = %11
%16 = load i32, i32* %6
%17 = add nsw i32 %16, 1
store i32 %17, i32* %6
br label %8
18: ; preds = %8
%19 = load i32, i32* %7
%20 = icmp ne i32 %19, 4950
br i1 %20, label %21, label %23
21: ; preds = %18
%22 = call i32 (...) @abort()
unreachable
23: ; preds = %18
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 0
}
void sg_error_cleanup_comp(void *p) {
  (void)p;
  ((void)0);
}


x86 assembly (clang, -O0):
<sg_error_cleanup_comp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_error_cleanup_comp>:
ret

LLVM IR (-O0):
define void @sg_error_cleanup_comp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @sg_error_cleanup_comp(i8* nocapture %0) {
ret void
}
void h3(void) {}


x86 assembly (clang, -O0):
<h3>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h3>:
ret

LLVM IR (-O0):
define void @h3() {
ret void
}

LLVM IR (-O2):
define void @h3() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ trim_left(char *);
int /*<<< orphan*/ trim_right(char *);
char *trim(char *str) {
  trim_right(str);
  trim_left(str);
  return str;
}


x86 assembly (clang, -O0):
<trim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <trim_right@plt>
mov    -0x8(%rbp),%rdi
call   1040 <trim_left@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trim>:
push   %rbx
mov    %rdi,%rbx
call   1030 <trim_right@plt>
mov    %rbx,%rdi
call   1040 <trim_left@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @trim(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @trim_right(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @trim_left(i8* %5)
%7 = load i8*, i8** %2
ret i8* %7
}

LLVM IR (-O2):
define i8* @trim(i8* returned %0) {
%2 = tail call i32 @trim_right(i8* %0)
%3 = tail call i32 @trim_left(i8* %0)
ret i8* %0
}
OP(ed, f5) {}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
ret

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
ret i32 undef
}
void ff_get_cpu_max_align_arm() {}


x86 assembly (clang, -O0):
<ff_get_cpu_max_align_arm>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_get_cpu_max_align_arm>:
ret

LLVM IR (-O0):
define void @ff_get_cpu_max_align_arm() {
ret void
}

LLVM IR (-O2):
define void @ff_get_cpu_max_align_arm() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __emit_expression_range(int /*<<< orphan*/,
                                           int /*<<< orphan*/);
int test_postfix_incdec(int i) {
  __emit_expression_range(0, i++);
  __emit_expression_range(0, i--);
}


x86 assembly (clang, -O0):
<test_postfix_incdec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    %esi,%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
xor    %edi,%edi
call   1030 <__emit_expression_range@plt>
mov    -0x8(%rbp),%esi
mov    %esi,%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
xor    %edi,%edi
call   1030 <__emit_expression_range@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_postfix_incdec>:
push   %rbx
mov    %edi,%esi
lea    0x1(%rsi),%ebx
xor    %edi,%edi
call   1030 <__emit_expression_range@plt>
xor    %edi,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <__emit_expression_range@plt>

LLVM IR (-O0):
define i32 @test_postfix_incdec(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = add nsw i32 %4, 1
store i32 %5, i32* %3
%6 = call i32 @__emit_expression_range(i32 0, i32 %4)
%7 = load i32, i32* %3
%8 = add nsw i32 %7, -1
store i32 %8, i32* %3
%9 = call i32 @__emit_expression_range(i32 0, i32 %7)
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @test_postfix_incdec(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = tail call i32 @__emit_expression_range(i32 0, i32 %0)
%4 = tail call i32 @__emit_expression_range(i32 0, i32 %2)
ret i32 undef
}
void del_char(char *buf, char *ptr) {
  char *cp;
  cp = ptr;
  while ((*cp = *(cp + 1)) != 0)
    cp++;
}


x86 assembly (clang, -O0):
<del_char>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    0x1(%rax),%al
mov    -0x18(%rbp),%rcx
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     113e <del_char+0x3e>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <del_char+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<del_char>:
add    $0x1,%rsi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl (%rsi),%eax
mov    %al,-0x1(%rsi)
add    $0x1,%rsi
test   %al,%al
jne    1110 <del_char+0x10>
ret

LLVM IR (-O0):
define void @del_char(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
store i8* %6, i8** %5
br label %7
7: ; preds = %14, %2
%8 = load i8*, i8** %5
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = load i8*, i8** %5
store i8 %10, i8* %11
%12 = sext i8 %10 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %7
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
br label %7
17: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @del_char(i8* nocapture readnone %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %5, %3 ]
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = load i8, i8* %5
store i8 %6, i8* %4
%7 = icmp eq i8 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3
ret void
}
void rte_io_mb(void) {}


x86 assembly (clang, -O0):
<rte_io_mb>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rte_io_mb>:
ret

LLVM IR (-O0):
define void @rte_io_mb() {
ret void
}

LLVM IR (-O2):
define void @rte_io_mb() {
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int purpose;
};
typedef TYPE_1__ X509_PURPOSE;

/* Variables and functions */
int X509_PURPOSE_get_id(const X509_PURPOSE *xp) { return xp->purpose; }


x86 assembly (clang, -O0):
<X509_PURPOSE_get_id>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_PURPOSE_get_id>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32 }
define i32 @X509_PURPOSE_get_id(%struct.TYPE_3__* %0) {
%2 = alloca %struct.TYPE_3__*
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %2
%3 = load %struct.TYPE_3__*, %struct.TYPE_3__** %2
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %3, i32 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32 }
define i32 @X509_PURPOSE_get_id(%struct.TYPE_3__* nocapture %0) {
%2 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 0
%3 = load i32, i32* %2
ret i32 %3
}
int lib_mod_event(struct mod *mod, int msg, long param1, long param2,
                  long param3, long param4) {
  ;
  ;
  return 0;
}


x86 assembly (clang, -O0):
<lib_mod_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib_mod_event>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mod = type opaque
define i32 @lib_mod_event(%struct.mod* %0, i32 %1, i64 %2, i64 %3, i64 %4, i64 %5) {
%7 = alloca %struct.mod*
%8 = alloca i32
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca i64
store %struct.mod* %0, %struct.mod** %7
store i32 %1, i32* %8
store i64 %2, i64* %9
store i64 %3, i64* %10
store i64 %4, i64* %11
store i64 %5, i64* %12
ret i32 0
}

LLVM IR (-O2):
%struct.mod = type opaque
define i32 @lib_mod_event(%struct.mod* nocapture readnone %0, i32 %1, i64 %2, i64 %3, i64 %4, i64 %5) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int bitreverse16(int);
int bit_reverse(int v, int bits) {
  assert(bits <= 16);
  return bitreverse16(v) >> (16 - bits);
}


x86 assembly (clang, -O0):
<bit_reverse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x10,-0x8(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%edi
call   1040 <bitreverse16@plt>
mov    $0x10,%ecx
sub    -0x8(%rbp),%ecx
sar    %cl,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_reverse>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x11,%esi
setl   %dil
call   1030 <assert@plt>
mov    %ebp,%edi
call   1040 <bitreverse16@plt>
mov    $0x10,%cl
sub    %bl,%cl
sar    %cl,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @bit_reverse(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp sle i32 %5, 16
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %3
%10 = call i32 @bitreverse16(i32 %9)
%11 = load i32, i32* %4
%12 = sub nsw i32 16, %11
%13 = ashr i32 %10, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @bit_reverse(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, 17
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 @bitreverse16(i32 %0)
%7 = sub nsw i32 16, %1
%8 = ashr i32 %6, %7
ret i32 %8
}
double cos(double x) {
  double sin;
  __asm__ __volatile__("fldl %2;"
                       "fsincos;"
                       "fstpl %1;"
                       "fstpl %0"
                       : "=m"(sin), "=m"(x)
                       : "m"(x));
  return x;
}


x86 assembly (clang, -O0):
<cos>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
fldl   -0x8(%rbp)
fsincos
fstpl  -0x8(%rbp)
fstpl  -0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cos>:
movsd  %xmm0,-0x10(%rsp)
fldl   -0x10(%rsp)
fsincos
fstpl  -0x10(%rsp)
fstpl  -0x8(%rsp)
movsd  -0x10(%rsp),%xmm0
ret

LLVM IR (-O0):
define double @cos(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
ret double %4
}

LLVM IR (-O2):
define double @cos(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = bitcast double* %3 to i8*
%5 = load double, double* %2
ret double %5
}
int mul3div4(int x) {
  int mul3 = x + (x << 1);
  int mul3_mask = mul3 >> ((sizeof(int) << 3) - 1);
  int bias = mul3_mask & 3;
  return (mul3 + bias) >> 2;
}


x86 assembly (clang, -O0):
<mul3div4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
shl    $0x1,%ecx
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1f,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x3,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0x10(%rbp),%eax
sar    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul3div4>:
lea    (%rdi,%rdi,2),%ecx
mov    %ecx,%eax
sar    $0x1f,%eax
and    $0x3,%eax
add    %ecx,%eax
sar    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @mul3div4(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = load i32, i32* %2
%8 = shl i32 %7, 1
%9 = add nsw i32 %6, %8
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = ashr i32 %10, 31
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = and i32 %12, 3
store i32 %13, i32* %5
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = add nsw i32 %14, %15
%17 = ashr i32 %16, 2
ret i32 %17
}

LLVM IR (-O2):
define i32 @mul3div4(i32 %0) {
%2 = mul i32 %0, 3
%3 = icmp slt i32 %2, 0
%4 = select i1 %3, i32 3, i32 0
%5 = add nsw i32 %4, %2
%6 = ashr i32 %5, 2
ret i32 %6
}
/* Type definitions */
struct stack {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ insertAtBottom(struct stack *, int);
scalar_t__ isEmpty(struct stack *);
int pop(struct stack *);
void reverseStack(struct stack *stack) {
  if (isEmpty(stack))
    return;
  int top = pop(stack);
  reverseStack(stack);
  insertAtBottom(stack, top);
}


x86 assembly (clang, -O0):
<reverseStack>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1060 <isEmpty@plt>
cmp    $0x0,%rax
je     1164 <reverseStack+0x24>
jmp    1185 <reverseStack+0x45>
mov    -0x8(%rbp),%rdi
call   1040 <pop@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <reverseStack@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1050 <insertAtBottom@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverseStack>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1060 <isEmpty@plt>
test   %rax,%rax
je     1157 <reverseStack+0x17>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
call   1040 <pop@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <reverseStack@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <insertAtBottom@plt>

LLVM IR (-O0):
%struct.stack = type { i32 }
define void @reverseStack(%struct.stack* %0) {
%2 = alloca %struct.stack*
%3 = alloca i32
store %struct.stack* %0, %struct.stack** %2
%4 = load %struct.stack*, %struct.stack** %2
%5 = call i64 @isEmpty(%struct.stack* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
br label %15
8: ; preds = %1
%9 = load %struct.stack*, %struct.stack** %2
%10 = call i32 @pop(%struct.stack* %9)
store i32 %10, i32* %3
%11 = load %struct.stack*, %struct.stack** %2
%12 = load %struct.stack*, %struct.stack** %2
%13 = load i32, i32* %3
%14 = call i32 @insertAtBottom(%struct.stack* %12, i32 %13)
br label %15
15: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
%struct.stack = type { i32 }
define void @reverseStack(%struct.stack* %0) {
%2 = tail call i64 @isEmpty(%struct.stack* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %5, label %4
4: ; preds = %1, %5
ret void
5: ; preds = %1
%6 = tail call i32 @pop(%struct.stack* %0)
tail call void @reverseStack(%struct.stack* %0)
%7 = tail call i32 @insertAtBottom(%struct.stack* %0, i32 %6)
br label %4
}
/* Variables and functions */
int /*<<< orphan*/ core_cons();
int /*<<< orphan*/ core_nil();
int /*<<< orphan*/ core_swap();
void core_extend(void) {
  core_nil();
  core_cons();
  core_cons();
  core_swap();
  core_cons();
}


x86 assembly (clang, -O0):
<core_extend>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <core_nil@plt>
mov    $0x0,%al
call   1040 <core_cons@plt>
mov    $0x0,%al
call   1040 <core_cons@plt>
mov    $0x0,%al
call   1050 <core_swap@plt>
mov    $0x0,%al
call   1040 <core_cons@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<core_extend>:
push   %rax
xor    %eax,%eax
call   1030 <core_nil@plt>
xor    %eax,%eax
call   1040 <core_cons@plt>
xor    %eax,%eax
call   1040 <core_cons@plt>
xor    %eax,%eax
call   1050 <core_swap@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <core_cons@plt>

LLVM IR (-O0):
define void @core_extend() {
%1 = call i32 (...) @core_nil()
%2 = call i32 (...) @core_cons()
%3 = call i32 (...) @core_cons()
%4 = call i32 (...) @core_swap()
%5 = call i32 (...) @core_cons()
ret void
}

LLVM IR (-O2):
define void @core_extend() {
%1 = tail call i32 (...) @core_nil()
%2 = tail call i32 (...) @core_cons()
%3 = tail call i32 (...) @core_cons()
%4 = tail call i32 (...) @core_swap()
%5 = tail call i32 (...) @core_cons()
ret void
}
float idem(float x) { return x; }


x86 assembly (clang, -O0):
<idem>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<idem>:
ret

LLVM IR (-O0):
define float @idem(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
ret float %3
}

LLVM IR (-O2):
define float @idem(float returned %0) {
ret float %0
}
int test_imm_38uint32_mem(unsigned int *val) {
  return ((*val) & (0x38 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_38uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x38,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_38uint32_mem>:
testb  $0x38,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_38uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 56
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_38uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 56
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
float convert_adc_current(float adc_volts) {
  float ma;
  ma = adc_volts * 10. + 0.14;
  if (ma < 0.0 && ma > -0.1) {
    ma = 0;
  }
  return ma;
}


x86 assembly (clang, -O0):
<convert_adc_current>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee6(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xee2(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
xorps  %xmm0,%xmm0
ucomisd %xmm1,%xmm0
jbe    116c <convert_adc_current+0x6c>
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeb6(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    116c <convert_adc_current+0x6c>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert_adc_current>:
cvtss2sd %xmm0,%xmm0
mulsd  0xef4(%rip),%xmm0
addsd  0xef4(%rip),%xmm0
cvtsd2ss %xmm0,%xmm1
xorps  %xmm0,%xmm0
cvtss2sd %xmm1,%xmm0
ucomisd 0xee9(%rip),%xmm0
xorps  %xmm3,%xmm3
xorps  %xmm2,%xmm2
ja     1132 <convert_adc_current+0x32>
movaps %xmm1,%xmm2
movaps %xmm1,%xmm0
cmpltss %xmm3,%xmm0
andps  %xmm0,%xmm2
andnps %xmm1,%xmm0
orps   %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @convert_adc_current(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = fpext float %4 to double
%6 = call double @llvm.fmuladd.f64(double %5, double 1.000000e+01, double 1.400000e-01)
%7 = fptrunc double %6 to float
store float %7, float* %3
%8 = load float, float* %3
%9 = fpext float %8 to double
%10 = fcmp olt double %9, 0.000000e+00
br i1 %10, label %11, label %16
11: ; preds = %1
%12 = load float, float* %3
%13 = fpext float %12 to double
%14 = fcmp ogt double %13, -1.000000e-01
br i1 %14, label %15, label %16
15: ; preds = %11
store float 0.000000e+00, float* %3
br label %16
16: ; preds = %15, %11, %1
%17 = load float, float* %3
ret float %17
}

LLVM IR (-O2):
define float @convert_adc_current(float %0) {
%2 = fpext float %0 to double
%3 = tail call double @llvm.fmuladd.f64(double %2, double 1.000000e+01, double 1.400000e-01)
%4 = fptrunc double %3 to float
%5 = fcmp olt float %4, 0.000000e+00
%6 = fpext float %4 to double
%7 = fcmp ogt double %6, -1.000000e-01
%8 = and i1 %5, %7
%9 = select i1 %8, float 0.000000e+00, float %4
ret float %9
}