xunge/DecIR huggingface dataset:
/* Type definitions */
struct aes_encrypt_ctx {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ aes_ecb_encrypt_generic(struct aes_encrypt_ctx const *,
                                           void *, void const *, int);
void aes_ecb_encrypt128(const struct aes_encrypt_ctx *ctx, void *out,
                        const void *in) {
  aes_ecb_encrypt_generic(ctx, out, in, 16);
}


x86 assembly (clang, -O0):
<aes_ecb_encrypt128>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x10,%ecx
call   1030 <aes_ecb_encrypt_generic@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aes_ecb_encrypt128>:
mov    $0x10,%ecx
jmp    1030 <aes_ecb_encrypt_generic@plt>

LLVM IR (-O0):
%struct.aes_encrypt_ctx = type { i32 }
define void @aes_ecb_encrypt128(%struct.aes_encrypt_ctx* %0, i8* %1, i8* %2) {
%4 = alloca %struct.aes_encrypt_ctx*
%5 = alloca i8*
%6 = alloca i8*
store %struct.aes_encrypt_ctx* %0, %struct.aes_encrypt_ctx** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load %struct.aes_encrypt_ctx*, %struct.aes_encrypt_ctx** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 @aes_ecb_encrypt_generic(%struct.aes_encrypt_ctx* %7, i8* %8, i8* %9, i32 16)
ret void
}

LLVM IR (-O2):
%struct.aes_encrypt_ctx = type { i32 }
define void @aes_ecb_encrypt128(%struct.aes_encrypt_ctx* %0, i8* %1, i8* %2) {
%4 = tail call i32 @aes_ecb_encrypt_generic(%struct.aes_encrypt_ctx* %0, i8* %1, i8* %2, i32 16)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ input();
int /*<<< orphan*/ solve();
int /*<<< orphan*/ test_bubbleSort();
int main() {
  input();
  solve();
  test_bubbleSort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <input@plt>
mov    $0x0,%al
call   1030 <solve@plt>
mov    $0x0,%al
call   1050 <test_bubbleSort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <input@plt>
xor    %eax,%eax
call   1030 <solve@plt>
xor    %eax,%eax
call   1050 <test_bubbleSort@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @input()
%3 = call i32 (...) @solve()
%4 = call i32 (...) @test_bubbleSort()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @input()
%2 = tail call i32 (...) @solve()
%3 = tail call i32 (...) @test_bubbleSort()
ret i32 0
}
void ARGBUnattenuateRow_SSE2() {}


x86 assembly (clang, -O0):
<ARGBUnattenuateRow_SSE2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBUnattenuateRow_SSE2>:
ret

LLVM IR (-O0):
define void @ARGBUnattenuateRow_SSE2() {
ret void
}

LLVM IR (-O2):
define void @ARGBUnattenuateRow_SSE2() {
ret void
}
/* Variables and functions */
int baz(void) { return (8); }


x86 assembly (clang, -O0):
<baz>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @baz() {
ret i32 8
}

LLVM IR (-O2):
define i32 @baz() {
ret i32 8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
main(void) { printf("hello, world\n"); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"hello, world\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"hello, world\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ nc_dump_strain_to_disk();
int /*<<< orphan*/ pthread_exit(int /*<<< orphan*/ *);
void *cfunc_thread(void *valp) {
  int val;
  val = *((int *)valp);
  nc_dump_strain_to_disk();
  pthread_exit(NULL);
}


x86 assembly (clang, -O0):
<cfunc_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <nc_dump_strain_to_disk@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <pthread_exit@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfunc_thread>:
push   %rax
xor    %eax,%eax
call   1030 <nc_dump_strain_to_disk@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <pthread_exit@plt>

LLVM IR (-O0):
define i8* @cfunc_thread(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
store i32 %7, i32* %4
%8 = call i32 (...) @nc_dump_strain_to_disk()
%9 = call i32 @pthread_exit(i32* null)
%10 = load i8*, i8** %2
ret i8* %10
}

LLVM IR (-O2):
define noalias i8* @cfunc_thread(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @nc_dump_strain_to_disk()
%3 = tail call i32 @pthread_exit(i32* null)
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main() {
  char *test = "I am strong!!!";
  printf("hahi11\n");
  test[1] = '#';
  printf("hahi22\n");
  printf("%s\n", test);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    0xede(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
movb   $0x23,0x1(%rax)
lea    0xed0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%rsi
lea    0xec6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef7(%rip),%rdi
call   1030 <puts@plt>
lea    0xef2(%rip),%rdi
call   1030 <puts@plt>
lea    0xed0(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"I am strong!!!\00"
@.str.1 = [8 x i8] c"hahi11\0A\00"
@.str.2 = [8 x i8] c"hahi22\0A\00"
@.str.3 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8** %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 1
store i8 35, i8* %5
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0))
%7 = load i8*, i8** %2
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), i8* %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"I am strong!!!\00"
@str = [7 x i8] c"hahi11\00"
@str.4 = [7 x i8] c"hahi22\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str.4, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ WRITE_REG16(unsigned long, unsigned short);
void gfx_write_reg16(unsigned long offset, unsigned short value) {
  WRITE_REG16(offset, value);
}


x86 assembly (clang, -O0):
<gfx_write_reg16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %rdi,-0x8(%rbp)
mov    %ax,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
movzwl -0xa(%rbp),%esi
call   1030 <WRITE_REG16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_write_reg16>:
jmp    1030 <WRITE_REG16@plt>

LLVM IR (-O0):
define void @gfx_write_reg16(i64 %0, i16 zeroext %1) {
%3 = alloca i64
%4 = alloca i16
store i64 %0, i64* %3
store i16 %1, i16* %4
%5 = load i64, i64* %3
%6 = load i16, i16* %4
%7 = call i32 @WRITE_REG16(i64 %5, i16 zeroext %6)
ret void
}

LLVM IR (-O2):
define void @gfx_write_reg16(i64 %0, i16 zeroext %1) {
%3 = tail call i32 @WRITE_REG16(i64 %0, i16 zeroext %1)
ret void
}
int max_zero(int a, int b) {
  int max;
  max = a > b ? a : b;
  if (max < 0)
    max = 0;
  return max;
}


x86 assembly (clang, -O0):
<max_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <max_zero+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1127 <max_zero+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jge    113e <max_zero+0x3e>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max_zero>:
cmp    %esi,%edi
cmovg  %edi,%esi
xor    %eax,%eax
test   %esi,%esi
cmovns %esi,%eax
ret

LLVM IR (-O0):
define i32 @max_zero(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %4
br label %13
13: ; preds = %11, %9
%14 = phi i32 [ %10, %9 ], [ %12, %11 ]
store i32 %14, i32* %5
%15 = load i32, i32* %5
%16 = icmp slt i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 0, i32* %5
br label %18
18: ; preds = %17, %13
%19 = load i32, i32* %5
ret i32 %19
}

LLVM IR (-O2):
define i32 @max_zero(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
%5 = icmp sgt i32 %4, 0
%6 = select i1 %5, i32 %4, i32 0
ret i32 %6
}
double Sleef_cbrt_u35(double x) { return __builtin_cbrt(x); }


x86 assembly (clang, -O0):
<Sleef_cbrt_u35>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <cbrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleef_cbrt_u35>:
jmp    1030 <cbrt@plt>

LLVM IR (-O0):
define double @Sleef_cbrt_u35(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @cbrt(double %3)
ret double %4
}

LLVM IR (-O2):
define double @Sleef_cbrt_u35(double %0) {
%2 = tail call double @cbrt(double %0)
ret double %2
}
/* Variables and functions */
size_t ft_sizemin(size_t n1, size_t n2) { return ((n1 < n2) ? n1 : n2); }


x86 assembly (clang, -O0):
<ft_sizemin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1127 <ft_sizemin+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <ft_sizemin+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_sizemin>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovb  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @ft_sizemin(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @ft_sizemin(i64 %0, i64 %1) {
%3 = icmp ult i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int bar(int);
int foo(int);
int main() {
#pragma omp parallel
#pragma omp single
  {
    if (foo(4) != 4)
      abort();
  }
  if (bar(6) != 6)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1050 <foo@plt>
cmp    $0x4,%eax
je     1159 <main+0x29>
mov    $0x0,%al
call   1030 <abort@plt>
mov    $0x6,%edi
call   1040 <bar@plt>
cmp    $0x6,%eax
je     1173 <main+0x43>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
call   1050 <foo@plt>
cmp    $0x4,%eax
jne    1153 <main+0x23>
mov    $0x6,%edi
call   1040 <bar@plt>
cmp    $0x6,%eax
jne    1153 <main+0x23>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @foo(i32 4)
%3 = icmp ne i32 %2, 4
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 (...) @abort()
unreachable
6: ; preds = %0
%7 = call i32 @bar(i32 6)
%8 = icmp ne i32 %7, 6
br i1 %8, label %9, label %11
9: ; preds = %6
%10 = call i32 (...) @abort()
unreachable
11: ; preds = %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @foo(i32 4)
%2 = icmp eq i32 %1, 4
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = tail call i32 @bar(i32 6)
%7 = icmp eq i32 %6, 6
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call i32 (...) @abort()
unreachable
10: ; preds = %5
ret i32 0
}
int dns_opt_push(struct dns_packet *P, struct dns_opt *opt) { return 0; }


x86 assembly (clang, -O0):
<dns_opt_push>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_opt_push>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.dns_packet = type opaque
%struct.dns_opt = type opaque
define i32 @dns_opt_push(%struct.dns_packet* %0, %struct.dns_opt* %1) {
%3 = alloca %struct.dns_packet*
%4 = alloca %struct.dns_opt*
store %struct.dns_packet* %0, %struct.dns_packet** %3
store %struct.dns_opt* %1, %struct.dns_opt** %4
ret i32 0
}

LLVM IR (-O2):
%struct.dns_packet = type opaque
%struct.dns_opt = type opaque
define i32 @dns_opt_push(%struct.dns_packet* nocapture readnone %0, %struct.dns_opt* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
scalar_t__ memcmp(char *, char *, int);
char check_line(char *line, size_t len) {
  if (memcmp(line, "GET", 3) == 0)
    return 1;
  return memcmp(line, "POST", 4) == 0;
}


x86 assembly (clang, -O0):
<check_line>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed5(%rip),%rsi
mov    $0x3,%edx
call   1030 <memcmp@plt>
cmp    $0x0,%rax
jne    1148 <check_line+0x38>
movb   $0x1,-0x1(%rbp)
jmp    116c <check_line+0x5c>
mov    -0x10(%rbp),%rdi
lea    0xeb1(%rip),%rsi
mov    $0x4,%edx
call   1030 <memcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_line>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
mov    $0x3,%edx
call   1030 <memcmp@plt>
test   %rax,%rax
je     1146 <check_line+0x36>
lea    0xed3(%rip),%rsi
mov    %rbx,%rdi
mov    $0x4,%edx
call   1030 <memcmp@plt>
test   %rax,%rax
sete   %al
pop    %rbx
ret
mov    $0x1,%al
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"GET\00"
@.str.1 = [5 x i8] c"POST\00"
define signext i8 @check_line(i8* %0, i64 %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
%6 = load i8*, i8** %4
%7 = call i64 @memcmp(i8* %6, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i8 1, i8* %3
br label %16
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = call i64 @memcmp(i8* %11, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 4)
%13 = icmp eq i64 %12, 0
%14 = zext i1 %13 to i32
%15 = trunc i32 %14 to i8
store i8 %15, i8* %3
br label %16
16: ; preds = %10, %9
%17 = load i8, i8* %3
ret i8 %17
}

LLVM IR (-O2):
@.str = [4 x i8] c"GET\00"
@.str.1 = [5 x i8] c"POST\00"
define signext i8 @check_line(i8* %0, i64 %1) {
%3 = tail call i64 @memcmp(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 3)
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = tail call i64 @memcmp(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 4)
%7 = icmp eq i64 %6, 0
%8 = zext i1 %7 to i8
br label %9
9: ; preds = %2, %5
%10 = phi i8 [ %8, %5 ], [ 1, %2 ]
ret i8 %10
}
/* Variables and functions */
int RAND_MAX;
int rand();
int rand_limit(int limit) {
  int divisor = RAND_MAX / (limit + 1);
  int retval = 0;
  do {
    retval = rand() / divisor;
  } while (retval > limit);
  return retval;
}


x86 assembly (clang, -O0):
<rand_limit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%eax
mov    -0x4(%rbp),%ecx
add    $0x1,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x8(%rbp)
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1137 <rand_limit+0x27>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_limit>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2ecc(%rip),%rax
mov    (%rax),%eax
lea    0x1(%rbx),%ecx
cltd
idiv   %ecx
mov    %eax,%ebp
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebp
cmp    %ebx,%eax
jg     1130 <rand_limit+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@RAND_MAX = global i32 0
define i32 @rand_limit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* @RAND_MAX
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 1
%8 = sdiv i32 %5, %7
store i32 %8, i32* %3
store i32 0, i32* %4
br label %9
9: ; preds = %13, %1
%10 = call i32 (...) @rand()
%11 = load i32, i32* %3
%12 = sdiv i32 %10, %11
store i32 %12, i32* %4
br label %13
13: ; preds = %9
%14 = load i32, i32* %4
%15 = load i32, i32* %2
%16 = icmp sgt i32 %14, %15
br i1 %16, label %9, label %17
17: ; preds = %13
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
@RAND_MAX = global i32 0
define i32 @rand_limit(i32 %0) {
%2 = load i32, i32* @RAND_MAX
%3 = add nsw i32 %0, 1
%4 = sdiv i32 %2, %3
br label %5
5: ; preds = %5, %1
%6 = tail call i32 (...) @rand()
%7 = sdiv i32 %6, %4
%8 = icmp sgt i32 %7, %0
br i1 %8, label %5, label %9
9: ; preds = %5
ret i32 %7
}
void *get_addr_so_user_f(name)
char *name;
{}


x86 assembly (clang, -O0):
<get_addr_so_user_f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_addr_so_user_f>:
ret

LLVM IR (-O0):
define i8* @get_addr_so_user_f(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %2
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @get_addr_so_user_f(i8* nocapture readnone %0) {
ret i8* undef
}
/* Type definitions */
typedef int time_t;

/* Variables and functions */
char *ctime(int *);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ right_solution();
int main() {
  time_t biggest = 0x7FFFFFFF;
  printf("biggest = %s \n", ctime(&biggest));
  right_solution();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x7fffffff,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <ctime@plt>
mov    %rax,%rsi
lea    0xea7(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1050 <right_solution@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x7fffffff,0x4(%rsp)
7f
lea    0x4(%rsp),%rdi
call   1030 <ctime@plt>
lea    0xeb6(%rip),%rdi
mov    %rax,%rsi
call   1040 <printf@plt>
xor    %eax,%eax
call   1050 <right_solution@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"biggest = %s \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 2147483647, i32* %2
%3 = call i8* @ctime(i32* %2)
%4 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (...) @right_solution()
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"biggest = %s \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 2147483647, i32* %1
%3 = call i8* @ctime(i32* %1)
%4 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (...) @right_solution()
ret i32 0
}
void adis16350_remove_trigger(struct iio_dev *indio_dev) {}


x86 assembly (clang, -O0):
<adis16350_remove_trigger>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<adis16350_remove_trigger>:
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define void @adis16350_remove_trigger(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret void
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define void @adis16350_remove_trigger(%struct.iio_dev* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_147() {
  Assert_real((isqrt(147) == 12),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              740, ("Integer square root of 147 should be 12"));
}


x86 assembly (clang, -O0):
<t_sqrt_147>:
push   %rbp
mov    %rsp,%rbp
mov    $0x93,%edi
call   1030 <isqrt@plt>
cmp    $0xc,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x2e4,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_147>:
push   %rax
mov    $0x93,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0xc,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x2e4,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 147 should be 12\00"
define void @t_sqrt_147() {
%1 = call i32 @isqrt(i32 147)
%2 = icmp eq i32 %1, 12
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 740, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [40 x i8] c"Integer square root of 147 should be 12\00"
define void @t_sqrt_147() {
%1 = tail call i32 @isqrt(i32 147)
%2 = icmp eq i32 %1, 12
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 740, i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void termop_cleartab(struct ansiseq *s) {
  tnc_log_log(
      7, 4, -1,
      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c",
      431, __func__, "unhandled");
  ansiseq_dump(s);
}


x86 assembly (clang, -O0):
<termop_cleartab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x7,%edi
mov    $0x4,%esi
mov    $0xffffffff,%edx
lea    0xebe(%rip),%rcx
mov    $0x1af,%r8d
lea    0xf37(%rip),%r9
lea    0xf40(%rip),%rax
mov    %rax,(%rsp)
mov    $0x0,%al
call   1030 <tnc_log_log@plt>
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <ansiseq_dump@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<termop_cleartab>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0xf67(%rip),%rax
mov    %rax,(%rsp)
lea    0xec6(%rip),%rcx
lea    0xf45(%rip),%r9
mov    $0x7,%edi
mov    $0x4,%esi
mov    $0xffffffff,%edx
mov    $0x1af,%r8d
xor    %eax,%eax
call   1030 <tnc_log_log@plt>
mov    %rbx,%rdi
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <ansiseq_dump@plt>

LLVM IR (-O0):
%struct.ansiseq = type opaque
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c\00"
@__func__.termop_cleartab = [16 x i8] c"termop_cleartab\00"
@.str.1 = [10 x i8] c"unhandled\00"
define void @termop_cleartab(%struct.ansiseq* %0) {
%2 = alloca %struct.ansiseq*
store %struct.ansiseq* %0, %struct.ansiseq** %2
%3 = call i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @tnc_log_log to i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...)*)(i32 7, i32 4, i32 -1, i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 431, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__func__.termop_cleartab, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%4 = load %struct.ansiseq*, %struct.ansiseq** %2
%5 = call i32 (%struct.ansiseq*, ...) bitcast (i32 (...)* @ansiseq_dump to i32 (%struct.ansiseq*, ...)*)(%struct.ansiseq* %4)
ret void
}

LLVM IR (-O2):
%struct.ansiseq = type opaque
@.str = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/fstd/telnetcat/refs/heads/devel/src/xterm.c\00"
@__func__.termop_cleartab = [16 x i8] c"termop_cleartab\00"
@.str.1 = [10 x i8] c"unhandled\00"
define void @termop_cleartab(%struct.ansiseq* %0) {
%2 = tail call i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @tnc_log_log to i32 (i32, i32, i32, i8*, i32, i8*, i8*, ...)*)(i32 7, i32 4, i32 -1, i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str, i64 0, i64 0), i32 431, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__func__.termop_cleartab, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 (%struct.ansiseq*, ...) bitcast (i32 (...)* @ansiseq_dump to i32 (%struct.ansiseq*, ...)*)(%struct.ansiseq* %0)
ret void
}
int max(int i, int j) { return i > j ? i : j; }


x86 assembly (clang, -O0):
<max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1121 <max+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <max+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @max(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0xd6() {
  Assert_real((isupper(214) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              1075, ("isupper should be 0 for 0xd6"));
}


x86 assembly (clang, -O0):
<t_isupper_0xd6>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd6,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x433,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0xd6>:
push   %rax
mov    $0xd6,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x433,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xd6\00"
define void @t_isupper_0xd6() {
%1 = call i64 @isupper(i32 214)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1075, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xd6\00"
define void @t_isupper_0xd6() {
%1 = tail call i64 @isupper(i32 214)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1075, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mf_write_meta_event(int, char *, int);
void copy_metamisc(int type, int length, char *m) {
  mf_write_meta_event(type, m, length);
}


x86 assembly (clang, -O0):
<copy_metamisc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%edx
call   1030 <mf_write_meta_event@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copy_metamisc>:
mov    %esi,%eax
mov    %rdx,%rsi
mov    %eax,%edx
jmp    1030 <mf_write_meta_event@plt>

LLVM IR (-O0):
define void @copy_metamisc(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %6
%9 = load i32, i32* %5
%10 = call i32 @mf_write_meta_event(i32 %7, i8* %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @copy_metamisc(i32 %0, i32 %1, i8* %2) {
%4 = tail call i32 @mf_write_meta_event(i32 %0, i8* %2, i32 %1)
ret void
}
int unhex(unsigned char *c2) {
  int x, c;
  x = *c2++ & 0x4f;
  if (x & 0x40)
    x -= 55;
  c = x << 4;
  x = *c2 & 0x4f;
  if (x & 0x40)
    x -= 55;
  c |= x;
  return c;
}


x86 assembly (clang, -O0):
<unhex>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
and    $0x4f,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x40,%eax
cmp    $0x0,%eax
je     1138 <unhex+0x38>
mov    -0xc(%rbp),%eax
sub    $0x37,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x4,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
and    $0x4f,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x40,%eax
cmp    $0x0,%eax
je     1166 <unhex+0x66>
mov    -0xc(%rbp),%eax
sub    $0x37,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unhex>:
movzbl (%rdi),%ecx
mov    %ecx,%edx
and    $0x4f,%edx
movzbl 0x1(%rdi),%eax
mov    %eax,%esi
and    $0x4f,%esi
lea    -0x37(%rsi),%edi
test   $0x40,%al
cmove  %esi,%edi
shl    $0x4,%edx
lea    -0x370(%rdx),%eax
test   $0x40,%cl
cmove  %edx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @unhex(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = zext i8 %7 to i32
%9 = and i32 %8, 79
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = and i32 %10, 64
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %1
%14 = load i32, i32* %3
%15 = sub nsw i32 %14, 55
store i32 %15, i32* %3
br label %16
16: ; preds = %13, %1
%17 = load i32, i32* %3
%18 = shl i32 %17, 4
store i32 %18, i32* %4
%19 = load i8*, i8** %2
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = and i32 %21, 79
store i32 %22, i32* %3
%23 = load i32, i32* %3
%24 = and i32 %23, 64
%25 = icmp ne i32 %24, 0
br i1 %25, label %26, label %29
26: ; preds = %16
%27 = load i32, i32* %3
%28 = sub nsw i32 %27, 55
store i32 %28, i32* %3
br label %29
29: ; preds = %26, %16
%30 = load i32, i32* %3
%31 = load i32, i32* %4
%32 = or i32 %31, %30
store i32 %32, i32* %4
%33 = load i32, i32* %4
ret i32 %33
}

LLVM IR (-O2):
define i32 @unhex(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %0
%4 = and i8 %3, 79
%5 = zext i8 %4 to i32
%6 = and i32 %5, 64
%7 = icmp eq i32 %6, 0
%8 = load i8, i8* %2
%9 = and i8 %8, 79
%10 = zext i8 %9 to i32
%11 = and i32 %10, 64
%12 = icmp eq i32 %11, 0
%13 = add nsw i32 %10, -55
%14 = select i1 %12, i32 %10, i32 %13
%15 = shl nuw nsw i32 %5, 4
%16 = add nsw i32 %15, -880
%17 = select i1 %7, i32 %15, i32 %16
%18 = or i32 %14, %17
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ suzerain_inorder_wavenumber_valid(int const, int const);
int suzerain_inorder_index(const int N, const int w) {
  assert(suzerain_inorder_wavenumber_valid(N, w));
  return (w >= 0) ? w : N + w;
}


x86 assembly (clang, -O0):
<suzerain_inorder_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <suzerain_inorder_wavenumber_valid@plt>
mov    %eax,%edi
call   1040 <assert@plt>
cmpl   $0x0,-0x8(%rbp)
jl     1155 <suzerain_inorder_index+0x35>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    115e <suzerain_inorder_index+0x3e>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<suzerain_inorder_index>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <suzerain_inorder_wavenumber_valid@plt>
mov    %eax,%edi
call   1040 <assert@plt>
mov    %ebx,%eax
sar    $0x1f,%eax
and    %ebp,%eax
add    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @suzerain_inorder_index(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @suzerain_inorder_wavenumber_valid(i32 %5, i32 %6)
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %4
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i32, i32* %4
br label %17
13: ; preds = %2
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = add nsw i32 %14, %15
br label %17
17: ; preds = %13, %11
%18 = phi i32 [ %12, %11 ], [ %16, %13 ]
ret i32 %18
}

LLVM IR (-O2):
define i32 @suzerain_inorder_index(i32 %0, i32 %1) {
%3 = tail call i32 @suzerain_inorder_wavenumber_valid(i32 %0, i32 %1)
%4 = tail call i32 @assert(i32 %3)
%5 = icmp slt i32 %1, 0
%6 = select i1 %5, i32 %0, i32 0
%7 = add nsw i32 %6, %1
ret i32 %7
}
int list_equal(void *data, void *arg) { return data == arg; }


x86 assembly (clang, -O0):
<list_equal>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_equal>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @list_equal(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp eq i8* %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @list_equal(i8* readnone %0, i8* readnone %1) {
%3 = icmp eq i8* %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int add_match(int /*<<< orphan*/);
int /*<<< orphan*/ strdup(char const *);
int vle_compl_add_match(const char match[]) { return add_match(strdup(match)); }


x86 assembly (clang, -O0):
<vle_compl_add_match>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strdup@plt>
mov    %eax,%edi
call   1030 <add_match@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vle_compl_add_match>:
push   %rax
call   1040 <strdup@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <add_match@plt>

LLVM IR (-O0):
define i32 @vle_compl_add_match(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strdup(i8* %3)
%5 = call i32 @add_match(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @vle_compl_add_match(i8* %0) {
%2 = tail call i32 @strdup(i8* %0)
%3 = tail call i32 @add_match(i32 %2)
ret i32 %3
}
/* Variables and functions */
void PERDummyDeInit(void) {}


x86 assembly (clang, -O0):
<PERDummyDeInit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PERDummyDeInit>:
ret

LLVM IR (-O0):
define void @PERDummyDeInit() {
ret void
}

LLVM IR (-O2):
define void @PERDummyDeInit() {
ret void
}
int cmp(const void *a, const void *b) {
  int *x = (int *)a;
  int *y = (int *)b;
  return *x - *y;
}


x86 assembly (clang, -O0):
<cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}
/* Variables and functions */
int find(int *, int);
int test_one_element() {
  int array[] = {2};
  return 2 == find(array, 1);
}


x86 assembly (clang, -O0):
<test_one_element>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee2(%rip),%eax
mov    %eax,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
mov    $0x1,%esi
call   1030 <find@plt>
mov    %eax,%ecx
mov    $0x2,%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_one_element>:
push   %rax
movl   $0x2,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x1,%esi
call   1030 <find@plt>
xor    %ecx,%ecx
cmp    $0x2,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.test_one_element.array = [1 x i32] [i32 2]
define i32 @test_one_element() {
%1 = alloca [1 x i32]
%2 = bitcast [1 x i32]* %1 to i8*
%3 = getelementptr inbounds [1 x i32], [1 x i32]* %1, i64 0, i64 0
%4 = call i32 @find(i32* %3, i32 1)
%5 = icmp eq i32 2, %4
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @test_one_element() {
%1 = alloca [1 x i32]
%2 = bitcast [1 x i32]* %1 to i8*
%3 = getelementptr inbounds [1 x i32], [1 x i32]* %1, i64 0, i64 0
store i32 2, i32* %3
%4 = call i32 @find(i32* %3, i32 1)
%5 = icmp eq i32 %4, 2
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ namcoGuessN175(int /*<<< orphan*/);
int /*<<< orphan*/ namco_setRAM(int /*<<< orphan*/, int /*<<< orphan*/);
void namco_setRAM_GuessN175(uint16_t addr, uint8_t val) {
  namcoGuessN175(addr);
  namco_setRAM(addr, val);
}


x86 assembly (clang, -O0):
<namco_setRAM_GuessN175>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <namcoGuessN175@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <namco_setRAM@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<namco_setRAM_GuessN175>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1040 <namcoGuessN175@plt>
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <namco_setRAM@plt>

LLVM IR (-O0):
define void @namco_setRAM_GuessN175(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @namcoGuessN175(i32 %5)
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i32 @namco_setRAM(i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
define void @namco_setRAM_GuessN175(i32 %0, i32 %1) {
%3 = tail call i32 @namcoGuessN175(i32 %0)
%4 = tail call i32 @namco_setRAM(i32 %0, i32 %1)
ret void
}
int test_imm_B1uint8_reg(unsigned char val) {
  return ((val) & (-0xB1 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B1uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff4f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B1uint8_reg>:
test   $0x4f,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B1uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -177
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_B1uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 79
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int is_on_line(int x1, int y1, int x2, int y2, int nx, int ny) {
  int dx = x2 - x1, dy = y2 - y1, ndx = nx - x1, ndy = ny - y1;
  if (dx * ndy == ndx * dy) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<is_on_line>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x14(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
sub    -0xc(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x20(%rbp),%eax
imul   -0x2c(%rbp),%eax
mov    -0x28(%rbp),%ecx
imul   -0x24(%rbp),%ecx
cmp    %ecx,%eax
jne    115e <is_on_line+0x5e>
movl   $0x1,-0x4(%rbp)
jmp    1165 <is_on_line+0x65>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_on_line>:
sub    %edi,%edx
sub    %esi,%ecx
sub    %edi,%r8d
imul   %ecx,%r8d
sub    %esi,%r9d
imul   %edx,%r9d
xor    %eax,%eax
cmp    %r8d,%r9d
sete   %al
ret

LLVM IR (-O0):
define i32 @is_on_line(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
%18 = load i32, i32* %10
%19 = load i32, i32* %8
%20 = sub nsw i32 %18, %19
store i32 %20, i32* %14
%21 = load i32, i32* %11
%22 = load i32, i32* %9
%23 = sub nsw i32 %21, %22
store i32 %23, i32* %15
%24 = load i32, i32* %12
%25 = load i32, i32* %8
%26 = sub nsw i32 %24, %25
store i32 %26, i32* %16
%27 = load i32, i32* %13
%28 = load i32, i32* %9
%29 = sub nsw i32 %27, %28
store i32 %29, i32* %17
%30 = load i32, i32* %14
%31 = load i32, i32* %17
%32 = mul nsw i32 %30, %31
%33 = load i32, i32* %16
%34 = load i32, i32* %15
%35 = mul nsw i32 %33, %34
%36 = icmp eq i32 %32, %35
br i1 %36, label %37, label %38
37: ; preds = %6
store i32 1, i32* %7
br label %39
38: ; preds = %6
store i32 0, i32* %7
br label %39
39: ; preds = %38, %37
%40 = load i32, i32* %7
ret i32 %40
}

LLVM IR (-O2):
define i32 @is_on_line(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = sub nsw i32 %2, %0
%8 = sub nsw i32 %3, %1
%9 = sub nsw i32 %4, %0
%10 = sub nsw i32 %5, %1
%11 = mul nsw i32 %10, %7
%12 = mul nsw i32 %9, %8
%13 = icmp eq i32 %11, %12
%14 = zext i1 %13 to i32
ret i32 %14
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int i;
  int w;
  i = __VERIFIER_nondet_int();
  w = 5;
  while (i != 0) {
    if (i < -w) {
      i = i - 1;
      i = i * (-1);
    } else {
      if (i > w) {
        i = i + 1;
        i = i * (-1);
      } else {
        i = 0;
      }
    }
    w = w + 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
movl   $0x5,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     119a <main+0x8a>
mov    -0x8(%rbp),%eax
xor    %ecx,%ecx
sub    -0xc(%rbp),%ecx
cmp    %ecx,%eax
jge    115f <main+0x4f>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
imul   $0xffffffff,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    118c <main+0x7c>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1180 <main+0x70>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
imul   $0xffffffff,-0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1187 <main+0x77>
movl   $0x0,-0x8(%rbp)
jmp    118c <main+0x7c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1130 <main+0x20>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %4, i32* %2
store i32 5, i32* %3
br label %5
5: ; preds = %29, %0
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %32
8: ; preds = %5
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = sub nsw i32 0, %10
%12 = icmp slt i32 %9, %11
br i1 %12, label %13, label %18
13: ; preds = %8
%14 = load i32, i32* %2
%15 = sub nsw i32 %14, 1
store i32 %15, i32* %2
%16 = load i32, i32* %2
%17 = mul nsw i32 %16, -1
store i32 %17, i32* %2
br label %29
18: ; preds = %8
%19 = load i32, i32* %2
%20 = load i32, i32* %3
%21 = icmp sgt i32 %19, %20
br i1 %21, label %22, label %27
22: ; preds = %18
%23 = load i32, i32* %2
%24 = add nsw i32 %23, 1
store i32 %24, i32* %2
%25 = load i32, i32* %2
%26 = mul nsw i32 %25, -1
store i32 %26, i32* %2
br label %28
27: ; preds = %18
store i32 0, i32* %2
br label %28
28: ; preds = %27, %22
br label %29
29: ; preds = %28, %13
%30 = load i32, i32* %3
%31 = add nsw i32 %30, 1
store i32 %31, i32* %3
br label %5
32: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}