#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ nand_chip_disable();
unsigned char nand_read_one_byte();
int /*<<< orphan*/ nand_write_addr(int);
int /*<<< orphan*/ nand_write_cmmd(int);
int /*<<< orphan*/ uart_tx_multiple_bytes(unsigned char *, int);
void nand_read_id(void) {
  unsigned char maf_id[5];
  volatile unsigned char var = 0;
  nand_write_cmmd(0x90);
  nand_write_addr(0x00);
  for (var = 0; var < 5; var++) {
    maf_id[var] = nand_read_one_byte();
  }
  nand_chip_disable();
  uart_tx_multiple_bytes(maf_id, 5);
}


x86 assembly (clang, -O0):
<nand_read_id>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x0,-0x6(%rbp)
mov    $0x90,%edi
call   1060 <nand_write_cmmd@plt>
xor    %edi,%edi
call   1040 <nand_write_addr@plt>
movb   $0x0,-0x6(%rbp)
mov    -0x6(%rbp),%al
movzbl %al,%eax
cmp    $0x5,%eax
jge    11a0 <nand_read_id+0x50>
mov    $0x0,%al
call   1050 <nand_read_one_byte@plt>
mov    %al,%cl
mov    -0x6(%rbp),%al
movzbl %al,%eax
mov    %cl,-0x5(%rbp,%rax,1)
mov    -0x6(%rbp),%al
add    $0x1,%al
mov    %al,-0x6(%rbp)
jmp    1171 <nand_read_id+0x21>
mov    $0x0,%al
call   1070 <nand_chip_disable@plt>
lea    -0x5(%rbp),%rdi
mov    $0x5,%esi
call   1030 <uart_tx_multiple_bytes@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_read_id>:
push   %rax
movb   $0x0,0x2(%rsp)
mov    $0x90,%edi
call   1060 <nand_write_cmmd@plt>
xor    %edi,%edi
call   1040 <nand_write_addr@plt>
movb   $0x0,0x2(%rsp)
mov    0x2(%rsp),%al
cmp    $0x4,%al
ja     119e <nand_read_id+0x4e>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
xor    %eax,%eax
call   1050 <nand_read_one_byte@plt>
movzbl 0x2(%rsp),%ecx
mov    %al,0x3(%rsp,%rcx,1)
addb   $0x1,0x2(%rsp)
movzbl 0x2(%rsp),%eax
cmp    $0x5,%al
jb     1180 <nand_read_id+0x30>
xor    %eax,%eax
call   1070 <nand_chip_disable@plt>
lea    0x3(%rsp),%rdi
mov    $0x5,%esi
call   1030 <uart_tx_multiple_bytes@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @nand_read_id() {
%1 = alloca [5 x i8]
%2 = alloca i8
store volatile i8 0, i8* %2
%3 = call i32 @nand_write_cmmd(i32 144)
%4 = call i32 @nand_write_addr(i32 0)
store volatile i8 0, i8* %2
br label %5
5: ; preds = %14, %0
%6 = load volatile i8, i8* %2
%7 = zext i8 %6 to i32
%8 = icmp slt i32 %7, 5
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = call zeroext i8 (...) @nand_read_one_byte()
%11 = load volatile i8, i8* %2
%12 = zext i8 %11 to i64
%13 = getelementptr inbounds [5 x i8], [5 x i8]* %1, i64 0, i64 %12
store i8 %10, i8* %13
br label %14
14: ; preds = %9
%15 = load volatile i8, i8* %2
%16 = add i8 %15, 1
store volatile i8 %16, i8* %2
br label %5
17: ; preds = %5
%18 = call i32 (...) @nand_chip_disable()
%19 = getelementptr inbounds [5 x i8], [5 x i8]* %1, i64 0, i64 0
%20 = call i32 @uart_tx_multiple_bytes(i8* %19, i32 5)
ret void
}

LLVM IR (-O2):
define void @nand_read_id() {
%1 = alloca [5 x i8]
%2 = alloca i8
%3 = getelementptr inbounds [5 x i8], [5 x i8]* %1, i64 0, i64 0
store volatile i8 0, i8* %2
%4 = tail call i32 @nand_write_cmmd(i32 144)
%5 = tail call i32 @nand_write_addr(i32 0)
store volatile i8 0, i8* %2
%6 = load volatile i8, i8* %2
%7 = icmp ult i8 %6, 5
br i1 %7, label %8, label %17
8: ; preds = %0, %8
%9 = tail call zeroext i8 (...) @nand_read_one_byte()
%10 = load volatile i8, i8* %2
%11 = zext i8 %10 to i64
%12 = getelementptr inbounds [5 x i8], [5 x i8]* %1, i64 0, i64 %11
store i8 %9, i8* %12
%13 = load volatile i8, i8* %2
%14 = add i8 %13, 1
store volatile i8 %14, i8* %2
%15 = load volatile i8, i8* %2
%16 = icmp ult i8 %15, 5
br i1 %16, label %8, label %17
17: ; preds = %8, %0
%18 = tail call i32 (...) @nand_chip_disable()
%19 = call i32 @uart_tx_multiple_bytes(i8* %3, i32 5)
ret void
}