xunge/DecIR huggingface dataset:
/* Variables and functions */
double M_PI;
double sin(double);
double dw_dz(double L, double a_wz, double w_z, double z) {
  return -M_PI * a_wz * w_z * sin(M_PI * a_wz * z / L) / L;
}


x86 assembly (clang, -O0):
<dw_dz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
mov    0x2eb5(%rip),%rax
movsd  (%rax),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
mov    0x2e84(%rip),%rax
movsd  (%rax),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x20(%rbp),%xmm0
divsd  -0x8(%rbp),%xmm0
call   1030 <sin@plt>
movaps %xmm0,%xmm1
movsd  -0x28(%rbp),%xmm0
mulsd  %xmm1,%xmm0
divsd  -0x8(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dw_dz>:
sub    $0x28,%rsp
movapd %xmm0,%xmm4
movsd  %xmm0,0x8(%rsp)
mov    0x2ec3(%rip),%rax
movsd  (%rax),%xmm0
movapd 0xecf(%rip),%xmm5
xorpd  %xmm0,%xmm5
mulsd  %xmm1,%xmm5
mulsd  %xmm2,%xmm5
movapd %xmm5,0x10(%rsp)
mulsd  %xmm1,%xmm0
mulsd  %xmm3,%xmm0
divsd  %xmm4,%xmm0
call   1030 <sin@plt>
mulsd  0x10(%rsp),%xmm0
divsd  0x8(%rsp),%xmm0
add    $0x28,%rsp
ret

LLVM IR (-O0):
@M_PI = global double 0.000000e+00
define double @dw_dz(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* @M_PI
%10 = fneg double %9
%11 = load double, double* %6
%12 = fmul double %10, %11
%13 = load double, double* %7
%14 = fmul double %12, %13
%15 = load double, double* @M_PI
%16 = load double, double* %6
%17 = fmul double %15, %16
%18 = load double, double* %8
%19 = fmul double %17, %18
%20 = load double, double* %5
%21 = fdiv double %19, %20
%22 = call double @sin(double %21)
%23 = fmul double %14, %22
%24 = load double, double* %5
%25 = fdiv double %23, %24
ret double %25
}

LLVM IR (-O2):
@M_PI = global double 0.000000e+00
define double @dw_dz(double %0, double %1, double %2, double %3) {
%5 = load double, double* @M_PI
%6 = fneg double %5
%7 = fmul double %6, %1
%8 = fmul double %7, %2
%9 = fmul double %5, %1
%10 = fmul double %9, %3
%11 = fdiv double %10, %0
%12 = tail call double @sin(double %11)
%13 = fmul double %12, %8
%14 = fdiv double %13, %0
ret double %14
}
void init_mxs_image_type(void) {}


x86 assembly (clang, -O0):
<init_mxs_image_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_mxs_image_type>:
ret

LLVM IR (-O0):
define void @init_mxs_image_type() {
ret void
}

LLVM IR (-O2):
define void @init_mxs_image_type() {
ret void
}
/* Type definitions */
struct nlattr {
  int dummy;
};
typedef int /*<<< orphan*/ __be16;

/* Variables and functions */
scalar_t__ nla_data(struct nlattr const *);
__be16 nla_get_be16(const struct nlattr *nla) {
  return *(__be16 *)nla_data(nla);
}


x86 assembly (clang, -O0):
<nla_get_be16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <nla_data@plt>
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nla_get_be16>:
push   %rax
call   1030 <nla_data@plt>
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.nlattr = type { i32 }
define i32 @nla_get_be16(%struct.nlattr* %0) {
%2 = alloca %struct.nlattr*
store %struct.nlattr* %0, %struct.nlattr** %2
%3 = load %struct.nlattr*, %struct.nlattr** %2
%4 = call i64 @nla_data(%struct.nlattr* %3)
%5 = inttoptr i64 %4 to i32*
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
%struct.nlattr = type { i32 }
define i32 @nla_get_be16(%struct.nlattr* %0) {
%2 = tail call i64 @nla_data(%struct.nlattr* %0)
%3 = inttoptr i64 %2 to i32*
%4 = load i32, i32* %3
ret i32 %4
}
void *mmemset(void *s, int c, unsigned int n) {
  for (; n; n--, s++) {
    *((unsigned char *)s) = c;
  }
  return s;
}


x86 assembly (clang, -O0):
<mmemset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     113d <mmemset+0x3d>
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110e <mmemset+0xe>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmemset>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
test   %edx,%edx
je     1131 <mmemset+0x21>
mov    %edx,%ebx
mov    %edx,%edx
mov    %r14,%rdi
call   1030 <memset@plt>
add    $0xffffffff,%ebx
add    %rbx,%r14
add    $0x1,%r14
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @mmemset(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
br label %7
7: ; preds = %14, %3
%8 = load i32, i32* %6
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %7
%11 = load i32, i32* %5
%12 = trunc i32 %11 to i8
%13 = load i8*, i8** %4
store i8 %12, i8* %13
br label %14
14: ; preds = %10
%15 = load i32, i32* %6
%16 = add i32 %15, -1
store i32 %16, i32* %6
%17 = load i8*, i8** %4
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %4
br label %7
19: ; preds = %7
%20 = load i8*, i8** %4
ret i8* %20
}

LLVM IR (-O2):
define i8* @mmemset(i8* writeonly %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %12, label %5
5: ; preds = %3
%6 = trunc i32 %1 to i8
%7 = zext i32 %2 to i64
%8 = add i32 %2, -1
%9 = zext i32 %8 to i64
%10 = add nuw nsw i64 %9, 1
%11 = getelementptr i8, i8* %0, i64 %10
br label %12
12: ; preds = %5, %3
%13 = phi i8* [ %0, %3 ], [ %11, %5 ]
ret i8* %13
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_25519_relax(uintptr_t, uintptr_t);
void fiat_25519_relax(uint32_t out1[10], const uint32_t arg1[10]) {
  internal_fiat_25519_relax((uintptr_t)out1, (uintptr_t)arg1);
}


x86 assembly (clang, -O0):
<fiat_25519_relax>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <internal_fiat_25519_relax@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_25519_relax>:
jmp    1030 <internal_fiat_25519_relax@plt>

LLVM IR (-O0):
define void @fiat_25519_relax(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = ptrtoint i32* %5 to i64
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i64
%9 = call i32 @internal_fiat_25519_relax(i64 %6, i64 %8)
ret void
}

LLVM IR (-O2):
define void @fiat_25519_relax(i32* %0, i32* %1) {
%3 = ptrtoint i32* %0 to i64
%4 = ptrtoint i32* %1 to i64
%5 = tail call i32 @internal_fiat_25519_relax(i64 %3, i64 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
int main() {
  system("powershell -executionpolicy bypass \"IEX (New-Object "
         "Net.WebClient).DownloadString('https://raw.githubusercontent.com/"
         "metalx1000/MyBin/master/games/mame/metal_slug5/mslug5.ps1'); \"");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [180 x i8] c"powershell -executionpolicy bypass \22IEX (New-Object Net.WebClient).DownloadString('https://raw.githubusercontent.com/metalx1000/MyBin/master/games/mame/metal_slug5/mslug5.ps1'); \22\00"
define i32 @main() {
%1 = call i32 @system(i8* getelementptr inbounds ([180 x i8], [180 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [180 x i8] c"powershell -executionpolicy bypass \22IEX (New-Object Net.WebClient).DownloadString('https://raw.githubusercontent.com/metalx1000/MyBin/master/games/mame/metal_slug5/mslug5.ps1'); \22\00"
define i32 @main() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([180 x i8], [180 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int puts(s)
char *s;
{ s++; }


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
ret

LLVM IR (-O0):
define i32 @puts(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8, i8* %4, i32 1
store i8* %5, i8** %3
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @puts(i8* nocapture readnone %0) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ yyunput(int /*<<< orphan*/, int /*<<< orphan*/ *);
void ignore() { yyunput(0, NULL); }


x86 assembly (clang, -O0):
<ignore>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <yyunput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ignore>:
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <yyunput@plt>

LLVM IR (-O0):
define void @ignore() {
%1 = call i32 @yyunput(i32 0, i32* null)
ret void
}

LLVM IR (-O2):
define void @ignore() {
%1 = tail call i32 @yyunput(i32 0, i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(char const *);
char *strstr(char const *, char const *);
__attribute__((visibility("default"))) char *
trio_substring(const char *string, const char *substring) {
  assert(string);
  assert(substring);
  return strstr(string, substring);
}


x86 assembly (clang, -O0):
<trio_substring>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x10(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <strstr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trio_substring>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    %r14,%rdi
call   1030 <assert@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <strstr@plt>

LLVM IR (-O0):
define i8* @trio_substring(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @assert(i8* %5)
%7 = load i8*, i8** %4
%8 = call i32 @assert(i8* %7)
%9 = load i8*, i8** %3
%10 = load i8*, i8** %4
%11 = call i8* @strstr(i8* %9, i8* %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @trio_substring(i8* %0, i8* %1) {
%3 = tail call i32 @assert(i8* %0)
%4 = tail call i32 @assert(i8* %1)
%5 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i8* %5
}
/* Variables and functions */
long signextend_long(long x, int b) {
  intptr_t m = 1U << (b - 1);
  x = x & ((1U << b) - 1);
  return (x ^ m) - m;
}


x86 assembly (clang, -O0):
<signextend_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,%eax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
sub    $0x1,%ecx
mov    %ecx,%ecx
and    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    -0x18(%rbp),%rax
sub    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signextend_long>:
lea    -0x1(%rsi),%r8d
mov    $0x1,%edx
mov    %r8d,%ecx
shl    %cl,%edx
mov    $0xffffffff,%eax
mov    %esi,%ecx
shl    %cl,%eax
not    %eax
and    %edi,%eax
btc    %r8d,%eax
sub    %rdx,%rax
ret

LLVM IR (-O0):
define i64 @signextend_long(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
%5 = alloca i64
store i64 %0, i64* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = shl i32 1, %7
%9 = zext i32 %8 to i64
store i64 %9, i64* %5
%10 = load i64, i64* %3
%11 = load i32, i32* %4
%12 = shl i32 1, %11
%13 = sub i32 %12, 1
%14 = zext i32 %13 to i64
%15 = and i64 %10, %14
store i64 %15, i64* %3
%16 = load i64, i64* %3
%17 = load i64, i64* %5
%18 = xor i64 %16, %17
%19 = load i64, i64* %5
%20 = sub nsw i64 %18, %19
ret i64 %20
}

LLVM IR (-O2):
define i64 @signextend_long(i64 %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = shl nuw i32 1, %3
%5 = zext i32 %4 to i64
%6 = shl nsw i32 -1, %1
%7 = xor i32 %6, -1
%8 = zext i32 %7 to i64
%9 = and i64 %8, %0
%10 = xor i64 %9, %5
%11 = sub nsw i64 %10, %5
ret i64 %11
}
/* Variables and functions */
int openCameraDevice(void *);
int OpenCamera(void *v4l2ctx) { return openCameraDevice(v4l2ctx); }


x86 assembly (clang, -O0):
<OpenCamera>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <openCameraDevice@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OpenCamera>:
jmp    1030 <openCameraDevice@plt>

LLVM IR (-O0):
define i32 @OpenCamera(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @openCameraDevice(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @OpenCamera(i8* %0) {
%2 = tail call i32 @openCameraDevice(i8* %0)
ret i32 %2
}
char *pdb_get_version_string(void) { return "libpdb (Version 1.0.0)"; }


x86 assembly (clang, -O0):
<pdb_get_version_string>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pdb_get_version_string>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [23 x i8] c"libpdb (Version 1.0.0)\00"
define i8* @pdb_get_version_string() {
ret i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [23 x i8] c"libpdb (Version 1.0.0)\00"
define i8* @pdb_get_version_string() {
ret i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0)
}
void Init(void) {}


x86 assembly (clang, -O0):
<Init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Init>:
ret

LLVM IR (-O0):
define void @Init() {
ret void
}

LLVM IR (-O2):
define void @Init() {
ret void
}
void fc162(int n) {
  {
    typedef int(*b)[n];
    {
      typedef int(*c)[n];
      0;
    }
    {
      typedef int(*d)[n];
      0;
    };
    typedef int(*e)[n];
    0;
  };
  {
    typedef int(*f)[n];
    {
      typedef int(*g)[n];
      goto a;
    a:
      0;
    };
    {
      typedef int(*h)[n];
      0;
    };
    ;
    typedef int(*i)[n];
    0;
  };
  ;
  typedef int(*j)[n];
  0;
}


x86 assembly (clang, -O0):
<fc162>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc162>:
ret

LLVM IR (-O0):
define void @fc162(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = zext i32 %3 to i64
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = load i32, i32* %2
%8 = zext i32 %7 to i64
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
%11 = load i32, i32* %2
%12 = zext i32 %11 to i64
%13 = load i32, i32* %2
%14 = zext i32 %13 to i64
br label %15
15: ; preds = %1
%16 = load i32, i32* %2
%17 = zext i32 %16 to i64
%18 = load i32, i32* %2
%19 = zext i32 %18 to i64
%20 = load i32, i32* %2
%21 = zext i32 %20 to i64
ret void
}

LLVM IR (-O2):
define void @fc162(i32 %0) {
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
bool utf16_is_trailing_surrogate(uint16_t c) {
  return (0xdc00 <= c && c <= 0xdfff);
}


x86 assembly (clang, -O0):
<utf16_is_trailing_surrogate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    $0xdc00,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x5(%rbp)
jg     1127 <utf16_is_trailing_surrogate+0x27>
cmpl   $0xdfff,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf16_is_trailing_surrogate>:
and    $0xfffffc00,%edi
xor    %eax,%eax
cmp    $0xdc00,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @utf16_is_trailing_surrogate(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 56320, %3
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57343
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @utf16_is_trailing_surrogate(i32 %0) {
%2 = and i32 %0, -1024
%3 = icmp eq i32 %2, 56320
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ udelay(int);
void mdelay(unsigned long msec) {
  while (msec--)
    udelay(1000);
}


x86 assembly (clang, -O0):
<mdelay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x8(%rbp)
cmp    $0x0,%rax
je     1144 <mdelay+0x34>
mov    $0x3e8,%edi
call   1030 <udelay@plt>
jmp    111c <mdelay+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdelay>:
push   %rbx
test   %rdi,%rdi
je     1130 <mdelay+0x20>
mov    %rdi,%rbx
nopl   0x0(%rax)
mov    $0x3e8,%edi
call   1030 <udelay@plt>
add    $0xffffffffffffffff,%rbx
jne    1120 <mdelay+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @mdelay(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
br label %3
3: ; preds = %7, %1
%4 = load i64, i64* %2
%5 = add i64 %4, -1
store i64 %5, i64* %2
%6 = icmp ne i64 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 @udelay(i32 1000)
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @mdelay(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1, %3
%4 = phi i64 [ %5, %3 ], [ %0, %1 ]
%5 = add i64 %4, -1
%6 = tail call i32 @udelay(i32 1000)
%7 = icmp eq i64 %5, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
int32_t SSIAdvDataPutFrameEndNonBlocking(uint32_t ui32Base, uint32_t ui32Data) {
  ;
  ;
  if ((*((volatile uint32_t *)(ui32Base + 0x0000000C))) & 0x00000002) {
    (*((volatile uint32_t *)(ui32Base + 0x00000004))) |= 0x00000800;
    (*((volatile uint32_t *)(ui32Base + 0x00000008))) = ui32Data;
    return (1);
  } else {
    return (0);
  }
}


x86 assembly (clang, -O0):
<SSIAdvDataPutFrameEndNonBlocking>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0xc,%eax
cltq
mov    (%rax),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     114b <SSIAdvDataPutFrameEndNonBlocking+0x4b>
mov    -0x8(%rbp),%eax
add    $0x4,%eax
cltq
mov    (%rax),%ecx
or     $0x800,%ecx
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%eax
add    $0x8,%eax
cltq
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    1152 <SSIAdvDataPutFrameEndNonBlocking+0x52>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIAdvDataPutFrameEndNonBlocking>:
movslq %edi,%rcx
xor    %eax,%eax
testl  $0x2,0xc(%rcx)
je     111d <SSIAdvDataPutFrameEndNonBlocking+0x1d>
orl    $0x800,0x4(%rcx)
mov    %esi,0x8(%rcx)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @SSIAdvDataPutFrameEndNonBlocking(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 12
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = and i32 %10, 2
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %25
13: ; preds = %2
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 4
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
%19 = or i32 %18, 2048
store volatile i32 %19, i32* %17
%20 = load i32, i32* %5
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 8
%23 = sext i32 %22 to i64
%24 = inttoptr i64 %23 to i32*
store volatile i32 %20, i32* %24
store i32 1, i32* %3
br label %26
25: ; preds = %2
store i32 0, i32* %3
br label %26
26: ; preds = %25, %13
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @SSIAdvDataPutFrameEndNonBlocking(i32 %0, i32 %1) {
%3 = add nsw i32 %0, 12
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, 2
%8 = icmp eq i32 %7, 0
br i1 %8, label %18, label %9
9: ; preds = %2
%10 = add nsw i32 %0, 4
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
%14 = or i32 %13, 2048
store volatile i32 %14, i32* %12
%15 = add nsw i32 %0, 8
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
store volatile i32 %1, i32* %17
br label %18
18: ; preds = %2, %9
%19 = phi i32 [ 1, %9 ], [ 0, %2 ]
ret i32 %19
}
int add(int number) {
  number++;
  return number;
}


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @add(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @add(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
int checkFirstCharacter(char character) {
  int parsedCharacter = character;
  if (parsedCharacter >= 65 && parsedCharacter <= 90)
    return parsedCharacter / 10;
  else if (parsedCharacter >= 97 && parsedCharacter <= 122)
    return parsedCharacter * 2;
  ;
  return 0;
}


x86 assembly (clang, -O0):
<checkFirstCharacter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x41,-0xc(%rbp)
jl     1138 <checkFirstCharacter+0x38>
cmpl   $0x5a,-0xc(%rbp)
jg     1138 <checkFirstCharacter+0x38>
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
jmp    1166 <checkFirstCharacter+0x66>
cmpl   $0x61,-0xc(%rbp)
jl     115a <checkFirstCharacter+0x5a>
cmpl   $0x7a,-0xc(%rbp)
jg     115a <checkFirstCharacter+0x5a>
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1166 <checkFirstCharacter+0x66>
jmp    115f <checkFirstCharacter+0x5f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkFirstCharacter>:
lea    -0x41(%rdi),%eax
cmp    $0x19,%al
ja     1115 <checkFirstCharacter+0x15>
movzbl %dil,%eax
imul   $0xcd,%eax,%eax
shr    $0xb,%eax
ret
movsbl %dil,%ecx
add    $0x9f,%dil
add    %ecx,%ecx
xor    %eax,%eax
cmp    $0x1a,%dil
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @checkFirstCharacter(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp sge i32 %7, 65
br i1 %8, label %9, label %15
9: ; preds = %1
%10 = load i32, i32* %4
%11 = icmp sle i32 %10, 90
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load i32, i32* %4
%14 = sdiv i32 %13, 10
store i32 %14, i32* %2
br label %26
15: ; preds = %9, %1
%16 = load i32, i32* %4
%17 = icmp sge i32 %16, 97
br i1 %17, label %18, label %24
18: ; preds = %15
%19 = load i32, i32* %4
%20 = icmp sle i32 %19, 122
br i1 %20, label %21, label %24
21: ; preds = %18
%22 = load i32, i32* %4
%23 = mul nsw i32 %22, 2
store i32 %23, i32* %2
br label %26
24: ; preds = %18, %15
br label %25
25: ; preds = %24
store i32 0, i32* %2
br label %26
26: ; preds = %25, %21, %12
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @checkFirstCharacter(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = udiv i8 %0, 10
%6 = zext i8 %5 to i32
br label %13
7: ; preds = %1
%8 = sext i8 %0 to i32
%9 = add i8 %0, -97
%10 = icmp ult i8 %9, 26
%11 = shl nsw i32 %8, 1
%12 = select i1 %10, i32 %11, i32 0
br label %13
13: ; preds = %7, %4
%14 = phi i32 [ %6, %4 ], [ %12, %7 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ CyEEPROM_Stop();
void EEPROM_R_Stop(void) { CyEEPROM_Stop(); }


x86 assembly (clang, -O0):
<EEPROM_R_Stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CyEEPROM_Stop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<EEPROM_R_Stop>:
xor    %eax,%eax
jmp    1030 <CyEEPROM_Stop@plt>

LLVM IR (-O0):
define void @EEPROM_R_Stop() {
%1 = call i32 (...) @CyEEPROM_Stop()
ret void
}

LLVM IR (-O2):
define void @EEPROM_R_Stop() {
%1 = tail call i32 (...) @CyEEPROM_Stop()
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t bswap64(uint64_t value) {
  return (((value & 0x00000000000000FF) << 56) |
          ((value & 0x000000000000FF00) << 40) |
          ((value & 0x0000000000FF0000) << 24) |
          ((value & 0x00000000FF000000) << 8) |
          ((value & 0x000000FF00000000) >> 8) |
          ((value & 0x0000FF0000000000) >> 24) |
          ((value & 0x00FF000000000000) >> 40) |
          ((value & 0xFF00000000000000) >> 56));
}


x86 assembly (clang, -O0):
<bswap64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    $0x38,%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
and    $0xff00,%edx
mov    $0x28,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,%eax
movslq -0x4(%rbp),%rcx
movabs $0xff00000000,%rdx
and    %rdx,%rcx
sar    $0x8,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff0000000000,%rdx
and    %rdx,%rcx
sar    $0x18,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff000000000000,%rdx
and    %rdx,%rcx
sar    $0x28,%rcx
or     %rcx,%rax
movslq -0x4(%rbp),%rcx
movabs $0xff00000000000000,%rdx
and    %rdx,%rcx
shr    $0x38,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bswap64>:
ret

LLVM IR (-O0):
define i32 @bswap64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = shl i32 %4, 56
%6 = load i32, i32* %2
%7 = and i32 %6, 65280
%8 = shl i32 %7, 40
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 16711680
%12 = shl i32 %11, 24
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, -16777216
%16 = shl i32 %15, 8
%17 = or i32 %13, %16
%18 = zext i32 %17 to i64
%19 = load i32, i32* %2
%20 = sext i32 %19 to i64
%21 = and i64 %20, 1095216660480
%22 = ashr i64 %21, 8
%23 = or i64 %18, %22
%24 = load i32, i32* %2
%25 = sext i32 %24 to i64
%26 = and i64 %25, 280375465082880
%27 = ashr i64 %26, 24
%28 = or i64 %23, %27
%29 = load i32, i32* %2
%30 = sext i32 %29 to i64
%31 = and i64 %30, 71776119061217280
%32 = ashr i64 %31, 40
%33 = or i64 %28, %32
%34 = load i32, i32* %2
%35 = sext i32 %34 to i64
%36 = and i64 %35, -72057594037927936
%37 = lshr i64 %36, 56
%38 = or i64 %33, %37
%39 = trunc i64 %38 to i32
ret i32 %39
}

LLVM IR (-O2):
define i32 @bswap64(i32 %0) {
ret i32 poison
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int main(int argc, char *argv[]) {
  int counter;
  for (counter = 0; counter < argc; counter++)
    printf("%s\n", argv[counter]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    115f <main+0x4f>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rsi
lea    0xeb4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edi,%edi
jle    1145 <main+0x35>
mov    %rsi,%r15
mov    %edi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,8),%rsi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <main+0x20>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %7
7: ; preds = %18, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %7
%12 = load i8**, i8*** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %16)
br label %18
18: ; preds = %11
%19 = load i32, i32* %6
%20 = add nsw i32 %19, 1
store i32 %20, i32* %6
br label %7
21: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i8*, i8** %1, i64 %7
%9 = load i8*, i8** %8
%10 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret i32 0
}
/* Variables and functions */
int getchi();
int getuch() {
  int ch;
  ch = getchi();
  if (ch > 64 && ch < 96)
    ch += 32;
  return (ch);
}


x86 assembly (clang, -O0):
<getuch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getchi@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x40,-0x4(%rbp)
jle    113f <getuch+0x2f>
cmpl   $0x60,-0x4(%rbp)
jge    113f <getuch+0x2f>
mov    -0x4(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getuch>:
push   %rax
xor    %eax,%eax
call   1030 <getchi@plt>
lea    -0x41(%rax),%ecx
lea    0x20(%rax),%edx
cmp    $0x1f,%ecx
cmovb  %edx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @getuch() {
%1 = alloca i32
%2 = call i32 (...) @getchi()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp sgt i32 %3, 64
br i1 %4, label %5, label %11
5: ; preds = %0
%6 = load i32, i32* %1
%7 = icmp slt i32 %6, 96
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %1
%10 = add nsw i32 %9, 32
store i32 %10, i32* %1
br label %11
11: ; preds = %8, %5, %0
%12 = load i32, i32* %1
ret i32 %12
}

LLVM IR (-O2):
define i32 @getuch() {
%1 = tail call i32 (...) @getchi()
%2 = add i32 %1, -65
%3 = icmp ult i32 %2, 31
%4 = add nsw i32 %1, 32
%5 = select i1 %3, i32 %4, i32 %1
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void *tpl_cpv(void *datav, const void *data, size_t sz) {
  if (sz > 0)
    memcpy(datav, data, sz);
  return (void *)((uintptr_t)datav + sz);
}


x86 assembly (clang, -O0):
<tpl_cpv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jbe    1140 <tpl_cpv+0x30>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
add    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tpl_cpv>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
test   %rdx,%rdx
je     112a <tpl_cpv+0x1a>
mov    %rbx,%rdi
mov    %r14,%rdx
call   1030 <memcpy@plt>
add    %r14,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @tpl_cpv(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = icmp ugt i64 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %3
%10 = load i8*, i8** %4
%11 = load i8*, i8** %5
%12 = load i64, i64* %6
%13 = call i32 @memcpy(i8* %10, i8* %11, i64 %12)
br label %14
14: ; preds = %9, %3
%15 = load i8*, i8** %4
%16 = ptrtoint i8* %15 to i64
%17 = load i64, i64* %6
%18 = add i64 %16, %17
%19 = inttoptr i64 %18 to i8*
ret i8* %19
}

LLVM IR (-O2):
define i8* @tpl_cpv(i8* %0, i8* %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @memcpy(i8* %0, i8* %1, i64 %2)
br label %7
7: ; preds = %5, %3
%8 = ptrtoint i8* %0 to i64
%9 = add i64 %8, %2
%10 = inttoptr i64 %9 to i8*
ret i8* %10
}
/* Type definitions */
typedef char *uint16_t;

/* Variables and functions */
uint16_t _OSSwapInt16(uint16_t data) {
  __asm__("xchgb %b0, %h0" : "+q"(data));
  return data;
}


x86 assembly (clang, -O0):
<_OSSwapInt16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xchg   %ah,%al
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_OSSwapInt16>:
mov    %rdi,%rax
xchg   %ah,%al
ret

LLVM IR (-O0):
define i8* @_OSSwapInt16(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "xchgb ${0:b}, ${0:h}", "=q,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @_OSSwapInt16(i8* readnone %0) {
%2 = tail call i8* asm "xchgb ${0:b}, ${0:h}", "=q,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ SNVS_HP_WRAPPER_TZ_DriverIRQHandler();
__attribute__((weak)) void SNVS_HP_WRAPPER_TZ_IRQHandler(void) {
  SNVS_HP_WRAPPER_TZ_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<SNVS_HP_WRAPPER_TZ_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <SNVS_HP_WRAPPER_TZ_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SNVS_HP_WRAPPER_TZ_IRQHandler>:
xor    %eax,%eax
jmp    1030 <SNVS_HP_WRAPPER_TZ_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @SNVS_HP_WRAPPER_TZ_IRQHandler() {
%1 = call i32 (...) @SNVS_HP_WRAPPER_TZ_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @SNVS_HP_WRAPPER_TZ_IRQHandler() {
%1 = tail call i32 (...) @SNVS_HP_WRAPPER_TZ_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SYS_brk;
int brk(char *);
scalar_t__ syscall(int /*<<< orphan*/, void *);
void *sbrk(intptr_t increment) {
  void *pb;
  pb = (void *)syscall(SYS_brk, (void *)0);
  if (brk((char *)pb + increment) == -1)
    return (void *)-1;
  return pb;
}


x86 assembly (clang, -O0):
<sbrk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <syscall@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
add    -0x10(%rbp),%rdi
call   1030 <brk@plt>
cmp    $0xffffffff,%eax
jne    1168 <sbrk+0x48>
mov    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
jmp    1170 <sbrk+0x50>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sbrk>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
call   1040 <syscall@plt>
mov    %rax,%r14
add    %rax,%rbx
mov    %rbx,%rdi
call   1030 <brk@plt>
cmp    $0xffffffff,%eax
mov    $0xffffffffffffffff,%rax
cmovne %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@SYS_brk = global i32 0
define i8* @sbrk(i64 %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
%5 = load i32, i32* @SYS_brk
%6 = call i64 @syscall(i32 %5, i8* null)
%7 = inttoptr i64 %6 to i8*
store i8* %7, i8** %4
%8 = load i8*, i8** %4
%9 = load i64, i64* %3
%10 = getelementptr inbounds i8, i8* %8, i64 %9
%11 = call i32 @brk(i8* %10)
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %14
13: ; preds = %1
store i8* inttoptr (i64 -1 to i8*), i8** %2
br label %16
14: ; preds = %1
%15 = load i8*, i8** %4
store i8* %15, i8** %2
br label %16
16: ; preds = %14, %13
%17 = load i8*, i8** %2
ret i8* %17
}

LLVM IR (-O2):
@SYS_brk = global i32 0
define i8* @sbrk(i64 %0) {
%2 = load i32, i32* @SYS_brk
%3 = tail call i64 @syscall(i32 %2, i8* null)
%4 = inttoptr i64 %3 to i8*
%5 = getelementptr inbounds i8, i8* %4, i64 %0
%6 = tail call i32 @brk(i8* %5)
%7 = icmp eq i32 %6, -1
%8 = select i1 %7, i8* inttoptr (i64 -1 to i8*), i8* %4
ret i8* %8
}
/* Variables and functions */
int /*<<< orphan*/ init_editor();
int /*<<< orphan*/ init_find_dialog();
int /*<<< orphan*/ init_menu();
int /*<<< orphan*/ init_replace_dialog();
int /*<<< orphan*/ init_title_bar();
void init_windows() {
  init_title_bar();
  init_menu();
  init_editor();
  init_find_dialog();
  init_replace_dialog();
}


x86 assembly (clang, -O0):
<init_windows>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_title_bar@plt>
mov    $0x0,%al
call   1060 <init_menu@plt>
mov    $0x0,%al
call   1070 <init_editor@plt>
mov    $0x0,%al
call   1040 <init_find_dialog@plt>
mov    $0x0,%al
call   1050 <init_replace_dialog@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_windows>:
push   %rax
xor    %eax,%eax
call   1030 <init_title_bar@plt>
xor    %eax,%eax
call   1060 <init_menu@plt>
xor    %eax,%eax
call   1070 <init_editor@plt>
xor    %eax,%eax
call   1040 <init_find_dialog@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <init_replace_dialog@plt>

LLVM IR (-O0):
define void @init_windows() {
%1 = call i32 (...) @init_title_bar()
%2 = call i32 (...) @init_menu()
%3 = call i32 (...) @init_editor()
%4 = call i32 (...) @init_find_dialog()
%5 = call i32 (...) @init_replace_dialog()
ret void
}

LLVM IR (-O2):
define void @init_windows() {
%1 = tail call i32 (...) @init_title_bar()
%2 = tail call i32 (...) @init_menu()
%3 = tail call i32 (...) @init_editor()
%4 = tail call i32 (...) @init_find_dialog()
%5 = tail call i32 (...) @init_replace_dialog()
ret void
}
/* Type definitions */
struct em8051 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
int disasm_movc_a_indir_a_dptr(struct em8051 *aCPU, int aPosition,
                               char *aBuffer) {
  sprintf(aBuffer, "MOVC  A, @A+DPTR");
  return 1;
}


x86 assembly (clang, -O0):
<disasm_movc_a_indir_a_dptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1030 <sprintf@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disasm_movc_a_indir_a_dptr>:
movups 0xef9(%rip),%xmm0
movups %xmm0,(%rdx)
movb   $0x0,0x10(%rdx)
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.em8051 = type { i32 }
@.str = [17 x i8] c"MOVC A, @A+DPTR\00"
define i32 @disasm_movc_a_indir_a_dptr(%struct.em8051* %0, i32 %1, i8* %2) {
%4 = alloca %struct.em8051*
%5 = alloca i32
%6 = alloca i8*
store %struct.em8051* %0, %struct.em8051** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = call i32 @sprintf(i8* %7, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
%struct.em8051 = type { i32 }
@.str = [17 x i8] c"MOVC A, @A+DPTR\00"
define i32 @disasm_movc_a_indir_a_dptr(%struct.em8051* nocapture readnone %0, i32 %1, i8* nocapture writeonly %2) {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(17) %2, i8* align 1 dereferenceable(17) getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i64 17, i1 false)
ret i32 1
}
__attribute__((noipa)) void bar(int a) {
  asm volatile("" : : "r"(a) : "memory");
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
ret

LLVM IR (-O0):
define void @bar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret void
}

LLVM IR (-O2):
define void @bar(i32 %0) {
tail call void asm sideeffect "", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret void
}
void XkbFreeGeomOutlines() {}


x86 assembly (clang, -O0):
<XkbFreeGeomOutlines>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XkbFreeGeomOutlines>:
ret

LLVM IR (-O0):
define void @XkbFreeGeomOutlines() {
ret void
}

LLVM IR (-O2):
define void @XkbFreeGeomOutlines() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ chmod(char *, unsigned long);
int /*<<< orphan*/ chown(char *, unsigned long, unsigned long);
int /*<<< orphan*/ mkdir(char *, unsigned long);
void add_new_directory(char *name, char *path, unsigned long uid,
                       unsigned long gid, unsigned long mode) {
  mkdir(path, mode);
  chown(path, uid, gid);
  chmod(path, mode);
}


x86 assembly (clang, -O0):
<add_new_directory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x28(%rbp),%rsi
call   1030 <mkdir@plt>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1040 <chown@plt>
mov    -0x10(%rbp),%rdi
mov    -0x28(%rbp),%rsi
call   1050 <chmod@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_new_directory>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %r8,%r12
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rsi,%rbx
mov    %rsi,%rdi
mov    %r8,%rsi
call   1030 <mkdir@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
call   1040 <chown@plt>
mov    %rbx,%rdi
mov    %r12,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1050 <chmod@plt>

LLVM IR (-O0):
define void @add_new_directory(i8* %0, i8* %1, i64 %2, i64 %3, i64 %4) {
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
store i8* %0, i8** %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i64 %3, i64* %9
store i64 %4, i64* %10
%11 = load i8*, i8** %7
%12 = load i64, i64* %10
%13 = call i32 @mkdir(i8* %11, i64 %12)
%14 = load i8*, i8** %7
%15 = load i64, i64* %8
%16 = load i64, i64* %9
%17 = call i32 @chown(i8* %14, i64 %15, i64 %16)
%18 = load i8*, i8** %7
%19 = load i64, i64* %10
%20 = call i32 @chmod(i8* %18, i64 %19)
ret void
}

LLVM IR (-O2):
define void @add_new_directory(i8* nocapture readnone %0, i8* nocapture %1, i64 %2, i64 %3, i64 %4) {
%6 = tail call i32 @mkdir(i8* %1, i64 %4)
%7 = tail call i32 @chown(i8* %1, i64 %2, i64 %3)
%8 = tail call i32 @chmod(i8* %1, i64 %4)
ret void
}
int read_data_rain() {}


x86 assembly (clang, -O0):
<read_data_rain>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_data_rain>:
ret

LLVM IR (-O0):
define i32 @read_data_rain() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @read_data_rain() {
ret i32 undef
}
void TimerForcedOC4Configure(unsigned long ulBase,
                             unsigned long ulForcedAction) {
  unsigned long ulTempccmr2 = 0;

  ;

  ;
  ulTempccmr2 = (*((volatile unsigned long *)(ulBase + 0x0000001C)));
  ulTempccmr2 &= ~0x00007000;
  ulTempccmr2 |= (ulForcedAction << 8);
  (*((volatile unsigned long *)(ulBase + 0x0000001C))) = ulTempccmr2;
}


x86 assembly (clang, -O0):
<TimerForcedOC4Configure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x1c(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
and    $0xffffffffffff8fff,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x8,%rax
or     -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x1c(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerForcedOC4Configure>:
mov    $0xffffffffffff8fff,%rax
and    0x1c(%rdi),%rax
shl    $0x8,%rsi
or     %rax,%rsi
mov    %rsi,0x1c(%rdi)
ret

LLVM IR (-O0):
define void @TimerForcedOC4Configure(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
store i64 0, i64* %5
%6 = load i64, i64* %3
%7 = add i64 %6, 28
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = and i64 %10, -28673
store i64 %11, i64* %5
%12 = load i64, i64* %4
%13 = shl i64 %12, 8
%14 = load i64, i64* %5
%15 = or i64 %14, %13
store i64 %15, i64* %5
%16 = load i64, i64* %5
%17 = load i64, i64* %3
%18 = add i64 %17, 28
%19 = inttoptr i64 %18 to i64*
store volatile i64 %16, i64* %19
ret void
}

LLVM IR (-O2):
define void @TimerForcedOC4Configure(i64 %0, i64 %1) {
%3 = add i64 %0, 28
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, -28673
%7 = shl i64 %1, 8
%8 = or i64 %6, %7
store volatile i64 %8, i64* %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ Delay(int /*<<< orphan*/);
int /*<<< orphan*/ led_off(int /*<<< orphan*/);
int /*<<< orphan*/ led_on(int /*<<< orphan*/);
void pulsoLed(uint8_t led, uint32_t tiempo) {
  led_on(led);
  Delay(tiempo);
  led_off(led);
}


x86 assembly (clang, -O0):
<pulsoLed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <led_on@plt>
mov    -0x8(%rbp),%edi
call   1030 <Delay@plt>
mov    -0x4(%rbp),%edi
call   1040 <led_off@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pulsoLed>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1050 <led_on@plt>
mov    %ebx,%edi
call   1030 <Delay@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <led_off@plt>

LLVM IR (-O0):
define void @pulsoLed(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @led_on(i32 %5)
%7 = load i32, i32* %4
%8 = call i32 @Delay(i32 %7)
%9 = load i32, i32* %3
%10 = call i32 @led_off(i32 %9)
ret void
}

LLVM IR (-O2):
define void @pulsoLed(i32 %0, i32 %1) {
%3 = tail call i32 @led_on(i32 %0)
%4 = tail call i32 @Delay(i32 %1)
%5 = tail call i32 @led_off(i32 %0)
ret void
}
int main(void) {
  int i = 3;
  --i;
  return ++i;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, -1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @main() {
ret i32 3
}
void cb_nop(void) {}


x86 assembly (clang, -O0):
<cb_nop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cb_nop>:
ret

LLVM IR (-O0):
define void @cb_nop() {
ret void
}

LLVM IR (-O2):
define void @cb_nop() {
ret void
}
/* Variables and functions */
bool nrf52_errata_164(void) { return false; }


x86 assembly (clang, -O0):
<nrf52_errata_164>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf52_errata_164>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf52_errata_164() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf52_errata_164() {
ret i32 0
}
void pthread_cond_broadcast() {}


x86 assembly (clang, -O0):
<pthread_cond_broadcast>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cond_broadcast>:
ret

LLVM IR (-O0):
define void @pthread_cond_broadcast() {
ret void
}

LLVM IR (-O2):
define void @pthread_cond_broadcast() {
ret void
}
void BN_value_one(void) {}


x86 assembly (clang, -O0):
<BN_value_one>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_value_one>:
ret

LLVM IR (-O0):
define void @BN_value_one() {
ret void
}

LLVM IR (-O2):
define void @BN_value_one() {
ret void
}