#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
unsigned int UARTRegConfigModeEnable(unsigned int, int);
void UARTIntDisable(unsigned int baseAdd, unsigned int intFlag) {
  unsigned int enhanFnBitVal = 0;
  unsigned int lcrRegValue = 0;
  lcrRegValue = UARTRegConfigModeEnable(baseAdd, (0x00BF));
  enhanFnBitVal =
      (*((volatile unsigned int *)(baseAdd + (0x8)))) & (0x00000010u);
  (*((volatile unsigned int *)(baseAdd + (0x8)))) |= (0x00000010u);
  UARTRegConfigModeEnable(baseAdd, (0x007F));
  (*((volatile unsigned int *)(baseAdd + (0x4)))) &= ~(intFlag & 0xFF);
  UARTRegConfigModeEnable(baseAdd, (0x00BF));
  (*((volatile unsigned int *)(baseAdd + (0x8)))) &= ~((0x00000010u));
  (*((volatile unsigned int *)(baseAdd + (0x8)))) |= enhanFnBitVal;
  (*((volatile unsigned int *)(baseAdd + (0xC)))) = lcrRegValue;
}


x86 assembly (clang, -O0):
<UARTIntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xbf,%esi
call   1030 <UARTRegConfigModeEnable@plt>
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    $0x8,%eax
mov    %eax,%eax
mov    (%rax),%eax
and    $0x10,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    $0x8,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     $0x10,%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%edi
mov    $0x7f,%esi
call   1030 <UARTRegConfigModeEnable@plt>
mov    -0x8(%rbp),%edx
and    $0xff,%edx
xor    $0xffffffff,%edx
mov    -0x4(%rbp),%eax
add    $0x4,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%edi
mov    $0xbf,%esi
call   1030 <UARTRegConfigModeEnable@plt>
mov    -0x4(%rbp),%eax
add    $0x8,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xffffffef,%ecx
mov    %ecx,(%rax)
mov    -0xc(%rbp),%edx
mov    -0x4(%rbp),%eax
add    $0x8,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0xc,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTIntDisable>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %esi,%ebp
mov    %edi,%ebx
not    %ebp
mov    $0xbf,%esi
call   1030 <UARTRegConfigModeEnable@plt>
mov    %eax,%r14d
lea    0x8(%rbx),%r15d
mov    (%r15),%r12d
and    $0x10,%r12d
orl    $0x10,(%r15)
mov    %ebx,%edi
mov    $0x7f,%esi
call   1030 <UARTRegConfigModeEnable@plt>
or     $0xffffff00,%ebp
lea    0x4(%rbx),%eax
and    %ebp,(%rax)
mov    %ebx,%edi
mov    $0xbf,%esi
call   1030 <UARTRegConfigModeEnable@plt>
andl   $0xffffffef,(%r15)
or     %r12d,(%r15)
add    $0xc,%ebx
mov    %r14d,(%rbx)
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @UARTIntDisable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
%7 = load i32, i32* %3
%8 = call i32 @UARTRegConfigModeEnable(i32 %7, i32 191)
store i32 %8, i32* %6
%9 = load i32, i32* %3
%10 = add i32 %9, 8
%11 = zext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
%14 = and i32 %13, 16
store i32 %14, i32* %5
%15 = load i32, i32* %3
%16 = add i32 %15, 8
%17 = zext i32 %16 to i64
%18 = inttoptr i64 %17 to i32*
%19 = load volatile i32, i32* %18
%20 = or i32 %19, 16
store volatile i32 %20, i32* %18
%21 = load i32, i32* %3
%22 = call i32 @UARTRegConfigModeEnable(i32 %21, i32 127)
%23 = load i32, i32* %4
%24 = and i32 %23, 255
%25 = xor i32 %24, -1
%26 = load i32, i32* %3
%27 = add i32 %26, 4
%28 = zext i32 %27 to i64
%29 = inttoptr i64 %28 to i32*
%30 = load volatile i32, i32* %29
%31 = and i32 %30, %25
store volatile i32 %31, i32* %29
%32 = load i32, i32* %3
%33 = call i32 @UARTRegConfigModeEnable(i32 %32, i32 191)
%34 = load i32, i32* %3
%35 = add i32 %34, 8
%36 = zext i32 %35 to i64
%37 = inttoptr i64 %36 to i32*
%38 = load volatile i32, i32* %37
%39 = and i32 %38, -17
store volatile i32 %39, i32* %37
%40 = load i32, i32* %5
%41 = load i32, i32* %3
%42 = add i32 %41, 8
%43 = zext i32 %42 to i64
%44 = inttoptr i64 %43 to i32*
%45 = load volatile i32, i32* %44
%46 = or i32 %45, %40
store volatile i32 %46, i32* %44
%47 = load i32, i32* %6
%48 = load i32, i32* %3
%49 = add i32 %48, 12
%50 = zext i32 %49 to i64
%51 = inttoptr i64 %50 to i32*
store volatile i32 %47, i32* %51
ret void
}

LLVM IR (-O2):
define void @UARTIntDisable(i32 %0, i32 %1) {
%3 = tail call i32 @UARTRegConfigModeEnable(i32 %0, i32 191)
%4 = add i32 %0, 8
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, 16
%9 = load volatile i32, i32* %6
%10 = or i32 %9, 16
store volatile i32 %10, i32* %6
%11 = tail call i32 @UARTRegConfigModeEnable(i32 %0, i32 127)
%12 = and i32 %1, 255
%13 = xor i32 %12, -1
%14 = add i32 %0, 4
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = and i32 %17, %13
store volatile i32 %18, i32* %16
%19 = tail call i32 @UARTRegConfigModeEnable(i32 %0, i32 191)
%20 = load volatile i32, i32* %6
%21 = and i32 %20, -17
store volatile i32 %21, i32* %6
%22 = load volatile i32, i32* %6
%23 = or i32 %22, %8
store volatile i32 %23, i32* %6
%24 = add i32 %0, 12
%25 = zext i32 %24 to i64
%26 = inttoptr i64 %25 to i32*
store volatile i32 %3, i32* %26
ret void
}