xunge/DecIR huggingface dataset:
void fakeClStageFailed(int stage, long errorCode) {}


x86 assembly (clang, -O0):
<fakeClStageFailed>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fakeClStageFailed>:
ret

LLVM IR (-O0):
define void @fakeClStageFailed(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
store i32 %0, i32* %3
store i64 %1, i64* %4
ret void
}

LLVM IR (-O2):
define void @fakeClStageFailed(i32 %0, i64 %1) {
ret void
}
void Set_Node(int *array, int offset, int data) { array[offset - 1] = data; }


x86 assembly (clang, -O0):
<Set_Node>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Set_Node>:
movslq %esi,%rax
mov    %edx,-0x4(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @Set_Node(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sub nsw i32 %9, 1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %8, i64 %11
store i32 %7, i32* %12
ret void
}

LLVM IR (-O2):
define void @Set_Node(i32* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, -1
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds i32, i32* %0, i64 %5
store i32 %2, i32* %6
ret void
}
void memcg_unregister_cache(struct kmem_cache *s) {}


x86 assembly (clang, -O0):
<memcg_unregister_cache>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<memcg_unregister_cache>:
ret

LLVM IR (-O0):
%struct.kmem_cache = type opaque
define void @memcg_unregister_cache(%struct.kmem_cache* %0) {
%2 = alloca %struct.kmem_cache*
store %struct.kmem_cache* %0, %struct.kmem_cache** %2
ret void
}

LLVM IR (-O2):
%struct.kmem_cache = type opaque
define void @memcg_unregister_cache(%struct.kmem_cache* nocapture %0) {
ret void
}
void I422ToRGB24Row_Any_AVX2() {}


x86 assembly (clang, -O0):
<I422ToRGB24Row_Any_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I422ToRGB24Row_Any_AVX2>:
ret

LLVM IR (-O0):
define void @I422ToRGB24Row_Any_AVX2() {
ret void
}

LLVM IR (-O2):
define void @I422ToRGB24Row_Any_AVX2() {
ret void
}
/* Variables and functions */
int *malloc(int);
void f(void) {
  int *x = malloc(10 * sizeof(int));
  x[10] = 10;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x28,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0xa,0x28(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x28,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define void @f() {
%1 = alloca i32*
%2 = call i32* @malloc(i32 40)
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = getelementptr inbounds i32, i32* %3, i64 10
store i32 10, i32* %4
ret void
}

LLVM IR (-O2):
define void @f() {
%1 = tail call i32* @malloc(i32 40)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ strcpy(char *, char *);
int strlen(char *);
char *string_copy(char *str) {
  char *copy = NULL;
  if (str != NULL) {
    copy = (char *)malloc(sizeof(char) * strlen(str));
    strcpy(copy, str);
  }
  return copy;
}


x86 assembly (clang, -O0):
<string_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1176 <string_copy+0x46>
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_copy>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     1158 <string_copy+0x28>
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,%r14
mov    %rax,%rdi
mov    %rbx,%rsi
call   1030 <strcpy@plt>
jmp    115b <string_copy+0x2b>
xor    %r14d,%r14d
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @string_copy(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %3
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %17
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @strlen(i8* %7)
%9 = sext i32 %8 to i64
%10 = mul i64 1, %9
%11 = trunc i64 %10 to i32
%12 = call i64 @malloc(i32 %11)
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** %3
%14 = load i8*, i8** %3
%15 = load i8*, i8** %2
%16 = call i32 @strcpy(i8* %14, i8* %15)
br label %17
17: ; preds = %6, %1
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @string_copy(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i32 @strlen(i8* %0)
%5 = tail call i64 @malloc(i32 %4)
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 @strcpy(i8* %6, i8* %0)
br label %8
8: ; preds = %3, %1
%9 = phi i8* [ %6, %3 ], [ null, %1 ]
ret i8* %9
}
int inside_gamut(float r, float g, float b) {
  return (r >= 0) && (g >= 0) && (b >= 0);
}


x86 assembly (clang, -O0):
<inside_gamut>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
xor    %eax,%eax
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
mov    %al,-0xd(%rbp)
jb     1150 <inside_gamut+0x50>
movss  -0x8(%rbp),%xmm0
xor    %eax,%eax
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
mov    %al,-0xd(%rbp)
jb     1150 <inside_gamut+0x50>
movss  -0xc(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
setae  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inside_gamut>:
xorps  %xmm3,%xmm3
ucomiss %xmm3,%xmm0
setae  %al
ucomiss %xmm3,%xmm1
setae  %cl
and    %al,%cl
ucomiss %xmm3,%xmm2
setae  %al
and    %cl,%al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @inside_gamut(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = fcmp oge float %7, 0.000000e+00
br i1 %8, label %9, label %15
9: ; preds = %3
%10 = load float, float* %5
%11 = fcmp oge float %10, 0.000000e+00
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load float, float* %6
%14 = fcmp oge float %13, 0.000000e+00
br label %15
15: ; preds = %12, %9, %3
%16 = phi i1 [ false, %9 ], [ false, %3 ], [ %14, %12 ]
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @inside_gamut(float %0, float %1, float %2) {
%4 = fcmp oge float %0, 0.000000e+00
%5 = fcmp oge float %1, 0.000000e+00
%6 = and i1 %4, %5
%7 = fcmp oge float %2, 0.000000e+00
%8 = and i1 %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
scalar_t__ isPrime(int);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ scanf(char *, int *);
int main(int argc, char *argv[]) {
  int a;
  scanf("%i", &a);
  printf("%s", isPrime(a) ? "\\t" : "\\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeb3(%rip),%rdi
lea    -0x14(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x14(%rbp),%edi
call   1040 <isPrime@plt>
mov    %rax,%rcx
lea    0xea1(%rip),%rsi
lea    0xe97(%rip),%rax
cmp    $0x0,%rcx
cmovne %rax,%rsi
lea    0xe85(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1040 <isPrime@plt>
test   %rax,%rax
lea    0xeb4(%rip),%rax
lea    0xeaa(%rip),%rsi
cmove  %rax,%rsi
lea    0xe9c(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%i\00"
@.str.1 = [3 x i8] c"%s\00"
@.str.2 = [3 x i8] c"\\t\00"
@.str.3 = [3 x i8] c"\\n\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %6)
%8 = load i32, i32* %6
%9 = call i64 @isPrime(i32 %8)
%10 = icmp ne i64 %9, 0
%11 = zext i1 %10 to i64
%12 = select i1 %10, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.3, i64 0, i64 0)
%13 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%i\00"
@.str.1 = [3 x i8] c"%s\00"
@.str.2 = [3 x i8] c"\\t\00"
@.str.3 = [3 x i8] c"\\n\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %3
%7 = call i64 @isPrime(i32 %6)
%8 = icmp eq i64 %7, 0
%9 = select i1 %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.3, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i64 0, i64 0)
%10 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %9)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ wdctl_command(int);
void wdctl_add_trusted_iplist(void) { wdctl_command(21); }


x86 assembly (clang, -O0):
<wdctl_add_trusted_iplist>:
push   %rbp
mov    %rsp,%rbp
mov    $0x15,%edi
call   1030 <wdctl_command@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<wdctl_add_trusted_iplist>:
mov    $0x15,%edi
jmp    1030 <wdctl_command@plt>

LLVM IR (-O0):
define void @wdctl_add_trusted_iplist() {
%1 = call i32 @wdctl_command(i32 21)
ret void
}

LLVM IR (-O2):
define void @wdctl_add_trusted_iplist() {
%1 = tail call i32 @wdctl_command(i32 21)
ret void
}
/* Variables and functions */
scalar_t__ cbrt(double);
float cbrtf(float s) { return (float)cbrt((double)s); }


x86 assembly (clang, -O0):
<cbrtf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
call   1030 <cbrt@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbrtf>:
push   %rax
cvtss2sd %xmm0,%xmm0
call   1030 <cbrt@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @cbrtf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = call i64 @cbrt(double %4)
%6 = sitofp i64 %5 to float
ret float %6
}

LLVM IR (-O2):
define float @cbrtf(float %0) {
%2 = fpext float %0 to double
%3 = tail call i64 @cbrt(double %2)
%4 = sitofp i64 %3 to float
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ sesc_fast_sim_end();
void sesc_fast_sim_end_() { sesc_fast_sim_end(); }


x86 assembly (clang, -O0):
<sesc_fast_sim_end_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sesc_fast_sim_end@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sesc_fast_sim_end_>:
xor    %eax,%eax
jmp    1030 <sesc_fast_sim_end@plt>

LLVM IR (-O0):
define void @sesc_fast_sim_end_() {
%1 = call i32 (...) @sesc_fast_sim_end()
ret void
}

LLVM IR (-O2):
define void @sesc_fast_sim_end_() {
%1 = tail call i32 (...) @sesc_fast_sim_end()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(unsigned long, unsigned char, int);
int /*<<< orphan*/ GPIOPadConfigSet(unsigned long, unsigned char, int, int);
void GPIOPinTypeUART(unsigned long ulPort, unsigned char ucPins) {
  ;
  GPIODirModeSet(ulPort, ucPins, 0x00000002);
  GPIOPadConfigSet(ulPort, ucPins, 0x00000001, 0x00000008);
}


x86 assembly (clang, -O0):
<GPIOPinTypeUART>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2,%edx
movzbl -0x9(%rbp),%esi
call   1040 <GPIODirModeSet@plt>
mov    -0x8(%rbp),%rdi
mov    $0x1,%edx
mov    $0x8,%ecx
movzbl -0x9(%rbp),%esi
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeUART>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    $0x1,%edx
mov    $0x8,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeUART(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
store i64 %0, i64* %3
store i8 %1, i8* %4
%5 = load i64, i64* %3
%6 = load i8, i8* %4
%7 = call i32 @GPIODirModeSet(i64 %5, i8 zeroext %6, i32 2)
%8 = load i64, i64* %3
%9 = load i8, i8* %4
%10 = call i32 @GPIOPadConfigSet(i64 %8, i8 zeroext %9, i32 1, i32 8)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeUART(i64 %0, i8 zeroext %1) {
%3 = tail call i32 @GPIODirModeSet(i64 %0, i8 zeroext %1, i32 2)
%4 = tail call i32 @GPIOPadConfigSet(i64 %0, i8 zeroext %1, i32 1, i32 8)
ret void
}
/* Variables and functions */
float expf(float);
float HMM_ExpF(float Float) {
  float Result = expf(Float);
  return (Result);
}


x86 assembly (clang, -O0):
<HMM_ExpF>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <expf@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HMM_ExpF>:
jmp    1030 <expf@plt>

LLVM IR (-O0):
define float @HMM_ExpF(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = call float @expf(float %4)
store float %5, float* %3
%6 = load float, float* %3
ret float %6
}

LLVM IR (-O2):
define float @HMM_ExpF(float %0) {
%2 = tail call float @expf(float %0)
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ write(int, char *, int);
void ft_putchar(char c) {
  write(1, &c, 1);
  return;
}


x86 assembly (clang, -O0):
<ft_putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x1,%edx
lea    -0x1(%rbp),%rsi
mov    %edx,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putchar>:
push   %rax
mov    %dil,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @ft_putchar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @write(i32 1, i8* %2, i32 1)
ret void
}

LLVM IR (-O2):
define void @ft_putchar(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @write(i32 1, i8* %2, i32 1)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ window;
};
typedef TYPE_1__ XCreateWindowEvent;

/* Variables and functions */
unsigned long get_XCreateWindowEvent_window(void *_p) {
  return (unsigned long)((XCreateWindowEvent *)_p)->window;
}


x86 assembly (clang, -O0):
<get_XCreateWindowEvent_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XCreateWindowEvent_window>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XCreateWindowEvent_window(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XCreateWindowEvent_window(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
int fun743() { return 743; }


x86 assembly (clang, -O0):
<fun743>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2e7,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun743>:
mov    $0x2e7,%eax
ret

LLVM IR (-O0):
define i32 @fun743() {
ret i32 743
}

LLVM IR (-O2):
define i32 @fun743() {
ret i32 743
}
int bleInstruction(int i, int j) { return (i <= j) ? 1 : 0; }


x86 assembly (clang, -O0):
<bleInstruction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%esi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmovle %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bleInstruction>:
xor    %eax,%eax
cmp    %esi,%edi
setle  %al
ret

LLVM IR (-O0):
define i32 @bleInstruction(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sle i32 %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 1, i32 0
ret i32 %9
}

LLVM IR (-O2):
define i32 @bleInstruction(i32 %0, i32 %1) {
%3 = icmp sle i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int y;
  int z = y * 2;
  int x = z * 10;
  printf("x = %d\n", x);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
imul   $0xa,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"x = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = load i32, i32* %1
%5 = mul nsw i32 %4, 2
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = mul nsw i32 %6, 10
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"x = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 0)
ret i32 0
}
void handler(void) {}


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler>:
ret

LLVM IR (-O0):
define void @handler() {
ret void
}

LLVM IR (-O2):
define void @handler() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ close_archive();
int /*<<< orphan*/ dump_file(char *, int);
int /*<<< orphan*/ name_close();
char *name_next();
int /*<<< orphan*/ open_archive(int /*<<< orphan*/);
int /*<<< orphan*/ write_eot();
void create_archive() {
  register char *p;
  open_archive(0);
  while (p = name_next()) {
    dump_file(p, -1);
  }
  write_eot();
  close_archive();
  name_close();
}


x86 assembly (clang, -O0):
<create_archive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
call   1080 <open_archive@plt>
mov    $0x0,%al
call   1060 <name_next@plt>
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
je     1197 <create_archive+0x37>
mov    -0x8(%rbp),%rdi
mov    $0xffffffff,%esi
call   1040 <dump_file@plt>
jmp    116f <create_archive+0xf>
mov    $0x0,%al
call   1070 <write_eot@plt>
mov    $0x0,%al
call   1030 <close_archive@plt>
mov    $0x0,%al
call   1050 <name_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_archive>:
push   %rax
xor    %edi,%edi
call   1080 <open_archive@plt>
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1060 <name_next@plt>
test   %rax,%rax
je     118b <create_archive+0x2b>
mov    %rax,%rdi
mov    $0xffffffff,%esi
call   1040 <dump_file@plt>
jmp    1170 <create_archive+0x10>
xor    %eax,%eax
call   1070 <write_eot@plt>
xor    %eax,%eax
call   1030 <close_archive@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <name_close@plt>

LLVM IR (-O0):
define void @create_archive() {
%1 = alloca i8*
%2 = call i32 @open_archive(i32 0)
br label %3
3: ; preds = %6, %0
%4 = call i8* (...) @name_next()
store i8* %4, i8** %1
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i8*, i8** %1
%8 = call i32 @dump_file(i8* %7, i32 -1)
br label %3
9: ; preds = %3
%10 = call i32 (...) @write_eot()
%11 = call i32 (...) @close_archive()
%12 = call i32 (...) @name_close()
ret void
}

LLVM IR (-O2):
define void @create_archive() {
%1 = tail call i32 @open_archive(i32 0)
%2 = tail call i8* (...) @name_next()
%3 = icmp eq i8* %2, null
br i1 %3, label %9, label %4
4: ; preds = %0, %4
%5 = phi i8* [ %7, %4 ], [ %2, %0 ]
%6 = tail call i32 @dump_file(i8* %5, i32 -1)
%7 = tail call i8* (...) @name_next()
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %4
9: ; preds = %4, %0
%10 = tail call i32 (...) @write_eot()
%11 = tail call i32 (...) @close_archive()
%12 = tail call i32 (...) @name_close()
ret void
}
/* Variables and functions */
double fmod(double, double);
double gcd(double u, double v) {
  while (v > 0.0) {
    double temp = v;
    v = fmod(u, v);
    u = temp;
  }
  return u;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1161 <gcd+0x51>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <fmod@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1122 <gcd+0x12>
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
push   %rax
xorpd  %xmm2,%xmm2
ucomisd %xmm2,%xmm1
jbe    1143 <gcd+0x33>
nopl   0x0(%rax,%rax,1)
movsd  %xmm1,(%rsp)
call   1030 <fmod@plt>
xorpd  %xmm2,%xmm2
movapd %xmm0,%xmm1
ucomisd %xmm2,%xmm0
movsd  (%rsp),%xmm2
movapd %xmm2,%xmm0
ja     1120 <gcd+0x10>
jmp    1147 <gcd+0x37>
movapd %xmm0,%xmm2
movapd %xmm2,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @gcd(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
br label %6
6: ; preds = %9, %2
%7 = load double, double* %4
%8 = fcmp ogt double %7, 0.000000e+00
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load double, double* %4
store double %10, double* %5
%11 = load double, double* %3
%12 = load double, double* %4
%13 = call double @fmod(double %11, double %12)
store double %13, double* %4
%14 = load double, double* %5
store double %14, double* %3
br label %6
15: ; preds = %6
%16 = load double, double* %3
ret double %16
}

LLVM IR (-O2):
define double @gcd(double %0, double %1) {
%3 = fcmp ogt double %1, 0.000000e+00
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi double [ %6, %4 ], [ %0, %2 ]
%6 = phi double [ %7, %4 ], [ %1, %2 ]
%7 = tail call double @fmod(double %5, double %6)
%8 = fcmp ogt double %7, 0.000000e+00
br i1 %8, label %4, label %9
9: ; preds = %4, %2
%10 = phi double [ %0, %2 ], [ %6, %4 ]
ret double %10
}
/* Variables and functions */
int memcmp(unsigned char *, char *, int);
int valid_tpg_header(char *header, int len) {
  unsigned char header_bytes[] = {0xFF, 0xFF, 0x01, 0x00, 0x0D, 0x00, 0x43,
                                  0x54, 0x6F, 0x70, 0x6F, 0x57, 0x61, 0x79,
                                  0x70, 0x6F, 0x69, 0x6E, 0x74};
  if (len != 19) {
    return (-1);
  }
  return memcmp(header_bytes, header, len);
}


x86 assembly (clang, -O0):
<valid_tpg_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xed4(%rip),%ax
mov    %ax,-0x20(%rbp)
mov    0xecc(%rip),%al
mov    %al,-0x1e(%rbp)
cmpl   $0x13,-0x14(%rbp)
je     115f <valid_tpg_header+0x4f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1172 <valid_tpg_header+0x62>
lea    -0x30(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <memcmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid_tpg_header>:
sub    $0x18,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,(%rsp)
movl   $0x746e696f,0xf(%rsp)
74
mov    $0xffffffff,%eax
cmp    $0x13,%esi
jne    1144 <valid_tpg_header+0x34>
mov    %rdi,%rcx
mov    %rsp,%rdi
mov    %rcx,%rsi
mov    $0x13,%edx
call   1030 <memcmp@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.valid_tpg_header.header_bytes = [19 x i8] c"\FF\FF\01\00\0D\00CTopoWaypoint"
define i32 @valid_tpg_header(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca [19 x i8]
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = bitcast [19 x i8]* %6 to i8*
%8 = load i32, i32* %5
%9 = icmp ne i32 %8, 19
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 -1, i32* %3
br label %16
11: ; preds = %2
%12 = getelementptr inbounds [19 x i8], [19 x i8]* %6, i64 0, i64 0
%13 = load i8*, i8** %4
%14 = load i32, i32* %5
%15 = call i32 @memcmp(i8* %12, i8* %13, i32 %14)
store i32 %15, i32* %3
br label %16
16: ; preds = %11, %10
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@__const.valid_tpg_header.header_bytes = [19 x i8] c"\FF\FF\01\00\0D\00CTopoWaypoint"
define i32 @valid_tpg_header(i8* %0, i32 %1) {
%3 = alloca [19 x i8]
%4 = getelementptr inbounds [19 x i8], [19 x i8]* %3, i64 0, i64 0
%5 = icmp eq i32 %1, 19
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = call i32 @memcmp(i8* %4, i8* %0, i32 19)
br label %8
8: ; preds = %2, %6
%9 = phi i32 [ %7, %6 ], [ -1, %2 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ genrand_real1();
int pow(int /*<<< orphan*/, double);
int tri_randint(int a, int b) {
  return (int)(a + pow(genrand_real1(), 0.5) * (b - a));
}


x86 assembly (clang, -O0):
<tri_randint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1040 <genrand_real1@plt>
mov    %eax,%edi
movsd  0xebb(%rip),%xmm0
call   1030 <pow@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%edx
sub    -0x4(%rbp),%edx
imul   %edx,%ecx
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tri_randint>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1040 <genrand_real1@plt>
movsd  0xeca(%rip),%xmm0
mov    %eax,%edi
call   1030 <pow@plt>
sub    %ebp,%ebx
imul   %ebx,%eax
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @tri_randint(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 (...) @genrand_real1()
%7 = call i32 @pow(i32 %6, double 5.000000e-01)
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = sub nsw i32 %8, %9
%11 = mul nsw i32 %7, %10
%12 = add nsw i32 %5, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @tri_randint(i32 %0, i32 %1) {
%3 = tail call i32 (...) @genrand_real1()
%4 = tail call i32 @pow(i32 %3, double 5.000000e-01)
%5 = sub nsw i32 %1, %0
%6 = mul nsw i32 %4, %5
%7 = add nsw i32 %6, %0
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ open_rx_socket(int *, int const);
int /*<<< orphan*/ open_tx_socket(int *, int const);
void open_sockets(int *tx_sockfd, int *rx_sockfd, const int ifindex) {
  open_tx_socket(tx_sockfd, ifindex);
  open_rx_socket(rx_sockfd, ifindex);
}


x86 assembly (clang, -O0):
<open_sockets>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <open_tx_socket@plt>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <open_rx_socket@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_sockets>:
push   %r14
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %rsi,%r14
mov    %edx,%esi
call   1030 <open_tx_socket@plt>
mov    %r14,%rdi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <open_rx_socket@plt>

LLVM IR (-O0):
define void @open_sockets(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %6
%9 = call i32 @open_tx_socket(i32* %7, i32 %8)
%10 = load i32*, i32** %5
%11 = load i32, i32* %6
%12 = call i32 @open_rx_socket(i32* %10, i32 %11)
ret void
}

LLVM IR (-O2):
define void @open_sockets(i32* %0, i32* %1, i32 %2) {
%4 = tail call i32 @open_tx_socket(i32* %0, i32 %2)
%5 = tail call i32 @open_rx_socket(i32* %1, i32 %2)
ret void
}
int av_attach_fb(void) { return 0; }


x86 assembly (clang, -O0):
<av_attach_fb>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_attach_fb>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @av_attach_fb() {
ret i32 0
}

LLVM IR (-O2):
define i32 @av_attach_fb() {
ret i32 0
}
int comp_int_f(const void *a_, const void *b_) {
  int a = *(int *)a_;
  int b = *(int *)b_;
  return a > b ? 1 : (a == b ? 0 : -1);
}


x86 assembly (clang, -O0):
<comp_int_f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jle    1137 <comp_int_f+0x37>
mov    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    114c <comp_int_f+0x4c>
mov    -0x14(%rbp),%edx
mov    -0x18(%rbp),%esi
mov    $0xffffffff,%eax
xor    %ecx,%ecx
cmp    %esi,%edx
cmove  %ecx,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<comp_int_f>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
xor    %edx,%edx
cmp    %ecx,%eax
setne  %dl
neg    %edx
cmp    %ecx,%eax
mov    $0x1,%eax
cmovle %edx,%eax
ret

LLVM IR (-O0):
define i32 @comp_int_f(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
%9 = load i32, i32* %8
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load i32, i32* %11
store i32 %12, i32* %6
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = icmp sgt i32 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %2
br label %23
17: ; preds = %2
%18 = load i32, i32* %5
%19 = load i32, i32* %6
%20 = icmp eq i32 %18, %19
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 0, i32 -1
br label %23
23: ; preds = %17, %16
%24 = phi i32 [ 1, %16 ], [ %22, %17 ]
ret i32 %24
}

LLVM IR (-O2):
define i32 @comp_int_f(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = icmp sgt i32 %4, %6
%8 = icmp ne i32 %4, %6
%9 = sext i1 %8 to i32
%10 = select i1 %7, i32 1, i32 %9
ret i32 %10
}
int gcd(int p, int q) {
  int r;
  while (q > 0) {
    r = p % q;
    p = q;
    q = r;
  }
  return p;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    112f <gcd+0x2f>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    110a <gcd+0xa>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
test   %esi,%esi
jle    111d <gcd+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jg     1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = srem i32 %10, %11
store i32 %12, i32* %5
%13 = load i32, i32* %4
store i32 %13, i32* %3
%14 = load i32, i32* %5
store i32 %14, i32* %4
br label %6
15: ; preds = %6
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %0, %2 ]
%6 = phi i32 [ %7, %4 ], [ %1, %2 ]
%7 = srem i32 %5, %6
%8 = icmp sgt i32 %7, 0
br i1 %8, label %4, label %9
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %6, %4 ]
ret i32 %10
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
uint16_t LCDIDDDataRead(uint32_t ui32Base, uint32_t ui32CS) {
  uint32_t ui32Reg;
  ;
  ;
  ui32Reg = ui32CS ? 0x00000024 : 0x00000018;
  return ((uint16_t)(*((volatile unsigned long *)(ui32Base + ui32Reg))));
}


x86 assembly (clang, -O0):
<LCDIDDDataRead>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edx
mov    $0x18,%eax
mov    $0x24,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0xc(%rbp),%eax
cltq
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDIDDDataRead>:
test   %esi,%esi
mov    $0x18,%eax
mov    $0x24,%ecx
cmove  %eax,%ecx
movslq %edi,%rax
mov    (%rcx,%rax,1),%rax
ret

LLVM IR (-O0):
define i32 @LCDIDDDataRead(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 36, i32 24
store i32 %9, i32* %5
%10 = load i32, i32* %3
%11 = load i32, i32* %5
%12 = add nsw i32 %10, %11
%13 = sext i32 %12 to i64
%14 = inttoptr i64 %13 to i64*
%15 = load volatile i64, i64* %14
%16 = trunc i64 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @LCDIDDDataRead(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = select i1 %3, i32 24, i32 36
%5 = add nsw i32 %4, %0
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = trunc i64 %8 to i32
ret i32 %9
}
float lerp(float a, float b, float f) { return a + f * (b - a); }


x86 assembly (clang, -O0):
<lerp>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movss  -0x8(%rbp),%xmm2
subss  -0x4(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<lerp>:
subss  %xmm0,%xmm1
mulss  %xmm2,%xmm1
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @lerp(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %6
%9 = load float, float* %5
%10 = load float, float* %4
%11 = fsub float %9, %10
%12 = call float @llvm.fmuladd.f32(float %8, float %11, float %7)
ret float %12
}

LLVM IR (-O2):
define float @lerp(float %0, float %1, float %2) {
%4 = fsub float %1, %0
%5 = tail call float @llvm.fmuladd.f32(float %2, float %4, float %0)
ret float %5
}
int num_deleted(int sid) {
  int c = 0;
  while (sid) {
    if (sid & 1)
      c++;
    sid = (sid >> 1);
  }
  return c;
}


x86 assembly (clang, -O0):
<num_deleted>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     113e <num_deleted+0x3e>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1130 <num_deleted+0x30>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <num_deleted+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_deleted>:
xor    %eax,%eax
test   %edi,%edi
je     1120 <num_deleted+0x20>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
sar    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <num_deleted+0x10>
ret

LLVM IR (-O0):
define i32 @num_deleted(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %7
%15 = load i32, i32* %2
%16 = ashr i32 %15, 1
store i32 %16, i32* %2
br label %4
17: ; preds = %4
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @num_deleted(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = add nuw nsw i32 %4, %6
%8 = ashr i32 %5, 1
%9 = icmp ult i32 %5, 2
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ gpio_write_data(int);
void operation_i2c_stop() {
  gpio_write_data((0 << 5) | (1 << 6));
  gpio_write_data((1 << 5) | (1 << 6));
}


x86 assembly (clang, -O0):
<operation_i2c_stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40,%edi
call   1030 <gpio_write_data@plt>
mov    $0x60,%edi
call   1030 <gpio_write_data@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<operation_i2c_stop>:
push   %rax
mov    $0x40,%edi
call   1030 <gpio_write_data@plt>
mov    $0x60,%edi
pop    %rax
jmp    1030 <gpio_write_data@plt>

LLVM IR (-O0):
define void @operation_i2c_stop() {
%1 = call i32 @gpio_write_data(i32 64)
%2 = call i32 @gpio_write_data(i32 96)
ret void
}

LLVM IR (-O2):
define void @operation_i2c_stop() {
%1 = tail call i32 @gpio_write_data(i32 64)
%2 = tail call i32 @gpio_write_data(i32 96)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Sys_FlushRange(long, long);
void arch_xtstore(long xt, long pdict) {
  xt -= pdict;
  xt -= 2 * sizeof(long);
  xt >>= 2;
  xt &= 0x00ffffff;
  xt |= 0xeb000000;
  *(long *)pdict = xt;
  Sys_FlushRange(pdict, pdict + 4);
}


x86 assembly (clang, -O0):
<arch_xtstore>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sub    $0x10,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x2,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xffffff,%rax
mov    %rax,-0x8(%rbp)
movabs $0xeb000000,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rsi
add    $0x4,%rsi
call   1030 <Sys_FlushRange@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arch_xtstore>:
mov    %rsi,%rax
sub    %eax,%edi
add    $0x3fffff0,%edi
shr    $0x2,%edi
and    $0xffffff,%edi
mov    $0xeb000000,%ecx
or     %rdi,%rcx
mov    %rcx,(%rsi)
add    $0x4,%rsi
mov    %rax,%rdi
jmp    1030 <Sys_FlushRange@plt>

LLVM IR (-O0):
define void @arch_xtstore(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = sub nsw i64 %6, %5
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = sub i64 %8, 16
store i64 %9, i64* %3
%10 = load i64, i64* %3
%11 = ashr i64 %10, 2
store i64 %11, i64* %3
%12 = load i64, i64* %3
%13 = and i64 %12, 16777215
store i64 %13, i64* %3
%14 = load i64, i64* %3
%15 = or i64 %14, 3942645760
store i64 %15, i64* %3
%16 = load i64, i64* %3
%17 = load i64, i64* %4
%18 = inttoptr i64 %17 to i64*
store i64 %16, i64* %18
%19 = load i64, i64* %4
%20 = load i64, i64* %4
%21 = add nsw i64 %20, 4
%22 = call i32 @Sys_FlushRange(i64 %19, i64 %21)
ret void
}

LLVM IR (-O2):
define void @arch_xtstore(i64 %0, i64 %1) {
%3 = add i64 %0, 67108848
%4 = sub i64 %3, %1
%5 = lshr i64 %4, 2
%6 = and i64 %5, 16777215
%7 = or i64 %6, 3942645760
%8 = inttoptr i64 %1 to i64*
store i64 %7, i64* %8
%9 = add nsw i64 %1, 4
%10 = tail call i32 @Sys_FlushRange(i64 %1, i64 %9)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_pike_comment_entities();
int /*<<< orphan*/ test_pike_comments();
void all_pike_tests() {
  test_pike_comments();
  test_pike_comment_entities();
}


x86 assembly (clang, -O0):
<all_pike_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <test_pike_comments@plt>
mov    $0x0,%al
call   1030 <test_pike_comment_entities@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_pike_tests>:
push   %rax
xor    %eax,%eax
call   1040 <test_pike_comments@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <test_pike_comment_entities@plt>

LLVM IR (-O0):
define void @all_pike_tests() {
%1 = call i32 (...) @test_pike_comments()
%2 = call i32 (...) @test_pike_comment_entities()
ret void
}

LLVM IR (-O2):
define void @all_pike_tests() {
%1 = tail call i32 (...) @test_pike_comments()
%2 = tail call i32 (...) @test_pike_comment_entities()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ set_gpio(int /*<<< orphan*/, int /*<<< orphan*/);
void gpio_input(uint8_t pin) { set_gpio(pin, 0); }


x86 assembly (clang, -O0):
<gpio_input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <set_gpio@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_input>:
xor    %esi,%esi
jmp    1030 <set_gpio@plt>

LLVM IR (-O0):
define void @gpio_input(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @set_gpio(i32 %3, i32 0)
ret void
}

LLVM IR (-O2):
define void @gpio_input(i32 %0) {
%2 = tail call i32 @set_gpio(i32 %0, i32 0)
ret void
}
/* Variables and functions */
int strcmp(char *, char *);
int strcmp_null_argument(char *a) {
  char *b = 0;
  return strcmp(a, b);
}


x86 assembly (clang, -O0):
<strcmp_null_argument>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp_null_argument>:
xor    %esi,%esi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @strcmp_null_argument(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
store i8* null, i8** %3
%4 = load i8*, i8** %2
%5 = load i8*, i8** %3
%6 = call i32 @strcmp(i8* %4, i8* %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @strcmp_null_argument(i8* nocapture %0) {
%2 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) null)
ret i32 %2
}
/* Variables and functions */
double pop();
int /*<<< orphan*/ push(double);
void stack_duplicate(void) {
  double tmp = pop();
  push(tmp);
  push(tmp);
}


x86 assembly (clang, -O0):
<stack_duplicate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <pop@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <push@plt>
movsd  -0x8(%rbp),%xmm0
call   1040 <push@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stack_duplicate>:
push   %rax
xor    %eax,%eax
call   1030 <pop@plt>
movsd  %xmm0,(%rsp)
call   1040 <push@plt>
movsd  (%rsp),%xmm0
pop    %rax
jmp    1040 <push@plt>

LLVM IR (-O0):
define void @stack_duplicate() {
%1 = alloca double
%2 = call double (...) @pop()
store double %2, double* %1
%3 = load double, double* %1
%4 = call i32 @push(double %3)
%5 = load double, double* %1
%6 = call i32 @push(double %5)
ret void
}

LLVM IR (-O2):
define void @stack_duplicate() {
%1 = tail call double (...) @pop()
%2 = tail call i32 @push(double %1)
%3 = tail call i32 @push(double %1)
ret void
}
/* Variables and functions */
int h2o__lcstris_core(char const *, char const *, size_t);
int h2o_lcstris(const char *target, size_t target_len, const char *test,
                size_t test_len) {
  if (target_len != test_len)
    return 0;
  return h2o__lcstris_core(target, test, test_len);
}


x86 assembly (clang, -O0):
<h2o_lcstris>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x28(%rbp),%rax
je     1142 <h2o_lcstris+0x32>
movl   $0x0,-0x4(%rbp)
jmp    1156 <h2o_lcstris+0x46>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rdx
call   1030 <h2o__lcstris_core@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h2o_lcstris>:
cmp    %rcx,%rsi
jne    1123 <h2o_lcstris+0x13>
mov    %rsi,%rax
mov    %rdx,%rsi
mov    %rax,%rdx
jmp    1030 <h2o__lcstris_core@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @h2o_lcstris(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i64
store i8* %0, i8** %6
store i64 %1, i64* %7
store i8* %2, i8** %8
store i64 %3, i64* %9
%10 = load i64, i64* %7
%11 = load i64, i64* %9
%12 = icmp ne i64 %10, %11
br i1 %12, label %13, label %14
13: ; preds = %4
store i32 0, i32* %5
br label %19
14: ; preds = %4
%15 = load i8*, i8** %6
%16 = load i8*, i8** %8
%17 = load i64, i64* %9
%18 = call i32 @h2o__lcstris_core(i8* %15, i8* %16, i64 %17)
store i32 %18, i32* %5
br label %19
19: ; preds = %14, %13
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @h2o_lcstris(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = icmp eq i64 %1, %3
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @h2o__lcstris_core(i8* %0, i8* %2, i64 %1)
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ %7, %6 ], [ 0, %4 ]
ret i32 %9
}
void devtotty(int dev, int *tty_maj, int *tty_min) {
  *tty_maj = (dev >> 8) & 0xfff;
  *tty_min = (dev & 0xff) | ((dev >> 12) & 0xfff00);
}


x86 assembly (clang, -O0):
<devtotty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xfff,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
mov    -0x4(%rbp),%eax
sar    $0xc,%eax
and    $0xfff00,%eax
or     %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<devtotty>:
mov    %edi,%eax
shr    $0x8,%eax
and    $0xfff,%eax
mov    %eax,(%rsi)
movzbl %dil,%eax
shr    $0xc,%edi
and    $0xfff00,%edi
or     %eax,%edi
mov    %edi,(%rdx)
ret

LLVM IR (-O0):
define void @devtotty(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = ashr i32 %7, 8
%9 = and i32 %8, 4095
%10 = load i32*, i32** %5
store i32 %9, i32* %10
%11 = load i32, i32* %4
%12 = and i32 %11, 255
%13 = load i32, i32* %4
%14 = ashr i32 %13, 12
%15 = and i32 %14, 1048320
%16 = or i32 %12, %15
%17 = load i32*, i32** %6
store i32 %16, i32* %17
ret void
}

LLVM IR (-O2):
define void @devtotty(i32 %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2) {
%4 = lshr i32 %0, 8
%5 = and i32 %4, 4095
store i32 %5, i32* %1
%6 = and i32 %0, 255
%7 = lshr i32 %0, 12
%8 = and i32 %7, 1048320
%9 = or i32 %8, %6
store i32 %9, i32* %2
ret void
}