xunge/DecIR huggingface dataset:
void addValueToPointers(int *ptrA, int *ptrB, int *value) {
  *ptrA += *value;
  *ptrB += *value;
}


x86 assembly (clang, -O0):
<addValueToPointers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<addValueToPointers>:
mov    (%rdx),%eax
add    %eax,(%rdi)
mov    (%rdx),%eax
add    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @addValueToPointers(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %6
%8 = load i32, i32* %7
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
%11 = add nsw i32 %10, %8
store i32 %11, i32* %9
%12 = load i32*, i32** %6
%13 = load i32, i32* %12
%14 = load i32*, i32** %5
%15 = load i32, i32* %14
%16 = add nsw i32 %15, %13
store i32 %16, i32* %14
ret void
}

LLVM IR (-O2):
define void @addValueToPointers(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %2
%5 = load i32, i32* %0
%6 = add nsw i32 %5, %4
store i32 %6, i32* %0
%7 = load i32, i32* %2
%8 = load i32, i32* %1
%9 = add nsw i32 %8, %7
store i32 %9, i32* %1
ret void
}
/* Variables and functions */
long __builtin_tbegin_nofloat(void *const);
long __TM_begin(void *const tdb) { return __builtin_tbegin_nofloat(tdb); }


x86 assembly (clang, -O0):
<__TM_begin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__builtin_tbegin_nofloat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__TM_begin>:
jmp    1030 <__builtin_tbegin_nofloat@plt>

LLVM IR (-O0):
define i64 @__TM_begin(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @__builtin_tbegin_nofloat(i8* %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @__TM_begin(i8* %0) {
%2 = tail call i64 @__builtin_tbegin_nofloat(i8* %0)
ret i64 %2
}
/* Variables and functions */
double pow(double, double);
double eval_pow(double x, double y) { return pow(x, y); }


x86 assembly (clang, -O0):
<eval_pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eval_pow>:
jmp    1030 <pow@plt>

LLVM IR (-O0):
define double @eval_pow(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @pow(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @eval_pow(double %0, double %1) {
%3 = tail call double @pow(double %0, double %1)
ret double %3
}
char *util_null2empty(char *str) { return str ? str : ""; }


x86 assembly (clang, -O0):
<util_null2empty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1120 <util_null2empty+0x20>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1130 <util_null2empty+0x30>
lea    0xed9(%rip),%rax
mov    %rax,-0x10(%rbp)
jmp    1130 <util_null2empty+0x30>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_null2empty>:
test   %rdi,%rdi
lea    0xef6(%rip),%rax
cmovne %rdi,%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @util_null2empty(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i8*, i8** %2
br label %8
7: ; preds = %1
br label %8
8: ; preds = %7, %5
%9 = phi i8* [ %6, %5 ], [ getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), %7 ]
ret i8* %9
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @util_null2empty(i8* readnone %0) {
%2 = icmp eq i8* %0, null
%3 = select i1 %2, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* %0
ret i8* %3
}
unsigned int g_str_hash(const void *v) {
  const char *str = v;
  unsigned int hash = 5381;
  char c;
  while ((c = *str++))
    hash = ((hash << 5) + hash) + c;
  return hash;
}


x86 assembly (clang, -O0):
<g_str_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x1505,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    %al,-0x15(%rbp)
cmp    $0x0,%al
je     114a <g_str_hash+0x4a>
mov    -0x14(%rbp),%eax
shl    $0x5,%eax
add    -0x14(%rbp),%eax
movsbl -0x15(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0x14(%rbp)
jmp    1117 <g_str_hash+0x17>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_str_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1128 <g_str_hash+0x28>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
mov    %eax,%edx
shl    $0x5,%edx
add    %eax,%edx
movsbl %cl,%eax
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <g_str_hash+0x10>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i32 @g_str_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8
store i8* %0, i8** %2
%6 = load i8*, i8** %2
store i8* %6, i8** %3
store i32 5381, i32* %4
br label %7
7: ; preds = %12, %1
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %3
%10 = load i8, i8* %8
store i8 %10, i8* %5
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %7
%13 = load i32, i32* %4
%14 = shl i32 %13, 5
%15 = load i32, i32* %4
%16 = add i32 %14, %15
%17 = load i8, i8* %5
%18 = sext i8 %17 to i32
%19 = add i32 %16, %18
store i32 %19, i32* %4
br label %7
20: ; preds = %7
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @g_str_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %12, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = phi i32 [ %11, %4 ], [ 5381, %1 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i32 %7, 33
%10 = sext i8 %5 to i32
%11 = add i32 %9, %10
%12 = load i8, i8* %8
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %4
14: ; preds = %4, %1
%15 = phi i32 [ 5381, %1 ], [ %11, %4 ]
ret i32 %15
}
void glCompressedTexImage2D(void) { return; }


x86 assembly (clang, -O0):
<glCompressedTexImage2D>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glCompressedTexImage2D>:
ret

LLVM IR (-O0):
define void @glCompressedTexImage2D() {
ret void
}

LLVM IR (-O2):
define void @glCompressedTexImage2D() {
ret void
}
double MBtoATM(double MB) {
  double ATM = 0.0009869233 * MB;
  return ATM;
}


x86 assembly (clang, -O0):
<MBtoATM>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<MBtoATM>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @MBtoATM(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double 0x3F502B74D304AD0A, %4
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @MBtoATM(double %0) {
%2 = fmul double %0, 0x3F502B74D304AD0A
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int /*<<< orphan*/ tcc_tca_setLogLevel(int);
void coreCli_setLogLevel() {
  int newLogLevel = 0;
  printf("new log level?\n>> ");
  scanf("%i", &newLogLevel);
  tcc_tca_setLogLevel(newLogLevel);
}


x86 assembly (clang, -O0):
<coreCli_setLogLevel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
lea    0xec1(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x4(%rbp),%edi
call   1050 <tcc_tca_setLogLevel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<coreCli_setLogLevel>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
lea    0xec7(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
call   1050 <tcc_tca_setLogLevel@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [19 x i8] c"new log level?\0A>> \00"
@.str.1 = [3 x i8] c"%i\00"
define void @coreCli_setLogLevel() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @tcc_tca_setLogLevel(i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"new log level?\0A>> \00"
@.str.1 = [3 x i8] c"%i\00"
define void @coreCli_setLogLevel() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @tcc_tca_setLogLevel(i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char const *);
void IO_printLine(const char *line) { puts(line); }


x86 assembly (clang, -O0):
<IO_printLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IO_printLine>:
jmp    1030 <puts@plt>

LLVM IR (-O0):
define void @IO_printLine(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @puts(i8* %3)
ret void
}

LLVM IR (-O2):
define void @IO_printLine(i8* nocapture %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) %0)
ret void
}
int main(void) {
  1.6 && 0.6;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
mov    $0x1,%cl
test   $0x1,%cl
mov    %al,-0x5(%rbp)
jne    1120 <main+0x20>
jmp    112a <main+0x2a>
mov    $0x1,%al
mov    %al,-0x5(%rbp)
jmp    112a <main+0x2a>
mov    -0x5(%rbp),%al
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br i1 true, label %2, label %3
2: ; preds = %0
br label %3
3: ; preds = %2, %0
%4 = phi i1 [ false, %0 ], [ true, %2 ]
%5 = zext i1 %4 to i32
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
int get_format(int opcode) {
  if (opcode == 0) {
    return 0;
  } else if (opcode == 2 || opcode == 3) {
    return 2;
  } else {
    return 1;
  }
}


x86 assembly (clang, -O0):
<get_format>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111d <get_format+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    1144 <get_format+0x44>
cmpl   $0x2,-0x8(%rbp)
je     1131 <get_format+0x31>
cmpl   $0x3,-0x8(%rbp)
jne    113d <get_format+0x3d>
movl   $0x2,-0x4(%rbp)
jmp    1144 <get_format+0x44>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_format>:
mov    %edi,%ecx
and    $0xfffffffe,%ecx
xor    %eax,%eax
cmp    $0x2,%ecx
sete   %al
add    $0x1,%eax
test   %edi,%edi
cmove  %edi,%eax
ret

LLVM IR (-O0):
define i32 @get_format(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 2
br i1 %9, label %13, label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = icmp eq i32 %11, 3
br i1 %12, label %13, label %14
13: ; preds = %10, %7
store i32 2, i32* %2
br label %15
14: ; preds = %10
store i32 1, i32* %2
br label %15
15: ; preds = %14, %13, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @get_format(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = and i32 %0, -2
%4 = icmp eq i32 %3, 2
%5 = select i1 %4, i32 2, i32 1
%6 = select i1 %2, i32 0, i32 %5
ret i32 %6
}
/* Variables and functions */
char *sysfs_get_driver(unsigned int);
char *cpufreq_get_driver(unsigned int cpu) { return sysfs_get_driver(cpu); }


x86 assembly (clang, -O0):
<cpufreq_get_driver>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sysfs_get_driver@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_get_driver>:
jmp    1030 <sysfs_get_driver@plt>

LLVM IR (-O0):
define i8* @cpufreq_get_driver(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @sysfs_get_driver(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @cpufreq_get_driver(i32 %0) {
%2 = tail call i8* @sysfs_get_driver(i32 %0)
ret i8* %2
}
/* Variables and functions */
unsigned char *create_data();
unsigned char *grow_region_gpu(unsigned char *);
unsigned char *raycast_gpu(unsigned char *, unsigned char *);
int /*<<< orphan*/ write_bmp(unsigned char *, int, int);
int main(int argc, char **argv) {
  unsigned char *data = create_data();
  unsigned char *region = grow_region_gpu(data);
  unsigned char *image = raycast_gpu(data, region);
  write_bmp(image, 64, 64);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1050 <create_data@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1060 <grow_region_gpu@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1040 <raycast_gpu@plt>
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rdi
mov    $0x40,%edx
mov    %edx,%esi
call   1030 <write_bmp@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1050 <create_data@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1060 <grow_region_gpu@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
call   1040 <raycast_gpu@plt>
mov    %rax,%rdi
mov    $0x40,%esi
mov    $0x40,%edx
call   1030 <write_bmp@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i32 %0, i32* %3
store i8** %1, i8*** %4
%8 = call i8* (...) @create_data()
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = call i8* @grow_region_gpu(i8* %9)
store i8* %10, i8** %6
%11 = load i8*, i8** %5
%12 = load i8*, i8** %6
%13 = call i8* @raycast_gpu(i8* %11, i8* %12)
store i8* %13, i8** %7
%14 = load i8*, i8** %7
%15 = call i32 @write_bmp(i8* %14, i32 64, i32 64)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i8* (...) @create_data()
%4 = tail call i8* @grow_region_gpu(i8* %3)
%5 = tail call i8* @raycast_gpu(i8* %3, i8* %4)
%6 = tail call i32 @write_bmp(i8* %5, i32 64, i32 64)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __crow_main();
int main() {
  __crow_main();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__crow_main@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__crow_main@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @__crow_main()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__crow_main()
ret i32 0
}
void up() {}


x86 assembly (clang, -O0):
<up>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<up>:
ret

LLVM IR (-O0):
define void @up() {
ret void
}

LLVM IR (-O2):
define void @up() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void *malloc(int);
int main() {
  void *p;
  p = malloc(1);
  free(p);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1040 <malloc@plt>
mov    %rax,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
%3 = call i8* @malloc(i32 1)
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @free(i8* %4)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call dereferenceable_or_null(1) i8* @malloc(i32 1)
%2 = tail call i32 @free(i8* %1)
ret i32 0
}
int axp_set_chargecurrent(int cur) {
  int ret = 0;
  return ret;
}


x86 assembly (clang, -O0):
<axp_set_chargecurrent>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<axp_set_chargecurrent>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @axp_set_chargecurrent(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @axp_set_chargecurrent(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ print_dotquad(unsigned long, int /*<<< orphan*/);
unsigned long read_ulong(int);
void print_ip_item(int offset) {
  unsigned long item = read_ulong(offset);
  if (item != 0)
    print_dotquad(item, 0);
}


x86 assembly (clang, -O0):
<print_ip_item>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <read_ulong@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114d <print_ip_item+0x2d>
mov    -0x10(%rbp),%rdi
xor    %esi,%esi
call   1040 <print_dotquad@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_ip_item>:
push   %rax
call   1030 <read_ulong@plt>
test   %rax,%rax
je     1136 <print_ip_item+0x16>
mov    %rax,%rdi
xor    %esi,%esi
pop    %rax
jmp    1040 <print_dotquad@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @print_ip_item(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i64 @read_ulong(i32 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i64, i64* %3
%10 = call i32 @print_dotquad(i64 %9, i32 0)
br label %11
11: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @print_ip_item(i32 %0) {
%2 = tail call i64 @read_ulong(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @print_dotquad(i64 %2, i32 0)
br label %6
6: ; preds = %4, %1
ret void
}
void trargs(char **ap) {}


x86 assembly (clang, -O0):
<trargs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<trargs>:
ret

LLVM IR (-O0):
define void @trargs(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
ret void
}

LLVM IR (-O2):
define void @trargs(i8** nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fwrite(unsigned char *, int, int, int /*<<< orphan*/ *);
int xdf_write_uint8(FILE *out, int val) {
  unsigned char c;
  if (val < 0 || val > 255)
    return 1;
  c = val;
  if (fwrite(&c, 1, 1, out) != 1)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<xdf_write_uint8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     1136 <xdf_write_uint8+0x26>
cmpl   $0xff,-0x14(%rbp)
jle    1142 <xdf_write_uint8+0x32>
movl   $0x1,-0x4(%rbp)
jmp    1178 <xdf_write_uint8+0x68>
mov    -0x14(%rbp),%eax
mov    %al,-0x15(%rbp)
mov    -0x10(%rbp),%rcx
lea    -0x15(%rbp),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <fwrite@plt>
cmp    $0x1,%eax
je     1171 <xdf_write_uint8+0x61>
movl   $0x1,-0x4(%rbp)
jmp    1178 <xdf_write_uint8+0x68>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdf_write_uint8>:
mov    $0x1,%eax
cmp    $0xff,%esi
ja     1148 <xdf_write_uint8+0x38>
push   %rax
mov    %rdi,%rcx
mov    %sil,0x7(%rsp)
lea    0x7(%rsp),%rdi
mov    $0x1,%esi
mov    $0x1,%edx
call   1030 <fwrite@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
setne  %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @xdf_write_uint8(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i8
store i32* %0, i32** %4
store i32 %1, i32* %5
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %2
%10 = load i32, i32* %5
%11 = icmp sgt i32 %10, 255
br i1 %11, label %12, label %13
12: ; preds = %9, %2
store i32 1, i32* %3
br label %21
13: ; preds = %9
%14 = load i32, i32* %5
%15 = trunc i32 %14 to i8
store i8 %15, i8* %6
%16 = load i32*, i32** %4
%17 = call i32 @fwrite(i8* %6, i32 1, i32 1, i32* %16)
%18 = icmp ne i32 %17, 1
br i1 %18, label %19, label %20
19: ; preds = %13
store i32 1, i32* %3
br label %21
20: ; preds = %13
store i32 0, i32* %3
br label %21
21: ; preds = %20, %19, %12
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @xdf_write_uint8(i32* nocapture %0, i32 %1) {
%3 = alloca i8
%4 = icmp ugt i32 %1, 255
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = trunc i32 %1 to i8
store i8 %6, i8* %3
%7 = call i32 @fwrite(i8* %3, i32 1, i32 1, i32* %0)
%8 = icmp ne i32 %7, 1
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %5, %2
%11 = phi i32 [ 1, %2 ], [ %9, %5 ]
ret i32 %11
}
void __ofl_unlock() { ((void)0); }


x86 assembly (clang, -O0):
<__ofl_unlock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ofl_unlock>:
ret

LLVM IR (-O0):
define void @__ofl_unlock() {
ret void
}

LLVM IR (-O2):
define void @__ofl_unlock() {
ret void
}
int do_627() { return 627; }


x86 assembly (clang, -O0):
<do_627>:
push   %rbp
mov    %rsp,%rbp
mov    $0x273,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_627>:
mov    $0x273,%eax
ret

LLVM IR (-O0):
define i32 @do_627() {
ret i32 627
}

LLVM IR (-O2):
define i32 @do_627() {
ret i32 627
}
char *strcat(char *s1, const char *s2) {
  char *result = s1;
  while (*s1 != 0)
    s1++;
  do {
    *(s1++) = *(s2);
  } while (*(s2++) != 0);
  return result;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1135 <strcat+0x35>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1114 <strcat+0x14>
jmp    113a <strcat+0x3a>
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    113a <strcat+0x3a>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
mov    %rdi,%rax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
cmpb   $0x0,(%rcx)
lea    0x1(%rcx),%rcx
jne    1110 <strcat+0x10>
xor    %edi,%edi
nopl   0x0(%rax,%rax,1)
movzbl (%rsi,%rdi,1),%edx
mov    %dl,-0x1(%rcx,%rdi,1)
cmpb   $0x0,(%rsi,%rdi,1)
lea    0x1(%rdi),%rdi
jne    1120 <strcat+0x20>
ret

LLVM IR (-O0):
define i8* @strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %12, %2
%8 = load i8*, i8** %3
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %7
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
br label %7
15: ; preds = %7
br label %16
16: ; preds = %21, %15
%17 = load i8*, i8** %4
%18 = load i8, i8* %17
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
store i8 %18, i8* %19
br label %21
21: ; preds = %16
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %4
%24 = load i8, i8* %22
%25 = sext i8 %24 to i32
%26 = icmp ne i32 %25, 0
br i1 %26, label %16, label %27
27: ; preds = %21
%28 = load i8*, i8** %5
ret i8* %28
}

LLVM IR (-O2):
define i8* @strcat(i8* returned %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %7, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %6, label %8, label %3
8: ; preds = %3, %8
%9 = phi i8* [ %13, %8 ], [ %1, %3 ]
%10 = phi i8* [ %12, %8 ], [ %4, %3 ]
%11 = load i8, i8* %9
%12 = getelementptr inbounds i8, i8* %10, i64 1
store i8 %11, i8* %10
%13 = getelementptr inbounds i8, i8* %9, i64 1
%14 = load i8, i8* %9
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %8
16: ; preds = %8
ret i8* %0
}
void gdk_property_get() {}


x86 assembly (clang, -O0):
<gdk_property_get>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_property_get>:
ret

LLVM IR (-O0):
define void @gdk_property_get() {
ret void
}

LLVM IR (-O2):
define void @gdk_property_get() {
ret void
}
/* Variables and functions */
long atol(char const *);
long int strtoint(const char *str) { return atol(str); }


x86 assembly (clang, -O0):
<strtoint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <atol@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtoint>:
jmp    1030 <atol@plt>

LLVM IR (-O0):
define i64 @strtoint(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @atol(i8* %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @strtoint(i8* nocapture %0) {
%2 = tail call i64 @atol(i8* %0)
ret i64 %2
}
/* Variables and functions */
char *ustrdup(char const *);
char *ustrdup_or_null(const char *s) { return s ? ustrdup(s) : NULL; }


x86 assembly (clang, -O0):
<ustrdup_or_null>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1139 <ustrdup_or_null+0x29>
mov    -0x8(%rbp),%rdi
call   1030 <ustrdup@plt>
mov    %rax,-0x10(%rbp)
jmp    1144 <ustrdup_or_null+0x34>
xor    %eax,%eax
mov    %rax,-0x10(%rbp)
jmp    1144 <ustrdup_or_null+0x34>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ustrdup_or_null>:
test   %rdi,%rdi
je     111a <ustrdup_or_null+0xa>
jmp    1030 <ustrdup@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @ustrdup_or_null(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i8* @ustrdup(i8* %6)
br label %9
8: ; preds = %1
br label %9
9: ; preds = %8, %5
%10 = phi i8* [ %7, %5 ], [ null, %8 ]
ret i8* %10
}

LLVM IR (-O2):
define i8* @ustrdup_or_null(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i8* @ustrdup(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i8* [ %4, %3 ], [ null, %1 ]
ret i8* %6
}
/* Variables and functions */
void *crAlloc(unsigned int);
void *crAllocDebug(unsigned int nbytes, const char *file, int line) {
  return crAlloc(nbytes);
}


x86 assembly (clang, -O0):
<crAllocDebug>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <crAlloc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crAllocDebug>:
jmp    1030 <crAlloc@plt>

LLVM IR (-O0):
define i8* @crAllocDebug(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = call i8* @crAlloc(i32 %7)
ret i8* %8
}

LLVM IR (-O2):
define i8* @crAllocDebug(i32 %0, i8* nocapture readnone %1, i32 %2) {
%4 = tail call i8* @crAlloc(i32 %0)
ret i8* %4
}
/* Type definitions */
struct copt {
  int dummy;
};

/* Variables and functions */
char **copt_parse(struct copt *, int, char **);
char **copt_parse_argv(struct copt *slf, int n, char **argv) {
  return copt_parse(slf, --n, ++(argv));
}


x86 assembly (clang, -O0):
<copt_parse_argv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
add    $0xffffffff,%esi
mov    %esi,-0xc(%rbp)
mov    -0x18(%rbp),%rdx
add    $0x8,%rdx
mov    %rdx,-0x18(%rbp)
call   1030 <copt_parse@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<copt_parse_argv>:
add    $0xffffffff,%esi
add    $0x8,%rdx
jmp    1030 <copt_parse@plt>

LLVM IR (-O0):
%struct.copt = type { i32 }
define i8** @copt_parse_argv(%struct.copt* %0, i32 %1, i8** %2) {
%4 = alloca %struct.copt*
%5 = alloca i32
%6 = alloca i8**
store %struct.copt* %0, %struct.copt** %4
store i32 %1, i32* %5
store i8** %2, i8*** %6
%7 = load %struct.copt*, %struct.copt** %4
%8 = load i32, i32* %5
%9 = add nsw i32 %8, -1
store i32 %9, i32* %5
%10 = load i8**, i8*** %6
%11 = getelementptr inbounds i8*, i8** %10, i32 1
store i8** %11, i8*** %6
%12 = call i8** @copt_parse(%struct.copt* %7, i32 %9, i8** %11)
ret i8** %12
}

LLVM IR (-O2):
%struct.copt = type { i32 }
define i8** @copt_parse_argv(%struct.copt* %0, i32 %1, i8** %2) {
%4 = add nsw i32 %1, -1
%5 = getelementptr inbounds i8*, i8** %2, i64 1
%6 = tail call i8** @copt_parse(%struct.copt* %0, i32 %4, i8** %5)
ret i8** %6
}
int f2(int foo) { return 42 + foo; }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
lea    0x2a(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 42, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @f2(i32 %0) {
%2 = add nsw i32 %0, 42
ret i32 %2
}
int test1(int a, int b) { return (a ^ b) & a; }


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    -0x8(%rbp),%eax
and    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
mov    %esi,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @test1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %5, %6
%8 = load i32, i32* %3
%9 = and i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @test1(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = and i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ empty_function();
int use_empty_function(int x) {
  x = 0;
  empty_function();
  return 5 / x;
}


x86 assembly (clang, -O0):
<use_empty_function>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <empty_function@plt>
mov    $0x5,%eax
cltd
idivl  -0x4(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<use_empty_function>:
xor    %eax,%eax
jmp    1030 <empty_function@plt>

LLVM IR (-O0):
define i32 @use_empty_function(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %2
%3 = call i32 (...) @empty_function()
%4 = load i32, i32* %2
%5 = sdiv i32 5, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @use_empty_function(i32 %0) {
%2 = tail call i32 (...) @empty_function()
ret i32 poison
}
/* Variables and functions */
int /*<<< orphan*/ arm_data_imm_op();
int /*<<< orphan*/ arm_logic_teq(int /*<<< orphan*/);
void arm_teq_imm() { arm_logic_teq(arm_data_imm_op()); }


x86 assembly (clang, -O0):
<arm_teq_imm>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <arm_data_imm_op@plt>
mov    %eax,%edi
call   1040 <arm_logic_teq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_teq_imm>:
push   %rax
xor    %eax,%eax
call   1030 <arm_data_imm_op@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <arm_logic_teq@plt>

LLVM IR (-O0):
define void @arm_teq_imm() {
%1 = call i32 (...) @arm_data_imm_op()
%2 = call i32 @arm_logic_teq(i32 %1)
ret void
}

LLVM IR (-O2):
define void @arm_teq_imm() {
%1 = tail call i32 (...) @arm_data_imm_op()
%2 = tail call i32 @arm_logic_teq(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GpioCaptureC__0__Capture__disable();
void CC2420TransmitP__CaptureSFD__disable(void) {
  GpioCaptureC__0__Capture__disable();
}


x86 assembly (clang, -O0):
<CC2420TransmitP__CaptureSFD__disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GpioCaptureC__0__Capture__disable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420TransmitP__CaptureSFD__disable>:
xor    %eax,%eax
jmp    1030 <GpioCaptureC__0__Capture__disable@plt>

LLVM IR (-O0):
define void @CC2420TransmitP__CaptureSFD__disable() {
%1 = call i32 (...) @GpioCaptureC__0__Capture__disable()
ret void
}

LLVM IR (-O2):
define void @CC2420TransmitP__CaptureSFD__disable() {
%1 = tail call i32 (...) @GpioCaptureC__0__Capture__disable()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EBADF;
int /*<<< orphan*/ errno;
int access(const char *path, int mode) {
  (void)path;
  (void)mode;
  errno = EBADF;
  return -1;
}


x86 assembly (clang, -O0):
<access>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec5(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<access>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EBADF = global i32 0
@errno = global i32 0
define i32 @access(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = load i32, i32* @EBADF
store i32 %7, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EBADF = global i32 0
@errno = global i32 0
define i32 @access(i8* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @EBADF
store i32 %3, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ sprintf(char *, char *, char *);
int /*<<< orphan*/ system(char *);
void ov25() {
  printf("\nIncreasing CPU VDD Voltage by 25mV\n");
  char buf[256];
  sprintf(
      buf, "/system/bin/sh -c %s",
      "'echo +25000 > /sys/devices/system/cpu/cpufreq/vdd_table/vdd_levels'");
  system(buf);
}


x86 assembly (clang, -O0):
<ov25>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    0xebe(%rip),%rdi
call   1040 <printf@plt>
lea    -0x100(%rbp),%rdi
lea    0xed0(%rip),%rsi
lea    0xede(%rip),%rdx
call   1050 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ov25>:
push   %rbx
sub    $0x100,%rsp
lea    0xf1b(%rip),%rdi
call   1030 <puts@plt>
lea    0xeb5(%rip),%rsi
lea    0xec3(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1050 <sprintf@plt>
mov    %rbx,%rdi
call   1040 <system@plt>
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [37 x i8] c"\0AIncreasing CPU VDD Voltage by 25mV\0A\00"
@.str.1 = [21 x i8] c"/system/bin/sh -c %s\00"
@.str.2 = [69 x i8] c"'echo +25000 > /sys/devices/system/cpu/cpufreq/vdd_table/vdd_levels'\00"
define void @ov25() {
%1 = alloca [256 x i8]
%2 = call i32 @printf(i8* getelementptr inbounds ([37 x i8], [37 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str.2, i64 0, i64 0))
%5 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%6 = call i32 @system(i8* %5)
ret void
}

LLVM IR (-O2):
@.str.1 = [21 x i8] c"/system/bin/sh -c %s\00"
@.str.2 = [69 x i8] c"'echo +25000 > /sys/devices/system/cpu/cpufreq/vdd_table/vdd_levels'\00"
@str = [36 x i8] c"\0AIncreasing CPU VDD Voltage by 25mV\00"
define void @ov25() {
%1 = alloca [256 x i8]
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @str, i64 0, i64 0))
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([69 x i8], [69 x i8]* @.str.2, i64 0, i64 0))
%5 = call i32 @system(i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  int i;
  printf("--- CTC1, CFC1 ---\n");
  for (i = 0; i < 1024; i++) {
    ;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0x400,-0x8(%rbp)
jge    1152 <main+0x42>
jmp    1144 <main+0x34>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1132 <main+0x22>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"--- CTC1, CFC1 ---\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %2
br label %4
4: ; preds = %8, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 1024
br i1 %6, label %7, label %11
7: ; preds = %4
br label %8
8: ; preds = %7
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %4
11: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
@str = [19 x i8] c"--- CTC1, CFC1 ---\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
ret i32 0
}
double quad(double v) {
  return ((v * v) * v) * v;
  __builtin_unreachable();
}


x86 assembly (clang, -O0):
<quad>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<quad>:
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @quad(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
%6 = load double, double* %2
%7 = fmul double %5, %6
%8 = load double, double* %2
%9 = fmul double %7, %8
ret double %9
}

LLVM IR (-O2):
define double @quad(double %0) {
%2 = fmul double %0, %0
%3 = fmul double %2, %0
%4 = fmul double %3, %0
ret double %4
}
/* Variables and functions */
bool nrf51_errata_67(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_67>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_67>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_67() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_67() {
ret i32 0
}
int main() {
  int n = 0;
  while (n <= 111) {
    n = n + 4;
  }
  return n;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x6f,-0x8(%rbp)
jg     112a <main+0x2a>
mov    -0x8(%rbp),%eax
add    $0x4,%eax
mov    %eax,-0x8(%rbp)
jmp    1112 <main+0x12>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x70,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 111
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 4
store i32 %8, i32* %2
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
ret i32 112
}
/* Variables and functions */
int /*<<< orphan*/ f(struct A *);
void g() {
  typedef struct A *P;
  struct A {
    P p;
  };
  P cinfo = 0;
  f(cinfo->p);
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
jmp    1030 <f@plt>

LLVM IR (-O0):
%struct.A = type { %struct.A* }
%struct.A.0 = type opaque
define void @g() {
%1 = alloca %struct.A*
store %struct.A* null, %struct.A** %1
%2 = load %struct.A*, %struct.A** %1
%3 = getelementptr inbounds %struct.A, %struct.A* %2, i32 0, i32 0
%4 = load %struct.A*, %struct.A** %3
%5 = bitcast %struct.A* %4 to %struct.A.0*
%6 = call i32 @f(%struct.A.0* %5)
ret void
}

LLVM IR (-O2):
%struct.A = type { %struct.A* }
%struct.A.0 = type opaque
define void @g() {
%1 = tail call i32 @f(%struct.A.0* undef)
ret void
}
int LLI2C_set_data_for_input(void) { return 0; }


x86 assembly (clang, -O0):
<LLI2C_set_data_for_input>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LLI2C_set_data_for_input>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @LLI2C_set_data_for_input() {
ret i32 0
}

LLVM IR (-O2):
define i32 @LLI2C_set_data_for_input() {
ret i32 0
}
/* Type definitions */
struct yas_data {
  int dummy;
};

/* Variables and functions */
int yas_measure(struct yas_data *, int, int, int *);
int yas_measure_wrap(struct yas_data *data, int num) {
  int ouflow;
  return yas_measure(data, num, 1, &ouflow);
}


x86 assembly (clang, -O0):
<yas_measure_wrap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    $0x1,%edx
lea    -0x10(%rbp),%rcx
call   1030 <yas_measure@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yas_measure_wrap>:
push   %rax
lea    0x4(%rsp),%rcx
mov    $0x1,%edx
call   1030 <yas_measure@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.yas_data = type { i32 }
define i32 @yas_measure_wrap(%struct.yas_data* %0, i32 %1) {
%3 = alloca %struct.yas_data*
%4 = alloca i32
%5 = alloca i32
store %struct.yas_data* %0, %struct.yas_data** %3
store i32 %1, i32* %4
%6 = load %struct.yas_data*, %struct.yas_data** %3
%7 = load i32, i32* %4
%8 = call i32 @yas_measure(%struct.yas_data* %6, i32 %7, i32 1, i32* %5)
ret i32 %8
}

LLVM IR (-O2):
%struct.yas_data = type { i32 }
define i32 @yas_measure_wrap(%struct.yas_data* %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @yas_measure(%struct.yas_data* %0, i32 %1, i32 1, i32* %3)
ret i32 %5
}
/* Variables and functions */
void *malloc(size_t);
void *ycf_alloc(size_t size, void *context) {
  (void)context;
  return malloc(size);
}


x86 assembly (clang, -O0):
<ycf_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ycf_alloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @ycf_alloc(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i64, i64* %3
%7 = call i8* @malloc(i64 %6)
ret i8* %7
}

LLVM IR (-O2):
define noalias i8* @ycf_alloc(i64 %0, i8* nocapture readnone %1) {
%3 = tail call i8* @malloc(i64 %0)
ret i8* %3
}
/* Type definitions */
struct cli_assembler_compile_result {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cli_assembler_implementation_compile_dispose(
    struct cli_assembler_compile_result *);
void cli_assembler_compile_dispose(
    struct cli_assembler_compile_result *result) {
  cli_assembler_implementation_compile_dispose(result);
}


x86 assembly (clang, -O0):
<cli_assembler_compile_dispose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cli_assembler_implementation_compile_dispose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cli_assembler_compile_dispose>:
jmp    1030 <cli_assembler_implementation_compile_dispose@plt>

LLVM IR (-O0):
%struct.cli_assembler_compile_result = type { i32 }
define void @cli_assembler_compile_dispose(%struct.cli_assembler_compile_result* %0) {
%2 = alloca %struct.cli_assembler_compile_result*
store %struct.cli_assembler_compile_result* %0, %struct.cli_assembler_compile_result** %2
%3 = load %struct.cli_assembler_compile_result*, %struct.cli_assembler_compile_result** %2
%4 = call i32 @cli_assembler_implementation_compile_dispose(%struct.cli_assembler_compile_result* %3)
ret void
}

LLVM IR (-O2):
%struct.cli_assembler_compile_result = type { i32 }
define void @cli_assembler_compile_dispose(%struct.cli_assembler_compile_result* %0) {
%2 = tail call i32 @cli_assembler_implementation_compile_dispose(%struct.cli_assembler_compile_result* %0)
ret void
}
void UI_free(void) {}


x86 assembly (clang, -O0):
<UI_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UI_free>:
ret

LLVM IR (-O0):
define void @UI_free() {
ret void
}

LLVM IR (-O2):
define void @UI_free() {
ret void
}
__attribute((always_)) float glm_signf(float val) {
  return (float)((val > 0.0f) - (val < 0.0f));
}


x86 assembly (clang, -O0):
<glm_signf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
xorps  %xmm0,%xmm0
ucomiss -0x4(%rbp),%xmm0
seta   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
cvtsi2ss %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<glm_signf>:
xorps  %xmm1,%xmm1
xor    %eax,%eax
ucomiss %xmm1,%xmm0
seta   %al
xor    %ecx,%ecx
ucomiss %xmm0,%xmm1
seta   %cl
sub    %ecx,%eax
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
ret

LLVM IR (-O0):
define float @glm_signf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp ogt float %3, 0.000000e+00
%5 = zext i1 %4 to i32
%6 = load float, float* %2
%7 = fcmp olt float %6, 0.000000e+00
%8 = zext i1 %7 to i32
%9 = sub nsw i32 %5, %8
%10 = sitofp i32 %9 to float
ret float %10
}

LLVM IR (-O2):
define float @glm_signf(float %0) {
%2 = fcmp ogt float %0, 0.000000e+00
%3 = zext i1 %2 to i32
%4 = fcmp olt float %0, 0.000000e+00
%5 = sext i1 %4 to i32
%6 = add nsw i32 %5, %3
%7 = sitofp i32 %6 to float
ret float %7
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int random();
int generate_random(int a, int b) {
  int width;
  assert(a < b);
  width = b - a + 1;
  return random() % width + a;
}


x86 assembly (clang, -O0):
<generate_random>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1040 <random@plt>
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_random>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
sub    %ebp,%ebx
setg   %dil
call   1030 <assert@plt>
add    $0x1,%ebx
xor    %eax,%eax
call   1040 <random@plt>
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @generate_random(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp slt i32 %6, %7
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = sub nsw i32 %11, %12
%14 = add nsw i32 %13, 1
store i32 %14, i32* %5
%15 = call i32 (...) @random()
%16 = load i32, i32* %5
%17 = srem i32 %15, %16
%18 = load i32, i32* %3
%19 = add nsw i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @generate_random(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, %0
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = sub i32 1, %0
%7 = add i32 %6, %1
%8 = tail call i32 (...) @random()
%9 = srem i32 %8, %7
%10 = add nsw i32 %9, %0
ret i32 %10
}