xunge/DecIR huggingface dataset:
int naive(long v) {
  int bit = 0;
  int count = 0;
  for (bit = 0; bit < sizeof(v) * 8; bit++) {
    count += v & 0x01;
    v >>= 1;
  }
  return count;
}


x86 assembly (clang, -O0):
<naive>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0xc(%rbp)
movslq -0xc(%rbp),%rax
cmp    $0x40,%rax
jae    1157 <naive+0x57>
mov    -0x8(%rbp),%rcx
and    $0x1,%rcx
movslq -0x10(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    111d <naive+0x1d>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<naive>:
xor    %eax,%eax
mov    $0x40,%ecx
nopw   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %edi,%eax
shr    %eax
and    $0x1,%eax
add    %edx,%eax
mov    %edi,%edx
shr    $0x2,%edx
and    $0x1,%edx
add    %eax,%edx
mov    %edi,%eax
shr    $0x3,%eax
and    $0x1,%eax
add    %edx,%eax
sar    $0x4,%rdi
add    $0xfffffffc,%ecx
jne    1110 <naive+0x10>
ret

LLVM IR (-O0):
define i32 @naive(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
store i32 0, i32* %4
store i32 0, i32* %3
br label %5
5: ; preds = %18, %1
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = icmp ult i64 %7, 64
br i1 %8, label %9, label %21
9: ; preds = %5
%10 = load i64, i64* %2
%11 = and i64 %10, 1
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = add nsw i64 %13, %11
%15 = trunc i64 %14 to i32
store i32 %15, i32* %4
%16 = load i64, i64* %2
%17 = ashr i64 %16, 1
store i64 %17, i64* %2
br label %18
18: ; preds = %9
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %5
21: ; preds = %5
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @naive(i64 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ 0, %1 ], [ %20, %2 ]
%4 = phi i32 [ 0, %1 ], [ %22, %2 ]
%5 = phi i64 [ %0, %1 ], [ %21, %2 ]
%6 = trunc i64 %5 to i32
%7 = and i32 %6, 1
%8 = add i32 %7, %3
%9 = trunc i64 %5 to i32
%10 = lshr i32 %9, 1
%11 = and i32 %10, 1
%12 = add i32 %11, %8
%13 = trunc i64 %5 to i32
%14 = lshr i32 %13, 2
%15 = and i32 %14, 1
%16 = add i32 %15, %12
%17 = trunc i64 %5 to i32
%18 = lshr i32 %17, 3
%19 = and i32 %18, 1
%20 = add i32 %19, %16
%21 = ashr i64 %5, 4
%22 = add nuw nsw i32 %4, 4
%23 = icmp eq i32 %22, 64
br i1 %23, label %24, label %2
24: ; preds = %2
ret i32 %20
}
/* Variables and functions */
int ls_costN_nm6_f0(double const **, double **, int *, double *, int);
int ls_costN_nm6(const double **arg, double **res, int *iw, double *w,
                 int mem) {
  return ls_costN_nm6_f0(arg, res, iw, w, mem);
}


x86 assembly (clang, -O0):
<ls_costN_nm6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
call   1030 <ls_costN_nm6_f0@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm6>:
jmp    1030 <ls_costN_nm6_f0@plt>

LLVM IR (-O0):
define i32 @ls_costN_nm6(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = alloca double**
%7 = alloca double**
%8 = alloca i32*
%9 = alloca double*
%10 = alloca i32
store double** %0, double*** %6
store double** %1, double*** %7
store i32* %2, i32** %8
store double* %3, double** %9
store i32 %4, i32* %10
%11 = load double**, double*** %6
%12 = load double**, double*** %7
%13 = load i32*, i32** %8
%14 = load double*, double** %9
%15 = load i32, i32* %10
%16 = call i32 @ls_costN_nm6_f0(double** %11, double** %12, i32* %13, double* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @ls_costN_nm6(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = tail call i32 @ls_costN_nm6_f0(double** %0, double** %1, i32* %2, double* %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ LOCK_EX;
int flock(int, int /*<<< orphan*/);
int logfile_lock(int fd) {
  if (fd < 0) {
    return -1;
  }
  return flock(fd, LOCK_EX);
}


x86 assembly (clang, -O0):
<logfile_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1131 <logfile_lock+0x21>
movl   $0xffffffff,-0x4(%rbp)
jmp    1145 <logfile_lock+0x35>
mov    -0x8(%rbp),%edi
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
call   1030 <flock@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logfile_lock>:
test   %edi,%edi
js     1122 <logfile_lock+0x12>
mov    0x2ecd(%rip),%rax
mov    (%rax),%esi
jmp    1030 <flock@plt>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@LOCK_EX = global i32 0
define i32 @logfile_lock(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 -1, i32* %2
br label %11
7: ; preds = %1
%8 = load i32, i32* %3
%9 = load i32, i32* @LOCK_EX
%10 = call i32 @flock(i32 %8, i32 %9)
store i32 %10, i32* %2
br label %11
11: ; preds = %7, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@LOCK_EX = global i32 0
define i32 @logfile_lock(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = load i32, i32* @LOCK_EX
%5 = tail call i32 @flock(i32 %0, i32 %4)
br label %6
6: ; preds = %1, %3
%7 = phi i32 [ %5, %3 ], [ -1, %1 ]
ret i32 %7
}
void ARGBToUV444Row_C() {}


x86 assembly (clang, -O0):
<ARGBToUV444Row_C>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBToUV444Row_C>:
ret

LLVM IR (-O0):
define void @ARGBToUV444Row_C() {
ret void
}

LLVM IR (-O2):
define void @ARGBToUV444Row_C() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ bar();
int /*<<< orphan*/ blah();
int /*<<< orphan*/ foo();
void baz_5(int a, int b, int c) {
  if (a && b) {
    foo();
    if (c)
      bar();
  }
  if (!b || !c)
    blah();
}


x86 assembly (clang, -O0):
<baz_5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1172 <baz_5+0x42>
cmpl   $0x0,-0x8(%rbp)
je     1172 <baz_5+0x42>
mov    $0x0,%al
call   1040 <foo@plt>
cmpl   $0x0,-0xc(%rbp)
je     116d <baz_5+0x3d>
mov    $0x0,%al
call   1030 <bar@plt>
jmp    1172 <baz_5+0x42>
cmpl   $0x0,-0x8(%rbp)
je     1186 <baz_5+0x56>
cmpl   $0x0,-0xc(%rbp)
jne    118d <baz_5+0x5d>
mov    $0x0,%al
call   1050 <blah@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<baz_5>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebx
mov    %esi,%ebp
test   %edi,%edi
je     1151 <baz_5+0x21>
test   %ebp,%ebp
je     1151 <baz_5+0x21>
xor    %eax,%eax
call   1040 <foo@plt>
test   %ebx,%ebx
je     1160 <baz_5+0x30>
xor    %eax,%eax
call   1030 <bar@plt>
test   %ebp,%ebp
je     1160 <baz_5+0x30>
test   %ebx,%ebx
je     1160 <baz_5+0x30>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <blah@plt>

LLVM IR (-O0):
define void @baz_5(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %19
9: ; preds = %3
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %19
12: ; preds = %9
%13 = call i32 (...) @foo()
%14 = load i32, i32* %6
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = call i32 (...) @bar()
br label %18
18: ; preds = %16, %12
br label %19
19: ; preds = %18, %9, %3
%20 = load i32, i32* %5
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %25
22: ; preds = %19
%23 = load i32, i32* %6
%24 = icmp ne i32 %23, 0
br i1 %24, label %27, label %25
25: ; preds = %22, %19
%26 = call i32 (...) @blah()
br label %27
27: ; preds = %25, %22
ret void
}

LLVM IR (-O2):
define void @baz_5(i32 %0, i32 %1, i32 %2) {
%4 = icmp ne i32 %0, 0
%5 = icmp ne i32 %1, 0
%6 = and i1 %4, %5
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = tail call i32 (...) @foo()
%9 = icmp eq i32 %2, 0
br i1 %9, label %15, label %10
10: ; preds = %7
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %3
%13 = icmp ne i32 %2, 0
%14 = and i1 %5, %13
br i1 %14, label %17, label %15
15: ; preds = %7, %12
%16 = tail call i32 (...) @blah()
br label %17
17: ; preds = %12, %15
ret void
}
/* Variables and functions */
unsigned long xstrtoull(char const *, int);
unsigned long xstrtoul(const char *str, int b) { return xstrtoull(str, b); }


x86 assembly (clang, -O0):
<xstrtoul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <xstrtoull@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrtoul>:
jmp    1030 <xstrtoull@plt>

LLVM IR (-O0):
define i64 @xstrtoul(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i64 @xstrtoull(i8* %5, i32 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @xstrtoul(i8* %0, i32 %1) {
%3 = tail call i64 @xstrtoull(i8* %0, i32 %1)
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
char *asctime_r(struct tm *, char *);
struct tm *localtime_r(int /*<<< orphan*/ const *, struct tm *);
char *ctime_r(const time_t *t, char *buf) {
  struct tm tm, *tm_p = localtime_r(t, &tm);
  return tm_p ? asctime_r(tm_p, buf) : 0;
}


x86 assembly (clang, -O0):
<ctime_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <localtime_r@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     1162 <ctime_r+0x42>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <asctime_r@plt>
mov    %rax,-0x28(%rbp)
jmp    116d <ctime_r+0x4d>
xor    %eax,%eax
mov    %rax,-0x28(%rbp)
jmp    116d <ctime_r+0x4d>
mov    -0x28(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctime_r>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0x8(%rsp),%rsi
call   1030 <localtime_r@plt>
test   %rax,%rax
je     1144 <ctime_r+0x24>
mov    %rax,%rdi
mov    %rbx,%rsi
call   1040 <asctime_r@plt>
jmp    1146 <ctime_r+0x26>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i8* @ctime_r(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca %struct.tm
%6 = alloca %struct.tm*
store i32* %0, i32** %3
store i8* %1, i8** %4
%7 = load i32*, i32** %3
%8 = call %struct.tm* @localtime_r(i32* %7, %struct.tm* %5)
store %struct.tm* %8, %struct.tm** %6
%9 = load %struct.tm*, %struct.tm** %6
%10 = icmp ne %struct.tm* %9, null
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load %struct.tm*, %struct.tm** %6
%13 = load i8*, i8** %4
%14 = call i8* @asctime_r(%struct.tm* %12, i8* %13)
br label %16
15: ; preds = %2
br label %16
16: ; preds = %15, %11
%17 = phi i8* [ %14, %11 ], [ null, %15 ]
ret i8* %17
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i8* @ctime_r(i32* %0, i8* %1) {
%3 = alloca %struct.tm
%4 = bitcast %struct.tm* %3 to i8*
%5 = call %struct.tm* @localtime_r(i32* %0, %struct.tm* %3)
%6 = icmp eq %struct.tm* %5, null
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = call i8* @asctime_r(%struct.tm* %5, i8* %1)
br label %9
9: ; preds = %2, %7
%10 = phi i8* [ %8, %7 ], [ null, %2 ]
ret i8* %10
}
int sum_lt5(void *_a, void *_b) {
  int *a = _a, *b = _b;
  int sum = *a + *b;
  if (sum < 5) {
    *a = sum;
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<sum_lt5>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
mov    -0x28(%rbp),%rcx
add    (%rcx),%eax
mov    %eax,-0x2c(%rbp)
cmpl   $0x5,-0x2c(%rbp)
jge    114a <sum_lt5+0x4a>
mov    -0x2c(%rbp),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x0,-0x4(%rbp)
jmp    1151 <sum_lt5+0x51>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_lt5>:
mov    (%rsi),%ecx
add    (%rdi),%ecx
mov    $0x1,%eax
cmp    $0x4,%ecx
jg     1112 <sum_lt5+0x12>
mov    %ecx,(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sum_lt5(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to i32*
store i32* %12, i32** %7
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = load i32*, i32** %7
%16 = load i32, i32* %15
%17 = add nsw i32 %14, %16
store i32 %17, i32* %8
%18 = load i32, i32* %8
%19 = icmp slt i32 %18, 5
br i1 %19, label %20, label %23
20: ; preds = %2
%21 = load i32, i32* %8
%22 = load i32*, i32** %6
store i32 %21, i32* %22
store i32 0, i32* %3
br label %24
23: ; preds = %2
store i32 1, i32* %3
br label %24
24: ; preds = %23, %20
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @sum_lt5(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %6, %5
%8 = icmp slt i32 %7, 5
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 %7, i32* %3
br label %10
10: ; preds = %2, %9
%11 = phi i32 [ 0, %9 ], [ 1, %2 ]
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int mp_fprint_internal(int /*<<< orphan*/ *, char const **);
int /*<<< orphan*/ *stdout;
int mp_fprint(FILE *file, const char *data) {
  if (!file)
    file = stdout;
  int res = mp_fprint_internal(file, &data);
  return res;
}


x86 assembly (clang, -O0):
<mp_fprint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1139 <mp_fprint+0x29>
mov    0x2eae(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1030 <mp_fprint_internal@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_fprint>:
push   %rax
mov    %rsi,(%rsp)
test   %rdi,%rdi
jne    1124 <mp_fprint+0x14>
mov    0x2ebf(%rip),%rax
mov    (%rax),%rdi
mov    %rsp,%rsi
call   1030 <mp_fprint_internal@plt>
pop    %rcx
ret

LLVM IR (-O0):
@stdout = global i32* null
define i32 @mp_fprint(i32* %0, i8* %1) {
%3 = alloca i32*
%4 = alloca i8*
%5 = alloca i32
store i32* %0, i32** %3
store i8* %1, i8** %4
%6 = load i32*, i32** %3
%7 = icmp ne i32* %6, null
br i1 %7, label %10, label %8
8: ; preds = %2
%9 = load i32*, i32** @stdout
store i32* %9, i32** %3
br label %10
10: ; preds = %8, %2
%11 = load i32*, i32** %3
%12 = call i32 @mp_fprint_internal(i32* %11, i8** %4)
store i32 %12, i32* %5
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
@stdout = global i32* null
define i32 @mp_fprint(i32* %0, i8* %1) {
%3 = alloca i8*
store i8* %1, i8** %3
%4 = icmp eq i32* %0, null
%5 = load i32*, i32** @stdout
%6 = select i1 %4, i32* %5, i32* %0
%7 = call i32 @mp_fprint_internal(i32* %6, i8** %3)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_memexport_process_release() {
  printf("NOT IMPLEMENTED:"
         "pa_memexport_process_release"
         "\n");
}


x86 assembly (clang, -O0):
<pa_memexport_process_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_memexport_process_release>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"NOT IMPLEMENTED:pa_memexport_process_release\0A\00"
define i32 @pa_memexport_process_release() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [45 x i8] c"NOT IMPLEMENTED:pa_memexport_process_release\00"
define i32 @pa_memexport_process_release() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
scalar_t__ malloc(int);
void main() {
  int *p = (int *)malloc(sizeof(int));
  int i;
  for (i = 10; i < 100; i++)
    p[i] = 0;
  char *jp = (char *)p;
  jp[42] = 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    $0x4,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
movl   $0xa,-0xc(%rbp)
cmpl   $0x64,-0xc(%rbp)
jge    1154 <main+0x44>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112d <main+0x1d>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movb   $0x0,0x2a(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
lea    0x28(%rax),%rdi
mov    $0x168,%edx
xor    %esi,%esi
call   1030 <memset@plt>
movb   $0x0,0x2a(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32*
%2 = alloca i32
%3 = alloca i8*
%4 = call i64 @malloc(i32 4)
%5 = inttoptr i64 %4 to i32*
store i32* %5, i32** %1
store i32 10, i32* %2
br label %6
6: ; preds = %14, %0
%7 = load i32, i32* %2
%8 = icmp slt i32 %7, 100
br i1 %8, label %9, label %17
9: ; preds = %6
%10 = load i32*, i32** %1
%11 = load i32, i32* %2
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i32, i32* %10, i64 %12
store i32 0, i32* %13
br label %14
14: ; preds = %9
%15 = load i32, i32* %2
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %6
17: ; preds = %6
%18 = load i32*, i32** %1
%19 = bitcast i32* %18 to i8*
store i8* %19, i8** %3
%20 = load i8*, i8** %3
%21 = getelementptr inbounds i8, i8* %20, i64 42
store i8 0, i8* %21
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i64 @malloc(i32 4)
%2 = inttoptr i64 %1 to i32*
%3 = getelementptr i32, i32* %2, i64 10
%4 = bitcast i32* %3 to i8*
%5 = inttoptr i64 %1 to i8*
%6 = getelementptr inbounds i8, i8* %5, i64 42
store i8 0, i8* %6
ret void
}
int rdar8511238() {
  enum A { A_foo, A_bar };
  enum A a;
  if (a < 0)
    return 0;
  return 20;
}


x86 assembly (clang, -O0):
<rdar8511238>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,-0x8(%rbp)
jae    111a <rdar8511238+0x1a>
movl   $0x0,-0x4(%rbp)
jmp    1121 <rdar8511238+0x21>
movl   $0x14,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdar8511238>:
mov    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @rdar8511238() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* %2
%4 = icmp ult i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %0
store i32 0, i32* %1
br label %7
6: ; preds = %0
store i32 20, i32* %1
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
define i32 @rdar8511238() {
ret i32 20
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ __pgrpsys(int);
pid_t __setsid() { return __pgrpsys(3); }


x86 assembly (clang, -O0):
<__setsid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <__pgrpsys@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__setsid>:
mov    $0x3,%edi
jmp    1030 <__pgrpsys@plt>

LLVM IR (-O0):
define i32 @__setsid() {
%1 = call i32 @__pgrpsys(i32 3)
ret i32 %1
}

LLVM IR (-O2):
define i32 @__setsid() {
%1 = tail call i32 @__pgrpsys(i32 3)
ret i32 %1
}
int do_435() { return 435; }


x86 assembly (clang, -O0):
<do_435>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1b3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_435>:
mov    $0x1b3,%eax
ret

LLVM IR (-O0):
define i32 @do_435() {
ret i32 435
}

LLVM IR (-O2):
define i32 @do_435() {
ret i32 435
}
/* Variables and functions */
int /*<<< orphan*/ domain_init();
int /*<<< orphan*/ solver_bfs();
int /*<<< orphan*/ solver_init();
int main() {
  domain_init();
  solver_init();
  solver_bfs();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <domain_init@plt>
mov    $0x0,%al
call   1030 <solver_init@plt>
mov    $0x0,%al
call   1040 <solver_bfs@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <domain_init@plt>
xor    %eax,%eax
call   1030 <solver_init@plt>
xor    %eax,%eax
call   1040 <solver_bfs@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @domain_init()
%3 = call i32 (...) @solver_init()
%4 = call i32 (...) @solver_bfs()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @domain_init()
%2 = tail call i32 (...) @solver_init()
%3 = tail call i32 (...) @solver_bfs()
ret i32 0
}
unsigned f6(int x, unsigned y) {
  unsigned a = x - (int)y;
  return a + y;
}


x86 assembly (clang, -O0):
<f6>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f6>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f6(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = sub nsw i32 %6, %7
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i32, i32* %4
%11 = add i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @f6(i32 returned %0, i32 %1) {
ret i32 %0
}
float psi2kpa(float psi) { return psi * 6.89475729; }


x86 assembly (clang, -O0):
<psi2kpa>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee6(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<psi2kpa>:
cvtss2sd %xmm0,%xmm0
mulsd  0xef4(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @psi2kpa(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fpext float %3 to double
%5 = fmul double %4, 0x401B943B4149A15F
%6 = fptrunc double %5 to float
ret float %6
}

LLVM IR (-O2):
define float @psi2kpa(float %0) {
%2 = fpext float %0 to double
%3 = fmul double %2, 0x401B943B4149A15F
%4 = fptrunc double %3 to float
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ bfwrite(char *);
void cmdLoopBegin(void) { bfwrite("["); }


x86 assembly (clang, -O0):
<cmdLoopBegin>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <bfwrite@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdLoopBegin>:
lea    0xee9(%rip),%rdi
jmp    1030 <bfwrite@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"[\00"
define void @cmdLoopBegin() {
%1 = call i32 @bfwrite(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"[\00"
define void @cmdLoopBegin() {
%1 = tail call i32 @bfwrite(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct membuffer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ put_format(struct membuffer *, char *, char const *, int,
                              char const *);
void put_salinity(struct membuffer *b, int salinity, const char *pre,
                  const char *post) {
  if (salinity)
    put_format(b, "%s%d%s", pre, salinity / 10, post);
}


x86 assembly (clang, -O0):
<put_salinity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     115e <put_salinity+0x4e>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x28(%rbp),%rdx
mov    %eax,%ecx
mov    -0x20(%rbp),%r8
lea    0xea7(%rip),%rsi
call   1030 <put_format@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_salinity>:
test   %esi,%esi
je     113a <put_salinity+0x2a>
mov    %rcx,%r8
movslq %esi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rax
shr    $0x3f,%rax
sar    $0x22,%rcx
add    %eax,%ecx
lea    0xecb(%rip),%rsi
jmp    1030 <put_format@plt>
ret

LLVM IR (-O0):
%struct.membuffer = type { i32 }
@.str = [7 x i8] c"%s%d%s\00"
define void @put_salinity(%struct.membuffer* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca %struct.membuffer*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store %struct.membuffer* %0, %struct.membuffer** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i32, i32* %6
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %4
%12 = load %struct.membuffer*, %struct.membuffer** %5
%13 = load i8*, i8** %7
%14 = load i32, i32* %6
%15 = sdiv i32 %14, 10
%16 = load i8*, i8** %8
%17 = call i32 @put_format(%struct.membuffer* %12, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %13, i32 %15, i8* %16)
br label %18
18: ; preds = %11, %4
ret void
}

LLVM IR (-O2):
%struct.membuffer = type { i32 }
@.str = [7 x i8] c"%s%d%s\00"
define void @put_salinity(%struct.membuffer* %0, i32 %1, i8* %2, i8* %3) {
%5 = icmp eq i32 %1, 0
br i1 %5, label %9, label %6
6: ; preds = %4
%7 = sdiv i32 %1, 10
%8 = tail call i32 @put_format(%struct.membuffer* %0, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* %2, i32 %7, i8* %3)
br label %9
9: ; preds = %6, %4
ret void
}
reg0regx1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if (r0 <= (p1[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<reg0regx1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
movsd  -0x10(%rbp),%xmm1
mov    -0x30(%rbp),%rax
movslq -0x20(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
ucomisd %xmm1,%xmm0
jb     1144 <reg0regx1+0x44>
movl   $0x1,-0x4(%rbp)
jmp    114b <reg0regx1+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reg0regx1>:
movslq %esi,%rax
movsd  (%rcx,%rax,8),%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
setae  %al
ret

LLVM IR (-O0):
define i32 @reg0regx1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double, double* %8
%15 = load double*, double** %13
%16 = load i32, i32* %11
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds double, double* %15, i64 %17
%19 = load double, double* %18
%20 = fcmp ole double %14, %19
br i1 %20, label %21, label %22
21: ; preds = %6
store i32 1, i32* %7
br label %23
22: ; preds = %6
store i32 0, i32* %7
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %7
ret i32 %24
}

LLVM IR (-O2):
define i32 @reg0regx1(double %0, double %1, i32 %2, i32 %3, double* nocapture readnone %4, double* nocapture %5) {
%7 = sext i32 %3 to i64
%8 = getelementptr inbounds double, double* %5, i64 %7
%9 = load double, double* %8
%10 = fcmp oge double %9, %0
%11 = zext i1 %10 to i32
ret i32 %11
}
int star(char c) { return c == '*'; }


x86 assembly (clang, -O0):
<star>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x2a,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<star>:
xor    %eax,%eax
cmp    $0x2a,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @star(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 42
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @star(i8 signext %0) {
%2 = icmp eq i8 %0, 42
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void pmu_adc_enable() {
  mbus_remote_register_write(0x6, 0x3B,
                             ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
                              (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) |
                              (1 << 8) | (1 << 9) | (1 << 10) | (1 << 11) |
                              (0 << 12) | (1 << 13) | (1 << 14) | (1 << 15) |
                              (1 << 16) | (1 << 17) | (1 << 18) | (1 << 19)));
  delay(200);
}


x86 assembly (clang, -O0):
<pmu_adc_enable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
mov    $0x3b,%esi
mov    $0xfefff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0xc8,%edi
call   1030 <delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_adc_enable>:
push   %rax
mov    $0x6,%edi
mov    $0x3b,%esi
mov    $0xfefff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0xc8,%edi
pop    %rax
jmp    1030 <delay@plt>

LLVM IR (-O0):
define void @pmu_adc_enable() {
%1 = call i32 @mbus_remote_register_write(i32 6, i32 59, i32 1044479)
%2 = call i32 @delay(i32 200)
ret void
}

LLVM IR (-O2):
define void @pmu_adc_enable() {
%1 = tail call i32 @mbus_remote_register_write(i32 6, i32 59, i32 1044479)
%2 = tail call i32 @delay(i32 200)
ret void
}
void GPIOPinIntWakeUpEnable(unsigned int baseAdd, unsigned int swakeupLine,
                            unsigned int pinNumber) {
  if ((0x0) == swakeupLine) {
    (*((volatile unsigned int *)(baseAdd + (0x44 + (0 * 4))))) |=
        (1 << pinNumber);
  } else {
    (*((volatile unsigned int *)(baseAdd + (0x44 + (1 * 4))))) |=
        (1 << pinNumber);
  }
}


x86 assembly (clang, -O0):
<GPIOPinIntWakeUpEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%eax
jne    1135 <GPIOPinIntWakeUpEnable+0x35>
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    -0x4(%rbp),%eax
add    $0x44,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
jmp    114d <GPIOPinIntWakeUpEnable+0x4d>
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    -0x4(%rbp),%eax
add    $0x48,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinIntWakeUpEnable>:
mov    %edx,%ecx
xor    %eax,%eax
test   %esi,%esi
setne  %al
mov    $0x1,%edx
shl    %cl,%edx
lea    (%rdi,%rax,4),%eax
add    $0x44,%eax
or     %edx,(%rax)
ret

LLVM IR (-O0):
define void @GPIOPinIntWakeUpEnable(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = icmp eq i32 0, %7
br i1 %8, label %9, label %18
9: ; preds = %3
%10 = load i32, i32* %6
%11 = shl i32 1, %10
%12 = load i32, i32* %4
%13 = add i32 %12, 68
%14 = zext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
%16 = load volatile i32, i32* %15
%17 = or i32 %16, %11
store volatile i32 %17, i32* %15
br label %27
18: ; preds = %3
%19 = load i32, i32* %6
%20 = shl i32 1, %19
%21 = load i32, i32* %4
%22 = add i32 %21, 72
%23 = zext i32 %22 to i64
%24 = inttoptr i64 %23 to i32*
%25 = load volatile i32, i32* %24
%26 = or i32 %25, %20
store volatile i32 %26, i32* %24
br label %27
27: ; preds = %18, %9
ret void
}

LLVM IR (-O2):
define void @GPIOPinIntWakeUpEnable(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
%5 = shl nuw i32 1, %2
%6 = select i1 %4, i32 68, i32 72
%7 = add i32 %6, %0
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = or i32 %10, %5
store volatile i32 %11, i32* %9
ret void
}
/* Type definitions */
struct xhda_codec {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fixup_via_mic_boost(struct xhda_codec *, int,
                                       int /*<<< orphan*/, int, int);
int /*<<< orphan*/ fixup_via_mixer(struct xhda_codec *, int, int);
void fixup_vt1718S(struct xhda_codec *codec) {
  fixup_via_mic_boost(codec, 0x2b, 0, 3, 40);
  fixup_via_mic_boost(codec, 0x29, 0, 3, 40);
  fixup_via_mixer(codec, 0x21, 0x08);
}


x86 assembly (clang, -O0):
<fixup_vt1718S>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2b,%esi
xor    %edx,%edx
mov    $0x3,%ecx
mov    $0x28,%r8d
call   1040 <fixup_via_mic_boost@plt>
mov    -0x8(%rbp),%rdi
mov    $0x29,%esi
xor    %edx,%edx
mov    $0x3,%ecx
mov    $0x28,%r8d
call   1040 <fixup_via_mic_boost@plt>
mov    -0x8(%rbp),%rdi
mov    $0x21,%esi
mov    $0x8,%edx
call   1030 <fixup_via_mixer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fixup_vt1718S>:
push   %rbx
mov    %rdi,%rbx
mov    $0x2b,%esi
xor    %edx,%edx
mov    $0x3,%ecx
mov    $0x28,%r8d
call   1040 <fixup_via_mic_boost@plt>
mov    %rbx,%rdi
mov    $0x29,%esi
xor    %edx,%edx
mov    $0x3,%ecx
mov    $0x28,%r8d
call   1040 <fixup_via_mic_boost@plt>
mov    %rbx,%rdi
mov    $0x21,%esi
mov    $0x8,%edx
pop    %rbx
jmp    1030 <fixup_via_mixer@plt>

LLVM IR (-O0):
%struct.xhda_codec = type { i32 }
define void @fixup_vt1718S(%struct.xhda_codec* %0) {
%2 = alloca %struct.xhda_codec*
store %struct.xhda_codec* %0, %struct.xhda_codec** %2
%3 = load %struct.xhda_codec*, %struct.xhda_codec** %2
%4 = call i32 @fixup_via_mic_boost(%struct.xhda_codec* %3, i32 43, i32 0, i32 3, i32 40)
%5 = load %struct.xhda_codec*, %struct.xhda_codec** %2
%6 = call i32 @fixup_via_mic_boost(%struct.xhda_codec* %5, i32 41, i32 0, i32 3, i32 40)
%7 = load %struct.xhda_codec*, %struct.xhda_codec** %2
%8 = call i32 @fixup_via_mixer(%struct.xhda_codec* %7, i32 33, i32 8)
ret void
}

LLVM IR (-O2):
%struct.xhda_codec = type { i32 }
define void @fixup_vt1718S(%struct.xhda_codec* %0) {
%2 = tail call i32 @fixup_via_mic_boost(%struct.xhda_codec* %0, i32 43, i32 0, i32 3, i32 40)
%3 = tail call i32 @fixup_via_mic_boost(%struct.xhda_codec* %0, i32 41, i32 0, i32 3, i32 40)
%4 = tail call i32 @fixup_via_mixer(%struct.xhda_codec* %0, i32 33, i32 8)
ret void
}
void(*signal(int sig)) { return 0; }


x86 assembly (clang, -O0):
<signal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signal>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @signal(i32 %0) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void yyerror(char const *s) {
  fprintf(stderr, "Error: %s\n", s);
  exit(0);
}


x86 assembly (clang, -O0):
<yyerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<yyerror>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [11 x i8] c"Error: %s\0A\00"
define void @yyerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [11 x i8] c"Error: %s\0A\00"
define void @yyerror(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 0)
unreachable
}
void exit(int s) {
_EXIT:
  goto _EXIT;
}


x86 assembly (clang, -O0):
<exit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <exit+0x7>

x86 assembly (clang, -O2):
<exit>:
jmp    1100 <exit>

LLVM IR (-O0):
define void @exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
}

LLVM IR (-O2):
define void @exit(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ EBADF;
int /*<<< orphan*/ errno;
int dup2(int fd1, int fd2) {
  errno = EBADF;
  return -1;
}


x86 assembly (clang, -O0):
<dup2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ec7(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec6(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dup2>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EBADF = global i32 0
@errno = global i32 0
define i32 @dup2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @EBADF
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EBADF = global i32 0
@errno = global i32 0
define i32 @dup2(i32 %0, i32 %1) {
%3 = load i32, i32* @EBADF
store i32 %3, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ bfont_draw_thin(void *, int, int, int, int /*<<< orphan*/);
void bfont_draw(void *buffer, int bufwidth, int opaque, int c) {
  bfont_draw_thin(buffer, bufwidth, opaque, c, 0);
}


x86 assembly (clang, -O0):
<bfont_draw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
xor    %r8d,%r8d
call   1030 <bfont_draw_thin@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bfont_draw>:
xor    %r8d,%r8d
jmp    1030 <bfont_draw_thin@plt>

LLVM IR (-O0):
define void @bfont_draw(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @bfont_draw_thin(i8* %9, i32 %10, i32 %11, i32 %12, i32 0)
ret void
}

LLVM IR (-O2):
define void @bfont_draw(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @bfont_draw_thin(i8* %0, i32 %1, i32 %2, i32 %3, i32 0)
ret void
}
int f(int b, int c) {
  if (b != 0 && b != 1 && c != 0)
    b = 0;
  return b;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     112f <f+0x2f>
cmpl   $0x1,-0x4(%rbp)
je     112f <f+0x2f>
cmpl   $0x0,-0x8(%rbp)
je     112f <f+0x2f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
test   %esi,%esi
cmove  %edi,%eax
cmp    $0x2,%edi
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp ne i32 %8, 1
br i1 %9, label %10, label %14
10: ; preds = %7
%11 = load i32, i32* %4
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10
store i32 0, i32* %3
br label %14
14: ; preds = %13, %10, %7, %2
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @f(i32 %0, i32 %1) {
%3 = icmp ugt i32 %0, 1
%4 = icmp ne i32 %1, 0
%5 = and i1 %3, %4
%6 = select i1 %5, i32 0, i32 %0
ret i32 %6
}
char *replace_char(char w, char r, char *string) {
  int i;
  for (i = 0; 0 != string[i]; i++) {
    if (string[i] == w) {
      string[i] = r;
    }
  }
  return string;
}


x86 assembly (clang, -O0):
<replace_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    %rdx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     116a <replace_char+0x6a>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0x1(%rbp),%ecx
cmp    %ecx,%eax
jne    1157 <replace_char+0x57>
mov    -0x2(%rbp),%dl
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
jmp    115c <replace_char+0x5c>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    111b <replace_char+0x1b>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<replace_char>:
mov    %rdx,%rax
mov    (%rdx),%cl
test   %cl,%cl
je     1126 <replace_char+0x26>
lea    0x1(%rax),%rdx
jmp    111b <replace_char+0x1b>
nop
movzbl (%rdx),%ecx
add    $0x1,%rdx
test   %cl,%cl
je     1126 <replace_char+0x26>
cmp    %dil,%cl
jne    1110 <replace_char+0x10>
mov    %sil,-0x1(%rdx)
jmp    1110 <replace_char+0x10>
ret

LLVM IR (-O0):
define i8* @replace_char(i8 signext %0, i8 signext %1, i8* %2) {
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8*
%7 = alloca i32
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8* %2, i8** %6
store i32 0, i32* %7
br label %8
8: ; preds = %33, %3
%9 = load i8*, i8** %6
%10 = load i32, i32* %7
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp ne i32 0, %14
br i1 %15, label %16, label %36
16: ; preds = %8
%17 = load i8*, i8** %6
%18 = load i32, i32* %7
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = load i8, i8* %4
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %22, %24
br i1 %25, label %26, label %32
26: ; preds = %16
%27 = load i8, i8* %5
%28 = load i8*, i8** %6
%29 = load i32, i32* %7
%30 = sext i32 %29 to i64
%31 = getelementptr inbounds i8, i8* %28, i64 %30
store i8 %27, i8* %31
br label %32
32: ; preds = %26, %16
br label %33
33: ; preds = %32
%34 = load i32, i32* %7
%35 = add nsw i32 %34, 1
store i32 %35, i32* %7
br label %8
36: ; preds = %8
%37 = load i8*, i8** %6
ret i8* %37
}

LLVM IR (-O2):
define i8* @replace_char(i8 signext %0, i8 signext %1, i8* returned %2) {
%4 = load i8, i8* %2
%5 = icmp eq i8 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %3, %12
%7 = phi i64 [ %13, %12 ], [ 0, %3 ]
%8 = phi i8 [ %15, %12 ], [ %4, %3 ]
%9 = phi i8* [ %14, %12 ], [ %2, %3 ]
%10 = icmp eq i8 %8, %0
br i1 %10, label %11, label %12
11: ; preds = %6
store i8 %1, i8* %9
br label %12
12: ; preds = %6, %11
%13 = add nuw i64 %7, 1
%14 = getelementptr inbounds i8, i8* %2, i64 %13
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 0
br i1 %16, label %17, label %6
17: ; preds = %12, %3
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ cpc_key_press(int);
int /*<<< orphan*/ cpc_key_unpress(int);
void Joy_Alpha_Right(int value) {
  if (value) {
    cpc_key_press(0x93);
  } else {
    cpc_key_unpress(0x93);
  };
}


x86 assembly (clang, -O0):
<Joy_Alpha_Right>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1144 <Joy_Alpha_Right+0x24>
mov    $0x93,%edi
call   1030 <cpc_key_press@plt>
jmp    114e <Joy_Alpha_Right+0x2e>
mov    $0x93,%edi
call   1040 <cpc_key_unpress@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Joy_Alpha_Right>:
test   %edi,%edi
je     112e <Joy_Alpha_Right+0xe>
mov    $0x93,%edi
jmp    1030 <cpc_key_press@plt>
mov    $0x93,%edi
jmp    1040 <cpc_key_unpress@plt>

LLVM IR (-O0):
define void @Joy_Alpha_Right(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @cpc_key_press(i32 147)
br label %9
7: ; preds = %1
%8 = call i32 @cpc_key_unpress(i32 147)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @Joy_Alpha_Right(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @cpc_key_press(i32 147)
br label %7
5: ; preds = %1
%6 = tail call i32 @cpc_key_unpress(i32 147)
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ERR(char *, char const *, int, int);
void assert_n(int n, int max, const char *s) {
  if (n > max)
    ERR("%s: n = %d > max = %d", s, n, max);
}


x86 assembly (clang, -O0):
<assert_n>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1144 <assert_n+0x34>
mov    -0x10(%rbp),%rsi
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%ecx
lea    0xec1(%rip),%rdi
call   1030 <ERR@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_n>:
cmp    %esi,%edi
jle    1129 <assert_n+0x19>
mov    %esi,%ecx
mov    %edi,%eax
lea    0xee1(%rip),%rdi
mov    %rdx,%rsi
mov    %eax,%edx
jmp    1030 <ERR@plt>
ret

LLVM IR (-O0):
@.str = [22 x i8] c"%s: n = %d > max = %d\00"
define void @assert_n(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = icmp sgt i32 %7, %8
br i1 %9, label %10, label %15
10: ; preds = %3
%11 = load i8*, i8** %6
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = call i32 @ERR(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %11, i32 %12, i32 %13)
br label %15
15: ; preds = %10, %3
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"%s: n = %d > max = %d\00"
define void @assert_n(i32 %0, i32 %1, i8* %2) {
%4 = icmp sgt i32 %0, %1
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = tail call i32 @ERR(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %2, i32 %0, i32 %1)
br label %7
7: ; preds = %5, %3
ret void
}
/* Variables and functions */
int SSL_CTX_check_private_key(void const *);
int dv_openssl_ctx_check_private_key(const void *ctx) {
  int ret = 0;
  ret = SSL_CTX_check_private_key(ctx);
  if (ret == 0) {
    return (-1);
  }
  return 0;
}


x86 assembly (clang, -O0):
<dv_openssl_ctx_check_private_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <SSL_CTX_check_private_key@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    1145 <dv_openssl_ctx_check_private_key+0x35>
movl   $0xffffffff,-0x4(%rbp)
jmp    114c <dv_openssl_ctx_check_private_key+0x3c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dv_openssl_ctx_check_private_key>:
push   %rax
call   1030 <SSL_CTX_check_private_key@plt>
cmp    $0x1,%eax
sbb    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @dv_openssl_ctx_check_private_key(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @SSL_CTX_check_private_key(i8* %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @dv_openssl_ctx_check_private_key(i8* %0) {
%2 = tail call i32 @SSL_CTX_check_private_key(i8* %0)
%3 = icmp eq i32 %2, 0
%4 = sext i1 %3 to i32
ret i32 %4
}
int test_imm_8Fint64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x8F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Fint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x8f,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Fint64_midword_mem>:
testb  $0x8f,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Fint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 143
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_8Fint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 9371648
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}