#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void EMACIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags) {
  uint32_t ui32Mask;
  ASSERT(ui32Base == 0x400EC000);
  ASSERT((ui32IntFlags &
          ~(0x00004000 | 0x00002000 | 0x00000400 | 0x00000200 | 0x00000100 |
            0x00000080 | 0x00000040 | 0x00000020 | 0x00000010 | 0x00000008 |
            0x00000004 | 0x00000002 | 0x00000001 | 0x00010000 | 0x00008000 |
            0x80000000)) == 0);
  ui32Mask = (*((volatile uint32_t *)(ui32Base + 0x00000C1C)));
  ui32Mask &= ~(ui32IntFlags & ~0x80000000);
  if (!(ui32Mask & (0x00000001 | 0x00000040 | 0x00004000 | 0x00000004))) {
    ui32Mask &= ~0x00010000;
  }
  if (!(ui32Mask &
        (0x00000002 | 0x00000008 | 0x00000010 | 0x00000020 | 0x00000080 |
         0x00000100 | 0x00000200 | 0x00000400 | 0x00002000))) {
    ui32Mask &= ~0x00008000;
  }
  (*((volatile uint32_t *)(ui32Base + 0x00000C1C))) = ui32Mask;
  if (ui32IntFlags & 0x80000000) {
    (*((volatile uint32_t *)(ui32Base + 0x00000FD4))) &= ~0x00000001;
  }
}


x86 assembly (clang, -O0):
<EMACIntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x400ec000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%eax
and    $0x7ffe1800,%eax
cmp    $0x0,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0xc1c,%eax
cltq
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0x7fffffff,%eax
xor    $0xffffffff,%eax
and    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x4045,%eax
cmp    $0x0,%eax
jne    1186 <EMACIntDisable+0x76>
mov    -0xc(%rbp),%eax
and    $0xfffeffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x27ba,%eax
cmp    $0x0,%eax
jne    11a2 <EMACIntDisable+0x92>
mov    -0xc(%rbp),%eax
and    $0xffff7fff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0xc1c,%eax
cltq
mov    %ecx,(%rax)
mov    -0x8(%rbp),%eax
and    $0x80000000,%eax
cmp    $0x0,%eax
je     11d3 <EMACIntDisable+0xc3>
mov    -0x4(%rbp),%eax
add    $0xfd4,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EMACIntDisable>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
mov    %esi,%ebx
not    %ebx
xor    %edi,%edi
cmp    $0x400ec000,%ebp
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
test   $0x7ffe1800,%r14d
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebp,%rax
or     $0x80000000,%ebx
and    0xc1c(%rax),%ebx
mov    %ebx,%ecx
and    $0xfffeffff,%ecx
test   $0x4045,%ebx
cmovne %ebx,%ecx
mov    %ecx,%edx
and    $0xffff7fff,%edx
test   $0x27ba,%ecx
cmovne %ecx,%edx
mov    %edx,0xc1c(%rax)
test   %r14d,%r14d
jns    1183 <EMACIntDisable+0x73>
andl   $0xfffffffe,0xfd4(%rax)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @EMACIntDisable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 1074708480
%8 = zext i1 %7 to i32
%9 = call i32 @ASSERT(i32 %8)
%10 = load i32, i32* %4
%11 = and i32 %10, 2147358720
%12 = icmp eq i32 %11, 0
%13 = zext i1 %12 to i32
%14 = call i32 @ASSERT(i32 %13)
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 3100
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i32*
%19 = load volatile i32, i32* %18
store i32 %19, i32* %5
%20 = load i32, i32* %4
%21 = and i32 %20, 2147483647
%22 = xor i32 %21, -1
%23 = load i32, i32* %5
%24 = and i32 %23, %22
store i32 %24, i32* %5
%25 = load i32, i32* %5
%26 = and i32 %25, 16453
%27 = icmp ne i32 %26, 0
br i1 %27, label %31, label %28
28: ; preds = %2
%29 = load i32, i32* %5
%30 = and i32 %29, -65537
store i32 %30, i32* %5
br label %31
31: ; preds = %28, %2
%32 = load i32, i32* %5
%33 = and i32 %32, 10170
%34 = icmp ne i32 %33, 0
br i1 %34, label %38, label %35
35: ; preds = %31
%36 = load i32, i32* %5
%37 = and i32 %36, -32769
store i32 %37, i32* %5
br label %38
38: ; preds = %35, %31
%39 = load i32, i32* %5
%40 = load i32, i32* %3
%41 = add nsw i32 %40, 3100
%42 = sext i32 %41 to i64
%43 = inttoptr i64 %42 to i32*
store volatile i32 %39, i32* %43
%44 = load i32, i32* %4
%45 = and i32 %44, -2147483648
%46 = icmp ne i32 %45, 0
br i1 %46, label %47, label %54
47: ; preds = %38
%48 = load i32, i32* %3
%49 = add nsw i32 %48, 4052
%50 = sext i32 %49 to i64
%51 = inttoptr i64 %50 to i32*
%52 = load volatile i32, i32* %51
%53 = and i32 %52, -2
store volatile i32 %53, i32* %51
br label %54
54: ; preds = %47, %38
ret void
}

LLVM IR (-O2):
define void @EMACIntDisable(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 1074708480
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = and i32 %1, 2147358720
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = add nsw i32 %0, 3100
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
%14 = and i32 %1, 2147483647
%15 = xor i32 %14, -1
%16 = and i32 %13, %15
%17 = and i32 %16, 16453
%18 = icmp eq i32 %17, 0
%19 = and i32 %16, -65537
%20 = select i1 %18, i32 %19, i32 %16
%21 = and i32 %20, 10170
%22 = icmp eq i32 %21, 0
%23 = and i32 %20, -32769
%24 = select i1 %22, i32 %23, i32 %20
store volatile i32 %24, i32* %12
%25 = icmp sgt i32 %1, -1
br i1 %25, label %32, label %26
26: ; preds = %2
%27 = add nsw i32 %0, 4052
%28 = sext i32 %27 to i64
%29 = inttoptr i64 %28 to i32*
%30 = load volatile i32, i32* %29
%31 = and i32 %30, -2
store volatile i32 %31, i32* %29
br label %32
32: ; preds = %26, %2
ret void
}