xunge/DecIR huggingface dataset:
char *cpApgGPLNotice() {
  static char *apg_cpApgGPLNotice =
      "  This program is free software: you can redistribute it and/or modify\n"
      "  it under the terms of the GNU General Public License as published by\n"
      "  the Free Software Foundation, either version 2 of the License, or\n"
      "  (at your option) any later version.\n"
      "\n"
      "  This program is distributed in the hope that it will be useful,\n"
      "  but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
      "  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n"
      "  GNU General Public License for more details.\n"
      "\n"
      "  You should have received a copy of the GNU General Public License\n"
      "  along with this program.  If not, see\n"
      "  <http://www.gnu.org/licenses/old-licenses/gpl-2.0.html>\n"
      "  or write to the Free Software Foundation, Inc.,\n"
      "  51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.\n";
  return apg_cpApgGPLNotice;
}


x86 assembly (clang, -O0):
<cpApgGPLNotice>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpApgGPLNotice>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@cpApgGPLNotice.apg_cpApgGPLNotice = internal global i8* getelementptr inbounds ([773 x i8], [773 x i8]* @.str, i32 0, i32 0)
@.str = [773 x i8] c" This program is free software: you can redistribute it and/or modify\0A it under the terms of the GNU General Public License as published by\0A the Free Software Foundation, either version 2 of the License, or\0A (at your option) any later version.\0A\0A This program is distributed in the hope that it will be useful,\0A but WITHOUT ANY WARRANTY; without even the implied warranty of\0A MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\0A GNU General Public License for more details.\0A\0A You should have received a copy of the GNU General Public License\0A along with this program. If not, see\0A <http://www.gnu.org/licenses/old-licenses/gpl-2.0.html>\0A or write to the Free Software Foundation, Inc.,\0A 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\0A\00"
define i8* @cpApgGPLNotice() {
%1 = load i8*, i8** @cpApgGPLNotice.apg_cpApgGPLNotice
ret i8* %1
}

LLVM IR (-O2):
@.str = [773 x i8] c" This program is free software: you can redistribute it and/or modify\0A it under the terms of the GNU General Public License as published by\0A the Free Software Foundation, either version 2 of the License, or\0A (at your option) any later version.\0A\0A This program is distributed in the hope that it will be useful,\0A but WITHOUT ANY WARRANTY; without even the implied warranty of\0A MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\0A GNU General Public License for more details.\0A\0A You should have received a copy of the GNU General Public License\0A along with this program. If not, see\0A <http://www.gnu.org/licenses/old-licenses/gpl-2.0.html>\0A or write to the Free Software Foundation, Inc.,\0A 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\0A\00"
define i8* @cpApgGPLNotice() {
ret i8* getelementptr inbounds ([773 x i8], [773 x i8]* @.str, i64 0, i64 0)
}
unsigned char get_RAT_response_data_length(unsigned int length) {
  return (unsigned char)length - 15;
}


x86 assembly (clang, -O0):
<get_RAT_response_data_length>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movzbl %al,%eax
sub    $0xf,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_RAT_response_data_length>:
lea    -0xf(%rdi),%eax
ret

LLVM IR (-O0):
define zeroext i8 @get_RAT_response_data_length(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
%5 = zext i8 %4 to i32
%6 = sub nsw i32 %5, 15
%7 = trunc i32 %6 to i8
ret i8 %7
}

LLVM IR (-O2):
define zeroext i8 @get_RAT_response_data_length(i32 %0) {
%2 = trunc i32 %0 to i8
%3 = add i8 %2, -15
ret i8 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void init_timing() {
  printf("# Using "
         "rdtscpl"
         " to start and "
         "rdtscpl"
         " to end measurement\n");
}


x86 assembly (clang, -O0):
<init_timing>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_timing>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [57 x i8] c"# Using rdtscpl to start and rdtscpl to end measurement\0A\00"
define void @init_timing() {
%1 = call i32 @printf(i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [56 x i8] c"# Using rdtscpl to start and rdtscpl to end measurement\00"
define void @init_timing() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([56 x i8], [56 x i8]* @str, i64 0, i64 0))
ret void
}
int setbits(unsigned int x, unsigned int p, unsigned int n, int y) {
  unsigned int a, b;
  a = ~(~(~0 << n) << p);
  b = ((~(~1 << (n - 1)) & y) << p);
  return x & a | b;
}


x86 assembly (clang, -O0):
<setbits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
mov    $0xfffffffe,%eax
shl    %cl,%eax
xor    $0xffffffff,%eax
and    -0x10(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
and    -0x14(%rbp),%eax
or     -0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setbits>:
mov    %ecx,%r8d
mov    $0xffffffff,%eax
mov    %edx,%ecx
shl    %cl,%eax
not    %eax
mov    %esi,%ecx
shl    %cl,%eax
lea    -0x1(%rdx),%ecx
mov    $0xfffffffe,%edx
shl    %cl,%edx
not    %edx
and    %r8d,%edx
mov    %esi,%ecx
shl    %cl,%edx
not    %eax
and    %edi,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%11 = load i32, i32* %7
%12 = shl i32 -1, %11
%13 = xor i32 %12, -1
%14 = load i32, i32* %6
%15 = shl i32 %13, %14
%16 = xor i32 %15, -1
store i32 %16, i32* %9
%17 = load i32, i32* %7
%18 = sub i32 %17, 1
%19 = shl i32 -2, %18
%20 = xor i32 %19, -1
%21 = load i32, i32* %8
%22 = and i32 %20, %21
%23 = load i32, i32* %6
%24 = shl i32 %22, %23
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %9
%27 = and i32 %25, %26
%28 = load i32, i32* %10
%29 = or i32 %27, %28
ret i32 %29
}

LLVM IR (-O2):
define i32 @setbits(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl nsw i32 -1, %2
%6 = xor i32 %5, -1
%7 = shl i32 %6, %1
%8 = xor i32 %7, -1
%9 = add i32 %2, -1
%10 = shl i32 -2, %9
%11 = xor i32 %10, -1
%12 = and i32 %11, %3
%13 = shl i32 %12, %1
%14 = and i32 %8, %0
%15 = or i32 %13, %14
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ MUP_setsig(int, void (*)(int));
void MFprocSetSignalHandler(int signum, void (*handler)(int)) {
  MUP_setsig(signum, handler);
}


x86 assembly (clang, -O0):
<MFprocSetSignalHandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <MUP_setsig@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MFprocSetSignalHandler>:
jmp    1030 <MUP_setsig@plt>

LLVM IR (-O0):
define void @MFprocSetSignalHandler(i32 %0, void (i32)* %1) {
%3 = alloca i32
%4 = alloca void (i32)*
store i32 %0, i32* %3
store void (i32)* %1, void (i32)** %4
%5 = load i32, i32* %3
%6 = load void (i32)*, void (i32)** %4
%7 = call i32 @MUP_setsig(i32 %5, void (i32)* %6)
ret void
}

LLVM IR (-O2):
define void @MFprocSetSignalHandler(i32 %0, void (i32)* %1) {
%3 = tail call i32 @MUP_setsig(i32 %0, void (i32)* %1)
ret void
}
/* Variables and functions */
scalar_t__ readLong();
int readInteger() { return ((int)(readLong())); }


x86 assembly (clang, -O0):
<readInteger>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <readLong@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<readInteger>:
xor    %eax,%eax
jmp    1030 <readLong@plt>

LLVM IR (-O0):
define i32 @readInteger() {
%1 = call i64 (...) @readLong()
%2 = trunc i64 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @readInteger() {
%1 = tail call i64 (...) @readLong()
%2 = trunc i64 %1 to i32
ret i32 %2
}
/* Type definitions */
struct uc_program {
  int dummy;
};

/* Variables and functions */
char uc_program_current_character(struct uc_program *);
char uc_uppercase(struct uc_program *program) {
  return uc_program_current_character(program);
}


x86 assembly (clang, -O0):
<uc_uppercase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <uc_program_current_character@plt>
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uc_uppercase>:
jmp    1030 <uc_program_current_character@plt>

LLVM IR (-O0):
%struct.uc_program = type { i32 }
define signext i8 @uc_uppercase(%struct.uc_program* %0) {
%2 = alloca %struct.uc_program*
store %struct.uc_program* %0, %struct.uc_program** %2
%3 = load %struct.uc_program*, %struct.uc_program** %2
%4 = call signext i8 @uc_program_current_character(%struct.uc_program* %3)
ret i8 %4
}

LLVM IR (-O2):
%struct.uc_program = type { i32 }
define signext i8 @uc_uppercase(%struct.uc_program* %0) {
%2 = tail call signext i8 @uc_program_current_character(%struct.uc_program* %0)
ret i8 %2
}
void rest_process(struct http_request *req) {}


x86 assembly (clang, -O0):
<rest_process>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rest_process>:
ret

LLVM IR (-O0):
%struct.http_request = type opaque
define void @rest_process(%struct.http_request* %0) {
%2 = alloca %struct.http_request*
store %struct.http_request* %0, %struct.http_request** %2
ret void
}

LLVM IR (-O2):
%struct.http_request = type opaque
define void @rest_process(%struct.http_request* nocapture %0) {
ret void
}
/* Variables and functions */
char *install(int /*<<< orphan*/);
int /*<<< orphan*/ subst_imp(char *, char **);
char *subst(char *pat, char **vars) { return install(subst_imp(pat, vars)); }


x86 assembly (clang, -O0):
<subst>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <subst_imp@plt>
mov    %eax,%edi
call   1030 <install@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<subst>:
push   %rax
call   1040 <subst_imp@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <install@plt>

LLVM IR (-O0):
define i8* @subst(i8* %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8**
store i8* %0, i8** %3
store i8** %1, i8*** %4
%5 = load i8*, i8** %3
%6 = load i8**, i8*** %4
%7 = call i32 @subst_imp(i8* %5, i8** %6)
%8 = call i8* @install(i32 %7)
ret i8* %8
}

LLVM IR (-O2):
define i8* @subst(i8* %0, i8** %1) {
%3 = tail call i32 @subst_imp(i8* %0, i8** %1)
%4 = tail call i8* @install(i32 %3)
ret i8* %4
}
/* Type definitions */
struct HashTable {
  int dummy;
};
struct HashItrCons {
  int dummy;
};
struct HashItr {
  int dummy;
};

/* Variables and functions */
scalar_t__ HashNext(struct HashTable *, struct HashItr *);
struct HashItrCons *HashNextCons(const struct HashTable *Hash,
                                 struct HashItrCons *Itr) {
  return (struct HashItrCons *)HashNext((struct HashTable *)Hash,
                                        (struct HashItr *)Itr);
}


x86 assembly (clang, -O0):
<HashNextCons>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <HashNext@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HashNextCons>:
jmp    1030 <HashNext@plt>

LLVM IR (-O0):
%struct.HashTable = type { i32 }
%struct.HashItrCons = type { i32 }
%struct.HashItr = type { i32 }
define %struct.HashItrCons* @HashNextCons(%struct.HashTable* %0, %struct.HashItrCons* %1) {
%3 = alloca %struct.HashTable*
%4 = alloca %struct.HashItrCons*
store %struct.HashTable* %0, %struct.HashTable** %3
store %struct.HashItrCons* %1, %struct.HashItrCons** %4
%5 = load %struct.HashTable*, %struct.HashTable** %3
%6 = load %struct.HashItrCons*, %struct.HashItrCons** %4
%7 = bitcast %struct.HashItrCons* %6 to %struct.HashItr*
%8 = call i64 @HashNext(%struct.HashTable* %5, %struct.HashItr* %7)
%9 = inttoptr i64 %8 to %struct.HashItrCons*
ret %struct.HashItrCons* %9
}

LLVM IR (-O2):
%struct.HashTable = type { i32 }
%struct.HashItrCons = type { i32 }
%struct.HashItr = type { i32 }
define %struct.HashItrCons* @HashNextCons(%struct.HashTable* %0, %struct.HashItrCons* %1) {
%3 = bitcast %struct.HashItrCons* %1 to %struct.HashItr*
%4 = tail call i64 @HashNext(%struct.HashTable* %0, %struct.HashItr* %3)
%5 = inttoptr i64 %4 to %struct.HashItrCons*
ret %struct.HashItrCons* %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *realloc(void *, size_t);
int /*<<< orphan*/ stderr;
void *sr_realloc(void *ptr, size_t size) {
  void *result = realloc(ptr, size);
  if (!result && size > 0) {
    fprintf(stderr, "sr_realloc: out of memory");
    exit(1);
  }
  return result;
}


x86 assembly (clang, -O0):
<sr_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1186 <sr_realloc+0x56>
cmpq   $0x0,-0x10(%rbp)
jbe    1186 <sr_realloc+0x56>
mov    0x2e72(%rip),%rax
mov    (%rax),%edi
lea    0xe89(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sr_realloc>:
push   %rbx
mov    %rsi,%rbx
call   1040 <realloc@plt>
test   %rbx,%rbx
je     1143 <sr_realloc+0x13>
test   %rax,%rax
je     1145 <sr_realloc+0x15>
pop    %rbx
ret
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
lea    0xeab(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [26 x i8] c"sr_realloc: out of memory\00"
define i8* @sr_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %18, label %11
11: ; preds = %2
%12 = load i64, i64* %4
%13 = icmp ugt i64 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %11
%15 = load i32, i32* @stderr
%16 = call i32 @fprintf(i32 %15, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%17 = call i32 @exit(i32 1)
unreachable
18: ; preds = %11, %2
%19 = load i8*, i8** %5
ret i8* %19
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [26 x i8] c"sr_realloc: out of memory\00"
define noalias i8* @sr_realloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
%5 = icmp ne i64 %1, 0
%6 = and i1 %5, %4
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* @stderr
%9 = tail call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%10 = tail call i32 @exit(i32 1)
unreachable
11: ; preds = %2
ret i8* %3
}
/* Type definitions */
struct shmid_ds {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ IPC_RMID;
int /*<<< orphan*/ free(struct shmid_ds *);
struct shmid_ds *malloc(int);
int /*<<< orphan*/ shmctl(int, int /*<<< orphan*/, struct shmid_ds *);
void post_shmget(int syscallret) {
  struct shmid_ds *shmid_ds;
  if (syscallret == -1)
    return;
  shmid_ds = malloc(sizeof(struct shmid_ds));
  shmctl(syscallret, IPC_RMID, shmid_ds);
  free(shmid_ds);
}


x86 assembly (clang, -O0):
<post_shmget>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jne    114a <post_shmget+0x1a>
jmp    1176 <post_shmget+0x46>
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2e7e(%rip),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rdx
call   1050 <shmctl@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<post_shmget>:
cmp    $0xffffffff,%edi
je     116a <post_shmget+0x3a>
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%r14
mov    0x2e91(%rip),%rax
mov    (%rax),%esi
mov    %ebx,%edi
mov    %r14,%rdx
call   1050 <shmctl@plt>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.shmid_ds = type { i32 }
@IPC_RMID = global i32 0
define void @post_shmget(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.shmid_ds*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %7
6: ; preds = %1
br label %15
7: ; preds = %1
%8 = call %struct.shmid_ds* @malloc(i32 4)
store %struct.shmid_ds* %8, %struct.shmid_ds** %3
%9 = load i32, i32* %2
%10 = load i32, i32* @IPC_RMID
%11 = load %struct.shmid_ds*, %struct.shmid_ds** %3
%12 = call i32 @shmctl(i32 %9, i32 %10, %struct.shmid_ds* %11)
%13 = load %struct.shmid_ds*, %struct.shmid_ds** %3
%14 = call i32 @free(%struct.shmid_ds* %13)
br label %15
15: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
%struct.shmid_ds = type { i32 }
@IPC_RMID = global i32 0
define void @post_shmget(i32 %0) {
%2 = icmp eq i32 %0, -1
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call %struct.shmid_ds* @malloc(i32 4)
%5 = load i32, i32* @IPC_RMID
%6 = tail call i32 @shmctl(i32 %0, i32 %5, %struct.shmid_ds* %4)
%7 = tail call i32 @free(%struct.shmid_ds* %4)
br label %8
8: ; preds = %1, %3
ret void
}
float _Complex sub_float_rc(float a, float _Complex b) { return a - b; }


x86 assembly (clang, -O0):
<sub_float_rc>:
push   %rbp
mov    %rsp,%rbp
movlpd %xmm1,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm1
movss  -0x10(%rbp),%xmm0
subss  %xmm0,%xmm1
movaps 0xedd(%rip),%xmm2
movss  -0xc(%rbp),%xmm0
pxor   %xmm2,%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0x4(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub_float_rc>:
subss  %xmm1,%xmm0
shufps $0x55,%xmm1,%xmm1
xorps  0xef1(%rip),%xmm1
unpcklps %xmm1,%xmm0
ret

LLVM IR (-O0):
define <2 x float> @sub_float_rc(float %0, <2 x float> %1) {
%3 = alloca { float, float }
%4 = alloca { float, float }
%5 = alloca float
%6 = bitcast { float, float }* %4 to <2 x float>*
store <2 x float> %1, <2 x float>* %6
store float %0, float* %5
%7 = load float, float* %5
%8 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 0
%9 = load float, float* %8
%10 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 1
%11 = load float, float* %10
%12 = fsub float %7, %9
%13 = fneg float %11
%14 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 0
%15 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 1
store float %12, float* %14
store float %13, float* %15
%16 = bitcast { float, float }* %3 to <2 x float>*
%17 = load <2 x float>, <2 x float>* %16
ret <2 x float> %17
}

LLVM IR (-O2):
define <2 x float> @sub_float_rc(float %0, <2 x float> %1) {
%3 = extractelement <2 x float> %1, i64 0
%4 = extractelement <2 x float> %1, i64 1
%5 = fsub float %0, %3
%6 = fneg float %4
%7 = insertelement <2 x float> undef, float %5, i64 0
%8 = insertelement <2 x float> %7, float %6, i64 1
ret <2 x float> %8
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
scalar_t__ scanf(char *, char *);
int main() {
  char b;
  while (scanf("%2hhx", &b) >= 0)
    putchar(b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x5(%rbp),%rsi
call   1040 <scanf@plt>
cmp    $0x0,%rax
jl     1157 <main+0x37>
movsbl -0x5(%rbp),%edi
call   1030 <putchar@plt>
jmp    112f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
lea    0xed5(%rip),%rdi
lea    0x7(%rsp),%rsi
call   1040 <scanf@plt>
test   %rax,%rax
js     116a <main+0x4a>
lea    0xebf(%rip),%r14
lea    0x7(%rsp),%rbx
cs nopw 0x0(%rax,%rax,1)
movsbl 0x7(%rsp),%edi
call   1030 <putchar@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <scanf@plt>
test   %rax,%rax
jns    1150 <main+0x30>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%2hhx\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
br label %3
3: ; preds = %6, %0
%4 = call i64 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %2)
%5 = icmp sge i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i8, i8* %2
%8 = call i32 @putchar(i8 signext %7)
br label %3
9: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%2hhx\00"
define i32 @main() {
%1 = alloca i8
%2 = call i64 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %1)
%3 = icmp sgt i64 %2, -1
br i1 %3, label %4, label %9
4: ; preds = %0, %4
%5 = load i8, i8* %1
%6 = call i32 @putchar(i8 signext %5)
%7 = call i64 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %1)
%8 = icmp sgt i64 %7, -1
br i1 %8, label %4, label %9
9: ; preds = %4, %0
ret i32 0
}
/* Type definitions */
struct szm_ctx {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct szm_ctx *);
void szm_fini(struct szm_ctx *ctx) {
  if (ctx != NULL)
    free(ctx);
  return;
}


x86 assembly (clang, -O0):
<szm_fini>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <szm_fini+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<szm_fini>:
test   %rdi,%rdi
je     111a <szm_fini+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
%struct.szm_ctx = type { i32 }
define void @szm_fini(%struct.szm_ctx* %0) {
%2 = alloca %struct.szm_ctx*
store %struct.szm_ctx* %0, %struct.szm_ctx** %2
%3 = load %struct.szm_ctx*, %struct.szm_ctx** %2
%4 = icmp ne %struct.szm_ctx* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load %struct.szm_ctx*, %struct.szm_ctx** %2
%7 = call i32 @free(%struct.szm_ctx* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
%struct.szm_ctx = type { i32 }
define void @szm_fini(%struct.szm_ctx* %0) {
%2 = icmp eq %struct.szm_ctx* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(%struct.szm_ctx* %0)
br label %5
5: ; preds = %3, %1
ret void
}
void av_get_output_timestamp() {}


x86 assembly (clang, -O0):
<av_get_output_timestamp>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_get_output_timestamp>:
ret

LLVM IR (-O0):
define void @av_get_output_timestamp() {
ret void
}

LLVM IR (-O2):
define void @av_get_output_timestamp() {
ret void
}
unsigned xrop3_176_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~S;
  stk2 = D | stk3;
  stk1 = T & stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_176_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_176_1_1>:
mov    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_176_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = or i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %7
%29 = load i32, i32* %9
%30 = and i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %7
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %6
%40 = and i32 %38, %39
%41 = or i32 %37, %40
%42 = load i32, i32* %5
%43 = load i32, i32* %7
%44 = and i32 %42, %43
%45 = or i32 %41, %44
ret i32 %45
}

LLVM IR (-O2):
define i32 @xrop3_176_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = or i8 %1, %0
%4 = zext i8 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ checkRetVal(int, char *);
int system(char *);
void resetConsole() {
  int retVal = system("reset");
  checkRetVal(retVal, "Could not reset the screen.");
}


x86 assembly (clang, -O0):
<resetConsole>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <system@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xec5(%rip),%rsi
call   1040 <checkRetVal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resetConsole>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <system@plt>
lea    0xed2(%rip),%rsi
mov    %eax,%edi
pop    %rax
jmp    1040 <checkRetVal@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"reset\00"
@.str.1 = [28 x i8] c"Could not reset the screen.\00"
define void @resetConsole() {
%1 = alloca i32
%2 = call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @checkRetVal(i32 %3, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"reset\00"
@.str.1 = [28 x i8] c"Could not reset the screen.\00"
define void @resetConsole() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @checkRetVal(i32 %1, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str.1, i64 0, i64 0))
ret void
}
long long calc_tzcnt_u64(long long src) {
  int i;
  int res = 0;
  while ((res < 64) && ((src & 1) == 0)) {
    ++res;
    src >>= 1;
  }
  return res;
}


x86 assembly (clang, -O0):
<calc_tzcnt_u64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
xor    %eax,%eax
cmpl   $0x40,-0x10(%rbp)
mov    %al,-0x11(%rbp)
jge    1130 <calc_tzcnt_u64+0x30>
mov    -0x8(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1140 <calc_tzcnt_u64+0x40>
jmp    115a <calc_tzcnt_u64+0x5a>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    110f <calc_tzcnt_u64+0xf>
movslq -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_tzcnt_u64>:
xor    %eax,%eax
test   $0x1,%dil
jne    112c <calc_tzcnt_u64+0x2c>
nopl   0x0(%rax,%rax,1)
mov    %eax,%ecx
add    $0x1,%rax
cmp    $0x3e,%ecx
ja     112c <calc_tzcnt_u64+0x2c>
mov    %rdi,%rcx
sar    %rcx
and    $0x2,%edi
test   %rdi,%rdi
mov    %rcx,%rdi
je     1110 <calc_tzcnt_u64+0x10>
ret

LLVM IR (-O0):
define i64 @calc_tzcnt_u64(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %4
br label %5
5: ; preds = %14, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 64
br i1 %7, label %8, label %12
8: ; preds = %5
%9 = load i64, i64* %2
%10 = and i64 %9, 1
%11 = icmp eq i64 %10, 0
br label %12
12: ; preds = %8, %5
%13 = phi i1 [ false, %5 ], [ %11, %8 ]
br i1 %13, label %14, label %19
14: ; preds = %12
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
store i32 %16, i32* %4
%17 = load i64, i64* %2
%18 = ashr i64 %17, 1
store i64 %18, i64* %2
br label %5
19: ; preds = %12
%20 = load i32, i32* %4
%21 = sext i32 %20 to i64
ret i64 %21
}

LLVM IR (-O2):
define i64 @calc_tzcnt_u64(i64 %0) {
%2 = and i64 %0, 1
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %15
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi i64 [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i32 %5, 1
%8 = ashr i64 %6, 1
%9 = icmp ult i32 %5, 63
%10 = and i64 %6, 2
%11 = icmp eq i64 %10, 0
%12 = select i1 %9, i1 %11, i1 false
br i1 %12, label %4, label %13
13: ; preds = %4
%14 = zext i32 %7 to i64
br label %15
15: ; preds = %13, %1
%16 = phi i64 [ 0, %1 ], [ %14, %13 ]
ret i64 %16
}
lower(c) register int c;
{
  if (isupper(c))
    return (tolower(c));
  return (c);
}


x86 assembly (clang, -O0):
<lower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <isupper@plt>
cmp    $0x0,%eax
je     114c <lower+0x2c>
mov    -0x8(%rbp),%edi
call   1030 <tolower@plt>
mov    %eax,-0x4(%rbp)
jmp    1152 <lower+0x32>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lower>:
push   %rbx
mov    %edi,%ebx
call   1040 <isupper@plt>
test   %eax,%eax
je     1134 <lower+0x14>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <tolower@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @lower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @isupper(i32 %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = call i32 @tolower(i32 %8)
store i32 %9, i32* %2
br label %12
10: ; preds = %1
%11 = load i32, i32* %3
store i32 %11, i32* %2
br label %12
12: ; preds = %10, %7
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @lower(i32 %0) {
%2 = tail call i32 @isupper(i32 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @tolower(i32 %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ %5, %4 ], [ %0, %1 ]
ret i32 %7
}
/* Type definitions */
struct page {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ zero_user_segments(struct page *, unsigned int, unsigned int,
                                      int /*<<< orphan*/, int /*<<< orphan*/);
__attribute__((always_)) void zero_user_segment(struct page *page,
                                                unsigned start, unsigned end) {
  zero_user_segments(page, start, end, 0, 0);
}


x86 assembly (clang, -O0):
<zero_user_segment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
xor    %r8d,%r8d
mov    %r8d,%ecx
call   1030 <zero_user_segments@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero_user_segment>:
xor    %ecx,%ecx
xor    %r8d,%r8d
jmp    1030 <zero_user_segments@plt>

LLVM IR (-O0):
%struct.page = type { i32 }
define void @zero_user_segment(%struct.page* %0, i32 %1, i32 %2) {
%4 = alloca %struct.page*
%5 = alloca i32
%6 = alloca i32
store %struct.page* %0, %struct.page** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.page*, %struct.page** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @zero_user_segments(%struct.page* %7, i32 %8, i32 %9, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
%struct.page = type { i32 }
define void @zero_user_segment(%struct.page* %0, i32 %1, i32 %2) {
%4 = tail call i32 @zero_user_segments(%struct.page* %0, i32 %1, i32 %2, i32 0, i32 0)
ret void
}
/* Variables and functions */
double pow(double, int);
double r2(double *x) { return pow(x[0], 2) + pow(x[1], 2) - 16; }


x86 assembly (clang, -O0):
<r2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
addsd  %xmm1,%xmm0
movsd  0xea6(%rip),%xmm1
subsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<r2>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movsd  (%rdi),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
movsd  %xmm0,0x8(%rsp)
movsd  0x8(%rbx),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
addsd  0x8(%rsp),%xmm0
addsd  0xeb7(%rip),%xmm0
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @r2(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = call double @pow(double %5, i32 2)
%7 = load double*, double** %2
%8 = getelementptr inbounds double, double* %7, i64 1
%9 = load double, double* %8
%10 = call double @pow(double %9, i32 2)
%11 = fadd double %6, %10
%12 = fsub double %11, 1.600000e+01
ret double %12
}

LLVM IR (-O2):
define double @r2(double* nocapture %0) {
%2 = load double, double* %0
%3 = tail call double @pow(double %2, i32 2)
%4 = getelementptr inbounds double, double* %0, i64 1
%5 = load double, double* %4
%6 = tail call double @pow(double %5, i32 2)
%7 = fadd double %3, %6
%8 = fadd double %7, -1.600000e+01
ret double %8
}
/* Variables and functions */
scalar_t__ ft_isupper(int);
int ft_tolower(int c) {
  if (c < -128 || c > 255 || c == -1)
    return (c);
  if (ft_isupper(c))
    c += 32;
  return (c);
}


x86 assembly (clang, -O0):
<ft_tolower>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0xffffff80,-0x8(%rbp)
jl     113c <ft_tolower+0x2c>
cmpl   $0xff,-0x8(%rbp)
jg     113c <ft_tolower+0x2c>
cmpl   $0xffffffff,-0x8(%rbp)
jne    1147 <ft_tolower+0x37>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1168 <ft_tolower+0x58>
mov    -0x8(%rbp),%edi
call   1030 <ft_isupper@plt>
cmp    $0x0,%rax
je     1162 <ft_tolower+0x52>
mov    -0x8(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_tolower>:
push   %rbx
mov    %edi,%ebx
cmp    $0xffffffff,%edi
je     1137 <ft_tolower+0x27>
lea    -0x100(%rbx),%eax
cmp    $0xfffffe80,%eax
jb     1137 <ft_tolower+0x27>
mov    %ebx,%edi
call   1030 <ft_isupper@plt>
lea    0x20(%rbx),%ecx
test   %rax,%rax
cmove  %ebx,%ecx
mov    %ecx,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ft_tolower(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, -128
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 255
br i1 %8, label %12, label %9
9: ; preds = %6
%10 = load i32, i32* %3
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %14
12: ; preds = %9, %6, %1
%13 = load i32, i32* %3
store i32 %13, i32* %2
br label %23
14: ; preds = %9
%15 = load i32, i32* %3
%16 = call i64 @ft_isupper(i32 %15)
%17 = icmp ne i64 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %14
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 32
store i32 %20, i32* %3
br label %21
21: ; preds = %18, %14
%22 = load i32, i32* %3
store i32 %22, i32* %2
br label %23
23: ; preds = %21, %12
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @ft_tolower(i32 %0) {
%2 = add i32 %0, -256
%3 = icmp ult i32 %2, -384
%4 = icmp eq i32 %0, -1
%5 = or i1 %4, %3
br i1 %5, label %11, label %6
6: ; preds = %1
%7 = tail call i64 @ft_isupper(i32 %0)
%8 = icmp eq i64 %7, 0
%9 = add nsw i32 %0, 32
%10 = select i1 %8, i32 %0, i32 %9
br label %11
11: ; preds = %1, %6
%12 = phi i32 [ %10, %6 ], [ %0, %1 ]
ret i32 %12
}
/* Variables and functions */
int bwputc(char);
int /*<<< orphan*/ bwputx(char);
int bwputr(unsigned int reg) {
  int byte;
  char *ch = (char *)&reg;
  for (byte = 3; byte >= 0; byte--)
    bwputx(ch[byte]);
  return bwputc(' ');
}


x86 assembly (clang, -O0):
<bwputr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x3,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1163 <bwputr+0x43>
mov    -0x10(%rbp),%rax
movslq -0x8(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1040 <bwputx@plt>
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
jmp    113a <bwputr+0x1a>
mov    $0x20,%edi
call   1030 <bwputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bwputr>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebp
mov    %edi,%r14d
shr    $0x8,%r14d
mov    %edi,%ebx
shr    $0x10,%ebx
sar    $0x18,%edi
call   1040 <bwputx@plt>
movsbl %bl,%edi
call   1040 <bwputx@plt>
movsbl %r14b,%edi
call   1040 <bwputx@plt>
movsbl %bpl,%edi
call   1040 <bwputx@plt>
mov    $0x20,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <bwputc@plt>

LLVM IR (-O0):
define i32 @bwputr(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %2
%5 = bitcast i32* %2 to i8*
store i8* %5, i8** %4
store i32 3, i32* %3
br label %6
6: ; preds = %16, %1
%7 = load i32, i32* %3
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %19
9: ; preds = %6
%10 = load i8*, i8** %4
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = call i32 @bwputx(i8 signext %14)
br label %16
16: ; preds = %9
%17 = load i32, i32* %3
%18 = add nsw i32 %17, -1
store i32 %18, i32* %3
br label %6
19: ; preds = %6
%20 = call i32 @bwputc(i8 signext 32)
ret i32 %20
}

LLVM IR (-O2):
define i32 @bwputr(i32 %0) {
%2 = trunc i32 %0 to i8
%3 = lshr i32 %0, 8
%4 = trunc i32 %3 to i8
%5 = lshr i32 %0, 16
%6 = trunc i32 %5 to i8
%7 = lshr i32 %0, 24
%8 = trunc i32 %7 to i8
%9 = tail call i32 @bwputx(i8 signext %8)
%10 = tail call i32 @bwputx(i8 signext %6)
%11 = tail call i32 @bwputx(i8 signext %4)
%12 = tail call i32 @bwputx(i8 signext %2)
%13 = tail call i32 @bwputc(i8 signext 32)
ret i32 %13
}
/* Variables and functions */
int dmp_tm_lifecycle_finalize();
int dmp_tm_finalize(void) { return dmp_tm_lifecycle_finalize(); }


x86 assembly (clang, -O0):
<dmp_tm_finalize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <dmp_tm_lifecycle_finalize@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmp_tm_finalize>:
xor    %eax,%eax
jmp    1030 <dmp_tm_lifecycle_finalize@plt>

LLVM IR (-O0):
define i32 @dmp_tm_finalize() {
%1 = call i32 (...) @dmp_tm_lifecycle_finalize()
ret i32 %1
}

LLVM IR (-O2):
define i32 @dmp_tm_finalize() {
%1 = tail call i32 (...) @dmp_tm_lifecycle_finalize()
ret i32 %1
}
/* Variables and functions */
int setgid(int);
int g_setgid(int pid) { return setgid(pid); }


x86 assembly (clang, -O0):
<g_setgid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <setgid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_setgid>:
jmp    1030 <setgid@plt>

LLVM IR (-O0):
define i32 @g_setgid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @setgid(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @g_setgid(i32 %0) {
%2 = tail call i32 @setgid(i32 %0)
ret i32 %2
}
int test_imm_B3int32_reg(int val) { return ((val) & (0xB3 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_B3int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xb3,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B3int32_reg>:
test   $0xb3,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B3int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 179
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_B3int32_reg(i32 %0) {
%2 = and i32 %0, 179
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __startrek_write_nxtcolorsensor_data_mode(unsigned char);
void ecrobot_set_nxtcolorsensor(unsigned char port_id, unsigned char mode) {
  {
    __startrek_write_nxtcolorsensor_data_mode(mode);
    return;
  }
}


x86 assembly (clang, -O0):
<ecrobot_set_nxtcolorsensor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%edi
call   1030 <__startrek_write_nxtcolorsensor_data_mode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ecrobot_set_nxtcolorsensor>:
mov    %esi,%edi
jmp    1030 <__startrek_write_nxtcolorsensor_data_mode@plt>

LLVM IR (-O0):
define void @ecrobot_set_nxtcolorsensor(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = call i32 @__startrek_write_nxtcolorsensor_data_mode(i8 zeroext %5)
ret void
}

LLVM IR (-O2):
define void @ecrobot_set_nxtcolorsensor(i8 zeroext %0, i8 zeroext %1) {
%3 = tail call i32 @__startrek_write_nxtcolorsensor_data_mode(i8 zeroext %1)
ret void
}
/* Variables and functions */
char getchar();
int /*<<< orphan*/ printf(char *, char);
int main() {
  char c, r;
  c = getchar();
  r = 'z' - (c - 'a');
  printf("%c\n", r);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getchar@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%ecx
sub    $0x61,%ecx
mov    $0x7a,%eax
sub    %ecx,%eax
mov    %al,-0x6(%rbp)
lea    0xeaf(%rip),%rdi
movsbl -0x6(%rbp),%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
mov    $0xdb,%cl
sub    %al,%cl
movsbl %cl,%esi
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
store i32 0, i32* %1
%4 = call signext i8 (...) @getchar()
store i8 %4, i8* %2
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = sub nsw i32 %6, 97
%8 = sub nsw i32 122, %7
%9 = trunc i32 %8 to i8
store i8 %9, i8* %3
%10 = load i8, i8* %3
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%c\0A\00"
define i32 @main() {
%1 = tail call signext i8 (...) @getchar()
%2 = sub i8 -37, %1
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %2)
ret i32 0
}
int fun1291() { return 1291; }


x86 assembly (clang, -O0):
<fun1291>:
push   %rbp
mov    %rsp,%rbp
mov    $0x50b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1291>:
mov    $0x50b,%eax
ret

LLVM IR (-O0):
define i32 @fun1291() {
ret i32 1291
}

LLVM IR (-O2):
define i32 @fun1291() {
ret i32 1291
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int /*<<< orphan*/ LC_ALL;
int /*<<< orphan*/ brsh_init();
int /*<<< orphan*/ brsh_runloop();
int /*<<< orphan*/ brsh_shutdown(int /*<<< orphan*/);
int /*<<< orphan*/ setlocale(int /*<<< orphan*/, char *);
void brsh(void) {
  setlocale(LC_ALL, "");
  brsh_init();
  brsh_runloop();
  brsh_shutdown(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<brsh>:
push   %rbp
mov    %rsp,%rbp
mov    0x2e8d(%rip),%rax
mov    (%rax),%edi
lea    0xeac(%rip),%rsi
call   1060 <setlocale@plt>
mov    $0x0,%al
call   1030 <brsh_init@plt>
mov    $0x0,%al
call   1050 <brsh_runloop@plt>
mov    0x2e72(%rip),%rax
mov    (%rax),%edi
call   1040 <brsh_shutdown@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<brsh>:
push   %rax
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
lea    0xeaf(%rip),%rsi
call   1060 <setlocale@plt>
xor    %eax,%eax
call   1030 <brsh_init@plt>
xor    %eax,%eax
call   1050 <brsh_runloop@plt>
mov    0x2e75(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <brsh_shutdown@plt>

LLVM IR (-O0):
@LC_ALL = global i32 0
@.str = [1 x i8] zeroinitializer
@EXIT_SUCCESS = global i32 0
define void @brsh() {
%1 = load i32, i32* @LC_ALL
%2 = call i32 @setlocale(i32 %1, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @brsh_init()
%4 = call i32 (...) @brsh_runloop()
%5 = load i32, i32* @EXIT_SUCCESS
%6 = call i32 @brsh_shutdown(i32 %5)
ret void
}

LLVM IR (-O2):
@LC_ALL = global i32 0
@.str = [1 x i8] zeroinitializer
@EXIT_SUCCESS = global i32 0
define void @brsh() {
%1 = load i32, i32* @LC_ALL
%2 = tail call i32 @setlocale(i32 %1, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @brsh_init()
%4 = tail call i32 (...) @brsh_runloop()
%5 = load i32, i32* @EXIT_SUCCESS
%6 = tail call i32 @brsh_shutdown(i32 %5)
ret void
}
void wifi_default(const void *v) {}


x86 assembly (clang, -O0):
<wifi_default>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_default>:
ret

LLVM IR (-O0):
define void @wifi_default(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @wifi_default(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int strlen(char *);
int resSize(char *sig) { return sig[strlen(sig) - 1] != 'V'; }


x86 assembly (clang, -O0):
<resSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x56,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resSize>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
movslq %eax,%rcx
xor    %eax,%eax
cmpb   $0x56,-0x1(%rcx,%rbx,1)
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @resSize(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
%6 = sub nsw i32 %5, 1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %3, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 86
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @resSize(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, -1
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 86
%8 = zext i1 %7 to i32
ret i32 %8
}