xunge/DecIR huggingface dataset:
int platform_udc_clk_init(struct platform_device *pdev) { return 0; }


x86 assembly (clang, -O0):
<platform_udc_clk_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_udc_clk_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.platform_device = type opaque
define i32 @platform_udc_clk_init(%struct.platform_device* %0) {
%2 = alloca %struct.platform_device*
store %struct.platform_device* %0, %struct.platform_device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.platform_device = type opaque
define i32 @platform_udc_clk_init(%struct.platform_device* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ drp_disable(int);
int /*<<< orphan*/ drp_set(int, int);
void drp_unwatch(int which) {
  drp_set(0x0, which);
  drp_disable(which);
}


x86 assembly (clang, -O0):
<drp_unwatch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
xor    %edi,%edi
call   1040 <drp_set@plt>
mov    -0x4(%rbp),%edi
call   1030 <drp_disable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drp_unwatch>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
mov    %ebx,%esi
call   1040 <drp_set@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <drp_disable@plt>

LLVM IR (-O0):
define void @drp_unwatch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @drp_set(i32 0, i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @drp_disable(i32 %5)
ret void
}

LLVM IR (-O2):
define void @drp_unwatch(i32 %0) {
%2 = tail call i32 @drp_set(i32 0, i32 %0)
%3 = tail call i32 @drp_disable(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int main() {
  int i;
  for (i = 0; i < 10; i++) {
    const int a = i;
  }
  assert(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    1144 <main+0x34>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %edi,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %4
4: ; preds = %9, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
store i32 %8, i32* %3
br label %9
9: ; preds = %7
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %4
12: ; preds = %4
%13 = call i32 @assert(i32 0)
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ add_event_all(int, int /*<<< orphan*/ *);
void ev_audio_start() { add_event_all(0x13, NULL); }


x86 assembly (clang, -O0):
<ev_audio_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x13,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <add_event_all@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ev_audio_start>:
mov    $0x13,%edi
xor    %esi,%esi
jmp    1030 <add_event_all@plt>

LLVM IR (-O0):
define void @ev_audio_start() {
%1 = call i32 @add_event_all(i32 19, i32* null)
ret void
}

LLVM IR (-O2):
define void @ev_audio_start() {
%1 = tail call i32 @add_event_all(i32 19, i32* null)
ret void
}
int Arith_div(int x, int y) {
  if (-13 / 5 == -2 && (x < 0) != (y < 0) && x % y != 0)
    return x / y - 1;
  else
    return x / y;
}


x86 assembly (clang, -O0):
<Arith_div>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
cmpl   $0x0,-0xc(%rbp)
setl   %cl
and    $0x1,%cl
movzbl %cl,%ecx
cmp    %ecx,%eax
je     114d <Arith_div+0x4d>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
je     114d <Arith_div+0x4d>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1157 <Arith_div+0x57>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Arith_div>:
mov    %esi,%eax
xor    %edi,%eax
js     110c <Arith_div+0xc>
mov    %edi,%eax
cltd
idiv   %esi
ret
mov    %edi,%eax
cltd
idiv   %esi
test   %edx,%edx
je     1106 <Arith_div+0x6>
mov    %edi,%eax
cltd
idiv   %esi
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @Arith_div(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
%8 = zext i1 %7 to i32
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
%11 = zext i1 %10 to i32
%12 = icmp ne i32 %8, %11
br i1 %12, label %13, label %23
13: ; preds = %2
%14 = load i32, i32* %4
%15 = load i32, i32* %5
%16 = srem i32 %14, %15
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %23
18: ; preds = %13
%19 = load i32, i32* %4
%20 = load i32, i32* %5
%21 = sdiv i32 %19, %20
%22 = sub nsw i32 %21, 1
store i32 %22, i32* %3
br label %27
23: ; preds = %13, %2
%24 = load i32, i32* %4
%25 = load i32, i32* %5
%26 = sdiv i32 %24, %25
store i32 %26, i32* %3
br label %27
27: ; preds = %23, %18
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @Arith_div(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = icmp sgt i32 %3, -1
br i1 %4, label %11, label %5
5: ; preds = %2
%6 = srem i32 %0, %1
%7 = icmp eq i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %5
%9 = sdiv i32 %0, %1
%10 = add nsw i32 %9, -1
br label %13
11: ; preds = %5, %2
%12 = sdiv i32 %0, %1
br label %13
13: ; preds = %11, %8
%14 = phi i32 [ %10, %8 ], [ %12, %11 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ local_func();
void func() { local_func(); }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <local_func@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
xor    %eax,%eax
jmp    1030 <local_func@plt>

LLVM IR (-O0):
define void @func() {
%1 = call i32 (...) @local_func()
ret void
}

LLVM IR (-O2):
define void @func() {
%1 = tail call i32 (...) @local_func()
ret void
}
/* Variables and functions */
scalar_t__ isnan(float);
int __ocl_isgreater_float(float src1, float src2) {
  return (isnan(src1) || isnan(src2)) ? 0 : src1 > src2;
}


x86 assembly (clang, -O0):
<__ocl_isgreater_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <isnan@plt>
cmp    $0x0,%rax
jne    114a <__ocl_isgreater_float+0x3a>
movss  -0x8(%rbp),%xmm0
call   1030 <isnan@plt>
cmp    $0x0,%rax
je     1154 <__ocl_isgreater_float+0x44>
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
jmp    1168 <__ocl_isgreater_float+0x58>
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_isgreater_float>:
push   %rbx
sub    $0x10,%rsp
movss  %xmm1,0x8(%rsp)
movss  %xmm0,0xc(%rsp)
call   1030 <isnan@plt>
xor    %ebx,%ebx
test   %rax,%rax
jne    114d <__ocl_isgreater_float+0x3d>
movss  0x8(%rsp),%xmm0
call   1030 <isnan@plt>
test   %rax,%rax
jne    114d <__ocl_isgreater_float+0x3d>
xor    %ebx,%ebx
movss  0xc(%rsp),%xmm0
ucomiss 0x8(%rsp),%xmm0
seta   %bl
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @__ocl_isgreater_float(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = call i64 @isnan(float %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = load float, float* %4
%10 = call i64 @isnan(float %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8, %2
br label %18
13: ; preds = %8
%14 = load float, float* %3
%15 = load float, float* %4
%16 = fcmp ogt float %14, %15
%17 = zext i1 %16 to i32
br label %18
18: ; preds = %13, %12
%19 = phi i32 [ 0, %12 ], [ %17, %13 ]
ret i32 %19
}

LLVM IR (-O2):
define i32 @__ocl_isgreater_float(float %0, float %1) {
%3 = tail call i64 @isnan(float %0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = tail call i64 @isnan(float %1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = fcmp ogt float %0, %1
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %2, %5, %8
%12 = phi i32 [ %10, %8 ], [ 0, %5 ], [ 0, %2 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ FixCRR();
int /*<<< orphan*/ SyncPRG();
void Mapper210_StateRestore(int version) {
  SyncPRG();
  FixCRR();
}


x86 assembly (clang, -O0):
<Mapper210_StateRestore>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <SyncPRG@plt>
mov    $0x0,%al
call   1030 <FixCRR@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mapper210_StateRestore>:
push   %rax
xor    %eax,%eax
call   1040 <SyncPRG@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <FixCRR@plt>

LLVM IR (-O0):
define void @Mapper210_StateRestore(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @SyncPRG()
%4 = call i32 (...) @FixCRR()
ret void
}

LLVM IR (-O2):
define void @Mapper210_StateRestore(i32 %0) {
%2 = tail call i32 (...) @SyncPRG()
%3 = tail call i32 (...) @FixCRR()
ret void
}
void TestExpectLtFail(void) {
  TestExpect("(1) < (1)",
             "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
             "2022-01-22/02-19-57/repos/google/makani/refs/heads/master/"
             "avionics/firmware/test/test_test.c",
             __func__, 162, (1) < (1));
}


x86 assembly (clang, -O0):
<TestExpectLtFail>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee8(%rip),%rsi
lea    0xf7e(%rip),%rdx
mov    $0xa2,%ecx
xor    %r8d,%r8d
mov    $0x0,%al
call   1030 <TestExpect@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestExpectLtFail>:
lea    0xee9(%rip),%rdi
lea    0xeec(%rip),%rsi
lea    0xf82(%rip),%rdx
mov    $0xa2,%ecx
xor    %r8d,%r8d
xor    %eax,%eax
jmp    1030 <TestExpect@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"(1) < (1)\00"
@.str.1 = [157 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/google/makani/refs/heads/master/avionics/firmware/test/test_test.c\00"
@__func__.TestExpectLtFail = [17 x i8] c"TestExpectLtFail\00"
define void @TestExpectLtFail() {
%1 = call i32 (i8*, i8*, i8*, i32, i32, ...) bitcast (i32 (...)* @TestExpect to i32 (i8*, i8*, i8*, i32, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([157 x i8], [157 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.TestExpectLtFail, i64 0, i64 0), i32 162, i32 0)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"(1) < (1)\00"
@.str.1 = [157 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/google/makani/refs/heads/master/avionics/firmware/test/test_test.c\00"
@__func__.TestExpectLtFail = [17 x i8] c"TestExpectLtFail\00"
define void @TestExpectLtFail() {
%1 = tail call i32 (i8*, i8*, i8*, i32, i32, ...) bitcast (i32 (...)* @TestExpect to i32 (i8*, i8*, i8*, i32, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([157 x i8], [157 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.TestExpectLtFail, i64 0, i64 0), i32 162, i32 0)
ret void
}
int fun803() { return 803; }


x86 assembly (clang, -O0):
<fun803>:
push   %rbp
mov    %rsp,%rbp
mov    $0x323,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun803>:
mov    $0x323,%eax
ret

LLVM IR (-O0):
define i32 @fun803() {
ret i32 803
}

LLVM IR (-O2):
define i32 @fun803() {
ret i32 803
}
void cmdshell_end(void) { ; }


x86 assembly (clang, -O0):
<cmdshell_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmdshell_end>:
ret

LLVM IR (-O0):
define void @cmdshell_end() {
ret void
}

LLVM IR (-O2):
define void @cmdshell_end() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_key_t;

/* Variables and functions */
int pthread_setspecific(int /*<<< orphan*/, void const *);
int setspecific(pthread_key_t key, const void *value) {
  if (pthread_setspecific)
    return pthread_setspecific(key, value);
  return 0;
}


x86 assembly (clang, -O0):
<setspecific>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%al
test   $0x1,%al
jne    112e <setspecific+0x1e>
jmp    1142 <setspecific+0x32>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <pthread_setspecific@plt>
mov    %eax,-0x4(%rbp)
jmp    1149 <setspecific+0x39>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setspecific>:
jmp    1030 <pthread_setspecific@plt>

LLVM IR (-O0):
define i32 @setspecific(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
br i1 true, label %6, label %10
6: ; preds = %2
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = call i32 @pthread_setspecific(i32 %7, i8* %8)
store i32 %9, i32* %3
br label %11
10: ; preds = %2
store i32 0, i32* %3
br label %11
11: ; preds = %10, %6
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @setspecific(i32 %0, i8* %1) {
%3 = tail call i32 @pthread_setspecific(i32 %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
double pow(int, double);
double lowerEdge(double center, int frac) {
  return center / pow(10, (3.0 / (10.0 * 2 * frac)));
}


x86 assembly (clang, -O0):
<lowerEdge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
cvtsi2sdl -0xc(%rbp),%xmm0
movsd  0xed1(%rip),%xmm1
mulsd  %xmm0,%xmm1
movsd  0xebd(%rip),%xmm0
divsd  %xmm1,%xmm0
mov    $0xa,%edi
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lowerEdge>:
push   %rax
movsd  %xmm0,(%rsp)
cvtsi2sd %edi,%xmm1
mulsd  0xede(%rip),%xmm1
movsd  0xede(%rip),%xmm0
divsd  %xmm1,%xmm0
mov    $0xa,%edi
call   1030 <pow@plt>
movsd  (%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @lowerEdge(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load double, double* %3
%6 = load i32, i32* %4
%7 = sitofp i32 %6 to double
%8 = fmul double 2.000000e+01, %7
%9 = fdiv double 3.000000e+00, %8
%10 = call double @pow(i32 10, double %9)
%11 = fdiv double %5, %10
ret double %11
}

LLVM IR (-O2):
define double @lowerEdge(double %0, i32 %1) {
%3 = sitofp i32 %1 to double
%4 = fmul double %3, 2.000000e+01
%5 = fdiv double 3.000000e+00, %4
%6 = tail call double @pow(i32 10, double %5)
%7 = fdiv double %0, %6
ret double %7
}
short readShort(int pos, unsigned char *cmddata) {
  return (cmddata[pos + 0] << 8) | (cmddata[pos + 1]);
}


x86 assembly (clang, -O0):
<readShort>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
add    $0x0,%ecx
movslq %ecx,%rcx
movzbl (%rax,%rcx,1),%eax
shl    $0x8,%eax
mov    -0x10(%rbp),%rcx
mov    -0x4(%rbp),%edx
add    $0x1,%edx
movslq %edx,%rdx
movzbl (%rcx,%rdx,1),%ecx
or     %ecx,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<readShort>:
movslq %edi,%rax
movzwl (%rsi,%rax,1),%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define signext i16 @readShort(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i32, i32* %3
%7 = add nsw i32 %6, 0
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %5, i64 %8
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8*, i8** %4
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %13, i64 %16
%18 = load i8, i8* %17
%19 = zext i8 %18 to i32
%20 = or i32 %12, %19
%21 = trunc i32 %20 to i16
ret i16 %21
}

LLVM IR (-O2):
define signext i16 @readShort(i32 %0, i8* nocapture %1) {
%3 = sext i32 %0 to i64
%4 = getelementptr inbounds i8, i8* %1, i64 %3
%5 = load i8, i8* %4
%6 = zext i8 %5 to i16
%7 = shl nuw i16 %6, 8
%8 = add nsw i32 %0, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %1, i64 %9
%11 = load i8, i8* %10
%12 = zext i8 %11 to i16
%13 = or i16 %7, %12
ret i16 %13
}
/* Variables and functions */
double M_PI;
double exp(double);
double sqrt(double);
double Z(double chi) {
  return exp(-1.0 * chi * chi / 2.0) / sqrt(2.0 * M_PI);
  ;
}


x86 assembly (clang, -O0):
<Z>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xed3(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xeb9(%rip),%xmm1
divsd  %xmm1,%xmm0
call   1030 <exp@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  0xea3(%rip),%xmm0
mov    0x2e84(%rip),%rax
mulsd  (%rax),%xmm0
call   1040 <sqrt@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Z>:
push   %rax
mulsd  %xmm0,%xmm0
mulsd  0xed3(%rip),%xmm0
call   1030 <exp@plt>
movapd %xmm0,%xmm2
mov    0x2eab(%rip),%rax
movsd  (%rax),%xmm0
addsd  %xmm0,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1155 <Z+0x35>
sqrtsd %xmm0,%xmm0
jmp    1164 <Z+0x44>
movsd  %xmm2,(%rsp)
call   1040 <sqrt@plt>
movsd  (%rsp),%xmm2
divsd  %xmm0,%xmm2
movapd %xmm2,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@M_PI = global double 0.000000e+00
define double @Z(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double -1.000000e+00, %3
%5 = load double, double* %2
%6 = fmul double %4, %5
%7 = fdiv double %6, 2.000000e+00
%8 = call double @exp(double %7)
%9 = load double, double* @M_PI
%10 = fmul double 2.000000e+00, %9
%11 = call double @sqrt(double %10)
%12 = fdiv double %8, %11
ret double %12
}

LLVM IR (-O2):
@M_PI = global double 0.000000e+00
define double @Z(double %0) {
%2 = fneg double %0
%3 = fmul double %2, %0
%4 = fmul double %3, 5.000000e-01
%5 = tail call double @exp(double %4)
%6 = load double, double* @M_PI
%7 = fmul double %6, 2.000000e+00
%8 = tail call double @sqrt(double %7)
%9 = fdiv double %5, %8
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ error(char *);
int /*<<< orphan*/ exit(int);
void exit_if_null(void *ptr) {
  if (ptr == NULL) {
    error("unexpected null pointer. Out of memory?\n");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<exit_if_null>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    114d <exit_if_null+0x2d>
lea    0xec2(%rip),%rdi
call   1030 <error@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exit_if_null>:
test   %rdi,%rdi
je     1126 <exit_if_null+0x6>
ret
push   %rax
lea    0xed2(%rip),%rdi
call   1030 <error@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"unexpected null pointer. Out of memory?\0A\00"
define void @exit_if_null(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = call i32 @error(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @exit(i32 1)
unreachable
8: ; preds = %1
ret void
}

LLVM IR (-O2):
@.str = [41 x i8] c"unexpected null pointer. Out of memory?\0A\00"
define void @exit_if_null(i8* readnone %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i32 @error(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%5 = tail call i32 @exit(i32 1)
unreachable
6: ; preds = %1
ret void
}
int __ltdf2(double a __attribute__((unused)),
            double b __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<__ltdf2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ltdf2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__ltdf2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @__ltdf2(double %0, double %1) {
ret i32 0
}
double dcs_photonuclear_f2a_DRSS(double Z, double A, double F2p,
                                 double shadowing, double x) {
  return F2p * shadowing *
         (Z + (A - Z) * (1.0 + x * (-1.85 + x * (2.45 + x * (-2.35 + x)))));
}


x86 assembly (clang, -O0):
<dcs_photonuclear_f2a_DRSS>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  %xmm4,-0x28(%rbp)
movsd  -0x18(%rbp),%xmm0
mulsd  -0x20(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm1
subsd  -0x8(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm3
movsd  -0x28(%rbp),%xmm4
movsd  -0x28(%rbp),%xmm5
movsd  0xecb(%rip),%xmm6
addsd  -0x28(%rbp),%xmm6
mulsd  %xmm6,%xmm5
movsd  0xeb2(%rip),%xmm6
addsd  %xmm6,%xmm5
mulsd  %xmm5,%xmm4
movsd  0xe9a(%rip),%xmm5
addsd  %xmm5,%xmm4
mulsd  %xmm4,%xmm3
movsd  0xe82(%rip),%xmm4
addsd  %xmm4,%xmm3
mulsd  %xmm3,%xmm1
addsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dcs_photonuclear_f2a_DRSS>:
movsd  0xef8(%rip),%xmm5
addsd  %xmm4,%xmm5
mulsd  %xmm4,%xmm5
addsd  0xef0(%rip),%xmm5
mulsd  %xmm4,%xmm5
addsd  0xeec(%rip),%xmm5
mulsd  %xmm3,%xmm2
mulsd  %xmm4,%xmm5
addsd  0xee4(%rip),%xmm5
subsd  %xmm0,%xmm1
mulsd  %xmm1,%xmm5
addsd  %xmm5,%xmm0
mulsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @dcs_photonuclear_f2a_DRSS(double %0, double %1, double %2, double %3, double %4) {
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
store double %0, double* %6
store double %1, double* %7
store double %2, double* %8
store double %3, double* %9
store double %4, double* %10
%11 = load double, double* %8
%12 = load double, double* %9
%13 = fmul double %11, %12
%14 = load double, double* %6
%15 = load double, double* %7
%16 = load double, double* %6
%17 = fsub double %15, %16
%18 = load double, double* %10
%19 = load double, double* %10
%20 = load double, double* %10
%21 = load double, double* %10
%22 = fadd double -2.350000e+00, %21
%23 = call double @llvm.fmuladd.f64(double %20, double %22, double 2.450000e+00)
%24 = call double @llvm.fmuladd.f64(double %19, double %23, double -1.850000e+00)
%25 = call double @llvm.fmuladd.f64(double %18, double %24, double 1.000000e+00)
%26 = call double @llvm.fmuladd.f64(double %17, double %25, double %14)
%27 = fmul double %13, %26
ret double %27
}

LLVM IR (-O2):
define double @dcs_photonuclear_f2a_DRSS(double %0, double %1, double %2, double %3, double %4) {
%6 = fmul double %2, %3
%7 = fsub double %1, %0
%8 = fadd double %4, -2.350000e+00
%9 = tail call double @llvm.fmuladd.f64(double %4, double %8, double 2.450000e+00)
%10 = tail call double @llvm.fmuladd.f64(double %4, double %9, double -1.850000e+00)
%11 = tail call double @llvm.fmuladd.f64(double %4, double %10, double 1.000000e+00)
%12 = tail call double @llvm.fmuladd.f64(double %7, double %11, double %0)
%13 = fmul double %6, %12
ret double %13
}
void hc_a_equals_b_svector(a, b, n) float *a;
float *b;
int n;
{ memcpy(a, b, sizeof(float) * n); }


x86 assembly (clang, -O0):
<hc_a_equals_b_svector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
movslq -0x14(%rbp),%rdx
shl    $0x2,%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hc_a_equals_b_svector>:
movslq %edx,%rdx
shl    $0x2,%rdx
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @hc_a_equals_b_svector(float* %0, float* %1, i32 %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca i32
store float* %0, float** %4
store float* %1, float** %5
store i32 %2, i32* %6
%7 = load float*, float** %4
%8 = bitcast float* %7 to i8*
%9 = load float*, float** %5
%10 = bitcast float* %9 to i8*
%11 = load i32, i32* %6
%12 = sext i32 %11 to i64
%13 = mul i64 4, %12
ret void
}

LLVM IR (-O2):
define void @hc_a_equals_b_svector(float* nocapture writeonly %0, float* nocapture %1, i32 %2) {
%4 = bitcast float* %0 to i8*
%5 = bitcast float* %1 to i8*
%6 = sext i32 %2 to i64
%7 = shl nsw i64 %6, 2
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %4, i8* align 4 %5, i64 %7, i1 false)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void internal(void) { printf("internal function\n"); }


x86 assembly (clang, -O0):
<internal>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<internal>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"internal function\0A\00"
define void @internal() {
%1 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [18 x i8] c"internal function\00"
define void @internal() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
ret void
}
void b43_debugfs_add_device(struct b43_wldev *dev) {}


x86 assembly (clang, -O0):
<b43_debugfs_add_device>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<b43_debugfs_add_device>:
ret

LLVM IR (-O0):
%struct.b43_wldev = type opaque
define void @b43_debugfs_add_device(%struct.b43_wldev* %0) {
%2 = alloca %struct.b43_wldev*
store %struct.b43_wldev* %0, %struct.b43_wldev** %2
ret void
}

LLVM IR (-O2):
%struct.b43_wldev = type opaque
define void @b43_debugfs_add_device(%struct.b43_wldev* nocapture %0) {
ret void
}
void TestExpectGtFail(void) {
  TestExpect("(1) > (1)",
             "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
             "2022-01-22/02-19-57/repos/google/makani/refs/heads/master/"
             "avionics/firmware/test/test_test.c",
             __func__, 170, (1) > (1));
}


x86 assembly (clang, -O0):
<TestExpectGtFail>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee8(%rip),%rsi
lea    0xf7e(%rip),%rdx
mov    $0xaa,%ecx
xor    %r8d,%r8d
mov    $0x0,%al
call   1030 <TestExpect@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestExpectGtFail>:
lea    0xee9(%rip),%rdi
lea    0xeec(%rip),%rsi
lea    0xf82(%rip),%rdx
mov    $0xaa,%ecx
xor    %r8d,%r8d
xor    %eax,%eax
jmp    1030 <TestExpect@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"(1) > (1)\00"
@.str.1 = [157 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/google/makani/refs/heads/master/avionics/firmware/test/test_test.c\00"
@__func__.TestExpectGtFail = [17 x i8] c"TestExpectGtFail\00"
define void @TestExpectGtFail() {
%1 = call i32 (i8*, i8*, i8*, i32, i32, ...) bitcast (i32 (...)* @TestExpect to i32 (i8*, i8*, i8*, i32, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([157 x i8], [157 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.TestExpectGtFail, i64 0, i64 0), i32 170, i32 0)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"(1) > (1)\00"
@.str.1 = [157 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/google/makani/refs/heads/master/avionics/firmware/test/test_test.c\00"
@__func__.TestExpectGtFail = [17 x i8] c"TestExpectGtFail\00"
define void @TestExpectGtFail() {
%1 = tail call i32 (i8*, i8*, i8*, i32, i32, ...) bitcast (i32 (...)* @TestExpect to i32 (i8*, i8*, i8*, i32, i32, ...)*)(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([157 x i8], [157 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @__func__.TestExpectGtFail, i64 0, i64 0), i32 170, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int usage(void) {
  fprintf(stderr, "lpcboot usage\n-------------\n"
                  " lpcboot query         display information about target\n"
                  " lpcboot boot <app>    download app to ram and execute\n"
                  " lpcboot flash <app>   write app image to flash\n"
                  " lpcboot erase         erase app image\n"
                  " lpcboot reboot        reboot the bootloader\n"
                  " lpcboot app           reboot into the app in flash\n");
  return -1;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [324 x i8] c"lpcboot usage\0A-------------\0A lpcboot query display information about target\0A lpcboot boot <app> download app to ram and execute\0A lpcboot flash <app> write app image to flash\0A lpcboot erase erase app image\0A lpcboot reboot reboot the bootloader\0A lpcboot app reboot into the app in flash\0A\00"
define i32 @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([324 x i8], [324 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [324 x i8] c"lpcboot usage\0A-------------\0A lpcboot query display information about target\0A lpcboot boot <app> download app to ram and execute\0A lpcboot flash <app> write app image to flash\0A lpcboot erase erase app image\0A lpcboot reboot reboot the bootloader\0A lpcboot app reboot into the app in flash\0A\00"
define i32 @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([324 x i8], [324 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
void Hal_hook_rd_sgndrecfield(void) {}


x86 assembly (clang, -O0):
<Hal_hook_rd_sgndrecfield>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Hal_hook_rd_sgndrecfield>:
ret

LLVM IR (-O0):
define void @Hal_hook_rd_sgndrecfield() {
ret void
}

LLVM IR (-O2):
define void @Hal_hook_rd_sgndrecfield() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nsc_assert(int);
void securelevel_ge(void) {
  nsc_assert(0 && "This function is unimplemented.");
  ;
}


x86 assembly (clang, -O0):
<securelevel_ge>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<securelevel_ge>:
xor    %edi,%edi
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
define void @securelevel_ge() {
%1 = call i32 @nsc_assert(i32 0)
ret void
}

LLVM IR (-O2):
define void @securelevel_ge() {
%1 = tail call i32 @nsc_assert(i32 0)
ret void
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateIntClear(uint32_t ui32IntFlags) {

  ;
  (*((volatile unsigned long *)(0x400FC020))) |= ui32IntFlags;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateIntClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x400fc020,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x400fc020,%eax
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateIntClear>:
mov    %rdi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
or     %rax,0x400fc020
40
xor    %eax,%eax
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateIntClear(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1074774048 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1074774048 to i64*)
%6 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateIntClear(i64 %0) {
%2 = alloca i64
store volatile i64 %0, i64* %2
%3 = load volatile i64, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1074774048 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1074774048 to i64*)
%6 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}
void zero_counts_stop(double *post_gamma, double *post_pi, int V) {
  int k;
  int v;
  post_pi[0] = 0.0;
  post_pi[1] = 0.0;
  post_pi[2] = 0.0;
  for (v = 0; v <= V; v++) {
    post_gamma[v] = 0.0;
  }
}


x86 assembly (clang, -O0):
<zero_counts_stop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,0x8(%rax)
mov    -0x10(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,0x10(%rax)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jg     1163 <zero_counts_stop+0x63>
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax,%rcx,8)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1139 <zero_counts_stop+0x39>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zero_counts_stop>:
push   %rax
xorps  %xmm0,%xmm0
movups %xmm0,(%rsi)
movq   $0x0,0x10(%rsi)
test   %edx,%edx
js     1134 <zero_counts_stop+0x24>
mov    %edx,%eax
lea    0x8(,%rax,8),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @zero_counts_stop(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%9 = load double*, double** %5
%10 = getelementptr inbounds double, double* %9, i64 0
store double 0.000000e+00, double* %10
%11 = load double*, double** %5
%12 = getelementptr inbounds double, double* %11, i64 1
store double 0.000000e+00, double* %12
%13 = load double*, double** %5
%14 = getelementptr inbounds double, double* %13, i64 2
store double 0.000000e+00, double* %14
store i32 0, i32* %8
br label %15
15: ; preds = %24, %3
%16 = load i32, i32* %8
%17 = load i32, i32* %6
%18 = icmp sle i32 %16, %17
br i1 %18, label %19, label %27
19: ; preds = %15
%20 = load double*, double** %4
%21 = load i32, i32* %8
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds double, double* %20, i64 %22
store double 0.000000e+00, double* %23
br label %24
24: ; preds = %19
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %15
27: ; preds = %15
ret void
}

LLVM IR (-O2):
define void @zero_counts_stop(double* nocapture writeonly %0, double* nocapture writeonly %1, i32 %2) {
%4 = icmp slt i32 %2, 0
%5 = bitcast double* %1 to i8*
br i1 %4, label %11, label %6
6: ; preds = %3
%7 = bitcast double* %0 to i8*
%8 = zext i32 %2 to i64
%9 = shl nuw nsw i64 %8, 3
%10 = add nuw nsw i64 %9, 8
br label %11
11: ; preds = %6, %3
ret void
}
/* Variables and functions */
int RAND_bytes(unsigned char *, int);
char gen_byte(char inf, char max) {
  unsigned char result;
  int bleh;
  while ((result < inf || result > max) && !bleh) {
    bleh = RAND_bytes(&result, 1);
  }
  return result;
}


x86 assembly (clang, -O0):
<gen_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x3(%rbp),%eax
movsbl -0x1(%rbp),%ecx
cmp    %ecx,%eax
jl     1149 <gen_byte+0x39>
movzbl -0x3(%rbp),%ecx
movsbl -0x2(%rbp),%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x9(%rbp)
jle    1155 <gen_byte+0x45>
cmpl   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    1165 <gen_byte+0x55>
jmp    117b <gen_byte+0x6b>
lea    -0x3(%rbp),%rdi
mov    $0x1,%esi
call   1030 <RAND_bytes@plt>
mov    %eax,-0x8(%rbp)
jmp    1124 <gen_byte+0x14>
movsbl -0x3(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_byte>:
ret

LLVM IR (-O0):
define signext i8 @gen_byte(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
%6 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
br label %7
7: ; preds = %25, %2
%8 = load i8, i8* %5
%9 = zext i8 %8 to i32
%10 = load i8, i8* %3
%11 = sext i8 %10 to i32
%12 = icmp slt i32 %9, %11
br i1 %12, label %19, label %13
13: ; preds = %7
%14 = load i8, i8* %5
%15 = zext i8 %14 to i32
%16 = load i8, i8* %4
%17 = sext i8 %16 to i32
%18 = icmp sgt i32 %15, %17
br i1 %18, label %19, label %23
19: ; preds = %13, %7
%20 = load i32, i32* %6
%21 = icmp ne i32 %20, 0
%22 = xor i1 %21, true
br label %23
23: ; preds = %19, %13
%24 = phi i1 [ false, %13 ], [ %22, %19 ]
br i1 %24, label %25, label %27
25: ; preds = %23
%26 = call i32 @RAND_bytes(i8* %5, i32 1)
store i32 %26, i32* %6
br label %7
27: ; preds = %23
%28 = load i8, i8* %5
ret i8 %28
}

LLVM IR (-O2):
define signext i8 @gen_byte(i8 signext %0, i8 signext %1) {
ret i8 undef
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ memcpy(char *, char const *, int);
scalar_t__ strlen(char const *);
char *inistrdup(const char *s) {
  int l;
  char *dup;
  l = (int)strlen(s) + 1;
  dup = (char *)malloc(l);
  if (dup == NULL) {
    return NULL;
  }
  memcpy(dup, s, l);
  return dup;
}


x86 assembly (clang, -O0):
<inistrdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    116f <inistrdup+0x3f>
movq   $0x0,-0x8(%rbp)
jmp    1187 <inistrdup+0x57>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inistrdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
mov    %rax,%rbx
add    $0x1,%ebx
mov    %ebx,%edi
call   1050 <malloc@plt>
test   %rax,%rax
je     1161 <inistrdup+0x31>
mov    %rax,%r15
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebx,%edx
call   1040 <memcpy@plt>
jmp    1164 <inistrdup+0x34>
xor    %r15d,%r15d
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @inistrdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
%8 = trunc i64 %7 to i32
%9 = add nsw i32 %8, 1
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = call i64 @malloc(i32 %10)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %5
%13 = load i8*, i8** %5
%14 = icmp eq i8* %13, null
br i1 %14, label %15, label %16
15: ; preds = %1
store i8* null, i8** %2
br label %22
16: ; preds = %1
%17 = load i8*, i8** %5
%18 = load i8*, i8** %3
%19 = load i32, i32* %4
%20 = call i32 @memcpy(i8* %17, i8* %18, i32 %19)
%21 = load i8*, i8** %5
store i8* %21, i8** %2
br label %22
22: ; preds = %16, %15
%23 = load i8*, i8** %2
ret i8* %23
}

LLVM IR (-O2):
define i8* @inistrdup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = trunc i64 %2 to i32
%4 = add nsw i32 %3, 1
%5 = tail call i64 @malloc(i32 %4)
%6 = inttoptr i64 %5 to i8*
%7 = icmp eq i64 %5, 0
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = tail call i32 @memcpy(i8* %6, i8* %0, i32 %4)
br label %10
10: ; preds = %1, %8
%11 = phi i8* [ %6, %8 ], [ null, %1 ]
ret i8* %11
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void trifree(void *memptr) { free(memptr); }


x86 assembly (clang, -O0):
<trifree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trifree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @trifree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @trifree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *aligned_malloc(size_t alloc_size, unsigned char alignment) {
  void *buf;
  size_t *buf_addr;
  buf = malloc(alloc_size + (1 << alignment));
  buf_addr = (size_t *)buf;
  buf_addr = (size_t *)(((size_t)buf_addr & (((size_t)-1) << alignment)) +
                        (1 << alignment));
  return (void *)buf_addr;
}


x86 assembly (clang, -O0):
<aligned_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
movzbl -0x9(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
add    %rax,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movzbl -0x9(%rbp),%ecx
mov    %ecx,%ecx
mov    $0xffffffffffffffff,%rdx
shl    %cl,%rdx
mov    %rdx,%rcx
and    %rcx,%rax
movzbl -0x9(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aligned_malloc>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    $0x1,%eax
mov    %ebx,%ecx
shl    %cl,%eax
movslq %eax,%r14
add    %r14,%rdi
call   1030 <malloc@plt>
mov    %ebx,%ecx
shr    %cl,%rax
shl    %cl,%rax
add    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @aligned_malloc(i64 %0, i8 zeroext %1) {
%3 = alloca i64
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i64*
store i64 %0, i64* %3
store i8 %1, i8* %4
%7 = load i64, i64* %3
%8 = load i8, i8* %4
%9 = zext i8 %8 to i32
%10 = shl i32 1, %9
%11 = sext i32 %10 to i64
%12 = add i64 %7, %11
%13 = call i8* @malloc(i64 %12)
store i8* %13, i8** %5
%14 = load i8*, i8** %5
%15 = bitcast i8* %14 to i64*
store i64* %15, i64** %6
%16 = load i64*, i64** %6
%17 = ptrtoint i64* %16 to i64
%18 = load i8, i8* %4
%19 = zext i8 %18 to i32
%20 = zext i32 %19 to i64
%21 = shl i64 -1, %20
%22 = and i64 %17, %21
%23 = load i8, i8* %4
%24 = zext i8 %23 to i32
%25 = shl i32 1, %24
%26 = sext i32 %25 to i64
%27 = add i64 %22, %26
%28 = inttoptr i64 %27 to i64*
store i64* %28, i64** %6
%29 = load i64*, i64** %6
%30 = bitcast i64* %29 to i8*
ret i8* %30
}

LLVM IR (-O2):
define i8* @aligned_malloc(i64 %0, i8 zeroext %1) {
%3 = zext i8 %1 to i32
%4 = shl nuw i32 1, %3
%5 = sext i32 %4 to i64
%6 = add i64 %5, %0
%7 = tail call i8* @malloc(i64 %6)
%8 = ptrtoint i8* %7 to i64
%9 = zext i8 %1 to i64
%10 = shl nsw i64 -1, %9
%11 = and i64 %10, %8
%12 = add i64 %11, %5
%13 = inttoptr i64 %12 to i8*
ret i8* %13
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
int /*<<< orphan*/ system(char *);
int x5_teardown() {
  char cmd[256];
  sprintf(cmd,
          "iptables -D INPUT -p tcp -m multiport --sport 53,80 --tcp-flags "
          "SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d",
          1);
  system(cmd);
  return 0;
}


x86 assembly (clang, -O0):
<x5_teardown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    -0x100(%rbp),%rdi
lea    0xec7(%rip),%rsi
mov    $0x1,%edx
call   1040 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x5_teardown>:
push   %rbx
sub    $0x100,%rsp
lea    0xed1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x1,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [106 x i8] c"iptables -D INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x5_teardown() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%5 = call i32 @system(i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [106 x i8] c"iptables -D INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x5_teardown() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* dereferenceable(1) getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = call i32 @system(i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ArbiterP__0__ResourceDefaultOwner__default__requested();
void ArbiterP__0__ResourceDefaultOwner__requested(void) {
  ArbiterP__0__ResourceDefaultOwner__default__requested();
}


x86 assembly (clang, -O0):
<ArbiterP__0__ResourceDefaultOwner__requested>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ArbiterP__0__ResourceDefaultOwner__default__requested@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ArbiterP__0__ResourceDefaultOwner__requested>:
xor    %eax,%eax
jmp    1030 <ArbiterP__0__ResourceDefaultOwner__default__requested@plt>

LLVM IR (-O0):
define void @ArbiterP__0__ResourceDefaultOwner__requested() {
%1 = call i32 (...) @ArbiterP__0__ResourceDefaultOwner__default__requested()
ret void
}

LLVM IR (-O2):
define void @ArbiterP__0__ResourceDefaultOwner__requested() {
%1 = tail call i32 (...) @ArbiterP__0__ResourceDefaultOwner__default__requested()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stdout;
void done(char *filename) { fprintf(stdout, "Opening \'%s\'\n", filename); }


x86 assembly (clang, -O0):
<done>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<done>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [14 x i8] c"Opening '%s'\0A\00"
define void @done(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stdout
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [14 x i8] c"Opening '%s'\0A\00"
define void @done(i8* %0) {
%2 = load i32, i32* @stdout
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}