xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fib(int);
int /*<<< orphan*/ printf(char *, int, int /*<<< orphan*/);
int main(void) {
  int i = 44;
  printf("Fib(%i) = %li\n", i, fib(i));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2c,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <fib@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%edx
lea    0xeb0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2c,%edi
call   1040 <fib@plt>
lea    0xece(%rip),%rdi
mov    $0x2c,%esi
mov    %eax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Fib(%i) = %li\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 44, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @fib(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"Fib(%i) = %li\0A\00"
define i32 @main() {
%1 = tail call i32 @fib(i32 44)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 44, i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ put32(unsigned int);
int /*<<< orphan*/ put8(unsigned char);
void mov_preg64pimm32_imm8(int reg64, unsigned int imm32, unsigned char imm8) {
  put8(0xC6);
  put8(0x80 + reg64);
  put32(imm32);
  put8(imm8);
}


x86 assembly (clang, -O0):
<mov_preg64pimm32_imm8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    $0xc6,%edi
call   1030 <put8@plt>
mov    -0x4(%rbp),%eax
add    $0x80,%eax
movzbl %al,%edi
call   1030 <put8@plt>
mov    -0x8(%rbp),%edi
call   1040 <put32@plt>
movzbl -0x9(%rbp),%edi
call   1030 <put8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mov_preg64pimm32_imm8>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
mov    $0xc6,%edi
call   1030 <put8@plt>
xor    $0x80,%bl
movzbl %bl,%edi
call   1030 <put8@plt>
mov    %ebp,%edi
call   1040 <put32@plt>
mov    %r14d,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <put8@plt>

LLVM IR (-O0):
define void @mov_preg64pimm32_imm8(i32 %0, i32 %1, i8 zeroext %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8 %2, i8* %6
%7 = call i32 @put8(i8 zeroext -58)
%8 = load i32, i32* %4
%9 = add nsw i32 128, %8
%10 = trunc i32 %9 to i8
%11 = call i32 @put8(i8 zeroext %10)
%12 = load i32, i32* %5
%13 = call i32 @put32(i32 %12)
%14 = load i8, i8* %6
%15 = call i32 @put8(i8 zeroext %14)
ret void
}

LLVM IR (-O2):
define void @mov_preg64pimm32_imm8(i32 %0, i32 %1, i8 zeroext %2) {
%4 = tail call i32 @put8(i8 zeroext -58)
%5 = trunc i32 %0 to i8
%6 = xor i8 %5, -128
%7 = tail call i32 @put8(i8 zeroext %6)
%8 = tail call i32 @put32(i32 %1)
%9 = tail call i32 @put8(i8 zeroext %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void grpcsharp_auth_context_release() {
  fprintf(stderr, "Should never reach here");
  abort();
}


x86 assembly (clang, -O0):
<grpcsharp_auth_context_release>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>

x86 assembly (clang, -O2):
<grpcsharp_auth_context_release>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_auth_context_release() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @abort()
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [24 x i8] c"Should never reach here\00"
define void @grpcsharp_auth_context_release() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @abort()
unreachable
}
void RTMpGetOnlineCount(void) {}


x86 assembly (clang, -O0):
<RTMpGetOnlineCount>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMpGetOnlineCount>:
ret

LLVM IR (-O0):
define void @RTMpGetOnlineCount() {
ret void
}

LLVM IR (-O2):
define void @RTMpGetOnlineCount() {
ret void
}
void gfx_ctx_set_resize(unsigned width, unsigned height) {}


x86 assembly (clang, -O0):
<gfx_ctx_set_resize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfx_ctx_set_resize>:
ret

LLVM IR (-O0):
define void @gfx_ctx_set_resize(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @gfx_ctx_set_resize(i32 %0, i32 %1) {
ret void
}
long long uszu() { return 0x7fffffff00007fffLL; }


x86 assembly (clang, -O0):
<uszu>:
push   %rbp
mov    %rsp,%rbp
movabs $0x7fffffff00007fff,%rax
ff ff 7f
pop    %rbp
ret

x86 assembly (clang, -O2):
<uszu>:
movabs $0x7fffffff00007fff,%rax
ff ff 7f
ret

LLVM IR (-O0):
define i64 @uszu() {
ret i64 9223372032559841279
}

LLVM IR (-O2):
define i64 @uszu() {
ret i64 9223372032559841279
}
/* Variables and functions */
int is_native_iso(int);
int is_hdr_valid_iso(int iso) { return is_native_iso(iso); }


x86 assembly (clang, -O0):
<is_hdr_valid_iso>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <is_native_iso@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_hdr_valid_iso>:
jmp    1030 <is_native_iso@plt>

LLVM IR (-O0):
define i32 @is_hdr_valid_iso(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @is_native_iso(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @is_hdr_valid_iso(i32 %0) {
%2 = tail call i32 @is_native_iso(i32 %0)
ret i32 %2
}
/* Variables and functions */
int invert(unsigned int, int, int);
int /*<<< orphan*/ printf(char *, int);
main() {
  unsigned x = 0xf7;
  printf("0x%x\n", x);
  printf("0x%x\n", invert(x, 4, 2));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xf7,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xec0(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%edi
mov    $0x4,%esi
mov    $0x2,%edx
call   1030 <invert@plt>
mov    %eax,%esi
lea    0xea0(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xed8(%rip),%rbx
mov    %rbx,%rdi
mov    $0xf7,%esi
call   1040 <printf@plt>
mov    $0xf7,%edi
mov    $0x4,%esi
mov    $0x2,%edx
call   1030 <invert@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"0x%x\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 247, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i32, i32* %2
%6 = call i32 @invert(i32 %5, i32 4, i32 2)
%7 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"0x%x\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 247)
%2 = tail call i32 @invert(i32 247, i32 4, i32 2)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ memmove(char *, char *, int);
int strlen(char *);
int ini_leave_section_name(char str[]) {
  memmove(str, str + 1, strlen(str) - 2);
  str[strlen(str) - 2] = '\0';
  return 0;
}


x86 assembly (clang, -O0):
<ini_leave_section_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
sub    $0x2,%edx
call   1040 <memmove@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
sub    $0x2,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ini_leave_section_name>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0x1(%rdi),%r14
call   1030 <strlen@plt>
lea    -0x2(%rax),%edx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <memmove@plt>
mov    %rbx,%rdi
call   1030 <strlen@plt>
cltq
movb   $0x0,-0x2(%rax,%rbx,1)
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @ini_leave_section_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = load i8*, i8** %2
%7 = call i32 @strlen(i8* %6)
%8 = sub nsw i32 %7, 2
%9 = call i32 @memmove(i8* %3, i8* %5, i32 %8)
%10 = load i8*, i8** %2
%11 = load i8*, i8** %2
%12 = call i32 @strlen(i8* %11)
%13 = sub nsw i32 %12, 2
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %10, i64 %14
store i8 0, i8* %15
ret i32 0
}

LLVM IR (-O2):
define i32 @ini_leave_section_name(i8* %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = tail call i32 @strlen(i8* %0)
%4 = add nsw i32 %3, -2
%5 = tail call i32 @memmove(i8* %0, i8* %2, i32 %4)
%6 = tail call i32 @strlen(i8* %0)
%7 = add nsw i32 %6, -2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %0, i64 %8
store i8 0, i8* %9
ret i32 0
}
void noop_handler(int signo) {}


x86 assembly (clang, -O0):
<noop_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<noop_handler>:
ret

LLVM IR (-O0):
define void @noop_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @noop_handler(i32 %0) {
ret void
}
unsigned arq__min(unsigned x, unsigned y) { return (x < y) ? x : y; }


x86 assembly (clang, -O0):
<arq__min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    1121 <arq__min+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <arq__min+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arq__min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @arq__min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ult i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @arq__min(i32 %0, i32 %1) {
%3 = icmp ult i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int my_strlen(char *);
int main() {
  int l;
  l = my_strlen("abcXYZ");
  assert(l == 6);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <my_strlen@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0x6,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <my_strlen@plt>
xor    %edi,%edi
cmp    $0x6,%eax
sete   %dil
call   1040 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"abcXYZ\00"
define i32 @main() {
%1 = alloca i32
%2 = call i32 @my_strlen(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 6
%5 = zext i1 %4 to i32
%6 = call i32 @assert(i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"abcXYZ\00"
define i32 @main() {
%1 = tail call i32 @my_strlen(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = icmp eq i32 %1, 6
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret i32 0
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void *memdup(const void *in, size_t len) {
  void *out;
  if ((out = malloc(len)) == NULL)
    return NULL;
  memcpy(out, in, len);
  return out;
}


x86 assembly (clang, -O0):
<memdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x20(%rbp)
cmp    $0x0,%rax
jne    1154 <memdup+0x34>
movq   $0x0,-0x8(%rbp)
jmp    116d <memdup+0x4d>
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memdup>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
mov    %rsi,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1149 <memdup+0x29>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
call   1030 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @memdup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i64, i64* %5
%8 = call i8* @malloc(i64 %7)
store i8* %8, i8** %6
%9 = icmp eq i8* %8, null
br i1 %9, label %10, label %11
10: ; preds = %2
store i8* null, i8** %3
br label %17
11: ; preds = %2
%12 = load i8*, i8** %6
%13 = load i8*, i8** %4
%14 = load i64, i64* %5
%15 = call i32 @memcpy(i8* %12, i8* %13, i64 %14)
%16 = load i8*, i8** %6
store i8* %16, i8** %3
br label %17
17: ; preds = %11, %10
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @memdup(i8* %0, i64 %1) {
%3 = tail call i8* @malloc(i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @memcpy(i8* %3, i8* %0, i64 %1)
br label %7
7: ; preds = %2, %5
ret i8* %3
}
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn("/scratch/repos/new/home/jordi_armengol_estape/"
                        "c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/"
                        "cyclone/refs/heads/master/bin/genfiles/set.c",
                        284));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11c,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11c,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [144 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/set.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str, i64 0, i64 0), i32 284)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [144 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/set.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([144 x i8], [144 x i8]* @.str, i64 0, i64 0), i32 284)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
int dbg_create_files(struct device *dev) { return 0; }


x86 assembly (clang, -O0):
<dbg_create_files>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_create_files>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.device = type opaque
define i32 @dbg_create_files(%struct.device* %0) {
%2 = alloca %struct.device*
store %struct.device* %0, %struct.device** %2
ret i32 0
}

LLVM IR (-O2):
%struct.device = type opaque
define i32 @dbg_create_files(%struct.device* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ llog(int, char *, void *, size_t, void *);
void *realloc(void *, size_t);
int /*<<< orphan*/ xmalloc_fatal(char *, int, size_t);
void *xrealloc(void *ptr, size_t size) {
  void *p;
  if (!(p = realloc(ptr, size)))
    xmalloc_fatal("xrealloc", 1, size);
  llog(9, "xrealloc(%p, %d): %p\n", ptr, size, p);
  return p;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1170 <xrealloc+0x40>
mov    -0x10(%rbp),%rdx
lea    0xe9a(%rip),%rdi
mov    $0x1,%esi
call   1050 <xmalloc_fatal@plt>
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    $0x9,%edi
lea    0xe81(%rip),%rsi
call   1040 <llog@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
call   1030 <realloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    115c <xrealloc+0x2c>
lea    0xeb1(%rip),%rdi
mov    $0x1,%esi
mov    %r15,%rdx
call   1050 <xmalloc_fatal@plt>
lea    0xea6(%rip),%rsi
mov    $0x9,%edi
mov    %r14,%rdx
mov    %r15,%rcx
mov    %rbx,%r8
call   1040 <llog@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [9 x i8] c"xrealloc\00"
@.str.1 = [22 x i8] c"xrealloc(%p, %d): %p\0A\00"
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %13, label %10
10: ; preds = %2
%11 = load i64, i64* %4
%12 = call i32 @xmalloc_fatal(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 1, i64 %11)
br label %13
13: ; preds = %10, %2
%14 = load i8*, i8** %3
%15 = load i64, i64* %4
%16 = load i8*, i8** %5
%17 = call i32 @llog(i32 9, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i8* %14, i64 %15, i8* %16)
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
@.str = [9 x i8] c"xrealloc\00"
@.str.1 = [22 x i8] c"xrealloc(%p, %d): %p\0A\00"
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @xmalloc_fatal(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 1, i64 %1)
br label %7
7: ; preds = %5, %2
%8 = tail call i32 @llog(i32 9, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i8* %0, i64 %1, i8* %3)
ret i8* %3
}
/* Variables and functions */
int u8strlencc(char const *);
int u8strlenc(char *str) { return u8strlencc((const char *)str); }


x86 assembly (clang, -O0):
<u8strlenc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <u8strlencc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<u8strlenc>:
jmp    1030 <u8strlencc@plt>

LLVM IR (-O0):
define i32 @u8strlenc(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @u8strlencc(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @u8strlenc(i8* %0) {
%2 = tail call i32 @u8strlencc(i8* %0)
ret i32 %2
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int log2floor(uintptr_t);
uint8_t log2ceil(uintptr_t num) {
  uint8_t l = log2floor(num);
  if (num == ((uintptr_t)1) << l) {
    return l;
  } else {
    return l + 1;
  }
}


x86 assembly (clang, -O0):
<log2ceil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <log2floor@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%rdx
mov    %rdx,%rcx
cmp    %rcx,%rax
jne    114e <log2ceil+0x3e>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1157 <log2ceil+0x47>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log2ceil>:
push   %rbx
mov    %rdi,%rbx
call   1030 <log2floor@plt>
mov    $0x1,%edx
mov    %eax,%ecx
shl    %cl,%rdx
xor    %ecx,%ecx
cmp    %rbx,%rdx
setne  %cl
add    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @log2ceil(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = call i32 @log2floor(i64 %5)
store i32 %6, i32* %4
%7 = load i64, i64* %3
%8 = load i32, i32* %4
%9 = zext i32 %8 to i64
%10 = shl i64 1, %9
%11 = icmp eq i64 %7, %10
br i1 %11, label %12, label %14
12: ; preds = %1
%13 = load i32, i32* %4
store i32 %13, i32* %2
br label %17
14: ; preds = %1
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
store i32 %16, i32* %2
br label %17
17: ; preds = %14, %12
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @log2ceil(i64 %0) {
%2 = tail call i32 @log2floor(i64 %0)
%3 = zext i32 %2 to i64
%4 = shl nuw i64 1, %3
%5 = icmp ne i64 %4, %0
%6 = zext i1 %5 to i32
%7 = add nsw i32 %2, %6
ret i32 %7
}
/* Variables and functions */
long double cos(long double);
long double fun_cos(long double a) { return cos(a); }


x86 assembly (clang, -O0):
<fun_cos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <cos@plt>
fld    %st(0)
fstp   %st(0)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_cos>:
jmp    1030 <cos@plt>

LLVM IR (-O0):
define x86_fp80 @fun_cos(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @cos(x86_fp80 %3)
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @fun_cos(x86_fp80 %0) {
%2 = tail call x86_fp80 @cos(x86_fp80 %0)
ret x86_fp80 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x21() {
  Assert_real((isascii(33)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              170, ("isascii should be 1 for !"));
}


x86 assembly (clang, -O0):
<t_isascii_0x21>:
push   %rbp
mov    %rsp,%rbp
mov    $0x21,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0xaa,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x21>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0xaa,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for !\00"
define void @t_isascii_0x21() {
%1 = call i32 @isascii(i32 33)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 170, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for !\00"
define void @t_isascii_0x21() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 170, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void FIQ_Routine(void) {}


x86 assembly (clang, -O0):
<FIQ_Routine>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FIQ_Routine>:
ret

LLVM IR (-O0):
define void @FIQ_Routine() {
ret void
}

LLVM IR (-O2):
define void @FIQ_Routine() {
ret void
}
int dns_v_rel(void) { return 0x20120711; }


x86 assembly (clang, -O0):
<dns_v_rel>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20120711,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_v_rel>:
mov    $0x20120711,%eax
ret

LLVM IR (-O0):
define i32 @dns_v_rel() {
ret i32 538052369
}

LLVM IR (-O2):
define i32 @dns_v_rel() {
ret i32 538052369
}
int perfctr_cstatus_has_tsc(unsigned int cstatus) { return (int)cstatus < 0; }


x86 assembly (clang, -O0):
<perfctr_cstatus_has_tsc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<perfctr_cstatus_has_tsc>:
mov    %edi,%eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @perfctr_cstatus_has_tsc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @perfctr_cstatus_has_tsc(i32 %0) {
%2 = lshr i32 %0, 31
ret i32 %2
}
int test_imm_C8uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0xC8 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C8uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xc8,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C8uint64_lowword_reg>:
test   $0xc8,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C8uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 200
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_C8uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 200
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void acpi_pci_root_init(void) {}


x86 assembly (clang, -O0):
<acpi_pci_root_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acpi_pci_root_init>:
ret

LLVM IR (-O0):
define void @acpi_pci_root_init() {
ret void
}

LLVM IR (-O2):
define void @acpi_pci_root_init() {
ret void
}
int main(void) {
  int a = 111;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x6f,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 111, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void do_irq(void) {
  void (*the_isr)(void);
  if ((*((volatile unsigned long *)0x71200000))) {
    the_isr = (*((volatile unsigned long *)0x71200f00));
    the_isr();
    (*((volatile unsigned long *)0x7F008924)) = 0x3f;
    (*((volatile unsigned long *)0x71200f00)) = 0;
  } else if ((*((volatile unsigned long *)0x71300000))) {
    the_isr = (*((volatile unsigned long *)0x71300f00));
    the_isr();
  }
}


x86 assembly (clang, -O0):
<do_irq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x71200000,%eax
mov    (%rax),%rax
cmp    $0x0,%rax
je     1146 <do_irq+0x46>
mov    $0x71200f00,%eax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
call   *-0x8(%rbp)
mov    $0x7f008924,%eax
movq   $0x3f,(%rax)
mov    $0x71200f00,%eax
movq   $0x0,(%rax)
jmp    116c <do_irq+0x6c>
mov    $0x71300000,%eax
mov    (%rax),%rax
cmp    $0x0,%rax
je     1167 <do_irq+0x67>
mov    $0x71300f00,%eax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
call   *-0x8(%rbp)
jmp    116c <do_irq+0x6c>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_irq>:
push   %rax
cmpq   $0x0,0x71200000
je     1130 <do_irq+0x30>
mov    0x71200f00,%rax
71
call   *%rax
movq   $0x3f,0x7f008924
movq   $0x0,0x71200f00
pop    %rax
ret
cmpq   $0x0,0x71300000
je     1143 <do_irq+0x43>
pop    %rax
jmp    *0x71300f00
pop    %rax
ret

LLVM IR (-O0):
define void @do_irq() {
%1 = alloca void ()*
%2 = load volatile i64, i64* inttoptr (i64 1897922560 to i64*)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %0
%5 = load volatile i64, i64* inttoptr (i64 1897926400 to i64*)
%6 = inttoptr i64 %5 to void ()*
store void ()* %6, void ()** %1
%7 = load void ()*, void ()** %1
store volatile i64 63, i64* inttoptr (i64 2130741540 to i64*)
store volatile i64 0, i64* inttoptr (i64 1897926400 to i64*)
br label %16
8: ; preds = %0
%9 = load volatile i64, i64* inttoptr (i64 1898971136 to i64*)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %15
11: ; preds = %8
%12 = load volatile i64, i64* inttoptr (i64 1898974976 to i64*)
%13 = inttoptr i64 %12 to void ()*
store void ()* %13, void ()** %1
%14 = load void ()*, void ()** %1
br label %15
15: ; preds = %11, %8
br label %16
16: ; preds = %15, %4
ret void
}

LLVM IR (-O2):
define void @do_irq() {
%1 = load volatile i64, i64* inttoptr (i64 1897922560 to i64*)
%2 = icmp eq i64 %1, 0
br i1 %2, label %6, label %3
3: ; preds = %0
%4 = load volatile i64, i64* inttoptr (i64 1897926400 to i64*)
%5 = inttoptr i64 %4 to void ()*
tail call void %5()
store volatile i64 63, i64* inttoptr (i64 2130741540 to i64*)
store volatile i64 0, i64* inttoptr (i64 1897926400 to i64*)
br label %12
6: ; preds = %0
%7 = load volatile i64, i64* inttoptr (i64 1898971136 to i64*)
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %6
%10 = load volatile i64, i64* inttoptr (i64 1898974976 to i64*)
%11 = inttoptr i64 %10 to void ()*
tail call void %11()
br label %12
12: ; preds = %6, %9, %3
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t dtls_uint48_to_int(const unsigned char *field) {
  return ((uint64_t)field[0] << 40) | ((uint64_t)field[1] << 32) |
         ((uint64_t)field[2] << 24) | ((uint64_t)field[3] << 16) |
         ((uint64_t)field[4] << 8) | (uint64_t)field[5];
}


x86 assembly (clang, -O0):
<dtls_uint48_to_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    $0x28,%ecx
shl    %cl,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%edx
mov    $0x20,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x4(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x5(%rcx),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dtls_uint48_to_int>:
ret

LLVM IR (-O0):
define i32 @dtls_uint48_to_int(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 40
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 32
%13 = or i32 %7, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i64 2
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 24
%19 = or i32 %13, %18
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 3
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = shl i32 %23, 16
%25 = or i32 %19, %24
%26 = load i8*, i8** %2
%27 = getelementptr inbounds i8, i8* %26, i64 4
%28 = load i8, i8* %27
%29 = zext i8 %28 to i32
%30 = shl i32 %29, 8
%31 = or i32 %25, %30
%32 = load i8*, i8** %2
%33 = getelementptr inbounds i8, i8* %32, i64 5
%34 = load i8, i8* %33
%35 = zext i8 %34 to i32
%36 = or i32 %31, %35
ret i32 %36
}

LLVM IR (-O2):
define i32 @dtls_uint48_to_int(i8* nocapture readnone %0) {
ret i32 poison
}
/* Type definitions */
typedef int /*<<< orphan*/ sem_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ sem_init(int /*<<< orphan*/ *, int /*<<< orphan*/,
                            int /*<<< orphan*/);
int main(int argc, char **argv) {
  sem_t s[100];
  int i;
  for (i = 0; i < 100; i++) {
    sem_init(&s[i], 0, 0);
  }
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x1b0,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x1a4(%rbp)
cmpl   $0x64,-0x1a4(%rbp)
jge    1182 <main+0x62>
movslq -0x1a4(%rbp),%rax
lea    -0x1a0(%rbp),%rdi
shl    $0x2,%rax
add    %rax,%rdi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <sem_init@plt>
mov    -0x1a4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1a4(%rbp)
jmp    1143 <main+0x23>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x190,%rsp
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
lea    (%rsp,%rbx,1),%rdi
xor    %esi,%esi
xor    %edx,%edx
call   1030 <sem_init@plt>
add    $0x4,%rbx
cmp    $0x190,%rbx
jne    1130 <main+0x10>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [100 x i32]
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %7
br label %8
8: ; preds = %16, %2
%9 = load i32, i32* %7
%10 = icmp slt i32 %9, 100
br i1 %10, label %11, label %19
11: ; preds = %8
%12 = load i32, i32* %7
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds [100 x i32], [100 x i32]* %6, i64 0, i64 %13
%15 = call i32 @sem_init(i32* %14, i32 0, i32 0)
br label %16
16: ; preds = %11
%17 = load i32, i32* %7
%18 = add nsw i32 %17, 1
store i32 %18, i32* %7
br label %8
19: ; preds = %8
%20 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [100 x i32]
%4 = bitcast [100 x i32]* %3 to i8*
br label %5
5: ; preds = %2, %5
%6 = phi i64 [ 0, %2 ], [ %9, %5 ]
%7 = getelementptr inbounds [100 x i32], [100 x i32]* %3, i64 0, i64 %6
%8 = call i32 @sem_init(i32* %7, i32 0, i32 0)
%9 = add nuw nsw i64 %6, 1
%10 = icmp eq i64 %9, 100
br i1 %10, label %11, label %5
11: ; preds = %5
%12 = call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int regmatchInsensitive(char *, char *);
int isnetwork(char *string) { return regmatchInsensitive(string, "^network="); }


x86 assembly (clang, -O0):
<isnetwork>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <regmatchInsensitive@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isnetwork>:
lea    0xee9(%rip),%rsi
jmp    1030 <regmatchInsensitive@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"^network=\00"
define i32 @isnetwork(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @regmatchInsensitive(i8* %3, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [10 x i8] c"^network=\00"
define i32 @isnetwork(i8* %0) {
%2 = tail call i32 @regmatchInsensitive(i8* %0, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t round_up_pow_2_uint64_t(uint64_t v) {
  v--;
  v |= v >> 1;
  v |= v >> 2;
  v |= v >> 4;
  v |= v >> 8;
  v |= v >> 16;
  v |= v >> 32;
  v++;
  return v;
}


x86 assembly (clang, -O0):
<round_up_pow_2_uint64_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x2,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
or     -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_up_pow_2_uint64_t>:
ret

LLVM IR (-O0):
define i32 @round_up_pow_2_uint64_t(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, -1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 1
%7 = load i32, i32* %2
%8 = or i32 %7, %6
store i32 %8, i32* %2
%9 = load i32, i32* %2
%10 = ashr i32 %9, 2
%11 = load i32, i32* %2
%12 = or i32 %11, %10
store i32 %12, i32* %2
%13 = load i32, i32* %2
%14 = ashr i32 %13, 4
%15 = load i32, i32* %2
%16 = or i32 %15, %14
store i32 %16, i32* %2
%17 = load i32, i32* %2
%18 = ashr i32 %17, 8
%19 = load i32, i32* %2
%20 = or i32 %19, %18
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = ashr i32 %21, 16
%23 = load i32, i32* %2
%24 = or i32 %23, %22
store i32 %24, i32* %2
%25 = load i32, i32* %2
%26 = ashr i32 %25, 32
%27 = load i32, i32* %2
%28 = or i32 %27, %26
store i32 %28, i32* %2
%29 = load i32, i32* %2
%30 = add nsw i32 %29, 1
store i32 %30, i32* %2
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @round_up_pow_2_uint64_t(i32 %0) {
ret i32 poison
}
void rop3_224_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D | S;
  stk1 = T & stk2;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_224_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_224_1_0>:
or     %edx,%esi
and    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_224_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %6
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = and i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = load i8, i8* %5
%25 = zext i8 %24 to i32
%26 = xor i32 %25, -1
%27 = and i32 %23, %26
%28 = load i8*, i8** %4
%29 = load i8, i8* %28
%30 = zext i8 %29 to i32
%31 = load i8, i8* %5
%32 = zext i8 %31 to i32
%33 = and i32 %30, %32
%34 = or i32 %27, %33
%35 = trunc i32 %34 to i8
%36 = load i8*, i8** %4
store i8 %35, i8* %36
ret void
}

LLVM IR (-O2):
define void @rop3_224_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = and i8 %5, %4
store i8 %6, i8* %0
ret void
}
tbc(pn) int pn;
{ brc(pn, 'g'); }


x86 assembly (clang, -O0):
<tbc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    $0x67,%esi
mov    $0x0,%al
call   1030 <brc@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tbc>:
mov    $0x67,%esi
xor    %eax,%eax
jmp    1030 <brc@plt>

LLVM IR (-O0):
define i32 @tbc(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 (i32, i32, ...) bitcast (i32 (...)* @brc to i32 (i32, i32, ...)*)(i32 %4, i32 103)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @tbc(i32 %0) {
%2 = tail call i32 (i32, i32, ...) bitcast (i32 (...)* @brc to i32 (i32, i32, ...)*)(i32 %0, i32 103)
ret i32 undef
}
/* Variables and functions */
scalar_t__ instr_is_branch_bform(unsigned int const);
scalar_t__ instr_is_branch_iform(unsigned int const);
int has_branch_target(const unsigned int instr) {
  if (instr_is_branch_iform(instr))
    return 1;
  else if (instr_is_branch_bform(instr))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<has_branch_target>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <instr_is_branch_iform@plt>
cmp    $0x0,%rax
je     1149 <has_branch_target+0x29>
movl   $0x1,-0x4(%rbp)
jmp    1173 <has_branch_target+0x53>
mov    -0x8(%rbp),%edi
call   1030 <instr_is_branch_bform@plt>
cmp    $0x0,%rax
je     1167 <has_branch_target+0x47>
movl   $0x1,-0x4(%rbp)
jmp    1173 <has_branch_target+0x53>
jmp    116c <has_branch_target+0x4c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_branch_target>:
push   %rbx
mov    %edi,%ebx
call   1040 <instr_is_branch_iform@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <has_branch_target+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <instr_is_branch_bform@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @has_branch_target(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i64 @instr_is_branch_iform(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %15
8: ; preds = %1
%9 = load i32, i32* %3
%10 = call i64 @instr_is_branch_bform(i32 %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %2
br label %15
13: ; preds = %8
br label %14
14: ; preds = %13
store i32 0, i32* %2
br label %15
15: ; preds = %14, %12, %7
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @has_branch_target(i32 %0) {
%2 = tail call i64 @instr_is_branch_iform(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @instr_is_branch_bform(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
int pow2round(unsigned int number) {
  unsigned int temp;
  int bitCount = 0;
  temp = number;
  while (temp > 0) {
    temp = temp >> 1;
    bitCount++;
  }
  temp = 0x01 << (bitCount - 1);
  if (temp != number) {
    temp = temp << 1;
  }
  return (temp);
}


x86 assembly (clang, -O0):
<pow2round>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jbe    1135 <pow2round+0x35>
mov    -0x8(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1114 <pow2round+0x14>
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
je     115a <pow2round+0x5a>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow2round>:
mov    $0xffffffff,%ecx
test   %edi,%edi
je     111c <pow2round+0x1c>
mov    %edi,%edx
mov    %edi,%eax
nopl   (%rax)
shr    %eax
add    $0x1,%ecx
cmp    $0x1,%edx
mov    %eax,%edx
ja     1110 <pow2round+0x10>
mov    $0x1,%eax
shl    %cl,%eax
cmp    %edi,%eax
setne  %cl
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @pow2round(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
%5 = load i32, i32* %2
store i32 %5, i32* %3
br label %6
6: ; preds = %9, %1
%7 = load i32, i32* %3
%8 = icmp ugt i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %6
%10 = load i32, i32* %3
%11 = lshr i32 %10, 1
store i32 %11, i32* %3
%12 = load i32, i32* %4
%13 = add nsw i32 %12, 1
store i32 %13, i32* %4
br label %6
14: ; preds = %6
%15 = load i32, i32* %4
%16 = sub nsw i32 %15, 1
%17 = shl i32 1, %16
store i32 %17, i32* %3
%18 = load i32, i32* %3
%19 = load i32, i32* %2
%20 = icmp ne i32 %18, %19
br i1 %20, label %21, label %24
21: ; preds = %14
%22 = load i32, i32* %3
%23 = shl i32 %22, 1
store i32 %23, i32* %3
br label %24
24: ; preds = %21, %14
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @pow2round(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = lshr i32 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i32 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ -1, %1 ], [ %4, %3 ]
%11 = shl nuw i32 1, %10
%12 = icmp ne i32 %11, %0
%13 = zext i1 %12 to i32
%14 = shl i32 %11, %13
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ anykey();
int /*<<< orphan*/ printf(char *, char *);
void cryname(char *name) {
  printf("Hear Ye, Hear Ye! All ye Kings and Queens, Knights and Nobles, "
         "Peasants and\nPwners. Bask in the glory that is %s and their skills "
         "are legion. Cower, and be a feared.",
         name);
  anykey();
}


x86 assembly (clang, -O0):
<cryname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <anykey@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cryname>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <anykey@plt>

LLVM IR (-O0):
@.str = [166 x i8] c"Hear Ye, Hear Ye! All ye Kings and Queens, Knights and Nobles, Peasants and\0APwners. Bask in the glory that is %s and their skills are legion. Cower, and be a feared.\00"
define void @cryname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([166 x i8], [166 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (...) @anykey()
ret void
}

LLVM IR (-O2):
@.str = [166 x i8] c"Hear Ye, Hear Ye! All ye Kings and Queens, Knights and Nobles, Peasants and\0APwners. Bask in the glory that is %s and their skills are legion. Cower, and be a feared.\00"
define void @cryname(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([166 x i8], [166 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 (...) @anykey()
ret void
}