xunge/DecIR huggingface dataset:
/* Variables and functions */
int lspcon_i2c_spi_write_register(int, int, unsigned int);
int lspcon_i2c_spi_map_page(int fd, unsigned int offset) {
  int ret = 0;
  ret |= lspcon_i2c_spi_write_register(fd, 0x8e, (offset >> 8) & 0xff);
  ret |= lspcon_i2c_spi_write_register(fd, 0x8f, (offset >> 16));
  return ret ? -1 : 0;
}


x86 assembly (clang, -O0):
<lspcon_i2c_spi_map_page>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
shr    $0x8,%edx
and    $0xff,%edx
mov    $0x8e,%esi
call   1030 <lspcon_i2c_spi_write_register@plt>
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
shr    $0x10,%edx
mov    $0x8f,%esi
call   1030 <lspcon_i2c_spi_write_register@plt>
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edx
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lspcon_i2c_spi_map_page>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %edi,%ebp
movzbl %bh,%edx
mov    $0x8e,%esi
call   1030 <lspcon_i2c_spi_write_register@plt>
mov    %eax,%r14d
shr    $0x10,%ebx
mov    %ebp,%edi
mov    $0x8f,%esi
mov    %ebx,%edx
call   1030 <lspcon_i2c_spi_write_register@plt>
xor    %ecx,%ecx
or     %r14d,%eax
setne  %cl
neg    %ecx
mov    %ecx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @lspcon_i2c_spi_map_page(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = lshr i32 %7, 8
%9 = and i32 %8, 255
%10 = call i32 @lspcon_i2c_spi_write_register(i32 %6, i32 142, i32 %9)
%11 = load i32, i32* %5
%12 = or i32 %11, %10
store i32 %12, i32* %5
%13 = load i32, i32* %3
%14 = load i32, i32* %4
%15 = lshr i32 %14, 16
%16 = call i32 @lspcon_i2c_spi_write_register(i32 %13, i32 143, i32 %15)
%17 = load i32, i32* %5
%18 = or i32 %17, %16
store i32 %18, i32* %5
%19 = load i32, i32* %5
%20 = icmp ne i32 %19, 0
%21 = zext i1 %20 to i64
%22 = select i1 %20, i32 -1, i32 0
ret i32 %22
}

LLVM IR (-O2):
define i32 @lspcon_i2c_spi_map_page(i32 %0, i32 %1) {
%3 = lshr i32 %1, 8
%4 = and i32 %3, 255
%5 = tail call i32 @lspcon_i2c_spi_write_register(i32 %0, i32 142, i32 %4)
%6 = lshr i32 %1, 16
%7 = tail call i32 @lspcon_i2c_spi_write_register(i32 %0, i32 143, i32 %6)
%8 = or i32 %7, %5
%9 = icmp ne i32 %8, 0
%10 = sext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int rand();
signed int range_sint(signed int min, signed int max) {
  signed int val = rand();
  return val < min || max < val ? min : val;
}


x86 assembly (clang, -O0):
<range_sint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jl     1140 <range_sint+0x30>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    114b <range_sint+0x3b>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1151 <range_sint+0x41>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<range_sint>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1030 <rand@plt>
cmp    %ebx,%eax
mov    %eax,%ecx
cmovg  %ebp,%ecx
cmp    %ebp,%eax
cmovl  %ebp,%ecx
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @range_sint(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = call i32 (...) @rand()
store i32 %6, i32* %5
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %14, label %10
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %10, %2
%15 = load i32, i32* %3
br label %18
16: ; preds = %10
%17 = load i32, i32* %5
br label %18
18: ; preds = %16, %14
%19 = phi i32 [ %15, %14 ], [ %17, %16 ]
ret i32 %19
}

LLVM IR (-O2):
define i32 @range_sint(i32 %0, i32 %1) {
%3 = tail call i32 (...) @rand()
%4 = icmp slt i32 %3, %0
%5 = icmp sgt i32 %3, %1
%6 = or i1 %4, %5
%7 = select i1 %6, i32 %0, i32 %3
ret i32 %7
}
/* Variables and functions */
unsigned int radeon_get_indexed(int, int, unsigned long, char const *);
unsigned int radeon_get_mc(unsigned long offset, const char *name) {
  return radeon_get_indexed(0x0070, 0x0074, offset | 0x007f0000, name);
}


x86 assembly (clang, -O0):
<radeon_get_mc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdx
or     $0x7f0000,%rdx
mov    -0x10(%rbp),%rcx
mov    $0x70,%edi
mov    $0x74,%esi
call   1030 <radeon_get_indexed@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radeon_get_mc>:
mov    %rsi,%rcx
mov    %rdi,%rdx
or     $0x7f0000,%rdx
mov    $0x70,%edi
mov    $0x74,%esi
jmp    1030 <radeon_get_indexed@plt>

LLVM IR (-O0):
define i32 @radeon_get_mc(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%5 = load i64, i64* %3
%6 = or i64 %5, 8323072
%7 = load i8*, i8** %4
%8 = call i32 @radeon_get_indexed(i32 112, i32 116, i64 %6, i8* %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @radeon_get_mc(i64 %0, i8* %1) {
%3 = or i64 %0, 8323072
%4 = tail call i32 @radeon_get_indexed(i32 112, i32 116, i64 %3, i8* %1)
ret i32 %4
}
int get_end_cycle(double sim_time, double dt) {
  int r = (int)(sim_time / dt + 0.5);
  return r;
}


x86 assembly (clang, -O0):
<get_end_cycle>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
movsd  0xee0(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_end_cycle>:
divsd  %xmm1,%xmm0
addsd  0xef4(%rip),%xmm0
cvttsd2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @get_end_cycle(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca i32
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = load double, double* %4
%8 = fdiv double %6, %7
%9 = fadd double %8, 5.000000e-01
%10 = fptosi double %9 to i32
store i32 %10, i32* %5
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @get_end_cycle(double %0, double %1) {
%3 = fdiv double %0, %1
%4 = fadd double %3, 5.000000e-01
%5 = fptosi double %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ dump(unsigned int);
int /*<<< orphan*/ printf(char *);
void IV(unsigned int len) {
  printf("\tIV - ");
  dump(len);
  printf("\n");
}


x86 assembly (clang, -O0):
<IV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
call   1040 <dump@plt>
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<IV>:
push   %rbx
mov    %edi,%ebx
lea    0xec6(%rip),%rdi
call   1040 <printf@plt>
mov    %ebx,%edi
call   1050 <dump@plt>
mov    $0xa,%edi
pop    %rbx
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"\09IV - \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @IV(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @dump(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"\09IV - \00"
define void @IV(i32 %0) {
%2 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @dump(i32 %0)
%4 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ noinline();
void use98() { noinline(); }


x86 assembly (clang, -O0):
<use98>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <noinline@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<use98>:
xor    %eax,%eax
jmp    1030 <noinline@plt>

LLVM IR (-O0):
define void @use98() {
%1 = call i32 (...) @noinline()
ret void
}

LLVM IR (-O2):
define void @use98() {
%1 = tail call i32 (...) @noinline()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int fread(char *, int, int, int /*<<< orphan*/ *);
unsigned int read_int(char *reg_name) {
  FILE *regfile;
  unsigned int result;
  int rval;
  regfile = fopen(reg_name, "r");
  rval = fread((char *)(&result), 1, 4, regfile);
  fclose(regfile);
  return result;
}


x86 assembly (clang, -O0):
<read_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb9(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x10(%rbp)
lea    -0x14(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    $0x1,%esi
mov    $0x4,%edx
call   1030 <fread@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <fclose@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_int>:
push   %rbx
sub    $0x10,%rsp
lea    0xec4(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,%rbx
lea    0xc(%rsp),%rdi
mov    $0x1,%esi
mov    $0x4,%edx
mov    %rax,%rcx
call   1030 <fread@plt>
mov    %rbx,%rdi
call   1040 <fclose@plt>
mov    0xc(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define i32 @read_int(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i32* @fopen(i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %7, i32** %3
%8 = bitcast i32* %4 to i8*
%9 = load i32*, i32** %3
%10 = call i32 @fread(i8* %8, i32 1, i32 4, i32* %9)
store i32 %10, i32* %5
%11 = load i32*, i32** %3
%12 = call i32 @fclose(i32* %11)
%13 = load i32, i32* %4
ret i32 %13
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define i32 @read_int(i8* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @fread(i8* %3, i32 1, i32 4, i32* %4)
%6 = tail call i32 @fclose(i32* %4)
%7 = load i32, i32* %2
ret i32 %7
}
/* Variables and functions */
size_t kaa_aligned_size_get(size_t size) {
  return (size + (4 - (size % 4)) % 4);
}


x86 assembly (clang, -O0):
<kaa_aligned_size_get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rdx
and    $0x3,%rdx
mov    $0x4,%ecx
sub    %rdx,%rcx
and    $0x3,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kaa_aligned_size_get>:
mov    %edi,%eax
neg    %eax
and    $0x3,%eax
add    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @kaa_aligned_size_get(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = load i64, i64* %2
%5 = urem i64 %4, 4
%6 = sub i64 4, %5
%7 = urem i64 %6, 4
%8 = add i64 %3, %7
ret i64 %8
}

LLVM IR (-O2):
define i64 @kaa_aligned_size_get(i64 %0) {
%2 = sub i64 0, %0
%3 = and i64 %2, 3
%4 = add i64 %3, %0
ret i64 %4
}
/* Variables and functions */
int client_listen(char *);
int ocfs2_client_listen(void) { return client_listen("ocfs2_controld_sock"); }


x86 assembly (clang, -O0):
<ocfs2_client_listen>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <client_listen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ocfs2_client_listen>:
lea    0xee9(%rip),%rdi
jmp    1030 <client_listen@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"ocfs2_controld_sock\00"
define i32 @ocfs2_client_listen() {
%1 = call i32 @client_listen(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}

LLVM IR (-O2):
@.str = [20 x i8] c"ocfs2_controld_sock\00"
define i32 @ocfs2_client_listen() {
%1 = tail call i32 @client_listen(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret i32 %1
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ read(int /*<<< orphan*/, char *, int);
void scan_d(int *result_k, int *printed) {
  char temp[100];
  read(0, temp, 100);
  *result_k = atoi(temp);
}


x86 assembly (clang, -O0):
<scan_d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x80(%rbp),%rsi
xor    %edi,%edi
mov    $0x64,%edx
call   1030 <read@plt>
lea    -0x80(%rbp),%rdi
call   1040 <atoi@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan_d>:
push   %r14
push   %rbx
sub    $0x68,%rsp
mov    %rdi,%rbx
mov    %rsp,%r14
xor    %edi,%edi
mov    %r14,%rsi
mov    $0x64,%edx
call   1030 <read@plt>
mov    %r14,%rdi
call   1040 <atoi@plt>
mov    %eax,(%rbx)
add    $0x68,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @scan_d(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca [100 x i8]
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = getelementptr inbounds [100 x i8], [100 x i8]* %5, i64 0, i64 0
%7 = call i32 @read(i32 0, i8* %6, i32 100)
%8 = getelementptr inbounds [100 x i8], [100 x i8]* %5, i64 0, i64 0
%9 = call i32 @atoi(i8* %8)
%10 = load i32*, i32** %3
store i32 %9, i32* %10
ret void
}

LLVM IR (-O2):
define void @scan_d(i32* nocapture writeonly %0, i32* nocapture readnone %1) {
%3 = alloca [100 x i8]
%4 = getelementptr inbounds [100 x i8], [100 x i8]* %3, i64 0, i64 0
%5 = call i32 @read(i32 0, i8* %4, i32 100)
%6 = call i32 @atoi(i8* %4)
store i32 %6, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ SIG_DFL;
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
void handler(int signum) {
  printf("\n=== SIGNAL %d handler ===\n", signum);
  printf("First round ... ignored.  Next round activated.\n");
  (void)signal(SIGINT, SIG_DFL);
}


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xecb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
mov    0x2e7e(%rip),%rax
mov    (%rax),%esi
call   1040 <signal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler>:
push   %rax
mov    %edi,%esi
lea    0xec6(%rip),%rdi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xed4(%rip),%rdi
call   1030 <puts@plt>
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
mov    0x2e7b(%rip),%rax
mov    (%rax),%esi
pop    %rax
jmp    1050 <signal@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"\0A=== SIGNAL %d handler ===\0A\00"
@.str.1 = [49 x i8] c"First round ... ignored. Next round activated.\0A\00"
@SIGINT = global i32 0
@SIG_DFL = global i32 0
define void @handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str.1, i64 0, i64 0))
%6 = load i32, i32* @SIGINT
%7 = load i32, i32* @SIG_DFL
%8 = call i32 @signal(i32 %6, i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"\0A=== SIGNAL %d handler ===\0A\00"
@SIGINT = global i32 0
@SIG_DFL = global i32 0
@str = [48 x i8] c"First round ... ignored. Next round activated.\00"
define void @handler(i32 %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %0)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([48 x i8], [48 x i8]* @str, i64 0, i64 0))
%4 = load i32, i32* @SIGINT
%5 = load i32, i32* @SIG_DFL
%6 = tail call i32 @signal(i32 %4, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x77() {
  Assert_real((isspace(119) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              600, ("isspace should be 0 for w"));
}


x86 assembly (clang, -O0):
<t_isspace_0x77>:
push   %rbp
mov    %rsp,%rbp
mov    $0x77,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x258,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x77>:
push   %rax
mov    $0x77,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x258,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for w\00"
define void @t_isspace_0x77() {
%1 = call i64 @isspace(i32 119)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 600, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for w\00"
define void @t_isspace_0x77() {
%1 = tail call i64 @isspace(i32 119)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 600, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
int get_output_name(int file_counter, char output_name[64]) {
  sprintf(output_name, "c://adata/parts/output%d.json", file_counter);
  return (file_counter + 1);
}


x86 assembly (clang, -O0):
<get_output_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <sprintf@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_output_name>:
push   %rbx
mov    %rsi,%rax
mov    %edi,%ebx
lea    0xee3(%rip),%rsi
mov    %rax,%rdi
mov    %ebx,%edx
call   1030 <sprintf@plt>
add    $0x1,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"c://adata/parts/output%d.json\00"
define i32 @get_output_name(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i32, i32* %3
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
ret i32 %9
}

LLVM IR (-O2):
@.str = [30 x i8] c"c://adata/parts/output%d.json\00"
define i32 @get_output_name(i32 %0, i8* nocapture writeonly %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %1, i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %0)
%4 = add nsw i32 %0, 1
ret i32 %4
}
/* Variables and functions */
void *opa_malloc(size_t);
void *malloc(size_t size) { return opa_malloc(size); }


x86 assembly (clang, -O0):
<malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <opa_malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc>:
jmp    1030 <opa_malloc@plt>

LLVM IR (-O0):
define i8* @malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @opa_malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @malloc(i64 %0) {
%2 = tail call i8* @opa_malloc(i64 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void __list_it_destroy(void *it) { free(it); }


x86 assembly (clang, -O0):
<__list_it_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__list_it_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @__list_it_destroy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @__list_it_destroy(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
scalar_t__ memcmp(void const *const, void const *const, size_t const);
int results_match(const void *const d1, const void *const d2,
                  const size_t byte_count) {
  return memcmp(d1, d2, byte_count) == 0;
}


x86 assembly (clang, -O0):
<results_match>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<results_match>:
push   %rax
call   1030 <memcmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @results_match(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i64 @memcmp(i8* %7, i8* %8, i64 %9)
%11 = icmp eq i64 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @results_match(i8* %0, i8* %1, i64 %2) {
%4 = tail call i64 @memcmp(i8* %0, i8* %1, i64 %2)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ makeseq(int, int);
int main() {
  int i;
  for (i = 1; i < 16; ++i)
    makeseq(i, 2 * ((1 << 16) - 1));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x10,-0x8(%rbp)
jge    114b <main+0x3b>
mov    -0x8(%rbp),%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0x2,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0x3,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0x4,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0x5,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0x6,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0x7,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0x8,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0x9,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0xa,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0xb,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0xc,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0xd,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0xe,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
mov    $0xf,%edi
mov    $0x1fffe,%esi
call   1030 <makeseq@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 16
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @makeseq(i32 %7, i32 131070)
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @makeseq(i32 1, i32 131070)
%2 = tail call i32 @makeseq(i32 2, i32 131070)
%3 = tail call i32 @makeseq(i32 3, i32 131070)
%4 = tail call i32 @makeseq(i32 4, i32 131070)
%5 = tail call i32 @makeseq(i32 5, i32 131070)
%6 = tail call i32 @makeseq(i32 6, i32 131070)
%7 = tail call i32 @makeseq(i32 7, i32 131070)
%8 = tail call i32 @makeseq(i32 8, i32 131070)
%9 = tail call i32 @makeseq(i32 9, i32 131070)
%10 = tail call i32 @makeseq(i32 10, i32 131070)
%11 = tail call i32 @makeseq(i32 11, i32 131070)
%12 = tail call i32 @makeseq(i32 12, i32 131070)
%13 = tail call i32 @makeseq(i32 13, i32 131070)
%14 = tail call i32 @makeseq(i32 14, i32 131070)
%15 = tail call i32 @makeseq(i32 15, i32 131070)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(int *);
int *malloc(int);
int main() {
  int *ip = malloc(sizeof(int));
  if (ip) {
    *ip = 1;
    free(ip);
  }
  free(ip);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     115b <main+0x3b>
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1141 <main+0x21>
movl   $0x1,(%rbx)
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
store i32 0, i32* %1
%3 = call i32* @malloc(i32 4)
store i32* %3, i32** %2
%4 = load i32*, i32** %2
%5 = icmp ne i32* %4, null
br i1 %5, label %6, label %10
6: ; preds = %0
%7 = load i32*, i32** %2
store i32 1, i32* %7
%8 = load i32*, i32** %2
%9 = call i32 @free(i32* %8)
br label %10
10: ; preds = %6, %0
%11 = load i32*, i32** %2
%12 = call i32 @free(i32* %11)
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32* @malloc(i32 4)
%2 = icmp eq i32* %1, null
br i1 %2, label %5, label %3
3: ; preds = %0
store i32 1, i32* %1
%4 = tail call i32 @free(i32* %1)
br label %5
5: ; preds = %3, %0
%6 = tail call i32 @free(i32* %1)
ret i32 0
}
double calcFT(double Temperature, double Altitude) {
  double Tstd = -0.0036 * Altitude + 59;
  double FT = (Temperature - Tstd) / (459.6 + Tstd);
  return FT;
}


x86 assembly (clang, -O0):
<calcFT>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xeed(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xee9(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x18(%rbp),%xmm0
movsd  0xebe(%rip),%xmm1
addsd  -0x18(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<calcFT>:
mulsd  0xef8(%rip),%xmm1
addsd  0xef8(%rip),%xmm1
subsd  %xmm1,%xmm0
addsd  0xef4(%rip),%xmm1
divsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @calcFT(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %3
store double %1, double* %4
%7 = load double, double* %4
%8 = call double @llvm.fmuladd.f64(double -3.600000e-03, double %7, double 5.900000e+01)
store double %8, double* %5
%9 = load double, double* %3
%10 = load double, double* %5
%11 = fsub double %9, %10
%12 = load double, double* %5
%13 = fadd double 4.596000e+02, %12
%14 = fdiv double %11, %13
store double %14, double* %6
%15 = load double, double* %6
ret double %15
}

LLVM IR (-O2):
define double @calcFT(double %0, double %1) {
%3 = tail call double @llvm.fmuladd.f64(double %1, double -3.600000e-03, double 5.900000e+01)
%4 = fsub double %0, %3
%5 = fadd double %3, 4.596000e+02
%6 = fdiv double %4, %5
ret double %6
}
void lock() {}


x86 assembly (clang, -O0):
<lock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lock>:
ret

LLVM IR (-O0):
define void @lock() {
ret void
}

LLVM IR (-O2):
define void @lock() {
ret void
}
/* Type definitions */
typedef int w;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ WriteByte(int /*<<< orphan*/ *, int);
void Write3Word(FILE *fp, int w) {
  WriteByte(fp, ((w)&0xff));
  WriteByte(fp, (((w)&0xff00) >> 8));
  WriteByte(fp, (w & 0xff0000) >> 16);
}


x86 assembly (clang, -O0):
<Write3Word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
and    $0xff,%esi
call   1030 <WriteByte@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
and    $0xff00,%esi
sar    $0x8,%esi
call   1030 <WriteByte@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
and    $0xff0000,%esi
sar    $0x10,%esi
call   1030 <WriteByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Write3Word>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
movzbl %bl,%esi
call   1030 <WriteByte@plt>
movzbl %bh,%esi
mov    %r14,%rdi
call   1030 <WriteByte@plt>
shr    $0x10,%ebx
movzbl %bl,%esi
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <WriteByte@plt>

LLVM IR (-O0):
define void @Write3Word(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = and i32 %6, 255
%8 = call i32 @WriteByte(i32* %5, i32 %7)
%9 = load i32*, i32** %3
%10 = load i32, i32* %4
%11 = and i32 %10, 65280
%12 = ashr i32 %11, 8
%13 = call i32 @WriteByte(i32* %9, i32 %12)
%14 = load i32*, i32** %3
%15 = load i32, i32* %4
%16 = and i32 %15, 16711680
%17 = ashr i32 %16, 16
%18 = call i32 @WriteByte(i32* %14, i32 %17)
ret void
}

LLVM IR (-O2):
define void @Write3Word(i32* %0, i32 %1) {
%3 = and i32 %1, 255
%4 = tail call i32 @WriteByte(i32* %0, i32 %3)
%5 = lshr i32 %1, 8
%6 = and i32 %5, 255
%7 = tail call i32 @WriteByte(i32* %0, i32 %6)
%8 = lshr i32 %1, 16
%9 = and i32 %8, 255
%10 = tail call i32 @WriteByte(i32* %0, i32 %9)
ret void
}
int main() {
  int n;
  int i = 0;
  int k = 0;
  while (i < n) {
    i++;
    k++;
  }
  int j = 0;
  while (j < n) {
    j++;
    k--;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    113c <main+0x3c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1119 <main+0x19>
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1166 <main+0x66>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1143 <main+0x43>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
store i32 0, i32* %4
br label %6
6: ; preds = %10, %0
%7 = load i32, i32* %3
%8 = load i32, i32* %2
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %15
10: ; preds = %6
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
%13 = load i32, i32* %4
%14 = add nsw i32 %13, 1
store i32 %14, i32* %4
br label %6
15: ; preds = %6
store i32 0, i32* %5
br label %16
16: ; preds = %20, %15
%17 = load i32, i32* %5
%18 = load i32, i32* %2
%19 = icmp slt i32 %17, %18
br i1 %19, label %20, label %25
20: ; preds = %16
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
%23 = load i32, i32* %4
%24 = add nsw i32 %23, -1
store i32 %24, i32* %4
br label %16
25: ; preds = %16
%26 = load i32, i32* %1
ret i32 %26
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void t9() {
label:
  free(&&label);
}


x86 assembly (clang, -O0):
<t9>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <t9+0x9>
lea    -0x7(%rip),%rdi
call   1030 <free@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t9>:
lea    -0x7(%rip),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @t9() {
br label %1
1: ; preds = %2, %0
ret void
2: ; No predecessors!
indirectbr i8* undef, [label %1]
}

LLVM IR (-O2):
define void @t9() {
br label %1
1: ; preds = %0
tail call void @free(i8* blockaddress(@t9, %1))
ret void
}
int test_bit(unsigned int nr, const volatile void *addr) {
  return ((1UL << (nr % 8)) & (((unsigned char *)addr)[nr / 8])) != 0;
}


x86 assembly (clang, -O0):
<test_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    -0x10(%rbp),%rcx
mov    -0x4(%rbp),%edx
shr    $0x3,%edx
mov    %edx,%edx
movzbl (%rcx,%rdx,1),%ecx
and    %rcx,%rax
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bit>:
mov    %edi,%eax
mov    %edi,%ecx
and    $0x7,%cl
shr    $0x3,%rax
movzbl (%rsi,%rax,1),%edx
movzbl %cl,%ecx
xor    %eax,%eax
bt     %ecx,%edx
setb   %al
ret

LLVM IR (-O0):
define i32 @test_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = urem i32 %5, 8
%7 = zext i32 %6 to i64
%8 = shl i64 1, %7
%9 = load i8*, i8** %4
%10 = load i32, i32* %3
%11 = udiv i32 %10, 8
%12 = zext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = load i8, i8* %13
%15 = zext i8 %14 to i64
%16 = and i64 %8, %15
%17 = icmp ne i64 %16, 0
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @test_bit(i32 %0, i8* nocapture %1) {
%3 = and i32 %0, 7
%4 = zext i32 %3 to i64
%5 = shl nuw nsw i64 1, %4
%6 = lshr i32 %0, 3
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %1, i64 %7
%9 = load i8, i8* %8
%10 = zext i8 %9 to i64
%11 = and i64 %5, %10
%12 = icmp ne i64 %11, 0
%13 = zext i1 %12 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, size_t);
scalar_t__ parson_malloc(size_t);
char *parson_strndup(const char *string, size_t n) {
  char *output_string = (char *)parson_malloc(n + 1);
  if (!output_string) {
    return NULL;
  }
  output_string[n] = '\0';
  memcpy(output_string, string, n);
  return output_string;
}


x86 assembly (clang, -O0):
<parson_strndup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
add    $0x1,%rdi
call   1030 <parson_malloc@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    1159 <parson_strndup+0x39>
movq   $0x0,-0x8(%rbp)
jmp    117e <parson_strndup+0x5e>
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parson_strndup>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
lea    0x1(%rsi),%rdi
call   1030 <parson_malloc@plt>
test   %rax,%rax
je     1151 <parson_strndup+0x31>
mov    %rax,%rbx
movb   $0x0,(%rax,%r14,1)
mov    %rax,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
call   1040 <memcpy@plt>
jmp    1153 <parson_strndup+0x33>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @parson_strndup(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
%7 = load i64, i64* %5
%8 = add i64 %7, 1
%9 = call i64 @parson_malloc(i64 %8)
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** %6
%11 = load i8*, i8** %6
%12 = icmp ne i8* %11, null
br i1 %12, label %14, label %13
13: ; preds = %2
store i8* null, i8** %3
br label %23
14: ; preds = %2
%15 = load i8*, i8** %6
%16 = load i64, i64* %5
%17 = getelementptr inbounds i8, i8* %15, i64 %16
store i8 0, i8* %17
%18 = load i8*, i8** %6
%19 = load i8*, i8** %4
%20 = load i64, i64* %5
%21 = call i32 @memcpy(i8* %18, i8* %19, i64 %20)
%22 = load i8*, i8** %6
store i8* %22, i8** %3
br label %23
23: ; preds = %14, %13
%24 = load i8*, i8** %3
ret i8* %24
}

LLVM IR (-O2):
define i8* @parson_strndup(i8* %0, i64 %1) {
%3 = add i64 %1, 1
%4 = tail call i64 @parson_malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = getelementptr inbounds i8, i8* %5, i64 %1
store i8 0, i8* %8
%9 = tail call i32 @memcpy(i8* %5, i8* %0, i64 %1)
br label %10
10: ; preds = %2, %7
%11 = phi i8* [ %5, %7 ], [ null, %2 ]
ret i8* %11
}
void b_print_string(char *str) { asm volatile("call 0x00100010" : : "S"(str)); }


x86 assembly (clang, -O0):
<b_print_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
call   100010 <completed.0+0xfbff0>
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_print_string>:
mov    %rdi,%rsi
call   100010 <completed.0+0xfbff0>
ret

LLVM IR (-O0):
define void @b_print_string(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @b_print_string(i8* %0) {
tail call void asm sideeffect "call 0x00100010", "{si},~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret void
}
void testClosureIFIrV(void (*closure)(int, float, int), int a1, float a2,
                      int a3) {
  (*closure)(a1, a2, a3);
}


x86 assembly (clang, -O0):
<testClosureIFIrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movss  %xmm0,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%edi
movss  -0x10(%rbp),%xmm0
mov    -0x14(%rbp),%esi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureIFIrV>:
mov    %rdi,%rax
mov    %esi,%edi
mov    %edx,%esi
jmp    *%rax

LLVM IR (-O0):
define void @testClosureIFIrV(void (i32, float, i32)* %0, i32 %1, float %2, i32 %3) {
%5 = alloca void (i32, float, i32)*
%6 = alloca i32
%7 = alloca float
%8 = alloca i32
store void (i32, float, i32)* %0, void (i32, float, i32)** %5
store i32 %1, i32* %6
store float %2, float* %7
store i32 %3, i32* %8
%9 = load void (i32, float, i32)*, void (i32, float, i32)** %5
%10 = load i32, i32* %6
%11 = load float, float* %7
%12 = load i32, i32* %8
ret void
}

LLVM IR (-O2):
define void @testClosureIFIrV(void (i32, float, i32)* nocapture %0, i32 %1, float %2, i32 %3) {
tail call void %0(i32 %1, float %2, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_aarch64_im_lane_boundsi(int, int /*<<< orphan*/,
                                                     int /*<<< orphan*/);
void search_line_fast(void) { __builtin_aarch64_im_lane_boundsi(4, 0, 0); }


x86 assembly (clang, -O0):
<search_line_fast>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <__builtin_aarch64_im_lane_boundsi@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<search_line_fast>:
mov    $0x4,%edi
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <__builtin_aarch64_im_lane_boundsi@plt>

LLVM IR (-O0):
define void @search_line_fast() {
%1 = call i32 @__builtin_aarch64_im_lane_boundsi(i32 4, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @search_line_fast() {
%1 = tail call i32 @__builtin_aarch64_im_lane_boundsi(i32 4, i32 0, i32 0)
ret void
}
int __atomic_cmpxchg_bool(int *ptr, int old, int new) {
  return __sync_bool_compare_and_swap(ptr, old, new);
}


x86 assembly (clang, -O0):
<__atomic_cmpxchg_bool>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%edx
lock cmpxchg %edx,(%rcx)
mov    %eax,%ecx
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__atomic_cmpxchg_bool>:
mov    %esi,%eax
xor    %ecx,%ecx
lock cmpxchg %edx,(%rdi)
sete   %cl
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @__atomic_cmpxchg_bool(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = cmpxchg i32* %7, i32 %8, i32 %9 seq_cst seq_cst
%11 = extractvalue { i32, i1 } %10, 1
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @__atomic_cmpxchg_bool(i32* nocapture %0, i32 %1, i32 %2) {
%4 = cmpxchg i32* %0, i32 %1, i32 %2 seq_cst seq_cst
%5 = extractvalue { i32, i1 } %4, 1
%6 = zext i1 %5 to i32
ret i32 %6
}
double ceil(double x) {
  int i = x;
  for (; i < x + 10, i < x; i++)
    ;
  return i;
}


x86 assembly (clang, -O0):
<ceil>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cvtsi2sdl -0xc(%rbp),%xmm1
movsd  -0x8(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1138 <ceil+0x38>
jmp    112a <ceil+0x2a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1111 <ceil+0x11>
cvtsi2sdl -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceil>:
cvttsd2si %xmm0,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
xorps  %xmm1,%xmm1
cvtsi2sd %eax,%xmm1
add    $0x1,%eax
ucomisd %xmm1,%xmm0
ja     1110 <ceil+0x10>
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @ceil(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = load double, double* %2
%5 = fptosi double %4 to i32
store i32 %5, i32* %3
br label %6
6: ; preds = %18, %1
%7 = load i32, i32* %3
%8 = sitofp i32 %7 to double
%9 = load double, double* %2
%10 = fadd double %9, 1.000000e+01
%11 = fcmp olt double %8, %10
%12 = zext i1 %11 to i32
%13 = load i32, i32* %3
%14 = sitofp i32 %13 to double
%15 = load double, double* %2
%16 = fcmp olt double %14, %15
br i1 %16, label %17, label %21
17: ; preds = %6
br label %18
18: ; preds = %17
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %6
21: ; preds = %6
%22 = load i32, i32* %3
%23 = sitofp i32 %22 to double
ret double %23
}

LLVM IR (-O2):
define double @ceil(double %0) {
%2 = fptosi double %0 to i32
br label %3
3: ; preds = %3, %1
%4 = phi i32 [ %2, %1 ], [ %7, %3 ]
%5 = sitofp i32 %4 to double
%6 = fcmp olt double %5, %0
%7 = add nsw i32 %4, 1
br i1 %6, label %3, label %8
8: ; preds = %3
ret double %5
}
void remove_underscores(char *buf) {
  char *w = buf;
  for (char *r = buf; *r; r++) {
    if (*r != '_') {
      *w++ = *r;
    }
  }
  *w++ = 0;
}


x86 assembly (clang, -O0):
<remove_underscores>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpb   $0x0,(%rax)
je     1162 <remove_underscores+0x62>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x5f,%eax
je     114c <remove_underscores+0x4c>
mov    -0x18(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,(%rax)
jmp    1151 <remove_underscores+0x51>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1118 <remove_underscores+0x18>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_underscores>:
mov    %rdi,%rax
jmp    1114 <remove_underscores+0x14>
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%rax
movzbl (%rax),%ecx
cmp    $0x5f,%cl
je     1110 <remove_underscores+0x10>
test   %cl,%cl
je     1128 <remove_underscores+0x28>
mov    %cl,(%rdi)
add    $0x1,%rdi
jmp    1110 <remove_underscores+0x10>
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @remove_underscores(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8* %5, i8** %3
%6 = load i8*, i8** %2
store i8* %6, i8** %4
br label %7
7: ; preds = %22, %1
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %25
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = icmp ne i32 %14, 95
br i1 %15, label %16, label %21
16: ; preds = %11
%17 = load i8*, i8** %4
%18 = load i8, i8* %17
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
store i8 %18, i8* %19
br label %21
21: ; preds = %16, %11
br label %22
22: ; preds = %21
%23 = load i8*, i8** %4
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %4
br label %7
25: ; preds = %7
%26 = load i8*, i8** %3
%27 = getelementptr inbounds i8, i8* %26, i32 1
store i8* %27, i8** %3
store i8 0, i8* %26
ret void
}

LLVM IR (-O2):
define void @remove_underscores(i8* nocapture %0) {
br label %2
2: ; preds = %9, %1
%3 = phi i8* [ %0, %1 ], [ %10, %9 ]
%4 = phi i8* [ %0, %1 ], [ %11, %9 ]
%5 = load i8, i8* %4
switch i8 %5, label %7 [
i8 0, label %6
i8 95, label %9
]
6: ; preds = %2
store i8 0, i8* %3
ret void
7: ; preds = %2
%8 = getelementptr inbounds i8, i8* %3, i64 1
store i8 %5, i8* %3
br label %9
9: ; preds = %2, %7
%10 = phi i8* [ %8, %7 ], [ %3, %2 ]
%11 = getelementptr inbounds i8, i8* %4, i64 1
br label %2
}
int encode_air_speed(int kt, int supersonic) {
  int sign;
  if (kt < 0) {
    sign = 0x0400;
    kt = -kt;
  } else {
    sign = 0;
  }
  if (supersonic)
    kt = kt / 4;
  ++kt;
  if (kt > 1023)
    kt = 1023;
  return kt | sign;
}


x86 assembly (clang, -O0):
<encode_air_speed>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    1128 <encode_air_speed+0x28>
movl   $0x400,-0xc(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    112f <encode_air_speed+0x2f>
movl   $0x0,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1147 <encode_air_speed+0x47>
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
cmpl   $0x3ff,-0x4(%rbp)
jle    1164 <encode_air_speed+0x64>
movl   $0x3ff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<encode_air_speed>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
shr    $0x15,%edi
and    $0x400,%edi
mov    %eax,%ecx
shr    $0x2,%ecx
test   %esi,%esi
cmove  %eax,%ecx
cmp    $0x3fe,%ecx
mov    $0x3fe,%eax
cmovb  %ecx,%eax
add    $0x1,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @encode_air_speed(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
store i32 1024, i32* %5
%9 = load i32, i32* %3
%10 = sub nsw i32 0, %9
store i32 %10, i32* %3
br label %12
11: ; preds = %2
store i32 0, i32* %5
br label %12
12: ; preds = %11, %8
%13 = load i32, i32* %4
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %18
15: ; preds = %12
%16 = load i32, i32* %3
%17 = sdiv i32 %16, 4
store i32 %17, i32* %3
br label %18
18: ; preds = %15, %12
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
%21 = load i32, i32* %3
%22 = icmp sgt i32 %21, 1023
br i1 %22, label %23, label %24
23: ; preds = %18
store i32 1023, i32* %3
br label %24
24: ; preds = %23, %18
%25 = load i32, i32* %3
%26 = load i32, i32* %5
%27 = or i32 %25, %26
ret i32 %27
}

LLVM IR (-O2):
define i32 @encode_air_speed(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
%4 = lshr i32 %0, 21
%5 = and i32 %4, 1024
%6 = icmp eq i32 %1, 0
%7 = lshr i32 %3, 2
%8 = select i1 %6, i32 %3, i32 %7
%9 = icmp ult i32 %8, 1022
%10 = select i1 %9, i32 %8, i32 1022
%11 = add nuw nsw i32 %10, 1
%12 = or i32 %11, %5
ret i32 %12
}