xunge/DecIR huggingface dataset:
/* Variables and functions */
char *malloc(int /*<<< orphan*/);
char *strcpy(char *, char const *);
int /*<<< orphan*/ strlen(char const *);
char *strcpyx(const char *src) {
  if (src == NULL) {
    return NULL;
  }
  char *dest = malloc(strlen(src));
  if (dest != NULL) {
    dest = strcpy(dest, src);
  }
  return dest;
}


x86 assembly (clang, -O0):
<strcpyx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1154 <strcpyx+0x24>
movq   $0x0,-0x8(%rbp)
jmp    118c <strcpyx+0x5c>
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1184 <strcpyx+0x54>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpyx>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     115d <strcpyx+0x2d>
mov    %rdi,%r14
call   1040 <strlen@plt>
mov    %eax,%edi
call   1050 <malloc@plt>
test   %rax,%rax
je     115d <strcpyx+0x2d>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
jmp    115f <strcpyx+0x2f>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strcpyx(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* null, i8** %2
br label %20
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i32 @strlen(i8* %9)
%11 = call i8* @malloc(i32 %10)
store i8* %11, i8** %4
%12 = load i8*, i8** %4
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %18
14: ; preds = %8
%15 = load i8*, i8** %4
%16 = load i8*, i8** %3
%17 = call i8* @strcpy(i8* %15, i8* %16)
store i8* %17, i8** %4
br label %18
18: ; preds = %14, %8
%19 = load i8*, i8** %4
store i8* %19, i8** %2
br label %20
20: ; preds = %18, %7
%21 = load i8*, i8** %2
ret i8* %21
}

LLVM IR (-O2):
define i8* @strcpyx(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = tail call i32 @strlen(i8* %0)
%5 = tail call i8* @malloc(i32 %4)
%6 = icmp eq i8* %5, null
br i1 %6, label %9, label %7
7: ; preds = %3
%8 = tail call i8* @strcpy(i8* %5, i8* %0)
br label %9
9: ; preds = %3, %7, %1
%10 = phi i8* [ null, %1 ], [ %5, %7 ], [ null, %3 ]
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void kfree(void *objp) {
  {
    { free(objp); }
    return;
  }
}


x86 assembly (clang, -O0):
<kfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kfree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @kfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @kfree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
int functionScope() {
  extern int GlobalRedecl6;
  return GlobalRedecl6;
}


x86 assembly (clang, -O0):
<functionScope>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<functionScope>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@GlobalRedecl6 = external global i32
define i32 @functionScope() {
%1 = load i32, i32* @GlobalRedecl6
ret i32 %1
}

LLVM IR (-O2):
@GlobalRedecl6 = external global i32
define i32 @functionScope() {
%1 = load i32, i32* @GlobalRedecl6
ret i32 %1
}
/* Variables and functions */
double arctan(double);
double aofftan(double n, int offset) {
  return arctan(n) + 2 * 3.14159265358979323846 * offset;
}


x86 assembly (clang, -O0):
<aofftan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <arctan@plt>
movaps %xmm0,%xmm1
cvtsi2sdl -0xc(%rbp),%xmm0
movsd  0xec6(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aofftan>:
push   %rbx
mov    %edi,%ebx
call   1030 <arctan@plt>
cvtsi2sd %ebx,%xmm1
mulsd  0xedc(%rip),%xmm1
addsd  %xmm1,%xmm0
pop    %rbx
ret

LLVM IR (-O0):
define double @aofftan(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load double, double* %3
%6 = call double @arctan(double %5)
%7 = load i32, i32* %4
%8 = sitofp i32 %7 to double
%9 = call double @llvm.fmuladd.f64(double 0x401921FB54442D18, double %8, double %6)
ret double %9
}

LLVM IR (-O2):
define double @aofftan(double %0, i32 %1) {
%3 = tail call double @arctan(double %0)
%4 = sitofp i32 %1 to double
%5 = tail call double @llvm.fmuladd.f64(double %4, double 0x401921FB54442D18, double %3)
ret double %5
}
/* Variables and functions */
int const getcode(char const *);
int checkdigits(const char *response, const int shouldbe) {
  return (getcode(response) == shouldbe);
}


x86 assembly (clang, -O0):
<checkdigits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getcode@plt>
cmp    -0xc(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkdigits>:
push   %rbx
mov    %esi,%ebx
call   1030 <getcode@plt>
xor    %ecx,%ecx
cmp    %ebx,%eax
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @checkdigits(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @getcode(i8* %5)
%7 = load i32, i32* %4
%8 = icmp eq i32 %6, %7
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @checkdigits(i8* %0, i32 %1) {
%3 = tail call i32 @getcode(i8* %0)
%4 = icmp eq i32 %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
void PWMOutputFault(uint32_t ui32Base, uint32_t ui32PWMOutBits,
                    bool bFaultSuppress) {
  ;

  ;
  if (bFaultSuppress == true) {
    (*((volatile uint32_t *)(ui32Base + 0x00000010))) |= ui32PWMOutBits;
  } else {
    (*((volatile uint32_t *)(ui32Base + 0x00000010))) &= ~(ui32PWMOutBits);
  }
}


x86 assembly (clang, -O0):
<PWMOutputFault>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    1131 <PWMOutputFault+0x31>
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x10(%rax)
jmp    1148 <PWMOutputFault+0x48>
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMOutputFault>:
mov    %rdi,-0x10(%rsp)
mov    %rsi,-0x8(%rsp)
mov    -0x8(%rsp),%rax
cmp    $0x1,%edx
jne    111e <PWMOutputFault+0x1e>
mov    -0x10(%rsp),%rcx
or     %rax,0x10(%rcx)
ret
not    %rax
mov    -0x10(%rsp),%rcx
and    %rax,0x10(%rcx)
ret

LLVM IR (-O0):
define void @PWMOutputFault(i64 %0, i64 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i32
store volatile i64 %0, i64* %4
store volatile i64 %1, i64* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %16
9: ; preds = %3
%10 = load volatile i64, i64* %5
%11 = load volatile i64, i64* %4
%12 = add nsw i64 %11, 16
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = or i64 %14, %10
store volatile i64 %15, i64* %13
br label %24
16: ; preds = %3
%17 = load volatile i64, i64* %5
%18 = xor i64 %17, -1
%19 = load volatile i64, i64* %4
%20 = add nsw i64 %19, 16
%21 = inttoptr i64 %20 to i64*
%22 = load volatile i64, i64* %21
%23 = and i64 %22, %18
store volatile i64 %23, i64* %21
br label %24
24: ; preds = %16, %9
ret void
}

LLVM IR (-O2):
define void @PWMOutputFault(i64 %0, i64 %1, i32 %2) {
%4 = alloca i64
%5 = alloca i64
store volatile i64 %0, i64* %4
store volatile i64 %1, i64* %5
%6 = icmp eq i32 %2, 1
%7 = load volatile i64, i64* %5
br i1 %6, label %8, label %14
8: ; preds = %3
%9 = load volatile i64, i64* %4
%10 = add nsw i64 %9, 16
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = or i64 %12, %7
store volatile i64 %13, i64* %11
br label %21
14: ; preds = %3
%15 = xor i64 %7, -1
%16 = load volatile i64, i64* %4
%17 = add nsw i64 %16, 16
%18 = inttoptr i64 %17 to i64*
%19 = load volatile i64, i64* %18
%20 = and i64 %19, %15
store volatile i64 %20, i64* %18
br label %21
21: ; preds = %14, %8
ret void
}
void PIRAmplifierStage2_SaveConfig(void) {}


x86 assembly (clang, -O0):
<PIRAmplifierStage2_SaveConfig>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIRAmplifierStage2_SaveConfig>:
ret

LLVM IR (-O0):
define void @PIRAmplifierStage2_SaveConfig() {
ret void
}

LLVM IR (-O2):
define void @PIRAmplifierStage2_SaveConfig() {
ret void
}
int find_in_str(char *str, char symb) {
  int it;
  int found;
  it = 0;
  found = -1;
  while (str[it]) {
    if (symb == str[it]) {
      found = 1;
      break;
    }
    it++;
  }
  if (found == -1)
    return (-1);
  else
    return (it);
}


x86 assembly (clang, -O0):
<find_in_str>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
movl   $0x0,-0x18(%rbp)
movl   $0xffffffff,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1160 <find_in_str+0x60>
movsbl -0x11(%rbp),%eax
mov    -0x10(%rbp),%rcx
movslq -0x18(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jne    1152 <find_in_str+0x52>
movl   $0x1,-0x1c(%rbp)
jmp    1160 <find_in_str+0x60>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    111c <find_in_str+0x1c>
cmpl   $0xffffffff,-0x1c(%rbp)
jne    1176 <find_in_str+0x76>
movl   $0xffffffff,-0x4(%rbp)
jmp    117c <find_in_str+0x7c>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_in_str>:
mov    $0xffffffff,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rdi),%eax
add    $0x1,%ecx
test   %al,%al
je     1123 <find_in_str+0x23>
add    $0x1,%rdi
cmp    %sil,%al
jne    1110 <find_in_str+0x10>
cmp    $0x1,%al
sbb    %eax,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @find_in_str(i8* %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 0, i32* %6
store i32 -1, i32* %7
br label %8
8: ; preds = %26, %2
%9 = load i8*, i8** %4
%10 = load i32, i32* %6
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = load i8, i8* %12
%14 = icmp ne i8 %13, 0
br i1 %14, label %15, label %29
15: ; preds = %8
%16 = load i8, i8* %5
%17 = sext i8 %16 to i32
%18 = load i8*, i8** %4
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %17, %23
br i1 %24, label %25, label %26
25: ; preds = %15
store i32 1, i32* %7
br label %29
26: ; preds = %15
%27 = load i32, i32* %6
%28 = add nsw i32 %27, 1
store i32 %28, i32* %6
br label %8
29: ; preds = %25, %8
%30 = load i32, i32* %7
%31 = icmp eq i32 %30, -1
br i1 %31, label %32, label %33
32: ; preds = %29
store i32 -1, i32* %3
br label %35
33: ; preds = %29
%34 = load i32, i32* %6
store i32 %34, i32* %3
br label %35
35: ; preds = %33, %32
%36 = load i32, i32* %3
ret i32 %36
}

LLVM IR (-O2):
define i32 @find_in_str(i8* nocapture %0, i8 signext %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ %10, %3 ], [ 0, %2 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
%8 = icmp eq i8 %6, %1
%9 = or i1 %7, %8
%10 = add nuw i64 %4, 1
br i1 %9, label %11, label %3
11: ; preds = %3
%12 = trunc i64 %4 to i32
%13 = select i1 %7, i32 -1, i32 %12
ret i32 %13
}
/* Variables and functions */
int strcmp(char const *, char const *);
int c_strcmp(const char *s1, const char *s2) { return strcmp(s1, s2); }


x86 assembly (clang, -O0):
<c_strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_strcmp>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @c_strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @c_strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
unsigned int ones(int x) {
  unsigned int acc = 0;
  unsigned int bit = 1;
  while (x > 0) {
    int q = x / 3;
    int r = x - 3 * q;
    if (r == 1)
      acc |= bit;
    bit = bit << 1;
    x = q;
  }
  return acc;
}


x86 assembly (clang, -O0):
<ones>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1160 <ones+0x60>
mov    -0x4(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
imul   $0x3,-0x10(%rbp),%ecx
sub    %ecx,%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x1,-0x14(%rbp)
jne    114c <ones+0x4c>
mov    -0xc(%rbp),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1115 <ones+0x15>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ones>:
test   %edi,%edi
jle    114a <ones+0x4a>
mov    $0x1,%ecx
xor    %eax,%eax
mov    $0xaaaaaaab,%r8d
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %edi,%esi
imul   %r8,%rsi
shr    $0x21,%rsi
lea    (%rsi,%rsi,2),%r9d
mov    %edi,%edx
sub    %r9d,%edx
cmp    $0x1,%edx
mov    $0x0,%edx
cmove  %ecx,%edx
or     %edx,%eax
add    %ecx,%ecx
cmp    $0x2,%edi
mov    %esi,%edi
ja     1120 <ones+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ones(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 1, i32* %4
br label %7
7: ; preds = %23, %1
%8 = load i32, i32* %2
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %27
10: ; preds = %7
%11 = load i32, i32* %2
%12 = sdiv i32 %11, 3
store i32 %12, i32* %5
%13 = load i32, i32* %2
%14 = load i32, i32* %5
%15 = mul nsw i32 3, %14
%16 = sub nsw i32 %13, %15
store i32 %16, i32* %6
%17 = load i32, i32* %6
%18 = icmp eq i32 %17, 1
br i1 %18, label %19, label %23
19: ; preds = %10
%20 = load i32, i32* %4
%21 = load i32, i32* %3
%22 = or i32 %21, %20
store i32 %22, i32* %3
br label %23
23: ; preds = %19, %10
%24 = load i32, i32* %4
%25 = shl i32 %24, 1
store i32 %25, i32* %4
%26 = load i32, i32* %5
store i32 %26, i32* %2
br label %7
27: ; preds = %7
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @ones(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %15
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ %0, %1 ]
%5 = phi i32 [ %12, %3 ], [ 0, %1 ]
%6 = phi i32 [ %13, %3 ], [ 1, %1 ]
%7 = udiv i32 %4, 3
%8 = mul nsw i32 %7, -3
%9 = add nsw i32 %8, %4
%10 = icmp eq i32 %9, 1
%11 = select i1 %10, i32 %6, i32 0
%12 = or i32 %11, %5
%13 = shl i32 %6, 1
%14 = icmp ult i32 %4, 3
br i1 %14, label %15, label %3
15: ; preds = %3, %1
%16 = phi i32 [ 0, %1 ], [ %12, %3 ]
ret i32 %16
}
/* Variables and functions */
scalar_t__ isnan(double);
double fmin2(double x, double y) {
  if (isnan(x) || isnan(y))
    return x + y;
  return (x < y) ? x : y;
}


x86 assembly (clang, -O0):
<fmin2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <isnan@plt>
cmp    $0x0,%rax
jne    114a <fmin2+0x3a>
movsd  -0x18(%rbp),%xmm0
call   1030 <isnan@plt>
cmp    $0x0,%rax
je     115e <fmin2+0x4e>
movsd  -0x10(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1195 <fmin2+0x85>
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1181 <fmin2+0x71>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
jmp    118b <fmin2+0x7b>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmin2>:
sub    $0x18,%rsp
movsd  %xmm1,0x8(%rsp)
movsd  %xmm0,0x10(%rsp)
call   1030 <isnan@plt>
test   %rax,%rax
jne    113a <fmin2+0x2a>
movsd  0x8(%rsp),%xmm0
call   1030 <isnan@plt>
test   %rax,%rax
je     114b <fmin2+0x3b>
movsd  0x10(%rsp),%xmm0
addsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret
movsd  0x10(%rsp),%xmm0
minsd  0x8(%rsp),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @fmin2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = call i64 @isnan(double %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %2
%10 = load double, double* %5
%11 = call i64 @isnan(double %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9, %2
%14 = load double, double* %4
%15 = load double, double* %5
%16 = fadd double %14, %15
store double %16, double* %3
br label %27
17: ; preds = %9
%18 = load double, double* %4
%19 = load double, double* %5
%20 = fcmp olt double %18, %19
br i1 %20, label %21, label %23
21: ; preds = %17
%22 = load double, double* %4
br label %25
23: ; preds = %17
%24 = load double, double* %5
br label %25
25: ; preds = %23, %21
%26 = phi double [ %22, %21 ], [ %24, %23 ]
store double %26, double* %3
br label %27
27: ; preds = %25, %13
%28 = load double, double* %3
ret double %28
}

LLVM IR (-O2):
define double @fmin2(double %0, double %1) {
%3 = tail call i64 @isnan(double %0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i64 @isnan(double %1)
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %5, %2
%9 = fadd double %0, %1
br label %13
10: ; preds = %5
%11 = fcmp olt double %0, %1
%12 = select i1 %11, double %0, double %1
br label %13
13: ; preds = %10, %8
%14 = phi double [ %9, %8 ], [ %12, %10 ]
ret double %14
}
/* Variables and functions */
int /*<<< orphan*/ f04();
int /*<<< orphan*/ f16();
__attribute__((target("avx512f,avx512bw"))) void test2(void) {
  f04();
  f16();
}


x86 assembly (clang, -O0):
<test2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <f04@plt>
mov    $0x0,%al
call   1040 <f16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test2>:
push   %rax
xor    %eax,%eax
call   1030 <f04@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <f16@plt>

LLVM IR (-O0):
define void @test2() {
%1 = call i32 (...) @f04()
%2 = call i32 (...) @f16()
ret void
}

LLVM IR (-O2):
define void @test2() {
%1 = tail call i32 (...) @f04()
%2 = tail call i32 (...) @f16()
ret void
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ xcmemcheck(void *);
void *xcmalloc(size_t size) {
  void *mem;
  mem = malloc(size);
  xcmemcheck(mem);
  return (mem);
}


x86 assembly (clang, -O0):
<xcmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <xcmemcheck@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xcmalloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <xcmemcheck@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @xcmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @xcmemcheck(i8* %6)
%8 = load i8*, i8** %3
ret i8* %8
}

LLVM IR (-O2):
define i8* @xcmalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = tail call i32 @xcmemcheck(i8* %2)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ exponent(long, long);
int /*<<< orphan*/ printf(char *, long, long, int /*<<< orphan*/);
void testExponent() {
  long a = 2;
  for (long i = 0; i < 20; i++)
    printf("%ld^%ld = %ld\n", a, i, exponent(a, i));
}


x86 assembly (clang, -O0):
<testExponent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movq   $0x2,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x14,-0x10(%rbp)
jge    1187 <testExponent+0x67>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <exponent@plt>
mov    -0x20(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    %eax,%ecx
lea    0xe8f(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1138 <testExponent+0x18>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testExponent>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xed3(%rip),%r14
nopl   (%rax)
mov    $0x2,%edi
mov    %rbx,%rsi
call   1040 <exponent@plt>
mov    $0x2,%esi
mov    %r14,%rdi
mov    %rbx,%rdx
mov    %eax,%ecx
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    $0x14,%rbx
jne    1130 <testExponent+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [15 x i8] c"%ld^%ld = %ld\0A\00"
define void @testExponent() {
%1 = alloca i64
%2 = alloca i64
store i64 2, i64* %1
store i64 0, i64* %2
br label %3
3: ; preds = %13, %0
%4 = load i64, i64* %2
%5 = icmp slt i64 %4, 20
br i1 %5, label %6, label %16
6: ; preds = %3
%7 = load i64, i64* %1
%8 = load i64, i64* %2
%9 = load i64, i64* %1
%10 = load i64, i64* %2
%11 = call i32 @exponent(i64 %9, i64 %10)
%12 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i64 %7, i64 %8, i32 %11)
br label %13
13: ; preds = %6
%14 = load i64, i64* %2
%15 = add nsw i64 %14, 1
store i64 %15, i64* %2
br label %3
16: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%ld^%ld = %ld\0A\00"
define void @testExponent() {
br label %2
1: ; preds = %2
ret void
2: ; preds = %0, %2
%3 = phi i64 [ 0, %0 ], [ %6, %2 ]
%4 = tail call i32 @exponent(i64 2, i64 %3)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i64 2, i64 %3, i32 %4)
%6 = add nuw nsw i64 %3, 1
%7 = icmp eq i64 %6, 20
br i1 %7, label %1, label %2
}
int main() {
  asm("ud2");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
ud2
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ud2
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
tail call void asm sideeffect "ud2", "~{dirflag},~{fpsr},~{flags}"()
ret i32 0
}
/* Type definitions */
struct vector_char {
  int dummy;
};

/* Variables and functions */
struct vector_char *vector_char_insert(struct vector_char *, unsigned int,
                                       char const *, int);
struct vector_char *vector_char_insert_one(struct vector_char *v,
                                           unsigned int index, const char p) {
  return vector_char_insert(v, index, &p, 1);
}


x86 assembly (clang, -O0):
<vector_char_insert_one>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    -0xd(%rbp),%rdx
mov    $0x1,%ecx
call   1030 <vector_char_insert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vector_char_insert_one>:
push   %rax
mov    %dl,0x7(%rsp)
lea    0x7(%rsp),%rdx
mov    $0x1,%ecx
call   1030 <vector_char_insert@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.vector_char = type { i32 }
define %struct.vector_char* @vector_char_insert_one(%struct.vector_char* %0, i32 %1, i8 signext %2) {
%4 = alloca %struct.vector_char*
%5 = alloca i32
%6 = alloca i8
store %struct.vector_char* %0, %struct.vector_char** %4
store i32 %1, i32* %5
store i8 %2, i8* %6
%7 = load %struct.vector_char*, %struct.vector_char** %4
%8 = load i32, i32* %5
%9 = call %struct.vector_char* @vector_char_insert(%struct.vector_char* %7, i32 %8, i8* %6, i32 1)
ret %struct.vector_char* %9
}

LLVM IR (-O2):
%struct.vector_char = type { i32 }
define %struct.vector_char* @vector_char_insert_one(%struct.vector_char* %0, i32 %1, i8 signext %2) {
%4 = alloca i8
store i8 %2, i8* %4
%5 = call %struct.vector_char* @vector_char_insert(%struct.vector_char* %0, i32 %1, i8* %4, i32 1)
ret %struct.vector_char* %5
}
int test_imm_0Buint16_reg(unsigned short val) {
  return ((val) & (0x0B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Buint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xb,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Buint16_reg>:
test   $0xb,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Buint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 11
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_0Buint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 11
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ roadmap_login_on_ok(int /*<<< orphan*/ *,
                                       int /*<<< orphan*/ *);
int /*<<< orphan*/ roadmap_main_remove_periodic(void (*)());
void close_timeout(void) {
  roadmap_main_remove_periodic(close_timeout);
  roadmap_login_on_ok(NULL, NULL);
}


x86 assembly (clang, -O0):
<close_timeout>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rdi
call   1030 <roadmap_main_remove_periodic@plt>
xor    %eax,%eax
mov    %eax,%esi
mov    %rsi,%rdi
call   1040 <roadmap_login_on_ok@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_timeout>:
push   %rax
mov    0x2ec0(%rip),%rdi
call   1030 <roadmap_main_remove_periodic@plt>
xor    %edi,%edi
xor    %esi,%esi
pop    %rax
jmp    1040 <roadmap_login_on_ok@plt>

LLVM IR (-O0):
define void @close_timeout() {
%1 = call i32 @roadmap_main_remove_periodic(void (...)* bitcast (void ()* @close_timeout to void (...)*))
%2 = call i32 @roadmap_login_on_ok(i32* null, i32* null)
ret void
}

LLVM IR (-O2):
define void @close_timeout() {
%1 = tail call i32 @roadmap_main_remove_periodic(void (...)* bitcast (void ()* @close_timeout to void (...)*))
%2 = tail call i32 @roadmap_login_on_ok(i32* null, i32* null)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __obfuscation(char *, char *);
int /*<<< orphan*/ strncmp(char *, int /*<<< orphan*/, int);
int __is_valid_pwd(char *pwd) {
  if (!strncmp("\x40\x53\x06\x03\x43\x52\x54\x3b",
               __obfuscation(pwd, "023661dd4\0"),
               sizeof("\x40\x53\x06\x03\x43\x52\x54\x3b"))) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<__is_valid_pwd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed2(%rip),%rsi
call   1040 <__obfuscation@plt>
mov    %eax,%esi
lea    0xebb(%rip),%rdi
mov    $0x9,%edx
call   1030 <strncmp@plt>
cmp    $0x0,%eax
jne    1164 <__is_valid_pwd+0x44>
movl   $0x1,-0x4(%rbp)
jmp    116b <__is_valid_pwd+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__is_valid_pwd>:
push   %rax
lea    0xee1(%rip),%rsi
call   1040 <__obfuscation@plt>
lea    0xecc(%rip),%rdi
mov    %eax,%esi
mov    $0x9,%edx
call   1030 <strncmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"@S\06\03CRT;\00"
@.str.1 = [11 x i8] c"023661dd4\00\00"
define i32 @__is_valid_pwd(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @__obfuscation(i8* %4, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%6 = call i32 @strncmp(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %5, i32 9)
%7 = icmp ne i32 %6, 0
br i1 %7, label %9, label %8
8: ; preds = %1
store i32 1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@.str = [9 x i8] c"@S\06\03CRT;\00"
@.str.1 = [11 x i8] c"023661dd4\00\00"
define i32 @__is_valid_pwd(i8* %0) {
%2 = tail call i32 @__obfuscation(i8* %0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @strncmp(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %2, i32 9)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
void debug_log(const char *fmt, ...) { (void)fmt; }


x86 assembly (clang, -O0):
<debug_log>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_log>:
ret

LLVM IR (-O0):
define void @debug_log(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @debug_log(i8* nocapture %0, ...) {
ret void
}
__attribute__((weak)) void HardFault_Handler(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<HardFault_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <HardFault_Handler+0x9>
jmp    1109 <HardFault_Handler+0x9>

x86 assembly (clang, -O2):
<HardFault_Handler>:
jmp    1100 <HardFault_Handler>

LLVM IR (-O0):
define weak void @HardFault_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define weak void @HardFault_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
void RTTestPrintfNlV(void) {}


x86 assembly (clang, -O0):
<RTTestPrintfNlV>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTTestPrintfNlV>:
ret

LLVM IR (-O0):
define void @RTTestPrintfNlV() {
ret void
}

LLVM IR (-O2):
define void @RTTestPrintfNlV() {
ret void
}
/* Type definitions */
struct cpufreq_affected_cpus {
  int dummy;
};

/* Variables and functions */
struct cpufreq_affected_cpus *sysfs_get_affected_cpus(unsigned int cpu) {
  return NULL;
}


x86 assembly (clang, -O0):
<sysfs_get_affected_cpus>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sysfs_get_affected_cpus>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.cpufreq_affected_cpus = type { i32 }
define %struct.cpufreq_affected_cpus* @sysfs_get_affected_cpus(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret %struct.cpufreq_affected_cpus* null
}

LLVM IR (-O2):
%struct.cpufreq_affected_cpus = type { i32 }
define noalias %struct.cpufreq_affected_cpus* @sysfs_get_affected_cpus(i32 %0) {
ret %struct.cpufreq_affected_cpus* null
}
/* Variables and functions */
float fmaxf(float, float);
float fminf(float, float);
float clamp(float x, float bottom, float top) {
  x = fmaxf(x, bottom);
  x = fminf(x, top);
  return x;
}


x86 assembly (clang, -O0):
<clamp>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm3
movss  -0x8(%rbp),%xmm2
movaps %xmm2,%xmm4
movaps %xmm3,%xmm0
cmpunordss %xmm0,%xmm0
movaps %xmm0,%xmm1
pand   %xmm4,%xmm1
maxss  %xmm3,%xmm2
pandn  %xmm2,%xmm0
por    %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm3
movss  -0xc(%rbp),%xmm2
movaps %xmm2,%xmm4
movaps %xmm3,%xmm0
cmpunordss %xmm0,%xmm0
movaps %xmm0,%xmm1
pand   %xmm4,%xmm1
minss  %xmm3,%xmm2
pandn  %xmm2,%xmm0
por    %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<clamp>:
movaps %xmm0,%xmm3
cmpunordss %xmm0,%xmm3
movaps %xmm3,%xmm4
andps  %xmm1,%xmm4
maxss  %xmm0,%xmm1
andnps %xmm1,%xmm3
orps   %xmm4,%xmm3
movaps %xmm2,%xmm0
minss  %xmm3,%xmm0
cmpunordss %xmm3,%xmm3
movaps %xmm3,%xmm1
andnps %xmm0,%xmm1
andps  %xmm2,%xmm3
orps   %xmm1,%xmm3
movaps %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @clamp(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = call float @llvm.maxnum.f32(float %7, float %8)
store float %9, float* %4
%10 = load float, float* %4
%11 = load float, float* %6
%12 = call float @llvm.minnum.f32(float %10, float %11)
store float %12, float* %4
%13 = load float, float* %4
ret float %13
}

LLVM IR (-O2):
define float @clamp(float %0, float %1, float %2) {
%4 = tail call float @llvm.maxnum.f32(float %0, float %1)
%5 = tail call float @llvm.minnum.f32(float %4, float %2)
ret float %5
}
void clearPins(int *p_pinsStruc) {
  int i;
  for (i = 0; i < 8; i++) {
    p_pinsStruc[i] = 3;
  }
}


x86 assembly (clang, -O0):
<clearPins>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x8,-0xc(%rbp)
jge    1136 <clearPins+0x36>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movl   $0x3,(%rax,%rcx,4)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <clearPins+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<clearPins>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
movups %xmm0,0x10(%rdi)
ret

LLVM IR (-O0):
define void @clearPins(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 8
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32*, i32** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
store i32 3, i32* %11
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @clearPins(i32* nocapture writeonly %0) {
%2 = bitcast i32* %0 to <4 x i32>*
store <4 x i32> <i32 3, i32 3, i32 3, i32 3>, <4 x i32>* %2
%3 = getelementptr inbounds i32, i32* %0, i64 4
%4 = bitcast i32* %3 to <4 x i32>*
store <4 x i32> <i32 3, i32 3, i32 3, i32 3>, <4 x i32>* %4
ret void
}
long loop_while2(long a, long b) {
  long result = b;
  while (b > 0) {
    result *= a;
    b -= a;
  }
  return result;
}


x86 assembly (clang, -O0):
<loop_while2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jle    1140 <loop_while2+0x40>
mov    -0x8(%rbp),%rax
imul   -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1114 <loop_while2+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop_while2>:
mov    %rsi,%rax
test   %rsi,%rsi
jle    111c <loop_while2+0x1c>
mov    %rax,%rcx
nopl   0x0(%rax,%rax,1)
imul   %rdi,%rax
sub    %rdi,%rcx
test   %rcx,%rcx
jg     1110 <loop_while2+0x10>
ret

LLVM IR (-O0):
define i64 @loop_while2(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %4
store i64 %6, i64* %5
br label %7
7: ; preds = %10, %2
%8 = load i64, i64* %4
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %17
10: ; preds = %7
%11 = load i64, i64* %3
%12 = load i64, i64* %5
%13 = mul nsw i64 %12, %11
store i64 %13, i64* %5
%14 = load i64, i64* %3
%15 = load i64, i64* %4
%16 = sub nsw i64 %15, %14
store i64 %16, i64* %4
br label %7
17: ; preds = %7
%18 = load i64, i64* %5
ret i64 %18
}

LLVM IR (-O2):
define i64 @loop_while2(i64 %0, i64 %1) {
%3 = icmp sgt i64 %1, 0
br i1 %3, label %4, label %10
4: ; preds = %2, %4
%5 = phi i64 [ %7, %4 ], [ %1, %2 ]
%6 = phi i64 [ %8, %4 ], [ %1, %2 ]
%7 = mul nsw i64 %5, %0
%8 = sub nsw i64 %6, %0
%9 = icmp sgt i64 %8, 0
br i1 %9, label %4, label %10
10: ; preds = %4, %2
%11 = phi i64 [ %1, %2 ], [ %7, %4 ]
ret i64 %11
}
/* Variables and functions */
int bcm2835_read(int);
int /*<<< orphan*/ bcm2835_write(int, unsigned char);
void pl011_uart_putc(unsigned char byte) {
  while (bcm2835_read((0 + 0x201000 + 0x18)) & (1 << 5)) {
  }
  bcm2835_write((0 + 0x201000 + 0x00), byte);
}


x86 assembly (clang, -O0):
<pl011_uart_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x201018,%edi
call   1030 <bcm2835_read@plt>
and    $0x20,%eax
cmp    $0x0,%eax
je     1149 <pl011_uart_putc+0x29>
jmp    112e <pl011_uart_putc+0xe>
mov    $0x201000,%edi
movzbl -0x1(%rbp),%esi
call   1040 <bcm2835_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pl011_uart_putc>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    $0x201018,%edi
call   1030 <bcm2835_read@plt>
test   $0x20,%al
jne    1130 <pl011_uart_putc+0x10>
movzbl %bl,%esi
mov    $0x201000,%edi
pop    %rbx
jmp    1040 <bcm2835_write@plt>

LLVM IR (-O0):
define void @pl011_uart_putc(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %7, %1
%4 = call i32 @bcm2835_read(i32 2101272)
%5 = and i32 %4, 32
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = load i8, i8* %2
%10 = call i32 @bcm2835_write(i32 2101248, i8 zeroext %9)
ret void
}

LLVM IR (-O2):
define void @pl011_uart_putc(i8 zeroext %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @bcm2835_read(i32 2101272)
%4 = and i32 %3, 32
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %2
6: ; preds = %2
%7 = tail call i32 @bcm2835_write(i32 2101248, i8 zeroext %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430GpioC__1__GeneralIO__set();
void CC2420ReceiveP__CSN__set(void) { Msp430GpioC__1__GeneralIO__set(); }


x86 assembly (clang, -O0):
<CC2420ReceiveP__CSN__set>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430GpioC__1__GeneralIO__set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CC2420ReceiveP__CSN__set>:
xor    %eax,%eax
jmp    1030 <Msp430GpioC__1__GeneralIO__set@plt>

LLVM IR (-O0):
define void @CC2420ReceiveP__CSN__set() {
%1 = call i32 (...) @Msp430GpioC__1__GeneralIO__set()
ret void
}

LLVM IR (-O2):
define void @CC2420ReceiveP__CSN__set() {
%1 = tail call i32 (...) @Msp430GpioC__1__GeneralIO__set()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int map_db_final(void *key, void *data, va_list ap) { return 0; }


x86 assembly (clang, -O0):
<map_db_final>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_db_final>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @map_db_final(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @map_db_final(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ PWM3_0_DriverIRQHandler();
__attribute__((weak)) void PWM3_0_IRQHandler(void) {
  PWM3_0_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<PWM3_0_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PWM3_0_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWM3_0_IRQHandler>:
xor    %eax,%eax
jmp    1030 <PWM3_0_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @PWM3_0_IRQHandler() {
%1 = call i32 (...) @PWM3_0_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @PWM3_0_IRQHandler() {
%1 = tail call i32 (...) @PWM3_0_DriverIRQHandler()
ret void
}
void scm_mpu_lock_kernel_text(void) {}


x86 assembly (clang, -O0):
<scm_mpu_lock_kernel_text>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scm_mpu_lock_kernel_text>:
ret

LLVM IR (-O0):
define void @scm_mpu_lock_kernel_text() {
ret void
}

LLVM IR (-O2):
define void @scm_mpu_lock_kernel_text() {
ret void
}
void ASMAtomicUoReadU64(void) {}


x86 assembly (clang, -O0):
<ASMAtomicUoReadU64>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASMAtomicUoReadU64>:
ret

LLVM IR (-O0):
define void @ASMAtomicUoReadU64() {
ret void
}

LLVM IR (-O2):
define void @ASMAtomicUoReadU64() {
ret void
}
void log_open(void) {}


x86 assembly (clang, -O0):
<log_open>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_open>:
ret

LLVM IR (-O0):
define void @log_open() {
ret void
}

LLVM IR (-O2):
define void @log_open() {
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ send_event;
};
typedef TYPE_1__ XGravityEvent;

/* Variables and functions */
int get_XGravityEvent_send_event(void *_p) {
  return (int)((XGravityEvent *)_p)->send_event;
}


x86 assembly (clang, -O0):
<get_XGravityEvent_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XGravityEvent_send_event>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XGravityEvent_send_event(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XGravityEvent_send_event(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ printf(char *, int, ...);
void main() {
  int i;
  int a[0];
  typedef struct st_type {
    int i;
    int a[];
  } type_a;
  printf("sizeof int %d,\nsizeof flexible array:%d\n", sizeof i,
         sizeof(type_a));
  type_a *p = (type_a *)malloc(sizeof(type_a) + 100 * sizeof(int));
  printf("sizeof struct var after malloc:%d\n", sizeof(*p));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
mov    $0x4,%esi
mov    $0x4,%edx
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0x194,%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
lea    0xed4(%rip),%rdi
mov    $0x4,%esi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x4,%edx
mov    $0x4,%esi
xor    %eax,%eax
call   1030 <printf@plt>
mov    $0x194,%edi
call   1040 <malloc@plt>
lea    0xedf(%rip),%rdi
mov    $0x4,%esi
xor    %eax,%eax
pop    %rcx
jmp    1030 <printf@plt>

LLVM IR (-O0):
%struct.st_type = type { i32, [0 x i32] }
@.str = [41 x i8] c"sizeof int %d,\0Asizeof flexible array:%d\0A\00"
@.str.1 = [35 x i8] c"sizeof struct var after malloc:%d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca [0 x i32]
%3 = alloca %struct.st_type*
%4 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 4, i64 4)
%5 = call i64 @malloc(i32 404)
%6 = inttoptr i64 %5 to %struct.st_type*
store %struct.st_type* %6, %struct.st_type** %3
%7 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i32 4)
ret void
}

LLVM IR (-O2):
@.str = [41 x i8] c"sizeof int %d,\0Asizeof flexible array:%d\0A\00"
@.str.1 = [35 x i8] c"sizeof struct var after malloc:%d\0A\00"
define void @main() {
%1 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 4, i64 4)
%2 = tail call i64 @malloc(i32 404)
%3 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char const *);
int /*<<< orphan*/ stderr;
void fatal(const char *msg) {
  fprintf(stderr, msg);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <fprintf@plt>
mov    0x2e93(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fatal>:
push   %rax
mov    %rdi,%rsi
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
call   1030 <fprintf@plt>
mov    0x2e9f(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@EXIT_FAILURE = global i32 0
define void @fatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@EXIT_FAILURE = global i32 0
define void @fatal(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int /*<<< orphan*/ IntEnable(int);
int /*<<< orphan*/ IntRegister(int, void (*)());
void SHAMD5IntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) {
  ASSERT(ui32Base == 0x44034000);
  IntRegister(110, pfnHandler);
  IntEnable(110);
}


x86 assembly (clang, -O0):
<SHAMD5IntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x44034000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <ASSERT@plt>
mov    -0x10(%rbp),%rsi
mov    $0x6e,%edi
call   1040 <IntRegister@plt>
mov    $0x6e,%edi
call   1030 <IntEnable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAMD5IntRegister>:
push   %rbx
mov    %rsi,%rbx
xor    %eax,%eax
cmp    $0x44034000,%edi
sete   %al
mov    %eax,%edi
call   1050 <ASSERT@plt>
mov    $0x6e,%edi
mov    %rbx,%rsi
call   1040 <IntRegister@plt>
mov    $0x6e,%edi
pop    %rbx
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @SHAMD5IntRegister(i32 %0, void ()* %1) {
%3 = alloca i32
%4 = alloca void ()*
store i32 %0, i32* %3
store void ()* %1, void ()** %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1141063680
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load void ()*, void ()** %4
%10 = bitcast void ()* %9 to void (...)*
%11 = call i32 @IntRegister(i32 110, void (...)* %10)
%12 = call i32 @IntEnable(i32 110)
ret void
}

LLVM IR (-O2):
define void @SHAMD5IntRegister(i32 %0, void ()* %1) {
%3 = icmp eq i32 %0, 1141063680
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = bitcast void ()* %1 to void (...)*
%7 = tail call i32 @IntRegister(i32 110, void (...)* %6)
%8 = tail call i32 @IntEnable(i32 110)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ time;
};
typedef TYPE_1__ XButtonReleasedEvent;

/* Variables and functions */
unsigned long get_XButtonReleasedEvent_time(void *_p) {
  return (unsigned long)((XButtonReleasedEvent *)_p)->time;
}


x86 assembly (clang, -O0):
<get_XButtonReleasedEvent_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XButtonReleasedEvent_time>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XButtonReleasedEvent_time(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XButtonReleasedEvent_time(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Variables and functions */
float round(float x) { return (float)((int)(x + 0.5f)); }


x86 assembly (clang, -O0):
<round>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
addss  -0x4(%rbp),%xmm0
cvttss2si %xmm0,%eax
cvtsi2ss %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<round>:
addss  0xef8(%rip),%xmm0
cvttps2dq %xmm0,%xmm0
cvtdq2ps %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @round(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fadd float %3, 5.000000e-01
%5 = fptosi float %4 to i32
%6 = sitofp i32 %5 to float
ret float %6
}

LLVM IR (-O2):
define float @round(float %0) {
%2 = fadd float %0, 5.000000e-01
%3 = fptosi float %2 to i32
%4 = sitofp i32 %3 to float
ret float %4
}