xunge/DecIR huggingface dataset:
int isMultiplo(int a, int b) {
  return a >= b ? (a % b == 0 ? 1 : 0) : isMultiplo(b, a);
}


x86 assembly (clang, -O0):
<isMultiplo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jl     1146 <isMultiplo+0x36>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmove  %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    1154 <isMultiplo+0x44>
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%esi
call   1030 <isMultiplo@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isMultiplo>:
mov    %esi,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %eax,%ecx
mov    %edi,%eax
mov    %ecx,%edi
cmp    %ecx,%eax
jl     1110 <isMultiplo+0x10>
cltd
idiv   %ecx
xor    %eax,%eax
test   %edx,%edx
sete   %al
ret

LLVM IR (-O0):
define i32 @isMultiplo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sge i32 %5, %6
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = srem i32 %9, %10
%12 = icmp eq i32 %11, 0
%13 = zext i1 %12 to i64
%14 = select i1 %12, i32 1, i32 0
br label %19
15: ; preds = %2
%16 = load i32, i32* %4
%17 = load i32, i32* %3
%18 = call i32 @isMultiplo(i32 %16, i32 %17)
br label %19
19: ; preds = %15, %8
%20 = phi i32 [ %14, %8 ], [ %18, %15 ]
ret i32 %20
}

LLVM IR (-O2):
define i32 @isMultiplo(i32 %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %0, %2 ], [ %5, %3 ]
%5 = phi i32 [ %1, %2 ], [ %4, %3 ]
%6 = icmp slt i32 %4, %5
br i1 %6, label %3, label %7
7: ; preds = %3
%8 = srem i32 %4, %5
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}
int foo(int a, int b) {
  if (a != b) {
    a = a << b;
    a = a >> 1;
  }
  return a + b;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
je     112a <foo+0x2a>
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
sar    %eax
cmp    %esi,%edi
cmove  %edi,%eax
add    %esi,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %2
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = shl i32 %9, %10
store i32 %11, i32* %3
%12 = load i32, i32* %3
%13 = ashr i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %8, %2
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = add nsw i32 %15, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
%4 = shl i32 %0, %1
%5 = ashr i32 %4, 1
%6 = select i1 %3, i32 %0, i32 %5
%7 = add nsw i32 %6, %1
ret i32 %7
}
int verify_benchmark(int r) {
  int expected = -2147483648;
  if (r != expected)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<verify_benchmark>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x80000000,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
je     1126 <verify_benchmark+0x26>
movl   $0x0,-0x4(%rbp)
jmp    112d <verify_benchmark+0x2d>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<verify_benchmark>:
xor    %eax,%eax
cmp    $0x80000000,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @verify_benchmark(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 -2147483648, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp ne i32 %5, %6
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %10
9: ; preds = %1
store i32 1, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @verify_benchmark(i32 %0) {
%2 = icmp eq i32 %0, -2147483648
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef unsigned long uint32_t;
typedef int int32_t;

/* Variables and functions */
int32_t SSIDataPutNonBlocking(uint32_t ui32Base, uint32_t ui32Data) {
  ;

  ;
  if ((*((volatile unsigned long *)(ui32Base + 0x0000000C))) & 0x00000002) {
    (*((volatile unsigned long *)(ui32Base + 0x00000008))) = ui32Data;
    return (1);
  } else {
    return (0);
  }
}


x86 assembly (clang, -O0):
<SSIDataPutNonBlocking>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0xc(%rax),%rax
and    $0x2,%rax
cmp    $0x0,%rax
je     113a <SSIDataPutNonBlocking+0x3a>
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,0x8(%rax)
movl   $0x1,-0x4(%rbp)
jmp    1141 <SSIDataPutNonBlocking+0x41>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIDataPutNonBlocking>:
xor    %eax,%eax
testq  $0x2,0xc(%rdi)
je     1115 <SSIDataPutNonBlocking+0x15>
mov    %rsi,0x8(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @SSIDataPutNonBlocking(i64 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%6 = load i64, i64* %4
%7 = add i64 %6, 12
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, 2
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %17
12: ; preds = %2
%13 = load i64, i64* %5
%14 = load i64, i64* %4
%15 = add i64 %14, 8
%16 = inttoptr i64 %15 to i64*
store volatile i64 %13, i64* %16
store i32 1, i32* %3
br label %18
17: ; preds = %2
store i32 0, i32* %3
br label %18
18: ; preds = %17, %12
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @SSIDataPutNonBlocking(i64 %0, i64 %1) {
%3 = add i64 %0, 12
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, 2
%7 = icmp eq i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = add i64 %0, 8
%10 = inttoptr i64 %9 to i64*
store volatile i64 %1, i64* %10
br label %11
11: ; preds = %2, %8
%12 = phi i32 [ 1, %8 ], [ 0, %2 ]
ret i32 %12
}
/* Variables and functions */
int repeat_test_utility(int);
int repeat_test(void) {
  int errors = repeat_test_utility(5);
  return errors;
}


x86 assembly (clang, -O0):
<repeat_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x5,%edi
call   1030 <repeat_test_utility@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<repeat_test>:
mov    $0x5,%edi
jmp    1030 <repeat_test_utility@plt>

LLVM IR (-O0):
define i32 @repeat_test() {
%1 = alloca i32
%2 = call i32 @repeat_test_utility(i32 5)
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @repeat_test() {
%1 = tail call i32 @repeat_test_utility(i32 5)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ bbm_write(void *, int, int);
int /*<<< orphan*/ ms_wait(int);
int fc8080_reset(void *handle) {
  bbm_write(handle, 0x0001, 0xfe);
  ms_wait(1);
  bbm_write(handle, 0x0001, 0xff);
  return 0;
}


x86 assembly (clang, -O0):
<fc8080_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
mov    $0xfe,%edx
call   1030 <bbm_write@plt>
mov    $0x1,%edi
call   1040 <ms_wait@plt>
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
mov    $0xff,%edx
call   1030 <bbm_write@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc8080_reset>:
push   %rbx
mov    %rdi,%rbx
mov    $0x1,%esi
mov    $0xfe,%edx
call   1030 <bbm_write@plt>
mov    $0x1,%edi
call   1040 <ms_wait@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
mov    $0xff,%edx
call   1030 <bbm_write@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @fc8080_reset(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @bbm_write(i8* %3, i32 1, i32 254)
%5 = call i32 @ms_wait(i32 1)
%6 = load i8*, i8** %2
%7 = call i32 @bbm_write(i8* %6, i32 1, i32 255)
ret i32 0
}

LLVM IR (-O2):
define i32 @fc8080_reset(i8* %0) {
%2 = tail call i32 @bbm_write(i8* %0, i32 1, i32 254)
%3 = tail call i32 @ms_wait(i32 1)
%4 = tail call i32 @bbm_write(i8* %0, i32 1, i32 255)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ GL_Cleanup();
void R_Cleanup() { GL_Cleanup(); }


x86 assembly (clang, -O0):
<R_Cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GL_Cleanup@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<R_Cleanup>:
xor    %eax,%eax
jmp    1030 <GL_Cleanup@plt>

LLVM IR (-O0):
define void @R_Cleanup() {
%1 = call i32 (...) @GL_Cleanup()
ret void
}

LLVM IR (-O2):
define void @R_Cleanup() {
%1 = tail call i32 (...) @GL_Cleanup()
ret void
}
void test_4(unsigned char *x, unsigned int *y) { y[0] = x[1] >> 5; }


x86 assembly (clang, -O0):
<test_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%ecx
sar    $0x5,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_4>:
movzbl 0x1(%rdi),%eax
shr    $0x5,%eax
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @test_4(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = ashr i32 %8, 5
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i64 0
store i32 %9, i32* %11
ret void
}

LLVM IR (-O2):
define void @test_4(i8* nocapture %0, i32* nocapture writeonly %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 1
%4 = load i8, i8* %3
%5 = lshr i8 %4, 5
%6 = zext i8 %5 to i32
store i32 %6, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __builtin_foo(int, int);
void test_unknown_builtin(int a, int b) { __builtin_foo(a, b); }


x86 assembly (clang, -O0):
<test_unknown_builtin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <__builtin_foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_unknown_builtin>:
jmp    1030 <__builtin_foo@plt>

LLVM IR (-O0):
define void @test_unknown_builtin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__builtin_foo(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @test_unknown_builtin(i32 %0, i32 %1) {
%3 = tail call i32 @__builtin_foo(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
int main() {
  system("./initd &");
  system("ls");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <system@plt>
lea    0xed8(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <system@plt>
lea    0xee6(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"./initd &\00"
@.str.1 = [3 x i8] c"ls\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @system(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @system(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [10 x i8] c"./initd &\00"
@.str.1 = [3 x i8] c"ls\00"
define i32 @main() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @system(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
int main(void) {
  int i = 43;
  if (--i < 43) {
    return i;
  } else {
    return 99;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x2b,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
cmp    $0x2b,%eax
jge    112f <main+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1136 <main+0x36>
movl   $0x63,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 43, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, -1
store i32 %4, i32* %2
%5 = icmp slt i32 %4, 43
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = load i32, i32* %2
store i32 %7, i32* %1
br label %9
8: ; preds = %0
store i32 99, i32* %1
br label %9
9: ; preds = %8, %6
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
define i32 @main() {
ret i32 42
}
void curl_multi_fdset() {}


x86 assembly (clang, -O0):
<curl_multi_fdset>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<curl_multi_fdset>:
ret

LLVM IR (-O0):
define void @curl_multi_fdset() {
ret void
}

LLVM IR (-O2):
define void @curl_multi_fdset() {
ret void
}
int of_count_phandle_with_args(const struct device_node *np,
                               const char *list_name, const char *cells_name) {
  return -38;
}


x86 assembly (clang, -O0):
<of_count_phandle_with_args>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xffffffda,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<of_count_phandle_with_args>:
mov    $0xffffffda,%eax
ret

LLVM IR (-O0):
%struct.device_node = type opaque
define i32 @of_count_phandle_with_args(%struct.device_node* %0, i8* %1, i8* %2) {
%4 = alloca %struct.device_node*
%5 = alloca i8*
%6 = alloca i8*
store %struct.device_node* %0, %struct.device_node** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret i32 -38
}

LLVM IR (-O2):
%struct.device_node = type opaque
define i32 @of_count_phandle_with_args(%struct.device_node* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
ret i32 -38
}
void dmb_noop() {}


x86 assembly (clang, -O0):
<dmb_noop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmb_noop>:
ret

LLVM IR (-O0):
define void @dmb_noop() {
ret void
}

LLVM IR (-O2):
define void @dmb_noop() {
ret void
}
/* Variables and functions */
scalar_t__ is_null_or_empty(char const *);
int write_line_to_file(char const *, char const *, char *,
                       int /*<<< orphan*/ *);
int log_message(const char *path, const char *message) {
  if (is_null_or_empty(path))
    return 1;
  return write_line_to_file(path, message, "", NULL);
}


x86 assembly (clang, -O0):
<log_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <is_null_or_empty@plt>
cmp    $0x0,%rax
je     114f <log_message+0x2f>
movl   $0x1,-0x4(%rbp)
jmp    116a <log_message+0x4a>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
lea    0xea2(%rip),%rdx
xor    %eax,%eax
mov    %eax,%ecx
call   1030 <write_line_to_file@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_message>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
call   1040 <is_null_or_empty@plt>
test   %rax,%rax
je     1141 <log_message+0x21>
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
lea    0xeb8(%rip),%rdx
mov    %rbx,%rdi
mov    %r14,%rsi
xor    %ecx,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <write_line_to_file@plt>

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i32 @log_message(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = call i64 @is_null_or_empty(i8* %6)
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, i32* %3
br label %14
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = load i8*, i8** %5
%13 = call i32 @write_line_to_file(i8* %11, i8* %12, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i32* null)
store i32 %13, i32* %3
br label %14
14: ; preds = %10, %9
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i32 @log_message(i8* %0, i8* %1) {
%3 = tail call i64 @is_null_or_empty(i8* %0)
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @write_line_to_file(i8* %0, i8* %1, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i32* null)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ 1, %2 ]
ret i32 %8
}
int slozhenie(int a, int b) { return a + b; }


x86 assembly (clang, -O0):
<slozhenie>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<slozhenie>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @slozhenie(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @slozhenie(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
/* Type definitions */
typedef size_t uint32_t;

/* Variables and functions */
size_t ziplistBlobLen(unsigned char *zl) { return ((*((uint32_t *)(zl)))); }


x86 assembly (clang, -O0):
<ziplistBlobLen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ziplistBlobLen>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
define i64 @ziplistBlobLen(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i64*
%5 = load i64, i64* %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @ziplistBlobLen(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int get32_H(uint32_t x) {
  if (((x >> 31) & 0x01) != 0x01)
    return 0;
  else
    return 1;
}


x86 assembly (clang, -O0):
<get32_H>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1f,%eax
and    $0x1,%eax
cmp    $0x1,%eax
je     1125 <get32_H+0x25>
movl   $0x0,-0x4(%rbp)
jmp    112c <get32_H+0x2c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get32_H>:
mov    %edi,%eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @get32_H(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = ashr i32 %4, 31
%6 = and i32 %5, 1
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %10
9: ; preds = %1
store i32 1, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @get32_H(i32 %0) {
%2 = lshr i32 %0, 31
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, int);
int /*<<< orphan*/ stderr;
void usage(const char *argv0, int retcode) {
  fprintf(
      stderr,
      "%s: a consensus protocol demo.\noptions:\n-h:                     this "
      "help message\n-n <num-nodes>          set the number of acceptors "
      "(default: %d)\n-v                      enable verbose debug messages\n",
      argv0, 5);
  exit(retcode);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xebd(%rip),%rsi
mov    $0x5,%ecx
call   1030 <fprintf@plt>
mov    -0xc(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rdx
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
mov    $0x5,%ecx
call   1030 <fprintf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [203 x i8] c"%s: a consensus protocol demo.\0Aoptions:\0A-h: this help message\0A-n <num-nodes> set the number of acceptors (default: %d)\0A-v enable verbose debug messages\0A\00"
define void @usage(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([203 x i8], [203 x i8]* @.str, i64 0, i64 0), i8* %6, i32 5)
%8 = load i32, i32* %4
%9 = call i32 @exit(i32 %8)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [203 x i8] c"%s: a consensus protocol demo.\0Aoptions:\0A-h: this help message\0A-n <num-nodes> set the number of acceptors (default: %d)\0A-v enable verbose debug messages\0A\00"
define void @usage(i8* %0, i32 %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([203 x i8], [203 x i8]* @.str, i64 0, i64 0), i8* %0, i32 5)
%5 = tail call i32 @exit(i32 %1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
int main(void) {
  float a = 2.5;
  float b = 1.5;
  __VERIFIER_assert(a < b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movss  0xedd(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  0xecc(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <__VERIFIER_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca float
store i32 0, i32* %1
store float 2.500000e+00, float* %2
store float 1.500000e+00, float* %3
%4 = load float, float* %2
%5 = load float, float* %3
%6 = fcmp olt float %4, %5
%7 = zext i1 %6 to i32
%8 = call i32 @__VERIFIER_assert(i32 %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @__VERIFIER_assert(i32 0)
ret i32 0
}
/* Variables and functions */
int ls_cost_nm3_f0(double const **, double **, int *, double *, int);
int ls_cost_nm3(const double **arg, double **res, int *iw, double *w, int mem) {
  return ls_cost_nm3_f0(arg, res, iw, w, mem);
}


x86 assembly (clang, -O0):
<ls_cost_nm3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
call   1030 <ls_cost_nm3_f0@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm3>:
jmp    1030 <ls_cost_nm3_f0@plt>

LLVM IR (-O0):
define i32 @ls_cost_nm3(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = alloca double**
%7 = alloca double**
%8 = alloca i32*
%9 = alloca double*
%10 = alloca i32
store double** %0, double*** %6
store double** %1, double*** %7
store i32* %2, i32** %8
store double* %3, double** %9
store i32 %4, i32* %10
%11 = load double**, double*** %6
%12 = load double**, double*** %7
%13 = load i32*, i32** %8
%14 = load double*, double** %9
%15 = load i32, i32* %10
%16 = call i32 @ls_cost_nm3_f0(double** %11, double** %12, i32* %13, double* %14, i32 %15)
ret i32 %16
}

LLVM IR (-O2):
define i32 @ls_cost_nm3(double** %0, double** %1, i32* %2, double* %3, i32 %4) {
%6 = tail call i32 @ls_cost_nm3_f0(double** %0, double** %1, i32* %2, double* %3, i32 %4)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void invalid_flag() { printf("Usage: uname  [-amnsv]\n"); }


x86 assembly (clang, -O0):
<invalid_flag>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<invalid_flag>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"Usage: uname [-amnsv]\0A\00"
define void @invalid_flag() {
%1 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [23 x i8] c"Usage: uname [-amnsv]\00"
define void @invalid_flag() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ f(char *, int);
int /*<<< orphan*/ printf(char *, int);
int strlen(char *);
int main(void) {
  char a[] = {'a', 'b', 'c', 'd'};
  f(a + 1, 1);
  printf("%d", strlen(a));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xebb(%rip),%eax
mov    %eax,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
add    $0x1,%rdi
mov    $0x1,%esi
call   1040 <f@plt>
lea    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%esi
lea    0xe98(%rip),%rdi
call   1050 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x64636261,0x4(%rsp)
64
lea    0x5(%rsp),%rdi
mov    $0x1,%esi
call   1040 <f@plt>
lea    0x4(%rsp),%rdi
call   1030 <strlen@plt>
lea    0xea7(%rip),%rdi
mov    %eax,%esi
call   1050 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.a = [4 x i8] c"abcd"
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [4 x i8]
store i32 0, i32* %1
%3 = bitcast [4 x i8]* %2 to i8*
%4 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = call i32 @f(i8* %5, i32 1)
%7 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 1684234849, i32* %1
%3 = getelementptr inbounds i8, i8* %2, i64 1
%4 = call i32 @f(i8* %3, i32 1)
%5 = call i32 @strlen(i8* %2)
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sqliteasyncqueryf(int /*<<< orphan*/, int /*<<< orphan*/ *,
                                     int /*<<< orphan*/ *, int /*<<< orphan*/,
                                     char *, char *, ...);
void sqliteattach(char *schema) {
  sqliteasyncqueryf(0, NULL, NULL, 0, "ATTACH DATABASE '%s.db' AS %s", schema,
                    schema);
  sqliteasyncqueryf(0, NULL, NULL, 0,
                    "PRAGMA %s.synchronous="
                    "OFF",
                    schema);
}


x86 assembly (clang, -O0):
<sqliteattach>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%r9
mov    -0x8(%rbp),%rax
xor    %ecx,%ecx
xor    %edx,%edx
lea    0xed1(%rip),%r8
mov    %ecx,%edi
mov    %rdx,%rsi
mov    %rax,(%rsp)
mov    $0x0,%al
call   1030 <sqliteasyncqueryf@plt>
mov    -0x8(%rbp),%r9
xor    %ecx,%ecx
xor    %eax,%eax
mov    %eax,%edx
lea    0xece(%rip),%r8
mov    %ecx,%edi
mov    %rdx,%rsi
mov    $0x0,%al
call   1030 <sqliteasyncqueryf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqliteattach>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %rdi,(%rsp)
lea    0xedd(%rip),%r8
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
mov    %rbx,%r9
xor    %eax,%eax
call   1030 <sqliteasyncqueryf@plt>
lea    0xee2(%rip),%r8
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
mov    %rbx,%r9
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1030 <sqliteasyncqueryf@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"ATTACH DATABASE '%s.db' AS %s\00"
@.str.1 = [26 x i8] c"PRAGMA %s.synchronous=OFF\00"
define void @sqliteattach(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 (i32, i32*, i32*, i32, i8*, i8*, ...) @sqliteasyncqueryf(i32 0, i32* null, i32* null, i32 0, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %4)
%6 = load i8*, i8** %2
%7 = call i32 (i32, i32*, i32*, i32, i8*, i8*, ...) @sqliteasyncqueryf(i32 0, i32* null, i32* null, i32 0, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"ATTACH DATABASE '%s.db' AS %s\00"
@.str.1 = [26 x i8] c"PRAGMA %s.synchronous=OFF\00"
define void @sqliteattach(i8* %0) {
%2 = tail call i32 (i32, i32*, i32*, i32, i8*, i8*, ...) @sqliteasyncqueryf(i32 0, i32* null, i32* null, i32 0, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %0)
%3 = tail call i32 (i32, i32*, i32*, i32, i8*, i8*, ...) @sqliteasyncqueryf(i32 0, i32* null, i32* null, i32 0, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;
typedef int dev_t;

/* Variables and functions */
int syscall(int, int, char const *, int /*<<< orphan*/, int);
int mknodat(int fd, const char *path, mode_t mode, dev_t dev) {
  return syscall(297, fd, path, mode, dev & 0xffff);
}


x86 assembly (clang, -O0):
<mknodat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
and    $0xffff,%r8d
mov    $0x129,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mknodat>:
mov    %edx,%eax
mov    %rsi,%rdx
mov    %edi,%esi
movzwl %cx,%r8d
mov    $0x129,%edi
mov    %eax,%ecx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @mknodat(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = and i32 %12, 65535
%14 = call i32 @syscall(i32 297, i32 %9, i8* %10, i32 %11, i32 %13)
ret i32 %14
}

LLVM IR (-O2):
define i32 @mknodat(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = and i32 %3, 65535
%6 = tail call i32 @syscall(i32 297, i32 %0, i8* %1, i32 %2, i32 %5)
ret i32 %6
}
void x87_fpu_exception_handler(struct exception_info *info) {
  asm volatile("" : : :);
  asm volatile("hlt");
}


x86 assembly (clang, -O0):
<x87_fpu_exception_handler>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<x87_fpu_exception_handler>:
hlt
ret

LLVM IR (-O0):
%struct.exception_info = type opaque
define void @x87_fpu_exception_handler(%struct.exception_info* %0) {
%2 = alloca %struct.exception_info*
store %struct.exception_info* %0, %struct.exception_info** %2
ret void
}

LLVM IR (-O2):
%struct.exception_info = type opaque
define void @x87_fpu_exception_handler(%struct.exception_info* nocapture readnone %0) {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "hlt", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gdtInit();
int /*<<< orphan*/ idtInit();
int /*<<< orphan*/ initExceptions();
int /*<<< orphan*/ initKeyboard();
int /*<<< orphan*/ initTerm(int /*<<< orphan*/, int);
int /*<<< orphan*/ logSerial(char *);
void init() {
  gdtInit();
  idtInit();
  initTerm(0, 5);
  initExceptions();
  initKeyboard();
  logSerial("Boot");
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <gdtInit@plt>
mov    $0x0,%al
call   1080 <idtInit@plt>
xor    %edi,%edi
mov    $0x5,%esi
call   1040 <initTerm@plt>
mov    $0x0,%al
call   1060 <initExceptions@plt>
mov    $0x0,%al
call   1070 <initKeyboard@plt>
lea    0xe6d(%rip),%rdi
call   1030 <logSerial@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
push   %rax
xor    %eax,%eax
call   1050 <gdtInit@plt>
xor    %eax,%eax
call   1080 <idtInit@plt>
xor    %edi,%edi
mov    $0x5,%esi
call   1040 <initTerm@plt>
xor    %eax,%eax
call   1060 <initExceptions@plt>
xor    %eax,%eax
call   1070 <initKeyboard@plt>
lea    0xe70(%rip),%rdi
pop    %rax
jmp    1030 <logSerial@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"Boot\00"
define void @init() {
%1 = call i32 (...) @gdtInit()
%2 = call i32 (...) @idtInit()
%3 = call i32 @initTerm(i32 0, i32 5)
%4 = call i32 (...) @initExceptions()
%5 = call i32 (...) @initKeyboard()
%6 = call i32 @logSerial(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"Boot\00"
define void @init() {
%1 = tail call i32 (...) @gdtInit()
%2 = tail call i32 (...) @idtInit()
%3 = tail call i32 @initTerm(i32 0, i32 5)
%4 = tail call i32 (...) @initExceptions()
%5 = tail call i32 (...) @initKeyboard()
%6 = tail call i32 @logSerial(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int time_t;
struct timeval {
  int tv_sec;
  int tv_usec;
  int /*<<< orphan*/ member_0;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
time_t get_1970_ms() {
  struct timeval tv = {0};
  gettimeofday(&tv, NULL);
  return tv.tv_sec * 1000 + tv.tv_usec / 1000;
}


x86 assembly (clang, -O0):
<get_1970_ms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x10(%rbp),%rdi
xor    %esi,%esi
mov    $0xc,%edx
call   1040 <memset@plt>
lea    -0x10(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,-0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_1970_ms>:
sub    $0x18,%rsp
movl   $0x0,0x10(%rsp)
movq   $0x0,0x8(%rsp)
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,0x8(%rsp),%ecx
movslq 0xc(%rsp),%rax
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rax
add    %edx,%eax
add    %ecx,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32, i32 }
define i32 @get_1970_ms() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = add nsw i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32, i32 }
define i32 @get_1970_ms() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = add nsw i32 %9, %6
ret i32 %10
}
/* Variables and functions */
double exp(double);
double libm_exp(double x) { return exp(x); }


x86 assembly (clang, -O0):
<libm_exp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libm_exp>:
jmp    1030 <exp@plt>

LLVM IR (-O0):
define double @libm_exp(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @exp(double %3)
ret double %4
}

LLVM IR (-O2):
define double @libm_exp(double %0) {
%2 = tail call double @exp(double %0)
ret double %2
}
/* Variables and functions */
char const *NetworkGetErrorString(int /*<<< orphan*/);
int /*<<< orphan*/ NetworkGetLastError();
const char *NetworkGetLastErrorString() {
  return NetworkGetErrorString(NetworkGetLastError());
}


x86 assembly (clang, -O0):
<NetworkGetLastErrorString>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <NetworkGetLastError@plt>
mov    %eax,%edi
call   1040 <NetworkGetErrorString@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<NetworkGetLastErrorString>:
push   %rax
xor    %eax,%eax
call   1030 <NetworkGetLastError@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <NetworkGetErrorString@plt>

LLVM IR (-O0):
define i8* @NetworkGetLastErrorString() {
%1 = call i32 (...) @NetworkGetLastError()
%2 = call i8* @NetworkGetErrorString(i32 %1)
ret i8* %2
}

LLVM IR (-O2):
define i8* @NetworkGetLastErrorString() {
%1 = tail call i32 (...) @NetworkGetLastError()
%2 = tail call i8* @NetworkGetErrorString(i32 %1)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ gpio_write_bit(int, char);
void reset(char value) { gpio_write_bit(2, value); }


x86 assembly (clang, -O0):
<reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0x2,%edi
movsbl -0x1(%rbp),%esi
call   1030 <gpio_write_bit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset>:
mov    %edi,%esi
mov    $0x2,%edi
jmp    1030 <gpio_write_bit@plt>

LLVM IR (-O0):
define void @reset(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @gpio_write_bit(i32 2, i8 signext %3)
ret void
}

LLVM IR (-O2):
define void @reset(i8 signext %0) {
%2 = tail call i32 @gpio_write_bit(i32 2, i8 signext %0)
ret void
}
void rop3_30_0_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D | S;
  stk1 = T ^ stk2;
  *D = (stk1 & S) | (stk1 & (~T)) | (T & (~S) & *D);
}


x86 assembly (clang, -O0):
<rop3_30_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
movzbl -0xb(%rbp),%ecx
movzbl -0xa(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl -0xa(%rbp),%ecx
movzbl -0x9(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
mov    -0x8(%rbp),%rdx
movzbl (%rdx),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_30_0_1>:
mov    (%rdi),%r8b
mov    %r8d,%ecx
or     %sil,%cl
mov    %edx,%eax
not    %al
and    %cl,%al
xor    %dl,%cl
and    %sil,%cl
not    %sil
and    %dl,%sil
and    %r8b,%sil
or     %al,%sil
or     %cl,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_30_0_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %6
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = xor i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = load i8, i8* %5
%25 = zext i8 %24 to i32
%26 = and i32 %23, %25
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %6
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = or i32 %26, %32
%34 = load i8, i8* %6
%35 = zext i8 %34 to i32
%36 = load i8, i8* %5
%37 = zext i8 %36 to i32
%38 = xor i32 %37, -1
%39 = and i32 %35, %38
%40 = load i8*, i8** %4
%41 = load i8, i8* %40
%42 = zext i8 %41 to i32
%43 = and i32 %39, %42
%44 = or i32 %33, %43
%45 = trunc i32 %44 to i8
%46 = load i8*, i8** %4
store i8 %45, i8* %46
ret void
}

LLVM IR (-O2):
define void @rop3_30_0_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %4, %1
%6 = xor i8 %5, %2
%7 = and i8 %6, %1
%8 = xor i8 %2, -1
%9 = and i8 %5, %8
%10 = xor i8 %1, -1
%11 = and i8 %10, %2
%12 = and i8 %11, %4
%13 = or i8 %9, %12
%14 = or i8 %13, %7
store i8 %14, i8* %0
ret void
}
/* Variables and functions */
size_t nbytes(size_t nbits) { return (nbits / 8) + ((nbits % 8) > 0); }


x86 assembly (clang, -O0):
<nbytes>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x3,%rax
mov    -0x8(%rbp),%rcx
and    $0x7,%rcx
cmp    $0x0,%rcx
seta   %cl
and    $0x1,%cl
movzbl %cl,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nbytes>:
mov    %rdi,%rax
shr    $0x3,%rax
and    $0x7,%edi
cmp    $0x1,%rdi
sbb    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
define i64 @nbytes(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = udiv i64 %3, 8
%5 = load i64, i64* %2
%6 = urem i64 %5, 8
%7 = icmp ugt i64 %6, 0
%8 = zext i1 %7 to i32
%9 = sext i32 %8 to i64
%10 = add i64 %4, %9
ret i64 %10
}

LLVM IR (-O2):
define i64 @nbytes(i64 %0) {
%2 = lshr i64 %0, 3
%3 = and i64 %0, 7
%4 = icmp ne i64 %3, 0
%5 = zext i1 %4 to i64
%6 = add nuw nsw i64 %2, %5
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ isInf(double, int /*<<< orphan*/);
int isNaN(double d) {
  union {
    double d;
    long x[2];
  } a;
  a.d = d;
  if ((a.x[1] & (2047 << 20)) != (2047 << 20))
    return 0;
  return !isInf(d, 0);
}


x86 assembly (clang, -O0):
<isNaN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    -0x18(%rbp),%rax
and    $0x7ff00000,%rax
cmp    $0x7ff00000,%rax
je     1149 <isNaN+0x39>
movl   $0x0,-0x4(%rbp)
jmp    1165 <isNaN+0x55>
movsd  -0x10(%rbp),%xmm0
xor    %edi,%edi
call   1030 <isInf@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isNaN>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%union.anon = type { [2 x i64] }
define i32 @isNaN(double %0) {
%2 = alloca i32
%3 = alloca double
%4 = alloca %union.anon
store double %0, double* %3
%5 = load double, double* %3
%6 = bitcast %union.anon* %4 to double*
store double %5, double* %6
%7 = bitcast %union.anon* %4 to [2 x i64]*
%8 = getelementptr inbounds [2 x i64], [2 x i64]* %7, i64 0, i64 1
%9 = load i64, i64* %8
%10 = and i64 %9, 2146435072
%11 = icmp ne i64 %10, 2146435072
br i1 %11, label %12, label %13
12: ; preds = %1
store i32 0, i32* %2
br label %19
13: ; preds = %1
%14 = load double, double* %3
%15 = call i32 @isInf(double %14, i32 0)
%16 = icmp ne i32 %15, 0
%17 = xor i1 %16, true
%18 = zext i1 %17 to i32
store i32 %18, i32* %2
br label %19
19: ; preds = %13, %12
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @isNaN(double %0) {
ret i32 0
}
/* Variables and functions */
void *__coverity_alloc__(int);
int /*<<< orphan*/ __coverity_mark_as_afm_allocated__(void *, char *);
void *H5Gopen2(void *loc_id, const char *name, void *gapl_id) {
  void *id = __coverity_alloc__(10);
  __coverity_mark_as_afm_allocated__(id, "H5Gclose");
  return id;
}


x86 assembly (clang, -O0):
<H5Gopen2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0xa,%edi
call   1040 <__coverity_alloc__@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
lea    0xeb3(%rip),%rsi
call   1030 <__coverity_mark_as_afm_allocated__@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<H5Gopen2>:
push   %rbx
mov    $0xa,%edi
call   1040 <__coverity_alloc__@plt>
mov    %rax,%rbx
lea    0xecb(%rip),%rsi
mov    %rax,%rdi
call   1030 <__coverity_mark_as_afm_allocated__@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"H5Gclose\00"
define i8* @H5Gopen2(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = call i8* @__coverity_alloc__(i32 10)
store i8* %8, i8** %7
%9 = load i8*, i8** %7
%10 = call i32 @__coverity_mark_as_afm_allocated__(i8* %9, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%11 = load i8*, i8** %7
ret i8* %11
}

LLVM IR (-O2):
@.str = [9 x i8] c"H5Gclose\00"
define i8* @H5Gopen2(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = tail call i8* @__coverity_alloc__(i32 10)
%5 = tail call i32 @__coverity_mark_as_afm_allocated__(i8* %4, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret i8* %4
}
/* Variables and functions */
int rom_present(char *);
int paradise_wd90c11_standalone_available(void) {
  return rom_present(L"roms/video/wd90c11/WD90C11.VBI");
}


x86 assembly (clang, -O0):
<paradise_wd90c11_standalone_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<paradise_wd90c11_standalone_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [31 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 119, i32 100, i32 57, i32 48, i32 99, i32 49, i32 49, i32 47, i32 87, i32 68, i32 57, i32 48, i32 67, i32 49, i32 49, i32 46, i32 86, i32 66, i32 73, i32 0]
define i32 @paradise_wd90c11_standalone_available() {
%1 = call i32 @rom_present(i8* bitcast ([31 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [31 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 118, i32 105, i32 100, i32 101, i32 111, i32 47, i32 119, i32 100, i32 57, i32 48, i32 99, i32 49, i32 49, i32 47, i32 87, i32 68, i32 57, i32 48, i32 67, i32 49, i32 49, i32 46, i32 86, i32 66, i32 73, i32 0]
define i32 @paradise_wd90c11_standalone_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([31 x i32]* @.str to i8*))
ret i32 %1
}
/* Variables and functions */
scalar_t__ tinysh_get_arg();
void reset_to_0(int argc, char **argv) {
  int *val;
  val = (int *)tinysh_get_arg();
  *val = 0;
}


x86 assembly (clang, -O0):
<reset_to_0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <tinysh_get_arg@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_to_0>:
push   %rax
xor    %eax,%eax
call   1030 <tinysh_get_arg@plt>
movl   $0x0,(%rax)
pop    %rax
ret

LLVM IR (-O0):
define void @reset_to_0(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32*
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = call i64 (...) @tinysh_get_arg()
%7 = inttoptr i64 %6 to i32*
store i32* %7, i32** %5
%8 = load i32*, i32** %5
store i32 0, i32* %8
ret void
}

LLVM IR (-O2):
define void @reset_to_0(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @tinysh_get_arg()
%4 = inttoptr i64 %3 to i32*
store i32 0, i32* %4
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char const *, char *);
FILE *_open_file(const char *filepath) {
  FILE *f;
  f = fopen(filepath, "w+");
  return f;
}


x86 assembly (clang, -O0):
<_open_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fopen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_open_file>:
lea    0xee9(%rip),%rsi
jmp    1030 <fopen@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"w+\00"
define i32* @_open_file(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32* @fopen(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
store i32* %5, i32** %3
%6 = load i32*, i32** %3
ret i32* %6
}

LLVM IR (-O2):
@.str = [3 x i8] c"w+\00"
define noalias i32* @_open_file(i8* nocapture %0) {
%2 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32* %2
}