xunge/DecIR huggingface dataset:
/* Type definitions */
struct eucalyptus_opts {
  int dummy;
};

/* Variables and functions */
int arguments2(int, char **, struct eucalyptus_opts *, int /*<<< orphan*/, int,
               int);
int arguments(int argc, char **argv, struct eucalyptus_opts *args_info) {
  return arguments2(argc, argv, args_info, 0, 1, 1);
}


x86 assembly (clang, -O0):
<arguments>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
mov    $0x1,%r9d
mov    %r9d,%r8d
call   1030 <arguments2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arguments>:
xor    %ecx,%ecx
mov    $0x1,%r8d
mov    $0x1,%r9d
jmp    1030 <arguments2@plt>

LLVM IR (-O0):
%struct.eucalyptus_opts = type { i32 }
define i32 @arguments(i32 %0, i8** %1, %struct.eucalyptus_opts* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.eucalyptus_opts*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store %struct.eucalyptus_opts* %2, %struct.eucalyptus_opts** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load %struct.eucalyptus_opts*, %struct.eucalyptus_opts** %6
%10 = call i32 @arguments2(i32 %7, i8** %8, %struct.eucalyptus_opts* %9, i32 0, i32 1, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.eucalyptus_opts = type { i32 }
define i32 @arguments(i32 %0, i8** %1, %struct.eucalyptus_opts* %2) {
%4 = tail call i32 @arguments2(i32 %0, i8** %1, %struct.eucalyptus_opts* %2, i32 0, i32 1, i32 1)
ret i32 %4
}
/* Variables and functions */
bool field_IsInBounds(int x, int y) {
  return ((0 <= x) && (x < 10)) && ((0 <= y) && (y < 10));
}


x86 assembly (clang, -O0):
<field_IsInBounds>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
xor    %ecx,%ecx
cmp    -0x4(%rbp),%ecx
mov    %al,-0x9(%rbp)
jg     1149 <field_IsInBounds+0x49>
xor    %eax,%eax
cmpl   $0xa,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jge    1149 <field_IsInBounds+0x49>
xor    %eax,%eax
xor    %ecx,%ecx
cmp    -0x8(%rbp),%ecx
mov    %al,-0xa(%rbp)
jg     1143 <field_IsInBounds+0x43>
cmpl   $0xa,-0x8(%rbp)
setl   %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<field_IsInBounds>:
cmp    $0xa,%edi
setb   %al
cmp    $0xa,%esi
setb   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @field_IsInBounds(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sle i32 0, %5
br i1 %6, label %7, label %18
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 10
br i1 %9, label %10, label %18
10: ; preds = %7
%11 = load i32, i32* %4
%12 = icmp sle i32 0, %11
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %4
%15 = icmp slt i32 %14, 10
br label %16
16: ; preds = %13, %10
%17 = phi i1 [ false, %10 ], [ %15, %13 ]
br label %18
18: ; preds = %16, %7, %2
%19 = phi i1 [ false, %7 ], [ false, %2 ], [ %17, %16 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @field_IsInBounds(i32 %0, i32 %1) {
%3 = icmp ult i32 %0, 10
%4 = icmp ult i32 %1, 10
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ usleep(unsigned int);
void ThreadSleep(unsigned int iTime) { usleep(iTime * 1000); }


x86 assembly (clang, -O0):
<ThreadSleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ThreadSleep>:
imul   $0x3e8,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @ThreadSleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 %3, 1000
%5 = call i32 @usleep(i32 %4)
ret void
}

LLVM IR (-O2):
define void @ThreadSleep(i32 %0) {
%2 = mul i32 %0, 1000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
/* Variables and functions */
double RAND_MAX;
double rand();
int random_intervalo(int a, int b) {
  int offset = (b - a + 1) * (rand() / (RAND_MAX + 1.0));
  return a + offset;
}


x86 assembly (clang, -O0):
<random_intervalo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
add    $0x1,%eax
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
movaps %xmm0,%xmm1
movsd  -0x18(%rbp),%xmm0
movsd  0xeb9(%rip),%xmm2
mov    0x2e9a(%rip),%rax
addsd  (%rax),%xmm2
divsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_intervalo>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
sub    %edi,%esi
add    $0x1,%esi
cvtsi2sd %esi,%xmm0
movsd  %xmm0,0x8(%rsp)
xor    %eax,%eax
call   1030 <rand@plt>
mov    0x2eb4(%rip),%rax
movsd  (%rax),%xmm1
addsd  0xec0(%rip),%xmm1
divsd  %xmm1,%xmm0
mulsd  0x8(%rsp),%xmm0
cvttsd2si %xmm0,%eax
add    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@RAND_MAX = global double 0.000000e+00
define i32 @random_intervalo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = sub nsw i32 %6, %7
%9 = add nsw i32 %8, 1
%10 = sitofp i32 %9 to double
%11 = call double (...) @rand()
%12 = load double, double* @RAND_MAX
%13 = fadd double %12, 1.000000e+00
%14 = fdiv double %11, %13
%15 = fmul double %10, %14
%16 = fptosi double %15 to i32
store i32 %16, i32* %5
%17 = load i32, i32* %3
%18 = load i32, i32* %5
%19 = add nsw i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
@RAND_MAX = global double 0.000000e+00
define i32 @random_intervalo(i32 %0, i32 %1) {
%3 = sub i32 1, %0
%4 = add i32 %3, %1
%5 = sitofp i32 %4 to double
%6 = tail call double (...) @rand()
%7 = load double, double* @RAND_MAX
%8 = fadd double %7, 1.000000e+00
%9 = fdiv double %6, %8
%10 = fmul double %9, %5
%11 = fptosi double %10 to i32
%12 = add nsw i32 %11, %0
ret i32 %12
}
unsigned int align(unsigned int offset, unsigned int alignment) {
  unsigned int mask = ~(alignment - 1);
  return (offset + (alignment - 1)) & mask;
}


x86 assembly (clang, -O0):
<align>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
xor    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
add    %ecx,%eax
and    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<align>:
lea    (%rdi,%rsi,1),%eax
add    $0xffffffff,%eax
mov    %esi,%ecx
neg    %ecx
and    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @align(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = sub i32 %6, 1
%8 = xor i32 %7, -1
store i32 %8, i32* %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub i32 %10, 1
%12 = add i32 %9, %11
%13 = load i32, i32* %5
%14 = and i32 %12, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @align(i32 %0, i32 %1) {
%3 = sub i32 0, %1
%4 = add i32 %0, -1
%5 = add i32 %4, %1
%6 = and i32 %5, %3
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ servo1_pin_config();
int /*<<< orphan*/ servo2_pin_config();
int /*<<< orphan*/ servo3_pin_config();
void servo_pin_config(void) {
  servo1_pin_config();
  servo2_pin_config();
  servo3_pin_config();
}


x86 assembly (clang, -O0):
<servo_pin_config>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <servo1_pin_config@plt>
mov    $0x0,%al
call   1040 <servo2_pin_config@plt>
mov    $0x0,%al
call   1050 <servo3_pin_config@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<servo_pin_config>:
push   %rax
xor    %eax,%eax
call   1030 <servo1_pin_config@plt>
xor    %eax,%eax
call   1040 <servo2_pin_config@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <servo3_pin_config@plt>

LLVM IR (-O0):
define void @servo_pin_config() {
%1 = call i32 (...) @servo1_pin_config()
%2 = call i32 (...) @servo2_pin_config()
%3 = call i32 (...) @servo3_pin_config()
ret void
}

LLVM IR (-O2):
define void @servo_pin_config() {
%1 = tail call i32 (...) @servo1_pin_config()
%2 = tail call i32 (...) @servo2_pin_config()
%3 = tail call i32 (...) @servo3_pin_config()
ret void
}
void reverse(char s[], int last) {
  int j;
  char a;
  last--;
  j = 0;
  while (j < last) {
    a = s[last];
    s[last] = s[j];
    s[j] = a;
    last--;
    j++;
  }
}


x86 assembly (clang, -O0):
<reverse>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1170 <reverse+0x70>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x11(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x11(%rbp),%dl
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    111b <reverse+0x1b>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reverse>:
cmp    $0x2,%esi
jl     1131 <reverse+0x31>
mov    %esi,%eax
add    $0xfffffffffffffffe,%rax
xor    %ecx,%ecx
nopl   (%rax)
movzbl 0x1(%rdi,%rax,1),%esi
movzbl (%rdi,%rcx,1),%edx
mov    %dl,0x1(%rdi,%rax,1)
mov    %sil,(%rdi,%rcx,1)
add    $0x1,%rcx
lea    -0x1(%rax),%rdx
cmp    %rax,%rcx
mov    %rdx,%rax
jl     1110 <reverse+0x10>
ret

LLVM IR (-O0):
define void @reverse(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = add nsw i32 %7, -1
store i32 %8, i32* %4
store i32 0, i32* %5
br label %9
9: ; preds = %13, %2
%10 = load i32, i32* %5
%11 = load i32, i32* %4
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %37
13: ; preds = %9
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, i8* %14, i64 %16
%18 = load i8, i8* %17
store i8 %18, i8* %6
%19 = load i8*, i8** %3
%20 = load i32, i32* %5
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %19, i64 %21
%23 = load i8, i8* %22
%24 = load i8*, i8** %3
%25 = load i32, i32* %4
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds i8, i8* %24, i64 %26
store i8 %23, i8* %27
%28 = load i8, i8* %6
%29 = load i8*, i8** %3
%30 = load i32, i32* %5
%31 = sext i32 %30 to i64
%32 = getelementptr inbounds i8, i8* %29, i64 %31
store i8 %28, i8* %32
%33 = load i32, i32* %4
%34 = add nsw i32 %33, -1
store i32 %34, i32* %4
%35 = load i32, i32* %5
%36 = add nsw i32 %35, 1
store i32 %36, i32* %5
br label %9
37: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @reverse(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %17
4: ; preds = %2
%5 = zext i32 %1 to i64
%6 = add nsw i64 %5, -1
br label %7
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %14, %7 ]
%9 = phi i64 [ %6, %4 ], [ %15, %7 ]
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = getelementptr inbounds i8, i8* %0, i64 %8
%13 = load i8, i8* %12
store i8 %13, i8* %10
store i8 %11, i8* %12
%14 = add nuw nsw i64 %8, 1
%15 = add nsw i64 %9, -1
%16 = icmp slt i64 %14, %15
br i1 %16, label %7, label %17
17: ; preds = %7, %2
ret void
}
void *scgc_min(void *a, void *b) { return a <= b ? a : b; }


x86 assembly (clang, -O0):
<scgc_min>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
ja     1127 <scgc_min+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <scgc_min+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scgc_min>:
mov    %rdi,%rax
cmp    %rsi,%rdi
cmova  %rsi,%rax
ret

LLVM IR (-O0):
define i8* @scgc_min(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = icmp ule i8* %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i8*, i8** %3
br label %12
10: ; preds = %2
%11 = load i8*, i8** %4
br label %12
12: ; preds = %10, %8
%13 = phi i8* [ %9, %8 ], [ %11, %10 ]
ret i8* %13
}

LLVM IR (-O2):
define i8* @scgc_min(i8* readnone %0, i8* readnone %1) {
%3 = icmp ugt i8* %0, %1
%4 = select i1 %3, i8* %1, i8* %0
ret i8* %4
}
int fixed_point2int_round(int x) {
  return x >= 0 ? (x + (1 << 14) / 2) / (1 << 14)
                : (x - (1 << 14) / 2) / (1 << 14);
}


x86 assembly (clang, -O0):
<fixed_point2int_round>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1129 <fixed_point2int_round+0x29>
mov    -0x4(%rbp),%eax
add    $0x2000,%eax
mov    $0x4000,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    113c <fixed_point2int_round+0x3c>
mov    -0x4(%rbp),%eax
sub    $0x2000,%eax
mov    $0x4000,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fixed_point2int_round>:
mov    %edi,%eax
not    %eax
shr    $0x11,%eax
and    $0x4000,%eax
lea    (%rax,%rdi,1),%ecx
add    $0xffffe000,%ecx
add    %edi,%eax
add    $0x1fff,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
sar    $0xe,%eax
ret

LLVM IR (-O0):
define i32 @fixed_point2int_round(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = add nsw i32 %6, 8192
%8 = sdiv i32 %7, 16384
br label %13
9: ; preds = %1
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 8192
%12 = sdiv i32 %11, 16384
br label %13
13: ; preds = %9, %5
%14 = phi i32 [ %8, %5 ], [ %12, %9 ]
ret i32 %14
}

LLVM IR (-O2):
define i32 @fixed_point2int_round(i32 %0) {
%2 = icmp sgt i32 %0, -1
%3 = select i1 %2, i32 8192, i32 -8192
%4 = add nsw i32 %3, %0
%5 = sdiv i32 %4, 16384
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ callByVal(int, int);
int /*<<< orphan*/ printf(char *, int, int);
int main() {
  int x, y;
  x = 10;
  y = 20;
  printf("Value before swap: x=%d\ty=%d\n", x, y);
  callByVal(x, y);
  printf("Value after swap: x=%d\ty=%d\n", x, y);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
movl   $0x14,-0xc(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xeb6(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1040 <callByVal@plt>
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
lea    0xeb7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0xa,%esi
mov    $0x14,%edx
call   1030 <printf@plt>
mov    $0xa,%edi
mov    $0x14,%esi
call   1040 <callByVal@plt>
lea    0xed1(%rip),%rdi
mov    $0xa,%esi
mov    $0x14,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [30 x i8] c"Value before swap: x=%d\09y=%d\0A\00"
@.str.1 = [29 x i8] c"Value after swap: x=%d\09y=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 10, i32* %2
store i32 20, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 %4, i32 %5)
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = call i32 @callByVal(i32 %7, i32 %8)
%10 = load i32, i32* %2
%11 = load i32, i32* %3
%12 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0), i32 %10, i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [30 x i8] c"Value before swap: x=%d\09y=%d\0A\00"
@.str.1 = [29 x i8] c"Value after swap: x=%d\09y=%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i32 10, i32 20)
%2 = tail call i32 @callByVal(i32 10, i32 20)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0), i32 10, i32 20)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ str_empty();
int /*<<< orphan*/ str_free(int /*<<< orphan*/);
void t_free_empty(void *context) { str_free(str_empty()); }


x86 assembly (clang, -O0):
<t_free_empty>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <str_empty@plt>
mov    %eax,%edi
call   1040 <str_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_free_empty>:
push   %rax
xor    %eax,%eax
call   1030 <str_empty@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <str_free@plt>

LLVM IR (-O0):
define void @t_free_empty(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @str_empty()
%4 = call i32 @str_free(i32 %3)
ret void
}

LLVM IR (-O2):
define void @t_free_empty(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @str_empty()
%3 = tail call i32 @str_free(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ link(char *, char *);
int /*<<< orphan*/ unlink(char *);
int main(int argc, char *argv[]) {
  link(argv[1], argv[2]);
  unlink(argv[1]);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
mov    -0x10(%rbp),%rax
mov    0x10(%rax),%rsi
call   1040 <link@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1030 <unlink@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    %rsi,%rbx
mov    0x8(%rsi),%rdi
mov    0x10(%rsi),%rsi
call   1040 <link@plt>
mov    0x8(%rbx),%rdi
call   1030 <unlink@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %4
%6 = getelementptr inbounds i8*, i8** %5, i64 1
%7 = load i8*, i8** %6
%8 = load i8**, i8*** %4
%9 = getelementptr inbounds i8*, i8** %8, i64 2
%10 = load i8*, i8** %9
%11 = call i32 @link(i8* %7, i8* %10)
%12 = load i8**, i8*** %4
%13 = getelementptr inbounds i8*, i8** %12, i64 1
%14 = load i8*, i8** %13
%15 = call i32 @unlink(i8* %14)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = getelementptr inbounds i8*, i8** %1, i64 2
%6 = load i8*, i8** %5
%7 = tail call i32 @link(i8* %4, i8* %6)
%8 = load i8*, i8** %3
%9 = tail call i32 @unlink(i8* %8)
ret i32 0
}
/* Variables and functions */
int add(int, int);
main() { return add(1, 5); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
mov    $0x5,%esi
call   1030 <add@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%edi
mov    $0x5,%esi
jmp    1030 <add@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @add(i32 1, i32 5)
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @add(i32 1, i32 5)
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ __le16;

/* Variables and functions */
unsigned int le16_to_cpu(int /*<<< orphan*/);
unsigned next3_rec_len_from_disk(__le16 dlen) {
  unsigned len = le16_to_cpu(dlen);
  if (len == ((1 << 16) - 1))
    return 1 << 16;
  return len;
}


x86 assembly (clang, -O0):
<next3_rec_len_from_disk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <le16_to_cpu@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0xffff,-0xc(%rbp)
jne    113f <next3_rec_len_from_disk+0x2f>
movl   $0x10000,-0x4(%rbp)
jmp    1145 <next3_rec_len_from_disk+0x35>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next3_rec_len_from_disk>:
push   %rax
call   1030 <le16_to_cpu@plt>
cmp    $0xffff,%eax
mov    $0x10000,%ecx
cmove  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @next3_rec_len_from_disk(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @le16_to_cpu(i32 %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 65535
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 65536, i32* %2
br label %12
10: ; preds = %1
%11 = load i32, i32* %4
store i32 %11, i32* %2
br label %12
12: ; preds = %10, %9
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @next3_rec_len_from_disk(i32 %0) {
%2 = tail call i32 @le16_to_cpu(i32 %0)
%3 = icmp eq i32 %2, 65535
%4 = select i1 %3, i32 65536, i32 %2
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;
typedef int uint64_t;

/* Variables and functions */
uint64_t rotr64(uint64_t a, uint8_t r) { return (a >> r) | (a << (64 - r)); }


x86 assembly (clang, -O0):
<rotr64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
mov    -0x4(%rbp),%edx
mov    $0x40,%ecx
sub    -0x8(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr64>:
mov    %esi,%ecx
mov    %edi,%eax
sar    %cl,%eax
neg    %cl
shl    %cl,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @rotr64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = ashr i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 64, %9
%11 = shl i32 %8, %10
%12 = or i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @rotr64(i32 %0, i32 %1) {
%3 = ashr i32 %0, %1
%4 = sub nsw i32 64, %1
%5 = shl i32 %0, %4
%6 = or i32 %5, %3
ret i32 %6
}
/* Variables and functions */
int nl_cmp_addr(char *, char *, int /*<<< orphan*/ *);
int nl_cmp_lnet(char *, char *);
int nl_cmp(const void *p1, const void *p2) {
  int res;
  if ((res = nl_cmp_lnet(*(char **)p1, *(char **)p2)) == 0)
    res = nl_cmp_addr(*(char **)p1, *(char **)p2, NULL);
  return res;
}


x86 assembly (clang, -O0):
<nl_cmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1040 <nl_cmp_lnet@plt>
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
jne    1169 <nl_cmp+0x49>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <nl_cmp_addr@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nl_cmp>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    (%rdi),%rdi
mov    (%rsi),%rsi
call   1040 <nl_cmp_lnet@plt>
test   %eax,%eax
je     1141 <nl_cmp+0x21>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
mov    (%rbx),%rdi
mov    (%r14),%rsi
xor    %edx,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <nl_cmp_addr@plt>

LLVM IR (-O0):
define i32 @nl_cmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i8**
%8 = load i8*, i8** %7
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i8**
%11 = load i8*, i8** %10
%12 = call i32 @nl_cmp_lnet(i8* %8, i8* %11)
store i32 %12, i32* %5
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %22
14: ; preds = %2
%15 = load i8*, i8** %3
%16 = bitcast i8* %15 to i8**
%17 = load i8*, i8** %16
%18 = load i8*, i8** %4
%19 = bitcast i8* %18 to i8**
%20 = load i8*, i8** %19
%21 = call i32 @nl_cmp_addr(i8* %17, i8* %20, i32* null)
store i32 %21, i32* %5
br label %22
22: ; preds = %14, %2
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @nl_cmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @nl_cmp_lnet(i8* %4, i8* %6)
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i8*, i8** %3
%11 = load i8*, i8** %5
%12 = tail call i32 @nl_cmp_addr(i8* %10, i8* %11, i32* null)
br label %13
13: ; preds = %9, %2
%14 = phi i32 [ %12, %9 ], [ %7, %2 ]
ret i32 %14
}
/* Type definitions */
typedef int num;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(int, int /*<<< orphan*/ *);
void write_le_int16(FILE *dfile, int num) {
  fputc((num)&0xFF, dfile);
  fputc((num >> 8) & 0xFF, dfile);
}


x86 assembly (clang, -O0):
<write_le_int16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
and    $0xff,%edi
mov    -0x8(%rbp),%rsi
call   1030 <fputc@plt>
mov    -0xc(%rbp),%edi
sar    $0x8,%edi
and    $0xff,%edi
mov    -0x8(%rbp),%rsi
call   1030 <fputc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_le_int16>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
movzbl %bl,%edi
mov    %r14,%rsi
call   1030 <fputc@plt>
movzbl %bh,%edi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fputc@plt>

LLVM IR (-O0):
define void @write_le_int16(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 255
%7 = load i32*, i32** %3
%8 = call i32 @fputc(i32 %6, i32* %7)
%9 = load i32, i32* %4
%10 = ashr i32 %9, 8
%11 = and i32 %10, 255
%12 = load i32*, i32** %3
%13 = call i32 @fputc(i32 %11, i32* %12)
ret void
}

LLVM IR (-O2):
define void @write_le_int16(i32* nocapture %0, i32 %1) {
%3 = and i32 %1, 255
%4 = tail call i32 @fputc(i32 %3, i32* %0)
%5 = lshr i32 %1, 8
%6 = and i32 %5, 255
%7 = tail call i32 @fputc(i32 %6, i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0x07() {
  Assert_real((isalpha(7) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              40, ("isalpha should be 0 for 0x07"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x07>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x28,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x07>:
push   %rax
mov    $0x7,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x28,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x07\00"
define void @t_isalpha_0x07() {
%1 = call i64 @isalpha(i32 7)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 40, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [29 x i8] c"isalpha should be 0 for 0x07\00"
define void @t_isalpha_0x07() {
%1 = tail call i64 @isalpha(i32 7)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 40, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void VIDDummyVdp1NormalSpriteDraw(void) {}


x86 assembly (clang, -O0):
<VIDDummyVdp1NormalSpriteDraw>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VIDDummyVdp1NormalSpriteDraw>:
ret

LLVM IR (-O0):
define void @VIDDummyVdp1NormalSpriteDraw() {
ret void
}

LLVM IR (-O2):
define void @VIDDummyVdp1NormalSpriteDraw() {
ret void
}
float calculate_calories(float distance, float mass) {
  return mass * 0.53f * distance;
}


x86 assembly (clang, -O0):
<calculate_calories>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  0xeea(%rip),%xmm0
mulss  -0x8(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculate_calories>:
mulss  0xef8(%rip),%xmm1
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @calculate_calories(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %4
%6 = fmul float %5, 0x3FE0F5C280000000
%7 = load float, float* %3
%8 = fmul float %6, %7
ret float %8
}

LLVM IR (-O2):
define float @calculate_calories(float %0, float %1) {
%3 = fmul float %1, 0x3FE0F5C280000000
%4 = fmul float %3, %0
ret float %4
}
unsigned int u_get_first_byte_mask(unsigned int len) {
  return (1U << 7U >> len) - 1U;
}


x86 assembly (clang, -O0):
<u_get_first_byte_mask>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x80,%eax
shr    %cl,%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<u_get_first_byte_mask>:
mov    %edi,%ecx
mov    $0x80,%eax
shr    %cl,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @u_get_first_byte_mask(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 128, %3
%5 = sub i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @u_get_first_byte_mask(i32 %0) {
%2 = lshr i32 128, %0
%3 = add nsw i32 %2, -1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ tc_sll_perf_1();
int /*<<< orphan*/ tc_sll_perf_2();
int /*<<< orphan*/ test_case_char();
int /*<<< orphan*/ test_case_int_2();
int /*<<< orphan*/ test_case_int_3();
int /*<<< orphan*/ test_case_int_4();
int tc_sll_main(int argc, char **argv) {
  test_case_char();
  test_case_int_2();
  test_case_int_3();
  test_case_int_4();
  tc_sll_perf_1();
  tc_sll_perf_2();
  return 0;
}


x86 assembly (clang, -O0):
<tc_sll_main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1070 <test_case_char@plt>
mov    $0x0,%al
call   1050 <test_case_int_2@plt>
mov    $0x0,%al
call   1030 <test_case_int_3@plt>
mov    $0x0,%al
call   1060 <test_case_int_4@plt>
mov    $0x0,%al
call   1040 <tc_sll_perf_1@plt>
mov    $0x0,%al
call   1080 <tc_sll_perf_2@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tc_sll_main>:
push   %rax
xor    %eax,%eax
call   1070 <test_case_char@plt>
xor    %eax,%eax
call   1050 <test_case_int_2@plt>
xor    %eax,%eax
call   1030 <test_case_int_3@plt>
xor    %eax,%eax
call   1060 <test_case_int_4@plt>
xor    %eax,%eax
call   1040 <tc_sll_perf_1@plt>
xor    %eax,%eax
call   1080 <tc_sll_perf_2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @tc_sll_main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @test_case_char()
%6 = call i32 (...) @test_case_int_2()
%7 = call i32 (...) @test_case_int_3()
%8 = call i32 (...) @test_case_int_4()
%9 = call i32 (...) @tc_sll_perf_1()
%10 = call i32 (...) @tc_sll_perf_2()
ret i32 0
}

LLVM IR (-O2):
define i32 @tc_sll_main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test_case_char()
%4 = tail call i32 (...) @test_case_int_2()
%5 = tail call i32 (...) @test_case_int_3()
%6 = tail call i32 (...) @test_case_int_4()
%7 = tail call i32 (...) @tc_sll_perf_1()
%8 = tail call i32 (...) @tc_sll_perf_2()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int /*<<< orphan*/);
int /*<<< orphan*/ sleep_time();
int main() {
  while (1) {
    sleep(sleep_time());
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <sleep_time@plt>
mov    %eax,%edi
call   1040 <sleep@plt>
jmp    112f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <sleep_time@plt>
mov    %eax,%edi
call   1040 <sleep@plt>
jmp    1130 <main+0x10>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
%3 = call i32 (...) @sleep_time()
%4 = call i32 @sleep(i32 %3)
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = tail call i32 (...) @sleep_time()
%3 = tail call i32 @sleep(i32 %2)
br label %1
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR8A_set(void) { return U_WMRCORENONE_set("U_WMR8A"); }


x86 assembly (clang, -O0):
<U_WMR8A_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR8A_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR8A\00"
define i8* @U_WMR8A_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR8A\00"
define i8* @U_WMR8A_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ print();
int main() { print(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <print@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <print@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @print()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @print()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ mytimer_set_timer(int /*<<< orphan*/, void *);
void mytimer_stop_timer() { mytimer_set_timer(0, ((void *)0)); }


x86 assembly (clang, -O0):
<mytimer_stop_timer>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <mytimer_set_timer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mytimer_stop_timer>:
xor    %edi,%edi
xor    %esi,%esi
jmp    1030 <mytimer_set_timer@plt>

LLVM IR (-O0):
define void @mytimer_stop_timer() {
%1 = call i32 @mytimer_set_timer(i32 0, i8* null)
ret void
}

LLVM IR (-O2):
define void @mytimer_stop_timer() {
%1 = tail call i32 @mytimer_set_timer(i32 0, i8* null)
ret void
}
int test_imm_B4uint32_reg(unsigned int val) {
  return ((val) & (0xB4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B4uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xb4,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B4uint32_reg>:
test   $0xb4,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B4uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 180
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_B4uint32_reg(i32 %0) {
%2 = and i32 %0, 180
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void *test1() { return __builtin_return_address(1); }


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    %rbp,%rax
mov    (%rax),%rax
mov    0x8(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
push   %rbp
mov    %rsp,%rbp
mov    0x0(%rbp),%rax
mov    0x8(%rax),%rax
pop    %rbp
ret

LLVM IR (-O0):
define i8* @test1() {
%1 = call i8* @llvm.returnaddress(i32 1)
ret i8* %1
}

LLVM IR (-O2):
define i8* @test1() {
%1 = tail call i8* @llvm.returnaddress(i32 1)
ret i8* %1
}
int utf8_charlen(int c) {
  if ((c & 0x80) == 0) {
    return 1;
  }
  if ((c & 0xe0) == 0xc0) {
    return 2;
  }
  if ((c & 0xf0) == 0xe0) {
    return 3;
  }
  if ((c & 0xf8) == 0xf0) {
    return 4;
  }
  return -1;
}


x86 assembly (clang, -O0):
<utf8_charlen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
jne    1124 <utf8_charlen+0x24>
movl   $0x1,-0x4(%rbp)
jmp    1188 <utf8_charlen+0x88>
mov    -0x8(%rbp),%eax
and    $0xe0,%eax
cmp    $0xc0,%eax
jne    1143 <utf8_charlen+0x43>
movl   $0x2,-0x4(%rbp)
jmp    1188 <utf8_charlen+0x88>
mov    -0x8(%rbp),%eax
and    $0xf0,%eax
cmp    $0xe0,%eax
jne    1162 <utf8_charlen+0x62>
movl   $0x3,-0x4(%rbp)
jmp    1188 <utf8_charlen+0x88>
mov    -0x8(%rbp),%eax
and    $0xf8,%eax
cmp    $0xf0,%eax
jne    1181 <utf8_charlen+0x81>
movl   $0x4,-0x4(%rbp)
jmp    1188 <utf8_charlen+0x88>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf8_charlen>:
mov    $0x1,%eax
test   $0x80,%dil
je     114c <utf8_charlen+0x4c>
mov    %edi,%ecx
and    $0xe0,%ecx
mov    $0x2,%eax
cmp    $0xc0,%ecx
je     114c <utf8_charlen+0x4c>
mov    %edi,%ecx
and    $0xf0,%ecx
mov    $0x3,%eax
cmp    $0xe0,%ecx
je     114c <utf8_charlen+0x4c>
and    $0xf8,%edi
xor    %eax,%eax
cmp    $0xf0,%edi
sete   %al
lea    (%rax,%rax,4),%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @utf8_charlen(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, 128
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %24
8: ; preds = %1
%9 = load i32, i32* %3
%10 = and i32 %9, 224
%11 = icmp eq i32 %10, 192
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 2, i32* %2
br label %24
13: ; preds = %8
%14 = load i32, i32* %3
%15 = and i32 %14, 240
%16 = icmp eq i32 %15, 224
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 3, i32* %2
br label %24
18: ; preds = %13
%19 = load i32, i32* %3
%20 = and i32 %19, 248
%21 = icmp eq i32 %20, 240
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 4, i32* %2
br label %24
23: ; preds = %18
store i32 -1, i32* %2
br label %24
24: ; preds = %23, %22, %17, %12, %7
%25 = load i32, i32* %2
ret i32 %25
}

LLVM IR (-O2):
define i32 @utf8_charlen(i32 %0) {
%2 = and i32 %0, 128
%3 = icmp eq i32 %2, 0
br i1 %3, label %14, label %4
4: ; preds = %1
%5 = and i32 %0, 224
%6 = icmp eq i32 %5, 192
br i1 %6, label %14, label %7
7: ; preds = %4
%8 = and i32 %0, 240
%9 = icmp eq i32 %8, 224
br i1 %9, label %14, label %10
10: ; preds = %7
%11 = and i32 %0, 248
%12 = icmp eq i32 %11, 240
%13 = select i1 %12, i32 4, i32 -1
br label %14
14: ; preds = %10, %7, %4, %1
%15 = phi i32 [ 1, %1 ], [ 2, %4 ], [ 3, %7 ], [ %13, %10 ]
ret i32 %15
}
/* Type definitions */
struct btf_type {
  int dummy;
};

/* Variables and functions */
scalar_t__ BTF_KIND_INT;
scalar_t__ btf_kind(struct btf_type const *);
bool btf_is_int(const struct btf_type *t) {
  return btf_kind(t) == BTF_KIND_INT;
}


x86 assembly (clang, -O0):
<btf_is_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <btf_kind@plt>
mov    0x2ebc(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<btf_is_int>:
push   %rax
call   1030 <btf_kind@plt>
mov    0x2ecb(%rip),%rdx
xor    %ecx,%ecx
cmp    (%rdx),%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.btf_type = type { i32 }
@BTF_KIND_INT = global i64 0
define i32 @btf_is_int(%struct.btf_type* %0) {
%2 = alloca %struct.btf_type*
store %struct.btf_type* %0, %struct.btf_type** %2
%3 = load %struct.btf_type*, %struct.btf_type** %2
%4 = call i64 @btf_kind(%struct.btf_type* %3)
%5 = load i64, i64* @BTF_KIND_INT
%6 = icmp eq i64 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
%struct.btf_type = type { i32 }
@BTF_KIND_INT = global i64 0
define i32 @btf_is_int(%struct.btf_type* %0) {
%2 = tail call i64 @btf_kind(%struct.btf_type* %0)
%3 = load i64, i64* @BTF_KIND_INT
%4 = icmp eq i64 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int random();
int mrandom(int v) { return v <= 1 ? 0 : (random() & 0x3fffffff) % v; }


x86 assembly (clang, -O0):
<mrandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x1,-0x4(%rbp)
jg     112f <mrandom+0x1f>
xor    %edx,%edx
mov    %edx,-0x8(%rbp)
jmp    1142 <mrandom+0x32>
mov    $0x0,%al
call   1030 <random@plt>
and    $0x3fffffff,%eax
cltd
idivl  -0x4(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mrandom>:
xor    %eax,%eax
cmp    $0x2,%edi
jl     112d <mrandom+0x1d>
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <random@plt>
and    $0x3fffffff,%eax
xor    %edx,%edx
div    %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @mrandom(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 1
br i1 %4, label %5, label %6
5: ; preds = %1
br label %11
6: ; preds = %1
%7 = call i32 (...) @random()
%8 = and i32 %7, 1073741823
%9 = load i32, i32* %2
%10 = srem i32 %8, %9
br label %11
11: ; preds = %6, %5
%12 = phi i32 [ 0, %5 ], [ %10, %6 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @mrandom(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i32 (...) @random()
%5 = and i32 %4, 1073741823
%6 = urem i32 %5, %0
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 0, %1 ]
ret i32 %8
}
void cpu_deinit(void) {}


x86 assembly (clang, -O0):
<cpu_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_deinit>:
ret

LLVM IR (-O0):
define void @cpu_deinit() {
ret void
}

LLVM IR (-O2):
define void @cpu_deinit() {
ret void
}
/* Variables and functions */
double ln_get_uranus_earth_dist(double);
double ln_get_uranus_solar_dist(double);
int log10(double);
double ln_get_uranus_magnitude(double JD) {
  double delta, r;
  r = ln_get_uranus_solar_dist(JD);
  delta = ln_get_uranus_earth_dist(JD);
  return -7.19 + 5 * log10(r * delta);
}


x86 assembly (clang, -O0):
<ln_get_uranus_magnitude>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <ln_get_uranus_solar_dist@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ln_get_uranus_earth_dist@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x18(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
call   1050 <log10@plt>
imul   $0x5,%eax,%eax
cvtsi2sd %eax,%xmm1
movsd  0xe87(%rip),%xmm0
addsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ln_get_uranus_magnitude>:
sub    $0x18,%rsp
movsd  %xmm0,0x8(%rsp)
call   1040 <ln_get_uranus_solar_dist@plt>
movsd  %xmm0,0x10(%rsp)
movsd  0x8(%rsp),%xmm0
call   1030 <ln_get_uranus_earth_dist@plt>
mulsd  0x10(%rsp),%xmm0
call   1050 <log10@plt>
lea    (%rax,%rax,4),%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
addsd  0xe93(%rip),%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @ln_get_uranus_magnitude(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = call double @ln_get_uranus_solar_dist(double %5)
store double %6, double* %4
%7 = load double, double* %2
%8 = call double @ln_get_uranus_earth_dist(double %7)
store double %8, double* %3
%9 = load double, double* %4
%10 = load double, double* %3
%11 = fmul double %9, %10
%12 = call i32 @log10(double %11)
%13 = mul nsw i32 5, %12
%14 = sitofp i32 %13 to double
%15 = fadd double -7.190000e+00, %14
ret double %15
}

LLVM IR (-O2):
define double @ln_get_uranus_magnitude(double %0) {
%2 = tail call double @ln_get_uranus_solar_dist(double %0)
%3 = tail call double @ln_get_uranus_earth_dist(double %0)
%4 = fmul double %2, %3
%5 = tail call i32 @log10(double %4)
%6 = mul nsw i32 %5, 5
%7 = sitofp i32 %6 to double
%8 = fadd double %7, -7.190000e+00
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ paillier_get_rand_file(void *, int, char *);
void paillier_get_rand_devurandom(void *buf, int len) {
  paillier_get_rand_file(buf, len, "/dev/urandom");
}


x86 assembly (clang, -O0):
<paillier_get_rand_devurandom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    0xed3(%rip),%rdx
call   1030 <paillier_get_rand_file@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<paillier_get_rand_devurandom>:
lea    0xee9(%rip),%rdx
jmp    1030 <paillier_get_rand_file@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"/dev/urandom\00"
define void @paillier_get_rand_devurandom(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @paillier_get_rand_file(i8* %5, i32 %6, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"/dev/urandom\00"
define void @paillier_get_rand_devurandom(i8* %0, i32 %1) {
%3 = tail call i32 @paillier_get_rand_file(i8* %0, i32 %1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int f233(int *);
int f234(int *p) { return f233(p); }


x86 assembly (clang, -O0):
<f234>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f233@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f234>:
jmp    1030 <f233@plt>

LLVM IR (-O0):
define i32 @f234(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f233(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f234(i32* %0) {
%2 = tail call i32 @f233(i32* %0)
ret i32 %2
}