xunge/DecIR huggingface dataset:
/* Variables and functions */
void *resize_buff(void *, size_t);
void *ensure_capacity(void *buff, size_t *cur_size, size_t used) {
  if (used + 200 > *cur_size) {
    buff = resize_buff(buff, *cur_size + 500);
    *cur_size += 500;
  }
  return buff;
}


x86 assembly (clang, -O0):
<ensure_capacity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0xc8,%rax
mov    -0x10(%rbp),%rcx
cmp    (%rcx),%rax
jbe    1167 <ensure_capacity+0x57>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
add    $0x1f4,%rsi
call   1030 <resize_buff@plt>
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
add    $0x1f4,%rcx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ensure_capacity>:
push   %rbx
mov    %rsi,%rbx
add    $0xc8,%rdx
mov    (%rsi),%rsi
cmp    %rsi,%rdx
jbe    1138 <ensure_capacity+0x28>
add    $0x1f4,%rsi
call   1030 <resize_buff@plt>
addq   $0x1f4,(%rbx)
pop    %rbx
ret
mov    %rdi,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ensure_capacity(i8* %0, i64* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64*
%6 = alloca i64
store i8* %0, i8** %4
store i64* %1, i64** %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = add i64 %7, 200
%9 = load i64*, i64** %5
%10 = load i64, i64* %9
%11 = icmp ugt i64 %8, %10
br i1 %11, label %12, label %21
12: ; preds = %3
%13 = load i8*, i8** %4
%14 = load i64*, i64** %5
%15 = load i64, i64* %14
%16 = add i64 %15, 500
%17 = call i8* @resize_buff(i8* %13, i64 %16)
store i8* %17, i8** %4
%18 = load i64*, i64** %5
%19 = load i64, i64* %18
%20 = add i64 %19, 500
store i64 %20, i64* %18
br label %21
21: ; preds = %12, %3
%22 = load i8*, i8** %4
ret i8* %22
}

LLVM IR (-O2):
define i8* @ensure_capacity(i8* %0, i64* nocapture %1, i64 %2) {
%4 = add i64 %2, 200
%5 = load i64, i64* %1
%6 = icmp ugt i64 %4, %5
br i1 %6, label %7, label %12
7: ; preds = %3
%8 = add i64 %5, 500
%9 = tail call i8* @resize_buff(i8* %0, i64 %8)
%10 = load i64, i64* %1
%11 = add i64 %10, 500
store i64 %11, i64* %1
br label %12
12: ; preds = %7, %3
%13 = phi i8* [ %9, %7 ], [ %0, %3 ]
ret i8* %13
}
/* Type definitions */
struct stack_st_OPENSSL_STRING {
  int dummy;
};
typedef int /*<<< orphan*/ OPENSSL_STACK;

/* Variables and functions */
scalar_t__ OPENSSL_sk_delete(int /*<<< orphan*/ *, int);
char *sk_OPENSSL_STRING_delete(struct stack_st_OPENSSL_STRING *sk, int i) {
  return (char *)OPENSSL_sk_delete((OPENSSL_STACK *)sk, i);
}


x86 assembly (clang, -O0):
<sk_OPENSSL_STRING_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <OPENSSL_sk_delete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sk_OPENSSL_STRING_delete>:
jmp    1030 <OPENSSL_sk_delete@plt>

LLVM IR (-O0):
%struct.stack_st_OPENSSL_STRING = type { i32 }
define i8* @sk_OPENSSL_STRING_delete(%struct.stack_st_OPENSSL_STRING* %0, i32 %1) {
%3 = alloca %struct.stack_st_OPENSSL_STRING*
%4 = alloca i32
store %struct.stack_st_OPENSSL_STRING* %0, %struct.stack_st_OPENSSL_STRING** %3
store i32 %1, i32* %4
%5 = load %struct.stack_st_OPENSSL_STRING*, %struct.stack_st_OPENSSL_STRING** %3
%6 = bitcast %struct.stack_st_OPENSSL_STRING* %5 to i32*
%7 = load i32, i32* %4
%8 = call i64 @OPENSSL_sk_delete(i32* %6, i32 %7)
%9 = inttoptr i64 %8 to i8*
ret i8* %9
}

LLVM IR (-O2):
%struct.stack_st_OPENSSL_STRING = type { i32 }
define i8* @sk_OPENSSL_STRING_delete(%struct.stack_st_OPENSSL_STRING* %0, i32 %1) {
%3 = getelementptr %struct.stack_st_OPENSSL_STRING, %struct.stack_st_OPENSSL_STRING* %0, i64 0, i32 0
%4 = tail call i64 @OPENSSL_sk_delete(i32* %3, i32 %1)
%5 = inttoptr i64 %4 to i8*
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void close_file_(int *fd) { close(*fd); }


x86 assembly (clang, -O0):
<close_file_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_file_>:
mov    (%rdi),%edi
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @close_file_(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @close(i32 %4)
ret void
}

LLVM IR (-O2):
define void @close_file_(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @close(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int SetSpeed() {
  int level;
  printf("Set the level of snake's speed.[Default:2](1~3):");
  scanf("%d", &level);
  printf("\n");
  return level;
}


x86 assembly (clang, -O0):
<SetSpeed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
lea    0xef6(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
lea    0xee9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetSpeed>:
push   %rax
lea    0xec8(%rip),%rdi
call   1040 <printf@plt>
lea    0xeed(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [49 x i8] c"Set the level of snake's speed.[Default:2](1~3):\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [2 x i8] c"\0A\00"
define i32 @SetSpeed() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%4 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
%5 = load i32, i32* %1
ret i32 %5
}

LLVM IR (-O2):
@.str = [49 x i8] c"Set the level of snake's speed.[Default:2](1~3):\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @SetSpeed() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = call i32 @putchar(i32 10)
%6 = load i32, i32* %1
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *);
void sprint_setb_C(char *str) {
  sprintf(str, "SETB  C                         ");
}


x86 assembly (clang, -O0):
<sprint_setb_C>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprint_setb_C>:
movups 0xf09(%rip),%xmm0
movups %xmm0,0x10(%rdi)
movups 0xeee(%rip),%xmm0
movups %xmm0,(%rdi)
movb   $0x0,0x20(%rdi)
ret

LLVM IR (-O0):
@.str = [33 x i8] c"SETB C \00"
define void @sprint_setb_C(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @sprintf(i8* %3, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"SETB C \00"
define void @sprint_setb_C(i8* nocapture writeonly %0) {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(33) %0, i8* align 1 dereferenceable(33) getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i64 33, i1 false)
ret void
}
int C(float x) {
  int k = -10;
  while (k < x)
    k++;
  return k;
}


x86 assembly (clang, -O0):
<C>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movl   $0xfffffff6,-0x8(%rbp)
cvtsi2ssl -0x8(%rbp),%xmm1
movss  -0x4(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1131 <C+0x31>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1110 <C+0x10>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C>:
mov    $0xfffffff5,%eax
cs nopw 0x0(%rax,%rax,1)
nop
add    $0x1,%eax
xorps  %xmm1,%xmm1
cvtsi2ss %eax,%xmm1
ucomiss %xmm1,%xmm0
ja     1110 <C+0x10>
ret

LLVM IR (-O0):
define i32 @C(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
store i32 -10, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i32, i32* %3
%6 = sitofp i32 %5 to float
%7 = load float, float* %2
%8 = fcmp olt float %6, %7
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @C(float %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i32 [ -10, %1 ], [ %6, %2 ]
%4 = sitofp i32 %3 to float
%5 = fcmp olt float %4, %0
%6 = add nsw i32 %3, 1
br i1 %5, label %2, label %7
7: ; preds = %2
ret i32 %3
}
/* Variables and functions */
double floor(int /*<<< orphan*/);
int /*<<< orphan*/ pow(double, double);
double explevel(double experience) {
  if (experience < 1.1e7)
    return (floor(pow((experience / 1000.0), 0.4875)));
  else
    return (floor(pow((experience / 1250.0), 0.4865)));
}


x86 assembly (clang, -O0):
<explevel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  0xecb(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    116f <explevel+0x4f>
movsd  -0x10(%rbp),%xmm0
movsd  0xed3(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xebf(%rip),%xmm1
call   1030 <pow@plt>
mov    %eax,%edi
call   1040 <floor@plt>
movsd  %xmm0,-0x8(%rbp)
jmp    1199 <explevel+0x79>
movsd  -0x10(%rbp),%xmm0
movsd  0xe94(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xe80(%rip),%xmm1
call   1030 <pow@plt>
mov    %eax,%edi
call   1040 <floor@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<explevel>:
push   %rax
movsd  0xed7(%rip),%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
seta   %al
lea    0xecf(%rip),%rcx
movsd  (%rcx,%rax,8),%xmm1
lea    0xed3(%rip),%rcx
divsd  (%rcx,%rax,8),%xmm0
call   1030 <pow@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <floor@plt>

LLVM IR (-O0):
define double @explevel(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %3
%4 = load double, double* %3
%5 = fcmp olt double %4, 1.100000e+07
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load double, double* %3
%8 = fdiv double %7, 1.000000e+03
%9 = call i32 @pow(double %8, double 4.875000e-01)
%10 = call double @floor(i32 %9)
store double %10, double* %2
br label %16
11: ; preds = %1
%12 = load double, double* %3
%13 = fdiv double %12, 1.250000e+03
%14 = call i32 @pow(double %13, double 4.865000e-01)
%15 = call double @floor(i32 %14)
store double %15, double* %2
br label %16
16: ; preds = %11, %6
%17 = load double, double* %2
ret double %17
}

LLVM IR (-O2):
define double @explevel(double %0) {
%2 = fcmp olt double %0, 1.100000e+07
%3 = select i1 %2, double 1.000000e+03, double 1.250000e+03
%4 = select i1 %2, double 4.875000e-01, double 4.865000e-01
%5 = fdiv double %0, %3
%6 = tail call i32 @pow(double %5, double %4)
%7 = tail call double @floor(i32 %6)
ret double %7
}
/* Variables and functions */
int main_internal(int, char **);
int main(int argc, char *argv[]) {
  int ret = main_internal(argc, argv);
  if (ret <= 0) {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <main_internal@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jg     114b <main+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1152 <main+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <main_internal@plt>
xor    %ecx,%ecx
test   %eax,%eax
setle  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = call i32 @main_internal(i32 %7, i8** %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp sle i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 1, i32* %3
br label %14
13: ; preds = %2
store i32 0, i32* %3
br label %14
14: ; preds = %13, %12
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @main_internal(i32 %0, i8** %1)
%4 = icmp slt i32 %3, 1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Type definitions */
struct task_struct {
  int dummy;
};
struct rq {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dequeue_pjob_rtws(struct rq *, struct task_struct *);
void dequeue_task_rtws(struct rq *rq, struct task_struct *p, int sleep) {
  dequeue_pjob_rtws(rq, p);
}


x86 assembly (clang, -O0):
<dequeue_task_rtws>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <dequeue_pjob_rtws@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dequeue_task_rtws>:
jmp    1030 <dequeue_pjob_rtws@plt>

LLVM IR (-O0):
%struct.rq = type { i32 }
%struct.task_struct = type { i32 }
define void @dequeue_task_rtws(%struct.rq* %0, %struct.task_struct* %1, i32 %2) {
%4 = alloca %struct.rq*
%5 = alloca %struct.task_struct*
%6 = alloca i32
store %struct.rq* %0, %struct.rq** %4
store %struct.task_struct* %1, %struct.task_struct** %5
store i32 %2, i32* %6
%7 = load %struct.rq*, %struct.rq** %4
%8 = load %struct.task_struct*, %struct.task_struct** %5
%9 = call i32 @dequeue_pjob_rtws(%struct.rq* %7, %struct.task_struct* %8)
ret void
}

LLVM IR (-O2):
%struct.rq = type { i32 }
%struct.task_struct = type { i32 }
define void @dequeue_task_rtws(%struct.rq* %0, %struct.task_struct* %1, i32 %2) {
%4 = tail call i32 @dequeue_pjob_rtws(%struct.rq* %0, %struct.task_struct* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0xc3() {
  Assert_real((isupper(195) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              980, ("isupper should be 0 for 0xc3"));
}


x86 assembly (clang, -O0):
<t_isupper_0xc3>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc3,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3d4,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0xc3>:
push   %rax
mov    $0xc3,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3d4,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xc3\00"
define void @t_isupper_0xc3() {
%1 = call i64 @isupper(i32 195)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 980, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0xc3\00"
define void @t_isupper_0xc3() {
%1 = tail call i64 @isupper(i32 195)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 980, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
struct UPnPService {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void AVRCP_ResponseSink_AVTransport_Pause(struct UPnPService *Service,
                                          int ErrorCode, void *User) {
  printf("AVRCP_ Invoke Response: AVTransport/Pause[ErrorCode:%d]()\r\n",
         ErrorCode);
}


x86 assembly (clang, -O0):
<AVRCP_ResponseSink_AVTransport_Pause>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AVRCP_ResponseSink_AVTransport_Pause>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
%struct.UPnPService = type { i32 }
@.str = [60 x i8] c"AVRCP_ Invoke Response: AVTransport/Pause[ErrorCode:%d]()\0D\0A\00"
define void @AVRCP_ResponseSink_AVTransport_Pause(%struct.UPnPService* %0, i32 %1, i8* %2) {
%4 = alloca %struct.UPnPService*
%5 = alloca i32
%6 = alloca i8*
store %struct.UPnPService* %0, %struct.UPnPService** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %5
%8 = call i32 @printf(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
%struct.UPnPService = type { i32 }
@.str = [60 x i8] c"AVRCP_ Invoke Response: AVTransport/Pause[ErrorCode:%d]()\0D\0A\00"
define void @AVRCP_ResponseSink_AVTransport_Pause(%struct.UPnPService* nocapture readnone %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
int main() {
  while (1) {
    while (1) {
      break;
    }
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
jmp    1110 <main+0x10>
jmp    1115 <main+0x15>
jmp    110b <main+0xb>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %4
br label %3
3: ; preds = %2
br label %4
4: ; preds = %3
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
br label %1
}
/* Type definitions */
struct reg {
  int dummy;
};
typedef int /*<<< orphan*/ ssize_t;

/* Variables and functions */
int /*<<< orphan*/ parse_file(struct reg **, size_t *, int /*<<< orphan*/,
                              char const *);
ssize_t intel_reg_spec_file(struct reg **regs, const char *file) {
  size_t nregs = 0;
  *regs = NULL;
  return parse_file(regs, &nregs, 0, file);
}


x86 assembly (clang, -O0):
<intel_reg_spec_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
lea    -0x18(%rbp),%rsi
xor    %edx,%edx
call   1030 <parse_file@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intel_reg_spec_file>:
push   %rax
mov    %rsi,%rcx
movq   $0x0,(%rsp)
movq   $0x0,(%rdi)
mov    %rsp,%rsi
xor    %edx,%edx
call   1030 <parse_file@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.reg = type { i32 }
define i32 @intel_reg_spec_file(%struct.reg** %0, i8* %1) {
%3 = alloca %struct.reg**
%4 = alloca i8*
%5 = alloca i64
store %struct.reg** %0, %struct.reg*** %3
store i8* %1, i8** %4
store i64 0, i64* %5
%6 = load %struct.reg**, %struct.reg*** %3
store %struct.reg* null, %struct.reg** %6
%7 = load %struct.reg**, %struct.reg*** %3
%8 = load i8*, i8** %4
%9 = call i32 @parse_file(%struct.reg** %7, i64* %5, i32 0, i8* %8)
ret i32 %9
}

LLVM IR (-O2):
%struct.reg = type { i32 }
define i32 @intel_reg_spec_file(%struct.reg** %0, i8* %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
store i64 0, i64* %3
store %struct.reg* null, %struct.reg** %0
%5 = call i32 @parse_file(%struct.reg** %0, i64* %3, i32 0, i8* %1)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int /*<<< orphan*/ system(char *);
int rp_app_exit(void) {
  fprintf(stderr, "Stopping HPSDR receiver server.\n");
  system("/opt/redpitaya/www/apps/sdr_receiver_hpsdr/stop.sh");
  return 0;
}


x86 assembly (clang, -O0):
<rp_app_exit>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1040 <fprintf@plt>
lea    0xee1(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rp_app_exit>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1040 <fprintf@plt>
lea    0xee4(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [33 x i8] c"Stopping HPSDR receiver server.\0A\00"
@.str.1 = [51 x i8] c"/opt/redpitaya/www/apps/sdr_receiver_hpsdr/stop.sh\00"
define i32 @rp_app_exit() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @system(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [33 x i8] c"Stopping HPSDR receiver server.\0A\00"
@.str.1 = [51 x i8] c"/opt/redpitaya/www/apps/sdr_receiver_hpsdr/stop.sh\00"
define i32 @rp_app_exit() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @system(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
double sqrt(double);
void makeChol2(double dest[], const double src) {
  dest[0] = 1.0;
  dest[1] = 0.0;
  dest[2] = src;
  dest[3] = sqrt(1.0 - src * src);
}


x86 assembly (clang, -O0):
<makeChol2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xed3(%rip),%xmm0
movsd  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
xorps  %xmm0,%xmm0
movsd  %xmm0,0x8(%rax)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x10(%rax)
movsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm1,%xmm0
movsd  0xe88(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
mov    -0x8(%rbp),%rax
movsd  %xmm0,0x18(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<makeChol2>:
push   %rbx
movapd %xmm0,%xmm1
mov    %rdi,%rbx
movsd  0xee0(%rip),%xmm0
movups %xmm0,(%rdi)
movsd  %xmm1,0x10(%rdi)
mulsd  %xmm1,%xmm1
movsd  0xecc(%rip),%xmm0
subsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1148 <makeChol2+0x38>
sqrtsd %xmm0,%xmm0
jmp    114d <makeChol2+0x3d>
call   1030 <sqrt@plt>
movsd  %xmm0,0x18(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @makeChol2(double* %0, double %1) {
%3 = alloca double*
%4 = alloca double
store double* %0, double** %3
store double %1, double* %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
store double 1.000000e+00, double* %6
%7 = load double*, double** %3
%8 = getelementptr inbounds double, double* %7, i64 1
store double 0.000000e+00, double* %8
%9 = load double, double* %4
%10 = load double*, double** %3
%11 = getelementptr inbounds double, double* %10, i64 2
store double %9, double* %11
%12 = load double, double* %4
%13 = load double, double* %4
%14 = fneg double %12
%15 = call double @llvm.fmuladd.f64(double %14, double %13, double 1.000000e+00)
%16 = call double @sqrt(double %15)
%17 = load double*, double** %3
%18 = getelementptr inbounds double, double* %17, i64 3
store double %16, double* %18
ret void
}

LLVM IR (-O2):
define void @makeChol2(double* nocapture writeonly %0, double %1) {
%3 = bitcast double* %0 to <2 x double>*
store <2 x double> <double 1.000000e+00, double 0.000000e+00>, <2 x double>* %3
%4 = getelementptr inbounds double, double* %0, i64 2
store double %1, double* %4
%5 = fneg double %1
%6 = tail call double @llvm.fmuladd.f64(double %5, double %1, double 1.000000e+00)
%7 = tail call double @sqrt(double %6)
%8 = getelementptr inbounds double, double* %0, i64 3
store double %7, double* %8
ret void
}
/* Type definitions */
struct tlvdb {
  int dummy;
};
struct tlv {
  int dummy;
};
struct emv_pk {
  int dummy;
};
struct crypto_pk {
  int dummy;
};

/* Variables and functions */
struct tlvdb *emv_pki_sign_key(struct crypto_pk const *, struct emv_pk *, int,
                               int, int, int, int, struct tlv const *);
struct tlvdb *emv_pki_sign_icc_cert(const struct crypto_pk *cp,
                                    struct emv_pk *icc_pk,
                                    const struct tlv *sda_tlv) {
  return emv_pki_sign_key(cp, icc_pk, 4, 10, 0x9f46, 0x9f47, 0x9f48, sda_tlv);
}


x86 assembly (clang, -O0):
<emv_pki_sign_icc_cert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rax
mov    $0x4,%edx
mov    $0xa,%ecx
mov    $0x9f46,%r8d
mov    $0x9f47,%r9d
movl   $0x9f48,(%rsp)
mov    %rax,0x8(%rsp)
call   1030 <emv_pki_sign_key@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emv_pki_sign_icc_cert>:
push   %rax
mov    %rdx,%rax
mov    $0x4,%edx
mov    $0xa,%ecx
mov    $0x9f46,%r8d
mov    $0x9f47,%r9d
push   %rax
push   $0x9f48
call   1030 <emv_pki_sign_key@plt>
add    $0x10,%rsp
pop    %rcx
ret

LLVM IR (-O0):
%struct.tlvdb = type { i32 }
%struct.crypto_pk = type { i32 }
%struct.emv_pk = type { i32 }
%struct.tlv = type { i32 }
define %struct.tlvdb* @emv_pki_sign_icc_cert(%struct.crypto_pk* %0, %struct.emv_pk* %1, %struct.tlv* %2) {
%4 = alloca %struct.crypto_pk*
%5 = alloca %struct.emv_pk*
%6 = alloca %struct.tlv*
store %struct.crypto_pk* %0, %struct.crypto_pk** %4
store %struct.emv_pk* %1, %struct.emv_pk** %5
store %struct.tlv* %2, %struct.tlv** %6
%7 = load %struct.crypto_pk*, %struct.crypto_pk** %4
%8 = load %struct.emv_pk*, %struct.emv_pk** %5
%9 = load %struct.tlv*, %struct.tlv** %6
%10 = call %struct.tlvdb* @emv_pki_sign_key(%struct.crypto_pk* %7, %struct.emv_pk* %8, i32 4, i32 10, i32 40774, i32 40775, i32 40776, %struct.tlv* %9)
ret %struct.tlvdb* %10
}

LLVM IR (-O2):
%struct.tlvdb = type { i32 }
%struct.crypto_pk = type { i32 }
%struct.emv_pk = type { i32 }
%struct.tlv = type { i32 }
define %struct.tlvdb* @emv_pki_sign_icc_cert(%struct.crypto_pk* %0, %struct.emv_pk* %1, %struct.tlv* %2) {
%4 = tail call %struct.tlvdb* @emv_pki_sign_key(%struct.crypto_pk* %0, %struct.emv_pk* %1, i32 4, i32 10, i32 40774, i32 40775, i32 40776, %struct.tlv* %2)
ret %struct.tlvdb* %4
}
/* Variables and functions */
int /*<<< orphan*/ tswrite_help_tuning();
void print_help_tuning() { tswrite_help_tuning(); }


x86 assembly (clang, -O0):
<print_help_tuning>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <tswrite_help_tuning@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_help_tuning>:
xor    %eax,%eax
jmp    1030 <tswrite_help_tuning@plt>

LLVM IR (-O0):
define void @print_help_tuning() {
%1 = call i32 (...) @tswrite_help_tuning()
ret void
}

LLVM IR (-O2):
define void @print_help_tuning() {
%1 = tail call i32 (...) @tswrite_help_tuning()
ret void
}
char __VERIFIER_nondet_char() {
  char val;
  return val;
}


x86 assembly (clang, -O0):
<__VERIFIER_nondet_char>:
push   %rbp
mov    %rsp,%rbp
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_nondet_char>:
ret

LLVM IR (-O0):
define signext i8 @__VERIFIER_nondet_char() {
%1 = alloca i8
%2 = load i8, i8* %1
ret i8 %2
}

LLVM IR (-O2):
define signext i8 @__VERIFIER_nondet_char() {
ret i8 undef
}
int main() {
  int shuzi = 543421, jishu = 10000;
  shuzi = shuzi % jishu;
  jishu = jishu / 10;
  shuzi = shuzi % jishu;
  jishu = jishu / 10;
  shuzi = shuzi % jishu;
  jishu = jishu / 10;
  shuzi = shuzi % jishu;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x84abd,-0x8(%rbp)
movl   $0x2710,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 543421, i32* %2
store i32 10000, i32* %3
%4 = load i32, i32* %2
%5 = load i32, i32* %3
%6 = srem i32 %4, %5
store i32 %6, i32* %2
%7 = load i32, i32* %3
%8 = sdiv i32 %7, 10
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = srem i32 %9, %10
store i32 %11, i32* %2
%12 = load i32, i32* %3
%13 = sdiv i32 %12, 10
store i32 %13, i32* %3
%14 = load i32, i32* %2
%15 = load i32, i32* %3
%16 = srem i32 %14, %15
store i32 %16, i32* %2
%17 = load i32, i32* %3
%18 = sdiv i32 %17, 10
store i32 %18, i32* %3
%19 = load i32, i32* %2
%20 = load i32, i32* %3
%21 = srem i32 %19, %20
store i32 %21, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void RTManifestWriteFiles(void) {}


x86 assembly (clang, -O0):
<RTManifestWriteFiles>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTManifestWriteFiles>:
ret

LLVM IR (-O0):
define void @RTManifestWriteFiles() {
ret void
}

LLVM IR (-O2):
define void @RTManifestWriteFiles() {
ret void
}
const char *periphery_version(void) {
  return "v"
         "2"
         "."
         "3"
         "."
         "1";
}


x86 assembly (clang, -O0):
<periphery_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<periphery_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [7 x i8] c"v2.3.1\00"
define i8* @periphery_version() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [7 x i8] c"v2.3.1\00"
define i8* @periphery_version() {
ret i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct dlist {
  int dummy;
};

/* Variables and functions */
struct dlist *dlist_remove_custom(struct dlist *, void *, int /*<<< orphan*/ *);
__attribute__((visibility("default"))) struct dlist *
dlist_remove(struct dlist *list, void *data) {
  return dlist_remove_custom(list, data, NULL);
}


x86 assembly (clang, -O0):
<dlist_remove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <dlist_remove_custom@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlist_remove>:
xor    %edx,%edx
jmp    1030 <dlist_remove_custom@plt>

LLVM IR (-O0):
%struct.dlist = type { i32 }
define %struct.dlist* @dlist_remove(%struct.dlist* %0, i8* %1) {
%3 = alloca %struct.dlist*
%4 = alloca i8*
store %struct.dlist* %0, %struct.dlist** %3
store i8* %1, i8** %4
%5 = load %struct.dlist*, %struct.dlist** %3
%6 = load i8*, i8** %4
%7 = call %struct.dlist* @dlist_remove_custom(%struct.dlist* %5, i8* %6, i32* null)
ret %struct.dlist* %7
}

LLVM IR (-O2):
%struct.dlist = type { i32 }
define %struct.dlist* @dlist_remove(%struct.dlist* %0, i8* %1) {
%3 = tail call %struct.dlist* @dlist_remove_custom(%struct.dlist* %0, i8* %1, i32* null)
ret %struct.dlist* %3
}
/* Variables and functions */
int /*<<< orphan*/ action_list();
void pit_log(char *argv[]) { action_list(); }


x86 assembly (clang, -O0):
<pit_log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <action_list@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pit_log>:
xor    %eax,%eax
jmp    1030 <action_list@plt>

LLVM IR (-O0):
define void @pit_log(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 (...) @action_list()
ret void
}

LLVM IR (-O2):
define void @pit_log(i8** nocapture readnone %0) {
%2 = tail call i32 (...) @action_list()
ret void
}
/* Variables and functions */
bool is_dqmark(int c) {
  if (c == '"') {
    return true;
  }
  return false;
}


x86 assembly (clang, -O0):
<is_dqmark>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x22,-0x8(%rbp)
jne    111d <is_dqmark+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1124 <is_dqmark+0x24>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_dqmark>:
xor    %eax,%eax
cmp    $0x22,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @is_dqmark(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 34
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %8
7: ; preds = %1
store i32 0, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @is_dqmark(i32 %0) {
%2 = icmp eq i32 %0, 34
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int fileno(int /*<<< orphan*/);
int /*<<< orphan*/ fsync(int);
int /*<<< orphan*/ stdin;
int main(int argc, char **argv) {
  int fd;
  fd = fileno(stdin);
  fsync(fd);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eab(%rip),%rax
mov    (%rax),%edi
call   1030 <fileno@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <fsync@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
call   1030 <fileno@plt>
mov    %eax,%edi
call   1040 <fsync@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdin = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* @stdin
%8 = call i32 @fileno(i32 %7)
store i32 %8, i32* %6
%9 = load i32, i32* %6
%10 = call i32 @fsync(i32 %9)
ret i32 0
}

LLVM IR (-O2):
@stdin = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = load i32, i32* @stdin
%4 = tail call i32 @fileno(i32 %3)
%5 = tail call i32 @fsync(i32 %4)
ret i32 0
}
/* Variables and functions */
scalar_t__ strlen(char const *);
int fp_isabs(const char *path) {
  if (strlen(path) == 0 || path[0] != '/')
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<fp_isabs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0x0,%rax
je     113f <fp_isabs+0x2f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2f,%eax
je     114b <fp_isabs+0x3b>
movl   $0x0,-0x4(%rbp)
jmp    1152 <fp_isabs+0x42>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fp_isabs>:
xor    %eax,%eax
cmpb   $0x2f,(%rdi)
sete   %al
ret

LLVM IR (-O0):
define i32 @fp_isabs(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i64 @strlen(i8* %4)
%6 = icmp eq i64 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 47
br i1 %12, label %13, label %14
13: ; preds = %7, %1
store i32 0, i32* %2
br label %15
14: ; preds = %7
store i32 1, i32* %2
br label %15
15: ; preds = %14, %13
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fp_isabs(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 47
%4 = zext i1 %3 to i32
ret i32 %4
}
int __attribute__((no)) bics_si_test(int a, int b) {
  if (a & ~b)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<bics_si_test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     112a <bics_si_test+0x2a>
movl   $0x1,-0x4(%rbp)
jmp    1131 <bics_si_test+0x31>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bics_si_test>:
not    %esi
xor    %eax,%eax
test   %edi,%esi
setne  %al
ret

LLVM IR (-O0):
define i32 @bics_si_test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = xor i32 %7, -1
%9 = and i32 %6, %8
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 1, i32* %3
br label %13
12: ; preds = %2
store i32 0, i32* %3
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @bics_si_test(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = and i32 %3, %0
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}
void foo215() {}


x86 assembly (clang, -O0):
<foo215>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo215>:
ret

LLVM IR (-O0):
define void @foo215() {
ret void
}

LLVM IR (-O2):
define void @foo215() {
ret void
}
/* Type definitions */
struct usd_qp_impl {
  int dummy;
};
struct usd_qp {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ usd_vnic_enable_qp(struct usd_qp_impl *);
int usd_enable_qp(struct usd_qp *uqp) {
  struct usd_qp_impl *qp;
  qp = ((struct usd_qp_impl *)(uqp));
  usd_vnic_enable_qp(qp);
  return 0;
}


x86 assembly (clang, -O0):
<usd_enable_qp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <usd_vnic_enable_qp@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usd_enable_qp>:
push   %rax
call   1030 <usd_vnic_enable_qp@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.usd_qp = type { i32 }
%struct.usd_qp_impl = type { i32 }
define i32 @usd_enable_qp(%struct.usd_qp* %0) {
%2 = alloca %struct.usd_qp*
%3 = alloca %struct.usd_qp_impl*
store %struct.usd_qp* %0, %struct.usd_qp** %2
%4 = load %struct.usd_qp*, %struct.usd_qp** %2
%5 = bitcast %struct.usd_qp* %4 to %struct.usd_qp_impl*
store %struct.usd_qp_impl* %5, %struct.usd_qp_impl** %3
%6 = load %struct.usd_qp_impl*, %struct.usd_qp_impl** %3
%7 = call i32 @usd_vnic_enable_qp(%struct.usd_qp_impl* %6)
ret i32 0
}

LLVM IR (-O2):
%struct.usd_qp = type { i32 }
%struct.usd_qp_impl = type { i32 }
define i32 @usd_enable_qp(%struct.usd_qp* %0) {
%2 = bitcast %struct.usd_qp* %0 to %struct.usd_qp_impl*
%3 = tail call i32 @usd_vnic_enable_qp(%struct.usd_qp_impl* %2)
ret i32 0
}
/* Variables and functions */
int bar();
int foo();
int main(void) { return foo() + bar(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <foo@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <bar@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <foo@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <bar@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @foo()
%3 = call i32 (...) @bar()
%4 = add nsw i32 %2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 (...) @bar()
%3 = add nsw i32 %2, %1
ret i32 %3
}
int return_5() { return 5; }


x86 assembly (clang, -O0):
<return_5>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_5>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @return_5() {
ret i32 5
}

LLVM IR (-O2):
define i32 @return_5() {
ret i32 5
}
int getNumericY(char c, int boardSize) { return boardSize / 2 - (c - 97); }


x86 assembly (clang, -O0):
<getNumericY>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
movsbl -0x1(%rbp),%ecx
sub    $0x61,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getNumericY>:
mov    %esi,%eax
shr    $0x1f,%eax
add    %esi,%eax
sar    %eax
sub    %edi,%eax
add    $0x61,%eax
ret

LLVM IR (-O0):
define i32 @getNumericY(i8 signext %0, i32 %1) {
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = sdiv i32 %5, 2
%7 = load i8, i8* %3
%8 = sext i8 %7 to i32
%9 = sub nsw i32 %8, 97
%10 = sub nsw i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @getNumericY(i8 signext %0, i32 %1) {
%3 = sdiv i32 %1, 2
%4 = sext i8 %0 to i32
%5 = sub nsw i32 97, %4
%6 = add nsw i32 %5, %3
ret i32 %6
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int dobldobl_trace_grid_diagnostics(double *err, double *dis) {
  int *a, *b, fail;
  double c[2];
  fail = _ada_use_c2phc(646, a, b, c);
  *err = c[0];
  *dis = c[1];
  return fail;
}


x86 assembly (clang, -O0):
<dobldobl_trace_grid_diagnostics>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
lea    -0x40(%rbp),%rcx
mov    $0x286,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x24(%rbp)
movsd  -0x40(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movsd  %xmm0,(%rax)
movsd  -0x38(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x24(%rbp),%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dobldobl_trace_grid_diagnostics>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rsp,%rcx
mov    $0x286,%edi
call   1030 <_ada_use_c2phc@plt>
movsd  (%rsp),%xmm0
movsd  %xmm0,(%rbx)
movsd  0x8(%rsp),%xmm0
movsd  %xmm0,(%r14)
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @dobldobl_trace_grid_diagnostics(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca [2 x double]
store double* %0, double** %3
store double* %1, double** %4
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = getelementptr inbounds [2 x double], [2 x double]* %8, i64 0, i64 0
%12 = call i32 @_ada_use_c2phc(i32 646, i32* %9, i32* %10, double* %11)
store i32 %12, i32* %7
%13 = getelementptr inbounds [2 x double], [2 x double]* %8, i64 0, i64 0
%14 = load double, double* %13
%15 = load double*, double** %3
store double %14, double* %15
%16 = getelementptr inbounds [2 x double], [2 x double]* %8, i64 0, i64 1
%17 = load double, double* %16
%18 = load double*, double** %4
store double %17, double* %18
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @dobldobl_trace_grid_diagnostics(double* nocapture writeonly %0, double* nocapture writeonly %1) {
%3 = alloca [2 x double]
%4 = bitcast [2 x double]* %3 to i8*
%5 = getelementptr inbounds [2 x double], [2 x double]* %3, i64 0, i64 0
%6 = call i32 @_ada_use_c2phc(i32 646, i32* undef, i32* undef, double* %5)
%7 = load double, double* %5
store double %7, double* %0
%8 = getelementptr inbounds [2 x double], [2 x double]* %3, i64 0, i64 1
%9 = load double, double* %8
store double %9, double* %1
ret i32 %6
}
/* Variables and functions */
char *get_cpu_str_type(char *);
char *get_cpu_str(void) { return get_cpu_str_type("-core"); }


x86 assembly (clang, -O0):
<get_cpu_str>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <get_cpu_str_type@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cpu_str>:
lea    0xee9(%rip),%rdi
jmp    1030 <get_cpu_str_type@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"-core\00"
define i8* @get_cpu_str() {
%1 = call i8* @get_cpu_str_type(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [6 x i8] c"-core\00"
define i8* @get_cpu_str() {
%1 = tail call i8* @get_cpu_str_type(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
int Controllo(float a, float b, float c) {
  if (a > 0 && b > 0 && c > 0 && a + b > c && b + c > a && a + c > b)
    return (1);
}


x86 assembly (clang, -O0):
<Controllo>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1189 <Controllo+0x89>
movss  -0xc(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1189 <Controllo+0x89>
movss  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1189 <Controllo+0x89>
movss  -0x8(%rbp),%xmm0
addss  -0xc(%rbp),%xmm0
ucomiss -0x10(%rbp),%xmm0
jbe    1189 <Controllo+0x89>
movss  -0xc(%rbp),%xmm0
addss  -0x10(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    1189 <Controllo+0x89>
movss  -0x8(%rbp),%xmm0
addss  -0x10(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1189 <Controllo+0x89>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Controllo>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @Controllo(float %0, float %1, float %2) {
%4 = alloca i32
%5 = alloca float
%6 = alloca float
%7 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%8 = load float, float* %5
%9 = fcmp ogt float %8, 0.000000e+00
br i1 %9, label %10, label %35
10: ; preds = %3
%11 = load float, float* %6
%12 = fcmp ogt float %11, 0.000000e+00
br i1 %12, label %13, label %35
13: ; preds = %10
%14 = load float, float* %7
%15 = fcmp ogt float %14, 0.000000e+00
br i1 %15, label %16, label %35
16: ; preds = %13
%17 = load float, float* %5
%18 = load float, float* %6
%19 = fadd float %17, %18
%20 = load float, float* %7
%21 = fcmp ogt float %19, %20
br i1 %21, label %22, label %35
22: ; preds = %16
%23 = load float, float* %6
%24 = load float, float* %7
%25 = fadd float %23, %24
%26 = load float, float* %5
%27 = fcmp ogt float %25, %26
br i1 %27, label %28, label %35
28: ; preds = %22
%29 = load float, float* %5
%30 = load float, float* %7
%31 = fadd float %29, %30
%32 = load float, float* %6
%33 = fcmp ogt float %31, %32
br i1 %33, label %34, label %35
34: ; preds = %28
store i32 1, i32* %4
br label %35
35: ; preds = %34, %28, %22, %16, %13, %10, %3
%36 = load i32, i32* %4
ret i32 %36
}

LLVM IR (-O2):
define i32 @Controllo(float %0, float %1, float %2) {
ret i32 1
}
void occampi_ctservertrace_chook_free(void *chook) { return; }


x86 assembly (clang, -O0):
<occampi_ctservertrace_chook_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<occampi_ctservertrace_chook_free>:
ret

LLVM IR (-O0):
define void @occampi_ctservertrace_chook_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @occampi_ctservertrace_chook_free(i8* nocapture %0) {
ret void
}
int syscall_yield() {
  int ret;
  __asm__ volatile("syscall" : "=a"(ret) : "a"(0x3) : "%rcx", "%r11");
  return ret;
}


x86 assembly (clang, -O0):
<syscall_yield>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
syscall
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscall_yield>:
mov    $0x3,%eax
syscall
ret

LLVM IR (-O0):
define i32 @syscall_yield() {
%1 = alloca i32
%2 = call i32 asm sideeffect "syscall", "={ax},{ax},~{rcx},~{r11},~{dirflag},~{fpsr},~{flags}"(i32 3)
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @syscall_yield() {
%1 = tail call i32 asm sideeffect "syscall", "={ax},{ax},~{rcx},~{r11},~{dirflag},~{fpsr},~{flags}"(i32 3)
ret i32 %1
}