xunge/DecIR huggingface dataset:
void TimerCHNConfigure(unsigned long ulBase, unsigned long ulChannel,
                       unsigned long ulCCxN) {
  unsigned long ulTemp = 0;

  ;

  ;

  ;
  ulTemp = (0x00000004 << ((ulChannel - 1) * 4));
  (*((volatile unsigned long *)(ulBase + 0x00000020))) &= ~ulTemp;
  (*((volatile unsigned long *)(ulBase + 0x00000020))) |=
      ulCCxN << ((ulChannel - 1) * 4);
}


x86 assembly (clang, -O0):
<TimerCHNConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
shl    $0x2,%rax
mov    %eax,%ecx
mov    $0x4,%eax
shl    %cl,%eax
cltq
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x20(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x20(%rax)
mov    -0x18(%rbp),%rdx
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
shl    $0x2,%rcx
shl    %cl,%rdx
mov    -0x8(%rbp),%rax
mov    0x20(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x20(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerCHNConfigure>:
lea    0x0(,%rsi,4),%ecx
add    $0xfc,%cl
mov    $0x4,%eax
shl    %cl,%eax
not    %eax
cltq
and    %rax,0x20(%rdi)
shl    %cl,%rdx
or     %rdx,0x20(%rdi)
ret

LLVM IR (-O0):
define void @TimerCHNConfigure(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
store i64 0, i64* %7
%8 = load i64, i64* %5
%9 = sub i64 %8, 1
%10 = mul i64 %9, 4
%11 = trunc i64 %10 to i32
%12 = shl i32 4, %11
%13 = sext i32 %12 to i64
store i64 %13, i64* %7
%14 = load i64, i64* %7
%15 = xor i64 %14, -1
%16 = load i64, i64* %4
%17 = add i64 %16, 32
%18 = inttoptr i64 %17 to i64*
%19 = load volatile i64, i64* %18
%20 = and i64 %19, %15
store volatile i64 %20, i64* %18
%21 = load i64, i64* %6
%22 = load i64, i64* %5
%23 = sub i64 %22, 1
%24 = mul i64 %23, 4
%25 = shl i64 %21, %24
%26 = load i64, i64* %4
%27 = add i64 %26, 32
%28 = inttoptr i64 %27 to i64*
%29 = load volatile i64, i64* %28
%30 = or i64 %29, %25
store volatile i64 %30, i64* %28
ret void
}

LLVM IR (-O2):
define void @TimerCHNConfigure(i64 %0, i64 %1, i64 %2) {
%4 = shl i64 %1, 2
%5 = add i64 %4, -4
%6 = trunc i64 %5 to i32
%7 = shl i32 4, %6
%8 = xor i32 %7, -1
%9 = sext i32 %8 to i64
%10 = add i64 %0, 32
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = and i64 %12, %9
store volatile i64 %13, i64* %11
%14 = shl i64 %2, %5
%15 = load volatile i64, i64* %11
%16 = or i64 %15, %14
store volatile i64 %16, i64* %11
ret void
}
int myStrLen(char *pStr) {
  int ii = 0;
  while (*pStr++ != '\n')
    ii++;
  return ii;
}


x86 assembly (clang, -O0):
<myStrLen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
cmp    $0xa,%eax
je     1138 <myStrLen+0x38>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <myStrLen+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<myStrLen>:
xor    %eax,%eax
cmpb   $0xa,(%rdi)
je     111b <myStrLen+0x1b>
xor    %eax,%eax
nopl   0x0(%rax)
cmpb   $0xa,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <myStrLen+0x10>
ret

LLVM IR (-O0):
define i32 @myStrLen(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 10
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @myStrLen(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 10
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 10
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
void NETSCAPE_SPKI_verify(void) {}


x86 assembly (clang, -O0):
<NETSCAPE_SPKI_verify>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NETSCAPE_SPKI_verify>:
ret

LLVM IR (-O0):
define void @NETSCAPE_SPKI_verify() {
ret void
}

LLVM IR (-O2):
define void @NETSCAPE_SPKI_verify() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, int);
int /*<<< orphan*/ sha256_transform(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void runhash(void *state, const void *input, const void *init) {
  memcpy(state, init, 32);
  sha256_transform((uint32_t *)state, (uint8_t *)input);
}


x86 assembly (clang, -O0):
<runhash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x20,%edx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <sha256_transform@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<runhash>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rdx,%rsi
mov    $0x20,%edx
call   1030 <memcpy@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <sha256_transform@plt>

LLVM IR (-O0):
define void @runhash(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %6
%9 = call i32 @memcpy(i8* %7, i8* %8, i32 32)
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i32*
%12 = load i8*, i8** %5
%13 = bitcast i8* %12 to i32*
%14 = call i32 @sha256_transform(i32* %11, i32* %13)
ret void
}

LLVM IR (-O2):
define void @runhash(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @memcpy(i8* %0, i8* %2, i32 32)
%5 = bitcast i8* %0 to i32*
%6 = bitcast i8* %1 to i32*
%7 = tail call i32 @sha256_transform(i32* %5, i32* %6)
ret void
}
/* Type definitions */
struct sqlConnection {
  int dummy;
};
struct slInt {
  int dummy;
};

/* Variables and functions */
struct slInt *matchingExtId(struct sqlConnection *, char *, char *);
struct slInt *visiGeneSelectUniProt(struct sqlConnection *conn, char *acc) {
  return matchingExtId(conn, acc, "uniProt");
}


x86 assembly (clang, -O0):
<visiGeneSelectUniProt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    0xed1(%rip),%rdx
call   1030 <matchingExtId@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<visiGeneSelectUniProt>:
lea    0xee9(%rip),%rdx
jmp    1030 <matchingExtId@plt>

LLVM IR (-O0):
%struct.slInt = type { i32 }
%struct.sqlConnection = type { i32 }
@.str = [8 x i8] c"uniProt\00"
define %struct.slInt* @visiGeneSelectUniProt(%struct.sqlConnection* %0, i8* %1) {
%3 = alloca %struct.sqlConnection*
%4 = alloca i8*
store %struct.sqlConnection* %0, %struct.sqlConnection** %3
store i8* %1, i8** %4
%5 = load %struct.sqlConnection*, %struct.sqlConnection** %3
%6 = load i8*, i8** %4
%7 = call %struct.slInt* @matchingExtId(%struct.sqlConnection* %5, i8* %6, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret %struct.slInt* %7
}

LLVM IR (-O2):
%struct.slInt = type { i32 }
%struct.sqlConnection = type { i32 }
@.str = [8 x i8] c"uniProt\00"
define %struct.slInt* @visiGeneSelectUniProt(%struct.sqlConnection* %0, i8* %1) {
%3 = tail call %struct.slInt* @matchingExtId(%struct.sqlConnection* %0, i8* %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret %struct.slInt* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void show_shell_help() {
  const char *help =
      "q: quit\n"
      "help: show this help\n\n"
      "Brainfuck cheatsheet:\n"
      "\t< >: move the pointer\n"
      "\t+ -: increment/decrement the value at pointer position\n"
      "\t. ,: write/read text to/from stdout/stdin\n"
      "\t[ ]: start/end loop";
  printf("%s\n", help);
}


x86 assembly (clang, -O0):
<show_shell_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xf95(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_shell_help>:
lea    0xfac(%rip),%rdi
lea    0xee2(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [195 x i8] c"q: quit\0Ahelp: show this help\0A\0ABrainfuck cheatsheet:\0A\09< >: move the pointer\0A\09+ -: increment/decrement the value at pointer position\0A\09. ,: write/read text to/from stdout/stdin\0A\09[ ]: start/end loop\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define void @show_shell_help() {
%1 = alloca i8*
store i8* getelementptr inbounds ([195 x i8], [195 x i8]* @.str, i64 0, i64 0), i8** %1
%2 = load i8*, i8** %1
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %2)
ret void
}

LLVM IR (-O2):
@.str = [195 x i8] c"q: quit\0Ahelp: show this help\0A\0ABrainfuck cheatsheet:\0A\09< >: move the pointer\0A\09+ -: increment/decrement the value at pointer position\0A\09. ,: write/read text to/from stdout/stdin\0A\09[ ]: start/end loop\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define void @show_shell_help() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([195 x i8], [195 x i8]* @.str, i64 0, i64 0))
ret void
}
double b_abs(x)
double x;
{ return (x < 0) ? -x : x; }


x86 assembly (clang, -O0):
<b_abs>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    113d <b_abs+0x3d>
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x10(%rbp)
jmp    1147 <b_abs+0x47>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_abs>:
movapd 0xef8(%rip),%xmm2
xorpd  %xmm0,%xmm2
xorpd  %xmm3,%xmm3
movapd %xmm0,%xmm1
cmpltsd %xmm3,%xmm1
andpd  %xmm1,%xmm2
andnpd %xmm0,%xmm1
orpd   %xmm2,%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @b_abs(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 0.000000e+00
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load double, double* %2
%7 = fneg double %6
br label %10
8: ; preds = %1
%9 = load double, double* %2
br label %10
10: ; preds = %8, %5
%11 = phi double [ %7, %5 ], [ %9, %8 ]
ret double %11
}

LLVM IR (-O2):
define double @b_abs(double %0) {
%2 = fcmp olt double %0, 0.000000e+00
%3 = fneg double %0
%4 = select i1 %2, double %3, double %0
ret double %4
}
void foo356(int p) {}


x86 assembly (clang, -O0):
<foo356>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo356>:
ret

LLVM IR (-O0):
define void @foo356(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo356(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int /*<<< orphan*/ fexpect(char *, int, int, int);
void test_constexpr() {
  char a[sizeof(char[4])];
  fexpect("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/"
          "sizeof.c",
          77, 4, sizeof(a));
  ;
}


x86 assembly (clang, -O0):
<test_constexpr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
mov    $0x4d,%esi
mov    $0x4,%ecx
mov    %ecx,%edx
call   1030 <fexpect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_constexpr>:
lea    0xee9(%rip),%rdi
mov    $0x4d,%esi
mov    $0x4,%edx
mov    $0x4,%ecx
jmp    1030 <fexpect@plt>

LLVM IR (-O0):
@.str = [139 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/sizeof.c\00"
define void @test_constexpr() {
%1 = alloca [4 x i8]
%2 = call i32 @fexpect(i8* getelementptr inbounds ([139 x i8], [139 x i8]* @.str, i64 0, i64 0), i32 77, i32 4, i32 4)
ret void
}

LLVM IR (-O2):
@.str = [139 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/8l/8cc/refs/heads/master/test/input/8cc/sizeof.c\00"
define void @test_constexpr() {
%1 = tail call i32 @fexpect(i8* getelementptr inbounds ([139 x i8], [139 x i8]* @.str, i64 0, i64 0), i32 77, i32 4, i32 4)
ret void
}
int parse_operand_uses(char **str, struct rule *rule) { return 0; }


x86 assembly (clang, -O0):
<parse_operand_uses>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_operand_uses>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.rule = type opaque
define i32 @parse_operand_uses(i8** %0, %struct.rule* %1) {
%3 = alloca i8**
%4 = alloca %struct.rule*
store i8** %0, i8*** %3
store %struct.rule* %1, %struct.rule** %4
ret i32 0
}

LLVM IR (-O2):
%struct.rule = type opaque
define i32 @parse_operand_uses(i8** nocapture readnone %0, %struct.rule* nocapture readnone %1) {
ret i32 0
}
int numl(const char *s) {
  int i = 0;
  for (;;) {
    switch (*s++) {
    case '\0':
      break;
    case '\n':
      i++;
    default:
      continue;
    }
    break;
  }
  return i;
}


x86 assembly (clang, -O0):
<numl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x10(%rbp)
test   %eax,%eax
je     1142 <numl+0x42>
jmp    1131 <numl+0x31>
mov    -0x10(%rbp),%eax
sub    $0xa,%eax
je     1147 <numl+0x47>
jmp    1150 <numl+0x50>
jmp    1155 <numl+0x55>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <numl+0xf>
jmp    115a <numl+0x5a>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<numl>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movsbl (%rdi),%ecx
test   %ecx,%ecx
je     1125 <numl+0x25>
add    $0x1,%rdi
cmp    $0xa,%ecx
jne    1110 <numl+0x10>
add    $0x1,%eax
jmp    1110 <numl+0x10>
ret

LLVM IR (-O0):
define i32 @numl(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i32 1
store i8* %6, i8** %2
%7 = load i8, i8* %5
%8 = sext i8 %7 to i32
switch i32 %8, label %13 [
i32 0, label %9
i32 10, label %10
]
9: ; preds = %4
br label %14
10: ; preds = %4
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %13
13: ; preds = %4, %10
br label %4
14: ; preds = %9
br label %15
15: ; preds = %14
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @numl(i8* nocapture %0) {
br label %2
2: ; preds = %10, %1
%3 = phi i8* [ %7, %10 ], [ %0, %1 ]
%4 = phi i32 [ %11, %10 ], [ 0, %1 ]
br label %5
5: ; preds = %2, %5
%6 = phi i8* [ %7, %5 ], [ %3, %2 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
switch i32 %9, label %5 [
i32 0, label %12
i32 10, label %10
]
10: ; preds = %5
%11 = add nuw nsw i32 %4, 1
br label %2
12: ; preds = %5
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ table_scan();
void do_query() { table_scan(); }


x86 assembly (clang, -O0):
<do_query>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <table_scan@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_query>:
xor    %eax,%eax
jmp    1030 <table_scan@plt>

LLVM IR (-O0):
define void @do_query() {
%1 = call i32 (...) @table_scan()
ret void
}

LLVM IR (-O2):
define void @do_query() {
%1 = tail call i32 (...) @table_scan()
ret void
}
void UARTModemControlSet(unsigned int baseAdd, unsigned int ctrlFlags) {
  (*((volatile unsigned int *)(baseAdd + (0x10)))) &=
      ~((0x00000020u) | (0x00000002u));
  (*((volatile unsigned int *)(baseAdd + (0x10)))) |=
      (ctrlFlags & ((0x00000020u) | (0x00000002u)));
}


x86 assembly (clang, -O0):
<UARTModemControlSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xffffffdd,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
and    $0x22,%edx
mov    -0x4(%rbp),%eax
add    $0x10,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTModemControlSet>:
add    $0x10,%edi
andl   $0xffffffdd,(%rdi)
and    $0x22,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @UARTModemControlSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 16
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -35
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = and i32 %11, 34
%13 = load i32, i32* %3
%14 = add i32 %13, 16
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = or i32 %17, %12
store volatile i32 %18, i32* %16
ret void
}

LLVM IR (-O2):
define void @UARTModemControlSet(i32 %0, i32 %1) {
%3 = add i32 %0, 16
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -35
store volatile i32 %7, i32* %5
%8 = and i32 %1, 34
%9 = load volatile i32, i32* %5
%10 = or i32 %9, %8
store volatile i32 %10, i32* %5
ret void
}
void main(void) {
  unsigned min;
  int value, latency;
  latency = -2;
  if (latency > (((min) >> 8) & 0xff)) {
    value = 0xa;
  }
  if (value < 0)
    return;
  ((min) = (((min) & ~0xff)));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0xfffffffe,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x4(%rbp),%ecx
shr    $0x8,%ecx
and    $0xff,%ecx
cmp    %ecx,%eax
jbe    1129 <main+0x29>
movl   $0xa,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1138 <main+0x38>
jmp    1143 <main+0x43>
mov    -0x4(%rbp),%eax
and    $0xffffff00,%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 -2, i32* %3
%4 = load i32, i32* %3
%5 = load i32, i32* %1
%6 = lshr i32 %5, 8
%7 = and i32 %6, 255
%8 = icmp ugt i32 %4, %7
br i1 %8, label %9, label %10
9: ; preds = %0
store i32 10, i32* %2
br label %10
10: ; preds = %9, %0
%11 = load i32, i32* %2
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10
br label %17
14: ; preds = %10
%15 = load i32, i32* %1
%16 = and i32 %15, -256
store i32 %16, i32* %1
br label %17
17: ; preds = %14, %13
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ get_lexval();
int /*<<< orphan*/ parameters();
int yyselect();
method_call_expr() {
  switch (yyselect()) {
  case 67: {
    get_lexval();
    get_lexval();
    switch (yyselect()) {
    case 118: {
      parameters();
    } break;
    default:;
    }
    get_lexval();
  } break;
  }
}


x86 assembly (clang, -O0):
<method_call_expr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
call   1030 <yyselect@plt>
sub    $0x43,%eax
jne    118d <method_call_expr+0x5d>
jmp    114d <method_call_expr+0x1d>
xor    %eax,%eax
mov    %al,-0x5(%rbp)
call   1040 <get_lexval@plt>
mov    -0x5(%rbp),%al
call   1040 <get_lexval@plt>
mov    -0x5(%rbp),%al
call   1030 <yyselect@plt>
sub    $0x76,%eax
jne    1181 <method_call_expr+0x51>
jmp    1175 <method_call_expr+0x45>
mov    $0x0,%al
call   1050 <parameters@plt>
jmp    1186 <method_call_expr+0x56>
jmp    1186 <method_call_expr+0x56>
mov    $0x0,%al
call   1040 <get_lexval@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<method_call_expr>:
push   %rax
xor    %eax,%eax
call   1030 <yyselect@plt>
cmp    $0x43,%eax
jne    1165 <method_call_expr+0x35>
xor    %eax,%eax
call   1040 <get_lexval@plt>
xor    %eax,%eax
call   1040 <get_lexval@plt>
xor    %eax,%eax
call   1030 <yyselect@plt>
cmp    $0x76,%eax
jne    115e <method_call_expr+0x2e>
xor    %eax,%eax
call   1050 <parameters@plt>
xor    %eax,%eax
call   1040 <get_lexval@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @method_call_expr() {
%1 = alloca i32
%2 = call i32 (...) @yyselect()
switch i32 %2, label %12 [
i32 67, label %3
]
3: ; preds = %0
%4 = call i32 (...) @get_lexval()
%5 = call i32 (...) @get_lexval()
%6 = call i32 (...) @yyselect()
switch i32 %6, label %9 [
i32 118, label %7
]
7: ; preds = %3
%8 = call i32 (...) @parameters()
br label %10
9: ; preds = %3
br label %10
10: ; preds = %9, %7
%11 = call i32 (...) @get_lexval()
br label %12
12: ; preds = %0, %10
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @method_call_expr() {
%1 = tail call i32 (...) @yyselect()
%2 = icmp eq i32 %1, 67
br i1 %2, label %3, label %12
3: ; preds = %0
%4 = tail call i32 (...) @get_lexval()
%5 = tail call i32 (...) @get_lexval()
%6 = tail call i32 (...) @yyselect()
%7 = icmp eq i32 %6, 118
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = tail call i32 (...) @parameters()
br label %10
10: ; preds = %3, %8
%11 = tail call i32 (...) @get_lexval()
br label %12
12: ; preds = %0, %10
ret i32 undef
}
int sub(int x, int y) { return 2 * x + y; }


x86 assembly (clang, -O0):
<sub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sub>:
lea    (%rsi,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @sub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = mul nsw i32 2, %5
%7 = load i32, i32* %4
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @sub(i32 %0, i32 %1) {
%3 = shl nsw i32 %0, 1
%4 = add nsw i32 %3, %1
ret i32 %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
char __bin2hexchar(uint32_t data) {
  return (char)((data < 10) ? '0' + data : 'a' + data - 10);
}


x86 assembly (clang, -O0):
<__bin2hexchar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    111f <__bin2hexchar+0x1f>
mov    -0x4(%rbp),%eax
add    $0x30,%eax
mov    %eax,-0x8(%rbp)
jmp    112b <__bin2hexchar+0x2b>
mov    -0x4(%rbp),%eax
add    $0x61,%eax
sub    $0xa,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__bin2hexchar>:
lea    0x57(%rdi),%ecx
lea    0x30(%rdi),%eax
cmp    $0xa,%edi
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @__bin2hexchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 10
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = add nsw i32 48, %6
br label %12
8: ; preds = %1
%9 = load i32, i32* %2
%10 = add nsw i32 97, %9
%11 = sub nsw i32 %10, 10
br label %12
12: ; preds = %8, %5
%13 = phi i32 [ %7, %5 ], [ %11, %8 ]
%14 = trunc i32 %13 to i8
ret i8 %14
}

LLVM IR (-O2):
define signext i8 @__bin2hexchar(i32 %0) {
%2 = icmp slt i32 %0, 10
%3 = select i1 %2, i32 48, i32 87
%4 = add nsw i32 %3, %0
%5 = trunc i32 %4 to i8
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ declaration();
int yyselect();
declaration_list() {
  switch (yyselect()) {
  case 6: {
    while (1) {
      switch (yyselect()) {
      case 110: {
        declaration();
      } break;
      default:
        goto yy2;
      }
    }
  yy2:;
    declaration();
  } break;
  }
}


x86 assembly (clang, -O0):
<declaration_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
call   1030 <yyselect@plt>
sub    $0x6,%eax
jne    1174 <declaration_list+0x54>
jmp    113d <declaration_list+0x1d>
jmp    1142 <declaration_list+0x22>
xor    %eax,%eax
call   1030 <yyselect@plt>
sub    $0x6e,%eax
jne    1163 <declaration_list+0x43>
jmp    1157 <declaration_list+0x37>
mov    $0x0,%al
call   1040 <declaration@plt>
jmp    1168 <declaration_list+0x48>
jmp    116d <declaration_list+0x4d>
jmp    1142 <declaration_list+0x22>
mov    $0x0,%al
call   1040 <declaration@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<declaration_list>:
push   %rax
xor    %eax,%eax
call   1030 <yyselect@plt>
cmp    $0x6,%eax
jne    114c <declaration_list+0x2c>
nopl   (%rax)
xor    %eax,%eax
call   1030 <yyselect@plt>
cmp    $0x6e,%eax
jne    1145 <declaration_list+0x25>
xor    %eax,%eax
call   1040 <declaration@plt>
jmp    1130 <declaration_list+0x10>
xor    %eax,%eax
call   1040 <declaration@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @declaration_list() {
%1 = alloca i32
%2 = call i32 (...) @yyselect()
switch i32 %2, label %12 [
i32 6, label %3
]
3: ; preds = %0
br label %4
4: ; preds = %3, %9
%5 = call i32 (...) @yyselect()
switch i32 %5, label %8 [
i32 110, label %6
]
6: ; preds = %4
%7 = call i32 (...) @declaration()
br label %9
8: ; preds = %4
br label %10
9: ; preds = %6
br label %4
10: ; preds = %8
%11 = call i32 (...) @declaration()
br label %12
12: ; preds = %0, %10
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
define i32 @declaration_list() {
%1 = tail call i32 (...) @yyselect()
%2 = icmp eq i32 %1, 6
br i1 %2, label %3, label %12
3: ; preds = %0
%4 = tail call i32 (...) @yyselect()
%5 = icmp eq i32 %4, 110
br i1 %5, label %6, label %10
6: ; preds = %3, %6
%7 = tail call i32 (...) @declaration()
%8 = tail call i32 (...) @yyselect()
%9 = icmp eq i32 %8, 110
br i1 %9, label %6, label %10
10: ; preds = %6, %3
%11 = tail call i32 (...) @declaration()
br label %12
12: ; preds = %0, %10
ret i32 undef
}
/* Variables and functions */
scalar_t__ pow(double, double);
double sqrt(scalar_t__);
double br_error(double c_min, double c_quiet, double c_min_err,
                double c_quiet_err) {
  double br, br_err;
  br = c_min / c_quiet;
  br_err = sqrt(pow(c_quiet_err / c_quiet, 2.0) +
                pow(br * c_min_err / c_quiet, 2.0));
  return br_err;
}


x86 assembly (clang, -O0):
<br_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
movsd  0xea3(%rip),%xmm1
call   1030 <pow@plt>
mov    %rax,-0x38(%rbp)
movsd  -0x28(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
divsd  -0x10(%rbp),%xmm0
movsd  0xe83(%rip),%xmm1
call   1030 <pow@plt>
mov    -0x38(%rbp),%rdi
add    %rax,%rdi
call   1040 <sqrt@plt>
movsd  %xmm0,-0x30(%rbp)
movsd  -0x30(%rbp),%xmm0
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<br_error>:
push   %rbx
sub    $0x20,%rsp
movsd  %xmm2,0x18(%rsp)
movsd  %xmm1,0x10(%rsp)
divsd  %xmm1,%xmm0
movsd  %xmm0,0x8(%rsp)
divsd  %xmm1,%xmm3
movsd  0xeb9(%rip),%xmm1
movapd %xmm3,%xmm0
call   1030 <pow@plt>
mov    %rax,%rbx
movsd  0x8(%rsp),%xmm0
mulsd  0x18(%rsp),%xmm0
divsd  0x10(%rsp),%xmm0
movsd  0xe93(%rip),%xmm1
call   1030 <pow@plt>
add    %rax,%rbx
mov    %rbx,%rdi
add    $0x20,%rsp
pop    %rbx
jmp    1040 <sqrt@plt>

LLVM IR (-O0):
define double @br_error(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
%9 = alloca double
%10 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%11 = load double, double* %5
%12 = load double, double* %6
%13 = fdiv double %11, %12
store double %13, double* %9
%14 = load double, double* %8
%15 = load double, double* %6
%16 = fdiv double %14, %15
%17 = call i64 @pow(double %16, double 2.000000e+00)
%18 = load double, double* %9
%19 = load double, double* %7
%20 = fmul double %18, %19
%21 = load double, double* %6
%22 = fdiv double %20, %21
%23 = call i64 @pow(double %22, double 2.000000e+00)
%24 = add nsw i64 %17, %23
%25 = call double @sqrt(i64 %24)
store double %25, double* %10
%26 = load double, double* %10
ret double %26
}

LLVM IR (-O2):
define double @br_error(double %0, double %1, double %2, double %3) {
%5 = fdiv double %0, %1
%6 = fdiv double %3, %1
%7 = tail call i64 @pow(double %6, double 2.000000e+00)
%8 = fmul double %5, %2
%9 = fdiv double %8, %1
%10 = tail call i64 @pow(double %9, double 2.000000e+00)
%11 = add nsw i64 %10, %7
%12 = tail call double @sqrt(i64 %11)
ret double %12
}
void rcc_cleanup() {}


x86 assembly (clang, -O0):
<rcc_cleanup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcc_cleanup>:
ret

LLVM IR (-O0):
define void @rcc_cleanup() {
ret void
}

LLVM IR (-O2):
define void @rcc_cleanup() {
ret void
}
/* Variables and functions */
int x_gcd(int, int);
int x_lcm(int a, int b) { return ((a * b) / x_gcd(a, b)); }


x86 assembly (clang, -O0):
<x_lcm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <x_gcd@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
cltd
idiv   %ecx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x_lcm>:
push   %rbx
mov    %esi,%ebx
imul   %edi,%ebx
call   1030 <x_gcd@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
pop    %rbx
ret

LLVM IR (-O0):
define i32 @x_lcm(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @x_gcd(i32 %8, i32 %9)
%11 = sdiv i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @x_lcm(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
%4 = tail call i32 @x_gcd(i32 %0, i32 %1)
%5 = sdiv i32 %3, %4
ret i32 %5
}
int intcmp(const void *vp1, const void *vp2) {
  const int *a = vp1;
  const int *b = vp2;
  return *a - *b;
}


x86 assembly (clang, -O0):
<intcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intcmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @intcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @intcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M551_f(char *s) {
  debug("M551_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M551_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M551_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M551_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M551_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M551_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M551_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ SIG_BLOCK;
int /*<<< orphan*/ sigfillset(int /*<<< orphan*/ *);
int /*<<< orphan*/ sigprocmask(int /*<<< orphan*/, int /*<<< orphan*/ *,
                               int /*<<< orphan*/ *);
void __disable_signals(sigset_t *old_set) {
  sigset_t set;
  sigfillset(&set);
  sigprocmask(SIG_BLOCK, &set, old_set);
  return;
}


x86 assembly (clang, -O0):
<__disable_signals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0xc(%rbp),%rdi
call   1040 <sigfillset@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    -0xc(%rbp),%rsi
call   1030 <sigprocmask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__disable_signals>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
call   1040 <sigfillset@plt>
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
mov    %r14,%rsi
mov    %rbx,%rdx
call   1030 <sigprocmask@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@SIG_BLOCK = global i32 0
define void @__disable_signals(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = call i32 @sigfillset(i32* %3)
%5 = load i32, i32* @SIG_BLOCK
%6 = load i32*, i32** %2
%7 = call i32 @sigprocmask(i32 %5, i32* %3, i32* %6)
ret void
}

LLVM IR (-O2):
@SIG_BLOCK = global i32 0
define void @__disable_signals(i32* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @sigfillset(i32* %2)
%5 = load i32, i32* @SIG_BLOCK
%6 = call i32 @sigprocmask(i32 %5, i32* %2, i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AdjustCells();
int /*<<< orphan*/ SedTransCoarse();
int /*<<< orphan*/ SedTransFine();
int /*<<< orphan*/ UpdateForcingClock();
int /*<<< orphan*/ UpdateRunTimeClock();
void DoIteration() {
  SedTransFine();
  SedTransCoarse();
  AdjustCells();
  UpdateForcingClock();
  UpdateRunTimeClock();
}


x86 assembly (clang, -O0):
<DoIteration>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <SedTransFine@plt>
mov    $0x0,%al
call   1030 <SedTransCoarse@plt>
mov    $0x0,%al
call   1050 <AdjustCells@plt>
mov    $0x0,%al
call   1070 <UpdateForcingClock@plt>
mov    $0x0,%al
call   1060 <UpdateRunTimeClock@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoIteration>:
push   %rax
xor    %eax,%eax
call   1040 <SedTransFine@plt>
xor    %eax,%eax
call   1030 <SedTransCoarse@plt>
xor    %eax,%eax
call   1050 <AdjustCells@plt>
xor    %eax,%eax
call   1070 <UpdateForcingClock@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <UpdateRunTimeClock@plt>

LLVM IR (-O0):
define void @DoIteration() {
%1 = call i32 (...) @SedTransFine()
%2 = call i32 (...) @SedTransCoarse()
%3 = call i32 (...) @AdjustCells()
%4 = call i32 (...) @UpdateForcingClock()
%5 = call i32 (...) @UpdateRunTimeClock()
ret void
}

LLVM IR (-O2):
define void @DoIteration() {
%1 = tail call i32 (...) @SedTransFine()
%2 = tail call i32 (...) @SedTransCoarse()
%3 = tail call i32 (...) @AdjustCells()
%4 = tail call i32 (...) @UpdateForcingClock()
%5 = tail call i32 (...) @UpdateRunTimeClock()
ret void
}
/* Type definitions */
struct vec2i {
  int dummy;
};
struct vec2 {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vec2i_round(int /*<<< orphan*/ *, float *);
__attribute__((always_)) struct vec2i *psvec2i_round(struct vec2i *result,
                                                     struct vec2 *a) {
  vec2i_round((int32_t *)result, (float *)a);
  return result;
}


x86 assembly (clang, -O0):
<psvec2i_round>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec2i_round@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec2i_round>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec2i_round@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec2i = type { i32 }
%struct.vec2 = type { i32 }
define %struct.vec2i* @psvec2i_round(%struct.vec2i* %0, %struct.vec2* %1) {
%3 = alloca %struct.vec2i*
%4 = alloca %struct.vec2*
store %struct.vec2i* %0, %struct.vec2i** %3
store %struct.vec2* %1, %struct.vec2** %4
%5 = load %struct.vec2i*, %struct.vec2i** %3
%6 = bitcast %struct.vec2i* %5 to i32*
%7 = load %struct.vec2*, %struct.vec2** %4
%8 = bitcast %struct.vec2* %7 to float*
%9 = call i32 @vec2i_round(i32* %6, float* %8)
%10 = load %struct.vec2i*, %struct.vec2i** %3
ret %struct.vec2i* %10
}

LLVM IR (-O2):
%struct.vec2i = type { i32 }
%struct.vec2 = type { i32 }
define %struct.vec2i* @psvec2i_round(%struct.vec2i* returned %0, %struct.vec2* %1) {
%3 = getelementptr %struct.vec2i, %struct.vec2i* %0, i64 0, i32 0
%4 = bitcast %struct.vec2* %1 to float*
%5 = tail call i32 @vec2i_round(i32* %3, float* %4)
ret %struct.vec2i* %0
}
void put_driver(struct device_driver *drv) { return; }


x86 assembly (clang, -O0):
<put_driver>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_driver>:
ret

LLVM IR (-O0):
%struct.device_driver = type opaque
define void @put_driver(%struct.device_driver* %0) {
%2 = alloca %struct.device_driver*
store %struct.device_driver* %0, %struct.device_driver** %2
ret void
}

LLVM IR (-O2):
%struct.device_driver = type opaque
define void @put_driver(%struct.device_driver* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ minmax(int **, int, int *, int *);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int size, arr[500], min = 0, max = 0;
  scanf("%d", &size);
  minmax(&arr, size, &min, &max);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x7f0,%rsp
movl   $0x0,-0x7e4(%rbp)
movl   $0x0,-0x7e8(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1030 <scanf@plt>
lea    -0x7e0(%rbp),%rdi
mov    -0x4(%rbp),%esi
lea    -0x7e4(%rbp),%rdx
lea    -0x7e8(%rbp),%rcx
call   1040 <minmax@plt>
xor    %eax,%eax
add    $0x7f0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x7e8,%rsp
movl   $0x0,0x8(%rsp)
movl   $0x0,0x4(%rsp)
lea    0xec2(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1030 <scanf@plt>
mov    0xc(%rsp),%esi
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rdx
lea    0x4(%rsp),%rcx
call   1040 <minmax@plt>
xor    %eax,%eax
add    $0x7e8,%rsp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [500 x i32]
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %3
store i32 0, i32* %4
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%6 = bitcast [500 x i32]* %2 to i32**
%7 = load i32, i32* %1
%8 = call i32 @minmax(i32** %6, i32 %7, i32* %3, i32* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [500 x i32]
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast [500 x i32]* %2 to i8*
%7 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%8 = bitcast i32* %4 to i8*
store i32 0, i32* %4
%9 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%10 = bitcast [500 x i32]* %2 to i32**
%11 = load i32, i32* %1
%12 = call i32 @minmax(i32** %10, i32 %11, i32* %3, i32* %4)
ret i32 0
}
char *genrfcdate(tim, tz)
long tim;
{ return (ctim2rfc(ctime(&tim), tz)); }


x86 assembly (clang, -O0):
<genrfcdate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
lea    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <ctime@plt>
mov    %eax,%edi
mov    -0xc(%rbp),%esi
mov    $0x0,%al
call   1040 <ctim2rfc@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genrfcdate>:
push   %rbx
sub    $0x10,%rsp
mov    %esi,%ebx
mov    %rdi,0x8(%rsp)
lea    0x8(%rsp),%rdi
xor    %eax,%eax
call   1030 <ctime@plt>
mov    %eax,%edi
mov    %ebx,%esi
xor    %eax,%eax
call   1040 <ctim2rfc@plt>
cltq
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i8* @genrfcdate(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
%5 = call i32 (i64*, ...) bitcast (i32 (...)* @ctime to i32 (i64*, ...)*)(i64* %3)
%6 = load i32, i32* %4
%7 = call i32 (i32, i32, ...) bitcast (i32 (...)* @ctim2rfc to i32 (i32, i32, ...)*)(i32 %5, i32 %6)
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8*
ret i8* %9
}

LLVM IR (-O2):
define i8* @genrfcdate(i64 %0, i32 %1) {
%3 = alloca i64
store i64 %0, i64* %3
%4 = call i32 (i64*, ...) bitcast (i32 (...)* @ctime to i32 (i64*, ...)*)(i64* %3)
%5 = call i32 (i32, i32, ...) bitcast (i32 (...)* @ctim2rfc to i32 (i32, i32, ...)*)(i32 %4, i32 %1)
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}
int normaliza_num_saida(int x) { return x + 1; }


x86 assembly (clang, -O0):
<normaliza_num_saida>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<normaliza_num_saida>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @normaliza_num_saida(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @normaliza_num_saida(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
void vid_beep(void) { return; }


x86 assembly (clang, -O0):
<vid_beep>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vid_beep>:
ret

LLVM IR (-O0):
define void @vid_beep() {
ret void
}

LLVM IR (-O2):
define void @vid_beep() {
ret void
}
/* Variables and functions */
int *print_int(int const *);
int main() {
  const int i = 42;
  const int const *j = print_int(&i);
  const int *k = &i;
  int l = 21;
  int const *m = &l;
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2a,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <print_int@plt>
mov    %rax,-0x10(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x15,-0x1c(%rbp)
lea    -0x1c(%rbp),%rax
mov    %rax,-0x28(%rbp)
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movl   $0x2a,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <print_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32*
store i32 0, i32* %1
store i32 42, i32* %2
%7 = call i32* @print_int(i32* %2)
store i32* %7, i32** %3
store i32* %2, i32** %4
store i32 21, i32* %5
store i32* %5, i32** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 42, i32* %1
%3 = call i32* @print_int(i32* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ terminal_writestring(char const *);
void terminal_writeline(const char *data) {
  terminal_writestring(data);
  terminal_writestring("\n");
}


x86 assembly (clang, -O0):
<terminal_writeline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <terminal_writestring@plt>
lea    0xed4(%rip),%rdi
call   1030 <terminal_writestring@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminal_writeline>:
push   %rax
call   1030 <terminal_writestring@plt>
lea    0xee3(%rip),%rdi
pop    %rax
jmp    1030 <terminal_writestring@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @terminal_writeline(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @terminal_writestring(i8* %3)
%5 = call i32 @terminal_writestring(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define void @terminal_writeline(i8* %0) {
%2 = tail call i32 @terminal_writestring(i8* %0)
%3 = tail call i32 @terminal_writestring(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}
void redPixel(unsigned char *frame_buf, unsigned int ip) {
  frame_buf[ip] = 0x00;
  frame_buf[ip + 1] = 0xff;
  frame_buf[ip + 2] = 0xff;
  frame_buf[ip + 3] = 0xff;
}


x86 assembly (clang, -O0):
<redPixel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x1,%ecx
mov    %ecx,%ecx
movb   $0xff,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x2,%ecx
mov    %ecx,%ecx
movb   $0xff,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0x3,%ecx
mov    %ecx,%ecx
movb   $0xff,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<redPixel>:
mov    %esi,%eax
movb   $0x0,(%rdi,%rax,1)
lea    0x1(%rsi),%eax
movb   $0xff,(%rdi,%rax,1)
lea    0x2(%rsi),%eax
movb   $0xff,(%rdi,%rax,1)
add    $0x3,%esi
movb   $0xff,(%rdi,%rsi,1)
ret

LLVM IR (-O0):
define void @redPixel(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
store i8 0, i8* %8
%9 = load i8*, i8** %3
%10 = load i32, i32* %4
%11 = add i32 %10, 1
%12 = zext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
store i8 -1, i8* %13
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = add i32 %15, 2
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %14, i64 %17
store i8 -1, i8* %18
%19 = load i8*, i8** %3
%20 = load i32, i32* %4
%21 = add i32 %20, 3
%22 = zext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %19, i64 %22
store i8 -1, i8* %23
ret void
}

LLVM IR (-O2):
define void @redPixel(i8* nocapture writeonly %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
store i8 0, i8* %4
%5 = add i32 %1, 1
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 -1, i8* %7
%8 = add i32 %1, 2
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %0, i64 %9
store i8 -1, i8* %10
%11 = add i32 %1, 3
%12 = zext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %0, i64 %12
store i8 -1, i8* %13
ret void
}
void renderer_set_interlace(int enable, int is_odd) {}


x86 assembly (clang, -O0):
<renderer_set_interlace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<renderer_set_interlace>:
ret

LLVM IR (-O0):
define void @renderer_set_interlace(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @renderer_set_interlace(i32 %0, i32 %1) {
ret void
}