xunge/DecIR huggingface dataset:
/* Variables and functions */
size_t __str_spn(char const *, char const *, int);
size_t strspn(const char *s1, const char *s2) { return __str_spn(s1, s2, 1); }


x86 assembly (clang, -O0):
<strspn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <__str_spn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strspn>:
mov    $0x1,%edx
jmp    1030 <__str_spn@plt>

LLVM IR (-O0):
define i64 @strspn(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @__str_spn(i8* %5, i8* %6, i32 1)
ret i64 %7
}

LLVM IR (-O2):
define i64 @strspn(i8* %0, i8* %1) {
%3 = tail call i64 @__str_spn(i8* %0, i8* %1, i32 1)
ret i64 %3
}
/* Variables and functions */
size_t ZSTD_decompress_with_dict(void *const, size_t const, void const *const,
                                 size_t const, int /*<<< orphan*/ *,
                                 int /*<<< orphan*/);
size_t ZSTD_decompress(void *const dst, const size_t dst_len,
                       const void *const src, const size_t src_len) {
  return ZSTD_decompress_with_dict(dst, dst_len, src, src_len, NULL, 0);
}


x86 assembly (clang, -O0):
<ZSTD_decompress>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
call   1030 <ZSTD_decompress_with_dict@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZSTD_decompress>:
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <ZSTD_decompress_with_dict@plt>

LLVM IR (-O0):
define i64 @ZSTD_decompress(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i8*, i8** %7
%12 = load i64, i64* %8
%13 = call i64 @ZSTD_decompress_with_dict(i8* %9, i64 %10, i8* %11, i64 %12, i32* null, i32 0)
ret i64 %13
}

LLVM IR (-O2):
define i64 @ZSTD_decompress(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = tail call i64 @ZSTD_decompress_with_dict(i8* %0, i64 %1, i8* %2, i64 %3, i32* null, i32 0)
ret i64 %5
}
/* Variables and functions */
int random();
void QCC_genCharAt(char *c) { *c = (char)(random() % 93) + 33; }


x86 assembly (clang, -O0):
<QCC_genCharAt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <random@plt>
mov    $0x5d,%ecx
cltd
idiv   %ecx
mov    %dl,%al
movsbl %al,%eax
add    $0x21,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<QCC_genCharAt>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <random@plt>
cltq
imul   $0x2c0b02c1,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x24,%rcx
add    %edx,%ecx
imul   $0x5d,%ecx,%ecx
sub    %ecx,%eax
add    $0x21,%al
mov    %al,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @QCC_genCharAt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @random()
%4 = srem i32 %3, 93
%5 = trunc i32 %4 to i8
%6 = sext i8 %5 to i32
%7 = add nsw i32 %6, 33
%8 = trunc i32 %7 to i8
%9 = load i8*, i8** %2
store i8 %8, i8* %9
ret void
}

LLVM IR (-O2):
define void @QCC_genCharAt(i8* nocapture writeonly %0) {
%2 = tail call i32 (...) @random()
%3 = srem i32 %2, 93
%4 = trunc i32 %3 to i8
%5 = add nsw i8 %4, 33
store i8 %5, i8* %0
ret void
}
int watchdog_cmd_katcp(struct katcp_dispatch *d, int argc) { return 0; }


x86 assembly (clang, -O0):
<watchdog_cmd_katcp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<watchdog_cmd_katcp>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.katcp_dispatch = type opaque
define i32 @watchdog_cmd_katcp(%struct.katcp_dispatch* %0, i32 %1) {
%3 = alloca %struct.katcp_dispatch*
%4 = alloca i32
store %struct.katcp_dispatch* %0, %struct.katcp_dispatch** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
%struct.katcp_dispatch = type opaque
define i32 @watchdog_cmd_katcp(%struct.katcp_dispatch* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ int8_t;

/* Variables and functions */
int /*<<< orphan*/ atoi(char const *);
int /*<<< orphan*/ clamp(int /*<<< orphan*/, int, int);
int8_t conv_byte(const char *data) { return clamp(atoi(data), -0x80, 0x80); }


x86 assembly (clang, -O0):
<conv_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <atoi@plt>
mov    %eax,%edi
mov    $0xffffff80,%esi
mov    $0x80,%edx
call   1030 <clamp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<conv_byte>:
push   %rax
call   1040 <atoi@plt>
mov    %eax,%edi
mov    $0xffffff80,%esi
mov    $0x80,%edx
pop    %rax
jmp    1030 <clamp@plt>

LLVM IR (-O0):
define i32 @conv_byte(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @atoi(i8* %3)
%5 = call i32 @clamp(i32 %4, i32 -128, i32 128)
ret i32 %5
}

LLVM IR (-O2):
define i32 @conv_byte(i8* nocapture %0) {
%2 = tail call i32 @atoi(i8* %0)
%3 = tail call i32 @clamp(i32 %2, i32 -128, i32 128)
ret i32 %3
}
int get_branch_address(int target, int curr) { return target - curr - 1; }


x86 assembly (clang, -O0):
<get_branch_address>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_branch_address>:
not    %esi
lea    (%rsi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @get_branch_address(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
%8 = sub nsw i32 %7, 1
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_branch_address(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = add i32 %3, %0
ret i32 %4
}
void mod() {
  asm volatile("popq %%rbx\n\t"
               "popq %%rax\n\t"
               "cqo\n\t"
               "idivq %%rbx\n\t"
               "pushq %%rdx\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<mod>:
push   %rbp
mov    %rsp,%rbp
pop    %rbx
pop    %rax
cqto
idiv   %rbx
push   %rdx
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod>:
pop    %rbx
pop    %rax
cqto
idiv   %rbx
push   %rdx
ret

LLVM IR (-O0):
define void @mod() {
ret void
}

LLVM IR (-O2):
define void @mod() {
tail call void asm sideeffect "popq %rbx\0A\09popq %rax\0A\09cqo\0A\09idivq %rbx\0A\09pushq %rdx\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
char int_to_alphanum(int i) {
  if (i == 36)
    return '.';
  return (i < 10) ? i + 48 : i + 87;
}


x86 assembly (clang, -O0):
<int_to_alphanum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x24,-0x8(%rbp)
jne    111a <int_to_alphanum+0x1a>
movb   $0x2e,-0x1(%rbp)
jmp    1141 <int_to_alphanum+0x41>
cmpl   $0xa,-0x8(%rbp)
jge    1132 <int_to_alphanum+0x32>
mov    -0x8(%rbp),%eax
add    $0x30,%eax
mov    %eax,-0xc(%rbp)
jmp    113b <int_to_alphanum+0x3b>
mov    -0x8(%rbp),%eax
add    $0x57,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_to_alphanum>:
lea    0x57(%rdi),%eax
lea    0x30(%rdi),%ecx
cmp    $0xa,%edi
cmovge %eax,%ecx
cmp    $0x24,%edi
mov    $0x2e,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @int_to_alphanum(i32 %0) {
%2 = alloca i8
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 36
br i1 %5, label %6, label %7
6: ; preds = %1
store i8 46, i8* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp slt i32 %8, 10
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 48
br label %16
13: ; preds = %7
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 87
br label %16
16: ; preds = %13, %10
%17 = phi i32 [ %12, %10 ], [ %15, %13 ]
%18 = trunc i32 %17 to i8
store i8 %18, i8* %2
br label %19
19: ; preds = %16, %6
%20 = load i8, i8* %2
ret i8 %20
}

LLVM IR (-O2):
define signext i8 @int_to_alphanum(i32 %0) {
%2 = icmp eq i32 %0, 36
%3 = icmp slt i32 %0, 10
%4 = select i1 %3, i32 48, i32 87
%5 = add nsw i32 %4, %0
%6 = trunc i32 %5 to i8
%7 = select i1 %2, i8 46, i8 %6
ret i8 %7
}
/* Variables and functions */
int /*<<< orphan*/ k_error(int /*<<< orphan*/);
int /*<<< orphan*/ sysmsg(int);
void k_err_pu() { k_error(sysmsg(1115)); }


x86 assembly (clang, -O0):
<k_err_pu>:
push   %rbp
mov    %rsp,%rbp
mov    $0x45b,%edi
call   1030 <sysmsg@plt>
mov    %eax,%edi
call   1040 <k_error@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<k_err_pu>:
push   %rax
mov    $0x45b,%edi
call   1030 <sysmsg@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <k_error@plt>

LLVM IR (-O0):
define void @k_err_pu() {
%1 = call i32 @sysmsg(i32 1115)
%2 = call i32 @k_error(i32 %1)
ret void
}

LLVM IR (-O2):
define void @k_err_pu() {
%1 = tail call i32 @sysmsg(i32 1115)
%2 = tail call i32 @k_error(i32 %1)
ret void
}
/* Type definitions */
typedef void uint8_t;

/* Variables and functions */
int MAP_ANON;
int MAP_PRIVATE;
int PROT_READ;
int PROT_WRITE;
scalar_t__ mmap(void *, size_t, int, int, int, int /*<<< orphan*/);
void *heap_map(void *adrs, size_t size) {
  return (uint8_t *)mmap(adrs, size, (PROT_READ | PROT_WRITE),
                         (MAP_ANON | MAP_PRIVATE), -1, 0);
}


x86 assembly (clang, -O0):
<heap_map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
mov    0x2ea0(%rip),%rax
or     (%rax),%edx
mov    0x2e8f(%rip),%rax
mov    (%rax),%ecx
mov    0x2e7e(%rip),%rax
or     (%rax),%ecx
mov    $0xffffffff,%r8d
xor    %r9d,%r9d
call   1030 <mmap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<heap_map>:
mov    0x2ee1(%rip),%rax
mov    0x2eba(%rip),%rcx
mov    (%rcx),%edx
or     (%rax),%edx
mov    0x2ea7(%rip),%rax
mov    0x2e98(%rip),%rcx
mov    (%rcx),%ecx
or     (%rax),%ecx
mov    $0xffffffff,%r8d
xor    %r9d,%r9d
jmp    1030 <mmap@plt>

LLVM IR (-O0):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
@MAP_ANON = global i32 0
@MAP_PRIVATE = global i32 0
define i8* @heap_map(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = load i32, i32* @PROT_READ
%8 = load i32, i32* @PROT_WRITE
%9 = or i32 %7, %8
%10 = load i32, i32* @MAP_ANON
%11 = load i32, i32* @MAP_PRIVATE
%12 = or i32 %10, %11
%13 = call i64 @mmap(i8* %5, i64 %6, i32 %9, i32 %12, i32 -1, i32 0)
%14 = inttoptr i64 %13 to i8*
ret i8* %14
}

LLVM IR (-O2):
@PROT_READ = global i32 0
@PROT_WRITE = global i32 0
@MAP_ANON = global i32 0
@MAP_PRIVATE = global i32 0
define i8* @heap_map(i8* %0, i64 %1) {
%3 = load i32, i32* @PROT_READ
%4 = load i32, i32* @PROT_WRITE
%5 = or i32 %4, %3
%6 = load i32, i32* @MAP_ANON
%7 = load i32, i32* @MAP_PRIVATE
%8 = or i32 %7, %6
%9 = tail call i64 @mmap(i8* %0, i64 %1, i32 %5, i32 %8, i32 -1, i32 0)
%10 = inttoptr i64 %9 to i8*
ret i8* %10
}
void RTMemEfAllocNP(void) {}


x86 assembly (clang, -O0):
<RTMemEfAllocNP>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTMemEfAllocNP>:
ret

LLVM IR (-O0):
define void @RTMemEfAllocNP() {
ret void
}

LLVM IR (-O2):
define void @RTMemEfAllocNP() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
void usage(const char *argv0) {
  printf("usage: %s [--drift [clocksource] | --list]\n", argv0);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"usage: %s [--drift [clocksource] | --list]\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [44 x i8] c"usage: %s [--drift [clocksource] | --list]\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_MAX();
int bench() {
  int i;
  for (i = 0; i < 20000000; i++) {
    test_MAX();
  }
  return 0;
}


x86 assembly (clang, -O0):
<bench>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x1312d00,-0x4(%rbp)
jge    1141 <bench+0x31>
mov    $0x0,%al
call   1030 <test_MAX@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <bench+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bench>:
push   %rbx
mov    $0x1312d00,%ebx
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <test_MAX@plt>
add    $0xffffffff,%ebx
jne    1120 <bench+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @bench() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %7, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 20000000
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = call i32 (...) @test_MAX()
br label %7
7: ; preds = %5
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %2
10: ; preds = %2
ret i32 0
}

LLVM IR (-O2):
define i32 @bench() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 (...) @test_MAX()
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 20000000
br i1 %5, label %6, label %1
6: ; preds = %1
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ modifiermap;
};
typedef TYPE_1__ XModifierKeymap;

/* Variables and functions */
void *get_XModifierKeymap_modifiermap(void *_p) {
  return (void *)((XModifierKeymap *)_p)->modifiermap;
}


x86 assembly (clang, -O0):
<get_XModifierKeymap_modifiermap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XModifierKeymap_modifiermap>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i8* @get_XModifierKeymap_modifiermap(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = inttoptr i64 %6 to i8*
ret i8* %7
}

LLVM IR (-O2):
define i8* @get_XModifierKeymap_modifiermap(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_VALUE;
typedef int /*<<< orphan*/ ASN1_SEQUENCE_ANY;

/* Variables and functions */
int /*<<< orphan*/ ASN1_SET_ANY_it;
int ASN1_item_i2d(int /*<<< orphan*/ *, unsigned char **, int /*<<< orphan*/ *);
int i2d_ASN1_SET_ANY(const ASN1_SEQUENCE_ANY *a, unsigned char **out) {
  return ASN1_item_i2d((ASN1_VALUE *)a, out, &ASN1_SET_ANY_it);
}


x86 assembly (clang, -O0):
<i2d_ASN1_SET_ANY>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    0x2eb9(%rip),%rdx
call   1030 <ASN1_item_i2d@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_ASN1_SET_ANY>:
mov    0x2ed1(%rip),%rdx
jmp    1030 <ASN1_item_i2d@plt>

LLVM IR (-O0):
@ASN1_SET_ANY_it = global i32 0
define i32 @i2d_ASN1_SET_ANY(i32* %0, i8** %1) {
%3 = alloca i32*
%4 = alloca i8**
store i32* %0, i32** %3
store i8** %1, i8*** %4
%5 = load i32*, i32** %3
%6 = load i8**, i8*** %4
%7 = call i32 @ASN1_item_i2d(i32* %5, i8** %6, i32* @ASN1_SET_ANY_it)
ret i32 %7
}

LLVM IR (-O2):
@ASN1_SET_ANY_it = global i32 0
define i32 @i2d_ASN1_SET_ANY(i32* %0, i8** %1) {
%3 = tail call i32 @ASN1_item_i2d(i32* %0, i8** %1, i32* @ASN1_SET_ANY_it)
ret i32 %3
}
void sched_ticker_fini(void) {}


x86 assembly (clang, -O0):
<sched_ticker_fini>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_ticker_fini>:
ret

LLVM IR (-O0):
define void @sched_ticker_fini() {
ret void
}

LLVM IR (-O2):
define void @sched_ticker_fini() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ newman_conway_sequence(int);
int main() {
  int number_of_terms = 20;
  newman_conway_sequence(number_of_terms);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x14,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <newman_conway_sequence@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x14,%edi
call   1030 <newman_conway_sequence@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 20, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @newman_conway_sequence(i32 %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @newman_conway_sequence(i32 20)
ret i32 0
}
/* Variables and functions */
char system(char *, int, char, char);
char i2c_read(int bus, char address, char registar) {
  return system("i2cget -y %d %c %c", bus, address, registar);
}


x86 assembly (clang, -O0):
<i2c_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %edi,-0x4(%rbp)
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x5(%rbp),%al
lea    0xecd(%rip),%rdi
movsbl %al,%edx
movsbl -0x6(%rbp),%ecx
call   1030 <system@plt>
movsbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_read>:
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
lea    0xee3(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"i2cget -y %d %c %c\00"
define signext i8 @i2c_read(i32 %0, i8 signext %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8
store i32 %0, i32* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%7 = load i32, i32* %4
%8 = load i8, i8* %5
%9 = load i8, i8* %6
%10 = call signext i8 @system(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %7, i8 signext %8, i8 signext %9)
ret i8 %10
}

LLVM IR (-O2):
@.str = [19 x i8] c"i2cget -y %d %c %c\00"
define signext i8 @i2c_read(i32 %0, i8 signext %1, i8 signext %2) {
%4 = tail call signext i8 @system(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %0, i8 signext %1, i8 signext %2)
ret i8 %4
}
long IS_ERR(const void *ptr) {
  return ((unsigned long)ptr) >= (unsigned long)-4095;
}


x86 assembly (clang, -O0):
<IS_ERR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0xfffffffffffff001,%rax
setae  %al
and    $0x1,%al
movzbl %al,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<IS_ERR>:
xor    %eax,%eax
cmp    $0xfffffffffffff001,%rdi
setae  %al
ret

LLVM IR (-O0):
define i64 @IS_ERR(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
%5 = icmp uge i64 %4, -4095
%6 = zext i1 %5 to i32
%7 = sext i32 %6 to i64
ret i64 %7
}

LLVM IR (-O2):
define i64 @IS_ERR(i8* readnone %0) {
%2 = icmp ugt i8* %0, inttoptr (i64 -4096 to i8*)
%3 = zext i1 %2 to i64
ret i64 %3
}
unsigned get_32(const unsigned char *s, int e) {
  e &= 3;
  return s[e] + 0U << 24 | s[e ^ 1] << 16 | s[e ^ 2] << 8 | s[e ^ 3];
}


x86 assembly (clang, -O0):
<get_32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
add    $0x0,%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%edx
xor    $0x1,%edx
movslq %edx,%rdx
movzbl (%rcx,%rdx,1),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%edx
xor    $0x2,%edx
movslq %edx,%rdx
movzbl (%rcx,%rdx,1),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%edx
xor    $0x3,%edx
movslq %edx,%rdx
movzbl (%rcx,%rdx,1),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_32>:
and    $0x3,%esi
movzbl (%rdi,%rsi,1),%eax
shl    $0x18,%eax
mov    %rsi,%rcx
xor    $0x1,%rcx
movzbl (%rdi,%rcx,1),%ecx
shl    $0x10,%ecx
or     %eax,%ecx
mov    %rsi,%rax
xor    $0x2,%rax
movzbl (%rdi,%rax,1),%edx
shl    $0x8,%edx
or     %ecx,%edx
xor    $0x3,%rsi
movzbl (%rdi,%rsi,1),%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i32 @get_32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 3
store i32 %6, i32* %4
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = add i32 %12, 0
%14 = shl i32 %13, 24
%15 = load i8*, i8** %3
%16 = load i32, i32* %4
%17 = xor i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %15, i64 %18
%20 = load i8, i8* %19
%21 = zext i8 %20 to i32
%22 = shl i32 %21, 16
%23 = or i32 %14, %22
%24 = load i8*, i8** %3
%25 = load i32, i32* %4
%26 = xor i32 %25, 2
%27 = sext i32 %26 to i64
%28 = getelementptr inbounds i8, i8* %24, i64 %27
%29 = load i8, i8* %28
%30 = zext i8 %29 to i32
%31 = shl i32 %30, 8
%32 = or i32 %23, %31
%33 = load i8*, i8** %3
%34 = load i32, i32* %4
%35 = xor i32 %34, 3
%36 = sext i32 %35 to i64
%37 = getelementptr inbounds i8, i8* %33, i64 %36
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = or i32 %32, %39
ret i32 %40
}

LLVM IR (-O2):
define i32 @get_32(i8* nocapture %0, i32 %1) {
%3 = and i32 %1, 3
%4 = zext i32 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = shl nuw i32 %7, 24
%9 = xor i32 %3, 1
%10 = zext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %0, i64 %10
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = shl nuw nsw i32 %13, 16
%15 = or i32 %14, %8
%16 = xor i32 %3, 2
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %0, i64 %17
%19 = load i8, i8* %18
%20 = zext i8 %19 to i32
%21 = shl nuw nsw i32 %20, 8
%22 = or i32 %15, %21
%23 = xor i32 %3, 3
%24 = zext i32 %23 to i64
%25 = getelementptr inbounds i8, i8* %0, i64 %24
%26 = load i8, i8* %25
%27 = zext i8 %26 to i32
%28 = or i32 %22, %27
ret i32 %28
}
void main() {
  char a;
  a = 'a';
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movb   $0x61,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i8
store i8 97, i8* %1
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void matfree(void *mat, int rows) {
  while (--rows >= 0)
    free(((void **)mat)[rows]);
  free(mat);
}


x86 assembly (clang, -O0):
<matfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
jl     1147 <matfree+0x37>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
jmp    111f <matfree+0xf>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<matfree>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
test   %esi,%esi
jle    1146 <matfree+0x36>
mov    %esi,%ebx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
lea    -0x2(%rbx),%eax
mov    (%r14,%rax,8),%rdi
call   1030 <free@plt>
add    $0xffffffffffffffff,%rbx
cmp    $0x1,%rbx
ja     1130 <matfree+0x20>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @matfree(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %9, %2
%6 = load i32, i32* %4
%7 = add nsw i32 %6, -1
store i32 %7, i32* %4
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = bitcast i8* %10 to i8**
%12 = load i32, i32* %4
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
%16 = call i32 @free(i8* %15)
br label %5
17: ; preds = %5
%18 = load i8*, i8** %3
%19 = call i32 @free(i8* %18)
ret void
}

LLVM IR (-O2):
define void @matfree(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %15
4: ; preds = %2
%5 = bitcast i8* %0 to i8**
%6 = zext i32 %1 to i64
br label %7
7: ; preds = %4, %7
%8 = phi i64 [ %6, %4 ], [ %9, %7 ]
%9 = add nsw i64 %8, -1
%10 = and i64 %9, 4294967295
%11 = getelementptr inbounds i8*, i8** %5, i64 %10
%12 = load i8*, i8** %11
%13 = tail call i32 @free(i8* %12)
%14 = icmp ugt i64 %8, 1
br i1 %14, label %7, label %15
15: ; preds = %7, %2
%16 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_RDONLY;
int /*<<< orphan*/ close(int);
int open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ read(int, char *, int);
void DoOverflow(char *file) {
  int fd = open(file, O_RDONLY);
  char buf[4];
  read(fd, buf, 20);
  close(fd);
}


x86 assembly (clang, -O0):
<DoOverflow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ea1(%rip),%rax
mov    (%rax),%esi
call   1050 <open@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
lea    -0x10(%rbp),%rsi
mov    $0x14,%edx
call   1040 <read@plt>
mov    -0xc(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoOverflow>:
push   %rbx
sub    $0x10,%rsp
mov    0x2eac(%rip),%rax
mov    (%rax),%esi
call   1050 <open@plt>
mov    %eax,%ebx
lea    0xc(%rsp),%rsi
mov    %eax,%edi
mov    $0x14,%edx
call   1040 <read@plt>
mov    %ebx,%edi
add    $0x10,%rsp
pop    %rbx
jmp    1030 <close@plt>

LLVM IR (-O0):
@O_RDONLY = global i32 0
define void @DoOverflow(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca [4 x i8]
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = load i32, i32* @O_RDONLY
%7 = call i32 @open(i8* %5, i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = getelementptr inbounds [4 x i8], [4 x i8]* %4, i64 0, i64 0
%10 = call i32 @read(i32 %8, i8* %9, i32 20)
%11 = load i32, i32* %3
%12 = call i32 @close(i32 %11)
ret void
}

LLVM IR (-O2):
@O_RDONLY = global i32 0
define void @DoOverflow(i8* nocapture %0) {
%2 = alloca [4 x i8]
%3 = load i32, i32* @O_RDONLY
%4 = tail call i32 @open(i8* %0, i32 %3)
%5 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%6 = call i32 @read(i32 %4, i8* %5, i32 20)
%7 = tail call i32 @close(i32 %4)
ret void
}
void sky_deinit() {}


x86 assembly (clang, -O0):
<sky_deinit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sky_deinit>:
ret

LLVM IR (-O0):
define void @sky_deinit() {
ret void
}

LLVM IR (-O2):
define void @sky_deinit() {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
void inv_fifo_protocol_helper_decode_aac_data(const void *in, uint16_t len,
                                              uint8_t *activity,
                                              uint8_t *event) {
  const uint8_t data = *(const uint8_t *)in;
  *event = !!(data & 0x80);
  *activity = (data & 0x7F);
  (void)len;
}


x86 assembly (clang, -O0):
<inv_fifo_protocol_helper_decode_aac_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x24(%rbp),%ecx
and    $0x7f,%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<inv_fifo_protocol_helper_decode_aac_data>:
mov    (%rdi),%eax
mov    %eax,%esi
shr    $0x7,%esi
and    $0x1,%esi
mov    %esi,(%rcx)
and    $0x7f,%eax
mov    %eax,(%rdx)
ret

LLVM IR (-O0):
define void @inv_fifo_protocol_helper_decode_aac_data(i8* %0, i32 %1, i32* %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i32*
%12 = load i32, i32* %11
store i32 %12, i32* %9
%13 = load i32, i32* %9
%14 = and i32 %13, 128
%15 = icmp ne i32 %14, 0
%16 = xor i1 %15, true
%17 = xor i1 %16, true
%18 = zext i1 %17 to i32
%19 = load i32*, i32** %8
store i32 %18, i32* %19
%20 = load i32, i32* %9
%21 = and i32 %20, 127
%22 = load i32*, i32** %7
store i32 %21, i32* %22
%23 = load i32, i32* %6
ret void
}

LLVM IR (-O2):
define void @inv_fifo_protocol_helper_decode_aac_data(i8* nocapture %0, i32 %1, i32* nocapture writeonly %2, i32* nocapture writeonly %3) {
%5 = bitcast i8* %0 to i32*
%6 = load i32, i32* %5
%7 = lshr i32 %6, 7
%8 = and i32 %7, 1
store i32 %8, i32* %3
%9 = and i32 %6, 127
store i32 %9, i32* %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_irq_noprobe(int);
void activate_irq(int irq) { set_irq_noprobe(irq); }


x86 assembly (clang, -O0):
<activate_irq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <set_irq_noprobe@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<activate_irq>:
jmp    1030 <set_irq_noprobe@plt>

LLVM IR (-O0):
define void @activate_irq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @set_irq_noprobe(i32 %3)
ret void
}

LLVM IR (-O2):
define void @activate_irq(i32 %0) {
%2 = tail call i32 @set_irq_noprobe(i32 %0)
ret void
}
void OBJ_NAME_new_index(void) {}


x86 assembly (clang, -O0):
<OBJ_NAME_new_index>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OBJ_NAME_new_index>:
ret

LLVM IR (-O0):
define void @OBJ_NAME_new_index() {
ret void
}

LLVM IR (-O2):
define void @OBJ_NAME_new_index() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ faux(int);
int main() {
  for (int tiph = 0; tiph <= 1133; tiph++)
    faux(tiph);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x46d,-0x8(%rbp)
jg     1149 <main+0x39>
mov    -0x8(%rbp),%edi
call   1030 <faux@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <faux@plt>
add    $0x1,%ebx
cmp    $0x46e,%ebx
jne    1120 <main+0x10>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %9, %0
%4 = load i32, i32* %2
%5 = icmp sle i32 %4, 1133
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @faux(i32 %7)
br label %9
9: ; preds = %6
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %2
1: ; preds = %2
ret i32 0
2: ; preds = %0, %2
%3 = phi i32 [ 0, %0 ], [ %5, %2 ]
%4 = tail call i32 @faux(i32 %3)
%5 = add nuw nsw i32 %3, 1
%6 = icmp eq i32 %5, 1134
br i1 %6, label %1, label %2
}
/* Variables and functions */
long xstrtoll(char const *, int);
long xstrtol(const char *str, int b) { return xstrtoll(str, b); }


x86 assembly (clang, -O0):
<xstrtol>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <xstrtoll@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrtol>:
jmp    1030 <xstrtoll@plt>

LLVM IR (-O0):
define i64 @xstrtol(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i64 @xstrtoll(i8* %5, i32 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @xstrtol(i8* %0, i32 %1) {
%3 = tail call i64 @xstrtoll(i8* %0, i32 %1)
ret i64 %3
}
yyNoArgs() { ; }


x86 assembly (clang, -O0):
<yyNoArgs>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<yyNoArgs>:
ret

LLVM IR (-O0):
define i32 @yyNoArgs() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @yyNoArgs() {
ret i32 undef
}
void newString(char string[], int count, int symbol) {
  int i;
  for (i = 0; i < count; i++) {
    string[i] = symbol;
  }
  string[i] = '\0';
}


x86 assembly (clang, -O0):
<newString>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    113f <newString+0x3f>
mov    -0x10(%rbp),%eax
mov    %al,%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1115 <newString+0x15>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<newString>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
test   %esi,%esi
jle    112c <newString+0x1c>
mov    %esi,%ebx
mov    %r14,%rdi
mov    %edx,%esi
mov    %rbx,%rdx
call   1030 <memset@plt>
jmp    112e <newString+0x1e>
xor    %ebx,%ebx
movb   $0x0,(%r14,%rbx,1)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @newString(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %19, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %5
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %22
12: ; preds = %8
%13 = load i32, i32* %6
%14 = trunc i32 %13 to i8
%15 = load i8*, i8** %4
%16 = load i32, i32* %7
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
store i8 %14, i8* %18
br label %19
19: ; preds = %12
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
store i32 %21, i32* %7
br label %8
22: ; preds = %8
%23 = load i8*, i8** %4
%24 = load i32, i32* %7
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i8, i8* %23, i64 %25
store i8 0, i8* %26
ret void
}

LLVM IR (-O2):
define void @newString(i8* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %9
5: ; preds = %3
%6 = trunc i32 %2 to i8
%7 = zext i32 %1 to i64
%8 = zext i32 %1 to i64
br label %9
9: ; preds = %5, %3
%10 = phi i64 [ 0, %3 ], [ %8, %5 ]
%11 = getelementptr inbounds i8, i8* %0, i64 %10
store i8 0, i8* %11
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void key_callback(int key_sym) { printf("Key event\n"); }


x86 assembly (clang, -O0):
<key_callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<key_callback>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"Key event\0A\00"
define void @key_callback(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [10 x i8] c"Key event\00"
define void @key_callback(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int __putenv(char *, int /*<<< orphan*/);
int putenv(char *s) { return __putenv(s, 0); }


x86 assembly (clang, -O0):
<putenv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <__putenv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putenv>:
xor    %esi,%esi
jmp    1030 <__putenv@plt>

LLVM IR (-O0):
define i32 @putenv(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @__putenv(i8* %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @putenv(i8* %0) {
%2 = tail call i32 @__putenv(i8* %0, i32 0)
ret i32 %2
}
void m_set0(double *m, int rows, int cols) {
  int i;
  for (i = rows * cols; i > 0; i--)
    *m++ = 0;
}


x86 assembly (clang, -O0):
<m_set0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jle    1146 <m_set0+0x46>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x8(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,(%rax)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
jmp    1118 <m_set0+0x18>
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_set0>:
imul   %edx,%esi
test   %esi,%esi
jle    1129 <m_set0+0x19>
push   %rax
mov    %esi,%edx
shl    $0x3,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @m_set0(double* %0, i32 %1, i32 %2) {
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store double* %0, double** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = mul nsw i32 %8, %9
store i32 %10, i32* %7
br label %11
11: ; preds = %17, %3
%12 = load i32, i32* %7
%13 = icmp sgt i32 %12, 0
br i1 %13, label %14, label %20
14: ; preds = %11
%15 = load double*, double** %4
%16 = getelementptr inbounds double, double* %15, i32 1
store double* %16, double** %4
store double 0.000000e+00, double* %15
br label %17
17: ; preds = %14
%18 = load i32, i32* %7
%19 = add nsw i32 %18, -1
store i32 %19, i32* %7
br label %11
20: ; preds = %11
ret void
}

LLVM IR (-O2):
define void @m_set0(double* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = mul i32 %2, %1
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = bitcast double* %0 to i8*
%8 = zext i32 %4 to i64
%9 = shl nuw nsw i64 %8, 3
br label %10
10: ; preds = %6, %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ GPIOPadConfigSet(int /*<<< orphan*/, int /*<<< orphan*/, int,
                                    int);
void GPIOPinTypeEthernetLED(uint32_t ui32Port, uint8_t ui8Pins) {
  ;
  GPIODirModeSet(ui32Port, ui8Pins, 0x00000002);
  GPIOPadConfigSet(ui32Port, ui8Pins, 0x00000066, 0x00000008);
}


x86 assembly (clang, -O0):
<GPIOPinTypeEthernetLED>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x66,%edx
mov    $0x8,%ecx
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeEthernetLED>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    $0x66,%edx
mov    $0x8,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeEthernetLED(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @GPIODirModeSet(i32 %5, i32 %6, i32 2)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @GPIOPadConfigSet(i32 %8, i32 %9, i32 102, i32 8)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeEthernetLED(i32 %0, i32 %1) {
%3 = tail call i32 @GPIODirModeSet(i32 %0, i32 %1, i32 2)
%4 = tail call i32 @GPIOPadConfigSet(i32 %0, i32 %1, i32 102, i32 8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main() {
  printf("Hello world ... from "
         "Mar 17 2022"
         " "
         "12:39:19"
         "!\n");
  printf("My sizeof(long) is %u.\n", (unsigned)sizeof(long));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf03(%rip),%rdi
mov    $0x8,%esi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef0(%rip),%rdi
call   1030 <puts@plt>
lea    0xecc(%rip),%rdi
mov    $0x8,%esi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [44 x i8] c"Hello world ... from Mar 17 2022 12:39:19!\0A\00"
@.str.1 = [24 x i8] c"My sizeof(long) is %u.\0A\00"
define i32 @main() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i32 8)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [24 x i8] c"My sizeof(long) is %u.\0A\00"
@str = [43 x i8] c"Hello world ... from Mar 17 2022 12:39:19!\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i32 8)
ret i32 0
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
int64_t mod(int64_t x, int64_t y) {
  int64_t m = x % y;
  if (m < 0) {
    if (y < 0) {
      return m - y;
    } else {
      return m + y;
    }
  }
  return m;
}


x86 assembly (clang, -O0):
<mod>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cqto
idivq  -0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jge    1152 <mod+0x52>
cmpq   $0x0,-0x18(%rbp)
jge    1141 <mod+0x41>
mov    -0x20(%rbp),%rax
sub    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    115a <mod+0x5a>
mov    -0x20(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    115a <mod+0x5a>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod>:
mov    %rdi,%rax
mov    %rdi,%rcx
or     %rsi,%rcx
shr    $0x20,%rcx
je     111d <mod+0x1d>
cqto
idiv   %rsi
mov    %rdx,%rax
test   %rax,%rax
js     1128 <mod+0x28>
ret
xor    %edx,%edx
div    %esi
mov    %edx,%eax
test   %rax,%rax
jns    111c <mod+0x1c>
test   %rsi,%rsi
js     1131 <mod+0x31>
add    %rsi,%rax
ret
sub    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @mod(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = srem i64 %7, %8
store i64 %9, i64* %6
%10 = load i64, i64* %6
%11 = icmp slt i64 %10, 0
br i1 %11, label %12, label %23
12: ; preds = %2
%13 = load i64, i64* %5
%14 = icmp slt i64 %13, 0
br i1 %14, label %15, label %19
15: ; preds = %12
%16 = load i64, i64* %6
%17 = load i64, i64* %5
%18 = sub nsw i64 %16, %17
store i64 %18, i64* %3
br label %25
19: ; preds = %12
%20 = load i64, i64* %6
%21 = load i64, i64* %5
%22 = add nsw i64 %20, %21
store i64 %22, i64* %3
br label %25
23: ; preds = %2
%24 = load i64, i64* %6
store i64 %24, i64* %3
br label %25
25: ; preds = %23, %19, %15
%26 = load i64, i64* %3
ret i64 %26
}

LLVM IR (-O2):
define i64 @mod(i64 %0, i64 %1) {
%3 = srem i64 %0, %1
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %2
%6 = icmp slt i64 %1, 0
br i1 %6, label %7, label %9
7: ; preds = %5
%8 = sub nsw i64 %3, %1
br label %11
9: ; preds = %5
%10 = add nsw i64 %3, %1
br label %11
11: ; preds = %2, %9, %7
%12 = phi i64 [ %8, %7 ], [ %10, %9 ], [ %3, %2 ]
ret i64 %12
}
/* Variables and functions */
int /*<<< orphan*/ free(unsigned short *);
void tg_big_destroy(unsigned short *big_table) { free(big_table); }


x86 assembly (clang, -O0):
<tg_big_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tg_big_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @tg_big_destroy(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = call i32 @free(i16* %3)
ret void
}

LLVM IR (-O2):
define void @tg_big_destroy(i16* nocapture %0) {
%2 = tail call i32 @free(i16* %0)
ret void
}
/* Type definitions */
typedef void AMCStaticBinSearchTree;

/* Variables and functions */
int /*<<< orphan*/ _lock_Read_STree(void *);
int /*<<< orphan*/ _sTree_Dump(void *);
int /*<<< orphan*/ _unlock_Read_STree(void *);
void AMCStaticBsTree_DebugStdout(struct AMCStaticBinSearchTree *tree) {
  if (((void *)0) == tree) {
    return;
  }
  _lock_Read_STree(tree);
  _sTree_Dump(tree);
  _unlock_Read_STree(tree);
  return;
}


x86 assembly (clang, -O0):
<AMCStaticBsTree_DebugStdout>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
jne    114d <AMCStaticBsTree_DebugStdout+0x1d>
jmp    1168 <AMCStaticBsTree_DebugStdout+0x38>
mov    -0x8(%rbp),%rdi
call   1030 <_lock_Read_STree@plt>
mov    -0x8(%rbp),%rdi
call   1040 <_sTree_Dump@plt>
mov    -0x8(%rbp),%rdi
call   1050 <_unlock_Read_STree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AMCStaticBsTree_DebugStdout>:
test   %rdi,%rdi
je     114f <AMCStaticBsTree_DebugStdout+0x1f>
push   %rbx
mov    %rdi,%rbx
call   1030 <_lock_Read_STree@plt>
mov    %rbx,%rdi
call   1040 <_sTree_Dump@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <_unlock_Read_STree@plt>
ret

LLVM IR (-O0):
%struct.AMCStaticBinSearchTree = type opaque
define void @AMCStaticBsTree_DebugStdout(%struct.AMCStaticBinSearchTree* %0) {
%2 = alloca %struct.AMCStaticBinSearchTree*
store %struct.AMCStaticBinSearchTree* %0, %struct.AMCStaticBinSearchTree** %2
%3 = load %struct.AMCStaticBinSearchTree*, %struct.AMCStaticBinSearchTree** %2
%4 = icmp eq %struct.AMCStaticBinSearchTree* null, %3
br i1 %4, label %5, label %6
5: ; preds = %1
br label %16
6: ; preds = %1
%7 = load %struct.AMCStaticBinSearchTree*, %struct.AMCStaticBinSearchTree** %2
%8 = bitcast %struct.AMCStaticBinSearchTree* %7 to i8*
%9 = call i32 @_lock_Read_STree(i8* %8)
%10 = load %struct.AMCStaticBinSearchTree*, %struct.AMCStaticBinSearchTree** %2
%11 = bitcast %struct.AMCStaticBinSearchTree* %10 to i8*
%12 = call i32 @_sTree_Dump(i8* %11)
%13 = load %struct.AMCStaticBinSearchTree*, %struct.AMCStaticBinSearchTree** %2
%14 = bitcast %struct.AMCStaticBinSearchTree* %13 to i8*
%15 = call i32 @_unlock_Read_STree(i8* %14)
br label %16
16: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
%struct.AMCStaticBinSearchTree = type opaque
define void @AMCStaticBsTree_DebugStdout(%struct.AMCStaticBinSearchTree* %0) {
%2 = icmp eq %struct.AMCStaticBinSearchTree* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = bitcast %struct.AMCStaticBinSearchTree* %0 to i8*
%5 = tail call i32 @_lock_Read_STree(i8* %4)
%6 = tail call i32 @_sTree_Dump(i8* %4)
%7 = tail call i32 @_unlock_Read_STree(i8* %4)
br label %8
8: ; preds = %1, %3
ret void
}