xunge/DecIR huggingface dataset:
int hexval(unsigned c) {
  if (c - '0' < 10)
    return c - '0';
  c |= 32;
  if (c - 'a' < 6)
    return c - 'a' + 10;
  return -1;
}


x86 assembly (clang, -O0):
<hexval>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x30,%eax
cmp    $0xa,%eax
jae    1124 <hexval+0x24>
mov    -0x8(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    1154 <hexval+0x54>
mov    -0x8(%rbp),%eax
or     $0x20,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x61,%eax
cmp    $0x6,%eax
jae    114d <hexval+0x4d>
mov    -0x8(%rbp),%eax
sub    $0x61,%eax
add    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    1154 <hexval+0x54>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hexval>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
jb     111c <hexval+0x1c>
or     $0x20,%edi
lea    -0x61(%rdi),%eax
add    $0xffffffa9,%edi
cmp    $0x6,%eax
mov    $0xffffffff,%eax
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @hexval(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = sub i32 %4, 48
%6 = icmp ult i32 %5, 10
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub i32 %8, 48
store i32 %9, i32* %2
br label %21
10: ; preds = %1
%11 = load i32, i32* %3
%12 = or i32 %11, 32
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = sub i32 %13, 97
%15 = icmp ult i32 %14, 6
br i1 %15, label %16, label %20
16: ; preds = %10
%17 = load i32, i32* %3
%18 = sub i32 %17, 97
%19 = add i32 %18, 10
store i32 %19, i32* %2
br label %21
20: ; preds = %10
store i32 -1, i32* %2
br label %21
21: ; preds = %20, %16, %7
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @hexval(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
br i1 %3, label %10, label %4
4: ; preds = %1
%5 = or i32 %0, 32
%6 = add i32 %5, -97
%7 = icmp ult i32 %6, 6
%8 = add i32 %5, -87
%9 = select i1 %7, i32 %8, i32 -1
br label %10
10: ; preds = %4, %1
%11 = phi i32 [ %2, %1 ], [ %9, %4 ]
ret i32 %11
}
void arg_long3(long x, long y, long z) {}


x86 assembly (clang, -O0):
<arg_long3>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<arg_long3>:
ret

LLVM IR (-O0):
define void @arg_long3(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
ret void
}

LLVM IR (-O2):
define void @arg_long3(i64 %0, i64 %1, i64 %2) {
ret void
}
void __attribute__((weak)) tim1_up_isr() { debug_handler(__FUNCTION__); }


x86 assembly (clang, -O0):
<tim1_up_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tim1_up_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.tim1_up_isr = [12 x i8] c"tim1_up_isr\00"
define weak void @tim1_up_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__FUNCTION__.tim1_up_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.tim1_up_isr = [12 x i8] c"tim1_up_isr\00"
define weak void @tim1_up_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__FUNCTION__.tim1_up_isr, i64 0, i64 0))
ret void
}
/* Variables and functions */
int bitcount(int);
int /*<<< orphan*/ printf(char *, int);
int main() { printf("%d\n", bitcount(259)); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x103,%edi
call   1040 <bitcount@plt>
mov    %eax,%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x103,%edi
call   1040 <bitcount@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = call i32 @bitcount(i32 259)
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @bitcount(i32 259)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int bar(void) { return 5; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @bar() {
ret i32 5
}

LLVM IR (-O2):
define i32 @bar() {
ret i32 5
}
void selectInputChannel_dummy(char channel) {}


x86 assembly (clang, -O0):
<selectInputChannel_dummy>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<selectInputChannel_dummy>:
ret

LLVM IR (-O0):
define void @selectInputChannel_dummy(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret void
}

LLVM IR (-O2):
define void @selectInputChannel_dummy(i8 signext %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, unsigned long);
void idleinfo(void *h, const char *who, unsigned long time) {
  printf("*** Idle: %s, %ld\n", who, time);
  return;
}


x86 assembly (clang, -O0):
<idleinfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<idleinfo>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"*** Idle: %s, %ld\0A\00"
define void @idleinfo(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i64, i64* %6
%9 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %7, i64 %8)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"*** Idle: %s, %ld\0A\00"
define void @idleinfo(i8* nocapture readnone %0, i8* %1, i64 %2) {
%4 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %1, i64 %2)
ret void
}
/* Variables and functions */
int hashkey_divided(int, int);
int double_hash(int key, int TABLE_SIZE, int number_try, int Hash1) {
  int Hash2 = hashkey_divided(key, TABLE_SIZE - 1) + 1;
  return ((Hash1 + number_try * Hash2) & 0xFFFFFFF) % TABLE_SIZE;
}


x86 assembly (clang, -O0):
<double_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
sub    $0x1,%esi
call   1030 <hashkey_divided@plt>
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
imul   -0x14(%rbp),%ecx
add    %ecx,%eax
and    $0xfffffff,%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<double_hash>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %edx,%ebp
mov    %esi,%ebx
lea    -0x1(%rbx),%esi
call   1030 <hashkey_divided@plt>
add    $0x1,%eax
imul   %ebp,%eax
add    %r14d,%eax
and    $0xfffffff,%eax
xor    %edx,%edx
idiv   %ebx
mov    %edx,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @double_hash(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = sub nsw i32 %11, 1
%13 = call i32 @hashkey_divided(i32 %10, i32 %12)
%14 = add nsw i32 %13, 1
store i32 %14, i32* %9
%15 = load i32, i32* %8
%16 = load i32, i32* %7
%17 = load i32, i32* %9
%18 = mul nsw i32 %16, %17
%19 = add nsw i32 %15, %18
%20 = and i32 %19, 268435455
%21 = load i32, i32* %6
%22 = srem i32 %20, %21
ret i32 %22
}

LLVM IR (-O2):
define i32 @double_hash(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = add nsw i32 %1, -1
%6 = tail call i32 @hashkey_divided(i32 %0, i32 %5)
%7 = add nsw i32 %6, 1
%8 = mul nsw i32 %7, %2
%9 = add nsw i32 %8, %3
%10 = and i32 %9, 268435455
%11 = srem i32 %10, %1
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int main() {
  char c[] = "This is a c string, it is an array of individual characters";
  int i;
  i = 0;
  printf("%s\n", c);
  printf("i equals = %d\n", i);
  return i;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x40(%rbp),%rdi
lea    0xec6(%rip),%rsi
mov    $0x3c,%edx
call   1040 <memcpy@plt>
movl   $0x0,-0x44(%rbp)
lea    -0x40(%rbp),%rsi
lea    0xee6(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x44(%rbp),%esi
lea    0xed9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x44(%rbp),%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x48,%rsp
movups 0xf01(%rip),%xmm0
movups %xmm0,0x2c(%rsp)
movaps 0xee9(%rip),%xmm0
movaps %xmm0,0x20(%rsp)
movaps 0xecd(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xeb1(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
call   1030 <puts@plt>
lea    0xeda(%rip),%rdi
xor    %esi,%esi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x48,%rsp
ret

LLVM IR (-O0):
@__const.main.c = [60 x i8] c"This is a c string, it is an array of individual characters\00"
@.str = [4 x i8] c"%s\0A\00"
@.str.1 = [15 x i8] c"i equals = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [60 x i8]
%3 = alloca i32
store i32 0, i32* %1
%4 = bitcast [60 x i8]* %2 to i8*
store i32 0, i32* %3
%5 = getelementptr inbounds [60 x i8], [60 x i8]* %2, i64 0, i64 0
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i32, i32* %3
%8 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i32 %7)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
@__const.main.c = [60 x i8] c"This is a c string, it is an array of individual characters\00"
@.str.1 = [15 x i8] c"i equals = %d\0A\00"
define i32 @main() {
%1 = alloca [60 x i8]
%2 = getelementptr inbounds [60 x i8], [60 x i8]* %1, i64 0, i64 0
%3 = call i32 @puts(i8* %2)
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str.1, i64 0, i64 0), i32 0)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ blksize_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int main(int argc, char *argv[]) {
  blksize_t d = 0;
  (void)argc;
  (void)argv;
  (void)d;
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load i32, i32* %6
%10 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @exit(i32 0)
unreachable
}
void pipe_create() { return; }


x86 assembly (clang, -O0):
<pipe_create>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pipe_create>:
ret

LLVM IR (-O0):
define void @pipe_create() {
ret void
}

LLVM IR (-O2):
define void @pipe_create() {
ret void
}
/* Variables and functions */
bool hashmapShortEquals(void *keyA, void *keyB) {
  short a = *((short *)keyA);
  short b = *((short *)keyB);
  return a == b;
}


x86 assembly (clang, -O0):
<hashmapShortEquals>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ax
mov    %ax,-0x12(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ax
mov    %ax,-0x14(%rbp)
movswl -0x12(%rbp),%eax
movswl -0x14(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hashmapShortEquals>:
movzwl (%rdi),%ecx
xor    %eax,%eax
cmp    (%rsi),%cx
sete   %al
ret

LLVM IR (-O0):
define i32 @hashmapShortEquals(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i16
%6 = alloca i16
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i16*
%9 = load i16, i16* %8
store i16 %9, i16* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to i16*
%12 = load i16, i16* %11
store i16 %12, i16* %6
%13 = load i16, i16* %5
%14 = sext i16 %13 to i32
%15 = load i16, i16* %6
%16 = sext i16 %15 to i32
%17 = icmp eq i32 %14, %16
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @hashmapShortEquals(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i16*
%4 = load i16, i16* %3
%5 = bitcast i8* %1 to i16*
%6 = load i16, i16* %5
%7 = icmp eq i16 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int partition(double *, int, int);
void quicksort(double *v, int low, int high) {
  if (low < high) {
    int k = partition(v, low, high);
    quicksort(v, low, k - 1);
    quicksort(v, k + 1, high);
  }
}


x86 assembly (clang, -O0):
<quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1174 <quicksort+0x54>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <partition@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x14(%rbp),%edx
sub    $0x1,%edx
call   1040 <quicksort@plt>
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
add    $0x1,%esi
mov    -0x10(%rbp),%edx
call   1040 <quicksort@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
cmp    %edx,%esi
jge    1166 <quicksort+0x46>
mov    %edx,%r14d
mov    %esi,%ebp
mov    %rdi,%r15
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r15,%rdi
mov    %ebp,%esi
mov    %r14d,%edx
call   1030 <partition@plt>
mov    %eax,%ebx
lea    -0x1(%rbx),%edx
mov    %r15,%rdi
mov    %ebp,%esi
call   1040 <quicksort@plt>
add    $0x1,%ebx
mov    %ebx,%ebp
cmp    %r14d,%ebx
jl     1140 <quicksort+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @quicksort(double* %0, i32 %1, i32 %2) {
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store double* %0, double** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %3
%12 = load double*, double** %4
%13 = load i32, i32* %5
%14 = load i32, i32* %6
%15 = call i32 @partition(double* %12, i32 %13, i32 %14)
store i32 %15, i32* %7
%16 = load double*, double** %4
%17 = load i32, i32* %5
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, 1
%20 = load double*, double** %4
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
%23 = load i32, i32* %6
br label %24
24: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @quicksort(double* %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %1, %3 ]
%7 = tail call i32 @partition(double* %0, i32 %6, i32 %2)
%8 = add nsw i32 %7, -1
tail call void @quicksort(double* %0, i32 %6, i32 %8)
%9 = add nsw i32 %7, 1
%10 = icmp slt i32 %9, %2
br i1 %10, label %5, label %11
11: ; preds = %5, %3
ret void
}
int ScanRowForPieces(char *row) {
  while (*row == '.') {
    row++;
  }
  if (*row == '\0') {
    return 0;
  } else {
    return 1;
  }
}


x86 assembly (clang, -O0):
<ScanRowForPieces>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x2e,%eax
jne    1129 <ScanRowForPieces+0x29>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1108 <ScanRowForPieces+0x8>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1145 <ScanRowForPieces+0x45>
movl   $0x0,-0x4(%rbp)
jmp    114c <ScanRowForPieces+0x4c>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ScanRowForPieces>:
movzbl (%rdi),%eax
cmp    $0x2e,%al
jne    110d <ScanRowForPieces+0xd>
add    $0x1,%rdi
jmp    1100 <ScanRowForPieces>
test   %al,%al
jne    1114 <ScanRowForPieces+0x14>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ScanRowForPieces(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 46
br i1 %8, label %9, label %12
9: ; preds = %4
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %3
br label %4
12: ; preds = %4
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %12
store i32 0, i32* %2
br label %19
18: ; preds = %12
store i32 1, i32* %2
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @ScanRowForPieces(i8* nocapture %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %8 [
i8 46, label %5
i8 0, label %7
]
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2
br label %8
8: ; preds = %2, %7
%9 = phi i32 [ 0, %7 ], [ 1, %2 ]
ret i32 %9
}
/* Variables and functions */
int MCL_CURRENT;
int MCL_FUTURE;
int mlockall(int);
int hubo_rt_lock_memory() { return mlockall(MCL_CURRENT | MCL_FUTURE); }


x86 assembly (clang, -O0):
<hubo_rt_lock_memory>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    0x2ecc(%rip),%rax
or     (%rax),%edi
call   1030 <mlockall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hubo_rt_lock_memory>:
mov    0x2ec1(%rip),%rax
mov    0x2ed2(%rip),%rcx
mov    (%rcx),%edi
or     (%rax),%edi
jmp    1030 <mlockall@plt>

LLVM IR (-O0):
@MCL_CURRENT = global i32 0
@MCL_FUTURE = global i32 0
define i32 @hubo_rt_lock_memory() {
%1 = load i32, i32* @MCL_CURRENT
%2 = load i32, i32* @MCL_FUTURE
%3 = or i32 %1, %2
%4 = call i32 @mlockall(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
@MCL_CURRENT = global i32 0
@MCL_FUTURE = global i32 0
define i32 @hubo_rt_lock_memory() {
%1 = load i32, i32* @MCL_CURRENT
%2 = load i32, i32* @MCL_FUTURE
%3 = or i32 %2, %1
%4 = tail call i32 @mlockall(i32 %3)
ret i32 %4
}
int ratio_to_int(double value, int max) { return (int)(value * max + 0.5); }


x86 assembly (clang, -O0):
<ratio_to_int>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
cvtsi2sdl -0xc(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xede(%rip),%xmm1
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ratio_to_int>:
cvtsi2sd %edi,%xmm1
mulsd  %xmm0,%xmm1
addsd  0xef0(%rip),%xmm1
cvttsd2si %xmm1,%eax
ret

LLVM IR (-O0):
define i32 @ratio_to_int(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load double, double* %3
%6 = load i32, i32* %4
%7 = sitofp i32 %6 to double
%8 = call double @llvm.fmuladd.f64(double %5, double %7, double 5.000000e-01)
%9 = fptosi double %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @ratio_to_int(double %0, i32 %1) {
%3 = sitofp i32 %1 to double
%4 = tail call double @llvm.fmuladd.f64(double %0, double %3, double 5.000000e-01)
%5 = fptosi double %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ vecNf_add_new(float *, float *, float const *, int const);
void vecNf_add(float a[], const float b[], const int n) {
  vecNf_add_new(a, a, b, n);
}


x86 assembly (clang, -O0):
<vecNf_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
call   1030 <vecNf_add_new@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vecNf_add>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
jmp    1030 <vecNf_add_new@plt>

LLVM IR (-O0):
define void @vecNf_add(float* %0, float* %1, i32 %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca i32
store float* %0, float** %4
store float* %1, float** %5
store i32 %2, i32* %6
%7 = load float*, float** %4
%8 = load float*, float** %4
%9 = load float*, float** %5
%10 = load i32, i32* %6
%11 = call i32 @vecNf_add_new(float* %7, float* %8, float* %9, i32 %10)
ret void
}

LLVM IR (-O2):
define void @vecNf_add(float* %0, float* %1, i32 %2) {
%4 = tail call i32 @vecNf_add_new(float* %0, float* %0, float* %1, i32 %2)
ret void
}
int Derecha(int x) { return ((x + 1) % 5); }


x86 assembly (clang, -O0):
<Derecha>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    $0x5,%ecx
cltd
idiv   %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Derecha>:
add    $0x1,%edi
movslq %edi,%rax
imul   $0x66666667,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x21,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @Derecha(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
%5 = srem i32 %4, 5
ret i32 %5
}

LLVM IR (-O2):
define i32 @Derecha(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = srem i32 %2, 5
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ FLASH_erase_range(int /*<<< orphan*/, int);
int /*<<< orphan*/ FLASH_turn_off();
int /*<<< orphan*/ FLASH_turn_on();
void debug_FLASH_erase_test() {
  FLASH_turn_on();
  FLASH_erase_range(0, 1023);
  FLASH_turn_off();
}


x86 assembly (clang, -O0):
<debug_FLASH_erase_test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FLASH_turn_on@plt>
xor    %edi,%edi
mov    $0x3ff,%esi
call   1050 <FLASH_erase_range@plt>
mov    $0x0,%al
call   1040 <FLASH_turn_off@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_FLASH_erase_test>:
push   %rax
xor    %eax,%eax
call   1030 <FLASH_turn_on@plt>
xor    %edi,%edi
mov    $0x3ff,%esi
call   1050 <FLASH_erase_range@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <FLASH_turn_off@plt>

LLVM IR (-O0):
define void @debug_FLASH_erase_test() {
%1 = call i32 (...) @FLASH_turn_on()
%2 = call i32 @FLASH_erase_range(i32 0, i32 1023)
%3 = call i32 (...) @FLASH_turn_off()
ret void
}

LLVM IR (-O2):
define void @debug_FLASH_erase_test() {
%1 = tail call i32 (...) @FLASH_turn_on()
%2 = tail call i32 @FLASH_erase_range(i32 0, i32 1023)
%3 = tail call i32 (...) @FLASH_turn_off()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ isal_deflate_hash_base(int /*<<< orphan*/ *,
                                          int /*<<< orphan*/,
                                          int /*<<< orphan*/,
                                          int /*<<< orphan*/ *,
                                          int /*<<< orphan*/);
void isal_deflate_hash_lvl3(uint16_t *hash_table, uint32_t hash_mask,
                            uint32_t current_index, uint8_t *dict,
                            uint32_t dict_len) {
  isal_deflate_hash_base(hash_table, hash_mask, current_index, dict, dict_len);
}


x86 assembly (clang, -O0):
<isal_deflate_hash_lvl3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
call   1030 <isal_deflate_hash_base@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isal_deflate_hash_lvl3>:
jmp    1030 <isal_deflate_hash_base@plt>

LLVM IR (-O0):
define void @isal_deflate_hash_lvl3(i32* %0, i32 %1, i32 %2, i32* %3, i32 %4) {
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32*
%10 = alloca i32
store i32* %0, i32** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32* %3, i32** %9
store i32 %4, i32* %10
%11 = load i32*, i32** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32*, i32** %9
%15 = load i32, i32* %10
%16 = call i32 @isal_deflate_hash_base(i32* %11, i32 %12, i32 %13, i32* %14, i32 %15)
ret void
}

LLVM IR (-O2):
define void @isal_deflate_hash_lvl3(i32* %0, i32 %1, i32 %2, i32* %3, i32 %4) {
%6 = tail call i32 @isal_deflate_hash_base(i32* %0, i32 %1, i32 %2, i32* %3, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LED_INIT(int);
void init_light(void) {
  LED_INIT(2);
  {};
}


x86 assembly (clang, -O0):
<init_light>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <LED_INIT@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_light>:
mov    $0x2,%edi
jmp    1030 <LED_INIT@plt>

LLVM IR (-O0):
define void @init_light() {
%1 = call i32 @LED_INIT(i32 2)
ret void
}

LLVM IR (-O2):
define void @init_light() {
%1 = tail call i32 @LED_INIT(i32 2)
ret void
}
float __min(float a, float b) {
  if (a < b)
    return a;
  else
    return b;
}


x86 assembly (clang, -O0):
<__min>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1130 <__min+0x30>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    113a <__min+0x3a>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<__min>:
minss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @__min(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fcmp olt float %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load float, float* %4
store float %10, float* %3
br label %13
11: ; preds = %2
%12 = load float, float* %5
store float %12, float* %3
br label %13
13: ; preds = %11, %9
%14 = load float, float* %3
ret float %14
}

LLVM IR (-O2):
define float @__min(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
/* Type definitions */
struct forf_env {
  int dummy;
};

/* Variables and functions */
long forf_pop_num(struct forf_env *);
int /*<<< orphan*/ forf_push_num(struct forf_env *, long);
void forf_proc_and(struct forf_env *env) {
  long a = forf_pop_num(env);
  long b = forf_pop_num(env);
  forf_push_num(env, b & a);
}


x86 assembly (clang, -O0):
<forf_proc_and>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <forf_pop_num@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <forf_pop_num@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
and    -0x10(%rbp),%rsi
call   1040 <forf_push_num@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<forf_proc_and>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <forf_pop_num@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <forf_pop_num@plt>
and    %rax,%rbx
mov    %r14,%rdi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <forf_push_num@plt>

LLVM IR (-O0):
%struct.forf_env = type { i32 }
define void @forf_proc_and(%struct.forf_env* %0) {
%2 = alloca %struct.forf_env*
%3 = alloca i64
%4 = alloca i64
store %struct.forf_env* %0, %struct.forf_env** %2
%5 = load %struct.forf_env*, %struct.forf_env** %2
%6 = call i64 @forf_pop_num(%struct.forf_env* %5)
store i64 %6, i64* %3
%7 = load %struct.forf_env*, %struct.forf_env** %2
%8 = call i64 @forf_pop_num(%struct.forf_env* %7)
store i64 %8, i64* %4
%9 = load %struct.forf_env*, %struct.forf_env** %2
%10 = load i64, i64* %4
%11 = load i64, i64* %3
%12 = and i64 %10, %11
%13 = call i32 @forf_push_num(%struct.forf_env* %9, i64 %12)
ret void
}

LLVM IR (-O2):
%struct.forf_env = type { i32 }
define void @forf_proc_and(%struct.forf_env* %0) {
%2 = tail call i64 @forf_pop_num(%struct.forf_env* %0)
%3 = tail call i64 @forf_pop_num(%struct.forf_env* %0)
%4 = and i64 %3, %2
%5 = tail call i32 @forf_push_num(%struct.forf_env* %0, i64 %4)
ret void
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_poly1305_selectznz(uintptr_t, uintptr_t,
                                                    uintptr_t, uintptr_t);
void fiat_poly1305_selectznz(uint32_t out1[5], uint8_t arg1,
                             const uint32_t arg2[5], const uint32_t arg3[5]) {
  internal_fiat_poly1305_selectznz((uintptr_t)out1, (uintptr_t)arg1,
                                   (uintptr_t)arg2, (uintptr_t)arg3);
}


x86 assembly (clang, -O0):
<fiat_poly1305_selectznz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <internal_fiat_poly1305_selectznz@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_poly1305_selectznz>:
jmp    1030 <internal_fiat_poly1305_selectznz@plt>

LLVM IR (-O0):
define void @fiat_poly1305_selectznz(i32* %0, i64 %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store i64 %1, i64* %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = ptrtoint i32* %9 to i64
%11 = load i64, i64* %6
%12 = load i32*, i32** %7
%13 = ptrtoint i32* %12 to i64
%14 = load i32*, i32** %8
%15 = ptrtoint i32* %14 to i64
%16 = call i32 @internal_fiat_poly1305_selectznz(i64 %10, i64 %11, i64 %13, i64 %15)
ret void
}

LLVM IR (-O2):
define void @fiat_poly1305_selectznz(i32* %0, i64 %1, i32* %2, i32* %3) {
%5 = ptrtoint i32* %0 to i64
%6 = ptrtoint i32* %2 to i64
%7 = ptrtoint i32* %3 to i64
%8 = tail call i32 @internal_fiat_poly1305_selectznz(i64 %5, i64 %1, i64 %6, i64 %7)
ret void
}
void foo376(int p) {}


x86 assembly (clang, -O0):
<foo376>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo376>:
ret

LLVM IR (-O0):
define void @foo376(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo376(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ pthread_exit(void *);
int /*<<< orphan*/ sleep(int);
void *thr_fn2(void *arg) {
  printf("thread 2 exiting\n");
  sleep(3);
  pthread_exit((void *)2000);
}


x86 assembly (clang, -O0):
<thr_fn2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
lea    0xebd(%rip),%rdi
call   1030 <printf@plt>
mov    $0x3,%edi
call   1050 <sleep@plt>
mov    $0x7d0,%edi
call   1040 <pthread_exit@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thr_fn2>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x3,%edi
call   1050 <sleep@plt>
mov    $0x7d0,%edi
pop    %rax
jmp    1040 <pthread_exit@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"thread 2 exiting\0A\00"
define i8* @thr_fn2(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @sleep(i32 3)
%6 = call i32 @pthread_exit(i8* inttoptr (i64 2000 to i8*))
%7 = load i8*, i8** %2
ret i8* %7
}

LLVM IR (-O2):
@str = [17 x i8] c"thread 2 exiting\00"
define noalias i8* @thr_fn2(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([17 x i8], [17 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @sleep(i32 3)
%4 = tail call i32 @pthread_exit(i8* inttoptr (i64 2000 to i8*))
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void caml_gr_blit_image() { exit(1); }


x86 assembly (clang, -O0):
<caml_gr_blit_image>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<caml_gr_blit_image>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @caml_gr_blit_image() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @caml_gr_blit_image() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
void xxx(int argc) {
  int x;
#pragma omp atomic read
  argc = x;
}


x86 assembly (clang, -O0):
<xxx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<xxx>:
ret

LLVM IR (-O0):
define void @xxx(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %3
store i32 %4, i32* %2
ret void
}

LLVM IR (-O2):
define void @xxx(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_char;

/* Variables and functions */
int inet_cidr_pton_ipv6(char const *, int /*<<< orphan*/ *, int);
int inet_net_pton_ipv6(const char *src, u_char *dst) {
  return inet_cidr_pton_ipv6(src, dst, 16);
}


x86 assembly (clang, -O0):
<inet_net_pton_ipv6>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x10,%edx
call   1030 <inet_cidr_pton_ipv6@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inet_net_pton_ipv6>:
mov    $0x10,%edx
jmp    1030 <inet_cidr_pton_ipv6@plt>

LLVM IR (-O0):
define i32 @inet_net_pton_ipv6(i8* %0, i32* %1) {
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
store i32* %1, i32** %4
%5 = load i8*, i8** %3
%6 = load i32*, i32** %4
%7 = call i32 @inet_cidr_pton_ipv6(i8* %5, i32* %6, i32 16)
ret i32 %7
}

LLVM IR (-O2):
define i32 @inet_net_pton_ipv6(i8* %0, i32* %1) {
%3 = tail call i32 @inet_cidr_pton_ipv6(i8* %0, i32* %1, i32 16)
ret i32 %3
}
int max3i(int x, int y, int z) {
  return (z > y) ? ((z > x) ? z : x) : ((y > x) ? y : x);
}


x86 assembly (clang, -O0):
<max3i>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1141 <max3i+0x41>
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jle    1130 <max3i+0x30>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1136 <max3i+0x36>
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1164 <max3i+0x64>
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jle    1158 <max3i+0x58>
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
jmp    115e <max3i+0x5e>
mov    -0x4(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<max3i>:
mov    %edi,%eax
cmp    %edi,%edx
cmovg  %edx,%eax
cmp    %esi,%eax
cmovle %esi,%eax
ret

LLVM IR (-O0):
define i32 @max3i(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %5
%9 = icmp sgt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %3
%11 = load i32, i32* %6
%12 = load i32, i32* %4
%13 = icmp sgt i32 %11, %12
br i1 %13, label %14, label %16
14: ; preds = %10
%15 = load i32, i32* %6
br label %18
16: ; preds = %10
%17 = load i32, i32* %4
br label %18
18: ; preds = %16, %14
%19 = phi i32 [ %15, %14 ], [ %17, %16 ]
br label %30
20: ; preds = %3
%21 = load i32, i32* %5
%22 = load i32, i32* %4
%23 = icmp sgt i32 %21, %22
br i1 %23, label %24, label %26
24: ; preds = %20
%25 = load i32, i32* %5
br label %28
26: ; preds = %20
%27 = load i32, i32* %4
br label %28
28: ; preds = %26, %24
%29 = phi i32 [ %25, %24 ], [ %27, %26 ]
br label %30
30: ; preds = %28, %18
%31 = phi i32 [ %19, %18 ], [ %29, %28 ]
ret i32 %31
}

LLVM IR (-O2):
define i32 @max3i(i32 %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, %0
%5 = select i1 %4, i32 %2, i32 %0
%6 = icmp sgt i32 %5, %1
%7 = select i1 %6, i32 %5, i32 %1
ret i32 %7
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t hash(void *data) {
  if (data == NULL) {
    return 0;
  }
  uint64_t h = (uintptr_t)data;
  uint64_t res = (h >> 20) ^ (h >> 12);
  return res ^ (res >> 7) ^ (res >> 4);
}


x86 assembly (clang, -O0):
<hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    111f <hash+0x1f>
movl   $0x0,-0x4(%rbp)
jmp    114d <hash+0x4d>
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
sar    $0x14,%eax
mov    -0x14(%rbp),%ecx
sar    $0xc,%ecx
xor    %ecx,%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    -0x18(%rbp),%ecx
sar    $0x7,%ecx
xor    %ecx,%eax
mov    -0x18(%rbp),%ecx
sar    $0x4,%ecx
xor    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash>:
test   %rdi,%rdi
je     111f <hash+0x1f>
mov    %rdi,%rax
mov    %eax,%ecx
sar    $0x14,%ecx
sar    $0xc,%eax
xor    %ecx,%eax
mov    %eax,%ecx
sar    $0x7,%ecx
xor    %eax,%ecx
sar    $0x4,%eax
xor    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hash(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %25
9: ; preds = %1
%10 = load i8*, i8** %3
%11 = ptrtoint i8* %10 to i64
%12 = trunc i64 %11 to i32
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = ashr i32 %13, 20
%15 = load i32, i32* %4
%16 = ashr i32 %15, 12
%17 = xor i32 %14, %16
store i32 %17, i32* %5
%18 = load i32, i32* %5
%19 = load i32, i32* %5
%20 = ashr i32 %19, 7
%21 = xor i32 %18, %20
%22 = load i32, i32* %5
%23 = ashr i32 %22, 4
%24 = xor i32 %21, %23
store i32 %24, i32* %2
br label %25
25: ; preds = %9, %8
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @hash(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = ptrtoint i8* %0 to i64
%5 = trunc i64 %4 to i32
%6 = ashr i32 %5, 20
%7 = ashr i32 %5, 12
%8 = xor i32 %6, %7
%9 = ashr i32 %8, 7
%10 = xor i32 %9, %8
%11 = ashr i32 %8, 4
%12 = xor i32 %10, %11
br label %13
13: ; preds = %1, %3
%14 = phi i32 [ %12, %3 ], [ 0, %1 ]
ret i32 %14
}
unsigned char ds1337_dec_to_bcd(unsigned char dec, unsigned char ten_bits) {
  unsigned char bcd;
  bcd = ((dec / 10) & 0xFF >> 8 - ten_bits) << 4;
  bcd += dec % 10;
  return bcd;
}


x86 assembly (clang, -O0):
<ds1337_dec_to_bcd>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
movzbl -0x2(%rbp),%edx
mov    $0x8,%ecx
sub    %edx,%ecx
mov    $0xff,%edx
sar    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
shl    $0x4,%eax
mov    %al,-0x3(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
movzbl -0x3(%rbp),%eax
add    %edx,%eax
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ds1337_dec_to_bcd>:
mov    $0x8,%cl
sub    %sil,%cl
mov    $0xff,%edx
shr    %cl,%edx
imul   $0xcd,%edi,%eax
shr    $0xb,%eax
lea    (%rax,%rax,1),%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %cl,%dil
and    %edx,%eax
shl    $0x4,%al
or     %dil,%al
ret

LLVM IR (-O0):
define zeroext i8 @ds1337_dec_to_bcd(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%6 = load i8, i8* %3
%7 = zext i8 %6 to i32
%8 = sdiv i32 %7, 10
%9 = load i8, i8* %4
%10 = zext i8 %9 to i32
%11 = sub nsw i32 8, %10
%12 = ashr i32 255, %11
%13 = and i32 %8, %12
%14 = shl i32 %13, 4
%15 = trunc i32 %14 to i8
store i8 %15, i8* %5
%16 = load i8, i8* %3
%17 = zext i8 %16 to i32
%18 = srem i32 %17, 10
%19 = load i8, i8* %5
%20 = zext i8 %19 to i32
%21 = add nsw i32 %20, %18
%22 = trunc i32 %21 to i8
store i8 %22, i8* %5
%23 = load i8, i8* %5
ret i8 %23
}

LLVM IR (-O2):
define zeroext i8 @ds1337_dec_to_bcd(i8 zeroext %0, i8 zeroext %1) {
%3 = udiv i8 %0, 10
%4 = zext i8 %1 to i32
%5 = sub nsw i32 8, %4
%6 = lshr i32 255, %5
%7 = urem i8 %0, 10
%8 = trunc i32 %6 to i8
%9 = and i8 %3, %8
%10 = shl i8 %9, 4
%11 = or i8 %10, %7
ret i8 %11
}
/* Variables and functions */
int smack_label_is_valid(char const *);
int smack_object_is_valid(const char *text) {
  return smack_label_is_valid(text);
}


x86 assembly (clang, -O0):
<smack_object_is_valid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <smack_label_is_valid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smack_object_is_valid>:
jmp    1030 <smack_label_is_valid@plt>

LLVM IR (-O0):
define i32 @smack_object_is_valid(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @smack_label_is_valid(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @smack_object_is_valid(i8* %0) {
%2 = tail call i32 @smack_label_is_valid(i8* %0)
ret i32 %2
}
/* Variables and functions */
char *calloc(scalar_t__, int);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *cubew_strdup(const char *str) {
  if (str == NULL)
    return NULL;
  char *new_str = calloc(strlen(str) + 1, 1);
  strcpy(new_str, str);
  return new_str;
}


x86 assembly (clang, -O0):
<cubew_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1154 <cubew_strdup+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1187 <cubew_strdup+0x57>
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
mov    $0x1,%esi
call   1050 <calloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cubew_strdup>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     115f <cubew_strdup+0x2f>
mov    %rdi,%rbx
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
mov    $0x1,%esi
call   1050 <calloc@plt>
mov    %rax,%r14
mov    %rax,%rdi
mov    %rbx,%rsi
call   1030 <strcpy@plt>
jmp    1162 <cubew_strdup+0x32>
xor    %r14d,%r14d
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @cubew_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* null, i8** %2
br label %17
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @strlen(i8* %9)
%11 = add nsw i64 %10, 1
%12 = call i8* @calloc(i64 %11, i32 1)
store i8* %12, i8** %4
%13 = load i8*, i8** %4
%14 = load i8*, i8** %3
%15 = call i32 @strcpy(i8* %13, i8* %14)
%16 = load i8*, i8** %4
store i8* %16, i8** %2
br label %17
17: ; preds = %8, %7
%18 = load i8*, i8** %2
ret i8* %18
}

LLVM IR (-O2):
define i8* @cubew_strdup(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = tail call i64 @strlen(i8* %0)
%5 = add nsw i64 %4, 1
%6 = tail call i8* @calloc(i64 %5, i32 1)
%7 = tail call i32 @strcpy(i8* %6, i8* %0)
br label %8
8: ; preds = %1, %3
%9 = phi i8* [ %6, %3 ], [ null, %1 ]
ret i8* %9
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ stdout;
int vfprintf(int /*<<< orphan*/, char const *, int /*<<< orphan*/);
int vprintf(const char *restrict fmt, va_list args) {
  return vfprintf(stdout, fmt, args);
}


x86 assembly (clang, -O0):
<vprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <vfprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vprintf>:
mov    %esi,%edx
mov    %rdi,%rsi
mov    0x2ec4(%rip),%rax
mov    (%rax),%edi
jmp    1030 <vfprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
define i32 @vprintf(i8* noalias %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @stdout
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i32 @vfprintf(i32 %5, i8* %6, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
@stdout = global i32 0
define i32 @vprintf(i8* noalias %0, i32 %1) {
%3 = load i32, i32* @stdout
%4 = tail call i32 @vfprintf(i32 %3, i8* %0, i32 %1)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ sscanf(char *, char *, int /*<<< orphan*/ *);
int /*<<< orphan*/ waitFrame(int, char *, int);
int waitAnswer(int sock, uint32_t *pValue) {
  char str[128];
  waitFrame(sock, str, 128);
  sscanf(str, "%u", pValue);
  return 0;
}


x86 assembly (clang, -O0):
<waitAnswer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x90(%rbp),%rsi
mov    $0x80,%edx
call   1040 <waitFrame@plt>
lea    -0x90(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xea8(%rip),%rsi
call   1030 <sscanf@plt>
xor    %eax,%eax
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<waitAnswer>:
push   %r14
push   %rbx
sub    $0x88,%rsp
mov    %rsi,%rbx
mov    %rsp,%r14
mov    %r14,%rsi
mov    $0x80,%edx
call   1040 <waitFrame@plt>
lea    0xebc(%rip),%rsi
mov    %r14,%rdi
mov    %rbx,%rdx
call   1030 <sscanf@plt>
xor    %eax,%eax
add    $0x88,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%u\00"
define i32 @waitAnswer(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca [128 x i8]
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32, i32* %3
%7 = getelementptr inbounds [128 x i8], [128 x i8]* %5, i64 0, i64 0
%8 = call i32 @waitFrame(i32 %6, i8* %7, i32 128)
%9 = getelementptr inbounds [128 x i8], [128 x i8]* %5, i64 0, i64 0
%10 = load i32*, i32** %4
%11 = call i32 @sscanf(i8* %9, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%u\00"
define i32 @waitAnswer(i32 %0, i32* %1) {
%3 = alloca [128 x i8]
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%5 = call i32 @waitFrame(i32 %0, i8* %4, i32 128)
%6 = call i32 @sscanf(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
ret i32 0
}
int test_imm_A5int16_mem(short *val) {
  return ((*val) & (0xA5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A5int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xa5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A5int16_mem>:
testb  $0xa5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A5int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 165
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_A5int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 165
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ SIG_DFL;
int /*<<< orphan*/ signal(int, int /*<<< orphan*/);
void sig_default(int sig) { signal(sig, SIG_DFL); }


x86 assembly (clang, -O0):
<sig_default>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_default>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
jmp    1030 <signal@plt>

LLVM IR (-O0):
@SIG_DFL = global i32 0
define void @sig_default(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIG_DFL
%5 = call i32 @signal(i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@SIG_DFL = global i32 0
define void @sig_default(i32 %0) {
%2 = load i32, i32* @SIG_DFL
%3 = tail call i32 @signal(i32 %0, i32 %2)
ret void
}