#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void EPIConfigGPModeSet(unsigned long ulBase, unsigned long ulConfig,
                        unsigned long ulFrameCount, unsigned long ulMaxWait) {
  DEBUG_ASSERT(ulBase == 0x400D0000);
  DEBUG_ASSERT(ulFrameCount < 16);
  DEBUG_ASSERT(ulMaxWait < 256);
  (*((volatile unsigned long *)(ulBase + 0x00000014))) =
      ((ulConfig & 0x00000100) ? 0x80000000 : 0);
  ulConfig &= ~0x03C00000;
  ulConfig |= ulFrameCount << 22;
  ulConfig &= ~0x0000FF00;
  ulConfig |= ulMaxWait << 8;
  (*((volatile unsigned long *)(ulBase + 0x00000010))) = ulConfig;
}


x86 assembly (clang, -O0):
<EPIConfigGPModeSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x400d0000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
cmpq   $0x10,-0x18(%rbp)
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
cmpq   $0x100,-0x20(%rbp)
setb   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rdx
and    $0x100,%rdx
xor    %eax,%eax
mov    $0x80000000,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %rcx,0x14(%rax)
mov    -0x10(%rbp),%rax
and    $0xfffffffffc3fffff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x16,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0xffffffffffff00ff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x20(%rbp),%rax
shl    $0x8,%rax
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x10(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EPIConfigGPModeSet>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%rbx
mov    %rsi,%r12
mov    %rdi,%r15
xor    %edi,%edi
cmp    $0x400d0000,%r15
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
xor    %edi,%edi
cmp    $0x10,%rbx
setb   %dil
call   1030 <DEBUG_ASSERT@plt>
xor    %edi,%edi
cmp    $0x100,%r14
setb   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    %r12d,%eax
and    $0x100,%eax
shl    $0x17,%rax
mov    %rax,0x14(%r15)
and    $0xfffffffffc3f00ff,%r12
shl    $0x16,%rbx
or     %r12,%rbx
shl    $0x8,%r14
or     %rbx,%r14
mov    %r14,0x10(%r15)
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @EPIConfigGPModeSet(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %5
%10 = icmp eq i64 %9, 1074593792
%11 = zext i1 %10 to i32
%12 = call i32 @DEBUG_ASSERT(i32 %11)
%13 = load i64, i64* %7
%14 = icmp ult i64 %13, 16
%15 = zext i1 %14 to i32
%16 = call i32 @DEBUG_ASSERT(i32 %15)
%17 = load i64, i64* %8
%18 = icmp ult i64 %17, 256
%19 = zext i1 %18 to i32
%20 = call i32 @DEBUG_ASSERT(i32 %19)
%21 = load i64, i64* %6
%22 = and i64 %21, 256
%23 = icmp ne i64 %22, 0
%24 = zext i1 %23 to i64
%25 = select i1 %23, i32 -2147483648, i32 0
%26 = zext i32 %25 to i64
%27 = load i64, i64* %5
%28 = add i64 %27, 20
%29 = inttoptr i64 %28 to i64*
store volatile i64 %26, i64* %29
%30 = load i64, i64* %6
%31 = and i64 %30, -62914561
store i64 %31, i64* %6
%32 = load i64, i64* %7
%33 = shl i64 %32, 22
%34 = load i64, i64* %6
%35 = or i64 %34, %33
store i64 %35, i64* %6
%36 = load i64, i64* %6
%37 = and i64 %36, -65281
store i64 %37, i64* %6
%38 = load i64, i64* %8
%39 = shl i64 %38, 8
%40 = load i64, i64* %6
%41 = or i64 %40, %39
store i64 %41, i64* %6
%42 = load i64, i64* %6
%43 = load i64, i64* %5
%44 = add i64 %43, 16
%45 = inttoptr i64 %44 to i64*
store volatile i64 %42, i64* %45
ret void
}

LLVM IR (-O2):
define void @EPIConfigGPModeSet(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = icmp eq i64 %0, 1074593792
%6 = zext i1 %5 to i32
%7 = tail call i32 @DEBUG_ASSERT(i32 %6)
%8 = icmp ult i64 %2, 16
%9 = zext i1 %8 to i32
%10 = tail call i32 @DEBUG_ASSERT(i32 %9)
%11 = icmp ult i64 %3, 256
%12 = zext i1 %11 to i32
%13 = tail call i32 @DEBUG_ASSERT(i32 %12)
%14 = shl i64 %1, 23
%15 = and i64 %14, 2147483648
%16 = add i64 %0, 20
%17 = inttoptr i64 %16 to i64*
store volatile i64 %15, i64* %17
%18 = and i64 %1, -62979841
%19 = shl i64 %2, 22
%20 = or i64 %19, %18
%21 = shl i64 %3, 8
%22 = or i64 %20, %21
%23 = add i64 %0, 16
%24 = inttoptr i64 %23 to i64*
store volatile i64 %22, i64* %24
ret void
}