xunge/DecIR huggingface dataset:
int diskfs_volume_close(struct fs_volume *v) { return 0; }


x86 assembly (clang, -O0):
<diskfs_volume_close>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<diskfs_volume_close>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.fs_volume = type opaque
define i32 @diskfs_volume_close(%struct.fs_volume* %0) {
%2 = alloca %struct.fs_volume*
store %struct.fs_volume* %0, %struct.fs_volume** %2
ret i32 0
}

LLVM IR (-O2):
%struct.fs_volume = type opaque
define i32 @diskfs_volume_close(%struct.fs_volume* nocapture readnone %0) {
ret i32 0
}
void ff_hevc_put_hevc_bi_w_qpel_hv12_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_qpel_hv12_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_qpel_hv12_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_qpel_hv12_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_qpel_hv12_12_sse4() {
ret void
}
int is_sorted(int *a, int n) {
  int i;
  for (i = 1; i < n; i++) {
    if (a[i] < a[i - 1]) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_sorted>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
movl   $0x1,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115e <is_sorted+0x5e>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%edx
sub    $0x1,%edx
movslq %edx,%rdx
cmp    (%rcx,%rdx,4),%eax
jge    114b <is_sorted+0x4b>
movl   $0x0,-0x4(%rbp)
jmp    1165 <is_sorted+0x65>
jmp    1150 <is_sorted+0x50>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1112 <is_sorted+0x12>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_sorted>:
mov    $0x1,%eax
cmp    $0x2,%esi
jl     1132 <is_sorted+0x32>
mov    %esi,%r8d
mov    (%rdi),%edx
mov    $0x1,%esi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %edx,%ecx
mov    (%rdi,%rsi,4),%edx
cmp    %ecx,%edx
jl     1133 <is_sorted+0x33>
add    $0x1,%rsi
cmp    %rsi,%r8
jne    1120 <is_sorted+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_sorted(i32* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 1, i32* %6
br label %7
7: ; preds = %26, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %5
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %29
11: ; preds = %7
%12 = load i32*, i32** %4
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = load i32*, i32** %4
%18 = load i32, i32* %6
%19 = sub nsw i32 %18, 1
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %17, i64 %20
%22 = load i32, i32* %21
%23 = icmp slt i32 %16, %22
br i1 %23, label %24, label %25
24: ; preds = %11
store i32 0, i32* %3
br label %30
25: ; preds = %11
br label %26
26: ; preds = %25
%27 = load i32, i32* %6
%28 = add nsw i32 %27, 1
store i32 %28, i32* %6
br label %7
29: ; preds = %7
store i32 1, i32* %3
br label %30
30: ; preds = %29, %24
%31 = load i32, i32* %3
ret i32 %31
}

LLVM IR (-O2):
define i32 @is_sorted(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %4, label %16
4: ; preds = %2
%5 = zext i32 %1 to i64
%6 = load i32, i32* %0
br label %9
7: ; preds = %9
%8 = icmp eq i64 %15, %5
br i1 %8, label %16, label %9
9: ; preds = %4, %7
%10 = phi i32 [ %6, %4 ], [ %13, %7 ]
%11 = phi i64 [ 1, %4 ], [ %15, %7 ]
%12 = getelementptr inbounds i32, i32* %0, i64 %11
%13 = load i32, i32* %12
%14 = icmp slt i32 %13, %10
%15 = add nuw nsw i64 %11, 1
br i1 %14, label %16, label %7
16: ; preds = %9, %7, %2
%17 = phi i32 [ 1, %2 ], [ 1, %7 ], [ 0, %9 ]
ret i32 %17
}
int succeed(void) { return 0; }


x86 assembly (clang, -O0):
<succeed>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<succeed>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @succeed() {
ret i32 0
}

LLVM IR (-O2):
define i32 @succeed() {
ret i32 0
}
int ft_divide(int a, int b) { return (a / b); }


x86 assembly (clang, -O0):
<ft_divide>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_divide>:
mov    %edi,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @ft_divide(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sdiv i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @ft_divide(i32 %0, i32 %1) {
%3 = sdiv i32 %0, %1
ret i32 %3
}
int do_576() { return 576; }


x86 assembly (clang, -O0):
<do_576>:
push   %rbp
mov    %rsp,%rbp
mov    $0x240,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_576>:
mov    $0x240,%eax
ret

LLVM IR (-O0):
define i32 @do_576() {
ret i32 576
}

LLVM IR (-O2):
define i32 @do_576() {
ret i32 576
}
int binomial(int a, int b) {
  int temp1, temp2;
  if ((b == 0) || (a == b)) {
    return 1;
  } else {
    temp1 = binomial(a - 1, b);
    temp2 = binomial(a - 1, b - 1);
    return temp1 + temp2;
  }
}


x86 assembly (clang, -O0):
<binomial>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1134 <binomial+0x24>
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jne    1140 <binomial+0x30>
movl   $0x1,-0x4(%rbp)
jmp    116e <binomial+0x5e>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0xc(%rbp),%esi
call   1030 <binomial@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
call   1030 <binomial@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<binomial>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    $0x1,%eax
test   %esi,%esi
je     1157 <binomial+0x47>
mov    %esi,%r14d
mov    %edi,%r15d
cmp    %esi,%edi
je     1157 <binomial+0x47>
xor    %eax,%eax
mov    %r14d,%ebx
mov    %eax,%r12d
lea    -0x1(%r15),%ebp
mov    %ebp,%edi
mov    %r14d,%esi
call   1030 <binomial@plt>
add    %r12d,%eax
add    $0xffffffff,%ebx
je     1154 <binomial+0x44>
cmp    %r14d,%r15d
mov    %ebx,%r14d
mov    %ebp,%r15d
jne    1130 <binomial+0x20>
add    $0x1,%eax
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @binomial(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%8 = load i32, i32* %5
%9 = icmp eq i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %2
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = icmp eq i32 %11, %12
br i1 %13, label %14, label %15
14: ; preds = %10, %2
store i32 1, i32* %3
br label %28
15: ; preds = %10
%16 = load i32, i32* %4
%17 = sub nsw i32 %16, 1
%18 = load i32, i32* %5
%19 = call i32 @binomial(i32 %17, i32 %18)
store i32 %19, i32* %6
%20 = load i32, i32* %4
%21 = sub nsw i32 %20, 1
%22 = load i32, i32* %5
%23 = sub nsw i32 %22, 1
%24 = call i32 @binomial(i32 %21, i32 %23)
store i32 %24, i32* %7
%25 = load i32, i32* %6
%26 = load i32, i32* %7
%27 = add nsw i32 %25, %26
store i32 %27, i32* %3
br label %28
28: ; preds = %15, %14
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @binomial(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = icmp eq i32 %0, %1
%5 = or i1 %3, %4
br i1 %5, label %19, label %6
6: ; preds = %2, %6
%7 = phi i32 [ %12, %6 ], [ %1, %2 ]
%8 = phi i32 [ %10, %6 ], [ %0, %2 ]
%9 = phi i32 [ %13, %6 ], [ 0, %2 ]
%10 = add nsw i32 %8, -1
%11 = tail call i32 @binomial(i32 %10, i32 %7)
%12 = add nsw i32 %7, -1
%13 = add nsw i32 %11, %9
%14 = icmp eq i32 %12, 0
%15 = icmp eq i32 %8, %7
%16 = or i1 %14, %15
br i1 %16, label %17, label %6
17: ; preds = %6
%18 = add i32 %13, 1
br label %19
19: ; preds = %17, %2
%20 = phi i32 [ 1, %2 ], [ %18, %17 ]
ret i32 %20
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int kill(pid_t a __attribute__((unused)), int b __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<kill>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kill>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @kill(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @kill(i32 %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ eq(float const, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char const *, float const);
void printNumberIfNotZero(const char *str, const float number) {
  if (!eq(number, 0)) {
    printf("%s: %g, ", str, number);
  }
}


x86 assembly (clang, -O0):
<printNumberIfNotZero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
xor    %edi,%edi
call   1040 <eq@plt>
cmp    $0x0,%eax
jne    115b <printNumberIfNotZero+0x3b>
mov    -0x8(%rbp),%rsi
movss  -0xc(%rbp),%xmm0
lea    0xeaa(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printNumberIfNotZero>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
movss  %xmm0,0xc(%rsp)
xor    %edi,%edi
call   1040 <eq@plt>
test   %eax,%eax
je     113f <printNumberIfNotZero+0x1f>
add    $0x10,%rsp
pop    %rbx
ret
lea    0xeba(%rip),%rdi
mov    %rbx,%rsi
movss  0xc(%rsp),%xmm0
add    $0x10,%rsp
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"%s: %g, \00"
define void @printNumberIfNotZero(i8* %0, float %1) {
%3 = alloca i8*
%4 = alloca float
store i8* %0, i8** %3
store float %1, float* %4
%5 = load float, float* %4
%6 = call i32 @eq(float %5, i32 0)
%7 = icmp ne i32 %6, 0
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = load float, float* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %9, float %10)
br label %12
12: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"%s: %g, \00"
define void @printNumberIfNotZero(i8* %0, float %1) {
%3 = tail call i32 @eq(float %1, i32 0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %0, float %1)
br label %7
7: ; preds = %5, %2
ret void
}
__int128 addreg(__int128 a, __int128 b) { return a + b; }


x86 assembly (clang, -O0):
<addreg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdx,%rax
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rdx
mov    -0x18(%rbp),%rsi
mov    %rax,-0x30(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x30(%rbp),%rax
mov    -0x28(%rbp),%rcx
mov    %rsi,-0x38(%rbp)
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x48(%rbp)
mov    %rax,-0x50(%rbp)
mov    -0x40(%rbp),%rcx
mov    -0x38(%rbp),%rax
mov    -0x50(%rbp),%rsi
mov    -0x48(%rbp),%rdx
add    %rsi,%rcx
adc    %rdx,%rax
mov    %rcx,-0x10(%rbp)
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
pop    %rbp
ret

x86 assembly (clang, -O2):
<addreg>:
mov    %rdi,%rax
add    %rdx,%rax
adc    %rcx,%rsi
mov    %rsi,%rdx
ret

LLVM IR (-O0):
define { i64, i64 } @addreg(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i128
%6 = alloca i128
%7 = alloca i128
%8 = alloca i128
%9 = alloca i128
%10 = bitcast i128* %6 to { i64, i64 }*
%11 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %10, i32 0, i32 0
store i64 %0, i64* %11
%12 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %10, i32 0, i32 1
store i64 %1, i64* %12
%13 = load i128, i128* %6
%14 = bitcast i128* %7 to { i64, i64 }*
%15 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %14, i32 0, i32 0
store i64 %2, i64* %15
%16 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %14, i32 0, i32 1
store i64 %3, i64* %16
%17 = load i128, i128* %7
store i128 %13, i128* %8
store i128 %17, i128* %9
%18 = load i128, i128* %8
%19 = load i128, i128* %9
%20 = add nsw i128 %18, %19
store i128 %20, i128* %5
%21 = bitcast i128* %5 to { i64, i64 }*
%22 = load { i64, i64 }, { i64, i64 }* %21
ret { i64, i64 } %22
}

LLVM IR (-O2):
define { i64, i64 } @addreg(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = zext i64 %1 to i128
%6 = shl nuw i128 %5, 64
%7 = zext i64 %0 to i128
%8 = zext i64 %3 to i128
%9 = shl nuw i128 %8, 64
%10 = zext i64 %2 to i128
%11 = or i128 %6, %7
%12 = add i128 %11, %10
%13 = add i128 %12, %9
%14 = trunc i128 %13 to i64
%15 = lshr i128 %13, 64
%16 = trunc i128 %15 to i64
%17 = insertvalue { i64, i64 } poison, i64 %14, 0
%18 = insertvalue { i64, i64 } %17, i64 %16, 1
ret { i64, i64 } %18
}
void print_sprite(int p) {
  ;
  ;
  ;
  ;
  ;
  ;
  ;
  ;
  ;
  ;
  ;
  ;
  ;
}


x86 assembly (clang, -O0):
<print_sprite>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_sprite>:
ret

LLVM IR (-O0):
define void @print_sprite(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @print_sprite(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Arc171(long, long, long, long, double, double,
                          unsigned long);
void arc(long x, long y, long rx, long ry, double sa, double ea,
         unsigned long c) {
  Arc171(x, y, rx, ry, sa, ea, c);
}


x86 assembly (clang, -O0):
<arc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
movsd  %xmm0,-0x28(%rbp)
movsd  %xmm1,-0x30(%rbp)
mov    %r8,-0x38(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
movsd  -0x28(%rbp),%xmm0
movsd  -0x30(%rbp),%xmm1
mov    -0x38(%rbp),%r8
call   1030 <Arc171@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arc>:
jmp    1030 <Arc171@plt>

LLVM IR (-O0):
define void @arc(i64 %0, i64 %1, i64 %2, i64 %3, double %4, double %5, i64 %6) {
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
%12 = alloca double
%13 = alloca double
%14 = alloca i64
store i64 %0, i64* %8
store i64 %1, i64* %9
store i64 %2, i64* %10
store i64 %3, i64* %11
store double %4, double* %12
store double %5, double* %13
store i64 %6, i64* %14
%15 = load i64, i64* %8
%16 = load i64, i64* %9
%17 = load i64, i64* %10
%18 = load i64, i64* %11
%19 = load double, double* %12
%20 = load double, double* %13
%21 = load i64, i64* %14
%22 = call i32 @Arc171(i64 %15, i64 %16, i64 %17, i64 %18, double %19, double %20, i64 %21)
ret void
}

LLVM IR (-O2):
define void @arc(i64 %0, i64 %1, i64 %2, i64 %3, double %4, double %5, i64 %6) {
%8 = tail call i32 @Arc171(i64 %0, i64 %1, i64 %2, i64 %3, double %4, double %5, i64 %6)
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t bin_to_hex(uint8_t bin) {
  if (bin < 10) {
    return '0' + bin;
  }
  if ((bin >= 10) && (bin < 16)) {
    return 'A' + bin - 10;
  }
  return '0';
}


x86 assembly (clang, -O0):
<bin_to_hex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    111f <bin_to_hex+0x1f>
mov    -0x8(%rbp),%eax
add    $0x30,%eax
mov    %eax,-0x4(%rbp)
jmp    114b <bin_to_hex+0x4b>
cmpl   $0xa,-0x8(%rbp)
jl     1144 <bin_to_hex+0x44>
cmpl   $0x10,-0x8(%rbp)
jge    1144 <bin_to_hex+0x44>
mov    -0x8(%rbp),%eax
add    $0x41,%eax
sub    $0xa,%eax
mov    %eax,-0x4(%rbp)
jmp    114b <bin_to_hex+0x4b>
movl   $0x30,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bin_to_hex>:
lea    0x37(%rdi),%ecx
cmp    $0x10,%edi
mov    $0x30,%eax
cmovl  %ecx,%eax
lea    0x30(%rdi),%ecx
cmp    $0xa,%edi
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @bin_to_hex(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = add nsw i32 48, %7
store i32 %8, i32* %2
br label %20
9: ; preds = %1
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 10
br i1 %11, label %12, label %19
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp slt i32 %13, 16
br i1 %14, label %15, label %19
15: ; preds = %12
%16 = load i32, i32* %3
%17 = add nsw i32 65, %16
%18 = sub nsw i32 %17, 10
store i32 %18, i32* %2
br label %20
19: ; preds = %12, %9
store i32 48, i32* %2
br label %20
20: ; preds = %19, %15, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @bin_to_hex(i32 %0) {
%2 = icmp slt i32 %0, 10
%3 = add nsw i32 %0, 48
%4 = icmp slt i32 %0, 16
%5 = add nsw i32 %0, 55
%6 = select i1 %4, i32 %5, i32 48
%7 = select i1 %2, i32 %3, i32 %6
ret i32 %7
}
/* Variables and functions */
int booster_stat64(char const *, void *);
int stat64(const char *path, void *buf) { return booster_stat64(path, buf); }


x86 assembly (clang, -O0):
<stat64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <booster_stat64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stat64>:
jmp    1030 <booster_stat64@plt>

LLVM IR (-O0):
define i32 @stat64(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @booster_stat64(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @stat64(i8* %0, i8* %1) {
%3 = tail call i32 @booster_stat64(i8* %0, i8* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ dlclose(void *);
void os_dlclose(void *module) { dlclose(module); }


x86 assembly (clang, -O0):
<os_dlclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dlclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_dlclose>:
jmp    1030 <dlclose@plt>

LLVM IR (-O0):
define void @os_dlclose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @dlclose(i8* %3)
ret void
}

LLVM IR (-O2):
define void @os_dlclose(i8* %0) {
%2 = tail call i32 @dlclose(i8* %0)
ret void
}
void test_double(double *data) {
#pragma omp simd
  for (int i = 0; i < 128 / sizeof(double); ++i)
    data[i] = 3.0;
}


x86 assembly (clang, -O0):
<test_double>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movslq -0xc(%rbp),%rax
cmp    $0x10,%rax
jae    1140 <test_double+0x40>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsd  0xed3(%rip),%xmm0
movsd  %xmm0,(%rax,%rcx,8)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <test_double+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_double>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,(%rdi)
movups %xmm0,0x10(%rdi)
movups %xmm0,0x20(%rdi)
movups %xmm0,0x30(%rdi)
movups %xmm0,0x40(%rdi)
movups %xmm0,0x50(%rdi)
movups %xmm0,0x60(%rdi)
movups %xmm0,0x70(%rdi)
ret

LLVM IR (-O0):
define void @test_double(double* %0) {
%2 = alloca double*
%3 = alloca i32
store double* %0, double** %2
store i32 0, i32* %3
br label %4
4: ; preds = %13, %1
%5 = load i32, i32* %3
%6 = sext i32 %5 to i64
%7 = icmp ult i64 %6, 16
br i1 %7, label %8, label %16
8: ; preds = %4
%9 = load double*, double** %2
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds double, double* %9, i64 %11
store double 3.000000e+00, double* %12
br label %13
13: ; preds = %8
%14 = load i32, i32* %3
%15 = add nsw i32 %14, 1
store i32 %15, i32* %3
br label %4
16: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @test_double(double* nocapture writeonly %0) {
%2 = bitcast double* %0 to <2 x double>*
store <2 x double> <double 3.000000e+00, double 3.000000e+00>, <2 x double>* %2
%3 = getelementptr inbounds double, double* %0, i64 2
%4 = bitcast double* %3 to <2 x double>*
store <2 x double> <double 3.000000e+00, double 3.000000e+00>, <2 x double>* %4
%5 = getelementptr inbounds double, double* %0, i64 4
%6 = bitcast double* %5 to <2 x double>*
store <2 x double> <double 3.000000e+00, double 3.000000e+00>, <2 x double>* %6
%7 = getelementptr inbounds double, double* %0, i64 6
%8 = bitcast double* %7 to <2 x double>*
store <2 x double> <double 3.000000e+00, double 3.000000e+00>, <2 x double>* %8
%9 = getelementptr inbounds double, double* %0, i64 8
%10 = bitcast double* %9 to <2 x double>*
store <2 x double> <double 3.000000e+00, double 3.000000e+00>, <2 x double>* %10
%11 = getelementptr inbounds double, double* %0, i64 10
%12 = bitcast double* %11 to <2 x double>*
store <2 x double> <double 3.000000e+00, double 3.000000e+00>, <2 x double>* %12
%13 = getelementptr inbounds double, double* %0, i64 12
%14 = bitcast double* %13 to <2 x double>*
store <2 x double> <double 3.000000e+00, double 3.000000e+00>, <2 x double>* %14
%15 = getelementptr inbounds double, double* %0, i64 14
%16 = bitcast double* %15 to <2 x double>*
store <2 x double> <double 3.000000e+00, double 3.000000e+00>, <2 x double>* %16
ret void
}
/* Variables and functions */
scalar_t__ fork();
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ wait(int /*<<< orphan*/);
int /*<<< orphan*/ write(int, char *, int);
main() {
  if (fork() == 0) {
    write(1, "child\n", 6);
    sleep(10);
  } else {
    wait(0);
    write(1, "parent\n", 7);
    sleep(10);
  }
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1060 <fork@plt>
cmp    $0x0,%rax
jne    1185 <main+0x45>
mov    $0x1,%edi
lea    0xe94(%rip),%rsi
mov    $0x6,%edx
call   1030 <write@plt>
mov    $0xa,%edi
call   1040 <sleep@plt>
jmp    11ac <main+0x6c>
xor    %edi,%edi
call   1050 <wait@plt>
mov    $0x1,%edi
lea    0xe6f(%rip),%rsi
mov    $0x7,%edx
call   1030 <write@plt>
mov    $0xa,%edi
call   1040 <sleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <fork@plt>
test   %rax,%rax
je     1167 <main+0x27>
xor    %edi,%edi
call   1050 <wait@plt>
lea    0xeac(%rip),%rsi
mov    $0x1,%edi
mov    $0x7,%edx
jmp    1178 <main+0x38>
lea    0xe92(%rip),%rsi
mov    $0x1,%edi
mov    $0x6,%edx
call   1030 <write@plt>
mov    $0xa,%edi
call   1040 <sleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"child\0A\00"
@.str.1 = [8 x i8] c"parent\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i64 (...) @fork()
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %0
%5 = call i32 @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 6)
%6 = call i32 @sleep(i32 10)
br label %11
7: ; preds = %0
%8 = call i32 @wait(i32 0)
%9 = call i32 @write(i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 7)
%10 = call i32 @sleep(i32 10)
br label %11
11: ; preds = %7, %4
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"child\0A\00"
@.str.1 = [8 x i8] c"parent\0A\00"
define i32 @main() {
%1 = tail call i64 (...) @fork()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 6)
br label %8
5: ; preds = %0
%6 = tail call i32 @wait(i32 0)
%7 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.1, i64 0, i64 0), i32 7)
br label %8
8: ; preds = %5, %3
%9 = tail call i32 @sleep(i32 10)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_subs_pu8(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 __attribute__((no, unused)) test(__m64 s1, __m64 s2) {
  return _mm_subs_pu8(s1, s2);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_subs_pu8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
jmp    1030 <_mm_subs_pu8@plt>

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_subs_pu8(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_subs_pu8(i32 %0, i32 %1)
ret i32 %3
}
void usleep(long microseconds) {
  int i = 0;
  for (i = 0; i < microseconds / 33; i++)
    ;
}


x86 assembly (clang, -O0):
<usleep>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0xc(%rbp)
movslq -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x21,%ecx
cqto
idiv   %rcx
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
jge    114f <usleep+0x4f>
jmp    1141 <usleep+0x41>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1116 <usleep+0x16>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usleep>:
ret

LLVM IR (-O0):
define void @usleep(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i32, i32* %3
%6 = sext i32 %5 to i64
%7 = load i64, i64* %2
%8 = sdiv i64 %7, 33
%9 = icmp slt i64 %6, %8
br i1 %9, label %10, label %14
10: ; preds = %4
br label %11
11: ; preds = %10
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @usleep(i64 %0) {
ret void
}
void caller_2_2_1_1_1_1_1() {}


x86 assembly (clang, -O0):
<caller_2_2_1_1_1_1_1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_2_2_1_1_1_1_1>:
ret

LLVM IR (-O0):
define void @caller_2_2_1_1_1_1_1() {
ret void
}

LLVM IR (-O2):
define void @caller_2_2_1_1_1_1_1() {
ret void
}
/* Variables and functions */
int dontGiveMeFive(int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("%d\n", dontGiveMeFive(4, 17));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x4,%edi
mov    $0x11,%esi
call   1040 <dontGiveMeFive@plt>
mov    %eax,%esi
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x4,%edi
mov    $0x11,%esi
call   1040 <dontGiveMeFive@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @dontGiveMeFive(i32 4, i32 17)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @dontGiveMeFive(i32 4, i32 17)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
void test45_Test10_pollen__run__E() {}


x86 assembly (clang, -O0):
<test45_Test10_pollen__run__E>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test45_Test10_pollen__run__E>:
ret

LLVM IR (-O0):
define void @test45_Test10_pollen__run__E() {
ret void
}

LLVM IR (-O2):
define void @test45_Test10_pollen__run__E() {
ret void
}
void imx_lluart_map_io(void) {}


x86 assembly (clang, -O0):
<imx_lluart_map_io>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<imx_lluart_map_io>:
ret

LLVM IR (-O0):
define void @imx_lluart_map_io() {
ret void
}

LLVM IR (-O2):
define void @imx_lluart_map_io() {
ret void
}
int is_alpha(char c) {
  if ((c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z') ||
      (c >= '0' && c <= '9'))
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<is_alpha>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1124 <is_alpha+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jle    1158 <is_alpha+0x58>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     113e <is_alpha+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jle    1158 <is_alpha+0x58>
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1164 <is_alpha+0x64>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jg     1164 <is_alpha+0x64>
movl   $0x1,-0x4(%rbp)
jmp    116b <is_alpha+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_alpha>:
mov    %edi,%eax
and    $0xdf,%al
add    $0xbf,%al
cmp    $0x1a,%al
setb   %al
add    $0xd0,%dil
cmp    $0xa,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_alpha(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %27, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 90
br i1 %18, label %27, label %19
19: ; preds = %15, %11
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sge i32 %21, 48
br i1 %22, label %23, label %28
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp sle i32 %25, 57
br i1 %26, label %27, label %28
27: ; preds = %23, %15, %7
store i32 1, i32* %2
br label %29
28: ; preds = %23, %19
store i32 0, i32* %2
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @is_alpha(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = add i8 %0, -48
%6 = icmp ult i8 %5, 10
%7 = or i1 %6, %4
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Type definitions */
struct generator {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ w(struct generator *, char *);
void generate_class_end(struct generator *g) {
  w(g, "~N}");
  w(g, "~N~N");
}


x86 assembly (clang, -O0):
<generate_class_end>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <w@plt>
mov    -0x8(%rbp),%rdi
lea    0xecd(%rip),%rsi
call   1030 <w@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<generate_class_end>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <w@plt>
lea    0xedd(%rip),%rsi
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <w@plt>

LLVM IR (-O0):
%struct.generator = type { i32 }
@.str = [4 x i8] c"~N}\00"
@.str.1 = [5 x i8] c"~N~N\00"
define void @generate_class_end(%struct.generator* %0) {
%2 = alloca %struct.generator*
store %struct.generator* %0, %struct.generator** %2
%3 = load %struct.generator*, %struct.generator** %2
%4 = call i32 @w(%struct.generator* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = load %struct.generator*, %struct.generator** %2
%6 = call i32 @w(%struct.generator* %5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.generator = type { i32 }
@.str = [4 x i8] c"~N}\00"
@.str.1 = [5 x i8] c"~N~N\00"
define void @generate_class_end(%struct.generator* %0) {
%2 = tail call i32 @w(%struct.generator* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @w(%struct.generator* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
uint32_t GPIOIntStatus(uint32_t ui32Port, bool bMasked) {
  ;
  if (bMasked) {
    return ((*((volatile uint32_t *)(ui32Port + 0x00000418))));
  } else {
    return ((*((volatile uint32_t *)(ui32Port + 0x00000414))));
  }
}


x86 assembly (clang, -O0):
<GPIOIntStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1129 <GPIOIntStatus+0x29>
mov    -0x10(%rbp),%rax
mov    0x418(%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    1138 <GPIOIntStatus+0x38>
mov    -0x10(%rbp),%rax
mov    0x414(%rax),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOIntStatus>:
mov    %rdi,-0x8(%rsp)
xor    %eax,%eax
test   %esi,%esi
setne  %al
mov    -0x8(%rsp),%rcx
mov    0x414(%rcx,%rax,4),%rax
ret

LLVM IR (-O0):
define i64 @GPIOIntStatus(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
store volatile i64 %0, i64* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %2
%9 = load volatile i64, i64* %4
%10 = add nsw i64 %9, 1048
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
store i64 %12, i64* %3
br label %18
13: ; preds = %2
%14 = load volatile i64, i64* %4
%15 = add nsw i64 %14, 1044
%16 = inttoptr i64 %15 to i64*
%17 = load volatile i64, i64* %16
store i64 %17, i64* %3
br label %18
18: ; preds = %13, %8
%19 = load i64, i64* %3
ret i64 %19
}

LLVM IR (-O2):
define i64 @GPIOIntStatus(i64 %0, i32 %1) {
%3 = alloca i64
store volatile i64 %0, i64* %3
%4 = icmp eq i32 %1, 0
%5 = load volatile i64, i64* %3
%6 = select i1 %4, i64 1044, i64 1048
%7 = add nsw i64 %5, %6
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
ret i64 %9
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fscanf(int /*<<< orphan*/ *, char *, int *);
int get_number_of_processes_from_file(FILE *filePtr) {
  int num = 0;
  fscanf(filePtr, "%d", &num);
  return num;
}


x86 assembly (clang, -O0):
<get_number_of_processes_from_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed2(%rip),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <fscanf@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_number_of_processes_from_file>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0xee0(%rip),%rsi
lea    0x4(%rsp),%rdx
call   1030 <fscanf@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @get_number_of_processes_from_file(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
%4 = load i32*, i32** %2
%5 = call i32 @fscanf(i32* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %3)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @get_number_of_processes_from_file(i32* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @fscanf(i32* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ smp_test_array_init();
void smp_test_array_main() {
  smp_test_array_init();
  printf("finished test\n");
}


x86 assembly (clang, -O0):
<smp_test_array_main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <smp_test_array_init@plt>
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_test_array_main>:
push   %rax
xor    %eax,%eax
call   1040 <smp_test_array_init@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"finished test\0A\00"
define void @smp_test_array_main() {
%1 = call i32 (...) @smp_test_array_init()
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"finished test\00"
define void @smp_test_array_main() {
%1 = tail call i32 (...) @smp_test_array_init()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
void genbc1f_out() {}


x86 assembly (clang, -O0):
<genbc1f_out>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genbc1f_out>:
ret

LLVM IR (-O0):
define void @genbc1f_out() {
ret void
}

LLVM IR (-O2):
define void @genbc1f_out() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void LPCIRQSet(unsigned long ulBase, unsigned long ulIRQ) {
  unsigned long ulTemp;
  DEBUG_ASSERT(ulBase == 0x40080000);
  ulTemp = (*((volatile unsigned long *)(ulBase + 0x00000008)));
  ulTemp |= (ulIRQ & 0xFFFF0000);
  (*((volatile unsigned long *)(ulBase + 0x00000008))) = ulTemp;
}


x86 assembly (clang, -O0):
<LPCIRQSet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x40080000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x18(%rbp)
movabs $0xffff0000,%rax
and    -0x10(%rbp),%rax
or     -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LPCIRQSet>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %edi,%edi
cmp    $0x40080000,%r14
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
and    $0xffff0000,%ebx
or     %rbx,0x8(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @LPCIRQSet(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = icmp eq i64 %6, 1074266112
%8 = zext i1 %7 to i32
%9 = call i32 @DEBUG_ASSERT(i32 %8)
%10 = load i64, i64* %3
%11 = add i64 %10, 8
%12 = inttoptr i64 %11 to i64*
%13 = load volatile i64, i64* %12
store i64 %13, i64* %5
%14 = load i64, i64* %4
%15 = and i64 %14, 4294901760
%16 = load i64, i64* %5
%17 = or i64 %16, %15
store i64 %17, i64* %5
%18 = load i64, i64* %5
%19 = load i64, i64* %3
%20 = add i64 %19, 8
%21 = inttoptr i64 %20 to i64*
store volatile i64 %18, i64* %21
ret void
}

LLVM IR (-O2):
define void @LPCIRQSet(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 1074266112
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = add i64 %0, 8
%7 = inttoptr i64 %6 to i64*
%8 = load volatile i64, i64* %7
%9 = and i64 %1, 4294901760
%10 = or i64 %8, %9
store volatile i64 %10, i64* %7
ret void
}
/* Type definitions */
struct mat3 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mat3_lerp(float *, float *, float *, float);
__attribute__((always_)) struct mat3 *
psmat3_lerp(struct mat3 *result, struct mat3 *a, struct mat3 *b, float p) {
  mat3_lerp((float *)result, (float *)a, (float *)b, p);
  return result;
}


x86 assembly (clang, -O0):
<psmat3_lerp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movss  %xmm0,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
movss  -0x1c(%rbp),%xmm0
call   1030 <mat3_lerp@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psmat3_lerp>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mat3_lerp@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.mat3 = type { i32 }
define %struct.mat3* @psmat3_lerp(%struct.mat3* %0, %struct.mat3* %1, %struct.mat3* %2, float %3) {
%5 = alloca %struct.mat3*
%6 = alloca %struct.mat3*
%7 = alloca %struct.mat3*
%8 = alloca float
store %struct.mat3* %0, %struct.mat3** %5
store %struct.mat3* %1, %struct.mat3** %6
store %struct.mat3* %2, %struct.mat3** %7
store float %3, float* %8
%9 = load %struct.mat3*, %struct.mat3** %5
%10 = bitcast %struct.mat3* %9 to float*
%11 = load %struct.mat3*, %struct.mat3** %6
%12 = bitcast %struct.mat3* %11 to float*
%13 = load %struct.mat3*, %struct.mat3** %7
%14 = bitcast %struct.mat3* %13 to float*
%15 = load float, float* %8
%16 = call i32 @mat3_lerp(float* %10, float* %12, float* %14, float %15)
%17 = load %struct.mat3*, %struct.mat3** %5
ret %struct.mat3* %17
}

LLVM IR (-O2):
%struct.mat3 = type { i32 }
define %struct.mat3* @psmat3_lerp(%struct.mat3* returned %0, %struct.mat3* %1, %struct.mat3* %2, float %3) {
%5 = bitcast %struct.mat3* %0 to float*
%6 = bitcast %struct.mat3* %1 to float*
%7 = bitcast %struct.mat3* %2 to float*
%8 = tail call i32 @mat3_lerp(float* %5, float* %6, float* %7, float %3)
ret %struct.mat3* %0
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
scalar_t__ range_get_last(scalar_t__, scalar_t__);
int ranges_overlap(uint64_t first1, uint64_t len1, uint64_t first2,
                   uint64_t len2) {
  uint64_t last1 = range_get_last(first1, len1);
  uint64_t last2 = range_get_last(first2, len2);
  return !(last2 < first1 || last1 < first2);
}


x86 assembly (clang, -O0):
<ranges_overlap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <range_get_last@plt>
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <range_get_last@plt>
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rcx
mov    $0x1,%al
cmp    -0x8(%rbp),%rcx
mov    %al,-0x31(%rbp)
jl     116b <ranges_overlap+0x5b>
mov    -0x28(%rbp),%rax
cmp    -0x18(%rbp),%rax
setl   %al
mov    %al,-0x31(%rbp)
mov    -0x31(%rbp),%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ranges_overlap>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%r15
mov    %rdi,%rbx
call   1030 <range_get_last@plt>
mov    %rax,%r12
mov    %r15,%rdi
mov    %r14,%rsi
call   1030 <range_get_last@plt>
cmp    %rbx,%rax
setge  %al
cmp    %r15,%r12
setge  %cl
and    %al,%cl
movzbl %cl,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @ranges_overlap(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%11 = load i64, i64* %5
%12 = load i64, i64* %6
%13 = call i64 @range_get_last(i64 %11, i64 %12)
store i64 %13, i64* %9
%14 = load i64, i64* %7
%15 = load i64, i64* %8
%16 = call i64 @range_get_last(i64 %14, i64 %15)
store i64 %16, i64* %10
%17 = load i64, i64* %10
%18 = load i64, i64* %5
%19 = icmp slt i64 %17, %18
br i1 %19, label %24, label %20
20: ; preds = %4
%21 = load i64, i64* %9
%22 = load i64, i64* %7
%23 = icmp slt i64 %21, %22
br label %24
24: ; preds = %20, %4
%25 = phi i1 [ true, %4 ], [ %23, %20 ]
%26 = xor i1 %25, true
%27 = zext i1 %26 to i32
ret i32 %27
}

LLVM IR (-O2):
define i32 @ranges_overlap(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = tail call i64 @range_get_last(i64 %0, i64 %1)
%6 = tail call i64 @range_get_last(i64 %2, i64 %3)
%7 = icmp sge i64 %6, %0
%8 = icmp sge i64 %5, %2
%9 = select i1 %7, i1 %8, i1 false
%10 = zext i1 %9 to i32
ret i32 %10
}
void rop3_91_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = S | *D;
  stk3 = ~stk3;
  stk2 = T | stk3;
  stk1 = *D ^ stk2;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_91_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
or     %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0xd(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xd(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_91_0_0>:
mov    (%rdi),%al
or     %al,%sil
not    %sil
or     %dl,%sil
xor    %al,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_91_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = or i32 %11, %14
%16 = trunc i32 %15 to i8
store i8 %16, i8* %9
%17 = load i8, i8* %9
%18 = zext i8 %17 to i32
%19 = xor i32 %18, -1
%20 = trunc i32 %19 to i8
store i8 %20, i8* %9
%21 = load i8, i8* %6
%22 = zext i8 %21 to i32
%23 = load i8, i8* %9
%24 = zext i8 %23 to i32
%25 = or i32 %22, %24
%26 = trunc i32 %25 to i8
store i8 %26, i8* %8
%27 = load i8*, i8** %4
%28 = load i8, i8* %27
%29 = zext i8 %28 to i32
%30 = load i8, i8* %8
%31 = zext i8 %30 to i32
%32 = xor i32 %29, %31
%33 = trunc i32 %32 to i8
store i8 %33, i8* %7
%34 = load i8, i8* %7
%35 = load i8*, i8** %4
store i8 %34, i8* %35
ret void
}

LLVM IR (-O2):
define void @rop3_91_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %4, %1
%6 = xor i8 %5, -1
%7 = or i8 %6, %2
%8 = xor i8 %7, %4
store i8 %8, i8* %0
ret void
}
/* Variables and functions */
size_t strnlen(const char *s, size_t maxlen) {
  size_t l = 0;
  for (; l < maxlen && s[l] != '\0'; l++) {
  }
  return l;
}


x86 assembly (clang, -O0):
<strnlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
xor    %eax,%eax
cmp    -0x10(%rbp),%rcx
mov    %al,-0x19(%rbp)
jae    113c <strnlen+0x3c>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    114c <strnlen+0x4c>
jmp    1162 <strnlen+0x62>
jmp    1151 <strnlen+0x51>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <strnlen+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strnlen>:
xor    %eax,%eax
test   %rsi,%rsi
je     1122 <strnlen+0x22>
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,(%rdi,%rax,1)
je     1122 <strnlen+0x22>
add    $0x1,%rax
cmp    %rax,%rsi
jne    1110 <strnlen+0x10>
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @strnlen(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %20, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i8, i8* %11, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 0
br label %17
17: ; preds = %10, %6
%18 = phi i1 [ false, %6 ], [ %16, %10 ]
br i1 %18, label %19, label %23
19: ; preds = %17
br label %20
20: ; preds = %19
%21 = load i64, i64* %5
%22 = add i64 %21, 1
store i64 %22, i64* %5
br label %6
23: ; preds = %17
%24 = load i64, i64* %5
ret i64 %24
}

LLVM IR (-O2):
define i64 @strnlen(i8* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %12, label %4
4: ; preds = %2, %9
%5 = phi i64 [ %10, %9 ], [ 0, %2 ]
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = add nuw i64 %5, 1
%11 = icmp eq i64 %10, %1
br i1 %11, label %12, label %4
12: ; preds = %4, %9, %2
%13 = phi i64 [ 0, %2 ], [ %1, %9 ], [ %5, %4 ]
ret i64 %13
}
void _OS_JumpToTask(void) {
  _OS_STORE_SP();
  _OS_SET_FSR_CUR_TASK();
  _OS_SET_PC();
  _OS_RESTORE_TEMP();
  asm(" ret ");
}


x86 assembly (clang, -O0):
<_OS_JumpToTask>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_OS_STORE_SP@plt>
mov    $0x0,%al
call   1050 <_OS_SET_FSR_CUR_TASK@plt>
mov    $0x0,%al
call   1060 <_OS_SET_PC@plt>
mov    $0x0,%al
call   1040 <_OS_RESTORE_TEMP@plt>
ret
pop    %rbp
ret

x86 assembly (clang, -O2):
<_OS_JumpToTask>:
push   %rax
xor    %eax,%eax
call   1030 <_OS_STORE_SP@plt>
xor    %eax,%eax
call   1050 <_OS_SET_FSR_CUR_TASK@plt>
xor    %eax,%eax
call   1060 <_OS_SET_PC@plt>
xor    %eax,%eax
call   1040 <_OS_RESTORE_TEMP@plt>
ret
pop    %rax
ret

LLVM IR (-O0):
define void @_OS_JumpToTask() {
%1 = call i32 (...) @_OS_STORE_SP()
%2 = call i32 (...) @_OS_SET_FSR_CUR_TASK()
%3 = call i32 (...) @_OS_SET_PC()
%4 = call i32 (...) @_OS_RESTORE_TEMP()
ret void
}

LLVM IR (-O2):
define void @_OS_JumpToTask() {
%1 = tail call i32 (...) @_OS_STORE_SP()
%2 = tail call i32 (...) @_OS_SET_FSR_CUR_TASK()
%3 = tail call i32 (...) @_OS_SET_PC()
%4 = tail call i32 (...) @_OS_RESTORE_TEMP()
tail call void asm sideeffect " ret ", "~{dirflag},~{fpsr},~{flags}"()
ret void
}