void fct4_4r(float *x) {
  float tmp00, tmp01, tmp10, tmp11, wc, ws;
  ;
  wc = 0.7071067812f;
  ;
  ;
  x[1] *= wc;
  ;
  tmp00 = x[0] + x[1];
  tmp01 = x[0] - x[1];
  ;
  ;
  x[2] *= wc;
  ;
  tmp11 = x[3] - x[2];
  tmp10 = x[3] + x[2];
  wc = 0.980785280403230f;
  ws = 0.195090322016128f;
  ;
  ;
  ;
  ;
  x[3] = tmp00 * wc + tmp10 * ws;
  x[0] = tmp00 * ws - tmp10 * wc;
  wc = 0.831469612302545f;
  ws = 0.555570233019602f;
  ;
  ;
  ;
  ;
  x[2] = tmp01 * wc - tmp11 * ws;
  x[1] = tmp01 * ws + tmp11 * wc;
  ;
}


x86 assembly (clang, -O0):
<fct4_4r>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  0xf00(%rip),%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  -0x1c(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulss  0x4(%rax),%xmm0
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
addss  0x4(%rax),%xmm0
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
subss  0x4(%rax),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x1c(%rbp),%xmm0
mov    -0x8(%rbp),%rax
mulss  0x8(%rax),%xmm0
movss  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movss  0xc(%rax),%xmm0
mov    -0x8(%rbp),%rax
subss  0x8(%rax),%xmm0
movss  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movss  0xc(%rax),%xmm0
mov    -0x8(%rbp),%rax
addss  0x8(%rax),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  0xe6f(%rip),%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  0xe5e(%rip),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x1c(%rbp),%xmm2
movss  -0x14(%rbp),%xmm1
mulss  -0x20(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0xc(%rax)
movss  -0xc(%rbp),%xmm0
movss  -0x20(%rbp),%xmm2
movss  -0x14(%rbp),%xmm1
mulss  -0x1c(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
movss  0xdf7(%rip),%xmm0
movss  %xmm0,-0x1c(%rbp)
movss  0xde6(%rip),%xmm0
movss  %xmm0,-0x20(%rbp)
movss  -0x10(%rbp),%xmm0
movss  -0x1c(%rbp),%xmm2
movss  -0x18(%rbp),%xmm1
mulss  -0x20(%rbp),%xmm1
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
movss  -0x10(%rbp),%xmm0
movss  -0x20(%rbp),%xmm2
movss  -0x18(%rbp),%xmm1
mulss  -0x1c(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fct4_4r>:
movss  0xef8(%rip),%xmm0
movss  0x4(%rdi),%xmm1
mulss  %xmm0,%xmm1
movss  (%rdi),%xmm2
movss  0xc(%rdi),%xmm3
movaps %xmm2,%xmm4
addss  %xmm1,%xmm4
subss  %xmm1,%xmm2
shufps $0x0,%xmm2,%xmm4
shufps $0x78,%xmm4,%xmm4
mulss  0x8(%rdi),%xmm0
movaps %xmm3,%xmm1
addss  %xmm0,%xmm1
subss  %xmm0,%xmm3
shufps $0x0,%xmm3,%xmm1
shufps $0x78,%xmm1,%xmm1
mulps  0xec4(%rip),%xmm1
mulps  0xecd(%rip),%xmm4
addps  %xmm1,%xmm4
movups %xmm4,(%rdi)
ret

LLVM IR (-O0):
define void @fct4_4r(float* %0) {
%2 = alloca float*
%3 = alloca float
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float* %0, float** %2
store float 0x3FE6A09E60000000, float* %7
%9 = load float, float* %7
%10 = load float*, float** %2
%11 = getelementptr inbounds float, float* %10, i64 1
%12 = load float, float* %11
%13 = fmul float %12, %9
store float %13, float* %11
%14 = load float*, float** %2
%15 = getelementptr inbounds float, float* %14, i64 0
%16 = load float, float* %15
%17 = load float*, float** %2
%18 = getelementptr inbounds float, float* %17, i64 1
%19 = load float, float* %18
%20 = fadd float %16, %19
store float %20, float* %3
%21 = load float*, float** %2
%22 = getelementptr inbounds float, float* %21, i64 0
%23 = load float, float* %22
%24 = load float*, float** %2
%25 = getelementptr inbounds float, float* %24, i64 1
%26 = load float, float* %25
%27 = fsub float %23, %26
store float %27, float* %4
%28 = load float, float* %7
%29 = load float*, float** %2
%30 = getelementptr inbounds float, float* %29, i64 2
%31 = load float, float* %30
%32 = fmul float %31, %28
store float %32, float* %30
%33 = load float*, float** %2
%34 = getelementptr inbounds float, float* %33, i64 3
%35 = load float, float* %34
%36 = load float*, float** %2
%37 = getelementptr inbounds float, float* %36, i64 2
%38 = load float, float* %37
%39 = fsub float %35, %38
store float %39, float* %6
%40 = load float*, float** %2
%41 = getelementptr inbounds float, float* %40, i64 3
%42 = load float, float* %41
%43 = load float*, float** %2
%44 = getelementptr inbounds float, float* %43, i64 2
%45 = load float, float* %44
%46 = fadd float %42, %45
store float %46, float* %5
store float 0x3FEF6297C0000000, float* %7
store float 0x3FC8F8B840000000, float* %8
%47 = load float, float* %3
%48 = load float, float* %7
%49 = load float, float* %5
%50 = load float, float* %8
%51 = fmul float %49, %50
%52 = call float @llvm.fmuladd.f32(float %47, float %48, float %51)
%53 = load float*, float** %2
%54 = getelementptr inbounds float, float* %53, i64 3
store float %52, float* %54
%55 = load float, float* %3
%56 = load float, float* %8
%57 = load float, float* %5
%58 = load float, float* %7
%59 = fmul float %57, %58
%60 = fneg float %59
%61 = call float @llvm.fmuladd.f32(float %55, float %56, float %60)
%62 = load float*, float** %2
%63 = getelementptr inbounds float, float* %62, i64 0
store float %61, float* %63
store float 0x3FEA9B6620000000, float* %7
store float 0x3FE1C73B40000000, float* %8
%64 = load float, float* %4
%65 = load float, float* %7
%66 = load float, float* %6
%67 = load float, float* %8
%68 = fmul float %66, %67
%69 = fneg float %68
%70 = call float @llvm.fmuladd.f32(float %64, float %65, float %69)
%71 = load float*, float** %2
%72 = getelementptr inbounds float, float* %71, i64 2
store float %70, float* %72
%73 = load float, float* %4
%74 = load float, float* %8
%75 = load float, float* %6
%76 = load float, float* %7
%77 = fmul float %75, %76
%78 = call float @llvm.fmuladd.f32(float %73, float %74, float %77)
%79 = load float*, float** %2
%80 = getelementptr inbounds float, float* %79, i64 1
store float %78, float* %80
ret void
}

LLVM IR (-O2):
define void @fct4_4r(float* nocapture %0) {
%2 = getelementptr inbounds float, float* %0, i64 1
%3 = load float, float* %2
%4 = fmul float %3, 0x3FE6A09E60000000
%5 = load float, float* %0
%6 = insertelement <2 x float> poison, float %5, i64 0
%7 = shufflevector <2 x float> %6, <2 x float> poison, <2 x i32> zeroinitializer
%8 = insertelement <2 x float> poison, float %4, i64 0
%9 = shufflevector <2 x float> %8, <2 x float> poison, <2 x i32> zeroinitializer
%10 = fadd <2 x float> %7, %9
%11 = fsub <2 x float> %7, %9
%12 = shufflevector <2 x float> %10, <2 x float> %11, <4 x i32> <i32 0, i32 3, i32 3, i32 0>
%13 = getelementptr inbounds float, float* %0, i64 2
%14 = load float, float* %13
%15 = fmul float %14, 0x3FE6A09E60000000
%16 = getelementptr inbounds float, float* %0, i64 3
%17 = load float, float* %16
%18 = insertelement <2 x float> poison, float %17, i64 0
%19 = shufflevector <2 x float> %18, <2 x float> poison, <2 x i32> zeroinitializer
%20 = insertelement <2 x float> poison, float %15, i64 0
%21 = shufflevector <2 x float> %20, <2 x float> poison, <2 x i32> zeroinitializer
%22 = fadd <2 x float> %19, %21
%23 = fsub <2 x float> %19, %21
%24 = shufflevector <2 x float> %22, <2 x float> %23, <4 x i32> <i32 0, i32 3, i32 3, i32 0>
%25 = fmul <4 x float> %24, <float 0xBFEF6297C0000000, float 0x3FEA9B6620000000, float 0xBFE1C73B40000000, float 0x3FC8F8B840000000>
%26 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %12, <4 x float> <float 0x3FC8F8B840000000, float 0x3FE1C73B40000000, float 0x3FEA9B6620000000, float 0x3FEF6297C0000000>, <4 x float> %25)
%27 = bitcast float* %0 to <4 x float>*
store <4 x float> %26, <4 x float>* %27
ret void
}