xunge/DecIR huggingface dataset:
unsigned short interpret_uint16(unsigned char *buffer) {
  return ((unsigned short)(buffer[0]) << 8) | (unsigned short)(buffer[1]);
}


x86 assembly (clang, -O0):
<interpret_uint16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzwl %ax,%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
movzwl %cx,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<interpret_uint16>:
movzwl (%rdi),%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @interpret_uint16(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i16
%7 = zext i16 %6 to i32
%8 = shl i32 %7, 8
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = zext i8 %11 to i16
%13 = zext i16 %12 to i32
%14 = or i32 %8, %13
%15 = trunc i32 %14 to i16
ret i16 %15
}

LLVM IR (-O2):
define zeroext i16 @interpret_uint16(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i16
%4 = shl nuw i16 %3, 8
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i16
%8 = or i16 %4, %7
ret i16 %8
}
void log_close(void) {}


x86 assembly (clang, -O0):
<log_close>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_close>:
ret

LLVM IR (-O0):
define void @log_close() {
ret void
}

LLVM IR (-O2):
define void @log_close() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int i = 1;
  int j = 10;
  printf("%d\n", 1 + 2 * 3 + 4);
  printf("%d\n", ((i++) < (j) ? (i++) : (j)));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0xa,-0xc(%rbp)
lea    0xecc(%rip),%rdi
mov    $0xb,%esi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x8(%rbp)
cmp    -0xc(%rbp),%eax
jge    1165 <main+0x55>
mov    -0x8(%rbp),%eax
mov    %eax,%ecx
add    $0x1,%ecx
mov    %ecx,-0x8(%rbp)
mov    %eax,-0x10(%rbp)
jmp    116b <main+0x5b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xe8b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0xb,%esi
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0x2,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 10, i32* %3
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 11)
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
%7 = load i32, i32* %3
%8 = icmp slt i32 %5, %7
br i1 %8, label %9, label %12
9: ; preds = %0
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %14
12: ; preds = %0
%13 = load i32, i32* %3
br label %14
14: ; preds = %12, %9
%15 = phi i32 [ %10, %9 ], [ %13, %12 ]
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 11)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 2)
ret i32 0
}
int whereIsIt(char c, char *str) {
  int i;
  for (i = 0; str[i]; i++)
    if (str[i] == c)
      return (i);
  return (0);
}


x86 assembly (clang, -O0):
<whereIsIt>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     115d <whereIsIt+0x5d>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0x5(%rbp),%ecx
cmp    %ecx,%eax
jne    114a <whereIsIt+0x4a>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1164 <whereIsIt+0x64>
jmp    114f <whereIsIt+0x4f>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1115 <whereIsIt+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<whereIsIt>:
mov    (%rsi),%cl
xor    %eax,%eax
test   %cl,%cl
je     1124 <whereIsIt+0x24>
nopl   0x0(%rax,%rax,1)
cmp    %dil,%cl
je     1124 <whereIsIt+0x24>
movzbl 0x1(%rsi,%rax,1),%ecx
add    $0x1,%rax
test   %cl,%cl
jne    1110 <whereIsIt+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @whereIsIt(i8 signext %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8*
%6 = alloca i32
store i8 %0, i8* %4
store i8* %1, i8** %5
store i32 0, i32* %6
br label %7
7: ; preds = %27, %2
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = icmp ne i8 %12, 0
br i1 %13, label %14, label %30
14: ; preds = %7
%15 = load i8*, i8** %5
%16 = load i32, i32* %6
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = sext i8 %19 to i32
%21 = load i8, i8* %4
%22 = sext i8 %21 to i32
%23 = icmp eq i32 %20, %22
br i1 %23, label %24, label %26
24: ; preds = %14
%25 = load i32, i32* %6
store i32 %25, i32* %3
br label %31
26: ; preds = %14
br label %27
27: ; preds = %26
%28 = load i32, i32* %6
%29 = add nsw i32 %28, 1
store i32 %29, i32* %6
br label %7
30: ; preds = %7
store i32 0, i32* %3
br label %31
31: ; preds = %30, %24
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @whereIsIt(i8 signext %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %9
%6 = phi i64 [ %10, %9 ], [ 0, %2 ]
%7 = phi i8 [ %12, %9 ], [ %3, %2 ]
%8 = icmp eq i8 %7, %0
br i1 %8, label %14, label %9
9: ; preds = %5
%10 = add nuw i64 %6, 1
%11 = getelementptr inbounds i8, i8* %1, i64 %10
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %16, label %5
14: ; preds = %5
%15 = trunc i64 %6 to i32
br label %16
16: ; preds = %9, %14, %2
%17 = phi i32 [ 0, %2 ], [ %15, %14 ], [ 0, %9 ]
ret i32 %17
}
void __svgalib_rendition_outseq(int index, int val) {}


x86 assembly (clang, -O0):
<__svgalib_rendition_outseq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__svgalib_rendition_outseq>:
ret

LLVM IR (-O0):
define void @__svgalib_rendition_outseq(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @__svgalib_rendition_outseq(i32 %0, i32 %1) {
ret void
}
void pollen_time_TimerManager_targetInit__I() {}


x86 assembly (clang, -O0):
<pollen_time_TimerManager_targetInit__I>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pollen_time_TimerManager_targetInit__I>:
ret

LLVM IR (-O0):
define void @pollen_time_TimerManager_targetInit__I() {
ret void
}

LLVM IR (-O2):
define void @pollen_time_TimerManager_targetInit__I() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pelgno_(double *, double *);
void cpelgno(double *xmom, double *para) { pelgno_(xmom, para); }


x86 assembly (clang, -O0):
<cpelgno>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <pelgno_@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpelgno>:
jmp    1030 <pelgno_@plt>

LLVM IR (-O0):
define void @cpelgno(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = load double*, double** %4
%7 = call i32 @pelgno_(double* %5, double* %6)
ret void
}

LLVM IR (-O2):
define void @cpelgno(double* %0, double* %1) {
%3 = tail call i32 @pelgno_(double* %0, double* %1)
ret void
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ slog(int, char *, int);
scalar_t__ strlen(char *);
int getMaxMsgSize(char *string) {
  int mms = 2048;
  string += strlen("maxmsgsize=");
  if (strlen(string) > 0) {
    mms = atoi(string);
  }
  slog(2, "max message size: %d \n", mms);
  return mms;
}


x86 assembly (clang, -O0):
<getMaxMsgSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x800,-0xc(%rbp)
lea    0xeb6(%rip),%rdi
call   1030 <strlen@plt>
add    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
cmp    $0x0,%rax
jle    1176 <getMaxMsgSize+0x46>
mov    -0x8(%rbp),%rdi
call   1050 <atoi@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    $0x2,%edi
lea    0xe87(%rip),%rsi
call   1040 <slog@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getMaxMsgSize>:
push   %rbx
mov    %rdi,%rbx
add    $0xb,%rbx
mov    %rbx,%rdi
call   1030 <strlen@plt>
test   %rax,%rax
jle    1151 <getMaxMsgSize+0x21>
mov    %rbx,%rdi
call   1050 <atoi@plt>
mov    %eax,%ebx
jmp    1156 <getMaxMsgSize+0x26>
mov    $0x800,%ebx
lea    0xea3(%rip),%rsi
mov    $0x2,%edi
mov    %ebx,%edx
call   1040 <slog@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"maxmsgsize=\00"
@.str.1 = [23 x i8] c"max message size: %d \0A\00"
define i32 @getMaxMsgSize(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 2048, i32* %3
%4 = call i64 @strlen(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%5 = load i8*, i8** %2
%6 = getelementptr inbounds i8, i8* %5, i64 %4
store i8* %6, i8** %2
%7 = load i8*, i8** %2
%8 = call i64 @strlen(i8* %7)
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %1
%11 = load i8*, i8** %2
%12 = call i32 @atoi(i8* %11)
store i32 %12, i32* %3
br label %13
13: ; preds = %10, %1
%14 = load i32, i32* %3
%15 = call i32 @slog(i32 2, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 %14)
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@.str.1 = [23 x i8] c"max message size: %d \0A\00"
define i32 @getMaxMsgSize(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 11
%3 = tail call i64 @strlen(i8* %2)
%4 = icmp sgt i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @atoi(i8* %2)
br label %7
7: ; preds = %5, %1
%8 = phi i32 [ %6, %5 ], [ 2048, %1 ]
%9 = tail call i32 @slog(i32 2, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ writecommand(int);
void ST7735_InvertDisplay(int i) {
  if (i) {
    writecommand(0x21);
  } else {
    writecommand(0x20);
  }
}


x86 assembly (clang, -O0):
<ST7735_InvertDisplay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1134 <ST7735_InvertDisplay+0x24>
mov    $0x21,%edi
call   1030 <writecommand@plt>
jmp    113e <ST7735_InvertDisplay+0x2e>
mov    $0x20,%edi
call   1030 <writecommand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ST7735_InvertDisplay>:
cmp    $0x1,%edi
mov    $0x21,%edi
sbb    $0x0,%edi
jmp    1030 <writecommand@plt>

LLVM IR (-O0):
define void @ST7735_InvertDisplay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @writecommand(i32 33)
br label %9
7: ; preds = %1
%8 = call i32 @writecommand(i32 32)
br label %9
9: ; preds = %7, %5
ret void
}

LLVM IR (-O2):
define void @ST7735_InvertDisplay(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i32 32, i32 33
%4 = tail call i32 @writecommand(i32 %3)
ret void
}
/* Type definitions */
struct stat {
  scalar_t__ st_dev;
  scalar_t__ st_ino;
};

/* Variables and functions */
int _is_same_path(const struct stat *a, const struct stat *b) {
  return a->st_dev == b->st_dev && a->st_ino == b->st_ino;
}


x86 assembly (clang, -O0):
<_is_same_path>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
mov    -0x10(%rbp),%rdx
xor    %eax,%eax
cmp    (%rdx),%rcx
mov    %al,-0x11(%rbp)
jne    113b <_is_same_path+0x3b>
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x10(%rbp),%rcx
cmp    0x8(%rcx),%rax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_same_path>:
mov    (%rdi),%rcx
xor    %eax,%eax
cmp    (%rsi),%rcx
jne    1117 <_is_same_path+0x17>
mov    0x8(%rdi),%rcx
xor    %eax,%eax
cmp    0x8(%rsi),%rcx
sete   %al
ret

LLVM IR (-O0):
%struct.stat = type { i64, i64 }
define i32 @_is_same_path(%struct.stat* %0, %struct.stat* %1) {
%3 = alloca %struct.stat*
%4 = alloca %struct.stat*
store %struct.stat* %0, %struct.stat** %3
store %struct.stat* %1, %struct.stat** %4
%5 = load %struct.stat*, %struct.stat** %3
%6 = getelementptr inbounds %struct.stat, %struct.stat* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = load %struct.stat*, %struct.stat** %4
%9 = getelementptr inbounds %struct.stat, %struct.stat* %8, i32 0, i32 0
%10 = load i64, i64* %9
%11 = icmp eq i64 %7, %10
br i1 %11, label %12, label %20
12: ; preds = %2
%13 = load %struct.stat*, %struct.stat** %3
%14 = getelementptr inbounds %struct.stat, %struct.stat* %13, i32 0, i32 1
%15 = load i64, i64* %14
%16 = load %struct.stat*, %struct.stat** %4
%17 = getelementptr inbounds %struct.stat, %struct.stat* %16, i32 0, i32 1
%18 = load i64, i64* %17
%19 = icmp eq i64 %15, %18
br label %20
20: ; preds = %12, %2
%21 = phi i1 [ false, %2 ], [ %19, %12 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
%struct.stat = type { i64, i64 }
define i32 @_is_same_path(%struct.stat* nocapture %0, %struct.stat* nocapture %1) {
%3 = getelementptr inbounds %struct.stat, %struct.stat* %0, i64 0, i32 0
%4 = load i64, i64* %3
%5 = getelementptr inbounds %struct.stat, %struct.stat* %1, i64 0, i32 0
%6 = load i64, i64* %5
%7 = icmp eq i64 %4, %6
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = getelementptr inbounds %struct.stat, %struct.stat* %0, i64 0, i32 1
%10 = load i64, i64* %9
%11 = getelementptr inbounds %struct.stat, %struct.stat* %1, i64 0, i32 1
%12 = load i64, i64* %11
%13 = icmp eq i64 %10, %12
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %8, %2
%16 = phi i32 [ 0, %2 ], [ %14, %8 ]
ret i32 %16
}
void caller_2_1_1_2_1_2_2() {}


x86 assembly (clang, -O0):
<caller_2_1_1_2_1_2_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_2_1_1_2_1_2_2>:
ret

LLVM IR (-O0):
define void @caller_2_1_1_2_1_2_2() {
ret void
}

LLVM IR (-O2):
define void @caller_2_1_1_2_1_2_2() {
ret void
}
/* Type definitions */
struct rtc_time {
  int dummy;
};

/* Variables and functions */
void __attribute__((weak)) rtc_hctohc(struct rtc_time tm) {}


x86 assembly (clang, -O0):
<rtc_hctohc>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtc_hctohc>:
ret

LLVM IR (-O0):
%struct.rtc_time = type { i32 }
define weak void @rtc_hctohc(i32 %0) {
%2 = alloca %struct.rtc_time
%3 = getelementptr inbounds %struct.rtc_time, %struct.rtc_time* %2, i32 0, i32 0
store i32 %0, i32* %3
ret void
}

LLVM IR (-O2):
define weak void @rtc_hctohc(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fa();
int /*<<< orphan*/ fb();
int /*<<< orphan*/ fc();
int main() {
  fa();
  fb();
  fc();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <fa@plt>
mov    $0x0,%al
call   1030 <fb@plt>
mov    $0x0,%al
call   1040 <fc@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <fa@plt>
xor    %eax,%eax
call   1030 <fb@plt>
xor    %eax,%eax
call   1040 <fc@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @fa()
%3 = call i32 (...) @fb()
%4 = call i32 (...) @fc()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @fa()
%2 = tail call i32 (...) @fb()
%3 = tail call i32 (...) @fc()
ret i32 0
}
void ASN1_const_check_infinite_end(void) {}


x86 assembly (clang, -O0):
<ASN1_const_check_infinite_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_const_check_infinite_end>:
ret

LLVM IR (-O0):
define void @ASN1_const_check_infinite_end() {
ret void
}

LLVM IR (-O2):
define void @ASN1_const_check_infinite_end() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *getBraceParam();
void CmdTextFont(int code) {
  char *s = getBraceParam();
  free(s);
}


x86 assembly (clang, -O0):
<CmdTextFont>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getBraceParam@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CmdTextFont>:
push   %rax
xor    %eax,%eax
call   1040 <getBraceParam@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @CmdTextFont(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = call i8* (...) @getBraceParam()
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @free(i8* %5)
ret void
}

LLVM IR (-O2):
define void @CmdTextFont(i32 %0) {
%2 = tail call i8* (...) @getBraceParam()
%3 = tail call i32 @free(i8* %2)
ret void
}
int findTrailingZeros(int n) {
  int count = 0;
  int i = 0;
  for (i = 5; n / i >= 1; i *= 5)
    count += n / i;
  return count;
}


x86 assembly (clang, -O0):
<findTrailingZeros>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x5,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x1,%eax
jl     1145 <findTrailingZeros+0x45>
mov    -0x4(%rbp),%eax
cltd
idivl  -0xc(%rbp)
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
imul   $0x5,-0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    111c <findTrailingZeros+0x1c>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<findTrailingZeros>:
xor    %ecx,%ecx
cmp    $0x5,%edi
jl     112e <findTrailingZeros+0x2e>
mov    %edi,%ecx
mov    $0xcccccccd,%eax
imul   %rcx,%rax
shr    $0x22,%rax
xor    %ecx,%ecx
mov    $0x5,%esi
nopl   (%rax)
add    %eax,%ecx
lea    (%rsi,%rsi,4),%esi
mov    %edi,%eax
cltd
idiv   %esi
test   %eax,%eax
jg     1120 <findTrailingZeros+0x20>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @findTrailingZeros(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
store i32 5, i32* %4
br label %5
5: ; preds = %16, %1
%6 = load i32, i32* %2
%7 = load i32, i32* %4
%8 = sdiv i32 %6, %7
%9 = icmp sge i32 %8, 1
br i1 %9, label %10, label %19
10: ; preds = %5
%11 = load i32, i32* %2
%12 = load i32, i32* %4
%13 = sdiv i32 %11, %12
%14 = load i32, i32* %3
%15 = add nsw i32 %14, %13
store i32 %15, i32* %3
br label %16
16: ; preds = %10
%17 = load i32, i32* %4
%18 = mul nsw i32 %17, 5
store i32 %18, i32* %4
br label %5
19: ; preds = %5
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @findTrailingZeros(i32 %0) {
%2 = icmp sgt i32 %0, 4
br i1 %2, label %3, label %13
3: ; preds = %1
%4 = udiv i32 %0, 5
br label %5
5: ; preds = %3, %5
%6 = phi i32 [ %11, %5 ], [ %4, %3 ]
%7 = phi i32 [ %10, %5 ], [ 5, %3 ]
%8 = phi i32 [ %9, %5 ], [ 0, %3 ]
%9 = add nsw i32 %6, %8
%10 = mul nuw nsw i32 %7, 5
%11 = sdiv i32 %0, %10
%12 = icmp sgt i32 %11, 0
br i1 %12, label %5, label %13
13: ; preds = %5, %1
%14 = phi i32 [ 0, %1 ], [ %9, %5 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, char);
int /*<<< orphan*/ showHelp();
void unReconizedSub(char o, char s) {
  printf("Unrecognized suboption %c of %c\n", s, o);
  showHelp();
}


x86 assembly (clang, -O0):
<unReconizedSub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
lea    0xec2(%rip),%rdi
movsbl %al,%esi
movsbl -0x1(%rbp),%edx
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <showHelp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unReconizedSub>:
push   %rax
mov    %edi,%edx
lea    0xed6(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <showHelp@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"Unrecognized suboption %c of %c\0A\00"
define void @unReconizedSub(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i8, i8* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8 signext %5, i8 signext %6)
%8 = call i32 (...) @showHelp()
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"Unrecognized suboption %c of %c\0A\00"
define void @unReconizedSub(i8 signext %0, i8 signext %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8 signext %1, i8 signext %0)
%4 = tail call i32 (...) @showHelp()
ret void
}
void rop3_71_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  stk3 = *D ^ T;
  stk2 = S & stk3;
  stk1 = T ^ stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_71_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xa(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xd(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_71_1_0>:
mov    (%rdi),%al
mov    %eax,%ecx
xor    %dl,%cl
and    %sil,%cl
xor    %dl,%cl
or     %sil,%cl
not    %cl
and    %sil,%al
or     %cl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_71_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%10 = load i8*, i8** %4
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = load i8, i8* %6
%14 = zext i8 %13 to i32
%15 = xor i32 %12, %14
%16 = trunc i32 %15 to i8
store i8 %16, i8* %9
%17 = load i8, i8* %5
%18 = zext i8 %17 to i32
%19 = load i8, i8* %9
%20 = zext i8 %19 to i32
%21 = and i32 %18, %20
%22 = trunc i32 %21 to i8
store i8 %22, i8* %8
%23 = load i8, i8* %6
%24 = zext i8 %23 to i32
%25 = load i8, i8* %8
%26 = zext i8 %25 to i32
%27 = xor i32 %24, %26
%28 = trunc i32 %27 to i8
store i8 %28, i8* %7
%29 = load i8, i8* %7
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = trunc i32 %31 to i8
store i8 %32, i8* %7
%33 = load i8, i8* %7
%34 = zext i8 %33 to i32
%35 = load i8, i8* %5
%36 = zext i8 %35 to i32
%37 = xor i32 %36, -1
%38 = and i32 %34, %37
%39 = load i8*, i8** %4
%40 = load i8, i8* %39
%41 = zext i8 %40 to i32
%42 = load i8, i8* %5
%43 = zext i8 %42 to i32
%44 = and i32 %41, %43
%45 = or i32 %38, %44
%46 = trunc i32 %45 to i8
%47 = load i8*, i8** %4
store i8 %46, i8* %47
ret void
}

LLVM IR (-O2):
define void @rop3_71_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, %2
%6 = and i8 %5, %1
%7 = xor i8 %6, %2
%8 = or i8 %7, %1
%9 = xor i8 %8, -1
%10 = and i8 %4, %1
%11 = or i8 %10, %9
store i8 %11, i8* %0
ret void
}
int __pcstombs_mb_ucs4() { return (-1); }


x86 assembly (clang, -O0):
<__pcstombs_mb_ucs4>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pcstombs_mb_ucs4>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @__pcstombs_mb_ucs4() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @__pcstombs_mb_ucs4() {
ret i32 -1
}
/* Variables and functions */
scalar_t__ sarprintf_std_ret(char *, int, char *, int, char *, int);
int sarwaitbar_std_update(int percent) {
  return sarprintf_std_ret("|%.*s%.*s| %00d%%", percent / 2,
                           "==================================================",
                           (50 - percent / 2),
                           "                                                  ",
                           percent) < 0;
}


x86 assembly (clang, -O0):
<sarwaitbar_std_update>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,%esi
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    $0x32,%ecx
sub    %eax,%ecx
mov    -0x4(%rbp),%r9d
lea    0xebb(%rip),%rdi
lea    0xec6(%rip),%rdx
lea    0xef2(%rip),%r8
call   1030 <sarprintf_std_ret@plt>
cmp    $0x0,%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sarwaitbar_std_update>:
push   %rax
mov    %edi,%r9d
mov    %edi,%esi
shr    $0x1f,%esi
add    %edi,%esi
sar    %esi
mov    $0x32,%ecx
sub    %esi,%ecx
lea    0xed5(%rip),%rdi
lea    0xee0(%rip),%rdx
lea    0xf0c(%rip),%r8
call   1030 <sarprintf_std_ret@plt>
shr    $0x3f,%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"|%.*s%.*s| %00d%%\00"
@.str.1 = [51 x i8] c"==================================================\00"
@.str.2 = [51 x i8] c" \00"
define i32 @sarwaitbar_std_update(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 2
%5 = load i32, i32* %2
%6 = sdiv i32 %5, 2
%7 = sub nsw i32 50, %6
%8 = load i32, i32* %2
%9 = call i64 @sarprintf_std_ret(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %4, i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str.1, i64 0, i64 0), i32 %7, i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str.2, i64 0, i64 0), i32 %8)
%10 = icmp slt i64 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
@.str = [18 x i8] c"|%.*s%.*s| %00d%%\00"
@.str.1 = [51 x i8] c"==================================================\00"
@.str.2 = [51 x i8] c" \00"
define i32 @sarwaitbar_std_update(i32 %0) {
%2 = sdiv i32 %0, 2
%3 = sub nsw i32 50, %2
%4 = tail call i64 @sarprintf_std_ret(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %2, i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str.1, i64 0, i64 0), i32 %3, i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str.2, i64 0, i64 0), i32 %0)
%5 = lshr i64 %4, 63
%6 = trunc i64 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0xbd() {
  Assert_real((isascii(189) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              950, ("isascii should be 0 for 0xbd"));
}


x86 assembly (clang, -O0):
<t_isascii_0xbd>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbd,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3b6,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0xbd>:
push   %rax
mov    $0xbd,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3b6,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xbd\00"
define void @t_isascii_0xbd() {
%1 = call i64 @isascii(i32 189)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 950, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xbd\00"
define void @t_isascii_0xbd() {
%1 = tail call i64 @isascii(i32 189)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 950, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ gzFile;

/* Variables and functions */
char *Z_NULL;
char *gzgets(int /*<<< orphan*/, char *, long);
char *GZ_READ(gzFile fd, char *s, long max) {
  char *s2 = gzgets(fd, s, max);
  if (s2 != Z_NULL)
    return (s2);
  s[0] = '\0';
  return (0);
}


x86 assembly (clang, -O0):
<GZ_READ>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <gzgets@plt>
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    0x2e9e(%rip),%rcx
cmp    (%rcx),%rax
je     1158 <GZ_READ+0x48>
mov    -0x28(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1167 <GZ_READ+0x57>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GZ_READ>:
push   %rbx
mov    %rsi,%rbx
call   1030 <gzgets@plt>
mov    0x2ec0(%rip),%rcx
cmp    (%rcx),%rax
je     1127 <GZ_READ+0x17>
pop    %rbx
ret
movb   $0x0,(%rbx)
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@Z_NULL = global i8* null
define i8* @GZ_READ(i32 %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i64, i64* %7
%12 = call i8* @gzgets(i32 %9, i8* %10, i64 %11)
store i8* %12, i8** %8
%13 = load i8*, i8** %8
%14 = load i8*, i8** @Z_NULL
%15 = icmp ne i8* %13, %14
br i1 %15, label %16, label %18
16: ; preds = %3
%17 = load i8*, i8** %8
store i8* %17, i8** %4
br label %21
18: ; preds = %3
%19 = load i8*, i8** %6
%20 = getelementptr inbounds i8, i8* %19, i64 0
store i8 0, i8* %20
store i8* null, i8** %4
br label %21
21: ; preds = %18, %16
%22 = load i8*, i8** %4
ret i8* %22
}

LLVM IR (-O2):
@Z_NULL = global i8* null
define i8* @GZ_READ(i32 %0, i8* %1, i64 %2) {
%4 = tail call i8* @gzgets(i32 %0, i8* %1, i64 %2)
%5 = load i8*, i8** @Z_NULL
%6 = icmp eq i8* %4, %5
br i1 %6, label %7, label %8
7: ; preds = %3
store i8 0, i8* %1
br label %8
8: ; preds = %3, %7
%9 = phi i8* [ null, %7 ], [ %4, %3 ]
ret i8* %9
}
/* Type definitions */
typedef int /*<<< orphan*/ timer_t;

/* Variables and functions */
int timer_getoverrun(int /*<<< orphan*/);
int main(void) {
  timer_t timerid = 0;
  return timer_getoverrun(timerid);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <timer_getoverrun@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %edi,%edi
jmp    1030 <timer_getoverrun@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @timer_getoverrun(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @timer_getoverrun(i32 0)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ clang_analyzer_eval(int);
void testConstraintOnRegionOffset(int *values, int length, int i) {
  if (values[1] == 4) {
    values[i] = 5;
    clang_analyzer_eval(values[1] == 4);
  }
}


x86 assembly (clang, -O0):
<testConstraintOnRegionOffset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x4,0x4(%rax)
jne    1154 <testConstraintOnRegionOffset+0x44>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movl   $0x5,(%rax,%rcx,4)
mov    -0x8(%rbp),%rax
cmpl   $0x4,0x4(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <clang_analyzer_eval@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testConstraintOnRegionOffset>:
cmpl   $0x4,0x4(%rdi)
jne    1130 <testConstraintOnRegionOffset+0x20>
movslq %edx,%rax
movl   $0x5,(%rdi,%rax,4)
xor    %eax,%eax
cmpl   $0x4,0x4(%rdi)
sete   %al
mov    %eax,%edi
jmp    1030 <clang_analyzer_eval@plt>
ret

LLVM IR (-O0):
define void @testConstraintOnRegionOffset(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 1
%9 = load i32, i32* %8
%10 = icmp eq i32 %9, 4
br i1 %10, label %11, label %22
11: ; preds = %3
%12 = load i32*, i32** %4
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
store i32 5, i32* %15
%16 = load i32*, i32** %4
%17 = getelementptr inbounds i32, i32* %16, i64 1
%18 = load i32, i32* %17
%19 = icmp eq i32 %18, 4
%20 = zext i1 %19 to i32
%21 = call i32 @clang_analyzer_eval(i32 %20)
br label %22
22: ; preds = %11, %3
ret void
}

LLVM IR (-O2):
define void @testConstraintOnRegionOffset(i32* nocapture %0, i32 %1, i32 %2) {
%4 = getelementptr inbounds i32, i32* %0, i64 1
%5 = load i32, i32* %4
%6 = icmp eq i32 %5, 4
br i1 %6, label %7, label %14
7: ; preds = %3
%8 = sext i32 %2 to i64
%9 = getelementptr inbounds i32, i32* %0, i64 %8
store i32 5, i32* %9
%10 = load i32, i32* %4
%11 = icmp eq i32 %10, 4
%12 = zext i1 %11 to i32
%13 = tail call i32 @clang_analyzer_eval(i32 %12)
br label %14
14: ; preds = %7, %3
ret void
}
void nsvg__xformVec(float *dx, float *dy, float x, float y, float *t) {
  *dx = x * t[0] + y * t[2];
  *dy = x * t[1] + y * t[3];
}


x86 assembly (clang, -O0):
<nsvg__xformVec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movss  %xmm0,-0x14(%rbp)
movss  %xmm1,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
movss  -0x14(%rbp),%xmm0
mov    -0x20(%rbp),%rax
movss  (%rax),%xmm2
movss  -0x18(%rbp),%xmm1
mov    -0x20(%rbp),%rax
mulss  0x8(%rax),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x14(%rbp),%xmm0
mov    -0x20(%rbp),%rax
movss  0x4(%rax),%xmm2
movss  -0x18(%rbp),%xmm1
mov    -0x20(%rbp),%rax
mulss  0xc(%rax),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nsvg__xformVec>:
movss  0x8(%rdx),%xmm2
mulss  %xmm1,%xmm2
movss  (%rdx),%xmm3
mulss  %xmm0,%xmm3
addss  %xmm2,%xmm3
movss  %xmm3,(%rdi)
mulss  0xc(%rdx),%xmm1
mulss  0x4(%rdx),%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @nsvg__xformVec(float* %0, float* %1, float %2, float %3, float* %4) {
%6 = alloca float*
%7 = alloca float*
%8 = alloca float
%9 = alloca float
%10 = alloca float*
store float* %0, float** %6
store float* %1, float** %7
store float %2, float* %8
store float %3, float* %9
store float* %4, float** %10
%11 = load float, float* %8
%12 = load float*, float** %10
%13 = getelementptr inbounds float, float* %12, i64 0
%14 = load float, float* %13
%15 = load float, float* %9
%16 = load float*, float** %10
%17 = getelementptr inbounds float, float* %16, i64 2
%18 = load float, float* %17
%19 = fmul float %15, %18
%20 = call float @llvm.fmuladd.f32(float %11, float %14, float %19)
%21 = load float*, float** %6
store float %20, float* %21
%22 = load float, float* %8
%23 = load float*, float** %10
%24 = getelementptr inbounds float, float* %23, i64 1
%25 = load float, float* %24
%26 = load float, float* %9
%27 = load float*, float** %10
%28 = getelementptr inbounds float, float* %27, i64 3
%29 = load float, float* %28
%30 = fmul float %26, %29
%31 = call float @llvm.fmuladd.f32(float %22, float %25, float %30)
%32 = load float*, float** %7
store float %31, float* %32
ret void
}

LLVM IR (-O2):
define void @nsvg__xformVec(float* nocapture writeonly %0, float* nocapture writeonly %1, float %2, float %3, float* nocapture %4) {
%6 = load float, float* %4
%7 = getelementptr inbounds float, float* %4, i64 2
%8 = load float, float* %7
%9 = fmul float %8, %3
%10 = tail call float @llvm.fmuladd.f32(float %2, float %6, float %9)
store float %10, float* %0
%11 = getelementptr inbounds float, float* %4, i64 1
%12 = load float, float* %11
%13 = getelementptr inbounds float, float* %4, i64 3
%14 = load float, float* %13
%15 = fmul float %14, %3
%16 = tail call float @llvm.fmuladd.f32(float %2, float %12, float %15)
store float %16, float* %1
ret void
}
/* Type definitions */
struct triple {
  int dummy;
};
struct compile_state {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ error(struct compile_state *, int /*<<< orphan*/, char *);
int /*<<< orphan*/ is_integral(struct triple *);
void integral(struct compile_state *state, struct triple *def) {
  if (!is_integral(def)) {
    error(state, 0, "integral type expected");
  }
}


x86 assembly (clang, -O0):
<integral>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <is_integral@plt>
cmp    $0x0,%eax
jne    1154 <integral+0x34>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
lea    0xeb1(%rip),%rdx
call   1030 <error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<integral>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1040 <is_integral@plt>
test   %eax,%eax
je     1132 <integral+0x12>
pop    %rbx
ret
lea    0xec7(%rip),%rdx
mov    %rbx,%rdi
xor    %esi,%esi
pop    %rbx
jmp    1030 <error@plt>

LLVM IR (-O0):
%struct.compile_state = type { i32 }
%struct.triple = type { i32 }
@.str = [23 x i8] c"integral type expected\00"
define void @integral(%struct.compile_state* %0, %struct.triple* %1) {
%3 = alloca %struct.compile_state*
%4 = alloca %struct.triple*
store %struct.compile_state* %0, %struct.compile_state** %3
store %struct.triple* %1, %struct.triple** %4
%5 = load %struct.triple*, %struct.triple** %4
%6 = call i32 @is_integral(%struct.triple* %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load %struct.compile_state*, %struct.compile_state** %3
%10 = call i32 @error(%struct.compile_state* %9, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
%struct.compile_state = type { i32 }
%struct.triple = type { i32 }
@.str = [23 x i8] c"integral type expected\00"
define void @integral(%struct.compile_state* %0, %struct.triple* %1) {
%3 = tail call i32 @is_integral(%struct.triple* %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @error(%struct.compile_state* %0, i32 0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret void
}
const char *testconstchararray() { return "123"; }


x86 assembly (clang, -O0):
<testconstchararray>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<testconstchararray>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"123\00"
define i8* @testconstchararray() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [4 x i8] c"123\00"
define i8* @testconstchararray() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int y;
};
struct TYPE_4__ {
  TYPE_1__ xkey;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xkey_y(void *_p, int _v) { ((XEvent *)_p)->xkey.y = (int)_v; }


x86 assembly (clang, -O0):
<set_XEvent_xkey_y>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xkey_y>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xkey_y(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xkey_y(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ init_board();
int /*<<< orphan*/ start_game();
void test_game() {
  init_board();
  start_game();
}


x86 assembly (clang, -O0):
<test_game>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_board@plt>
mov    $0x0,%al
call   1040 <start_game@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_game>:
push   %rax
xor    %eax,%eax
call   1030 <init_board@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <start_game@plt>

LLVM IR (-O0):
define void @test_game() {
%1 = call i32 (...) @init_board()
%2 = call i32 (...) @start_game()
ret void
}

LLVM IR (-O2):
define void @test_game() {
%1 = tail call i32 (...) @init_board()
%2 = tail call i32 (...) @start_game()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_cond_broadcast(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_mutex_lock(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_mutex_unlock(int /*<<< orphan*/ *);
void pwake_up_all(pthread_cond_t *cond, pthread_mutex_t *mtx) {
  pthread_mutex_lock(mtx);
  pthread_cond_broadcast(cond);
  pthread_mutex_unlock(mtx);
}


x86 assembly (clang, -O0):
<pwake_up_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <pthread_mutex_lock@plt>
mov    -0x8(%rbp),%rdi
call   1030 <pthread_cond_broadcast@plt>
mov    -0x10(%rbp),%rdi
call   1040 <pthread_mutex_unlock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pwake_up_all>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1050 <pthread_mutex_lock@plt>
mov    %r14,%rdi
call   1030 <pthread_cond_broadcast@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <pthread_mutex_unlock@plt>

LLVM IR (-O0):
define void @pwake_up_all(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = call i32 @pthread_mutex_lock(i32* %5)
%7 = load i32*, i32** %3
%8 = call i32 @pthread_cond_broadcast(i32* %7)
%9 = load i32*, i32** %4
%10 = call i32 @pthread_mutex_unlock(i32* %9)
ret void
}

LLVM IR (-O2):
define void @pwake_up_all(i32* %0, i32* %1) {
%3 = tail call i32 @pthread_mutex_lock(i32* %1)
%4 = tail call i32 @pthread_cond_broadcast(i32* %0)
%5 = tail call i32 @pthread_mutex_unlock(i32* %1)
ret void
}
/* Variables and functions */
char *strchr(char *, char);
int tp_scheme_len(char *url) {
  char *end;
  end = strchr(url, ':');
  return end ? (end - url) : 0;
}


x86 assembly (clang, -O0):
<tp_scheme_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3a,%esi
call   1030 <strchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114d <tp_scheme_len+0x3d>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    %rcx,%rax
mov    %rax,-0x18(%rbp)
jmp    1158 <tp_scheme_len+0x48>
xor    %eax,%eax
mov    %rax,-0x18(%rbp)
jmp    1158 <tp_scheme_len+0x48>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tp_scheme_len>:
push   %rbx
mov    %rdi,%rbx
mov    $0x3a,%esi
call   1030 <strchr@plt>
mov    %eax,%edx
sub    %ebx,%edx
xor    %ecx,%ecx
test   %rax,%rax
cmovne %edx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @tp_scheme_len(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @strchr(i8* %4, i8 signext 58)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %14
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = load i8*, i8** %2
%11 = ptrtoint i8* %9 to i64
%12 = ptrtoint i8* %10 to i64
%13 = sub i64 %11, %12
br label %15
14: ; preds = %1
br label %15
15: ; preds = %14, %8
%16 = phi i64 [ %13, %8 ], [ 0, %14 ]
%17 = trunc i64 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
define i32 @tp_scheme_len(i8* %0) {
%2 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 58)
%3 = icmp eq i8* %2, null
%4 = ptrtoint i8* %2 to i64
%5 = ptrtoint i8* %0 to i64
%6 = sub i64 %4, %5
%7 = trunc i64 %6 to i32
%8 = select i1 %3, i32 0, i32 %7
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ EVP_CIPHER_CTX;

/* Variables and functions */
int /*<<< orphan*/ EVP_CIPHER_CTX_cleanup(int /*<<< orphan*/ *);
int /*<<< orphan*/ OPENSSL_free(int /*<<< orphan*/ *);
void EVP_CIPHER_CTX_free(EVP_CIPHER_CTX *ctx) {
  if (ctx) {
    EVP_CIPHER_CTX_cleanup(ctx);
    OPENSSL_free(ctx);
  }
}


x86 assembly (clang, -O0):
<EVP_CIPHER_CTX_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1149 <EVP_CIPHER_CTX_free+0x29>
mov    -0x8(%rbp),%rdi
call   1040 <EVP_CIPHER_CTX_cleanup@plt>
mov    -0x8(%rbp),%rdi
call   1030 <OPENSSL_free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_CIPHER_CTX_free>:
test   %rdi,%rdi
je     1137 <EVP_CIPHER_CTX_free+0x17>
push   %rbx
mov    %rdi,%rbx
call   1040 <EVP_CIPHER_CTX_cleanup@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <OPENSSL_free@plt>
ret

LLVM IR (-O0):
define void @EVP_CIPHER_CTX_free(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i32*, i32** %2
%7 = call i32 @EVP_CIPHER_CTX_cleanup(i32* %6)
%8 = load i32*, i32** %2
%9 = call i32 @OPENSSL_free(i32* %8)
br label %10
10: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @EVP_CIPHER_CTX_free(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @EVP_CIPHER_CTX_cleanup(i32* %0)
%5 = tail call i32 @OPENSSL_free(i32* %0)
br label %6
6: ; preds = %3, %1
ret void
}
void ls_cost_nm5_incref(void) {}


x86 assembly (clang, -O0):
<ls_cost_nm5_incref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm5_incref>:
ret

LLVM IR (-O0):
define void @ls_cost_nm5_incref() {
ret void
}

LLVM IR (-O2):
define void @ls_cost_nm5_incref() {
ret void
}