xunge/DecIR huggingface dataset:
char *ft_strcpy(char *dst, const char *src) {
  int i;
  i = 0;
  while (src[i] != '\0') {
    dst[i] = src[i];
    i++;
  }
  return (dst);
}


x86 assembly (clang, -O0):
<ft_strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     114c <ft_strcpy+0x4c>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <ft_strcpy+0x13>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
test   %cl,%cl
je     1120 <ft_strcpy+0x20>
xor    %edx,%edx
nopl   0x0(%rax,%rax,1)
mov    %cl,(%rax,%rdx,1)
movzbl 0x1(%rsi,%rdx,1),%ecx
add    $0x1,%rdx
test   %cl,%cl
jne    1110 <ft_strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @ft_strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %14, %2
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %26
14: ; preds = %6
%15 = load i8*, i8** %4
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = load i8*, i8** %3
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
store i8 %19, i8* %23
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
br label %6
26: ; preds = %6
%27 = load i8*, i8** %3
ret i8* %27
}

LLVM IR (-O2):
define i8* @ft_strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %9, %5 ], [ 0, %2 ]
%7 = phi i8 [ %11, %5 ], [ %3, %2 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 %7, i8* %8
%9 = add nuw nsw i64 %6, 1
%10 = getelementptr inbounds i8, i8* %1, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
ret i8* %0
}
double opr_h(struct lifo *stack) { return 6.6260755E-34; }


x86 assembly (clang, -O0):
<opr_h>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  0xef0(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<opr_h>:
movsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
%struct.lifo = type opaque
define double @opr_h(%struct.lifo* %0) {
%2 = alloca %struct.lifo*
store %struct.lifo* %0, %struct.lifo** %2
ret double 0x390B860D52D96191
}

LLVM IR (-O2):
%struct.lifo = type opaque
define double @opr_h(%struct.lifo* nocapture readnone %0) {
ret double 0x390B860D52D96191
}
/* Variables and functions */
scalar_t__ ismyalpha(int);
scalar_t__ ismydigit(int);
int ismyalnum(int c) { return (ismyalpha(c) || ismydigit(c)); }


x86 assembly (clang, -O0):
<ismyalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <ismyalpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x5(%rbp)
jne    1157 <ismyalnum+0x37>
mov    -0x4(%rbp),%edi
call   1030 <ismydigit@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ismyalnum>:
push   %rbx
mov    %edi,%ebx
call   1040 <ismyalpha@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <ismyalnum+0x17>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <ismydigit@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ismyalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @ismyalpha(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i32, i32* %2
%8 = call i64 @ismydigit(i32 %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @ismyalnum(i32 %0) {
%2 = tail call i64 @ismyalpha(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @ismydigit(i32 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void dao_free(void *p) { free(p); }


x86 assembly (clang, -O0):
<dao_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dao_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @dao_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @dao_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int ETIMEDOUT;
char Platform_TimedOut(int e) {
  char _o_result;
  _o_result = e == ETIMEDOUT;
  return _o_result;
}


x86 assembly (clang, -O0):
<Platform_TimedOut>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ecf(%rip),%rcx
cmp    (%rcx),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Platform_TimedOut>:
mov    0x2ed9(%rip),%rax
cmp    %edi,(%rax)
sete   %al
ret

LLVM IR (-O0):
@ETIMEDOUT = global i32 0
define signext i8 @Platform_TimedOut(i32 %0) {
%2 = alloca i32
%3 = alloca i8
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @ETIMEDOUT
%6 = icmp eq i32 %4, %5
%7 = zext i1 %6 to i32
%8 = trunc i32 %7 to i8
store i8 %8, i8* %3
%9 = load i8, i8* %3
ret i8 %9
}

LLVM IR (-O2):
@ETIMEDOUT = global i32 0
define signext i8 @Platform_TimedOut(i32 %0) {
%2 = load i32, i32* @ETIMEDOUT
%3 = icmp eq i32 %2, %0
%4 = zext i1 %3 to i8
ret i8 %4
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void writenu16(uint8_t *p, uint16_t n) {
  p[0] = (n & 0xff00) >> 8;
  p[1] = n & 0xff;
}


x86 assembly (clang, -O0):
<writenu16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<writenu16>:
mov    %esi,%eax
movzbl %ah,%ecx
mov    %ecx,(%rdi)
movzbl %al,%eax
mov    %eax,0x4(%rdi)
ret

LLVM IR (-O0):
define void @writenu16(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = and i32 %5, 65280
%7 = ashr i32 %6, 8
%8 = load i32*, i32** %3
%9 = getelementptr inbounds i32, i32* %8, i64 0
store i32 %7, i32* %9
%10 = load i32, i32* %4
%11 = and i32 %10, 255
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 1
store i32 %11, i32* %13
ret void
}

LLVM IR (-O2):
define void @writenu16(i32* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 8
%4 = and i32 %3, 255
store i32 %4, i32* %0
%5 = and i32 %1, 255
%6 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %5, i32* %6
ret void
}
/* Variables and functions */
size_t strxfrm(char *dest, const char *src, size_t n) { return 0; }


x86 assembly (clang, -O0):
<strxfrm>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strxfrm>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strxfrm(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
ret i64 0
}

LLVM IR (-O2):
define i64 @strxfrm(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2) {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int sscanf(char *s, char *fmt, ...) {
  printf("sscanf error");
  return -1;
}


x86 assembly (clang, -O0):
<sscanf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sscanf>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"sscanf error\00"
define i32 @sscanf(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [13 x i8] c"sscanf error\00"
define i32 @sscanf(i8* nocapture readnone %0, i8* nocapture readnone %1, ...) {
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
/* Variables and functions */
int strcmp(char const *, char const *);
int strcmp0(const char *str1, const char *str2) {
  if (!str1)
    return str2 ? -1 : 0;
  if (!str2)
    return 1;
  return strcmp(str1, str2);
}


x86 assembly (clang, -O0):
<strcmp0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1145 <strcmp0+0x35>
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    $0xffffffff,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    116c <strcmp0+0x5c>
cmpq   $0x0,-0x18(%rbp)
jne    115c <strcmp0+0x4c>
movl   $0x1,-0x4(%rbp)
jmp    116c <strcmp0+0x5c>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <strcmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcmp0>:
test   %rdi,%rdi
je     111f <strcmp0+0xf>
test   %rsi,%rsi
je     1125 <strcmp0+0x15>
jmp    1030 <strcmp@plt>
neg    %rsi
sbb    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @strcmp0(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp ne i8* %6, null
br i1 %7, label %13, label %8
8: ; preds = %2
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
%11 = zext i1 %10 to i64
%12 = select i1 %10, i32 -1, i32 0
store i32 %12, i32* %3
br label %21
13: ; preds = %2
%14 = load i8*, i8** %5
%15 = icmp ne i8* %14, null
br i1 %15, label %17, label %16
16: ; preds = %13
store i32 1, i32* %3
br label %21
17: ; preds = %13
%18 = load i8*, i8** %4
%19 = load i8*, i8** %5
%20 = call i32 @strcmp(i8* %18, i8* %19)
store i32 %20, i32* %3
br label %21
21: ; preds = %17, %16, %8
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @strcmp0(i8* %0, i8* %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %7
4: ; preds = %2
%5 = icmp ne i8* %1, null
%6 = sext i1 %5 to i32
br label %11
7: ; preds = %2
%8 = icmp eq i8* %1, null
br i1 %8, label %11, label %9
9: ; preds = %7
%10 = tail call i32 @strcmp(i8* %0, i8* %1)
br label %11
11: ; preds = %7, %9, %4
%12 = phi i32 [ %10, %9 ], [ %6, %4 ], [ 1, %7 ]
ret i32 %12
}
unsigned xrop3_13_0_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~S;
  stk2 = D & stk3;
  stk1 = T | stk2;
  stk1 = ~stk1;
  return (stk1 & S) | (stk1 & (~T)) | (T & (~S) & D);
}


x86 assembly (clang, -O0):
<xrop3_13_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
and    -0xc(%rbp),%eax
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x10(%rbp),%ecx
mov    -0xc(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
and    -0x8(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_13_0_1>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
not    %eax
xor    $0xff,%edi
or     %edi,%ecx
not    %ecx
and    %esi,%eax
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_13_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %7
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = xor i32 %31, -1
store i32 %32, i32* %8
%33 = load i32, i32* %8
%34 = load i32, i32* %6
%35 = and i32 %33, %34
%36 = load i32, i32* %8
%37 = load i32, i32* %7
%38 = xor i32 %37, -1
%39 = and i32 %36, %38
%40 = or i32 %35, %39
%41 = load i32, i32* %7
%42 = load i32, i32* %6
%43 = xor i32 %42, -1
%44 = and i32 %41, %43
%45 = load i32, i32* %5
%46 = and i32 %44, %45
%47 = or i32 %40, %46
ret i32 %47
}

LLVM IR (-O2):
define i32 @xrop3_13_0_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %4, -1
%8 = xor i32 %3, 255
%9 = or i32 %6, %8
%10 = xor i32 %9, -1
%11 = and i32 %7, %5
%12 = or i32 %11, %10
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ _fail(char const *const, int const);
int /*<<< orphan*/ values_equal_display_error(int /*<<< orphan*/ const,
                                              int /*<<< orphan*/ const);
void _assert_int_equal(const uint64_t a, const uint64_t b,
                       const char *const file, const int line) {
  if (!values_equal_display_error(a, b)) {
    _fail(file, line);
  }
}


x86 assembly (clang, -O0):
<_assert_int_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <values_equal_display_error@plt>
cmp    $0x0,%eax
jne    1155 <_assert_int_equal+0x35>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <_fail@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_assert_int_equal>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %rdx,%rbx
call   1030 <values_equal_display_error@plt>
test   %eax,%eax
je     1138 <_assert_int_equal+0x18>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <_fail@plt>

LLVM IR (-O0):
define void @_assert_int_equal(i32 %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = call i32 @values_equal_display_error(i32 %9, i32 %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %17, label %13
13: ; preds = %4
%14 = load i8*, i8** %7
%15 = load i32, i32* %8
%16 = call i32 @_fail(i8* %14, i32 %15)
br label %17
17: ; preds = %13, %4
ret void
}

LLVM IR (-O2):
define void @_assert_int_equal(i32 %0, i32 %1, i8* %2, i32 %3) {
%5 = tail call i32 @values_equal_display_error(i32 %0, i32 %1)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i32 @_fail(i8* %2, i32 %3)
br label %9
9: ; preds = %7, %4
ret void
}
int sequence_one(int a) { return (9 * a) + 263; }


x86 assembly (clang, -O0):
<sequence_one>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x9,-0x4(%rbp),%eax
add    $0x107,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sequence_one>:
lea    (%rdi,%rdi,8),%eax
add    $0x107,%eax
ret

LLVM IR (-O0):
define i32 @sequence_one(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 9, %3
%5 = add nsw i32 %4, 263
ret i32 %5
}

LLVM IR (-O2):
define i32 @sequence_one(i32 %0) {
%2 = mul nsw i32 %0, 9
%3 = add nsw i32 %2, 263
ret i32 %3
}
void pubsubPublishMessage(void) {
  _serverPanic("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/"
               "heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c",
               102, "Function '%s' is disabled.", __func__);
}


x86 assembly (clang, -O0):
<pubsubPublishMessage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x66,%esi
lea    0xf79(%rip),%rdx
lea    0xf8d(%rip),%rcx
mov    $0x0,%al
call   1030 <_serverPanic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pubsubPublishMessage>:
lea    0xee9(%rip),%rdi
lea    0xf82(%rip),%rdx
lea    0xf96(%rip),%rcx
mov    $0x66,%esi
xor    %eax,%eax
jmp    1030 <_serverPanic@plt>

LLVM IR (-O0):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.pubsubPublishMessage = [21 x i8] c"pubsubPublishMessage\00"
define void @pubsubPublishMessage() {
%1 = call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 102, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @__func__.pubsubPublishMessage, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.pubsubPublishMessage = [21 x i8] c"pubsubPublishMessage\00"
define void @pubsubPublishMessage() {
%1 = tail call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 102, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([21 x i8], [21 x i8]* @__func__.pubsubPublishMessage, i64 0, i64 0))
ret void
}
const char *c3version() { return "0.1.1"; }


x86 assembly (clang, -O0):
<c3version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c3version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"0.1.1\00"
define i8* @c3version() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"0.1.1\00"
define i8* @c3version() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
struct compiler {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ accept_endofstmt(struct compiler *);
int /*<<< orphan*/ error_syntax(struct compiler *);
void expect_endofstmt(struct compiler *c) {
  if (!accept_endofstmt(c))
    error_syntax(c);
}


x86 assembly (clang, -O0):
<expect_endofstmt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <accept_endofstmt@plt>
cmp    $0x0,%eax
jne    1147 <expect_endofstmt+0x27>
mov    -0x8(%rbp),%rdi
call   1030 <error_syntax@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expect_endofstmt>:
push   %rbx
mov    %rdi,%rbx
call   1040 <accept_endofstmt@plt>
test   %eax,%eax
je     112f <expect_endofstmt+0xf>
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <error_syntax@plt>

LLVM IR (-O0):
%struct.compiler = type { i32 }
define void @expect_endofstmt(%struct.compiler* %0) {
%2 = alloca %struct.compiler*
store %struct.compiler* %0, %struct.compiler** %2
%3 = load %struct.compiler*, %struct.compiler** %2
%4 = call i32 @accept_endofstmt(%struct.compiler* %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load %struct.compiler*, %struct.compiler** %2
%8 = call i32 @error_syntax(%struct.compiler* %7)
br label %9
9: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
%struct.compiler = type { i32 }
define void @expect_endofstmt(%struct.compiler* %0) {
%2 = tail call i32 @accept_endofstmt(%struct.compiler* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @error_syntax(%struct.compiler* %0)
br label %6
6: ; preds = %4, %1
ret void
}
void tf2() {}


x86 assembly (clang, -O0):
<tf2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tf2>:
ret

LLVM IR (-O0):
define void @tf2() {
ret void
}

LLVM IR (-O2):
define void @tf2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WriteLDI_LTE246(int, int);
int /*<<< orphan*/ mdelay(int);
void S6D2101_PowerOff(void) {
  WriteLDI_LTE246(0x10, 0x0500);
  WriteLDI_LTE246(0x13, 0x0063);
  mdelay(50);
  WriteLDI_LTE246(0x13, 0x0040);
  mdelay(50);
  WriteLDI_LTE246(0x13, 0x0000);
}


x86 assembly (clang, -O0):
<S6D2101_PowerOff>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10,%edi
mov    $0x500,%esi
call   1040 <WriteLDI_LTE246@plt>
mov    $0x13,%edi
mov    $0x63,%esi
call   1040 <WriteLDI_LTE246@plt>
mov    $0x32,%edi
call   1030 <mdelay@plt>
mov    $0x13,%edi
mov    $0x40,%esi
call   1040 <WriteLDI_LTE246@plt>
mov    $0x32,%edi
call   1030 <mdelay@plt>
mov    $0x13,%edi
xor    %esi,%esi
call   1040 <WriteLDI_LTE246@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<S6D2101_PowerOff>:
push   %rax
mov    $0x10,%edi
mov    $0x500,%esi
call   1040 <WriteLDI_LTE246@plt>
mov    $0x13,%edi
mov    $0x63,%esi
call   1040 <WriteLDI_LTE246@plt>
mov    $0x32,%edi
call   1030 <mdelay@plt>
mov    $0x13,%edi
mov    $0x40,%esi
call   1040 <WriteLDI_LTE246@plt>
mov    $0x32,%edi
call   1030 <mdelay@plt>
mov    $0x13,%edi
xor    %esi,%esi
pop    %rax
jmp    1040 <WriteLDI_LTE246@plt>

LLVM IR (-O0):
define void @S6D2101_PowerOff() {
%1 = call i32 @WriteLDI_LTE246(i32 16, i32 1280)
%2 = call i32 @WriteLDI_LTE246(i32 19, i32 99)
%3 = call i32 @mdelay(i32 50)
%4 = call i32 @WriteLDI_LTE246(i32 19, i32 64)
%5 = call i32 @mdelay(i32 50)
%6 = call i32 @WriteLDI_LTE246(i32 19, i32 0)
ret void
}

LLVM IR (-O2):
define void @S6D2101_PowerOff() {
%1 = tail call i32 @WriteLDI_LTE246(i32 16, i32 1280)
%2 = tail call i32 @WriteLDI_LTE246(i32 19, i32 99)
%3 = tail call i32 @mdelay(i32 50)
%4 = tail call i32 @WriteLDI_LTE246(i32 19, i32 64)
%5 = tail call i32 @mdelay(i32 50)
%6 = tail call i32 @WriteLDI_LTE246(i32 19, i32 0)
ret void
}
void test(void) { __asm__(""); }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
ret

LLVM IR (-O0):
define void @test() {
ret void
}

LLVM IR (-O2):
define void @test() {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
scalar_t__ fmod(double, double);
double eval_mod(double x, double y) { return (double)(fmod(x, y)); }


x86 assembly (clang, -O0):
<eval_mod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <fmod@plt>
cvtsi2sd %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eval_mod>:
push   %rax
call   1030 <fmod@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @eval_mod(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call i64 @fmod(double %5, double %6)
%8 = sitofp i64 %7 to double
ret double %8
}

LLVM IR (-O2):
define double @eval_mod(double %0, double %1) {
%3 = tail call i64 @fmod(double %0, double %1)
%4 = sitofp i64 %3 to double
ret double %4
}
int test_imm_AAint8_mem(signed char *val) {
  return ((*val) & (-0xAA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_AAint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffff56,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_AAint8_mem>:
movsbl (%rdi),%eax
test   $0xffffff56,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_AAint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -170
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_AAint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = sext i8 %2 to i32
%4 = and i32 %3, -170
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 -40, i32 -20
ret i32 %6
}
/* Variables and functions */
int adb_exists(char *);
int /*<<< orphan*/ sprintf(char *, char *, char *, char const *);
int llsif_xml_exists(const char *file) {
  char path[2048] = {0};
  sprintf(path, "%s/%s", "/data/data/klb.android.lovelive_en/shared_prefs",
          file);
  return adb_exists(path);
}


x86 assembly (clang, -O0):
<llsif_xml_exists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x810,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x810(%rbp),%rdi
xor    %esi,%esi
mov    $0x800,%edx
call   1030 <memset@plt>
lea    -0x810(%rbp),%rdi
mov    -0x8(%rbp),%rcx
lea    0xe9c(%rip),%rsi
lea    0xe9b(%rip),%rdx
call   1050 <sprintf@plt>
lea    -0x810(%rbp),%rdi
call   1040 <adb_exists@plt>
add    $0x810,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<llsif_xml_exists>:
push   %r14
push   %rbx
sub    $0x808,%rsp
mov    %rdi,%rbx
mov    %rsp,%r14
mov    $0x800,%edx
mov    %r14,%rdi
xor    %esi,%esi
call   1030 <memset@plt>
lea    0xeaa(%rip),%rsi
lea    0xea9(%rip),%rdx
mov    %r14,%rdi
mov    %rbx,%rcx
call   1050 <sprintf@plt>
mov    %r14,%rdi
call   1040 <adb_exists@plt>
add    $0x808,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%s/%s\00"
@.str.1 = [48 x i8] c"/data/data/klb.android.lovelive_en/shared_prefs\00"
define i32 @llsif_xml_exists(i8* %0) {
%2 = alloca i8*
%3 = alloca [2048 x i8]
store i8* %0, i8** %2
%4 = bitcast [2048 x i8]* %3 to i8*
%5 = getelementptr inbounds [2048 x i8], [2048 x i8]* %3, i64 0, i64 0
%6 = load i8*, i8** %2
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str.1, i64 0, i64 0), i8* %6)
%8 = getelementptr inbounds [2048 x i8], [2048 x i8]* %3, i64 0, i64 0
%9 = call i32 @adb_exists(i8* %8)
ret i32 %9
}

LLVM IR (-O2):
@.str = [6 x i8] c"%s/%s\00"
@.str.1 = [48 x i8] c"/data/data/klb.android.lovelive_en/shared_prefs\00"
define i32 @llsif_xml_exists(i8* %0) {
%2 = alloca [2048 x i8]
%3 = getelementptr inbounds [2048 x i8], [2048 x i8]* %2, i64 0, i64 0
%4 = call i32 @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%5 = call i32 @adb_exists(i8* %3)
ret i32 %5
}
int handle_cursor_update(void) { return 0; }


x86 assembly (clang, -O0):
<handle_cursor_update>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_cursor_update>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @handle_cursor_update() {
ret i32 0
}

LLVM IR (-O2):
define i32 @handle_cursor_update() {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ EINTR;
int /*<<< orphan*/ printf(char *, char *, char *);
char *strerror_r(int /*<<< orphan*/, char *, int);
int main(int argc, char *argv[]) {
  char buf[256] = {0};
  char *err_desc = strerror_r(EINTR, buf, sizeof(buf));
  printf("buf:%s ret_ptr:%s", buf, err_desc);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x120,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x110(%rbp),%rdi
xor    %esi,%esi
mov    $0x100,%edx
call   1040 <memset@plt>
mov    0x2e7d(%rip),%rax
mov    (%rax),%edi
lea    -0x110(%rbp),%rsi
mov    $0x100,%edx
call   1050 <strerror_r@plt>
mov    %rax,-0x118(%rbp)
lea    -0x110(%rbp),%rsi
mov    -0x118(%rbp),%rdx
lea    0xe6e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x120,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x100,%rsp
xorps  %xmm0,%xmm0
movaps %xmm0,0xf0(%rsp)
movaps %xmm0,0xe0(%rsp)
movaps %xmm0,0xd0(%rsp)
movaps %xmm0,0xc0(%rsp)
movaps %xmm0,0xb0(%rsp)
movaps %xmm0,0xa0(%rsp)
movaps %xmm0,0x90(%rsp)
movaps %xmm0,0x80(%rsp)
movaps %xmm0,0x70(%rsp)
movaps %xmm0,0x60(%rsp)
movaps %xmm0,0x50(%rsp)
movaps %xmm0,0x40(%rsp)
movaps %xmm0,0x30(%rsp)
movaps %xmm0,0x20(%rsp)
movaps %xmm0,0x10(%rsp)
movaps %xmm0,(%rsp)
mov    0x2e47(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rbx
mov    %rbx,%rsi
mov    $0x100,%edx
call   1040 <strerror_r@plt>
lea    0xe4e(%rip),%rdi
mov    %rbx,%rsi
mov    %rax,%rdx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@EINTR = global i32 0
@.str = [18 x i8] c"buf:%s ret_ptr:%s\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [256 x i8]
%7 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = bitcast [256 x i8]* %6 to i8*
%9 = load i32, i32* @EINTR
%10 = getelementptr inbounds [256 x i8], [256 x i8]* %6, i64 0, i64 0
%11 = call i8* @strerror_r(i32 %9, i8* %10, i32 256)
store i8* %11, i8** %7
%12 = getelementptr inbounds [256 x i8], [256 x i8]* %6, i64 0, i64 0
%13 = load i8*, i8** %7
%14 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %12, i8* %13)
ret i32 0
}

LLVM IR (-O2):
@EINTR = global i32 0
@.str = [18 x i8] c"buf:%s ret_ptr:%s\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [256 x i8]
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %3, i64 0, i64 0
%5 = load i32, i32* @EINTR
%6 = call i8* @strerror_r(i32 %5, i8* %4, i32 256)
%7 = call i32 @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %4, i8* %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ft_putchar(char);
int ft_print_numbers(void) {
  char c;
  c = '0';
  while (c <= '9') {
    ft_putchar(c);
    c++;
  }
  return (0);
}


x86 assembly (clang, -O0):
<ft_print_numbers>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x30,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
jg     113f <ft_print_numbers+0x2f>
movsbl -0x1(%rbp),%edi
call   1030 <ft_putchar@plt>
mov    -0x1(%rbp),%al
add    $0x1,%al
mov    %al,-0x1(%rbp)
jmp    111c <ft_print_numbers+0xc>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_print_numbers>:
push   %rax
mov    $0x30,%edi
call   1030 <ft_putchar@plt>
mov    $0x31,%edi
call   1030 <ft_putchar@plt>
mov    $0x32,%edi
call   1030 <ft_putchar@plt>
mov    $0x33,%edi
call   1030 <ft_putchar@plt>
mov    $0x34,%edi
call   1030 <ft_putchar@plt>
mov    $0x35,%edi
call   1030 <ft_putchar@plt>
mov    $0x36,%edi
call   1030 <ft_putchar@plt>
mov    $0x37,%edi
call   1030 <ft_putchar@plt>
mov    $0x38,%edi
call   1030 <ft_putchar@plt>
mov    $0x39,%edi
call   1030 <ft_putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ft_print_numbers() {
%1 = alloca i8
store i8 48, i8* %1
br label %2
2: ; preds = %6, %0
%3 = load i8, i8* %1
%4 = sext i8 %3 to i32
%5 = icmp sle i32 %4, 57
br i1 %5, label %6, label %11
6: ; preds = %2
%7 = load i8, i8* %1
%8 = call i32 @ft_putchar(i8 signext %7)
%9 = load i8, i8* %1
%10 = add i8 %9, 1
store i8 %10, i8* %1
br label %2
11: ; preds = %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ft_print_numbers() {
%1 = tail call i32 @ft_putchar(i8 signext 48)
%2 = tail call i32 @ft_putchar(i8 signext 49)
%3 = tail call i32 @ft_putchar(i8 signext 50)
%4 = tail call i32 @ft_putchar(i8 signext 51)
%5 = tail call i32 @ft_putchar(i8 signext 52)
%6 = tail call i32 @ft_putchar(i8 signext 53)
%7 = tail call i32 @ft_putchar(i8 signext 54)
%8 = tail call i32 @ft_putchar(i8 signext 55)
%9 = tail call i32 @ft_putchar(i8 signext 56)
%10 = tail call i32 @ft_putchar(i8 signext 57)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ clear();
int /*<<< orphan*/ getch();
int /*<<< orphan*/ refresh();
void display_hide() {
  clear();
  refresh();
  getch();
}


x86 assembly (clang, -O0):
<display_hide>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <clear@plt>
mov    $0x0,%al
call   1030 <refresh@plt>
mov    $0x0,%al
call   1040 <getch@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_hide>:
push   %rax
xor    %eax,%eax
call   1050 <clear@plt>
xor    %eax,%eax
call   1030 <refresh@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <getch@plt>

LLVM IR (-O0):
define void @display_hide() {
%1 = call i32 (...) @clear()
%2 = call i32 (...) @refresh()
%3 = call i32 (...) @getch()
ret void
}

LLVM IR (-O2):
define void @display_hide() {
%1 = tail call i32 (...) @clear()
%2 = tail call i32 (...) @refresh()
%3 = tail call i32 (...) @getch()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ complement_rna(char *);
int /*<<< orphan*/ reverse(char *);
void revcomp_rna(char *seq) {
  complement_rna(seq);
  reverse(seq);
}


x86 assembly (clang, -O0):
<revcomp_rna>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <complement_rna@plt>
mov    -0x8(%rbp),%rdi
call   1030 <reverse@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<revcomp_rna>:
push   %rbx
mov    %rdi,%rbx
call   1040 <complement_rna@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <reverse@plt>

LLVM IR (-O0):
define void @revcomp_rna(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @complement_rna(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @reverse(i8* %5)
ret void
}

LLVM IR (-O2):
define void @revcomp_rna(i8* %0) {
%2 = tail call i32 @complement_rna(i8* %0)
%3 = tail call i32 @reverse(i8* %0)
ret void
}
/* Variables and functions */
scalar_t__ snoopy_genericregistry_doesIdExist(char **, int);
char *snoopy_genericregistry_getName(char *regArray[], int itemId) {
  if (snoopy_genericregistry_doesIdExist(regArray, itemId)) {
    return regArray[itemId];
  }
  return NULL;
}


x86 assembly (clang, -O0):
<snoopy_genericregistry_getName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <snoopy_genericregistry_doesIdExist@plt>
cmp    $0x0,%rax
je     114a <snoopy_genericregistry_getName+0x3a>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
mov    %rax,-0x8(%rbp)
jmp    1152 <snoopy_genericregistry_getName+0x42>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<snoopy_genericregistry_getName>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <snoopy_genericregistry_doesIdExist@plt>
test   %rax,%rax
je     112b <snoopy_genericregistry_getName+0x1b>
movslq %ebp,%rax
mov    (%rbx,%rax,8),%rax
jmp    112d <snoopy_genericregistry_getName+0x1d>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @snoopy_genericregistry_getName(i8** %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8**
%5 = alloca i32
store i8** %0, i8*** %4
store i32 %1, i32* %5
%6 = load i8**, i8*** %4
%7 = load i32, i32* %5
%8 = call i64 @snoopy_genericregistry_doesIdExist(i8** %6, i32 %7)
%9 = icmp ne i64 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %2
%11 = load i8**, i8*** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
store i8* %15, i8** %3
br label %17
16: ; preds = %2
store i8* null, i8** %3
br label %17
17: ; preds = %16, %10
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @snoopy_genericregistry_getName(i8** %0, i32 %1) {
%3 = tail call i64 @snoopy_genericregistry_doesIdExist(i8** %0, i32 %1)
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i8*, i8** %0, i64 %6
%8 = load i8*, i8** %7
br label %9
9: ; preds = %2, %5
%10 = phi i8* [ %8, %5 ], [ null, %2 ]
ret i8* %10
}
void gtk_icon_size_from_name() {}


x86 assembly (clang, -O0):
<gtk_icon_size_from_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_size_from_name>:
ret

LLVM IR (-O0):
define void @gtk_icon_size_from_name() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_size_from_name() {
ret void
}
/* Variables and functions */
double sin(double);
double c3(double x) { return sin(3.14 + x); }


x86 assembly (clang, -O0):
<c3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1030 <sin@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c3>:
addsd  0xee8(%rip),%xmm0
jmp    1030 <sin@plt>

LLVM IR (-O0):
define double @c3(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double 3.140000e+00, %3
%5 = call double @sin(double %4)
ret double %5
}

LLVM IR (-O2):
define double @c3(double %0) {
%2 = fadd double %0, 3.140000e+00
%3 = tail call double @sin(double %2)
ret double %3
}
/* Type definitions */
struct option {
  int dummy;
};
struct _getopt_data {
  int dummy;
};

/* Variables and functions */
int _getopt_internal_r(int, char *const *, char const *, struct option const *,
                       int *, int, struct _getopt_data *);
int _getopt_long_only_r(int argc, char *const *argv, const char *options,
                        const struct option *long_options, int *opt_index,
                        struct _getopt_data *d) {
  return _getopt_internal_r(argc, argv, options, long_options, opt_index, 1, d);
}


x86 assembly (clang, -O0):
<_getopt_long_only_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x28(%rbp),%r8
mov    -0x30(%rbp),%rax
mov    $0x1,%r9d
mov    %rax,(%rsp)
call   1030 <_getopt_internal_r@plt>
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_getopt_long_only_r>:
push   %rax
mov    %r9,(%rsp)
mov    $0x1,%r9d
call   1030 <_getopt_internal_r@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.option = type { i32 }
%struct._getopt_data = type { i32 }
define i32 @_getopt_long_only_r(i32 %0, i8** %1, i8* %2, %struct.option* %3, i32* %4, %struct._getopt_data* %5) {
%7 = alloca i32
%8 = alloca i8**
%9 = alloca i8*
%10 = alloca %struct.option*
%11 = alloca i32*
%12 = alloca %struct._getopt_data*
store i32 %0, i32* %7
store i8** %1, i8*** %8
store i8* %2, i8** %9
store %struct.option* %3, %struct.option** %10
store i32* %4, i32** %11
store %struct._getopt_data* %5, %struct._getopt_data** %12
%13 = load i32, i32* %7
%14 = load i8**, i8*** %8
%15 = load i8*, i8** %9
%16 = load %struct.option*, %struct.option** %10
%17 = load i32*, i32** %11
%18 = load %struct._getopt_data*, %struct._getopt_data** %12
%19 = call i32 @_getopt_internal_r(i32 %13, i8** %14, i8* %15, %struct.option* %16, i32* %17, i32 1, %struct._getopt_data* %18)
ret i32 %19
}

LLVM IR (-O2):
%struct.option = type { i32 }
%struct._getopt_data = type { i32 }
define i32 @_getopt_long_only_r(i32 %0, i8** %1, i8* %2, %struct.option* %3, i32* %4, %struct._getopt_data* %5) {
%7 = tail call i32 @_getopt_internal_r(i32 %0, i8** %1, i8* %2, %struct.option* %3, i32* %4, i32 1, %struct._getopt_data* %5)
ret i32 %7
}
/* Variables and functions */
scalar_t__ strtol(char const *, int /*<<< orphan*/, int);
int mc_int32_value(const char *value) {
  return (NULL != value) ? (int)strtol(value, 0, 10) : 0;
}


x86 assembly (clang, -O0):
<mc_int32_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmp    -0x8(%rbp),%rax
je     1140 <mc_int32_value+0x30>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0xa,%edx
call   1030 <strtol@plt>
mov    %eax,-0xc(%rbp)
jmp    114a <mc_int32_value+0x3a>
xor    %eax,%eax
mov    %eax,-0xc(%rbp)
jmp    114a <mc_int32_value+0x3a>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mc_int32_value>:
test   %rdi,%rdi
je     1127 <mc_int32_value+0x17>
push   %rax
xor    %esi,%esi
mov    $0xa,%edx
call   1030 <strtol@plt>
add    $0x8,%rsp
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mc_int32_value(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* null, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i64 @strtol(i8* %6, i32 0, i32 10)
%8 = trunc i64 %7 to i32
br label %10
9: ; preds = %1
br label %10
10: ; preds = %9, %5
%11 = phi i32 [ %8, %5 ], [ 0, %9 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @mc_int32_value(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i64 @strtol(i8* %0, i32 0, i32 10)
%5 = trunc i64 %4 to i32
br label %6
6: ; preds = %1, %3
%7 = phi i32 [ %5, %3 ], [ 0, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ buffer_write(int, int, char *, int);
void writeblock(int device, int blockno, char *buffer) {
  buffer_write(device, blockno, buffer, 1);
}


x86 assembly (clang, -O0):
<writeblock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    $0x1,%ecx
call   1030 <buffer_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<writeblock>:
mov    $0x1,%ecx
jmp    1030 <buffer_write@plt>

LLVM IR (-O0):
define void @writeblock(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @buffer_write(i32 %7, i32 %8, i8* %9, i32 1)
ret void
}

LLVM IR (-O2):
define void @writeblock(i32 %0, i32 %1, i8* %2) {
%4 = tail call i32 @buffer_write(i32 %0, i32 %1, i8* %2, i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int ioctl(int, int, int *);
int /*<<< orphan*/ stderr;
int ivshmem_recv(int fd, int ivshmem_cmd) {
  int rv, buf;
  buf = 0;
  rv = ioctl(fd, ivshmem_cmd, &buf);
  if (rv < 0) {
    fprintf(stderr, "error on ioctl call\n");
    return rv;
  }
  return buf;
}


x86 assembly (clang, -O0):
<ivshmem_recv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
lea    -0x14(%rbp),%rdx
call   1030 <ioctl@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    1171 <ivshmem_recv+0x51>
mov    0x2e88(%rip),%rax
mov    (%rax),%edi
lea    0xe9f(%rip),%rsi
call   1040 <fprintf@plt>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1177 <ivshmem_recv+0x57>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ivshmem_recv>:
push   %rbx
sub    $0x10,%rsp
movl   $0x0,0xc(%rsp)
lea    0xc(%rsp),%rdx
call   1030 <ioctl@plt>
test   %eax,%eax
js     1141 <ivshmem_recv+0x21>
mov    0xc(%rsp),%ebx
jmp    1158 <ivshmem_recv+0x38>
mov    %eax,%ebx
mov    0x2e96(%rip),%rax
mov    (%rax),%edi
lea    0xead(%rip),%rsi
call   1040 <fprintf@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"error on ioctl call\0A\00"
define i32 @ivshmem_recv(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 0, i32* %7
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = call i32 @ioctl(i32 %8, i32 %9, i32* %7)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %2
%14 = load i32, i32* @stderr
%15 = call i32 @fprintf(i32 %14, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%16 = load i32, i32* %6
store i32 %16, i32* %3
br label %19
17: ; preds = %2
%18 = load i32, i32* %7
store i32 %18, i32* %3
br label %19
19: ; preds = %17, %13
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"error on ioctl call\0A\00"
define i32 @ivshmem_recv(i32 %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%5 = call i32 @ioctl(i32 %0, i32 %1, i32* %3)
%6 = icmp slt i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* @stderr
%9 = call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
br label %12
10: ; preds = %2
%11 = load i32, i32* %3
br label %12
12: ; preds = %10, %7
%13 = phi i32 [ %5, %7 ], [ %11, %10 ]
ret i32 %13
}
/* Variables and functions */
size_t spinel_strnlen_(const char *s, size_t maxlen) {
  size_t ret;
  for (ret = 0; (ret < maxlen) && (s[ret] != 0); ret++) {
  }
  return ret;
}


x86 assembly (clang, -O0):
<spinel_strnlen_>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
xor    %eax,%eax
cmp    -0x10(%rbp),%rcx
mov    %al,-0x19(%rbp)
jae    113c <spinel_strnlen_+0x3c>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
test   $0x1,%al
jne    114c <spinel_strnlen_+0x4c>
jmp    1162 <spinel_strnlen_+0x62>
jmp    1151 <spinel_strnlen_+0x51>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <spinel_strnlen_+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<spinel_strnlen_>:
xor    %eax,%eax
test   %rsi,%rsi
je     1122 <spinel_strnlen_+0x22>
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,(%rdi,%rax,1)
je     1122 <spinel_strnlen_+0x22>
add    $0x1,%rax
cmp    %rax,%rsi
jne    1110 <spinel_strnlen_+0x10>
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @spinel_strnlen_(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %20, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %17
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i8, i8* %11, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 0
br label %17
17: ; preds = %10, %6
%18 = phi i1 [ false, %6 ], [ %16, %10 ]
br i1 %18, label %19, label %23
19: ; preds = %17
br label %20
20: ; preds = %19
%21 = load i64, i64* %5
%22 = add i64 %21, 1
store i64 %22, i64* %5
br label %6
23: ; preds = %17
%24 = load i64, i64* %5
ret i64 %24
}

LLVM IR (-O2):
define i64 @spinel_strnlen_(i8* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %12, label %4
4: ; preds = %2, %9
%5 = phi i64 [ %10, %9 ], [ 0, %2 ]
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = add nuw i64 %5, 1
%11 = icmp eq i64 %10, %1
br i1 %11, label %12, label %4
12: ; preds = %4, %9, %2
%13 = phi i64 [ 0, %2 ], [ %1, %9 ], [ %5, %4 ]
ret i64 %13
}