#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint32_t;
typedef int ui32Base;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int _PWMGenValid(int);
void PWMGenConfigure(uint32_t ui32Base, uint32_t ui32Gen, uint32_t ui32Config) {
  ASSERT((ui32Base == 0x40028000) || (ui32Base == 0x40029000));
  ASSERT(_PWMGenValid(ui32Gen));
  ui32Gen = ((ui32Base) + (ui32Gen));
  (*((volatile uint32_t *)(ui32Gen + 0x00000000))) =
      (((*((volatile uint32_t *)(ui32Gen + 0x00000000))) &
        ~(0x00000002 | 0x00000004 | 0x00040000 | 0x00020000 | 0x00010000 |
          0x0000C000 | 0x00003000 | 0x00000C00 | 0x00000300 | 0x000000C0 |
          0x00000008 | 0x00000010 | 0x00000020)) |
       ui32Config);
  if (ui32Config & 0x00000002) {
    (*((volatile uint32_t *)(ui32Gen + 0x00000020))) =
        (0x00000030 | 0x00000080);
    (*((volatile uint32_t *)(ui32Gen + 0x00000024))) =
        (0x00000300 | 0x00000800);
  } else {
    (*((volatile uint32_t *)(ui32Gen + 0x00000020))) =
        (0x0000000C | 0x00000080);
    (*((volatile uint32_t *)(ui32Gen + 0x00000024))) =
        (0x0000000C | 0x00000800);
  }
}


x86 assembly (clang, -O0):
<PWMGenConfigure>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x1,%al
cmpl   $0x40028000,-0x4(%rbp)
mov    %al,-0xd(%rbp)
je     1150 <PWMGenConfigure+0x30>
cmpl   $0x40029000,-0x4(%rbp)
sete   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
mov    -0x8(%rbp),%edi
call   1030 <_PWMGenValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
and    $0xfff80001,%ecx
or     -0xc(%rbp),%ecx
mov    -0x8(%rbp),%eax
add    $0x0,%eax
cltq
mov    %ecx,(%rax)
mov    -0xc(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     11c2 <PWMGenConfigure+0xa2>
mov    -0x8(%rbp),%eax
add    $0x20,%eax
cltq
movl   $0xb0,(%rax)
mov    -0x8(%rbp),%eax
add    $0x24,%eax
cltq
movl   $0xb00,(%rax)
jmp    11de <PWMGenConfigure+0xbe>
mov    -0x8(%rbp),%eax
add    $0x20,%eax
cltq
movl   $0x8c,(%rax)
mov    -0x8(%rbp),%eax
add    $0x24,%eax
cltq
movl   $0x80c,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenConfigure>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40028000,%eax
sete   %dil
call   1040 <ASSERT@plt>
mov    %ebp,%edi
call   1030 <_PWMGenValid@plt>
mov    %eax,%edi
call   1040 <ASSERT@plt>
movslq %ebp,%rax
movslq %ebx,%rcx
mov    $0xfff80001,%edx
and    (%rax,%rcx,1),%edx
or     %r14d,%edx
mov    %edx,(%rax,%rcx,1)
test   $0x2,%r14b
mov    $0x8c,%edx
mov    $0xb0,%esi
cmove  %edx,%esi
mov    $0x80c,%edx
mov    $0xb00,%edi
cmove  %edx,%edi
mov    %esi,0x20(%rax,%rcx,1)
mov    %edi,0x24(%rax,%rcx,1)
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @PWMGenConfigure(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 1073905664
br i1 %8, label %12, label %9
9: ; preds = %3
%10 = load i32, i32* %4
%11 = icmp eq i32 %10, 1073909760
br label %12
12: ; preds = %9, %3
%13 = phi i1 [ true, %3 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
%15 = call i32 @ASSERT(i32 %14)
%16 = load i32, i32* %5
%17 = call i32 @_PWMGenValid(i32 %16)
%18 = call i32 @ASSERT(i32 %17)
%19 = load i32, i32* %4
%20 = load i32, i32* %5
%21 = add nsw i32 %19, %20
store i32 %21, i32* %5
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 0
%24 = sext i32 %23 to i64
%25 = inttoptr i64 %24 to i32*
%26 = load volatile i32, i32* %25
%27 = and i32 %26, -524287
%28 = load i32, i32* %6
%29 = or i32 %27, %28
%30 = load i32, i32* %5
%31 = add nsw i32 %30, 0
%32 = sext i32 %31 to i64
%33 = inttoptr i64 %32 to i32*
store volatile i32 %29, i32* %33
%34 = load i32, i32* %6
%35 = and i32 %34, 2
%36 = icmp ne i32 %35, 0
br i1 %36, label %37, label %46
37: ; preds = %12
%38 = load i32, i32* %5
%39 = add nsw i32 %38, 32
%40 = sext i32 %39 to i64
%41 = inttoptr i64 %40 to i32*
store volatile i32 176, i32* %41
%42 = load i32, i32* %5
%43 = add nsw i32 %42, 36
%44 = sext i32 %43 to i64
%45 = inttoptr i64 %44 to i32*
store volatile i32 2816, i32* %45
br label %55
46: ; preds = %12
%47 = load i32, i32* %5
%48 = add nsw i32 %47, 32
%49 = sext i32 %48 to i64
%50 = inttoptr i64 %49 to i32*
store volatile i32 140, i32* %50
%51 = load i32, i32* %5
%52 = add nsw i32 %51, 36
%53 = sext i32 %52 to i64
%54 = inttoptr i64 %53 to i32*
store volatile i32 2060, i32* %54
br label %55
55: ; preds = %46, %37
ret void
}

LLVM IR (-O2):
define void @PWMGenConfigure(i32 %0, i32 %1, i32 %2) {
%4 = and i32 %0, -4097
%5 = icmp eq i32 %4, 1073905664
%6 = zext i1 %5 to i32
%7 = tail call i32 @ASSERT(i32 %6)
%8 = tail call i32 @_PWMGenValid(i32 %1)
%9 = tail call i32 @ASSERT(i32 %8)
%10 = add nsw i32 %1, %0
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
%14 = and i32 %13, -524287
%15 = or i32 %14, %2
store volatile i32 %15, i32* %12
%16 = and i32 %2, 2
%17 = icmp eq i32 %16, 0
%18 = add nsw i32 %10, 32
%19 = sext i32 %18 to i64
%20 = inttoptr i64 %19 to i32*
%21 = select i1 %17, i32 140, i32 176
%22 = select i1 %17, i32 2060, i32 2816
store volatile i32 %21, i32* %20
%23 = add nsw i32 %10, 36
%24 = sext i32 %23 to i64
%25 = inttoptr i64 %24 to i32*
store volatile i32 %22, i32* %25
ret void
}