void WriteVarLen(value) long value;
{
  long buffer;
  buffer = value & 0x7f;
  while ((value >>= 7) > 0) {
    buffer <<= 8;
    buffer |= 0x80;
    buffer += (value & 0x7f);
  }
  while (1) {
    eputc((char)(buffer & 0xff));
    if (buffer & 0x80)
      buffer >>= 8;
    else
      return;
  }
}


x86 assembly (clang, -O0):
<WriteVarLen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0x7f,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sar    $0x7,%rax
mov    %rax,-0x8(%rbp)
cmp    $0x0,%rax
jle    116d <WriteVarLen+0x5d>
mov    -0x10(%rbp),%rax
shl    $0x8,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
or     $0x80,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
and    $0x7f,%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1128 <WriteVarLen+0x18>
jmp    1172 <WriteVarLen+0x62>
mov    -0x10(%rbp),%rax
and    $0xff,%rax
movsbl %al,%edi
mov    $0x0,%al
call   1030 <eputc@plt>
mov    -0x10(%rbp),%rax
and    $0x80,%rax
cmp    $0x0,%rax
je     11ab <WriteVarLen+0x9b>
mov    -0x10(%rbp),%rax
sar    $0x8,%rax
mov    %rax,-0x10(%rbp)
jmp    11b1 <WriteVarLen+0xa1>
add    $0x10,%rsp
pop    %rbp
ret
jmp    1172 <WriteVarLen+0x62>

x86 assembly (clang, -O2):
<WriteVarLen>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%eax
and    $0x7f,%eax
cmp    $0x80,%rdi
jl     1156 <WriteVarLen+0x46>
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
nop
sar    $0x7,%rcx
shl    $0x8,%rax
movzbl %cl,%ebx
or     %rax,%rbx
or     $0x80,%rbx
mov    %rbx,%rax
cmp    $0x3fff,%rdi
mov    %rcx,%rdi
jg     1130 <WriteVarLen+0x20>
jmp    1159 <WriteVarLen+0x49>
mov    %rax,%rbx
mov    %rbx,%r14
nopl   0x0(%rax)
movsbl %bl,%edi
xor    %eax,%eax
call   1030 <eputc@plt>
sar    $0x8,%r14
test   $0x80,%bl
mov    %r14,%rbx
jne    1160 <WriteVarLen+0x50>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @WriteVarLen(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, 127
store i64 %5, i64* %3
br label %6
6: ; preds = %10, %1
%7 = load i64, i64* %2
%8 = ashr i64 %7, 7
store i64 %8, i64* %2
%9 = icmp sgt i64 %8, 0
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i64, i64* %3
%12 = shl i64 %11, 8
store i64 %12, i64* %3
%13 = load i64, i64* %3
%14 = or i64 %13, 128
store i64 %14, i64* %3
%15 = load i64, i64* %2
%16 = and i64 %15, 127
%17 = load i64, i64* %3
%18 = add nsw i64 %17, %16
store i64 %18, i64* %3
br label %6
19: ; preds = %6
br label %20
20: ; preds = %19, %33
%21 = load i64, i64* %3
%22 = and i64 %21, 255
%23 = trunc i64 %22 to i8
%24 = sext i8 %23 to i32
%25 = call i32 (i32, ...) bitcast (i32 (...)* @eputc to i32 (i32, ...)*)(i32 %24)
%26 = load i64, i64* %3
%27 = and i64 %26, 128
%28 = icmp ne i64 %27, 0
br i1 %28, label %29, label %32
29: ; preds = %20
%30 = load i64, i64* %3
%31 = ashr i64 %30, 8
store i64 %31, i64* %3
br label %33
32: ; preds = %20
ret void
33: ; preds = %29
br label %20
}

LLVM IR (-O2):
define void @WriteVarLen(i64 %0) {
%2 = and i64 %0, 127
%3 = icmp sgt i64 %0, 127
br i1 %3, label %4, label %13
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ %0, %1 ]
%6 = phi i64 [ %11, %4 ], [ %2, %1 ]
%7 = ashr i64 %5, 7
%8 = shl i64 %6, 8
%9 = and i64 %7, 127
%10 = or i64 %8, %9
%11 = or i64 %10, 128
%12 = icmp sgt i64 %5, 16383
br i1 %12, label %4, label %13
13: ; preds = %4, %1
%14 = phi i64 [ %2, %1 ], [ %11, %4 ]
br label %15
15: ; preds = %13, %15
%16 = phi i64 [ %23, %15 ], [ %14, %13 ]
%17 = trunc i64 %16 to i32
%18 = shl i32 %17, 24
%19 = ashr exact i32 %18, 24
%20 = tail call i32 (i32, ...) bitcast (i32 (...)* @eputc to i32 (i32, ...)*)(i32 %19)
%21 = and i64 %16, 128
%22 = icmp eq i64 %21, 0
%23 = ashr i64 %16, 8
br i1 %22, label %24, label %15
24: ; preds = %15
ret void
}