xunge/DecIR huggingface dataset:
void free_vector(vec, nl, nh) float *vec;
int nl, nh;
{ free(vec + nl); }


x86 assembly (clang, -O0):
<free_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_vector>:
movslq %esi,%rax
lea    (%rdi,%rax,4),%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_vector(float* %0, i32 %1, i32 %2) {
%4 = alloca float*
%5 = alloca i32
%6 = alloca i32
store float* %0, float** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load float*, float** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds float, float* %7, i64 %9
%11 = bitcast float* %10 to i8*
ret void
}

LLVM IR (-O2):
define void @free_vector(float* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds float, float* %0, i64 %4
%6 = bitcast float* %5 to i8*
tail call void @free(i8* %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void usage(char *name) {
  printf("usage:\n%s <boot image> <output file|device>\n", name);
  return;
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"usage:\0A%s <boot image> <output file|device>\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [45 x i8] c"usage:\0A%s <boot image> <output file|device>\0A\00"
define void @usage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ install_signal_handler(int, int /*<<< orphan*/);
int /*<<< orphan*/ signal(int, int /*<<< orphan*/);
void clear_pending_blocked_signals(int signo) {
  install_signal_handler(signo, signal(signo, SIG_IGN));
}


x86 assembly (clang, -O0):
<clear_pending_blocked_signals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ead(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%esi
call   1040 <install_signal_handler@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_pending_blocked_signals>:
push   %rbx
mov    %edi,%ebx
mov    0x2ebe(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1040 <install_signal_handler@plt>

LLVM IR (-O0):
@SIG_IGN = global i32 0
define void @clear_pending_blocked_signals(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = load i32, i32* @SIG_IGN
%6 = call i32 @signal(i32 %4, i32 %5)
%7 = call i32 @install_signal_handler(i32 %3, i32 %6)
ret void
}

LLVM IR (-O2):
@SIG_IGN = global i32 0
define void @clear_pending_blocked_signals(i32 %0) {
%2 = load i32, i32* @SIG_IGN
%3 = tail call i32 @signal(i32 %0, i32 %2)
%4 = tail call i32 @install_signal_handler(i32 %0, i32 %3)
ret void
}
/* Variables and functions */
uintptr_t ptr_align_floor(uintptr_t ptr, uintptr_t align) {
  return (ptr & ~(align - 1));
}


x86 assembly (clang, -O0):
<ptr_align_floor>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
xor    $0xffffffffffffffff,%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr_align_floor>:
mov    %rsi,%rax
neg    %rax
and    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @ptr_align_floor(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub i64 %6, 1
%8 = xor i64 %7, -1
%9 = and i64 %5, %8
ret i64 %9
}

LLVM IR (-O2):
define i64 @ptr_align_floor(i64 %0, i64 %1) {
%3 = sub i64 0, %1
%4 = and i64 %3, %0
ret i64 %4
}
/* Type definitions */
typedef double double_t;

/* Variables and functions */
double get_RPM(int /*<<< orphan*/);
int /*<<< orphan*/ get_TPS();
double get_alphaN_table(double, int /*<<< orphan*/);
double register_fueling() {
  double_t rpm = get_RPM(0);
  if (rpm < 200.0 || rpm > 20000.0) {
    return 0.0;
  }
  return get_alphaN_table(rpm, get_TPS());
}


x86 assembly (clang, -O0):
<register_fueling>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
xor    %edi,%edi
call   1030 <get_RPM@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  0xeb4(%rip),%xmm0
ucomisd -0x10(%rbp),%xmm0
ja     116e <register_fueling+0x3e>
movsd  -0x10(%rbp),%xmm0
movsd  0xea4(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    117b <register_fueling+0x4b>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    119d <register_fueling+0x6d>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    $0x0,%al
call   1040 <get_TPS@plt>
movsd  -0x18(%rbp),%xmm0
mov    %eax,%edi
call   1050 <get_alphaN_table@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<register_fueling>:
push   %rax
xor    %edi,%edi
call   1030 <get_RPM@plt>
movsd  0xec0(%rip),%xmm1
ucomisd %xmm0,%xmm1
ja     1169 <register_fueling+0x39>
ucomisd 0xeba(%rip),%xmm0
ja     1169 <register_fueling+0x39>
xor    %eax,%eax
movsd  %xmm0,(%rsp)
call   1040 <get_TPS@plt>
movsd  (%rsp),%xmm0
mov    %eax,%edi
pop    %rax
jmp    1050 <get_alphaN_table@plt>
xorpd  %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @register_fueling() {
%1 = alloca double
%2 = alloca double
%3 = call double @get_RPM(i32 0)
store double %3, double* %2
%4 = load double, double* %2
%5 = fcmp olt double %4, 2.000000e+02
br i1 %5, label %9, label %6
6: ; preds = %0
%7 = load double, double* %2
%8 = fcmp ogt double %7, 2.000000e+04
br i1 %8, label %9, label %10
9: ; preds = %6, %0
store double 0.000000e+00, double* %1
br label %14
10: ; preds = %6
%11 = load double, double* %2
%12 = call i32 (...) @get_TPS()
%13 = call double @get_alphaN_table(double %11, i32 %12)
store double %13, double* %1
br label %14
14: ; preds = %10, %9
%15 = load double, double* %1
ret double %15
}

LLVM IR (-O2):
define double @register_fueling() {
%1 = tail call double @get_RPM(i32 0)
%2 = fcmp olt double %1, 2.000000e+02
%3 = fcmp ogt double %1, 2.000000e+04
%4 = or i1 %2, %3
br i1 %4, label %8, label %5
5: ; preds = %0
%6 = tail call i32 (...) @get_TPS()
%7 = tail call double @get_alphaN_table(double %1, i32 %6)
br label %8
8: ; preds = %0, %5
%9 = phi double [ %7, %5 ], [ 0.000000e+00, %0 ]
ret double %9
}
/* Variables and functions */
bool SHAREMIND_MAP_KEY_COPY_signed_char(signed char *const dest,
                                        signed char const src) {
  return (((*dest) = src), true);
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_COPY_signed_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_COPY_signed_char>:
mov    %sil,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_COPY_signed_char(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load i8*, i8** %3
store i8 %5, i8* %6
ret i32 1
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_COPY_signed_char(i8* nocapture writeonly %0, i8 signext %1) {
store i8 %1, i8* %0
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ orgfx_cliprect(unsigned int, unsigned int, unsigned int,
                                  unsigned int);
int /*<<< orphan*/ orgfx_enable_cliprect(unsigned int);
void orgfxplus_clip(unsigned int x0, unsigned int y0, unsigned int x1,
                    unsigned int y1, unsigned int enable) {
  orgfx_enable_cliprect(enable);
  orgfx_cliprect(x0, y0, x1, y1);
}


x86 assembly (clang, -O0):
<orgfxplus_clip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1030 <orgfx_enable_cliprect@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1040 <orgfx_cliprect@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<orgfxplus_clip>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %ecx,%r14d
mov    %edx,%r15d
mov    %esi,%ebx
mov    %edi,%ebp
mov    %r8d,%edi
call   1030 <orgfx_enable_cliprect@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    %r15d,%edx
mov    %r14d,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <orgfx_cliprect@plt>

LLVM IR (-O0):
define void @orgfxplus_clip(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %10
%12 = call i32 @orgfx_enable_cliprect(i32 %11)
%13 = load i32, i32* %6
%14 = load i32, i32* %7
%15 = load i32, i32* %8
%16 = load i32, i32* %9
%17 = call i32 @orgfx_cliprect(i32 %13, i32 %14, i32 %15, i32 %16)
ret void
}

LLVM IR (-O2):
define void @orgfxplus_clip(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @orgfx_enable_cliprect(i32 %4)
%7 = tail call i32 @orgfx_cliprect(i32 %0, i32 %1, i32 %2, i32 %3)
ret void
}
void *arrayAddr(void *mem) {
  int *p = mem;
  return p + 4;
}


x86 assembly (clang, -O0):
<arrayAddr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arrayAddr>:
lea    0x10(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @arrayAddr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i64 4
%8 = bitcast i32* %7 to i8*
ret i8* %8
}

LLVM IR (-O2):
define i8* @arrayAddr(i8* readnone %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 16
ret i8* %2
}
/* Variables and functions */
int remainder(int a, int b) { return a % b; }


x86 assembly (clang, -O0):
<remainder>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<remainder>:
mov    %edi,%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @remainder(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @remainder(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int number, res;
  scanf("%d", &number);
  res = number * number;
  printf("%d", res);
  res = res * number;
  printf("\n%d", res);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xecb(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xe94(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
lea    0xed7(%rip),%rbx
lea    0x4(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <scanf@plt>
mov    0x4(%rsp),%ebp
imul   %ebp,%ebp
mov    %rbx,%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
imul   0x4(%rsp),%ebp
lea    0xeac(%rip),%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"\0A%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = load i32, i32* %2
%7 = mul nsw i32 %5, %6
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = load i32, i32* %3
%11 = load i32, i32* %2
%12 = mul nsw i32 %10, %11
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"\0A%d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = mul nsw i32 %4, %4
%6 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* %1
%8 = mul nsw i32 %7, %5
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char *, char *);
int is_version_flag(char *arg) {
  return !strcmp(arg, "--version") || !strcmp(arg, "-V");
}


x86 assembly (clang, -O0):
<is_version_flag>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcmp@plt>
mov    %eax,%ecx
mov    $0x1,%al
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
je     1157 <is_version_flag+0x47>
mov    -0x8(%rbp),%rdi
lea    0xec3(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_version_flag>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rsi
call   1030 <strcmp@plt>
test   %eax,%eax
je     113e <is_version_flag+0x2e>
lea    0xedf(%rip),%rsi
mov    %rbx,%rdi
call   1030 <strcmp@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [10 x i8] c"--version\00"
@.str.1 = [3 x i8] c"-V\00"
define i32 @is_version_flag(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcmp(i8* %3, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @strcmp(i8* %7, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ true, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
@.str = [10 x i8] c"--version\00"
@.str.1 = [3 x i8] c"-V\00"
define i32 @is_version_flag(i8* nocapture %0) {
%2 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(10) getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(3) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0))
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
size_t strlen(char *);
char *dos_last_dot(char *in) {
  size_t len = strlen(in);
  while (len--) {
    if (in[len] == '.') {
      return (in + len);
    }
  }
  return (0);
}


x86 assembly (clang, -O0):
<dos_last_dot>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
cmp    $0x0,%rax
je     116d <dos_last_dot+0x5d>
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x2e,%eax
jne    1168 <dos_last_dot+0x58>
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1175 <dos_last_dot+0x65>
jmp    1129 <dos_last_dot+0x19>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dos_last_dot>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rax,%rcx
xor    %eax,%eax
mov    %rcx,%rdx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
sub    $0x1,%rdx
jb     1146 <dos_last_dot+0x36>
cmpb   $0x2e,-0x1(%rbx,%rcx,1)
mov    %rdx,%rcx
jne    1130 <dos_last_dot+0x20>
add    %rdx,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @dos_last_dot(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @strlen(i8* %5)
store i64 %6, i64* %4
br label %7
7: ; preds = %22, %1
%8 = load i64, i64* %4
%9 = add i64 %8, -1
store i64 %9, i64* %4
%10 = icmp ne i64 %8, 0
br i1 %10, label %11, label %23
11: ; preds = %7
%12 = load i8*, i8** %3
%13 = load i64, i64* %4
%14 = getelementptr inbounds i8, i8* %12, i64 %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 46
br i1 %17, label %18, label %22
18: ; preds = %11
%19 = load i8*, i8** %3
%20 = load i64, i64* %4
%21 = getelementptr inbounds i8, i8* %19, i64 %20
store i8* %21, i8** %2
br label %24
22: ; preds = %11
br label %7
23: ; preds = %7
store i8* null, i8** %2
br label %24
24: ; preds = %23, %18
%25 = load i8*, i8** %2
ret i8* %25
}

LLVM IR (-O2):
define i8* @dos_last_dot(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
br label %3
3: ; preds = %7, %1
%4 = phi i64 [ %2, %1 ], [ %5, %7 ]
%5 = add i64 %4, -1
%6 = icmp eq i64 %4, 0
br i1 %6, label %13, label %7
7: ; preds = %3
%8 = getelementptr inbounds i8, i8* %0, i64 %5
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 46
br i1 %10, label %11, label %3
11: ; preds = %7
%12 = getelementptr inbounds i8, i8* %0, i64 %5
br label %13
13: ; preds = %3, %11
%14 = phi i8* [ %12, %11 ], [ null, %3 ]
ret i8* %14
}
/* Type definitions */
struct timespec {
  int member_1;
  int /*<<< orphan*/ member_0;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void delay100ms(void) {
  struct timespec ts = {0, 100 * 1000 * 1000};
  nanosleep(&ts, NULL);
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xee1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rax
movabs $0x5f5e10000000000,%rax
e1 f5 05
mov    %rax,(%rsp)
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
@__const.delay100ms.ts = %struct.timespec { i32 0, i32 100000000 }
define void @delay100ms() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = call i32 @nanosleep(%struct.timespec* %1, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define void @delay100ms() {
%1 = alloca i64
%2 = bitcast i64* %1 to %struct.timespec*
%3 = bitcast i64* %1 to i8*
store i64 429496729600000000, i64* %1
%4 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
/* Type definitions */
struct blk_mq_ctx {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ put_cpu();
void blk_mq_put_ctx(struct blk_mq_ctx *ctx) { put_cpu(); }


x86 assembly (clang, -O0):
<blk_mq_put_ctx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <put_cpu@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blk_mq_put_ctx>:
xor    %eax,%eax
jmp    1030 <put_cpu@plt>

LLVM IR (-O0):
%struct.blk_mq_ctx = type { i32 }
define void @blk_mq_put_ctx(%struct.blk_mq_ctx* %0) {
%2 = alloca %struct.blk_mq_ctx*
store %struct.blk_mq_ctx* %0, %struct.blk_mq_ctx** %2
%3 = call i32 (...) @put_cpu()
ret void
}

LLVM IR (-O2):
%struct.blk_mq_ctx = type { i32 }
define void @blk_mq_put_ctx(%struct.blk_mq_ctx* nocapture readnone %0) {
%2 = tail call i32 (...) @put_cpu()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LOCK_EX;
int /*<<< orphan*/ LOCK_SH;
int /*<<< orphan*/ LOCK_UN;
int flock(int, int /*<<< orphan*/);
int main(void) {
  int ret;
  ret = flock(1, LOCK_EX);
  (void)ret;
  ret = flock(1, LOCK_UN);
  (void)ret;
  ret = flock(1, LOCK_SH);
  (void)ret;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%esi
mov    $0x1,%edi
call   1030 <flock@plt>
mov    %eax,-0x8(%rbp)
mov    0x2e94(%rip),%rax
mov    (%rax),%esi
mov    $0x1,%edi
call   1030 <flock@plt>
mov    %eax,-0x8(%rbp)
mov    0x2e8e(%rip),%rax
mov    (%rax),%esi
mov    $0x1,%edi
call   1030 <flock@plt>
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%esi
mov    $0x1,%edi
call   1030 <flock@plt>
mov    0x2ea5(%rip),%rax
mov    (%rax),%esi
mov    $0x1,%edi
call   1030 <flock@plt>
mov    0x2ea2(%rip),%rax
mov    (%rax),%esi
mov    $0x1,%edi
call   1030 <flock@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@LOCK_EX = global i32 0
@LOCK_UN = global i32 0
@LOCK_SH = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* @LOCK_EX
%4 = call i32 @flock(i32 1, i32 %3)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = load i32, i32* @LOCK_UN
%7 = call i32 @flock(i32 1, i32 %6)
store i32 %7, i32* %2
%8 = load i32, i32* %2
%9 = load i32, i32* @LOCK_SH
%10 = call i32 @flock(i32 1, i32 %9)
store i32 %10, i32* %2
%11 = load i32, i32* %2
ret i32 0
}

LLVM IR (-O2):
@LOCK_EX = global i32 0
@LOCK_UN = global i32 0
@LOCK_SH = global i32 0
define i32 @main() {
%1 = load i32, i32* @LOCK_EX
%2 = tail call i32 @flock(i32 1, i32 %1)
%3 = load i32, i32* @LOCK_UN
%4 = tail call i32 @flock(i32 1, i32 %3)
%5 = load i32, i32* @LOCK_SH
%6 = tail call i32 @flock(i32 1, i32 %5)
ret i32 0
}
/* Variables and functions */
int load_tga(void const *filename, size_t len, void *data, void *link) {
  (void)filename;
  (void)len;
  (void)data;
  (void)link;
  return -1;
}


x86 assembly (clang, -O0):
<load_tga>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<load_tga>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @load_tga(i8* %0, i64 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i64 %1, i64* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i64, i64* %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
ret i32 -1
}

LLVM IR (-O2):
define i32 @load_tga(i8* nocapture readnone %0, i64 %1, i8* nocapture readnone %2, i8* nocapture readnone %3) {
ret i32 -1
}
void addReplyBulk(void) {
  _serverPanic("/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/"
               "heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c",
               18, "Function '%s' is disabled.", __func__);
}


x86 assembly (clang, -O0):
<addReplyBulk>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x12,%esi
lea    0xf79(%rip),%rdx
lea    0xf8d(%rip),%rcx
mov    $0x0,%al
call   1030 <_serverPanic@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<addReplyBulk>:
lea    0xee9(%rip),%rdi
lea    0xf82(%rip),%rdx
lea    0xf96(%rip),%rcx
mov    $0x12,%esi
xor    %eax,%eax
jmp    1030 <_serverPanic@plt>

LLVM IR (-O0):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.addReplyBulk = [13 x i8] c"addReplyBulk\00"
define void @addReplyBulk() {
%1 = call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 18, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__func__.addReplyBulk, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [160 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/CodisLabs/redis-port/refs/heads/redis-4.x-cgo/pkg/rdb/cgo_glue_meow.c\00"
@.str.1 = [27 x i8] c"Function '%s' is disabled.\00"
@__func__.addReplyBulk = [13 x i8] c"addReplyBulk\00"
define void @addReplyBulk() {
%1 = tail call i32 (i8*, i32, i8*, i8*, ...) bitcast (i32 (...)* @_serverPanic to i32 (i8*, i32, i8*, i8*, ...)*)(i8* getelementptr inbounds ([160 x i8], [160 x i8]* @.str, i64 0, i64 0), i32 18, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__func__.addReplyBulk, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char const *, size_t);
void strncpynt(char *dest, const char *src, size_t maxlen) {
  strncpy(dest, src, maxlen);
  if (maxlen > 0) {
    dest[maxlen - 1] = 0;
  }
}


x86 assembly (clang, -O0):
<strncpynt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncpy@plt>
cmpq   $0x0,-0x18(%rbp)
jbe    1150 <strncpynt+0x40>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strncpynt>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %rdi,%r14
call   1030 <strncpy@plt>
test   %rbx,%rbx
je     112a <strncpynt+0x1a>
movb   $0x0,-0x1(%rbx,%r14,1)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @strncpynt(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @strncpy(i8* %7, i8* %8, i64 %9)
%11 = load i64, i64* %6
%12 = icmp ugt i64 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %3
%14 = load i8*, i8** %4
%15 = load i64, i64* %6
%16 = sub i64 %15, 1
%17 = getelementptr inbounds i8, i8* %14, i64 %16
store i8 0, i8* %17
br label %18
18: ; preds = %13, %3
ret void
}

LLVM IR (-O2):
define void @strncpynt(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @strncpy(i8* %0, i8* %1, i64 %2)
%5 = icmp eq i64 %2, 0
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = add i64 %2, -1
%8 = getelementptr inbounds i8, i8* %0, i64 %7
store i8 0, i8* %8
br label %9
9: ; preds = %6, %3
ret void
}
int is_in_bound(int *arr, int size, int *ptr) {
  for (int i = 0; i < size; ++i) {
    if (ptr == &arr[i]) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<is_in_bound>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
mov    -0x24(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115d <is_in_bound+0x5d>
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq -0x24(%rbp),%rdx
shl    $0x2,%rdx
add    %rdx,%rcx
cmp    %rcx,%rax
jne    114a <is_in_bound+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1164 <is_in_bound+0x64>
jmp    114f <is_in_bound+0x4f>
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1116 <is_in_bound+0x16>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_in_bound>:
movslq %esi,%r8
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rax,%rsi
cmp    %r8,%rax
jge    1128 <is_in_bound+0x28>
lea    0x1(%rsi),%rax
lea    0x4(%rdi),%rcx
cmp    %rdx,%rdi
mov    %rcx,%rdi
jne    1110 <is_in_bound+0x10>
xor    %eax,%eax
cmp    %r8,%rsi
setl   %al
ret

LLVM IR (-O0):
define i32 @is_in_bound(i32* %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 0, i32* %8
br label %9
9: ; preds = %22, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %25
13: ; preds = %9
%14 = load i32*, i32** %7
%15 = load i32*, i32** %5
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = icmp eq i32* %14, %18
br i1 %19, label %20, label %21
20: ; preds = %13
store i32 1, i32* %4
br label %26
21: ; preds = %13
br label %22
22: ; preds = %21
%23 = load i32, i32* %8
%24 = add nsw i32 %23, 1
store i32 %24, i32* %8
br label %9
25: ; preds = %9
store i32 0, i32* %4
br label %26
26: ; preds = %25, %20
%27 = load i32, i32* %4
ret i32 %27
}

LLVM IR (-O2):
define i32 @is_in_bound(i32* readnone %0, i32 %1, i32* readnone %2) {
%4 = sext i32 %1 to i64
br label %5
5: ; preds = %5, %3
%6 = phi i64 [ %12, %5 ], [ 0, %3 ]
%7 = icmp slt i64 %6, %4
%8 = xor i1 %7, true
%9 = getelementptr inbounds i32, i32* %0, i64 %6
%10 = icmp eq i32* %9, %2
%11 = select i1 %8, i1 true, i1 %10
%12 = add nuw i64 %6, 1
br i1 %11, label %13, label %5
13: ; preds = %5
%14 = zext i1 %7 to i32
ret i32 %14
}
BOOST_AUTO_TEST_CASE(min) {
  TESTCASE2(min, 0, 0, 0);
  TESTCASE2(min, 0, 1, 0);
  TESTCASE2(min, 1, 0, 0);
  TESTCASE2(min, 1, 1, 1);
}


x86 assembly (clang, -O0):
<BOOST_AUTO_TEST_CASE>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
xor    %ecx,%ecx
mov    %ecx,%esi
mov    %ecx,%edx
mov    $0x0,%al
call   1030 <TESTCASE2@plt>
mov    -0x8(%rbp),%edi
xor    %ecx,%ecx
mov    $0x1,%edx
mov    %ecx,%esi
mov    $0x0,%al
call   1030 <TESTCASE2@plt>
mov    -0x8(%rbp),%edi
mov    $0x1,%esi
xor    %ecx,%ecx
mov    %ecx,%edx
mov    $0x0,%al
call   1030 <TESTCASE2@plt>
mov    -0x8(%rbp),%edi
mov    $0x1,%ecx
mov    %ecx,%esi
mov    %ecx,%edx
mov    $0x0,%al
call   1030 <TESTCASE2@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BOOST_AUTO_TEST_CASE>:
push   %rbx
mov    %edi,%ebx
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %eax,%eax
call   1030 <TESTCASE2@plt>
mov    %ebx,%edi
xor    %esi,%esi
mov    $0x1,%edx
xor    %ecx,%ecx
xor    %eax,%eax
call   1030 <TESTCASE2@plt>
mov    %ebx,%edi
mov    $0x1,%esi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %eax,%eax
call   1030 <TESTCASE2@plt>
mov    %ebx,%edi
mov    $0x1,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
xor    %eax,%eax
pop    %rbx
jmp    1030 <TESTCASE2@plt>

LLVM IR (-O0):
define i32 @BOOST_AUTO_TEST_CASE(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %4, i32 0, i32 0, i32 0)
%6 = load i32, i32* %3
%7 = call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %6, i32 0, i32 1, i32 0)
%8 = load i32, i32* %3
%9 = call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %8, i32 1, i32 0, i32 0)
%10 = load i32, i32* %3
%11 = call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %10, i32 1, i32 1, i32 1)
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @BOOST_AUTO_TEST_CASE(i32 %0) {
%2 = tail call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %0, i32 0, i32 0, i32 0)
%3 = tail call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %0, i32 0, i32 1, i32 0)
%4 = tail call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %0, i32 1, i32 0, i32 0)
%5 = tail call i32 (i32, i32, i32, i32, ...) bitcast (i32 (...)* @TESTCASE2 to i32 (i32, i32, i32, i32, ...)*)(i32 %0, i32 1, i32 1, i32 1)
ret i32 undef
}
char *baseline(char *base, unsigned long offset) { return base + offset; }


x86 assembly (clang, -O0):
<baseline>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<baseline>:
lea    (%rdi,%rsi,1),%rax
ret

LLVM IR (-O0):
define i8* @baseline(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = getelementptr inbounds i8, i8* %5, i64 %6
ret i8* %7
}

LLVM IR (-O2):
define i8* @baseline(i8* readnone %0, i64 %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 %1
ret i8* %3
}
/* Variables and functions */
int top(int);
int main(int argc, char **argv) { return top(-1) + top(1); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%edi
call   1030 <top@plt>
mov    %eax,-0x14(%rbp)
mov    $0x1,%edi
call   1030 <top@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xffffffff,%edi
call   1030 <top@plt>
mov    %eax,%ebx
mov    $0x1,%edi
call   1030 <top@plt>
add    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 @top(i32 -1)
%7 = call i32 @top(i32 1)
%8 = add nsw i32 %6, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @top(i32 -1)
%4 = tail call i32 @top(i32 1)
%5 = add nsw i32 %4, %3
ret i32 %5
}
int getInt(void) { return 5; }


x86 assembly (clang, -O0):
<getInt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getInt>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @getInt() {
ret i32 5
}

LLVM IR (-O2):
define i32 @getInt() {
ret i32 5
}
/* Variables and functions */
int /*<<< orphan*/ op_write1(int);
void op_enc_pop_de(void) { op_write1(0xd1); }


x86 assembly (clang, -O0):
<op_enc_pop_de>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd1,%edi
call   1030 <op_write1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_enc_pop_de>:
mov    $0xd1,%edi
jmp    1030 <op_write1@plt>

LLVM IR (-O0):
define void @op_enc_pop_de() {
%1 = call i32 @op_write1(i32 209)
ret void
}

LLVM IR (-O2):
define void @op_enc_pop_de() {
%1 = tail call i32 @op_write1(i32 209)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;

/* Variables and functions */
int64_t _prim_char_int(char p1) { return (int64_t)p1; }


x86 assembly (clang, -O0):
<_prim_char_int>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_prim_char_int>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @_prim_char_int(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @_prim_char_int(i8 signext %0) {
%2 = sext i8 %0 to i32
ret i32 %2
}
/* Variables and functions */
int __dup3(int, int, int);
int __dup2(int fd, int fd2) {
  int flags = 0;
  if (fd2 == fd)
    flags = -1;
  return __dup3(fd, fd2, flags);
}


x86 assembly (clang, -O0):
<__dup2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jne    1138 <__dup2+0x28>
movl   $0xffffffff,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <__dup3@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__dup2>:
xor    %edx,%edx
cmp    %edi,%esi
sete   %dl
neg    %edx
jmp    1030 <__dup3@plt>

LLVM IR (-O0):
define i32 @__dup2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp eq i32 %6, %7
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 -1, i32* %5
br label %10
10: ; preds = %9, %2
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = load i32, i32* %5
%14 = call i32 @__dup3(i32 %11, i32 %12, i32 %13)
ret i32 %14
}

LLVM IR (-O2):
define i32 @__dup2(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, %0
%4 = sext i1 %3 to i32
%5 = tail call i32 @__dup3(i32 %0, i32 %1, i32 %4)
ret i32 %5
}
/* Variables and functions */
scalar_t__ COND_CC();
int /*<<< orphan*/ EA_AY_PI_8();
int /*<<< orphan*/ m68ki_write_8(int /*<<< orphan*/, int);
void m68k_op_scc_8_pi(void) {
  m68ki_write_8(EA_AY_PI_8(), COND_CC() ? 0xff : 0);
}


x86 assembly (clang, -O0):
<m68k_op_scc_8_pi>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <EA_AY_PI_8@plt>
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <COND_CC@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rcx
xor    %esi,%esi
mov    $0xff,%eax
cmp    $0x0,%rcx
cmovne %eax,%esi
call   1050 <m68ki_write_8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_scc_8_pi>:
push   %rbp
push   %rbx
push   %rax
xor    %ebp,%ebp
xor    %eax,%eax
call   1040 <EA_AY_PI_8@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <COND_CC@plt>
test   %rax,%rax
mov    $0xff,%esi
cmove  %ebp,%esi
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <m68ki_write_8@plt>

LLVM IR (-O0):
define void @m68k_op_scc_8_pi() {
%1 = call i32 (...) @EA_AY_PI_8()
%2 = call i64 (...) @COND_CC()
%3 = icmp ne i64 %2, 0
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 255, i32 0
%6 = call i32 @m68ki_write_8(i32 %1, i32 %5)
ret void
}

LLVM IR (-O2):
define void @m68k_op_scc_8_pi() {
%1 = tail call i32 (...) @EA_AY_PI_8()
%2 = tail call i64 (...) @COND_CC()
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 0, i32 255
%5 = tail call i32 @m68ki_write_8(i32 %1, i32 %4)
ret void
}
double _f_rint(double x) {
  double _result;
  asm("frndint" : "=t"(_result) : "0"(x));
  return _result;
}


x86 assembly (clang, -O0):
<_f_rint>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
fldl   -0x18(%rbp)
frndint
fstpl  -0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_f_rint>:
movsd  %xmm0,-0x8(%rsp)
fldl   -0x8(%rsp)
frndint
fstpl  -0x10(%rsp)
movsd  -0x10(%rsp),%xmm0
ret

LLVM IR (-O0):
define double @_f_rint(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = call double asm "frndint", "={st},0,~{dirflag},~{fpsr},~{flags}"(double %4)
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @_f_rint(double %0) {
%2 = tail call double asm "frndint", "={st},0,~{dirflag},~{fpsr},~{flags}"(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ FLEXCOMM4_DriverIRQHandler();
__attribute__((weak)) void FLEXCOMM4_IRQHandler(void) {
  FLEXCOMM4_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<FLEXCOMM4_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FLEXCOMM4_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FLEXCOMM4_IRQHandler>:
xor    %eax,%eax
jmp    1030 <FLEXCOMM4_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @FLEXCOMM4_IRQHandler() {
%1 = call i32 (...) @FLEXCOMM4_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @FLEXCOMM4_IRQHandler() {
%1 = tail call i32 (...) @FLEXCOMM4_DriverIRQHandler()
ret void
}
/* Type definitions */
struct brw_compile {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ brw_wm_affine_st(struct brw_compile *, int, int, int);
int brw_wm_sample__alpha(struct brw_compile *, int, int, int, int);
int brw_wm_affine__alpha(struct brw_compile *p, int dw, int channel, int msg,
                         int result) {
  brw_wm_affine_st(p, dw, channel, msg);
  return brw_wm_sample__alpha(p, dw, channel, msg, result);
}


x86 assembly (clang, -O0):
<brw_wm_affine__alpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
call   1030 <brw_wm_affine_st@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
call   1040 <brw_wm_sample__alpha@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<brw_wm_affine__alpha>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
mov    %r8d,%r14d
mov    %ecx,%r15d
mov    %edx,%r12d
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <brw_wm_affine_st@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r12d,%edx
mov    %r15d,%ecx
mov    %r14d,%r8d
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
jmp    1040 <brw_wm_sample__alpha@plt>

LLVM IR (-O0):
%struct.brw_compile = type { i32 }
define i32 @brw_wm_affine__alpha(%struct.brw_compile* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.brw_compile*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store %struct.brw_compile* %0, %struct.brw_compile** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load %struct.brw_compile*, %struct.brw_compile** %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i32, i32* %9
%15 = call i32 @brw_wm_affine_st(%struct.brw_compile* %11, i32 %12, i32 %13, i32 %14)
%16 = load %struct.brw_compile*, %struct.brw_compile** %6
%17 = load i32, i32* %7
%18 = load i32, i32* %8
%19 = load i32, i32* %9
%20 = load i32, i32* %10
%21 = call i32 @brw_wm_sample__alpha(%struct.brw_compile* %16, i32 %17, i32 %18, i32 %19, i32 %20)
ret i32 %21
}

LLVM IR (-O2):
%struct.brw_compile = type { i32 }
define i32 @brw_wm_affine__alpha(%struct.brw_compile* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @brw_wm_affine_st(%struct.brw_compile* %0, i32 %1, i32 %2, i32 %3)
%7 = tail call i32 @brw_wm_sample__alpha(%struct.brw_compile* %0, i32 %1, i32 %2, i32 %3, i32 %4)
ret i32 %7
}
void CHAR() {
  asm volatile("popq %%rax\n\t"
               "movb (%%rax), %%al\n\t"
               "cbw\n\t"
               "cwde\n\t"
               "cdqe\n\t"
               "push %%rax\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<CHAR>:
push   %rbp
mov    %rsp,%rbp
pop    %rax
mov    (%rax),%al
cbtw
cwtl
cltq
push   %rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CHAR>:
pop    %rax
mov    (%rax),%al
cbtw
cwtl
cltq
push   %rax
ret

LLVM IR (-O0):
define void @CHAR() {
ret void
}

LLVM IR (-O2):
define void @CHAR() {
tail call void asm sideeffect "popq %rax\0A\09movb (%rax), %al\0A\09cbw\0A\09cwde\0A\09cdqe\0A\09push %rax\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ STDIN_FILENO;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ puts(char *);
int read(int /*<<< orphan*/, char *, unsigned int);
int readn(char *buf, unsigned int n) {
  int nread = 0;
  char c[10];
  nread = read(STDIN_FILENO, buf, (n));
  if (nread == -1) {
    puts("Error reading \n");
    exit(0);
  }
  buf[nread] = 0;
  return nread;
}


x86 assembly (clang, -O0):
<readn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    0x2e93(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1040 <read@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0xffffffff,-0x10(%rbp)
jne    117b <readn+0x4b>
lea    0xe91(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readn>:
push   %rbx
mov    %esi,%edx
mov    %rdi,%rbx
mov    0x2ea3(%rip),%rax
mov    (%rax),%edi
mov    %rbx,%rsi
call   1040 <read@plt>
cmp    $0xffffffff,%eax
je     1155 <readn+0x25>
movslq %eax,%rcx
movb   $0x0,(%rbx,%rcx,1)
pop    %rbx
ret
lea    0xea4(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@STDIN_FILENO = global i32 0
@.str = [16 x i8] c"Error reading \0A\00"
define i32 @readn(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca [10 x i8]
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 0, i32* %5
%7 = load i32, i32* @STDIN_FILENO
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = call i32 @read(i32 %7, i8* %8, i32 %9)
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = icmp eq i32 %11, -1
br i1 %12, label %13, label %16
13: ; preds = %2
%14 = call i32 @puts(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%15 = call i32 @exit(i32 0)
unreachable
16: ; preds = %2
%17 = load i8*, i8** %3
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i8, i8* %17, i64 %19
store i8 0, i8* %20
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
@STDIN_FILENO = global i32 0
@.str = [16 x i8] c"Error reading \0A\00"
define i32 @readn(i8* nocapture %0, i32 %1) {
%3 = load i32, i32* @STDIN_FILENO
%4 = tail call i32 @read(i32 %3, i8* %0, i32 %1)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%8 = tail call i32 @exit(i32 0)
unreachable
9: ; preds = %2
%10 = sext i32 %4 to i64
%11 = getelementptr inbounds i8, i8* %0, i64 %10
store i8 0, i8* %11
ret i32 %4
}
/* Variables and functions */
int rom_present(char *);
int xebec_available(void) {
  return (rom_present(L"roms/hdd/mfm_xebec/ibm_xebec_62x0822_1985.bin"));
}


x86 assembly (clang, -O0):
<xebec_available>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <rom_present@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xebec_available>:
lea    0xee9(%rip),%rdi
jmp    1030 <rom_present@plt>

LLVM IR (-O0):
@.str = [46 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 104, i32 100, i32 100, i32 47, i32 109, i32 102, i32 109, i32 95, i32 120, i32 101, i32 98, i32 101, i32 99, i32 47, i32 105, i32 98, i32 109, i32 95, i32 120, i32 101, i32 98, i32 101, i32 99, i32 95, i32 54, i32 50, i32 120, i32 48, i32 56, i32 50, i32 50, i32 95, i32 49, i32 57, i32 56, i32 53, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @xebec_available() {
%1 = call i32 @rom_present(i8* bitcast ([46 x i32]* @.str to i8*))
ret i32 %1
}

LLVM IR (-O2):
@.str = [46 x i32] [i32 114, i32 111, i32 109, i32 115, i32 47, i32 104, i32 100, i32 100, i32 47, i32 109, i32 102, i32 109, i32 95, i32 120, i32 101, i32 98, i32 101, i32 99, i32 47, i32 105, i32 98, i32 109, i32 95, i32 120, i32 101, i32 98, i32 101, i32 99, i32 95, i32 54, i32 50, i32 120, i32 48, i32 56, i32 50, i32 50, i32 95, i32 49, i32 57, i32 56, i32 53, i32 46, i32 98, i32 105, i32 110, i32 0]
define i32 @xebec_available() {
%1 = tail call i32 @rom_present(i8* bitcast ([46 x i32]* @.str to i8*))
ret i32 %1
}