xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ box_double(double);
int /*<<< orphan*/ dpop();
double untag_float_fast(int /*<<< orphan*/);
void primitive_float_subtract_impl(void) {
  double y = untag_float_fast(dpop());
  double x = untag_float_fast(dpop());
  ;
  box_double(x - y);
}


x86 assembly (clang, -O0):
<primitive_float_subtract_impl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <dpop@plt>
mov    %eax,%edi
call   1040 <untag_float_fast@plt>
movsd  %xmm0,-0x8(%rbp)
mov    $0x0,%al
call   1030 <dpop@plt>
mov    %eax,%edi
call   1040 <untag_float_fast@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
subsd  -0x8(%rbp),%xmm0
call   1050 <box_double@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<primitive_float_subtract_impl>:
push   %rax
xor    %eax,%eax
call   1030 <dpop@plt>
mov    %eax,%edi
call   1040 <untag_float_fast@plt>
movsd  %xmm0,(%rsp)
xor    %eax,%eax
call   1030 <dpop@plt>
mov    %eax,%edi
call   1040 <untag_float_fast@plt>
subsd  (%rsp),%xmm0
pop    %rax
jmp    1050 <box_double@plt>

LLVM IR (-O0):
define void @primitive_float_subtract_impl() {
%1 = alloca double
%2 = alloca double
%3 = call i32 (...) @dpop()
%4 = call double @untag_float_fast(i32 %3)
store double %4, double* %1
%5 = call i32 (...) @dpop()
%6 = call double @untag_float_fast(i32 %5)
store double %6, double* %2
%7 = load double, double* %2
%8 = load double, double* %1
%9 = fsub double %7, %8
%10 = call i32 @box_double(double %9)
ret void
}

LLVM IR (-O2):
define void @primitive_float_subtract_impl() {
%1 = tail call i32 (...) @dpop()
%2 = tail call double @untag_float_fast(i32 %1)
%3 = tail call i32 (...) @dpop()
%4 = tail call double @untag_float_fast(i32 %3)
%5 = fsub double %4, %2
%6 = tail call i32 @box_double(double %5)
ret void
}
void foo450() {}


x86 assembly (clang, -O0):
<foo450>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo450>:
ret

LLVM IR (-O0):
define void @foo450() {
ret void
}

LLVM IR (-O2):
define void @foo450() {
ret void
}
/* Variables and functions */
scalar_t__ sqrt(float);
float rsVec_length(float *v) {
  return (float)sqrt(v[0] * v[0] + v[1] * v[1] + v[2] * v[2]);
}


x86 assembly (clang, -O0):
<rsVec_length>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movss  0x4(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulss  0x4(%rax),%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  0x8(%rax),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
call   1030 <sqrt@plt>
cvtsi2ss %rax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rsVec_length>:
push   %rax
movss  (%rdi),%xmm1
movss  0x4(%rdi),%xmm0
mulss  %xmm0,%xmm0
mulss  %xmm1,%xmm1
addss  %xmm0,%xmm1
movss  0x8(%rdi),%xmm0
mulss  %xmm0,%xmm0
addss  %xmm1,%xmm0
call   1030 <sqrt@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @rsVec_length(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = load float*, float** %2
%7 = getelementptr inbounds float, float* %6, i64 0
%8 = load float, float* %7
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 1
%11 = load float, float* %10
%12 = load float*, float** %2
%13 = getelementptr inbounds float, float* %12, i64 1
%14 = load float, float* %13
%15 = fmul float %11, %14
%16 = call float @llvm.fmuladd.f32(float %5, float %8, float %15)
%17 = load float*, float** %2
%18 = getelementptr inbounds float, float* %17, i64 2
%19 = load float, float* %18
%20 = load float*, float** %2
%21 = getelementptr inbounds float, float* %20, i64 2
%22 = load float, float* %21
%23 = call float @llvm.fmuladd.f32(float %19, float %22, float %16)
%24 = call i64 @sqrt(float %23)
%25 = sitofp i64 %24 to float
ret float %25
}

LLVM IR (-O2):
define float @rsVec_length(float* nocapture %0) {
%2 = load float, float* %0
%3 = getelementptr inbounds float, float* %0, i64 1
%4 = load float, float* %3
%5 = fmul float %4, %4
%6 = tail call float @llvm.fmuladd.f32(float %2, float %2, float %5)
%7 = getelementptr inbounds float, float* %0, i64 2
%8 = load float, float* %7
%9 = tail call float @llvm.fmuladd.f32(float %8, float %8, float %6)
%10 = tail call i64 @sqrt(float %9)
%11 = sitofp i64 %10 to float
ret float %11
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ strcpy(char *, char const *);
int strlen(char const *);
char *jasm_strdup(const char *str) {
  int len;
  char *new;
  len = strlen(str);
  new = malloc(len + 1);
  strcpy(new, str);
  return new;
}


x86 assembly (clang, -O0):
<jasm_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jasm_strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @jasm_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 1
%9 = call i8* @malloc(i32 %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = load i8*, i8** %2
%12 = call i32 @strcpy(i8* %10, i8* %11)
%13 = load i8*, i8** %4
ret i8* %13
}

LLVM IR (-O2):
define i8* @jasm_strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i8* @malloc(i32 %3)
%5 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
int isPrime(long number) {
  int i;
  if (number % 2 == 0) {
    return 0;
  }
  for (i = 3; (i * i) <= number; i += 2) {
    if (number % i == 0) {
      return 0;
    }
  }
  return 1;
}


x86 assembly (clang, -O0):
<isPrime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    $0x2,%ecx
cqto
idiv   %rcx
cmp    $0x0,%rdx
jne    112c <isPrime+0x2c>
movl   $0x0,-0x4(%rbp)
jmp    1183 <isPrime+0x83>
movl   $0x3,-0x14(%rbp)
mov    -0x14(%rbp),%eax
imul   -0x14(%rbp),%eax
cltq
cmp    -0x10(%rbp),%rax
jg     117c <isPrime+0x7c>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cqto
idiv   %rcx
cmp    $0x0,%rdx
jne    1169 <isPrime+0x69>
movl   $0x0,-0x4(%rbp)
jmp    1183 <isPrime+0x83>
jmp    116e <isPrime+0x6e>
mov    -0x14(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x14(%rbp)
jmp    1133 <isPrime+0x33>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPrime>:
xor    %ecx,%ecx
test   $0x1,%dil
je     1159 <isPrime+0x59>
mov    $0x1,%ecx
cmp    $0x9,%rdi
jl     1159 <isPrime+0x59>
mov    $0x3,%esi
nopl   0x0(%rax,%rax,1)
mov    %rdi,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     1140 <isPrime+0x40>
mov    %rdi,%rax
cqto
idiv   %rsi
test   %rdx,%rdx
jne    114b <isPrime+0x4b>
jmp    115c <isPrime+0x5c>
nopl   0x0(%rax,%rax,1)
mov    %edi,%eax
xor    %edx,%edx
div    %esi
test   %rdx,%rdx
je     115c <isPrime+0x5c>
add    $0x2,%rsi
mov    %esi,%eax
imul   %eax,%eax
cmp    %rdi,%rax
jle    1120 <isPrime+0x20>
mov    %ecx,%eax
ret
xor    %ecx,%ecx
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @isPrime(i64 %0) {
%2 = alloca i32
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = srem i64 %5, 2
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %29
9: ; preds = %1
store i32 3, i32* %4
br label %10
10: ; preds = %25, %9
%11 = load i32, i32* %4
%12 = load i32, i32* %4
%13 = mul nsw i32 %11, %12
%14 = sext i32 %13 to i64
%15 = load i64, i64* %3
%16 = icmp sle i64 %14, %15
br i1 %16, label %17, label %28
17: ; preds = %10
%18 = load i64, i64* %3
%19 = load i32, i32* %4
%20 = sext i32 %19 to i64
%21 = srem i64 %18, %20
%22 = icmp eq i64 %21, 0
br i1 %22, label %23, label %24
23: ; preds = %17
store i32 0, i32* %2
br label %29
24: ; preds = %17
br label %25
25: ; preds = %24
%26 = load i32, i32* %4
%27 = add nsw i32 %26, 2
store i32 %27, i32* %4
br label %10
28: ; preds = %10
store i32 1, i32* %2
br label %29
29: ; preds = %28, %23, %8
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @isPrime(i64 %0) {
%2 = and i64 %0, 1
%3 = icmp eq i64 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1
%5 = icmp slt i64 %0, 9
br i1 %5, label %15, label %10
6: ; preds = %10
%7 = mul i64 %14, %14
%8 = and i64 %7, 4294967295
%9 = icmp sgt i64 %8, %0
br i1 %9, label %15, label %10
10: ; preds = %4, %6
%11 = phi i64 [ %14, %6 ], [ 3, %4 ]
%12 = srem i64 %0, %11
%13 = icmp eq i64 %12, 0
%14 = add nuw i64 %11, 2
br i1 %13, label %15, label %6
15: ; preds = %10, %6, %4, %1
%16 = phi i32 [ 0, %1 ], [ 1, %4 ], [ 0, %10 ], [ 1, %6 ]
ret i32 %16
}
/* Type definitions */
struct wireless_dev {
  int dummy;
};
struct brcmf_cfg80211_info {
  int dummy;
};

/* Variables and functions */
scalar_t__ wdev_priv(struct wireless_dev *);
struct brcmf_cfg80211_info *wdev_to_cfg(struct wireless_dev *wd) {
  return (struct brcmf_cfg80211_info *)(wdev_priv(wd));
}


x86 assembly (clang, -O0):
<wdev_to_cfg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <wdev_priv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wdev_to_cfg>:
jmp    1030 <wdev_priv@plt>

LLVM IR (-O0):
%struct.brcmf_cfg80211_info = type { i32 }
%struct.wireless_dev = type { i32 }
define %struct.brcmf_cfg80211_info* @wdev_to_cfg(%struct.wireless_dev* %0) {
%2 = alloca %struct.wireless_dev*
store %struct.wireless_dev* %0, %struct.wireless_dev** %2
%3 = load %struct.wireless_dev*, %struct.wireless_dev** %2
%4 = call i64 @wdev_priv(%struct.wireless_dev* %3)
%5 = inttoptr i64 %4 to %struct.brcmf_cfg80211_info*
ret %struct.brcmf_cfg80211_info* %5
}

LLVM IR (-O2):
%struct.brcmf_cfg80211_info = type { i32 }
%struct.wireless_dev = type { i32 }
define %struct.brcmf_cfg80211_info* @wdev_to_cfg(%struct.wireless_dev* %0) {
%2 = tail call i64 @wdev_priv(%struct.wireless_dev* %0)
%3 = inttoptr i64 %2 to %struct.brcmf_cfg80211_info*
ret %struct.brcmf_cfg80211_info* %3
}
extern int Cache_report_total_size(void) { return 20; }


x86 assembly (clang, -O0):
<Cache_report_total_size>:
push   %rbp
mov    %rsp,%rbp
mov    $0x14,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cache_report_total_size>:
mov    $0x14,%eax
ret

LLVM IR (-O0):
define i32 @Cache_report_total_size() {
ret i32 20
}

LLVM IR (-O2):
define i32 @Cache_report_total_size() {
ret i32 20
}
/* Type definitions */
struct ps_process {
  int dummy;
};
struct obus_object {
  int dummy;
};

/* Variables and functions */
struct ps_process *ps_process_from_object(struct obus_object *);
struct obus_object *ps_process_object(struct ps_process *object) {
  struct obus_object *obj;
  obj = (struct obus_object *)object;
  if (ps_process_from_object(obj) != object)
    return NULL;
  return (struct obus_object *)object;
}


x86 assembly (clang, -O0):
<ps_process_object>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <ps_process_from_object@plt>
cmp    -0x10(%rbp),%rax
je     1144 <ps_process_object+0x34>
movq   $0x0,-0x8(%rbp)
jmp    114c <ps_process_object+0x3c>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_process_object>:
push   %rbx
mov    %rdi,%rbx
call   1030 <ps_process_from_object@plt>
xor    %ecx,%ecx
cmp    %rbx,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.obus_object = type { i32 }
%struct.ps_process = type { i32 }
define %struct.obus_object* @ps_process_object(%struct.ps_process* %0) {
%2 = alloca %struct.obus_object*
%3 = alloca %struct.ps_process*
%4 = alloca %struct.obus_object*
store %struct.ps_process* %0, %struct.ps_process** %3
%5 = load %struct.ps_process*, %struct.ps_process** %3
%6 = bitcast %struct.ps_process* %5 to %struct.obus_object*
store %struct.obus_object* %6, %struct.obus_object** %4
%7 = load %struct.obus_object*, %struct.obus_object** %4
%8 = call %struct.ps_process* @ps_process_from_object(%struct.obus_object* %7)
%9 = load %struct.ps_process*, %struct.ps_process** %3
%10 = icmp ne %struct.ps_process* %8, %9
br i1 %10, label %11, label %12
11: ; preds = %1
store %struct.obus_object* null, %struct.obus_object** %2
br label %15
12: ; preds = %1
%13 = load %struct.ps_process*, %struct.ps_process** %3
%14 = bitcast %struct.ps_process* %13 to %struct.obus_object*
store %struct.obus_object* %14, %struct.obus_object** %2
br label %15
15: ; preds = %12, %11
%16 = load %struct.obus_object*, %struct.obus_object** %2
ret %struct.obus_object* %16
}

LLVM IR (-O2):
%struct.obus_object = type { i32 }
%struct.ps_process = type { i32 }
define %struct.obus_object* @ps_process_object(%struct.ps_process* %0) {
%2 = bitcast %struct.ps_process* %0 to %struct.obus_object*
%3 = tail call %struct.ps_process* @ps_process_from_object(%struct.obus_object* %2)
%4 = icmp eq %struct.ps_process* %3, %0
%5 = select i1 %4, %struct.obus_object* %2, %struct.obus_object* null
ret %struct.obus_object* %5
}
void GPIOWakeupGlobalDisable(unsigned int baseAdd) {
  (*((volatile unsigned int *)(baseAdd + (0x10)))) &= ~((0x00000004u));
}


x86 assembly (clang, -O0):
<GPIOWakeupGlobalDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xfffffffb,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOWakeupGlobalDisable>:
add    $0x10,%edi
andl   $0xfffffffb,(%rdi)
ret

LLVM IR (-O0):
define void @GPIOWakeupGlobalDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, 16
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -5
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @GPIOWakeupGlobalDisable(i32 %0) {
%2 = add i32 %0, 16
%3 = zext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, -5
store volatile i32 %6, i32* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ modify_primitive_globals_new_syntax();
int /*<<< orphan*/ modify_primitive_globals_old_syntax();
int main() {
  modify_primitive_globals_old_syntax();
  modify_primitive_globals_new_syntax();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <modify_primitive_globals_old_syntax@plt>
mov    $0x0,%al
call   1030 <modify_primitive_globals_new_syntax@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <modify_primitive_globals_old_syntax@plt>
xor    %eax,%eax
call   1030 <modify_primitive_globals_new_syntax@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @modify_primitive_globals_old_syntax()
%3 = call i32 (...) @modify_primitive_globals_new_syntax()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @modify_primitive_globals_old_syntax()
%2 = tail call i32 (...) @modify_primitive_globals_new_syntax()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_cvtpi32_pd(int /*<<< orphan*/);
__m128d test19(__m64 a) { return _mm_cvtpi32_pd(a); }


x86 assembly (clang, -O0):
<test19>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_cvtpi32_pd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test19>:
jmp    1030 <_mm_cvtpi32_pd@plt>

LLVM IR (-O0):
define i32 @test19(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_cvtpi32_pd(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @test19(i32 %0) {
%2 = tail call i32 @_mm_cvtpi32_pd(i32 %0)
ret i32 %2
}
int isNullPointer(void *pointer) { return pointer == 0; }


x86 assembly (clang, -O0):
<isNullPointer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isNullPointer>:
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @isNullPointer(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp eq i8* %3, null
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @isNullPointer(i8* readnone %0) {
%2 = icmp eq i8* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
int test_imm_3Fint32_mem(int *val) {
  return ((*val) & (0x3F << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Fint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x3f,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Fint32_mem>:
testb  $0x3f,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Fint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 63
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Fint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 63
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
char *int_to_roman(int);
int roman_to_int(char *);
char *add_roman(char augend[], char addend[]) {
  int x = roman_to_int(augend);
  int y = roman_to_int(addend);
  int sum = x + y;
  return int_to_roman(sum);
}


x86 assembly (clang, -O0):
<add_roman>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <roman_to_int@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <roman_to_int@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
add    -0x18(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%edi
call   1030 <int_to_roman@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_roman>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1040 <roman_to_int@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <roman_to_int@plt>
add    %eax,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <int_to_roman@plt>

LLVM IR (-O0):
define i8* @add_roman(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %3
%9 = call i32 @roman_to_int(i8* %8)
store i32 %9, i32* %5
%10 = load i8*, i8** %4
%11 = call i32 @roman_to_int(i8* %10)
store i32 %11, i32* %6
%12 = load i32, i32* %5
%13 = load i32, i32* %6
%14 = add nsw i32 %12, %13
store i32 %14, i32* %7
%15 = load i32, i32* %7
%16 = call i8* @int_to_roman(i32 %15)
ret i8* %16
}

LLVM IR (-O2):
define i8* @add_roman(i8* %0, i8* %1) {
%3 = tail call i32 @roman_to_int(i8* %0)
%4 = tail call i32 @roman_to_int(i8* %1)
%5 = add nsw i32 %4, %3
%6 = tail call i8* @int_to_roman(i32 %5)
ret i8* %6
}
void test___atomic_and_fetch_0(char *mem) { __atomic_and_fetch(mem, 1, 4); }


x86 assembly (clang, -O0):
<test___atomic_and_fetch_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movb   $0x1,-0x9(%rbp)
mov    -0x9(%rbp),%cl
mov    %cl,-0xc(%rbp)
mov    (%rax),%al
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%al
mov    -0x18(%rbp),%rcx
mov    -0xc(%rbp),%sil
mov    %al,%dl
and    %sil,%dl
lock cmpxchg %dl,(%rcx)
sete   %cl
mov    %al,-0x19(%rbp)
test   $0x1,%cl
mov    %al,-0xb(%rbp)
jne    114a <test___atomic_and_fetch_0+0x4a>
jmp    111f <test___atomic_and_fetch_0+0x1f>
mov    -0xc(%rbp),%cl
mov    -0x19(%rbp),%al
and    %cl,%al
mov    %al,-0xa(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test___atomic_and_fetch_0>:
lock andb $0x1,(%rdi)
ret

LLVM IR (-O0):
define void @test___atomic_and_fetch_0(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
store i8 1, i8* %3
%6 = load i8, i8* %3
%7 = atomicrmw and i8* %5, i8 %6 acq_rel
%8 = and i8 %7, %6
store i8 %8, i8* %4
%9 = load i8, i8* %4
ret void
}

LLVM IR (-O2):
define void @test___atomic_and_fetch_0(i8* nocapture %0) {
%2 = atomicrmw and i8* %0, i8 1 acq_rel
ret void
}
/* Type definitions */
typedef unsigned long uint32_t;

/* Variables and functions */
void GPIO_setMultiDio(uint32_t dioMask) {
  ;
  (*((volatile unsigned long *)(0x40022000 + 0x00000090))) = dioMask;
}


x86 assembly (clang, -O0):
<GPIO_setMultiDio>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x40022090,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIO_setMultiDio>:
mov    %rdi,0x40022090
40
ret

LLVM IR (-O0):
define void @GPIO_setMultiDio(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
store volatile i64 %3, i64* inttoptr (i64 1073881232 to i64*)
ret void
}

LLVM IR (-O2):
define void @GPIO_setMultiDio(i64 %0) {
store volatile i64 %0, i64* inttoptr (i64 1073881232 to i64*)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen64(char const *, char const *);
FILE *_fopen64(const char *path, const char *mode) {
  return fopen64(path, mode);
}


x86 assembly (clang, -O0):
<_fopen64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <fopen64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fopen64>:
jmp    1030 <fopen64@plt>

LLVM IR (-O0):
define i32* @_fopen64(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32* @fopen64(i8* %5, i8* %6)
ret i32* %7
}

LLVM IR (-O2):
define noalias i32* @_fopen64(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32* @fopen64(i8* %0, i8* %1)
ret i32* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;

/* Variables and functions */
int /*<<< orphan*/ _mm_xor_si128(int /*<<< orphan*/, int /*<<< orphan*/);
__m128i test_mm_xor_si128(__m128i A, __m128i B) { return _mm_xor_si128(A, B); }


x86 assembly (clang, -O0):
<test_mm_xor_si128>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_xor_si128@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_xor_si128>:
jmp    1030 <_mm_xor_si128@plt>

LLVM IR (-O0):
define i32 @test_mm_xor_si128(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_xor_si128(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_xor_si128(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_xor_si128(i32 %0, i32 %1)
ret i32 %3
}
void handle_sigint(int signal) {}


x86 assembly (clang, -O0):
<handle_sigint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_sigint>:
ret

LLVM IR (-O0):
define void @handle_sigint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @handle_sigint(i32 %0) {
ret void
}
int ffi_stub_free(struct ffi_stub_t *stub) {}


x86 assembly (clang, -O0):
<ffi_stub_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffi_stub_free>:
ret

LLVM IR (-O0):
%struct.ffi_stub_t = type opaque
define i32 @ffi_stub_free(%struct.ffi_stub_t* %0) {
%2 = alloca i32
%3 = alloca %struct.ffi_stub_t*
store %struct.ffi_stub_t* %0, %struct.ffi_stub_t** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
%struct.ffi_stub_t = type opaque
define i32 @ffi_stub_free(%struct.ffi_stub_t* nocapture readnone %0) {
ret i32 undef
}
void grpc_use_signal(int signum) {}


x86 assembly (clang, -O0):
<grpc_use_signal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<grpc_use_signal>:
ret

LLVM IR (-O0):
define void @grpc_use_signal(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @grpc_use_signal(i32 %0) {
ret void
}
int main() {
  asm("push	$"
      "0x12345675"
      ";			push	$"
      "0x12345674"
      ";			push	$"
      "0x12345673"
      ";			push	$"
      "0x12345672"
      ";			push	$"
      "0x12345671"
      ";			jmp	 "
      ""
      "fn");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
push   $0x12345675
push   $0x12345674
push   $0x12345673
push   $0x12345672
push   $0x12345671
jmp    1030 <fn@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   $0x12345675
push   $0x12345674
push   $0x12345673
push   $0x12345672
push   $0x12345671
jmp    1030 <fn@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
tail call void asm sideeffect "push\09$$0x12345675;\09\09\09push\09$$0x12345674;\09\09\09push\09$$0x12345673;\09\09\09push\09$$0x12345672;\09\09\09push\09$$0x12345671;\09\09\09jmp\09 fn", "~{dirflag},~{fpsr},~{flags}"()
ret i32 0
}
/* Type definitions */
struct S {
  int dummy;
};

/* Variables and functions */
int foo(struct S *);
int __attribute__((no)) bar(struct S *s) { return foo(s); }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
jmp    1030 <foo@plt>

LLVM IR (-O0):
%struct.S = type { i32 }
define i32 @bar(%struct.S* %0) {
%2 = alloca %struct.S*
store %struct.S* %0, %struct.S** %2
%3 = load %struct.S*, %struct.S** %2
%4 = call i32 @foo(%struct.S* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.S = type { i32 }
define i32 @bar(%struct.S* %0) {
%2 = tail call i32 @foo(%struct.S* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_memblockq_is_readable() {
  printf("NOT IMPLEMENTED:"
         "pa_memblockq_is_readable"
         "\n");
}


x86 assembly (clang, -O0):
<pa_memblockq_is_readable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_memblockq_is_readable>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [42 x i8] c"NOT IMPLEMENTED:pa_memblockq_is_readable\0A\00"
define i32 @pa_memblockq_is_readable() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [41 x i8] c"NOT IMPLEMENTED:pa_memblockq_is_readable\00"
define i32 @pa_memblockq_is_readable() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int define_output_file(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(19, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<define_output_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x13,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<define_output_file>:
mov    $0x13,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @define_output_file() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 19, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @define_output_file() {
%1 = tail call i32 @_ada_use_c2phc(i32 19, i32* undef, i32* undef, double* undef)
ret i32 %1
}
void glutStrokeString(void *fontface, const char *str) {}


x86 assembly (clang, -O0):
<glutStrokeString>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutStrokeString>:
ret

LLVM IR (-O0):
define void @glutStrokeString(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
define void @glutStrokeString(i8* nocapture %0, i8* nocapture %1) {
ret void
}
__attribute__((always_)) void __plic_set_priority(unsigned int source,
                                                  unsigned int priority) {
  volatile unsigned int *priority_ptr =
      (volatile unsigned int *)(0x0 + (0x00000000UL) + (source << 2));
  *priority_ptr = priority;
}


x86 assembly (clang, -O0):
<__plic_set_priority>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
mov    %eax,%eax
add    $0x0,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__plic_set_priority>:
shl    $0x2,%edi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @__plic_set_priority(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = shl i32 %6, 2
%8 = zext i32 %7 to i64
%9 = add i64 0, %8
%10 = inttoptr i64 %9 to i32*
store i32* %10, i32** %5
%11 = load i32, i32* %4
%12 = load i32*, i32** %5
store volatile i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @__plic_set_priority(i32 %0, i32 %1) {
%3 = shl i32 %0, 2
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
store volatile i32 %1, i32* %5
ret void
}
/* Variables and functions */
scalar_t__ mmalloc(scalar_t__);
int /*<<< orphan*/ new_str_error(int, char *);
int /*<<< orphan*/ sprintf(char *, char *, char *, int);
scalar_t__ strlen(char *);
void err_assert(char *soubor, int radek) {
  char *str = (char *)mmalloc(strlen(soubor) + 20 + 4 + 3);
  sprintf(str, "Error 150: assert()\n%s\n%i", soubor, radek);
  new_str_error(150, str);
}


x86 assembly (clang, -O0):
<err_assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,%rdi
add    $0x14,%rdi
add    $0x4,%rdi
add    $0x3,%rdi
call   1040 <mmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
lea    0xe7e(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x18(%rbp),%rsi
mov    $0x96,%edi
call   1060 <new_str_error@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<err_assert>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rbx
call   1030 <strlen@plt>
lea    0x1b(%rax),%rdi
call   1040 <mmalloc@plt>
mov    %rax,%rbp
lea    0xe9e(%rip),%rsi
mov    %rax,%rdi
mov    %rbx,%rdx
mov    %r14d,%ecx
call   1050 <sprintf@plt>
mov    $0x96,%edi
mov    %rbp,%rsi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1060 <new_str_error@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"Error 150: assert()\0A%s\0A%i\00"
define void @err_assert(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = call i64 @strlen(i8* %6)
%8 = add nsw i64 %7, 20
%9 = add nsw i64 %8, 4
%10 = add nsw i64 %9, 3
%11 = call i64 @mmalloc(i64 %10)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %5
%13 = load i8*, i8** %5
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = call i32 @sprintf(i8* %13, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %14, i32 %15)
%17 = load i8*, i8** %5
%18 = call i32 @new_str_error(i32 150, i8* %17)
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"Error 150: assert()\0A%s\0A%i\00"
define void @err_assert(i8* %0, i32 %1) {
%3 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%4 = add nsw i64 %3, 27
%5 = tail call i64 @mmalloc(i64 %4)
%6 = inttoptr i64 %5 to i8*
%7 = tail call i32 @sprintf(i8* dereferenceable(1) %6, i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
%8 = tail call i32 @new_str_error(i32 150, i8* %6)
ret void
}
/* Variables and functions */
int RAND_MAX;
int rand();
int rand_int(int n) {
  int limit = RAND_MAX - RAND_MAX % n;
  int rnd;
  do {
    rnd = rand();
  } while (rnd >= limit);
  return rnd % n;
}


x86 assembly (clang, -O0):
<rand_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x10(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%eax
cltd
idivl  -0x4(%rbp)
mov    -0x10(%rbp),%eax
sub    %edx,%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    113c <rand_int+0x2c>
mov    -0xc(%rbp),%eax
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_int>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    0x2ecc(%rip),%rax
mov    (%rax),%ebp
mov    %ebp,%eax
cltd
idiv   %edi
sub    %edx,%ebp
cs nopw 0x0(%rax,%rax,1)
nop
xor    %eax,%eax
call   1030 <rand@plt>
cmp    %ebp,%eax
jge    1130 <rand_int+0x20>
cltd
idiv   %ebx
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@RAND_MAX = global i32 0
define i32 @rand_int(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* @RAND_MAX
%6 = load i32, i32* @RAND_MAX
%7 = load i32, i32* %2
%8 = srem i32 %6, %7
%9 = sub nsw i32 %5, %8
store i32 %9, i32* %3
br label %10
10: ; preds = %12, %1
%11 = call i32 (...) @rand()
store i32 %11, i32* %4
br label %12
12: ; preds = %10
%13 = load i32, i32* %4
%14 = load i32, i32* %3
%15 = icmp sge i32 %13, %14
br i1 %15, label %10, label %16
16: ; preds = %12
%17 = load i32, i32* %4
%18 = load i32, i32* %2
%19 = srem i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
@RAND_MAX = global i32 0
define i32 @rand_int(i32 %0) {
%2 = load i32, i32* @RAND_MAX
%3 = srem i32 %2, %0
%4 = sub nsw i32 %2, %3
br label %5
5: ; preds = %5, %1
%6 = tail call i32 (...) @rand()
%7 = icmp slt i32 %6, %4
br i1 %7, label %8, label %5
8: ; preds = %5
%9 = srem i32 %6, %0
ret i32 %9
}
int foo(int k) {
  while (k < 10000) {
    int i = 0;
    int j = k;
    while (i < j) {
      i = i + 1;
      j = j - 1;
    }
    k = k + 1;
  }
  return k;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x2710,-0x4(%rbp)
jge    1152 <foo+0x52>
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1144 <foo+0x44>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1121 <foo+0x21>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1107 <foo+0x7>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
cmp    $0x2711,%edi
mov    $0x2710,%eax
cmovge %edi,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 10000
br i1 %7, label %8, label %22
8: ; preds = %5
store i32 0, i32* %3
%9 = load i32, i32* %2
store i32 %9, i32* %4
br label %10
10: ; preds = %14, %8
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %19
14: ; preds = %10
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
%17 = load i32, i32* %4
%18 = sub nsw i32 %17, 1
store i32 %18, i32* %4
br label %10
19: ; preds = %10
%20 = load i32, i32* %2
%21 = add nsw i32 %20, 1
store i32 %21, i32* %2
br label %5
22: ; preds = %5
%23 = load i32, i32* %2
ret i32 %23
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = icmp sgt i32 %0, 10000
%3 = select i1 %2, i32 %0, i32 10000
ret i32 %3
}
int ui_update(char *filepath, unsigned int size, unsigned int done) {
  return 1;
}


x86 assembly (clang, -O0):
<ui_update>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_update>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ui_update(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 1
}

LLVM IR (-O2):
define i32 @ui_update(i8* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  if (n % 2 == 0) {
    printf("Even.\n");
  } else {
    printf("Odd.\n");
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1164 <main+0x44>
lea    0xea9(%rip),%rdi
call   1030 <printf@plt>
jmp    1170 <main+0x50>
lea    0xe9f(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
testb  $0x1,0x4(%rsp)
lea    0xeca(%rip),%rax
lea    0xebe(%rip),%rdi
cmove  %rax,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [7 x i8] c"Even.\0A\00"
@.str.2 = [6 x i8] c"Odd.\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = srem i32 %4, 2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
br label %11
9: ; preds = %0
%10 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
br label %11
11: ; preds = %9, %7
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@str = [5 x i8] c"Odd.\00"
@str.3 = [6 x i8] c"Even.\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = and i32 %4, 1
%6 = icmp eq i32 %5, 0
%7 = select i1 %6, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @str.3, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @str, i64 0, i64 0)
%8 = call i32 @puts(i8* dereferenceable(1) %7)
ret i32 0
}
void foo_2_2_2_1_2_1_1_1_2() {}


x86 assembly (clang, -O0):
<foo_2_2_2_1_2_1_1_1_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_2_2_1_2_1_1_1_2>:
ret

LLVM IR (-O0):
define void @foo_2_2_2_1_2_1_1_1_2() {
ret void
}

LLVM IR (-O2):
define void @foo_2_2_2_1_2_1_1_1_2() {
ret void
}
/* Variables and functions */
unsigned int factorial(unsigned int const);
unsigned int choose(const unsigned int n, const unsigned int k) {
  return (factorial(n) / (factorial(k) * factorial(n - k)));
}


x86 assembly (clang, -O0):
<choose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <factorial@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <factorial@plt>
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
sub    -0x8(%rbp),%edi
call   1030 <factorial@plt>
mov    -0x10(%rbp),%ecx
mov    %eax,%edx
mov    -0xc(%rbp),%eax
imul   %edx,%ecx
xor    %edx,%edx
div    %ecx
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<choose>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
call   1030 <factorial@plt>
mov    %eax,%r14d
mov    %ebx,%edi
call   1030 <factorial@plt>
mov    %eax,%r15d
sub    %ebx,%ebp
mov    %ebp,%edi
call   1030 <factorial@plt>
mov    %eax,%ecx
imul   %r15d,%ecx
mov    %r14d,%eax
xor    %edx,%edx
div    %ecx
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @choose(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @factorial(i32 %5)
%7 = load i32, i32* %4
%8 = call i32 @factorial(i32 %7)
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = sub i32 %9, %10
%12 = call i32 @factorial(i32 %11)
%13 = mul i32 %8, %12
%14 = udiv i32 %6, %13
ret i32 %14
}

LLVM IR (-O2):
define i32 @choose(i32 %0, i32 %1) {
%3 = tail call i32 @factorial(i32 %0)
%4 = tail call i32 @factorial(i32 %1)
%5 = sub i32 %0, %1
%6 = tail call i32 @factorial(i32 %5)
%7 = mul i32 %6, %4
%8 = udiv i32 %3, %7
ret i32 %8
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t htobe32(uint32_t v) {
  return (uint32_t)(((v & 0x000000FF) << 24) | ((v & 0x0000FF00) << 8) |
                    ((v & 0x00FF0000) >> 8) | ((v & 0xFF000000) >> 24));
}


x86 assembly (clang, -O0):
<htobe32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
shr    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htobe32>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @htobe32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = shl i32 %4, 24
%6 = load i32, i32* %2
%7 = and i32 %6, 65280
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 16711680
%12 = ashr i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, -16777216
%16 = lshr i32 %15, 24
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @htobe32(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
/* Type definitions */
typedef scalar_t__ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
scalar_t__ mktime(struct tm *);
int date_is_less_than(struct tm *this, struct tm *that) {
  time_t this_time;
  time_t that_time;
  this_time = mktime(this);
  that_time = mktime(that);
  return this_time < that_time;
}


x86 assembly (clang, -O0):
<date_is_less_than>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <mktime@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <mktime@plt>
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<date_is_less_than>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1030 <mktime@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <mktime@plt>
xor    %ecx,%ecx
cmp    %rax,%rbx
setl   %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i32 @date_is_less_than(%struct.tm* %0, %struct.tm* %1) {
%3 = alloca %struct.tm*
%4 = alloca %struct.tm*
%5 = alloca i64
%6 = alloca i64
store %struct.tm* %0, %struct.tm** %3
store %struct.tm* %1, %struct.tm** %4
%7 = load %struct.tm*, %struct.tm** %3
%8 = call i64 @mktime(%struct.tm* %7)
store i64 %8, i64* %5
%9 = load %struct.tm*, %struct.tm** %4
%10 = call i64 @mktime(%struct.tm* %9)
store i64 %10, i64* %6
%11 = load i64, i64* %5
%12 = load i64, i64* %6
%13 = icmp slt i64 %11, %12
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i32 @date_is_less_than(%struct.tm* nocapture %0, %struct.tm* nocapture %1) {
%3 = tail call i64 @mktime(%struct.tm* %0)
%4 = tail call i64 @mktime(%struct.tm* %1)
%5 = icmp slt i64 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
void jac_chain_nm7_decref(void) {}


x86 assembly (clang, -O0):
<jac_chain_nm7_decref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jac_chain_nm7_decref>:
ret

LLVM IR (-O0):
define void @jac_chain_nm7_decref() {
ret void
}

LLVM IR (-O2):
define void @jac_chain_nm7_decref() {
ret void
}
int age_valid(unsigned int major, unsigned int minor, unsigned int revision) {
  if (major > ((unsigned short)-1))
    return 0;
  if (minor > ((unsigned char)-1))
    return 0;
  if (revision > ((unsigned char)-1))
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<age_valid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0xffff,-0x8(%rbp)
jbe    1126 <age_valid+0x26>
movl   $0x0,-0x4(%rbp)
jmp    115f <age_valid+0x5f>
cmpl   $0xff,-0xc(%rbp)
jbe    113f <age_valid+0x3f>
movl   $0x0,-0x4(%rbp)
jmp    115f <age_valid+0x5f>
cmpl   $0xff,-0x10(%rbp)
jbe    1158 <age_valid+0x58>
movl   $0x0,-0x4(%rbp)
jmp    115f <age_valid+0x5f>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<age_valid>:
cmp    $0x10000,%edi
setb   %al
or     %edx,%esi
cmp    $0x100,%esi
setb   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @age_valid(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = icmp ugt i32 %8, 65535
br i1 %9, label %10, label %11
10: ; preds = %3
store i32 0, i32* %4
br label %20
11: ; preds = %3
%12 = load i32, i32* %6
%13 = icmp ugt i32 %12, 255
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 0, i32* %4
br label %20
15: ; preds = %11
%16 = load i32, i32* %7
%17 = icmp ugt i32 %16, 255
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 0, i32* %4
br label %20
19: ; preds = %15
store i32 1, i32* %4
br label %20
20: ; preds = %19, %18, %14, %10
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @age_valid(i32 %0, i32 %1, i32 %2) {
%4 = icmp ult i32 %0, 65536
%5 = or i32 %2, %1
%6 = icmp ult i32 %5, 256
%7 = and i1 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int mLogGenerateCategory(char *);
int _mLOG_CAT_GBA_RR(void) {
  static int category = 0;
  if (!category) {
    category = mLogGenerateCategory("GBA RR");
  }
  return category;
}


x86 assembly (clang, -O0):
<_mLOG_CAT_GBA_RR>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,0x2f11(%rip)
jne    1133 <_mLOG_CAT_GBA_RR+0x23>
lea    0xed8(%rip),%rdi
call   1030 <mLogGenerateCategory@plt>
mov    %eax,0x2ef9(%rip)
mov    0x2ef3(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mLOG_CAT_GBA_RR>:
push   %rax
mov    0x2f15(%rip),%eax
test   %eax,%eax
je     111d <_mLOG_CAT_GBA_RR+0xd>
pop    %rcx
ret
lea    0xedc(%rip),%rdi
call   1030 <mLogGenerateCategory@plt>
mov    %eax,0x2efd(%rip)
pop    %rcx
ret

LLVM IR (-O0):
@_mLOG_CAT_GBA_RR.category = internal global i32 0
@.str = [7 x i8] c"GBA RR\00"
define i32 @_mLOG_CAT_GBA_RR() {
%1 = load i32, i32* @_mLOG_CAT_GBA_RR.category
%2 = icmp ne i32 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = call i32 @mLogGenerateCategory(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i32 %4, i32* @_mLOG_CAT_GBA_RR.category
br label %5
5: ; preds = %3, %0
%6 = load i32, i32* @_mLOG_CAT_GBA_RR.category
ret i32 %6
}

LLVM IR (-O2):
@_mLOG_CAT_GBA_RR.category = internal unnamed_addr global i32 0
@.str = [7 x i8] c"GBA RR\00"
define i32 @_mLOG_CAT_GBA_RR() {
%1 = load i32, i32* @_mLOG_CAT_GBA_RR.category
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @mLogGenerateCategory(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i32 %4, i32* @_mLOG_CAT_GBA_RR.category
br label %5
5: ; preds = %3, %0
%6 = phi i32 [ %4, %3 ], [ %1, %0 ]
ret i32 %6
}