xunge/DecIR huggingface dataset:
/* Type definitions */
typedef double int64_t;

/* Variables and functions */
double exp(double);
void __operation(int64_t a, double *ptr_c) {
  double c;
  c = 1.0 / (1.0 + exp(-1.0 * a));
  *ptr_c = c;
}


x86 assembly (clang, -O0):
<__operation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  0xedf(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
movsd  0xec5(%rip),%xmm1
addsd  %xmm0,%xmm1
movsd  0xeb9(%rip),%xmm0
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__operation>:
push   %rbx
mov    %rdi,%rbx
xorpd  0xee4(%rip),%xmm0
call   1030 <exp@plt>
movsd  0xee7(%rip),%xmm1
addsd  %xmm1,%xmm0
divsd  %xmm0,%xmm1
movsd  %xmm1,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @__operation(double %0, double* %1) {
%3 = alloca double
%4 = alloca double*
%5 = alloca double
store double %0, double* %3
store double* %1, double** %4
%6 = load double, double* %3
%7 = fmul double -1.000000e+00, %6
%8 = call double @exp(double %7)
%9 = fadd double 1.000000e+00, %8
%10 = fdiv double 1.000000e+00, %9
store double %10, double* %5
%11 = load double, double* %5
%12 = load double*, double** %4
store double %11, double* %12
ret void
}

LLVM IR (-O2):
define void @__operation(double %0, double* nocapture writeonly %1) {
%3 = fneg double %0
%4 = tail call double @exp(double %3)
%5 = fadd double %4, 1.000000e+00
%6 = fdiv double 1.000000e+00, %5
store double %6, double* %1
ret void
}
void SysCtlNmiFlgClr(unsigned long ulNmis) {
  unsigned long ulMWRAllow;
  ;
  ulMWRAllow = (*((volatile unsigned long *)(0x400FB980)));
  (*((volatile unsigned long *)(0x400FB980))) = 0xA5A5A5A5;
  (*((volatile unsigned long *)(0x400FBA00 + 0x00000008))) =
      (ulNmis | 0x00000001);
  (*((volatile unsigned long *)(0x400FB980))) = ulMWRAllow;
}


x86 assembly (clang, -O0):
<SysCtlNmiFlgClr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x400fb980,%eax
mov    (%rax),%rax
mov    %rax,-0x10(%rbp)
mov    $0x400fb980,%eax
mov    $0xa5a5a5a5,%ecx
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rcx
or     $0x1,%rcx
mov    $0x400fba08,%eax
mov    %rcx,(%rax)
mov    -0x10(%rbp),%rcx
mov    $0x400fb980,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlNmiFlgClr>:
mov    0x400fb980,%rax
40
mov    $0xa5a5a5a5,%ecx
mov    %rcx,0x400fb980
40
or     $0x1,%rdi
mov    %rdi,0x400fba08
40
mov    %rax,0x400fb980
40
ret

LLVM IR (-O0):
define void @SysCtlNmiFlgClr(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store i64 %4, i64* %3
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%5 = load i64, i64* %2
%6 = or i64 %5, 1
store volatile i64 %6, i64* inttoptr (i64 1074772488 to i64*)
%7 = load i64, i64* %3
store volatile i64 %7, i64* inttoptr (i64 1074772352 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysCtlNmiFlgClr(i64 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1074772352 to i64*)
store volatile i64 2779096485, i64* inttoptr (i64 1074772352 to i64*)
%3 = or i64 %0, 1
store volatile i64 %3, i64* inttoptr (i64 1074772488 to i64*)
store volatile i64 %2, i64* inttoptr (i64 1074772352 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FP_OP_MEM(int);
int /*<<< orphan*/ addbyte(int);
void FP_OP_IW(int op) {
  addbyte(0x0f);
  addbyte(0xbf);
  addbyte(0xc0);
  addbyte(0xf2);
  addbyte(0x0f);
  addbyte(0x2a);
  addbyte(0xc8);
  FP_OP_MEM(op);
}


x86 assembly (clang, -O0):
<FP_OP_IW>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xf,%edi
call   1040 <addbyte@plt>
mov    $0xbf,%edi
call   1040 <addbyte@plt>
mov    $0xc0,%edi
call   1040 <addbyte@plt>
mov    $0xf2,%edi
call   1040 <addbyte@plt>
mov    $0xf,%edi
call   1040 <addbyte@plt>
mov    $0x2a,%edi
call   1040 <addbyte@plt>
mov    $0xc8,%edi
call   1040 <addbyte@plt>
mov    -0x4(%rbp),%edi
call   1030 <FP_OP_MEM@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FP_OP_IW>:
push   %rbx
mov    %edi,%ebx
mov    $0xf,%edi
call   1040 <addbyte@plt>
mov    $0xbf,%edi
call   1040 <addbyte@plt>
mov    $0xc0,%edi
call   1040 <addbyte@plt>
mov    $0xf2,%edi
call   1040 <addbyte@plt>
mov    $0xf,%edi
call   1040 <addbyte@plt>
mov    $0x2a,%edi
call   1040 <addbyte@plt>
mov    $0xc8,%edi
call   1040 <addbyte@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <FP_OP_MEM@plt>

LLVM IR (-O0):
define void @FP_OP_IW(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @addbyte(i32 15)
%4 = call i32 @addbyte(i32 191)
%5 = call i32 @addbyte(i32 192)
%6 = call i32 @addbyte(i32 242)
%7 = call i32 @addbyte(i32 15)
%8 = call i32 @addbyte(i32 42)
%9 = call i32 @addbyte(i32 200)
%10 = load i32, i32* %2
%11 = call i32 @FP_OP_MEM(i32 %10)
ret void
}

LLVM IR (-O2):
define void @FP_OP_IW(i32 %0) {
%2 = tail call i32 @addbyte(i32 15)
%3 = tail call i32 @addbyte(i32 191)
%4 = tail call i32 @addbyte(i32 192)
%5 = tail call i32 @addbyte(i32 242)
%6 = tail call i32 @addbyte(i32 15)
%7 = tail call i32 @addbyte(i32 42)
%8 = tail call i32 @addbyte(i32 200)
%9 = tail call i32 @FP_OP_MEM(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int dgr_output(char *string) {
  printf("%s", string);
  return 0;
}


x86 assembly (clang, -O0):
<dgr_output>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dgr_output>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define i32 @dgr_output(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define i32 @dgr_output(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 0
}
void test_37_2(int *mem) { __atomic_nand_fetch(mem, 1, 4); }


x86 assembly (clang, -O0):
<test_37_2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    %ecx,-0x18(%rbp)
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%esi
mov    %eax,%edx
and    %esi,%edx
mov    %edx,-0x28(%rbp)
not    %edx
lock cmpxchg %edx,(%rcx)
sete   %cl
mov    %eax,-0x24(%rbp)
test   $0x1,%cl
mov    %eax,-0x14(%rbp)
jne    1150 <test_37_2+0x50>
jmp    1122 <test_37_2+0x22>
mov    -0x18(%rbp),%ecx
mov    -0x24(%rbp),%eax
and    %ecx,%eax
xor    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_37_2>:
mov    (%rdi),%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %eax,%ecx
not    %ecx
or     $0xfffffffe,%ecx
lock cmpxchg %ecx,(%rdi)
jne    1110 <test_37_2+0x10>
ret

LLVM IR (-O0):
define void @test_37_2(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
store i32 1, i32* %3
%6 = load i32, i32* %3
%7 = atomicrmw nand i32* %5, i32 %6 acq_rel
%8 = and i32 %7, %6
%9 = xor i32 %8, -1
store i32 %9, i32* %4
%10 = load i32, i32* %4
ret void
}

LLVM IR (-O2):
define void @test_37_2(i32* nocapture %0) {
%2 = atomicrmw nand i32* %0, i32 1 acq_rel
ret void
}
/* Variables and functions */
int /*<<< orphan*/ redraw_map_sub(int /*<<< orphan*/);
void redraw_map(void) { redraw_map_sub(0); }


x86 assembly (clang, -O0):
<redraw_map>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <redraw_map_sub@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<redraw_map>:
xor    %edi,%edi
jmp    1030 <redraw_map_sub@plt>

LLVM IR (-O0):
define void @redraw_map() {
%1 = call i32 @redraw_map_sub(i32 0)
ret void
}

LLVM IR (-O2):
define void @redraw_map() {
%1 = tail call i32 @redraw_map_sub(i32 0)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int rotl32(int, int);
uint32_t remix(uint32_t hash) {
  hash = rotl32(hash, 13);
  hash = hash * 5 + 0xE6546B64;
  return hash;
}


x86 assembly (clang, -O0):
<remix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xd,%esi
call   1030 <rotl32@plt>
mov    %eax,-0x4(%rbp)
imul   $0x5,-0x4(%rbp),%eax
add    $0xe6546b64,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remix>:
push   %rax
mov    $0xd,%esi
call   1030 <rotl32@plt>
lea    (%rax,%rax,4),%eax
add    $0xe6546b64,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @remix(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @rotl32(i32 %3, i32 13)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = mul nsw i32 %5, 5
%7 = add i32 %6, -430675100
store i32 %7, i32* %2
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @remix(i32 %0) {
%2 = tail call i32 @rotl32(i32 %0, i32 13)
%3 = mul nsw i32 %2, 5
%4 = add i32 %3, -430675100
ret i32 %4
}
/* Variables and functions */
int fib1(int);
int fib2(int x) {
  if (x > 1)
    return (fib1(x - 1) + fib1(x - 2));
  else
    return (x);
}


x86 assembly (clang, -O0):
<fib2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    114d <fib2+0x3d>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib1@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib1@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <fib2+0x43>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib2>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
cmp    $0x2,%edi
jl     1132 <fib2+0x22>
lea    -0x1(%rbx),%edi
call   1030 <fib1@plt>
mov    %eax,%ebp
add    $0xfffffffe,%ebx
mov    %ebx,%edi
call   1030 <fib1@plt>
mov    %eax,%ebx
add    %ebp,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 1
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load i32, i32* %3
%8 = sub nsw i32 %7, 1
%9 = call i32 @fib1(i32 %8)
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 2
%12 = call i32 @fib1(i32 %11)
%13 = add nsw i32 %9, %12
store i32 %13, i32* %2
br label %16
14: ; preds = %1
%15 = load i32, i32* %3
store i32 %15, i32* %2
br label %16
16: ; preds = %14, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @fib2(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %9
3: ; preds = %1
%4 = add nsw i32 %0, -1
%5 = tail call i32 @fib1(i32 %4)
%6 = add nsw i32 %0, -2
%7 = tail call i32 @fib1(i32 %6)
%8 = add nsw i32 %7, %5
br label %9
9: ; preds = %1, %3
%10 = phi i32 [ %8, %3 ], [ %0, %1 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ cpc_ClrScr();
int /*<<< orphan*/ printf(char *);
void Menu() {
  cpc_ClrScr();
  printf("\n\nTITULO DEL JUEGO:\n\n");
  printf("1. Jugar");
  printf("2. Configurar");
  printf("3. About me");
  printf("4. Puntuaciones");
}


x86 assembly (clang, -O0):
<Menu>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <cpc_ClrScr@plt>
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Menu>:
push   %rax
xor    %eax,%eax
call   1050 <cpc_ClrScr@plt>
lea    0xef4(%rip),%rdi
call   1030 <puts@plt>
lea    0xeb5(%rip),%rdi
call   1040 <printf@plt>
lea    0xeb2(%rip),%rdi
call   1040 <printf@plt>
lea    0xeb4(%rip),%rdi
call   1040 <printf@plt>
lea    0xeb4(%rip),%rdi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"\0A\0ATITULO DEL JUEGO:\0A\0A\00"
@.str.1 = [9 x i8] c"1. Jugar\00"
@.str.2 = [14 x i8] c"2. Configurar\00"
@.str.3 = [12 x i8] c"3. About me\00"
@.str.4 = [16 x i8] c"4. Puntuaciones\00"
define void @Menu() {
%1 = call i32 (...) @cpc_ClrScr()
%2 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
%6 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str.1 = [9 x i8] c"1. Jugar\00"
@.str.2 = [14 x i8] c"2. Configurar\00"
@.str.3 = [12 x i8] c"3. About me\00"
@.str.4 = [16 x i8] c"4. Puntuaciones\00"
@str = [21 x i8] c"\0A\0ATITULO DEL JUEGO:\0A\00"
define void @Menu() {
%1 = tail call i32 (...) @cpc_ClrScr()
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0))
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0))
%6 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void free_dmatrix(double **m, long nrl, long ncl) {
  free((char *)(m[nrl] + ncl - 1));
  free((char *)(m + nrl - 1));
}


x86 assembly (clang, -O0):
<free_dmatrix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
mov    -0x18(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_dmatrix>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
mov    (%rdi,%rsi,8),%rax
lea    (%rax,%rdx,8),%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
lea    (%rbx,%r14,8),%rdi
add    $0xfffffffffffffff8,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @free_dmatrix(double** %0, i64 %1, i64 %2) {
%4 = alloca double**
%5 = alloca i64
%6 = alloca i64
store double** %0, double*** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load double**, double*** %4
%8 = load i64, i64* %5
%9 = getelementptr inbounds double*, double** %7, i64 %8
%10 = load double*, double** %9
%11 = load i64, i64* %6
%12 = getelementptr inbounds double, double* %10, i64 %11
%13 = getelementptr inbounds double, double* %12, i64 -1
%14 = bitcast double* %13 to i8*
%15 = call i32 @free(i8* %14)
%16 = load double**, double*** %4
%17 = load i64, i64* %5
%18 = getelementptr inbounds double*, double** %16, i64 %17
%19 = getelementptr inbounds double*, double** %18, i64 -1
%20 = bitcast double** %19 to i8*
%21 = call i32 @free(i8* %20)
ret void
}

LLVM IR (-O2):
define void @free_dmatrix(double** nocapture %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds double*, double** %0, i64 %1
%5 = load double*, double** %4
%6 = getelementptr inbounds double, double* %5, i64 %2
%7 = getelementptr inbounds double, double* %6, i64 -1
%8 = bitcast double* %7 to i8*
%9 = tail call i32 @free(i8* %8)
%10 = getelementptr inbounds double*, double** %4, i64 -1
%11 = bitcast double** %10 to i8*
%12 = tail call i32 @free(i8* %11)
ret void
}
void map(int *array, int len, double (*function)(double)) {
  for (int i = 0; i < len; i++) {
    array[i] = function(array[i]);
  }
}


x86 assembly (clang, -O0):
<map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1156 <map+0x56>
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
movslq -0x1c(%rbp),%rdx
cvtsi2sdl (%rcx,%rdx,4),%xmm0
call   *%rax
cvttsd2si %xmm0,%edx
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    111a <map+0x1a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<map>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    113d <map+0x3d>
mov    %rdx,%r14
mov    %rdi,%r12
mov    %esi,%r15d
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
xorps  %xmm0,%xmm0
cvtsi2sdl (%r12,%rbx,4),%xmm0
call   *%r14
cvttsd2si %xmm0,%eax
mov    %eax,(%r12,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1120 <map+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @map(i32* %0, i32 %1, double (double)* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca double (double)*
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store double (double)* %2, double (double)** %6
store i32 0, i32* %7
br label %8
8: ; preds = %26, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %5
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %29
12: ; preds = %8
%13 = load double (double)*, double (double)** %6
%14 = load i32*, i32** %4
%15 = load i32, i32* %7
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = sitofp i32 %18 to double
%20 = call double %13(double %19)
%21 = fptosi double %20 to i32
%22 = load i32*, i32** %4
%23 = load i32, i32* %7
%24 = sext i32 %23 to i64
%25 = getelementptr inbounds i32, i32* %22, i64 %24
store i32 %21, i32* %25
br label %26
26: ; preds = %12
%27 = load i32, i32* %7
%28 = add nsw i32 %27, 1
store i32 %28, i32* %7
br label %8
29: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @map(i32* nocapture %0, i32 %1, double (double)* nocapture %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %8
7: ; preds = %8, %3
ret void
8: ; preds = %5, %8
%9 = phi i64 [ 0, %5 ], [ %15, %8 ]
%10 = getelementptr inbounds i32, i32* %0, i64 %9
%11 = load i32, i32* %10
%12 = sitofp i32 %11 to double
%13 = tail call double %2(double %12)
%14 = fptosi double %13 to i32
store i32 %14, i32* %10
%15 = add nuw nsw i64 %9, 1
%16 = icmp eq i64 %15, %6
br i1 %16, label %7, label %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
void write8be(uint8_t v, uint8_t *dest) { *dest = v; }


x86 assembly (clang, -O0):
<write8be>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<write8be>:
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @write8be(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
store i32 %5, i32* %6
ret void
}

LLVM IR (-O2):
define void @write8be(i32 %0, i32* nocapture writeonly %1) {
store i32 %0, i32* %1
ret void
}
/* Variables and functions */
int fmax(int, int);
int fmin(int, int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
void main() {
  int a, b;
  scanf("%d%d", &a, &b);
  printf("fmax is:%d\n", fmax(a, b));
  printf("fmin is:%d\n", fmin(a, b));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xeb1(%rip),%rdi
lea    -0x4(%rbp),%rsi
lea    -0x8(%rbp),%rdx
call   1050 <scanf@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1060 <fmax@plt>
mov    %eax,%esi
lea    0xe95(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <fmin@plt>
mov    %eax,%esi
lea    0xe88(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xeb8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
mov    (%rsp),%esi
call   1060 <fmax@plt>
lea    0xe9d(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    0x4(%rsp),%edi
mov    (%rsp),%esi
call   1040 <fmin@plt>
lea    0xe8f(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%d%d\00"
@.str.1 = [12 x i8] c"fmax is:%d\0A\00"
@.str.2 = [12 x i8] c"fmin is:%d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%4 = load i32, i32* %1
%5 = load i32, i32* %2
%6 = call i32 @fmax(i32 %4, i32 %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %6)
%8 = load i32, i32* %1
%9 = load i32, i32* %2
%10 = call i32 @fmin(i32 %8, i32 %9)
%11 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%d%d\00"
@.str.1 = [12 x i8] c"fmax is:%d\0A\00"
@.str.2 = [12 x i8] c"fmin is:%d\0A\00"
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
%4 = bitcast i32* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32* %1, i32* %2)
%6 = load i32, i32* %1
%7 = load i32, i32* %2
%8 = call i32 @fmax(i32 %6, i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %8)
%10 = load i32, i32* %1
%11 = load i32, i32* %2
%12 = call i32 @fmin(i32 %10, i32 %11)
%13 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.2, i64 0, i64 0), i32 %12)
ret void
}
int minimum(int a, int b) { return a < b ? a : b; }


x86 assembly (clang, -O0):
<minimum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <minimum+0x21>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1127 <minimum+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minimum>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @minimum(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i32, i32* %3
br label %12
10: ; preds = %2
%11 = load i32, i32* %4
br label %12
12: ; preds = %10, %8
%13 = phi i32 [ %9, %8 ], [ %11, %10 ]
ret i32 %13
}

LLVM IR (-O2):
define i32 @minimum(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ cgincbstat(char *, int, int);
void cgincsb(int a) { cgincbstat("add", a, 1); }


x86 assembly (clang, -O0):
<cgincsb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
mov    $0x1,%edx
call   1030 <cgincbstat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgincsb>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
mov    $0x1,%edx
jmp    1030 <cgincbstat@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"add\00"
define void @cgincsb(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @cgincbstat(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3, i32 1)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"add\00"
define void @cgincsb(i32 %0) {
%2 = tail call i32 @cgincbstat(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0, i32 1)
ret void
}
unsigned xrop3_13_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~S;
  stk2 = D & stk3;
  stk1 = T | stk2;
  stk1 = ~stk1;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_13_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_13_0_0>:
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
not    %dil
movzbl %dil,%eax
or     %ecx,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @xrop3_13_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %7
%29 = load i32, i32* %9
%30 = or i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = xor i32 %31, -1
store i32 %32, i32* %8
%33 = load i32, i32* %8
ret i32 %33
}

LLVM IR (-O2):
define i32 @xrop3_13_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %1 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = xor i8 %0, -1
%6 = zext i8 %5 to i32
%7 = or i32 %4, %6
%8 = xor i32 %7, -1
ret i32 %8
}
/* Variables and functions */
int *bar();
void foo(void) {
  long x;
  int *y = bar();
  for (x = -1 / sizeof(int); x; --x, ++y)
    *y = 0;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <bar@plt>
mov    %rax,-0x10(%rbp)
movabs $0x3fffffffffffffff,%rax
ff ff 3f
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1163 <foo+0x53>
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x10(%rbp)
jmp    1131 <foo+0x21>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
xor    %eax,%eax
call   1030 <bar@plt>
mov    %rax,%rdi
xor    %esi,%esi
mov    $0xfffffffffffffffc,%rdx
call   1040 <memset@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @foo() {
%1 = alloca i64
%2 = alloca i32*
%3 = call i32* (...) @bar()
store i32* %3, i32** %2
store i64 4611686018427387903, i64* %1
br label %4
4: ; preds = %9, %0
%5 = load i64, i64* %1
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %4
%8 = load i32*, i32** %2
store i32 0, i32* %8
br label %9
9: ; preds = %7
%10 = load i64, i64* %1
%11 = add nsw i64 %10, -1
store i64 %11, i64* %1
%12 = load i32*, i32** %2
%13 = getelementptr inbounds i32, i32* %12, i32 1
store i32* %13, i32** %2
br label %4
14: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @foo() {
%1 = tail call i32* (...) @bar()
%2 = bitcast i32* %1 to i8*
ret void
}
int test_imm_7Cuint32_reg(unsigned int val) {
  return ((val) & (0x7C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_7Cuint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x7c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_7Cuint32_reg>:
test   $0x7c,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_7Cuint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 124
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_7Cuint32_reg(i32 %0) {
%2 = and i32 %0, 124
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ ngen(char *, char *, int);
void cgldla(int n) { ngen("%s\t%d(%%rbp),%%rax", "leaq", n); }


x86 assembly (clang, -O0):
<cgldla>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xedb(%rip),%rdi
lea    0xee7(%rip),%rsi
call   1030 <ngen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cgldla>:
mov    %edi,%edx
lea    0xee7(%rip),%rdi
lea    0xef3(%rip),%rsi
jmp    1030 <ngen@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"%s\09%d(%%rbp),%%rax\00"
@.str.1 = [5 x i8] c"leaq\00"
define void @cgldla(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @ngen(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"%s\09%d(%%rbp),%%rax\00"
@.str.1 = [5 x i8] c"leaq\00"
define void @cgldla(i32 %0) {
%2 = tail call i32 @ngen(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0), i32 %0)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t f32u(uint32_t x) { return x ^ 1; }


x86 assembly (clang, -O0):
<f32u>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
xor    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f32u>:
mov    %edi,%eax
xor    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @f32u(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = xor i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @f32u(i32 %0) {
%2 = xor i32 %0, 1
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ dumb_show_screen(int /*<<< orphan*/);
void os_reset_screen(void) { dumb_show_screen(0); }


x86 assembly (clang, -O0):
<os_reset_screen>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <dumb_show_screen@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<os_reset_screen>:
xor    %edi,%edi
jmp    1030 <dumb_show_screen@plt>

LLVM IR (-O0):
define void @os_reset_screen() {
%1 = call i32 @dumb_show_screen(i32 0)
ret void
}

LLVM IR (-O2):
define void @os_reset_screen() {
%1 = tail call i32 @dumb_show_screen(i32 0)
ret void
}
/* Type definitions */
struct hiena_frag {
  int dummy;
};
struct frag_fh {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ frag_cleanup(struct hiena_frag *);
int /*<<< orphan*/ frag_fh_cleanup(struct frag_fh *);
struct frag_fh *frag_fh_new(struct hiena_frag *);
struct hiena_frag *frag_new();
int main() {
  struct frag_fh *fh;
  struct hiena_frag *f;
  f = frag_new();
  fh = frag_fh_new(f);
  frag_fh_cleanup(fh);
  frag_cleanup(f);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <frag_new@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <frag_fh_new@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <frag_fh_cleanup@plt>
mov    -0x18(%rbp),%rdi
call   1060 <frag_cleanup@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1040 <frag_new@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <frag_fh_new@plt>
mov    %rax,%rdi
call   1050 <frag_fh_cleanup@plt>
mov    %rbx,%rdi
call   1060 <frag_cleanup@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.frag_fh = type { i32 }
%struct.hiena_frag = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.frag_fh*
%3 = alloca %struct.hiena_frag*
store i32 0, i32* %1
%4 = call %struct.hiena_frag* (...) @frag_new()
store %struct.hiena_frag* %4, %struct.hiena_frag** %3
%5 = load %struct.hiena_frag*, %struct.hiena_frag** %3
%6 = call %struct.frag_fh* @frag_fh_new(%struct.hiena_frag* %5)
store %struct.frag_fh* %6, %struct.frag_fh** %2
%7 = load %struct.frag_fh*, %struct.frag_fh** %2
%8 = call i32 @frag_fh_cleanup(%struct.frag_fh* %7)
%9 = load %struct.hiena_frag*, %struct.hiena_frag** %3
%10 = call i32 @frag_cleanup(%struct.hiena_frag* %9)
ret i32 0
}

LLVM IR (-O2):
%struct.hiena_frag = type { i32 }
%struct.frag_fh = type { i32 }
define i32 @main() {
%1 = tail call %struct.hiena_frag* (...) @frag_new()
%2 = tail call %struct.frag_fh* @frag_fh_new(%struct.hiena_frag* %1)
%3 = tail call i32 @frag_fh_cleanup(%struct.frag_fh* %2)
%4 = tail call i32 @frag_cleanup(%struct.hiena_frag* %1)
ret i32 0
}
int is_utf8_continuation_byte(char byte) { return (byte & 0xc0) == 0x80; }


x86 assembly (clang, -O0):
<is_utf8_continuation_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_utf8_continuation_byte>:
and    $0xc0,%dil
xor    %eax,%eax
cmp    $0x80,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_utf8_continuation_byte(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 192
%6 = icmp eq i32 %5, 128
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @is_utf8_continuation_byte(i8 signext %0) {
%2 = and i8 %0, -64
%3 = icmp eq i8 %2, -128
%4 = zext i1 %3 to i32
ret i32 %4
}
int task_add_to_ready_queue() { return 0; }


x86 assembly (clang, -O0):
<task_add_to_ready_queue>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<task_add_to_ready_queue>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @task_add_to_ready_queue() {
ret i32 0
}

LLVM IR (-O2):
define i32 @task_add_to_ready_queue() {
ret i32 0
}
int dif(int x, int y) { return (x - y); }


x86 assembly (clang, -O0):
<dif>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dif>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @dif(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @dif(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
double degRad(double ang) {
  return ang * (3.14159265358979323846264338327950288 / 180.0);
}


x86 assembly (clang, -O0):
<degRad>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<degRad>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @degRad(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 0x3F91DF46A2529D39
ret double %4
}

LLVM IR (-O2):
define double @degRad(double %0) {
%2 = fmul double %0, 0x3F91DF46A2529D39
ret double %2
}
int main(void) {
  ;
  ;
  while (1) {
    ;
    ;
    ;
    ;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
jmp    110b <main+0xb>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %2
br label %2
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %1
br label %1
}
int test_imm_8Aint8_reg(signed char val) {
  return ((val) & (0x8A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Aint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0x8a,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Aint8_reg>:
test   $0x8a,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Aint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 138
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_8Aint8_reg(i8 signext %0) {
%2 = and i8 %0, -118
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
unsigned func0(void) { return 0; }


x86 assembly (clang, -O0):
<func0>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func0>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @func0() {
ret i32 0
}

LLVM IR (-O2):
define i32 @func0() {
ret i32 0
}
void ft_strclr(char *s) {
  int i;
  i = 0;
  while (s[i])
    s[i++] = '\0';
}


x86 assembly (clang, -O0):
<ft_strclr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     113c <ft_strclr+0x3c>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    %ecx,%edx
add    $0x1,%edx
mov    %edx,-0xc(%rbp)
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
jmp    110f <ft_strclr+0xf>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strclr>:
cmpb   $0x0,(%rdi)
je     111d <ft_strclr+0x1d>
add    $0x1,%rdi
nopl   0x0(%rax)
movb   $0x0,-0x1(%rdi)
cmpb   $0x0,(%rdi)
lea    0x1(%rdi),%rdi
jne    1110 <ft_strclr+0x10>
ret

LLVM IR (-O0):
define void @ft_strclr(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %4
%12 = load i8*, i8** %2
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
%15 = sext i32 %13 to i64
%16 = getelementptr inbounds i8, i8* %12, i64 %15
store i8 0, i8* %16
br label %4
17: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @ft_strclr(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i64 %5, 1
store i8 0, i8* %6
%8 = getelementptr inbounds i8, i8* %0, i64 %7
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
/* Variables and functions */
char *X509_get_default_cert_dir();
int /*<<< orphan*/ X509_get_default_cert_dir_env();
char *getenv(int /*<<< orphan*/);
const char *GetX509RootStorePath() {
  const char *dir = getenv(X509_get_default_cert_dir_env());
  if (!dir) {
    dir = X509_get_default_cert_dir();
  }
  return dir;
}


x86 assembly (clang, -O0):
<GetX509RootStorePath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1050 <X509_get_default_cert_dir_env@plt>
mov    %eax,%edi
call   1030 <getenv@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1160 <GetX509RootStorePath+0x30>
mov    $0x0,%al
call   1040 <X509_get_default_cert_dir@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetX509RootStorePath>:
push   %rax
xor    %eax,%eax
call   1050 <X509_get_default_cert_dir_env@plt>
mov    %eax,%edi
call   1030 <getenv@plt>
test   %rax,%rax
je     1146 <GetX509RootStorePath+0x16>
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
jmp    1040 <X509_get_default_cert_dir@plt>

LLVM IR (-O0):
define i8* @GetX509RootStorePath() {
%1 = alloca i8*
%2 = call i32 (...) @X509_get_default_cert_dir_env()
%3 = call i8* @getenv(i32 %2)
store i8* %3, i8** %1
%4 = load i8*, i8** %1
%5 = icmp ne i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %0
%7 = call i8* (...) @X509_get_default_cert_dir()
store i8* %7, i8** %1
br label %8
8: ; preds = %6, %0
%9 = load i8*, i8** %1
ret i8* %9
}

LLVM IR (-O2):
define i8* @GetX509RootStorePath() {
%1 = tail call i32 (...) @X509_get_default_cert_dir_env()
%2 = tail call i8* @getenv(i32 %1)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i8* (...) @X509_get_default_cert_dir()
br label %6
6: ; preds = %4, %0
%7 = phi i8* [ %2, %0 ], [ %5, %4 ]
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ configureBlePriv12Patch();
int /*<<< orphan*/ enterBlePriv12CpePatch();
void refreshBlePriv12Patch(void) {
  enterBlePriv12CpePatch();
  configureBlePriv12Patch();
}


x86 assembly (clang, -O0):
<refreshBlePriv12Patch>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <enterBlePriv12CpePatch@plt>
mov    $0x0,%al
call   1040 <configureBlePriv12Patch@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<refreshBlePriv12Patch>:
push   %rax
xor    %eax,%eax
call   1030 <enterBlePriv12CpePatch@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <configureBlePriv12Patch@plt>

LLVM IR (-O0):
define void @refreshBlePriv12Patch() {
%1 = call i32 (...) @enterBlePriv12CpePatch()
%2 = call i32 (...) @configureBlePriv12Patch()
ret void
}

LLVM IR (-O2):
define void @refreshBlePriv12Patch() {
%1 = tail call i32 (...) @enterBlePriv12CpePatch()
%2 = tail call i32 (...) @configureBlePriv12Patch()
ret void
}
unsigned long long movdi_2(int a) { return 0xF0F0000000000000LLU; }


x86 assembly (clang, -O0):
<movdi_2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movabs $0xf0f0000000000000,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<movdi_2>:
movabs $0xf0f0000000000000,%rax
ret

LLVM IR (-O0):
define i64 @movdi_2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i64 -1085367510196289536
}

LLVM IR (-O2):
define i64 @movdi_2(i32 %0) {
ret i64 -1085367510196289536
}
/* Type definitions */
struct sg_rwlock {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sg_rwlock_wrrelease(struct sg_rwlock *);
void sg_rwlock_rdrelease(struct sg_rwlock *p) { sg_rwlock_wrrelease(p); }


x86 assembly (clang, -O0):
<sg_rwlock_rdrelease>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sg_rwlock_wrrelease@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sg_rwlock_rdrelease>:
jmp    1030 <sg_rwlock_wrrelease@plt>

LLVM IR (-O0):
%struct.sg_rwlock = type { i32 }
define void @sg_rwlock_rdrelease(%struct.sg_rwlock* %0) {
%2 = alloca %struct.sg_rwlock*
store %struct.sg_rwlock* %0, %struct.sg_rwlock** %2
%3 = load %struct.sg_rwlock*, %struct.sg_rwlock** %2
%4 = call i32 @sg_rwlock_wrrelease(%struct.sg_rwlock* %3)
ret void
}

LLVM IR (-O2):
%struct.sg_rwlock = type { i32 }
define void @sg_rwlock_rdrelease(%struct.sg_rwlock* %0) {
%2 = tail call i32 @sg_rwlock_wrrelease(%struct.sg_rwlock* %0)
ret void
}
int sllq_version_major(void) { return 1; }


x86 assembly (clang, -O0):
<sllq_version_major>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sllq_version_major>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @sllq_version_major() {
ret i32 1
}

LLVM IR (-O2):
define i32 @sllq_version_major() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ usb_putchar(int /*<<< orphan*/);
__attribute__((used)) int _write(int file, char *ptr, int len) {
  int i;
  (void)file;
  for (i = 0; i < len; i++) {
    usb_putchar(*ptr++);
  }
  return len;
}


x86 assembly (clang, -O0):
<_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115a <_write+0x4a>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%edi
call   1030 <usb_putchar@plt>
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    1129 <_write+0x19>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_write>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
test   %edx,%edx
jle    1142 <_write+0x32>
mov    %rsi,%r15
mov    %r14d,%ebp
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
movsbl (%r15,%rbx,1),%edi
call   1030 <usb_putchar@plt>
add    $0x1,%rbx
cmp    %ebx,%ebp
jne    1130 <_write+0x20>
mov    %r14d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i32 (i32, i8*, i32)* @_write to i8*)], section "llvm.metadata"
define i32 @_write(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
store i32 0, i32* %7
br label %9
9: ; preds = %19, %3
%10 = load i32, i32* %7
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %22
13: ; preds = %9
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %5
%16 = load i8, i8* %14
%17 = sext i8 %16 to i32
%18 = call i32 @usb_putchar(i32 %17)
br label %19
19: ; preds = %13
%20 = load i32, i32* %7
%21 = add nsw i32 %20, 1
store i32 %21, i32* %7
br label %9
22: ; preds = %9
%23 = load i32, i32* %6
ret i32 %23
}

LLVM IR (-O2):
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i32 (i32, i8*, i32)* @_write to i8*)], section "llvm.metadata"
define i32 @_write(i32 %0, i8* nocapture %1, i32 returned %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %14
5: ; preds = %3, %5
%6 = phi i32 [ %12, %5 ], [ 0, %3 ]
%7 = phi i8* [ %8, %5 ], [ %1, %3 ]
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %7
%10 = sext i8 %9 to i32
%11 = tail call i32 @usb_putchar(i32 %10)
%12 = add nuw nsw i32 %6, 1
%13 = icmp eq i32 %12, %2
br i1 %13, label %14, label %5
14: ; preds = %5, %3
ret i32 %2
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_bus_message_peek_type(void *m, char *type, const char **contents) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_bus_message_peek_type>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
mov    0x2ec7(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_bus_message_peek_type>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_bus_message_peek_type(i8* %0, i8* %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8**
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8** %2, i8*** %6
%7 = load i32, i32* @EINVAL
%8 = sub nsw i32 0, %7
ret i32 %8
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_bus_message_peek_type(i8* nocapture readnone %0, i8* nocapture readnone %1, i8** nocapture readnone %2) {
%4 = load i32, i32* @EINVAL
%5 = sub nsw i32 0, %4
ret i32 %5
}
void glCheckFramebufferStatus(void) { return; }


x86 assembly (clang, -O0):
<glCheckFramebufferStatus>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glCheckFramebufferStatus>:
ret

LLVM IR (-O0):
define void @glCheckFramebufferStatus() {
ret void
}

LLVM IR (-O2):
define void @glCheckFramebufferStatus() {
ret void
}