int isoperator(char c) {
  if (c == '+')
    return (1);
  if (c == '-')
    return (1);
  if (c == '*')
    return (1);
  if (c == '=')
    return (1);
  if (c == '!')
    return (1);
  if (c == '<')
    return (1);
  if (c == '>')
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<isoperator>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x2b,%eax
jne    1123 <isoperator+0x23>
movl   $0x1,-0x4(%rbp)
jmp    11c0 <isoperator+0xc0>
movsbl -0x5(%rbp),%eax
cmp    $0x2d,%eax
jne    113c <isoperator+0x3c>
movl   $0x1,-0x4(%rbp)
jmp    11c0 <isoperator+0xc0>
movsbl -0x5(%rbp),%eax
cmp    $0x2a,%eax
jne    1155 <isoperator+0x55>
movl   $0x1,-0x4(%rbp)
jmp    11c0 <isoperator+0xc0>
movsbl -0x5(%rbp),%eax
cmp    $0x3d,%eax
jne    116e <isoperator+0x6e>
movl   $0x1,-0x4(%rbp)
jmp    11c0 <isoperator+0xc0>
movsbl -0x5(%rbp),%eax
cmp    $0x21,%eax
jne    1187 <isoperator+0x87>
movl   $0x1,-0x4(%rbp)
jmp    11c0 <isoperator+0xc0>
movsbl -0x5(%rbp),%eax
cmp    $0x3c,%eax
jne    11a0 <isoperator+0xa0>
movl   $0x1,-0x4(%rbp)
jmp    11c0 <isoperator+0xc0>
movsbl -0x5(%rbp),%eax
cmp    $0x3e,%eax
jne    11b9 <isoperator+0xb9>
movl   $0x1,-0x4(%rbp)
jmp    11c0 <isoperator+0xc0>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isoperator>:
cmp    $0x3e,%dil
ja     1120 <isoperator+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x70002c0200000000,%rdx
bt     %rcx,%rdx
jae    1120 <isoperator+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isoperator(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 43
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %39
8: ; preds = %1
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 45
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %2
br label %39
13: ; preds = %8
%14 = load i8, i8* %3
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 42
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 1, i32* %2
br label %39
18: ; preds = %13
%19 = load i8, i8* %3
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 61
br i1 %21, label %22, label %23
22: ; preds = %18
store i32 1, i32* %2
br label %39
23: ; preds = %18
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 33
br i1 %26, label %27, label %28
27: ; preds = %23
store i32 1, i32* %2
br label %39
28: ; preds = %23
%29 = load i8, i8* %3
%30 = sext i8 %29 to i32
%31 = icmp eq i32 %30, 60
br i1 %31, label %32, label %33
32: ; preds = %28
store i32 1, i32* %2
br label %39
33: ; preds = %28
%34 = load i8, i8* %3
%35 = sext i8 %34 to i32
%36 = icmp eq i32 %35, 62
br i1 %36, label %37, label %38
37: ; preds = %33
store i32 1, i32* %2
br label %39
38: ; preds = %33
store i32 0, i32* %2
br label %39
39: ; preds = %38, %37, %32, %27, %22, %17, %12, %7
%40 = load i32, i32* %2
ret i32 %40
}

LLVM IR (-O2):
define i32 @isoperator(i8 signext %0) {
switch i8 %0, label %2 [
i8 43, label %3
i8 45, label %3
i8 42, label %3
i8 61, label %3
i8 33, label %3
i8 60, label %3
i8 62, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}