xunge/DecIR huggingface dataset:
char *RCSid() {
  return RCSid("$Id: tables.c,v 1.110 2011/11/10 05:15:58 sfeam Exp $");
}


x86 assembly (clang, -O0):
<RCSid>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <RCSid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RCSid>:
jmp    1100 <RCSid>

LLVM IR (-O0):
@.str = [54 x i8] c"$Id: tables.c,v 1.110 2011/11/10 05:15:58 sfeam Exp $\00"
define i8* @RCSid() {
%1 = call i8* (i8*, ...) bitcast (i8* ()* @RCSid to i8* (i8*, ...)*)(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
define noalias i8* @RCSid() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ errno;
int64_t chirp_fs_local_setrep(const char *path, int nreps) {
  errno = EINVAL;
  return -1;
}


x86 assembly (clang, -O0):
<chirp_fs_local_setrep>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ec6(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec5(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<chirp_fs_local_setrep>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
@errno = global i32 0
define i32 @chirp_fs_local_setrep(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @EINVAL
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EINVAL = global i32 0
@errno = global i32 0
define i32 @chirp_fs_local_setrep(i8* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @EINVAL
store i32 %3, i32* @errno
ret i32 -1
}
void ASN1_UTCTIME_set_string(void) {}


x86 assembly (clang, -O0):
<ASN1_UTCTIME_set_string>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_UTCTIME_set_string>:
ret

LLVM IR (-O0):
define void @ASN1_UTCTIME_set_string() {
ret void
}

LLVM IR (-O2):
define void @ASN1_UTCTIME_set_string() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
void MMX_PACKUSWB(int dst_reg, int src_reg) {
  addbyte(0x66);
  addbyte(0x0f);
  addbyte(0x67);
  addbyte(0xc0 | (dst_reg << 3) | src_reg);
  addbyte(0x66);
  addbyte(0x0f);
  addbyte(0x70);
  addbyte(0xc0 | (dst_reg << 3) | dst_reg);
  addbyte(0x08);
}


x86 assembly (clang, -O0):
<MMX_PACKUSWB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0x67,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0xc0,%edi
or     -0x8(%rbp),%edi
call   1030 <addbyte@plt>
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0x70,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
shl    $0x3,%edi
or     $0xc0,%edi
or     -0x4(%rbp),%edi
call   1030 <addbyte@plt>
mov    $0x8,%edi
call   1030 <addbyte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MMX_PACKUSWB>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %edi,%r14d
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0x67,%edi
call   1030 <addbyte@plt>
mov    %r14d,%ebx
or     $0x18,%ebx
shl    $0x3,%ebx
or     %ebx,%ebp
mov    %ebp,%edi
call   1030 <addbyte@plt>
mov    $0x66,%edi
call   1030 <addbyte@plt>
mov    $0xf,%edi
call   1030 <addbyte@plt>
mov    $0x70,%edi
call   1030 <addbyte@plt>
or     %r14d,%ebx
mov    %ebx,%edi
call   1030 <addbyte@plt>
mov    $0x8,%edi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <addbyte@plt>

LLVM IR (-O0):
define void @MMX_PACKUSWB(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @addbyte(i32 102)
%6 = call i32 @addbyte(i32 15)
%7 = call i32 @addbyte(i32 103)
%8 = load i32, i32* %3
%9 = shl i32 %8, 3
%10 = or i32 192, %9
%11 = load i32, i32* %4
%12 = or i32 %10, %11
%13 = call i32 @addbyte(i32 %12)
%14 = call i32 @addbyte(i32 102)
%15 = call i32 @addbyte(i32 15)
%16 = call i32 @addbyte(i32 112)
%17 = load i32, i32* %3
%18 = shl i32 %17, 3
%19 = or i32 192, %18
%20 = load i32, i32* %3
%21 = or i32 %19, %20
%22 = call i32 @addbyte(i32 %21)
%23 = call i32 @addbyte(i32 8)
ret void
}

LLVM IR (-O2):
define void @MMX_PACKUSWB(i32 %0, i32 %1) {
%3 = tail call i32 @addbyte(i32 102)
%4 = tail call i32 @addbyte(i32 15)
%5 = tail call i32 @addbyte(i32 103)
%6 = shl i32 %0, 3
%7 = or i32 %6, 192
%8 = or i32 %7, %1
%9 = tail call i32 @addbyte(i32 %8)
%10 = tail call i32 @addbyte(i32 102)
%11 = tail call i32 @addbyte(i32 15)
%12 = tail call i32 @addbyte(i32 112)
%13 = or i32 %7, %0
%14 = tail call i32 @addbyte(i32 %13)
%15 = tail call i32 @addbyte(i32 8)
ret void
}
int test_imm_0Euint64_midword_mem(unsigned long long *val) {
  return ((*val >> 16) & (0x0E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_0Euint64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x10,%rdx
and    $0xe,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_0Euint64_midword_mem>:
testb  $0xe,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_0Euint64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 16
%6 = and i64 %5, 14
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_0Euint64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 917504
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct net_device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ kfree(struct net_device *);
void free_netdev(struct net_device *dev) { kfree(dev); }


x86 assembly (clang, -O0):
<free_netdev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <kfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_netdev>:
jmp    1030 <kfree@plt>

LLVM IR (-O0):
%struct.net_device = type { i32 }
define void @free_netdev(%struct.net_device* %0) {
%2 = alloca %struct.net_device*
store %struct.net_device* %0, %struct.net_device** %2
%3 = load %struct.net_device*, %struct.net_device** %2
%4 = call i32 @kfree(%struct.net_device* %3)
ret void
}

LLVM IR (-O2):
%struct.net_device = type { i32 }
define void @free_netdev(%struct.net_device* %0) {
%2 = tail call i32 @kfree(%struct.net_device* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __startrek_entry_pt_TapeMover();
void cil_keeperTapeMover(void) {
  {
    __startrek_entry_pt_TapeMover();
    return;
  }
}


x86 assembly (clang, -O0):
<cil_keeperTapeMover>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__startrek_entry_pt_TapeMover@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cil_keeperTapeMover>:
xor    %eax,%eax
jmp    1030 <__startrek_entry_pt_TapeMover@plt>

LLVM IR (-O0):
define void @cil_keeperTapeMover() {
%1 = call i32 (...) @__startrek_entry_pt_TapeMover()
ret void
}

LLVM IR (-O2):
define void @cil_keeperTapeMover() {
%1 = tail call i32 (...) @__startrek_entry_pt_TapeMover()
ret void
}
void d2i_ASN1_IA5STRING(void) {}


x86 assembly (clang, -O0):
<d2i_ASN1_IA5STRING>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_ASN1_IA5STRING>:
ret

LLVM IR (-O0):
define void @d2i_ASN1_IA5STRING() {
ret void
}

LLVM IR (-O2):
define void @d2i_ASN1_IA5STRING() {
ret void
}
int ExClientSetMaxWaitCount(void *ctx, int n) { return 0; }


x86 assembly (clang, -O0):
<ExClientSetMaxWaitCount>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExClientSetMaxWaitCount>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ExClientSetMaxWaitCount(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @ExClientSetMaxWaitCount(i8* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Variables and functions */
int ploop_uuid_generate(char *, int);
int gen_uuid_pair(char *uuid1, int len1, char *uuid2, int len2) {
  int ret;
  ret = ploop_uuid_generate(uuid1, len1);
  if (ret)
    return ret;
  ret = ploop_uuid_generate(uuid2, len2);
  if (ret)
    return ret;
  return 0;
}


x86 assembly (clang, -O0):
<gen_uuid_pair>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <ploop_uuid_generate@plt>
mov    %eax,-0x28(%rbp)
cmpl   $0x0,-0x28(%rbp)
je     114a <gen_uuid_pair+0x3a>
mov    -0x28(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1175 <gen_uuid_pair+0x65>
mov    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
call   1030 <ploop_uuid_generate@plt>
mov    %eax,-0x28(%rbp)
cmpl   $0x0,-0x28(%rbp)
je     116e <gen_uuid_pair+0x5e>
mov    -0x28(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1175 <gen_uuid_pair+0x65>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_uuid_pair>:
push   %rbp
push   %rbx
push   %rax
mov    %ecx,%ebp
mov    %rdx,%rbx
call   1030 <ploop_uuid_generate@plt>
test   %eax,%eax
je     1128 <gen_uuid_pair+0x18>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <ploop_uuid_generate@plt>

LLVM IR (-O0):
define i32 @gen_uuid_pair(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
%11 = load i8*, i8** %6
%12 = load i32, i32* %7
%13 = call i32 @ploop_uuid_generate(i8* %11, i32 %12)
store i32 %13, i32* %10
%14 = load i32, i32* %10
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %4
%17 = load i32, i32* %10
store i32 %17, i32* %5
br label %27
18: ; preds = %4
%19 = load i8*, i8** %8
%20 = load i32, i32* %9
%21 = call i32 @ploop_uuid_generate(i8* %19, i32 %20)
store i32 %21, i32* %10
%22 = load i32, i32* %10
%23 = icmp ne i32 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %18
%25 = load i32, i32* %10
store i32 %25, i32* %5
br label %27
26: ; preds = %18
store i32 0, i32* %5
br label %27
27: ; preds = %26, %24, %16
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @gen_uuid_pair(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = tail call i32 @ploop_uuid_generate(i8* %0, i32 %1)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i32 @ploop_uuid_generate(i8* %2, i32 %3)
br label %9
9: ; preds = %7, %4
%10 = phi i32 [ %5, %4 ], [ %8, %7 ]
ret i32 %10
}
void disable_msi_mode(struct pci_dev *dev, int pos, int type) {}


x86 assembly (clang, -O0):
<disable_msi_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_msi_mode>:
ret

LLVM IR (-O0):
%struct.pci_dev = type opaque
define void @disable_msi_mode(%struct.pci_dev* %0, i32 %1, i32 %2) {
%4 = alloca %struct.pci_dev*
%5 = alloca i32
%6 = alloca i32
store %struct.pci_dev* %0, %struct.pci_dev** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.pci_dev = type opaque
define void @disable_msi_mode(%struct.pci_dev* nocapture %0, i32 %1, i32 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
void dispmode(int mode, char *result) {
  if (mode == 0)
    strcpy(result, "kbits");
  else
    strcpy(result, "kbytes");
}


x86 assembly (clang, -O0):
<dispmode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    113e <dispmode+0x2e>
mov    -0x10(%rbp),%rdi
lea    0xecc(%rip),%rsi
call   1030 <strcpy@plt>
jmp    114e <dispmode+0x3e>
mov    -0x10(%rbp),%rdi
lea    0xebd(%rip),%rsi
call   1030 <strcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dispmode>:
mov    %rsi,%rax
test   %edi,%edi
lea    0xee4(%rip),%rcx
lea    0xee3(%rip),%rsi
cmove  %rcx,%rsi
mov    %rax,%rdi
jmp    1030 <strcpy@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"kbits\00"
@.str.1 = [7 x i8] c"kbytes\00"
define void @dispmode(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = call i32 @strcpy(i8* %8, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
br label %13
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = call i32 @strcpy(i8* %11, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
br label %13
13: ; preds = %10, %7
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"kbits\00"
@.str.1 = [7 x i8] c"kbytes\00"
define void @dispmode(i32 %0, i8* %1) {
%3 = icmp eq i32 %0, 0
%4 = select i1 %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0)
%5 = tail call i32 @strcpy(i8* %1, i8* %4)
ret void
}
/* Variables and functions */
scalar_t__ simplePow(double, int);
double sqrt(scalar_t__);
double arctan(double x) { return x / sqrt(1 - simplePow(x, 2)); }


x86 assembly (clang, -O0):
<arctan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <simplePow@plt>
mov    $0x1,%edi
sub    %rax,%rdi
call   1040 <sqrt@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arctan>:
push   %rax
movsd  %xmm0,(%rsp)
mov    $0x2,%edi
call   1030 <simplePow@plt>
mov    $0x1,%edi
sub    %rax,%rdi
call   1040 <sqrt@plt>
movsd  (%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @arctan(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = call i64 @simplePow(double %4, i32 2)
%6 = sub nsw i64 1, %5
%7 = call double @sqrt(i64 %6)
%8 = fdiv double %3, %7
ret double %8
}

LLVM IR (-O2):
define double @arctan(double %0) {
%2 = tail call i64 @simplePow(double %0, i32 2)
%3 = sub nsw i64 1, %2
%4 = tail call double @sqrt(i64 %3)
%5 = fdiv double %0, %4
ret double %5
}
void mutate_short(short *x) { *x *= 2; }


x86 assembly (clang, -O0):
<mutate_short>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%ecx
shl    $0x1,%ecx
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mutate_short>:
shlw   (%rdi)
ret

LLVM IR (-O0):
define void @mutate_short(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = mul nsw i32 %5, 2
%7 = trunc i32 %6 to i16
store i16 %7, i16* %3
ret void
}

LLVM IR (-O2):
define void @mutate_short(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = shl i16 %2, 1
store i16 %3, i16* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ addbyte(int);
int LOAD_HOST_REG(int host_reg) {
  if (host_reg & 8)
    addbyte(0x44);
  addbyte(0x89);
  addbyte(0xc0 | 1 | ((host_reg & 7) << 3));
  return 1 | (host_reg & 0x10);
}


x86 assembly (clang, -O0):
<LOAD_HOST_REG>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     1134 <LOAD_HOST_REG+0x24>
mov    $0x44,%edi
call   1030 <addbyte@plt>
mov    $0x89,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%edi
and    $0x7,%edi
shl    $0x3,%edi
or     $0xc1,%edi
call   1030 <addbyte@plt>
mov    -0x4(%rbp),%eax
and    $0x10,%eax
or     $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LOAD_HOST_REG>:
push   %rbx
mov    %edi,%ebx
test   $0x8,%bl
je     1122 <LOAD_HOST_REG+0x12>
mov    $0x44,%edi
call   1030 <addbyte@plt>
mov    $0x89,%edi
call   1030 <addbyte@plt>
lea    0x0(,%rbx,8),%eax
or     $0xc1,%eax
movzbl %al,%edi
call   1030 <addbyte@plt>
and    $0x10,%ebx
or     $0x1,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @LOAD_HOST_REG(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 8
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @addbyte(i32 68)
br label %8
8: ; preds = %6, %1
%9 = call i32 @addbyte(i32 137)
%10 = load i32, i32* %2
%11 = and i32 %10, 7
%12 = shl i32 %11, 3
%13 = or i32 193, %12
%14 = call i32 @addbyte(i32 %13)
%15 = load i32, i32* %2
%16 = and i32 %15, 16
%17 = or i32 1, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @LOAD_HOST_REG(i32 %0) {
%2 = and i32 %0, 8
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @addbyte(i32 68)
br label %6
6: ; preds = %4, %1
%7 = tail call i32 @addbyte(i32 137)
%8 = shl i32 %0, 3
%9 = and i32 %8, 56
%10 = or i32 %9, 193
%11 = tail call i32 @addbyte(i32 %10)
%12 = and i32 %0, 16
%13 = or i32 %12, 1
ret i32 %13
}
/* Variables and functions */
int __cxa_atexit(void (*)(void *), void *, void *);
int __aeabi_atexit(void *obj, void (*func)(void *), void *d) {
  return __cxa_atexit(func, obj, d);
}


x86 assembly (clang, -O0):
<__aeabi_atexit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <__cxa_atexit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aeabi_atexit>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <__cxa_atexit@plt>

LLVM IR (-O0):
define i32 @__aeabi_atexit(i8* %0, void (i8*)* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca void (i8*)*
%6 = alloca i8*
store i8* %0, i8** %4
store void (i8*)* %1, void (i8*)** %5
store i8* %2, i8** %6
%7 = load void (i8*)*, void (i8*)** %5
%8 = load i8*, i8** %4
%9 = load i8*, i8** %6
%10 = call i32 @__cxa_atexit(void (i8*)* %7, i8* %8, i8* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @__aeabi_atexit(i8* %0, void (i8*)* %1, i8* %2) {
%4 = tail call i32 @__cxa_atexit(void (i8*)* %1, i8* %0, i8* %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ write_imm(int);
int /*<<< orphan*/ write_instr(int);
int ins_handler(char **save) {
  write_instr(0x00);
  write_imm(0x49);
  write_instr(0x28);
  return 0;
}


x86 assembly (clang, -O0):
<ins_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0x49,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ins_handler>:
push   %rax
xor    %edi,%edi
call   1040 <write_instr@plt>
mov    $0x49,%edi
call   1030 <write_imm@plt>
mov    $0x28,%edi
call   1040 <write_instr@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ins_handler(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @write_instr(i32 0)
%4 = call i32 @write_imm(i32 73)
%5 = call i32 @write_instr(i32 40)
ret i32 0
}

LLVM IR (-O2):
define i32 @ins_handler(i8** nocapture readnone %0) {
%2 = tail call i32 @write_instr(i32 0)
%3 = tail call i32 @write_imm(i32 73)
%4 = tail call i32 @write_instr(i32 40)
ret i32 0
}
/* Type definitions */
struct rlimit {
  int rlim_cur;
};

/* Variables and functions */
int /*<<< orphan*/ RLIMIT_CPU;
int /*<<< orphan*/ setrlimit(int /*<<< orphan*/, struct rlimit *);
void set_time_limit(int seconds) {
  struct rlimit rlp_st, *rlp = &rlp_st;
  rlp->rlim_cur = seconds;
  setrlimit(RLIMIT_CPU, rlp);
}


x86 assembly (clang, -O0):
<set_time_limit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
call   1030 <setrlimit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_time_limit>:
push   %rax
mov    %edi,(%rsp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <setrlimit@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.rlimit = type { i32 }
@RLIMIT_CPU = global i32 0
define void @set_time_limit(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.rlimit
%4 = alloca %struct.rlimit*
store i32 %0, i32* %2
store %struct.rlimit* %3, %struct.rlimit** %4
%5 = load i32, i32* %2
%6 = load %struct.rlimit*, %struct.rlimit** %4
%7 = getelementptr inbounds %struct.rlimit, %struct.rlimit* %6, i32 0, i32 0
store i32 %5, i32* %7
%8 = load i32, i32* @RLIMIT_CPU
%9 = load %struct.rlimit*, %struct.rlimit** %4
%10 = call i32 @setrlimit(i32 %8, %struct.rlimit* %9)
ret void
}

LLVM IR (-O2):
%struct.rlimit = type { i32 }
@RLIMIT_CPU = global i32 0
define void @set_time_limit(i32 %0) {
%2 = alloca %struct.rlimit
%3 = bitcast %struct.rlimit* %2 to i8*
%4 = getelementptr inbounds %struct.rlimit, %struct.rlimit* %2, i64 0, i32 0
store i32 %0, i32* %4
%5 = load i32, i32* @RLIMIT_CPU
%6 = call i32 @setrlimit(i32 %5, %struct.rlimit* %2)
ret void
}
int gd_error(char *s) { return 0; }


x86 assembly (clang, -O0):
<gd_error>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gd_error>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @gd_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @gd_error(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ updateProtocolSelector();
void changeSettings(unsigned char *data, unsigned char nbytes) {
  updateProtocolSelector();
}


x86 assembly (clang, -O0):
<changeSettings>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    $0x0,%al
call   1030 <updateProtocolSelector@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<changeSettings>:
xor    %eax,%eax
jmp    1030 <updateProtocolSelector@plt>

LLVM IR (-O0):
define void @changeSettings(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = call i32 (...) @updateProtocolSelector()
ret void
}

LLVM IR (-O2):
define void @changeSettings(i8* nocapture readnone %0, i8 zeroext %1) {
%3 = tail call i32 (...) @updateProtocolSelector()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ esp_rom_crc16_be(int /*<<< orphan*/,
                                    int /*<<< orphan*/ const *,
                                    int /*<<< orphan*/);
uint16_t esp_crc16_be(uint16_t crc, uint8_t const *buf, uint32_t len) {
  return esp_rom_crc16_be(crc, buf, len);
}


x86 assembly (clang, -O0):
<esp_crc16_be>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <esp_rom_crc16_be@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<esp_crc16_be>:
jmp    1030 <esp_rom_crc16_be@plt>

LLVM IR (-O0):
define i32 @esp_crc16_be(i32 %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32*, i32** %5
%9 = load i32, i32* %6
%10 = call i32 @esp_rom_crc16_be(i32 %7, i32* %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @esp_crc16_be(i32 %0, i32* %1, i32 %2) {
%4 = tail call i32 @esp_rom_crc16_be(i32 %0, i32* %1, i32 %2)
ret i32 %4
}
nMalvado(int num) {
  int cont = 0, result, temp;
  while (num != 0) {
    temp = num % 2;
    num /= 2;
    if (temp == 1) {
      cont++;
    }
  }
  if (cont < 2) {
    result = 0;
  } else {
    result = 1;
  }
  return result;
}


x86 assembly (clang, -O0):
<nMalvado>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     114c <nMalvado+0x4c>
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %edx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
cmpl   $0x1,-0x10(%rbp)
jne    1147 <nMalvado+0x47>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <nMalvado+0xe>
cmpl   $0x2,-0x8(%rbp)
jge    1162 <nMalvado+0x62>
movl   $0x0,-0xc(%rbp)
jmp    1169 <nMalvado+0x69>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nMalvado>:
test   %edi,%edi
je     113f <nMalvado+0x3f>
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
mov    %edi,%eax
shr    $0x1f,%eax
add    %edi,%eax
mov    %eax,%edx
sar    %edx
and    $0xfffffffe,%eax
mov    %edi,%esi
sub    %eax,%esi
xor    %eax,%eax
cmp    $0x1,%esi
sete   %al
add    %eax,%ecx
add    $0x1,%edi
cmp    $0x2,%edi
mov    %edx,%edi
ja     1110 <nMalvado+0x10>
xor    %eax,%eax
cmp    $0x2,%ecx
setae  %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nMalvado(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %6
6: ; preds = %19, %1
%7 = load i32, i32* %2
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %20
9: ; preds = %6
%10 = load i32, i32* %2
%11 = srem i32 %10, 2
store i32 %11, i32* %5
%12 = load i32, i32* %2
%13 = sdiv i32 %12, 2
store i32 %13, i32* %2
%14 = load i32, i32* %5
%15 = icmp eq i32 %14, 1
br i1 %15, label %16, label %19
16: ; preds = %9
%17 = load i32, i32* %3
%18 = add nsw i32 %17, 1
store i32 %18, i32* %3
br label %19
19: ; preds = %16, %9
br label %6
20: ; preds = %6
%21 = load i32, i32* %3
%22 = icmp slt i32 %21, 2
br i1 %22, label %23, label %24
23: ; preds = %20
store i32 0, i32* %4
br label %25
24: ; preds = %20
store i32 1, i32* %4
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @nMalvado(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %16, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ %0, %1 ]
%5 = phi i32 [ %10, %3 ], [ 0, %1 ]
%6 = srem i32 %4, 2
%7 = sdiv i32 %4, 2
%8 = icmp eq i32 %6, 1
%9 = zext i1 %8 to i32
%10 = add nuw nsw i32 %5, %9
%11 = add i32 %4, 1
%12 = icmp ult i32 %11, 3
br i1 %12, label %13, label %3
13: ; preds = %3
%14 = icmp ugt i32 %10, 1
%15 = zext i1 %14 to i32
br label %16
16: ; preds = %13, %1
%17 = phi i32 [ 0, %1 ], [ %15, %13 ]
ret i32 %17
}
/* Type definitions */
typedef scalar_t__ time_t;

/* Variables and functions */
scalar_t__ time(int /*<<< orphan*/ *);
time_t get_delay_epoch(int delay) { return time(NULL) - (delay * 60); }


x86 assembly (clang, -O0):
<get_delay_epoch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1030 <time@plt>
imul   $0x3c,-0x4(%rbp),%ecx
movslq %ecx,%rcx
sub    %rcx,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_delay_epoch>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
call   1030 <time@plt>
imul   $0x3c,%ebx,%ecx
movslq %ecx,%rcx
sub    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @get_delay_epoch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i64 @time(i32* null)
%4 = load i32, i32* %2
%5 = mul nsw i32 %4, 60
%6 = sext i32 %5 to i64
%7 = sub nsw i64 %3, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @get_delay_epoch(i32 %0) {
%2 = tail call i64 @time(i32* null)
%3 = mul nsw i32 %0, 60
%4 = sext i32 %3 to i64
%5 = sub nsw i64 %2, %4
ret i64 %5
}
float convertir(int gcent) {
  float gfahr;
  gfahr = (float)9 / (float)5 * gcent + 32;
  return (gfahr);
}


x86 assembly (clang, -O0):
<convertir>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
movss  0xeec(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xee4(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<convertir>:
cvtsi2ss %edi,%xmm0
mulss  0xef4(%rip),%xmm0
addss  0xef0(%rip),%xmm0
ret

LLVM IR (-O0):
define float @convertir(i32 %0) {
%2 = alloca i32
%3 = alloca float
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sitofp i32 %4 to float
%6 = call float @llvm.fmuladd.f32(float 0x3FFCCCCCC0000000, float %5, float 3.200000e+01)
store float %6, float* %3
%7 = load float, float* %3
ret float %7
}

LLVM IR (-O2):
define float @convertir(i32 %0) {
%2 = sitofp i32 %0 to float
%3 = tail call float @llvm.fmuladd.f32(float %2, float 0x3FFCCCCCC0000000, float 3.200000e+01)
ret float %3
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t minipack_unpack_fixarray(void *ptr, size_t *sz) {
  *sz = 1;
  return *((uint8_t *)ptr) & 0x0F;
}


x86 assembly (clang, -O0):
<minipack_unpack_fixarray>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movq   $0x1,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xf,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minipack_unpack_fixarray>:
movq   $0x1,(%rsi)
mov    (%rdi),%eax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @minipack_unpack_fixarray(i8* %0, i64* %1) {
%3 = alloca i8*
%4 = alloca i64*
store i8* %0, i8** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %4
store i64 1, i64* %5
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
%8 = load i32, i32* %7
%9 = and i32 %8, 15
ret i32 %9
}

LLVM IR (-O2):
define i32 @minipack_unpack_fixarray(i8* nocapture %0, i64* nocapture writeonly %1) {
store i64 1, i64* %1
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = and i32 %4, 15
ret i32 %5
}
int ph_http_deinit(void *handler) { return 0; }


x86 assembly (clang, -O0):
<ph_http_deinit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ph_http_deinit>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ph_http_deinit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @ph_http_deinit(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int output();
int main() { return output() == 42 ? 0 : 1; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <output@plt>
mov    %eax,%edx
mov    $0x1,%eax
xor    %ecx,%ecx
cmp    $0x2a,%edx
cmove  %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <output@plt>
xor    %ecx,%ecx
cmp    $0x2a,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @output()
%3 = icmp eq i32 %2, 42
%4 = zext i1 %3 to i64
%5 = select i1 %3, i32 0, i32 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @output()
%2 = icmp ne i32 %1, 42
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
struct stats {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct stats *);
void stats_destroy(struct stats *stats) { free(stats); }


x86 assembly (clang, -O0):
<stats_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stats_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.stats = type { i32 }
define void @stats_destroy(%struct.stats* %0) {
%2 = alloca %struct.stats*
store %struct.stats* %0, %struct.stats** %2
%3 = load %struct.stats*, %struct.stats** %2
%4 = call i32 @free(%struct.stats* %3)
ret void
}

LLVM IR (-O2):
%struct.stats = type { i32 }
define void @stats_destroy(%struct.stats* nocapture %0) {
%2 = tail call i32 @free(%struct.stats* %0)
ret void
}
double TwoNorm2(x, n)
double *x;
int *n;
{
  double temp;
  if (*n <= 0)
    return 0.0;
  NormTwoSquareRealDenseVector(x, n, &temp);
  return temp;
}


x86 assembly (clang, -O0):
<TwoNorm2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmpl   $0x0,(%rax)
jg     113a <TwoNorm2+0x2a>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1157 <TwoNorm2+0x47>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
lea    -0x20(%rbp),%rdx
mov    $0x0,%al
call   1030 <NormTwoSquareRealDenseVector@plt>
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TwoNorm2>:
push   %rax
cmpl   $0x0,(%rsi)
jle    1127 <TwoNorm2+0x17>
mov    %rsp,%rdx
xor    %eax,%eax
call   1030 <NormTwoSquareRealDenseVector@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret
xorps  %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @TwoNorm2(double* %0, i32* %1) {
%3 = alloca double
%4 = alloca double*
%5 = alloca i32*
%6 = alloca double
store double* %0, double** %4
store i32* %1, i32** %5
%7 = load i32*, i32** %5
%8 = load i32, i32* %7
%9 = icmp sle i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store double 0.000000e+00, double* %3
br label %16
11: ; preds = %2
%12 = load double*, double** %4
%13 = load i32*, i32** %5
%14 = call i32 (double*, i32*, double*, ...) bitcast (i32 (...)* @NormTwoSquareRealDenseVector to i32 (double*, i32*, double*, ...)*)(double* %12, i32* %13, double* %6)
%15 = load double, double* %6
store double %15, double* %3
br label %16
16: ; preds = %11, %10
%17 = load double, double* %3
ret double %17
}

LLVM IR (-O2):
define double @TwoNorm2(double* %0, i32* %1) {
%3 = alloca double
%4 = bitcast double* %3 to i8*
%5 = load i32, i32* %1
%6 = icmp slt i32 %5, 1
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = call i32 (double*, i32*, double*, ...) bitcast (i32 (...)* @NormTwoSquareRealDenseVector to i32 (double*, i32*, double*, ...)*)(double* %0, i32* %1, double* %3)
%9 = load double, double* %3
br label %10
10: ; preds = %2, %7
%11 = phi double [ %9, %7 ], [ 0.000000e+00, %2 ]
ret double %11
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ panic(char *);
void *xmalloc(size_t size) {
  void *ptr;
  if (size == 0)
    panic("malloc: size 0\n");
  ptr = malloc(size);
  if (!ptr)
    panic("malloc: out of memory\n");
  return ptr;
}


x86 assembly (clang, -O0):
<xmalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1143 <xmalloc+0x23>
lea    0xec2(%rip),%rdi
call   1030 <panic@plt>
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1167 <xmalloc+0x47>
lea    0xeae(%rip),%rdi
call   1030 <panic@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmalloc>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
jne    1135 <xmalloc+0x15>
lea    0xed0(%rip),%rdi
call   1030 <panic@plt>
mov    %rbx,%rdi
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1151 <xmalloc+0x31>
lea    0xec4(%rip),%rdi
call   1030 <panic@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"malloc: size 0\0A\00"
@.str.1 = [23 x i8] c"malloc: out of memory\0A\00"
define i8* @xmalloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @panic(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %1
%9 = load i64, i64* %2
%10 = call i8* @malloc(i64 %9)
store i8* %10, i8** %3
%11 = load i8*, i8** %3
%12 = icmp ne i8* %11, null
br i1 %12, label %15, label %13
13: ; preds = %8
%14 = call i32 @panic(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
br label %15
15: ; preds = %13, %8
%16 = load i8*, i8** %3
ret i8* %16
}

LLVM IR (-O2):
@.str = [16 x i8] c"malloc: size 0\0A\00"
@.str.1 = [23 x i8] c"malloc: out of memory\0A\00"
define noalias i8* @xmalloc(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @panic(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %3, %1
%6 = tail call i8* @malloc(i64 %0)
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = tail call i32 @panic(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %5
ret i8* %6
}
/* Type definitions */
struct argp_state {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ argp_state_help(struct argp_state const *,
                                   int /*<<< orphan*/, int);
int /*<<< orphan*/ stderr;
void argp_usage(const struct argp_state *__state) {
  argp_state_help(__state, stderr, (0x02 | 0x04 | 0x100));
}


x86 assembly (clang, -O0):
<argp_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb9(%rip),%rax
mov    (%rax),%esi
mov    $0x106,%edx
call   1030 <argp_state_help@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<argp_usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%esi
mov    $0x106,%edx
jmp    1030 <argp_state_help@plt>

LLVM IR (-O0):
%struct.argp_state = type { i32 }
@stderr = global i32 0
define void @argp_usage(%struct.argp_state* %0) {
%2 = alloca %struct.argp_state*
store %struct.argp_state* %0, %struct.argp_state** %2
%3 = load %struct.argp_state*, %struct.argp_state** %2
%4 = load i32, i32* @stderr
%5 = call i32 @argp_state_help(%struct.argp_state* %3, i32 %4, i32 262)
ret void
}

LLVM IR (-O2):
%struct.argp_state = type { i32 }
@stderr = global i32 0
define void @argp_usage(%struct.argp_state* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @argp_state_help(%struct.argp_state* %0, i32 %2, i32 262)
ret void
}
int fun267() { return 267; }


x86 assembly (clang, -O0):
<fun267>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10b,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun267>:
mov    $0x10b,%eax
ret

LLVM IR (-O0):
define i32 @fun267() {
ret i32 267
}

LLVM IR (-O2):
define i32 @fun267() {
ret i32 267
}
/* Variables and functions */
bool nrf51_errata_28(void) { return false; }


x86 assembly (clang, -O0):
<nrf51_errata_28>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf51_errata_28>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nrf51_errata_28() {
ret i32 0
}

LLVM IR (-O2):
define i32 @nrf51_errata_28() {
ret i32 0
}
void g_object_run_dispose() {}


x86 assembly (clang, -O0):
<g_object_run_dispose>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_object_run_dispose>:
ret

LLVM IR (-O0):
define void @g_object_run_dispose() {
ret void
}

LLVM IR (-O2):
define void @g_object_run_dispose() {
ret void
}
double ep2epj(epoch)
double epoch;
{
  double dj;
  dj = ep2jd(epoch);
  return (jd2epj(dj));
}


x86 assembly (clang, -O0):
<ep2epj>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    $0x1,%al
call   1040 <ep2jd@plt>
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mov    $0x1,%al
call   1030 <jd2epj@plt>
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ep2epj>:
push   %rax
mov    $0x1,%al
call   1040 <ep2jd@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
mov    $0x1,%al
call   1030 <jd2epj@plt>
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @ep2epj(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = call i32 (double, ...) bitcast (i32 (...)* @ep2jd to i32 (double, ...)*)(double %4)
%6 = sitofp i32 %5 to double
store double %6, double* %3
%7 = load double, double* %3
%8 = call i32 (double, ...) bitcast (i32 (...)* @jd2epj to i32 (double, ...)*)(double %7)
%9 = sitofp i32 %8 to double
ret double %9
}

LLVM IR (-O2):
define double @ep2epj(double %0) {
%2 = tail call i32 (double, ...) bitcast (i32 (...)* @ep2jd to i32 (double, ...)*)(double %0)
%3 = sitofp i32 %2 to double
%4 = tail call i32 (double, ...) bitcast (i32 (...)* @jd2epj to i32 (double, ...)*)(double %3)
%5 = sitofp i32 %4 to double
ret double %5
}
void TimerForcedOC1Configure(unsigned long ulBase,
                             unsigned long ulForcedAction) {
  unsigned long ulTempccmr1 = 0;

  ;

  ;
  ulTempccmr1 = (*((volatile unsigned long *)(ulBase + 0x00000018)));
  ulTempccmr1 &= ~0x00000070;
  ulTempccmr1 |= ulForcedAction;
  (*((volatile unsigned long *)(ulBase + 0x00000018))) = ulTempccmr1;
}


x86 assembly (clang, -O0):
<TimerForcedOC1Configure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
and    $0xffffffffffffff8f,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
or     -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x18(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerForcedOC1Configure>:
mov    0x18(%rdi),%rax
and    $0xffffffffffffff8f,%rax
or     %rsi,%rax
mov    %rax,0x18(%rdi)
ret

LLVM IR (-O0):
define void @TimerForcedOC1Configure(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
store i64 0, i64* %5
%6 = load i64, i64* %3
%7 = add i64 %6, 24
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = and i64 %10, -113
store i64 %11, i64* %5
%12 = load i64, i64* %4
%13 = load i64, i64* %5
%14 = or i64 %13, %12
store i64 %14, i64* %5
%15 = load i64, i64* %5
%16 = load i64, i64* %3
%17 = add i64 %16, 24
%18 = inttoptr i64 %17 to i64*
store volatile i64 %15, i64* %18
ret void
}

LLVM IR (-O2):
define void @TimerForcedOC1Configure(i64 %0, i64 %1) {
%3 = add i64 %0, 24
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = and i64 %5, -113
%7 = or i64 %6, %1
store volatile i64 %7, i64* %4
ret void
}
/* Variables and functions */
double fmod(double, int);
double range_degrees(double d) {
  d = fmod(d, 360.);
  if (d < 0.)
    d += 360.;
  return d;
}


x86 assembly (clang, -O0):
<range_degrees>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    $0x168,%edi
call   1030 <fmod@plt>
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1151 <range_degrees+0x41>
movsd  0xeb9(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<range_degrees>:
push   %rax
mov    $0x168,%edi
call   1030 <fmod@plt>
movsd  0xedd(%rip),%xmm2
addsd  %xmm0,%xmm2
xorpd  %xmm3,%xmm3
movapd %xmm0,%xmm1
cmpltsd %xmm3,%xmm1
andpd  %xmm1,%xmm2
andnpd %xmm0,%xmm1
orpd   %xmm2,%xmm1
movapd %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @range_degrees(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @fmod(double %3, i32 360)
store double %4, double* %2
%5 = load double, double* %2
%6 = fcmp olt double %5, 0.000000e+00
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load double, double* %2
%9 = fadd double %8, 3.600000e+02
store double %9, double* %2
br label %10
10: ; preds = %7, %1
%11 = load double, double* %2
ret double %11
}

LLVM IR (-O2):
define double @range_degrees(double %0) {
%2 = tail call double @fmod(double %0, i32 360)
%3 = fcmp olt double %2, 0.000000e+00
%4 = fadd double %2, 3.600000e+02
%5 = select i1 %3, double %4, double %2
ret double %5
}
void ASN1_unpack_string(void) {}


x86 assembly (clang, -O0):
<ASN1_unpack_string>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_unpack_string>:
ret

LLVM IR (-O0):
define void @ASN1_unpack_string() {
ret void
}

LLVM IR (-O2):
define void @ASN1_unpack_string() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_RDONLY;
int /*<<< orphan*/ open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int main(void) {
  open("t/test03.c", O_RDONLY);
  printf("Uh-oh: we should not have been able to open a file\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eb2(%rip),%rax
mov    (%rax),%esi
lea    0xec1(%rip),%rdi
call   1040 <open@plt>
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
lea    0xecf(%rip),%rdi
call   1040 <open@plt>
lea    0xece(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"t/test03.c\00"
@O_RDONLY = global i32 0
@.str.1 = [52 x i8] c"Uh-oh: we should not have been able to open a file\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @O_RDONLY
%3 = call i32 @open(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 @printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"t/test03.c\00"
@O_RDONLY = global i32 0
@str = [51 x i8] c"Uh-oh: we should not have been able to open a file\00"
define i32 @main() {
%1 = load i32, i32* @O_RDONLY
%2 = tail call i32 @open(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([51 x i8], [51 x i8]* @str, i64 0, i64 0))
ret i32 0
}
unsigned long Clock() { return (0); }


x86 assembly (clang, -O0):
<Clock>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Clock>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @Clock() {
ret i64 0
}

LLVM IR (-O2):
define i64 @Clock() {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ output_line(char *);
void gen_convert_primary_reg_value_to_bool(void) { output_line("bool r1"); }


x86 assembly (clang, -O0):
<gen_convert_primary_reg_value_to_bool>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <output_line@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_convert_primary_reg_value_to_bool>:
lea    0xee9(%rip),%rdi
jmp    1030 <output_line@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"bool r1\00"
define void @gen_convert_primary_reg_value_to_bool() {
%1 = call i32 @output_line(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"bool r1\00"
define void @gen_convert_primary_reg_value_to_bool() {
%1 = tail call i32 @output_line(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret void
}