xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint;

/* Variables and functions */
int CLAMP(int, int, int);
char *_itoa_internal(int, char *, int /*<<< orphan*/);
char *_uitoa_internal(unsigned int, char *, int /*<<< orphan*/);
char *itoa(int value, char *str, int base) {
  base = CLAMP(base, 2, 32);
  if (base != 10) {
    return _uitoa_internal((unsigned int)value, str, (uint)base);
  } else {
    return _itoa_internal(value, str, (uint)base);
  }
}


x86 assembly (clang, -O0):
<itoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x1c(%rbp),%edi
mov    $0x2,%esi
mov    $0x20,%edx
call   1030 <CLAMP@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0xa,-0x1c(%rbp)
je     1179 <itoa+0x49>
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1040 <_uitoa_internal@plt>
mov    %rax,-0x8(%rbp)
jmp    118c <itoa+0x5c>
mov    -0xc(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1050 <_itoa_internal@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<itoa>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %edx,%edi
mov    $0x2,%esi
mov    $0x20,%edx
call   1030 <CLAMP@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
cmp    $0xa,%eax
jne    1163 <itoa+0x33>
mov    $0xa,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1050 <_itoa_internal@plt>
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <_uitoa_internal@plt>

LLVM IR (-O0):
define i8* @itoa(i32 %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
%8 = load i32, i32* %7
%9 = call i32 @CLAMP(i32 %8, i32 2, i32 32)
store i32 %9, i32* %7
%10 = load i32, i32* %7
%11 = icmp ne i32 %10, 10
br i1 %11, label %12, label %17
12: ; preds = %3
%13 = load i32, i32* %5
%14 = load i8*, i8** %6
%15 = load i32, i32* %7
%16 = call i8* @_uitoa_internal(i32 %13, i8* %14, i32 %15)
store i8* %16, i8** %4
br label %22
17: ; preds = %3
%18 = load i32, i32* %5
%19 = load i8*, i8** %6
%20 = load i32, i32* %7
%21 = call i8* @_itoa_internal(i32 %18, i8* %19, i32 %20)
store i8* %21, i8** %4
br label %22
22: ; preds = %17, %12
%23 = load i8*, i8** %4
ret i8* %23
}

LLVM IR (-O2):
define i8* @itoa(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @CLAMP(i32 %2, i32 2, i32 32)
%5 = icmp eq i32 %4, 10
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i8* @_uitoa_internal(i32 %0, i8* %1, i32 %4)
br label %10
8: ; preds = %3
%9 = tail call i8* @_itoa_internal(i32 %0, i8* %1, i32 10)
br label %10
10: ; preds = %8, %6
%11 = phi i8* [ %7, %6 ], [ %9, %8 ]
ret i8* %11
}
__attribute__((no)) int fce1(int a, int b) {
  int swap;
  if (a < b) {
    swap = a;
    a = b;
    b = swap;
  }
  return a / b;
}


x86 assembly (clang, -O0):
<fce1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1128 <fce1+0x28>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fce1>:
mov    %edi,%eax
cmp    %esi,%edi
mov    %esi,%ecx
cmovl  %edi,%ecx
cmovl  %esi,%eax
cltd
idiv   %ecx
ret

LLVM IR (-O0):
define i32 @fce1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i32, i32* %3
store i32 %10, i32* %5
%11 = load i32, i32* %4
store i32 %11, i32* %3
%12 = load i32, i32* %5
store i32 %12, i32* %4
br label %13
13: ; preds = %9, %2
%14 = load i32, i32* %3
%15 = load i32, i32* %4
%16 = sdiv i32 %14, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @fce1(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
%5 = select i1 %3, i32 %1, i32 %0
%6 = sdiv i32 %5, %4
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int main() {
  int x = 1;
#pragma omp parallel
#pragma omp single
  {
#pragma omp task shared(x) depend(in : x)
    if (x != 1)
      abort();
#pragma omp task shared(x) depend(out : x)
    x = 2;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     1137 <main+0x27>
mov    $0x0,%al
call   1030 <abort@plt>
movl   $0x2,-0x8(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 1
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %0
store i32 2, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void X509_NAME_delete_entry(void) {}


x86 assembly (clang, -O0):
<X509_NAME_delete_entry>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_NAME_delete_entry>:
ret

LLVM IR (-O0):
define void @X509_NAME_delete_entry() {
ret void
}

LLVM IR (-O2):
define void @X509_NAME_delete_entry() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
struct sol_ptr_vector {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sol_ptr_vector_del(struct sol_ptr_vector *,
                                      int /*<<< orphan*/);
void *sol_ptr_vector_get(struct sol_ptr_vector *, int /*<<< orphan*/);
void *sol_ptr_vector_take(struct sol_ptr_vector *pv, uint16_t i) {
  void *result = sol_ptr_vector_get(pv, i);
  sol_ptr_vector_del(pv, i);
  return result;
}


x86 assembly (clang, -O0):
<sol_ptr_vector_take>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <sol_ptr_vector_get@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <sol_ptr_vector_del@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sol_ptr_vector_take>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%rbx
call   1040 <sol_ptr_vector_get@plt>
mov    %rax,%r14
mov    %rbx,%rdi
mov    %ebp,%esi
call   1030 <sol_ptr_vector_del@plt>
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.sol_ptr_vector = type { i32 }
define i8* @sol_ptr_vector_take(%struct.sol_ptr_vector* %0, i32 %1) {
%3 = alloca %struct.sol_ptr_vector*
%4 = alloca i32
%5 = alloca i8*
store %struct.sol_ptr_vector* %0, %struct.sol_ptr_vector** %3
store i32 %1, i32* %4
%6 = load %struct.sol_ptr_vector*, %struct.sol_ptr_vector** %3
%7 = load i32, i32* %4
%8 = call i8* @sol_ptr_vector_get(%struct.sol_ptr_vector* %6, i32 %7)
store i8* %8, i8** %5
%9 = load %struct.sol_ptr_vector*, %struct.sol_ptr_vector** %3
%10 = load i32, i32* %4
%11 = call i32 @sol_ptr_vector_del(%struct.sol_ptr_vector* %9, i32 %10)
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
%struct.sol_ptr_vector = type { i32 }
define i8* @sol_ptr_vector_take(%struct.sol_ptr_vector* %0, i32 %1) {
%3 = tail call i8* @sol_ptr_vector_get(%struct.sol_ptr_vector* %0, i32 %1)
%4 = tail call i32 @sol_ptr_vector_del(%struct.sol_ptr_vector* %0, i32 %1)
ret i8* %3
}
/* Type definitions */
struct jelio_buf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct jelio_buf *);
int jelio_sbuffer_close(struct jelio_buf *buf) {
  if (buf) {
    free(buf);
    return 0;
  }
  return -1;
}


x86 assembly (clang, -O0):
<jelio_sbuffer_close>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     113c <jelio_sbuffer_close+0x2c>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
movl   $0x0,-0x4(%rbp)
jmp    1143 <jelio_sbuffer_close+0x33>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jelio_sbuffer_close>:
test   %rdi,%rdi
je     1122 <jelio_sbuffer_close+0x12>
push   %rax
call   1030 <free@plt>
xor    %eax,%eax
add    $0x8,%rsp
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.jelio_buf = type { i32 }
define i32 @jelio_sbuffer_close(%struct.jelio_buf* %0) {
%2 = alloca i32
%3 = alloca %struct.jelio_buf*
store %struct.jelio_buf* %0, %struct.jelio_buf** %3
%4 = load %struct.jelio_buf*, %struct.jelio_buf** %3
%5 = icmp ne %struct.jelio_buf* %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load %struct.jelio_buf*, %struct.jelio_buf** %3
%8 = call i32 @free(%struct.jelio_buf* %7)
store i32 0, i32* %2
br label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %10
10: ; preds = %9, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
%struct.jelio_buf = type { i32 }
define i32 @jelio_sbuffer_close(%struct.jelio_buf* %0) {
%2 = icmp eq %struct.jelio_buf* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(%struct.jelio_buf* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ 0, %3 ], [ -1, %1 ]
ret i32 %6
}
void rop3_161_0_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  unsigned char stk4;
  stk4 = ~T;
  stk3 = S & stk4;
  stk2 = *D | stk3;
  stk1 = T ^ stk2;
  stk1 = ~stk1;
  *D = stk1;
}


x86 assembly (clang, -O0):
<rop3_161_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xe(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xe(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xd(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xd(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
mov    -0xb(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_161_0_0>:
mov    %edx,%eax
not    %al
and    %sil,%al
or     (%rdi),%al
xor    %dl,%al
not    %al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_161_0_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%11 = load i8, i8* %6
%12 = zext i8 %11 to i32
%13 = xor i32 %12, -1
%14 = trunc i32 %13 to i8
store i8 %14, i8* %10
%15 = load i8, i8* %5
%16 = zext i8 %15 to i32
%17 = load i8, i8* %10
%18 = zext i8 %17 to i32
%19 = and i32 %16, %18
%20 = trunc i32 %19 to i8
store i8 %20, i8* %9
%21 = load i8*, i8** %4
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = load i8, i8* %9
%25 = zext i8 %24 to i32
%26 = or i32 %23, %25
%27 = trunc i32 %26 to i8
store i8 %27, i8* %8
%28 = load i8, i8* %6
%29 = zext i8 %28 to i32
%30 = load i8, i8* %8
%31 = zext i8 %30 to i32
%32 = xor i32 %29, %31
%33 = trunc i32 %32 to i8
store i8 %33, i8* %7
%34 = load i8, i8* %7
%35 = zext i8 %34 to i32
%36 = xor i32 %35, -1
%37 = trunc i32 %36 to i8
store i8 %37, i8* %7
%38 = load i8, i8* %7
%39 = load i8*, i8** %4
store i8 %38, i8* %39
ret void
}

LLVM IR (-O2):
define void @rop3_161_0_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = xor i8 %2, -1
%5 = and i8 %4, %1
%6 = load i8, i8* %0
%7 = or i8 %6, %5
%8 = xor i8 %7, %2
%9 = xor i8 %8, -1
store i8 %9, i8* %0
ret void
}
/* Variables and functions */
int INT_MIN;
int pop() { return INT_MIN; }


x86 assembly (clang, -O0):
<pop>:
push   %rbp
mov    %rsp,%rbp
mov    0x2edd(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pop>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@INT_MIN = global i32 0
define i32 @pop() {
%1 = load i32, i32* @INT_MIN
ret i32 %1
}

LLVM IR (-O2):
@INT_MIN = global i32 0
define i32 @pop() {
%1 = load i32, i32* @INT_MIN
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ __NR_dup;
int syscall(int /*<<< orphan*/, int);
__attribute__((always_)) int _syscall_dup(int oldfd) {
  return syscall(__NR_dup, oldfd);
}


x86 assembly (clang, -O0):
<_syscall_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_syscall_dup>:
mov    %edi,%esi
mov    0x2ec7(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@__NR_dup = global i32 0
define i32 @_syscall_dup(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @__NR_dup
%4 = load i32, i32* %2
%5 = call i32 @syscall(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@__NR_dup = global i32 0
define i32 @_syscall_dup(i32 %0) {
%2 = load i32, i32* @__NR_dup
%3 = tail call i32 @syscall(i32 %2, i32 %0)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char const *, char *);
int file_exists(const char *filename) {
  FILE *file;
  if ((file = fopen(filename, "r"))) {
    fclose(file);
    return (1);
  } else {
    return (0);
  }
}


x86 assembly (clang, -O0):
<file_exists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xec9(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     115f <file_exists+0x3f>
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
movl   $0x1,-0x4(%rbp)
jmp    1166 <file_exists+0x46>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_exists>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <fopen@plt>
test   %rax,%rax
je     1141 <file_exists+0x21>
mov    %rax,%rdi
call   1030 <fclose@plt>
mov    $0x1,%eax
pop    %rcx
ret
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define i32 @file_exists(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32* @fopen(i8* %5, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %6, i32** %4
%7 = icmp ne i32* %6, null
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32*, i32** %4
%10 = call i32 @fclose(i32* %9)
store i32 1, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %8
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define i32 @file_exists(i8* nocapture %0) {
%2 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @fclose(i32* %2)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 1, %4 ], [ 0, %1 ]
ret i32 %7
}
/* Type definitions */
struct Obj {
  int dummy;
};

/* Variables and functions */
struct Obj *_eval(struct Obj *);
int /*<<< orphan*/ _free_stack();
struct Obj *css_eval(struct Obj *obj) {
  if (!obj)
    return NULL;
  _free_stack();
  return _eval(obj);
}


x86 assembly (clang, -O0):
<css_eval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1144 <css_eval+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1158 <css_eval+0x38>
mov    $0x0,%al
call   1030 <_free_stack@plt>
mov    -0x10(%rbp),%rdi
call   1040 <_eval@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<css_eval>:
test   %rdi,%rdi
je     1139 <css_eval+0x19>
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <_free_stack@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <_eval@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.Obj = type { i32 }
define %struct.Obj* @css_eval(%struct.Obj* %0) {
%2 = alloca %struct.Obj*
%3 = alloca %struct.Obj*
store %struct.Obj* %0, %struct.Obj** %3
%4 = load %struct.Obj*, %struct.Obj** %3
%5 = icmp ne %struct.Obj* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store %struct.Obj* null, %struct.Obj** %2
br label %11
7: ; preds = %1
%8 = call i32 (...) @_free_stack()
%9 = load %struct.Obj*, %struct.Obj** %3
%10 = call %struct.Obj* @_eval(%struct.Obj* %9)
store %struct.Obj* %10, %struct.Obj** %2
br label %11
11: ; preds = %7, %6
%12 = load %struct.Obj*, %struct.Obj** %2
ret %struct.Obj* %12
}

LLVM IR (-O2):
%struct.Obj = type { i32 }
define %struct.Obj* @css_eval(%struct.Obj* %0) {
%2 = icmp eq %struct.Obj* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 (...) @_free_stack()
%5 = tail call %struct.Obj* @_eval(%struct.Obj* %0)
br label %6
6: ; preds = %1, %3
%7 = phi %struct.Obj* [ %5, %3 ], [ null, %1 ]
ret %struct.Obj* %7
}
/* Variables and functions */
int /*<<< orphan*/ xxx();
int q() { xxx(); }


x86 assembly (clang, -O0):
<q>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <xxx@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<q>:
xor    %eax,%eax
jmp    1030 <xxx@plt>

LLVM IR (-O0):
define i32 @q() {
%1 = alloca i32
%2 = call i32 (...) @xxx()
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @q() {
%1 = tail call i32 (...) @xxx()
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ plotPixel(int, int, unsigned int);
void VdrawVLine(int x, int y, int length, unsigned int color) {
  int i, endy;
  endy = length + y;
  for (i = y; i < endy; i++)
    plotPixel(x, i, color);
}


x86 assembly (clang, -O0):
<VdrawVLine>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x18(%rbp),%eax
jge    115b <VdrawVLine+0x4b>
mov    -0x4(%rbp),%edi
mov    -0x14(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <plotPixel@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1133 <VdrawVLine+0x23>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VdrawVLine>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
test   %edx,%edx
jle    1144 <VdrawVLine+0x34>
mov    %ecx,%r14d
mov    %edx,%ebp
mov    %esi,%ebx
mov    %edi,%r15d
add    %esi,%ebp
nopw   0x0(%rax,%rax,1)
mov    %r15d,%edi
mov    %ebx,%esi
mov    %r14d,%edx
call   1030 <plotPixel@plt>
add    $0x1,%ebx
cmp    %ebp,%ebx
jl     1130 <VdrawVLine+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @VdrawVLine(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%11 = load i32, i32* %7
%12 = load i32, i32* %6
%13 = add nsw i32 %11, %12
store i32 %13, i32* %10
%14 = load i32, i32* %6
store i32 %14, i32* %9
br label %15
15: ; preds = %24, %4
%16 = load i32, i32* %9
%17 = load i32, i32* %10
%18 = icmp slt i32 %16, %17
br i1 %18, label %19, label %27
19: ; preds = %15
%20 = load i32, i32* %5
%21 = load i32, i32* %9
%22 = load i32, i32* %8
%23 = call i32 @plotPixel(i32 %20, i32 %21, i32 %22)
br label %24
24: ; preds = %19
%25 = load i32, i32* %9
%26 = add nsw i32 %25, 1
store i32 %26, i32* %9
br label %15
27: ; preds = %15
ret void
}

LLVM IR (-O2):
define void @VdrawVLine(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = add nsw i32 %2, %1
%6 = icmp sgt i32 %2, 0
br i1 %6, label %7, label %12
7: ; preds = %4, %7
%8 = phi i32 [ %10, %7 ], [ %1, %4 ]
%9 = tail call i32 @plotPixel(i32 %0, i32 %8, i32 %3)
%10 = add nsw i32 %8, 1
%11 = icmp slt i32 %10, %5
br i1 %11, label %7, label %12
12: ; preds = %7, %4
ret void
}
int trans_5_y(int x, int y) { return -x; }


x86 assembly (clang, -O0):
<trans_5_y>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
sub    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<trans_5_y>:
mov    %edi,%eax
neg    %eax
ret

LLVM IR (-O0):
define i32 @trans_5_y(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = sub nsw i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @trans_5_y(i32 %0, i32 %1) {
%3 = sub nsw i32 0, %0
ret i32 %3
}
int test_imm_A9int16_reg(short val) {
  return ((val) & (-0xA9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A9int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff57,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A9int16_reg>:
test   $0xff57,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A9int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -169
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A9int16_reg(i16 signext %0) {
%2 = and i16 %0, -169
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
double fabs(float);
int /*<<< orphan*/ printf(char *, double);
void __attribute__((no)) printFabs(float f) { printf("#%g", fabs(f)); }


x86 assembly (clang, -O0):
<printFabs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <fabs@plt>
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printFabs>:
push   %rax
call   1040 <fabs@plt>
lea    0xed3(%rip),%rdi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"#%g\00"
define void @printFabs(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call double @fabs(float %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %4)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"#%g\00"
define void @printFabs(float %0) {
%2 = tail call double @fabs(float %0)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exec_parent(int);
int scallinfo_s(int, int);
int monitorpid(int pid) {
  int r = scallinfo_s(1, pid);
  if (r != 0) {
    return -1;
  }
  exec_parent(pid);
  return 0;
}


x86 assembly (clang, -O0):
<monitorpid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    $0x1,%edi
call   1040 <scallinfo_s@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1151 <monitorpid+0x31>
movl   $0xffffffff,-0x4(%rbp)
jmp    1160 <monitorpid+0x40>
mov    -0x8(%rbp),%edi
call   1030 <exec_parent@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<monitorpid>:
push   %rbx
mov    %edi,%ebx
mov    $0x1,%edi
mov    %ebx,%esi
call   1040 <scallinfo_s@plt>
mov    %eax,%ecx
mov    $0xffffffff,%eax
test   %ecx,%ecx
je     113c <monitorpid+0x1c>
pop    %rbx
ret
mov    %ebx,%edi
call   1030 <exec_parent@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @monitorpid(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @scallinfo_s(i32 1, i32 %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %1
store i32 -1, i32* %2
br label %13
10: ; preds = %1
%11 = load i32, i32* %3
%12 = call i32 @exec_parent(i32 %11)
store i32 0, i32* %2
br label %13
13: ; preds = %10, %9
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @monitorpid(i32 %0) {
%2 = tail call i32 @scallinfo_s(i32 1, i32 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @exec_parent(i32 %0)
br label %6
6: ; preds = %1, %4
%7 = phi i32 [ 0, %4 ], [ -1, %1 ]
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
int write(int, char *, int);
void write_single(int file, char value) {
  char buf[2];
  buf[0] = value;
  if (write(file, buf, 1) != 1) {
    printf("error: failed to write 1\n");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<write_single>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
mov    %al,-0x7(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x7(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
cmp    $0x1,%eax
je     1177 <write_single+0x47>
lea    0xe98(%rip),%rdi
call   1040 <printf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_single>:
push   %rax
mov    %sil,0x6(%rsp)
lea    0x6(%rsp),%rsi
mov    $0x1,%edx
call   1040 <write@plt>
cmp    $0x1,%eax
jne    114c <write_single+0x1c>
pop    %rax
ret
lea    0xead(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"error: failed to write 1\0A\00"
define void @write_single(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca [2 x i8]
store i32 %0, i32* %3
store i8 %1, i8* %4
%6 = load i8, i8* %4
%7 = getelementptr inbounds [2 x i8], [2 x i8]* %5, i64 0, i64 0
store i8 %6, i8* %7
%8 = load i32, i32* %3
%9 = getelementptr inbounds [2 x i8], [2 x i8]* %5, i64 0, i64 0
%10 = call i32 @write(i32 %8, i8* %9, i32 1)
%11 = icmp ne i32 %10, 1
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %2
ret void
}

LLVM IR (-O2):
@str = [25 x i8] c"error: failed to write 1\00"
define void @write_single(i32 %0, i8 signext %1) {
%3 = alloca [2 x i8]
%4 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
store i8 %1, i8* %4
%5 = call i32 @write(i32 %0, i8* %4, i32 1)
%6 = icmp eq i32 %5, 1
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
%9 = tail call i32 @exit(i32 1)
unreachable
10: ; preds = %2
ret void
}
/* Variables and functions */
char *get_arg(int *argc, char **argv[]) {
  if (*argc <= 0)
    return NULL;
  char *ret = (*argv)[0];
  (*argc)--;
  (*argv) = &(*argv)[1];
  return ret;
}


x86 assembly (clang, -O0):
<get_arg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpl   $0x0,(%rax)
jg     1126 <get_arg+0x26>
movq   $0x0,-0x8(%rbp)
jmp    1159 <get_arg+0x59>
mov    -0x18(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
add    $0xffffffff,%ecx
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%rcx
add    $0x8,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_arg>:
mov    (%rdi),%ecx
test   %ecx,%ecx
jle    1119 <get_arg+0x19>
mov    (%rsi),%rdx
mov    (%rdx),%rax
add    $0xffffffff,%ecx
mov    %ecx,(%rdi)
add    $0x8,%rdx
mov    %rdx,(%rsi)
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @get_arg(i32* %0, i8*** %1) {
%3 = alloca i8*
%4 = alloca i32*
%5 = alloca i8***
%6 = alloca i8*
store i32* %0, i32** %4
store i8*** %1, i8**** %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = icmp sle i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i8* null, i8** %3
br label %24
11: ; preds = %2
%12 = load i8***, i8**** %5
%13 = load i8**, i8*** %12
%14 = getelementptr inbounds i8*, i8** %13, i64 0
%15 = load i8*, i8** %14
store i8* %15, i8** %6
%16 = load i32*, i32** %4
%17 = load i32, i32* %16
%18 = add nsw i32 %17, -1
store i32 %18, i32* %16
%19 = load i8***, i8**** %5
%20 = load i8**, i8*** %19
%21 = getelementptr inbounds i8*, i8** %20, i64 1
%22 = load i8***, i8**** %5
store i8** %21, i8*** %22
%23 = load i8*, i8** %6
store i8* %23, i8** %3
br label %24
24: ; preds = %11, %10
%25 = load i8*, i8** %3
ret i8* %25
}

LLVM IR (-O2):
define i8* @get_arg(i32* nocapture %0, i8*** nocapture %1) {
%3 = load i32, i32* %0
%4 = icmp slt i32 %3, 1
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = load i8**, i8*** %1
%7 = load i8*, i8** %6
%8 = add nsw i32 %3, -1
store i32 %8, i32* %0
%9 = getelementptr inbounds i8*, i8** %6, i64 1
store i8** %9, i8*** %1
br label %10
10: ; preds = %2, %5
%11 = phi i8* [ %7, %5 ], [ null, %2 ]
ret i8* %11
}
/* Variables and functions */
int swap(int, int, int, int);
int swap2(int, int, int, int);
int test_swap() {
  int num = 0b111001010101110;
  int expected = 0b111111010100010;
  return expected == swap(num, 11, 3, 3) && expected == swap2(num, 11, 3, 3);
}


x86 assembly (clang, -O0):
<test_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x72ae,-0x4(%rbp)
movl   $0x7ea2,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xb,%esi
mov    $0x3,%ecx
mov    %ecx,%edx
call   1040 <swap@plt>
mov    -0x10(%rbp),%ecx
mov    %eax,%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x9(%rbp)
jne    1189 <test_swap+0x69>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xb,%esi
mov    $0x3,%ecx
mov    %ecx,%edx
call   1030 <swap2@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cmp    %ecx,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_swap>:
push   %rax
mov    $0x72ae,%edi
mov    $0xb,%esi
mov    $0x3,%edx
mov    $0x3,%ecx
call   1040 <swap@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x7ea2,%ecx
jne    116c <test_swap+0x4c>
mov    $0x72ae,%edi
mov    $0xb,%esi
mov    $0x3,%edx
mov    $0x3,%ecx
call   1030 <swap2@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x7ea2,%ecx
sete   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test_swap() {
%1 = alloca i32
%2 = alloca i32
store i32 29358, i32* %1
store i32 32418, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %1
%5 = call i32 @swap(i32 %4, i32 11, i32 3, i32 3)
%6 = icmp eq i32 %3, %5
br i1 %6, label %7, label %12
7: ; preds = %0
%8 = load i32, i32* %2
%9 = load i32, i32* %1
%10 = call i32 @swap2(i32 %9, i32 11, i32 3, i32 3)
%11 = icmp eq i32 %8, %10
br label %12
12: ; preds = %7, %0
%13 = phi i1 [ false, %0 ], [ %11, %7 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @test_swap() {
%1 = tail call i32 @swap(i32 29358, i32 11, i32 3, i32 3)
%2 = icmp eq i32 %1, 32418
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = tail call i32 @swap2(i32 29358, i32 11, i32 3, i32 3)
%5 = icmp eq i32 %4, 32418
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 0, %0 ], [ %6, %3 ]
ret i32 %8
}
void game_terminar_si_es_hora() {}


x86 assembly (clang, -O0):
<game_terminar_si_es_hora>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<game_terminar_si_es_hora>:
ret

LLVM IR (-O0):
define void @game_terminar_si_es_hora() {
ret void
}

LLVM IR (-O2):
define void @game_terminar_si_es_hora() {
ret void
}
void suspend_set_pins_force_fn(void (*force)(void), void (*force_mux)(void)) {}


x86 assembly (clang, -O0):
<suspend_set_pins_force_fn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<suspend_set_pins_force_fn>:
ret

LLVM IR (-O0):
define void @suspend_set_pins_force_fn(void ()* %0, void ()* %1) {
%3 = alloca void ()*
%4 = alloca void ()*
store void ()* %0, void ()** %3
store void ()* %1, void ()** %4
ret void
}

LLVM IR (-O2):
define void @suspend_set_pins_force_fn(void ()* nocapture %0, void ()* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ dispatch(long);
void male_indirect_jump(long offset) { dispatch(offset); }


x86 assembly (clang, -O0):
<male_indirect_jump>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dispatch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<male_indirect_jump>:
jmp    1030 <dispatch@plt>

LLVM IR (-O0):
define void @male_indirect_jump(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @dispatch(i64 %3)
ret void
}

LLVM IR (-O2):
define void @male_indirect_jump(i64 %0) {
%2 = tail call i32 @dispatch(i64 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int omp_get_thread_num();
int /*<<< orphan*/ printf(char *, int);
int main() {
#pragma omp parallel sections
  {
#pragma omp section
    printf("[%d]Hello\n", omp_get_thread_num());
#pragma omp section
    printf("[%d]World!\n", omp_get_thread_num());
  }
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <omp_get_thread_num@plt>
mov    %eax,%esi
lea    0xeb1(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <omp_get_thread_num@plt>
mov    %eax,%esi
lea    0xea7(%rip),%rdi
call   1040 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <omp_get_thread_num@plt>
lea    0xec1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1030 <omp_get_thread_num@plt>
lea    0xeb7(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"[%d]Hello\0A\00"
@.str.1 = [12 x i8] c"[%d]World!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @omp_get_thread_num()
%3 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 (...) @omp_get_thread_num()
%5 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %4)
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@.str = [11 x i8] c"[%d]Hello\0A\00"
@.str.1 = [12 x i8] c"[%d]World!\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @omp_get_thread_num()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @omp_get_thread_num()
%4 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i32 %3)
%5 = tail call i32 @exit(i32 0)
unreachable
}
void yyerror(char *errtype) { (void)errtype; }


x86 assembly (clang, -O0):
<yyerror>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<yyerror>:
ret

LLVM IR (-O0):
define void @yyerror(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @yyerror(i8* nocapture %0) {
ret void
}
void Ctypes_hook_wr_sgn_u16(void) {}


x86 assembly (clang, -O0):
<Ctypes_hook_wr_sgn_u16>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ctypes_hook_wr_sgn_u16>:
ret

LLVM IR (-O0):
define void @Ctypes_hook_wr_sgn_u16() {
ret void
}

LLVM IR (-O2):
define void @Ctypes_hook_wr_sgn_u16() {
ret void
}
/* Variables and functions */
char MFRC522_ToCard(int, char *, int, char *, unsigned int *);
int /*<<< orphan*/ MFRC522_Wr(int, int);
char MFRC522_Request(char reqMode, char *TagType) {
  char _status;
  unsigned backBits;
  MFRC522_Wr(0x0D, 0x07);
  TagType[0] = reqMode;
  _status = MFRC522_ToCard(0x0C, TagType, 1, TagType, &backBits);
  if ((_status != 0) || (backBits != 0x10)) {
    _status = 2;
  }
  return _status;
}


x86 assembly (clang, -O0):
<MFRC522_Request>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xd,%edi
mov    $0x7,%esi
call   1040 <MFRC522_Wr@plt>
mov    -0x1(%rbp),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x10(%rbp),%rsi
mov    -0x10(%rbp),%rcx
mov    $0xc,%edi
mov    $0x1,%edx
lea    -0x18(%rbp),%r8
call   1030 <MFRC522_ToCard@plt>
mov    %al,-0x11(%rbp)
movsbl -0x11(%rbp),%eax
cmp    $0x0,%eax
jne    117f <MFRC522_Request+0x5f>
cmpl   $0x10,-0x18(%rbp)
je     1183 <MFRC522_Request+0x63>
movb   $0x2,-0x11(%rbp)
movsbl -0x11(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MFRC522_Request>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    $0xd,%edi
mov    $0x7,%esi
call   1040 <MFRC522_Wr@plt>
mov    %bpl,(%rbx)
lea    0x4(%rsp),%r8
mov    $0xc,%edi
mov    %rbx,%rsi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1030 <MFRC522_ToCard@plt>
cmpl   $0x10,0x4(%rsp)
movzbl %al,%ecx
mov    $0x2,%edx
mov    %ecx,%eax
cmovne %edx,%eax
test   %cl,%cl
cmovne %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define signext i8 @MFRC522_Request(i8 signext %0, i8* %1) {
%3 = alloca i8
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
store i8 %0, i8* %3
store i8* %1, i8** %4
%7 = call i32 @MFRC522_Wr(i32 13, i32 7)
%8 = load i8, i8* %3
%9 = load i8*, i8** %4
%10 = getelementptr inbounds i8, i8* %9, i64 0
store i8 %8, i8* %10
%11 = load i8*, i8** %4
%12 = load i8*, i8** %4
%13 = call signext i8 @MFRC522_ToCard(i32 12, i8* %11, i32 1, i8* %12, i32* %6)
store i8 %13, i8* %5
%14 = load i8, i8* %5
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %2
%18 = load i32, i32* %6
%19 = icmp ne i32 %18, 16
br i1 %19, label %20, label %21
20: ; preds = %17, %2
store i8 2, i8* %5
br label %21
21: ; preds = %20, %17
%22 = load i8, i8* %5
ret i8 %22
}

LLVM IR (-O2):
define signext i8 @MFRC522_Request(i8 signext %0, i8* %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = tail call i32 @MFRC522_Wr(i32 13, i32 7)
store i8 %0, i8* %1
%6 = call signext i8 @MFRC522_ToCard(i32 12, i8* %1, i32 1, i8* %1, i32* %3)
%7 = icmp ne i8 %6, 0
%8 = load i32, i32* %3
%9 = icmp ne i32 %8, 16
%10 = select i1 %7, i1 true, i1 %9
%11 = select i1 %10, i8 2, i8 %6
ret i8 %11
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430InterruptP__Port11__default__fired();
void HplMsp430InterruptP__Port11__fired(void) {
  HplMsp430InterruptP__Port11__default__fired();
}


x86 assembly (clang, -O0):
<HplMsp430InterruptP__Port11__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430InterruptP__Port11__default__fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplMsp430InterruptP__Port11__fired>:
xor    %eax,%eax
jmp    1030 <HplMsp430InterruptP__Port11__default__fired@plt>

LLVM IR (-O0):
define void @HplMsp430InterruptP__Port11__fired() {
%1 = call i32 (...) @HplMsp430InterruptP__Port11__default__fired()
ret void
}

LLVM IR (-O2):
define void @HplMsp430InterruptP__Port11__fired() {
%1 = tail call i32 (...) @HplMsp430InterruptP__Port11__default__fired()
ret void
}
void glClearDepthx(void) { return; }


x86 assembly (clang, -O0):
<glClearDepthx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glClearDepthx>:
ret

LLVM IR (-O0):
define void @glClearDepthx() {
ret void
}

LLVM IR (-O2):
define void @glClearDepthx() {
ret void
}
int isatty(int fd) { return (1); }


x86 assembly (clang, -O0):
<isatty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isatty>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @isatty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @isatty(i32 %0) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ bitmap_clear(int *);
void oof() {
  int live_head;
  int *live = &live_head;
  if (live)
    bitmap_clear(live);
}


x86 assembly (clang, -O0):
<oof>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1134 <oof+0x24>
mov    -0x10(%rbp),%rdi
call   1030 <bitmap_clear@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<oof>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <bitmap_clear@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @oof() {
%1 = alloca i32
%2 = alloca i32*
store i32* %1, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = load i32*, i32** %2
%7 = call i32 @bitmap_clear(i32* %6)
br label %8
8: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
define void @oof() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @bitmap_clear(i32* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hg_power_off();
void hg_initialize(void) {
  ;
  hg_power_off();
}


x86 assembly (clang, -O0):
<hg_initialize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <hg_power_off@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hg_initialize>:
xor    %eax,%eax
jmp    1030 <hg_power_off@plt>

LLVM IR (-O0):
define void @hg_initialize() {
%1 = call i32 (...) @hg_power_off()
ret void
}

LLVM IR (-O2):
define void @hg_initialize() {
%1 = tail call i32 (...) @hg_power_off()
ret void
}
/* Variables and functions */
int lst_remove(void *lst, size_t pos) {}


x86 assembly (clang, -O0):
<lst_remove>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lst_remove>:
ret

LLVM IR (-O0):
define i32 @lst_remove(i8* %0, i64 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @lst_remove(i8* nocapture readnone %0, i64 %1) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int inet_pton(int /*<<< orphan*/, char const *, char *);
int is_ipv4_address(const char *str) {
  char dst[16];
  int result = inet_pton(AF_INET, str, dst);
  return result;
}


x86 assembly (clang, -O0):
<is_ipv4_address>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
lea    -0x20(%rbp),%rdx
call   1030 <inet_pton@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_ipv4_address>:
sub    $0x18,%rsp
mov    %rdi,%rsi
mov    0x2eca(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rdx
call   1030 <inet_pton@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@AF_INET = global i32 0
define i32 @is_ipv4_address(i8* %0) {
%2 = alloca i8*
%3 = alloca [16 x i8]
%4 = alloca i32
store i8* %0, i8** %2
%5 = load i32, i32* @AF_INET
%6 = load i8*, i8** %2
%7 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%8 = call i32 @inet_pton(i32 %5, i8* %6, i8* %7)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
@AF_INET = global i32 0
define i32 @is_ipv4_address(i8* %0) {
%2 = alloca [16 x i8]
%3 = getelementptr inbounds [16 x i8], [16 x i8]* %2, i64 0, i64 0
%4 = load i32, i32* @AF_INET
%5 = call i32 @inet_pton(i32 %4, i8* %0, i8* %3)
ret i32 %5
}
__attribute__((used)) char *ident_stub() {
  static char *ident =
      "$Id: @(#) '"
      "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
      "2022-01-22/02-19-57/repos/RJVB/Py_RJVB/refs/heads/master/sse_mathfun/"
      "sse_mathfun_test.c"
      "'-["
      "Mar 17 2022"
      ","
      "12:25:39"
      "]-(\015\013\t\t"
      "sse_mathfun test suite"
      "\015\013\t)"
      " (gcc)"
      " $";
  static char called = 0;
  if (!called) {
    called = 1;
    return (ident_stub());
  } else {
    called = 0;
    return (ident);
  }
}


x86 assembly (clang, -O0):
<ident_stub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
cmpb   $0x0,0x2f12(%rip)
jne    113a <ident_stub+0x2a>
movb   $0x1,0x2f05(%rip)
call   1030 <ident_stub@plt>
mov    %rax,-0x8(%rbp)
jmp    114c <ident_stub+0x3c>
movb   $0x0,0x2ef0(%rip)
mov    0x2ee0(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ident_stub>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@ident_stub.ident = internal global i8* getelementptr inbounds ([227 x i8], [227 x i8]* @.str, i32 0, i32 0)
@.str = [227 x i8] c"$Id: @(#) '/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/RJVB/Py_RJVB/refs/heads/master/sse_mathfun/sse_mathfun_test.c'-[Mar 17 2022,12:25:39]-(\0D\0B\09\09sse_mathfun test suite\0D\0B\09) (gcc) $\00"
@ident_stub.called = internal global i8 0
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i8* ()* @ident_stub to i8*)], section "llvm.metadata"
define i8* @ident_stub() {
%1 = alloca i8*
%2 = load i8, i8* @ident_stub.called
%3 = icmp ne i8 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %0
store i8 1, i8* @ident_stub.called
%5 = call i8* @ident_stub()
store i8* %5, i8** %1
br label %8
6: ; preds = %0
store i8 0, i8* @ident_stub.called
%7 = load i8*, i8** @ident_stub.ident
store i8* %7, i8** %1
br label %8
8: ; preds = %6, %4
%9 = load i8*, i8** %1
ret i8* %9
}

LLVM IR (-O2):
@.str = [227 x i8] c"$Id: @(#) '/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/RJVB/Py_RJVB/refs/heads/master/sse_mathfun/sse_mathfun_test.c'-[Mar 17 2022,12:25:39]-(\0D\0B\09\09sse_mathfun test suite\0D\0B\09) (gcc) $\00"
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i8* ()* @ident_stub to i8*)], section "llvm.metadata"
define i8* @ident_stub() {
ret i8* getelementptr inbounds ([227 x i8], [227 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int /*<<< orphan*/ indent_blank();
int /*<<< orphan*/ indent_increment_level(int);
int /*<<< orphan*/ indent_newline();
int /*<<< orphan*/ indent_putchar(char);
int /*<<< orphan*/ indent_valid_state();
void vrml_begin_node(void) {
  assert(indent_valid_state());
  indent_blank();
  indent_putchar('{');
  indent_increment_level(1);
  indent_newline();
}


x86 assembly (clang, -O0):
<vrml_begin_node>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <indent_valid_state@plt>
mov    %eax,%edi
call   1050 <assert@plt>
mov    $0x0,%al
call   1060 <indent_blank@plt>
mov    $0x7b,%edi
call   1070 <indent_putchar@plt>
mov    $0x1,%edi
call   1080 <indent_increment_level@plt>
mov    $0x0,%al
call   1040 <indent_newline@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vrml_begin_node>:
push   %rax
xor    %eax,%eax
call   1030 <indent_valid_state@plt>
mov    %eax,%edi
call   1050 <assert@plt>
xor    %eax,%eax
call   1060 <indent_blank@plt>
mov    $0x7b,%edi
call   1070 <indent_putchar@plt>
mov    $0x1,%edi
call   1080 <indent_increment_level@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <indent_newline@plt>

LLVM IR (-O0):
define void @vrml_begin_node() {
%1 = call i32 (...) @indent_valid_state()
%2 = call i32 @assert(i32 %1)
%3 = call i32 (...) @indent_blank()
%4 = call i32 @indent_putchar(i8 signext 123)
%5 = call i32 @indent_increment_level(i32 1)
%6 = call i32 (...) @indent_newline()
ret void
}

LLVM IR (-O2):
define void @vrml_begin_node() {
%1 = tail call i32 (...) @indent_valid_state()
%2 = tail call i32 @assert(i32 %1)
%3 = tail call i32 (...) @indent_blank()
%4 = tail call i32 @indent_putchar(i8 signext 123)
%5 = tail call i32 @indent_increment_level(i32 1)
%6 = tail call i32 (...) @indent_newline()
ret void
}