xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ O_RDWR;
int /*<<< orphan*/ _IO(char, int);
int /*<<< orphan*/ close(int);
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/);
int open(char *, int /*<<< orphan*/);
void hapara_timer_stop() {
  int fd;
  fd = open("/dev/hapara_trace", O_RDWR);
  if (fd == -1)
    return;
  ioctl(fd, _IO('t', 9));
  close(fd);
}


x86 assembly (clang, -O0):
<hapara_timer_stop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
lea    0xea8(%rip),%rdi
call   1060 <open@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jne    116f <hapara_timer_stop+0x2f>
jmp    1196 <hapara_timer_stop+0x56>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x74,%edi
mov    $0x9,%esi
call   1030 <_IO@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%esi
call   1040 <ioctl@plt>
mov    -0x4(%rbp),%edi
call   1050 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hapara_timer_stop>:
push   %rbx
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
lea    0xeaf(%rip),%rdi
call   1060 <open@plt>
cmp    $0xffffffff,%eax
je     117d <hapara_timer_stop+0x3d>
mov    %eax,%ebx
mov    $0x74,%edi
mov    $0x9,%esi
call   1030 <_IO@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   1040 <ioctl@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1050 <close@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"/dev/hapara_trace\00"
@O_RDWR = global i32 0
define void @hapara_timer_stop() {
%1 = alloca i32
%2 = load i32, i32* @O_RDWR
%3 = call i32 @open(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %2)
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %7
6: ; preds = %0
br label %13
7: ; preds = %0
%8 = load i32, i32* %1
%9 = call i32 @_IO(i8 signext 116, i32 9)
%10 = call i32 @ioctl(i32 %8, i32 %9)
%11 = load i32, i32* %1
%12 = call i32 @close(i32 %11)
br label %13
13: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
@.str = [18 x i8] c"/dev/hapara_trace\00"
@O_RDWR = global i32 0
define void @hapara_timer_stop() {
%1 = load i32, i32* @O_RDWR
%2 = tail call i32 @open(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = icmp eq i32 %2, -1
br i1 %3, label %8, label %4
4: ; preds = %0
%5 = tail call i32 @_IO(i8 signext 116, i32 9)
%6 = tail call i32 @ioctl(i32 %2, i32 %5)
%7 = tail call i32 @close(i32 %2)
br label %8
8: ; preds = %0, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mob_read_randommonster();
int /*<<< orphan*/ mob_readdb();
int /*<<< orphan*/ mob_readdb_mobavail();
int /*<<< orphan*/ mob_readmobmodedb();
int /*<<< orphan*/ mob_readskilldb();
int /*<<< orphan*/ mob_readtalkdb();
void mob_reload(void) {
  mob_readdb();
  mob_readdb_mobavail();
  mob_read_randommonster();
  mob_readtalkdb();
  mob_readskilldb();
  mob_readmobmodedb();
}


x86 assembly (clang, -O0):
<mob_reload>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <mob_readdb@plt>
mov    $0x0,%al
call   1060 <mob_readdb_mobavail@plt>
mov    $0x0,%al
call   1070 <mob_read_randommonster@plt>
mov    $0x0,%al
call   1080 <mob_readtalkdb@plt>
mov    $0x0,%al
call   1030 <mob_readskilldb@plt>
mov    $0x0,%al
call   1050 <mob_readmobmodedb@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mob_reload>:
push   %rax
xor    %eax,%eax
call   1040 <mob_readdb@plt>
xor    %eax,%eax
call   1060 <mob_readdb_mobavail@plt>
xor    %eax,%eax
call   1070 <mob_read_randommonster@plt>
xor    %eax,%eax
call   1080 <mob_readtalkdb@plt>
xor    %eax,%eax
call   1030 <mob_readskilldb@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <mob_readmobmodedb@plt>

LLVM IR (-O0):
define void @mob_reload() {
%1 = call i32 (...) @mob_readdb()
%2 = call i32 (...) @mob_readdb_mobavail()
%3 = call i32 (...) @mob_read_randommonster()
%4 = call i32 (...) @mob_readtalkdb()
%5 = call i32 (...) @mob_readskilldb()
%6 = call i32 (...) @mob_readmobmodedb()
ret void
}

LLVM IR (-O2):
define void @mob_reload() {
%1 = tail call i32 (...) @mob_readdb()
%2 = tail call i32 (...) @mob_readdb_mobavail()
%3 = tail call i32 (...) @mob_read_randommonster()
%4 = tail call i32 (...) @mob_readtalkdb()
%5 = tail call i32 (...) @mob_readskilldb()
%6 = tail call i32 (...) @mob_readmobmodedb()
ret void
}
void daemons_signal_dispatcher(unsigned long sig) {}


x86 assembly (clang, -O0):
<daemons_signal_dispatcher>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<daemons_signal_dispatcher>:
ret

LLVM IR (-O0):
define void @daemons_signal_dispatcher(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @daemons_signal_dispatcher(i64 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mpush(int);
void fchar() { mpush(1); }


x86 assembly (clang, -O0):
<fchar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <mpush@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fchar>:
mov    $0x1,%edi
jmp    1030 <mpush@plt>

LLVM IR (-O0):
define void @fchar() {
%1 = call i32 @mpush(i32 1)
ret void
}

LLVM IR (-O2):
define void @fchar() {
%1 = tail call i32 @mpush(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_15295() {
  Assert_real((isqrt(15295) == 123),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              1605, ("Integer square root of 15295 should be 123"));
}


x86 assembly (clang, -O0):
<t_sqrt_15295>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3bbf,%edi
call   1030 <isqrt@plt>
cmp    $0x7b,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x645,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_15295>:
push   %rax
mov    $0x3bbf,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0x7b,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x645,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [43 x i8] c"Integer square root of 15295 should be 123\00"
define void @t_sqrt_15295() {
%1 = call i32 @isqrt(i32 15295)
%2 = icmp eq i32 %1, 123
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1605, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [43 x i8] c"Integer square root of 15295 should be 123\00"
define void @t_sqrt_15295() {
%1 = tail call i32 @isqrt(i32 15295)
%2 = icmp eq i32 %1, 123
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 1605, i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int test_imm_8Auint16_mem(unsigned short *val) {
  return ((*val) & (-0x8A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Auint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff76,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Auint16_mem>:
movzwl (%rdi),%eax
test   $0xff76,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Auint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -138
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_8Auint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -138
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int ishex(int ch) {
  return ((ch >= '0') && (ch <= '9')) || ((ch >= 'a') && (ch <= 'f')) ||
         ((ch >= 'A') && (ch <= 'F'));
}


x86 assembly (clang, -O0):
<ishex>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x30,-0x4(%rbp)
jl     1120 <ishex+0x20>
mov    $0x1,%al
cmpl   $0x39,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <ishex+0x58>
cmpl   $0x61,-0x4(%rbp)
jl     1139 <ishex+0x39>
mov    $0x1,%al
cmpl   $0x66,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <ishex+0x58>
xor    %eax,%eax
cmpl   $0x41,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1152 <ishex+0x52>
cmpl   $0x46,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ishex>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
setb   %al
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
cmp    $0x6,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ishex(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 48
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 57
br i1 %7, label %22, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 97
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 102
br i1 %13, label %22, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 65
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 70
br label %20
20: ; preds = %17, %14
%21 = phi i1 [ false, %14 ], [ %19, %17 ]
br label %22
22: ; preds = %20, %11, %5
%23 = phi i1 [ true, %11 ], [ true, %5 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @ishex(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 6
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
char *strcpy(char *destination, const char *source) {
  while ((*destination++ = *source++) != '\0')
    ;
  return destination;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %al,(%rcx)
movsbl %al,%eax
cmp    $0x0,%eax
je     113f <strcpy+0x3f>
jmp    110c <strcpy+0xc>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rsi),%ecx
add    $0x1,%rsi
mov    %cl,(%rax)
add    $0x1,%rax
test   %cl,%cl
jne    1110 <strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
br label %5
5: ; preds = %13, %2
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %4
%8 = load i8, i8* %6
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
store i8 %8, i8* %9
%11 = sext i8 %8 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %5
br label %5
14: ; preds = %5
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @strcpy(i8* writeonly %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %8, %3 ]
%5 = phi i8* [ %1, %2 ], [ %6, %3 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %5
%8 = getelementptr inbounds i8, i8* %4, i64 1
store i8 %7, i8* %4
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %8
}
void uart_putc(const char c) {
  while (!((*(volatile unsigned char *)(0xffff8c)) & (1 << 7)))
    ;
  (*(volatile unsigned char *)(0xffff8b)) = c;
  (*(volatile unsigned char *)(0xffff8c)) &= ~(1 << 7);
}


x86 assembly (clang, -O0):
<uart_putc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0xffff8c,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0x80,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    112e <uart_putc+0x2e>
jmp    1133 <uart_putc+0x33>
jmp    110a <uart_putc+0xa>
mov    -0x1(%rbp),%cl
mov    $0xffff8b,%eax
mov    %cl,(%rax)
mov    $0xffff8c,%eax
mov    (%rax),%al
movzbl %al,%eax
and    $0xffffff7f,%eax
mov    %al,%cl
mov    $0xffff8c,%eax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_putc>:
cmpb   $0x0,0xffff8c
jns    1100 <uart_putc>
mov    %dil,0xffff8b
andb   $0x7f,0xffff8c
7f
ret

LLVM IR (-O0):
define void @uart_putc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
br label %3
3: ; preds = %9, %1
%4 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%5 = zext i8 %4 to i32
%6 = and i32 %5, 128
%7 = icmp ne i32 %6, 0
%8 = xor i1 %7, true
br i1 %8, label %9, label %10
9: ; preds = %3
br label %3
10: ; preds = %3
%11 = load i8, i8* %2
store volatile i8 %11, i8* inttoptr (i64 16777099 to i8*)
%12 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%13 = zext i8 %12 to i32
%14 = and i32 %13, -129
%15 = trunc i32 %14 to i8
store volatile i8 %15, i8* inttoptr (i64 16777100 to i8*)
ret void
}

LLVM IR (-O2):
define void @uart_putc(i8 signext %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%4 = icmp sgt i8 %3, -1
br i1 %4, label %2, label %5
5: ; preds = %2
store volatile i8 %0, i8* inttoptr (i64 16777099 to i8*)
%6 = load volatile i8, i8* inttoptr (i64 16777100 to i8*)
%7 = and i8 %6, 127
store volatile i8 %7, i8* inttoptr (i64 16777100 to i8*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void sum_n_reccursive(int num, int sum, int n) {
  if (num <= n) {
    sum += num;
    num++;
    sum_n_reccursive(num, sum, n);
  } else {
    printf("Sum: %d\n", sum);
  }
}


x86 assembly (clang, -O0):
<sum_n_reccursive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1162 <sum_n_reccursive+0x42>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <sum_n_reccursive@plt>
jmp    1171 <sum_n_reccursive+0x51>
mov    -0x8(%rbp),%esi
lea    0xe94(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_n_reccursive>:
mov    %edx,%eax
sub    %edi,%eax
jl     112d <sum_n_reccursive+0x1d>
lea    0x1(%rdi),%ecx
imul   %eax,%ecx
add    %edi,%esi
not    %edi
add    %edx,%edi
imul   %rdi,%rax
shr    %rax
add    %ecx,%esi
add    %eax,%esi
lea    0xecc(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"Sum: %d\0A\00"
define void @sum_n_reccursive(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %6
%9 = icmp sle i32 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %3
%11 = load i32, i32* %4
%12 = load i32, i32* %5
%13 = add nsw i32 %12, %11
store i32 %13, i32* %5
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 1
store i32 %15, i32* %4
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = load i32, i32* %6
br label %22
19: ; preds = %3
%20 = load i32, i32* %5
%21 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %20)
br label %22
22: ; preds = %19, %10
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"Sum: %d\0A\00"
define void @sum_n_reccursive(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %2, %0
br i1 %4, label %19, label %5
5: ; preds = %3
%6 = sub i32 %2, %0
%7 = add i32 %0, 1
%8 = mul i32 %6, %7
%9 = xor i32 %0, -1
%10 = add i32 %9, %2
%11 = zext i32 %10 to i33
%12 = zext i32 %6 to i33
%13 = mul i33 %11, %12
%14 = lshr i33 %13, 1
%15 = trunc i33 %14 to i32
%16 = add i32 %1, %0
%17 = add i32 %16, %8
%18 = add i32 %17, %15
br label %19
19: ; preds = %5, %3
%20 = phi i32 [ %1, %3 ], [ %18, %5 ]
%21 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %20)
ret void
}
void glmGenerateReverseVector4f(float result[4], const float v[4]) {
  result[0] = -v[0];
  result[1] = -v[1];
  result[2] = -v[2];
  result[3] = -v[3];
}


x86 assembly (clang, -O0):
<glmGenerateReverseVector4f>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x10(%rbp),%rax
movss  0x4(%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x10(%rbp),%rax
movss  0x8(%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
mov    -0x10(%rbp),%rax
movss  0xc(%rax),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmGenerateReverseVector4f>:
movss  (%rsi),%xmm0
movaps 0xef5(%rip),%xmm1
xorps  %xmm1,%xmm0
movss  %xmm0,(%rdi)
movss  0x4(%rsi),%xmm0
xorps  %xmm1,%xmm0
movss  %xmm0,0x4(%rdi)
movss  0x8(%rsi),%xmm0
xorps  %xmm1,%xmm0
movss  %xmm0,0x8(%rdi)
movss  0xc(%rsi),%xmm0
xorps  %xmm1,%xmm0
movss  %xmm0,0xc(%rdi)
ret

LLVM IR (-O0):
define void @glmGenerateReverseVector4f(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %4
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = fneg float %7
%9 = load float*, float** %3
%10 = getelementptr inbounds float, float* %9, i64 0
store float %8, float* %10
%11 = load float*, float** %4
%12 = getelementptr inbounds float, float* %11, i64 1
%13 = load float, float* %12
%14 = fneg float %13
%15 = load float*, float** %3
%16 = getelementptr inbounds float, float* %15, i64 1
store float %14, float* %16
%17 = load float*, float** %4
%18 = getelementptr inbounds float, float* %17, i64 2
%19 = load float, float* %18
%20 = fneg float %19
%21 = load float*, float** %3
%22 = getelementptr inbounds float, float* %21, i64 2
store float %20, float* %22
%23 = load float*, float** %4
%24 = getelementptr inbounds float, float* %23, i64 3
%25 = load float, float* %24
%26 = fneg float %25
%27 = load float*, float** %3
%28 = getelementptr inbounds float, float* %27, i64 3
store float %26, float* %28
ret void
}

LLVM IR (-O2):
define void @glmGenerateReverseVector4f(float* nocapture writeonly %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = fneg float %3
store float %4, float* %0
%5 = getelementptr inbounds float, float* %1, i64 1
%6 = load float, float* %5
%7 = fneg float %6
%8 = getelementptr inbounds float, float* %0, i64 1
store float %7, float* %8
%9 = getelementptr inbounds float, float* %1, i64 2
%10 = load float, float* %9
%11 = fneg float %10
%12 = getelementptr inbounds float, float* %0, i64 2
store float %11, float* %12
%13 = getelementptr inbounds float, float* %1, i64 3
%14 = load float, float* %13
%15 = fneg float %14
%16 = getelementptr inbounds float, float* %0, i64 3
store float %15, float* %16
ret void
}
void gtk_widget_unrealize() {}


x86 assembly (clang, -O0):
<gtk_widget_unrealize>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_widget_unrealize>:
ret

LLVM IR (-O0):
define void @gtk_widget_unrealize() {
ret void
}

LLVM IR (-O2):
define void @gtk_widget_unrealize() {
ret void
}
main() {
  extern int q __asm("a");
  return q;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    0x2ed6(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@a = external global i32
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @a
ret i32 %2
}

LLVM IR (-O2):
@a = external global i32
define i32 @main() {
%1 = load i32, i32* @a
ret i32 %1
}
void msg_init() {}


x86 assembly (clang, -O0):
<msg_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msg_init>:
ret

LLVM IR (-O0):
define void @msg_init() {
ret void
}

LLVM IR (-O2):
define void @msg_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("pthread_mutex_getprioceiling not supported");
  return 4;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
mov    $0x4,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
mov    $0x4,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [43 x i8] c"pthread_mutex_getprioceiling not supported\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret i32 4
}

LLVM IR (-O2):
@.str = [43 x i8] c"pthread_mutex_getprioceiling not supported\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret i32 4
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dispatch_trigger_sigsys(struct __test_metadata *);
void wrapper_dispatch_trigger_sigsys(
    struct __test_metadata *_metadata,
    struct __fixture_variant_metadata *variant) {
  dispatch_trigger_sigsys(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_dispatch_trigger_sigsys>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dispatch_trigger_sigsys@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_dispatch_trigger_sigsys>:
jmp    1030 <dispatch_trigger_sigsys@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_dispatch_trigger_sigsys(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @dispatch_trigger_sigsys(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_dispatch_trigger_sigsys(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @dispatch_trigger_sigsys(%struct.__test_metadata* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fgif(char *, char *);
void fgify(char *buf) { fgif(buf, "-year.gif"); }


x86 assembly (clang, -O0):
<fgify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fgif@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgify>:
lea    0xee9(%rip),%rsi
jmp    1030 <fgif@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"-year.gif\00"
define void @fgify(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @fgif(i8* %3, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"-year.gif\00"
define void @fgify(i8* %0) {
%2 = tail call i32 @fgif(i8* %0, i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __CRAB_assert(int);
int main() {
  int x = 0;
  int t = 0;
  int phase = 0;
  while (t < 100) {
    if (phase == 0)
      x = x + 2;
    if (phase == 1)
      x = x - 1;
    phase = 1 - phase;
    t++;
  }
  __CRAB_assert(x <= 100);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x64,-0xc(%rbp)
jge    117d <main+0x6d>
cmpl   $0x0,-0x10(%rbp)
jne    1151 <main+0x41>
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x1,-0x10(%rbp)
jne    1164 <main+0x54>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    $0x1,%eax
sub    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1134 <main+0x24>
cmpl   $0x64,-0x8(%rbp)
setle  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__CRAB_assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <__CRAB_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %20, %0
%6 = load i32, i32* %3
%7 = icmp slt i32 %6, 100
br i1 %7, label %8, label %25
8: ; preds = %5
%9 = load i32, i32* %4
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 2
store i32 %13, i32* %2
br label %14
14: ; preds = %11, %8
%15 = load i32, i32* %4
%16 = icmp eq i32 %15, 1
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = sub nsw i32 %18, 1
store i32 %19, i32* %2
br label %20
20: ; preds = %17, %14
%21 = load i32, i32* %4
%22 = sub nsw i32 1, %21
store i32 %22, i32* %4
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
br label %5
25: ; preds = %5
%26 = load i32, i32* %2
%27 = icmp sle i32 %26, 100
%28 = zext i1 %27 to i32
%29 = call i32 @__CRAB_assert(i32 %28)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @__CRAB_assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ uart_send_crlf();
int /*<<< orphan*/ uart_send_string(char *);
void send_huh(void) {
  uart_send_string("??");
  uart_send_crlf();
}


x86 assembly (clang, -O0):
<send_huh>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1040 <uart_send_string@plt>
mov    $0x0,%al
call   1030 <uart_send_crlf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_huh>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <uart_send_string@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <uart_send_crlf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"??\00"
define void @send_huh() {
%1 = call i32 @uart_send_string(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = call i32 (...) @uart_send_crlf()
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"??\00"
define void @send_huh() {
%1 = tail call i32 @uart_send_string(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 (...) @uart_send_crlf()
ret void
}
void IntFuncClkAutoGateSet(void) {
  (*((volatile unsigned int *)((0x48200000) + (0x50)))) &= ~(0x00000001u);
}


x86 assembly (clang, -O0):
<IntFuncClkAutoGateSet>:
push   %rbp
mov    %rsp,%rbp
mov    $0x48200050,%eax
mov    (%rax),%ecx
and    $0xfffffffe,%ecx
mov    $0x48200050,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<IntFuncClkAutoGateSet>:
andl   $0xfffffffe,0x48200050
fe
ret

LLVM IR (-O0):
define void @IntFuncClkAutoGateSet() {
%1 = load volatile i32, i32* inttoptr (i64 1210056784 to i32*)
%2 = and i32 %1, -2
store volatile i32 %2, i32* inttoptr (i64 1210056784 to i32*)
ret void
}

LLVM IR (-O2):
define void @IntFuncClkAutoGateSet() {
%1 = load volatile i32, i32* inttoptr (i64 1210056784 to i32*)
%2 = and i32 %1, -2
store volatile i32 %2, i32* inttoptr (i64 1210056784 to i32*)
ret void
}
/* Type definitions */
struct genlist {
  int dummy;
};
struct fc_sockaddr_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ genlist_pop_back(struct genlist *);
void fc_sockaddr_list_pop_back(struct fc_sockaddr_list *tthis) {
  genlist_pop_back((struct genlist *)tthis);
}


x86 assembly (clang, -O0):
<fc_sockaddr_list_pop_back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <genlist_pop_back@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fc_sockaddr_list_pop_back>:
jmp    1030 <genlist_pop_back@plt>

LLVM IR (-O0):
%struct.fc_sockaddr_list = type { i32 }
%struct.genlist = type { i32 }
define void @fc_sockaddr_list_pop_back(%struct.fc_sockaddr_list* %0) {
%2 = alloca %struct.fc_sockaddr_list*
store %struct.fc_sockaddr_list* %0, %struct.fc_sockaddr_list** %2
%3 = load %struct.fc_sockaddr_list*, %struct.fc_sockaddr_list** %2
%4 = bitcast %struct.fc_sockaddr_list* %3 to %struct.genlist*
%5 = call i32 @genlist_pop_back(%struct.genlist* %4)
ret void
}

LLVM IR (-O2):
%struct.fc_sockaddr_list = type { i32 }
%struct.genlist = type { i32 }
define void @fc_sockaddr_list_pop_back(%struct.fc_sockaddr_list* %0) {
%2 = bitcast %struct.fc_sockaddr_list* %0 to %struct.genlist*
%3 = tail call i32 @genlist_pop_back(%struct.genlist* %2)
ret void
}
float anglemod(float a) {
  a = (360.0f / 65536.0f) * ((int)(a * (65536.0f / 360.0f)) & 65535);
  return a;
}


x86 assembly (clang, -O0):
<anglemod>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
cvttss2si %xmm0,%eax
and    $0xffff,%eax
cvtsi2ss %eax,%xmm1
movss  0xed5(%rip),%xmm0
mulss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<anglemod>:
mulss  0xef8(%rip),%xmm0
cvttss2si %xmm0,%eax
movzwl %ax,%eax
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
mulss  0xee6(%rip),%xmm0
ret

LLVM IR (-O0):
define float @anglemod(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float %3, 0x4066C16C20000000
%5 = fptosi float %4 to i32
%6 = and i32 %5, 65535
%7 = sitofp i32 %6 to float
%8 = fmul float 0x3F76800000000000, %7
store float %8, float* %2
%9 = load float, float* %2
ret float %9
}

LLVM IR (-O2):
define float @anglemod(float %0) {
%2 = fmul float %0, 0x4066C16C20000000
%3 = fptosi float %2 to i32
%4 = and i32 %3, 65535
%5 = sitofp i32 %4 to float
%6 = fmul float %5, 0x3F76800000000000
ret float %6
}
/* Variables and functions */
int /*<<< orphan*/ SET_DOUT_TO(int);
void SET_DOUT_HIGH(void) { SET_DOUT_TO(1); }


x86 assembly (clang, -O0):
<SET_DOUT_HIGH>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <SET_DOUT_TO@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SET_DOUT_HIGH>:
mov    $0x1,%edi
jmp    1030 <SET_DOUT_TO@plt>

LLVM IR (-O0):
define void @SET_DOUT_HIGH() {
%1 = call i32 @SET_DOUT_TO(i32 1)
ret void
}

LLVM IR (-O2):
define void @SET_DOUT_HIGH() {
%1 = tail call i32 @SET_DOUT_TO(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _PROCEDURE_LINKAGE_TABLE_();
void abort() {
  _PROCEDURE_LINKAGE_TABLE_();
  return;
}


x86 assembly (clang, -O0):
<abort>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <_PROCEDURE_LINKAGE_TABLE_@plt>

x86 assembly (clang, -O2):
<abort>:
push   %rax
xor    %eax,%eax
call   1030 <_PROCEDURE_LINKAGE_TABLE_@plt>

LLVM IR (-O0):
define void @abort() {
%1 = call i32 (...) @_PROCEDURE_LINKAGE_TABLE_()
unreachable
}

LLVM IR (-O2):
define void @abort() {
%1 = tail call i32 (...) @_PROCEDURE_LINKAGE_TABLE_()
unreachable
}
void i8042_unlock_chip(void) {}


x86 assembly (clang, -O0):
<i8042_unlock_chip>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i8042_unlock_chip>:
ret

LLVM IR (-O0):
define void @i8042_unlock_chip() {
ret void
}

LLVM IR (-O2):
define void @i8042_unlock_chip() {
ret void
}
/* Type definitions */
typedef scalar_t__ uint16_t;

/* Variables and functions */
float f2(uint16_t x) { return (float)(double)x; }


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cvtsi2sdq -0x8(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
cvtsi2sd %rdi,%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @f2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sitofp i64 %3 to double
%5 = fptrunc double %4 to float
ret float %5
}

LLVM IR (-O2):
define float @f2(i64 %0) {
%2 = sitofp i64 %0 to double
%3 = fptrunc double %2 to float
ret float %3
}
void av_hash_update() {}


x86 assembly (clang, -O0):
<av_hash_update>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_hash_update>:
ret

LLVM IR (-O0):
define void @av_hash_update() {
ret void
}

LLVM IR (-O2):
define void @av_hash_update() {
ret void
}
int divisionByReference(int *dividend, int *divisor) {
  return *dividend / *divisor;
}


x86 assembly (clang, -O0):
<divisionByReference>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
cltd
idivl  (%rcx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<divisionByReference>:
mov    (%rdi),%eax
cltd
idivl  (%rsi)
ret

LLVM IR (-O0):
define i32 @divisionByReference(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = load i32*, i32** %4
%8 = load i32, i32* %7
%9 = sdiv i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @divisionByReference(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = sdiv i32 %3, %4
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ pixel_avg_wxh(int /*<<< orphan*/ *, int,
                                 int /*<<< orphan*/ *, int, int, int);
void pixel_avg_16x16(uint8_t *pix1, int i_stride_pix1, uint8_t *pix2,
                     int i_stride_pix2) {
  pixel_avg_wxh(pix1, i_stride_pix1, pix2, i_stride_pix2, 16, 16);
}


x86 assembly (clang, -O0):
<pixel_avg_16x16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    $0x10,%r9d
mov    %r9d,%r8d
call   1030 <pixel_avg_wxh@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pixel_avg_16x16>:
mov    $0x10,%r8d
mov    $0x10,%r9d
jmp    1030 <pixel_avg_wxh@plt>

LLVM IR (-O0):
define void @pixel_avg_16x16(i32* %0, i32 %1, i32* %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %6
%11 = load i32*, i32** %7
%12 = load i32, i32* %8
%13 = call i32 @pixel_avg_wxh(i32* %9, i32 %10, i32* %11, i32 %12, i32 16, i32 16)
ret void
}

LLVM IR (-O2):
define void @pixel_avg_16x16(i32* %0, i32 %1, i32* %2, i32 %3) {
%5 = tail call i32 @pixel_avg_wxh(i32* %0, i32 %1, i32* %2, i32 %3, i32 16, i32 16)
ret void
}
/* Variables and functions */
int _removeDuplicates(int *, int, int /*<<< orphan*/, int);
int removeDuplicates(int *nums, int numsSize) {
  return _removeDuplicates(nums, numsSize, 0, 1);
}


x86 assembly (clang, -O0):
<removeDuplicates>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
xor    %edx,%edx
mov    $0x1,%ecx
call   1030 <_removeDuplicates@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<removeDuplicates>:
xor    %edx,%edx
mov    $0x1,%ecx
jmp    1030 <_removeDuplicates@plt>

LLVM IR (-O0):
define i32 @removeDuplicates(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @_removeDuplicates(i32* %5, i32 %6, i32 0, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @removeDuplicates(i32* %0, i32 %1) {
%3 = tail call i32 @_removeDuplicates(i32* %0, i32 %1, i32 0, i32 1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char, int);
int /*<<< orphan*/ stderr;
void h(int x) { fprintf(stderr, "%c%d\n", 'h', x); }


x86 assembly (clang, -O0):
<h>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%ecx
lea    0xed2(%rip),%rsi
mov    $0x68,%edx
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h>:
mov    %edi,%ecx
mov    0x2ec7(%rip),%rax
mov    (%rax),%edi
lea    0xede(%rip),%rsi
mov    $0x68,%edx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [6 x i8] c"%c%d\0A\00"
define void @h(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = load i32, i32* %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8 signext 104, i32 %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [6 x i8] c"%c%d\0A\00"
define void @h(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8 signext 104, i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hoic_sw(int, int);
int hdoip_cli_default(int fd, int fdr, char **argv, int argc) {
  hoic_sw(fd, (0x3100000f));
  return 0;
}


x86 assembly (clang, -O0):
<hdoip_cli_default>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x3100000f,%esi
call   1030 <hoic_sw@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdoip_cli_default>:
push   %rax
mov    $0x3100000f,%esi
call   1030 <hoic_sw@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @hdoip_cli_default(i32 %0, i32 %1, i8** %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = call i32 @hoic_sw(i32 %9, i32 822083599)
ret i32 0
}

LLVM IR (-O2):
define i32 @hdoip_cli_default(i32 %0, i32 %1, i8** nocapture readnone %2, i32 %3) {
%5 = tail call i32 @hoic_sw(i32 %0, i32 822083599)
ret i32 0
}
void gtk_icon_view_select_all() {}


x86 assembly (clang, -O0):
<gtk_icon_view_select_all>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_view_select_all>:
ret

LLVM IR (-O0):
define void @gtk_icon_view_select_all() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_view_select_all() {
ret void
}
void ReverseGPIOP$0$In$clr(void) { HplMcs51GeneralIOC$P20$clr(); }


x86 assembly (clang, -O0):
<ReverseGPIOP$0$In$clr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMcs51GeneralIOC$P20$clr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReverseGPIOP$0$In$clr>:
xor    %eax,%eax
jmp    1030 <HplMcs51GeneralIOC$P20$clr@plt>

LLVM IR (-O0):
define void @"ReverseGPIOP$0$In$clr"() {
%1 = call i32 (...) @"HplMcs51GeneralIOC$P20$clr"()
ret void
}

LLVM IR (-O2):
define void @"ReverseGPIOP$0$In$clr"() {
%1 = tail call i32 (...) @"HplMcs51GeneralIOC$P20$clr"()
ret void
}
void show_4() { printf("%s\n", __func__); }


x86 assembly (clang, -O0):
<show_4>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee2(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_4>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
@__func__.show_4 = [7 x i8] c"show_4\00"
define void @show_4() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__func__.show_4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.show_4 = [7 x i8] c"show_4\00"
define void @show_4() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @__func__.show_4, i64 0, i64 0))
ret void
}
/* Variables and functions */
int sortFirst(int *, int);
void sortArray(int *array, int length) {
  bool rt;
  do {
    rt = sortFirst(array, length);
  } while (rt);
}


x86 assembly (clang, -O0):
<sortArray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <sortFirst@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    111f <sortArray+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sortArray>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
mov    %ebp,%esi
call   1030 <sortFirst@plt>
test   %eax,%eax
jne    1120 <sortArray+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @sortArray(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
br label %6
6: ; preds = %10, %2
%7 = load i32*, i32** %3
%8 = load i32, i32* %4
%9 = call i32 @sortFirst(i32* %7, i32 %8)
store i32 %9, i32* %5
br label %10
10: ; preds = %6
%11 = load i32, i32* %5
%12 = icmp ne i32 %11, 0
br i1 %12, label %6, label %13
13: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @sortArray(i32* %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 @sortFirst(i32* %0, i32 %1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %3
6: ; preds = %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ send_fd(int, int);
void priv_sock_send_fd(int sock_fd, int fd) { send_fd(sock_fd, fd); }


x86 assembly (clang, -O0):
<priv_sock_send_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <send_fd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<priv_sock_send_fd>:
jmp    1030 <send_fd@plt>

LLVM IR (-O0):
define void @priv_sock_send_fd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @send_fd(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @priv_sock_send_fd(i32 %0, i32 %1) {
%3 = tail call i32 @send_fd(i32 %0, i32 %1)
ret void
}
int fun327() { return 327; }


x86 assembly (clang, -O0):
<fun327>:
push   %rbp
mov    %rsp,%rbp
mov    $0x147,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun327>:
mov    $0x147,%eax
ret

LLVM IR (-O0):
define i32 @fun327() {
ret i32 327
}

LLVM IR (-O2):
define i32 @fun327() {
ret i32 327
}
void gensrav() {}


x86 assembly (clang, -O0):
<gensrav>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gensrav>:
ret

LLVM IR (-O0):
define void @gensrav() {
ret void
}

LLVM IR (-O2):
define void @gensrav() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void printN(int ch, int n) {
  int i;
  for (i = 0; i < n; i++)
    printf("%c", ch);
}


x86 assembly (clang, -O0):
<printN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    114e <printN+0x3e>
mov    -0x4(%rbp),%esi
lea    0xec5(%rip),%rdi
call   1030 <printf@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1125 <printN+0x15>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printN>:
push   %rbp
push   %r14
push   %rbx
test   %esi,%esi
jle    113f <printN+0x2f>
mov    %esi,%ebx
mov    %edi,%ebp
lea    0xedd(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %r14,%rdi
mov    %ebp,%esi
call   1030 <printf@plt>
add    $0xffffffff,%ebx
jne    1130 <printN+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define void @printN(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %13, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = load i32, i32* %3
%12 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %11)
br label %13
13: ; preds = %10
%14 = load i32, i32* %5
%15 = add nsw i32 %14, 1
store i32 %15, i32* %5
br label %6
16: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define void @printN(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %9
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ 0, %2 ]
%6 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
%7 = add nuw nsw i32 %5, 1
%8 = icmp eq i32 %7, %1
br i1 %8, label %9, label %4
9: ; preds = %4, %2
ret void
}
void b() { int b __attribute__((nodebug)); }


x86 assembly (clang, -O0):
<b>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b>:
ret

LLVM IR (-O0):
define void @b() {
%1 = alloca i32
ret void
}

LLVM IR (-O2):
define void @b() {
ret void
}
signed int explicit_unsigned_char_to_signed_int(unsigned char src) {
  return (signed int)src;
}


x86 assembly (clang, -O0):
<explicit_unsigned_char_to_signed_int>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<explicit_unsigned_char_to_signed_int>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @explicit_unsigned_char_to_signed_int(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
ret i32 %4
}

LLVM IR (-O2):
define i32 @explicit_unsigned_char_to_signed_int(i8 zeroext %0) {
%2 = zext i8 %0 to i32
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ hunger();
int main() {
  hunger();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <hunger@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <hunger@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @hunger()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @hunger()
ret i32 0
}
/* Type definitions */
typedef int __u64;

/* Variables and functions */
int vfio_offset_to_pci_space(__u64 off) { return (off >> 32) & 0xF; }


x86 assembly (clang, -O0):
<vfio_offset_to_pci_space>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
and    $0xf,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vfio_offset_to_pci_space>:
ret

LLVM IR (-O0):
define i32 @vfio_offset_to_pci_space(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 32
%5 = and i32 %4, 15
ret i32 %5
}

LLVM IR (-O2):
define i32 @vfio_offset_to_pci_space(i32 %0) {
ret i32 poison
}