xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t xtract(uint32_t val, int shift, int len) {
  return (val >> shift) & ((1 << len) - 1);
}


x86 assembly (clang, -O0):
<xtract>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
sar    %cl,%eax
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
sub    $0x1,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xtract>:
mov    %esi,%ecx
sar    %cl,%edi
mov    $0xffffffff,%eax
mov    %edx,%ecx
shl    %cl,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @xtract(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = ashr i32 %7, %8
%10 = load i32, i32* %6
%11 = shl i32 1, %10
%12 = sub nsw i32 %11, 1
%13 = and i32 %9, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @xtract(i32 %0, i32 %1, i32 %2) {
%4 = ashr i32 %0, %1
%5 = shl nsw i32 -1, %2
%6 = xor i32 %5, -1
%7 = and i32 %4, %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ disable_cursor();
int /*<<< orphan*/ disable_interrupt(int);
void kb_disable(void) {
  disable_interrupt(1);
  disable_cursor();
}


x86 assembly (clang, -O0):
<kb_disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <disable_interrupt@plt>
mov    $0x0,%al
call   1030 <disable_cursor@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<kb_disable>:
push   %rax
mov    $0x1,%edi
call   1040 <disable_interrupt@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <disable_cursor@plt>

LLVM IR (-O0):
define void @kb_disable() {
%1 = call i32 @disable_interrupt(i32 1)
%2 = call i32 (...) @disable_cursor()
ret void
}

LLVM IR (-O2):
define void @kb_disable() {
%1 = tail call i32 @disable_interrupt(i32 1)
%2 = tail call i32 (...) @disable_cursor()
ret void
}
/* Variables and functions */
long Random();
short RandomInt(short range) {
  register long rawResult;
  rawResult = Random();
  if (rawResult < 0L)
    rawResult *= -1L;
  rawResult = (rawResult * (long)range) / 32768L;
  return ((short)rawResult);
}


x86 assembly (clang, -O0):
<RandomInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    $0x0,%al
call   1030 <Random@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jge    113e <RandomInt+0x2e>
imul   $0xffffffffffffffff,-0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movswq -0x2(%rbp),%rcx
imul   %rcx,%rax
mov    $0x8000,%ecx
cqto
idiv   %rcx
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cwtl
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomInt>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <Random@plt>
mov    %rax,%rcx
neg    %rcx
cmovns %rcx,%rax
movslq %ebx,%rcx
imul   %rcx,%rax
lea    0x7fff(%rax),%ecx
test   %rax,%rax
cmovs  %rcx,%rax
shr    $0xf,%rax
pop    %rbx
ret

LLVM IR (-O0):
define signext i16 @RandomInt(i16 signext %0) {
%2 = alloca i16
%3 = alloca i64
store i16 %0, i16* %2
%4 = call i64 (...) @Random()
store i64 %4, i64* %3
%5 = load i64, i64* %3
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i64, i64* %3
%9 = mul nsw i64 %8, -1
store i64 %9, i64* %3
br label %10
10: ; preds = %7, %1
%11 = load i64, i64* %3
%12 = load i16, i16* %2
%13 = sext i16 %12 to i64
%14 = mul nsw i64 %11, %13
%15 = sdiv i64 %14, 32768
store i64 %15, i64* %3
%16 = load i64, i64* %3
%17 = trunc i64 %16 to i16
ret i16 %17
}

LLVM IR (-O2):
define signext i16 @RandomInt(i16 signext %0) {
%2 = tail call i64 (...) @Random()
%3 = tail call i64 @llvm.abs.i64(i64 %2, i1 true)
%4 = sext i16 %0 to i64
%5 = mul nsw i64 %3, %4
%6 = sdiv i64 %5, 32768
%7 = trunc i64 %6 to i16
ret i16 %7
}
void gdk_window_begin_resize_drag() {}


x86 assembly (clang, -O0):
<gdk_window_begin_resize_drag>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_window_begin_resize_drag>:
ret

LLVM IR (-O0):
define void @gdk_window_begin_resize_drag() {
ret void
}

LLVM IR (-O2):
define void @gdk_window_begin_resize_drag() {
ret void
}
void take_a(int ii) {
  printf("%s -- start\n", __func__);
  printf("%s -- exit\n", __func__);
  return;
}


x86 assembly (clang, -O0):
<take_a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
lea    0xee4(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xedd(%rip),%rdi
lea    0xecf(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<take_a>:
push   %rbx
lea    0xee8(%rip),%rdi
lea    0xeee(%rip),%rbx
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xee4(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
pop    %rbx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"%s -- start\0A\00"
@__func__.take_a = [7 x i8] c"take_a\00"
@.str.1 = [12 x i8] c"%s -- exit\0A\00"
define void @take_a(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__func__.take_a, i64 0, i64 0))
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__func__.take_a, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"%s -- start\0A\00"
@__func__.take_a = [7 x i8] c"take_a\00"
@.str.1 = [12 x i8] c"%s -- exit\0A\00"
define void @take_a(i32 %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__func__.take_a, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @__func__.take_a, i64 0, i64 0))
ret void
}
/* Type definitions */
struct disk_util {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ disk_util_mod(struct disk_util *, int);
void disk_util_dec(struct disk_util *du) { disk_util_mod(du, -1); }


x86 assembly (clang, -O0):
<disk_util_dec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xffffffff,%esi
call   1030 <disk_util_mod@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disk_util_dec>:
mov    $0xffffffff,%esi
jmp    1030 <disk_util_mod@plt>

LLVM IR (-O0):
%struct.disk_util = type { i32 }
define void @disk_util_dec(%struct.disk_util* %0) {
%2 = alloca %struct.disk_util*
store %struct.disk_util* %0, %struct.disk_util** %2
%3 = load %struct.disk_util*, %struct.disk_util** %2
%4 = call i32 @disk_util_mod(%struct.disk_util* %3, i32 -1)
ret void
}

LLVM IR (-O2):
%struct.disk_util = type { i32 }
define void @disk_util_dec(%struct.disk_util* %0) {
%2 = tail call i32 @disk_util_mod(%struct.disk_util* %0, i32 -1)
ret void
}
/* Type definitions */
struct mallinfo {
  int arena;
  int hblkhd;
};

/* Variables and functions */
struct mallinfo mallinfo();
void memstat_(int *kilobytes) {
  struct mallinfo info;
  info = mallinfo();
  *kilobytes = (info.arena + info.hblkhd) / 1024;
}


x86 assembly (clang, -O0):
<memstat_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <mallinfo@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    -0xc(%rbp),%eax
mov    $0x400,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memstat_>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <mallinfo@plt>
mov    %rax,%rcx
shr    $0x20,%rcx
lea    (%rcx,%rax,1),%edx
add    $0x3ff,%edx
add    %eax,%ecx
cmovns %ecx,%edx
sar    $0xa,%edx
mov    %edx,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
%struct.mallinfo = type { i32, i32 }
define void @memstat_(i32* %0) {
%2 = alloca i32*
%3 = alloca %struct.mallinfo
%4 = alloca %struct.mallinfo
store i32* %0, i32** %2
%5 = call i64 (...) @mallinfo()
%6 = bitcast %struct.mallinfo* %4 to i64*
store i64 %5, i64* %6
%7 = bitcast %struct.mallinfo* %3 to i8*
%8 = bitcast %struct.mallinfo* %4 to i8*
%9 = getelementptr inbounds %struct.mallinfo, %struct.mallinfo* %3, i32 0, i32 0
%10 = load i32, i32* %9
%11 = getelementptr inbounds %struct.mallinfo, %struct.mallinfo* %3, i32 0, i32 1
%12 = load i32, i32* %11
%13 = add nsw i32 %10, %12
%14 = sdiv i32 %13, 1024
%15 = load i32*, i32** %2
store i32 %14, i32* %15
ret void
}

LLVM IR (-O2):
define void @memstat_(i32* nocapture writeonly %0) {
%2 = tail call i64 (...) @mallinfo()
%3 = trunc i64 %2 to i32
%4 = lshr i64 %2, 32
%5 = trunc i64 %4 to i32
%6 = add nsw i32 %5, %3
%7 = sdiv i32 %6, 1024
store i32 %7, i32* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
void nc_stop(void) { endwin(); }


x86 assembly (clang, -O0):
<nc_stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <endwin@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nc_stop>:
xor    %eax,%eax
jmp    1030 <endwin@plt>

LLVM IR (-O0):
define void @nc_stop() {
%1 = call i32 (...) @endwin()
ret void
}

LLVM IR (-O2):
define void @nc_stop() {
%1 = tail call i32 (...) @endwin()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
time_t ext_get_systime() { return time(NULL); }


x86 assembly (clang, -O0):
<ext_get_systime>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
call   1030 <time@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ext_get_systime>:
xor    %edi,%edi
jmp    1030 <time@plt>

LLVM IR (-O0):
define i32 @ext_get_systime() {
%1 = call i32 @time(i32* null)
ret i32 %1
}

LLVM IR (-O2):
define i32 @ext_get_systime() {
%1 = tail call i32 @time(i32* null)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ DAC_ADC_init();
int /*<<< orphan*/ rutina_ini_TMR0();
int /*<<< orphan*/ rutina_ini_TMR1();
void hwIni(void) {
  DAC_ADC_init();
  rutina_ini_TMR0();
  rutina_ini_TMR1();
}


x86 assembly (clang, -O0):
<hwIni>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DAC_ADC_init@plt>
mov    $0x0,%al
call   1040 <rutina_ini_TMR0@plt>
mov    $0x0,%al
call   1050 <rutina_ini_TMR1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hwIni>:
push   %rax
xor    %eax,%eax
call   1030 <DAC_ADC_init@plt>
xor    %eax,%eax
call   1040 <rutina_ini_TMR0@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <rutina_ini_TMR1@plt>

LLVM IR (-O0):
define void @hwIni() {
%1 = call i32 (...) @DAC_ADC_init()
%2 = call i32 (...) @rutina_ini_TMR0()
%3 = call i32 (...) @rutina_ini_TMR1()
ret void
}

LLVM IR (-O2):
define void @hwIni() {
%1 = tail call i32 (...) @DAC_ADC_init()
%2 = tail call i32 (...) @rutina_ini_TMR0()
%3 = tail call i32 (...) @rutina_ini_TMR1()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __getdtablesize() {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__getdtablesize>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__getdtablesize>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @__getdtablesize() {
%1 = load i32, i32* @ENOSYS
%2 = call i32 @__set_errno(i32 %1)
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @__getdtablesize() {
%1 = load i32, i32* @ENOSYS
%2 = tail call i32 @__set_errno(i32 %1)
ret i32 -1
}
void ff_hevc_put_hevc_uni_w_qpel_v64_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_qpel_v64_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_qpel_v64_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_qpel_v64_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_qpel_v64_8_sse4() {
ret void
}
/* Type definitions */
struct hle_t {
  int dummy;
};

/* Variables and functions */
scalar_t__ is_task(struct hle_t *);
int /*<<< orphan*/ non_task_dispatching(struct hle_t *);
int /*<<< orphan*/ normal_task_dispatching(struct hle_t *);
int /*<<< orphan*/ try_fast_task_dispatching(struct hle_t *);
void hle_execute(struct hle_t *hle) {
  if (is_task(hle)) {
    if (!try_fast_task_dispatching(hle))
      normal_task_dispatching(hle);
  } else {
    non_task_dispatching(hle);
  }
}


x86 assembly (clang, -O0):
<hle_execute>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <is_task@plt>
cmp    $0x0,%rax
je     117f <hle_execute+0x3f>
mov    -0x8(%rbp),%rdi
call   1050 <try_fast_task_dispatching@plt>
cmp    $0x0,%eax
jne    117a <hle_execute+0x3a>
mov    -0x8(%rbp),%rdi
call   1060 <normal_task_dispatching@plt>
jmp    1188 <hle_execute+0x48>
mov    -0x8(%rbp),%rdi
call   1030 <non_task_dispatching@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hle_execute>:
push   %rbx
mov    %rdi,%rbx
call   1040 <is_task@plt>
test   %rax,%rax
je     115c <hle_execute+0x1c>
mov    %rbx,%rdi
call   1050 <try_fast_task_dispatching@plt>
test   %eax,%eax
je     1165 <hle_execute+0x25>
pop    %rbx
ret
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <non_task_dispatching@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1060 <normal_task_dispatching@plt>

LLVM IR (-O0):
%struct.hle_t = type { i32 }
define void @hle_execute(%struct.hle_t* %0) {
%2 = alloca %struct.hle_t*
store %struct.hle_t* %0, %struct.hle_t** %2
%3 = load %struct.hle_t*, %struct.hle_t** %2
%4 = call i64 @is_task(%struct.hle_t* %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %14
6: ; preds = %1
%7 = load %struct.hle_t*, %struct.hle_t** %2
%8 = call i32 @try_fast_task_dispatching(%struct.hle_t* %7)
%9 = icmp ne i32 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %6
%11 = load %struct.hle_t*, %struct.hle_t** %2
%12 = call i32 @normal_task_dispatching(%struct.hle_t* %11)
br label %13
13: ; preds = %10, %6
br label %17
14: ; preds = %1
%15 = load %struct.hle_t*, %struct.hle_t** %2
%16 = call i32 @non_task_dispatching(%struct.hle_t* %15)
br label %17
17: ; preds = %14, %13
ret void
}

LLVM IR (-O2):
%struct.hle_t = type { i32 }
define void @hle_execute(%struct.hle_t* %0) {
%2 = tail call i64 @is_task(%struct.hle_t* %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = tail call i32 @try_fast_task_dispatching(%struct.hle_t* %0)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = tail call i32 @normal_task_dispatching(%struct.hle_t* %0)
br label %11
9: ; preds = %1
%10 = tail call i32 @non_task_dispatching(%struct.hle_t* %0)
br label %11
11: ; preds = %4, %7, %9
ret void
}
void *larger(void *ptr1, void *ptr2, int (*pfn_compare)(void *, void *)) {
  if ((*pfn_compare)(ptr1, ptr2) > 0)
    return ptr1;
  else
    return ptr2;
}


x86 assembly (clang, -O0):
<larger>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   *%rax
cmp    $0x0,%eax
jle    1138 <larger+0x38>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1140 <larger+0x40>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<larger>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
call   *%rdx
test   %eax,%eax
cmovg  %r14,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @larger(i8* %0, i8* %1, i32 (i8*, i8*)* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32 (i8*, i8*)*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 (i8*, i8*)* %2, i32 (i8*, i8*)** %7
%8 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %7
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = call i32 %8(i8* %9, i8* %10)
%12 = icmp sgt i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = load i8*, i8** %5
store i8* %14, i8** %4
br label %17
15: ; preds = %3
%16 = load i8*, i8** %6
store i8* %16, i8** %4
br label %17
17: ; preds = %15, %13
%18 = load i8*, i8** %4
ret i8* %18
}

LLVM IR (-O2):
define i8* @larger(i8* %0, i8* %1, i32 (i8*, i8*)* nocapture %2) {
%4 = tail call i32 %2(i8* %0, i8* %1)
%5 = icmp sgt i32 %4, 0
%6 = select i1 %5, i8* %0, i8* %1
ret i8* %6
}
void g_value_type_compatible() {}


x86 assembly (clang, -O0):
<g_value_type_compatible>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_value_type_compatible>:
ret

LLVM IR (-O0):
define void @g_value_type_compatible() {
ret void
}

LLVM IR (-O2):
define void @g_value_type_compatible() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ draw(int /*<<< orphan*/);
int /*<<< orphan*/ getWallSymbol();
void drawWall() { draw(getWallSymbol()); }


x86 assembly (clang, -O0):
<drawWall>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <getWallSymbol@plt>
mov    %eax,%edi
call   1030 <draw@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drawWall>:
push   %rax
xor    %eax,%eax
call   1040 <getWallSymbol@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <draw@plt>

LLVM IR (-O0):
define void @drawWall() {
%1 = call i32 (...) @getWallSymbol()
%2 = call i32 @draw(i32 %1)
ret void
}

LLVM IR (-O2):
define void @drawWall() {
%1 = tail call i32 (...) @getWallSymbol()
%2 = tail call i32 @draw(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ twiddles(int, double *);
int main() {
  int N = 32;
  double x[N / 2];
  twiddles(N / 4, x);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x20,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
shr    $0x1f,%ecx
add    %ecx,%eax
sar    %eax
mov    %rsp,%rcx
mov    %rcx,-0x10(%rbp)
lea    0xf(,%rax,8),%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rsi
sub    %rcx,%rsi
mov    %rsi,%rsp
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <twiddles@plt>
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
xor    %eax,%eax
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x88,%rsp
mov    %rsp,%rsi
mov    $0x8,%edi
call   1030 <twiddles@plt>
xor    %eax,%eax
add    $0x88,%rsp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i64
store i32 32, i32* %1
%4 = load i32, i32* %1
%5 = sdiv i32 %4, 2
%6 = zext i32 %5 to i64
%7 = call i8* @llvm.stacksave()
store i8* %7, i8** %2
%8 = alloca double, i64 %6
store i64 %6, i64* %3
%9 = load i32, i32* %1
%10 = sdiv i32 %9, 4
%11 = call i32 @twiddles(i32 %10, double* %8)
%12 = load i8*, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [16 x double]
%2 = getelementptr inbounds [16 x double], [16 x double]* %1, i64 0, i64 0
%3 = call i32 @twiddles(i32 8, double* %2)
ret i32 0
}
int ValuesLen(int count) { return count * 8 + 2; }


x86 assembly (clang, -O0):
<ValuesLen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x3,%eax
add    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ValuesLen>:
lea    0x2(,%rdi,8),%eax
ret

LLVM IR (-O0):
define i32 @ValuesLen(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 %3, 8
%5 = add nsw i32 %4, 2
ret i32 %5
}

LLVM IR (-O2):
define i32 @ValuesLen(i32 %0) {
%2 = shl nsw i32 %0, 3
%3 = or i32 %2, 2
ret i32 %3
}
int test_imm_44int32_mem(int *val) {
  return ((*val) & (0x44 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_44int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x44,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_44int32_mem>:
testb  $0x44,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_44int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 68
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_44int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 68
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ test1(int);
int /*<<< orphan*/ test2(int);
int /*<<< orphan*/ test3(unsigned int);
int /*<<< orphan*/ test4(unsigned int);
int /*<<< orphan*/ test5(int);
int main(void) {
  test1(1);
  test2(2);
  test3(4U);
  test4(3U);
  test5(17);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1050 <test1@plt>
mov    $0x2,%edi
call   1070 <test2@plt>
mov    $0x4,%edi
call   1040 <test3@plt>
mov    $0x3,%edi
call   1060 <test4@plt>
mov    $0x11,%edi
call   1030 <test5@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1050 <test1@plt>
mov    $0x2,%edi
call   1070 <test2@plt>
mov    $0x4,%edi
call   1040 <test3@plt>
mov    $0x3,%edi
call   1060 <test4@plt>
mov    $0x11,%edi
call   1030 <test5@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @test1(i32 1)
%2 = call i32 @test2(i32 2)
%3 = call i32 @test3(i32 4)
%4 = call i32 @test4(i32 3)
%5 = call i32 @test5(i32 17)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @test1(i32 1)
%2 = tail call i32 @test2(i32 2)
%3 = tail call i32 @test3(i32 4)
%4 = tail call i32 @test4(i32 3)
%5 = tail call i32 @test5(i32 17)
ret i32 0
}
/* Type definitions */
struct geometry_struct {
  int dummy;
};

/* Variables and functions */
int A_within_B(struct geometry_struct *, struct geometry_struct *, int);
int box_within_sphere(struct geometry_struct *geometry_child,
                      struct geometry_struct *geometry_parent) {
  return A_within_B(geometry_child, geometry_parent, 8);
}


x86 assembly (clang, -O0):
<box_within_sphere>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x8,%edx
call   1030 <A_within_B@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<box_within_sphere>:
mov    $0x8,%edx
jmp    1030 <A_within_B@plt>

LLVM IR (-O0):
%struct.geometry_struct = type { i32 }
define i32 @box_within_sphere(%struct.geometry_struct* %0, %struct.geometry_struct* %1) {
%3 = alloca %struct.geometry_struct*
%4 = alloca %struct.geometry_struct*
store %struct.geometry_struct* %0, %struct.geometry_struct** %3
store %struct.geometry_struct* %1, %struct.geometry_struct** %4
%5 = load %struct.geometry_struct*, %struct.geometry_struct** %3
%6 = load %struct.geometry_struct*, %struct.geometry_struct** %4
%7 = call i32 @A_within_B(%struct.geometry_struct* %5, %struct.geometry_struct* %6, i32 8)
ret i32 %7
}

LLVM IR (-O2):
%struct.geometry_struct = type { i32 }
define i32 @box_within_sphere(%struct.geometry_struct* %0, %struct.geometry_struct* %1) {
%3 = tail call i32 @A_within_B(%struct.geometry_struct* %0, %struct.geometry_struct* %1, i32 8)
ret i32 %3
}
void SUPR3QueryVTxSupported(void) {}


x86 assembly (clang, -O0):
<SUPR3QueryVTxSupported>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SUPR3QueryVTxSupported>:
ret

LLVM IR (-O0):
define void @SUPR3QueryVTxSupported() {
ret void
}

LLVM IR (-O2):
define void @SUPR3QueryVTxSupported() {
ret void
}
int is_clr(volatile unsigned char reg, unsigned char flag) {
  unsigned char tmp = reg & flag;
  return 0 == tmp;
}


x86 assembly (clang, -O0):
<is_clr>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    -0x1(%rbp),%al
movzbl %al,%eax
movzbl -0x2(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_clr>:
mov    %dil,-0x1(%rsp)
xor    %eax,%eax
and    -0x1(%rsp),%sil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_clr(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
store volatile i8 %0, i8* %3
store i8 %1, i8* %4
%6 = load volatile i8, i8* %3
%7 = zext i8 %6 to i32
%8 = load i8, i8* %4
%9 = zext i8 %8 to i32
%10 = and i32 %7, %9
%11 = trunc i32 %10 to i8
store i8 %11, i8* %5
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = icmp eq i32 0, %13
%15 = zext i1 %14 to i32
ret i32 %15
}

LLVM IR (-O2):
define i32 @is_clr(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
store volatile i8 %0, i8* %3
%4 = load volatile i8, i8* %3
%5 = and i8 %4, %1
%6 = icmp eq i8 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Type definitions */
struct RawIndex {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
struct RawIndex *RawIndexLoad(int /*<<< orphan*/);
int /*<<< orphan*/ fileno(int /*<<< orphan*/ *);
struct RawIndex *RawIndexFload(FILE *fp) {
  return RawIndexLoad(fileno(fp));
}


x86 assembly (clang, -O0):
<RawIndexFload>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <fileno@plt>
mov    %eax,%edi
call   1030 <RawIndexLoad@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RawIndexFload>:
push   %rax
call   1040 <fileno@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <RawIndexLoad@plt>

LLVM IR (-O0):
%struct.RawIndex = type { i32 }
define %struct.RawIndex* @RawIndexFload(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fileno(i32* %3)
%5 = call %struct.RawIndex* @RawIndexLoad(i32 %4)
ret %struct.RawIndex* %5
}

LLVM IR (-O2):
%struct.RawIndex = type { i32 }
define %struct.RawIndex* @RawIndexFload(i32* nocapture %0) {
%2 = tail call i32 @fileno(i32* %0)
%3 = tail call %struct.RawIndex* @RawIndexLoad(i32 %2)
ret %struct.RawIndex* %3
}
/* Variables and functions */
double exp(double);
double iterate(double x_n) { return (exp(-1.0 * (8.0) * x_n * x_n) + (-0.6)); }


x86 assembly (clang, -O0):
<iterate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xee3(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1030 <exp@plt>
movsd  0xec4(%rip),%xmm1
addsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iterate>:
push   %rax
movsd  0xee7(%rip),%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm1,%xmm0
call   1030 <exp@plt>
addsd  0xeda(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @iterate(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double -8.000000e+00, %3
%5 = load double, double* %2
%6 = fmul double %4, %5
%7 = call double @exp(double %6)
%8 = fadd double %7, -6.000000e-01
ret double %8
}

LLVM IR (-O2):
define double @iterate(double %0) {
%2 = fmul double %0, -8.000000e+00
%3 = fmul double %2, %0
%4 = tail call double @exp(double %3)
%5 = fadd double %4, -6.000000e-01
ret double %5
}
/* Variables and functions */
float f(int, float);
int g(int);
int main() {
  float x = 1.5;
  x = x * 2.0;
  int y = 8;
  float k = f(y, x);
  return g(8);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movss  0xed1(%rip),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeb3(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movl   $0x8,-0xc(%rbp)
mov    -0xc(%rbp),%edi
movss  -0x8(%rbp),%xmm0
call   1030 <f@plt>
movss  %xmm0,-0x10(%rbp)
mov    $0x8,%edi
call   1040 <g@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movss  0xed7(%rip),%xmm0
mov    $0x8,%edi
call   1030 <f@plt>
mov    $0x8,%edi
pop    %rax
jmp    1040 <g@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca float
%3 = alloca i32
%4 = alloca float
store i32 0, i32* %1
store float 1.500000e+00, float* %2
%5 = load float, float* %2
%6 = fpext float %5 to double
%7 = fmul double %6, 2.000000e+00
%8 = fptrunc double %7 to float
store float %8, float* %2
store i32 8, i32* %3
%9 = load i32, i32* %3
%10 = load float, float* %2
%11 = call float @f(i32 %9, float %10)
store float %11, float* %4
%12 = call i32 @g(i32 8)
ret i32 %12
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call float @f(i32 8, float 3.000000e+00)
%2 = tail call i32 @g(i32 8)
ret i32 %2
}
int noop(char *fmt, ...) { return 0; }


x86 assembly (clang, -O0):
<noop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<noop>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @noop(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @noop(i8* nocapture readnone %0, ...) {
ret i32 0
}
/* Variables and functions */
void *malloc(size_t);
int main(int argc, char **argv) {
  size_t size = 15;
  int count = 0;
  if ('.' <= **argv)
    count -= 2;
  if ('\\' != **argv)
    count += 260;
  void *p = malloc(size + count);
  ((char *)p)[size] = 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0xf,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
mov    $0x2e,%eax
cmp    %ecx,%eax
jg     1155 <main+0x45>
mov    -0x1c(%rbp),%eax
sub    $0x2,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%ecx
mov    $0x5c,%eax
cmp    %ecx,%eax
je     1177 <main+0x67>
mov    -0x1c(%rbp),%eax
add    $0x104,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
movslq -0x1c(%rbp),%rax
add    %rax,%rdi
call   1030 <malloc@plt>
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    -0x18(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
%7 = alloca i32
%8 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i64 15, i64* %6
store i32 0, i32* %7
%9 = load i8**, i8*** %5
%10 = load i8*, i8** %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp sle i32 46, %12
br i1 %13, label %14, label %17
14: ; preds = %2
%15 = load i32, i32* %7
%16 = sub nsw i32 %15, 2
store i32 %16, i32* %7
br label %17
17: ; preds = %14, %2
%18 = load i8**, i8*** %5
%19 = load i8*, i8** %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp ne i32 92, %21
br i1 %22, label %23, label %26
23: ; preds = %17
%24 = load i32, i32* %7
%25 = add nsw i32 %24, 260
store i32 %25, i32* %7
br label %26
26: ; preds = %23, %17
%27 = load i64, i64* %6
%28 = load i32, i32* %7
%29 = sext i32 %28 to i64
%30 = add i64 %27, %29
%31 = call i8* @malloc(i64 %30)
store i8* %31, i8** %8
%32 = load i8*, i8** %8
%33 = load i64, i64* %6
%34 = getelementptr inbounds i8, i8* %32, i64 %33
store i8 0, i8* %34
%35 = load i32, i32* %3
ret i32 %35
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
ret i32 0
}
double ranf() {
  const int ia = 16807, ic = 2147483647, iq = 127773, ir = 2836;
  int il, ih, it;
  double rc;
  extern int iseed;
  ih = iseed / iq;
  il = iseed % iq;
  it = ia * il - ir * ih;
  if (it > 0) {
    iseed = it;
  } else {
    iseed = ic + it;
  }
  rc = ic;
  return iseed / rc;
}


x86 assembly (clang, -O0):
<ranf>:
push   %rbp
mov    %rsp,%rbp
movl   $0x41a7,-0x4(%rbp)
movl   $0x7fffffff,-0x8(%rbp)
movl   $0x1f31d,-0xc(%rbp)
movl   $0xb14,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%eax
mov    $0x1f31d,%ecx
cltd
idiv   %ecx
mov    %eax,-0x18(%rbp)
mov    0x2ea5(%rip),%rax
mov    (%rax),%eax
mov    $0x1f31d,%ecx
cltd
idiv   %ecx
mov    %edx,-0x14(%rbp)
imul   $0x41a7,-0x14(%rbp),%eax
imul   $0xb14,-0x18(%rbp),%ecx
sub    %ecx,%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jle    1176 <ranf+0x76>
mov    -0x1c(%rbp),%ecx
mov    0x2e71(%rip),%rax
mov    %ecx,(%rax)
jmp    1188 <ranf+0x88>
mov    -0x1c(%rbp),%ecx
add    $0x7fffffff,%ecx
mov    0x2e5a(%rip),%rax
mov    %ecx,(%rax)
movsd  0xe70(%rip),%xmm0
movsd  %xmm0,-0x28(%rbp)
mov    0x2e44(%rip),%rax
cvtsi2sdl (%rax),%xmm0
divsd  -0x28(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ranf>:
mov    0x2ed9(%rip),%rax
movslq (%rax),%rcx
imul   $0xffffffff834e0b5f,%rcx,%rdx
shr    $0x20,%rdx
add    %ecx,%edx
mov    %edx,%esi
shr    $0x1f,%esi
sar    $0x10,%edx
add    %esi,%edx
imul   $0x1f31d,%edx,%esi
sub    %esi,%ecx
imul   $0x41a7,%ecx,%ecx
imul   $0xfffff4ec,%edx,%edx
lea    (%rdx,%rcx,1),%esi
test   %esi,%esi
lea    0x7fffffff(%rdx,%rcx,1),%ecx
cmovg  %esi,%ecx
mov    %ecx,(%rax)
cvtsi2sd %ecx,%xmm0
divsd  0xeae(%rip),%xmm0
ret

LLVM IR (-O0):
@iseed = external global i32
define double @ranf() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca double
store i32 16807, i32* %1
store i32 2147483647, i32* %2
store i32 127773, i32* %3
store i32 2836, i32* %4
%9 = load i32, i32* @iseed
%10 = sdiv i32 %9, 127773
store i32 %10, i32* %6
%11 = load i32, i32* @iseed
%12 = srem i32 %11, 127773
store i32 %12, i32* %5
%13 = load i32, i32* %5
%14 = mul nsw i32 16807, %13
%15 = load i32, i32* %6
%16 = mul nsw i32 2836, %15
%17 = sub nsw i32 %14, %16
store i32 %17, i32* %7
%18 = load i32, i32* %7
%19 = icmp sgt i32 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %0
%21 = load i32, i32* %7
store i32 %21, i32* @iseed
br label %25
22: ; preds = %0
%23 = load i32, i32* %7
%24 = add nsw i32 2147483647, %23
store i32 %24, i32* @iseed
br label %25
25: ; preds = %22, %20
store double 0x41DFFFFFFFC00000, double* %8
%26 = load i32, i32* @iseed
%27 = sitofp i32 %26 to double
%28 = load double, double* %8
%29 = fdiv double %27, %28
ret double %29
}

LLVM IR (-O2):
@iseed = external global i32
define double @ranf() {
%1 = load i32, i32* @iseed
%2 = sdiv i32 %1, 127773
%3 = srem i32 %1, 127773
%4 = mul nsw i32 %3, 16807
%5 = mul nsw i32 %2, -2836
%6 = add i32 %5, %4
%7 = icmp sgt i32 %6, 0
%8 = add nsw i32 %6, 2147483647
%9 = select i1 %7, i32 %6, i32 %8
store i32 %9, i32* @iseed
%10 = sitofp i32 %9 to double
%11 = fdiv double %10, 0x41DFFFFFFFC00000
ret double %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int p3c(int c) {
  printf("\n***%c\n", c);
  return 0;
}


x86 assembly (clang, -O0):
<p3c>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p3c>:
push   %rax
mov    %edi,%esi
lea    0xee6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"\0A***%c\0A\00"
define i32 @p3c(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"\0A***%c\0A\00"
define i32 @p3c(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void onabort(void *dummy) {
  (void)dummy;
  exit(42);
}


x86 assembly (clang, -O0):
<onabort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x2a,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<onabort>:
push   %rax
mov    $0x2a,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @onabort(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @exit(i32 42)
unreachable
}

LLVM IR (-O2):
define void @onabort(i8* nocapture readnone %0) {
%2 = tail call i32 @exit(i32 42)
unreachable
}
void caller_1_2_2_2_2_2_2() {}


x86 assembly (clang, -O0):
<caller_1_2_2_2_2_2_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_1_2_2_2_2_2_2>:
ret

LLVM IR (-O0):
define void @caller_1_2_2_2_2_2_2() {
ret void
}

LLVM IR (-O2):
define void @caller_1_2_2_2_2_2_2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ warnx(char *);
void do_setcon(char *context) { warnx("No SELinux support built in"); }


x86 assembly (clang, -O0):
<do_setcon>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <warnx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_setcon>:
lea    0xee9(%rip),%rdi
jmp    1030 <warnx@plt>

LLVM IR (-O0):
@.str = [28 x i8] c"No SELinux support built in\00"
define void @do_setcon(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @warnx(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"No SELinux support built in\00"
define void @do_setcon(i8* nocapture readnone %0) {
%2 = tail call i32 @warnx(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
ret void
}
int sign(int x) { return x >> 31 | !!x; }


x86 assembly (clang, -O0):
<sign>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1f,%eax
cmpl   $0x0,-0x4(%rbp)
setne  %cl
xor    $0xff,%cl
xor    $0xff,%cl
and    $0x1,%cl
movzbl %cl,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sign>:
mov    %edi,%ecx
sar    $0x1f,%ecx
xor    %eax,%eax
test   %edi,%edi
setne  %al
or     %ecx,%eax
ret

LLVM IR (-O0):
define i32 @sign(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 31
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
%10 = or i32 %4, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @sign(i32 %0) {
%2 = ashr i32 %0, 31
%3 = icmp ne i32 %0, 0
%4 = zext i1 %3 to i32
%5 = or i32 %2, %4
ret i32 %5
}
/* Variables and functions */
void *malloc(size_t);
void *lsmash_malloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<lsmash_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsmash_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @lsmash_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @lsmash_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int /*<<< orphan*/ umask(int /*<<< orphan*/);
void umaskp(mode_t *u) { umask(*u); }


x86 assembly (clang, -O0):
<umaskp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <umask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<umaskp>:
mov    (%rdi),%edi
jmp    1030 <umask@plt>

LLVM IR (-O0):
define void @umaskp(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @umask(i32 %4)
ret void
}

LLVM IR (-O2):
define void @umaskp(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @umask(i32 %2)
ret void
}
/* Variables and functions */
bool is_utf8(char c) { return (c & 0xc0) != 0x80; }


x86 assembly (clang, -O0):
<is_utf8>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_utf8>:
and    $0xc0,%dil
xor    %eax,%eax
cmp    $0x80,%dil
setne  %al
ret

LLVM IR (-O0):
define i32 @is_utf8(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 192
%6 = icmp ne i32 %5, 128
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @is_utf8(i8 signext %0) {
%2 = and i8 %0, -64
%3 = icmp ne i8 %2, -128
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int handle_heat_common(int, int, char *, int);
int handle_heat(int devfd, int nodeid, char *arg) {
  return handle_heat_common(devfd, nodeid, arg, 1);
}


x86 assembly (clang, -O0):
<handle_heat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    $0x1,%ecx
call   1030 <handle_heat_common@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_heat>:
mov    $0x1,%ecx
jmp    1030 <handle_heat_common@plt>

LLVM IR (-O0):
define i32 @handle_heat(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @handle_heat_common(i32 %7, i32 %8, i8* %9, i32 1)
ret i32 %10
}

LLVM IR (-O2):
define i32 @handle_heat(i32 %0, i32 %1, i8* %2) {
%4 = tail call i32 @handle_heat_common(i32 %0, i32 %1, i8* %2, i32 1)
ret i32 %4
}
/* Type definitions */
struct pcm {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pcm_mmap_appl_forward(struct pcm *, unsigned int);
int /*<<< orphan*/ pcm_sync_ptr(struct pcm *, int /*<<< orphan*/);
int pcm_mmap_commit(struct pcm *pcm, unsigned int offset, unsigned int frames) {
  pcm_mmap_appl_forward(pcm, frames);
  pcm_sync_ptr(pcm, 0);
  return frames;
}


x86 assembly (clang, -O0):
<pcm_mmap_commit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1030 <pcm_mmap_appl_forward@plt>
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1040 <pcm_sync_ptr@plt>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcm_mmap_commit>:
push   %rbp
push   %rbx
push   %rax
mov    %edx,%ebp
mov    %rdi,%rbx
mov    %edx,%esi
call   1030 <pcm_mmap_appl_forward@plt>
mov    %rbx,%rdi
xor    %esi,%esi
call   1040 <pcm_sync_ptr@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.pcm = type { i32 }
define i32 @pcm_mmap_commit(%struct.pcm* %0, i32 %1, i32 %2) {
%4 = alloca %struct.pcm*
%5 = alloca i32
%6 = alloca i32
store %struct.pcm* %0, %struct.pcm** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.pcm*, %struct.pcm** %4
%8 = load i32, i32* %6
%9 = call i32 @pcm_mmap_appl_forward(%struct.pcm* %7, i32 %8)
%10 = load %struct.pcm*, %struct.pcm** %4
%11 = call i32 @pcm_sync_ptr(%struct.pcm* %10, i32 0)
%12 = load i32, i32* %6
ret i32 %12
}

LLVM IR (-O2):
%struct.pcm = type { i32 }
define i32 @pcm_mmap_commit(%struct.pcm* %0, i32 %1, i32 returned %2) {
%4 = tail call i32 @pcm_mmap_appl_forward(%struct.pcm* %0, i32 %2)
%5 = tail call i32 @pcm_sync_ptr(%struct.pcm* %0, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ atol(char *);
int /*<<< orphan*/ exit(int);
int press(int /*<<< orphan*/);
int /*<<< orphan*/ usage();
int main(int argc, char *argv[]) {
  if (argc != 1 + 1) {
    usage();
    exit(7);
  }
  return -press(atol(argv[1]));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x2,-0x8(%rbp)
je     1171 <main+0x31>
mov    $0x0,%al
call   1040 <usage@plt>
mov    $0x7,%edi
call   1060 <exit@plt>
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1050 <atol@plt>
mov    %eax,%edi
call   1030 <press@plt>
mov    %eax,%ecx
xor    %eax,%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x2,%edi
jne    115a <main+0x1a>
mov    0x8(%rsi),%rdi
call   1050 <atol@plt>
mov    %eax,%edi
call   1030 <press@plt>
neg    %eax
pop    %rcx
ret
xor    %eax,%eax
call   1040 <usage@plt>
mov    $0x7,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 2
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = call i32 (...) @usage()
%10 = call i32 @exit(i32 7)
unreachable
11: ; preds = %2
%12 = load i8**, i8*** %5
%13 = getelementptr inbounds i8*, i8** %12, i64 1
%14 = load i8*, i8** %13
%15 = call i32 @atol(i8* %14)
%16 = call i32 @press(i32 %15)
%17 = sub nsw i32 0, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = icmp eq i32 %0, 2
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32 (...) @usage()
%6 = tail call i32 @exit(i32 7)
unreachable
7: ; preds = %2
%8 = getelementptr inbounds i8*, i8** %1, i64 1
%9 = load i8*, i8** %8
%10 = tail call i32 @atol(i8* %9)
%11 = tail call i32 @press(i32 %10)
%12 = sub nsw i32 0, %11
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void func1(void) { printf("Hello from func1.c\n"); }


x86 assembly (clang, -O0):
<func1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<func1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [20 x i8] c"Hello from func1.c\0A\00"
define void @func1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [19 x i8] c"Hello from func1.c\00"
define void @func1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int bit_scan(unsigned int const);
void transform(const unsigned int *ns_array, int *board_array, int size) {
  int i;
  for (i = 0; i < size; i++) {
    board_array[i] = bit_scan(ns_array[i]);
  }
}


x86 assembly (clang, -O0):
<transform>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
movl   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1161 <transform+0x51>
mov    -0x8(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    (%rax,%rcx,4),%edi
call   1030 <bit_scan@plt>
mov    %eax,%edx
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
jmp    112a <transform+0x1a>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<transform>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edx,%edx
jle    1146 <transform+0x36>
mov    %rsi,%r14
mov    %rdi,%r15
mov    %edx,%r12d
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%edi
call   1030 <bit_scan@plt>
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <transform+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @transform(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %23, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %26
12: ; preds = %8
%13 = load i32*, i32** %4
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = call i32 @bit_scan(i32 %17)
%19 = load i32*, i32** %5
%20 = load i32, i32* %7
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %19, i64 %21
store i32 %18, i32* %22
br label %23
23: ; preds = %12
%24 = load i32, i32* %7
%25 = add nsw i32 %24, 1
store i32 %25, i32* %7
br label %8
26: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @transform(i32* nocapture %0, i32* nocapture writeonly %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %15
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %7
%8 = phi i64 [ 0, %5 ], [ %13, %7 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = tail call i32 @bit_scan(i32 %10)
%12 = getelementptr inbounds i32, i32* %1, i64 %8
store i32 %11, i32* %12
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %15, label %7
15: ; preds = %7, %3
ret void
}