xunge/DecIR huggingface dataset:
/* Variables and functions */
int equeue_tickdiff(unsigned int, unsigned int);
int equeue_clampdiff(unsigned a, unsigned b) {
  int diff = equeue_tickdiff(a, b);
  return ~(diff >> (8 * sizeof(int) - 1)) & diff;
}


x86 assembly (clang, -O0):
<equeue_clampdiff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <equeue_tickdiff@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x1f,%eax
xor    $0xffffffff,%eax
and    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<equeue_clampdiff>:
push   %rax
call   1030 <equeue_tickdiff@plt>
xor    %ecx,%ecx
test   %eax,%eax
cmovs  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @equeue_clampdiff(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @equeue_tickdiff(i32 %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = ashr i32 %9, 31
%11 = xor i32 %10, -1
%12 = load i32, i32* %5
%13 = and i32 %11, %12
ret i32 %13
}

LLVM IR (-O2):
define i32 @equeue_clampdiff(i32 %0, i32 %1) {
%3 = tail call i32 @equeue_tickdiff(i32 %0, i32 %1)
%4 = icmp sgt i32 %3, 0
%5 = select i1 %4, i32 %3, i32 0
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("System doesn't have required mempolicy support\n");
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [48 x i8] c"System doesn't have required mempolicy support\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@str = [47 x i8] c"System doesn't have required mempolicy support\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([47 x i8], [47 x i8]* @str, i64 0, i64 0))
ret i32 1
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long root;
};
typedef TYPE_1__ XCrossingEvent;

/* Variables and functions */
void set_XCrossingEvent_root(void *_p, unsigned long _v) {
  ((XCrossingEvent *)_p)->root = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XCrossingEvent_root>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XCrossingEvent_root>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XCrossingEvent_root(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XCrossingEvent_root(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
unsigned char sd_raw_locked() { return (0) == 0x00; }


x86 assembly (clang, -O0):
<sd_raw_locked>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_raw_locked>:
mov    $0x1,%al
ret

LLVM IR (-O0):
define zeroext i8 @sd_raw_locked() {
ret i8 1
}

LLVM IR (-O2):
define zeroext i8 @sd_raw_locked() {
ret i8 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void beAlive() { printf("It's alive!\n"); }


x86 assembly (clang, -O0):
<beAlive>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<beAlive>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"It's alive!\0A\00"
define void @beAlive() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"It's alive!\00"
define void @beAlive() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
float bound(float num, float max) {
  if (num > max)
    return max;
  else if (num < -max)
    return -max;
  else
    return num;
}


x86 assembly (clang, -O0):
<bound>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    112c <bound+0x2c>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1172 <bound+0x72>
movss  -0x8(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
ucomiss %xmm1,%xmm0
jbe    1168 <bound+0x68>
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1172 <bound+0x72>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bound>:
movaps 0xef9(%rip),%xmm3
xorps  %xmm1,%xmm3
maxss  %xmm0,%xmm3
movaps %xmm1,%xmm2
cmpltss %xmm0,%xmm2
movaps %xmm2,%xmm0
andnps %xmm3,%xmm0
andps  %xmm1,%xmm2
orps   %xmm0,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @bound(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %4
store float %1, float* %5
%6 = load float, float* %4
%7 = load float, float* %5
%8 = fcmp ogt float %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load float, float* %5
store float %10, float* %3
br label %21
11: ; preds = %2
%12 = load float, float* %4
%13 = load float, float* %5
%14 = fneg float %13
%15 = fcmp olt float %12, %14
br i1 %15, label %16, label %19
16: ; preds = %11
%17 = load float, float* %5
%18 = fneg float %17
store float %18, float* %3
br label %21
19: ; preds = %11
%20 = load float, float* %4
store float %20, float* %3
br label %21
21: ; preds = %19, %16, %9
%22 = load float, float* %3
ret float %22
}

LLVM IR (-O2):
define float @bound(float %0, float %1) {
%3 = fcmp ogt float %0, %1
%4 = fneg float %1
%5 = fcmp ogt float %4, %0
%6 = select i1 %5, float %4, float %0
%7 = select i1 %3, float %1, float %6
ret float %7
}
void __attribute__((no))
foo(const char *x __attribute__((unused)),
    __complex__ long double y __attribute__((unused)),
    __complex__ long double z __attribute__((unused))) {}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
ret

LLVM IR (-O0):
define void @foo(i8* %0, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %1, { x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %2) {
%4 = alloca i8*
store i8* %0, i8** %4
ret void
}

LLVM IR (-O2):
define void @foo(i8* nocapture %0, { x86_fp80, x86_fp80 }* nocapture byval({ x86_fp80, x86_fp80 }) align 16 %1, { x86_fp80, x86_fp80 }* nocapture byval({ x86_fp80, x86_fp80 }) align 16 %2) {
ret void
}
/* Variables and functions */
void *memmove(void *dest __attribute__((unused)),
              const void *src __attribute__((unused)),
              unsigned int n __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<memmove>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memmove>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @memmove(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @memmove(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i8* null
}
/* Type definitions */
typedef double int64_t;

/* Variables and functions */
double diff_sec(int64_t ns_start, int64_t ns_end) {
  return (ns_end - ns_start) / 1000000000.0;
}


x86 assembly (clang, -O0):
<diff_sec>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  0xee0(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<diff_sec>:
subsd  %xmm0,%xmm1
divsd  0xef4(%rip),%xmm1
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @diff_sec(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %4
%6 = load double, double* %3
%7 = fsub double %5, %6
%8 = fdiv double %7, 1.000000e+09
ret double %8
}

LLVM IR (-O2):
define double @diff_sec(double %0, double %1) {
%3 = fsub double %1, %0
%4 = fdiv double %3, 1.000000e+09
ret double %4
}
void XFetchName() {}


x86 assembly (clang, -O0):
<XFetchName>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XFetchName>:
ret

LLVM IR (-O0):
define void @XFetchName() {
ret void
}

LLVM IR (-O2):
define void @XFetchName() {
ret void
}
/* Type definitions */
struct wl_region {
  int dummy;
};
struct wl_proxy {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ wl_proxy_marshal(struct wl_proxy *, int, int /*<<< orphan*/,
                                    int /*<<< orphan*/, int /*<<< orphan*/,
                                    int /*<<< orphan*/);
void wl_region_subtract(struct wl_region *wl_region, int32_t x, int32_t y,
                        int32_t width, int32_t height) {
  wl_proxy_marshal((struct wl_proxy *)wl_region, 2, x, y, width, height);
}


x86 assembly (clang, -O0):
<wl_region_subtract>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x18(%rbp),%r9d
mov    $0x2,%esi
call   1030 <wl_proxy_marshal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wl_region_subtract>:
mov    %r8d,%r9d
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    $0x2,%esi
jmp    1030 <wl_proxy_marshal@plt>

LLVM IR (-O0):
%struct.wl_region = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_region_subtract(%struct.wl_region* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.wl_region*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store %struct.wl_region* %0, %struct.wl_region** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load %struct.wl_region*, %struct.wl_region** %6
%12 = bitcast %struct.wl_region* %11 to %struct.wl_proxy*
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i32, i32* %10
%17 = call i32 @wl_proxy_marshal(%struct.wl_proxy* %12, i32 2, i32 %13, i32 %14, i32 %15, i32 %16)
ret void
}

LLVM IR (-O2):
%struct.wl_region = type { i32 }
%struct.wl_proxy = type { i32 }
define void @wl_region_subtract(%struct.wl_region* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = bitcast %struct.wl_region* %0 to %struct.wl_proxy*
%7 = tail call i32 @wl_proxy_marshal(%struct.wl_proxy* %6, i32 2, i32 %1, i32 %2, i32 %3, i32 %4)
ret void
}
char *ptr_fn(char *s) { return s; }


x86 assembly (clang, -O0):
<ptr_fn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr_fn>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @ptr_fn(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @ptr_fn(i8* readnone returned %0) {
ret i8* %0
}
void DMTimerPreScalerClkEnable(unsigned int baseAdd, unsigned int ptv) {
  (*((volatile unsigned int *)(baseAdd + (0x38)))) &= ~(0x0000001Cu);
  (*((volatile unsigned int *)(baseAdd + (0x38)))) |=
      (ptv & ((0x0000001Cu) | (0x00000020u)));
}


x86 assembly (clang, -O0):
<DMTimerPreScalerClkEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x38,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xffffffe3,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
and    $0x3c,%edx
mov    -0x4(%rbp),%eax
add    $0x38,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DMTimerPreScalerClkEnable>:
add    $0x38,%edi
andl   $0xffffffe3,(%rdi)
and    $0x3c,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @DMTimerPreScalerClkEnable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 56
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -29
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = and i32 %11, 60
%13 = load i32, i32* %3
%14 = add i32 %13, 56
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
%17 = load volatile i32, i32* %16
%18 = or i32 %17, %12
store volatile i32 %18, i32* %16
ret void
}

LLVM IR (-O2):
define void @DMTimerPreScalerClkEnable(i32 %0, i32 %1) {
%3 = add i32 %0, 56
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -29
store volatile i32 %7, i32* %5
%8 = and i32 %1, 60
%9 = load volatile i32, i32* %5
%10 = or i32 %9, %8
store volatile i32 %10, i32* %5
ret void
}
outio() {}


x86 assembly (clang, -O0):
<outio>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<outio>:
ret

LLVM IR (-O0):
define i32 @outio() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @outio() {
ret i32 undef
}
int minInt(const int a, const int b) {
  if (b < a)
    return b;
  return a;
}


x86 assembly (clang, -O0):
<minInt>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1121 <minInt+0x21>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <minInt+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<minInt>:
mov    %edi,%eax
cmp    %edi,%esi
cmovl  %esi,%eax
ret

LLVM IR (-O0):
define i32 @minInt(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = load i32, i32* %4
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %5
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %4
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @minInt(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, %0
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void nova_clear_screen() { printf("\033[2J\033[1;1H"); }


x86 assembly (clang, -O0):
<nova_clear_screen>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nova_clear_screen>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [11 x i8] c"\1B[2J\1B[1;1H\00"
define void @nova_clear_screen() {
%1 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"\1B[2J\1B[1;1H\00"
define void @nova_clear_screen() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int strlen(char *);
void ungets(char s[]) {
  int len = strlen(s);
  void ungetch(int);
  while (len > 0)
    ungetch(s[--len]);
}


x86 assembly (clang, -O0):
<ungets>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1160 <ungets+0x40>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0xc(%rbp)
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%edi
call   1040 <ungetch@plt>
jmp    1138 <ungets+0x18>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ungets>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <strlen@plt>
test   %eax,%eax
jle    1157 <ungets+0x37>
mov    %eax,%ebx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
lea    -0x2(%rbx),%eax
movsbl (%r14,%rax,1),%edi
call   1040 <ungetch@plt>
add    $0xffffffffffffffff,%rbx
cmp    $0x1,%rbx
ja     1140 <ungets+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @ungets(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
br label %6
6: ; preds = %9, %1
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %6
%10 = load i8*, i8** %2
%11 = load i32, i32* %3
%12 = add nsw i32 %11, -1
store i32 %12, i32* %3
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %10, i64 %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
br label %6
17: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @ungets(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %14
4: ; preds = %1
%5 = zext i32 %2 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %8, %6 ]
%8 = add nsw i64 %7, -1
%9 = and i64 %8, 4294967295
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
tail call void @ungetch(i32 %12)
%13 = icmp ugt i64 %7, 1
br i1 %13, label %6, label %14
14: ; preds = %6, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ wiznetRegReadIP(int /*<<< orphan*/, int,
                                   int /*<<< orphan*/ *);
void wiznetGetSocketDestIP(uint8_t socket, uint8_t *dIP) {
  wiznetRegReadIP(socket, (0x0000 + 0x000C), dIP);
}


x86 assembly (clang, -O0):
<wiznetGetSocketDestIP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    $0xc,%esi
call   1030 <wiznetRegReadIP@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wiznetGetSocketDestIP>:
mov    %rsi,%rdx
mov    $0xc,%esi
jmp    1030 <wiznetRegReadIP@plt>

LLVM IR (-O0):
define void @wiznetGetSocketDestIP(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @wiznetRegReadIP(i32 %5, i32 12, i32* %6)
ret void
}

LLVM IR (-O2):
define void @wiznetGetSocketDestIP(i32 %0, i32* %1) {
%3 = tail call i32 @wiznetRegReadIP(i32 %0, i32 12, i32* %1)
ret void
}
float Read4dBuf(float *buf, int ix, int iy, int numy, int iz, int numz, int is,
                int nums) {
  int offset;
  offset = nums * numz * numy * ix + nums * numz * iy + nums * iz + is;
  return buf[offset];
}


x86 assembly (clang, -O0):
<Read4dBuf>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    0x18(%rbp),%eax
imul   -0x1c(%rbp),%eax
imul   -0x14(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    0x18(%rbp),%ecx
imul   -0x1c(%rbp),%ecx
imul   -0x10(%rbp),%ecx
add    %ecx,%eax
mov    0x18(%rbp),%ecx
imul   -0x18(%rbp),%ecx
add    %ecx,%eax
add    0x10(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x20(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Read4dBuf>:
imul   %ecx,%esi
add    %edx,%esi
imul   %r9d,%esi
add    %r8d,%esi
imul   0x10(%rsp),%esi
add    0x8(%rsp),%esi
movslq %esi,%rax
movss  (%rdi,%rax,4),%xmm0
ret

LLVM IR (-O0):
define float @Read4dBuf(float* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = alloca float*
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
store float* %0, float** %9
store i32 %1, i32* %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i32 %6, i32* %15
store i32 %7, i32* %16
%18 = load i32, i32* %16
%19 = load i32, i32* %14
%20 = mul nsw i32 %18, %19
%21 = load i32, i32* %12
%22 = mul nsw i32 %20, %21
%23 = load i32, i32* %10
%24 = mul nsw i32 %22, %23
%25 = load i32, i32* %16
%26 = load i32, i32* %14
%27 = mul nsw i32 %25, %26
%28 = load i32, i32* %11
%29 = mul nsw i32 %27, %28
%30 = add nsw i32 %24, %29
%31 = load i32, i32* %16
%32 = load i32, i32* %13
%33 = mul nsw i32 %31, %32
%34 = add nsw i32 %30, %33
%35 = load i32, i32* %15
%36 = add nsw i32 %34, %35
store i32 %36, i32* %17
%37 = load float*, float** %9
%38 = load i32, i32* %17
%39 = sext i32 %38 to i64
%40 = getelementptr inbounds float, float* %37, i64 %39
%41 = load float, float* %40
ret float %41
}

LLVM IR (-O2):
define float @Read4dBuf(float* nocapture %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = mul i32 %3, %1
%10 = add i32 %9, %2
%11 = mul i32 %10, %5
%12 = add i32 %11, %4
%13 = mul i32 %12, %7
%14 = add i32 %13, %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds float, float* %0, i64 %15
%17 = load float, float* %16
ret float %17
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRCORE_N16_swap(char *, int, int);
void U_WMROFFSETVIEWPORTORG_swap(char *record, int torev) {
  U_WMRCORE_N16_swap(record, 2, torev);
}


x86 assembly (clang, -O0):
<U_WMROFFSETVIEWPORTORG_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    $0x2,%esi
call   1030 <U_WMRCORE_N16_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMROFFSETVIEWPORTORG_swap>:
mov    %esi,%edx
mov    $0x2,%esi
jmp    1030 <U_WMRCORE_N16_swap@plt>

LLVM IR (-O0):
define void @U_WMROFFSETVIEWPORTORG_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRCORE_N16_swap(i8* %5, i32 2, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMROFFSETVIEWPORTORG_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRCORE_N16_swap(i8* %0, i32 2, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usageMpr() {
  printf("Usage Mpr (Client Impression):\n./mpr -P imprimante fichier "
         "tubeClient\n");
}


x86 assembly (clang, -O0):
<usageMpr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usageMpr>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [71 x i8] c"Usage Mpr (Client Impression):\0A./mpr -P imprimante fichier tubeClient\0A\00"
define void @usageMpr() {
%1 = call i32 @printf(i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [70 x i8] c"Usage Mpr (Client Impression):\0A./mpr -P imprimante fichier tubeClient\00"
define void @usageMpr() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([70 x i8], [70 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ merge_rec(int *, int, int);
void merge_sort_rec(int *arr, int n) {
  if (n < 2)
    return;
  int m = n / 2;
  merge_sort_rec(arr, m);
  merge_sort_rec(arr + m, n - m);
  merge_rec(arr, n, m);
}


x86 assembly (clang, -O0):
<merge_sort_rec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x2,-0xc(%rbp)
jge    113e <merge_sort_rec+0x1e>
jmp    1181 <merge_sort_rec+0x61>
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1030 <merge_sort_rec@plt>
mov    -0x8(%rbp),%rdi
movslq -0x10(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rdi
mov    -0xc(%rbp),%esi
sub    -0x10(%rbp),%esi
call   1030 <merge_sort_rec@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1040 <merge_rec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<merge_sort_rec>:
cmp    $0x1,%esi
jg     1126 <merge_sort_rec+0x6>
ret
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%r14
mov    %esi,%ebx
shr    %ebx
mov    %ebx,%esi
call   1030 <merge_sort_rec@plt>
lea    (%r14,%rbx,4),%rdi
mov    %ebp,%esi
sub    %ebx,%esi
call   1030 <merge_sort_rec@plt>
mov    %r14,%rdi
mov    %ebp,%esi
mov    %ebx,%edx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <merge_rec@plt>

LLVM IR (-O0):
define void @merge_sort_rec(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %2
br label %25
9: ; preds = %2
%10 = load i32, i32* %4
%11 = sdiv i32 %10, 2
store i32 %11, i32* %5
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = load i32*, i32** %3
%15 = load i32, i32* %5
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %4
%19 = load i32, i32* %5
%20 = sub nsw i32 %18, %19
%21 = load i32*, i32** %3
%22 = load i32, i32* %4
%23 = load i32, i32* %5
%24 = call i32 @merge_rec(i32* %21, i32 %22, i32 %23)
br label %25
25: ; preds = %9, %8
ret void
}

LLVM IR (-O2):
define void @merge_sort_rec(i32* %0, i32 %1) {
%3 = icmp slt i32 %1, 2
br i1 %3, label %4, label %5
4: ; preds = %2, %5
ret void
5: ; preds = %2
%6 = lshr i32 %1, 1
tail call void @merge_sort_rec(i32* %0, i32 %6)
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = sub nsw i32 %1, %6
tail call void @merge_sort_rec(i32* %8, i32 %9)
%10 = tail call i32 @merge_rec(i32* %0, i32 %1, i32 %6)
br label %4
}
void ff_hevc_put_hevc_uni_w_epel_hv4_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_hv4_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_hv4_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_hv4_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_hv4_8_sse4() {
ret void
}
void GPMCDevPageLenSet(unsigned int baseAddr, unsigned int csNum,
                       unsigned int pageLen) {
  (*((volatile unsigned int *)(baseAddr + (0x60 + (csNum * (0x30)))))) &=
      ~(0x01800000u);
  (*((volatile unsigned int *)(baseAddr + (0x60 + (csNum * (0x30)))))) |=
      ((pageLen << (0x00000017u)) & (0x01800000u));
}


x86 assembly (clang, -O0):
<GPMCDevPageLenSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   $0x30,-0x8(%rbp),%ecx
add    $0x60,%ecx
add    %ecx,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xfe7fffff,%ecx
mov    %ecx,(%rax)
mov    -0xc(%rbp),%edx
shl    $0x17,%edx
and    $0x1800000,%edx
mov    -0x4(%rbp),%eax
imul   $0x30,-0x8(%rbp),%ecx
add    $0x60,%ecx
add    %ecx,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPMCDevPageLenSet>:
lea    (%rsi,%rsi,2),%eax
shl    $0x4,%eax
add    %edi,%eax
add    $0x60,%eax
andl   $0xfe7fffff,(%rax)
and    $0x3,%edx
shl    $0x17,%edx
or     %edx,(%rax)
ret

LLVM IR (-O0):
define void @GPMCDevPageLenSet(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = mul i32 %8, 48
%10 = add i32 96, %9
%11 = add i32 %7, %10
%12 = zext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
%14 = load volatile i32, i32* %13
%15 = and i32 %14, -25165825
store volatile i32 %15, i32* %13
%16 = load i32, i32* %6
%17 = shl i32 %16, 23
%18 = and i32 %17, 25165824
%19 = load i32, i32* %4
%20 = load i32, i32* %5
%21 = mul i32 %20, 48
%22 = add i32 96, %21
%23 = add i32 %19, %22
%24 = zext i32 %23 to i64
%25 = inttoptr i64 %24 to i32*
%26 = load volatile i32, i32* %25
%27 = or i32 %26, %18
store volatile i32 %27, i32* %25
ret void
}

LLVM IR (-O2):
define void @GPMCDevPageLenSet(i32 %0, i32 %1, i32 %2) {
%4 = mul i32 %1, 48
%5 = add i32 %0, 96
%6 = add i32 %5, %4
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -25165825
store volatile i32 %10, i32* %8
%11 = shl i32 %2, 23
%12 = and i32 %11, 25165824
%13 = load volatile i32, i32* %8
%14 = or i32 %13, %12
store volatile i32 %14, i32* %8
ret void
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ isdigit(char);
size_t strlen(char *);
int read_value(char *line) {
  size_t len;
  while (!isdigit(*line))
    line++;
  len = strlen(line);
  line[len - 3] = '\0';
  return atoi(line);
}


x86 assembly (clang, -O0):
<read_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    115d <read_value+0x2d>
jmp    116e <read_value+0x3e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    113c <read_value+0xc>
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x3,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rdi
call   1050 <atoi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_value>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isdigit@plt>
test   %eax,%eax
je     1140 <read_value+0x10>
mov    %rbx,%rdi
call   1040 <strlen@plt>
movb   $0x0,-0x3(%rax,%rbx,1)
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <atoi@plt>

LLVM IR (-O0):
define i32 @read_value(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
br label %4
4: ; preds = %10, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = call i32 @isdigit(i8 signext %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
br label %4
13: ; preds = %4
%14 = load i8*, i8** %2
%15 = call i64 @strlen(i8* %14)
store i64 %15, i64* %3
%16 = load i8*, i8** %2
%17 = load i64, i64* %3
%18 = sub i64 %17, 3
%19 = getelementptr inbounds i8, i8* %16, i64 %18
store i8 0, i8* %19
%20 = load i8*, i8** %2
%21 = call i32 @atoi(i8* %20)
ret i32 %21
}

LLVM IR (-O2):
define i32 @read_value(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i32 @isdigit(i8 signext %4)
%6 = icmp eq i32 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %2, label %8
8: ; preds = %2
%9 = tail call i64 @strlen(i8* %3)
%10 = add i64 %9, -3
%11 = getelementptr inbounds i8, i8* %3, i64 %10
store i8 0, i8* %11
%12 = tail call i32 @atoi(i8* %3)
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ kernel_clear_screen(char *);
int /*<<< orphan*/ kernel_puts(char *, char const *, int);
void kmain(void) {
  const char *str = "welcome to the kernel";
  char *vidptr = (char *)0xb8000;
  unsigned int i = 0;
  kernel_clear_screen(vidptr);
  kernel_puts(vidptr, str, 0x07);
  kernel_puts(vidptr, str, 0x04);
  return;
}


x86 assembly (clang, -O0):
<kmain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    $0xb8000,%eax
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <kernel_clear_screen@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x7,%edx
call   1040 <kernel_puts@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1040 <kernel_puts@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<kmain>:
push   %rbx
mov    $0xb8000,%edi
call   1030 <kernel_clear_screen@plt>
lea    0xece(%rip),%rbx
mov    $0xb8000,%edi
mov    %rbx,%rsi
mov    $0x7,%edx
call   1040 <kernel_puts@plt>
mov    $0xb8000,%edi
mov    %rbx,%rsi
mov    $0x4,%edx
pop    %rbx
jmp    1040 <kernel_puts@plt>

LLVM IR (-O0):
@.str = [22 x i8] c"welcome to the kernel\00"
define void @kmain() {
%1 = alloca i8*
%2 = alloca i8*
%3 = alloca i32
store i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* inttoptr (i64 753664 to i8*), i8** %2
store i32 0, i32* %3
%4 = load i8*, i8** %2
%5 = call i32 @kernel_clear_screen(i8* %4)
%6 = load i8*, i8** %2
%7 = load i8*, i8** %1
%8 = call i32 @kernel_puts(i8* %6, i8* %7, i32 7)
%9 = load i8*, i8** %2
%10 = load i8*, i8** %1
%11 = call i32 @kernel_puts(i8* %9, i8* %10, i32 4)
ret void
}

LLVM IR (-O2):
@.str = [22 x i8] c"welcome to the kernel\00"
define void @kmain() {
%1 = tail call i32 @kernel_clear_screen(i8* inttoptr (i64 753664 to i8*))
%2 = tail call i32 @kernel_puts(i8* inttoptr (i64 753664 to i8*), i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 7)
%3 = tail call i32 @kernel_puts(i8* inttoptr (i64 753664 to i8*), i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i32 4)
ret void
}
void RTErrGet(void) {}


x86 assembly (clang, -O0):
<RTErrGet>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTErrGet>:
ret

LLVM IR (-O0):
define void @RTErrGet() {
ret void
}

LLVM IR (-O2):
define void @RTErrGet() {
ret void
}
/* Type definitions */
struct sockaddr_in {
  int dummy;
};
struct sockaddr {
  int dummy;
};
typedef int /*<<< orphan*/ caller;

/* Variables and functions */
int accept(int, struct sockaddr *, unsigned int *);
int accept_connection(int s) {
  struct sockaddr_in caller;
  unsigned int length = sizeof(caller);
  int msgsock = accept(s, (struct sockaddr *)&caller, &length);
  return msgsock;
}


x86 assembly (clang, -O0):
<accept_connection>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x4,-0xc(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1030 <accept@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<accept_connection>:
sub    $0x18,%rsp
movl   $0x4,0xc(%rsp)
lea    0x10(%rsp),%rsi
lea    0xc(%rsp),%rdx
call   1030 <accept@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @accept_connection(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.sockaddr_in
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
store i32 4, i32* %4
%6 = load i32, i32* %2
%7 = bitcast %struct.sockaddr_in* %3 to %struct.sockaddr*
%8 = call i32 @accept(i32 %6, %struct.sockaddr* %7, i32* %4)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @accept_connection(i32 %0) {
%2 = alloca %struct.sockaddr_in
%3 = alloca i32
%4 = bitcast %struct.sockaddr_in* %2 to i8*
%5 = bitcast i32* %3 to i8*
store i32 4, i32* %3
%6 = bitcast %struct.sockaddr_in* %2 to %struct.sockaddr*
%7 = call i32 @accept(i32 %0, %struct.sockaddr* %6, i32* %3)
ret i32 %7
}
/* Variables and functions */
int read(int, char *, int);
int irc_read(int socketfd, char *in) {
  int n;
  n = read(socketfd, in, 43008);
  return n;
}


x86 assembly (clang, -O0):
<irc_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0xa800,%edx
call   1030 <read@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_read>:
mov    $0xa800,%edx
jmp    1030 <read@plt>

LLVM IR (-O0):
define i32 @irc_read(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i32, i32* %3
%7 = load i8*, i8** %4
%8 = call i32 @read(i32 %6, i8* %7, i32 43008)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @irc_read(i32 %0, i8* nocapture %1) {
%3 = tail call i32 @read(i32 %0, i8* %1, i32 43008)
ret i32 %3
}
/* Type definitions */
typedef int u_int8_t;
typedef scalar_t__ sig_t;

/* Variables and functions */
int /*<<< orphan*/ SIGTTIN;
scalar_t__ SIG_ERR;
int /*<<< orphan*/ SIG_IGN;
scalar_t__ signal(int /*<<< orphan*/, int /*<<< orphan*/);
u_int8_t __ignore_background_tty_reads() {
  sig_t prev_val;
  prev_val = signal(SIGTTIN, SIG_IGN);
  return (prev_val == SIG_ERR);
}


x86 assembly (clang, -O0):
<__ignore_background_tty_reads>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2e92(%rip),%rcx
cmp    (%rcx),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ignore_background_tty_reads>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
mov    0x2ebf(%rip),%rax
mov    (%rax),%esi
call   1030 <signal@plt>
mov    0x2ea1(%rip),%rdx
xor    %ecx,%ecx
cmp    (%rdx),%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@SIGTTIN = global i32 0
@SIG_IGN = global i32 0
@SIG_ERR = global i64 0
define i32 @__ignore_background_tty_reads() {
%1 = alloca i64
%2 = load i32, i32* @SIGTTIN
%3 = load i32, i32* @SIG_IGN
%4 = call i64 @signal(i32 %2, i32 %3)
store i64 %4, i64* %1
%5 = load i64, i64* %1
%6 = load i64, i64* @SIG_ERR
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
@SIGTTIN = global i32 0
@SIG_IGN = global i32 0
@SIG_ERR = global i64 0
define i32 @__ignore_background_tty_reads() {
%1 = load i32, i32* @SIGTTIN
%2 = load i32, i32* @SIG_IGN
%3 = tail call i64 @signal(i32 %1, i32 %2)
%4 = load i64, i64* @SIG_ERR
%5 = icmp eq i64 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
long long g(int n) {
  if (n == 0) {
    return 0;
  }
  return n - g(g(n - 1));
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1132 <g+0x22>
movq   $0x0,-0x8(%rbp)
jmp    115a <g+0x4a>
movslq -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%edi
sub    $0x1,%edi
call   1030 <g@plt>
mov    %eax,%edi
call   1030 <g@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
push   %rbx
test   %edi,%edi
je     112c <g+0x1c>
movslq %edi,%rbx
add    $0xffffffff,%edi
call   1030 <g@plt>
mov    %eax,%edi
call   1030 <g@plt>
sub    %rax,%rbx
jmp    112e <g+0x1e>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @g(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %16
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 1
%12 = call i64 @g(i32 %11)
%13 = trunc i64 %12 to i32
%14 = call i64 @g(i32 %13)
%15 = sub nsw i64 %9, %14
store i64 %15, i64* %2
br label %16
16: ; preds = %7, %6
%17 = load i64, i64* %2
ret i64 %17
}

LLVM IR (-O2):
define i64 @g(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1, %5
%4 = phi i64 [ %11, %5 ], [ 0, %1 ]
ret i64 %4
5: ; preds = %1
%6 = sext i32 %0 to i64
%7 = add nsw i32 %0, -1
%8 = tail call i64 @g(i32 %7)
%9 = trunc i64 %8 to i32
%10 = tail call i64 @g(i32 %9)
%11 = sub nsw i64 %6, %10
br label %3
}
float testf(float x, int sel1, int sel2) {
  float input = sel1 ? -x : x + 1;
  if (sel2)
    return __builtin_cosf(input);
  else
    return __builtin_coshf(input);
}


x86 assembly (clang, -O0):
<testf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1159 <testf+0x39>
movss  -0x8(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x18(%rbp)
jmp    116b <testf+0x4b>
movss  0xe9f(%rip),%xmm0
addss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x18(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     1193 <testf+0x73>
movss  -0x14(%rbp),%xmm0
call   1040 <cosf@plt>
movss  %xmm0,-0x4(%rbp)
jmp    11a2 <testf+0x82>
movss  -0x14(%rbp),%xmm0
call   1030 <coshf@plt>
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testf>:
test   %edi,%edi
je     1134 <testf+0x14>
xorps  0xed5(%rip),%xmm0
test   %esi,%esi
je     1140 <testf+0x20>
jmp    1040 <cosf@plt>
addss  0xed4(%rip),%xmm0
test   %esi,%esi
jne    112f <testf+0xf>
jmp    1030 <coshf@plt>

LLVM IR (-O0):
define float @testf(float %0, i32 %1, i32 %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca i32
%7 = alloca i32
%8 = alloca float
store float %0, float* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %6
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %3
%12 = load float, float* %5
%13 = fneg float %12
br label %17
14: ; preds = %3
%15 = load float, float* %5
%16 = fadd float %15, 1.000000e+00
br label %17
17: ; preds = %14, %11
%18 = phi float [ %13, %11 ], [ %16, %14 ]
store float %18, float* %8
%19 = load i32, i32* %7
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %24
21: ; preds = %17
%22 = load float, float* %8
%23 = call float @cosf(float %22)
store float %23, float* %4
br label %27
24: ; preds = %17
%25 = load float, float* %8
%26 = call float @coshf(float %25)
store float %26, float* %4
br label %27
27: ; preds = %24, %21
%28 = load float, float* %4
ret float %28
}

LLVM IR (-O2):
define float @testf(float %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %1, 0
%5 = fneg float %0
%6 = fadd float %0, 1.000000e+00
%7 = select i1 %4, float %6, float %5
%8 = icmp eq i32 %2, 0
br i1 %8, label %11, label %9
9: ; preds = %3
%10 = tail call float @cosf(float %7)
br label %13
11: ; preds = %3
%12 = tail call float @coshf(float %7)
br label %13
13: ; preds = %11, %9
%14 = phi float [ %10, %9 ], [ %12, %11 ]
ret float %14
}
/* Variables and functions */
char ch();
scalar_t__ gch();
int remove_one_line_comment(char c) {
  if ((c == '/') && (ch() == '/')) {
    while (gch())
      ;
    return 0;
  } else {
    return c;
  }
}


x86 assembly (clang, -O0):
<remove_one_line_comment>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x2f,%eax
jne    1175 <remove_one_line_comment+0x55>
mov    $0x0,%al
call   1030 <ch@plt>
movsbl %al,%eax
cmp    $0x2f,%eax
jne    1175 <remove_one_line_comment+0x55>
jmp    1153 <remove_one_line_comment+0x33>
mov    $0x0,%al
call   1040 <gch@plt>
cmp    $0x0,%rax
je     1169 <remove_one_line_comment+0x49>
jmp    1153 <remove_one_line_comment+0x33>
movl   $0x0,-0x4(%rbp)
jmp    117c <remove_one_line_comment+0x5c>
movsbl -0x5(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<remove_one_line_comment>:
push   %rbx
mov    %edi,%ebx
cmp    $0x2f,%bl
jne    114c <remove_one_line_comment+0x2c>
xor    %eax,%eax
call   1030 <ch@plt>
mov    $0x2f,%ebx
cmp    $0x2f,%al
jne    114c <remove_one_line_comment+0x2c>
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <gch@plt>
test   %rax,%rax
jne    1140 <remove_one_line_comment+0x20>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @remove_one_line_comment(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 47
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = call signext i8 (...) @ch()
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 47
br i1 %10, label %11, label %17
11: ; preds = %7
br label %12
12: ; preds = %15, %11
%13 = call i64 (...) @gch()
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %12
br label %12
16: ; preds = %12
store i32 0, i32* %2
br label %20
17: ; preds = %7, %1
%18 = load i8, i8* %3
%19 = sext i8 %18 to i32
store i32 %19, i32* %2
br label %20
20: ; preds = %17, %16
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @remove_one_line_comment(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = icmp eq i8 %0, 47
br i1 %3, label %4, label %10
4: ; preds = %1
%5 = tail call signext i8 (...) @ch()
%6 = icmp eq i8 %5, 47
br i1 %6, label %7, label %10
7: ; preds = %4, %7
%8 = tail call i64 (...) @gch()
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %7
10: ; preds = %7, %1, %4
%11 = phi i32 [ 47, %4 ], [ %2, %1 ], [ 0, %7 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
void *thread(void *arg) {
  long i = 0;
  while (1) {
    i = i + 1;
    sleep(1);
  }
}


x86 assembly (clang, -O0):
<thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
mov    %rax,-0x10(%rbp)
mov    $0x1,%edi
call   1030 <sleep@plt>
jmp    1124 <thread+0x14>

x86 assembly (clang, -O2):
<thread>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    $0x1,%edi
call   1030 <sleep@plt>
jmp    1120 <thread+0x10>

LLVM IR (-O0):
define i8* @thread(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %1, %4
%5 = load i64, i64* %3
%6 = add nsw i64 %5, 1
store i64 %6, i64* %3
%7 = call i32 @sleep(i32 1)
br label %4
}

LLVM IR (-O2):
define noalias i8* @thread(i8* nocapture readnone %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @sleep(i32 1)
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ fun(char *, char *, int /*<<< orphan*/);
int /*<<< orphan*/ fun1(char *);
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ gets(char *);
int /*<<< orphan*/ puts(char *);
int main() {
  char a[] = "this is a book", b[20];
  gets(b);
  fun(a, b, fun1(b));
  puts(a);
  getchar();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xe9a(%rip),%rax
mov    %rax,-0x13(%rbp)
mov    0xe98(%rip),%eax
mov    %eax,-0xb(%rbp)
mov    0xe92(%rip),%ax
mov    %ax,-0x7(%rbp)
mov    0xe8a(%rip),%al
mov    %al,-0x5(%rbp)
lea    -0x30(%rbp),%rdi
call   1070 <gets@plt>
lea    -0x13(%rbp),%rax
mov    %rax,-0x40(%rbp)
lea    -0x30(%rbp),%rax
mov    %rax,-0x38(%rbp)
lea    -0x30(%rbp),%rdi
call   1060 <fun1@plt>
mov    -0x40(%rbp),%rdi
mov    -0x38(%rbp),%rsi
mov    %eax,%edx
call   1040 <fun@plt>
lea    -0x13(%rbp),%rdi
call   1030 <puts@plt>
mov    $0x0,%al
call   1050 <getchar@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
sub    $0x28,%rsp
movabs $0x6b6f6f62206120,%rax
mov    %rax,0x7(%rsp)
movabs $0x2073692073696874,%rax
69 73 20
mov    %rax,(%rsp)
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
call   1070 <gets@plt>
mov    %rbx,%rdi
call   1060 <fun1@plt>
mov    %rsp,%r14
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1040 <fun@plt>
mov    %r14,%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1050 <getchar@plt>
xor    %eax,%eax
add    $0x28,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@__const.main.a = [15 x i8] c"this is a book\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [15 x i8]
%3 = alloca [20 x i8]
store i32 0, i32* %1
%4 = bitcast [15 x i8]* %2 to i8*
%5 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%6 = call i32 @gets(i8* %5)
%7 = getelementptr inbounds [15 x i8], [15 x i8]* %2, i64 0, i64 0
%8 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%9 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%10 = call i32 @fun1(i8* %9)
%11 = call i32 @fun(i8* %7, i8* %8, i32 %10)
%12 = getelementptr inbounds [15 x i8], [15 x i8]* %2, i64 0, i64 0
%13 = call i32 @puts(i8* %12)
%14 = call i32 (...) @getchar()
ret i32 0
}

LLVM IR (-O2):
@__const.main.a = [15 x i8] c"this is a book\00"
define i32 @main() {
%1 = alloca [15 x i8]
%2 = alloca [20 x i8]
%3 = getelementptr inbounds [15 x i8], [15 x i8]* %1, i64 0, i64 0
%4 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%5 = call i32 @gets(i8* %4)
%6 = call i32 @fun1(i8* %4)
%7 = call i32 @fun(i8* %3, i8* %4, i32 %6)
%8 = call i32 @puts(i8* %3)
%9 = call i32 (...) @getchar()
ret i32 0
}