xunge/DecIR huggingface dataset:
int function_pointers(int (*a)(int), int (*b)(int), void (*c)(int)) {
  return a > b;
  return function_pointers > function_pointers;
  return a > c;
  return a == (void *)0;
  return a == (void *)1;
}


x86 assembly (clang, -O0):
<function_pointers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_pointers>:
xor    %eax,%eax
cmp    %rsi,%rdi
seta   %al
ret

LLVM IR (-O0):
define i32 @function_pointers(i32 (i32)* %0, i32 (i32)* %1, void (i32)* %2) {
%4 = alloca i32 (i32)*
%5 = alloca i32 (i32)*
%6 = alloca void (i32)*
store i32 (i32)* %0, i32 (i32)** %4
store i32 (i32)* %1, i32 (i32)** %5
store void (i32)* %2, void (i32)** %6
%7 = load i32 (i32)*, i32 (i32)** %4
%8 = load i32 (i32)*, i32 (i32)** %5
%9 = icmp ugt i32 (i32)* %7, %8
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @function_pointers(i32 (i32)* readnone %0, i32 (i32)* readnone %1, void (i32)* nocapture readnone %2) {
%4 = icmp ugt i32 (i32)* %0, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
double gsl_pow_7(const double x) {
  double x3 = x * x * x;
  return x3 * x3 * x;
}


x86 assembly (clang, -O0):
<gsl_pow_7>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsl_pow_7>:
movapd %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm1,%xmm1
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @gsl_pow_7(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = load double, double* %2
%6 = fmul double %4, %5
%7 = load double, double* %2
%8 = fmul double %6, %7
store double %8, double* %3
%9 = load double, double* %3
%10 = load double, double* %3
%11 = fmul double %9, %10
%12 = load double, double* %2
%13 = fmul double %11, %12
ret double %13
}

LLVM IR (-O2):
define double @gsl_pow_7(double %0) {
%2 = fmul double %0, %0
%3 = fmul double %2, %0
%4 = fmul double %3, %3
%5 = fmul double %4, %0
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ _pspsdk_alloc_init();
int /*<<< orphan*/ _pspsdk_stdio_init();
int /*<<< orphan*/ _pspsdk_stdlib_init();
__attribute__((weak, constructor)) void _pspsdk_libc_init() {
  _pspsdk_alloc_init();
  _pspsdk_stdio_init();
  _pspsdk_stdlib_init();
}


x86 assembly (clang, -O0):
<_pspsdk_libc_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <_pspsdk_alloc_init@plt>
mov    $0x0,%al
call   1030 <_pspsdk_stdio_init@plt>
mov    $0x0,%al
call   1050 <_pspsdk_stdlib_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pspsdk_libc_init>:
push   %rax
xor    %eax,%eax
call   1040 <_pspsdk_alloc_init@plt>
xor    %eax,%eax
call   1030 <_pspsdk_stdio_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <_pspsdk_stdlib_init@plt>

LLVM IR (-O0):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_pspsdk_libc_init, i8* null }]
define weak void @_pspsdk_libc_init() {
%1 = call i32 (...) @_pspsdk_alloc_init()
%2 = call i32 (...) @_pspsdk_stdio_init()
%3 = call i32 (...) @_pspsdk_stdlib_init()
ret void
}

LLVM IR (-O2):
@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @_pspsdk_libc_init, i8* null }]
define weak void @_pspsdk_libc_init() {
%1 = tail call i32 (...) @_pspsdk_alloc_init()
%2 = tail call i32 (...) @_pspsdk_stdio_init()
%3 = tail call i32 (...) @_pspsdk_stdlib_init()
ret void
}
int ft_cisvalid(int c, const char *to_avoid) {
  while (*to_avoid != '\0') {
    if (*to_avoid == c)
      return (0);
    ++to_avoid;
  }
  return (1);
}


x86 assembly (clang, -O0):
<ft_cisvalid>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1148 <ft_cisvalid+0x48>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x8(%rbp),%eax
jne    1137 <ft_cisvalid+0x37>
movl   $0x0,-0x4(%rbp)
jmp    114f <ft_cisvalid+0x4f>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110b <ft_cisvalid+0xb>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_cisvalid>:
mov    (%rsi),%cl
mov    $0x1,%eax
test   %cl,%cl
je     1122 <ft_cisvalid+0x22>
add    $0x1,%rsi
nop
movsbl %cl,%ecx
cmp    %edi,%ecx
je     1123 <ft_cisvalid+0x23>
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1110 <ft_cisvalid+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @ft_cisvalid(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %5
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %21
11: ; preds = %6
%12 = load i8*, i8** %5
%13 = load i8, i8* %12
%14 = sext i8 %13 to i32
%15 = load i32, i32* %4
%16 = icmp eq i32 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %11
store i32 0, i32* %3
br label %22
18: ; preds = %11
%19 = load i8*, i8** %5
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %5
br label %6
21: ; preds = %6
store i32 1, i32* %3
br label %22
22: ; preds = %21, %17
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @ft_cisvalid(i32 %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %8
5: ; preds = %8
%6 = load i8, i8* %13
%7 = icmp eq i8 %6, 0
br i1 %7, label %14, label %8
8: ; preds = %2, %5
%9 = phi i8 [ %6, %5 ], [ %3, %2 ]
%10 = phi i8* [ %13, %5 ], [ %1, %2 ]
%11 = sext i8 %9 to i32
%12 = icmp eq i32 %11, %0
%13 = getelementptr inbounds i8, i8* %10, i64 1
br i1 %12, label %14, label %5
14: ; preds = %8, %5, %2
%15 = phi i32 [ 1, %2 ], [ 1, %5 ], [ 0, %8 ]
ret i32 %15
}
__attribute__((always_)) void alternatives_smp_module_del(struct module *mod) {}


x86 assembly (clang, -O0):
<alternatives_smp_module_del>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<alternatives_smp_module_del>:
ret

LLVM IR (-O0):
%struct.module = type opaque
define void @alternatives_smp_module_del(%struct.module* %0) {
%2 = alloca %struct.module*
store %struct.module* %0, %struct.module** %2
ret void
}

LLVM IR (-O2):
%struct.module = type opaque
define void @alternatives_smp_module_del(%struct.module* nocapture %0) {
ret void
}
/* Variables and functions */
int getchar();
int read_char(void) {
  int ch = getchar();
  return (ch == '\n' || ch == '\t') ? ' ' : ch;
}


x86 assembly (clang, -O0):
<read_char>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
je     1136 <read_char+0x26>
cmpl   $0x9,-0x4(%rbp)
jne    1143 <read_char+0x33>
mov    $0x20,%eax
mov    %eax,-0x8(%rbp)
jmp    1149 <read_char+0x39>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_char>:
push   %rax
xor    %eax,%eax
call   1030 <getchar@plt>
lea    -0x9(%rax),%ecx
cmp    $0x2,%ecx
mov    $0x20,%ecx
cmovb  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @read_char() {
%1 = alloca i32
%2 = call i32 (...) @getchar()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = icmp eq i32 %3, 10
br i1 %4, label %8, label %5
5: ; preds = %0
%6 = load i32, i32* %1
%7 = icmp eq i32 %6, 9
br i1 %7, label %8, label %9
8: ; preds = %5, %0
br label %11
9: ; preds = %5
%10 = load i32, i32* %1
br label %11
11: ; preds = %9, %8
%12 = phi i32 [ 32, %8 ], [ %10, %9 ]
ret i32 %12
}

LLVM IR (-O2):
define i32 @read_char() {
%1 = tail call i32 (...) @getchar()
%2 = add i32 %1, -9
%3 = icmp ult i32 %2, 2
%4 = select i1 %3, i32 32, i32 %1
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ *__m128i;

/* Variables and functions */
int chk_128(__m128i v1, __m128i v2) {
  return (v1[0] != v2[0]) || (v1[1] != v2[1]);
}


x86 assembly (clang, -O0):
<chk_128>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
mov    -0x10(%rbp),%rdx
mov    $0x1,%al
cmp    (%rdx),%rcx
mov    %al,-0x11(%rbp)
jne    113b <chk_128+0x3b>
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x10(%rbp),%rcx
cmp    0x8(%rcx),%rax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<chk_128>:
mov    (%rdi),%rcx
mov    $0x1,%eax
cmp    (%rsi),%rcx
jne    111a <chk_128+0x1a>
mov    0x8(%rdi),%rcx
xor    %eax,%eax
cmp    0x8(%rsi),%rcx
setne  %al
ret

LLVM IR (-O0):
define i32 @chk_128(i64* %0, i64* %1) {
%3 = alloca i64*
%4 = alloca i64*
store i64* %0, i64** %3
store i64* %1, i64** %4
%5 = load i64*, i64** %3
%6 = getelementptr inbounds i64, i64* %5, i64 0
%7 = load i64, i64* %6
%8 = load i64*, i64** %4
%9 = getelementptr inbounds i64, i64* %8, i64 0
%10 = load i64, i64* %9
%11 = icmp ne i64 %7, %10
br i1 %11, label %20, label %12
12: ; preds = %2
%13 = load i64*, i64** %3
%14 = getelementptr inbounds i64, i64* %13, i64 1
%15 = load i64, i64* %14
%16 = load i64*, i64** %4
%17 = getelementptr inbounds i64, i64* %16, i64 1
%18 = load i64, i64* %17
%19 = icmp ne i64 %15, %18
br label %20
20: ; preds = %12, %2
%21 = phi i1 [ true, %2 ], [ %19, %12 ]
%22 = zext i1 %21 to i32
ret i32 %22
}

LLVM IR (-O2):
define i32 @chk_128(i64* nocapture %0, i64* nocapture %1) {
%3 = load i64, i64* %0
%4 = load i64, i64* %1
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %13
6: ; preds = %2
%7 = getelementptr inbounds i64, i64* %0, i64 1
%8 = load i64, i64* %7
%9 = getelementptr inbounds i64, i64* %1, i64 1
%10 = load i64, i64* %9
%11 = icmp ne i64 %8, %10
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %6, %2
%14 = phi i32 [ 1, %2 ], [ %12, %6 ]
ret i32 %14
}
/* Variables and functions */
int rx(int, int, int);
int ry(int r, int y, int x) { return rx((r + 1) % 4, y, x); }


x86 assembly (clang, -O0):
<ry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <rx@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ry>:
lea    0x1(%rdi),%eax
lea    0x4(%rdi),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xfffffffc,%ecx
neg    %ecx
add    %ecx,%edi
add    $0x1,%edi
jmp    1030 <rx@plt>

LLVM IR (-O0):
define i32 @ry(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = add nsw i32 %7, 1
%9 = srem i32 %8, 4
%10 = load i32, i32* %5
%11 = load i32, i32* %6
%12 = call i32 @rx(i32 %9, i32 %10, i32 %11)
ret i32 %12
}

LLVM IR (-O2):
define i32 @ry(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %0, 1
%5 = srem i32 %4, 4
%6 = tail call i32 @rx(i32 %5, i32 %1, i32 %2)
ret i32 %6
}
char(wcheck_char)(char to_check) { return to_check; }


x86 assembly (clang, -O0):
<wcheck_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcheck_char>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @wcheck_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
ret i8 %3
}

LLVM IR (-O2):
define signext i8 @wcheck_char(i8 returned signext %0) {
ret i8 %0
}
/* Type definitions */
typedef int /*<<< orphan*/ RAND_METHOD;

/* Variables and functions */
int /*<<< orphan*/ const *RAND_SSLeay();
const RAND_METHOD *RAND_get_rand_method(void) { return RAND_SSLeay(); }


x86 assembly (clang, -O0):
<RAND_get_rand_method>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <RAND_SSLeay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RAND_get_rand_method>:
xor    %eax,%eax
jmp    1030 <RAND_SSLeay@plt>

LLVM IR (-O0):
define i32* @RAND_get_rand_method() {
%1 = call i32* (...) @RAND_SSLeay()
ret i32* %1
}

LLVM IR (-O2):
define i32* @RAND_get_rand_method() {
%1 = tail call i32* (...) @RAND_SSLeay()
ret i32* %1
}
int test_imm_C0int16_mem(short *val) {
  return ((*val) & (0xC0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C0int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xc0,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C0int16_mem>:
testb  $0xc0,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C0int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 192
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C0int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 192
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ puts(char *);
int strcmp2(char *, char *);
int /*<<< orphan*/ strcpy2(char *, char *);
void main() {
  char *src = "acaabccaabcca";
  char dst[64];
  char *d = "Hello", *s = "Hella";
  strcpy2(dst, src);
  puts(dst);
  printf("%d\n", strcmp2(d, s));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
lea    0xeb1(%rip),%rax
mov    %rax,-0x8(%rbp)
lea    0xeb4(%rip),%rax
mov    %rax,-0x58(%rbp)
lea    0xeaf(%rip),%rax
mov    %rax,-0x60(%rbp)
lea    -0x50(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1060 <strcpy2@plt>
lea    -0x50(%rbp),%rdi
call   1030 <puts@plt>
mov    -0x58(%rbp),%rdi
mov    -0x60(%rbp),%rsi
call   1050 <strcmp2@plt>
mov    %eax,%esi
lea    0xe85(%rip),%rdi
call   1040 <printf@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x40,%rsp
lea    0xeb4(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1060 <strcpy2@plt>
mov    %rbx,%rdi
call   1030 <puts@plt>
lea    0xea8(%rip),%rdi
lea    0xea7(%rip),%rsi
call   1050 <strcmp2@plt>
lea    0xea1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"acaabccaabcca\00"
@.str.1 = [6 x i8] c"Hello\00"
@.str.2 = [6 x i8] c"Hella\00"
@.str.3 = [4 x i8] c"%d\0A\00"
define void @main() {
%1 = alloca i8*
%2 = alloca [64 x i8]
%3 = alloca i8*
%4 = alloca i8*
store i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8** %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8** %3
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i8** %4
%5 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%6 = load i8*, i8** %1
%7 = call i32 @strcpy2(i8* %5, i8* %6)
%8 = getelementptr inbounds [64 x i8], [64 x i8]* %2, i64 0, i64 0
%9 = call i32 @puts(i8* %8)
%10 = load i8*, i8** %3
%11 = load i8*, i8** %4
%12 = call i32 @strcmp2(i8* %10, i8* %11)
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"acaabccaabcca\00"
@.str.1 = [6 x i8] c"Hello\00"
@.str.2 = [6 x i8] c"Hella\00"
@.str.3 = [4 x i8] c"%d\0A\00"
define void @main() {
%1 = alloca [64 x i8]
%2 = getelementptr inbounds [64 x i8], [64 x i8]* %1, i64 0, i64 0
%3 = call i32 @strcpy2(i8* %2, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @puts(i8* %2)
%5 = call i32 @strcmp2(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.3, i64 0, i64 0), i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalpha(int);
void t_isalpha_0x25() {
  Assert_real((isalpha(37) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              190, ("isalpha should be 0 for %"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x25>:
push   %rbp
mov    %rsp,%rbp
mov    $0x25,%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xbe,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x25>:
push   %rax
mov    $0x25,%edi
call   1030 <isalpha@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xbe,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 0 for %\00"
define void @t_isalpha_0x25() {
%1 = call i64 @isalpha(i32 37)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 190, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 0 for %\00"
define void @t_isalpha_0x25() {
%1 = tail call i64 @isalpha(i32 37)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 190, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int strlen(char *);
void stub1();
int main(void) {
  char *shellcode = "\x31\xc9\xf7\xe1\xb0\x0b\x51\x68\x2f\x2f\x73\x68\x68\x2f"
                    "\x62\x69\x6e\x89\xe3\xcd\x80";
  printf("strlen(shellcode)=%d\n", strlen(shellcode));
  ((void (*)(void))shellcode)();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%esi
lea    0xeca(%rip),%rdi
call   1040 <printf@plt>
call   *-0x10(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <strlen@plt>
lea    0xee2(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
call   2000 <_fini+0xebc>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"1\C9\F7\E1\B0\0BQh//shh/bin\89\E3\CD\80\00"
@.str.1 = [22 x i8] c"strlen(shellcode)=%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strlen(i8* %3)
%5 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 %4)
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to void ()*
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"1\C9\F7\E1\B0\0BQh//shh/bin\89\E3\CD\80\00"
@.str.1 = [22 x i8] c"strlen(shellcode)=%d\0A\00"
define i32 @main() {
%1 = tail call i32 @strlen(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i32 %1)
tail call void bitcast ([22 x i8]* @.str to void ()*)()
ret i32 0
}
int wpas_dbus_register_iface(struct wpa_supplicant *wpa_s) { return 0; }


x86 assembly (clang, -O0):
<wpas_dbus_register_iface>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpas_dbus_register_iface>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
define i32 @wpas_dbus_register_iface(%struct.wpa_supplicant* %0) {
%2 = alloca %struct.wpa_supplicant*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %2
ret i32 0
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
define i32 @wpas_dbus_register_iface(%struct.wpa_supplicant* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
char *hello();
int /*<<< orphan*/ printf(char *, char *);
int main() {
  printf("%s\n", hello());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <hello@plt>
mov    %rax,%rsi
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <hello@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i8* (...) @hello()
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = tail call i8* (...) @hello()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int number;
  printf("please input a number:\n");
  scanf("%d", &number);
  printf("%d", number % 10);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xed4(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%esi
lea    0xeb7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xec7(%rip),%rdi
call   1030 <puts@plt>
lea    0xeb8(%rip),%rbx
lea    0xc(%rsp),%rsi
mov    %rbx,%rdi
call   1050 <scanf@plt>
movslq 0xc(%rsp),%rsi
imul   $0x66666667,%rsi,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x22,%rax
add    %ecx,%eax
add    %eax,%eax
lea    (%rax,%rax,4),%eax
sub    %eax,%esi
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [24 x i8] c"please input a number:\0A\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = srem i32 %5, 10
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
@str = [23 x i8] c"please input a number:\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = srem i32 %5, 10
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %6)
ret i32 0
}
int __lesf2(float a __attribute__((unused)), float b __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<__lesf2>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__lesf2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__lesf2(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
ret i32 0
}

LLVM IR (-O2):
define i32 @__lesf2(float %0, float %1) {
ret i32 0
}
/* Type definitions */
struct DSHashMap {
  int dummy;
};

/* Variables and functions */
void *ds_hashmap_get(struct DSHashMap *, char *, int /*<<< orphan*/, int);
void *ds_hashmap_get_str(struct DSHashMap *hash, char *key) {
  return ds_hashmap_get(hash, key, 0, 2);
}


x86 assembly (clang, -O0):
<ds_hashmap_get_str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
mov    $0x2,%ecx
call   1030 <ds_hashmap_get@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ds_hashmap_get_str>:
xor    %edx,%edx
mov    $0x2,%ecx
jmp    1030 <ds_hashmap_get@plt>

LLVM IR (-O0):
%struct.DSHashMap = type { i32 }
define i8* @ds_hashmap_get_str(%struct.DSHashMap* %0, i8* %1) {
%3 = alloca %struct.DSHashMap*
%4 = alloca i8*
store %struct.DSHashMap* %0, %struct.DSHashMap** %3
store i8* %1, i8** %4
%5 = load %struct.DSHashMap*, %struct.DSHashMap** %3
%6 = load i8*, i8** %4
%7 = call i8* @ds_hashmap_get(%struct.DSHashMap* %5, i8* %6, i32 0, i32 2)
ret i8* %7
}

LLVM IR (-O2):
%struct.DSHashMap = type { i32 }
define i8* @ds_hashmap_get_str(%struct.DSHashMap* %0, i8* %1) {
%3 = tail call i8* @ds_hashmap_get(%struct.DSHashMap* %0, i8* %1, i32 0, i32 2)
ret i8* %3
}
void doStuff_pointerToConstInt(const int *u) {}


x86 assembly (clang, -O0):
<doStuff_pointerToConstInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<doStuff_pointerToConstInt>:
ret

LLVM IR (-O0):
define void @doStuff_pointerToConstInt(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @doStuff_pointerToConstInt(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_RDONLY;
int /*<<< orphan*/ errno;
int /*<<< orphan*/ exit(int);
int open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
char *strerror(int /*<<< orphan*/);
int openKeyboardDeviceFile(char *deviceFile) {
  int kbd_fd = open(deviceFile, O_RDONLY);
  if (kbd_fd == -1) {
    printf("%s", strerror(errno));
    exit(-1);
  }
  return kbd_fd;
}


x86 assembly (clang, -O0):
<openKeyboardDeviceFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e91(%rip),%rax
mov    (%rax),%esi
call   1040 <open@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0xffffffff,-0xc(%rbp)
jne    1192 <openKeyboardDeviceFile+0x52>
mov    0x2e66(%rip),%rax
mov    (%rax),%edi
call   1060 <strerror@plt>
mov    %rax,%rsi
lea    0xe7d(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<openKeyboardDeviceFile>:
push   %rax
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
call   1040 <open@plt>
cmp    $0xffffffff,%eax
je     1156 <openKeyboardDeviceFile+0x16>
pop    %rcx
ret
mov    0x2e7b(%rip),%rax
mov    (%rax),%edi
call   1060 <strerror@plt>
lea    0xe95(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@O_RDONLY = global i32 0
@.str = [3 x i8] c"%s\00"
@errno = global i32 0
define i32 @openKeyboardDeviceFile(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i32, i32* @O_RDONLY
%6 = call i32 @open(i8* %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, -1
br i1 %8, label %9, label %14
9: ; preds = %1
%10 = load i32, i32* @errno
%11 = call i8* @strerror(i32 %10)
%12 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %11)
%13 = call i32 @exit(i32 -1)
unreachable
14: ; preds = %1
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
@O_RDONLY = global i32 0
@.str = [3 x i8] c"%s\00"
@errno = global i32 0
define i32 @openKeyboardDeviceFile(i8* nocapture %0) {
%2 = load i32, i32* @O_RDONLY
%3 = tail call i32 @open(i8* %0, i32 %2)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %10
5: ; preds = %1
%6 = load i32, i32* @errno
%7 = tail call i8* @strerror(i32 %6)
%8 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %7)
%9 = tail call i32 @exit(i32 -1)
unreachable
10: ; preds = %1
ret i32 %3
}
void g_rand_copy() {}


x86 assembly (clang, -O0):
<g_rand_copy>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_rand_copy>:
ret

LLVM IR (-O0):
define void @g_rand_copy() {
ret void
}

LLVM IR (-O2):
define void @g_rand_copy() {
ret void
}
short __ocl_bitselect_short(short a, short b, short c) {
  return (b & c) | (a & (~c));
}


x86 assembly (clang, -O0):
<__ocl_bitselect_short>:
push   %rbp
mov    %rsp,%rbp
mov    %dx,%ax
mov    %si,%cx
mov    %di,%dx
mov    %dx,-0x2(%rbp)
mov    %cx,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
movswl -0x4(%rbp),%eax
movswl -0x6(%rbp),%ecx
and    %ecx,%eax
movswl -0x2(%rbp),%ecx
movswl -0x6(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_bitselect_short>:
mov    %edx,%eax
and    %edx,%esi
not    %eax
and    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define signext i16 @__ocl_bitselect_short(i16 signext %0, i16 signext %1, i16 signext %2) {
%4 = alloca i16
%5 = alloca i16
%6 = alloca i16
store i16 %0, i16* %4
store i16 %1, i16* %5
store i16 %2, i16* %6
%7 = load i16, i16* %5
%8 = sext i16 %7 to i32
%9 = load i16, i16* %6
%10 = sext i16 %9 to i32
%11 = and i32 %8, %10
%12 = load i16, i16* %4
%13 = sext i16 %12 to i32
%14 = load i16, i16* %6
%15 = sext i16 %14 to i32
%16 = xor i32 %15, -1
%17 = and i32 %13, %16
%18 = or i32 %11, %17
%19 = trunc i32 %18 to i16
ret i16 %19
}

LLVM IR (-O2):
define signext i16 @__ocl_bitselect_short(i16 signext %0, i16 signext %1, i16 signext %2) {
%4 = and i16 %2, %1
%5 = xor i16 %2, -1
%6 = and i16 %5, %0
%7 = or i16 %4, %6
ret i16 %7
}
int f(int x) { return ((x >> 14) & 6) + ((x >> 14) & 4); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0xe,%eax
and    $0x6,%eax
mov    -0x4(%rbp),%ecx
sar    $0xe,%ecx
and    $0x4,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
sar    $0xe,%edi
mov    %edi,%eax
and    $0x6,%eax
and    $0x4,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 14
%5 = and i32 %4, 6
%6 = load i32, i32* %2
%7 = ashr i32 %6, 14
%8 = and i32 %7, 4
%9 = add nsw i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = ashr i32 %0, 14
%3 = and i32 %2, 6
%4 = and i32 %2, 4
%5 = add nuw nsw i32 %3, %4
ret i32 %5
}
int hybris_isblank(int c) { return (c == ' ' || c == '\t'); }


x86 assembly (clang, -O0):
<hybris_isblank>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     1120 <hybris_isblank+0x20>
cmpl   $0x9,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hybris_isblank>:
cmp    $0x20,%edi
sete   %al
cmp    $0x9,%edi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @hybris_isblank(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 32
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 9
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @hybris_isblank(i32 %0) {
%2 = icmp eq i32 %0, 32
%3 = icmp eq i32 %0, 9
%4 = or i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ ReverseGPIOP__1__In__set();
void ReverseGPIOP__1__Out__clr(void) { ReverseGPIOP__1__In__set(); }


x86 assembly (clang, -O0):
<ReverseGPIOP__1__Out__clr>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <ReverseGPIOP__1__In__set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReverseGPIOP__1__Out__clr>:
xor    %eax,%eax
jmp    1030 <ReverseGPIOP__1__In__set@plt>

LLVM IR (-O0):
define void @ReverseGPIOP__1__Out__clr() {
%1 = call i32 (...) @ReverseGPIOP__1__In__set()
ret void
}

LLVM IR (-O2):
define void @ReverseGPIOP__1__Out__clr() {
%1 = tail call i32 (...) @ReverseGPIOP__1__In__set()
ret void
}
int is_full(void) { return 0; }


x86 assembly (clang, -O0):
<is_full>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_full>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_full() {
ret i32 0
}

LLVM IR (-O2):
define i32 @is_full() {
ret i32 0
}
int test_imm_65int16_mem(short *val) {
  return ((*val) & (-0x65 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_65int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff9b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_65int16_mem>:
movzwl (%rdi),%eax
test   $0xff9b,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_65int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -101
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_65int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -101
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
int sum(int num) {
  if (num != 0) {
    return (num % 10 + sum(num / 10));
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1152 <sum+0x42>
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1030 <sum@plt>
mov    -0xc(%rbp),%edx
add    %eax,%edx
mov    %edx,-0x4(%rbp)
jmp    1159 <sum+0x49>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum>:
xor    %eax,%eax
test   %edi,%edi
je     113b <sum+0x3b>
cs nopw 0x0(%rax,%rax,1)
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdi
mov    %rdi,%rdx
shr    $0x3f,%rdx
sar    $0x22,%rdi
add    %edx,%edi
lea    (%rdi,%rdi,1),%edx
lea    (%rdx,%rdx,4),%edx
mov    %ecx,%esi
sub    %edx,%esi
add    %esi,%eax
add    $0x9,%ecx
cmp    $0x12,%ecx
ja     1110 <sum+0x10>
ret

LLVM IR (-O0):
define i32 @sum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* %3
%8 = srem i32 %7, 10
%9 = load i32, i32* %3
%10 = sdiv i32 %9, 10
%11 = call i32 @sum(i32 %10)
%12 = add nsw i32 %8, %11
store i32 %12, i32* %2
br label %14
13: ; preds = %1
store i32 0, i32* %2
br label %14
14: ; preds = %13, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @sum(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ %0, %1 ]
%5 = phi i32 [ %8, %3 ], [ 0, %1 ]
%6 = srem i32 %4, 10
%7 = sdiv i32 %4, 10
%8 = add nsw i32 %6, %5
%9 = add i32 %4, 9
%10 = icmp ult i32 %9, 19
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %12
}
/* Variables and functions */
unsigned long xorshf96(unsigned long *, unsigned long *, unsigned long *);
unsigned long marsaglia_rand(unsigned long *seeds) {
  return xorshf96(seeds, seeds + 1, seeds + 2);
}


x86 assembly (clang, -O0):
<marsaglia_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
add    $0x8,%rsi
mov    -0x8(%rbp),%rdx
add    $0x10,%rdx
call   1030 <xorshf96@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<marsaglia_rand>:
lea    0x8(%rdi),%rsi
lea    0x10(%rdi),%rdx
jmp    1030 <xorshf96@plt>

LLVM IR (-O0):
define i64 @marsaglia_rand(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64*, i64** %2
%5 = getelementptr inbounds i64, i64* %4, i64 1
%6 = load i64*, i64** %2
%7 = getelementptr inbounds i64, i64* %6, i64 2
%8 = call i64 @xorshf96(i64* %3, i64* %5, i64* %7)
ret i64 %8
}

LLVM IR (-O2):
define i64 @marsaglia_rand(i64* %0) {
%2 = getelementptr inbounds i64, i64* %0, i64 1
%3 = getelementptr inbounds i64, i64* %0, i64 2
%4 = tail call i64 @xorshf96(i64* %0, i64* %2, i64* %3)
ret i64 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_rwlock_t;

/* Variables and functions */
int /*<<< orphan*/ *hybris_alloc_init_rwlock();
pthread_rwlock_t *hybris_set_realrwlock(pthread_rwlock_t *rwlock) {
  int value = (*(int *)rwlock);
  pthread_rwlock_t *realrwlock = (pthread_rwlock_t *)value;
  if (value <= 0xFFFF) {
    realrwlock = hybris_alloc_init_rwlock();
    *((int *)rwlock) = (int)realrwlock;
  }
  return realrwlock;
}


x86 assembly (clang, -O0):
<hybris_set_realrwlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
movslq -0xc(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0xffff,-0xc(%rbp)
jg     1151 <hybris_set_realrwlock+0x41>
mov    $0x0,%al
call   1030 <hybris_alloc_init_rwlock@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %eax,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hybris_set_realrwlock>:
push   %rbx
movslq (%rdi),%rax
cmp    $0xffff,%rax
jg     1128 <hybris_set_realrwlock+0x18>
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <hybris_alloc_init_rwlock@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define i32* @hybris_set_realrwlock(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32*
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store i32* %9, i32** %4
%10 = load i32, i32* %3
%11 = icmp sle i32 %10, 65535
br i1 %11, label %12, label %17
12: ; preds = %1
%13 = call i32* (...) @hybris_alloc_init_rwlock()
store i32* %13, i32** %4
%14 = load i32*, i32** %4
%15 = ptrtoint i32* %14 to i32
%16 = load i32*, i32** %2
store i32 %15, i32* %16
br label %17
17: ; preds = %12, %1
%18 = load i32*, i32** %4
ret i32* %18
}

LLVM IR (-O2):
define i32* @hybris_set_realrwlock(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = icmp slt i32 %2, 65536
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = tail call i32* (...) @hybris_alloc_init_rwlock()
%8 = ptrtoint i32* %7 to i64
%9 = trunc i64 %8 to i32
store i32 %9, i32* %0
br label %10
10: ; preds = %6, %1
%11 = phi i32* [ %7, %6 ], [ %4, %1 ]
ret i32* %11
}
extern __attribute__((gnu_)) long long llabs(long long __n) {
  return (__n < 0LL) ? -__n : __n;
}


x86 assembly (clang, -O0):
<llabs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    1122 <llabs+0x22>
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    112a <llabs+0x2a>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<llabs>:
mov    %rdi,%rax
neg    %rax
cmovs  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @llabs(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i64, i64* %2
%7 = sub nsw i64 0, %6
br label %10
8: ; preds = %1
%9 = load i64, i64* %2
br label %10
10: ; preds = %8, %5
%11 = phi i64 [ %7, %5 ], [ %9, %8 ]
ret i64 %11
}

LLVM IR (-O2):
define i64 @llabs(i64 %0) {
%2 = tail call i64 @llvm.abs.i64(i64 %0, i1 true)
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ rockchip_wifi_power(int);
int sif_get_bt_config();
scalar_t__ sif_get_retry_config();
int sif_get_rst_config();
void sif_platform_reset_target(void) {
  if (sif_get_bt_config() == 1 && sif_get_retry_config() == 0) {
    if (sif_get_rst_config() == 1) {
    }
  } else {
    rockchip_wifi_power(0);
    rockchip_wifi_power(1);
  }
}


x86 assembly (clang, -O0):
<sif_platform_reset_target>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <sif_get_bt_config@plt>
cmp    $0x1,%eax
jne    117f <sif_platform_reset_target+0x3f>
mov    $0x0,%al
call   1060 <sif_get_retry_config@plt>
cmp    $0x0,%rax
jne    117f <sif_platform_reset_target+0x3f>
mov    $0x0,%al
call   1040 <sif_get_rst_config@plt>
cmp    $0x1,%eax
jne    117a <sif_platform_reset_target+0x3a>
jmp    117a <sif_platform_reset_target+0x3a>
jmp    1190 <sif_platform_reset_target+0x50>
xor    %edi,%edi
call   1030 <rockchip_wifi_power@plt>
mov    $0x1,%edi
call   1030 <rockchip_wifi_power@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sif_platform_reset_target>:
push   %rax
xor    %eax,%eax
call   1050 <sif_get_bt_config@plt>
cmp    $0x1,%eax
jne    1159 <sif_platform_reset_target+0x19>
xor    %eax,%eax
call   1060 <sif_get_retry_config@plt>
test   %rax,%rax
je     116b <sif_platform_reset_target+0x2b>
xor    %edi,%edi
call   1030 <rockchip_wifi_power@plt>
mov    $0x1,%edi
pop    %rax
jmp    1030 <rockchip_wifi_power@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <sif_get_rst_config@plt>

LLVM IR (-O0):
define void @sif_platform_reset_target() {
%1 = call i32 (...) @sif_get_bt_config()
%2 = icmp eq i32 %1, 1
br i1 %2, label %3, label %11
3: ; preds = %0
%4 = call i64 (...) @sif_get_retry_config()
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 (...) @sif_get_rst_config()
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %6
br label %10
10: ; preds = %9, %6
br label %14
11: ; preds = %3, %0
%12 = call i32 @rockchip_wifi_power(i32 0)
%13 = call i32 @rockchip_wifi_power(i32 1)
br label %14
14: ; preds = %11, %10
ret void
}

LLVM IR (-O2):
define void @sif_platform_reset_target() {
%1 = tail call i32 (...) @sif_get_bt_config()
%2 = icmp eq i32 %1, 1
br i1 %2, label %3, label %8
3: ; preds = %0
%4 = tail call i64 (...) @sif_get_retry_config()
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 (...) @sif_get_rst_config()
br label %11
8: ; preds = %3, %0
%9 = tail call i32 @rockchip_wifi_power(i32 0)
%10 = tail call i32 @rockchip_wifi_power(i32 1)
br label %11
11: ; preds = %8, %6
ret void
}
/* Variables and functions */
int _di_ioctl_std(int);
int di_closepartition(void) { return _di_ioctl_std(0x8C); }


x86 assembly (clang, -O0):
<di_closepartition>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8c,%edi
call   1030 <_di_ioctl_std@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<di_closepartition>:
mov    $0x8c,%edi
jmp    1030 <_di_ioctl_std@plt>

LLVM IR (-O0):
define i32 @di_closepartition() {
%1 = call i32 @_di_ioctl_std(i32 140)
ret i32 %1
}

LLVM IR (-O2):
define i32 @di_closepartition() {
%1 = tail call i32 @_di_ioctl_std(i32 140)
ret i32 %1
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int next_multprec_solution(int k) {
  int fail, *b;
  double *c;
  fail = _ada_use_c2phc(514, &k, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<next_multprec_solution>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x202,%edi
lea    -0x4(%rbp),%rsi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_multprec_solution>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x202,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @next_multprec_solution(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %4
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc(i32 514, i32* %2, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @next_multprec_solution(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc(i32 514, i32* %2, i32* undef, double* undef)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ test_scale_all_permutations(int, int);
void test_scale_all() {
  test_scale_all_permutations(5, 1);
  test_scale_all_permutations(8, 1);
  test_scale_all_permutations(8, 3);
  test_scale_all_permutations(100, 1);
  test_scale_all_permutations(100, 99);
  test_scale_all_permutations(2, 1);
}


x86 assembly (clang, -O0):
<test_scale_all>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
mov    $0x1,%esi
call   1030 <test_scale_all_permutations@plt>
mov    $0x8,%edi
mov    $0x1,%esi
call   1030 <test_scale_all_permutations@plt>
mov    $0x8,%edi
mov    $0x3,%esi
call   1030 <test_scale_all_permutations@plt>
mov    $0x64,%edi
mov    $0x1,%esi
call   1030 <test_scale_all_permutations@plt>
mov    $0x64,%edi
mov    $0x63,%esi
call   1030 <test_scale_all_permutations@plt>
mov    $0x2,%edi
mov    $0x1,%esi
call   1030 <test_scale_all_permutations@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_scale_all>:
push   %rax
mov    $0x5,%edi
mov    $0x1,%esi
call   1030 <test_scale_all_permutations@plt>
mov    $0x8,%edi
mov    $0x1,%esi
call   1030 <test_scale_all_permutations@plt>
mov    $0x8,%edi
mov    $0x3,%esi
call   1030 <test_scale_all_permutations@plt>
mov    $0x64,%edi
mov    $0x1,%esi
call   1030 <test_scale_all_permutations@plt>
mov    $0x64,%edi
mov    $0x63,%esi
call   1030 <test_scale_all_permutations@plt>
mov    $0x2,%edi
mov    $0x1,%esi
pop    %rax
jmp    1030 <test_scale_all_permutations@plt>

LLVM IR (-O0):
define void @test_scale_all() {
%1 = call i32 @test_scale_all_permutations(i32 5, i32 1)
%2 = call i32 @test_scale_all_permutations(i32 8, i32 1)
%3 = call i32 @test_scale_all_permutations(i32 8, i32 3)
%4 = call i32 @test_scale_all_permutations(i32 100, i32 1)
%5 = call i32 @test_scale_all_permutations(i32 100, i32 99)
%6 = call i32 @test_scale_all_permutations(i32 2, i32 1)
ret void
}

LLVM IR (-O2):
define void @test_scale_all() {
%1 = tail call i32 @test_scale_all_permutations(i32 5, i32 1)
%2 = tail call i32 @test_scale_all_permutations(i32 8, i32 1)
%3 = tail call i32 @test_scale_all_permutations(i32 8, i32 3)
%4 = tail call i32 @test_scale_all_permutations(i32 100, i32 1)
%5 = tail call i32 @test_scale_all_permutations(i32 100, i32 99)
%6 = tail call i32 @test_scale_all_permutations(i32 2, i32 1)
ret void
}
int test_imm_F8int32_reg(int val) { return ((val) & (0xF8 << 0)) ? -20 : -40; }


x86 assembly (clang, -O0):
<test_imm_F8int32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xf8,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F8int32_reg>:
test   $0xf8,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F8int32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 248
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_F8int32_reg(i32 %0) {
%2 = and i32 %0, 248
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int jsk_recvmsg(int s, struct msghdr *msghdr, int flags) { return 0; }


x86 assembly (clang, -O0):
<jsk_recvmsg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<jsk_recvmsg>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.msghdr = type opaque
define i32 @jsk_recvmsg(i32 %0, %struct.msghdr* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.msghdr*
%6 = alloca i32
store i32 %0, i32* %4
store %struct.msghdr* %1, %struct.msghdr** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.msghdr = type opaque
define i32 @jsk_recvmsg(i32 %0, %struct.msghdr* nocapture readnone %1, i32 %2) {
ret i32 0
}