int Mepg2AspectRatioNomi(unsigned char code, long width, long height) {
  switch (code & 0x0f) {
  case 1:
    return 1;
  case 2:
    return 4;
  case 3:
    return 16;
  case 4:
    return 221;
  case 5:
    return 12;
  case 6:
    return 10;
  case 7:
    return 16;
  case 8:
    return 40;
  case 0x0f:
    return height;
  default:
    return 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<Mepg2AspectRatioNomi>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movzbl -0x5(%rbp),%eax
and    $0xf,%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x20(%rbp)
sub    $0xe,%eax
ja     11ab <Mepg2AspectRatioNomi+0xab>
mov    -0x20(%rbp),%rax
lea    0xeca(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    11b2 <Mepg2AspectRatioNomi+0xb2>
movl   $0x4,-0x4(%rbp)
jmp    11b2 <Mepg2AspectRatioNomi+0xb2>
movl   $0x10,-0x4(%rbp)
jmp    11b2 <Mepg2AspectRatioNomi+0xb2>
movl   $0xdd,-0x4(%rbp)
jmp    11b2 <Mepg2AspectRatioNomi+0xb2>
movl   $0xc,-0x4(%rbp)
jmp    11b2 <Mepg2AspectRatioNomi+0xb2>
movl   $0xa,-0x4(%rbp)
jmp    11b2 <Mepg2AspectRatioNomi+0xb2>
movl   $0x10,-0x4(%rbp)
jmp    11b2 <Mepg2AspectRatioNomi+0xb2>
movl   $0x28,-0x4(%rbp)
jmp    11b2 <Mepg2AspectRatioNomi+0xb2>
mov    -0x18(%rbp),%rax
mov    %eax,-0x4(%rbp)
jmp    11b2 <Mepg2AspectRatioNomi+0xb2>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mepg2AspectRatioNomi>:
mov    %edi,%eax
and    $0xf,%eax
lea    -0x1(%rax),%ecx
cmp    $0xe,%ecx
ja     1141 <Mepg2AspectRatioNomi+0x41>
lea    0xeec(%rip),%rsi
movslq (%rsi,%rcx,4),%rcx
add    %rsi,%rcx
jmp    *%rcx
mov    $0x10,%eax
ret
mov    $0x4,%eax
ret
mov    $0xdd,%eax
ret
mov    $0xc,%eax
ret
mov    $0xa,%eax
ret
mov    $0x28,%eax
ret
xor    %eax,%eax
ret
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @Mepg2AspectRatioNomi(i8 zeroext %0, i64 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i64
%7 = alloca i64
store i8 %0, i8* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
%8 = load i8, i8* %5
%9 = zext i8 %8 to i32
%10 = and i32 %9, 15
switch i32 %10, label %22 [
i32 1, label %11
i32 2, label %12
i32 3, label %13
i32 4, label %14
i32 5, label %15
i32 6, label %16
i32 7, label %17
i32 8, label %18
i32 15, label %19
]
11: ; preds = %3
store i32 1, i32* %4
br label %23
12: ; preds = %3
store i32 4, i32* %4
br label %23
13: ; preds = %3
store i32 16, i32* %4
br label %23
14: ; preds = %3
store i32 221, i32* %4
br label %23
15: ; preds = %3
store i32 12, i32* %4
br label %23
16: ; preds = %3
store i32 10, i32* %4
br label %23
17: ; preds = %3
store i32 16, i32* %4
br label %23
18: ; preds = %3
store i32 40, i32* %4
br label %23
19: ; preds = %3
%20 = load i64, i64* %7
%21 = trunc i64 %20 to i32
store i32 %21, i32* %4
br label %23
22: ; preds = %3
store i32 0, i32* %4
br label %23
23: ; preds = %22, %19, %18, %17, %16, %15, %14, %13, %12, %11
%24 = load i32, i32* %4
ret i32 %24
}

LLVM IR (-O2):
define i32 @Mepg2AspectRatioNomi(i8 zeroext %0, i64 %1, i64 %2) {
%4 = and i8 %0, 15
%5 = zext i8 %4 to i32
switch i32 %5, label %15 [
i32 1, label %16
i32 2, label %6
i32 3, label %7
i32 4, label %8
i32 5, label %9
i32 6, label %10
i32 7, label %11
i32 8, label %12
i32 15, label %13
]
6: ; preds = %3
br label %16
7: ; preds = %3
br label %16
8: ; preds = %3
br label %16
9: ; preds = %3
br label %16
10: ; preds = %3
br label %16
11: ; preds = %3
br label %16
12: ; preds = %3
br label %16
13: ; preds = %3
%14 = trunc i64 %2 to i32
br label %16
15: ; preds = %3
br label %16
16: ; preds = %3, %15, %13, %12, %11, %10, %9, %8, %7, %6
%17 = phi i32 [ 0, %15 ], [ %14, %13 ], [ 40, %12 ], [ 16, %11 ], [ 10, %10 ], [ 12, %9 ], [ 221, %8 ], [ 16, %7 ], [ 4, %6 ], [ %5, %3 ]
ret i32 %17
}