#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
int /*<<< orphan*/ PECIAdvCmdSend(unsigned long, unsigned char, unsigned char,
                                  unsigned char, unsigned char, unsigned long,
                                  unsigned char, unsigned long, unsigned long);
unsigned long PECIAdvCmdSendNonBlocking(
    unsigned long ulBase, unsigned char ucCmd, unsigned char ucHidRe,
    unsigned char ucDomain, unsigned char ucProcAdd, unsigned long ulArg,
    unsigned char ucSize, unsigned long ulData0, unsigned long ulData1) {
  DEBUG_ASSERT(ulBase == 0x400B0000);
  if ((*((volatile unsigned long *)(ulBase + 0x00000114))) == 0xFFFFFFFF) {
    return (0);
  }
  PECIAdvCmdSend(ulBase, ucCmd, ucHidRe, ucDomain, ucProcAdd, ulArg, ucSize,
                 ulData0, ulData1);
  return (1);
}


x86 assembly (clang, -O0):
<PECIAdvCmdSendNonBlocking>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %r8b,%al
mov    0x20(%rbp),%r8
mov    0x18(%rbp),%r8
mov    0x10(%rbp),%r8b
mov    %rdi,-0x10(%rbp)
mov    %sil,-0x11(%rbp)
mov    %dl,-0x12(%rbp)
mov    %cl,-0x13(%rbp)
mov    %al,-0x14(%rbp)
mov    %r9,-0x20(%rbp)
cmpq   $0x400b0000,-0x10(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rax
mov    0x114(%rax),%rax
mov    $0xffffffff,%ecx
cmp    %rcx,%rax
jne    1187 <PECIAdvCmdSendNonBlocking+0x67>
movq   $0x0,-0x8(%rbp)
jmp    11d6 <PECIAdvCmdSendNonBlocking+0xb6>
mov    -0x10(%rbp),%rdi
mov    -0x11(%rbp),%sil
mov    -0x12(%rbp),%dl
mov    -0x13(%rbp),%cl
mov    -0x14(%rbp),%r8b
mov    -0x20(%rbp),%r9
mov    0x10(%rbp),%r11b
mov    0x18(%rbp),%r10
mov    0x20(%rbp),%rax
movzbl %sil,%esi
movzbl %dl,%edx
movzbl %cl,%ecx
movzbl %r8b,%r8d
movzbl %r11b,%r11d
mov    %r11d,(%rsp)
mov    %r10,0x8(%rsp)
mov    %rax,0x10(%rsp)
call   1040 <PECIAdvCmdSend@plt>
movq   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PECIAdvCmdSendNonBlocking>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %r9,%r14
mov    %r8d,%r15d
mov    %ecx,%r12d
mov    %edx,%r13d
mov    %esi,%ebx
mov    %rdi,%rbp
xor    %edi,%edi
cmp    $0x400b0000,%rbp
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    0x114(%rbp),%rax
mov    $0xffffffff,%ecx
cmp    %rcx,%rax
jne    1163 <PECIAdvCmdSendNonBlocking+0x43>
xor    %eax,%eax
jmp    119a <PECIAdvCmdSendNonBlocking+0x7a>
mov    0x40(%rsp),%al
sub    $0x8,%rsp
movzbl %al,%eax
movzbl %bl,%esi
movzbl %r13b,%edx
movzbl %r12b,%ecx
movzbl %r15b,%r8d
mov    %rbp,%rdi
mov    %r14,%r9
push   0x58(%rsp)
push   0x58(%rsp)
push   %rax
call   1040 <PECIAdvCmdSend@plt>
add    $0x20,%rsp
mov    $0x1,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i64 @PECIAdvCmdSendNonBlocking(i64 %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8 zeroext %4, i64 %5, i8 zeroext %6, i64 %7, i64 %8) {
%10 = alloca i64
%11 = alloca i64
%12 = alloca i8
%13 = alloca i8
%14 = alloca i8
%15 = alloca i8
%16 = alloca i64
%17 = alloca i8
%18 = alloca i64
%19 = alloca i64
store i64 %0, i64* %11
store i8 %1, i8* %12
store i8 %2, i8* %13
store i8 %3, i8* %14
store i8 %4, i8* %15
store i64 %5, i64* %16
store i8 %6, i8* %17
store i64 %7, i64* %18
store i64 %8, i64* %19
%20 = load i64, i64* %11
%21 = icmp eq i64 %20, 1074462720
%22 = zext i1 %21 to i32
%23 = call i32 @DEBUG_ASSERT(i32 %22)
%24 = load i64, i64* %11
%25 = add i64 %24, 276
%26 = inttoptr i64 %25 to i64*
%27 = load volatile i64, i64* %26
%28 = icmp eq i64 %27, 4294967295
br i1 %28, label %29, label %30
29: ; preds = %9
store i64 0, i64* %10
br label %41
30: ; preds = %9
%31 = load i64, i64* %11
%32 = load i8, i8* %12
%33 = load i8, i8* %13
%34 = load i8, i8* %14
%35 = load i8, i8* %15
%36 = load i64, i64* %16
%37 = load i8, i8* %17
%38 = load i64, i64* %18
%39 = load i64, i64* %19
%40 = call i32 @PECIAdvCmdSend(i64 %31, i8 zeroext %32, i8 zeroext %33, i8 zeroext %34, i8 zeroext %35, i64 %36, i8 zeroext %37, i64 %38, i64 %39)
store i64 1, i64* %10
br label %41
41: ; preds = %30, %29
%42 = load i64, i64* %10
ret i64 %42
}

LLVM IR (-O2):
define i64 @PECIAdvCmdSendNonBlocking(i64 %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8 zeroext %4, i64 %5, i8 zeroext %6, i64 %7, i64 %8) {
%10 = icmp eq i64 %0, 1074462720
%11 = zext i1 %10 to i32
%12 = tail call i32 @DEBUG_ASSERT(i32 %11)
%13 = add i64 %0, 276
%14 = inttoptr i64 %13 to i64*
%15 = load volatile i64, i64* %14
%16 = icmp eq i64 %15, 4294967295
br i1 %16, label %19, label %17
17: ; preds = %9
%18 = tail call i32 @PECIAdvCmdSend(i64 %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3, i8 zeroext %4, i64 %5, i8 zeroext %6, i64 %7, i64 %8)
br label %19
19: ; preds = %9, %17
%20 = phi i64 [ 1, %17 ], [ 0, %9 ]
ret i64 %20
}