xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ parse_cmdline(int, char **);
int /*<<< orphan*/ produce_beacon();
int /*<<< orphan*/ read_values();
int /*<<< orphan*/ sleep(int);
int main(int argc, char **argv) {
  parse_cmdline(argc, argv);
  while (1) {
    read_values();
    produce_beacon();
    sleep(10);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1050 <parse_cmdline@plt>
mov    $0x0,%al
call   1040 <read_values@plt>
mov    $0x0,%al
call   1030 <produce_beacon@plt>
mov    $0xa,%edi
call   1060 <sleep@plt>
jmp    1162 <main+0x22>

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1050 <parse_cmdline@plt>
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <read_values@plt>
xor    %eax,%eax
call   1030 <produce_beacon@plt>
mov    $0xa,%edi
call   1060 <sleep@plt>
jmp    1150 <main+0x10>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @parse_cmdline(i32 %6, i8** %7)
br label %9
9: ; preds = %2, %9
%10 = call i32 (...) @read_values()
%11 = call i32 (...) @produce_beacon()
%12 = call i32 @sleep(i32 10)
br label %9
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @parse_cmdline(i32 %0, i8** %1)
br label %4
4: ; preds = %2, %4
%5 = tail call i32 (...) @read_values()
%6 = tail call i32 (...) @produce_beacon()
%7 = tail call i32 @sleep(i32 10)
br label %4
}
int time_after_eq(unsigned long now, unsigned long finish) {
  return (now >= finish);
}


x86 assembly (clang, -O0):
<time_after_eq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_after_eq>:
xor    %eax,%eax
cmp    %rsi,%rdi
setae  %al
ret

LLVM IR (-O0):
define i32 @time_after_eq(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp uge i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @time_after_eq(i64 %0, i64 %1) {
%3 = icmp uge i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
char *scout_h16(char const *);
char const *scout_ipv6address_rh1(char const *);
const char *scout_ipv6address_rh2(const char *c) {
  if ((c = scout_h16(c)) == NULL)
    return NULL;
  if (*(c + 1) == ':')
    return scout_ipv6address_rh1(c + 2);
  return NULL;
}


x86 assembly (clang, -O0):
<scout_ipv6address_rh2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <scout_h16@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1150 <scout_ipv6address_rh2+0x30>
movq   $0x0,-0x8(%rbp)
jmp    117f <scout_ipv6address_rh2+0x5f>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x3a,%eax
jne    1177 <scout_ipv6address_rh2+0x57>
mov    -0x10(%rbp),%rdi
add    $0x2,%rdi
call   1040 <scout_ipv6address_rh1@plt>
mov    %rax,-0x8(%rbp)
jmp    117f <scout_ipv6address_rh2+0x5f>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scout_ipv6address_rh2>:
push   %rax
call   1030 <scout_h16@plt>
test   %rax,%rax
je     113e <scout_ipv6address_rh2+0x1e>
cmpb   $0x3a,0x1(%rax)
jne    113e <scout_ipv6address_rh2+0x1e>
add    $0x2,%rax
mov    %rax,%rdi
pop    %rax
jmp    1040 <scout_ipv6address_rh1@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i8* @scout_ipv6address_rh2(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i8* @scout_h16(i8* %4)
store i8* %5, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* null, i8** %2
br label %19
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 58
br i1 %13, label %14, label %18
14: ; preds = %8
%15 = load i8*, i8** %3
%16 = getelementptr inbounds i8, i8* %15, i64 2
%17 = call i8* @scout_ipv6address_rh1(i8* %16)
store i8* %17, i8** %2
br label %19
18: ; preds = %8
store i8* null, i8** %2
br label %19
19: ; preds = %18, %14, %7
%20 = load i8*, i8** %2
ret i8* %20
}

LLVM IR (-O2):
define i8* @scout_ipv6address_rh2(i8* %0) {
%2 = tail call i8* @scout_h16(i8* %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, i8* %2, i64 1
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 58
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = getelementptr inbounds i8, i8* %2, i64 2
%10 = tail call i8* @scout_ipv6address_rh1(i8* %9)
br label %11
11: ; preds = %4, %1, %8
%12 = phi i8* [ %10, %8 ], [ null, %1 ], [ null, %4 ]
ret i8* %12
}
unsigned long long dynref__nvals(const struct dynref__obj *p) {}


x86 assembly (clang, -O0):
<dynref__nvals>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dynref__nvals>:
ret

LLVM IR (-O0):
%struct.dynref__obj = type opaque
define i64 @dynref__nvals(%struct.dynref__obj* %0) {
%2 = alloca i64
%3 = alloca %struct.dynref__obj*
store %struct.dynref__obj* %0, %struct.dynref__obj** %3
%4 = load i64, i64* %2
ret i64 %4
}

LLVM IR (-O2):
%struct.dynref__obj = type opaque
define i64 @dynref__nvals(%struct.dynref__obj* nocapture readnone %0) {
ret i64 undef
}
unsigned bitarithm_bits_set(unsigned v) {
  unsigned c;
  for (c = 0; v; c++) {
    v &= v - 1;
  }
  return c;
}


x86 assembly (clang, -O0):
<bitarithm_bits_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1132 <bitarithm_bits_set+0x32>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <bitarithm_bits_set+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitarithm_bits_set>:
xor    %eax,%eax
test   %edi,%edi
je     111c <bitarithm_bits_set+0x1c>
cs nopw 0x0(%rax,%rax,1)
lea    -0x1(%rdi),%ecx
add    $0x1,%eax
and    %edi,%ecx
mov    %ecx,%edi
jne    1110 <bitarithm_bits_set+0x10>
ret

LLVM IR (-O0):
define i32 @bitarithm_bits_set(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %12, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %2
%9 = sub i32 %8, 1
%10 = load i32, i32* %2
%11 = and i32 %10, %9
store i32 %11, i32* %2
br label %12
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add i32 %13, 1
store i32 %14, i32* %3
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @bitarithm_bits_set(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i32 [ %7, %3 ], [ %0, %1 ]
%6 = add i32 %5, -1
%7 = and i32 %6, %5
%8 = add i32 %4, 1
%9 = icmp eq i32 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %11
}
void INT32(void *msg_buf) {}


x86 assembly (clang, -O0):
<INT32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT32>:
ret

LLVM IR (-O0):
define void @INT32(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @INT32(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int __builtin_wasm_memory_atomic_wait64(long long *, long long, long long);
int memory_atomic_wait64(long long *addr, long long expected,
                         long long timeout) {
  return __builtin_wasm_memory_atomic_wait64(addr, expected, timeout);
}


x86 assembly (clang, -O0):
<memory_atomic_wait64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <__builtin_wasm_memory_atomic_wait64@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memory_atomic_wait64>:
jmp    1030 <__builtin_wasm_memory_atomic_wait64@plt>

LLVM IR (-O0):
define i32 @memory_atomic_wait64(i64* %0, i64 %1, i64 %2) {
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64*, i64** %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i32 @__builtin_wasm_memory_atomic_wait64(i64* %7, i64 %8, i64 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @memory_atomic_wait64(i64* %0, i64 %1, i64 %2) {
%4 = tail call i32 @__builtin_wasm_memory_atomic_wait64(i64* %0, i64 %1, i64 %2)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
int /*<<< orphan*/ HibernateWriteComplete();
void HibernateIntEnable(unsigned long ulIntFlags) {
  DEBUG_ASSERT(!(ulIntFlags & ~(0x00000008 | 0x00000004 | 0x00000001 |
                                0x00000002 | 0x00000010)));
  (*((volatile unsigned long *)(0x400FC014))) |= ulIntFlags;
  HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xffffffffffffffe0,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    $0x400fc014,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x400fc014,%eax
mov    %rcx,(%rax)
mov    $0x0,%al
call   1030 <HibernateWriteComplete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateIntEnable>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
cmp    $0x20,%rbx
setb   %dil
call   1040 <DEBUG_ASSERT@plt>
or     %rbx,0x400fc014
40
xor    %eax,%eax
pop    %rbx
jmp    1030 <HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateIntEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, -32
%5 = icmp ne i64 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
%8 = call i32 @DEBUG_ASSERT(i32 %7)
%9 = load i64, i64* %2
%10 = load volatile i64, i64* inttoptr (i64 1074774036 to i64*)
%11 = or i64 %10, %9
store volatile i64 %11, i64* inttoptr (i64 1074774036 to i64*)
%12 = call i32 (...) @HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateIntEnable(i64 %0) {
%2 = icmp ult i64 %0, 32
%3 = zext i1 %2 to i32
%4 = tail call i32 @DEBUG_ASSERT(i32 %3)
%5 = load volatile i64, i64* inttoptr (i64 1074774036 to i64*)
%6 = or i64 %5, %0
store volatile i64 %6, i64* inttoptr (i64 1074774036 to i64*)
%7 = tail call i32 (...) @HibernateWriteComplete()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void err_quit(char *str) {
  fprintf(stderr, "%s", str);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<err_quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e8c(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<err_quit>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
@EXIT_FAILURE = global i32 0
define void @err_quit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = call i32 @exit(i32 %6)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [3 x i8] c"%s\00"
@EXIT_FAILURE = global i32 0
define void @err_quit(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @EXIT_FAILURE
%5 = tail call i32 @exit(i32 %4)
unreachable
}
/* Variables and functions */
int C(int, int, int);
__attribute__((no)) int B(int x, int y, int z) {
  return C(x, y, z) + x + y + z;
}


x86 assembly (clang, -O0):
<B>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <C@plt>
add    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<B>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
call   1030 <C@plt>
add    %ebx,%ebp
add    %r14d,%ebp
add    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @B(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @C(i32 %7, i32 %8, i32 %9)
%11 = load i32, i32* %4
%12 = add nsw i32 %10, %11
%13 = load i32, i32* %5
%14 = add nsw i32 %12, %13
%15 = load i32, i32* %6
%16 = add nsw i32 %14, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @B(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @C(i32 %0, i32 %1, i32 %2)
%5 = add i32 %1, %0
%6 = add i32 %5, %2
%7 = add i32 %6, %4
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ flush();
int /*<<< orphan*/ scanf(char *, int *);
int getInt() {
  int num;
  scanf("%d", &num);
  flush();
  return num;
}


x86 assembly (clang, -O0):
<getInt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    $0x0,%al
call   1030 <flush@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getInt>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
xor    %eax,%eax
call   1030 <flush@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @getInt() {
%1 = alloca i32
%2 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%3 = call i32 (...) @flush()
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @getInt() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = call i32 (...) @flush()
%5 = load i32, i32* %1
ret i32 %5
}
int isword(int c) {
  return (c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z') ||
         (c >= '0' && c <= '9') || (c == '_') || (c >= 128);
}


x86 assembly (clang, -O0):
<isword>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x61,-0x4(%rbp)
jl     1120 <isword+0x20>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116e <isword+0x6e>
cmpl   $0x41,-0x4(%rbp)
jl     1139 <isword+0x39>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116e <isword+0x6e>
cmpl   $0x30,-0x4(%rbp)
jl     1152 <isword+0x52>
mov    $0x1,%al
cmpl   $0x39,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    116e <isword+0x6e>
mov    $0x1,%al
cmpl   $0x5f,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     116e <isword+0x6e>
cmpl   $0x80,-0x4(%rbp)
setge  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isword>:
mov    %edi,%ecx
and    $0xffffffdf,%ecx
add    $0xffffffbf,%ecx
mov    $0x1,%eax
cmp    $0x1a,%ecx
jb     1127 <isword+0x27>
cmp    $0x5f,%edi
je     1127 <isword+0x27>
lea    -0x30(%rdi),%ecx
cmp    $0xa,%ecx
jb     1127 <isword+0x27>
xor    %eax,%eax
cmp    $0x7f,%edi
setg   %al
ret

LLVM IR (-O0):
define i32 @isword(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 97
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 122
br i1 %7, label %26, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 65
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 90
br i1 %13, label %26, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 48
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 57
br i1 %19, label %26, label %20
20: ; preds = %17, %14
%21 = load i32, i32* %2
%22 = icmp eq i32 %21, 95
br i1 %22, label %26, label %23
23: ; preds = %20
%24 = load i32, i32* %2
%25 = icmp sge i32 %24, 128
br label %26
26: ; preds = %23, %20, %17, %11, %5
%27 = phi i1 [ true, %20 ], [ true, %17 ], [ true, %11 ], [ true, %5 ], [ %25, %23 ]
%28 = zext i1 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @isword(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
br i1 %4, label %13, label %5
5: ; preds = %1
%6 = add i32 %0, -48
%7 = icmp ult i32 %6, 10
%8 = icmp eq i32 %0, 95
%9 = or i1 %8, %7
br i1 %9, label %13, label %10
10: ; preds = %5
%11 = icmp sgt i32 %0, 127
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %5, %1, %10
%14 = phi i32 [ %12, %10 ], [ 1, %1 ], [ 1, %5 ]
ret i32 %14
}
/* Variables and functions */
double FLT_MANT_DIG;
double FLT_MAX;
double FLT_MIN;
int /*<<< orphan*/ printf(char *, double);
int main() {
  printf("The maximum value of float = %.10e\n", FLT_MAX);
  printf("The minimum value of float = %.10e\n", FLT_MIN);
  printf("The number of digits in the number = %.10e\n", FLT_MANT_DIG);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
movsd  (%rax),%xmm0
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eb6(%rip),%rax
movsd  (%rax),%xmm0
lea    0xee7(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e87(%rip),%rax
movsd  (%rax),%xmm0
lea    0xef4(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
movsd  (%rax),%xmm0
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eb9(%rip),%rax
movsd  (%rax),%xmm0
lea    0xeea(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e8a(%rip),%rax
movsd  (%rax),%xmm0
lea    0xef7(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"The maximum value of float = %.10e\0A\00"
@FLT_MAX = global double 0.000000e+00
@.str.1 = [36 x i8] c"The minimum value of float = %.10e\0A\00"
@FLT_MIN = global double 0.000000e+00
@.str.2 = [44 x i8] c"The number of digits in the number = %.10e\0A\00"
@FLT_MANT_DIG = global double 0.000000e+00
define i32 @main() {
%1 = load double, double* @FLT_MAX
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), double %1)
%3 = load double, double* @FLT_MIN
%4 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0), double %3)
%5 = load double, double* @FLT_MANT_DIG
%6 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str.2, i64 0, i64 0), double %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [36 x i8] c"The maximum value of float = %.10e\0A\00"
@FLT_MAX = global double 0.000000e+00
@.str.1 = [36 x i8] c"The minimum value of float = %.10e\0A\00"
@FLT_MIN = global double 0.000000e+00
@.str.2 = [44 x i8] c"The number of digits in the number = %.10e\0A\00"
@FLT_MANT_DIG = global double 0.000000e+00
define i32 @main() {
%1 = load double, double* @FLT_MAX
%2 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), double %1)
%3 = load double, double* @FLT_MIN
%4 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0), double %3)
%5 = load double, double* @FLT_MANT_DIG
%6 = tail call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str.2, i64 0, i64 0), double %5)
ret i32 0
}
int m_getdcd(fd)
int fd;
{
  (void)fd;
  return (0);
}


x86 assembly (clang, -O0):
<m_getdcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<m_getdcd>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @m_getdcd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @m_getdcd(i32 %0) {
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t weird_ror8(uint8_t input, int count) {
  if (count == 0)
    return 0;
  return ((input >> count) & 0xff) | (input & 0xff) << (8 - count);
}


x86 assembly (clang, -O0):
<weird_ror8>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    1120 <weird_ror8+0x20>
movl   $0x0,-0x4(%rbp)
jmp    1147 <weird_ror8+0x47>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
and    $0xff,%eax
mov    -0x8(%rbp),%edx
and    $0xff,%edx
mov    $0x8,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<weird_ror8>:
test   %esi,%esi
je     111b <weird_ror8+0x1b>
mov    %edi,%eax
mov    %esi,%ecx
sar    %cl,%eax
movzbl %al,%edx
movzbl %dil,%eax
mov    $0x8,%cl
sub    %sil,%cl
shl    %cl,%eax
or     %edx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @weird_ror8(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %20
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = ashr i32 %10, %11
%13 = and i32 %12, 255
%14 = load i32, i32* %4
%15 = and i32 %14, 255
%16 = load i32, i32* %5
%17 = sub nsw i32 8, %16
%18 = shl i32 %15, %17
%19 = or i32 %13, %18
store i32 %19, i32* %3
br label %20
20: ; preds = %9, %8
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @weird_ror8(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = ashr i32 %0, %1
%6 = and i32 %5, 255
%7 = and i32 %0, 255
%8 = sub nsw i32 8, %1
%9 = shl i32 %7, %8
%10 = or i32 %6, %9
br label %11
11: ; preds = %2, %4
%12 = phi i32 [ %10, %4 ], [ 0, %2 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ little_endian_read_16(int /*<<< orphan*/ const *, int);
uint16_t bnep_event_channel_timeout_get_source_uuid(const uint8_t *event) {
  return little_endian_read_16(event, 4);
}


x86 assembly (clang, -O0):
<bnep_event_channel_timeout_get_source_uuid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1030 <little_endian_read_16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bnep_event_channel_timeout_get_source_uuid>:
mov    $0x4,%esi
jmp    1030 <little_endian_read_16@plt>

LLVM IR (-O0):
define i32 @bnep_event_channel_timeout_get_source_uuid(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @little_endian_read_16(i32* %3, i32 4)
ret i32 %4
}

LLVM IR (-O2):
define i32 @bnep_event_channel_timeout_get_source_uuid(i32* %0) {
%2 = tail call i32 @little_endian_read_16(i32* %0, i32 4)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ log_error(char *, int);
int /*<<< orphan*/ seq_ctrl_set_record_mode(int /*<<< orphan*/);
int /*<<< orphan*/ seq_engine_get_current_scene();
int /*<<< orphan*/ song_copy_scene(int, int /*<<< orphan*/);
void seq_ctrl_copy_scene(int dest_scene) {
  if (dest_scene < 0 || dest_scene >= 6) {
    log_error("sccs - scene invalid: %d", dest_scene);
    return;
  }
  seq_ctrl_set_record_mode(0);
  song_copy_scene(dest_scene, seq_engine_get_current_scene());
}


x86 assembly (clang, -O0):
<seq_ctrl_copy_scene>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     115f <seq_ctrl_copy_scene+0x1f>
cmpl   $0x6,-0x4(%rbp)
jl     1173 <seq_ctrl_copy_scene+0x33>
mov    -0x4(%rbp),%esi
lea    0xe97(%rip),%rdi
call   1030 <log_error@plt>
jmp    1191 <seq_ctrl_copy_scene+0x51>
xor    %edi,%edi
call   1040 <seq_ctrl_set_record_mode@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1050 <seq_engine_get_current_scene@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%esi
call   1060 <song_copy_scene@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seq_ctrl_copy_scene>:
push   %rbx
mov    %edi,%ebx
cmp    $0x6,%edi
jb     1157 <seq_ctrl_copy_scene+0x17>
lea    0xeb1(%rip),%rdi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <log_error@plt>
xor    %edi,%edi
call   1040 <seq_ctrl_set_record_mode@plt>
xor    %eax,%eax
call   1050 <seq_engine_get_current_scene@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1060 <song_copy_scene@plt>

LLVM IR (-O0):
@.str = [25 x i8] c"sccs - scene invalid: %d\00"
define void @seq_ctrl_copy_scene(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sge i32 %6, 6
br i1 %7, label %8, label %11
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = call i32 @log_error(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %9)
br label %16
11: ; preds = %5
%12 = call i32 @seq_ctrl_set_record_mode(i32 0)
%13 = load i32, i32* %2
%14 = call i32 (...) @seq_engine_get_current_scene()
%15 = call i32 @song_copy_scene(i32 %13, i32 %14)
br label %16
16: ; preds = %11, %8
ret void
}

LLVM IR (-O2):
@.str = [25 x i8] c"sccs - scene invalid: %d\00"
define void @seq_ctrl_copy_scene(i32 %0) {
%2 = icmp ugt i32 %0, 5
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @log_error(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0), i32 %0)
br label %9
5: ; preds = %1
%6 = tail call i32 @seq_ctrl_set_record_mode(i32 0)
%7 = tail call i32 (...) @seq_engine_get_current_scene()
%8 = tail call i32 @song_copy_scene(i32 %0, i32 %7)
br label %9
9: ; preds = %5, %3
ret void
}
char switch_itodtmf(char i) {
  char r = i;
  if (i > 9 && i < 14) {
    r += 55;
  } else {
    r += 48;
  }
  return r;
}


x86 assembly (clang, -O0):
<switch_itodtmf>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x9,%eax
jle    1139 <switch_itodtmf+0x39>
movsbl -0x1(%rbp),%eax
cmp    $0xe,%eax
jge    1139 <switch_itodtmf+0x39>
movsbl -0x2(%rbp),%eax
add    $0x37,%eax
mov    %al,-0x2(%rbp)
jmp    1143 <switch_itodtmf+0x43>
movsbl -0x2(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_itodtmf>:
lea    -0xa(%rdi),%eax
cmp    $0x4,%al
mov    $0x37,%ecx
mov    $0x30,%eax
cmovb  %ecx,%eax
add    %dil,%al
ret

LLVM IR (-O0):
define signext i8 @switch_itodtmf(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
store i8 %4, i8* %3
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = icmp sgt i32 %6, 9
br i1 %7, label %8, label %17
8: ; preds = %1
%9 = load i8, i8* %2
%10 = sext i8 %9 to i32
%11 = icmp slt i32 %10, 14
br i1 %11, label %12, label %17
12: ; preds = %8
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = add nsw i32 %14, 55
%16 = trunc i32 %15 to i8
store i8 %16, i8* %3
br label %22
17: ; preds = %8, %1
%18 = load i8, i8* %3
%19 = sext i8 %18 to i32
%20 = add nsw i32 %19, 48
%21 = trunc i32 %20 to i8
store i8 %21, i8* %3
br label %22
22: ; preds = %17, %12
%23 = load i8, i8* %3
ret i8 %23
}

LLVM IR (-O2):
define signext i8 @switch_itodtmf(i8 signext %0) {
%2 = add i8 %0, -10
%3 = icmp ult i8 %2, 4
%4 = select i1 %3, i8 55, i8 48
%5 = add i8 %4, %0
ret i8 %5
}
/* Variables and functions */
int add_and_fetch(int *, int);
int fetch_and_add(int *, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int a = 3;
  int c = 3;
  printf("%d\n", fetch_and_add(&a, 4));
  printf("%d\n", add_and_fetch(&c, 4));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x3,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
lea    -0x4(%rbp),%rdi
mov    $0x4,%esi
call   1030 <fetch_and_add@plt>
mov    %eax,%esi
lea    0xea3(%rip),%rdi
call   1040 <printf@plt>
lea    -0x8(%rbp),%rdi
mov    $0x4,%esi
call   1050 <add_and_fetch@plt>
mov    %eax,%esi
lea    0xe87(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0x3,0xc(%rsp)
movl   $0x3,0x8(%rsp)
lea    0xc(%rsp),%rdi
mov    $0x4,%esi
call   1030 <fetch_and_add@plt>
lea    0xea5(%rip),%rbx
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
lea    0x8(%rsp),%rdi
mov    $0x4,%esi
call   1050 <add_and_fetch@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 3, i32* %1
store i32 3, i32* %2
%3 = call i32 @fetch_and_add(i32* %1, i32 4)
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 @add_and_fetch(i32* %2, i32 4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 3, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 3, i32* %2
%5 = call i32 @fetch_and_add(i32* %1, i32 4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = call i32 @add_and_fetch(i32* %2, i32 4)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}
void XGetWMNormalHints() {}


x86 assembly (clang, -O0):
<XGetWMNormalHints>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XGetWMNormalHints>:
ret

LLVM IR (-O0):
define void @XGetWMNormalHints() {
ret void
}

LLVM IR (-O2):
define void @XGetWMNormalHints() {
ret void
}
int f_le_rc1(float a1) { return (((a1) <= (100))); }


x86 assembly (clang, -O0):
<f_le_rc1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
ucomiss -0x4(%rbp),%xmm0
setae  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_le_rc1>:
movss  0xef8(%rip),%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
setae  %al
ret

LLVM IR (-O0):
define i32 @f_le_rc1(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fcmp ole float %3, 1.000000e+02
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @f_le_rc1(float %0) {
%2 = fcmp ole float %0, 1.000000e+02
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void print_text(char *text) { printf("Text is %s \n", text); }


x86 assembly (clang, -O0):
<print_text>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_text>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Text is %s \0A\00"
define void @print_text(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"Text is %s \0A\00"
define void @print_text(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ input;
};
typedef TYPE_1__ XWMHints;

/* Variables and functions */
int get_XWMHints_input(void *_p) { return (int)((XWMHints *)_p)->input; }


x86 assembly (clang, -O0):
<get_XWMHints_input>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XWMHints_input>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XWMHints_input(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XWMHints_input(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Type definitions */
struct st {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ bar(struct st *);
void foo2(struct st *s) { bar(s); }


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <bar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
jmp    1030 <bar@plt>

LLVM IR (-O0):
%struct.st = type { i32 }
define void @foo2(%struct.st* %0) {
%2 = alloca %struct.st*
store %struct.st* %0, %struct.st** %2
%3 = load %struct.st*, %struct.st** %2
%4 = call i32 @bar(%struct.st* %3)
ret void
}

LLVM IR (-O2):
%struct.st = type { i32 }
define void @foo2(%struct.st* %0) {
%2 = tail call i32 @bar(%struct.st* %0)
ret void
}
/* Variables and functions */
int my_function() { return 0xbaba; }


x86 assembly (clang, -O0):
<my_function>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbaba,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_function>:
mov    $0xbaba,%eax
ret

LLVM IR (-O0):
define i32 @my_function() {
ret i32 47802
}

LLVM IR (-O2):
define i32 @my_function() {
ret i32 47802
}
/* Variables and functions */
int print(char **, int *);
int sprintf(char *out, const char *format, ...) {
  register int *varg = (int *)(&format);
  return print(&out, varg);
}


x86 assembly (clang, -O0):
<sprintf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    -0x8(%rbp),%rdi
call   1030 <print@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprintf>:
sub    $0x18,%rsp
mov    %rdi,0x10(%rsp)
mov    %rsi,0x8(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1030 <print@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @sprintf(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = bitcast i8** %4 to i32*
store i32* %6, i32** %5
%7 = load i32*, i32** %5
%8 = call i32 @print(i8** %3, i32* %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @sprintf(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = bitcast i8** %4 to i32*
%6 = call i32 @print(i8** %3, i32* %5)
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ platform_inl(unsigned long);
void __insl(unsigned long port, void *dst, unsigned long count) {
  unsigned int *dp = dst;
  while (count--)
    *dp++ = platform_inl(port);
}


x86 assembly (clang, -O0):
<__insl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x18(%rbp)
cmp    $0x0,%rax
je     1166 <__insl+0x56>
mov    -0x8(%rbp),%rdi
call   1030 <platform_inl@plt>
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
mov    %rax,%rdx
add    $0x4,%rdx
mov    %rdx,-0x20(%rbp)
mov    %ecx,(%rax)
jmp    112c <__insl+0x1c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__insl>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rdx,%rdx
je     1145 <__insl+0x35>
mov    %rdx,%r12
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    %r15,%rdi
call   1030 <platform_inl@plt>
mov    %eax,(%r14,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <__insl+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @__insl(i64 %0, i8* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32*
store i64 %0, i64* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = load i8*, i8** %5
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %7
br label %10
10: ; preds = %14, %3
%11 = load i64, i64* %6
%12 = add i64 %11, -1
store i64 %12, i64* %6
%13 = icmp ne i64 %11, 0
br i1 %13, label %14, label %19
14: ; preds = %10
%15 = load i64, i64* %4
%16 = call i32 @platform_inl(i64 %15)
%17 = load i32*, i32** %7
%18 = getelementptr inbounds i32, i32* %17, i32 1
store i32* %18, i32** %7
store i32 %16, i32* %17
br label %10
19: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @__insl(i64 %0, i8* nocapture writeonly %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %14, label %5
5: ; preds = %3
%6 = bitcast i8* %1 to i32*
br label %7
7: ; preds = %5, %7
%8 = phi i32* [ %12, %7 ], [ %6, %5 ]
%9 = phi i64 [ %10, %7 ], [ %2, %5 ]
%10 = add i64 %9, -1
%11 = tail call i32 @platform_inl(i64 %0)
%12 = getelementptr inbounds i32, i32* %8, i64 1
store i32 %11, i32* %8
%13 = icmp eq i64 %10, 0
br i1 %13, label %14, label %7
14: ; preds = %7, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ indicator_clr();
void indicator_initialize(void) {
  ;
  indicator_clr();
}


x86 assembly (clang, -O0):
<indicator_initialize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <indicator_clr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<indicator_initialize>:
xor    %eax,%eax
jmp    1030 <indicator_clr@plt>

LLVM IR (-O0):
define void @indicator_initialize() {
%1 = call i32 (...) @indicator_clr()
ret void
}

LLVM IR (-O2):
define void @indicator_initialize() {
%1 = tail call i32 (...) @indicator_clr()
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
void sprint_xrl_data(char *str, uint8_t data) {
  sprintf(str,
          "XRL   A, #"
          "0x%02X"
          "                  ",
          data);
}


x86 assembly (clang, -O0):
<sprint_xrl_data>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sprint_xrl_data>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"XRL A,x%02X \00"
define void @sprint_xrl_data(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [35 x i8] c"XRL A,x%02X \00"
define void @sprint_xrl_data(i8* nocapture writeonly %0, i32 %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
void ocl_hw_raise() {}


x86 assembly (clang, -O0):
<ocl_hw_raise>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ocl_hw_raise>:
ret

LLVM IR (-O0):
define void @ocl_hw_raise() {
ret void
}

LLVM IR (-O2):
define void @ocl_hw_raise() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ jet_sleep(int);
int write_block(int, int, int /*<<< orphan*/, int /*<<< orphan*/,
                int /*<<< orphan*/, int /*<<< orphan*/);
int dynamixelStop(int servo) {
  int ret = write_block(103, servo, 0, 0, 0, 0);
  jet_sleep(50);
  return ret;
}


x86 assembly (clang, -O0):
<dynamixelStop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x67,%edi
xor    %r9d,%r9d
mov    %r9d,%edx
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <write_block@plt>
mov    %eax,-0x8(%rbp)
mov    $0x32,%edi
call   1040 <jet_sleep@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dynamixelStop>:
push   %rbx
mov    %edi,%esi
mov    $0x67,%edi
xor    %edx,%edx
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
call   1030 <write_block@plt>
mov    %eax,%ebx
mov    $0x32,%edi
call   1040 <jet_sleep@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @dynamixelStop(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @write_block(i32 103, i32 %4, i32 0, i32 0, i32 0, i32 0)
store i32 %5, i32* %3
%6 = call i32 @jet_sleep(i32 50)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @dynamixelStop(i32 %0) {
%2 = tail call i32 @write_block(i32 103, i32 %0, i32 0, i32 0, i32 0, i32 0)
%3 = tail call i32 @jet_sleep(i32 50)
ret i32 %2
}
/* Type definitions */
typedef int uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ add_sentence(int *, int /*<<< orphan*/ *, int *, int);
void gen_st_speed(uint8_t *b, uint32_t *buflen) {
  uint8_t sentence[] = {0x20, 0xF1, 0xA0, 0x00};
  add_sentence(b, buflen, sentence, 4);
}


x86 assembly (clang, -O0):
<gen_st_speed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xed9(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0xed6(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x20(%rbp),%rdx
mov    $0x4,%ecx
call   1030 <add_sentence@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_st_speed>:
sub    $0x18,%rsp
movaps 0xee5(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdx
mov    $0x4,%ecx
call   1030 <add_sentence@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.gen_st_speed.sentence = [4 x i32] [i32 32, i32 241, i32 160, i32 0]
define void @gen_st_speed(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca [4 x i32]
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = bitcast [4 x i32]* %5 to i8*
%7 = load i32*, i32** %3
%8 = load i32*, i32** %4
%9 = getelementptr inbounds [4 x i32], [4 x i32]* %5, i64 0, i64 0
%10 = call i32 @add_sentence(i32* %7, i32* %8, i32* %9, i32 4)
ret void
}

LLVM IR (-O2):
@__const.gen_st_speed.sentence = [4 x i32] [i32 32, i32 241, i32 160, i32 0]
define void @gen_st_speed(i32* %0, i32* %1) {
%3 = alloca [4 x i32]
%4 = bitcast [4 x i32]* %3 to i8*
%5 = getelementptr inbounds [4 x i32], [4 x i32]* %3, i64 0, i64 0
%6 = call i32 @add_sentence(i32* %0, i32* %1, i32* %5, i32 4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int (*)(int const));
int funzione_a(const int a) {
  int (*p)(const int) = funzione_a;
  printf("sono la funzione a e il mio valore e %p\n", p);
  return a;
}


x86 assembly (clang, -O0):
<funzione_a>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ece(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xecf(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<funzione_a>:
push   %rbx
mov    %edi,%ebx
lea    0xee6(%rip),%rdi
mov    0x2ecf(%rip),%rsi
call   1030 <printf@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [41 x i8] c"sono la funzione a e il mio valore e %p\0A\00"
define i32 @funzione_a(i32 %0) {
%2 = alloca i32
%3 = alloca i32 (i32)*
store i32 %0, i32* %2
store i32 (i32)* @funzione_a, i32 (i32)** %3
%4 = load i32 (i32)*, i32 (i32)** %3
%5 = call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 (i32)* %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
@.str = [41 x i8] c"sono la funzione a e il mio valore e %p\0A\00"
define i32 @funzione_a(i32 returned %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 (i32)* @funzione_a)
ret i32 %0
}
int test_imm_83int8_mem(signed char *val) {
  return ((*val) & (0x83 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_83int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x83,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_83int8_mem>:
testb  $0x83,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_83int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 131
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_83int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -125
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void gdk_drawable_get_screen() {}


x86 assembly (clang, -O0):
<gdk_drawable_get_screen>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_drawable_get_screen>:
ret

LLVM IR (-O0):
define void @gdk_drawable_get_screen() {
ret void
}

LLVM IR (-O2):
define void @gdk_drawable_get_screen() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int, int, int, int, int, int, int);
void f2(int a, int b, int c, int d, int e, int f, int g, int h, int i) {
  printf("%d %d %d %d %d %d %d %d %d\n", a, b, c, d, e, f, g, h, i);
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
sub    $0x38,%rsp
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
mov    -0x1c(%rbp),%r9d
mov    -0x20(%rbp),%ebx
mov    0x10(%rbp),%r11d
mov    0x18(%rbp),%r10d
mov    0x20(%rbp),%eax
lea    0xea4(%rip),%rdi
mov    %ebx,(%rsp)
mov    %r11d,0x8(%rsp)
mov    %r10d,0x10(%rsp)
mov    %eax,0x18(%rsp)
call   1030 <printf@plt>
add    $0x38,%rsp
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
push   %rbx
mov    %r9d,%eax
mov    %r8d,%r9d
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %edi,%esi
mov    0x10(%rsp),%r10d
mov    0x18(%rsp),%r11d
mov    0x20(%rsp),%ebx
lea    0xecb(%rip),%rdi
push   %rbx
push   %r11
push   %r10
push   %rax
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"%d %d %d %d %d %d %d %d %d\0A\00"
define void @f2(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8) {
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
store i32 %0, i32* %10
store i32 %1, i32* %11
store i32 %2, i32* %12
store i32 %3, i32* %13
store i32 %4, i32* %14
store i32 %5, i32* %15
store i32 %6, i32* %16
store i32 %7, i32* %17
store i32 %8, i32* %18
%19 = load i32, i32* %10
%20 = load i32, i32* %11
%21 = load i32, i32* %12
%22 = load i32, i32* %13
%23 = load i32, i32* %14
%24 = load i32, i32* %15
%25 = load i32, i32* %16
%26 = load i32, i32* %17
%27 = load i32, i32* %18
%28 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %19, i32 %20, i32 %21, i32 %22, i32 %23, i32 %24, i32 %25, i32 %26, i32 %27)
ret void
}

LLVM IR (-O2):
@.str = [28 x i8] c"%d %d %d %d %d %d %d %d %d\0A\00"
define void @f2(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8) {
%10 = tail call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8)
ret void
}
void foo669() {}


x86 assembly (clang, -O0):
<foo669>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo669>:
ret

LLVM IR (-O0):
define void @foo669() {
ret void
}

LLVM IR (-O2):
define void @foo669() {
ret void
}