xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ show_usage();
int cmd_help(int argc, char **argv) {
  show_usage();
  return 0;
}


x86 assembly (clang, -O0):
<cmd_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <show_usage@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_help>:
push   %rax
xor    %eax,%eax
call   1030 <show_usage@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cmd_help(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @show_usage()
ret i32 0
}

LLVM IR (-O2):
define i32 @cmd_help(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @show_usage()
ret i32 0
}
/* Variables and functions */
double fabs(double);
double deadzone(double value, double zone) {
  return fabs(value) >= zone ? value : 0.0;
}


x86 assembly (clang, -O0):
<deadzone>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movaps 0xee6(%rip),%xmm1
pand   %xmm1,%xmm0
ucomisd -0x10(%rbp),%xmm0
jb     1138 <deadzone+0x38>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1145 <deadzone+0x45>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1145 <deadzone+0x45>
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<deadzone>:
movapd 0xef8(%rip),%xmm2
andpd  %xmm0,%xmm2
cmplesd %xmm2,%xmm1
andpd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @deadzone(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = call double @llvm.fabs.f64(double %5)
%7 = load double, double* %4
%8 = fcmp oge double %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load double, double* %3
br label %12
11: ; preds = %2
br label %12
12: ; preds = %11, %9
%13 = phi double [ %10, %9 ], [ 0.000000e+00, %11 ]
ret double %13
}

LLVM IR (-O2):
define double @deadzone(double %0, double %1) {
%3 = tail call double @llvm.fabs.f64(double %0)
%4 = fcmp oge double %3, %1
%5 = select i1 %4, double %0, double 0.000000e+00
ret double %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ SSL;

/* Variables and functions */
int SSL_write(int /*<<< orphan*/ *, int /*<<< orphan*/ const *, int);
int handle_ssl_error(int /*<<< orphan*/ *, int);
int safe_ssl_write(SSL *ssl, const uint8_t *buf, int n) {
  int ret;
  ret = SSL_write(ssl, buf, n);
  if (ret > 0)
    return ret;
  return handle_ssl_error(ssl, ret);
}


x86 assembly (clang, -O0):
<safe_ssl_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <SSL_write@plt>
mov    %eax,-0x20(%rbp)
cmpl   $0x0,-0x20(%rbp)
jle    115b <safe_ssl_write+0x3b>
mov    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    116a <safe_ssl_write+0x4a>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%esi
call   1040 <handle_ssl_error@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_ssl_write>:
push   %rbx
mov    %rdi,%rbx
call   1030 <SSL_write@plt>
test   %eax,%eax
jle    112f <safe_ssl_write+0xf>
pop    %rbx
ret
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <handle_ssl_error@plt>

LLVM IR (-O0):
define i32 @safe_ssl_write(i32* %0, i32* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32 %2, i32* %7
%9 = load i32*, i32** %5
%10 = load i32*, i32** %6
%11 = load i32, i32* %7
%12 = call i32 @SSL_write(i32* %9, i32* %10, i32 %11)
store i32 %12, i32* %8
%13 = load i32, i32* %8
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %3
%16 = load i32, i32* %8
store i32 %16, i32* %4
br label %21
17: ; preds = %3
%18 = load i32*, i32** %5
%19 = load i32, i32* %8
%20 = call i32 @handle_ssl_error(i32* %18, i32 %19)
store i32 %20, i32* %4
br label %21
21: ; preds = %17, %15
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @safe_ssl_write(i32* %0, i32* %1, i32 %2) {
%4 = tail call i32 @SSL_write(i32* %0, i32* %1, i32 %2)
%5 = icmp sgt i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @handle_ssl_error(i32* %0, i32 %4)
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ %7, %6 ], [ %4, %3 ]
ret i32 %9
}
/* Type definitions */
struct rt_mutex_waiter {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ WARN(int, char *);
void rt_mutex_print_deadlock(struct rt_mutex_waiter *w) {
  WARN(1, "rtmutex deadlock detected\n");
}


x86 assembly (clang, -O0):
<rt_mutex_print_deadlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%edi
lea    0xed8(%rip),%rsi
call   1030 <WARN@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rt_mutex_print_deadlock>:
lea    0xee9(%rip),%rsi
mov    $0x1,%edi
jmp    1030 <WARN@plt>

LLVM IR (-O0):
%struct.rt_mutex_waiter = type { i32 }
@.str = [27 x i8] c"rtmutex deadlock detected\0A\00"
define void @rt_mutex_print_deadlock(%struct.rt_mutex_waiter* %0) {
%2 = alloca %struct.rt_mutex_waiter*
store %struct.rt_mutex_waiter* %0, %struct.rt_mutex_waiter** %2
%3 = call i32 @WARN(i32 1, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.rt_mutex_waiter = type { i32 }
@.str = [27 x i8] c"rtmutex deadlock detected\0A\00"
define void @rt_mutex_print_deadlock(%struct.rt_mutex_waiter* nocapture readnone %0) {
%2 = tail call i32 @WARN(i32 1, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ my_strcat(char *, char const *);
int /*<<< orphan*/ my_strcpy(char *, char const *);
void concat_env_var(char *dest, const char *key, const char *val) {
  my_strcpy(dest, key);
  my_strcat(dest, "=");
  my_strcat(dest, val);
}


x86 assembly (clang, -O0):
<concat_env_var>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <my_strcpy@plt>
mov    -0x8(%rbp),%rdi
lea    0xeb4(%rip),%rsi
call   1040 <my_strcat@plt>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <my_strcat@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<concat_env_var>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rdi,%rbx
call   1030 <my_strcpy@plt>
lea    0xeca(%rip),%rsi
mov    %rbx,%rdi
call   1040 <my_strcat@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <my_strcat@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"=\00"
define void @concat_env_var(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i32 @my_strcpy(i8* %7, i8* %8)
%10 = load i8*, i8** %4
%11 = call i32 @my_strcat(i8* %10, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%12 = load i8*, i8** %4
%13 = load i8*, i8** %6
%14 = call i32 @my_strcat(i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"=\00"
define void @concat_env_var(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 @my_strcpy(i8* %0, i8* %1)
%5 = tail call i32 @my_strcat(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @my_strcat(i8* %0, i8* %2)
ret void
}
char *my_strcpy(char *dest, char *src) {
  int i;
  i = 0;
  while (src[i] != '\0') {
    dest[i] = src[i];
    i++;
  }
  dest[i] = '\0';
  return dest;
}


x86 assembly (clang, -O0):
<my_strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     114c <my_strcpy+0x4c>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <my_strcpy+0x13>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
test   %cl,%cl
je     1127 <my_strcpy+0x27>
xor    %edx,%edx
nopl   0x0(%rax,%rax,1)
mov    %cl,(%rax,%rdx,1)
movzbl 0x1(%rsi,%rdx,1),%ecx
add    $0x1,%rdx
test   %cl,%cl
jne    1110 <my_strcpy+0x10>
mov    %edx,%ecx
movb   $0x0,(%rax,%rcx,1)
ret
xor    %ecx,%ecx
movb   $0x0,(%rax,%rcx,1)
ret

LLVM IR (-O0):
define i8* @my_strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %14, %2
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %7, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %26
14: ; preds = %6
%15 = load i8*, i8** %4
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
%20 = load i8*, i8** %3
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
store i8 %19, i8* %23
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
br label %6
26: ; preds = %6
%27 = load i8*, i8** %3
%28 = load i32, i32* %5
%29 = sext i32 %28 to i64
%30 = getelementptr inbounds i8, i8* %27, i64 %29
store i8 0, i8* %30
%31 = load i8*, i8** %3
ret i8* %31
}

LLVM IR (-O2):
define i8* @my_strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i64 [ %9, %5 ], [ 0, %2 ]
%7 = phi i8 [ %11, %5 ], [ %3, %2 ]
%8 = getelementptr inbounds i8, i8* %0, i64 %6
store i8 %7, i8* %8
%9 = add nuw nsw i64 %6, 1
%10 = getelementptr inbounds i8, i8* %1, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5
%14 = and i64 %9, 4294967295
br label %15
15: ; preds = %13, %2
%16 = phi i64 [ 0, %2 ], [ %14, %13 ]
%17 = getelementptr inbounds i8, i8* %0, i64 %16
store i8 0, i8* %17
ret i8* %0
}
__attribute__((no)) void trampoline_free_tcb(unsigned long n1) {
  long ret;
  __asm__ __volatile__("leaq 1f(%%rip), %%r11\n\t"
                       "movq %%r11, %%fs:0x20\n\t"
                       "jmpq *%%gs:0x10000+"
                       "0x80"
                       "\n\t"
                       "1:\n\t"
                       : "=a"(ret)
                       : "D"(n1)
                       : "memory");
}


x86 assembly (clang, -O0):
<trampoline_free_tcb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0x11(%rip),%r11
mov    %r11,%fs:0x20
jmp    *%gs:0x10080
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<trampoline_free_tcb>:
lea    0x11(%rip),%r11
mov    %r11,%fs:0x20
jmp    *%gs:0x10080
ret

LLVM IR (-O0):
define void @trampoline_free_tcb(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 asm sideeffect "leaq 1f(%rip), %r11\0A\09movq %r11, %fs:0x20\0A\09jmpq *%gs:0x10000+0x80\0A\091:\0A\09", "={ax},{di},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %4)
store i64 %5, i64* %3
ret void
}

LLVM IR (-O2):
define void @trampoline_free_tcb(i64 %0) {
%2 = tail call i64 asm sideeffect "leaq 1f(%rip), %r11\0A\09movq %r11, %fs:0x20\0A\09jmpq *%gs:0x10000+0x80\0A\091:\0A\09", "={ax},{di},~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ IntDisable(unsigned long);
int /*<<< orphan*/ IntUnregister(unsigned long);
void I2CIntUnregister(unsigned long ulBase) {
  unsigned long ulInt;
  ;
  ulInt = (ulBase == 0x40020000) ? 24 : 53;
  IntDisable(ulInt);
  IntUnregister(ulInt);
}


x86 assembly (clang, -O0):
<I2CIntUnregister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
mov    $0x35,%eax
mov    $0x18,%ecx
cmp    $0x40020000,%rdx
cmove  %ecx,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <IntDisable@plt>
mov    -0x10(%rbp),%rdi
call   1040 <IntUnregister@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CIntUnregister>:
push   %rbx
cmp    $0x40020000,%rdi
mov    $0x18,%eax
mov    $0x35,%ebx
cmove  %rax,%rbx
mov    %rbx,%rdi
call   1030 <IntDisable@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <IntUnregister@plt>

LLVM IR (-O0):
define void @I2CIntUnregister(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = icmp eq i64 %4, 1073872896
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 24, i32 53
%8 = sext i32 %7 to i64
store i64 %8, i64* %3
%9 = load i64, i64* %3
%10 = call i32 @IntDisable(i64 %9)
%11 = load i64, i64* %3
%12 = call i32 @IntUnregister(i64 %11)
ret void
}

LLVM IR (-O2):
define void @I2CIntUnregister(i64 %0) {
%2 = icmp eq i64 %0, 1073872896
%3 = select i1 %2, i64 24, i64 53
%4 = tail call i32 @IntDisable(i64 %3)
%5 = tail call i32 @IntUnregister(i64 %3)
ret void
}
void b43_pcmcia_exit(void) {}


x86 assembly (clang, -O0):
<b43_pcmcia_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<b43_pcmcia_exit>:
ret

LLVM IR (-O0):
define void @b43_pcmcia_exit() {
ret void
}

LLVM IR (-O2):
define void @b43_pcmcia_exit() {
ret void
}
/* Variables and functions */
char *strdup(char *);
char *eventtype2str(__attribute__((__unused__)) int i) {
  return strdup("UNKNOWN");
}


x86 assembly (clang, -O0):
<eventtype2str>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <strdup@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eventtype2str>:
lea    0xee9(%rip),%rdi
jmp    1030 <strdup@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"UNKNOWN\00"
define i8* @eventtype2str(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i8* @strdup(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %3
}

LLVM IR (-O2):
@.str = [8 x i8] c"UNKNOWN\00"
define noalias i8* @eventtype2str(i32 %0) {
%2 = tail call dereferenceable_or_null(8) i8* @strdup(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %2
}
int PyMPELog_SyncClocks(void) {
  int ierr = 0;
  return ierr;
}


x86 assembly (clang, -O0):
<PyMPELog_SyncClocks>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PyMPELog_SyncClocks>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @PyMPELog_SyncClocks() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @PyMPELog_SyncClocks() {
ret i32 0
}
/* Variables and functions */
scalar_t__ getenv(char *);
int fdelay_is_verbose(void) { return getenv("FDELAY_LIB_VERBOSE") != 0; }


x86 assembly (clang, -O0):
<fdelay_is_verbose>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <getenv@plt>
cmp    $0x0,%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdelay_is_verbose>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <getenv@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"FDELAY_LIB_VERBOSE\00"
define i32 @fdelay_is_verbose() {
%1 = call i64 @getenv(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
@.str = [19 x i8] c"FDELAY_LIB_VERBOSE\00"
define i32 @fdelay_is_verbose() {
%1 = tail call i64 @getenv(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%2 = icmp ne i64 %1, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int vmemeq(volatile char *a, const char *b, size_t n) {
  while (n--) {
    if (*a++ != *b++)
      return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<vmemeq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x20(%rbp)
cmp    $0x0,%rax
je     1168 <vmemeq+0x68>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%al
movsbl %al,%eax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movsbl (%rcx),%ecx
cmp    %ecx,%eax
je     1163 <vmemeq+0x63>
movl   $0x0,-0x4(%rbp)
jmp    116f <vmemeq+0x6f>
jmp    1110 <vmemeq+0x10>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vmemeq>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmp    %rax,%rdx
je     112a <vmemeq+0x2a>
movzbl (%rdi,%rax,1),%r8d
lea    0x1(%rax),%rcx
cmp    (%rsi,%rax,1),%r8b
mov    %rcx,%rax
je     1110 <vmemeq+0x10>
xor    %eax,%eax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @vmemeq(i8* %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
br label %8
8: ; preds = %23, %3
%9 = load i64, i64* %7
%10 = add i64 %9, -1
store i64 %10, i64* %7
%11 = icmp ne i64 %9, 0
br i1 %11, label %12, label %24
12: ; preds = %8
%13 = load i8*, i8** %5
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %5
%15 = load volatile i8, i8* %13
%16 = sext i8 %15 to i32
%17 = load i8*, i8** %6
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %6
%19 = load i8, i8* %17
%20 = sext i8 %19 to i32
%21 = icmp ne i32 %16, %20
br i1 %21, label %22, label %23
22: ; preds = %12
store i32 0, i32* %4
br label %25
23: ; preds = %12
br label %8
24: ; preds = %8
store i32 1, i32* %4
br label %25
25: ; preds = %24, %22
%26 = load i32, i32* %4
ret i32 %26
}

LLVM IR (-O2):
define i32 @vmemeq(i8* %0, i8* nocapture %1, i64 %2) {
br label %4
4: ; preds = %9, %3
%5 = phi i8* [ %0, %3 ], [ %11, %9 ]
%6 = phi i8* [ %1, %3 ], [ %13, %9 ]
%7 = phi i64 [ %2, %3 ], [ %10, %9 ]
%8 = icmp eq i64 %7, 0
br i1 %8, label %16, label %9
9: ; preds = %4
%10 = add i64 %7, -1
%11 = getelementptr inbounds i8, i8* %5, i64 1
%12 = load volatile i8, i8* %5
%13 = getelementptr inbounds i8, i8* %6, i64 1
%14 = load i8, i8* %6
%15 = icmp eq i8 %12, %14
br i1 %15, label %4, label %16
16: ; preds = %4, %9
%17 = phi i32 [ 0, %9 ], [ 1, %4 ]
ret i32 %17
}
int test_imm_38int8_mem(signed char *val) {
  return ((*val) & (-0x38 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_38int8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0xffffffc8,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_38int8_mem>:
testb  $0xc8,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_38int8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, -56
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_38int8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -56
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void hello() { printf("Hello World 2\n"); }


x86 assembly (clang, -O0):
<hello>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hello>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"Hello World 2\0A\00"
define void @hello() {
%1 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [14 x i8] c"Hello World 2\00"
define void @hello() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @str, i64 0, i64 0))
ret void
}
void *test_anti_range_49(signed char n) {
  extern void *alloc_anti_range_49(signed char) __attribute__((alloc_size(1)));
  if ((-0x7f - 1) + 2 <= n && n <= 12)
    n = (-0x7f - 1) + 2 - 1;
  return alloc_anti_range_49(n);
}


x86 assembly (clang, -O0):
<test_anti_range_49>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0xffffff82,%eax
cmp    %ecx,%eax
jg     1140 <test_anti_range_49+0x30>
movsbl -0x1(%rbp),%eax
cmp    $0xc,%eax
jg     1140 <test_anti_range_49+0x30>
movb   $0x81,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <alloc_anti_range_49@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_49>:
lea    0x7e(%rdi),%eax
cmp    $0x8b,%al
mov    $0x81,%eax
cmovae %edi,%eax
movsbl %al,%edi
jmp    1030 <alloc_anti_range_49@plt>

LLVM IR (-O0):
define i8* @test_anti_range_49(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sle i32 -126, %4
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 12
br i1 %9, label %10, label %11
10: ; preds = %6
store i8 -127, i8* %2
br label %11
11: ; preds = %10, %6, %1
%12 = load i8, i8* %2
%13 = call i8* @alloc_anti_range_49(i8 signext %12)
ret i8* %13
}

LLVM IR (-O2):
define i8* @test_anti_range_49(i8 signext %0) {
%2 = add i8 %0, 126
%3 = icmp ult i8 %2, -117
%4 = select i1 %3, i8 -127, i8 %0
%5 = tail call i8* @alloc_anti_range_49(i8 signext %4)
ret i8* %5
}
int __test() {
  int x = 3;
  short y = 1337;
  int z = x + y;
  return z;
}


x86 assembly (clang, -O0):
<__test>:
push   %rbp
mov    %rsp,%rbp
movl   $0x3,-0x4(%rbp)
movw   $0x539,-0x6(%rbp)
mov    -0x4(%rbp),%eax
movswl -0x6(%rbp),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test>:
mov    $0x53c,%eax
ret

LLVM IR (-O0):
define i32 @__test() {
%1 = alloca i32
%2 = alloca i16
%3 = alloca i32
store i32 3, i32* %1
store i16 1337, i16* %2
%4 = load i32, i32* %1
%5 = load i16, i16* %2
%6 = sext i16 %5 to i32
%7 = add nsw i32 %4, %6
store i32 %7, i32* %3
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @__test() {
ret i32 1340
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
main(void) {
  int zahl2;
  printf("Hallo Welt");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"Hallo Welt\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [11 x i8] c"Hallo Welt\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ LBA_REG_WRITE(void *, int, int);
int mercury_util_init(void *phys_addr) {
  LBA_REG_WRITE(phys_addr, 0x0500, 0);
  LBA_REG_WRITE(phys_addr, 0x0508, 0x1);
  LBA_REG_WRITE(phys_addr, 0x0510, 0x797900ff001f043cULL);
  return 0;
}


x86 assembly (clang, -O0):
<mercury_util_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x500,%esi
xor    %edx,%edx
call   1030 <LBA_REG_WRITE@plt>
mov    -0x8(%rbp),%rdi
mov    $0x508,%esi
mov    $0x1,%edx
call   1030 <LBA_REG_WRITE@plt>
mov    -0x8(%rbp),%rdi
mov    $0x510,%esi
mov    $0x1f043c,%edx
call   1030 <LBA_REG_WRITE@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mercury_util_init>:
push   %rbx
mov    %rdi,%rbx
mov    $0x500,%esi
xor    %edx,%edx
call   1030 <LBA_REG_WRITE@plt>
mov    %rbx,%rdi
mov    $0x508,%esi
mov    $0x1,%edx
call   1030 <LBA_REG_WRITE@plt>
mov    %rbx,%rdi
mov    $0x510,%esi
mov    $0x1f043c,%edx
call   1030 <LBA_REG_WRITE@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @mercury_util_init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @LBA_REG_WRITE(i8* %3, i32 1280, i32 0)
%5 = load i8*, i8** %2
%6 = call i32 @LBA_REG_WRITE(i8* %5, i32 1288, i32 1)
%7 = load i8*, i8** %2
%8 = call i32 @LBA_REG_WRITE(i8* %7, i32 1296, i32 2032700)
ret i32 0
}

LLVM IR (-O2):
define i32 @mercury_util_init(i8* %0) {
%2 = tail call i32 @LBA_REG_WRITE(i8* %0, i32 1280, i32 0)
%3 = tail call i32 @LBA_REG_WRITE(i8* %0, i32 1288, i32 1)
%4 = tail call i32 @LBA_REG_WRITE(i8* %0, i32 1296, i32 2032700)
ret i32 0
}
/* Variables and functions */
char *strstr(char const *, char const *);
char *c_strstr(const char *arg0, const char *arg1) {
  return strstr(arg0, arg1);
}


x86 assembly (clang, -O0):
<c_strstr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strstr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_strstr>:
jmp    1030 <strstr@plt>

LLVM IR (-O0):
define i8* @c_strstr(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @strstr(i8* %5, i8* %6)
ret i8* %7
}

LLVM IR (-O2):
define i8* @c_strstr(i8* %0, i8* nocapture %1) {
%3 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i8* %3
}
/* Variables and functions */
int send_data(int, char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int send_string(int fd, char *msg) { return send_data(fd, msg, strlen(msg)); }


x86 assembly (clang, -O0):
<send_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <send_data@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_string>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <send_data@plt>

LLVM IR (-O0):
define i32 @send_string(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @send_data(i32 %5, i8* %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @send_string(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @send_data(i32 %0, i8* %1, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ nio_pixel_puts(int const, int const, char const *,
                                  unsigned char const, unsigned char const);
void nio_grid_puts(const int offset_x, const int offset_y, const int x,
                   const int y, const char *str, const unsigned char bgColor,
                   const unsigned char textColor) {
  nio_pixel_puts(offset_x + x * 6, offset_y + y * 8, str, bgColor, textColor);
}


x86 assembly (clang, -O0):
<nio_grid_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %r9b,%al
mov    0x10(%rbp),%r9b
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %al,-0x19(%rbp)
mov    -0x4(%rbp),%edi
imul   $0x6,-0xc(%rbp),%eax
add    %eax,%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%eax
shl    $0x3,%eax
add    %eax,%esi
mov    -0x18(%rbp),%rdx
mov    -0x19(%rbp),%al
movzbl %al,%ecx
movzbl 0x10(%rbp),%r8d
call   1030 <nio_pixel_puts@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nio_grid_puts>:
mov    %r8,%rax
movzbl 0x8(%rsp),%r8d
lea    (%rdx,%rdx,2),%edx
lea    (%rdi,%rdx,2),%edi
lea    (%rsi,%rcx,8),%esi
mov    %rax,%rdx
mov    %r9d,%ecx
jmp    1030 <nio_pixel_puts@plt>

LLVM IR (-O0):
define void @nio_grid_puts(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8 zeroext %5, i8 zeroext %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8
%14 = alloca i8
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8 %5, i8* %13
store i8 %6, i8* %14
%15 = load i32, i32* %8
%16 = load i32, i32* %10
%17 = mul nsw i32 %16, 6
%18 = add nsw i32 %15, %17
%19 = load i32, i32* %9
%20 = load i32, i32* %11
%21 = mul nsw i32 %20, 8
%22 = add nsw i32 %19, %21
%23 = load i8*, i8** %12
%24 = load i8, i8* %13
%25 = load i8, i8* %14
%26 = call i32 @nio_pixel_puts(i32 %18, i32 %22, i8* %23, i8 zeroext %24, i8 zeroext %25)
ret void
}

LLVM IR (-O2):
define void @nio_grid_puts(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8 zeroext %5, i8 zeroext %6) {
%8 = mul nsw i32 %2, 6
%9 = add nsw i32 %8, %0
%10 = shl nsw i32 %3, 3
%11 = add nsw i32 %10, %1
%12 = tail call i32 @nio_pixel_puts(i32 %9, i32 %11, i8* %4, i8 zeroext %5, i8 zeroext %6)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ MYSQL_RES;

/* Variables and functions */
int /*<<< orphan*/ mysql_free_result(int /*<<< orphan*/ *);
void sql_free_result(void *res) {
  if (!res)
    return;
  mysql_free_result((MYSQL_RES *)res);
}


x86 assembly (clang, -O0):
<sql_free_result>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    112c <sql_free_result+0x1c>
jmp    1135 <sql_free_result+0x25>
mov    -0x8(%rbp),%rdi
call   1030 <mysql_free_result@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sql_free_result>:
test   %rdi,%rdi
je     111a <sql_free_result+0xa>
jmp    1030 <mysql_free_result@plt>
ret

LLVM IR (-O0):
define void @sql_free_result(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %6, label %5
5: ; preds = %1
br label %10
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = bitcast i8* %7 to i32*
%9 = call i32 @mysql_free_result(i32* %8)
br label %10
10: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
define void @sql_free_result(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = bitcast i8* %0 to i32*
%5 = tail call i32 @mysql_free_result(i32* %4)
br label %6
6: ; preds = %1, %3
ret void
}
/* Type definitions */
struct vmbuf {
  int dummy;
};

/* Variables and functions */
scalar_t__ vmbuf_mem2(struct vmbuf *, size_t);
char *vmbuf_str2(struct vmbuf *vmbuf, size_t ofs) {
  return (char *)vmbuf_mem2(vmbuf, ofs);
}


x86 assembly (clang, -O0):
<vmbuf_str2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vmbuf_mem2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vmbuf_str2>:
jmp    1030 <vmbuf_mem2@plt>

LLVM IR (-O0):
%struct.vmbuf = type { i32 }
define i8* @vmbuf_str2(%struct.vmbuf* %0, i64 %1) {
%3 = alloca %struct.vmbuf*
%4 = alloca i64
store %struct.vmbuf* %0, %struct.vmbuf** %3
store i64 %1, i64* %4
%5 = load %struct.vmbuf*, %struct.vmbuf** %3
%6 = load i64, i64* %4
%7 = call i64 @vmbuf_mem2(%struct.vmbuf* %5, i64 %6)
%8 = inttoptr i64 %7 to i8*
ret i8* %8
}

LLVM IR (-O2):
%struct.vmbuf = type { i32 }
define i8* @vmbuf_str2(%struct.vmbuf* %0, i64 %1) {
%3 = tail call i64 @vmbuf_mem2(%struct.vmbuf* %0, i64 %1)
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ I2CMasterBaseValid(unsigned long);
void I2CMasterDisable(unsigned long ulBase) {
  DEBUG_ASSERT(I2CMasterBaseValid(ulBase));
  (*((volatile unsigned long *)(ulBase + 0x00000020))) &= ~(0x00000010);
}


x86 assembly (clang, -O0):
<I2CMasterDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <I2CMasterBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
mov    0x20(%rax),%rcx
and    $0xffffffffffffffef,%rcx
mov    %rcx,0x20(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CMasterDisable>:
push   %rbx
mov    %rdi,%rbx
call   1030 <I2CMasterBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
andq   $0xffffffffffffffef,0x20(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @I2CMasterDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @I2CMasterBaseValid(i64 %3)
%5 = call i32 @DEBUG_ASSERT(i32 %4)
%6 = load i64, i64* %2
%7 = add i64 %6, 32
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, -17
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @I2CMasterDisable(i64 %0) {
%2 = tail call i32 @I2CMasterBaseValid(i64 %0)
%3 = tail call i32 @DEBUG_ASSERT(i32 %2)
%4 = add i64 %0, 32
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, -17
store volatile i64 %7, i64* %5
ret void
}
void gentest_idle() {}


x86 assembly (clang, -O0):
<gentest_idle>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gentest_idle>:
ret

LLVM IR (-O0):
define void @gentest_idle() {
ret void
}

LLVM IR (-O2):
define void @gentest_idle() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int listen(int __fd, int __n) {
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<listen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ec3(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<listen>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @listen(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @ENOSYS
%6 = call i32 @__set_errno(i32 %5)
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @listen(i32 %0, i32 %1) {
%3 = load i32, i32* @ENOSYS
%4 = tail call i32 @__set_errno(i32 %3)
ret i32 -1
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t num_bits_set(uint8_t val) {
  uint8_t ret = 0;
  while (val > 0) {
    if (val & 1) {
      ret++;
    }
    val >>= 1;
  }
  return ret;
}


x86 assembly (clang, -O0):
<num_bits_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    113e <num_bits_set+0x3e>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1130 <num_bits_set+0x30>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <num_bits_set+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_bits_set>:
xor    %eax,%eax
test   %edi,%edi
jle    1120 <num_bits_set+0x20>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
shr    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <num_bits_set+0x10>
ret

LLVM IR (-O0):
define i32 @num_bits_set(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %7
%15 = load i32, i32* %2
%16 = ashr i32 %15, 1
store i32 %16, i32* %2
br label %4
17: ; preds = %4
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @num_bits_set(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %10
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = add nuw nsw i32 %4, %6
%8 = lshr i32 %5, 1
%9 = icmp ult i32 %5, 2
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ AbsoluteLong(int);
int /*<<< orphan*/ STA8(int /*<<< orphan*/);
void Op8FM1(void) { STA8(AbsoluteLong(2)); }


x86 assembly (clang, -O0):
<Op8FM1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1040 <AbsoluteLong@plt>
mov    %eax,%edi
call   1030 <STA8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op8FM1>:
push   %rax
mov    $0x2,%edi
call   1040 <AbsoluteLong@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <STA8@plt>

LLVM IR (-O0):
define void @Op8FM1() {
%1 = call i32 @AbsoluteLong(i32 2)
%2 = call i32 @STA8(i32 %1)
ret void
}

LLVM IR (-O2):
define void @Op8FM1() {
%1 = tail call i32 @AbsoluteLong(i32 2)
%2 = tail call i32 @STA8(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void freeArgCopy(char **aArgCopy) {
  int i;
  for (i = 0; i < 64 - 1; i++) {
    if (aArgCopy[i] == NULL) {
      break;
    }
    free(aArgCopy[i]);
  }
  free((void *)aArgCopy);
}


x86 assembly (clang, -O0):
<freeArgCopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x3f,-0xc(%rbp)
jge    1164 <freeArgCopy+0x54>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
jne    1145 <freeArgCopy+0x35>
jmp    1164 <freeArgCopy+0x54>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <freeArgCopy+0x13>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeArgCopy>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
xor    %ebx,%ebx
nopl   0x0(%rax)
mov    (%r14,%rbx,8),%rdi
test   %rdi,%rdi
je     1138 <freeArgCopy+0x28>
call   1030 <free@plt>
add    $0x1,%rbx
cmp    $0x3f,%rbx
jne    1120 <freeArgCopy+0x10>
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeArgCopy(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %22, %1
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 63
br i1 %6, label %7, label %25
7: ; preds = %4
%8 = load i8**, i8*** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8*, i8** %8, i64 %10
%12 = load i8*, i8** %11
%13 = icmp eq i8* %12, null
br i1 %13, label %14, label %15
14: ; preds = %7
br label %25
15: ; preds = %7
%16 = load i8**, i8*** %2
%17 = load i32, i32* %3
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8*, i8** %16, i64 %18
%20 = load i8*, i8** %19
%21 = call i32 @free(i8* %20)
br label %22
22: ; preds = %15
%23 = load i32, i32* %3
%24 = add nsw i32 %23, 1
store i32 %24, i32* %3
br label %4
25: ; preds = %14, %4
%26 = load i8**, i8*** %2
%27 = bitcast i8** %26 to i8*
%28 = call i32 @free(i8* %27)
ret void
}

LLVM IR (-O2):
define void @freeArgCopy(i8** nocapture %0) {
br label %2
2: ; preds = %1, %7
%3 = phi i64 [ 0, %1 ], [ %9, %7 ]
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
%6 = icmp eq i8* %5, null
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = tail call i32 @free(i8* %5)
%9 = add nuw nsw i64 %3, 1
%10 = icmp eq i64 %9, 63
br i1 %10, label %11, label %2
11: ; preds = %2, %7
%12 = bitcast i8** %0 to i8*
%13 = tail call i32 @free(i8* %12)
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef scalar_t__ int64_t;
typedef int int32_t;

/* Variables and functions */
int32_t cttk_s64_sign(int64_t x) {
  uint64_t q;
  q = (uint64_t)x;
  return -(int32_t)(q >> 63) | (int32_t)(-q >> 63);
}


x86 assembly (clang, -O0):
<cttk_s64_sign>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x3f,%ecx
sar    %cl,%eax
mov    %eax,%ecx
xor    %eax,%eax
sub    %ecx,%eax
xor    %edx,%edx
sub    -0xc(%rbp),%edx
mov    $0x3f,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cttk_s64_sign>:
ret

LLVM IR (-O0):
define i32 @cttk_s64_sign(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = trunc i64 %4 to i32
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = ashr i32 %6, 63
%8 = sub nsw i32 0, %7
%9 = load i32, i32* %3
%10 = sub nsw i32 0, %9
%11 = ashr i32 %10, 63
%12 = or i32 %8, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @cttk_s64_sign(i64 %0) {
ret i32 poison
}
void av_packet_move_ref() {}


x86 assembly (clang, -O0):
<av_packet_move_ref>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_packet_move_ref>:
ret

LLVM IR (-O0):
define void @av_packet_move_ref() {
ret void
}

LLVM IR (-O2):
define void @av_packet_move_ref() {
ret void
}
int func() {
  int class = 0;
  return class;
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @func() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @func() {
ret i32 0
}
/* Variables and functions */
int PAPI_destroy_eventset(int *);
void papif_destroy_eventset_(int *EventSet, int *check) {
  *check = PAPI_destroy_eventset(EventSet);
}


x86 assembly (clang, -O0):
<papif_destroy_eventset_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <PAPI_destroy_eventset@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<papif_destroy_eventset_>:
push   %rbx
mov    %rsi,%rbx
call   1030 <PAPI_destroy_eventset@plt>
mov    %eax,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @papif_destroy_eventset_(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = call i32 @PAPI_destroy_eventset(i32* %5)
%7 = load i32*, i32** %4
store i32 %6, i32* %7
ret void
}

LLVM IR (-O2):
define void @papif_destroy_eventset_(i32* %0, i32* nocapture writeonly %1) {
%3 = tail call i32 @PAPI_destroy_eventset(i32* %0)
store i32 %3, i32* %1
ret void
}
/* Variables and functions */
int rust_always_inlined();
int rust_never_inlined();
int main(int argc, char **argv) {
  return (rust_never_inlined() + rust_always_inlined()) * 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1040 <rust_never_inlined@plt>
mov    %eax,-0x14(%rbp)
mov    $0x0,%al
call   1030 <rust_always_inlined@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
imul   $0x0,%eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <rust_never_inlined@plt>
xor    %eax,%eax
call   1030 <rust_always_inlined@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @rust_never_inlined()
%7 = call i32 (...) @rust_always_inlined()
%8 = add nsw i32 %6, %7
%9 = mul nsw i32 %8, 0
ret i32 %9
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @rust_never_inlined()
%4 = tail call i32 (...) @rust_always_inlined()
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ OCSP_RESPBYTES;

/* Variables and functions */
scalar_t__ ASN1_item_new(int /*<<< orphan*/ *);
int /*<<< orphan*/ OCSP_RESPBYTES_it;
OCSP_RESPBYTES *OCSP_RESPBYTES_new(void) {
  return (OCSP_RESPBYTES *)ASN1_item_new(&OCSP_RESPBYTES_it);
}


x86 assembly (clang, -O0):
<OCSP_RESPBYTES_new>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rdi
call   1030 <ASN1_item_new@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<OCSP_RESPBYTES_new>:
mov    0x2ed1(%rip),%rdi
jmp    1030 <ASN1_item_new@plt>

LLVM IR (-O0):
@OCSP_RESPBYTES_it = global i32 0
define i32* @OCSP_RESPBYTES_new() {
%1 = call i64 @ASN1_item_new(i32* @OCSP_RESPBYTES_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}

LLVM IR (-O2):
@OCSP_RESPBYTES_it = global i32 0
define i32* @OCSP_RESPBYTES_new() {
%1 = tail call i64 @ASN1_item_new(i32* @OCSP_RESPBYTES_it)
%2 = inttoptr i64 %1 to i32*
ret i32* %2
}
double ls_cost_nm6_twice(double x) { return x + x; }


x86 assembly (clang, -O0):
<ls_cost_nm6_twice>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm6_twice>:
addsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @ls_cost_nm6_twice(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fadd double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @ls_cost_nm6_twice(double %0) {
%2 = fadd double %0, %0
ret double %2
}
int show_foo() { return 99; }


x86 assembly (clang, -O0):
<show_foo>:
push   %rbp
mov    %rsp,%rbp
mov    $0x63,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_foo>:
mov    $0x63,%eax
ret

LLVM IR (-O0):
define i32 @show_foo() {
ret i32 99
}

LLVM IR (-O2):
define i32 @show_foo() {
ret i32 99
}
unsigned bitcount(unsigned x) {
  int b;
  for (b = 0; x != 0; x &= (x - 1))
    b++;
  return b;
}


x86 assembly (clang, -O0):
<bitcount>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1132 <bitcount+0x32>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110e <bitcount+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bitcount>:
xor    %eax,%eax
test   %edi,%edi
je     111c <bitcount+0x1c>
cs nopw 0x0(%rax,%rax,1)
add    $0x1,%eax
lea    -0x1(%rdi),%ecx
and    %edi,%ecx
mov    %ecx,%edi
jne    1110 <bitcount+0x10>
ret

LLVM IR (-O0):
define i32 @bitcount(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
br label %10
10: ; preds = %7
%11 = load i32, i32* %2
%12 = sub i32 %11, 1
%13 = load i32, i32* %2
%14 = and i32 %13, %12
store i32 %14, i32* %2
br label %4
15: ; preds = %4
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @bitcount(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = add nuw nsw i32 %4, 1
%7 = add i32 %5, -1
%8 = and i32 %7, %5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %11
}
void glutIdleFunc(void (*func)(void)) {}


x86 assembly (clang, -O0):
<glutIdleFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutIdleFunc>:
ret

LLVM IR (-O0):
define void @glutIdleFunc(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
ret void
}

LLVM IR (-O2):
define void @glutIdleFunc(void ()* nocapture %0) {
ret void
}