xunge/DecIR huggingface dataset:
float transforme_i(int i, int w, float x1, float x2) {
  return (x1 + (i - 1) * (x2 - x1) / (w - 1));
}


x86 assembly (clang, -O0):
<transforme_i>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
cvtsi2ss %eax,%xmm1
movss  -0x10(%rbp),%xmm2
subss  -0xc(%rbp),%xmm2
mulss  %xmm2,%xmm1
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
cvtsi2ss %eax,%xmm2
divss  %xmm2,%xmm1
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<transforme_i>:
add    $0xffffffff,%edi
cvtsi2ss %edi,%xmm2
add    $0xffffffff,%esi
cvtsi2ss %esi,%xmm3
subss  %xmm0,%xmm1
mulss  %xmm1,%xmm2
divss  %xmm3,%xmm2
addss  %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @transforme_i(i32 %0, i32 %1, float %2, float %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca float
%8 = alloca float
store i32 %0, i32* %5
store i32 %1, i32* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %7
%10 = load i32, i32* %5
%11 = sub nsw i32 %10, 1
%12 = sitofp i32 %11 to float
%13 = load float, float* %8
%14 = load float, float* %7
%15 = fsub float %13, %14
%16 = fmul float %12, %15
%17 = load i32, i32* %6
%18 = sub nsw i32 %17, 1
%19 = sitofp i32 %18 to float
%20 = fdiv float %16, %19
%21 = fadd float %9, %20
ret float %21
}

LLVM IR (-O2):
define float @transforme_i(i32 %0, i32 %1, float %2, float %3) {
%5 = add nsw i32 %0, -1
%6 = sitofp i32 %5 to float
%7 = fsub float %3, %2
%8 = fmul float %7, %6
%9 = add nsw i32 %1, -1
%10 = sitofp i32 %9 to float
%11 = fdiv float %8, %10
%12 = fadd float %11, %2
ret float %12
}
double MBtoINHG(double MB) {
  double INHG = 0.0295300 * MB;
  return INHG;
}


x86 assembly (clang, -O0):
<MBtoINHG>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<MBtoINHG>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @MBtoINHG(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double 2.953000e-02, %4
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @MBtoINHG(double %0) {
%2 = fmul double %0, 2.953000e-02
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *,
                           char const *);
int /*<<< orphan*/ stderr;
void print_error(const char *error_class, const char *error_desc) {
  fprintf(stderr,
          "%s:"
          " %s\n",
          error_class, error_desc);
}


x86 assembly (clang, -O0):
<print_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xec8(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_error>:
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2ec3(%rip),%rax
mov    (%rax),%edi
lea    0xeda(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @print_error(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [8 x i8] c"%s: %s\0A\00"
define void @print_error(i8* %0, i8* %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ semi_exit();
int /*<<< orphan*/ semi_write0(char const *);
void semi_fatal(char const *message) {
  semi_write0(message);
  semi_exit();
}


x86 assembly (clang, -O0):
<semi_fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <semi_write0@plt>
mov    $0x0,%al
call   1040 <semi_exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semi_fatal>:
push   %rax
call   1030 <semi_write0@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <semi_exit@plt>

LLVM IR (-O0):
define void @semi_fatal(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @semi_write0(i8* %3)
%5 = call i32 (...) @semi_exit()
ret void
}

LLVM IR (-O2):
define void @semi_fatal(i8* %0) {
%2 = tail call i32 @semi_write0(i8* %0)
%3 = tail call i32 (...) @semi_exit()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_MGW_fname(char *, char *, char *);
void set_MGW_msigfname(char *fname, char *NXTaddr) {
  set_MGW_fname(fname, "msig", NXTaddr);
}


x86 assembly (clang, -O0):
<set_MGW_msigfname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rsi
call   1030 <set_MGW_fname@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_MGW_msigfname>:
mov    %rsi,%rdx
lea    0xee6(%rip),%rsi
jmp    1030 <set_MGW_fname@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"msig\00"
define void @set_MGW_msigfname(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @set_MGW_fname(i8* %5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %6)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"msig\00"
define void @set_MGW_msigfname(i8* %0, i8* %1) {
%3 = tail call i32 @set_MGW_fname(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
/* Variables and functions */
bool validate_char(char c) {
  if ((c == ' ') || (c == 0) || (c == '\t') || (c == '\n'))
    return false;
  return true;
}


x86 assembly (clang, -O0):
<validate_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x20,%eax
je     113e <validate_char+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x0,%eax
je     113e <validate_char+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x9,%eax
je     113e <validate_char+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0xa,%eax
jne    114a <validate_char+0x4a>
movl   $0x0,-0x4(%rbp)
jmp    1151 <validate_char+0x51>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<validate_char>:
cmp    $0x20,%dil
ja     111d <validate_char+0x1d>
xor    %eax,%eax
movzbl %dil,%ecx
movabs $0x100000601,%rdx
bt     %rcx,%rdx
jae    111d <validate_char+0x1d>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @validate_char(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 32
br i1 %6, label %19, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 0
br i1 %10, label %19, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 9
br i1 %14, label %19, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 10
br i1 %18, label %19, label %20
19: ; preds = %15, %11, %7, %1
store i32 0, i32* %2
br label %21
20: ; preds = %15
store i32 1, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @validate_char(i8 signext %0) {
switch i8 %0, label %2 [
i8 32, label %3
i8 10, label %3
i8 9, label %3
i8 0, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %2
%4 = phi i32 [ 1, %2 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ], [ 0, %1 ]
ret i32 %4
}
/* Variables and functions */
float const raw_noise_4d(float const, float const, float const, float const);
float scaled_raw_noise_4d(const float loBound, const float hiBound,
                          const float x, const float y, const float z,
                          const float w) {
  return raw_noise_4d(x, y, z, w) * (hiBound - loBound) / 2 +
         (hiBound + loBound) / 2;
}


x86 assembly (clang, -O0):
<scaled_raw_noise_4d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  %xmm4,-0x14(%rbp)
movss  %xmm5,-0x18(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
movss  -0x14(%rbp),%xmm2
movss  -0x18(%rbp),%xmm3
call   1030 <raw_noise_4d@plt>
movss  -0x8(%rbp),%xmm1
subss  -0x4(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xe9b(%rip),%xmm1
divss  %xmm1,%xmm0
movss  -0x8(%rbp),%xmm1
addss  -0x4(%rbp),%xmm1
movss  0xe85(%rip),%xmm2
divss  %xmm2,%xmm1
addss  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scaled_raw_noise_4d>:
push   %rax
movss  %xmm1,(%rsp)
movss  %xmm0,0x4(%rsp)
movaps %xmm2,%xmm0
movaps %xmm3,%xmm1
movaps %xmm4,%xmm2
movaps %xmm5,%xmm3
call   1030 <raw_noise_4d@plt>
movss  (%rsp),%xmm3
movaps %xmm3,%xmm1
movss  0x4(%rsp),%xmm2
subss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  0xeb5(%rip),%xmm1
mulss  %xmm1,%xmm0
addss  %xmm3,%xmm2
mulss  %xmm1,%xmm2
addss  %xmm2,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @scaled_raw_noise_4d(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = alloca float
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float
%12 = alloca float
store float %0, float* %7
store float %1, float* %8
store float %2, float* %9
store float %3, float* %10
store float %4, float* %11
store float %5, float* %12
%13 = load float, float* %9
%14 = load float, float* %10
%15 = load float, float* %11
%16 = load float, float* %12
%17 = call float @raw_noise_4d(float %13, float %14, float %15, float %16)
%18 = load float, float* %8
%19 = load float, float* %7
%20 = fsub float %18, %19
%21 = fmul float %17, %20
%22 = fdiv float %21, 2.000000e+00
%23 = load float, float* %8
%24 = load float, float* %7
%25 = fadd float %23, %24
%26 = fdiv float %25, 2.000000e+00
%27 = fadd float %22, %26
ret float %27
}

LLVM IR (-O2):
define float @scaled_raw_noise_4d(float %0, float %1, float %2, float %3, float %4, float %5) {
%7 = tail call float @raw_noise_4d(float %2, float %3, float %4, float %5)
%8 = fsub float %1, %0
%9 = fmul float %8, %7
%10 = fmul float %9, 5.000000e-01
%11 = fadd float %0, %1
%12 = fmul float %11, 5.000000e-01
%13 = fadd float %12, %10
ret float %13
}
extern int bar() { return 1; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @bar() {
ret i32 1
}

LLVM IR (-O2):
define i32 @bar() {
ret i32 1
}
__attribute__((always_)) void validate_process_creds(void) {}


x86 assembly (clang, -O0):
<validate_process_creds>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<validate_process_creds>:
ret

LLVM IR (-O0):
define void @validate_process_creds() {
ret void
}

LLVM IR (-O2):
define void @validate_process_creds() {
ret void
}
/* Variables and functions */
double PIDcontroller(double, double, double *, double *, double, double,
                     double);
double RollControl(double TarTheta, double NowTheta, double *RollPE,
                   double *RollDS) {
  static double result = 0.0;
  result = PIDcontroller(TarTheta, NowTheta, RollPE, RollDS, 19.31, 0.0, 8.0);
  return result;
}


x86 assembly (clang, -O0):
<RollControl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
mov    %rdi,-0x18(%rbp)
mov    %rsi,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
movsd  0xebc(%rip),%xmm2
xorps  %xmm3,%xmm3
movsd  0xeb9(%rip),%xmm4
call   1030 <PIDcontroller@plt>
movsd  %xmm0,0x2ed4(%rip)
movsd  0x2ecc(%rip),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RollControl>:
movsd  0xee8(%rip),%xmm2
movsd  0xee8(%rip),%xmm4
xorps  %xmm3,%xmm3
jmp    1030 <PIDcontroller@plt>

LLVM IR (-O0):
@RollControl.result = internal global double 0.000000e+00
define double @RollControl(double %0, double %1, double* %2, double* %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double*
%8 = alloca double*
store double %0, double* %5
store double %1, double* %6
store double* %2, double** %7
store double* %3, double** %8
%9 = load double, double* %5
%10 = load double, double* %6
%11 = load double*, double** %7
%12 = load double*, double** %8
%13 = call double @PIDcontroller(double %9, double %10, double* %11, double* %12, double 1.931000e+01, double 0.000000e+00, double 8.000000e+00)
store double %13, double* @RollControl.result
%14 = load double, double* @RollControl.result
ret double %14
}

LLVM IR (-O2):
define double @RollControl(double %0, double %1, double* %2, double* %3) {
%5 = tail call double @PIDcontroller(double %0, double %1, double* %2, double* %3, double 1.931000e+01, double 0.000000e+00, double 8.000000e+00)
ret double %5
}
void __attribute__((weak)) tim1_brk_isr() { debug_handler(__FUNCTION__); }


x86 assembly (clang, -O0):
<tim1_brk_isr>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x0,%al
call   1030 <debug_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tim1_brk_isr>:
lea    0xee9(%rip),%rdi
xor    %eax,%eax
jmp    1030 <debug_handler@plt>

LLVM IR (-O0):
@__FUNCTION__.tim1_brk_isr = [13 x i8] c"tim1_brk_isr\00"
define weak void @tim1_brk_isr() {
%1 = call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__FUNCTION__.tim1_brk_isr, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__FUNCTION__.tim1_brk_isr = [13 x i8] c"tim1_brk_isr\00"
define weak void @tim1_brk_isr() {
%1 = tail call i32 (i8*, ...) bitcast (i32 (...)* @debug_handler to i32 (i8*, ...)*)(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @__FUNCTION__.tim1_brk_isr, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ WaitForPage();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stdout;
void plD_eop_tek(void) {
  WaitForPage();
  fprintf(stdout, "\033\f");
}


x86 assembly (clang, -O0):
<plD_eop_tek>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <WaitForPage@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
lea    0xec5(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<plD_eop_tek>:
push   %rax
xor    %eax,%eax
call   1040 <WaitForPage@plt>
mov    0x2eb1(%rip),%rax
mov    (%rax),%edi
lea    0xec8(%rip),%rsi
pop    %rax
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stdout = global i32 0
@.str = [3 x i8] c"\1B\0C\00"
define void @plD_eop_tek() {
%1 = call i32 (...) @WaitForPage()
%2 = load i32, i32* @stdout
%3 = call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [3 x i8] c"\1B\0C\00"
define void @plD_eop_tek() {
%1 = tail call i32 (...) @WaitForPage()
%2 = load i32, i32* @stdout
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
typedef int /*<<< orphan*/ mbstate_t;
typedef int /*<<< orphan*/ mbs;

/* Variables and functions */
int /*<<< orphan*/ stdc_5909E3C4(int /*<<< orphan*/ *, int /*<<< orphan*/, int);
size_t stdc_B2702E15(char *, int /*<<< orphan*/, int /*<<< orphan*/ *);
int wctomb(char *s, wchar_t wchar) {
  static mbstate_t mbs;
  size_t rval;
  if (s == NULL) {
    stdc_5909E3C4(&mbs, 0, sizeof(mbs));
    return (0);
  }
  if ((rval = stdc_B2702E15(s, wchar, &mbs)) == (size_t)-1)
    return (-1);
  return ((int)rval);
}


x86 assembly (clang, -O0):
<wctomb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1159 <wctomb+0x39>
lea    0x2ef3(%rip),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1040 <stdc_5909E3C4@plt>
movl   $0x0,-0x4(%rbp)
jmp    118d <wctomb+0x6d>
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
lea    0x2ecd(%rip),%rdx
call   1030 <stdc_B2702E15@plt>
mov    %rax,-0x20(%rbp)
cmp    $0xffffffffffffffff,%rax
jne    1186 <wctomb+0x66>
movl   $0xffffffff,-0x4(%rbp)
jmp    118d <wctomb+0x6d>
mov    -0x20(%rbp),%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wctomb>:
push   %rbx
test   %rdi,%rdi
je     1137 <wctomb+0x17>
lea    0x2f07(%rip),%rdx
call   1030 <stdc_B2702E15@plt>
mov    %rax,%rbx
jmp    114c <wctomb+0x2c>
lea    0x2ef6(%rip),%rdi
xor    %ebx,%ebx
xor    %esi,%esi
mov    $0x4,%edx
call   1040 <stdc_5909E3C4@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@wctomb.mbs = internal global i32 0
define i32 @wctomb(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = call i32 @stdc_5909E3C4(i32* @wctomb.mbs, i32 0, i32 4)
store i32 0, i32* %3
br label %20
11: ; preds = %2
%12 = load i8*, i8** %4
%13 = load i32, i32* %5
%14 = call i64 @stdc_B2702E15(i8* %12, i32 %13, i32* @wctomb.mbs)
store i64 %14, i64* %6
%15 = icmp eq i64 %14, -1
br i1 %15, label %16, label %17
16: ; preds = %11
store i32 -1, i32* %3
br label %20
17: ; preds = %11
%18 = load i64, i64* %6
%19 = trunc i64 %18 to i32
store i32 %19, i32* %3
br label %20
20: ; preds = %17, %16, %9
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
@wctomb.mbs = internal global i32 0
define i32 @wctomb(i8* %0, i32 %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = tail call i32 @stdc_5909E3C4(i32* @wctomb.mbs, i32 0, i32 4)
br label %9
6: ; preds = %2
%7 = tail call i64 @stdc_B2702E15(i8* %0, i32 %1, i32* @wctomb.mbs)
%8 = trunc i64 %7 to i32
br label %9
9: ; preds = %6, %4
%10 = phi i32 [ 0, %4 ], [ %8, %6 ]
ret i32 %10
}
void ff_hevc_put_hevc_qpel_hv64_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_qpel_hv64_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_qpel_hv64_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_qpel_hv64_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_qpel_hv64_10_sse4() {
ret void
}
int test_imm_94uint16_mem(unsigned short *val) {
  return ((*val) & (0x94 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_94uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x94,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_94uint16_mem>:
testb  $0x94,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_94uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 148
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_94uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 148
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int abs(int);
int /*<<< orphan*/ assert(int);
int nondet();
void main() {
  int x;
  int y;
  x = nondet();
  y = abs(x);
  assert(y >= 10);
  return;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <nondet@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <abs@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
setge  %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <nondet@plt>
mov    %eax,%ecx
neg    %ecx
cmovs  %eax,%ecx
xor    %edi,%edi
cmp    $0xa,%ecx
setae  %dil
pop    %rax
jmp    1040 <assert@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca i32
%3 = call i32 (...) @nondet()
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = call i32 @abs(i32 %4)
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = icmp sge i32 %6, 10
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 (...) @nondet()
%2 = tail call i32 @llvm.abs.i32(i32 %1, i1 true)
%3 = icmp ugt i32 %2, 9
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int uint16_t;

/* Variables and functions */
int st103_get_epreg(int /*<<< orphan*/);
int /*<<< orphan*/ st103_set_epreg(int /*<<< orphan*/, int);
void st103_ep_clear_ctr_tx(uint8_t ep_num) {
  uint16_t value =
      st103_get_epreg(ep_num) & ~(0x0080) &
      ((0x8000) | (0x0800) | (0x0600) | (0x0100) | (0x0080) | (0x000F));
  st103_set_epreg(ep_num, value);
}


x86 assembly (clang, -O0):
<st103_ep_clear_ctr_tx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <st103_get_epreg@plt>
and    $0xffffff7f,%eax
and    $0x8f8f,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <st103_set_epreg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<st103_ep_clear_ctr_tx>:
push   %rbx
mov    %edi,%ebx
call   1040 <st103_get_epreg@plt>
and    $0x8f0f,%eax
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1030 <st103_set_epreg@plt>

LLVM IR (-O0):
define void @st103_ep_clear_ctr_tx(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @st103_get_epreg(i32 %4)
%6 = and i32 %5, -129
%7 = and i32 %6, 36751
store i32 %7, i32* %3
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = call i32 @st103_set_epreg(i32 %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @st103_ep_clear_ctr_tx(i32 %0) {
%2 = tail call i32 @st103_get_epreg(i32 %0)
%3 = and i32 %2, 36623
%4 = tail call i32 @st103_set_epreg(i32 %0, i32 %3)
ret void
}
/* Variables and functions */
void *ft_memset(char *, int /*<<< orphan*/, unsigned int);
char *malloc(unsigned int);
void *ft_calloc(unsigned int size) {
  char *d;
  d = malloc(size);
  if (!d)
    return NULL;
  return ft_memset(d, 0, size);
}


x86 assembly (clang, -O0):
<ft_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    114f <ft_calloc+0x2f>
movq   $0x0,-0x8(%rbp)
jmp    1161 <ft_calloc+0x41>
mov    -0x18(%rbp),%rdi
mov    -0xc(%rbp),%edx
xor    %esi,%esi
call   1030 <ft_memset@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_calloc>:
push   %rbx
mov    %edi,%ebx
call   1040 <malloc@plt>
test   %rax,%rax
je     113a <ft_calloc+0x1a>
mov    %rax,%rdi
xor    %esi,%esi
mov    %ebx,%edx
pop    %rbx
jmp    1030 <ft_memset@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ft_calloc(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i8* @malloc(i32 %5)
store i8* %6, i8** %4
%7 = load i8*, i8** %4
%8 = icmp ne i8* %7, null
br i1 %8, label %10, label %9
9: ; preds = %1
store i8* null, i8** %2
br label %14
10: ; preds = %1
%11 = load i8*, i8** %4
%12 = load i32, i32* %3
%13 = call i8* @ft_memset(i8* %11, i32 0, i32 %12)
store i8* %13, i8** %2
br label %14
14: ; preds = %10, %9
%15 = load i8*, i8** %2
ret i8* %15
}

LLVM IR (-O2):
define i8* @ft_calloc(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i8* @ft_memset(i8* %2, i32 0, i32 %0)
br label %6
6: ; preds = %1, %4
%7 = phi i8* [ %5, %4 ], [ null, %1 ]
ret i8* %7
}
void fini_func(void) {}


x86 assembly (clang, -O0):
<fini_func>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fini_func>:
ret

LLVM IR (-O0):
define void @fini_func() {
ret void
}

LLVM IR (-O2):
define void @fini_func() {
ret void
}
double combinecost(double curcost, int mul) {
  return curcost * mul + (mul - 1) * 48 * 9;
}


x86 assembly (clang, -O0):
<combinecost>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  -0x8(%rbp),%xmm0
cvtsi2sdl -0xc(%rbp),%xmm2
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
imul   $0x30,%eax,%eax
imul   $0x9,%eax,%eax
cvtsi2sd %eax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<combinecost>:
cvtsi2sd %edi,%xmm1
imul   $0x1b0,%edi,%eax
add    $0xfffffe50,%eax
cvtsi2sd %eax,%xmm2
mulsd  %xmm1,%xmm0
addsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @combinecost(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
store i32 %1, i32* %4
%5 = load double, double* %3
%6 = load i32, i32* %4
%7 = sitofp i32 %6 to double
%8 = load i32, i32* %4
%9 = sub nsw i32 %8, 1
%10 = mul nsw i32 %9, 48
%11 = mul nsw i32 %10, 9
%12 = sitofp i32 %11 to double
%13 = call double @llvm.fmuladd.f64(double %5, double %7, double %12)
ret double %13
}

LLVM IR (-O2):
define double @combinecost(double %0, i32 %1) {
%3 = sitofp i32 %1 to double
%4 = mul i32 %1, 432
%5 = add i32 %4, -432
%6 = sitofp i32 %5 to double
%7 = tail call double @llvm.fmuladd.f64(double %0, double %3, double %6)
ret double %7
}
/* Type definitions */
typedef int /*<<< orphan*/ const wchar_t;

/* Variables and functions */
int wcscspn(int /*<<< orphan*/ const *, int /*<<< orphan*/ const *);
wchar_t *(wcspbrknul)(const wchar_t *string, const wchar_t *stopset) {
  return string + wcscspn(string, stopset);
}


x86 assembly (clang, -O0):
<wcspbrknul>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <wcscspn@plt>
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
movslq %ecx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcspbrknul>:
push   %rbx
mov    %rdi,%rbx
call   1030 <wcscspn@plt>
cltq
lea    (%rbx,%rax,4),%rax
pop    %rbx
ret

LLVM IR (-O0):
define i32* @wcspbrknul(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %3
%7 = load i32*, i32** %4
%8 = call i32 @wcscspn(i32* %6, i32* %7)
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32, i32* %5, i64 %9
ret i32* %10
}

LLVM IR (-O2):
define i32* @wcspbrknul(i32* %0, i32* %1) {
%3 = tail call i32 @wcscspn(i32* %0, i32* %1)
%4 = sext i32 %3 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
ret i32* %5
}
void set_nice_priority() {}


x86 assembly (clang, -O0):
<set_nice_priority>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_nice_priority>:
ret

LLVM IR (-O0):
define void @set_nice_priority() {
ret void
}

LLVM IR (-O2):
define void @set_nice_priority() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void SysCtlPeripheralEnable(uint32_t ui32Peripheral) {
  ;
  (*((volatile uint32_t
          *)(((uint32_t)(0x400fe600 + ((ui32Peripheral & 0xff00) >> 8)) &
              0xF0000000) |
             0x02000000 |
             (((uint32_t)(0x400fe600 + ((ui32Peripheral & 0xff00) >> 8)) &
               0x000FFFFF)
              << 5) |
             ((ui32Peripheral & 0xff) << 2)))) = 1;
}


x86 assembly (clang, -O0):
<SysCtlPeripheralEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
add    $0x400fe600,%eax
and    $0xf0000000,%eax
or     $0x2000000,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x8,%ecx
add    $0x400fe600,%ecx
and    $0xfffff,%ecx
shl    $0x5,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x2,%ecx
or     %ecx,%eax
mov    %eax,%eax
movl   $0x1,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlPeripheralEnable>:
movzbl %dil,%eax
shr    $0x3,%edi
and    $0x1fe0,%edi
shl    $0x2,%eax
or     %edi,%eax
movl   $0x1,0x43fcc000(%rax)
ret

LLVM IR (-O0):
define void @SysCtlPeripheralEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = ashr i32 %4, 8
%6 = add nsw i32 1074783744, %5
%7 = and i32 %6, -268435456
%8 = or i32 %7, 33554432
%9 = load i32, i32* %2
%10 = and i32 %9, 65280
%11 = ashr i32 %10, 8
%12 = add nsw i32 1074783744, %11
%13 = and i32 %12, 1048575
%14 = shl i32 %13, 5
%15 = or i32 %8, %14
%16 = load i32, i32* %2
%17 = and i32 %16, 255
%18 = shl i32 %17, 2
%19 = or i32 %15, %18
%20 = zext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
store volatile i32 1, i32* %21
ret void
}

LLVM IR (-O2):
define void @SysCtlPeripheralEnable(i32 %0) {
%2 = lshr i32 %0, 3
%3 = and i32 %2, 8160
%4 = shl i32 %0, 2
%5 = and i32 %4, 1020
%6 = or i32 %5, %3
%7 = or i32 %6, 1140637696
%8 = zext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
store volatile i32 1, i32* %9
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;
typedef int /*<<< orphan*/ pthread_cond_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_cond_signal(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_mutex_lock(int /*<<< orphan*/ *);
int /*<<< orphan*/ pthread_mutex_unlock(int /*<<< orphan*/ *);
int thread_syn_flag_set(pthread_mutex_t *mutex, pthread_cond_t *cond,
                        int *flag) {
  pthread_mutex_lock(mutex);
  *flag = 1;
  pthread_cond_signal(cond);
  pthread_mutex_unlock(mutex);
  return 0;
}


x86 assembly (clang, -O0):
<thread_syn_flag_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <pthread_mutex_lock@plt>
mov    -0x18(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x10(%rbp),%rdi
call   1030 <pthread_cond_signal@plt>
mov    -0x8(%rbp),%rdi
call   1040 <pthread_mutex_unlock@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_syn_flag_set>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r15
mov    %rsi,%r14
mov    %rdi,%rbx
call   1050 <pthread_mutex_lock@plt>
movl   $0x1,(%r15)
mov    %r14,%rdi
call   1030 <pthread_cond_signal@plt>
mov    %rbx,%rdi
call   1040 <pthread_mutex_unlock@plt>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @thread_syn_flag_set(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = call i32 @pthread_mutex_lock(i32* %7)
%9 = load i32*, i32** %6
store i32 1, i32* %9
%10 = load i32*, i32** %5
%11 = call i32 @pthread_cond_signal(i32* %10)
%12 = load i32*, i32** %4
%13 = call i32 @pthread_mutex_unlock(i32* %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @thread_syn_flag_set(i32* %0, i32* %1, i32* nocapture writeonly %2) {
%4 = tail call i32 @pthread_mutex_lock(i32* %0)
store i32 1, i32* %2
%5 = tail call i32 @pthread_cond_signal(i32* %1)
%6 = tail call i32 @pthread_mutex_unlock(i32* %0)
ret i32 0
}
long long llrintl(long double x) {
  long long r;
  __asm__("fistpll %0" : "=m"(r) : "t"(x) : "st");
  return r;
}


x86 assembly (clang, -O0):
<llrintl>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fistpll -0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<llrintl>:
fldt   0x8(%rsp)
fistpll -0x8(%rsp)
mov    -0x8(%rsp),%rax
ret

LLVM IR (-O0):
define i64 @llrintl(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca i64
store x86_fp80 %0, x86_fp80* %2
%4 = load x86_fp80, x86_fp80* %2
%5 = load i64, i64* %3
ret i64 %5
}

LLVM IR (-O2):
define i64 @llrintl(x86_fp80 %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = load i64, i64* %2
ret i64 %4
}
/* Type definitions */
struct l_class_OC_FSM {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _ZN3FSMD1Ev(struct l_class_OC_FSM *);
int /*<<< orphan*/ _ZdlPv(unsigned char *);
void _ZN3FSMD0Ev(struct l_class_OC_FSM *llvm_cbe_this) {
  struct l_class_OC_FSM *llvm_cbe_this_2e_addr;
  struct l_class_OC_FSM *llvm_cbe_this1;
  *(&llvm_cbe_this_2e_addr) = llvm_cbe_this;
  llvm_cbe_this1 = *(&llvm_cbe_this_2e_addr);
  _ZN3FSMD1Ev(llvm_cbe_this1);
  _ZdlPv((((unsigned char *)llvm_cbe_this1)));
  return;
}


x86 assembly (clang, -O0):
<_ZN3FSMD0Ev>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <_ZN3FSMD1Ev@plt>
mov    -0x18(%rbp),%rdi
call   1030 <_ZdlPv@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZN3FSMD0Ev>:
push   %rbx
mov    %rdi,%rbx
call   1040 <_ZN3FSMD1Ev@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <_ZdlPv@plt>

LLVM IR (-O0):
%struct.l_class_OC_FSM = type { i32 }
define void @_ZN3FSMD0Ev(%struct.l_class_OC_FSM* %0) {
%2 = alloca %struct.l_class_OC_FSM*
%3 = alloca %struct.l_class_OC_FSM*
%4 = alloca %struct.l_class_OC_FSM*
store %struct.l_class_OC_FSM* %0, %struct.l_class_OC_FSM** %2
%5 = load %struct.l_class_OC_FSM*, %struct.l_class_OC_FSM** %2
store %struct.l_class_OC_FSM* %5, %struct.l_class_OC_FSM** %3
%6 = load %struct.l_class_OC_FSM*, %struct.l_class_OC_FSM** %3
store %struct.l_class_OC_FSM* %6, %struct.l_class_OC_FSM** %4
%7 = load %struct.l_class_OC_FSM*, %struct.l_class_OC_FSM** %4
%8 = call i32 @_ZN3FSMD1Ev(%struct.l_class_OC_FSM* %7)
%9 = load %struct.l_class_OC_FSM*, %struct.l_class_OC_FSM** %4
%10 = bitcast %struct.l_class_OC_FSM* %9 to i8*
%11 = call i32 @_ZdlPv(i8* %10)
ret void
}

LLVM IR (-O2):
%struct.l_class_OC_FSM = type { i32 }
define void @_ZN3FSMD0Ev(%struct.l_class_OC_FSM* %0) {
%2 = tail call i32 @_ZN3FSMD1Ev(%struct.l_class_OC_FSM* %0)
%3 = bitcast %struct.l_class_OC_FSM* %0 to i8*
%4 = tail call i32 @_ZdlPv(i8* %3)
ret void
}
void rotr(int *a, int *b, int *c) {
  int ptr, ptr2;
  ptr = *a;
  *a = *c;
  ptr2 = *b;
  *b = ptr;
  *c = ptr2;
}


x86 assembly (clang, -O0):
<rotr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x20(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr>:
mov    (%rdi),%eax
mov    (%rdx),%ecx
mov    %ecx,(%rdi)
mov    (%rsi),%ecx
mov    %eax,(%rsi)
mov    %ecx,(%rdx)
ret

LLVM IR (-O0):
define void @rotr(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%9 = load i32*, i32** %4
%10 = load i32, i32* %9
store i32 %10, i32* %7
%11 = load i32*, i32** %6
%12 = load i32, i32* %11
%13 = load i32*, i32** %4
store i32 %12, i32* %13
%14 = load i32*, i32** %5
%15 = load i32, i32* %14
store i32 %15, i32* %8
%16 = load i32, i32* %7
%17 = load i32*, i32** %5
store i32 %16, i32* %17
%18 = load i32, i32* %8
%19 = load i32*, i32** %6
store i32 %18, i32* %19
ret void
}

LLVM IR (-O2):
define void @rotr(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %0
%5 = load i32, i32* %2
store i32 %5, i32* %0
%6 = load i32, i32* %1
store i32 %4, i32* %1
store i32 %6, i32* %2
ret void
}
int fibo(int n) {
  if (n == 1)
    return 0;
  else if (n == 2)
    return 1;
  else
    return fibo(n - 1) + fibo(n - 2);
}


x86 assembly (clang, -O0):
<fibo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1131 <fibo+0x21>
movl   $0x0,-0x4(%rbp)
jmp    116a <fibo+0x5a>
cmpl   $0x2,-0x8(%rbp)
jne    1147 <fibo+0x37>
movl   $0x1,-0x4(%rbp)
jmp    116a <fibo+0x5a>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fibo@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fibo@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibo>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x1,%ebx
je     1137 <fibo+0x27>
nopl   0x0(%rax)
cmp    $0x2,%ebx
je     113b <fibo+0x2b>
lea    -0x1(%rbx),%edi
call   1030 <fibo@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x1,%ebx
jne    1120 <fibo+0x10>
xor    %eax,%eax
jmp    1140 <fibo+0x30>
mov    $0x1,%eax
add    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fibo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %19
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 2
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %19
11: ; preds = %7
%12 = load i32, i32* %3
%13 = sub nsw i32 %12, 1
%14 = call i32 @fibo(i32 %13)
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 2
%17 = call i32 @fibo(i32 %16)
%18 = add nsw i32 %14, %17
store i32 %18, i32* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i32, i32* %2
ret i32 %20
}

LLVM IR (-O2):
define i32 @fibo(i32 %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i32 [ 0, %1 ], [ %9, %5 ]
%4 = phi i32 [ %0, %1 ], [ %8, %5 ]
switch i32 %4, label %5 [
i32 1, label %10
i32 2, label %11
]
5: ; preds = %2
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fibo(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %3
br label %2
10: ; preds = %2
br label %11
11: ; preds = %2, %10
%12 = phi i32 [ 0, %10 ], [ 1, %2 ]
%13 = add nsw i32 %12, %3
ret i32 %13
}
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
int32_t SSIDataGetNonBlocking(uint32_t ui32Base, uint32_t *pui32Data) {
  ;
  if ((*((volatile uint32_t *)(ui32Base + 0x0000000C))) & 0x00000004) {
    *pui32Data = (*((volatile uint32_t *)(ui32Base + 0x00000008)));
    return (1);
  } else {
    return (0);
  }
}


x86 assembly (clang, -O0):
<SSIDataGetNonBlocking>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    $0xc,%eax
cltq
mov    (%rax),%eax
and    $0x4,%eax
cmp    $0x0,%eax
je     113d <SSIDataGetNonBlocking+0x3d>
mov    -0x8(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
jmp    1144 <SSIDataGetNonBlocking+0x44>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSIDataGetNonBlocking>:
movslq %edi,%rcx
xor    %eax,%eax
testl  $0x4,0xc(%rcx)
je     1118 <SSIDataGetNonBlocking+0x18>
mov    0x8(%rcx),%eax
mov    %eax,(%rsi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @SSIDataGetNonBlocking(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 12
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i32*
%10 = load volatile i32, i32* %9
%11 = and i32 %10, 4
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %20
13: ; preds = %2
%14 = load i32, i32* %4
%15 = add nsw i32 %14, 8
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
%19 = load i32*, i32** %5
store i32 %18, i32* %19
store i32 1, i32* %3
br label %21
20: ; preds = %2
store i32 0, i32* %3
br label %21
21: ; preds = %20, %13
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @SSIDataGetNonBlocking(i32 %0, i32* nocapture writeonly %1) {
%3 = add nsw i32 %0, 12
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, 4
%8 = icmp eq i32 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %2
%10 = add nsw i32 %0, 8
%11 = sext i32 %10 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
store i32 %13, i32* %1
br label %14
14: ; preds = %2, %9
%15 = phi i32 [ 1, %9 ], [ 0, %2 ]
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void error() {
  printf("-->ERROR, no se encuentra la opción que ha solicitado\n");
  printf("-->Vuelva a ejecutar la función y seleccione una de las posibles "
         "funciones\n");
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf11(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<error>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf13(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [56 x i8] c"-->ERROR, no se encuentra la opci\C3\B3n que ha solicitado\0A\00"
@.str.1 = [77 x i8] c"-->Vuelva a ejecutar la funci\C3\B3n y seleccione una de las posibles funciones\0A\00"
define void @error() {
%1 = call i32 @printf(i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [55 x i8] c"-->ERROR, no se encuentra la opci\C3\B3n que ha solicitado\00"
@str.2 = [76 x i8] c"-->Vuelva a ejecutar la funci\C3\B3n y seleccione una de las posibles funciones\00"
define void @error() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([55 x i8], [55 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([76 x i8], [76 x i8]* @str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int /*<<< orphan*/ scanf(char *, char *);
int main() {
  char a, b;
  int c, d;
  scanf("%c", &a);
  c = a;
  d = c - 96;
  b = 123 - d;
  printf("%c", b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
lea    -0x5(%rbp),%rsi
call   1040 <scanf@plt>
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x60,%eax
mov    %eax,-0x10(%rbp)
mov    $0x7b,%eax
sub    -0x10(%rbp),%eax
mov    %al,-0x6(%rbp)
lea    0xe9f(%rip),%rdi
movsbl -0x6(%rbp),%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rbx
lea    0xf(%rsp),%rsi
mov    %rbx,%rdi
call   1040 <scanf@plt>
mov    $0xdb,%al
sub    0xf(%rsp),%al
movsbl %al,%esi
mov    %rbx,%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%c\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %2)
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = sub nsw i32 %9, 96
store i32 %10, i32* %5
%11 = load i32, i32* %5
%12 = sub nsw i32 123, %11
%13 = trunc i32 %12 to i8
store i8 %13, i8* %3
%14 = load i8, i8* %3
%15 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %14)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%c\00"
define i32 @main() {
%1 = alloca i8
%2 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
%3 = load i8, i8* %1
%4 = sub i8 -37, %3
%5 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8 signext %4)
ret i32 0
}
/* Type definitions */
struct timespec {
  scalar_t__ tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int nanosleep(const struct timespec *requested_time,
              struct timespec *remaining) {
  remaining->tv_sec = 0;
  remaining->tv_nsec = 0;
  return 0;
}


x86 assembly (clang, -O0):
<nanosleep>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movq   $0x0,0x8(%rax)
mov    -0x10(%rbp),%rax
movq   $0x0,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanosleep>:
xorps  %xmm0,%xmm0
movups %xmm0,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define i32 @nanosleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %4
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 1
store i64 0, i64* %6
%7 = load %struct.timespec*, %struct.timespec** %4
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %7, i32 0, i32 0
store i64 0, i64* %8
ret i32 0
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define i32 @nanosleep(%struct.timespec* nocapture readnone %0, %struct.timespec* nocapture writeonly %1) {
%3 = bitcast %struct.timespec* %1 to i8*
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ perror(char *);
FILE *get_input_fp(char *filename) {
  FILE *in;
  if ((in = fopen(filename, "r")) == NULL) {
    perror(filename);
    exit(1);
  }
  return (in);
}


x86 assembly (clang, -O0):
<get_input_fp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb9(%rip),%rsi
call   1030 <fopen@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    116d <get_input_fp+0x3d>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_input_fp>:
push   %rbx
mov    %rdi,%rbx
lea    0xec5(%rip),%rsi
call   1030 <fopen@plt>
test   %rax,%rax
je     1147 <get_input_fp+0x17>
pop    %rbx
ret
mov    %rbx,%rdi
call   1040 <perror@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"r\00"
define i32* @get_input_fp(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32* @fopen(i8* %4, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %5, i32** %3
%6 = icmp eq i32* %5, null
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = call i32 @perror(i8* %8)
%10 = call i32 @exit(i32 1)
unreachable
11: ; preds = %1
%12 = load i32*, i32** %3
ret i32* %12
}

LLVM IR (-O2):
@.str = [2 x i8] c"r\00"
define noalias i32* @get_input_fp(i8* nocapture %0) {
%2 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32* %2, null
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @perror(i8* %0)
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %1
ret i32* %2
}
void ff_hevc_put_hevc_uni_w_epel_hv12_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_epel_hv12_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_epel_hv12_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_epel_hv12_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_epel_hv12_12_sse4() {
ret void
}