xunge/DecIR huggingface dataset:
void debug_check_no_locks_held(void) {}


x86 assembly (clang, -O0):
<debug_check_no_locks_held>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_check_no_locks_held>:
ret

LLVM IR (-O0):
define void @debug_check_no_locks_held() {
ret void
}

LLVM IR (-O2):
define void @debug_check_no_locks_held() {
ret void
}
/* Variables and functions */
int cpuinfo(int);
int CacheLineWidth(void) {
  return 255 & cpuinfo(cpuinfo(0) == 0x444D4163 ? 0x80000005 : 0x80000006);
}


x86 assembly (clang, -O0):
<CacheLineWidth>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <cpuinfo@plt>
mov    %eax,%ecx
mov    $0x80000006,%edi
mov    $0x80000005,%eax
cmp    $0x444d4163,%ecx
cmove  %eax,%edi
call   1030 <cpuinfo@plt>
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<CacheLineWidth>:
push   %rax
xor    %edi,%edi
call   1030 <cpuinfo@plt>
xor    %ecx,%ecx
cmp    $0x444d4163,%eax
sete   %cl
mov    $0x80000006,%edi
sub    %ecx,%edi
call   1030 <cpuinfo@plt>
movzbl %al,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @CacheLineWidth() {
%1 = call i32 @cpuinfo(i32 0)
%2 = icmp eq i32 %1, 1145913699
%3 = zext i1 %2 to i64
%4 = select i1 %2, i32 -2147483643, i32 -2147483642
%5 = call i32 @cpuinfo(i32 %4)
%6 = and i32 255, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @CacheLineWidth() {
%1 = tail call i32 @cpuinfo(i32 0)
%2 = icmp eq i32 %1, 1145913699
%3 = select i1 %2, i32 -2147483643, i32 -2147483642
%4 = tail call i32 @cpuinfo(i32 %3)
%5 = and i32 %4, 255
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void bm_free_pci_shmem(void *pci_shmem) {
  printf("libdha: Pure virtual function call - bm_free_pci_shmem()\n");
}


x86 assembly (clang, -O0):
<bm_free_pci_shmem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bm_free_pci_shmem>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [58 x i8] c"libdha: Pure virtual function call - bm_free_pci_shmem()\0A\00"
define void @bm_free_pci_shmem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [57 x i8] c"libdha: Pure virtual function call - bm_free_pci_shmem()\00"
define void @bm_free_pci_shmem(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([57 x i8], [57 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _cleanup();
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, int, char const *);
void check_equal(int line, const char *func) {
  printf("FAIL line %d [%s]: expected equal values differs.\n", line, func);
  _cleanup();
  exit(-1);
}


x86 assembly (clang, -O0):
<check_equal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
lea    0xeb3(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <_cleanup@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<check_equal>:
push   %rax
mov    %rsi,%rdx
mov    %edi,%esi
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
call   1040 <_cleanup@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [51 x i8] c"FAIL line %d [%s]: expected equal values differs.\0A\00"
define void @check_equal(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i32 %5, i8* %6)
%8 = call i32 (...) @_cleanup()
%9 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@.str = [51 x i8] c"FAIL line %d [%s]: expected equal values differs.\0A\00"
define void @check_equal(i32 %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([51 x i8], [51 x i8]* @.str, i64 0, i64 0), i32 %0, i8* %1)
%4 = tail call i32 (...) @_cleanup()
%5 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
int hits(char *, char *, int);
scalar_t__ pseudo(char *, char *, int);
int test_hits_no_pseudo() {
  char actual[] = {'R', 'G', 'G', 'R'};
  char guess[] = {'Y', 'G', 'Y', 'Y'};
  return 1 == hits(actual, guess, 4) && 0 == pseudo(actual, guess, 4);
}


x86 assembly (clang, -O0):
<test_hits_no_pseudo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0xed2(%rip),%eax
mov    %eax,-0x4(%rbp)
mov    0xecd(%rip),%eax
mov    %eax,-0x8(%rbp)
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1040 <hits@plt>
mov    %eax,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %edx,%ecx
mov    %al,-0x9(%rbp)
jne    1180 <test_hits_no_pseudo+0x60>
lea    -0x4(%rbp),%rdi
lea    -0x8(%rbp),%rsi
mov    $0x4,%edx
call   1030 <pseudo@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_hits_no_pseudo>:
push   %rax
movl   $0x52474752,0x4(%rsp)
52
movl   $0x59594759,(%rsp)
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
mov    $0x4,%edx
call   1040 <hits@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
jne    1168 <test_hits_no_pseudo+0x48>
lea    0x4(%rsp),%rdi
mov    %rsp,%rsi
mov    $0x4,%edx
call   1030 <pseudo@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
sete   %al
pop    %rcx
ret

LLVM IR (-O0):
@__const.test_hits_no_pseudo.actual = [4 x i8] c"RGGR"
@__const.test_hits_no_pseudo.guess = [4 x i8] c"YGYY"
define i32 @test_hits_no_pseudo() {
%1 = alloca [4 x i8]
%2 = alloca [4 x i8]
%3 = bitcast [4 x i8]* %1 to i8*
%4 = bitcast [4 x i8]* %2 to i8*
%5 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%6 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%7 = call i32 @hits(i8* %5, i8* %6, i32 4)
%8 = icmp eq i32 1, %7
br i1 %8, label %9, label %14
9: ; preds = %0
%10 = getelementptr inbounds [4 x i8], [4 x i8]* %1, i64 0, i64 0
%11 = getelementptr inbounds [4 x i8], [4 x i8]* %2, i64 0, i64 0
%12 = call i64 @pseudo(i8* %10, i8* %11, i32 4)
%13 = icmp eq i64 0, %12
br label %14
14: ; preds = %9, %0
%15 = phi i1 [ false, %0 ], [ %13, %9 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @test_hits_no_pseudo() {
%1 = alloca i32
%2 = alloca i32
%3 = bitcast i32* %1 to i8*
store i32 1380403026, i32* %1
%4 = bitcast i32* %2 to i8*
store i32 1499023193, i32* %2
%5 = call i32 @hits(i8* %3, i8* %4, i32 4)
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %11
7: ; preds = %0
%8 = call i64 @pseudo(i8* %3, i8* %4, i32 4)
%9 = icmp eq i64 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %0
%12 = phi i32 [ 0, %0 ], [ %10, %7 ]
ret i32 %12
}
void function_declaration_both_after(void) {}


x86 assembly (clang, -O0):
<function_declaration_both_after>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_declaration_both_after>:
ret

LLVM IR (-O0):
define void @function_declaration_both_after() {
ret void
}

LLVM IR (-O2):
define void @function_declaration_both_after() {
ret void
}
/* Variables and functions */
scalar_t__ malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *strdup(const char *s) {
  char *t;
  t = (char *)malloc(strlen(s) + 1);
  strcpy(t, s);
  return t;
}


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i64 @malloc(i64 %6)
%8 = inttoptr i64 %7 to i8*
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = load i8*, i8** %2
%11 = call i32 @strcpy(i8* %9, i8* %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @strdup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i8*
%6 = tail call i32 @strcpy(i8* %5, i8* %0)
ret i8* %5
}
void __attribute__((no)) HEX00_posixDatInit(void) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @HEX00_posixDatInit() {
ret void
}

LLVM IR (-O2):
define void @HEX00_posixDatInit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ TimerTickConfigure(void (*)());
void SystickConfigure(void (*pfnHandler)(void)) {
  TimerTickConfigure(pfnHandler);
}


x86 assembly (clang, -O0):
<SystickConfigure>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <TimerTickConfigure@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SystickConfigure>:
jmp    1030 <TimerTickConfigure@plt>

LLVM IR (-O0):
define void @SystickConfigure(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
%3 = load void ()*, void ()** %2
%4 = bitcast void ()* %3 to void (...)*
%5 = call i32 @TimerTickConfigure(void (...)* %4)
ret void
}

LLVM IR (-O2):
define void @SystickConfigure(void ()* %0) {
%2 = bitcast void ()* %0 to void (...)*
%3 = tail call i32 @TimerTickConfigure(void (...)* %2)
ret void
}
__attribute__((gnu_)) int make_a_loop_status(int is_loop_p, int status_p,
                                             int is_loop_q, int status_q,
                                             char *binfun) {
  if (is_loop_p) {
    if (status_p == 0)
      return 0;
    return 2;
  } else if (is_loop_q)
    if (status_q == 0)
      return 0;
  return 2;
}


x86 assembly (clang, -O0):
<make_a_loop_status>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1140 <make_a_loop_status+0x40>
cmpl   $0x0,-0xc(%rbp)
jne    1134 <make_a_loop_status+0x34>
movl   $0x0,-0x4(%rbp)
jmp    1171 <make_a_loop_status+0x71>
movl   $0x2,-0x4(%rbp)
jmp    1171 <make_a_loop_status+0x71>
cmpl   $0x0,-0x10(%rbp)
je     1165 <make_a_loop_status+0x65>
cmpl   $0x0,-0x14(%rbp)
jne    1160 <make_a_loop_status+0x60>
movl   $0x0,-0x4(%rbp)
jmp    1171 <make_a_loop_status+0x71>
jmp    1165 <make_a_loop_status+0x65>
jmp    116a <make_a_loop_status+0x6a>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_a_loop_status>:
test   %edi,%edi
je     110b <make_a_loop_status+0xb>
test   %esi,%esi
sete   %al
jmp    1117 <make_a_loop_status+0x17>
test   %edx,%edx
setne  %dl
test   %ecx,%ecx
sete   %al
and    %dl,%al
xor    $0x1,%al
movzbl %al,%eax
add    %eax,%eax
ret

LLVM IR (-O0):
define i32 @make_a_loop_status(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i8*
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i8* %4, i8** %11
%12 = load i32, i32* %7
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %19
14: ; preds = %5
%15 = load i32, i32* %8
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %14
store i32 0, i32* %6
br label %29
18: ; preds = %14
store i32 2, i32* %6
br label %29
19: ; preds = %5
%20 = load i32, i32* %9
%21 = icmp ne i32 %20, 0
br i1 %21, label %22, label %27
22: ; preds = %19
%23 = load i32, i32* %10
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %26
25: ; preds = %22
store i32 0, i32* %6
br label %29
26: ; preds = %22
br label %27
27: ; preds = %26, %19
br label %28
28: ; preds = %27
store i32 2, i32* %6
br label %29
29: ; preds = %28, %25, %18, %17
%30 = load i32, i32* %6
ret i32 %30
}

LLVM IR (-O2):
define i32 @make_a_loop_status(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture readnone %4) {
%6 = icmp eq i32 %0, 0
br i1 %6, label %9, label %7
7: ; preds = %5
%8 = icmp eq i32 %1, 0
br label %13
9: ; preds = %5
%10 = icmp ne i32 %2, 0
%11 = icmp eq i32 %3, 0
%12 = and i1 %10, %11
br label %13
13: ; preds = %9, %7
%14 = phi i1 [ %12, %9 ], [ %8, %7 ]
%15 = select i1 %14, i32 0, i32 2
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int returnBoolean(int val) {
  printf("Helper funciton has been executed\n");
  return (val);
}


x86 assembly (clang, -O0):
<returnBoolean>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<returnBoolean>:
push   %rbx
mov    %edi,%ebx
lea    0xee6(%rip),%rdi
call   1030 <puts@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"Helper funciton has been executed\0A\00"
define i32 @returnBoolean(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
@str = [34 x i8] c"Helper funciton has been executed\00"
define i32 @returnBoolean(i32 returned %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i64 0, i64 0))
ret i32 %0
}
void PendSV_Handler() {}


x86 assembly (clang, -O0):
<PendSV_Handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PendSV_Handler>:
ret

LLVM IR (-O0):
define void @PendSV_Handler() {
ret void
}

LLVM IR (-O2):
define void @PendSV_Handler() {
ret void
}
/* Variables and functions */
scalar_t__ ceil(size_t);
size_t EstimateBas64DecodedDataSize(size_t inDataSize) {
  size_t theDecodedDataSize = (int)ceil(inDataSize / 4.0) * 3;
  return (theDecodedDataSize);
}


x86 assembly (clang, -O0):
<EstimateBas64DecodedDataSize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movaps 0xedd(%rip),%xmm1
movq   -0x8(%rbp),%xmm0
punpckldq %xmm1,%xmm0
movapd 0xedc(%rip),%xmm1
subpd  %xmm1,%xmm0
movaps %xmm0,%xmm1
unpckhpd %xmm0,%xmm0
addsd  %xmm1,%xmm0
movsd  0xed5(%rip),%xmm1
divsd  %xmm1,%xmm0
movaps %xmm0,%xmm1
cvttsd2si %xmm1,%rdi
mov    %rdi,%rcx
sar    $0x3f,%rcx
movsd  0xec2(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
and    %rcx,%rax
or     %rax,%rdi
call   1030 <ceil@plt>
imul   $0x3,%eax,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EstimateBas64DecodedDataSize>:
push   %rax
movq   %rdi,%xmm0
punpckldq 0xee2(%rip),%xmm0
subpd  0xeea(%rip),%xmm0
movapd %xmm0,%xmm1
unpckhpd %xmm0,%xmm1
addsd  %xmm0,%xmm1
mulsd  0xee6(%rip),%xmm1
cvttsd2si %xmm1,%rax
mov    %rax,%rcx
sar    $0x3f,%rcx
subsd  0xeda(%rip),%xmm1
cvttsd2si %xmm1,%rdi
and    %rcx,%rdi
or     %rax,%rdi
call   1030 <ceil@plt>
shl    $0x20,%rax
lea    (%rax,%rax,2),%rax
sar    $0x20,%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @EstimateBas64DecodedDataSize(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = uitofp i64 %4 to double
%6 = fdiv double %5, 4.000000e+00
%7 = fptoui double %6 to i64
%8 = call i64 @ceil(i64 %7)
%9 = trunc i64 %8 to i32
%10 = mul nsw i32 %9, 3
%11 = sext i32 %10 to i64
store i64 %11, i64* %3
%12 = load i64, i64* %3
ret i64 %12
}

LLVM IR (-O2):
define i64 @EstimateBas64DecodedDataSize(i64 %0) {
%2 = uitofp i64 %0 to double
%3 = fmul double %2, 2.500000e-01
%4 = fptoui double %3 to i64
%5 = tail call i64 @ceil(i64 %4)
%6 = mul i64 %5, 12884901888
%7 = ashr exact i64 %6, 32
ret i64 %7
}
/* Variables and functions */
float get_gyro_degrees();
int /*<<< orphan*/ rotate_degrees(float);
void face_heading(float heading) {
  float cur = get_gyro_degrees();
  float turn = heading - cur;
  rotate_degrees(turn);
}


x86 assembly (clang, -O0):
<face_heading>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <get_gyro_degrees@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
call   1040 <rotate_degrees@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<face_heading>:
push   %rax
movss  %xmm0,0x4(%rsp)
xor    %eax,%eax
call   1030 <get_gyro_degrees@plt>
movss  0x4(%rsp),%xmm1
subss  %xmm0,%xmm1
movaps %xmm1,%xmm0
pop    %rax
jmp    1040 <rotate_degrees@plt>

LLVM IR (-O0):
define void @face_heading(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca float
store float %0, float* %2
%5 = call float (...) @get_gyro_degrees()
store float %5, float* %3
%6 = load float, float* %2
%7 = load float, float* %3
%8 = fsub float %6, %7
store float %8, float* %4
%9 = load float, float* %4
%10 = call i32 @rotate_degrees(float %9)
ret void
}

LLVM IR (-O2):
define void @face_heading(float %0) {
%2 = tail call float (...) @get_gyro_degrees()
%3 = fsub float %0, %2
%4 = tail call i32 @rotate_degrees(float %3)
ret void
}
int alignment_ok(const void *base, int align) {
  return (0 || 0) || ((unsigned long)base & (align - 1)) == 0;
}


x86 assembly (clang, -O0):
<alignment_ok>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alignment_ok>:
add    $0xffffffff,%esi
movslq %esi,%rcx
xor    %eax,%eax
test   %rdi,%rcx
sete   %al
ret

LLVM IR (-O0):
define i32 @alignment_ok(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i64
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
%9 = sext i32 %8 to i64
%10 = and i64 %6, %9
%11 = icmp eq i64 %10, 0
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @alignment_ok(i8* %0, i32 %1) {
%3 = ptrtoint i8* %0 to i64
%4 = add nsw i32 %1, -1
%5 = sext i32 %4 to i64
%6 = and i64 %5, %3
%7 = icmp eq i64 %6, 0
%8 = zext i1 %7 to i32
ret i32 %8
}
void gtk_accel_groups_activate() {}


x86 assembly (clang, -O0):
<gtk_accel_groups_activate>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_accel_groups_activate>:
ret

LLVM IR (-O0):
define void @gtk_accel_groups_activate() {
ret void
}

LLVM IR (-O2):
define void @gtk_accel_groups_activate() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ init_goldfish_bus();
void module_init() { init_goldfish_bus(); }


x86 assembly (clang, -O0):
<module_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_goldfish_bus@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_init>:
xor    %eax,%eax
jmp    1030 <init_goldfish_bus@plt>

LLVM IR (-O0):
define void @module_init() {
%1 = call i32 (...) @init_goldfish_bus()
ret void
}

LLVM IR (-O2):
define void @module_init() {
%1 = tail call i32 (...) @init_goldfish_bus()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  int n = 1;
  if (n == 2)
    goto trueCon;
  printf("n is not two\n");
  goto done;
trueCon:
  printf("n is two\n");
  goto done;
done:
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jne    1135 <main+0x25>
jmp    1146 <main+0x36>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
jmp    1152 <main+0x42>
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"n is not two\0A\00"
@.str.1 = [10 x i8] c"n is two\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 2
br i1 %4, label %5, label %6
5: ; preds = %0
br label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %10
8: ; preds = %5
%9 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
ret i32 0
}

LLVM IR (-O2):
@str = [13 x i8] c"n is not two\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
double floor(double);
double round(double x) {
  double y;
  y = floor(x + 0.5);
  return y;
}


x86 assembly (clang, -O0):
<round>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1030 <floor@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<round>:
addsd  0xee8(%rip),%xmm0
jmp    1030 <floor@plt>

LLVM IR (-O0):
define double @round(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fadd double %4, 5.000000e-01
%6 = call double @llvm.floor.f64(double %5)
store double %6, double* %3
%7 = load double, double* %3
ret double %7
}

LLVM IR (-O2):
define double @round(double %0) {
%2 = fadd double %0, 5.000000e-01
%3 = tail call double @llvm.floor.f64(double %2)
ret double %3
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int solcon_replace_quaddobl_solution(int n, int k, int m, double *sol) {
  int b[2], fail;
  b[0] = n;
  b[1] = m;
  fail = _ada_use_c2phc4c(395, &k, b, sol, 0);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_replace_quaddobl_solution>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
lea    -0x20(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x18b,%edi
lea    -0x8(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_replace_quaddobl_solution>:
sub    $0x18,%rsp
mov    %esi,0xc(%rsp)
mov    %edi,0x10(%rsp)
mov    %edx,0x14(%rsp)
lea    0xc(%rsp),%rsi
lea    0x10(%rsp),%rdx
mov    $0x18b,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @solcon_replace_quaddobl_solution(i32 %0, i32 %1, i32 %2, double* %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca double*
%9 = alloca [2 x i32]
%10 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store double* %3, double** %8
%11 = load i32, i32* %5
%12 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
store i32 %11, i32* %12
%13 = load i32, i32* %7
%14 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 1
store i32 %13, i32* %14
%15 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
%16 = load double*, double** %8
%17 = call i32 @_ada_use_c2phc4c(i32 395, i32* %6, i32* %15, double* %16, i32 0)
store i32 %17, i32* %10
%18 = load i32, i32* %10
ret i32 %18
}

LLVM IR (-O2):
define i32 @solcon_replace_quaddobl_solution(i32 %0, i32 %1, i32 %2, double* %3) {
%5 = alloca i32
%6 = alloca [2 x i32]
store i32 %1, i32* %5
%7 = bitcast [2 x i32]* %6 to i8*
%8 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 0
store i32 %0, i32* %8
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 1
store i32 %2, i32* %9
%10 = call i32 @_ada_use_c2phc4c(i32 395, i32* %5, i32* %8, double* %3, i32 0)
ret i32 %10
}
int get_node_column(int n_rows, int node_index) {
  return (node_index / n_rows);
}


x86 assembly (clang, -O0):
<get_node_column>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_node_column>:
mov    %esi,%eax
cltd
idiv   %edi
ret

LLVM IR (-O0):
define i32 @get_node_column(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = sdiv i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_node_column(i32 %0, i32 %1) {
%3 = sdiv i32 %1, %0
ret i32 %3
}
int compare(void *val1, void *val2, void *cmp) {
  if (cmp) {
    return ((int (*)(void *, void *))cmp)(val1, val2);
  } else
    return val1 != val2;
}


x86 assembly (clang, -O0):
<compare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     1135 <compare+0x35>
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   *%rax
mov    %eax,-0x4(%rbp)
jmp    1148 <compare+0x48>
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare>:
test   %rdx,%rdx
je     1107 <compare+0x7>
jmp    *%rdx
xor    %eax,%eax
cmp    %rsi,%rdi
setne  %al
ret

LLVM IR (-O0):
define i32 @compare(i8* %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
%8 = load i8*, i8** %7
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %16
10: ; preds = %3
%11 = load i8*, i8** %7
%12 = bitcast i8* %11 to i32 (i8*, i8*)*
%13 = load i8*, i8** %5
%14 = load i8*, i8** %6
%15 = call i32 %12(i8* %13, i8* %14)
store i32 %15, i32* %4
br label %21
16: ; preds = %3
%17 = load i8*, i8** %5
%18 = load i8*, i8** %6
%19 = icmp ne i8* %17, %18
%20 = zext i1 %19 to i32
store i32 %20, i32* %4
br label %21
21: ; preds = %16, %10
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @compare(i8* %0, i8* %1, i8* %2) {
%4 = icmp eq i8* %2, null
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = bitcast i8* %2 to i32 (i8*, i8*)*
%7 = tail call i32 %6(i8* %0, i8* %1)
br label %11
8: ; preds = %3
%9 = icmp ne i8* %0, %1
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %8, %5
%12 = phi i32 [ %7, %5 ], [ %10, %8 ]
ret i32 %12
}
void set_std_prefix(char *path, int len) {}


x86 assembly (clang, -O0):
<set_std_prefix>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_std_prefix>:
ret

LLVM IR (-O0):
define void @set_std_prefix(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @set_std_prefix(i8* nocapture %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_event_add_child(void *e, void **s, pid_t pid, int options, void *callback,
                   void *userdata) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_event_add_child>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
xor    %eax,%eax
mov    0x2ebd(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_event_add_child>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_event_add_child(i8* %0, i8** %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i8*
%8 = alloca i8**
%9 = alloca i32
%10 = alloca i32
%11 = alloca i8*
%12 = alloca i8*
store i8* %0, i8** %7
store i8** %1, i8*** %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i8* %4, i8** %11
store i8* %5, i8** %12
%13 = load i32, i32* @EINVAL
%14 = sub nsw i32 0, %13
ret i32 %14
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_event_add_child(i8* nocapture readnone %0, i8** nocapture readnone %1, i32 %2, i32 %3, i8* nocapture readnone %4, i8* nocapture readnone %5) {
%7 = load i32, i32* @EINVAL
%8 = sub nsw i32 0, %7
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalpha(int);
void t_isalpha_0x79() {
  Assert_real((isalpha(121)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              610, ("isalpha should be 1 for y"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x79>:
push   %rbp
mov    %rsp,%rbp
mov    $0x79,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x262,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x79>:
push   %rax
mov    $0x79,%edi
call   1030 <isalpha@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x262,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for y\00"
define void @t_isalpha_0x79() {
%1 = call i32 @isalpha(i32 121)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 610, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for y\00"
define void @t_isalpha_0x79() {
%1 = tail call i32 @isalpha(i32 121)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 610, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int XCloseOM() {}


x86 assembly (clang, -O0):
<XCloseOM>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XCloseOM>:
ret

LLVM IR (-O0):
define i32 @XCloseOM() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XCloseOM() {
ret i32 undef
}
/* Variables and functions */
int getpid();
int /*<<< orphan*/ sprintf(char *, char *, int);
int /*<<< orphan*/ system(char *);
void ps_report() {
  char buf[1024];
  sprintf(buf, "ps -o comm,majflt,minflt,rss,drs,pagein,sz,trs,vsz %d 1>&2",
          getpid());
  system(buf);
}


x86 assembly (clang, -O0):
<ps_report>:
push   %rbp
mov    %rsp,%rbp
sub    $0x410,%rsp
lea    -0x400(%rbp),%rax
mov    %rax,-0x408(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    -0x408(%rbp),%rdi
mov    %eax,%edx
lea    0xea0(%rip),%rsi
call   1050 <sprintf@plt>
lea    -0x400(%rbp),%rdi
call   1040 <system@plt>
add    $0x410,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ps_report>:
push   %rbx
sub    $0x400,%rsp
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xeba(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    %eax,%edx
call   1050 <sprintf@plt>
mov    %rbx,%rdi
call   1040 <system@plt>
add    $0x400,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [59 x i8] c"ps -o comm,majflt,minflt,rss,drs,pagein,sz,trs,vsz %d 1>&2\00"
define void @ps_report() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = call i32 (...) @getpid()
%4 = call i32 @sprintf(i8* %2, i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%6 = call i32 @system(i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [59 x i8] c"ps -o comm,majflt,minflt,rss,drs,pagein,sz,trs,vsz %d 1>&2\00"
define void @ps_report() {
%1 = alloca [1024 x i8]
%2 = getelementptr inbounds [1024 x i8], [1024 x i8]* %1, i64 0, i64 0
%3 = tail call i32 (...) @getpid()
%4 = call i32 @sprintf(i8* %2, i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = call i32 @system(i8* %2)
ret void
}
/* Type definitions */
struct genlist {
  int dummy;
};
struct fileinfo_list {
  int dummy;
};
struct fileinfo {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ genlist_prepend(struct genlist *, struct fileinfo *);
void fileinfo_list_prepend(struct fileinfo_list *tthis, struct fileinfo *pfoo) {
  genlist_prepend((struct genlist *)tthis, pfoo);
}


x86 assembly (clang, -O0):
<fileinfo_list_prepend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <genlist_prepend@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fileinfo_list_prepend>:
jmp    1030 <genlist_prepend@plt>

LLVM IR (-O0):
%struct.fileinfo_list = type { i32 }
%struct.fileinfo = type { i32 }
%struct.genlist = type { i32 }
define void @fileinfo_list_prepend(%struct.fileinfo_list* %0, %struct.fileinfo* %1) {
%3 = alloca %struct.fileinfo_list*
%4 = alloca %struct.fileinfo*
store %struct.fileinfo_list* %0, %struct.fileinfo_list** %3
store %struct.fileinfo* %1, %struct.fileinfo** %4
%5 = load %struct.fileinfo_list*, %struct.fileinfo_list** %3
%6 = bitcast %struct.fileinfo_list* %5 to %struct.genlist*
%7 = load %struct.fileinfo*, %struct.fileinfo** %4
%8 = call i32 @genlist_prepend(%struct.genlist* %6, %struct.fileinfo* %7)
ret void
}

LLVM IR (-O2):
%struct.fileinfo_list = type { i32 }
%struct.fileinfo = type { i32 }
%struct.genlist = type { i32 }
define void @fileinfo_list_prepend(%struct.fileinfo_list* %0, %struct.fileinfo* %1) {
%3 = bitcast %struct.fileinfo_list* %0 to %struct.genlist*
%4 = tail call i32 @genlist_prepend(%struct.genlist* %3, %struct.fileinfo* %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ initGpioPinMod(int, int, int);
int /*<<< orphan*/ rcc_enable_gpio(int, int);
void initGPIO(void) {
  rcc_enable_gpio(5, 1);
  initGpioPinMod(0x40021400U, 6, 1);
  rcc_enable_gpio(0, 1);
  initGpioPinMod(0x40020000U, 0, 0);
}


x86 assembly (clang, -O0):
<initGPIO>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edi
mov    $0x1,%esi
call   1040 <rcc_enable_gpio@plt>
mov    $0x40021400,%edi
mov    $0x6,%esi
mov    $0x1,%edx
call   1030 <initGpioPinMod@plt>
xor    %edi,%edi
mov    $0x1,%esi
call   1040 <rcc_enable_gpio@plt>
mov    $0x40020000,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <initGpioPinMod@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<initGPIO>:
push   %rax
mov    $0x5,%edi
mov    $0x1,%esi
call   1040 <rcc_enable_gpio@plt>
mov    $0x40021400,%edi
mov    $0x6,%esi
mov    $0x1,%edx
call   1030 <initGpioPinMod@plt>
xor    %edi,%edi
mov    $0x1,%esi
call   1040 <rcc_enable_gpio@plt>
mov    $0x40020000,%edi
xor    %esi,%esi
xor    %edx,%edx
pop    %rax
jmp    1030 <initGpioPinMod@plt>

LLVM IR (-O0):
define void @initGPIO() {
%1 = call i32 @rcc_enable_gpio(i32 5, i32 1)
%2 = call i32 @initGpioPinMod(i32 1073878016, i32 6, i32 1)
%3 = call i32 @rcc_enable_gpio(i32 0, i32 1)
%4 = call i32 @initGpioPinMod(i32 1073872896, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
define void @initGPIO() {
%1 = tail call i32 @rcc_enable_gpio(i32 5, i32 1)
%2 = tail call i32 @initGpioPinMod(i32 1073878016, i32 6, i32 1)
%3 = tail call i32 @rcc_enable_gpio(i32 0, i32 1)
%4 = tail call i32 @initGpioPinMod(i32 1073872896, i32 0, i32 0)
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
__attribute__((always_)) uint32_t __UHSAX(uint32_t x, uint32_t y) {
  int32_t r, s;
  r = ((((x << 16) >> 16) + ((y) >> 16)) >> 1) & 0x0000FFFF;
  s = ((((x) >> 16) - ((y << 16) >> 16)) >> 1) & 0x0000FFFF;
  return ((s << 16) | (r));
}


x86 assembly (clang, -O0):
<__UHSAX>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x10,%eax
sar    $0x10,%eax
mov    -0x8(%rbp),%ecx
sar    $0x10,%ecx
add    %ecx,%eax
sar    $0x1,%eax
and    $0xffff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
mov    -0x8(%rbp),%ecx
shl    $0x10,%ecx
sar    $0x10,%ecx
sub    %ecx,%eax
sar    $0x1,%eax
and    $0xffff,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
shl    $0x10,%eax
or     -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__UHSAX>:
movswl %di,%eax
movswl %si,%ecx
sar    $0x10,%esi
add    %eax,%esi
shr    %esi
movzwl %si,%eax
sar    $0x10,%edi
sub    %ecx,%edi
and    $0xfffffffe,%edi
shl    $0xf,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @__UHSAX(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = shl i32 %7, 16
%9 = ashr i32 %8, 16
%10 = load i32, i32* %4
%11 = ashr i32 %10, 16
%12 = add nsw i32 %9, %11
%13 = ashr i32 %12, 1
%14 = and i32 %13, 65535
store i32 %14, i32* %5
%15 = load i32, i32* %3
%16 = ashr i32 %15, 16
%17 = load i32, i32* %4
%18 = shl i32 %17, 16
%19 = ashr i32 %18, 16
%20 = sub nsw i32 %16, %19
%21 = ashr i32 %20, 1
%22 = and i32 %21, 65535
store i32 %22, i32* %6
%23 = load i32, i32* %6
%24 = shl i32 %23, 16
%25 = load i32, i32* %5
%26 = or i32 %24, %25
ret i32 %26
}

LLVM IR (-O2):
define i32 @__UHSAX(i32 %0, i32 %1) {
%3 = shl i32 %0, 16
%4 = ashr exact i32 %3, 16
%5 = ashr i32 %1, 16
%6 = add nsw i32 %4, %5
%7 = lshr i32 %6, 1
%8 = and i32 %7, 65535
%9 = ashr i32 %0, 16
%10 = shl i32 %1, 16
%11 = ashr exact i32 %10, 16
%12 = sub nsw i32 %9, %11
%13 = shl nsw i32 %12, 15
%14 = and i32 %13, -65536
%15 = or i32 %14, %8
ret i32 %15
}
/* Type definitions */
struct mg_connection {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mg_printf(struct mg_connection *, char *, int, char const *);
void send_http_error(struct mg_connection *nc, int code, const char *reason) {
  if (reason == NULL) {
    reason = "";
  }
  mg_printf(nc, "HTTP/1.1 %d %s\r\nContent-Length: 0\r\n\r\n", code, reason);
}


x86 assembly (clang, -O0):
<send_http_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1139 <send_http_error+0x29>
lea    0xef0(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
lea    0xeb5(%rip),%rsi
call   1030 <mg_printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_http_error>:
mov    %esi,%eax
test   %rdx,%rdx
lea    0xf09(%rip),%rcx
cmovne %rdx,%rcx
lea    0xed9(%rip),%rsi
mov    %eax,%edx
jmp    1030 <mg_printf@plt>

LLVM IR (-O0):
%struct.mg_connection = type { i32 }
@.str = [1 x i8] zeroinitializer
@.str.1 = [38 x i8] c"HTTP/1.1 %d %s\0D\0AContent-Length: 0\0D\0A\0D\0A\00"
define void @send_http_error(%struct.mg_connection* %0, i32 %1, i8* %2) {
%4 = alloca %struct.mg_connection*
%5 = alloca i32
%6 = alloca i8*
store %struct.mg_connection* %0, %struct.mg_connection** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %10
9: ; preds = %3
store i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8** %6
br label %10
10: ; preds = %9, %3
%11 = load %struct.mg_connection*, %struct.mg_connection** %4
%12 = load i32, i32* %5
%13 = load i8*, i8** %6
%14 = call i32 @mg_printf(%struct.mg_connection* %11, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0), i32 %12, i8* %13)
ret void
}

LLVM IR (-O2):
%struct.mg_connection = type { i32 }
@.str = [1 x i8] zeroinitializer
@.str.1 = [38 x i8] c"HTTP/1.1 %d %s\0D\0AContent-Length: 0\0D\0A\0D\0A\00"
define void @send_http_error(%struct.mg_connection* %0, i32 %1, i8* %2) {
%4 = icmp eq i8* %2, null
%5 = select i1 %4, i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0), i8* %2
%6 = tail call i32 @mg_printf(%struct.mg_connection* %0, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0), i32 %1, i8* %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delete (char *, int);
int /*<<< orphan*/ error(char *, int);
int /*<<< orphan*/ is_ppc_reg(char *);
char *rewrite_ppc_imm(char *, int);
char *rewrite_ppc_reg(char *arg, int argind) {
  if (!is_ppc_reg(arg))
    error("malformed register operand, position %d", argind);
  delete (arg, 1);
  return rewrite_ppc_imm(arg, argind);
}


x86 assembly (clang, -O0):
<rewrite_ppc_reg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <is_ppc_reg@plt>
cmp    $0x0,%eax
jne    1170 <rewrite_ppc_reg+0x30>
mov    -0xc(%rbp),%esi
lea    0xe95(%rip),%rdi
call   1050 <error@plt>
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1060 <delete@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <rewrite_ppc_imm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rewrite_ppc_reg>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <is_ppc_reg@plt>
test   %eax,%eax
jne    115f <rewrite_ppc_reg+0x1f>
lea    0xea8(%rip),%rdi
mov    %ebp,%esi
call   1050 <error@plt>
mov    %rbx,%rdi
mov    $0x1,%esi
call   1060 <delete@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <rewrite_ppc_imm@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"malformed register operand, position %d\00"
define i8* @rewrite_ppc_reg(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @is_ppc_reg(i8* %5)
%7 = icmp ne i32 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %2
%9 = load i32, i32* %4
%10 = call i32 @error(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %9)
br label %11
11: ; preds = %8, %2
%12 = load i8*, i8** %3
%13 = call i32 @delete(i8* %12, i32 1)
%14 = load i8*, i8** %3
%15 = load i32, i32* %4
%16 = call i8* @rewrite_ppc_imm(i8* %14, i32 %15)
ret i8* %16
}

LLVM IR (-O2):
@.str = [40 x i8] c"malformed register operand, position %d\00"
define i8* @rewrite_ppc_reg(i8* %0, i32 %1) {
%3 = tail call i32 @is_ppc_reg(i8* %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @error(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i32 %1)
br label %7
7: ; preds = %5, %2
%8 = tail call i32 @delete(i8* %0, i32 1)
%9 = tail call i8* @rewrite_ppc_imm(i8* %0, i32 %1)
ret i8* %9
}
/* Variables and functions */
char *p_textdomain(char const *);
int /*<<< orphan*/ setup();
char *g_libintl_textdomain(const char *domainname) {
  setup();
  return p_textdomain(domainname);
}


x86 assembly (clang, -O0):
<g_libintl_textdomain>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <setup@plt>
mov    -0x8(%rbp),%rdi
call   1030 <p_textdomain@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_libintl_textdomain>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <setup@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <p_textdomain@plt>

LLVM IR (-O0):
define i8* @g_libintl_textdomain(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @setup()
%4 = load i8*, i8** %2
%5 = call i8* @p_textdomain(i8* %4)
ret i8* %5
}

LLVM IR (-O2):
define i8* @g_libintl_textdomain(i8* %0) {
%2 = tail call i32 (...) @setup()
%3 = tail call i8* @p_textdomain(i8* %0)
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, size_t);
void *realloc(void *, size_t);
int /*<<< orphan*/ stderr;
void *xrealloc(void *ptr, size_t size) {
  void *mem = realloc(ptr, size);
  if (size && !mem) {
    fprintf(stderr, "failed to allocate memory (%zu bytes)", size);
    abort();
  }
  return mem;
}


x86 assembly (clang, -O0):
<xrealloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1187 <xrealloc+0x57>
cmpq   $0x0,-0x18(%rbp)
jne    1187 <xrealloc+0x57>
mov    0x2e72(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
lea    0xe85(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrealloc>:
push   %rbx
mov    %rsi,%rbx
call   1050 <realloc@plt>
test   %rbx,%rbx
je     1143 <xrealloc+0x13>
test   %rax,%rax
je     1145 <xrealloc+0x15>
pop    %rbx
ret
mov    0x2e94(%rip),%rax
mov    (%rax),%edi
lea    0xeab(%rip),%rsi
mov    %rbx,%rdx
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [38 x i8] c"failed to allocate memory (%zu bytes)\00"
define i8* @xrealloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i64, i64* %4
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %2
%12 = load i8*, i8** %5
%13 = icmp ne i8* %12, null
br i1 %13, label %19, label %14
14: ; preds = %11
%15 = load i32, i32* @stderr
%16 = load i64, i64* %4
%17 = call i32 @fprintf(i32 %15, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i64 %16)
%18 = call i32 (...) @abort()
unreachable
19: ; preds = %11, %2
%20 = load i8*, i8** %5
ret i8* %20
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [38 x i8] c"failed to allocate memory (%zu bytes)\00"
define noalias i8* @xrealloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i64 %1, 0
%5 = icmp ne i8* %3, null
%6 = or i1 %4, %5
br i1 %6, label %11, label %7
7: ; preds = %2
%8 = load i32, i32* @stderr
%9 = tail call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i64 %1)
%10 = tail call i32 (...) @abort()
unreachable
11: ; preds = %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void test37_Mod_foo__E() { printf("Mod.foo\n"); }


x86 assembly (clang, -O0):
<test37_Mod_foo__E>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test37_Mod_foo__E>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"Mod.foo\0A\00"
define void @test37_Mod_foo__E() {
%1 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [8 x i8] c"Mod.foo\00"
define void @test37_Mod_foo__E() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
ret void
}
const char *charset_to_utf8(const char *from) { return from; }


x86 assembly (clang, -O0):
<charset_to_utf8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<charset_to_utf8>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @charset_to_utf8(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @charset_to_utf8(i8* readnone returned %0) {
ret i8* %0
}
/* Type definitions */
typedef int /*<<< orphan*/ aio_context_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_io_destroy;
int syscall(int /*<<< orphan*/, int /*<<< orphan*/);
int io_destroy(aio_context_t ctx) { return syscall(__NR_io_destroy, ctx); }


x86 assembly (clang, -O0):
<io_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_destroy>:
mov    %edi,%esi
mov    0x2ebf(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@__NR_io_destroy = global i32 0
define i32 @io_destroy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @__NR_io_destroy
%4 = load i32, i32* %2
%5 = call i32 @syscall(i32 %3, i32 %4)
ret i32 %5
}

LLVM IR (-O2):
@__NR_io_destroy = global i32 0
define i32 @io_destroy(i32 %0) {
%2 = load i32, i32* @__NR_io_destroy
%3 = tail call i32 @syscall(i32 %2, i32 %0)
ret i32 %3
}