xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void keyboard(unsigned char k, int x, int y) {
  if (k == 'q' || k == 27) {
    exit(1);
  }
}


x86 assembly (clang, -O0):
<keyboard>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movzbl -0x1(%rbp),%eax
cmp    $0x71,%eax
je     113e <keyboard+0x2e>
movzbl -0x1(%rbp),%eax
cmp    $0x1b,%eax
jne    1148 <keyboard+0x38>
mov    $0x1,%edi
call   1030 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<keyboard>:
cmp    $0x71,%dil
je     111d <keyboard+0xd>
cmp    $0x1b,%dil
je     111d <keyboard+0xd>
ret
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @keyboard(i8 zeroext %0, i32 %1, i32 %2) {
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
store i8 %0, i8* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = icmp eq i32 %8, 113
br i1 %9, label %14, label %10
10: ; preds = %3
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
%13 = icmp eq i32 %12, 27
br i1 %13, label %14, label %16
14: ; preds = %10, %3
%15 = call i32 @exit(i32 1)
unreachable
16: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @keyboard(i8 zeroext %0, i32 %1, i32 %2) {
switch i8 %0, label %6 [
i8 113, label %4
i8 27, label %4
]
4: ; preds = %3, %3
%5 = tail call i32 @exit(i32 1)
unreachable
6: ; preds = %3
ret void
}
int cling_testlibrary_function() { return 0x42; }


x86 assembly (clang, -O0):
<cling_testlibrary_function>:
push   %rbp
mov    %rsp,%rbp
mov    $0x42,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cling_testlibrary_function>:
mov    $0x42,%eax
ret

LLVM IR (-O0):
define i32 @cling_testlibrary_function() {
ret i32 66
}

LLVM IR (-O2):
define i32 @cling_testlibrary_function() {
ret i32 66
}
/* Type definitions */
struct event_callback_entry {
  int dummy;
};
struct callback_schedule_entry {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ schedule_callback3(struct event_callback_entry *,
                                      struct callback_schedule_entry **,
                                      char const *, double, double, double);
void schedule_callback2(struct event_callback_entry *e,
                        struct callback_schedule_entry **s, const char *event,
                        double param1, double param2) {
  schedule_callback3(e, s, event, param1, param2, 0.0);
}


x86 assembly (clang, -O0):
<schedule_callback2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movsd  %xmm0,-0x20(%rbp)
movsd  %xmm1,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
movsd  -0x20(%rbp),%xmm0
movsd  -0x28(%rbp),%xmm1
xorps  %xmm2,%xmm2
call   1030 <schedule_callback3@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<schedule_callback2>:
xorps  %xmm2,%xmm2
jmp    1030 <schedule_callback3@plt>

LLVM IR (-O0):
%struct.event_callback_entry = type { i32 }
%struct.callback_schedule_entry = type { i32 }
define void @schedule_callback2(%struct.event_callback_entry* %0, %struct.callback_schedule_entry** %1, i8* %2, double %3, double %4) {
%6 = alloca %struct.event_callback_entry*
%7 = alloca %struct.callback_schedule_entry**
%8 = alloca i8*
%9 = alloca double
%10 = alloca double
store %struct.event_callback_entry* %0, %struct.event_callback_entry** %6
store %struct.callback_schedule_entry** %1, %struct.callback_schedule_entry*** %7
store i8* %2, i8** %8
store double %3, double* %9
store double %4, double* %10
%11 = load %struct.event_callback_entry*, %struct.event_callback_entry** %6
%12 = load %struct.callback_schedule_entry**, %struct.callback_schedule_entry*** %7
%13 = load i8*, i8** %8
%14 = load double, double* %9
%15 = load double, double* %10
%16 = call i32 @schedule_callback3(%struct.event_callback_entry* %11, %struct.callback_schedule_entry** %12, i8* %13, double %14, double %15, double 0.000000e+00)
ret void
}

LLVM IR (-O2):
%struct.event_callback_entry = type { i32 }
%struct.callback_schedule_entry = type { i32 }
define void @schedule_callback2(%struct.event_callback_entry* %0, %struct.callback_schedule_entry** %1, i8* %2, double %3, double %4) {
%6 = tail call i32 @schedule_callback3(%struct.event_callback_entry* %0, %struct.callback_schedule_entry** %1, i8* %2, double %3, double %4, double 0.000000e+00)
ret void
}
__int128_t quad_fetch_sub_consume(__int128_t *ptr, __int128_t value) {
  return __atomic_fetch_sub(ptr, value, 1);
}


x86 assembly (clang, -O0):
<quad_fetch_sub_consume>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %rsi,-0x20(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rdi,-0x28(%rbp)
mov    %rcx,-0x38(%rbp)
mov    %rax,-0x40(%rbp)
mov    -0x28(%rbp),%rdi
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x48(%rbp)
mov    %rax,-0x50(%rbp)
mov    -0x50(%rbp),%rax
mov    -0x48(%rbp),%rcx
mov    %rcx,-0x68(%rbp)
mov    %rax,-0x70(%rbp)
mov    -0x70(%rbp),%rsi
mov    -0x68(%rbp),%rdx
mov    $0x1,%ecx
call   1030 <__atomic_fetch_sub_16@plt>
mov    %rax,-0x80(%rbp)
mov    %rdx,-0x78(%rbp)
mov    -0x80(%rbp),%rax
mov    -0x78(%rbp),%rcx
mov    %rcx,-0x58(%rbp)
mov    %rax,-0x60(%rbp)
mov    -0x60(%rbp),%rax
mov    -0x58(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quad_fetch_sub_consume>:
mov    $0x1,%ecx
jmp    1030 <__atomic_fetch_sub_16@plt>

LLVM IR (-O0):
define { i64, i64 } @quad_fetch_sub_consume(i128* %0, i64 %1, i64 %2) {
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128*
%7 = alloca i128
%8 = alloca i128
%9 = alloca i128
%10 = alloca i128
%11 = alloca i128
%12 = bitcast i128* %5 to { i64, i64 }*
%13 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %12, i32 0, i32 0
store i64 %1, i64* %13
%14 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %12, i32 0, i32 1
store i64 %2, i64* %14
%15 = load i128, i128* %5
store i128* %0, i128** %6
store i128 %15, i128* %7
%16 = load i128*, i128** %6
%17 = load i128, i128* %7
store i128 %17, i128* %8
%18 = bitcast i128* %16 to i8*
%19 = load i128, i128* %8
store i128 %19, i128* %10
%20 = bitcast i128* %10 to { i64, i64 }*
%21 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %20, i32 0, i32 0
%22 = load i64, i64* %21
%23 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %20, i32 0, i32 1
%24 = load i64, i64* %23
%25 = call { i64, i64 } @__atomic_fetch_sub_16(i8* %18, i64 %22, i64 %24, i32 1)
%26 = bitcast i128* %11 to { i64, i64 }*
%27 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %26, i32 0, i32 0
%28 = extractvalue { i64, i64 } %25, 0
store i64 %28, i64* %27
%29 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %26, i32 0, i32 1
%30 = extractvalue { i64, i64 } %25, 1
store i64 %30, i64* %29
%31 = load i128, i128* %11
store i128 %31, i128* %9
%32 = load i128, i128* %9
store i128 %32, i128* %4
%33 = bitcast i128* %4 to { i64, i64 }*
%34 = load { i64, i64 }, { i64, i64 }* %33
ret { i64, i64 } %34
}

LLVM IR (-O2):
define { i64, i64 } @quad_fetch_sub_consume(i128* %0, i64 %1, i64 %2) {
%4 = bitcast i128* %0 to i8*
%5 = tail call { i64, i64 } @__atomic_fetch_sub_16(i8* %4, i64 %1, i64 %2, i32 1)
ret { i64, i64 } %5
}
/* Variables and functions */
int ArgNum();
int /*<<< orphan*/ SetFlag(int, int);
void Act_Let(void) {
  int a = ArgNum();
  SetFlag(a, ArgNum());
}


x86 assembly (clang, -O0):
<Act_Let>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <ArgNum@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1040 <ArgNum@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%esi
call   1030 <SetFlag@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Act_Let>:
push   %rbx
xor    %eax,%eax
call   1040 <ArgNum@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <ArgNum@plt>
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1030 <SetFlag@plt>

LLVM IR (-O0):
define void @Act_Let() {
%1 = alloca i32
%2 = call i32 (...) @ArgNum()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 (...) @ArgNum()
%5 = call i32 @SetFlag(i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
define void @Act_Let() {
%1 = tail call i32 (...) @ArgNum()
%2 = tail call i32 (...) @ArgNum()
%3 = tail call i32 @SetFlag(i32 %1, i32 %2)
ret void
}
int g(int month) {
  if (month <= 2)
    return (month + 13);
  else
    return (month + 1);
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jg     111f <g+0x1f>
mov    -0x8(%rbp),%eax
add    $0xd,%eax
mov    %eax,-0x4(%rbp)
jmp    1128 <g+0x28>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
lea    0x1(%rdi),%ecx
lea    0xd(%rdi),%eax
cmp    $0x3,%edi
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @g(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 2
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 13
store i32 %8, i32* %2
br label %12
9: ; preds = %1
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %12
12: ; preds = %9, %6
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @g(i32 %0) {
%2 = icmp slt i32 %0, 3
%3 = select i1 %2, i32 13, i32 1
%4 = add nsw i32 %3, %0
ret i32 %4
}
int fun687() { return 687; }


x86 assembly (clang, -O0):
<fun687>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2af,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun687>:
mov    $0x2af,%eax
ret

LLVM IR (-O0):
define i32 @fun687() {
ret i32 687
}

LLVM IR (-O2):
define i32 @fun687() {
ret i32 687
}
void ft_striteri_the_ultimate(char *s, unsigned int i,
                              void (*f)(unsigned int, char *)) {
  if (!(*s))
    return;
  f(i, s);
  ft_striteri_the_ultimate(s + 1, i + 1, f);
}


x86 assembly (clang, -O0):
<ft_striteri_the_ultimate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
jne    1135 <ft_striteri_the_ultimate+0x25>
jmp    1159 <ft_striteri_the_ultimate+0x49>
mov    -0x18(%rbp),%rax
mov    -0xc(%rbp),%edi
mov    -0x8(%rbp),%rsi
call   *%rax
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
mov    -0xc(%rbp),%esi
add    $0x1,%esi
mov    -0x18(%rbp),%rdx
call   1030 <ft_striteri_the_ultimate@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_striteri_the_ultimate>:
push   %rbp
push   %r14
push   %rbx
cmpb   $0x0,(%rdi)
je     1135 <ft_striteri_the_ultimate+0x35>
mov    %rdx,%r14
mov    %esi,%ebp
mov    %rdi,%rbx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    %ebp,%edi
mov    %rbx,%rsi
call   *%r14
add    $0x1,%ebp
cmpb   $0x0,0x1(%rbx)
lea    0x1(%rbx),%rbx
jne    1120 <ft_striteri_the_ultimate+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @ft_striteri_the_ultimate(i8* %0, i32 %1, void (i32, i8*)* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca void (i32, i8*)*
store i8* %0, i8** %4
store i32 %1, i32* %5
store void (i32, i8*)* %2, void (i32, i8*)** %6
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %3
br label %20
11: ; preds = %3
%12 = load void (i32, i8*)*, void (i32, i8*)** %6
%13 = load i32, i32* %5
%14 = load i8*, i8** %4
%15 = load i8*, i8** %4
%16 = getelementptr inbounds i8, i8* %15, i64 1
%17 = load i32, i32* %5
%18 = add i32 %17, 1
%19 = load void (i32, i8*)*, void (i32, i8*)** %6
br label %20
20: ; preds = %11, %10
ret void
}

LLVM IR (-O2):
define void @ft_striteri_the_ultimate(i8* %0, i32 %1, void (i32, i8*)* nocapture %2) {
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %13, label %6
6: ; preds = %3, %6
%7 = phi i32 [ %10, %6 ], [ %1, %3 ]
%8 = phi i8* [ %9, %6 ], [ %0, %3 ]
tail call void %2(i32 %7, i8* %8)
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = add i32 %7, 1
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %6
13: ; preds = %6, %3
ret void
}
unsigned xrop3_199_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = D | T;
  stk2 = S & stk3;
  stk1 = T ^ stk2;
  stk1 = ~stk1;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_199_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
or     -0x10(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_199_1_0>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
lea    (%rsi,%rax,1),%edx
or     $0xff,%eax
and    %ecx,%eax
xor    %edx,%eax
or     %ecx,%eax
not    %eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_199_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = load i32, i32* %7
%25 = or i32 %23, %24
store i32 %25, i32* %10
%26 = load i32, i32* %6
%27 = load i32, i32* %10
%28 = and i32 %26, %27
store i32 %28, i32* %9
%29 = load i32, i32* %7
%30 = load i32, i32* %9
%31 = xor i32 %29, %30
store i32 %31, i32* %8
%32 = load i32, i32* %8
%33 = xor i32 %32, -1
store i32 %33, i32* %8
%34 = load i32, i32* %8
%35 = load i32, i32* %6
%36 = xor i32 %35, -1
%37 = and i32 %34, %36
%38 = load i32, i32* %5
%39 = load i32, i32* %6
%40 = and i32 %38, %39
%41 = or i32 %37, %40
ret i32 %41
}

LLVM IR (-O2):
define i32 @xrop3_199_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = or i32 %6, %5
%8 = or i32 %6, 255
%9 = and i32 %8, %4
%10 = xor i32 %9, %7
%11 = or i32 %10, %4
%12 = xor i32 %11, -1
%13 = or i32 %12, %3
ret i32 %13
}
/* Variables and functions */
void ThreadShutdownSemaphore(void) {}


x86 assembly (clang, -O0):
<ThreadShutdownSemaphore>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ThreadShutdownSemaphore>:
ret

LLVM IR (-O0):
define void @ThreadShutdownSemaphore() {
ret void
}

LLVM IR (-O2):
define void @ThreadShutdownSemaphore() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x36() {
  Assert_real((isspace(54) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              275, ("isspace should be 0 for 6"));
}


x86 assembly (clang, -O0):
<t_isspace_0x36>:
push   %rbp
mov    %rsp,%rbp
mov    $0x36,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x113,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x36>:
push   %rax
mov    $0x36,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x113,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for 6\00"
define void @t_isspace_0x36() {
%1 = call i64 @isspace(i32 54)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 275, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [26 x i8] c"isspace should be 0 for 6\00"
define void @t_isspace_0x36() {
%1 = tail call i64 @isspace(i32 54)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 275, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int mc_sync_synchronize(int sync_point) { return -1; }


x86 assembly (clang, -O0):
<mc_sync_synchronize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mc_sync_synchronize>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @mc_sync_synchronize(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @mc_sync_synchronize(i32 %0) {
ret i32 -1
}
int cfg_parse_key(char **val, char *data, int len) { return 1; }


x86 assembly (clang, -O0):
<cfg_parse_key>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cfg_parse_key>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @cfg_parse_key(i8** %0, i8* %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i32
store i8** %0, i8*** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 1
}

LLVM IR (-O2):
define i32 @cfg_parse_key(i8** nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int main();
void _entry() {
  int ret;
  ret = main();
  exit(ret);
}


x86 assembly (clang, -O0):
<_entry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <main@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<_entry>:
push   %rax
xor    %eax,%eax
call   1030 <main@plt>
mov    %eax,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @_entry() {
%1 = alloca i32
%2 = call i32 (...) @main()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
define void @_entry() {
%1 = tail call i32 (...) @main()
%2 = tail call i32 @exit(i32 %1)
unreachable
}
/* Type definitions */
struct proctal {
  int dummy;
};

/* Variables and functions */
int proctal_implementation_watch_next(struct proctal *, void **);
int proctal_watch_next(struct proctal *p, void **address) {
  return proctal_implementation_watch_next(p, address);
}


x86 assembly (clang, -O0):
<proctal_watch_next>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <proctal_implementation_watch_next@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<proctal_watch_next>:
jmp    1030 <proctal_implementation_watch_next@plt>

LLVM IR (-O0):
%struct.proctal = type { i32 }
define i32 @proctal_watch_next(%struct.proctal* %0, i8** %1) {
%3 = alloca %struct.proctal*
%4 = alloca i8**
store %struct.proctal* %0, %struct.proctal** %3
store i8** %1, i8*** %4
%5 = load %struct.proctal*, %struct.proctal** %3
%6 = load i8**, i8*** %4
%7 = call i32 @proctal_implementation_watch_next(%struct.proctal* %5, i8** %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.proctal = type { i32 }
define i32 @proctal_watch_next(%struct.proctal* %0, i8** %1) {
%3 = tail call i32 @proctal_implementation_watch_next(%struct.proctal* %0, i8** %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void print_hex_car(char c) { printf("%02X", c & 0xFF); }


x86 assembly (clang, -O0):
<print_hex_car>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
and    $0xff,%eax
lea    0xed2(%rip),%rdi
movsbl %al,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_hex_car>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%02X\00"
define void @print_hex_car(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 255
%6 = trunc i32 %5 to i8
%7 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 signext %6)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%02X\00"
define void @print_hex_car(i8 signext %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8 signext %0)
ret void
}
void g_hash_table_steal() {}


x86 assembly (clang, -O0):
<g_hash_table_steal>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_hash_table_steal>:
ret

LLVM IR (-O0):
define void @g_hash_table_steal() {
ret void
}

LLVM IR (-O2):
define void @g_hash_table_steal() {
ret void
}
int ***func4(void) { return (int ***)0; }


x86 assembly (clang, -O0):
<func4>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func4>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32*** @func4() {
ret i32*** null
}

LLVM IR (-O2):
define noalias i32*** @func4() {
ret i32*** null
}
int execute_io_destroy() { return 0; }


x86 assembly (clang, -O0):
<execute_io_destroy>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_io_destroy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_io_destroy() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_io_destroy() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void f1(double d) {
  if (d != 3.0)
    abort();
}


x86 assembly (clang, -O0):
<f1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
ucomisd %xmm1,%xmm0
jne    113f <f1+0x2f>
jp     113f <f1+0x2f>
jmp    1146 <f1+0x36>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1>:
push   %rax
ucomisd 0xee7(%rip),%xmm0
jne    111f <f1+0xf>
jp     111f <f1+0xf>
pop    %rax
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @f1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp une double %3, 3.000000e+00
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @abort()
unreachable
7: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @f1(double %0) {
%2 = fcmp une double %0, 3.000000e+00
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %1
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int32_t idiv_down(int32_t n, int32_t d) {
  return (n >= 0) ? (n / d) : (n - d + 1) / d;
}


x86 assembly (clang, -O0):
<idiv_down>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     1123 <idiv_down+0x23>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0xc(%rbp)
jmp    1133 <idiv_down+0x33>
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
add    $0x1,%eax
cltd
idivl  -0x8(%rbp)
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<idiv_down>:
mov    %edi,%eax
sub    %esi,%eax
add    $0x1,%eax
test   %edi,%edi
cmovns %edi,%eax
cltd
idiv   %esi
ret

LLVM IR (-O0):
define i32 @idiv_down(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sge i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %2
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sdiv i32 %8, %9
br label %18
11: ; preds = %2
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = sub nsw i32 %12, %13
%15 = add nsw i32 %14, 1
%16 = load i32, i32* %4
%17 = sdiv i32 %15, %16
br label %18
18: ; preds = %11, %7
%19 = phi i32 [ %10, %7 ], [ %17, %11 ]
ret i32 %19
}

LLVM IR (-O2):
define i32 @idiv_down(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, -1
%4 = add i32 %0, 1
%5 = sub i32 %4, %1
%6 = select i1 %3, i32 %0, i32 %5
%7 = sdiv i32 %6, %1
ret i32 %7
}
main() { int x[][2] = {1, {2, 3}, 4}; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    0xef5(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0xef2(%rip),%rax
mov    %rax,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@__const.main.x = [2 x [2 x i32]] [[2 x i32] [i32 1, i32 2], [2 x i32] [i32 4, i32 0]]
define i32 @main() {
%1 = alloca [2 x [2 x i32]]
%2 = bitcast [2 x [2 x i32]]* %1 to i8*
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void help(void) {
  printf("Usage: lightp [image]\n");
  printf("'h'            - help\n");
  printf("'p'            - toggle point mode\n");
  printf("left mouse     - pan\n");
  printf("right mouse    - rotate\n");
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xef0(%rip),%rdi
call   1030 <printf@plt>
lea    0xefb(%rip),%rdi
call   1030 <printf@plt>
lea    0xf13(%rip),%rdi
call   1030 <printf@plt>
lea    0xf1d(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef2(%rip),%rdi
call   1030 <puts@plt>
lea    0xefc(%rip),%rdi
call   1030 <puts@plt>
lea    0xf13(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1c(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"Usage: lightp [image]\0A\00"
@.str.1 = [23 x i8] c"'h' - help\0A\00"
@.str.2 = [36 x i8] c"'p' - toggle point mode\0A\00"
@.str.3 = [22 x i8] c"left mouse - pan\0A\00"
@.str.4 = [25 x i8] c"right mouse - rotate\0A\00"
define void @help() {
%1 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.2, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.3, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.4, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [22 x i8] c"Usage: lightp [image]\00"
@str.5 = [22 x i8] c"'h' - help\00"
@str.6 = [35 x i8] c"'p' - toggle point mode\00"
@str.7 = [21 x i8] c"left mouse - pan\00"
@str.8 = [24 x i8] c"right mouse - rotate\00"
define void @help() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str.5, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str.6, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str.7, i64 0, i64 0))
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([24 x i8], [24 x i8]* @str.8, i64 0, i64 0))
ret void
}
void test5(int i, char c) { return; }


x86 assembly (clang, -O0):
<test5>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %edi,-0x4(%rbp)
mov    %al,-0x5(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test5>:
ret

LLVM IR (-O0):
define void @test5(i32 %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
store i32 %0, i32* %3
store i8 %1, i8* %4
ret void
}

LLVM IR (-O2):
define void @test5(i32 %0, i8 signext %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ args_read(int, char **);
int /*<<< orphan*/ gfx_start();
int main(int argc, char *argv[]) {
  args_read(argc, argv);
  gfx_start();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <args_read@plt>
mov    $0x0,%al
call   1040 <gfx_start@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <args_read@plt>
xor    %eax,%eax
call   1040 <gfx_start@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @args_read(i32 %6, i8** %7)
%9 = call i32 (...) @gfx_start()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @args_read(i32 %0, i8** %1)
%4 = tail call i32 (...) @gfx_start()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, void *);
void barf(char *message, void *extra) {
  printf(message, extra);
  exit(1);
}


x86 assembly (clang, -O0):
<barf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<barf>:
push   %rax
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @barf(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @printf(i8* %5, i8* %6)
%8 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @barf(i8* %0, i8* %1) {
%3 = tail call i32 @printf(i8* %0, i8* %1)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ doTopDown(int, int);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main() {
  printf("Enter Two Numbers: ");
  int a, b;
  scanf("%d %d", &a, &b);
  doTopDown(a, b);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
lea    0xec2(%rip),%rdi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1050 <doTopDown@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
lea    0xed0(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    0x4(%rsp),%edi
mov    (%rsp),%esi
call   1050 <doTopDown@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Enter Two Numbers: \00"
@.str.1 = [6 x i8] c"%d %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32* %2, i32* %3)
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = call i32 @doTopDown(i32 %6, i32 %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [20 x i8] c"Enter Two Numbers: \00"
@.str.1 = [6 x i8] c"%d %d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = bitcast i32* %1 to i8*
%5 = bitcast i32* %2 to i8*
%6 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i32* %1, i32* %2)
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = call i32 @doTopDown(i32 %7, i32 %8)
ret i32 0
}
/* Variables and functions */
void *pgp_load(void *);
void *__pgp_load_agent(void *addr) { return pgp_load(addr); }


x86 assembly (clang, -O0):
<__pgp_load_agent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pgp_load@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pgp_load_agent>:
jmp    1030 <pgp_load@plt>

LLVM IR (-O0):
define i8* @__pgp_load_agent(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @pgp_load(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @__pgp_load_agent(i8* %0) {
%2 = tail call i8* @pgp_load(i8* %0)
ret i8* %2
}
void rop3_15_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  stk1 = ~T;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_15_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0xa(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_15_1_1>:
mov    %edx,%eax
or     %sil,%al
not    %al
mov    (%rdi),%cl
and    %cl,%sil
or     %al,%sil
and    %dl,%cl
or     %sil,%cl
mov    %cl,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_15_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8, i8* %6
%9 = zext i8 %8 to i32
%10 = xor i32 %9, -1
%11 = trunc i32 %10 to i8
store i8 %11, i8* %7
%12 = load i8, i8* %7
%13 = zext i8 %12 to i32
%14 = load i8, i8* %5
%15 = zext i8 %14 to i32
%16 = xor i32 %15, -1
%17 = and i32 %13, %16
%18 = load i8, i8* %6
%19 = zext i8 %18 to i32
%20 = xor i32 %19, -1
%21 = and i32 %17, %20
%22 = load i8*, i8** %4
%23 = load i8, i8* %22
%24 = zext i8 %23 to i32
%25 = load i8, i8* %5
%26 = zext i8 %25 to i32
%27 = and i32 %24, %26
%28 = or i32 %21, %27
%29 = load i8*, i8** %4
%30 = load i8, i8* %29
%31 = zext i8 %30 to i32
%32 = load i8, i8* %6
%33 = zext i8 %32 to i32
%34 = and i32 %31, %33
%35 = or i32 %28, %34
%36 = trunc i32 %35 to i8
%37 = load i8*, i8** %4
store i8 %36, i8* %37
ret void
}

LLVM IR (-O2):
define void @rop3_15_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = or i8 %2, %1
%5 = xor i8 %4, -1
%6 = load i8, i8* %0
%7 = and i8 %6, %1
%8 = or i8 %7, %5
%9 = and i8 %6, %2
%10 = or i8 %8, %9
store i8 %10, i8* %0
ret void
}
/* Variables and functions */
double grams_air();
double target_AFR();
long double get_fuel_pw() { return (grams_air() / target_AFR()) / 0.002898; }


x86 assembly (clang, -O0):
<get_fuel_pw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
xor    %eax,%eax
mov    %al,-0x11(%rbp)
call   1030 <grams_air@plt>
mov    -0x11(%rbp),%al
movsd  %xmm0,-0x10(%rbp)
call   1040 <target_AFR@plt>
movaps %xmm0,%xmm1
movsd  -0x10(%rbp),%xmm0
divsd  %xmm1,%xmm0
movsd  0xead(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
fldl   -0x8(%rbp)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fuel_pw>:
sub    $0x18,%rsp
xor    %eax,%eax
call   1030 <grams_air@plt>
movsd  %xmm0,0x8(%rsp)
xor    %eax,%eax
call   1040 <target_AFR@plt>
movsd  0x8(%rsp),%xmm1
divsd  %xmm0,%xmm1
divsd  0xeb6(%rip),%xmm1
movsd  %xmm1,0x10(%rsp)
fldl   0x10(%rsp)
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @get_fuel_pw() {
%1 = call double (...) @grams_air()
%2 = call double (...) @target_AFR()
%3 = fdiv double %1, %2
%4 = fdiv double %3, 2.898000e-03
%5 = fpext double %4 to x86_fp80
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @get_fuel_pw() {
%1 = tail call double (...) @grams_air()
%2 = tail call double (...) @target_AFR()
%3 = fdiv double %1, %2
%4 = fdiv double %3, 2.898000e-03
%5 = fpext double %4 to x86_fp80
ret x86_fp80 %5
}
/* Variables and functions */
void const *GppcFinfoV1();
const void *pg_finfo_test_interrupt(void) { return GppcFinfoV1(); }


x86 assembly (clang, -O0):
<pg_finfo_test_interrupt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GppcFinfoV1@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pg_finfo_test_interrupt>:
xor    %eax,%eax
jmp    1030 <GppcFinfoV1@plt>

LLVM IR (-O0):
define i8* @pg_finfo_test_interrupt() {
%1 = call i8* (...) @GppcFinfoV1()
ret i8* %1
}

LLVM IR (-O2):
define i8* @pg_finfo_test_interrupt() {
%1 = tail call i8* (...) @GppcFinfoV1()
ret i8* %1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _scan_nan(int *, int, char const *);
double nan(const char *s) {
  union {
    double d;
    uint32_t bits[2];
  } u;
  _scan_nan(u.bits, 2, s);
  u.bits[1] |= 0x7ff80000;
  return (u.d);
}


x86 assembly (clang, -O0):
<nan>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    $0x2,%esi
call   1030 <_scan_nan@plt>
mov    -0xc(%rbp),%eax
or     $0x7ff80000,%eax
mov    %eax,-0xc(%rbp)
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nan>:
push   %rax
mov    %rdi,%rdx
mov    %rsp,%rdi
mov    $0x2,%esi
call   1030 <_scan_nan@plt>
orl    $0x7ff80000,0x4(%rsp)
7f
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
%union.anon = type { double }
define double @nan(i8* %0) {
%2 = alloca i8*
%3 = alloca %union.anon
store i8* %0, i8** %2
%4 = bitcast %union.anon* %3 to [2 x i32]*
%5 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
%6 = load i8*, i8** %2
%7 = call i32 @_scan_nan(i32* %5, i32 2, i8* %6)
%8 = bitcast %union.anon* %3 to [2 x i32]*
%9 = getelementptr inbounds [2 x i32], [2 x i32]* %8, i64 0, i64 1
%10 = load i32, i32* %9
%11 = or i32 %10, 2146959360
store i32 %11, i32* %9
%12 = bitcast %union.anon* %3 to double*
%13 = load double, double* %12
ret double %13
}

LLVM IR (-O2):
%union.anon = type { double }
define double @nan(i8* %0) {
%2 = alloca %union.anon
%3 = bitcast %union.anon* %2 to i8*
%4 = bitcast %union.anon* %2 to [2 x i32]*
%5 = bitcast %union.anon* %2 to i32*
%6 = call i32 @_scan_nan(i32* %5, i32 2, i8* %0)
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
%8 = load i32, i32* %7
%9 = or i32 %8, 2146959360
store i32 %9, i32* %7
%10 = getelementptr inbounds %union.anon, %union.anon* %2, i64 0, i32 0
%11 = load double, double* %10
ret double %11
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ puts(char const *);
void gl_err(const char *s) {
  puts(s);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<gl_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <puts@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<gl_err>:
push   %rax
call   1030 <puts@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define void @gl_err(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @puts(i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define void @gl_err(i8* nocapture %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
void __getsec_sexit(void) {
  __asm__ __volatile__(".byte 0x0f,0x37"
                       "\n"
                       :
                       : "a"(5));
}


x86 assembly (clang, -O0):
<__getsec_sexit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%eax
getsec
pop    %rbp
ret

x86 assembly (clang, -O2):
<__getsec_sexit>:
mov    $0x5,%eax
getsec
ret

LLVM IR (-O0):
define void @__getsec_sexit() {
ret void
}

LLVM IR (-O2):
define void @__getsec_sexit() {
tail call void asm sideeffect ".byte 0x0f,0x37\0A", "{ax},~{dirflag},~{fpsr},~{flags}"(i32 5)
ret void
}
int av_gettime_relative_is_monotonic(void) { return 0; }


x86 assembly (clang, -O0):
<av_gettime_relative_is_monotonic>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_gettime_relative_is_monotonic>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @av_gettime_relative_is_monotonic() {
ret i32 0
}

LLVM IR (-O2):
define i32 @av_gettime_relative_is_monotonic() {
ret i32 0
}
double sq(double x) { return (x * x); }


x86 assembly (clang, -O0):
<sq>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sq>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @sq(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @sq(double %0) {
%2 = fmul double %0, %0
ret double %2
}
void ff_hevc_put_hevc_uni_w_qpel_v16_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_uni_w_qpel_v16_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_uni_w_qpel_v16_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_uni_w_qpel_v16_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_uni_w_qpel_v16_8_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ isdigit(char);
int isAllDigits(char *s) {
  for (; *s != '\0'; s++) {
    if (!isdigit(*s))
      return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<isAllDigits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1163 <isAllDigits+0x53>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isdigit@plt>
cmp    $0x0,%eax
jne    114d <isAllDigits+0x3d>
movl   $0x0,-0x4(%rbp)
jmp    116a <isAllDigits+0x5a>
jmp    1152 <isAllDigits+0x42>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    111c <isAllDigits+0xc>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isAllDigits>:
push   %rbp
push   %rbx
push   %rax
mov    (%rdi),%al
mov    $0x1,%ebp
test   %al,%al
je     114b <isAllDigits+0x3b>
mov    %rdi,%rbx
add    $0x1,%rbx
cs nopw 0x0(%rax,%rax,1)
nop
movsbl %al,%edi
call   1030 <isdigit@plt>
test   %eax,%eax
je     1149 <isAllDigits+0x39>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <isAllDigits+0x20>
jmp    114b <isAllDigits+0x3b>
xor    %ebp,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @isAllDigits(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %19
9: ; preds = %4
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = call i32 @isdigit(i8 signext %11)
%13 = icmp ne i32 %12, 0
br i1 %13, label %15, label %14
14: ; preds = %9
store i32 0, i32* %2
br label %20
15: ; preds = %9
br label %16
16: ; preds = %15
%17 = load i8*, i8** %3
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %3
br label %4
19: ; preds = %4
store i32 1, i32* %2
br label %20
20: ; preds = %19, %14
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @isAllDigits(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %13, label %7
4: ; preds = %7
%5 = load i8, i8* %12
%6 = icmp eq i8 %5, 0
br i1 %6, label %13, label %7
7: ; preds = %1, %4
%8 = phi i8 [ %5, %4 ], [ %2, %1 ]
%9 = phi i8* [ %12, %4 ], [ %0, %1 ]
%10 = tail call i32 @isdigit(i8 signext %8)
%11 = icmp eq i32 %10, 0
%12 = getelementptr inbounds i8, i8* %9, i64 1
br i1 %11, label %13, label %4
13: ; preds = %7, %4, %1
%14 = phi i32 [ 1, %1 ], [ 1, %4 ], [ 0, %7 ]
ret i32 %14
}
int char_count(char *haystack, char needle) {
  int count = 0;
  for (char *str = haystack; *str != '\0'; str++) {
    if (*str == needle) {
      count++;
    }
  }
  return count;
}


x86 assembly (clang, -O0):
<char_count>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     115f <char_count+0x5f>
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1149 <char_count+0x49>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    114e <char_count+0x4e>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    111d <char_count+0x1d>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<char_count>:
mov    (%rdi),%cl
test   %cl,%cl
je     1126 <char_count+0x26>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
xor    %edx,%edx
cmp    %sil,%cl
sete   %dl
add    %edx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <char_count+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @char_count(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %3
store i8 %1, i8* %4
store i32 0, i32* %5
%7 = load i8*, i8** %3
store i8* %7, i8** %6
br label %8
8: ; preds = %24, %2
%9 = load i8*, i8** %6
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %27
13: ; preds = %8
%14 = load i8*, i8** %6
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = load i8, i8* %4
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %16, %18
br i1 %19, label %20, label %23
20: ; preds = %13
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
store i32 %22, i32* %5
br label %23
23: ; preds = %20, %13
br label %24
24: ; preds = %23
%25 = load i8*, i8** %6
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %6
br label %8
27: ; preds = %8
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @char_count(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %7, %2
%6 = phi i32 [ 0, %2 ], [ %13, %7 ]
ret i32 %6
7: ; preds = %2, %7
%8 = phi i8 [ %15, %7 ], [ %3, %2 ]
%9 = phi i8* [ %14, %7 ], [ %0, %2 ]
%10 = phi i32 [ %13, %7 ], [ 0, %2 ]
%11 = icmp eq i8 %8, %1
%12 = zext i1 %11 to i32
%13 = add nuw nsw i32 %10, %12
%14 = getelementptr inbounds i8, i8* %9, i64 1
%15 = load i8, i8* %14
%16 = icmp eq i8 %15, 0
br i1 %16, label %5, label %7
}