void DivideVectorByScaler(float v1x, float v1y, float v1z, float *rx, float *ry,
                          float *rz, float Scaler) {
  if (Scaler == 0) {
    *rx = 1.0;
    *ry = 0.0;
    *rz = 0.0;
  } else {
    *rx = v1x / Scaler;
    *ry = v1y / Scaler;
    *rz = v1z / Scaler;
  }
}


x86 assembly (clang, -O0):
<DivideVectorByScaler>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
mov    %rdi,-0x18(%rbp)
mov    %rsi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
movss  %xmm3,-0x2c(%rbp)
movss  -0x2c(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jne    1166 <DivideVectorByScaler+0x66>
jp     1166 <DivideVectorByScaler+0x66>
mov    -0x18(%rbp),%rax
movss  0xeb9(%rip),%xmm0
movss  %xmm0,(%rax)
mov    -0x20(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,(%rax)
mov    -0x28(%rbp),%rax
xorps  %xmm0,%xmm0
movss  %xmm0,(%rax)
jmp    119c <DivideVectorByScaler+0x9c>
movss  -0x4(%rbp),%xmm0
divss  -0x2c(%rbp),%xmm0
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x8(%rbp),%xmm0
divss  -0x2c(%rbp),%xmm0
mov    -0x20(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0xc(%rbp),%xmm0
divss  -0x2c(%rbp),%xmm0
mov    -0x28(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<DivideVectorByScaler>:
xorps  %xmm4,%xmm4
ucomiss %xmm4,%xmm3
jne    111b <DivideVectorByScaler+0x1b>
jp     111b <DivideVectorByScaler+0x1b>
movl   $0x3f800000,(%rdi)
movl   $0x0,(%rsi)
movss  %xmm4,(%rdx)
ret
divss  %xmm3,%xmm0
movss  %xmm0,(%rdi)
divss  %xmm3,%xmm1
movss  %xmm1,(%rsi)
divss  %xmm3,%xmm2
movss  %xmm2,(%rdx)
ret

LLVM IR (-O0):
define void @DivideVectorByScaler(float %0, float %1, float %2, float* %3, float* %4, float* %5, float %6) {
%8 = alloca float
%9 = alloca float
%10 = alloca float
%11 = alloca float*
%12 = alloca float*
%13 = alloca float*
%14 = alloca float
store float %0, float* %8
store float %1, float* %9
store float %2, float* %10
store float* %3, float** %11
store float* %4, float** %12
store float* %5, float** %13
store float %6, float* %14
%15 = load float, float* %14
%16 = fcmp oeq float %15, 0.000000e+00
br i1 %16, label %17, label %21
17: ; preds = %7
%18 = load float*, float** %11
store float 1.000000e+00, float* %18
%19 = load float*, float** %12
store float 0.000000e+00, float* %19
%20 = load float*, float** %13
store float 0.000000e+00, float* %20
br label %34
21: ; preds = %7
%22 = load float, float* %8
%23 = load float, float* %14
%24 = fdiv float %22, %23
%25 = load float*, float** %11
store float %24, float* %25
%26 = load float, float* %9
%27 = load float, float* %14
%28 = fdiv float %26, %27
%29 = load float*, float** %12
store float %28, float* %29
%30 = load float, float* %10
%31 = load float, float* %14
%32 = fdiv float %30, %31
%33 = load float*, float** %13
store float %32, float* %33
br label %34
34: ; preds = %21, %17
ret void
}

LLVM IR (-O2):
define void @DivideVectorByScaler(float %0, float %1, float %2, float* nocapture writeonly %3, float* nocapture writeonly %4, float* nocapture writeonly %5, float %6) {
%8 = fcmp oeq float %6, 0.000000e+00
br i1 %8, label %9, label %10
9: ; preds = %7
store float 1.000000e+00, float* %3
store float 0.000000e+00, float* %4
br label %14
10: ; preds = %7
%11 = fdiv float %0, %6
store float %11, float* %3
%12 = fdiv float %1, %6
store float %12, float* %4
%13 = fdiv float %2, %6
br label %14
14: ; preds = %10, %9
%15 = phi float [ %13, %10 ], [ 0.000000e+00, %9 ]
store float %15, float* %5
ret void
}