int ran(seed)
int seed;
{
  long num1 = 7141;
  long inc1 = 54773;
  long mod1 = 259200;
  static long seed1;
  if (seed > 0) {
    seed1 = mod(seed + inc1, mod1);
    return (0);
  } else {
    seed1 = mod(num1 * seed1 + inc1, mod1);
    return (mod(seed1, 256));
  }
}


x86 assembly (clang, -O0):
<ran>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
movq   $0x1be5,-0x10(%rbp)
movq   $0xd5f5,-0x18(%rbp)
movq   $0x3f480,-0x20(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    1165 <ran+0x55>
movslq -0x8(%rbp),%rdi
add    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    $0x0,%al
call   1030 <mod@plt>
cltq
mov    %rax,0x2ed7(%rip)
movl   $0x0,-0x4(%rbp)
jmp    119f <ran+0x8f>
mov    -0x10(%rbp),%rdi
imul   0x2ebf(%rip),%rdi
add    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    $0x0,%al
call   1030 <mod@plt>
cltq
mov    %rax,0x2ea7(%rip)
mov    0x2ea0(%rip),%rdi
mov    $0x100,%esi
mov    $0x0,%al
call   1030 <mod@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ran>:
push   %rax
test   %edi,%edi
jle    1137 <ran+0x27>
mov    %edi,%edi
add    $0xd5f5,%rdi
mov    $0x3f480,%esi
xor    %eax,%eax
call   1030 <mod@plt>
cltq
mov    %rax,0x2efd(%rip)
xor    %eax,%eax
pop    %rcx
ret
imul   $0x1be5,0x2eee(%rip),%rdi
add    $0xd5f5,%rdi
mov    $0x3f480,%esi
xor    %eax,%eax
call   1030 <mod@plt>
movslq %eax,%rdi
mov    %rdi,0x2ed1(%rip)
mov    $0x100,%esi
xor    %eax,%eax
pop    %rcx
jmp    1030 <mod@plt>

LLVM IR (-O0):
@ran.seed1 = internal global i64 0
define i32 @ran(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %3
store i64 7141, i64* %4
store i64 54773, i64* %5
store i64 259200, i64* %6
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %1
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = load i64, i64* %5
%13 = add nsw i64 %11, %12
%14 = load i64, i64* %6
%15 = call i32 (i64, i64, ...) bitcast (i32 (...)* @mod to i32 (i64, i64, ...)*)(i64 %13, i64 %14)
%16 = sext i32 %15 to i64
store i64 %16, i64* @ran.seed1
store i32 0, i32* %2
br label %28
17: ; preds = %1
%18 = load i64, i64* %4
%19 = load i64, i64* @ran.seed1
%20 = mul nsw i64 %18, %19
%21 = load i64, i64* %5
%22 = add nsw i64 %20, %21
%23 = load i64, i64* %6
%24 = call i32 (i64, i64, ...) bitcast (i32 (...)* @mod to i32 (i64, i64, ...)*)(i64 %22, i64 %23)
%25 = sext i32 %24 to i64
store i64 %25, i64* @ran.seed1
%26 = load i64, i64* @ran.seed1
%27 = call i32 (i64, i32, ...) bitcast (i32 (...)* @mod to i32 (i64, i32, ...)*)(i64 %26, i32 256)
store i32 %27, i32* %2
br label %28
28: ; preds = %17, %9
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
@ran.seed1 = internal unnamed_addr global i64 0
define i32 @ran(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1
%4 = zext i32 %0 to i64
%5 = add nuw nsw i64 %4, 54773
%6 = tail call i32 (i64, i64, ...) bitcast (i32 (...)* @mod to i32 (i64, i64, ...)*)(i64 %5, i64 259200)
%7 = sext i32 %6 to i64
store i64 %7, i64* @ran.seed1
br label %15
8: ; preds = %1
%9 = load i64, i64* @ran.seed1
%10 = mul nsw i64 %9, 7141
%11 = add nsw i64 %10, 54773
%12 = tail call i32 (i64, i64, ...) bitcast (i32 (...)* @mod to i32 (i64, i64, ...)*)(i64 %11, i64 259200)
%13 = sext i32 %12 to i64
store i64 %13, i64* @ran.seed1
%14 = tail call i32 (i64, i32, ...) bitcast (i32 (...)* @mod to i32 (i64, i32, ...)*)(i64 %13, i32 256)
br label %15
15: ; preds = %8, %3
%16 = phi i32 [ 0, %3 ], [ %14, %8 ]
ret i32 %16
}