long double bellard(long int ln, long double lm4, long double lm10,
                    long double lp2) {
  long double termo = 0;
  termo += (long double)-32 / (lm4 + 1);
  termo += (long double)-1 / (lm4 + 3);
  termo += (long double)256 / (lm10 + 1);
  termo += (long double)-64 / (lm10 + 3);
  termo += (long double)-4 / (lm10 + 5);
  termo += (long double)-4 / (lm10 + 7);
  termo += (long double)1 / (lm10 + 9);
  termo /= lp2;
  return (ln % 2) ? -termo : termo;
}


x86 assembly (clang, -O0):
<bellard>:
push   %rbp
mov    %rsp,%rbp
fldt   0x30(%rbp)
fldt   0x20(%rbp)
fldt   0x10(%rbp)
mov    %rdi,-0x8(%rbp)
fstpt  -0x20(%rbp)
fstpt  -0x30(%rbp)
fstpt  -0x40(%rbp)
fldz
fstpt  -0x50(%rbp)
fldt   -0x20(%rbp)
fld1
fadd   %st,%st(1)
flds   0xed4(%rip)
fdivp  %st,%st(2)
fldt   -0x50(%rbp)
faddp  %st,%st(2)
fxch   %st(1)
fstpt  -0x50(%rbp)
fldt   -0x20(%rbp)
flds   0xec3(%rip)
fadd   %st,%st(1)
fld    %st(2)
fchs
fdivp  %st,%st(2)
fldt   -0x50(%rbp)
faddp  %st,%st(2)
fxch   %st(1)
fstpt  -0x50(%rbp)
fldt   -0x30(%rbp)
fadd   %st(2),%st
flds   0xeaa(%rip)
fdivp  %st,%st(1)
fldt   -0x50(%rbp)
faddp  %st,%st(1)
fstpt  -0x50(%rbp)
fldt   -0x30(%rbp)
faddp  %st,%st(1)
flds   0xe99(%rip)
fdivp  %st,%st(1)
fldt   -0x50(%rbp)
faddp  %st,%st(1)
fstpt  -0x50(%rbp)
fldt   -0x30(%rbp)
flds   0xe8a(%rip)
faddp  %st,%st(1)
flds   0xe86(%rip)
fdiv   %st,%st(1)
fldt   -0x50(%rbp)
faddp  %st,%st(2)
fxch   %st(1)
fstpt  -0x50(%rbp)
fldt   -0x30(%rbp)
flds   0xe75(%rip)
faddp  %st,%st(1)
fdivrp %st,%st(1)
fldt   -0x50(%rbp)
faddp  %st,%st(1)
fstpt  -0x50(%rbp)
fldt   -0x30(%rbp)
flds   0xe64(%rip)
faddp  %st,%st(1)
fdivrp %st,%st(1)
fldt   -0x50(%rbp)
faddp  %st,%st(1)
fstpt  -0x50(%rbp)
fldt   -0x40(%rbp)
fldt   -0x50(%rbp)
fdivp  %st,%st(1)
fstpt  -0x50(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x2,%ecx
cqto
idiv   %rcx
cmp    $0x0,%rdx
je     11f4 <bellard+0xf4>
fldt   -0x50(%rbp)
fchs
fstpt  -0x5c(%rbp)
jmp    11fa <bellard+0xfa>
fldt   -0x50(%rbp)
fstpt  -0x5c(%rbp)
fldt   -0x5c(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bellard>:
fldt   0x28(%rsp)
fldt   0x18(%rsp)
fldt   0x8(%rsp)
fld1
fld    %st(1)
fadd   %st(1),%st
fdivrs 0xee8(%rip)
fldz
faddp  %st,%st(1)
flds   0xee2(%rip)
fadd   %st,%st(3)
fxch   %st(3)
fdivr  %st(2),%st
fsubrp %st,%st(1)
fld    %st(3)
fadd   %st(2),%st
fdivrs 0xed4(%rip)
faddp  %st,%st(1)
fxch   %st(2)
fadd   %st(3),%st
fdivrs 0xecc(%rip)
faddp  %st,%st(2)
fld    %st(2)
fadds  0xec6(%rip)
flds   0xec4(%rip)
fdiv   %st,%st(1)
fxch   %st(3)
fsubp  %st,%st(1)
fld    %st(3)
fadds  0xeba(%rip)
fdivrp %st,%st(3)
fsubp  %st,%st(2)
fxch   %st(2)
fadds  0xeb2(%rip)
fdivrp %st,%st(2)
faddp  %st,%st(1)
fdivp  %st,%st(1)
test   $0x1,%dil
fld    %st(0)
fchs
fcmove %st(1),%st
fstp   %st(1)
ret

LLVM IR (-O0):
define x86_fp80 @bellard(i64 %0, x86_fp80 %1, x86_fp80 %2, x86_fp80 %3) {
%5 = alloca i64
%6 = alloca x86_fp80
%7 = alloca x86_fp80
%8 = alloca x86_fp80
%9 = alloca x86_fp80
store i64 %0, i64* %5
store x86_fp80 %1, x86_fp80* %6
store x86_fp80 %2, x86_fp80* %7
store x86_fp80 %3, x86_fp80* %8
store x86_fp80 0xK00000000000000000000, x86_fp80* %9
%10 = load x86_fp80, x86_fp80* %6
%11 = fadd x86_fp80 %10, 0xK3FFF8000000000000000
%12 = fdiv x86_fp80 0xKC0048000000000000000, %11
%13 = load x86_fp80, x86_fp80* %9
%14 = fadd x86_fp80 %13, %12
store x86_fp80 %14, x86_fp80* %9
%15 = load x86_fp80, x86_fp80* %6
%16 = fadd x86_fp80 %15, 0xK4000C000000000000000
%17 = fdiv x86_fp80 0xKBFFF8000000000000000, %16
%18 = load x86_fp80, x86_fp80* %9
%19 = fadd x86_fp80 %18, %17
store x86_fp80 %19, x86_fp80* %9
%20 = load x86_fp80, x86_fp80* %7
%21 = fadd x86_fp80 %20, 0xK3FFF8000000000000000
%22 = fdiv x86_fp80 0xK40078000000000000000, %21
%23 = load x86_fp80, x86_fp80* %9
%24 = fadd x86_fp80 %23, %22
store x86_fp80 %24, x86_fp80* %9
%25 = load x86_fp80, x86_fp80* %7
%26 = fadd x86_fp80 %25, 0xK4000C000000000000000
%27 = fdiv x86_fp80 0xKC0058000000000000000, %26
%28 = load x86_fp80, x86_fp80* %9
%29 = fadd x86_fp80 %28, %27
store x86_fp80 %29, x86_fp80* %9
%30 = load x86_fp80, x86_fp80* %7
%31 = fadd x86_fp80 %30, 0xK4001A000000000000000
%32 = fdiv x86_fp80 0xKC0018000000000000000, %31
%33 = load x86_fp80, x86_fp80* %9
%34 = fadd x86_fp80 %33, %32
store x86_fp80 %34, x86_fp80* %9
%35 = load x86_fp80, x86_fp80* %7
%36 = fadd x86_fp80 %35, 0xK4001E000000000000000
%37 = fdiv x86_fp80 0xKC0018000000000000000, %36
%38 = load x86_fp80, x86_fp80* %9
%39 = fadd x86_fp80 %38, %37
store x86_fp80 %39, x86_fp80* %9
%40 = load x86_fp80, x86_fp80* %7
%41 = fadd x86_fp80 %40, 0xK40029000000000000000
%42 = fdiv x86_fp80 0xK3FFF8000000000000000, %41
%43 = load x86_fp80, x86_fp80* %9
%44 = fadd x86_fp80 %43, %42
store x86_fp80 %44, x86_fp80* %9
%45 = load x86_fp80, x86_fp80* %8
%46 = load x86_fp80, x86_fp80* %9
%47 = fdiv x86_fp80 %46, %45
store x86_fp80 %47, x86_fp80* %9
%48 = load i64, i64* %5
%49 = srem i64 %48, 2
%50 = icmp ne i64 %49, 0
br i1 %50, label %51, label %54
51: ; preds = %4
%52 = load x86_fp80, x86_fp80* %9
%53 = fneg x86_fp80 %52
br label %56
54: ; preds = %4
%55 = load x86_fp80, x86_fp80* %9
br label %56
56: ; preds = %54, %51
%57 = phi x86_fp80 [ %53, %51 ], [ %55, %54 ]
ret x86_fp80 %57
}

LLVM IR (-O2):
define x86_fp80 @bellard(i64 %0, x86_fp80 %1, x86_fp80 %2, x86_fp80 %3) {
%5 = fadd x86_fp80 %1, 0xK3FFF8000000000000000
%6 = fdiv x86_fp80 0xK40048000000000000000, %5
%7 = fsub x86_fp80 0xK00000000000000000000, %6
%8 = fadd x86_fp80 %1, 0xK4000C000000000000000
%9 = fdiv x86_fp80 0xK3FFF8000000000000000, %8
%10 = fsub x86_fp80 %7, %9
%11 = fadd x86_fp80 %2, 0xK3FFF8000000000000000
%12 = fdiv x86_fp80 0xK40078000000000000000, %11
%13 = fadd x86_fp80 %12, %10
%14 = fadd x86_fp80 %2, 0xK4000C000000000000000
%15 = fdiv x86_fp80 0xK40058000000000000000, %14
%16 = fsub x86_fp80 %13, %15
%17 = fadd x86_fp80 %2, 0xK4001A000000000000000
%18 = fdiv x86_fp80 0xK40018000000000000000, %17
%19 = fsub x86_fp80 %16, %18
%20 = fadd x86_fp80 %2, 0xK4001E000000000000000
%21 = fdiv x86_fp80 0xK40018000000000000000, %20
%22 = fsub x86_fp80 %19, %21
%23 = fadd x86_fp80 %2, 0xK40029000000000000000
%24 = fdiv x86_fp80 0xK3FFF8000000000000000, %23
%25 = fadd x86_fp80 %24, %22
%26 = fdiv x86_fp80 %25, %3
%27 = and i64 %0, 1
%28 = icmp eq i64 %27, 0
%29 = fneg x86_fp80 %26
%30 = select i1 %28, x86_fp80 %26, x86_fp80 %29
ret x86_fp80 %30
}