int main(void) {
  volatile __int128 i =
      (__int128)(((unsigned __int128)1 << ((16 * 8) - 1)) - 1);
  volatile __int128 j = 1;
  volatile __int128 k = i + j;
  k = j + i;
  i++;
  j = (__int128)(((unsigned __int128)1 << ((16 * 8) - 1)) - 1) - 100;
  j += (1 << 10);
  j = (-(__int128)(((unsigned __int128)1 << ((16 * 8) - 1)) - 1) - 1);
  i = -1;
  k = i + j;
  k = j + i;
  j--;
  j = (-(__int128)(((unsigned __int128)1 << ((16 * 8) - 1)) - 1) - 1) + 100;
  j += -(1 << 10);
  i = (__int128)(((unsigned __int128)1 << ((16 * 8) - 1)) - 1);
  j = 2;
  k = i * j;
  i = (-(__int128)(((unsigned __int128)1 << ((16 * 8) - 1)) - 1) - 1);
  i = -i;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movabs $0x7fffffffffffffff,%rax
ff ff 7f
mov    %rax,-0x18(%rbp)
movq   $0xffffffffffffffff,-0x20(%rbp)
ff
movq   $0x0,-0x28(%rbp)
movq   $0x1,-0x30(%rbp)
mov    -0x20(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x30(%rbp),%rdi
mov    -0x28(%rbp),%rsi
add    %rdi,%rdx
adc    %rsi,%rcx
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x38(%rbp)
mov    -0x30(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
add    %rdi,%rdx
adc    %rsi,%rcx
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x38(%rbp)
mov    -0x20(%rbp),%rcx
add    $0x1,%rcx
adcq   $0x0,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %rax,-0x28(%rbp)
movq   $0xffffffffffffff9b,-0x30(%rbp)
ff
mov    -0x30(%rbp),%rcx
add    $0x400,%rcx
adcq   $0x0,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
movabs $0x8000000000000000,%rcx
mov    %rcx,-0x50(%rbp)
mov    %rcx,-0x28(%rbp)
movq   $0x0,-0x30(%rbp)
movq   $0xffffffffffffffff,-0x18(%rbp)
ff
movq   $0xffffffffffffffff,-0x20(%rbp)
ff
mov    -0x20(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x30(%rbp),%r8
mov    -0x28(%rbp),%rdi
add    %r8,%rsi
adc    %rdi,%rdx
mov    %rsi,-0x40(%rbp)
mov    %rdx,-0x38(%rbp)
mov    -0x30(%rbp),%rsi
mov    -0x28(%rbp),%rdx
mov    -0x20(%rbp),%r8
mov    -0x18(%rbp),%rdi
add    %r8,%rsi
adc    %rdi,%rdx
mov    %rsi,-0x40(%rbp)
mov    %rdx,-0x38(%rbp)
mov    -0x30(%rbp),%rdx
add    $0xffffffffffffffff,%rdx
adcq   $0xffffffffffffffff,-0x28(%rbp)
mov    %rdx,-0x30(%rbp)
mov    %rcx,-0x28(%rbp)
movq   $0x64,-0x30(%rbp)
mov    -0x30(%rbp),%rcx
add    $0xfffffffffffffc00,%rcx
adcq   $0xffffffffffffffff,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    %rax,-0x18(%rbp)
movq   $0xffffffffffffffff,-0x20(%rbp)
ff
movq   $0x0,-0x28(%rbp)
movq   $0x2,-0x30(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rsi
mov    -0x30(%rbp),%rdi
mov    -0x28(%rbp),%rcx
mov    %rax,%r8
imul   %rcx,%r8
mul    %rdi
mov    %rax,%rcx
mov    -0x50(%rbp),%rax
mov    %rcx,-0x48(%rbp)
mov    %rdx,%rcx
mov    -0x48(%rbp),%rdx
add    %r8,%rcx
imul   %rdi,%rsi
add    %rsi,%rcx
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x38(%rbp)
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x18(%rbp),%rcx
xor    %eax,%eax
negq   -0x20(%rbp)
sbb    %rcx,%rax
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movabs $0x7fffffffffffffff,%rax
ff ff 7f
mov    %rax,-0x20(%rsp)
movq   $0xffffffffffffffff,-0x28(%rsp)
ff ff
movq   $0x0,-0x30(%rsp)
movq   $0x1,-0x38(%rsp)
mov    -0x28(%rsp),%rcx
mov    -0x20(%rsp),%rdx
add    -0x38(%rsp),%rcx
adc    -0x30(%rsp),%rdx
mov    %rdx,-0x10(%rsp)
mov    %rcx,-0x18(%rsp)
mov    -0x38(%rsp),%rcx
mov    -0x30(%rsp),%rdx
add    -0x28(%rsp),%rcx
adc    -0x20(%rsp),%rdx
mov    %rdx,-0x10(%rsp)
mov    %rcx,-0x18(%rsp)
mov    -0x28(%rsp),%rcx
add    $0x1,%rcx
adcq   $0x0,-0x20(%rsp)
mov    %rcx,-0x28(%rsp)
mov    %rax,-0x30(%rsp)
movq   $0xffffffffffffff9b,-0x38(%rsp)
ff ff
mov    $0x400,%ecx
add    -0x38(%rsp),%rcx
adcq   $0x0,-0x30(%rsp)
mov    %rcx,-0x38(%rsp)
movabs $0x8000000000000000,%rcx
mov    %rcx,-0x30(%rsp)
movq   $0x0,-0x38(%rsp)
movq   $0xffffffffffffffff,-0x20(%rsp)
ff ff
movq   $0xffffffffffffffff,-0x28(%rsp)
ff ff
mov    -0x28(%rsp),%rdx
mov    -0x20(%rsp),%rsi
add    -0x38(%rsp),%rdx
adc    -0x30(%rsp),%rsi
mov    %rsi,-0x10(%rsp)
mov    %rdx,-0x18(%rsp)
mov    -0x38(%rsp),%rdx
mov    -0x30(%rsp),%rsi
add    -0x28(%rsp),%rdx
adc    -0x20(%rsp),%rsi
mov    %rsi,-0x10(%rsp)
mov    %rdx,-0x18(%rsp)
mov    -0x38(%rsp),%rdx
add    $0xffffffffffffffff,%rdx
adcq   $0xffffffffffffffff,-0x30(%rsp)
mov    %rdx,-0x38(%rsp)
mov    %rcx,-0x30(%rsp)
movq   $0x64,-0x38(%rsp)
mov    $0xfffffffffffffc00,%rdx
add    -0x38(%rsp),%rdx
adcq   $0xffffffffffffffff,-0x30(%rsp)
mov    %rdx,-0x38(%rsp)
mov    %rax,-0x20(%rsp)
movq   $0xffffffffffffffff,-0x28(%rsp)
ff ff
movq   $0x0,-0x30(%rsp)
movq   $0x2,-0x38(%rsp)
mov    -0x28(%rsp),%rsi
mov    -0x20(%rsp),%rdi
mov    -0x38(%rsp),%rax
imul   %rax,%rdi
mul    %rsi
add    %rdi,%rdx
imul   -0x30(%rsp),%rsi
add    %rdx,%rsi
mov    %rax,-0x18(%rsp)
mov    %rsi,-0x10(%rsp)
mov    %rcx,-0x20(%rsp)
movq   $0x0,-0x28(%rsp)
mov    -0x20(%rsp),%rax
xor    %ecx,%ecx
negq   -0x28(%rsp)
sbb    %rax,%rcx
mov    %rcx,-0x20(%rsp)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i128
%3 = alloca i128
%4 = alloca i128
store i32 0, i32* %1
store volatile i128 170141183460469231731687303715884105727, i128* %2
store volatile i128 1, i128* %3
%5 = load volatile i128, i128* %2
%6 = load volatile i128, i128* %3
%7 = add nsw i128 %5, %6
store volatile i128 %7, i128* %4
%8 = load volatile i128, i128* %3
%9 = load volatile i128, i128* %2
%10 = add nsw i128 %8, %9
store volatile i128 %10, i128* %4
%11 = load volatile i128, i128* %2
%12 = add nsw i128 %11, 1
store volatile i128 %12, i128* %2
store volatile i128 170141183460469231731687303715884105627, i128* %3
%13 = load volatile i128, i128* %3
%14 = add nsw i128 %13, 1024
store volatile i128 %14, i128* %3
store volatile i128 -170141183460469231731687303715884105728, i128* %3
store volatile i128 -1, i128* %2
%15 = load volatile i128, i128* %2
%16 = load volatile i128, i128* %3
%17 = add nsw i128 %15, %16
store volatile i128 %17, i128* %4
%18 = load volatile i128, i128* %3
%19 = load volatile i128, i128* %2
%20 = add nsw i128 %18, %19
store volatile i128 %20, i128* %4
%21 = load volatile i128, i128* %3
%22 = add nsw i128 %21, -1
store volatile i128 %22, i128* %3
store volatile i128 -170141183460469231731687303715884105628, i128* %3
%23 = load volatile i128, i128* %3
%24 = add nsw i128 %23, -1024
store volatile i128 %24, i128* %3
store volatile i128 170141183460469231731687303715884105727, i128* %2
store volatile i128 2, i128* %3
%25 = load volatile i128, i128* %2
%26 = load volatile i128, i128* %3
%27 = mul nsw i128 %25, %26
store volatile i128 %27, i128* %4
store volatile i128 -170141183460469231731687303715884105728, i128* %2
%28 = load volatile i128, i128* %2
%29 = sub nsw i128 0, %28
store volatile i128 %29, i128* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca i128
%2 = alloca i128
%3 = alloca i128
%4 = bitcast i128* %1 to i8*
store volatile i128 170141183460469231731687303715884105727, i128* %1
%5 = bitcast i128* %2 to i8*
store volatile i128 1, i128* %2
%6 = bitcast i128* %3 to i8*
%7 = load volatile i128, i128* %1
%8 = load volatile i128, i128* %2
%9 = add nsw i128 %8, %7
store volatile i128 %9, i128* %3
%10 = load volatile i128, i128* %2
%11 = load volatile i128, i128* %1
%12 = add nsw i128 %11, %10
store volatile i128 %12, i128* %3
%13 = load volatile i128, i128* %1
%14 = add nsw i128 %13, 1
store volatile i128 %14, i128* %1
store volatile i128 170141183460469231731687303715884105627, i128* %2
%15 = load volatile i128, i128* %2
%16 = add nsw i128 %15, 1024
store volatile i128 %16, i128* %2
store volatile i128 -170141183460469231731687303715884105728, i128* %2
store volatile i128 -1, i128* %1
%17 = load volatile i128, i128* %1
%18 = load volatile i128, i128* %2
%19 = add nsw i128 %18, %17
store volatile i128 %19, i128* %3
%20 = load volatile i128, i128* %2
%21 = load volatile i128, i128* %1
%22 = add nsw i128 %21, %20
store volatile i128 %22, i128* %3
%23 = load volatile i128, i128* %2
%24 = add nsw i128 %23, -1
store volatile i128 %24, i128* %2
store volatile i128 -170141183460469231731687303715884105628, i128* %2
%25 = load volatile i128, i128* %2
%26 = add nsw i128 %25, -1024
store volatile i128 %26, i128* %2
store volatile i128 170141183460469231731687303715884105727, i128* %1
store volatile i128 2, i128* %2
%27 = load volatile i128, i128* %1
%28 = load volatile i128, i128* %2
%29 = mul nsw i128 %28, %27
store volatile i128 %29, i128* %3
store volatile i128 -170141183460469231731687303715884105728, i128* %1
%30 = load volatile i128, i128* %1
%31 = sub nsw i128 0, %30
store volatile i128 %31, i128* %1
ret i32 0
}