xunge/DecIR huggingface dataset:
__attribute__((always_)) const int xisintf(float x) { return (x == (int)x); }


x86 assembly (clang, -O0):
<xisintf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvttss2si -0x4(%rbp),%eax
cvtsi2ss %eax,%xmm1
ucomiss %xmm1,%xmm0
sete   %al
setnp  %cl
and    %cl,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xisintf>:
cvttps2dq %xmm0,%xmm1
cvtdq2ps %xmm1,%xmm1
cmpeqss %xmm0,%xmm1
movd   %xmm1,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @xisintf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fptosi float %4 to i32
%6 = sitofp i32 %5 to float
%7 = fcmp oeq float %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @xisintf(float %0) {
%2 = fptosi float %0 to i32
%3 = sitofp i32 %2 to float
%4 = fcmp oeq float %3, %0
%5 = zext i1 %4 to i32
ret i32 %5
}
void bug2(void) {
  char *p;
  strcpy(p, "Hello world\n");
  printf("%s:%s\n", __FUNCTION__, p);
}


x86 assembly (clang, -O0):
<bug2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
lea    0xecd(%rip),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rdx
lea    0xeca(%rip),%rdi
lea    0xeca(%rip),%rsi
mov    $0x0,%al
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bug2>:
movabs $0xa646c726f7720,%rax
mov    %rax,(%rax)
movabs $0x6f77206f6c6c6548,%rax
20 77 6f
mov    %rax,(%rax)
lea    0xedc(%rip),%rdi
lea    0xedc(%rip),%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Hello world\0A\00"
@.str.1 = [7 x i8] c"%s:%s\0A\00"
@__FUNCTION__.bug2 = [5 x i8] c"bug2\00"
define void @bug2() {
%1 = alloca i8*
%2 = load i8*, i8** %1
%3 = call i8* @strcpy(i8* %2, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %1
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @__FUNCTION__.bug2, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello world\0A\00"
@.str.1 = [7 x i8] c"%s:%s\0A\00"
@__FUNCTION__.bug2 = [5 x i8] c"bug2\00"
define void @bug2() {
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(13) undef, i8* align 1 dereferenceable(13) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i64 13, i1 false)
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @__FUNCTION__.bug2, i64 0, i64 0), i8* undef)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ value;
typedef int uint8_t;
struct nrf24l01 {
  int dummy;
};

/* Variables and functions */
int rf_command(struct nrf24l01 *, int, int *, int, int /*<<< orphan*/);
int rf_reg_write(struct nrf24l01 *dev, uint8_t addr, uint8_t value) {
  return rf_command(dev, 0b00100000 | addr, &value, sizeof(value), 0);
}


x86 assembly (clang, -O0):
<rf_reg_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
or     $0x20,%esi
lea    -0x10(%rbp),%rdx
mov    $0x4,%ecx
xor    %r8d,%r8d
call   1030 <rf_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rf_reg_write>:
push   %rax
mov    %edx,0x4(%rsp)
or     $0x20,%esi
lea    0x4(%rsp),%rdx
mov    $0x4,%ecx
xor    %r8d,%r8d
call   1030 <rf_command@plt>
pop    %rcx
ret

LLVM IR (-O0):
%struct.nrf24l01 = type { i32 }
define i32 @rf_reg_write(%struct.nrf24l01* %0, i32 %1, i32 %2) {
%4 = alloca %struct.nrf24l01*
%5 = alloca i32
%6 = alloca i32
store %struct.nrf24l01* %0, %struct.nrf24l01** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.nrf24l01*, %struct.nrf24l01** %4
%8 = load i32, i32* %5
%9 = or i32 32, %8
%10 = call i32 @rf_command(%struct.nrf24l01* %7, i32 %9, i32* %6, i32 4, i32 0)
ret i32 %10
}

LLVM IR (-O2):
%struct.nrf24l01 = type { i32 }
define i32 @rf_reg_write(%struct.nrf24l01* %0, i32 %1, i32 %2) {
%4 = alloca i32
store i32 %2, i32* %4
%5 = or i32 %1, 32
%6 = call i32 @rf_command(%struct.nrf24l01* %0, i32 %5, i32* %4, i32 4, i32 0)
ret i32 %6
}
char *skip_whitespaces(char *str) {
  char *p;
  for (p = str; *p == ' ' || *p == '\t' || *p == '\r' || *p == '\n'; ++p)
    ;
  return p;
}


x86 assembly (clang, -O0):
<skip_whitespaces>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x11(%rbp)
je     115f <skip_whitespaces+0x5f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x11(%rbp)
je     115f <skip_whitespaces+0x5f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0xd,%ecx
mov    %al,-0x11(%rbp)
je     115f <skip_whitespaces+0x5f>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    116f <skip_whitespaces+0x6f>
jmp    1185 <skip_whitespaces+0x85>
jmp    1174 <skip_whitespaces+0x74>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <skip_whitespaces+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_whitespaces>:
mov    %rdi,%rax
movabs $0x100002600,%rcx
nopl   (%rax)
movzbl (%rax),%edx
cmp    $0x20,%rdx
ja     1125 <skip_whitespaces+0x25>
bt     %rdx,%rcx
jae    1125 <skip_whitespaces+0x25>
add    $0x1,%rax
jmp    1110 <skip_whitespaces+0x10>
ret

LLVM IR (-O0):
define i8* @skip_whitespaces(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %28, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 32
br i1 %9, label %25, label %10
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 9
br i1 %14, label %25, label %15
15: ; preds = %10
%16 = load i8*, i8** %3
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 13
br i1 %19, label %25, label %20
20: ; preds = %15
%21 = load i8*, i8** %3
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %23, 10
br label %25
25: ; preds = %20, %15, %10, %5
%26 = phi i1 [ true, %15 ], [ true, %10 ], [ true, %5 ], [ %24, %20 ]
br i1 %26, label %27, label %31
27: ; preds = %25
br label %28
28: ; preds = %27
%29 = load i8*, i8** %3
%30 = getelementptr inbounds i8, i8* %29, i32 1
store i8* %30, i8** %3
br label %5
31: ; preds = %25
%32 = load i8*, i8** %3
ret i8* %32
}

LLVM IR (-O2):
define i8* @skip_whitespaces(i8* %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %7 [
i8 32, label %5
i8 9, label %5
i8 13, label %5
i8 10, label %5
]
5: ; preds = %2, %2, %2, %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2
ret i8* %3
}
/* Type definitions */
typedef scalar_t__ time_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, long, long);
scalar_t__ time(scalar_t__ *);
int main(int argc, char *argv[]) {
  time_t ctr;
  time_t cta;
  ctr = time(&cta);
  printf("current time is:\n\tctr = %ld\n\tcta = %ld\n", (long)ctr, (long)cta);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x20(%rbp),%rdi
call   1040 <time@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
lea    0xeae(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    %rsp,%rdi
call   1040 <time@plt>
mov    (%rsp),%rdx
lea    0xecc(%rip),%rdi
mov    %rax,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [40 x i8] c"current time is:\0A\09ctr = %ld\0A\09cta = %ld\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i64
%7 = alloca i64
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i64 @time(i64* %7)
store i64 %8, i64* %6
%9 = load i64, i64* %6
%10 = load i64, i64* %7
%11 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i64 %9, i64 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [40 x i8] c"current time is:\0A\09ctr = %ld\0A\09cta = %ld\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = call i64 @time(i64* %3)
%6 = load i64, i64* %3
%7 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i64 %5, i64 %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void *realloc(void *, size_t);
void *cgdb_realloc(void *ptr, size_t size) {
  void *t = realloc(ptr, size);
  if (t)
    return t;
  exit(-1);
}


x86 assembly (clang, -O0):
<cgdb_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1156 <cgdb_realloc+0x36>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<cgdb_realloc>:
push   %rax
call   1030 <realloc@plt>
test   %rax,%rax
je     112d <cgdb_realloc+0xd>
pop    %rcx
ret
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i8* @cgdb_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i8*, i8** %5
ret i8* %12
13: ; preds = %2
%14 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
define noalias i8* @cgdb_realloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %6, label %5
5: ; preds = %2
ret i8* %3
6: ; preds = %2
%7 = tail call i32 @exit(i32 -1)
unreachable
}
void log_debug(const char *type, int code, const char *msg) {
  (void)type;
  (void)code;
  (void)msg;
}


x86 assembly (clang, -O0):
<log_debug>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_debug>:
ret

LLVM IR (-O0):
define void @log_debug(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
ret void
}

LLVM IR (-O2):
define void @log_debug(i8* nocapture %0, i32 %1, i8* nocapture %2) {
ret void
}
/* Variables and functions */
void *awlval_copy(void const *);
void *awlval_copy_proxy(const void *v) { return awlval_copy(v); }


x86 assembly (clang, -O0):
<awlval_copy_proxy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <awlval_copy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<awlval_copy_proxy>:
jmp    1030 <awlval_copy@plt>

LLVM IR (-O0):
define i8* @awlval_copy_proxy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @awlval_copy(i8* %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @awlval_copy_proxy(i8* %0) {
%2 = tail call i8* @awlval_copy(i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void error(char *msg) {
  fputs(msg, stderr);
  fputc('\n', stderr);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
mov    0x2e70(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %rbx
mov    0x2ea8(%rip),%rbx
mov    (%rbx),%esi
call   1030 <fputs@plt>
mov    (%rbx),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
mov    0x2e86(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@EXIT_FAILURE = global i32 0
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @stderr
%5 = call i32 @fputs(i8* %3, i32 %4)
%6 = load i32, i32* @stderr
%7 = call i32 @fputc(i8 signext 10, i32 %6)
%8 = load i32, i32* @EXIT_FAILURE
%9 = call i32 @exit(i32 %8)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@EXIT_FAILURE = global i32 0
define void @error(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputs(i8* %0, i32 %2)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fputc(i8 signext 10, i32 %4)
%6 = load i32, i32* @EXIT_FAILURE
%7 = tail call i32 @exit(i32 %6)
unreachable
}
int dprintk(int level, const char *fmt, ...) { return 0; }


x86 assembly (clang, -O0):
<dprintk>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dprintk>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dprintk(i32 %0, i8* %1, ...) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @dprintk(i32 %0, i8* nocapture readnone %1, ...) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ putchar(char);
void skip(int n) {
  int i;
  for (i = 0; i < n; i++)
    putchar('\n');
  return;
}


x86 assembly (clang, -O0):
<skip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1146 <skip+0x36>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <skip+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip>:
push   %rbx
test   %edi,%edi
jle    112f <skip+0x1f>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0xa,%edi
call   1030 <putchar@plt>
add    $0xffffffff,%ebx
jne    1120 <skip+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @skip(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = call i32 @putchar(i8 signext 10)
br label %10
10: ; preds = %8
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @skip(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = tail call i32 @putchar(i8 signext 10)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, %0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
/* Variables and functions */
double atan2(double, double);
double cog_math_slopef(double x1, double y1, double x2, double y2) {
  return atan2((y2 - y1), (x2 - x1));
}


x86 assembly (clang, -O0):
<cog_math_slopef>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
subsd  -0x8(%rbp),%xmm1
call   1030 <atan2@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cog_math_slopef>:
subsd  %xmm1,%xmm3
subsd  %xmm0,%xmm2
movapd %xmm3,%xmm0
movapd %xmm2,%xmm1
jmp    1030 <atan2@plt>

LLVM IR (-O0):
define double @cog_math_slopef(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %8
%10 = load double, double* %6
%11 = fsub double %9, %10
%12 = load double, double* %7
%13 = load double, double* %5
%14 = fsub double %12, %13
%15 = call double @atan2(double %11, double %14)
ret double %15
}

LLVM IR (-O2):
define double @cog_math_slopef(double %0, double %1, double %2, double %3) {
%5 = fsub double %3, %1
%6 = fsub double %2, %0
%7 = tail call double @atan2(double %5, double %6)
ret double %7
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern void C1Mod1Function1() {
  printf("Expected message: C1Mod1Function1.\n");
}


x86 assembly (clang, -O0):
<C1Mod1Function1>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<C1Mod1Function1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"Expected message: C1Mod1Function1.\0A\00"
define void @C1Mod1Function1() {
%1 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [35 x i8] c"Expected message: C1Mod1Function1.\00"
define void @C1Mod1Function1() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int countWords(char *);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ system(char *);
int main() {
  printf("%d\n", countWords(" 1123    424242     Hello world  how are you "));
  system("pause");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xebe(%rip),%rdi
call   1050 <countWords@plt>
mov    %eax,%esi
lea    0xeac(%rip),%rdi
call   1040 <printf@plt>
lea    0xed2(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xecc(%rip),%rdi
call   1050 <countWords@plt>
lea    0xebc(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
lea    0xee0(%rip),%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [46 x i8] c" 1123 424242 Hello world how are you \00"
@.str.2 = [6 x i8] c"pause\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @countWords(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
@.str.1 = [46 x i8] c" 1123 424242 Hello world how are you \00"
@.str.2 = [6 x i8] c"pause\00"
define i32 @main() {
%1 = tail call i32 @countWords(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 @system(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __blast_assert();
int main(void) {
  int a, b;
  int *p1 = &a;
  int *p2 = &b;
  if (p1 != 0 && p2 != 0) {
    ((p1 != p2) ? (0) : __blast_assert());
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
lea    -0xc(%rbp),%rax
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     115f <main+0x4f>
cmpq   $0x0,-0x20(%rbp)
je     115f <main+0x4f>
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
je     1158 <main+0x48>
jmp    115f <main+0x4f>
mov    $0x0,%al
call   1030 <__blast_assert@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32 0, i32* %1
store i32* %2, i32** %4
store i32* %3, i32** %5
%6 = load i32*, i32** %4
%7 = icmp ne i32* %6, null
br i1 %7, label %8, label %20
8: ; preds = %0
%9 = load i32*, i32** %5
%10 = icmp ne i32* %9, null
br i1 %10, label %11, label %20
11: ; preds = %8
%12 = load i32*, i32** %4
%13 = load i32*, i32** %5
%14 = icmp ne i32* %12, %13
br i1 %14, label %15, label %16
15: ; preds = %11
br label %18
16: ; preds = %11
%17 = call i32 (...) @__blast_assert()
br label %18
18: ; preds = %16, %15
%19 = phi i32 [ 0, %15 ], [ %17, %16 ]
br label %20
20: ; preds = %18, %8, %0
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
short int isUpperExtendedLetter(unsigned char chrsource) {
  if ((chrsource >= 192) && (chrsource <= 223))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<isUpperExtendedLetter>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x3(%rbp)
movzbl -0x3(%rbp),%eax
cmp    $0xc0,%eax
jl     1133 <isUpperExtendedLetter+0x33>
movzbl -0x3(%rbp),%eax
cmp    $0xdf,%eax
jg     1133 <isUpperExtendedLetter+0x33>
movw   $0x1,-0x2(%rbp)
jmp    1139 <isUpperExtendedLetter+0x39>
movw   $0x0,-0x2(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isUpperExtendedLetter>:
and    $0xe0,%dil
xor    %eax,%eax
cmp    $0xc0,%dil
sete   %al
ret

LLVM IR (-O0):
define signext i16 @isUpperExtendedLetter(i8 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = icmp sge i32 %5, 192
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = zext i8 %8 to i32
%10 = icmp sle i32 %9, 223
br i1 %10, label %11, label %12
11: ; preds = %7
store i16 1, i16* %2
br label %13
12: ; preds = %7, %1
store i16 0, i16* %2
br label %13
13: ; preds = %12, %11
%14 = load i16, i16* %2
ret i16 %14
}

LLVM IR (-O2):
define signext i16 @isUpperExtendedLetter(i8 zeroext %0) {
%2 = and i8 %0, -32
%3 = icmp eq i8 %2, -64
%4 = zext i1 %3 to i16
ret i16 %4
}
/* Type definitions */
struct battle_char {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ add_status(struct battle_char *, int);
scalar_t__ get_random(int /*<<< orphan*/, int);
scalar_t__ mod6(struct battle_char *, struct battle_char *, int);
void frog(struct battle_char *origin, struct battle_char *target) {
  if (get_random(0, 100) < mod6(origin, target, 120))
    add_status(target, 5);
}


x86 assembly (clang, -O0):
<frog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
mov    $0x64,%esi
call   1030 <get_random@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x78,%edx
call   1040 <mod6@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
cmp    %rcx,%rax
jge    1180 <frog+0x50>
mov    -0x10(%rbp),%rdi
mov    $0x5,%esi
call   1050 <add_status@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<frog>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %edi,%edi
mov    $0x64,%esi
call   1030 <get_random@plt>
mov    %rax,%rbx
mov    %r15,%rdi
mov    %r14,%rsi
mov    $0x78,%edx
call   1040 <mod6@plt>
cmp    %rax,%rbx
jge    1171 <frog+0x41>
mov    %r14,%rdi
mov    $0x5,%esi
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <add_status@plt>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
%struct.battle_char = type { i32 }
define void @frog(%struct.battle_char* %0, %struct.battle_char* %1) {
%3 = alloca %struct.battle_char*
%4 = alloca %struct.battle_char*
store %struct.battle_char* %0, %struct.battle_char** %3
store %struct.battle_char* %1, %struct.battle_char** %4
%5 = call i64 @get_random(i32 0, i32 100)
%6 = load %struct.battle_char*, %struct.battle_char** %3
%7 = load %struct.battle_char*, %struct.battle_char** %4
%8 = call i64 @mod6(%struct.battle_char* %6, %struct.battle_char* %7, i32 120)
%9 = icmp slt i64 %5, %8
br i1 %9, label %10, label %13
10: ; preds = %2
%11 = load %struct.battle_char*, %struct.battle_char** %4
%12 = call i32 @add_status(%struct.battle_char* %11, i32 5)
br label %13
13: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
%struct.battle_char = type { i32 }
define void @frog(%struct.battle_char* %0, %struct.battle_char* %1) {
%3 = tail call i64 @get_random(i32 0, i32 100)
%4 = tail call i64 @mod6(%struct.battle_char* %0, %struct.battle_char* %1, i32 120)
%5 = icmp slt i64 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @add_status(%struct.battle_char* %1, i32 5)
br label %8
8: ; preds = %6, %2
ret void
}
/* Variables and functions */
int PnameDef();
PdesignNameDef() {
  int b = -1;
  ;
  b = PnameDef();
  return (b);
}


x86 assembly (clang, -O0):
<PdesignNameDef>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xffffffff,-0x4(%rbp)
mov    $0x0,%al
call   1030 <PnameDef@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PdesignNameDef>:
xor    %eax,%eax
jmp    1030 <PnameDef@plt>

LLVM IR (-O0):
define i32 @PdesignNameDef() {
%1 = alloca i32
store i32 -1, i32* %1
%2 = call i32 (...) @PnameDef()
store i32 %2, i32* %1
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @PdesignNameDef() {
%1 = tail call i32 (...) @PnameDef()
ret i32 %1
}
/* Type definitions */
typedef int /*<<< orphan*/ off_t;

/* Variables and functions */
int /*<<< orphan*/ lseek(int, int /*<<< orphan*/, int);
off_t outside_lseek(int fd, off_t offset, int whence) {
  return lseek(fd, offset, whence);
}


x86 assembly (clang, -O0):
<outside_lseek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <lseek@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outside_lseek>:
jmp    1030 <lseek@plt>

LLVM IR (-O0):
define i32 @outside_lseek(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @lseek(i32 %7, i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @outside_lseek(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @lseek(i32 %0, i32 %1, i32 %2)
ret i32 %4
}
void xSysTickPeriodSet(unsigned long ulPeriod) {
  ;
  (*((volatile unsigned long *)(0xE000E014))) = ulPeriod - 1;
}


x86 assembly (clang, -O0):
<xSysTickPeriodSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
sub    $0x1,%rcx
mov    $0xe000e014,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<xSysTickPeriodSet>:
add    $0xffffffffffffffff,%rdi
mov    $0xe000e014,%eax
mov    %rdi,(%rax)
ret

LLVM IR (-O0):
define void @xSysTickPeriodSet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sub i64 %3, 1
store volatile i64 %4, i64* inttoptr (i64 3758153748 to i64*)
ret void
}

LLVM IR (-O2):
define void @xSysTickPeriodSet(i64 %0) {
%2 = add i64 %0, -1
store volatile i64 %2, i64* inttoptr (i64 3758153748 to i64*)
ret void
}
void g_enum_get_value_by_nick() {}


x86 assembly (clang, -O0):
<g_enum_get_value_by_nick>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_enum_get_value_by_nick>:
ret

LLVM IR (-O0):
define void @g_enum_get_value_by_nick() {
ret void
}

LLVM IR (-O2):
define void @g_enum_get_value_by_nick() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void expect(long long int pattern, long long int value) {
  if (pattern != value)
    abort();
}


x86 assembly (clang, -O0):
<expect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
je     1135 <expect+0x25>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expect>:
cmp    %rsi,%rdi
jne    1116 <expect+0x6>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @expect(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ne i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @expect(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %2
ret void
}
unsigned int XORMult(unsigned int x, unsigned int y) {
  unsigned int result = 0;
  for (int shift = 0; (y >> shift) > 0; shift++) {
    if ((y >> shift) & 1) {
      result ^= (x << shift);
    }
  }
  return result;
}


x86 assembly (clang, -O0):
<XORMult>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    -0x10(%rbp),%ecx
shr    %cl,%eax
cmp    $0x0,%eax
jbe    115e <XORMult+0x5e>
mov    -0x8(%rbp),%eax
mov    -0x10(%rbp),%ecx
shr    %cl,%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     114b <XORMult+0x4b>
mov    -0x4(%rbp),%eax
mov    -0x10(%rbp),%ecx
shl    %cl,%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1150 <XORMult+0x50>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1118 <XORMult+0x18>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XORMult>:
test   %esi,%esi
je     112d <XORMult+0x2d>
xor    %ecx,%ecx
mov    %esi,%edx
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
and    $0x1,%edx
mov    %edi,%r8d
shl    %cl,%r8d
neg    %edx
and    %edx,%r8d
xor    %r8d,%eax
add    $0x1,%ecx
mov    %esi,%edx
shr    %cl,%edx
test   %edx,%edx
jne    1110 <XORMult+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @XORMult(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %25, %2
%8 = load i32, i32* %4
%9 = load i32, i32* %6
%10 = lshr i32 %8, %9
%11 = icmp ugt i32 %10, 0
br i1 %11, label %12, label %28
12: ; preds = %7
%13 = load i32, i32* %4
%14 = load i32, i32* %6
%15 = lshr i32 %13, %14
%16 = and i32 %15, 1
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %24
18: ; preds = %12
%19 = load i32, i32* %3
%20 = load i32, i32* %6
%21 = shl i32 %19, %20
%22 = load i32, i32* %5
%23 = xor i32 %22, %21
store i32 %23, i32* %5
br label %24
24: ; preds = %18, %12
br label %25
25: ; preds = %24
%26 = load i32, i32* %6
%27 = add nsw i32 %26, 1
store i32 %27, i32* %6
br label %7
28: ; preds = %7
%29 = load i32, i32* %5
ret i32 %29
}

LLVM IR (-O2):
define i32 @XORMult(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %6, %2
%5 = phi i32 [ 0, %2 ], [ %14, %6 ]
ret i32 %5
6: ; preds = %2, %6
%7 = phi i32 [ %16, %6 ], [ %1, %2 ]
%8 = phi i32 [ %15, %6 ], [ 0, %2 ]
%9 = phi i32 [ %14, %6 ], [ 0, %2 ]
%10 = and i32 %7, 1
%11 = icmp eq i32 %10, 0
%12 = shl i32 %0, %8
%13 = select i1 %11, i32 0, i32 %12
%14 = xor i32 %13, %9
%15 = add nuw nsw i32 %8, 1
%16 = lshr i32 %1, %15
%17 = icmp eq i32 %16, 0
br i1 %17, label %4, label %6
}
/* Variables and functions */
scalar_t__ inb_p(int);
unsigned int mysleep(unsigned int ns) {
  unsigned int dummy;
  unsigned int i;
  for (i = 0; i < ns; i++) {
    dummy += inb_p(0x80);
  }
  return dummy;
}


x86 assembly (clang, -O0):
<mysleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    1152 <mysleep+0x42>
mov    $0x80,%edi
call   1030 <inb_p@plt>
mov    %rax,%rcx
mov    -0x8(%rbp),%eax
add    %rcx,%rax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1122 <mysleep+0x12>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mysleep>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
je     1133 <mysleep+0x23>
mov    %edi,%ebx
nopl   0x0(%rax)
mov    $0x80,%edi
call   1030 <inb_p@plt>
add    %eax,%ebp
add    $0xffffffff,%ebx
jne    1120 <mysleep+0x10>
jmp    1133 <mysleep+0x23>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mysleep(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %4
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %4
%7 = load i32, i32* %2
%8 = icmp ult i32 %6, %7
br i1 %8, label %9, label %18
9: ; preds = %5
%10 = call i64 @inb_p(i32 128)
%11 = load i32, i32* %3
%12 = zext i32 %11 to i64
%13 = add nsw i64 %12, %10
%14 = trunc i64 %13 to i32
store i32 %14, i32* %3
br label %15
15: ; preds = %9
%16 = load i32, i32* %4
%17 = add i32 %16, 1
store i32 %17, i32* %4
br label %5
18: ; preds = %5
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @mysleep(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %9, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ undef, %1 ]
%6 = tail call i64 @inb_p(i32 128)
%7 = trunc i64 %6 to i32
%8 = add i32 %5, %7
%9 = add nuw i32 %4, 1
%10 = icmp eq i32 %9, %0
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ undef, %1 ], [ %8, %3 ]
ret i32 %12
}
unsigned int decode16(unsigned char **data) {
  unsigned int value = 0;
  value = (*data)[0];
  value = (value << 8) + (*data)[1];
  *data += 2;
  return value;
}


x86 assembly (clang, -O0):
<decode16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movzbl (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
mov    (%rcx),%rcx
movzbl 0x1(%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x2,%rcx
mov    %rcx,(%rax)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode16>:
mov    (%rdi),%rcx
movzwl (%rcx),%eax
shl    $0x10,%eax
bswap  %eax
add    $0x2,%rcx
mov    %rcx,(%rdi)
ret

LLVM IR (-O0):
define i32 @decode16(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = shl i32 %9, 8
%11 = load i8**, i8*** %2
%12 = load i8*, i8** %11
%13 = getelementptr inbounds i8, i8* %12, i64 1
%14 = load i8, i8* %13
%15 = zext i8 %14 to i32
%16 = add i32 %10, %15
store i32 %16, i32* %3
%17 = load i8**, i8*** %2
%18 = load i8*, i8** %17
%19 = getelementptr inbounds i8, i8* %18, i64 2
store i8* %19, i8** %17
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @decode16(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = shl nuw nsw i32 %4, 8
%6 = getelementptr inbounds i8, i8* %2, i64 1
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = or i32 %5, %8
%10 = getelementptr inbounds i8, i8* %2, i64 2
store i8* %10, i8** %0
ret i32 %9
}
int AnalyseLink(LinkId)
int LinkId;
{}


x86 assembly (clang, -O0):
<AnalyseLink>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<AnalyseLink>:
ret

LLVM IR (-O0):
define i32 @AnalyseLink(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @AnalyseLink(i32 %0) {
ret i32 undef
}
adrreg0imm1(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{
  if ((p0[10000000]) <= 33)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<adrreg0imm1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x20(%rbp),%rax
cmpl   $0x21,0x2625a00(%rax)
jg     1135 <adrreg0imm1+0x35>
movl   $0x1,-0x4(%rbp)
jmp    113c <adrreg0imm1+0x3c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adrreg0imm1>:
xor    %eax,%eax
cmpl   $0x22,0x2625a00(%r8)
22
setl   %al
ret

LLVM IR (-O0):
define i32 @adrreg0imm1(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %12
%15 = getelementptr inbounds i32, i32* %14, i64 10000000
%16 = load i32, i32* %15
%17 = icmp sle i32 %16, 33
br i1 %17, label %18, label %19
18: ; preds = %6
store i32 1, i32* %7
br label %20
19: ; preds = %6
store i32 0, i32* %7
br label %20
20: ; preds = %19, %18
%21 = load i32, i32* %7
ret i32 %21
}

LLVM IR (-O2):
define i32 @adrreg0imm1(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture %4, i32* nocapture readnone %5) {
%7 = getelementptr inbounds i32, i32* %4, i64 10000000
%8 = load i32, i32* %7
%9 = icmp slt i32 %8, 34
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ rot13();
int main() {
  char option;
  rot13();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rot13@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <rot13@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
%3 = call i32 (...) @rot13()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @rot13()
ret i32 0
}
int get16(unsigned char *cp) {
  int x;
  x = *cp++;
  x <<= 8;
  x |= *cp++;
  return (x);
}


x86 assembly (clang, -O0):
<get16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shl    $0x8,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get16>:
movzwl (%rdi),%eax
shl    $0x10,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @get16(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i32 1
store i8* %5, i8** %2
%6 = load i8, i8* %4
%7 = zext i8 %6 to i32
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = shl i32 %8, 8
store i32 %9, i32* %3
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i32 1
store i8* %11, i8** %2
%12 = load i8, i8* %10
%13 = zext i8 %12 to i32
%14 = load i32, i32* %3
%15 = or i32 %14, %13
store i32 %15, i32* %3
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @get16(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 1
%3 = load i8, i8* %0
%4 = zext i8 %3 to i32
%5 = shl nuw nsw i32 %4, 8
%6 = load i8, i8* %2
%7 = zext i8 %6 to i32
%8 = or i32 %5, %7
ret i32 %8
}
void setup_thread_affinities(void) {}


x86 assembly (clang, -O0):
<setup_thread_affinities>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setup_thread_affinities>:
ret

LLVM IR (-O0):
define void @setup_thread_affinities() {
ret void
}

LLVM IR (-O2):
define void @setup_thread_affinities() {
ret void
}
int check_float() { return sizeof(float); }


x86 assembly (clang, -O0):
<check_float>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_float>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @check_float() {
ret i32 4
}

LLVM IR (-O2):
define i32 @check_float() {
ret i32 4
}
/* Variables and functions */
scalar_t__ Geometric(double);
long Pascal(long n, double p) {
  long i, x = 0;
  for (i = 0; i < n; i++)
    x += Geometric(p);
  return (x);
}


x86 assembly (clang, -O0):
<Pascal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
movq   $0x0,-0x20(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x8(%rbp),%rax
jge    1162 <Pascal+0x52>
movsd  -0x10(%rbp),%xmm0
call   1030 <Geometric@plt>
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1131 <Pascal+0x21>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Pascal>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
jle    1145 <Pascal+0x35>
mov    %rdi,%rbx
xor    %r14d,%r14d
movsd  %xmm0,(%rsp)
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsd  (%rsp),%xmm0
call   1030 <Geometric@plt>
add    %rax,%r14
add    $0xffffffffffffffff,%rbx
jne    1130 <Pascal+0x20>
jmp    1148 <Pascal+0x38>
xor    %r14d,%r14d
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @Pascal(i64 %0, double %1) {
%3 = alloca i64
%4 = alloca double
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store double %1, double* %4
store i64 0, i64* %6
store i64 0, i64* %5
br label %7
7: ; preds = %16, %2
%8 = load i64, i64* %5
%9 = load i64, i64* %3
%10 = icmp slt i64 %8, %9
br i1 %10, label %11, label %19
11: ; preds = %7
%12 = load double, double* %4
%13 = call i64 @Geometric(double %12)
%14 = load i64, i64* %6
%15 = add nsw i64 %14, %13
store i64 %15, i64* %6
br label %16
16: ; preds = %11
%17 = load i64, i64* %5
%18 = add nsw i64 %17, 1
store i64 %18, i64* %5
br label %7
19: ; preds = %7
%20 = load i64, i64* %6
ret i64 %20
}

LLVM IR (-O2):
define i64 @Pascal(i64 %0, double %1) {
%3 = icmp sgt i64 %0, 0
br i1 %3, label %4, label %11
4: ; preds = %2, %4
%5 = phi i64 [ %8, %4 ], [ 0, %2 ]
%6 = phi i64 [ %9, %4 ], [ 0, %2 ]
%7 = tail call i64 @Geometric(double %1)
%8 = add nsw i64 %7, %5
%9 = add nuw nsw i64 %6, 1
%10 = icmp eq i64 %9, %0
br i1 %10, label %11, label %4
11: ; preds = %4, %2
%12 = phi i64 [ 0, %2 ], [ %8, %4 ]
ret i64 %12
}
double maxf(const double a, const double b) { return (a > b) ? a : b; }


x86 assembly (clang, -O0):
<maxf>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jbe    112d <maxf+0x2d>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1137 <maxf+0x37>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxf>:
maxsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @maxf(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp ogt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %3
br label %12
10: ; preds = %2
%11 = load double, double* %4
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @maxf(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ RB_AUTOBOOT;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ reboot(int /*<<< orphan*/);
int /*<<< orphan*/ shutdown();
void quithandler(int sig) {
  shutdown();
  reboot(RB_AUTOBOOT);
  exit(0);
}


x86 assembly (clang, -O0):
<quithandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <shutdown@plt>
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
call   1050 <reboot@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<quithandler>:
push   %rax
xor    %eax,%eax
call   1030 <shutdown@plt>
mov    0x2ea1(%rip),%rax
mov    (%rax),%edi
call   1050 <reboot@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@RB_AUTOBOOT = global i32 0
define void @quithandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @shutdown()
%4 = load i32, i32* @RB_AUTOBOOT
%5 = call i32 @reboot(i32 %4)
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@RB_AUTOBOOT = global i32 0
define void @quithandler(i32 %0) {
%2 = tail call i32 (...) @shutdown()
%3 = load i32, i32* @RB_AUTOBOOT
%4 = tail call i32 @reboot(i32 %3)
%5 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
struct bladerf {
  int dummy;
};

/* Variables and functions */
int nios_8x32_read(struct bladerf *, int, int /*<<< orphan*/,
                   int /*<<< orphan*/ *);
int nios_config_read(struct bladerf *dev, uint32_t *val) {
  int status = nios_8x32_read(dev, 0x01, 0, val);
  if (status == 0) {
    do {
      do {
      } while (0);
    } while (0);
  }
  return status;
}


x86 assembly (clang, -O0):
<nios_config_read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rcx
mov    $0x1,%esi
xor    %edx,%edx
call   1030 <nios_8x32_read@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    115a <nios_config_read+0x4a>
jmp    1146 <nios_config_read+0x36>
jmp    114b <nios_config_read+0x3b>
jmp    1150 <nios_config_read+0x40>
jmp    1155 <nios_config_read+0x45>
jmp    115a <nios_config_read+0x4a>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nios_config_read>:
mov    %rsi,%rcx
mov    $0x1,%esi
xor    %edx,%edx
jmp    1030 <nios_8x32_read@plt>

LLVM IR (-O0):
%struct.bladerf = type { i32 }
define i32 @nios_config_read(%struct.bladerf* %0, i32* %1) {
%3 = alloca %struct.bladerf*
%4 = alloca i32*
%5 = alloca i32
store %struct.bladerf* %0, %struct.bladerf** %3
store i32* %1, i32** %4
%6 = load %struct.bladerf*, %struct.bladerf** %3
%7 = load i32*, i32** %4
%8 = call i32 @nios_8x32_read(%struct.bladerf* %6, i32 1, i32 0, i32* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %16
11: ; preds = %2
br label %12
12: ; preds = %11
br label %13
13: ; preds = %12
br label %14
14: ; preds = %13
br label %15
15: ; preds = %14
br label %16
16: ; preds = %15, %2
%17 = load i32, i32* %5
ret i32 %17
}

LLVM IR (-O2):
%struct.bladerf = type { i32 }
define i32 @nios_config_read(%struct.bladerf* %0, i32* %1) {
%3 = tail call i32 @nios_8x32_read(%struct.bladerf* %0, i32 1, i32 0, i32* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ RegWriteA_LC898122AF(int, int);
void SetPanTiltMode(unsigned char UcPnTmod) {
  switch (UcPnTmod) {
  case 0x00:
    RegWriteA_LC898122AF(0x0109, 0x00);
    break;
  case 0x01:
    RegWriteA_LC898122AF(0x0109, 0x01);
    break;
  }
}


x86 assembly (clang, -O0):
<SetPanTiltMode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
test   %eax,%eax
je     1143 <SetPanTiltMode+0x33>
jmp    1132 <SetPanTiltMode+0x22>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
je     1154 <SetPanTiltMode+0x44>
jmp    1163 <SetPanTiltMode+0x53>
mov    $0x109,%edi
xor    %esi,%esi
call   1030 <RegWriteA_LC898122AF@plt>
jmp    1163 <SetPanTiltMode+0x53>
mov    $0x109,%edi
mov    $0x1,%esi
call   1030 <RegWriteA_LC898122AF@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetPanTiltMode>:
test   %edi,%edi
je     1129 <SetPanTiltMode+0x19>
cmp    $0x1,%dil
jne    1135 <SetPanTiltMode+0x25>
mov    $0x1,%esi
mov    $0x109,%edi
jmp    1030 <RegWriteA_LC898122AF@plt>
xor    %esi,%esi
mov    $0x109,%edi
jmp    1030 <RegWriteA_LC898122AF@plt>
ret

LLVM IR (-O0):
define void @SetPanTiltMode(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
switch i32 %4, label %9 [
i32 0, label %5
i32 1, label %7
]
5: ; preds = %1
%6 = call i32 @RegWriteA_LC898122AF(i32 265, i32 0)
br label %9
7: ; preds = %1
%8 = call i32 @RegWriteA_LC898122AF(i32 265, i32 1)
br label %9
9: ; preds = %1, %7, %5
ret void
}

LLVM IR (-O2):
define void @SetPanTiltMode(i8 zeroext %0) {
switch i8 %0, label %6 [
i8 0, label %3
i8 1, label %2
]
2: ; preds = %1
br label %3
3: ; preds = %1, %2
%4 = phi i32 [ 1, %2 ], [ 0, %1 ]
%5 = tail call i32 @RegWriteA_LC898122AF(i32 265, i32 %4)
br label %6
6: ; preds = %3, %1
ret void
}
double id(double a) { return a; }


x86 assembly (clang, -O0):
<id>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<id>:
ret

LLVM IR (-O0):
define double @id(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
ret double %3
}

LLVM IR (-O2):
define double @id(double returned %0) {
ret double %0
}