xunge/DecIR huggingface dataset:
void push_unsigned_int(char *dest, int num_bits, unsigned long val) {
  int i;
  char *source = (char *)(&val);
  for (i = 0; i < num_bits / 8; i++)
    dest[i] = source[i];
}


x86 assembly (clang, -O0):
<push_unsigned_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0xc(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x2c(%rbp),%eax
cmp    %ecx,%eax
jge    1160 <push_unsigned_int+0x60>
mov    -0x28(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x8(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    111e <push_unsigned_int+0x1e>
pop    %rbp
ret

x86 assembly (clang, -O2):
<push_unsigned_int>:
push   %rax
mov    %rdx,(%rsp)
cmp    $0x8,%esi
jl     1131 <push_unsigned_int+0x21>
mov    %esi,%eax
shr    $0x3,%eax
add    $0xffffffff,%eax
add    $0x1,%rax
mov    %rsp,%rsi
mov    %rax,%rdx
call   1030 <memcpy@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @push_unsigned_int(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
%7 = alloca i32
%8 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%9 = bitcast i64* %6 to i8*
store i8* %9, i8** %8
store i32 0, i32* %7
br label %10
10: ; preds = %25, %3
%11 = load i32, i32* %7
%12 = load i32, i32* %5
%13 = sdiv i32 %12, 8
%14 = icmp slt i32 %11, %13
br i1 %14, label %15, label %28
15: ; preds = %10
%16 = load i8*, i8** %8
%17 = load i32, i32* %7
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = load i8*, i8** %4
%22 = load i32, i32* %7
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
store i8 %20, i8* %24
br label %25
25: ; preds = %15
%26 = load i32, i32* %7
%27 = add nsw i32 %26, 1
store i32 %27, i32* %7
br label %10
28: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @push_unsigned_int(i8* nocapture writeonly %0, i32 %1, i64 %2) {
%4 = alloca i64
store i64 %2, i64* %4
%5 = icmp sgt i32 %1, 7
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = lshr i32 %1, 3
%8 = add nsw i32 %7, -1
%9 = zext i32 %8 to i64
%10 = add nuw nsw i64 %9, 1
%11 = bitcast i64* %4 to i8*
br label %12
12: ; preds = %6, %3
ret void
}
void crc32_init(unsigned long *value) { *value = 0xFFFFFFFF; }


x86 assembly (clang, -O0):
<crc32_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0xffffffff,%ecx
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc32_init>:
mov    $0xffffffff,%eax
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
define void @crc32_init(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
store i64 4294967295, i64* %3
ret void
}

LLVM IR (-O2):
define void @crc32_init(i64* nocapture writeonly %0) {
store i64 4294967295, i64* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ sqeeze(char *, char *);
int main() {
  char s1[10] = "hello";
  char *s2 = "world";
  printf("Before Sqeeze s1 is %s\n", s1);
  sqeeze(s1, s2);
  printf("After Sqeeze s1 is %s\n", s1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0xe(%rbp)
mov    0xec7(%rip),%ax
mov    %ax,-0x6(%rbp)
lea    0xebe(%rip),%rax
mov    %rax,-0x18(%rbp)
lea    -0xe(%rbp),%rsi
lea    0xeb5(%rip),%rdi
call   1030 <printf@plt>
lea    -0xe(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <sqeeze@plt>
lea    -0xe(%rbp),%rsi
lea    0xeb0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movabs $0x6f6c6c6568,%rax
mov    %rax,(%rsp)
movw   $0x0,0x8(%rsp)
lea    0xecf(%rip),%rdi
mov    %rsp,%rbx
mov    %rbx,%rsi
call   1030 <printf@plt>
lea    0xeb7(%rip),%rsi
mov    %rbx,%rdi
call   1040 <sqeeze@plt>
lea    0xec6(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.main.s1 = [10 x i8] c"hello\00\00\00\00\00"
@.str = [6 x i8] c"world\00"
@.str.1 = [24 x i8] c"Before Sqeeze s1 is %s\0A\00"
@.str.2 = [23 x i8] c"After Sqeeze s1 is %s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [10 x i8]
%3 = alloca i8*
store i32 0, i32* %1
%4 = bitcast [10 x i8]* %2 to i8*
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %3
%5 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%6 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i8* %5)
%7 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%8 = load i8*, i8** %3
%9 = call i32 @sqeeze(i8* %7, i8* %8)
%10 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%11 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.2, i64 0, i64 0), i8* %10)
ret i32 0
}

LLVM IR (-O2):
@__const.main.s1 = [10 x i8] c"hello\00\00\00\00\00"
@.str = [6 x i8] c"world\00"
@.str.1 = [24 x i8] c"Before Sqeeze s1 is %s\0A\00"
@.str.2 = [23 x i8] c"After Sqeeze s1 is %s\0A\00"
define i32 @main() {
%1 = alloca [10 x i8]
%2 = getelementptr inbounds [10 x i8], [10 x i8]* %1, i64 0, i64 0
%3 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i8* %2)
%4 = call i32 @sqeeze(i8* %2, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.2, i64 0, i64 0), i8* %2)
ret i32 0
}
/* Variables and functions */
int laby_game_menu_handler();
int laby_game_menu_init(void) { return laby_game_menu_handler(); }


x86 assembly (clang, -O0):
<laby_game_menu_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <laby_game_menu_handler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<laby_game_menu_init>:
xor    %eax,%eax
jmp    1030 <laby_game_menu_handler@plt>

LLVM IR (-O0):
define i32 @laby_game_menu_init() {
%1 = call i32 (...) @laby_game_menu_handler()
ret i32 %1
}

LLVM IR (-O2):
define i32 @laby_game_menu_init() {
%1 = tail call i32 (...) @laby_game_menu_handler()
ret i32 %1
}
long __ocl_bitselect_long(long a, long b, long c) {
  return (b & c) | (a & (~c));
}


x86 assembly (clang, -O0):
<__ocl_bitselect_long>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
and    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
mov    -0x18(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
and    %rdx,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ocl_bitselect_long>:
mov    %rsi,%rax
xor    %rdi,%rax
and    %rdx,%rax
xor    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @__ocl_bitselect_long(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %5
%8 = load i64, i64* %6
%9 = and i64 %7, %8
%10 = load i64, i64* %4
%11 = load i64, i64* %6
%12 = xor i64 %11, -1
%13 = and i64 %10, %12
%14 = or i64 %9, %13
ret i64 %14
}

LLVM IR (-O2):
define i64 @__ocl_bitselect_long(i64 %0, i64 %1, i64 %2) {
%4 = and i64 %2, %1
%5 = xor i64 %2, -1
%6 = and i64 %5, %0
%7 = or i64 %4, %6
ret i64 %7
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430InterruptP__Port22__default__fired();
void HplMsp430InterruptP__Port22__fired(void) {
  HplMsp430InterruptP__Port22__default__fired();
}


x86 assembly (clang, -O0):
<HplMsp430InterruptP__Port22__fired>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430InterruptP__Port22__default__fired@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<HplMsp430InterruptP__Port22__fired>:
xor    %eax,%eax
jmp    1030 <HplMsp430InterruptP__Port22__default__fired@plt>

LLVM IR (-O0):
define void @HplMsp430InterruptP__Port22__fired() {
%1 = call i32 (...) @HplMsp430InterruptP__Port22__default__fired()
ret void
}

LLVM IR (-O2):
define void @HplMsp430InterruptP__Port22__fired() {
%1 = tail call i32 (...) @HplMsp430InterruptP__Port22__default__fired()
ret void
}
/* Variables and functions */
bool aslc_is_sym(const char c) {
  return c == '(' || c == ')' || c == '@' || c == '$';
}


x86 assembly (clang, -O0):
<aslc_is_sym>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x28,%ecx
mov    %al,-0x2(%rbp)
je     114d <aslc_is_sym+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x29,%ecx
mov    %al,-0x2(%rbp)
je     114d <aslc_is_sym+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x40,%ecx
mov    %al,-0x2(%rbp)
je     114d <aslc_is_sym+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0x24,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aslc_is_sym>:
lea    -0x28(%rdi),%ecx
cmp    $0x18,%cl
ja     111c <aslc_is_sym+0x1c>
mov    $0x1,%eax
movzbl %cl,%ecx
mov    $0x1000003,%edx
bt     %rcx,%rdx
jae    111c <aslc_is_sym+0x1c>
ret
xor    %eax,%eax
cmp    $0x24,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @aslc_is_sym(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 40
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 41
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 64
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 36
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @aslc_is_sym(i8 signext %0) {
switch i8 %0, label %2 [
i8 64, label %5
i8 41, label %5
i8 40, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 36
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ report(char const *, char const *, long);
void pubnub_assert_handler_printf(char const *s, char const *file, long line) {
  report(s, file, line);
}


x86 assembly (clang, -O0):
<pubnub_assert_handler_printf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <report@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pubnub_assert_handler_printf>:
jmp    1030 <report@plt>

LLVM IR (-O0):
define void @pubnub_assert_handler_printf(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @report(i8* %7, i8* %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @pubnub_assert_handler_printf(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @report(i8* %0, i8* %1, i64 %2)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_t;

/* Variables and functions */
int /*<<< orphan*/ thread_exit(int /*<<< orphan*/);
int pthread_cancel(pthread_t thread) { thread_exit(thread); }


x86 assembly (clang, -O0):
<pthread_cancel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <thread_exit@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_cancel>:
jmp    1030 <thread_exit@plt>

LLVM IR (-O0):
define i32 @pthread_cancel(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = call i32 @thread_exit(i32 %4)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @pthread_cancel(i32 %0) {
%2 = tail call i32 @thread_exit(i32 %0)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ R_FDL_IFct_WriteMemoryU16(int, int);
void R_FDL_FCUFct_Resume(void) {
  R_FDL_IFct_WriteMemoryU16((0xFFA20000uL), (0xD0u));
}


x86 assembly (clang, -O0):
<R_FDL_FCUFct_Resume>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffa20000,%edi
mov    $0xd0,%esi
call   1030 <R_FDL_IFct_WriteMemoryU16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<R_FDL_FCUFct_Resume>:
mov    $0xffa20000,%edi
mov    $0xd0,%esi
jmp    1030 <R_FDL_IFct_WriteMemoryU16@plt>

LLVM IR (-O0):
define void @R_FDL_FCUFct_Resume() {
%1 = call i32 @R_FDL_IFct_WriteMemoryU16(i32 -6160384, i32 208)
ret void
}

LLVM IR (-O2):
define void @R_FDL_FCUFct_Resume() {
%1 = tail call i32 @R_FDL_IFct_WriteMemoryU16(i32 -6160384, i32 208)
ret void
}
/* Variables and functions */
int TIOCM_RTS;
int get_mlines(int);
int put_mlines(int, int);
int set_rts(int fd) {
  int i;
  i = get_mlines(fd);
  i |= TIOCM_RTS;
  i = put_mlines(fd, i);
  return (i);
}


x86 assembly (clang, -O0):
<set_rts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <get_mlines@plt>
mov    %eax,-0x8(%rbp)
mov    0x2eab(%rip),%rax
mov    (%rax),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <put_mlines@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_rts>:
push   %rbx
mov    %edi,%ebx
call   1030 <get_mlines@plt>
mov    0x2eb9(%rip),%rcx
or     (%rcx),%eax
mov    %ebx,%edi
mov    %eax,%esi
pop    %rbx
jmp    1040 <put_mlines@plt>

LLVM IR (-O0):
@TIOCM_RTS = global i32 0
define i32 @set_rts(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @get_mlines(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* @TIOCM_RTS
%7 = load i32, i32* %3
%8 = or i32 %7, %6
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = call i32 @put_mlines(i32 %9, i32 %10)
store i32 %11, i32* %3
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
@TIOCM_RTS = global i32 0
define i32 @set_rts(i32 %0) {
%2 = tail call i32 @get_mlines(i32 %0)
%3 = load i32, i32* @TIOCM_RTS
%4 = or i32 %3, %2
%5 = tail call i32 @put_mlines(i32 %0, i32 %4)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ cellgen_dma_start();
int /*<<< orphan*/ cellgen_dma_stop(int);
int /*<<< orphan*/ mfc_read_tag_status_all();
int /*<<< orphan*/ mfc_write_tag_mask(int);
void dma_wait(int TAG_ID, int fn_id) {
  cellgen_dma_start();
  mfc_write_tag_mask(1 << ((unsigned int)TAG_ID));
  mfc_read_tag_status_all();
  cellgen_dma_stop(fn_id);
}


x86 assembly (clang, -O0):
<dma_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <cellgen_dma_start@plt>
mov    -0x4(%rbp),%ecx
mov    $0x1,%edi
shl    %cl,%edi
call   1030 <mfc_write_tag_mask@plt>
mov    $0x0,%al
call   1050 <mfc_read_tag_status_all@plt>
mov    -0x8(%rbp),%edi
call   1060 <cellgen_dma_stop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dma_wait>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %eax,%eax
call   1040 <cellgen_dma_start@plt>
mov    $0x1,%edi
mov    %ebp,%ecx
shl    %cl,%edi
call   1030 <mfc_write_tag_mask@plt>
xor    %eax,%eax
call   1050 <mfc_read_tag_status_all@plt>
mov    %ebx,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1060 <cellgen_dma_stop@plt>

LLVM IR (-O0):
define void @dma_wait(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 (...) @cellgen_dma_start()
%6 = load i32, i32* %3
%7 = shl i32 1, %6
%8 = call i32 @mfc_write_tag_mask(i32 %7)
%9 = call i32 (...) @mfc_read_tag_status_all()
%10 = load i32, i32* %4
%11 = call i32 @cellgen_dma_stop(i32 %10)
ret void
}

LLVM IR (-O2):
define void @dma_wait(i32 %0, i32 %1) {
%3 = tail call i32 (...) @cellgen_dma_start()
%4 = shl nuw i32 1, %0
%5 = tail call i32 @mfc_write_tag_mask(i32 %4)
%6 = tail call i32 (...) @mfc_read_tag_status_all()
%7 = tail call i32 @cellgen_dma_stop(i32 %1)
ret void
}
void decrement_access(int *buf, int n) {
  int *p = buf;
  while (n) {
    *p++ = 0;
    n--;
  }
}


x86 assembly (clang, -O0):
<decrement_access>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1140 <decrement_access+0x40>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x18(%rbp)
movl   $0x0,(%rax)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1113 <decrement_access+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<decrement_access>:
test   %esi,%esi
je     1126 <decrement_access+0x16>
push   %rax
mov    %esi,%edx
shl    $0x2,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @decrement_access(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32*
store i32* %0, i32** %3
store i32 %1, i32* %4
%6 = load i32*, i32** %3
store i32* %6, i32** %5
br label %7
7: ; preds = %10, %2
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %7
%11 = load i32*, i32** %5
%12 = getelementptr inbounds i32, i32* %11, i32 1
store i32* %12, i32** %5
store i32 0, i32* %11
%13 = load i32, i32* %4
%14 = add nsw i32 %13, -1
store i32 %14, i32* %4
br label %7
15: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @decrement_access(i32* nocapture writeonly %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %8, label %4
4: ; preds = %2
%5 = bitcast i32* %0 to i8*
%6 = zext i32 %1 to i64
%7 = shl nuw nsw i64 %6, 2
br label %8
8: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ filter_db_dump(char *, char *);
int /*<<< orphan*/ parse_command_line(char **, char **, int, char **);
int main(int argc, char *argv[]) {
  char *include_regexp = NULL;
  char *exclude_regexp = NULL;
  parse_command_line(&include_regexp, &exclude_regexp, argc, argv);
  filter_db_dump(include_regexp, exclude_regexp);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x8(%rbp),%edx
mov    -0x10(%rbp),%rcx
lea    -0x18(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1040 <parse_command_line@plt>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <filter_db_dump@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    %rsi,%rcx
mov    %edi,%edx
movq   $0x0,0x10(%rsp)
movq   $0x0,0x8(%rsp)
lea    0x10(%rsp),%rdi
lea    0x8(%rsp),%rsi
call   1040 <parse_command_line@plt>
mov    0x10(%rsp),%rdi
mov    0x8(%rsp),%rsi
call   1030 <filter_db_dump@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
%7 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* null, i8** %6
store i8* null, i8** %7
%8 = load i32, i32* %4
%9 = load i8**, i8*** %5
%10 = call i32 @parse_command_line(i8** %6, i8** %7, i32 %8, i8** %9)
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = call i32 @filter_db_dump(i8* %11, i8* %12)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = bitcast i8** %3 to i8*
store i8* null, i8** %3
%6 = bitcast i8** %4 to i8*
store i8* null, i8** %4
%7 = call i32 @parse_command_line(i8** %3, i8** %4, i32 %0, i8** %1)
%8 = load i8*, i8** %3
%9 = load i8*, i8** %4
%10 = call i32 @filter_db_dump(i8* %8, i8* %9)
ret i32 0
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ puts(char *);
int main() {
  puts("Hello World!");
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <puts@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    0x2ebc(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hello World!\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @puts(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hello World!\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%2 = load i32, i32* @EXIT_SUCCESS
ret i32 %2
}
/* Type definitions */
struct ptr_array {
  int dummy;
};

/* Variables and functions */
void *ptr_array_rel(struct ptr_array *, void *, int);
void *ptr_array_next(struct ptr_array *array, void *ptr) {
  return ptr_array_rel(array, ptr, 1);
}


x86 assembly (clang, -O0):
<ptr_array_next>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <ptr_array_rel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ptr_array_next>:
mov    $0x1,%edx
jmp    1030 <ptr_array_rel@plt>

LLVM IR (-O0):
%struct.ptr_array = type { i32 }
define i8* @ptr_array_next(%struct.ptr_array* %0, i8* %1) {
%3 = alloca %struct.ptr_array*
%4 = alloca i8*
store %struct.ptr_array* %0, %struct.ptr_array** %3
store i8* %1, i8** %4
%5 = load %struct.ptr_array*, %struct.ptr_array** %3
%6 = load i8*, i8** %4
%7 = call i8* @ptr_array_rel(%struct.ptr_array* %5, i8* %6, i32 1)
ret i8* %7
}

LLVM IR (-O2):
%struct.ptr_array = type { i32 }
define i8* @ptr_array_next(%struct.ptr_array* %0, i8* %1) {
%3 = tail call i8* @ptr_array_rel(%struct.ptr_array* %0, i8* %1, i32 1)
ret i8* %3
}
/* Variables and functions */
int EXIT_SUCCESS;
int is_greater(unsigned char, unsigned char);
int /*<<< orphan*/ printf(char *, unsigned char, unsigned char);
int main(void) {
  unsigned char val1 = 255;
  unsigned char val2 = 250;
  if (is_greater(val1, val2) == 1)
    printf("%d > %d\n", val1, val2);
  else
    printf("%d > %d\n", val1, val2);
  return (EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0xff,-0x5(%rbp)
movb   $0xfa,-0x6(%rbp)
mov    -0x5(%rbp),%al
movzbl %al,%edi
movzbl -0x6(%rbp),%esi
call   1030 <is_greater@plt>
cmp    $0x1,%eax
jne    116a <main+0x4a>
mov    -0x5(%rbp),%al
lea    0xea7(%rip),%rdi
movzbl %al,%esi
movzbl -0x6(%rbp),%edx
call   1040 <printf@plt>
jmp    1180 <main+0x60>
mov    -0x5(%rbp),%al
lea    0xe8c(%rip),%rdi
movzbl %al,%esi
movzbl -0x6(%rbp),%edx
call   1040 <printf@plt>
mov    0x2e59(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xff,%edi
mov    $0xfa,%esi
call   1030 <is_greater@plt>
lea    0xec9(%rip),%rdi
mov    $0xff,%esi
mov    $0xfa,%edx
call   1040 <printf@plt>
mov    0x2e93(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"%d > %d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
store i32 0, i32* %1
store i8 -1, i8* %2
store i8 -6, i8* %3
%4 = load i8, i8* %2
%5 = load i8, i8* %3
%6 = call i32 @is_greater(i8 zeroext %4, i8 zeroext %5)
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %12
8: ; preds = %0
%9 = load i8, i8* %2
%10 = load i8, i8* %3
%11 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 zeroext %9, i8 zeroext %10)
br label %16
12: ; preds = %0
%13 = load i8, i8* %2
%14 = load i8, i8* %3
%15 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 zeroext %13, i8 zeroext %14)
br label %16
16: ; preds = %12, %8
%17 = load i32, i32* @EXIT_SUCCESS
ret i32 %17
}

LLVM IR (-O2):
@.str = [9 x i8] c"%d > %d\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @is_greater(i8 zeroext -1, i8 zeroext -6)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8 zeroext -1, i8 zeroext -6)
%3 = load i32, i32* @EXIT_SUCCESS
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void show_usage() { printf("usage: loadaddrs <filename>\n"); }


x86 assembly (clang, -O0):
<show_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"usage: loadaddrs <filename>\0A\00"
define void @show_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [28 x i8] c"usage: loadaddrs <filename>\00"
define void @show_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret void
}
long i_sqrt(long x) {
  long x1, x2;
  x2 = 16;
  do {
    x1 = x2;
    x2 = x1 - ((x1 * x1) - x) / (2 * x1);
  } while (x1 != x2);
  if (x1 * x1 > x) {
    --x1;
  }
  return x1;
}


x86 assembly (clang, -O0):
<i_sqrt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x10,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
imul   -0x10(%rbp),%rax
sub    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
shl    $0x1,%rcx
cqto
idiv   %rcx
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
sub    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x18(%rbp),%rax
jne    1110 <i_sqrt+0x10>
mov    -0x10(%rbp),%rax
imul   -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
jle    1175 <i_sqrt+0x75>
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<i_sqrt>:
mov    $0x10,%ecx
jmp    1120 <i_sqrt+0x20>
nopw   0x0(%rax,%rax,1)
cqto
idiv   %rcx
mov    %r8,%rcx
sub    %rax,%rcx
test   %rax,%rax
je     1145 <i_sqrt+0x45>
mov    %rcx,%r8
mov    %rcx,%rsi
imul   %rcx,%rsi
mov    %rsi,%rax
sub    %rdi,%rax
add    %rcx,%rcx
mov    %rax,%rdx
or     %rcx,%rdx
shr    $0x20,%rdx
jne    1110 <i_sqrt+0x10>
xor    %edx,%edx
div    %ecx
jmp    1115 <i_sqrt+0x15>
xor    %eax,%eax
cmp    %rdi,%rsi
setg   %al
sub    %rax,%r8
mov    %r8,%rax
ret

LLVM IR (-O0):
define i64 @i_sqrt(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
store i64 16, i64* %4
br label %5
5: ; preds = %17, %1
%6 = load i64, i64* %4
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = load i64, i64* %3
%9 = load i64, i64* %3
%10 = mul nsw i64 %8, %9
%11 = load i64, i64* %2
%12 = sub nsw i64 %10, %11
%13 = load i64, i64* %3
%14 = mul nsw i64 2, %13
%15 = sdiv i64 %12, %14
%16 = sub nsw i64 %7, %15
store i64 %16, i64* %4
br label %17
17: ; preds = %5
%18 = load i64, i64* %3
%19 = load i64, i64* %4
%20 = icmp ne i64 %18, %19
br i1 %20, label %5, label %21
21: ; preds = %17
%22 = load i64, i64* %3
%23 = load i64, i64* %3
%24 = mul nsw i64 %22, %23
%25 = load i64, i64* %2
%26 = icmp sgt i64 %24, %25
br i1 %26, label %27, label %30
27: ; preds = %21
%28 = load i64, i64* %3
%29 = add nsw i64 %28, -1
store i64 %29, i64* %3
br label %30
30: ; preds = %27, %21
%31 = load i64, i64* %3
ret i64 %31
}

LLVM IR (-O2):
define i64 @i_sqrt(i64 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 16, %1 ], [ %8, %2 ]
%4 = mul nsw i64 %3, %3
%5 = sub nsw i64 %4, %0
%6 = shl nsw i64 %3, 1
%7 = sdiv i64 %5, %6
%8 = sub nsw i64 %3, %7
%9 = icmp eq i64 %7, 0
br i1 %9, label %10, label %2
10: ; preds = %2
%11 = icmp sgt i64 %4, %0
%12 = sext i1 %11 to i64
%13 = add nsw i64 %3, %12
ret i64 %13
}
int main(int argc, char *argv[]) {
  char (*a)() = 0;
  (void)(*a)();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    $0x0,%al
call   *-0x18(%rbp)
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8 (...)*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8 (...)* null, i8 (...)** %6
%7 = load i8 (...)*, i8 (...)** %6
%8 = call signext i8 (...) %7()
ret i32 0
}

LLVM IR (-O2):
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void reset(void) { printf("%cc", 27); }


x86 assembly (clang, -O0):
<reset>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1b,%esi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset>:
lea    0xee9(%rip),%rdi
mov    $0x1b,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%cc\00"
define void @reset() {
%1 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 27)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%cc\00"
define void @reset() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 27)
ret void
}
/* Variables and functions */
int mgsort_intern(void *, int, int, int, int,
                  int (*)(void const *, void const *));
int mgsort(void *data, int size, int esize,
           int (*compare)(const void *key1, const void *key2)) {
  int i = 0;
  int k = size - 1;
  return mgsort_intern(data, size, esize, i, k, compare);
}


x86 assembly (clang, -O0):
<mgsort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
mov    -0x18(%rbp),%r9
call   1030 <mgsort_intern@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mgsort>:
mov    %rcx,%r9
lea    -0x1(%rsi),%r8d
xor    %ecx,%ecx
jmp    1030 <mgsort_intern@plt>

LLVM IR (-O0):
define i32 @mgsort(i8* %0, i32 %1, i32 %2, i32 (i8*, i8*)* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32 (i8*, i8*)*
%9 = alloca i32
%10 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 (i8*, i8*)* %3, i32 (i8*, i8*)** %8
store i32 0, i32* %9
%11 = load i32, i32* %6
%12 = sub nsw i32 %11, 1
store i32 %12, i32* %10
%13 = load i8*, i8** %5
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = load i32, i32* %9
%17 = load i32, i32* %10
%18 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %8
%19 = call i32 @mgsort_intern(i8* %13, i32 %14, i32 %15, i32 %16, i32 %17, i32 (i8*, i8*)* %18)
ret i32 %19
}

LLVM IR (-O2):
define i32 @mgsort(i8* %0, i32 %1, i32 %2, i32 (i8*, i8*)* %3) {
%5 = add nsw i32 %1, -1
%6 = tail call i32 @mgsort_intern(i8* %0, i32 %1, i32 %2, i32 0, i32 %5, i32 (i8*, i8*)* %3)
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int /*<<< orphan*/ getgid();
__attribute__((__weak__, __always___)) gid_t softboundcets_getgid(void) {
  return getgid();
}


x86 assembly (clang, -O0):
<softboundcets_getgid>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getgid@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_getgid>:
xor    %eax,%eax
jmp    1030 <getgid@plt>

LLVM IR (-O0):
define weak i32 @softboundcets_getgid() {
%1 = call i32 (...) @getgid()
ret i32 %1
}

LLVM IR (-O2):
define weak i32 @softboundcets_getgid() {
%1 = tail call i32 (...) @getgid()
ret i32 %1
}
I0RX1(r0, r1, x0, x1, p0, p1) double r0, r1;
double *p0, *p1;
{
  if (22 <= (p1[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<I0RX1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
mov    %edi,-0x1c(%rbp)
mov    %esi,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    -0x30(%rbp),%rax
movslq -0x20(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
movsd  0xecf(%rip),%xmm1
ucomisd %xmm1,%xmm0
jb     1147 <I0RX1+0x47>
movl   $0x1,-0x4(%rbp)
jmp    114e <I0RX1+0x4e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I0RX1>:
movslq %esi,%rax
movsd  (%rcx,%rax,8),%xmm0
xor    %eax,%eax
ucomisd 0xeee(%rip),%xmm0
setae  %al
ret

LLVM IR (-O0):
define i32 @I0RX1(double %0, double %1, i32 %2, i32 %3, double* %4, double* %5) {
%7 = alloca i32
%8 = alloca double
%9 = alloca double
%10 = alloca i32
%11 = alloca i32
%12 = alloca double*
%13 = alloca double*
store double %0, double* %8
store double %1, double* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store double* %4, double** %12
store double* %5, double** %13
%14 = load double*, double** %13
%15 = load i32, i32* %11
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds double, double* %14, i64 %16
%18 = load double, double* %17
%19 = fcmp ole double 2.200000e+01, %18
br i1 %19, label %20, label %21
20: ; preds = %6
store i32 1, i32* %7
br label %22
21: ; preds = %6
store i32 0, i32* %7
br label %22
22: ; preds = %21, %20
%23 = load i32, i32* %7
ret i32 %23
}

LLVM IR (-O2):
define i32 @I0RX1(double %0, double %1, i32 %2, i32 %3, double* nocapture readnone %4, double* nocapture %5) {
%7 = sext i32 %3 to i64
%8 = getelementptr inbounds double, double* %5, i64 %7
%9 = load double, double* %8
%10 = fcmp oge double %9, 2.200000e+01
%11 = zext i1 %10 to i32
ret i32 %11
}
long func1(int reg, int *is_zero) {
  long value;
  __asm__(" #foo %0" : "+r"(reg));
  value = ((long)reg) << 4;
  if (!value)
    *is_zero = 1;
  return value;
}


x86 assembly (clang, -O0):
<func1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x4,%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1132 <func1+0x32>
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func1>:
test   %edi,%edi
jne    110a <func1+0xa>
movl   $0x1,(%rsi)
movslq %edi,%rax
shl    $0x4,%rax
ret

LLVM IR (-O0):
define i64 @func1(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i64
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32, i32* %3
%7 = call i32 asm " #foo $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = sext i32 %8 to i64
%10 = shl i64 %9, 4
store i64 %10, i64* %5
%11 = load i64, i64* %5
%12 = icmp ne i64 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %2
%14 = load i32*, i32** %4
store i32 1, i32* %14
br label %15
15: ; preds = %13, %2
%16 = load i64, i64* %5
ret i64 %16
}

LLVM IR (-O2):
define i64 @func1(i32 %0, i32* nocapture writeonly %1) {
%3 = tail call i32 asm " #foo $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i32 %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %2
store i32 1, i32* %1
br label %6
6: ; preds = %5, %2
%7 = sext i32 %3 to i64
%8 = shl nsw i64 %7, 4
ret i64 %8
}
int blahblah() {
  int x = 53;
  return x;
}


x86 assembly (clang, -O0):
<blahblah>:
push   %rbp
mov    %rsp,%rbp
movl   $0x35,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blahblah>:
mov    $0x35,%eax
ret

LLVM IR (-O0):
define i32 @blahblah() {
%1 = alloca i32
store i32 53, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @blahblah() {
ret i32 53
}
/* Variables and functions */
int /*<<< orphan*/ taskSwitch(int /*<<< orphan*/);
void switcher(int sig) { taskSwitch(0); }


x86 assembly (clang, -O0):
<switcher>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %edi,%edi
call   1030 <taskSwitch@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<switcher>:
xor    %edi,%edi
jmp    1030 <taskSwitch@plt>

LLVM IR (-O0):
define void @switcher(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @taskSwitch(i32 0)
ret void
}

LLVM IR (-O2):
define void @switcher(i32 %0) {
%2 = tail call i32 @taskSwitch(i32 0)
ret void
}
void foo590() {}


x86 assembly (clang, -O0):
<foo590>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo590>:
ret

LLVM IR (-O0):
define void @foo590() {
ret void
}

LLVM IR (-O2):
define void @foo590() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_short;
typedef scalar_t__ u_int;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
int __profil(u_short *sample_buffer, size_t size, size_t offset, u_int scale) {
  if (scale == 0)
    return 0;
  __set_errno(ENOSYS);
  return -1;
}


x86 assembly (clang, -O0):
<__profil>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
jne    113f <__profil+0x2f>
movl   $0x0,-0x4(%rbp)
jmp    1154 <__profil+0x44>
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__profil>:
test   %rcx,%rcx
je     112e <__profil+0x1e>
push   %rax
mov    0x2ecb(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
add    $0x8,%rsp
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @__profil(i32* %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
store i32* %0, i32** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i64 %3, i64* %9
%10 = load i64, i64* %9
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %4
store i32 0, i32* %5
br label %16
13: ; preds = %4
%14 = load i32, i32* @ENOSYS
%15 = call i32 @__set_errno(i32 %14)
store i32 -1, i32* %5
br label %16
16: ; preds = %13, %12
%17 = load i32, i32* %5
ret i32 %17
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @__profil(i32* nocapture readnone %0, i64 %1, i64 %2, i64 %3) {
%5 = icmp eq i64 %3, 0
br i1 %5, label %9, label %6
6: ; preds = %4
%7 = load i32, i32* @ENOSYS
%8 = tail call i32 @__set_errno(i32 %7)
br label %9
9: ; preds = %4, %6
%10 = phi i32 [ -1, %6 ], [ 0, %4 ]
ret i32 %10
}
/* Variables and functions */
scalar_t__ lqrand();
unsigned int qrand() { return (unsigned int)lqrand(); }


x86 assembly (clang, -O0):
<qrand>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <lqrand@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<qrand>:
xor    %eax,%eax
jmp    1030 <lqrand@plt>

LLVM IR (-O0):
define i32 @qrand() {
%1 = call i64 (...) @lqrand()
%2 = trunc i64 %1 to i32
ret i32 %2
}

LLVM IR (-O2):
define i32 @qrand() {
%1 = tail call i64 (...) @lqrand()
%2 = trunc i64 %1 to i32
ret i32 %2
}
float spring(float cfm, float erp, float s) { return ((erp) / (cfm) / s); }


x86 assembly (clang, -O0):
<spring>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
divss  -0x4(%rbp),%xmm0
divss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<spring>:
divss  %xmm0,%xmm1
divss  %xmm2,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @spring(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %5
%8 = load float, float* %4
%9 = fdiv float %7, %8
%10 = load float, float* %6
%11 = fdiv float %9, %10
ret float %11
}

LLVM IR (-O2):
define float @spring(float %0, float %1, float %2) {
%4 = fdiv float %1, %0
%5 = fdiv float %4, %2
ret float %5
}
int swab32(int val) {
  return (((val >> 24) & 0xFF) | ((val >> 8) & 0xFF00) | ((val & 0xFF00) << 8) |
          ((val & 0xFF) << 24));
}


x86 assembly (clang, -O0):
<swab32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
and    $0xff,%eax
mov    -0x4(%rbp),%ecx
sar    $0x8,%ecx
and    $0xff00,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swab32>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @swab32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 24
%5 = and i32 %4, 255
%6 = load i32, i32* %2
%7 = ashr i32 %6, 8
%8 = and i32 %7, 65280
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 65280
%12 = shl i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, 255
%16 = shl i32 %15, 24
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @swab32(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
int getPositionInAlphabet_While(char c) {
  int offset = 0;
  while (offset < 26) {
    if ('a' + offset == c) {
      break;
    }
    offset++;
  }
  if (offset == 26) {
    return -1;
  }
  return offset + 1;
}


x86 assembly (clang, -O0):
<getPositionInAlphabet_While>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1a,-0xc(%rbp)
jge    1140 <getPositionInAlphabet_While+0x40>
mov    -0xc(%rbp),%eax
add    $0x61,%eax
movsbl -0x5(%rbp),%ecx
cmp    %ecx,%eax
jne    1132 <getPositionInAlphabet_While+0x32>
jmp    1140 <getPositionInAlphabet_While+0x40>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1111 <getPositionInAlphabet_While+0x11>
cmpl   $0x1a,-0xc(%rbp)
jne    1156 <getPositionInAlphabet_While+0x56>
movl   $0xffffffff,-0x4(%rbp)
jmp    115f <getPositionInAlphabet_While+0x5f>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getPositionInAlphabet_While>:
mov    %edi,%eax
add    $0xffffff9f,%eax
cmp    $0x19,%eax
mov    $0x19,%ecx
cmovb  %eax,%ecx
lea    -0x61(%rdi),%eax
lea    0x1(%rcx),%edx
lea    0x2(%rcx),%esi
cmp    $0x1a,%al
cmovb  %edx,%esi
cmovae %edx,%ecx
cmp    $0x1a,%ecx
mov    $0xffffffff,%eax
cmovne %esi,%eax
ret

LLVM IR (-O0):
define i32 @getPositionInAlphabet_While(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
%4 = alloca i32
store i8 %0, i8* %3
store i32 0, i32* %4
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 26
br i1 %7, label %8, label %18
8: ; preds = %5
%9 = load i32, i32* %4
%10 = add nsw i32 97, %9
%11 = load i8, i8* %3
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %10, %12
br i1 %13, label %14, label %15
14: ; preds = %8
br label %18
15: ; preds = %8
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
store i32 %17, i32* %4
br label %5
18: ; preds = %14, %5
%19 = load i32, i32* %4
%20 = icmp eq i32 %19, 26
br i1 %20, label %21, label %22
21: ; preds = %18
store i32 -1, i32* %2
br label %25
22: ; preds = %18
%23 = load i32, i32* %4
%24 = add nsw i32 %23, 1
store i32 %24, i32* %2
br label %25
25: ; preds = %22, %21
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @getPositionInAlphabet_While(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -97
%4 = call i32 @llvm.umin.i32(i32 %3, i32 25)
%5 = add nuw nsw i32 %4, 1
%6 = add i8 %0, -97
%7 = icmp ult i8 %6, 26
%8 = add nuw nsw i32 %4, 2
%9 = select i1 %7, i32 %5, i32 %8
%10 = select i1 %7, i32 %4, i32 %5
%11 = icmp eq i32 %10, 26
%12 = select i1 %11, i32 -1, i32 %9
ret i32 %12
}
void PDMCritSectIsOwned(void) {}


x86 assembly (clang, -O0):
<PDMCritSectIsOwned>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PDMCritSectIsOwned>:
ret

LLVM IR (-O0):
define void @PDMCritSectIsOwned() {
ret void
}

LLVM IR (-O2):
define void @PDMCritSectIsOwned() {
ret void
}
/* Variables and functions */
char *dtx_utf8_next_char(char *);
int dtx_utf8_char_count(const char *str) {
  int n = 0;
  while (*str) {
    ++n;
    str = dtx_utf8_next_char((char *)str);
  }
  return n;
}


x86 assembly (clang, -O0):
<dtx_utf8_char_count>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114b <dtx_utf8_char_count+0x3b>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dtx_utf8_next_char@plt>
mov    %rax,-0x8(%rbp)
jmp    1123 <dtx_utf8_char_count+0x13>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dtx_utf8_char_count>:
push   %rbx
cmpb   $0x0,(%rdi)
je     1132 <dtx_utf8_char_count+0x22>
mov    %rdi,%rax
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
add    $0x1,%ebx
mov    %rax,%rdi
call   1030 <dtx_utf8_next_char@plt>
cmpb   $0x0,(%rax)
jne    1120 <dtx_utf8_char_count+0x10>
jmp    1134 <dtx_utf8_char_count+0x24>
xor    %ebx,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @dtx_utf8_char_count(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %8, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %13
8: ; preds = %4
%9 = load i32, i32* %3
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
%11 = load i8*, i8** %2
%12 = call i8* @dtx_utf8_next_char(i8* %11)
store i8* %12, i8** %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @dtx_utf8_char_count(i8* %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %7, %4 ], [ 0, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = add nuw nsw i32 %5, 1
%8 = tail call i8* @dtx_utf8_next_char(i8* %6)
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %12
}
int findSharedSymbol(void *object, const char *symbol, const void **address) {
  return 0;
}


x86 assembly (clang, -O0):
<findSharedSymbol>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<findSharedSymbol>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @findSharedSymbol(i8* %0, i8* %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8**
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8** %2, i8*** %6
ret i32 0
}

LLVM IR (-O2):
define i32 @findSharedSymbol(i8* nocapture readnone %0, i8* nocapture readnone %1, i8** nocapture readnone %2) {
ret i32 0
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int const *);
int const *label_is_pointer(int const *);
uint16_t label_pointer_location(const uint8_t *label) {
  assert(label);
  assert(label_is_pointer(label));
  return ((uint16_t)(label[0] & ~0xc0) << 8) | (uint16_t)label[1];
}


x86 assembly (clang, -O0):
<label_pointer_location>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rdi
call   1040 <label_is_pointer@plt>
mov    %rax,%rdi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0xffffff3f,%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
or     0x4(%rcx),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<label_pointer_location>:
push   %rbx
mov    %rdi,%rbx
call   1030 <assert@plt>
mov    %rbx,%rdi
call   1040 <label_is_pointer@plt>
mov    %rax,%rdi
call   1030 <assert@plt>
mov    (%rbx),%eax
shl    $0x8,%eax
and    $0xffff3f00,%eax
or     0x4(%rbx),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @label_pointer_location(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @assert(i32* %3)
%5 = load i32*, i32** %2
%6 = call i32* @label_is_pointer(i32* %5)
%7 = call i32 @assert(i32* %6)
%8 = load i32*, i32** %2
%9 = getelementptr inbounds i32, i32* %8, i64 0
%10 = load i32, i32* %9
%11 = and i32 %10, -193
%12 = shl i32 %11, 8
%13 = load i32*, i32** %2
%14 = getelementptr inbounds i32, i32* %13, i64 1
%15 = load i32, i32* %14
%16 = or i32 %12, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @label_pointer_location(i32* %0) {
%2 = tail call i32 @assert(i32* %0)
%3 = tail call i32* @label_is_pointer(i32* %0)
%4 = tail call i32 @assert(i32* %3)
%5 = load i32, i32* %0
%6 = shl i32 %5, 8
%7 = and i32 %6, -49408
%8 = getelementptr inbounds i32, i32* %0, i64 1
%9 = load i32, i32* %8
%10 = or i32 %7, %9
ret i32 %10
}