xunge/DecIR huggingface dataset:
void JmpS() {}


x86 assembly (clang, -O0):
<JmpS>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<JmpS>:
ret

LLVM IR (-O0):
define void @JmpS() {
ret void
}

LLVM IR (-O2):
define void @JmpS() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, float *);
void main() {
  float num;
  printf("Ingrese un numero\n");
  scanf("%f", &num);
  printf("El cuadrado del numero es : %f\n El cubo del numero es: %e\n",
         num * num, num * num * num);
  return;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xed6(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0x4(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
lea    0xea8(%rip),%rdi
mov    $0x2,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xf06(%rip),%rdi
call   1030 <puts@plt>
lea    0xebc(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
movss  0x4(%rsp),%xmm1
movaps %xmm1,%xmm2
mulss  %xmm1,%xmm2
cvtss2sd %xmm2,%xmm0
mulss  %xmm1,%xmm2
xorps  %xmm1,%xmm1
cvtss2sd %xmm2,%xmm1
lea    0xe92(%rip),%rdi
mov    $0x2,%al
call   1040 <printf@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Ingrese un numero\0A\00"
@.str.1 = [3 x i8] c"%f\00"
@.str.2 = [59 x i8] c"El cuadrado del numero es : %f\0A El cubo del numero es: %e\0A\00"
define void @main() {
%1 = alloca float
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), float* %1)
%4 = load float, float* %1
%5 = load float, float* %1
%6 = fmul float %4, %5
%7 = fpext float %6 to double
%8 = load float, float* %1
%9 = load float, float* %1
%10 = fmul float %8, %9
%11 = load float, float* %1
%12 = fmul float %10, %11
%13 = fpext float %12 to double
%14 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str.2, i64 0, i64 0), double %7, double %13)
ret void
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%f\00"
@.str.2 = [59 x i8] c"El cuadrado del numero es : %f\0A El cubo del numero es: %e\0A\00"
@str = [18 x i8] c"Ingrese un numero\00"
define void @main() {
%1 = alloca float
%2 = bitcast float* %1 to i8*
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), float* %1)
%5 = load float, float* %1
%6 = fmul float %5, %5
%7 = fpext float %6 to double
%8 = fmul float %5, %6
%9 = fpext float %8 to double
%10 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([59 x i8], [59 x i8]* @.str.2, i64 0, i64 0), double %7, double %9)
ret void
}
void foo663() {}


x86 assembly (clang, -O0):
<foo663>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo663>:
ret

LLVM IR (-O0):
define void @foo663() {
ret void
}

LLVM IR (-O2):
define void @foo663() {
ret void
}
unsigned xrop3_149_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = T & S;
  stk1 = D ^ stk2;
  stk1 = ~stk1;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_149_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_149_1_1>:
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
or     %edi,%esi
not    %edi
shl    $0x8,%edi
not    %eax
and    %edi,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_149_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %7
%23 = load i32, i32* %6
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %5
%26 = load i32, i32* %9
%27 = xor i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = xor i32 %28, -1
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %7
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = load i32, i32* %5
%38 = load i32, i32* %6
%39 = and i32 %37, %38
%40 = or i32 %36, %39
%41 = load i32, i32* %5
%42 = load i32, i32* %7
%43 = and i32 %41, %42
%44 = or i32 %40, %43
ret i32 %44
}

LLVM IR (-O2):
define i32 @xrop3_149_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = zext i8 %1 to i32
%5 = mul nuw nsw i32 %4, 257
%6 = xor i32 %3, -1
%7 = shl nsw i32 %6, 8
%8 = xor i32 %5, -1
%9 = and i32 %7, %8
%10 = or i8 %1, %0
%11 = zext i8 %10 to i32
%12 = or i32 %9, %11
ret i32 %12
}
/* Variables and functions */
int lwm2m_float64ToPlainText(double, char **);
int lwm2m_float32ToPlainText(float data, char **bufferP) {
  return lwm2m_float64ToPlainText((double)data, bufferP);
}


x86 assembly (clang, -O0):
<lwm2m_float32ToPlainText>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    %rdi,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
mov    -0x10(%rbp),%rdi
call   1030 <lwm2m_float64ToPlainText@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lwm2m_float32ToPlainText>:
cvtss2sd %xmm0,%xmm0
jmp    1030 <lwm2m_float64ToPlainText@plt>

LLVM IR (-O0):
define i32 @lwm2m_float32ToPlainText(float %0, i8** %1) {
%3 = alloca float
%4 = alloca i8**
store float %0, float* %3
store i8** %1, i8*** %4
%5 = load float, float* %3
%6 = fpext float %5 to double
%7 = load i8**, i8*** %4
%8 = call i32 @lwm2m_float64ToPlainText(double %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @lwm2m_float32ToPlainText(float %0, i8** %1) {
%3 = fpext float %0 to double
%4 = tail call i32 @lwm2m_float64ToPlainText(double %3, i8** %1)
ret i32 %4
}
unsigned long LPCIRQGet(unsigned long ulBase) {
  ;
  return ((*((volatile unsigned long *)(ulBase + 0x0000000C))));
}


x86 assembly (clang, -O0):
<LPCIRQGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LPCIRQGet>:
mov    0xc(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @LPCIRQGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 12
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @LPCIRQGet(i64 %0) {
%2 = add i64 %0, 12
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
ret i64 %4
}
intsize() { return (2); }


x86 assembly (clang, -O0):
<intsize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intsize>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @intsize() {
ret i32 2
}

LLVM IR (-O2):
define i32 @intsize() {
ret i32 2
}
/* Variables and functions */
int random();
int skiplist_random_level(void) {
  int level = 1;
  while ((random() & 0xFFFF) < (0.25 * 0xFFFF)) {
    level += 1;
  }
  return level < 16 ? level : 16;
}


x86 assembly (clang, -O0):
<skiplist_random_level>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    $0x0,%al
call   1030 <random@plt>
and    $0xffff,%eax
cvtsi2sd %eax,%xmm1
movsd  0xec9(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    114f <skiplist_random_level+0x3f>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <skiplist_random_level+0xf>
cmpl   $0x10,-0x4(%rbp)
jge    1164 <skiplist_random_level+0x54>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1171 <skiplist_random_level+0x61>
mov    $0x10,%eax
mov    %eax,-0x8(%rbp)
jmp    1171 <skiplist_random_level+0x61>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<skiplist_random_level>:
push   %rbx
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
xor    %eax,%eax
call   1030 <random@plt>
add    $0x1,%ebx
test   $0xc000,%eax
je     1120 <skiplist_random_level+0x10>
cmp    $0x10,%ebx
mov    $0x10,%eax
cmovb  %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @skiplist_random_level() {
%1 = alloca i32
store i32 1, i32* %1
br label %2
2: ; preds = %7, %0
%3 = call i32 (...) @random()
%4 = and i32 %3, 65535
%5 = sitofp i32 %4 to double
%6 = fcmp olt double %5, 0x40CFFFE000000000
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %2
10: ; preds = %2
%11 = load i32, i32* %1
%12 = icmp slt i32 %11, 16
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = load i32, i32* %1
br label %16
15: ; preds = %10
br label %16
16: ; preds = %15, %13
%17 = phi i32 [ %14, %13 ], [ 16, %15 ]
ret i32 %17
}

LLVM IR (-O2):
define i32 @skiplist_random_level() {
br label %1
1: ; preds = %1, %0
%2 = phi i32 [ 1, %0 ], [ %6, %1 ]
%3 = tail call i32 (...) @random()
%4 = and i32 %3, 49152
%5 = icmp eq i32 %4, 0
%6 = add nuw nsw i32 %2, 1
br i1 %5, label %1, label %7
7: ; preds = %1
%8 = icmp ult i32 %2, 16
%9 = select i1 %8, i32 %2, i32 16
ret i32 %9
}
int get_number_of_cycles_for_delay(unsigned int delay) {
  return (650000000 * delay / (2 * 1000));
}


x86 assembly (clang, -O0):
<get_number_of_cycles_for_delay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x26be3680,-0x4(%rbp),%eax
mov    $0x7d0,%ecx
xor    %edx,%edx
div    %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_number_of_cycles_for_delay>:
imul   $0x26be3680,%edi,%eax
imul   $0x10624dd3,%rax,%rax
shr    $0x27,%rax
ret

LLVM IR (-O0):
define i32 @get_number_of_cycles_for_delay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul i32 650000000, %3
%5 = udiv i32 %4, 2000
ret i32 %5
}

LLVM IR (-O2):
define i32 @get_number_of_cycles_for_delay(i32 %0) {
%2 = mul i32 %0, 650000000
%3 = udiv i32 %2, 2000
ret i32 %3
}
/* Variables and functions */
scalar_t__ strcasecmp(char const *, char const *);
bool strcase_eq(const char *s1, const char *s2) {
  return strcasecmp(s1, s2) == 0;
}


x86 assembly (clang, -O0):
<strcase_eq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcasecmp@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcase_eq>:
push   %rax
call   1030 <strcasecmp@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @strcase_eq(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i64 @strcasecmp(i8* %5, i8* %6)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @strcase_eq(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i64 @strcasecmp(i8* %0, i8* %1)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int exor(int, int);
int *malloc(int);
int *half_subtractor(int a, int b) {
  int *arr = malloc(sizeof(int) * 2);
  int diff, borrow;
  diff = exor(a, b);
  borrow = !a & b;
  *(arr + 0) = diff;
  *(arr + 1) = borrow;
  return arr;
}


x86 assembly (clang, -O0):
<half_subtractor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x8,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <exor@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
and    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<half_subtractor>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %edi,%ebp
mov    $0x8,%edi
call   1030 <malloc@plt>
mov    %rax,%rbx
mov    %ebp,%edi
mov    %r14d,%esi
call   1040 <exor@plt>
xor    %ecx,%ecx
test   %ebp,%ebp
sete   %cl
and    %r14d,%ecx
mov    %eax,(%rbx)
mov    %ecx,0x4(%rbx)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32* @half_subtractor(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = call i32* @malloc(i32 8)
store i32* %8, i32** %5
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = call i32 @exor(i32 %9, i32 %10)
store i32 %11, i32* %6
%12 = load i32, i32* %3
%13 = icmp ne i32 %12, 0
%14 = xor i1 %13, true
%15 = zext i1 %14 to i32
%16 = load i32, i32* %4
%17 = and i32 %15, %16
store i32 %17, i32* %7
%18 = load i32, i32* %6
%19 = load i32*, i32** %5
%20 = getelementptr inbounds i32, i32* %19, i64 0
store i32 %18, i32* %20
%21 = load i32, i32* %7
%22 = load i32*, i32** %5
%23 = getelementptr inbounds i32, i32* %22, i64 1
store i32 %21, i32* %23
%24 = load i32*, i32** %5
ret i32* %24
}

LLVM IR (-O2):
define noalias i32* @half_subtractor(i32 %0, i32 %1) {
%3 = tail call i32* @malloc(i32 8)
%4 = tail call i32 @exor(i32 %0, i32 %1)
%5 = icmp eq i32 %0, 0
%6 = zext i1 %5 to i32
%7 = and i32 %6, %1
store i32 %4, i32* %3
%8 = getelementptr inbounds i32, i32* %3, i64 1
store i32 %7, i32* %8
ret i32* %3
}
/* Type definitions */
typedef scalar_t__ va_list;

/* Variables and functions */
void TagTrivInit(void *tag, va_list args) {
  ((void)tag);
  ((void)args);
}


x86 assembly (clang, -O0):
<TagTrivInit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TagTrivInit>:
ret

LLVM IR (-O0):
define void @TagTrivInit(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
ret void
}

LLVM IR (-O2):
define void @TagTrivInit(i8* nocapture %0, i64 %1) {
ret void
}
int getFileName(char fileName) {
  char fileOpen[50];
  printf("enter filename and extension to scramble.\n");
  scanf("%s", fileOpen);
  return fileOpen;
}


x86 assembly (clang, -O0):
<getFileName>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
lea    0xecb(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x40(%rbp),%rsi
lea    0xee4(%rip),%rdi
mov    $0x0,%al
call   1040 <scanf@plt>
lea    -0x40(%rbp),%rax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getFileName>:
push   %rbx
sub    $0x40,%rsp
lea    0xed7(%rip),%rdi
call   1030 <puts@plt>
lea    0xec8(%rip),%rdi
mov    %rsp,%rbx
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <scanf@plt>
mov    %ebx,%eax
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [43 x i8] c"enter filename and extension to scramble.\0A\00"
@.str.1 = [3 x i8] c"%s\00"
define i32 @getFileName(i8 signext %0) {
%2 = alloca i8
%3 = alloca [50 x i8]
store i8 %0, i8* %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
%5 = getelementptr inbounds [50 x i8], [50 x i8]* %3, i64 0, i64 0
%6 = call i32 (i8*, ...) @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %5)
%7 = getelementptr inbounds [50 x i8], [50 x i8]* %3, i64 0, i64 0
%8 = ptrtoint i8* %7 to i32
ret i32 %8
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%s\00"
@str = [42 x i8] c"enter filename and extension to scramble.\00"
define i32 @getFileName(i8 signext %0) {
%2 = alloca [50 x i8]
%3 = getelementptr inbounds [50 x i8], [50 x i8]* %2, i64 0, i64 0
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([42 x i8], [42 x i8]* @str, i64 0, i64 0))
%5 = call i32 (i8*, ...) @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8* %3)
%6 = ptrtoint [50 x i8]* %2 to i64
%7 = trunc i64 %6 to i32
ret i32 %7
}
void *__emutls_get_address(struct __emutls_object *obj) {}


x86 assembly (clang, -O0):
<__emutls_get_address>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__emutls_get_address>:
ret

LLVM IR (-O0):
%struct.__emutls_object = type opaque
define i8* @__emutls_get_address(%struct.__emutls_object* %0) {
%2 = alloca i8*
%3 = alloca %struct.__emutls_object*
store %struct.__emutls_object* %0, %struct.__emutls_object** %3
%4 = load i8*, i8** %2
ret i8* %4
}

LLVM IR (-O2):
%struct.__emutls_object = type opaque
define noalias i8* @__emutls_get_address(%struct.__emutls_object* nocapture readnone %0) {
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ insert(int **, int, int);
int /*<<< orphan*/ print(int **, int, int);
main() {
  int a[3][4];
  int row, col, i, j;
  row = sizeof a / sizeof *a;
  col = sizeof *a / sizeof **a;
  insert(a, row, col);
  print(a, row, col);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x3,-0x34(%rbp)
movl   $0x4,-0x38(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%esi
mov    -0x38(%rbp),%edx
call   1040 <insert@plt>
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%esi
mov    -0x38(%rbp),%edx
call   1030 <print@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x30,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x3,%esi
mov    $0x4,%edx
call   1040 <insert@plt>
mov    %rbx,%rdi
mov    $0x3,%esi
mov    $0x4,%edx
call   1030 <print@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca [3 x [4 x i32]]
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 3, i32* %2
store i32 4, i32* %3
%6 = getelementptr inbounds [3 x [4 x i32]], [3 x [4 x i32]]* %1, i64 0, i64 0
%7 = bitcast [4 x i32]* %6 to i32**
%8 = load i32, i32* %2
%9 = load i32, i32* %3
%10 = call i32 @insert(i32** %7, i32 %8, i32 %9)
%11 = getelementptr inbounds [3 x [4 x i32]], [3 x [4 x i32]]* %1, i64 0, i64 0
%12 = bitcast [4 x i32]* %11 to i32**
%13 = load i32, i32* %2
%14 = load i32, i32* %3
%15 = call i32 @print(i32** %12, i32 %13, i32 %14)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [3 x [4 x i32]]
%2 = bitcast [3 x [4 x i32]]* %1 to i8*
%3 = bitcast [3 x [4 x i32]]* %1 to i32**
%4 = call i32 @insert(i32** %3, i32 3, i32 4)
%5 = call i32 @print(i32** %3, i32 3, i32 4)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Base64encode(char *, char const *, int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ strlen(char const *);
void testEncode(const char *string) {
  char encoded[1024];
  Base64encode(encoded, string, strlen(string));
  printf("%s\n", encoded);
}


x86 assembly (clang, -O0):
<testEncode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x420,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x410(%rbp),%rax
mov    %rax,-0x420(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x418(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x420(%rbp),%rdi
mov    -0x418(%rbp),%rsi
mov    %eax,%edx
call   1030 <Base64encode@plt>
lea    -0x410(%rbp),%rsi
lea    0xe7c(%rip),%rdi
call   1050 <printf@plt>
add    $0x420,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testEncode>:
push   %r14
push   %rbx
sub    $0x408,%rsp
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    %rsp,%r14
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <Base64encode@plt>
lea    0xea7(%rip),%rdi
mov    %r14,%rsi
call   1050 <printf@plt>
add    $0x408,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @testEncode(i8* %0) {
%2 = alloca i8*
%3 = alloca [1024 x i8]
store i8* %0, i8** %2
%4 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%5 = load i8*, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @strlen(i8* %6)
%8 = call i32 @Base64encode(i8* %4, i8* %5, i32 %7)
%9 = getelementptr inbounds [1024 x i8], [1024 x i8]* %3, i64 0, i64 0
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @testEncode(i8* %0) {
%2 = alloca [1024 x i8]
%3 = getelementptr inbounds [1024 x i8], [1024 x i8]* %2, i64 0, i64 0
%4 = tail call i32 @strlen(i8* %0)
%5 = call i32 @Base64encode(i8* %3, i8* %0, i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ enableADC();
int /*<<< orphan*/ setupADC();
int /*<<< orphan*/ setupGenericClock();
int /*<<< orphan*/ setupInterrupt(int /*<<< orphan*/);
int /*<<< orphan*/ setupReadPin();
extern void startSampling() {
  setupReadPin();
  setupGenericClock();
  setupADC();
  setupInterrupt(0);
  enableADC();
}


x86 assembly (clang, -O0):
<startSampling>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <setupReadPin@plt>
mov    $0x0,%al
call   1070 <setupGenericClock@plt>
mov    $0x0,%al
call   1050 <setupADC@plt>
xor    %edi,%edi
call   1060 <setupInterrupt@plt>
mov    $0x0,%al
call   1030 <enableADC@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<startSampling>:
push   %rax
xor    %eax,%eax
call   1040 <setupReadPin@plt>
xor    %eax,%eax
call   1070 <setupGenericClock@plt>
xor    %eax,%eax
call   1050 <setupADC@plt>
xor    %edi,%edi
call   1060 <setupInterrupt@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <enableADC@plt>

LLVM IR (-O0):
define void @startSampling() {
%1 = call i32 (...) @setupReadPin()
%2 = call i32 (...) @setupGenericClock()
%3 = call i32 (...) @setupADC()
%4 = call i32 @setupInterrupt(i32 0)
%5 = call i32 (...) @enableADC()
ret void
}

LLVM IR (-O2):
define void @startSampling() {
%1 = tail call i32 (...) @setupReadPin()
%2 = tail call i32 (...) @setupGenericClock()
%3 = tail call i32 (...) @setupADC()
%4 = tail call i32 @setupInterrupt(i32 0)
%5 = tail call i32 (...) @enableADC()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PinConfigSet(unsigned long, int, int);
int /*<<< orphan*/ PinModeSet(unsigned long, unsigned long);
void PinTypeCamera(unsigned long ulPin, unsigned long ulPinMode) {
  PinModeSet(ulPin, ulPinMode);
  PinConfigSet(ulPin, 0x00000020 | 0x00000040, 0x00000000);
}


x86 assembly (clang, -O0):
<PinTypeCamera>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <PinModeSet@plt>
mov    -0x8(%rbp),%rdi
mov    $0x60,%esi
xor    %edx,%edx
call   1040 <PinConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PinTypeCamera>:
push   %rbx
mov    %rdi,%rbx
call   1030 <PinModeSet@plt>
mov    %rbx,%rdi
mov    $0x60,%esi
xor    %edx,%edx
pop    %rbx
jmp    1040 <PinConfigSet@plt>

LLVM IR (-O0):
define void @PinTypeCamera(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @PinModeSet(i64 %5, i64 %6)
%8 = load i64, i64* %3
%9 = call i32 @PinConfigSet(i64 %8, i32 96, i32 0)
ret void
}

LLVM IR (-O2):
define void @PinTypeCamera(i64 %0, i64 %1) {
%3 = tail call i32 @PinModeSet(i64 %0, i64 %1)
%4 = tail call i32 @PinConfigSet(i64 %0, i32 96, i32 0)
ret void
}
void splitDouble(double d, int sides[2]) {
  sides[0] = d;
  sides[1] = (1 + (d - sides[0])) * 1000000;
}


x86 assembly (clang, -O0):
<splitDouble>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
cvttsd2si -0x8(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
movsd  -0x8(%rbp),%xmm1
mov    -0x10(%rbp),%rax
cvtsi2sdl (%rax),%xmm0
subsd  %xmm0,%xmm1
movsd  0xed7(%rip),%xmm0
addsd  %xmm1,%xmm0
movsd  0xec3(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<splitDouble>:
cvttsd2si %xmm0,%eax
cvttpd2dq %xmm0,%xmm1
cvtdq2pd %xmm1,%xmm1
subsd  %xmm1,%xmm0
addsd  0xee8(%rip),%xmm0
mulsd  0xee8(%rip),%xmm0
mov    %eax,(%rdi)
cvttsd2si %xmm0,%eax
mov    %eax,0x4(%rdi)
ret

LLVM IR (-O0):
define void @splitDouble(double %0, i32* %1) {
%3 = alloca double
%4 = alloca i32*
store double %0, double* %3
store i32* %1, i32** %4
%5 = load double, double* %3
%6 = fptosi double %5 to i32
%7 = load i32*, i32** %4
%8 = getelementptr inbounds i32, i32* %7, i64 0
store i32 %6, i32* %8
%9 = load double, double* %3
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i64 0
%12 = load i32, i32* %11
%13 = sitofp i32 %12 to double
%14 = fsub double %9, %13
%15 = fadd double 1.000000e+00, %14
%16 = fmul double %15, 1.000000e+06
%17 = fptosi double %16 to i32
%18 = load i32*, i32** %4
%19 = getelementptr inbounds i32, i32* %18, i64 1
store i32 %17, i32* %19
ret void
}

LLVM IR (-O2):
define void @splitDouble(double %0, i32* nocapture writeonly %1) {
%3 = fptosi double %0 to i32
store i32 %3, i32* %1
%4 = sitofp i32 %3 to double
%5 = fsub double %0, %4
%6 = fadd double %5, 1.000000e+00
%7 = fmul double %6, 1.000000e+06
%8 = fptosi double %7 to i32
%9 = getelementptr inbounds i32, i32* %1, i64 1
store i32 %8, i32* %9
ret void
}
int Mini_AigLitNotCond(int Lit, int c) { return Lit ^ (int)(c > 0); }


x86 assembly (clang, -O0):
<Mini_AigLitNotCond>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmpl   $0x0,-0x8(%rbp)
setg   %cl
and    $0x1,%cl
movzbl %cl,%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mini_AigLitNotCond>:
xor    %eax,%eax
test   %esi,%esi
setg   %al
xor    %edi,%eax
ret

LLVM IR (-O0):
define i32 @Mini_AigLitNotCond(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 0
%8 = zext i1 %7 to i32
%9 = xor i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @Mini_AigLitNotCond(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
%4 = zext i1 %3 to i32
%5 = xor i32 %4, %0
ret i32 %5
}
int dbg_chk_lpt_sz(struct ubifs_info *c, int action, int len) { return 0; }


x86 assembly (clang, -O0):
<dbg_chk_lpt_sz>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbg_chk_lpt_sz>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.ubifs_info = type opaque
define i32 @dbg_chk_lpt_sz(%struct.ubifs_info* %0, i32 %1, i32 %2) {
%4 = alloca %struct.ubifs_info*
%5 = alloca i32
%6 = alloca i32
store %struct.ubifs_info* %0, %struct.ubifs_info** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.ubifs_info = type opaque
define i32 @dbg_chk_lpt_sz(%struct.ubifs_info* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 0
}
void BUF_MEM_new(void) {}


x86 assembly (clang, -O0):
<BUF_MEM_new>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BUF_MEM_new>:
ret

LLVM IR (-O0):
define void @BUF_MEM_new() {
ret void
}

LLVM IR (-O2):
define void @BUF_MEM_new() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ISA_init(int);
void board_isa_init(void) { ISA_init(0xFE000000); }


x86 assembly (clang, -O0):
<board_isa_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfe000000,%edi
call   1030 <ISA_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<board_isa_init>:
mov    $0xfe000000,%edi
jmp    1030 <ISA_init@plt>

LLVM IR (-O0):
define void @board_isa_init() {
%1 = call i32 @ISA_init(i32 -33554432)
ret void
}

LLVM IR (-O2):
define void @board_isa_init() {
%1 = tail call i32 @ISA_init(i32 -33554432)
ret void
}
void setLift(int power) {}


x86 assembly (clang, -O0):
<setLift>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setLift>:
ret

LLVM IR (-O0):
define void @setLift(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @setLift(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_timeval_rtstore() {
  printf("NOT IMPLEMENTED:"
         "pa_timeval_rtstore"
         "\n");
}


x86 assembly (clang, -O0):
<pa_timeval_rtstore>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_timeval_rtstore>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [36 x i8] c"NOT IMPLEMENTED:pa_timeval_rtstore\0A\00"
define i32 @pa_timeval_rtstore() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [35 x i8] c"NOT IMPLEMENTED:pa_timeval_rtstore\00"
define i32 @pa_timeval_rtstore() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef scalar_t__ uint;

/* Variables and functions */
uint umax(uint a, uint b) { return (a > b) ? a : b; }


x86 assembly (clang, -O0):
<umax>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jle    1127 <umax+0x27>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
jmp    112f <umax+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<umax>:
mov    %rsi,%rax
cmp    %rsi,%rdi
cmovg  %rdi,%rax
ret

LLVM IR (-O0):
define i64 @umax(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp sgt i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load i64, i64* %3
br label %12
10: ; preds = %2
%11 = load i64, i64* %4
br label %12
12: ; preds = %10, %8
%13 = phi i64 [ %9, %8 ], [ %11, %10 ]
ret i64 %13
}

LLVM IR (-O2):
define i64 @umax(i64 %0, i64 %1) {
%3 = icmp sgt i64 %0, %1
%4 = select i1 %3, i64 %0, i64 %1
ret i64 %4
}
void outer_shutdown(void) {}


x86 assembly (clang, -O0):
<outer_shutdown>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outer_shutdown>:
ret

LLVM IR (-O0):
define void @outer_shutdown() {
ret void
}

LLVM IR (-O2):
define void @outer_shutdown() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
int /*<<< orphan*/ WaypointHandle();
void WaypointRequestUpdate() { UAVObjRequestUpdate(WaypointHandle()); }


x86 assembly (clang, -O0):
<WaypointRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <WaypointHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<WaypointRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <WaypointHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @WaypointRequestUpdate() {
%1 = call i32 (...) @WaypointHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @WaypointRequestUpdate() {
%1 = tail call i32 (...) @WaypointHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/
_ZNSt12_Destroy_auxILb1EE9__destroyIPPiEEvT_S4_(unsigned int **,
                                                unsigned int **);
void _ZSt8_DestroyIPPiEvT_S2_(unsigned int **llvm_cbe___first,
                              unsigned int **llvm_cbe___last) {
  unsigned int **llvm_cbe___first_2e_addr;
  unsigned int **llvm_cbe___last_2e_addr;
  unsigned int **llvm_cbe_tmp;
  unsigned int **llvm_cbe_tmp1;
  *(&llvm_cbe___first_2e_addr) = llvm_cbe___first;
  *(&llvm_cbe___last_2e_addr) = llvm_cbe___last;
  llvm_cbe_tmp = *(&llvm_cbe___first_2e_addr);
  llvm_cbe_tmp1 = *(&llvm_cbe___last_2e_addr);
  _ZNSt12_Destroy_auxILb1EE9__destroyIPPiEEvT_S4_(llvm_cbe_tmp, llvm_cbe_tmp1);
  return;
}


x86 assembly (clang, -O0):
<_ZSt8_DestroyIPPiEvT_S2_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x28(%rbp),%rdi
mov    -0x30(%rbp),%rsi
call   1030 <_ZNSt12_Destroy_auxILb1EE9__destroyIPPiEEvT_S4_@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ZSt8_DestroyIPPiEvT_S2_>:
jmp    1030 <_ZNSt12_Destroy_auxILb1EE9__destroyIPPiEEvT_S4_@plt>

LLVM IR (-O0):
define void @_ZSt8_DestroyIPPiEvT_S2_(i32** %0, i32** %1) {
%3 = alloca i32**
%4 = alloca i32**
%5 = alloca i32**
%6 = alloca i32**
%7 = alloca i32**
%8 = alloca i32**
store i32** %0, i32*** %3
store i32** %1, i32*** %4
%9 = load i32**, i32*** %3
store i32** %9, i32*** %5
%10 = load i32**, i32*** %4
store i32** %10, i32*** %6
%11 = load i32**, i32*** %5
store i32** %11, i32*** %7
%12 = load i32**, i32*** %6
store i32** %12, i32*** %8
%13 = load i32**, i32*** %7
%14 = load i32**, i32*** %8
%15 = call i32 @_ZNSt12_Destroy_auxILb1EE9__destroyIPPiEEvT_S4_(i32** %13, i32** %14)
ret void
}

LLVM IR (-O2):
define void @_ZSt8_DestroyIPPiEvT_S2_(i32** %0, i32** %1) {
%3 = tail call i32 @_ZNSt12_Destroy_auxILb1EE9__destroyIPPiEEvT_S4_(i32** %0, i32** %1)
ret void
}
/* Variables and functions */
unsigned int readl(void *);
unsigned int ohci_readl(void *regs) { return readl(regs); }


x86 assembly (clang, -O0):
<ohci_readl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <readl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ohci_readl>:
jmp    1030 <readl@plt>

LLVM IR (-O0):
define i32 @ohci_readl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @readl(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ohci_readl(i8* %0) {
%2 = tail call i32 @readl(i8* %0)
ret i32 %2
}
/* Type definitions */
struct request_queue {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ blk_remove_plug(struct request_queue *);
int elv_queue_empty(struct request_queue *);
void blk_run_queue(struct request_queue *q) {
  unsigned long flags;
  unsigned long temp;
  int tmp;
  blk_remove_plug(q);
  tmp = elv_queue_empty(q);
  if (!tmp) {
  }
  return;
}


x86 assembly (clang, -O0):
<blk_run_queue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <blk_remove_plug@plt>
mov    -0x8(%rbp),%rdi
call   1040 <elv_queue_empty@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jne    1150 <blk_run_queue+0x30>
jmp    1150 <blk_run_queue+0x30>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<blk_run_queue>:
push   %rbx
mov    %rdi,%rbx
call   1030 <blk_remove_plug@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <elv_queue_empty@plt>

LLVM IR (-O0):
%struct.request_queue = type { i32 }
define void @blk_run_queue(%struct.request_queue* %0) {
%2 = alloca %struct.request_queue*
%3 = alloca i64
%4 = alloca i64
%5 = alloca i32
store %struct.request_queue* %0, %struct.request_queue** %2
%6 = load %struct.request_queue*, %struct.request_queue** %2
%7 = call i32 @blk_remove_plug(%struct.request_queue* %6)
%8 = load %struct.request_queue*, %struct.request_queue** %2
%9 = call i32 @elv_queue_empty(%struct.request_queue* %8)
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = icmp ne i32 %10, 0
br i1 %11, label %13, label %12
12: ; preds = %1
br label %13
13: ; preds = %12, %1
ret void
}

LLVM IR (-O2):
%struct.request_queue = type { i32 }
define void @blk_run_queue(%struct.request_queue* %0) {
%2 = tail call i32 @blk_remove_plug(%struct.request_queue* %0)
%3 = tail call i32 @elv_queue_empty(%struct.request_queue* %0)
ret void
}
/* Variables and functions */
int my_f();
int m2() { return my_f(); }


x86 assembly (clang, -O0):
<m2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <my_f@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<m2>:
xor    %eax,%eax
jmp    1030 <my_f@plt>

LLVM IR (-O0):
define i32 @m2() {
%1 = call i32 (...) @my_f()
ret i32 %1
}

LLVM IR (-O2):
define i32 @m2() {
%1 = tail call i32 (...) @my_f()
ret i32 %1
}
const char *src_get_version(void) {
  return "libsamplerate"
         "-"
         "0.1.9"
         " (c) 2002-2008 Erik de Castro Lopo";
}


x86 assembly (clang, -O0):
<src_get_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<src_get_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [54 x i8] c"libsamplerate-0.1.9 (c) 2002-2008 Erik de Castro Lopo\00"
define i8* @src_get_version() {
ret i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [54 x i8] c"libsamplerate-0.1.9 (c) 2002-2008 Erik de Castro Lopo\00"
define i8* @src_get_version() {
ret i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0)
}
void CAN2_SCE_IRQHandler() {}


x86 assembly (clang, -O0):
<CAN2_SCE_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CAN2_SCE_IRQHandler>:
ret

LLVM IR (-O0):
define void @CAN2_SCE_IRQHandler() {
ret void
}

LLVM IR (-O2):
define void @CAN2_SCE_IRQHandler() {
ret void
}
int fib_recursive(int n) {
  if (n == 0)
    return 0;
  else if (n == 1)
    return 1;
  return fib_recursive(n - 1) + fib_recursive(n - 2);
}


x86 assembly (clang, -O0):
<fib_recursive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1131 <fib_recursive+0x21>
movl   $0x0,-0x4(%rbp)
jmp    116f <fib_recursive+0x5f>
cmpl   $0x1,-0x8(%rbp)
jne    1147 <fib_recursive+0x37>
movl   $0x1,-0x4(%rbp)
jmp    116f <fib_recursive+0x5f>
jmp    114c <fib_recursive+0x3c>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib_recursive@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib_recursive@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib_recursive>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%ebx
jb     1132 <fib_recursive+0x22>
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fib_recursive@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x2,%ebx
jae    1120 <fib_recursive+0x10>
add    %ebp,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib_recursive(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %20
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 1, i32* %2
br label %20
11: ; preds = %7
br label %12
12: ; preds = %11
%13 = load i32, i32* %3
%14 = sub nsw i32 %13, 1
%15 = call i32 @fib_recursive(i32 %14)
%16 = load i32, i32* %3
%17 = sub nsw i32 %16, 2
%18 = call i32 @fib_recursive(i32 %17)
%19 = add nsw i32 %15, %18
store i32 %19, i32* %2
br label %20
20: ; preds = %12, %10, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @fib_recursive(i32 %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i32 [ 0, %1 ], [ %10, %6 ]
%4 = phi i32 [ %0, %1 ], [ %9, %6 ]
%5 = icmp ult i32 %4, 2
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = add nsw i32 %4, -1
%8 = tail call i32 @fib_recursive(i32 %7)
%9 = add nsw i32 %4, -2
%10 = add nsw i32 %8, %3
br label %2
11: ; preds = %2
%12 = add nsw i32 %4, %3
ret i32 %12
}
int f() { return 1 + 2 * 3 + 4 / 2 + 6 % 3 + 7 / 10 + 8 % 5 - 9; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @f() {
ret i32 3
}

LLVM IR (-O2):
define i32 @f() {
ret i32 3
}
/* Type definitions */
typedef scalar_t__ volatile uint32_t;

/* Variables and functions */
void GPIOIntEnable(uint32_t ui32Port, uint32_t ui32IntFlags) {
  ;
  (*((volatile uint32_t *)(ui32Port + 0x00000410))) |= ui32IntFlags;
}


x86 assembly (clang, -O0):
<GPIOIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x410(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x410(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOIntEnable>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    -0x10(%rsp),%rax
mov    -0x8(%rsp),%rcx
or     %rax,0x410(%rcx)
ret

LLVM IR (-O0):
define void @GPIOIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add nsw i64 %6, 1040
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @GPIOIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store volatile i64 %0, i64* %3
store volatile i64 %1, i64* %4
%5 = load volatile i64, i64* %4
%6 = load volatile i64, i64* %3
%7 = add nsw i64 %6, 1040
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}
int test_imm_72uint32_mem(unsigned int *val) {
  return ((*val) & (0x72 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_72uint32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x72,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_72uint32_mem>:
testb  $0x72,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_72uint32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 114
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_72uint32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 114
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
__attribute__((no, noclone)) unsigned __int128 t151_4add(unsigned __int128 x) {
  unsigned __int128 y = (-1);
  unsigned __int128 r;
  if (__builtin_add_overflow(x, y, &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t151_4add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
movq   $0xffffffffffffffff,-0x38(%rbp)
ff
movq   $0xffffffffffffffff,-0x40(%rbp)
ff
mov    -0x30(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    -0x40(%rbp),%rsi
mov    -0x38(%rbp),%rax
add    %rsi,%rdx
adc    %rax,%rcx
setb   %al
mov    %rdx,-0x50(%rbp)
mov    %rcx,-0x48(%rbp)
test   $0x1,%al
jne    116e <t151_4add+0x5e>
jmp    1175 <t151_4add+0x65>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x50(%rbp),%rax
mov    -0x48(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t151_4add>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
adc    $0xffffffffffffffff,%r14
jae    112b <t151_4add+0x1b>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %rbx,%rax
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t151_4add(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = alloca i128
%8 = bitcast i128* %4 to { i64, i64 }*
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 0
store i64 %0, i64* %9
%10 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %8, i32 0, i32 1
store i64 %1, i64* %10
%11 = load i128, i128* %4
store i128 %11, i128* %5
store i128 -1, i128* %6
%12 = load i128, i128* %5
%13 = load i128, i128* %6
%14 = call { i128, i1 } @llvm.uadd.with.overflow.i128(i128 %12, i128 %13)
%15 = extractvalue { i128, i1 } %14, 1
%16 = extractvalue { i128, i1 } %14, 0
store i128 %16, i128* %7
br i1 %15, label %17, label %19
17: ; preds = %2
%18 = call i32 (...) @bar()
br label %19
19: ; preds = %17, %2
%20 = load i128, i128* %7
store i128 %20, i128* %3
%21 = bitcast i128* %3 to { i64, i64 }*
%22 = load { i64, i64 }, { i64, i64 }* %21
ret { i64, i64 } %22
}

LLVM IR (-O2):
define { i64, i64 } @t151_4add(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = tail call { i128, i1 } @llvm.uadd.with.overflow.i128(i128 %6, i128 -1)
%8 = extractvalue { i128, i1 } %7, 1
%9 = extractvalue { i128, i1 } %7, 0
br i1 %8, label %10, label %12
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = trunc i128 %9 to i64
%14 = lshr i128 %9, 64
%15 = trunc i128 %14 to i64
%16 = insertvalue { i64, i64 } poison, i64 %13, 0
%17 = insertvalue { i64, i64 } %16, i64 %15, 1
ret { i64, i64 } %17
}
int bgeInstruction(int i, int j) { return (i >= j) ? 1 : 0; }


x86 assembly (clang, -O0):
<bgeInstruction>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%esi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmovge %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bgeInstruction>:
xor    %eax,%eax
cmp    %esi,%edi
setge  %al
ret

LLVM IR (-O0):
define i32 @bgeInstruction(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sge i32 %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 1, i32 0
ret i32 %9
}

LLVM IR (-O2):
define i32 @bgeInstruction(i32 %0, i32 %1) {
%3 = icmp sge i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void foo391() {}


x86 assembly (clang, -O0):
<foo391>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo391>:
ret

LLVM IR (-O0):
define void @foo391() {
ret void
}

LLVM IR (-O2):
define void @foo391() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __start();
void start() { __start(); }


x86 assembly (clang, -O0):
<start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__start@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<start>:
xor    %eax,%eax
jmp    1030 <__start@plt>

LLVM IR (-O0):
define void @start() {
%1 = call i32 (...) @__start()
ret void
}

LLVM IR (-O2):
define void @start() {
%1 = tail call i32 (...) @__start()
ret void
}