xunge/DecIR huggingface dataset:
unsigned int _check_times(unsigned x, unsigned y) {
  unsigned long long whole_ans =
      ((unsigned long long)x) * ((unsigned long long)y);
  unsigned word_ans = (unsigned)whole_ans;
  if (word_ans < whole_ans || word_ans > (1 << 28))
    (_throw_badalloc_fn("/scratch/repos/new/home/jordi_armengol_estape/"
                        "c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/"
                        "cyclone/refs/heads/master/bin/genfiles/tovc.c",
                        284));
  return word_ans;
}


x86 assembly (clang, -O0):
<_check_times>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%rax
jb     114d <_check_times+0x3d>
cmpl   $0x10000000,-0x14(%rbp)
jbe    1160 <_check_times+0x50>
lea    0xeac(%rip),%rdi
mov    $0x11c,%esi
mov    $0x0,%al
call   1030 <_throw_badalloc_fn@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_check_times>:
push   %rbx
mov    %edi,%eax
mul    %esi
mov    %eax,%ebx
jo     1121 <_check_times+0x11>
cmp    $0x10000001,%ebx
jb     1134 <_check_times+0x24>
lea    0xed8(%rip),%rdi
mov    $0x11c,%esi
xor    %eax,%eax
call   1030 <_throw_badalloc_fn@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [145 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/tovc.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = zext i32 %7 to i64
%9 = load i32, i32* %4
%10 = zext i32 %9 to i64
%11 = mul i64 %8, %10
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = trunc i64 %12 to i32
store i32 %13, i32* %6
%14 = load i32, i32* %6
%15 = zext i32 %14 to i64
%16 = load i64, i64* %5
%17 = icmp ult i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %2
%19 = load i32, i32* %6
%20 = icmp ugt i32 %19, 268435456
br i1 %20, label %21, label %23
21: ; preds = %18, %2
%22 = call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([145 x i8], [145 x i8]* @.str, i64 0, i64 0), i32 284)
br label %23
23: ; preds = %21, %18
%24 = load i32, i32* %6
ret i32 %24
}

LLVM IR (-O2):
@.str = [145 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FauxFaux/cyclone/refs/heads/master/bin/genfiles/tovc.c\00"
define i32 @_check_times(i32 %0, i32 %1) {
%3 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %0, i32 %1)
%4 = extractvalue { i32, i1 } %3, 0
%5 = extractvalue { i32, i1 } %3, 1
%6 = icmp ugt i32 %4, 268435456
%7 = or i1 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 (i8*, i32, ...) bitcast (i32 (...)* @_throw_badalloc_fn to i32 (i8*, i32, ...)*)(i8* getelementptr inbounds ([145 x i8], [145 x i8]* @.str, i64 0, i64 0), i32 284)
br label %10
10: ; preds = %2, %8
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void *func(void *arg) {
  printf("hello thread\n");
  return NULL;
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"hello thread\0A\00"
define i8* @func(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i8* null
}

LLVM IR (-O2):
@str = [13 x i8] c"hello thread\00"
define noalias i8* @func(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
ret i8* null
}
int toggle(int user) {
  if (user == 'x')
    return 'o';
  else
    return 'x';
}


x86 assembly (clang, -O0):
<toggle>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x78,-0x8(%rbp)
jne    111d <toggle+0x1d>
movl   $0x6f,-0x4(%rbp)
jmp    1124 <toggle+0x24>
movl   $0x78,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<toggle>:
xor    %eax,%eax
cmp    $0x78,%edi
setne  %al
lea    (%rax,%rax,8),%eax
add    $0x6f,%eax
ret

LLVM IR (-O0):
define i32 @toggle(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 120
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 111, i32* %2
br label %8
7: ; preds = %1
store i32 120, i32* %2
br label %8
8: ; preds = %7, %6
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @toggle(i32 %0) {
%2 = icmp eq i32 %0, 120
%3 = select i1 %2, i32 111, i32 120
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ my_fatal(char *, char *, int);
int /*<<< orphan*/ piece_is_ok(int);
int piece_type(int piece) {
  {
    if (!(piece_is_ok(piece)))
      my_fatal("file \"%s\", line %d, assertion \""
               "piece_is_ok(piece)"
               "\" failed\n",
               "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
               "outputs/2022-01-22/02-19-57/repos/ddugovic/polyglot/refs/heads/"
               "master/piece.c",
               88);
  };
  return piece & ~3;
}


x86 assembly (clang, -O0):
<piece_type>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <piece_is_ok@plt>
cmp    $0x0,%eax
jne    1154 <piece_type+0x34>
lea    0xebd(%rip),%rdi
lea    0xef1(%rip),%rsi
mov    $0x58,%edx
call   1040 <my_fatal@plt>
mov    -0x4(%rbp),%eax
and    $0xfffffffc,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<piece_type>:
push   %rbx
mov    %edi,%ebx
call   1030 <piece_is_ok@plt>
test   %eax,%eax
jne    1144 <piece_type+0x24>
lea    0xecd(%rip),%rdi
lea    0xf01(%rip),%rsi
mov    $0x58,%edx
call   1040 <my_fatal@plt>
and    $0xfffffffc,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [59 x i8] c"file \22%s\22, line %d, assertion \22piece_is_ok(piece)\22 failed\0A\00"
@.str.1 = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/ddugovic/polyglot/refs/heads/master/piece.c\00"
define i32 @piece_type(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @piece_is_ok(i32 %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call i32 @my_fatal(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str.1, i64 0, i64 0), i32 88)
br label %8
8: ; preds = %6, %1
%9 = load i32, i32* %2
%10 = and i32 %9, -4
ret i32 %10
}

LLVM IR (-O2):
@.str = [59 x i8] c"file \22%s\22, line %d, assertion \22piece_is_ok(piece)\22 failed\0A\00"
@.str.1 = [134 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/ddugovic/polyglot/refs/heads/master/piece.c\00"
define i32 @piece_type(i32 %0) {
%2 = tail call i32 @piece_is_ok(i32 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @my_fatal(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([134 x i8], [134 x i8]* @.str.1, i64 0, i64 0), i32 88)
br label %6
6: ; preds = %4, %1
%7 = and i32 %0, -4
ret i32 %7
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
void finish_packet(uint8_t error) {
  (*(volatile uint8_t *)(void *)(0xfffef004)) = error;
  (*(volatile uint8_t *)(void *)(0xfffef028)) = 0x03;
  (*(volatile uint8_t *)(void *)(0xfffef000)) = (error ? 0x51 : 0x50);
}


x86 assembly (clang, -O0):
<finish_packet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0xfffef004,%eax
mov    %ecx,(%rax)
mov    $0xfffef028,%eax
movl   $0x3,(%rax)
mov    -0x4(%rbp),%edx
mov    $0x50,%ecx
mov    $0x51,%eax
cmp    $0x0,%edx
cmovne %eax,%ecx
mov    $0xfffef000,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<finish_packet>:
mov    $0xfffef000,%eax
mov    %edi,0x4(%rax)
movl   $0x3,0x28(%rax)
cmp    $0x1,%edi
mov    $0x51,%ecx
sbb    $0x0,%ecx
mov    %ecx,(%rax)
ret

LLVM IR (-O0):
define void @finish_packet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store volatile i32 %3, i32* inttoptr (i64 4294897668 to i32*)
store volatile i32 3, i32* inttoptr (i64 4294897704 to i32*)
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 81, i32 80
store volatile i32 %7, i32* inttoptr (i64 4294897664 to i32*)
ret void
}

LLVM IR (-O2):
define void @finish_packet(i32 %0) {
store volatile i32 %0, i32* inttoptr (i64 4294897668 to i32*)
store volatile i32 3, i32* inttoptr (i64 4294897704 to i32*)
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i32 80, i32 81
store volatile i32 %3, i32* inttoptr (i64 4294897664 to i32*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
void plugin_set_uplink_frequency(double frequency) {
  printf("Uplink Frequency: %f kHz\n", frequency);
}


x86 assembly (clang, -O0):
<plugin_set_uplink_frequency>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plugin_set_uplink_frequency>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [26 x i8] c"Uplink Frequency: %f kHz\0A\00"
define void @plugin_set_uplink_frequency(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), double %3)
ret void
}

LLVM IR (-O2):
@.str = [26 x i8] c"Uplink Frequency: %f kHz\0A\00"
define void @plugin_set_uplink_frequency(double %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0), double %0)
ret void
}
unsigned char unsigned_int_to_unsigned_char(unsigned int src) { return src; }


x86 assembly (clang, -O0):
<unsigned_int_to_unsigned_char>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsigned_int_to_unsigned_char>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @unsigned_int_to_unsigned_char(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
ret i8 %4
}

LLVM IR (-O2):
define zeroext i8 @unsigned_int_to_unsigned_char(i32 %0) {
%2 = trunc i32 %0 to i8
ret i8 %2
}
/* Variables and functions */
int M_PI;
int /*<<< orphan*/ printf(char *, double);
int sin(int);
int main() {
  int a = 20;
  int angle = 30;
  int price = 12;
  double h = 0;
  h = a / sin((angle * M_PI) / 180);
  double money = h * price;
  printf("%.2f\n", money);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x14,-0x8(%rbp)
movl   $0x1e,-0xc(%rbp)
movl   $0xc,-0x10(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0xc(%rbp),%eax
mov    0x2e8c(%rip),%rcx
imul   (%rcx),%eax
mov    $0xb4,%ecx
cltd
idiv   %ecx
mov    %eax,%edi
call   1040 <sin@plt>
mov    %eax,%ecx
mov    -0x24(%rbp),%eax
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
cvtsi2sdl -0x10(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
lea    0xe62(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec0(%rip),%rax
movslq (%rax),%rax
imul   $0x2aaaaaab,%rax,%rdi
mov    %rdi,%rax
shr    $0x3f,%rax
shr    $0x20,%rdi
add    %eax,%edi
call   1040 <sin@plt>
mov    %eax,%ecx
mov    $0x14,%eax
xor    %edx,%edx
idiv   %ecx
cvtsi2sd %eax,%xmm0
mulsd  0xea5(%rip),%xmm0
lea    0xea6(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@M_PI = global i32 0
@.str = [6 x i8] c"%.2f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca double
%6 = alloca double
store i32 0, i32* %1
store i32 20, i32* %2
store i32 30, i32* %3
store i32 12, i32* %4
store double 0.000000e+00, double* %5
%7 = load i32, i32* %2
%8 = load i32, i32* %3
%9 = load i32, i32* @M_PI
%10 = mul nsw i32 %8, %9
%11 = sdiv i32 %10, 180
%12 = call i32 @sin(i32 %11)
%13 = sdiv i32 %7, %12
%14 = sitofp i32 %13 to double
store double %14, double* %5
%15 = load double, double* %5
%16 = load i32, i32* %4
%17 = sitofp i32 %16 to double
%18 = fmul double %15, %17
store double %18, double* %6
%19 = load double, double* %6
%20 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), double %19)
ret i32 0
}

LLVM IR (-O2):
@M_PI = global i32 0
@.str = [6 x i8] c"%.2f\0A\00"
define i32 @main() {
%1 = load i32, i32* @M_PI
%2 = sdiv i32 %1, 6
%3 = tail call i32 @sin(i32 %2)
%4 = sdiv i32 20, %3
%5 = sitofp i32 %4 to double
%6 = fmul double %5, 1.200000e+01
%7 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), double %6)
ret i32 0
}
void childHandler(int sig) {}


x86 assembly (clang, -O0):
<childHandler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<childHandler>:
ret

LLVM IR (-O0):
define void @childHandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @childHandler(i32 %0) {
ret void
}
void task_fourth() {
  int j = 1;
  while (1) {
    j += 2;
    kprint("4");
    for (int i = 0; i < 1000000; ++i) {
      __asm__("NOP");
    }
  }
}


x86 assembly (clang, -O0):
<task_fourth>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x4(%rbp)
lea    0xed1(%rip),%rdi
mov    $0x0,%al
call   1030 <kprint@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0xf4240,-0x8(%rbp)
jge    1159 <task_fourth+0x49>
nop
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    113d <task_fourth+0x2d>
jmp    111f <task_fourth+0xf>

x86 assembly (clang, -O2):
<task_fourth>:
push   %rbx
lea    0xee8(%rip),%rbx
nopl   0x0(%rax,%rax,1)
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <kprint@plt>
mov    $0xf4240,%eax
nop
nop
add    $0xffffffff,%eax
jne    1130 <task_fourth+0x20>
jmp    1120 <task_fourth+0x10>

LLVM IR (-O0):
@.str = [2 x i8] c"4\00"
define void @task_fourth() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %1
br label %3
3: ; preds = %0, %14
%4 = load i32, i32* %1
%5 = add nsw i32 %4, 2
store i32 %5, i32* %1
%6 = call i32 (i8*, ...) bitcast (i32 (...)* @kprint to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %2
br label %7
7: ; preds = %11, %3
%8 = load i32, i32* %2
%9 = icmp slt i32 %8, 1000000
br i1 %9, label %10, label %14
10: ; preds = %7
br label %11
11: ; preds = %10
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %7
14: ; preds = %7
br label %3
}

LLVM IR (-O2):
@.str = [2 x i8] c"4\00"
define void @task_fourth() {
br label %1
1: ; preds = %3, %0
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @kprint to i32 (i8*, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %3
3: ; preds = %1, %3
%4 = phi i32 [ 0, %1 ], [ %5, %3 ]
tail call void asm sideeffect "NOP", "~{dirflag},~{fpsr},~{flags}"()
%5 = add nuw nsw i32 %4, 1
%6 = icmp eq i32 %5, 1000000
br i1 %6, label %1, label %3
}
int test_imm_04uint64_lowword_mem(unsigned long long *val) {
  return ((*val) & (0x04 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_04uint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_04uint64_lowword_mem>:
testb  $0x4,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_04uint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 4
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_04uint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 4
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void ip(int *aPtr) {}


x86 assembly (clang, -O0):
<ip>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ip>:
ret

LLVM IR (-O0):
define void @ip(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @ip(i32* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int /*<<< orphan*/ dmap_read_u16(char const *);
int16_t dmap_read_i16(const char *buf) { return (int16_t)dmap_read_u16(buf); }


x86 assembly (clang, -O0):
<dmap_read_i16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <dmap_read_u16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmap_read_i16>:
jmp    1030 <dmap_read_u16@plt>

LLVM IR (-O0):
define i32 @dmap_read_i16(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @dmap_read_u16(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @dmap_read_i16(i8* %0) {
%2 = tail call i32 @dmap_read_u16(i8* %0)
ret i32 %2
}
void limit_change(double *value, float change) {
  if (change > +0.50)
    change = +0.50;
  else if (change < -0.50)
    change = -0.50;
  *value += change;
}


x86 assembly (clang, -O0):
<limit_change>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xee2(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    113a <limit_change+0x3a>
movss  0xee4(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1167 <limit_change+0x67>
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xebd(%rip),%xmm0
ucomisd %xmm1,%xmm0
jbe    1162 <limit_change+0x62>
movss  0xeb3(%rip),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1167 <limit_change+0x67>
movss  -0xc(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
mov    -0x8(%rbp),%rax
addsd  (%rax),%xmm0
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<limit_change>:
movss  0xef8(%rip),%xmm1
ucomiss %xmm1,%xmm0
ja     1120 <limit_change+0x20>
movss  0xeef(%rip),%xmm2
ucomiss %xmm0,%xmm2
movaps %xmm0,%xmm1
jbe    1120 <limit_change+0x20>
movaps %xmm2,%xmm1
xorps  %xmm0,%xmm0
cvtss2sd %xmm1,%xmm0
addsd  (%rdi),%xmm0
movsd  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @limit_change(double* %0, float %1) {
%3 = alloca double*
%4 = alloca float
store double* %0, double** %3
store float %1, float* %4
%5 = load float, float* %4
%6 = fpext float %5 to double
%7 = fcmp ogt double %6, 5.000000e-01
br i1 %7, label %8, label %9
8: ; preds = %2
store float 5.000000e-01, float* %4
br label %15
9: ; preds = %2
%10 = load float, float* %4
%11 = fpext float %10 to double
%12 = fcmp olt double %11, -5.000000e-01
br i1 %12, label %13, label %14
13: ; preds = %9
store float -5.000000e-01, float* %4
br label %14
14: ; preds = %13, %9
br label %15
15: ; preds = %14, %8
%16 = load float, float* %4
%17 = fpext float %16 to double
%18 = load double*, double** %3
%19 = load double, double* %18
%20 = fadd double %19, %17
store double %20, double* %18
ret void
}

LLVM IR (-O2):
define void @limit_change(double* nocapture %0, float %1) {
%3 = fcmp ogt float %1, 5.000000e-01
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = fcmp olt float %1, -5.000000e-01
br i1 %5, label %6, label %7
6: ; preds = %4
br label %7
7: ; preds = %2, %4, %6
%8 = phi float [ -5.000000e-01, %6 ], [ %1, %4 ], [ 5.000000e-01, %2 ]
%9 = fpext float %8 to double
%10 = load double, double* %0
%11 = fadd double %10, %9
store double %11, double* %0
ret void
}
long foo(long p) {
  if (1) {
    long xyzzy = 0;
    if (p)
      xyzzy = 2;
    return xyzzy;
  } else {
    int x = 0;
    return x;
  }
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1123 <foo+0x23>
movq   $0x2,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
test   %rdi,%rdi
setne  %al
add    %rax,%rax
ret

LLVM IR (-O0):
define i64 @foo(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 0, i64* %3
%4 = load i64, i64* %2
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 2, i64* %3
br label %7
7: ; preds = %6, %1
%8 = load i64, i64* %3
ret i64 %8
}

LLVM IR (-O2):
define i64 @foo(i64 %0) {
%2 = icmp eq i64 %0, 0
%3 = select i1 %2, i64 0, i64 2
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ MIPS_CLEAR_BIT(int, int);
void xburst_cgm_ungate_smb4() { MIPS_CLEAR_BIT((0xB0000000 + 0x28), 12); }


x86 assembly (clang, -O0):
<xburst_cgm_ungate_smb4>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb0000028,%edi
mov    $0xc,%esi
call   1030 <MIPS_CLEAR_BIT@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<xburst_cgm_ungate_smb4>:
mov    $0xb0000028,%edi
mov    $0xc,%esi
jmp    1030 <MIPS_CLEAR_BIT@plt>

LLVM IR (-O0):
define void @xburst_cgm_ungate_smb4() {
%1 = call i32 @MIPS_CLEAR_BIT(i32 -1342177240, i32 12)
ret void
}

LLVM IR (-O2):
define void @xburst_cgm_ungate_smb4() {
%1 = tail call i32 @MIPS_CLEAR_BIT(i32 -1342177240, i32 12)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int main() {
  int i;
#pragma omp target data map(alloc : i)
#pragma omp target map(present, alloc : i)
  ;
  fprintf(stderr, "i is present\n");
#pragma omp target map(present, alloc : i)
  ;
  fprintf(stderr, "i is present\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
lea    0xebc(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    0x2ec5(%rip),%r14
mov    (%r14),%edi
lea    0xedb(%rip),%rbx
mov    %rbx,%rsi
call   1030 <fprintf@plt>
mov    (%r14),%edi
mov    %rbx,%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [14 x i8] c"i is present\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%5 = load i32, i32* @stderr
%6 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [14 x i8] c"i is present\0A\00"
define i32 @main() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ stackBuffer;

/* Variables and functions */
char *malloc(int);
void radar10978247_positive(int myValueSize) {
  char stackBuffer[128];
  char *buffer;
  if (myValueSize <= sizeof(stackBuffer))
    buffer = stackBuffer;
  else
    buffer = malloc(myValueSize);
  if (buffer == stackBuffer)
    return;
}


x86 assembly (clang, -O0):
<radar10978247_positive>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa0,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
cmp    $0x80,%rax
ja     1141 <radar10978247_positive+0x31>
lea    -0x90(%rbp),%rax
mov    %rax,-0x98(%rbp)
jmp    1150 <radar10978247_positive+0x40>
mov    -0x4(%rbp),%edi
call   1030 <malloc@plt>
mov    %rax,-0x98(%rbp)
mov    -0x98(%rbp),%rax
lea    -0x90(%rbp),%rcx
cmp    %rcx,%rax
jne    116c <radar10978247_positive+0x5c>
jmp    116c <radar10978247_positive+0x5c>
add    $0xa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radar10978247_positive>:
ret

LLVM IR (-O0):
define void @radar10978247_positive(i32 %0) {
%2 = alloca i32
%3 = alloca [128 x i8]
%4 = alloca i8*
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sext i32 %5 to i64
%7 = icmp ule i64 %6, 128
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
store i8* %9, i8** %4
br label %13
10: ; preds = %1
%11 = load i32, i32* %2
%12 = call i8* @malloc(i32 %11)
store i8* %12, i8** %4
br label %13
13: ; preds = %10, %8
%14 = load i8*, i8** %4
%15 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%16 = icmp eq i8* %14, %15
br i1 %16, label %17, label %18
17: ; preds = %13
br label %18
18: ; preds = %17, %13
ret void
}

LLVM IR (-O2):
define void @radar10978247_positive(i32 %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ TtlDefineSpace(int, int /*<<< orphan*/, int /*<<< orphan*/,
                                  int /*<<< orphan*/ *);
uint32_t TtlSetNvLocked(void) {
  do {
  } while (0);
  return TtlDefineSpace(0xFFFFFFFF, 0, 0, NULL);
}


x86 assembly (clang, -O0):
<TtlSetNvLocked>:
push   %rbp
mov    %rsp,%rbp
jmp    1119 <TtlSetNvLocked+0x9>
jmp    111e <TtlSetNvLocked+0xe>
mov    $0xffffffff,%edi
xor    %edx,%edx
xor    %eax,%eax
mov    %eax,%ecx
mov    %edx,%esi
call   1030 <TtlDefineSpace@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TtlSetNvLocked>:
mov    $0xffffffff,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <TtlDefineSpace@plt>

LLVM IR (-O0):
define i32 @TtlSetNvLocked() {
br label %1
1: ; preds = %0
br label %2
2: ; preds = %1
%3 = call i32 @TtlDefineSpace(i32 -1, i32 0, i32 0, i32* null)
ret i32 %3
}

LLVM IR (-O2):
define i32 @TtlSetNvLocked() {
%1 = tail call i32 @TtlDefineSpace(i32 -1, i32 0, i32 0, i32* null)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ abort();
void expect(unsigned long long int pattern, unsigned long long int value) {
  if (pattern != value)
    abort();
}


x86 assembly (clang, -O0):
<expect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
je     1135 <expect+0x25>
mov    $0x0,%al
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expect>:
cmp    %rsi,%rdi
jne    1116 <expect+0x6>
ret
push   %rax
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define void @expect(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp ne i64 %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @expect(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (...) @abort()
unreachable
6: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, unsigned long,
                           char const *, int);
int /*<<< orphan*/ stderr;
void fail_die_malloc_die(size_t size, const char *file, int line) {
  fprintf(stderr, "Out of memory! (wanted %lu at %s:%d)\n", (unsigned long)size,
          file, line);
  exit(1);
}


x86 assembly (clang, -O0):
<fail_die_malloc_die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x14(%rbp),%r8d
lea    0xeb1(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fail_die_malloc_die>:
push   %rax
mov    %edx,%r8d
mov    %rsi,%rcx
mov    %rdi,%rdx
mov    0x2eaf(%rip),%rax
mov    (%rax),%edi
lea    0xec6(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [38 x i8] c"Out of memory! (wanted %lu at %s:%d)\0A\00"
define void @fail_die_malloc_die(i64 %0, i8* %1, i32 %2) {
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i32
store i64 %0, i64* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* @stderr
%8 = load i64, i64* %4
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i64 %8, i8* %9, i32 %10)
%12 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [38 x i8] c"Out of memory! (wanted %lu at %s:%d)\0A\00"
define void @fail_die_malloc_die(i64 %0, i8* %1, i32 %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i64 %0, i8* %1, i32 %2)
%6 = tail call i32 @exit(i32 1)
unreachable
}
void gtk_tree_model_iter_parent() {}


x86 assembly (clang, -O0):
<gtk_tree_model_iter_parent>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_model_iter_parent>:
ret

LLVM IR (-O0):
define void @gtk_tree_model_iter_parent() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_model_iter_parent() {
ret void
}
void *test_anti_range_62(int n) {
  extern void *alloc_anti_range_62(int) __attribute__((alloc_size(1)));
  if (0 <= n && n <= 0x7fffffff)
    n = 0 - 1;
  return alloc_anti_range_62(n);
}


x86 assembly (clang, -O0):
<test_anti_range_62>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmp    -0x4(%rbp),%eax
jg     113a <test_anti_range_62+0x2a>
cmpl   $0x7fffffff,-0x4(%rbp)
jg     113a <test_anti_range_62+0x2a>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <alloc_anti_range_62@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_62>:
test   %edi,%edi
mov    $0xffffffff,%eax
cmovns %eax,%edi
jmp    1030 <alloc_anti_range_62@plt>

LLVM IR (-O0):
define i8* @test_anti_range_62(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 0, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 2147483647
br i1 %7, label %8, label %9
8: ; preds = %5
store i32 -1, i32* %2
br label %9
9: ; preds = %8, %5, %1
%10 = load i32, i32* %2
%11 = call i8* @alloc_anti_range_62(i32 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @test_anti_range_62(i32 %0) {
%2 = icmp slt i32 %0, -1
%3 = select i1 %2, i32 %0, i32 -1
%4 = tail call i8* @alloc_anti_range_62(i32 %3)
ret i8* %4
}
/* Type definitions */
struct section_list {
  int dummy;
};
struct genlist {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ genlist_sort(struct genlist *,
                                int (*)(void const *, void const *));
void section_list_sort(struct section_list *tthis,
                       int (*compar)(const struct section *const *,
                                     const struct section *const *)) {
  genlist_sort((struct genlist *)tthis,
               (int (*)(const void *, const void *))compar);
}


x86 assembly (clang, -O0):
<section_list_sort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <genlist_sort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<section_list_sort>:
jmp    1030 <genlist_sort@plt>

LLVM IR (-O0):
%struct.section_list = type { i32 }
%struct.section = type opaque
%struct.genlist = type { i32 }
define void @section_list_sort(%struct.section_list* %0, i32 (%struct.section**, %struct.section**)* %1) {
%3 = alloca %struct.section_list*
%4 = alloca i32 (%struct.section**, %struct.section**)*
store %struct.section_list* %0, %struct.section_list** %3
store i32 (%struct.section**, %struct.section**)* %1, i32 (%struct.section**, %struct.section**)** %4
%5 = load %struct.section_list*, %struct.section_list** %3
%6 = bitcast %struct.section_list* %5 to %struct.genlist*
%7 = load i32 (%struct.section**, %struct.section**)*, i32 (%struct.section**, %struct.section**)** %4
%8 = bitcast i32 (%struct.section**, %struct.section**)* %7 to i32 (i8*, i8*)*
%9 = call i32 @genlist_sort(%struct.genlist* %6, i32 (i8*, i8*)* %8)
ret void
}

LLVM IR (-O2):
%struct.section_list = type { i32 }
%struct.section = type opaque
%struct.genlist = type { i32 }
define void @section_list_sort(%struct.section_list* %0, i32 (%struct.section**, %struct.section**)* %1) {
%3 = bitcast %struct.section_list* %0 to %struct.genlist*
%4 = bitcast i32 (%struct.section**, %struct.section**)* %1 to i32 (i8*, i8*)*
%5 = tail call i32 @genlist_sort(%struct.genlist* %3, i32 (i8*, i8*)* %4)
ret void
}
double libballistics_moa2deg(double moa) { return moa / 60.0; }


x86 assembly (clang, -O0):
<libballistics_moa2deg>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<libballistics_moa2deg>:
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @libballistics_moa2deg(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 6.000000e+01
ret double %4
}

LLVM IR (-O2):
define double @libballistics_moa2deg(double %0) {
%2 = fdiv double %0, 6.000000e+01
ret double %2
}
/* Type definitions */
struct ns_connection {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ EPOLL_CTL_DEL;
int /*<<< orphan*/ ns_ev_mgr_epoll_ctl(struct ns_connection *,
                                       int /*<<< orphan*/);
void ns_ev_mgr_remove_conn(struct ns_connection *nc) {
  ns_ev_mgr_epoll_ctl(nc, EPOLL_CTL_DEL);
}


x86 assembly (clang, -O0):
<ns_ev_mgr_remove_conn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
call   1030 <ns_ev_mgr_epoll_ctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ns_ev_mgr_remove_conn>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <ns_ev_mgr_epoll_ctl@plt>

LLVM IR (-O0):
%struct.ns_connection = type { i32 }
@EPOLL_CTL_DEL = global i32 0
define void @ns_ev_mgr_remove_conn(%struct.ns_connection* %0) {
%2 = alloca %struct.ns_connection*
store %struct.ns_connection* %0, %struct.ns_connection** %2
%3 = load %struct.ns_connection*, %struct.ns_connection** %2
%4 = load i32, i32* @EPOLL_CTL_DEL
%5 = call i32 @ns_ev_mgr_epoll_ctl(%struct.ns_connection* %3, i32 %4)
ret void
}

LLVM IR (-O2):
%struct.ns_connection = type { i32 }
@EPOLL_CTL_DEL = global i32 0
define void @ns_ev_mgr_remove_conn(%struct.ns_connection* %0) {
%2 = load i32, i32* @EPOLL_CTL_DEL
%3 = tail call i32 @ns_ev_mgr_epoll_ctl(%struct.ns_connection* %0, i32 %2)
ret void
}
extern unsigned int __local_inb(unsigned long addr) {
  long result =
      *(volatile int *)((addr << 9) + ((0xfffffc0000000000UL) + 0x1C0000000UL));
  return 0xffUL & result;
}


x86 assembly (clang, -O0):
<__local_inb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x9,%rax
movabs $0xfffffc01c0000000,%rcx
fc ff ff
add    %rcx,%rax
mov    (%rax),%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0xff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__local_inb>:
shl    $0x9,%rdi
movabs $0xfffffc01c0000000,%rax
fc ff ff
mov    (%rdi,%rax,1),%eax
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @__local_inb(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = shl i64 %4, 9
%6 = add i64 %5, -4390530318336
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = sext i32 %8 to i64
store i64 %9, i64* %3
%10 = load i64, i64* %3
%11 = and i64 255, %10
%12 = trunc i64 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @__local_inb(i64 %0) {
%2 = shl i64 %0, 9
%3 = add i64 %2, -4390530318336
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, 255
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128i;
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_cvtph_ps(int /*<<< orphan*/);
__m128 __attribute__((__target__("f16c"))) mm_cvtph_ps_wrap(__m128i a) {
  return _mm_cvtph_ps(a);
}


x86 assembly (clang, -O0):
<mm_cvtph_ps_wrap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <_mm_cvtph_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mm_cvtph_ps_wrap>:
jmp    1030 <_mm_cvtph_ps@plt>

LLVM IR (-O0):
define i32 @mm_cvtph_ps_wrap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @_mm_cvtph_ps(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @mm_cvtph_ps_wrap(i32 %0) {
%2 = tail call i32 @_mm_cvtph_ps(i32 %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p384_sub(uintptr_t, uintptr_t, uintptr_t);
void fiat_p384_sub(uint32_t out1[12], const uint32_t arg1[12],
                   const uint32_t arg2[12]) {
  internal_fiat_p384_sub((uintptr_t)out1, (uintptr_t)arg1, (uintptr_t)arg2);
}


x86 assembly (clang, -O0):
<fiat_p384_sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <internal_fiat_p384_sub@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p384_sub>:
jmp    1030 <internal_fiat_p384_sub@plt>

LLVM IR (-O0):
define void @fiat_p384_sub(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i64
%9 = load i32*, i32** %5
%10 = ptrtoint i32* %9 to i64
%11 = load i32*, i32** %6
%12 = ptrtoint i32* %11 to i64
%13 = call i32 @internal_fiat_p384_sub(i64 %8, i64 %10, i64 %12)
ret void
}

LLVM IR (-O2):
define void @fiat_p384_sub(i32* %0, i32* %1, i32* %2) {
%4 = ptrtoint i32* %0 to i64
%5 = ptrtoint i32* %1 to i64
%6 = ptrtoint i32* %2 to i64
%7 = tail call i32 @internal_fiat_p384_sub(i64 %4, i64 %5, i64 %6)
ret void
}
short map_in_buffer() { return -1; }


x86 assembly (clang, -O0):
<map_in_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffff,%ax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<map_in_buffer>:
mov    $0xffff,%ax
ret

LLVM IR (-O0):
define signext i16 @map_in_buffer() {
ret i16 -1
}

LLVM IR (-O2):
define signext i16 @map_in_buffer() {
ret i16 -1
}
signed char bar(signed char si1, signed char si2) {
  return (si1 <= 0) ? si1 : (si2 * 2);
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x0,%eax
jg     1129 <bar+0x29>
movsbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1133 <bar+0x33>
movsbl -0x2(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
add    %sil,%sil
test   %dil,%dil
movzbl %sil,%eax
cmovle %edi,%eax
ret

LLVM IR (-O0):
define signext i8 @bar(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %3
store i8 %1, i8* %4
%5 = load i8, i8* %3
%6 = sext i8 %5 to i32
%7 = icmp sle i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i8, i8* %3
%10 = sext i8 %9 to i32
br label %15
11: ; preds = %2
%12 = load i8, i8* %4
%13 = sext i8 %12 to i32
%14 = mul nsw i32 %13, 2
br label %15
15: ; preds = %11, %8
%16 = phi i32 [ %10, %8 ], [ %14, %11 ]
%17 = trunc i32 %16 to i8
ret i8 %17
}

LLVM IR (-O2):
define signext i8 @bar(i8 signext %0, i8 signext %1) {
%3 = icmp slt i8 %0, 1
%4 = shl i8 %1, 1
%5 = select i1 %3, i8 %0, i8 %4
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int rand();
int random_int(int min, int max) {
  assert(max > min);
  int range = (max + 1) - min;
  return rand() % range + min;
}


x86 assembly (clang, -O0):
<random_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1040 <rand@plt>
cltd
idivl  -0xc(%rbp)
mov    %edx,%eax
add    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_int>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
sub    %ebp,%ebx
setg   %dil
call   1030 <assert@plt>
add    $0x1,%ebx
xor    %eax,%eax
call   1040 <rand@plt>
cltd
idiv   %ebx
add    %edx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @random_int(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp sgt i32 %6, %7
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
%13 = load i32, i32* %3
%14 = sub nsw i32 %12, %13
store i32 %14, i32* %5
%15 = call i32 (...) @rand()
%16 = load i32, i32* %5
%17 = srem i32 %15, %16
%18 = load i32, i32* %3
%19 = add nsw i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @random_int(i32 %0, i32 %1) {
%3 = icmp sgt i32 %1, %0
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = sub i32 1, %0
%7 = add i32 %6, %1
%8 = tail call i32 (...) @rand()
%9 = srem i32 %8, %7
%10 = add nsw i32 %9, %0
ret i32 %10
}
OP(ed, fe) {}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
ret

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ vectorSet(float *, float, float, float);
void vectorClear(float v[3]) { vectorSet(v, 0.0f, 0.0f, 0.0f); }


x86 assembly (clang, -O0):
<vectorClear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xorps  %xmm2,%xmm2
movaps %xmm2,%xmm0
movaps %xmm2,%xmm1
call   1030 <vectorSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vectorClear>:
xorps  %xmm0,%xmm0
xorps  %xmm1,%xmm1
xorps  %xmm2,%xmm2
jmp    1030 <vectorSet@plt>

LLVM IR (-O0):
define void @vectorClear(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = call i32 @vectorSet(float* %3, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00)
ret void
}

LLVM IR (-O2):
define void @vectorClear(float* %0) {
%2 = tail call i32 @vectorSet(float* %0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _start();
force_generation_of_export_stub() { _start(); }


x86 assembly (clang, -O0):
<force_generation_of_export_stub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <_start@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<force_generation_of_export_stub>:
xor    %eax,%eax
jmp    1030 <_start@plt>

LLVM IR (-O0):
define i32 @force_generation_of_export_stub() {
%1 = alloca i32
%2 = call i32 (...) @_start()
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
define i32 @force_generation_of_export_stub() {
%1 = tail call i32 (...) @_start()
ret i32 undef
}
void testClosureBDrV(void (*closure)(char, double), char a1, double a2) {
  (*closure)(a1, a2);
}


x86 assembly (clang, -O0):
<testClosureBDrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x9(%rbp),%cl
movsd  -0x18(%rbp),%xmm0
movsbl %cl,%edi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureBDrV>:
mov    %rdi,%rax
mov    %esi,%edi
jmp    *%rax

LLVM IR (-O0):
define void @testClosureBDrV(void (i8, double)* %0, i8 signext %1, double %2) {
%4 = alloca void (i8, double)*
%5 = alloca i8
%6 = alloca double
store void (i8, double)* %0, void (i8, double)** %4
store i8 %1, i8* %5
store double %2, double* %6
%7 = load void (i8, double)*, void (i8, double)** %4
%8 = load i8, i8* %5
%9 = load double, double* %6
ret void
}

LLVM IR (-O2):
define void @testClosureBDrV(void (i8, double)* nocapture %0, i8 signext %1, double %2) {
tail call void %0(i8 signext %1, double %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ do_div64(unsigned long long, unsigned long long,
                            unsigned long long *);
unsigned long long mod64(unsigned long long x, unsigned long long y) {
  unsigned long long __r;
  do_div64(x, y, &__r);
  return __r;
}


x86 assembly (clang, -O0):
<mod64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1030 <do_div64@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mod64>:
push   %rax
mov    %rsp,%rdx
call   1030 <do_div64@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
define i64 @mod64(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i32 @do_div64(i64 %6, i64 %7, i64* %5)
%9 = load i64, i64* %5
ret i64 %9
}

LLVM IR (-O2):
define i64 @mod64(i64 %0, i64 %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = call i32 @do_div64(i64 %0, i64 %1, i64* %3)
%6 = load i64, i64* %3
ret i64 %6
}
int do_748() { return 748; }


x86 assembly (clang, -O0):
<do_748>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2ec,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_748>:
mov    $0x2ec,%eax
ret

LLVM IR (-O0):
define i32 @do_748() {
ret i32 748
}

LLVM IR (-O2):
define i32 @do_748() {
ret i32 748
}
/* Variables and functions */
int /*<<< orphan*/ GPIOLED1Toggle();
void Task2Running(void) { GPIOLED1Toggle(); }


x86 assembly (clang, -O0):
<Task2Running>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GPIOLED1Toggle@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Task2Running>:
xor    %eax,%eax
jmp    1030 <GPIOLED1Toggle@plt>

LLVM IR (-O0):
define void @Task2Running() {
%1 = call i32 (...) @GPIOLED1Toggle()
ret void
}

LLVM IR (-O2):
define void @Task2Running() {
%1 = tail call i32 (...) @GPIOLED1Toggle()
ret void
}
void restore_thCtx(void) {}


x86 assembly (clang, -O0):
<restore_thCtx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<restore_thCtx>:
ret

LLVM IR (-O0):
define void @restore_thCtx() {
ret void
}

LLVM IR (-O2):
define void @restore_thCtx() {
ret void
}
int test_imm_BEuint32_reg(unsigned int val) {
  return ((val) & (0xBE << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_BEuint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0xbe,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_BEuint32_reg>:
test   $0xbe,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_BEuint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 190
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_BEuint32_reg(i32 %0) {
%2 = and i32 %0, 190
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}