xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int hash(int /*<<< orphan*/ *, size_t, int /*<<< orphan*/ const *, size_t, int,
         int);
int sha3_512(uint8_t *out, size_t outlen, const uint8_t *in, size_t inlen) {
  if (outlen > (512 / 8)) {
    return -1;
  }
  return hash(out, outlen, in, inlen, 200 - (512 / 4), 0x01);
}


x86 assembly (clang, -O0):
<sha3_512>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
cmpq   $0x40,-0x18(%rbp)
jbe    113f <sha3_512+0x2f>
movl   $0xffffffff,-0x4(%rbp)
jmp    1163 <sha3_512+0x53>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
mov    $0x48,%r8d
mov    $0x1,%r9d
call   1030 <hash@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sha3_512>:
cmp    $0x40,%rsi
jbe    111c <sha3_512+0xc>
mov    $0xffffffff,%eax
ret
mov    $0x48,%r8d
mov    $0x1,%r9d
jmp    1030 <hash@plt>

LLVM IR (-O0):
define i32 @sha3_512(i32* %0, i64 %1, i32* %2, i64 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i64
%8 = alloca i32*
%9 = alloca i64
store i32* %0, i32** %6
store i64 %1, i64* %7
store i32* %2, i32** %8
store i64 %3, i64* %9
%10 = load i64, i64* %7
%11 = icmp ugt i64 %10, 64
br i1 %11, label %12, label %13
12: ; preds = %4
store i32 -1, i32* %5
br label %19
13: ; preds = %4
%14 = load i32*, i32** %6
%15 = load i64, i64* %7
%16 = load i32*, i32** %8
%17 = load i64, i64* %9
%18 = call i32 @hash(i32* %14, i64 %15, i32* %16, i64 %17, i32 72, i32 1)
store i32 %18, i32* %5
br label %19
19: ; preds = %13, %12
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @sha3_512(i32* %0, i64 %1, i32* %2, i64 %3) {
%5 = icmp ugt i64 %1, 64
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @hash(i32* %0, i64 %1, i32* %2, i64 %3, i32 72, i32 1)
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ %7, %6 ], [ -1, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M115_f(char *s) {
  debug("M115_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M115_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xefa(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M115_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf06(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [47 x i8] c"M115_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M115_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [47 x i8] c"M115_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M115_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
void OCSP_CRLID_free(void) {}


x86 assembly (clang, -O0):
<OCSP_CRLID_free>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OCSP_CRLID_free>:
ret

LLVM IR (-O0):
define void @OCSP_CRLID_free() {
ret void
}

LLVM IR (-O2):
define void @OCSP_CRLID_free() {
ret void
}
int isascii(int c) { return ((unsigned int)c < 128u); }


x86 assembly (clang, -O0):
<isascii>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x80,-0x4(%rbp)
setb   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isascii>:
xor    %eax,%eax
cmp    $0x80,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @isascii(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ult i32 %3, 128
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @isascii(i32 %0) {
%2 = icmp ult i32 %0, 128
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Hello, github");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Hello, github\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Hello, github\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, int);
void gen_index(FILE *outfile, int dim) { fprintf(outfile, "_i%d", dim); }


x86 assembly (clang, -O0):
<gen_index>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_index>:
mov    %esi,%edx
lea    0xee7(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"_i%d\00"
define void @gen_index(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"_i%d\00"
define void @gen_index(i32* nocapture %0, i32 %1) {
%3 = tail call i32 @fprintf(i32* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_int(int);
int main() {
  int local_variable = 1;
  int other_variable = 9;
  int third_variable = 5;
  print_int(local_variable);
  print_int(other_variable);
  print_int(third_variable);
  print_int(local_variable + other_variable);
  third_variable = local_variable + other_variable;
  print_int(third_variable);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x1,-0x4(%rbp)
movl   $0x9,-0x8(%rbp)
movl   $0x5,-0xc(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <print_int@plt>
mov    -0x8(%rbp),%edi
call   1030 <print_int@plt>
mov    -0xc(%rbp),%edi
call   1030 <print_int@plt>
mov    -0x4(%rbp),%edi
add    -0x8(%rbp),%edi
call   1030 <print_int@plt>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <print_int@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
call   1030 <print_int@plt>
mov    $0x9,%edi
call   1030 <print_int@plt>
mov    $0x5,%edi
call   1030 <print_int@plt>
mov    $0xa,%edi
call   1030 <print_int@plt>
mov    $0xa,%edi
call   1030 <print_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 1, i32* %1
store i32 9, i32* %2
store i32 5, i32* %3
%4 = load i32, i32* %1
%5 = call i32 @print_int(i32 %4)
%6 = load i32, i32* %2
%7 = call i32 @print_int(i32 %6)
%8 = load i32, i32* %3
%9 = call i32 @print_int(i32 %8)
%10 = load i32, i32* %1
%11 = load i32, i32* %2
%12 = add nsw i32 %10, %11
%13 = call i32 @print_int(i32 %12)
%14 = load i32, i32* %1
%15 = load i32, i32* %2
%16 = add nsw i32 %14, %15
store i32 %16, i32* %3
%17 = load i32, i32* %3
%18 = call i32 @print_int(i32 %17)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @print_int(i32 1)
%2 = tail call i32 @print_int(i32 9)
%3 = tail call i32 @print_int(i32 5)
%4 = tail call i32 @print_int(i32 10)
%5 = tail call i32 @print_int(i32 10)
ret i32 0
}
/* Type definitions */
struct file_buffer {
  int dummy;
};
struct cache {
  int dummy;
};

/* Variables and functions */
struct file_buffer *_cache_get(struct cache *, int /*<<< orphan*/,
                               int /*<<< orphan*/);
struct file_buffer *cache_get_nohash(struct cache *cache) {
  return _cache_get(cache, 0, 0);
}


x86 assembly (clang, -O0):
<cache_get_nohash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %edx,%edx
mov    %edx,%esi
call   1030 <_cache_get@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cache_get_nohash>:
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <_cache_get@plt>

LLVM IR (-O0):
%struct.file_buffer = type { i32 }
%struct.cache = type { i32 }
define %struct.file_buffer* @cache_get_nohash(%struct.cache* %0) {
%2 = alloca %struct.cache*
store %struct.cache* %0, %struct.cache** %2
%3 = load %struct.cache*, %struct.cache** %2
%4 = call %struct.file_buffer* @_cache_get(%struct.cache* %3, i32 0, i32 0)
ret %struct.file_buffer* %4
}

LLVM IR (-O2):
%struct.file_buffer = type { i32 }
%struct.cache = type { i32 }
define %struct.file_buffer* @cache_get_nohash(%struct.cache* %0) {
%2 = tail call %struct.file_buffer* @_cache_get(%struct.cache* %0, i32 0, i32 0)
ret %struct.file_buffer* %2
}
/* Variables and functions */
int /*<<< orphan*/ AttitudeSimulatedHandle();
int /*<<< orphan*/ UAVObjLogging(int /*<<< orphan*/);
void AttitudeSimulatedLogging() { UAVObjLogging(AttitudeSimulatedHandle()); }


x86 assembly (clang, -O0):
<AttitudeSimulatedLogging>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <AttitudeSimulatedHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjLogging@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<AttitudeSimulatedLogging>:
push   %rax
xor    %eax,%eax
call   1040 <AttitudeSimulatedHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjLogging@plt>

LLVM IR (-O0):
define void @AttitudeSimulatedLogging() {
%1 = call i32 (...) @AttitudeSimulatedHandle()
%2 = call i32 @UAVObjLogging(i32 %1)
ret void
}

LLVM IR (-O2):
define void @AttitudeSimulatedLogging() {
%1 = tail call i32 (...) @AttitudeSimulatedHandle()
%2 = tail call i32 @UAVObjLogging(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(unsigned char *, unsigned char *, unsigned int);
unsigned int codec_binary_decode(unsigned char *input, unsigned int in_len,
                                 unsigned char *output) {
  memcpy(output, input, in_len);
  return in_len;
}


x86 assembly (clang, -O0):
<codec_binary_decode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<codec_binary_decode>:
push   %rbx
mov    %esi,%ebx
mov    %rdi,%rsi
mov    %rdx,%rdi
mov    %ebx,%edx
call   1030 <memcpy@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @codec_binary_decode(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = call i32 @memcpy(i8* %7, i8* %8, i32 %9)
%11 = load i32, i32* %5
ret i32 %11
}

LLVM IR (-O2):
define i32 @codec_binary_decode(i8* %0, i32 returned %1, i8* %2) {
%4 = tail call i32 @memcpy(i8* %2, i8* %0, i32 %1)
ret i32 %1
}
/* Variables and functions */
float abs(float);
float max(float, float);
float sqrt(float);
float fOpEngrave(float a, float b, float r) {
  return max(a, (a + r - abs(b)) * sqrt(0.5f));
}


x86 assembly (clang, -O0):
<fOpEngrave>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x4(%rbp),%xmm0
addss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x8(%rbp),%xmm0
call   1030 <abs@plt>
movaps %xmm0,%xmm1
movss  -0x18(%rbp),%xmm0
subss  %xmm1,%xmm0
movss  %xmm0,-0x14(%rbp)
movss  0xe7d(%rip),%xmm0
call   1050 <sqrt@plt>
movss  -0x14(%rbp),%xmm1
movaps %xmm0,%xmm2
movss  -0x10(%rbp),%xmm0
mulss  %xmm2,%xmm1
call   1040 <max@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fOpEngrave>:
push   %rax
movss  %xmm0,0x4(%rsp)
addss  %xmm0,%xmm2
movss  %xmm2,(%rsp)
movaps %xmm1,%xmm0
call   1030 <abs@plt>
movss  (%rsp),%xmm1
subss  %xmm0,%xmm1
mulss  0xeb7(%rip),%xmm1
movss  0x4(%rsp),%xmm0
pop    %rax
jmp    1040 <max@plt>

LLVM IR (-O0):
define float @fOpEngrave(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %4
%9 = load float, float* %6
%10 = fadd float %8, %9
%11 = load float, float* %5
%12 = call float @abs(float %11)
%13 = fsub float %10, %12
%14 = call float @sqrt(float 5.000000e-01)
%15 = fmul float %13, %14
%16 = call float @max(float %7, float %15)
ret float %16
}

LLVM IR (-O2):
define float @fOpEngrave(float %0, float %1, float %2) {
%4 = fadd float %0, %2
%5 = tail call float @abs(float %1)
%6 = fsub float %4, %5
%7 = fmul float %6, 0x3FE6A09E60000000
%8 = tail call float @max(float %0, float %7)
ret float %8
}
int _pstdout_consolidated_data_delete_all(void *x, void *key) { return 1; }


x86 assembly (clang, -O0):
<_pstdout_consolidated_data_delete_all>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_pstdout_consolidated_data_delete_all>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_pstdout_consolidated_data_delete_all(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @_pstdout_consolidated_data_delete_all(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 1
}
/* Variables and functions */
int __gpio_get_value(unsigned int);
int /*<<< orphan*/ might_sleep();
int gpio_get_value_cansleep(unsigned gpio) {
  might_sleep();
  return __gpio_get_value(gpio);
}


x86 assembly (clang, -O0):
<gpio_get_value_cansleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <might_sleep@plt>
mov    -0x4(%rbp),%edi
call   1030 <__gpio_get_value@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_get_value_cansleep>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1040 <might_sleep@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <__gpio_get_value@plt>

LLVM IR (-O0):
define i32 @gpio_get_value_cansleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @might_sleep()
%4 = load i32, i32* %2
%5 = call i32 @__gpio_get_value(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @gpio_get_value_cansleep(i32 %0) {
%2 = tail call i32 (...) @might_sleep()
%3 = tail call i32 @__gpio_get_value(i32 %0)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ PKCS12;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int /*<<< orphan*/ *ASN1_item_d2i_bio(int /*<<< orphan*/ *,
                                      int /*<<< orphan*/ *,
                                      int /*<<< orphan*/ **);
int /*<<< orphan*/ PKCS12_it;
PKCS12 *d2i_PKCS12_bio(BIO *bp, PKCS12 **p12) {
  return ASN1_item_d2i_bio(&PKCS12_it, bp, p12);
}


x86 assembly (clang, -O0):
<d2i_PKCS12_bio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    0x2eb1(%rip),%rdi
call   1030 <ASN1_item_d2i_bio@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_PKCS12_bio>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    0x2ec3(%rip),%rdi
jmp    1030 <ASN1_item_d2i_bio@plt>

LLVM IR (-O0):
@PKCS12_it = global i32 0
define i32* @d2i_PKCS12_bio(i32* %0, i32** %1) {
%3 = alloca i32*
%4 = alloca i32**
store i32* %0, i32** %3
store i32** %1, i32*** %4
%5 = load i32*, i32** %3
%6 = load i32**, i32*** %4
%7 = call i32* @ASN1_item_d2i_bio(i32* @PKCS12_it, i32* %5, i32** %6)
ret i32* %7
}

LLVM IR (-O2):
@PKCS12_it = global i32 0
define i32* @d2i_PKCS12_bio(i32* %0, i32** %1) {
%3 = tail call i32* @ASN1_item_d2i_bio(i32* @PKCS12_it, i32* %0, i32** %1)
ret i32* %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int arm32_read_p15_c1();
int /*<<< orphan*/ arm32_write_p15_c1(int);
void arm32_mmu_enable(void) {
  uint32_t value = arm32_read_p15_c1();
  arm32_write_p15_c1(value | (1 << 0));
}


x86 assembly (clang, -O0):
<arm32_mmu_enable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <arm32_read_p15_c1@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
or     $0x1,%edi
call   1040 <arm32_write_p15_c1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm32_mmu_enable>:
push   %rax
xor    %eax,%eax
call   1030 <arm32_read_p15_c1@plt>
or     $0x1,%eax
mov    %eax,%edi
pop    %rax
jmp    1040 <arm32_write_p15_c1@plt>

LLVM IR (-O0):
define void @arm32_mmu_enable() {
%1 = alloca i32
%2 = call i32 (...) @arm32_read_p15_c1()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = or i32 %3, 1
%5 = call i32 @arm32_write_p15_c1(i32 %4)
ret void
}

LLVM IR (-O2):
define void @arm32_mmu_enable() {
%1 = tail call i32 (...) @arm32_read_p15_c1()
%2 = or i32 %1, 1
%3 = tail call i32 @arm32_write_p15_c1(i32 %2)
ret void
}
int fun170() { return 170; }


x86 assembly (clang, -O0):
<fun170>:
push   %rbp
mov    %rsp,%rbp
mov    $0xaa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun170>:
mov    $0xaa,%eax
ret

LLVM IR (-O0):
define i32 @fun170() {
ret i32 170
}

LLVM IR (-O2):
define i32 @fun170() {
ret i32 170
}
/* Type definitions */
typedef scalar_t__ uint8_t;

/* Variables and functions */
bool SHAREMIND_SET_KEY_LESS_THAN_uint8_t(uint8_t const k1, uint8_t const k2) {
  return k1 < k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_SET_KEY_LESS_THAN_uint8_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_SET_KEY_LESS_THAN_uint8_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
setl   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_uint8_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_SET_KEY_LESS_THAN_uint8_t(i64 %0, i64 %1) {
%3 = icmp slt i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ f1(int, int /*<<< orphan*/);
scalar_t__ f2(int, int);
int /*<<< orphan*/ f4(int);
int f5(int x) {
  if (f2(x, 1))
    f1(1, f4(1));
  return x;
}


x86 assembly (clang, -O0):
<f5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <f2@plt>
cmp    $0x0,%rax
je     1168 <f5+0x38>
mov    $0x1,%edi
call   1050 <f4@plt>
mov    %eax,%esi
mov    $0x1,%edi
call   1040 <f1@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f5>:
push   %rbx
mov    %edi,%ebx
mov    $0x1,%esi
call   1030 <f2@plt>
test   %rax,%rax
je     1158 <f5+0x28>
mov    $0x1,%edi
call   1050 <f4@plt>
mov    $0x1,%edi
mov    %eax,%esi
call   1040 <f1@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @f5(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @f2(i32 %3, i32 1)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = call i32 @f4(i32 1)
%8 = call i32 @f1(i32 1, i32 %7)
br label %9
9: ; preds = %6, %1
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @f5(i32 returned %0) {
%2 = tail call i64 @f2(i32 %0, i32 1)
%3 = icmp eq i64 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i32 @f4(i32 1)
%6 = tail call i32 @f1(i32 1, i32 %5)
br label %7
7: ; preds = %4, %1
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ espconn_memfree(void *, char *, int);
void espconn_memFree(void *fp) {
  espconn_memfree(fp,
                  "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/"
                  "outputs/2022-01-22/02-19-57/repos/FelixPe/nodemcu-firmware/"
                  "refs/heads/dev/ESP8266/nodemcu-firmware-master/"
                  "nodemcu-firmware-master/app/mbedtls/app/Espconn_mem.c",
                  66);
}


x86 assembly (clang, -O0):
<espconn_memFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
mov    $0x42,%edx
call   1030 <espconn_memfree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<espconn_memFree>:
lea    0xee9(%rip),%rsi
mov    $0x42,%edx
jmp    1030 <espconn_memfree@plt>

LLVM IR (-O0):
@.str = [216 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FelixPe/nodemcu-firmware/refs/heads/dev/ESP8266/nodemcu-firmware-master/nodemcu-firmware-master/app/mbedtls/app/Espconn_mem.c\00"
define void @espconn_memFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @espconn_memfree(i8* %3, i8* getelementptr inbounds ([216 x i8], [216 x i8]* @.str, i64 0, i64 0), i32 66)
ret void
}

LLVM IR (-O2):
@.str = [216 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/FelixPe/nodemcu-firmware/refs/heads/dev/ESP8266/nodemcu-firmware-master/nodemcu-firmware-master/app/mbedtls/app/Espconn_mem.c\00"
define void @espconn_memFree(i8* %0) {
%2 = tail call i32 @espconn_memfree(i8* %0, i8* getelementptr inbounds ([216 x i8], [216 x i8]* @.str, i64 0, i64 0), i32 66)
ret void
}
int find_wrap(double pixelL_value, double pixelR_value) {
  double difference;
  int wrap_value;
  difference = pixelL_value - pixelR_value;
  if (difference > 3.1415926535897932384626433832795)
    wrap_value = -1;
  else if (difference < -3.1415926535897932384626433832795)
    wrap_value = 1;
  else
    wrap_value = 0;
  return wrap_value;
}


x86 assembly (clang, -O0):
<find_wrap>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    1140 <find_wrap+0x40>
movl   $0xffffffff,-0x1c(%rbp)
jmp    116b <find_wrap+0x6b>
movsd  0xec0(%rip),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    115f <find_wrap+0x5f>
movl   $0x1,-0x1c(%rbp)
jmp    1166 <find_wrap+0x66>
movl   $0x0,-0x1c(%rbp)
jmp    116b <find_wrap+0x6b>
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_wrap>:
subsd  %xmm1,%xmm0
movsd  0xef4(%rip),%xmm1
xor    %ecx,%ecx
ucomisd %xmm0,%xmm1
seta   %cl
ucomisd 0xeeb(%rip),%xmm0
mov    $0xffffffff,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @find_wrap(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca i32
store double %0, double* %3
store double %1, double* %4
%7 = load double, double* %3
%8 = load double, double* %4
%9 = fsub double %7, %8
store double %9, double* %5
%10 = load double, double* %5
%11 = fcmp ogt double %10, 0x400921FB54442D18
br i1 %11, label %12, label %13
12: ; preds = %2
store i32 -1, i32* %6
br label %19
13: ; preds = %2
%14 = load double, double* %5
%15 = fcmp olt double %14, 0xC00921FB54442D18
br i1 %15, label %16, label %17
16: ; preds = %13
store i32 1, i32* %6
br label %18
17: ; preds = %13
store i32 0, i32* %6
br label %18
18: ; preds = %17, %16
br label %19
19: ; preds = %18, %12
%20 = load i32, i32* %6
ret i32 %20
}

LLVM IR (-O2):
define i32 @find_wrap(double %0, double %1) {
%3 = fsub double %0, %1
%4 = fcmp ogt double %3, 0x400921FB54442D18
%5 = fcmp olt double %3, 0xC00921FB54442D18
%6 = zext i1 %5 to i32
%7 = select i1 %4, i32 -1, i32 %6
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char *, size_t);
int /*<<< orphan*/ printf(char *, char *);
void print_sauce_string(char *sauce_string, size_t size) {
  char string[size + 1];
  memcpy(string, sauce_string, size);
  string[size] = 0;
  printf("%s\n", string);
}


x86 assembly (clang, -O0):
<print_sauce_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    %rcx,%rax
add    $0x1,%rax
mov    %rsp,%rdx
mov    %rdx,-0x18(%rbp)
add    $0x10,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,-0x28(%rbp)
mov    %rdi,%rsp
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x28(%rbp),%rsi
mov    -0x10(%rbp),%rax
movb   $0x0,(%rsi,%rax,1)
lea    0xe85(%rip),%rdi
call   1030 <printf@plt>
mov    -0x18(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_sauce_string>:
push   %rbp
mov    %rsp,%rbp
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%rsi
mov    %rsp,%rbx
lea    0x10(%r14),%rax
and    $0xfffffffffffffff0,%rax
sub    %rax,%rbx
mov    %rbx,%rsp
mov    %rbx,%rdi
mov    %r14,%rdx
call   1040 <memcpy@plt>
movb   $0x0,(%r14,%rbx,1)
lea    0xeab(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
lea    -0x10(%rbp),%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @print_sauce_string(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i64, i64* %4
%8 = add i64 %7, 1
%9 = call i8* @llvm.stacksave()
store i8* %9, i8** %5
%10 = alloca i8, i64 %8
store i64 %8, i64* %6
%11 = load i8*, i8** %3
%12 = load i64, i64* %4
%13 = call i32 @memcpy(i8* %10, i8* %11, i64 %12)
%14 = load i64, i64* %4
%15 = getelementptr inbounds i8, i8* %10, i64 %14
store i8 0, i8* %15
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %10)
%17 = load i8*, i8** %5
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @print_sauce_string(i8* %0, i64 %1) {
%3 = add i64 %1, 1
%4 = alloca i8, i64 %3
%5 = call i32 @memcpy(i8* %4, i8* %0, i64 %1)
%6 = getelementptr inbounds i8, i8* %4, i64 %1
store i8 0, i8* %6
%7 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}
const char *get_local_encoding(void) { return ""; }


x86 assembly (clang, -O0):
<get_local_encoding>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_local_encoding>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @get_local_encoding() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @get_local_encoding() {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
int execute_setup() { return 0; }


x86 assembly (clang, -O0):
<execute_setup>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_setup>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_setup() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_setup() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ doremove(char *);
void unsetdir(void) {
  doremove("sortkeys");
  doremove("output");
}


x86 assembly (clang, -O0):
<unsetdir>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <doremove@plt>
lea    0xee2(%rip),%rdi
call   1030 <doremove@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsetdir>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <doremove@plt>
lea    0xee5(%rip),%rdi
pop    %rax
jmp    1030 <doremove@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"sortkeys\00"
@.str.1 = [7 x i8] c"output\00"
define void @unsetdir() {
%1 = call i32 @doremove(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @doremove(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"sortkeys\00"
@.str.1 = [7 x i8] c"output\00"
define void @unsetdir() {
%1 = tail call i32 @doremove(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @doremove(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int winPercent(int wins, int losses) {
  float winingPercentage = 100 * wins / (wins + losses);
  return winingPercentage;
}


x86 assembly (clang, -O0):
<winPercent>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
imul   $0x64,-0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    -0x8(%rbp),%ecx
cltd
idiv   %ecx
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0xc(%rbp)
cvttss2si -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<winPercent>:
imul   $0x64,%edi,%eax
add    %edi,%esi
cltd
idiv   %esi
cvtsi2ss %eax,%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @winPercent(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca float
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = mul nsw i32 100, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = add nsw i32 %8, %9
%11 = sdiv i32 %7, %10
%12 = sitofp i32 %11 to float
store float %12, float* %5
%13 = load float, float* %5
%14 = fptosi float %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @winPercent(i32 %0, i32 %1) {
%3 = mul nsw i32 %0, 100
%4 = add nsw i32 %1, %0
%5 = sdiv i32 %3, %4
%6 = sitofp i32 %5 to float
%7 = fptosi float %6 to i32
ret i32 %7
}
int g_DUMMY_menu_add_tooltip(int return_id, char *tip) {
  return_id = return_id;
  tip = tip;
  return 0;
}


x86 assembly (clang, -O0):
<g_DUMMY_menu_add_tooltip>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_DUMMY_menu_add_tooltip>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @g_DUMMY_menu_add_tooltip(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
store i32 %5, i32* %3
%6 = load i8*, i8** %4
store i8* %6, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @g_DUMMY_menu_add_tooltip(i32 %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ emit_cmovne_imm(int, int);
int /*<<< orphan*/ emit_or_and_set_flags(int, int, int);
void emit_set_nz64_32(int rsh, int rsl, int rt) {
  emit_or_and_set_flags(rsh, rsl, rt);
  emit_cmovne_imm(1, rt);
}


x86 assembly (clang, -O0):
<emit_set_nz64_32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1030 <emit_or_and_set_flags@plt>
mov    -0xc(%rbp),%esi
mov    $0x1,%edi
call   1040 <emit_cmovne_imm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_set_nz64_32>:
push   %rbx
mov    %edx,%ebx
call   1030 <emit_or_and_set_flags@plt>
mov    $0x1,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1040 <emit_cmovne_imm@plt>

LLVM IR (-O0):
define void @emit_set_nz64_32(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @emit_or_and_set_flags(i32 %7, i32 %8, i32 %9)
%11 = load i32, i32* %6
%12 = call i32 @emit_cmovne_imm(i32 1, i32 %11)
ret void
}

LLVM IR (-O2):
define void @emit_set_nz64_32(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @emit_or_and_set_flags(i32 %0, i32 %1, i32 %2)
%5 = tail call i32 @emit_cmovne_imm(i32 1, i32 %2)
ret void
}
int atoi(const char **s) {
  int i = 0;
  while (((unsigned)(((int)**s) - '0') < 10))
    i = i * 10 + *((*s)++) - '0';
  return i;
}


x86 assembly (clang, -O0):
<atoi>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%eax
sub    $0x30,%eax
cmp    $0xa,%eax
jae    114a <atoi+0x4a>
imul   $0xa,-0xc(%rbp),%eax
mov    -0x8(%rbp),%rdx
mov    (%rdx),%rcx
mov    %rcx,%rsi
add    $0x1,%rsi
mov    %rsi,(%rdx)
movsbl (%rcx),%ecx
add    %ecx,%eax
sub    $0x30,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <atoi+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<atoi>:
mov    (%rdi),%rcx
movsbl (%rcx),%edx
add    $0xffffffd0,%edx
xor    %eax,%eax
cmp    $0x9,%edx
ja     113f <atoi+0x3f>
add    $0x1,%rcx
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
lea    (%rax,%rax,4),%eax
mov    %rcx,(%rdi)
movsbl -0x1(%rcx),%edx
lea    (%rdx,%rax,2),%eax
add    $0xffffffd0,%eax
movsbl (%rcx),%edx
add    $0xffffffd0,%edx
add    $0x1,%rcx
cmp    $0xa,%edx
jb     1120 <atoi+0x20>
ret

LLVM IR (-O0):
define i32 @atoi(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %11, %1
%5 = load i8**, i8*** %2
%6 = load i8*, i8** %5
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = sub nsw i32 %8, 48
%10 = icmp ult i32 %9, 10
br i1 %10, label %11, label %21
11: ; preds = %4
%12 = load i32, i32* %3
%13 = mul nsw i32 %12, 10
%14 = load i8**, i8*** %2
%15 = load i8*, i8** %14
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %14
%17 = load i8, i8* %15
%18 = sext i8 %17 to i32
%19 = add nsw i32 %13, %18
%20 = sub nsw i32 %19, 48
store i32 %20, i32* %3
br label %4
21: ; preds = %4
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @atoi(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = add nsw i32 %4, -48
%6 = icmp ult i32 %5, 10
br i1 %6, label %7, label %20
7: ; preds = %1, %7
%8 = phi i8* [ %11, %7 ], [ %2, %1 ]
%9 = phi i32 [ %15, %7 ], [ 0, %1 ]
%10 = mul nsw i32 %9, 10
%11 = getelementptr inbounds i8, i8* %8, i64 1
store i8* %11, i8** %0
%12 = load i8, i8* %8
%13 = sext i8 %12 to i32
%14 = add i32 %10, -48
%15 = add i32 %14, %13
%16 = load i8, i8* %11
%17 = sext i8 %16 to i32
%18 = add nsw i32 %17, -48
%19 = icmp ult i32 %18, 10
br i1 %19, label %7, label %20
20: ; preds = %7, %1
%21 = phi i32 [ 0, %1 ], [ %15, %7 ]
ret i32 %21
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;
typedef int /*<<< orphan*/ mbstate_t;

/* Variables and functions */
int /*<<< orphan*/ wcrtomb(char *, int /*<<< orphan*/, int /*<<< orphan*/ *);
void uninitvar_wcrtomb(void) {
  char *s;
  wchar_t wc;
  mbstate_t *ps;
  (void)wcrtomb(s, wc, ps);
}


x86 assembly (clang, -O0):
<uninitvar_wcrtomb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <wcrtomb@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_wcrtomb>:
jmp    1030 <wcrtomb@plt>

LLVM IR (-O0):
define void @uninitvar_wcrtomb() {
%1 = alloca i8*
%2 = alloca i32
%3 = alloca i32*
%4 = load i8*, i8** %1
%5 = load i32, i32* %2
%6 = load i32*, i32** %3
%7 = call i32 @wcrtomb(i8* %4, i32 %5, i32* %6)
ret void
}

LLVM IR (-O2):
define void @uninitvar_wcrtomb() {
%1 = tail call i32 @wcrtomb(i8* undef, i32 undef, i32* undef)
ret void
}
int _nrrdGzDummySymbol(void) { return 42; }


x86 assembly (clang, -O0):
<_nrrdGzDummySymbol>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_nrrdGzDummySymbol>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @_nrrdGzDummySymbol() {
ret i32 42
}

LLVM IR (-O2):
define i32 @_nrrdGzDummySymbol() {
ret i32 42
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ IntEnable(int /*<<< orphan*/);
int /*<<< orphan*/ IntRegister(int /*<<< orphan*/, void (*)());
int /*<<< orphan*/ _UARTIntNumberGet(int /*<<< orphan*/);
void UARTIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) {
  uint32_t ui32Int;
  ;
  ui32Int = _UARTIntNumberGet(ui32Base);
  ;
  IntRegister(ui32Int, pfnHandler);
  IntEnable(ui32Int);
}


x86 assembly (clang, -O0):
<UARTIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <_UARTIntNumberGet@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <IntRegister@plt>
mov    -0x14(%rbp),%edi
call   1030 <IntEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTIntRegister>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1050 <_UARTIntNumberGet@plt>
mov    %eax,%ebp
mov    %eax,%edi
mov    %rbx,%rsi
call   1040 <IntRegister@plt>
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <IntEnable@plt>

LLVM IR (-O0):
define void @UARTIntRegister(i32 %0, void ()* %1) {
%3 = alloca i32
%4 = alloca void ()*
%5 = alloca i32
store i32 %0, i32* %3
store void ()* %1, void ()** %4
%6 = load i32, i32* %3
%7 = call i32 @_UARTIntNumberGet(i32 %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load void ()*, void ()** %4
%10 = bitcast void ()* %9 to void (...)*
%11 = call i32 @IntRegister(i32 %8, void (...)* %10)
%12 = load i32, i32* %5
%13 = call i32 @IntEnable(i32 %12)
ret void
}

LLVM IR (-O2):
define void @UARTIntRegister(i32 %0, void ()* %1) {
%3 = tail call i32 @_UARTIntNumberGet(i32 %0)
%4 = bitcast void ()* %1 to void (...)*
%5 = tail call i32 @IntRegister(i32 %3, void (...)* %4)
%6 = tail call i32 @IntEnable(i32 %3)
ret void
}
/* Variables and functions */
int create_dir(char const *);
int /*<<< orphan*/ remove_dir(char const *);
int create_clean_dir(const char *dir) {
  remove_dir(dir);
  return create_dir(dir);
}


x86 assembly (clang, -O0):
<create_clean_dir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <remove_dir@plt>
mov    -0x8(%rbp),%rdi
call   1030 <create_dir@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_clean_dir>:
push   %rbx
mov    %rdi,%rbx
call   1040 <remove_dir@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <create_dir@plt>

LLVM IR (-O0):
define i32 @create_clean_dir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @remove_dir(i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 @create_dir(i8* %5)
ret i32 %6
}

LLVM IR (-O2):
define i32 @create_clean_dir(i8* %0) {
%2 = tail call i32 @remove_dir(i8* %0)
%3 = tail call i32 @create_dir(i8* %0)
ret i32 %3
}
int quot(int x, int y) {
  int i = 0;
  if (x == 0)
    return 0;
  while (x > 0 && y > 0) {
    i += 1;
    x = (x - 1) - (y - 1);
  }
  return i;
}


x86 assembly (clang, -O0):
<quot>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1127 <quot+0x27>
movl   $0x0,-0x4(%rbp)
jmp    117a <quot+0x7a>
jmp    112c <quot+0x2c>
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0x11(%rbp)
jle    1145 <quot+0x45>
cmpl   $0x0,-0xc(%rbp)
setg   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    1155 <quot+0x55>
jmp    1174 <quot+0x74>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
jmp    112c <quot+0x2c>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<quot>:
xor    %eax,%eax
test   %edi,%edi
je     1119 <quot+0x19>
test   %esi,%esi
jle    1119 <quot+0x19>
test   %edi,%edi
jle    1119 <quot+0x19>
xor    %eax,%eax
add    $0x1,%eax
sub    %esi,%edi
test   %edi,%edi
jg     1110 <quot+0x10>
ret

LLVM IR (-O0):
define i32 @quot(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 0, i32* %6
%7 = load i32, i32* %4
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 0, i32* %3
br label %29
10: ; preds = %2
br label %11
11: ; preds = %19, %10
%12 = load i32, i32* %4
%13 = icmp sgt i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %5
%16 = icmp sgt i32 %15, 0
br label %17
17: ; preds = %14, %11
%18 = phi i1 [ false, %11 ], [ %16, %14 ]
br i1 %18, label %19, label %27
19: ; preds = %17
%20 = load i32, i32* %6
%21 = add nsw i32 %20, 1
store i32 %21, i32* %6
%22 = load i32, i32* %4
%23 = sub nsw i32 %22, 1
%24 = load i32, i32* %5
%25 = sub nsw i32 %24, 1
%26 = sub nsw i32 %23, %25
store i32 %26, i32* %4
br label %11
27: ; preds = %17
%28 = load i32, i32* %6
store i32 %28, i32* %3
br label %29
29: ; preds = %27, %9
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @quot(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %14, label %4
4: ; preds = %2
%5 = icmp sgt i32 %1, 0
%6 = icmp sgt i32 %0, 0
%7 = and i1 %5, %6
br i1 %7, label %8, label %14
8: ; preds = %4, %8
%9 = phi i32 [ %11, %8 ], [ 0, %4 ]
%10 = phi i32 [ %12, %8 ], [ %0, %4 ]
%11 = add nuw nsw i32 %9, 1
%12 = sub nsw i32 %10, %1
%13 = icmp sgt i32 %12, 0
br i1 %13, label %8, label %14
14: ; preds = %8, %4, %2
%15 = phi i32 [ 0, %2 ], [ 0, %4 ], [ %11, %8 ]
ret i32 %15
}
void default_end_cpu(__attribute__((unused)) void *report_data) {}


x86 assembly (clang, -O0):
<default_end_cpu>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_end_cpu>:
ret

LLVM IR (-O0):
define void @default_end_cpu(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @default_end_cpu(i8* nocapture %0) {
ret void
}
unsigned xrop3_140_0_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~T;
  stk2 = D | stk3;
  stk1 = S & stk2;
  return stk1;
}


x86 assembly (clang, -O0):
<xrop3_140_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_140_0_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
shl    $0x8,%esi
not    %esi
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_140_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %5
%26 = load i32, i32* %10
%27 = or i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %6
%29 = load i32, i32* %9
%30 = and i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
ret i32 %31
}

LLVM IR (-O2):
define i32 @xrop3_140_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = shl nuw nsw i32 %5, 8
%7 = xor i32 %6, -1
%8 = and i32 %4, %7
ret i32 %8
}
void debug_log_printf(const char *fmt, ...) {}


x86 assembly (clang, -O0):
<debug_log_printf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_log_printf>:
ret

LLVM IR (-O0):
define void @debug_log_printf(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @debug_log_printf(i8* nocapture %0, ...) {
ret void
}
/* Type definitions */
typedef unsigned char uint32_t;

/* Variables and functions */
uint32_t get_uint32le(unsigned char *p) {
  return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
}


x86 assembly (clang, -O0):
<get_uint32le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
shl    $0x18,%ecx
or     %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_uint32le>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
define zeroext i8 @get_uint32le(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 8
%12 = or i32 %6, %11
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 2
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 16
%18 = or i32 %12, %17
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i64 3
%21 = load i8, i8* %20
%22 = zext i8 %21 to i32
%23 = shl i32 %22, 24
%24 = or i32 %18, %23
%25 = trunc i32 %24 to i8
ret i8 %25
}

LLVM IR (-O2):
define zeroext i8 @get_uint32le(i8* nocapture %0) {
%2 = load i8, i8* %0
ret i8 %2
}
void memsetb(void *_dst, unsigned char val, unsigned int count) {
  unsigned int i = 0;
  unsigned char *dst = (unsigned char *)_dst;
  for (i = 0; i < count; i++)
    dst[i] = val;
}


x86 assembly (clang, -O0):
<memsetb>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jae    114e <memsetb+0x4e>
mov    -0x9(%rbp),%dl
mov    -0x20(%rbp),%rax
mov    -0x14(%rbp),%ecx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1127 <memsetb+0x27>
pop    %rbp
ret

x86 assembly (clang, -O2):
<memsetb>:
test   %edx,%edx
je     1124 <memsetb+0x14>
push   %rax
mov    %edx,%edx
movzbl %sil,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @memsetb(i8* %0, i8 zeroext %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%9 = load i8*, i8** %4
store i8* %9, i8** %8
store i32 0, i32* %7
br label %10
10: ; preds = %20, %3
%11 = load i32, i32* %7
%12 = load i32, i32* %6
%13 = icmp ult i32 %11, %12
br i1 %13, label %14, label %23
14: ; preds = %10
%15 = load i8, i8* %5
%16 = load i8*, i8** %8
%17 = load i32, i32* %7
%18 = zext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
store i8 %15, i8* %19
br label %20
20: ; preds = %14
%21 = load i32, i32* %7
%22 = add i32 %21, 1
store i32 %22, i32* %7
br label %10
23: ; preds = %10
ret void
}

LLVM IR (-O2):
define void @memsetb(i8* nocapture writeonly %0, i8 zeroext %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = zext i32 %2 to i64
br label %7
7: ; preds = %5, %3
ret void
}