#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ AssertFailure(char *, int);
unsigned long CANIntNumberGet(unsigned long);
int /*<<< orphan*/ IntDisable(unsigned long);
int /*<<< orphan*/ IntEnable(unsigned long);
unsigned long CANRegRead(unsigned long ulRegAddress) {
  volatile int iDelay;
  unsigned long ulRetVal;
  unsigned long ulIntNumber;
  unsigned long ulReenableInts;
  ulIntNumber = CANIntNumberGet(ulRegAddress & 0xfffff000);
  {
    if (!(ulIntNumber != (unsigned long)-1)) {
      AssertFailure(
          "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/"
          "Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/canlib.c",
          249);
    }
  };
  ulReenableInts =
      (*((volatile unsigned long *)(0xE000E104))) & (1 << (ulIntNumber - 48));
  if (ulReenableInts) {
    IntDisable(ulIntNumber);
  }
  (*((volatile unsigned long *)(ulRegAddress)));
  for (iDelay = 0; iDelay < 5; iDelay++) {
  }
  ulRetVal = (*((volatile unsigned long *)(ulRegAddress)));
  if (ulReenableInts) {
    IntEnable(ulIntNumber);
  }
  return (ulRetVal);
}


x86 assembly (clang, -O0):
<CANRegRead>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
movabs $0xfffff000,%rdi
and    -0x8(%rbp),%rdi
call   1060 <CANIntNumberGet@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0xffffffffffffffff,-0x20(%rbp)
jne    117f <CANRegRead+0x3f>
lea    0xe8b(%rip),%rdi
mov    $0xf9,%esi
call   1040 <AssertFailure@plt>
mov    $0xe000e104,%eax
mov    (%rax),%rax
mov    -0x20(%rbp),%rcx
sub    $0x30,%rcx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
movslq %ecx,%rcx
and    %rcx,%rax
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     11b6 <CANRegRead+0x76>
mov    -0x20(%rbp),%rdi
call   1050 <IntDisable@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    $0x5,%eax
jge    11e3 <CANRegRead+0xa3>
jmp    11d5 <CANRegRead+0x95>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    11c4 <CANRegRead+0x84>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x28(%rbp)
je     1202 <CANRegRead+0xc2>
mov    -0x20(%rbp),%rdi
call   1030 <IntEnable@plt>
mov    -0x18(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CANRegRead>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%r14
and    $0xfffff000,%edi
call   1060 <CANIntNumberGet@plt>
mov    %rax,%r15
cmp    $0xffffffffffffffff,%rax
jne    1171 <CANRegRead+0x31>
lea    0xe99(%rip),%rdi
mov    $0xf9,%esi
call   1040 <AssertFailure@plt>
lea    -0x30(%r15),%ecx
mov    $0x1,%eax
shl    %cl,%eax
movslq %eax,%rbx
mov    $0xe000e104,%eax
and    (%rax),%rbx
je     1191 <CANRegRead+0x51>
mov    %r15,%rdi
call   1050 <IntDisable@plt>
mov    (%r14),%rax
movl   $0x0,0xc(%rsp)
mov    0xc(%rsp),%eax
cmp    $0x4,%eax
jg     11be <CANRegRead+0x7e>
cs nopw 0x0(%rax,%rax,1)
nop
addl   $0x1,0xc(%rsp)
mov    0xc(%rsp),%eax
cmp    $0x5,%eax
jl     11b0 <CANRegRead+0x70>
mov    (%r14),%r14
test   %rbx,%rbx
je     11ce <CANRegRead+0x8e>
mov    %r15,%rdi
call   1030 <IntEnable@plt>
mov    %r14,%rax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [200 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/canlib.c\00"
define i64 @CANRegRead(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %2
%7 = load i64, i64* %2
%8 = and i64 %7, 4294963200
%9 = call i64 @CANIntNumberGet(i64 %8)
store i64 %9, i64* %5
%10 = load i64, i64* %5
%11 = icmp ne i64 %10, -1
br i1 %11, label %14, label %12
12: ; preds = %1
%13 = call i32 @AssertFailure(i8* getelementptr inbounds ([200 x i8], [200 x i8]* @.str, i64 0, i64 0), i32 249)
br label %14
14: ; preds = %12, %1
%15 = load volatile i64, i64* inttoptr (i64 3758153988 to i64*)
%16 = load i64, i64* %5
%17 = sub i64 %16, 48
%18 = trunc i64 %17 to i32
%19 = shl i32 1, %18
%20 = sext i32 %19 to i64
%21 = and i64 %15, %20
store i64 %21, i64* %6
%22 = load i64, i64* %6
%23 = icmp ne i64 %22, 0
br i1 %23, label %24, label %27
24: ; preds = %14
%25 = load i64, i64* %5
%26 = call i32 @IntDisable(i64 %25)
br label %27
27: ; preds = %24, %14
%28 = load i64, i64* %2
%29 = inttoptr i64 %28 to i64*
%30 = load volatile i64, i64* %29
store volatile i32 0, i32* %3
br label %31
31: ; preds = %35, %27
%32 = load volatile i32, i32* %3
%33 = icmp slt i32 %32, 5
br i1 %33, label %34, label %38
34: ; preds = %31
br label %35
35: ; preds = %34
%36 = load volatile i32, i32* %3
%37 = add nsw i32 %36, 1
store volatile i32 %37, i32* %3
br label %31
38: ; preds = %31
%39 = load i64, i64* %2
%40 = inttoptr i64 %39 to i64*
%41 = load volatile i64, i64* %40
store i64 %41, i64* %4
%42 = load i64, i64* %6
%43 = icmp ne i64 %42, 0
br i1 %43, label %44, label %47
44: ; preds = %38
%45 = load i64, i64* %5
%46 = call i32 @IntEnable(i64 %45)
br label %47
47: ; preds = %44, %38
%48 = load i64, i64* %4
ret i64 %48
}

LLVM IR (-O2):
@.str = [200 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/canlib.c\00"
define i64 @CANRegRead(i64 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = and i64 %0, 4294963200
%5 = tail call i64 @CANIntNumberGet(i64 %4)
%6 = icmp eq i64 %5, -1
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = tail call i32 @AssertFailure(i8* getelementptr inbounds ([200 x i8], [200 x i8]* @.str, i64 0, i64 0), i32 249)
br label %9
9: ; preds = %7, %1
%10 = load volatile i64, i64* inttoptr (i64 3758153988 to i64*)
%11 = trunc i64 %5 to i32
%12 = add i32 %11, -48
%13 = shl nuw i32 1, %12
%14 = sext i32 %13 to i64
%15 = and i64 %10, %14
%16 = icmp eq i64 %15, 0
br i1 %16, label %19, label %17
17: ; preds = %9
%18 = tail call i32 @IntDisable(i64 %5)
br label %19
19: ; preds = %17, %9
%20 = inttoptr i64 %0 to i64*
%21 = load volatile i64, i64* %20
store volatile i32 0, i32* %2
%22 = load volatile i32, i32* %2
%23 = icmp slt i32 %22, 5
br i1 %23, label %24, label %29
24: ; preds = %19, %24
%25 = load volatile i32, i32* %2
%26 = add nsw i32 %25, 1
store volatile i32 %26, i32* %2
%27 = load volatile i32, i32* %2
%28 = icmp slt i32 %27, 5
br i1 %28, label %24, label %29
29: ; preds = %24, %19
%30 = load volatile i64, i64* %20
br i1 %16, label %33, label %31
31: ; preds = %29
%32 = tail call i32 @IntEnable(i64 %5)
br label %33
33: ; preds = %31, %29
ret i64 %30
}