xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ closelog();
int syslog_close(void) {
  closelog();
  return 0;
}


x86 assembly (clang, -O0):
<syslog_close>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <closelog@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<syslog_close>:
push   %rax
xor    %eax,%eax
call   1030 <closelog@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @syslog_close() {
%1 = call i32 (...) @closelog()
ret i32 0
}

LLVM IR (-O2):
define i32 @syslog_close() {
%1 = tail call i32 (...) @closelog()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ emit_1_or_2_operandsl_vartext(char *, char *);
void special_fdivl(void) { emit_1_or_2_operandsl_vartext("fdiv", "fdivr"); }


x86 assembly (clang, -O0):
<special_fdivl>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee3(%rip),%rsi
call   1030 <emit_1_or_2_operandsl_vartext@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<special_fdivl>:
lea    0xee9(%rip),%rdi
lea    0xee7(%rip),%rsi
jmp    1030 <emit_1_or_2_operandsl_vartext@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"fdiv\00"
@.str.1 = [6 x i8] c"fdivr\00"
define void @special_fdivl() {
%1 = call i32 @emit_1_or_2_operandsl_vartext(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"fdiv\00"
@.str.1 = [6 x i8] c"fdivr\00"
define void @special_fdivl() {
%1 = tail call i32 @emit_1_or_2_operandsl_vartext(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef char uint32_t;

/* Variables and functions */
char *pd9p_dec4(char *buf, uint32_t *val) {
  *val = buf[0];
  *val += buf[1] << 8;
  *val += buf[2] << 16;
  *val += buf[3] << 24;
  return buf + 4;
}


x86 assembly (clang, -O0):
<pd9p_dec4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
movsbl 0x1(%rax),%edx
shl    $0x8,%edx
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
add    %edx,%ecx
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
movsbl 0x2(%rax),%edx
shl    $0x10,%edx
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
add    %edx,%ecx
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
movsbl 0x3(%rax),%edx
shl    $0x18,%edx
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
add    %edx,%ecx
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pd9p_dec4>:
mov    (%rdi),%al
mov    %al,(%rsi)
lea    0x4(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @pd9p_dec4(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = load i8*, i8** %4
store i8 %7, i8* %8
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8*, i8** %4
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = add nsw i32 %16, %13
%18 = trunc i32 %17 to i8
store i8 %18, i8* %14
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i64 2
%21 = load i8, i8* %20
%22 = sext i8 %21 to i32
%23 = shl i32 %22, 16
%24 = load i8*, i8** %4
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
%27 = add nsw i32 %26, %23
%28 = trunc i32 %27 to i8
store i8 %28, i8* %24
%29 = load i8*, i8** %3
%30 = getelementptr inbounds i8, i8* %29, i64 3
%31 = load i8, i8* %30
%32 = sext i8 %31 to i32
%33 = shl i32 %32, 24
%34 = load i8*, i8** %4
%35 = load i8, i8* %34
%36 = sext i8 %35 to i32
%37 = add nsw i32 %36, %33
%38 = trunc i32 %37 to i8
store i8 %38, i8* %34
%39 = load i8*, i8** %3
%40 = getelementptr inbounds i8, i8* %39, i64 4
ret i8* %40
}

LLVM IR (-O2):
define i8* @pd9p_dec4(i8* %0, i8* nocapture writeonly %1) {
%3 = load i8, i8* %0
store i8 %3, i8* %1
%4 = getelementptr inbounds i8, i8* %0, i64 4
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void test_get_line_number_from_string_in_file() {
  printf("test_get_line_number_from_string_in_file...");
  printf("Ok\n");
}


x86 assembly (clang, -O0):
<test_get_line_number_from_string_in_file>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xf05(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_get_line_number_from_string_in_file>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <printf@plt>
lea    0xef8(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"test_get_line_number_from_string_in_file...\00"
@.str.1 = [4 x i8] c"Ok\0A\00"
define void @test_get_line_number_from_string_in_file() {
%1 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [44 x i8] c"test_get_line_number_from_string_in_file...\00"
@str = [3 x i8] c"Ok\00"
define void @test_get_line_number_from_string_in_file() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @str, i64 0, i64 0))
ret void
}
void PIN_DELAY_FAST(void) {}


x86 assembly (clang, -O0):
<PIN_DELAY_FAST>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIN_DELAY_FAST>:
ret

LLVM IR (-O0):
define void @PIN_DELAY_FAST() {
ret void
}

LLVM IR (-O2):
define void @PIN_DELAY_FAST() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main(int argc, char *argv[], char *envp[]) {
  int a;
  scanf("%d", &a);
  a++;
  printf("%d\n", a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    0xec6(%rip),%rdi
lea    -0x1c(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%esi
lea    0xead(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%esi
add    $0x1,%esi
mov    %esi,0x4(%rsp)
lea    0xebf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1, i8** %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8**
%7 = alloca i32
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8** %2, i8*** %6
%8 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %7)
%9 = load i32, i32* %7
%10 = add nsw i32 %9, 1
store i32 %10, i32* %7
%11 = load i32, i32* %7
%12 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1, i8** nocapture readnone %2) {
%4 = alloca i32
%5 = bitcast i32* %4 to i8*
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %4)
%7 = load i32, i32* %4
%8 = add nsw i32 %7, 1
store i32 %8, i32* %4
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %8)
ret i32 0
}
double dotProduct(double *a, double *b) {
  return (a[0] * b[0] + a[1] * b[1] + a[2] * b[2]);
}


x86 assembly (clang, -O0):
<dotProduct>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x10(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x10(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dotProduct>:
movsd  0x8(%rdi),%xmm0
mulsd  0x8(%rsi),%xmm0
movsd  (%rdi),%xmm1
mulsd  (%rsi),%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  0x10(%rsi),%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dotProduct(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double*, double** %4
%9 = getelementptr inbounds double, double* %8, i64 0
%10 = load double, double* %9
%11 = load double*, double** %3
%12 = getelementptr inbounds double, double* %11, i64 1
%13 = load double, double* %12
%14 = load double*, double** %4
%15 = getelementptr inbounds double, double* %14, i64 1
%16 = load double, double* %15
%17 = fmul double %13, %16
%18 = call double @llvm.fmuladd.f64(double %7, double %10, double %17)
%19 = load double*, double** %3
%20 = getelementptr inbounds double, double* %19, i64 2
%21 = load double, double* %20
%22 = load double*, double** %4
%23 = getelementptr inbounds double, double* %22, i64 2
%24 = load double, double* %23
%25 = call double @llvm.fmuladd.f64(double %21, double %24, double %18)
ret double %25
}

LLVM IR (-O2):
define double @dotProduct(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = getelementptr inbounds double, double* %0, i64 1
%6 = load double, double* %5
%7 = getelementptr inbounds double, double* %1, i64 1
%8 = load double, double* %7
%9 = fmul double %6, %8
%10 = tail call double @llvm.fmuladd.f64(double %3, double %4, double %9)
%11 = getelementptr inbounds double, double* %0, i64 2
%12 = load double, double* %11
%13 = getelementptr inbounds double, double* %1, i64 2
%14 = load double, double* %13
%15 = tail call double @llvm.fmuladd.f64(double %12, double %14, double %10)
ret double %15
}
int do_190() { return 190; }


x86 assembly (clang, -O0):
<do_190>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbe,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_190>:
mov    $0xbe,%eax
ret

LLVM IR (-O0):
define i32 @do_190() {
ret i32 190
}

LLVM IR (-O2):
define i32 @do_190() {
ret i32 190
}
int fun1121() { return 1121; }


x86 assembly (clang, -O0):
<fun1121>:
push   %rbp
mov    %rsp,%rbp
mov    $0x461,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1121>:
mov    $0x461,%eax
ret

LLVM IR (-O0):
define i32 @fun1121() {
ret i32 1121
}

LLVM IR (-O2):
define i32 @fun1121() {
ret i32 1121
}
unsigned addval_201(unsigned x) { return x + 3353381192U; }


x86 assembly (clang, -O0):
<addval_201>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xc7e08948,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<addval_201>:
lea    -0x381f76b8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @addval_201(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add i32 %3, -941586104
ret i32 %4
}

LLVM IR (-O2):
define i32 @addval_201(i32 %0) {
%2 = add i32 %0, -941586104
ret i32 %2
}
int asm_bt_reg2r_l(int base, int offset) {
  int ret = 0;
  __asm__ __volatile__("clc\n\t"
                       "mov %1, %%eax\n\t"
                       "mov %2, %%ecx\n\t"
                       "bt %%ecx, %%eax\n\t"
                       "setc %%al\n\t"
                       "movzbl %%al, %%eax\n\t"
                       "mov %%eax, %0\n\t"
                       : "=m"(ret)
                       : "m"(base), "m"(offset)
                       : "eax", "ecx");
  return ret;
}


x86 assembly (clang, -O0):
<asm_bt_reg2r_l>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
clc
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
bt     %ecx,%eax
setb   %al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<asm_bt_reg2r_l>:
mov    %edi,-0x4(%rsp)
mov    %esi,-0x8(%rsp)
movl   $0x0,-0xc(%rsp)
clc
mov    -0x4(%rsp),%eax
mov    -0x8(%rsp),%ecx
bt     %ecx,%eax
setb   %al
movzbl %al,%eax
mov    %eax,-0xc(%rsp)
mov    -0xc(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @asm_bt_reg2r_l(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @asm_bt_reg2r_l(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = bitcast i32* %5 to i8*
store i32 0, i32* %5
%7 = load i32, i32* %5
ret i32 %7
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  unsigned long selection;
};
struct TYPE_4__ {
  TYPE_1__ xselectionrequest;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xselectionrequest_selection(void *_p, unsigned long _v) {
  ((XEvent *)_p)->xselectionrequest.selection = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xselectionrequest_selection>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xselectionrequest_selection>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define void @set_XEvent_xselectionrequest_selection(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i64 %5, i64* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xselectionrequest_selection(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
void permute_4(void *data) {
  uint64_t t;
  t = (((uint64_t *)data)[(1)]);
  (((uint64_t *)data)[(1)]) = (((uint64_t *)data)[(3)]);
  (((uint64_t *)data)[(3)]) = t;
}


x86 assembly (clang, -O0):
<permute_4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0xc(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<permute_4>:
mov    0x4(%rdi),%eax
mov    0xc(%rdi),%ecx
mov    %ecx,0x4(%rdi)
mov    %eax,0xc(%rdi)
ret

LLVM IR (-O0):
define void @permute_4(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = getelementptr inbounds i32, i32* %5, i64 1
%7 = load i32, i32* %6
store i32 %7, i32* %3
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i32*
%10 = getelementptr inbounds i32, i32* %9, i64 3
%11 = load i32, i32* %10
%12 = load i8*, i8** %2
%13 = bitcast i8* %12 to i32*
%14 = getelementptr inbounds i32, i32* %13, i64 1
store i32 %11, i32* %14
%15 = load i32, i32* %3
%16 = load i8*, i8** %2
%17 = bitcast i8* %16 to i32*
%18 = getelementptr inbounds i32, i32* %17, i64 3
store i32 %15, i32* %18
ret void
}

LLVM IR (-O2):
define void @permute_4(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 4
%3 = bitcast i8* %2 to i32*
%4 = load i32, i32* %3
%5 = getelementptr inbounds i8, i8* %0, i64 12
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
store i32 %7, i32* %3
store i32 %4, i32* %6
ret void
}
int is_variable_char(char c) {
  return ((c) == '_') ||
         ((('a' <= (c) && (c) <= 'z') || ('A' <= (c) && (c) <= 'Z')) ||
          (('0' <= (c) && (c) <= '9')));
}


x86 assembly (clang, -O0):
<is_variable_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5f,%ecx
mov    %al,-0x2(%rbp)
je     1191 <is_variable_char+0x91>
movsbl -0x1(%rbp),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     113f <is_variable_char+0x3f>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7a,%ecx
mov    %al,-0x3(%rbp)
jle    118b <is_variable_char+0x8b>
movsbl -0x1(%rbp),%ecx
mov    $0x41,%eax
cmp    %ecx,%eax
jg     1162 <is_variable_char+0x62>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5a,%ecx
mov    %al,-0x3(%rbp)
jle    118b <is_variable_char+0x8b>
movsbl -0x1(%rbp),%edx
xor    %eax,%eax
mov    $0x30,%ecx
cmp    %edx,%ecx
mov    %al,-0x4(%rbp)
jg     1185 <is_variable_char+0x85>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x4(%rbp)
mov    -0x4(%rbp),%al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_variable_char>:
cmp    $0x5f,%dil
sete   %al
mov    %edi,%ecx
and    $0xdf,%cl
add    $0xbf,%cl
cmp    $0x1a,%cl
setb   %cl
add    $0xd0,%dil
cmp    $0xa,%dil
setb   %dl
or     %al,%dl
or     %cl,%dl
movzbl %dl,%eax
ret

LLVM IR (-O0):
define i32 @is_variable_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 95
br i1 %5, label %34, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 97, %8
br i1 %9, label %10, label %14
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp sle i32 %12, 122
br i1 %13, label %32, label %14
14: ; preds = %10, %6
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp sle i32 65, %16
br i1 %17, label %18, label %22
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp sle i32 %20, 90
br i1 %21, label %32, label %22
22: ; preds = %18, %14
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp sle i32 48, %24
br i1 %25, label %26, label %30
26: ; preds = %22
%27 = load i8, i8* %2
%28 = sext i8 %27 to i32
%29 = icmp sle i32 %28, 57
br label %30
30: ; preds = %26, %22
%31 = phi i1 [ false, %22 ], [ %29, %26 ]
br label %32
32: ; preds = %30, %18, %10
%33 = phi i1 [ true, %18 ], [ true, %10 ], [ %31, %30 ]
br label %34
34: ; preds = %32, %1
%35 = phi i1 [ true, %1 ], [ %33, %32 ]
%36 = zext i1 %35 to i32
ret i32 %36
}

LLVM IR (-O2):
define i32 @is_variable_char(i8 signext %0) {
%2 = icmp eq i8 %0, 95
%3 = and i8 %0, -33
%4 = add i8 %3, -65
%5 = icmp ult i8 %4, 26
%6 = or i1 %2, %5
%7 = add i8 %0, -48
%8 = icmp ult i8 %7, 10
%9 = or i1 %8, %6
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int random_select(int *, int /*<<< orphan*/, int, int);
int median(int *a, int l) { return random_select(a, 0, l, (l + 1) / 2); }


x86 assembly (clang, -O0):
<median>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    -0x10(%rbp),%edx
mov    %eax,%ecx
xor    %esi,%esi
call   1030 <random_select@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<median>:
mov    %esi,%edx
lea    0x1(%rdx),%eax
shr    $0x1f,%eax
lea    (%rdx,%rax,1),%ecx
add    $0x1,%ecx
sar    %ecx
xor    %esi,%esi
jmp    1030 <random_select@plt>

LLVM IR (-O0):
define i32 @median(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = load i32, i32* %4
%8 = add nsw i32 %7, 1
%9 = sdiv i32 %8, 2
%10 = call i32 @random_select(i32* %5, i32 0, i32 %6, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @median(i32* %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = sdiv i32 %3, 2
%5 = tail call i32 @random_select(i32* %0, i32 0, i32 %1, i32 %4)
ret i32 %5
}
/* Type definitions */
struct nary_node {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void ffierror(struct nary_node **root, void *scanner, const char *str) {
  fprintf(stderr, "[Non-Interactive] %s\n", str);
}


x86 assembly (clang, -O0):
<ffierror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
mov    -0x18(%rbp),%rdx
lea    0xec8(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffierror>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
%struct.nary_node = type { i32 }
@stderr = global i32 0
@.str = [22 x i8] c"[Non-Interactive] %s\0A\00"
define void @ffierror(%struct.nary_node** %0, i8* %1, i8* %2) {
%4 = alloca %struct.nary_node**
%5 = alloca i8*
%6 = alloca i8*
store %struct.nary_node** %0, %struct.nary_node*** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i32, i32* @stderr
%8 = load i8*, i8** %6
%9 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %8)
ret void
}

LLVM IR (-O2):
%struct.nary_node = type { i32 }
@stderr = global i32 0
@.str = [22 x i8] c"[Non-Interactive] %s\0A\00"
define void @ffierror(%struct.nary_node** nocapture readnone %0, i8* nocapture readnone %1, i8* %2) {
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ UAVObjLogging(int /*<<< orphan*/);
int /*<<< orphan*/ VtolSelfTuningStatsHandle();
void VtolSelfTuningStatsLogging() {
  UAVObjLogging(VtolSelfTuningStatsHandle());
}


x86 assembly (clang, -O0):
<VtolSelfTuningStatsLogging>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <VtolSelfTuningStatsHandle@plt>
mov    %eax,%edi
call   1030 <UAVObjLogging@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<VtolSelfTuningStatsLogging>:
push   %rax
xor    %eax,%eax
call   1040 <VtolSelfTuningStatsHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <UAVObjLogging@plt>

LLVM IR (-O0):
define void @VtolSelfTuningStatsLogging() {
%1 = call i32 (...) @VtolSelfTuningStatsHandle()
%2 = call i32 @UAVObjLogging(i32 %1)
ret void
}

LLVM IR (-O2):
define void @VtolSelfTuningStatsLogging() {
%1 = tail call i32 (...) @VtolSelfTuningStatsHandle()
%2 = tail call i32 @UAVObjLogging(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ffxmsg(int, char *);
int ffgmsg(char *err_message) {
  ffxmsg(4, err_message);
  return (*err_message);
}


x86 assembly (clang, -O0):
<ffgmsg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x4,%edi
call   1030 <ffxmsg@plt>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffgmsg>:
push   %rbx
mov    %rdi,%rbx
mov    $0x4,%edi
mov    %rbx,%rsi
call   1030 <ffxmsg@plt>
movsbl (%rbx),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ffgmsg(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @ffxmsg(i32 4, i8* %3)
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @ffgmsg(i8* %0) {
%2 = tail call i32 @ffxmsg(i32 4, i8* %0)
%3 = load i8, i8* %0
%4 = sext i8 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ count();
int main() {
  int i;
  for (i = 0; i < 10; i++)
    count();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jge    1145 <main+0x35>
mov    $0x0,%al
call   1030 <count@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <count@plt>
xor    %eax,%eax
call   1030 <count@plt>
xor    %eax,%eax
call   1030 <count@plt>
xor    %eax,%eax
call   1030 <count@plt>
xor    %eax,%eax
call   1030 <count@plt>
xor    %eax,%eax
call   1030 <count@plt>
xor    %eax,%eax
call   1030 <count@plt>
xor    %eax,%eax
call   1030 <count@plt>
xor    %eax,%eax
call   1030 <count@plt>
xor    %eax,%eax
call   1030 <count@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %8, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 (...) @count()
br label %8
8: ; preds = %6
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @count()
%2 = tail call i32 (...) @count()
%3 = tail call i32 (...) @count()
%4 = tail call i32 (...) @count()
%5 = tail call i32 (...) @count()
%6 = tail call i32 (...) @count()
%7 = tail call i32 (...) @count()
%8 = tail call i32 (...) @count()
%9 = tail call i32 (...) @count()
%10 = tail call i32 (...) @count()
ret i32 0
}
float cl_signum(float value) {
  if (value > 0)
    return 1;
  if (value < 0)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<cl_signum>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    112c <cl_signum+0x2c>
movss  0xee2(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1153 <cl_signum+0x53>
xorps  %xmm0,%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    114b <cl_signum+0x4b>
movss  0xebf(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1153 <cl_signum+0x53>
xorps  %xmm0,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cl_signum>:
xorps  %xmm1,%xmm1
movaps %xmm0,%xmm2
cmpltss %xmm1,%xmm2
movss  0xeed(%rip),%xmm3
andps  %xmm2,%xmm3
cmpltss %xmm0,%xmm1
movss  0xee1(%rip),%xmm0
andps  %xmm1,%xmm0
andnps %xmm3,%xmm1
orps   %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @cl_signum(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fcmp ogt float %4, 0.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store float 1.000000e+00, float* %2
br label %12
7: ; preds = %1
%8 = load float, float* %3
%9 = fcmp olt float %8, 0.000000e+00
br i1 %9, label %10, label %11
10: ; preds = %7
store float -1.000000e+00, float* %2
br label %12
11: ; preds = %7
store float 0.000000e+00, float* %2
br label %12
12: ; preds = %11, %10, %6
%13 = load float, float* %2
ret float %13
}

LLVM IR (-O2):
define float @cl_signum(float %0) {
%2 = fcmp ogt float %0, 0.000000e+00
%3 = fcmp olt float %0, 0.000000e+00
%4 = select i1 %3, float -1.000000e+00, float 0.000000e+00
%5 = select i1 %2, float 1.000000e+00, float %4
ret float %5
}
void smlag_destroy(struct smlag *lag __attribute__((unused))) {}


x86 assembly (clang, -O0):
<smlag_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<smlag_destroy>:
ret

LLVM IR (-O0):
%struct.smlag = type opaque
define void @smlag_destroy(%struct.smlag* %0) {
%2 = alloca %struct.smlag*
store %struct.smlag* %0, %struct.smlag** %2
ret void
}

LLVM IR (-O2):
%struct.smlag = type opaque
define void @smlag_destroy(%struct.smlag* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ link_failure_sinh();
scalar_t__ sinh(double);
void test_sinh(double d) {
  if (sinh(d) != sinh(d))
    link_failure_sinh();
}


x86 assembly (clang, -O0):
<test_sinh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sinh@plt>
mov    %rax,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sinh@plt>
mov    %rax,%rcx
mov    -0x10(%rbp),%rax
cmp    %rcx,%rax
je     115c <test_sinh+0x3c>
mov    $0x0,%al
call   1040 <link_failure_sinh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_sinh>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
call   1030 <sinh@plt>
mov    %rax,%rbx
movsd  0x8(%rsp),%xmm0
call   1030 <sinh@plt>
cmp    %rax,%rbx
jne    1149 <test_sinh+0x29>
add    $0x10,%rsp
pop    %rbx
ret
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
jmp    1040 <link_failure_sinh@plt>

LLVM IR (-O0):
define void @test_sinh(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i64 @sinh(double %3)
%5 = load double, double* %2
%6 = call i64 @sinh(double %5)
%7 = icmp ne i64 %4, %6
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @link_failure_sinh()
br label %10
10: ; preds = %8, %1
ret void
}

LLVM IR (-O2):
define void @test_sinh(double %0) {
%2 = tail call i64 @sinh(double %0)
%3 = tail call i64 @sinh(double %0)
%4 = icmp eq i64 %2, %3
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 (...) @link_failure_sinh()
br label %7
7: ; preds = %5, %1
ret void
}
__attribute__((visibility("default"))) void
marl_fiber_trampoline(void (*target)(void *), void *arg) {
  target(arg);
}


x86 assembly (clang, -O0):
<marl_fiber_trampoline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rdi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<marl_fiber_trampoline>:
mov    %rdi,%rax
mov    %rsi,%rdi
jmp    *%rax

LLVM IR (-O0):
define void @marl_fiber_trampoline(void (i8*)* %0, i8* %1) {
%3 = alloca void (i8*)*
%4 = alloca i8*
store void (i8*)* %0, void (i8*)** %3
store i8* %1, i8** %4
%5 = load void (i8*)*, void (i8*)** %3
%6 = load i8*, i8** %4
ret void
}

LLVM IR (-O2):
define void @marl_fiber_trampoline(void (i8*)* nocapture %0, i8* %1) {
tail call void %0(i8* %1)
ret void
}
/* Type definitions */
typedef char *u_short;

/* Variables and functions */
u_short _go32_my_cs() { asm("movw %cs,%ax"); }


x86 assembly (clang, -O0):
<_go32_my_cs>:
push   %rbp
mov    %rsp,%rbp
mov    %cs,%ax
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_go32_my_cs>:
mov    %cs,%ax
ret

LLVM IR (-O0):
define i8* @_go32_my_cs() {
%1 = alloca i8*
%2 = load i8*, i8** %1
ret i8* %2
}

LLVM IR (-O2):
define i8* @_go32_my_cs() {
tail call void asm sideeffect "movw %cs,%ax", "~{dirflag},~{fpsr},~{flags}"()
ret i8* undef
}
__typeof__(fprintf(1, 1, (void *)1)) test_fprintf_246(void) {
  return fprintf(1, 1, (void *)1);
}


x86 assembly (clang, -O0):
<test_fprintf_246>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%esi
mov    $0x1,%edx
mov    %esi,%edi
mov    $0x0,%al
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fprintf_246>:
mov    $0x1,%edx
mov    $0x1,%edi
mov    $0x1,%esi
xor    %eax,%eax
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
define i32 @test_fprintf_246() {
%1 = call i32 (i32, i32, i8*, ...) bitcast (i32 (...)* @fprintf to i32 (i32, i32, i8*, ...)*)(i32 1, i32 1, i8* inttoptr (i64 1 to i8*))
ret i32 %1
}

LLVM IR (-O2):
define i32 @test_fprintf_246() {
%1 = tail call i32 (i32, i32, i8*, ...) bitcast (i32 (...)* @fprintf to i32 (i32, i32, i8*, ...)*)(i32 1, i32 1, i8* inttoptr (i64 1 to i8*))
ret i32 %1
}
unsigned long casedjb2(const unsigned char *str) {
  unsigned long hash = 5381;
  int c;
  while ((c = *str++)) {
    if (('a' <= c) && (c <= 'z'))
      c += ('A' - 'a');
    hash = ((hash << 5) + hash) + c;
  }
  return hash;
}


x86 assembly (clang, -O0):
<casedjb2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1505,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movzbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
je     116b <casedjb2+0x6b>
mov    $0x61,%eax
cmp    -0x14(%rbp),%eax
jg     114f <casedjb2+0x4f>
cmpl   $0x7a,-0x14(%rbp)
jg     114f <casedjb2+0x4f>
mov    -0x14(%rbp),%eax
add    $0xffffffe0,%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
shl    $0x5,%rax
add    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <casedjb2+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<casedjb2>:
mov    (%rdi),%cl
test   %cl,%cl
je     113b <casedjb2+0x3b>
add    $0x1,%rdi
mov    $0x1505,%eax
nop
movzbl %cl,%ecx
lea    -0x61(%rcx),%edx
lea    -0x20(%rcx),%esi
cmp    $0x1a,%dl
cmovae %ecx,%esi
mov    %rax,%rcx
shl    $0x5,%rcx
add    %rax,%rcx
movslq %esi,%rax
add    %rcx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <casedjb2+0x10>
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @casedjb2(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 5381, i64* %3
br label %5
5: ; preds = %20, %1
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i32 1
store i8* %7, i8** %2
%8 = load i8, i8* %6
%9 = zext i8 %8 to i32
store i32 %9, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %28
11: ; preds = %5
%12 = load i32, i32* %4
%13 = icmp sle i32 97, %12
br i1 %13, label %14, label %20
14: ; preds = %11
%15 = load i32, i32* %4
%16 = icmp sle i32 %15, 122
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %4
%19 = add nsw i32 %18, -32
store i32 %19, i32* %4
br label %20
20: ; preds = %17, %14, %11
%21 = load i64, i64* %3
%22 = shl i64 %21, 5
%23 = load i64, i64* %3
%24 = add i64 %22, %23
%25 = load i32, i32* %4
%26 = sext i32 %25 to i64
%27 = add i64 %24, %26
store i64 %27, i64* %3
br label %5
28: ; preds = %5
%29 = load i64, i64* %3
ret i64 %29
}

LLVM IR (-O2):
define i64 @casedjb2(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %19, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %17, %4 ], [ %2, %1 ]
%6 = phi i64 [ %16, %4 ], [ 5381, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = zext i8 %5 to i32
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = add i8 %5, -97
%11 = icmp ult i8 %10, 26
%12 = add nsw i32 %8, -32
%13 = select i1 %11, i32 %12, i32 %8
%14 = mul i64 %6, 33
%15 = sext i32 %13 to i64
%16 = add i64 %14, %15
%17 = load i8, i8* %9
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %4
19: ; preds = %4, %1
%20 = phi i64 [ 5381, %1 ], [ %16, %4 ]
ret i64 %20
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t get_u32(uint8_t *ptr) { return *(uint32_t *)ptr; }


x86 assembly (clang, -O0):
<get_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_u32>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @get_u32(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @get_u32(i32* nocapture %0) {
%2 = load i32, i32* %0
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int *calloc(int, int);
int main(void) {
  int *r = calloc(5, sizeof(int));
  assert(r[0] == 0);
  r[0] = 3;
  assert(r[0] == 3);
  int z = r[1];
  assert(z == 0);
  assert(z != 365);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x5,%edi
mov    $0x4,%esi
call   1030 <calloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0x0,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rax
movl   $0x3,(%rax)
mov    -0x8(%rbp),%rax
cmpl   $0x3,(%rax)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
cmpl   $0x16d,-0xc(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x5,%edi
mov    $0x4,%esi
call   1030 <calloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
cmpl   $0x0,(%rax)
sete   %dil
call   1040 <assert@plt>
mov    $0x1,%edi
call   1040 <assert@plt>
mov    0x4(%rbx),%ebx
xor    %edi,%edi
test   %ebx,%ebx
sete   %dil
call   1040 <assert@plt>
xor    %edi,%edi
cmp    $0x16d,%ebx
setne  %dil
call   1040 <assert@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32*
%2 = alloca i32
%3 = call i32* @calloc(i32 5, i32 4)
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = getelementptr inbounds i32, i32* %4, i64 0
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 0
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
%10 = load i32*, i32** %1
%11 = getelementptr inbounds i32, i32* %10, i64 0
store i32 3, i32* %11
%12 = load i32*, i32** %1
%13 = getelementptr inbounds i32, i32* %12, i64 0
%14 = load i32, i32* %13
%15 = icmp eq i32 %14, 3
%16 = zext i1 %15 to i32
%17 = call i32 @assert(i32 %16)
%18 = load i32*, i32** %1
%19 = getelementptr inbounds i32, i32* %18, i64 1
%20 = load i32, i32* %19
store i32 %20, i32* %2
%21 = load i32, i32* %2
%22 = icmp eq i32 %21, 0
%23 = zext i1 %22 to i32
%24 = call i32 @assert(i32 %23)
%25 = load i32, i32* %2
%26 = icmp ne i32 %25, 365
%27 = zext i1 %26 to i32
%28 = call i32 @assert(i32 %27)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32* @calloc(i32 5, i32 4)
%2 = load i32, i32* %1
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = tail call i32 @assert(i32 1)
%7 = getelementptr inbounds i32, i32* %1, i64 1
%8 = load i32, i32* %7
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
%11 = tail call i32 @assert(i32 %10)
%12 = icmp ne i32 %8, 365
%13 = zext i1 %12 to i32
%14 = tail call i32 @assert(i32 %13)
ret i32 0
}
/* Variables and functions */
int SIGWINCH;
int /*<<< orphan*/ set_window_rows();
void sighandler(int num) {
  if (num == SIGWINCH)
    set_window_rows();
}


x86 assembly (clang, -O0):
<sighandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ec3(%rip),%rcx
cmp    (%rcx),%eax
jne    1134 <sighandler+0x24>
mov    $0x0,%al
call   1030 <set_window_rows@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sighandler>:
mov    0x2ed1(%rip),%rax
cmp    %edi,(%rax)
jne    1122 <sighandler+0x12>
xor    %eax,%eax
jmp    1030 <set_window_rows@plt>
ret

LLVM IR (-O0):
@SIGWINCH = global i32 0
define void @sighandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGWINCH
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 (...) @set_window_rows()
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
@SIGWINCH = global i32 0
define void @sighandler(i32 %0) {
%2 = load i32, i32* @SIGWINCH
%3 = icmp eq i32 %2, %0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 (...) @set_window_rows()
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
scalar_t__ malloc(size_t);
int /*<<< orphan*/ perror(char *);
void *my_alloc(size_t size) {
  void *ret = (void *)malloc(size);
  if (ret == NULL)
    perror("rux");
  return ret;
}


x86 assembly (clang, -O0):
<my_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1150 <my_alloc+0x30>
lea    0xeb5(%rip),%rdi
call   1040 <perror@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_alloc>:
push   %rbx
call   1030 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     1133 <my_alloc+0x13>
mov    %rbx,%rax
pop    %rbx
ret
lea    0xec6(%rip),%rdi
call   1040 <perror@plt>
jmp    112e <my_alloc+0xe>

LLVM IR (-O0):
@.str = [4 x i8] c"rux\00"
define i8* @my_alloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 @malloc(i64 %4)
%6 = inttoptr i64 %5 to i8*
store i8* %6, i8** %3
%7 = load i8*, i8** %3
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @perror(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %1
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
@.str = [4 x i8] c"rux\00"
define i8* @my_alloc(i64 %0) {
%2 = tail call i64 @malloc(i64 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @perror(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
%7 = inttoptr i64 %2 to i8*
ret i8* %7
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ __setCHRBank5Low(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ vrc2_4_SetChrROMBank5();
void vrc2_4_setParamsDXX2(uint16_t addr, uint8_t val) {
  __setCHRBank5Low(addr, val);
  vrc2_4_SetChrROMBank5();
}


x86 assembly (clang, -O0):
<vrc2_4_setParamsDXX2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1040 <__setCHRBank5Low@plt>
mov    $0x0,%al
call   1030 <vrc2_4_SetChrROMBank5@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vrc2_4_setParamsDXX2>:
push   %rax
call   1040 <__setCHRBank5Low@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <vrc2_4_SetChrROMBank5@plt>

LLVM IR (-O0):
define void @vrc2_4_setParamsDXX2(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @__setCHRBank5Low(i32 %5, i32 %6)
%8 = call i32 (...) @vrc2_4_SetChrROMBank5()
ret void
}

LLVM IR (-O2):
define void @vrc2_4_setParamsDXX2(i32 %0, i32 %1) {
%3 = tail call i32 @__setCHRBank5Low(i32 %0, i32 %1)
%4 = tail call i32 (...) @vrc2_4_SetChrROMBank5()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ hoic_sw(int, int);
int hdoip_cli_store(int fd, int fdr, char **argv, int argc) {
  hoic_sw(fd, (0x32000007));
  return 0;
}


x86 assembly (clang, -O0):
<hdoip_cli_store>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x32000007,%esi
call   1030 <hoic_sw@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdoip_cli_store>:
push   %rax
mov    $0x32000007,%esi
call   1030 <hoic_sw@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @hdoip_cli_store(i32 %0, i32 %1, i8** %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = call i32 @hoic_sw(i32 %9, i32 838860807)
ret i32 0
}

LLVM IR (-O2):
define i32 @hdoip_cli_store(i32 %0, i32 %1, i8** nocapture readnone %2, i32 %3) {
%5 = tail call i32 @hoic_sw(i32 %0, i32 838860807)
ret i32 0
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int ts_minus(const struct timespec *tsp1, const struct timespec *tsp2) {
  return (tsp1->tv_sec - tsp2->tv_sec) * 1000 +
         (tsp1->tv_nsec - tsp2->tv_nsec) / 1000000;
}


x86 assembly (clang, -O0):
<ts_minus>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
imul   $0x3e8,%eax,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%eax
mov    -0x10(%rbp),%rcx
sub    0x4(%rcx),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ts_minus>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
sub    (%rsi),%eax
imul   $0x3e8,%eax,%edx
sub    0x4(%rsi),%ecx
movslq %ecx,%rax
imul   $0x431bde83,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x32,%rax
add    %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define i32 @ts_minus(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %3
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 0
%7 = load i32, i32* %6
%8 = load %struct.timespec*, %struct.timespec** %4
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %8, i32 0, i32 0
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
%12 = mul nsw i32 %11, 1000
%13 = load %struct.timespec*, %struct.timespec** %3
%14 = getelementptr inbounds %struct.timespec, %struct.timespec* %13, i32 0, i32 1
%15 = load i32, i32* %14
%16 = load %struct.timespec*, %struct.timespec** %4
%17 = getelementptr inbounds %struct.timespec, %struct.timespec* %16, i32 0, i32 1
%18 = load i32, i32* %17
%19 = sub nsw i32 %15, %18
%20 = sdiv i32 %19, 1000000
%21 = add nsw i32 %12, %20
ret i32 %21
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define i32 @ts_minus(%struct.timespec* nocapture %0, %struct.timespec* nocapture %1) {
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%4 = load i32, i32* %3
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
%8 = mul nsw i32 %7, 1000
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
%10 = load i32, i32* %9
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%12 = load i32, i32* %11
%13 = sub nsw i32 %10, %12
%14 = sdiv i32 %13, 1000000
%15 = add nsw i32 %14, %8
ret i32 %15
}
int factRecurs(int x) {
  if (x != 1)
    return x * factRecurs(x - 1);
}


x86 assembly (clang, -O0):
<factRecurs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     1141 <factRecurs+0x31>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <factRecurs@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
imul   %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<factRecurs>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @factRecurs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp ne i32 %4, 1
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %3
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @factRecurs(i32 %9)
%11 = mul nsw i32 %7, %10
store i32 %11, i32* %2
br label %12
12: ; preds = %6, %1
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @factRecurs(i32 %0) {
ret i32 0
}
/* Type definitions */
struct set {
  int dummy;
};

/* Variables and functions */
scalar_t__ generic_ptr(int, int);
struct set *set_ptr(int number) {
  return ((struct set *)generic_ptr(46, number));
}


x86 assembly (clang, -O0):
<set_ptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x2e,%edi
call   1030 <generic_ptr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_ptr>:
mov    %edi,%esi
mov    $0x2e,%edi
jmp    1030 <generic_ptr@plt>

LLVM IR (-O0):
%struct.set = type { i32 }
define %struct.set* @set_ptr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @generic_ptr(i32 46, i32 %3)
%5 = inttoptr i64 %4 to %struct.set*
ret %struct.set* %5
}

LLVM IR (-O2):
%struct.set = type { i32 }
define %struct.set* @set_ptr(i32 %0) {
%2 = tail call i64 @generic_ptr(i32 46, i32 %0)
%3 = inttoptr i64 %2 to %struct.set*
ret %struct.set* %3
}