#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ cpuid(int, int *, int *, int *, int *);
int get_vendor();
int /*<<< orphan*/ have_cpuid();
int /*<<< orphan*/ support_avx();
int cpu_detect() {
  int eax, ebx, ecx, edx;
  int vendor, family, extend_family, model, extend_model;
  if (!have_cpuid())
    return 0;
  vendor = get_vendor();
  cpuid(1, &eax, &ebx, &ecx, &edx);
  extend_family = ((((eax) >> (20)) & (0xff)));
  extend_model = ((((eax) >> (16)) & (0x0f)));
  family = ((((eax) >> (8)) & (0x0f)));
  model = ((((eax) >> (4)) & (0x0f)));
  if (vendor == 1) {
    switch (family) {
    case 0x6:
      switch (extend_model) {
      case 1:
        switch (model) {
        case 7:
          return 1;
        case 13:
          return 1;
        }
        break;
      case 2:
        switch (model) {
        case 10:
        case 13:
          if (support_avx()) {
            return 2;
          } else {
            return 0;
          }
        }
        break;
      case 3:
        switch (model) {
        case 10:
        case 14:
          if (support_avx()) {
            return 2;
          } else {
            return 0;
          }
        case 12:
        case 15:
        case 13:
          if (support_avx()) {
            return 3;
          } else {
            return 0;
          }
        }
        break;
      case 4:
        switch (model) {
        case 5:
        case 6:
        case 7:
        case 15:
          if (support_avx()) {
            return 3;
          } else {
            return 0;
          }
        }
        break;
      case 5:
        switch (model) {
        case 6:
          if (support_avx()) {
            return 3;
          } else {
            return 0;
          }
        }
        break;
      }
      break;
    }
  } else if (vendor == 2) {
    switch (family) {
    case 0xf:
      switch (extend_family) {
      case 6:
        switch (model) {
        case 1:
          if (support_avx())
            return 4;
          else
            return 0;
        case 2:
          if (support_avx())
            return 5;
          else
            return 0;
        case 0:
          if (support_avx())
            return 5;
          else
            return 0;
        }
      }
      break;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<cpu_detect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    $0x0,%al
call   1060 <have_cpuid@plt>
cmp    $0x0,%eax
jne    1164 <cpu_detect+0x24>
movl   $0x0,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
mov    $0x0,%al
call   1030 <get_vendor@plt>
mov    %eax,-0x18(%rbp)
mov    $0x1,%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
lea    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%r8
call   1050 <cpuid@plt>
mov    -0x8(%rbp),%eax
sar    $0x14,%eax
and    $0xff,%eax
mov    %eax,-0x20(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x10,%eax
and    $0xf,%eax
mov    %eax,-0x28(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x8,%eax
and    $0xf,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x4,%eax
and    $0xf,%eax
mov    %eax,-0x24(%rbp)
cmpl   $0x1,-0x18(%rbp)
jne    13ce <cpu_detect+0x28e>
mov    -0x1c(%rbp),%eax
sub    $0x6,%eax
jne    13c9 <cpu_detect+0x289>
jmp    11d5 <cpu_detect+0x95>
mov    -0x28(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x30(%rbp)
sub    $0x4,%eax
ja     13c4 <cpu_detect+0x284>
mov    -0x30(%rbp),%rax
lea    0xe0b(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x24(%rbp),%eax
mov    %eax,-0x34(%rbp)
sub    $0x7,%eax
je     1223 <cpu_detect+0xe3>
jmp    1212 <cpu_detect+0xd2>
mov    -0x34(%rbp),%eax
sub    $0xd,%eax
je     122f <cpu_detect+0xef>
jmp    123b <cpu_detect+0xfb>
movl   $0x1,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
movl   $0x1,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
jmp    13c4 <cpu_detect+0x284>
mov    -0x24(%rbp),%eax
mov    %eax,-0x38(%rbp)
sub    $0xa,%eax
je     1265 <cpu_detect+0x125>
jmp    1254 <cpu_detect+0x114>
mov    -0x38(%rbp),%eax
sub    $0xd,%eax
jne    128d <cpu_detect+0x14d>
jmp    1265 <cpu_detect+0x125>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1281 <cpu_detect+0x141>
movl   $0x2,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
movl   $0x0,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
jmp    13c4 <cpu_detect+0x284>
mov    -0x24(%rbp),%eax
mov    %eax,-0x3c(%rbp)
sub    $0xa,%eax
je     12dc <cpu_detect+0x19c>
jmp    12a6 <cpu_detect+0x166>
mov    -0x3c(%rbp),%eax
add    $0xfffffff4,%eax
sub    $0x2,%eax
jb     1304 <cpu_detect+0x1c4>
jmp    12ba <cpu_detect+0x17a>
mov    -0x3c(%rbp),%eax
sub    $0xe,%eax
je     12dc <cpu_detect+0x19c>
jmp    12cb <cpu_detect+0x18b>
mov    -0x3c(%rbp),%eax
sub    $0xf,%eax
je     1304 <cpu_detect+0x1c4>
jmp    132c <cpu_detect+0x1ec>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     12f8 <cpu_detect+0x1b8>
movl   $0x2,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
movl   $0x0,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1320 <cpu_detect+0x1e0>
movl   $0x3,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
movl   $0x0,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
jmp    13c4 <cpu_detect+0x284>
mov    -0x24(%rbp),%eax
mov    %eax,-0x40(%rbp)
add    $0xfffffffb,%eax
sub    $0x3,%eax
jb     1359 <cpu_detect+0x219>
jmp    1348 <cpu_detect+0x208>
mov    -0x40(%rbp),%eax
sub    $0xf,%eax
jne    1381 <cpu_detect+0x241>
jmp    1359 <cpu_detect+0x219>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1375 <cpu_detect+0x235>
movl   $0x3,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
movl   $0x0,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
jmp    13c4 <cpu_detect+0x284>
mov    -0x24(%rbp),%eax
sub    $0x6,%eax
jne    13bf <cpu_detect+0x27f>
jmp    1397 <cpu_detect+0x257>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     13b3 <cpu_detect+0x273>
movl   $0x3,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
movl   $0x0,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
jmp    13c4 <cpu_detect+0x284>
jmp    13c9 <cpu_detect+0x289>
jmp    14bb <cpu_detect+0x37b>
cmpl   $0x2,-0x18(%rbp)
jne    14b6 <cpu_detect+0x376>
mov    -0x1c(%rbp),%eax
sub    $0xf,%eax
jne    14b1 <cpu_detect+0x371>
jmp    13e9 <cpu_detect+0x2a9>
mov    -0x20(%rbp),%eax
sub    $0x6,%eax
jne    14ac <cpu_detect+0x36c>
jmp    13fa <cpu_detect+0x2ba>
mov    -0x24(%rbp),%eax
mov    %eax,-0x44(%rbp)
test   %eax,%eax
je     147f <cpu_detect+0x33f>
jmp    140d <cpu_detect+0x2cd>
mov    -0x44(%rbp),%eax
sub    $0x1,%eax
je     142f <cpu_detect+0x2ef>
jmp    141e <cpu_detect+0x2de>
mov    -0x44(%rbp),%eax
sub    $0x2,%eax
je     1457 <cpu_detect+0x317>
jmp    14a7 <cpu_detect+0x367>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     144b <cpu_detect+0x30b>
movl   $0x4,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
movl   $0x0,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     1473 <cpu_detect+0x333>
movl   $0x5,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
movl   $0x0,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
mov    $0x0,%al
call   1040 <support_avx@plt>
cmp    $0x0,%eax
je     149b <cpu_detect+0x35b>
movl   $0x5,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
movl   $0x0,-0x4(%rbp)
jmp    14c2 <cpu_detect+0x382>
jmp    14ac <cpu_detect+0x36c>
jmp    14b1 <cpu_detect+0x371>
jmp    14b6 <cpu_detect+0x376>
jmp    14bb <cpu_detect+0x37b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_detect>:
push   %rbp
push   %rbx
sub    $0x18,%rsp
xor    %ebx,%ebx
xor    %eax,%eax
call   1060 <have_cpuid@plt>
test   %eax,%eax
je     1289 <cpu_detect+0x149>
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <get_vendor@plt>
mov    %eax,%ebp
lea    0x8(%rsp),%rsi
lea    0x14(%rsp),%rdx
lea    0x10(%rsp),%rcx
lea    0xc(%rsp),%r8
mov    $0x1,%edi
call   1050 <cpuid@plt>
mov    0x8(%rsp),%ecx
mov    %ecx,%edx
shr    $0x8,%edx
and    $0xf,%edx
mov    %ecx,%eax
shr    $0x4,%eax
and    $0xf,%eax
cmp    $0x1,%ebp
jne    11da <cpu_detect+0x9a>
cmp    $0x6,%edx
jne    1289 <cpu_detect+0x149>
shr    $0x10,%ecx
and    $0xf,%ecx
add    $0xffffffff,%ecx
cmp    $0x4,%ecx
ja     1289 <cpu_detect+0x149>
lea    0xe45(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
cmp    $0x7,%eax
sete   %cl
cmp    $0xd,%eax
sete   %al
or     %cl,%al
movzbl %al,%ebx
jmp    1289 <cpu_detect+0x149>
cmp    $0x2,%ebp
jne    1289 <cpu_detect+0x149>
cmp    $0xf,%edx
jne    1289 <cpu_detect+0x149>
and    $0xff00000,%ecx
cmp    $0x600000,%ecx
jne    1289 <cpu_detect+0x149>
test   %eax,%eax
je     121f <cpu_detect+0xdf>
cmp    $0x2,%eax
je     121f <cpu_detect+0xdf>
cmp    $0x1,%eax
jne    1289 <cpu_detect+0x149>
xor    %eax,%eax
call   1040 <support_avx@plt>
xor    %ebx,%ebx
test   %eax,%eax
setne  %bl
shl    $0x2,%ebx
jmp    1289 <cpu_detect+0x149>
xor    %eax,%eax
call   1040 <support_avx@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
lea    (%rcx,%rcx,4),%ebx
jmp    1289 <cpu_detect+0x149>
cmp    $0xd,%eax
je     1257 <cpu_detect+0x117>
cmp    $0xa,%eax
je     1257 <cpu_detect+0x117>
jmp    1289 <cpu_detect+0x149>
cmp    $0xf,%eax
ja     1289 <cpu_detect+0x149>
mov    $0xb000,%ecx
bt     %eax,%ecx
jb     1278 <cpu_detect+0x138>
mov    $0x4400,%ecx
bt     %eax,%ecx
jae    1289 <cpu_detect+0x149>
xor    %eax,%eax
call   1040 <support_avx@plt>
xor    %ebx,%ebx
test   %eax,%eax
setne  %bl
add    %ebx,%ebx
jmp    1289 <cpu_detect+0x149>
cmp    $0xf,%eax
ja     1289 <cpu_detect+0x149>
mov    $0x80e0,%ecx
bt     %eax,%ecx
jae    1289 <cpu_detect+0x149>
xor    %eax,%eax
call   1040 <support_avx@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
lea    (%rcx,%rcx,2),%ebx
mov    %ebx,%eax
add    $0x18,%rsp
pop    %rbx
pop    %rbp
ret
cmp    $0x6,%eax
je     1278 <cpu_detect+0x138>
jmp    1289 <cpu_detect+0x149>

LLVM IR (-O0):
define i32 @cpu_detect() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = call i32 (...) @have_cpuid()
%12 = icmp ne i32 %11, 0
br i1 %12, label %14, label %13
13: ; preds = %0
store i32 0, i32* %1
br label %108
14: ; preds = %0
%15 = call i32 (...) @get_vendor()
store i32 %15, i32* %6
%16 = call i32 @cpuid(i32 1, i32* %2, i32* %3, i32* %4, i32* %5)
%17 = load i32, i32* %2
%18 = ashr i32 %17, 20
%19 = and i32 %18, 255
store i32 %19, i32* %8
%20 = load i32, i32* %2
%21 = ashr i32 %20, 16
%22 = and i32 %21, 15
store i32 %22, i32* %10
%23 = load i32, i32* %2
%24 = ashr i32 %23, 8
%25 = and i32 %24, 15
store i32 %25, i32* %7
%26 = load i32, i32* %2
%27 = ashr i32 %26, 4
%28 = and i32 %27, 15
store i32 %28, i32* %9
%29 = load i32, i32* %6
%30 = icmp eq i32 %29, 1
br i1 %30, label %31, label %79
31: ; preds = %14
%32 = load i32, i32* %7
switch i32 %32, label %78 [
i32 6, label %33
]
33: ; preds = %31
%34 = load i32, i32* %10
switch i32 %34, label %77 [
i32 1, label %35
i32 2, label %40
i32 3, label %48
i32 4, label %61
i32 5, label %69
]
35: ; preds = %33
%36 = load i32, i32* %9
switch i32 %36, label %39 [
i32 7, label %37
i32 13, label %38
]
37: ; preds = %35
store i32 1, i32* %1
br label %108
38: ; preds = %35
store i32 1, i32* %1
br label %108
39: ; preds = %35
br label %77
40: ; preds = %33
%41 = load i32, i32* %9
switch i32 %41, label %47 [
i32 10, label %42
i32 13, label %42
]
42: ; preds = %40, %40
%43 = call i32 (...) @support_avx()
%44 = icmp ne i32 %43, 0
br i1 %44, label %45, label %46
45: ; preds = %42
store i32 2, i32* %1
br label %108
46: ; preds = %42
store i32 0, i32* %1
br label %108
47: ; preds = %40
br label %77
48: ; preds = %33
%49 = load i32, i32* %9
switch i32 %49, label %60 [
i32 10, label %50
i32 14, label %50
i32 12, label %55
i32 15, label %55
i32 13, label %55
]
50: ; preds = %48, %48
%51 = call i32 (...) @support_avx()
%52 = icmp ne i32 %51, 0
br i1 %52, label %53, label %54
53: ; preds = %50
store i32 2, i32* %1
br label %108
54: ; preds = %50
store i32 0, i32* %1
br label %108
55: ; preds = %48, %48, %48
%56 = call i32 (...) @support_avx()
%57 = icmp ne i32 %56, 0
br i1 %57, label %58, label %59
58: ; preds = %55
store i32 3, i32* %1
br label %108
59: ; preds = %55
store i32 0, i32* %1
br label %108
60: ; preds = %48
br label %77
61: ; preds = %33
%62 = load i32, i32* %9
switch i32 %62, label %68 [
i32 5, label %63
i32 6, label %63
i32 7, label %63
i32 15, label %63
]
63: ; preds = %61, %61, %61, %61
%64 = call i32 (...) @support_avx()
%65 = icmp ne i32 %64, 0
br i1 %65, label %66, label %67
66: ; preds = %63
store i32 3, i32* %1
br label %108
67: ; preds = %63
store i32 0, i32* %1
br label %108
68: ; preds = %61
br label %77
69: ; preds = %33
%70 = load i32, i32* %9
switch i32 %70, label %76 [
i32 6, label %71
]
71: ; preds = %69
%72 = call i32 (...) @support_avx()
%73 = icmp ne i32 %72, 0
br i1 %73, label %74, label %75
74: ; preds = %71
store i32 3, i32* %1
br label %108
75: ; preds = %71
store i32 0, i32* %1
br label %108
76: ; preds = %69
br label %77
77: ; preds = %33, %76, %68, %60, %47, %39
br label %78
78: ; preds = %31, %77
br label %107
79: ; preds = %14
%80 = load i32, i32* %6
%81 = icmp eq i32 %80, 2
br i1 %81, label %82, label %106
82: ; preds = %79
%83 = load i32, i32* %7
switch i32 %83, label %105 [
i32 15, label %84
]
84: ; preds = %82
%85 = load i32, i32* %8
switch i32 %85, label %104 [
i32 6, label %86
]
86: ; preds = %84
%87 = load i32, i32* %9
switch i32 %87, label %103 [
i32 1, label %88
i32 2, label %93
i32 0, label %98
]
88: ; preds = %86
%89 = call i32 (...) @support_avx()
%90 = icmp ne i32 %89, 0
br i1 %90, label %91, label %92
91: ; preds = %88
store i32 4, i32* %1
br label %108
92: ; preds = %88
store i32 0, i32* %1
br label %108
93: ; preds = %86
%94 = call i32 (...) @support_avx()
%95 = icmp ne i32 %94, 0
br i1 %95, label %96, label %97
96: ; preds = %93
store i32 5, i32* %1
br label %108
97: ; preds = %93
store i32 0, i32* %1
br label %108
98: ; preds = %86
%99 = call i32 (...) @support_avx()
%100 = icmp ne i32 %99, 0
br i1 %100, label %101, label %102
101: ; preds = %98
store i32 5, i32* %1
br label %108
102: ; preds = %98
store i32 0, i32* %1
br label %108
103: ; preds = %86
br label %104
104: ; preds = %103, %84
br label %105
105: ; preds = %82, %104
br label %106
106: ; preds = %105, %79
br label %107
107: ; preds = %106, %78
store i32 0, i32* %1
br label %108
108: ; preds = %107, %102, %101, %97, %96, %92, %91, %75, %74, %67, %66, %59, %58, %54, %53, %46, %45, %38, %37, %13
%109 = load i32, i32* %1
ret i32 %109
}

LLVM IR (-O2):
define i32 @cpu_detect() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %1 to i8*
%6 = bitcast i32* %2 to i8*
%7 = bitcast i32* %3 to i8*
%8 = bitcast i32* %4 to i8*
%9 = tail call i32 (...) @have_cpuid()
%10 = icmp eq i32 %9, 0
br i1 %10, label %75, label %11
11: ; preds = %0
%12 = tail call i32 (...) @get_vendor()
%13 = call i32 @cpuid(i32 1, i32* %1, i32* %2, i32* %3, i32* %4)
%14 = load i32, i32* %1
%15 = lshr i32 %14, 16
%16 = and i32 %15, 15
%17 = lshr i32 %14, 8
%18 = and i32 %17, 15
%19 = lshr i32 %14, 4
%20 = and i32 %19, 15
%21 = icmp eq i32 %12, 1
br i1 %21, label %22, label %55
22: ; preds = %11
%23 = icmp eq i32 %18, 6
br i1 %23, label %24, label %75
24: ; preds = %22
switch i32 %16, label %75 [
i32 1, label %25
i32 2, label %30
i32 3, label %35
i32 4, label %44
i32 5, label %49
]
25: ; preds = %24
%26 = icmp eq i32 %20, 7
%27 = icmp eq i32 %20, 13
%28 = or i1 %26, %27
%29 = zext i1 %28 to i32
br label %75
30: ; preds = %24
switch i32 %20, label %75 [
i32 10, label %31
i32 13, label %31
]
31: ; preds = %30, %30
%32 = call i32 (...) @support_avx()
%33 = icmp eq i32 %32, 0
%34 = select i1 %33, i32 0, i32 2
br label %75
35: ; preds = %24
switch i32 %20, label %75 [
i32 10, label %36
i32 14, label %36
i32 12, label %40
i32 15, label %40
i32 13, label %40
]
36: ; preds = %35, %35
%37 = call i32 (...) @support_avx()
%38 = icmp eq i32 %37, 0
%39 = select i1 %38, i32 0, i32 2
br label %75
40: ; preds = %35, %35, %35
%41 = call i32 (...) @support_avx()
%42 = icmp eq i32 %41, 0
%43 = select i1 %42, i32 0, i32 3
br label %75
44: ; preds = %24
switch i32 %20, label %75 [
i32 5, label %45
i32 6, label %45
i32 7, label %45
i32 15, label %45
]
45: ; preds = %44, %44, %44, %44
%46 = call i32 (...) @support_avx()
%47 = icmp eq i32 %46, 0
%48 = select i1 %47, i32 0, i32 3
br label %75
49: ; preds = %24
%50 = icmp eq i32 %20, 6
br i1 %50, label %51, label %75
51: ; preds = %49
%52 = call i32 (...) @support_avx()
%53 = icmp eq i32 %52, 0
%54 = select i1 %53, i32 0, i32 3
br label %75
55: ; preds = %11
%56 = icmp eq i32 %12, 2
%57 = icmp eq i32 %18, 15
%58 = select i1 %56, i1 %57, i1 false
%59 = and i32 %14, 267386880
%60 = icmp eq i32 %59, 6291456
%61 = select i1 %58, i1 %60, i1 false
br i1 %61, label %62, label %75
62: ; preds = %55
switch i32 %20, label %75 [
i32 1, label %63
i32 2, label %67
i32 0, label %71
]
63: ; preds = %62
%64 = call i32 (...) @support_avx()
%65 = icmp eq i32 %64, 0
%66 = select i1 %65, i32 0, i32 4
br label %75
67: ; preds = %62
%68 = call i32 (...) @support_avx()
%69 = icmp eq i32 %68, 0
%70 = select i1 %69, i32 0, i32 5
br label %75
71: ; preds = %62
%72 = call i32 (...) @support_avx()
%73 = icmp eq i32 %72, 0
%74 = select i1 %73, i32 0, i32 5
br label %75
75: ; preds = %24, %30, %35, %44, %49, %22, %62, %55, %71, %67, %63, %51, %45, %40, %36, %31, %25, %0
%76 = phi i32 [ 0, %0 ], [ %29, %25 ], [ %34, %31 ], [ %39, %36 ], [ %43, %40 ], [ %48, %45 ], [ %54, %51 ], [ %66, %63 ], [ %70, %67 ], [ %74, %71 ], [ 0, %55 ], [ 0, %62 ], [ 0, %22 ], [ 0, %49 ], [ 0, %44 ], [ 0, %35 ], [ 0, %30 ], [ 0, %24 ]
ret i32 %76
}