xunge/DecIR huggingface dataset:
int parityb(unsigned char x) {
  __asm__ __volatile__("test %1,%1;setpo %0" : "=q"(x) : "q"(x));
  return x;
}


x86 assembly (clang, -O0):
<parityb>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
test   %al,%al
setnp  %al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parityb>:
test   %dil,%dil
setnp  %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @parityb(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i8 asm sideeffect "test $1,$1;setpo $0", "=q,q,~{dirflag},~{fpsr},~{flags}"(i8 %3)
store i8 %4, i8* %2
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @parityb(i8 zeroext %0) {
%2 = tail call i8 asm sideeffect "test $1,$1;setpo $0", "=q,q,~{dirflag},~{fpsr},~{flags}"(i8 %0)
%3 = zext i8 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
unsigned int egd_get_data_size(unsigned int type) {
  unsigned int size = 0;
  if (type == 0)
    size = sizeof(int32_t);
  else if (type == 1)
    size = sizeof(float);
  else if (type == 2)
    size = sizeof(double);
  return size;
}


x86 assembly (clang, -O0):
<egd_get_data_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1124 <egd_get_data_size+0x24>
movl   $0x4,-0x8(%rbp)
jmp    1155 <egd_get_data_size+0x55>
cmpl   $0x1,-0x4(%rbp)
jne    113a <egd_get_data_size+0x3a>
movl   $0x4,-0x8(%rbp)
jmp    1150 <egd_get_data_size+0x50>
cmpl   $0x2,-0x4(%rbp)
jne    114b <egd_get_data_size+0x4b>
movl   $0x8,-0x8(%rbp)
jmp    1150 <egd_get_data_size+0x50>
jmp    1155 <egd_get_data_size+0x55>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<egd_get_data_size>:
xor    %eax,%eax
cmp    $0x2,%edi
ja     1114 <egd_get_data_size+0x14>
movslq %edi,%rax
lea    0xeef(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @egd_get_data_size(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 4, i32* %3
br label %17
7: ; preds = %1
%8 = load i32, i32* %2
%9 = icmp eq i32 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 4, i32* %3
br label %16
11: ; preds = %7
%12 = load i32, i32* %2
%13 = icmp eq i32 %12, 2
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 8, i32* %3
br label %15
15: ; preds = %14, %11
br label %16
16: ; preds = %15, %10
br label %17
17: ; preds = %16, %6
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@switch.table.egd_get_data_size = [3 x i32] [i32 4, i32 4, i32 8]
define i32 @egd_get_data_size(i32 %0) {
%2 = icmp ult i32 %0, 3
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds [3 x i32], [3 x i32]* @switch.table.egd_get_data_size, i64 0, i64 %4
%6 = load i32, i32* %5
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 0, %1 ]
ret i32 %8
}
void mount_config_init(char *program) {}


x86 assembly (clang, -O0):
<mount_config_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mount_config_init>:
ret

LLVM IR (-O0):
define void @mount_config_init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @mount_config_init(i8* nocapture %0) {
ret void
}
/* Variables and functions */
double M_PI;
int /*<<< orphan*/ printf(char *, double);
void loop(int count) {
  int i;
  for (i = 0; i < count; i++)
    printf("hi mom %g\n", (double)i * M_PI);
}


x86 assembly (clang, -O0):
<loop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1158 <loop+0x48>
cvtsi2sdl -0x8(%rbp),%xmm0
mov    0x2eae(%rip),%rax
mulsd  (%rax),%xmm0
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <loop+0x12>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
test   %edi,%edi
jle    116a <loop+0x5a>
mov    %edi,%ebx
xorpd  %xmm1,%xmm1
mov    0x2ebe(%rip),%r15
lea    0xed7(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsd  %xmm1,0x8(%rsp)
movsd  (%r15),%xmm0
mulsd  %xmm1,%xmm0
mov    %r14,%rdi
call   1030 <printf@plt>
movsd  0x8(%rsp),%xmm1
addsd  0xe9b(%rip),%xmm1
add    $0xffffffff,%ebx
jne    1140 <loop+0x30>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [11 x i8] c"hi mom %g\0A\00"
@M_PI = global double 0.000000e+00
define void @loop(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %17
8: ; preds = %4
%9 = load i32, i32* %3
%10 = sitofp i32 %9 to double
%11 = load double, double* @M_PI
%12 = fmul double %10, %11
%13 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), double %12)
br label %14
14: ; preds = %8
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 1
store i32 %16, i32* %3
br label %4
17: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [11 x i8] c"hi mom %g\0A\00"
@M_PI = global double 0.000000e+00
define void @loop(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %11
3: ; preds = %1, %3
%4 = phi i32 [ %9, %3 ], [ 0, %1 ]
%5 = sitofp i32 %4 to double
%6 = load double, double* @M_PI
%7 = fmul double %6, %5
%8 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), double %7)
%9 = add nuw nsw i32 %4, 1
%10 = icmp eq i32 %9, %0
br i1 %10, label %11, label %3
11: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getgid();
int /*<<< orphan*/ quit(char *);
scalar_t__ setresgid(int, int /*<<< orphan*/, int);
void safe_setuid_drop(void) {
  if (setresgid(-1, getgid(), -1) != 0)
    quit("setegid(): cannot drop permissions correctly!");
}


x86 assembly (clang, -O0):
<safe_setuid_drop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <getgid@plt>
mov    %eax,%esi
mov    $0xffffffff,%edx
mov    %edx,%edi
call   1030 <setresgid@plt>
cmp    $0x0,%rax
je     115f <safe_setuid_drop+0x2f>
lea    0xea6(%rip),%rdi
call   1040 <quit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_setuid_drop>:
push   %rax
xor    %eax,%eax
call   1050 <getgid@plt>
mov    $0xffffffff,%edi
mov    %eax,%esi
mov    $0xffffffff,%edx
call   1030 <setresgid@plt>
test   %rax,%rax
je     115b <safe_setuid_drop+0x2b>
lea    0xeab(%rip),%rdi
pop    %rax
jmp    1040 <quit@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [46 x i8] c"setegid(): cannot drop permissions correctly!\00"
define void @safe_setuid_drop() {
%1 = call i32 (...) @getgid()
%2 = call i64 @setresgid(i32 -1, i32 %1, i32 -1)
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @quit(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
ret void
}

LLVM IR (-O2):
@.str = [46 x i8] c"setegid(): cannot drop permissions correctly!\00"
define void @safe_setuid_drop() {
%1 = tail call i32 (...) @getgid()
%2 = tail call i64 @setresgid(i32 -1, i32 %1, i32 -1)
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %0
%5 = tail call i32 @quit(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ f(unsigned int);
main() {
  unsigned x = ~0;
  f(x);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <f@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xffffffff,%edi
call   1030 <f@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 -1, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @f(i32 %3)
%5 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @f(i32 -1)
%2 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int print_prefix() {
  printf("dwd > ");
  return 0;
}


x86 assembly (clang, -O0):
<print_prefix>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_prefix>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [7 x i8] c"dwd > \00"
define i32 @print_prefix() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"dwd > \00"
define i32 @print_prefix() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ print_message(char *);
void empty_setup_fixture() {
  print_message("Empty pqueue\n");
  print_message("------------\n");
}


x86 assembly (clang, -O0):
<empty_setup_fixture>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <print_message@plt>
lea    0xee7(%rip),%rdi
call   1030 <print_message@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<empty_setup_fixture>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <print_message@plt>
lea    0xeea(%rip),%rdi
pop    %rax
jmp    1030 <print_message@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"Empty pqueue\0A\00"
@.str.1 = [14 x i8] c"------------\0A\00"
define void @empty_setup_fixture() {
%1 = call i32 @print_message(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @print_message(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"Empty pqueue\0A\00"
@.str.1 = [14 x i8] c"------------\0A\00"
define void @empty_setup_fixture() {
%1 = tail call i32 @print_message(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @print_message(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int is_leap_year(int year) {
  return (year % 4 == 0 && year % 100 != 0) || year % 400 == 0;
}


x86 assembly (clang, -O0):
<is_leap_year>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1134 <is_leap_year+0x34>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
jne    1148 <is_leap_year+0x48>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_leap_year>:
test   $0x3,%dil
jne    112c <is_leap_year+0x2c>
movslq %edi,%rax
imul   $0x51eb851f,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x25,%rax
add    %ecx,%eax
imul   $0x64,%eax,%ecx
mov    %edi,%edx
mov    $0x1,%eax
sub    %ecx,%edx
je     112c <is_leap_year+0x2c>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
ror    $0x4,%ecx
xor    %eax,%eax
cmp    $0xa3d70b,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @is_leap_year(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 4
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 100
%9 = icmp ne i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %6, %1
%11 = load i32, i32* %2
%12 = srem i32 %11, 400
%13 = icmp eq i32 %12, 0
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ true, %6 ], [ %13, %10 ]
%16 = zext i1 %15 to i32
ret i32 %16
}

LLVM IR (-O2):
define i32 @is_leap_year(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp ne i32 %2, 0
%4 = srem i32 %0, 100
%5 = icmp eq i32 %4, 0
%6 = or i1 %3, %5
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = srem i32 %0, 400
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %1, %7
%12 = phi i32 [ %10, %7 ], [ 1, %1 ]
ret i32 %12
}
void __attribute__((warning(
    "curl_easy_setopt expects a void* or char* argument for this option")))
__attribute__((unused)) __attribute__((no))
_curl_easy_setopt_err_postfields(void) {
  __asm__("");
}


x86 assembly (clang, -O0):
<_curl_easy_setopt_err_postfields>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_curl_easy_setopt_err_postfields>:
ret

LLVM IR (-O0):
define void @_curl_easy_setopt_err_postfields() {
ret void
}

LLVM IR (-O2):
define void @_curl_easy_setopt_err_postfields() {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
void fd0(int n) {
p0A:
  goto p0A;
  goto a;
a : {
  typedef int(*b)[n];
P01A:
  goto P01A;
  {
    typedef int(*c)[n];
  P012A:
    goto P012A;
    0;
  }
P01B:
  goto P01B;
  {
    typedef int(*d)[n];
  P013A:
    goto P013A;
    0;
  }
P01C:
  goto P01C;
  ;
  typedef int(*e)[n];
P014A:
  goto P014A;
  0;
};
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  P02A:
    goto P02A;
    {
      typedef int(*g)[n];
    P024A:
      goto P024A;
      0;
    };
  P02B:
    goto P02B;
    {
      typedef int(*h)[n];
    P025A:
      goto P025A;
      0;
    };
  P02C:
    goto P02C;
    ;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd0+0x7>

x86 assembly (clang, -O2):
<fd0>:
jmp    1100 <fd0>

LLVM IR (-O0):
define void @fd0(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
br label %3
4: ; No predecessors!
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
br label %7
7: ; preds = %7, %4
br label %7
8: ; No predecessors!
%9 = load i32, i32* %2
%10 = zext i32 %9 to i64
br label %11
11: ; preds = %11, %8
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
%14 = load i32, i32* %2
%15 = zext i32 %14 to i64
br label %16
16: ; preds = %16, %13
br label %16
17: ; preds = %17
br label %17
18: ; No predecessors!
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
br label %21
21: ; preds = %21, %18
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %26, %23
br label %26
27: ; No predecessors!
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
br label %30
30: ; preds = %30, %27
br label %30
31: ; preds = %31
br label %31
32: ; No predecessors!
%33 = load i32, i32* %2
%34 = zext i32 %33 to i64
br label %35
35: ; preds = %35, %32
br label %35
36: ; preds = %36
br label %36
37: ; No predecessors!
%38 = load i32, i32* %2
%39 = zext i32 %38 to i64
br label %40
40: ; preds = %40, %37
br label %40
41: ; preds = %41
br label %41
42: ; No predecessors!
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
br label %45
45: ; preds = %45, %42
br label %45
46: ; preds = %46
br label %46
}

LLVM IR (-O2):
define void @fd0(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
int init_btnRotate() { return 0; }


x86 assembly (clang, -O0):
<init_btnRotate>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_btnRotate>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @init_btnRotate() {
ret i32 0
}

LLVM IR (-O2):
define i32 @init_btnRotate() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ preempt_disable();
void __preempt_disable(void *data) { preempt_disable(); }


x86 assembly (clang, -O0):
<__preempt_disable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <preempt_disable@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__preempt_disable>:
xor    %eax,%eax
jmp    1030 <preempt_disable@plt>

LLVM IR (-O0):
define void @__preempt_disable(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @preempt_disable()
ret void
}

LLVM IR (-O2):
define void @__preempt_disable(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @preempt_disable()
ret void
}
void Cilk_membar_StoreStore(void) { __asm__ __volatile__("" : : : "memory"); }


x86 assembly (clang, -O0):
<Cilk_membar_StoreStore>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cilk_membar_StoreStore>:
ret

LLVM IR (-O0):
define void @Cilk_membar_StoreStore() {
ret void
}

LLVM IR (-O2):
define void @Cilk_membar_StoreStore() {
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ tmp;
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ *);
int /*<<< orphan*/ strftime(char *, int, char *, struct tm *);
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
char *getCurrentTime() {
  time_t t = time(NULL);
  struct tm *ltm = localtime(&t);
  static char tmp[64];
  strftime(tmp, sizeof(tmp), "%T", ltm);
  return tmp;
}


x86 assembly (clang, -O0):
<getCurrentTime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %eax,%eax
mov    %eax,%edi
call   1040 <time@plt>
mov    %eax,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
call   1030 <localtime@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
lea    0x2ef4(%rip),%rdi
mov    $0x40,%esi
lea    0xe98(%rip),%rdx
call   1050 <strftime@plt>
lea    0x2edc(%rip),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getCurrentTime>:
push   %rbx
sub    $0x10,%rsp
xor    %edi,%edi
call   1040 <time@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rdi
call   1030 <localtime@plt>
lea    0x2eff(%rip),%rbx
lea    0xea8(%rip),%rdx
mov    %rbx,%rdi
mov    $0x40,%esi
mov    %rax,%rcx
call   1050 <strftime@plt>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
@getCurrentTime.tmp = internal global [64 x i8] zeroinitializer
@.str = [3 x i8] c"%T\00"
define i8* @getCurrentTime() {
%1 = alloca i32
%2 = alloca %struct.tm*
%3 = call i32 @time(i32* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @localtime(i32* %1)
store %struct.tm* %4, %struct.tm** %2
%5 = load %struct.tm*, %struct.tm** %2
%6 = call i32 @strftime(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @getCurrentTime.tmp, i64 0, i64 0), i32 64, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), %struct.tm* %5)
ret i8* getelementptr inbounds ([64 x i8], [64 x i8]* @getCurrentTime.tmp, i64 0, i64 0)
}

LLVM IR (-O2):
%struct.tm = type { i32 }
@getCurrentTime.tmp = internal global [64 x i8] zeroinitializer
@.str = [3 x i8] c"%T\00"
define i8* @getCurrentTime() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @time(i32* null)
store i32 %3, i32* %1
%4 = call %struct.tm* @localtime(i32* %1)
%5 = call i32 @strftime(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @getCurrentTime.tmp, i64 0, i64 0), i32 64, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), %struct.tm* %4)
ret i8* getelementptr inbounds ([64 x i8], [64 x i8]* @getCurrentTime.tmp, i64 0, i64 0)
}
char getturnchange(char newturn, char oldturn) {
  if (newturn == 1)
    return 1;
  if (newturn == -1)
    return 0;
  return oldturn == 1;
}


x86 assembly (clang, -O0):
<getturnchange>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x1,%eax
jne    1126 <getturnchange+0x26>
movb   $0x1,-0x1(%rbp)
jmp    114e <getturnchange+0x4e>
movsbl -0x2(%rbp),%eax
cmp    $0xffffffff,%eax
jne    113c <getturnchange+0x3c>
movb   $0x0,-0x1(%rbp)
jmp    114e <getturnchange+0x4e>
movsbl -0x3(%rbp),%eax
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getturnchange>:
mov    %edi,%eax
cmp    $0x1,%al
je     1114 <getturnchange+0x14>
cmp    $0xff,%al
jne    110d <getturnchange+0xd>
xor    %eax,%eax
ret
cmp    $0x1,%sil
sete   %al
ret

LLVM IR (-O0):
define signext i8 @getturnchange(i8 signext %0, i8 signext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %2
store i8 1, i8* %3
br label %21
10: ; preds = %2
%11 = load i8, i8* %4
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, -1
br i1 %13, label %14, label %15
14: ; preds = %10
store i8 0, i8* %3
br label %21
15: ; preds = %10
%16 = load i8, i8* %5
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 1
%19 = zext i1 %18 to i32
%20 = trunc i32 %19 to i8
store i8 %20, i8* %3
br label %21
21: ; preds = %15, %14, %9
%22 = load i8, i8* %3
ret i8 %22
}

LLVM IR (-O2):
define signext i8 @getturnchange(i8 signext %0, i8 signext %1) {
switch i8 %0, label %4 [
i8 1, label %7
i8 -1, label %3
]
3: ; preds = %2
br label %7
4: ; preds = %2
%5 = icmp eq i8 %1, 1
%6 = zext i1 %5 to i8
br label %7
7: ; preds = %2, %4, %3
%8 = phi i8 [ 0, %3 ], [ %6, %4 ], [ %0, %2 ]
ret i8 %8
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int G2_f(char *s) {
  debug("G2_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<G2_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xef8(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<G2_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf04(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [45 x i8] c"G2_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @G2_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [45 x i8] c"G2_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @G2_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
_Complex long double test_csinhl(_Complex long double x) {
  return __builtin_csinhl(x);
}


x86 assembly (clang, -O0):
<test_csinhl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
lea    0x10(%rbp),%rax
fldt   (%rax)
fldt   0x10(%rax)
fxch   %st(1)
fstpt  -0x40(%rbp)
fstpt  -0x30(%rbp)
movaps -0x40(%rbp),%xmm0
movaps -0x30(%rbp),%xmm1
mov    %rsp,%rax
movaps %xmm1,0x10(%rax)
movaps %xmm0,(%rax)
call   1030 <csinhl@plt>
fstpt  -0x20(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
fldt   -0x20(%rbp)
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_csinhl>:
sub    $0x48,%rsp
fldt   0x50(%rsp)
fldt   0x60(%rsp)
fxch   %st(1)
fstpt  0x20(%rsp)
fstpt  0x30(%rsp)
movaps 0x20(%rsp),%xmm0
movaps 0x30(%rsp),%xmm1
movaps %xmm1,0x10(%rsp)
movaps %xmm0,(%rsp)
call   1030 <csinhl@plt>
add    $0x48,%rsp
ret

LLVM IR (-O0):
define { x86_fp80, x86_fp80 } @test_csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = alloca { x86_fp80, x86_fp80 }
%3 = alloca { x86_fp80, x86_fp80 }
%4 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 0
%5 = load x86_fp80, x86_fp80* %4
%6 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i32 0, i32 1
%7 = load x86_fp80, x86_fp80* %6
%8 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %3, i32 0, i32 0
%9 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %3, i32 0, i32 1
store x86_fp80 %5, x86_fp80* %8
store x86_fp80 %7, x86_fp80* %9
%10 = call { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %3)
%11 = extractvalue { x86_fp80, x86_fp80 } %10, 0
%12 = extractvalue { x86_fp80, x86_fp80 } %10, 1
%13 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i32 0, i32 0
%14 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i32 0, i32 1
store x86_fp80 %11, x86_fp80* %13
store x86_fp80 %12, x86_fp80* %14
%15 = load { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2
ret { x86_fp80, x86_fp80 } %15
}

LLVM IR (-O2):
define { x86_fp80, x86_fp80 } @test_csinhl({ x86_fp80, x86_fp80 }* nocapture byval({ x86_fp80, x86_fp80 }) align 16 %0) {
%2 = alloca { x86_fp80, x86_fp80 }
%3 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i64 0, i32 0
%4 = load x86_fp80, x86_fp80* %3
%5 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %0, i64 0, i32 1
%6 = load x86_fp80, x86_fp80* %5
%7 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i64 0, i32 0
%8 = getelementptr inbounds { x86_fp80, x86_fp80 }, { x86_fp80, x86_fp80 }* %2, i64 0, i32 1
store x86_fp80 %4, x86_fp80* %7
store x86_fp80 %6, x86_fp80* %8
%9 = tail call { x86_fp80, x86_fp80 } @csinhl({ x86_fp80, x86_fp80 }* byval({ x86_fp80, x86_fp80 }) align 16 %2)
ret { x86_fp80, x86_fp80 } %9
}
void USB_OTG_BSP_EnableInterrupt(void) {
  (*(volatile unsigned char *)(((0xE0000000 + 0xE000) + 0x0100) + 0x300 + 67)) =
      3 << 4;
  (*(volatile unsigned int *)(((0xE0000000 + 0xE000) + 0x0100) + 0x00 +
                              (67 / 32 * 4))) |= (1 << (67 % 32));
}


x86 assembly (clang, -O0):
<USB_OTG_BSP_EnableInterrupt>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe000e443,%eax
movb   $0x30,(%rax)
mov    $0xe000e108,%eax
mov    (%rax),%ecx
or     $0x8,%ecx
mov    $0xe000e108,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USB_OTG_BSP_EnableInterrupt>:
mov    $0xe000e108,%eax
movb   $0x30,0x33b(%rax)
orl    $0x8,(%rax)
ret

LLVM IR (-O0):
define void @USB_OTG_BSP_EnableInterrupt() {
store volatile i8 48, i8* inttoptr (i64 3758154819 to i8*)
%1 = load volatile i32, i32* inttoptr (i64 3758153992 to i32*)
%2 = or i32 %1, 8
store volatile i32 %2, i32* inttoptr (i64 3758153992 to i32*)
ret void
}

LLVM IR (-O2):
define void @USB_OTG_BSP_EnableInterrupt() {
store volatile i8 48, i8* inttoptr (i64 3758154819 to i8*)
%1 = load volatile i32, i32* inttoptr (i64 3758153992 to i32*)
%2 = or i32 %1, 8
store volatile i32 %2, i32* inttoptr (i64 3758153992 to i32*)
ret void
}
int white_note(int pos) {
  if (pos < 3)
    return 2 * pos;
  if (pos < 7)
    return 2 * pos - 1;
  return 12;
}


x86 assembly (clang, -O0):
<white_note>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    111f <white_note+0x1f>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <white_note+0x41>
cmpl   $0x7,-0x8(%rbp)
jge    113a <white_note+0x3a>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1141 <white_note+0x41>
movl   $0xc,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<white_note>:
cmp    $0x2,%edi
jg     110a <white_note+0xa>
add    %edi,%edi
mov    %edi,%eax
ret
mov    $0xc,%eax
cmp    $0x6,%edi
ja     111a <white_note+0x1a>
lea    (%rdi,%rdi,1),%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @white_note(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp slt i32 %4, 3
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = mul nsw i32 2, %7
store i32 %8, i32* %2
br label %17
9: ; preds = %1
%10 = load i32, i32* %3
%11 = icmp slt i32 %10, 7
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32, i32* %3
%14 = mul nsw i32 2, %13
%15 = sub nsw i32 %14, 1
store i32 %15, i32* %2
br label %17
16: ; preds = %9
store i32 12, i32* %2
br label %17
17: ; preds = %16, %12, %6
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @white_note(i32 %0) {
%2 = icmp slt i32 %0, 3
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = shl nsw i32 %0, 1
br label %10
5: ; preds = %1
%6 = icmp ult i32 %0, 7
br i1 %6, label %7, label %10
7: ; preds = %5
%8 = shl nuw nsw i32 %0, 1
%9 = add nsw i32 %8, -1
br label %10
10: ; preds = %5, %7, %3
%11 = phi i32 [ %4, %3 ], [ %9, %7 ], [ 12, %5 ]
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
int db_locate(const wchar_t *pattern) {
  int count = 0;
  return count;
}


x86 assembly (clang, -O0):
<db_locate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<db_locate>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @db_locate(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @db_locate(i32* nocapture readnone %0) {
ret i32 0
}
double logic_and(double a, double b) { return a && b; }


x86 assembly (clang, -O0):
<logic_and>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
xor    %eax,%eax
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
mov    %al,-0x11(%rbp)
jne    1130 <logic_and+0x30>
jp     1130 <logic_and+0x30>
jmp    1147 <logic_and+0x47>
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
setne  %al
setp   %cl
or     %cl,%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
cvtsi2sd %eax,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<logic_and>:
xorpd  %xmm2,%xmm2
ucomisd %xmm2,%xmm0
setp   %al
setne  %cl
or     %al,%cl
ucomisd %xmm2,%xmm1
setp   %al
setne  %dl
or     %al,%dl
and    %cl,%dl
movzbl %dl,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
ret

LLVM IR (-O0):
define double @logic_and(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = fcmp une double %5, 0.000000e+00
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load double, double* %4
%9 = fcmp une double %8, 0.000000e+00
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ false, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = sitofp i32 %12 to double
ret double %13
}

LLVM IR (-O2):
define double @logic_and(double %0, double %1) {
%3 = fcmp une double %0, 0.000000e+00
%4 = fcmp une double %1, 0.000000e+00
%5 = and i1 %3, %4
%6 = uitofp i1 %5 to double
ret double %6
}
int getbits(int n) {
  int rc = 0;
  while (n) {
    if (n & 1)
      rc++;
    n = n >> 1;
  }
  return rc;
}


x86 assembly (clang, -O0):
<getbits>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     113e <getbits+0x3e>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1130 <getbits+0x30>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <getbits+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getbits>:
xor    %eax,%eax
test   %edi,%edi
je     1120 <getbits+0x20>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
and    $0x1,%edx
add    %edx,%eax
sar    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <getbits+0x10>
ret

LLVM IR (-O0):
define i32 @getbits(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %7
%15 = load i32, i32* %2
%16 = ashr i32 %15, 1
store i32 %16, i32* %2
br label %4
17: ; preds = %4
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @getbits(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %10, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = add nuw nsw i32 %4, %6
%8 = ashr i32 %5, 1
%9 = icmp ult i32 %5, 2
br i1 %9, label %10, label %3
10: ; preds = %3, %1
%11 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %11
}
void test3(char *P) { __builtin___memset_chk(P, 42, 128, 128); }


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2a,%esi
mov    $0x80,%edx
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
movaps 0xef9(%rip),%xmm0
movups %xmm0,0x70(%rdi)
movups %xmm0,0x60(%rdi)
movups %xmm0,0x50(%rdi)
movups %xmm0,0x40(%rdi)
movups %xmm0,0x30(%rdi)
movups %xmm0,0x20(%rdi)
movups %xmm0,0x10(%rdi)
movups %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @test3(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @test3(i8* nocapture writeonly %0) {
tail call void @llvm.memset.p0i8.i64(i8* align 1 dereferenceable(128) %0, i8 42, i64 128, i1 false)
ret void
}
/* Variables and functions */
int f445(int *);
int f446(int *p) { return f445(p); }


x86 assembly (clang, -O0):
<f446>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f445@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f446>:
jmp    1030 <f445@plt>

LLVM IR (-O0):
define i32 @f446(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f445(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f446(i32* %0) {
%2 = tail call i32 @f445(i32* %0)
ret i32 %2
}
/* Variables and functions */
float sqrtf(int /*<<< orphan*/);
int /*<<< orphan*/ vec4f_dot(float const *, float const *);
float vec4f_norm(const float A[4]) { return sqrtf(vec4f_dot(A, A)); }


x86 assembly (clang, -O0):
<vec4f_norm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <vec4f_dot@plt>
mov    %eax,%edi
call   1030 <sqrtf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec4f_norm>:
push   %rax
mov    %rdi,%rsi
call   1040 <vec4f_dot@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <sqrtf@plt>

LLVM IR (-O0):
define float @vec4f_norm(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = load float*, float** %2
%5 = call i32 @vec4f_dot(float* %3, float* %4)
%6 = call float @sqrtf(i32 %5)
ret float %6
}

LLVM IR (-O2):
define float @vec4f_norm(float* %0) {
%2 = tail call i32 @vec4f_dot(float* %0, float* %0)
%3 = tail call float @sqrtf(i32 %2)
ret float %3
}
/* Variables and functions */
char *jsonZcb(char *, int);
char *jsonZcbRspPermitJoin(int status) { return (jsonZcb("permit", status)); }


x86 assembly (clang, -O0):
<jsonZcbRspPermitJoin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <jsonZcb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jsonZcbRspPermitJoin>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <jsonZcb@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"permit\00"
define i8* @jsonZcbRspPermitJoin(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @jsonZcb(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [7 x i8] c"permit\00"
define i8* @jsonZcbRspPermitJoin(i32 %0) {
%2 = tail call i8* @jsonZcb(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ nrf_802154_pib_promiscuous_set(int);
void nrf_802154_promiscuous_set(bool enabled) {
  nrf_802154_pib_promiscuous_set(enabled);
}


x86 assembly (clang, -O0):
<nrf_802154_promiscuous_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <nrf_802154_pib_promiscuous_set@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_802154_promiscuous_set>:
jmp    1030 <nrf_802154_pib_promiscuous_set@plt>

LLVM IR (-O0):
define void @nrf_802154_promiscuous_set(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @nrf_802154_pib_promiscuous_set(i32 %3)
ret void
}

LLVM IR (-O2):
define void @nrf_802154_promiscuous_set(i32 %0) {
%2 = tail call i32 @nrf_802154_pib_promiscuous_set(i32 %0)
ret void
}
/* Variables and functions */
int bin_to_dec(char *);
char *hex_to_bin(char *);
int hex_to_dec(char *hex) {
  char *bin = hex_to_bin(hex);
  return bin_to_dec(bin);
}


x86 assembly (clang, -O0):
<hex_to_dec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <hex_to_bin@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <bin_to_dec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hex_to_dec>:
push   %rax
call   1040 <hex_to_bin@plt>
mov    %rax,%rdi
pop    %rax
jmp    1030 <bin_to_dec@plt>

LLVM IR (-O0):
define i32 @hex_to_dec(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @hex_to_bin(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @bin_to_dec(i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @hex_to_dec(i8* %0) {
%2 = tail call i8* @hex_to_bin(i8* %0)
%3 = tail call i32 @bin_to_dec(i8* %2)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
int main() {
  int var0 = 0;
  puts("So you stopped falling, however you will never make it back up.");
  if (var0 == 37) {
    puts("I forgot there was an elevator. We installed it for lazy researchers "
         "like yourself. Level Cleared!");
  } else {
    puts("Really you should just jump right back in the whole. It will "
         "probably be a lot more fun.");
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <puts@plt>
cmpl   $0x25,-0x8(%rbp)
jne    114d <main+0x3d>
lea    0xefd(%rip),%rdi
call   1030 <puts@plt>
jmp    1159 <main+0x49>
lea    0xf4f(%rip),%rdi
call   1030 <puts@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xf1c(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [64 x i8] c"So you stopped falling, however you will never make it back up.\00"
@.str.1 = [99 x i8] c"I forgot there was an elevator. We installed it for lazy researchers like yourself. Level Cleared!\00"
@.str.2 = [89 x i8] c"Really you should just jump right back in the whole. It will probably be a lot more fun.\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @puts(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 37
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 @puts(i8* getelementptr inbounds ([99 x i8], [99 x i8]* @.str.1, i64 0, i64 0))
br label %10
8: ; preds = %0
%9 = call i32 @puts(i8* getelementptr inbounds ([89 x i8], [89 x i8]* @.str.2, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@.str = [64 x i8] c"So you stopped falling, however you will never make it back up.\00"
@.str.2 = [89 x i8] c"Really you should just jump right back in the whole. It will probably be a lot more fun.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([64 x i8], [64 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([89 x i8], [89 x i8]* @.str.2, i64 0, i64 0))
ret i32 0
}
unsigned char ord(char c) {
  if ((c >= 'A') && (c <= 'Z')) {
    return c - 'A';
  } else if ((c >= 'a') && (c <= 'z')) {
    return c - 'a';
  } else {
    return 26;
  }
}


x86 assembly (clang, -O0):
<ord>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0x41,%eax
jl     1133 <ord+0x33>
movsbl -0x2(%rbp),%eax
cmp    $0x5a,%eax
jg     1133 <ord+0x33>
movsbl -0x2(%rbp),%eax
sub    $0x41,%eax
mov    %al,-0x1(%rbp)
jmp    1160 <ord+0x60>
movsbl -0x2(%rbp),%eax
cmp    $0x61,%eax
jl     115c <ord+0x5c>
movsbl -0x2(%rbp),%eax
cmp    $0x7a,%eax
jg     115c <ord+0x5c>
movsbl -0x2(%rbp),%eax
sub    $0x61,%eax
mov    %al,-0x1(%rbp)
jmp    1160 <ord+0x60>
movb   $0x1a,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ord>:
lea    -0x41(%rdi),%eax
add    $0x9f,%dil
cmp    $0x1a,%dil
movzbl %dil,%ecx
mov    $0x1a,%edx
cmovb  %ecx,%edx
cmp    $0x1a,%al
movzbl %al,%eax
cmovae %edx,%eax
ret

LLVM IR (-O0):
define zeroext i8 @ord(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %11, label %16
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %13, 65
%15 = trunc i32 %14 to i8
store i8 %15, i8* %2
br label %30
16: ; preds = %7, %1
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sge i32 %18, 97
br i1 %19, label %20, label %29
20: ; preds = %16
%21 = load i8, i8* %3
%22 = sext i8 %21 to i32
%23 = icmp sle i32 %22, 122
br i1 %23, label %24, label %29
24: ; preds = %20
%25 = load i8, i8* %3
%26 = sext i8 %25 to i32
%27 = sub nsw i32 %26, 97
%28 = trunc i32 %27 to i8
store i8 %28, i8* %2
br label %30
29: ; preds = %20, %16
store i8 26, i8* %2
br label %30
30: ; preds = %29, %24, %11
%31 = load i8, i8* %2
ret i8 %31
}

LLVM IR (-O2):
define zeroext i8 @ord(i8 signext %0) {
%2 = add i8 %0, -65
%3 = icmp ult i8 %2, 26
%4 = add i8 %0, -97
%5 = icmp ult i8 %4, 26
%6 = select i1 %5, i8 %4, i8 26
%7 = select i1 %3, i8 %2, i8 %6
ret i8 %7
}
/* Variables and functions */
int strcmp(char const *, char const *);
int strverscmp(const char *l, const char *r) { return strcmp(l, r); }


x86 assembly (clang, -O0):
<strverscmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strverscmp>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @strverscmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @strverscmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
long to32bit(int c1, int c2, int c3, int c4) {
  long value = 0L;
  value = (c1 & 0xff);
  value = (value << 8) + (c2 & 0xff);
  value = (value << 8) + (c3 & 0xff);
  value = (value << 8) + (c4 & 0xff);
  return value;
}


x86 assembly (clang, -O0):
<to32bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x8,%rax
mov    -0x8(%rbp),%ecx
and    $0xff,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x8,%rax
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x8,%rax
mov    -0x10(%rbp),%ecx
and    $0xff,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<to32bit>:
shl    $0x18,%edi
movzbl %sil,%eax
shl    $0x10,%eax
or     %edi,%eax
shl    $0x8,%edx
movzwl %dx,%edx
or     %eax,%edx
movzbl %cl,%eax
or     %edx,%eax
ret

LLVM IR (-O0):
define i64 @to32bit(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i64
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
store i64 0, i64* %9
%10 = load i32, i32* %5
%11 = and i32 %10, 255
%12 = sext i32 %11 to i64
store i64 %12, i64* %9
%13 = load i64, i64* %9
%14 = shl i64 %13, 8
%15 = load i32, i32* %6
%16 = and i32 %15, 255
%17 = sext i32 %16 to i64
%18 = add nsw i64 %14, %17
store i64 %18, i64* %9
%19 = load i64, i64* %9
%20 = shl i64 %19, 8
%21 = load i32, i32* %7
%22 = and i32 %21, 255
%23 = sext i32 %22 to i64
%24 = add nsw i64 %20, %23
store i64 %24, i64* %9
%25 = load i64, i64* %9
%26 = shl i64 %25, 8
%27 = load i32, i32* %8
%28 = and i32 %27, 255
%29 = sext i32 %28 to i64
%30 = add nsw i64 %26, %29
store i64 %30, i64* %9
%31 = load i64, i64* %9
ret i64 %31
}

LLVM IR (-O2):
define i64 @to32bit(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = shl i32 %0, 24
%6 = shl i32 %1, 16
%7 = and i32 %6, 16711680
%8 = or i32 %7, %5
%9 = shl i32 %2, 8
%10 = and i32 %9, 65280
%11 = or i32 %8, %10
%12 = and i32 %3, 255
%13 = or i32 %11, %12
%14 = zext i32 %13 to i64
ret i64 %14
}
/* Variables and functions */
int /*<<< orphan*/ itob(int, char *, int);
int /*<<< orphan*/ printf(char *, int, char *);
int /*<<< orphan*/ reverse(char *);
int main(void) {
  int ret = 0;
  int n = -31;
  char s[12 + 1];
  int base = 16;
  itob(n, s, base);
  reverse(s);
  printf("\n The value of the 10 base number %d in hex is %s", n, s);
  return ret;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0xffffffe1,-0xc(%rbp)
movl   $0x10,-0x20(%rbp)
mov    -0xc(%rbp),%edi
lea    -0x19(%rbp),%rsi
mov    -0x20(%rbp),%edx
call   1050 <itob@plt>
lea    -0x19(%rbp),%rdi
call   1030 <reverse@plt>
mov    -0xc(%rbp),%esi
lea    -0x19(%rbp),%rdx
lea    0xe86(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0x3(%rsp),%rbx
mov    $0xffffffe1,%edi
mov    %rbx,%rsi
mov    $0x10,%edx
call   1050 <itob@plt>
mov    %rbx,%rdi
call   1030 <reverse@plt>
lea    0xea5(%rip),%rdi
mov    $0xffffffe1,%esi
mov    %rbx,%rdx
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [50 x i8] c"\0A The value of the 10 base number %d in hex is %s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca [13 x i8]
%5 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 -31, i32* %3
store i32 16, i32* %5
%6 = load i32, i32* %3
%7 = getelementptr inbounds [13 x i8], [13 x i8]* %4, i64 0, i64 0
%8 = load i32, i32* %5
%9 = call i32 @itob(i32 %6, i8* %7, i32 %8)
%10 = getelementptr inbounds [13 x i8], [13 x i8]* %4, i64 0, i64 0
%11 = call i32 @reverse(i8* %10)
%12 = load i32, i32* %3
%13 = getelementptr inbounds [13 x i8], [13 x i8]* %4, i64 0, i64 0
%14 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i32 %12, i8* %13)
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
@.str = [50 x i8] c"\0A The value of the 10 base number %d in hex is %s\00"
define i32 @main() {
%1 = alloca [13 x i8]
%2 = getelementptr inbounds [13 x i8], [13 x i8]* %1, i64 0, i64 0
%3 = call i32 @itob(i32 -31, i8* %2, i32 16)
%4 = call i32 @reverse(i8* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([50 x i8], [50 x i8]* @.str, i64 0, i64 0), i32 -31, i8* %2)
ret i32 0
}