unsigned blend_dodge32(register unsigned color1, register unsigned color2) {
  unsigned r = (((color2 >> 16) << 8) / (256 - (color1 >> 16)));
  unsigned g =
      ((((color2 & 0xFF00) >> 8) << 8) / (256 - ((color1 & 0xFF00) >> 8)));
  unsigned b = (((color2 & 0xFF) << 8) / (256 - (color1 & 0xFF)));
  return (((r > 255 ? 255 : r) << 16) | ((g > 255 ? 255 : g) << 8) |
          (b > 255 ? 255 : b));
}


x86 assembly (clang, -O0):
<blend_dodge32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x10,%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%edx
shr    $0x10,%edx
mov    $0x100,%ecx
sub    %edx,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff00,%eax
shr    $0x8,%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%edx
and    $0xff00,%edx
shr    $0x8,%edx
mov    $0x100,%ecx
sub    %edx,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
shl    $0x8,%eax
mov    -0x4(%rbp),%edx
and    $0xff,%edx
mov    $0x100,%ecx
sub    %edx,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0x14(%rbp)
cmpl   $0xff,-0xc(%rbp)
jbe    118b <blend_dodge32+0x8b>
mov    $0xff,%eax
mov    %eax,-0x18(%rbp)
jmp    1191 <blend_dodge32+0x91>
mov    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
shl    $0x10,%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0xff,-0x10(%rbp)
jbe    11b4 <blend_dodge32+0xb4>
mov    $0xff,%eax
mov    %eax,-0x20(%rbp)
jmp    11ba <blend_dodge32+0xba>
mov    -0x10(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%eax
mov    -0x20(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    %eax,-0x24(%rbp)
cmpl   $0xff,-0x14(%rbp)
jbe    11e2 <blend_dodge32+0xe2>
mov    $0xff,%eax
mov    %eax,-0x28(%rbp)
jmp    11e8 <blend_dodge32+0xe8>
mov    -0x14(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x24(%rbp),%eax
mov    -0x28(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blend_dodge32>:
push   %rbp
push   %rbx
mov    %edi,%ecx
mov    %esi,%eax
shr    $0x8,%eax
and    $0xffff00,%eax
movzbl %ch,%edx
mov    %edx,%r8d
movzbl %cl,%edi
shr    $0x10,%ecx
mov    $0x100,%ebx
mov    $0x100,%ebp
sub    %ecx,%ebp
xor    %edx,%edx
div    %ebp
mov    %eax,%ecx
mov    %esi,%eax
and    $0xff00,%eax
mov    $0x100,%ebp
sub    %r8d,%ebp
xor    %edx,%edx
div    %bp
movzwl %ax,%ebp
shl    $0x8,%esi
sub    %edi,%ebx
mov    %esi,%eax
xor    %edx,%edx
div    %bx
movzwl %ax,%edx
cmp    $0xff,%ecx
mov    $0xff,%eax
cmovae %eax,%ecx
shl    $0x10,%ecx
cmp    $0xff,%ebp
cmovae %eax,%ebp
shl    $0x8,%ebp
cmp    $0xff,%edx
cmovb  %edx,%eax
or     %ecx,%eax
or     %ebp,%eax
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @blend_dodge32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %4
%9 = lshr i32 %8, 16
%10 = shl i32 %9, 8
%11 = load i32, i32* %3
%12 = lshr i32 %11, 16
%13 = sub i32 256, %12
%14 = udiv i32 %10, %13
store i32 %14, i32* %5
%15 = load i32, i32* %4
%16 = and i32 %15, 65280
%17 = lshr i32 %16, 8
%18 = shl i32 %17, 8
%19 = load i32, i32* %3
%20 = and i32 %19, 65280
%21 = lshr i32 %20, 8
%22 = sub i32 256, %21
%23 = udiv i32 %18, %22
store i32 %23, i32* %6
%24 = load i32, i32* %4
%25 = and i32 %24, 255
%26 = shl i32 %25, 8
%27 = load i32, i32* %3
%28 = and i32 %27, 255
%29 = sub i32 256, %28
%30 = udiv i32 %26, %29
store i32 %30, i32* %7
%31 = load i32, i32* %5
%32 = icmp ugt i32 %31, 255
br i1 %32, label %33, label %34
33: ; preds = %2
br label %36
34: ; preds = %2
%35 = load i32, i32* %5
br label %36
36: ; preds = %34, %33
%37 = phi i32 [ 255, %33 ], [ %35, %34 ]
%38 = shl i32 %37, 16
%39 = load i32, i32* %6
%40 = icmp ugt i32 %39, 255
br i1 %40, label %41, label %42
41: ; preds = %36
br label %44
42: ; preds = %36
%43 = load i32, i32* %6
br label %44
44: ; preds = %42, %41
%45 = phi i32 [ 255, %41 ], [ %43, %42 ]
%46 = shl i32 %45, 8
%47 = or i32 %38, %46
%48 = load i32, i32* %7
%49 = icmp ugt i32 %48, 255
br i1 %49, label %50, label %51
50: ; preds = %44
br label %53
51: ; preds = %44
%52 = load i32, i32* %7
br label %53
53: ; preds = %51, %50
%54 = phi i32 [ 255, %50 ], [ %52, %51 ]
%55 = or i32 %47, %54
ret i32 %55
}

LLVM IR (-O2):
define i32 @blend_dodge32(i32 %0, i32 %1) {
%3 = lshr i32 %1, 8
%4 = and i32 %3, 16776960
%5 = lshr i32 %0, 16
%6 = sub nsw i32 256, %5
%7 = udiv i32 %4, %6
%8 = trunc i32 %1 to i16
%9 = and i16 %8, -256
%10 = trunc i32 %0 to i16
%11 = lshr i16 %10, 8
%12 = sub nuw nsw i16 256, %11
%13 = udiv i16 %9, %12
%14 = zext i16 %13 to i32
%15 = shl i16 %8, 8
%16 = and i16 %10, 255
%17 = sub nuw nsw i16 256, %16
%18 = udiv i16 %15, %17
%19 = zext i16 %18 to i32
%20 = icmp ult i32 %7, 255
%21 = select i1 %20, i32 %7, i32 255
%22 = shl nuw nsw i32 %21, 16
%23 = icmp ult i32 %14, 255
%24 = select i1 %23, i32 %14, i32 255
%25 = shl nuw nsw i32 %24, 8
%26 = or i32 %25, %22
%27 = icmp ult i32 %19, 255
%28 = select i1 %27, i32 %19, i32 255
%29 = or i32 %26, %28
ret i32 %29
}