#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int /*<<< orphan*/ uname_buf;
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int, int, char const *);
int /*<<< orphan*/ snprintf(char *, int, char *, int);
int xscom_read(int, int, int *);
void print_chip_info(uint32_t chip_id) {
  uint64_t f000f, cfam_id;
  const char *name;
  char uname_buf[64];
  int rc;
  rc = xscom_read(chip_id, 0xf000f, &f000f);
  if (rc)
    return;
  cfam_id = f000f >> 44;
  switch (cfam_id & 0xff) {
  case 0xef:
    name = "P8E (Murano) processor";
    break;
  case 0xea:
    name = "P8 (Venice) processor";
    break;
  case 0xd3:
    name = "P8NVL (Naples) processor";
    break;
  case 0xd1:
    name = "P9 (Nimbus) processor";
    break;
  case 0xd4:
    name = "P9 (Cumulus) processor";
    break;
  case 0xd9:
    name = "P9P (Axone) processor";
    break;
  case 0xda:
    name = "P10 processor";
    break;
  case 0xe9:
    name = "Centaur memory buffer";
    break;
  default:
    snprintf(uname_buf, sizeof(uname_buf), "Unknown ID 0x%02lx",
             cfam_id & 0xff);
    name = uname_buf;
  }
  printf("%08x | DD%lx.%lx | %s\n", chip_id, (cfam_id >> 16) & 0xf,
         (cfam_id >> 8) & 0xf, name);
}


x86 assembly (clang, -O0):
<print_chip_info>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xf000f,%esi
lea    -0x8(%rbp),%rdx
call   1050 <xscom_read@plt>
mov    %eax,-0x64(%rbp)
cmpl   $0x0,-0x64(%rbp)
je     115e <print_chip_info+0x2e>
jmp    1255 <print_chip_info+0x125>
movzbl -0xc(%rbp),%eax
add    $0xffffff2f,%eax
mov    %eax,%ecx
mov    %rcx,-0x70(%rbp)
sub    $0x1e,%eax
ja     120a <print_chip_info+0xda>
mov    -0x70(%rbp),%rax
lea    0xe7f(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
lea    0xeeb(%rip),%rax
mov    %rax,-0x18(%rbp)
jmp    1230 <print_chip_info+0x100>
lea    0xef2(%rip),%rax
mov    %rax,-0x18(%rbp)
jmp    1230 <print_chip_info+0x100>
lea    0xef8(%rip),%rax
mov    %rax,-0x18(%rbp)
jmp    1230 <print_chip_info+0x100>
lea    0xf01(%rip),%rax
mov    %rax,-0x18(%rbp)
jmp    1230 <print_chip_info+0x100>
lea    0xf07(%rip),%rax
mov    %rax,-0x18(%rbp)
jmp    1230 <print_chip_info+0x100>
lea    0xf0e(%rip),%rax
mov    %rax,-0x18(%rbp)
jmp    1230 <print_chip_info+0x100>
lea    0xf14(%rip),%rax
mov    %rax,-0x18(%rbp)
jmp    1230 <print_chip_info+0x100>
lea    0xf12(%rip),%rax
mov    %rax,-0x18(%rbp)
jmp    1230 <print_chip_info+0x100>
lea    -0x60(%rbp),%rdi
mov    -0xc(%rbp),%ecx
and    $0xff,%ecx
mov    $0x40,%esi
lea    0xf06(%rip),%rdx
call   1040 <snprintf@plt>
lea    -0x60(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0xc(%rbp),%edx
sar    $0x10,%edx
and    $0xf,%edx
mov    -0xc(%rbp),%ecx
sar    $0x8,%ecx
and    $0xf,%ecx
mov    -0x18(%rbp),%r8
lea    0xeec(%rip),%rdi
call   1030 <printf@plt>
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_chip_info>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
lea    0xc(%rsp),%rdx
mov    $0xf000f,%esi
call   1040 <xscom_read@plt>
test   %eax,%eax
jne    114f <print_chip_info+0x2f>
lea    0xed6(%rip),%rdi
lea    0xeb8(%rip),%r8
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [23 x i8] c"P8E (Murano) processor\00"
@.str.1 = [22 x i8] c"P8 (Venice) processor\00"
@.str.2 = [25 x i8] c"P8NVL (Naples) processor\00"
@.str.3 = [22 x i8] c"P9 (Nimbus) processor\00"
@.str.4 = [23 x i8] c"P9 (Cumulus) processor\00"
@.str.5 = [22 x i8] c"P9P (Axone) processor\00"
@.str.6 = [14 x i8] c"P10 processor\00"
@.str.7 = [22 x i8] c"Centaur memory buffer\00"
@.str.8 = [19 x i8] c"Unknown ID 0x%02lx\00"
@.str.9 = [23 x i8] c"%08x | DD%lx.%lx | %s\0A\00"
define void @print_chip_info(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
%6 = alloca [64 x i8]
%7 = alloca i32
store i32 %0, i32* %2
%8 = load i32, i32* %2
%9 = call i32 @xscom_read(i32 %8, i32 983055, i32* %3)
store i32 %9, i32* %7
%10 = load i32, i32* %7
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %1
br label %42
13: ; preds = %1
%14 = load i32, i32* %3
%15 = ashr i32 %14, 44
store i32 %15, i32* %4
%16 = load i32, i32* %4
%17 = and i32 %16, 255
switch i32 %17, label %26 [
i32 239, label %18
i32 234, label %19
i32 211, label %20
i32 209, label %21
i32 212, label %22
i32 217, label %23
i32 218, label %24
i32 233, label %25
]
18: ; preds = %13
store i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8** %5
br label %32
19: ; preds = %13
store i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.1, i64 0, i64 0), i8** %5
br label %32
20: ; preds = %13
store i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str.2, i64 0, i64 0), i8** %5
br label %32
21: ; preds = %13
store i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.3, i64 0, i64 0), i8** %5
br label %32
22: ; preds = %13
store i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.4, i64 0, i64 0), i8** %5
br label %32
23: ; preds = %13
store i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.5, i64 0, i64 0), i8** %5
br label %32
24: ; preds = %13
store i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.6, i64 0, i64 0), i8** %5
br label %32
25: ; preds = %13
store i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str.7, i64 0, i64 0), i8** %5
br label %32
26: ; preds = %13
%27 = getelementptr inbounds [64 x i8], [64 x i8]* %6, i64 0, i64 0
%28 = load i32, i32* %4
%29 = and i32 %28, 255
%30 = call i32 @snprintf(i8* %27, i32 64, i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.8, i64 0, i64 0), i32 %29)
%31 = getelementptr inbounds [64 x i8], [64 x i8]* %6, i64 0, i64 0
store i8* %31, i8** %5
br label %32
32: ; preds = %26, %25, %24, %23, %22, %21, %20, %19, %18
%33 = load i32, i32* %2
%34 = load i32, i32* %4
%35 = ashr i32 %34, 16
%36 = and i32 %35, 15
%37 = load i32, i32* %4
%38 = ashr i32 %37, 8
%39 = and i32 %38, 15
%40 = load i8*, i8** %5
%41 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.9, i64 0, i64 0), i32 %33, i32 %36, i32 %39, i8* %40)
br label %42
42: ; preds = %32, %12
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"P8E (Murano) processor\00"
@.str.9 = [23 x i8] c"%08x | DD%lx.%lx | %s\0A\00"
define void @print_chip_info(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @xscom_read(i32 %0, i32 983055, i32* %2)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str.9, i64 0, i64 0), i32 %0, i32 poison, i32 poison, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %1, %6
ret void
}