float AURAE_cosf(float x) {
  x += (float)3.141592654 / 2.0f;
  int q = (x * 6.3661977236758138e-1f) + 0.5f;
  float t = x - q * 1.5707963267923333e+00f;
  t = t - q * 2.5633441515945189e-12f;
  float t2 = t * t;
  if (q & 1)
    t = ((-1.36058866707554670912e-03f * t2 + 4.16566258031673830195e-02f) *
             t2 -
         4.99998875577611430384e-01f) *
            t2 +
        9.99999980750852337007e-01f;
  else
    t = (((-1.94842039748219288187e-04f * t2 + 8.33179571459221545387e-03f) *
              t2 -
          1.66666423796176028737e-01f) *
             t2 +
         9.99999989793669848536e-01f) *
        t;
  if (q & 2)
    t = -t;
  return t;
}


x86 assembly (clang, -O0):
<AURAE_cosf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
addss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xee0(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xed8(%rip),%xmm1
addss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x8(%rbp)
movss  -0x4(%rbp),%xmm1
cvtsi2ssl -0x8(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  0xea6(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm1
cvtsi2ssl -0x8(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  0xe76(%rip),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
mulss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1206 <AURAE_cosf+0x106>
movss  -0x10(%rbp),%xmm0
movss  0xe62(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xe5a(%rip),%xmm1
addss  %xmm1,%xmm0
movss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xe3d(%rip),%xmm1
addss  %xmm1,%xmm0
movss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xe18(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1257 <AURAE_cosf+0x157>
movss  -0x10(%rbp),%xmm0
movss  0xe05(%rip),%xmm1
mulss  %xmm1,%xmm0
movss  0xdfd(%rip),%xmm1
addss  %xmm1,%xmm0
movss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xde0(%rip),%xmm1
addss  %xmm1,%xmm0
movss  -0x10(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xdc7(%rip),%xmm1
addss  %xmm1,%xmm0
mulss  -0xc(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0x2,%eax
cmp    $0x0,%eax
je     127d <AURAE_cosf+0x17d>
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<AURAE_cosf>:
movaps %xmm0,%xmm1
movss  0xef5(%rip),%xmm2
addss  %xmm2,%xmm1
movss  0xeed(%rip),%xmm0
mulss  %xmm1,%xmm0
addss  0xee5(%rip),%xmm0
cvttss2si %xmm0,%eax
cvttps2dq %xmm0,%xmm0
cvtdq2ps %xmm0,%xmm0
mulss  %xmm0,%xmm2
mulss  0xed2(%rip),%xmm0
subss  %xmm2,%xmm1
addss  %xmm1,%xmm0
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
test   $0x1,%al
jne    1183 <AURAE_cosf+0x83>
movss  0xecb(%rip),%xmm2
mulss  %xmm1,%xmm2
addss  0xec3(%rip),%xmm2
mulss  %xmm1,%xmm2
addss  0xebb(%rip),%xmm2
mulss  %xmm1,%xmm2
addss  0xea3(%rip),%xmm2
mulss  %xmm2,%xmm0
test   $0x2,%al
jne    11b3 <AURAE_cosf+0xb3>
jmp    11ba <AURAE_cosf+0xba>
movss  0xe85(%rip),%xmm0
mulss  %xmm1,%xmm0
addss  0xe7d(%rip),%xmm0
mulss  %xmm1,%xmm0
addss  0xe75(%rip),%xmm0
mulss  %xmm1,%xmm0
addss  0xe6d(%rip),%xmm0
test   $0x2,%al
je     11ba <AURAE_cosf+0xba>
xorps  0xe76(%rip),%xmm0
ret

LLVM IR (-O0):
define float @AURAE_cosf(float %0) {
%2 = alloca float
%3 = alloca i32
%4 = alloca float
%5 = alloca float
store float %0, float* %2
%6 = load float, float* %2
%7 = fadd float %6, 0x3FF921FB60000000
store float %7, float* %2
%8 = load float, float* %2
%9 = call float @llvm.fmuladd.f32(float %8, float 0x3FE45F3060000000, float 5.000000e-01)
%10 = fptosi float %9 to i32
store i32 %10, i32* %3
%11 = load float, float* %2
%12 = load i32, i32* %3
%13 = sitofp i32 %12 to float
%14 = fneg float %13
%15 = call float @llvm.fmuladd.f32(float %14, float 0x3FF921FB60000000, float %11)
store float %15, float* %4
%16 = load float, float* %4
%17 = load i32, i32* %3
%18 = sitofp i32 %17 to float
%19 = fneg float %18
%20 = call float @llvm.fmuladd.f32(float %19, float 0x3D868C2340000000, float %16)
store float %20, float* %4
%21 = load float, float* %4
%22 = load float, float* %4
%23 = fmul float %21, %22
store float %23, float* %5
%24 = load i32, i32* %3
%25 = and i32 %24, 1
%26 = icmp ne i32 %25, 0
br i1 %26, label %27, label %34
27: ; preds = %1
%28 = load float, float* %5
%29 = call float @llvm.fmuladd.f32(float 0xBF564AB900000000, float %28, float 0x3FA5540460000000)
%30 = load float, float* %5
%31 = call float @llvm.fmuladd.f32(float %29, float %30, float 0xBFDFFFFB40000000)
%32 = load float, float* %5
%33 = call float @llvm.fmuladd.f32(float %31, float %32, float 1.000000e+00)
store float %33, float* %4
br label %43
34: ; preds = %1
%35 = load float, float* %5
%36 = call float @llvm.fmuladd.f32(float 0xBF2989D060000000, float %35, float 0x3F811042C0000000)
%37 = load float, float* %5
%38 = call float @llvm.fmuladd.f32(float %36, float %37, float 0xBFC5555340000000)
%39 = load float, float* %5
%40 = call float @llvm.fmuladd.f32(float %38, float %39, float 1.000000e+00)
%41 = load float, float* %4
%42 = fmul float %40, %41
store float %42, float* %4
br label %43
43: ; preds = %34, %27
%44 = load i32, i32* %3
%45 = and i32 %44, 2
%46 = icmp ne i32 %45, 0
br i1 %46, label %47, label %50
47: ; preds = %43
%48 = load float, float* %4
%49 = fneg float %48
store float %49, float* %4
br label %50
50: ; preds = %47, %43
%51 = load float, float* %4
ret float %51
}

LLVM IR (-O2):
define float @AURAE_cosf(float %0) {
%2 = fadd float %0, 0x3FF921FB60000000
%3 = tail call float @llvm.fmuladd.f32(float %2, float 0x3FE45F3060000000, float 5.000000e-01)
%4 = fptosi float %3 to i32
%5 = sitofp i32 %4 to float
%6 = fneg float %5
%7 = tail call float @llvm.fmuladd.f32(float %6, float 0x3FF921FB60000000, float %2)
%8 = tail call float @llvm.fmuladd.f32(float %6, float 0x3D868C2340000000, float %7)
%9 = fmul float %8, %8
%10 = and i32 %4, 1
%11 = icmp eq i32 %10, 0
br i1 %11, label %16, label %12
12: ; preds = %1
%13 = tail call float @llvm.fmuladd.f32(float %9, float 0xBF564AB900000000, float 0x3FA5540460000000)
%14 = tail call float @llvm.fmuladd.f32(float %13, float %9, float 0xBFDFFFFB40000000)
%15 = tail call float @llvm.fmuladd.f32(float %14, float %9, float 1.000000e+00)
br label %21
16: ; preds = %1
%17 = tail call float @llvm.fmuladd.f32(float %9, float 0xBF2989D060000000, float 0x3F811042C0000000)
%18 = tail call float @llvm.fmuladd.f32(float %17, float %9, float 0xBFC5555340000000)
%19 = tail call float @llvm.fmuladd.f32(float %18, float %9, float 1.000000e+00)
%20 = fmul float %8, %19
br label %21
21: ; preds = %16, %12
%22 = phi float [ %15, %12 ], [ %20, %16 ]
%23 = and i32 %4, 2
%24 = icmp eq i32 %23, 0
%25 = fneg float %22
%26 = select i1 %24, float %22, float %25
ret float %26
}