xunge/DecIR huggingface dataset:
void nonzeroMemseti16() {
  unsigned short arr[17] = {
      0x4242, 0x4242, 0x4242, 0x4242, 0x4242, 0x4242, 0x4242, 0x4242, 0x4242,
      0x4242, 0x4242, 0x4242, 0x4242, 0x4242, 0x4242, 0x4242, 0x4242,
  };
}


x86 assembly (clang, -O0):
<nonzeroMemseti16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
lea    -0x30(%rbp),%rdi
mov    $0x42,%esi
mov    $0x22,%edx
call   1030 <memset@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nonzeroMemseti16>:
ret

LLVM IR (-O0):
define void @nonzeroMemseti16() {
%1 = alloca [17 x i16]
%2 = bitcast [17 x i16]* %1 to i8*
ret void
}

LLVM IR (-O2):
define void @nonzeroMemseti16() {
ret void
}
int hdate_get_year_type(int size_of_year, int new_year_dw) {
  static int year_types[24] = {1, 0, 0, 2,  0, 3,  4, 0, 5,  0, 6,  7,
                               8, 0, 9, 10, 0, 11, 0, 0, 12, 0, 13, 14};
  int offset;
  offset = (new_year_dw + 1) / 2;
  offset = offset + 4 * ((size_of_year % 10 - 3) + (size_of_year / 10 - 35));
  return year_types[offset - 1];
}


x86 assembly (clang, -O0):
<hdate_get_year_type>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    %edx,%ecx
sub    $0x3,%ecx
mov    -0x4(%rbp),%eax
mov    $0xa,%esi
cltd
idiv   %esi
mov    %eax,%edx
mov    -0x10(%rbp),%eax
sub    $0x23,%edx
add    %edx,%ecx
shl    $0x2,%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
movslq %eax,%rcx
lea    0x2ed2(%rip),%rax
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hdate_get_year_type>:
mov    %esi,%eax
add    $0x1,%eax
shr    $0x1f,%eax
add    %esi,%eax
add    $0x1,%eax
sar    %eax
movslq %edi,%rcx
imul   $0x66666667,%rcx,%rdx
mov    %rdx,%rsi
shr    $0x3f,%rsi
sar    $0x22,%rdx
add    %esi,%edx
lea    (%rdx,%rdx,1),%esi
lea    (%rsi,%rsi,4),%esi
sub    %esi,%ecx
add    %edx,%ecx
lea    (%rax,%rcx,4),%eax
add    $0xffffff67,%eax
cltq
lea    0xebf(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
@hdate_get_year_type.year_types = internal global [24 x i32] [i32 1, i32 0, i32 0, i32 2, i32 0, i32 3, i32 4, i32 0, i32 5, i32 0, i32 6, i32 7, i32 8, i32 0, i32 9, i32 10, i32 0, i32 11, i32 0, i32 0, i32 12, i32 0, i32 13, i32 14]
define i32 @hdate_get_year_type(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = add nsw i32 %6, 1
%8 = sdiv i32 %7, 2
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = load i32, i32* %3
%11 = srem i32 %10, 10
%12 = sub nsw i32 %11, 3
%13 = load i32, i32* %3
%14 = sdiv i32 %13, 10
%15 = sub nsw i32 %14, 35
%16 = add nsw i32 %12, %15
%17 = mul nsw i32 4, %16
%18 = add nsw i32 %9, %17
store i32 %18, i32* %5
%19 = load i32, i32* %5
%20 = sub nsw i32 %19, 1
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds [24 x i32], [24 x i32]* @hdate_get_year_type.year_types, i64 0, i64 %21
%23 = load i32, i32* %22
ret i32 %23
}

LLVM IR (-O2):
@hdate_get_year_type.year_types = internal unnamed_addr constant [24 x i32] [i32 1, i32 0, i32 0, i32 2, i32 0, i32 3, i32 4, i32 0, i32 5, i32 0, i32 6, i32 7, i32 8, i32 0, i32 9, i32 10, i32 0, i32 11, i32 0, i32 0, i32 12, i32 0, i32 13, i32 14]
define i32 @hdate_get_year_type(i32 %0, i32 %1) {
%3 = add nsw i32 %1, 1
%4 = sdiv i32 %3, 2
%5 = srem i32 %0, 10
%6 = sdiv i32 %0, 10
%7 = add nsw i32 %5, %6
%8 = shl nsw i32 %7, 2
%9 = add i32 %8, -153
%10 = add i32 %9, %4
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds [24 x i32], [24 x i32]* @hdate_get_year_type.year_types, i64 0, i64 %11
%13 = load i32, i32* %12
ret i32 %13
}
/* Variables and functions */
scalar_t__ isalpha(int);
int aanum(int ch) {
  static int aacvs[] = {999, 0,  20, 4, 3, 6,  13, 7,  8,  9,  20, 11, 10, 12,
                        2,   20, 14, 5, 1, 15, 16, 20, 19, 17, 20, 18, 20};
  return (isalpha(ch) ? aacvs[ch & 31] : 20);
}


x86 assembly (clang, -O0):
<aanum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <isalpha@plt>
cmp    $0x0,%rax
je     1148 <aanum+0x38>
mov    -0x4(%rbp),%eax
and    $0x1f,%eax
movslq %eax,%rcx
lea    0x2ef3(%rip),%rax
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x8(%rbp)
jmp    1155 <aanum+0x45>
mov    $0x14,%eax
mov    %eax,-0x8(%rbp)
jmp    1155 <aanum+0x45>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aanum>:
push   %rbx
mov    %edi,%ebx
call   1030 <isalpha@plt>
test   %rax,%rax
je     112c <aanum+0x1c>
and    $0x1f,%ebx
lea    0xed9(%rip),%rax
mov    (%rax,%rbx,4),%eax
pop    %rbx
ret
mov    $0x14,%eax
pop    %rbx
ret

LLVM IR (-O0):
@aanum.aacvs = internal global [27 x i32] [i32 999, i32 0, i32 20, i32 4, i32 3, i32 6, i32 13, i32 7, i32 8, i32 9, i32 20, i32 11, i32 10, i32 12, i32 2, i32 20, i32 14, i32 5, i32 1, i32 15, i32 16, i32 20, i32 19, i32 17, i32 20, i32 18, i32 20]
define i32 @aanum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i64 @isalpha(i32 %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i32, i32* %2
%8 = and i32 %7, 31
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [27 x i32], [27 x i32]* @aanum.aacvs, i64 0, i64 %9
%11 = load i32, i32* %10
br label %13
12: ; preds = %1
br label %13
13: ; preds = %12, %6
%14 = phi i32 [ %11, %6 ], [ 20, %12 ]
ret i32 %14
}

LLVM IR (-O2):
@aanum.aacvs = internal unnamed_addr constant [27 x i32] [i32 999, i32 0, i32 20, i32 4, i32 3, i32 6, i32 13, i32 7, i32 8, i32 9, i32 20, i32 11, i32 10, i32 12, i32 2, i32 20, i32 14, i32 5, i32 1, i32 15, i32 16, i32 20, i32 19, i32 17, i32 20, i32 18, i32 20]
define i32 @aanum(i32 %0) {
%2 = tail call i64 @isalpha(i32 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = and i32 %0, 31
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds [27 x i32], [27 x i32]* @aanum.aacvs, i64 0, i64 %6
%8 = load i32, i32* %7
br label %9
9: ; preds = %1, %4
%10 = phi i32 [ %8, %4 ], [ 20, %1 ]
ret i32 %10
}
void tick_shutdown_broadcast(unsigned int *cpup) {}


x86 assembly (clang, -O0):
<tick_shutdown_broadcast>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tick_shutdown_broadcast>:
ret

LLVM IR (-O0):
define void @tick_shutdown_broadcast(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @tick_shutdown_broadcast(i32* nocapture %0) {
ret void
}
int test_imm_4Euint32_reg(unsigned int val) {
  return ((val) & (0x4E << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_4Euint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x4e,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_4Euint32_reg>:
test   $0x4e,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_4Euint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 78
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_4Euint32_reg(i32 %0) {
%2 = and i32 %0, 78
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void f_empty_goto_loop_multiple_semicolon_second() {
f_empty_goto_loop_multiple_semicolon_second_label_1:
  goto f_empty_goto_loop_multiple_semicolon_second_label_2;
f_empty_goto_loop_multiple_semicolon_second_label_2:;
  goto f_empty_goto_loop_multiple_semicolon_second_label_1;
}


x86 assembly (clang, -O0):
<f_empty_goto_loop_multiple_semicolon_second>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <f_empty_goto_loop_multiple_semicolon_second+0x9>
jmp    110e <f_empty_goto_loop_multiple_semicolon_second+0xe>
jmp    1109 <f_empty_goto_loop_multiple_semicolon_second+0x9>

x86 assembly (clang, -O2):
<f_empty_goto_loop_multiple_semicolon_second>:
jmp    1100 <f_empty_goto_loop_multiple_semicolon_second>

LLVM IR (-O0):
define void @f_empty_goto_loop_multiple_semicolon_second() {
br label %1
1: ; preds = %2, %0
br label %2
2: ; preds = %1
br label %1
}

LLVM IR (-O2):
define void @f_empty_goto_loop_multiple_semicolon_second() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ munmap(void *, size_t);
void plat_munmap(void *ptr, size_t size) { munmap(ptr, size); }


x86 assembly (clang, -O0):
<plat_munmap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <munmap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<plat_munmap>:
jmp    1030 <munmap@plt>

LLVM IR (-O0):
define void @plat_munmap(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @munmap(i8* %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @plat_munmap(i8* %0, i64 %1) {
%3 = tail call i32 @munmap(i8* %0, i64 %1)
ret void
}
int is_ascii_numeric_float(char in_c) {
  if ((in_c >= 0x30 && in_c <= 0x39) || in_c == 0x2E) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_ascii_numeric_float>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1124 <is_ascii_numeric_float+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jle    1131 <is_ascii_numeric_float+0x31>
movsbl -0x5(%rbp),%eax
cmp    $0x2e,%eax
jne    113d <is_ascii_numeric_float+0x3d>
movl   $0x0,-0x4(%rbp)
jmp    1144 <is_ascii_numeric_float+0x44>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_ascii_numeric_float>:
lea    -0x3a(%rdi),%eax
cmp    $0xf6,%al
setb   %al
cmp    $0x2e,%dil
setne  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_ascii_numeric_float(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %15, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 46
br i1 %14, label %15, label %16
15: ; preds = %11, %7
store i32 0, i32* %2
br label %17
16: ; preds = %11
store i32 1, i32* %2
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @is_ascii_numeric_float(i8 signext %0) {
%2 = add i8 %0, -58
%3 = icmp ult i8 %2, -10
%4 = icmp ne i8 %0, 46
%5 = and i1 %4, %3
%6 = zext i1 %5 to i32
ret i32 %6
}
void put_console(int c) {
  if (c == '\n')
    put_console('\r');
}


x86 assembly (clang, -O0):
<put_console>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jne    112f <put_console+0x1f>
mov    $0xd,%edi
call   1030 <put_console@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<put_console>:
ret

LLVM IR (-O0):
define void @put_console(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 10
br i1 %4, label %5, label %6
5: ; preds = %1
br label %6
6: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @put_console(i32 %0) {
ret void
}
__attribute__((always_)) void print_cfs_rq(struct seq_file *m, int cpu,
                                           struct cfs_rq *cfs_rq) {}


x86 assembly (clang, -O0):
<print_cfs_rq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_cfs_rq>:
ret

LLVM IR (-O0):
%struct.seq_file = type opaque
%struct.cfs_rq = type opaque
define void @print_cfs_rq(%struct.seq_file* %0, i32 %1, %struct.cfs_rq* %2) {
%4 = alloca %struct.seq_file*
%5 = alloca i32
%6 = alloca %struct.cfs_rq*
store %struct.seq_file* %0, %struct.seq_file** %4
store i32 %1, i32* %5
store %struct.cfs_rq* %2, %struct.cfs_rq** %6
ret void
}

LLVM IR (-O2):
%struct.seq_file = type opaque
%struct.cfs_rq = type opaque
define void @print_cfs_rq(%struct.seq_file* nocapture %0, i32 %1, %struct.cfs_rq* nocapture %2) {
ret void
}
void *Tiger_new_array(int length) {
  int size = sizeof(int) * (length + 1);
  int *p = (int *)malloc(size);
  memset(p, 0, size);
  *p = length;
  return p + 1;
}


x86 assembly (clang, -O0):
<Tiger_new_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
cltq
shl    $0x2,%rax
mov    %eax,-0x8(%rbp)
movslq -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
movslq -0x8(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x4,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Tiger_new_array>:
push   %rbx
mov    %edi,%ebx
lea    0x4(,%rbx,4),%eax
movslq %eax,%rsi
mov    $0x1,%edi
call   1030 <calloc@plt>
mov    %ebx,(%rax)
add    $0x4,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @Tiger_new_array(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
%7 = sext i32 %6 to i64
%8 = mul i64 4, %7
%9 = trunc i64 %8 to i32
store i32 %9, i32* %3
%10 = load i32, i32* %3
%11 = sext i32 %10 to i64
%12 = call i8* @malloc(i64 %11)
%13 = bitcast i8* %12 to i32*
store i32* %13, i32** %4
%14 = load i32*, i32** %4
%15 = bitcast i32* %14 to i8*
%16 = load i32, i32* %3
%17 = sext i32 %16 to i64
%18 = load i32, i32* %2
%19 = load i32*, i32** %4
store i32 %18, i32* %19
%20 = load i32*, i32** %4
%21 = getelementptr inbounds i32, i32* %20, i64 1
%22 = bitcast i32* %21 to i8*
ret i8* %22
}

LLVM IR (-O2):
define noalias i8* @Tiger_new_array(i32 %0) {
%2 = shl i32 %0, 2
%3 = add i32 %2, 4
%4 = sext i32 %3 to i64
%5 = call i8* @calloc(i64 1, i64 %4)
%6 = bitcast i8* %5 to i32*
store i32 %0, i32* %6
%7 = getelementptr inbounds i32, i32* %6, i64 1
%8 = bitcast i32* %7 to i8*
ret i8* %8
}
/* Type definitions */
typedef scalar_t__ cl_int;

/* Variables and functions */
scalar_t__ CL_SUCCESS;
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void clGetPlatformIDsChecker(cl_int *err) {
  if (*err != CL_SUCCESS)
    fprintf(stderr, "clGetPlatformIDsChecker\n");
}


x86 assembly (clang, -O0):
<clGetPlatformIDsChecker>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    0x2eae(%rip),%rcx
cmp    (%rcx),%rax
je     1148 <clGetPlatformIDsChecker+0x38>
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
lea    0xebd(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clGetPlatformIDsChecker>:
mov    (%rdi),%rax
mov    0x2ebe(%rip),%rcx
cmp    (%rcx),%rax
jne    1120 <clGetPlatformIDsChecker+0x10>
ret
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
lea    0xed0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@CL_SUCCESS = global i64 0
@stderr = global i32 0
@.str = [25 x i8] c"clGetPlatformIDsChecker\0A\00"
define void @clGetPlatformIDsChecker(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = load i64, i64* @CL_SUCCESS
%6 = icmp ne i64 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* @stderr
%9 = call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
@CL_SUCCESS = global i64 0
@stderr = global i32 0
@.str = [25 x i8] c"clGetPlatformIDsChecker\0A\00"
define void @clGetPlatformIDsChecker(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = load i64, i64* @CL_SUCCESS
%4 = icmp eq i64 %2, %3
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* @stderr
%7 = tail call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %5, %1
ret void
}
/* Variables and functions */
int check(char *);
int /*<<< orphan*/ free(char *);
char *malloc(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, char *);
int main() {
  char *string = malloc(12);
  int data;
  scanf("%s", string);
  data = check(string);
  printf("%d\n", data);
  free(string);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xc,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xe88(%rip),%rdi
call   1060 <scanf@plt>
mov    -0x10(%rbp),%rdi
call   1070 <check@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%esi
lea    0xe70(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0xc,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
lea    0xe9b(%rip),%rdi
mov    %rax,%rsi
call   1060 <scanf@plt>
mov    %rbx,%rdi
call   1070 <check@plt>
lea    0xe87(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i32
store i32 0, i32* %1
%4 = call i8* @malloc(i32 12)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i8*, i8** %2
%8 = call i32 @check(i8* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %9)
%11 = load i8*, i8** %2
%12 = call i32 @free(i8* %11)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call dereferenceable_or_null(12) i8* @malloc(i32 12)
%2 = tail call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %1)
%3 = tail call i32 @check(i8* %1)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %3)
%5 = tail call i32 @free(i8* %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void printNL() { printf("\n"); }


x86 assembly (clang, -O0):
<printNL>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<printNL>:
mov    $0xa,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @printNL() {
%1 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @printNL() {
%1 = tail call i32 @putchar(i32 10)
ret void
}
int test_imm_90int32_mem(int *val) {
  return ((*val) & (0x90 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_90int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x90,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_90int32_mem>:
testb  $0x90,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_90int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 144
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_90int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 144
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void i2d_PKCS7_DIGEST(void) {}


x86 assembly (clang, -O0):
<i2d_PKCS7_DIGEST>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_PKCS7_DIGEST>:
ret

LLVM IR (-O0):
define void @i2d_PKCS7_DIGEST() {
ret void
}

LLVM IR (-O2):
define void @i2d_PKCS7_DIGEST() {
ret void
}
void UpdateAddName(struct SyncUpdateData *ud, struct ccn_charbuf *name) {}


x86 assembly (clang, -O0):
<UpdateAddName>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<UpdateAddName>:
ret

LLVM IR (-O0):
%struct.SyncUpdateData = type opaque
%struct.ccn_charbuf = type opaque
define void @UpdateAddName(%struct.SyncUpdateData* %0, %struct.ccn_charbuf* %1) {
%3 = alloca %struct.SyncUpdateData*
%4 = alloca %struct.ccn_charbuf*
store %struct.SyncUpdateData* %0, %struct.SyncUpdateData** %3
store %struct.ccn_charbuf* %1, %struct.ccn_charbuf** %4
ret void
}

LLVM IR (-O2):
%struct.SyncUpdateData = type opaque
%struct.ccn_charbuf = type opaque
define void @UpdateAddName(%struct.SyncUpdateData* nocapture %0, %struct.ccn_charbuf* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ExecCfg(char *, int);
void NETconfigure() { ExecCfg("configure", 1); }


x86 assembly (clang, -O0):
<NETconfigure>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
call   1030 <ExecCfg@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<NETconfigure>:
lea    0xee9(%rip),%rdi
mov    $0x1,%esi
jmp    1030 <ExecCfg@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"configure\00"
define void @NETconfigure() {
%1 = call i32 @ExecCfg(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"configure\00"
define void @NETconfigure() {
%1 = tail call i32 @ExecCfg(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *);
int /*<<< orphan*/ stderr;
void fail(const char *msg) {
  fprintf(stderr, "%s\n", msg);
  exit(2);
}


x86 assembly (clang, -O0):
<fail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fail>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x2,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @fail(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 2)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @fail(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 2)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *localtime(int /*<<< orphan*/ *);
struct tm getLocalTime(time_t t) {
  return *(localtime(&t));
}


x86 assembly (clang, -O0):
<getLocalTime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0xc(%rbp)
lea    -0xc(%rbp),%rdi
call   1030 <localtime@plt>
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getLocalTime>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
call   1030 <localtime@plt>
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define i32 @getLocalTime(i32 %0) {
%2 = alloca %struct.tm
%3 = alloca i32
store i32 %0, i32* %3
%4 = call %struct.tm* @localtime(i32* %3)
%5 = bitcast %struct.tm* %2 to i8*
%6 = bitcast %struct.tm* %4 to i8*
%7 = getelementptr inbounds %struct.tm, %struct.tm* %2, i32 0, i32 0
%8 = load i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define i32 @getLocalTime(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call %struct.tm* @localtime(i32* %2)
%4 = getelementptr inbounds %struct.tm, %struct.tm* %3, i64 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}
int count_multiples(int from, int to, int mult) {
  int first = (from / mult) * mult;
  if (first == from)
    first -= mult;
  return (to - first) / mult;
}


x86 assembly (clang, -O0):
<count_multiples>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0xc(%rbp)
imul   -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x4(%rbp),%eax
jne    1132 <count_multiples+0x32>
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x10(%rbp),%eax
cltd
idivl  -0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_multiples>:
mov    %edx,%ecx
mov    %edi,%eax
cltd
idiv   %ecx
xor    %eax,%eax
test   %edx,%edx
cmove  %ecx,%eax
sub    %edi,%esi
add    %esi,%edx
add    %edx,%eax
cltd
idiv   %ecx
ret

LLVM IR (-O0):
define i32 @count_multiples(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %6
%10 = sdiv i32 %8, %9
%11 = load i32, i32* %6
%12 = mul nsw i32 %10, %11
store i32 %12, i32* %7
%13 = load i32, i32* %7
%14 = load i32, i32* %4
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %20
16: ; preds = %3
%17 = load i32, i32* %6
%18 = load i32, i32* %7
%19 = sub nsw i32 %18, %17
store i32 %19, i32* %7
br label %20
20: ; preds = %16, %3
%21 = load i32, i32* %5
%22 = load i32, i32* %7
%23 = sub nsw i32 %21, %22
%24 = load i32, i32* %6
%25 = sdiv i32 %23, %24
ret i32 %25
}

LLVM IR (-O2):
define i32 @count_multiples(i32 %0, i32 %1, i32 %2) {
%4 = srem i32 %0, %2
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32 %2, i32 0
%7 = sub i32 %1, %0
%8 = add i32 %7, %4
%9 = add i32 %8, %6
%10 = sdiv i32 %9, %2
ret i32 %10
}
void McASPPinDirInputSet(unsigned int baseAddr, unsigned int pinMask) {
  (*((volatile unsigned int *)(baseAddr + (0x14)))) &= ~pinMask;
}


x86 assembly (clang, -O0):
<McASPPinDirInputSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edx
xor    $0xffffffff,%edx
mov    -0x4(%rbp),%eax
add    $0x14,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<McASPPinDirInputSet>:
not    %esi
add    $0x14,%edi
and    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @McASPPinDirInputSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = xor i32 %5, -1
%7 = load i32, i32* %3
%8 = add i32 %7, 20
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = and i32 %11, %6
store volatile i32 %12, i32* %10
ret void
}

LLVM IR (-O2):
define void @McASPPinDirInputSet(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = add i32 %0, 20
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, %3
store volatile i32 %8, i32* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void default_freeor(void *mem) { free(mem); }


x86 assembly (clang, -O0):
<default_freeor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_freeor>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @default_freeor(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @default_freeor(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void glutCopyColormap(int win) {}


x86 assembly (clang, -O0):
<glutCopyColormap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<glutCopyColormap>:
ret

LLVM IR (-O0):
define void @glutCopyColormap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @glutCopyColormap(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void error_handling(char *msg) {
  fputs(msg, stderr);
  fputc('\n', stderr);
  exit(1);
}


x86 assembly (clang, -O0):
<error_handling>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2e99(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2e8b(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<error_handling>:
push   %rbx
mov    0x2ea8(%rip),%rbx
mov    (%rbx),%esi
call   1030 <fputs@plt>
mov    (%rbx),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
define void @error_handling(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @stderr
%5 = call i32 @fputs(i8* %3, i32 %4)
%6 = load i32, i32* @stderr
%7 = call i32 @fputc(i8 signext 10, i32 %6)
%8 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
define void @error_handling(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputs(i8* %0, i32 %2)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fputc(i8 signext 10, i32 %4)
%6 = tail call i32 @exit(i32 1)
unreachable
}
unsigned char zig_zag_fixc(char inp) {
  return ((((unsigned char)(inp) >> ((sizeof(unsigned char) << 3) - 1))
               ? ((~(unsigned char)(inp)) << 1)
               : ((unsigned char)(inp) << 1)) ^
          ((unsigned char)(inp) >> ((sizeof(unsigned char) << 3) - 1)));
}


x86 assembly (clang, -O0):
<zig_zag_fixc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
sar    $0x7,%eax
cmp    $0x0,%eax
je     112c <zig_zag_fixc+0x2c>
movzbl -0x1(%rbp),%eax
xor    $0xffffffff,%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <zig_zag_fixc+0x36>
movzbl -0x1(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
movzbl -0x1(%rbp),%ecx
sar    $0x7,%ecx
xor    %ecx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<zig_zag_fixc>:
mov    %edi,%eax
sar    $0x7,%al
xor    %dil,%al
add    %al,%al
shr    $0x7,%dil
or     %dil,%al
ret

LLVM IR (-O0):
define zeroext i8 @zig_zag_fixc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = ashr i32 %4, 7
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = xor i32 %9, -1
%11 = shl i32 %10, 1
br label %16
12: ; preds = %1
%13 = load i8, i8* %2
%14 = zext i8 %13 to i32
%15 = shl i32 %14, 1
br label %16
16: ; preds = %12, %7
%17 = phi i32 [ %11, %7 ], [ %15, %12 ]
%18 = load i8, i8* %2
%19 = zext i8 %18 to i32
%20 = ashr i32 %19, 7
%21 = xor i32 %17, %20
%22 = trunc i32 %21 to i8
ret i8 %22
}

LLVM IR (-O2):
define zeroext i8 @zig_zag_fixc(i8 signext %0) {
%2 = ashr i8 %0, 7
%3 = xor i8 %2, %0
%4 = tail call i8 @llvm.fshl.i8(i8 %3, i8 %0, i8 1)
ret i8 %4
}
void malloc_debug_init(void) {}


x86 assembly (clang, -O0):
<malloc_debug_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_debug_init>:
ret

LLVM IR (-O0):
define void @malloc_debug_init() {
ret void
}

LLVM IR (-O2):
define void @malloc_debug_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int /*<<< orphan*/ foo1();
int /*<<< orphan*/ foo2();
int main(void) {
  foo();
  foo1();
  foo2();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <foo@plt>
mov    $0x0,%al
call   1050 <foo1@plt>
mov    $0x0,%al
call   1030 <foo2@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <foo@plt>
xor    %eax,%eax
call   1050 <foo1@plt>
xor    %eax,%eax
call   1030 <foo2@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 (...) @foo()
%2 = call i32 (...) @foo1()
%3 = call i32 (...) @foo2()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @foo()
%2 = tail call i32 (...) @foo1()
%3 = tail call i32 (...) @foo2()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/
__softboundcets_propagate_metadata_shadow_stack_from(int, int /*<<< orphan*/);
int /*<<< orphan*/ __softboundcets_store_null_return_metadata();
void *memchr(void const *, int, size_t);
__attribute__((__weak__, __always___)) void *
softboundcets_memchr(const void *s, int c, size_t n) {
  void *ret_ptr = memchr(s, c, n);
  if (ret_ptr != NULL) {
    __softboundcets_propagate_metadata_shadow_stack_from(1, 0);
  } else {
    __softboundcets_store_null_return_metadata();
  }
  return ret_ptr;
}


x86 assembly (clang, -O0):
<softboundcets_memchr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rdx
call   1030 <memchr@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     1173 <softboundcets_memchr+0x43>
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <__softboundcets_propagate_metadata_shadow_stack_from@plt>
jmp    117a <softboundcets_memchr+0x4a>
mov    $0x0,%al
call   1050 <__softboundcets_store_null_return_metadata@plt>
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<softboundcets_memchr>:
push   %rbx
call   1030 <memchr@plt>
mov    %rax,%rbx
test   %rax,%rax
je     114c <softboundcets_memchr+0x1c>
mov    $0x1,%edi
xor    %esi,%esi
call   1040 <__softboundcets_propagate_metadata_shadow_stack_from@plt>
jmp    1153 <softboundcets_memchr+0x23>
xor    %eax,%eax
call   1050 <__softboundcets_store_null_return_metadata@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define weak i8* @softboundcets_memchr(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
%7 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %5
%10 = load i64, i64* %6
%11 = call i8* @memchr(i8* %8, i32 %9, i64 %10)
store i8* %11, i8** %7
%12 = load i8*, i8** %7
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = call i32 @__softboundcets_propagate_metadata_shadow_stack_from(i32 1, i32 0)
br label %18
16: ; preds = %3
%17 = call i32 (...) @__softboundcets_store_null_return_metadata()
br label %18
18: ; preds = %16, %14
%19 = load i8*, i8** %7
ret i8* %19
}

LLVM IR (-O2):
define weak i8* @softboundcets_memchr(i8* %0, i32 %1, i64 %2) {
%4 = tail call i8* @memchr(i8* %0, i32 %1, i64 %2)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @__softboundcets_propagate_metadata_shadow_stack_from(i32 1, i32 0)
br label %10
8: ; preds = %3
%9 = tail call i32 (...) @__softboundcets_store_null_return_metadata()
br label %10
10: ; preds = %8, %6
ret i8* %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
void I2CSlaveACKValueSet(uint32_t ui32Base, bool bACK) {
  ;
  if (bACK) {
    (*((volatile uint32_t *)(ui32Base + 0x00000820))) &= ~0x00000002;
  } else {
    (*((volatile uint32_t *)(ui32Base + 0x00000820))) |= 0x00000002;
  }
}


x86 assembly (clang, -O0):
<I2CSlaveACKValueSet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112a <I2CSlaveACKValueSet+0x2a>
mov    -0x4(%rbp),%eax
add    $0x820,%eax
cltq
mov    (%rax),%ecx
and    $0xfffffffd,%ecx
mov    %ecx,(%rax)
jmp    113b <I2CSlaveACKValueSet+0x3b>
mov    -0x4(%rbp),%eax
add    $0x820,%eax
cltq
mov    (%rax),%ecx
or     $0x2,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CSlaveACKValueSet>:
xor    %eax,%eax
test   %esi,%esi
sete   %al
movslq %edi,%rcx
mov    0x820(%rcx),%edx
and    $0xfffffffd,%edx
lea    (%rdx,%rax,2),%eax
mov    %eax,0x820(%rcx)
ret

LLVM IR (-O0):
define void @I2CSlaveACKValueSet(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 2080
%10 = sext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
%13 = and i32 %12, -3
store volatile i32 %13, i32* %11
br label %21
14: ; preds = %2
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 2080
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i32*
%19 = load volatile i32, i32* %18
%20 = or i32 %19, 2
store volatile i32 %20, i32* %18
br label %21
21: ; preds = %14, %7
ret void
}

LLVM IR (-O2):
define void @I2CSlaveACKValueSet(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = add nsw i32 %0, 2080
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, -3
%9 = select i1 %3, i32 2, i32 0
%10 = or i32 %8, %9
store volatile i32 %10, i32* %6
ret void
}
parity(word) int word;
{
  register int p = 0;
  register int w = word;
  if (w)
    do {
      p ^= 1;
    } while (w &= (~(-w)));
  return (p ? 1 : -1);
}


x86 assembly (clang, -O0):
<parity>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1148 <parity+0x48>
jmp    1123 <parity+0x23>
mov    -0x8(%rbp),%eax
xor    $0x1,%eax
mov    %eax,-0x8(%rbp)
xor    %eax,%eax
sub    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
and    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
jne    1123 <parity+0x23>
jmp    1148 <parity+0x48>
mov    -0x8(%rbp),%edx
mov    $0xffffffff,%eax
mov    $0x1,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<parity>:
test   %edi,%edi
je     1126 <parity+0x26>
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
xor    $0x1,%ecx
lea    -0x1(%rdi),%eax
and    %edi,%eax
mov    %eax,%edi
jne    1110 <parity+0x10>
mov    $0x1,%eax
test   %ecx,%ecx
je     1126 <parity+0x26>
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @parity(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%5 = load i32, i32* %2
store i32 %5, i32* %4
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %20
8: ; preds = %1
br label %9
9: ; preds = %12, %8
%10 = load i32, i32* %3
%11 = xor i32 %10, 1
store i32 %11, i32* %3
br label %12
12: ; preds = %9
%13 = load i32, i32* %4
%14 = sub nsw i32 0, %13
%15 = xor i32 %14, -1
%16 = load i32, i32* %4
%17 = and i32 %16, %15
store i32 %17, i32* %4
%18 = icmp ne i32 %17, 0
br i1 %18, label %9, label %19
19: ; preds = %12
br label %20
20: ; preds = %19, %1
%21 = load i32, i32* %3
%22 = icmp ne i32 %21, 0
%23 = zext i1 %22 to i64
%24 = select i1 %22, i32 1, i32 -1
ret i32 %24
}

LLVM IR (-O2):
define i32 @parity(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 0, %1 ]
%5 = phi i32 [ %8, %3 ], [ %0, %1 ]
%6 = xor i32 %4, 1
%7 = add i32 %5, -1
%8 = and i32 %7, %5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %3
10: ; preds = %3
%11 = icmp eq i32 %6, 0
br i1 %11, label %12, label %13
12: ; preds = %1, %10
br label %13
13: ; preds = %10, %12
%14 = phi i32 [ -1, %12 ], [ 1, %10 ]
ret i32 %14
}
/* Variables and functions */
scalar_t__ cpu_is_exynos5();
unsigned int exynos_fimd_get_base_offset(void) {
  if (cpu_is_exynos5())
    return 0x20000;
  else
    return 0x0;
}


x86 assembly (clang, -O0):
<exynos_fimd_get_base_offset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <cpu_is_exynos5@plt>
cmp    $0x0,%rax
je     1135 <exynos_fimd_get_base_offset+0x25>
movl   $0x20000,-0x4(%rbp)
jmp    113c <exynos_fimd_get_base_offset+0x2c>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exynos_fimd_get_base_offset>:
push   %rax
xor    %eax,%eax
call   1030 <cpu_is_exynos5@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
shl    $0x11,%ecx
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @exynos_fimd_get_base_offset() {
%1 = alloca i32
%2 = call i64 (...) @cpu_is_exynos5()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 131072, i32* %1
br label %6
5: ; preds = %0
store i32 0, i32* %1
br label %6
6: ; preds = %5, %4
%7 = load i32, i32* %1
ret i32 %7
}

LLVM IR (-O2):
define i32 @exynos_fimd_get_base_offset() {
%1 = tail call i64 (...) @cpu_is_exynos5()
%2 = icmp eq i64 %1, 0
%3 = select i1 %2, i32 0, i32 131072
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x40() {
  Assert_real((iscntrl(64) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              325, ("iscntrl should be 0 for @"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x40>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x145,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x40>:
push   %rax
mov    $0x40,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x145,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for @\00"
define void @t_iscntrl_0x40() {
%1 = call i64 @iscntrl(i32 64)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 325, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for @\00"
define void @t_iscntrl_0x40() {
%1 = tail call i64 @iscntrl(i32 64)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 325, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void handler_usr1(int i) { puts("got signal usr1"); }


x86 assembly (clang, -O0):
<handler_usr1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler_usr1>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"got signal usr1\00"
define void @handler_usr1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @puts(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"got signal usr1\00"
define void @handler_usr1(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int singleNumber(int *, int);
int main(void) {
  int arr[] = {1, 2, 3, -1, -2, -3, 1, 2, -1, -3, -2};
  printf("%d\n", singleNumber(arr, 11));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x30(%rbp),%rdi
lea    0xeb6(%rip),%rsi
mov    $0x2c,%edx
call   1050 <memcpy@plt>
lea    -0x30(%rbp),%rdi
mov    $0xb,%esi
call   1030 <singleNumber@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x38,%rsp
movups 0xef1(%rip),%xmm0
movups %xmm0,0x1c(%rsp)
movaps 0xed9(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xebd(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0xb,%esi
call   1030 <singleNumber@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x38,%rsp
ret

LLVM IR (-O0):
@__const.main.arr = [11 x i32] [i32 1, i32 2, i32 3, i32 -1, i32 -2, i32 -3, i32 1, i32 2, i32 -1, i32 -3, i32 -2]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [11 x i32]
store i32 0, i32* %1
%3 = bitcast [11 x i32]* %2 to i8*
%4 = getelementptr inbounds [11 x i32], [11 x i32]* %2, i64 0, i64 0
%5 = call i32 @singleNumber(i32* %4, i32 11)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [11 x i32] [i32 1, i32 2, i32 3, i32 -1, i32 -2, i32 -3, i32 1, i32 2, i32 -1, i32 -3, i32 -2]
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca [11 x i32]
%2 = bitcast [11 x i32]* %1 to i8*
%3 = getelementptr inbounds [11 x i32], [11 x i32]* %1, i64 0, i64 0
%4 = call i32 @singleNumber(i32* %3, i32 11)
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fwrite(void *, int, int, int /*<<< orphan*/ *);
void write_file(void *privData, void *etiData, int etiLen) {
  FILE *fh = (FILE *)privData;
  fwrite(etiData, 1, etiLen, fh);
}


x86 assembly (clang, -O0):
<write_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%edx
mov    -0x20(%rbp),%rcx
mov    $0x1,%esi
call   1030 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_file>:
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x1,%esi
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
define void @write_file(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
store i32* %9, i32** %7
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = load i32*, i32** %7
%13 = call i32 @fwrite(i8* %10, i32 1, i32 %11, i32* %12)
ret void
}

LLVM IR (-O2):
define void @write_file(i8* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = bitcast i8* %0 to i32*
%5 = tail call i32 @fwrite(i8* %1, i32 1, i32 %2, i32* %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ERR_load_SSL_strings();
int /*<<< orphan*/ ERR_load_crypto_strings();
void SSL_load_error_strings(void) {
  ERR_load_crypto_strings();
  ERR_load_SSL_strings();
}


x86 assembly (clang, -O0):
<SSL_load_error_strings>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <ERR_load_crypto_strings@plt>
mov    $0x0,%al
call   1030 <ERR_load_SSL_strings@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SSL_load_error_strings>:
push   %rax
xor    %eax,%eax
call   1040 <ERR_load_crypto_strings@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <ERR_load_SSL_strings@plt>

LLVM IR (-O0):
define void @SSL_load_error_strings() {
%1 = call i32 (...) @ERR_load_crypto_strings()
%2 = call i32 (...) @ERR_load_SSL_strings()
ret void
}

LLVM IR (-O2):
define void @SSL_load_error_strings() {
%1 = tail call i32 (...) @ERR_load_crypto_strings()
%2 = tail call i32 (...) @ERR_load_SSL_strings()
ret void
}