#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int access;

/* Variables and functions */
int O_APPEND;
int O_FSYNC;
int O_RDONLY;
int O_RDWR;
int O_WRONLY;
int FlagsFromAccess(int access) {
  int flags = 0;
  if ((((access) & (0x00000001)) == (0x00000001))) {
    if ((((access) & (0x00000002)) == (0x00000002)))
      flags = O_RDWR;
    else
      flags = O_RDONLY;
  } else if ((((access) & (0x00000002)) == (0x00000002)))
    flags = O_WRONLY;
  if ((((access) & (0x00000004)) == (0x00000004)))
    flags |= O_APPEND;
  if ((((access) & (0x00100000)) == (0x00100000)))
    flags |= O_FSYNC;
  return (flags);
}


x86 assembly (clang, -O0):
<FlagsFromAccess>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x1,%eax
jne    114e <FlagsFromAccess+0x4e>
mov    -0x4(%rbp),%eax
and    $0x2,%eax
cmp    $0x2,%eax
jne    113d <FlagsFromAccess+0x3d>
mov    0x2eb5(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
jmp    1149 <FlagsFromAccess+0x49>
mov    0x2e9c(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
jmp    116e <FlagsFromAccess+0x6e>
mov    -0x4(%rbp),%eax
and    $0x2,%eax
cmp    $0x2,%eax
jne    1169 <FlagsFromAccess+0x69>
mov    0x2e5c(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
jmp    116e <FlagsFromAccess+0x6e>
mov    -0x4(%rbp),%eax
and    $0x4,%eax
cmp    $0x4,%eax
jne    118c <FlagsFromAccess+0x8c>
mov    0x2e34(%rip),%rax
mov    (%rax),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    $0x100000,%eax
cmp    $0x100000,%eax
jne    11ae <FlagsFromAccess+0xae>
mov    0x2e2a(%rip),%rax
mov    (%rax),%eax
or     -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FlagsFromAccess>:
mov    %edi,%eax
test   $0x1,%al
jne    1119 <FlagsFromAccess+0x19>
mov    %eax,%ecx
shl    $0x1e,%ecx
sar    $0x1f,%ecx
mov    0x2eab(%rip),%rdx
and    (%rdx),%ecx
jmp    112f <FlagsFromAccess+0x2f>
test   $0x2,%al
jne    1126 <FlagsFromAccess+0x26>
mov    0x2ebc(%rip),%rcx
jmp    112d <FlagsFromAccess+0x2d>
mov    0x2ebb(%rip),%rcx
mov    (%rcx),%ecx
mov    %eax,%edx
shl    $0x1d,%edx
sar    $0x1f,%edx
mov    0x2e7a(%rip),%rsi
and    (%rsi),%edx
or     %ecx,%edx
shl    $0xb,%eax
sar    $0x1f,%eax
mov    0x2e81(%rip),%rcx
and    (%rcx),%eax
or     %edx,%eax
ret

LLVM IR (-O0):
@O_RDWR = global i32 0
@O_RDONLY = global i32 0
@O_WRONLY = global i32 0
@O_APPEND = global i32 0
@O_FSYNC = global i32 0
define i32 @FlagsFromAccess(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = and i32 %4, 1
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load i32, i32* %2
%9 = and i32 %8, 2
%10 = icmp eq i32 %9, 2
br i1 %10, label %11, label %13
11: ; preds = %7
%12 = load i32, i32* @O_RDWR
store i32 %12, i32* %3
br label %15
13: ; preds = %7
%14 = load i32, i32* @O_RDONLY
store i32 %14, i32* %3
br label %15
15: ; preds = %13, %11
br label %23
16: ; preds = %1
%17 = load i32, i32* %2
%18 = and i32 %17, 2
%19 = icmp eq i32 %18, 2
br i1 %19, label %20, label %22
20: ; preds = %16
%21 = load i32, i32* @O_WRONLY
store i32 %21, i32* %3
br label %22
22: ; preds = %20, %16
br label %23
23: ; preds = %22, %15
%24 = load i32, i32* %2
%25 = and i32 %24, 4
%26 = icmp eq i32 %25, 4
br i1 %26, label %27, label %31
27: ; preds = %23
%28 = load i32, i32* @O_APPEND
%29 = load i32, i32* %3
%30 = or i32 %29, %28
store i32 %30, i32* %3
br label %31
31: ; preds = %27, %23
%32 = load i32, i32* %2
%33 = and i32 %32, 1048576
%34 = icmp eq i32 %33, 1048576
br i1 %34, label %35, label %39
35: ; preds = %31
%36 = load i32, i32* @O_FSYNC
%37 = load i32, i32* %3
%38 = or i32 %37, %36
store i32 %38, i32* %3
br label %39
39: ; preds = %35, %31
%40 = load i32, i32* %3
ret i32 %40
}

LLVM IR (-O2):
@O_RDWR = global i32 0
@O_RDONLY = global i32 0
@O_WRONLY = global i32 0
@O_APPEND = global i32 0
@O_FSYNC = global i32 0
define i32 @FlagsFromAccess(i32 %0) {
%2 = and i32 %0, 1
%3 = icmp eq i32 %2, 0
%4 = and i32 %0, 2
%5 = icmp eq i32 %4, 0
br i1 %3, label %11, label %6
6: ; preds = %1
br i1 %5, label %9, label %7
7: ; preds = %6
%8 = load i32, i32* @O_RDWR
br label %14
9: ; preds = %6
%10 = load i32, i32* @O_RDONLY
br label %14
11: ; preds = %1
%12 = load i32, i32* @O_WRONLY
%13 = select i1 %5, i32 0, i32 %12
br label %14
14: ; preds = %11, %7, %9
%15 = phi i32 [ %8, %7 ], [ %10, %9 ], [ %13, %11 ]
%16 = and i32 %0, 4
%17 = icmp eq i32 %16, 0
%18 = load i32, i32* @O_APPEND
%19 = select i1 %17, i32 0, i32 %18
%20 = or i32 %19, %15
%21 = and i32 %0, 1048576
%22 = icmp eq i32 %21, 0
%23 = load i32, i32* @O_FSYNC
%24 = select i1 %22, i32 0, i32 %23
%25 = or i32 %20, %24
ret i32 %25
}