xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t plan_prev_block_index(uint32_t block_index) {
  if (block_index == 0) {
    block_index = 8192;
  }
  block_index--;
  return (block_index);
}


x86 assembly (clang, -O0):
<plan_prev_block_index>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1118 <plan_prev_block_index+0x18>
movl   $0x2000,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<plan_prev_block_index>:
sub    $0x1,%edi
mov    $0x1fff,%eax
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @plan_prev_block_index(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
store i32 8192, i32* %2
br label %6
6: ; preds = %5, %1
%7 = load i32, i32* %2
%8 = add nsw i32 %7, -1
store i32 %8, i32* %2
%9 = load i32, i32* %2
ret i32 %9
}

LLVM IR (-O2):
define i32 @plan_prev_block_index(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = add nsw i32 %0, -1
%4 = select i1 %2, i32 8191, i32 %3
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ chtype;
typedef int /*<<< orphan*/ WINDOW;

/* Variables and functions */
scalar_t__ COLOR_PAIR(int);
int /*<<< orphan*/ *newwin(int, int, int, int);
int /*<<< orphan*/ refresh();
int /*<<< orphan*/ wbkgd(int /*<<< orphan*/ *, int /*<<< orphan*/);
int /*<<< orphan*/ wrefresh(int /*<<< orphan*/ *);
WINDOW *create_window(int height, int width, int y, int x, int color_pair) {
  WINDOW *window = newwin(height, width, y, x);
  wbkgd(window, (chtype)COLOR_PAIR(color_pair));
  refresh();
  wrefresh(window);
  return window;
}


x86 assembly (clang, -O0):
<create_window>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1050 <newwin@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x14(%rbp),%edi
call   1060 <COLOR_PAIR@plt>
mov    -0x28(%rbp),%rdi
mov    %eax,%esi
call   1030 <wbkgd@plt>
mov    $0x0,%al
call   1070 <refresh@plt>
mov    -0x20(%rbp),%rdi
call   1040 <wrefresh@plt>
mov    -0x20(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_window>:
push   %rbp
push   %rbx
push   %rax
mov    %r8d,%ebp
call   1050 <newwin@plt>
mov    %rax,%rbx
mov    %ebp,%edi
call   1060 <COLOR_PAIR@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1030 <wbkgd@plt>
xor    %eax,%eax
call   1070 <refresh@plt>
mov    %rbx,%rdi
call   1040 <wrefresh@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32* @create_window(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32*
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = call i32* @newwin(i32 %12, i32 %13, i32 %14, i32 %15)
store i32* %16, i32** %11
%17 = load i32*, i32** %11
%18 = load i32, i32* %10
%19 = call i64 @COLOR_PAIR(i32 %18)
%20 = trunc i64 %19 to i32
%21 = call i32 @wbkgd(i32* %17, i32 %20)
%22 = call i32 (...) @refresh()
%23 = load i32*, i32** %11
%24 = call i32 @wrefresh(i32* %23)
%25 = load i32*, i32** %11
ret i32* %25
}

LLVM IR (-O2):
define i32* @create_window(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32* @newwin(i32 %0, i32 %1, i32 %2, i32 %3)
%7 = tail call i64 @COLOR_PAIR(i32 %4)
%8 = trunc i64 %7 to i32
%9 = tail call i32 @wbkgd(i32* %6, i32 %8)
%10 = tail call i32 (...) @refresh()
%11 = tail call i32 @wrefresh(i32* %6)
ret i32* %6
}
/* Variables and functions */
double __ocml_acos_f64(double);
double acos(double x) { return __ocml_acos_f64(x); }


x86 assembly (clang, -O0):
<acos>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__ocml_acos_f64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acos>:
jmp    1030 <__ocml_acos_f64@plt>

LLVM IR (-O0):
define double @acos(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__ocml_acos_f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @acos(double %0) {
%2 = tail call double @__ocml_acos_f64(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ clearServer();
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void sigintHandler(int sig) {
  clearServer();
  exit(0);
}


x86 assembly (clang, -O0):
<sigintHandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1040 <clearServer@plt>
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<sigintHandler>:
push   %rax
xor    %eax,%eax
call   1040 <clearServer@plt>
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @sigintHandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @clearServer()
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @sigintHandler(i32 %0) {
%2 = tail call i32 (...) @clearServer()
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ send_string(char const *);
void bbs_menu() {
  const static char menu_text[] = "(L)ist, (H)elp, (P)ost, (R)ead\n";
  send_string(menu_text);
}


x86 assembly (clang, -O0):
<bbs_menu>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <send_string@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bbs_menu>:
lea    0xee9(%rip),%rdi
jmp    1030 <send_string@plt>

LLVM IR (-O0):
@bbs_menu.menu_text = internal constant [32 x i8] c"(L)ist, (H)elp, (P)ost, (R)ead\0A\00"
define void @bbs_menu() {
%1 = call i32 @send_string(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @bbs_menu.menu_text, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@bbs_menu.menu_text = internal constant [32 x i8] c"(L)ist, (H)elp, (P)ost, (R)ead\0A\00"
define void @bbs_menu() {
%1 = tail call i32 @send_string(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @bbs_menu.menu_text, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cleanexit(int);
void handle_sigabrt(int arg) { cleanexit(-1); }


x86 assembly (clang, -O0):
<handle_sigabrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%edi
call   1030 <cleanexit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handle_sigabrt>:
mov    $0xffffffff,%edi
jmp    1030 <cleanexit@plt>

LLVM IR (-O0):
define void @handle_sigabrt(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @cleanexit(i32 -1)
ret void
}

LLVM IR (-O2):
define void @handle_sigabrt(i32 %0) {
%2 = tail call i32 @cleanexit(i32 -1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ genericError(char *, int, char const *, int const, int const,
                                int const);
void __errorNoRelFound(const char *file, const int line, const int sourceId,
                       const int sinkId) {
  genericError("%s:%d There is a <no relation> within the graph %d -> %d. The "
               "graph is inconsistent by default",
               8, file, line, sourceId, sinkId);
}


x86 assembly (clang, -O0):
<__errorNoRelFound>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
mov    -0x10(%rbp),%r8d
mov    -0x14(%rbp),%r9d
lea    0xec5(%rip),%rdi
mov    $0x8,%esi
call   1030 <genericError@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__errorNoRelFound>:
mov    %ecx,%r9d
mov    %edx,%r8d
mov    %esi,%ecx
mov    %rdi,%rdx
lea    0xede(%rip),%rdi
mov    $0x8,%esi
jmp    1030 <genericError@plt>

LLVM IR (-O0):
@.str = [95 x i8] c"%s:%d There is a <no relation> within the graph %d -> %d. The graph is inconsistent by default\00"
define void @__errorNoRelFound(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @genericError(i8* getelementptr inbounds ([95 x i8], [95 x i8]* @.str, i64 0, i64 0), i32 8, i8* %9, i32 %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
@.str = [95 x i8] c"%s:%d There is a <no relation> within the graph %d -> %d. The graph is inconsistent by default\00"
define void @__errorNoRelFound(i8* %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @genericError(i8* getelementptr inbounds ([95 x i8], [95 x i8]* @.str, i64 0, i64 0), i32 8, i8* %0, i32 %1, i32 %2, i32 %3)
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
uint32_t get_t(int32_t value) {
  value = value / 256;
  return value >> 4;
}


x86 assembly (clang, -O0):
<get_t>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x100,%ecx
cltd
idiv   %ecx
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_t>:
lea    0xff(%rdi),%eax
test   %edi,%edi
cmovns %edi,%eax
sar    $0xc,%eax
ret

LLVM IR (-O0):
define i32 @get_t(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sdiv i32 %3, 256
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = ashr i32 %5, 4
ret i32 %6
}

LLVM IR (-O2):
define i32 @get_t(i32 %0) {
%2 = sdiv i32 %0, 256
%3 = ashr i32 %2, 4
ret i32 %3
}
int RunYear(int year) {
  if (year % 4 == 0 && year % 100 != 0)
    return 1;
  else if (year % 400 == 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<RunYear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    113b <RunYear+0x3b>
mov    -0x8(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
je     113b <RunYear+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    1162 <RunYear+0x62>
mov    -0x8(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    115b <RunYear+0x5b>
movl   $0x1,-0x4(%rbp)
jmp    1162 <RunYear+0x62>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RunYear>:
test   $0x3,%dil
jne    112c <RunYear+0x2c>
movslq %edi,%rax
imul   $0x51eb851f,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x25,%rax
add    %ecx,%eax
imul   $0x64,%eax,%ecx
mov    %edi,%edx
mov    $0x1,%eax
sub    %ecx,%edx
je     112c <RunYear+0x2c>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
ror    $0x4,%ecx
xor    %eax,%eax
cmp    $0xa3d70b,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @RunYear(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i32, i32* %3
%9 = srem i32 %8, 100
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %18
12: ; preds = %7, %1
%13 = load i32, i32* %3
%14 = srem i32 %13, 400
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %17
16: ; preds = %12
store i32 1, i32* %2
br label %18
17: ; preds = %12
store i32 0, i32* %2
br label %18
18: ; preds = %17, %16, %11
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @RunYear(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp ne i32 %2, 0
%4 = srem i32 %0, 100
%5 = icmp eq i32 %4, 0
%6 = or i1 %3, %5
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = srem i32 %0, 400
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %7, %1
%12 = phi i32 [ 1, %1 ], [ %10, %7 ]
ret i32 %12
}
/* Variables and functions */
int core6_swap(char *, int);
int U_EMRPOLYBEZIER16_swap(char *record, int torev) {
  return (core6_swap(record, torev));
}


x86 assembly (clang, -O0):
<U_EMRPOLYBEZIER16_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core6_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRPOLYBEZIER16_swap>:
jmp    1030 <core6_swap@plt>

LLVM IR (-O0):
define i32 @U_EMRPOLYBEZIER16_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core6_swap(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @U_EMRPOLYBEZIER16_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core6_swap(i8* %0, i32 %1)
ret i32 %3
}
short htots(short val) { return (val); }


x86 assembly (clang, -O0):
<htots>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htots>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define signext i16 @htots(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
ret i16 %3
}

LLVM IR (-O2):
define signext i16 @htots(i16 returned signext %0) {
ret i16 %0
}
void LPCChannelDMAConfigSet(unsigned long ulBase, unsigned long ulConfig,
                            unsigned long ulMask) {
  unsigned long ulTemp;
  ;
  ;
  ;
  ;
  ;
  ;
  ;
  ulTemp = (*((volatile unsigned long *)(ulBase + 0x00000120)));
  ulTemp &= ~ulMask;
  ulTemp |= (ulConfig & ulMask);
  (*((volatile unsigned long *)(ulBase + 0x00000120))) = ulTemp;
}


x86 assembly (clang, -O0):
<LPCChannelDMAConfigSet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    0x120(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
xor    $0xffffffffffffffff,%rax
and    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
and    -0x18(%rbp),%rax
or     -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x120(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<LPCChannelDMAConfigSet>:
mov    0x120(%rdi),%rax
xor    %rax,%rsi
and    %rdx,%rsi
xor    %rax,%rsi
mov    %rsi,0x120(%rdi)
ret

LLVM IR (-O0):
define void @LPCChannelDMAConfigSet(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%8 = load i64, i64* %4
%9 = add i64 %8, 288
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
store i64 %11, i64* %7
%12 = load i64, i64* %6
%13 = xor i64 %12, -1
%14 = load i64, i64* %7
%15 = and i64 %14, %13
store i64 %15, i64* %7
%16 = load i64, i64* %5
%17 = load i64, i64* %6
%18 = and i64 %16, %17
%19 = load i64, i64* %7
%20 = or i64 %19, %18
store i64 %20, i64* %7
%21 = load i64, i64* %7
%22 = load i64, i64* %4
%23 = add i64 %22, 288
%24 = inttoptr i64 %23 to i64*
store volatile i64 %21, i64* %24
ret void
}

LLVM IR (-O2):
define void @LPCChannelDMAConfigSet(i64 %0, i64 %1, i64 %2) {
%4 = add i64 %0, 288
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = xor i64 %2, -1
%8 = and i64 %6, %7
%9 = and i64 %2, %1
%10 = or i64 %8, %9
store volatile i64 %10, i64* %5
ret void
}
/* Variables and functions */
bool embeded_comment(const char *ptr) { return false; }


x86 assembly (clang, -O0):
<embeded_comment>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<embeded_comment>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @embeded_comment(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @embeded_comment(i8* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int /*<<< orphan*/);
int /*<<< orphan*/ I2CMasterBaseValid(unsigned long);
unsigned long I2CMasterErr(unsigned long ulBase) {
  unsigned long ulErr;
  DEBUG_ASSERT(I2CMasterBaseValid(ulBase));
  ulErr = (*((volatile unsigned long *)(ulBase + 0x00000004)));
  if (ulErr & 0x00000001) {
    return (0);
  }
  if (ulErr & (0x00000002 | 0x00000010)) {
    return (ulErr & (0x00000010 | 0x00000008 | 0x00000004));
  } else {
    return (0);
  }
}


x86 assembly (clang, -O0):
<I2CMasterErr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <I2CMasterBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rax
mov    0x4(%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     1167 <I2CMasterErr+0x47>
movq   $0x0,-0x8(%rbp)
jmp    1192 <I2CMasterErr+0x72>
mov    -0x18(%rbp),%rax
and    $0x12,%rax
cmp    $0x0,%rax
je     118a <I2CMasterErr+0x6a>
mov    -0x18(%rbp),%rax
and    $0x1c,%rax
mov    %rax,-0x8(%rbp)
jmp    1192 <I2CMasterErr+0x72>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CMasterErr>:
push   %rbx
mov    %rdi,%rbx
call   1030 <I2CMasterBaseValid@plt>
mov    %eax,%edi
call   1040 <DEBUG_ASSERT@plt>
mov    0x4(%rbx),%rcx
mov    %ecx,%eax
and    $0x12,%eax
mov    %ecx,%edx
and    $0x1c,%edx
test   %rax,%rax
cmove  %rax,%rdx
xor    %eax,%eax
test   $0x1,%cl
cmove  %rdx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @I2CMasterErr(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
%5 = load i64, i64* %3
%6 = call i32 @I2CMasterBaseValid(i64 %5)
%7 = call i32 @DEBUG_ASSERT(i32 %6)
%8 = load i64, i64* %3
%9 = add i64 %8, 4
%10 = inttoptr i64 %9 to i64*
%11 = load volatile i64, i64* %10
store i64 %11, i64* %4
%12 = load i64, i64* %4
%13 = and i64 %12, 1
%14 = icmp ne i64 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %1
store i64 0, i64* %2
br label %24
16: ; preds = %1
%17 = load i64, i64* %4
%18 = and i64 %17, 18
%19 = icmp ne i64 %18, 0
br i1 %19, label %20, label %23
20: ; preds = %16
%21 = load i64, i64* %4
%22 = and i64 %21, 28
store i64 %22, i64* %2
br label %24
23: ; preds = %16
store i64 0, i64* %2
br label %24
24: ; preds = %23, %20, %15
%25 = load i64, i64* %2
ret i64 %25
}

LLVM IR (-O2):
define i64 @I2CMasterErr(i64 %0) {
%2 = tail call i32 @I2CMasterBaseValid(i64 %0)
%3 = tail call i32 @DEBUG_ASSERT(i32 %2)
%4 = add i64 %0, 4
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 1
%8 = icmp ne i64 %7, 0
%9 = and i64 %6, 18
%10 = icmp eq i64 %9, 0
%11 = or i1 %8, %10
%12 = and i64 %6, 28
%13 = select i1 %11, i64 0, i64 %12
ret i64 %13
}
void smp_send_reschedule_allbutself(void) {}


x86 assembly (clang, -O0):
<smp_send_reschedule_allbutself>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smp_send_reschedule_allbutself>:
ret

LLVM IR (-O0):
define void @smp_send_reschedule_allbutself() {
ret void
}

LLVM IR (-O2):
define void @smp_send_reschedule_allbutself() {
ret void
}
void evtchn_alloc_unbound(void) {}


x86 assembly (clang, -O0):
<evtchn_alloc_unbound>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evtchn_alloc_unbound>:
ret

LLVM IR (-O0):
define void @evtchn_alloc_unbound() {
ret void
}

LLVM IR (-O2):
define void @evtchn_alloc_unbound() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ MON_5;
char *nl_langinfo(int /*<<< orphan*/);
char *langinfo_mon_5() { return nl_langinfo(MON_5); }


x86 assembly (clang, -O0):
<langinfo_mon_5>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <nl_langinfo@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<langinfo_mon_5>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <nl_langinfo@plt>

LLVM IR (-O0):
@MON_5 = global i32 0
define i8* @langinfo_mon_5() {
%1 = load i32, i32* @MON_5
%2 = call i8* @nl_langinfo(i32 %1)
ret i8* %2
}

LLVM IR (-O2):
@MON_5 = global i32 0
define i8* @langinfo_mon_5() {
%1 = load i32, i32* @MON_5
%2 = tail call i8* @nl_langinfo(i32 %1)
ret i8* %2
}
/* Variables and functions */
scalar_t__ snprintf(int /*<<< orphan*/ *, int /*<<< orphan*/, char *,
                    char const *, char const *);
int /*<<< orphan*/ sprintf(char *, char *, char const *, char const *);
char *xmalloc(scalar_t__);
char *append_spec_date_format(const char *date_format,
                              const char *spec_format) {
  char *s = xmalloc(snprintf(NULL, 0, "%s%s", date_format, spec_format) + 1);
  sprintf(s, "%s%s", date_format, spec_format);
  return s;
}


x86 assembly (clang, -O0):
<append_spec_date_format>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
mov    -0x10(%rbp),%r8
xor    %eax,%eax
mov    %eax,%edi
xor    %esi,%esi
lea    0xeab(%rip),%rdx
call   1030 <snprintf@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1040 <xmalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
lea    0xe83(%rip),%rsi
call   1050 <sprintf@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<append_spec_date_format>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%r12
lea    0xebb(%rip),%r15
xor    %edi,%edi
xor    %esi,%esi
mov    %r15,%rdx
mov    %r12,%rcx
mov    %r14,%r8
call   1030 <snprintf@plt>
lea    0x1(%rax),%rdi
call   1040 <xmalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r15,%rsi
mov    %r12,%rdx
mov    %r14,%rcx
call   1050 <sprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%s%s\00"
define i8* @append_spec_date_format(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i64 @snprintf(i32* null, i32 0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %6, i8* %7)
%9 = add nsw i64 %8, 1
%10 = call i8* @xmalloc(i64 %9)
store i8* %10, i8** %5
%11 = load i8*, i8** %5
%12 = load i8*, i8** %3
%13 = load i8*, i8** %4
%14 = call i32 @sprintf(i8* %11, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %12, i8* %13)
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
@.str = [5 x i8] c"%s%s\00"
define i8* @append_spec_date_format(i8* %0, i8* %1) {
%3 = tail call i64 @snprintf(i32* null, i32 0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
%4 = add nsw i64 %3, 1
%5 = tail call i8* @xmalloc(i64 %4)
%6 = tail call i32 @sprintf(i8* dereferenceable(1) %5, i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0, i8* %1)
ret i8* %5
}
abs(i) { return i < 0 ? -i : i; }


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jge    111e <abs+0x1e>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <abs+0x24>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = sub nsw i32 0, %6
br label %10
8: ; preds = %1
%9 = load i32, i32* %2
br label %10
10: ; preds = %8, %5
%11 = phi i32 [ %7, %5 ], [ %9, %8 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ emsAnnul(int *const);
void ems_annul_(int *const status) {

  emsAnnul(status);
  return;
}


x86 assembly (clang, -O0):
<ems_annul_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <emsAnnul@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ems_annul_>:
jmp    1030 <emsAnnul@plt>

LLVM IR (-O0):
define void @ems_annul_(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @emsAnnul(i32* %3)
ret void
}

LLVM IR (-O2):
define void @ems_annul_(i32* %0) {
%2 = tail call i32 @emsAnnul(i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cWriteByte(int, int);
void SensorSetMirrorFlip_S5K83A(unsigned char val) {
  VIM_SIF_I2cWriteByte(0xec, 0);
  switch (val) {
  case 0:
    VIM_SIF_I2cWriteByte(0x75, 0x05);
    break;
  case 1:
    VIM_SIF_I2cWriteByte(0x75, 0x06);
    break;
  case 2:
    VIM_SIF_I2cWriteByte(0x75, 0x07);
    break;
  default:
    VIM_SIF_I2cWriteByte(0x75, 0x04);
    break;
  }
}


x86 assembly (clang, -O0):
<SensorSetMirrorFlip_S5K83A>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    $0xec,%edi
xor    %esi,%esi
call   1030 <VIM_SIF_I2cWriteByte@plt>
movzbl -0x1(%rbp),%eax
mov    %eax,-0x8(%rbp)
test   %eax,%eax
je     1160 <SensorSetMirrorFlip_S5K83A+0x50>
jmp    113e <SensorSetMirrorFlip_S5K83A+0x2e>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
je     1174 <SensorSetMirrorFlip_S5K83A+0x64>
jmp    114f <SensorSetMirrorFlip_S5K83A+0x3f>
mov    -0x8(%rbp),%eax
sub    $0x2,%eax
je     1188 <SensorSetMirrorFlip_S5K83A+0x78>
jmp    119c <SensorSetMirrorFlip_S5K83A+0x8c>
mov    $0x75,%edi
mov    $0x5,%esi
call   1030 <VIM_SIF_I2cWriteByte@plt>
jmp    11ab <SensorSetMirrorFlip_S5K83A+0x9b>
mov    $0x75,%edi
mov    $0x6,%esi
call   1030 <VIM_SIF_I2cWriteByte@plt>
jmp    11ab <SensorSetMirrorFlip_S5K83A+0x9b>
mov    $0x75,%edi
mov    $0x7,%esi
call   1030 <VIM_SIF_I2cWriteByte@plt>
jmp    11ab <SensorSetMirrorFlip_S5K83A+0x9b>
mov    $0x75,%edi
mov    $0x4,%esi
call   1030 <VIM_SIF_I2cWriteByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorSetMirrorFlip_S5K83A>:
push   %rbx
mov    %edi,%ebx
mov    $0xec,%edi
xor    %esi,%esi
call   1030 <VIM_SIF_I2cWriteByte@plt>
mov    %ebx,%eax
add    $0x5,%eax
cmp    $0x3,%bl
mov    $0x4,%esi
cmovb  %eax,%esi
mov    $0x75,%edi
pop    %rbx
jmp    1030 <VIM_SIF_I2cWriteByte@plt>

LLVM IR (-O0):
define void @SensorSetMirrorFlip_S5K83A(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = call i32 @VIM_SIF_I2cWriteByte(i32 236, i32 0)
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
switch i32 %5, label %12 [
i32 0, label %6
i32 1, label %8
i32 2, label %10
]
6: ; preds = %1
%7 = call i32 @VIM_SIF_I2cWriteByte(i32 117, i32 5)
br label %14
8: ; preds = %1
%9 = call i32 @VIM_SIF_I2cWriteByte(i32 117, i32 6)
br label %14
10: ; preds = %1
%11 = call i32 @VIM_SIF_I2cWriteByte(i32 117, i32 7)
br label %14
12: ; preds = %1
%13 = call i32 @VIM_SIF_I2cWriteByte(i32 117, i32 4)
br label %14
14: ; preds = %12, %10, %8, %6
ret void
}

LLVM IR (-O2):
define void @SensorSetMirrorFlip_S5K83A(i8 zeroext %0) {
%2 = tail call i32 @VIM_SIF_I2cWriteByte(i32 236, i32 0)
%3 = icmp ult i8 %0, 3
%4 = zext i8 %0 to i32
%5 = add nuw nsw i32 %4, 5
%6 = select i1 %3, i32 %5, i32 4
%7 = tail call i32 @VIM_SIF_I2cWriteByte(i32 117, i32 %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void CheckMemory(void *ptr) {
  if (!ptr) {
    fprintf(stderr, "Out of memory error\n");
    exit(-1);
  }
}


x86 assembly (clang, -O0):
<CheckMemory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1156 <CheckMemory+0x36>
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
lea    0xeb9(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CheckMemory>:
test   %rdi,%rdi
je     1126 <CheckMemory+0x6>
ret
push   %rax
mov    0x2eb2(%rip),%rax
mov    (%rax),%edi
lea    0xec9(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"Out of memory error\0A\00"
define void @CheckMemory(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @exit(i32 -1)
unreachable
9: ; preds = %1
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"Out of memory error\0A\00"
define void @CheckMemory(i8* readnone %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = load i32, i32* @stderr
%5 = tail call i32 @fprintf(i32 %4, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 -1)
unreachable
7: ; preds = %1
ret void
}
/* Type definitions */
typedef unsigned char uint32_t;

/* Variables and functions */
uint32_t read_u32_le(unsigned char *buf) {
  uint32_t n = 0;
  n |= buf[3] << 24;
  n |= buf[2] << 16;
  n |= buf[1] << 8;
  n |= buf[0];
  return n;
}


x86 assembly (clang, -O0):
<read_u32_le>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movb   $0x0,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x3(%rax),%ecx
shl    $0x18,%ecx
movzbl -0x9(%rbp),%eax
or     %ecx,%eax
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x2(%rax),%ecx
shl    $0x10,%ecx
movzbl -0x9(%rbp),%eax
or     %ecx,%eax
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x1(%rax),%ecx
shl    $0x8,%ecx
movzbl -0x9(%rbp),%eax
or     %ecx,%eax
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
movzbl -0x9(%rbp),%eax
or     %ecx,%eax
mov    %al,-0x9(%rbp)
movzbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_u32_le>:
mov    (%rdi),%al
ret

LLVM IR (-O0):
define zeroext i8 @read_u32_le(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
store i8* %0, i8** %2
store i8 0, i8* %3
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 3
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = shl i32 %7, 24
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = or i32 %10, %8
%12 = trunc i32 %11 to i8
store i8 %12, i8* %3
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 2
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 16
%18 = load i8, i8* %3
%19 = zext i8 %18 to i32
%20 = or i32 %19, %17
%21 = trunc i32 %20 to i8
store i8 %21, i8* %3
%22 = load i8*, i8** %2
%23 = getelementptr inbounds i8, i8* %22, i64 1
%24 = load i8, i8* %23
%25 = zext i8 %24 to i32
%26 = shl i32 %25, 8
%27 = load i8, i8* %3
%28 = zext i8 %27 to i32
%29 = or i32 %28, %26
%30 = trunc i32 %29 to i8
store i8 %30, i8* %3
%31 = load i8*, i8** %2
%32 = getelementptr inbounds i8, i8* %31, i64 0
%33 = load i8, i8* %32
%34 = zext i8 %33 to i32
%35 = load i8, i8* %3
%36 = zext i8 %35 to i32
%37 = or i32 %36, %34
%38 = trunc i32 %37 to i8
store i8 %38, i8* %3
%39 = load i8, i8* %3
ret i8 %39
}

LLVM IR (-O2):
define zeroext i8 @read_u32_le(i8* nocapture %0) {
%2 = load i8, i8* %0
ret i8 %2
}
int langops_shutdown(void) { return 0; }


x86 assembly (clang, -O0):
<langops_shutdown>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langops_shutdown>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @langops_shutdown() {
ret i32 0
}

LLVM IR (-O2):
define i32 @langops_shutdown() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char const *, size_t const);
void xstrncpy(char *dest, const char *source, const size_t dest_size) {
  strncpy(dest, source, dest_size);
  if (dest_size > 0) {
    dest[dest_size - 1] = '\0';
  } else {
    dest[0] = '\0';
  }
}


x86 assembly (clang, -O0):
<xstrncpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncpy@plt>
cmpq   $0x0,-0x18(%rbp)
jbe    1155 <xstrncpy+0x45>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
sub    $0x1,%rcx
movb   $0x0,(%rax,%rcx,1)
jmp    115c <xstrncpy+0x4c>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrncpy>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %rdi,%r14
call   1030 <strncpy@plt>
xor    %eax,%eax
sub    $0x1,%rbx
cmovae %rbx,%rax
movb   $0x0,(%r14,%rax,1)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @xstrncpy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @strncpy(i8* %7, i8* %8, i64 %9)
%11 = load i64, i64* %6
%12 = icmp ugt i64 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %3
%14 = load i8*, i8** %4
%15 = load i64, i64* %6
%16 = sub i64 %15, 1
%17 = getelementptr inbounds i8, i8* %14, i64 %16
store i8 0, i8* %17
br label %21
18: ; preds = %3
%19 = load i8*, i8** %4
%20 = getelementptr inbounds i8, i8* %19, i64 0
store i8 0, i8* %20
br label %21
21: ; preds = %18, %13
ret void
}

LLVM IR (-O2):
define void @xstrncpy(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @strncpy(i8* %0, i8* %1, i64 %2)
%5 = icmp eq i64 %2, 0
%6 = add i64 %2, -1
%7 = select i1 %5, i64 0, i64 %6
%8 = getelementptr i8, i8* %0, i64 %7
store i8 0, i8* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
scalar_t__ errno;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char const *);
int /*<<< orphan*/ printf(char *, char const *);
void die(const char *message) {
  if (errno)
    perror(message);
  else {
    printf("ERROR: %s\n", message);
    exit(EXIT_FAILURE);
  }
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
cmpq   $0x0,(%rax)
je     115b <die+0x2b>
mov    -0x8(%rbp),%rdi
call   1040 <perror@plt>
jmp    1179 <die+0x49>
mov    -0x8(%rbp),%rsi
lea    0xe9a(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e66(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<die>:
push   %rax
mov    %rdi,%rsi
mov    0x2ea5(%rip),%rax
cmpq   $0x0,(%rax)
je     114a <die+0x1a>
mov    %rsi,%rdi
pop    %rax
jmp    1040 <perror@plt>
lea    0xeaf(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e7b(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@errno = global i64 0
@.str = [11 x i8] c"ERROR: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @die(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i64, i64* @errno
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @perror(i8* %6)
br label %13
8: ; preds = %1
%9 = load i8*, i8** %2
%10 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = load i32, i32* @EXIT_FAILURE
%12 = call i32 @exit(i32 %11)
unreachable
13: ; preds = %5
ret void
}

LLVM IR (-O2):
@errno = global i64 0
@.str = [11 x i8] c"ERROR: %s\0A\00"
@EXIT_FAILURE = global i32 0
define void @die(i8* %0) {
%2 = load i64, i64* @errno
%3 = icmp eq i64 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @perror(i8* %0)
ret void
6: ; preds = %1
%7 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %0)
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
}
/* Type definitions */
struct __sk_buff {
  int dummy;
};

/* Variables and functions */
int rss_l3_l4(struct __sk_buff *);
int l3_l4_hash(struct __sk_buff *skb) { return rss_l3_l4(skb); }


x86 assembly (clang, -O0):
<l3_l4_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rss_l3_l4@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<l3_l4_hash>:
jmp    1030 <rss_l3_l4@plt>

LLVM IR (-O0):
%struct.__sk_buff = type { i32 }
define i32 @l3_l4_hash(%struct.__sk_buff* %0) {
%2 = alloca %struct.__sk_buff*
store %struct.__sk_buff* %0, %struct.__sk_buff** %2
%3 = load %struct.__sk_buff*, %struct.__sk_buff** %2
%4 = call i32 @rss_l3_l4(%struct.__sk_buff* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.__sk_buff = type { i32 }
define i32 @l3_l4_hash(%struct.__sk_buff* %0) {
%2 = tail call i32 @rss_l3_l4(%struct.__sk_buff* %0)
ret i32 %2
}
double gettime(void) {}


x86 assembly (clang, -O0):
<gettime>:
push   %rbp
mov    %rsp,%rbp
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettime>:
ret

LLVM IR (-O0):
define double @gettime() {
%1 = alloca double
%2 = load double, double* %1
ret double %2
}

LLVM IR (-O2):
define double @gettime() {
ret double undef
}
/* Variables and functions */
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
int main() { fputs("Hello, World!\n", stdout); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <fputs@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%esi
lea    0xedf(%rip),%rdi
call   1030 <fputs@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Hello, World!\0A\00"
@stdout = global i32 0
define i32 @main() {
%1 = load i32, i32* @stdout
%2 = call i32 @fputs(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"Hello, World!\0A\00"
@stdout = global i32 0
define i32 @main() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fputs(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int fun329() { return 329; }


x86 assembly (clang, -O0):
<fun329>:
push   %rbp
mov    %rsp,%rbp
mov    $0x149,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun329>:
mov    $0x149,%eax
ret

LLVM IR (-O0):
define i32 @fun329() {
ret i32 329
}

LLVM IR (-O2):
define i32 @fun329() {
ret i32 329
}
/* Variables and functions */
scalar_t__ can_add_ulong_within(unsigned long const, unsigned long const,
                                unsigned long const);
unsigned long ulong_add_capped(const unsigned long x, const unsigned long y,
                               const unsigned long cap) {
  return can_add_ulong_within(x, y, cap) ? x + y : cap;
}


x86 assembly (clang, -O0):
<ulong_add_capped>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <can_add_ulong_within@plt>
cmp    $0x0,%rax
je     1150 <ulong_add_capped+0x40>
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1158 <ulong_add_capped+0x48>
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ulong_add_capped>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rdi,%r15
call   1030 <can_add_ulong_within@plt>
add    %r15,%rbx
test   %rax,%rax
cmove  %r14,%rbx
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @ulong_add_capped(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = load i64, i64* %6
%10 = call i64 @can_add_ulong_within(i64 %7, i64 %8, i64 %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %3
%13 = load i64, i64* %4
%14 = load i64, i64* %5
%15 = add i64 %13, %14
br label %18
16: ; preds = %3
%17 = load i64, i64* %6
br label %18
18: ; preds = %16, %12
%19 = phi i64 [ %15, %12 ], [ %17, %16 ]
ret i64 %19
}

LLVM IR (-O2):
define i64 @ulong_add_capped(i64 %0, i64 %1, i64 %2) {
%4 = tail call i64 @can_add_ulong_within(i64 %0, i64 %1, i64 %2)
%5 = icmp eq i64 %4, 0
%6 = add i64 %1, %0
%7 = select i1 %5, i64 %2, i64 %6
ret i64 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;
typedef int /*<<< orphan*/ GLenum;

/* Variables and functions */
int /*<<< orphan*/ glTexGeniv(int /*<<< orphan*/, int /*<<< orphan*/,
                              int /*<<< orphan*/ *);
void TexGeniv(GLenum coord, GLenum pname, GLint *params) {
  glTexGeniv(coord, pname, params);
}


x86 assembly (clang, -O0):
<TexGeniv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1030 <glTexGeniv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TexGeniv>:
jmp    1030 <glTexGeniv@plt>

LLVM IR (-O0):
define void @TexGeniv(i32 %0, i32 %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32*, i32** %6
%10 = call i32 @glTexGeniv(i32 %7, i32 %8, i32* %9)
ret void
}

LLVM IR (-O2):
define void @TexGeniv(i32 %0, i32 %1, i32* %2) {
%4 = tail call i32 @glTexGeniv(i32 %0, i32 %1, i32* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
int main() {
  free((void *)0x10000);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x10000,%edi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x10000,%edi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @free(i8* inttoptr (i64 65536 to i8*))
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @free(i8* inttoptr (i64 65536 to i8*))
ret i32 0
}
/* Variables and functions */
double sqrt(double const);
double glmComputeVectorLength3d(const double v[3]) {
  return sqrt(v[0] * v[0] + v[1] * v[1] + v[2] * v[2]);
}


x86 assembly (clang, -O0):
<glmComputeVectorLength3d>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm2
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x8(%rbp),%rax
mulsd  0x8(%rax),%xmm0
mulsd  %xmm2,%xmm1
addsd  %xmm0,%xmm1
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
movsd  0x10(%rax),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmComputeVectorLength3d>:
movsd  (%rdi),%xmm1
movsd  0x8(%rdi),%xmm0
mulsd  %xmm0,%xmm0
mulsd  %xmm1,%xmm1
addsd  %xmm0,%xmm1
movsd  0x10(%rdi),%xmm0
mulsd  %xmm0,%xmm0
addsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     1141 <glmComputeVectorLength3d+0x31>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @glmComputeVectorLength3d(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = getelementptr inbounds double, double* %3, i64 0
%5 = load double, double* %4
%6 = load double*, double** %2
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = load double*, double** %2
%10 = getelementptr inbounds double, double* %9, i64 1
%11 = load double, double* %10
%12 = load double*, double** %2
%13 = getelementptr inbounds double, double* %12, i64 1
%14 = load double, double* %13
%15 = fmul double %11, %14
%16 = call double @llvm.fmuladd.f64(double %5, double %8, double %15)
%17 = load double*, double** %2
%18 = getelementptr inbounds double, double* %17, i64 2
%19 = load double, double* %18
%20 = load double*, double** %2
%21 = getelementptr inbounds double, double* %20, i64 2
%22 = load double, double* %21
%23 = call double @llvm.fmuladd.f64(double %19, double %22, double %16)
%24 = call double @sqrt(double %23)
ret double %24
}

LLVM IR (-O2):
define double @glmComputeVectorLength3d(double* nocapture %0) {
%2 = load double, double* %0
%3 = getelementptr inbounds double, double* %0, i64 1
%4 = load double, double* %3
%5 = fmul double %4, %4
%6 = tail call double @llvm.fmuladd.f64(double %2, double %2, double %5)
%7 = getelementptr inbounds double, double* %0, i64 2
%8 = load double, double* %7
%9 = tail call double @llvm.fmuladd.f64(double %8, double %8, double %6)
%10 = tail call double @sqrt(double %9)
ret double %10
}
/* Variables and functions */
int createBitmaskFromString(char *, int);
int isPangramBitmask(int bitmaskAlphabet, char *string, int len) {
  return createBitmaskFromString(string, len) == bitmaskAlphabet ? 1 : 0;
}


x86 assembly (clang, -O0):
<isPangramBitmask>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1030 <createBitmaskFromString@plt>
mov    %eax,%edx
mov    -0x4(%rbp),%esi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmove  %ecx,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPangramBitmask>:
push   %rbx
mov    %edi,%ebx
mov    %rsi,%rdi
mov    %edx,%esi
call   1030 <createBitmaskFromString@plt>
xor    %ecx,%ecx
cmp    %ebx,%eax
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isPangramBitmask(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %5
%8 = load i32, i32* %6
%9 = call i32 @createBitmaskFromString(i8* %7, i32 %8)
%10 = load i32, i32* %4
%11 = icmp eq i32 %9, %10
%12 = zext i1 %11 to i64
%13 = select i1 %11, i32 1, i32 0
ret i32 %13
}

LLVM IR (-O2):
define i32 @isPangramBitmask(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @createBitmaskFromString(i8* %1, i32 %2)
%5 = icmp eq i32 %4, %0
%6 = zext i1 %5 to i32
ret i32 %6
}
int sys$setast(char enbflg) {
  return ({
    unsigned long resultvar;
    register long int _a1 asm("rdi") = (long)(((unsigned long)enbflg));
    asm volatile("movq %1, %%rax\n\t"
                 "int $0x81\n\t"
                 : "=a"(resultvar)
                 : "i"(41), "r"(_a1)
                 : "memory", "cc", "r11", "cx");
    (long)resultvar;
  });
}


x86 assembly (clang, -O0):
<sys$setast>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbq -0x1(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    $0x29,%rax
int    $0x81
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys$setast>:
movslq %edi,%rdi
mov    $0x29,%rax
int    $0x81
ret

LLVM IR (-O0):
define i32 @"sys$setast"(i8 signext %0) {
%2 = alloca i8
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i8 %0, i8* %2
%6 = load i8, i8* %2
%7 = sext i8 %6 to i64
store i64 %7, i64* %4
%8 = load i64, i64* %4
%9 = call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x81\0A\09", "={ax},i,{rdi},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 41, i64 %8)
store i64 %9, i64* %3
%10 = load i64, i64* %3
store i64 %10, i64* %5
%11 = load i64, i64* %5
%12 = trunc i64 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @"sys$setast"(i8 signext %0) {
%2 = sext i8 %0 to i64
%3 = tail call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x81\0A\09", "={ax},i,{rdi},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 41, i64 %2)
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
int print_err(char *msg) {
  printf("%s\n\n", msg);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<print_err>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<print_err>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%s\0A\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @print_err(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@.str = [5 x i8] c"%s\0A\0A\00"
@EXIT_FAILURE = global i32 0
define i32 @print_err(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}