xunge/DecIR huggingface dataset:
/* Variables and functions */
double log(double);
int intlog2(int number) {
  double ln2 = 0.69314718056;
  return (int)(log((double)number + 0.5) / ln2);
}


x86 assembly (clang, -O0):
<intlog2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movsd  0xee5(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
movsd  0xecb(%rip),%xmm1
addsd  %xmm1,%xmm0
call   1030 <log@plt>
divsd  -0x10(%rbp),%xmm0
cvttsd2si %xmm0,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intlog2>:
push   %rax
cvtsi2sd %edi,%xmm0
addsd  0xee3(%rip),%xmm0
call   1030 <log@plt>
divsd  0xede(%rip),%xmm0
cvttsd2si %xmm0,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @intlog2(i32 %0) {
%2 = alloca i32
%3 = alloca double
store i32 %0, i32* %2
store double 0x3FE62E42FEFA3BDC, double* %3
%4 = load i32, i32* %2
%5 = sitofp i32 %4 to double
%6 = fadd double %5, 5.000000e-01
%7 = call double @log(double %6)
%8 = load double, double* %3
%9 = fdiv double %7, %8
%10 = fptosi double %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @intlog2(i32 %0) {
%2 = sitofp i32 %0 to double
%3 = fadd double %2, 5.000000e-01
%4 = tail call double @log(double %3)
%5 = fdiv double %4, 0x3FE62E42FEFA3BDC
%6 = fptosi double %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
void client_disconnect_cb(int fd, short events) {
  (void)events;
  fprintf(stderr, "server::disconnected to %d\n", fd);
}


x86 assembly (clang, -O0):
<client_disconnect_cb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %si,%ax
mov    %edi,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
mov    0x2eb7(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
lea    0xecb(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<client_disconnect_cb>:
mov    %edi,%edx
mov    0x2ec7(%rip),%rax
mov    (%rax),%edi
lea    0xede(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [28 x i8] c"server::disconnected to %d\0A\00"
define void @client_disconnect_cb(i32 %0, i16 signext %1) {
%3 = alloca i32
%4 = alloca i16
store i32 %0, i32* %3
store i16 %1, i16* %4
%5 = load i16, i16* %4
%6 = load i32, i32* @stderr
%7 = load i32, i32* %3
%8 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [28 x i8] c"server::disconnected to %d\0A\00"
define void @client_disconnect_cb(i32 %0, i16 signext %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
int nearbyint(int);
int colour8(double x) {
  int i;
  i = nearbyint(255 * x);
  i = (((i) > (0)) ? (i) : (0));
  i = (((i) > (255)) ? (255) : (i));
  return i;
}


x86 assembly (clang, -O0):
<colour8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <nearbyint@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    114b <colour8+0x3b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1155 <colour8+0x45>
xor    %eax,%eax
mov    %eax,-0x10(%rbp)
jmp    1155 <colour8+0x45>
mov    -0x10(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0xff,-0xc(%rbp)
jle    1175 <colour8+0x65>
mov    $0xff,%eax
mov    %eax,-0x14(%rbp)
jmp    117b <colour8+0x6b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<colour8>:
push   %rax
mulsd  0xee7(%rip),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <nearbyint@plt>
xor    %ecx,%ecx
test   %eax,%eax
cmovs  %ecx,%eax
cmp    $0xff,%eax
mov    $0xff,%ecx
cmovae %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @colour8(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double 2.550000e+02, %4
%6 = fptosi double %5 to i32
%7 = call i32 @nearbyint(i32 %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %1
%11 = load i32, i32* %3
br label %13
12: ; preds = %1
br label %13
13: ; preds = %12, %10
%14 = phi i32 [ %11, %10 ], [ 0, %12 ]
store i32 %14, i32* %3
%15 = load i32, i32* %3
%16 = icmp sgt i32 %15, 255
br i1 %16, label %17, label %18
17: ; preds = %13
br label %20
18: ; preds = %13
%19 = load i32, i32* %3
br label %20
20: ; preds = %18, %17
%21 = phi i32 [ 255, %17 ], [ %19, %18 ]
store i32 %21, i32* %3
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @colour8(double %0) {
%2 = fmul double %0, 2.550000e+02
%3 = fptosi double %2 to i32
%4 = tail call i32 @nearbyint(i32 %3)
%5 = icmp sgt i32 %4, 0
%6 = select i1 %5, i32 %4, i32 0
%7 = icmp ult i32 %6, 255
%8 = select i1 %7, i32 %6, i32 255
ret i32 %8
}
long build_date_adr(void) {
  extern char build_date[];
  return (long)build_date;
}


x86 assembly (clang, -O0):
<build_date_adr>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eed(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<build_date_adr>:
mov    0x2ef1(%rip),%rax
ret

LLVM IR (-O0):
@build_date = external global [0 x i8]
define i64 @build_date_adr() {
ret i64 ptrtoint ([0 x i8]* @build_date to i64)
}

LLVM IR (-O2):
@build_date = external global [0 x i8]
define i64 @build_date_adr() {
ret i64 ptrtoint ([0 x i8]* @build_date to i64)
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fwrite(char const *, int, size_t, int /*<<< orphan*/ *);
void FWRITEBYTES(const char *buf, size_t bufBytes, FILE *pf) {
  fwrite(buf, sizeof(char), bufBytes, pf);
}


x86 assembly (clang, -O0):
<FWRITEBYTES>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    $0x1,%esi
call   1030 <fwrite@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FWRITEBYTES>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    $0x1,%esi
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
define void @FWRITEBYTES(i8* %0, i64 %1, i32* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i32*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i32* %2, i32** %6
%7 = load i8*, i8** %4
%8 = load i64, i64* %5
%9 = load i32*, i32** %6
%10 = call i32 @fwrite(i8* %7, i32 1, i64 %8, i32* %9)
ret void
}

LLVM IR (-O2):
define void @FWRITEBYTES(i8* nocapture %0, i64 %1, i32* nocapture %2) {
%4 = tail call i32 @fwrite(i8* %0, i32 1, i64 %1, i32* %2)
ret void
}
fatal(msg, arg1, arg2) char *msg, *arg1, *arg2;
{
  error(msg, arg1, arg2);
  delete_temp_files(0);
  exit(1);
}


x86 assembly (clang, -O0):
<fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    $0x0,%al
call   1040 <error@plt>
xor    %edi,%edi
mov    $0x0,%al
call   1030 <delete_temp_files@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<fatal>:
push   %rax
xor    %eax,%eax
call   1040 <error@plt>
xor    %edi,%edi
xor    %eax,%eax
call   1030 <delete_temp_files@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define i32 @fatal(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i8*, i8** %6
%10 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @error to i32 (i8*, i8*, i8*, ...)*)(i8* %7, i8* %8, i8* %9)
%11 = call i32 (i32, ...) bitcast (i32 (...)* @delete_temp_files to i32 (i32, ...)*)(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @fatal(i8* %0, i8* %1, i8* %2) {
%4 = tail call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @error to i32 (i8*, i8*, i8*, ...)*)(i8* %0, i8* %1, i8* %2)
%5 = tail call i32 (i32, ...) bitcast (i32 (...)* @delete_temp_files to i32 (i32, ...)*)(i32 0)
tail call void @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ p18_adc_2();
int /*<<< orphan*/ p18_eeprom();
int /*<<< orphan*/ p18_int_pin();
int /*<<< orphan*/ p18_int_portb();
int /*<<< orphan*/ p18_mssp();
int /*<<< orphan*/ p18_tmr0();
int /*<<< orphan*/ p18_tmr1();
int /*<<< orphan*/ p18_tmr2();
int /*<<< orphan*/ p18_tmr3();
int /*<<< orphan*/ p18_wdt();
int /*<<< orphan*/ serial(int /*<<< orphan*/);
void PIC18F452_periferic(void) {
  p18_mssp();
  p18_adc_2();
  p18_int_pin();
  p18_int_portb();
  p18_tmr0();
  p18_wdt();
  p18_eeprom();
  p18_tmr1();
  p18_tmr2();
  p18_tmr3();
  serial(0);
  ;
}


x86 assembly (clang, -O0):
<PIC18F452_periferic>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   10c0 <p18_mssp@plt>
mov    $0x0,%al
call   1060 <p18_adc_2@plt>
mov    $0x0,%al
call   1070 <p18_int_pin@plt>
mov    $0x0,%al
call   1080 <p18_int_portb@plt>
mov    $0x0,%al
call   1040 <p18_tmr0@plt>
mov    $0x0,%al
call   1090 <p18_wdt@plt>
mov    $0x0,%al
call   10d0 <p18_eeprom@plt>
mov    $0x0,%al
call   10a0 <p18_tmr1@plt>
mov    $0x0,%al
call   1030 <p18_tmr2@plt>
mov    $0x0,%al
call   10b0 <p18_tmr3@plt>
xor    %edi,%edi
call   1050 <serial@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIC18F452_periferic>:
push   %rax
xor    %eax,%eax
call   10c0 <p18_mssp@plt>
xor    %eax,%eax
call   1060 <p18_adc_2@plt>
xor    %eax,%eax
call   1070 <p18_int_pin@plt>
xor    %eax,%eax
call   1080 <p18_int_portb@plt>
xor    %eax,%eax
call   1040 <p18_tmr0@plt>
xor    %eax,%eax
call   1090 <p18_wdt@plt>
xor    %eax,%eax
call   10d0 <p18_eeprom@plt>
xor    %eax,%eax
call   10a0 <p18_tmr1@plt>
xor    %eax,%eax
call   1030 <p18_tmr2@plt>
xor    %eax,%eax
call   10b0 <p18_tmr3@plt>
xor    %edi,%edi
pop    %rax
jmp    1050 <serial@plt>

LLVM IR (-O0):
define void @PIC18F452_periferic() {
%1 = call i32 (...) @p18_mssp()
%2 = call i32 (...) @p18_adc_2()
%3 = call i32 (...) @p18_int_pin()
%4 = call i32 (...) @p18_int_portb()
%5 = call i32 (...) @p18_tmr0()
%6 = call i32 (...) @p18_wdt()
%7 = call i32 (...) @p18_eeprom()
%8 = call i32 (...) @p18_tmr1()
%9 = call i32 (...) @p18_tmr2()
%10 = call i32 (...) @p18_tmr3()
%11 = call i32 @serial(i32 0)
ret void
}

LLVM IR (-O2):
define void @PIC18F452_periferic() {
%1 = tail call i32 (...) @p18_mssp()
%2 = tail call i32 (...) @p18_adc_2()
%3 = tail call i32 (...) @p18_int_pin()
%4 = tail call i32 (...) @p18_int_portb()
%5 = tail call i32 (...) @p18_tmr0()
%6 = tail call i32 (...) @p18_wdt()
%7 = tail call i32 (...) @p18_eeprom()
%8 = tail call i32 (...) @p18_tmr1()
%9 = tail call i32 (...) @p18_tmr2()
%10 = tail call i32 (...) @p18_tmr3()
%11 = tail call i32 @serial(i32 0)
ret void
}
void xfs_buf_dquot_iodone(struct xfs_buf *bp) {}


x86 assembly (clang, -O0):
<xfs_buf_dquot_iodone>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfs_buf_dquot_iodone>:
ret

LLVM IR (-O0):
%struct.xfs_buf = type opaque
define void @xfs_buf_dquot_iodone(%struct.xfs_buf* %0) {
%2 = alloca %struct.xfs_buf*
store %struct.xfs_buf* %0, %struct.xfs_buf** %2
ret void
}

LLVM IR (-O2):
%struct.xfs_buf = type opaque
define void @xfs_buf_dquot_iodone(%struct.xfs_buf* nocapture %0) {
ret void
}
int d_blt_mr2(double *a1, double a2) { return !(__builtin_isless(*a1, a2)); }


x86 assembly (clang, -O0):
<d_blt_mr2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_blt_mr2>:
xor    %eax,%eax
ucomisd (%rdi),%xmm0
setbe  %al
ret

LLVM IR (-O0):
define i32 @d_blt_mr2(double* %0, double %1) {
%3 = alloca double*
%4 = alloca double
store double* %0, double** %3
store double %1, double* %4
%5 = load double*, double** %3
%6 = load double, double* %5
%7 = load double, double* %4
%8 = fcmp olt double %6, %7
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @d_blt_mr2(double* nocapture %0, double %1) {
%3 = load double, double* %0
%4 = fcmp uge double %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0x40() {
  Assert_real((isupper(64) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              325, ("isupper should be 0 for @"));
}


x86 assembly (clang, -O0):
<t_isupper_0x40>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x145,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x40>:
push   %rax
mov    $0x40,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x145,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 0 for @\00"
define void @t_isupper_0x40() {
%1 = call i64 @isupper(i32 64)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 325, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 0 for @\00"
define void @t_isupper_0x40() {
%1 = tail call i64 @isupper(i32 64)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 325, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ EINVAL;
int /*<<< orphan*/ errno;
int kill(pid_t pid, int sig) {
  errno = EINVAL;
  return -1;
}


x86 assembly (clang, -O0):
<kill>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    0x2ec7(%rip),%rax
mov    (%rax),%ecx
mov    0x2ec6(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kill>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%eax
mov    0x2ed0(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
@errno = global i32 0
define i32 @kill(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* @EINVAL
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@EINVAL = global i32 0
@errno = global i32 0
define i32 @kill(i32 %0, i32 %1) {
%3 = load i32, i32* @EINVAL
store i32 %3, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int main(int argc, char **argv) {
  int a;
#pragma omp target data
  {}
L1:
  foo();
#pragma omp target data map(a) allocate(a)
  {
    foo();
    goto L1;
  }
  goto L2;
#pragma omp target data map(a)
L2:
  foo();
#pragma omp target data map(a)(i)
  { foo(); }
#pragma omp target unknown
  { foo(); }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
mov    $0x0,%al
call   1030 <foo@plt>
jmp    1126 <main+0x16>

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
call   1030 <foo@plt>
jmp    1120 <main+0x10>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
br label %7
7: ; preds = %7, %2
%8 = call i32 (...) @foo()
%9 = call i32 (...) @foo()
br label %7
10: ; No predecessors!
%11 = call i32 (...) @foo()
%12 = call i32 (...) @foo()
%13 = call i32 (...) @foo()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %3, %2
%4 = tail call i32 (...) @foo()
%5 = tail call i32 (...) @foo()
br label %3
}
char *showoff(x)
int x;
{ return (x ? "on" : "off"); }


x86 assembly (clang, -O0):
<showoff>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
lea    0xef2(%rip),%rax
lea    0xee8(%rip),%rcx
cmp    $0x0,%edx
cmovne %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<showoff>:
test   %edi,%edi
lea    0xefa(%rip),%rcx
lea    0xef0(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"on\00"
@.str.1 = [4 x i8] c"off\00"
define i8* @showoff(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0)
ret i8* %6
}

LLVM IR (-O2):
@.str = [3 x i8] c"on\00"
@.str.1 = [4 x i8] c"off\00"
define i8* @showoff(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0)
ret i8* %3
}
int Average(int i) {
  static int sum = 0, count = 0;
  sum = sum + i;
  count++;
  return sum / count;
}


x86 assembly (clang, -O0):
<Average>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0x2f17(%rip),%eax
add    -0x4(%rbp),%eax
mov    %eax,0x2f0e(%rip)
mov    0x2f0c(%rip),%eax
add    $0x1,%eax
mov    %eax,0x2f03(%rip)
mov    0x2ef9(%rip),%eax
cltd
idivl  0x2ef6(%rip)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Average>:
mov    %edi,%eax
add    0x2f1c(%rip),%eax
mov    %eax,0x2f16(%rip)
mov    0x2f14(%rip),%ecx
add    $0x1,%ecx
mov    %ecx,0x2f0b(%rip)
cltd
idiv   %ecx
ret

LLVM IR (-O0):
@Average.sum = internal global i32 0
@Average.count = internal global i32 0
define i32 @Average(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @Average.sum
%4 = load i32, i32* %2
%5 = add nsw i32 %3, %4
store i32 %5, i32* @Average.sum
%6 = load i32, i32* @Average.count
%7 = add nsw i32 %6, 1
store i32 %7, i32* @Average.count
%8 = load i32, i32* @Average.sum
%9 = load i32, i32* @Average.count
%10 = sdiv i32 %8, %9
ret i32 %10
}

LLVM IR (-O2):
@Average.sum = internal unnamed_addr global i32 0
@Average.count = internal unnamed_addr global i32 0
define i32 @Average(i32 %0) {
%2 = load i32, i32* @Average.sum
%3 = add nsw i32 %2, %0
store i32 %3, i32* @Average.sum
%4 = load i32, i32* @Average.count
%5 = add nsw i32 %4, 1
store i32 %5, i32* @Average.count
%6 = sdiv i32 %3, %5
ret i32 %6
}
unsigned back_width(void) { return 640; }


x86 assembly (clang, -O0):
<back_width>:
push   %rbp
mov    %rsp,%rbp
mov    $0x280,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<back_width>:
mov    $0x280,%eax
ret

LLVM IR (-O0):
define i32 @back_width() {
ret i32 640
}

LLVM IR (-O2):
define i32 @back_width() {
ret i32 640
}
/* Type definitions */
typedef scalar_t__ __v2si;
typedef scalar_t__ __m64;

/* Variables and functions */
__m64 __attribute__((__always___, __nodebug__))
_mm_add_pi32(__m64 __m1, __m64 __m2) {
  return (__m64)((__v2si)__m1 + (__v2si)__m2);
}


x86 assembly (clang, -O0):
<_mm_add_pi32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_add_pi32>:
lea    (%rdi,%rsi,1),%rax
ret

LLVM IR (-O0):
define i64 @_mm_add_pi32(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add nsw i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @_mm_add_pi32(i64 %0, i64 %1) {
%3 = add nsw i64 %1, %0
ret i64 %3
}
long long exponent(int base, int power) {
  long long result = 1, value = base;
  while (power) {
    if (power & 1)
      result *= value;
    value *= value;
    power >>= 1;
  }
  return result;
}


x86 assembly (clang, -O0):
<exponent>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
movslq -0x4(%rbp),%rax
mov    %rax,-0x18(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     115b <exponent+0x5b>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1140 <exponent+0x40>
mov    -0x18(%rbp),%rax
imul   -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x18(%rbp),%rax
imul   -0x18(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111a <exponent+0x1a>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<exponent>:
test   %esi,%esi
je     113d <exponent+0x3d>
movslq %edi,%rdx
mov    $0x1,%r8d
mov    $0x1,%eax
mov    %esi,%edi
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
test   $0x1,%sil
mov    %rdx,%rcx
cmove  %r8,%rcx
imul   %rcx,%rax
imul   %rdx,%rdx
sar    %edi
cmp    $0x1,%esi
mov    %edi,%esi
ja     1120 <exponent+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @exponent(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
store i32 %0, i32* %3
store i32 %1, i32* %4
store i64 1, i64* %5
%7 = load i32, i32* %3
%8 = sext i32 %7 to i64
store i64 %8, i64* %6
br label %9
9: ; preds = %20, %2
%10 = load i32, i32* %4
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %26
12: ; preds = %9
%13 = load i32, i32* %4
%14 = and i32 %13, 1
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load i64, i64* %6
%18 = load i64, i64* %5
%19 = mul nsw i64 %18, %17
store i64 %19, i64* %5
br label %20
20: ; preds = %16, %12
%21 = load i64, i64* %6
%22 = load i64, i64* %6
%23 = mul nsw i64 %22, %21
store i64 %23, i64* %6
%24 = load i32, i32* %4
%25 = ashr i32 %24, 1
store i32 %25, i32* %4
br label %9
26: ; preds = %9
%27 = load i64, i64* %5
ret i64 %27
}

LLVM IR (-O2):
define i64 @exponent(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %17, label %4
4: ; preds = %2
%5 = sext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %14, %6 ], [ %5, %4 ]
%8 = phi i64 [ %13, %6 ], [ 1, %4 ]
%9 = phi i32 [ %15, %6 ], [ %1, %4 ]
%10 = and i32 %9, 1
%11 = icmp eq i32 %10, 0
%12 = select i1 %11, i64 1, i64 %7
%13 = mul nsw i64 %12, %8
%14 = mul nsw i64 %7, %7
%15 = ashr i32 %9, 1
%16 = icmp ult i32 %9, 2
br i1 %16, label %17, label %6
17: ; preds = %6, %2
%18 = phi i64 [ 1, %2 ], [ %13, %6 ]
ret i64 %18
}
/* Variables and functions */
int fasttime_init_context(int /*<<< orphan*/ *, int);
int fasttime_init() { return fasttime_init_context(NULL, (1 | 2 | 4)); }


x86 assembly (clang, -O0):
<fasttime_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edi
mov    $0x7,%esi
call   1030 <fasttime_init_context@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fasttime_init>:
xor    %edi,%edi
mov    $0x7,%esi
jmp    1030 <fasttime_init_context@plt>

LLVM IR (-O0):
define i32 @fasttime_init() {
%1 = call i32 @fasttime_init_context(i32* null, i32 7)
ret i32 %1
}

LLVM IR (-O2):
define i32 @fasttime_init() {
%1 = tail call i32 @fasttime_init_context(i32* null, i32 7)
ret i32 %1
}
unsigned long long ffi_test_38(unsigned long long x, unsigned long long y) {
  return x * y;
}


x86 assembly (clang, -O0):
<ffi_test_38>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
imul   -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffi_test_38>:
mov    %rdi,%rax
imul   %rsi,%rax
ret

LLVM IR (-O0):
define i64 @ffi_test_38(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = mul i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @ffi_test_38(i64 %0, i64 %1) {
%3 = mul i64 %1, %0
ret i64 %3
}
void visitorroot(const char *text, int len) {}


x86 assembly (clang, -O0):
<visitorroot>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<visitorroot>:
ret

LLVM IR (-O0):
define void @visitorroot(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @visitorroot(i8* nocapture %0, i32 %1) {
ret void
}
int C_Utils_compare_sbyte_ptr(const signed char *item1,
                              const signed char *item2) {
  signed char i1 = *item1;
  signed char i2 = *item2;
  if (i1 == i2)
    return 0;
  return i1 < i2 ? -1 : 1;
}


x86 assembly (clang, -O0):
<C_Utils_compare_sbyte_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x19(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%al
mov    %al,-0x1a(%rbp)
movsbl -0x19(%rbp),%eax
movsbl -0x1a(%rbp),%ecx
cmp    %ecx,%eax
jne    113a <C_Utils_compare_sbyte_ptr+0x3a>
movl   $0x0,-0x4(%rbp)
jmp    1154 <C_Utils_compare_sbyte_ptr+0x54>
movsbl -0x19(%rbp),%edx
movsbl -0x1a(%rbp),%esi
mov    $0x1,%eax
mov    $0xffffffff,%ecx
cmp    %esi,%edx
cmovl  %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<C_Utils_compare_sbyte_ptr>:
mov    (%rdi),%al
xor    %ecx,%ecx
xor    %edx,%edx
cmp    (%rsi),%al
setge  %dl
lea    -0x1(%rdx,%rdx,1),%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @C_Utils_compare_sbyte_ptr(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8
%7 = alloca i8
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
store i8 %9, i8* %6
%10 = load i8*, i8** %5
%11 = load i8, i8* %10
store i8 %11, i8* %7
%12 = load i8, i8* %6
%13 = sext i8 %12 to i32
%14 = load i8, i8* %7
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 0, i32* %3
br label %26
18: ; preds = %2
%19 = load i8, i8* %6
%20 = sext i8 %19 to i32
%21 = load i8, i8* %7
%22 = sext i8 %21 to i32
%23 = icmp slt i32 %20, %22
%24 = zext i1 %23 to i64
%25 = select i1 %23, i32 -1, i32 1
store i32 %25, i32* %3
br label %26
26: ; preds = %18, %17
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @C_Utils_compare_sbyte_ptr(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp eq i8 %3, %4
%6 = icmp slt i8 %3, %4
%7 = select i1 %6, i32 -1, i32 1
%8 = select i1 %5, i32 0, i32 %7
ret i32 %8
}
short int cast_long_short(long int x) { return (short int)x; }


x86 assembly (clang, -O0):
<cast_long_short>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_long_short>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define signext i16 @cast_long_short(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i16
ret i16 %4
}

LLVM IR (-O2):
define signext i16 @cast_long_short(i64 %0) {
%2 = trunc i64 %0 to i16
ret i16 %2
}
/* Variables and functions */
int lower(char);
int /*<<< orphan*/ printf(char *, int);
int main() { printf("%c\n", lower('A')); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x41,%edi
call   1040 <lower@plt>
mov    %eax,%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x41,%edi
call   1040 <lower@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%c\0A\00"
define i32 @main() {
%1 = call i32 @lower(i8 signext 65)
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%c\0A\00"
define i32 @main() {
%1 = tail call i32 @lower(i8 signext 65)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int test(int x, int y, int z) { return x + y + x; }


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
lea    (%rsi,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %4
%11 = add nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %0, 1
%5 = add i32 %4, %1
ret i32 %5
}
long int strtol(nptr, endptr, base) const char *nptr;
char **endptr;
int base;
{ return __strtol_internal(nptr, endptr, base, 0); }


x86 assembly (clang, -O0):
<strtol>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
xor    %ecx,%ecx
mov    $0x0,%al
call   1030 <__strtol_internal@plt>
cltq
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtol>:
push   %rax
xor    %ecx,%ecx
xor    %eax,%eax
call   1030 <__strtol_internal@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @strtol(i8* %0, i8** %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8**
%6 = alloca i32
store i8* %0, i8** %4
store i8** %1, i8*** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8**, i8*** %5
%9 = load i32, i32* %6
%10 = call i32 (i8*, i8**, i32, i32, ...) bitcast (i32 (...)* @__strtol_internal to i32 (i8*, i8**, i32, i32, ...)*)(i8* %7, i8** %8, i32 %9, i32 0)
%11 = sext i32 %10 to i64
ret i64 %11
}

LLVM IR (-O2):
define i64 @strtol(i8* %0, i8** %1, i32 %2) {
%4 = tail call i32 (i8*, i8**, i32, i32, ...) bitcast (i32 (...)* @__strtol_internal to i32 (i8*, i8**, i32, i32, ...)*)(i8* %0, i8** %1, i32 %2, i32 0)
%5 = sext i32 %4 to i64
ret i64 %5
}
void SUPR3HardenedLdrLoadPlugIn(void) {}


x86 assembly (clang, -O0):
<SUPR3HardenedLdrLoadPlugIn>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SUPR3HardenedLdrLoadPlugIn>:
ret

LLVM IR (-O0):
define void @SUPR3HardenedLdrLoadPlugIn() {
ret void
}

LLVM IR (-O2):
define void @SUPR3HardenedLdrLoadPlugIn() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void right() { printf("in right\n"); }


x86 assembly (clang, -O0):
<right>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<right>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"in right\0A\00"
define void @right() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [9 x i8] c"in right\00"
define void @right() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([9 x i8], [9 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char const *, int);
int /*<<< orphan*/ stderr;
void err_msg(int status, const char *msg) {
  fprintf(stderr, "%s (exit status: %d)\n", msg, status);
  exit(status);
}


x86 assembly (clang, -O0):
<err_msg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
mov    -0x4(%rbp),%ecx
lea    0xeba(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<err_msg>:
push   %rbx
mov    %rsi,%rdx
mov    %edi,%ebx
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
lea    0xeca(%rip),%rsi
mov    %ebx,%ecx
call   1030 <fprintf@plt>
mov    %ebx,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [22 x i8] c"%s (exit status: %d)\0A\00"
define void @err_msg(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* @stderr
%6 = load i8*, i8** %4
%7 = load i32, i32* %3
%8 = call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %6, i32 %7)
%9 = load i32, i32* %3
%10 = call i32 @exit(i32 %9)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [22 x i8] c"%s (exit status: %d)\0A\00"
define void @err_msg(i32 %0, i8* %1) {
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %1, i32 %0)
%5 = tail call i32 @exit(i32 %0)
unreachable
}
char *sh_get_env_value(varname) const char *varname;
{ return ((char *)getenv(varname)); }


x86 assembly (clang, -O0):
<sh_get_env_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <getenv@plt>
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sh_get_env_value>:
push   %rax
xor    %eax,%eax
call   1030 <getenv@plt>
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i8* @sh_get_env_value(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) bitcast (i32 (...)* @getenv to i32 (i8*, ...)*)(i8* %3)
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i8*
ret i8* %6
}

LLVM IR (-O2):
define i8* @sh_get_env_value(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @getenv to i32 (i8*, ...)*)(i8* %0)
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i8*
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int XGetSubImage() {
  printf("XGetSubImage called\n");
  return 0;
}


x86 assembly (clang, -O0):
<XGetSubImage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XGetSubImage>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [21 x i8] c"XGetSubImage called\0A\00"
define i32 @XGetSubImage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [20 x i8] c"XGetSubImage called\00"
define i32 @XGetSubImage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int mkfifo(const char *pathname, mode_t mode) { assert(!"NYI"); }


x86 assembly (clang, -O0):
<mkfifo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mkfifo>:
xor    %edi,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"NYI\00"
define i32 @mkfifo(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = call i32 @assert(i32 0)
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @mkfifo(i8* nocapture readnone %0, i32 %1) {
%3 = tail call i32 @assert(i32 0)
ret i32 undef
}
RCU_DEF_INIT_FUNC(user_m3_destroy, param) {}


x86 assembly (clang, -O0):
<RCU_DEF_INIT_FUNC>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RCU_DEF_INIT_FUNC>:
ret

LLVM IR (-O0):
define i32 @RCU_DEF_INIT_FUNC(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @RCU_DEF_INIT_FUNC(i32 %0, i32 %1) {
ret i32 undef
}
const char *crypto_hash_version(void) {
  return "1"
         "."
         "0"
         "."
         "1505"
         "."
         "2";
}


x86 assembly (clang, -O0):
<crypto_hash_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<crypto_hash_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [11 x i8] c"1.0.1505.2\00"
define i8* @crypto_hash_version() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [11 x i8] c"1.0.1505.2\00"
define i8* @crypto_hash_version() {
ret i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
char *strcpy(char *dest, const char *src) {
  char *d = dest;
  while (*src) {
    *d++ = *src++;
  }
  *d = '\0';
  return dest;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1148 <strcpy+0x48>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
jmp    1114 <strcpy+0x14>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rax
mov    (%rsi),%cl
mov    %rdi,%rdx
test   %cl,%cl
je     1131 <strcpy+0x31>
add    $0x1,%rsi
mov    %rax,%rdx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %cl,(%rdx)
add    $0x1,%rdx
movzbl (%rsi),%ecx
add    $0x1,%rsi
test   %cl,%cl
jne    1120 <strcpy+0x20>
movb   $0x0,(%rdx)
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %11, %2
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %4
%14 = load i8, i8* %12
%15 = load i8*, i8** %5
%16 = getelementptr inbounds i8, i8* %15, i32 1
store i8* %16, i8** %5
store i8 %14, i8* %15
br label %7
17: ; preds = %7
%18 = load i8*, i8** %5
store i8 0, i8* %18
%19 = load i8*, i8** %3
ret i8* %19
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %13, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %11, %5 ], [ %3, %2 ]
%7 = phi i8* [ %10, %5 ], [ %0, %2 ]
%8 = phi i8* [ %9, %5 ], [ %1, %2 ]
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = getelementptr inbounds i8, i8* %7, i64 1
store i8 %6, i8* %7
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %5
13: ; preds = %5, %2
%14 = phi i8* [ %0, %2 ], [ %10, %5 ]
store i8 0, i8* %14
ret i8* %0
}
int Msat_IntVecSortCompare1(int *pp1, int *pp2) {
  if (*pp1 < *pp2)
    return -1;
  if (*pp1 > *pp2)
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<Msat_IntVecSortCompare1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jge    112a <Msat_IntVecSortCompare1+0x2a>
movl   $0xffffffff,-0x4(%rbp)
jmp    114f <Msat_IntVecSortCompare1+0x4f>
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x18(%rbp),%rcx
cmp    (%rcx),%eax
jle    1148 <Msat_IntVecSortCompare1+0x48>
movl   $0x1,-0x4(%rbp)
jmp    114f <Msat_IntVecSortCompare1+0x4f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msat_IntVecSortCompare1>:
mov    (%rdi),%eax
xor    %ecx,%ecx
cmp    (%rsi),%eax
setg   %cl
mov    $0xffffffff,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @Msat_IntVecSortCompare1(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%6 = load i32*, i32** %4
%7 = load i32, i32* %6
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = icmp slt i32 %7, %9
br i1 %10, label %11, label %12
11: ; preds = %2
store i32 -1, i32* %3
br label %20
12: ; preds = %2
%13 = load i32*, i32** %4
%14 = load i32, i32* %13
%15 = load i32*, i32** %5
%16 = load i32, i32* %15
%17 = icmp sgt i32 %14, %16
br i1 %17, label %18, label %19
18: ; preds = %12
store i32 1, i32* %3
br label %20
19: ; preds = %12
store i32 0, i32* %3
br label %20
20: ; preds = %19, %18, %11
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @Msat_IntVecSortCompare1(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %3, %4
%6 = icmp sgt i32 %3, %4
%7 = zext i1 %6 to i32
%8 = select i1 %5, i32 -1, i32 %7
ret i32 %8
}
/* Type definitions */
typedef long long *__m128d;

/* Variables and functions */
__m128d __attribute__((__always___, __nodebug__))
_mm_cvtsi64_sd(__m128d a, long long b) {
  a[0] = b;
  return a;
}


x86 assembly (clang, -O0):
<_mm_cvtsi64_sd>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_cvtsi64_sd>:
mov    %rdi,%rax
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
define i64* @_mm_cvtsi64_sd(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64*, i64** %3
%7 = getelementptr inbounds i64, i64* %6, i64 0
store i64 %5, i64* %7
%8 = load i64*, i64** %3
ret i64* %8
}

LLVM IR (-O2):
define i64* @_mm_cvtsi64_sd(i64* returned writeonly %0, i64 %1) {
store i64 %1, i64* %0
ret i64* %0
}
/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int /*<<< orphan*/ SOCK_STREAM;
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
int socket(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int htxcmd_create_socket(void) {
  int socket_fd;
  socket_fd = socket(AF_INET, SOCK_STREAM, 0);
  if (socket_fd == -1) {
    perror("ERROR: while creating socket. Exiting...");
    exit(1);
  }
  return socket_fd;
}


x86 assembly (clang, -O0):
<htxcmd_create_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
mov    0x2e90(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1050 <socket@plt>
mov    %eax,-0x4(%rbp)
cmpl   $0xffffffff,-0x4(%rbp)
jne    1174 <htxcmd_create_socket+0x44>
lea    0xe9b(%rip),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<htxcmd_create_socket>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    0x2e97(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1050 <socket@plt>
cmp    $0xffffffff,%eax
je     1151 <htxcmd_create_socket+0x21>
pop    %rcx
ret
lea    0xea8(%rip),%rdi
call   1030 <perror@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@AF_INET = global i32 0
@SOCK_STREAM = global i32 0
@.str = [41 x i8] c"ERROR: while creating socket. Exiting...\00"
define i32 @htxcmd_create_socket() {
%1 = alloca i32
%2 = load i32, i32* @AF_INET
%3 = load i32, i32* @SOCK_STREAM
%4 = call i32 @socket(i32 %2, i32 %3, i32 0)
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = icmp eq i32 %5, -1
br i1 %6, label %7, label %10
7: ; preds = %0
%8 = call i32 @perror(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%9 = call i32 @exit(i32 1)
unreachable
10: ; preds = %0
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
@AF_INET = global i32 0
@SOCK_STREAM = global i32 0
@.str = [41 x i8] c"ERROR: while creating socket. Exiting...\00"
define i32 @htxcmd_create_socket() {
%1 = load i32, i32* @AF_INET
%2 = load i32, i32* @SOCK_STREAM
%3 = tail call i32 @socket(i32 %1, i32 %2, i32 0)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %8
5: ; preds = %0
%6 = tail call i32 @perror(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %0
ret i32 %3
}
/* Type definitions */
struct tgl_state {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ add_log_event(struct tgl_state *, int *, int);
int *alloc_log_event(int);
void bl_do_dc_signed(struct tgl_state *TLS, int id) {
  int *ev = alloc_log_event(8);
  ev[0] = 0xbd684c2d;
  ev[1] = id;
  add_log_event(TLS, ev, 8);
}


x86 assembly (clang, -O0):
<bl_do_dc_signed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x8,%edi
call   1040 <alloc_log_event@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movl   $0xbd684c2d,(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    $0x8,%edx
call   1030 <add_log_event@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bl_do_dc_signed>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %rdi,%r14
mov    $0x8,%edi
call   1040 <alloc_log_event@plt>
movl   $0xbd684c2d,(%rax)
mov    %ebx,0x4(%rax)
mov    %r14,%rdi
mov    %rax,%rsi
mov    $0x8,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <add_log_event@plt>

LLVM IR (-O0):
%struct.tgl_state = type { i32 }
define void @bl_do_dc_signed(%struct.tgl_state* %0, i32 %1) {
%3 = alloca %struct.tgl_state*
%4 = alloca i32
%5 = alloca i32*
store %struct.tgl_state* %0, %struct.tgl_state** %3
store i32 %1, i32* %4
%6 = call i32* @alloc_log_event(i32 8)
store i32* %6, i32** %5
%7 = load i32*, i32** %5
%8 = getelementptr inbounds i32, i32* %7, i64 0
store i32 -1117238227, i32* %8
%9 = load i32, i32* %4
%10 = load i32*, i32** %5
%11 = getelementptr inbounds i32, i32* %10, i64 1
store i32 %9, i32* %11
%12 = load %struct.tgl_state*, %struct.tgl_state** %3
%13 = load i32*, i32** %5
%14 = call i32 @add_log_event(%struct.tgl_state* %12, i32* %13, i32 8)
ret void
}

LLVM IR (-O2):
%struct.tgl_state = type { i32 }
define void @bl_do_dc_signed(%struct.tgl_state* %0, i32 %1) {
%3 = tail call i32* @alloc_log_event(i32 8)
store i32 -1117238227, i32* %3
%4 = getelementptr inbounds i32, i32* %3, i64 1
store i32 %1, i32* %4
%5 = tail call i32 @add_log_event(%struct.tgl_state* %0, i32* %3, i32 8)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exynos_5410_gpio_write_mask(unsigned int, unsigned int,
                                               unsigned int);
void odroid_xu_gpio_write_19(unsigned int data) {
  unsigned int bank_offset = 0x0C40;
  unsigned int bit_index = 6;
  exynos_5410_gpio_write_mask(bank_offset, ((data & 1U) << bit_index),
                              (1U << bit_index));
}


x86 assembly (clang, -O0):
<odroid_xu_gpio_write_19>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0xc40,-0x8(%rbp)
movl   $0x6,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x4(%rbp),%esi
and    $0x1,%esi
mov    -0xc(%rbp),%ecx
shl    %cl,%esi
mov    -0xc(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
call   1030 <exynos_5410_gpio_write_mask@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<odroid_xu_gpio_write_19>:
mov    %edi,%esi
shl    $0x6,%esi
and    $0x40,%esi
mov    $0xc40,%edi
mov    $0x40,%edx
jmp    1030 <exynos_5410_gpio_write_mask@plt>

LLVM IR (-O0):
define void @odroid_xu_gpio_write_19(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store i32 3136, i32* %3
store i32 6, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = and i32 %6, 1
%8 = load i32, i32* %4
%9 = shl i32 %7, %8
%10 = load i32, i32* %4
%11 = shl i32 1, %10
%12 = call i32 @exynos_5410_gpio_write_mask(i32 %5, i32 %9, i32 %11)
ret void
}

LLVM IR (-O2):
define void @odroid_xu_gpio_write_19(i32 %0) {
%2 = shl i32 %0, 6
%3 = and i32 %2, 64
%4 = tail call i32 @exynos_5410_gpio_write_mask(i32 3136, i32 %3, i32 64)
ret void
}