xunge/DecIR huggingface dataset:
/* Type definitions */
struct bst_table {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
void *bst_delete(struct bst_table *, void *);
void *(bst_assert_delete)(struct bst_table *table, void *item) {
  void *p = bst_delete(table, item);
  assert(p != NULL);
  return p;
}


x86 assembly (clang, -O0):
<bst_assert_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <bst_delete@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1040 <assert@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bst_assert_delete>:
push   %rbx
call   1030 <bst_delete@plt>
mov    %rax,%rbx
xor    %edi,%edi
test   %rax,%rax
setne  %dil
call   1040 <assert@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.bst_table = type { i32 }
define i8* @bst_assert_delete(%struct.bst_table* %0, i8* %1) {
%3 = alloca %struct.bst_table*
%4 = alloca i8*
%5 = alloca i8*
store %struct.bst_table* %0, %struct.bst_table** %3
store i8* %1, i8** %4
%6 = load %struct.bst_table*, %struct.bst_table** %3
%7 = load i8*, i8** %4
%8 = call i8* @bst_delete(%struct.bst_table* %6, i8* %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
%11 = zext i1 %10 to i32
%12 = call i32 @assert(i32 %11)
%13 = load i8*, i8** %5
ret i8* %13
}

LLVM IR (-O2):
%struct.bst_table = type { i32 }
define i8* @bst_assert_delete(%struct.bst_table* %0, i8* %1) {
%3 = tail call i8* @bst_delete(%struct.bst_table* %0, i8* %1)
%4 = icmp ne i8* %3, null
%5 = zext i1 %4 to i32
%6 = tail call i32 @assert(i32 %5)
ret i8* %3
}
void pcibios_penalize_isa_irq(int irq, int active) {}


x86 assembly (clang, -O0):
<pcibios_penalize_isa_irq>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pcibios_penalize_isa_irq>:
ret

LLVM IR (-O0):
define void @pcibios_penalize_isa_irq(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @pcibios_penalize_isa_irq(i32 %0, i32 %1) {
ret void
}
void odp_spin(void) { __asm__ __volatile__("pause"); }


x86 assembly (clang, -O0):
<odp_spin>:
push   %rbp
mov    %rsp,%rbp
pause
pop    %rbp
ret

x86 assembly (clang, -O2):
<odp_spin>:
pause
ret

LLVM IR (-O0):
define void @odp_spin() {
ret void
}

LLVM IR (-O2):
define void @odp_spin() {
tail call void asm sideeffect "pause", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
unsigned long getword(unsigned char *p) { return p[0] + p[1] * 256; }


x86 assembly (clang, -O0):
<getword>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x8,%ecx
add    %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<getword>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
define i64 @getword(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = zext i8 %9 to i32
%11 = mul nsw i32 %10, 256
%12 = add nsw i32 %6, %11
%13 = sext i32 %12 to i64
ret i64 %13
}

LLVM IR (-O2):
define i64 @getword(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i64
%7 = shl nuw nsw i64 %6, 8
%8 = or i64 %7, %3
ret i64 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/ *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, ...);
void print_gff_header(FILE *gff_file_pointer, int genome_length) {
  fprintf(gff_file_pointer, "##gff-version 3\n");
  fprintf(gff_file_pointer, "##sequence-region SEQUENCE 1 %d\n", genome_length);
  fflush(gff_file_pointer);
}


x86 assembly (clang, -O0):
<print_gff_header>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec6(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
lea    0xec2(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_gff_header>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
lea    0xec1(%rip),%rdi
mov    $0x10,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1050 <fwrite@plt>
lea    0xeb9(%rip),%rsi
mov    %rbx,%rdi
mov    %ebp,%edx
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"##gff-version 3\0A\00"
@.str.1 = [33 x i8] c"##sequence-region SEQUENCE 1 %d\0A\00"
define void @print_gff_header(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = call i32 (i32*, i8*, ...) @fprintf(i32* %5, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%7 = load i32*, i32** %3
%8 = load i32, i32* %4
%9 = call i32 (i32*, i8*, ...) @fprintf(i32* %7, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0), i32 %8)
%10 = load i32*, i32** %3
%11 = call i32 @fflush(i32* %10)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"##gff-version 3\0A\00"
@.str.1 = [33 x i8] c"##sequence-region SEQUENCE 1 %d\0A\00"
define void @print_gff_header(i32* nocapture %0, i32 %1) {
%3 = tail call i64 @fwrite(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i64 16, i64 1, i32* %0)
%4 = tail call i32 (i32*, i8*, ...) @fprintf(i32* %0, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0), i32 %1)
%5 = tail call i32 @fflush(i32* %0)
ret void
}
int SysCall5(int EAX__, int EBX__, int ECX__, int EDX__, int ESI__) {
  asm volatile("" ::"a"(EAX__));
  asm volatile("" ::"b"(EBX__));
  asm volatile("" ::"c"(ECX__));
  asm volatile("" ::"d"(EDX__));
  asm volatile("" ::"S"(ESI__));
  asm volatile("int $0x40");
  register int res;
  asm volatile("" : "=a"(res) :);
  return res;
}


x86 assembly (clang, -O0):
<SysCall5>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x10(%rbp),%ebx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%edx
mov    -0x1c(%rbp),%esi
int    $0x40
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCall5>:
push   %rbx
mov    %ecx,%r9d
mov    %edx,%ecx
mov    %esi,%ebx
mov    %edi,%eax
mov    %r9d,%edx
mov    %r8d,%esi
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define i32 @SysCall5(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = load i32, i32* %8
%15 = load i32, i32* %9
%16 = load i32, i32* %10
%17 = call i32 asm sideeffect "", "={ax},~{dirflag},~{fpsr},~{flags}"()
store i32 %17, i32* %11
%18 = load i32, i32* %11
ret i32 %18
}

LLVM IR (-O2):
define i32 @SysCall5(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
tail call void asm sideeffect "", "{ax},~{dirflag},~{fpsr},~{flags}"(i32 %0)
tail call void asm sideeffect "", "{bx},~{dirflag},~{fpsr},~{flags}"(i32 %1)
tail call void asm sideeffect "", "{cx},~{dirflag},~{fpsr},~{flags}"(i32 %2)
tail call void asm sideeffect "", "{dx},~{dirflag},~{fpsr},~{flags}"(i32 %3)
tail call void asm sideeffect "", "{si},~{dirflag},~{fpsr},~{flags}"(i32 %4)
tail call void asm sideeffect "int $$0x40", "~{dirflag},~{fpsr},~{flags}"()
%6 = tail call i32 asm sideeffect "", "={ax},~{dirflag},~{fpsr},~{flags}"()
ret i32 %6
}
void __gettexterror(struct parse_args *arg, const char *str) {}


x86 assembly (clang, -O0):
<__gettexterror>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__gettexterror>:
ret

LLVM IR (-O0):
%struct.parse_args = type opaque
define void @__gettexterror(%struct.parse_args* %0, i8* %1) {
%3 = alloca %struct.parse_args*
%4 = alloca i8*
store %struct.parse_args* %0, %struct.parse_args** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.parse_args = type opaque
define void @__gettexterror(%struct.parse_args* nocapture %0, i8* nocapture %1) {
ret void
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int realToInt(uint32_t *env) { return (int)(float)*(env + 1); }


x86 assembly (clang, -O0):
<realToInt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cvtsi2ssq 0x8(%rax),%xmm0
cvttss2si %xmm0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<realToInt>:
cvtsi2ssq 0x8(%rdi),%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @realToInt(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 1
%5 = load i64, i64* %4
%6 = sitofp i64 %5 to float
%7 = fptosi float %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @realToInt(i64* nocapture %0) {
%2 = getelementptr inbounds i64, i64* %0, i64 1
%3 = load i64, i64* %2
%4 = sitofp i64 %3 to float
%5 = fptosi float %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ cleanup_screen();
int /*<<< orphan*/ draw_border();
int /*<<< orphan*/ setup_screen();
int /*<<< orphan*/ wait_char();
int main() {
  setup_screen();
  draw_border();
  wait_char();
  cleanup_screen();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <setup_screen@plt>
mov    $0x0,%al
call   1060 <draw_border@plt>
mov    $0x0,%al
call   1040 <wait_char@plt>
mov    $0x0,%al
call   1030 <cleanup_screen@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <setup_screen@plt>
xor    %eax,%eax
call   1060 <draw_border@plt>
xor    %eax,%eax
call   1040 <wait_char@plt>
xor    %eax,%eax
call   1030 <cleanup_screen@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @setup_screen()
%3 = call i32 (...) @draw_border()
%4 = call i32 (...) @wait_char()
%5 = call i32 (...) @cleanup_screen()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @setup_screen()
%2 = tail call i32 (...) @draw_border()
%3 = tail call i32 (...) @wait_char()
%4 = tail call i32 (...) @cleanup_screen()
ret i32 0
}
int test_imm_24int64_midword_reg(long long val) {
  return ((val >> 16) & (0x24 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_24int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x24,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_24int64_midword_reg>:
test   $0x240000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_24int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 36
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_24int64_midword_reg(i64 %0) {
%2 = and i64 %0, 2359296
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void cat_speak(void) { printf("meow!\n"); }


x86 assembly (clang, -O0):
<cat_speak>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cat_speak>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"meow!\0A\00"
define void @cat_speak() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"meow!\00"
define void @cat_speak() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret void
}
int acker(m, n)
int m;
int n;
{
  if (m == 0)
    return n + 1;
  if (n == 0)
    return acker(m - 1, 1);
  return (acker(m - 1, acker(m, n - 1)));
}


x86 assembly (clang, -O0):
<acker>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1136 <acker+0x26>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    117c <acker+0x6c>
cmpl   $0x0,-0xc(%rbp)
jne    1158 <acker+0x48>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
mov    $0x1,%esi
call   1030 <acker@plt>
mov    %eax,-0x4(%rbp)
jmp    117c <acker+0x6c>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
sub    $0x1,%esi
call   1030 <acker@plt>
mov    -0x10(%rbp),%edi
mov    %eax,%esi
call   1030 <acker@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acker>:
push   %rbx
mov    %esi,%eax
test   %edi,%edi
je     113f <acker+0x2f>
mov    %edi,%ebx
jmp    112a <acker+0x1a>
nopl   0x0(%rax,%rax,1)
mov    $0x1,%eax
add    $0xffffffff,%ebx
je     113f <acker+0x2f>
test   %eax,%eax
je     1120 <acker+0x10>
add    $0xffffffff,%eax
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <acker@plt>
add    $0xffffffff,%ebx
jne    112a <acker+0x1a>
add    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @acker(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, i32* %5
%10 = add nsw i32 %9, 1
store i32 %10, i32* %3
br label %26
11: ; preds = %2
%12 = load i32, i32* %5
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %11
%15 = load i32, i32* %4
%16 = sub nsw i32 %15, 1
%17 = call i32 @acker(i32 %16, i32 1)
store i32 %17, i32* %3
br label %26
18: ; preds = %11
%19 = load i32, i32* %4
%20 = sub nsw i32 %19, 1
%21 = load i32, i32* %4
%22 = load i32, i32* %5
%23 = sub nsw i32 %22, 1
%24 = call i32 @acker(i32 %21, i32 %23)
%25 = call i32 @acker(i32 %20, i32 %24)
store i32 %25, i32* %3
br label %26
26: ; preds = %18, %14, %8
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @acker(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %7
4: ; preds = %11, %2
%5 = phi i32 [ %1, %2 ], [ %12, %11 ]
%6 = add nsw i32 %5, 1
ret i32 %6
7: ; preds = %2, %11
%8 = phi i32 [ %12, %11 ], [ %1, %2 ]
%9 = phi i32 [ %13, %11 ], [ %0, %2 ]
%10 = icmp eq i32 %8, 0
br i1 %10, label %11, label %15
11: ; preds = %7, %15
%12 = phi i32 [ %17, %15 ], [ 1, %7 ]
%13 = add nsw i32 %9, -1
%14 = icmp eq i32 %13, 0
br i1 %14, label %4, label %7
15: ; preds = %7
%16 = add nsw i32 %8, -1
%17 = tail call i32 @acker(i32 %9, i32 %16)
br label %11
}
int main() {
  int a = 0;
  while (1) {
    if (a < 10000000)
      a++;
    else
      a = 0;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x989680,-0x8(%rbp)
jge    112d <main+0x2d>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1134 <main+0x34>
movl   $0x0,-0x8(%rbp)
jmp    1112 <main+0x12>

x86 assembly (clang, -O2):
<main>:
jmp    1100 <main>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %0, %10
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 10000000
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %10
9: ; preds = %3
store i32 0, i32* %2
br label %10
10: ; preds = %9, %6
br label %3
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Type definitions */
struct compat_semaphore {
  int dummy;
};

/* Variables and functions */
int compat_sema_count(struct compat_semaphore *);
int sema_count(struct compat_semaphore *sem) { return compat_sema_count(sem); }


x86 assembly (clang, -O0):
<sema_count>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <compat_sema_count@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sema_count>:
jmp    1030 <compat_sema_count@plt>

LLVM IR (-O0):
%struct.compat_semaphore = type { i32 }
define i32 @sema_count(%struct.compat_semaphore* %0) {
%2 = alloca %struct.compat_semaphore*
store %struct.compat_semaphore* %0, %struct.compat_semaphore** %2
%3 = load %struct.compat_semaphore*, %struct.compat_semaphore** %2
%4 = call i32 @compat_sema_count(%struct.compat_semaphore* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.compat_semaphore = type { i32 }
define i32 @sema_count(%struct.compat_semaphore* %0) {
%2 = tail call i32 @compat_sema_count(%struct.compat_semaphore* %0)
ret i32 %2
}
int Modulo(int a, int b) { return (a % b + b) % b; }


x86 assembly (clang, -O0):
<Modulo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
add    -0x8(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Modulo>:
mov    %edi,%eax
cltd
idiv   %esi
lea    (%rdx,%rsi,1),%eax
cltd
idiv   %esi
mov    %edx,%eax
ret

LLVM IR (-O0):
define i32 @Modulo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = srem i32 %5, %6
%8 = load i32, i32* %4
%9 = add nsw i32 %7, %8
%10 = load i32, i32* %4
%11 = srem i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @Modulo(i32 %0, i32 %1) {
%3 = srem i32 %0, %1
%4 = add nsw i32 %3, %1
%5 = srem i32 %4, %1
ret i32 %5
}
float cbf(float f) { return f * f * f; }


x86 assembly (clang, -O0):
<cbf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbf>:
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @cbf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
%6 = load float, float* %2
%7 = fmul float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @cbf(float %0) {
%2 = fmul float %0, %0
%3 = fmul float %2, %0
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ test_char();
int /*<<< orphan*/ test_short();
int main() {
  test_char();
  test_short();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_char@plt>
mov    $0x0,%al
call   1040 <test_short@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_char@plt>
xor    %eax,%eax
call   1040 <test_short@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_char()
%3 = call i32 (...) @test_short()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_char()
%2 = tail call i32 (...) @test_short()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ print_features();
int /*<<< orphan*/ printf(char *, ...);
void help(char *p) {
  printf("Usage:\n");
  printf("%s query <cpu>\n", p);
  printf("%s (get|set|unset) <cpu> <feature>\n", p);
  print_features();
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xec3(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xec1(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
mov    $0x0,%al
call   1030 <print_features@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
push   %rbx
mov    %rdi,%rbx
lea    0xef9(%rip),%rdi
call   1040 <puts@plt>
lea    0xeb9(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1050 <printf@plt>
lea    0xeb8(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1050 <printf@plt>
xor    %eax,%eax
pop    %rbx
jmp    1030 <print_features@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"Usage:\0A\00"
@.str.1 = [16 x i8] c"%s query <cpu>\0A\00"
@.str.2 = [36 x i8] c"%s (get|set|unset) <cpu> <feature>\0A\00"
define void @help(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* %4)
%6 = load i8*, i8** %2
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.2, i64 0, i64 0), i8* %6)
%8 = call i32 (...) @print_features()
ret void
}

LLVM IR (-O2):
@.str.1 = [16 x i8] c"%s query <cpu>\0A\00"
@.str.2 = [36 x i8] c"%s (get|set|unset) <cpu> <feature>\0A\00"
@str = [7 x i8] c"Usage:\00"
define void @help(i8* %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* %0)
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @.str.2, i64 0, i64 0), i8* %0)
%5 = tail call i32 (...) @print_features()
ret void
}
void setThrustValue(short inVal, short inThruster) {}


x86 assembly (clang, -O0):
<setThrustValue>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setThrustValue>:
ret

LLVM IR (-O0):
define void @setThrustValue(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
ret void
}

LLVM IR (-O2):
define void @setThrustValue(i16 signext %0, i16 signext %1) {
ret void
}
int find_gcd(int i, int j) {
  if (i < j) {
    int t = j;
    j = i;
    i = t;
  }
  while (j != 0) {
    int r = i % j;
    i = j;
    j = r;
  }
  return i;
}


x86 assembly (clang, -O0):
<find_gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1128 <find_gcd+0x28>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    112d <find_gcd+0x2d>
cmpl   $0x0,-0x8(%rbp)
je     1152 <find_gcd+0x52>
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    112d <find_gcd+0x2d>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_gcd>:
mov    %edi,%eax
cmp    %esi,%edi
mov    %esi,%edx
cmovl  %edi,%edx
cmovl  %esi,%eax
test   %edx,%edx
je     111d <find_gcd+0x1d>
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <find_gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @find_gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32, i32* %4
store i32 %11, i32* %5
%12 = load i32, i32* %3
store i32 %12, i32* %4
%13 = load i32, i32* %5
store i32 %13, i32* %3
br label %14
14: ; preds = %10, %2
br label %15
15: ; preds = %18, %14
%16 = load i32, i32* %4
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %24
18: ; preds = %15
%19 = load i32, i32* %3
%20 = load i32, i32* %4
%21 = srem i32 %19, %20
store i32 %21, i32* %6
%22 = load i32, i32* %4
store i32 %22, i32* %3
%23 = load i32, i32* %6
store i32 %23, i32* %4
br label %15
24: ; preds = %15
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @find_gcd(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
%5 = select i1 %3, i32 %1, i32 %0
%6 = icmp eq i32 %4, 0
br i1 %6, label %12, label %7
7: ; preds = %2, %7
%8 = phi i32 [ %9, %7 ], [ %5, %2 ]
%9 = phi i32 [ %10, %7 ], [ %4, %2 ]
%10 = srem i32 %8, %9
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %7
12: ; preds = %7, %2
%13 = phi i32 [ %5, %2 ], [ %9, %7 ]
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int munmap(void *, unsigned int);
int /*<<< orphan*/ printf(char *, int);
void *unmapmem(void *addr, unsigned size) {
  int s = munmap(addr, size);
  if (s != 0) {
    printf("munmap error %d\n", s);
    exit(-1);
  }
}


x86 assembly (clang, -O0):
<unmapmem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
call   1040 <munmap@plt>
mov    %eax,-0x18(%rbp)
cmpl   $0x0,-0x18(%rbp)
je     1171 <unmapmem+0x41>
mov    -0x18(%rbp),%esi
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unmapmem>:
push   %rax
call   1040 <munmap@plt>
test   %eax,%eax
jne    113c <unmapmem+0xc>
pop    %rcx
ret
lea    0xebd(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    $0xffffffff,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"munmap error %d\0A\00"
define i8* @unmapmem(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = call i32 @munmap(i8* %7, i32 %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %2
%13 = load i32, i32* %6
%14 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %13)
%15 = call i32 @exit(i32 -1)
unreachable
16: ; preds = %2
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
@.str = [17 x i8] c"munmap error %d\0A\00"
define noalias i8* @unmapmem(i8* %0, i32 %1) {
%3 = tail call i32 @munmap(i8* %0, i32 %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %3)
%7 = tail call i32 @exit(i32 -1)
unreachable
8: ; preds = %2
ret i8* undef
}
/* Variables and functions */
int /*<<< orphan*/ isalpha(char const);
size_t countnonalpha(const char *str) {
  size_t ret = 0;
  while (*str) {
    if (!isalpha(*str))
      ++ret;
    ++str;
  }
  return ret;
}


x86 assembly (clang, -O0):
<countnonalpha>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1163 <countnonalpha+0x53>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isalpha@plt>
cmp    $0x0,%eax
jne    1152 <countnonalpha+0x42>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1124 <countnonalpha+0x14>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<countnonalpha>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     114c <countnonalpha+0x3c>
mov    %rdi,%rbx
add    $0x1,%rbx
xor    %r14d,%r14d
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <isalpha@plt>
cmp    $0x1,%eax
adc    $0x0,%r14
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <countnonalpha+0x20>
jmp    114f <countnonalpha+0x3f>
xor    %r14d,%r14d
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @countnonalpha(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = call i32 @isalpha(i8 signext %10)
%12 = icmp ne i32 %11, 0
br i1 %12, label %16, label %13
13: ; preds = %8
%14 = load i64, i64* %3
%15 = add i64 %14, 1
store i64 %15, i64* %3
br label %16
16: ; preds = %13, %8
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %2
br label %4
19: ; preds = %4
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @countnonalpha(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %13, %4 ], [ %2, %1 ]
%6 = phi i64 [ %11, %4 ], [ 0, %1 ]
%7 = phi i8* [ %12, %4 ], [ %0, %1 ]
%8 = tail call i32 @isalpha(i8 signext %5)
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i64
%11 = add i64 %6, %10
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %4
15: ; preds = %4, %1
%16 = phi i64 [ 0, %1 ], [ %11, %4 ]
ret i64 %16
}
void setBoneRotation(void) {}


x86 assembly (clang, -O0):
<setBoneRotation>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setBoneRotation>:
ret

LLVM IR (-O0):
define void @setBoneRotation() {
ret void
}

LLVM IR (-O2):
define void @setBoneRotation() {
ret void
}
void __attribute__((no)) HEX00_parsecfgInit(void) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @HEX00_parsecfgInit() {
ret void
}

LLVM IR (-O2):
define void @HEX00_parsecfgInit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void sagetv_free1(void *p) {
  if (p)
    free(p);
}


x86 assembly (clang, -O0):
<sagetv_free1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <sagetv_free1+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sagetv_free1>:
test   %rdi,%rdi
je     111a <sagetv_free1+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @sagetv_free1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @sagetv_free1(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert_int_equal(int /*<<< orphan*/, int);
int /*<<< orphan*/ south_span(int);
void south_span_test(void **state) {
  assert_int_equal(south_span(0x0100000000000000),
                   0x0101010101010101ul & ~0xFF00000000000000ul);
}


x86 assembly (clang, -O0):
<south_span_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <south_span@plt>
mov    %eax,%edi
mov    $0x1010101,%esi
call   1040 <assert_int_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<south_span_test>:
push   %rax
xor    %edi,%edi
call   1030 <south_span@plt>
mov    %eax,%edi
mov    $0x1010101,%esi
pop    %rax
jmp    1040 <assert_int_equal@plt>

LLVM IR (-O0):
define void @south_span_test(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @south_span(i32 0)
%4 = call i32 @assert_int_equal(i32 %3, i32 16843009)
ret void
}

LLVM IR (-O2):
define void @south_span_test(i8** nocapture readnone %0) {
%2 = tail call i32 @south_span(i32 0)
%3 = tail call i32 @assert_int_equal(i32 %2, i32 16843009)
ret void
}
/* Type definitions */
typedef scalar_t__ time_t;

/* Variables and functions */
double sum_time(time_t sec, long nsec) {
  double final_time = (double)0;
  final_time += (double)sec;
  final_time += (double)nsec / (double)1000000000;
  return final_time;
}


x86 assembly (clang, -O0):
<sum_time>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x18(%rbp)
cvtsi2sdq -0x8(%rbp),%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
cvtsi2sdq -0x10(%rbp),%xmm0
movsd  0xece(%rip),%xmm1
divsd  %xmm1,%xmm0
addsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum_time>:
cvtsi2sd %rdi,%xmm1
cvtsi2sd %rsi,%xmm0
divsd  0xeee(%rip),%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @sum_time(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca double
store i64 %0, i64* %3
store i64 %1, i64* %4
store double 0.000000e+00, double* %5
%6 = load i64, i64* %3
%7 = sitofp i64 %6 to double
%8 = load double, double* %5
%9 = fadd double %8, %7
store double %9, double* %5
%10 = load i64, i64* %4
%11 = sitofp i64 %10 to double
%12 = fdiv double %11, 1.000000e+09
%13 = load double, double* %5
%14 = fadd double %13, %12
store double %14, double* %5
%15 = load double, double* %5
ret double %15
}

LLVM IR (-O2):
define double @sum_time(i64 %0, i64 %1) {
%3 = sitofp i64 %0 to double
%4 = sitofp i64 %1 to double
%5 = fdiv double %4, 1.000000e+09
%6 = fadd double %5, %3
ret double %6
}
/* Variables and functions */
float convertir(int);
int /*<<< orphan*/ printf(char *, int, float);
main() {
  int nGradosCentigrados = 0;
  int incremento = 6;
  float GradosFahrenheit = 0;
  nGradosCentigrados = -30;
  while (nGradosCentigrados <= 100) {
    GradosFahrenheit = convertir(nGradosCentigrados);
    printf("%10d C %10.2f F\n", nGradosCentigrados, GradosFahrenheit);
    nGradosCentigrados += incremento;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x6,-0xc(%rbp)
xorps  %xmm0,%xmm0
movss  %xmm0,-0x10(%rbp)
movl   $0xffffffe2,-0x8(%rbp)
cmpl   $0x64,-0x8(%rbp)
jg     1185 <main+0x65>
mov    -0x8(%rbp),%edi
call   1030 <convertir@plt>
movss  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%esi
movss  -0x10(%rbp),%xmm0
lea    0xe8e(%rip),%rdi
call   1040 <printf@plt>
mov    -0xc(%rbp),%eax
add    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    114c <main+0x2c>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
mov    $0xffffffdc,%ebx
lea    0xed0(%rip),%r14
add    $0x6,%ebx
mov    %ebx,%edi
call   1030 <convertir@plt>
mov    %r14,%rdi
mov    %ebx,%esi
call   1040 <printf@plt>
cmp    $0x5f,%ebx
jl     1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [17 x i8] c"%10d C %10.2f F\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca float
store i32 0, i32* %1
store i32 0, i32* %2
store i32 6, i32* %3
store float 0.000000e+00, float* %4
store i32 -30, i32* %2
br label %5
5: ; preds = %8, %0
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 100
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i32, i32* %2
%10 = call float @convertir(i32 %9)
store float %10, float* %4
%11 = load i32, i32* %2
%12 = load float, float* %4
%13 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %11, float %12)
%14 = load i32, i32* %3
%15 = load i32, i32* %2
%16 = add nsw i32 %15, %14
store i32 %16, i32* %2
br label %5
17: ; preds = %5
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
@.str = [17 x i8] c"%10d C %10.2f F\0A\00"
define i32 @main() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ -30, %0 ], [ %5, %1 ]
%3 = tail call float @convertir(i32 %2)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %2, float %3)
%5 = add nsw i32 %2, 6
%6 = icmp slt i32 %2, 95
br i1 %6, label %1, label %7
7: ; preds = %1
ret i32 0
}
void Exchange(int A[], int i, int j) {
  int temp;
  temp = A[i];
  A[i] = A[j];
  A[j] = temp;
}


x86 assembly (clang, -O0):
<Exchange>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Exchange>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @Exchange(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @Exchange(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
/* Variables and functions */
scalar_t__ handle_mem_failure(size_t);
int mlock(void const *, size_t);
int my_mlock(const void *addr, size_t len) {
  int ret;
  do {
    ret = mlock(addr, len);
  } while (ret < 0 && handle_mem_failure(len));
  return ret;
}


x86 assembly (clang, -O0):
<my_mlock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <mlock@plt>
mov    %eax,-0x14(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x14(%rbp)
mov    %al,-0x15(%rbp)
jge    1162 <my_mlock+0x42>
mov    -0x10(%rbp),%rdi
call   1040 <handle_mem_failure@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x15(%rbp)
mov    -0x15(%rbp),%al
test   $0x1,%al
jne    1130 <my_mlock+0x10>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_mlock>:
push   %rbp
push   %r14
push   %rbx
mov    %rsi,%rbx
mov    %rdi,%r14
nopw   0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <mlock@plt>
mov    %eax,%ebp
test   %eax,%eax
jns    114e <my_mlock+0x2e>
mov    %rbx,%rdi
call   1040 <handle_mem_failure@plt>
test   %rax,%rax
jne    1130 <my_mlock+0x10>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @my_mlock(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
br label %6
6: ; preds = %17, %2
%7 = load i8*, i8** %3
%8 = load i64, i64* %4
%9 = call i32 @mlock(i8* %7, i64 %8)
store i32 %9, i32* %5
br label %10
10: ; preds = %6
%11 = load i32, i32* %5
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = load i64, i64* %4
%15 = call i64 @handle_mem_failure(i64 %14)
%16 = icmp ne i64 %15, 0
br label %17
17: ; preds = %13, %10
%18 = phi i1 [ false, %10 ], [ %16, %13 ]
br i1 %18, label %6, label %19
19: ; preds = %17
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @my_mlock(i8* %0, i64 %1) {
br label %3
3: ; preds = %6, %2
%4 = tail call i32 @mlock(i8* %0, i64 %1)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = tail call i64 @handle_mem_failure(i64 %1)
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %3
9: ; preds = %3, %6
ret i32 %4
}
/* Type definitions */
struct pollfd {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ err_sys(char *);
int poll(struct pollfd *, unsigned long, int);
int Poll(struct pollfd *fdarray, unsigned long nfds, int timeout) {
  int n;
  if ((n = poll(fdarray, nfds, timeout)) < 0)
    err_sys("poll() error");
  return (n);
}


x86 assembly (clang, -O0):
<Poll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <poll@plt>
mov    %eax,-0x18(%rbp)
cmp    $0x0,%eax
jge    115b <Poll+0x3b>
lea    0xeaa(%rip),%rdi
call   1030 <err_sys@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Poll>:
push   %rbx
call   1040 <poll@plt>
mov    %eax,%ebx
test   %eax,%eax
jns    1138 <Poll+0x18>
lea    0xecd(%rip),%rdi
call   1030 <err_sys@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.pollfd = type { i32 }
@.str = [13 x i8] c"poll() error\00"
define i32 @Poll(%struct.pollfd* %0, i64 %1, i32 %2) {
%4 = alloca %struct.pollfd*
%5 = alloca i64
%6 = alloca i32
%7 = alloca i32
store %struct.pollfd* %0, %struct.pollfd** %4
store i64 %1, i64* %5
store i32 %2, i32* %6
%8 = load %struct.pollfd*, %struct.pollfd** %4
%9 = load i64, i64* %5
%10 = load i32, i32* %6
%11 = call i32 @poll(%struct.pollfd* %8, i64 %9, i32 %10)
store i32 %11, i32* %7
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = call i32 @err_sys(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %15
15: ; preds = %13, %3
%16 = load i32, i32* %7
ret i32 %16
}

LLVM IR (-O2):
%struct.pollfd = type { i32 }
@.str = [13 x i8] c"poll() error\00"
define i32 @Poll(%struct.pollfd* %0, i64 %1, i32 %2) {
%4 = tail call i32 @poll(%struct.pollfd* %0, i64 %1, i32 %2)
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @err_sys(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %3
ret i32 %4
}
void glGetVertexAttribPointerv(void) { return; }


x86 assembly (clang, -O0):
<glGetVertexAttribPointerv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glGetVertexAttribPointerv>:
ret

LLVM IR (-O0):
define void @glGetVertexAttribPointerv() {
ret void
}

LLVM IR (-O2):
define void @glGetVertexAttribPointerv() {
ret void
}
void log_message(char *format, ...) {}


x86 assembly (clang, -O0):
<log_message>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_message>:
ret

LLVM IR (-O0):
define void @log_message(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @log_message(i8* nocapture %0, ...) {
ret void
}
char castToChar(long num) {
  char a;
  a = (char)num;
  return (a);
}


x86 assembly (clang, -O0):
<castToChar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<castToChar>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define signext i8 @castToChar(i64 %0) {
%2 = alloca i64
%3 = alloca i8
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = trunc i64 %4 to i8
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define signext i8 @castToChar(i64 %0) {
%2 = trunc i64 %0 to i8
ret i8 %2
}
unsigned int const_time_fill_msb(unsigned int val) {
  return (val >> (sizeof(val) * 8 - 1)) * ~0U;
}


x86 assembly (clang, -O0):
<const_time_fill_msb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1f,%eax
imul   $0xffffffff,%eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<const_time_fill_msb>:
mov    %edi,%eax
sar    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @const_time_fill_msb(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 31
%5 = mul i32 %4, -1
ret i32 %5
}

LLVM IR (-O2):
define i32 @const_time_fill_msb(i32 %0) {
%2 = ashr i32 %0, 31
ret i32 %2
}
int IsLeapYear(int y) { return y % 4 == 0 && (y % 100 || y % 400 == 0); }


x86 assembly (clang, -O0):
<IsLeapYear>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
xor    %eax,%eax
cmp    $0x0,%edx
mov    %al,-0x5(%rbp)
jne    1153 <IsLeapYear+0x53>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x6(%rbp)
jne    114d <IsLeapYear+0x4d>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IsLeapYear>:
xor    %eax,%eax
test   $0x3,%dil
je     1109 <IsLeapYear+0x9>
ret
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
mov    %ecx,%edx
ror    $0x2,%edx
mov    $0x1,%eax
cmp    $0x28f5c28,%edx
ja     1108 <IsLeapYear+0x8>
ror    $0x4,%ecx
xor    %eax,%eax
cmp    $0xa3d70b,%ecx
setb   %al
ret

LLVM IR (-O0):
define i32 @IsLeapYear(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = srem i32 %3, 4
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %16
6: ; preds = %1
%7 = load i32, i32* %2
%8 = srem i32 %7, 100
%9 = icmp ne i32 %8, 0
br i1 %9, label %14, label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = srem i32 %11, 400
%13 = icmp eq i32 %12, 0
br label %14
14: ; preds = %10, %6
%15 = phi i1 [ true, %6 ], [ %13, %10 ]
br label %16
16: ; preds = %14, %1
%17 = phi i1 [ false, %1 ], [ %15, %14 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @IsLeapYear(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = srem i32 %0, 100
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %4
%8 = srem i32 %0, 400
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %4, %7, %1
%12 = phi i32 [ 0, %1 ], [ 1, %4 ], [ %10, %7 ]
ret i32 %12
}
void sfi_init(void) {}


x86 assembly (clang, -O0):
<sfi_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sfi_init>:
ret

LLVM IR (-O0):
define void @sfi_init() {
ret void
}

LLVM IR (-O2):
define void @sfi_init() {
ret void
}
/* Type definitions */
struct pci_dev {
  int dummy;
};

/* Variables and functions */
int EINVAL;
int pci_enable_pcie_error_reporting(struct pci_dev *dev) { return -EINVAL; }


x86 assembly (clang, -O0):
<pci_enable_pcie_error_reporting>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ecf(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_enable_pcie_error_reporting>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
%struct.pci_dev = type { i32 }
@EINVAL = global i32 0
define i32 @pci_enable_pcie_error_reporting(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
store %struct.pci_dev* %0, %struct.pci_dev** %2
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
%struct.pci_dev = type { i32 }
@EINVAL = global i32 0
define i32 @pci_enable_pcie_error_reporting(%struct.pci_dev* nocapture readnone %0) {
%2 = load i32, i32* @EINVAL
%3 = sub nsw i32 0, %2
ret i32 %3
}