xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int getpid();
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ stdout;
int /*<<< orphan*/ test1();
int /*<<< orphan*/ test2();
int /*<<< orphan*/ test3();
int /*<<< orphan*/ test4();
int main() {
  test1();
  test2();
  test3();
  test4();
  printf("pid %u\n", getpid());
  fflush(stdout);
  sleep(-1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1050 <test1@plt>
mov    $0x0,%al
call   1090 <test2@plt>
mov    $0x0,%al
call   1040 <test3@plt>
mov    $0x0,%al
call   1080 <test4@plt>
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    0xe45(%rip),%rdi
call   1060 <printf@plt>
mov    0x2e19(%rip),%rax
mov    (%rax),%edi
call   1070 <fflush@plt>
mov    $0xffffffff,%edi
call   10a0 <sleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1050 <test1@plt>
xor    %eax,%eax
call   1090 <test2@plt>
xor    %eax,%eax
call   1040 <test3@plt>
xor    %eax,%eax
call   1080 <test4@plt>
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xe55(%rip),%rdi
mov    %eax,%esi
call   1060 <printf@plt>
mov    0x2e27(%rip),%rax
mov    (%rax),%edi
call   1070 <fflush@plt>
mov    $0xffffffff,%edi
call   10a0 <sleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"pid %u\0A\00"
@stdout = global i32 0
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test1()
%3 = call i32 (...) @test2()
%4 = call i32 (...) @test3()
%5 = call i32 (...) @test4()
%6 = call i32 (...) @getpid()
%7 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %6)
%8 = load i32, i32* @stdout
%9 = call i32 @fflush(i32 %8)
%10 = call i32 @sleep(i32 -1)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"pid %u\0A\00"
@stdout = global i32 0
define i32 @main() {
%1 = tail call i32 (...) @test1()
%2 = tail call i32 (...) @test2()
%3 = tail call i32 (...) @test3()
%4 = tail call i32 (...) @test4()
%5 = tail call i32 (...) @getpid()
%6 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* @stdout
%8 = tail call i32 @fflush(i32 %7)
%9 = tail call i32 @sleep(i32 -1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, char *, char *);
void printRed(char *str) { printf("%s%s%s", "\x1B[31m", str, "\x1B[0m"); }


x86 assembly (clang, -O0):
<printRed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xed9(%rip),%rsi
lea    0xed8(%rip),%rcx
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printRed>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xee6(%rip),%rsi
lea    0xee5(%rip),%rcx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%s%s%s\00"
@.str.1 = [6 x i8] c"\1B[31m\00"
@.str.2 = [5 x i8] c"\1B[0m\00"
define void @printRed(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%s%s%s\00"
@.str.1 = [6 x i8] c"\1B[31m\00"
@.str.2 = [5 x i8] c"\1B[0m\00"
define void @printRed(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __sir_safefree(void **);
void _sir_safefree(void *p) { __sir_safefree(&p); }


x86 assembly (clang, -O0):
<_sir_safefree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <__sir_safefree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sir_safefree>:
push   %rax
mov    %rdi,(%rsp)
mov    %rsp,%rdi
call   1030 <__sir_safefree@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @_sir_safefree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @__sir_safefree(i8** %2)
ret void
}

LLVM IR (-O2):
define void @_sir_safefree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @__sir_safefree(i8** %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void xfree(void *mem) {
  if (mem != NULL) {
    free(mem);
  }
}


x86 assembly (clang, -O0):
<xfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <xfree+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xfree>:
test   %rdi,%rdi
je     111a <xfree+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @xfree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @xfree(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int sumDigit(int);
int isHarshad(int n) {
  int sum = sumDigit(n);
  if (!sum)
    return (0);
  return (n % sum == 0);
}


x86 assembly (clang, -O0):
<isHarshad>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1030 <sumDigit@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    113c <isHarshad+0x2c>
movl   $0x0,-0x4(%rbp)
jmp    1151 <isHarshad+0x41>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isHarshad>:
push   %rbx
mov    %edi,%ebx
call   1030 <sumDigit@plt>
test   %eax,%eax
je     112c <isHarshad+0x1c>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
xor    %eax,%eax
test   %edx,%edx
sete   %al
pop    %rbx
ret
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @isHarshad(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @sumDigit(i32 %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %10, label %9
9: ; preds = %1
store i32 0, i32* %2
br label %16
10: ; preds = %1
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
%14 = icmp eq i32 %13, 0
%15 = zext i1 %14 to i32
store i32 %15, i32* %2
br label %16
16: ; preds = %10, %9
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @isHarshad(i32 %0) {
%2 = tail call i32 @sumDigit(i32 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %8, label %4
4: ; preds = %1
%5 = srem i32 %0, %2
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
int square(int y) { return y * y; }


x86 assembly (clang, -O0):
<square>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<square>:
mov    %edi,%eax
imul   %edi,%eax
ret

LLVM IR (-O0):
define i32 @square(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @square(i32 %0) {
%2 = mul nsw i32 %0, %0
ret i32 %2
}
int dlclose(void *ptr) { return 0; }


x86 assembly (clang, -O0):
<dlclose>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dlclose>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dlclose(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @dlclose(i8* nocapture readnone %0) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int arc4random();
uint32_t arc4random_uniform(uint32_t upper) {
  if (upper == 0) {
    return arc4random();
  }
  uint32_t lower = -upper % upper;
  for (;;) {
    uint32_t value = arc4random();
    if (value >= lower)
      return value % upper;
  }
}


x86 assembly (clang, -O0):
<arc4random_uniform>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1134 <arc4random_uniform+0x24>
mov    $0x0,%al
call   1030 <arc4random@plt>
mov    %eax,-0x4(%rbp)
jmp    116a <arc4random_uniform+0x5a>
xor    %eax,%eax
sub    -0x8(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x0,%al
call   1030 <arc4random@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jl     1165 <arc4random_uniform+0x55>
mov    -0x10(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x4(%rbp)
jmp    116a <arc4random_uniform+0x5a>
jmp    1140 <arc4random_uniform+0x30>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arc4random_uniform>:
test   %edi,%edi
je     1132 <arc4random_uniform+0x22>
push   %rbx
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <arc4random@plt>
test   %eax,%eax
js     1120 <arc4random_uniform+0x10>
cltd
idiv   %ebx
mov    %edx,%eax
pop    %rbx
ret
xor    %eax,%eax
jmp    1030 <arc4random@plt>

LLVM IR (-O0):
define i32 @arc4random_uniform(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 (...) @arc4random()
store i32 %9, i32* %2
br label %25
10: ; preds = %1
%11 = load i32, i32* %3
%12 = sub nsw i32 0, %11
%13 = load i32, i32* %3
%14 = srem i32 %12, %13
store i32 %14, i32* %4
br label %15
15: ; preds = %24, %10
%16 = call i32 (...) @arc4random()
store i32 %16, i32* %5
%17 = load i32, i32* %5
%18 = load i32, i32* %4
%19 = icmp sge i32 %17, %18
br i1 %19, label %20, label %24
20: ; preds = %15
%21 = load i32, i32* %5
%22 = load i32, i32* %3
%23 = srem i32 %21, %22
store i32 %23, i32* %2
br label %25
24: ; preds = %15
br label %15
25: ; preds = %20, %8
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @arc4random_uniform(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @arc4random()
br label %10
5: ; preds = %1, %5
%6 = tail call i32 (...) @arc4random()
%7 = icmp sgt i32 %6, -1
br i1 %7, label %8, label %5
8: ; preds = %5
%9 = srem i32 %6, %0
br label %10
10: ; preds = %8, %3
%11 = phi i32 [ %4, %3 ], [ %9, %8 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ openat;
int main(int argc, char *argv[]) {
  (void)argc;
  (void)argv;
  (void)openat;
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@openat = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = load i32, i32* @openat
%9 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@openat = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
struct TennisGame {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ TennisGame_P1Score(struct TennisGame *);
int /*<<< orphan*/ TennisGame_P2Score(struct TennisGame *);
scalar_t__ strcmp(char const *, char *);
void TennisGame_WonPoint(struct TennisGame *game, const char *player) {
  if (strcmp(player, "player1") == 0)
    TennisGame_P1Score(game);
  else
    TennisGame_P2Score(game);
}


x86 assembly (clang, -O0):
<TennisGame_WonPoint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
jne    1168 <TennisGame_WonPoint+0x38>
mov    -0x8(%rbp),%rdi
call   1050 <TennisGame_P1Score@plt>
jmp    1171 <TennisGame_WonPoint+0x41>
mov    -0x8(%rbp),%rdi
call   1040 <TennisGame_P2Score@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TennisGame_WonPoint>:
push   %rbx
mov    %rsi,%rax
mov    %rdi,%rbx
lea    0xec2(%rip),%rsi
mov    %rax,%rdi
call   1030 <strcmp@plt>
mov    %rbx,%rdi
test   %rax,%rax
je     1154 <TennisGame_WonPoint+0x24>
pop    %rbx
jmp    1040 <TennisGame_P2Score@plt>
pop    %rbx
jmp    1050 <TennisGame_P1Score@plt>

LLVM IR (-O0):
%struct.TennisGame = type { i32 }
@.str = [8 x i8] c"player1\00"
define void @TennisGame_WonPoint(%struct.TennisGame* %0, i8* %1) {
%3 = alloca %struct.TennisGame*
%4 = alloca i8*
store %struct.TennisGame* %0, %struct.TennisGame** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i64 @strcmp(i8* %5, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%7 = icmp eq i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load %struct.TennisGame*, %struct.TennisGame** %3
%10 = call i32 @TennisGame_P1Score(%struct.TennisGame* %9)
br label %14
11: ; preds = %2
%12 = load %struct.TennisGame*, %struct.TennisGame** %3
%13 = call i32 @TennisGame_P2Score(%struct.TennisGame* %12)
br label %14
14: ; preds = %11, %8
ret void
}

LLVM IR (-O2):
%struct.TennisGame = type { i32 }
@.str = [8 x i8] c"player1\00"
define void @TennisGame_WonPoint(%struct.TennisGame* %0, i8* %1) {
%3 = tail call i64 @strcmp(i8* %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @TennisGame_P1Score(%struct.TennisGame* %0)
br label %9
7: ; preds = %2
%8 = tail call i32 @TennisGame_P2Score(%struct.TennisGame* %0)
br label %9
9: ; preds = %7, %5
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
void volatile_fetch_or_u32(uint32_t *dest, uint32_t val) {
  *((volatile uint32_t *)dest) |= val;
}


x86 assembly (clang, -O0):
<volatile_fetch_or_u32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<volatile_fetch_or_u32>:
mov    %esi,-0x4(%rsp)
mov    -0x4(%rsp),%eax
or     %eax,(%rdi)
ret

LLVM IR (-O0):
define void @volatile_fetch_or_u32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store volatile i32 %1, i32* %4
%5 = load volatile i32, i32* %4
%6 = load i32*, i32** %3
%7 = load volatile i32, i32* %6
%8 = or i32 %7, %5
store volatile i32 %8, i32* %6
ret void
}

LLVM IR (-O2):
define void @volatile_fetch_or_u32(i32* %0, i32 %1) {
%3 = alloca i32
store volatile i32 %1, i32* %3
%4 = load volatile i32, i32* %3
%5 = load volatile i32, i32* %0
%6 = or i32 %5, %4
store volatile i32 %6, i32* %0
ret void
}
/* Type definitions */
struct timespec {
  long tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_PROCESS_CPUTIME_ID;
scalar_t__ clock_gettime(int /*<<< orphan*/, struct timespec *);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
long get_cpu_time(void) {
  struct timespec time;
  if (clock_gettime(CLOCK_PROCESS_CPUTIME_ID, &time) < 0) {
    fprintf(stderr, "Failed to get CPU time!\n");
    exit(1);
  }
  return time.tv_nsec;
}


x86 assembly (clang, -O0):
<get_cpu_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea9(%rip),%rax
mov    (%rax),%edi
lea    -0x8(%rbp),%rsi
call   1030 <clock_gettime@plt>
cmp    $0x0,%rax
jge    1173 <get_cpu_time+0x43>
mov    0x2e7d(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cpu_time>:
push   %rax
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
mov    %rsp,%rsi
call   1030 <clock_gettime@plt>
test   %rax,%rax
js     114d <get_cpu_time+0x1d>
mov    (%rsp),%rax
pop    %rcx
ret
mov    0x2e84(%rip),%rax
mov    (%rax),%edi
lea    0xea3(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
%struct.timespec = type { i64 }
@CLOCK_PROCESS_CPUTIME_ID = global i32 0
@stderr = global i32 0
@.str = [25 x i8] c"Failed to get CPU time!\0A\00"
define i64 @get_cpu_time() {
%1 = alloca %struct.timespec
%2 = load i32, i32* @CLOCK_PROCESS_CPUTIME_ID
%3 = call i64 @clock_gettime(i32 %2, %struct.timespec* %1)
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %0
%6 = load i32, i32* @stderr
%7 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @exit(i32 1)
unreachable
9: ; preds = %0
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i32 0, i32 0
%11 = load i64, i64* %10
ret i64 %11
}

LLVM IR (-O2):
%struct.timespec = type { i64 }
@CLOCK_PROCESS_CPUTIME_ID = global i32 0
@stderr = global i32 0
@.str = [25 x i8] c"Failed to get CPU time!\0A\00"
define i64 @get_cpu_time() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_PROCESS_CPUTIME_ID
%4 = call i64 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %0
%7 = load i32, i32* @stderr
%8 = call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([25 x i8], [25 x i8]* @.str, i64 0, i64 0))
%9 = call i32 @exit(i32 1)
unreachable
10: ; preds = %0
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%12 = load i64, i64* %11
ret i64 %12
}
/* Variables and functions */
int /*<<< orphan*/ PIN_INT3_DriverIRQHandler();
__attribute__((weak)) void PIN_INT3_IRQHandler(void) {
  PIN_INT3_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<PIN_INT3_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PIN_INT3_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PIN_INT3_IRQHandler>:
xor    %eax,%eax
jmp    1030 <PIN_INT3_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @PIN_INT3_IRQHandler() {
%1 = call i32 (...) @PIN_INT3_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @PIN_INT3_IRQHandler() {
%1 = tail call i32 (...) @PIN_INT3_DriverIRQHandler()
ret void
}
/* Type definitions */
struct dev_puncher {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct dev_puncher *);
void dev_puncher_destroy(void *dev) {
  struct dev_puncher *puncher = dev;
  free(puncher);
}


x86 assembly (clang, -O0):
<dev_puncher_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dev_puncher_destroy>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.dev_puncher = type { i32 }
define void @dev_puncher_destroy(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.dev_puncher*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.dev_puncher*
store %struct.dev_puncher* %5, %struct.dev_puncher** %3
%6 = load %struct.dev_puncher*, %struct.dev_puncher** %3
%7 = call i32 @free(%struct.dev_puncher* %6)
ret void
}

LLVM IR (-O2):
%struct.dev_puncher = type { i32 }
define void @dev_puncher_destroy(i8* nocapture %0) {
%2 = bitcast i8* %0 to %struct.dev_puncher*
%3 = tail call i32 @free(%struct.dev_puncher* %2)
ret void
}
/* Variables and functions */
int next_utf8(char const *, int *);
int fn_ch_120(const char *text) {
  int pos = 0;
  if (next_utf8(text, &pos) == 120)
    return pos;
  return -1;
}


x86 assembly (clang, -O0):
<fn_ch_120>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
call   1030 <next_utf8@plt>
cmp    $0x78,%eax
jne    1144 <fn_ch_120+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114b <fn_ch_120+0x3b>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn_ch_120>:
push   %rax
movl   $0x0,0x4(%rsp)
lea    0x4(%rsp),%rsi
call   1030 <next_utf8@plt>
mov    %eax,%ecx
mov    $0xffffffff,%eax
cmp    $0x78,%ecx
jne    1133 <fn_ch_120+0x23>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fn_ch_120(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 0, i32* %4
%5 = load i8*, i8** %3
%6 = call i32 @next_utf8(i8* %5, i32* %4)
%7 = icmp eq i32 %6, 120
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, i32* %4
store i32 %9, i32* %2
br label %11
10: ; preds = %1
store i32 -1, i32* %2
br label %11
11: ; preds = %10, %8
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @fn_ch_120(i8* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = call i32 @next_utf8(i8* %0, i32* %2)
%5 = icmp eq i32 %4, 120
%6 = load i32, i32* %2
%7 = select i1 %5, i32 %6, i32 -1
ret i32 %7
}
void test_arith_floats() {}


x86 assembly (clang, -O0):
<test_arith_floats>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_arith_floats>:
ret

LLVM IR (-O0):
define void @test_arith_floats() {
ret void
}

LLVM IR (-O2):
define void @test_arith_floats() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int main(void) {
  int num_1 = 71;
  char num;
  num = (char)num_1;
  printf("Numero: %c\n", num);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x47,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %al,-0x5(%rbp)
lea    0xed4(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x47,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Numero: %c\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 71, i32* %1
%3 = load i32, i32* %1
%4 = trunc i32 %3 to i8
store i8 %4, i8* %2
%5 = load i8, i8* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"Numero: %c\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8 signext 71)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int strspn(char const *, char const *);
int main() {
  int len;
  const char str1[] = "ABCDEFG019874";
  const char str2[] = "ABCD";
  len = strspn(str1, str2);
  printf("Length of initial segment matching %d\n", len);
  return (0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    0xeca(%rip),%rax
mov    %rax,-0x16(%rbp)
mov    0xec8(%rip),%eax
mov    %eax,-0xe(%rbp)
mov    0xec2(%rip),%ax
mov    %ax,-0xa(%rbp)
mov    0xeba(%rip),%eax
mov    %eax,-0x1b(%rbp)
mov    0xeb5(%rip),%al
mov    %al,-0x17(%rbp)
lea    -0x16(%rbp),%rdi
lea    -0x1b(%rbp),%rsi
call   1040 <strspn@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xe99(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x4,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@__const.main.str1 = [14 x i8] c"ABCDEFG019874\00"
@__const.main.str2 = [5 x i8] c"ABCD\00"
@.str = [39 x i8] c"Length of initial segment matching %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca [14 x i8]
%4 = alloca [5 x i8]
store i32 0, i32* %1
%5 = bitcast [14 x i8]* %3 to i8*
%6 = bitcast [5 x i8]* %4 to i8*
%7 = getelementptr inbounds [14 x i8], [14 x i8]* %3, i64 0, i64 0
%8 = getelementptr inbounds [5 x i8], [5 x i8]* %4, i64 0, i64 0
%9 = call i32 @strspn(i8* %7, i8* %8)
store i32 %9, i32* %2
%10 = load i32, i32* %2
%11 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32 %10)
ret i32 0
}

LLVM IR (-O2):
@.str = [39 x i8] c"Length of initial segment matching %d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i32 4)
ret i32 0
}
/* Variables and functions */
int getpid();
int /*<<< orphan*/ gettaskcon();
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ sleep(int);
int main() {
  printf("pid: %d\n", getpid());
  gettaskcon();
  sleep(20);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%esi
lea    0xea1(%rip),%rdi
call   1040 <printf@plt>
mov    $0x0,%al
call   1060 <gettaskcon@plt>
mov    $0x14,%edi
call   1050 <sleep@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xeb1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
call   1060 <gettaskcon@plt>
mov    $0x14,%edi
call   1050 <sleep@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [9 x i8] c"pid: %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @getpid()
%3 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = call i32 (...) @gettaskcon()
%5 = call i32 @sleep(i32 20)
ret i32 0
}

LLVM IR (-O2):
@.str = [9 x i8] c"pid: %d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @getpid()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = tail call i32 (...) @gettaskcon()
%4 = tail call i32 @sleep(i32 20)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ clear_register(int);
int prepare_register(int reg) {
  if (reg >= 'A' && reg <= 'Z') {
    reg += 'a' - 'A';
  } else {
    clear_register(reg);
  }
  return reg;
}


x86 assembly (clang, -O0):
<prepare_register>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x41,-0x4(%rbp)
jl     113d <prepare_register+0x2d>
cmpl   $0x5a,-0x4(%rbp)
jg     113d <prepare_register+0x2d>
mov    -0x4(%rbp),%eax
add    $0x20,%eax
mov    %eax,-0x4(%rbp)
jmp    1145 <prepare_register+0x35>
mov    -0x4(%rbp),%edi
call   1030 <clear_register@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prepare_register>:
push   %rbx
mov    %edi,%ebx
lea    -0x41(%rbx),%eax
cmp    $0x19,%eax
ja     1120 <prepare_register+0x10>
add    $0x20,%ebx
jmp    1127 <prepare_register+0x17>
mov    %ebx,%edi
call   1030 <clear_register@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @prepare_register(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 65
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 90
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 32
store i32 %10, i32* %2
br label %14
11: ; preds = %5, %1
%12 = load i32, i32* %2
%13 = call i32 @clear_register(i32 %12)
br label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @prepare_register(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = add nuw nsw i32 %0, 32
br label %8
6: ; preds = %1
%7 = tail call i32 @clear_register(i32 %0)
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %5, %4 ], [ %0, %6 ]
ret i32 %9
}
void SPI_SD_EnableRxInt(void) {}


x86 assembly (clang, -O0):
<SPI_SD_EnableRxInt>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_SD_EnableRxInt>:
ret

LLVM IR (-O0):
define void @SPI_SD_EnableRxInt() {
ret void
}

LLVM IR (-O2):
define void @SPI_SD_EnableRxInt() {
ret void
}
/* Type definitions */
struct string_s {
  int dummy;
};

/* Variables and functions */
struct string_s *string_ncreate(char const *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
struct string_s *string_create(const char *cstr) {
  if (!cstr)
    return string_ncreate(NULL, 0);
  return string_ncreate(cstr, strlen(cstr));
}


x86 assembly (clang, -O0):
<string_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    114b <string_create+0x2b>
xor    %eax,%eax
mov    %eax,%edi
xor    %esi,%esi
call   1040 <string_ncreate@plt>
mov    %rax,-0x8(%rbp)
jmp    116b <string_create+0x4b>
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x18(%rbp),%rdi
mov    %eax,%esi
call   1040 <string_ncreate@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_create>:
test   %rdi,%rdi
je     1139 <string_create+0x19>
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1040 <string_ncreate@plt>
xor    %edi,%edi
xor    %esi,%esi
jmp    1040 <string_ncreate@plt>

LLVM IR (-O0):
%struct.string_s = type { i32 }
define %struct.string_s* @string_create(i8* %0) {
%2 = alloca %struct.string_s*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call %struct.string_s* @string_ncreate(i8* null, i32 0)
store %struct.string_s* %7, %struct.string_s** %2
br label %13
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = load i8*, i8** %3
%11 = call i32 @strlen(i8* %10)
%12 = call %struct.string_s* @string_ncreate(i8* %9, i32 %11)
store %struct.string_s* %12, %struct.string_s** %2
br label %13
13: ; preds = %8, %6
%14 = load %struct.string_s*, %struct.string_s** %2
ret %struct.string_s* %14
}

LLVM IR (-O2):
%struct.string_s = type { i32 }
define %struct.string_s* @string_create(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call %struct.string_s* @string_ncreate(i8* null, i32 0)
br label %8
5: ; preds = %1
%6 = tail call i32 @strlen(i8* %0)
%7 = tail call %struct.string_s* @string_ncreate(i8* %0, i32 %6)
br label %8
8: ; preds = %5, %3
%9 = phi %struct.string_s* [ %7, %5 ], [ %4, %3 ]
ret %struct.string_s* %9
}
const char *returns_c_string(void) { return "returned_c_string"; }


x86 assembly (clang, -O0):
<returns_c_string>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<returns_c_string>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [18 x i8] c"returned_c_string\00"
define i8* @returns_c_string() {
ret i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [18 x i8] c"returned_c_string\00"
define i8* @returns_c_string() {
ret i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0)
}
int d_blt_cr1(double a1) { return (__builtin_isless(100, a1)); }


x86 assembly (clang, -O0):
<d_blt_cr1>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
ucomisd %xmm1,%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_blt_cr1>:
xor    %eax,%eax
ucomisd 0xef6(%rip),%xmm0
seta   %al
ret

LLVM IR (-O0):
define i32 @d_blt_cr1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double 1.000000e+02, %3
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @d_blt_cr1(double %0) {
%2 = fcmp ogt double %0, 1.000000e+02
%3 = zext i1 %2 to i32
ret i32 %3
}
struct s3c2410_adc *s3c2410_get_base_adc(void) {
  return (struct s3c2410_adc *)0x58000000;
}


x86 assembly (clang, -O0):
<s3c2410_get_base_adc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x58000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<s3c2410_get_base_adc>:
mov    $0x58000000,%eax
ret

LLVM IR (-O0):
%struct.s3c2410_adc = type opaque
define %struct.s3c2410_adc* @s3c2410_get_base_adc() {
ret %struct.s3c2410_adc* inttoptr (i64 1476395008 to %struct.s3c2410_adc*)
}

LLVM IR (-O2):
%struct.s3c2410_adc = type opaque
define %struct.s3c2410_adc* @s3c2410_get_base_adc() {
ret %struct.s3c2410_adc* inttoptr (i64 1476395008 to %struct.s3c2410_adc*)
}
/* Variables and functions */
int itimer_start(int, int /*<<< orphan*/);
int itimer_stop(int fd) { return itimer_start(fd, 0); }


x86 assembly (clang, -O0):
<itimer_stop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %esi,%esi
call   1030 <itimer_start@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<itimer_stop>:
xor    %esi,%esi
jmp    1030 <itimer_start@plt>

LLVM IR (-O0):
define i32 @itimer_stop(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @itimer_start(i32 %3, i32 0)
ret i32 %4
}

LLVM IR (-O2):
define i32 @itimer_stop(i32 %0) {
%2 = tail call i32 @itimer_start(i32 %0, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ print_mulitiplication_table();
int main() {
  print_mulitiplication_table();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <print_mulitiplication_table@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <print_mulitiplication_table@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @print_mulitiplication_table()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @print_mulitiplication_table()
ret i32 0
}
void sections_exit() { ("sections_exit"); }


x86 assembly (clang, -O0):
<sections_exit>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sections_exit>:
ret

LLVM IR (-O0):
@.str = [14 x i8] c"sections_exit\00"
define void @sections_exit() {
ret void
}

LLVM IR (-O2):
define void @sections_exit() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
void *malloc(size_t);
int /*<<< orphan*/ stderr;
void *ut_malloc(size_t sz) {
  void *p;
  if ((p = malloc(sz)) == NULL) {
    fprintf(stderr, "ERROR: could not allocate memory.\n");
    exit(EXIT_FAILURE);
  }
  return p;
}


x86 assembly (clang, -O0):
<ut_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1176 <ut_malloc+0x46>
mov    0x2e86(%rip),%rax
mov    (%rax),%edi
lea    0xe9d(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e69(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ut_malloc>:
push   %rax
call   1040 <malloc@plt>
test   %rax,%rax
je     113d <ut_malloc+0xd>
pop    %rcx
ret
mov    0x2e9c(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e7f(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [35 x i8] c"ERROR: could not allocate memory.\0A\00"
@EXIT_FAILURE = global i32 0
define i8* @ut_malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i32, i32* @stderr
%9 = call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%10 = load i32, i32* @EXIT_FAILURE
%11 = call i32 @exit(i32 %10)
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [35 x i8] c"ERROR: could not allocate memory.\0A\00"
@EXIT_FAILURE = global i32 0
define noalias i8* @ut_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* @EXIT_FAILURE
%8 = tail call i32 @exit(i32 %7)
unreachable
9: ; preds = %1
ret i8* %2
}
int multi(int op1, int op2) { return op1 * op2; }


x86 assembly (clang, -O0):
<multi>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<multi>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @multi(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @multi(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void USBHostLPMResume(uint32_t ui32Base) {
  ASSERT(ui32Base == 0x40050000);
  (*((volatile uint8_t *)(ui32Base + 0x00000362))) |= 0x00000002;
}


x86 assembly (clang, -O0):
<USBHostLPMResume>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x40050000,-0x4(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x362,%eax
cltq
mov    (%rax),%ecx
or     $0x2,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostLPMResume>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x40050000,%ebx
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebx,%rax
orl    $0x2,0x362(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @USBHostLPMResume(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1074069504
%5 = zext i1 %4 to i32
%6 = call i32 @ASSERT(i32 %5)
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 866
%9 = sext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
%11 = load volatile i32, i32* %10
%12 = or i32 %11, 2
store volatile i32 %12, i32* %10
ret void
}

LLVM IR (-O2):
define void @USBHostLPMResume(i32 %0) {
%2 = icmp eq i32 %0, 1074069504
%3 = zext i1 %2 to i32
%4 = tail call i32 @ASSERT(i32 %3)
%5 = add nsw i32 %0, 866
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
%9 = or i32 %8, 2
store volatile i32 %9, i32* %7
ret void
}
float InvSqrt(float x) {
  float xhalf = 0.5f * x;
  int i = *(int *)&x;
  i = 0x5f3759d5 - (i >> 1);
  x = *(float *)&i;
  x = x * (1.5f - xhalf * x * x);
  return x;
}


x86 assembly (clang, -O0):
<InvSqrt>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xef3(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
sar    $0x1,%ecx
mov    $0x5f3759d5,%eax
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
mulss  -0x4(%rbp),%xmm1
movss  -0x4(%rbp),%xmm2
movd   %xmm1,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm1
mulss  %xmm2,%xmm1
movss  0xe98(%rip),%xmm2
addss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<InvSqrt>:
movd   %xmm0,%eax
sar    %eax
mov    $0x5f3759d5,%ecx
sub    %eax,%ecx
movd   %ecx,%xmm1
mulss  0xee7(%rip),%xmm0
mulss  %xmm1,%xmm0
mulss  %xmm1,%xmm0
addss  0xedb(%rip),%xmm0
mulss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @InvSqrt(float %0) {
%2 = alloca float
%3 = alloca float
%4 = alloca i32
store float %0, float* %2
%5 = load float, float* %2
%6 = fmul float 5.000000e-01, %5
store float %6, float* %3
%7 = bitcast float* %2 to i32*
%8 = load i32, i32* %7
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = ashr i32 %9, 1
%11 = sub nsw i32 1597462997, %10
store i32 %11, i32* %4
%12 = bitcast i32* %4 to float*
%13 = load float, float* %12
store float %13, float* %2
%14 = load float, float* %2
%15 = load float, float* %3
%16 = load float, float* %2
%17 = fmul float %15, %16
%18 = load float, float* %2
%19 = fneg float %17
%20 = call float @llvm.fmuladd.f32(float %19, float %18, float 1.500000e+00)
%21 = fmul float %14, %20
store float %21, float* %2
%22 = load float, float* %2
ret float %22
}

LLVM IR (-O2):
define float @InvSqrt(float %0) {
%2 = bitcast float %0 to i32
%3 = ashr i32 %2, 1
%4 = sub nsw i32 1597462997, %3
%5 = bitcast i32 %4 to float
%6 = fmul float %0, -5.000000e-01
%7 = fmul float %6, %5
%8 = tail call float @llvm.fmuladd.f32(float %7, float %5, float 1.500000e+00)
%9 = fmul float %8, %5
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ __s5p_sleep(int);
void mdelay(int ms) { __s5p_sleep(ms); }


x86 assembly (clang, -O0):
<mdelay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__s5p_sleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdelay>:
jmp    1030 <__s5p_sleep@plt>

LLVM IR (-O0):
define void @mdelay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__s5p_sleep(i32 %3)
ret void
}

LLVM IR (-O2):
define void @mdelay(i32 %0) {
%2 = tail call i32 @__s5p_sleep(i32 %0)
ret void
}
void HariMain(void) {
  for (;;) {
  }
}


x86 assembly (clang, -O0):
<HariMain>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <HariMain+0x9>
jmp    1109 <HariMain+0x9>

x86 assembly (clang, -O2):
<HariMain>:
jmp    1100 <HariMain>

LLVM IR (-O0):
define void @HariMain() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @HariMain() {
br label %1
1: ; preds = %1, %0
br label %1
}
long iso_732(c)
char *c;
{
  return (((long)(c[0] & 0xff) << 24) | (((long)c[1] & 0xff) << 16) |
          (((long)c[2] & 0xff) << 8) | ((long)c[3] & 0xff));
}


x86 assembly (clang, -O0):
<iso_732>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
and    $0xff,%eax
cltq
shl    $0x18,%rax
mov    -0x8(%rbp),%rcx
movsbq 0x1(%rcx),%rcx
and    $0xff,%rcx
shl    $0x10,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
movsbq 0x2(%rcx),%rcx
and    $0xff,%rcx
shl    $0x8,%rcx
or     %rcx,%rax
mov    -0x8(%rbp),%rcx
movsbq 0x3(%rcx),%rcx
and    $0xff,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<iso_732>:
mov    (%rdi),%eax
shl    $0x20,%rax
bswap  %rax
ret

LLVM IR (-O0):
define i64 @iso_732(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = and i32 %6, 255
%8 = sext i32 %7 to i64
%9 = shl i64 %8, 24
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = load i8, i8* %11
%13 = sext i8 %12 to i64
%14 = and i64 %13, 255
%15 = shl i64 %14, 16
%16 = or i64 %9, %15
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i64 2
%19 = load i8, i8* %18
%20 = sext i8 %19 to i64
%21 = and i64 %20, 255
%22 = shl i64 %21, 8
%23 = or i64 %16, %22
%24 = load i8*, i8** %2
%25 = getelementptr inbounds i8, i8* %24, i64 3
%26 = load i8, i8* %25
%27 = sext i8 %26 to i64
%28 = and i64 %27, 255
%29 = or i64 %23, %28
ret i64 %29
}

LLVM IR (-O2):
define i64 @iso_732(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i64
%4 = shl nuw nsw i64 %3, 24
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i64
%8 = shl nuw nsw i64 %7, 16
%9 = or i64 %8, %4
%10 = getelementptr inbounds i8, i8* %0, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i64
%13 = shl nuw nsw i64 %12, 8
%14 = or i64 %9, %13
%15 = getelementptr inbounds i8, i8* %0, i64 3
%16 = load i8, i8* %15
%17 = zext i8 %16 to i64
%18 = or i64 %14, %17
ret i64 %18
}
int base64_enc_len(int plainLen) {
  int n = plainLen;
  return (n + 2 - ((n + 2) % 3)) / 3 * 4;
}


x86 assembly (clang, -O0):
<base64_enc_len>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
mov    -0xc(%rbp),%eax
sub    %edx,%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
shl    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<base64_enc_len>:
add    $0x2,%edi
movslq %edi,%rax
imul   $0x55555556,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
shr    $0x20,%rax
add    %ecx,%eax
shl    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @base64_enc_len(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 2
%7 = load i32, i32* %3
%8 = add nsw i32 %7, 2
%9 = srem i32 %8, 3
%10 = sub nsw i32 %6, %9
%11 = sdiv i32 %10, 3
%12 = mul nsw i32 %11, 4
ret i32 %12
}

LLVM IR (-O2):
define i32 @base64_enc_len(i32 %0) {
%2 = add nsw i32 %0, 2
%3 = sdiv i32 %2, 3
%4 = shl nsw i32 %3, 2
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ __stop_kmc_server(char **);
int check_kmod(char *);
int /*<<< orphan*/ perror(char *);
void stop_kmc_server(char *argv[]) {
  int status;
  status = check_kmod("kmemcache");
  switch (status) {
  case 1:
    __stop_kmc_server(argv);
    break;
  case -1:
  default:
    perror("stop_kmc_server");
  case 0:
    break;
  }
}


x86 assembly (clang, -O0):
<stop_kmc_server>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xebd(%rip),%rdi
call   1030 <check_kmod@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
sub    $0xffffffff,%eax
je     118e <stop_kmc_server+0x5e>
jmp    115f <stop_kmc_server+0x2f>
mov    -0x10(%rbp),%eax
test   %eax,%eax
je     119f <stop_kmc_server+0x6f>
jmp    116f <stop_kmc_server+0x3f>
mov    -0x10(%rbp),%eax
sub    $0x1,%eax
jne    1193 <stop_kmc_server+0x63>
jmp    1180 <stop_kmc_server+0x50>
mov    -0x8(%rbp),%rdi
call   1050 <__stop_kmc_server@plt>
jmp    11a4 <stop_kmc_server+0x74>
jmp    1193 <stop_kmc_server+0x63>
lea    0xe70(%rip),%rdi
call   1040 <perror@plt>
jmp    11a4 <stop_kmc_server+0x74>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stop_kmc_server>:
push   %rbx
mov    %rdi,%rbx
lea    0xec5(%rip),%rdi
call   1030 <check_kmod@plt>
test   %eax,%eax
je     1152 <stop_kmc_server+0x22>
cmp    $0x1,%eax
jne    1154 <stop_kmc_server+0x24>
mov    %rbx,%rdi
pop    %rbx
jmp    1050 <__stop_kmc_server@plt>
pop    %rbx
ret
lea    0xeaf(%rip),%rdi
pop    %rbx
jmp    1040 <perror@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"kmemcache\00"
@.str.1 = [16 x i8] c"stop_kmc_server\00"
define void @stop_kmc_server(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
%4 = call i32 @check_kmod(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
store i32 %4, i32* %3
%5 = load i32, i32* %3
switch i32 %5, label %10 [
i32 1, label %6
i32 -1, label %9
i32 0, label %12
]
6: ; preds = %1
%7 = load i8**, i8*** %2
%8 = call i32 @__stop_kmc_server(i8** %7)
br label %13
9: ; preds = %1
br label %10
10: ; preds = %1, %9
%11 = call i32 @perror(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
br label %12
12: ; preds = %1, %10
br label %13
13: ; preds = %12, %6
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"kmemcache\00"
@.str.1 = [16 x i8] c"stop_kmc_server\00"
define void @stop_kmc_server(i8** %0) {
%2 = tail call i32 @check_kmod(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0))
switch i32 %2, label %5 [
i32 1, label %3
i32 0, label %7
]
3: ; preds = %1
%4 = tail call i32 @__stop_kmc_server(i8** %0)
br label %7
5: ; preds = %1
%6 = tail call i32 @perror(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
br label %7
7: ; preds = %1, %5, %3
ret void
}