double soft_threshold_update(int j, double *beta, double *g, double lambda,
                             double alpha) {
  double d, u, v;
  d = 1 + lambda * (1 - alpha);
  u = g[j] + beta[j];
  v = (u < 0 ? -u : u) - lambda * alpha;
  return (v < 0) ? 0 : (u < 0) ? -v / d : v / d;
}


x86 assembly (clang, -O0):
<soft_threshold_update>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movsd  %xmm0,-0x20(%rbp)
movsd  %xmm1,-0x28(%rbp)
movsd  -0x20(%rbp),%xmm0
movsd  0xeda(%rip),%xmm1
subsd  -0x28(%rbp),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xec9(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x30(%rbp)
mov    -0x18(%rbp),%rax
movslq -0x4(%rbp),%rcx
movsd  (%rax,%rcx,8),%xmm0
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
addsd  (%rax,%rcx,8),%xmm0
movsd  %xmm0,-0x38(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x38(%rbp),%xmm0
jbe    1193 <soft_threshold_update+0x93>
movsd  -0x38(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x48(%rbp)
jmp    119d <soft_threshold_update+0x9d>
movsd  -0x38(%rbp),%xmm0
movsd  %xmm0,-0x48(%rbp)
movsd  -0x48(%rbp),%xmm1
movsd  -0x20(%rbp),%xmm0
movsd  -0x28(%rbp),%xmm2
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x40(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x40(%rbp),%xmm0
jbe    11eb <soft_threshold_update+0xeb>
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x50(%rbp)
jmp    123d <soft_threshold_update+0x13d>
xorps  %xmm0,%xmm0
ucomisd -0x38(%rbp),%xmm0
jbe    1224 <soft_threshold_update+0x124>
movsd  -0x40(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
divsd  -0x30(%rbp),%xmm0
movsd  %xmm0,-0x58(%rbp)
jmp    1233 <soft_threshold_update+0x133>
movsd  -0x40(%rbp),%xmm0
divsd  -0x30(%rbp),%xmm0
movsd  %xmm0,-0x58(%rbp)
movsd  -0x58(%rbp),%xmm0
movsd  %xmm0,-0x50(%rbp)
movsd  -0x50(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<soft_threshold_update>:
movslq %edi,%rax
movsd  (%rdx,%rax,8),%xmm4
addsd  (%rsi,%rax,8),%xmm4
movapd 0xefb(%rip),%xmm5
xorpd  %xmm4,%xmm5
xorpd  %xmm2,%xmm2
movapd %xmm4,%xmm3
cmpltsd %xmm2,%xmm3
andpd  %xmm3,%xmm5
andnpd %xmm4,%xmm3
orpd   %xmm5,%xmm3
movapd %xmm0,%xmm5
mulsd  %xmm1,%xmm5
subsd  %xmm5,%xmm3
ucomisd %xmm3,%xmm2
ja     1176 <soft_threshold_update+0x76>
movsd  0xeb4(%rip),%xmm2
movapd %xmm2,%xmm5
subsd  %xmm1,%xmm5
mulsd  %xmm5,%xmm0
addsd  %xmm2,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm4,%xmm1
jbe    116e <soft_threshold_update+0x6e>
xorpd  0xea2(%rip),%xmm3
divsd  %xmm0,%xmm3
movapd %xmm3,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @soft_threshold_update(i32 %0, double* %1, double* %2, double %3, double %4) {
%6 = alloca i32
%7 = alloca double*
%8 = alloca double*
%9 = alloca double
%10 = alloca double
%11 = alloca double
%12 = alloca double
%13 = alloca double
store i32 %0, i32* %6
store double* %1, double** %7
store double* %2, double** %8
store double %3, double* %9
store double %4, double* %10
%14 = load double, double* %9
%15 = load double, double* %10
%16 = fsub double 1.000000e+00, %15
%17 = call double @llvm.fmuladd.f64(double %14, double %16, double 1.000000e+00)
store double %17, double* %11
%18 = load double*, double** %8
%19 = load i32, i32* %6
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds double, double* %18, i64 %20
%22 = load double, double* %21
%23 = load double*, double** %7
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds double, double* %23, i64 %25
%27 = load double, double* %26
%28 = fadd double %22, %27
store double %28, double* %12
%29 = load double, double* %12
%30 = fcmp olt double %29, 0.000000e+00
br i1 %30, label %31, label %34
31: ; preds = %5
%32 = load double, double* %12
%33 = fneg double %32
br label %36
34: ; preds = %5
%35 = load double, double* %12
br label %36
36: ; preds = %34, %31
%37 = phi double [ %33, %31 ], [ %35, %34 ]
%38 = load double, double* %9
%39 = load double, double* %10
%40 = fneg double %38
%41 = call double @llvm.fmuladd.f64(double %40, double %39, double %37)
store double %41, double* %13
%42 = load double, double* %13
%43 = fcmp olt double %42, 0.000000e+00
br i1 %43, label %44, label %45
44: ; preds = %36
br label %59
45: ; preds = %36
%46 = load double, double* %12
%47 = fcmp olt double %46, 0.000000e+00
br i1 %47, label %48, label %53
48: ; preds = %45
%49 = load double, double* %13
%50 = fneg double %49
%51 = load double, double* %11
%52 = fdiv double %50, %51
br label %57
53: ; preds = %45
%54 = load double, double* %13
%55 = load double, double* %11
%56 = fdiv double %54, %55
br label %57
57: ; preds = %53, %48
%58 = phi double [ %52, %48 ], [ %56, %53 ]
br label %59
59: ; preds = %57, %44
%60 = phi double [ 0.000000e+00, %44 ], [ %58, %57 ]
ret double %60
}

LLVM IR (-O2):
define double @soft_threshold_update(i32 %0, double* nocapture %1, double* nocapture %2, double %3, double %4) {
%6 = fsub double 1.000000e+00, %4
%7 = tail call double @llvm.fmuladd.f64(double %3, double %6, double 1.000000e+00)
%8 = sext i32 %0 to i64
%9 = getelementptr inbounds double, double* %2, i64 %8
%10 = load double, double* %9
%11 = getelementptr inbounds double, double* %1, i64 %8
%12 = load double, double* %11
%13 = fadd double %10, %12
%14 = fcmp olt double %13, 0.000000e+00
%15 = fneg double %13
%16 = select i1 %14, double %15, double %13
%17 = fneg double %3
%18 = tail call double @llvm.fmuladd.f64(double %17, double %4, double %16)
%19 = fcmp olt double %18, 0.000000e+00
br i1 %19, label %26, label %20
20: ; preds = %5
br i1 %14, label %21, label %24
21: ; preds = %20
%22 = fneg double %18
%23 = fdiv double %22, %7
br label %26
24: ; preds = %20
%25 = fdiv double %18, %7
br label %26
26: ; preds = %21, %24, %5
%27 = phi double [ 0.000000e+00, %5 ], [ %23, %21 ], [ %25, %24 ]
ret double %27
}