xunge/DecIR huggingface dataset:
/* Variables and functions */
int sscanf(char *, char *, char *);
size_t strlen(char *);
size_t log_page(unsigned char *data, size_t length, char *buf, size_t buflen) {
  if (sscanf((char *)data, "%*s %1024s", buf) == 1)
    return strlen(buf);
  return 0;
}


x86 assembly (clang, -O0):
<log_page>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rdx
lea    0xeb9(%rip),%rsi
call   1040 <sscanf@plt>
cmp    $0x1,%eax
jne    1167 <log_page+0x47>
mov    -0x20(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x8(%rbp)
jmp    116f <log_page+0x4f>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_page>:
push   %rbx
mov    %rdx,%rbx
lea    0xed5(%rip),%rsi
call   1040 <sscanf@plt>
cmp    $0x1,%eax
jne    113e <log_page+0x1e>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <strlen@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [11 x i8] c"%*s %1024s\00"
define i64 @log_page(i8* %0, i64 %1, i8* %2, i64 %3) {
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i64
store i8* %0, i8** %6
store i64 %1, i64* %7
store i8* %2, i8** %8
store i64 %3, i64* %9
%10 = load i8*, i8** %6
%11 = load i8*, i8** %8
%12 = call i32 @sscanf(i8* %10, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %11)
%13 = icmp eq i32 %12, 1
br i1 %13, label %14, label %17
14: ; preds = %4
%15 = load i8*, i8** %8
%16 = call i64 @strlen(i8* %15)
store i64 %16, i64* %5
br label %18
17: ; preds = %4
store i64 0, i64* %5
br label %18
18: ; preds = %17, %14
%19 = load i64, i64* %5
ret i64 %19
}

LLVM IR (-O2):
@.str = [11 x i8] c"%*s %1024s\00"
define i64 @log_page(i8* nocapture %0, i64 %1, i8* %2, i64 %3) {
%5 = tail call i32 @sscanf(i8* %0, i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8* %2)
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = tail call i64 @strlen(i8* dereferenceable(1) %2)
br label %9
9: ; preds = %4, %7
%10 = phi i64 [ %8, %7 ], [ 0, %4 ]
ret i64 %10
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void ADCSequenceDMAEnable(uint32_t ui32Base, uint32_t ui32SequenceNum) {
  ASSERT((ui32Base == 0x40038000) || (ui32Base == 0x40039000));
  ASSERT(ui32SequenceNum < 4);
  (*((volatile uint32_t *)(ui32Base + 0x00000000))) |= 0x100 << ui32SequenceNum;
}


x86 assembly (clang, -O0):
<ADCSequenceDMAEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x40038000,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     113d <ADCSequenceDMAEnable+0x2d>
cmpl   $0x40039000,-0x4(%rbp)
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
cmpl   $0x4,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x8(%rbp),%ecx
mov    $0x100,%edx
shl    %cl,%edx
mov    -0x4(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCSequenceDMAEnable>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40038000,%eax
sete   %dil
call   1030 <ASSERT@plt>
xor    %edi,%edi
cmp    $0x4,%ebx
setl   %dil
call   1030 <ASSERT@plt>
mov    $0x100,%eax
mov    %ebx,%ecx
shl    %cl,%eax
movslq %ebp,%rcx
or     %eax,(%rcx)
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define void @ADCSequenceDMAEnable(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1073971200
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, 1073975296
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
%13 = call i32 @ASSERT(i32 %12)
%14 = load i32, i32* %4
%15 = icmp slt i32 %14, 4
%16 = zext i1 %15 to i32
%17 = call i32 @ASSERT(i32 %16)
%18 = load i32, i32* %4
%19 = shl i32 256, %18
%20 = load i32, i32* %3
%21 = add nsw i32 %20, 0
%22 = sext i32 %21 to i64
%23 = inttoptr i64 %22 to i32*
%24 = load volatile i32, i32* %23
%25 = or i32 %24, %19
store volatile i32 %25, i32* %23
ret void
}

LLVM IR (-O2):
define void @ADCSequenceDMAEnable(i32 %0, i32 %1) {
%3 = and i32 %0, -4097
%4 = icmp eq i32 %3, 1073971200
%5 = zext i1 %4 to i32
%6 = tail call i32 @ASSERT(i32 %5)
%7 = icmp slt i32 %1, 4
%8 = zext i1 %7 to i32
%9 = tail call i32 @ASSERT(i32 %8)
%10 = shl i32 256, %1
%11 = sext i32 %0 to i64
%12 = inttoptr i64 %11 to i32*
%13 = load volatile i32, i32* %12
%14 = or i32 %13, %10
store volatile i32 %14, i32* %12
ret void
}
int test_imm_2Auint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x2A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_2Auint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x2a,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_2Auint64_lowword_reg>:
test   $0x2a,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_2Auint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 42
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_2Auint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 42
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ do_prime();
int /*<<< orphan*/ do_prime_hi();
int /*<<< orphan*/ getchar();
int /*<<< orphan*/ putchar(char);
int main(void) {
  int i;
  for (i = 0; i < 3; i++)
    do_prime();
  putchar('\n');
  getchar();
  for (i = 0; i < 3; i++)
    do_prime_hi();
  putchar('\n');
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    1175 <main+0x35>
mov    $0x0,%al
call   1060 <do_prime@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1156 <main+0x16>
mov    $0xa,%edi
call   1030 <putchar@plt>
mov    $0x0,%al
call   1050 <getchar@plt>
movl   $0x0,-0x8(%rbp)
cmpl   $0x3,-0x8(%rbp)
jge    11ac <main+0x6c>
mov    $0x0,%al
call   1040 <do_prime_hi@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    118d <main+0x4d>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <do_prime@plt>
xor    %eax,%eax
call   1060 <do_prime@plt>
xor    %eax,%eax
call   1060 <do_prime@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1050 <getchar@plt>
xor    %eax,%eax
call   1040 <do_prime_hi@plt>
xor    %eax,%eax
call   1040 <do_prime_hi@plt>
xor    %eax,%eax
call   1040 <do_prime_hi@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %8, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 3
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 (...) @do_prime()
br label %8
8: ; preds = %6
%9 = load i32, i32* %2
%10 = add nsw i32 %9, 1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
%12 = call i32 @putchar(i8 signext 10)
%13 = call i32 (...) @getchar()
store i32 0, i32* %2
br label %14
14: ; preds = %19, %11
%15 = load i32, i32* %2
%16 = icmp slt i32 %15, 3
br i1 %16, label %17, label %22
17: ; preds = %14
%18 = call i32 (...) @do_prime_hi()
br label %19
19: ; preds = %17
%20 = load i32, i32* %2
%21 = add nsw i32 %20, 1
store i32 %21, i32* %2
br label %14
22: ; preds = %14
%23 = call i32 @putchar(i8 signext 10)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @do_prime()
%2 = tail call i32 (...) @do_prime()
%3 = tail call i32 (...) @do_prime()
%4 = tail call i32 @putchar(i8 signext 10)
%5 = tail call i32 (...) @getchar()
%6 = tail call i32 (...) @do_prime_hi()
%7 = tail call i32 (...) @do_prime_hi()
%8 = tail call i32 (...) @do_prime_hi()
%9 = tail call i32 @putchar(i8 signext 10)
ret i32 0
}
int test_mul3div4(int x) { return 3 * x / 4; }


x86 assembly (clang, -O0):
<test_mul3div4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x3,-0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mul3div4>:
lea    (%rdi,%rdi,2),%ecx
lea    (%rdi,%rdi,2),%eax
add    $0x3,%eax
test   %ecx,%ecx
cmovns %ecx,%eax
sar    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @test_mul3div4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 3, %3
%5 = sdiv i32 %4, 4
ret i32 %5
}

LLVM IR (-O2):
define i32 @test_mul3div4(i32 %0) {
%2 = mul nsw i32 %0, 3
%3 = sdiv i32 %2, 4
ret i32 %3
}
/* Variables and functions */
void *calloc(size_t, size_t);
int /*<<< orphan*/ pdf_fatal(char *);
void *pdf_calloc(size_t nmemb, size_t size) {
  void *m = calloc(nmemb, size);
  if (!m)
    pdf_fatal("failed to allocate memory\n");
  return (m);
}


x86 assembly (clang, -O0):
<pdf_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <calloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1158 <pdf_calloc+0x38>
lea    0xead(%rip),%rdi
call   1040 <pdf_fatal@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pdf_calloc>:
push   %rbx
call   1030 <calloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <pdf_calloc+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <pdf_fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"failed to allocate memory\0A\00"
define i8* @pdf_calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
%7 = load i64, i64* %4
%8 = call i8* @calloc(i64 %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %2
%12 = call i32 @pdf_fatal(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
@.str = [27 x i8] c"failed to allocate memory\0A\00"
define noalias i8* @pdf_calloc(i64 %0, i64 %1) {
%3 = tail call i8* @calloc(i64 %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @pdf_fatal(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ EX_OSERR;
int /*<<< orphan*/ pfpanic(char *, unsigned short, unsigned short, char const *,
                           char const *, int, int, int /*<<< orphan*/);
void __pfpanic_malloc(unsigned short _syslog, unsigned short _verbose,
                      const char *_function_name, const char *_file_name,
                      int _line_number, int _errno) {
  pfpanic("Error occurred on malloc() call", _syslog, _verbose, _function_name,
          _file_name, _line_number, _errno, EX_OSERR);
}


x86 assembly (clang, -O0):
<__pfpanic_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %si,%ax
mov    %di,%si
mov    %si,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
mov    -0x2(%rbp),%si
mov    -0x4(%rbp),%dx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    -0x1c(%rbp),%r9d
mov    -0x20(%rbp),%r10d
mov    0x2e8b(%rip),%rax
mov    (%rax),%eax
lea    0xea2(%rip),%rdi
movzwl %si,%esi
movzwl %dx,%edx
mov    %r10d,(%rsp)
mov    %eax,0x8(%rsp)
call   1030 <pfpanic@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__pfpanic_malloc>:
push   %rax
mov    %r9d,%r10d
mov    %r8d,%r9d
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %esi,%edx
mov    %edi,%esi
mov    0x2eb8(%rip),%rdi
mov    (%rdi),%eax
lea    0xecf(%rip),%rdi
push   %rax
push   %r10
call   1030 <pfpanic@plt>
add    $0x10,%rsp
pop    %rax
ret

LLVM IR (-O0):
@.str = [32 x i8] c"Error occurred on malloc() call\00"
@EX_OSERR = global i32 0
define void @__pfpanic_malloc(i16 zeroext %0, i16 zeroext %1, i8* %2, i8* %3, i32 %4, i32 %5) {
%7 = alloca i16
%8 = alloca i16
%9 = alloca i8*
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i32
store i16 %0, i16* %7
store i16 %1, i16* %8
store i8* %2, i8** %9
store i8* %3, i8** %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i16, i16* %7
%14 = load i16, i16* %8
%15 = load i8*, i8** %9
%16 = load i8*, i8** %10
%17 = load i32, i32* %11
%18 = load i32, i32* %12
%19 = load i32, i32* @EX_OSERR
%20 = call i32 @pfpanic(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i16 zeroext %13, i16 zeroext %14, i8* %15, i8* %16, i32 %17, i32 %18, i32 %19)
ret void
}

LLVM IR (-O2):
@.str = [32 x i8] c"Error occurred on malloc() call\00"
@EX_OSERR = global i32 0
define void @__pfpanic_malloc(i16 zeroext %0, i16 zeroext %1, i8* %2, i8* %3, i32 %4, i32 %5) {
%7 = load i32, i32* @EX_OSERR
%8 = tail call i32 @pfpanic(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i16 zeroext %0, i16 zeroext %1, i8* %2, i8* %3, i32 %4, i32 %5, i32 %7)
ret void
}
main() {
  if ((struct A { int i; } *)0, 1) {
    struct A a;
    a.i = 2;
    return a.i;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
%struct.A = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.A
store i32 0, i32* %1
%3 = getelementptr inbounds %struct.A, %struct.A* %2, i32 0, i32 0
store i32 2, i32* %3
%4 = getelementptr inbounds %struct.A, %struct.A* %2, i32 0, i32 0
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
ret i32 2
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void MPUEnable(unsigned long ulMPUConfig) {
  DEBUG_ASSERT(!(ulMPUConfig & ~(4 | 2)));
  (*((volatile unsigned long *)(0xE000ED94))) = ulMPUConfig | 0x00000001;
}


x86 assembly (clang, -O0):
<MPUEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xfffffffffffffff9,%rax
cmp    $0x0,%rax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rcx
or     $0x1,%rcx
mov    $0xe000ed94,%eax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPUEnable>:
push   %rbx
mov    %rdi,%rbx
xor    %edi,%edi
test   $0xfffffffffffffff9,%rbx
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
or     $0x1,%rbx
mov    $0xe000ed94,%eax
mov    %rbx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @MPUEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, -7
%5 = icmp ne i64 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
%8 = call i32 @DEBUG_ASSERT(i32 %7)
%9 = load i64, i64* %2
%10 = or i64 %9, 1
store volatile i64 %10, i64* inttoptr (i64 3758157204 to i64*)
ret void
}

LLVM IR (-O2):
define void @MPUEnable(i64 %0) {
%2 = and i64 %0, -7
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = or i64 %0, 1
store volatile i64 %6, i64* inttoptr (i64 3758157204 to i64*)
ret void
}
void _Noreturn f3(void) { exit(0); }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<f3>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @f3() {
unreachable
}

LLVM IR (-O2):
define void @f3() {
tail call void @exit(i32 0)
unreachable
}
int alpha(char c) {
  if (c >= 'a')
    return (c <= 'z');
  if (c <= 'Z')
    return (c >= 'A');
  return (c == '_');
}


x86 assembly (clang, -O0):
<alpha>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     112e <alpha+0x2e>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
setle  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    1164 <alpha+0x64>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     1152 <alpha+0x52>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
setge  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
jmp    1164 <alpha+0x64>
movsbl -0x5(%rbp),%eax
cmp    $0x5f,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alpha>:
cmp    $0x61,%dil
jl     1111 <alpha+0x11>
cmp    $0x7b,%dil
setb   %al
movzbl %al,%eax
ret
cmp    $0x5a,%dil
jg     1122 <alpha+0x22>
cmp    $0x41,%dil
setge  %al
movzbl %al,%eax
ret
cmp    $0x5f,%dil
sete   %al
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @alpha(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
%11 = zext i1 %10 to i32
store i32 %11, i32* %2
br label %26
12: ; preds = %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sle i32 %14, 90
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sge i32 %18, 65
%20 = zext i1 %19 to i32
store i32 %20, i32* %2
br label %26
21: ; preds = %12
%22 = load i8, i8* %3
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %23, 95
%25 = zext i1 %24 to i32
store i32 %25, i32* %2
br label %26
26: ; preds = %21, %16, %7
%27 = load i32, i32* %2
ret i32 %27
}

LLVM IR (-O2):
define i32 @alpha(i8 signext %0) {
%2 = icmp sgt i8 %0, 96
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = icmp ult i8 %0, 123
br label %11
5: ; preds = %1
%6 = icmp slt i8 %0, 91
br i1 %6, label %7, label %9
7: ; preds = %5
%8 = icmp sgt i8 %0, 64
br label %11
9: ; preds = %5
%10 = icmp eq i8 %0, 95
br label %11
11: ; preds = %9, %7, %3
%12 = phi i1 [ %4, %3 ], [ %8, %7 ], [ %10, %9 ]
%13 = zext i1 %12 to i32
ret i32 %13
}
int outch(c) { return putchar(c); }


x86 assembly (clang, -O0):
<outch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <putchar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<outch>:
xor    %eax,%eax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
define i32 @outch(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 (i32, ...) bitcast (i32 (...)* @putchar to i32 (i32, ...)*)(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @outch(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @putchar to i32 (i32, ...)*)(i32 %0)
ret i32 %2
}
void nseel_asm_2pdd_end(void) {}


x86 assembly (clang, -O0):
<nseel_asm_2pdd_end>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nseel_asm_2pdd_end>:
ret

LLVM IR (-O0):
define void @nseel_asm_2pdd_end() {
ret void
}

LLVM IR (-O2):
define void @nseel_asm_2pdd_end() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void ver(int *vector, unsigned int tope) {
  int i;
  for (i = 0; i < tope; i++) {
    printf("%d  ", vector[i]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<ver>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jae    1159 <ver+0x49>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <ver+0x16>
lea    0xea5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ver>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
je     1157 <ver+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <ver+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%d \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @ver(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp ult i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%d \00"
define void @ver(i32* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
int device_ndrange_has_work(unsigned int dims,
                            const unsigned int *group_count) {
  int i;
  for (i = 0; i < dims; i++)
    if (group_count[i] == 0)
      return 0;
  return 1;
}


x86 assembly (clang, -O0):
<device_ndrange_has_work>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x8(%rbp),%eax
jae    114f <device_ndrange_has_work+0x4f>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
jne    113c <device_ndrange_has_work+0x3c>
movl   $0x0,-0x4(%rbp)
jmp    1156 <device_ndrange_has_work+0x56>
jmp    1141 <device_ndrange_has_work+0x41>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1112 <device_ndrange_has_work+0x12>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<device_ndrange_has_work>:
mov    $0x1,%eax
test   %edi,%edi
je     111f <device_ndrange_has_work+0x1f>
mov    %edi,%ecx
xor    %edx,%edx
nopl   (%rax)
cmpl   $0x0,(%rsi,%rdx,4)
je     1120 <device_ndrange_has_work+0x20>
add    $0x1,%rdx
cmp    %rdx,%rcx
jne    1110 <device_ndrange_has_work+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @device_ndrange_has_work(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32 0, i32* %6
br label %7
7: ; preds = %20, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp ult i32 %8, %9
br i1 %10, label %11, label %23
11: ; preds = %7
%12 = load i32*, i32** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %11
store i32 0, i32* %3
br label %24
19: ; preds = %11
br label %20
20: ; preds = %19
%21 = load i32, i32* %6
%22 = add nsw i32 %21, 1
store i32 %22, i32* %6
br label %7
23: ; preds = %7
store i32 1, i32* %3
br label %24
24: ; preds = %23, %18
%25 = load i32, i32* %3
ret i32 %25
}

LLVM IR (-O2):
define i32 @device_ndrange_has_work(i32 %0, i32* nocapture %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %14, label %4
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %8
6: ; preds = %8
%7 = icmp eq i64 %13, %5
br i1 %7, label %14, label %8
8: ; preds = %4, %6
%9 = phi i64 [ 0, %4 ], [ %13, %6 ]
%10 = getelementptr inbounds i32, i32* %1, i64 %9
%11 = load i32, i32* %10
%12 = icmp eq i32 %11, 0
%13 = add nuw nsw i64 %9, 1
br i1 %12, label %14, label %6
14: ; preds = %8, %6, %2
%15 = phi i32 [ 1, %2 ], [ 1, %6 ], [ 0, %8 ]
ret i32 %15
}
void sme_event_assoc_timed_out(struct wpa_supplicant *wpa_s,
                               union wpa_event_data *data) {}


x86 assembly (clang, -O0):
<sme_event_assoc_timed_out>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sme_event_assoc_timed_out>:
ret

LLVM IR (-O0):
%struct.wpa_supplicant = type opaque
%union.wpa_event_data = type opaque
define void @sme_event_assoc_timed_out(%struct.wpa_supplicant* %0, %union.wpa_event_data* %1) {
%3 = alloca %struct.wpa_supplicant*
%4 = alloca %union.wpa_event_data*
store %struct.wpa_supplicant* %0, %struct.wpa_supplicant** %3
store %union.wpa_event_data* %1, %union.wpa_event_data** %4
ret void
}

LLVM IR (-O2):
%struct.wpa_supplicant = type opaque
%union.wpa_event_data = type opaque
define void @sme_event_assoc_timed_out(%struct.wpa_supplicant* nocapture %0, %union.wpa_event_data* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalpha(int);
void t_isalpha_0x74() {
  Assert_real((isalpha(116)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalpha.c",
              585, ("isalpha should be 1 for t"));
}


x86 assembly (clang, -O0):
<t_isalpha_0x74>:
push   %rbp
mov    %rsp,%rbp
mov    $0x74,%edi
call   1030 <isalpha@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x249,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalpha_0x74>:
push   %rax
mov    $0x74,%edi
call   1030 <isalpha@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x249,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for t\00"
define void @t_isalpha_0x74() {
%1 = call i32 @isalpha(i32 116)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 585, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalpha.c\00"
@.str.1 = [26 x i8] c"isalpha should be 1 for t\00"
define void @t_isalpha_0x74() {
%1 = tail call i32 @isalpha(i32 116)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 585, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
char *concatenate(char *, char *, int, char const *);
char *get_job_acls_file(const char *log_dir) {
  return concatenate("%s/job-acls.xml", "job_acls_file", 1, log_dir);
}


x86 assembly (clang, -O0):
<get_job_acls_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
lea    0xed9(%rip),%rdi
lea    0xee2(%rip),%rsi
mov    $0x1,%edx
call   1030 <concatenate@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_job_acls_file>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdi
lea    0xeef(%rip),%rsi
mov    $0x1,%edx
jmp    1030 <concatenate@plt>

LLVM IR (-O0):
@.str = [16 x i8] c"%s/job-acls.xml\00"
@.str.1 = [14 x i8] c"job_acls_file\00"
define i8* @get_job_acls_file(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @concatenate(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i32 1, i8* %3)
ret i8* %4
}

LLVM IR (-O2):
@.str = [16 x i8] c"%s/job-acls.xml\00"
@.str.1 = [14 x i8] c"job_acls_file\00"
define i8* @get_job_acls_file(i8* %0) {
%2 = tail call i8* @concatenate(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0), i32 1, i8* %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ init(int, int);
int /*<<< orphan*/ parloop(int);
int main(void) {
  int i, j;
  for (i = 0; i < 500; i++)
    for (j = 0; j < 500; j++)
      init(i, j);
  parloop(500);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x1f4,-0x8(%rbp)
jge    1183 <main+0x63>
movl   $0x0,-0xc(%rbp)
cmpl   $0x1f4,-0xc(%rbp)
jge    1170 <main+0x50>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1040 <init@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    114a <main+0x2a>
jmp    1175 <main+0x55>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <main+0x16>
mov    $0x1f4,%edi
call   1030 <parloop@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nop
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    %ebx,%edi
mov    %ebp,%esi
call   1040 <init@plt>
add    $0x1,%ebp
cmp    $0x1f4,%ebp
jne    1140 <main+0x20>
add    $0x1,%ebx
cmp    $0x1f4,%ebx
jne    1130 <main+0x10>
mov    $0x1f4,%edi
call   1030 <parloop@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %4
4: ; preds = %19, %0
%5 = load i32, i32* %2
%6 = icmp slt i32 %5, 500
br i1 %6, label %7, label %22
7: ; preds = %4
store i32 0, i32* %3
br label %8
8: ; preds = %15, %7
%9 = load i32, i32* %3
%10 = icmp slt i32 %9, 500
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = load i32, i32* %2
%13 = load i32, i32* %3
%14 = call i32 @init(i32 %12, i32 %13)
br label %15
15: ; preds = %11
%16 = load i32, i32* %3
%17 = add nsw i32 %16, 1
store i32 %17, i32* %3
br label %8
18: ; preds = %8
br label %19
19: ; preds = %18
%20 = load i32, i32* %2
%21 = add nsw i32 %20, 1
store i32 %21, i32* %2
br label %4
22: ; preds = %4
%23 = call i32 @parloop(i32 500)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %0, %8
%2 = phi i32 [ 0, %0 ], [ %9, %8 ]
br label %3
3: ; preds = %1, %3
%4 = phi i32 [ 0, %1 ], [ %6, %3 ]
%5 = tail call i32 @init(i32 %2, i32 %4)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, 500
br i1 %7, label %8, label %3
8: ; preds = %3
%9 = add nuw nsw i32 %2, 1
%10 = icmp eq i32 %9, 500
br i1 %10, label %11, label %1
11: ; preds = %8
%12 = tail call i32 @parloop(i32 500)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void dmem_release(void *ptr) {
  free(ptr);
  return;
}


x86 assembly (clang, -O0):
<dmem_release>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmem_release>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @dmem_release(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @dmem_release(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
void aloc() {
  asm volatile("movq $0x2a, %%rdi\n\t"
               "movq %%rsp, %%r13\n\t"
               "movq %%r15, %%rsp\n\t"
               "callq *%%r12\n\t"
               "movq %%rsp, %%r15\n\t"
               "movq %%r13, %%rsp\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<aloc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%rdi
mov    %rsp,%r13
mov    %r15,%rsp
call   *%r12
mov    %rsp,%r15
mov    %r13,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aloc>:
mov    $0x2a,%rdi
mov    %rsp,%r13
mov    %r15,%rsp
call   *%r12
mov    %rsp,%r15
mov    %r13,%rsp
ret

LLVM IR (-O0):
define void @aloc() {
ret void
}

LLVM IR (-O2):
define void @aloc() {
tail call void asm sideeffect "movq $$0x2a, %rdi\0A\09movq %rsp, %r13\0A\09movq %r15, %rsp\0A\09callq *%r12\0A\09movq %rsp, %r15\0A\09movq %r13, %rsp\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
int ft_isupper(int c) { return (c > 64 && c < 91); }


x86 assembly (clang, -O0):
<ft_isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x40,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1120 <ft_isupper+0x20>
cmpl   $0x5b,-0x4(%rbp)
setl   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isupper>:
add    $0xffffffbf,%edi
xor    %eax,%eax
cmp    $0x1a,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @ft_isupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 64
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp slt i32 %6, 91
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @ft_isupper(i32 %0) {
%2 = add i32 %0, -65
%3 = icmp ult i32 %2, 26
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ mpgdecoder_play_frame(void *, int /*<<< orphan*/ **,
                                         unsigned char *, int, int, int);
void default_mpgdecoder_play_frame(void *ctx, FILE **playfp, unsigned char *buf,
                                   int len, int rate, int stereo) {
  mpgdecoder_play_frame(ctx, playfp, buf, len, rate, stereo);
}


x86 assembly (clang, -O0):
<default_mpgdecoder_play_frame>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8d,-0x20(%rbp)
mov    %r9d,-0x24(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%ecx
mov    -0x20(%rbp),%r8d
mov    -0x24(%rbp),%r9d
call   1030 <mpgdecoder_play_frame@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<default_mpgdecoder_play_frame>:
jmp    1030 <mpgdecoder_play_frame@plt>

LLVM IR (-O0):
define void @default_mpgdecoder_play_frame(i8* %0, i32** %1, i8* %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i8*
%8 = alloca i32**
%9 = alloca i8*
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
store i8* %0, i8** %7
store i32** %1, i32*** %8
store i8* %2, i8** %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i8*, i8** %7
%14 = load i32**, i32*** %8
%15 = load i8*, i8** %9
%16 = load i32, i32* %10
%17 = load i32, i32* %11
%18 = load i32, i32* %12
%19 = call i32 @mpgdecoder_play_frame(i8* %13, i32** %14, i8* %15, i32 %16, i32 %17, i32 %18)
ret void
}

LLVM IR (-O2):
define void @default_mpgdecoder_play_frame(i8* %0, i32** %1, i8* %2, i32 %3, i32 %4, i32 %5) {
%7 = tail call i32 @mpgdecoder_play_frame(i8* %0, i32** %1, i8* %2, i32 %3, i32 %4, i32 %5)
ret void
}
int q_toascii(int c) { return (c & 0x7f); }


x86 assembly (clang, -O0):
<q_toascii>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x7f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<q_toascii>:
mov    %edi,%eax
and    $0x7f,%eax
ret

LLVM IR (-O0):
define i32 @q_toascii(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 127
ret i32 %4
}

LLVM IR (-O2):
define i32 @q_toascii(i32 %0) {
%2 = and i32 %0, 127
ret i32 %2
}
void foo258(int p) {}


x86 assembly (clang, -O0):
<foo258>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo258>:
ret

LLVM IR (-O0):
define void @foo258(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo258(i32 %0) {
ret void
}
int __attribute__((visibility("default"))) shlibfunc() { return 42; }


x86 assembly (clang, -O0):
<shlibfunc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shlibfunc>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @shlibfunc() {
ret i32 42
}

LLVM IR (-O2):
define i32 @shlibfunc() {
ret i32 42
}
/* Variables and functions */
char *utf8_skip_char(char const *);
size_t utf8_strlen(const char *s, size_t len) {
  const char *e = &s[len];
  unsigned int l = 0;
  while (s < e) {
    s = utf8_skip_char(s);
    l++;
  }
  return l;
}


x86 assembly (clang, -O0):
<utf8_strlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    115c <utf8_strlen+0x4c>
mov    -0x8(%rbp),%rdi
call   1030 <utf8_skip_char@plt>
mov    %rax,-0x8(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1133 <utf8_strlen+0x23>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf8_strlen>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
test   %rsi,%rsi
jle    1142 <utf8_strlen+0x32>
mov    %rsi,%r14
mov    %rdi,%rax
add    %rdi,%r14
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rax,%rdi
call   1030 <utf8_skip_char@plt>
add    $0x1,%ebx
cmp    %r14,%rax
jb     1130 <utf8_strlen+0x20>
mov    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @utf8_strlen(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i8*, i8** %3
%8 = load i64, i64* %4
%9 = getelementptr inbounds i8, i8* %7, i64 %8
store i8* %9, i8** %5
store i32 0, i32* %6
br label %10
10: ; preds = %14, %2
%11 = load i8*, i8** %3
%12 = load i8*, i8** %5
%13 = icmp ult i8* %11, %12
br i1 %13, label %14, label %19
14: ; preds = %10
%15 = load i8*, i8** %3
%16 = call i8* @utf8_skip_char(i8* %15)
store i8* %16, i8** %3
%17 = load i32, i32* %6
%18 = add i32 %17, 1
store i32 %18, i32* %6
br label %10
19: ; preds = %10
%20 = load i32, i32* %6
%21 = zext i32 %20 to i64
ret i64 %21
}

LLVM IR (-O2):
define i64 @utf8_strlen(i8* %0, i64 %1) {
%3 = getelementptr inbounds i8, i8* %0, i64 %1
%4 = icmp sgt i64 %1, 0
br i1 %4, label %5, label %13
5: ; preds = %2, %5
%6 = phi i32 [ %9, %5 ], [ 0, %2 ]
%7 = phi i8* [ %8, %5 ], [ %0, %2 ]
%8 = tail call i8* @utf8_skip_char(i8* %7)
%9 = add i32 %6, 1
%10 = icmp ult i8* %8, %3
br i1 %10, label %5, label %11
11: ; preds = %5
%12 = zext i32 %9 to i64
br label %13
13: ; preds = %11, %2
%14 = phi i64 [ 0, %2 ], [ %12, %11 ]
ret i64 %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned char, unsigned char, unsigned char,
                          unsigned char);
void check_endianness(void) {
  unsigned int a = 0xAABBCCDD;
  unsigned char *c;
  c = (unsigned char *)&a;
  printf("0x%X - 0x%X - 0x%X - 0x%X\n", *(c + 0), *(c + 1), *(c + 2), *(c + 3));
  while (1)
    ;
}


x86 assembly (clang, -O0):
<check_endianness>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xaabbccdd,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%sil
mov    -0x10(%rbp),%rax
mov    0x1(%rax),%dl
mov    -0x10(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x10(%rbp),%rax
lea    0xeb9(%rip),%rdi
movzbl %sil,%esi
movzbl %dl,%edx
movzbl %cl,%ecx
movzbl 0x3(%rax),%r8d
call   1030 <printf@plt>
jmp    115b <check_endianness+0x4b>

x86 assembly (clang, -O2):
<check_endianness>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xdd,%esi
mov    $0xcc,%edx
mov    $0xbb,%ecx
mov    $0xaa,%r8d
call   1030 <printf@plt>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
jmp    1140 <check_endianness+0x30>

LLVM IR (-O0):
@.str = [27 x i8] c"0x%X - 0x%X - 0x%X - 0x%X\0A\00"
define void @check_endianness() {
%1 = alloca i32
%2 = alloca i8*
store i32 -1430532899, i32* %1
%3 = bitcast i32* %1 to i8*
store i8* %3, i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = load i8*, i8** %2
%8 = getelementptr inbounds i8, i8* %7, i64 1
%9 = load i8, i8* %8
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 2
%12 = load i8, i8* %11
%13 = load i8*, i8** %2
%14 = getelementptr inbounds i8, i8* %13, i64 3
%15 = load i8, i8* %14
%16 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8 zeroext %6, i8 zeroext %9, i8 zeroext %12, i8 zeroext %15)
br label %17
17: ; preds = %0, %17
br label %17
}

LLVM IR (-O2):
@.str = [27 x i8] c"0x%X - 0x%X - 0x%X - 0x%X\0A\00"
define void @check_endianness() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0), i8 zeroext -35, i8 zeroext -52, i8 zeroext -69, i8 zeroext -86)
br label %2
2: ; preds = %2, %0
br label %2
}
void av_dict_parse_string() {}


x86 assembly (clang, -O0):
<av_dict_parse_string>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_dict_parse_string>:
ret

LLVM IR (-O0):
define void @av_dict_parse_string() {
ret void
}

LLVM IR (-O2):
define void @av_dict_parse_string() {
ret void
}
/* Type definitions */
typedef int const int32_t;
typedef int const int16_t;

/* Variables and functions */
int16_t mul16(int16_t x, int16_t y, const int fractional_digits) {
  return (int16_t)(((int32_t)x * y) >> fractional_digits);
}


x86 assembly (clang, -O0):
<mul16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul16>:
mov    %edx,%ecx
mov    %edi,%eax
imul   %esi,%eax
sar    %cl,%eax
ret

LLVM IR (-O0):
define i32 @mul16(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = mul nsw i32 %7, %8
%10 = load i32, i32* %6
%11 = ashr i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @mul16(i32 %0, i32 %1, i32 %2) {
%4 = mul nsw i32 %1, %0
%5 = ashr i32 %4, %2
ret i32 %5
}
void preprocessor_show() {}


x86 assembly (clang, -O0):
<preprocessor_show>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<preprocessor_show>:
ret

LLVM IR (-O0):
define void @preprocessor_show() {
ret void
}

LLVM IR (-O2):
define void @preprocessor_show() {
ret void
}
void avio_r8() {}


x86 assembly (clang, -O0):
<avio_r8>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avio_r8>:
ret

LLVM IR (-O0):
define void @avio_r8() {
ret void
}

LLVM IR (-O2):
define void @avio_r8() {
ret void
}
unsigned unpack_channel_count(unsigned packed_field) {
  switch (packed_field) {
  case 0:
    return 1;
  case 1:
    return 2;
  case 2:
  case 4:
  case 7:
    return 3;
  case 3:
  case 5:
  case 8:
  case 10:
  case 13:
  case 15:
    return 4;
  case 6:
  case 9:
  case 11:
  case 14:
  case 16:
  case 18:
  case 19:
    return 5;
  case 12:
  case 17:
  case 20:
    return 6;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<unpack_channel_count>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %rax,-0x10(%rbp)
sub    $0x14,%rax
ja     1174 <unpack_channel_count+0x74>
mov    -0x10(%rbp),%rax
lea    0xedd(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    117b <unpack_channel_count+0x7b>
movl   $0x2,-0x4(%rbp)
jmp    117b <unpack_channel_count+0x7b>
movl   $0x3,-0x4(%rbp)
jmp    117b <unpack_channel_count+0x7b>
movl   $0x4,-0x4(%rbp)
jmp    117b <unpack_channel_count+0x7b>
movl   $0x5,-0x4(%rbp)
jmp    117b <unpack_channel_count+0x7b>
movl   $0x6,-0x4(%rbp)
jmp    117b <unpack_channel_count+0x7b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<unpack_channel_count>:
xor    %eax,%eax
cmp    $0x14,%edi
ja     1114 <unpack_channel_count+0x14>
movslq %edi,%rax
lea    0xeef(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @unpack_channel_count(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %11 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
i32 4, label %7
i32 7, label %7
i32 3, label %8
i32 5, label %8
i32 8, label %8
i32 10, label %8
i32 13, label %8
i32 15, label %8
i32 6, label %9
i32 9, label %9
i32 11, label %9
i32 14, label %9
i32 16, label %9
i32 18, label %9
i32 19, label %9
i32 12, label %10
i32 17, label %10
i32 20, label %10
]
5: ; preds = %1
store i32 1, i32* %2
br label %12
6: ; preds = %1
store i32 2, i32* %2
br label %12
7: ; preds = %1, %1, %1
store i32 3, i32* %2
br label %12
8: ; preds = %1, %1, %1, %1, %1, %1
store i32 4, i32* %2
br label %12
9: ; preds = %1, %1, %1, %1, %1, %1, %1
store i32 5, i32* %2
br label %12
10: ; preds = %1, %1, %1
store i32 6, i32* %2
br label %12
11: ; preds = %1
store i32 0, i32* %2
br label %12
12: ; preds = %11, %10, %9, %8, %7, %6, %5
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
@switch.table.unpack_channel_count = [21 x i32] [i32 1, i32 2, i32 3, i32 4, i32 3, i32 4, i32 5, i32 3, i32 4, i32 5, i32 4, i32 5, i32 6, i32 4, i32 5, i32 4, i32 5, i32 6, i32 5, i32 5, i32 6]
define i32 @unpack_channel_count(i32 %0) {
%2 = icmp ult i32 %0, 21
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = sext i32 %0 to i64
%5 = getelementptr inbounds [21 x i32], [21 x i32]* @switch.table.unpack_channel_count, i64 0, i64 %4
%6 = load i32, i32* %5
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 0, %1 ]
ret i32 %8
}
void WebPInitSamplersMIPS32(void) {}


x86 assembly (clang, -O0):
<WebPInitSamplersMIPS32>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WebPInitSamplersMIPS32>:
ret

LLVM IR (-O0):
define void @WebPInitSamplersMIPS32() {
ret void
}

LLVM IR (-O2):
define void @WebPInitSamplersMIPS32() {
ret void
}
/* Type definitions */
struct aFILE {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _get_actual_fp(struct aFILE *);
int pclose(int /*<<< orphan*/);
int my_pclose(struct aFILE *fp) { return pclose(_get_actual_fp(fp)); }


x86 assembly (clang, -O0):
<my_pclose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <_get_actual_fp@plt>
mov    %eax,%edi
call   1030 <pclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_pclose>:
push   %rax
call   1040 <_get_actual_fp@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <pclose@plt>

LLVM IR (-O0):
%struct.aFILE = type { i32 }
define i32 @my_pclose(%struct.aFILE* %0) {
%2 = alloca %struct.aFILE*
store %struct.aFILE* %0, %struct.aFILE** %2
%3 = load %struct.aFILE*, %struct.aFILE** %2
%4 = call i32 @_get_actual_fp(%struct.aFILE* %3)
%5 = call i32 @pclose(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.aFILE = type { i32 }
define i32 @my_pclose(%struct.aFILE* %0) {
%2 = tail call i32 @_get_actual_fp(%struct.aFILE* %0)
%3 = tail call i32 @pclose(i32 %2)
ret i32 %3
}