xunge/DecIR huggingface dataset:
int resolve_references(void) { return 1; }


x86 assembly (clang, -O0):
<resolve_references>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<resolve_references>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @resolve_references() {
ret i32 1
}

LLVM IR (-O2):
define i32 @resolve_references() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ LOG_CRIT;
int /*<<< orphan*/ abort();
void *malloc(size_t);
int /*<<< orphan*/ zc_err(int /*<<< orphan*/, char *);
void *zc_malloc(size_t size) {
  void *p;
  p = malloc(size);
  if (p == NULL) {
    zc_err(LOG_CRIT, "Memory allocation failure. Aborting.\n");
    abort();
  }
  return p;
}


x86 assembly (clang, -O0):
<zc_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1170 <zc_malloc+0x40>
mov    0x2e8d(%rip),%rax
mov    (%rax),%edi
lea    0xe9c(%rip),%rsi
call   1050 <zc_err@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zc_malloc>:
push   %rax
call   1040 <malloc@plt>
test   %rax,%rax
je     113d <zc_malloc+0xd>
pop    %rcx
ret
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
lea    0xeb3(%rip),%rsi
call   1050 <zc_err@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@LOG_CRIT = global i32 0
@.str = [38 x i8] c"Memory allocation failure. Aborting.\0A\00"
define i8* @zc_malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i32, i32* @LOG_CRIT
%10 = call i32 @zc_err(i32 %9, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%11 = call i32 (...) @abort()
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@LOG_CRIT = global i32 0
@.str = [38 x i8] c"Memory allocation failure. Aborting.\0A\00"
define noalias i8* @zc_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = load i32, i32* @LOG_CRIT
%6 = tail call i32 @zc_err(i32 %5, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %1
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
int _dup(int oldfd) {
  _exit(-1);
  return -1;
}


x86 assembly (clang, -O0):
<_dup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<_dup>:
push   %rax
mov    $0xffffffff,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define i32 @_dup(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_exit(i32 -1)
unreachable
}

LLVM IR (-O2):
define i32 @_dup(i32 %0) {
%2 = tail call i32 @_exit(i32 -1)
unreachable
}
void initRB() {}


x86 assembly (clang, -O0):
<initRB>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initRB>:
ret

LLVM IR (-O0):
define void @initRB() {
ret void
}

LLVM IR (-O2):
define void @initRB() {
ret void
}
int test_imm_D0uint64_midword_reg(unsigned long long val) {
  return ((val >> 16) & (0xD0 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_D0uint64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
shr    $0x10,%rdx
and    $0xd0,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_D0uint64_midword_reg>:
test   $0xd00000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_D0uint64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 16
%5 = and i64 %4, 208
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_D0uint64_midword_reg(i64 %0) {
%2 = and i64 %0, 13631488
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
int __attribute__((no, noclone)) return_zero(void) { return 0; }


x86 assembly (clang, -O0):
<return_zero>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_zero>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @return_zero() {
ret i32 0
}

LLVM IR (-O2):
define i32 @return_zero() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ firstExtern();
int /*<<< orphan*/ secondStatic();
int main(void) {
  firstExtern();
  secondStatic();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <firstExtern@plt>
mov    $0x0,%al
call   1030 <secondStatic@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <firstExtern@plt>
xor    %eax,%eax
call   1030 <secondStatic@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @firstExtern()
%3 = call i32 (...) @secondStatic()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @firstExtern()
%2 = tail call i32 (...) @secondStatic()
ret i32 0
}
int test_imm_A5int16_reg(short val) {
  return ((val) & (-0xA5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A5int16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0xffffff5b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A5int16_reg>:
test   $0xff5b,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A5int16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, -165
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A5int16_reg(i16 signext %0) {
%2 = and i16 %0, -165
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ uint64_t;
struct timespec {
  int dummy;
};

/* Variables and functions */
scalar_t__ timespec_to_ns(struct timespec const *);
uint64_t timespec_diff_ns(const struct timespec *t1,
                          const struct timespec *t0) {
  return timespec_to_ns(t1) - timespec_to_ns(t0);
}


x86 assembly (clang, -O0):
<timespec_diff_ns>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <timespec_to_ns@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <timespec_to_ns@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
sub    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timespec_diff_ns>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1030 <timespec_to_ns@plt>
mov    %rax,%rbx
mov    %r14,%rdi
call   1030 <timespec_to_ns@plt>
sub    %rax,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i64 @timespec_diff_ns(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %3
%6 = call i64 @timespec_to_ns(%struct.timespec* %5)
%7 = load %struct.timespec*, %struct.timespec** %4
%8 = call i64 @timespec_to_ns(%struct.timespec* %7)
%9 = sub nsw i64 %6, %8
ret i64 %9
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define i64 @timespec_diff_ns(%struct.timespec* %0, %struct.timespec* %1) {
%3 = tail call i64 @timespec_to_ns(%struct.timespec* %0)
%4 = tail call i64 @timespec_to_ns(%struct.timespec* %1)
%5 = sub nsw i64 %3, %4
ret i64 %5
}
unsigned int fsm_construct_hash_sym(char *symbol) {
  register unsigned int hash;
  hash = 0;
  while (*symbol != '\0')
    hash = hash + *symbol++;
  return (hash % 1021);
}


x86 assembly (clang, -O0):
<fsm_construct_hash_sym>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     113e <fsm_construct_hash_sym+0x3e>
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
movsbl (%rcx),%ecx
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <fsm_construct_hash_sym+0xf>
mov    -0xc(%rbp),%eax
mov    $0x3fd,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsm_construct_hash_sym>:
mov    (%rdi),%cl
test   %cl,%cl
je     1141 <fsm_construct_hash_sym+0x41>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
add    %ecx,%eax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <fsm_construct_hash_sym+0x10>
mov    %eax,%ecx
imul   $0xc0906d,%rcx,%rcx
shr    $0x20,%rcx
mov    %eax,%edx
sub    %ecx,%edx
shr    %edx
add    %ecx,%edx
shr    $0x9,%edx
imul   $0x3fd,%edx,%ecx
sub    %ecx,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fsm_construct_hash_sym(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %4
%10 = load i32, i32* %3
%11 = load i8*, i8** %2
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %2
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
%15 = add i32 %10, %14
store i32 %15, i32* %3
br label %4
16: ; preds = %4
%17 = load i32, i32* %3
%18 = urem i32 %17, 1021
ret i32 %18
}

LLVM IR (-O2):
define i32 @fsm_construct_hash_sym(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %15, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %11, %4 ], [ %2, %1 ]
%6 = phi i32 [ %10, %4 ], [ 0, %1 ]
%7 = phi i8* [ %9, %4 ], [ %0, %1 ]
%8 = sext i8 %5 to i32
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = add i32 %6, %8
%11 = load i8, i8* %9
%12 = icmp eq i8 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4
%14 = urem i32 %10, 1021
br label %15
15: ; preds = %13, %1
%16 = phi i32 [ 0, %1 ], [ %14, %13 ]
ret i32 %16
}
int atomic_inc(int *x) { return __sync_fetch_and_add(x, 1); }


x86 assembly (clang, -O0):
<atomic_inc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x1,%eax
lock xadd %eax,(%rcx)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atomic_inc>:
mov    $0x1,%eax
lock xadd %eax,(%rdi)
ret

LLVM IR (-O0):
define i32 @atomic_inc(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = atomicrmw add i32* %3, i32 1 seq_cst
ret i32 %4
}

LLVM IR (-O2):
define i32 @atomic_inc(i32* nocapture %0) {
%2 = atomicrmw add i32* %0, i32 1 seq_cst
ret i32 %2
}
void i2cslave_cmdproc_clrres() {}


x86 assembly (clang, -O0):
<i2cslave_cmdproc_clrres>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2cslave_cmdproc_clrres>:
ret

LLVM IR (-O0):
define void @i2cslave_cmdproc_clrres() {
ret void
}

LLVM IR (-O2):
define void @i2cslave_cmdproc_clrres() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ erase();
int /*<<< orphan*/ free_wins();
int /*<<< orphan*/ refresh();
void stop_gui() {
  free_wins();
  endwin();
  refresh();
  erase();
}


x86 assembly (clang, -O0):
<stop_gui>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <free_wins@plt>
mov    $0x0,%al
call   1060 <endwin@plt>
mov    $0x0,%al
call   1050 <refresh@plt>
mov    $0x0,%al
call   1040 <erase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<stop_gui>:
push   %rax
xor    %eax,%eax
call   1030 <free_wins@plt>
xor    %eax,%eax
call   1060 <endwin@plt>
xor    %eax,%eax
call   1050 <refresh@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <erase@plt>

LLVM IR (-O0):
define void @stop_gui() {
%1 = call i32 (...) @free_wins()
%2 = call i32 (...) @endwin()
%3 = call i32 (...) @refresh()
%4 = call i32 (...) @erase()
ret void
}

LLVM IR (-O2):
define void @stop_gui() {
%1 = tail call i32 (...) @free_wins()
%2 = tail call i32 (...) @endwin()
%3 = tail call i32 (...) @refresh()
%4 = tail call i32 (...) @erase()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int __infer_nondet_int();
FILE *freopen(const char *__restrict filename, const char *__restrict mode,
              FILE *__restrict stream) {
  int n;
  n = __infer_nondet_int();
  if (n)
    return NULL;
  else
    return stream;
}


x86 assembly (clang, -O0):
<freopen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x0,-0x24(%rbp)
je     1145 <freopen+0x35>
movq   $0x0,-0x8(%rbp)
jmp    114d <freopen+0x3d>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freopen>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <__infer_nondet_int@plt>
test   %eax,%eax
cmove  %r14,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32* @freopen(i8* noalias %0, i8* noalias %1, i32* noalias %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32* %2, i32** %7
%9 = call i32 (...) @__infer_nondet_int()
store i32 %9, i32* %8
%10 = load i32, i32* %8
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %3
store i32* null, i32** %4
br label %15
13: ; preds = %3
%14 = load i32*, i32** %7
store i32* %14, i32** %4
br label %15
15: ; preds = %13, %12
%16 = load i32*, i32** %4
ret i32* %16
}

LLVM IR (-O2):
define i32* @freopen(i8* noalias nocapture readnone %0, i8* noalias nocapture readnone %1, i32* noalias readnone %2) {
%4 = tail call i32 (...) @__infer_nondet_int()
%5 = icmp eq i32 %4, 0
%6 = select i1 %5, i32* %2, i32* null
ret i32* %6
}
int integer_conversion(unsigned x, int y) {
  return x > 4 || x < 10;
  return y > 4u || y < 10u;
}


x86 assembly (clang, -O0):
<integer_conversion>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%al
cmpl   $0x4,-0x4(%rbp)
mov    %al,-0x9(%rbp)
ja     1123 <integer_conversion+0x23>
cmpl   $0xa,-0x4(%rbp)
setb   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<integer_conversion>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @integer_conversion(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ugt i32 %5, 4
br i1 %6, label %10, label %7
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp ult i32 %8, 10
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ true, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @integer_conversion(i32 %0, i32 %1) {
ret i32 1
}
int less(int A, int B) { return (A < B ? 1 : 0); }


x86 assembly (clang, -O0):
<less>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
mov    -0x8(%rbp),%esi
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %esi,%edx
cmovl  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<less>:
xor    %eax,%eax
cmp    %esi,%edi
setl   %al
ret

LLVM IR (-O0):
define i32 @less(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 1, i32 0
ret i32 %9
}

LLVM IR (-O2):
define i32 @less(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ merge(int **, int);
void mergeSort(int **vet, int tam) {
  int meio;
  if (tam > 1) {
    meio = tam / 2;
    mergeSort(vet, meio);
    mergeSort(vet + meio, tam - meio);
    merge(vet, tam);
  }
}


x86 assembly (clang, -O0):
<mergeSort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
jle    1179 <mergeSort+0x59>
mov    -0xc(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1030 <mergeSort@plt>
mov    -0x8(%rbp),%rdi
movslq -0x10(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
mov    -0xc(%rbp),%esi
sub    -0x10(%rbp),%esi
call   1030 <mergeSort@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <merge@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergeSort>:
cmp    $0x1,%esi
jle    1154 <mergeSort+0x34>
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%r14
mov    %esi,%ebx
shr    %ebx
mov    %ebx,%esi
call   1030 <mergeSort@plt>
lea    (%r14,%rbx,8),%rdi
mov    %ebp,%esi
sub    %ebx,%esi
call   1030 <mergeSort@plt>
mov    %r14,%rdi
mov    %ebp,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <merge@plt>
ret

LLVM IR (-O0):
define void @mergeSort(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32
store i32** %0, i32*** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %23
8: ; preds = %2
%9 = load i32, i32* %4
%10 = sdiv i32 %9, 2
store i32 %10, i32* %5
%11 = load i32**, i32*** %3
%12 = load i32, i32* %5
%13 = load i32**, i32*** %3
%14 = load i32, i32* %5
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32*, i32** %13, i64 %15
%17 = load i32, i32* %4
%18 = load i32, i32* %5
%19 = sub nsw i32 %17, %18
%20 = load i32**, i32*** %3
%21 = load i32, i32* %4
%22 = call i32 @merge(i32** %20, i32 %21)
br label %23
23: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
define void @mergeSort(i32** %0, i32 %1) {
%3 = icmp sgt i32 %1, 1
br i1 %3, label %5, label %4
4: ; preds = %2, %5
ret void
5: ; preds = %2
%6 = lshr i32 %1, 1
tail call void @mergeSort(i32** %0, i32 %6)
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i32*, i32** %0, i64 %7
%9 = sub nsw i32 %1, %6
tail call void @mergeSort(i32** %8, i32 %9)
%10 = tail call i32 @merge(i32** %0, i32 %1)
br label %4
}
int func(int i, ...) { return (i); }


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @func(i32 %0, ...) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @func(i32 returned %0, ...) {
ret i32 %0
}
/* Variables and functions */
scalar_t__ xisinfl(long double);
scalar_t__ xisnanl(long double);
int checkfp(long double x) {
  if (xisinfl(x) || xisnanl(x))
    return 1;
  return 0;
}


x86 assembly (clang, -O0):
<checkfp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1040 <xisinfl@plt>
cmp    $0x0,%rax
jne    115c <checkfp+0x3c>
fldt   -0x20(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <xisnanl@plt>
cmp    $0x0,%rax
je     1168 <checkfp+0x48>
movl   $0x1,-0x4(%rbp)
jmp    116f <checkfp+0x4f>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkfp>:
sub    $0x28,%rsp
fldt   0x30(%rsp)
fld    %st(0)
fstpt  0x1c(%rsp)
fstpt  (%rsp)
call   1040 <xisinfl@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1148 <checkfp+0x28>
add    $0x28,%rsp
ret
fldt   0x1c(%rsp)
fstpt  (%rsp)
call   1030 <xisnanl@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x28,%rsp
ret

LLVM IR (-O0):
define i32 @checkfp(x86_fp80 %0) {
%2 = alloca i32
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
%4 = load x86_fp80, x86_fp80* %3
%5 = call i64 @xisinfl(x86_fp80 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load x86_fp80, x86_fp80* %3
%9 = call i64 @xisnanl(x86_fp80 %8)
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7, %1
store i32 1, i32* %2
br label %13
12: ; preds = %7
store i32 0, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @checkfp(x86_fp80 %0) {
%2 = tail call i64 @xisinfl(x86_fp80 %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @xisnanl(x86_fp80 %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0x28() {
  Assert_real((isupper(40) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              205, ("isupper should be 0 for ("));
}


x86 assembly (clang, -O0):
<t_isupper_0x28>:
push   %rbp
mov    %rsp,%rbp
mov    $0x28,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0xcd,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x28>:
push   %rax
mov    $0x28,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0xcd,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 0 for (\00"
define void @t_isupper_0x28() {
%1 = call i64 @isupper(i32 40)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 205, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [26 x i8] c"isupper should be 0 for (\00"
define void @t_isupper_0x28() {
%1 = tail call i64 @isupper(i32 40)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 205, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
short FSEv06_abs(short a) { return a < 0 ? -a : a; }


x86 assembly (clang, -O0):
<FSEv06_abs>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
cmp    $0x0,%eax
jge    1128 <FSEv06_abs+0x28>
movswl -0x2(%rbp),%ecx
xor    %eax,%eax
sub    %ecx,%eax
mov    %eax,-0x8(%rbp)
jmp    112f <FSEv06_abs+0x2f>
movswl -0x2(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<FSEv06_abs>:
mov    %edi,%eax
neg    %ax
cmovs  %di,%ax
ret

LLVM IR (-O0):
define signext i16 @FSEv06_abs(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i16, i16* %2
%8 = sext i16 %7 to i32
%9 = sub nsw i32 0, %8
br label %13
10: ; preds = %1
%11 = load i16, i16* %2
%12 = sext i16 %11 to i32
br label %13
13: ; preds = %10, %6
%14 = phi i32 [ %9, %6 ], [ %12, %10 ]
%15 = trunc i32 %14 to i16
ret i16 %15
}

LLVM IR (-O2):
define signext i16 @FSEv06_abs(i16 signext %0) {
%2 = tail call i16 @llvm.abs.i16(i16 %0, i1 false)
ret i16 %2
}
int rcu_read_lock_sched_held(void) { return 1; }


x86 assembly (clang, -O0):
<rcu_read_lock_sched_held>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_read_lock_sched_held>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @rcu_read_lock_sched_held() {
ret i32 1
}

LLVM IR (-O2):
define i32 @rcu_read_lock_sched_held() {
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void license_notice(void) {
  printf("bpt version %s -- Copyright (C) 2010  Amittai Aviram "
         "http://www.amittai.com\n",
         "1.12");
  printf("This program comes with ABSOLUTELY NO WARRANTY; for details "
         "type `show w'.\n"
         "This is free software, and you are welcome to redistribute it\n"
         "under certain conditions; type `show c' for details.\n\n");
}


x86 assembly (clang, -O0):
<license_notice>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xf2b(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xf22(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<license_notice>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xf1e(%rip),%rsi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xf15(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [77 x i8] c"bpt version %s -- Copyright (C) 2010 Amittai Aviram http://www.amittai.com\0A\00"
@.str.1 = [5 x i8] c"1.12\00"
@.str.2 = [192 x i8] c"This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.\0AThis is free software, and you are welcome to redistribute it\0Aunder certain conditions; type `show c' for details.\0A\0A\00"
define void @license_notice() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([192 x i8], [192 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [77 x i8] c"bpt version %s -- Copyright (C) 2010 Amittai Aviram http://www.amittai.com\0A\00"
@.str.1 = [5 x i8] c"1.12\00"
@str = [191 x i8] c"This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.\0AThis is free software, and you are welcome to redistribute it\0Aunder certain conditions; type `show c' for details.\0A\00"
define void @license_notice() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([77 x i8], [77 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([191 x i8], [191 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int strlen(char const *const);
int /*<<< orphan*/ write(int, char const *const, int);
void gl_puts(const char *const buf) {
  int len;
  if (buf) {
    len = strlen(buf);
    write(1, buf, len);
  }
}


x86 assembly (clang, -O0):
<gl_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1154 <gl_puts+0x34>
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    $0x1,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gl_puts>:
test   %rdi,%rdi
je     113e <gl_puts+0x1e>
push   %rbx
mov    %rdi,%rbx
call   1040 <strlen@plt>
mov    $0x1,%edi
mov    %rbx,%rsi
mov    %eax,%edx
pop    %rbx
jmp    1030 <write@plt>
ret

LLVM IR (-O0):
define void @gl_puts(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = load i8*, i8** %2
%8 = call i32 @strlen(i8* %7)
store i32 %8, i32* %3
%9 = load i8*, i8** %2
%10 = load i32, i32* %3
%11 = call i32 @write(i32 1, i8* %9, i32 %10)
br label %12
12: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @gl_puts(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call i32 @strlen(i8* %0)
%5 = tail call i32 @write(i32 1, i8* %0, i32 %4)
br label %6
6: ; preds = %3, %1
ret void
}
void rcu_nocb_gp_cleanup(struct rcu_state *rsp, struct rcu_node *rnp) {}


x86 assembly (clang, -O0):
<rcu_nocb_gp_cleanup>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_nocb_gp_cleanup>:
ret

LLVM IR (-O0):
%struct.rcu_state = type opaque
%struct.rcu_node = type opaque
define void @rcu_nocb_gp_cleanup(%struct.rcu_state* %0, %struct.rcu_node* %1) {
%3 = alloca %struct.rcu_state*
%4 = alloca %struct.rcu_node*
store %struct.rcu_state* %0, %struct.rcu_state** %3
store %struct.rcu_node* %1, %struct.rcu_node** %4
ret void
}

LLVM IR (-O2):
%struct.rcu_state = type opaque
%struct.rcu_node = type opaque
define void @rcu_nocb_gp_cleanup(%struct.rcu_state* nocapture %0, %struct.rcu_node* nocapture %1) {
ret void
}
/* Variables and functions */
int euclidean(int, int);
int factorial_rec(int);
int main() { return factorial_rec(5) - euclidean(72, 48); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x5,%edi
call   1040 <factorial_rec@plt>
mov    %eax,-0x8(%rbp)
mov    $0x48,%edi
mov    $0x30,%esi
call   1030 <euclidean@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
sub    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x5,%edi
call   1040 <factorial_rec@plt>
mov    %eax,%ebx
mov    $0x48,%edi
mov    $0x30,%esi
call   1030 <euclidean@plt>
sub    %eax,%ebx
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @factorial_rec(i32 5)
%3 = call i32 @euclidean(i32 72, i32 48)
%4 = sub nsw i32 %2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @factorial_rec(i32 5)
%2 = tail call i32 @euclidean(i32 72, i32 48)
%3 = sub nsw i32 %1, %2
ret i32 %3
}
/* Type definitions */
struct netent {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ AF_INET;
struct netent *_getnetbynis(char const *, char *, int /*<<< orphan*/);
struct netent *_getnetbynisname(const char *name) {
  return _getnetbynis(name, "networks.byname", AF_INET);
}


x86 assembly (clang, -O0):
<_getnetbynisname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rax
mov    (%rax),%edx
lea    0xed0(%rip),%rsi
call   1030 <_getnetbynis@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_getnetbynisname>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edx
lea    0xee0(%rip),%rsi
jmp    1030 <_getnetbynis@plt>

LLVM IR (-O0):
%struct.netent = type { i32 }
@.str = [16 x i8] c"networks.byname\00"
@AF_INET = global i32 0
define %struct.netent* @_getnetbynisname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @AF_INET
%5 = call %struct.netent* @_getnetbynis(i8* %3, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %4)
ret %struct.netent* %5
}

LLVM IR (-O2):
%struct.netent = type { i32 }
@.str = [16 x i8] c"networks.byname\00"
@AF_INET = global i32 0
define %struct.netent* @_getnetbynisname(i8* %0) {
%2 = load i32, i32* @AF_INET
%3 = tail call %struct.netent* @_getnetbynis(i8* %0, i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i32 %2)
ret %struct.netent* %3
}
/* Variables and functions */
#define INT_MAX 128
int doswitch(int x) {
  switch (x) {
  case 0:
    return -1;
  case 2:
    return -2;
  case 8:
    return -3;
  case 5:
    return 42;
  case INT_MAX:
    return -5;
  default:
    return -6;
  }
}


x86 assembly (clang, -O0):
<doswitch>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
test   %eax,%eax
je     1160 <doswitch+0x60>
jmp    111a <doswitch+0x1a>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     116c <doswitch+0x6c>
jmp    112b <doswitch+0x2b>
mov    -0xc(%rbp),%eax
sub    $0x5,%eax
je     1184 <doswitch+0x84>
jmp    113c <doswitch+0x3c>
mov    -0xc(%rbp),%eax
sub    $0x8,%eax
je     1178 <doswitch+0x78>
jmp    114d <doswitch+0x4d>
mov    -0xc(%rbp),%eax
sub    $0x80,%eax
je     1190 <doswitch+0x90>
jmp    119c <doswitch+0x9c>
movl   $0xffffffff,-0x4(%rbp)
jmp    11a3 <doswitch+0xa3>
movl   $0xfffffffe,-0x4(%rbp)
jmp    11a3 <doswitch+0xa3>
movl   $0xfffffffd,-0x4(%rbp)
jmp    11a3 <doswitch+0xa3>
movl   $0x2a,-0x4(%rbp)
jmp    11a3 <doswitch+0xa3>
movl   $0xfffffffb,-0x4(%rbp)
jmp    11a3 <doswitch+0xa3>
movl   $0xfffffffa,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<doswitch>:
cmp    $0x8,%edi
ja     1122 <doswitch+0x22>
mov    $0xffffffff,%eax
mov    %edi,%ecx
lea    0xeed(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0xfffffffe,%eax
ret
cmp    $0x80,%edi
jne    1130 <doswitch+0x30>
mov    $0xfffffffb,%eax
ret
mov    $0xfffffffa,%eax
ret
mov    $0x2a,%eax
ret
mov    $0xfffffffd,%eax
ret

LLVM IR (-O0):
define i32 @doswitch(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %10 [
i32 0, label %5
i32 2, label %6
i32 8, label %7
i32 5, label %8
i32 128, label %9
]
5: ; preds = %1
store i32 -1, i32* %2
br label %11
6: ; preds = %1
store i32 -2, i32* %2
br label %11
7: ; preds = %1
store i32 -3, i32* %2
br label %11
8: ; preds = %1
store i32 42, i32* %2
br label %11
9: ; preds = %1
store i32 -5, i32* %2
br label %11
10: ; preds = %1
store i32 -6, i32* %2
br label %11
11: ; preds = %10, %9, %8, %7, %6, %5
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @doswitch(i32 %0) {
switch i32 %0, label %6 [
i32 0, label %7
i32 2, label %2
i32 8, label %3
i32 5, label %4
i32 128, label %5
]
2: ; preds = %1
br label %7
3: ; preds = %1
br label %7
4: ; preds = %1
br label %7
5: ; preds = %1
br label %7
6: ; preds = %1
br label %7
7: ; preds = %1, %6, %5, %4, %3, %2
%8 = phi i32 [ -6, %6 ], [ -5, %5 ], [ 42, %4 ], [ -3, %3 ], [ -2, %2 ], [ -1, %1 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ errorf(char *, size_t);
int /*<<< orphan*/ exit(int);
void *realloc(void *, size_t);
void *safe_realloc(void *ptr, size_t size) {
  void *result = realloc(ptr, size);
  if (result == NULL) {
    errorf("Failed to reallocate %i bytes.\n", size);
    exit(127);
  }
  return result;
}


x86 assembly (clang, -O0):
<safe_realloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1040 <realloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    1176 <safe_realloc+0x46>
mov    -0x10(%rbp),%rsi
lea    0xe99(%rip),%rdi
call   1030 <errorf@plt>
mov    $0x7f,%edi
call   1050 <exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_realloc>:
push   %rbx
mov    %rsi,%rbx
call   1040 <realloc@plt>
test   %rax,%rax
je     1140 <safe_realloc+0x10>
pop    %rbx
ret
lea    0xeb9(%rip),%rdi
mov    %rbx,%rsi
call   1030 <errorf@plt>
mov    $0x7f,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"Failed to reallocate %i bytes.\0A\00"
define i8* @safe_realloc(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
%7 = load i64, i64* %4
%8 = call i8* @realloc(i8* %6, i64 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %15
11: ; preds = %2
%12 = load i64, i64* %4
%13 = call i32 @errorf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i64 %12)
%14 = call i32 @exit(i32 127)
unreachable
15: ; preds = %2
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
@.str = [32 x i8] c"Failed to reallocate %i bytes.\0A\00"
define noalias i8* @safe_realloc(i8* nocapture %0, i64 %1) {
%3 = tail call i8* @realloc(i8* %0, i64 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i32 @errorf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0), i64 %1)
%7 = tail call i32 @exit(i32 127)
unreachable
8: ; preds = %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void irq_handler(void) { printf("IRQ HANDLER\n"); }


x86 assembly (clang, -O0):
<irq_handler>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<irq_handler>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"IRQ HANDLER\0A\00"
define void @irq_handler() {
%1 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"IRQ HANDLER\00"
define void @irq_handler() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef scalar_t__ uint64_t;
typedef scalar_t__ uint32_t;
typedef scalar_t__ l;
typedef scalar_t__ int8_t;
typedef scalar_t__ int32_t;

/* Variables and functions */
int32_t int8_comparator(const void *l, const void *r) {
  return (int8_t)(uint32_t)(uint64_t)(l) - (int8_t)(uint32_t)(uint64_t)(r);
}


x86 assembly (clang, -O0):
<int8_comparator>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int8_comparator>:
mov    %rdi,%rax
sub    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @int8_comparator(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = ptrtoint i8* %5 to i64
%7 = load i8*, i8** %4
%8 = ptrtoint i8* %7 to i64
%9 = sub nsw i64 %6, %8
ret i64 %9
}

LLVM IR (-O2):
define i64 @int8_comparator(i8* %0, i8* %1) {
%3 = ptrtoint i8* %0 to i64
%4 = ptrtoint i8* %1 to i64
%5 = sub nsw i64 %3, %4
ret i64 %5
}
void gsym_addr(int t, int a) {}


x86 assembly (clang, -O0):
<gsym_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsym_addr>:
ret

LLVM IR (-O0):
define void @gsym_addr(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @gsym_addr(i32 %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ posix_spawn_file_actions_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int posix_spawn_file_actions_addclose(posix_spawn_file_actions_t *file_actions,
                                      int fildes) {
  ;
  errno = ENOSYS;
  return -1;
  ;
}


x86 assembly (clang, -O0):
<posix_spawn_file_actions_addclose>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ed6(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebd(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<posix_spawn_file_actions_addclose>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawn_file_actions_addclose(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @posix_spawn_file_actions_addclose(i32* nocapture readnone %0, i32 %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int stub1();
void evaltest(int (*test)()) {
  int result = (*test)();
  if (result != 0) {
    exit(result);
  }
}


x86 assembly (clang, -O0):
<evaltest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   *-0x8(%rbp)
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     1136 <evaltest+0x26>
mov    -0xc(%rbp),%edi
call   1030 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<evaltest>:
push   %rax
xor    %eax,%eax
call   *%rdi
test   %eax,%eax
jne    111b <evaltest+0xb>
pop    %rax
ret
mov    %eax,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @evaltest(i32 (...)* %0) {
%2 = alloca i32 (...)*
%3 = alloca i32
store i32 (...)* %0, i32 (...)** %2
%4 = load i32 (...)*, i32 (...)** %2
%5 = call i32 (...) %4()
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %3
%10 = call i32 @exit(i32 %9)
unreachable
11: ; preds = %1
ret void
}

LLVM IR (-O2):
define void @evaltest(i32 (...)* nocapture %0) {
%2 = tail call i32 (...) %0()
%3 = icmp eq i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @exit(i32 %2)
unreachable
6: ; preds = %1
ret void
}
unsigned long b_disk_read(void *mem, unsigned long start, unsigned long num,
                          unsigned long disknum) {
  unsigned long tlong;
  asm volatile("call *0x00100030"
               : "=c"(tlong)
               : "a"(start), "c"(num), "d"(disknum), "D"(mem));
  return tlong;
}


x86 assembly (clang, -O0):
<b_disk_read>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%rdx
mov    -0x8(%rbp),%rdi
call   *0x100030
mov    %rcx,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_disk_read>:
mov    %rcx,%r8
mov    %rdx,%rcx
mov    %rsi,%rax
mov    %r8,%rdx
call   *0x100030
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @b_disk_read(i8* %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
store i8* %0, i8** %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%10 = load i64, i64* %6
%11 = load i64, i64* %7
%12 = load i64, i64* %8
%13 = load i8*, i8** %5
%14 = call i64 asm sideeffect "call *0x00100030", "={cx},{ax},{cx},{dx},{di},~{dirflag},~{fpsr},~{flags}"(i64 %10, i64 %11, i64 %12, i8* %13)
store i64 %14, i64* %9
%15 = load i64, i64* %9
ret i64 %15
}

LLVM IR (-O2):
define i64 @b_disk_read(i8* %0, i64 %1, i64 %2, i64 %3) {
%5 = tail call i64 asm sideeffect "call *0x00100030", "={cx},{ax},{cx},{dx},{di},~{dirflag},~{fpsr},~{flags}"(i64 %1, i64 %2, i64 %3, i8* %0)
ret i64 %5
}
void orgfx_vga_set_vbarb(unsigned int addr) {
  *((volatile unsigned int *)((0x97000000 + 0x018))) = addr;
}


x86 assembly (clang, -O0):
<orgfx_vga_set_vbarb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x97000018,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<orgfx_vga_set_vbarb>:
mov    $0x97000018,%eax
mov    %edi,(%rax)
ret

LLVM IR (-O0):
define void @orgfx_vga_set_vbarb(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
store volatile i32 %3, i32* inttoptr (i64 2533359640 to i32*)
ret void
}

LLVM IR (-O2):
define void @orgfx_vga_set_vbarb(i32 %0) {
store volatile i32 %0, i32* inttoptr (i64 2533359640 to i32*)
ret void
}
/* Variables and functions */
double sqrt(double);
double emsqrt(double x) { return sqrt(x); }


x86 assembly (clang, -O0):
<emsqrt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <sqrt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emsqrt>:
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     111f <emsqrt+0xf>
sqrtsd %xmm0,%xmm0
ret
jmp    1030 <sqrt@plt>

LLVM IR (-O0):
define double @emsqrt(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @sqrt(double %3)
ret double %4
}

LLVM IR (-O2):
define double @emsqrt(double %0) {
%2 = tail call double @sqrt(double %0)
ret double %2
}
int test_imm_F3uint16_reg(unsigned short val) {
  return ((val) & (-0xF3 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_F3uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0xffffff0d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_F3uint16_reg>:
test   $0xff0d,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_F3uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, -243
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_F3uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, -243
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ WARN_ON(int);
void radix__flush_all_lpid(unsigned int lpid) { WARN_ON(1); }


x86 assembly (clang, -O0):
<radix__flush_all_lpid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <WARN_ON@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<radix__flush_all_lpid>:
mov    $0x1,%edi
jmp    1030 <WARN_ON@plt>

LLVM IR (-O0):
define void @radix__flush_all_lpid(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @WARN_ON(i32 1)
ret void
}

LLVM IR (-O2):
define void @radix__flush_all_lpid(i32 %0) {
%2 = tail call i32 @WARN_ON(i32 1)
ret void
}
double MAXR(link)
int *link;
{ return (0.0); }


x86 assembly (clang, -O0):
<MAXR>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<MAXR>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @MAXR(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @MAXR(i32* nocapture readnone %0) {
ret double 0.000000e+00
}
void rsr() {
  asm volatile("movq %%rsp, %%r13\n\t"
               "movq %%r15, %%rsp\n\t"
               "popq %%r14\n\t"
               "popq %%rax\n\t"
               "movq (%%rsp), %%r14\n\t"
               "movq %%rsp, %%r15\n\t"
               "movq %%r13, %%rsp\n\t"
               "jmp *%%rax\n\t" ::
                   :);
}


x86 assembly (clang, -O0):
<rsr>:
push   %rbp
mov    %rsp,%rbp
mov    %rsp,%r13
mov    %r15,%rsp
pop    %r14
pop    %rax
mov    (%rsp),%r14
mov    %rsp,%r15
mov    %r13,%rsp
jmp    *%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rsr>:
mov    %rsp,%r13
mov    %r15,%rsp
pop    %r14
pop    %rax
mov    (%rsp),%r14
mov    %rsp,%r15
mov    %r13,%rsp
jmp    *%rax
ret

LLVM IR (-O0):
define void @rsr() {
ret void
}

LLVM IR (-O2):
define void @rsr() {
tail call void asm sideeffect "movq %rsp, %r13\0A\09movq %r15, %rsp\0A\09popq %r14\0A\09popq %rax\0A\09movq (%rsp), %r14\0A\09movq %rsp, %r15\0A\09movq %r13, %rsp\0A\09jmp *%rax\0A\09", "~{dirflag},~{fpsr},~{flags}"()
ret void
}