xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void testInline(int arg) { printf("%d\n", arg); }


x86 assembly (clang, -O0):
<testInline>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testInline>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @testInline(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @testInline(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Variables and functions */
scalar_t__ RAND_MAX;
int rand();
double rand_double() {
  int r = rand();
  return (double)r / ((double)RAND_MAX + 1.0);
}


x86 assembly (clang, -O0):
<rand_double>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
mov    %eax,-0x4(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm0
mov    0x2eba(%rip),%rax
cvtsi2sdq (%rax),%xmm1
movsd  0xec5(%rip),%xmm2
addsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_double>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cvtsi2sd %eax,%xmm0
mov    0x2ec5(%rip),%rax
cvtsi2sdq (%rax),%xmm1
addsd  0xed0(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@RAND_MAX = global i64 0
define double @rand_double() {
%1 = alloca i32
%2 = call i32 (...) @rand()
store i32 %2, i32* %1
%3 = load i32, i32* %1
%4 = sitofp i32 %3 to double
%5 = load i64, i64* @RAND_MAX
%6 = sitofp i64 %5 to double
%7 = fadd double %6, 1.000000e+00
%8 = fdiv double %4, %7
ret double %8
}

LLVM IR (-O2):
@RAND_MAX = global i64 0
define double @rand_double() {
%1 = tail call i32 (...) @rand()
%2 = sitofp i32 %1 to double
%3 = load i64, i64* @RAND_MAX
%4 = sitofp i64 %3 to double
%5 = fadd double %4, 1.000000e+00
%6 = fdiv double %2, %5
ret double %6
}
/* Type definitions */
typedef int /*<<< orphan*/ PKCS7_ISSUER_AND_SERIAL;
typedef int /*<<< orphan*/ ASN1_VALUE;

/* Variables and functions */
scalar_t__ ASN1_item_d2i(int /*<<< orphan*/ **, unsigned char const **, long,
                         int /*<<< orphan*/ *);
int /*<<< orphan*/ PKCS7_ISSUER_AND_SERIAL_it;
PKCS7_ISSUER_AND_SERIAL *
d2i_PKCS7_ISSUER_AND_SERIAL(PKCS7_ISSUER_AND_SERIAL **a,
                            const unsigned char **in, long len) {
  return (PKCS7_ISSUER_AND_SERIAL *)ASN1_item_d2i((ASN1_VALUE **)a, in, len,
                                                  &PKCS7_ISSUER_AND_SERIAL_it);
}


x86 assembly (clang, -O0):
<d2i_PKCS7_ISSUER_AND_SERIAL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    0x2eb1(%rip),%rcx
call   1030 <ASN1_item_d2i@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2i_PKCS7_ISSUER_AND_SERIAL>:
mov    0x2ed1(%rip),%rcx
jmp    1030 <ASN1_item_d2i@plt>

LLVM IR (-O0):
@PKCS7_ISSUER_AND_SERIAL_it = global i32 0
define i32* @d2i_PKCS7_ISSUER_AND_SERIAL(i32** %0, i8** %1, i64 %2) {
%4 = alloca i32**
%5 = alloca i8**
%6 = alloca i64
store i32** %0, i32*** %4
store i8** %1, i8*** %5
store i64 %2, i64* %6
%7 = load i32**, i32*** %4
%8 = load i8**, i8*** %5
%9 = load i64, i64* %6
%10 = call i64 @ASN1_item_d2i(i32** %7, i8** %8, i64 %9, i32* @PKCS7_ISSUER_AND_SERIAL_it)
%11 = inttoptr i64 %10 to i32*
ret i32* %11
}

LLVM IR (-O2):
@PKCS7_ISSUER_AND_SERIAL_it = global i32 0
define i32* @d2i_PKCS7_ISSUER_AND_SERIAL(i32** %0, i8** %1, i64 %2) {
%4 = tail call i64 @ASN1_item_d2i(i32** %0, i8** %1, i64 %2, i32* @PKCS7_ISSUER_AND_SERIAL_it)
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
/* Variables and functions */
int /*<<< orphan*/ Scr_AddFloat(int);
int /*<<< orphan*/ Scr_Error(char *);
int /*<<< orphan*/ Scr_GetFloat(int);
int Scr_GetNumParam();
int powf(int /*<<< orphan*/, int /*<<< orphan*/);
void GScr_Pow() {
  if (Scr_GetNumParam() != 2) {
    Scr_Error("Usage: pow(<float>, <float>)\n");
    return;
  }
  int p = powf(Scr_GetFloat(0), Scr_GetFloat(1));
  Scr_AddFloat(p);
}


x86 assembly (clang, -O0):
<GScr_Pow>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <Scr_GetNumParam@plt>
cmp    $0x2,%eax
je     1179 <GScr_Pow+0x29>
lea    0xe91(%rip),%rdi
call   1060 <Scr_Error@plt>
jmp    11a2 <GScr_Pow+0x52>
xor    %edi,%edi
call   1070 <Scr_GetFloat@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1,%edi
call   1070 <Scr_GetFloat@plt>
mov    -0x8(%rbp),%edi
mov    %eax,%esi
call   1030 <powf@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1050 <Scr_AddFloat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GScr_Pow>:
push   %rbx
xor    %eax,%eax
call   1040 <Scr_GetNumParam@plt>
cmp    $0x2,%eax
jne    1181 <GScr_Pow+0x31>
xor    %edi,%edi
call   1070 <Scr_GetFloat@plt>
mov    %eax,%ebx
mov    $0x1,%edi
call   1070 <Scr_GetFloat@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <powf@plt>
mov    %eax,%edi
pop    %rbx
jmp    1050 <Scr_AddFloat@plt>
lea    0xe78(%rip),%rdi
pop    %rbx
jmp    1060 <Scr_Error@plt>

LLVM IR (-O0):
@.str = [30 x i8] c"Usage: pow(<float>, <float>)\0A\00"
define void @GScr_Pow() {
%1 = alloca i32
%2 = call i32 (...) @Scr_GetNumParam()
%3 = icmp ne i32 %2, 2
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = call i32 @Scr_Error(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
br label %12
6: ; preds = %0
%7 = call i32 @Scr_GetFloat(i32 0)
%8 = call i32 @Scr_GetFloat(i32 1)
%9 = call i32 @powf(i32 %7, i32 %8)
store i32 %9, i32* %1
%10 = load i32, i32* %1
%11 = call i32 @Scr_AddFloat(i32 %10)
br label %12
12: ; preds = %6, %4
ret void
}

LLVM IR (-O2):
@.str = [30 x i8] c"Usage: pow(<float>, <float>)\0A\00"
define void @GScr_Pow() {
%1 = tail call i32 (...) @Scr_GetNumParam()
%2 = icmp eq i32 %1, 2
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 @Scr_Error(i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
br label %10
5: ; preds = %0
%6 = tail call i32 @Scr_GetFloat(i32 0)
%7 = tail call i32 @Scr_GetFloat(i32 1)
%8 = tail call i32 @powf(i32 %6, i32 %7)
%9 = tail call i32 @Scr_AddFloat(i32 %8)
br label %10
10: ; preds = %5, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ leptonBeginSPI();
int /*<<< orphan*/ leptonEndSPI();
void resetLeptonSPIBus() {
  leptonEndSPI();
  delay(186);
  leptonBeginSPI();
}


x86 assembly (clang, -O0):
<resetLeptonSPIBus>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <leptonEndSPI@plt>
mov    $0xba,%edi
call   1040 <delay@plt>
mov    $0x0,%al
call   1030 <leptonBeginSPI@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<resetLeptonSPIBus>:
push   %rax
xor    %eax,%eax
call   1050 <leptonEndSPI@plt>
mov    $0xba,%edi
call   1040 <delay@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <leptonBeginSPI@plt>

LLVM IR (-O0):
define void @resetLeptonSPIBus() {
%1 = call i32 (...) @leptonEndSPI()
%2 = call i32 @delay(i32 186)
%3 = call i32 (...) @leptonBeginSPI()
ret void
}

LLVM IR (-O2):
define void @resetLeptonSPIBus() {
%1 = tail call i32 (...) @leptonEndSPI()
%2 = tail call i32 @delay(i32 186)
%3 = tail call i32 (...) @leptonBeginSPI()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int main(void) {
  fprintf(stderr, "hello world!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [14 x i8] c"hello world!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @stderr
%3 = call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [14 x i8] c"hello world!\0A\00"
define i32 @main() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
int c_isleap_gregorian_y0(int year, int *leap) {
  *leap = (((year % 4) == 0) && ((year % 100) != 0)) || ((year % 400) == 0);
  return (0);
}


x86 assembly (clang, -O0):
<c_isleap_gregorian_y0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1138 <c_isleap_gregorian_y0+0x38>
mov    -0x4(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
mov    $0x1,%al
cmp    $0x0,%edx
mov    %al,-0x11(%rbp)
jne    114c <c_isleap_gregorian_y0+0x4c>
mov    -0x4(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_isleap_gregorian_y0>:
test   $0x3,%dil
jne    112b <c_isleap_gregorian_y0+0x2b>
movslq %edi,%rax
imul   $0x51eb851f,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x25,%rax
add    %ecx,%eax
imul   $0x64,%eax,%ecx
mov    %edi,%edx
mov    $0x1,%eax
sub    %ecx,%edx
jne    1145 <c_isleap_gregorian_y0+0x45>
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
ror    $0x4,%ecx
xor    %eax,%eax
cmp    $0xa3d70b,%ecx
setb   %al
mov    %eax,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c_isleap_gregorian_y0(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = srem i32 %5, 4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* %3
%10 = srem i32 %9, 100
%11 = icmp ne i32 %10, 0
br i1 %11, label %16, label %12
12: ; preds = %8, %2
%13 = load i32, i32* %3
%14 = srem i32 %13, 400
%15 = icmp eq i32 %14, 0
br label %16
16: ; preds = %12, %8
%17 = phi i1 [ true, %8 ], [ %15, %12 ]
%18 = zext i1 %17 to i32
%19 = load i32*, i32** %4
store i32 %18, i32* %19
ret i32 0
}

LLVM IR (-O2):
define i32 @c_isleap_gregorian_y0(i32 %0, i32* nocapture writeonly %1) {
%3 = and i32 %0, 3
%4 = icmp ne i32 %3, 0
%5 = srem i32 %0, 100
%6 = icmp eq i32 %5, 0
%7 = or i1 %4, %6
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = srem i32 %0, 400
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
br label %12
12: ; preds = %2, %8
%13 = phi i32 [ %11, %8 ], [ 1, %2 ]
store i32 %13, i32* %1
ret i32 0
}
int sabrina(void) { return 13; }


x86 assembly (clang, -O0):
<sabrina>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sabrina>:
mov    $0xd,%eax
ret

LLVM IR (-O0):
define i32 @sabrina() {
ret i32 13
}

LLVM IR (-O2):
define i32 @sabrina() {
ret i32 13
}
/* Variables and functions */
int LongSwap(int);
int BigLong(int l) { return LongSwap(l); }


x86 assembly (clang, -O0):
<BigLong>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <LongSwap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BigLong>:
jmp    1030 <LongSwap@plt>

LLVM IR (-O0):
define i32 @BigLong(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @LongSwap(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @BigLong(i32 %0) {
%2 = tail call i32 @LongSwap(i32 %0)
ret i32 %2
}
float _sub(float operando1, float operando2) { return operando1 - operando2; }


x86 assembly (clang, -O0):
<_sub>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
subss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_sub>:
subss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @_sub(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fsub float %5, %6
ret float %7
}

LLVM IR (-O2):
define float @_sub(float %0, float %1) {
%3 = fsub float %0, %1
ret float %3
}
/* Variables and functions */
int /*<<< orphan*/ memset(int *, int /*<<< orphan*/, int);
void clr2(int *x) { memset(x, 0, 2); }


x86 assembly (clang, -O0):
<clr2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x2,%edx
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clr2>:
xor    %esi,%esi
mov    $0x2,%edx
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @clr2(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @memset(i32* %3, i32 0, i32 2)
ret void
}

LLVM IR (-O2):
define void @clr2(i32* %0) {
%2 = tail call i32 @memset(i32* %0, i32 0, i32 2)
ret void
}
int isPermissible(int board[8][8], int row, int col) {
  if (row < 0 || row >= 8 || col < 0 || col >= 8) {
    return 0;
  }
  if (board[row][col] != 0) {
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<isPermissible>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
cmpl   $0x0,-0x14(%rbp)
jl     1136 <isPermissible+0x36>
cmpl   $0x8,-0x14(%rbp)
jge    1136 <isPermissible+0x36>
cmpl   $0x0,-0x18(%rbp)
jl     1136 <isPermissible+0x36>
cmpl   $0x8,-0x18(%rbp)
jl     1142 <isPermissible+0x42>
movl   $0x0,-0x4(%rbp)
jmp    1172 <isPermissible+0x72>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
shl    $0x5,%rcx
add    %rcx,%rax
movslq -0x18(%rbp),%rcx
cmpl   $0x0,(%rax,%rcx,4)
je     116b <isPermissible+0x6b>
movl   $0x0,-0x4(%rbp)
jmp    1172 <isPermissible+0x72>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isPermissible>:
mov    %edx,%ecx
or     %esi,%ecx
xor    %eax,%eax
cmp    $0x7,%ecx
ja     111f <isPermissible+0x1f>
mov    %esi,%eax
mov    %edx,%ecx
shl    $0x5,%rax
add    %rax,%rdi
xor    %eax,%eax
cmpl   $0x0,(%rdi,%rcx,4)
sete   %al
ret

LLVM IR (-O0):
define i32 @isPermissible([8 x i32]* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca [8 x i32]*
%6 = alloca i32
%7 = alloca i32
store [8 x i32]* %0, [8 x i32]** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 0
br i1 %9, label %19, label %10
10: ; preds = %3
%11 = load i32, i32* %6
%12 = icmp sge i32 %11, 8
br i1 %12, label %19, label %13
13: ; preds = %10
%14 = load i32, i32* %7
%15 = icmp slt i32 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %13
%17 = load i32, i32* %7
%18 = icmp sge i32 %17, 8
br i1 %18, label %19, label %20
19: ; preds = %16, %13, %10, %3
store i32 0, i32* %4
br label %32
20: ; preds = %16
%21 = load [8 x i32]*, [8 x i32]** %5
%22 = load i32, i32* %6
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds [8 x i32], [8 x i32]* %21, i64 %23
%25 = load i32, i32* %7
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds [8 x i32], [8 x i32]* %24, i64 0, i64 %26
%28 = load i32, i32* %27
%29 = icmp ne i32 %28, 0
br i1 %29, label %30, label %31
30: ; preds = %20
store i32 0, i32* %4
br label %32
31: ; preds = %20
store i32 1, i32* %4
br label %32
32: ; preds = %31, %30, %19
%33 = load i32, i32* %4
ret i32 %33
}

LLVM IR (-O2):
define i32 @isPermissible([8 x i32]* nocapture %0, i32 %1, i32 %2) {
%4 = or i32 %2, %1
%5 = icmp ult i32 %4, 8
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = zext i32 %1 to i64
%8 = zext i32 %2 to i64
%9 = getelementptr inbounds [8 x i32], [8 x i32]* %0, i64 %7, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, 0
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %6, %3
%14 = phi i32 [ 0, %3 ], [ %12, %6 ]
ret i32 %14
}
void XcmsAddColorSpace() {}


x86 assembly (clang, -O0):
<XcmsAddColorSpace>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XcmsAddColorSpace>:
ret

LLVM IR (-O0):
define void @XcmsAddColorSpace() {
ret void
}

LLVM IR (-O2):
define void @XcmsAddColorSpace() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ errno;
int /*<<< orphan*/ error_exit(int /*<<< orphan*/, char *);
void *malloc(size_t);
void *safe_malloc(size_t size, char *error_message) {
  void *result = malloc(size);
  if (!result)
    error_exit(errno, error_message);
  return result;
}


x86 assembly (clang, -O0):
<safe_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    115a <safe_malloc+0x3a>
mov    0x2e91(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
call   1030 <error_exit@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_malloc>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    1145 <safe_malloc+0x25>
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
mov    %r14,%rsi
call   1030 <error_exit@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@errno = global i32 0
define i8* @safe_malloc(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i8*
store i64 %0, i64* %3
store i8* %1, i8** %4
%6 = load i64, i64* %3
%7 = call i8* @malloc(i64 %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = icmp ne i8* %8, null
br i1 %9, label %14, label %10
10: ; preds = %2
%11 = load i32, i32* @errno
%12 = load i8*, i8** %4
%13 = call i32 @error_exit(i32 %11, i8* %12)
br label %14
14: ; preds = %10, %2
%15 = load i8*, i8** %5
ret i8* %15
}

LLVM IR (-O2):
@errno = global i32 0
define noalias i8* @safe_malloc(i64 %0, i8* %1) {
%3 = tail call i8* @malloc(i64 %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load i32, i32* @errno
%7 = tail call i32 @error_exit(i32 %6, i8* %1)
br label %8
8: ; preds = %5, %2
ret i8* %3
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void memfree(void *heap, void *ptr) {
  (void)heap;
  free(ptr);
}


x86 assembly (clang, -O0):
<memfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memfree>:
mov    %rsi,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @memfree(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @free(i8* %6)
ret void
}

LLVM IR (-O2):
define void @memfree(i8* nocapture readnone %0, i8* nocapture %1) {
%3 = tail call i32 @free(i8* %1)
ret void
}
/* Variables and functions */
int RTLD_LAZY;
int RTLD_LOCAL;
int /*<<< orphan*/ dlclose(void *);
void *dlopen(char *, int);
int /*<<< orphan*/ puts(char *);
int foo(void) {
  void *p = dlopen("in-subdir.so", RTLD_LAZY | RTLD_LOCAL);
  if (p != NULL) {
    dlclose(p);
    return 0;
  }
  puts("couldn't open in-subdir.so from foo");
  return 1;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea1(%rip),%rax
mov    (%rax),%esi
mov    0x2e88(%rip),%rax
or     (%rax),%esi
lea    0xeaf(%rip),%rdi
call   1040 <dlopen@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     117a <foo+0x4a>
mov    -0x10(%rbp),%rdi
call   1050 <dlclose@plt>
movl   $0x0,-0x4(%rbp)
jmp    118d <foo+0x5d>
lea    0xe8c(%rip),%rdi
call   1030 <puts@plt>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
mov    0x2ea8(%rip),%rax
mov    0x2e91(%rip),%rcx
mov    (%rcx),%esi
or     (%rax),%esi
lea    0xeb6(%rip),%rdi
call   1040 <dlopen@plt>
test   %rax,%rax
je     1160 <foo+0x30>
mov    %rax,%rdi
call   1050 <dlclose@plt>
xor    %eax,%eax
pop    %rcx
ret
lea    0xea6(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"in-subdir.so\00"
@RTLD_LAZY = global i32 0
@RTLD_LOCAL = global i32 0
@.str.1 = [36 x i8] c"couldn't open in-subdir.so from foo\00"
define i32 @foo() {
%1 = alloca i32
%2 = alloca i8*
%3 = load i32, i32* @RTLD_LAZY
%4 = load i32, i32* @RTLD_LOCAL
%5 = or i32 %3, %4
%6 = call i8* @dlopen(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %5)
store i8* %6, i8** %2
%7 = load i8*, i8** %2
%8 = icmp ne i8* %7, null
br i1 %8, label %9, label %12
9: ; preds = %0
%10 = load i8*, i8** %2
%11 = call i32 @dlclose(i8* %10)
store i32 0, i32* %1
br label %14
12: ; preds = %0
%13 = call i32 @puts(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0))
store i32 1, i32* %1
br label %14
14: ; preds = %12, %9
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
@.str = [13 x i8] c"in-subdir.so\00"
@RTLD_LAZY = global i32 0
@RTLD_LOCAL = global i32 0
@.str.1 = [36 x i8] c"couldn't open in-subdir.so from foo\00"
define i32 @foo() {
%1 = load i32, i32* @RTLD_LAZY
%2 = load i32, i32* @RTLD_LOCAL
%3 = or i32 %2, %1
%4 = tail call i8* @dlopen(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %0
%7 = tail call i32 @dlclose(i8* %4)
br label %10
8: ; preds = %0
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0))
br label %10
10: ; preds = %8, %6
%11 = phi i32 [ 0, %6 ], [ 1, %8 ]
ret i32 %11
}
unsigned Cyc_Position_segment_join(unsigned s1, unsigned s2) {
  unsigned _T0;
  unsigned _T1;
  unsigned _T2;
  if (s1 != 0U)
    goto _TL0;
  _T0 = s2;
  return _T0;
_TL0:
  if (s2 != 0U)
    goto _TL2;
  _T1 = s1;
  return _T1;
_TL2:
  _T2 = s1;
  return _T2;
}


x86 assembly (clang, -O0):
<Cyc_Position_segment_join>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1119 <Cyc_Position_segment_join+0x19>
jmp    112a <Cyc_Position_segment_join+0x2a>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1156 <Cyc_Position_segment_join+0x56>
cmpl   $0x0,-0xc(%rbp)
je     1139 <Cyc_Position_segment_join+0x39>
jmp    114a <Cyc_Position_segment_join+0x4a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1156 <Cyc_Position_segment_join+0x56>
mov    -0x8(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Position_segment_join>:
mov    %esi,%eax
test   %edi,%edi
cmovne %edi,%eax
ret

LLVM IR (-O0):
define i32 @Cyc_Position_segment_join(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %2
br label %15
12: ; preds = %2
%13 = load i32, i32* %5
store i32 %13, i32* %6
%14 = load i32, i32* %6
store i32 %14, i32* %3
br label %25
15: ; preds = %11
%16 = load i32, i32* %5
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %19
18: ; preds = %15
br label %22
19: ; preds = %15
%20 = load i32, i32* %4
store i32 %20, i32* %7
%21 = load i32, i32* %7
store i32 %21, i32* %3
br label %25
22: ; preds = %18
%23 = load i32, i32* %4
store i32 %23, i32* %8
%24 = load i32, i32* %8
store i32 %24, i32* %3
br label %25
25: ; preds = %22, %19, %12
%26 = load i32, i32* %3
ret i32 %26
}

LLVM IR (-O2):
define i32 @Cyc_Position_segment_join(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
%4 = select i1 %3, i32 %1, i32 %0
ret i32 %4
}
/* Variables and functions */
const char *pstrchr(const char *s, int c) {
  do {
    if ((int)*s == c)
      return s;
  } while (*s++);
  return NULL;
}


x86 assembly (clang, -O0):
<pstrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    -0x14(%rbp),%eax
jne    1128 <pstrchr+0x28>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    114d <pstrchr+0x4d>
jmp    112d <pstrchr+0x2d>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
cmpb   $0x0,(%rax)
jne    110b <pstrchr+0xb>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pstrchr>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movsbl (%rax),%ecx
cmp    %esi,%ecx
je     1121 <pstrchr+0x21>
add    $0x1,%rax
test   %cl,%cl
jne    1110 <pstrchr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @pstrchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i32, i32* %5
%11 = icmp eq i32 %9, %10
br i1 %11, label %12, label %14
12: ; preds = %6
%13 = load i8*, i8** %4
store i8* %13, i8** %3
br label %21
14: ; preds = %6
br label %15
15: ; preds = %14
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %4
%18 = load i8, i8* %16
%19 = icmp ne i8 %18, 0
br i1 %19, label %6, label %20
20: ; preds = %15
store i8* null, i8** %3
br label %21
21: ; preds = %20, %12
%22 = load i8*, i8** %3
ret i8* %22
}

LLVM IR (-O2):
define i8* @pstrchr(i8* %0, i32 %1) {
br label %3
3: ; preds = %8, %2
%4 = phi i8* [ %0, %2 ], [ %9, %8 ]
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp eq i32 %6, %1
br i1 %7, label %11, label %8
8: ; preds = %3
%9 = getelementptr inbounds i8, i8* %4, i64 1
%10 = icmp eq i8 %5, 0
br i1 %10, label %11, label %3
11: ; preds = %8, %3
%12 = phi i8* [ %4, %3 ], [ null, %8 ]
ret i8* %12
}
/* Variables and functions */
int /*<<< orphan*/ outbyte(char);
void tab() { outbyte('\t'); }


x86 assembly (clang, -O0):
<tab>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9,%edi
call   1030 <outbyte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tab>:
mov    $0x9,%edi
jmp    1030 <outbyte@plt>

LLVM IR (-O0):
define void @tab() {
%1 = call i32 @outbyte(i8 signext 9)
ret void
}

LLVM IR (-O2):
define void @tab() {
%1 = tail call i32 @outbyte(i8 signext 9)
ret void
}
void RTLogCreateExV(void) {}


x86 assembly (clang, -O0):
<RTLogCreateExV>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTLogCreateExV>:
ret

LLVM IR (-O0):
define void @RTLogCreateExV() {
ret void
}

LLVM IR (-O2):
define void @RTLogCreateExV() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ addWaiting(int);
int sesc_suspend(int pid) {
  addWaiting(pid);
  return 1;
}


x86 assembly (clang, -O0):
<sesc_suspend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <addWaiting@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sesc_suspend>:
push   %rax
call   1030 <addWaiting@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sesc_suspend(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @addWaiting(i32 %3)
ret i32 1
}

LLVM IR (-O2):
define i32 @sesc_suspend(i32 %0) {
%2 = tail call i32 @addWaiting(i32 %0)
ret i32 1
}
void disablePWMpin(void) {}


x86 assembly (clang, -O0):
<disablePWMpin>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disablePWMpin>:
ret

LLVM IR (-O0):
define void @disablePWMpin() {
ret void
}

LLVM IR (-O2):
define void @disablePWMpin() {
ret void
}
/* Type definitions */
struct stat {
  int st_size;
};

/* Variables and functions */
int fstat(int, struct stat *);
int get_file_size(int fd) {
  struct stat file_stat;
  if (fstat(fd, &file_stat) == -1)
    return -1;
  return file_stat.st_size;
}


x86 assembly (clang, -O0):
<get_file_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
lea    -0x10(%rbp),%rsi
call   1030 <fstat@plt>
cmp    $0xffffffff,%eax
jne    113c <get_file_size+0x2c>
movl   $0xffffffff,-0x4(%rbp)
jmp    1142 <get_file_size+0x32>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_file_size>:
push   %rax
mov    %rsp,%rsi
call   1030 <fstat@plt>
cmp    $0xffffffff,%eax
je     1121 <get_file_size+0x11>
mov    (%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @get_file_size(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca %struct.stat
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @fstat(i32 %5, %struct.stat* %4)
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %12
9: ; preds = %1
%10 = getelementptr inbounds %struct.stat, %struct.stat* %4, i32 0, i32 0
%11 = load i32, i32* %10
store i32 %11, i32* %2
br label %12
12: ; preds = %9, %8
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @get_file_size(i32 %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @fstat(i32 %0, %struct.stat* %2)
%5 = icmp eq i32 %4, -1
%6 = getelementptr inbounds %struct.stat, %struct.stat* %2, i64 0, i32 0
%7 = load i32, i32* %6
%8 = select i1 %5, i32 -1, i32 %7
ret i32 %8
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t UARTRxErrorGet(uint32_t ui32Base) {
  ;
  return ((*((volatile uint32_t *)(ui32Base + 0x00000004))) & 0x0000000F);
}


x86 assembly (clang, -O0):
<UARTRxErrorGet>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x4,%eax
cltq
mov    (%rax),%eax
and    $0xf,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTRxErrorGet>:
movslq %edi,%rax
mov    0x4(%rax),%eax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @UARTRxErrorGet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 4
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, 15
ret i32 %8
}

LLVM IR (-O2):
define i32 @UARTRxErrorGet(i32 %0) {
%2 = add nsw i32 %0, 4
%3 = sext i32 %2 to i64
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = and i32 %5, 15
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, unsigned char);
void fopRx(unsigned char *p) { printf("R%x", *p & 7); }


x86 assembly (clang, -O0):
<fopRx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
and    $0x7,%eax
lea    0xed3(%rip),%rdi
movzbl %al,%esi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fopRx>:
movzbl (%rdi),%esi
and    $0x7,%esi
lea    0xee3(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"R%x\00"
define void @fopRx(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = zext i8 %4 to i32
%6 = and i32 %5, 7
%7 = trunc i32 %6 to i8
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 zeroext %7)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"R%x\00"
define void @fopRx(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, 7
%4 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 zeroext %3)
ret void
}
/* Variables and functions */
int GET32(int);
int uart_getc_nb(void) {
  if ((GET32((0x20201000 + 0x18)) & 0x10) == 0)
    return (GET32((0x20201000 + 0x00)));
  else
    return -1;
}


x86 assembly (clang, -O0):
<uart_getc_nb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x20201018,%edi
call   1030 <GET32@plt>
and    $0x10,%eax
cmp    $0x0,%eax
jne    1140 <uart_getc_nb+0x30>
mov    $0x20201000,%edi
call   1030 <GET32@plt>
mov    %eax,-0x4(%rbp)
jmp    1147 <uart_getc_nb+0x37>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uart_getc_nb>:
push   %rax
mov    $0x20201018,%edi
call   1030 <GET32@plt>
test   $0x10,%al
jne    112a <uart_getc_nb+0x1a>
mov    $0x20201000,%edi
pop    %rax
jmp    1030 <GET32@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @uart_getc_nb() {
%1 = alloca i32
%2 = call i32 @GET32(i32 538972184)
%3 = and i32 %2, 16
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = call i32 @GET32(i32 538972160)
store i32 %6, i32* %1
br label %8
7: ; preds = %0
store i32 -1, i32* %1
br label %8
8: ; preds = %7, %5
%9 = load i32, i32* %1
ret i32 %9
}

LLVM IR (-O2):
define i32 @uart_getc_nb() {
%1 = tail call i32 @GET32(i32 538972184)
%2 = and i32 %1, 16
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %0
%5 = tail call i32 @GET32(i32 538972160)
br label %6
6: ; preds = %0, %4
%7 = phi i32 [ %5, %4 ], [ -1, %0 ]
ret i32 %7
}
/* Type definitions */
struct in_addr {
  unsigned long s_addr;
};

/* Variables and functions */
int /*<<< orphan*/ inet_aton(char *, struct in_addr *);
int dot_quad_addr(char *str, unsigned long *addr) {
  struct in_addr a;
  if (!inet_aton(str, &a))
    return -1;
  if (addr)
    *addr = a.s_addr;
  return 0;
}


x86 assembly (clang, -O0):
<dot_quad_addr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x20(%rbp),%rsi
call   1030 <inet_aton@plt>
cmp    $0x0,%eax
jne    1142 <dot_quad_addr+0x32>
movl   $0xffffffff,-0x4(%rbp)
jmp    115f <dot_quad_addr+0x4f>
cmpq   $0x0,-0x18(%rbp)
je     1158 <dot_quad_addr+0x48>
mov    -0x20(%rbp),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dot_quad_addr>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0x8(%rsp),%rsi
call   1030 <inet_aton@plt>
test   %eax,%eax
je     1137 <dot_quad_addr+0x27>
xor    %eax,%eax
test   %rbx,%rbx
je     113c <dot_quad_addr+0x2c>
mov    0x8(%rsp),%rcx
mov    %rcx,(%rbx)
jmp    113c <dot_quad_addr+0x2c>
mov    $0xffffffff,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.in_addr = type { i64 }
define i32 @dot_quad_addr(i8* %0, i64* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i64*
%6 = alloca %struct.in_addr
store i8* %0, i8** %4
store i64* %1, i64** %5
%7 = load i8*, i8** %4
%8 = call i32 @inet_aton(i8* %7, %struct.in_addr* %6)
%9 = icmp ne i32 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %2
store i32 -1, i32* %3
br label %19
11: ; preds = %2
%12 = load i64*, i64** %5
%13 = icmp ne i64* %12, null
br i1 %13, label %14, label %18
14: ; preds = %11
%15 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %6, i32 0, i32 0
%16 = load i64, i64* %15
%17 = load i64*, i64** %5
store i64 %16, i64* %17
br label %18
18: ; preds = %14, %11
store i32 0, i32* %3
br label %19
19: ; preds = %18, %10
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
%struct.in_addr = type { i64 }
define i32 @dot_quad_addr(i8* %0, i64* writeonly %1) {
%3 = alloca %struct.in_addr
%4 = bitcast %struct.in_addr* %3 to i8*
%5 = call i32 @inet_aton(i8* %0, %struct.in_addr* %3)
%6 = icmp eq i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %2
%8 = icmp eq i64* %1, null
br i1 %8, label %12, label %9
9: ; preds = %7
%10 = getelementptr inbounds %struct.in_addr, %struct.in_addr* %3, i64 0, i32 0
%11 = load i64, i64* %10
store i64 %11, i64* %1
br label %12
12: ; preds = %7, %9, %2
%13 = phi i32 [ -1, %2 ], [ 0, %9 ], [ 0, %7 ]
ret i32 %13
}
int inrange(int x, int y, int z) {
  return x >= 0 && x < 8 && y >= 0 && y < 8 && z >= 0 && z < 8;
}


x86 assembly (clang, -O0):
<inrange>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0xd(%rbp)
jl     1162 <inrange+0x62>
xor    %eax,%eax
cmpl   $0x8,-0x4(%rbp)
mov    %al,-0xd(%rbp)
jge    1162 <inrange+0x62>
xor    %eax,%eax
cmpl   $0x0,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jl     1162 <inrange+0x62>
xor    %eax,%eax
cmpl   $0x8,-0x8(%rbp)
mov    %al,-0xd(%rbp)
jge    1162 <inrange+0x62>
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jl     1162 <inrange+0x62>
cmpl   $0x8,-0xc(%rbp)
setl   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inrange>:
or     %esi,%edi
or     %edx,%edi
xor    %eax,%eax
cmp    $0x8,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @inrange(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = icmp sge i32 %7, 0
br i1 %8, label %9, label %24
9: ; preds = %3
%10 = load i32, i32* %4
%11 = icmp slt i32 %10, 8
br i1 %11, label %12, label %24
12: ; preds = %9
%13 = load i32, i32* %5
%14 = icmp sge i32 %13, 0
br i1 %14, label %15, label %24
15: ; preds = %12
%16 = load i32, i32* %5
%17 = icmp slt i32 %16, 8
br i1 %17, label %18, label %24
18: ; preds = %15
%19 = load i32, i32* %6
%20 = icmp sge i32 %19, 0
br i1 %20, label %21, label %24
21: ; preds = %18
%22 = load i32, i32* %6
%23 = icmp slt i32 %22, 8
br label %24
24: ; preds = %21, %18, %15, %12, %9, %3
%25 = phi i1 [ false, %18 ], [ false, %15 ], [ false, %12 ], [ false, %9 ], [ false, %3 ], [ %23, %21 ]
%26 = zext i1 %25 to i32
ret i32 %26
}

LLVM IR (-O2):
define i32 @inrange(i32 %0, i32 %1, i32 %2) {
%4 = or i32 %1, %0
%5 = or i32 %4, %2
%6 = icmp ult i32 %5, 8
%7 = zext i1 %6 to i32
ret i32 %7
}
char *var_zero(char *base) {
  static const unsigned long offset = 0;
  return base + offset;
}


x86 assembly (clang, -O0):
<var_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<var_zero>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
@var_zero.offset = internal constant i64 0
define i8* @var_zero(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
ret i8* %4
}

LLVM IR (-O2):
define i8* @var_zero(i8* readnone returned %0) {
ret i8* %0
}
void av_lfg_init_from_data() {}


x86 assembly (clang, -O0):
<av_lfg_init_from_data>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_lfg_init_from_data>:
ret

LLVM IR (-O0):
define void @av_lfg_init_from_data() {
ret void
}

LLVM IR (-O2):
define void @av_lfg_init_from_data() {
ret void
}
unsigned int ipUtils_prefixToBitmask(unsigned int prefix) {
  return (0xFFFFFFFF << (32 - prefix)) & 0xFFFFFFFF;
}


x86 assembly (clang, -O0):
<ipUtils_prefixToBitmask>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x20,%ecx
sub    -0x4(%rbp),%ecx
mov    $0xffffffff,%eax
shl    %cl,%eax
and    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipUtils_prefixToBitmask>:
mov    %edi,%ecx
neg    %cl
mov    $0xffffffff,%eax
shl    %cl,%eax
ret

LLVM IR (-O0):
define i32 @ipUtils_prefixToBitmask(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub i32 32, %3
%5 = shl i32 -1, %4
%6 = and i32 %5, -1
ret i32 %6
}

LLVM IR (-O2):
define i32 @ipUtils_prefixToBitmask(i32 %0) {
%2 = sub i32 32, %0
%3 = shl nsw i32 -1, %2
ret i32 %3
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ window;
};
typedef TYPE_1__ XKeyPressedEvent;

/* Variables and functions */
unsigned long get_XKeyPressedEvent_window(void *_p) {
  return (unsigned long)((XKeyPressedEvent *)_p)->window;
}


x86 assembly (clang, -O0):
<get_XKeyPressedEvent_window>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XKeyPressedEvent_window>:
mov    (%rdi),%rax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i64 @get_XKeyPressedEvent_window(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
define i64 @get_XKeyPressedEvent_window(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
ret i64 %3
}
void *return_null(void *x, void *y) { return 0; }


x86 assembly (clang, -O0):
<return_null>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<return_null>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @return_null(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @return_null(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i8* null
}
/* Variables and functions */
int /*<<< orphan*/ generate_id(char *);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int main() {
  printf("%ld", generate_id("temp2.txt"));
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1040 <generate_id@plt>
mov    %eax,%esi
lea    0xebc(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xedc(%rip),%rdi
call   1040 <generate_id@plt>
lea    0xecc(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%ld\00"
@.str.1 = [10 x i8] c"temp2.txt\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @generate_id(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 1
}

LLVM IR (-O2):
@.str = [4 x i8] c"%ld\00"
@.str.1 = [10 x i8] c"temp2.txt\00"
define i32 @main() {
%1 = tail call i32 @generate_id(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ init_hires_timer();
void INIT_HIRES_TIMER_() { init_hires_timer(); }


x86 assembly (clang, -O0):
<INIT_HIRES_TIMER_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <init_hires_timer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<INIT_HIRES_TIMER_>:
xor    %eax,%eax
jmp    1030 <init_hires_timer@plt>

LLVM IR (-O0):
define void @INIT_HIRES_TIMER_() {
%1 = call i32 (...) @init_hires_timer()
ret void
}

LLVM IR (-O2):
define void @INIT_HIRES_TIMER_() {
%1 = tail call i32 (...) @init_hires_timer()
ret void
}
/* Variables and functions */
char const *strong_l3();
const char *__attribute__((section(".test.c"))) sibcall_strong_l3(void) {
  return strong_l3();
}


x86 assembly (clang, -O0):
<sibcall_strong_l3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <strong_l3@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sibcall_strong_l3>:
xor    %eax,%eax
jmp    1030 <strong_l3@plt>

LLVM IR (-O0):
define i8* @sibcall_strong_l3() section ".test.c" {
%1 = call i8* (...) @strong_l3()
ret i8* %1
}

LLVM IR (-O2):
define i8* @sibcall_strong_l3() section ".test.c" {
%1 = tail call i8* (...) @strong_l3()
ret i8* %1
}
void swap(unsigned *x, unsigned *y) {
  unsigned temp;
  temp = *x;
  *x = *y;
  *y = temp;
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    (%rdi),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdi)
mov    %eax,(%rsi)
ret

LLVM IR (-O0):
define void @swap(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
%5 = alloca i32
store i32* %0, i32** %3
store i32* %1, i32** %4
%6 = load i32*, i32** %3
%7 = load i32, i32* %6
store i32 %7, i32* %5
%8 = load i32*, i32** %4
%9 = load i32, i32* %8
%10 = load i32*, i32** %3
store i32 %9, i32* %10
%11 = load i32, i32* %5
%12 = load i32*, i32** %4
store i32 %11, i32* %12
ret void
}

LLVM IR (-O2):
define void @swap(i32* nocapture %0, i32* nocapture %1) {
%3 = load i32, i32* %0
%4 = load i32, i32* %1
store i32 %4, i32* %0
store i32 %3, i32* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pulseMicro(int, int, int);
void pulseMicroRatio(int gpio, int width, float ratio) {
  int up = ratio * width;
  int down = width - up;
  pulseMicro(gpio, up, down);
}


x86 assembly (clang, -O0):
<pulseMicroRatio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
cvtsi2ssl -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%esi
mov    -0x14(%rbp),%edx
call   1030 <pulseMicro@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pulseMicroRatio>:
mov    %esi,%edx
cvtsi2ss %esi,%xmm1
mulss  %xmm0,%xmm1
cvttss2si %xmm1,%esi
sub    %esi,%edx
jmp    1030 <pulseMicro@plt>

LLVM IR (-O0):
define void @pulseMicroRatio(i32 %0, i32 %1, float %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca float
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store float %2, float* %6
%9 = load float, float* %6
%10 = load i32, i32* %5
%11 = sitofp i32 %10 to float
%12 = fmul float %9, %11
%13 = fptosi float %12 to i32
store i32 %13, i32* %7
%14 = load i32, i32* %5
%15 = load i32, i32* %7
%16 = sub nsw i32 %14, %15
store i32 %16, i32* %8
%17 = load i32, i32* %4
%18 = load i32, i32* %7
%19 = load i32, i32* %8
%20 = call i32 @pulseMicro(i32 %17, i32 %18, i32 %19)
ret void
}

LLVM IR (-O2):
define void @pulseMicroRatio(i32 %0, i32 %1, float %2) {
%4 = sitofp i32 %1 to float
%5 = fmul float %4, %2
%6 = fptosi float %5 to i32
%7 = sub nsw i32 %1, %6
%8 = tail call i32 @pulseMicro(i32 %0, i32 %6, i32 %7)
ret void
}
/* Variables and functions */
unsigned short inw_local(int);
int /*<<< orphan*/ slow_down_io();
__attribute__((always_)) unsigned short inw_local_p(int port) {
  unsigned short value = inw_local(port);
  slow_down_io();
  return value;
}


x86 assembly (clang, -O0):
<inw_local_p>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <inw_local@plt>
mov    %ax,-0x6(%rbp)
mov    $0x0,%al
call   1040 <slow_down_io@plt>
movzwl -0x6(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inw_local_p>:
push   %rbx
call   1030 <inw_local@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1040 <slow_down_io@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i16 @inw_local_p(i32 %0) {
%2 = alloca i32
%3 = alloca i16
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call zeroext i16 @inw_local(i32 %4)
store i16 %5, i16* %3
%6 = call i32 (...) @slow_down_io()
%7 = load i16, i16* %3
ret i16 %7
}

LLVM IR (-O2):
define zeroext i16 @inw_local_p(i32 %0) {
%2 = tail call zeroext i16 @inw_local(i32 %0)
%3 = tail call i32 (...) @slow_down_io()
ret i16 %2
}