#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ dfeast_scsrgv_(char *, int *, double *, int *, int *,
                                  double *, int *, int *, int *, double *,
                                  int *, double *, double *, int *, double *,
                                  double *, int *, double *, int *);
void DFEAST_SCSRGV(char *UPLO, int *N, double *sa, int *isa, int *jsa,
                   double *sb, int *isb, int *jsb, int *feastparam,
                   double *epsout, int *loop, double *Emin, double *Emax,
                   int *M0, double *lambda, double *q, int *mode, double *res,
                   int *info) {
  dfeast_scsrgv_(UPLO, N, sa, isa, jsa, sb, isb, jsb, feastparam, epsout, loop,
                 Emin, Emax, M0, lambda, q, mode, res, info);
}


x86 assembly (clang, -O0):
<DFEAST_SCSRGV>:
push   %rbp
mov    %rsp,%rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
sub    $0xc8,%rsp
mov    0x70(%rbp),%rax
mov    0x68(%rbp),%rax
mov    0x60(%rbp),%rax
mov    0x58(%rbp),%rax
mov    0x50(%rbp),%rax
mov    0x48(%rbp),%rax
mov    0x40(%rbp),%rax
mov    0x38(%rbp),%rax
mov    0x30(%rbp),%rax
mov    0x28(%rbp),%rax
mov    0x20(%rbp),%rax
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x30(%rbp)
mov    %rsi,-0x38(%rbp)
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x48(%rbp)
mov    %r8,-0x50(%rbp)
mov    %r9,-0x58(%rbp)
mov    -0x30(%rbp),%rdi
mov    -0x38(%rbp),%rsi
mov    -0x40(%rbp),%rdx
mov    -0x48(%rbp),%rcx
mov    -0x50(%rbp),%r8
mov    -0x58(%rbp),%r9
mov    0x10(%rbp),%rax
mov    %rax,-0x88(%rbp)
mov    0x18(%rbp),%rax
mov    %rax,-0x80(%rbp)
mov    0x20(%rbp),%rax
mov    %rax,-0x78(%rbp)
mov    0x28(%rbp),%rax
mov    %rax,-0x70(%rbp)
mov    0x30(%rbp),%rax
mov    %rax,-0x68(%rbp)
mov    0x38(%rbp),%r13
mov    0x40(%rbp),%r12
mov    0x48(%rbp),%r15
mov    0x50(%rbp),%r14
mov    0x58(%rbp),%rbx
mov    0x60(%rbp),%r11
mov    0x68(%rbp),%r10
mov    0x70(%rbp),%rax
mov    %rax,-0x60(%rbp)
mov    -0x88(%rbp),%rax
mov    %rax,(%rsp)
mov    -0x80(%rbp),%rax
mov    %rax,0x8(%rsp)
mov    -0x78(%rbp),%rax
mov    %rax,0x10(%rsp)
mov    -0x70(%rbp),%rax
mov    %rax,0x18(%rsp)
mov    -0x68(%rbp),%rax
mov    %rax,0x20(%rsp)
mov    -0x60(%rbp),%rax
mov    %r13,0x28(%rsp)
mov    %r12,0x30(%rsp)
mov    %r15,0x38(%rsp)
mov    %r14,0x40(%rsp)
mov    %rbx,0x48(%rsp)
mov    %r11,0x50(%rsp)
mov    %r10,0x58(%rsp)
mov    %rax,0x60(%rsp)
call   1030 <dfeast_scsrgv_@plt>
add    $0xc8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

x86 assembly (clang, -O2):
<DFEAST_SCSRGV>:
jmp    1030 <dfeast_scsrgv_@plt>

LLVM IR (-O0):
define void @DFEAST_SCSRGV(i8* %0, i32* %1, double* %2, i32* %3, i32* %4, double* %5, i32* %6, i32* %7, i32* %8, double* %9, i32* %10, double* %11, double* %12, i32* %13, double* %14, double* %15, i32* %16, double* %17, i32* %18) {
%20 = alloca i8*
%21 = alloca i32*
%22 = alloca double*
%23 = alloca i32*
%24 = alloca i32*
%25 = alloca double*
%26 = alloca i32*
%27 = alloca i32*
%28 = alloca i32*
%29 = alloca double*
%30 = alloca i32*
%31 = alloca double*
%32 = alloca double*
%33 = alloca i32*
%34 = alloca double*
%35 = alloca double*
%36 = alloca i32*
%37 = alloca double*
%38 = alloca i32*
store i8* %0, i8** %20
store i32* %1, i32** %21
store double* %2, double** %22
store i32* %3, i32** %23
store i32* %4, i32** %24
store double* %5, double** %25
store i32* %6, i32** %26
store i32* %7, i32** %27
store i32* %8, i32** %28
store double* %9, double** %29
store i32* %10, i32** %30
store double* %11, double** %31
store double* %12, double** %32
store i32* %13, i32** %33
store double* %14, double** %34
store double* %15, double** %35
store i32* %16, i32** %36
store double* %17, double** %37
store i32* %18, i32** %38
%39 = load i8*, i8** %20
%40 = load i32*, i32** %21
%41 = load double*, double** %22
%42 = load i32*, i32** %23
%43 = load i32*, i32** %24
%44 = load double*, double** %25
%45 = load i32*, i32** %26
%46 = load i32*, i32** %27
%47 = load i32*, i32** %28
%48 = load double*, double** %29
%49 = load i32*, i32** %30
%50 = load double*, double** %31
%51 = load double*, double** %32
%52 = load i32*, i32** %33
%53 = load double*, double** %34
%54 = load double*, double** %35
%55 = load i32*, i32** %36
%56 = load double*, double** %37
%57 = load i32*, i32** %38
%58 = call i32 @dfeast_scsrgv_(i8* %39, i32* %40, double* %41, i32* %42, i32* %43, double* %44, i32* %45, i32* %46, i32* %47, double* %48, i32* %49, double* %50, double* %51, i32* %52, double* %53, double* %54, i32* %55, double* %56, i32* %57)
ret void
}

LLVM IR (-O2):
define void @DFEAST_SCSRGV(i8* %0, i32* %1, double* %2, i32* %3, i32* %4, double* %5, i32* %6, i32* %7, i32* %8, double* %9, i32* %10, double* %11, double* %12, i32* %13, double* %14, double* %15, i32* %16, double* %17, i32* %18) {
%20 = tail call i32 @dfeast_scsrgv_(i8* %0, i32* %1, double* %2, i32* %3, i32* %4, double* %5, i32* %6, i32* %7, i32* %8, double* %9, i32* %10, double* %11, double* %12, i32* %13, double* %14, double* %15, i32* %16, double* %17, i32* %18)
ret void
}