xunge/DecIR huggingface dataset:
OP(fd, a1) {
  illegal_1();
  op_a1();
}


x86 assembly (clang, -O0):
<OP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <illegal_1@plt>
mov    $0x0,%al
call   1040 <op_a1@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OP>:
push   %rax
xor    %eax,%eax
call   1030 <illegal_1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <op_a1@plt>

LLVM IR (-O0):
define i32 @OP(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = call i32 (...) @illegal_1()
%7 = call i32 (...) @op_a1()
%8 = load i32, i32* %3
ret i32 %8
}

LLVM IR (-O2):
define i32 @OP(i32 %0, i32 %1) {
%3 = tail call i32 (...) @illegal_1()
%4 = tail call i32 (...) @op_a1()
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ nrf_802154_pib_short_address_set(int /*<<< orphan*/ const *);
void nrf_802154_short_address_set(const uint8_t *p_short_address) {
  nrf_802154_pib_short_address_set(p_short_address);
}


x86 assembly (clang, -O0):
<nrf_802154_short_address_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <nrf_802154_pib_short_address_set@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nrf_802154_short_address_set>:
jmp    1030 <nrf_802154_pib_short_address_set@plt>

LLVM IR (-O0):
define void @nrf_802154_short_address_set(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @nrf_802154_pib_short_address_set(i32* %3)
ret void
}

LLVM IR (-O2):
define void @nrf_802154_short_address_set(i32* %0) {
%2 = tail call i32 @nrf_802154_pib_short_address_set(i32* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
char *ltrim(char *s) {
  char *p = s;
  while (((*p) == ' ' || (*p) == '\t' || (*p) == '\n'))
    p++;
  strcpy(s, p);
  return s;
}


x86 assembly (clang, -O0):
<ltrim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x11(%rbp)
je     115e <ltrim+0x4e>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x1,%al
cmp    $0x9,%ecx
mov    %al,-0x11(%rbp)
je     115e <ltrim+0x4e>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
sete   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    116e <ltrim+0x5e>
jmp    117f <ltrim+0x6f>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <ltrim+0x14>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltrim>:
push   %rbx
mov    %rdi,%rbx
movabs $0x100000600,%rax
mov    %rdi,%rsi
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movzbl (%rsi),%ecx
cmp    $0x20,%rcx
ja     1145 <ltrim+0x35>
bt     %rcx,%rax
jae    1145 <ltrim+0x35>
add    $0x1,%rsi
jmp    1130 <ltrim+0x20>
mov    %rbx,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ltrim(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %22, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 32
br i1 %9, label %20, label %10
10: ; preds = %5
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 9
br i1 %14, label %20, label %15
15: ; preds = %10
%16 = load i8*, i8** %3
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 10
br label %20
20: ; preds = %15, %10, %5
%21 = phi i1 [ true, %10 ], [ true, %5 ], [ %19, %15 ]
br i1 %21, label %22, label %25
22: ; preds = %20
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %3
br label %5
25: ; preds = %20
%26 = load i8*, i8** %2
%27 = load i8*, i8** %3
%28 = call i32 @strcpy(i8* %26, i8* %27)
%29 = load i8*, i8** %2
ret i8* %29
}

LLVM IR (-O2):
define i8* @ltrim(i8* returned %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %7 [
i8 32, label %5
i8 9, label %5
i8 10, label %5
]
5: ; preds = %2, %2, %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2
%8 = tail call i32 @strcpy(i8* %0, i8* %3)
ret i8* %0
}
/* Variables and functions */
void putchar(int value) {
  while (((*(volatile unsigned int *)(0x20000020)) & 0x02) == 0)
    ;
  *(volatile unsigned int *)(0x20000000) = (value);
}


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x20000020,%eax
mov    (%rax),%eax
and    $0x2,%eax
cmp    $0x0,%eax
jne    111f <putchar+0x1f>
jmp    1107 <putchar+0x7>
mov    -0x4(%rbp),%ecx
mov    $0x20000000,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
testl  $0x2,0x20000020
je     1100 <putchar>
mov    %edi,0x20000000
ret

LLVM IR (-O0):
define void @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load volatile i32, i32* inttoptr (i64 536870944 to i32*)
%5 = and i32 %4, 2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %3
br label %3
8: ; preds = %3
%9 = load i32, i32* %2
store volatile i32 %9, i32* inttoptr (i64 536870912 to i32*)
ret void
}

LLVM IR (-O2):
define void @putchar(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = load volatile i32, i32* inttoptr (i64 536870944 to i32*)
%4 = and i32 %3, 2
%5 = icmp eq i32 %4, 0
br i1 %5, label %2, label %6
6: ; preds = %2
store volatile i32 %0, i32* inttoptr (i64 536870912 to i32*)
ret void
}
int is_a_number(char c) {
  return c == '0' || c == '1' || c == '2' || c == '3' || c == '4' || c == '5' ||
         c == '6' || c == '7' || c == '8' || c == '9';
}


x86 assembly (clang, -O0):
<is_a_number>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
je     11b9 <is_a_number+0xb9>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x31,%ecx
mov    %al,-0x2(%rbp)
je     11b9 <is_a_number+0xb9>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x32,%ecx
mov    %al,-0x2(%rbp)
je     11b9 <is_a_number+0xb9>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x33,%ecx
mov    %al,-0x2(%rbp)
je     11b9 <is_a_number+0xb9>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x34,%ecx
mov    %al,-0x2(%rbp)
je     11b9 <is_a_number+0xb9>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x35,%ecx
mov    %al,-0x2(%rbp)
je     11b9 <is_a_number+0xb9>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x36,%ecx
mov    %al,-0x2(%rbp)
je     11b9 <is_a_number+0xb9>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x37,%ecx
mov    %al,-0x2(%rbp)
je     11b9 <is_a_number+0xb9>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x38,%ecx
mov    %al,-0x2(%rbp)
je     11b9 <is_a_number+0xb9>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_a_number>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_a_number(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 48
br i1 %5, label %42, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 49
br i1 %9, label %42, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 50
br i1 %13, label %42, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 51
br i1 %17, label %42, label %18
18: ; preds = %14
%19 = load i8, i8* %2
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %20, 52
br i1 %21, label %42, label %22
22: ; preds = %18
%23 = load i8, i8* %2
%24 = sext i8 %23 to i32
%25 = icmp eq i32 %24, 53
br i1 %25, label %42, label %26
26: ; preds = %22
%27 = load i8, i8* %2
%28 = sext i8 %27 to i32
%29 = icmp eq i32 %28, 54
br i1 %29, label %42, label %30
30: ; preds = %26
%31 = load i8, i8* %2
%32 = sext i8 %31 to i32
%33 = icmp eq i32 %32, 55
br i1 %33, label %42, label %34
34: ; preds = %30
%35 = load i8, i8* %2
%36 = sext i8 %35 to i32
%37 = icmp eq i32 %36, 56
br i1 %37, label %42, label %38
38: ; preds = %34
%39 = load i8, i8* %2
%40 = sext i8 %39 to i32
%41 = icmp eq i32 %40, 57
br label %42
42: ; preds = %38, %34, %30, %26, %22, %18, %14, %10, %6, %1
%43 = phi i1 [ true, %34 ], [ true, %30 ], [ true, %26 ], [ true, %22 ], [ true, %18 ], [ true, %14 ], [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %41, %38 ]
%44 = zext i1 %43 to i32
ret i32 %44
}

LLVM IR (-O2):
define i32 @is_a_number(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
char *malloc(int);
int /*<<< orphan*/ scanf(char *, char *);
char *alocar_palavra() {
  char *palavra = malloc(20);
  scanf(" %s", palavra);
  return palavra;
}


x86 assembly (clang, -O0):
<alocar_palavra>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x14,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xebf(%rip),%rdi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alocar_palavra>:
push   %rbx
mov    $0x14,%edi
call   1030 <malloc@plt>
mov    %rax,%rbx
lea    0xecb(%rip),%rdi
mov    %rax,%rsi
call   1040 <scanf@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [4 x i8] c" %s\00"
define i8* @alocar_palavra() {
%1 = alloca i8*
%2 = call i8* @malloc(i32 20)
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = load i8*, i8** %1
ret i8* %5
}

LLVM IR (-O2):
@.str = [4 x i8] c" %s\00"
define i8* @alocar_palavra() {
%1 = tail call dereferenceable_or_null(20) i8* @malloc(i32 20)
%2 = tail call i32 @scanf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ m68ki_jump(int /*<<< orphan*/);
int /*<<< orphan*/ m68ki_pull_32();
void m68k_op_rts_32(void) { m68ki_jump(m68ki_pull_32()); }


x86 assembly (clang, -O0):
<m68k_op_rts_32>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <m68ki_pull_32@plt>
mov    %eax,%edi
call   1030 <m68ki_jump@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<m68k_op_rts_32>:
push   %rax
xor    %eax,%eax
call   1040 <m68ki_pull_32@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <m68ki_jump@plt>

LLVM IR (-O0):
define void @m68k_op_rts_32() {
%1 = call i32 (...) @m68ki_pull_32()
%2 = call i32 @m68ki_jump(i32 %1)
ret void
}

LLVM IR (-O2):
define void @m68k_op_rts_32() {
%1 = tail call i32 (...) @m68ki_pull_32()
%2 = tail call i32 @m68ki_jump(i32 %1)
ret void
}
unsigned xrop3_59_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~D;
  stk2 = T | stk3;
  stk1 = S & stk2;
  stk1 = ~stk1;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_59_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
or     -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
and    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_59_1_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
or     %ecx,%eax
not    %eax
or     %edi,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_59_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %5
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %7
%26 = load i32, i32* %10
%27 = or i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %6
%29 = load i32, i32* %9
%30 = and i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = xor i32 %31, -1
store i32 %32, i32* %8
%33 = load i32, i32* %8
%34 = load i32, i32* %6
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = load i32, i32* %7
%38 = xor i32 %37, -1
%39 = and i32 %36, %38
%40 = load i32, i32* %5
%41 = load i32, i32* %6
%42 = and i32 %40, %41
%43 = or i32 %39, %42
%44 = load i32, i32* %5
%45 = load i32, i32* %7
%46 = and i32 %44, %45
%47 = or i32 %43, %46
ret i32 %47
}

LLVM IR (-O2):
define i32 @xrop3_59_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = or i32 %6, %4
%8 = xor i32 %7, -1
%9 = or i8 %1, %0
%10 = zext i8 %9 to i32
%11 = or i32 %10, %8
ret i32 %11
}
int security_socket_sendmsg(struct socket *sock, struct msghdr *msg, int size) {
  return 0;
}


x86 assembly (clang, -O0):
<security_socket_sendmsg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<security_socket_sendmsg>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.socket = type opaque
%struct.msghdr = type opaque
define i32 @security_socket_sendmsg(%struct.socket* %0, %struct.msghdr* %1, i32 %2) {
%4 = alloca %struct.socket*
%5 = alloca %struct.msghdr*
%6 = alloca i32
store %struct.socket* %0, %struct.socket** %4
store %struct.msghdr* %1, %struct.msghdr** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.socket = type opaque
%struct.msghdr = type opaque
define i32 @security_socket_sendmsg(%struct.socket* nocapture readnone %0, %struct.msghdr* nocapture readnone %1, i32 %2) {
ret i32 0
}
float Clamp(float v, float min, float max) {
  return (v < min) ? min : (v > max) ? max : v;
}


x86 assembly (clang, -O0):
<Clamp>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <Clamp+0x35>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
jmp    1167 <Clamp+0x67>
movss  -0x4(%rbp),%xmm0
ucomiss -0xc(%rbp),%xmm0
jbe    1153 <Clamp+0x53>
movss  -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
jmp    115d <Clamp+0x5d>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Clamp>:
minss  %xmm0,%xmm2
cmpltss %xmm1,%xmm0
movaps %xmm0,%xmm3
andnps %xmm2,%xmm3
andps  %xmm1,%xmm0
orps   %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @Clamp(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fcmp olt float %7, %8
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load float, float* %5
br label %22
12: ; preds = %3
%13 = load float, float* %4
%14 = load float, float* %6
%15 = fcmp ogt float %13, %14
br i1 %15, label %16, label %18
16: ; preds = %12
%17 = load float, float* %6
br label %20
18: ; preds = %12
%19 = load float, float* %4
br label %20
20: ; preds = %18, %16
%21 = phi float [ %17, %16 ], [ %19, %18 ]
br label %22
22: ; preds = %20, %10
%23 = phi float [ %11, %10 ], [ %21, %20 ]
ret float %23
}

LLVM IR (-O2):
define float @Clamp(float %0, float %1, float %2) {
%4 = fcmp olt float %0, %1
%5 = fcmp ogt float %0, %2
%6 = select i1 %5, float %2, float %0
%7 = select i1 %4, float %1, float %6
ret float %7
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int x;
};
struct TYPE_4__ {
  TYPE_1__ xmotion;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xmotion_x(void *_p, int _v) {
  ((XEvent *)_p)->xmotion.x = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xmotion_x>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xmotion_x>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xmotion_x(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xmotion_x(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
void handler(int sig) {
  printf("\n%s:\n", __func__);
  printf("\n Singal \n");
}


x86 assembly (clang, -O0):
<handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xede(%rip),%rdi
lea    0xedd(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xed7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handler>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xed7(%rip),%rsi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xed1(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\0A%s:\0A\00"
@__func__.handler = [8 x i8] c"handler\00"
@.str.1 = [11 x i8] c"\0A Singal \0A\00"
define void @handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__func__.handler, i64 0, i64 0))
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\0A%s:\0A\00"
@__func__.handler = [8 x i8] c"handler\00"
@str = [10 x i8] c"\0A Singal \00"
define void @handler(i32 %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @__func__.handler, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([10 x i8], [10 x i8]* @str, i64 0, i64 0))
ret void
}
int b_fun(void) { return 0; }


x86 assembly (clang, -O0):
<b_fun>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<b_fun>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @b_fun() {
ret i32 0
}

LLVM IR (-O2):
define i32 @b_fun() {
ret i32 0
}
void flag_ij(const int id, int *i, int *j) {
  if (id % 7 == 0) {
    *i = (id / 7) - 1;
    *j = 7;
  } else {
    *i = id / 7;
    *j = id % 7;
  }
  return;
}


x86 assembly (clang, -O0):
<flag_ij>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x7,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1148 <flag_ij+0x48>
mov    -0x4(%rbp),%eax
mov    $0x7,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
sub    $0x1,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x7,(%rax)
jmp    116c <flag_ij+0x6c>
mov    -0x4(%rbp),%eax
mov    $0x7,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
mov    $0x7,%ecx
cltd
idiv   %ecx
mov    -0x18(%rbp),%rax
mov    %edx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flag_ij>:
movslq %edi,%r9
imul   $0xffffffff92492493,%r9,%rcx
shr    $0x20,%rcx
add    %r9d,%ecx
mov    %ecx,%edi
shr    $0x1f,%edi
sar    $0x2,%ecx
add    %edi,%ecx
lea    0x0(,%rcx,8),%r8d
mov    %ecx,%edi
sub    %r8d,%edi
xor    %r8d,%r8d
add    %r9d,%edi
mov    $0x7,%eax
cmovne %edi,%eax
sete   %r8b
sub    %r8d,%ecx
mov    %ecx,(%rsi)
mov    %eax,(%rdx)
ret

LLVM IR (-O0):
define void @flag_ij(i32 %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32, i32* %4
%8 = srem i32 %7, 7
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %3
%11 = load i32, i32* %4
%12 = sdiv i32 %11, 7
%13 = sub nsw i32 %12, 1
%14 = load i32*, i32** %5
store i32 %13, i32* %14
%15 = load i32*, i32** %6
store i32 7, i32* %15
br label %23
16: ; preds = %3
%17 = load i32, i32* %4
%18 = sdiv i32 %17, 7
%19 = load i32*, i32** %5
store i32 %18, i32* %19
%20 = load i32, i32* %4
%21 = srem i32 %20, 7
%22 = load i32*, i32** %6
store i32 %21, i32* %22
br label %23
23: ; preds = %16, %10
ret void
}

LLVM IR (-O2):
define void @flag_ij(i32 %0, i32* nocapture writeonly %1, i32* nocapture writeonly %2) {
%4 = srem i32 %0, 7
%5 = icmp eq i32 %4, 0
%6 = sdiv i32 %0, 7
%7 = sext i1 %5 to i32
%8 = add nsw i32 %6, %7
%9 = select i1 %5, i32 7, i32 %4
store i32 %8, i32* %1
store i32 %9, i32* %2
ret void
}
void save_state(vec, a, b, c, d, e, f) int vec[6];
int a, b, c, d, e, f;
{
  vec[0] = a;
  vec[1] = b;
  vec[2] = c;
  vec[3] = d;
  vec[4] = e;
  vec[5] = f;
}


x86 assembly (clang, -O0):
<save_state>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%eax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    %r9d,-0x1c(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x14(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0x18(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
mov    -0x1c(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x10(%rax)
mov    0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x14(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<save_state>:
mov    0x8(%rsp),%eax
mov    %esi,(%rdi)
mov    %edx,0x4(%rdi)
mov    %ecx,0x8(%rdi)
mov    %r8d,0xc(%rdi)
mov    %r9d,0x10(%rdi)
mov    %eax,0x14(%rdi)
ret

LLVM IR (-O0):
define void @save_state(i32* %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
%8 = alloca i32*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store i32* %0, i32** %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32 %4, i32* %12
store i32 %5, i32* %13
store i32 %6, i32* %14
%15 = load i32, i32* %9
%16 = load i32*, i32** %8
%17 = getelementptr inbounds i32, i32* %16, i64 0
store i32 %15, i32* %17
%18 = load i32, i32* %10
%19 = load i32*, i32** %8
%20 = getelementptr inbounds i32, i32* %19, i64 1
store i32 %18, i32* %20
%21 = load i32, i32* %11
%22 = load i32*, i32** %8
%23 = getelementptr inbounds i32, i32* %22, i64 2
store i32 %21, i32* %23
%24 = load i32, i32* %12
%25 = load i32*, i32** %8
%26 = getelementptr inbounds i32, i32* %25, i64 3
store i32 %24, i32* %26
%27 = load i32, i32* %13
%28 = load i32*, i32** %8
%29 = getelementptr inbounds i32, i32* %28, i64 4
store i32 %27, i32* %29
%30 = load i32, i32* %14
%31 = load i32*, i32** %8
%32 = getelementptr inbounds i32, i32* %31, i64 5
store i32 %30, i32* %32
ret void
}

LLVM IR (-O2):
define void @save_state(i32* nocapture writeonly %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6) {
store i32 %1, i32* %0
%8 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %2, i32* %8
%9 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %3, i32* %9
%10 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %4, i32* %10
%11 = getelementptr inbounds i32, i32* %0, i64 4
store i32 %5, i32* %11
%12 = getelementptr inbounds i32, i32* %0, i64 5
store i32 %6, i32* %12
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t
btstack_event_discoverable_enabled_get_discoverable(const uint8_t *event) {
  return event[2];
}


x86 assembly (clang, -O0):
<btstack_event_discoverable_enabled_get_discoverable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<btstack_event_discoverable_enabled_get_discoverable>:
mov    0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @btstack_event_discoverable_enabled_get_discoverable(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 2
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @btstack_event_discoverable_enabled_get_discoverable(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = load i32, i32* %2
ret i32 %3
}
int quickwakeup_register(struct quickwakeup_ops *ops) { return 0; }


x86 assembly (clang, -O0):
<quickwakeup_register>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<quickwakeup_register>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.quickwakeup_ops = type opaque
define i32 @quickwakeup_register(%struct.quickwakeup_ops* %0) {
%2 = alloca %struct.quickwakeup_ops*
store %struct.quickwakeup_ops* %0, %struct.quickwakeup_ops** %2
ret i32 0
}

LLVM IR (-O2):
%struct.quickwakeup_ops = type opaque
define i32 @quickwakeup_register(%struct.quickwakeup_ops* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void SOS_Seperator(void) {
  printf("=== State of shock ! =====================\n");
}


x86 assembly (clang, -O0):
<SOS_Seperator>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SOS_Seperator>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [44 x i8] c"=== State of shock ! =====================\0A\00"
define void @SOS_Seperator() {
%1 = call i32 @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [43 x i8] c"=== State of shock ! =====================\00"
define void @SOS_Seperator() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([43 x i8], [43 x i8]* @str, i64 0, i64 0))
ret void
}
void inc_dec_tests(void) {
  asm("inc %eax");
  asm("inc %ecx");
  asm("inc %edx");
  asm("inc %ebx");
  asm("inc %esp");
  asm("inc %ebp");
  asm("inc %esi");
  asm("inc %edi");
  asm("dec %eax");
  asm("dec %ecx");
  asm("dec %edx");
  asm("dec %ebx");
  asm("dec %esp");
  asm("dec %ebp");
  asm("dec %esi");
  asm("dec %edi");
}


x86 assembly (clang, -O0):
<inc_dec_tests>:
push   %rbp
mov    %rsp,%rbp
inc    %eax
inc    %ecx
inc    %edx
inc    %ebx
inc    %esp
inc    %ebp
inc    %esi
inc    %edi
dec    %eax
dec    %ecx
dec    %edx
dec    %ebx
dec    %esp
dec    %ebp
dec    %esi
dec    %edi
pop    %rbp
ret

x86 assembly (clang, -O2):
<inc_dec_tests>:
inc    %eax
inc    %ecx
inc    %edx
inc    %ebx
inc    %esp
inc    %ebp
inc    %esi
inc    %edi
dec    %eax
dec    %ecx
dec    %edx
dec    %ebx
dec    %esp
dec    %ebp
dec    %esi
dec    %edi
ret

LLVM IR (-O0):
define void @inc_dec_tests() {
ret void
}

LLVM IR (-O2):
define void @inc_dec_tests() {
tail call void asm sideeffect "inc %eax", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "inc %ecx", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "inc %edx", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "inc %ebx", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "inc %esp", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "inc %ebp", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "inc %esi", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "inc %edi", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "dec %eax", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "dec %ecx", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "dec %edx", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "dec %ebx", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "dec %esp", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "dec %ebp", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "dec %esi", "~{dirflag},~{fpsr},~{flags}"()
tail call void asm sideeffect "dec %edi", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void print_version() {
  printf("Cesar %s\n"
         "Copyright 2017 MPI-CBG/MPI-PKS Peter Schwede\n"
         "\n"
         "Align a pair of sequences using HMM.\n",
         "0.01 build");
}


x86 assembly (clang, -O0):
<print_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xf3b(%rip),%rsi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_version>:
lea    0xee9(%rip),%rdi
lea    0xf3f(%rip),%rsi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [93 x i8] c"Cesar %s\0ACopyright 2017 MPI-CBG/MPI-PKS Peter Schwede\0A\0AAlign a pair of sequences using HMM.\0A\00"
@.str.1 = [11 x i8] c"0.01 build\00"
define void @print_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [93 x i8] c"Cesar %s\0ACopyright 2017 MPI-CBG/MPI-PKS Peter Schwede\0A\0AAlign a pair of sequences using HMM.\0A\00"
@.str.1 = [11 x i8] c"0.01 build\00"
define void @print_version() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([93 x i8], [93 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int can_win_nim(int n) {
  if (n % 4 == 0)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<can_win_nim>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1127 <can_win_nim+0x27>
movl   $0x0,-0x4(%rbp)
jmp    112e <can_win_nim+0x2e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<can_win_nim>:
xor    %eax,%eax
test   $0x3,%dil
setne  %al
ret

LLVM IR (-O0):
define i32 @can_win_nim(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %9
8: ; preds = %1
store i32 1, i32* %2
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @can_win_nim(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp ne i32 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
scalar_t__ ascii_numeric_cmp(char const *, char const *);
int num_ge(const char *pat, const char *text) {
  return (ascii_numeric_cmp(text, pat) >= 0);
}


x86 assembly (clang, -O0):
<num_ge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <ascii_numeric_cmp@plt>
cmp    $0x0,%rax
setge  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<num_ge>:
push   %rax
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
call   1030 <ascii_numeric_cmp@plt>
shr    $0x3f,%rax
xor    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @num_ge(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load i8*, i8** %3
%7 = call i64 @ascii_numeric_cmp(i8* %5, i8* %6)
%8 = icmp sge i64 %7, 0
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @num_ge(i8* %0, i8* %1) {
%3 = tail call i64 @ascii_numeric_cmp(i8* %1, i8* %0)
%4 = lshr i64 %3, 63
%5 = trunc i64 %4 to i32
%6 = xor i32 %5, 1
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ msm_ois_i2c_write(unsigned short, unsigned int, int);
void RamWrite(unsigned char RamAddrH, unsigned char RamAddrL,
              unsigned char RamDataH, unsigned char RamDataL) {
  unsigned short reg_addr;
  unsigned int reg_data;
  reg_addr = RamAddrH << 8 | RamAddrL;
  reg_data = RamDataH << 8 | RamDataL;
  msm_ois_i2c_write(reg_addr, reg_data, 2);
}


x86 assembly (clang, -O0):
<RamWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %ax,-0x6(%rbp)
movzbl -0x3(%rbp),%eax
shl    $0x8,%eax
movzbl -0x4(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x6(%rbp),%ax
mov    -0xc(%rbp),%esi
mov    $0x2,%edx
movzwl %ax,%edi
call   1030 <msm_ois_i2c_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RamWrite>:
shl    $0x8,%edi
or     %esi,%edi
shl    $0x8,%edx
lea    (%rdx,%rcx,1),%esi
mov    $0x2,%edx
jmp    1030 <msm_ois_i2c_write@plt>

LLVM IR (-O0):
define void @RamWrite(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i16
%10 = alloca i32
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%11 = load i8, i8* %5
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %6
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
%17 = trunc i32 %16 to i16
store i16 %17, i16* %9
%18 = load i8, i8* %7
%19 = zext i8 %18 to i32
%20 = shl i32 %19, 8
%21 = load i8, i8* %8
%22 = zext i8 %21 to i32
%23 = or i32 %20, %22
store i32 %23, i32* %10
%24 = load i16, i16* %9
%25 = load i32, i32* %10
%26 = call i32 @msm_ois_i2c_write(i16 zeroext %24, i32 %25, i32 2)
ret void
}

LLVM IR (-O2):
define void @RamWrite(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = zext i8 %0 to i16
%6 = shl nuw i16 %5, 8
%7 = zext i8 %1 to i16
%8 = or i16 %6, %7
%9 = zext i8 %2 to i32
%10 = shl nuw nsw i32 %9, 8
%11 = zext i8 %3 to i32
%12 = or i32 %10, %11
%13 = tail call i32 @msm_ois_i2c_write(i16 zeroext %8, i32 %12, i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ usleep_bypoll(int);
void usleep(int usec) { usleep_bypoll(usec); }


x86 assembly (clang, -O0):
<usleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <usleep_bypoll@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usleep>:
jmp    1030 <usleep_bypoll@plt>

LLVM IR (-O0):
define void @usleep(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @usleep_bypoll(i32 %3)
ret void
}

LLVM IR (-O2):
define void @usleep(i32 %0) {
%2 = tail call i32 @usleep_bypoll(i32 %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ RemoveProcess(int /*<<< orphan*/);
int /*<<< orphan*/ UserProcessCurrent();
size_t SyscallExit() {
  RemoveProcess(UserProcessCurrent());
  while (1)
    ;
  return 0;
}


x86 assembly (clang, -O0):
<SyscallExit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <UserProcessCurrent@plt>
mov    %eax,%edi
call   1040 <RemoveProcess@plt>
jmp    1132 <SyscallExit+0x12>

x86 assembly (clang, -O2):
<SyscallExit>:
push   %rax
xor    %eax,%eax
call   1030 <UserProcessCurrent@plt>
mov    %eax,%edi
call   1040 <RemoveProcess@plt>
nop
jmp    1130 <SyscallExit+0x10>

LLVM IR (-O0):
define i64 @SyscallExit() {
%1 = call i32 (...) @UserProcessCurrent()
%2 = call i32 @RemoveProcess(i32 %1)
br label %3
3: ; preds = %0, %3
br label %3
}

LLVM IR (-O2):
define i64 @SyscallExit() {
%1 = tail call i32 (...) @UserProcessCurrent()
%2 = tail call i32 @RemoveProcess(i32 %1)
br label %3
3: ; preds = %0, %3
br label %3
}
/* Variables and functions */
int /*<<< orphan*/ outb(unsigned int, unsigned int);
void lpc47b397_gpio_offset_out(unsigned iobase, unsigned offset,
                               unsigned value) {
  outb(value, iobase + offset);
}


x86 assembly (clang, -O0):
<lpc47b397_gpio_offset_out>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0xc(%rbp),%edi
mov    -0x4(%rbp),%esi
add    -0x8(%rbp),%esi
call   1030 <outb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lpc47b397_gpio_offset_out>:
add    %edi,%esi
mov    %edx,%edi
jmp    1030 <outb@plt>

LLVM IR (-O0):
define void @lpc47b397_gpio_offset_out(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %6
%8 = load i32, i32* %4
%9 = load i32, i32* %5
%10 = add i32 %8, %9
%11 = call i32 @outb(i32 %7, i32 %10)
ret void
}

LLVM IR (-O2):
define void @lpc47b397_gpio_offset_out(i32 %0, i32 %1, i32 %2) {
%4 = add i32 %1, %0
%5 = tail call i32 @outb(i32 %2, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test5(int);
void main() { test5(2); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1030 <test5@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2,%edi
jmp    1030 <test5@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 @test5(i32 2)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @test5(i32 2)
ret void
}
int t2(int b) {}


x86 assembly (clang, -O0):
<t2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<t2>:
ret

LLVM IR (-O0):
define i32 @t2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @t2(i32 %0) {
ret i32 undef
}
void swd_exit(struct ucl_swd *s) { (void)s; }


x86 assembly (clang, -O0):
<swd_exit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swd_exit>:
ret

LLVM IR (-O0):
%struct.ucl_swd = type opaque
define void @swd_exit(%struct.ucl_swd* %0) {
%2 = alloca %struct.ucl_swd*
store %struct.ucl_swd* %0, %struct.ucl_swd** %2
%3 = load %struct.ucl_swd*, %struct.ucl_swd** %2
ret void
}

LLVM IR (-O2):
%struct.ucl_swd = type opaque
define void @swd_exit(%struct.ucl_swd* nocapture %0) {
ret void
}
void glGetActiveUniformBlockName(void) { return; }


x86 assembly (clang, -O0):
<glGetActiveUniformBlockName>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glGetActiveUniformBlockName>:
ret

LLVM IR (-O0):
define void @glGetActiveUniformBlockName() {
ret void
}

LLVM IR (-O2):
define void @glGetActiveUniformBlockName() {
ret void
}
/* Variables and functions */
int _IOFBF;
int scalanative_libc_iofbf() { return _IOFBF; }


x86 assembly (clang, -O0):
<scalanative_libc_iofbf>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scalanative_libc_iofbf>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@_IOFBF = global i32 0
define i32 @scalanative_libc_iofbf() {
%1 = load i32, i32* @_IOFBF
ret i32 %1
}

LLVM IR (-O2):
@_IOFBF = global i32 0
define i32 @scalanative_libc_iofbf() {
%1 = load i32, i32* @_IOFBF
ret i32 %1
}
int test_imm_56uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x56 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_56uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x56,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_56uint64_highword_mem>:
testb  $0x56,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_56uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 86
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_56uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 369367187456
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void XPutPixel() {}


x86 assembly (clang, -O0):
<XPutPixel>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XPutPixel>:
ret

LLVM IR (-O0):
define void @XPutPixel() {
ret void
}

LLVM IR (-O2):
define void @XPutPixel() {
ret void
}
int is_flags(char c) {
  if (c == '-' || c == '+' || c == ' ' || c == '#' || c == '0')
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<is_flags>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x2d,%eax
je     114b <is_flags+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x2b,%eax
je     114b <is_flags+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x20,%eax
je     114b <is_flags+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x23,%eax
je     114b <is_flags+0x4b>
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jne    1157 <is_flags+0x57>
movl   $0x1,-0x4(%rbp)
jmp    115e <is_flags+0x5e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_flags>:
cmp    $0x30,%dil
ja     1120 <is_flags+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x1280900000000,%rdx
bt     %rcx,%rdx
jae    1120 <is_flags+0x20>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_flags(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 45
br i1 %6, label %23, label %7
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 43
br i1 %10, label %23, label %11
11: ; preds = %7
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 32
br i1 %14, label %23, label %15
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp eq i32 %17, 35
br i1 %18, label %23, label %19
19: ; preds = %15
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 48
br i1 %22, label %23, label %24
23: ; preds = %19, %15, %11, %7, %1
store i32 1, i32* %2
br label %25
24: ; preds = %19
store i32 0, i32* %2
br label %25
25: ; preds = %24, %23
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @is_flags(i8 signext %0) {
switch i8 %0, label %2 [
i8 48, label %3
i8 45, label %3
i8 43, label %3
i8 35, label %3
i8 32, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
/* Variables and functions */
int kbhit();
int Mchrdy() { return kbhit(); }


x86 assembly (clang, -O0):
<Mchrdy>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <kbhit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Mchrdy>:
xor    %eax,%eax
jmp    1030 <kbhit@plt>

LLVM IR (-O0):
define i32 @Mchrdy() {
%1 = call i32 (...) @kbhit()
ret i32 %1
}

LLVM IR (-O2):
define i32 @Mchrdy() {
%1 = tail call i32 (...) @kbhit()
ret i32 %1
}
void port_reset(const char *port) {
  printf("(DD) %s(%s)\n", __func__, port);
  printf("(WW) %s() Port %s not implemented\n", __func__, port);
}


x86 assembly (clang, -O0):
<port_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xedf(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdx
lea    0xed8(%rip),%rdi
lea    0xec6(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<port_reset>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0xee2(%rip),%rdi
lea    0xee8(%rip),%r14
mov    %r14,%rsi
mov    %rbx,%rdx
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"(DD) %s(%s)\0A\00"
@__func__.port_reset = [11 x i8] c"port_reset\00"
@.str.1 = [35 x i8] c"(WW) %s() Port %s not implemented\0A\00"
define void @port_reset(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.port_reset, i64 0, i64 0), i8* %3)
%5 = load i8*, i8** %2
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.port_reset, i64 0, i64 0), i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"(DD) %s(%s)\0A\00"
@__func__.port_reset = [11 x i8] c"port_reset\00"
@.str.1 = [35 x i8] c"(WW) %s() Port %s not implemented\0A\00"
define void @port_reset(i8* %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.port_reset, i64 0, i64 0), i8* %0)
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @__func__.port_reset, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct text_tag_list {
  int dummy;
};
struct text_tag {
  int dummy;
};
struct genlist {
  int dummy;
};

/* Variables and functions */
scalar_t__ genlist_get(struct genlist *, int);
struct text_tag *text_tag_list_get(const struct text_tag_list *tthis,
                                   int index) {
  return (struct text_tag *)genlist_get(((struct genlist *)(tthis)), index);
}


x86 assembly (clang, -O0):
<text_tag_list_get>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <genlist_get@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<text_tag_list_get>:
jmp    1030 <genlist_get@plt>

LLVM IR (-O0):
%struct.text_tag = type { i32 }
%struct.text_tag_list = type { i32 }
%struct.genlist = type { i32 }
define %struct.text_tag* @text_tag_list_get(%struct.text_tag_list* %0, i32 %1) {
%3 = alloca %struct.text_tag_list*
%4 = alloca i32
store %struct.text_tag_list* %0, %struct.text_tag_list** %3
store i32 %1, i32* %4
%5 = load %struct.text_tag_list*, %struct.text_tag_list** %3
%6 = bitcast %struct.text_tag_list* %5 to %struct.genlist*
%7 = load i32, i32* %4
%8 = call i64 @genlist_get(%struct.genlist* %6, i32 %7)
%9 = inttoptr i64 %8 to %struct.text_tag*
ret %struct.text_tag* %9
}

LLVM IR (-O2):
%struct.text_tag = type { i32 }
%struct.text_tag_list = type { i32 }
%struct.genlist = type { i32 }
define %struct.text_tag* @text_tag_list_get(%struct.text_tag_list* %0, i32 %1) {
%3 = bitcast %struct.text_tag_list* %0 to %struct.genlist*
%4 = tail call i64 @genlist_get(%struct.genlist* %3, i32 %1)
%5 = inttoptr i64 %4 to %struct.text_tag*
ret %struct.text_tag* %5
}