xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: b64 [options] <string> \n\n"
                  "b64 recognizes these commands:\n"
                  "        -e                      base 64 encode ,\n"
                  "        -d                      base 64 decode \n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [161 x i8] c"Usage: b64 [options] <string> \0A\0Ab64 recognizes these commands:\0A -e base 64 encode ,\0A -d base 64 decode \0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([161 x i8], [161 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [161 x i8] c"Usage: b64 [options] <string> \0A\0Ab64 recognizes these commands:\0A -e base 64 encode ,\0A -d base 64 decode \0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([161 x i8], [161 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
int capng_get_caps_fd(int fd) { return -1; }


x86 assembly (clang, -O0):
<capng_get_caps_fd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<capng_get_caps_fd>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @capng_get_caps_fd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 -1
}

LLVM IR (-O2):
define i32 @capng_get_caps_fd(i32 %0) {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void close_fd(int fd) {
  if (fd > 0)
    close(fd);
}


x86 assembly (clang, -O0):
<close_fd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    112d <close_fd+0x1d>
mov    -0x4(%rbp),%edi
call   1030 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_fd>:
test   %edi,%edi
jle    1119 <close_fd+0x9>
jmp    1030 <close@plt>
ret

LLVM IR (-O0):
define void @close_fd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i32 @close(i32 %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @close_fd(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @close(i32 %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ err_sys(char *);
void *malloc(size_t);
void *Malloc(size_t size) {
  void *ptr;
  if ((ptr = malloc(size)) == NULL)
    err_sys("malloc error");
  return (ptr);
}


x86 assembly (clang, -O0):
<Malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    114f <Malloc+0x2f>
lea    0xeb6(%rip),%rdi
call   1030 <err_sys@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Malloc>:
push   %rbx
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <Malloc+0x1a>
lea    0xecb(%rip),%rdi
call   1030 <err_sys@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"malloc error\00"
define i8* @Malloc(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = call i32 @err_sys(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = load i8*, i8** %3
ret i8* %10
}

LLVM IR (-O2):
@.str = [13 x i8] c"malloc error\00"
define noalias i8* @Malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @err_sys(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
ret i8* %2
}
unsigned int test01(unsigned int a, unsigned b) { return a / b; }


x86 assembly (clang, -O0):
<test01>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    %edx,%edx
divl   -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test01>:
mov    %edi,%eax
xor    %edx,%edx
div    %esi
ret

LLVM IR (-O0):
define i32 @test01(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = udiv i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @test01(i32 %0, i32 %1) {
%3 = udiv i32 %0, %1
ret i32 %3
}
/* Variables and functions */
unsigned long long __andn_u64(unsigned long long, unsigned long long);
unsigned long long func_andn64(unsigned long long X, unsigned long long Y) {
  return __andn_u64(X, Y);
}


x86 assembly (clang, -O0):
<func_andn64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__andn_u64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func_andn64>:
jmp    1030 <__andn_u64@plt>

LLVM IR (-O0):
define i64 @func_andn64(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i64 @__andn_u64(i64 %5, i64 %6)
ret i64 %7
}

LLVM IR (-O2):
define i64 @func_andn64(i64 %0, i64 %1) {
%3 = tail call i64 @__andn_u64(i64 %0, i64 %1)
ret i64 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int score[10];
  int name[10];
  printf("Votre Nom: ");
  scanf("%s", name);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
lea    -0x60(%rbp),%rsi
lea    0xec6(%rip),%rdi
call   1040 <scanf@plt>
xor    %eax,%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x28,%rsp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xed5(%rip),%rdi
mov    %rsp,%rsi
call   1040 <scanf@plt>
xor    %eax,%eax
add    $0x28,%rsp
ret

LLVM IR (-O0):
@.str = [12 x i8] c"Votre Nom: \00"
@.str.1 = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca [10 x i32]
%3 = alloca [10 x i32]
store i32 0, i32* %1
%4 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%5 = getelementptr inbounds [10 x i32], [10 x i32]* %3, i64 0, i64 0
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"Votre Nom: \00"
@.str.1 = [3 x i8] c"%s\00"
define i32 @main() {
%1 = alloca [10 x i32]
%2 = bitcast [10 x i32]* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%4 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%5 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %4)
ret i32 0
}
int replicate_swizzle(const int swizzle) {
  return ((((swizzle >> 0) & 0x3) == ((swizzle >> 2) & 0x3)) &&
          (((swizzle >> 2) & 0x3) == ((swizzle >> 4) & 0x3)) &&
          (((swizzle >> 4) & 0x3) == ((swizzle >> 6) & 0x3)));
}


x86 assembly (clang, -O0):
<replicate_swizzle>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
sar    $0x0,%ecx
and    $0x3,%ecx
mov    -0x4(%rbp),%edx
sar    $0x2,%edx
and    $0x3,%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x5(%rbp)
jne    115f <replicate_swizzle+0x5f>
mov    -0x4(%rbp),%ecx
sar    $0x2,%ecx
and    $0x3,%ecx
mov    -0x4(%rbp),%edx
sar    $0x4,%edx
and    $0x3,%edx
xor    %eax,%eax
cmp    %edx,%ecx
mov    %al,-0x5(%rbp)
jne    115f <replicate_swizzle+0x5f>
mov    -0x4(%rbp),%eax
sar    $0x4,%eax
and    $0x3,%eax
mov    -0x4(%rbp),%ecx
sar    $0x6,%ecx
and    $0x3,%ecx
cmp    %ecx,%eax
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<replicate_swizzle>:
mov    %edi,%ecx
and    $0x3,%ecx
mov    %edi,%edx
shr    $0x2,%edx
and    $0x3,%edx
xor    %eax,%eax
cmp    %edx,%ecx
jne    112c <replicate_swizzle+0x2c>
mov    %edi,%edx
shr    $0x4,%edx
and    $0x3,%edx
cmp    %edx,%ecx
jne    112c <replicate_swizzle+0x2c>
shr    $0x6,%edi
and    $0x3,%edi
xor    %eax,%eax
cmp    %edi,%ecx
sete   %al
ret

LLVM IR (-O0):
define i32 @replicate_swizzle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 0
%5 = and i32 %4, 3
%6 = load i32, i32* %2
%7 = ashr i32 %6, 2
%8 = and i32 %7, 3
%9 = icmp eq i32 %5, %8
br i1 %9, label %10, label %26
10: ; preds = %1
%11 = load i32, i32* %2
%12 = ashr i32 %11, 2
%13 = and i32 %12, 3
%14 = load i32, i32* %2
%15 = ashr i32 %14, 4
%16 = and i32 %15, 3
%17 = icmp eq i32 %13, %16
br i1 %17, label %18, label %26
18: ; preds = %10
%19 = load i32, i32* %2
%20 = ashr i32 %19, 4
%21 = and i32 %20, 3
%22 = load i32, i32* %2
%23 = ashr i32 %22, 6
%24 = and i32 %23, 3
%25 = icmp eq i32 %21, %24
br label %26
26: ; preds = %18, %10, %1
%27 = phi i1 [ false, %10 ], [ false, %1 ], [ %25, %18 ]
%28 = zext i1 %27 to i32
ret i32 %28
}

LLVM IR (-O2):
define i32 @replicate_swizzle(i32 %0) {
%2 = and i32 %0, 3
%3 = lshr i32 %0, 2
%4 = and i32 %3, 3
%5 = icmp eq i32 %2, %4
br i1 %5, label %6, label %15
6: ; preds = %1
%7 = lshr i32 %0, 4
%8 = and i32 %7, 3
%9 = icmp eq i32 %2, %8
br i1 %9, label %10, label %15
10: ; preds = %6
%11 = lshr i32 %0, 6
%12 = and i32 %11, 3
%13 = icmp eq i32 %2, %12
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %10, %6, %1
%16 = phi i32 [ 0, %6 ], [ 0, %1 ], [ %14, %10 ]
ret i32 %16
}
void foo_2_2_1_2_2_2_1_2_2() {}


x86 assembly (clang, -O0):
<foo_2_2_1_2_2_2_1_2_2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo_2_2_1_2_2_2_1_2_2>:
ret

LLVM IR (-O0):
define void @foo_2_2_1_2_2_2_1_2_2() {
ret void
}

LLVM IR (-O2):
define void @foo_2_2_1_2_2_2_1_2_2() {
ret void
}
/* Variables and functions */
int start_threaded_log();
int stop_threaded_log();
int multilog_async(int enabled) {
  return enabled ? start_threaded_log() : stop_threaded_log();
}


x86 assembly (clang, -O0):
<multilog_async>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1144 <multilog_async+0x24>
mov    $0x0,%al
call   1040 <start_threaded_log@plt>
mov    %eax,-0x8(%rbp)
jmp    114e <multilog_async+0x2e>
mov    $0x0,%al
call   1030 <stop_threaded_log@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<multilog_async>:
xor    %eax,%eax
test   %edi,%edi
je     112b <multilog_async+0xb>
jmp    1040 <start_threaded_log@plt>
jmp    1030 <stop_threaded_log@plt>

LLVM IR (-O0):
define i32 @multilog_async(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 (...) @start_threaded_log()
br label %9
7: ; preds = %1
%8 = call i32 (...) @stop_threaded_log()
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %8, %7 ]
ret i32 %10
}

LLVM IR (-O2):
define i32 @multilog_async(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 (...) @start_threaded_log()
br label %7
5: ; preds = %1
%6 = tail call i32 (...) @stop_threaded_log()
br label %7
7: ; preds = %5, %3
%8 = phi i32 [ %4, %3 ], [ %6, %5 ]
ret i32 %8
}
float __VERIFIER_nondet_float() { return 0; }


x86 assembly (clang, -O0):
<__VERIFIER_nondet_float>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_nondet_float>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @__VERIFIER_nondet_float() {
ret float 0.000000e+00
}

LLVM IR (-O2):
define float @__VERIFIER_nondet_float() {
ret float 0.000000e+00
}
void prcmu_debug_dump_data_mem(void) {}


x86 assembly (clang, -O0):
<prcmu_debug_dump_data_mem>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<prcmu_debug_dump_data_mem>:
ret

LLVM IR (-O0):
define void @prcmu_debug_dump_data_mem() {
ret void
}

LLVM IR (-O2):
define void @prcmu_debug_dump_data_mem() {
ret void
}
/* Type definitions */
struct rusage {
  int dummy;
};

/* Variables and functions */
scalar_t__ shim_enosys(int /*<<< orphan*/, int, struct rusage *);
int shim_getrusage(int who, struct rusage *usage) {
  return (int)shim_enosys(0, who, usage);
}


x86 assembly (clang, -O0):
<shim_getrusage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
xor    %edi,%edi
call   1030 <shim_enosys@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shim_getrusage>:
mov    %rsi,%rdx
mov    %edi,%esi
xor    %edi,%edi
jmp    1030 <shim_enosys@plt>

LLVM IR (-O0):
%struct.rusage = type { i32 }
define i32 @shim_getrusage(i32 %0, %struct.rusage* %1) {
%3 = alloca i32
%4 = alloca %struct.rusage*
store i32 %0, i32* %3
store %struct.rusage* %1, %struct.rusage** %4
%5 = load i32, i32* %3
%6 = load %struct.rusage*, %struct.rusage** %4
%7 = call i64 @shim_enosys(i32 0, i32 %5, %struct.rusage* %6)
%8 = trunc i64 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
%struct.rusage = type { i32 }
define i32 @shim_getrusage(i32 %0, %struct.rusage* %1) {
%3 = tail call i64 @shim_enosys(i32 0, i32 %0, %struct.rusage* %1)
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ MCUSendCmdContinueRecordCtrl(int /*<<< orphan*/);
void MCUSendCmdContinueRecordCtrlStart() { MCUSendCmdContinueRecordCtrl(0); }


x86 assembly (clang, -O0):
<MCUSendCmdContinueRecordCtrlStart>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <MCUSendCmdContinueRecordCtrl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MCUSendCmdContinueRecordCtrlStart>:
xor    %edi,%edi
jmp    1030 <MCUSendCmdContinueRecordCtrl@plt>

LLVM IR (-O0):
define void @MCUSendCmdContinueRecordCtrlStart() {
%1 = call i32 @MCUSendCmdContinueRecordCtrl(i32 0)
ret void
}

LLVM IR (-O2):
define void @MCUSendCmdContinueRecordCtrlStart() {
%1 = tail call i32 @MCUSendCmdContinueRecordCtrl(i32 0)
ret void
}
int ft_toupper(int c) {
  if (97 <= c && c <= 122)
    return (c - 'a' + 'A');
  else
    return (c);
}


x86 assembly (clang, -O0):
<ft_toupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    $0x61,%eax
cmp    -0x8(%rbp),%eax
jg     1130 <ft_toupper+0x30>
cmpl   $0x7a,-0x8(%rbp)
jg     1130 <ft_toupper+0x30>
mov    -0x8(%rbp),%eax
sub    $0x61,%eax
add    $0x41,%eax
mov    %eax,-0x4(%rbp)
jmp    1136 <ft_toupper+0x36>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_toupper>:
lea    -0x61(%rdi),%ecx
lea    -0x20(%rdi),%eax
cmp    $0x1a,%ecx
cmovae %edi,%eax
ret

LLVM IR (-O0):
define i32 @ft_toupper(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 97, %4
br i1 %5, label %6, label %13
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 122
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 97
%12 = add nsw i32 %11, 65
store i32 %12, i32* %2
br label %15
13: ; preds = %6, %1
%14 = load i32, i32* %3
store i32 %14, i32* %2
br label %15
15: ; preds = %13, %9
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @ft_toupper(i32 %0) {
%2 = add i32 %0, -97
%3 = icmp ult i32 %2, 26
%4 = add nsw i32 %0, -32
%5 = select i1 %3, i32 %4, i32 %0
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int /*<<< orphan*/ _verrx(int, char const *, int /*<<< orphan*/);
void verrx(int eval, const char *fmt, va_list ap) { _verrx(eval, fmt, ap); }


x86 assembly (clang, -O0):
<verrx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <_verrx@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<verrx>:
jmp    1030 <_verrx@plt>

LLVM IR (-O0):
define void @verrx(i32 %0, i8* %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i8*, i8** %5
%9 = load i32, i32* %6
%10 = call i32 @_verrx(i32 %7, i8* %8, i32 %9)
ret void
}

LLVM IR (-O2):
define void @verrx(i32 %0, i8* %1, i32 %2) {
%4 = tail call i32 @_verrx(i32 %0, i8* %1, i32 %2)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int rotateRight(int, int);
uint32_t BigSigma1(uint32_t x) {
  return rotateRight(x, 6) ^ rotateRight(x, 11) ^ rotateRight(x, 25);
}


x86 assembly (clang, -O0):
<BigSigma1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x6,%esi
call   1030 <rotateRight@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    $0xb,%esi
call   1030 <rotateRight@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
xor    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x19,%esi
call   1030 <rotateRight@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
xor    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BigSigma1>:
push   %rbp
push   %r14
push   %rbx
mov    %edi,%ebx
mov    $0x6,%esi
call   1030 <rotateRight@plt>
mov    %eax,%r14d
mov    %ebx,%edi
mov    $0xb,%esi
call   1030 <rotateRight@plt>
mov    %eax,%ebp
xor    %r14d,%ebp
mov    %ebx,%edi
mov    $0x19,%esi
call   1030 <rotateRight@plt>
xor    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @BigSigma1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @rotateRight(i32 %3, i32 6)
%5 = load i32, i32* %2
%6 = call i32 @rotateRight(i32 %5, i32 11)
%7 = xor i32 %4, %6
%8 = load i32, i32* %2
%9 = call i32 @rotateRight(i32 %8, i32 25)
%10 = xor i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @BigSigma1(i32 %0) {
%2 = tail call i32 @rotateRight(i32 %0, i32 6)
%3 = tail call i32 @rotateRight(i32 %0, i32 11)
%4 = xor i32 %3, %2
%5 = tail call i32 @rotateRight(i32 %0, i32 25)
%6 = xor i32 %4, %5
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int lib1p1();
int lib1t1();
int lib1t3();
int lib1test(void) {
  if (lib1t1() != 1 + 10)
    abort();
  if (lib1t3() != 1)
    abort();
  if (lib1p1() != 1 + 10)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<lib1test>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <lib1t1@plt>
cmp    $0xb,%eax
je     115b <lib1test+0x1b>
mov    $0x0,%al
call   1030 <abort@plt>
mov    $0x0,%al
call   1050 <lib1t3@plt>
cmp    $0x1,%eax
je     1172 <lib1test+0x32>
mov    $0x0,%al
call   1030 <abort@plt>
mov    $0x0,%al
call   1060 <lib1p1@plt>
cmp    $0xb,%eax
je     1189 <lib1test+0x49>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lib1test>:
push   %rax
xor    %eax,%eax
call   1040 <lib1t1@plt>
cmp    $0xb,%eax
jne    1169 <lib1test+0x29>
xor    %eax,%eax
call   1050 <lib1t3@plt>
cmp    $0x1,%eax
jne    1169 <lib1test+0x29>
xor    %eax,%eax
call   1060 <lib1p1@plt>
cmp    $0xb,%eax
jne    1169 <lib1test+0x29>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @lib1test() {
%1 = call i32 (...) @lib1t1()
%2 = icmp ne i32 %1, 11
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = call i32 (...) @lib1t3()
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %5
%9 = call i32 (...) @abort()
unreachable
10: ; preds = %5
%11 = call i32 (...) @lib1p1()
%12 = icmp ne i32 %11, 11
br i1 %12, label %13, label %15
13: ; preds = %10
%14 = call i32 (...) @abort()
unreachable
15: ; preds = %10
ret i32 0
}

LLVM IR (-O2):
define i32 @lib1test() {
%1 = tail call i32 (...) @lib1t1()
%2 = icmp eq i32 %1, 11
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = tail call i32 (...) @lib1t3()
%7 = icmp eq i32 %6, 1
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call i32 (...) @abort()
unreachable
10: ; preds = %5
%11 = tail call i32 (...) @lib1p1()
%12 = icmp eq i32 %11, 11
br i1 %12, label %15, label %13
13: ; preds = %10
%14 = tail call i32 (...) @abort()
unreachable
15: ; preds = %10
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ ADC16(int /*<<< orphan*/);
int /*<<< orphan*/ SA1Immediate16(int);
void Op69M0(void) { ADC16(SA1Immediate16(1)); }


x86 assembly (clang, -O0):
<Op69M0>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1040 <SA1Immediate16@plt>
mov    %eax,%edi
call   1030 <ADC16@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op69M0>:
push   %rax
mov    $0x1,%edi
call   1040 <SA1Immediate16@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <ADC16@plt>

LLVM IR (-O0):
define void @Op69M0() {
%1 = call i32 @SA1Immediate16(i32 1)
%2 = call i32 @ADC16(i32 %1)
ret void
}

LLVM IR (-O2):
define void @Op69M0() {
%1 = tail call i32 @SA1Immediate16(i32 1)
%2 = tail call i32 @ADC16(i32 %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ string;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fgets(char *, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ rewind(int /*<<< orphan*/ *);
int lineCount(FILE *file) {
  int lines = 0;
  char string[100];
  rewind(file);
  while (fgets(string, sizeof(string), file) != NULL) {
    lines++;
  }
  return lines;
}


x86 assembly (clang, -O0):
<lineCount>:
push   %rbp
mov    %rsp,%rbp
sub    $0x70,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <rewind@plt>
lea    -0x70(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    $0x64,%esi
call   1040 <fgets@plt>
cmp    $0x0,%rax
je     1166 <lineCount+0x46>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113c <lineCount+0x1c>
mov    -0xc(%rbp),%eax
add    $0x70,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lineCount>:
push   %rbp
push   %r14
push   %rbx
sub    $0x70,%rsp
mov    %rdi,%rbx
call   1030 <rewind@plt>
mov    $0xffffffff,%ebp
mov    %rsp,%r14
nopl   0x0(%rax,%rax,1)
mov    %r14,%rdi
mov    $0x64,%esi
mov    %rbx,%rdx
call   1040 <fgets@plt>
add    $0x1,%ebp
test   %rax,%rax
jne    1140 <lineCount+0x20>
mov    %ebp,%eax
add    $0x70,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @lineCount(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca [100 x i8]
store i32* %0, i32** %2
store i32 0, i32* %3
%5 = load i32*, i32** %2
%6 = call i32 @rewind(i32* %5)
br label %7
7: ; preds = %12, %1
%8 = getelementptr inbounds [100 x i8], [100 x i8]* %4, i64 0, i64 0
%9 = load i32*, i32** %2
%10 = call i32* @fgets(i8* %8, i32 100, i32* %9)
%11 = icmp ne i32* %10, null
br i1 %11, label %12, label %15
12: ; preds = %7
%13 = load i32, i32* %3
%14 = add nsw i32 %13, 1
store i32 %14, i32* %3
br label %7
15: ; preds = %7
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @lineCount(i32* nocapture %0) {
%2 = alloca [100 x i8]
%3 = getelementptr inbounds [100 x i8], [100 x i8]* %2, i64 0, i64 0
%4 = tail call i32 @rewind(i32* %0)
br label %5
5: ; preds = %5, %1
%6 = phi i32 [ 0, %1 ], [ %9, %5 ]
%7 = call i32* @fgets(i8* %3, i32 100, i32* %0)
%8 = icmp eq i32* %7, null
%9 = add nuw nsw i32 %6, 1
br i1 %8, label %10, label %5
10: ; preds = %5
ret i32 %6
}
double v1f(double v1, double v) { return -0.5 * v1 + v; }


x86 assembly (clang, -O0):
<v1f>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  0xee0(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<v1f>:
mulsd  0xef8(%rip),%xmm0
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @v1f(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @llvm.fmuladd.f64(double -5.000000e-01, double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @v1f(double %0, double %1) {
%3 = tail call double @llvm.fmuladd.f64(double %0, double -5.000000e-01, double %1)
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xbc() {
  Assert_real((isalnum(188) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              945, ("isalnum should be 0 for 0xbc"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xbc>:
push   %rbp
mov    %rsp,%rbp
mov    $0xbc,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3b1,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xbc>:
push   %rax
mov    $0xbc,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3b1,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xbc\00"
define void @t_isalnum_0xbc() {
%1 = call i64 @isalnum(i32 188)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 945, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xbc\00"
define void @t_isalnum_0xbc() {
%1 = tail call i64 @isalnum(i32 188)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 945, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_OK;
scalar_t__ access(char *, int /*<<< orphan*/);
bool file_exists(char *path) { return access(path, F_OK) == 0; }


x86 assembly (clang, -O0):
<file_exists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_exists>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@F_OK = global i32 0
define i32 @file_exists(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i32, i32* @F_OK
%5 = call i64 @access(i8* %3, i32 %4)
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
@F_OK = global i32 0
define i32 @file_exists(i8* nocapture %0) {
%2 = load i32, i32* @F_OK
%3 = tail call i64 @access(i8* %0, i32 %2)
%4 = icmp eq i64 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ MyFree(void *);
void SzFree(void *p, void *address) {
  p = p;
  MyFree(address);
}


x86 assembly (clang, -O0):
<SzFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <MyFree@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SzFree>:
mov    %rsi,%rdi
jmp    1030 <MyFree@plt>

LLVM IR (-O0):
define void @SzFree(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
store i8* %5, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @MyFree(i8* %6)
ret void
}

LLVM IR (-O2):
define void @SzFree(i8* nocapture readnone %0, i8* %1) {
%3 = tail call i32 @MyFree(i8* %1)
ret void
}
void received_uart(int *coordinates) {
  coordinates[0] = 0;
  coordinates[1] = 0;
}


x86 assembly (clang, -O0):
<received_uart>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x8(%rbp),%rax
movl   $0x0,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<received_uart>:
movq   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @received_uart(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 0
store i32 0, i32* %4
%5 = load i32*, i32** %2
%6 = getelementptr inbounds i32, i32* %5, i64 1
store i32 0, i32* %6
ret void
}

LLVM IR (-O2):
define void @received_uart(i32* nocapture writeonly %0) {
store i32 0, i32* %0
%2 = getelementptr inbounds i32, i32* %0, i64 1
store i32 0, i32* %2
ret void
}
/* Variables and functions */
float cosf(float);
float EaseSineIn(float t, float b, float c, float d) {
  return (-c * cosf(t / d * (3.14159265358979323846f / 2.0f)) + c + b);
}


x86 assembly (clang, -O0):
<EaseSineIn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x4(%rbp),%xmm0
divss  -0x10(%rbp),%xmm0
movss  0xeab(%rip),%xmm1
mulss  %xmm1,%xmm0
call   1030 <cosf@plt>
movaps %xmm0,%xmm2
movss  -0x14(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
addss  -0x8(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EaseSineIn>:
push   %rax
movss  %xmm2,(%rsp)
movss  %xmm1,0x4(%rsp)
divss  %xmm3,%xmm0
mulss  0xed8(%rip),%xmm0
call   1030 <cosf@plt>
movss  (%rsp),%xmm1
mulss  %xmm1,%xmm0
subss  %xmm0,%xmm1
addss  0x4(%rsp),%xmm1
movaps %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @EaseSineIn(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %7
%10 = fneg float %9
%11 = load float, float* %5
%12 = load float, float* %8
%13 = fdiv float %11, %12
%14 = fmul float %13, 0x3FF921FB60000000
%15 = call float @cosf(float %14)
%16 = load float, float* %7
%17 = call float @llvm.fmuladd.f32(float %10, float %15, float %16)
%18 = load float, float* %6
%19 = fadd float %17, %18
ret float %19
}

LLVM IR (-O2):
define float @EaseSineIn(float %0, float %1, float %2, float %3) {
%5 = fneg float %2
%6 = fdiv float %0, %3
%7 = fmul float %6, 0x3FF921FB60000000
%8 = tail call float @cosf(float %7)
%9 = tail call float @llvm.fmuladd.f32(float %5, float %8, float %2)
%10 = fadd float %9, %1
ret float %10
}
/* Variables and functions */
int mlt(int, int);
int mltn(int n, int x) {
  int i, j;
  if (n == 0)
    return 1;
  i = x;
  for (j = 0; j < n - 1; j++)
    i = mlt(i, x);
  return i;
}


x86 assembly (clang, -O0):
<mltn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1134 <mltn+0x24>
movl   $0x1,-0x4(%rbp)
jmp    1174 <mltn+0x64>
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0x8(%rbp),%ecx
sub    $0x1,%ecx
cmp    %ecx,%eax
jge    116e <mltn+0x5e>
mov    -0x10(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <mlt@plt>
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1141 <mltn+0x31>
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mltn>:
push   %rbp
push   %rbx
push   %rax
test   %edi,%edi
je     1140 <mltn+0x30>
mov    %esi,%ebx
mov    %edi,%ebp
cmp    $0x2,%edi
jl     1147 <mltn+0x37>
add    $0xffffffff,%ebp
mov    %ebx,%eax
cs nopw 0x0(%rax,%rax,1)
nop
mov    %eax,%edi
mov    %ebx,%esi
call   1030 <mlt@plt>
add    $0xffffffff,%ebp
jne    1130 <mltn+0x20>
jmp    1149 <mltn+0x39>
mov    $0x1,%eax
jmp    1149 <mltn+0x39>
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mltn(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%8 = load i32, i32* %4
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %2
store i32 1, i32* %3
br label %27
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %6
store i32 0, i32* %7
br label %13
13: ; preds = %22, %11
%14 = load i32, i32* %7
%15 = load i32, i32* %4
%16 = sub nsw i32 %15, 1
%17 = icmp slt i32 %14, %16
br i1 %17, label %18, label %25
18: ; preds = %13
%19 = load i32, i32* %6
%20 = load i32, i32* %5
%21 = call i32 @mlt(i32 %19, i32 %20)
store i32 %21, i32* %6
br label %22
22: ; preds = %18
%23 = load i32, i32* %7
%24 = add nsw i32 %23, 1
store i32 %24, i32* %7
br label %13
25: ; preds = %13
%26 = load i32, i32* %6
store i32 %26, i32* %3
br label %27
27: ; preds = %25, %10
%28 = load i32, i32* %3
ret i32 %28
}

LLVM IR (-O2):
define i32 @mltn(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %13, label %4
4: ; preds = %2
%5 = add i32 %0, -1
%6 = icmp sgt i32 %0, 1
br i1 %6, label %7, label %13
7: ; preds = %4, %7
%8 = phi i32 [ %11, %7 ], [ 0, %4 ]
%9 = phi i32 [ %10, %7 ], [ %1, %4 ]
%10 = tail call i32 @mlt(i32 %9, i32 %1)
%11 = add nuw nsw i32 %8, 1
%12 = icmp eq i32 %11, %5
br i1 %12, label %13, label %7
13: ; preds = %7, %4, %2
%14 = phi i32 [ 1, %2 ], [ %1, %4 ], [ %10, %7 ]
ret i32 %14
}
int replaceNewLine(char s[]) {
  int j = 0;
  while (s[j] != '\0') {
    if (s[j] == '\n' || s[j] == '\'') {
      s[j] = ' ';
    }
    j++;
  }
  return 0;
}


x86 assembly (clang, -O0):
<replaceNewLine>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1168 <replaceNewLine+0x68>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
je     114e <replaceNewLine+0x4e>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x27,%eax
jne    115a <replaceNewLine+0x5a>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x20,(%rax,%rcx,1)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <replaceNewLine+0xf>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<replaceNewLine>:
jmp    1117 <replaceNewLine+0x17>
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movb   $0x20,(%rdi)
add    $0x1,%rdi
movzbl (%rdi),%eax
cmp    $0xa,%al
je     1110 <replaceNewLine+0x10>
cmp    $0x27,%al
je     1110 <replaceNewLine+0x10>
test   %al,%al
jne    1113 <replaceNewLine+0x13>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @replaceNewLine(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %33, %1
%5 = load i8*, i8** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %36
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 10
br i1 %19, label %28, label %20
20: ; preds = %12
%21 = load i8*, i8** %2
%22 = load i32, i32* %3
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = load i8, i8* %24
%26 = sext i8 %25 to i32
%27 = icmp eq i32 %26, 39
br i1 %27, label %28, label %33
28: ; preds = %20, %12
%29 = load i8*, i8** %2
%30 = load i32, i32* %3
%31 = sext i32 %30 to i64
%32 = getelementptr inbounds i8, i8* %29, i64 %31
store i8 32, i8* %32
br label %33
33: ; preds = %28, %20
%34 = load i32, i32* %3
%35 = add nsw i32 %34, 1
store i32 %35, i32* %3
br label %4
36: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @replaceNewLine(i8* nocapture %0) {
br label %2
2: ; preds = %7, %1
%3 = phi i64 [ %8, %7 ], [ 0, %1 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
switch i8 %5, label %7 [
i8 0, label %9
i8 10, label %6
i8 39, label %6
]
6: ; preds = %2, %2
store i8 32, i8* %4
br label %7
7: ; preds = %2, %6
%8 = add nuw i64 %3, 1
br label %2
9: ; preds = %2
ret i32 0
}
int main(int argc, char *argv[]) { return 2; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
ret i32 2
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
ret i32 2
}
/* Variables and functions */
int core8_swap(char *, int);
int U_EMREXTTEXTOUTW_swap(char *record, int torev) {
  return (core8_swap(record, torev));
}


x86 assembly (clang, -O0):
<U_EMREXTTEXTOUTW_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core8_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMREXTTEXTOUTW_swap>:
jmp    1030 <core8_swap@plt>

LLVM IR (-O0):
define i32 @U_EMREXTTEXTOUTW_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @core8_swap(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @U_EMREXTTEXTOUTW_swap(i8* %0, i32 %1) {
%3 = tail call i32 @core8_swap(i8* %0, i32 %1)
ret i32 %3
}
void enqueue_task_stop(struct rq *rq, struct task_struct *p, int flags) {}


x86 assembly (clang, -O0):
<enqueue_task_stop>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<enqueue_task_stop>:
ret

LLVM IR (-O0):
%struct.rq = type opaque
%struct.task_struct = type opaque
define void @enqueue_task_stop(%struct.rq* %0, %struct.task_struct* %1, i32 %2) {
%4 = alloca %struct.rq*
%5 = alloca %struct.task_struct*
%6 = alloca i32
store %struct.rq* %0, %struct.rq** %4
store %struct.task_struct* %1, %struct.task_struct** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.rq = type opaque
%struct.task_struct = type opaque
define void @enqueue_task_stop(%struct.rq* nocapture %0, %struct.task_struct* nocapture %1, i32 %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ LCDWrite(int, int);
void LCDCarriageReturn(void) {
  int index;
  for (index = 0; index < 84; index++) {
    LCDWrite(1, 0x00);
  }
}


x86 assembly (clang, -O0):
<LCDCarriageReturn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x54,-0x4(%rbp)
jge    1143 <LCDCarriageReturn+0x33>
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <LCDWrite@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <LCDCarriageReturn+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCDCarriageReturn>:
push   %rbx
mov    $0x54,%ebx
cs nopw 0x0(%rax,%rax,1)
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <LCDWrite@plt>
add    $0xffffffff,%ebx
jne    1120 <LCDCarriageReturn+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @LCDCarriageReturn() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %7, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 84
br i1 %4, label %5, label %10
5: ; preds = %2
%6 = call i32 @LCDWrite(i32 1, i32 0)
br label %7
7: ; preds = %5
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %2
10: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @LCDCarriageReturn() {
br label %1
1: ; preds = %0, %1
%2 = phi i32 [ 0, %0 ], [ %4, %1 ]
%3 = tail call i32 @LCDWrite(i32 1, i32 0)
%4 = add nuw nsw i32 %2, 1
%5 = icmp eq i32 %4, 84
br i1 %5, label %6, label %1
6: ; preds = %1
ret void
}
int test_imm_9Cuint16_mem(unsigned short *val) {
  return ((*val) & (-0x9C << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_9Cuint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0xffffff64,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_9Cuint16_mem>:
movzwl (%rdi),%eax
test   $0xff64,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_9Cuint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, -156
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_9Cuint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -156
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
struct i8x_object {
  int dummy;
};
struct i8x_list {
  int dummy;
};

/* Variables and functions */
scalar_t__ i8x_ob_ref(struct i8x_object *);
struct i8x_list *__attribute__((always_)) i8x_list_ref(struct i8x_list *x) {
  return (struct i8x_list *)i8x_ob_ref((struct i8x_object *)x);
}


x86 assembly (clang, -O0):
<i8x_list_ref>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <i8x_ob_ref@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i8x_list_ref>:
jmp    1030 <i8x_ob_ref@plt>

LLVM IR (-O0):
%struct.i8x_list = type { i32 }
%struct.i8x_object = type { i32 }
define %struct.i8x_list* @i8x_list_ref(%struct.i8x_list* %0) {
%2 = alloca %struct.i8x_list*
store %struct.i8x_list* %0, %struct.i8x_list** %2
%3 = load %struct.i8x_list*, %struct.i8x_list** %2
%4 = bitcast %struct.i8x_list* %3 to %struct.i8x_object*
%5 = call i64 @i8x_ob_ref(%struct.i8x_object* %4)
%6 = inttoptr i64 %5 to %struct.i8x_list*
ret %struct.i8x_list* %6
}

LLVM IR (-O2):
%struct.i8x_list = type { i32 }
%struct.i8x_object = type { i32 }
define %struct.i8x_list* @i8x_list_ref(%struct.i8x_list* %0) {
%2 = bitcast %struct.i8x_list* %0 to %struct.i8x_object*
%3 = tail call i64 @i8x_ob_ref(%struct.i8x_object* %2)
%4 = inttoptr i64 %3 to %struct.i8x_list*
ret %struct.i8x_list* %4
}
int band(int x, int y) { return x && y; }


x86 assembly (clang, -O0):
<band>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x9(%rbp)
je     1123 <band+0x23>
cmpl   $0x0,-0x8(%rbp)
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<band>:
test   %edi,%edi
setne  %al
test   %esi,%esi
setne  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @band(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp ne i32 %8, 0
br label %10
10: ; preds = %7, %2
%11 = phi i1 [ false, %2 ], [ %9, %7 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @band(i32 %0, i32 %1) {
%3 = icmp ne i32 %0, 0
%4 = icmp ne i32 %1, 0
%5 = and i1 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
void int2buff(const int n, char *buff) {
  unsigned char *p;
  p = (unsigned char *)buff;
  *p++ = (n >> 24) & 0xFF;
  *p++ = (n >> 16) & 0xFF;
  *p++ = (n >> 8) & 0xFF;
  *p++ = n & 0xFF;
}


x86 assembly (clang, -O0):
<int2buff>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x18,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<int2buff>:
bswap  %edi
mov    %edi,(%rsi)
ret

LLVM IR (-O0):
define void @int2buff(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
store i8* %6, i8** %5
%7 = load i32, i32* %3
%8 = ashr i32 %7, 24
%9 = and i32 %8, 255
%10 = trunc i32 %9 to i8
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %5
store i8 %10, i8* %11
%13 = load i32, i32* %3
%14 = ashr i32 %13, 16
%15 = and i32 %14, 255
%16 = trunc i32 %15 to i8
%17 = load i8*, i8** %5
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %5
store i8 %16, i8* %17
%19 = load i32, i32* %3
%20 = ashr i32 %19, 8
%21 = and i32 %20, 255
%22 = trunc i32 %21 to i8
%23 = load i8*, i8** %5
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %5
store i8 %22, i8* %23
%25 = load i32, i32* %3
%26 = and i32 %25, 255
%27 = trunc i32 %26 to i8
%28 = load i8*, i8** %5
%29 = getelementptr inbounds i8, i8* %28, i32 1
store i8* %29, i8** %5
store i8 %27, i8* %28
ret void
}

LLVM IR (-O2):
define void @int2buff(i32 %0, i8* nocapture writeonly %1) {
%3 = lshr i32 %0, 24
%4 = trunc i32 %3 to i8
%5 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %4, i8* %1
%6 = lshr i32 %0, 16
%7 = trunc i32 %6 to i8
%8 = getelementptr inbounds i8, i8* %1, i64 2
store i8 %7, i8* %5
%9 = lshr i32 %0, 8
%10 = trunc i32 %9 to i8
%11 = getelementptr inbounds i8, i8* %1, i64 3
store i8 %10, i8* %8
%12 = trunc i32 %0 to i8
store i8 %12, i8* %11
ret void
}
int do_fsearch(cnt)
long cnt;
{ do_search("/", cnt, 1); }


x86 assembly (clang, -O0):
<do_fsearch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed9(%rip),%rdi
mov    $0x1,%edx
mov    $0x0,%al
call   1030 <do_search@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_fsearch>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
mov    $0x1,%edx
xor    %eax,%eax
jmp    1030 <do_search@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"/\00"
define i32 @do_fsearch(i64 %0) {
%2 = alloca i32
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = call i32 (i8*, i64, i32, ...) bitcast (i32 (...)* @do_search to i32 (i8*, i64, i32, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i64 %4, i32 1)
%6 = load i32, i32* %2
ret i32 %6
}

LLVM IR (-O2):
@.str = [2 x i8] c"/\00"
define i32 @do_fsearch(i64 %0) {
%2 = tail call i32 (i8*, i64, i32, ...) bitcast (i32 (...)* @do_search to i32 (i8*, i64, i32, ...)*)(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i64 %0, i32 1)
ret i32 undef
}