xunge/DecIR huggingface dataset:
int fsr_fs(unsigned int fsr) { return (fsr & (15)) | (fsr & (1 << 10)) >> 6; }


x86 assembly (clang, -O0):
<fsr_fs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf,%eax
mov    -0x4(%rbp),%ecx
and    $0x400,%ecx
shr    $0x6,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fsr_fs>:
mov    %edi,%eax
and    $0xf,%eax
shr    $0x6,%edi
and    $0x10,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @fsr_fs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 15
%5 = load i32, i32* %2
%6 = and i32 %5, 1024
%7 = lshr i32 %6, 6
%8 = or i32 %4, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @fsr_fs(i32 %0) {
%2 = and i32 %0, 15
%3 = lshr i32 %0, 6
%4 = and i32 %3, 16
%5 = or i32 %4, %2
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ int64_t;
typedef int int32_t;

/* Variables and functions */
int main() {
  int32_t x;
  int64_t l;
  x = 0;
  l = 0;
  x = ~x;
  if (x != 0xffffffff)
    return 1;
  l = ~l;
  if (x != 0xffffffffffffffff)
    return 2;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
je     1138 <main+0x38>
movl   $0x1,-0x4(%rbp)
jmp    1162 <main+0x62>
mov    -0xc(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
movslq -0x8(%rbp),%rax
cmp    $0xffffffffffffffff,%rax
je     115b <main+0x5b>
movl   $0x2,-0x4(%rbp)
jmp    1162 <main+0x62>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = xor i32 %4, -1
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, -1
br i1 %7, label %8, label %9
8: ; preds = %0
store i32 1, i32* %1
br label %17
9: ; preds = %0
%10 = load i32, i32* %3
%11 = xor i32 %10, -1
store i32 %11, i32* %3
%12 = load i32, i32* %2
%13 = sext i32 %12 to i64
%14 = icmp ne i64 %13, -1
br i1 %14, label %15, label %16
15: ; preds = %9
store i32 2, i32* %1
br label %17
16: ; preds = %9
store i32 0, i32* %1
br label %17
17: ; preds = %16, %15, %8
%18 = load i32, i32* %1
ret i32 %18
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void exit_usage(char *name) {
  fprintf(stderr, "%s: argument required\n", name);
}


x86 assembly (clang, -O0):
<exit_usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xed0(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exit_usage>:
mov    %rdi,%rdx
mov    0x2ec6(%rip),%rax
mov    (%rax),%edi
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [23 x i8] c"%s: argument required\0A\00"
define void @exit_usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [23 x i8] c"%s: argument required\0A\00"
define void @exit_usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void fix_tan_overflow(int *value, int oldvalue) {
  if (*value <= -409 && (oldvalue - *value) >= 670)
    *value += 1024;
  else if (*value >= 409 && (oldvalue - *value) <= -670)
    *value -= 1024;
}


x86 assembly (clang, -O0):
<fix_tan_overflow>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
cmpl   $0xfffffe67,(%rax)
jg     1142 <fix_tan_overflow+0x42>
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
sub    (%rcx),%eax
cmp    $0x29e,%eax
jl     1142 <fix_tan_overflow+0x42>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x400,%ecx
mov    %ecx,(%rax)
jmp    1179 <fix_tan_overflow+0x79>
mov    -0x8(%rbp),%rax
cmpl   $0x199,(%rax)
jl     1174 <fix_tan_overflow+0x74>
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
sub    (%rcx),%eax
cmp    $0xfffffd62,%eax
jg     1174 <fix_tan_overflow+0x74>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
sub    $0x400,%ecx
mov    %ecx,(%rax)
jmp    1179 <fix_tan_overflow+0x79>
pop    %rbp
ret

x86 assembly (clang, -O2):
<fix_tan_overflow>:
mov    (%rdi),%eax
sub    %eax,%esi
cmp    $0xfffffe67,%eax
jg     1118 <fix_tan_overflow+0x18>
mov    $0x400,%ecx
cmp    $0x29d,%esi
jg     112c <fix_tan_overflow+0x2c>
cmp    $0x199,%eax
jl     1130 <fix_tan_overflow+0x30>
mov    $0xfffffc00,%ecx
cmp    $0xfffffd62,%esi
jg     1130 <fix_tan_overflow+0x30>
add    %ecx,%eax
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @fix_tan_overflow(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %5
%7 = icmp sle i32 %6, -409
br i1 %7, label %8, label %18
8: ; preds = %2
%9 = load i32, i32* %4
%10 = load i32*, i32** %3
%11 = load i32, i32* %10
%12 = sub nsw i32 %9, %11
%13 = icmp sge i32 %12, 670
br i1 %13, label %14, label %18
14: ; preds = %8
%15 = load i32*, i32** %3
%16 = load i32, i32* %15
%17 = add nsw i32 %16, 1024
store i32 %17, i32* %15
br label %33
18: ; preds = %8, %2
%19 = load i32*, i32** %3
%20 = load i32, i32* %19
%21 = icmp sge i32 %20, 409
br i1 %21, label %22, label %32
22: ; preds = %18
%23 = load i32, i32* %4
%24 = load i32*, i32** %3
%25 = load i32, i32* %24
%26 = sub nsw i32 %23, %25
%27 = icmp sle i32 %26, -670
br i1 %27, label %28, label %32
28: ; preds = %22
%29 = load i32*, i32** %3
%30 = load i32, i32* %29
%31 = sub nsw i32 %30, 1024
store i32 %31, i32* %29
br label %32
32: ; preds = %28, %22, %18
br label %33
33: ; preds = %32, %14
ret void
}

LLVM IR (-O2):
define void @fix_tan_overflow(i32* nocapture %0, i32 %1) {
%3 = load i32, i32* %0
%4 = icmp slt i32 %3, -408
%5 = sub nsw i32 %1, %3
%6 = icmp sgt i32 %5, 669
%7 = select i1 %4, i1 %6, i1 false
br i1 %7, label %12, label %8
8: ; preds = %2
%9 = icmp sgt i32 %3, 408
%10 = icmp slt i32 %5, -669
%11 = select i1 %9, i1 %10, i1 false
br i1 %11, label %12, label %15
12: ; preds = %8, %2
%13 = phi i32 [ 1024, %2 ], [ -1024, %8 ]
%14 = add nsw i32 %3, %13
store i32 %14, i32* %0
br label %15
15: ; preds = %12, %8
ret void
}
int test_imm_3Aint8_reg(signed char val) {
  return ((val) & (-0x3A << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_3Aint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edx
and    $0xffffffc6,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_3Aint8_reg>:
test   $0xc6,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_3Aint8_reg(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, -58
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_3Aint8_reg(i8 signext %0) {
%2 = and i8 %0, -58
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
const char *test_2_get_title(void) {
  return "Repeated write many small files and one big deleted file";
}


x86 assembly (clang, -O0):
<test_2_get_title>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_2_get_title>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [57 x i8] c"Repeated write many small files and one big deleted file\00"
define i8* @test_2_get_title() {
ret i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [57 x i8] c"Repeated write many small files and one big deleted file\00"
define i8* @test_2_get_title() {
ret i8* getelementptr inbounds ([57 x i8], [57 x i8]* @.str, i64 0, i64 0)
}
void ELMCIdleModeSelect(unsigned int baseAddr, unsigned int mode) {
  (*((volatile unsigned int *)(baseAddr + (0x10)))) &= ~(0x00000018u);
  (*((volatile unsigned int *)(baseAddr + (0x10)))) |=
      ((mode << (0x00000003u)) & (0x00000018u));
}


x86 assembly (clang, -O0):
<ELMCIdleModeSelect>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%eax
mov    %eax,%eax
mov    (%rax),%ecx
and    $0xffffffe7,%ecx
mov    %ecx,(%rax)
mov    -0x8(%rbp),%edx
shl    $0x3,%edx
and    $0x18,%edx
mov    -0x4(%rbp),%eax
add    $0x10,%eax
mov    %eax,%eax
mov    (%rax),%ecx
or     %edx,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ELMCIdleModeSelect>:
add    $0x10,%edi
andl   $0xffffffe7,(%rdi)
shl    $0x3,%esi
and    $0x18,%esi
or     %esi,(%rdi)
ret

LLVM IR (-O0):
define void @ELMCIdleModeSelect(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add i32 %5, 16
%7 = zext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = and i32 %9, -25
store volatile i32 %10, i32* %8
%11 = load i32, i32* %4
%12 = shl i32 %11, 3
%13 = and i32 %12, 24
%14 = load i32, i32* %3
%15 = add i32 %14, 16
%16 = zext i32 %15 to i64
%17 = inttoptr i64 %16 to i32*
%18 = load volatile i32, i32* %17
%19 = or i32 %18, %13
store volatile i32 %19, i32* %17
ret void
}

LLVM IR (-O2):
define void @ELMCIdleModeSelect(i32 %0, i32 %1) {
%3 = add i32 %0, 16
%4 = zext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
%6 = load volatile i32, i32* %5
%7 = and i32 %6, -25
store volatile i32 %7, i32* %5
%8 = shl i32 %1, 3
%9 = and i32 %8, 24
%10 = load volatile i32, i32* %5
%11 = or i32 %10, %9
store volatile i32 %11, i32* %5
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
int main(void) {
  unsigned int x = 0;
  while (x < 0x0fffffff) {
    x++;
  }
  __VERIFIER_assert(x > 0x0fffffff);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xfffffff,-0x8(%rbp)
jae    1141 <main+0x31>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1126 <main+0x16>
cmpl   $0xfffffff,-0x8(%rbp)
seta   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <__VERIFIER_assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp ult i32 %4, 268435455
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
%10 = load i32, i32* %2
%11 = icmp ugt i32 %10, 268435455
%12 = zext i1 %11 to i32
%13 = call i32 @__VERIFIER_assert(i32 %12)
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @__VERIFIER_assert(i32 0)
ret i32 0
}
/* Variables and functions */
int PicoError(void) { return 0; }


x86 assembly (clang, -O0):
<PicoError>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PicoError>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @PicoError() {
ret i32 0
}

LLVM IR (-O2):
define i32 @PicoError() {
ret i32 0
}
/* Variables and functions */
int sock_send(int, char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
int sock_send_string(int fd, char *string) {
  return sock_send(fd, string, strlen(string));
}


x86 assembly (clang, -O0):
<sock_send_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <sock_send@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sock_send_string>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <sock_send@plt>

LLVM IR (-O0):
define i32 @sock_send_string(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @sock_send(i32 %5, i8* %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @sock_send_string(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @sock_send(i32 %0, i8* %1, i32 %3)
ret i32 %4
}
/* Type definitions */
struct _tuple5 {
  int dummy;
};
struct Cyc_Sexp_Parser {
  int dummy;
};

/* Variables and functions */
struct _tuple5 *Cyc_Sexp_mk_sint(int);
unsigned int Cyc_Sexp_parse_int(struct Cyc_Sexp_Parser *);
struct _tuple5 *Cyc_Sexp_parse_sint(struct Cyc_Sexp_Parser *p) {
  unsigned _T0;
  int _T1;
  struct _tuple5 *_T2;
  _T0 = Cyc_Sexp_parse_int(p);
  _T1 = (int)_T0;
  _T2 = Cyc_Sexp_mk_sint(_T1);
  return _T2;
}


x86 assembly (clang, -O0):
<Cyc_Sexp_parse_sint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <Cyc_Sexp_parse_int@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%edi
call   1030 <Cyc_Sexp_mk_sint@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Sexp_parse_sint>:
push   %rax
call   1040 <Cyc_Sexp_parse_int@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <Cyc_Sexp_mk_sint@plt>

LLVM IR (-O0):
%struct._tuple5 = type { i32 }
%struct.Cyc_Sexp_Parser = type { i32 }
define %struct._tuple5* @Cyc_Sexp_parse_sint(%struct.Cyc_Sexp_Parser* %0) {
%2 = alloca %struct.Cyc_Sexp_Parser*
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct._tuple5*
store %struct.Cyc_Sexp_Parser* %0, %struct.Cyc_Sexp_Parser** %2
%6 = load %struct.Cyc_Sexp_Parser*, %struct.Cyc_Sexp_Parser** %2
%7 = call i32 @Cyc_Sexp_parse_int(%struct.Cyc_Sexp_Parser* %6)
store i32 %7, i32* %3
%8 = load i32, i32* %3
store i32 %8, i32* %4
%9 = load i32, i32* %4
%10 = call %struct._tuple5* @Cyc_Sexp_mk_sint(i32 %9)
store %struct._tuple5* %10, %struct._tuple5** %5
%11 = load %struct._tuple5*, %struct._tuple5** %5
ret %struct._tuple5* %11
}

LLVM IR (-O2):
%struct._tuple5 = type { i32 }
%struct.Cyc_Sexp_Parser = type { i32 }
define %struct._tuple5* @Cyc_Sexp_parse_sint(%struct.Cyc_Sexp_Parser* %0) {
%2 = tail call i32 @Cyc_Sexp_parse_int(%struct.Cyc_Sexp_Parser* %0)
%3 = tail call %struct._tuple5* @Cyc_Sexp_mk_sint(i32 %2)
ret %struct._tuple5* %3
}
/* Type definitions */
typedef scalar_t__ int64_t;
typedef scalar_t__ const int32_t;

/* Variables and functions */
scalar_t__ const INT32_MAX;
scalar_t__ const INT32_MIN;
int32_t __stdfix_sat_lr(const int64_t x) {
  if (x > INT32_MAX)
    return (INT32_MAX);
  if (x < INT32_MIN)
    return (INT32_MIN);
  return ((int32_t)x);
}


x86 assembly (clang, -O0):
<__stdfix_sat_lr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x2ecd(%rip),%rcx
cmp    (%rcx),%rax
jle    112f <__stdfix_sat_lr+0x2f>
mov    0x2ebd(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    115e <__stdfix_sat_lr+0x5e>
mov    -0x10(%rbp),%rax
mov    0x2e9e(%rip),%rcx
cmp    (%rcx),%rax
jge    1156 <__stdfix_sat_lr+0x56>
mov    0x2e8e(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
jmp    115e <__stdfix_sat_lr+0x5e>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__stdfix_sat_lr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@INT32_MAX = constant i64 0
@INT32_MIN = constant i64 0
define i64 @__stdfix_sat_lr(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = load i64, i64* @INT32_MAX
%6 = icmp sgt i64 %4, %5
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i64, i64* @INT32_MAX
store i64 %8, i64* %2
br label %17
9: ; preds = %1
%10 = load i64, i64* %3
%11 = load i64, i64* @INT32_MIN
%12 = icmp slt i64 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = load i64, i64* @INT32_MIN
store i64 %14, i64* %2
br label %17
15: ; preds = %9
%16 = load i64, i64* %3
store i64 %16, i64* %2
br label %17
17: ; preds = %15, %13, %7
%18 = load i64, i64* %2
ret i64 %18
}

LLVM IR (-O2):
@INT32_MAX = constant i64 0
@INT32_MIN = constant i64 0
define i64 @__stdfix_sat_lr(i64 %0) {
ret i64 0
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cReadByte(int, unsigned char *);
int /*<<< orphan*/ VIM_SIF_I2cWriteByte(int, unsigned char);
void SensorSetMirrorFlip_BF3403(unsigned char val) {
  unsigned char x;
  val = ~val;
  VIM_SIF_I2cReadByte(0x1e, &x);
  VIM_SIF_I2cWriteByte(0x1e, (unsigned char)(x & 0xcf) | ((val & 0x03) << 4));
}


x86 assembly (clang, -O0):
<SensorSetMirrorFlip_BF3403>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0x1(%rbp)
mov    $0x1e,%edi
lea    -0x2(%rbp),%rsi
call   1030 <VIM_SIF_I2cReadByte@plt>
movzbl -0x2(%rbp),%eax
and    $0xcf,%eax
movzbl %al,%eax
movzbl -0x1(%rbp),%ecx
and    $0x3,%ecx
shl    $0x4,%ecx
or     %ecx,%eax
mov    $0x1e,%edi
movzbl %al,%esi
call   1040 <VIM_SIF_I2cWriteByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorSetMirrorFlip_BF3403>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
lea    0xf(%rsp),%rsi
mov    $0x1e,%edi
call   1030 <VIM_SIF_I2cReadByte@plt>
mov    0xf(%rsp),%al
and    $0xcf,%al
shl    $0x4,%bl
and    $0x30,%bl
or     %al,%bl
xor    $0x30,%bl
movzbl %bl,%esi
mov    $0x1e,%edi
call   1040 <VIM_SIF_I2cWriteByte@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @SensorSetMirrorFlip_BF3403(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = zext i8 %4 to i32
%6 = xor i32 %5, -1
%7 = trunc i32 %6 to i8
store i8 %7, i8* %2
%8 = call i32 @VIM_SIF_I2cReadByte(i32 30, i8* %3)
%9 = load i8, i8* %3
%10 = zext i8 %9 to i32
%11 = and i32 %10, 207
%12 = trunc i32 %11 to i8
%13 = zext i8 %12 to i32
%14 = load i8, i8* %2
%15 = zext i8 %14 to i32
%16 = and i32 %15, 3
%17 = shl i32 %16, 4
%18 = or i32 %13, %17
%19 = trunc i32 %18 to i8
%20 = call i32 @VIM_SIF_I2cWriteByte(i32 30, i8 zeroext %19)
ret void
}

LLVM IR (-O2):
define void @SensorSetMirrorFlip_BF3403(i8 zeroext %0) {
%2 = alloca i8
%3 = call i32 @VIM_SIF_I2cReadByte(i32 30, i8* %2)
%4 = load i8, i8* %2
%5 = and i8 %4, -49
%6 = shl i8 %0, 4
%7 = and i8 %6, 48
%8 = or i8 %5, %7
%9 = xor i8 %8, 48
%10 = call i32 @VIM_SIF_I2cWriteByte(i32 30, i8 zeroext %9)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ writeidel(int, int /*<<< orphan*/);
void ide_write_qua_l(uint16_t addr, uint32_t val, void *priv) {
  writeidel(3, val);
}


x86 assembly (clang, -O0):
<ide_write_qua_l>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x8(%rbp),%esi
mov    $0x3,%edi
call   1030 <writeidel@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ide_write_qua_l>:
mov    $0x3,%edi
jmp    1030 <writeidel@plt>

LLVM IR (-O0):
define void @ide_write_qua_l(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32, i32* %5
%8 = call i32 @writeidel(i32 3, i32 %7)
ret void
}

LLVM IR (-O2):
define void @ide_write_qua_l(i32 %0, i32 %1, i8* nocapture readnone %2) {
%4 = tail call i32 @writeidel(i32 3, i32 %1)
ret void
}
int LZ4IO_isSkippableMagicNumber(unsigned int magic) {
  return (magic & 0xFFFFFFF0) == 0x184D2A50;
}


x86 assembly (clang, -O0):
<LZ4IO_isSkippableMagicNumber>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfffffff0,%eax
cmp    $0x184d2a50,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4IO_isSkippableMagicNumber>:
and    $0xfffffff0,%edi
xor    %eax,%eax
cmp    $0x184d2a50,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @LZ4IO_isSkippableMagicNumber(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -16
%5 = icmp eq i32 %4, 407710288
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @LZ4IO_isSkippableMagicNumber(i32 %0) {
%2 = and i32 %0, -16
%3 = icmp eq i32 %2, 407710288
%4 = zext i1 %3 to i32
ret i32 %4
}
void idle_main(void) {
  while (1) {
    asm volatile("wait");
  }
}


x86 assembly (clang, -O0):
<idle_main>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <idle_main+0x9>
fwait
jmp    1109 <idle_main+0x9>

x86 assembly (clang, -O2):
<idle_main>:
fwait
jmp    1100 <idle_main>

LLVM IR (-O0):
define void @idle_main() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @idle_main() {
br label %1
1: ; preds = %0, %1
tail call void asm sideeffect "wait", "~{dirflag},~{fpsr},~{flags}"()
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ hoc_pushx(int);
int /*<<< orphan*/ hoc_ret();
hoc_Lw() {
  hoc_ret();
  hoc_pushx(0.);
}


x86 assembly (clang, -O0):
<hoc_Lw>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <hoc_ret@plt>
xor    %edi,%edi
call   1040 <hoc_pushx@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hoc_Lw>:
push   %rax
xor    %eax,%eax
call   1030 <hoc_ret@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <hoc_pushx@plt>

LLVM IR (-O0):
define i32 @hoc_Lw() {
%1 = alloca i32
%2 = call i32 (...) @hoc_ret()
%3 = call i32 @hoc_pushx(i32 0)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
define i32 @hoc_Lw() {
%1 = tail call i32 (...) @hoc_ret()
%2 = tail call i32 @hoc_pushx(i32 0)
ret i32 undef
}
void logMessage(const char *name, unsigned long value, const char *unit) {
  ;
  char buf[100];
  sprintf(buf, "%lu", value);
  logMessage(name, buf, unit);
  ;
  ;
}


x86 assembly (clang, -O0):
<logMessage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x80,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x80(%rbp),%rdi
mov    -0x10(%rbp),%rdx
lea    0xeba(%rip),%rsi
mov    $0x0,%al
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
lea    -0x80(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <logMessage@plt>
add    $0x80,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<logMessage>:
push   %r15
push   %r14
push   %rbx
sub    $0x70,%rsp
mov    %rdx,%r14
mov    %rsi,%rdx
mov    %rdi,%rbx
lea    0xec7(%rip),%rsi
mov    %rsp,%r15
mov    %r15,%rdi
xor    %eax,%eax
call   1040 <sprintf@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
call   1030 <logMessage@plt>
add    $0x70,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lu\00"
define void @logMessage(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
%7 = alloca [100 x i8]
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
%8 = getelementptr inbounds [100 x i8], [100 x i8]* %7, i64 0, i64 0
%9 = load i64, i64* %5
%10 = call i32 (i8*, i8*, ...) @sprintf(i8* %8, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %9)
%11 = load i8*, i8** %4
%12 = getelementptr inbounds [100 x i8], [100 x i8]* %7, i64 0, i64 0
%13 = ptrtoint i8* %12 to i64
%14 = load i8*, i8** %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lu\00"
define void @logMessage(i8* nocapture readnone %0, i64 %1, i8* nocapture readnone %2) {
%4 = alloca [100 x i8]
%5 = getelementptr inbounds [100 x i8], [100 x i8]* %4, i64 0, i64 0
%6 = call i32 (i8*, i8*, ...) @sprintf(i8* %5, i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %1)
%7 = ptrtoint [100 x i8]* %4 to i64
ret void
}
void sei() {}


x86 assembly (clang, -O0):
<sei>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sei>:
ret

LLVM IR (-O0):
define void @sei() {
ret void
}

LLVM IR (-O2):
define void @sei() {
ret void
}
void loop(int a, int b) {
  if (a > b) {
    b = b + a;
    a = a + 1;
    loop(a, b);
  }
}


x86 assembly (clang, -O0):
<loop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jle    1147 <loop+0x37>
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <loop@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop>:
cmp    %esi,%edi
jle    111c <loop+0x1c>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    (%rsi,%rdi,1),%eax
add    $0x1,%edi
test   %esi,%esi
mov    %eax,%esi
jle    1110 <loop+0x10>
ret

LLVM IR (-O0):
define void @loop(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp sgt i32 %5, %6
br i1 %7, label %8, label %16
8: ; preds = %2
%9 = load i32, i32* %4
%10 = load i32, i32* %3
%11 = add nsw i32 %9, %10
store i32 %11, i32* %4
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
%14 = load i32, i32* %3
%15 = load i32, i32* %4
br label %16
16: ; preds = %8, %2
ret void
}

LLVM IR (-O2):
define void @loop(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
br i1 %3, label %4, label %10
4: ; preds = %2, %4
%5 = phi i32 [ %7, %4 ], [ %1, %2 ]
%6 = phi i32 [ %8, %4 ], [ %0, %2 ]
%7 = add nsw i32 %5, %6
%8 = add nsw i32 %6, 1
%9 = icmp slt i32 %5, 1
br i1 %9, label %4, label %10
10: ; preds = %4, %2
ret void
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
uint8_t OSA_MULx(uint8_t V, uint8_t c) {
  if (V & 0x80)
    return ((V << 1) ^ c);
  else
    return (V << 1);
}


x86 assembly (clang, -O0):
<OSA_MULx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     112c <OSA_MULx+0x2c>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
xor    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1135 <OSA_MULx+0x35>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<OSA_MULx>:
movsbl %dil,%eax
sar    $0x7,%eax
lea    (%rdi,%rdi,1),%ecx
and    %esi,%eax
xor    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @OSA_MULx(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = and i32 %6, 128
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i32, i32* %4
%11 = shl i32 %10, 1
%12 = load i32, i32* %5
%13 = xor i32 %11, %12
store i32 %13, i32* %3
br label %17
14: ; preds = %2
%15 = load i32, i32* %4
%16 = shl i32 %15, 1
store i32 %16, i32* %3
br label %17
17: ; preds = %14, %9
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @OSA_MULx(i32 %0, i32 %1) {
%3 = and i32 %0, 128
%4 = icmp eq i32 %3, 0
%5 = shl i32 %0, 1
%6 = select i1 %4, i32 0, i32 %1
%7 = xor i32 %6, %5
ret i32 %7
}
int foo(int x, int y) {
  if (y)
    goto lab;
  if (x)
    y = 0;
  if (y)
    goto lab;
  y = 0;
lab:
  return y;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1119 <foo+0x19>
jmp    1140 <foo+0x40>
cmpl   $0x0,-0x4(%rbp)
je     112a <foo+0x2a>
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     1139 <foo+0x39>
jmp    1140 <foo+0x40>
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %2
br label %17
8: ; preds = %2
%9 = load i32, i32* %3
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %8
store i32 0, i32* %4
br label %12
12: ; preds = %11, %8
%13 = load i32, i32* %4
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %12
br label %17
16: ; preds = %12
store i32 0, i32* %4
br label %17
17: ; preds = %16, %15, %7
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @foo(i32 %0, i32 %1) {
ret i32 %1
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ strcpy(char *, char *);
void handleQuota(char *accountNo) {
  char buff[16];
  strcpy(buff, accountNo);
  int acNo = atoi(buff);
  printf("Looking up account details for %d...\n", acNo);
}


x86 assembly (clang, -O0):
<handleQuota>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x20(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <strcpy@plt>
lea    -0x20(%rbp),%rdi
call   1050 <atoi@plt>
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%esi
lea    0xea1(%rip),%rdi
call   1040 <printf@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<handleQuota>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1030 <strcpy@plt>
mov    %rbx,%rdi
call   1050 <atoi@plt>
lea    0xeae(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [38 x i8] c"Looking up account details for %d...\0A\00"
define void @handleQuota(i8* %0) {
%2 = alloca i8*
%3 = alloca [16 x i8]
%4 = alloca i32
store i8* %0, i8** %2
%5 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%6 = load i8*, i8** %2
%7 = call i32 @strcpy(i8* %5, i8* %6)
%8 = getelementptr inbounds [16 x i8], [16 x i8]* %3, i64 0, i64 0
%9 = call i32 @atoi(i8* %8)
store i32 %9, i32* %4
%10 = load i32, i32* %4
%11 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 %10)
ret void
}

LLVM IR (-O2):
@.str = [38 x i8] c"Looking up account details for %d...\0A\00"
define void @handleQuota(i8* %0) {
%2 = alloca [16 x i8]
%3 = getelementptr inbounds [16 x i8], [16 x i8]* %2, i64 0, i64 0
%4 = call i32 @strcpy(i8* %3, i8* %0)
%5 = call i32 @atoi(i8* %3)
%6 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void fel_abort(char str[]) {
  printf("%s\n", str);
  exit(1);
}


x86 assembly (clang, -O0):
<fel_abort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<fel_abort>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @fel_abort(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @fel_abort(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void MSG_HTML_Footer(void) { printf("\n</BODY></HTML>\n"); }


x86 assembly (clang, -O0):
<MSG_HTML_Footer>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MSG_HTML_Footer>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"\0A</BODY></HTML>\0A\00"
define void @MSG_HTML_Footer() {
%1 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [16 x i8] c"\0A</BODY></HTML>\00"
define void @MSG_HTML_Footer() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
ret void
}
int grfmem(size, pointer)
int *size;
char **pointer;
{
  free(*pointer);
  return 1;
}


x86 assembly (clang, -O0):
<grfmem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grfmem>:
push   %rax
mov    (%rsi),%rdi
call   1030 <free@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @grfmem(i32* %0, i8** %1) {
%3 = alloca i32*
%4 = alloca i8**
store i32* %0, i32** %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %4
%6 = load i8*, i8** %5
ret i32 1
}

LLVM IR (-O2):
define i32 @grfmem(i32* nocapture readnone %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
tail call void @free(i8* %3)
ret i32 1
}
/* Variables and functions */
void mic_push(double *data, size_t nelem, int device, int offload) {
#pragma offload_transfer target(mic                                            \
                                : device)                                      \
    in(data                                                                    \
       : length(nelem) alloc_if(0) free_if(0)) if (offload)
}


x86 assembly (clang, -O0):
<mic_push>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mic_push>:
ret

LLVM IR (-O0):
define void @mic_push(double* %0, i64 %1, i32 %2, i32 %3) {
%5 = alloca double*
%6 = alloca i64
%7 = alloca i32
%8 = alloca i32
store double* %0, double** %5
store i64 %1, i64* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
ret void
}

LLVM IR (-O2):
define void @mic_push(double* nocapture %0, i64 %1, i32 %2, i32 %3) {
ret void
}
/* Type definitions */
struct vec2 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vec2_divide(float *, float *, float *);
__attribute__((always_)) struct vec2 *
psvec2_divide(struct vec2 *result, struct vec2 *a, struct vec2 *b) {
  vec2_divide((float *)result, (float *)a, (float *)b);
  return result;
}


x86 assembly (clang, -O0):
<psvec2_divide>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <vec2_divide@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec2_divide>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec2_divide@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec2 = type { i32 }
define %struct.vec2* @psvec2_divide(%struct.vec2* %0, %struct.vec2* %1, %struct.vec2* %2) {
%4 = alloca %struct.vec2*
%5 = alloca %struct.vec2*
%6 = alloca %struct.vec2*
store %struct.vec2* %0, %struct.vec2** %4
store %struct.vec2* %1, %struct.vec2** %5
store %struct.vec2* %2, %struct.vec2** %6
%7 = load %struct.vec2*, %struct.vec2** %4
%8 = bitcast %struct.vec2* %7 to float*
%9 = load %struct.vec2*, %struct.vec2** %5
%10 = bitcast %struct.vec2* %9 to float*
%11 = load %struct.vec2*, %struct.vec2** %6
%12 = bitcast %struct.vec2* %11 to float*
%13 = call i32 @vec2_divide(float* %8, float* %10, float* %12)
%14 = load %struct.vec2*, %struct.vec2** %4
ret %struct.vec2* %14
}

LLVM IR (-O2):
%struct.vec2 = type { i32 }
define %struct.vec2* @psvec2_divide(%struct.vec2* returned %0, %struct.vec2* %1, %struct.vec2* %2) {
%4 = bitcast %struct.vec2* %0 to float*
%5 = bitcast %struct.vec2* %1 to float*
%6 = bitcast %struct.vec2* %2 to float*
%7 = tail call i32 @vec2_divide(float* %4, float* %5, float* %6)
ret %struct.vec2* %0
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void Swig_free(void *p) { free(p); }


x86 assembly (clang, -O0):
<Swig_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Swig_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @Swig_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @Swig_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ACCESSPERMS;
int mkdir(char const *, int /*<<< orphan*/);
int ol_c_mkdir(const char *dirname) {
  int err;
  err = mkdir(dirname, ACCESSPERMS);
  return err;
}


x86 assembly (clang, -O0):
<ol_c_mkdir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2ec1(%rip),%rax
mov    (%rax),%esi
call   1030 <mkdir@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ol_c_mkdir>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%esi
jmp    1030 <mkdir@plt>

LLVM IR (-O0):
@ACCESSPERMS = global i32 0
define i32 @ol_c_mkdir(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i32, i32* @ACCESSPERMS
%6 = call i32 @mkdir(i8* %4, i32 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
@ACCESSPERMS = global i32 0
define i32 @ol_c_mkdir(i8* nocapture %0) {
%2 = load i32, i32* @ACCESSPERMS
%3 = tail call i32 @mkdir(i8* %0, i32 %2)
ret i32 %3
}
void glDeleteBuffers(void) { return; }


x86 assembly (clang, -O0):
<glDeleteBuffers>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glDeleteBuffers>:
ret

LLVM IR (-O0):
define void @glDeleteBuffers() {
ret void
}

LLVM IR (-O2):
define void @glDeleteBuffers() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __stack_chk_fail();
void __attribute__((visibility("hidden"))) __stack_chk_fail_local(void) {
  __stack_chk_fail();
}


x86 assembly (clang, -O0):
<__stack_chk_fail_local>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <__stack_chk_fail@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<__stack_chk_fail_local>:
xor    %eax,%eax
jmp    1030 <__stack_chk_fail@plt>

LLVM IR (-O0):
define hidden void @__stack_chk_fail_local() {
%1 = call i32 (...) @__stack_chk_fail()
ret void
}

LLVM IR (-O2):
define hidden void @__stack_chk_fail_local() {
%1 = tail call i32 (...) @__stack_chk_fail()
ret void
}
/* Type definitions */
struct ln_hms {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ln_deg_to_hms(double, struct ln_hms *);
double ln_rad_to_deg(double);
double ln_range_radians(double);
void ln_rad_to_hms(double radians, struct ln_hms *hms) {
  double degrees;
  radians = ln_range_radians(radians);
  degrees = ln_rad_to_deg(radians);
  ln_deg_to_hms(degrees, hms);
}


x86 assembly (clang, -O0):
<ln_rad_to_hms>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1050 <ln_range_radians@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <ln_rad_to_deg@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
mov    -0x10(%rbp),%rdi
call   1030 <ln_deg_to_hms@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ln_rad_to_hms>:
push   %rbx
mov    %rdi,%rbx
call   1050 <ln_range_radians@plt>
call   1040 <ln_rad_to_deg@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <ln_deg_to_hms@plt>

LLVM IR (-O0):
%struct.ln_hms = type { i32 }
define void @ln_rad_to_hms(double %0, %struct.ln_hms* %1) {
%3 = alloca double
%4 = alloca %struct.ln_hms*
%5 = alloca double
store double %0, double* %3
store %struct.ln_hms* %1, %struct.ln_hms** %4
%6 = load double, double* %3
%7 = call double @ln_range_radians(double %6)
store double %7, double* %3
%8 = load double, double* %3
%9 = call double @ln_rad_to_deg(double %8)
store double %9, double* %5
%10 = load double, double* %5
%11 = load %struct.ln_hms*, %struct.ln_hms** %4
%12 = call i32 @ln_deg_to_hms(double %10, %struct.ln_hms* %11)
ret void
}

LLVM IR (-O2):
%struct.ln_hms = type { i32 }
define void @ln_rad_to_hms(double %0, %struct.ln_hms* %1) {
%3 = tail call double @ln_range_radians(double %0)
%4 = tail call double @ln_rad_to_deg(double %3)
%5 = tail call i32 @ln_deg_to_hms(double %4, %struct.ln_hms* %1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ RSA;
typedef int /*<<< orphan*/ BIO;

/* Variables and functions */
int ASN1_item_i2d_bio(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                      int /*<<< orphan*/ *);
int /*<<< orphan*/ RSAPrivateKey_it;
int i2d_RSAPrivateKey_bio(BIO *bp, RSA *rsa) {
  return ASN1_item_i2d_bio(&RSAPrivateKey_it, bp, rsa);
}


x86 assembly (clang, -O0):
<i2d_RSAPrivateKey_bio>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    0x2eb1(%rip),%rdi
call   1030 <ASN1_item_i2d_bio@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2d_RSAPrivateKey_bio>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    0x2ec3(%rip),%rdi
jmp    1030 <ASN1_item_i2d_bio@plt>

LLVM IR (-O0):
@RSAPrivateKey_it = global i32 0
define i32 @i2d_RSAPrivateKey_bio(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = load i32*, i32** %4
%7 = call i32 @ASN1_item_i2d_bio(i32* @RSAPrivateKey_it, i32* %5, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
@RSAPrivateKey_it = global i32 0
define i32 @i2d_RSAPrivateKey_bio(i32* %0, i32* %1) {
%3 = tail call i32 @ASN1_item_i2d_bio(i32* @RSAPrivateKey_it, i32* %0, i32* %1)
ret i32 %3
}
/* Variables and functions */
char const *strong_n3();
const char *__attribute__((section(".test.c"))) sibcall_strong_n3(void) {
  return strong_n3();
}


x86 assembly (clang, -O0):
<sibcall_strong_n3>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <strong_n3@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sibcall_strong_n3>:
xor    %eax,%eax
jmp    1030 <strong_n3@plt>

LLVM IR (-O0):
define i8* @sibcall_strong_n3() section ".test.c" {
%1 = call i8* (...) @strong_n3()
ret i8* %1
}

LLVM IR (-O2):
define i8* @sibcall_strong_n3() section ".test.c" {
%1 = tail call i8* (...) @strong_n3()
ret i8* %1
}
float convert(float f) {
  float cel;
  cel = (5.0 / 9.0) * (f - 32.0);
  return cel;
}


x86 assembly (clang, -O0):
<convert>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
cvtss2sd %xmm0,%xmm1
movsd  0xeee(%rip),%xmm0
subsd  %xmm0,%xmm1
movsd  0xeda(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<convert>:
cvtss2sd %xmm0,%xmm0
addsd  0xef4(%rip),%xmm0
mulsd  0xef4(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @convert(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = fpext float %4 to double
%6 = fsub double %5, 3.200000e+01
%7 = fmul double 0x3FE1C71C71C71C72, %6
%8 = fptrunc double %7 to float
store float %8, float* %3
%9 = load float, float* %3
ret float %9
}

LLVM IR (-O2):
define float @convert(float %0) {
%2 = fpext float %0 to double
%3 = fadd double %2, -3.200000e+01
%4 = fmul double %3, 0x3FE1C71C71C71C72
%5 = fptrunc double %4 to float
ret float %5
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ err(int, int /*<<< orphan*/);
size_t fwrite(void *, int, size_t, int /*<<< orphan*/ *);
void xwrite(FILE *f, void *p, size_t size) {
  if (fwrite(p, 1, size, f) != size)
    err(1, 0);
}


x86 assembly (clang, -O0):
<xwrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x8(%rbp),%rcx
mov    $0x1,%esi
call   1040 <fwrite@plt>
cmp    -0x18(%rbp),%rax
je     1160 <xwrite+0x40>
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <err@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xwrite>:
push   %rbx
mov    %rdx,%rbx
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x1,%esi
call   1040 <fwrite@plt>
cmp    %rbx,%rax
jne    113b <xwrite+0x1b>
pop    %rbx
ret
mov    $0x1,%edi
xor    %esi,%esi
pop    %rbx
jmp    1030 <err@plt>

LLVM IR (-O0):
define void @xwrite(i32* %0, i8* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i64
store i32* %0, i32** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i64, i64* %6
%9 = load i32*, i32** %4
%10 = call i64 @fwrite(i8* %7, i32 1, i64 %8, i32* %9)
%11 = load i64, i64* %6
%12 = icmp ne i64 %10, %11
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = call i32 @err(i32 1, i32 0)
br label %15
15: ; preds = %13, %3
ret void
}

LLVM IR (-O2):
define void @xwrite(i32* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = tail call i64 @fwrite(i8* %1, i32 1, i64 %2, i32* %0)
%5 = icmp eq i64 %4, %2
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @err(i32 1, i32 0)
br label %8
8: ; preds = %6, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGALRM;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ timeout();
void alarm_handler(int sig) {
  signal(SIGALRM, SIG_IGN);
  timeout();
}


x86 assembly (clang, -O0):
<alarm_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    0x2ea5(%rip),%rax
mov    (%rax),%esi
call   1040 <signal@plt>
mov    $0x0,%al
call   1030 <timeout@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alarm_handler>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
mov    0x2eaf(%rip),%rax
mov    (%rax),%esi
call   1040 <signal@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <timeout@plt>

LLVM IR (-O0):
@SIGALRM = global i32 0
@SIG_IGN = global i32 0
define void @alarm_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @SIGALRM
%4 = load i32, i32* @SIG_IGN
%5 = call i32 @signal(i32 %3, i32 %4)
%6 = call i32 (...) @timeout()
ret void
}

LLVM IR (-O2):
@SIGALRM = global i32 0
@SIG_IGN = global i32 0
define void @alarm_handler(i32 %0) {
%2 = load i32, i32* @SIGALRM
%3 = load i32, i32* @SIG_IGN
%4 = tail call i32 @signal(i32 %2, i32 %3)
%5 = tail call i32 (...) @timeout()
ret void
}