float ntc10_20(int adc) {
  float t, res;
  t = adc;
  res = 8.195548e+01 - 2.523585e-01 * t;
  t *= adc;
  res += 3.121114e-04 * t;
  t *= adc;
  res += -1.842112e-07 * t;
  return res;
}


x86 assembly (clang, -O0):
<ntc10_20>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movsd  0xeee(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeea(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0xc(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
movsd  0xea4(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
movss  -0xc(%rbp),%xmm1
cvtss2sd %xmm1,%xmm1
movsd  0xe62(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ntc10_20>:
cvtsi2ss %edi,%xmm0
cvtss2sd %xmm0,%xmm1
mulsd  0xef0(%rip),%xmm1
addsd  0xef0(%rip),%xmm1
cvtsd2ss %xmm1,%xmm1
movaps %xmm0,%xmm2
mulss  %xmm0,%xmm2
cvtss2sd %xmm2,%xmm3
mulsd  0xee1(%rip),%xmm3
cvtss2sd %xmm1,%xmm1
addsd  %xmm1,%xmm3
xorps  %xmm1,%xmm1
cvtsd2ss %xmm3,%xmm1
mulss  %xmm0,%xmm2
xorps  %xmm0,%xmm0
cvtss2sd %xmm2,%xmm0
mulsd  0xec7(%rip),%xmm0
cvtss2sd %xmm1,%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @ntc10_20(i32 %0) {
%2 = alloca i32
%3 = alloca float
%4 = alloca float
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = sitofp i32 %5 to float
store float %6, float* %3
%7 = load float, float* %3
%8 = fpext float %7 to double
%9 = call double @llvm.fmuladd.f64(double 0xBFD026A444178705, double %8, double 0x40547D269595FEDA)
%10 = fptrunc double %9 to float
store float %10, float* %4
%11 = load i32, i32* %2
%12 = sitofp i32 %11 to float
%13 = load float, float* %3
%14 = fmul float %13, %12
store float %14, float* %3
%15 = load float, float* %3
%16 = fpext float %15 to double
%17 = load float, float* %4
%18 = fpext float %17 to double
%19 = call double @llvm.fmuladd.f64(double 0x3F34745C41762157, double %16, double %18)
%20 = fptrunc double %19 to float
store float %20, float* %4
%21 = load i32, i32* %2
%22 = sitofp i32 %21 to float
%23 = load float, float* %3
%24 = fmul float %23, %22
store float %24, float* %3
%25 = load float, float* %3
%26 = fpext float %25 to double
%27 = load float, float* %4
%28 = fpext float %27 to double
%29 = call double @llvm.fmuladd.f64(double 0xBE88B972D9D6B766, double %26, double %28)
%30 = fptrunc double %29 to float
store float %30, float* %4
%31 = load float, float* %4
ret float %31
}

LLVM IR (-O2):
define float @ntc10_20(i32 %0) {
%2 = sitofp i32 %0 to float
%3 = fpext float %2 to double
%4 = tail call double @llvm.fmuladd.f64(double %3, double 0xBFD026A444178705, double 0x40547D269595FEDA)
%5 = fptrunc double %4 to float
%6 = fmul float %2, %2
%7 = fpext float %6 to double
%8 = fpext float %5 to double
%9 = tail call double @llvm.fmuladd.f64(double %7, double 0x3F34745C41762157, double %8)
%10 = fptrunc double %9 to float
%11 = fmul float %6, %2
%12 = fpext float %11 to double
%13 = fpext float %10 to double
%14 = tail call double @llvm.fmuladd.f64(double %12, double 0xBE88B972D9D6B766, double %13)
%15 = fptrunc double %14 to float
ret float %15
}