xunge/DecIR huggingface dataset:
/* Variables and functions */
int funcGetTimeUTC();
int funcGetTimeSlotStart(const int *piSecsRotate) {
  int iTimeUTC = funcGetTimeUTC();
  return (iTimeUTC / *piSecsRotate);
}


x86 assembly (clang, -O0):
<funcGetTimeSlotStart>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <funcGetTimeUTC@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
cltd
idivl  (%rcx)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcGetTimeSlotStart>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <funcGetTimeUTC@plt>
cltd
idivl  (%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define i32 @funcGetTimeSlotStart(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = call i32 (...) @funcGetTimeUTC()
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
%8 = sdiv i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @funcGetTimeSlotStart(i32* nocapture %0) {
%2 = tail call i32 (...) @funcGetTimeUTC()
%3 = load i32, i32* %0
%4 = sdiv i32 %2, %3
ret i32 %4
}
/* Type definitions */
struct section_list {
  int dummy;
};
struct section {
  int dummy;
};
struct genlist {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ genlist_insert(struct genlist *, struct section *, int);
void section_list_insert(struct section_list *tthis, struct section *pfoo,
                         int idx) {
  genlist_insert((struct genlist *)tthis, pfoo, idx);
}


x86 assembly (clang, -O0):
<section_list_insert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <genlist_insert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<section_list_insert>:
jmp    1030 <genlist_insert@plt>

LLVM IR (-O0):
%struct.section_list = type { i32 }
%struct.section = type { i32 }
%struct.genlist = type { i32 }
define void @section_list_insert(%struct.section_list* %0, %struct.section* %1, i32 %2) {
%4 = alloca %struct.section_list*
%5 = alloca %struct.section*
%6 = alloca i32
store %struct.section_list* %0, %struct.section_list** %4
store %struct.section* %1, %struct.section** %5
store i32 %2, i32* %6
%7 = load %struct.section_list*, %struct.section_list** %4
%8 = bitcast %struct.section_list* %7 to %struct.genlist*
%9 = load %struct.section*, %struct.section** %5
%10 = load i32, i32* %6
%11 = call i32 @genlist_insert(%struct.genlist* %8, %struct.section* %9, i32 %10)
ret void
}

LLVM IR (-O2):
%struct.section_list = type { i32 }
%struct.section = type { i32 }
%struct.genlist = type { i32 }
define void @section_list_insert(%struct.section_list* %0, %struct.section* %1, i32 %2) {
%4 = bitcast %struct.section_list* %0 to %struct.genlist*
%5 = tail call i32 @genlist_insert(%struct.genlist* %4, %struct.section* %1, i32 %2)
ret void
}
float Sleef_acosf_u10(float x) { return __builtin_acosf(x); }


x86 assembly (clang, -O0):
<Sleef_acosf_u10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <acosf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleef_acosf_u10>:
jmp    1030 <acosf@plt>

LLVM IR (-O0):
define float @Sleef_acosf_u10(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @acosf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @Sleef_acosf_u10(float %0) {
%2 = tail call float @acosf(float %0)
ret float %2
}
void fa147(void) {
P0A:
  goto P0A;
  ({
    P01A:
      goto P01A;
      ({
        P012A:
          goto P012A;
          0;
      });
    P01B:
      goto P01B;
      ({
        P013A:
          goto P013A;
          0;
      });
    P01C:
      goto P01C;
      0;
  });
P0B:
  goto P0B;
  ({
    a:
      ({
        P024A:
          goto P024A;
          0;
      });
    P02B:
      goto P02B;
      ({
        p025A:
          goto p025A;
          goto a;
        P025A:
          goto P025A;
          0;
      });
    P02C:
      goto P02C;
      0;
  });
P0C:
  goto P0C;
  0;
P0D:
  goto P0D;
}


x86 assembly (clang, -O0):
<fa147>:
push   %rbp
mov    %rsp,%rbp
jmp    1104 <fa147+0x4>

x86 assembly (clang, -O2):
<fa147>:
jmp    1100 <fa147>

LLVM IR (-O0):
define void @fa147() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
br label %7
7: ; preds = %7, %0
br label %7
8: ; No predecessors!
br label %9
9: ; preds = %9, %8
br label %9
10: ; No predecessors!
br label %11
11: ; preds = %11, %10
br label %11
12: ; preds = %12
br label %12
13: ; No predecessors!
br label %14
14: ; preds = %14, %13
br label %14
15: ; preds = %15
br label %15
16: ; preds = %16
br label %16
17: ; No predecessors!
br label %18
18: ; preds = %17
br label %19
19: ; preds = %19, %18
br label %19
20: ; preds = %20
br label %20
21: ; No predecessors!
br label %22
22: ; preds = %22, %21
br label %22
23: ; preds = %23
br label %23
24: ; preds = %24
br label %24
25: ; preds = %25
br label %25
26: ; preds = %26
br label %26
}

LLVM IR (-O2):
define void @fa147() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ glm_clamp_zo(float);
float glm_lerp(float, float, int /*<<< orphan*/);
__attribute((always_)) float glm_lerpc(float from, float to, float t) {
  return glm_lerp(from, to, glm_clamp_zo(t));
}


x86 assembly (clang, -O0):
<glm_lerpc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
call   1040 <glm_clamp_zo@plt>
movss  -0x14(%rbp),%xmm0
movss  -0x10(%rbp),%xmm1
mov    %eax,%edi
call   1030 <glm_lerp@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glm_lerpc>:
push   %rax
movss  %xmm1,0x4(%rsp)
movss  %xmm0,(%rsp)
movaps %xmm2,%xmm0
call   1040 <glm_clamp_zo@plt>
movss  (%rsp),%xmm0
movss  0x4(%rsp),%xmm1
mov    %eax,%edi
pop    %rax
jmp    1030 <glm_lerp@plt>

LLVM IR (-O0):
define float @glm_lerpc(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = load float, float* %6
%10 = call i32 @glm_clamp_zo(float %9)
%11 = call float @glm_lerp(float %7, float %8, i32 %10)
ret float %11
}

LLVM IR (-O2):
define float @glm_lerpc(float %0, float %1, float %2) {
%4 = tail call i32 @glm_clamp_zo(float %2)
%5 = tail call float @glm_lerp(float %0, float %1, i32 %4)
ret float %5
}
/* Type definitions */
struct device {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ show_bases(struct device *, int);
int /*<<< orphan*/ show_caps(struct device *);
int /*<<< orphan*/ show_rom(struct device *);
void show_htype0(struct device *d) {
  show_bases(d, 6);
  show_rom(d);
  show_caps(d);
}


x86 assembly (clang, -O0):
<show_htype0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x6,%esi
call   1040 <show_bases@plt>
mov    -0x8(%rbp),%rdi
call   1050 <show_rom@plt>
mov    -0x8(%rbp),%rdi
call   1030 <show_caps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_htype0>:
push   %rbx
mov    %rdi,%rbx
mov    $0x6,%esi
call   1040 <show_bases@plt>
mov    %rbx,%rdi
call   1050 <show_rom@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <show_caps@plt>

LLVM IR (-O0):
%struct.device = type { i32 }
define void @show_htype0(%struct.device* %0) {
%2 = alloca %struct.device*
store %struct.device* %0, %struct.device** %2
%3 = load %struct.device*, %struct.device** %2
%4 = call i32 @show_bases(%struct.device* %3, i32 6)
%5 = load %struct.device*, %struct.device** %2
%6 = call i32 @show_rom(%struct.device* %5)
%7 = load %struct.device*, %struct.device** %2
%8 = call i32 @show_caps(%struct.device* %7)
ret void
}

LLVM IR (-O2):
%struct.device = type { i32 }
define void @show_htype0(%struct.device* %0) {
%2 = tail call i32 @show_bases(%struct.device* %0, i32 6)
%3 = tail call i32 @show_rom(%struct.device* %0)
%4 = tail call i32 @show_caps(%struct.device* %0)
ret void
}
/* Type definitions */
struct Var {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pA(char *, char const *, char const *, char const *);
void __func_sub_sint(struct Var *avar, const char *areg, const char *lreg,
                     const char *rreg) {
  pA("%s = %s - %s;", areg, lreg, rreg);
}


x86 assembly (clang, -O0):
<__func_sub_sint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
lea    0xec5(%rip),%rdi
call   1030 <pA@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__func_sub_sint>:
lea    0xee9(%rip),%rdi
jmp    1030 <pA@plt>

LLVM IR (-O0):
%struct.Var = type { i32 }
@.str = [14 x i8] c"%s = %s - %s;\00"
define void @__func_sub_sint(%struct.Var* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca %struct.Var*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store %struct.Var* %0, %struct.Var** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %6
%10 = load i8*, i8** %7
%11 = load i8*, i8** %8
%12 = call i32 @pA(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %9, i8* %10, i8* %11)
ret void
}

LLVM IR (-O2):
%struct.Var = type { i32 }
@.str = [14 x i8] c"%s = %s - %s;\00"
define void @__func_sub_sint(%struct.Var* nocapture readnone %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call i32 @pA(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %1, i8* %2, i8* %3)
ret void
}
int f(int n) {
  int i;
  int sum = 0;
  if (n == 1) {
    return 1;
  }
  for (i = 1; i < n; i++) {
    sum += f(n - i);
  }
  sum++;
  return sum;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1138 <f+0x28>
movl   $0x1,-0x4(%rbp)
jmp    1179 <f+0x69>
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    116a <f+0x5a>
mov    -0x8(%rbp),%edi
sub    -0xc(%rbp),%edi
call   1030 <f@plt>
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    113f <f+0x2f>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebx
cmp    $0x2,%edi
jl     1141 <f+0x31>
mov    %edi,%ebp
add    $0xffffffff,%ebp
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %ebp,%edi
call   1030 <f@plt>
add    %eax,%ebx
add    $0xffffffff,%ebp
jne    1130 <f+0x20>
add    $0x1,%ebx
mov    %ebx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %5
%6 = load i32, i32* %3
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 1, i32* %2
br label %28
9: ; preds = %1
store i32 1, i32* %4
br label %10
10: ; preds = %21, %9
%11 = load i32, i32* %4
%12 = load i32, i32* %3
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %24
14: ; preds = %10
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = sub nsw i32 %15, %16
%18 = call i32 @f(i32 %17)
%19 = load i32, i32* %5
%20 = add nsw i32 %19, %18
store i32 %20, i32* %5
br label %21
21: ; preds = %14
%22 = load i32, i32* %4
%23 = add nsw i32 %22, 1
store i32 %23, i32* %4
br label %10
24: ; preds = %10
%25 = load i32, i32* %5
%26 = add nsw i32 %25, 1
store i32 %26, i32* %5
%27 = load i32, i32* %5
store i32 %27, i32* %2
br label %28
28: ; preds = %24, %8
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %13
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 1, %1 ]
%6 = sub nsw i32 %0, %5
%7 = tail call i32 @f(i32 %6)
%8 = add nsw i32 %7, %4
%9 = add nuw nsw i32 %5, 1
%10 = icmp eq i32 %9, %0
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %8, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
int doubleCmp(const void *va, const void *vb) {
  const double *a = va;
  const double *b = vb;
  double diff = *a - *b;
  if (diff < 0)
    return -1;
  else if (diff > 0)
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<doubleCmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x28(%rbp),%rax
subsd  (%rax),%xmm0
movsd  %xmm0,-0x30(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x30(%rbp),%xmm0
jbe    114b <doubleCmp+0x4b>
movl   $0xffffffff,-0x4(%rbp)
jmp    1170 <doubleCmp+0x70>
movsd  -0x30(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jbe    1169 <doubleCmp+0x69>
movl   $0x1,-0x4(%rbp)
jmp    1170 <doubleCmp+0x70>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<doubleCmp>:
movsd  (%rdi),%xmm0
subsd  (%rsi),%xmm0
xorpd  %xmm1,%xmm1
xor    %ecx,%ecx
ucomisd %xmm1,%xmm0
seta   %cl
ucomisd %xmm0,%xmm1
mov    $0xffffffff,%eax
cmovbe %ecx,%eax
ret

LLVM IR (-O0):
define i32 @doubleCmp(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca double*
%7 = alloca double*
%8 = alloca double
store i8* %0, i8** %4
store i8* %1, i8** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to double*
store double* %10, double** %6
%11 = load i8*, i8** %5
%12 = bitcast i8* %11 to double*
store double* %12, double** %7
%13 = load double*, double** %6
%14 = load double, double* %13
%15 = load double*, double** %7
%16 = load double, double* %15
%17 = fsub double %14, %16
store double %17, double* %8
%18 = load double, double* %8
%19 = fcmp olt double %18, 0.000000e+00
br i1 %19, label %20, label %21
20: ; preds = %2
store i32 -1, i32* %3
br label %26
21: ; preds = %2
%22 = load double, double* %8
%23 = fcmp ogt double %22, 0.000000e+00
br i1 %23, label %24, label %25
24: ; preds = %21
store i32 1, i32* %3
br label %26
25: ; preds = %21
store i32 0, i32* %3
br label %26
26: ; preds = %25, %24, %20
%27 = load i32, i32* %3
ret i32 %27
}

LLVM IR (-O2):
define i32 @doubleCmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to double*
%4 = bitcast i8* %1 to double*
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double %5, %6
%8 = fcmp olt double %7, 0.000000e+00
%9 = fcmp ogt double %7, 0.000000e+00
%10 = zext i1 %9 to i32
%11 = select i1 %8, i32 -1, i32 %10
ret i32 %11
}
int test_imm_E4int16_mem(short *val) {
  return ((*val) & (-0xE4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E4int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffff1c,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E4int16_mem>:
movzwl (%rdi),%eax
test   $0xff1c,%eax
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E4int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -228
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_E4int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, -228
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ g(int, int *);
void f(int a, int *b) {
  g(a, b);
  if (a > 0) {
    f(a - 1, b);
  }
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <g@plt>
cmpl   $0x0,-0x4(%rbp)
jle    1154 <f+0x34>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
mov    -0x10(%rbp),%rsi
call   1030 <f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %edi,%ebx
nopl   0x0(%rax)
mov    %ebx,%edi
mov    %r14,%rsi
call   1030 <g@plt>
lea    -0x1(%rbx),%eax
test   %ebx,%ebx
mov    %eax,%ebx
jg     1120 <f+0x10>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @f(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @g(i32 %5, i32* %6)
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %2
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = load i32*, i32** %4
br label %14
14: ; preds = %10, %2
ret void
}

LLVM IR (-O2):
define void @f(i32 %0, i32* %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %0, %2 ], [ %7, %3 ]
%5 = tail call i32 @g(i32 %4, i32* %1)
%6 = icmp sgt i32 %4, 0
%7 = add nsw i32 %4, -1
br i1 %6, label %3, label %8
8: ; preds = %3
ret void
}
/* Variables and functions */
scalar_t__ isupper(char);
void downcase(char *buf) {
  while (*buf) {
    if (isupper(*buf))
      *buf += 'a' - 'A';
    buf++;
  }
}


x86 assembly (clang, -O0):
<downcase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     115c <downcase+0x4c>
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
je     114b <downcase+0x3b>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
add    $0x20,%ecx
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <downcase+0xc>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<downcase>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     113e <downcase+0x2e>
mov    %rdi,%rbx
jmp    112c <downcase+0x1c>
nopl   0x0(%rax)
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
je     113e <downcase+0x2e>
movsbl %al,%edi
call   1030 <isupper@plt>
test   %rax,%rax
je     1120 <downcase+0x10>
addb   $0x20,(%rbx)
jmp    1120 <downcase+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @downcase(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %18, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %21
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = load i8, i8* %8
%10 = call i64 @isupper(i8 signext %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %7
%13 = load i8*, i8** %2
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = add nsw i32 %15, 32
%17 = trunc i32 %16 to i8
store i8 %17, i8* %13
br label %18
18: ; preds = %12, %7
%19 = load i8*, i8** %2
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %2
br label %3
21: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @downcase(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %16, label %4
4: ; preds = %1, %12
%5 = phi i8 [ %14, %12 ], [ %2, %1 ]
%6 = phi i8* [ %13, %12 ], [ %0, %1 ]
%7 = tail call i64 @isupper(i8 signext %5)
%8 = icmp eq i64 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %4
%10 = load i8, i8* %6
%11 = add i8 %10, 32
store i8 %11, i8* %6
br label %12
12: ; preds = %9, %4
%13 = getelementptr inbounds i8, i8* %6, i64 1
%14 = load i8, i8* %13
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %4
16: ; preds = %12, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void rws_free(void *mem) {
  if (mem)
    free(mem);
}


x86 assembly (clang, -O0):
<rws_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <rws_free+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rws_free>:
test   %rdi,%rdi
je     111a <rws_free+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @rws_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @rws_free(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_once_begin() {
  printf("NOT IMPLEMENTED:"
         "pa_once_begin"
         "\n");
}


x86 assembly (clang, -O0):
<pa_once_begin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_once_begin>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [31 x i8] c"NOT IMPLEMENTED:pa_once_begin\0A\00"
define i32 @pa_once_begin() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [30 x i8] c"NOT IMPLEMENTED:pa_once_begin\00"
define i32 @pa_once_begin() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([30 x i8], [30 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int lexgetc(char **exp) {
  char c = **exp;
  if (c)
    (*exp)++;
  return (c != 0 ? c : -1);
}


x86 assembly (clang, -O0):
<lexgetc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    (%rax),%al
mov    %al,-0x9(%rbp)
cmpb   $0x0,-0x9(%rbp)
je     112c <lexgetc+0x2c>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
add    $0x1,%rcx
mov    %rcx,(%rax)
movsbl -0x9(%rbp),%eax
cmp    $0x0,%eax
je     1145 <lexgetc+0x45>
movsbl -0x9(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1152 <lexgetc+0x52>
mov    $0xffffffff,%eax
mov    %eax,-0x10(%rbp)
jmp    1152 <lexgetc+0x52>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lexgetc>:
mov    (%rdi),%rcx
movsbl (%rcx),%eax
test   %eax,%eax
je     1112 <lexgetc+0x12>
add    $0x1,%rcx
mov    %rcx,(%rdi)
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @lexgetc(i8** %0) {
%2 = alloca i8**
%3 = alloca i8
store i8** %0, i8*** %2
%4 = load i8**, i8*** %2
%5 = load i8*, i8** %4
%6 = load i8, i8* %5
store i8 %6, i8* %3
%7 = load i8, i8* %3
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %1
%10 = load i8**, i8*** %2
%11 = load i8*, i8** %10
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %10
br label %13
13: ; preds = %9, %1
%14 = load i8, i8* %3
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %13
%18 = load i8, i8* %3
%19 = sext i8 %18 to i32
br label %21
20: ; preds = %13
br label %21
21: ; preds = %20, %17
%22 = phi i32 [ %19, %17 ], [ -1, %20 ]
ret i32 %22
}

LLVM IR (-O2):
define i32 @lexgetc(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = load i8, i8* %2
%4 = icmp eq i8 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, i8* %2, i64 1
store i8* %6, i8** %0
%7 = sext i8 %3 to i32
br label %8
8: ; preds = %5, %1
%9 = phi i32 [ %7, %5 ], [ -1, %1 ]
ret i32 %9
}
int *getPT(int *context) { return (int *)*(context + 7); }


x86 assembly (clang, -O0):
<getPT>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movslq 0x1c(%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getPT>:
movslq 0x1c(%rdi),%rax
ret

LLVM IR (-O0):
define i32* @getPT(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 7
%5 = load i32, i32* %4
%6 = sext i32 %5 to i64
%7 = inttoptr i64 %6 to i32*
ret i32* %7
}

LLVM IR (-O2):
define i32* @getPT(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 7
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}
void uw_copy_client_data(void *dst, void *src) {
  (void)dst;
  (void)src;
}


x86 assembly (clang, -O0):
<uw_copy_client_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<uw_copy_client_data>:
ret

LLVM IR (-O0):
define void @uw_copy_client_data(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
ret void
}

LLVM IR (-O2):
define void @uw_copy_client_data(i8* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
size_t HUF_compress_internal(void *, size_t, void const *, size_t, unsigned int,
                             unsigned int, int);
size_t HUF_compress1X(void *dst, size_t dstSize, const void *src,
                      size_t srcSize, unsigned maxSymbolValue,
                      unsigned huffLog) {
  return HUF_compress_internal(dst, dstSize, src, srcSize, maxSymbolValue,
                               huffLog, 1);
}


x86 assembly (clang, -O0):
<HUF_compress1X>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8d,-0x24(%rbp)
mov    %r9d,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    -0x24(%rbp),%r8d
mov    -0x28(%rbp),%r9d
movl   $0x1,(%rsp)
call   1030 <HUF_compress_internal@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HUF_compress1X>:
push   %rax
movl   $0x1,(%rsp)
call   1030 <HUF_compress_internal@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i64 @HUF_compress1X(i8* %0, i64 %1, i8* %2, i64 %3, i32 %4, i32 %5) {
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i8*
%10 = alloca i64
%11 = alloca i32
%12 = alloca i32
store i8* %0, i8** %7
store i64 %1, i64* %8
store i8* %2, i8** %9
store i64 %3, i64* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%13 = load i8*, i8** %7
%14 = load i64, i64* %8
%15 = load i8*, i8** %9
%16 = load i64, i64* %10
%17 = load i32, i32* %11
%18 = load i32, i32* %12
%19 = call i64 @HUF_compress_internal(i8* %13, i64 %14, i8* %15, i64 %16, i32 %17, i32 %18, i32 1)
ret i64 %19
}

LLVM IR (-O2):
define i64 @HUF_compress1X(i8* %0, i64 %1, i8* %2, i64 %3, i32 %4, i32 %5) {
%7 = tail call i64 @HUF_compress_internal(i8* %0, i64 %1, i8* %2, i64 %3, i32 %4, i32 %5, i32 1)
ret i64 %7
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ mkdirPath(char *);
char *rindex(char *, char);
FILE *fopenPath(char *path) {
  char *end = rindex(path, '/');
  if (end) {
    *end = '\0';
    mkdirPath(path);
    *end = '/';
  }
  return fopen(path, "w");
}


x86 assembly (clang, -O0):
<fopenPath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x2f,%esi
call   1040 <rindex@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1170 <fopenPath+0x40>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rdi
call   1050 <mkdirPath@plt>
mov    -0x10(%rbp),%rax
movb   $0x2f,(%rax)
mov    -0x8(%rbp),%rdi
lea    0xe85(%rip),%rsi
call   1030 <fopen@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fopenPath>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
mov    $0x2f,%esi
call   1040 <rindex@plt>
test   %rax,%rax
je     1157 <fopenPath+0x27>
mov    %rax,%rbx
movb   $0x0,(%rax)
mov    %r14,%rdi
call   1050 <mkdirPath@plt>
movb   $0x2f,(%rbx)
lea    0xea2(%rip),%rsi
mov    %r14,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <fopen@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"w\00"
define i32* @fopenPath(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @rindex(i8* %4, i8 signext 47)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %13
8: ; preds = %1
%9 = load i8*, i8** %3
store i8 0, i8* %9
%10 = load i8*, i8** %2
%11 = call i32 @mkdirPath(i8* %10)
%12 = load i8*, i8** %3
store i8 47, i8* %12
br label %13
13: ; preds = %8, %1
%14 = load i8*, i8** %2
%15 = call i32* @fopen(i8* %14, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32* %15
}

LLVM IR (-O2):
@.str = [2 x i8] c"w\00"
define noalias i32* @fopenPath(i8* %0) {
%2 = tail call i8* @rindex(i8* %0, i8 signext 47)
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
store i8 0, i8* %2
%5 = tail call i32 @mkdirPath(i8* %0)
store i8 47, i8* %2
br label %6
6: ; preds = %4, %1
%7 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret i32* %7
}
/* Type definitions */
typedef int /*<<< orphan*/ gid_t;

/* Variables and functions */
int setregid(int /*<<< orphan*/, int /*<<< orphan*/);
int setresgid(gid_t rgid, gid_t egid, gid_t sgid) {
  int rc;
  rc = setregid(sgid, egid);
  if (rc)
    return (rc);
  return (setregid(rgid, egid));
}


x86 assembly (clang, -O0):
<setresgid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x10(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <setregid@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1144 <setresgid+0x34>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1152 <setresgid+0x42>
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1030 <setregid@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setresgid>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edx,%edi
call   1030 <setregid@plt>
test   %eax,%eax
je     1129 <setresgid+0x19>
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret
mov    %ebp,%edi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <setregid@plt>

LLVM IR (-O0):
define i32 @setresgid(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = call i32 @setregid(i32 %9, i32 %10)
store i32 %11, i32* %8
%12 = load i32, i32* %8
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %3
%15 = load i32, i32* %8
store i32 %15, i32* %4
br label %20
16: ; preds = %3
%17 = load i32, i32* %5
%18 = load i32, i32* %6
%19 = call i32 @setregid(i32 %17, i32 %18)
store i32 %19, i32* %4
br label %20
20: ; preds = %16, %14
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @setresgid(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @setregid(i32 %2, i32 %1)
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @setregid(i32 %0, i32 %1)
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ %7, %6 ], [ %4, %3 ]
ret i32 %9
}
int left(int i) { return i << 1; }


x86 assembly (clang, -O0):
<left>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<left>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @left(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = shl i32 %3, 1
ret i32 %4
}

LLVM IR (-O2):
define i32 @left(i32 %0) {
%2 = shl i32 %0, 1
ret i32 %2
}
/* Type definitions */
struct addrinfo {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ freeaddrinfo(struct addrinfo *);
void free_rsolvhost(struct addrinfo *rp) { freeaddrinfo(rp); }


x86 assembly (clang, -O0):
<free_rsolvhost>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <freeaddrinfo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_rsolvhost>:
jmp    1030 <freeaddrinfo@plt>

LLVM IR (-O0):
%struct.addrinfo = type { i32 }
define void @free_rsolvhost(%struct.addrinfo* %0) {
%2 = alloca %struct.addrinfo*
store %struct.addrinfo* %0, %struct.addrinfo** %2
%3 = load %struct.addrinfo*, %struct.addrinfo** %2
%4 = call i32 @freeaddrinfo(%struct.addrinfo* %3)
ret void
}

LLVM IR (-O2):
%struct.addrinfo = type { i32 }
define void @free_rsolvhost(%struct.addrinfo* %0) {
%2 = tail call i32 @freeaddrinfo(%struct.addrinfo* %0)
ret void
}
/* Type definitions */
struct sched_attr {
  int dummy;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ SYS_sched_setattr;
int syscall(int /*<<< orphan*/, int /*<<< orphan*/, struct sched_attr const *,
            unsigned int);
int sched_setattr(pid_t pid, const struct sched_attr *attr,
                  unsigned int flags) {
  return syscall(SYS_sched_setattr, pid, attr, flags);
}


x86 assembly (clang, -O0):
<sched_setattr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    0x2ebf(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sched_setattr>:
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2eca(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.sched_attr = type { i32 }
@SYS_sched_setattr = global i32 0
define i32 @sched_setattr(i32 %0, %struct.sched_attr* %1, i32 %2) {
%4 = alloca i32
%5 = alloca %struct.sched_attr*
%6 = alloca i32
store i32 %0, i32* %4
store %struct.sched_attr* %1, %struct.sched_attr** %5
store i32 %2, i32* %6
%7 = load i32, i32* @SYS_sched_setattr
%8 = load i32, i32* %4
%9 = load %struct.sched_attr*, %struct.sched_attr** %5
%10 = load i32, i32* %6
%11 = call i32 @syscall(i32 %7, i32 %8, %struct.sched_attr* %9, i32 %10)
ret i32 %11
}

LLVM IR (-O2):
%struct.sched_attr = type { i32 }
@SYS_sched_setattr = global i32 0
define i32 @sched_setattr(i32 %0, %struct.sched_attr* %1, i32 %2) {
%4 = load i32, i32* @SYS_sched_setattr
%5 = tail call i32 @syscall(i32 %4, i32 %0, %struct.sched_attr* %1, i32 %2)
ret i32 %5
}
void highPass(struct mem *pmem, int cutoff) {}


x86 assembly (clang, -O0):
<highPass>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<highPass>:
ret

LLVM IR (-O0):
%struct.mem = type opaque
define void @highPass(%struct.mem* %0, i32 %1) {
%3 = alloca %struct.mem*
%4 = alloca i32
store %struct.mem* %0, %struct.mem** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.mem = type opaque
define void @highPass(%struct.mem* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
scalar_t__ strchr(char const *, char const);
char *strpbrk(const char *str1, const char *str2) {
  for (; *str1; str1++) {
    if (strchr(str2, *str1)) {
      return (char *)str1;
    }
  }
  return NULL;
}


x86 assembly (clang, -O0):
<strpbrk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     116a <strpbrk+0x5a>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rax
movsbl (%rax),%esi
call   1030 <strchr@plt>
cmp    $0x0,%rax
je     1154 <strpbrk+0x44>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1172 <strpbrk+0x62>
jmp    1159 <strpbrk+0x49>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1120 <strpbrk+0x10>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strpbrk>:
push   %r14
push   %rbx
push   %rax
mov    (%rdi),%al
test   %al,%al
je     113c <strpbrk+0x2c>
mov    %rsi,%r14
mov    %rdi,%rbx
movsbl %al,%esi
mov    %r14,%rdi
call   1030 <strchr@plt>
test   %rax,%rax
jne    113e <strpbrk+0x2e>
movzbl 0x1(%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <strpbrk+0x10>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @strpbrk(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
br label %6
6: ; preds = %19, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %22
10: ; preds = %6
%11 = load i8*, i8** %5
%12 = load i8*, i8** %4
%13 = load i8, i8* %12
%14 = call i64 @strchr(i8* %11, i8 signext %13)
%15 = icmp ne i64 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i8*, i8** %4
store i8* %17, i8** %3
br label %23
18: ; preds = %10
br label %19
19: ; preds = %18
%20 = load i8*, i8** %4
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %4
br label %6
22: ; preds = %6
store i8* null, i8** %3
br label %23
23: ; preds = %22, %16
%24 = load i8*, i8** %3
ret i8* %24
}

LLVM IR (-O2):
define i8* @strpbrk(i8* %0, i8* %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %2, %10
%6 = phi i8 [ %12, %10 ], [ %3, %2 ]
%7 = phi i8* [ %11, %10 ], [ %0, %2 ]
%8 = tail call i64 @strchr(i8* %1, i8 signext %6)
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %5
%11 = getelementptr inbounds i8, i8* %7, i64 1
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %5
14: ; preds = %5, %10, %2
%15 = phi i8* [ null, %2 ], [ null, %10 ], [ %7, %5 ]
ret i8* %15
}
void assignmemory(chararray, size, number) void **chararray;
int size, number;
{
  int i;
  for (i = 0; i < number; i++) {
    chararray[i] = calloc(1, size);
  }
}


x86 assembly (clang, -O0):
<assignmemory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1160 <assignmemory+0x50>
movslq -0xc(%rbp),%rsi
mov    $0x1,%edi
call   1030 <calloc@plt>
mov    %rax,%rdx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %rdx,(%rax,%rcx,8)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1129 <assignmemory+0x19>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assignmemory>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edx,%edx
jle    114a <assignmemory+0x3a>
mov    %rdi,%r14
movslq %esi,%r15
mov    %edx,%r12d
xor    %ebx,%ebx
nopw   0x0(%rax,%rax,1)
mov    $0x1,%edi
mov    %r15,%rsi
call   1030 <calloc@plt>
mov    %rax,(%r14,%rbx,8)
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <assignmemory+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @assignmemory(i8** %0, i32 %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8** %0, i8*** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
br label %8
8: ; preds = %20, %3
%9 = load i32, i32* %7
%10 = load i32, i32* %6
%11 = icmp slt i32 %9, %10
br i1 %11, label %12, label %23
12: ; preds = %8
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = call i8* @calloc(i64 1, i64 %14)
%16 = load i8**, i8*** %4
%17 = load i32, i32* %7
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8*, i8** %16, i64 %18
store i8* %15, i8** %19
br label %20
20: ; preds = %12
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
store i32 %22, i32* %7
br label %8
23: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @assignmemory(i8** nocapture writeonly %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %14
5: ; preds = %3
%6 = sext i32 %1 to i64
%7 = zext i32 %2 to i64
br label %8
8: ; preds = %5, %8
%9 = phi i64 [ 0, %5 ], [ %12, %8 ]
%10 = tail call i8* @calloc(i64 1, i64 %6)
%11 = getelementptr inbounds i8*, i8** %0, i64 %9
store i8* %10, i8** %11
%12 = add nuw nsw i64 %9, 1
%13 = icmp eq i64 %12, %7
br i1 %13, label %14, label %8
14: ; preds = %8, %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isascii(int);
void t_isascii_0x60() {
  Assert_real((isascii(96)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              485, ("isascii should be 1 for `"));
}


x86 assembly (clang, -O0):
<t_isascii_0x60>:
push   %rbp
mov    %rsp,%rbp
mov    $0x60,%edi
call   1030 <isascii@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x1e5,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0x60>:
lea    0xee9(%rip),%rsi
lea    0xf8a(%rip),%rcx
mov    $0x1,%edi
mov    $0x1e5,%edx
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for `\00"
define void @t_isascii_0x60() {
%1 = call i32 @isascii(i32 96)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 485, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [26 x i8] c"isascii should be 1 for `\00"
define void @t_isascii_0x60() {
%1 = tail call i32 @Assert_real(i32 1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 485, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
unsigned int f83(unsigned int x, int y __attribute__((unused))) {
  return (x << ((-1) & (8 * 4 - 1))) + (x >> 1);
}


x86 assembly (clang, -O0):
<f83>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1f,%eax
mov    -0x4(%rbp),%ecx
shr    $0x1,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f83>:
mov    %edi,%eax
ror    %eax
ret

LLVM IR (-O0):
define i32 @f83(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = shl i32 %5, 31
%7 = load i32, i32* %3
%8 = lshr i32 %7, 1
%9 = add i32 %6, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @f83(i32 %0, i32 %1) {
%3 = tail call i32 @llvm.fshl.i32(i32 %0, i32 %0, i32 31)
ret i32 %3
}
void i2c(int t, unsigned char temp[]) {
  temp[0] = t >> 8;
  temp[1] = t;
}


x86 assembly (clang, -O0):
<i2c>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    -0x4(%rbp),%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,0x1(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c>:
rol    $0x8,%di
mov    %di,(%rsi)
ret

LLVM IR (-O0):
define void @i2c(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = ashr i32 %5, 8
%7 = trunc i32 %6 to i8
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i64 0
store i8 %7, i8* %9
%10 = load i32, i32* %3
%11 = trunc i32 %10 to i8
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i64 1
store i8 %11, i8* %13
ret void
}

LLVM IR (-O2):
define void @i2c(i32 %0, i8* nocapture writeonly %1) {
%3 = lshr i32 %0, 8
%4 = trunc i32 %3 to i8
store i8 %4, i8* %1
%5 = trunc i32 %0 to i8
%6 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %5, i8* %6
ret void
}
/* Variables and functions */
double c_norm(double);
double dr_dtau(double);
double dv_dtau(double);
double lmd_p(double);
double val_h(double);
double val_r(double);
double dxi_dtau(double tau) {
  double r, h;
  r = val_r(tau);
  h = val_h(r);
  return c_norm(h) * (lmd_p(h) * dv_dtau(tau) + dr_dtau(tau));
}


x86 assembly (clang, -O0):
<dxi_dtau>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <val_r@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1070 <val_h@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1040 <c_norm@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
call   1060 <lmd_p@plt>
movsd  %xmm0,-0x30(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1080 <dv_dtau@plt>
movsd  %xmm0,-0x28(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1050 <dr_dtau@plt>
movsd  -0x30(%rbp),%xmm1
movsd  -0x28(%rbp),%xmm3
movaps %xmm0,%xmm2
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm3,%xmm1
addsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dxi_dtau>:
sub    $0x28,%rsp
movsd  %xmm0,0x10(%rsp)
call   1030 <val_r@plt>
call   1070 <val_h@plt>
movsd  %xmm0,0x8(%rsp)
call   1040 <c_norm@plt>
movsd  %xmm0,0x20(%rsp)
movsd  0x8(%rsp),%xmm0
call   1060 <lmd_p@plt>
movsd  %xmm0,0x8(%rsp)
movsd  0x10(%rsp),%xmm0
call   1080 <dv_dtau@plt>
movsd  %xmm0,0x18(%rsp)
movsd  0x10(%rsp),%xmm0
call   1050 <dr_dtau@plt>
movsd  0x18(%rsp),%xmm1
mulsd  0x8(%rsp),%xmm1
addsd  %xmm1,%xmm0
mulsd  0x20(%rsp),%xmm0
add    $0x28,%rsp
ret

LLVM IR (-O0):
define double @dxi_dtau(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = call double @val_r(double %5)
store double %6, double* %3
%7 = load double, double* %3
%8 = call double @val_h(double %7)
store double %8, double* %4
%9 = load double, double* %4
%10 = call double @c_norm(double %9)
%11 = load double, double* %4
%12 = call double @lmd_p(double %11)
%13 = load double, double* %2
%14 = call double @dv_dtau(double %13)
%15 = load double, double* %2
%16 = call double @dr_dtau(double %15)
%17 = call double @llvm.fmuladd.f64(double %12, double %14, double %16)
%18 = fmul double %10, %17
ret double %18
}

LLVM IR (-O2):
define double @dxi_dtau(double %0) {
%2 = tail call double @val_r(double %0)
%3 = tail call double @val_h(double %2)
%4 = tail call double @c_norm(double %3)
%5 = tail call double @lmd_p(double %3)
%6 = tail call double @dv_dtau(double %0)
%7 = tail call double @dr_dtau(double %0)
%8 = tail call double @llvm.fmuladd.f64(double %5, double %6, double %7)
%9 = fmul double %4, %8
ret double %9
}
/* Variables and functions */
int /*<<< orphan*/ TagRuleNetwork(void *, long *, long *, long *, long *);
void BeforeDefrulesCode(void *theEnv) {
  long int moduleCount, ruleCount, joinCount, linkCount;
  TagRuleNetwork(theEnv, &moduleCount, &ruleCount, &joinCount, &linkCount);
}


x86 assembly (clang, -O0):
<BeforeDefrulesCode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
lea    -0x20(%rbp),%rcx
lea    -0x28(%rbp),%r8
call   1030 <TagRuleNetwork@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BeforeDefrulesCode>:
sub    $0x28,%rsp
lea    0x20(%rsp),%rsi
lea    0x18(%rsp),%rdx
lea    0x10(%rsp),%rcx
lea    0x8(%rsp),%r8
call   1030 <TagRuleNetwork@plt>
add    $0x28,%rsp
ret

LLVM IR (-O0):
define void @BeforeDefrulesCode(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %2
%7 = load i8*, i8** %2
%8 = call i32 @TagRuleNetwork(i8* %7, i64* %3, i64* %4, i64* %5, i64* %6)
ret void
}

LLVM IR (-O2):
define void @BeforeDefrulesCode(i8* %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = bitcast i64* %2 to i8*
%7 = bitcast i64* %3 to i8*
%8 = bitcast i64* %4 to i8*
%9 = bitcast i64* %5 to i8*
%10 = call i32 @TagRuleNetwork(i8* %0, i64* %2, i64* %3, i64* %4, i64* %5)
ret void
}
int __attribute__((format(printf, 1, 2))) DBG(const char *fmt, ...) {
  return 0;
}


x86 assembly (clang, -O0):
<DBG>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DBG>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @DBG(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 0
}

LLVM IR (-O2):
define i32 @DBG(i8* nocapture readnone %0, ...) {
ret i32 0
}