xunge/DecIR huggingface dataset:
void SteamAPI_ISteamMatchmaking_AddRequestLobbyListFilterSlotsAvailable(
    void *self) {
  xlogf("%s(self = %p)\n", __func__, self);
}


x86 assembly (clang, -O0):
<SteamAPI_ISteamMatchmaking_AddRequestLobbyListFilterSlotsAvailable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
lea    0xed9(%rip),%rdi
lea    0xee1(%rip),%rsi
mov    $0x0,%al
call   1030 <xlogf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SteamAPI_ISteamMatchmaking_AddRequestLobbyListFilterSlotsAvailable>:
mov    %rdi,%rdx
lea    0xee6(%rip),%rdi
lea    0xeee(%rip),%rsi
xor    %eax,%eax
jmp    1030 <xlogf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamMatchmaking_AddRequestLobbyListFilterSlotsAvailable = [67 x i8] c"SteamAPI_ISteamMatchmaking_AddRequestLobbyListFilterSlotsAvailable\00"
define void @SteamAPI_ISteamMatchmaking_AddRequestLobbyListFilterSlotsAvailable(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([67 x i8], [67 x i8]* @__func__.SteamAPI_ISteamMatchmaking_AddRequestLobbyListFilterSlotsAvailable, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"%s(self = %p)\0A\00"
@__func__.SteamAPI_ISteamMatchmaking_AddRequestLobbyListFilterSlotsAvailable = [67 x i8] c"SteamAPI_ISteamMatchmaking_AddRequestLobbyListFilterSlotsAvailable\00"
define void @SteamAPI_ISteamMatchmaking_AddRequestLobbyListFilterSlotsAvailable(i8* %0) {
%2 = tail call i32 (i8*, i8*, i8*, ...) bitcast (i32 (...)* @xlogf to i32 (i8*, i8*, i8*, ...)*)(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([67 x i8], [67 x i8]* @__func__.SteamAPI_ISteamMatchmaking_AddRequestLobbyListFilterSlotsAvailable, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void testUnaryNot() { printf("!%d = %d\n", 10, !10); }


x86 assembly (clang, -O0):
<testUnaryNot>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0xa,%esi
xor    %edx,%edx
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<testUnaryNot>:
lea    0xee9(%rip),%rdi
mov    $0xa,%esi
xor    %edx,%edx
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"!%d = %d\0A\00"
define void @testUnaryNot() {
%1 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 10, i32 0)
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"!%d = %d\0A\00"
define void @testUnaryNot() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 10, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ DriverManagerInit();
void DeviceManagerInit() { DriverManagerInit(); }


x86 assembly (clang, -O0):
<DeviceManagerInit>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <DriverManagerInit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DeviceManagerInit>:
xor    %eax,%eax
jmp    1030 <DriverManagerInit@plt>

LLVM IR (-O0):
define void @DeviceManagerInit() {
%1 = call i32 (...) @DriverManagerInit()
ret void
}

LLVM IR (-O2):
define void @DeviceManagerInit() {
%1 = tail call i32 (...) @DriverManagerInit()
ret void
}
void gencallinterp(unsigned long addr, int jump) {}


x86 assembly (clang, -O0):
<gencallinterp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gencallinterp>:
ret

LLVM IR (-O0):
define void @gencallinterp(i64 %0, i32 %1) {
%3 = alloca i64
%4 = alloca i32
store i64 %0, i64* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @gencallinterp(i64 %0, i32 %1) {
ret void
}
void __fail(void) {
  {
  ERROR:
    goto ERROR;
  }
}


x86 assembly (clang, -O0):
<__fail>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <__fail+0x9>
jmp    1109 <__fail+0x9>

x86 assembly (clang, -O2):
<__fail>:
jmp    1100 <__fail>

LLVM IR (-O0):
define void @__fail() {
br label %1
1: ; preds = %1, %0
br label %1
}

LLVM IR (-O2):
define void @__fail() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
char *GetMemory();
int /*<<< orphan*/ printf(char *, char *);
void Test(void) {
  char *str = NULL;
  str = GetMemory();
  printf("%s\n", str);
}


x86 assembly (clang, -O0):
<Test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
mov    $0x0,%al
call   1040 <GetMemory@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Test>:
push   %rax
xor    %eax,%eax
call   1040 <GetMemory@plt>
lea    0xed1(%rip),%rdi
mov    %rax,%rsi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @Test() {
%1 = alloca i8*
store i8* null, i8** %1
%2 = call i8* (...) @GetMemory()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @Test() {
%1 = tail call i8* (...) @GetMemory()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %1)
ret void
}
/* Variables and functions */
char *getenv(char const *);
const char *GetStringSetting(const char *name, const char *def) {
  const char *value = getenv(name);
  if (value == NULL || value[0] == 0) {
    return def;
  }
  return value;
}


x86 assembly (clang, -O0):
<GetStringSetting>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <getenv@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     1148 <GetStringSetting+0x38>
mov    -0x20(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1155 <GetStringSetting+0x45>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    115d <GetStringSetting+0x4d>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetStringSetting>:
push   %rbx
mov    %rsi,%rbx
call   1030 <getenv@plt>
test   %rax,%rax
je     1125 <GetStringSetting+0x15>
cmpb   $0x0,(%rax)
cmovne %rax,%rbx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @GetStringSetting(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = call i8* @getenv(i8* %7)
store i8* %8, i8** %6
%9 = load i8*, i8** %6
%10 = icmp eq i8* %9, null
br i1 %10, label %17, label %11
11: ; preds = %2
%12 = load i8*, i8** %6
%13 = getelementptr inbounds i8, i8* %12, i64 0
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %11, %2
%18 = load i8*, i8** %5
store i8* %18, i8** %3
br label %21
19: ; preds = %11
%20 = load i8*, i8** %6
store i8* %20, i8** %3
br label %21
21: ; preds = %19, %17
%22 = load i8*, i8** %3
ret i8* %22
}

LLVM IR (-O2):
define i8* @GetStringSetting(i8* nocapture %0, i8* readnone %1) {
%3 = tail call i8* @getenv(i8* %0)
%4 = icmp eq i8* %3, null
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = load i8, i8* %3
%7 = icmp eq i8 %6, 0
%8 = select i1 %7, i8* %1, i8* %3
br label %9
9: ; preds = %5, %2
%10 = phi i8* [ %1, %2 ], [ %8, %5 ]
ret i8* %10
}
/* Variables and functions */
int /*<<< orphan*/ dpush(int);
void dpushbool(bool b) { dpush(b ? -1 : 0); }


x86 assembly (clang, -O0):
<dpushbool>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%ecx
xor    %edi,%edi
mov    $0xffffffff,%eax
cmp    $0x0,%ecx
cmovne %eax,%edi
call   1030 <dpush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dpushbool>:
neg    %edi
sbb    %edi,%edi
jmp    1030 <dpush@plt>

LLVM IR (-O0):
define void @dpushbool(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 -1, i32 0
%7 = call i32 @dpush(i32 %6)
ret void
}

LLVM IR (-O2):
define void @dpushbool(i32 %0) {
%2 = icmp ne i32 %0, 0
%3 = sext i1 %2 to i32
%4 = tail call i32 @dpush(i32 %3)
ret void
}
/* Variables and functions */
int round(int);
int NestLossParameter(int size, float probability) {
  int loss;
  loss = round(size * (1 - probability));
  return loss;
}


x86 assembly (clang, -O0):
<NestLossParameter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movss  %xmm0,-0x8(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
movss  0xed3(%rip),%xmm1
subss  -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm0
cvttss2si %xmm0,%edi
call   1030 <round@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NestLossParameter>:
cvtsi2ss %edi,%xmm1
movss  0xee4(%rip),%xmm2
subss  %xmm0,%xmm2
mulss  %xmm1,%xmm2
cvttss2si %xmm2,%edi
jmp    1030 <round@plt>

LLVM IR (-O0):
define i32 @NestLossParameter(i32 %0, float %1) {
%3 = alloca i32
%4 = alloca float
%5 = alloca i32
store i32 %0, i32* %3
store float %1, float* %4
%6 = load i32, i32* %3
%7 = sitofp i32 %6 to float
%8 = load float, float* %4
%9 = fsub float 1.000000e+00, %8
%10 = fmul float %7, %9
%11 = fptosi float %10 to i32
%12 = call i32 @round(i32 %11)
store i32 %12, i32* %5
%13 = load i32, i32* %5
ret i32 %13
}

LLVM IR (-O2):
define i32 @NestLossParameter(i32 %0, float %1) {
%3 = sitofp i32 %0 to float
%4 = fsub float 1.000000e+00, %1
%5 = fmul float %4, %3
%6 = fptosi float %5 to i32
%7 = tail call i32 @round(i32 %6)
ret i32 %7
}
/* Type definitions */
struct array {
  int dummy;
};

/* Variables and functions */
int array_destroy(struct array *);
int stack_destroy(struct array *st) { return array_destroy(st); }


x86 assembly (clang, -O0):
<stack_destroy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <array_destroy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stack_destroy>:
jmp    1030 <array_destroy@plt>

LLVM IR (-O0):
%struct.array = type { i32 }
define i32 @stack_destroy(%struct.array* %0) {
%2 = alloca %struct.array*
store %struct.array* %0, %struct.array** %2
%3 = load %struct.array*, %struct.array** %2
%4 = call i32 @array_destroy(%struct.array* %3)
ret i32 %4
}

LLVM IR (-O2):
%struct.array = type { i32 }
define i32 @stack_destroy(%struct.array* %0) {
%2 = tail call i32 @array_destroy(%struct.array* %0)
ret i32 %2
}
unsigned int f73(unsigned int x, int y) {
  return (x << y) + (x >> ((-y) & (8 * sizeof(unsigned int) - 1)));
}


x86 assembly (clang, -O0):
<f73>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
movslq %ecx,%rcx
and    $0x1f,%rcx
shr    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f73>:
mov    %esi,%ecx
mov    %edi,%eax
shl    %cl,%eax
neg    %cl
shr    %cl,%edi
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @f73(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = shl i32 %5, %6
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = sub nsw i32 0, %9
%11 = sext i32 %10 to i64
%12 = and i64 %11, 31
%13 = trunc i64 %12 to i32
%14 = lshr i32 %8, %13
%15 = add i32 %7, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @f73(i32 %0, i32 %1) {
%3 = shl i32 %0, %1
%4 = sub nsw i32 0, %1
%5 = and i32 %4, 31
%6 = lshr i32 %0, %5
%7 = add i32 %6, %3
ret i32 %7
}
void eglDestroyImageKHR(void) { return; }


x86 assembly (clang, -O0):
<eglDestroyImageKHR>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eglDestroyImageKHR>:
ret

LLVM IR (-O0):
define void @eglDestroyImageKHR() {
ret void
}

LLVM IR (-O2):
define void @eglDestroyImageKHR() {
ret void
}
int ArrayMax(int a[], int n) {
  int max(int *, int, int);
  return max(a, 0, n - 1);
}


x86 assembly (clang, -O0):
<ArrayMax>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <max@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ArrayMax>:
lea    -0x1(%rsi),%edx
xor    %esi,%esi
jmp    1030 <max@plt>

LLVM IR (-O0):
define i32 @ArrayMax(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = call i32 @max(i32* %5, i32 0, i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @ArrayMax(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = tail call i32 @max(i32* %0, i32 0, i32 %3)
ret i32 %4
}
void bar(__complex__ float x) {
  if (__real__ x != 3.0f || __imag__ x != 4.0f)
    abort();
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movlpd %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  0xed6(%rip),%xmm1
ucomiss %xmm1,%xmm0
jne    115a <bar+0x4a>
jp     115a <bar+0x4a>
movss  -0x4(%rbp),%xmm0
movss  0xebe(%rip),%xmm1
ucomiss %xmm1,%xmm0
jne    115a <bar+0x4a>
jp     115a <bar+0x4a>
jmp    115f <bar+0x4f>
call   1030 <abort@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rax
ucomiss 0xee8(%rip),%xmm0
jne    112d <bar+0x1d>
jp     112d <bar+0x1d>
shufps $0x55,%xmm0,%xmm0
ucomiss 0xedd(%rip),%xmm0
jne    112d <bar+0x1d>
jp     112d <bar+0x1d>
pop    %rax
ret
call   1030 <abort@plt>

LLVM IR (-O0):
define void @bar(<2 x float> %0) {
%2 = alloca { float, float }
%3 = bitcast { float, float }* %2 to <2 x float>*
store <2 x float> %0, <2 x float>* %3
%4 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 0
%5 = load float, float* %4
%6 = fcmp une float %5, 3.000000e+00
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = getelementptr inbounds { float, float }, { float, float }* %2, i32 0, i32 1
%9 = load float, float* %8
%10 = fcmp une float %9, 4.000000e+00
br i1 %10, label %11, label %12
11: ; preds = %7, %1
unreachable
12: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @bar(<2 x float> %0) {
%2 = extractelement <2 x float> %0, i64 0
%3 = fcmp une float %2, 3.000000e+00
%4 = extractelement <2 x float> %0, i64 1
%5 = fcmp une float %4, 4.000000e+00
%6 = or i1 %3, %5
br i1 %6, label %7, label %8
7: ; preds = %1
tail call void @abort()
unreachable
8: ; preds = %1
ret void
}
void HMR3IsNestedPagingActive(void) {}


x86 assembly (clang, -O0):
<HMR3IsNestedPagingActive>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HMR3IsNestedPagingActive>:
ret

LLVM IR (-O0):
define void @HMR3IsNestedPagingActive() {
ret void
}

LLVM IR (-O2):
define void @HMR3IsNestedPagingActive() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(char *progname) {
  fprintf(stderr, "Usage: %s PID [CMD [ARG]...]\n", progname);
  exit(64);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x40,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x40,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [30 x i8] c"Usage: %s PID [CMD [ARG]...]\0A\00"
define void @usage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = call i32 @exit(i32 64)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [30 x i8] c"Usage: %s PID [CMD [ARG]...]\0A\00"
define void @usage(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = tail call i32 @exit(i32 64)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ Platform_errch(char);
int /*<<< orphan*/ Platform_errposint(long long);
void Platform_errint(long long l) {
  if (l < 0) {
    Platform_errch('-');
    l = -l;
  }
  Platform_errposint(l);
}


x86 assembly (clang, -O0):
<Platform_errint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jge    114b <Platform_errint+0x2b>
mov    $0x2d,%edi
call   1040 <Platform_errch@plt>
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <Platform_errposint@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Platform_errint>:
push   %rbx
mov    %rdi,%rbx
test   %rdi,%rdi
jns    1136 <Platform_errint+0x16>
mov    $0x2d,%edi
call   1040 <Platform_errch@plt>
neg    %rbx
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <Platform_errposint@plt>

LLVM IR (-O0):
define void @Platform_errint(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp slt i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = call i32 @Platform_errch(i8 signext 45)
%7 = load i64, i64* %2
%8 = sub nsw i64 0, %7
store i64 %8, i64* %2
br label %9
9: ; preds = %5, %1
%10 = load i64, i64* %2
%11 = call i32 @Platform_errposint(i64 %10)
ret void
}

LLVM IR (-O2):
define void @Platform_errint(i64 %0) {
%2 = icmp slt i64 %0, 0
br i1 %2, label %3, label %6
3: ; preds = %1
%4 = tail call i32 @Platform_errch(i8 signext 45)
%5 = sub nsw i64 0, %0
br label %6
6: ; preds = %3, %1
%7 = phi i64 [ %5, %3 ], [ %0, %1 ]
%8 = tail call i32 @Platform_errposint(i64 %7)
ret void
}
int sum(int val1, int val2) { return val1 + val2; }


x86 assembly (clang, -O0):
<sum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum>:
lea    (%rdi,%rsi,1),%eax
ret

LLVM IR (-O0):
define i32 @sum(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @sum(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
int REXITSTATUS(int status) { return (status >> 8) & 0xff; }


x86 assembly (clang, -O0):
<REXITSTATUS>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<REXITSTATUS>:
mov    %edi,%eax
movzbl %ah,%eax
ret

LLVM IR (-O0):
define i32 @REXITSTATUS(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 8
%5 = and i32 %4, 255
ret i32 %5
}

LLVM IR (-O2):
define i32 @REXITSTATUS(i32 %0) {
%2 = lshr i32 %0, 8
%3 = and i32 %2, 255
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, int, char *, float);
int /*<<< orphan*/ strlen(char *);
char *strndup(char *, int /*<<< orphan*/);
char *libbun_f2s(float x) {
  char buf[128];
  snprintf(buf, 128, "%f", x);
  return strndup(buf, strlen(buf));
}


x86 assembly (clang, -O0):
<libbun_f2s>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa0,%rsp
movss  %xmm0,-0x4(%rbp)
lea    -0x90(%rbp),%rdi
movss  -0x4(%rbp),%xmm0
mov    $0x80,%esi
lea    0xea8(%rip),%rdx
call   1040 <snprintf@plt>
lea    -0x90(%rbp),%rax
mov    %rax,-0x98(%rbp)
lea    -0x90(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x98(%rbp),%rdi
mov    %eax,%esi
call   1050 <strndup@plt>
add    $0xa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libbun_f2s>:
push   %rbx
sub    $0x80,%rsp
lea    0xec1(%rip),%rdx
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x80,%esi
call   1040 <snprintf@plt>
mov    %rbx,%rdi
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %eax,%esi
call   1050 <strndup@plt>
add    $0x80,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%f\00"
define i8* @libbun_f2s(float %0) {
%2 = alloca float
%3 = alloca [128 x i8]
store float %0, float* %2
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%5 = load float, float* %2
%6 = call i32 @snprintf(i8* %4, i32 128, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float %5)
%7 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%8 = getelementptr inbounds [128 x i8], [128 x i8]* %3, i64 0, i64 0
%9 = call i32 @strlen(i8* %8)
%10 = call i8* @strndup(i8* %7, i32 %9)
ret i8* %10
}

LLVM IR (-O2):
@.str = [3 x i8] c"%f\00"
define noalias i8* @libbun_f2s(float %0) {
%2 = alloca [128 x i8]
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%4 = call i32 @snprintf(i8* %3, i32 128, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), float %0)
%5 = call i32 @strlen(i8* %3)
%6 = call i8* @strndup(i8* %3, i32 %5)
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "usage: test [-f family] [-s socktype] [-p proto] [-DPRSv46] "
                  "host serv\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [71 x i8] c"usage: test [-f family] [-s socktype] [-p proto] [-DPRSv46] host serv\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [71 x i8] c"usage: test [-f family] [-s socktype] [-p proto] [-DPRSv46] host serv\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([71 x i8], [71 x i8]* @.str, i64 0, i64 0))
ret void
}
__int128 subreg(__int128 a, __int128 b) { return a - b; }


x86 assembly (clang, -O0):
<subreg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdx,%rax
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rdx
mov    -0x18(%rbp),%rsi
mov    %rax,-0x30(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x30(%rbp),%rax
mov    -0x28(%rbp),%rcx
mov    %rsi,-0x38(%rbp)
mov    %rdx,-0x40(%rbp)
mov    %rcx,-0x48(%rbp)
mov    %rax,-0x50(%rbp)
mov    -0x40(%rbp),%rcx
mov    -0x38(%rbp),%rax
mov    -0x50(%rbp),%rsi
mov    -0x48(%rbp),%rdx
sub    %rsi,%rcx
sbb    %rdx,%rax
mov    %rcx,-0x10(%rbp)
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
pop    %rbp
ret

x86 assembly (clang, -O2):
<subreg>:
mov    %rdi,%rax
sub    %rdx,%rax
sbb    $0x0,%rsi
sub    %rcx,%rsi
mov    %rsi,%rdx
ret

LLVM IR (-O0):
define { i64, i64 } @subreg(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i128
%6 = alloca i128
%7 = alloca i128
%8 = alloca i128
%9 = alloca i128
%10 = bitcast i128* %6 to { i64, i64 }*
%11 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %10, i32 0, i32 0
store i64 %0, i64* %11
%12 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %10, i32 0, i32 1
store i64 %1, i64* %12
%13 = load i128, i128* %6
%14 = bitcast i128* %7 to { i64, i64 }*
%15 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %14, i32 0, i32 0
store i64 %2, i64* %15
%16 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %14, i32 0, i32 1
store i64 %3, i64* %16
%17 = load i128, i128* %7
store i128 %13, i128* %8
store i128 %17, i128* %9
%18 = load i128, i128* %8
%19 = load i128, i128* %9
%20 = sub nsw i128 %18, %19
store i128 %20, i128* %5
%21 = bitcast i128* %5 to { i64, i64 }*
%22 = load { i64, i64 }, { i64, i64 }* %21
ret { i64, i64 } %22
}

LLVM IR (-O2):
define { i64, i64 } @subreg(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = zext i64 %1 to i128
%6 = shl nuw i128 %5, 64
%7 = zext i64 %0 to i128
%8 = zext i64 %3 to i128
%9 = mul i128 %8, -18446744073709551616
%10 = zext i64 %2 to i128
%11 = or i128 %6, %7
%12 = sub i128 %11, %10
%13 = add i128 %12, %9
%14 = trunc i128 %13 to i64
%15 = lshr i128 %13, 64
%16 = trunc i128 %15 to i64
%17 = insertvalue { i64, i64 } poison, i64 %14, 0
%18 = insertvalue { i64, i64 } %17, i64 %16, 1
ret { i64, i64 } %18
}
unsigned ExecuteDXMDROpcode(void) {
  unsigned retSize = 666;
  return retSize;
}


x86 assembly (clang, -O0):
<ExecuteDXMDROpcode>:
push   %rbp
mov    %rsp,%rbp
movl   $0x29a,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExecuteDXMDROpcode>:
mov    $0x29a,%eax
ret

LLVM IR (-O0):
define i32 @ExecuteDXMDROpcode() {
%1 = alloca i32
store i32 666, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @ExecuteDXMDROpcode() {
ret i32 666
}
/* Variables and functions */
int /*<<< orphan*/ M_E;
double pow(int /*<<< orphan*/, double);
double f(double x) { return pow(M_E, x); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    0x2ebc(%rip),%rax
mov    (%rax),%edi
movsd  -0x8(%rbp),%xmm0
call   1030 <pow@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <pow@plt>

LLVM IR (-O0):
@M_E = global i32 0
define double @f(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load i32, i32* @M_E
%4 = load double, double* %2
%5 = call double @pow(i32 %3, double %4)
ret double %5
}

LLVM IR (-O2):
@M_E = global i32 0
define double @f(double %0) {
%2 = load i32, i32* @M_E
%3 = tail call double @pow(i32 %2, double %0)
ret double %3
}
void btusb_proc_add(struct btusb *p_dev, const char *name) {}


x86 assembly (clang, -O0):
<btusb_proc_add>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<btusb_proc_add>:
ret

LLVM IR (-O0):
%struct.btusb = type opaque
define void @btusb_proc_add(%struct.btusb* %0, i8* %1) {
%3 = alloca %struct.btusb*
%4 = alloca i8*
store %struct.btusb* %0, %struct.btusb** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.btusb = type opaque
define void @btusb_proc_add(%struct.btusb* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int *xmalloc(int);
int *int2ptr(int val) {
  int *ptr = xmalloc(sizeof(int));
  *ptr = val;
  return ptr;
}


x86 assembly (clang, -O0):
<int2ptr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x4,%edi
call   1030 <xmalloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int2ptr>:
push   %rbx
mov    %edi,%ebx
mov    $0x4,%edi
call   1030 <xmalloc@plt>
mov    %ebx,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define i32* @int2ptr(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = call i32* @xmalloc(i32 4)
store i32* %4, i32** %3
%5 = load i32, i32* %2
%6 = load i32*, i32** %3
store i32 %5, i32* %6
%7 = load i32*, i32** %3
ret i32* %7
}

LLVM IR (-O2):
define i32* @int2ptr(i32 %0) {
%2 = tail call i32* @xmalloc(i32 4)
store i32 %0, i32* %2
ret i32* %2
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int /*<<< orphan*/ *display;
};
typedef TYPE_1__ XKeyReleasedEvent;
typedef int /*<<< orphan*/ Display;

/* Variables and functions */
void set_XKeyReleasedEvent_display(void *_p, void *_v) {
  ((XKeyReleasedEvent *)_p)->display = (Display *)_v;
}


x86 assembly (clang, -O0):
<set_XKeyReleasedEvent_display>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XKeyReleasedEvent_display>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32* }
define void @set_XKeyReleasedEvent_display(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.TYPE_2__*
%9 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %8, i32 0, i32 0
store i32* %6, i32** %9
ret void
}

LLVM IR (-O2):
define void @set_XKeyReleasedEvent_display(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_once_t;

/* Variables and functions */
int fake_pthread_once(pthread_once_t *once_control, void (*init_func)(void)) {
  init_func();
  return 0;
}


x86 assembly (clang, -O0):
<fake_pthread_once>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
call   *-0x10(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fake_pthread_once>:
push   %rax
call   *%rsi
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @fake_pthread_once(i32* %0, void ()* %1) {
%3 = alloca i32*
%4 = alloca void ()*
store i32* %0, i32** %3
store void ()* %1, void ()** %4
%5 = load void ()*, void ()** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @fake_pthread_once(i32* nocapture readnone %0, void ()* nocapture %1) {
tail call void %1()
ret i32 0
}
void ble_rsp_connection_channel_map_get(
    const struct ble_msg_connection_channel_map_get_rsp_t *msg) {}


x86 assembly (clang, -O0):
<ble_rsp_connection_channel_map_get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_rsp_connection_channel_map_get>:
ret

LLVM IR (-O0):
%struct.ble_msg_connection_channel_map_get_rsp_t = type opaque
define void @ble_rsp_connection_channel_map_get(%struct.ble_msg_connection_channel_map_get_rsp_t* %0) {
%2 = alloca %struct.ble_msg_connection_channel_map_get_rsp_t*
store %struct.ble_msg_connection_channel_map_get_rsp_t* %0, %struct.ble_msg_connection_channel_map_get_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.ble_msg_connection_channel_map_get_rsp_t = type opaque
define void @ble_rsp_connection_channel_map_get(%struct.ble_msg_connection_channel_map_get_rsp_t* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void *ri_mem_copy(void *dest, const void *src, size_t n) {
  memcpy(dest, src, n);
  return dest;
}


x86 assembly (clang, -O0):
<ri_mem_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ri_mem_copy>:
push   %rbx
mov    %rdi,%rbx
call   1030 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ri_mem_copy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i32 @memcpy(i8* %7, i8* %8, i64 %9)
%11 = load i8*, i8** %4
ret i8* %11
}

LLVM IR (-O2):
define i8* @ri_mem_copy(i8* returned %0, i8* %1, i64 %2) {
%4 = tail call i32 @memcpy(i8* %0, i8* %1, i64 %2)
ret i8* %0
}
/* Type definitions */
struct rk_conv_context {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ rk_push_key(struct rk_conv_context *, char);
void rk_terminate(struct rk_conv_context *cc) { rk_push_key(cc, '\n'); }


x86 assembly (clang, -O0):
<rk_terminate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xa,%esi
call   1030 <rk_push_key@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rk_terminate>:
mov    $0xa,%esi
jmp    1030 <rk_push_key@plt>

LLVM IR (-O0):
%struct.rk_conv_context = type { i32 }
define void @rk_terminate(%struct.rk_conv_context* %0) {
%2 = alloca %struct.rk_conv_context*
store %struct.rk_conv_context* %0, %struct.rk_conv_context** %2
%3 = load %struct.rk_conv_context*, %struct.rk_conv_context** %2
%4 = call i32 @rk_push_key(%struct.rk_conv_context* %3, i8 signext 10)
ret void
}

LLVM IR (-O2):
%struct.rk_conv_context = type { i32 }
define void @rk_terminate(%struct.rk_conv_context* %0) {
%2 = tail call i32 @rk_push_key(%struct.rk_conv_context* %0, i8 signext 10)
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t secp256k1_rand32(void) {
  static uint32_t Rz = 11, Rw = 11;
  Rz = 36969 * (Rz & 0xFFFF) + (Rz >> 16);
  Rw = 18000 * (Rw & 0xFFFF) + (Rw >> 16);
  return (Rw << 16) + (Rw >> 16) + Rz;
}


x86 assembly (clang, -O0):
<secp256k1_rand32>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f16(%rip),%eax
and    $0xffff,%eax
imul   $0x9069,%eax,%eax
mov    0x2f05(%rip),%ecx
sar    $0x10,%ecx
add    %ecx,%eax
mov    %eax,0x2efa(%rip)
mov    0x2ef8(%rip),%eax
and    $0xffff,%eax
imul   $0x4650,%eax,%eax
mov    0x2ee7(%rip),%ecx
sar    $0x10,%ecx
add    %ecx,%eax
mov    %eax,0x2edc(%rip)
mov    0x2ed6(%rip),%eax
shl    $0x10,%eax
mov    0x2ecd(%rip),%ecx
sar    $0x10,%ecx
add    %ecx,%eax
add    0x2ebe(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<secp256k1_rand32>:
mov    0x2f1a(%rip),%ecx
movzwl %cx,%eax
imul   $0x9069,%eax,%eax
sar    $0x10,%ecx
add    %eax,%ecx
mov    %ecx,0x2f06(%rip)
mov    0x2f04(%rip),%eax
movzwl %ax,%edx
imul   $0x4650,%edx,%edx
sar    $0x10,%eax
add    %edx,%eax
mov    %eax,0x2ef0(%rip)
mov    %eax,%edx
shl    $0x10,%edx
sar    $0x10,%eax
add    %ecx,%eax
add    %edx,%eax
ret

LLVM IR (-O0):
@secp256k1_rand32.Rz = internal global i32 11
@secp256k1_rand32.Rw = internal global i32 11
define i32 @secp256k1_rand32() {
%1 = load i32, i32* @secp256k1_rand32.Rz
%2 = and i32 %1, 65535
%3 = mul nsw i32 36969, %2
%4 = load i32, i32* @secp256k1_rand32.Rz
%5 = ashr i32 %4, 16
%6 = add nsw i32 %3, %5
store i32 %6, i32* @secp256k1_rand32.Rz
%7 = load i32, i32* @secp256k1_rand32.Rw
%8 = and i32 %7, 65535
%9 = mul nsw i32 18000, %8
%10 = load i32, i32* @secp256k1_rand32.Rw
%11 = ashr i32 %10, 16
%12 = add nsw i32 %9, %11
store i32 %12, i32* @secp256k1_rand32.Rw
%13 = load i32, i32* @secp256k1_rand32.Rw
%14 = shl i32 %13, 16
%15 = load i32, i32* @secp256k1_rand32.Rw
%16 = ashr i32 %15, 16
%17 = add nsw i32 %14, %16
%18 = load i32, i32* @secp256k1_rand32.Rz
%19 = add nsw i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
@secp256k1_rand32.Rz = internal unnamed_addr global i32 11
@secp256k1_rand32.Rw = internal unnamed_addr global i32 11
define i32 @secp256k1_rand32() {
%1 = load i32, i32* @secp256k1_rand32.Rz
%2 = and i32 %1, 65535
%3 = mul nuw nsw i32 %2, 36969
%4 = ashr i32 %1, 16
%5 = add nsw i32 %3, %4
store i32 %5, i32* @secp256k1_rand32.Rz
%6 = load i32, i32* @secp256k1_rand32.Rw
%7 = and i32 %6, 65535
%8 = mul nuw nsw i32 %7, 18000
%9 = ashr i32 %6, 16
%10 = add nsw i32 %8, %9
store i32 %10, i32* @secp256k1_rand32.Rw
%11 = shl i32 %10, 16
%12 = ashr i32 %10, 16
%13 = add i32 %12, %5
%14 = add i32 %13, %11
ret i32 %14
}
int check_wchar() { return sizeof(int); }


x86 assembly (clang, -O0):
<check_wchar>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_wchar>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @check_wchar() {
ret i32 4
}

LLVM IR (-O2):
define i32 @check_wchar() {
ret i32 4
}
void rcu_cpu_starting(unsigned int cpu) {}


x86 assembly (clang, -O0):
<rcu_cpu_starting>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rcu_cpu_starting>:
ret

LLVM IR (-O0):
define void @rcu_cpu_starting(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @rcu_cpu_starting(i32 %0) {
ret void
}
void trap_PumpEventLoop(void) {}


x86 assembly (clang, -O0):
<trap_PumpEventLoop>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trap_PumpEventLoop>:
ret

LLVM IR (-O0):
define void @trap_PumpEventLoop() {
ret void
}

LLVM IR (-O2):
define void @trap_PumpEventLoop() {
ret void
}
/* Type definitions */
struct cpu {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cpu_set_r8(struct cpu *, int /*<<< orphan*/, unsigned char);
void cpu_set_f(struct cpu *cpu, unsigned char f) { cpu_set_r8(cpu, (0), f); }


x86 assembly (clang, -O0):
<cpu_set_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
movzbl -0x9(%rbp),%edx
call   1030 <cpu_set_r8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpu_set_f>:
mov    %esi,%edx
xor    %esi,%esi
jmp    1030 <cpu_set_r8@plt>

LLVM IR (-O0):
%struct.cpu = type { i32 }
define void @cpu_set_f(%struct.cpu* %0, i8 zeroext %1) {
%3 = alloca %struct.cpu*
%4 = alloca i8
store %struct.cpu* %0, %struct.cpu** %3
store i8 %1, i8* %4
%5 = load %struct.cpu*, %struct.cpu** %3
%6 = load i8, i8* %4
%7 = call i32 @cpu_set_r8(%struct.cpu* %5, i32 0, i8 zeroext %6)
ret void
}

LLVM IR (-O2):
%struct.cpu = type { i32 }
define void @cpu_set_f(%struct.cpu* %0, i8 zeroext %1) {
%3 = tail call i32 @cpu_set_r8(%struct.cpu* %0, i32 0, i8 zeroext %1)
ret void
}
/* Variables and functions */
scalar_t__ isalpha(char);
int poe_islocateoption(char c) {
  return isalpha(c) || c == '*' || c == '+' || c == '-';
}


x86 assembly (clang, -O0):
<poe_islocateoption>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <isalpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    116a <poe_islocateoption+0x5a>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2a,%ecx
mov    %al,-0x2(%rbp)
je     116a <poe_islocateoption+0x5a>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2b,%ecx
mov    %al,-0x2(%rbp)
je     116a <poe_islocateoption+0x5a>
movsbl -0x1(%rbp),%eax
cmp    $0x2d,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<poe_islocateoption>:
push   %rbx
mov    %edi,%ebx
call   1030 <isalpha@plt>
test   %rax,%rax
setne  %al
mov    %ebx,%ecx
and    $0xfe,%cl
cmp    $0x2a,%cl
sete   %cl
or     %al,%cl
cmp    $0x2d,%bl
sete   %al
or     %cl,%al
movzbl %al,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @poe_islocateoption(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @isalpha(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 42
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 43
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 45
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @poe_islocateoption(i8 signext %0) {
%2 = tail call i64 @isalpha(i8 signext %0)
%3 = icmp ne i64 %2, 0
%4 = and i8 %0, -2
%5 = icmp eq i8 %4, 42
%6 = or i1 %5, %3
%7 = icmp eq i8 %0, 45
%8 = or i1 %7, %6
%9 = zext i1 %8 to i32
ret i32 %9
}
unsigned xrop3_166_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk3 = ~T;
  stk2 = S & stk3;
  stk1 = D ^ stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_166_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x1c(%rbp)
mov    -0xc(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_166_1_0>:
mov    $0xff,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_166_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %7
%24 = xor i32 %23, -1
store i32 %24, i32* %10
%25 = load i32, i32* %6
%26 = load i32, i32* %10
%27 = and i32 %25, %26
store i32 %27, i32* %9
%28 = load i32, i32* %5
%29 = load i32, i32* %9
%30 = xor i32 %28, %29
store i32 %30, i32* %8
%31 = load i32, i32* %8
%32 = load i32, i32* %6
%33 = xor i32 %32, -1
%34 = and i32 %31, %33
%35 = load i32, i32* %5
%36 = load i32, i32* %6
%37 = and i32 %35, %36
%38 = or i32 %34, %37
ret i32 %38
}

LLVM IR (-O2):
define i32 @xrop3_166_1_0(i8 zeroext %0, i8 zeroext %1) {
ret i32 255
}
int is_kernel(int paging_levels, unsigned long long va) {
  switch (paging_levels) {
  case 2:
  case 3:
    if (va & 0x80000000)
      return 1;
    else
      return 0;
    break;
  case 4:
    if (((va) & (1ULL << 47)))
      return 1;
    else
      return 0;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<is_kernel>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
add    $0xfffffffe,%eax
sub    $0x2,%eax
jb     1133 <is_kernel+0x33>
jmp    1122 <is_kernel+0x22>
mov    -0x14(%rbp),%eax
sub    $0x4,%eax
je     1163 <is_kernel+0x63>
jmp    1193 <is_kernel+0x93>
movabs $0x80000000,%rax
and    -0x10(%rbp),%rax
cmp    $0x0,%rax
je     1157 <is_kernel+0x57>
movl   $0x1,-0x4(%rbp)
jmp    119a <is_kernel+0x9a>
movl   $0x0,-0x4(%rbp)
jmp    119a <is_kernel+0x9a>
movabs $0x800000000000,%rax
and    -0x10(%rbp),%rax
cmp    $0x0,%rax
je     1187 <is_kernel+0x87>
movl   $0x1,-0x4(%rbp)
jmp    119a <is_kernel+0x9a>
movl   $0x0,-0x4(%rbp)
jmp    119a <is_kernel+0x9a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_kernel>:
lea    -0x2(%rdi),%eax
cmp    $0x2,%eax
jae    110d <is_kernel+0xd>
shr    $0x1f,%esi
jmp    111b <is_kernel+0x1b>
xor    %eax,%eax
cmp    $0x4,%edi
jne    111d <is_kernel+0x1d>
shr    $0x2f,%rsi
and    $0x1,%esi
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @is_kernel(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
%6 = load i32, i32* %4
switch i32 %6, label %19 [
i32 2, label %7
i32 3, label %7
i32 4, label %13
]
7: ; preds = %2, %2
%8 = load i64, i64* %5
%9 = and i64 %8, 2147483648
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %3
br label %20
12: ; preds = %7
store i32 0, i32* %3
br label %20
13: ; preds = %2
%14 = load i64, i64* %5
%15 = and i64 %14, 140737488355328
%16 = icmp ne i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 1, i32* %3
br label %20
18: ; preds = %13
store i32 0, i32* %3
br label %20
19: ; preds = %2
store i32 0, i32* %3
br label %20
20: ; preds = %19, %18, %17, %12, %11
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @is_kernel(i32 %0, i64 %1) {
switch i32 %0, label %10 [
i32 2, label %3
i32 3, label %3
i32 4, label %6
]
3: ; preds = %2, %2
%4 = trunc i64 %1 to i32
%5 = lshr i32 %4, 31
br label %10
6: ; preds = %2
%7 = lshr i64 %1, 47
%8 = trunc i64 %7 to i32
%9 = and i32 %8, 1
br label %10
10: ; preds = %2, %6, %3
%11 = phi i32 [ %5, %3 ], [ %9, %6 ], [ 0, %2 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void usage(void) { printf("Usage: mkcastlefs /dev/sdXY\n"); }


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"Usage: mkcastlefs /dev/sdXY\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [28 x i8] c"Usage: mkcastlefs /dev/sdXY\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([28 x i8], [28 x i8]* @str, i64 0, i64 0))
ret void
}
double FPStoKPH(double FPS) {
  double KPH = 1.09728 * FPS;
  return KPH;
}


x86 assembly (clang, -O0):
<FPStoKPH>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<FPStoKPH>:
mulsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @FPStoKPH(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double 1.097280e+00, %4
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @FPStoKPH(double %0) {
%2 = fmul double %0, 1.097280e+00
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void help(void) {
  fprintf(stderr, "Syntax for I2C-like access:\n"
                  "  isaset [OPTIONS] ADDRREG DATAREG ADDRESS VALUE [MASK]\n"
                  "Syntax for flat address space:\n"
                  "  isaset -f [OPTIONS] ADDRESS VALUE [MASK]\n"
                  "Options:\n"
                  "  -f	Enable flat address space mode\n"
                  "  -y	Assume affirmative answer to all questions\n"
                  "  -W	Write a word (16-bit) value\n"
                  "  -L	Write a long (32-bit) value\n");
}


x86 assembly (clang, -O0):
<help>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<help>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
lea    0xee0(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [318 x i8] c"Syntax for I2C-like access:\0A isaset [OPTIONS] ADDRREG DATAREG ADDRESS VALUE [MASK]\0ASyntax for flat address space:\0A isaset -f [OPTIONS] ADDRESS VALUE [MASK]\0AOptions:\0A -f\09Enable flat address space mode\0A -y\09Assume affirmative answer to all questions\0A -W\09Write a word (16-bit) value\0A -L\09Write a long (32-bit) value\0A\00"
define void @help() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([318 x i8], [318 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [318 x i8] c"Syntax for I2C-like access:\0A isaset [OPTIONS] ADDRREG DATAREG ADDRESS VALUE [MASK]\0ASyntax for flat address space:\0A isaset -f [OPTIONS] ADDRESS VALUE [MASK]\0AOptions:\0A -f\09Enable flat address space mode\0A -y\09Assume affirmative answer to all questions\0A -W\09Write a word (16-bit) value\0A -L\09Write a long (32-bit) value\0A\00"
define void @help() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([318 x i8], [318 x i8]* @.str, i64 0, i64 0))
ret void
}
int terminal_write(char *buf, unsigned int len) {}


x86 assembly (clang, -O0):
<terminal_write>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<terminal_write>:
ret

LLVM IR (-O0):
define i32 @terminal_write(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @terminal_write(i8* nocapture readnone %0, i32 %1) {
ret i32 undef
}