#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef unsigned long ulBase;

/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
int PWMGenValid(unsigned long);
void PWMGenConfigure(unsigned long ulBase, unsigned long ulGen,
                     unsigned long ulConfig) {
  DEBUG_ASSERT((ulBase == 0x40028000) || (ulBase == 0x40029000));
  DEBUG_ASSERT(PWMGenValid(ulGen));
  ulGen = ((ulBase) + (ulGen));
  (*((volatile unsigned long *)(ulGen + 0x00000000))) =
      (((*((volatile unsigned long *)(ulGen + 0x00000000))) &
        ~(0x00000002 | 0x00000004 | 0x00040000 | 0x00020000 | 0x00010000 |
          0x0000C000 | 0x00003000 | 0x00000C00 | 0x00000300 | 0x000000C0 |
          0x00000008 | 0x00000010 | 0x00000020)) |
       ulConfig);
  if (ulConfig & 0x00000002) {
    (*((volatile unsigned long *)(ulGen + 0x00000020))) =
        (0x00000030 | 0x00000080);
    (*((volatile unsigned long *)(ulGen + 0x00000024))) =
        (0x00000300 | 0x00000800);
  } else {
    (*((volatile unsigned long *)(ulGen + 0x00000020))) =
        (0x0000000C | 0x00000080);
    (*((volatile unsigned long *)(ulGen + 0x00000024))) =
        (0x0000000C | 0x00000800);
  }
}


x86 assembly (clang, -O0):
<PWMGenConfigure>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x1,%al
cmpq   $0x40028000,-0x8(%rbp)
40
mov    %al,-0x19(%rbp)
je     1155 <PWMGenConfigure+0x35>
cmpq   $0x40029000,-0x8(%rbp)
40
sete   %al
mov    %al,-0x19(%rbp)
mov    -0x19(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rdi
call   1040 <PWMGenValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rcx
and    $0xfffffffffff80001,%rcx
or     -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
and    $0x2,%rax
cmp    $0x0,%rax
je     11c6 <PWMGenConfigure+0xa6>
mov    -0x10(%rbp),%rax
movq   $0xb0,0x20(%rax)
mov    -0x10(%rbp),%rax
movq   $0xb00,0x24(%rax)
jmp    11de <PWMGenConfigure+0xbe>
mov    -0x10(%rbp),%rax
movq   $0x8c,0x20(%rax)
mov    -0x10(%rbp),%rax
movq   $0x80c,0x24(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenConfigure>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r15
mov    %rsi,%r14
mov    %rdi,%rbx
mov    %rdi,%rax
and    $0xffffffffffffefff,%rax
xor    %edi,%edi
cmp    $0x40028000,%rax
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
mov    %r14,%rdi
call   1040 <PWMGenValid@plt>
mov    %eax,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    $0xfffffffffff80001,%rax
and    (%r14,%rbx,1),%rax
or     %r15,%rax
mov    %rax,(%r14,%rbx,1)
test   $0x2,%r15b
mov    $0x8c,%eax
mov    $0xb0,%ecx
cmove  %rax,%rcx
mov    $0x80c,%eax
mov    $0xb00,%edx
cmove  %rax,%rdx
mov    %rcx,0x20(%r14,%rbx,1)
mov    %rdx,0x24(%r14,%rbx,1)
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @PWMGenConfigure(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %4
%8 = icmp eq i64 %7, 1073905664
br i1 %8, label %12, label %9
9: ; preds = %3
%10 = load i64, i64* %4
%11 = icmp eq i64 %10, 1073909760
br label %12
12: ; preds = %9, %3
%13 = phi i1 [ true, %3 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
%15 = call i32 @DEBUG_ASSERT(i32 %14)
%16 = load i64, i64* %5
%17 = call i32 @PWMGenValid(i64 %16)
%18 = call i32 @DEBUG_ASSERT(i32 %17)
%19 = load i64, i64* %4
%20 = load i64, i64* %5
%21 = add i64 %19, %20
store i64 %21, i64* %5
%22 = load i64, i64* %5
%23 = add i64 %22, 0
%24 = inttoptr i64 %23 to i64*
%25 = load volatile i64, i64* %24
%26 = and i64 %25, -524287
%27 = load i64, i64* %6
%28 = or i64 %26, %27
%29 = load i64, i64* %5
%30 = add i64 %29, 0
%31 = inttoptr i64 %30 to i64*
store volatile i64 %28, i64* %31
%32 = load i64, i64* %6
%33 = and i64 %32, 2
%34 = icmp ne i64 %33, 0
br i1 %34, label %35, label %42
35: ; preds = %12
%36 = load i64, i64* %5
%37 = add i64 %36, 32
%38 = inttoptr i64 %37 to i64*
store volatile i64 176, i64* %38
%39 = load i64, i64* %5
%40 = add i64 %39, 36
%41 = inttoptr i64 %40 to i64*
store volatile i64 2816, i64* %41
br label %49
42: ; preds = %12
%43 = load i64, i64* %5
%44 = add i64 %43, 32
%45 = inttoptr i64 %44 to i64*
store volatile i64 140, i64* %45
%46 = load i64, i64* %5
%47 = add i64 %46, 36
%48 = inttoptr i64 %47 to i64*
store volatile i64 2060, i64* %48
br label %49
49: ; preds = %42, %35
ret void
}

LLVM IR (-O2):
define void @PWMGenConfigure(i64 %0, i64 %1, i64 %2) {
%4 = and i64 %0, -4097
%5 = icmp eq i64 %4, 1073905664
%6 = zext i1 %5 to i32
%7 = tail call i32 @DEBUG_ASSERT(i32 %6)
%8 = tail call i32 @PWMGenValid(i64 %1)
%9 = tail call i32 @DEBUG_ASSERT(i32 %8)
%10 = add i64 %1, %0
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = and i64 %12, -524287
%14 = or i64 %13, %2
store volatile i64 %14, i64* %11
%15 = and i64 %2, 2
%16 = icmp eq i64 %15, 0
%17 = add i64 %10, 32
%18 = inttoptr i64 %17 to i64*
%19 = select i1 %16, i64 140, i64 176
%20 = select i1 %16, i64 2060, i64 2816
store volatile i64 %19, i64* %18
%21 = add i64 %10, 36
%22 = inttoptr i64 %21 to i64*
store volatile i64 %20, i64* %22
ret void
}