xunge/DecIR huggingface dataset:
/* Type definitions */
struct output_stream {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ output_stream_write(struct output_stream *, char const *,
                                       int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
void output_stream_fputs(struct output_stream *out, const char *s) {
  output_stream_write(out, s, strlen(s));
}


x86 assembly (clang, -O0):
<output_stream_fputs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1040 <output_stream_write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<output_stream_fputs>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <output_stream_write@plt>

LLVM IR (-O0):
%struct.output_stream = type { i32 }
define void @output_stream_fputs(%struct.output_stream* %0, i8* %1) {
%3 = alloca %struct.output_stream*
%4 = alloca i8*
store %struct.output_stream* %0, %struct.output_stream** %3
store i8* %1, i8** %4
%5 = load %struct.output_stream*, %struct.output_stream** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @output_stream_write(%struct.output_stream* %5, i8* %6, i32 %8)
ret void
}

LLVM IR (-O2):
%struct.output_stream = type { i32 }
define void @output_stream_fputs(%struct.output_stream* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @output_stream_write(%struct.output_stream* %0, i8* %1, i32 %3)
ret void
}
/* Type definitions */
typedef char uint8_t;

/* Variables and functions */
int fuzix_isupper(int c) { return ((uint8_t)c >= 'A') && ((uint8_t)c <= 'Z'); }


x86 assembly (clang, -O0):
<fuzix_isupper>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
movsbl %al,%ecx
xor    %eax,%eax
cmp    $0x41,%ecx
mov    %al,-0x5(%rbp)
jl     112a <fuzix_isupper+0x2a>
mov    -0x4(%rbp),%eax
movsbl %al,%eax
cmp    $0x5a,%eax
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fuzix_isupper>:
shl    $0x18,%edi
add    $0xbfffffff,%edi
xor    %eax,%eax
cmp    $0x1affffff,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @fuzix_isupper(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = trunc i32 %3 to i8
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 65
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i32, i32* %2
%9 = trunc i32 %8 to i8
%10 = sext i8 %9 to i32
%11 = icmp sle i32 %10, 90
br label %12
12: ; preds = %7, %1
%13 = phi i1 [ false, %1 ], [ %11, %7 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @fuzix_isupper(i32 %0) {
%2 = shl i32 %0, 24
%3 = add i32 %2, -1073741825
%4 = icmp ult i32 %3, 452984831
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(void) {
  printf("mod_pkoma is not enabled.\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"mod_pkoma is not enabled.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [26 x i8] c"mod_pkoma is not enabled.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([26 x i8], [26 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
float fmaf(float, float, float);
void __hv_fma_f(float bIn0, float bIn1, float bIn2, float *bOut) {
  *bOut = fmaf(bIn0, bIn0, bIn2);
}


x86 assembly (clang, -O0):
<__hv_fma_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
mov    %rdi,-0x18(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm1
movss  -0xc(%rbp),%xmm2
call   1030 <fmaf@plt>
mov    -0x18(%rbp),%rax
movss  %xmm0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__hv_fma_f>:
push   %rbx
mov    %rdi,%rbx
movaps %xmm0,%xmm1
call   1030 <fmaf@plt>
movss  %xmm0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @__hv_fma_f(float %0, float %1, float %2, float* %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float*
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float* %3, float** %8
%9 = load float, float* %5
%10 = load float, float* %5
%11 = load float, float* %7
%12 = call float @llvm.fma.f32(float %9, float %10, float %11)
%13 = load float*, float** %8
store float %12, float* %13
ret void
}

LLVM IR (-O2):
define void @__hv_fma_f(float %0, float %1, float %2, float* nocapture writeonly %3) {
%5 = tail call float @llvm.fma.f32(float %0, float %0, float %2)
store float %5, float* %3
ret void
}
int _true(const struct dirent *empty) { return 1; }


x86 assembly (clang, -O0):
<_true>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_true>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
%struct.dirent = type opaque
define i32 @_true(%struct.dirent* %0) {
%2 = alloca %struct.dirent*
store %struct.dirent* %0, %struct.dirent** %2
ret i32 1
}

LLVM IR (-O2):
%struct.dirent = type opaque
define i32 @_true(%struct.dirent* nocapture readnone %0) {
ret i32 1
}
/* Type definitions */
typedef unsigned int uint64_t;

/* Variables and functions */
uint64_t shr_logic(uint64_t n, unsigned amt) {
  if (amt == 64) {
    return 0;
  }
  return n >> amt;
}


x86 assembly (clang, -O0):
<shr_logic>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x40,-0xc(%rbp)
jne    1120 <shr_logic+0x20>
movl   $0x0,-0x4(%rbp)
jmp    112b <shr_logic+0x2b>
mov    -0x8(%rbp),%eax
mov    -0xc(%rbp),%ecx
shr    %cl,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shr_logic>:
mov    %esi,%ecx
shr    %cl,%edi
xor    %eax,%eax
cmp    $0x40,%esi
cmovne %edi,%eax
ret

LLVM IR (-O0):
define i32 @shr_logic(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp eq i32 %6, 64
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 0, i32* %3
br label %13
9: ; preds = %2
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = lshr i32 %10, %11
store i32 %12, i32* %3
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @shr_logic(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 64
%4 = lshr i32 %0, %1
%5 = select i1 %3, i32 0, i32 %4
ret i32 %5
}
/* Variables and functions */
int min(int, int);
int calc_borders_len(int in_dim, int out_dim) {
  return min(in_dim, out_dim) * sizeof(int);
}


x86 assembly (clang, -O0):
<calc_borders_len>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <min@plt>
cltq
shl    $0x2,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_borders_len>:
push   %rax
call   1030 <min@plt>
shl    $0x2,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @calc_borders_len(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @min(i32 %5, i32 %6)
%8 = sext i32 %7 to i64
%9 = mul i64 %8, 4
%10 = trunc i64 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @calc_borders_len(i32 %0, i32 %1) {
%3 = tail call i32 @min(i32 %0, i32 %1)
%4 = shl i32 %3, 2
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ GL_DEPTH_TEST;
int /*<<< orphan*/ glClearColor(float, float, float, float);
int /*<<< orphan*/ glDisable(int /*<<< orphan*/);
int /*<<< orphan*/ glOrtho(int, int, int, int, int /*<<< orphan*/, int);
int /*<<< orphan*/ glPointSize(int);
void glInit() {
  glClearColor(0.0f, 0.0f, 0.0f, 0.0f);
  glPointSize(3);
  glOrtho(-10, 800 + 10, 600 + 10, -10, 0, 1);
  glDisable(GL_DEPTH_TEST);
}


x86 assembly (clang, -O0):
<glInit>:
push   %rbp
mov    %rsp,%rbp
xorps  %xmm3,%xmm3
movaps %xmm3,%xmm0
movaps %xmm3,%xmm1
movaps %xmm3,%xmm2
call   1040 <glClearColor@plt>
mov    $0x3,%edi
call   1050 <glPointSize@plt>
mov    $0xfffffff6,%ecx
mov    $0x32a,%esi
mov    $0x262,%edx
xor    %r8d,%r8d
mov    $0x1,%r9d
mov    %ecx,%edi
call   1030 <glOrtho@plt>
mov    0x2e5b(%rip),%rax
mov    (%rax),%edi
call   1060 <glDisable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<glInit>:
push   %rax
xorps  %xmm0,%xmm0
xorps  %xmm1,%xmm1
xorps  %xmm2,%xmm2
xorps  %xmm3,%xmm3
call   1040 <glClearColor@plt>
mov    $0x3,%edi
call   1050 <glPointSize@plt>
mov    $0xfffffff6,%edi
mov    $0x32a,%esi
mov    $0x262,%edx
mov    $0xfffffff6,%ecx
xor    %r8d,%r8d
mov    $0x1,%r9d
call   1030 <glOrtho@plt>
mov    0x2e5b(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1060 <glDisable@plt>

LLVM IR (-O0):
@GL_DEPTH_TEST = global i32 0
define void @glInit() {
%1 = call i32 @glClearColor(float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00)
%2 = call i32 @glPointSize(i32 3)
%3 = call i32 @glOrtho(i32 -10, i32 810, i32 610, i32 -10, i32 0, i32 1)
%4 = load i32, i32* @GL_DEPTH_TEST
%5 = call i32 @glDisable(i32 %4)
ret void
}

LLVM IR (-O2):
@GL_DEPTH_TEST = global i32 0
define void @glInit() {
%1 = tail call i32 @glClearColor(float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00)
%2 = tail call i32 @glPointSize(i32 3)
%3 = tail call i32 @glOrtho(i32 -10, i32 810, i32 610, i32 -10, i32 0, i32 1)
%4 = load i32, i32* @GL_DEPTH_TEST
%5 = tail call i32 @glDisable(i32 %4)
ret void
}
int disitermax(int itermax) {
  static int ITERMAX = 30;
  if (itermax >= 0) {
    ITERMAX = itermax;
  }
  return ITERMAX;
}


x86 assembly (clang, -O0):
<disitermax>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jl     111a <disitermax+0x1a>
mov    -0x4(%rbp),%eax
mov    %eax,0x2f06(%rip)
mov    0x2f00(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<disitermax>:
test   %edi,%edi
js     110d <disitermax+0xd>
mov    %edi,%eax
mov    %edi,0x2f14(%rip)
ret
mov    0x2f0d(%rip),%eax
ret

LLVM IR (-O0):
@disitermax.ITERMAX = internal global i32 30
define i32 @disitermax(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
store i32 %6, i32* @disitermax.ITERMAX
br label %7
7: ; preds = %5, %1
%8 = load i32, i32* @disitermax.ITERMAX
ret i32 %8
}

LLVM IR (-O2):
@disitermax.ITERMAX = internal unnamed_addr global i32 30
define i32 @disitermax(i32 %0) {
%2 = icmp sgt i32 %0, -1
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = load i32, i32* @disitermax.ITERMAX
br label %6
5: ; preds = %1
store i32 %0, i32* @disitermax.ITERMAX
br label %6
6: ; preds = %3, %5
%7 = phi i32 [ %4, %3 ], [ %0, %5 ]
ret i32 %7
}
void killnl(char *buf) {
  for (; buf[0]; buf++) {
    if (buf[0] == '\n') {
      buf[0] = 0;
      return;
    }
    if (buf[0] == '\r') {
      buf[0] = 0;
      return;
    }
  }
}


x86 assembly (clang, -O0):
<killnl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1163 <killnl+0x63>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
jne    1131 <killnl+0x31>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
jmp    1163 <killnl+0x63>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xd,%eax
jne    114d <killnl+0x4d>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
jmp    1163 <killnl+0x63>
jmp    1152 <killnl+0x52>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <killnl+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<killnl>:
movzbl (%rdi),%eax
test   %al,%al
je     1118 <killnl+0x18>
cmp    $0xa,%al
je     1115 <killnl+0x15>
cmp    $0xd,%al
je     1115 <killnl+0x15>
add    $0x1,%rdi
jmp    1100 <killnl>
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define void @killnl(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %27, %1
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 0
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %30
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i64 0
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %14, label %17
14: ; preds = %8
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i64 0
store i8 0, i8* %16
br label %30
17: ; preds = %8
%18 = load i8*, i8** %2
%19 = getelementptr inbounds i8, i8* %18, i64 0
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 13
br i1 %22, label %23, label %26
23: ; preds = %17
%24 = load i8*, i8** %2
%25 = getelementptr inbounds i8, i8* %24, i64 0
store i8 0, i8* %25
br label %30
26: ; preds = %17
br label %27
27: ; preds = %26
%28 = load i8*, i8** %2
%29 = getelementptr inbounds i8, i8* %28, i32 1
store i8* %29, i8** %2
br label %3
30: ; preds = %14, %23, %3
ret void
}

LLVM IR (-O2):
define void @killnl(i8* nocapture %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 0, label %8
i8 10, label %7
i8 13, label %7
]
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2, %2
store i8 0, i8* %3
br label %8
8: ; preds = %2, %7
ret void
}
/* Type definitions */
struct Cyc_Lexing_lexbuf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Cyc_commands_rec(struct Cyc_Lexing_lexbuf *, int);
int Cyc_commands(struct Cyc_Lexing_lexbuf *lexbuf) {
  return ({ Cyc_commands_rec(lexbuf, 14); });
}


x86 assembly (clang, -O0):
<Cyc_commands>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0xe,%esi
call   1030 <Cyc_commands_rec@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_commands>:
mov    $0xe,%esi
jmp    1030 <Cyc_commands_rec@plt>

LLVM IR (-O0):
%struct.Cyc_Lexing_lexbuf = type { i32 }
define i32 @Cyc_commands(%struct.Cyc_Lexing_lexbuf* %0) {
%2 = alloca %struct.Cyc_Lexing_lexbuf*
%3 = alloca i32
store %struct.Cyc_Lexing_lexbuf* %0, %struct.Cyc_Lexing_lexbuf** %2
%4 = load %struct.Cyc_Lexing_lexbuf*, %struct.Cyc_Lexing_lexbuf** %2
%5 = call i32 @Cyc_commands_rec(%struct.Cyc_Lexing_lexbuf* %4, i32 14)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
%struct.Cyc_Lexing_lexbuf = type { i32 }
define i32 @Cyc_commands(%struct.Cyc_Lexing_lexbuf* %0) {
%2 = tail call i32 @Cyc_commands_rec(%struct.Cyc_Lexing_lexbuf* %0, i32 14)
ret i32 %2
}
void *function_of_interest(int x, int y) { return (void *)5; }


x86 assembly (clang, -O0):
<function_of_interest>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<function_of_interest>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i8* @function_of_interest(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret i8* inttoptr (i64 5 to i8*)
}

LLVM IR (-O2):
define i8* @function_of_interest(i32 %0, i32 %1) {
ret i8* inttoptr (i64 5 to i8*)
}
/* Variables and functions */
int /*<<< orphan*/ IPC_RMID;
int semctl(int, int, int /*<<< orphan*/, int /*<<< orphan*/);
int semrm(int semid) { return semctl(semid, 1, IPC_RMID, 0); }


x86 assembly (clang, -O0):
<semrm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ebb(%rip),%rax
mov    (%rax),%edx
mov    $0x1,%esi
xor    %ecx,%ecx
call   1030 <semctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<semrm>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edx
mov    $0x1,%esi
xor    %ecx,%ecx
jmp    1030 <semctl@plt>

LLVM IR (-O0):
@IPC_RMID = global i32 0
define i32 @semrm(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @IPC_RMID
%5 = call i32 @semctl(i32 %3, i32 1, i32 %4, i32 0)
ret i32 %5
}

LLVM IR (-O2):
@IPC_RMID = global i32 0
define i32 @semrm(i32 %0) {
%2 = load i32, i32* @IPC_RMID
%3 = tail call i32 @semctl(i32 %0, i32 1, i32 %2, i32 0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ mav(int, int /*<<< orphan*/);
void drive_stop() { mav(2, 0); }


x86 assembly (clang, -O0):
<drive_stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
xor    %esi,%esi
call   1030 <mav@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drive_stop>:
mov    $0x2,%edi
xor    %esi,%esi
jmp    1030 <mav@plt>

LLVM IR (-O0):
define void @drive_stop() {
%1 = call i32 @mav(i32 2, i32 0)
ret void
}

LLVM IR (-O2):
define void @drive_stop() {
%1 = tail call i32 @mav(i32 2, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void iptree_usage(void) {
  printf("-N set iptree [--timeout value]\n"
         "-A set IP[,timeout]\n"
         "-D set IP\n"
         "-T set IP\n");
}


x86 assembly (clang, -O0):
<iptree_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<iptree_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [73 x i8] c"-N set iptree [--timeout value]\0A-A set IP[,timeout]\0A-D set IP\0A-T set IP\0A\00"
define void @iptree_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [72 x i8] c"-N set iptree [--timeout value]\0A-A set IP[,timeout]\0A-D set IP\0A-T set IP\00"
define void @iptree_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([72 x i8], [72 x i8]* @str, i64 0, i64 0))
ret void
}
int alphabetic(char c) {
  if ((c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z'))
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<alphabetic>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1124 <alphabetic+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jle    113e <alphabetic+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     114a <alphabetic+0x4a>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     114a <alphabetic+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1151 <alphabetic+0x51>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<alphabetic>:
and    $0xdf,%dil
add    $0xbf,%dil
xor    %eax,%eax
cmp    $0x1a,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @alphabetic(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 97
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 122
br i1 %10, label %19, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %20
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 90
br i1 %18, label %19, label %20
19: ; preds = %15, %7
store i32 1, i32* %2
br label %21
20: ; preds = %15, %11
store i32 0, i32* %2
br label %21
21: ; preds = %20, %19
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @alphabetic(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = zext i1 %4 to i32
ret i32 %5
}
unsigned int r5_hash(char *str) {
  unsigned long hash = 0;
  int c;
  c = *str;
  while (c) {
    hash = (hash + (c << 4) + (c >> 4)) * 11;
    c = *++str;
  }
  return (unsigned int)(hash & ((1 << 6) - 1));
}


x86 assembly (clang, -O0):
<r5_hash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1163 <r5_hash+0x63>
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
shl    $0x4,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
mov    -0x14(%rbp),%ecx
sar    $0x4,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
imul   $0xb,%rax,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl 0x1(%rax),%eax
mov    %eax,-0x14(%rbp)
jmp    111a <r5_hash+0x1a>
mov    -0x10(%rbp),%rax
and    $0x3f,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<r5_hash>:
mov    (%rdi),%cl
test   %cl,%cl
je     1138 <r5_hash+0x38>
add    $0x1,%rdi
xor    %eax,%eax
nopl   0x0(%rax)
movsbl %cl,%ecx
mov    %ecx,%edx
shl    $0x4,%edx
add    %rax,%rdx
sar    $0x4,%ecx
add    %rdx,%rcx
lea    (%rcx,%rcx,4),%rax
lea    (%rcx,%rax,2),%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1110 <r5_hash+0x10>
and    $0x3f,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @r5_hash(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i32
store i8* %0, i8** %2
store i64 0, i64* %3
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
store i32 %7, i32* %4
br label %8
8: ; preds = %11, %1
%9 = load i32, i32* %4
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %26
11: ; preds = %8
%12 = load i64, i64* %3
%13 = load i32, i32* %4
%14 = shl i32 %13, 4
%15 = sext i32 %14 to i64
%16 = add i64 %12, %15
%17 = load i32, i32* %4
%18 = ashr i32 %17, 4
%19 = sext i32 %18 to i64
%20 = add i64 %16, %19
%21 = mul i64 %20, 11
store i64 %21, i64* %3
%22 = load i8*, i8** %2
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %2
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
store i32 %25, i32* %4
br label %8
26: ; preds = %8
%27 = load i64, i64* %3
%28 = and i64 %27, 63
%29 = trunc i64 %28 to i32
ret i32 %29
}

LLVM IR (-O2):
define i32 @r5_hash(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %22, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %17, %4 ], [ %2, %1 ]
%6 = phi i64 [ %15, %4 ], [ 0, %1 ]
%7 = phi i8* [ %16, %4 ], [ %0, %1 ]
%8 = sext i8 %5 to i32
%9 = shl nsw i32 %8, 4
%10 = zext i32 %9 to i64
%11 = add i64 %6, %10
%12 = ashr i32 %8, 4
%13 = zext i32 %12 to i64
%14 = add i64 %11, %13
%15 = mul i64 %14, 11
%16 = getelementptr inbounds i8, i8* %7, i64 1
%17 = load i8, i8* %16
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %4
19: ; preds = %4
%20 = trunc i64 %15 to i32
%21 = and i32 %20, 63
br label %22
22: ; preds = %19, %1
%23 = phi i32 [ 0, %1 ], [ %21, %19 ]
ret i32 %23
}
/* Variables and functions */
int /*<<< orphan*/ modf(double, double *);
int /*<<< orphan*/ modff(float, float *);
int /*<<< orphan*/ modfl(long double, long double *);
void uninitvar_modf(void) {
  float f1;
  float *f2;
  (void)modff(f1, f2);
  double d1;
  double *d2;
  (void)modf(d1, d2);
  long double ld1;
  long double *ld2;
  (void)modfl(ld1, ld2);
}


x86 assembly (clang, -O0):
<uninitvar_modf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
movss  -0x4(%rbp),%xmm0
mov    -0x10(%rbp),%rdi
call   1030 <modff@plt>
movsd  -0x18(%rbp),%xmm0
mov    -0x20(%rbp),%rdi
call   1040 <modf@plt>
fldt   -0x30(%rbp)
mov    -0x38(%rbp),%rdi
mov    %rsp,%rax
fstpt  (%rax)
call   1050 <modfl@plt>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_modf>:
sub    $0x18,%rsp
call   1030 <modff@plt>
call   1040 <modf@plt>
call   1050 <modfl@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @uninitvar_modf() {
%1 = alloca float
%2 = alloca float*
%3 = alloca double
%4 = alloca double*
%5 = alloca x86_fp80
%6 = alloca x86_fp80*
%7 = load float, float* %1
%8 = load float*, float** %2
%9 = call i32 @modff(float %7, float* %8)
%10 = load double, double* %3
%11 = load double*, double** %4
%12 = call i32 @modf(double %10, double* %11)
%13 = load x86_fp80, x86_fp80* %5
%14 = load x86_fp80*, x86_fp80** %6
%15 = call i32 @modfl(x86_fp80 %13, x86_fp80* %14)
ret void
}

LLVM IR (-O2):
define void @uninitvar_modf() {
%1 = tail call i32 @modff(float undef, float* undef)
%2 = tail call i32 @modf(double undef, double* undef)
%3 = tail call i32 @modfl(x86_fp80 undef, x86_fp80* undef)
ret void
}
int test3() {
  int a, b;
  b = 1;
  while (a < 1) {
    b = b + 1;
  }
  return a + b;
}


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jge    1123 <test3+0x23>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110b <test3+0xb>
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
ret

LLVM IR (-O0):
define i32 @test3() {
%1 = alloca i32
%2 = alloca i32
store i32 1, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 1
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = load i32, i32* %2
%8 = add nsw i32 %7, 1
store i32 %8, i32* %2
br label %3
9: ; preds = %3
%10 = load i32, i32* %1
%11 = load i32, i32* %2
%12 = add nsw i32 %10, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @test3() {
ret i32 undef
}
/* Type definitions */
typedef int uint32_t;
typedef int int32_t;

/* Variables and functions */
int32_t _jc_qre_get_image_size(uint32_t version) {
  return (version - 1) * 4 + 21;
}


x86 assembly (clang, -O0):
<_jc_qre_get_image_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
shl    $0x2,%eax
add    $0x15,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_jc_qre_get_image_size>:
lea    0x11(,%rdi,4),%eax
ret

LLVM IR (-O0):
define i32 @_jc_qre_get_image_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sub nsw i32 %3, 1
%5 = mul nsw i32 %4, 4
%6 = add nsw i32 %5, 21
ret i32 %6
}

LLVM IR (-O2):
define i32 @_jc_qre_get_image_size(i32 %0) {
%2 = shl i32 %0, 2
%3 = add i32 %2, 17
ret i32 %3
}
char *sRemoveSpaces(char *sIn, char *sOut) {
  char *sWrite;
  sWrite = sOut;
  while ((*sIn) != '\0') {
    if ((*sIn) != ' ')
      (*sWrite++) = (*sIn);
    sIn++;
  }
  (*sWrite) = '\0';
  return (sOut);
}


x86 assembly (clang, -O0):
<sRemoveSpaces>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     115c <sRemoveSpaces+0x5c>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x20,%eax
je     114b <sRemoveSpaces+0x4b>
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1114 <sRemoveSpaces+0x14>
mov    -0x18(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sRemoveSpaces>:
mov    %rsi,%rax
mov    %rsi,%rcx
jmp    1114 <sRemoveSpaces+0x14>
nopl   0x0(%rax,%rax,1)
add    $0x1,%rdi
movzbl (%rdi),%edx
cmp    $0x20,%dl
je     1110 <sRemoveSpaces+0x10>
test   %dl,%dl
je     1128 <sRemoveSpaces+0x28>
mov    %dl,(%rcx)
add    $0x1,%rcx
jmp    1110 <sRemoveSpaces+0x10>
movb   $0x0,(%rcx)
ret

LLVM IR (-O0):
define i8* @sRemoveSpaces(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
store i8* %6, i8** %5
br label %7
7: ; preds = %22, %2
%8 = load i8*, i8** %3
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %25
12: ; preds = %7
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 32
br i1 %16, label %17, label %22
17: ; preds = %12
%18 = load i8*, i8** %3
%19 = load i8, i8* %18
%20 = load i8*, i8** %5
%21 = getelementptr inbounds i8, i8* %20, i32 1
store i8* %21, i8** %5
store i8 %19, i8* %20
br label %22
22: ; preds = %17, %12
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %3
br label %7
25: ; preds = %7
%26 = load i8*, i8** %5
store i8 0, i8* %26
%27 = load i8*, i8** %4
ret i8* %27
}

LLVM IR (-O2):
define i8* @sRemoveSpaces(i8* nocapture %0, i8* returned writeonly %1) {
br label %3
3: ; preds = %9, %2
%4 = phi i8* [ %0, %2 ], [ %11, %9 ]
%5 = phi i8* [ %1, %2 ], [ %10, %9 ]
%6 = load i8, i8* %4
switch i8 %6, label %7 [
i8 0, label %12
i8 32, label %9
]
7: ; preds = %3
%8 = getelementptr inbounds i8, i8* %5, i64 1
store i8 %6, i8* %5
br label %9
9: ; preds = %3, %7
%10 = phi i8* [ %8, %7 ], [ %5, %3 ]
%11 = getelementptr inbounds i8, i8* %4, i64 1
br label %3
12: ; preds = %3
store i8 0, i8* %5
ret i8* %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void parse_message(char *buf) { printf("Message: %s\n", buf); }


x86 assembly (clang, -O0):
<parse_message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_message>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"Message: %s\0A\00"
define void @parse_message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"Message: %s\0A\00"
define void @parse_message(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
void xhci_remove_debug_file(void) {}


x86 assembly (clang, -O0):
<xhci_remove_debug_file>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xhci_remove_debug_file>:
ret

LLVM IR (-O0):
define void @xhci_remove_debug_file() {
ret void
}

LLVM IR (-O2):
define void @xhci_remove_debug_file() {
ret void
}
char fun1(void) { return 0; }


x86 assembly (clang, -O0):
<fun1>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
movsbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i8 @fun1() {
ret i8 0
}

LLVM IR (-O2):
define signext i8 @fun1() {
ret i8 0
}
float nanf(const char *s) { return 0x1.fffff0p128; }


x86 assembly (clang, -O0):
<nanf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  0xef0(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<nanf>:
movss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @nanf(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret float 0x7FF0000000000000
}

LLVM IR (-O2):
define float @nanf(i8* nocapture readnone %0) {
ret float 0x7FF0000000000000
}
/* Variables and functions */
int /*<<< orphan*/ shmdt(void **);
void shmdtp(void *p) {
  if (*(void ***)p)
    shmdt(*(void ***)p);
}


x86 assembly (clang, -O0):
<shmdtp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1136 <shmdtp+0x26>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <shmdt@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmdtp>:
mov    (%rdi),%rdi
test   %rdi,%rdi
je     111d <shmdtp+0xd>
jmp    1030 <shmdt@plt>
ret

LLVM IR (-O0):
define void @shmdtp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i8***
%5 = load i8**, i8*** %4
%6 = icmp ne i8** %5, null
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8*, i8** %2
%9 = bitcast i8* %8 to i8***
%10 = load i8**, i8*** %9
%11 = call i32 @shmdt(i8** %10)
br label %12
12: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
define void @shmdtp(i8* nocapture %0) {
%2 = bitcast i8* %0 to i8***
%3 = load i8**, i8*** %2
%4 = icmp eq i8** %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @shmdt(i8** %3)
br label %7
7: ; preds = %5, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t hfp_subevent_network_operator_changed_get_network_operator_format(
    const uint8_t *event) {
  return event[4];
}


x86 assembly (clang, -O0):
<hfp_subevent_network_operator_changed_get_network_operator_format>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hfp_subevent_network_operator_changed_get_network_operator_format>:
mov    0x10(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @hfp_subevent_network_operator_changed_get_network_operator_format(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 4
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @hfp_subevent_network_operator_changed_get_network_operator_format(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 4
%3 = load i32, i32* %2
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ name;
typedef int /*<<< orphan*/ buf;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int readlink(char *, char *, int);
int /*<<< orphan*/ snprintf(char *, int, char const *, unsigned long,
                            unsigned long);
void pass(const char *fmt, unsigned long a, unsigned long b) {
  char name[64];
  char buf[64];
  snprintf(name, sizeof(name), fmt, a, b);
  if (readlink(name, buf, sizeof(buf)) == -1)
    exit(1);
}


x86 assembly (clang, -O0):
<pass>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa0,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
lea    -0x60(%rbp),%rdi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    -0x18(%rbp),%r8
mov    $0x40,%esi
call   1040 <snprintf@plt>
lea    -0x60(%rbp),%rdi
lea    -0xa0(%rbp),%rsi
mov    $0x40,%edx
call   1030 <readlink@plt>
cmp    $0xffffffff,%eax
jne    1189 <pass+0x59>
mov    $0x1,%edi
call   1050 <exit@plt>
add    $0xa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pass>:
push   %rbx
sub    $0x80,%rsp
mov    %rdx,%r8
mov    %rsi,%rcx
mov    %rdi,%rdx
lea    0x40(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x40,%esi
call   1040 <snprintf@plt>
mov    %rsp,%rsi
mov    %rbx,%rdi
mov    $0x40,%edx
call   1030 <readlink@plt>
cmp    $0xffffffff,%eax
je     1171 <pass+0x41>
add    $0x80,%rsp
pop    %rbx
ret
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define void @pass(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
%7 = alloca [64 x i8]
%8 = alloca [64 x i8]
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%9 = getelementptr inbounds [64 x i8], [64 x i8]* %7, i64 0, i64 0
%10 = load i8*, i8** %4
%11 = load i64, i64* %5
%12 = load i64, i64* %6
%13 = call i32 @snprintf(i8* %9, i32 64, i8* %10, i64 %11, i64 %12)
%14 = getelementptr inbounds [64 x i8], [64 x i8]* %7, i64 0, i64 0
%15 = getelementptr inbounds [64 x i8], [64 x i8]* %8, i64 0, i64 0
%16 = call i32 @readlink(i8* %14, i8* %15, i32 64)
%17 = icmp eq i32 %16, -1
br i1 %17, label %18, label %20
18: ; preds = %3
%19 = call i32 @exit(i32 1)
unreachable
20: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @pass(i8* %0, i64 %1, i64 %2) {
%4 = alloca [64 x i8]
%5 = alloca [64 x i8]
%6 = getelementptr inbounds [64 x i8], [64 x i8]* %4, i64 0, i64 0
%7 = getelementptr inbounds [64 x i8], [64 x i8]* %5, i64 0, i64 0
%8 = call i32 @snprintf(i8* %6, i32 64, i8* %0, i64 %1, i64 %2)
%9 = call i32 @readlink(i8* %6, i8* %7, i32 64)
%10 = icmp eq i32 %9, -1
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = call i32 @exit(i32 1)
unreachable
13: ; preds = %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(double *);
int freeVector(double *x) {
  free(x);
  return 0;
}


x86 assembly (clang, -O0):
<freeVector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeVector>:
push   %rax
call   1030 <free@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @freeVector(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = call i32 @free(double* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @freeVector(double* nocapture %0) {
%2 = tail call i32 @free(double* %0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void unintData(char *pData) {
  if (pData) {
    free(pData);
  }
}


x86 assembly (clang, -O0):
<unintData>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <unintData+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unintData>:
test   %rdi,%rdi
je     111a <unintData+0xa>
jmp    1030 <free@plt>
ret

LLVM IR (-O0):
define void @unintData(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @free(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @unintData(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @free(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
double ls_cost_nm10_sq(double x) { return x * x; }


x86 assembly (clang, -O0):
<ls_cost_nm10_sq>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_cost_nm10_sq>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @ls_cost_nm10_sq(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @ls_cost_nm10_sq(double %0) {
%2 = fmul double %0, %0
ret double %2
}
unsigned short readw_es(unsigned short offset) {
  unsigned short val;
  asm("addr32 "
      "movw %%es:(%1), %0"
      : "=r"(val)
      : "r"((unsigned int)offset));
  asm("" : : : "memory");
  return val;
}


x86 assembly (clang, -O0):
<readw_es>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
addr32 es mov (%eax),%ax
mov    %ax,-0x4(%rbp)
movzwl -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readw_es>:
addr32 es mov (%edi),%ax
ret

LLVM IR (-O0):
define zeroext i16 @readw_es(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i16
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = zext i16 %4 to i32
%6 = call i16 asm "addr32 movw %es:($1), $0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i32 %5)
store i16 %6, i16* %3
%7 = load i16, i16* %3
ret i16 %7
}

LLVM IR (-O2):
define zeroext i16 @readw_es(i16 zeroext %0) {
%2 = zext i16 %0 to i32
%3 = tail call i16 asm "addr32 movw %es:($1), $0", "=r,r,~{dirflag},~{fpsr},~{flags}"(i32 %2)
tail call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret i16 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
void funcA() { printf("In funcA: this section is executed by thread %d\n", 0); }


x86 assembly (clang, -O0):
<funcA>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
xor    %esi,%esi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<funcA>:
lea    0xee9(%rip),%rdi
xor    %esi,%esi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [49 x i8] c"In funcA: this section is executed by thread %d\0A\00"
define void @funcA() {
%1 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [49 x i8] c"In funcA: this section is executed by thread %d\0A\00"
define void @funcA() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0), i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void checkpoint3(int status, int status2) { printf("checkpoint3\n"); }


x86 assembly (clang, -O0):
<checkpoint3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkpoint3>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"checkpoint3\0A\00"
define void @checkpoint3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [12 x i8] c"checkpoint3\00"
define void @checkpoint3(i32 %0, i32 %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
ret void
}
int test_imm_61uint16_reg(unsigned short val) {
  return ((val) & (0x61 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_61uint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%edx
and    $0x61,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_61uint16_reg>:
test   $0x61,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_61uint16_reg(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 97
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_61uint16_reg(i16 zeroext %0) {
%2 = and i16 %0, 97
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ check_double(double *, double *, char *);
void check_double_(double *x, double *y, char *ret) { check_double(x, y, ret); }


x86 assembly (clang, -O0):
<check_double_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <check_double@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_double_>:
jmp    1030 <check_double@plt>

LLVM IR (-O0):
define void @check_double_(double* %0, double* %1, i8* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i8*
store double* %0, double** %4
store double* %1, double** %5
store i8* %2, i8** %6
%7 = load double*, double** %4
%8 = load double*, double** %5
%9 = load i8*, i8** %6
%10 = call i32 @check_double(double* %7, double* %8, i8* %9)
ret void
}

LLVM IR (-O2):
define void @check_double_(double* %0, double* %1, i8* %2) {
%4 = tail call i32 @check_double(double* %0, double* %1, i8* %2)
ret void
}
/* Type definitions */
struct sock {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ BT_DBG(char *, struct sock *);
int /*<<< orphan*/ rfcomm_schedule();
void rfcomm_l2data_ready(struct sock *sk) {
  BT_DBG("%p", sk);
  rfcomm_schedule();
}


x86 assembly (clang, -O0):
<rfcomm_l2data_ready>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1040 <BT_DBG@plt>
mov    $0x0,%al
call   1030 <rfcomm_schedule@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rfcomm_l2data_ready>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1040 <BT_DBG@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <rfcomm_schedule@plt>

LLVM IR (-O0):
%struct.sock = type { i32 }
@.str = [3 x i8] c"%p\00"
define void @rfcomm_l2data_ready(%struct.sock* %0) {
%2 = alloca %struct.sock*
store %struct.sock* %0, %struct.sock** %2
%3 = load %struct.sock*, %struct.sock** %2
%4 = call i32 @BT_DBG(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), %struct.sock* %3)
%5 = call i32 (...) @rfcomm_schedule()
ret void
}

LLVM IR (-O2):
%struct.sock = type { i32 }
@.str = [3 x i8] c"%p\00"
define void @rfcomm_l2data_ready(%struct.sock* %0) {
%2 = tail call i32 @BT_DBG(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), %struct.sock* %0)
%3 = tail call i32 (...) @rfcomm_schedule()
ret void
}
int LZ4_sizeofState() { return (((1 << (14 - 2)) + 8) * sizeof(unsigned int)); }


x86 assembly (clang, -O0):
<LZ4_sizeofState>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4020,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZ4_sizeofState>:
mov    $0x4020,%eax
ret

LLVM IR (-O0):
define i32 @LZ4_sizeofState() {
ret i32 16416
}

LLVM IR (-O2):
define i32 @LZ4_sizeofState() {
ret i32 16416
}
/* Variables and functions */
int are_equal(int *, int *, int);
int /*<<< orphan*/ heapify(int *, int);
int test_heapify() {
  int input[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9};
  int expected[] = {9, 8, 6, 7, 4, 5, 2, 0, 3, 1};
  heapify(input, 10);
  return are_equal(input, expected, 10);
}


x86 assembly (clang, -O0):
<test_heapify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
lea    -0x30(%rbp),%rdi
lea    0xebd(%rip),%rsi
mov    $0x28,%edx
call   1030 <memcpy@plt>
lea    -0x60(%rbp),%rdi
lea    0xed8(%rip),%rsi
mov    $0x28,%edx
call   1030 <memcpy@plt>
lea    -0x30(%rbp),%rdi
mov    $0xa,%esi
call   1050 <heapify@plt>
lea    -0x30(%rbp),%rdi
lea    -0x60(%rbp),%rsi
mov    $0xa,%edx
call   1040 <are_equal@plt>
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_heapify>:
push   %rbx
sub    $0x60,%rsp
mov    0xef4(%rip),%rax
mov    %rax,0x50(%rsp)
movaps 0xed8(%rip),%xmm0
movaps %xmm0,0x40(%rsp)
movaps 0xebc(%rip),%xmm0
movaps %xmm0,0x30(%rsp)
mov    0xf00(%rip),%rax
mov    %rax,0x20(%rsp)
movaps 0xee4(%rip),%xmm0
movaps %xmm0,0x10(%rsp)
movaps 0xec8(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0x30(%rsp),%rbx
mov    %rbx,%rdi
mov    $0xa,%esi
call   1040 <heapify@plt>
mov    %rsp,%rsi
mov    %rbx,%rdi
mov    $0xa,%edx
call   1030 <are_equal@plt>
add    $0x60,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@__const.test_heapify.input = [10 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9]
@__const.test_heapify.expected = [10 x i32] [i32 9, i32 8, i32 6, i32 7, i32 4, i32 5, i32 2, i32 0, i32 3, i32 1]
define i32 @test_heapify() {
%1 = alloca [10 x i32]
%2 = alloca [10 x i32]
%3 = bitcast [10 x i32]* %1 to i8*
%4 = bitcast [10 x i32]* %2 to i8*
%5 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%6 = call i32 @heapify(i32* %5, i32 10)
%7 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%8 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
%9 = call i32 @are_equal(i32* %7, i32* %8, i32 10)
ret i32 %9
}

LLVM IR (-O2):
@__const.test_heapify.input = [10 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9]
@__const.test_heapify.expected = [10 x i32] [i32 9, i32 8, i32 6, i32 7, i32 4, i32 5, i32 2, i32 0, i32 3, i32 1]
define i32 @test_heapify() {
%1 = alloca [10 x i32]
%2 = alloca [10 x i32]
%3 = bitcast [10 x i32]* %1 to i8*
%4 = bitcast [10 x i32]* %2 to i8*
%5 = getelementptr inbounds [10 x i32], [10 x i32]* %1, i64 0, i64 0
%6 = call i32 @heapify(i32* %5, i32 10)
%7 = getelementptr inbounds [10 x i32], [10 x i32]* %2, i64 0, i64 0
%8 = call i32 @are_equal(i32* %5, i32* %7, i32 10)
ret i32 %8
}
/* Variables and functions */
double log_x_plus_1(double);
double log(double x) { return log_x_plus_1(x - 1); }


x86 assembly (clang, -O0):
<log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed6(%rip),%xmm1
subsd  %xmm1,%xmm0
call   1030 <log_x_plus_1@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log>:
addsd  0xee8(%rip),%xmm0
jmp    1030 <log_x_plus_1@plt>

LLVM IR (-O0):
define double @log(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fsub double %3, 1.000000e+00
%5 = call double @log_x_plus_1(double %4)
ret double %5
}

LLVM IR (-O2):
define double @log(double %0) {
%2 = fadd double %0, -1.000000e+00
%3 = tail call double @log_x_plus_1(double %2)
ret double %3
}