xunge/DecIR huggingface dataset:
void incrementsv(sv, class) register int *sv;
int class;
{
  for (;;) {
    if (*sv++ == class) {
      sv[-1]++;
      break;
    }
  }
}


x86 assembly (clang, -O0):
<incrementsv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x4,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%eax
cmp    -0xc(%rbp),%eax
jne    1137 <incrementsv+0x37>
mov    -0x8(%rbp),%rax
mov    -0x4(%rax),%ecx
add    $0x1,%ecx
mov    %ecx,-0x4(%rax)
jmp    113c <incrementsv+0x3c>
jmp    110b <incrementsv+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<incrementsv>:
mov    %rdi,%rax
add    $0x4,%rdi
cmp    %esi,(%rax)
jne    1100 <incrementsv>
add    $0x1,%esi
mov    %esi,-0x4(%rdi)
ret

LLVM IR (-O0):
define void @incrementsv(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %16, %2
%6 = load i32*, i32** %3
%7 = getelementptr inbounds i32, i32* %6, i32 1
store i32* %7, i32** %3
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp eq i32 %8, %9
br i1 %10, label %11, label %16
11: ; preds = %5
%12 = load i32*, i32** %3
%13 = getelementptr inbounds i32, i32* %12, i64 -1
%14 = load i32, i32* %13
%15 = add nsw i32 %14, 1
store i32 %15, i32* %13
br label %17
16: ; preds = %5
br label %5
17: ; preds = %11
ret void
}

LLVM IR (-O2):
define void @incrementsv(i32* nocapture %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32* [ %0, %2 ], [ %5, %3 ]
%5 = getelementptr inbounds i32, i32* %4, i64 1
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, %1
br i1 %7, label %8, label %3
8: ; preds = %3
%9 = add nsw i32 %1, 1
store i32 %9, i32* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ scanf(char *, char *);
void fig09_22() {
  char z[9];
  printf("%s", "Enter a string: \n");
  scanf("%8[^aeiou]", z);
  printf("The input was \"%s\"\n", z);
}


x86 assembly (clang, -O0):
<fig09_22>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
lea    0xecd(%rip),%rsi
call   1030 <printf@plt>
lea    -0x9(%rbp),%rsi
lea    0xecf(%rip),%rdi
call   1040 <scanf@plt>
lea    -0x9(%rbp),%rsi
lea    0xeca(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fig09_22>:
push   %rbx
sub    $0x10,%rsp
lea    0xed4(%rip),%rdi
lea    0xed0(%rip),%rsi
call   1030 <printf@plt>
lea    0xed6(%rip),%rdi
lea    0x7(%rsp),%rbx
mov    %rbx,%rsi
call   1040 <scanf@plt>
lea    0xecd(%rip),%rdi
mov    %rbx,%rsi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
@.str.1 = [18 x i8] c"Enter a string: \0A\00"
@.str.2 = [11 x i8] c"%8[^aeiou]\00"
@.str.3 = [20 x i8] c"The input was \22%s\22\0A\00"
define void @fig09_22() {
%1 = alloca [9 x i8]
%2 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%3 = getelementptr inbounds [9 x i8], [9 x i8]* %1, i64 0, i64 0
%4 = call i32 @scanf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0), i8* %3)
%5 = getelementptr inbounds [9 x i8], [9 x i8]* %1, i64 0, i64 0
%6 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.3, i64 0, i64 0), i8* %5)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
@.str.1 = [18 x i8] c"Enter a string: \0A\00"
@.str.2 = [11 x i8] c"%8[^aeiou]\00"
@.str.3 = [20 x i8] c"The input was \22%s\22\0A\00"
define void @fig09_22() {
%1 = alloca [9 x i8]
%2 = getelementptr inbounds [9 x i8], [9 x i8]* %1, i64 0, i64 0
%3 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str.2, i64 0, i64 0), i8* %2)
%5 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.3, i64 0, i64 0), i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
extern void shmem_int_prod_to_all(int *target, int *source, int nreduce,
                                  int PE_start, int logPE_stride, int PE_size,
                                  int *pWrk, long *pSync) {
  printf("\nOpenSHMEM Analyzer\n");
}


x86 assembly (clang, -O0):
<shmem_int_prod_to_all>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9d,-0x20(%rbp)
lea    0xec3(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shmem_int_prod_to_all>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"\0AOpenSHMEM Analyzer\0A\00"
define void @shmem_int_prod_to_all(i32* %0, i32* %1, i32 %2, i32 %3, i32 %4, i32 %5, i32* %6, i64* %7) {
%9 = alloca i32*
%10 = alloca i32*
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32*
%16 = alloca i64*
store i32* %0, i32** %9
store i32* %1, i32** %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i32* %6, i32** %15
store i64* %7, i64** %16
%17 = call i32 @printf(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [20 x i8] c"\0AOpenSHMEM Analyzer\00"
define void @shmem_int_prod_to_all(i32* nocapture readnone %0, i32* nocapture readnone %1, i32 %2, i32 %3, i32 %4, i32 %5, i32* nocapture readnone %6, i64* nocapture readnone %7) {
%9 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
struct core_counter {
  int dummy;
};
typedef scalar_t__ int64_t;

/* Variables and functions */
scalar_t__ core_counter_get(struct core_counter *, int);
int64_t core_counter_sum(struct core_counter *self, int counter1,
                         int counter2) {
  return core_counter_get(self, counter1) + core_counter_get(self, counter2);
}


x86 assembly (clang, -O0):
<core_counter_sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <core_counter_get@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
call   1030 <core_counter_get@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<core_counter_sum>:
push   %rbp
push   %r14
push   %rbx
mov    %edx,%r14d
mov    %rdi,%rbx
call   1030 <core_counter_get@plt>
mov    %rax,%rbp
mov    %rbx,%rdi
mov    %r14d,%esi
call   1030 <core_counter_get@plt>
add    %rbp,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.core_counter = type { i32 }
define i64 @core_counter_sum(%struct.core_counter* %0, i32 %1, i32 %2) {
%4 = alloca %struct.core_counter*
%5 = alloca i32
%6 = alloca i32
store %struct.core_counter* %0, %struct.core_counter** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load %struct.core_counter*, %struct.core_counter** %4
%8 = load i32, i32* %5
%9 = call i64 @core_counter_get(%struct.core_counter* %7, i32 %8)
%10 = load %struct.core_counter*, %struct.core_counter** %4
%11 = load i32, i32* %6
%12 = call i64 @core_counter_get(%struct.core_counter* %10, i32 %11)
%13 = add nsw i64 %9, %12
ret i64 %13
}

LLVM IR (-O2):
%struct.core_counter = type { i32 }
define i64 @core_counter_sum(%struct.core_counter* %0, i32 %1, i32 %2) {
%4 = tail call i64 @core_counter_get(%struct.core_counter* %0, i32 %1)
%5 = tail call i64 @core_counter_get(%struct.core_counter* %0, i32 %2)
%6 = add nsw i64 %5, %4
ret i64 %6
}
int sum(n) {
  int s;
  if (n == 1)
    return (1);
  s = n + sum(n - 1);
  return (s);
}


x86 assembly (clang, -O0):
<sum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    1131 <sum+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1152 <sum+0x42>
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <sum@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum>:
mov    $0x1,%eax
cmp    $0x1,%edi
je     1124 <sum+0x24>
lea    -0x1(%rdi),%eax
lea    -0x2(%rdi),%ecx
imul   %ecx,%eax
lea    -0x3(%rdi),%edx
imul   %rcx,%rdx
shr    %rdx
add    %edi,%eax
sub    %edx,%eax
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @sum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %2
br label %15
8: ; preds = %1
%9 = load i32, i32* %3
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 1
%12 = call i32 @sum(i32 %11)
%13 = add nsw i32 %9, %12
store i32 %13, i32* %4
%14 = load i32, i32* %4
store i32 %14, i32* %2
br label %15
15: ; preds = %8, %7
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @sum(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %16, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = add i32 %0, -2
%6 = mul i32 %4, %5
%7 = zext i32 %5 to i33
%8 = add i32 %0, -3
%9 = zext i32 %8 to i33
%10 = mul i33 %7, %9
%11 = lshr i33 %10, 1
%12 = trunc i33 %11 to i32
%13 = add i32 %6, %0
%14 = sub i32 %13, %12
%15 = add i32 %14, 1
br label %16
16: ; preds = %3, %1
%17 = phi i32 [ 1, %1 ], [ %15, %3 ]
ret i32 %17
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, unsigned int);
int /*<<< orphan*/ stderr;
scalar_t__ test_simple_large();
int main(int argc, char *const *argv) {
  unsigned int errorCount = 0;
  errorCount += test_simple_large();
  if (errorCount != 0)
    fprintf(stderr, "Error (code: %u)\n", errorCount);
  return errorCount != 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    $0x0,%al
call   1030 <test_simple_large@plt>
mov    %rax,%rcx
mov    -0x14(%rbp),%eax
add    %rcx,%rax
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1172 <main+0x52>
mov    0x2e7f(%rip),%rax
mov    (%rax),%edi
mov    -0x14(%rbp),%edx
lea    0xe93(%rip),%rsi
call   1040 <fprintf@plt>
cmpl   $0x0,-0x14(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
xor    %eax,%eax
call   1030 <test_simple_large@plt>
mov    %rax,%rbx
test   %ebx,%ebx
je     1146 <main+0x26>
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
lea    0xec1(%rip),%rsi
mov    %ebx,%edx
call   1040 <fprintf@plt>
xor    %eax,%eax
test   %ebx,%ebx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [18 x i8] c"Error (code: %u)\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = call i64 (...) @test_simple_large()
%8 = load i32, i32* %6
%9 = zext i32 %8 to i64
%10 = add nsw i64 %9, %7
%11 = trunc i64 %10 to i32
store i32 %11, i32* %6
%12 = load i32, i32* %6
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %2
%15 = load i32, i32* @stderr
%16 = load i32, i32* %6
%17 = call i32 @fprintf(i32 %15, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %16)
br label %18
18: ; preds = %14, %2
%19 = load i32, i32* %6
%20 = icmp ne i32 %19, 0
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [18 x i8] c"Error (code: %u)\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i64 (...) @test_simple_large()
%4 = trunc i64 %3 to i32
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %2
%7 = load i32, i32* @stderr
%8 = tail call i32 @fprintf(i32 %7, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %4)
br label %9
9: ; preds = %6, %2
%10 = zext i1 %5 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isupper(int);
void t_isupper_0x08() {
  Assert_real((isupper(8) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isupper.c",
              45, ("isupper should be 0 for 0x08"));
}


x86 assembly (clang, -O0):
<t_isupper_0x08>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%edi
call   1030 <isupper@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2d,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isupper_0x08>:
push   %rax
mov    $0x8,%edi
call   1030 <isupper@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2d,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0x08\00"
define void @t_isupper_0x08() {
%1 = call i64 @isupper(i32 8)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 45, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isupper.c\00"
@.str.1 = [29 x i8] c"isupper should be 0 for 0x08\00"
define void @t_isupper_0x08() {
%1 = tail call i64 @isupper(i32 8)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 45, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void ff_hevc_put_hevc_bi_qpel_v32_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_v32_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_v32_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_v32_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_v32_8_sse4() {
ret void
}
/* Variables and functions */
char *_s2_f2cstr(char *, long);
int /*<<< orphan*/ free(char *);
int s2opendo(char *);
int s2opendo_(char *device, long int devlen) {
  char *tdev = _s2_f2cstr(device, devlen);
  int result = s2opendo(tdev);
  free(tdev);
  return (result);
}


x86 assembly (clang, -O0):
<s2opendo_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1050 <_s2_f2cstr@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <s2opendo@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s2opendo_>:
push   %rbp
push   %rbx
push   %rax
call   1050 <_s2_f2cstr@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <s2opendo@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @s2opendo_(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
%7 = load i8*, i8** %3
%8 = load i64, i64* %4
%9 = call i8* @_s2_f2cstr(i8* %7, i64 %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = call i32 @s2opendo(i8* %10)
store i32 %11, i32* %6
%12 = load i8*, i8** %5
%13 = call i32 @free(i8* %12)
%14 = load i32, i32* %6
ret i32 %14
}

LLVM IR (-O2):
define i32 @s2opendo_(i8* %0, i64 %1) {
%3 = tail call i8* @_s2_f2cstr(i8* %0, i64 %1)
%4 = tail call i32 @s2opendo(i8* %3)
%5 = tail call i32 @free(i8* %3)
ret i32 %4
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  unsigned long serial;
};
typedef TYPE_1__ XCreateWindowEvent;

/* Variables and functions */
void set_XCreateWindowEvent_serial(void *_p, unsigned long _v) {
  ((XCreateWindowEvent *)_p)->serial = (unsigned long)_v;
}


x86 assembly (clang, -O0):
<set_XCreateWindowEvent_serial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XCreateWindowEvent_serial>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define void @set_XCreateWindowEvent_serial(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @set_XCreateWindowEvent_serial(i8* nocapture writeonly %0, i64 %1) {
%3 = bitcast i8* %0 to i64*
store i64 %1, i64* %3
ret void
}
/* Variables and functions */
scalar_t__ HZ;
int /*<<< orphan*/ __delay(long long);
void __udelay(unsigned long long usecs, unsigned long lpj) {
  usecs *= (((unsigned long long)HZ << 32) / 1000000) * lpj;
  __delay((long long)usecs >> 32);
}


x86 assembly (clang, -O0):
<__udelay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eb9(%rip),%rax
mov    (%rax),%rax
shl    $0x20,%rax
mov    $0xf4240,%ecx
xor    %edx,%edx
div    %rcx
imul   -0x10(%rbp),%rax
imul   -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
sar    $0x20,%rdi
call   1030 <__delay@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__udelay>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%rax
shl    $0x20,%rax
movabs $0x431bde82d7b634db,%rcx
de 1b 43
mul    %rcx
shr    $0x12,%rdx
imul   %rsi,%rdi
imul   %rdx,%rdi
sar    $0x20,%rdi
jmp    1030 <__delay@plt>

LLVM IR (-O0):
@HZ = global i64 0
define void @__udelay(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* @HZ
%6 = shl i64 %5, 32
%7 = udiv i64 %6, 1000000
%8 = load i64, i64* %4
%9 = mul i64 %7, %8
%10 = load i64, i64* %3
%11 = mul i64 %10, %9
store i64 %11, i64* %3
%12 = load i64, i64* %3
%13 = ashr i64 %12, 32
%14 = call i32 @__delay(i64 %13)
ret void
}

LLVM IR (-O2):
@HZ = global i64 0
define void @__udelay(i64 %0, i64 %1) {
%3 = load i64, i64* @HZ
%4 = shl i64 %3, 32
%5 = udiv i64 %4, 1000000
%6 = mul i64 %1, %0
%7 = mul i64 %6, %5
%8 = ashr i64 %7, 32
%9 = tail call i32 @__delay(i64 %8)
ret void
}
/* Variables and functions */
int strcmp(char *const, char *const);
int cmpstringp(const void *p1, const void *p2) {
  return strcmp(*(char *const *)p1, *(char *const *)p2);
}


x86 assembly (clang, -O0):
<cmpstringp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmpstringp>:
mov    (%rdi),%rdi
mov    (%rsi),%rsi
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @cmpstringp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i8**
%7 = load i8*, i8** %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i8**
%10 = load i8*, i8** %9
%11 = call i32 @strcmp(i8* %7, i8* %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @cmpstringp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i8**
%4 = load i8*, i8** %3
%5 = bitcast i8* %1 to i8**
%6 = load i8*, i8** %5
%7 = tail call i32 @strcmp(i8* dereferenceable(1) %4, i8* dereferenceable(1) %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ perror(char const *);
void ftp_error(const char *msg) { perror(msg); }


x86 assembly (clang, -O0):
<ftp_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ftp_error>:
jmp    1030 <perror@plt>

LLVM IR (-O0):
define void @ftp_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
ret void
}

LLVM IR (-O2):
define void @ftp_error(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
ret void
}
/* Type definitions */
struct cla {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ cla_has_next(struct cla *);
int /*<<< orphan*/ cla_has_subcmds(struct cla *);
int cla_is_leaf(struct cla *cmd) {
  return (!cla_has_subcmds(cmd) && !cla_has_next(cmd));
}


x86 assembly (clang, -O0):
<cla_is_leaf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cla_has_subcmds@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x9(%rbp)
jne    1159 <cla_is_leaf+0x39>
mov    -0x8(%rbp),%rdi
call   1040 <cla_has_next@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cla_is_leaf>:
push   %rbx
mov    %rdi,%rbx
call   1030 <cla_has_subcmds@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
je     1133 <cla_is_leaf+0x13>
pop    %rbx
ret
mov    %rbx,%rdi
call   1040 <cla_has_next@plt>
mov    %eax,%ecx
xor    %eax,%eax
test   %ecx,%ecx
sete   %al
pop    %rbx
ret

LLVM IR (-O0):
%struct.cla = type { i32 }
define i32 @cla_is_leaf(%struct.cla* %0) {
%2 = alloca %struct.cla*
store %struct.cla* %0, %struct.cla** %2
%3 = load %struct.cla*, %struct.cla** %2
%4 = call i32 @cla_has_subcmds(%struct.cla* %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %11, label %6
6: ; preds = %1
%7 = load %struct.cla*, %struct.cla** %2
%8 = call i32 @cla_has_next(%struct.cla* %7)
%9 = icmp ne i32 %8, 0
%10 = xor i1 %9, true
br label %11
11: ; preds = %6, %1
%12 = phi i1 [ false, %1 ], [ %10, %6 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
%struct.cla = type { i32 }
define i32 @cla_is_leaf(%struct.cla* %0) {
%2 = tail call i32 @cla_has_subcmds(%struct.cla* %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i32 @cla_has_next(%struct.cla* %0)
%6 = icmp eq i32 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 0, %1 ], [ %7, %4 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ strncpy(char *, char *, int);
int Get_component_name(void *self, char *name) {
  strncpy(name, "Cyclone Windfield Simulator", (2048));
  return (0);
}


x86 assembly (clang, -O0):
<Get_component_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed5(%rip),%rsi
mov    $0x800,%edx
call   1030 <strncpy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Get_component_name>:
push   %rax
mov    %rsi,%rdi
lea    0xee5(%rip),%rsi
mov    $0x800,%edx
call   1030 <strncpy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"Cyclone Windfield Simulator\00"
define i32 @Get_component_name(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @strncpy(i8* %5, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 2048)
ret i32 0
}

LLVM IR (-O2):
@.str = [28 x i8] c"Cyclone Windfield Simulator\00"
define i32 @Get_component_name(i8* nocapture readnone %0, i8* %1) {
%3 = tail call i32 @strncpy(i8* %1, i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 2048)
ret i32 0
}
/* Variables and functions */
int om2qu(double *, double *, int);
int qu2ax(double *, double *, int);
int om2ax(double *om, double *ax, int p) {
  double qu[4];
  int trash;
  trash = om2qu(om, qu, p);
  trash = qu2ax(qu, ax, p);
  return 1;
}


x86 assembly (clang, -O0):
<om2ax>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x40(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <om2qu@plt>
mov    %eax,-0x44(%rbp)
lea    -0x40(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1040 <qu2ax@plt>
mov    %eax,-0x44(%rbp)
mov    $0x1,%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<om2ax>:
push   %r15
push   %r14
push   %rbx
sub    $0x20,%rsp
mov    %edx,%ebx
mov    %rsi,%r14
mov    %rsp,%r15
mov    %r15,%rsi
call   1030 <om2qu@plt>
mov    %r15,%rdi
mov    %r14,%rsi
mov    %ebx,%edx
call   1040 <qu2ax@plt>
mov    $0x1,%eax
add    $0x20,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @om2ax(double* %0, double* %1, i32 %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca i32
%7 = alloca [4 x double]
%8 = alloca i32
store double* %0, double** %4
store double* %1, double** %5
store i32 %2, i32* %6
%9 = load double*, double** %4
%10 = getelementptr inbounds [4 x double], [4 x double]* %7, i64 0, i64 0
%11 = load i32, i32* %6
%12 = call i32 @om2qu(double* %9, double* %10, i32 %11)
store i32 %12, i32* %8
%13 = getelementptr inbounds [4 x double], [4 x double]* %7, i64 0, i64 0
%14 = load double*, double** %5
%15 = load i32, i32* %6
%16 = call i32 @qu2ax(double* %13, double* %14, i32 %15)
store i32 %16, i32* %8
ret i32 1
}

LLVM IR (-O2):
define i32 @om2ax(double* %0, double* %1, i32 %2) {
%4 = alloca [4 x double]
%5 = bitcast [4 x double]* %4 to i8*
%6 = getelementptr inbounds [4 x double], [4 x double]* %4, i64 0, i64 0
%7 = call i32 @om2qu(double* %0, double* %6, i32 %2)
%8 = call i32 @qu2ax(double* %6, double* %1, i32 %2)
ret i32 1
}
float *vec4_one(float *result) {
  result[0] = 1.0f;
  result[1] = 1.0f;
  result[2] = 1.0f;
  result[3] = 1.0f;
  return result;
}


x86 assembly (clang, -O0):
<vec4_one>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movss  0xeec(%rip),%xmm0
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
movss  0xedc(%rip),%xmm0
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
movss  0xecb(%rip),%xmm0
movss  %xmm0,0x8(%rax)
mov    -0x8(%rbp),%rax
movss  0xeba(%rip),%xmm0
movss  %xmm0,0xc(%rax)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vec4_one>:
mov    %rdi,%rax
movaps 0xef6(%rip),%xmm0
movups %xmm0,(%rdi)
ret

LLVM IR (-O0):
define float* @vec4_one(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
store float 1.000000e+00, float* %4
%5 = load float*, float** %2
%6 = getelementptr inbounds float, float* %5, i64 1
store float 1.000000e+00, float* %6
%7 = load float*, float** %2
%8 = getelementptr inbounds float, float* %7, i64 2
store float 1.000000e+00, float* %8
%9 = load float*, float** %2
%10 = getelementptr inbounds float, float* %9, i64 3
store float 1.000000e+00, float* %10
%11 = load float*, float** %2
ret float* %11
}

LLVM IR (-O2):
define float* @vec4_one(float* returned writeonly %0) {
%2 = bitcast float* %0 to <4 x float>*
store <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float>* %2
ret float* %0
}
long int factorielle(long int n) {
  long int f = 1;
  do {
    f = f * n;
    n = n - 1;
  } while (n > 1);
  return f;
}


x86 assembly (clang, -O0):
<factorielle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%rax
imul   -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x8(%rbp)
cmpq   $0x1,-0x8(%rbp)
jg     1110 <factorielle+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<factorielle>:
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
nop
imul   %rdi,%rax
lea    -0x1(%rdi),%rcx
cmp    $0x2,%rdi
mov    %rcx,%rdi
jg     1110 <factorielle+0x10>
ret

LLVM IR (-O0):
define i64 @factorielle(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 1, i64* %3
br label %4
4: ; preds = %10, %1
%5 = load i64, i64* %3
%6 = load i64, i64* %2
%7 = mul nsw i64 %5, %6
store i64 %7, i64* %3
%8 = load i64, i64* %2
%9 = sub nsw i64 %8, 1
store i64 %9, i64* %2
br label %10
10: ; preds = %4
%11 = load i64, i64* %2
%12 = icmp sgt i64 %11, 1
br i1 %12, label %4, label %13
13: ; preds = %10
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @factorielle(i64 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ %0, %1 ], [ %6, %2 ]
%4 = phi i64 [ 1, %1 ], [ %5, %2 ]
%5 = mul nsw i64 %4, %3
%6 = add nsw i64 %3, -1
%7 = icmp sgt i64 %3, 2
br i1 %7, label %2, label %8
8: ; preds = %2
ret i64 %5
}
void GPUgetScreenPic(unsigned char *pMem) {}


x86 assembly (clang, -O0):
<GPUgetScreenPic>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPUgetScreenPic>:
ret

LLVM IR (-O0):
define void @GPUgetScreenPic(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @GPUgetScreenPic(i8* nocapture %0) {
ret void
}
unsigned pin_to_bank_offset(unsigned pin) { return pin % 32; }


x86 assembly (clang, -O0):
<pin_to_bank_offset>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pin_to_bank_offset>:
mov    %edi,%eax
and    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @pin_to_bank_offset(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = urem i32 %3, 32
ret i32 %4
}

LLVM IR (-O2):
define i32 @pin_to_bank_offset(i32 %0) {
%2 = and i32 %0, 31
ret i32 %2
}
void pci_aer_clear_device_status(struct pci_dev *dev) {}


x86 assembly (clang, -O0):
<pci_aer_clear_device_status>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_aer_clear_device_status>:
ret

LLVM IR (-O0):
%struct.pci_dev = type opaque
define void @pci_aer_clear_device_status(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
store %struct.pci_dev* %0, %struct.pci_dev** %2
ret void
}

LLVM IR (-O2):
%struct.pci_dev = type opaque
define void @pci_aer_clear_device_status(%struct.pci_dev* nocapture %0) {
ret void
}
/* Variables and functions */
int flog_get_level();
int flog_is_info_enabled() { return 2 >= flog_get_level(); }


x86 assembly (clang, -O0):
<flog_is_info_enabled>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <flog_get_level@plt>
mov    %eax,%ecx
mov    $0x2,%eax
cmp    %ecx,%eax
setge  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flog_is_info_enabled>:
push   %rax
xor    %eax,%eax
call   1030 <flog_get_level@plt>
xor    %ecx,%ecx
cmp    $0x3,%eax
setl   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @flog_is_info_enabled() {
%1 = call i32 (...) @flog_get_level()
%2 = icmp sge i32 2, %1
%3 = zext i1 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @flog_is_info_enabled() {
%1 = tail call i32 (...) @flog_get_level()
%2 = icmp slt i32 %1, 3
%3 = zext i1 %2 to i32
ret i32 %3
}
char *langRomTypeExtRam48() { return "48kB External RAM"; }


x86 assembly (clang, -O0):
<langRomTypeExtRam48>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<langRomTypeExtRam48>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [18 x i8] c"48kB External RAM\00"
define i8* @langRomTypeExtRam48() {
ret i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [18 x i8] c"48kB External RAM\00"
define i8* @langRomTypeExtRam48() {
ret i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int strlen(char *);
int Lhash(char *name) {
  int len;
  char c;
  len = strlen(name);
  if (len > 0)
    c = name[len - 1];
  else
    c = 0;
  return (((len & ((1 << 4) - 1)) << 4) | (((int)c) & ((1 << 4) - 1)));
}


x86 assembly (clang, -O0):
<Lhash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    114a <Lhash+0x3a>
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0xd(%rbp)
jmp    114e <Lhash+0x3e>
movb   $0x0,-0xd(%rbp)
mov    -0xc(%rbp),%eax
and    $0xf,%eax
shl    $0x4,%eax
movsbl -0xd(%rbp),%ecx
and    $0xf,%ecx
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Lhash>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
test   %eax,%eax
jle    1129 <Lhash+0x19>
lea    -0x1(%rax),%ecx
movzbl (%rbx,%rcx,1),%ecx
and    $0xf,%ecx
jmp    112b <Lhash+0x1b>
xor    %ecx,%ecx
shl    $0x4,%eax
movzbl %al,%eax
or     %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @Lhash(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i8
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %1
%10 = load i8*, i8** %2
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %10, i64 %13
%15 = load i8, i8* %14
store i8 %15, i8* %4
br label %17
16: ; preds = %1
store i8 0, i8* %4
br label %17
17: ; preds = %16, %9
%18 = load i32, i32* %3
%19 = and i32 %18, 15
%20 = shl i32 %19, 4
%21 = load i8, i8* %4
%22 = sext i8 %21 to i32
%23 = and i32 %22, 15
%24 = or i32 %20, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @Lhash(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %11
4: ; preds = %1
%5 = add nsw i32 %2, -1
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = and i8 %8, 15
%10 = zext i8 %9 to i32
br label %11
11: ; preds = %1, %4
%12 = phi i32 [ %10, %4 ], [ 0, %1 ]
%13 = shl i32 %2, 4
%14 = and i32 %13, 240
%15 = or i32 %12, %14
ret i32 %15
}
/* Type definitions */
struct Cyc_Absyn_Exp {
  int dummy;
};

/* Variables and functions */
struct Cyc_Absyn_Exp *Cyc_Tcutil_deep_copy_exp(int, struct Cyc_Absyn_Exp *);
struct Cyc_Absyn_Exp *Cyc_Tcutil_deep_copy_exp_opt(int preserve_types,
                                                   struct Cyc_Absyn_Exp *e) {
  struct Cyc_Absyn_Exp *_T0;
  if (e != 0)
    goto _TL73;
  _T0 = 0;
  goto _TL74;
_TL73:
  _T0 = Cyc_Tcutil_deep_copy_exp(preserve_types, e);
_TL74:
  return _T0;
}


x86 assembly (clang, -O0):
<Cyc_Tcutil_deep_copy_exp_opt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     112f <Cyc_Tcutil_deep_copy_exp_opt+0x1f>
jmp    113c <Cyc_Tcutil_deep_copy_exp_opt+0x2c>
movq   $0x0,-0x18(%rbp)
jmp    114c <Cyc_Tcutil_deep_copy_exp_opt+0x3c>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <Cyc_Tcutil_deep_copy_exp@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Cyc_Tcutil_deep_copy_exp_opt>:
test   %rsi,%rsi
je     111a <Cyc_Tcutil_deep_copy_exp_opt+0xa>
jmp    1030 <Cyc_Tcutil_deep_copy_exp@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.Cyc_Absyn_Exp = type { i32 }
define %struct.Cyc_Absyn_Exp* @Cyc_Tcutil_deep_copy_exp_opt(i32 %0, %struct.Cyc_Absyn_Exp* %1) {
%3 = alloca i32
%4 = alloca %struct.Cyc_Absyn_Exp*
%5 = alloca %struct.Cyc_Absyn_Exp*
store i32 %0, i32* %3
store %struct.Cyc_Absyn_Exp* %1, %struct.Cyc_Absyn_Exp** %4
%6 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %4
%7 = icmp ne %struct.Cyc_Absyn_Exp* %6, null
br i1 %7, label %8, label %9
8: ; preds = %2
br label %10
9: ; preds = %2
store %struct.Cyc_Absyn_Exp* null, %struct.Cyc_Absyn_Exp** %5
br label %14
10: ; preds = %8
%11 = load i32, i32* %3
%12 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %4
%13 = call %struct.Cyc_Absyn_Exp* @Cyc_Tcutil_deep_copy_exp(i32 %11, %struct.Cyc_Absyn_Exp* %12)
store %struct.Cyc_Absyn_Exp* %13, %struct.Cyc_Absyn_Exp** %5
br label %14
14: ; preds = %10, %9
%15 = load %struct.Cyc_Absyn_Exp*, %struct.Cyc_Absyn_Exp** %5
ret %struct.Cyc_Absyn_Exp* %15
}

LLVM IR (-O2):
%struct.Cyc_Absyn_Exp = type { i32 }
define %struct.Cyc_Absyn_Exp* @Cyc_Tcutil_deep_copy_exp_opt(i32 %0, %struct.Cyc_Absyn_Exp* %1) {
%3 = icmp eq %struct.Cyc_Absyn_Exp* %1, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call %struct.Cyc_Absyn_Exp* @Cyc_Tcutil_deep_copy_exp(i32 %0, %struct.Cyc_Absyn_Exp* %1)
br label %6
6: ; preds = %2, %4
%7 = phi %struct.Cyc_Absyn_Exp* [ %5, %4 ], [ null, %2 ]
ret %struct.Cyc_Absyn_Exp* %7
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ summary();
void exit_handler(int type) {
  summary();
  exit(0);
}


x86 assembly (clang, -O0):
<exit_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <summary@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<exit_handler>:
push   %rax
xor    %eax,%eax
call   1030 <summary@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @exit_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @summary()
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @exit_handler(i32 %0) {
%2 = tail call i32 (...) @summary()
%3 = tail call i32 @exit(i32 0)
unreachable
}
int qsort_desc_ivector(const void *a, const void *b) {
  return (*(int *)b - *(int *)a);
}


x86 assembly (clang, -O0):
<qsort_desc_ivector>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
mov    -0x8(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qsort_desc_ivector>:
mov    (%rsi),%eax
sub    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @qsort_desc_ivector(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %3
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @qsort_desc_ivector(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %1 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %0 to i32*
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
ret i32 %7
}
double calcTransitionRate(double **P) {
  double a;
  a = P[0][2] + P[2][0] + P[1][3] + P[3][1];
  return (a);
}


x86 assembly (clang, -O0):
<calcTransitionRate>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movsd  0x10(%rax),%xmm0
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rax
addsd  (%rax),%xmm0
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
addsd  0x18(%rax),%xmm0
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%rax
addsd  0x8(%rax),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<calcTransitionRate>:
mov    (%rdi),%rax
mov    0x8(%rdi),%rcx
movsd  0x10(%rax),%xmm0
mov    0x10(%rdi),%rax
addsd  (%rax),%xmm0
addsd  0x18(%rcx),%xmm0
mov    0x18(%rdi),%rax
addsd  0x8(%rax),%xmm0
ret

LLVM IR (-O0):
define double @calcTransitionRate(double** %0) {
%2 = alloca double**
%3 = alloca double
store double** %0, double*** %2
%4 = load double**, double*** %2
%5 = getelementptr inbounds double*, double** %4, i64 0
%6 = load double*, double** %5
%7 = getelementptr inbounds double, double* %6, i64 2
%8 = load double, double* %7
%9 = load double**, double*** %2
%10 = getelementptr inbounds double*, double** %9, i64 2
%11 = load double*, double** %10
%12 = getelementptr inbounds double, double* %11, i64 0
%13 = load double, double* %12
%14 = fadd double %8, %13
%15 = load double**, double*** %2
%16 = getelementptr inbounds double*, double** %15, i64 1
%17 = load double*, double** %16
%18 = getelementptr inbounds double, double* %17, i64 3
%19 = load double, double* %18
%20 = fadd double %14, %19
%21 = load double**, double*** %2
%22 = getelementptr inbounds double*, double** %21, i64 3
%23 = load double*, double** %22
%24 = getelementptr inbounds double, double* %23, i64 1
%25 = load double, double* %24
%26 = fadd double %20, %25
store double %26, double* %3
%27 = load double, double* %3
ret double %27
}

LLVM IR (-O2):
define double @calcTransitionRate(double** nocapture %0) {
%2 = load double*, double** %0
%3 = getelementptr inbounds double, double* %2, i64 2
%4 = load double, double* %3
%5 = getelementptr inbounds double*, double** %0, i64 2
%6 = load double*, double** %5
%7 = load double, double* %6
%8 = fadd double %4, %7
%9 = getelementptr inbounds double*, double** %0, i64 1
%10 = load double*, double** %9
%11 = getelementptr inbounds double, double* %10, i64 3
%12 = load double, double* %11
%13 = fadd double %8, %12
%14 = getelementptr inbounds double*, double** %0, i64 3
%15 = load double*, double** %14
%16 = getelementptr inbounds double, double* %15, i64 1
%17 = load double, double* %16
%18 = fadd double %13, %17
ret double %18
}
int cmake_plus_one_c_asm(int *arg) {
  int value = 0;
  asm volatile("    movl (%1), %0\n"
               "    inc %0\n"
               "    jmp 1f\n"
               "    retq\n"
               "1:\n"
               : "=r"(value)
               : "r"(arg));
  return value;
}


x86 assembly (clang, -O0):
<cmake_plus_one_c_asm>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
inc    %eax
jmp    111d <cmake_plus_one_c_asm+0x1d>
ret
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmake_plus_one_c_asm>:
mov    (%rdi),%eax
inc    %eax
jmp    1107 <cmake_plus_one_c_asm+0x7>
ret
ret

LLVM IR (-O0):
define i32 @cmake_plus_one_c_asm(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
%4 = load i32*, i32** %2
%5 = call i32 asm sideeffect " movl ($1), $0\0A inc $0\0A jmp 1f\0A retq\0A1:\0A", "=r,r,~{dirflag},~{fpsr},~{flags}"(i32* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @cmake_plus_one_c_asm(i32* %0) {
%2 = tail call i32 asm sideeffect " movl ($1), $0\0A inc $0\0A jmp 1f\0A retq\0A1:\0A", "=r,r,~{dirflag},~{fpsr},~{flags}"(i32* %0)
ret i32 %2
}
/* Type definitions */
struct itimerval {
  int dummy;
};

/* Variables and functions */
int __infer_nondet_int();
int setitimer(int which, const struct itimerval *__restrict value,
              struct itimerval *__restrict ovalue) {
  int n;
  int tmp;
  n = __infer_nondet_int();
  tmp = __infer_nondet_int();
  which = tmp;
  if (n > 0)
    return 0;
  else
    return -1;
}


x86 assembly (clang, -O0):
<setitimer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
mov    %eax,-0x1c(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_int@plt>
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jle    1153 <setitimer+0x43>
movl   $0x0,-0x4(%rbp)
jmp    115a <setitimer+0x4a>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setitimer>:
push   %rbx
xor    %eax,%eax
call   1030 <__infer_nondet_int@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1030 <__infer_nondet_int@plt>
xor    %eax,%eax
test   %ebx,%ebx
setle  %al
neg    %eax
pop    %rbx
ret

LLVM IR (-O0):
%struct.itimerval = type { i32 }
define i32 @setitimer(i32 %0, %struct.itimerval* noalias %1, %struct.itimerval* noalias %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca %struct.itimerval*
%7 = alloca %struct.itimerval*
%8 = alloca i32
%9 = alloca i32
store i32 %0, i32* %5
store %struct.itimerval* %1, %struct.itimerval** %6
store %struct.itimerval* %2, %struct.itimerval** %7
%10 = call i32 (...) @__infer_nondet_int()
store i32 %10, i32* %8
%11 = call i32 (...) @__infer_nondet_int()
store i32 %11, i32* %9
%12 = load i32, i32* %9
store i32 %12, i32* %5
%13 = load i32, i32* %8
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %3
store i32 0, i32* %4
br label %17
16: ; preds = %3
store i32 -1, i32* %4
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
%struct.itimerval = type { i32 }
define i32 @setitimer(i32 %0, %struct.itimerval* noalias nocapture readnone %1, %struct.itimerval* noalias nocapture readnone %2) {
%4 = tail call i32 (...) @__infer_nondet_int()
%5 = tail call i32 (...) @__infer_nondet_int()
%6 = icmp slt i32 %4, 1
%7 = sext i1 %6 to i32
ret i32 %7
}
signed precise_fraction_sred(signed v) { return v >> 16; }


x86 assembly (clang, -O0):
<precise_fraction_sred>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x10,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<precise_fraction_sred>:
mov    %edi,%eax
sar    $0x10,%eax
ret

LLVM IR (-O0):
define i32 @precise_fraction_sred(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 16
ret i32 %4
}

LLVM IR (-O2):
define i32 @precise_fraction_sred(i32 %0) {
%2 = ashr i32 %0, 16
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void twopence_strfree(char **sp) {
  if (*sp != NULL) {
    free(*sp);
    *sp = NULL;
  }
}


x86 assembly (clang, -O0):
<twopence_strfree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpq   $0x0,(%rax)
je     1141 <twopence_strfree+0x31>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<twopence_strfree>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1128 <twopence_strfree+0x18>
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @twopence_strfree(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = icmp ne i8* %4, null
br i1 %5, label %6, label %11
6: ; preds = %1
%7 = load i8**, i8*** %2
%8 = load i8*, i8** %7
%9 = call i32 @free(i8* %8)
%10 = load i8**, i8*** %2
store i8* null, i8** %10
br label %11
11: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @twopence_strfree(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @free(i8* %2)
store i8* null, i8** %0
br label %6
6: ; preds = %4, %1
ret void
}
/* Type definitions */
struct mallinfo {
  int dummy;
};
struct _reent {
  int dummy;
};

/* Variables and functions */
struct mallinfo mallinfo();
struct mallinfo _mallinfo_r(struct _reent *ptr) {
  return mallinfo();
}


x86 assembly (clang, -O0):
<_mallinfo_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <mallinfo@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mallinfo_r>:
xor    %eax,%eax
jmp    1030 <mallinfo@plt>

LLVM IR (-O0):
%struct._reent = type { i32 }
%struct.mallinfo = type { i32 }
define i32 @_mallinfo_r(%struct._reent* %0) {
%2 = alloca %struct.mallinfo
%3 = alloca %struct._reent*
store %struct._reent* %0, %struct._reent** %3
%4 = call i32 (...) @mallinfo()
%5 = getelementptr inbounds %struct.mallinfo, %struct.mallinfo* %2, i32 0, i32 0
store i32 %4, i32* %5
%6 = getelementptr inbounds %struct.mallinfo, %struct.mallinfo* %2, i32 0, i32 0
%7 = load i32, i32* %6
ret i32 %7
}

LLVM IR (-O2):
%struct._reent = type { i32 }
define i32 @_mallinfo_r(%struct._reent* nocapture readnone %0) {
%2 = tail call i32 (...) @mallinfo()
ret i32 %2
}