xunge/DecIR huggingface dataset:
void av_audio_fifo_drain() {}


x86 assembly (clang, -O0):
<av_audio_fifo_drain>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_audio_fifo_drain>:
ret

LLVM IR (-O0):
define void @av_audio_fifo_drain() {
ret void
}

LLVM IR (-O2):
define void @av_audio_fifo_drain() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ esc(char *);
decswl() { esc("#5"); }


x86 assembly (clang, -O0):
<decswl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <esc@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decswl>:
lea    0xee9(%rip),%rdi
jmp    1030 <esc@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"\00"
define i32 @decswl() {
%1 = alloca i32
%2 = call i32 @esc(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [3 x i8] c"\00"
define i32 @decswl() {
%1 = tail call i32 @esc(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
main(argc, argv) int argc;
char *argv[];
{
  int i;
  for (i = 0; i < 100; i++)
    printf("Testing SaveLines: This line number is %d \n", i);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x64,-0x14(%rbp)
jge    1156 <main+0x46>
mov    -0x14(%rbp),%esi
lea    0xebf(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    112d <main+0x1d>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbp
push   %rbx
push   %rax
lea    0xee6(%rip),%rbx
xor    %ebp,%ebp
nopl   0x0(%rax)
mov    %rbx,%rdi
mov    %ebp,%esi
xor    %eax,%eax
call   1030 <printf@plt>
add    $0x1,%ebp
cmp    $0x64,%ebp
jne    1120 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [44 x i8] c"Testing SaveLines: This line number is %d \0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
br label %7
7: ; preds = %13, %2
%8 = load i32, i32* %6
%9 = icmp slt i32 %8, 100
br i1 %9, label %10, label %16
10: ; preds = %7
%11 = load i32, i32* %6
%12 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 %11)
br label %13
13: ; preds = %10
%14 = load i32, i32* %6
%15 = add nsw i32 %14, 1
store i32 %15, i32* %6
br label %7
16: ; preds = %7
%17 = load i32, i32* %3
ret i32 %17
}

LLVM IR (-O2):
@.str = [44 x i8] c"Testing SaveLines: This line number is %d \0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
br label %3
3: ; preds = %2, %3
%4 = phi i32 [ 0, %2 ], [ %6, %3 ]
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([44 x i8], [44 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = add nuw nsw i32 %4, 1
%7 = icmp eq i32 %6, 100
br i1 %7, label %8, label %3
8: ; preds = %3
ret i32 0
}
int intcmp(void *v1, void *v2) {
  int *i1 = (int *)v1;
  int *i2 = (int *)v2;
  return (*i1) - (*i2);
}


x86 assembly (clang, -O0):
<intcmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    -0x20(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<intcmp>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @intcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to i32*
store i32* %8, i32** %5
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %5
%12 = load i32, i32* %11
%13 = load i32*, i32** %6
%14 = load i32, i32* %13
%15 = sub nsw i32 %12, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @intcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = bitcast i8* %1 to i32*
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}
void psp_video_debug_message(char *format, ...) {}


x86 assembly (clang, -O0):
<psp_video_debug_message>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<psp_video_debug_message>:
ret

LLVM IR (-O0):
define void @psp_video_debug_message(i8* %0, ...) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @psp_video_debug_message(i8* nocapture %0, ...) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ int16_t;

/* Variables and functions */
int16_t ltoh_16(int16_t littleval) { return littleval; }


x86 assembly (clang, -O0):
<ltoh_16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltoh_16>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @ltoh_16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @ltoh_16(i32 returned %0) {
ret i32 %0
}
int gcd(int a, int b) {
  int temp;
  while (b != 0) {
    temp = b;
    b = a % b;
    a = temp;
  }
  return a;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     112f <gcd+0x2f>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
cltd
idivl  -0x8(%rbp)
mov    %edx,-0x8(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110a <gcd+0xa>
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
mov    %edi,%eax
test   %esi,%esi
je     111d <gcd+0x1d>
mov    %esi,%edx
nopl   0x0(%rax,%rax,1)
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <gcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %9, %2
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %15
9: ; preds = %6
%10 = load i32, i32* %4
store i32 %10, i32* %5
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = srem i32 %11, %12
store i32 %13, i32* %4
%14 = load i32, i32* %5
store i32 %14, i32* %3
br label %6
15: ; preds = %6
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %9, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %6, %4 ], [ %0, %2 ]
%6 = phi i32 [ %7, %4 ], [ %1, %2 ]
%7 = srem i32 %5, %6
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %4
9: ; preds = %4, %2
%10 = phi i32 [ %0, %2 ], [ %6, %4 ]
ret i32 %10
}
int c082(void) { return 0; }


x86 assembly (clang, -O0):
<c082>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<c082>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @c082() {
ret i32 0
}

LLVM IR (-O2):
define i32 @c082() {
ret i32 0
}
/* Variables and functions */
float __nv_cbrtf(float);
float cbrtf(float __a) { return __nv_cbrtf(__a); }


x86 assembly (clang, -O0):
<cbrtf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <__nv_cbrtf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cbrtf>:
jmp    1030 <__nv_cbrtf@plt>

LLVM IR (-O0):
define float @cbrtf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @__nv_cbrtf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @cbrtf(float %0) {
%2 = tail call float @__nv_cbrtf(float %0)
ret float %2
}
const char *ccnxPortalAbout_About(void) {
  return "CCNx Portal API "
         "1.0.20160105.eedfc5903509513a0a5cee650d84b33655ad358c "
         "2016-01-20T19:03:45.777531\nCopyright (c) 2016, Xerox Corporation "
         "(Xerox)and Palo Alto Research Center (PARC)\nAll rights reserved.\n";
}


x86 assembly (clang, -O0):
<ccnxPortalAbout_About>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ccnxPortalAbout_About>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [201 x i8] c"CCNx Portal API 1.0.20160105.eedfc5903509513a0a5cee650d84b33655ad358c 2016-01-20T19:03:45.777531\0ACopyright (c) 2016, Xerox Corporation (Xerox)and Palo Alto Research Center (PARC)\0AAll rights reserved.\0A\00"
define i8* @ccnxPortalAbout_About() {
ret i8* getelementptr inbounds ([201 x i8], [201 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [201 x i8] c"CCNx Portal API 1.0.20160105.eedfc5903509513a0a5cee650d84b33655ad358c 2016-01-20T19:03:45.777531\0ACopyright (c) 2016, Xerox Corporation (Xerox)and Palo Alto Research Center (PARC)\0AAll rights reserved.\0A\00"
define i8* @ccnxPortalAbout_About() {
ret i8* getelementptr inbounds ([201 x i8], [201 x i8]* @.str, i64 0, i64 0)
}
double dtor(deg)
double deg;
{ return (deg * 3.14159265358979323846 / 180); }


x86 assembly (clang, -O0):
<dtor>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  0xee2(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dtor>:
mulsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @dtor(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 0x400921FB54442D18
%5 = fdiv double %4, 1.800000e+02
ret double %5
}

LLVM IR (-O2):
define double @dtor(double %0) {
%2 = fmul double %0, 0x400921FB54442D18
%3 = fdiv double %2, 1.800000e+02
ret double %3
}
unsigned short htons(unsigned short x) {
  return ((((x & 0x000000ffU) << 8) | ((x & 0x0000ff00U) >> 8)));
}


x86 assembly (clang, -O0):
<htons>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
and    $0xff,%eax
shl    $0x8,%eax
movzwl -0x2(%rbp),%ecx
and    $0xff00,%ecx
shr    $0x8,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htons>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @htons(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = and i32 %4, 255
%6 = shl i32 %5, 8
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = and i32 %8, 65280
%10 = lshr i32 %9, 8
%11 = or i32 %6, %10
%12 = trunc i32 %11 to i16
ret i16 %12
}

LLVM IR (-O2):
define zeroext i16 @htons(i16 zeroext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
int lcd_getnextcharacterpos(char *str, int curpos) {
  curpos++;
  while ((str[curpos] & '\xC0') == '\x80')
    curpos++;
  if (str[curpos] == '\0')
    curpos = 0;
  return curpos;
}


x86 assembly (clang, -O0):
<lcd_getnextcharacterpos>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
and    $0xffffffc0,%eax
cmp    $0xffffff80,%eax
jne    113a <lcd_getnextcharacterpos+0x3a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1114 <lcd_getnextcharacterpos+0x14>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
jne    1156 <lcd_getnextcharacterpos+0x56>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcd_getnextcharacterpos>:
mov    %esi,%eax
movslq %esi,%rcx
add    %rdi,%rcx
add    $0x1,%rcx
nopl   0x0(%rax)
movzbl (%rcx),%esi
mov    %esi,%edx
and    $0xc0,%dl
add    $0x1,%eax
add    $0x1,%rcx
cmp    $0x80,%dl
je     1110 <lcd_getnextcharacterpos+0x10>
xor    %ecx,%ecx
test   %sil,%sil
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @lcd_getnextcharacterpos(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = add nsw i32 %5, 1
store i32 %6, i32* %4
br label %7
7: ; preds = %16, %2
%8 = load i8*, i8** %3
%9 = load i32, i32* %4
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = and i32 %13, -64
%15 = icmp eq i32 %14, -128
br i1 %15, label %16, label %19
16: ; preds = %7
%17 = load i32, i32* %4
%18 = add nsw i32 %17, 1
store i32 %18, i32* %4
br label %7
19: ; preds = %7
%20 = load i8*, i8** %3
%21 = load i32, i32* %4
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
%24 = load i8, i8* %23
%25 = sext i8 %24 to i32
%26 = icmp eq i32 %25, 0
br i1 %26, label %27, label %28
27: ; preds = %19
store i32 0, i32* %4
br label %28
28: ; preds = %27, %19
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @lcd_getnextcharacterpos(i8* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
br label %4
4: ; preds = %4, %2
%5 = phi i64 [ %6, %4 ], [ %3, %2 ]
%6 = add nsw i64 %5, 1
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = and i8 %8, -64
%10 = icmp eq i8 %9, -128
br i1 %10, label %4, label %11
11: ; preds = %4
%12 = trunc i64 %6 to i32
%13 = icmp eq i8 %8, 0
%14 = select i1 %13, i32 0, i32 %12
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ FibonacciList(int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("List of first %d fibonacci numbers\n", 100);
  FibonacciList(100);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
mov    $0x64,%esi
call   1030 <printf@plt>
mov    $0x64,%edi
call   1040 <FibonacciList@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
mov    $0x64,%esi
call   1030 <printf@plt>
mov    $0x64,%edi
call   1040 <FibonacciList@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"List of first %d fibonacci numbers\0A\00"
define i32 @main() {
%1 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 100)
%2 = call i32 @FibonacciList(i32 100)
ret i32 0
}

LLVM IR (-O2):
@.str = [36 x i8] c"List of first %d fibonacci numbers\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 100)
%2 = tail call i32 @FibonacciList(i32 100)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, ...);
int main() {
  int v1;
  int v2;
  int vsum;
  int all_in_one = 5;
  v1 = 1;
  v2 = 2;
  vsum = v1 + v2;
  printf("The sum of %i and %i is %i\n", v1, v2, vsum);
  printf("all_in_one => %i \n", all_in_one);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x14(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
lea    0xeb3(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%esi
lea    0xebe(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
mov    $0x2,%edx
mov    $0x3,%ecx
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xee7(%rip),%rdi
mov    $0x5,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [28 x i8] c"The sum of %i and %i is %i\0A\00"
@.str.1 = [19 x i8] c"all_in_one => %i \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32 5, i32* %5
store i32 1, i32* %2
store i32 2, i32* %3
%6 = load i32, i32* %2
%7 = load i32, i32* %3
%8 = add nsw i32 %6, %7
store i32 %8, i32* %4
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 %9, i32 %10, i32 %11)
%13 = load i32, i32* %5
%14 = call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), i32 %13)
ret i32 0
}

LLVM IR (-O2):
@.str = [28 x i8] c"The sum of %i and %i is %i\0A\00"
@.str.1 = [19 x i8] c"all_in_one => %i \0A\00"
define i32 @main() {
%1 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0), i32 1, i32 2, i32 3)
%2 = tail call i32 (i8*, i32, ...) @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str.1, i64 0, i64 0), i32 5)
ret i32 0
}
/* Type definitions */
struct sspm_buffer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, char);
int /*<<< orphan*/ sspm_append_string(struct sspm_buffer *, char *);
void sspm_append_hex(struct sspm_buffer *buf, char ch) {
  char tmp[3];
  sprintf(tmp, "=%02X", ch);
  sspm_append_string(buf, tmp);
}


x86 assembly (clang, -O0):
<sspm_append_hex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
lea    -0xc(%rbp),%rdi
lea    0xec3(%rip),%rsi
movsbl -0x9(%rbp),%edx
call   1040 <sprintf@plt>
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1030 <sspm_append_string@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sspm_append_hex>:
push   %r14
push   %rbx
push   %rax
mov    %esi,%edx
mov    %rdi,%rbx
lea    0xed0(%rip),%rsi
lea    0x5(%rsp),%r14
mov    %r14,%rdi
call   1040 <sprintf@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1030 <sspm_append_string@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.sspm_buffer = type { i32 }
@.str = [6 x i8] c"=%02X\00"
define void @sspm_append_hex(%struct.sspm_buffer* %0, i8 signext %1) {
%3 = alloca %struct.sspm_buffer*
%4 = alloca i8
%5 = alloca [3 x i8]
store %struct.sspm_buffer* %0, %struct.sspm_buffer** %3
store i8 %1, i8* %4
%6 = getelementptr inbounds [3 x i8], [3 x i8]* %5, i64 0, i64 0
%7 = load i8, i8* %4
%8 = call i32 @sprintf(i8* %6, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8 signext %7)
%9 = load %struct.sspm_buffer*, %struct.sspm_buffer** %3
%10 = getelementptr inbounds [3 x i8], [3 x i8]* %5, i64 0, i64 0
%11 = call i32 @sspm_append_string(%struct.sspm_buffer* %9, i8* %10)
ret void
}

LLVM IR (-O2):
%struct.sspm_buffer = type { i32 }
@.str = [6 x i8] c"=%02X\00"
define void @sspm_append_hex(%struct.sspm_buffer* %0, i8 signext %1) {
%3 = alloca [3 x i8]
%4 = getelementptr inbounds [3 x i8], [3 x i8]* %3, i64 0, i64 0
%5 = call i32 @sprintf(i8* %4, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8 signext %1)
%6 = call i32 @sspm_append_string(%struct.sspm_buffer* %0, i8* %4)
ret void
}
/* Type definitions */
struct hsearch_data {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ hdestroy_r(struct hsearch_data *);
void aud_destroy_demuxer_table(struct hsearch_data *htab) { hdestroy_r(htab); }


x86 assembly (clang, -O0):
<aud_destroy_demuxer_table>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <hdestroy_r@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aud_destroy_demuxer_table>:
jmp    1030 <hdestroy_r@plt>

LLVM IR (-O0):
%struct.hsearch_data = type { i32 }
define void @aud_destroy_demuxer_table(%struct.hsearch_data* %0) {
%2 = alloca %struct.hsearch_data*
store %struct.hsearch_data* %0, %struct.hsearch_data** %2
%3 = load %struct.hsearch_data*, %struct.hsearch_data** %2
%4 = call i32 @hdestroy_r(%struct.hsearch_data* %3)
ret void
}

LLVM IR (-O2):
%struct.hsearch_data = type { i32 }
define void @aud_destroy_demuxer_table(%struct.hsearch_data* %0) {
%2 = tail call i32 @hdestroy_r(%struct.hsearch_data* %0)
ret void
}
void gtk_widget_set_no_show_all() {}


x86 assembly (clang, -O0):
<gtk_widget_set_no_show_all>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_widget_set_no_show_all>:
ret

LLVM IR (-O0):
define void @gtk_widget_set_no_show_all() {
ret void
}

LLVM IR (-O2):
define void @gtk_widget_set_no_show_all() {
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int read_quaddobl_target_Laurent_system(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(769, a, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<read_quaddobl_target_Laurent_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x301,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_quaddobl_target_Laurent_system>:
mov    $0x301,%edi
xor    %r8d,%r8d
jmp    1030 <_ada_use_c2phc4c@plt>

LLVM IR (-O0):
define i32 @read_quaddobl_target_Laurent_system() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc4c(i32 769, i32* %5, i32* %6, double* %7, i32 0)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @read_quaddobl_target_Laurent_system() {
%1 = tail call i32 @_ada_use_c2phc4c(i32 769, i32* undef, i32* undef, double* undef, i32 0)
ret i32 %1
}
void RandomFunc(unsigned short input[1], unsigned short output[1]) {
  unsigned short state[1];
  unsigned short local1;
  {
    state[0UL] = (input[0UL] & 914778474UL) << (unsigned short)7;
    local1 = 0UL;
    while (local1 < 1UL) {
      state[0UL] &= state[local1];
      local1++;
    }
    output[0UL] = state[0UL] ^ 912013688UL;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
and    $0x3686696a,%rax
shl    $0x7,%rax
mov    %ax,-0x12(%rbp)
movw   $0x0,-0x14(%rbp)
movzwl -0x14(%rbp),%eax
cmp    $0x1,%rax
jae    1159 <RandomFunc+0x59>
movzwl -0x14(%rbp),%eax
movzwl -0x12(%rbp,%rax,2),%ecx
movzwl -0x12(%rbp),%eax
and    %ecx,%eax
mov    %ax,-0x12(%rbp)
mov    -0x14(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x14(%rbp)
jmp    1127 <RandomFunc+0x27>
movzwl -0x12(%rbp),%eax
xor    $0x365c3978,%rax
mov    %ax,%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
movzwl (%rdi),%eax
shl    $0x7,%eax
and    $0xffffb500,%eax
xor    $0x3978,%eax
mov    %ax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i16* %0, i16* %1) {
%3 = alloca i16*
%4 = alloca i16*
%5 = alloca [1 x i16]
%6 = alloca i16
store i16* %0, i16** %3
store i16* %1, i16** %4
%7 = load i16*, i16** %3
%8 = getelementptr inbounds i16, i16* %7, i64 0
%9 = load i16, i16* %8
%10 = zext i16 %9 to i64
%11 = and i64 %10, 914778474
%12 = shl i64 %11, 7
%13 = trunc i64 %12 to i16
%14 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
store i16 %13, i16* %14
store i16 0, i16* %6
br label %15
15: ; preds = %19, %2
%16 = load i16, i16* %6
%17 = zext i16 %16 to i64
%18 = icmp ult i64 %17, 1
br i1 %18, label %19, label %32
19: ; preds = %15
%20 = load i16, i16* %6
%21 = zext i16 %20 to i64
%22 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 %21
%23 = load i16, i16* %22
%24 = zext i16 %23 to i32
%25 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
%26 = load i16, i16* %25
%27 = zext i16 %26 to i32
%28 = and i32 %27, %24
%29 = trunc i32 %28 to i16
store i16 %29, i16* %25
%30 = load i16, i16* %6
%31 = add i16 %30, 1
store i16 %31, i16* %6
br label %15
32: ; preds = %15
%33 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
%34 = load i16, i16* %33
%35 = zext i16 %34 to i64
%36 = xor i64 %35, 912013688
%37 = trunc i64 %36 to i16
%38 = load i16*, i16** %4
%39 = getelementptr inbounds i16, i16* %38, i64 0
store i16 %37, i16* %39
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i16* nocapture %0, i16* nocapture writeonly %1) {
%3 = load i16, i16* %0
%4 = shl i16 %3, 7
%5 = and i16 %4, -19200
%6 = xor i16 %5, 14712
store i16 %6, i16* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Msp430TimerCapComP__5__Control__enableEvents();
void Msp430AlarmC__1__Msp430TimerControl__enableEvents(void) {
  Msp430TimerCapComP__5__Control__enableEvents();
}


x86 assembly (clang, -O0):
<Msp430AlarmC__1__Msp430TimerControl__enableEvents>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Msp430TimerCapComP__5__Control__enableEvents@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430AlarmC__1__Msp430TimerControl__enableEvents>:
xor    %eax,%eax
jmp    1030 <Msp430TimerCapComP__5__Control__enableEvents@plt>

LLVM IR (-O0):
define void @Msp430AlarmC__1__Msp430TimerControl__enableEvents() {
%1 = call i32 (...) @Msp430TimerCapComP__5__Control__enableEvents()
ret void
}

LLVM IR (-O2):
define void @Msp430AlarmC__1__Msp430TimerControl__enableEvents() {
%1 = tail call i32 (...) @Msp430TimerCapComP__5__Control__enableEvents()
ret void
}
void suspend_unblock_sleep(void) {}


x86 assembly (clang, -O0):
<suspend_unblock_sleep>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<suspend_unblock_sleep>:
ret

LLVM IR (-O0):
define void @suspend_unblock_sleep() {
ret void
}

LLVM IR (-O2):
define void @suspend_unblock_sleep() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ F_OK;
scalar_t__ access(char const *, int /*<<< orphan*/);
int havepid(const char *filename) {
  if (access(filename, F_OK) < 0)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<havepid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
cmp    $0x0,%rax
jge    1144 <havepid+0x34>
movl   $0xffffffff,-0x4(%rbp)
jmp    114b <havepid+0x3b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<havepid>:
push   %rax
mov    0x2ec0(%rip),%rax
mov    (%rax),%esi
call   1030 <access@plt>
sar    $0x3f,%rax
pop    %rcx
ret

LLVM IR (-O0):
@F_OK = global i32 0
define i32 @havepid(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = load i32, i32* @F_OK
%6 = call i64 @access(i8* %4, i32 %5)
%7 = icmp slt i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@F_OK = global i32 0
define i32 @havepid(i8* nocapture %0) {
%2 = load i32, i32* @F_OK
%3 = tail call i64 @access(i8* %0, i32 %2)
%4 = ashr i64 %3, 63
%5 = trunc i64 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void glk_exit() { exit(0); }


x86 assembly (clang, -O0):
<glk_exit>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<glk_exit>:
push   %rax
xor    %edi,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @glk_exit() {
%1 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define void @glk_exit() {
%1 = tail call i32 @exit(i32 0)
unreachable
}
double fpu_fchs(double a) {
  double b;
  b = -a;
  return b;
}


x86 assembly (clang, -O0):
<fpu_fchs>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movq   %xmm0,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fpu_fchs>:
xorps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define double @fpu_fchs(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fneg double %4
store double %5, double* %3
%6 = load double, double* %3
ret double %6
}

LLVM IR (-O2):
define double @fpu_fchs(double %0) {
%2 = fneg double %0
ret double %2
}
/* Variables and functions */
int random();
int rand_int(int n) { return (int)(random() % n); }


x86 assembly (clang, -O0):
<rand_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <random@plt>
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rand_int>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <random@plt>
cltd
idiv   %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @rand_int(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @random()
%4 = load i32, i32* %2
%5 = srem i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @rand_int(i32 %0) {
%2 = tail call i32 (...) @random()
%3 = srem i32 %2, %0
ret i32 %3
}
/* Variables and functions */
float fract(double);
double sin(float);
float Hash(float n) { return fract(sin(n) * 43758.5453123); }


x86 assembly (clang, -O0):
<Hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1040 <sin@plt>
movsd  0xec1(%rip),%xmm1
mulsd  %xmm1,%xmm0
call   1030 <fract@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Hash>:
push   %rax
call   1040 <sin@plt>
mulsd  0xed2(%rip),%xmm0
pop    %rax
jmp    1030 <fract@plt>

LLVM IR (-O0):
define float @Hash(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call double @sin(float %3)
%5 = fmul double %4, 0x40E55DD17332C7D3
%6 = call float @fract(double %5)
ret float %6
}

LLVM IR (-O2):
define float @Hash(float %0) {
%2 = tail call double @sin(float %0)
%3 = fmul double %2, 0x40E55DD17332C7D3
%4 = tail call float @fract(double %3)
ret float %4
}
void unregister_usblog_proc(void) {}


x86 assembly (clang, -O0):
<unregister_usblog_proc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unregister_usblog_proc>:
ret

LLVM IR (-O0):
define void @unregister_usblog_proc() {
ret void
}

LLVM IR (-O2):
define void @unregister_usblog_proc() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
int /*<<< orphan*/ mk_time_(char *, char *);
time_t date_get_epoch(char *ps_date, char *ps_format) {
  time_t t_mt;
  t_mt = mk_time_(ps_date, ps_format);
  return t_mt;
}


x86 assembly (clang, -O0):
<date_get_epoch>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <mk_time_@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<date_get_epoch>:
jmp    1030 <mk_time_@plt>

LLVM IR (-O0):
define i32 @date_get_epoch(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = load i8*, i8** %4
%8 = call i32 @mk_time_(i8* %6, i8* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @date_get_epoch(i8* %0, i8* %1) {
%3 = tail call i32 @mk_time_(i8* %0, i8* %1)
ret i32 %3
}
/* Type definitions */
typedef int ptrdiff_t;

/* Variables and functions */
ptrdiff_t head2head_idx_sdev(ptrdiff_t x, ptrdiff_t y) {
  ptrdiff_t idx;
  if (y < x)
    idx = (x * x - x) / 2 + y;
  else
    idx = (y * y - y) / 2 + x;
  return idx;
}


x86 assembly (clang, -O0):
<head2head_idx_sdev>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1133 <head2head_idx_sdev+0x33>
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
sub    -0x4(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    114b <head2head_idx_sdev+0x4b>
mov    -0x8(%rbp),%eax
imul   -0x8(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
add    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<head2head_idx_sdev>:
mov    %esi,%eax
imul   %esi,%eax
sub    %esi,%eax
mov    %edi,%ecx
imul   %edi,%ecx
sub    %edi,%ecx
cmp    %edi,%esi
cmovge %eax,%ecx
cmovl  %esi,%edi
mov    %ecx,%eax
shr    $0x1f,%eax
add    %ecx,%eax
sar    %eax
add    %edi,%eax
ret

LLVM IR (-O0):
define i32 @head2head_idx_sdev(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = load i32, i32* %3
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %18
9: ; preds = %2
%10 = load i32, i32* %3
%11 = load i32, i32* %3
%12 = mul nsw i32 %10, %11
%13 = load i32, i32* %3
%14 = sub nsw i32 %12, %13
%15 = sdiv i32 %14, 2
%16 = load i32, i32* %4
%17 = add nsw i32 %15, %16
store i32 %17, i32* %5
br label %27
18: ; preds = %2
%19 = load i32, i32* %4
%20 = load i32, i32* %4
%21 = mul nsw i32 %19, %20
%22 = load i32, i32* %4
%23 = sub nsw i32 %21, %22
%24 = sdiv i32 %23, 2
%25 = load i32, i32* %3
%26 = add nsw i32 %24, %25
store i32 %26, i32* %5
br label %27
27: ; preds = %18, %9
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @head2head_idx_sdev(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, %0
%4 = mul nsw i32 %1, %1
%5 = sub nsw i32 %4, %1
%6 = mul nsw i32 %0, %0
%7 = sub nsw i32 %6, %0
%8 = select i1 %3, i32 %7, i32 %5
%9 = select i1 %3, i32 %1, i32 %0
%10 = sdiv i32 %8, 2
%11 = add nsw i32 %10, %9
ret i32 %11
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int uni_is_valid_surrogate_pair(uint16_t uni1, uint16_t uni2) {
  return ((uni1 >= 0xD800 && uni1 <= 0xDBFF) &&
          (uni2 >= 0xDC00 && uni2 <= 0xDFFF));
}


x86 assembly (clang, -O0):
<uni_is_valid_surrogate_pair>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
xor    %eax,%eax
cmpl   $0xd800,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jl     1153 <uni_is_valid_surrogate_pair+0x53>
xor    %eax,%eax
cmpl   $0xdbff,-0x4(%rbp)
mov    %al,-0x9(%rbp)
jg     1153 <uni_is_valid_surrogate_pair+0x53>
xor    %eax,%eax
cmpl   $0xdc00,-0x8(%rbp)
mov    %al,-0xa(%rbp)
jl     114d <uni_is_valid_surrogate_pair+0x4d>
cmpl   $0xdfff,-0x8(%rbp)
setle  %al
mov    %al,-0xa(%rbp)
mov    -0xa(%rbp),%al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uni_is_valid_surrogate_pair>:
and    $0xfffffc00,%edi
xor    $0xd800,%edi
and    $0xfffffc00,%esi
xor    $0xdc00,%esi
xor    %eax,%eax
or     %edi,%esi
sete   %al
ret

LLVM IR (-O0):
define i32 @uni_is_valid_surrogate_pair(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp sge i32 %5, 55296
br i1 %6, label %7, label %18
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp sle i32 %8, 56319
br i1 %9, label %10, label %18
10: ; preds = %7
%11 = load i32, i32* %4
%12 = icmp sge i32 %11, 56320
br i1 %12, label %13, label %16
13: ; preds = %10
%14 = load i32, i32* %4
%15 = icmp sle i32 %14, 57343
br label %16
16: ; preds = %13, %10
%17 = phi i1 [ false, %10 ], [ %15, %13 ]
br label %18
18: ; preds = %16, %7, %2
%19 = phi i1 [ false, %7 ], [ false, %2 ], [ %17, %16 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @uni_is_valid_surrogate_pair(i32 %0, i32 %1) {
%3 = and i32 %0, -1024
%4 = icmp eq i32 %3, 55296
%5 = and i32 %1, -1024
%6 = icmp eq i32 %5, 56320
%7 = and i1 %4, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void *, size_t);
void mspack_copy(void *src, void *dst, size_t bytes) {
  memcpy(dst, src, bytes);
}


x86 assembly (clang, -O0):
<mspack_copy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mspack_copy>:
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rax,%rsi
jmp    1030 <memcpy@plt>

LLVM IR (-O0):
define void @mspack_copy(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %5
%8 = load i8*, i8** %4
%9 = load i64, i64* %6
%10 = call i32 @memcpy(i8* %7, i8* %8, i64 %9)
ret void
}

LLVM IR (-O2):
define void @mspack_copy(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @memcpy(i8* %1, i8* %0, i64 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ iscntrl(int);
void t_iscntrl_0x67() {
  Assert_real((iscntrl(103) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_iscntrl.c",
              520, ("iscntrl should be 0 for g"));
}


x86 assembly (clang, -O0):
<t_iscntrl_0x67>:
push   %rbp
mov    %rsp,%rbp
mov    $0x67,%edi
call   1030 <iscntrl@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x208,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_iscntrl_0x67>:
push   %rax
mov    $0x67,%edi
call   1030 <iscntrl@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x208,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for g\00"
define void @t_iscntrl_0x67() {
%1 = call i64 @iscntrl(i32 103)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 520, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_iscntrl.c\00"
@.str.1 = [26 x i8] c"iscntrl should be 0 for g\00"
define void @t_iscntrl_0x67() {
%1 = tail call i64 @iscntrl(i32 103)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 520, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ resampler_write_sample_float(void *, float);
void resampler_write_sample_fixed(void *_r, int s, unsigned char depth) {
  float s32 = s;
  s32 /= (double)(1 << (depth - 1));
  resampler_write_sample_float(_r, s32);
}


x86 assembly (clang, -O0):
<resampler_write_sample_fixed>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %al,-0xd(%rbp)
cvtsi2ssl -0xc(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movzbl -0xd(%rbp),%ecx
sub    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cvtsi2sd %eax,%xmm1
movss  -0x14(%rbp),%xmm0
cvtss2sd %xmm0,%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
movss  %xmm0,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
movss  -0x14(%rbp),%xmm0
call   1030 <resampler_write_sample_float@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resampler_write_sample_fixed>:
cvtsi2ss %esi,%xmm0
lea    -0x1(%rdx),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cvtsi2sd %eax,%xmm1
cvtss2sd %xmm0,%xmm0
divsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
jmp    1030 <resampler_write_sample_float@plt>

LLVM IR (-O0):
define void @resampler_write_sample_fixed(i8* %0, i32 %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8
%7 = alloca float
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8 %2, i8* %6
%8 = load i32, i32* %5
%9 = sitofp i32 %8 to float
store float %9, float* %7
%10 = load i8, i8* %6
%11 = zext i8 %10 to i32
%12 = sub nsw i32 %11, 1
%13 = shl i32 1, %12
%14 = sitofp i32 %13 to double
%15 = load float, float* %7
%16 = fpext float %15 to double
%17 = fdiv double %16, %14
%18 = fptrunc double %17 to float
store float %18, float* %7
%19 = load i8*, i8** %4
%20 = load float, float* %7
%21 = call i32 @resampler_write_sample_float(i8* %19, float %20)
ret void
}

LLVM IR (-O2):
define void @resampler_write_sample_fixed(i8* %0, i32 %1, i8 zeroext %2) {
%4 = sitofp i32 %1 to float
%5 = zext i8 %2 to i32
%6 = add nsw i32 %5, -1
%7 = shl nuw i32 1, %6
%8 = sitofp i32 %7 to double
%9 = fpext float %4 to double
%10 = fdiv double %9, %8
%11 = fptrunc double %10 to float
%12 = tail call i32 @resampler_write_sample_float(i8* %0, float %11)
ret void
}
void glLightModelx(void) { return; }


x86 assembly (clang, -O0):
<glLightModelx>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glLightModelx>:
ret

LLVM IR (-O0):
define void @glLightModelx() {
ret void
}

LLVM IR (-O2):
define void @glLightModelx() {
ret void
}
void _cc3_delay_us_4(int cnt) {
  volatile int i, x;
  for (i = 0; i < cnt; i++)
    for (x = 0; x < 10; x++)
      ;
}


x86 assembly (clang, -O0):
<_cc3_delay_us_4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1153 <_cc3_delay_us_4+0x53>
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cmp    $0xa,%eax
jge    1140 <_cc3_delay_us_4+0x40>
jmp    1132 <_cc3_delay_us_4+0x32>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1121 <_cc3_delay_us_4+0x21>
jmp    1145 <_cc3_delay_us_4+0x45>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <_cc3_delay_us_4+0xe>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_cc3_delay_us_4>:
movl   $0x0,-0x4(%rsp)
jmp    1115 <_cc3_delay_us_4+0x15>
nopw   0x0(%rax,%rax,1)
addl   $0x1,-0x4(%rsp)
mov    -0x4(%rsp),%eax
cmp    %edi,%eax
jge    1140 <_cc3_delay_us_4+0x40>
movl   $0x0,-0x8(%rsp)
mov    -0x8(%rsp),%eax
cmp    $0x9,%eax
jg     1110 <_cc3_delay_us_4+0x10>
xchg   %ax,%ax
addl   $0x1,-0x8(%rsp)
mov    -0x8(%rsp),%eax
cmp    $0xa,%eax
jl     1130 <_cc3_delay_us_4+0x30>
jmp    1110 <_cc3_delay_us_4+0x10>
ret

LLVM IR (-O0):
define void @_cc3_delay_us_4(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
store volatile i32 0, i32* %3
br label %5
5: ; preds = %18, %1
%6 = load volatile i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %21
9: ; preds = %5
store volatile i32 0, i32* %4
br label %10
10: ; preds = %14, %9
%11 = load volatile i32, i32* %4
%12 = icmp slt i32 %11, 10
br i1 %12, label %13, label %17
13: ; preds = %10
br label %14
14: ; preds = %13
%15 = load volatile i32, i32* %4
%16 = add nsw i32 %15, 1
store volatile i32 %16, i32* %4
br label %10
17: ; preds = %10
br label %18
18: ; preds = %17
%19 = load volatile i32, i32* %3
%20 = add nsw i32 %19, 1
store volatile i32 %20, i32* %3
br label %5
21: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @_cc3_delay_us_4(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
%5 = bitcast i32* %3 to i8*
store volatile i32 0, i32* %2
%6 = load volatile i32, i32* %2
%7 = icmp slt i32 %6, %0
br i1 %7, label %8, label %21
8: ; preds = %1, %16
store volatile i32 0, i32* %3
%9 = load volatile i32, i32* %3
%10 = icmp slt i32 %9, 10
br i1 %10, label %11, label %16
11: ; preds = %8, %11
%12 = load volatile i32, i32* %3
%13 = add nsw i32 %12, 1
store volatile i32 %13, i32* %3
%14 = load volatile i32, i32* %3
%15 = icmp slt i32 %14, 10
br i1 %15, label %11, label %16
16: ; preds = %11, %8
%17 = load volatile i32, i32* %2
%18 = add nsw i32 %17, 1
store volatile i32 %18, i32* %2
%19 = load volatile i32, i32* %2
%20 = icmp slt i32 %19, %0
br i1 %20, label %8, label %21
21: ; preds = %16, %1
ret void
}
/* Variables and functions */
int getosreldate();
int /*<<< orphan*/ printf(char *, int);
void test_osreldate(void) { printf("OSRELDATE: %d\n", getosreldate()); }


x86 assembly (clang, -O0):
<test_osreldate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getosreldate@plt>
mov    %eax,%esi
lea    0xecc(%rip),%rdi
call   1040 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_osreldate>:
push   %rax
xor    %eax,%eax
call   1030 <getosreldate@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"OSRELDATE: %d\0A\00"
define void @test_osreldate() {
%1 = call i32 (...) @getosreldate()
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"OSRELDATE: %d\0A\00"
define void @test_osreldate() {
%1 = tail call i32 (...) @getosreldate()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
int main(void) {
  char *p = "12345", *q = p - 10;
  printf("%d", q[14] - q[13]);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0xfffffffffffffff6,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movsbl 0xe(%rax),%eax
mov    -0x18(%rbp),%rcx
movsbl 0xd(%rcx),%ecx
sub    %ecx,%eax
lea    0xeb7(%rip),%rdi
movsbl %al,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"12345\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 -10
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 14
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 13
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = sub nsw i32 %9, %13
%15 = trunc i32 %14 to i8
%16 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8 signext %15)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i8 signext 1)
ret i32 0
}