xunge/DecIR huggingface dataset:
/* Variables and functions */
int powerFor(int, int);
int powerWhile(int, int);
int /*<<< orphan*/ printf(char *, int, int, int);
int main() {
  printf("%d ^ %d = %d\n", 2, 3, powerFor(2, 3));
  printf("%d ^ %d = %d\n", 8, 5, powerWhile(8, 5));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x2,%edi
mov    $0x3,%esi
call   1040 <powerFor@plt>
mov    %eax,%ecx
lea    0xea9(%rip),%rdi
mov    $0x2,%esi
mov    $0x3,%edx
call   1030 <printf@plt>
mov    $0x8,%edi
mov    $0x5,%esi
call   1050 <powerWhile@plt>
mov    %eax,%ecx
lea    0xe82(%rip),%rdi
mov    $0x8,%esi
mov    $0x5,%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    $0x2,%edi
mov    $0x3,%esi
call   1040 <powerFor@plt>
lea    0xeb9(%rip),%rbx
mov    %rbx,%rdi
mov    $0x2,%esi
mov    $0x3,%edx
mov    %eax,%ecx
call   1030 <printf@plt>
mov    $0x8,%edi
mov    $0x5,%esi
call   1050 <powerWhile@plt>
mov    %rbx,%rdi
mov    $0x8,%esi
mov    $0x5,%edx
mov    %eax,%ecx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"%d ^ %d = %d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @powerFor(i32 2, i32 3)
%3 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 2, i32 3, i32 %2)
%4 = call i32 @powerWhile(i32 8, i32 5)
%5 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 8, i32 5, i32 %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"%d ^ %d = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @powerFor(i32 2, i32 3)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 2, i32 3, i32 %1)
%3 = tail call i32 @powerWhile(i32 8, i32 5)
%4 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 8, i32 5, i32 %3)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ assert_int_equal(int, int /*<<< orphan*/);
int /*<<< orphan*/ no_west_neighbors(int);
void no_west_neighbors_test(void **state) {
  assert_int_equal(0x0000000000000400ul,
                   no_west_neighbors(0x0000000000001C00ul));
}


x86 assembly (clang, -O0):
<no_west_neighbors_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1c00,%edi
call   1040 <no_west_neighbors@plt>
mov    %eax,%esi
mov    $0x400,%edi
call   1030 <assert_int_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<no_west_neighbors_test>:
push   %rax
mov    $0x1c00,%edi
call   1040 <no_west_neighbors@plt>
mov    $0x400,%edi
mov    %eax,%esi
pop    %rax
jmp    1030 <assert_int_equal@plt>

LLVM IR (-O0):
define void @no_west_neighbors_test(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = call i32 @no_west_neighbors(i32 7168)
%4 = call i32 @assert_int_equal(i32 1024, i32 %3)
ret void
}

LLVM IR (-O2):
define void @no_west_neighbors_test(i8** nocapture readnone %0) {
%2 = tail call i32 @no_west_neighbors(i32 7168)
%3 = tail call i32 @assert_int_equal(i32 1024, i32 %2)
ret void
}
/* Variables and functions */
int OK;
int savetty() { return (OK); }


x86 assembly (clang, -O0):
<savetty>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<savetty>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@OK = global i32 0
define i32 @savetty() {
%1 = load i32, i32* @OK
ret i32 %1
}

LLVM IR (-O2):
@OK = global i32 0
define i32 @savetty() {
%1 = load i32, i32* @OK
ret i32 %1
}
void setToZero(short **t) {
  *(*t) = 0;
  *((*t) + 1) = 0;
  *((*t) + 2) = 0;
  *(*(t + 1)) = 0;
  *(*(t + 1) + 1) = 0;
}


x86 assembly (clang, -O0):
<setToZero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movw   $0x0,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movw   $0x0,0x2(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
movw   $0x0,0x4(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
movw   $0x0,(%rax)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
movw   $0x0,0x2(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<setToZero>:
mov    (%rdi),%rax
movl   $0x0,(%rax)
movw   $0x0,0x4(%rax)
mov    0x8(%rdi),%rax
movl   $0x0,(%rax)
ret

LLVM IR (-O0):
define void @setToZero(i16** %0) {
%2 = alloca i16**
store i16** %0, i16*** %2
%3 = load i16**, i16*** %2
%4 = load i16*, i16** %3
store i16 0, i16* %4
%5 = load i16**, i16*** %2
%6 = load i16*, i16** %5
%7 = getelementptr inbounds i16, i16* %6, i64 1
store i16 0, i16* %7
%8 = load i16**, i16*** %2
%9 = load i16*, i16** %8
%10 = getelementptr inbounds i16, i16* %9, i64 2
store i16 0, i16* %10
%11 = load i16**, i16*** %2
%12 = getelementptr inbounds i16*, i16** %11, i64 1
%13 = load i16*, i16** %12
store i16 0, i16* %13
%14 = load i16**, i16*** %2
%15 = getelementptr inbounds i16*, i16** %14, i64 1
%16 = load i16*, i16** %15
%17 = getelementptr inbounds i16, i16* %16, i64 1
store i16 0, i16* %17
ret void
}

LLVM IR (-O2):
define void @setToZero(i16** nocapture %0) {
%2 = load i16*, i16** %0
store i16 0, i16* %2
%3 = getelementptr inbounds i16, i16* %2, i64 1
store i16 0, i16* %3
%4 = getelementptr inbounds i16, i16* %2, i64 2
store i16 0, i16* %4
%5 = getelementptr inbounds i16*, i16** %0, i64 1
%6 = load i16*, i16** %5
store i16 0, i16* %6
%7 = getelementptr inbounds i16, i16* %6, i64 1
store i16 0, i16* %7
ret void
}
/* Variables and functions */
float abs(float);
float pow(double, float);
float ev_factor(float ev) {
  if (ev <= 0) {
    return pow(2.0, abs(ev));
  } else {
    return pow(0.5, ev);
  }
}


x86 assembly (clang, -O0):
<ev_factor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
ucomiss -0x8(%rbp),%xmm0
jb     115e <ev_factor+0x3e>
movss  -0x8(%rbp),%xmm0
call   1030 <abs@plt>
movaps %xmm0,%xmm1
movsd  0xeb9(%rip),%xmm0
call   1040 <pow@plt>
movss  %xmm0,-0x4(%rbp)
jmp    1175 <ev_factor+0x55>
movss  -0x8(%rbp),%xmm1
movsd  0xe95(%rip),%xmm0
call   1040 <pow@plt>
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ev_factor>:
push   %rax
movaps %xmm0,%xmm1
xorps  %xmm0,%xmm0
ucomiss %xmm1,%xmm0
jae    113a <ev_factor+0x1a>
movsd  0xed4(%rip),%xmm0
pop    %rax
jmp    1040 <pow@plt>
movaps %xmm1,%xmm0
call   1030 <abs@plt>
movaps %xmm0,%xmm1
movsd  0xeb3(%rip),%xmm0
pop    %rax
jmp    1040 <pow@plt>

LLVM IR (-O0):
define float @ev_factor(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fcmp ole float %4, 0.000000e+00
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load float, float* %3
%8 = call float @abs(float %7)
%9 = call float @pow(double 2.000000e+00, float %8)
store float %9, float* %2
br label %13
10: ; preds = %1
%11 = load float, float* %3
%12 = call float @pow(double 5.000000e-01, float %11)
store float %12, float* %2
br label %13
13: ; preds = %10, %6
%14 = load float, float* %2
ret float %14
}

LLVM IR (-O2):
define float @ev_factor(float %0) {
%2 = fcmp ugt float %0, 0.000000e+00
br i1 %2, label %6, label %3
3: ; preds = %1
%4 = tail call float @abs(float %0)
%5 = tail call float @pow(double 2.000000e+00, float %4)
br label %8
6: ; preds = %1
%7 = tail call float @pow(double 5.000000e-01, float %0)
br label %8
8: ; preds = %6, %3
%9 = phi float [ %5, %3 ], [ %7, %6 ]
ret float %9
}
/* Variables and functions */
char *my_alloc1(int, int);
int test5(int len, int align) {
  int i;
  char *p = my_alloc1(len, align);
  return ((long int)p) & 15;
}


x86 assembly (clang, -O0):
<test5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <my_alloc1@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
and    $0xf,%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test5>:
push   %rax
call   1030 <my_alloc1@plt>
and    $0xf,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @test5(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load i32, i32* %3
%8 = load i32, i32* %4
%9 = call i8* @my_alloc1(i32 %7, i32 %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = ptrtoint i8* %10 to i64
%12 = and i64 %11, 15
%13 = trunc i64 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @test5(i32 %0, i32 %1) {
%3 = tail call i8* @my_alloc1(i32 %0, i32 %1)
%4 = ptrtoint i8* %3 to i64
%5 = trunc i64 %4 to i32
%6 = and i32 %5, 15
ret i32 %6
}
/* Variables and functions */
int sr_skip_char_span(char const **, char *);
int sr_skip_hexadecimal_uint(const char **input) {
  return sr_skip_char_span(input, "abcdefABCDEF0123456789");
}


x86 assembly (clang, -O0):
<sr_skip_hexadecimal_uint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <sr_skip_char_span@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sr_skip_hexadecimal_uint>:
lea    0xee9(%rip),%rsi
jmp    1030 <sr_skip_char_span@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"abcdefABCDEF0123456789\00"
define i32 @sr_skip_hexadecimal_uint(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = call i32 @sr_skip_char_span(i8** %3, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [23 x i8] c"abcdefABCDEF0123456789\00"
define i32 @sr_skip_hexadecimal_uint(i8** %0) {
%2 = tail call i32 @sr_skip_char_span(i8** %0, i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
unsigned char _IO_getc(int *);
read_long(int *fp) {
  unsigned char b0, b1, b2, b3;
  b0 = _IO_getc(fp);
  b1 = _IO_getc(fp);
  b2 = _IO_getc(fp);
  b3 = _IO_getc(fp);
  return ((int)(((((b3 << 8) | b2) << 8) | b1) << 8) | b0);
}


x86 assembly (clang, -O0):
<read_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_IO_getc@plt>
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_IO_getc@plt>
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_IO_getc@plt>
mov    %al,-0xb(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_IO_getc@plt>
mov    %al,-0xc(%rbp)
movzbl -0xc(%rbp),%eax
shl    $0x8,%eax
movzbl -0xb(%rbp),%ecx
or     %ecx,%eax
shl    $0x8,%eax
movzbl -0xa(%rbp),%ecx
or     %ecx,%eax
shl    $0x8,%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_long>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <_IO_getc@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1030 <_IO_getc@plt>
mov    %eax,%r14d
mov    %rbx,%rdi
call   1030 <_IO_getc@plt>
mov    %eax,%r15d
mov    %rbx,%rdi
call   1030 <_IO_getc@plt>
movzbl %al,%eax
movzbl %r15b,%ecx
shl    $0x10,%eax
shl    $0x8,%ecx
or     %eax,%ecx
movzbl %r14b,%edx
or     %ecx,%edx
shl    $0x8,%edx
movzbl %bpl,%eax
or     %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @read_long(i32* %0) {
%2 = alloca i32*
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8
store i32* %0, i32** %2
%7 = load i32*, i32** %2
%8 = call zeroext i8 @_IO_getc(i32* %7)
store i8 %8, i8* %3
%9 = load i32*, i32** %2
%10 = call zeroext i8 @_IO_getc(i32* %9)
store i8 %10, i8* %4
%11 = load i32*, i32** %2
%12 = call zeroext i8 @_IO_getc(i32* %11)
store i8 %12, i8* %5
%13 = load i32*, i32** %2
%14 = call zeroext i8 @_IO_getc(i32* %13)
store i8 %14, i8* %6
%15 = load i8, i8* %6
%16 = zext i8 %15 to i32
%17 = shl i32 %16, 8
%18 = load i8, i8* %5
%19 = zext i8 %18 to i32
%20 = or i32 %17, %19
%21 = shl i32 %20, 8
%22 = load i8, i8* %4
%23 = zext i8 %22 to i32
%24 = or i32 %21, %23
%25 = shl i32 %24, 8
%26 = load i8, i8* %3
%27 = zext i8 %26 to i32
%28 = or i32 %25, %27
ret i32 %28
}

LLVM IR (-O2):
define i32 @read_long(i32* nocapture %0) {
%2 = tail call zeroext i8 @_IO_getc(i32* %0)
%3 = tail call zeroext i8 @_IO_getc(i32* %0)
%4 = tail call zeroext i8 @_IO_getc(i32* %0)
%5 = tail call zeroext i8 @_IO_getc(i32* %0)
%6 = zext i8 %5 to i32
%7 = zext i8 %4 to i32
%8 = shl nuw nsw i32 %6, 16
%9 = shl nuw nsw i32 %7, 8
%10 = or i32 %8, %9
%11 = zext i8 %3 to i32
%12 = or i32 %10, %11
%13 = shl nuw i32 %12, 8
%14 = zext i8 %2 to i32
%15 = or i32 %13, %14
ret i32 %15
}
/* Variables and functions */
int /*<<< orphan*/ uwsgi_command_signal(char *);
void uwsgi_opt_signal(char *opt, char *value, void *foobar) {
  uwsgi_command_signal(value);
}


x86 assembly (clang, -O0):
<uwsgi_opt_signal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <uwsgi_command_signal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uwsgi_opt_signal>:
mov    %rsi,%rdi
jmp    1030 <uwsgi_command_signal@plt>

LLVM IR (-O0):
define void @uwsgi_opt_signal(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%7 = load i8*, i8** %5
%8 = call i32 @uwsgi_command_signal(i8* %7)
ret void
}

LLVM IR (-O2):
define void @uwsgi_opt_signal(i8* nocapture readnone %0, i8* %1, i8* nocapture readnone %2) {
%4 = tail call i32 @uwsgi_command_signal(i8* %1)
ret void
}
void password_cache_save(const char *keygrip, const char *password) {
  (void)keygrip;
  (void)password;
  return;
}


x86 assembly (clang, -O0):
<password_cache_save>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<password_cache_save>:
ret

LLVM IR (-O0):
define void @password_cache_save(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
ret void
}

LLVM IR (-O2):
define void @password_cache_save(i8* nocapture %0, i8* nocapture %1) {
ret void
}
void osd_ext_clone_set_angle(int angle) {}


x86 assembly (clang, -O0):
<osd_ext_clone_set_angle>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<osd_ext_clone_set_angle>:
ret

LLVM IR (-O0):
define void @osd_ext_clone_set_angle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @osd_ext_clone_set_angle(i32 %0) {
ret void
}
void ble_rsp_connection_version_update(
    const struct ble_msg_connection_version_update_rsp_t *msg) {}


x86 assembly (clang, -O0):
<ble_rsp_connection_version_update>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ble_rsp_connection_version_update>:
ret

LLVM IR (-O0):
%struct.ble_msg_connection_version_update_rsp_t = type opaque
define void @ble_rsp_connection_version_update(%struct.ble_msg_connection_version_update_rsp_t* %0) {
%2 = alloca %struct.ble_msg_connection_version_update_rsp_t*
store %struct.ble_msg_connection_version_update_rsp_t* %0, %struct.ble_msg_connection_version_update_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.ble_msg_connection_version_update_rsp_t = type opaque
define void @ble_rsp_connection_version_update(%struct.ble_msg_connection_version_update_rsp_t* nocapture %0) {
ret void
}
void buffer_delete_forward_word(struct buffer *buf, char **out, int *n_out) {}


x86 assembly (clang, -O0):
<buffer_delete_forward_word>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<buffer_delete_forward_word>:
ret

LLVM IR (-O0):
%struct.buffer = type opaque
define void @buffer_delete_forward_word(%struct.buffer* %0, i8** %1, i32* %2) {
%4 = alloca %struct.buffer*
%5 = alloca i8**
%6 = alloca i32*
store %struct.buffer* %0, %struct.buffer** %4
store i8** %1, i8*** %5
store i32* %2, i32** %6
ret void
}

LLVM IR (-O2):
%struct.buffer = type opaque
define void @buffer_delete_forward_word(%struct.buffer* nocapture %0, i8** nocapture %1, i32* nocapture %2) {
ret void
}
void RasterDMAFBConfig(unsigned int baseAddr, unsigned int base,
                       unsigned int ceiling, unsigned int flag) {
  if (flag == 0) {
    (*((volatile unsigned int *)(baseAddr + (0x44)))) = base;
    (*((volatile unsigned int *)(baseAddr + (0x48)))) = ceiling;
  } else {
    (*((volatile unsigned int *)(baseAddr + (0x4C)))) = base;
    (*((volatile unsigned int *)(baseAddr + (0x50)))) = ceiling;
  }
}


x86 assembly (clang, -O0):
<RasterDMAFBConfig>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1139 <RasterDMAFBConfig+0x39>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x44,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x48,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
jmp    1153 <RasterDMAFBConfig+0x53>
mov    -0x8(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x4c,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
mov    -0x4(%rbp),%eax
add    $0x50,%eax
mov    %eax,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RasterDMAFBConfig>:
xor    %eax,%eax
test   %ecx,%ecx
setne  %al
lea    (%rdi,%rax,8),%ecx
add    $0x44,%ecx
mov    %esi,(%rcx)
lea    (%rdi,%rax,8),%eax
add    $0x48,%eax
mov    %edx,(%rax)
ret

LLVM IR (-O0):
define void @RasterDMAFBConfig(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %8
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %22
11: ; preds = %4
%12 = load i32, i32* %6
%13 = load i32, i32* %5
%14 = add i32 %13, 68
%15 = zext i32 %14 to i64
%16 = inttoptr i64 %15 to i32*
store volatile i32 %12, i32* %16
%17 = load i32, i32* %7
%18 = load i32, i32* %5
%19 = add i32 %18, 72
%20 = zext i32 %19 to i64
%21 = inttoptr i64 %20 to i32*
store volatile i32 %17, i32* %21
br label %33
22: ; preds = %4
%23 = load i32, i32* %6
%24 = load i32, i32* %5
%25 = add i32 %24, 76
%26 = zext i32 %25 to i64
%27 = inttoptr i64 %26 to i32*
store volatile i32 %23, i32* %27
%28 = load i32, i32* %7
%29 = load i32, i32* %5
%30 = add i32 %29, 80
%31 = zext i32 %30 to i64
%32 = inttoptr i64 %31 to i32*
store volatile i32 %28, i32* %32
br label %33
33: ; preds = %22, %11
ret void
}

LLVM IR (-O2):
define void @RasterDMAFBConfig(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = icmp eq i32 %3, 0
%6 = select i1 %5, i32 68, i32 76
%7 = select i1 %5, i32 72, i32 80
%8 = add i32 %6, %0
%9 = zext i32 %8 to i64
%10 = inttoptr i64 %9 to i32*
store volatile i32 %1, i32* %10
%11 = add i32 %7, %0
%12 = zext i32 %11 to i64
%13 = inttoptr i64 %12 to i32*
store volatile i32 %2, i32* %13
ret void
}
/* Variables and functions */
int rand();
int roll(int sides) { return rand() % sides + 1; }


x86 assembly (clang, -O0):
<roll>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<roll>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
lea    0x1(%rdx),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @roll(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @rand()
%4 = load i32, i32* %2
%5 = srem i32 %3, %4
%6 = add nsw i32 %5, 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @roll(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = srem i32 %2, %0
%4 = add nsw i32 %3, 1
ret i32 %4
}
int pacman_speed_normal(int level) {
  if (level == 1)
    return 80;
  if (level <= 4)
    return 90;
  if (level <= 20)
    return 100;
  return 90;
}


x86 assembly (clang, -O0):
<pacman_speed_normal>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jne    111d <pacman_speed_normal+0x1d>
movl   $0x50,-0x4(%rbp)
jmp    1150 <pacman_speed_normal+0x50>
cmpl   $0x4,-0x8(%rbp)
jg     1133 <pacman_speed_normal+0x33>
movl   $0x5a,-0x4(%rbp)
jmp    1150 <pacman_speed_normal+0x50>
cmpl   $0x14,-0x8(%rbp)
jg     1149 <pacman_speed_normal+0x49>
movl   $0x64,-0x4(%rbp)
jmp    1150 <pacman_speed_normal+0x50>
movl   $0x5a,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pacman_speed_normal>:
mov    $0x50,%eax
cmp    $0x1,%edi
je     1124 <pacman_speed_normal+0x24>
mov    $0x5a,%eax
cmp    $0x5,%edi
jl     1124 <pacman_speed_normal+0x24>
cmp    $0x15,%edi
mov    $0x64,%ecx
mov    $0x5a,%eax
cmovb  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @pacman_speed_normal(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 80, i32* %2
br label %16
7: ; preds = %1
%8 = load i32, i32* %3
%9 = icmp sle i32 %8, 4
br i1 %9, label %10, label %11
10: ; preds = %7
store i32 90, i32* %2
br label %16
11: ; preds = %7
%12 = load i32, i32* %3
%13 = icmp sle i32 %12, 20
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 100, i32* %2
br label %16
15: ; preds = %11
store i32 90, i32* %2
br label %16
16: ; preds = %15, %14, %10, %6
%17 = load i32, i32* %2
ret i32 %17
}

LLVM IR (-O2):
define i32 @pacman_speed_normal(i32 %0) {
%2 = icmp eq i32 %0, 1
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = icmp slt i32 %0, 5
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = icmp ult i32 %0, 21
%7 = select i1 %6, i32 100, i32 90
br label %8
8: ; preds = %5, %3, %1
%9 = phi i32 [ 80, %1 ], [ 90, %3 ], [ %7, %5 ]
ret i32 %9
}
void three_branch() {
  int x;
  if (x) {
    if (x) {
      x = 0;
    } else {
      x = 1;
    }
  } else {
    x = 2;
  }
}


x86 assembly (clang, -O0):
<three_branch>:
push   %rbp
mov    %rsp,%rbp
cmpl   $0x0,-0x4(%rbp)
je     1130 <three_branch+0x30>
cmpl   $0x0,-0x4(%rbp)
je     1124 <three_branch+0x24>
movl   $0x0,-0x4(%rbp)
jmp    112b <three_branch+0x2b>
movl   $0x1,-0x4(%rbp)
jmp    1137 <three_branch+0x37>
movl   $0x2,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<three_branch>:
ret

LLVM IR (-O0):
define void @three_branch() {
%1 = alloca i32
%2 = load i32, i32* %1
%3 = icmp ne i32 %2, 0
br i1 %3, label %4, label %10
4: ; preds = %0
%5 = load i32, i32* %1
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %4
store i32 0, i32* %1
br label %9
8: ; preds = %4
store i32 1, i32* %1
br label %9
9: ; preds = %8, %7
br label %11
10: ; preds = %0
store i32 2, i32* %1
br label %11
11: ; preds = %10, %9
ret void
}

LLVM IR (-O2):
define void @three_branch() {
ret void
}
void bar(int *n) { *n = 4; }


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x4,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
movl   $0x4,(%rdi)
ret

LLVM IR (-O0):
define void @bar(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
store i32 4, i32* %3
ret void
}

LLVM IR (-O2):
define void @bar(i32* nocapture writeonly %0) {
store i32 4, i32* %0
ret void
}
/* Variables and functions */
scalar_t__ argint(int /*<<< orphan*/, int *);
int growproc(int);
int sys_sbrk(void) {
  int addr;
  int n;
  if (argint(0, &n) < 0)
    return -1;
  if ((addr = growproc(n)) < 0)
    return -1;
  return addr;
}


x86 assembly (clang, -O0):
<sys_sbrk>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
xor    %edi,%edi
lea    -0xc(%rbp),%rsi
call   1030 <argint@plt>
cmp    $0x0,%rax
jge    1149 <sys_sbrk+0x29>
movl   $0xffffffff,-0x4(%rbp)
jmp    116f <sys_sbrk+0x4f>
mov    -0xc(%rbp),%edi
call   1040 <growproc@plt>
mov    %eax,-0x8(%rbp)
cmp    $0x0,%eax
jge    1169 <sys_sbrk+0x49>
movl   $0xffffffff,-0x4(%rbp)
jmp    116f <sys_sbrk+0x4f>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_sbrk>:
push   %rax
lea    0x4(%rsp),%rsi
xor    %edi,%edi
call   1030 <argint@plt>
test   %rax,%rax
js     1149 <sys_sbrk+0x29>
mov    0x4(%rsp),%edi
call   1040 <growproc@plt>
mov    %eax,%ecx
test   %eax,%eax
mov    $0xffffffff,%eax
cmovns %ecx,%eax
pop    %rcx
ret
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @sys_sbrk() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = call i64 @argint(i32 0, i32* %3)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 -1, i32* %1
br label %14
7: ; preds = %0
%8 = load i32, i32* %3
%9 = call i32 @growproc(i32 %8)
store i32 %9, i32* %2
%10 = icmp slt i32 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 -1, i32* %1
br label %14
12: ; preds = %7
%13 = load i32, i32* %2
store i32 %13, i32* %1
br label %14
14: ; preds = %12, %11, %6
%15 = load i32, i32* %1
ret i32 %15
}

LLVM IR (-O2):
define i32 @sys_sbrk() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i64 @argint(i32 0, i32* %1)
%4 = icmp slt i64 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %0
%6 = load i32, i32* %1
%7 = call i32 @growproc(i32 %6)
%8 = icmp sgt i32 %7, -1
%9 = select i1 %8, i32 %7, i32 -1
br label %10
10: ; preds = %5, %0
%11 = phi i32 [ -1, %0 ], [ %9, %5 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void get_cpuconfig(void) {
  printf("#define V9\n");
  printf("#define DTB_ENTRIES 32\n");
}


x86 assembly (clang, -O0):
<get_cpuconfig>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_cpuconfig>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xee7(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"#define V9\0A\00"
@.str.1 = [24 x i8] c"#define DTB_ENTRIES 32\0A\00"
define void @get_cpuconfig() {
%1 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [11 x i8] c"#define V9\00"
@str.2 = [23 x i8] c"#define DTB_ENTRIES 32\00"
define void @get_cpuconfig() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str.2, i64 0, i64 0))
ret void
}
void access_index_1(int *arr) { arr[1] = 0; }


x86 assembly (clang, -O0):
<access_index_1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x0,0x4(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<access_index_1>:
movl   $0x0,0x4(%rdi)
ret

LLVM IR (-O0):
define void @access_index_1(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 1
store i32 0, i32* %4
ret void
}

LLVM IR (-O2):
define void @access_index_1(i32* nocapture writeonly %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 1
store i32 0, i32* %2
ret void
}
int add_obstacle(long obs[2 * 10 + 1]) {
  obs[0] = obs[0];
  return (1);
}


x86 assembly (clang, -O0):
<add_obstacle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add_obstacle>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @add_obstacle(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = getelementptr inbounds i64, i64* %3, i64 0
%5 = load i64, i64* %4
%6 = load i64*, i64** %2
%7 = getelementptr inbounds i64, i64* %6, i64 0
store i64 %5, i64* %7
ret i32 1
}

LLVM IR (-O2):
define i32 @add_obstacle(i64* nocapture readnone %0) {
ret i32 1
}
int main(void) {
  int a;
  int b = 0;
  for (a = 0; a <= 0xa; a = a + 1) {
    b = b + 1;
  }
  return b;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0xa,-0x8(%rbp)
jg     113a <main+0x3a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1119 <main+0x19>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xb,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %3
store i32 0, i32* %2
br label %4
4: ; preds = %10, %0
%5 = load i32, i32* %2
%6 = icmp sle i32 %5, 10
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i32, i32* %3
%9 = add nsw i32 %8, 1
store i32 %9, i32* %3
br label %10
10: ; preds = %7
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @main() {
ret i32 11
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isalnum(int);
void t_isalnum_0xc1() {
  Assert_real((isalnum(193) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              970, ("isalnum should be 0 for 0xc1"));
}


x86 assembly (clang, -O0):
<t_isalnum_0xc1>:
push   %rbp
mov    %rsp,%rbp
mov    $0xc1,%edi
call   1030 <isalnum@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3ca,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0xc1>:
push   %rax
mov    $0xc1,%edi
call   1030 <isalnum@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3ca,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xc1\00"
define void @t_isalnum_0xc1() {
%1 = call i64 @isalnum(i32 193)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 970, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [29 x i8] c"isalnum should be 0 for 0xc1\00"
define void @t_isalnum_0xc1() {
%1 = tail call i64 @isalnum(i32 193)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 970, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void *test_anti_range_81(unsigned long n) {
  extern void *alloc_anti_range_81(unsigned long)
      __attribute__((alloc_size(1)));
  if (1 <= n && n <= 1)
    n = 1 - 1;
  return alloc_anti_range_81(n);
}


x86 assembly (clang, -O0):
<test_anti_range_81>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
cmp    -0x8(%rbp),%rax
ja     113e <test_anti_range_81+0x2e>
cmpq   $0x1,-0x8(%rbp)
ja     113e <test_anti_range_81+0x2e>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <alloc_anti_range_81@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_81>:
xor    %eax,%eax
cmp    $0x1,%rdi
cmove  %rax,%rdi
jmp    1030 <alloc_anti_range_81@plt>

LLVM IR (-O0):
define i8* @test_anti_range_81(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ule i64 1, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp ule i64 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %5
store i64 0, i64* %2
br label %9
9: ; preds = %8, %5, %1
%10 = load i64, i64* %2
%11 = call i8* @alloc_anti_range_81(i64 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @test_anti_range_81(i64 %0) {
%2 = icmp eq i64 %0, 1
%3 = select i1 %2, i64 0, i64 %0
%4 = tail call i8* @alloc_anti_range_81(i64 %3)
ret i8* %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
void WatchdogIntEnable(uint32_t ui32Base) {
  ASSERT((ui32Base == 0x40000000) || (ui32Base == 0x40001000));
  (*((volatile uint32_t *)(ui32Base + 0x00000008))) |= 0x00000001;
}


x86 assembly (clang, -O0):
<WatchdogIntEnable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x40000000,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113a <WatchdogIntEnable+0x2a>
cmpl   $0x40001000,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%ecx
or     $0x1,%ecx
mov    %ecx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogIntEnable>:
push   %rbx
mov    %edi,%ebx
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40000000,%eax
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebx,%rax
orl    $0x1,0x8(%rax)
pop    %rbx
ret

LLVM IR (-O0):
define void @WatchdogIntEnable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1073741824
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 1073745920
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @ASSERT(i32 %10)
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 8
%14 = sext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
%16 = load volatile i32, i32* %15
%17 = or i32 %16, 1
store volatile i32 %17, i32* %15
ret void
}

LLVM IR (-O2):
define void @WatchdogIntEnable(i32 %0) {
%2 = and i32 %0, -4097
%3 = icmp eq i32 %2, 1073741824
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = add nsw i32 %0, 8
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = or i32 %9, 1
store volatile i32 %10, i32* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ say(char *, int);
void die(void) {
  say("I'm afraid he wont be making it to his destination.", 1);
}


x86 assembly (clang, -O0):
<die>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
mov    $0x1,%esi
call   1030 <say@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<die>:
lea    0xee9(%rip),%rdi
mov    $0x1,%esi
jmp    1030 <say@plt>

LLVM IR (-O0):
@.str = [52 x i8] c"I'm afraid he wont be making it to his destination.\00"
define void @die() {
%1 = call i32 @say(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [52 x i8] c"I'm afraid he wont be making it to his destination.\00"
define void @die() {
%1 = tail call i32 @say(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
int /*<<< orphan*/ *stderr;
int /*<<< orphan*/ *stdout;
void usage(int status) {
  FILE *stream = (status ? stderr : stdout);
  fprintf(stream,
          "Usage: event_generator -e fork|exit|exec|uid|gid [-n nr_event]\n");
  exit(status);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1148 <usage+0x28>
mov    0x2ea4(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
jmp    1156 <usage+0x36>
mov    0x2e89(%rip),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xe97(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x4(%rbp),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    %edi,%ebx
test   %edi,%edi
jne    1130 <usage+0x10>
mov    0x2eaa(%rip),%rax
jmp    1137 <usage+0x17>
mov    0x2ea9(%rip),%rax
mov    (%rax),%rcx
lea    0xebf(%rip),%rdi
mov    $0x3f,%esi
mov    $0x1,%edx
call   1040 <fwrite@plt>
mov    %ebx,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
@stderr = global i32* null
@stdout = global i32* null
@.str = [64 x i8] c"Usage: event_generator -e fork|exit|exec|uid|gid [-n nr_event]\0A\00"
define void @usage(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32*, i32** @stderr
br label %10
8: ; preds = %1
%9 = load i32*, i32** @stdout
br label %10
10: ; preds = %8, %6
%11 = phi i32* [ %7, %6 ], [ %9, %8 ]
store i32* %11, i32** %3
%12 = load i32*, i32** %3
%13 = call i32 @fprintf(i32* %12, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str, i64 0, i64 0))
%14 = load i32, i32* %2
%15 = call i32 @exit(i32 %14)
unreachable
}

LLVM IR (-O2):
@stderr = global i32* null
@stdout = global i32* null
@.str = [64 x i8] c"Usage: event_generator -e fork|exit|exec|uid|gid [-n nr_event]\0A\00"
define void @usage(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = load i32*, i32** @stderr
%4 = load i32*, i32** @stdout
%5 = select i1 %2, i32* %4, i32* %3
%6 = tail call i64 @fwrite(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str, i64 0, i64 0), i64 63, i64 1, i32* %5)
%7 = tail call i32 @exit(i32 %0)
unreachable
}
signed int *u_to_s_assign(unsigned int *up) {
  signed int *sp;
  sp = up;
  return sp;
}


x86 assembly (clang, -O0):
<u_to_s_assign>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<u_to_s_assign>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i32* @u_to_s_assign(i32* %0) {
%2 = alloca i32*
%3 = alloca i32*
store i32* %0, i32** %2
%4 = load i32*, i32** %2
store i32* %4, i32** %3
%5 = load i32*, i32** %3
ret i32* %5
}

LLVM IR (-O2):
define i32* @u_to_s_assign(i32* readnone returned %0) {
ret i32* %0
}
void arena_free(struct arena *arena, void *p) {}


x86 assembly (clang, -O0):
<arena_free>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<arena_free>:
ret

LLVM IR (-O0):
%struct.arena = type opaque
define void @arena_free(%struct.arena* %0, i8* %1) {
%3 = alloca %struct.arena*
%4 = alloca i8*
store %struct.arena* %0, %struct.arena** %3
store i8* %1, i8** %4
ret void
}

LLVM IR (-O2):
%struct.arena = type opaque
define void @arena_free(%struct.arena* nocapture %0, i8* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ execv(char *, char *const *);
int /*<<< orphan*/ printf(char *);
int exec_shell2(void) {
  printf("exec series functions test\n");
  char *const ps_argv[] = {"ps", "ax", 0};
  execv("/bin/ps", ps_argv);
  printf("Done.\n");
  return 0;
}


x86 assembly (clang, -O0):
<exec_shell2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
mov    0x2cc5(%rip),%rax
mov    %rax,-0x20(%rbp)
mov    0x2cc2(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    0x2cbf(%rip),%rax
mov    %rax,-0x10(%rbp)
lea    -0x20(%rbp),%rsi
lea    0xebf(%rip),%rdi
call   1040 <execv@plt>
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exec_shell2>:
sub    $0x18,%rsp
lea    0xee0(%rip),%rdi
call   1030 <puts@plt>
mov    0x2cd9(%rip),%rax
mov    %rax,0x10(%rsp)
movaps 0x2cbd(%rip),%xmm0
movaps %xmm0,(%rsp)
lea    0xeb5(%rip),%rdi
mov    %rsp,%rsi
call   1040 <execv@plt>
lea    0xec9(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [28 x i8] c"exec series functions test\0A\00"
@.str.1 = [3 x i8] c"ps\00"
@.str.2 = [3 x i8] c"ax\00"
@__const.exec_shell2.ps_argv = [3 x i8*] [i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i32 0, i32 0), i8* null]
@.str.3 = [8 x i8] c"/bin/ps\00"
@.str.4 = [7 x i8] c"Done.\0A\00"
define i32 @exec_shell2() {
%1 = alloca [3 x i8*]
%2 = call i32 @printf(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
%3 = bitcast [3 x i8*]* %1 to i8*
%4 = getelementptr inbounds [3 x i8*], [3 x i8*]* %1, i64 0, i64 0
%5 = call i32 @execv(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.3, i64 0, i64 0), i8** %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.4, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"ps\00"
@.str.2 = [3 x i8] c"ax\00"
@__const.exec_shell2.ps_argv = [3 x i8*] [i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i32 0, i32 0), i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.2, i32 0, i32 0), i8* null]
@.str.3 = [8 x i8] c"/bin/ps\00"
@str = [27 x i8] c"exec series functions test\00"
@str.5 = [6 x i8] c"Done.\00"
define i32 @exec_shell2() {
%1 = alloca [3 x i8*]
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([27 x i8], [27 x i8]* @str, i64 0, i64 0))
%3 = bitcast [3 x i8*]* %1 to i8*
%4 = getelementptr inbounds [3 x i8*], [3 x i8*]* %1, i64 0, i64 0
%5 = call i32 @execv(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.3, i64 0, i64 0), i8** %4)
%6 = call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str.5, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char const *, char *);
void i8086WriteStrConfig(const char *filename, const char *name,
                         const char *value) {
  FILE *file;
  file = fopen(filename, "r+");
  if (file != NULL) {
    fclose(file);
  }
}


x86 assembly (clang, -O0):
<i8086WriteStrConfig>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec1(%rip),%rsi
call   1040 <fopen@plt>
mov    %rax,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     115c <i8086WriteStrConfig+0x3c>
mov    -0x20(%rbp),%rdi
call   1030 <fclose@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i8086WriteStrConfig>:
push   %rax
lea    0xed8(%rip),%rsi
call   1040 <fopen@plt>
test   %rax,%rax
je     113b <i8086WriteStrConfig+0x1b>
mov    %rax,%rdi
pop    %rax
jmp    1030 <fclose@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"r+\00"
define void @i8086WriteStrConfig(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = load i8*, i8** %4
%9 = call i32* @fopen(i8* %8, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
store i32* %9, i32** %7
%10 = load i32*, i32** %7
%11 = icmp ne i32* %10, null
br i1 %11, label %12, label %15
12: ; preds = %3
%13 = load i32*, i32** %7
%14 = call i32 @fclose(i32* %13)
br label %15
15: ; preds = %12, %3
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"r+\00"
define void @i8086WriteStrConfig(i8* nocapture %0, i8* nocapture readnone %1, i8* nocapture readnone %2) {
%4 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%5 = icmp eq i32* %4, null
br i1 %5, label %8, label %6
6: ; preds = %3
%7 = tail call i32 @fclose(i32* %4)
br label %8
8: ; preds = %6, %3
ret void
}
void plug_nl_acronymns_shutdown(void *in_context) {}


x86 assembly (clang, -O0):
<plug_nl_acronymns_shutdown>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<plug_nl_acronymns_shutdown>:
ret

LLVM IR (-O0):
define void @plug_nl_acronymns_shutdown(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @plug_nl_acronymns_shutdown(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __start(int /*<<< orphan*/);
void mainCRTStartup(void) {
  __start(0);
  return;
}


x86 assembly (clang, -O0):
<mainCRTStartup>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <__start@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mainCRTStartup>:
xor    %edi,%edi
jmp    1030 <__start@plt>

LLVM IR (-O0):
define void @mainCRTStartup() {
%1 = call i32 @__start(i32 0)
ret void
}

LLVM IR (-O2):
define void @mainCRTStartup() {
%1 = tail call i32 @__start(i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nextState(double);
int /*<<< orphan*/ paintRobot();
int /*<<< orphan*/ paintTrace();
int /*<<< orphan*/ readControl();
int /*<<< orphan*/ sleep_ms(int);
double time_elapsed();
int /*<<< orphan*/ writeState();
void loop() {
  readControl();
  double dt = time_elapsed();
  nextState(dt);
  writeState();
  paintRobot();
  paintTrace();
  sleep_ms(10);
}


x86 assembly (clang, -O0):
<loop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1080 <readControl@plt>
mov    $0x0,%al
call   1030 <time_elapsed@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <nextState@plt>
mov    $0x0,%al
call   1050 <writeState@plt>
mov    $0x0,%al
call   1070 <paintRobot@plt>
mov    $0x0,%al
call   1090 <paintTrace@plt>
mov    $0xa,%edi
call   1060 <sleep_ms@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop>:
push   %rax
xor    %eax,%eax
call   1080 <readControl@plt>
xor    %eax,%eax
call   1030 <time_elapsed@plt>
call   1040 <nextState@plt>
xor    %eax,%eax
call   1050 <writeState@plt>
xor    %eax,%eax
call   1070 <paintRobot@plt>
xor    %eax,%eax
call   1090 <paintTrace@plt>
mov    $0xa,%edi
pop    %rax
jmp    1060 <sleep_ms@plt>

LLVM IR (-O0):
define void @loop() {
%1 = alloca double
%2 = call i32 (...) @readControl()
%3 = call double (...) @time_elapsed()
store double %3, double* %1
%4 = load double, double* %1
%5 = call i32 @nextState(double %4)
%6 = call i32 (...) @writeState()
%7 = call i32 (...) @paintRobot()
%8 = call i32 (...) @paintTrace()
%9 = call i32 @sleep_ms(i32 10)
ret void
}

LLVM IR (-O2):
define void @loop() {
%1 = tail call i32 (...) @readControl()
%2 = tail call double (...) @time_elapsed()
%3 = tail call i32 @nextState(double %2)
%4 = tail call i32 (...) @writeState()
%5 = tail call i32 (...) @paintRobot()
%6 = tail call i32 (...) @paintTrace()
%7 = tail call i32 @sleep_ms(i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *, int);
void emit_idlocal(char *name, int value) {
  printf("\t\t\t\t\t; %s -> [%d]\n", name, value);
}


x86 assembly (clang, -O0):
<emit_idlocal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emit_idlocal>:
mov    %esi,%edx
mov    %rdi,%rsi
lea    0xee4(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [19 x i8] c"\09\09\09\09\09; %s -> [%d]\0A\00"
define void @emit_idlocal(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
@.str = [19 x i8] c"\09\09\09\09\09; %s -> [%d]\0A\00"
define void @emit_idlocal(i8* %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %1)
ret void
}
void udelay(int i) {}


x86 assembly (clang, -O0):
<udelay>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<udelay>:
ret

LLVM IR (-O0):
define void @udelay(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @udelay(i32 %0) {
ret void
}