#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ clear_RnB();
int /*<<< orphan*/ deselect_chip();
int /*<<< orphan*/ nand_addr(unsigned long);
int /*<<< orphan*/ nand_cmd(int);
int /*<<< orphan*/ select_chip();
int /*<<< orphan*/ wait_RnB();
int NF_page_write(unsigned long addr, unsigned char *buff) {
  int i, ret;
  select_chip();
  clear_RnB();
  nand_cmd(0x80);
  nand_addr(0x00);
  nand_addr(0x00);
  nand_addr(addr & 0xff);
  nand_addr((addr >> 8) & 0xff);
  nand_addr((addr >> 16) & 0xff);
  for (i = 0; i < 1024 * 4; i++) {
    *((unsigned volatile char *)0x70200010) = buff[i];
  }
  nand_cmd(0x10);
  wait_RnB();
  nand_cmd(0x70);
  ret = *((unsigned volatile char *)0x70200010);
  deselect_chip();
  return ret;
}


x86 assembly (clang, -O0):
<NF_page_write>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1060 <select_chip@plt>
mov    $0x0,%al
call   1080 <clear_RnB@plt>
mov    $0x80,%edi
call   1050 <nand_cmd@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <nand_addr@plt>
xor    %eax,%eax
mov    %eax,%edi
call   1040 <nand_addr@plt>
mov    -0x8(%rbp),%rdi
and    $0xff,%rdi
call   1040 <nand_addr@plt>
mov    -0x8(%rbp),%rdi
shr    $0x8,%rdi
and    $0xff,%rdi
call   1040 <nand_addr@plt>
mov    -0x8(%rbp),%rdi
shr    $0x10,%rdi
and    $0xff,%rdi
call   1040 <nand_addr@plt>
movl   $0x0,-0x14(%rbp)
cmpl   $0x1000,-0x14(%rbp)
jge    1206 <NF_page_write+0xa6>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,1),%cl
mov    $0x70200010,%eax
mov    %cl,(%rax)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    11d9 <NF_page_write+0x79>
mov    $0x10,%edi
call   1050 <nand_cmd@plt>
mov    $0x0,%al
call   1070 <wait_RnB@plt>
mov    $0x70,%edi
call   1050 <nand_cmd@plt>
mov    $0x70200010,%eax
mov    (%rax),%al
movzbl %al,%eax
mov    %eax,-0x18(%rbp)
mov    $0x0,%al
call   1030 <deselect_chip@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NF_page_write>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r14
mov    %rdi,%r15
xor    %ebx,%ebx
xor    %eax,%eax
call   1060 <select_chip@plt>
xor    %eax,%eax
call   1080 <clear_RnB@plt>
mov    $0x80,%edi
call   1050 <nand_cmd@plt>
xor    %edi,%edi
call   1040 <nand_addr@plt>
xor    %edi,%edi
call   1040 <nand_addr@plt>
movzbl %r15b,%edi
call   1040 <nand_addr@plt>
mov    %r15,%rax
movzbl %ah,%edi
call   1040 <nand_addr@plt>
shr    $0x10,%r15d
movzbl %r15b,%edi
call   1040 <nand_addr@plt>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
movzbl (%r14,%rbx,1),%eax
mov    %al,0x70200010
movzbl 0x1(%r14,%rbx,1),%eax
mov    %al,0x70200010
movzbl 0x2(%r14,%rbx,1),%eax
mov    %al,0x70200010
movzbl 0x3(%r14,%rbx,1),%eax
mov    %al,0x70200010
movzbl 0x4(%r14,%rbx,1),%eax
mov    %al,0x70200010
movzbl 0x5(%r14,%rbx,1),%eax
mov    %al,0x70200010
movzbl 0x6(%r14,%rbx,1),%eax
mov    %al,0x70200010
movzbl 0x7(%r14,%rbx,1),%eax
mov    %al,0x70200010
add    $0x8,%rbx
cmp    $0x1000,%rbx
jne    11c0 <NF_page_write+0x60>
mov    $0x10,%edi
call   1050 <nand_cmd@plt>
xor    %eax,%eax
call   1070 <wait_RnB@plt>
mov    $0x70,%edi
call   1050 <nand_cmd@plt>
movzbl 0x70200010,%ebx
70
xor    %eax,%eax
call   1030 <deselect_chip@plt>
mov    %ebx,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i32 @NF_page_write(i64 %0, i8* %1) {
%3 = alloca i64
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i64 %0, i64* %3
store i8* %1, i8** %4
%7 = call i32 (...) @select_chip()
%8 = call i32 (...) @clear_RnB()
%9 = call i32 @nand_cmd(i32 128)
%10 = call i32 @nand_addr(i64 0)
%11 = call i32 @nand_addr(i64 0)
%12 = load i64, i64* %3
%13 = and i64 %12, 255
%14 = call i32 @nand_addr(i64 %13)
%15 = load i64, i64* %3
%16 = lshr i64 %15, 8
%17 = and i64 %16, 255
%18 = call i32 @nand_addr(i64 %17)
%19 = load i64, i64* %3
%20 = lshr i64 %19, 16
%21 = and i64 %20, 255
%22 = call i32 @nand_addr(i64 %21)
store i32 0, i32* %5
br label %23
23: ; preds = %32, %2
%24 = load i32, i32* %5
%25 = icmp slt i32 %24, 4096
br i1 %25, label %26, label %35
26: ; preds = %23
%27 = load i8*, i8** %4
%28 = load i32, i32* %5
%29 = sext i32 %28 to i64
%30 = getelementptr inbounds i8, i8* %27, i64 %29
%31 = load i8, i8* %30
store volatile i8 %31, i8* inttoptr (i64 1881145360 to i8*)
br label %32
32: ; preds = %26
%33 = load i32, i32* %5
%34 = add nsw i32 %33, 1
store i32 %34, i32* %5
br label %23
35: ; preds = %23
%36 = call i32 @nand_cmd(i32 16)
%37 = call i32 (...) @wait_RnB()
%38 = call i32 @nand_cmd(i32 112)
%39 = load volatile i8, i8* inttoptr (i64 1881145360 to i8*)
%40 = zext i8 %39 to i32
store i32 %40, i32* %6
%41 = call i32 (...) @deselect_chip()
%42 = load i32, i32* %6
ret i32 %42
}

LLVM IR (-O2):
define i32 @NF_page_write(i64 %0, i8* nocapture %1) {
%3 = tail call i32 (...) @select_chip()
%4 = tail call i32 (...) @clear_RnB()
%5 = tail call i32 @nand_cmd(i32 128)
%6 = tail call i32 @nand_addr(i64 0)
%7 = tail call i32 @nand_addr(i64 0)
%8 = and i64 %0, 255
%9 = tail call i32 @nand_addr(i64 %8)
%10 = lshr i64 %0, 8
%11 = and i64 %10, 255
%12 = tail call i32 @nand_addr(i64 %11)
%13 = lshr i64 %0, 16
%14 = and i64 %13, 255
%15 = tail call i32 @nand_addr(i64 %14)
br label %16
16: ; preds = %16, %2
%17 = phi i64 [ 0, %2 ], [ %41, %16 ]
%18 = getelementptr inbounds i8, i8* %1, i64 %17
%19 = load i8, i8* %18
store volatile i8 %19, i8* inttoptr (i64 1881145360 to i8*)
%20 = or i64 %17, 1
%21 = getelementptr inbounds i8, i8* %1, i64 %20
%22 = load i8, i8* %21
store volatile i8 %22, i8* inttoptr (i64 1881145360 to i8*)
%23 = or i64 %17, 2
%24 = getelementptr inbounds i8, i8* %1, i64 %23
%25 = load i8, i8* %24
store volatile i8 %25, i8* inttoptr (i64 1881145360 to i8*)
%26 = or i64 %17, 3
%27 = getelementptr inbounds i8, i8* %1, i64 %26
%28 = load i8, i8* %27
store volatile i8 %28, i8* inttoptr (i64 1881145360 to i8*)
%29 = or i64 %17, 4
%30 = getelementptr inbounds i8, i8* %1, i64 %29
%31 = load i8, i8* %30
store volatile i8 %31, i8* inttoptr (i64 1881145360 to i8*)
%32 = or i64 %17, 5
%33 = getelementptr inbounds i8, i8* %1, i64 %32
%34 = load i8, i8* %33
store volatile i8 %34, i8* inttoptr (i64 1881145360 to i8*)
%35 = or i64 %17, 6
%36 = getelementptr inbounds i8, i8* %1, i64 %35
%37 = load i8, i8* %36
store volatile i8 %37, i8* inttoptr (i64 1881145360 to i8*)
%38 = or i64 %17, 7
%39 = getelementptr inbounds i8, i8* %1, i64 %38
%40 = load i8, i8* %39
store volatile i8 %40, i8* inttoptr (i64 1881145360 to i8*)
%41 = add nuw nsw i64 %17, 8
%42 = icmp eq i64 %41, 4096
br i1 %42, label %43, label %16
43: ; preds = %16
%44 = tail call i32 @nand_cmd(i32 16)
%45 = tail call i32 (...) @wait_RnB()
%46 = tail call i32 @nand_cmd(i32 112)
%47 = load volatile i8, i8* inttoptr (i64 1881145360 to i8*)
%48 = zext i8 %47 to i32
%49 = tail call i32 (...) @deselect_chip()
ret i32 %48
}