xunge/DecIR huggingface dataset:
const char *plugin_api_info_dir_separator_cb(const void *pointer, void *data,
                                             const char *info_name,
                                             const char *arguments) {
  (void)pointer;
  (void)data;
  (void)info_name;
  (void)arguments;
  return "/";
}


x86 assembly (clang, -O0):
<plugin_api_info_dir_separator_cb>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
lea    0xee5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<plugin_api_info_dir_separator_cb>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [2 x i8] c"/\00"
define i8* @plugin_api_info_dir_separator_cb(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [2 x i8] c"/\00"
define i8* @plugin_api_info_dir_separator_cb(i8* nocapture readnone %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* nocapture readnone %3) {
ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void validaParametrosInput(int argc, char *argv[]) {
  if (argc != 3) {
    printf("\nDebe recibir el número de ip y puerto\n\n");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<validaParametrosInput>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x3,-0x4(%rbp)
je     114f <validaParametrosInput+0x2f>
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<validaParametrosInput>:
cmp    $0x3,%edi
jne    1126 <validaParametrosInput+0x6>
ret
push   %rax
lea    0xed2(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [42 x i8] c"\0ADebe recibir el n\C3\BAmero de ip y puerto\0A\0A\00"
define void @validaParametrosInput(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 3
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = call i32 @printf(i8* getelementptr inbounds ([42 x i8], [42 x i8]* @.str, i64 0, i64 0))
%9 = call i32 @exit(i32 1)
unreachable
10: ; preds = %2
ret void
}

LLVM IR (-O2):
@str = [41 x i8] c"\0ADebe recibir el n\C3\BAmero de ip y puerto\0A\00"
define void @validaParametrosInput(i32 %0, i8** nocapture readnone %1) {
%3 = icmp eq i32 %0, 3
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([41 x i8], [41 x i8]* @str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcpy(char *, char *);
int construct_bridge(char *bridge) {
  if (1) {
    strcpy(bridge, "br-lan0");
    return 0;
  } else {
    strcpy(bridge, "br-wan0");
    return 0;
  }
}


x86 assembly (clang, -O0):
<construct_bridge>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcpy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<construct_bridge>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strcpy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"br-lan0\00"
define i32 @construct_bridge(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strcpy(i8* %3, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"br-lan0\00"
define i32 @construct_bridge(i8* %0) {
%2 = tail call i32 @strcpy(i8* %0, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Type definitions */
struct lobject {
  int dummy;
};
struct lnumber {
  int dummy;
};
struct lemon {
  int dummy;
};

/* Variables and functions */
struct lobject *lnumber_destroy(struct lemon *lemon, struct lnumber *lnumber) {
  return NULL;
}


x86 assembly (clang, -O0):
<lnumber_destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lnumber_destroy>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.lobject = type { i32 }
%struct.lemon = type { i32 }
%struct.lnumber = type { i32 }
define %struct.lobject* @lnumber_destroy(%struct.lemon* %0, %struct.lnumber* %1) {
%3 = alloca %struct.lemon*
%4 = alloca %struct.lnumber*
store %struct.lemon* %0, %struct.lemon** %3
store %struct.lnumber* %1, %struct.lnumber** %4
ret %struct.lobject* null
}

LLVM IR (-O2):
%struct.lobject = type { i32 }
%struct.lemon = type { i32 }
%struct.lnumber = type { i32 }
define noalias %struct.lobject* @lnumber_destroy(%struct.lemon* nocapture readnone %0, %struct.lnumber* nocapture readnone %1) {
ret %struct.lobject* null
}
__attribute__((unused)) void dns_atomic_fence(void) { return; }


x86 assembly (clang, -O0):
<dns_atomic_fence>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_atomic_fence>:
ret

LLVM IR (-O0):
define void @dns_atomic_fence() {
ret void
}

LLVM IR (-O2):
define void @dns_atomic_fence() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __cxa_finalize(int /*<<< orphan*/ *);
int /*<<< orphan*/ _exit(int);
void exit(int status) {
  __cxa_finalize(NULL);
  _exit(status);
}


x86 assembly (clang, -O0):
<exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1040 <__cxa_finalize@plt>
mov    -0x4(%rbp),%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<exit>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
call   1040 <__cxa_finalize@plt>
mov    %ebx,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define void @exit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @__cxa_finalize(i32* null)
%4 = load i32, i32* %2
%5 = call i32 @_exit(i32 %4)
unreachable
}

LLVM IR (-O2):
define void @exit(i32 %0) {
%2 = tail call i32 @__cxa_finalize(i32* null)
%3 = tail call i32 @_exit(i32 %0)
unreachable
}
unsigned int aux_do_get_phy_addr(unsigned int vaddr) {
  if ((vaddr & 0xff000000) == 0xf4000000)
    vaddr = ((vaddr & 0xffff) | 0x132c0000);
  return vaddr;
}


x86 assembly (clang, -O0):
<aux_do_get_phy_addr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff000000,%eax
cmp    $0xf4000000,%eax
jne    112a <aux_do_get_phy_addr+0x2a>
mov    -0x4(%rbp),%eax
and    $0xffff,%eax
or     $0x132c0000,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aux_do_get_phy_addr>:
mov    %edi,%ecx
and    $0xff000000,%ecx
movzwl %di,%eax
or     $0x132c0000,%eax
cmp    $0xf4000000,%ecx
cmovne %edi,%eax
ret

LLVM IR (-O0):
define i32 @aux_do_get_phy_addr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -16777216
%5 = icmp eq i32 %4, -201326592
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, i32* %2
%8 = and i32 %7, 65535
%9 = or i32 %8, 321650688
store i32 %9, i32* %2
br label %10
10: ; preds = %6, %1
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @aux_do_get_phy_addr(i32 %0) {
%2 = and i32 %0, -16777216
%3 = icmp eq i32 %2, -201326592
%4 = and i32 %0, 65535
%5 = or i32 %4, 321650688
%6 = select i1 %3, i32 %5, i32 %0
ret i32 %6
}
int sdtools_isinepsilon(double x) {
  return (x >= 0.0 - 0.000000000001 && x <= 0.0 + 0.000000000001) ? 1 : 0;
}


x86 assembly (clang, -O0):
<sdtools_isinepsilon>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xor    %eax,%eax
movsd  0xee8(%rip),%xmm1
ucomisd %xmm1,%xmm0
mov    %al,-0x9(%rbp)
jb     1138 <sdtools_isinepsilon+0x38>
movsd  0xedb(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
setae  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdtools_isinepsilon>:
ucomisd 0xef8(%rip),%xmm0
setae  %al
movsd  0xef5(%rip),%xmm1
ucomisd %xmm0,%xmm1
setae  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @sdtools_isinepsilon(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp oge double %3, 0xBD719799812DEA11
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load double, double* %2
%7 = fcmp ole double %6, 0x3D719799812DEA11
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 1, i32 0
ret i32 %11
}

LLVM IR (-O2):
define i32 @sdtools_isinepsilon(double %0) {
%2 = fcmp oge double %0, 0xBD719799812DEA11
%3 = fcmp ole double %0, 0x3D719799812DEA11
%4 = and i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
unsigned short swap16(unsigned short x) {
  unsigned char *ptr = (unsigned char *)&x;
  return (unsigned short)((unsigned short)ptr[0] << 8 | ptr[1]);
}


x86 assembly (clang, -O0):
<swap16>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
lea    -0x2(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
movzwl %ax,%eax
shl    $0x8,%eax
mov    -0x10(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap16>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @swap16(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8*
store i16 %0, i16* %2
%4 = bitcast i16* %2 to i8*
store i8* %4, i8** %3
%5 = load i8*, i8** %3
%6 = getelementptr inbounds i8, i8* %5, i64 0
%7 = load i8, i8* %6
%8 = zext i8 %7 to i16
%9 = zext i16 %8 to i32
%10 = shl i32 %9, 8
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i64 1
%13 = load i8, i8* %12
%14 = zext i8 %13 to i32
%15 = or i32 %10, %14
%16 = trunc i32 %15 to i16
ret i16 %16
}

LLVM IR (-O2):
define zeroext i16 @swap16(i16 zeroext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *get_file(char *, char *);
scalar_t__ path_exists(char *);
char *get_file_if_exist(char *home, char *file) {
  char *path = get_file(home, file);
  if (path_exists(path))
    return path;
  free(path);
  return NULL;
}


x86 assembly (clang, -O0):
<get_file_if_exist>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1050 <get_file@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
call   1040 <path_exists@plt>
cmp    $0x0,%rax
je     1171 <get_file_if_exist+0x41>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1182 <get_file_if_exist+0x52>
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_file_if_exist>:
push   %rbx
call   1050 <get_file@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1040 <path_exists@plt>
test   %rax,%rax
jne    1150 <get_file_if_exist+0x20>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @get_file_if_exist(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i8* @get_file(i8* %7, i8* %8)
store i8* %9, i8** %6
%10 = load i8*, i8** %6
%11 = call i64 @path_exists(i8* %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = load i8*, i8** %6
store i8* %14, i8** %3
br label %18
15: ; preds = %2
%16 = load i8*, i8** %6
%17 = call i32 @free(i8* %16)
store i8* null, i8** %3
br label %18
18: ; preds = %15, %13
%19 = load i8*, i8** %3
ret i8* %19
}

LLVM IR (-O2):
define i8* @get_file_if_exist(i8* %0, i8* %1) {
%3 = tail call i8* @get_file(i8* %0, i8* %1)
%4 = tail call i64 @path_exists(i8* %3)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %2
%7 = tail call i32 @free(i8* %3)
br label %8
8: ; preds = %2, %6
%9 = phi i8* [ null, %6 ], [ %3, %2 ]
ret i8* %9
}
/* Type definitions */
struct create_args_info {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ create_cmdline_parser_release(struct create_args_info *);
void create_cmdline_parser_free(struct create_args_info *args_info) {
  create_cmdline_parser_release(args_info);
}


x86 assembly (clang, -O0):
<create_cmdline_parser_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <create_cmdline_parser_release@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_cmdline_parser_free>:
jmp    1030 <create_cmdline_parser_release@plt>

LLVM IR (-O0):
%struct.create_args_info = type { i32 }
define void @create_cmdline_parser_free(%struct.create_args_info* %0) {
%2 = alloca %struct.create_args_info*
store %struct.create_args_info* %0, %struct.create_args_info** %2
%3 = load %struct.create_args_info*, %struct.create_args_info** %2
%4 = call i32 @create_cmdline_parser_release(%struct.create_args_info* %3)
ret void
}

LLVM IR (-O2):
%struct.create_args_info = type { i32 }
define void @create_cmdline_parser_free(%struct.create_args_info* %0) {
%2 = tail call i32 @create_cmdline_parser_release(%struct.create_args_info* %0)
ret void
}
/* Variables and functions */
float endian_read_float(void const *, int);
float le_read_float(const void *ptr) { return endian_read_float(ptr, 1); }


x86 assembly (clang, -O0):
<le_read_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <endian_read_float@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<le_read_float>:
mov    $0x1,%esi
jmp    1030 <endian_read_float@plt>

LLVM IR (-O0):
define float @le_read_float(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call float @endian_read_float(i8* %3, i32 1)
ret float %4
}

LLVM IR (-O2):
define float @le_read_float(i8* %0) {
%2 = tail call float @endian_read_float(i8* %0, i32 1)
ret float %2
}
void test_a() { int a; }


x86 assembly (clang, -O0):
<test_a>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_a>:
ret

LLVM IR (-O0):
define void @test_a() {
%1 = alloca i32
ret void
}

LLVM IR (-O2):
define void @test_a() {
ret void
}
float ceilf(float x) { return 0.0; }


x86 assembly (clang, -O0):
<ceilf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceilf>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @ceilf(float %0) {
%2 = alloca float
store float %0, float* %2
ret float 0.000000e+00
}

LLVM IR (-O2):
define float @ceilf(float %0) {
ret float 0.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ endwin();
int tty_fix() {
  endwin();
  return 0;
}


x86 assembly (clang, -O0):
<tty_fix>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <endwin@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tty_fix>:
push   %rax
xor    %eax,%eax
call   1030 <endwin@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @tty_fix() {
%1 = call i32 (...) @endwin()
ret i32 0
}

LLVM IR (-O2):
define i32 @tty_fix() {
%1 = tail call i32 (...) @endwin()
ret i32 0
}
void foo225(int p) {}


x86 assembly (clang, -O0):
<foo225>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo225>:
ret

LLVM IR (-O0):
define void @foo225(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo225(i32 %0) {
ret void
}
/* Variables and functions */
double readClock(char const *);
int /*<<< orphan*/ writeClock(char const *, double);
void resetClock(const char *clockfile, const char *init_timefile) {
  double DEFAULT_TIME = readClock(init_timefile);
  writeClock(clockfile, DEFAULT_TIME);
  return;
}


x86 assembly (clang, -O0):
<resetClock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <readClock@plt>
movsd  %xmm0,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
movsd  -0x18(%rbp),%xmm0
call   1030 <writeClock@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resetClock>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1040 <readClock@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <writeClock@plt>

LLVM IR (-O0):
define void @resetClock(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca double
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = call double @readClock(i8* %6)
store double %7, double* %5
%8 = load i8*, i8** %3
%9 = load double, double* %5
%10 = call i32 @writeClock(i8* %8, double %9)
ret void
}

LLVM IR (-O2):
define void @resetClock(i8* %0, i8* %1) {
%3 = tail call double @readClock(i8* %1)
%4 = tail call i32 @writeClock(i8* %0, double %3)
ret void
}
int test_imm_01int16_mem(short *val) {
  return ((*val) & (-0x01 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_01int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xffffffff,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_01int16_mem>:
cmpw   $0x0,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_01int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, -1
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_01int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int solcon_append_dobldobl_solution(int n, int m, double *sol) {
  int *a, fail;
  int b[2];
  b[0] = n;
  b[1] = m;
  fail = _ada_use_c2phc(346, a, b, sol);
  return fail;
}


x86 assembly (clang, -O0):
<solcon_append_dobldobl_solution>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x18(%rbp),%rsi
lea    -0x24(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x15a,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<solcon_append_dobldobl_solution>:
push   %rax
mov    %rdx,%rcx
mov    %edi,(%rsp)
mov    %esi,0x4(%rsp)
mov    %rsp,%rdx
mov    $0x15a,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @solcon_append_dobldobl_solution(i32 %0, i32 %1, double* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
%7 = alloca i32*
%8 = alloca i32
%9 = alloca [2 x i32]
store i32 %0, i32* %4
store i32 %1, i32* %5
store double* %2, double** %6
%10 = load i32, i32* %4
%11 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
store i32 %10, i32* %11
%12 = load i32, i32* %5
%13 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 1
store i32 %12, i32* %13
%14 = load i32*, i32** %7
%15 = getelementptr inbounds [2 x i32], [2 x i32]* %9, i64 0, i64 0
%16 = load double*, double** %6
%17 = call i32 @_ada_use_c2phc(i32 346, i32* %14, i32* %15, double* %16)
store i32 %17, i32* %8
%18 = load i32, i32* %8
ret i32 %18
}

LLVM IR (-O2):
define i32 @solcon_append_dobldobl_solution(i32 %0, i32 %1, double* %2) {
%4 = alloca [2 x i32]
%5 = bitcast [2 x i32]* %4 to i8*
%6 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 0
store i32 %0, i32* %6
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %4, i64 0, i64 1
store i32 %1, i32* %7
%8 = call i32 @_ada_use_c2phc(i32 346, i32* undef, i32* %6, double* %2)
ret i32 %8
}
void p1(void) { char b[1025]; }


x86 assembly (clang, -O0):
<p1>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p1>:
ret

LLVM IR (-O0):
define void @p1() {
%1 = alloca [1025 x i8]
ret void
}

LLVM IR (-O2):
define void @p1() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ sleep_byte;

/* Variables and functions */
int write(int, unsigned char *, int);
int sleep_device(int fd) {
  unsigned char sleep_byte[] = {0x01};
  return write(fd, sleep_byte, sizeof(sleep_byte));
}


x86 assembly (clang, -O0):
<sleep_device>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0xedf(%rip),%al
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x5(%rbp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep_device>:
push   %rax
movb   $0x1,0x7(%rsp)
lea    0x7(%rsp),%rsi
mov    $0x1,%edx
call   1030 <write@plt>
pop    %rcx
ret

LLVM IR (-O0):
@__const.sleep_device.sleep_byte = [1 x i8] c"\01"
define i32 @sleep_device(i32 %0) {
%2 = alloca i32
%3 = alloca [1 x i8]
store i32 %0, i32* %2
%4 = bitcast [1 x i8]* %3 to i8*
%5 = load i32, i32* %2
%6 = getelementptr inbounds [1 x i8], [1 x i8]* %3, i64 0, i64 0
%7 = call i32 @write(i32 %5, i8* %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @sleep_device(i32 %0) {
%2 = alloca [1 x i8]
%3 = getelementptr inbounds [1 x i8], [1 x i8]* %2, i64 0, i64 0
store i8 1, i8* %3
%4 = call i32 @write(i32 %0, i8* %3, i32 1)
ret i32 %4
}
/* Variables and functions */
int uncompress(unsigned char *, unsigned long *, unsigned char const *,
               unsigned long);
int decode_zip(unsigned char *dest, unsigned long *destLen,
               const unsigned char *source, unsigned long sourceLen) {
  return uncompress(dest, destLen, source, sourceLen);
}


x86 assembly (clang, -O0):
<decode_zip>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <uncompress@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<decode_zip>:
jmp    1030 <uncompress@plt>

LLVM IR (-O0):
define i32 @decode_zip(i8* %0, i64* %1, i8* %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i64*
%7 = alloca i8*
%8 = alloca i64
store i8* %0, i8** %5
store i64* %1, i64** %6
store i8* %2, i8** %7
store i64 %3, i64* %8
%9 = load i8*, i8** %5
%10 = load i64*, i64** %6
%11 = load i8*, i8** %7
%12 = load i64, i64* %8
%13 = call i32 @uncompress(i8* %9, i64* %10, i8* %11, i64 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @decode_zip(i8* %0, i64* %1, i8* %2, i64 %3) {
%5 = tail call i32 @uncompress(i8* %0, i64* %1, i8* %2, i64 %3)
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint32_t;

/* Variables and functions */
uint32_t pgm_read_dword(const void *s) { return *(const uint32_t *)s; }


x86 assembly (clang, -O0):
<pgm_read_dword>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pgm_read_dword>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @pgm_read_dword(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @pgm_read_dword(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(void *, void const *, int);
void *smalloc(int);
void *mem_ndup(const void *ptr, int length) {
  void *tmp;
  tmp = smalloc(length);
  memcpy(tmp, ptr, length);
  return tmp;
}


x86 assembly (clang, -O0):
<mem_ndup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1040 <smalloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_ndup>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebp
mov    %rdi,%r14
mov    %esi,%edi
call   1040 <smalloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
mov    %ebp,%edx
call   1030 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @mem_ndup(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i8* @smalloc(i32 %6)
store i8* %7, i8** %5
%8 = load i8*, i8** %5
%9 = load i8*, i8** %3
%10 = load i32, i32* %4
%11 = call i32 @memcpy(i8* %8, i8* %9, i32 %10)
%12 = load i8*, i8** %5
ret i8* %12
}

LLVM IR (-O2):
define i8* @mem_ndup(i8* %0, i32 %1) {
%3 = tail call i8* @smalloc(i32 %1)
%4 = tail call i32 @memcpy(i8* %3, i8* %0, i32 %1)
ret i8* %3
}
/* Type definitions */
struct dthr_event {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ dthr_eventq_to_runq(struct dthr_event *, int);
void dthr_event_signal_no_yield(struct dthr_event *event) {
  ;
  ;
  dthr_eventq_to_runq(event, 1);
  ;
  ;
}


x86 assembly (clang, -O0):
<dthr_event_signal_no_yield>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <dthr_eventq_to_runq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dthr_event_signal_no_yield>:
mov    $0x1,%esi
jmp    1030 <dthr_eventq_to_runq@plt>

LLVM IR (-O0):
%struct.dthr_event = type { i32 }
define void @dthr_event_signal_no_yield(%struct.dthr_event* %0) {
%2 = alloca %struct.dthr_event*
store %struct.dthr_event* %0, %struct.dthr_event** %2
%3 = load %struct.dthr_event*, %struct.dthr_event** %2
%4 = call i32 @dthr_eventq_to_runq(%struct.dthr_event* %3, i32 1)
ret void
}

LLVM IR (-O2):
%struct.dthr_event = type { i32 }
define void @dthr_event_signal_no_yield(%struct.dthr_event* %0) {
%2 = tail call i32 @dthr_eventq_to_runq(%struct.dthr_event* %0, i32 1)
ret void
}
/* Variables and functions */
double errorBase(double, double, double, double);
double errorMult(double A, double errorA, double B, double errorB) {
  return errorBase(A, errorA, B, errorB) * (A * B);
}


x86 assembly (clang, -O0):
<errorMult>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm2
movsd  -0x20(%rbp),%xmm3
call   1030 <errorBase@plt>
movsd  -0x8(%rbp),%xmm1
mulsd  -0x18(%rbp),%xmm1
mulsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<errorMult>:
sub    $0x18,%rsp
movsd  %xmm2,0x8(%rsp)
movsd  %xmm0,0x10(%rsp)
call   1030 <errorBase@plt>
movsd  0x10(%rsp),%xmm1
mulsd  0x8(%rsp),%xmm1
mulsd  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @errorMult(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %5
%10 = load double, double* %6
%11 = load double, double* %7
%12 = load double, double* %8
%13 = call double @errorBase(double %9, double %10, double %11, double %12)
%14 = load double, double* %5
%15 = load double, double* %7
%16 = fmul double %14, %15
%17 = fmul double %13, %16
ret double %17
}

LLVM IR (-O2):
define double @errorMult(double %0, double %1, double %2, double %3) {
%5 = tail call double @errorBase(double %0, double %1, double %2, double %3)
%6 = fmul double %0, %2
%7 = fmul double %6, %5
ret double %7
}
void write_int32(char *buffer, int value) {
  unsigned char *point = (unsigned char *)buffer;
  point[0] = (value >> 24) & 0xff;
  point[1] = (value >> 16) & 0xff;
  point[2] = (value >> 8) & 0xff;
  point[3] = (value >> 0) & 0xff;
}


x86 assembly (clang, -O0):
<write_int32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
sar    $0x18,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
sar    $0x10,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0xc(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0xc(%rbp),%eax
sar    $0x0,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_int32>:
bswap  %esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @write_int32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
%7 = load i32, i32* %4
%8 = ashr i32 %7, 24
%9 = and i32 %8, 255
%10 = trunc i32 %9 to i8
%11 = load i8*, i8** %5
%12 = getelementptr inbounds i8, i8* %11, i64 0
store i8 %10, i8* %12
%13 = load i32, i32* %4
%14 = ashr i32 %13, 16
%15 = and i32 %14, 255
%16 = trunc i32 %15 to i8
%17 = load i8*, i8** %5
%18 = getelementptr inbounds i8, i8* %17, i64 1
store i8 %16, i8* %18
%19 = load i32, i32* %4
%20 = ashr i32 %19, 8
%21 = and i32 %20, 255
%22 = trunc i32 %21 to i8
%23 = load i8*, i8** %5
%24 = getelementptr inbounds i8, i8* %23, i64 2
store i8 %22, i8* %24
%25 = load i32, i32* %4
%26 = ashr i32 %25, 0
%27 = and i32 %26, 255
%28 = trunc i32 %27 to i8
%29 = load i8*, i8** %5
%30 = getelementptr inbounds i8, i8* %29, i64 3
store i8 %28, i8* %30
ret void
}

LLVM IR (-O2):
define void @write_int32(i8* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 24
%4 = trunc i32 %3 to i8
store i8 %4, i8* %0
%5 = lshr i32 %1, 16
%6 = trunc i32 %5 to i8
%7 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %6, i8* %7
%8 = lshr i32 %1, 8
%9 = trunc i32 %8 to i8
%10 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %9, i8* %10
%11 = trunc i32 %1 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGUSR1;
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ raise(int /*<<< orphan*/);
void sigint_handler(int signo) {
  printf("sigint handled!\n");
  raise(SIGUSR1);
}


x86 assembly (clang, -O0):
<sigint_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1040 <printf@plt>
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
call   1030 <raise@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigint_handler>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <puts@plt>
mov    0x2eb4(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1030 <raise@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"sigint handled!\0A\00"
@SIGUSR1 = global i32 0
define void @sigint_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @SIGUSR1
%5 = call i32 @raise(i32 %4)
ret void
}

LLVM IR (-O2):
@SIGUSR1 = global i32 0
@str = [16 x i8] c"sigint handled!\00"
define void @sigint_handler(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%3 = load i32, i32* @SIGUSR1
%4 = tail call i32 @raise(i32 %3)
ret void
}
/* Variables and functions */
void *_talloc_named_const(void const *, size_t, char const *);
void *_talloc_array(const void *ctx, size_t el_size, unsigned count,
                    const char *name) {
  if (count >= 0x10000000 / el_size) {
    return NULL;
  }
  return _talloc_named_const(ctx, el_size * count, name);
}


x86 assembly (clang, -O0):
<_talloc_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x1c(%rbp),%eax
mov    %rax,-0x30(%rbp)
mov    $0x10000000,%eax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x18(%rbp)
mov    %rax,%rcx
mov    -0x30(%rbp),%rax
cmp    %rcx,%rax
jb     1158 <_talloc_array+0x48>
movq   $0x0,-0x8(%rbp)
jmp    1174 <_talloc_array+0x64>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%eax
imul   %rax,%rsi
mov    -0x28(%rbp),%rdx
call   1030 <_talloc_named_const@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_talloc_array>:
mov    %edx,%r8d
cmp    $0x10000000,%rsi
ja     112d <_talloc_array+0x1d>
mov    $0x10000000,%eax
xor    %edx,%edx
div    %esi
cmp    %r8,%rax
ja     1134 <_talloc_array+0x24>
xor    %eax,%eax
ret
xor    %eax,%eax
cmp    %r8,%rax
jbe    112a <_talloc_array+0x1a>
imul   %rsi,%r8
mov    %r8,%rsi
mov    %rcx,%rdx
jmp    1030 <_talloc_named_const@plt>

LLVM IR (-O0):
define i8* @_talloc_array(i8* %0, i64 %1, i32 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i32
%9 = alloca i8*
store i8* %0, i8** %6
store i64 %1, i64* %7
store i32 %2, i32* %8
store i8* %3, i8** %9
%10 = load i32, i32* %8
%11 = zext i32 %10 to i64
%12 = load i64, i64* %7
%13 = udiv i64 268435456, %12
%14 = icmp uge i64 %11, %13
br i1 %14, label %15, label %16
15: ; preds = %4
store i8* null, i8** %5
br label %24
16: ; preds = %4
%17 = load i8*, i8** %6
%18 = load i64, i64* %7
%19 = load i32, i32* %8
%20 = zext i32 %19 to i64
%21 = mul i64 %18, %20
%22 = load i8*, i8** %9
%23 = call i8* @_talloc_named_const(i8* %17, i64 %21, i8* %22)
store i8* %23, i8** %5
br label %24
24: ; preds = %16, %15
%25 = load i8*, i8** %5
ret i8* %25
}

LLVM IR (-O2):
define i8* @_talloc_array(i8* %0, i64 %1, i32 %2, i8* %3) {
%5 = zext i32 %2 to i64
%6 = udiv i64 268435456, %1
%7 = icmp ugt i64 %6, %5
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = mul i64 %5, %1
%10 = tail call i8* @_talloc_named_const(i8* %0, i64 %9, i8* %3)
br label %11
11: ; preds = %4, %8
%12 = phi i8* [ %10, %8 ], [ null, %4 ]
ret i8* %12
}
/* Variables and functions */
int stack_grows_down_helper(int *);
bool stack_grows_down(void) {
  int i;
  return stack_grows_down_helper(&i);
}


x86 assembly (clang, -O0):
<stack_grows_down>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1030 <stack_grows_down_helper@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stack_grows_down>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <stack_grows_down_helper@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @stack_grows_down() {
%1 = alloca i32
%2 = call i32 @stack_grows_down_helper(i32* %1)
ret i32 %2
}

LLVM IR (-O2):
define i32 @stack_grows_down() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @stack_grows_down_helper(i32* %1)
ret i32 %3
}
/* Type definitions */
struct lifo {
  int dummy;
};

/* Variables and functions */
double logb(double);
double pop(struct lifo *);
double opr_logb(struct lifo *stack) {
  double op = pop(stack);
  return logb(op);
}


x86 assembly (clang, -O0):
<opr_logb>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <pop@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <logb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<opr_logb>:
push   %rax
call   1040 <pop@plt>
pop    %rax
jmp    1030 <logb@plt>

LLVM IR (-O0):
%struct.lifo = type { i32 }
define double @opr_logb(%struct.lifo* %0) {
%2 = alloca %struct.lifo*
%3 = alloca double
store %struct.lifo* %0, %struct.lifo** %2
%4 = load %struct.lifo*, %struct.lifo** %2
%5 = call double @pop(%struct.lifo* %4)
store double %5, double* %3
%6 = load double, double* %3
%7 = call double @logb(double %6)
ret double %7
}

LLVM IR (-O2):
%struct.lifo = type { i32 }
define double @opr_logb(%struct.lifo* %0) {
%2 = tail call double @pop(%struct.lifo* %0)
%3 = tail call double @logb(double %2)
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ __NR_socket;
long syscall(int /*<<< orphan*/, long volatile, long volatile, long volatile);
long syz_init_net_socket(volatile long domain, volatile long type,
                         volatile long proto) {
  return syscall(__NR_socket, domain, type, proto);
}


x86 assembly (clang, -O0):
<syz_init_net_socket>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ebd(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syz_init_net_socket>:
mov    %rdi,-0x8(%rsp)
mov    %rsi,-0x10(%rsp)
mov    %rdx,-0x18(%rsp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rsp),%rsi
mov    -0x10(%rsp),%rdx
mov    -0x18(%rsp),%rcx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@__NR_socket = global i32 0
define i64 @syz_init_net_socket(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store volatile i64 %0, i64* %4
store volatile i64 %1, i64* %5
store volatile i64 %2, i64* %6
%7 = load i32, i32* @__NR_socket
%8 = load volatile i64, i64* %4
%9 = load volatile i64, i64* %5
%10 = load volatile i64, i64* %6
%11 = call i64 @syscall(i32 %7, i64 %8, i64 %9, i64 %10)
ret i64 %11
}

LLVM IR (-O2):
@__NR_socket = global i32 0
define i64 @syz_init_net_socket(i64 %0, i64 %1, i64 %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store volatile i64 %0, i64* %4
store volatile i64 %1, i64* %5
store volatile i64 %2, i64* %6
%7 = load i32, i32* @__NR_socket
%8 = load volatile i64, i64* %4
%9 = load volatile i64, i64* %5
%10 = load volatile i64, i64* %6
%11 = tail call i64 @syscall(i32 %7, i64 %8, i64 %9, i64 %10)
ret i64 %11
}
void foo059(int p) {}


x86 assembly (clang, -O0):
<foo059>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo059>:
ret

LLVM IR (-O0):
define void @foo059(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @foo059(i32 %0) {
ret void
}
unsigned char decimal_to_bcd(unsigned char d) {
  return (((d / 10) << 4) & 0xF0) | ((d % 10) & 0x0F);
}


x86 assembly (clang, -O0):
<decimal_to_bcd>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
shl    $0x4,%eax
and    $0xf0,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
mov    $0xa,%ecx
cltd
idiv   %ecx
mov    -0x8(%rbp),%eax
and    $0xf,%edx
or     %edx,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<decimal_to_bcd>:
mov    %edi,%eax
imul   $0xcd,%edi,%ecx
shr    $0xb,%ecx
mov    %ecx,%edx
shl    $0x4,%dl
add    %ecx,%ecx
lea    (%rcx,%rcx,4),%ecx
sub    %cl,%al
or     %dl,%al
ret

LLVM IR (-O0):
define zeroext i8 @decimal_to_bcd(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = sdiv i32 %4, 10
%6 = shl i32 %5, 4
%7 = and i32 %6, 240
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = srem i32 %9, 10
%11 = and i32 %10, 15
%12 = or i32 %7, %11
%13 = trunc i32 %12 to i8
ret i8 %13
}

LLVM IR (-O2):
define zeroext i8 @decimal_to_bcd(i8 zeroext %0) {
%2 = udiv i8 %0, 10
%3 = shl i8 %2, 4
%4 = urem i8 %0, 10
%5 = or i8 %3, %4
ret i8 %5
}
float coeffX(int x) { return (!x ? 0.707 : 1); }


x86 assembly (clang, -O0):
<coeffX>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
movsd  0xee8(%rip),%xmm0
movsd  0xee8(%rip),%xmm1
movsd  %xmm1,-0x18(%rbp)
test   $0x1,%al
movsd  %xmm0,-0x10(%rbp)
jne    113c <coeffX+0x3c>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<coeffX>:
xor    %eax,%eax
test   %edi,%edi
sete   %al
lea    0xef2(%rip),%rcx
movss  (%rcx,%rax,4),%xmm0
ret

LLVM IR (-O0):
define float @coeffX(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = xor i1 %4, true
%6 = zext i1 %5 to i64
%7 = select i1 %5, double 7.070000e-01, double 1.000000e+00
%8 = fptrunc double %7 to float
ret float %8
}

LLVM IR (-O2):
define float @coeffX(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, float 0x3FE69FBE80000000, float 1.000000e+00
ret float %3
}
int blkmk_flsl(unsigned long n) {
  int i;
  for (i = 0; n; ++i)
    n >>= 1;
  return i;
}


x86 assembly (clang, -O0):
<blkmk_flsl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1134 <blkmk_flsl+0x34>
mov    -0x8(%rbp),%rax
shr    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <blkmk_flsl+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<blkmk_flsl>:
xor    %eax,%eax
test   %rdi,%rdi
je     111f <blkmk_flsl+0x1f>
mov    %rdi,%rcx
nopw   0x0(%rax,%rax,1)
shr    %rcx
add    $0x1,%eax
cmp    $0x1,%rdi
mov    %rcx,%rdi
ja     1110 <blkmk_flsl+0x10>
ret

LLVM IR (-O0):
define i32 @blkmk_flsl(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i64, i64* %2
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %4
%8 = load i64, i64* %2
%9 = lshr i64 %8, 1
store i64 %9, i64* %2
br label %10
10: ; preds = %7
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
br label %4
13: ; preds = %4
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @blkmk_flsl(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i64 [ %6, %3 ], [ %0, %1 ]
%6 = lshr i64 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp ult i64 %5, 2
br i1 %8, label %9, label %3
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Type definitions */
typedef int int32_t;
typedef int int16_t;

/* Variables and functions */
int32_t mul(int16_t in, int16_t v) { return in * (int32_t)v; }


x86 assembly (clang, -O0):
<mul>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @mul(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @mul(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isgraph(int);
void t_isgraph_0x0d() {
  Assert_real((isgraph(13) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              70, ("isgraph should be 0 for 0x0d"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x0d>:
push   %rbp
mov    %rsp,%rbp
mov    $0xd,%edi
call   1040 <isgraph@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x46,%edx
lea    0xf5b(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x0d>:
push   %rax
mov    $0xd,%edi
call   1040 <isgraph@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x46,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x0d\00"
define void @t_isgraph_0x0d() {
%1 = call i64 @isgraph(i32 13)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 70, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [29 x i8] c"isgraph should be 0 for 0x0d\00"
define void @t_isgraph_0x0d() {
%1 = tail call i64 @isgraph(i32 13)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 70, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
void to_uppercase(char *p_src, char *p_dest) {
  if (p_src != NULL && p_dest != NULL) {
    if ('a' <= *p_src && *p_src <= 'z') {
      *p_dest = 'A' + (*p_src - 'a');
    } else {
      *p_dest = *p_src;
    }
  }
}


x86 assembly (clang, -O0):
<to_uppercase>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1171 <to_uppercase+0x71>
cmpq   $0x0,-0x10(%rbp)
je     1171 <to_uppercase+0x71>
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     1160 <to_uppercase+0x60>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x7a,%eax
jg     1160 <to_uppercase+0x60>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
sub    $0x61,%eax
add    $0x41,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
jmp    116c <to_uppercase+0x6c>
mov    -0x8(%rbp),%rax
mov    (%rax),%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
jmp    1171 <to_uppercase+0x71>
pop    %rbp
ret

x86 assembly (clang, -O2):
<to_uppercase>:
test   %rdi,%rdi
je     111e <to_uppercase+0x1e>
test   %rsi,%rsi
je     111e <to_uppercase+0x1e>
movzbl (%rdi),%eax
lea    -0x61(%rax),%ecx
lea    -0x20(%rax),%edx
cmp    $0x1a,%cl
movzbl %dl,%ecx
cmovae %eax,%ecx
mov    %cl,(%rsi)
ret

LLVM IR (-O0):
define void @to_uppercase(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %33
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %33
10: ; preds = %7
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp sle i32 97, %13
br i1 %14, label %15, label %28
15: ; preds = %10
%16 = load i8*, i8** %3
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp sle i32 %18, 122
br i1 %19, label %20, label %28
20: ; preds = %15
%21 = load i8*, i8** %3
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = sub nsw i32 %23, 97
%25 = add nsw i32 65, %24
%26 = trunc i32 %25 to i8
%27 = load i8*, i8** %4
store i8 %26, i8* %27
br label %32
28: ; preds = %15, %10
%29 = load i8*, i8** %3
%30 = load i8, i8* %29
%31 = load i8*, i8** %4
store i8 %30, i8* %31
br label %32
32: ; preds = %28, %20
br label %33
33: ; preds = %32, %7, %2
ret void
}

LLVM IR (-O2):
define void @to_uppercase(i8* %0, i8* writeonly %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne i8* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %12
6: ; preds = %2
%7 = load i8, i8* %0
%8 = add i8 %7, -97
%9 = icmp ult i8 %8, 26
%10 = add nsw i8 %7, -32
%11 = select i1 %9, i8 %10, i8 %7
store i8 %11, i8* %1
br label %12
12: ; preds = %6, %2
ret void
}