#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ TSC_WrReg(int, int);
uint32_t TSC_Init(void) {
  int i;
  TSC_WrReg(0x03, 0x02);
  for (i = 0; i < 180000; i++)
    ;
  TSC_WrReg(0x04, 0x0C);
  TSC_WrReg(0x0A, 0x07);
  TSC_WrReg(0x20, 0x69);
  for (i = 0; i < 36000; i++)
    ;
  TSC_WrReg(0x21, 0x01);
  TSC_WrReg(0x41, 0xC2);
  TSC_WrReg(0x4A, 0x01);
  TSC_WrReg(0x4B, 0x01);
  TSC_WrReg(0x4B, 0x00);
  TSC_WrReg(0x56, 0x07);
  TSC_WrReg(0x58, 0x01);
  TSC_WrReg(0x17, 0x00);
  TSC_WrReg(0x40, 0x01);
  TSC_WrReg(0x0B, 0xFF);
  return (0);
}


x86 assembly (clang, -O0):
<TSC_Init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x3,%edi
mov    $0x2,%esi
call   1030 <TSC_WrReg@plt>
movl   $0x0,-0x4(%rbp)
cmpl   $0x2bf20,-0x4(%rbp)
jge    114e <TSC_Init+0x3e>
jmp    1140 <TSC_Init+0x30>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112e <TSC_Init+0x1e>
mov    $0x4,%edi
mov    $0xc,%esi
call   1030 <TSC_WrReg@plt>
mov    $0xa,%edi
mov    $0x7,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x20,%edi
mov    $0x69,%esi
call   1030 <TSC_WrReg@plt>
movl   $0x0,-0x4(%rbp)
cmpl   $0x8ca0,-0x4(%rbp)
jge    11a2 <TSC_Init+0x92>
jmp    1194 <TSC_Init+0x84>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1182 <TSC_Init+0x72>
mov    $0x21,%edi
mov    $0x1,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x41,%edi
mov    $0xc2,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x4a,%edi
mov    $0x1,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x4b,%edi
mov    $0x1,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x4b,%edi
xor    %esi,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x56,%edi
mov    $0x7,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x58,%edi
mov    $0x1,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x17,%edi
xor    %esi,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x40,%edi
mov    $0x1,%esi
call   1030 <TSC_WrReg@plt>
mov    $0xb,%edi
mov    $0xff,%esi
call   1030 <TSC_WrReg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TSC_Init>:
push   %rax
mov    $0x3,%edi
mov    $0x2,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x4,%edi
mov    $0xc,%esi
call   1030 <TSC_WrReg@plt>
mov    $0xa,%edi
mov    $0x7,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x20,%edi
mov    $0x69,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x21,%edi
mov    $0x1,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x41,%edi
mov    $0xc2,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x4a,%edi
mov    $0x1,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x4b,%edi
mov    $0x1,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x4b,%edi
xor    %esi,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x56,%edi
mov    $0x7,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x58,%edi
mov    $0x1,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x17,%edi
xor    %esi,%esi
call   1030 <TSC_WrReg@plt>
mov    $0x40,%edi
mov    $0x1,%esi
call   1030 <TSC_WrReg@plt>
mov    $0xb,%edi
mov    $0xff,%esi
call   1030 <TSC_WrReg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @TSC_Init() {
%1 = alloca i32
%2 = call i32 @TSC_WrReg(i32 3, i32 2)
store i32 0, i32* %1
br label %3
3: ; preds = %7, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 180000
br i1 %5, label %6, label %10
6: ; preds = %3
br label %7
7: ; preds = %6
%8 = load i32, i32* %1
%9 = add nsw i32 %8, 1
store i32 %9, i32* %1
br label %3
10: ; preds = %3
%11 = call i32 @TSC_WrReg(i32 4, i32 12)
%12 = call i32 @TSC_WrReg(i32 10, i32 7)
%13 = call i32 @TSC_WrReg(i32 32, i32 105)
store i32 0, i32* %1
br label %14
14: ; preds = %18, %10
%15 = load i32, i32* %1
%16 = icmp slt i32 %15, 36000
br i1 %16, label %17, label %21
17: ; preds = %14
br label %18
18: ; preds = %17
%19 = load i32, i32* %1
%20 = add nsw i32 %19, 1
store i32 %20, i32* %1
br label %14
21: ; preds = %14
%22 = call i32 @TSC_WrReg(i32 33, i32 1)
%23 = call i32 @TSC_WrReg(i32 65, i32 194)
%24 = call i32 @TSC_WrReg(i32 74, i32 1)
%25 = call i32 @TSC_WrReg(i32 75, i32 1)
%26 = call i32 @TSC_WrReg(i32 75, i32 0)
%27 = call i32 @TSC_WrReg(i32 86, i32 7)
%28 = call i32 @TSC_WrReg(i32 88, i32 1)
%29 = call i32 @TSC_WrReg(i32 23, i32 0)
%30 = call i32 @TSC_WrReg(i32 64, i32 1)
%31 = call i32 @TSC_WrReg(i32 11, i32 255)
ret i32 0
}

LLVM IR (-O2):
define i32 @TSC_Init() {
%1 = tail call i32 @TSC_WrReg(i32 3, i32 2)
%2 = tail call i32 @TSC_WrReg(i32 4, i32 12)
%3 = tail call i32 @TSC_WrReg(i32 10, i32 7)
%4 = tail call i32 @TSC_WrReg(i32 32, i32 105)
%5 = tail call i32 @TSC_WrReg(i32 33, i32 1)
%6 = tail call i32 @TSC_WrReg(i32 65, i32 194)
%7 = tail call i32 @TSC_WrReg(i32 74, i32 1)
%8 = tail call i32 @TSC_WrReg(i32 75, i32 1)
%9 = tail call i32 @TSC_WrReg(i32 75, i32 0)
%10 = tail call i32 @TSC_WrReg(i32 86, i32 7)
%11 = tail call i32 @TSC_WrReg(i32 88, i32 1)
%12 = tail call i32 @TSC_WrReg(i32 23, i32 0)
%13 = tail call i32 @TSC_WrReg(i32 64, i32 1)
%14 = tail call i32 @TSC_WrReg(i32 11, i32 255)
ret i32 0
}