#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef scalar_t__ function;
typedef scalar_t__ device;

/* Variables and functions */
unsigned int ind(int);
int /*<<< orphan*/ outd(int, unsigned int);
unsigned int readPCIConfigReg(unsigned char bus, unsigned char device,
                              unsigned char function, unsigned char reg) {
  unsigned int pci_address =
      ((((unsigned int)(bus)) << 16) | (((unsigned int)((device)&0x1F)) << 11) |
       (((unsigned int)((function)&0x7)) << 8) |
       ((unsigned int)(((reg) << 2) & 0xFC)) | (unsigned int)0x80000000);
  ;
  outd(0xCF8, pci_address);
  return ind(0xCFC);
}


x86 assembly (clang, -O0):
<readPCIConfigReg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x10,%eax
movzbl -0x2(%rbp),%ecx
and    $0x1f,%ecx
shl    $0xb,%ecx
or     %ecx,%eax
movzbl -0x3(%rbp),%ecx
and    $0x7,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
movzbl -0x4(%rbp),%ecx
shl    $0x2,%ecx
and    $0xfc,%ecx
or     %ecx,%eax
or     $0x80000000,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%esi
mov    $0xcf8,%edi
call   1030 <outd@plt>
mov    $0xcfc,%edi
call   1040 <ind@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<readPCIConfigReg>:
push   %rax
shl    $0x10,%edi
and    $0x1f,%esi
shl    $0xb,%esi
or     %edi,%esi
and    $0x7,%edx
shl    $0x8,%edx
or     %esi,%edx
and    $0x3f,%ecx
lea    (%rdx,%rcx,4),%esi
add    $0x80000000,%esi
mov    $0xcf8,%edi
call   1030 <outd@plt>
mov    $0xcfc,%edi
pop    %rax
jmp    1040 <ind@plt>

LLVM IR (-O0):
define i32 @readPCIConfigReg(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i32
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%10 = load i8, i8* %5
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 16
%13 = load i8, i8* %6
%14 = zext i8 %13 to i32
%15 = and i32 %14, 31
%16 = shl i32 %15, 11
%17 = or i32 %12, %16
%18 = load i8, i8* %7
%19 = zext i8 %18 to i32
%20 = and i32 %19, 7
%21 = shl i32 %20, 8
%22 = or i32 %17, %21
%23 = load i8, i8* %8
%24 = zext i8 %23 to i32
%25 = shl i32 %24, 2
%26 = and i32 %25, 252
%27 = or i32 %22, %26
%28 = or i32 %27, -2147483648
store i32 %28, i32* %9
%29 = load i32, i32* %9
%30 = call i32 @outd(i32 3320, i32 %29)
%31 = call i32 @ind(i32 3324)
ret i32 %31
}

LLVM IR (-O2):
define i32 @readPCIConfigReg(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = zext i8 %0 to i32
%6 = shl nuw nsw i32 %5, 16
%7 = and i8 %1, 31
%8 = zext i8 %7 to i32
%9 = shl nuw nsw i32 %8, 11
%10 = or i32 %9, %6
%11 = and i8 %2, 7
%12 = zext i8 %11 to i32
%13 = shl nuw nsw i32 %12, 8
%14 = or i32 %10, %13
%15 = zext i8 %3 to i32
%16 = shl nuw nsw i32 %15, 2
%17 = and i32 %16, 252
%18 = or i32 %14, %17
%19 = or i32 %18, -2147483648
%20 = tail call i32 @outd(i32 3320, i32 %19)
%21 = tail call i32 @ind(i32 3324)
ret i32 %21
}