xunge/DecIR huggingface dataset:
void native_restore_flags(unsigned long flags) {
  asm volatile("push %0; popf" : : "g"(flags) : "memory", "cc");
}


x86 assembly (clang, -O0):
<native_restore_flags>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
push   -0x10(%rbp)
popf
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_restore_flags>:
mov    %rdi,-0x8(%rsp)
push   -0x8(%rsp)
popf
ret

LLVM IR (-O0):
define void @native_restore_flags(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
ret void
}

LLVM IR (-O2):
define void @native_restore_flags(i64 %0) {
tail call void asm sideeffect "push $0; popf", "imr,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i64 %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmpgt_ps(int /*<<< orphan*/, int /*<<< orphan*/);
__m128 test_mm_cmpgt_ps(__m128 __a, __m128 __b) {
  return _mm_cmpgt_ps(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmpgt_ps>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmpgt_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmpgt_ps>:
jmp    1030 <_mm_cmpgt_ps@plt>

LLVM IR (-O0):
define i32 @test_mm_cmpgt_ps(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmpgt_ps(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmpgt_ps(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmpgt_ps(i32 %0, i32 %1)
ret i32 %3
}
void GPIOIntEnable(unsigned long ulPort, unsigned long ulIntFlags) {
  ;
  (*((volatile unsigned long *)(ulPort + 0x00000410))) |= ulIntFlags;
}


x86 assembly (clang, -O0):
<GPIOIntEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x8(%rbp),%rax
mov    0x410(%rax),%rcx
or     %rdx,%rcx
mov    %rcx,0x410(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOIntEnable>:
or     %rsi,0x410(%rdi)
ret

LLVM IR (-O0):
define void @GPIOIntEnable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 1040
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = or i64 %9, %5
store volatile i64 %10, i64* %8
ret void
}

LLVM IR (-O2):
define void @GPIOIntEnable(i64 %0, i64 %1) {
%3 = add i64 %0, 1040
%4 = inttoptr i64 %3 to i64*
%5 = load volatile i64, i64* %4
%6 = or i64 %5, %1
store volatile i64 %6, i64* %4
ret void
}
/* Variables and functions */
int ds1621_read_value(int, int);
int /*<<< orphan*/ ds1621_write_value(int, int, int);
int set_ONE_SHOT(int dev_fd) {
  int reg;
  reg = ds1621_read_value(dev_fd, 0xAC);
  reg = reg | 0x01;
  ds1621_write_value(dev_fd, 0xAC, reg & 0xfe);
}


x86 assembly (clang, -O0):
<set_ONE_SHOT>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    $0xac,%esi
call   1030 <ds1621_read_value@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
or     $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%edx
and    $0xfe,%edx
mov    $0xac,%esi
call   1040 <ds1621_write_value@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_ONE_SHOT>:
push   %rbx
mov    %edi,%ebx
mov    $0xac,%esi
call   1030 <ds1621_read_value@plt>
and    $0xfe,%eax
mov    %ebx,%edi
mov    $0xac,%esi
mov    %eax,%edx
pop    %rbx
jmp    1040 <ds1621_write_value@plt>

LLVM IR (-O0):
define i32 @set_ONE_SHOT(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i32 @ds1621_read_value(i32 %5, i32 172)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = or i32 %7, 1
store i32 %8, i32* %4
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = and i32 %10, 254
%12 = call i32 @ds1621_write_value(i32 %9, i32 172, i32 %11)
%13 = load i32, i32* %2
ret i32 %13
}

LLVM IR (-O2):
define i32 @set_ONE_SHOT(i32 %0) {
%2 = tail call i32 @ds1621_read_value(i32 %0, i32 172)
%3 = and i32 %2, 254
%4 = tail call i32 @ds1621_write_value(i32 %0, i32 172, i32 %3)
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ state_idle_rtc_timer();
void state_idle_enter(void) { state_idle_rtc_timer(); }


x86 assembly (clang, -O0):
<state_idle_enter>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <state_idle_rtc_timer@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<state_idle_enter>:
xor    %eax,%eax
jmp    1030 <state_idle_rtc_timer@plt>

LLVM IR (-O0):
define void @state_idle_enter() {
%1 = call i32 (...) @state_idle_rtc_timer()
ret void
}

LLVM IR (-O2):
define void @state_idle_enter() {
%1 = tail call i32 (...) @state_idle_rtc_timer()
ret void
}
/* Variables and functions */
int Sys_Microseconds();
unsigned int Sys_Milliseconds(void) { return Sys_Microseconds() / 1000; }


x86 assembly (clang, -O0):
<Sys_Milliseconds>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Sys_Microseconds@plt>
mov    $0x3e8,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sys_Milliseconds>:
push   %rax
xor    %eax,%eax
call   1030 <Sys_Microseconds@plt>
cltq
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x26,%rax
add    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @Sys_Milliseconds() {
%1 = call i32 (...) @Sys_Microseconds()
%2 = sdiv i32 %1, 1000
ret i32 %2
}

LLVM IR (-O2):
define i32 @Sys_Milliseconds() {
%1 = tail call i32 (...) @Sys_Microseconds()
%2 = sdiv i32 %1, 1000
ret i32 %2
}
__attribute__((always_)) void native_safe_halt(void) {
  asm volatile("sti; hlt" : : : "memory");
}


x86 assembly (clang, -O0):
<native_safe_halt>:
push   %rbp
mov    %rsp,%rbp
sti
hlt
pop    %rbp
ret

x86 assembly (clang, -O2):
<native_safe_halt>:
sti
hlt
ret

LLVM IR (-O0):
define void @native_safe_halt() {
ret void
}

LLVM IR (-O2):
define void @native_safe_halt() {
tail call void asm sideeffect "sti; hlt", "~{memory},~{dirflag},~{fpsr},~{flags}"()
ret void
}
void gdk_window_process_updates() {}


x86 assembly (clang, -O0):
<gdk_window_process_updates>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_window_process_updates>:
ret

LLVM IR (-O0):
define void @gdk_window_process_updates() {
ret void
}

LLVM IR (-O2):
define void @gdk_window_process_updates() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AF_INET;
int /*<<< orphan*/ SOCK_DGRAM;
int /*<<< orphan*/ perror(char *);
int socket(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int udpsock_create() {
  int fd;
  fd = socket(AF_INET, SOCK_DGRAM, 0);
  if (fd == -1) {
    perror("socket");
    return -1;
  }
  return fd;
}


x86 assembly (clang, -O0):
<udpsock_create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2eb9(%rip),%rax
mov    (%rax),%edi
mov    0x2ea8(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1040 <socket@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0xffffffff,-0x8(%rbp)
jne    1166 <udpsock_create+0x46>
lea    0xeab(%rip),%rdi
call   1030 <perror@plt>
movl   $0xffffffff,-0x4(%rbp)
jmp    116c <udpsock_create+0x4c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<udpsock_create>:
push   %rbx
mov    0x2ec0(%rip),%rax
mov    (%rax),%edi
mov    0x2eaf(%rip),%rax
mov    (%rax),%esi
xor    %edx,%edx
call   1040 <socket@plt>
mov    %eax,%ebx
cmp    $0xffffffff,%eax
je     1145 <udpsock_create+0x25>
mov    %ebx,%eax
pop    %rbx
ret
lea    0xeb4(%rip),%rdi
call   1030 <perror@plt>
jmp    1141 <udpsock_create+0x21>

LLVM IR (-O0):
@AF_INET = global i32 0
@SOCK_DGRAM = global i32 0
@.str = [7 x i8] c"socket\00"
define i32 @udpsock_create() {
%1 = alloca i32
%2 = alloca i32
%3 = load i32, i32* @AF_INET
%4 = load i32, i32* @SOCK_DGRAM
%5 = call i32 @socket(i32 %3, i32 %4, i32 0)
store i32 %5, i32* %2
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %10
8: ; preds = %0
%9 = call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
store i32 -1, i32* %1
br label %12
10: ; preds = %0
%11 = load i32, i32* %2
store i32 %11, i32* %1
br label %12
12: ; preds = %10, %8
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
@AF_INET = global i32 0
@SOCK_DGRAM = global i32 0
@.str = [7 x i8] c"socket\00"
define i32 @udpsock_create() {
%1 = load i32, i32* @AF_INET
%2 = load i32, i32* @SOCK_DGRAM
%3 = tail call i32 @socket(i32 %1, i32 %2, i32 0)
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %0
%6 = tail call i32 @perror(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %0, %5
ret i32 %3
}
int d_blt_rc2(double a1) { return !(__builtin_isless(a1, 100)); }


x86 assembly (clang, -O0):
<d_blt_rc2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_blt_rc2>:
movsd  0xef8(%rip),%xmm1
xor    %eax,%eax
ucomisd %xmm0,%xmm1
setbe  %al
ret

LLVM IR (-O0):
define i32 @d_blt_rc2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, 1.000000e+02
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @d_blt_rc2(double %0) {
%2 = fcmp uge double %0, 1.000000e+02
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ indent(int /*<<< orphan*/);
int /*<<< orphan*/ maybe_verbose(int, int /*<<< orphan*/, char const *);
int /*<<< orphan*/ printf(char *, char const *, char const *);
void str_or_verbose(int verbose, uint32_t in, const char *base, const char *val,
                    int retval) {
  if (retval) {
    maybe_verbose(verbose, in, base);
  } else {
    indent(in);
    printf("%s: %s\n", base, val);
  }
}


x86 assembly (clang, -O0):
<str_or_verbose>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1168 <str_or_verbose+0x38>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
call   1050 <maybe_verbose@plt>
jmp    1184 <str_or_verbose+0x54>
mov    -0x8(%rbp),%edi
call   1040 <indent@plt>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    0xe81(%rip),%rdi
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_or_verbose>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
test   %r8d,%r8d
je     114b <str_or_verbose+0x1b>
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <maybe_verbose@plt>
mov    %rcx,%r14
mov    %esi,%edi
call   1040 <indent@plt>
lea    0xea4(%rip),%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"%s: %s\0A\00"
define void @str_or_verbose(i32 %0, i32 %1, i8* %2, i8* %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i8*
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i32, i32* %10
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %18
13: ; preds = %5
%14 = load i32, i32* %6
%15 = load i32, i32* %7
%16 = load i8*, i8** %8
%17 = call i32 @maybe_verbose(i32 %14, i32 %15, i8* %16)
br label %24
18: ; preds = %5
%19 = load i32, i32* %7
%20 = call i32 @indent(i32 %19)
%21 = load i8*, i8** %8
%22 = load i8*, i8** %9
%23 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %21, i8* %22)
br label %24
24: ; preds = %18, %13
ret void
}

LLVM IR (-O2):
@.str = [8 x i8] c"%s: %s\0A\00"
define void @str_or_verbose(i32 %0, i32 %1, i8* %2, i8* %3, i32 %4) {
%6 = icmp eq i32 %4, 0
br i1 %6, label %9, label %7
7: ; preds = %5
%8 = tail call i32 @maybe_verbose(i32 %0, i32 %1, i8* %2)
br label %12
9: ; preds = %5
%10 = tail call i32 @indent(i32 %1)
%11 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i8* %2, i8* %3)
br label %12
12: ; preds = %9, %7
ret void
}
/* Variables and functions */
int /*<<< orphan*/ simTick();
void simTicks(int nrTicks) {
  while (nrTicks--) {
    simTick();
  }
}


x86 assembly (clang, -O0):
<simTicks>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x4(%rbp)
cmp    $0x0,%eax
je     113b <simTicks+0x2b>
mov    $0x0,%al
call   1030 <simTick@plt>
jmp    111b <simTicks+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<simTicks>:
push   %rbx
test   %edi,%edi
je     112c <simTicks+0x1c>
mov    %edi,%ebx
nopw   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <simTick@plt>
add    $0xffffffff,%ebx
jne    1120 <simTicks+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @simTicks(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %7, %1
%4 = load i32, i32* %2
%5 = add nsw i32 %4, -1
store i32 %5, i32* %2
%6 = icmp ne i32 %4, 0
br i1 %6, label %7, label %9
7: ; preds = %3
%8 = call i32 (...) @simTick()
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @simTicks(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %8, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %5, %3 ], [ %0, %1 ]
%5 = add nsw i32 %4, -1
%6 = tail call i32 (...) @simTick()
%7 = icmp eq i32 %5, 0
br i1 %7, label %8, label %3
8: ; preds = %3, %1
ret void
}
__attribute__((__always___)) unsigned short readw(const volatile void *addr) {
  return *(volatile unsigned short *)addr;
}


x86 assembly (clang, -O0):
<readw>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%ax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readw>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
define zeroext i16 @readw(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i16*
%5 = load volatile i16, i16* %4
ret i16 %5
}

LLVM IR (-O2):
define zeroext i16 @readw(i8* %0) {
%2 = bitcast i8* %0 to i16*
%3 = load volatile i16, i16* %2
ret i16 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ GLfloat;

/* Variables and functions */
int /*<<< orphan*/ LEN_SQUARED_2FV(int /*<<< orphan*/ const *);
int /*<<< orphan*/ sqrtf(int /*<<< orphan*/);
GLfloat LEN_2FV(const GLfloat v[2]) { return sqrtf(LEN_SQUARED_2FV(v)); }


x86 assembly (clang, -O0):
<LEN_2FV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <LEN_SQUARED_2FV@plt>
mov    %eax,%edi
call   1040 <sqrtf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LEN_2FV>:
push   %rax
call   1030 <LEN_SQUARED_2FV@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <sqrtf@plt>

LLVM IR (-O0):
define i32 @LEN_2FV(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @LEN_SQUARED_2FV(i32* %3)
%5 = call i32 @sqrtf(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @LEN_2FV(i32* %0) {
%2 = tail call i32 @LEN_SQUARED_2FV(i32* %0)
%3 = tail call i32 @sqrtf(i32 %2)
ret i32 %3
}
int receive_timeout(int usec) { return 2 * usec < 100000 ? 100000 : 2 * usec; }


x86 assembly (clang, -O0):
<receive_timeout>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
cmp    $0x186a0,%eax
jge    1125 <receive_timeout+0x25>
mov    $0x186a0,%eax
mov    %eax,-0x8(%rbp)
jmp    112e <receive_timeout+0x2e>
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<receive_timeout>:
lea    (%rdi,%rdi,1),%ecx
cmp    $0x186a1,%ecx
mov    $0x186a0,%eax
cmovge %ecx,%eax
ret

LLVM IR (-O0):
define i32 @receive_timeout(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
%5 = icmp slt i32 %4, 100000
br i1 %5, label %6, label %7
6: ; preds = %1
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = mul nsw i32 2, %8
br label %10
10: ; preds = %7, %6
%11 = phi i32 [ 100000, %6 ], [ %9, %7 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @receive_timeout(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = icmp sgt i32 %2, 100000
%4 = select i1 %3, i32 %2, i32 100000
ret i32 %4
}
void troca(int *vetor, int p1, int p2) {
  int tmp;
  tmp = vetor[p1];
  vetor[p1] = vetor[p2];
  vetor[p2] = tmp;
}


x86 assembly (clang, -O0):
<troca>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<troca>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%ecx
movslq %edx,%rdx
mov    (%rdi,%rdx,4),%esi
mov    %esi,(%rdi,%rax,4)
mov    %ecx,(%rdi,%rdx,4)
ret

LLVM IR (-O0):
define void @troca(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32*, i32** %4
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, i32* %8, i64 %10
%12 = load i32, i32* %11
store i32 %12, i32* %7
%13 = load i32*, i32** %4
%14 = load i32, i32* %6
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %13, i64 %15
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %5
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i32, i32* %18, i64 %20
store i32 %17, i32* %21
%22 = load i32, i32* %7
%23 = load i32*, i32** %4
%24 = load i32, i32* %6
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i32, i32* %23, i64 %25
store i32 %22, i32* %26
ret void
}

LLVM IR (-O2):
define void @troca(i32* nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = load i32, i32* %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
store i32 %9, i32* %5
store i32 %6, i32* %8
ret void
}
/* Variables and functions */
int fatorial(int);
int /*<<< orphan*/ printf(char *, int, int);
int /*<<< orphan*/ scanf(char *, int *);
int main(void) {
  int num;
  scanf("%d", &num);
  printf("o fatorial de %d eh: %d", num, fatorial(num));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed6(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <fatorial@plt>
mov    -0x8(%rbp),%esi
mov    %eax,%edx
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xed9(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1050 <scanf@plt>
mov    0xc(%rsp),%ebx
mov    %ebx,%edi
call   1040 <fatorial@plt>
lea    0xea8(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [24 x i8] c"o fatorial de %d eh: %d\00"
define i32 @main() {
%1 = alloca i32
%2 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%3 = load i32, i32* %1
%4 = load i32, i32* %1
%5 = call i32 @fatorial(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i32 %3, i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [24 x i8] c"o fatorial de %d eh: %d\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @fatorial(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i32 %4, i32 %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
void show_usage(void) {
  printf("Usage: genHeader [OPTIONS]\n\n"
         "  -i, --input=file         Input file\n"
         "  -o, --output=file        Output file\n"
         "  -s, --Output2=file       Output file2\n"
         "  -h, --head               Keep image header\n"
         "  -k, --key=hex            Image Key 0xA0000003(app)\n"
         "  -f, --flash=address      Address to write to (FLASH)\n"
         "  -a, --address=address    Address to decompress to (RAM)\n"
         "  -e, --entry=address      Address to start\n"
         "\n Example for Linux \n"
         "  genhead -i vm.img -o vm.hdr -s vm_sig.hdr -k 0xa0000003 -f "
         "0xbfc10000  -a 0x80000000 -e 0x80000000\n");
  exit(0);
}


x86 assembly (clang, -O0):
<show_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<show_usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [523 x i8] c"Usage: genHeader [OPTIONS]\0A\0A -i, --input=file Input file\0A -o, --output=file Output file\0A -s, --Output2=file Output file2\0A -h, --head Keep image header\0A -k, --key=hex Image Key 0xA0000003(app)\0A -f, --flash=address Address to write to (FLASH)\0A -a, --address=address Address to decompress to (RAM)\0A -e, --entry=address Address to start\0A\0A Example for Linux \0A genhead -i vm.img -o vm.hdr -s vm_sig.hdr -k 0xa0000003 -f 0xbfc10000 -a 0x80000000 -e 0x80000000\0A\00"
define void @show_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([523 x i8], [523 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@str = [522 x i8] c"Usage: genHeader [OPTIONS]\0A\0A -i, --input=file Input file\0A -o, --output=file Output file\0A -s, --Output2=file Output file2\0A -h, --head Keep image header\0A -k, --key=hex Image Key 0xA0000003(app)\0A -f, --flash=address Address to write to (FLASH)\0A -a, --address=address Address to decompress to (RAM)\0A -e, --entry=address Address to start\0A\0A Example for Linux \0A genhead -i vm.img -o vm.hdr -s vm_sig.hdr -k 0xa0000003 -f 0xbfc10000 -a 0x80000000 -e 0x80000000\00"
define void @show_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([522 x i8], [522 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 0)
unreachable
}
__attribute__((const)) int is_power_of_2(unsigned long n) {
  return (n != 0 && ((n & (n - 1)) == 0));
}


x86 assembly (clang, -O0):
<is_power_of_2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0x9(%rbp)
je     1131 <is_power_of_2+0x31>
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
sub    $0x1,%rcx
and    %rcx,%rax
cmp    $0x0,%rax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_power_of_2>:
test   %rdi,%rdi
je     1112 <is_power_of_2+0x12>
lea    -0x1(%rdi),%rcx
xor    %eax,%eax
test   %rcx,%rdi
sete   %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_power_of_2(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ne i64 %3, 0
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = load i64, i64* %2
%7 = load i64, i64* %2
%8 = sub i64 %7, 1
%9 = and i64 %6, %8
%10 = icmp eq i64 %9, 0
br label %11
11: ; preds = %5, %1
%12 = phi i1 [ false, %1 ], [ %10, %5 ]
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @is_power_of_2(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i64 @llvm.ctpop.i64(i64 %0)
%5 = icmp ult i64 %4, 2
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ cpu_init();
void reset() { cpu_init(); }


x86 assembly (clang, -O0):
<reset>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cpu_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset>:
xor    %eax,%eax
jmp    1030 <cpu_init@plt>

LLVM IR (-O0):
define void @reset() {
%1 = call i32 (...) @cpu_init()
ret void
}

LLVM IR (-O2):
define void @reset() {
%1 = tail call i32 (...) @cpu_init()
ret void
}
long int_to_fix(long i) { return i << 16; }


x86 assembly (clang, -O0):
<int_to_fix>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x10,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_to_fix>:
mov    %rdi,%rax
shl    $0x10,%rax
ret

LLVM IR (-O0):
define i64 @int_to_fix(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = shl i64 %3, 16
ret i64 %4
}

LLVM IR (-O2):
define i64 @int_to_fix(i64 %0) {
%2 = shl i64 %0, 16
ret i64 %2
}
int getint(int x) {
  char *p1, *p2;
  int y;
  p1 = (char *)(&x);
  p2 = (char *)(&y);
  p2[3] = p1[0];
  p2[2] = p1[1];
  p2[1] = p1[2];
  p2[0] = p1[3];
  return (y);
}


x86 assembly (clang, -O0):
<getint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rax
mov    %rax,-0x10(%rbp)
lea    -0x1c(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x3(%rax)
mov    -0x10(%rbp),%rax
mov    0x1(%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0x10(%rbp),%rax
mov    0x2(%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x10(%rbp),%rax
mov    0x3(%rax),%cl
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
mov    -0x1c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getint>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @getint(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %2
%6 = bitcast i32* %2 to i8*
store i8* %6, i8** %3
%7 = bitcast i32* %5 to i8*
store i8* %7, i8** %4
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
%10 = load i8, i8* %9
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i64 3
store i8 %10, i8* %12
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i64 1
%15 = load i8, i8* %14
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i64 2
store i8 %15, i8* %17
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i64 2
%20 = load i8, i8* %19
%21 = load i8*, i8** %4
%22 = getelementptr inbounds i8, i8* %21, i64 1
store i8 %20, i8* %22
%23 = load i8*, i8** %3
%24 = getelementptr inbounds i8, i8* %23, i64 3
%25 = load i8, i8* %24
%26 = load i8*, i8** %4
%27 = getelementptr inbounds i8, i8* %26, i64 0
store i8 %25, i8* %27
%28 = load i32, i32* %5
ret i32 %28
}

LLVM IR (-O2):
define i32 @getint(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
void vcopy(const float *v1, float *v2) {
  register int i;
  for (i = 0; i < 3; i++)
    v2[i] = v1[i];
}


x86 assembly (clang, -O0):
<vcopy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x3,-0x14(%rbp)
jge    1145 <vcopy+0x45>
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
movss  (%rax,%rcx,4),%xmm0
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
movss  %xmm0,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <vcopy+0x13>
pop    %rbp
ret

x86 assembly (clang, -O2):
<vcopy>:
movss  (%rdi),%xmm0
movss  %xmm0,(%rsi)
movss  0x4(%rdi),%xmm0
movss  %xmm0,0x4(%rsi)
movss  0x8(%rdi),%xmm0
movss  %xmm0,0x8(%rsi)
ret

LLVM IR (-O0):
define void @vcopy(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
%5 = alloca i32
store float* %0, float** %3
store float* %1, float** %4
store i32 0, i32* %5
br label %6
6: ; preds = %19, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 3
br i1 %8, label %9, label %22
9: ; preds = %6
%10 = load float*, float** %3
%11 = load i32, i32* %5
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds float, float* %10, i64 %12
%14 = load float, float* %13
%15 = load float*, float** %4
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds float, float* %15, i64 %17
store float %14, float* %18
br label %19
19: ; preds = %9
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %6
22: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @vcopy(float* nocapture %0, float* nocapture writeonly %1) {
%3 = load float, float* %0
store float %3, float* %1
%4 = getelementptr inbounds float, float* %0, i64 1
%5 = load float, float* %4
%6 = getelementptr inbounds float, float* %1, i64 1
store float %5, float* %6
%7 = getelementptr inbounds float, float* %0, i64 2
%8 = load float, float* %7
%9 = getelementptr inbounds float, float* %1, i64 2
store float %8, float* %9
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_entity(int /*<<< orphan*/, char *,
                                             char *);
void test_automake_comment_entities() {
  test_parser_verify_entity(test_parser_sourcefile("automake", " #comment"),
                            "comment", "#comment");
}


x86 assembly (clang, -O0):
<test_automake_comment_entities>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed7(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xecb(%rip),%rsi
lea    0xec3(%rip),%rdx
call   1040 <test_parser_verify_entity@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_automake_comment_entities>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0xeda(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
lea    0xed0(%rip),%rsi
lea    0xec8(%rip),%rdx
mov    %eax,%edi
pop    %rax
jmp    1040 <test_parser_verify_entity@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"automake\00"
@.str.1 = [10 x i8] c" #comment\00"
@.str.2 = [8 x i8] c"comment\00"
@.str.3 = [9 x i8] c"#comment\00"
define void @test_automake_comment_entities() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_entity(i32 %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"automake\00"
@.str.1 = [10 x i8] c" #comment\00"
@.str.2 = [8 x i8] c"comment\00"
@.str.3 = [9 x i8] c"#comment\00"
define void @test_automake_comment_entities() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_entity(i32 %1, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.3, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ ft_isalpha(int);
scalar_t__ ft_isdigit(int);
int ft_isalnum(int c) {
  int retour;
  retour = 0;
  if (ft_isalpha(c))
    retour = 1;
  if (ft_isdigit(c))
    retour = 1;
  return (retour);
}


x86 assembly (clang, -O0):
<ft_isalnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <ft_isalpha@plt>
cmp    $0x0,%rax
je     114b <ft_isalnum+0x2b>
movl   $0x1,-0x8(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ft_isdigit@plt>
cmp    $0x0,%rax
je     1164 <ft_isalnum+0x44>
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalnum>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
call   1040 <ft_isalpha@plt>
mov    %rax,%r14
mov    %ebx,%edi
call   1030 <ft_isdigit@plt>
xor    %ecx,%ecx
or     %r14,%rax
setne  %cl
mov    %ecx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @ft_isalnum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = call i64 @ft_isalpha(i32 %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %3
br label %8
8: ; preds = %7, %1
%9 = load i32, i32* %2
%10 = call i64 @ft_isdigit(i32 %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %3
br label %13
13: ; preds = %12, %8
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @ft_isalnum(i32 %0) {
%2 = tail call i64 @ft_isalpha(i32 %0)
%3 = icmp ne i64 %2, 0
%4 = tail call i64 @ft_isdigit(i32 %0)
%5 = icmp ne i64 %4, 0
%6 = select i1 %5, i1 true, i1 %3
%7 = zext i1 %6 to i32
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ strcat(char *, char const *);
char *bufcon_putc(char *buffer, unsigned char c) {
  unsigned char str[2];
  str[0] = c;
  str[1] = 0;
  strcat(buffer, (const char *)str);
  return buffer;
}


x86 assembly (clang, -O0):
<bufcon_putc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
mov    %al,-0xb(%rbp)
movb   $0x0,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xb(%rbp),%rsi
call   1030 <strcat@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bufcon_putc>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
mov    %sil,0xe(%rsp)
movb   $0x0,0xf(%rsp)
lea    0xe(%rsp),%rsi
call   1030 <strcat@plt>
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i8* @bufcon_putc(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca [2 x i8]
store i8* %0, i8** %3
store i8 %1, i8* %4
%6 = load i8, i8* %4
%7 = getelementptr inbounds [2 x i8], [2 x i8]* %5, i64 0, i64 0
store i8 %6, i8* %7
%8 = getelementptr inbounds [2 x i8], [2 x i8]* %5, i64 0, i64 1
store i8 0, i8* %8
%9 = load i8*, i8** %3
%10 = getelementptr inbounds [2 x i8], [2 x i8]* %5, i64 0, i64 0
%11 = call i32 @strcat(i8* %9, i8* %10)
%12 = load i8*, i8** %3
ret i8* %12
}

LLVM IR (-O2):
define i8* @bufcon_putc(i8* returned %0, i8 zeroext %1) {
%3 = alloca [2 x i8]
%4 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 0
store i8 %1, i8* %4
%5 = getelementptr inbounds [2 x i8], [2 x i8]* %3, i64 0, i64 1
store i8 0, i8* %5
%6 = call i32 @strcat(i8* %0, i8* %4)
ret i8* %0
}
int scr2rcs(int i) {
  return i & 0x1800 | i << 8 & 0x700 | i << 2 & 0xe0 | i >> 6 & 0x1f;
}


x86 assembly (clang, -O0):
<scr2rcs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1800,%eax
mov    -0x4(%rbp),%ecx
shl    $0x8,%ecx
and    $0x700,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
shl    $0x2,%ecx
and    $0xe0,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
sar    $0x6,%ecx
and    $0x1f,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scr2rcs>:
mov    %edi,%eax
and    $0x1800,%eax
mov    %edi,%ecx
and    $0x7,%ecx
shl    $0x8,%ecx
or     %eax,%ecx
mov    %edi,%eax
and    $0x38,%eax
lea    (%rcx,%rax,4),%eax
shr    $0x6,%edi
and    $0x1f,%edi
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @scr2rcs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 6144
%5 = load i32, i32* %2
%6 = shl i32 %5, 8
%7 = and i32 %6, 1792
%8 = or i32 %4, %7
%9 = load i32, i32* %2
%10 = shl i32 %9, 2
%11 = and i32 %10, 224
%12 = or i32 %8, %11
%13 = load i32, i32* %2
%14 = ashr i32 %13, 6
%15 = and i32 %14, 31
%16 = or i32 %12, %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @scr2rcs(i32 %0) {
%2 = and i32 %0, 6144
%3 = shl i32 %0, 8
%4 = and i32 %3, 1792
%5 = or i32 %4, %2
%6 = shl i32 %0, 2
%7 = and i32 %6, 224
%8 = or i32 %5, %7
%9 = lshr i32 %0, 6
%10 = and i32 %9, 31
%11 = or i32 %8, %10
ret i32 %11
}
short sw16(short v) { return ((v & 0xFF) << 8) | ((v & 0xFF00) >> 8); }


x86 assembly (clang, -O0):
<sw16>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%eax
and    $0xff,%eax
shl    $0x8,%eax
movswl -0x2(%rbp),%ecx
and    $0xff00,%ecx
sar    $0x8,%ecx
or     %ecx,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<sw16>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define signext i16 @sw16(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 255
%6 = shl i32 %5, 8
%7 = load i16, i16* %2
%8 = sext i16 %7 to i32
%9 = and i32 %8, 65280
%10 = ashr i32 %9, 8
%11 = or i32 %6, %10
%12 = trunc i32 %11 to i16
ret i16 %12
}

LLVM IR (-O2):
define signext i16 @sw16(i16 signext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int stat(char *, struct stat *);
int SASSegNameExists(char *name) {
  int rc, result;
  struct stat stat_buf;
  rc = stat(name, &stat_buf);
  if (rc == -1) {
    result = 0;
  } else {
    result = 1;
  }
  return result;
}


x86 assembly (clang, -O0):
<SASSegNameExists>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x18(%rbp),%rsi
call   1030 <stat@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0xffffffff,-0xc(%rbp)
jne    1142 <SASSegNameExists+0x32>
movl   $0x0,-0x10(%rbp)
jmp    1149 <SASSegNameExists+0x39>
movl   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SASSegNameExists>:
push   %rax
mov    %rsp,%rsi
call   1030 <stat@plt>
xor    %ecx,%ecx
cmp    $0xffffffff,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @SASSegNameExists(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.stat
store i8* %0, i8** %2
%6 = load i8*, i8** %2
%7 = call i32 @stat(i8* %6, %struct.stat* %5)
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = icmp eq i32 %8, -1
br i1 %9, label %10, label %11
10: ; preds = %1
store i32 0, i32* %4
br label %12
11: ; preds = %1
store i32 1, i32* %4
br label %12
12: ; preds = %11, %10
%13 = load i32, i32* %4
ret i32 %13
}

LLVM IR (-O2):
%struct.stat = type { i32 }
define i32 @SASSegNameExists(i8* nocapture %0) {
%2 = alloca %struct.stat
%3 = bitcast %struct.stat* %2 to i8*
%4 = call i32 @stat(i8* %0, %struct.stat* %2)
%5 = icmp ne i32 %4, -1
%6 = zext i1 %5 to i32
ret i32 %6
}
void _makedat_isfname(isfname) char *isfname;
{ (void)strcat(isfname, ".rec"); }


x86 assembly (clang, -O0):
<_makedat_isfname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strcat@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_makedat_isfname>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
movl   $0x6365722e,(%rbx,%rax,1)
movb   $0x0,0x4(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c".rec\00"
define void @_makedat_isfname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @strcat(i8* %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c".rec\00"
define void @_makedat_isfname(i8* nocapture %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = getelementptr i8, i8* %0, i64 %2
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 dereferenceable(5) %3, i8* align 1 dereferenceable(5) getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64 5, i1 false)
ret void
}
/* Variables and functions */
char *strrchr(char const *, char);
char *after_last(const char *str, char c) {
  char *result = strrchr(str, c);
  result = (result == NULL) ? ((char *)str) : (result + 1);
  return result;
}


x86 assembly (clang, -O0):
<after_last>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
movsbl -0x9(%rbp),%esi
call   1030 <strrchr@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
jne    114b <after_last+0x3b>
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
jmp    1157 <after_last+0x47>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<after_last>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strrchr@plt>
lea    0x1(%rax),%rcx
test   %rax,%rax
cmove  %rbx,%rcx
mov    %rcx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @after_last(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
%5 = alloca i8*
store i8* %0, i8** %3
store i8 %1, i8* %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %4
%8 = call i8* @strrchr(i8* %6, i8 signext %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = load i8*, i8** %3
br label %16
13: ; preds = %2
%14 = load i8*, i8** %5
%15 = getelementptr inbounds i8, i8* %14, i64 1
br label %16
16: ; preds = %13, %11
%17 = phi i8* [ %12, %11 ], [ %15, %13 ]
store i8* %17, i8** %5
%18 = load i8*, i8** %5
ret i8* %18
}

LLVM IR (-O2):
define i8* @after_last(i8* %0, i8 signext %1) {
%3 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext %1)
%4 = icmp eq i8* %3, null
%5 = getelementptr inbounds i8, i8* %3, i64 1
%6 = select i1 %4, i8* %0, i8* %5
ret i8* %6
}
const char *str_stmt_for() { return "for"; }


x86 assembly (clang, -O0):
<str_stmt_for>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<str_stmt_for>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"for\00"
define i8* @str_stmt_for() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [4 x i8] c"for\00"
define i8* @str_stmt_for() {
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
double taylor(double);
double sin(double angle) { return taylor(angle); }


x86 assembly (clang, -O0):
<sin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <taylor@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sin>:
jmp    1030 <taylor@plt>

LLVM IR (-O0):
define double @sin(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @taylor(double %3)
ret double %4
}

LLVM IR (-O2):
define double @sin(double %0) {
%2 = tail call double @taylor(double %0)
ret double %2
}
void netcdf_DatatypeFreeSpatial() {}


x86 assembly (clang, -O0):
<netcdf_DatatypeFreeSpatial>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<netcdf_DatatypeFreeSpatial>:
ret

LLVM IR (-O0):
define void @netcdf_DatatypeFreeSpatial() {
ret void
}

LLVM IR (-O2):
define void @netcdf_DatatypeFreeSpatial() {
ret void
}
/* Type definitions */
struct ejson_driver_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ stdout;
void d_open_array(struct ejson_driver_t *d) {
  printf("[");
  fflush(stdout);
}


x86 assembly (clang, -O0):
<d_open_array>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea1(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_open_array>:
push   %rax
mov    $0x5b,%edi
call   1030 <putchar@plt>
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
%struct.ejson_driver_t = type { i32 }
@.str = [2 x i8] c"[\00"
@stdout = global i32 0
define void @d_open_array(%struct.ejson_driver_t* %0) {
%2 = alloca %struct.ejson_driver_t*
store %struct.ejson_driver_t* %0, %struct.ejson_driver_t** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @stdout
%5 = call i32 @fflush(i32 %4)
ret void
}

LLVM IR (-O2):
%struct.ejson_driver_t = type { i32 }
@stdout = global i32 0
define void @d_open_array(%struct.ejson_driver_t* nocapture readnone %0) {
%2 = tail call i32 @putchar(i32 91)
%3 = load i32, i32* @stdout
%4 = tail call i32 @fflush(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *, char *);
void AbortMessage(char *s) {
  printf("\n\n%s\n", s);
  exit(1);
}


x86 assembly (clang, -O0):
<AbortMessage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<AbortMessage>:
push   %rax
mov    %rdi,%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\0A\0A%s\0A\00"
define void @AbortMessage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [6 x i8] c"\0A\0A%s\0A\00"
define void @AbortMessage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @exit(i32 1)
unreachable
}
unsigned long long int rnd8(unsigned long long int x) {
  if (x == 0) {
    x = 1;
  } else {
    x ^= (x << 7) & 0xffULL;
    x ^= (x >> 5) & 0xffULL;
    x ^= (x << 3) & 0xffULL;
    if (x == 1)
      x = 0;
  }
  return x;
}


x86 assembly (clang, -O0):
<rnd8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1120 <rnd8+0x20>
movq   $0x1,-0x8(%rbp)
jmp    117a <rnd8+0x7a>
mov    -0x8(%rbp),%rax
shl    $0x7,%rax
and    $0xff,%rax
xor    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x5,%rax
and    $0xff,%rax
xor    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x3,%rax
and    $0xff,%rax
xor    -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
cmpq   $0x1,-0x8(%rbp)
jne    1175 <rnd8+0x75>
movq   $0x0,-0x8(%rbp)
jmp    117a <rnd8+0x7a>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnd8>:
test   %rdi,%rdi
je     1133 <rnd8+0x33>
mov    %edi,%eax
shl    $0x7,%eax
movzbl %al,%eax
xor    %rdi,%rax
mov    %eax,%ecx
shr    $0x5,%ecx
movzbl %cl,%ecx
xor    %rax,%rcx
lea    0x0(,%rcx,8),%eax
movzbl %al,%edx
xor    %rcx,%rdx
xor    %eax,%eax
cmp    $0x1,%rdx
cmovne %rdx,%rax
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i64 @rnd8(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %6
5: ; preds = %1
store i64 1, i64* %2
br label %26
6: ; preds = %1
%7 = load i64, i64* %2
%8 = shl i64 %7, 7
%9 = and i64 %8, 255
%10 = load i64, i64* %2
%11 = xor i64 %10, %9
store i64 %11, i64* %2
%12 = load i64, i64* %2
%13 = lshr i64 %12, 5
%14 = and i64 %13, 255
%15 = load i64, i64* %2
%16 = xor i64 %15, %14
store i64 %16, i64* %2
%17 = load i64, i64* %2
%18 = shl i64 %17, 3
%19 = and i64 %18, 255
%20 = load i64, i64* %2
%21 = xor i64 %20, %19
store i64 %21, i64* %2
%22 = load i64, i64* %2
%23 = icmp eq i64 %22, 1
br i1 %23, label %24, label %25
24: ; preds = %6
store i64 0, i64* %2
br label %25
25: ; preds = %24, %6
br label %26
26: ; preds = %25, %5
%27 = load i64, i64* %2
ret i64 %27
}

LLVM IR (-O2):
define i64 @rnd8(i64 %0) {
%2 = icmp eq i64 %0, 0
br i1 %2, label %15, label %3
3: ; preds = %1
%4 = shl i64 %0, 7
%5 = and i64 %4, 128
%6 = xor i64 %5, %0
%7 = lshr i64 %6, 5
%8 = and i64 %7, 255
%9 = xor i64 %8, %6
%10 = shl i64 %9, 3
%11 = and i64 %10, 248
%12 = xor i64 %11, %9
%13 = icmp eq i64 %12, 1
%14 = select i1 %13, i64 0, i64 %12
br label %15
15: ; preds = %1, %3
%16 = phi i64 [ %14, %3 ], [ 1, %1 ]
ret i64 %16
}