xunge/DecIR huggingface dataset:
/* Variables and functions */
int ft_atoi(char *);
int /*<<< orphan*/ ft_putnbr(int);
void minus(char *num1, char *num2) {
  int i_num1;
  int i_num2;
  i_num1 = ft_atoi(num1);
  i_num2 = ft_atoi(num2);
  ft_putnbr(i_num1 - i_num2);
}


x86 assembly (clang, -O0):
<minus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ft_atoi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <ft_atoi@plt>
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%edi
sub    -0x18(%rbp),%edi
call   1030 <ft_putnbr@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<minus>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
call   1040 <ft_atoi@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
call   1040 <ft_atoi@plt>
sub    %eax,%ebp
mov    %ebp,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <ft_putnbr@plt>

LLVM IR (-O0):
define void @minus(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = call i32 @ft_atoi(i8* %7)
store i32 %8, i32* %5
%9 = load i8*, i8** %4
%10 = call i32 @ft_atoi(i8* %9)
store i32 %10, i32* %6
%11 = load i32, i32* %5
%12 = load i32, i32* %6
%13 = sub nsw i32 %11, %12
%14 = call i32 @ft_putnbr(i32 %13)
ret void
}

LLVM IR (-O2):
define void @minus(i8* %0, i8* %1) {
%3 = tail call i32 @ft_atoi(i8* %0)
%4 = tail call i32 @ft_atoi(i8* %1)
%5 = sub nsw i32 %3, %4
%6 = tail call i32 @ft_putnbr(i32 %5)
ret void
}
int main(int argc, char *argv[]) {
  __attribute__((vector_size((8) * sizeof(short)))) short v0 = {argc, 1, 2, 3,
                                                                4,    5, 6, 7};
  __attribute__((vector_size((8) * sizeof(short)))) short v1 = {2, 2, 2, 2,
                                                                2, 2, 2, 2};
  __attribute__((vector_size((8) * sizeof(short)))) short r1;
  r1 = v0 >> v1;
  return (*((short *)&(r1) + 0));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movaps 0xee7(%rip),%xmm0
mov    -0x8(%rbp),%eax
pinsrw $0x0,%eax,%xmm0
movaps %xmm0,-0x20(%rbp)
movaps 0xee4(%rip),%xmm0
movaps %xmm0,-0x30(%rbp)
movaps -0x20(%rbp),%xmm0
movaps -0x30(%rbp),%xmm2
psllw  $0xc,%xmm2
movaps %xmm2,%xmm3
psraw  $0xf,%xmm3
movaps %xmm3,%xmm1
pandn  %xmm0,%xmm1
psraw  $0x8,%xmm0
pand   %xmm3,%xmm0
por    %xmm1,%xmm0
paddw  %xmm2,%xmm2
movaps %xmm2,%xmm3
psraw  $0xf,%xmm3
movaps %xmm3,%xmm1
pandn  %xmm0,%xmm1
psraw  $0x4,%xmm0
pand   %xmm3,%xmm0
por    %xmm1,%xmm0
paddw  %xmm2,%xmm2
movaps %xmm2,%xmm3
psraw  $0xf,%xmm3
movaps %xmm3,%xmm1
pandn  %xmm0,%xmm1
psraw  $0x2,%xmm0
pand   %xmm3,%xmm0
por    %xmm1,%xmm0
paddw  %xmm2,%xmm2
psraw  $0xf,%xmm2
movaps %xmm2,%xmm1
pandn  %xmm0,%xmm1
psraw  $0x1,%xmm0
pand   %xmm2,%xmm0
por    %xmm1,%xmm0
movdqa %xmm0,-0x40(%rbp)
movswl -0x40(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
movswl %di,%eax
sar    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca <8 x i16>
%7 = alloca <8 x i16>
%8 = alloca <8 x i16>
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%9 = load i32, i32* %4
%10 = trunc i32 %9 to i16
%11 = insertelement <8 x i16> undef, i16 %10, i32 0
%12 = insertelement <8 x i16> %11, i16 1, i32 1
%13 = insertelement <8 x i16> %12, i16 2, i32 2
%14 = insertelement <8 x i16> %13, i16 3, i32 3
%15 = insertelement <8 x i16> %14, i16 4, i32 4
%16 = insertelement <8 x i16> %15, i16 5, i32 5
%17 = insertelement <8 x i16> %16, i16 6, i32 6
%18 = insertelement <8 x i16> %17, i16 7, i32 7
store <8 x i16> %18, <8 x i16>* %6
store <8 x i16> <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>, <8 x i16>* %7
%19 = load <8 x i16>, <8 x i16>* %6
%20 = load <8 x i16>, <8 x i16>* %7
%21 = ashr <8 x i16> %19, %20
store <8 x i16> %21, <8 x i16>* %8
%22 = bitcast <8 x i16>* %8 to i16*
%23 = getelementptr inbounds i16, i16* %22, i64 0
%24 = load i16, i16* %23
%25 = sext i16 %24 to i32
ret i32 %25
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = trunc i32 %0 to i16
%4 = ashr i16 %3, 2
%5 = sext i16 %4 to i32
ret i32 %5
}
int d_gt_rc2(double a1) { return !(((a1) > (100))); }


x86 assembly (clang, -O0):
<d_gt_rc2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
ucomisd %xmm1,%xmm0
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_gt_rc2>:
xor    %eax,%eax
ucomisd 0xef6(%rip),%xmm0
setbe  %al
ret

LLVM IR (-O0):
define i32 @d_gt_rc2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp ogt double %3, 1.000000e+02
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @d_gt_rc2(double %0) {
%2 = fcmp ule double %0, 1.000000e+02
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ GPIOPadConfigSet(int /*<<< orphan*/, int /*<<< orphan*/, int,
                                    int);
void GPIOPinTypeLPC(uint32_t ui32Port, uint8_t ui8Pins) {
  ;
  GPIODirModeSet(ui32Port, ui8Pins, 0x00000002);
  GPIOPadConfigSet(ui32Port, ui8Pins, 0x00000004, 0x00000008);
}


x86 assembly (clang, -O0):
<GPIOPinTypeLPC>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x4,%edx
mov    $0x8,%ecx
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeLPC>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    $0x4,%edx
mov    $0x8,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeLPC(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @GPIODirModeSet(i32 %5, i32 %6, i32 2)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @GPIOPadConfigSet(i32 %8, i32 %9, i32 4, i32 8)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeLPC(i32 %0, i32 %1) {
%3 = tail call i32 @GPIODirModeSet(i32 %0, i32 %1, i32 2)
%4 = tail call i32 @GPIOPadConfigSet(i32 %0, i32 %1, i32 4, i32 8)
ret void
}
float sq_area_side(float side) {
  float area = side * side;
  return area;
}


x86 assembly (clang, -O0):
<sq_area_side>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<sq_area_side>:
mulss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @sq_area_side(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = load float, float* %2
%6 = fmul float %4, %5
store float %6, float* %3
%7 = load float, float* %3
ret float %7
}

LLVM IR (-O2):
define float @sq_area_side(float %0) {
%2 = fmul float %0, %0
ret float %2
}
const char *__malidrv_build_info(void) {
  return "malidrv:  API_VERSION=900 REPO_URL=heads/rockchip-3.0-rbox-kk "
         "REVISION=r7p0-00rel1-3acf820 CHANGED_REVISION=3acf820 "
         "CHANGE_DATE=2017-08-27 18:06:47 +0200 BUILD_DATE=2017. nov. 24., "
         "péntek, 23:18:04 CET BUILD=debug TARGET_PLATFORM= "
         "MALI_PLATFORM=rk3188 KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 "
         "USING_UMP=y USING_PROFILING=y USING_INTERNAL_PROFILING= "
         "USING_GPU_UTILIZATION=0 USING_DVFS=y USING_DMA_BUF_FENCE =  "
         "MALI_UPPER_HALF_SCHEDULING=1";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [442 x i8] c"malidrv: API_VERSION=900 REPO_URL=heads/rockchip-3.0-rbox-kk REVISION=r7p0-00rel1-3acf820 CHANGED_REVISION=3acf820 CHANGE_DATE=2017-08-27 18:06:47 +0200 BUILD_DATE=2017. nov. 24., p\C3\A9ntek, 23:18:04 CET BUILD=debug TARGET_PLATFORM= MALI_PLATFORM=rk3188 KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP=y USING_PROFILING=y USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=0 USING_DVFS=y USING_DMA_BUF_FENCE = MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([442 x i8], [442 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [442 x i8] c"malidrv: API_VERSION=900 REPO_URL=heads/rockchip-3.0-rbox-kk REVISION=r7p0-00rel1-3acf820 CHANGED_REVISION=3acf820 CHANGE_DATE=2017-08-27 18:06:47 +0200 BUILD_DATE=2017. nov. 24., p\C3\A9ntek, 23:18:04 CET BUILD=debug TARGET_PLATFORM= MALI_PLATFORM=rk3188 KDIR= OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=16 USING_UMP=y USING_PROFILING=y USING_INTERNAL_PROFILING= USING_GPU_UTILIZATION=0 USING_DVFS=y USING_DMA_BUF_FENCE = MALI_UPPER_HALF_SCHEDULING=1\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([442 x i8], [442 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int uint;

/* Variables and functions */
unsigned GetFieldW32(uint *A, register uint index) { return A[index]; }


x86 assembly (clang, -O0):
<GetFieldW32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetFieldW32>:
movslq %esi,%rax
mov    (%rdi,%rax,4),%eax
ret

LLVM IR (-O0):
define i32 @GetFieldW32(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %5, i64 %7
%9 = load i32, i32* %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @GetFieldW32(i32* nocapture %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i32, i32* %0, i64 %3
%5 = load i32, i32* %4
ret i32 %5
}
int _isatty(int file) {
  (void)(file);
  return 1;
}


x86 assembly (clang, -O0):
<_isatty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_isatty>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @_isatty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 1
}

LLVM IR (-O2):
define i32 @_isatty(i32 %0) {
ret i32 1
}
void Sys_NET_AsyncResolveHostname(const char *hostname) {}


x86 assembly (clang, -O0):
<Sys_NET_AsyncResolveHostname>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sys_NET_AsyncResolveHostname>:
ret

LLVM IR (-O0):
define void @Sys_NET_AsyncResolveHostname(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @Sys_NET_AsyncResolveHostname(i8* nocapture %0) {
ret void
}
long long int fact(int n) {
  if (n == 1 || n == 0)
    return 1;
  return fact(n - 1) * n;
}


x86 assembly (clang, -O0):
<fact>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0xc(%rbp)
cmpl   $0x1,-0xc(%rbp)
je     112f <fact+0x1f>
cmpl   $0x0,-0xc(%rbp)
jne    113c <fact+0x2c>
movq   $0x1,-0x8(%rbp)
jmp    1153 <fact+0x43>
mov    -0xc(%rbp),%edi
sub    $0x1,%edi
call   1030 <fact@plt>
movslq -0xc(%rbp),%rcx
imul   %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fact>:
mov    $0x1,%eax
cmp    $0x2,%edi
jb     1130 <fact+0x30>
movslq %edi,%rcx
mov    $0x1,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
imul   %rcx,%rax
add    $0xffffffffffffffff,%rcx
test   $0xfffffffe,%ecx
jne    1120 <fact+0x20>
ret

LLVM IR (-O0):
define i64 @fact(i32 %0) {
%2 = alloca i64
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6, %1
store i64 1, i64* %2
br label %17
10: ; preds = %6
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 1
%13 = call i64 @fact(i32 %12)
%14 = load i32, i32* %3
%15 = sext i32 %14 to i64
%16 = mul nsw i64 %13, %15
store i64 %16, i64* %2
br label %17
17: ; preds = %10, %9
%18 = load i64, i64* %2
ret i64 %18
}

LLVM IR (-O2):
define i64 @fact(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = sext i32 %0 to i64
br label %5
5: ; preds = %3, %5
%6 = phi i64 [ %4, %3 ], [ %8, %5 ]
%7 = phi i64 [ 1, %3 ], [ %9, %5 ]
%8 = add nsw i64 %6, -1
%9 = mul nsw i64 %7, %6
%10 = and i64 %8, 4294967294
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %5
12: ; preds = %5, %1
%13 = phi i64 [ 1, %1 ], [ %9, %5 ]
ret i64 %13
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void FCEUD_Message(char *s) { printf("%s", s); }


x86 assembly (clang, -O0):
<FCEUD_Message>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FCEUD_Message>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @FCEUD_Message(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @FCEUD_Message(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct sembuf {
  int sem_op;
  scalar_t__ sem_num;
  scalar_t__ sem_flg;
};

/* Variables and functions */
int /*<<< orphan*/ semop(int, struct sembuf *, int);
void sop(int semid, int op) {
  struct sembuf sb;
  sb.sem_op = op;
  sb.sem_flg = 0;
  sb.sem_num = 0;
  semop(semid, &sb, 1);
}


x86 assembly (clang, -O0):
<sop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
movq   $0x0,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
mov    $0x1,%edx
call   1030 <semop@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sop>:
sub    $0x18,%rsp
mov    %esi,(%rsp)
xorps  %xmm0,%xmm0
movups %xmm0,0x8(%rsp)
mov    %rsp,%rsi
mov    $0x1,%edx
call   1030 <semop@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.sembuf = type { i32, i64, i64 }
define void @sop(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca %struct.sembuf
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %5, i32 0, i32 0
store i32 %6, i32* %7
%8 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %5, i32 0, i32 2
store i64 0, i64* %8
%9 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %5, i32 0, i32 1
store i64 0, i64* %9
%10 = load i32, i32* %3
%11 = call i32 @semop(i32 %10, %struct.sembuf* %5, i32 1)
ret void
}

LLVM IR (-O2):
%struct.sembuf = type { i32, i64, i64 }
define void @sop(i32 %0, i32 %1) {
%3 = alloca %struct.sembuf
%4 = bitcast %struct.sembuf* %3 to i8*
%5 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %3, i64 0, i32 0
store i32 %1, i32* %5
%6 = getelementptr inbounds %struct.sembuf, %struct.sembuf* %3, i64 0, i32 1
%7 = bitcast i64* %6 to i8*
%8 = call i32 @semop(i32 %0, %struct.sembuf* %3, i32 1)
ret void
}
int xtensa_uimm4(v)
int v;
{ return v >= 0 && v <= 15; }


x86 assembly (clang, -O0):
<xtensa_uimm4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <xtensa_uimm4+0x20>
cmpl   $0xf,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xtensa_uimm4>:
xor    %eax,%eax
cmp    $0x10,%edi
setb   %al
ret

LLVM IR (-O0):
define i32 @xtensa_uimm4(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 15
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @xtensa_uimm4(i32 %0) {
%2 = icmp ult i32 %0, 16
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ kputs(char *);
void module_init() {
  kputs("This is the dummy kernel module speaking!\n");
  return;
}


x86 assembly (clang, -O0):
<module_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <kputs@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<module_init>:
lea    0xee9(%rip),%rdi
jmp    1030 <kputs@plt>

LLVM IR (-O0):
@.str = [43 x i8] c"This is the dummy kernel module speaking!\0A\00"
define void @module_init() {
%1 = call i32 @kputs(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [43 x i8] c"This is the dummy kernel module speaking!\0A\00"
define void @module_init() {
%1 = tail call i32 @kputs(i8* getelementptr inbounds ([43 x i8], [43 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ uppercase_string(char *);
void work(char *str) {
  printf("str = '%s'\n", str);
  printf("making str uppercase..\n");
  uppercase_string(str);
  printf("str = '%s'\n", str);
}


x86 assembly (clang, -O0):
<work>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xec9(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xec7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <uppercase_string@plt>
mov    -0x8(%rbp),%rsi
lea    0xea0(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<work>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0xec2(%rip),%r14
mov    %r14,%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1040 <printf@plt>
lea    0xeba(%rip),%rdi
call   1030 <puts@plt>
mov    %rbx,%rdi
call   1050 <uppercase_string@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"str = '%s'\0A\00"
@.str.1 = [24 x i8] c"making str uppercase..\0A\00"
define void @work(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %3)
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0))
%6 = load i8*, i8** %2
%7 = call i32 @uppercase_string(i8* %6)
%8 = load i8*, i8** %2
%9 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %8)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"str = '%s'\0A\00"
@str = [23 x i8] c"making str uppercase..\00"
define void @work(i8* %0) {
%2 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @uppercase_string(i8* %0)
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
scalar_t__ lrint(double);
int lbs_to_grams(double lbs) { return (int)lrint(lbs * 453.6); }


x86 assembly (clang, -O0):
<lbs_to_grams>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1030 <lrint@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lbs_to_grams>:
mulsd  0xee8(%rip),%xmm0
jmp    1030 <lrint@plt>

LLVM IR (-O0):
define i32 @lbs_to_grams(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 4.536000e+02
%5 = call i64 @lrint(double %4)
%6 = trunc i64 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @lbs_to_grams(double %0) {
%2 = fmul double %0, 4.536000e+02
%3 = tail call i64 @lrint(double %2)
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ ulong;
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ murmurhash2(int /*<<< orphan*/ *, int);
ulong inthash(uint64_t key) { return murmurhash2(&key, sizeof key); }


x86 assembly (clang, -O0):
<inthash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x4(%rbp),%rdi
mov    $0x4,%esi
call   1030 <murmurhash2@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inthash>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
call   1030 <murmurhash2@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @inthash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @murmurhash2(i32* %2, i32 4)
ret i32 %3
}

LLVM IR (-O2):
define i32 @inthash(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @murmurhash2(i32* %2, i32 4)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void bt_free(void **ptr) {
  free((*ptr));
  *ptr = NULL;
}


x86 assembly (clang, -O0):
<bt_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
call   1030 <free@plt>
mov    -0x8(%rbp),%rax
movq   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bt_free>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
call   1030 <free@plt>
movq   $0x0,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @bt_free(i8** %0) {
%2 = alloca i8**
store i8** %0, i8*** %2
%3 = load i8**, i8*** %2
%4 = load i8*, i8** %3
%5 = call i32 @free(i8* %4)
%6 = load i8**, i8*** %2
store i8* null, i8** %6
ret void
}

LLVM IR (-O2):
define void @bt_free(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = tail call i32 @free(i8* %2)
store i8* null, i8** %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ addition_signed(char *, char *, char *);
int /*<<< orphan*/ negate(char *, char *);
void subtraction(char *a, char *b, char *s) {
  char nb[5 + 1] = "00000";
  negate(b, nb);
  addition_signed(a, nb, s);
}


x86 assembly (clang, -O0):
<subtraction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0xec6(%rip),%eax
mov    %eax,-0x1e(%rbp)
mov    0xec0(%rip),%ax
mov    %ax,-0x1a(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x1e(%rbp),%rsi
call   1040 <negate@plt>
mov    -0x8(%rbp),%rdi
lea    -0x1e(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <addition_signed@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<subtraction>:
push   %r15
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rdx,%r14
mov    %rdi,%rbx
movw   $0x30,0xc(%rsp)
movl   $0x30303030,0x8(%rsp)
30
lea    0x8(%rsp),%r15
mov    %rsi,%rdi
mov    %r15,%rsi
call   1040 <negate@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
mov    %r14,%rdx
call   1030 <addition_signed@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@__const.subtraction.nb = [6 x i8] c"00000\00"
define void @subtraction(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca [6 x i8]
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = bitcast [6 x i8]* %7 to i8*
%9 = load i8*, i8** %5
%10 = getelementptr inbounds [6 x i8], [6 x i8]* %7, i64 0, i64 0
%11 = call i32 @negate(i8* %9, i8* %10)
%12 = load i8*, i8** %4
%13 = getelementptr inbounds [6 x i8], [6 x i8]* %7, i64 0, i64 0
%14 = load i8*, i8** %6
%15 = call i32 @addition_signed(i8* %12, i8* %13, i8* %14)
ret void
}

LLVM IR (-O2):
@__const.subtraction.nb = [6 x i8] c"00000\00"
define void @subtraction(i8* %0, i8* %1, i8* %2) {
%4 = alloca [6 x i8]
%5 = getelementptr inbounds [6 x i8], [6 x i8]* %4, i64 0, i64 0
%6 = call i32 @negate(i8* %1, i8* %5)
%7 = call i32 @addition_signed(i8* %0, i8* %5, i8* %2)
ret void
}
void g_scanner_unexp_token() {}


x86 assembly (clang, -O0):
<g_scanner_unexp_token>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_scanner_unexp_token>:
ret

LLVM IR (-O0):
define void @g_scanner_unexp_token() {
ret void
}

LLVM IR (-O2):
define void @g_scanner_unexp_token() {
ret void
}
int config_MODULE_MONITOR(void) { return 0; }


x86 assembly (clang, -O0):
<config_MODULE_MONITOR>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_MODULE_MONITOR>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @config_MODULE_MONITOR() {
ret i32 0
}

LLVM IR (-O2):
define i32 @config_MODULE_MONITOR() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ DirectIndexedXE0(int);
int /*<<< orphan*/ STA8(int /*<<< orphan*/);
void Op95E0M1(void) { STA8(DirectIndexedXE0(2)); }


x86 assembly (clang, -O0):
<Op95E0M1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%edi
call   1040 <DirectIndexedXE0@plt>
mov    %eax,%edi
call   1030 <STA8@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Op95E0M1>:
push   %rax
mov    $0x2,%edi
call   1040 <DirectIndexedXE0@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <STA8@plt>

LLVM IR (-O0):
define void @Op95E0M1() {
%1 = call i32 @DirectIndexedXE0(i32 2)
%2 = call i32 @STA8(i32 %1)
ret void
}

LLVM IR (-O2):
define void @Op95E0M1() {
%1 = tail call i32 @DirectIndexedXE0(i32 2)
%2 = tail call i32 @STA8(i32 %1)
ret void
}
void slice_init_new_context_exec(struct mm_struct *mm) {}


x86 assembly (clang, -O0):
<slice_init_new_context_exec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<slice_init_new_context_exec>:
ret

LLVM IR (-O0):
%struct.mm_struct = type opaque
define void @slice_init_new_context_exec(%struct.mm_struct* %0) {
%2 = alloca %struct.mm_struct*
store %struct.mm_struct* %0, %struct.mm_struct** %2
ret void
}

LLVM IR (-O2):
%struct.mm_struct = type opaque
define void @slice_init_new_context_exec(%struct.mm_struct* nocapture %0) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ const uint8_t;

/* Variables and functions */
uint8_t
sdp_event_query_rfcomm_service_get_rfcomm_channel(const uint8_t *event) {
  return event[2];
}


x86 assembly (clang, -O0):
<sdp_event_query_rfcomm_service_get_rfcomm_channel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdp_event_query_rfcomm_service_get_rfcomm_channel>:
mov    0x8(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @sdp_event_query_rfcomm_service_get_rfcomm_channel(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = getelementptr inbounds i32, i32* %3, i64 2
%5 = load i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @sdp_event_query_rfcomm_service_get_rfcomm_channel(i32* nocapture %0) {
%2 = getelementptr inbounds i32, i32* %0, i64 2
%3 = load i32, i32* %2
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ sigset_t;

/* Variables and functions */
int /*<<< orphan*/ SIGTERM;
int /*<<< orphan*/ SIG_BLOCK;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ sigaddset(int /*<<< orphan*/ *, int /*<<< orphan*/);
int /*<<< orphan*/ sigemptyset(int /*<<< orphan*/ *);
int /*<<< orphan*/ sigprocmask(int /*<<< orphan*/, int /*<<< orphan*/ *,
                               int /*<<< orphan*/ *);
int /*<<< orphan*/ sleep(int);
int main(int argc, char **argv) {
  sigset_t mask;
  sigemptyset(&mask);
  sigaddset(&mask, SIGTERM);
  sigprocmask(SIG_BLOCK, &mask, NULL);
  sleep(120);
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    -0x14(%rbp),%rdi
call   1040 <sigemptyset@plt>
mov    0x2e72(%rip),%rax
mov    (%rax),%esi
lea    -0x14(%rbp),%rdi
call   1070 <sigaddset@plt>
mov    0x2e50(%rip),%rax
mov    (%rax),%edi
lea    -0x14(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edx
call   1030 <sigprocmask@plt>
mov    $0x78,%edi
call   1060 <sleep@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
call   1040 <sigemptyset@plt>
mov    0x2e7f(%rip),%rax
mov    (%rax),%esi
mov    %rbx,%rdi
call   1070 <sigaddset@plt>
mov    0x2e5e(%rip),%rax
mov    (%rax),%edi
mov    %rbx,%rsi
xor    %edx,%edx
call   1030 <sigprocmask@plt>
mov    $0x78,%edi
call   1060 <sleep@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@SIGTERM = global i32 0
@SIG_BLOCK = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = call i32 @sigemptyset(i32* %6)
%8 = load i32, i32* @SIGTERM
%9 = call i32 @sigaddset(i32* %6, i32 %8)
%10 = load i32, i32* @SIG_BLOCK
%11 = call i32 @sigprocmask(i32 %10, i32* %6, i32* null)
%12 = call i32 @sleep(i32 120)
%13 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@SIGTERM = global i32 0
@SIG_BLOCK = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @sigemptyset(i32* %3)
%6 = load i32, i32* @SIGTERM
%7 = call i32 @sigaddset(i32* %3, i32 %6)
%8 = load i32, i32* @SIG_BLOCK
%9 = call i32 @sigprocmask(i32 %8, i32* %3, i32* null)
%10 = call i32 @sleep(i32 120)
%11 = call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ read_unixtstamp(char *, scalar_t__ *);
void test_negative() {
  char *str = "-1234.0123456789";
  uint64_t dest;
  read_unixtstamp(str, &dest);
  assert(dest == (uint64_t)-1);
}


x86 assembly (clang, -O0):
<test_negative>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x10(%rbp),%rsi
call   1040 <read_unixtstamp@plt>
cmpq   $0xffffffffffffffff,-0x10(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_negative>:
push   %rax
lea    0xed8(%rip),%rdi
mov    %rsp,%rsi
call   1040 <read_unixtstamp@plt>
xor    %edi,%edi
cmpq   $0xffffffffffffffff,(%rsp)
sete   %dil
call   1030 <assert@plt>
pop    %rax
ret

LLVM IR (-O0):
@.str = [17 x i8] c"-1234.0123456789\00"
define void @test_negative() {
%1 = alloca i8*
%2 = alloca i64
store i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8** %1
%3 = load i8*, i8** %1
%4 = call i32 @read_unixtstamp(i8* %3, i64* %2)
%5 = load i64, i64* %2
%6 = icmp eq i64 %5, -1
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"-1234.0123456789\00"
define void @test_negative() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
%3 = call i32 @read_unixtstamp(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i64* %1)
%4 = load i64, i64* %1
%5 = icmp eq i64 %4, -1
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
ret void
}
INSTR(NOP) { NEXT_INSTR(); }


x86 assembly (clang, -O0):
<INSTR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <NEXT_INSTR@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INSTR>:
xor    %eax,%eax
jmp    1030 <NEXT_INSTR@plt>

LLVM IR (-O0):
define i32 @INSTR(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = call i32 (...) @NEXT_INSTR()
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @INSTR(i32 %0) {
%2 = tail call i32 (...) @NEXT_INSTR()
ret i32 undef
}
int Max(int a, int b) {
  if (a > b)
    return a;
  else
    return b;
}


x86 assembly (clang, -O0):
<Max>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jle    1121 <Max+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <Max+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Max>:
mov    %esi,%eax
cmp    %esi,%edi
cmovg  %edi,%eax
ret

LLVM IR (-O0):
define i32 @Max(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp sgt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @Max(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
void winsock_fini(void) {}


x86 assembly (clang, -O0):
<winsock_fini>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<winsock_fini>:
ret

LLVM IR (-O0):
define void @winsock_fini() {
ret void
}

LLVM IR (-O2):
define void @winsock_fini() {
ret void
}
/* Variables and functions */
int recv_network_int(int /*<<< orphan*/, int *);
int /*<<< orphan*/ send_network_int(int);
void *recv_thread(void *arg) {
  while (1) {
    int to, val;
    val = recv_network_int(0, &to);
    if (!to) {
      send_network_int(val);
    }
  }
}


x86 assembly (clang, -O0):
<recv_thread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
lea    -0xc(%rbp),%rsi
call   1040 <recv_network_int@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    114c <recv_thread+0x2c>
mov    -0x10(%rbp),%edi
call   1030 <send_network_int@plt>
jmp    112c <recv_thread+0xc>

x86 assembly (clang, -O2):
<recv_thread>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rbx
nopw   0x0(%rax,%rax,1)
xor    %edi,%edi
mov    %rbx,%rsi
call   1040 <recv_network_int@plt>
cmpl   $0x0,0xc(%rsp)
jne    1130 <recv_thread+0x10>
mov    %eax,%edi
call   1030 <send_network_int@plt>
jmp    1130 <recv_thread+0x10>

LLVM IR (-O0):
define i8* @recv_thread(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
br label %5
5: ; preds = %1, %12
%6 = call i32 @recv_network_int(i32 0, i32* %3)
store i32 %6, i32* %4
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %12, label %9
9: ; preds = %5
%10 = load i32, i32* %4
%11 = call i32 @send_network_int(i32 %10)
br label %12
12: ; preds = %9, %5
br label %5
}

LLVM IR (-O2):
define noalias i8* @recv_thread(i8* nocapture readnone %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
br label %4
4: ; preds = %1, %10
%5 = call i32 @recv_network_int(i32 0, i32* %2)
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %4
%9 = call i32 @send_network_int(i32 %5)
br label %10
10: ; preds = %8, %4
br label %4
}
int b(int x) {
  int z = x;
  return z;
}


x86 assembly (clang, -O0):
<b>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<b>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @b(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
ret i32 %5
}

LLVM IR (-O2):
define i32 @b(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
char *malloc(scalar_t__);
char *strCpy(char *, char const *);
scalar_t__ strLen(char const *);
char *strDup(const char *str) {
  char *newString;
  if ((newString = malloc(strLen(str) + 1)))
    return strCpy(newString, str);
  return NULL;
}


x86 assembly (clang, -O0):
<strDup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strLen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
je     1175 <strDup+0x45>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strCpy@plt>
mov    %rax,-0x8(%rbp)
jmp    117d <strDup+0x4d>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strDup>:
push   %rbx
mov    %rdi,%rbx
call   1040 <strLen@plt>
lea    0x1(%rax),%rdi
call   1050 <malloc@plt>
test   %rax,%rax
je     1153 <strDup+0x23>
mov    %rax,%rdi
mov    %rbx,%rsi
pop    %rbx
jmp    1030 <strCpy@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @strDup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i64 @strLen(i8* %5)
%7 = add nsw i64 %6, 1
%8 = call i8* @malloc(i64 %7)
store i8* %8, i8** %4
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %14
10: ; preds = %1
%11 = load i8*, i8** %4
%12 = load i8*, i8** %3
%13 = call i8* @strCpy(i8* %11, i8* %12)
store i8* %13, i8** %2
br label %15
14: ; preds = %1
store i8* null, i8** %2
br label %15
15: ; preds = %14, %10
%16 = load i8*, i8** %2
ret i8* %16
}

LLVM IR (-O2):
define i8* @strDup(i8* %0) {
%2 = tail call i64 @strLen(i8* %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i8* @strCpy(i8* %4, i8* %0)
br label %8
8: ; preds = %1, %6
%9 = phi i8* [ %7, %6 ], [ null, %1 ]
ret i8* %9
}
void RTDbgAsModuleUnlinkByAddr(void) {}


x86 assembly (clang, -O0):
<RTDbgAsModuleUnlinkByAddr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTDbgAsModuleUnlinkByAddr>:
ret

LLVM IR (-O0):
define void @RTDbgAsModuleUnlinkByAddr() {
ret void
}

LLVM IR (-O2):
define void @RTDbgAsModuleUnlinkByAddr() {
ret void
}
/* Variables and functions */
long syscall(int);
long mycall() { return syscall(374); }


x86 assembly (clang, -O0):
<mycall>:
push   %rbp
mov    %rsp,%rbp
mov    $0x176,%edi
call   1030 <syscall@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<mycall>:
mov    $0x176,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i64 @mycall() {
%1 = call i64 @syscall(i32 374)
ret i64 %1
}

LLVM IR (-O2):
define i64 @mycall() {
%1 = tail call i64 @syscall(i32 374)
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
double caller_f64(double (*callback)(double), double value) {
  printf("calling f64 callback\n");
  return callback(value);
}


x86 assembly (clang, -O0):
<caller_f64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
movsd  -0x10(%rbp),%xmm0
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caller_f64>:
push   %rbx
sub    $0x10,%rsp
movsd  %xmm0,0x8(%rsp)
mov    %rdi,%rbx
lea    0xedb(%rip),%rdi
call   1030 <puts@plt>
movsd  0x8(%rsp),%xmm0
mov    %rbx,%rax
add    $0x10,%rsp
pop    %rbx
jmp    *%rax

LLVM IR (-O0):
@.str = [22 x i8] c"calling f64 callback\0A\00"
define double @caller_f64(double (double)* %0, double %1) {
%3 = alloca double (double)*
%4 = alloca double
store double (double)* %0, double (double)** %3
store double %1, double* %4
%5 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0))
%6 = load double (double)*, double (double)** %3
%7 = load double, double* %4
%8 = call double %6(double %7)
ret double %8
}

LLVM IR (-O2):
@str = [21 x i8] c"calling f64 callback\00"
define double @caller_f64(double (double)* nocapture %0, double %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([21 x i8], [21 x i8]* @str, i64 0, i64 0))
%4 = tail call double %0(double %1)
ret double %4
}
void data_abort_mask(void) {}


x86 assembly (clang, -O0):
<data_abort_mask>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<data_abort_mask>:
ret

LLVM IR (-O0):
define void @data_abort_mask() {
ret void
}

LLVM IR (-O2):
define void @data_abort_mask() {
ret void
}
unsigned int vendor_idx(const unsigned int vendor) {
  switch (vendor) {
  case 0:
    return 0;
  case 1:
    return 1;
  case 2:
    return 2;
  default:
    return 2;
  }
}


x86 assembly (clang, -O0):
<vendor_idx>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
test   %eax,%eax
je     113c <vendor_idx+0x3c>
jmp    111a <vendor_idx+0x1a>
mov    -0xc(%rbp),%eax
sub    $0x1,%eax
je     1148 <vendor_idx+0x48>
jmp    112b <vendor_idx+0x2b>
mov    -0xc(%rbp),%eax
sub    $0x2,%eax
je     1154 <vendor_idx+0x54>
jmp    1160 <vendor_idx+0x60>
movl   $0x0,-0x4(%rbp)
jmp    1167 <vendor_idx+0x67>
movl   $0x1,-0x4(%rbp)
jmp    1167 <vendor_idx+0x67>
movl   $0x2,-0x4(%rbp)
jmp    1167 <vendor_idx+0x67>
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vendor_idx>:
cmp    $0x2,%edi
mov    $0x2,%eax
cmovb  %edi,%eax
ret

LLVM IR (-O0):
define i32 @vendor_idx(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %8 [
i32 0, label %5
i32 1, label %6
i32 2, label %7
]
5: ; preds = %1
store i32 0, i32* %2
br label %9
6: ; preds = %1
store i32 1, i32* %2
br label %9
7: ; preds = %1
store i32 2, i32* %2
br label %9
8: ; preds = %1
store i32 2, i32* %2
br label %9
9: ; preds = %8, %7, %6, %5
%10 = load i32, i32* %2
ret i32 %10
}

LLVM IR (-O2):
define i32 @vendor_idx(i32 %0) {
%2 = icmp ult i32 %0, 2
%3 = select i1 %2, i32 %0, i32 2
ret i32 %3
}
int *__errno_location() {
  static int e;
  return &e;
}


x86 assembly (clang, -O0):
<__errno_location>:
push   %rbp
mov    %rsp,%rbp
lea    0x2f19(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__errno_location>:
lea    0x2f1d(%rip),%rax
ret

LLVM IR (-O0):
@__errno_location.e = internal global i32 0
define i32* @__errno_location() {
ret i32* @__errno_location.e
}

LLVM IR (-O2):
@__errno_location.e = internal global i32 0
define i32* @__errno_location() {
ret i32* @__errno_location.e
}
int bst_comp_ulong(void *data1, void *data2) {
  return *((unsigned long *)data1) - *((unsigned long *)data2);
}


x86 assembly (clang, -O0):
<bst_comp_ulong>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bst_comp_ulong>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @bst_comp_ulong(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i64*
%7 = load i64, i64* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
%10 = load i64, i64* %9
%11 = sub i64 %7, %10
%12 = trunc i64 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @bst_comp_ulong(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = load i64, i64* %3
%5 = bitcast i8* %1 to i64*
%6 = load i64, i64* %5
%7 = sub i64 %4, %6
%8 = trunc i64 %7 to i32
ret i32 %8
}
int ulaw2linear(u_val)
unsigned char u_val;
{
  int t;
  u_val = ~u_val;
  t = ((u_val & (0xf)) << 3) + (0x84);
  t <<= ((unsigned)u_val & (0x70)) >> (4);
  return ((u_val & (0x80)) ? ((0x84) - t) : (t - (0x84)));
}


x86 assembly (clang, -O0):
<ulaw2linear>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
and    $0xf,%eax
shl    $0x3,%eax
add    $0x84,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%ecx
and    $0x70,%ecx
shr    $0x4,%ecx
mov    -0x8(%rbp),%eax
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
and    $0x80,%eax
cmp    $0x0,%eax
je     115a <ulaw2linear+0x5a>
mov    $0x84,%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
jmp    1165 <ulaw2linear+0x65>
mov    -0x8(%rbp),%eax
sub    $0x84,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ulaw2linear>:
not    %edi
lea    0x0(,%rdi,8),%eax
or     $0x84,%eax
movzbl %al,%eax
mov    %edi,%ecx
shr    $0x4,%cl
and    $0x7,%cl
shl    %cl,%eax
mov    $0x84,%ecx
sub    %eax,%ecx
add    $0xffffff7c,%eax
test   $0x80,%dil
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define i32 @ulaw2linear(i32 %0) {
%2 = alloca i8
%3 = alloca i32
%4 = trunc i32 %0 to i8
store i8 %4, i8* %2
%5 = load i8, i8* %2
%6 = zext i8 %5 to i32
%7 = xor i32 %6, -1
%8 = trunc i32 %7 to i8
store i8 %8, i8* %2
%9 = load i8, i8* %2
%10 = zext i8 %9 to i32
%11 = and i32 %10, 15
%12 = shl i32 %11, 3
%13 = add nsw i32 %12, 132
store i32 %13, i32* %3
%14 = load i8, i8* %2
%15 = zext i8 %14 to i32
%16 = and i32 %15, 112
%17 = lshr i32 %16, 4
%18 = load i32, i32* %3
%19 = shl i32 %18, %17
store i32 %19, i32* %3
%20 = load i8, i8* %2
%21 = zext i8 %20 to i32
%22 = and i32 %21, 128
%23 = icmp ne i32 %22, 0
br i1 %23, label %24, label %27
24: ; preds = %1
%25 = load i32, i32* %3
%26 = sub nsw i32 132, %25
br label %30
27: ; preds = %1
%28 = load i32, i32* %3
%29 = sub nsw i32 %28, 132
br label %30
30: ; preds = %27, %24
%31 = phi i32 [ %26, %24 ], [ %29, %27 ]
ret i32 %31
}

LLVM IR (-O2):
define i32 @ulaw2linear(i32 %0) {
%2 = and i32 %0, 255
%3 = xor i32 %2, 255
%4 = shl nuw nsw i32 %3, 3
%5 = and i32 %4, 120
%6 = or i32 %5, 132
%7 = lshr i32 %3, 4
%8 = and i32 %7, 7
%9 = shl i32 %6, %8
%10 = and i32 %3, 128
%11 = icmp eq i32 %10, 0
%12 = sub nsw i32 132, %9
%13 = add nsw i32 %9, -132
%14 = select i1 %11, i32 %13, i32 %12
ret i32 %14
}
/* Variables and functions */
int semaphore_trydecr(int, int);
int mutex_trylock(int m_id) { return semaphore_trydecr(m_id, 1); }


x86 assembly (clang, -O0):
<mutex_trylock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1,%esi
call   1030 <semaphore_trydecr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mutex_trylock>:
mov    $0x1,%esi
jmp    1030 <semaphore_trydecr@plt>

LLVM IR (-O0):
define i32 @mutex_trylock(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @semaphore_trydecr(i32 %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @mutex_trylock(i32 %0) {
%2 = tail call i32 @semaphore_trydecr(i32 %0, i32 1)
ret i32 %2
}
int isprint(int c) { return c >= 0x20 && c != 0x7F; }


x86 assembly (clang, -O0):
<isprint>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x20,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1120 <isprint+0x20>
cmpl   $0x7f,-0x4(%rbp)
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isprint>:
cmp    $0x20,%edi
setge  %al
cmp    $0x7f,%edi
setne  %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @isprint(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 32
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp ne i32 %6, 127
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @isprint(i32 %0) {
%2 = icmp sgt i32 %0, 31
%3 = icmp ne i32 %0, 127
%4 = and i1 %2, %3
%5 = zext i1 %4 to i32
ret i32 %5
}
void may_underrun_symbolic_Nowarn_Good(int n) {
  int a[n];
  a[n - 1] = 0;
}


x86 assembly (clang, -O0):
<may_underrun_symbolic_Nowarn_Good>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    %rsp,%rax
mov    %rax,-0x10(%rbp)
lea    0xf(,%rcx,4),%rdx
and    $0xfffffffffffffff0,%rdx
mov    %rsp,%rax
sub    %rdx,%rax
mov    %rax,%rsp
mov    %rcx,-0x18(%rbp)
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<may_underrun_symbolic_Nowarn_Good>:
ret

LLVM IR (-O0):
define void @may_underrun_symbolic_Nowarn_Good(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = call i8* @llvm.stacksave()
store i8* %7, i8** %3
%8 = alloca i32, i64 %6
store i64 %6, i64* %4
%9 = load i32, i32* %2
%10 = sub nsw i32 %9, 1
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i32, i32* %8, i64 %11
store i32 0, i32* %12
%13 = load i8*, i8** %3
ret void
}

LLVM IR (-O2):
define void @may_underrun_symbolic_Nowarn_Good(i32 %0) {
ret void
}