xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ fac(int);
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/);
int main(void) {
  for (int i = 0; i < 100000; i++) {
    printf("%lld \n", fac(i));
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x186a0,-0x8(%rbp)
jge    1167 <main+0x47>
mov    -0x8(%rbp),%edi
call   1030 <fac@plt>
mov    %eax,%esi
lea    0xeac(%rip),%rdi
call   1040 <printf@plt>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1136 <main+0x16>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %r14
push   %rbx
push   %rax
xor    %ebx,%ebx
lea    0xed3(%rip),%r14
nopl   (%rax)
mov    %ebx,%edi
call   1030 <fac@plt>
mov    %r14,%rdi
mov    %eax,%esi
call   1040 <printf@plt>
add    $0x1,%ebx
cmp    $0x186a0,%ebx
jne    1130 <main+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%lld \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 100000
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = load i32, i32* %2
%8 = call i32 @fac(i32 %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %8)
br label %10
10: ; preds = %6
%11 = load i32, i32* %2
%12 = add nsw i32 %11, 1
store i32 %12, i32* %2
br label %3
13: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%lld \0A\00"
define i32 @main() {
br label %2
1: ; preds = %2
ret i32 0
2: ; preds = %0, %2
%3 = phi i32 [ 0, %0 ], [ %6, %2 ]
%4 = tail call i32 @fac(i32 %3)
%5 = tail call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = add nuw nsw i32 %3, 1
%7 = icmp eq i32 %6, 100000
br i1 %7, label %1, label %2
}
void _GLOBAL__sub_I_main() {}


x86 assembly (clang, -O0):
<_GLOBAL__sub_I_main>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_GLOBAL__sub_I_main>:
ret

LLVM IR (-O0):
define void @_GLOBAL__sub_I_main() {
ret void
}

LLVM IR (-O2):
define void @_GLOBAL__sub_I_main() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fputc(char, int /*<<< orphan*/);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/);
int /*<<< orphan*/ stderr;
void error(char *s) {
  fputs("JSMIN Error: ", stderr);
  fputs(s, stderr);
  fputc('\n', stderr);
  exit(1);
}


x86 assembly (clang, -O0):
<error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2e9d(%rip),%rax
mov    (%rax),%esi
lea    0xeb4(%rip),%rdi
call   1030 <fputs@plt>
mov    -0x8(%rbp),%rdi
mov    0x2e84(%rip),%rax
mov    (%rax),%esi
call   1030 <fputs@plt>
mov    0x2e76(%rip),%rax
mov    (%rax),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<error>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
mov    0x2ea2(%rip),%r14
mov    (%r14),%esi
lea    0xeb8(%rip),%rdi
call   1030 <fputs@plt>
mov    (%r14),%esi
mov    %rbx,%rdi
call   1030 <fputs@plt>
mov    (%r14),%esi
mov    $0xa,%edi
call   1040 <fputc@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"JSMIN Error: \00"
@stderr = global i32 0
define void @error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = call i32 @fputs(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = load i8*, i8** %2
%6 = load i32, i32* @stderr
%7 = call i32 @fputs(i8* %5, i32 %6)
%8 = load i32, i32* @stderr
%9 = call i32 @fputc(i8 signext 10, i32 %8)
%10 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@.str = [14 x i8] c"JSMIN Error: \00"
@stderr = global i32 0
define void @error(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fputs(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %2)
%4 = load i32, i32* @stderr
%5 = tail call i32 @fputs(i8* %0, i32 %4)
%6 = load i32, i32* @stderr
%7 = tail call i32 @fputc(i8 signext 10, i32 %6)
%8 = tail call i32 @exit(i32 1)
unreachable
}
int do_087() { return 87; }


x86 assembly (clang, -O0):
<do_087>:
push   %rbp
mov    %rsp,%rbp
mov    $0x57,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_087>:
mov    $0x57,%eax
ret

LLVM IR (-O0):
define i32 @do_087() {
ret i32 87
}

LLVM IR (-O2):
define i32 @do_087() {
ret i32 87
}
/* Variables and functions */
int open(char const *, int);
scalar_t__ strcmp(char const *, char *);
int open_file_or_stdin(const char *filename, int attr) {
  int f;
  if (strcmp(filename, "-")) {
    f = open(filename, attr);
  } else {
    f = 0;
  }
  return f;
}


x86 assembly (clang, -O0):
<open_file_or_stdin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec6(%rip),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%rax
je     115d <open_file_or_stdin+0x3d>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <open@plt>
mov    %eax,-0x10(%rbp)
jmp    1164 <open_file_or_stdin+0x44>
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_file_or_stdin>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
lea    0xed1(%rip),%rsi
call   1030 <strcmp@plt>
test   %rax,%rax
je     1149 <open_file_or_stdin+0x29>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <open@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [2 x i8] c"-\00"
define i32 @open_file_or_stdin(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = call i64 @strcmp(i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%8 = icmp ne i64 %7, 0
br i1 %8, label %9, label %13
9: ; preds = %2
%10 = load i8*, i8** %3
%11 = load i32, i32* %4
%12 = call i32 @open(i8* %10, i32 %11)
store i32 %12, i32* %5
br label %14
13: ; preds = %2
store i32 0, i32* %5
br label %14
14: ; preds = %13, %9
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
@.str = [2 x i8] c"-\00"
define i32 @open_file_or_stdin(i8* %0, i32 %1) {
%3 = tail call i64 @strcmp(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @open(i8* %0, i32 %1)
br label %7
7: ; preds = %2, %5
%8 = phi i32 [ %6, %5 ], [ 0, %2 ]
ret i32 %8
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
long __sched_get_mtime(void) {
  struct timeval tv;
  gettimeofday(&tv, NULL);
  return (tv.tv_sec * 1000) + (tv.tv_usec / 1000);
}


x86 assembly (clang, -O0):
<__sched_get_mtime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
imul   $0x3e8,-0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__sched_get_mtime>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movslq (%rsp),%rax
imul   $0x3e8,%rax,%rcx
movslq 0x4(%rsp),%rax
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rax
add    %edx,%eax
cltq
add    %rcx,%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i64 @__sched_get_mtime() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = mul nsw i32 %4, 1000
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%7 = load i32, i32* %6
%8 = sdiv i32 %7, 1000
%9 = add nsw i32 %5, %8
%10 = sext i32 %9 to i64
ret i64 %10
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i64 @__sched_get_mtime() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = add nsw i32 %9, %6
%11 = sext i32 %10 to i64
ret i64 %11
}
/* Variables and functions */
scalar_t__ send(int, char *, size_t, int /*<<< orphan*/);
int reallySend(int fd, char *msg, size_t len) {
  int sent = 0;
  sent += send(fd, msg + sent, len - sent, 0);
  return sent;
}


x86 assembly (clang, -O0):
<reallySend>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
movslq -0x1c(%rbp),%rax
add    %rax,%rsi
mov    -0x18(%rbp),%rdx
movslq -0x1c(%rbp),%rax
sub    %rax,%rdx
xor    %ecx,%ecx
call   1030 <send@plt>
mov    %rax,%rcx
movslq -0x1c(%rbp),%rax
add    %rcx,%rax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reallySend>:
xor    %ecx,%ecx
jmp    1030 <send@plt>

LLVM IR (-O0):
define i32 @reallySend(i32 %0, i8* %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
store i32 0, i32* %7
%8 = load i32, i32* %4
%9 = load i8*, i8** %5
%10 = load i32, i32* %7
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %9, i64 %11
%13 = load i64, i64* %6
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = sub i64 %13, %15
%17 = call i64 @send(i32 %8, i8* %12, i64 %16, i32 0)
%18 = load i32, i32* %7
%19 = sext i32 %18 to i64
%20 = add nsw i64 %19, %17
%21 = trunc i64 %20 to i32
store i32 %21, i32* %7
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @reallySend(i32 %0, i8* %1, i64 %2) {
%4 = tail call i64 @send(i32 %0, i8* %1, i64 %2, i32 0)
%5 = trunc i64 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ usleep(unsigned long);
void delayMicroseconds(unsigned long us) { usleep(us); }


x86 assembly (clang, -O0):
<delayMicroseconds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<delayMicroseconds>:
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @delayMicroseconds(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @usleep(i64 %3)
ret void
}

LLVM IR (-O2):
define void @delayMicroseconds(i64 %0) {
%2 = tail call i32 @usleep(i64 %0)
ret void
}
void f2(
    struct S {
      int i;
      char j;
    } *
        (*f_param)(
            struct S_proto {
              union B_proto {
                int i;
                char j;
              } i;
              int j;
            } s_proto,
            enum E{A, B, C = 0} e_proto),
    enum E{A, B, C = 0} e_param) {
  struct S s;
  enum E e = B;
}


x86 assembly (clang, -O0):
<f2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x1,-0x1c(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f2>:
ret

LLVM IR (-O0):
%struct.S = type { i32, i8 }
define void @f2(%struct.S* (i64, i32)* %0, i32 %1) {
%3 = alloca %struct.S* (i64, i32)*
%4 = alloca i32
%5 = alloca %struct.S
%6 = alloca i32
store %struct.S* (i64, i32)* %0, %struct.S* (i64, i32)** %3
store i32 %1, i32* %4
store i32 1, i32* %6
ret void
}

LLVM IR (-O2):
%struct.S = type { i32, i8 }
define void @f2(%struct.S* (i64, i32)* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
bool Sys_is_big_endian() {
  assert(sizeof(unsigned int) == 4);
  union {
    unsigned int uI;
    unsigned char uC[4];
  } u = {0x01020304};
  return u.uC[0] == 1;
}


x86 assembly (clang, -O0):
<Sys_is_big_endian>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x1,%edi
call   1030 <assert@plt>
mov    0xed8(%rip),%eax
mov    %eax,-0x8(%rbp)
movzbl -0x8(%rbp),%eax
cmp    $0x1,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sys_is_big_endian>:
push   %rax
mov    $0x1,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%union.anon = type { i32 }
@__const.Sys_is_big_endian.u = %union.anon { i32 16909060 }
define i32 @Sys_is_big_endian() {
%1 = alloca %union.anon
%2 = call i32 @assert(i32 1)
%3 = bitcast %union.anon* %1 to i8*
%4 = bitcast %union.anon* %1 to [4 x i8]*
%5 = getelementptr inbounds [4 x i8], [4 x i8]* %4, i64 0, i64 0
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = icmp eq i32 %7, 1
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @Sys_is_big_endian() {
%1 = tail call i32 @assert(i32 1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ e_absx();
int /*<<< orphan*/ e_sty();
int /*<<< orphan*/ e_writeback();
void e_sty_absx() {
  e_absx();
  e_sty();
  e_writeback();
}


x86 assembly (clang, -O0):
<e_sty_absx>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <e_absx@plt>
mov    $0x0,%al
call   1040 <e_sty@plt>
mov    $0x0,%al
call   1030 <e_writeback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<e_sty_absx>:
push   %rax
xor    %eax,%eax
call   1050 <e_absx@plt>
xor    %eax,%eax
call   1040 <e_sty@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <e_writeback@plt>

LLVM IR (-O0):
define void @e_sty_absx() {
%1 = call i32 (...) @e_absx()
%2 = call i32 (...) @e_sty()
%3 = call i32 (...) @e_writeback()
ret void
}

LLVM IR (-O2):
define void @e_sty_absx() {
%1 = tail call i32 (...) @e_absx()
%2 = tail call i32 (...) @e_sty()
%3 = tail call i32 (...) @e_writeback()
ret void
}
_Bool Bool__DIV__EQ_(_Bool a, _Bool b) { return a != b; }


x86 assembly (clang, -O0):
<Bool__DIV__EQ_>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
and    $0x1,%cl
mov    %cl,-0x1(%rbp)
and    $0x1,%al
mov    %al,-0x2(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
mov    -0x2(%rbp),%cl
and    $0x1,%cl
movzbl %cl,%ecx
cmp    %ecx,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<Bool__DIV__EQ_>:
mov    %edi,%eax
xor    %esi,%eax
ret

LLVM IR (-O0):
define zeroext i1 @Bool__DIV__EQ_(i1 zeroext %0, i1 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = zext i1 %0 to i8
store i8 %5, i8* %3
%6 = zext i1 %1 to i8
store i8 %6, i8* %4
%7 = load i8, i8* %3
%8 = trunc i8 %7 to i1
%9 = zext i1 %8 to i32
%10 = load i8, i8* %4
%11 = trunc i8 %10 to i1
%12 = zext i1 %11 to i32
%13 = icmp ne i32 %9, %12
ret i1 %13
}

LLVM IR (-O2):
define zeroext i1 @Bool__DIV__EQ_(i1 zeroext %0, i1 zeroext %1) {
%3 = xor i1 %0, %1
ret i1 %3
}
/* Variables and functions */
scalar_t__ sem_wait(void *);
int __semaphore_wait(void *h) { return sem_wait(h) == 0; }


x86 assembly (clang, -O0):
<__semaphore_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <sem_wait@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__semaphore_wait>:
push   %rax
call   1030 <sem_wait@plt>
xor    %ecx,%ecx
test   %rax,%rax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__semaphore_wait(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @sem_wait(i8* %3)
%5 = icmp eq i64 %4, 0
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @__semaphore_wait(i8* %0) {
%2 = tail call i64 @sem_wait(i8* %0)
%3 = icmp eq i64 %2, 0
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ htonl(int);
int /*<<< orphan*/ htons(int);
int /*<<< orphan*/ ntohl(int);
int /*<<< orphan*/ ntohs(int);
int main(void) {
  uint32_t u32;
  uint16_t u16;
  u32 = htonl(0x12345678);
  u16 = htons(0x1234);
  u32 = ntohl(0x12345678);
  u16 = ntohs(0x1234);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x12345678,%edi
call   1040 <htonl@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1234,%edi
call   1030 <htons@plt>
mov    %eax,-0xc(%rbp)
mov    $0x12345678,%edi
call   1060 <ntohl@plt>
mov    %eax,-0x8(%rbp)
mov    $0x1234,%edi
call   1050 <ntohs@plt>
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x12345678,%edi
call   1040 <htonl@plt>
mov    $0x1234,%edi
call   1030 <htons@plt>
mov    $0x12345678,%edi
call   1060 <ntohl@plt>
mov    $0x1234,%edi
call   1050 <ntohs@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
%4 = call i32 @htonl(i32 305419896)
store i32 %4, i32* %2
%5 = call i32 @htons(i32 4660)
store i32 %5, i32* %3
%6 = call i32 @ntohl(i32 305419896)
store i32 %6, i32* %2
%7 = call i32 @ntohs(i32 4660)
store i32 %7, i32* %3
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @htonl(i32 305419896)
%2 = tail call i32 @htons(i32 4660)
%3 = tail call i32 @ntohl(i32 305419896)
%4 = tail call i32 @ntohs(i32 4660)
ret i32 0
}
int test_00(unsigned int a) { return !(a > 0x7FFFFFFF); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x7fffffff,-0x4(%rbp)
seta   %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    %edi,%eax
not    %eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @test_00(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ugt i32 %3, 2147483647
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @test_00(i32 %0) {
%2 = xor i32 %0, -1
%3 = lshr i32 %2, 31
ret i32 %3
}
int longitud_string(char *s) {
  int i = 0;
  while (*s != '\0') {
    s += 1;
    i++;
  }
  return i;
}


x86 assembly (clang, -O0):
<longitud_string>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1139 <longitud_string+0x39>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <longitud_string+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<longitud_string>:
cmpb   $0x0,(%rdi)
je     111c <longitud_string+0x1c>
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <longitud_string+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @longitud_string(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %9, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %14
9: ; preds = %4
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 1
store i8* %11, i8** %2
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @longitud_string(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i32 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = add nuw nsw i32 %5, 1
%9 = load i8, i8* %7
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
%12 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %12
}
process_network_buffer(char *packet) {}


x86 assembly (clang, -O0):
<process_network_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_network_buffer>:
ret

LLVM IR (-O0):
define i32 @process_network_buffer(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @process_network_buffer(i8* nocapture readnone %0) {
ret i32 undef
}
/* Type definitions */
typedef int u_int32_t;
typedef int int32_t;

/* Variables and functions */
int32_t swap32(int32_t x) {
  return ((((u_int32_t)x & 0x000000ffU) << 24) |
          (((u_int32_t)x & 0x0000ff00U) << 8) |
          (((u_int32_t)x & 0x00ff0000U) >> 8) |
          (((u_int32_t)x & 0xff000000U) >> 24));
}


x86 assembly (clang, -O0):
<swap32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
mov    -0x4(%rbp),%ecx
and    $0xff00,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
shr    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
shr    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap32>:
mov    %edi,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @swap32(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 255
%5 = shl i32 %4, 24
%6 = load i32, i32* %2
%7 = and i32 %6, 65280
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, 16711680
%12 = lshr i32 %11, 8
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, -16777216
%16 = lshr i32 %15, 24
%17 = or i32 %13, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @swap32(i32 %0) {
%2 = tail call i32 @llvm.bswap.i32(i32 %0)
ret i32 %2
}
/* Variables and functions */
float M_PI;
float sin(float);
float BackEaseOut(float p) {
  float f = (1 - p);
  return 1 - (f * f * f - f * sin(f * M_PI));
}


x86 assembly (clang, -O0):
<BackEaseOut>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x4(%rbp)
movss  0xedb(%rip),%xmm0
subss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x8(%rbp),%xmm0
mov    0x2e8a(%rip),%rax
mulss  (%rax),%xmm0
call   1030 <sin@plt>
movss  -0x14(%rbp),%xmm1
movss  -0x10(%rbp),%xmm2
movaps %xmm0,%xmm3
movss  -0xc(%rbp),%xmm0
mulss  %xmm3,%xmm0
movd   %xmm0,%eax
xor    $0x80000000,%eax
movd   %eax,%xmm0
mulss  %xmm2,%xmm1
addss  %xmm0,%xmm1
movss  0xe66(%rip),%xmm0
subss  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BackEaseOut>:
push   %rax
movss  0xee7(%rip),%xmm1
subss  %xmm0,%xmm1
movss  %xmm1,(%rsp)
movaps %xmm1,%xmm0
mulss  %xmm1,%xmm0
movss  %xmm0,0x4(%rsp)
mov    0x2eb2(%rip),%rax
movss  (%rax),%xmm0
mulss  %xmm1,%xmm0
call   1030 <sin@plt>
movss  (%rsp),%xmm2
mulss  %xmm2,%xmm0
movss  0x4(%rsp),%xmm1
mulss  %xmm2,%xmm1
subss  %xmm0,%xmm1
movss  0xe9e(%rip),%xmm0
subss  %xmm1,%xmm0
pop    %rax
ret

LLVM IR (-O0):
@M_PI = global float 0.000000e+00
define float @BackEaseOut(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = fsub float 1.000000e+00, %4
store float %5, float* %3
%6 = load float, float* %3
%7 = load float, float* %3
%8 = fmul float %6, %7
%9 = load float, float* %3
%10 = load float, float* %3
%11 = load float, float* %3
%12 = load float, float* @M_PI
%13 = fmul float %11, %12
%14 = call float @sin(float %13)
%15 = fmul float %10, %14
%16 = fneg float %15
%17 = call float @llvm.fmuladd.f32(float %8, float %9, float %16)
%18 = fsub float 1.000000e+00, %17
ret float %18
}

LLVM IR (-O2):
@M_PI = global float 0.000000e+00
define float @BackEaseOut(float %0) {
%2 = fsub float 1.000000e+00, %0
%3 = fmul float %2, %2
%4 = load float, float* @M_PI
%5 = fmul float %2, %4
%6 = tail call float @sin(float %5)
%7 = fneg float %2
%8 = fmul float %6, %7
%9 = tail call float @llvm.fmuladd.f32(float %3, float %2, float %8)
%10 = fsub float 1.000000e+00, %9
ret float %10
}
/* Variables and functions */
int /*<<< orphan*/ __coverity_panic__();
void pvm_exec_panic(const char *reason) { __coverity_panic__(); }


x86 assembly (clang, -O0):
<pvm_exec_panic>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__coverity_panic__@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pvm_exec_panic>:
xor    %eax,%eax
jmp    1030 <__coverity_panic__@plt>

LLVM IR (-O0):
define void @pvm_exec_panic(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @__coverity_panic__()
ret void
}

LLVM IR (-O2):
define void @pvm_exec_panic(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @__coverity_panic__()
ret void
}
void XcmsCIELuvClipLuv() {}


x86 assembly (clang, -O0):
<XcmsCIELuvClipLuv>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XcmsCIELuvClipLuv>:
ret

LLVM IR (-O0):
define void @XcmsCIELuvClipLuv() {
ret void
}

LLVM IR (-O2):
define void @XcmsCIELuvClipLuv() {
ret void
}
int m(char *name, int i, long j) {
  do {
    volatile int c = 0;
    volatile __typeof__(name) p_name = name;
    volatile __typeof__(i) p_i = i;
    volatile __typeof__(j) p_j = j;
  inlined_label:
    asm volatile("" : "=g"(c) : "g"(p_name), "g"(p_i), "g"(p_j));
    if (c != 0)
      goto inlined_label;
  } while (0);
  return i + 32;
}


x86 assembly (clang, -O0):
<m>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x28(%rbp),%rdx
mov    -0x2c(%rbp),%ecx
mov    -0x38(%rbp),%rax
mov    %rdx,-0x40(%rbp)
mov    %ecx,-0x44(%rbp)
mov    %rax,-0x50(%rbp)
mov    -0x1c(%rbp),%eax
cmp    $0x0,%eax
je     1153 <m+0x53>
jmp    112c <m+0x2c>
jmp    1158 <m+0x58>
mov    -0xc(%rbp),%eax
add    $0x20,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<m>:
mov    %esi,%eax
movl   $0x0,-0x2c(%rsp)
mov    %rdi,-0x8(%rsp)
mov    %esi,-0x24(%rsp)
mov    %rdx,-0x10(%rsp)
nopl   0x0(%rax,%rax,1)
mov    -0x8(%rsp),%rcx
mov    -0x24(%rsp),%edx
mov    -0x10(%rsp),%rsi
mov    %rcx,-0x18(%rsp)
mov    %edx,-0x28(%rsp)
mov    %rsi,-0x20(%rsp)
cmpl   $0x0,-0x2c(%rsp)
jne    1120 <m+0x20>
add    $0x20,%eax
ret

LLVM IR (-O0):
define i32 @m(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
br label %11
11: ; preds = %3
store volatile i32 0, i32* %7
%12 = load i8*, i8** %4
store volatile i8* %12, i8** %8
%13 = load i32, i32* %5
store volatile i32 %13, i32* %9
%14 = load i64, i64* %6
store volatile i64 %14, i64* %10
br label %15
15: ; preds = %21, %11
%16 = load volatile i8*, i8** %8
%17 = load volatile i32, i32* %9
%18 = load volatile i64, i64* %10
%19 = load volatile i32, i32* %7
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %22
21: ; preds = %15
br label %15
22: ; preds = %15
br label %23
23: ; preds = %22
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 32
ret i32 %25
}

LLVM IR (-O2):
define i32 @m(i8* %0, i32 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i64
%8 = bitcast i32* %4 to i8*
store volatile i32 0, i32* %4
%9 = bitcast i8** %5 to i8*
store volatile i8* %0, i8** %5
%10 = bitcast i32* %6 to i8*
store volatile i32 %1, i32* %6
%11 = bitcast i64* %7 to i8*
store volatile i64 %2, i64* %7
br label %12
12: ; preds = %12, %3
%13 = load volatile i8*, i8** %5
%14 = load volatile i32, i32* %6
%15 = load volatile i64, i64* %7
%16 = load volatile i32, i32* %4
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %12
18: ; preds = %12
%19 = add nsw i32 %1, 32
ret i32 %19
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void usage(int argc, char **argv) {
  (void)argc;
  fprintf(stderr,
          "Usage: %s TARGET src1 [src2 [...]]\n"
          "Try and reverse one or several hashes\n"
          "\n"
          "TARGET:\n"
          " -x, --hash HASH  sets the target to HASH\n"
          " -f, --file FILE  read the targets from FILE (- for stdin)\n"
          " -r, --random N   targets are N random string hashes (bench)\n",
          argv[0]);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%rdx
lea    0xeca(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
mov    (%rsi),%rdx
lea    0xedd(%rip),%rsi
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [245 x i8] c"Usage: %s TARGET src1 [src2 [...]]\0ATry and reverse one or several hashes\0A\0ATARGET:\0A -x, --hash HASH sets the target to HASH\0A -f, --file FILE read the targets from FILE (- for stdin)\0A -r, --random N targets are N random string hashes (bench)\0A\00"
define void @usage(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i32, i32* %3
%6 = load i32, i32* @stderr
%7 = load i8**, i8*** %4
%8 = getelementptr inbounds i8*, i8** %7, i64 0
%9 = load i8*, i8** %8
%10 = call i32 @fprintf(i32 %6, i8* getelementptr inbounds ([245 x i8], [245 x i8]* @.str, i64 0, i64 0), i8* %9)
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [245 x i8] c"Usage: %s TARGET src1 [src2 [...]]\0ATry and reverse one or several hashes\0A\0ATARGET:\0A -x, --hash HASH sets the target to HASH\0A -f, --file FILE read the targets from FILE (- for stdin)\0A -r, --random N targets are N random string hashes (bench)\0A\00"
define void @usage(i32 %0, i8** nocapture %1) {
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %1
%5 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([245 x i8], [245 x i8]* @.str, i64 0, i64 0), i8* %4)
ret void
}
unsigned f0(unsigned n, unsigned d) { return n / d; }


x86 assembly (clang, -O0):
<f0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
xor    %edx,%edx
divl   -0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f0>:
mov    %edi,%eax
xor    %edx,%edx
div    %esi
ret

LLVM IR (-O0):
define i32 @f0(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = udiv i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @f0(i32 %0, i32 %1) {
%3 = udiv i32 %0, %1
ret i32 %3
}
/* Type definitions */
typedef int u_int8_t;

/* Variables and functions */
u_int8_t rev_nibble(u_int8_t in) {
  u_int8_t nibbletab[16] = {0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe,
                            0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf};
  return nibbletab[in & 0xf];
}


x86 assembly (clang, -O0):
<rev_nibble>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x50(%rbp),%rdi
lea    0xeda(%rip),%rsi
mov    $0x40,%edx
call   1030 <memcpy@plt>
mov    -0x4(%rbp),%eax
and    $0xf,%eax
cltq
mov    -0x50(%rbp,%rax,4),%eax
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rev_nibble>:
and    $0xf,%edi
lea    0xef6(%rip),%rax
mov    (%rax,%rdi,4),%eax
ret

LLVM IR (-O0):
@__const.rev_nibble.nibbletab = [16 x i32] [i32 0, i32 8, i32 4, i32 12, i32 2, i32 10, i32 6, i32 14, i32 1, i32 9, i32 5, i32 13, i32 3, i32 11, i32 7, i32 15]
define i32 @rev_nibble(i32 %0) {
%2 = alloca i32
%3 = alloca [16 x i32]
store i32 %0, i32* %2
%4 = bitcast [16 x i32]* %3 to i8*
%5 = load i32, i32* %2
%6 = and i32 %5, 15
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds [16 x i32], [16 x i32]* %3, i64 0, i64 %7
%9 = load i32, i32* %8
ret i32 %9
}

LLVM IR (-O2):
@__const.rev_nibble.nibbletab = [16 x i32] [i32 0, i32 8, i32 4, i32 12, i32 2, i32 10, i32 6, i32 14, i32 1, i32 9, i32 5, i32 13, i32 3, i32 11, i32 7, i32 15]
define i32 @rev_nibble(i32 %0) {
%2 = and i32 %0, 15
%3 = zext i32 %2 to i64
%4 = getelementptr inbounds [16 x i32], [16 x i32]* @__const.rev_nibble.nibbletab, i64 0, i64 %3
%5 = load i32, i32* %4
ret i32 %5
}
char *my_strcpy(const char *src, char *dst) {
  char *ptr;
  ptr = dst;
  while ((*dst++ = *src++))
    ;
  return ptr;
}


x86 assembly (clang, -O0):
<my_strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%al
mov    -0x10(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x10(%rbp)
mov    %al,(%rcx)
cmp    $0x0,%al
je     1143 <my_strcpy+0x43>
jmp    1114 <my_strcpy+0x14>
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_strcpy>:
mov    %rsi,%rax
xor    %ecx,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rdi,%rcx,1),%edx
mov    %dl,(%rax,%rcx,1)
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <my_strcpy+0x10>
ret

LLVM IR (-O0):
define i8* @my_strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
store i8* %6, i8** %5
br label %7
7: ; preds = %14, %2
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %3
%10 = load i8, i8* %8
%11 = load i8*, i8** %4
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %4
store i8 %10, i8* %11
%13 = icmp ne i8 %10, 0
br i1 %13, label %14, label %15
14: ; preds = %7
br label %7
15: ; preds = %7
%16 = load i8*, i8** %5
ret i8* %16
}

LLVM IR (-O2):
define i8* @my_strcpy(i8* nocapture %0, i8* returned writeonly %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %1, %2 ], [ %8, %3 ]
%5 = phi i8* [ %0, %2 ], [ %6, %3 ]
%6 = getelementptr inbounds i8, i8* %5, i64 1
%7 = load i8, i8* %5
%8 = getelementptr inbounds i8, i8* %4, i64 1
store i8 %7, i8* %4
%9 = icmp eq i8 %7, 0
br i1 %9, label %10, label %3
10: ; preds = %3
ret i8* %1
}
unsigned long swcr_update_status(unsigned long swcr, unsigned long fpcr) {
  swcr &= ~0x7e0000ul;
  swcr |= (fpcr >> 3) & 0x7e0000ul;
  return swcr;
}


x86 assembly (clang, -O0):
<swcr_update_status>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
and    $0xffffffffff81ffff,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
shr    $0x3,%rax
and    $0x7e0000,%rax
or     -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swcr_update_status>:
and    $0xffffffffff81ffff,%rdi
shr    $0x3,%rsi
and    $0x7e0000,%esi
lea    (%rsi,%rdi,1),%rax
ret

LLVM IR (-O0):
define i64 @swcr_update_status(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = and i64 %5, -8257537
store i64 %6, i64* %3
%7 = load i64, i64* %4
%8 = lshr i64 %7, 3
%9 = and i64 %8, 8257536
%10 = load i64, i64* %3
%11 = or i64 %10, %9
store i64 %11, i64* %3
%12 = load i64, i64* %3
ret i64 %12
}

LLVM IR (-O2):
define i64 @swcr_update_status(i64 %0, i64 %1) {
%3 = and i64 %0, -8257537
%4 = lshr i64 %1, 3
%5 = and i64 %4, 8257536
%6 = or i64 %5, %3
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ check_vect();
int /*<<< orphan*/ main1();
int /*<<< orphan*/ main2();
int /*<<< orphan*/ main3();
int main(void) {
  check_vect();
  main1();
  main2();
  main3();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <check_vect@plt>
mov    $0x0,%al
call   1050 <main1@plt>
mov    $0x0,%al
call   1060 <main2@plt>
mov    $0x0,%al
call   1040 <main3@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <check_vect@plt>
xor    %eax,%eax
call   1050 <main1@plt>
xor    %eax,%eax
call   1060 <main2@plt>
xor    %eax,%eax
call   1040 <main3@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @check_vect()
%3 = call i32 (...) @main1()
%4 = call i32 (...) @main2()
%5 = call i32 (...) @main3()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @check_vect()
%2 = tail call i32 (...) @main1()
%3 = tail call i32 (...) @main2()
%4 = tail call i32 (...) @main3()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
float flerpf(float v0, float v1, float t) {
  printf("Call function "
         "flerpf"
         ": ");
  return (1 - t) * v0 + t * v1;
}


x86 assembly (clang, -O0):
<flerpf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
lea    0xed6(%rip),%rdi
call   1030 <printf@plt>
movss  0xec5(%rip),%xmm0
subss  -0xc(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
movss  -0xc(%rbp),%xmm1
mulss  -0x8(%rbp),%xmm1
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flerpf>:
sub    $0x18,%rsp
movss  %xmm2,0xc(%rsp)
movss  %xmm1,0x10(%rsp)
movss  %xmm0,0x14(%rsp)
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
movss  0xec6(%rip),%xmm0
movss  0xc(%rsp),%xmm2
subss  %xmm2,%xmm0
movss  0x10(%rsp),%xmm1
mulss  %xmm2,%xmm1
mulss  0x14(%rsp),%xmm0
addss  %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [23 x i8] c"Call function flerpf: \00"
define float @flerpf(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%8 = load float, float* %6
%9 = fsub float 1.000000e+00, %8
%10 = load float, float* %4
%11 = load float, float* %6
%12 = load float, float* %5
%13 = fmul float %11, %12
%14 = call float @llvm.fmuladd.f32(float %9, float %10, float %13)
ret float %14
}

LLVM IR (-O2):
@.str = [23 x i8] c"Call function flerpf: \00"
define float @flerpf(float %0, float %1, float %2) {
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%5 = fsub float 1.000000e+00, %2
%6 = fmul float %1, %2
%7 = tail call float @llvm.fmuladd.f32(float %5, float %0, float %6)
ret float %7
}
int get_fan_nr(void) { return 0; }


x86 assembly (clang, -O0):
<get_fan_nr>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_fan_nr>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @get_fan_nr() {
ret i32 0
}

LLVM IR (-O2):
define i32 @get_fan_nr() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ arm_mpy_op();
int /*<<< orphan*/ arm_mpy_umull(int /*<<< orphan*/);
void arm_umull() { arm_mpy_umull(arm_mpy_op()); }


x86 assembly (clang, -O0):
<arm_umull>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <arm_mpy_op@plt>
mov    %eax,%edi
call   1040 <arm_mpy_umull@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<arm_umull>:
push   %rax
xor    %eax,%eax
call   1030 <arm_mpy_op@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <arm_mpy_umull@plt>

LLVM IR (-O0):
define void @arm_umull() {
%1 = call i32 (...) @arm_mpy_op()
%2 = call i32 @arm_mpy_umull(i32 %1)
ret void
}

LLVM IR (-O2):
define void @arm_umull() {
%1 = tail call i32 (...) @arm_mpy_op()
%2 = tail call i32 @arm_mpy_umull(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isprint(int);
void t_isprint_0x46() {
  Assert_real((isprint(70)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              355, ("isprint should be 1 for F"));
}


x86 assembly (clang, -O0):
<t_isprint_0x46>:
push   %rbp
mov    %rsp,%rbp
mov    $0x46,%edi
call   1030 <isprint@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x163,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x46>:
push   %rax
mov    $0x46,%edi
call   1030 <isprint@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x163,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for F\00"
define void @t_isprint_0x46() {
%1 = call i32 @isprint(i32 70)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 355, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [26 x i8] c"isprint should be 1 for F\00"
define void @t_isprint_0x46() {
%1 = tail call i32 @isprint(i32 70)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 355, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
int calculation(int (*p)(int, int), int a, int b) { return p(a, b); }


x86 assembly (clang, -O0):
<calculation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   *%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<calculation>:
mov    %rdi,%rax
mov    %esi,%edi
mov    %edx,%esi
jmp    *%rax

LLVM IR (-O0):
define i32 @calculation(i32 (i32, i32)* %0, i32 %1, i32 %2) {
%4 = alloca i32 (i32, i32)*
%5 = alloca i32
%6 = alloca i32
store i32 (i32, i32)* %0, i32 (i32, i32)** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32 (i32, i32)*, i32 (i32, i32)** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 %7(i32 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @calculation(i32 (i32, i32)* nocapture %0, i32 %1, i32 %2) {
%4 = tail call i32 %0(i32 %1, i32 %2)
ret i32 %4
}
int imx7d_cpuidle_init(void) { return 0; }


x86 assembly (clang, -O0):
<imx7d_cpuidle_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imx7d_cpuidle_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @imx7d_cpuidle_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @imx7d_cpuidle_init() {
ret i32 0
}
int mem_cmp(const void *dst, const void *src, int cnt) {
  const char *d = (const char *)dst, *s = (const char *)src;
  int r = 0;
  while (cnt-- && (r = *d++ - *s++) == 0)
    ;
  return r;
}


x86 assembly (clang, -O0):
<mem_cmp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x28(%rbp)
movl   $0x0,-0x2c(%rbp)
mov    -0x14(%rbp),%ecx
mov    %ecx,%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
xor    %eax,%eax
cmp    $0x0,%ecx
mov    %al,-0x2d(%rbp)
je     1171 <mem_cmp+0x71>
mov    -0x20(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x20(%rbp)
movsbl (%rax),%eax
mov    -0x28(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x28(%rbp)
movsbl (%rcx),%ecx
sub    %ecx,%eax
mov    %eax,-0x2c(%rbp)
cmp    $0x0,%eax
sete   %al
mov    %al,-0x2d(%rbp)
mov    -0x2d(%rbp),%al
test   $0x1,%al
jne    1181 <mem_cmp+0x81>
jmp    1186 <mem_cmp+0x86>
jmp    1126 <mem_cmp+0x26>
mov    -0x2c(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_cmp>:
mov    %edx,%r8d
xor    %edx,%edx
cs nopw 0x0(%rax,%rax,1)
nop
cmp    %edx,%r8d
je     1126 <mem_cmp+0x26>
movsbl (%rdi,%rdx,1),%eax
movsbl (%rsi,%rdx,1),%ecx
add    $0x1,%rdx
sub    %ecx,%eax
je     1110 <mem_cmp+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @mem_cmp(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%10 = load i8*, i8** %4
store i8* %10, i8** %7
%11 = load i8*, i8** %5
store i8* %11, i8** %8
store i32 0, i32* %9
br label %12
12: ; preds = %29, %3
%13 = load i32, i32* %6
%14 = add nsw i32 %13, -1
store i32 %14, i32* %6
%15 = icmp ne i32 %13, 0
br i1 %15, label %16, label %27
16: ; preds = %12
%17 = load i8*, i8** %7
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %7
%19 = load i8, i8* %17
%20 = sext i8 %19 to i32
%21 = load i8*, i8** %8
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %8
%23 = load i8, i8* %21
%24 = sext i8 %23 to i32
%25 = sub nsw i32 %20, %24
store i32 %25, i32* %9
%26 = icmp eq i32 %25, 0
br label %27
27: ; preds = %16, %12
%28 = phi i1 [ false, %12 ], [ %26, %16 ]
br i1 %28, label %29, label %30
29: ; preds = %27
br label %12
30: ; preds = %27
%31 = load i32, i32* %9
ret i32 %31
}

LLVM IR (-O2):
define i32 @mem_cmp(i8* nocapture %0, i8* nocapture %1, i32 %2) {
br label %4
4: ; preds = %9, %3
%5 = phi i32 [ %2, %3 ], [ %10, %9 ]
%6 = phi i8* [ %0, %3 ], [ %11, %9 ]
%7 = phi i8* [ %1, %3 ], [ %14, %9 ]
%8 = icmp eq i32 %5, 0
br i1 %8, label %19, label %9
9: ; preds = %4
%10 = add nsw i32 %5, -1
%11 = getelementptr inbounds i8, i8* %6, i64 1
%12 = load i8, i8* %6
%13 = sext i8 %12 to i32
%14 = getelementptr inbounds i8, i8* %7, i64 1
%15 = load i8, i8* %7
%16 = sext i8 %15 to i32
%17 = sub nsw i32 %13, %16
%18 = icmp eq i32 %17, 0
br i1 %18, label %4, label %19
19: ; preds = %4, %9
%20 = phi i32 [ %17, %9 ], [ 0, %4 ]
ret i32 %20
}
/* Variables and functions */
long add_long(long, long);
long wack_long(register long u, register long v) {
  register long l = u, r = v;
  l = add_long(l, r);
  return l + r;
}


x86 assembly (clang, -O0):
<wack_long>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <add_long@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    -0x20(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wack_long>:
push   %rbx
mov    %rsi,%rbx
call   1030 <add_long@plt>
add    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i64 @wack_long(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %3
store i64 %7, i64* %5
%8 = load i64, i64* %4
store i64 %8, i64* %6
%9 = load i64, i64* %5
%10 = load i64, i64* %6
%11 = call i64 @add_long(i64 %9, i64 %10)
store i64 %11, i64* %5
%12 = load i64, i64* %5
%13 = load i64, i64* %6
%14 = add nsw i64 %12, %13
ret i64 %14
}

LLVM IR (-O2):
define i64 @wack_long(i64 %0, i64 %1) {
%3 = tail call i64 @add_long(i64 %0, i64 %1)
%4 = add nsw i64 %3, %1
ret i64 %4
}
/* Type definitions */
typedef int uint64_t;
typedef unsigned int uint32_t;

/* Variables and functions */
uint32_t f0a(uint64_t arg) { return ~((unsigned)(arg > -3)); }


x86 assembly (clang, -O0):
<f0a>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0xfffffffd,-0x4(%rbp)
setg   %al
and    $0x1,%al
movzbl %al,%eax
xor    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f0a>:
xor    %eax,%eax
cmp    $0xfffffffe,%edi
setge  %al
not    %eax
ret

LLVM IR (-O0):
define i32 @f0a(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, -3
%5 = zext i1 %4 to i32
%6 = xor i32 %5, -1
ret i32 %6
}

LLVM IR (-O2):
define i32 @f0a(i32 %0) {
%2 = icmp sgt i32 %0, -3
%3 = zext i1 %2 to i32
%4 = xor i32 %3, -1
ret i32 %4
}