xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void print(char **string, int str_num) {
  for (int i = 0; i < str_num; ++i) {
    printf("%s\n", *(string + i));
  }
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1158 <print+0x48>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rsi
lea    0xebb(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <print+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1145 <print+0x35>
mov    %rdi,%r15
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r14
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,8),%rsi
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <print+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define void @print(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8**, i8*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8*, i8** %11, i64 %13
%15 = load i8*, i8** %14
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define void @print(i8** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %7
6: ; preds = %7, %2
ret void
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %12, %7 ]
%9 = getelementptr inbounds i8*, i8** %0, i64 %8
%10 = load i8*, i8** %9
%11 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %10)
%12 = add nuw nsw i64 %8, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %6, label %7
}
/* Variables and functions */
int strlen(char *);
long hesh(char *arr) {
  int c;
  long hesh = 42;
  for (c = 0; c < strlen(arr); c++) {
    hesh = hesh + arr[c] * (c + 1);
  }
  return hesh;
}


x86 assembly (clang, -O0):
<hesh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x2a,-0x18(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x1c(%rbp),%eax
cmp    %ecx,%eax
jge    1178 <hesh+0x68>
mov    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
movslq -0xc(%rbp),%rdx
movsbl (%rcx,%rdx,1),%ecx
mov    -0xc(%rbp),%edx
add    $0x1,%edx
imul   %edx,%ecx
movslq %ecx,%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    112b <hesh+0x1b>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hesh>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
mov    $0x2a,%r15d
test   %eax,%eax
jle    1150 <hesh+0x40>
xor    %ebx,%ebx
nopl   0x0(%rax)
movsbl (%r14,%rbx,1),%eax
add    $0x1,%rbx
imul   %ebx,%eax
cltq
add    %rax,%r15
mov    %r14,%rdi
call   1030 <strlen@plt>
cltq
cmp    %rax,%rbx
jl     1130 <hesh+0x20>
mov    %r15,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @hesh(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i64
store i8* %0, i8** %2
store i64 42, i64* %4
store i32 0, i32* %3
br label %5
5: ; preds = %23, %1
%6 = load i32, i32* %3
%7 = load i8*, i8** %2
%8 = call i32 @strlen(i8* %7)
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %26
10: ; preds = %5
%11 = load i64, i64* %4
%12 = load i8*, i8** %2
%13 = load i32, i32* %3
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
%20 = mul nsw i32 %17, %19
%21 = sext i32 %20 to i64
%22 = add nsw i64 %11, %21
store i64 %22, i64* %4
br label %23
23: ; preds = %10
%24 = load i32, i32* %3
%25 = add nsw i32 %24, 1
store i32 %25, i32* %3
br label %5
26: ; preds = %5
%27 = load i64, i64* %4
ret i64 %27
}

LLVM IR (-O2):
define i64 @hesh(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %18
4: ; preds = %1, %4
%5 = phi i64 [ %10, %4 ], [ 0, %1 ]
%6 = phi i64 [ %14, %4 ], [ 42, %1 ]
%7 = getelementptr inbounds i8, i8* %0, i64 %5
%8 = load i8, i8* %7
%9 = sext i8 %8 to i64
%10 = add nuw nsw i64 %5, 1
%11 = mul i64 %10, %9
%12 = shl i64 %11, 32
%13 = ashr exact i64 %12, 32
%14 = add nsw i64 %6, %13
%15 = tail call i32 @strlen(i8* %0)
%16 = sext i32 %15 to i64
%17 = icmp slt i64 %10, %16
br i1 %17, label %4, label %18
18: ; preds = %4, %1
%19 = phi i64 [ 42, %1 ], [ %14, %4 ]
ret i64 %19
}
void cmp_drv_linear_update(struct CmpDrvLinear *drv, double dt) {
  (void)drv;
  (void)dt;
}


x86 assembly (clang, -O0):
<cmp_drv_linear_update>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_drv_linear_update>:
ret

LLVM IR (-O0):
%struct.CmpDrvLinear = type opaque
define void @cmp_drv_linear_update(%struct.CmpDrvLinear* %0, double %1) {
%3 = alloca %struct.CmpDrvLinear*
%4 = alloca double
store %struct.CmpDrvLinear* %0, %struct.CmpDrvLinear** %3
store double %1, double* %4
%5 = load %struct.CmpDrvLinear*, %struct.CmpDrvLinear** %3
%6 = load double, double* %4
ret void
}

LLVM IR (-O2):
%struct.CmpDrvLinear = type opaque
define void @cmp_drv_linear_update(%struct.CmpDrvLinear* nocapture %0, double %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ getuid();
int /*<<< orphan*/ perror(char *);
scalar_t__ setuid(int);
void drop_root(void) {
  if (getuid() == 0)
    if (setuid(33))
      do {
        perror("setuid()");
        exit(EXIT_FAILURE);
      } while (0);
}


x86 assembly (clang, -O0):
<drop_root>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <getuid@plt>
cmp    $0x0,%rax
jne    118d <drop_root+0x4d>
mov    $0x21,%edi
call   1060 <setuid@plt>
cmp    $0x0,%rax
je     1188 <drop_root+0x48>
jmp    116e <drop_root+0x2e>
lea    0xe8b(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e5f(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
jmp    118d <drop_root+0x4d>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drop_root>:
push   %rax
xor    %eax,%eax
call   1030 <getuid@plt>
test   %rax,%rax
jne    115c <drop_root+0x1c>
mov    $0x21,%edi
call   1060 <setuid@plt>
test   %rax,%rax
jne    115e <drop_root+0x1e>
pop    %rax
ret
lea    0xe9b(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e6f(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"setuid()\00"
@EXIT_FAILURE = global i32 0
define void @drop_root() {
%1 = call i64 (...) @getuid()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %13
3: ; preds = %0
%4 = call i64 @setuid(i32 33)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %12
6: ; preds = %3
br label %7
7: ; preds = %6
%8 = call i32 @perror(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%9 = load i32, i32* @EXIT_FAILURE
%10 = call i32 @exit(i32 %9)
unreachable
11: ; No predecessors!
br label %12
12: ; preds = %11, %3
br label %13
13: ; preds = %12, %0
ret void
}

LLVM IR (-O2):
@.str = [9 x i8] c"setuid()\00"
@EXIT_FAILURE = global i32 0
define void @drop_root() {
%1 = tail call i64 (...) @getuid()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %10
3: ; preds = %0
%4 = tail call i64 @setuid(i32 33)
%5 = icmp eq i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = tail call i32 @perror(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
10: ; preds = %3, %0
ret void
}
/* Type definitions */
struct section_list_link {
  int dummy;
};
struct section_list {
  int dummy;
};
struct genlist_link {
  int dummy;
};
struct genlist {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ genlist_erase(struct genlist *, struct genlist_link *);
void section_list_erase(struct section_list *tthis,
                        struct section_list_link *plink) {
  genlist_erase((struct genlist *)tthis, (struct genlist_link *)plink);
}


x86 assembly (clang, -O0):
<section_list_erase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <genlist_erase@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<section_list_erase>:
jmp    1030 <genlist_erase@plt>

LLVM IR (-O0):
%struct.section_list = type { i32 }
%struct.section_list_link = type { i32 }
%struct.genlist = type { i32 }
%struct.genlist_link = type { i32 }
define void @section_list_erase(%struct.section_list* %0, %struct.section_list_link* %1) {
%3 = alloca %struct.section_list*
%4 = alloca %struct.section_list_link*
store %struct.section_list* %0, %struct.section_list** %3
store %struct.section_list_link* %1, %struct.section_list_link** %4
%5 = load %struct.section_list*, %struct.section_list** %3
%6 = bitcast %struct.section_list* %5 to %struct.genlist*
%7 = load %struct.section_list_link*, %struct.section_list_link** %4
%8 = bitcast %struct.section_list_link* %7 to %struct.genlist_link*
%9 = call i32 @genlist_erase(%struct.genlist* %6, %struct.genlist_link* %8)
ret void
}

LLVM IR (-O2):
%struct.section_list = type { i32 }
%struct.section_list_link = type { i32 }
%struct.genlist = type { i32 }
%struct.genlist_link = type { i32 }
define void @section_list_erase(%struct.section_list* %0, %struct.section_list_link* %1) {
%3 = bitcast %struct.section_list* %0 to %struct.genlist*
%4 = bitcast %struct.section_list_link* %1 to %struct.genlist_link*
%5 = tail call i32 @genlist_erase(%struct.genlist* %3, %struct.genlist_link* %4)
ret void
}
/* Variables and functions */
int f61(int *);
int f62(int *p) { return f61(p); }


x86 assembly (clang, -O0):
<f62>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <f61@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f62>:
jmp    1030 <f61@plt>

LLVM IR (-O0):
define i32 @f62(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @f61(i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @f62(i32* %0) {
%2 = tail call i32 @f61(i32* %0)
ret i32 %2
}
void insw(unsigned short port, void *addr, unsigned long count) {
  asm volatile("cld ; rep ; insw"
               : "=D"(addr), "=c"(count)
               : "d"(port), "0"(addr), "1"(count));
}


x86 assembly (clang, -O0):
<insw>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x2(%rbp),%dx
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rcx
cld
rep insw (%dx),%es:(%rdi)
mov    %rdi,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<insw>:
mov    %rdx,%rcx
mov    %edi,%edx
mov    %rsi,%rdi
cld
rep insw (%dx),%es:(%rdi)
ret

LLVM IR (-O0):
define void @insw(i16 zeroext %0, i8* %1, i64 %2) {
%4 = alloca i16
%5 = alloca i8*
%6 = alloca i64
store i16 %0, i16* %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i16, i16* %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call { i8*, i64 } asm sideeffect "cld ; rep ; insw", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i16 %7, i8* %8, i64 %9)
%11 = extractvalue { i8*, i64 } %10, 0
%12 = extractvalue { i8*, i64 } %10, 1
store i8* %11, i8** %5
store i64 %12, i64* %6
ret void
}

LLVM IR (-O2):
define void @insw(i16 zeroext %0, i8* %1, i64 %2) {
%4 = tail call { i8*, i64 } asm sideeffect "cld ; rep ; insw", "={di},={cx},{dx},0,1,~{dirflag},~{fpsr},~{flags}"(i16 %0, i8* %1, i64 %2)
ret void
}
/* Variables and functions */
int numa_num_possible_cpus();
int main(void) { return numa_num_possible_cpus(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <numa_num_possible_cpus@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <numa_num_possible_cpus@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @numa_num_possible_cpus()
ret i32 %2
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @numa_num_possible_cpus()
ret i32 %1
}
char *alloca(size)
int size;
{ return malloc(size); }


x86 assembly (clang, -O0):
<alloca>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloca>:
movslq %edi,%rdi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @alloca(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = call i8* @malloc(i64 %4)
ret i8* %5
}

LLVM IR (-O2):
define noalias i8* @alloca(i32 %0) {
%2 = sext i32 %0 to i64
%3 = tail call i8* @malloc(i64 %2)
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fputs(char *, int /*<<< orphan*/ *);
int putoffset(char *offsetfile, char *str) {
  FILE *fp;
  fp = fopen(offsetfile, "w");
  if (fp) {
    fputs(str, fp);
    fclose(fp);
  }
  return 0;
}


x86 assembly (clang, -O0):
<putoffset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xeb5(%rip),%rsi
call   1050 <fopen@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1175 <putoffset+0x45>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <fputs@plt>
mov    -0x18(%rbp),%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putoffset>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
lea    0xec2(%rip),%rsi
call   1050 <fopen@plt>
test   %rax,%rax
je     115e <putoffset+0x2e>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1040 <fputs@plt>
mov    %rbx,%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [2 x i8] c"w\00"
define i32 @putoffset(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i32* @fopen(i8* %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i32* %7, i32** %5
%8 = load i32*, i32** %5
%9 = icmp ne i32* %8, null
br i1 %9, label %10, label %16
10: ; preds = %2
%11 = load i8*, i8** %4
%12 = load i32*, i32** %5
%13 = call i32 @fputs(i8* %11, i32* %12)
%14 = load i32*, i32** %5
%15 = call i32 @fclose(i32* %14)
br label %16
16: ; preds = %10, %2
ret i32 0
}

LLVM IR (-O2):
@.str = [2 x i8] c"w\00"
define i32 @putoffset(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32* @fopen(i8* %0, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i32* %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = tail call i32 @fputs(i8* %1, i32* %3)
%7 = tail call i32 @fclose(i32* %3)
br label %8
8: ; preds = %5, %2
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ antohs(void *, size_t);
int fread(void *, size_t, size_t, int /*<<< orphan*/ *);
size_t nfread(void *ptr, size_t size, size_t nmemb, FILE *stream) {
  int res = fread(ptr, size, nmemb, stream);
  if (res < 0) {
    return res;
  }
  antohs(ptr, size * nmemb / 2);
  return res;
}


x86 assembly (clang, -O0):
<nfread>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x28(%rbp),%rcx
call   1030 <fread@plt>
mov    %eax,-0x2c(%rbp)
cmpl   $0x0,-0x2c(%rbp)
jge    1167 <nfread+0x47>
movslq -0x2c(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1185 <nfread+0x65>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
imul   -0x20(%rbp),%rsi
shr    $0x1,%rsi
call   1040 <antohs@plt>
movslq -0x2c(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<nfread>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdx,%rbx
mov    %rsi,%r15
mov    %rdi,%r14
call   1030 <fread@plt>
mov    %eax,%ebp
test   %eax,%eax
js     114d <nfread+0x2d>
imul   %r15,%rbx
shr    %rbx
mov    %r14,%rdi
mov    %rbx,%rsi
call   1040 <antohs@plt>
movslq %ebp,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i64 @nfread(i8* %0, i64 %1, i64 %2, i32* %3) {
%5 = alloca i64
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i32*
%10 = alloca i32
store i8* %0, i8** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i32* %3, i32** %9
%11 = load i8*, i8** %6
%12 = load i64, i64* %7
%13 = load i64, i64* %8
%14 = load i32*, i32** %9
%15 = call i32 @fread(i8* %11, i64 %12, i64 %13, i32* %14)
store i32 %15, i32* %10
%16 = load i32, i32* %10
%17 = icmp slt i32 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %4
%19 = load i32, i32* %10
%20 = sext i32 %19 to i64
store i64 %20, i64* %5
br label %30
21: ; preds = %4
%22 = load i8*, i8** %6
%23 = load i64, i64* %7
%24 = load i64, i64* %8
%25 = mul i64 %23, %24
%26 = udiv i64 %25, 2
%27 = call i32 @antohs(i8* %22, i64 %26)
%28 = load i32, i32* %10
%29 = sext i32 %28 to i64
store i64 %29, i64* %5
br label %30
30: ; preds = %21, %18
%31 = load i64, i64* %5
ret i64 %31
}

LLVM IR (-O2):
define i64 @nfread(i8* %0, i64 %1, i64 %2, i32* nocapture %3) {
%5 = tail call i32 @fread(i8* %0, i64 %1, i64 %2, i32* %3)
%6 = icmp slt i32 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = mul i64 %2, %1
%9 = lshr i64 %8, 1
%10 = tail call i32 @antohs(i8* %0, i64 %9)
br label %11
11: ; preds = %4, %7
%12 = sext i32 %5 to i64
ret i64 %12
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0xa2() {
  Assert_real((isspace(162) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              815, ("isspace should be 0 for 0xa2"));
}


x86 assembly (clang, -O0):
<t_isspace_0xa2>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa2,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x32f,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0xa2>:
push   %rax
mov    $0xa2,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x32f,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xa2\00"
define void @t_isspace_0xa2() {
%1 = call i64 @isspace(i32 162)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 815, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0xa2\00"
define void @t_isspace_0xa2() {
%1 = tail call i64 @isspace(i32 162)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 815, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
scalar_t__ GLeeInit();
int /*<<< orphan*/ pglTagSampleBufferSGIX();
void _Lazy_glTagSampleBufferSGIX(void) {
  if (GLeeInit())
    pglTagSampleBufferSGIX();
}


x86 assembly (clang, -O0):
<_Lazy_glTagSampleBufferSGIX>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GLeeInit@plt>
cmp    $0x0,%rax
je     113c <_Lazy_glTagSampleBufferSGIX+0x1c>
mov    $0x0,%al
call   1040 <pglTagSampleBufferSGIX@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_Lazy_glTagSampleBufferSGIX>:
push   %rax
xor    %eax,%eax
call   1030 <GLeeInit@plt>
test   %rax,%rax
je     1135 <_Lazy_glTagSampleBufferSGIX+0x15>
xor    %eax,%eax
pop    %rcx
jmp    1040 <pglTagSampleBufferSGIX@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @_Lazy_glTagSampleBufferSGIX() {
%1 = call i64 (...) @GLeeInit()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = call i32 (...) @pglTagSampleBufferSGIX()
br label %5
5: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
define void @_Lazy_glTagSampleBufferSGIX() {
%1 = tail call i64 (...) @GLeeInit()
%2 = icmp eq i64 %1, 0
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @pglTagSampleBufferSGIX()
br label %5
5: ; preds = %3, %0
ret void
}
char *prev_char_utf8(const char *p) {
  while (1) {
    --p;
    if ((*p & 0xc0) != 0x80)
      return (char *)p;
  }
}


x86 assembly (clang, -O0):
<prev_char_utf8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0xffffffffffffffff,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
and    $0xc0,%eax
cmp    $0x80,%eax
je     1131 <prev_char_utf8+0x31>
mov    -0x8(%rbp),%rax
pop    %rbp
ret
jmp    1108 <prev_char_utf8+0x8>

x86 assembly (clang, -O2):
<prev_char_utf8>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl -0x1(%rax),%ecx
add    $0xffffffffffffffff,%rax
and    $0xc0,%cl
cmp    $0x80,%cl
je     1110 <prev_char_utf8+0x10>
ret

LLVM IR (-O0):
define i8* @prev_char_utf8(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %1, %13
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i32 -1
store i8* %5, i8** %2
%6 = load i8*, i8** %2
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = and i32 %8, 192
%10 = icmp ne i32 %9, 128
br i1 %10, label %11, label %13
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
13: ; preds = %3
br label %3
}

LLVM IR (-O2):
define i8* @prev_char_utf8(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %4, %2 ]
%4 = getelementptr inbounds i8, i8* %3, i64 -1
%5 = load i8, i8* %4
%6 = and i8 %5, -64
%7 = icmp eq i8 %6, -128
br i1 %7, label %2, label %8
8: ; preds = %2
ret i8* %4
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
int /*<<< orphan*/ _HibernateWriteComplete();
void HibernateIntDisable(uint32_t ui32IntFlags) {
  ASSERT(!(ui32IntFlags & ~(0x00000008 | 0x00000004 | 0x00000080 | 0x00000040 |
                            0x00000020 | 0x00000001 | 0x00000010)));
  (*((volatile uint32_t *)(0x400FC014))) &= ~ui32IntFlags;
  _HibernateWriteComplete();
}


x86 assembly (clang, -O0):
<HibernateIntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffffff02,%eax
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%edi
call   1040 <ASSERT@plt>
mov    -0x4(%rbp),%eax
xor    $0xffffffff,%eax
mov    $0x400fc014,%ecx
mov    (%rcx),%ecx
and    %eax,%ecx
mov    $0x400fc014,%eax
mov    %ecx,(%rax)
mov    $0x0,%al
call   1030 <_HibernateWriteComplete@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<HibernateIntDisable>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
test   $0xffffff02,%ebx
sete   %dil
call   1040 <ASSERT@plt>
not    %ebx
and    %ebx,0x400fc014
xor    %eax,%eax
pop    %rbx
jmp    1030 <_HibernateWriteComplete@plt>

LLVM IR (-O0):
define void @HibernateIntDisable(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -254
%5 = icmp ne i32 %4, 0
%6 = xor i1 %5, true
%7 = zext i1 %6 to i32
%8 = call i32 @ASSERT(i32 %7)
%9 = load i32, i32* %2
%10 = xor i32 %9, -1
%11 = load volatile i32, i32* inttoptr (i64 1074774036 to i32*)
%12 = and i32 %11, %10
store volatile i32 %12, i32* inttoptr (i64 1074774036 to i32*)
%13 = call i32 (...) @_HibernateWriteComplete()
ret void
}

LLVM IR (-O2):
define void @HibernateIntDisable(i32 %0) {
%2 = and i32 %0, -254
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = xor i32 %0, -1
%7 = load volatile i32, i32* inttoptr (i64 1074774036 to i32*)
%8 = and i32 %7, %6
store volatile i32 %8, i32* inttoptr (i64 1074774036 to i32*)
%9 = tail call i32 (...) @_HibernateWriteComplete()
ret void
}
void StoreReleasePointer(long *volatile *ptr, long *value) {
  CompilerWriteFence();
  *ptr = value;
}


x86 assembly (clang, -O0):
<StoreReleasePointer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <CompilerWriteFence@plt>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<StoreReleasePointer>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <CompilerWriteFence@plt>
mov    %r14,(%rbx)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @StoreReleasePointer(i64** %0, i64* %1) {
%3 = alloca i64**
%4 = alloca i64*
store i64** %0, i64*** %3
store i64* %1, i64** %4
%5 = call i32 (...) @CompilerWriteFence()
%6 = load i64*, i64** %4
%7 = load i64**, i64*** %3
store volatile i64* %6, i64** %7
ret void
}

LLVM IR (-O2):
define void @StoreReleasePointer(i64** %0, i64* %1) {
%3 = tail call i32 (...) @CompilerWriteFence()
store volatile i64* %1, i64** %0
ret void
}
void NET_resume() {}


x86 assembly (clang, -O0):
<NET_resume>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NET_resume>:
ret

LLVM IR (-O0):
define void @NET_resume() {
ret void
}

LLVM IR (-O2):
define void @NET_resume() {
ret void
}
/* Variables and functions */
char *oauth_post_data(const char *u, const char *data, size_t len,
                      const char *customheader) {
  return NULL;
}


x86 assembly (clang, -O0):
<oauth_post_data>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<oauth_post_data>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @oauth_post_data(i8* %0, i8* %1, i64 %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i8* %3, i8** %8
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @oauth_post_data(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2, i8* nocapture readnone %3) {
ret i8* null
}
void st4(char *p, unsigned int x) {
  p[0] = x >> 24;
  p[1] = x >> 16;
  p[2] = x >> 8;
  p[3] = x;
}


x86 assembly (clang, -O0):
<st4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shr    $0x18,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0xc(%rbp),%eax
shr    $0x10,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0xc(%rbp),%eax
shr    $0x8,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x2(%rax)
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x3(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<st4>:
bswap  %esi
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
define void @st4(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = lshr i32 %5, 24
%7 = trunc i32 %6 to i8
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 0
store i8 %7, i8* %9
%10 = load i32, i32* %4
%11 = lshr i32 %10, 16
%12 = trunc i32 %11 to i8
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i64 1
store i8 %12, i8* %14
%15 = load i32, i32* %4
%16 = lshr i32 %15, 8
%17 = trunc i32 %16 to i8
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i64 2
store i8 %17, i8* %19
%20 = load i32, i32* %4
%21 = trunc i32 %20 to i8
%22 = load i8*, i8** %3
%23 = getelementptr inbounds i8, i8* %22, i64 3
store i8 %21, i8* %23
ret void
}

LLVM IR (-O2):
define void @st4(i8* nocapture writeonly %0, i32 %1) {
%3 = lshr i32 %1, 24
%4 = trunc i32 %3 to i8
store i8 %4, i8* %0
%5 = lshr i32 %1, 16
%6 = trunc i32 %5 to i8
%7 = getelementptr inbounds i8, i8* %0, i64 1
store i8 %6, i8* %7
%8 = lshr i32 %1, 8
%9 = trunc i32 %8 to i8
%10 = getelementptr inbounds i8, i8* %0, i64 2
store i8 %9, i8* %10
%11 = trunc i32 %1 to i8
%12 = getelementptr inbounds i8, i8* %0, i64 3
store i8 %11, i8* %12
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ SEEK_SET;
int dds_test();
int /*<<< orphan*/ fseek(int /*<<< orphan*/ *, int, int /*<<< orphan*/);
int ftell(int /*<<< orphan*/ *);
int /*<<< orphan*/ start_file(int /*<<< orphan*/ *);
int stbi_dds_test_file(FILE *f) {
  int r, n = ftell(f);
  start_file(f);
  r = dds_test();
  fseek(f, n, SEEK_SET);
  return r;
}


x86 assembly (clang, -O0):
<stbi_dds_test_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <ftell@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <start_file@plt>
mov    $0x0,%al
call   1050 <dds_test@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    0x2e67(%rip),%rax
mov    (%rax),%edx
call   1060 <fseek@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stbi_dds_test_file>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
call   1040 <ftell@plt>
mov    %eax,%r14d
mov    %rbx,%rdi
call   1030 <start_file@plt>
xor    %eax,%eax
call   1050 <dds_test@plt>
mov    %eax,%ebp
mov    0x2e79(%rip),%rax
mov    (%rax),%edx
mov    %rbx,%rdi
mov    %r14d,%esi
call   1060 <fseek@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@SEEK_SET = global i32 0
define i32 @stbi_dds_test_file(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
store i32* %0, i32** %2
%5 = load i32*, i32** %2
%6 = call i32 @ftell(i32* %5)
store i32 %6, i32* %4
%7 = load i32*, i32** %2
%8 = call i32 @start_file(i32* %7)
%9 = call i32 (...) @dds_test()
store i32 %9, i32* %3
%10 = load i32*, i32** %2
%11 = load i32, i32* %4
%12 = load i32, i32* @SEEK_SET
%13 = call i32 @fseek(i32* %10, i32 %11, i32 %12)
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
@SEEK_SET = global i32 0
define i32 @stbi_dds_test_file(i32* %0) {
%2 = tail call i32 @ftell(i32* %0)
%3 = tail call i32 @start_file(i32* %0)
%4 = tail call i32 (...) @dds_test()
%5 = load i32, i32* @SEEK_SET
%6 = tail call i32 @fseek(i32* %0, i32 %2, i32 %5)
ret i32 %4
}
/* Type definitions */
struct cirbuf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ __cirbuf_del_head(struct cirbuf *);
void cirbuf_del_head(struct cirbuf *cbuf) { __cirbuf_del_head(cbuf); }


x86 assembly (clang, -O0):
<cirbuf_del_head>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <__cirbuf_del_head@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cirbuf_del_head>:
jmp    1030 <__cirbuf_del_head@plt>

LLVM IR (-O0):
%struct.cirbuf = type { i32 }
define void @cirbuf_del_head(%struct.cirbuf* %0) {
%2 = alloca %struct.cirbuf*
store %struct.cirbuf* %0, %struct.cirbuf** %2
%3 = load %struct.cirbuf*, %struct.cirbuf** %2
%4 = call i32 @__cirbuf_del_head(%struct.cirbuf* %3)
ret void
}

LLVM IR (-O2):
%struct.cirbuf = type { i32 }
define void @cirbuf_del_head(%struct.cirbuf* %0) {
%2 = tail call i32 @__cirbuf_del_head(%struct.cirbuf* %0)
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
uint64_t chpl_bitops_rotl_64(uint64_t x, uint64_t n) {
  assert(n < 64);
  return (x << n) | (x >> (-n & (64 - 1)));
}


x86 assembly (clang, -O0):
<chpl_bitops_rotl_64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x40,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
shl    %cl,%eax
mov    -0x4(%rbp),%edx
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
and    $0x3f,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<chpl_bitops_rotl_64>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
xor    %edi,%edi
cmp    $0x40,%esi
setl   %dil
call   1030 <assert@plt>
mov    %ebp,%eax
mov    %ebx,%ecx
shl    %cl,%eax
neg    %bl
mov    %ebx,%ecx
sar    %cl,%ebp
or     %eax,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @chpl_bitops_rotl_64(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = icmp slt i32 %5, 64
%7 = zext i1 %6 to i32
%8 = call i32 @assert(i32 %7)
%9 = load i32, i32* %3
%10 = load i32, i32* %4
%11 = shl i32 %9, %10
%12 = load i32, i32* %3
%13 = load i32, i32* %4
%14 = sub nsw i32 0, %13
%15 = and i32 %14, 63
%16 = ashr i32 %12, %15
%17 = or i32 %11, %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @chpl_bitops_rotl_64(i32 %0, i32 %1) {
%3 = icmp slt i32 %1, 64
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = shl i32 %0, %1
%7 = sub nsw i32 0, %1
%8 = and i32 %7, 63
%9 = ashr i32 %0, %8
%10 = or i32 %9, %6
ret i32 %10
}
__attribute__((__no__)) void
do_nothing_big_hole_runtime_partial(struct test_big_hole *ptr) {
  if ((unsigned long)ptr > 0x2)
    return;
  else
    return;
}


x86 assembly (clang, -O0):
<do_nothing_big_hole_runtime_partial>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmp    $0x2,%rax
jbe    111b <do_nothing_big_hole_runtime_partial+0x1b>
jmp    1120 <do_nothing_big_hole_runtime_partial+0x20>
jmp    1120 <do_nothing_big_hole_runtime_partial+0x20>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_nothing_big_hole_runtime_partial>:
ret

LLVM IR (-O0):
%struct.test_big_hole = type opaque
define void @do_nothing_big_hole_runtime_partial(%struct.test_big_hole* %0) {
%2 = alloca %struct.test_big_hole*
store %struct.test_big_hole* %0, %struct.test_big_hole** %2
%3 = load %struct.test_big_hole*, %struct.test_big_hole** %2
%4 = ptrtoint %struct.test_big_hole* %3 to i64
%5 = icmp ugt i64 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
%struct.test_big_hole = type opaque
define void @do_nothing_big_hole_runtime_partial(%struct.test_big_hole* nocapture %0) {
ret void
}
/* Variables and functions */
bool search(const int *a, int n, int key) {
  int *p = NULL;
  for (p = a; p < a + n; p++) {
    if (*p == key)
      return true;
  }
  return false;
}


x86 assembly (clang, -O0):
<search>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq -0x14(%rbp),%rdx
shl    $0x2,%rdx
add    %rdx,%rcx
cmp    %rcx,%rax
jae    116b <search+0x6b>
mov    -0x20(%rbp),%rax
mov    (%rax),%eax
cmp    -0x18(%rbp),%eax
jne    1155 <search+0x55>
movl   $0x1,-0x4(%rbp)
jmp    1172 <search+0x72>
jmp    115a <search+0x5a>
mov    -0x20(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x20(%rbp)
jmp    111e <search+0x1e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<search>:
xor    %eax,%eax
test   %esi,%esi
jle    111d <search+0x1d>
movslq %esi,%rcx
lea    (%rdi,%rcx,4),%rcx
nopl   (%rax)
cmp    %edx,(%rdi)
je     111e <search+0x1e>
add    $0x4,%rdi
cmp    %rcx,%rdi
jb     1110 <search+0x10>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @search(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32*
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32* null, i32** %8
%9 = load i32*, i32** %5
store i32* %9, i32** %8
br label %10
10: ; preds = %24, %3
%11 = load i32*, i32** %8
%12 = load i32*, i32** %5
%13 = load i32, i32* %6
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = icmp ult i32* %11, %15
br i1 %16, label %17, label %27
17: ; preds = %10
%18 = load i32*, i32** %8
%19 = load i32, i32* %18
%20 = load i32, i32* %7
%21 = icmp eq i32 %19, %20
br i1 %21, label %22, label %23
22: ; preds = %17
store i32 1, i32* %4
br label %28
23: ; preds = %17
br label %24
24: ; preds = %23
%25 = load i32*, i32** %8
%26 = getelementptr inbounds i32, i32* %25, i32 1
store i32* %26, i32** %8
br label %10
27: ; preds = %10
store i32 0, i32* %4
br label %28
28: ; preds = %27, %22
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @search(i32* %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %0, i64 %4
%6 = icmp sgt i32 %1, 0
br i1 %6, label %9, label %14
7: ; preds = %9
%8 = icmp ult i32* %13, %5
br i1 %8, label %9, label %14
9: ; preds = %3, %7
%10 = phi i32* [ %13, %7 ], [ %0, %3 ]
%11 = load i32, i32* %10
%12 = icmp eq i32 %11, %2
%13 = getelementptr inbounds i32, i32* %10, i64 1
br i1 %12, label %14, label %7
14: ; preds = %9, %7, %3
%15 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %9 ]
ret i32 %15
}
int scan_columns(char *str) {
  int columns;
  columns = 1;
  while (str[columns - 1] != '\0') {
    if (str[columns - 1] == '\n')
      return (columns);
    columns++;
  }
  return (columns);
}


x86 assembly (clang, -O0):
<scan_columns>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movl   $0x1,-0x14(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     115c <scan_columns+0x5c>
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0xa,%eax
jne    114e <scan_columns+0x4e>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1162 <scan_columns+0x62>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    110f <scan_columns+0xf>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scan_columns>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
movzbl (%rdi,%rax,1),%ecx
test   %cl,%cl
je     1123 <scan_columns+0x23>
cmp    $0xa,%cl
je     1123 <scan_columns+0x23>
add    $0x1,%rax
jmp    1110 <scan_columns+0x10>
add    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @scan_columns(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 1, i32* %4
br label %5
5: ; preds = %25, %1
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = sub nsw i32 %7, 1
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, i8* %6, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %28
14: ; preds = %5
%15 = load i8*, i8** %3
%16 = load i32, i32* %4
%17 = sub nsw i32 %16, 1
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %15, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 10
br i1 %22, label %23, label %25
23: ; preds = %14
%24 = load i32, i32* %4
store i32 %24, i32* %2
br label %30
25: ; preds = %14
%26 = load i32, i32* %4
%27 = add nsw i32 %26, 1
store i32 %27, i32* %4
br label %5
28: ; preds = %5
%29 = load i32, i32* %4
store i32 %29, i32* %2
br label %30
30: ; preds = %28, %23
%31 = load i32, i32* %2
ret i32 %31
}

LLVM IR (-O2):
define i32 @scan_columns(i8* nocapture %0) {
br label %2
2: ; preds = %7, %1
%3 = phi i64 [ %8, %7 ], [ 1, %1 ]
%4 = add nsw i64 %3, -1
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
switch i8 %6, label %7 [
i8 0, label %9
i8 10, label %9
]
7: ; preds = %2
%8 = add nuw i64 %3, 1
br label %2
9: ; preds = %2, %2
%10 = trunc i64 %3 to i32
ret i32 %10
}
/* Variables and functions */
int isPrime(int);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main(int argc, char *argv[]) {
  int num;
  printf("Enter a number:");
  scanf("%d", &num);
  printf("isPrime:?:%d\n", isPrime(num));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    0xebc(%rip),%rdi
lea    -0x14(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x14(%rbp),%edi
call   1040 <isPrime@plt>
mov    %eax,%esi
lea    0xea5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
lea    0xeca(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1040 <isPrime@plt>
lea    0xeb3(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"Enter a number:\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [14 x i8] c"isPrime:?:%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%7 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %5)
%8 = load i32, i32* %5
%9 = call i32 @isPrime(i32 %8)
%10 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [16 x i8] c"Enter a number:\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [14 x i8] c"isPrime:?:%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %3)
%7 = load i32, i32* %3
%8 = call i32 @isPrime(i32 %7)
%9 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([14 x i8], [14 x i8]* @.str.2, i64 0, i64 0), i32 %8)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ scanf(char *, int *);
int lire_entier() {
  int n;
  printf("Entrez  un  entier:");
  scanf("%d", &n);
  return n;
}


x86 assembly (clang, -O0):
<lire_entier>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
lea    0xed9(%rip),%rdi
lea    -0x4(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lire_entier>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
lea    0xee0(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Entrez un entier:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @lire_entier() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
ret i32 %4
}

LLVM IR (-O2):
@.str = [20 x i8] c"Entrez un entier:\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @lire_entier() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
ret i32 %5
}
/* Variables and functions */
int strcmp(char const *, char const *);
int rbtree_strcmp(const void *p1, const void *p2) {
  return strcmp((const char *)p1, (const char *)p2);
}


x86 assembly (clang, -O0):
<rbtree_strcmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rbtree_strcmp>:
jmp    1030 <strcmp@plt>

LLVM IR (-O0):
define i32 @rbtree_strcmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @rbtree_strcmp(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
ret i32 %3
}
void althrd_thread_detach(void) {}


x86 assembly (clang, -O0):
<althrd_thread_detach>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<althrd_thread_detach>:
ret

LLVM IR (-O0):
define void @althrd_thread_detach() {
ret void
}

LLVM IR (-O2):
define void @althrd_thread_detach() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cocktail_sort(int *, int);
int /*<<< orphan*/ print_array(int *, int);
int /*<<< orphan*/ random_array(int *, int);
int main(void) {
  int a[20];
  random_array(a, 20);
  print_array(a, 20);
  cocktail_sort(a, 20);
  print_array(a, 20);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x60,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x60(%rbp),%rdi
mov    $0x14,%esi
call   1050 <random_array@plt>
lea    -0x60(%rbp),%rdi
mov    $0x14,%esi
call   1030 <print_array@plt>
lea    -0x60(%rbp),%rdi
mov    $0x14,%esi
call   1040 <cocktail_sort@plt>
lea    -0x60(%rbp),%rdi
mov    $0x14,%esi
call   1030 <print_array@plt>
xor    %eax,%eax
add    $0x60,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x50,%rsp
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x14,%esi
call   1050 <random_array@plt>
mov    %rbx,%rdi
mov    $0x14,%esi
call   1030 <print_array@plt>
mov    %rbx,%rdi
mov    $0x14,%esi
call   1040 <cocktail_sort@plt>
mov    %rbx,%rdi
mov    $0x14,%esi
call   1030 <print_array@plt>
xor    %eax,%eax
add    $0x50,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca [20 x i32]
store i32 0, i32* %1
%3 = getelementptr inbounds [20 x i32], [20 x i32]* %2, i64 0, i64 0
%4 = call i32 @random_array(i32* %3, i32 20)
%5 = getelementptr inbounds [20 x i32], [20 x i32]* %2, i64 0, i64 0
%6 = call i32 @print_array(i32* %5, i32 20)
%7 = getelementptr inbounds [20 x i32], [20 x i32]* %2, i64 0, i64 0
%8 = call i32 @cocktail_sort(i32* %7, i32 20)
%9 = getelementptr inbounds [20 x i32], [20 x i32]* %2, i64 0, i64 0
%10 = call i32 @print_array(i32* %9, i32 20)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = alloca [20 x i32]
%2 = bitcast [20 x i32]* %1 to i8*
%3 = getelementptr inbounds [20 x i32], [20 x i32]* %1, i64 0, i64 0
%4 = call i32 @random_array(i32* %3, i32 20)
%5 = call i32 @print_array(i32* %3, i32 20)
%6 = call i32 @cocktail_sort(i32* %3, i32 20)
%7 = call i32 @print_array(i32* %3, i32 20)
ret i32 0
}
void intr_enable(void) { __asm__ volatile("sti"); }


x86 assembly (clang, -O0):
<intr_enable>:
push   %rbp
mov    %rsp,%rbp
sti
pop    %rbp
ret

x86 assembly (clang, -O2):
<intr_enable>:
sti
ret

LLVM IR (-O0):
define void @intr_enable() {
ret void
}

LLVM IR (-O2):
define void @intr_enable() {
tail call void asm sideeffect "sti", "~{dirflag},~{fpsr},~{flags}"()
ret void
}