xunge/DecIR huggingface dataset:
/* Variables and functions */
int strlen(char *);
void reduce(char *dir) {
  int i = strlen(dir);
  while (i > 0 && dir[i] != '/')
    --i;
  dir[i] = '\0';
}


x86 assembly (clang, -O0):
<reduce>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0xc(%rbp)
mov    %al,-0xd(%rbp)
jle    114c <reduce+0x3c>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x2f,%eax
setne  %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    115c <reduce+0x4c>
jmp    116a <reduce+0x5a>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    1128 <reduce+0x18>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reduce>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
test   %eax,%eax
jle    1134 <reduce+0x24>
nopl   (%rax)
mov    %eax,%ecx
cmpb   $0x2f,(%rbx,%rcx,1)
je     1134 <reduce+0x24>
lea    -0x1(%rax),%ecx
cmp    $0x1,%eax
mov    %ecx,%eax
jg     1120 <reduce+0x10>
xor    %eax,%eax
cltq
movb   $0x0,(%rbx,%rax,1)
pop    %rbx
ret

LLVM IR (-O0):
define void @reduce(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
br label %6
6: ; preds = %19, %1
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %17
9: ; preds = %6
%10 = load i8*, i8** %2
%11 = load i32, i32* %3
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %10, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp ne i32 %15, 47
br label %17
17: ; preds = %9, %6
%18 = phi i1 [ false, %6 ], [ %16, %9 ]
br i1 %18, label %19, label %22
19: ; preds = %17
%20 = load i32, i32* %3
%21 = add nsw i32 %20, -1
store i32 %21, i32* %3
br label %6
22: ; preds = %17
%23 = load i8*, i8** %2
%24 = load i32, i32* %3
%25 = sext i32 %24 to i64
%26 = getelementptr inbounds i8, i8* %23, i64 %25
store i8 0, i8* %26
ret void
}

LLVM IR (-O2):
define void @reduce(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %13
4: ; preds = %1, %10
%5 = phi i32 [ %11, %10 ], [ %2, %1 ]
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 47
br i1 %9, label %13, label %10
10: ; preds = %4
%11 = add nsw i32 %5, -1
%12 = icmp sgt i32 %5, 1
br i1 %12, label %4, label %13
13: ; preds = %4, %10, %1
%14 = phi i32 [ %2, %1 ], [ 0, %10 ], [ %5, %4 ]
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds i8, i8* %0, i64 %15
store i8 0, i8* %16
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fputc(int /*<<< orphan*/, int /*<<< orphan*/ *);
void dumpzeros(FILE *out, unsigned char *zeros, int zcnt) {
  while (--zcnt >= 0)
    fputc(*zeros++, out);
}


x86 assembly (clang, -O0):
<dumpzeros>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x14(%rbp)
cmp    $0x0,%eax
jl     1155 <dumpzeros+0x45>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movzbl (%rax),%edi
mov    -0x8(%rbp),%rsi
call   1030 <fputc@plt>
jmp    1123 <dumpzeros+0x13>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dumpzeros>:
push   %rbp
push   %r14
push   %rbx
test   %edx,%edx
jle    1147 <dumpzeros+0x37>
mov    %edx,%ebp
mov    %rsi,%rbx
mov    %rdi,%r14
add    $0x1,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rbx),%edi
add    $0x1,%rbx
mov    %r14,%rsi
call   1030 <fputc@plt>
add    $0xffffffff,%ebp
cmp    $0x1,%ebp
ja     1130 <dumpzeros+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @dumpzeros(i32* %0, i8* %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i8*
%6 = alloca i32
store i32* %0, i32** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
br label %7
7: ; preds = %11, %3
%8 = load i32, i32* %6
%9 = add nsw i32 %8, -1
store i32 %9, i32* %6
%10 = icmp sge i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %5
%14 = load i8, i8* %12
%15 = zext i8 %14 to i32
%16 = load i32*, i32** %4
%17 = call i32 @fputc(i32 %15, i32* %16)
br label %7
18: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @dumpzeros(i32* nocapture %0, i8* nocapture %1, i32 %2) {
%4 = icmp sgt i32 %2, 0
br i1 %4, label %5, label %14
5: ; preds = %3, %5
%6 = phi i32 [ %8, %5 ], [ %2, %3 ]
%7 = phi i8* [ %9, %5 ], [ %1, %3 ]
%8 = add nsw i32 %6, -1
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = load i8, i8* %7
%11 = zext i8 %10 to i32
%12 = tail call i32 @fputc(i32 %11, i32* %0)
%13 = icmp ugt i32 %6, 1
br i1 %13, label %5, label %14
14: ; preds = %5, %3
ret void
}
/* Variables and functions */
int tuner_ctrl_deselect(void *);
signed int bbm_com_i2c_deinit(void *handle) {
  signed int res;
  res = tuner_ctrl_deselect(handle);
  return res;
}


x86 assembly (clang, -O0):
<bbm_com_i2c_deinit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <tuner_ctrl_deselect@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bbm_com_i2c_deinit>:
jmp    1030 <tuner_ctrl_deselect@plt>

LLVM IR (-O0):
define i32 @bbm_com_i2c_deinit(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @tuner_ctrl_deselect(i8* %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @bbm_com_i2c_deinit(i8* %0) {
%2 = tail call i32 @tuner_ctrl_deselect(i8* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ brc(int, char);
int /*<<< orphan*/ extra_padding(int);
void cuu(int pn) {
  brc(pn, 'A');
  extra_padding(2);
}


x86 assembly (clang, -O0):
<cuu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x41,%esi
call   1040 <brc@plt>
mov    $0x2,%edi
call   1030 <extra_padding@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cuu>:
push   %rax
mov    $0x41,%esi
call   1040 <brc@plt>
mov    $0x2,%edi
pop    %rax
jmp    1030 <extra_padding@plt>

LLVM IR (-O0):
define void @cuu(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @brc(i32 %3, i8 signext 65)
%5 = call i32 @extra_padding(i32 2)
ret void
}

LLVM IR (-O2):
define void @cuu(i32 %0) {
%2 = tail call i32 @brc(i32 %0, i8 signext 65)
%3 = tail call i32 @extra_padding(i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, double);
int main() {
  int numberOfCandies = 10;
  int totalAmount = 25;
  double price = (double)25 / 10;
  printf("Price of a candy: %f\n", price);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xa,-0x8(%rbp)
movl   $0x19,-0xc(%rbp)
movsd  0xecb(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
lea    0xec2(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef0(%rip),%rdi
movsd  0xee0(%rip),%xmm0
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [22 x i8] c"Price of a candy: %f\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca double
store i32 0, i32* %1
store i32 10, i32* %2
store i32 25, i32* %3
store double 2.500000e+00, double* %4
%5 = load double, double* %4
%6 = call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), double %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [22 x i8] c"Price of a candy: %f\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), double 2.500000e+00)
ret i32 0
}
/* Variables and functions */
int kwait();
int sys_wait(void) { return kwait(); }


x86 assembly (clang, -O0):
<sys_wait>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <kwait@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_wait>:
xor    %eax,%eax
jmp    1030 <kwait@plt>

LLVM IR (-O0):
define i32 @sys_wait() {
%1 = call i32 (...) @kwait()
ret i32 %1
}

LLVM IR (-O2):
define i32 @sys_wait() {
%1 = tail call i32 (...) @kwait()
ret i32 %1
}
/* Type definitions */
typedef int time_t;
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, int /*<<< orphan*/ *);
time_t milliseconds(void) {
  struct timeval tv;
  gettimeofday(&tv, NULL);
  return ((tv.tv_sec % 86400) * 1000 + tv.tv_usec / 1000);
}


x86 assembly (clang, -O0):
<milliseconds>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <gettimeofday@plt>
mov    -0x8(%rbp),%eax
mov    $0x15180,%ecx
cltd
idiv   %ecx
imul   $0x3e8,%edx,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<milliseconds>:
push   %rax
mov    %rsp,%rdi
xor    %esi,%esi
call   1030 <gettimeofday@plt>
movslq (%rsp),%rax
imul   $0xffffffffc22e4507,%rax,%rcx
shr    $0x20,%rcx
add    %eax,%ecx
mov    %ecx,%edx
shr    $0x1f,%edx
sar    $0x10,%ecx
add    %edx,%ecx
imul   $0x15180,%ecx,%ecx
sub    %ecx,%eax
imul   $0x3e8,%eax,%ecx
movslq 0x4(%rsp),%rax
imul   $0x10624dd3,%rax,%rax
mov    %rax,%rdx
shr    $0x3f,%rdx
sar    $0x26,%rax
add    %edx,%eax
add    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define i32 @milliseconds() {
%1 = alloca %struct.timeval
%2 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%3 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 0
%4 = load i32, i32* %3
%5 = srem i32 %4, 86400
%6 = mul nsw i32 %5, 1000
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i32 0, i32 1
%8 = load i32, i32* %7
%9 = sdiv i32 %8, 1000
%10 = add nsw i32 %6, %9
ret i32 %10
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define i32 @milliseconds() {
%1 = alloca %struct.timeval
%2 = bitcast %struct.timeval* %1 to i8*
%3 = call i32 @gettimeofday(%struct.timeval* %1, i32* null)
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 0
%5 = load i32, i32* %4
%6 = srem i32 %5, 86400
%7 = mul nsw i32 %6, 1000
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %1, i64 0, i32 1
%9 = load i32, i32* %8
%10 = sdiv i32 %9, 1000
%11 = add nsw i32 %7, %10
ret i32 %11
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
uint32_t micros(void) { return 0; }


x86 assembly (clang, -O0):
<micros>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<micros>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @micros() {
ret i32 0
}

LLVM IR (-O2):
define i32 @micros() {
ret i32 0
}
int d_unregister(char *ip_y_puerto, char *ip_y_puerto_a_eliminar) { return 0; }


x86 assembly (clang, -O0):
<d_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d_unregister>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @d_unregister(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @d_unregister(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
int add(int a, int b, int c, int d, int e, int f, int g, int h, int i, int j,
        int k, int l, int m) {
  return a + b + c + d + e + f + g + h + i + j + k + l + m;
}


x86 assembly (clang, -O0):
<add>:
push   %rbp
mov    %rsp,%rbp
mov    0x40(%rbp),%eax
mov    0x38(%rbp),%eax
mov    0x30(%rbp),%eax
mov    0x28(%rbp),%eax
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
add    -0x18(%rbp),%eax
add    0x10(%rbp),%eax
add    0x18(%rbp),%eax
add    0x20(%rbp),%eax
add    0x28(%rbp),%eax
add    0x30(%rbp),%eax
add    0x38(%rbp),%eax
add    0x40(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add>:
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
add    %ecx,%eax
add    %r8d,%eax
add    %r9d,%eax
add    0x8(%rsp),%eax
add    0x10(%rsp),%eax
add    0x18(%rsp),%eax
add    0x20(%rsp),%eax
add    0x28(%rsp),%eax
add    0x30(%rsp),%eax
add    0x38(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @add(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12) {
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
%17 = alloca i32
%18 = alloca i32
%19 = alloca i32
%20 = alloca i32
%21 = alloca i32
%22 = alloca i32
%23 = alloca i32
%24 = alloca i32
%25 = alloca i32
%26 = alloca i32
store i32 %0, i32* %14
store i32 %1, i32* %15
store i32 %2, i32* %16
store i32 %3, i32* %17
store i32 %4, i32* %18
store i32 %5, i32* %19
store i32 %6, i32* %20
store i32 %7, i32* %21
store i32 %8, i32* %22
store i32 %9, i32* %23
store i32 %10, i32* %24
store i32 %11, i32* %25
store i32 %12, i32* %26
%27 = load i32, i32* %14
%28 = load i32, i32* %15
%29 = add nsw i32 %27, %28
%30 = load i32, i32* %16
%31 = add nsw i32 %29, %30
%32 = load i32, i32* %17
%33 = add nsw i32 %31, %32
%34 = load i32, i32* %18
%35 = add nsw i32 %33, %34
%36 = load i32, i32* %19
%37 = add nsw i32 %35, %36
%38 = load i32, i32* %20
%39 = add nsw i32 %37, %38
%40 = load i32, i32* %21
%41 = add nsw i32 %39, %40
%42 = load i32, i32* %22
%43 = add nsw i32 %41, %42
%44 = load i32, i32* %23
%45 = add nsw i32 %43, %44
%46 = load i32, i32* %24
%47 = add nsw i32 %45, %46
%48 = load i32, i32* %25
%49 = add nsw i32 %47, %48
%50 = load i32, i32* %26
%51 = add nsw i32 %49, %50
ret i32 %51
}

LLVM IR (-O2):
define i32 @add(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12) {
%14 = add nsw i32 %1, %0
%15 = add nsw i32 %14, %2
%16 = add nsw i32 %15, %3
%17 = add nsw i32 %16, %4
%18 = add nsw i32 %17, %5
%19 = add nsw i32 %18, %6
%20 = add nsw i32 %19, %7
%21 = add nsw i32 %20, %8
%22 = add nsw i32 %21, %9
%23 = add nsw i32 %22, %10
%24 = add nsw i32 %23, %11
%25 = add nsw i32 %24, %12
ret i32 %25
}
unsigned uDivTest9(unsigned X, unsigned Y) {
  return (X / ((unsigned)2)) / ((unsigned)4);
}


x86 assembly (clang, -O0):
<uDivTest9>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
shr    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uDivTest9>:
mov    %edi,%eax
shr    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @uDivTest9(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = udiv i32 %5, 2
%7 = udiv i32 %6, 4
ret i32 %7
}

LLVM IR (-O2):
define i32 @uDivTest9(i32 %0, i32 %1) {
%3 = lshr i32 %0, 3
ret i32 %3
}
unsigned long strnhash(const char *str, int length) {
  unsigned char *c = (unsigned char *)str;
  unsigned long hash = 0;
  int n = 0;
  while (n < length && *c != '\0') {
    hash = (hash * 0xF4243) ^ (unsigned char)(*c++);
    n++;
  }
  return hash;
}


x86 assembly (clang, -O0):
<strnhash>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
mov    -0x24(%rbp),%ecx
xor    %eax,%eax
cmp    -0xc(%rbp),%ecx
mov    %al,-0x25(%rbp)
jge    1143 <strnhash+0x43>
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x25(%rbp)
mov    -0x25(%rbp),%al
test   $0x1,%al
jne    1153 <strnhash+0x53>
jmp    1182 <strnhash+0x82>
imul   $0xf4243,-0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
movzbl (%rcx),%ecx
xor    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1122 <strnhash+0x22>
mov    -0x20(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strnhash>:
test   %esi,%esi
jle    112c <strnhash+0x2c>
mov    %esi,%ecx
xor    %edx,%edx
xor    %eax,%eax
nopw   0x0(%rax,%rax,1)
movzbl (%rdi,%rdx,1),%esi
test   %rsi,%rsi
je     112b <strnhash+0x2b>
imul   $0xf4243,%rax,%rax
xor    %rsi,%rax
add    $0x1,%rdx
cmp    %edx,%ecx
jne    1110 <strnhash+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @strnhash(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%8 = load i8*, i8** %3
store i8* %8, i8** %5
store i64 0, i64* %6
store i32 0, i32* %7
br label %9
9: ; preds = %20, %2
%10 = load i32, i32* %7
%11 = load i32, i32* %4
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %18
13: ; preds = %9
%14 = load i8*, i8** %5
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = icmp ne i32 %16, 0
br label %18
18: ; preds = %13, %9
%19 = phi i1 [ false, %9 ], [ %17, %13 ]
br i1 %19, label %20, label %30
20: ; preds = %18
%21 = load i64, i64* %6
%22 = mul i64 %21, 1000003
%23 = load i8*, i8** %5
%24 = getelementptr inbounds i8, i8* %23, i32 1
store i8* %24, i8** %5
%25 = load i8, i8* %23
%26 = zext i8 %25 to i64
%27 = xor i64 %22, %26
store i64 %27, i64* %6
%28 = load i32, i32* %7
%29 = add nsw i32 %28, 1
store i32 %29, i32* %7
br label %9
30: ; preds = %18
%31 = load i64, i64* %6
ret i64 %31
}

LLVM IR (-O2):
define i64 @strnhash(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %17
4: ; preds = %2, %10
%5 = phi i32 [ %15, %10 ], [ 0, %2 ]
%6 = phi i64 [ %14, %10 ], [ 0, %2 ]
%7 = phi i8* [ %12, %10 ], [ %0, %2 ]
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 0
br i1 %9, label %17, label %10
10: ; preds = %4
%11 = mul i64 %6, 1000003
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = zext i8 %8 to i64
%14 = xor i64 %11, %13
%15 = add nuw nsw i32 %5, 1
%16 = icmp eq i32 %15, %1
br i1 %16, label %17, label %4
17: ; preds = %4, %10, %2
%18 = phi i64 [ 0, %2 ], [ %14, %10 ], [ %6, %4 ]
ret i64 %18
}
/* Variables and functions */
int /*<<< orphan*/ alloca(int);
int /*<<< orphan*/ foo(int /*<<< orphan*/);
main() {
  char *a;
  foo(alloca(10000));
  foo(alloca(100000));
  foo(alloca((int)&main));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x2710,%edi
call   1030 <alloca@plt>
mov    %eax,%edi
call   1040 <foo@plt>
mov    $0x186a0,%edi
call   1030 <alloca@plt>
mov    %eax,%edi
call   1040 <foo@plt>
mov    0x2e97(%rip),%rax
mov    %eax,%edi
call   1030 <alloca@plt>
mov    %eax,%edi
call   1040 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2710,%edi
call   1030 <alloca@plt>
mov    %eax,%edi
call   1040 <foo@plt>
mov    $0x186a0,%edi
call   1030 <alloca@plt>
mov    %eax,%edi
call   1040 <foo@plt>
mov    0x2e9f(%rip),%edi
call   1030 <alloca@plt>
mov    %eax,%edi
call   1040 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i8*
%2 = call i32 @alloca(i32 10000)
%3 = call i32 @foo(i32 %2)
%4 = call i32 @alloca(i32 100000)
%5 = call i32 @foo(i32 %4)
%6 = call i32 @alloca(i32 ptrtoint (i32 ()* @main to i32))
%7 = call i32 @foo(i32 %6)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @alloca(i32 10000)
%2 = tail call i32 @foo(i32 %1)
%3 = tail call i32 @alloca(i32 100000)
%4 = tail call i32 @foo(i32 %3)
%5 = tail call i32 @alloca(i32 ptrtoint (i32 ()* @main to i32))
%6 = tail call i32 @foo(i32 %5)
ret i32 0
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x;
  int y;
  int z;
  x = __VERIFIER_nondet_int();
  y = __VERIFIER_nondet_int();
  z = __VERIFIER_nondet_int();
  while (x > y && x > z) {
    y = y + 1;
    z = z + 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%ecx
xor    %eax,%eax
cmp    -0xc(%rbp),%ecx
mov    %al,-0x11(%rbp)
jle    115a <main+0x4a>
mov    -0x8(%rbp),%eax
cmp    -0x10(%rbp),%eax
setg   %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
test   $0x1,%al
jne    116a <main+0x5a>
jmp    1181 <main+0x71>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    113d <main+0x2d>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
%5 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %5, i32* %2
%6 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %6, i32* %3
%7 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %7, i32* %4
br label %8
8: ; preds = %18, %0
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = icmp sgt i32 %9, %10
br i1 %11, label %12, label %16
12: ; preds = %8
%13 = load i32, i32* %2
%14 = load i32, i32* %4
%15 = icmp sgt i32 %13, %14
br label %16
16: ; preds = %12, %8
%17 = phi i1 [ false, %8 ], [ %15, %12 ]
br i1 %17, label %18, label %23
18: ; preds = %16
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
%21 = load i32, i32* %4
%22 = add nsw i32 %21, 1
store i32 %22, i32* %4
br label %8
23: ; preds = %16
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
%2 = tail call i32 (...) @__VERIFIER_nondet_int()
%3 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_error();
void __VERIFIER_assert(int expression) {
  if (!expression) {
  ERROR:
    __VERIFIER_error();
  };
  return;
}


x86 assembly (clang, -O0):
<__VERIFIER_assert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    1131 <__VERIFIER_assert+0x21>
jmp    112a <__VERIFIER_assert+0x1a>
mov    $0x0,%al
call   1030 <__VERIFIER_error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__VERIFIER_assert>:
test   %edi,%edi
je     1115 <__VERIFIER_assert+0x5>
ret
xor    %eax,%eax
jmp    1030 <__VERIFIER_error@plt>

LLVM IR (-O0):
define void @__VERIFIER_assert(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %8, label %5
5: ; preds = %1
br label %6
6: ; preds = %5
%7 = call i32 (...) @__VERIFIER_error()
br label %8
8: ; preds = %6, %1
ret void
}

LLVM IR (-O2):
define void @__VERIFIER_assert(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 (...) @__VERIFIER_error()
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
scalar_t__ caps_can_ptrace();
int /*<<< orphan*/ fatal(char *);
int caps_init() {
  if (caps_can_ptrace())
    return 1;
  else {
    fatal("Insufficient permissions to use ptrace (CAP_SYS_PTRACE capability "
          "missing).");
    return 0;
  }
}


x86 assembly (clang, -O0):
<caps_init>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1040 <caps_can_ptrace@plt>
cmp    $0x0,%rax
je     1145 <caps_init+0x25>
movl   $0x1,-0x4(%rbp)
jmp    1158 <caps_init+0x38>
lea    0xeb4(%rip),%rdi
call   1030 <fatal@plt>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<caps_init>:
push   %rax
xor    %eax,%eax
call   1040 <caps_can_ptrace@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <caps_init+0x17>
pop    %rcx
ret
lea    0xec2(%rip),%rdi
call   1030 <fatal@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [76 x i8] c"Insufficient permissions to use ptrace (CAP_SYS_PTRACE capability missing).\00"
define i32 @caps_init() {
%1 = alloca i32
%2 = call i64 (...) @caps_can_ptrace()
%3 = icmp ne i64 %2, 0
br i1 %3, label %4, label %5
4: ; preds = %0
store i32 1, i32* %1
br label %7
5: ; preds = %0
%6 = call i32 @fatal(i8* getelementptr inbounds ([76 x i8], [76 x i8]* @.str, i64 0, i64 0))
store i32 0, i32* %1
br label %7
7: ; preds = %5, %4
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@.str = [76 x i8] c"Insufficient permissions to use ptrace (CAP_SYS_PTRACE capability missing).\00"
define i32 @caps_init() {
%1 = tail call i64 (...) @caps_can_ptrace()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @fatal(i8* getelementptr inbounds ([76 x i8], [76 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %0, %3
%6 = phi i32 [ 0, %3 ], [ 1, %0 ]
ret i32 %6
}
int test_imm_22int64_lowword_reg(long long val) {
  return ((val) & (0x22 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_22int64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x22,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_22int64_lowword_reg>:
test   $0x22,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_22int64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 34
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_22int64_lowword_reg(i64 %0) {
%2 = and i64 %0, 34
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int logmsg(char *, char *, int);
int eslib_logerror(char *name, char *msg) { return logmsg(name, msg, 2); }


x86 assembly (clang, -O0):
<eslib_logerror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x2,%edx
call   1030 <logmsg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eslib_logerror>:
mov    $0x2,%edx
jmp    1030 <logmsg@plt>

LLVM IR (-O0):
define i32 @eslib_logerror(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @logmsg(i8* %5, i8* %6, i32 2)
ret i32 %7
}

LLVM IR (-O2):
define i32 @eslib_logerror(i8* %0, i8* %1) {
%3 = tail call i32 @logmsg(i8* %0, i8* %1, i32 2)
ret i32 %3
}
/* Type definitions */
struct kernel_param {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ au_debug_off();
int /*<<< orphan*/ au_debug_on();
int kstrtoint(char const *, int /*<<< orphan*/, int *);
int param_atomic_t_set(const char *val, const struct kernel_param *kp) {
  int err, n;
  err = kstrtoint(val, 0, &n);
  if (!err) {
    if (n > 0)
      au_debug_on();
    else
      au_debug_off();
  }
  return err;
}


x86 assembly (clang, -O0):
<param_atomic_t_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
lea    -0x18(%rbp),%rdx
call   1030 <kstrtoint@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jne    117e <param_atomic_t_set+0x4e>
cmpl   $0x0,-0x18(%rbp)
jle    1172 <param_atomic_t_set+0x42>
mov    $0x0,%al
call   1040 <au_debug_on@plt>
jmp    1179 <param_atomic_t_set+0x49>
mov    $0x0,%al
call   1050 <au_debug_off@plt>
jmp    117e <param_atomic_t_set+0x4e>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<param_atomic_t_set>:
push   %rbx
sub    $0x10,%rsp
lea    0xc(%rsp),%rdx
xor    %esi,%esi
call   1030 <kstrtoint@plt>
mov    %eax,%ebx
test   %eax,%eax
jne    115e <param_atomic_t_set+0x2e>
cmpl   $0x0,0xc(%rsp)
jle    1157 <param_atomic_t_set+0x27>
xor    %eax,%eax
call   1040 <au_debug_on@plt>
jmp    115e <param_atomic_t_set+0x2e>
xor    %eax,%eax
call   1050 <au_debug_off@plt>
mov    %ebx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.kernel_param = type { i32 }
define i32 @param_atomic_t_set(i8* %0, %struct.kernel_param* %1) {
%3 = alloca i8*
%4 = alloca %struct.kernel_param*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store %struct.kernel_param* %1, %struct.kernel_param** %4
%7 = load i8*, i8** %3
%8 = call i32 @kstrtoint(i8* %7, i32 0, i32* %6)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp ne i32 %9, 0
br i1 %10, label %19, label %11
11: ; preds = %2
%12 = load i32, i32* %6
%13 = icmp sgt i32 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %11
%15 = call i32 (...) @au_debug_on()
br label %18
16: ; preds = %11
%17 = call i32 (...) @au_debug_off()
br label %18
18: ; preds = %16, %14
br label %19
19: ; preds = %18, %2
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
%struct.kernel_param = type { i32 }
define i32 @param_atomic_t_set(i8* %0, %struct.kernel_param* nocapture readnone %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @kstrtoint(i8* %0, i32 0, i32* %3)
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %14
7: ; preds = %2
%8 = load i32, i32* %3
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = call i32 (...) @au_debug_on()
br label %14
12: ; preds = %7
%13 = call i32 (...) @au_debug_off()
br label %14
14: ; preds = %10, %12, %2
ret i32 %5
}
/* Type definitions */
struct socket {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ user_data_available_cbk(struct socket *);
int /*<<< orphan*/ user_on_closure(struct socket *);
__attribute__((always_)) void user_on_socket_fatal(struct socket *sock) {
  user_data_available_cbk(sock);
  user_on_closure(sock);
}


x86 assembly (clang, -O0):
<user_on_socket_fatal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <user_data_available_cbk@plt>
mov    -0x8(%rbp),%rdi
call   1040 <user_on_closure@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<user_on_socket_fatal>:
push   %rbx
mov    %rdi,%rbx
call   1030 <user_data_available_cbk@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <user_on_closure@plt>

LLVM IR (-O0):
%struct.socket = type { i32 }
define void @user_on_socket_fatal(%struct.socket* %0) {
%2 = alloca %struct.socket*
store %struct.socket* %0, %struct.socket** %2
%3 = load %struct.socket*, %struct.socket** %2
%4 = call i32 @user_data_available_cbk(%struct.socket* %3)
%5 = load %struct.socket*, %struct.socket** %2
%6 = call i32 @user_on_closure(%struct.socket* %5)
ret void
}

LLVM IR (-O2):
%struct.socket = type { i32 }
define void @user_on_socket_fatal(%struct.socket* %0) {
%2 = tail call i32 @user_data_available_cbk(%struct.socket* %0)
%3 = tail call i32 @user_on_closure(%struct.socket* %0)
ret void
}
/* Variables and functions */
int atexit(void (*)());
int libc_atexit(void (*function)(void)) { return atexit(function); }


x86 assembly (clang, -O0):
<libc_atexit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1130 <atexit>
add    $0x10,%rsp
pop    %rbp
ret
nopl   0x0(%rax,%rax,1)

x86 assembly (clang, -O2):
<libc_atexit>:
jmp    1120 <atexit>
cs nopw 0x0(%rax,%rax,1)
nop

LLVM IR (-O0):
define i32 @libc_atexit(void ()* %0) {
%2 = alloca void ()*
store void ()* %0, void ()** %2
%3 = load void ()*, void ()** %2
%4 = bitcast void ()* %3 to void (...)*
%5 = call i32 @atexit(void (...)* %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @libc_atexit(void ()* %0) {
%2 = bitcast void ()* %0 to void (...)*
%3 = tail call i32 @atexit(void (...)* %2)
ret i32 %3
}
/* Type definitions */
typedef scalar_t__ const int64_t;

/* Variables and functions */
int64_t add64(const int64_t a, const int64_t b) { return a + b; }


x86 assembly (clang, -O0):
<add64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<add64>:
lea    (%rdi,%rsi,1),%rax
ret

LLVM IR (-O0):
define i64 @add64(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = add nsw i64 %5, %6
ret i64 %7
}

LLVM IR (-O2):
define i64 @add64(i64 %0, i64 %1) {
%3 = add nsw i64 %1, %0
ret i64 %3
}
char *d2e(string)
char *string;
{
  unsigned char x;
  for (x = 0; string[x] != 0; x++)
    if (string[x] == 'D')
      string[x] = 'E';
  return (string);
}


x86 assembly (clang, -O0):
<d2e>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movb   $0x0,-0x9(%rbp)
mov    -0x8(%rbp),%rax
movzbl -0x9(%rbp),%ecx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1154 <d2e+0x54>
mov    -0x8(%rbp),%rax
movzbl -0x9(%rbp),%ecx
movsbl (%rax,%rcx,1),%eax
cmp    $0x44,%eax
jne    1142 <d2e+0x42>
mov    -0x8(%rbp),%rax
movzbl -0x9(%rbp),%ecx
movb   $0x45,(%rax,%rcx,1)
jmp    1147 <d2e+0x47>
mov    -0x9(%rbp),%al
add    $0x1,%al
mov    %al,-0x9(%rbp)
jmp    110c <d2e+0xc>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<d2e>:
mov    %rdi,%rax
xor    %ecx,%ecx
jmp    1117 <d2e+0x17>
nopw   0x0(%rax,%rax,1)
movb   $0x45,(%rax,%rcx,1)
add    $0x1,%cl
movzbl %cl,%ecx
movzbl (%rax,%rcx,1),%edx
cmp    $0x44,%dl
je     1110 <d2e+0x10>
test   %dl,%dl
jne    1114 <d2e+0x14>
ret

LLVM IR (-O0):
define i8* @d2e(i8* %0) {
%2 = alloca i8*
%3 = alloca i8
store i8* %0, i8** %2
store i8 0, i8* %3
br label %4
4: ; preds = %26, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %3
%7 = zext i8 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %29
12: ; preds = %4
%13 = load i8*, i8** %2
%14 = load i8, i8* %3
%15 = zext i8 %14 to i64
%16 = getelementptr inbounds i8, i8* %13, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = icmp eq i32 %18, 68
br i1 %19, label %20, label %25
20: ; preds = %12
%21 = load i8*, i8** %2
%22 = load i8, i8* %3
%23 = zext i8 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
store i8 69, i8* %24
br label %25
25: ; preds = %20, %12
br label %26
26: ; preds = %25
%27 = load i8, i8* %3
%28 = add i8 %27, 1
store i8 %28, i8* %3
br label %4
29: ; preds = %4
%30 = load i8*, i8** %2
ret i8* %30
}

LLVM IR (-O2):
define i8* @d2e(i8* returned %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8 [ 0, %1 ], [ %9, %8 ]
%4 = zext i8 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
switch i8 %6, label %8 [
i8 0, label %10
i8 68, label %7
]
7: ; preds = %2
store i8 69, i8* %5
br label %8
8: ; preds = %2, %7
%9 = add i8 %3, 1
br label %2
10: ; preds = %2
ret i8* %0
}
/* Variables and functions */
int atoi(char *);
int /*<<< orphan*/ printf(char *, double);
double sin(int);
int main(int argc, char **argv) {
  int d = atoi(argv[1]);
  printf("%f\n", sin(d));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rdi
call   1050 <atoi@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
call   1040 <sin@plt>
lea    0xe9b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rdi
call   1050 <atoi@plt>
mov    %eax,%edi
call   1040 <sin@plt>
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%f\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i8**, i8*** %5
%8 = getelementptr inbounds i8*, i8** %7, i64 1
%9 = load i8*, i8** %8
%10 = call i32 @atoi(i8* %9)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = call double @sin(i32 %11)
%13 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%f\0A\00"
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @atoi(i8* %4)
%6 = tail call double @sin(i32 %5)
%7 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double %6)
ret i32 0
}
float fun_0(int i, float *a) { return a[0] + a[100] + a[1]; }


x86 assembly (clang, -O0):
<fun_0>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x10(%rbp),%rax
addss  0x190(%rax),%xmm0
mov    -0x10(%rbp),%rax
addss  0x4(%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_0>:
movss  (%rsi),%xmm0
addss  0x190(%rsi),%xmm0
addss  0x4(%rsi),%xmm0
ret

LLVM IR (-O0):
define float @fun_0(i32 %0, float* %1) {
%3 = alloca i32
%4 = alloca float*
store i32 %0, i32* %3
store float* %1, float** %4
%5 = load float*, float** %4
%6 = getelementptr inbounds float, float* %5, i64 0
%7 = load float, float* %6
%8 = load float*, float** %4
%9 = getelementptr inbounds float, float* %8, i64 100
%10 = load float, float* %9
%11 = fadd float %7, %10
%12 = load float*, float** %4
%13 = getelementptr inbounds float, float* %12, i64 1
%14 = load float, float* %13
%15 = fadd float %11, %14
ret float %15
}

LLVM IR (-O2):
define float @fun_0(i32 %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = getelementptr inbounds float, float* %1, i64 100
%5 = load float, float* %4
%6 = fadd float %3, %5
%7 = getelementptr inbounds float, float* %1, i64 1
%8 = load float, float* %7
%9 = fadd float %6, %8
ret float %9
}
/* Variables and functions */
int /*<<< orphan*/ Uart_Send(int /*<<< orphan*/);
void Uart_SendString(const char *str) {
  while (*str) {
    Uart_Send(*str++);
  }
  Uart_Send(0);
}


x86 assembly (clang, -O0):
<Uart_SendString>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1145 <Uart_SendString+0x35>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <Uart_Send@plt>
jmp    111c <Uart_SendString+0xc>
xor    %edi,%edi
call   1030 <Uart_Send@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Uart_SendString>:
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1133 <Uart_SendString+0x23>
mov    %rdi,%rbx
add    $0x1,%rbx
xchg   %ax,%ax
movsbl %al,%edi
call   1030 <Uart_Send@plt>
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1120 <Uart_SendString+0x10>
xor    %edi,%edi
pop    %rbx
jmp    1030 <Uart_Send@plt>

LLVM IR (-O0):
define void @Uart_SendString(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %7, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = icmp ne i8 %5, 0
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %2
%10 = load i8, i8* %8
%11 = sext i8 %10 to i32
%12 = call i32 @Uart_Send(i32 %11)
br label %3
13: ; preds = %3
%14 = call i32 @Uart_Send(i32 0)
ret void
}

LLVM IR (-O2):
define void @Uart_SendString(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %10, %4 ], [ %2, %1 ]
%6 = phi i8* [ %7, %4 ], [ %0, %1 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = sext i8 %5 to i32
%9 = tail call i32 @Uart_Send(i32 %8)
%10 = load i8, i8* %7
%11 = icmp eq i8 %10, 0
br i1 %11, label %12, label %4
12: ; preds = %4, %1
%13 = tail call i32 @Uart_Send(i32 0)
ret void
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int minor_code;
};
struct TYPE_4__ {
  TYPE_1__ xnoexpose;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xnoexpose_minor_code(void *_p, int _v) {
  ((XEvent *)_p)->xnoexpose.minor_code = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xnoexpose_minor_code>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xnoexpose_minor_code>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xnoexpose_minor_code(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xnoexpose_minor_code(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
int *int_to_ptr(int a) { return (int *)a; }


x86 assembly (clang, -O0):
<int_to_ptr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_to_ptr>:
movslq %edi,%rax
ret

LLVM IR (-O0):
define i32* @int_to_ptr(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = inttoptr i64 %4 to i32*
ret i32* %5
}

LLVM IR (-O2):
define i32* @int_to_ptr(i32 %0) {
%2 = sext i32 %0 to i64
%3 = inttoptr i64 %2 to i32*
ret i32* %3
}
long switch_prob(long x, long n) {
  long result = x;
  switch (n) {
  case 60:
  case 62:
    result = 8 * x;
    break;
  case 63:
    result = x >> 3;
    break;
  case 64:
    x = (x << 4 - x);
  case 65:
    x = x * x;
  default:
    result = x + 75;
    break;
  }
  return result;
}


x86 assembly (clang, -O0):
<switch_prob>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
add    $0xffffffffffffffc4,%rax
mov    %rax,-0x20(%rbp)
sub    $0x5,%rax
ja     1181 <switch_prob+0x81>
mov    -0x20(%rbp),%rax
lea    0xecb(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
mov    -0x8(%rbp),%rax
shl    $0x3,%rax
mov    %rax,-0x18(%rbp)
jmp    118d <switch_prob+0x8d>
mov    -0x8(%rbp),%rax
sar    $0x3,%rax
mov    %rax,-0x18(%rbp)
jmp    118d <switch_prob+0x8d>
mov    -0x8(%rbp),%rax
mov    $0x4,%ecx
sub    -0x8(%rbp),%rcx
shl    %cl,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
imul   -0x8(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x4b,%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<switch_prob>:
mov    %rdi,%rax
add    $0xffffffffffffffc4,%rsi
cmp    $0x5,%rsi
ja     1132 <switch_prob+0x32>
lea    0xeec(%rip),%rcx
movslq (%rcx,%rsi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
shl    $0x3,%rax
ret
sar    $0x3,%rax
ret
mov    $0x4,%cl
sub    %al,%cl
shl    %cl,%rax
imul   %rax,%rax
add    $0x4b,%rax
ret

LLVM IR (-O0):
define i64 @switch_prob(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%6 = load i64, i64* %3
store i64 %6, i64* %5
%7 = load i64, i64* %4
switch i64 %7, label %23 [
i64 60, label %8
i64 62, label %8
i64 63, label %11
i64 64, label %14
i64 65, label %19
]
8: ; preds = %2, %2
%9 = load i64, i64* %3
%10 = mul nsw i64 8, %9
store i64 %10, i64* %5
br label %26
11: ; preds = %2
%12 = load i64, i64* %3
%13 = ashr i64 %12, 3
store i64 %13, i64* %5
br label %26
14: ; preds = %2
%15 = load i64, i64* %3
%16 = load i64, i64* %3
%17 = sub nsw i64 4, %16
%18 = shl i64 %15, %17
store i64 %18, i64* %3
br label %19
19: ; preds = %2, %14
%20 = load i64, i64* %3
%21 = load i64, i64* %3
%22 = mul nsw i64 %20, %21
store i64 %22, i64* %3
br label %23
23: ; preds = %2, %19
%24 = load i64, i64* %3
%25 = add nsw i64 %24, 75
store i64 %25, i64* %5
br label %26
26: ; preds = %23, %11, %8
%27 = load i64, i64* %5
ret i64 %27
}

LLVM IR (-O2):
define i64 @switch_prob(i64 %0, i64 %1) {
switch i64 %1, label %13 [
i64 60, label %3
i64 62, label %3
i64 63, label %5
i64 64, label %7
i64 65, label %10
]
3: ; preds = %2, %2
%4 = shl nsw i64 %0, 3
br label %16
5: ; preds = %2
%6 = ashr i64 %0, 3
br label %16
7: ; preds = %2
%8 = sub nsw i64 4, %0
%9 = shl i64 %0, %8
br label %10
10: ; preds = %2, %7
%11 = phi i64 [ %0, %2 ], [ %9, %7 ]
%12 = mul nsw i64 %11, %11
br label %13
13: ; preds = %2, %10
%14 = phi i64 [ %0, %2 ], [ %12, %10 ]
%15 = add nsw i64 %14, 75
br label %16
16: ; preds = %13, %5, %3
%17 = phi i64 [ %15, %13 ], [ %6, %5 ], [ %4, %3 ]
ret i64 %17
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ usleep(int);
void g(void) {
  int i = 0;
  while (1) {
    ++i;
    printf("in g (%d)\n", i);
    if (i % 5 == 0) {
      printf("g: switching\n");
    }
    usleep(1000000);
  }
}


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xebe(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
mov    $0x5,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    116b <g+0x4b>
lea    0xea7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    $0xf4240,%edi
call   1040 <usleep@plt>
jmp    112f <g+0xf>

x86 assembly (clang, -O2):
<g>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    $0xffffffff,%r13d
mov    $0x1,%ebx
mov    $0xcccccccd,%r12d
lea    0xead(%rip),%r14
lea    0xeb1(%rip),%r15
jmp    1171 <g+0x41>
nopl   0x0(%rax)
mov    $0xf4240,%edi
call   1050 <usleep@plt>
add    $0xffffffff,%r13d
add    $0x1,%ebx
mov    %ebx,%eax
imul   %r12,%rax
shr    $0x22,%rax
lea    (%rax,%rax,4),%ebp
mov    %r14,%rdi
mov    %ebx,%esi
xor    %eax,%eax
call   1040 <printf@plt>
add    %r13d,%ebp
jne    1160 <g+0x30>
mov    %r15,%rdi
call   1030 <puts@plt>
jmp    1160 <g+0x30>

LLVM IR (-O0):
@.str = [11 x i8] c"in g (%d)\0A\00"
@.str.1 = [14 x i8] c"g: switching\0A\00"
define void @g() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %0, %12
%3 = load i32, i32* %1
%4 = add nsw i32 %3, 1
store i32 %4, i32* %1
%5 = load i32, i32* %1
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* %1
%8 = srem i32 %7, 5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str.1, i64 0, i64 0))
br label %12
12: ; preds = %10, %2
%13 = call i32 @usleep(i32 1000000)
br label %2
}

LLVM IR (-O2):
@.str = [11 x i8] c"in g (%d)\0A\00"
@str = [13 x i8] c"g: switching\00"
define void @g() {
br label %1
1: ; preds = %9, %0
%2 = phi i32 [ 0, %0 ], [ %3, %9 ]
%3 = add nuw nsw i32 %2, 1
%4 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3)
%5 = urem i32 %3, 5
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([13 x i8], [13 x i8]* @str, i64 0, i64 0))
br label %9
9: ; preds = %7, %1
%10 = tail call i32 @usleep(i32 1000000)
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ PositionStateHandle();
int /*<<< orphan*/ UAVObjRequestUpdate(int /*<<< orphan*/);
void PositionStateRequestUpdate() {
  UAVObjRequestUpdate(PositionStateHandle());
}


x86 assembly (clang, -O0):
<PositionStateRequestUpdate>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PositionStateHandle@plt>
mov    %eax,%edi
call   1040 <UAVObjRequestUpdate@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PositionStateRequestUpdate>:
push   %rax
xor    %eax,%eax
call   1030 <PositionStateHandle@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <UAVObjRequestUpdate@plt>

LLVM IR (-O0):
define void @PositionStateRequestUpdate() {
%1 = call i32 (...) @PositionStateHandle()
%2 = call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}

LLVM IR (-O2):
define void @PositionStateRequestUpdate() {
%1 = tail call i32 (...) @PositionStateHandle()
%2 = tail call i32 @UAVObjRequestUpdate(i32 %1)
ret void
}