shiftcode(w1, w2) int w1, w2;
{
  switch (w1 & 0x0F04) {
  case 0x200:
    fit(w2 >= -8 && w2 <= 8);
    break;
  case 0x300:
    fit(w2 >= -16 && w2 <= 16);
    break;
  case 0x304:
    fit(w2 >= -32 && w2 <= 32);
    break;
  }
  emit2(w1);
  emit2(w2);
}


x86 assembly (clang, -O0):
<shiftcode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
and    $0xf04,%eax
mov    %eax,-0x10(%rbp)
sub    $0x200,%eax
je     116f <shiftcode+0x4f>
jmp    1149 <shiftcode+0x29>
mov    -0x10(%rbp),%eax
sub    $0x300,%eax
je     119c <shiftcode+0x7c>
jmp    115c <shiftcode+0x3c>
mov    -0x10(%rbp),%eax
sub    $0x304,%eax
je     11c9 <shiftcode+0xa9>
jmp    11f1 <shiftcode+0xd1>
xor    %eax,%eax
cmpl   $0xfffffff8,-0xc(%rbp)
mov    %al,-0x11(%rbp)
jl     1188 <shiftcode+0x68>
cmpl   $0x8,-0xc(%rbp)
setle  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1040 <fit@plt>
jmp    11f1 <shiftcode+0xd1>
xor    %eax,%eax
cmpl   $0xfffffff0,-0xc(%rbp)
mov    %al,-0x12(%rbp)
jl     11b5 <shiftcode+0x95>
cmpl   $0x10,-0xc(%rbp)
setle  %al
mov    %al,-0x12(%rbp)
mov    -0x12(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1040 <fit@plt>
jmp    11f1 <shiftcode+0xd1>
xor    %eax,%eax
cmpl   $0xffffffe0,-0xc(%rbp)
mov    %al,-0x13(%rbp)
jl     11e2 <shiftcode+0xc2>
cmpl   $0x20,-0xc(%rbp)
setle  %al
mov    %al,-0x13(%rbp)
mov    -0x13(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
mov    $0x0,%al
call   1040 <fit@plt>
mov    -0x8(%rbp),%edi
mov    $0x0,%al
call   1030 <emit2@plt>
mov    -0xc(%rbp),%edi
mov    $0x0,%al
call   1030 <emit2@plt>
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shiftcode>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    %edi,%eax
and    $0xf04,%eax
cmp    $0x200,%eax
je     114f <shiftcode+0x2f>
cmp    $0x304,%eax
je     115b <shiftcode+0x3b>
cmp    $0x300,%eax
jne    1176 <shiftcode+0x56>
mov    $0x21,%eax
mov    $0x10,%ecx
jmp    1165 <shiftcode+0x45>
mov    $0x11,%eax
mov    $0x8,%ecx
jmp    1165 <shiftcode+0x45>
mov    $0x41,%eax
mov    $0x20,%ecx
add    %ebx,%ecx
xor    %edi,%edi
cmp    %eax,%ecx
setb   %dil
xor    %eax,%eax
call   1040 <fit@plt>
mov    %ebp,%edi
xor    %eax,%eax
call   1030 <emit2@plt>
mov    %ebx,%edi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <emit2@plt>

LLVM IR (-O0):
define i32 @shiftcode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = and i32 %6, 3844
switch i32 %7, label %38 [
i32 512, label %8
i32 768, label %18
i32 772, label %28
]
8: ; preds = %2
%9 = load i32, i32* %5
%10 = icmp sge i32 %9, -8
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %5
%13 = icmp sle i32 %12, 8
br label %14
14: ; preds = %11, %8
%15 = phi i1 [ false, %8 ], [ %13, %11 ]
%16 = zext i1 %15 to i32
%17 = call i32 (i32, ...) bitcast (i32 (...)* @fit to i32 (i32, ...)*)(i32 %16)
br label %38
18: ; preds = %2
%19 = load i32, i32* %5
%20 = icmp sge i32 %19, -16
br i1 %20, label %21, label %24
21: ; preds = %18
%22 = load i32, i32* %5
%23 = icmp sle i32 %22, 16
br label %24
24: ; preds = %21, %18
%25 = phi i1 [ false, %18 ], [ %23, %21 ]
%26 = zext i1 %25 to i32
%27 = call i32 (i32, ...) bitcast (i32 (...)* @fit to i32 (i32, ...)*)(i32 %26)
br label %38
28: ; preds = %2
%29 = load i32, i32* %5
%30 = icmp sge i32 %29, -32
br i1 %30, label %31, label %34
31: ; preds = %28
%32 = load i32, i32* %5
%33 = icmp sle i32 %32, 32
br label %34
34: ; preds = %31, %28
%35 = phi i1 [ false, %28 ], [ %33, %31 ]
%36 = zext i1 %35 to i32
%37 = call i32 (i32, ...) bitcast (i32 (...)* @fit to i32 (i32, ...)*)(i32 %36)
br label %38
38: ; preds = %2, %34, %24, %14
%39 = load i32, i32* %4
%40 = call i32 (i32, ...) bitcast (i32 (...)* @emit2 to i32 (i32, ...)*)(i32 %39)
%41 = load i32, i32* %5
%42 = call i32 (i32, ...) bitcast (i32 (...)* @emit2 to i32 (i32, ...)*)(i32 %41)
%43 = load i32, i32* %3
ret i32 %43
}

LLVM IR (-O2):
define i32 @shiftcode(i32 %0, i32 %1) {
%3 = and i32 %0, 3844
switch i32 %3, label %13 [
i32 512, label %6
i32 768, label %4
i32 772, label %5
]
4: ; preds = %2
br label %6
5: ; preds = %2
br label %6
6: ; preds = %2, %4, %5
%7 = phi i32 [ 32, %5 ], [ 16, %4 ], [ 8, %2 ]
%8 = phi i32 [ 65, %5 ], [ 33, %4 ], [ 17, %2 ]
%9 = add i32 %7, %1
%10 = icmp ult i32 %9, %8
%11 = zext i1 %10 to i32
%12 = tail call i32 (i32, ...) bitcast (i32 (...)* @fit to i32 (i32, ...)*)(i32 %11)
br label %13
13: ; preds = %6, %2
%14 = tail call i32 (i32, ...) bitcast (i32 (...)* @emit2 to i32 (i32, ...)*)(i32 %0)
%15 = tail call i32 (i32, ...) bitcast (i32 (...)* @emit2 to i32 (i32, ...)*)(i32 %1)
ret i32 undef
}