xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ write_break();
int /*<<< orphan*/ write_line(char *);
int /*<<< orphan*/ write_nl();
void html_itemize(void) {
  write_break();
  write_line("<UL>");
  write_nl();
}


x86 assembly (clang, -O0):
<html_itemize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <write_break@plt>
lea    0xebe(%rip),%rdi
call   1050 <write_line@plt>
mov    $0x0,%al
call   1030 <write_nl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<html_itemize>:
push   %rax
xor    %eax,%eax
call   1040 <write_break@plt>
lea    0xec1(%rip),%rdi
call   1050 <write_line@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <write_nl@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"<UL>\00"
define void @html_itemize() {
%1 = call i32 (...) @write_break()
%2 = call i32 @write_line(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = call i32 (...) @write_nl()
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"<UL>\00"
define void @html_itemize() {
%1 = tail call i32 (...) @write_break()
%2 = tail call i32 @write_line(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (...) @write_nl()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ native_irq_disable();
__attribute__((always_)) void raw_local_irq_disable(void) {
  native_irq_disable();
}


x86 assembly (clang, -O0):
<raw_local_irq_disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <native_irq_disable@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<raw_local_irq_disable>:
xor    %eax,%eax
jmp    1030 <native_irq_disable@plt>

LLVM IR (-O0):
define void @raw_local_irq_disable() {
%1 = call i32 (...) @native_irq_disable()
ret void
}

LLVM IR (-O2):
define void @raw_local_irq_disable() {
%1 = tail call i32 (...) @native_irq_disable()
ret void
}
int md4_self_test(int verbose) { return (0); }


x86 assembly (clang, -O0):
<md4_self_test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<md4_self_test>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @md4_self_test(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @md4_self_test(i32 %0) {
ret i32 0
}
void Lock() {}


x86 assembly (clang, -O0):
<Lock>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Lock>:
ret

LLVM IR (-O0):
define void @Lock() {
ret void
}

LLVM IR (-O2):
define void @Lock() {
ret void
}
/* Variables and functions */
char *bar_str(char);
int /*<<< orphan*/ printf(char *, char *, char, char *, char, char, char);
void print_progr_bs(char perc, char *bps, char eta_s, char eta_m, char eta_h) {
  printf("\r %s %3d%% @ %s/s ETA %02d:%02d:%02d   ", bar_str(perc), perc, bps,
         eta_h, eta_m, eta_s);
  return;
}


x86 assembly (clang, -O0):
<print_progr_bs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %r8b,%al
mov    %dil,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %dl,-0x11(%rbp)
mov    %cl,-0x12(%rbp)
mov    %al,-0x13(%rbp)
movsbl -0x1(%rbp),%edi
call   1040 <bar_str@plt>
mov    %rax,%rsi
mov    -0x1(%rbp),%dl
mov    -0x10(%rbp),%rcx
mov    -0x13(%rbp),%r8b
mov    -0x12(%rbp),%al
lea    0xea3(%rip),%rdi
movsbl %dl,%edx
movsbl %r8b,%r8d
movsbl %al,%r9d
movsbl -0x11(%rbp),%eax
mov    %eax,(%rsp)
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_progr_bs>:
push   %rbp
push   %r15
push   %r14
push   %r12
push   %rbx
sub    $0x10,%rsp
mov    %r8d,%r14d
mov    %ecx,%r15d
mov    %edx,%ebx
mov    %rsi,%r12
mov    %edi,%ebp
call   1040 <bar_str@plt>
mov    %ebx,(%rsp)
lea    0xeb8(%rip),%rdi
mov    %rax,%rsi
mov    %ebp,%edx
mov    %r12,%rcx
mov    %r14d,%r8d
mov    %r15d,%r9d
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [40 x i8] c"\0D %s %3d%% @ %s/s ETA %02d:%02d:%02d \00"
define void @print_progr_bs(i8 signext %0, i8* %1, i8 signext %2, i8 signext %3, i8 signext %4) {
%6 = alloca i8
%7 = alloca i8*
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8 %0, i8* %6
store i8* %1, i8** %7
store i8 %2, i8* %8
store i8 %3, i8* %9
store i8 %4, i8* %10
%11 = load i8, i8* %6
%12 = call i8* @bar_str(i8 signext %11)
%13 = load i8, i8* %6
%14 = load i8*, i8** %7
%15 = load i8, i8* %10
%16 = load i8, i8* %9
%17 = load i8, i8* %8
%18 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %12, i8 signext %13, i8* %14, i8 signext %15, i8 signext %16, i8 signext %17)
ret void
}

LLVM IR (-O2):
@.str = [40 x i8] c"\0D %s %3d%% @ %s/s ETA %02d:%02d:%02d \00"
define void @print_progr_bs(i8 signext %0, i8* %1, i8 signext %2, i8 signext %3, i8 signext %4) {
%6 = tail call i8* @bar_str(i8 signext %0)
%7 = tail call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0), i8* %6, i8 signext %0, i8* %1, i8 signext %4, i8 signext %3, i8 signext %2)
ret void
}
__attribute__((always_)) int pci_iov_init(struct pci_dev *dev) { return -19; }


x86 assembly (clang, -O0):
<pci_iov_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffed,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_iov_init>:
mov    $0xffffffed,%eax
ret

LLVM IR (-O0):
%struct.pci_dev = type opaque
define i32 @pci_iov_init(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
store %struct.pci_dev* %0, %struct.pci_dev** %2
ret i32 -19
}

LLVM IR (-O2):
%struct.pci_dev = type opaque
define i32 @pci_iov_init(%struct.pci_dev* nocapture readnone %0) {
ret i32 -19
}
const char *sni_type_name(unsigned code) {
  switch (code) {
  default:
    return "SNI_UNKNOWN_TYPE";
    break;
  case 0:
    return "SNI_HOSTNAME";
    break;
  }
}


x86 assembly (clang, -O0):
<sni_type_name>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
test   %eax,%eax
je     1127 <sni_type_name+0x27>
jmp    1117 <sni_type_name+0x17>
lea    0xee2(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    1132 <sni_type_name+0x32>
lea    0xee3(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sni_type_name>:
test   %edi,%edi
lea    0xf08(%rip),%rcx
lea    0xef0(%rip),%rax
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [17 x i8] c"SNI_UNKNOWN_TYPE\00"
@.str.1 = [13 x i8] c"SNI_HOSTNAME\00"
define i8* @sni_type_name(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %5 [
i32 0, label %6
]
5: ; preds = %1
store i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i8** %2
br label %7
6: ; preds = %1
store i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i8** %2
br label %7
7: ; preds = %6, %5
%8 = load i8*, i8** %2
ret i8* %8
}

LLVM IR (-O2):
@.str = [17 x i8] c"SNI_UNKNOWN_TYPE\00"
@.str.1 = [13 x i8] c"SNI_HOSTNAME\00"
define i8* @sni_type_name(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0), i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0)
ret i8* %3
}
float h1(float x) { return x * (x < 0.f ? 1.f : -1.f); }


x86 assembly (clang, -O0):
<h1>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm1
movss  0xee5(%rip),%xmm4
movss  0xee1(%rip),%xmm3
xorps  %xmm2,%xmm2
cmpltss %xmm2,%xmm1
movaps %xmm1,%xmm2
andps  %xmm4,%xmm2
andnps %xmm3,%xmm1
orps   %xmm2,%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<h1>:
movaps 0xef9(%rip),%xmm1
xorps  %xmm0,%xmm1
xorps  %xmm2,%xmm2
movaps %xmm0,%xmm3
cmpltss %xmm2,%xmm3
andps  %xmm3,%xmm0
andnps %xmm1,%xmm3
orps   %xmm3,%xmm0
ret

LLVM IR (-O0):
define float @h1(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fcmp olt float %4, 0.000000e+00
%6 = zext i1 %5 to i64
%7 = select i1 %5, float 1.000000e+00, float -1.000000e+00
%8 = fmul float %3, %7
ret float %8
}

LLVM IR (-O2):
define float @h1(float %0) {
%2 = fcmp olt float %0, 0.000000e+00
%3 = fneg float %0
%4 = select i1 %2, float %0, float %3
ret float %4
}
/* Variables and functions */
int PrintError(char *, char *);
int PrintUserError(char *buffer) {
  return PrintError(buffer, "Incorrect command");
}


x86 assembly (clang, -O0):
<PrintUserError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <PrintError@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PrintUserError>:
lea    0xee9(%rip),%rsi
jmp    1030 <PrintError@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"Incorrect command\00"
define i32 @PrintUserError(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @PrintError(i8* %3, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 %4
}

LLVM IR (-O2):
@.str = [18 x i8] c"Incorrect command\00"
define i32 @PrintUserError(i8* %0) {
%2 = tail call i32 @PrintError(i8* %0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ f(float *, int);
void g(float *d, int c) { f(d, c); }


x86 assembly (clang, -O0):
<g>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g>:
jmp    1030 <f@plt>

LLVM IR (-O0):
define void @g(float* %0, i32 %1) {
%3 = alloca float*
%4 = alloca i32
store float* %0, float** %3
store i32 %1, i32* %4
%5 = load float*, float** %3
%6 = load i32, i32* %4
%7 = call i32 @f(float* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @g(float* %0, i32 %1) {
%3 = tail call i32 @f(float* %0, i32 %1)
ret void
}
int test_imm_80uint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0x80 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_80uint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0x80,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_80uint64_highword_mem>:
testb  $0x80,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_80uint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 128
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_80uint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 549755813888
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
float lowpass(float past, float input, float dt, float k) {
  float tk = dt / (dt + k);
  return past + tk * (input - past);
}


x86 assembly (clang, -O0):
<lowpass>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  %xmm3,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
addss  -0x10(%rbp),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x14(%rbp),%xmm0
movss  -0x8(%rbp),%xmm2
subss  -0x4(%rbp),%xmm2
mulss  %xmm2,%xmm0
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<lowpass>:
addss  %xmm2,%xmm3
divss  %xmm3,%xmm2
subss  %xmm0,%xmm1
mulss  %xmm2,%xmm1
addss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @lowpass(float %0, float %1, float %2, float %3) {
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
%9 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%10 = load float, float* %7
%11 = load float, float* %7
%12 = load float, float* %8
%13 = fadd float %11, %12
%14 = fdiv float %10, %13
store float %14, float* %9
%15 = load float, float* %5
%16 = load float, float* %9
%17 = load float, float* %6
%18 = load float, float* %5
%19 = fsub float %17, %18
%20 = call float @llvm.fmuladd.f32(float %16, float %19, float %15)
ret float %20
}

LLVM IR (-O2):
define float @lowpass(float %0, float %1, float %2, float %3) {
%5 = fadd float %2, %3
%6 = fdiv float %2, %5
%7 = fsub float %1, %0
%8 = tail call float @llvm.fmuladd.f32(float %6, float %7, float %0)
ret float %8
}
__attribute__((always_)) void pci_scan_msi_device(struct pci_dev *dev) {}


x86 assembly (clang, -O0):
<pci_scan_msi_device>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_scan_msi_device>:
ret

LLVM IR (-O0):
%struct.pci_dev = type opaque
define void @pci_scan_msi_device(%struct.pci_dev* %0) {
%2 = alloca %struct.pci_dev*
store %struct.pci_dev* %0, %struct.pci_dev** %2
ret void
}

LLVM IR (-O2):
%struct.pci_dev = type opaque
define void @pci_scan_msi_device(%struct.pci_dev* nocapture %0) {
ret void
}
void init(void) {
  (*(volatile unsigned long *)(0xE0028000 + 0x18)) |= ((1 << 16) | (1 << 17));
  (*(volatile unsigned long *)(0xE0028000 + 0x08)) &= ~((1 << 1) | (1 << 2));
  (*(volatile unsigned long *)(0xE0028000 + 0x14)) |= (1 << 16) | (1 << 17);
}


x86 assembly (clang, -O0):
<init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xe0028018,%eax
mov    (%rax),%rcx
or     $0x30000,%rcx
mov    $0xe0028018,%eax
mov    %rcx,(%rax)
mov    $0xe0028008,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffff9,%rcx
mov    $0xe0028008,%eax
mov    %rcx,(%rax)
mov    $0xe0028014,%eax
mov    (%rax),%rcx
or     $0x30000,%rcx
mov    $0xe0028014,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<init>:
mov    $0xe0028008,%eax
orq    $0x30000,0x10(%rax)
andq   $0xfffffffffffffff9,(%rax)
orq    $0x30000,0xc(%rax)
ret

LLVM IR (-O0):
define void @init() {
%1 = load volatile i64, i64* inttoptr (i64 3758260248 to i64*)
%2 = or i64 %1, 196608
store volatile i64 %2, i64* inttoptr (i64 3758260248 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 3758260232 to i64*)
%4 = and i64 %3, -7
store volatile i64 %4, i64* inttoptr (i64 3758260232 to i64*)
%5 = load volatile i64, i64* inttoptr (i64 3758260244 to i64*)
%6 = or i64 %5, 196608
store volatile i64 %6, i64* inttoptr (i64 3758260244 to i64*)
ret void
}

LLVM IR (-O2):
define void @init() {
%1 = load volatile i64, i64* inttoptr (i64 3758260248 to i64*)
%2 = or i64 %1, 196608
store volatile i64 %2, i64* inttoptr (i64 3758260248 to i64*)
%3 = load volatile i64, i64* inttoptr (i64 3758260232 to i64*)
%4 = and i64 %3, -7
store volatile i64 %4, i64* inttoptr (i64 3758260232 to i64*)
%5 = load volatile i64, i64* inttoptr (i64 3758260244 to i64*)
%6 = or i64 %5, 196608
store volatile i64 %6, i64* inttoptr (i64 3758260244 to i64*)
ret void
}
void wrterr(s) char *s;
{
  write(2, s, length(s));
  write(2, "\n", 1);
}


x86 assembly (clang, -O0):
<wrterr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1030 <length@plt>
mov    -0x10(%rbp),%rsi
mov    %eax,%edx
mov    $0x2,%edi
mov    $0x0,%al
call   1040 <write@plt>
mov    $0x2,%edi
lea    0xea3(%rip),%rsi
mov    $0x1,%edx
mov    $0x0,%al
call   1040 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrterr>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <length@plt>
mov    $0x2,%edi
mov    %rbx,%rsi
mov    %eax,%edx
xor    %eax,%eax
call   1040 <write@plt>
lea    0xebd(%rip),%rsi
mov    $0x2,%edi
mov    $0x1,%edx
xor    %eax,%eax
pop    %rbx
jmp    1040 <write@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @wrterr(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) bitcast (i32 (...)* @length to i32 (i8*, ...)*)(i8* %4)
%6 = call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 2, i8* %3, i32 %5)
%7 = call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"\0A\00"
define void @wrterr(i8* %0) {
%2 = tail call i32 (i8*, ...) bitcast (i32 (...)* @length to i32 (i8*, ...)*)(i8* %0)
%3 = tail call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 2, i8* %0, i32 %2)
%4 = tail call i32 (i32, i8*, i32, ...) bitcast (i32 (...)* @write to i32 (i32, i8*, i32, ...)*)(i32 2, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i32 1)
ret void
}
/* Variables and functions */
void matrix_init_user(void) {}


x86 assembly (clang, -O0):
<matrix_init_user>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<matrix_init_user>:
ret

LLVM IR (-O0):
define void @matrix_init_user() {
ret void
}

LLVM IR (-O2):
define void @matrix_init_user() {
ret void
}
int dehex_nibble(int n) {
  int x;
  x = n - 0x30;
  if (x > 9)
    x -= 0x07;
  if (x > 15)
    x -= 0x20;
  return x;
}


x86 assembly (clang, -O0):
<dehex_nibble>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x9,-0x8(%rbp)
jle    1123 <dehex_nibble+0x23>
mov    -0x8(%rbp),%eax
sub    $0x7,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0xf,-0x8(%rbp)
jle    1136 <dehex_nibble+0x36>
mov    -0x8(%rbp),%eax
sub    $0x20,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dehex_nibble>:
lea    -0x30(%rdi),%eax
lea    -0x37(%rdi),%ecx
cmp    $0x3a,%edi
cmovl  %eax,%ecx
lea    -0x20(%rcx),%eax
cmp    $0x10,%ecx
cmovl  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @dehex_nibble(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 48
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 9
br i1 %7, label %8, label %11
8: ; preds = %1
%9 = load i32, i32* %3
%10 = sub nsw i32 %9, 7
store i32 %10, i32* %3
br label %11
11: ; preds = %8, %1
%12 = load i32, i32* %3
%13 = icmp sgt i32 %12, 15
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 32
store i32 %16, i32* %3
br label %17
17: ; preds = %14, %11
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @dehex_nibble(i32 %0) {
%2 = icmp sgt i32 %0, 57
%3 = select i1 %2, i32 -55, i32 -48
%4 = add nsw i32 %3, %0
%5 = icmp sgt i32 %4, 15
%6 = add nsw i32 %4, -32
%7 = select i1 %5, i32 %6, i32 %4
ret i32 %7
}
/* Type definitions */
struct sift_keypoints {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ fprintf_pairs(char *, struct sift_keypoints const *,
                                 struct sift_keypoints const *);
void print_pairs(const struct sift_keypoints *k1,
                 const struct sift_keypoints *k2) {
  fprintf_pairs("/dev/stdout", k1, k2);
}


x86 assembly (clang, -O0):
<print_pairs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xed1(%rip),%rdi
call   1030 <fprintf_pairs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_pairs>:
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0xee3(%rip),%rdi
jmp    1030 <fprintf_pairs@plt>

LLVM IR (-O0):
%struct.sift_keypoints = type { i32 }
@.str = [12 x i8] c"/dev/stdout\00"
define void @print_pairs(%struct.sift_keypoints* %0, %struct.sift_keypoints* %1) {
%3 = alloca %struct.sift_keypoints*
%4 = alloca %struct.sift_keypoints*
store %struct.sift_keypoints* %0, %struct.sift_keypoints** %3
store %struct.sift_keypoints* %1, %struct.sift_keypoints** %4
%5 = load %struct.sift_keypoints*, %struct.sift_keypoints** %3
%6 = load %struct.sift_keypoints*, %struct.sift_keypoints** %4
%7 = call i32 @fprintf_pairs(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), %struct.sift_keypoints* %5, %struct.sift_keypoints* %6)
ret void
}

LLVM IR (-O2):
%struct.sift_keypoints = type { i32 }
@.str = [12 x i8] c"/dev/stdout\00"
define void @print_pairs(%struct.sift_keypoints* %0, %struct.sift_keypoints* %1) {
%3 = tail call i32 @fprintf_pairs(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), %struct.sift_keypoints* %0, %struct.sift_keypoints* %1)
ret void
}
double ml_sub(double n1, double n2) { return n1 - n2; }


x86 assembly (clang, -O0):
<ml_sub>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<ml_sub>:
subsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @ml_sub(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @ml_sub(double %0, double %1) {
%3 = fsub double %0, %1
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ clear_io_bit(int, int);
void TOSH_MAKE_FLASH_IN_INPUT() { clear_io_bit(0x36, 6); }


x86 assembly (clang, -O0):
<TOSH_MAKE_FLASH_IN_INPUT>:
push   %rbp
mov    %rsp,%rbp
mov    $0x36,%edi
mov    $0x6,%esi
call   1030 <clear_io_bit@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<TOSH_MAKE_FLASH_IN_INPUT>:
mov    $0x36,%edi
mov    $0x6,%esi
jmp    1030 <clear_io_bit@plt>

LLVM IR (-O0):
define void @TOSH_MAKE_FLASH_IN_INPUT() {
%1 = call i32 @clear_io_bit(i32 54, i32 6)
ret void
}

LLVM IR (-O2):
define void @TOSH_MAKE_FLASH_IN_INPUT() {
%1 = tail call i32 @clear_io_bit(i32 54, i32 6)
ret void
}
int test_imm_46int64_highword_reg(long long val) {
  return ((val >> 32) & (0x46 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_46int64_highword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x20,%rdx
and    $0x46,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_46int64_highword_reg>:
movabs $0x4600000000,%rax
test   %rax,%rdi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_46int64_highword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 32
%5 = and i64 %4, 70
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_46int64_highword_reg(i64 %0) {
%2 = and i64 %0, 300647710720
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
char *malloc(size_t);
size_t strlen(char *);
int /*<<< orphan*/ strncpy(char *, char *, size_t);
char *getInfo() {
  char *name;
  size_t size;
  size = strlen("Grid (C) 2004 Panayotis Katsaloulis http://www.panayotis.com "
                "under GNU GPL");
  name = malloc(size + 1);
  strncpy(name,
          ("Grid (C) 2004 Panayotis Katsaloulis http://www.panayotis.com under "
           "GNU GPL"),
          size + 1);
  return name;
}


x86 assembly (clang, -O0):
<getInfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
add    $0x1,%rdx
lea    0xe94(%rip),%rsi
call   1030 <strncpy@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getInfo>:
push   %rbx
mov    $0x4b,%edi
call   1040 <malloc@plt>
mov    %rax,%rbx
lea    0xecb(%rip),%rsi
mov    $0x4b,%edx
mov    %rax,%rdi
call   1030 <strncpy@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [75 x i8] c"Grid (C) 2004 Panayotis Katsaloulis http://www.panayotis.com under GNU GPL\00"
define i8* @getInfo() {
%1 = alloca i8*
%2 = alloca i64
%3 = call i64 @strlen(i8* getelementptr inbounds ([75 x i8], [75 x i8]* @.str, i64 0, i64 0))
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = add i64 %4, 1
%6 = call i8* @malloc(i64 %5)
store i8* %6, i8** %1
%7 = load i8*, i8** %1
%8 = load i64, i64* %2
%9 = add i64 %8, 1
%10 = call i32 @strncpy(i8* %7, i8* getelementptr inbounds ([75 x i8], [75 x i8]* @.str, i64 0, i64 0), i64 %9)
%11 = load i8*, i8** %1
ret i8* %11
}

LLVM IR (-O2):
@.str = [75 x i8] c"Grid (C) 2004 Panayotis Katsaloulis http://www.panayotis.com under GNU GPL\00"
define i8* @getInfo() {
%1 = tail call dereferenceable_or_null(75) i8* @malloc(i64 75)
%2 = tail call i32 @strncpy(i8* %1, i8* getelementptr inbounds ([75 x i8], [75 x i8]* @.str, i64 0, i64 0), i64 75)
ret i8* %1
}
void get_ddr_info(struct device *dev) {}


x86 assembly (clang, -O0):
<get_ddr_info>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_ddr_info>:
ret

LLVM IR (-O0):
%struct.device = type opaque
define void @get_ddr_info(%struct.device* %0) {
%2 = alloca %struct.device*
store %struct.device* %0, %struct.device** %2
ret void
}

LLVM IR (-O2):
%struct.device = type opaque
define void @get_ddr_info(%struct.device* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void say_hello_thread_routine_cleanup(void *argument) {
  int index = *((int *)argument);
  printf("say_hello_thread_routine_cleanup: Cleanup (index=%d)\n", index);
}


x86 assembly (clang, -O0):
<say_hello_thread_routine_cleanup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<say_hello_thread_routine_cleanup>:
mov    (%rdi),%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [54 x i8] c"say_hello_thread_routine_cleanup: Cleanup (index=%d)\0A\00"
define void @say_hello_thread_routine_cleanup(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
%6 = load i32, i32* %5
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = call i32 @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0), i32 %7)
ret void
}

LLVM IR (-O2):
@.str = [54 x i8] c"say_hello_thread_routine_cleanup: Cleanup (index=%d)\0A\00"
define void @say_hello_thread_routine_cleanup(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
%4 = tail call i32 @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}
/* Type definitions */
struct cpufreq_affected_cpus {
  int dummy;
};

/* Variables and functions */
struct cpufreq_affected_cpus *sysfs_get_cpu_list(unsigned int, char *);
struct cpufreq_affected_cpus *cpufreq_get_related_cpus(unsigned int cpu) {
  return sysfs_get_cpu_list(cpu, "related_cpus");
}


x86 assembly (clang, -O0):
<cpufreq_get_related_cpus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    0xedb(%rip),%rsi
call   1030 <sysfs_get_cpu_list@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_get_related_cpus>:
lea    0xee9(%rip),%rsi
jmp    1030 <sysfs_get_cpu_list@plt>

LLVM IR (-O0):
%struct.cpufreq_affected_cpus = type { i32 }
@.str = [13 x i8] c"related_cpus\00"
define %struct.cpufreq_affected_cpus* @cpufreq_get_related_cpus(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call %struct.cpufreq_affected_cpus* @sysfs_get_cpu_list(i32 %3, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret %struct.cpufreq_affected_cpus* %4
}

LLVM IR (-O2):
%struct.cpufreq_affected_cpus = type { i32 }
@.str = [13 x i8] c"related_cpus\00"
define %struct.cpufreq_affected_cpus* @cpufreq_get_related_cpus(i32 %0) {
%2 = tail call %struct.cpufreq_affected_cpus* @sysfs_get_cpu_list(i32 %0, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret %struct.cpufreq_affected_cpus* %2
}
/* Variables and functions */
int /*<<< orphan*/ sscanf(char *, char *, long long *);
long long AtoLL(char *cptr) {
  long long ll;
  sscanf(cptr, "%lld", &ll);
  return (ll);
}


x86 assembly (clang, -O0):
<AtoLL>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
lea    -0x10(%rbp),%rdx
call   1030 <sscanf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AtoLL>:
push   %rax
lea    0xee8(%rip),%rsi
mov    %rsp,%rdx
call   1030 <sscanf@plt>
mov    (%rsp),%rax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"%lld\00"
define i64 @AtoLL(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @sscanf(i8* %4, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64* %3)
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
@.str = [5 x i8] c"%lld\00"
define i64 @AtoLL(i8* nocapture %0) {
%2 = alloca i64
%3 = bitcast i64* %2 to i8*
%4 = call i32 @sscanf(i8* %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i64* %2)
%5 = load i64, i64* %2
ret i64 %5
}
/* Variables and functions */
void *malloc(size_t);
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
void *memdup(void **dst, const void *src, size_t len) {
  if ((*dst = malloc(len)) != NULL)
    memcpy(*dst, src, len);
  return *dst;
}


x86 assembly (clang, -O0):
<memdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <malloc@plt>
mov    -0x8(%rbp),%rcx
mov    %rax,(%rcx)
cmp    $0x0,%rax
je     1162 <memdup+0x42>
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <memcpy@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<memdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%rbx
mov    %rsi,%r15
mov    %rdi,%r14
mov    %rdx,%rdi
call   1040 <malloc@plt>
mov    %rax,(%r14)
test   %rax,%rax
je     1151 <memdup+0x31>
mov    %rax,%rdi
mov    %r15,%rsi
mov    %rbx,%rdx
call   1030 <memcpy@plt>
mov    (%r14),%rax
jmp    1153 <memdup+0x33>
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @memdup(i8** %0, i8* %1, i64 %2) {
%4 = alloca i8**
%5 = alloca i8*
%6 = alloca i64
store i8** %0, i8*** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i64, i64* %6
%8 = call i8* @malloc(i64 %7)
%9 = load i8**, i8*** %4
store i8* %8, i8** %9
%10 = icmp ne i8* %8, null
br i1 %10, label %11, label %17
11: ; preds = %3
%12 = load i8**, i8*** %4
%13 = load i8*, i8** %12
%14 = load i8*, i8** %5
%15 = load i64, i64* %6
%16 = call i32 @memcpy(i8* %13, i8* %14, i64 %15)
br label %17
17: ; preds = %11, %3
%18 = load i8**, i8*** %4
%19 = load i8*, i8** %18
ret i8* %19
}

LLVM IR (-O2):
define i8* @memdup(i8** nocapture %0, i8* %1, i64 %2) {
%4 = tail call i8* @malloc(i64 %2)
store i8* %4, i8** %0
%5 = icmp eq i8* %4, null
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = tail call i32 @memcpy(i8* %4, i8* %1, i64 %2)
%8 = load i8*, i8** %0
br label %9
9: ; preds = %6, %3
%10 = phi i8* [ %8, %6 ], [ null, %3 ]
ret i8* %10
}
char *strcpy(char *to, const char *from) {
  int d0, d1, d2;
  __asm__ __volatile__("1:\tlodsb\n\t"
                       "stosb\n\t"
                       "testb %%al,%%al\n\t"
                       "jne 1b"
                       : "=&S"(d0), "=&D"(d1), "=&a"(d2)
                       : "0"(from), "1"(to)
                       : "memory");
  return to;
}


x86 assembly (clang, -O0):
<strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%rdi
lods   %ds:(%rsi),%al
stos   %al,%es:(%rdi)
test   %al,%al
jne    1114 <strcpy+0x14>
mov    %esi,%ecx
mov    %ecx,-0x14(%rbp)
mov    %edi,%ecx
mov    %ecx,-0x18(%rbp)
mov    %eax,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcpy>:
mov    %rdi,%rcx
lods   %ds:(%rsi),%al
stos   %al,%es:(%rdi)
test   %al,%al
jne    1103 <strcpy+0x3>
mov    %rcx,%rax
ret

LLVM IR (-O0):
define i8* @strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%8 = load i8*, i8** %4
%9 = load i8*, i8** %3
%10 = call { i8*, i8*, i32 } asm sideeffect "1:\09lodsb\0A\09stosb\0A\09testb %al,%al\0A\09jne 1b", "=&{si},=&{di},=&{ax},0,1,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %8, i8* %9)
%11 = extractvalue { i8*, i8*, i32 } %10, 0
%12 = extractvalue { i8*, i8*, i32 } %10, 1
%13 = extractvalue { i8*, i8*, i32 } %10, 2
%14 = ptrtoint i8* %11 to i64
%15 = trunc i64 %14 to i32
store i32 %15, i32* %5
%16 = ptrtoint i8* %12 to i64
%17 = trunc i64 %16 to i32
store i32 %17, i32* %6
store i32 %13, i32* %7
%18 = load i8*, i8** %3
ret i8* %18
}

LLVM IR (-O2):
define i8* @strcpy(i8* returned %0, i8* %1) {
%3 = tail call { i8*, i8*, i32 } asm sideeffect "1:\09lodsb\0A\09stosb\0A\09testb %al,%al\0A\09jne 1b", "=&{si},=&{di},=&{ax},0,1,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %1, i8* %0)
ret i8* %0
}
/* Type definitions */
union i2c_smbus_data {
  int byte;
};
typedef int __s32;

/* Variables and functions */
scalar_t__ i2c_smbus_access(int, int, int /*<<< orphan*/, int,
                            union i2c_smbus_data *);
extern __s32 i2c_smbus_read_byte(int fd) {
  union i2c_smbus_data data;
  if (i2c_smbus_access(fd, 1, 0, 1, &data) <= 0) {
    return -1;
  } else {
    return 0x0FF & data.byte;
  }
}


x86 assembly (clang, -O0):
<i2c_smbus_read_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
mov    $0x1,%ecx
xor    %edx,%edx
lea    -0x10(%rbp),%r8
mov    %ecx,%esi
call   1030 <i2c_smbus_access@plt>
cmp    $0x0,%rax
jg     1146 <i2c_smbus_read_byte+0x36>
movl   $0xffffffff,-0x4(%rbp)
jmp    1151 <i2c_smbus_read_byte+0x41>
mov    -0x10(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<i2c_smbus_read_byte>:
push   %rax
mov    %rsp,%r8
mov    $0x1,%esi
xor    %edx,%edx
mov    $0x1,%ecx
call   1030 <i2c_smbus_access@plt>
test   %rax,%rax
movzbl (%rsp),%ecx
mov    $0xffffffff,%eax
cmovg  %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%union.i2c_smbus_data = type { i32 }
define i32 @i2c_smbus_read_byte(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca %union.i2c_smbus_data
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = call i64 @i2c_smbus_access(i32 %5, i32 1, i32 0, i32 1, %union.i2c_smbus_data* %4)
%7 = icmp sle i64 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 -1, i32* %2
br label %13
9: ; preds = %1
%10 = bitcast %union.i2c_smbus_data* %4 to i32*
%11 = load i32, i32* %10
%12 = and i32 255, %11
store i32 %12, i32* %2
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
%union.i2c_smbus_data = type { i32 }
define i32 @i2c_smbus_read_byte(i32 %0) {
%2 = alloca %union.i2c_smbus_data
%3 = bitcast %union.i2c_smbus_data* %2 to i8*
%4 = call i64 @i2c_smbus_access(i32 %0, i32 1, i32 0, i32 1, %union.i2c_smbus_data* %2)
%5 = icmp slt i64 %4, 1
%6 = getelementptr inbounds %union.i2c_smbus_data, %union.i2c_smbus_data* %2, i64 0, i32 0
%7 = load i32, i32* %6
%8 = and i32 %7, 255
%9 = select i1 %5, i32 -1, i32 %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ preload_seq(int);
void main(void) { preload_seq(175); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xaf,%edi
call   1030 <preload_seq@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0xaf,%edi
jmp    1030 <preload_seq@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 @preload_seq(i32 175)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @preload_seq(i32 175)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ flush_outbuf();
int bz2_fflush(void *stream) {
  flush_outbuf();
  return 0;
}


x86 assembly (clang, -O0):
<bz2_fflush>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <flush_outbuf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bz2_fflush>:
push   %rax
xor    %eax,%eax
call   1030 <flush_outbuf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @bz2_fflush(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (...) @flush_outbuf()
ret i32 0
}

LLVM IR (-O2):
define i32 @bz2_fflush(i8* nocapture readnone %0) {
%2 = tail call i32 (...) @flush_outbuf()
ret i32 0
}
int floatdecreasing(const void *a, const void *b) {
  float ta = *(float *)a;
  float tb = *(float *)b;
  return (tb > ta) - (tb < ta);
}


x86 assembly (clang, -O0):
<floatdecreasing>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
movss  %xmm0,-0x18(%rbp)
movss  -0x18(%rbp),%xmm0
ucomiss -0x14(%rbp),%xmm0
seta   %al
and    $0x1,%al
movzbl %al,%eax
movss  -0x18(%rbp),%xmm1
movss  -0x14(%rbp),%xmm0
ucomiss %xmm1,%xmm0
seta   %cl
and    $0x1,%cl
movzbl %cl,%ecx
sub    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<floatdecreasing>:
movss  (%rdi),%xmm0
movss  (%rsi),%xmm1
xor    %eax,%eax
ucomiss %xmm0,%xmm1
seta   %al
xor    %ecx,%ecx
ucomiss %xmm1,%xmm0
seta   %cl
sub    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @floatdecreasing(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca float
%6 = alloca float
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to float*
%9 = load float, float* %8
store float %9, float* %5
%10 = load i8*, i8** %4
%11 = bitcast i8* %10 to float*
%12 = load float, float* %11
store float %12, float* %6
%13 = load float, float* %6
%14 = load float, float* %5
%15 = fcmp ogt float %13, %14
%16 = zext i1 %15 to i32
%17 = load float, float* %6
%18 = load float, float* %5
%19 = fcmp olt float %17, %18
%20 = zext i1 %19 to i32
%21 = sub nsw i32 %16, %20
ret i32 %21
}

LLVM IR (-O2):
define i32 @floatdecreasing(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to float*
%4 = load float, float* %3
%5 = bitcast i8* %1 to float*
%6 = load float, float* %5
%7 = fcmp ogt float %6, %4
%8 = zext i1 %7 to i32
%9 = fcmp olt float %6, %4
%10 = sext i1 %9 to i32
%11 = add nsw i32 %10, %8
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ AsyncPowerManagerP__0__ResourceDefaultOwner__requested();
void ArbiterP__0__ResourceDefaultOwner__requested(void) {
  AsyncPowerManagerP__0__ResourceDefaultOwner__requested();
}


x86 assembly (clang, -O0):
<ArbiterP__0__ResourceDefaultOwner__requested>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <AsyncPowerManagerP__0__ResourceDefaultOwner__requested@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ArbiterP__0__ResourceDefaultOwner__requested>:
xor    %eax,%eax
jmp    1030 <AsyncPowerManagerP__0__ResourceDefaultOwner__requested@plt>

LLVM IR (-O0):
define void @ArbiterP__0__ResourceDefaultOwner__requested() {
%1 = call i32 (...) @AsyncPowerManagerP__0__ResourceDefaultOwner__requested()
ret void
}

LLVM IR (-O2):
define void @ArbiterP__0__ResourceDefaultOwner__requested() {
%1 = tail call i32 (...) @AsyncPowerManagerP__0__ResourceDefaultOwner__requested()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ ReadUint64Le(void const *, int /*<<< orphan*/ *);
int /*<<< orphan*/ memcpy(double *, int /*<<< orphan*/ *, int);
int32_t ReadDoubleLe(const void *in, double *value) {
  uint64_t u64;
  int32_t length = ReadUint64Le(in, &u64);
  memcpy(value, &u64, sizeof(*value));
  return length;
}


x86 assembly (clang, -O0):
<ReadDoubleLe>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x14(%rbp),%rsi
call   1040 <ReadUint64Le@plt>
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
lea    -0x14(%rbp),%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    -0x18(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ReadDoubleLe>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0xc(%rsp),%r14
mov    %r14,%rsi
call   1040 <ReadUint64Le@plt>
mov    %eax,%ebp
mov    %rbx,%rdi
mov    %r14,%rsi
mov    $0x8,%edx
call   1030 <memcpy@plt>
mov    %ebp,%eax
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @ReadDoubleLe(i8* %0, double* %1) {
%3 = alloca i8*
%4 = alloca double*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store double* %1, double** %4
%7 = load i8*, i8** %3
%8 = call i32 @ReadUint64Le(i8* %7, i32* %5)
store i32 %8, i32* %6
%9 = load double*, double** %4
%10 = call i32 @memcpy(double* %9, i32* %5, i32 8)
%11 = load i32, i32* %6
ret i32 %11
}

LLVM IR (-O2):
define i32 @ReadDoubleLe(i8* %0, double* %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = call i32 @ReadUint64Le(i8* %0, i32* %3)
%6 = call i32 @memcpy(double* %1, i32* %3, i32 8)
ret i32 %5
}
void c_beep() { ; }


x86 assembly (clang, -O0):
<c_beep>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<c_beep>:
ret

LLVM IR (-O0):
define void @c_beep() {
ret void
}

LLVM IR (-O2):
define void @c_beep() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ check_byte_array(unsigned char *, unsigned int,
                                    int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ get_subl_ops();
int /*<<< orphan*/ get_subl_ops_len();
int /*<<< orphan*/ output_subtract(unsigned char *, int, unsigned int *);
void test_output_subtract() {
  unsigned char buffer[128];
  unsigned int bytes_written = 0;
  output_subtract(buffer, 128, &bytes_written);
  check_byte_array(buffer, bytes_written, get_subl_ops(), get_subl_ops_len());
}


x86 assembly (clang, -O0):
<test_output_subtract>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa0,%rsp
movl   $0x0,-0x84(%rbp)
lea    -0x80(%rbp),%rdi
mov    $0x80,%esi
lea    -0x84(%rbp),%rdx
call   1030 <output_subtract@plt>
lea    -0x80(%rbp),%rax
mov    %rax,-0x98(%rbp)
mov    -0x84(%rbp),%eax
mov    %eax,-0x8c(%rbp)
mov    $0x0,%al
call   1060 <get_subl_ops@plt>
mov    %eax,-0x88(%rbp)
mov    $0x0,%al
call   1050 <get_subl_ops_len@plt>
mov    -0x98(%rbp),%rdi
mov    -0x8c(%rbp),%esi
mov    -0x88(%rbp),%edx
mov    %eax,%ecx
call   1040 <check_byte_array@plt>
add    $0xa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_output_subtract>:
push   %rbp
push   %r14
push   %rbx
sub    $0x90,%rsp
movl   $0x0,0xc(%rsp)
lea    0x10(%rsp),%r14
lea    0xc(%rsp),%rdx
mov    %r14,%rdi
mov    $0x80,%esi
call   1030 <output_subtract@plt>
mov    0xc(%rsp),%ebp
xor    %eax,%eax
call   1060 <get_subl_ops@plt>
mov    %eax,%ebx
xor    %eax,%eax
call   1050 <get_subl_ops_len@plt>
mov    %r14,%rdi
mov    %ebp,%esi
mov    %ebx,%edx
mov    %eax,%ecx
call   1040 <check_byte_array@plt>
add    $0x90,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define void @test_output_subtract() {
%1 = alloca [128 x i8]
%2 = alloca i32
store i32 0, i32* %2
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%4 = call i32 @output_subtract(i8* %3, i32 128, i32* %2)
%5 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%6 = load i32, i32* %2
%7 = call i32 (...) @get_subl_ops()
%8 = call i32 (...) @get_subl_ops_len()
%9 = call i32 @check_byte_array(i8* %5, i32 %6, i32 %7, i32 %8)
ret void
}

LLVM IR (-O2):
define void @test_output_subtract() {
%1 = alloca [128 x i8]
%2 = alloca i32
%3 = getelementptr inbounds [128 x i8], [128 x i8]* %1, i64 0, i64 0
%4 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%5 = call i32 @output_subtract(i8* %3, i32 128, i32* %2)
%6 = load i32, i32* %2
%7 = call i32 (...) @get_subl_ops()
%8 = call i32 (...) @get_subl_ops_len()
%9 = call i32 @check_byte_array(i8* %3, i32 %6, i32 %7, i32 %8)
ret void
}
/* Type definitions */
struct bstree_node {
  int dummy;
};

/* Variables and functions */
bool bstree_is_empty(struct bstree_node *tree) { return !tree; }


x86 assembly (clang, -O0):
<bstree_is_empty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bstree_is_empty>:
xor    %eax,%eax
test   %rdi,%rdi
sete   %al
ret

LLVM IR (-O0):
%struct.bstree_node = type { i32 }
define i32 @bstree_is_empty(%struct.bstree_node* %0) {
%2 = alloca %struct.bstree_node*
store %struct.bstree_node* %0, %struct.bstree_node** %2
%3 = load %struct.bstree_node*, %struct.bstree_node** %2
%4 = icmp ne %struct.bstree_node* %3, null
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
%struct.bstree_node = type { i32 }
define i32 @bstree_is_empty(%struct.bstree_node* readnone %0) {
%2 = icmp eq %struct.bstree_node* %0, null
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
scalar_t__ time(int /*<<< orphan*/ *);
unsigned int __generate_pseudo_random_canary_value() {
  time_t time1;
  return (unsigned int)time(&time1);
}


x86 assembly (clang, -O0):
<__generate_pseudo_random_canary_value>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1030 <time@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__generate_pseudo_random_canary_value>:
push   %rax
lea    0x4(%rsp),%rdi
call   1030 <time@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @__generate_pseudo_random_canary_value() {
%1 = alloca i32
%2 = call i64 @time(i32* %1)
%3 = trunc i64 %2 to i32
ret i32 %3
}

LLVM IR (-O2):
define i32 @__generate_pseudo_random_canary_value() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i64 @time(i32* %1)
%4 = trunc i64 %3 to i32
ret i32 %4
}
void sleep(unsigned long time) { int stime = time * 1000000; }


x86 assembly (clang, -O0):
<sleep>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
imul   $0xf4240,-0x8(%rbp),%rax
mov    %eax,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep>:
ret

LLVM IR (-O0):
define void @sleep(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = mul i64 %4, 1000000
%6 = trunc i64 %5 to i32
store i32 %6, i32* %3
ret void
}

LLVM IR (-O2):
define void @sleep(i64 %0) {
ret void
}
/* Variables and functions */
scalar_t__ count(int);
int test_negative() {
  return 0 == count(-1) && 0 == count(-10) && 0 == count(-100);
}


x86 assembly (clang, -O0):
<test_negative>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0xffffffff,%edi
call   1030 <count@plt>
mov    %rax,%rdx
xor    %eax,%eax
xor    %ecx,%ecx
cmp    %rdx,%rcx
mov    %al,-0x1(%rbp)
jne    116a <test_negative+0x5a>
mov    $0xfffffff6,%edi
call   1030 <count@plt>
mov    %rax,%rdx
xor    %eax,%eax
xor    %ecx,%ecx
cmp    %rdx,%rcx
mov    %al,-0x1(%rbp)
jne    116a <test_negative+0x5a>
mov    $0xffffff9c,%edi
call   1030 <count@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
sete   %al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_negative>:
push   %rbx
mov    $0xffffffff,%edi
call   1030 <count@plt>
xor    %ebx,%ebx
test   %rax,%rax
jne    1143 <test_negative+0x33>
mov    $0xfffffff6,%edi
call   1030 <count@plt>
test   %rax,%rax
jne    1143 <test_negative+0x33>
mov    $0xffffff9c,%edi
call   1030 <count@plt>
xor    %ebx,%ebx
test   %rax,%rax
sete   %bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @test_negative() {
%1 = call i64 @count(i32 -1)
%2 = icmp eq i64 0, %1
br i1 %2, label %3, label %9
3: ; preds = %0
%4 = call i64 @count(i32 -10)
%5 = icmp eq i64 0, %4
br i1 %5, label %6, label %9
6: ; preds = %3
%7 = call i64 @count(i32 -100)
%8 = icmp eq i64 0, %7
br label %9
9: ; preds = %6, %3, %0
%10 = phi i1 [ false, %3 ], [ false, %0 ], [ %8, %6 ]
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @test_negative() {
%1 = tail call i64 @count(i32 -1)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %10
3: ; preds = %0
%4 = tail call i64 @count(i32 -10)
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %3
%7 = tail call i64 @count(i32 -100)
%8 = icmp eq i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %6, %3, %0
%11 = phi i32 [ 0, %3 ], [ 0, %0 ], [ %9, %6 ]
ret i32 %11
}