xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage() {
  fprintf(stderr, "usage:\t"
                  "pingtun [-c|--client-only] [-s|--server <server_addr>] "
                  "<tun_addr> <tun_netmask>\n"
                  "\t-s|--server <address>\t"
                  "sets the adress of the ping tunnel\n"
                  "\t-c|--client-only\t"
                  "client mode only, don't listen to echo requests\n"
                  "\t-i|--id\t\t\t"
                  "icmp id, 2 bytes (number between 0 and 65535)\n");
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e98(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [269 x i8] c"usage:\09pingtun [-c|--client-only] [-s|--server <server_addr>] <tun_addr> <tun_netmask>\0A\09-s|--server <address>\09sets the adress of the ping tunnel\0A\09-c|--client-only\09client mode only, don't listen to echo requests\0A\09-i|--id\09\09\09icmp id, 2 bytes (number between 0 and 65535)\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([269 x i8], [269 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_FAILURE
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [269 x i8] c"usage:\09pingtun [-c|--client-only] [-s|--server <server_addr>] <tun_addr> <tun_netmask>\0A\09-s|--server <address>\09sets the adress of the ping tunnel\0A\09-c|--client-only\09client mode only, don't listen to echo requests\0A\09-i|--id\09\09\09icmp id, 2 bytes (number between 0 and 65535)\0A\00"
@EXIT_FAILURE = global i32 0
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([269 x i8], [269 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void rm(char param[]) {
  printf("rm command \n");
  printf("parameters = %s \n", param);
  return;
}


x86 assembly (clang, -O0):
<rm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rsi
lea    0xed8(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rm>:
push   %rbx
mov    %rdi,%rbx
lea    0xee7(%rip),%rdi
call   1030 <puts@plt>
lea    0xec9(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
pop    %rbx
jmp    1040 <printf@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"rm command \0A\00"
@.str.1 = [18 x i8] c"parameters = %s \0A\00"
define void @rm(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret void
}

LLVM IR (-O2):
@.str.1 = [18 x i8] c"parameters = %s \0A\00"
@str = [12 x i8] c"rm command \00"
define void @rm(i8* %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ stderr;
void Check(int condition, char *message) {
  if (!condition) {
    fprintf(stderr, "Condition failed: %s\n", message);
    exit(1);
  }
}


x86 assembly (clang, -O0):
<Check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    115c <Check+0x3c>
mov    0x2ea0(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rdx
lea    0xeb3(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Check>:
test   %edi,%edi
je     1125 <Check+0x5>
ret
push   %rax
mov    %rsi,%rdx
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xec7(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [22 x i8] c"Condition failed: %s\0A\00"
define void @Check(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %2
%8 = load i32, i32* @stderr
%9 = load i8*, i8** %4
%10 = call i32 @fprintf(i32 %8, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %9)
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %2
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [22 x i8] c"Condition failed: %s\0A\00"
define void @Check(i32 %0, i8* %1) {
%3 = icmp eq i32 %0, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = load i32, i32* @stderr
%6 = tail call i32 @fprintf(i32 %5, i8* getelementptr inbounds ([22 x i8], [22 x i8]* @.str, i64 0, i64 0), i8* %1)
%7 = tail call i32 @exit(i32 1)
unreachable
8: ; preds = %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void printTab(int tab[], int size) {
  int i = 0;
  for (i = 0; i < size; i++) {
    printf("%02d ", tab[i]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<printTab>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1160 <printTab+0x50>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xeb5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112d <printTab+0x1d>
lea    0xe9f(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printTab>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1157 <printTab+0x37>
mov    %rdi,%r15
mov    %esi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <printTab+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%02d \00"
@.str.1 = [2 x i8] c"\0A\00"
define void @printTab(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%02d \00"
define void @printTab(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
/* Type definitions */
struct cpufreq_policy {
  int dummy;
};

/* Variables and functions */
struct cpufreq_policy *sysfs_get_freq_policy(unsigned int);
struct cpufreq_policy *cpufreq_get_policy(unsigned int cpu) {
  return sysfs_get_freq_policy(cpu);
}


x86 assembly (clang, -O0):
<cpufreq_get_policy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <sysfs_get_freq_policy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpufreq_get_policy>:
jmp    1030 <sysfs_get_freq_policy@plt>

LLVM IR (-O0):
%struct.cpufreq_policy = type { i32 }
define %struct.cpufreq_policy* @cpufreq_get_policy(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call %struct.cpufreq_policy* @sysfs_get_freq_policy(i32 %3)
ret %struct.cpufreq_policy* %4
}

LLVM IR (-O2):
%struct.cpufreq_policy = type { i32 }
define %struct.cpufreq_policy* @cpufreq_get_policy(i32 %0) {
%2 = tail call %struct.cpufreq_policy* @sysfs_get_freq_policy(i32 %0)
ret %struct.cpufreq_policy* %2
}
/* Variables and functions */
int random();
unsigned dns_random_(void) { return random(); }


x86 assembly (clang, -O0):
<dns_random_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <random@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_random_>:
xor    %eax,%eax
jmp    1030 <random@plt>

LLVM IR (-O0):
define i32 @dns_random_() {
%1 = call i32 (...) @random()
ret i32 %1
}

LLVM IR (-O2):
define i32 @dns_random_() {
%1 = tail call i32 (...) @random()
ret i32 %1
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t rdfsbase(void) {
  uint64_t fsbase;
  __asm__ volatile(".byte 0xf3, 0x48, 0x0f, 0xae, 0xc0\n"
                   : "=a"(fsbase)::"memory");
  return fsbase;
}


x86 assembly (clang, -O0):
<rdfsbase>:
push   %rbp
mov    %rsp,%rbp
rdfsbase %rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rdfsbase>:
rdfsbase %rax
ret

LLVM IR (-O0):
define i8* @rdfsbase() {
%1 = alloca i8*
%2 = call i8* asm sideeffect ".byte 0xf3, 0x48, 0x0f, 0xae, 0xc0\0A", "={ax},~{memory},~{dirflag},~{fpsr},~{flags}"()
store i8* %2, i8** %1
%3 = load i8*, i8** %1
ret i8* %3
}

LLVM IR (-O2):
define i8* @rdfsbase() {
%1 = tail call i8* asm sideeffect ".byte 0xf3, 0x48, 0x0f, 0xae, 0xc0\0A", "={ax},~{memory},~{dirflag},~{fpsr},~{flags}"()
ret i8* %1
}
adrreg0adrreg1_set(r0, r1, x0, x1, p0, p1) int r0, r1;
int *p0, *p1;
{ (p0[10000000]) = (p1[1111111 / 4]); }


x86 assembly (clang, -O0):
<adrreg0adrreg1_set>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x28(%rbp),%rax
mov    0x10f444(%rax),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,0x2625a00(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adrreg0adrreg1_set>:
mov    0x10f444(%r9),%eax
mov    %eax,0x2625a00(%r8)
ret

LLVM IR (-O0):
define i32 @adrreg0adrreg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i32* %4, i32* %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32*
%13 = alloca i32*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i32* %4, i32** %12
store i32* %5, i32** %13
%14 = load i32*, i32** %13
%15 = getelementptr inbounds i32, i32* %14, i64 277777
%16 = load i32, i32* %15
%17 = load i32*, i32** %12
%18 = getelementptr inbounds i32, i32* %17, i64 10000000
store i32 %16, i32* %18
%19 = load i32, i32* %7
ret i32 %19
}

LLVM IR (-O2):
define i32 @adrreg0adrreg1_set(i32 %0, i32 %1, i32 %2, i32 %3, i32* nocapture writeonly %4, i32* nocapture %5) {
%7 = getelementptr inbounds i32, i32* %5, i64 277777
%8 = load i32, i32* %7
%9 = getelementptr inbounds i32, i32* %4, i64 10000000
store i32 %8, i32* %9
ret i32 undef
}
void interrupt_handler(void) {}


x86 assembly (clang, -O0):
<interrupt_handler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<interrupt_handler>:
ret

LLVM IR (-O0):
define void @interrupt_handler() {
ret void
}

LLVM IR (-O2):
define void @interrupt_handler() {
ret void
}
/* Variables and functions */
scalar_t__ _irc_chan_add(char *, char *);
scalar_t__ _irc_chan_setstatus(char *, int);
int irc_join(char *chan, char *key) {
  if (chan == NULL)
    return -1;
  if (_irc_chan_add(chan, key) < 0)
    return -1;
  if (_irc_chan_setstatus(chan, 1) < 0)
    return -1;
  return 0;
}


x86 assembly (clang, -O0):
<irc_join>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1147 <irc_join+0x27>
movl   $0xffffffff,-0x4(%rbp)
jmp    1195 <irc_join+0x75>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1030 <_irc_chan_add@plt>
cmp    $0x0,%rax
jge    116a <irc_join+0x4a>
movl   $0xffffffff,-0x4(%rbp)
jmp    1195 <irc_join+0x75>
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
call   1040 <_irc_chan_setstatus@plt>
cmp    $0x0,%rax
jge    118e <irc_join+0x6e>
movl   $0xffffffff,-0x4(%rbp)
jmp    1195 <irc_join+0x75>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_join>:
push   %r14
push   %rbx
push   %rax
mov    $0xffffffff,%r14d
test   %rdi,%rdi
je     1150 <irc_join+0x30>
mov    %rdi,%rbx
call   1030 <_irc_chan_add@plt>
test   %rax,%rax
js     1150 <irc_join+0x30>
mov    %rbx,%rdi
mov    $0x1,%esi
call   1040 <_irc_chan_setstatus@plt>
mov    %rax,%r14
sar    $0x3f,%r14
mov    %r14d,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @irc_join(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
%6 = load i8*, i8** %4
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 -1, i32* %3
br label %21
9: ; preds = %2
%10 = load i8*, i8** %4
%11 = load i8*, i8** %5
%12 = call i64 @_irc_chan_add(i8* %10, i8* %11)
%13 = icmp slt i64 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %9
store i32 -1, i32* %3
br label %21
15: ; preds = %9
%16 = load i8*, i8** %4
%17 = call i64 @_irc_chan_setstatus(i8* %16, i32 1)
%18 = icmp slt i64 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %15
store i32 -1, i32* %3
br label %21
20: ; preds = %15
store i32 0, i32* %3
br label %21
21: ; preds = %20, %19, %14, %8
%22 = load i32, i32* %3
ret i32 %22
}

LLVM IR (-O2):
define i32 @irc_join(i8* %0, i8* %1) {
%3 = icmp eq i8* %0, null
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = tail call i64 @_irc_chan_add(i8* %0, i8* %1)
%6 = icmp slt i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = tail call i64 @_irc_chan_setstatus(i8* %0, i32 1)
%9 = ashr i64 %8, 63
%10 = trunc i64 %9 to i32
br label %11
11: ; preds = %7, %4, %2
%12 = phi i32 [ -1, %2 ], [ -1, %4 ], [ %10, %7 ]
ret i32 %12
}
__attribute__((always_)) void flush_cache_page(struct vm_area_struct *vma,
                                               unsigned long vmaddr,
                                               unsigned long pfn) {}


x86 assembly (clang, -O0):
<flush_cache_page>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_cache_page>:
ret

LLVM IR (-O0):
%struct.vm_area_struct = type opaque
define void @flush_cache_page(%struct.vm_area_struct* %0, i64 %1, i64 %2) {
%4 = alloca %struct.vm_area_struct*
%5 = alloca i64
%6 = alloca i64
store %struct.vm_area_struct* %0, %struct.vm_area_struct** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
ret void
}

LLVM IR (-O2):
%struct.vm_area_struct = type opaque
define void @flush_cache_page(%struct.vm_area_struct* nocapture %0, i64 %1, i64 %2) {
ret void
}
double m2Rad(const double mt) { return mt / 6371000; }


x86 assembly (clang, -O0):
<m2Rad>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeea(%rip),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<m2Rad>:
divsd  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define double @m2Rad(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fdiv double %3, 6.371000e+06
ret double %4
}

LLVM IR (-O2):
define double @m2Rad(double %0) {
%2 = fdiv double %0, 6.371000e+06
ret double %2
}
/* Type definitions */
struct wpcp_out_message_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct wpcp_out_message_t *);
void wpcp_session_out_message_delete(struct wpcp_out_message_t *out_message) {
  free(out_message);
}


x86 assembly (clang, -O0):
<wpcp_session_out_message_delete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpcp_session_out_message_delete>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.wpcp_out_message_t = type { i32 }
define void @wpcp_session_out_message_delete(%struct.wpcp_out_message_t* %0) {
%2 = alloca %struct.wpcp_out_message_t*
store %struct.wpcp_out_message_t* %0, %struct.wpcp_out_message_t** %2
%3 = load %struct.wpcp_out_message_t*, %struct.wpcp_out_message_t** %2
%4 = call i32 @free(%struct.wpcp_out_message_t* %3)
ret void
}

LLVM IR (-O2):
%struct.wpcp_out_message_t = type { i32 }
define void @wpcp_session_out_message_delete(%struct.wpcp_out_message_t* nocapture %0) {
%2 = tail call i32 @free(%struct.wpcp_out_message_t* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isalnum(int);
void t_isalnum_0x56() {
  Assert_real((isalnum(86)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isalnum.c",
              435, ("isalnum should be 1 for V"));
}


x86 assembly (clang, -O0):
<t_isalnum_0x56>:
push   %rbp
mov    %rsp,%rbp
mov    $0x56,%edi
call   1030 <isalnum@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x1b3,%edx
lea    0xf65(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isalnum_0x56>:
push   %rax
mov    $0x56,%edi
call   1030 <isalnum@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x1b3,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for V\00"
define void @t_isalnum_0x56() {
%1 = call i32 @isalnum(i32 86)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 435, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isalnum.c\00"
@.str.1 = [26 x i8] c"isalnum should be 1 for V\00"
define void @t_isalnum_0x56() {
%1 = tail call i32 @isalnum(i32 86)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 435, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main(int argc, char *argv[]) {
  printf("__linux defined\n");
  printf("__unix defined\n");
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xeec(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"__linux defined\0A\00"
@.str.1 = [16 x i8] c"__unix defined\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%6 = call i32 @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [16 x i8] c"__linux defined\00"
@str.2 = [15 x i8] c"__unix defined\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("System doesn't support full POSIX capabilities.\n");
  return 1;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [49 x i8] c"System doesn't support full POSIX capabilities.\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@str = [48 x i8] c"System doesn't support full POSIX capabilities.\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([48 x i8], [48 x i8]* @str, i64 0, i64 0))
ret i32 1
}
/* Variables and functions */
int voronoi_F1F2(float, float, float);
float voronoi_CrS(float x, float y, float z) {
  float t = 10 * voronoi_F1F2(x, y, z);
  if (t > 1.f)
    return 1.f;
  return (2.0f * t - 1.0f);
}


x86 assembly (clang, -O0):
<voronoi_CrS>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movss  %xmm0,-0x8(%rbp)
movss  %xmm1,-0xc(%rbp)
movss  %xmm2,-0x10(%rbp)
movss  -0x8(%rbp),%xmm0
movss  -0xc(%rbp),%xmm1
movss  -0x10(%rbp),%xmm2
call   1030 <voronoi_F1F2@plt>
imul   $0xa,%eax,%eax
cvtsi2ss %eax,%xmm0
movss  %xmm0,-0x14(%rbp)
movss  -0x14(%rbp),%xmm0
movss  0xeac(%rip),%xmm1
ucomiss %xmm1,%xmm0
jbe    116f <voronoi_CrS+0x5f>
movss  0xe9b(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1189 <voronoi_CrS+0x79>
movss  -0x14(%rbp),%xmm0
addss  %xmm0,%xmm0
movss  0xe84(%rip),%xmm1
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<voronoi_CrS>:
push   %rax
call   1030 <voronoi_F1F2@plt>
add    %eax,%eax
lea    (%rax,%rax,4),%eax
cmp    $0x2,%eax
jge    1135 <voronoi_CrS+0x25>
xorps  %xmm0,%xmm0
cvtsi2ss %eax,%xmm0
addss  %xmm0,%xmm0
addss  0xecd(%rip),%xmm0
pop    %rax
ret
movss  0xec7(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @voronoi_CrS(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float %0, float* %5
store float %1, float* %6
store float %2, float* %7
%9 = load float, float* %5
%10 = load float, float* %6
%11 = load float, float* %7
%12 = call i32 @voronoi_F1F2(float %9, float %10, float %11)
%13 = mul nsw i32 10, %12
%14 = sitofp i32 %13 to float
store float %14, float* %8
%15 = load float, float* %8
%16 = fcmp ogt float %15, 1.000000e+00
br i1 %16, label %17, label %18
17: ; preds = %3
store float 1.000000e+00, float* %4
br label %21
18: ; preds = %3
%19 = load float, float* %8
%20 = call float @llvm.fmuladd.f32(float 2.000000e+00, float %19, float -1.000000e+00)
store float %20, float* %4
br label %21
21: ; preds = %18, %17
%22 = load float, float* %4
ret float %22
}

LLVM IR (-O2):
define float @voronoi_CrS(float %0, float %1, float %2) {
%4 = tail call i32 @voronoi_F1F2(float %0, float %1, float %2)
%5 = mul nsw i32 %4, 10
%6 = icmp sgt i32 %5, 1
%7 = sitofp i32 %5 to float
%8 = tail call float @llvm.fmuladd.f32(float %7, float 2.000000e+00, float -1.000000e+00)
%9 = select i1 %6, float 1.000000e+00, float %8
ret float %9
}
int fun472() { return 472; }


x86 assembly (clang, -O0):
<fun472>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1d8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun472>:
mov    $0x1d8,%eax
ret

LLVM IR (-O0):
define i32 @fun472() {
ret i32 472
}

LLVM IR (-O2):
define i32 @fun472() {
ret i32 472
}
/* Type definitions */
typedef int /*<<< orphan*/ converted;

/* Variables and functions */
int /*<<< orphan*/ PRINT_ERR(char *);
int htonl(int);
int write(int, int *, int);
void reply_sender(int fd, int answer_to_send) {
  int converted = 0;
  int nbytes;
  converted = htonl(answer_to_send);
  nbytes = write(fd, &converted, sizeof(converted));
  if (nbytes < 0) {
    PRINT_ERR("cannot write ack data to the socket for sender/receiver sync");
  }
}


x86 assembly (clang, -O0):
<reply_sender>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <htonl@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <write@plt>
mov    %eax,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jge    117a <reply_sender+0x4a>
lea    0xe8b(%rip),%rdi
call   1050 <PRINT_ERR@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<reply_sender>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,%ebx
mov    %esi,%edi
call   1040 <htonl@plt>
mov    %eax,0xc(%rsp)
lea    0xc(%rsp),%rsi
mov    %ebx,%edi
mov    $0x4,%edx
call   1030 <write@plt>
test   %eax,%eax
js     115d <reply_sender+0x2d>
add    $0x10,%rsp
pop    %rbx
ret
lea    0xe9c(%rip),%rdi
add    $0x10,%rsp
pop    %rbx
jmp    1050 <PRINT_ERR@plt>

LLVM IR (-O0):
@.str = [61 x i8] c"cannot write ack data to the socket for sender/receiver sync\00"
define void @reply_sender(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
%7 = load i32, i32* %4
%8 = call i32 @htonl(i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %3
%10 = call i32 @write(i32 %9, i32* %5, i32 4)
store i32 %10, i32* %6
%11 = load i32, i32* %6
%12 = icmp slt i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %2
%14 = call i32 @PRINT_ERR(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0))
br label %15
15: ; preds = %13, %2
ret void
}

LLVM IR (-O2):
@.str = [61 x i8] c"cannot write ack data to the socket for sender/receiver sync\00"
define void @reply_sender(i32 %0, i32 %1) {
%3 = alloca i32
%4 = bitcast i32* %3 to i8*
%5 = tail call i32 @htonl(i32 %1)
store i32 %5, i32* %3
%6 = call i32 @write(i32 %0, i32* %3, i32 4)
%7 = icmp slt i32 %6, 0
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 @PRINT_ERR(i8* getelementptr inbounds ([61 x i8], [61 x i8]* @.str, i64 0, i64 0))
br label %10
10: ; preds = %8, %2
ret void
}
unsigned int pgcd(unsigned int num1, unsigned int num2) {
  unsigned int c, bigger, smaller;
  if (num2 < num1) {
    smaller = num2;
    bigger = num1;
  } else {
    smaller = num1;
    bigger = num2;
  }
  while (smaller) {
    c = bigger % smaller;
    bigger = smaller;
    smaller = c;
  }
  return (bigger);
}


x86 assembly (clang, -O0):
<pgcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jae    1127 <pgcd+0x27>
mov    -0x8(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1133 <pgcd+0x33>
mov    -0x4(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x10(%rbp)
jmp    1138 <pgcd+0x38>
cmpl   $0x0,-0x14(%rbp)
je     115e <pgcd+0x5e>
mov    -0x10(%rbp),%eax
xor    %edx,%edx
divl   -0x14(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
jmp    1138 <pgcd+0x38>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pgcd>:
mov    %edi,%edx
cmp    %edi,%esi
mov    %esi,%eax
cmovb  %edi,%eax
cmovb  %esi,%edx
test   %edx,%edx
je     111e <pgcd+0x1e>
mov    %edx,%ecx
xor    %edx,%edx
div    %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <pgcd+0x10>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @pgcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %4
%9 = load i32, i32* %3
%10 = icmp ult i32 %8, %9
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = load i32, i32* %4
store i32 %12, i32* %7
%13 = load i32, i32* %3
store i32 %13, i32* %6
br label %17
14: ; preds = %2
%15 = load i32, i32* %3
store i32 %15, i32* %7
%16 = load i32, i32* %4
store i32 %16, i32* %6
br label %17
17: ; preds = %14, %11
br label %18
18: ; preds = %21, %17
%19 = load i32, i32* %7
%20 = icmp ne i32 %19, 0
br i1 %20, label %21, label %27
21: ; preds = %18
%22 = load i32, i32* %6
%23 = load i32, i32* %7
%24 = urem i32 %22, %23
store i32 %24, i32* %5
%25 = load i32, i32* %7
store i32 %25, i32* %6
%26 = load i32, i32* %5
store i32 %26, i32* %7
br label %18
27: ; preds = %18
%28 = load i32, i32* %6
ret i32 %28
}

LLVM IR (-O2):
define i32 @pgcd(i32 %0, i32 %1) {
%3 = icmp ult i32 %1, %0
%4 = select i1 %3, i32 %0, i32 %1
%5 = select i1 %3, i32 %1, i32 %0
%6 = icmp eq i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %2, %7
%8 = phi i32 [ %10, %7 ], [ %5, %2 ]
%9 = phi i32 [ %8, %7 ], [ %4, %2 ]
%10 = urem i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %7
12: ; preds = %7, %2
%13 = phi i32 [ %4, %2 ], [ %8, %7 ]
ret i32 %13
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int initialize_multprec_homotopy(int fixed_gamma, int decimals) {
  int fail;
  double *c;
  fail = _ada_use_c2phc(512, &fixed_gamma, &decimals, c);
  return fail;
}


x86 assembly (clang, -O0):
<initialize_multprec_homotopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x18(%rbp),%rcx
mov    $0x200,%edi
lea    -0x4(%rbp),%rsi
lea    -0x8(%rbp),%rdx
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_multprec_homotopy>:
push   %rax
mov    %edi,0x4(%rsp)
mov    %esi,(%rsp)
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
mov    $0x200,%edi
call   1030 <_ada_use_c2phc@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @initialize_multprec_homotopy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca double*
store i32 %0, i32* %3
store i32 %1, i32* %4
%7 = load double*, double** %6
%8 = call i32 @_ada_use_c2phc(i32 512, i32* %3, i32* %4, double* %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @initialize_multprec_homotopy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @_ada_use_c2phc(i32 512, i32* %3, i32* %4, double* undef)
ret i32 %5
}
/* Variables and functions */
size_t PowerSetDispositionRipetitionR(int /*<<< orphan*/, int *, int *, size_t,
                                      int /*<<< orphan*/);
int /*<<< orphan*/ free(int *);
scalar_t__ malloc(size_t);
size_t PowerSetDispositionRipetition(int *val, size_t k) {
  size_t count;
  int *sol = (int *)malloc(k * sizeof(int));
  count = PowerSetDispositionRipetitionR(0, val, sol, k, 0);
  free(sol);
  return (count);
}


x86 assembly (clang, -O0):
<PowerSetDispositionRipetition>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
shl    $0x2,%rdi
call   1050 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x20(%rbp),%rdx
mov    -0x10(%rbp),%rcx
xor    %r8d,%r8d
mov    %r8d,%edi
call   1040 <PowerSetDispositionRipetitionR@plt>
mov    %rax,-0x18(%rbp)
mov    -0x20(%rbp),%rdi
call   1030 <free@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PowerSetDispositionRipetition>:
push   %r15
push   %r14
push   %rbx
mov    %rsi,%r15
mov    %rdi,%r14
lea    0x0(,%rsi,4),%rdi
call   1050 <malloc@plt>
mov    %rax,%rbx
xor    %edi,%edi
mov    %r14,%rsi
mov    %rax,%rdx
mov    %r15,%rcx
xor    %r8d,%r8d
call   1040 <PowerSetDispositionRipetitionR@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i64 @PowerSetDispositionRipetition(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
%5 = alloca i64
%6 = alloca i32*
store i32* %0, i32** %3
store i64 %1, i64* %4
%7 = load i64, i64* %4
%8 = mul i64 %7, 4
%9 = call i64 @malloc(i64 %8)
%10 = inttoptr i64 %9 to i32*
store i32* %10, i32** %6
%11 = load i32*, i32** %3
%12 = load i32*, i32** %6
%13 = load i64, i64* %4
%14 = call i64 @PowerSetDispositionRipetitionR(i32 0, i32* %11, i32* %12, i64 %13, i32 0)
store i64 %14, i64* %5
%15 = load i32*, i32** %6
%16 = call i32 @free(i32* %15)
%17 = load i64, i64* %5
ret i64 %17
}

LLVM IR (-O2):
define i64 @PowerSetDispositionRipetition(i32* %0, i64 %1) {
%3 = shl i64 %1, 2
%4 = tail call i64 @malloc(i64 %3)
%5 = inttoptr i64 %4 to i32*
%6 = tail call i64 @PowerSetDispositionRipetitionR(i32 0, i32* %0, i32* %5, i64 %1, i32 0)
%7 = tail call i32 @free(i32* %5)
ret i64 %6
}
void free_dynamic_array_vector(v, nl, nh) long nh, nl;
struct dynamic_array **v;
{
  free((char *)(v + nl - 1));
}


x86 assembly (clang, -O0):
<free_dynamic_array_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rax
shl    $0x3,%rax
add    %rax,%rdi
add    $0xfffffffffffffff8,%rdi
call   1030 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<free_dynamic_array_vector>:
lea    (%rdi,%rsi,8),%rdi
add    $0xfffffffffffffff8,%rdi
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.dynamic_array = type opaque
define void @free_dynamic_array_vector(%struct.dynamic_array** %0, i64 %1, i64 %2) {
%4 = alloca %struct.dynamic_array**
%5 = alloca i64
%6 = alloca i64
store %struct.dynamic_array** %0, %struct.dynamic_array*** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load %struct.dynamic_array**, %struct.dynamic_array*** %4
%8 = load i64, i64* %5
%9 = getelementptr inbounds %struct.dynamic_array*, %struct.dynamic_array** %7, i64 %8
%10 = getelementptr inbounds %struct.dynamic_array*, %struct.dynamic_array** %9, i64 -1
%11 = bitcast %struct.dynamic_array** %10 to i8*
ret void
}

LLVM IR (-O2):
%struct.dynamic_array = type opaque
define void @free_dynamic_array_vector(%struct.dynamic_array** nocapture %0, i64 %1, i64 %2) {
%4 = getelementptr inbounds %struct.dynamic_array*, %struct.dynamic_array** %0, i64 %1
%5 = getelementptr inbounds %struct.dynamic_array*, %struct.dynamic_array** %4, i64 -1
%6 = bitcast %struct.dynamic_array** %5 to i8*
tail call void @free(i8* %6)
ret void
}
void ft_striter(char *s, void (*f)(char *)) {
  if (!(s) || !(f))
    return;
  while (*s)
    f(s++);
}


x86 assembly (clang, -O0):
<ft_striter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1126 <ft_striter+0x26>
cmpq   $0x0,-0x10(%rbp)
jne    112b <ft_striter+0x2b>
jmp    1157 <ft_striter+0x57>
jmp    1130 <ft_striter+0x30>
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1157 <ft_striter+0x57>
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdi
mov    %rdi,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
call   *%rax
jmp    1130 <ft_striter+0x30>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_striter>:
push   %r15
push   %r14
push   %rbx
test   %rdi,%rdi
je     1133 <ft_striter+0x33>
mov    %rsi,%r14
test   %rsi,%rsi
je     1133 <ft_striter+0x33>
mov    %rdi,%rbx
cmpb   $0x0,(%rdi)
je     1133 <ft_striter+0x33>
nopw   0x0(%rax,%rax,1)
lea    0x1(%rbx),%r15
mov    %rbx,%rdi
call   *%r14
cmpb   $0x0,0x1(%rbx)
mov    %r15,%rbx
jne    1120 <ft_striter+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @ft_striter(i8* %0, void (i8*)* %1) {
%3 = alloca i8*
%4 = alloca void (i8*)*
store i8* %0, i8** %3
store void (i8*)* %1, void (i8*)** %4
%5 = load i8*, i8** %3
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %10
7: ; preds = %2
%8 = load void (i8*)*, void (i8*)** %4
%9 = icmp ne void (i8*)* %8, null
br i1 %9, label %11, label %10
10: ; preds = %7, %2
br label %20
11: ; preds = %7
br label %12
12: ; preds = %16, %11
%13 = load i8*, i8** %3
%14 = load i8, i8* %13
%15 = icmp ne i8 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load void (i8*)*, void (i8*)** %4
%18 = load i8*, i8** %3
%19 = getelementptr inbounds i8, i8* %18, i32 1
store i8* %19, i8** %3
br label %12
20: ; preds = %10, %12
ret void
}

LLVM IR (-O2):
define void @ft_striter(i8* %0, void (i8*)* %1) {
%3 = icmp ne i8* %0, null
%4 = icmp ne void (i8*)* %1, null
%5 = and i1 %3, %4
br i1 %5, label %6, label %14
6: ; preds = %2
%7 = load i8, i8* %0
%8 = icmp eq i8 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %6, %9
%10 = phi i8* [ %11, %9 ], [ %0, %6 ]
%11 = getelementptr inbounds i8, i8* %10, i64 1
tail call void %1(i8* %10)
%12 = load i8, i8* %11
%13 = icmp eq i8 %12, 0
br i1 %13, label %14, label %9
14: ; preds = %9, %6, %2
ret void
}
int isspace(int c) {
  switch (c) {
  case ' ':
  case '\t':
  case '\n':
    return 1;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<isspace>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
add    $0xfffffff7,%eax
sub    $0x2,%eax
jb     112f <isspace+0x2f>
jmp    111e <isspace+0x1e>
mov    -0xc(%rbp),%eax
sub    $0x20,%eax
jne    113b <isspace+0x3b>
jmp    112f <isspace+0x2f>
movl   $0x1,-0x4(%rbp)
jmp    1142 <isspace+0x42>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isspace>:
cmp    $0x20,%edi
ja     111d <isspace+0x1d>
mov    $0x1,%eax
mov    %edi,%ecx
movabs $0x100000600,%rdx
bt     %rcx,%rdx
jae    111d <isspace+0x1d>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isspace(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 32, label %5
i32 9, label %5
i32 10, label %5
]
5: ; preds = %1, %1, %1
store i32 1, i32* %2
br label %7
6: ; preds = %1
store i32 0, i32* %2
br label %7
7: ; preds = %6, %5
%8 = load i32, i32* %2
ret i32 %8
}

LLVM IR (-O2):
define i32 @isspace(i32 %0) {
switch i32 %0, label %2 [
i32 32, label %3
i32 9, label %3
i32 10, label %3
]
2: ; preds = %1
br label %3
3: ; preds = %1, %1, %1, %2
%4 = phi i32 [ 0, %2 ], [ 1, %1 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %4
}
/* Type definitions */
typedef int uint_fast8_t;
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void use_aeskey(uint_fast8_t keyno) {
  if (keyno > 0x3F)
    return;
  *((volatile uint8_t *)0x10009010) = keyno;
  *((volatile uint32_t *)0x10009000) =
      *((volatile uint32_t *)0x10009000) | 0x04000000;
}


x86 assembly (clang, -O0):
<use_aeskey>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x3f,-0x4(%rbp)
jle    1116 <use_aeskey+0x16>
jmp    1134 <use_aeskey+0x34>
mov    -0x4(%rbp),%ecx
mov    $0x10009010,%eax
mov    %ecx,(%rax)
mov    $0x10009000,%eax
mov    (%rax),%ecx
or     $0x4000000,%ecx
mov    $0x10009000,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<use_aeskey>:
cmp    $0x3f,%edi
jg     1117 <use_aeskey+0x17>
mov    %edi,0x10009010
orl    $0x4000000,0x10009000
ret

LLVM IR (-O0):
define void @use_aeskey(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 63
br i1 %4, label %5, label %6
5: ; preds = %1
br label %10
6: ; preds = %1
%7 = load i32, i32* %2
store volatile i32 %7, i32* inttoptr (i64 268472336 to i32*)
%8 = load volatile i32, i32* inttoptr (i64 268472320 to i32*)
%9 = or i32 %8, 67108864
store volatile i32 %9, i32* inttoptr (i64 268472320 to i32*)
br label %10
10: ; preds = %6, %5
ret void
}

LLVM IR (-O2):
define void @use_aeskey(i32 %0) {
%2 = icmp sgt i32 %0, 63
br i1 %2, label %6, label %3
3: ; preds = %1
store volatile i32 %0, i32* inttoptr (i64 268472336 to i32*)
%4 = load volatile i32, i32* inttoptr (i64 268472320 to i32*)
%5 = or i32 %4, 67108864
store volatile i32 %5, i32* inttoptr (i64 268472320 to i32*)
br label %6
6: ; preds = %1, %3
ret void
}
int test_imm_E7int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0xE7 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_E7int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0xe7,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_E7int64_midword_mem>:
testb  $0xe7,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_E7int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 231
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_E7int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 15138816
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
void _delete_dpd_event(struct state *st, const char *file, int lineno) {}


x86 assembly (clang, -O0):
<_delete_dpd_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_delete_dpd_event>:
ret

LLVM IR (-O0):
%struct.state = type opaque
define void @_delete_dpd_event(%struct.state* %0, i8* %1, i32 %2) {
%4 = alloca %struct.state*
%5 = alloca i8*
%6 = alloca i32
store %struct.state* %0, %struct.state** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
%struct.state = type opaque
define void @_delete_dpd_event(%struct.state* nocapture %0, i8* nocapture %1, i32 %2) {
ret void
}
/* Type definitions */
struct telnetp {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ collect_incoming(struct telnetp *);
int /*<<< orphan*/ process_buffer(struct telnetp *);
void telnetp_process_incoming(struct telnetp *t) {
  collect_incoming(t);
  process_buffer(t);
}


x86 assembly (clang, -O0):
<telnetp_process_incoming>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <collect_incoming@plt>
mov    -0x8(%rbp),%rdi
call   1040 <process_buffer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<telnetp_process_incoming>:
push   %rbx
mov    %rdi,%rbx
call   1030 <collect_incoming@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <process_buffer@plt>

LLVM IR (-O0):
%struct.telnetp = type { i32 }
define void @telnetp_process_incoming(%struct.telnetp* %0) {
%2 = alloca %struct.telnetp*
store %struct.telnetp* %0, %struct.telnetp** %2
%3 = load %struct.telnetp*, %struct.telnetp** %2
%4 = call i32 @collect_incoming(%struct.telnetp* %3)
%5 = load %struct.telnetp*, %struct.telnetp** %2
%6 = call i32 @process_buffer(%struct.telnetp* %5)
ret void
}

LLVM IR (-O2):
%struct.telnetp = type { i32 }
define void @telnetp_process_incoming(%struct.telnetp* %0) {
%2 = tail call i32 @collect_incoming(%struct.telnetp* %0)
%3 = tail call i32 @process_buffer(%struct.telnetp* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gen_op_mov32(int, int);
void gen_op_pack_32_f32(int dest, int src) { gen_op_mov32(dest, src); }


x86 assembly (clang, -O0):
<gen_op_pack_32_f32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <gen_op_mov32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_op_pack_32_f32>:
jmp    1030 <gen_op_mov32@plt>

LLVM IR (-O0):
define void @gen_op_pack_32_f32(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @gen_op_mov32(i32 %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @gen_op_pack_32_f32(i32 %0, i32 %1) {
%3 = tail call i32 @gen_op_mov32(i32 %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Com_Printf(char *, char const *);
void SV_GamePrint(const char *string) { Com_Printf("%s", string); }


x86 assembly (clang, -O0):
<SV_GamePrint>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <Com_Printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SV_GamePrint>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <Com_Printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%s\00"
define void @SV_GamePrint(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @Com_Printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%s\00"
define void @SV_GamePrint(i8* %0) {
%2 = tail call i32 @Com_Printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ suite1();
int /*<<< orphan*/ suite2();
void all_tests() {
  do {
    ;
    suite1();
    ;
  } while (0);
  do {
    ;
    suite2();
    ;
  } while (0);
}


x86 assembly (clang, -O0):
<all_tests>:
push   %rbp
mov    %rsp,%rbp
jmp    1129 <all_tests+0x9>
mov    $0x0,%al
call   1030 <suite1@plt>
jmp    1135 <all_tests+0x15>
mov    $0x0,%al
call   1040 <suite2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<all_tests>:
push   %rax
xor    %eax,%eax
call   1030 <suite1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <suite2@plt>

LLVM IR (-O0):
define void @all_tests() {
br label %1
1: ; preds = %0
%2 = call i32 (...) @suite1()
br label %3
3: ; preds = %1
br label %4
4: ; preds = %3
%5 = call i32 (...) @suite2()
br label %6
6: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @all_tests() {
%1 = tail call i32 (...) @suite1()
%2 = tail call i32 (...) @suite2()
ret void
}
/* Variables and functions */
float sin(float);
float torques(float r, float F, float theta) { return (r * F * sin(theta)); }


x86 assembly (clang, -O0):
<torques>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  %xmm2,-0xc(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  %xmm0,-0x10(%rbp)
movss  -0xc(%rbp),%xmm0
call   1030 <sin@plt>
movaps %xmm0,%xmm1
movss  -0x10(%rbp),%xmm0
mulss  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<torques>:
push   %rax
mulss  %xmm1,%xmm0
movss  %xmm0,0x4(%rsp)
movaps %xmm2,%xmm0
call   1030 <sin@plt>
mulss  0x4(%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @torques(float %0, float %1, float %2) {
%4 = alloca float
%5 = alloca float
%6 = alloca float
store float %0, float* %4
store float %1, float* %5
store float %2, float* %6
%7 = load float, float* %4
%8 = load float, float* %5
%9 = fmul float %7, %8
%10 = load float, float* %6
%11 = call float @sin(float %10)
%12 = fmul float %9, %11
ret float %12
}

LLVM IR (-O2):
define float @torques(float %0, float %1, float %2) {
%4 = fmul float %0, %1
%5 = tail call float @sin(float %2)
%6 = fmul float %4, %5
ret float %6
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int32_t;

/* Variables and functions */
void accept_leave_message(u_int32_t src, u_int32_t dst, u_int32_t group) {}


x86 assembly (clang, -O0):
<accept_leave_message>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<accept_leave_message>:
ret

LLVM IR (-O0):
define void @accept_leave_message(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret void
}

LLVM IR (-O2):
define void @accept_leave_message(i32 %0, i32 %1, i32 %2) {
ret void
}