xunge/DecIR huggingface dataset:
void RandomFunc(unsigned short input[1], unsigned short output[1]) {
  unsigned short state[1];
  unsigned short local1;
  {
    state[0UL] = input[0UL] + (unsigned short)11483;
    local1 = 0UL;
    while (local1 < 1UL) {
      local1++;
    }
    output[0UL] = ((state[0UL] >> (unsigned short)13) |
                   (state[0UL] << (unsigned short)3)) *
                  (unsigned short)4365;
  }
}


x86 assembly (clang, -O0):
<RandomFunc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%eax
add    $0x2cdb,%eax
mov    %ax,-0x12(%rbp)
movw   $0x0,-0x14(%rbp)
movzwl -0x14(%rbp),%eax
cmp    $0x1,%rax
jae    1141 <RandomFunc+0x41>
mov    -0x14(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0x14(%rbp)
jmp    1122 <RandomFunc+0x22>
movzwl -0x12(%rbp),%eax
sar    $0xd,%eax
movzwl -0x12(%rbp),%ecx
shl    $0x3,%ecx
or     %ecx,%eax
imul   $0x110d,%eax,%eax
mov    %ax,%cx
mov    -0x10(%rbp),%rax
mov    %cx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<RandomFunc>:
movzwl (%rdi),%eax
add    $0x2cdb,%eax
rol    $0x3,%ax
imul   $0x110d,%eax,%eax
mov    %ax,(%rsi)
ret

LLVM IR (-O0):
define void @RandomFunc(i16* %0, i16* %1) {
%3 = alloca i16*
%4 = alloca i16*
%5 = alloca [1 x i16]
%6 = alloca i16
store i16* %0, i16** %3
store i16* %1, i16** %4
%7 = load i16*, i16** %3
%8 = getelementptr inbounds i16, i16* %7, i64 0
%9 = load i16, i16* %8
%10 = zext i16 %9 to i32
%11 = add nsw i32 %10, 11483
%12 = trunc i32 %11 to i16
%13 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
store i16 %12, i16* %13
store i16 0, i16* %6
br label %14
14: ; preds = %18, %2
%15 = load i16, i16* %6
%16 = zext i16 %15 to i64
%17 = icmp ult i64 %16, 1
br i1 %17, label %18, label %21
18: ; preds = %14
%19 = load i16, i16* %6
%20 = add i16 %19, 1
store i16 %20, i16* %6
br label %14
21: ; preds = %14
%22 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
%23 = load i16, i16* %22
%24 = zext i16 %23 to i32
%25 = ashr i32 %24, 13
%26 = getelementptr inbounds [1 x i16], [1 x i16]* %5, i64 0, i64 0
%27 = load i16, i16* %26
%28 = zext i16 %27 to i32
%29 = shl i32 %28, 3
%30 = or i32 %25, %29
%31 = mul nsw i32 %30, 4365
%32 = trunc i32 %31 to i16
%33 = load i16*, i16** %4
%34 = getelementptr inbounds i16, i16* %33, i64 0
store i16 %32, i16* %34
ret void
}

LLVM IR (-O2):
define void @RandomFunc(i16* nocapture %0, i16* nocapture writeonly %1) {
%3 = load i16, i16* %0
%4 = add i16 %3, 11483
%5 = tail call i16 @llvm.fshl.i16(i16 %4, i16 %4, i16 3)
%6 = mul i16 %5, 4365
store i16 %6, i16* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ putch(char const);
void puts(const char *a) {
  for (const char *in = a; *in; in++) {
    if (*in == '\n')
      putch('\r');
    putch(*in);
  }
}


x86 assembly (clang, -O0):
<puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1168 <puts+0x58>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
jne    114b <puts+0x3b>
mov    $0xd,%edi
call   1030 <putch@plt>
mov    -0x10(%rbp),%rax
movsbl (%rax),%edi
call   1030 <putch@plt>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <puts+0x14>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<puts>:
push   %rbx
mov    %rdi,%rbx
jmp    1139 <puts+0x29>
cs nopw 0x0(%rax,%rax,1)
mov    $0xd,%edi
call   1030 <putch@plt>
movzbl (%rbx),%eax
movsbl %al,%edi
call   1030 <putch@plt>
add    $0x1,%rbx
movzbl (%rbx),%eax
cmp    $0xa,%al
je     1120 <puts+0x10>
test   %al,%al
jne    112d <puts+0x1d>
pop    %rbx
ret

LLVM IR (-O0):
define void @puts(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
store i8* %4, i8** %3
br label %5
5: ; preds = %20, %1
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = icmp ne i8 %7, 0
br i1 %8, label %9, label %23
9: ; preds = %5
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 10
br i1 %13, label %14, label %16
14: ; preds = %9
%15 = call i32 @putch(i8 signext 13)
br label %16
16: ; preds = %14, %9
%17 = load i8*, i8** %3
%18 = load i8, i8* %17
%19 = call i32 @putch(i8 signext %18)
br label %20
20: ; preds = %16
%21 = load i8*, i8** %3
%22 = getelementptr inbounds i8, i8* %21, i32 1
store i8* %22, i8** %3
br label %5
23: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @puts(i8* nocapture %0) {
br label %2
2: ; preds = %9, %1
%3 = phi i8* [ %0, %1 ], [ %12, %9 ]
%4 = load i8, i8* %3
switch i8 %4, label %9 [
i8 0, label %5
i8 10, label %6
]
5: ; preds = %2
ret void
6: ; preds = %2
%7 = tail call i32 @putch(i8 signext 13)
%8 = load i8, i8* %3
br label %9
9: ; preds = %2, %6
%10 = phi i8 [ %4, %2 ], [ %8, %6 ]
%11 = tail call i32 @putch(i8 signext %10)
%12 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
}
int test_imm_91int64_midword_mem(long long *val) {
  return ((*val >> 16) & (0x91 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_91int64_midword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
sar    $0x10,%rdx
and    $0x91,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_91int64_midword_mem>:
testb  $0x91,0x2(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_91int64_midword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = ashr i64 %4, 16
%6 = and i64 %5, 145
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_91int64_midword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 9502720
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ fenv_t;

/* Variables and functions */
int fegetenv(fenv_t *envp) { return 1; }


x86 assembly (clang, -O0):
<fegetenv>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fegetenv>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @fegetenv(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @fegetenv(i32* nocapture readnone %0) {
ret i32 1
}
/* Type definitions */
struct mat4 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ mat4_translation(float *, float *);
__attribute__((always_)) struct mat4 *psmat4_translation(struct mat4 *result,
                                                         struct mat4 *v) {
  mat4_translation((float *)result, (float *)v);
  return result;
}


x86 assembly (clang, -O0):
<psmat4_translation>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <mat4_translation@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psmat4_translation>:
push   %rbx
mov    %rdi,%rbx
call   1030 <mat4_translation@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.mat4 = type { i32 }
define %struct.mat4* @psmat4_translation(%struct.mat4* %0, %struct.mat4* %1) {
%3 = alloca %struct.mat4*
%4 = alloca %struct.mat4*
store %struct.mat4* %0, %struct.mat4** %3
store %struct.mat4* %1, %struct.mat4** %4
%5 = load %struct.mat4*, %struct.mat4** %3
%6 = bitcast %struct.mat4* %5 to float*
%7 = load %struct.mat4*, %struct.mat4** %4
%8 = bitcast %struct.mat4* %7 to float*
%9 = call i32 @mat4_translation(float* %6, float* %8)
%10 = load %struct.mat4*, %struct.mat4** %3
ret %struct.mat4* %10
}

LLVM IR (-O2):
%struct.mat4 = type { i32 }
define %struct.mat4* @psmat4_translation(%struct.mat4* returned %0, %struct.mat4* %1) {
%3 = bitcast %struct.mat4* %0 to float*
%4 = bitcast %struct.mat4* %1 to float*
%5 = tail call i32 @mat4_translation(float* %3, float* %4)
ret %struct.mat4* %0
}
/* Type definitions */
typedef scalar_t__ int64_t;

/* Variables and functions */
int sort_ascending(const void *a, const void *b) {
  const int64_t *c = a;
  const int64_t *d = b;
  if (*c < *d)
    return -1;
  return 1;
}


x86 assembly (clang, -O0):
<sort_ascending>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
mov    -0x28(%rbp),%rcx
cmp    (%rcx),%rax
jge    113c <sort_ascending+0x3c>
movl   $0xffffffff,-0x4(%rbp)
jmp    1143 <sort_ascending+0x43>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sort_ascending>:
mov    (%rdi),%rax
xor    %ecx,%ecx
cmp    (%rsi),%rax
setge  %cl
lea    (%rcx,%rcx,1),%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @sort_ascending(i8* %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64*
%7 = alloca i64*
store i8* %0, i8** %4
store i8* %1, i8** %5
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i64*
store i64* %9, i64** %6
%10 = load i8*, i8** %5
%11 = bitcast i8* %10 to i64*
store i64* %11, i64** %7
%12 = load i64*, i64** %6
%13 = load i64, i64* %12
%14 = load i64*, i64** %7
%15 = load i64, i64* %14
%16 = icmp slt i64 %13, %15
br i1 %16, label %17, label %18
17: ; preds = %2
store i32 -1, i32* %3
br label %19
18: ; preds = %2
store i32 1, i32* %3
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @sort_ascending(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i64*
%4 = bitcast i8* %1 to i64*
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp slt i64 %5, %6
%8 = select i1 %7, i32 -1, i32 1
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ output_line(char *);
void gen_swap_stack(void) {
  output_line("ldu ,s");
  output_line("std ,s");
  output_line("tfr u,d");
}


x86 assembly (clang, -O0):
<gen_swap_stack>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <output_line@plt>
lea    0xee0(%rip),%rdi
call   1030 <output_line@plt>
lea    0xedb(%rip),%rdi
call   1030 <output_line@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gen_swap_stack>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <output_line@plt>
lea    0xee3(%rip),%rdi
call   1030 <output_line@plt>
lea    0xede(%rip),%rdi
pop    %rax
jmp    1030 <output_line@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"ldu ,s\00"
@.str.1 = [7 x i8] c"std ,s\00"
@.str.2 = [8 x i8] c"tfr u,d\00"
define void @gen_swap_stack() {
%1 = call i32 @output_line(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @output_line(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @output_line(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"ldu ,s\00"
@.str.1 = [7 x i8] c"std ,s\00"
@.str.2 = [8 x i8] c"tfr u,d\00"
define void @gen_swap_stack() {
%1 = tail call i32 @output_line(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @output_line(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @output_line(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str.2, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ disp_zoom(int, int);
void cmd_zoom_out(int argc, const char **argv) { disp_zoom(-1, -1); }


x86 assembly (clang, -O0):
<cmd_zoom_out>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0xffffffff,%esi
mov    %esi,%edi
call   1030 <disp_zoom@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmd_zoom_out>:
mov    $0xffffffff,%edi
mov    $0xffffffff,%esi
jmp    1030 <disp_zoom@plt>

LLVM IR (-O0):
define void @cmd_zoom_out(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @disp_zoom(i32 -1, i32 -1)
ret void
}

LLVM IR (-O2):
define void @cmd_zoom_out(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @disp_zoom(i32 -1, i32 -1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isspace(int);
void t_isspace_0x92() {
  Assert_real((isspace(146) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isspace.c",
              735, ("isspace should be 0 for 0x92"));
}


x86 assembly (clang, -O0):
<t_isspace_0x92>:
push   %rbp
mov    %rsp,%rbp
mov    $0x92,%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2df,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isspace_0x92>:
push   %rax
mov    $0x92,%edi
call   1030 <isspace@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x2df,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x92\00"
define void @t_isspace_0x92() {
%1 = call i64 @isspace(i32 146)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 735, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isspace.c\00"
@.str.1 = [29 x i8] c"isspace should be 0 for 0x92\00"
define void @t_isspace_0x92() {
%1 = tail call i64 @isspace(i32 146)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 735, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int EXIT_SUCCESS;
int main(void) {
  int n = 0;
  int *ptr = &n;
  return (EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    0x2ebf(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32*
store i32 0, i32* %1
store i32 0, i32* %2
store i32* %2, i32** %3
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = load i32, i32* @EXIT_SUCCESS
ret i32 %1
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ override_redirect;
};
typedef TYPE_1__ XCreateWindowEvent;

/* Variables and functions */
int get_XCreateWindowEvent_override_redirect(void *_p) {
  return (int)((XCreateWindowEvent *)_p)->override_redirect;
}


x86 assembly (clang, -O0):
<get_XCreateWindowEvent_override_redirect>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XCreateWindowEvent_override_redirect>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XCreateWindowEvent_override_redirect(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XCreateWindowEvent_override_redirect(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
/* Variables and functions */
double rndgamma(double);
double rndbeta(double p, double q) {
  double gamma1, gamma2;
  gamma1 = rndgamma(p);
  gamma2 = rndgamma(q);
  return gamma1 / (gamma1 + gamma2);
}


x86 assembly (clang, -O0):
<rndbeta>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <rndgamma@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <rndgamma@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
addsd  -0x20(%rbp),%xmm1
divsd  %xmm1,%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rndbeta>:
sub    $0x18,%rsp
movsd  %xmm1,0x10(%rsp)
call   1030 <rndgamma@plt>
movsd  %xmm0,0x8(%rsp)
movsd  0x10(%rsp),%xmm0
call   1030 <rndgamma@plt>
movsd  0x8(%rsp),%xmm1
addsd  %xmm1,%xmm0
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @rndbeta(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %3
store double %1, double* %4
%7 = load double, double* %3
%8 = call double @rndgamma(double %7)
store double %8, double* %5
%9 = load double, double* %4
%10 = call double @rndgamma(double %9)
store double %10, double* %6
%11 = load double, double* %5
%12 = load double, double* %5
%13 = load double, double* %6
%14 = fadd double %12, %13
%15 = fdiv double %11, %14
ret double %15
}

LLVM IR (-O2):
define double @rndbeta(double %0, double %1) {
%3 = tail call double @rndgamma(double %0)
%4 = tail call double @rndgamma(double %1)
%5 = fadd double %3, %4
%6 = fdiv double %3, %5
ret double %6
}
int inhx32_tree_match(const void *d1, const void *d2) { return 0; }


x86 assembly (clang, -O0):
<inhx32_tree_match>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<inhx32_tree_match>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @inhx32_tree_match(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @inhx32_tree_match(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 0
}
/* Variables and functions */
int standard_diagonal_homotopy(int, int);
int write_standard_start_system();
int write_standard_target_system();
int create_the_diagonal_homotopy(int a, int b) {
  int fail;
  fail = standard_diagonal_homotopy(a, b);
  if (fail == 0) {
    fail = write_standard_target_system();
    fail = write_standard_start_system();
  }
  return fail;
}


x86 assembly (clang, -O0):
<create_the_diagonal_homotopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <standard_diagonal_homotopy@plt>
mov    %eax,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
jne    116a <create_the_diagonal_homotopy+0x3a>
mov    $0x0,%al
call   1040 <write_standard_target_system@plt>
mov    %eax,-0xc(%rbp)
mov    $0x0,%al
call   1050 <write_standard_start_system@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_the_diagonal_homotopy>:
push   %rax
call   1030 <standard_diagonal_homotopy@plt>
test   %eax,%eax
je     113c <create_the_diagonal_homotopy+0xc>
pop    %rcx
ret
xor    %eax,%eax
call   1040 <write_standard_target_system@plt>
xor    %eax,%eax
pop    %rcx
jmp    1050 <write_standard_start_system@plt>

LLVM IR (-O0):
define i32 @create_the_diagonal_homotopy(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = load i32, i32* %4
%8 = call i32 @standard_diagonal_homotopy(i32 %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %2
%12 = call i32 (...) @write_standard_target_system()
store i32 %12, i32* %5
%13 = call i32 (...) @write_standard_start_system()
store i32 %13, i32* %5
br label %14
14: ; preds = %11, %2
%15 = load i32, i32* %5
ret i32 %15
}

LLVM IR (-O2):
define i32 @create_the_diagonal_homotopy(i32 %0, i32 %1) {
%3 = tail call i32 @standard_diagonal_homotopy(i32 %0, i32 %1)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = tail call i32 (...) @write_standard_target_system()
%7 = tail call i32 (...) @write_standard_start_system()
br label %8
8: ; preds = %5, %2
%9 = phi i32 [ %7, %5 ], [ %3, %2 ]
ret i32 %9
}
int cpuinfo(unsigned func) {
  int ret;
  asm("cpuid" : "=c"(ret) : "a"(func) : "ebx", "edx");
  return ret;
}


x86 assembly (clang, -O0):
<cpuinfo>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
cpuid
mov    %ecx,-0x10(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuinfo>:
push   %rbx
mov    %edi,%eax
cpuid
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @cpuinfo(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 asm "cpuid", "={cx},{ax},~{ebx},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @cpuinfo(i32 %0) {
%2 = tail call i32 asm "cpuid", "={cx},{ax},~{ebx},~{edx},~{dirflag},~{fpsr},~{flags}"(i32 %0)
ret i32 %2
}
int do_596() { return 596; }


x86 assembly (clang, -O0):
<do_596>:
push   %rbp
mov    %rsp,%rbp
mov    $0x254,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_596>:
mov    $0x254,%eax
ret

LLVM IR (-O0):
define i32 @do_596() {
ret i32 596
}

LLVM IR (-O2):
define i32 @do_596() {
ret i32 596
}
/* Variables and functions */
int /*<<< orphan*/ usleep(unsigned long);
void msleep(unsigned long msec) { usleep(msec * 1000L); }


x86 assembly (clang, -O0):
<msleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
imul   $0x3e8,-0x8(%rbp),%rdi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msleep>:
imul   $0x3e8,%rdi,%rdi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @msleep(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = mul i64 %3, 1000
%5 = call i32 @usleep(i64 %4)
ret void
}

LLVM IR (-O2):
define void @msleep(i64 %0) {
%2 = mul i64 %0, 1000
%3 = tail call i32 @usleep(i64 %2)
ret void
}
char *lcdhw_ident() { return "$Id: lcd_devel.c 230 2007-10-23 17:42:49Z  $"; }


x86 assembly (clang, -O0):
<lcdhw_ident>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lcdhw_ident>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [45 x i8] c"$Id: lcd_devel.c 230 2007-10-23 17:42:49Z $\00"
define i8* @lcdhw_ident() {
ret i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [45 x i8] c"$Id: lcd_devel.c 230 2007-10-23 17:42:49Z $\00"
define i8* @lcdhw_ident() {
ret i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ snprintf(char *, unsigned int, char *, char const *);
void file_getlocalpackagepath(char *path, unsigned int count,
                              const char *sha1) {
  snprintf(path, count, "/media/data/apps/%s.opk", sha1);
}


x86 assembly (clang, -O0):
<file_getlocalpackagepath>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rcx
lea    0xecb(%rip),%rdx
call   1030 <snprintf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_getlocalpackagepath>:
mov    %rdx,%rcx
lea    0xee6(%rip),%rdx
jmp    1030 <snprintf@plt>

LLVM IR (-O0):
@.str = [24 x i8] c"/media/data/apps/%s.opk\00"
define void @file_getlocalpackagepath(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i32 @snprintf(i8* %7, i32 %8, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %9)
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"/media/data/apps/%s.opk\00"
define void @file_getlocalpackagepath(i8* %0, i32 %1, i8* %2) {
%4 = tail call i32 @snprintf(i8* %0, i32 %1, i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0), i8* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ Send_MPlayer_Command(int, int /*<<< orphan*/);
void MPlayer_Toggle() { Send_MPlayer_Command(0x11, 0); }


x86 assembly (clang, -O0):
<MPlayer_Toggle>:
push   %rbp
mov    %rsp,%rbp
mov    $0x11,%edi
xor    %esi,%esi
call   1030 <Send_MPlayer_Command@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MPlayer_Toggle>:
mov    $0x11,%edi
xor    %esi,%esi
jmp    1030 <Send_MPlayer_Command@plt>

LLVM IR (-O0):
define void @MPlayer_Toggle() {
%1 = call i32 @Send_MPlayer_Command(i32 17, i32 0)
ret void
}

LLVM IR (-O2):
define void @MPlayer_Toggle() {
%1 = tail call i32 @Send_MPlayer_Command(i32 17, i32 0)
ret void
}
/* Type definitions */
struct strategy {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void right_justify(struct strategy *strat, char *line) { printf("right "); }


x86 assembly (clang, -O0):
<right_justify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<right_justify>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
%struct.strategy = type { i32 }
@.str = [7 x i8] c"right \00"
define void @right_justify(%struct.strategy* %0, i8* %1) {
%3 = alloca %struct.strategy*
%4 = alloca i8*
store %struct.strategy* %0, %struct.strategy** %3
store i8* %1, i8** %4
%5 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.strategy = type { i32 }
@.str = [7 x i8] c"right \00"
define void @right_justify(%struct.strategy* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
int config_MODULE_GBOX(void) { return 0; }


x86 assembly (clang, -O0):
<config_MODULE_GBOX>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_MODULE_GBOX>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @config_MODULE_GBOX() {
ret i32 0
}

LLVM IR (-O2):
define i32 @config_MODULE_GBOX() {
ret i32 0
}
void debug_urb_queued_for_dmem(struct imx21 *imx21, struct urb *urb) {}


x86 assembly (clang, -O0):
<debug_urb_queued_for_dmem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<debug_urb_queued_for_dmem>:
ret

LLVM IR (-O0):
%struct.imx21 = type opaque
%struct.urb = type opaque
define void @debug_urb_queued_for_dmem(%struct.imx21* %0, %struct.urb* %1) {
%3 = alloca %struct.imx21*
%4 = alloca %struct.urb*
store %struct.imx21* %0, %struct.imx21** %3
store %struct.urb* %1, %struct.urb** %4
ret void
}

LLVM IR (-O2):
%struct.imx21 = type opaque
%struct.urb = type opaque
define void @debug_urb_queued_for_dmem(%struct.imx21* nocapture %0, %struct.urb* nocapture %1) {
ret void
}
/* Variables and functions */
int SIGINT;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ logger(char *);
void sig_handler(int signo) {
  if (signo == SIGINT) {
    logger("\nReceived SIGINT");
    exit(0);
  }
}


x86 assembly (clang, -O0):
<sig_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2eb3(%rip),%rcx
cmp    (%rcx),%eax
jne    1150 <sig_handler+0x30>
lea    0xebc(%rip),%rdi
call   1030 <logger@plt>
xor    %edi,%edi
call   1040 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_handler>:
push   %rax
mov    0x2ec0(%rip),%rax
cmp    %edi,(%rax)
je     112e <sig_handler+0xe>
pop    %rax
ret
lea    0xecb(%rip),%rdi
call   1030 <logger@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@SIGINT = global i32 0
@.str = [17 x i8] c"\0AReceived SIGINT\00"
define void @sig_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @SIGINT
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = call i32 @logger(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%8 = call i32 @exit(i32 0)
unreachable
9: ; preds = %1
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@.str = [17 x i8] c"\0AReceived SIGINT\00"
define void @sig_handler(i32 %0) {
%2 = load i32, i32* @SIGINT
%3 = icmp eq i32 %2, %0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @logger(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
%6 = tail call i32 @exit(i32 0)
unreachable
7: ; preds = %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __pr_warn(char *);
char *demangle_full(char *str) {
  __pr_warn("WARN: "
            "full demangle is not supported\n");
  return str;
}


x86 assembly (clang, -O0):
<demangle_full>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <__pr_warn@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<demangle_full>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
call   1030 <__pr_warn@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [38 x i8] c"WARN: full demangle is not supported\0A\00"
define i8* @demangle_full(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @__pr_warn(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
ret i8* %4
}

LLVM IR (-O2):
@.str = [38 x i8] c"WARN: full demangle is not supported\0A\00"
define i8* @demangle_full(i8* readnone returned %0) {
%2 = tail call i32 @__pr_warn(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0))
ret i8* %0
}
void initialiseStatesAndConstants(double *states, double *variables) {
  states[0] = 123.0;
}


x86 assembly (clang, -O0):
<initialiseStatesAndConstants>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  0xee8(%rip),%xmm0
movsd  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialiseStatesAndConstants>:
movabs $0x405ec00000000000,%rax
c0 5e 40
mov    %rax,(%rdi)
ret

LLVM IR (-O0):
define void @initialiseStatesAndConstants(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
store double 1.230000e+02, double* %6
ret void
}

LLVM IR (-O2):
define void @initialiseStatesAndConstants(double* nocapture writeonly %0, double* nocapture readnone %1) {
store double 1.230000e+02, double* %0
ret void
}
/* Variables and functions */
int check2dsurface(int *, double *, int *, int *, int /*<<< orphan*/, int,
                   int /*<<< orphan*/);
int check_surface_topology_fix(int *pnV, double *vertex, int *pnF, int *face) {
  return check2dsurface(pnV, vertex, pnF, face, 0, 1, 0);
}


x86 assembly (clang, -O0):
<check_surface_topology_fix>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
xor    %r8d,%r8d
mov    $0x1,%r9d
movl   $0x0,(%rsp)
call   1030 <check2dsurface@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_surface_topology_fix>:
push   %rax
movl   $0x0,(%rsp)
xor    %r8d,%r8d
mov    $0x1,%r9d
call   1030 <check2dsurface@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @check_surface_topology_fix(i32* %0, double* %1, i32* %2, i32* %3) {
%5 = alloca i32*
%6 = alloca double*
%7 = alloca i32*
%8 = alloca i32*
store i32* %0, i32** %5
store double* %1, double** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%9 = load i32*, i32** %5
%10 = load double*, double** %6
%11 = load i32*, i32** %7
%12 = load i32*, i32** %8
%13 = call i32 @check2dsurface(i32* %9, double* %10, i32* %11, i32* %12, i32 0, i32 1, i32 0)
ret i32 %13
}

LLVM IR (-O2):
define i32 @check_surface_topology_fix(i32* %0, double* %1, i32* %2, i32* %3) {
%5 = tail call i32 @check2dsurface(i32* %0, double* %1, i32* %2, i32* %3, i32 0, i32 1, i32 0)
ret i32 %5
}
/* Type definitions */
typedef unsigned long volatile uint32_t;

/* Variables and functions */
uint32_t SHA2IntStatusMasked(void) {
  uint32_t mask;
  mask = (*((volatile unsigned long *)(0x40024000 + 0x00000784)));
  return (mask & (*((volatile unsigned long *)(0x40024000 + 0x00000790))));
}


x86 assembly (clang, -O0):
<SHA2IntStatusMasked>:
push   %rbp
mov    %rsp,%rbp
mov    $0x40024784,%eax
mov    (%rax),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    $0x40024790,%ecx
mov    (%rcx),%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHA2IntStatusMasked>:
mov    0x40024784,%rax
40
mov    %rax,-0x8(%rsp)
mov    -0x8(%rsp),%rax
and    0x40024790,%rax
40
ret

LLVM IR (-O0):
define i64 @SHA2IntStatusMasked() {
%1 = alloca i64
%2 = load volatile i64, i64* inttoptr (i64 1073891204 to i64*)
store volatile i64 %2, i64* %1
%3 = load volatile i64, i64* %1
%4 = load volatile i64, i64* inttoptr (i64 1073891216 to i64*)
%5 = and i64 %3, %4
ret i64 %5
}

LLVM IR (-O2):
define i64 @SHA2IntStatusMasked() {
%1 = alloca i64
%2 = bitcast i64* %1 to i8*
%3 = load volatile i64, i64* inttoptr (i64 1073891204 to i64*)
store volatile i64 %3, i64* %1
%4 = load volatile i64, i64* %1
%5 = load volatile i64, i64* inttoptr (i64 1073891216 to i64*)
%6 = and i64 %5, %4
ret i64 %6
}
void unsigned_char_xor_signed_char_unsigned_int(unsigned char *LHS,
                                                unsigned int RHS) {
  (*LHS) ^= RHS;
}


x86 assembly (clang, -O0):
<unsigned_char_xor_signed_char_unsigned_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%edx
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
xor    %edx,%ecx
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsigned_char_xor_signed_char_unsigned_int>:
xor    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @unsigned_char_xor_signed_char_unsigned_int(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = xor i32 %8, %5
%10 = trunc i32 %9 to i8
store i8 %10, i8* %6
ret void
}

LLVM IR (-O2):
define void @unsigned_char_xor_signed_char_unsigned_int(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = trunc i32 %1 to i8
%5 = xor i8 %3, %4
store i8 %5, i8* %0
ret void
}
/* Variables and functions */
unsigned long GetLongword321();
unsigned long getlongword() { return GetLongword321(); }


x86 assembly (clang, -O0):
<getlongword>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <GetLongword321@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<getlongword>:
xor    %eax,%eax
jmp    1030 <GetLongword321@plt>

LLVM IR (-O0):
define i64 @getlongword() {
%1 = call i64 (...) @GetLongword321()
ret i64 %1
}

LLVM IR (-O2):
define i64 @getlongword() {
%1 = tail call i64 (...) @GetLongword321()
ret i64 %1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_channels_valid() {
  printf("NOT IMPLEMENTED:"
         "pa_channels_valid"
         "\n");
}


x86 assembly (clang, -O0):
<pa_channels_valid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_channels_valid>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [35 x i8] c"NOT IMPLEMENTED:pa_channels_valid\0A\00"
define i32 @pa_channels_valid() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [34 x i8] c"NOT IMPLEMENTED:pa_channels_valid\00"
define i32 @pa_channels_valid() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([34 x i8], [34 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ ASN1_UTCTIME;

/* Variables and functions */
int asn1_utctime_to_tm(int /*<<< orphan*/ *, int /*<<< orphan*/ const *);
int ASN1_UTCTIME_check(const ASN1_UTCTIME *d) {
  return asn1_utctime_to_tm(NULL, d);
}


x86 assembly (clang, -O0):
<ASN1_UTCTIME_check>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
xor    %eax,%eax
mov    %eax,%edi
call   1030 <asn1_utctime_to_tm@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASN1_UTCTIME_check>:
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <asn1_utctime_to_tm@plt>

LLVM IR (-O0):
define i32 @ASN1_UTCTIME_check(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @asn1_utctime_to_tm(i32* null, i32* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ASN1_UTCTIME_check(i32* %0) {
%2 = tail call i32 @asn1_utctime_to_tm(i32* null, i32* %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ memcpy(char *, char const *, int);
int strlen(char const *);
int getInfo(char *buf, int bufLen) {
  static const char *INFO = "info { name=Osc }";
  int reqLen = strlen(INFO) + 1;
  if (buf != 0 && reqLen <= bufLen) {
    memcpy(buf, INFO, reqLen);
  }
  return reqLen;
}


x86 assembly (clang, -O0):
<getInfo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2efa(%rip),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     116b <getInfo+0x4b>
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     116b <getInfo+0x4b>
mov    -0x8(%rbp),%rdi
mov    0x2ecd(%rip),%rsi
mov    -0x10(%rbp),%edx
call   1040 <memcpy@plt>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getInfo>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%r14d
mov    %rdi,%rbx
lea    0xecf(%rip),%rdi
call   1030 <strlen@plt>
lea    0x1(%rax),%ebp
test   %rbx,%rbx
je     1154 <getInfo+0x34>
cmp    %r14d,%eax
jge    1154 <getInfo+0x34>
lea    0xeb6(%rip),%rsi
mov    %rbx,%rdi
mov    %ebp,%edx
call   1040 <memcpy@plt>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@getInfo.INFO = internal global i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i32 0, i32 0)
@.str = [18 x i8] c"info { name=Osc }\00"
define i32 @getInfo(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** @getInfo.INFO
%7 = call i32 @strlen(i8* %6)
%8 = add nsw i32 %7, 1
store i32 %8, i32* %5
%9 = load i8*, i8** %3
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %20
11: ; preds = %2
%12 = load i32, i32* %5
%13 = load i32, i32* %4
%14 = icmp sle i32 %12, %13
br i1 %14, label %15, label %20
15: ; preds = %11
%16 = load i8*, i8** %3
%17 = load i8*, i8** @getInfo.INFO
%18 = load i32, i32* %5
%19 = call i32 @memcpy(i8* %16, i8* %17, i32 %18)
br label %20
20: ; preds = %15, %11, %2
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
@.str = [18 x i8] c"info { name=Osc }\00"
define i32 @getInfo(i8* %0, i32 %1) {
%3 = tail call i32 @strlen(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%4 = add nsw i32 %3, 1
%5 = icmp ne i8* %0, null
%6 = icmp slt i32 %3, %1
%7 = select i1 %5, i1 %6, i1 false
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = tail call i32 @memcpy(i8* %0, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i32 %4)
br label %10
10: ; preds = %8, %2
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ pmu_reg_write(int, int);
int /*<<< orphan*/ pmu_set_active_clk(int, int, int, int);
int /*<<< orphan*/ pmu_set_adc_period(int);
int /*<<< orphan*/ pmu_set_sar_override(int);
int /*<<< orphan*/ pmu_set_sleep_clk(int, int, int, int);
void pmu_set_clk_init() {
  pmu_set_active_clk(0xF, 0x1, 0x10, 0x2);
  pmu_set_sleep_clk(0xF, 0x0, 0x1, 0x1);
  pmu_reg_write(0x05, ((0 << 13) | (0 << 12) | (1 << 11) | (0 << 10) |
                       (0 << 9) | (0 << 8) | (0 << 7) | (0x45)));
  pmu_set_sar_override(0x3C);
  pmu_set_adc_period(1);
}


x86 assembly (clang, -O0):
<pmu_set_clk_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf,%edi
mov    $0x1,%esi
mov    $0x10,%edx
mov    $0x2,%ecx
call   1040 <pmu_set_active_clk@plt>
mov    $0xf,%edi
xor    %esi,%esi
mov    $0x1,%ecx
mov    %ecx,%edx
call   1030 <pmu_set_sleep_clk@plt>
mov    $0x5,%edi
mov    $0x845,%esi
call   1050 <pmu_reg_write@plt>
mov    $0x3c,%edi
call   1060 <pmu_set_sar_override@plt>
mov    $0x1,%edi
call   1070 <pmu_set_adc_period@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_set_clk_init>:
push   %rax
mov    $0xf,%edi
mov    $0x1,%esi
mov    $0x10,%edx
mov    $0x2,%ecx
call   1040 <pmu_set_active_clk@plt>
mov    $0xf,%edi
xor    %esi,%esi
mov    $0x1,%edx
mov    $0x1,%ecx
call   1030 <pmu_set_sleep_clk@plt>
mov    $0x5,%edi
mov    $0x845,%esi
call   1050 <pmu_reg_write@plt>
mov    $0x3c,%edi
call   1060 <pmu_set_sar_override@plt>
mov    $0x1,%edi
pop    %rax
jmp    1070 <pmu_set_adc_period@plt>

LLVM IR (-O0):
define void @pmu_set_clk_init() {
%1 = call i32 @pmu_set_active_clk(i32 15, i32 1, i32 16, i32 2)
%2 = call i32 @pmu_set_sleep_clk(i32 15, i32 0, i32 1, i32 1)
%3 = call i32 @pmu_reg_write(i32 5, i32 2117)
%4 = call i32 @pmu_set_sar_override(i32 60)
%5 = call i32 @pmu_set_adc_period(i32 1)
ret void
}

LLVM IR (-O2):
define void @pmu_set_clk_init() {
%1 = tail call i32 @pmu_set_active_clk(i32 15, i32 1, i32 16, i32 2)
%2 = tail call i32 @pmu_set_sleep_clk(i32 15, i32 0, i32 1, i32 1)
%3 = tail call i32 @pmu_reg_write(i32 5, i32 2117)
%4 = tail call i32 @pmu_set_sar_override(i32 60)
%5 = tail call i32 @pmu_set_adc_period(i32 1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ invalid_phase(char *);
void phase_1(char *input) { invalid_phase("1b"); }


x86 assembly (clang, -O0):
<phase_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <invalid_phase@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<phase_1>:
lea    0xee9(%rip),%rdi
jmp    1030 <invalid_phase@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"1b\00"
define void @phase_1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @invalid_phase(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"1b\00"
define void @phase_1(i8* nocapture readnone %0) {
%2 = tail call i32 @invalid_phase(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cd_mat_vec_fprintf(int /*<<< orphan*/, char const *,
                                      double const *, int, int /*<<< orphan*/,
                                      int /*<<< orphan*/, int /*<<< orphan*/,
                                      int /*<<< orphan*/, int /*<<< orphan*/);
int cd_mat_vec_print(const char *prefix, const double *a, int n) {
  cd_mat_vec_fprintf(0, prefix, a, n, 0, 0, 0, 0, 0);
  return 0;
}


x86 assembly (clang, -O0):
<cd_mat_vec_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
xor    %r9d,%r9d
mov    %r9d,%edi
mov    %r9d,%r8d
movl   $0x0,(%rsp)
movl   $0x0,0x8(%rsp)
movl   $0x0,0x10(%rsp)
call   1030 <cd_mat_vec_fprintf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cd_mat_vec_print>:
push   %rax
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %rdi,%rsi
sub    $0x8,%rsp
xor    %edi,%edi
xor    %r8d,%r8d
xor    %r9d,%r9d
push   $0x0
push   $0x0
push   $0x0
call   1030 <cd_mat_vec_fprintf@plt>
add    $0x20,%rsp
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cd_mat_vec_print(i8* %0, double* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca double*
%6 = alloca i32
store i8* %0, i8** %4
store double* %1, double** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load double*, double** %5
%9 = load i32, i32* %6
%10 = call i32 @cd_mat_vec_fprintf(i32 0, i8* %7, double* %8, i32 %9, i32 0, i32 0, i32 0, i32 0, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @cd_mat_vec_print(i8* %0, double* %1, i32 %2) {
%4 = tail call i32 @cd_mat_vec_fprintf(i32 0, i8* %0, double* %1, i32 %2, i32 0, i32 0, i32 0, i32 0, i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ _hmt_register_covercase(char *, char *);
void _hmt_covercase_HMM_NLerp_init(void) {
  _hmt_register_covercase("HMM_NLerp", "1");
}


x86 assembly (clang, -O0):
<_hmt_covercase_HMM_NLerp_init>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xee8(%rip),%rsi
call   1030 <_hmt_register_covercase@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_hmt_covercase_HMM_NLerp_init>:
lea    0xee9(%rip),%rdi
lea    0xeec(%rip),%rsi
jmp    1030 <_hmt_register_covercase@plt>

LLVM IR (-O0):
@.str = [10 x i8] c"HMM_NLerp\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_NLerp_init() {
%1 = call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [10 x i8] c"HMM_NLerp\00"
@.str.1 = [2 x i8] c"1\00"
define void @_hmt_covercase_HMM_NLerp_init() {
%1 = tail call i32 @_hmt_register_covercase(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ PORTA_DriverIRQHandler();
__attribute__((weak)) void PORTA_IRQHandler(void) { PORTA_DriverIRQHandler(); }


x86 assembly (clang, -O0):
<PORTA_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <PORTA_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PORTA_IRQHandler>:
xor    %eax,%eax
jmp    1030 <PORTA_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @PORTA_IRQHandler() {
%1 = call i32 (...) @PORTA_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @PORTA_IRQHandler() {
%1 = tail call i32 (...) @PORTA_DriverIRQHandler()
ret void
}
void test_strlcat(void) {}


x86 assembly (clang, -O0):
<test_strlcat>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_strlcat>:
ret

LLVM IR (-O0):
define void @test_strlcat() {
ret void
}

LLVM IR (-O2):
define void @test_strlcat() {
ret void
}
/* Variables and functions */
unsigned char const *Z_NULL;
unsigned long crc32(unsigned long, unsigned char const *, unsigned int);
unsigned long grfio_crc32(const unsigned char *buf, unsigned int len) {
  return crc32(crc32(0L, Z_NULL, 0), buf, len);
}


x86 assembly (clang, -O0):
<grfio_crc32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%rsi
xor    %eax,%eax
mov    %eax,%edi
xor    %edx,%edx
call   1030 <crc32@plt>
mov    %rax,%rdi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <crc32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<grfio_crc32>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
mov    0x2ec1(%rip),%rax
mov    (%rax),%rsi
xor    %edi,%edi
xor    %edx,%edx
call   1030 <crc32@plt>
mov    %rax,%rdi
mov    %rbx,%rsi
mov    %ebp,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <crc32@plt>

LLVM IR (-O0):
@Z_NULL = global i8* null
define i64 @grfio_crc32(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** @Z_NULL
%6 = call i64 @crc32(i64 0, i8* %5, i32 0)
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = call i64 @crc32(i64 %6, i8* %7, i32 %8)
ret i64 %9
}

LLVM IR (-O2):
@Z_NULL = global i8* null
define i64 @grfio_crc32(i8* %0, i32 %1) {
%3 = load i8*, i8** @Z_NULL
%4 = tail call i64 @crc32(i64 0, i8* %3, i32 0)
%5 = tail call i64 @crc32(i64 %4, i8* %0, i32 %1)
ret i64 %5
}