#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int /*<<< orphan*/ IntEnable(unsigned long);
int /*<<< orphan*/ IntRegister(unsigned long, void (*)());
void TimerIntRegister(unsigned long ulBase, unsigned long ulTimer,
                      void (*pfnHandler)(void)) {
  ;

  ;
  ulBase =
      ((ulBase == 0x40030000)
           ? 35
           : ((ulBase == 0x40031000) ? 37
                                     : ((ulBase == 0x40032000) ? 39 : 51)));
  if (ulTimer & 0x000000ff) {
    IntRegister(ulBase, pfnHandler);
    IntEnable(ulBase);
  }
  if (ulTimer & 0x0000ff00) {
    IntRegister(ulBase + 1, pfnHandler);
    IntEnable(ulBase + 1);
  }
}


x86 assembly (clang, -O0):
<TimerIntRegister>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x40030000,-0x8(%rbp)
40
jne    114f <TimerIntRegister+0x2f>
mov    $0x23,%eax
mov    %eax,-0x1c(%rbp)
jmp    118b <TimerIntRegister+0x6b>
cmpq   $0x40031000,-0x8(%rbp)
40
jne    116a <TimerIntRegister+0x4a>
mov    $0x25,%eax
mov    %eax,-0x20(%rbp)
jmp    1185 <TimerIntRegister+0x65>
mov    -0x8(%rbp),%rdx
mov    $0x33,%eax
mov    $0x27,%ecx
cmp    $0x40032000,%rdx
cmove  %ecx,%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cltq
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
and    $0xff,%rax
cmp    $0x0,%rax
je     11be <TimerIntRegister+0x9e>
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <IntRegister@plt>
mov    -0x8(%rbp),%rdi
call   1030 <IntEnable@plt>
mov    -0x10(%rbp),%rax
and    $0xff00,%rax
cmp    $0x0,%rax
je     11f0 <TimerIntRegister+0xd0>
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
mov    -0x18(%rbp),%rsi
call   1040 <IntRegister@plt>
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
call   1030 <IntEnable@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerIntRegister>:
push   %r15
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %rsi,%r15
cmp    $0x40030000,%rdi
je     1149 <TimerIntRegister+0x29>
cmp    $0x40031000,%rdi
jne    1155 <TimerIntRegister+0x35>
mov    $0x25,%ebx
test   %r15b,%r15b
jne    116f <TimerIntRegister+0x4f>
jmp    1182 <TimerIntRegister+0x62>
mov    $0x23,%ebx
test   %r15b,%r15b
jne    116f <TimerIntRegister+0x4f>
jmp    1182 <TimerIntRegister+0x62>
cmp    $0x40032000,%rdi
mov    $0x27,%eax
mov    $0x33,%ebx
cmove  %rax,%rbx
test   %r15b,%r15b
je     1182 <TimerIntRegister+0x62>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <IntRegister@plt>
mov    %rbx,%rdi
call   1030 <IntEnable@plt>
test   $0xff00,%r15d
je     11a7 <TimerIntRegister+0x87>
add    $0x1,%rbx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <IntRegister@plt>
mov    %rbx,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <IntEnable@plt>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @TimerIntRegister(i64 %0, i64 %1, void ()* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca void ()*
store i64 %0, i64* %4
store i64 %1, i64* %5
store void ()* %2, void ()** %6
%7 = load i64, i64* %4
%8 = icmp eq i64 %7, 1073938432
br i1 %8, label %9, label %10
9: ; preds = %3
br label %21
10: ; preds = %3
%11 = load i64, i64* %4
%12 = icmp eq i64 %11, 1073942528
br i1 %12, label %13, label %14
13: ; preds = %10
br label %19
14: ; preds = %10
%15 = load i64, i64* %4
%16 = icmp eq i64 %15, 1073946624
%17 = zext i1 %16 to i64
%18 = select i1 %16, i32 39, i32 51
br label %19
19: ; preds = %14, %13
%20 = phi i32 [ 37, %13 ], [ %18, %14 ]
br label %21
21: ; preds = %19, %9
%22 = phi i32 [ 35, %9 ], [ %20, %19 ]
%23 = sext i32 %22 to i64
store i64 %23, i64* %4
%24 = load i64, i64* %5
%25 = and i64 %24, 255
%26 = icmp ne i64 %25, 0
br i1 %26, label %27, label %34
27: ; preds = %21
%28 = load i64, i64* %4
%29 = load void ()*, void ()** %6
%30 = bitcast void ()* %29 to void (...)*
%31 = call i32 @IntRegister(i64 %28, void (...)* %30)
%32 = load i64, i64* %4
%33 = call i32 @IntEnable(i64 %32)
br label %34
34: ; preds = %27, %21
%35 = load i64, i64* %5
%36 = and i64 %35, 65280
%37 = icmp ne i64 %36, 0
br i1 %37, label %38, label %47
38: ; preds = %34
%39 = load i64, i64* %4
%40 = add i64 %39, 1
%41 = load void ()*, void ()** %6
%42 = bitcast void ()* %41 to void (...)*
%43 = call i32 @IntRegister(i64 %40, void (...)* %42)
%44 = load i64, i64* %4
%45 = add i64 %44, 1
%46 = call i32 @IntEnable(i64 %45)
br label %47
47: ; preds = %38, %34
ret void
}

LLVM IR (-O2):
define void @TimerIntRegister(i64 %0, i64 %1, void ()* %2) {
switch i64 %0, label %4 [
i64 1073938432, label %8
i64 1073942528, label %7
]
4: ; preds = %3
%5 = icmp eq i64 %0, 1073946624
%6 = select i1 %5, i64 39, i64 51
br label %8
7: ; preds = %3
br label %8
8: ; preds = %3, %7, %4
%9 = phi i64 [ 35, %3 ], [ %6, %4 ], [ 37, %7 ]
%10 = and i64 %1, 255
%11 = icmp eq i64 %10, 0
br i1 %11, label %16, label %12
12: ; preds = %8
%13 = bitcast void ()* %2 to void (...)*
%14 = tail call i32 @IntRegister(i64 %9, void (...)* %13)
%15 = tail call i32 @IntEnable(i64 %9)
br label %16
16: ; preds = %12, %8
%17 = and i64 %1, 65280
%18 = icmp eq i64 %17, 0
br i1 %18, label %24, label %19
19: ; preds = %16
%20 = add nuw nsw i64 %9, 1
%21 = bitcast void ()* %2 to void (...)*
%22 = tail call i32 @IntRegister(i64 %20, void (...)* %21)
%23 = tail call i32 @IntEnable(i64 %20)
br label %24
24: ; preds = %19, %16
ret void
}