void PECIConfigGet(unsigned long ulBase, unsigned long ulPECIClk,
                   unsigned long *pulBaud, unsigned long *pulPoll,
                   unsigned long *pulOffset, unsigned long *pulRetry) {
  unsigned long ulTemp;
  ;
  ;
  ;
  ;
  ;
  ;
  ulTemp = (*((volatile unsigned long *)(ulBase + 0x00000000)));
  *pulOffset = ((ulTemp & 0xFFFF0000) >> 16);
  *pulRetry = ((ulTemp & 0x00007000) >> 12);
  ulTemp = (*((volatile unsigned long *)(ulBase + 0x00000004)));
  *pulBaud = (ulPECIClk / (4 * ((ulTemp & 0xFFFF0000) >> 16)));
  *pulPoll = ((((ulTemp & 0x0000FFFF) >> 0) * 1000) / (ulPECIClk / 4096));
}


x86 assembly (clang, -O0):
<PECIConfigGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x38(%rbp)
movabs $0xffff0000,%rcx
and    -0x38(%rbp),%rcx
shr    $0x10,%rcx
mov    -0x28(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x38(%rbp),%rcx
and    $0x7000,%rcx
shr    $0xc,%rcx
mov    -0x30(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rax
mov    %rax,-0x38(%rbp)
mov    -0x10(%rbp),%rax
movabs $0xffff0000,%rcx
and    -0x38(%rbp),%rcx
shr    $0x10,%rcx
shl    $0x2,%rcx
xor    %edx,%edx
div    %rcx
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x38(%rbp),%rax
and    $0xffff,%rax
shr    $0x0,%rax
imul   $0x3e8,%rax,%rax
mov    -0x10(%rbp),%rcx
shr    $0xc,%rcx
xor    %edx,%edx
div    %rcx
mov    %rax,%rcx
mov    -0x20(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<PECIConfigGet>:
mov    %rdx,%r10
mov    (%rdi),%rax
mov    %eax,%edx
shr    $0x10,%edx
mov    %rdx,(%r8)
shr    $0xc,%eax
and    $0x7,%eax
mov    %rax,(%r9)
mov    0x4(%rdi),%r8
mov    %r8,%rdi
shr    $0xe,%rdi
and    $0x3fffc,%edi
mov    %rsi,%rax
shr    $0x20,%rax
je     113b <PECIConfigGet+0x3b>
mov    %rsi,%rax
xor    %edx,%edx
div    %rdi
jmp    1141 <PECIConfigGet+0x41>
mov    %esi,%eax
xor    %edx,%edx
div    %edi
mov    %rax,(%r10)
movzwl %r8w,%eax
imul   $0x3e8,%rax,%rax
shr    $0xc,%rsi
cmp    %rsi,%rax
jb     1160 <PECIConfigGet+0x60>
xor    %edx,%edx
div    %esi
mov    %rax,(%rcx)
ret
xor    %eax,%eax
mov    %rax,(%rcx)
ret

LLVM IR (-O0):
define void @PECIConfigGet(i64 %0, i64 %1, i64* %2, i64* %3, i64* %4, i64* %5) {
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64*
%10 = alloca i64*
%11 = alloca i64*
%12 = alloca i64*
%13 = alloca i64
store i64 %0, i64* %7
store i64 %1, i64* %8
store i64* %2, i64** %9
store i64* %3, i64** %10
store i64* %4, i64** %11
store i64* %5, i64** %12
%14 = load i64, i64* %7
%15 = add i64 %14, 0
%16 = inttoptr i64 %15 to i64*
%17 = load volatile i64, i64* %16
store i64 %17, i64* %13
%18 = load i64, i64* %13
%19 = and i64 %18, 4294901760
%20 = lshr i64 %19, 16
%21 = load i64*, i64** %11
store i64 %20, i64* %21
%22 = load i64, i64* %13
%23 = and i64 %22, 28672
%24 = lshr i64 %23, 12
%25 = load i64*, i64** %12
store i64 %24, i64* %25
%26 = load i64, i64* %7
%27 = add i64 %26, 4
%28 = inttoptr i64 %27 to i64*
%29 = load volatile i64, i64* %28
store i64 %29, i64* %13
%30 = load i64, i64* %8
%31 = load i64, i64* %13
%32 = and i64 %31, 4294901760
%33 = lshr i64 %32, 16
%34 = mul i64 4, %33
%35 = udiv i64 %30, %34
%36 = load i64*, i64** %9
store i64 %35, i64* %36
%37 = load i64, i64* %13
%38 = and i64 %37, 65535
%39 = lshr i64 %38, 0
%40 = mul i64 %39, 1000
%41 = load i64, i64* %8
%42 = udiv i64 %41, 4096
%43 = udiv i64 %40, %42
%44 = load i64*, i64** %10
store i64 %43, i64* %44
ret void
}

LLVM IR (-O2):
define void @PECIConfigGet(i64 %0, i64 %1, i64* nocapture writeonly %2, i64* nocapture writeonly %3, i64* nocapture writeonly %4, i64* nocapture writeonly %5) {
%7 = inttoptr i64 %0 to i64*
%8 = load volatile i64, i64* %7
%9 = lshr i64 %8, 16
%10 = and i64 %9, 65535
store i64 %10, i64* %4
%11 = lshr i64 %8, 12
%12 = and i64 %11, 7
store i64 %12, i64* %5
%13 = add i64 %0, 4
%14 = inttoptr i64 %13 to i64*
%15 = load volatile i64, i64* %14
%16 = lshr i64 %15, 14
%17 = and i64 %16, 262140
%18 = udiv i64 %1, %17
store i64 %18, i64* %2
%19 = and i64 %15, 65535
%20 = mul nuw nsw i64 %19, 1000
%21 = lshr i64 %1, 12
%22 = udiv i64 %20, %21
store i64 %22, i64* %3
ret void
}