xunge/DecIR huggingface dataset:
/* Variables and functions */
int bit_diff(int, int);
int test_diff() {
  return 1 == bit_diff(0b1001, 0b1000) && 2 == bit_diff(0b1001, 0b0101) &&
         3 == bit_diff(0b1001, 0b0100) && 4 == bit_diff(0b1001, 0b0110);
}


x86 assembly (clang, -O0):
<test_diff>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x9,%edi
mov    $0x8,%esi
call   1030 <bit_diff@plt>
mov    %eax,%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    %edx,%ecx
mov    %al,-0x1(%rbp)
jne    119f <test_diff+0x8f>
mov    $0x9,%edi
mov    $0x5,%esi
call   1030 <bit_diff@plt>
mov    %eax,%edx
xor    %eax,%eax
mov    $0x2,%ecx
cmp    %edx,%ecx
mov    %al,-0x1(%rbp)
jne    119f <test_diff+0x8f>
mov    $0x9,%edi
mov    $0x4,%esi
call   1030 <bit_diff@plt>
mov    %eax,%edx
xor    %eax,%eax
mov    $0x3,%ecx
cmp    %edx,%ecx
mov    %al,-0x1(%rbp)
jne    119f <test_diff+0x8f>
mov    $0x9,%edi
mov    $0x6,%esi
call   1030 <bit_diff@plt>
mov    %eax,%ecx
mov    $0x4,%eax
cmp    %ecx,%eax
sete   %al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_diff>:
push   %rbx
mov    $0x9,%edi
mov    $0x8,%esi
call   1030 <bit_diff@plt>
xor    %ebx,%ebx
cmp    $0x1,%eax
jne    1166 <test_diff+0x56>
mov    $0x9,%edi
mov    $0x5,%esi
call   1030 <bit_diff@plt>
cmp    $0x2,%eax
jne    1166 <test_diff+0x56>
mov    $0x9,%edi
mov    $0x4,%esi
call   1030 <bit_diff@plt>
cmp    $0x3,%eax
jne    1166 <test_diff+0x56>
mov    $0x9,%edi
mov    $0x6,%esi
call   1030 <bit_diff@plt>
xor    %ebx,%ebx
cmp    $0x4,%eax
sete   %bl
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @test_diff() {
%1 = call i32 @bit_diff(i32 9, i32 8)
%2 = icmp eq i32 1, %1
br i1 %2, label %3, label %12
3: ; preds = %0
%4 = call i32 @bit_diff(i32 9, i32 5)
%5 = icmp eq i32 2, %4
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = call i32 @bit_diff(i32 9, i32 4)
%8 = icmp eq i32 3, %7
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = call i32 @bit_diff(i32 9, i32 6)
%11 = icmp eq i32 4, %10
br label %12
12: ; preds = %9, %6, %3, %0
%13 = phi i1 [ false, %6 ], [ false, %3 ], [ false, %0 ], [ %11, %9 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @test_diff() {
%1 = tail call i32 @bit_diff(i32 9, i32 8)
%2 = icmp eq i32 %1, 1
br i1 %2, label %3, label %13
3: ; preds = %0
%4 = tail call i32 @bit_diff(i32 9, i32 5)
%5 = icmp eq i32 %4, 2
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = tail call i32 @bit_diff(i32 9, i32 4)
%8 = icmp eq i32 %7, 3
br i1 %8, label %9, label %13
9: ; preds = %6
%10 = tail call i32 @bit_diff(i32 9, i32 6)
%11 = icmp eq i32 %10, 4
%12 = zext i1 %11 to i32
br label %13
13: ; preds = %9, %6, %3, %0
%14 = phi i32 [ 0, %6 ], [ 0, %3 ], [ 0, %0 ], [ %12, %9 ]
ret i32 %14
}
unsigned long insert_tbr(insn, value, errmsg)
unsigned long insn;
long value;
const char **errmsg;
{
  if (value == 0)
    value = (268);
  return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6);
}


x86 assembly (clang, -O0):
<insert_tbr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1123 <insert_tbr+0x23>
movq   $0x10c,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
and    $0x1f,%rcx
shl    $0x10,%rcx
or     %rcx,%rax
mov    -0x10(%rbp),%rcx
and    $0x3e0,%rcx
shl    $0x6,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<insert_tbr>:
test   %rsi,%rsi
mov    $0x10c,%eax
cmovne %esi,%eax
mov    %eax,%ecx
and    $0x1f,%ecx
shl    $0x10,%rcx
or     %rdi,%rcx
shl    $0x6,%eax
and    $0xf800,%eax
or     %rcx,%rax
ret

LLVM IR (-O0):
define i64 @insert_tbr(i64 %0, i64 %1, i8** %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8**
store i64 %0, i64* %4
store i64 %1, i64* %5
store i8** %2, i8*** %6
%7 = load i64, i64* %5
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %3
store i64 268, i64* %5
br label %10
10: ; preds = %9, %3
%11 = load i64, i64* %4
%12 = load i64, i64* %5
%13 = and i64 %12, 31
%14 = shl i64 %13, 16
%15 = or i64 %11, %14
%16 = load i64, i64* %5
%17 = and i64 %16, 992
%18 = shl i64 %17, 6
%19 = or i64 %15, %18
ret i64 %19
}

LLVM IR (-O2):
define i64 @insert_tbr(i64 %0, i64 %1, i8** nocapture readnone %2) {
%4 = icmp eq i64 %1, 0
%5 = select i1 %4, i64 268, i64 %1
%6 = shl i64 %5, 16
%7 = and i64 %6, 2031616
%8 = or i64 %7, %0
%9 = shl i64 %5, 6
%10 = and i64 %9, 63488
%11 = or i64 %8, %10
ret i64 %11
}
/* Variables and functions */
int /*<<< orphan*/ atanh(int);
double erf(int /*<<< orphan*/);
int fabs(double);
scalar_t__ floor(double);
double trih(double phase) {
  phase -= floor(phase + 0.5);
  return erf(atanh(4 * fabs(phase) - 1.0));
}


x86 assembly (clang, -O0):
<trih>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeb3(%rip),%xmm0
addsd  -0x8(%rbp),%xmm0
call   1060 <floor@plt>
cvtsi2sd %rax,%xmm1
movsd  -0x8(%rbp),%xmm0
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1040 <fabs@plt>
shl    $0x2,%eax
cvtsi2sd %eax,%xmm0
movsd  0xe75(%rip),%xmm1
subsd  %xmm1,%xmm0
cvttsd2si %xmm0,%edi
call   1030 <atanh@plt>
mov    %eax,%edi
call   1050 <erf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trih>:
push   %rax
movapd %xmm0,%xmm1
movsd  %xmm0,(%rsp)
movsd  0xeae(%rip),%xmm0
addsd  %xmm1,%xmm0
call   1060 <floor@plt>
xorps  %xmm1,%xmm1
cvtsi2sd %rax,%xmm1
movsd  (%rsp),%xmm0
subsd  %xmm1,%xmm0
call   1040 <fabs@plt>
lea    -0x1(,%rax,4),%edi
call   1030 <atanh@plt>
mov    %eax,%edi
pop    %rax
jmp    1050 <erf@plt>

LLVM IR (-O0):
define double @trih(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fadd double %3, 5.000000e-01
%5 = call i64 @floor(double %4)
%6 = sitofp i64 %5 to double
%7 = load double, double* %2
%8 = fsub double %7, %6
store double %8, double* %2
%9 = load double, double* %2
%10 = call i32 @fabs(double %9)
%11 = mul nsw i32 4, %10
%12 = sitofp i32 %11 to double
%13 = fsub double %12, 1.000000e+00
%14 = fptosi double %13 to i32
%15 = call i32 @atanh(i32 %14)
%16 = call double @erf(i32 %15)
ret double %16
}

LLVM IR (-O2):
define double @trih(double %0) {
%2 = fadd double %0, 5.000000e-01
%3 = tail call i64 @floor(double %2)
%4 = sitofp i64 %3 to double
%5 = fsub double %0, %4
%6 = tail call i32 @fabs(double %5)
%7 = shl nsw i32 %6, 2
%8 = add i32 %7, -1
%9 = tail call i32 @atanh(i32 %8)
%10 = tail call double @erf(i32 %9)
ret double %10
}
/* Variables and functions */
char *LCLstrcpy(char *, char *);
char *test1(char *p1) {
  p1 = LCLstrcpy(p1, "bob");
  return p1;
}


x86 assembly (clang, -O0):
<test1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <LCLstrcpy@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test1>:
lea    0xee9(%rip),%rsi
jmp    1030 <LCLstrcpy@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"bob\00"
define i8* @test1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @LCLstrcpy(i8* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
@.str = [4 x i8] c"bob\00"
define i8* @test1(i8* %0) {
%2 = tail call i8* @LCLstrcpy(i8* %0, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
ret i8* %2
}
int test_imm_43uint32_reg(unsigned int val) {
  return ((val) & (0x43 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_43uint32_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
and    $0x43,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_43uint32_reg>:
test   $0x43,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_43uint32_reg(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 67
%5 = icmp ne i32 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_43uint32_reg(i32 %0) {
%2 = and i32 %0, 67
%3 = icmp eq i32 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int gen_conncmp(void *, void *, int);
int osconncmp(void *o1, void *o2) { return gen_conncmp(o1, o2, 1); }


x86 assembly (clang, -O0):
<osconncmp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <gen_conncmp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<osconncmp>:
mov    $0x1,%edx
jmp    1030 <gen_conncmp@plt>

LLVM IR (-O0):
define i32 @osconncmp(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @gen_conncmp(i8* %5, i8* %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
define i32 @osconncmp(i8* %0, i8* %1) {
%3 = tail call i32 @gen_conncmp(i8* %0, i8* %1, i32 1)
ret i32 %3
}
/* Variables and functions */
scalar_t__ __ompc_task_create_cond();
int __ompc_task_will_defer(int may_delay) {
  return may_delay && __ompc_task_create_cond();
}


x86 assembly (clang, -O0):
<__ompc_task_will_defer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113b <__ompc_task_will_defer+0x2b>
mov    $0x0,%al
call   1030 <__ompc_task_create_cond@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ompc_task_will_defer>:
test   %edi,%edi
je     112c <__ompc_task_will_defer+0x1c>
push   %rax
xor    %eax,%eax
call   1030 <__ompc_task_create_cond@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__ompc_task_will_defer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = call i64 (...) @__ompc_task_create_cond()
%7 = icmp ne i64 %6, 0
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @__ompc_task_will_defer(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = tail call i64 (...) @__ompc_task_create_cond()
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
char *sqlite3MallocRaw(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char const *);
scalar_t__ strlen(char const *);
char *sqlite3StrDup(const char *z) {
  char *zNew;
  if (z == 0)
    return 0;
  zNew = sqlite3MallocRaw(strlen(z) + 1);
  if (zNew)
    strcpy(zNew, z);
  return zNew;
}


x86 assembly (clang, -O0):
<sqlite3StrDup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1154 <sqlite3StrDup+0x24>
movq   $0x0,-0x8(%rbp)
jmp    118d <sqlite3StrDup+0x5d>
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1050 <sqlite3MallocRaw@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1185 <sqlite3StrDup+0x55>
mov    -0x18(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcpy@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sqlite3StrDup>:
push   %r14
push   %rbx
push   %rax
test   %rdi,%rdi
je     115f <sqlite3StrDup+0x2f>
mov    %rdi,%r14
call   1040 <strlen@plt>
lea    0x1(%rax),%rdi
call   1050 <sqlite3MallocRaw@plt>
test   %rax,%rax
je     115f <sqlite3StrDup+0x2f>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1030 <strcpy@plt>
jmp    1161 <sqlite3StrDup+0x31>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @sqlite3StrDup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %8
7: ; preds = %1
store i8* null, i8** %2
br label %21
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = call i64 @strlen(i8* %9)
%11 = add nsw i64 %10, 1
%12 = call i8* @sqlite3MallocRaw(i64 %11)
store i8* %12, i8** %4
%13 = load i8*, i8** %4
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %19
15: ; preds = %8
%16 = load i8*, i8** %4
%17 = load i8*, i8** %3
%18 = call i32 @strcpy(i8* %16, i8* %17)
br label %19
19: ; preds = %15, %8
%20 = load i8*, i8** %4
store i8* %20, i8** %2
br label %21
21: ; preds = %19, %7
%22 = load i8*, i8** %2
ret i8* %22
}

LLVM IR (-O2):
define i8* @sqlite3StrDup(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %10, label %3
3: ; preds = %1
%4 = tail call i64 @strlen(i8* %0)
%5 = add nsw i64 %4, 1
%6 = tail call i8* @sqlite3MallocRaw(i64 %5)
%7 = icmp eq i8* %6, null
br i1 %7, label %10, label %8
8: ; preds = %3
%9 = tail call i32 @strcpy(i8* %6, i8* %0)
br label %10
10: ; preds = %3, %8, %1
%11 = phi i8* [ null, %1 ], [ %6, %8 ], [ null, %3 ]
ret i8* %11
}
int fib(int x) { return x < 2 ? 1 : fib(x - 1) + fib(x - 2); }


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x2,-0x4(%rbp)
jge    1132 <fib+0x22>
mov    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1155 <fib+0x45>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x2,%edi
jl     1145 <fib+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fib@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x3,%ebx
ja     1130 <fib+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 2
br i1 %4, label %5, label %6
5: ; preds = %1
br label %14
6: ; preds = %1
%7 = load i32, i32* %2
%8 = sub nsw i32 %7, 1
%9 = call i32 @fib(i32 %8)
%10 = load i32, i32* %2
%11 = sub nsw i32 %10, 2
%12 = call i32 @fib(i32 %11)
%13 = add nsw i32 %9, %12
br label %14
14: ; preds = %6, %5
%15 = phi i32 [ 1, %5 ], [ %13, %6 ]
ret i32 %15
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ fat(int);
int /*<<< orphan*/ printf(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n = 0;
  scanf("%d", &n);
  printf("Fatorial de %d, é %.0lf\n", n, fat(n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
lea    0xeb3(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1040 <scanf@plt>
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1050 <fat@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%edx
lea    0xe93(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x10,%rsp
movl   $0x0,0xc(%rsp)
lea    0xebc(%rip),%rdi
lea    0xc(%rsp),%rsi
call   1040 <scanf@plt>
mov    0xc(%rsp),%ebx
mov    %ebx,%edi
call   1050 <fat@plt>
lea    0xea3(%rip),%rdi
mov    %ebx,%esi
mov    %eax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [26 x i8] c"Fatorial de %d, \C3\A9 %.0lf\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 0, i32* %2
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = load i32, i32* %2
%6 = call i32 @fat(i32 %5)
%7 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i32 %4, i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [26 x i8] c"Fatorial de %d, \C3\A9 %.0lf\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @fat(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0), i32 %4, i32 %5)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int strlen(char const *);
int countDigits(const char *person) {
  int count = 0;
  for (int i = 0; i < strlen(person); i++) {
    count++;
    printf("count %d\n", count);
  }
  return count;
}


x86 assembly (clang, -O0):
<countDigits>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x14(%rbp),%eax
cmp    %ecx,%eax
jge    117c <countDigits+0x5c>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    0xe97(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    113a <countDigits+0x1a>
mov    -0xc(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<countDigits>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
xor    %ebp,%ebp
test   %eax,%eax
jle    1159 <countDigits+0x39>
lea    0xec7(%rip),%r14
nopl   0x0(%rax)
add    $0x1,%ebp
mov    %r14,%rdi
mov    %ebp,%esi
call   1040 <printf@plt>
mov    %rbx,%rdi
call   1030 <strlen@plt>
cmp    %eax,%ebp
jl     1140 <countDigits+0x20>
mov    %ebp,%eax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
@.str = [10 x i8] c"count %d\0A\00"
define i32 @countDigits(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
%4 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %15, %1
%6 = load i32, i32* %4
%7 = load i8*, i8** %2
%8 = call i32 @strlen(i8* %7)
%9 = icmp slt i32 %6, %8
br i1 %9, label %10, label %18
10: ; preds = %5
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %13)
br label %15
15: ; preds = %10
%16 = load i32, i32* %4
%17 = add nsw i32 %16, 1
store i32 %17, i32* %4
br label %5
18: ; preds = %5
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
@.str = [10 x i8] c"count %d\0A\00"
define i32 @countDigits(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %6, label %4
4: ; preds = %6, %1
%5 = phi i32 [ 0, %1 ], [ %8, %6 ]
ret i32 %5
6: ; preds = %1, %6
%7 = phi i32 [ %8, %6 ], [ 0, %1 ]
%8 = add nuw nsw i32 %7, 1
%9 = tail call i32 @printf(i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i32 %8)
%10 = tail call i32 @strlen(i8* %0)
%11 = icmp slt i32 %8, %10
br i1 %11, label %6, label %4
}
/* Variables and functions */
int /*<<< orphan*/ sdhc_intr();
void sdhc_irq(void) { sdhc_intr(); }


x86 assembly (clang, -O0):
<sdhc_irq>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <sdhc_intr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdhc_irq>:
xor    %eax,%eax
jmp    1030 <sdhc_intr@plt>

LLVM IR (-O0):
define void @sdhc_irq() {
%1 = call i32 (...) @sdhc_intr()
ret void
}

LLVM IR (-O2):
define void @sdhc_irq() {
%1 = tail call i32 (...) @sdhc_intr()
ret void
}
/* Type definitions */
typedef int ulong;

/* Variables and functions */
int lenlen(ulong x) {
  int w;
  w = 1;
  while (x > 0x7f) {
    x >>= 7;
    w++;
  }
  return w;
}


x86 assembly (clang, -O0):
<lenlen>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
cmpl   $0x7f,-0x4(%rbp)
jle    112f <lenlen+0x2f>
mov    -0x4(%rbp),%eax
sar    $0x7,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <lenlen+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lenlen>:
mov    $0x1,%eax
cmp    $0x80,%edi
jl     1130 <lenlen+0x30>
mov    $0x1,%eax
mov    %edi,%ecx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
shr    $0x7,%ecx
add    $0x1,%eax
cmp    $0x3fff,%edi
mov    %ecx,%edi
ja     1120 <lenlen+0x20>
ret

LLVM IR (-O0):
define i32 @lenlen(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp sgt i32 %5, 127
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = ashr i32 %8, 7
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @lenlen(i32 %0) {
%2 = icmp sgt i32 %0, 127
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 1, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = lshr i32 %5, 7
%7 = add nuw nsw i32 %4, 1
%8 = icmp ugt i32 %5, 16383
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %7, %3 ]
ret i32 %10
}
extern unsigned char __inb_p(unsigned short port) {
  unsigned char _v;
  __asm__ __volatile__("in"
                       "b"
                       " %"
                       "w"
                       "1,%"
                       ""
                       "0"
                       : "=a"(_v)
                       : "d"(port));
  __asm__ __volatile__("jmp 1f\n1:\tjmp 1f\n1:");
  return _v;
}


x86 assembly (clang, -O0):
<__inb_p>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    -0x2(%rbp),%dx
in     (%dx),%al
mov    %al,-0x3(%rbp)
jmp    1118 <__inb_p+0x18>
jmp    111d <__inb_p+0x1d>
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__inb_p>:
mov    %edi,%edx
in     (%dx),%al
jmp    1105 <__inb_p+0x5>
jmp    1107 <__inb_p+0x7>
ret

LLVM IR (-O0):
define zeroext i8 @__inb_p(i16 zeroext %0) {
%2 = alloca i16
%3 = alloca i8
store i16 %0, i16* %2
%4 = load i16, i16* %2
%5 = call i8 asm sideeffect "inb ${1:w},$0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %4)
store i8 %5, i8* %3
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @__inb_p(i16 zeroext %0) {
%2 = tail call i8 asm sideeffect "inb ${1:w},$0", "={ax},{dx},~{dirflag},~{fpsr},~{flags}"(i16 %0)
tail call void asm sideeffect "jmp 1f\0A1:\09jmp 1f\0A1:", "~{dirflag},~{fpsr},~{flags}"()
ret i8 %2
}
void foo481() {}


x86 assembly (clang, -O0):
<foo481>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo481>:
ret

LLVM IR (-O0):
define void @foo481() {
ret void
}

LLVM IR (-O2):
define void @foo481() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p448_carry(uintptr_t, uintptr_t);
void fiat_p448_carry(uint64_t out1[8], const uint64_t arg1[8]) {
  internal_fiat_p448_carry((uintptr_t)out1, (uintptr_t)arg1);
}


x86 assembly (clang, -O0):
<fiat_p448_carry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <internal_fiat_p448_carry@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p448_carry>:
jmp    1030 <internal_fiat_p448_carry@plt>

LLVM IR (-O0):
define void @fiat_p448_carry(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = ptrtoint i32* %5 to i64
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i64
%9 = call i32 @internal_fiat_p448_carry(i64 %6, i64 %8)
ret void
}

LLVM IR (-O2):
define void @fiat_p448_carry(i32* %0, i32* %1) {
%3 = ptrtoint i32* %0 to i64
%4 = ptrtoint i32* %1 to i64
%5 = tail call i32 @internal_fiat_p448_carry(i64 %3, i64 %4)
ret void
}
/* Variables and functions */
int rangeBitwiseAnd(int, int);
int fastRangeBitwiseAnd(int m, int n) { return rangeBitwiseAnd(m, n); }


x86 assembly (clang, -O0):
<fastRangeBitwiseAnd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <rangeBitwiseAnd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fastRangeBitwiseAnd>:
jmp    1030 <rangeBitwiseAnd@plt>

LLVM IR (-O0):
define i32 @fastRangeBitwiseAnd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @rangeBitwiseAnd(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @fastRangeBitwiseAnd(i32 %0, i32 %1) {
%3 = tail call i32 @rangeBitwiseAnd(i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(char *);
void Ada_delete_timeval(void *jarg1) {
  struct timeval *arg1 = (struct timeval *)0;
  arg1 = (struct timeval *)jarg1;
  free((char *)arg1);
}


x86 assembly (clang, -O0):
<Ada_delete_timeval>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Ada_delete_timeval>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.timeval = type { i32 }
define void @Ada_delete_timeval(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.timeval*
store i8* %0, i8** %2
store %struct.timeval* null, %struct.timeval** %3
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.timeval*
store %struct.timeval* %5, %struct.timeval** %3
%6 = load %struct.timeval*, %struct.timeval** %3
%7 = bitcast %struct.timeval* %6 to i8*
%8 = call i32 @free(i8* %7)
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
define void @Ada_delete_timeval(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
long _block_size_by_payload(long);
long _payload_size(long);
long round_up_2power(long);
long _normalize_payload_size(long payload_size) {
  long blk_size = _block_size_by_payload(payload_size);
  blk_size = round_up_2power(blk_size);
  return _payload_size(blk_size);
}


x86 assembly (clang, -O0):
<_normalize_payload_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <_block_size_by_payload@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <round_up_2power@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1050 <_payload_size@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_normalize_payload_size>:
push   %rax
call   1030 <_block_size_by_payload@plt>
mov    %rax,%rdi
call   1040 <round_up_2power@plt>
mov    %rax,%rdi
pop    %rax
jmp    1050 <_payload_size@plt>

LLVM IR (-O0):
define i64 @_normalize_payload_size(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i64 @_block_size_by_payload(i64 %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
%7 = call i64 @round_up_2power(i64 %6)
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = call i64 @_payload_size(i64 %8)
ret i64 %9
}

LLVM IR (-O2):
define i64 @_normalize_payload_size(i64 %0) {
%2 = tail call i64 @_block_size_by_payload(i64 %0)
%3 = tail call i64 @round_up_2power(i64 %2)
%4 = tail call i64 @_payload_size(i64 %3)
ret i64 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ gfdiv(int, int /*<<< orphan*/);
uint8_t gfmiv(uint8_t i) { return gfdiv(1, i); }


x86 assembly (clang, -O0):
<gfmiv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x1,%edi
call   1030 <gfdiv@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gfmiv>:
mov    %edi,%esi
mov    $0x1,%edi
jmp    1030 <gfdiv@plt>

LLVM IR (-O0):
define i32 @gfmiv(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @gfdiv(i32 1, i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @gfmiv(i32 %0) {
%2 = tail call i32 @gfdiv(i32 1, i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ _exit(int);
void func(int x, int y) {
  if (x == y)
    return;
  else
    _exit(-1);
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    1130 <func+0x20>
add    $0x10,%rsp
pop    %rbp
ret
mov    $0xffffffff,%edi
call   1030 <_exit@plt>

x86 assembly (clang, -O2):
<func>:
cmp    %esi,%edi
jne    1115 <func+0x5>
ret
push   %rax
mov    $0xffffffff,%edi
call   1030 <_exit@plt>

LLVM IR (-O0):
define void @func(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp eq i32 %5, %6
br i1 %7, label %8, label %9
8: ; preds = %2
ret void
9: ; preds = %2
%10 = call i32 @_exit(i32 -1)
unreachable
}

LLVM IR (-O2):
define void @func(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
br i1 %3, label %4, label %5
4: ; preds = %2
ret void
5: ; preds = %2
%6 = tail call i32 @_exit(i32 -1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ stop();
void Actuator_Stop() { stop(); }


x86 assembly (clang, -O0):
<Actuator_Stop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <stop@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Actuator_Stop>:
xor    %eax,%eax
jmp    1030 <stop@plt>

LLVM IR (-O0):
define void @Actuator_Stop() {
%1 = call i32 (...) @stop()
ret void
}

LLVM IR (-O2):
define void @Actuator_Stop() {
%1 = tail call i32 (...) @stop()
ret void
}
void ff_hevc_put_hevc_epel_h48_8_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_h48_8_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_h48_8_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_h48_8_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_h48_8_avx2() {
ret void
}
int min(a, b)
int a, b;
{
  if (a < b) {
    return (a);
  } else {
    return (b);
  }
}


x86 assembly (clang, -O0):
<min>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1121 <min+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <min+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<min>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @min(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @min(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char, char, char, char);
main() {
  char v;
  char ch = 'a';
  printf("ch=%c  %d  %o %x \n", ch, ch, ch, ch);
  ch = ch - 200;
  printf("ch=%c  %d  %o %x \n", ch, ch, ch, ch);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movb   $0x61,-0x2(%rbp)
mov    -0x2(%rbp),%dl
mov    -0x2(%rbp),%cl
mov    -0x2(%rbp),%al
lea    0xed4(%rip),%rdi
movsbl %dl,%esi
movsbl %cl,%edx
movsbl %al,%ecx
movsbl -0x2(%rbp),%r8d
call   1030 <printf@plt>
movsbl -0x2(%rbp),%eax
sub    $0xc8,%eax
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%dl
mov    -0x2(%rbp),%cl
mov    -0x2(%rbp),%al
lea    0xea5(%rip),%rdi
movsbl %dl,%esi
movsbl %cl,%edx
movsbl %al,%ecx
movsbl -0x2(%rbp),%r8d
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xee8(%rip),%rbx
mov    %rbx,%rdi
mov    $0x61,%esi
mov    $0x61,%edx
mov    $0x61,%ecx
mov    $0x61,%r8d
call   1030 <printf@plt>
mov    %rbx,%rdi
mov    $0xffffff99,%esi
mov    $0xffffff99,%edx
mov    $0xffffff99,%ecx
mov    $0xffffff99,%r8d
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"ch=%c %d %o %x \0A\00"
define i32 @main() {
%1 = alloca i8
%2 = alloca i8
store i8 97, i8* %2
%3 = load i8, i8* %2
%4 = load i8, i8* %2
%5 = load i8, i8* %2
%6 = load i8, i8* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8 signext %3, i8 signext %4, i8 signext %5, i8 signext %6)
%8 = load i8, i8* %2
%9 = sext i8 %8 to i32
%10 = sub nsw i32 %9, 200
%11 = trunc i32 %10 to i8
store i8 %11, i8* %2
%12 = load i8, i8* %2
%13 = load i8, i8* %2
%14 = load i8, i8* %2
%15 = load i8, i8* %2
%16 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8 signext %12, i8 signext %13, i8 signext %14, i8 signext %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"ch=%c %d %o %x \0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8 signext 97, i8 signext 97, i8 signext 97, i8 signext 97)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i8 signext -103, i8 signext -103, i8 signext -103, i8 signext -103)
ret i32 0
}
char ascii2sixbit(char c) {
  static char tab[] = {
      -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,
      -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,  -1,
      -1,  -1,  000, 001, 002, 003, 004, 005, 006, 007, 010, 011, 012, 013, 014,
      015, 016, 017, 020, 021, 022, 023, 024, 025, 026, 027, 030, 031, 032, 033,
      034, 035, 036, 037, 040, 041, 042, 043, 044, 045, 046, 047, 050, 051, 052,
      053, 054, 055, 056, 057, 060, 061, 062, 063, 064, 065, 066, 067, 070, 071,
      072, 073, 074, 075, 076, 077, 040, 041, 042, 043, 044, 045, 046, 047, 050,
      051, 052, 053, 054, 055, 056, 057, 060, 061, 062, 063, 064, 065, 066, 067,
      070, 071, 072, 073, 074, 075, 076, 077,
  };
  return tab[c & 0177];
}


x86 assembly (clang, -O0):
<ascii2sixbit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
and    $0x7f,%eax
movslq %eax,%rcx
lea    0x2f15(%rip),%rax
movsbl (%rax,%rcx,1),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ascii2sixbit>:
and    $0x7f,%edi
lea    0xef6(%rip),%rax
mov    (%rdi,%rax,1),%al
ret

LLVM IR (-O0):
@ascii2sixbit.tab = internal global [128 x i8] c"\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F\10\11\12\13\14\15\16\17\18\19\1A\1B\1C\1D\1E\1F !\22#$%&'()*+,-./0123456789:;<=>? !\22#$%&'()*+,-./0123456789:;<=>?"
define signext i8 @ascii2sixbit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = and i32 %4, 127
%6 = sext i32 %5 to i64
%7 = getelementptr inbounds [128 x i8], [128 x i8]* @ascii2sixbit.tab, i64 0, i64 %6
%8 = load i8, i8* %7
ret i8 %8
}

LLVM IR (-O2):
@ascii2sixbit.tab = internal unnamed_addr constant [128 x i8] c"\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\FF\00\01\02\03\04\05\06\07\08\09\0A\0B\0C\0D\0E\0F\10\11\12\13\14\15\16\17\18\19\1A\1B\1C\1D\1E\1F !\22#$%&'()*+,-./0123456789:;<=>? !\22#$%&'()*+,-./0123456789:;<=>?"
define signext i8 @ascii2sixbit(i8 signext %0) {
%2 = and i8 %0, 127
%3 = zext i8 %2 to i64
%4 = getelementptr inbounds [128 x i8], [128 x i8]* @ascii2sixbit.tab, i64 0, i64 %3
%5 = load i8, i8* %4
ret i8 %5
}
/* Variables and functions */
int EXIT_FAILURE;
int EXIT_SUCCESS;
int /*<<< orphan*/ *strstr(char *, char *);
int url_valid(char *url) {
  if (strstr(url, "..") == NULL) {
    return EXIT_SUCCESS;
  }
  return EXIT_FAILURE;
}


x86 assembly (clang, -O0):
<url_valid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <strstr@plt>
cmp    $0x0,%rax
jne    1147 <url_valid+0x37>
mov    0x2e9b(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    1153 <url_valid+0x43>
mov    0x2e92(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<url_valid>:
push   %rax
lea    0xee8(%rip),%rsi
call   1030 <strstr@plt>
test   %rax,%rax
jne    112b <url_valid+0x1b>
mov    0x2eaf(%rip),%rax
jmp    1132 <url_valid+0x22>
mov    0x2eae(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"..\00"
@EXIT_SUCCESS = global i32 0
@EXIT_FAILURE = global i32 0
define i32 @url_valid(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32* @strstr(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%6 = icmp eq i32* %5, null
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* @EXIT_SUCCESS
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* @EXIT_FAILURE
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@.str = [3 x i8] c"..\00"
@EXIT_SUCCESS = global i32 0
@EXIT_FAILURE = global i32 0
define i32 @url_valid(i8* %0) {
%2 = tail call i32* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%3 = icmp eq i32* %2, null
%4 = load i32, i32* @EXIT_SUCCESS
%5 = load i32, i32* @EXIT_FAILURE
%6 = select i1 %3, i32 %4, i32 %5
ret i32 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint32_t;

/* Variables and functions */
uint32_t read32(const void *addr) { return *(volatile uint32_t *)addr; }


x86 assembly (clang, -O0):
<read32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read32>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read32(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to i32*
%5 = load volatile i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @read32(i8* %0) {
%2 = bitcast i8* %0 to i32*
%3 = load volatile i32, i32* %2
ret i32 %3
}
/* Variables and functions */
unsigned int count_nbr(long);
char *ft_strnew(unsigned int);
int /*<<< orphan*/ make_string(char *, long);
char *ft_stoa(long n) {
  unsigned int nb_nbr;
  char *toa;
  nb_nbr = count_nbr(n);
  toa = ft_strnew(nb_nbr + 1);
  make_string(toa, n);
  return (toa);
}


x86 assembly (clang, -O0):
<ft_stoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <count_nbr@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x1,%edi
call   1040 <ft_strnew@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1050 <make_string@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_stoa>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <count_nbr@plt>
lea    0x1(%rax),%edi
call   1040 <ft_strnew@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1050 <make_string@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @ft_stoa(i64 %0) {
%2 = alloca i64
%3 = alloca i32
%4 = alloca i8*
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = call i32 @count_nbr(i64 %5)
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = add i32 %7, 1
%9 = call i8* @ft_strnew(i32 %8)
store i8* %9, i8** %4
%10 = load i8*, i8** %4
%11 = load i64, i64* %2
%12 = call i32 @make_string(i8* %10, i64 %11)
%13 = load i8*, i8** %4
ret i8* %13
}

LLVM IR (-O2):
define i8* @ft_stoa(i64 %0) {
%2 = tail call i32 @count_nbr(i64 %0)
%3 = add i32 %2, 1
%4 = tail call i8* @ft_strnew(i32 %3)
%5 = tail call i32 @make_string(i8* %4, i64 %0)
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
int /*<<< orphan*/ system(char *);
int x38_setup() {
  char cmd[256];
  sprintf(cmd,
          "iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags "
          "SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d",
          1);
  system(cmd);
  return 0;
}


x86 assembly (clang, -O0):
<x38_setup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    -0x100(%rbp),%rdi
lea    0xec7(%rip),%rsi
mov    $0x1,%edx
call   1040 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x38_setup>:
push   %rbx
sub    $0x100,%rsp
lea    0xed1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x1,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [106 x i8] c"iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x38_setup() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%5 = call i32 @system(i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [106 x i8] c"iptables -A INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x38_setup() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* dereferenceable(1) getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = call i32 @system(i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ PTRACE_TRACEME;
int /*<<< orphan*/ SIGSTOP;
int /*<<< orphan*/ getpid();
int /*<<< orphan*/ kill(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ ptrace(int /*<<< orphan*/, int /*<<< orphan*/,
                          int /*<<< orphan*/ *, int /*<<< orphan*/ *);
void trace_me() {
  ptrace(PTRACE_TRACEME, 0, NULL, NULL);
  kill(getpid(), SIGSTOP);
}


x86 assembly (clang, -O0):
<trace_me>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ea5(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
xor    %eax,%eax
mov    %eax,%ecx
mov    %rcx,%rdx
call   1050 <ptrace@plt>
mov    $0x0,%al
call   1030 <getpid@plt>
mov    %eax,%edi
mov    0x2e7d(%rip),%rax
mov    (%rax),%esi
call   1040 <kill@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace_me>:
push   %rax
mov    0x2ea8(%rip),%rax
mov    (%rax),%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1050 <ptrace@plt>
xor    %eax,%eax
call   1030 <getpid@plt>
mov    0x2e85(%rip),%rcx
mov    (%rcx),%esi
mov    %eax,%edi
pop    %rax
jmp    1040 <kill@plt>

LLVM IR (-O0):
@PTRACE_TRACEME = global i32 0
@SIGSTOP = global i32 0
define void @trace_me() {
%1 = load i32, i32* @PTRACE_TRACEME
%2 = call i32 @ptrace(i32 %1, i32 0, i32* null, i32* null)
%3 = call i32 (...) @getpid()
%4 = load i32, i32* @SIGSTOP
%5 = call i32 @kill(i32 %3, i32 %4)
ret void
}

LLVM IR (-O2):
@PTRACE_TRACEME = global i32 0
@SIGSTOP = global i32 0
define void @trace_me() {
%1 = load i32, i32* @PTRACE_TRACEME
%2 = tail call i32 @ptrace(i32 %1, i32 0, i32* null, i32* null)
%3 = tail call i32 (...) @getpid()
%4 = load i32, i32* @SIGSTOP
%5 = tail call i32 @kill(i32 %3, i32 %4)
ret void
}
/* Type definitions */
struct cx18_stream {
  int dummy;
};
struct cx18_queue {
  int dummy;
};
struct cx18_mdl {
  int dummy;
};

/* Variables and functions */
struct cx18_queue *_cx18_enqueue(struct cx18_stream *, struct cx18_mdl *,
                                 struct cx18_queue *, int /*<<< orphan*/);
struct cx18_queue *cx18_enqueue(struct cx18_stream *s, struct cx18_mdl *mdl,
                                struct cx18_queue *q) {
  return _cx18_enqueue(s, mdl, q, 0);
}


x86 assembly (clang, -O0):
<cx18_enqueue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %ecx,%ecx
call   1030 <_cx18_enqueue@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cx18_enqueue>:
xor    %ecx,%ecx
jmp    1030 <_cx18_enqueue@plt>

LLVM IR (-O0):
%struct.cx18_stream = type { i32 }
%struct.cx18_mdl = type { i32 }
%struct.cx18_queue = type { i32 }
define %struct.cx18_queue* @cx18_enqueue(%struct.cx18_stream* %0, %struct.cx18_mdl* %1, %struct.cx18_queue* %2) {
%4 = alloca %struct.cx18_stream*
%5 = alloca %struct.cx18_mdl*
%6 = alloca %struct.cx18_queue*
store %struct.cx18_stream* %0, %struct.cx18_stream** %4
store %struct.cx18_mdl* %1, %struct.cx18_mdl** %5
store %struct.cx18_queue* %2, %struct.cx18_queue** %6
%7 = load %struct.cx18_stream*, %struct.cx18_stream** %4
%8 = load %struct.cx18_mdl*, %struct.cx18_mdl** %5
%9 = load %struct.cx18_queue*, %struct.cx18_queue** %6
%10 = call %struct.cx18_queue* @_cx18_enqueue(%struct.cx18_stream* %7, %struct.cx18_mdl* %8, %struct.cx18_queue* %9, i32 0)
ret %struct.cx18_queue* %10
}

LLVM IR (-O2):
%struct.cx18_stream = type { i32 }
%struct.cx18_mdl = type { i32 }
%struct.cx18_queue = type { i32 }
define %struct.cx18_queue* @cx18_enqueue(%struct.cx18_stream* %0, %struct.cx18_mdl* %1, %struct.cx18_queue* %2) {
%4 = tail call %struct.cx18_queue* @_cx18_enqueue(%struct.cx18_stream* %0, %struct.cx18_mdl* %1, %struct.cx18_queue* %2, i32 0)
ret %struct.cx18_queue* %4
}
int int_ops_nand(int l, int r) { return ~(l & r); }


x86 assembly (clang, -O0):
<int_ops_nand>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_ops_nand>:
mov    %edi,%eax
and    %esi,%eax
not    %eax
ret

LLVM IR (-O0):
define i32 @int_ops_nand(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %5, %6
%8 = xor i32 %7, -1
ret i32 %8
}

LLVM IR (-O2):
define i32 @int_ops_nand(i32 %0, i32 %1) {
%3 = and i32 %1, %0
%4 = xor i32 %3, -1
ret i32 %4
}
/* Type definitions */
struct flashrom_flashctx {
  int dummy;
};

/* Variables and functions */
int spi_disable_blockprotect_generic(struct flashrom_flashctx *, int, int,
                                     int /*<<< orphan*/, int);
int spi_disable_blockprotect_bp3_srwd(struct flashrom_flashctx *flash) {
  return spi_disable_blockprotect_generic(flash, 0x3C, 1 << 7, 0, 0xFF);
}


x86 assembly (clang, -O0):
<spi_disable_blockprotect_bp3_srwd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x3c,%esi
mov    $0x80,%edx
xor    %ecx,%ecx
mov    $0xff,%r8d
call   1030 <spi_disable_blockprotect_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_disable_blockprotect_bp3_srwd>:
mov    $0x3c,%esi
mov    $0x80,%edx
xor    %ecx,%ecx
mov    $0xff,%r8d
jmp    1030 <spi_disable_blockprotect_generic@plt>

LLVM IR (-O0):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_disable_blockprotect_bp3_srwd(%struct.flashrom_flashctx* %0) {
%2 = alloca %struct.flashrom_flashctx*
store %struct.flashrom_flashctx* %0, %struct.flashrom_flashctx** %2
%3 = load %struct.flashrom_flashctx*, %struct.flashrom_flashctx** %2
%4 = call i32 @spi_disable_blockprotect_generic(%struct.flashrom_flashctx* %3, i32 60, i32 128, i32 0, i32 255)
ret i32 %4
}

LLVM IR (-O2):
%struct.flashrom_flashctx = type { i32 }
define i32 @spi_disable_blockprotect_bp3_srwd(%struct.flashrom_flashctx* %0) {
%2 = tail call i32 @spi_disable_blockprotect_generic(%struct.flashrom_flashctx* %0, i32 60, i32 128, i32 0, i32 255)
ret i32 %2
}