xunge/DecIR huggingface dataset:
/* Variables and functions */
int IsInfinity(double);
scalar_t__ IsNotANumber(double);
int dtype(double d) {
  int ret = IsInfinity(d);
  if (ret != 0) {
    return ret;
  } else if (d == 0.0) {
    return 4;
  } else if (IsNotANumber(d)) {
    return 2;
  }
  return 0;
}


x86 assembly (clang, -O0):
<dtype>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <IsInfinity@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     114f <dtype+0x2f>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    11a4 <dtype+0x84>
movsd  -0x10(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jne    1173 <dtype+0x53>
jp     1173 <dtype+0x53>
movl   $0x4,-0x4(%rbp)
jmp    11a4 <dtype+0x84>
movsd  -0x10(%rbp),%xmm0
call   1040 <IsNotANumber@plt>
cmp    $0x0,%rax
je     1193 <dtype+0x73>
movl   $0x2,-0x4(%rbp)
jmp    11a4 <dtype+0x84>
jmp    1198 <dtype+0x78>
jmp    119d <dtype+0x7d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dtype>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <IsInfinity@plt>
test   %eax,%eax
je     1131 <dtype+0x11>
pop    %rcx
ret
mov    $0x4,%eax
xorpd  %xmm0,%xmm0
movsd  (%rsp),%xmm1
ucomisd %xmm0,%xmm1
jne    1147 <dtype+0x27>
jnp    112f <dtype+0xf>
movsd  (%rsp),%xmm0
call   1040 <IsNotANumber@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @dtype(double %0) {
%2 = alloca i32
%3 = alloca double
%4 = alloca i32
store double %0, double* %3
%5 = load double, double* %3
%6 = call i32 @IsInfinity(double %5)
store i32 %6, i32* %4
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = load i32, i32* %4
store i32 %10, i32* %2
br label %23
11: ; preds = %1
%12 = load double, double* %3
%13 = fcmp oeq double %12, 0.000000e+00
br i1 %13, label %14, label %15
14: ; preds = %11
store i32 4, i32* %2
br label %23
15: ; preds = %11
%16 = load double, double* %3
%17 = call i64 @IsNotANumber(double %16)
%18 = icmp ne i64 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %15
store i32 2, i32* %2
br label %23
20: ; preds = %15
br label %21
21: ; preds = %20
br label %22
22: ; preds = %21
store i32 0, i32* %2
br label %23
23: ; preds = %22, %19, %14, %9
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @dtype(double %0) {
%2 = tail call i32 @IsInfinity(double %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %10
4: ; preds = %1
%5 = fcmp oeq double %0, 0.000000e+00
br i1 %5, label %10, label %6
6: ; preds = %4
%7 = tail call i64 @IsNotANumber(double %0)
%8 = icmp eq i64 %7, 0
%9 = select i1 %8, i32 0, i32 2
br label %10
10: ; preds = %6, %4, %1
%11 = phi i32 [ %2, %1 ], [ 4, %4 ], [ %9, %6 ]
ret i32 %11
}
/* Variables and functions */
void *htsmsg_create_list();
void *create_list(void *opaque) { return htsmsg_create_list(); }


x86 assembly (clang, -O0):
<create_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <htsmsg_create_list@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create_list>:
xor    %eax,%eax
jmp    1030 <htsmsg_create_list@plt>

LLVM IR (-O0):
define i8* @create_list(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i8* (...) @htsmsg_create_list()
ret i8* %3
}

LLVM IR (-O2):
define i8* @create_list(i8* nocapture readnone %0) {
%2 = tail call i8* (...) @htsmsg_create_list()
ret i8* %2
}
double Sleef_fmax(double x, double y) { return __builtin_fmax(x, y); }


x86 assembly (clang, -O0):
<Sleef_fmax>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm3
movsd  -0x10(%rbp),%xmm2
movaps %xmm2,%xmm4
movaps %xmm3,%xmm0
cmpunordsd %xmm0,%xmm0
movaps %xmm0,%xmm1
pand   %xmm4,%xmm1
maxsd  %xmm3,%xmm2
pandn  %xmm2,%xmm0
por    %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sleef_fmax>:
movapd %xmm0,%xmm2
cmpunordsd %xmm0,%xmm2
movapd %xmm2,%xmm3
andpd  %xmm1,%xmm3
maxsd  %xmm0,%xmm1
andnpd %xmm1,%xmm2
orpd   %xmm3,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @Sleef_fmax(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = call double @llvm.maxnum.f64(double %5, double %6)
ret double %7
}

LLVM IR (-O2):
define double @Sleef_fmax(double %0, double %1) {
%3 = tail call double @llvm.maxnum.f64(double %0, double %1)
ret double %3
}
/* Variables and functions */
int O_CREAT;
int open_needs_mode(int flags) { return flags & O_CREAT; }


x86 assembly (clang, -O0):
<open_needs_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    0x2ee7(%rip),%rcx
and    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<open_needs_mode>:
mov    %edi,%eax
mov    0x2eef(%rip),%rcx
and    (%rcx),%eax
ret

LLVM IR (-O0):
@O_CREAT = global i32 0
define i32 @open_needs_mode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @O_CREAT
%5 = and i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
@O_CREAT = global i32 0
define i32 @open_needs_mode(i32 %0) {
%2 = load i32, i32* @O_CREAT
%3 = and i32 %2, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int robot(int, int /*<<< orphan*/, int /*<<< orphan*/);
int main(void) {
  printf("%d\n", robot(1, 0, 0));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%edi
xor    %edx,%edx
mov    %edx,%esi
call   1040 <robot@plt>
mov    %eax,%esi
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x1,%edi
xor    %esi,%esi
xor    %edx,%edx
call   1040 <robot@plt>
lea    0xeca(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @robot(i32 1, i32 0, i32 0)
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @robot(i32 1, i32 0, i32 0)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
void gquad_count(int i, int L, int *l, void *data, void *NA, void *NA2,
                 void *NA3) {
  *((int *)data) += 1;
}


x86 assembly (clang, -O0):
<gquad_count>:
push   %rbp
mov    %rsp,%rbp
mov    0x10(%rbp),%rax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8,-0x20(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
add    $0x1,%ecx
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gquad_count>:
addl   $0x1,(%rcx)
ret

LLVM IR (-O0):
define void @gquad_count(i32 %0, i32 %1, i32* %2, i8* %3, i8* %4, i8* %5, i8* %6) {
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32*
%11 = alloca i8*
%12 = alloca i8*
%13 = alloca i8*
%14 = alloca i8*
store i32 %0, i32* %8
store i32 %1, i32* %9
store i32* %2, i32** %10
store i8* %3, i8** %11
store i8* %4, i8** %12
store i8* %5, i8** %13
store i8* %6, i8** %14
%15 = load i8*, i8** %11
%16 = bitcast i8* %15 to i32*
%17 = load i32, i32* %16
%18 = add nsw i32 %17, 1
store i32 %18, i32* %16
ret void
}

LLVM IR (-O2):
define void @gquad_count(i32 %0, i32 %1, i32* nocapture readnone %2, i8* nocapture %3, i8* nocapture readnone %4, i8* nocapture readnone %5, i8* nocapture readnone %6) {
%8 = bitcast i8* %3 to i32*
%9 = load i32, i32* %8
%10 = add nsw i32 %9, 1
store i32 %10, i32* %8
ret void
}
/* Type definitions */
struct vecnode {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vecnode_resize__(struct vecnode *, size_t,
                                    int /*<<< orphan*/);
void vecnode_resize(struct vecnode *v, size_t new_count) {
  vecnode_resize__(v, new_count, 0);
}


x86 assembly (clang, -O0):
<vecnode_resize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <vecnode_resize__@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vecnode_resize>:
xor    %edx,%edx
jmp    1030 <vecnode_resize__@plt>

LLVM IR (-O0):
%struct.vecnode = type { i32 }
define void @vecnode_resize(%struct.vecnode* %0, i64 %1) {
%3 = alloca %struct.vecnode*
%4 = alloca i64
store %struct.vecnode* %0, %struct.vecnode** %3
store i64 %1, i64* %4
%5 = load %struct.vecnode*, %struct.vecnode** %3
%6 = load i64, i64* %4
%7 = call i32 @vecnode_resize__(%struct.vecnode* %5, i64 %6, i32 0)
ret void
}

LLVM IR (-O2):
%struct.vecnode = type { i32 }
define void @vecnode_resize(%struct.vecnode* %0, i64 %1) {
%3 = tail call i32 @vecnode_resize__(%struct.vecnode* %0, i64 %1, i32 0)
ret void
}
int pathconN_nm9_n_out(void) { return 2; }


x86 assembly (clang, -O0):
<pathconN_nm9_n_out>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pathconN_nm9_n_out>:
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @pathconN_nm9_n_out() {
ret i32 2
}

LLVM IR (-O2):
define i32 @pathconN_nm9_n_out() {
ret i32 2
}
int f3(int a, int b) { return a == b; }


x86 assembly (clang, -O0):
<f3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f3>:
xor    %eax,%eax
cmp    %esi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @f3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp eq i32 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @f3(i32 %0, i32 %1) {
%3 = icmp eq i32 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
double rhonothorfunc(double rhohor, double Kbe) {
  double rhonothor;
  rhonothor = (2.0 * Kbe / (Kbe + 1.0)) * rhohor;
  return (rhonothor);
}


x86 assembly (clang, -O0):
<rhonothorfunc>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  0xef2(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  0xedd(%rip),%xmm1
addsd  -0x10(%rbp),%xmm1
divsd  %xmm1,%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<rhonothorfunc>:
movapd %xmm1,%xmm2
addsd  %xmm1,%xmm2
addsd  0xef0(%rip),%xmm1
divsd  %xmm1,%xmm2
mulsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @rhonothorfunc(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %4
%7 = fmul double 2.000000e+00, %6
%8 = load double, double* %4
%9 = fadd double %8, 1.000000e+00
%10 = fdiv double %7, %9
%11 = load double, double* %3
%12 = fmul double %10, %11
store double %12, double* %5
%13 = load double, double* %5
ret double %13
}

LLVM IR (-O2):
define double @rhonothorfunc(double %0, double %1) {
%3 = fmul double %1, 2.000000e+00
%4 = fadd double %1, 1.000000e+00
%5 = fdiv double %3, %4
%6 = fmul double %5, %0
ret double %6
}
int datum_a(const unsigned char source[], const int position,
            const int length) {
  int retval = 0;
  if (position < length) {
    if (source[position] <= 95) {
      retval = 1;
    }
  }
  return retval;
}


x86 assembly (clang, -O0):
<datum_a>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1142 <datum_a+0x42>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movzbl (%rax,%rcx,1),%eax
cmp    $0x5f,%eax
jg     113d <datum_a+0x3d>
movl   $0x1,-0x14(%rbp)
jmp    1142 <datum_a+0x42>
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<datum_a>:
xor    %eax,%eax
cmp    %edx,%esi
jge    1112 <datum_a+0x12>
movslq %esi,%rcx
xor    %eax,%eax
cmpb   $0x60,(%rdi,%rcx,1)
setb   %al
ret

LLVM IR (-O0):
define i32 @datum_a(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
store i32 0, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = icmp slt i32 %8, %9
br i1 %10, label %11, label %21
11: ; preds = %3
%12 = load i8*, i8** %4
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = icmp sle i32 %17, 95
br i1 %18, label %19, label %20
19: ; preds = %11
store i32 1, i32* %7
br label %20
20: ; preds = %19, %11
br label %21
21: ; preds = %20, %3
%22 = load i32, i32* %7
ret i32 %22
}

LLVM IR (-O2):
define i32 @datum_a(i8* nocapture %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %11
5: ; preds = %3
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = icmp ult i8 %8, 96
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %5, %3
%12 = phi i32 [ 0, %3 ], [ %10, %5 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int return_error_val(void) {
  exit(1);
  return -1;
}


x86 assembly (clang, -O0):
<return_error_val>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<return_error_val>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define i32 @return_error_val() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define i32 @return_error_val() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int tangent_taylor(double);
double cotangent_taylor(double radians) { return 1 / tangent_taylor(radians); }


x86 assembly (clang, -O0):
<cotangent_taylor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <tangent_taylor@plt>
mov    %eax,%ecx
mov    $0x1,%eax
cltd
idiv   %ecx
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cotangent_taylor>:
push   %rax
call   1030 <tangent_taylor@plt>
lea    0x1(%rax),%ecx
xor    %edx,%edx
cmp    $0x3,%ecx
cmovb  %eax,%edx
xorps  %xmm0,%xmm0
cvtsi2sd %edx,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @cotangent_taylor(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @tangent_taylor(double %3)
%5 = sdiv i32 1, %4
%6 = sitofp i32 %5 to double
ret double %6
}

LLVM IR (-O2):
define double @cotangent_taylor(double %0) {
%2 = tail call i32 @tangent_taylor(double %0)
%3 = add i32 %2, 1
%4 = icmp ult i32 %3, 3
%5 = select i1 %4, i32 %2, i32 0
%6 = sitofp i32 %5 to double
ret double %6
}
/* Variables and functions */
int EINVAL;
__attribute__((visibility("default"))) int
sd_login_monitor_get_events(void *m) {
  return -EINVAL;
}


x86 assembly (clang, -O0):
<sd_login_monitor_get_events>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    0x2ecf(%rip),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sd_login_monitor_get_events>:
mov    0x2ed9(%rip),%rcx
xor    %eax,%eax
sub    (%rcx),%eax
ret

LLVM IR (-O0):
@EINVAL = global i32 0
define i32 @sd_login_monitor_get_events(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @EINVAL
%4 = sub nsw i32 0, %3
ret i32 %4
}

LLVM IR (-O2):
@EINVAL = global i32 0
define i32 @sd_login_monitor_get_events(i8* nocapture readnone %0) {
%2 = load i32, i32* @EINVAL
%3 = sub nsw i32 0, %2
ret i32 %3
}
double vde_chain_nm3_sq(double x) { return x * x; }


x86 assembly (clang, -O0):
<vde_chain_nm3_sq>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<vde_chain_nm3_sq>:
mulsd  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @vde_chain_nm3_sq(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = load double, double* %2
%5 = fmul double %3, %4
ret double %5
}

LLVM IR (-O2):
define double @vde_chain_nm3_sq(double %0) {
%2 = fmul double %0, %0
ret double %2
}
/* Type definitions */
typedef unsigned int uint32_t;

/* Variables and functions */
unsigned int SPI_CSR_DLYBS(unsigned int);
unsigned int pmc_get_peripheral_clock(unsigned int);
uint32_t _spi_compute_dlybs(uint32_t delay, uint32_t periph_id) {
  uint32_t dlybs =
      ((pmc_get_peripheral_clock(periph_id) / 1000000u) * delay) / 100;
  return SPI_CSR_DLYBS(dlybs);
}


x86 assembly (clang, -O0):
<_spi_compute_dlybs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <pmc_get_peripheral_clock@plt>
mov    $0xf4240,%ecx
xor    %edx,%edx
div    %ecx
imul   -0x4(%rbp),%eax
mov    $0x64,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
call   1030 <SPI_CSR_DLYBS@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_spi_compute_dlybs>:
push   %rbx
mov    %edi,%ebx
mov    %esi,%edi
call   1040 <pmc_get_peripheral_clock@plt>
mov    %eax,%eax
imul   $0x431bde83,%rax,%rax
shr    $0x32,%rax
imul   %ebx,%eax
imul   $0x51eb851f,%rax,%rdi
shr    $0x25,%rdi
pop    %rbx
jmp    1030 <SPI_CSR_DLYBS@plt>

LLVM IR (-O0):
define i32 @_spi_compute_dlybs(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = call i32 @pmc_get_peripheral_clock(i32 %6)
%8 = udiv i32 %7, 1000000
%9 = load i32, i32* %3
%10 = mul i32 %8, %9
%11 = udiv i32 %10, 100
store i32 %11, i32* %5
%12 = load i32, i32* %5
%13 = call i32 @SPI_CSR_DLYBS(i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @_spi_compute_dlybs(i32 %0, i32 %1) {
%3 = tail call i32 @pmc_get_peripheral_clock(i32 %1)
%4 = udiv i32 %3, 1000000
%5 = mul i32 %4, %0
%6 = udiv i32 %5, 100
%7 = tail call i32 @SPI_CSR_DLYBS(i32 %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ system(char *);
void captura(char *nombre) {
  system("sudo fswebcam -d /dev/video0 -i 0 -r 1600x1200 --no-banner -- jpeg 0 "
         "image.jpg");
  sleep(2);
  system("cp image.jpg image_`date +%S%H%M`.jpg");
}


x86 assembly (clang, -O0):
<captura>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <system@plt>
mov    $0x2,%edi
call   1040 <sleep@plt>
lea    0xf06(%rip),%rdi
call   1030 <system@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<captura>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <system@plt>
mov    $0x2,%edi
call   1040 <sleep@plt>
lea    0xf11(%rip),%rdi
pop    %rax
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [79 x i8] c"sudo fswebcam -d /dev/video0 -i 0 -r 1600x1200 --no-banner -- jpeg 0 image.jpg\00"
@.str.1 = [38 x i8] c"cp image.jpg image_`date +%S%H%M`.jpg\00"
define void @captura(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @system(i8* getelementptr inbounds ([79 x i8], [79 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @sleep(i32 2)
%5 = call i32 @system(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [79 x i8] c"sudo fswebcam -d /dev/video0 -i 0 -r 1600x1200 --no-banner -- jpeg 0 image.jpg\00"
@.str.1 = [38 x i8] c"cp image.jpg image_`date +%S%H%M`.jpg\00"
define void @captura(i8* nocapture readnone %0) {
%2 = tail call i32 @system(i8* getelementptr inbounds ([79 x i8], [79 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @sleep(i32 2)
%4 = tail call i32 @system(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void mock_unbind_ggtt(struct i915_address_space *vm, struct i915_vma *vma) {}


x86 assembly (clang, -O0):
<mock_unbind_ggtt>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mock_unbind_ggtt>:
ret

LLVM IR (-O0):
%struct.i915_address_space = type opaque
%struct.i915_vma = type opaque
define void @mock_unbind_ggtt(%struct.i915_address_space* %0, %struct.i915_vma* %1) {
%3 = alloca %struct.i915_address_space*
%4 = alloca %struct.i915_vma*
store %struct.i915_address_space* %0, %struct.i915_address_space** %3
store %struct.i915_vma* %1, %struct.i915_vma** %4
ret void
}

LLVM IR (-O2):
%struct.i915_address_space = type opaque
%struct.i915_vma = type opaque
define void @mock_unbind_ggtt(%struct.i915_address_space* nocapture %0, %struct.i915_vma* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ test_int_double();
int /*<<< orphan*/ test_list_int();
int main() {
  test_list_int();
  test_int_double();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <test_list_int@plt>
mov    $0x0,%al
call   1030 <test_int_double@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <test_list_int@plt>
xor    %eax,%eax
call   1030 <test_int_double@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_list_int()
%3 = call i32 (...) @test_int_double()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_list_int()
%2 = tail call i32 (...) @test_int_double()
ret i32 0
}
void GlutMouse(int button, int state, int x, int y) {
  (void)(button);
  (void)(state);
  (void)(x);
  (void)(y);
}


x86 assembly (clang, -O0):
<GlutMouse>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GlutMouse>:
ret

LLVM IR (-O0):
define void @GlutMouse(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
ret void
}

LLVM IR (-O2):
define void @GlutMouse(i32 %0, i32 %1, i32 %2, i32 %3) {
ret void
}
int has_bogus_spec(void) { return 3; }


x86 assembly (clang, -O0):
<has_bogus_spec>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_bogus_spec>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @has_bogus_spec() {
ret i32 3
}

LLVM IR (-O2):
define i32 @has_bogus_spec() {
ret i32 3
}
int test_imm_ACuint64_highword_mem(unsigned long long *val) {
  return ((*val >> 32) & (0xAC << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_ACuint64_highword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
shr    $0x20,%rdx
and    $0xac,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_ACuint64_highword_mem>:
testb  $0xac,0x4(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_ACuint64_highword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = lshr i64 %4, 32
%6 = and i64 %5, 172
%7 = icmp ne i64 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_ACuint64_highword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 738734374912
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
void print_uart0(const char *s) {
  while (*s != '\0') {
    (*((volatile uint32_t *)((volatile uint32_t *const)0x101f1000)) =
         (volatile uint32_t)(*s));
    s++;
  }
}


x86 assembly (clang, -O0):
<print_uart0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
je     1139 <print_uart0+0x39>
mov    -0x8(%rbp),%rax
movsbq (%rax),%rcx
mov    $0x101f1000,%eax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <print_uart0+0x8>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_uart0>:
mov    (%rdi),%al
test   %al,%al
je     1127 <print_uart0+0x27>
add    $0x1,%rdi
nopw   0x0(%rax,%rax,1)
movsbq %al,%rax
mov    %rax,0x101f1000
10
movzbl (%rdi),%eax
add    $0x1,%rdi
test   %al,%al
jne    1110 <print_uart0+0x10>
ret

LLVM IR (-O0):
define void @print_uart0(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %14
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i64
store volatile i64 %11, i64* inttoptr (i64 270471168 to i64*)
%12 = load i8*, i8** %2
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %2
br label %3
14: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @print_uart0(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = icmp eq i8 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi i8 [ %9, %4 ], [ %2, %1 ]
%6 = phi i8* [ %8, %4 ], [ %0, %1 ]
%7 = sext i8 %5 to i64
store volatile i64 %7, i64* inttoptr (i64 270471168 to i64*)
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = load i8, i8* %8
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %4
11: ; preds = %4, %1
ret void
}
double degrees2ddmm(double deg_val) {
  signed int deg;
  deg = (signed int)deg_val;
  return (double)(deg * 100.0) + ((deg_val - deg) * 60.0);
}


x86 assembly (clang, -O0):
<degrees2ddmm>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
cvttsd2si -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
cvtsi2sdl -0xc(%rbp),%xmm0
movsd  -0x8(%rbp),%xmm1
cvtsi2sdl -0xc(%rbp),%xmm2
subsd  %xmm2,%xmm1
movsd  0xedc(%rip),%xmm2
mulsd  %xmm2,%xmm1
movsd  0xec8(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<degrees2ddmm>:
cvttpd2dq %xmm0,%xmm1
cvtdq2pd %xmm1,%xmm1
subsd  %xmm1,%xmm0
mulsd  0xeec(%rip),%xmm0
mulsd  0xeec(%rip),%xmm1
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @degrees2ddmm(double %0) {
%2 = alloca double
%3 = alloca i32
store double %0, double* %2
%4 = load double, double* %2
%5 = fptosi double %4 to i32
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = sitofp i32 %6 to double
%8 = load double, double* %2
%9 = load i32, i32* %3
%10 = sitofp i32 %9 to double
%11 = fsub double %8, %10
%12 = fmul double %11, 6.000000e+01
%13 = call double @llvm.fmuladd.f64(double %7, double 1.000000e+02, double %12)
ret double %13
}

LLVM IR (-O2):
define double @degrees2ddmm(double %0) {
%2 = fptosi double %0 to i32
%3 = sitofp i32 %2 to double
%4 = fsub double %0, %3
%5 = fmul double %4, 6.000000e+01
%6 = tail call double @llvm.fmuladd.f64(double %3, double 1.000000e+02, double %5)
ret double %6
}
char *strcat(char *d, const char *s) {
  char *tmp = d;
  while ('\0' != *d)
    d++;
  while ('\0' != *s)
    *d++ = *s++;
  *d = '\0';
  return tmp;
}


x86 assembly (clang, -O0):
<strcat>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     1136 <strcat+0x36>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1114 <strcat+0x14>
jmp    113b <strcat+0x3b>
mov    -0x10(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    %ecx,%eax
je     1173 <strcat+0x73>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x8(%rbp)
mov    %cl,(%rax)
jmp    113b <strcat+0x3b>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strcat>:
mov    %rdi,%rax
mov    %rdi,%rcx
cs nopw 0x0(%rax,%rax,1)
mov    %rcx,%rdi
add    $0x1,%rcx
cmpb   $0x0,(%rdi)
jne    1110 <strcat+0x10>
mov    (%rsi),%dl
test   %dl,%dl
je     1146 <strcat+0x46>
mov    $0xffffffffffffffff,%rdi
nopl   0x0(%rax)
mov    %dl,(%rcx,%rdi,1)
movzbl 0x2(%rsi,%rdi,1),%edx
add    $0x1,%rdi
test   %dl,%dl
jne    1130 <strcat+0x30>
add    %rdi,%rcx
mov    %rcx,%rdi
movb   $0x0,(%rdi)
ret

LLVM IR (-O0):
define i8* @strcat(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %12, %2
%8 = load i8*, i8** %3
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp ne i32 0, %10
br i1 %11, label %12, label %15
12: ; preds = %7
%13 = load i8*, i8** %3
%14 = getelementptr inbounds i8, i8* %13, i32 1
store i8* %14, i8** %3
br label %7
15: ; preds = %7
br label %16
16: ; preds = %21, %15
%17 = load i8*, i8** %4
%18 = load i8, i8* %17
%19 = sext i8 %18 to i32
%20 = icmp ne i32 0, %19
br i1 %20, label %21, label %27
21: ; preds = %16
%22 = load i8*, i8** %4
%23 = getelementptr inbounds i8, i8* %22, i32 1
store i8* %23, i8** %4
%24 = load i8, i8* %22
%25 = load i8*, i8** %3
%26 = getelementptr inbounds i8, i8* %25, i32 1
store i8* %26, i8** %3
store i8 %24, i8* %25
br label %16
27: ; preds = %16
%28 = load i8*, i8** %3
store i8 0, i8* %28
%29 = load i8*, i8** %5
ret i8* %29
}

LLVM IR (-O2):
define i8* @strcat(i8* returned %0, i8* nocapture %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i8* [ %0, %2 ], [ %7, %3 ]
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = getelementptr inbounds i8, i8* %4, i64 1
br i1 %6, label %8, label %3
8: ; preds = %3
%9 = load i8, i8* %1
%10 = icmp eq i8 %9, 0
br i1 %10, label %19, label %11
11: ; preds = %8, %11
%12 = phi i8 [ %17, %11 ], [ %9, %8 ]
%13 = phi i8* [ %16, %11 ], [ %4, %8 ]
%14 = phi i8* [ %15, %11 ], [ %1, %8 ]
%15 = getelementptr inbounds i8, i8* %14, i64 1
%16 = getelementptr inbounds i8, i8* %13, i64 1
store i8 %12, i8* %13
%17 = load i8, i8* %15
%18 = icmp eq i8 %17, 0
br i1 %18, label %19, label %11
19: ; preds = %11, %8
%20 = phi i8* [ %4, %8 ], [ %16, %11 ]
store i8 0, i8* %20
ret i8* %0
}
/* Type definitions */
struct dirent {
  char *d_name;
};

/* Variables and functions */
int(filter)(const struct dirent *ent) {
  if (ent->d_name[0] == '.')
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<filter>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
movsbl (%rax),%eax
cmp    $0x2e,%eax
jne    1127 <filter+0x27>
movl   $0x0,-0x4(%rbp)
jmp    112e <filter+0x2e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<filter>:
mov    (%rdi),%rcx
xor    %eax,%eax
cmpb   $0x2e,(%rcx)
setne  %al
ret

LLVM IR (-O0):
%struct.dirent = type { i8* }
define i32 @filter(%struct.dirent* %0) {
%2 = alloca i32
%3 = alloca %struct.dirent*
store %struct.dirent* %0, %struct.dirent** %3
%4 = load %struct.dirent*, %struct.dirent** %3
%5 = getelementptr inbounds %struct.dirent, %struct.dirent* %4, i32 0, i32 0
%6 = load i8*, i8** %5
%7 = getelementptr inbounds i8, i8* %6, i64 0
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp eq i32 %9, 46
br i1 %10, label %11, label %12
11: ; preds = %1
store i32 0, i32* %2
br label %13
12: ; preds = %1
store i32 1, i32* %2
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
%struct.dirent = type { i8* }
define i32 @filter(%struct.dirent* nocapture %0) {
%2 = getelementptr inbounds %struct.dirent, %struct.dirent* %0, i64 0, i32 0
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = icmp ne i8 %4, 46
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int zhash_ptr_equals(const void *a, const void *b) {
  assert(a != NULL);
  assert(b != NULL);
  const void *ptra = *(void **)a;
  const void *ptrb = *(void **)b;
  return ptra == ptrb;
}


x86 assembly (clang, -O0):
<zhash_ptr_equals>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x8(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
cmpq   $0x0,-0x10(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zhash_ptr_equals>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
xor    %edi,%edi
test   %rbx,%rbx
setne  %dil
call   1030 <assert@plt>
xor    %edi,%edi
test   %r14,%r14
setne  %dil
call   1030 <assert@plt>
mov    (%rbx),%rcx
xor    %eax,%eax
cmp    (%r14),%rcx
sete   %al
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @zhash_ptr_equals(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%7 = load i8*, i8** %3
%8 = icmp ne i8* %7, null
%9 = zext i1 %8 to i32
%10 = call i32 @assert(i32 %9)
%11 = load i8*, i8** %4
%12 = icmp ne i8* %11, null
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
%15 = load i8*, i8** %3
%16 = bitcast i8* %15 to i8**
%17 = load i8*, i8** %16
store i8* %17, i8** %5
%18 = load i8*, i8** %4
%19 = bitcast i8* %18 to i8**
%20 = load i8*, i8** %19
store i8* %20, i8** %6
%21 = load i8*, i8** %5
%22 = load i8*, i8** %6
%23 = icmp eq i8* %21, %22
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @zhash_ptr_equals(i8* %0, i8* %1) {
%3 = icmp ne i8* %0, null
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
%6 = icmp ne i8* %1, null
%7 = zext i1 %6 to i32
%8 = tail call i32 @assert(i32 %7)
%9 = bitcast i8* %0 to i8**
%10 = load i8*, i8** %9
%11 = bitcast i8* %1 to i8**
%12 = load i8*, i8** %11
%13 = icmp eq i8* %10, %12
%14 = zext i1 %13 to i32
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("%% Hel%%lo %%\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"%% Hel%%lo %%\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [15 x i8] c"%% Hel%%lo %%\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void print_licence_lfmm() {
  printf(
      "LFMM Copyright (C) 2012 Eric Frichot\n"
      "This program is free software: you can redistribute it and/or modify\n"
      "it under the terms of the GNU General Public License as published by\n"
      "the Free Software Foundation, either version 3 of the License, or\n"
      "(at your option) any later version.\n"
      "This program is distributed in the hope that it will be useful,\n"
      "but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
      "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n"
      "GNU General Public License for more details.\n"
      "You should have received a copy of the GNU General Public License\n"
      "along with this program.  If not, see "
      "<http://www.gnu.org/licenses/>.\n");
}


x86 assembly (clang, -O0):
<print_licence_lfmm>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_licence_lfmm>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [648 x i8] c"LFMM Copyright (C) 2012 Eric Frichot\0AThis program is free software: you can redistribute it and/or modify\0Ait under the terms of the GNU General Public License as published by\0Athe Free Software Foundation, either version 3 of the License, or\0A(at your option) any later version.\0AThis program is distributed in the hope that it will be useful,\0Abut WITHOUT ANY WARRANTY; without even the implied warranty of\0AMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\0AGNU General Public License for more details.\0AYou should have received a copy of the GNU General Public License\0Aalong with this program. If not, see <http://www.gnu.org/licenses/>.\0A\00"
define void @print_licence_lfmm() {
%1 = call i32 @printf(i8* getelementptr inbounds ([648 x i8], [648 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [647 x i8] c"LFMM Copyright (C) 2012 Eric Frichot\0AThis program is free software: you can redistribute it and/or modify\0Ait under the terms of the GNU General Public License as published by\0Athe Free Software Foundation, either version 3 of the License, or\0A(at your option) any later version.\0AThis program is distributed in the hope that it will be useful,\0Abut WITHOUT ANY WARRANTY; without even the implied warranty of\0AMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\0AGNU General Public License for more details.\0AYou should have received a copy of the GNU General Public License\0Aalong with this program. If not, see <http://www.gnu.org/licenses/>.\00"
define void @print_licence_lfmm() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([647 x i8], [647 x i8]* @str, i64 0, i64 0))
ret void
}
void flub_validate_error(unsigned long error) { ; }


x86 assembly (clang, -O0):
<flub_validate_error>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flub_validate_error>:
ret

LLVM IR (-O0):
define void @flub_validate_error(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
ret void
}

LLVM IR (-O2):
define void @flub_validate_error(i64 %0) {
ret void
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
size_t aeron_logbuffer_index_by_term(int32_t initial_term_id,
                                     int32_t active_term_id) {
  return (size_t)((active_term_id - initial_term_id) % (3));
}


x86 assembly (clang, -O0):
<aeron_logbuffer_index_by_term>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
sub    -0x4(%rbp),%eax
mov    $0x3,%ecx
cltd
idiv   %ecx
movslq %edx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<aeron_logbuffer_index_by_term>:
sub    %edi,%esi
movslq %esi,%rax
imul   $0x55555556,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
shr    $0x20,%rcx
add    %edx,%ecx
lea    (%rcx,%rcx,2),%ecx
sub    %ecx,%eax
cltq
ret

LLVM IR (-O0):
define i64 @aeron_logbuffer_index_by_term(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = sub nsw i32 %5, %6
%8 = srem i32 %7, 3
%9 = sext i32 %8 to i64
ret i64 %9
}

LLVM IR (-O2):
define i64 @aeron_logbuffer_index_by_term(i32 %0, i32 %1) {
%3 = sub nsw i32 %1, %0
%4 = srem i32 %3, 3
%5 = sext i32 %4 to i64
ret i64 %5
}
int func() {
  int x;
  x = 1;
  return x;
}


x86 assembly (clang, -O0):
<func>:
push   %rbp
mov    %rsp,%rbp
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<func>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @func() {
%1 = alloca i32
store i32 1, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @func() {
ret i32 1
}
int f(int x) {
  int i = x;
  i++;
  return i;
}


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 1
store i32 %6, i32* %3
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @f(i32 %0) {
%2 = add nsw i32 %0, 1
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ _mm_comigt_ss(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ _mm_load_ss(float *);
int determ_gt_float(uint32_t a, uint32_t b) {
  return !!_mm_comigt_ss(_mm_load_ss((float *)&a), _mm_load_ss((float *)&b));
}


x86 assembly (clang, -O0):
<determ_gt_float>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
lea    -0x4(%rbp),%rdi
call   1040 <_mm_load_ss@plt>
mov    %eax,-0xc(%rbp)
lea    -0x8(%rbp),%rdi
call   1040 <_mm_load_ss@plt>
mov    -0xc(%rbp),%edi
mov    %eax,%esi
call   1030 <_mm_comigt_ss@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<determ_gt_float>:
push   %rbx
sub    $0x10,%rsp
mov    %edi,0xc(%rsp)
mov    %esi,0x8(%rsp)
lea    0xc(%rsp),%rdi
call   1040 <_mm_load_ss@plt>
mov    %eax,%ebx
lea    0x8(%rsp),%rdi
call   1040 <_mm_load_ss@plt>
mov    %ebx,%edi
mov    %eax,%esi
call   1030 <_mm_comigt_ss@plt>
xor    %ecx,%ecx
test   %eax,%eax
setne  %cl
mov    %ecx,%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @determ_gt_float(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = bitcast i32* %3 to float*
%6 = call i32 @_mm_load_ss(float* %5)
%7 = bitcast i32* %4 to float*
%8 = call i32 @_mm_load_ss(float* %7)
%9 = call i32 @_mm_comigt_ss(i32 %6, i32 %8)
%10 = icmp ne i32 %9, 0
%11 = xor i1 %10, true
%12 = xor i1 %11, true
%13 = zext i1 %12 to i32
ret i32 %13
}

LLVM IR (-O2):
define i32 @determ_gt_float(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = bitcast i32* %3 to float*
%6 = call i32 @_mm_load_ss(float* %5)
%7 = bitcast i32* %4 to float*
%8 = call i32 @_mm_load_ss(float* %7)
%9 = call i32 @_mm_comigt_ss(i32 %6, i32 %8)
%10 = icmp ne i32 %9, 0
%11 = zext i1 %10 to i32
ret i32 %11
}
unsigned char _is_quotation_char(char c) { return (c == '"'); }


x86 assembly (clang, -O0):
<_is_quotation_char>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
cmp    $0x22,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_is_quotation_char>:
cmp    $0x22,%dil
sete   %al
ret

LLVM IR (-O0):
define zeroext i8 @_is_quotation_char(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 34
%6 = zext i1 %5 to i32
%7 = trunc i32 %6 to i8
ret i8 %7
}

LLVM IR (-O2):
define zeroext i8 @_is_quotation_char(i8 signext %0) {
%2 = icmp eq i8 %0, 34
%3 = zext i1 %2 to i8
ret i8 %3
}
void rop3_129_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk1 = S ^ T;
  stk2 = *D ^ S;
  stk1 = stk1 | stk2;
  stk1 = ~stk1;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_129_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xa(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
xor    $0xffffffff,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_129_1_0>:
mov    (%rdi),%al
mov    %eax,%ecx
xor    %sil,%cl
or     %esi,%edx
or     %cl,%dl
not    %dl
and    %sil,%al
or     %dl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_129_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8, i8* %5
%10 = zext i8 %9 to i32
%11 = load i8, i8* %6
%12 = zext i8 %11 to i32
%13 = xor i32 %10, %12
%14 = trunc i32 %13 to i8
store i8 %14, i8* %7
%15 = load i8*, i8** %4
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = load i8, i8* %5
%19 = zext i8 %18 to i32
%20 = xor i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %8
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = load i8, i8* %8
%25 = zext i8 %24 to i32
%26 = or i32 %23, %25
%27 = trunc i32 %26 to i8
store i8 %27, i8* %7
%28 = load i8, i8* %7
%29 = zext i8 %28 to i32
%30 = xor i32 %29, -1
%31 = trunc i32 %30 to i8
store i8 %31, i8* %7
%32 = load i8, i8* %7
%33 = zext i8 %32 to i32
%34 = load i8, i8* %5
%35 = zext i8 %34 to i32
%36 = xor i32 %35, -1
%37 = and i32 %33, %36
%38 = load i8*, i8** %4
%39 = load i8, i8* %38
%40 = zext i8 %39 to i32
%41 = load i8, i8* %5
%42 = zext i8 %41 to i32
%43 = and i32 %40, %42
%44 = or i32 %37, %43
%45 = trunc i32 %44 to i8
%46 = load i8*, i8** %4
store i8 %45, i8* %46
ret void
}

LLVM IR (-O2):
define void @rop3_129_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = xor i8 %4, %1
%6 = or i8 %2, %1
%7 = or i8 %6, %5
%8 = xor i8 %7, -1
%9 = and i8 %4, %1
%10 = or i8 %9, %8
store i8 %10, i8* %0
ret void
}
void code_exec(struct code_t *s) {}


x86 assembly (clang, -O0):
<code_exec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<code_exec>:
ret

LLVM IR (-O0):
%struct.code_t = type opaque
define void @code_exec(%struct.code_t* %0) {
%2 = alloca %struct.code_t*
store %struct.code_t* %0, %struct.code_t** %2
ret void
}

LLVM IR (-O2):
%struct.code_t = type opaque
define void @code_exec(%struct.code_t* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ func1();
int /*<<< orphan*/ func2();
int rand();
int /*<<< orphan*/ sleep(int);
int /*<<< orphan*/ srand(int /*<<< orphan*/);
int /*<<< orphan*/ time(int /*<<< orphan*/);
__attribute__((visibility("default"))) __attribute__((no)) void driver() {
  srand(time(0));
  sleep(1);
  if (rand() % 2 == 1)
    func1();
  else
    func2();
}


x86 assembly (clang, -O0):
<driver>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1050 <time@plt>
mov    %eax,%edi
call   1040 <srand@plt>
mov    $0x1,%edi
call   1070 <sleep@plt>
mov    $0x0,%al
call   1080 <rand@plt>
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x1,%edx
jne    11a0 <driver+0x40>
mov    $0x0,%al
call   1030 <func1@plt>
jmp    11a7 <driver+0x47>
mov    $0x0,%al
call   1060 <func2@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<driver>:
push   %rax
xor    %edi,%edi
call   1050 <time@plt>
mov    %eax,%edi
call   1040 <srand@plt>
mov    $0x1,%edi
call   1070 <sleep@plt>
xor    %eax,%eax
call   1080 <rand@plt>
mov    %eax,%ecx
shr    $0x1f,%ecx
add    %eax,%ecx
and    $0xfffffffe,%ecx
sub    %ecx,%eax
cmp    $0x1,%eax
jne    1199 <driver+0x39>
xor    %eax,%eax
pop    %rcx
jmp    1030 <func1@plt>
xor    %eax,%eax
pop    %rcx
jmp    1060 <func2@plt>

LLVM IR (-O0):
define void @driver() {
%1 = call i32 @time(i32 0)
%2 = call i32 @srand(i32 %1)
%3 = call i32 @sleep(i32 1)
%4 = call i32 (...) @rand()
%5 = srem i32 %4, 2
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 (...) @func1()
br label %11
9: ; preds = %0
%10 = call i32 (...) @func2()
br label %11
11: ; preds = %9, %7
ret void
}

LLVM IR (-O2):
define void @driver() {
%1 = tail call i32 @time(i32 0)
%2 = tail call i32 @srand(i32 %1)
%3 = tail call i32 @sleep(i32 1)
%4 = tail call i32 (...) @rand()
%5 = srem i32 %4, 2
%6 = icmp eq i32 %5, 1
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = tail call i32 (...) @func1()
br label %11
9: ; preds = %0
%10 = tail call i32 (...) @func2()
br label %11
11: ; preds = %9, %7
ret void
}