xunge/DecIR huggingface dataset:
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
void rgb16To32(uint8_t dst[4], uint16_t col, uint8_t alpha) {
  dst[0] = (col & 0x1F) << 3;
  dst[1] = (col & 0x7E0) >> 3;
  dst[2] = (col & 0xF800) >> 8;
  dst[3] = alpha;
}


x86 assembly (clang, -O0):
<rgb16To32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%ecx
and    $0x1f,%ecx
shl    $0x3,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0xc(%rbp),%ecx
and    $0x7e0,%ecx
sar    $0x3,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0xc(%rbp),%ecx
and    $0xf800,%ecx
sar    $0x8,%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0x8(%rax)
mov    -0x10(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,0xc(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rgb16To32>:
lea    0x0(,%rsi,8),%eax
movzbl %al,%eax
mov    %eax,(%rdi)
mov    %esi,%eax
shr    $0x3,%eax
and    $0xfc,%eax
mov    %eax,0x4(%rdi)
shr    $0x8,%esi
and    $0xf8,%esi
mov    %esi,0x8(%rdi)
mov    %edx,0xc(%rdi)
ret

LLVM IR (-O0):
define void @rgb16To32(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %5
%8 = and i32 %7, 31
%9 = shl i32 %8, 3
%10 = load i32*, i32** %4
%11 = getelementptr inbounds i32, i32* %10, i64 0
store i32 %9, i32* %11
%12 = load i32, i32* %5
%13 = and i32 %12, 2016
%14 = ashr i32 %13, 3
%15 = load i32*, i32** %4
%16 = getelementptr inbounds i32, i32* %15, i64 1
store i32 %14, i32* %16
%17 = load i32, i32* %5
%18 = and i32 %17, 63488
%19 = ashr i32 %18, 8
%20 = load i32*, i32** %4
%21 = getelementptr inbounds i32, i32* %20, i64 2
store i32 %19, i32* %21
%22 = load i32, i32* %6
%23 = load i32*, i32** %4
%24 = getelementptr inbounds i32, i32* %23, i64 3
store i32 %22, i32* %24
ret void
}

LLVM IR (-O2):
define void @rgb16To32(i32* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = shl i32 %1, 3
%5 = and i32 %4, 248
store i32 %5, i32* %0
%6 = lshr i32 %1, 3
%7 = and i32 %6, 252
%8 = getelementptr inbounds i32, i32* %0, i64 1
store i32 %7, i32* %8
%9 = lshr i32 %1, 8
%10 = and i32 %9, 248
%11 = getelementptr inbounds i32, i32* %0, i64 2
store i32 %10, i32* %11
%12 = getelementptr inbounds i32, i32* %0, i64 3
store i32 %2, i32* %12
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *getcwd(int /*<<< orphan*/ *, int);
char *strdup(char *);
char *dup_cwd() {
  char *tmp, *pt;
  tmp = getcwd(NULL, 1024);
  if (tmp == NULL)
    return (strdup("-"));
  pt = strdup(tmp);
  free(tmp);
  return (pt);
}


x86 assembly (clang, -O0):
<dup_cwd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
xor    %eax,%eax
mov    %eax,%edi
mov    $0x400,%esi
call   1040 <getcwd@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    116a <dup_cwd+0x3a>
lea    0xea4(%rip),%rdi
call   1050 <strdup@plt>
mov    %rax,-0x8(%rbp)
jmp    1188 <dup_cwd+0x58>
mov    -0x10(%rbp),%rdi
call   1050 <strdup@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dup_cwd>:
push   %r14
push   %rbx
push   %rax
xor    %edi,%edi
mov    $0x400,%esi
call   1040 <getcwd@plt>
test   %rax,%rax
je     1166 <dup_cwd+0x36>
mov    %rax,%rbx
mov    %rax,%rdi
call   1050 <strdup@plt>
mov    %rax,%r14
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
lea    0xe93(%rip),%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1050 <strdup@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"-\00"
define i8* @dup_cwd() {
%1 = alloca i8*
%2 = alloca i8*
%3 = alloca i8*
%4 = call i8* @getcwd(i32* null, i32 1024)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
%6 = icmp eq i8* %5, null
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i8* @strdup(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
store i8* %8, i8** %1
br label %15
9: ; preds = %0
%10 = load i8*, i8** %2
%11 = call i8* @strdup(i8* %10)
store i8* %11, i8** %3
%12 = load i8*, i8** %2
%13 = call i32 @free(i8* %12)
%14 = load i8*, i8** %3
store i8* %14, i8** %1
br label %15
15: ; preds = %9, %7
%16 = load i8*, i8** %1
ret i8* %16
}

LLVM IR (-O2):
@.str = [2 x i8] c"-\00"
define noalias i8* @dup_cwd() {
%1 = tail call i8* @getcwd(i32* null, i32 1024)
%2 = icmp eq i8* %1, null
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call dereferenceable_or_null(2) i8* @strdup(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %8
5: ; preds = %0
%6 = tail call i8* @strdup(i8* %1)
%7 = tail call i32 @free(i8* %1)
br label %8
8: ; preds = %5, %3
%9 = phi i8* [ %4, %3 ], [ %6, %5 ]
ret i8* %9
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ usb_ep_ready(int /*<<< orphan*/);
void usb_ep_wait_for_ready(uint8_t ep) {
  while (!usb_ep_ready(ep)) {
  };
}


x86 assembly (clang, -O0):
<usb_ep_wait_for_ready>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <usb_ep_ready@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
test   $0x1,%al
jne    1138 <usb_ep_wait_for_ready+0x28>
jmp    113d <usb_ep_wait_for_ready+0x2d>
jmp    111b <usb_ep_wait_for_ready+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<usb_ep_wait_for_ready>:
push   %rbx
mov    %edi,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    %ebx,%edi
call   1030 <usb_ep_ready@plt>
test   %eax,%eax
je     1120 <usb_ep_wait_for_ready+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @usb_ep_wait_for_ready(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %8, %1
%4 = load i32, i32* %2
%5 = call i32 @usb_ep_ready(i32 %4)
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
br i1 %7, label %8, label %9
8: ; preds = %3
br label %3
9: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @usb_ep_wait_for_ready(i32 %0) {
br label %2
2: ; preds = %2, %1
%3 = tail call i32 @usb_ep_ready(i32 %0)
%4 = icmp eq i32 %3, 0
br i1 %4, label %2, label %5
5: ; preds = %2
ret void
}
void sgi_set_ncyl(void) {}


x86 assembly (clang, -O0):
<sgi_set_ncyl>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sgi_set_ncyl>:
ret

LLVM IR (-O0):
define void @sgi_set_ncyl() {
ret void
}

LLVM IR (-O2):
define void @sgi_set_ncyl() {
ret void
}
char *__gnat_ttyname(int filedes) {
  extern char *ttyname(int);
  return ttyname(filedes);
}


x86 assembly (clang, -O0):
<__gnat_ttyname>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <ttyname@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__gnat_ttyname>:
jmp    1030 <ttyname@plt>

LLVM IR (-O0):
define i8* @__gnat_ttyname(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @ttyname(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @__gnat_ttyname(i32 %0) {
%2 = tail call i8* @ttyname(i32 %0)
ret i8* %2
}
int roi_set_start(unsigned char *buff) {
  buff[0] = (128);
  return 1;
}


x86 assembly (clang, -O0):
<roi_set_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movb   $0x80,(%rax)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<roi_set_start>:
movb   $0x80,(%rdi)
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @roi_set_start(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
store i8 -128, i8* %4
ret i32 1
}

LLVM IR (-O2):
define i32 @roi_set_start(i8* nocapture writeonly %0) {
store i8 -128, i8* %0
ret i32 1
}
/* Variables and functions */
int /*<<< orphan*/ STDOUT_FILENO;
char **backtrace_symbols(void **, int);
int /*<<< orphan*/ dprintf(int /*<<< orphan*/, char *, char *);
int /*<<< orphan*/ free(char **);
void print_ip_sym(unsigned long ip) {
  char **name;
  name = backtrace_symbols((void **)&ip, 1);
  dprintf(STDOUT_FILENO, "%s\n", *name);
  free(name);
}


x86 assembly (clang, -O0):
<print_ip_sym>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1040 <backtrace_symbols@plt>
mov    %rax,-0x10(%rbp)
mov    0x2e9b(%rip),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rax
mov    (%rax),%rdx
lea    0xe9b(%rip),%rsi
call   1050 <dprintf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_ip_sym>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,0x8(%rsp)
lea    0x8(%rsp),%rdi
mov    $0x1,%esi
call   1040 <backtrace_symbols@plt>
mov    %rax,%rbx
mov    0x2e9d(%rip),%rax
mov    (%rax),%edi
mov    (%rbx),%rdx
lea    0xea1(%rip),%rsi
call   1050 <dprintf@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@STDOUT_FILENO = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @print_ip_sym(i64 %0) {
%2 = alloca i64
%3 = alloca i8**
store i64 %0, i64* %2
%4 = bitcast i64* %2 to i8**
%5 = call i8** @backtrace_symbols(i8** %4, i32 1)
store i8** %5, i8*** %3
%6 = load i32, i32* @STDOUT_FILENO
%7 = load i8**, i8*** %3
%8 = load i8*, i8** %7
%9 = call i32 @dprintf(i32 %6, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %8)
%10 = load i8**, i8*** %3
%11 = call i32 @free(i8** %10)
ret void
}

LLVM IR (-O2):
@STDOUT_FILENO = global i32 0
@.str = [4 x i8] c"%s\0A\00"
define void @print_ip_sym(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = bitcast i64* %2 to i8**
%4 = call i8** @backtrace_symbols(i8** %3, i32 1)
%5 = load i32, i32* @STDOUT_FILENO
%6 = load i8*, i8** %4
%7 = call i32 @dprintf(i32 %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %6)
%8 = call i32 @free(i8** %4)
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
uint64_t set64_H_1(uint64_t x) { return x |= 0x8000000000000000; }


x86 assembly (clang, -O0):
<set64_H_1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
movabs $0x8000000000000000,%rcx
or     %rcx,%rax
mov    %eax,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set64_H_1>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @set64_H_1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = or i64 %4, -9223372036854775808
%6 = trunc i64 %5 to i32
store i32 %6, i32* %2
ret i32 %6
}

LLVM IR (-O2):
define i32 @set64_H_1(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void options_print_version() {
  printf("Package version 1.01 \n");
  printf("Report bugs to rick@cs.washington.edu\n");
  printf("Available under the GNU General Public License\n");
}


x86 assembly (clang, -O0):
<options_print_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xef0(%rip),%rdi
call   1030 <printf@plt>
lea    0xf0b(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<options_print_version>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef2(%rip),%rdi
call   1030 <puts@plt>
lea    0xf0c(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"Package version 1.01 \0A\00"
@.str.1 = [39 x i8] c"Report bugs to rick@cs.washington.edu\0A\00"
@.str.2 = [48 x i8] c"Available under the GNU General Public License\0A\00"
define void @options_print_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [22 x i8] c"Package version 1.01 \00"
@str.3 = [38 x i8] c"Report bugs to rick@cs.washington.edu\00"
@str.4 = [47 x i8] c"Available under the GNU General Public License\00"
define void @options_print_version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([22 x i8], [22 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([38 x i8], [38 x i8]* @str.3, i64 0, i64 0))
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([47 x i8], [47 x i8]* @str.4, i64 0, i64 0))
ret void
}
/* Variables and functions */
char getchar();
int charToBin() {
  int Bin;
  char Character = getchar();
  if (Character == 48) {
    Bin = 0;
  } else if (Character == 49) {
    Bin = 1;
  } else
    Bin = 666;
  return Bin;
}


x86 assembly (clang, -O0):
<charToBin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <getchar@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jne    113b <charToBin+0x2b>
movl   $0x0,-0x4(%rbp)
jmp    1160 <charToBin+0x50>
movsbl -0x5(%rbp),%eax
cmp    $0x31,%eax
jne    1154 <charToBin+0x44>
movl   $0x1,-0x4(%rbp)
jmp    115b <charToBin+0x4b>
movl   $0x29a,-0x4(%rbp)
jmp    1160 <charToBin+0x50>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<charToBin>:
push   %rbx
xor    %ebx,%ebx
xor    %eax,%eax
call   1030 <getchar@plt>
cmp    $0x31,%al
mov    $0x1,%edx
mov    $0x29a,%ecx
cmove  %edx,%ecx
cmp    $0x30,%al
cmove  %ebx,%ecx
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @charToBin() {
%1 = alloca i32
%2 = alloca i8
%3 = call signext i8 (...) @getchar()
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = icmp eq i32 %5, 48
br i1 %6, label %7, label %8
7: ; preds = %0
store i32 0, i32* %1
br label %15
8: ; preds = %0
%9 = load i8, i8* %2
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %10, 49
br i1 %11, label %12, label %13
12: ; preds = %8
store i32 1, i32* %1
br label %14
13: ; preds = %8
store i32 666, i32* %1
br label %14
14: ; preds = %13, %12
br label %15
15: ; preds = %14, %7
%16 = load i32, i32* %1
ret i32 %16
}

LLVM IR (-O2):
define i32 @charToBin() {
%1 = tail call signext i8 (...) @getchar()
%2 = icmp eq i8 %1, 49
%3 = select i1 %2, i32 1, i32 666
%4 = icmp eq i8 %1, 48
%5 = select i1 %4, i32 0, i32 %3
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void f(int x, int y) { assert(x < y); }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
xor    %eax,%eax
cmp    %esi,%edi
setl   %al
mov    %eax,%edi
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @f(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
%8 = zext i1 %7 to i32
%9 = call i32 @assert(i32 %8)
ret void
}

LLVM IR (-O2):
define void @f(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = zext i1 %3 to i32
%5 = tail call i32 @assert(i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ getche();
int /*<<< orphan*/ putchar(char);
main() {
  char c;
  int i;
  i = 10;
  char j;
  c = 'A';
  j = c;
  putchar(j);
  getche();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0xa,-0x8(%rbp)
movb   $0x41,-0x1(%rbp)
mov    -0x1(%rbp),%al
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%edi
call   1030 <putchar@plt>
mov    $0x0,%al
call   1040 <getche@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x41,%edi
call   1030 <putchar@plt>
xor    %eax,%eax
call   1040 <getche@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i8
%2 = alloca i32
%3 = alloca i8
store i32 10, i32* %2
store i8 65, i8* %1
%4 = load i8, i8* %1
store i8 %4, i8* %3
%5 = load i8, i8* %3
%6 = call i32 @putchar(i8 signext %5)
%7 = call i32 (...) @getche()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @putchar(i8 signext 65)
%2 = tail call i32 (...) @getche()
ret i32 0
}
void intel_cln_imr_lockall(void) {}


x86 assembly (clang, -O0):
<intel_cln_imr_lockall>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<intel_cln_imr_lockall>:
ret

LLVM IR (-O0):
define void @intel_cln_imr_lockall() {
ret void
}

LLVM IR (-O2):
define void @intel_cln_imr_lockall() {
ret void
}
void chomp(char *ptr) {
  while (*ptr != '\n') {
    ptr++;
  }
  *ptr = '\0';
}


x86 assembly (clang, -O0):
<chomp>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
je     1129 <chomp+0x29>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <chomp+0x8>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<chomp>:
cmpb   $0xa,(%rdi)
lea    0x1(%rdi),%rdi
jne    1100 <chomp>
movb   $0x0,-0x1(%rdi)
ret

LLVM IR (-O0):
define void @chomp(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 10
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
store i8 0, i8* %12
ret void
}

LLVM IR (-O2):
define void @chomp(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %6, %2 ]
%4 = load i8, i8* %3
%5 = icmp eq i8 %4, 10
%6 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %5, label %7, label %2
7: ; preds = %2
store i8 0, i8* %3
ret void
}
/* Type definitions */
struct drm_intel_decode {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ free(struct drm_intel_decode *);
void drm_intel_decode_context_free(struct drm_intel_decode *ctx) { free(ctx); }


x86 assembly (clang, -O0):
<drm_intel_decode_context_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<drm_intel_decode_context_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
%struct.drm_intel_decode = type { i32 }
define void @drm_intel_decode_context_free(%struct.drm_intel_decode* %0) {
%2 = alloca %struct.drm_intel_decode*
store %struct.drm_intel_decode* %0, %struct.drm_intel_decode** %2
%3 = load %struct.drm_intel_decode*, %struct.drm_intel_decode** %2
%4 = call i32 @free(%struct.drm_intel_decode* %3)
ret void
}

LLVM IR (-O2):
%struct.drm_intel_decode = type { i32 }
define void @drm_intel_decode_context_free(%struct.drm_intel_decode* nocapture %0) {
%2 = tail call i32 @free(%struct.drm_intel_decode* %0)
ret void
}
void Dummy(char *str) {}


x86 assembly (clang, -O0):
<Dummy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<Dummy>:
ret

LLVM IR (-O0):
define void @Dummy(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @Dummy(i8* nocapture %0) {
ret void
}
__attribute__((always_)) int hypervisor_init(void) { return 0; }


x86 assembly (clang, -O0):
<hypervisor_init>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hypervisor_init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @hypervisor_init() {
ret i32 0
}

LLVM IR (-O2):
define i32 @hypervisor_init() {
ret i32 0
}
/* Variables and functions */
void *malloc(int);
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, int);
void *malloc_and_zero(int n) {
  void *p = malloc(n);
  if (p) {
    memset(p, 0, n);
  }
  return p;
}


x86 assembly (clang, -O0):
<malloc_and_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1150 <malloc_and_zero+0x30>
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
xor    %esi,%esi
call   1030 <memset@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<malloc_and_zero>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
call   1040 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     113e <malloc_and_zero+0x1e>
mov    %rbx,%rdi
xor    %esi,%esi
mov    %ebp,%edx
call   1030 <memset@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i8* @malloc_and_zero(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i8* @malloc(i32 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = load i32, i32* %2
%11 = call i32 @memset(i8* %9, i32 0, i32 %10)
br label %12
12: ; preds = %8, %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
define i8* @malloc_and_zero(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @memset(i8* %2, i32 0, i32 %0)
br label %6
6: ; preds = %4, %1
ret i8* %2
}
/* Type definitions */
struct Stack {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ S_destroy(struct Stack *);
struct Stack *S_pop(struct Stack *);
struct Stack *S_push(struct Stack *, int);
int main() {
  struct Stack *s = 0;
  s = S_push(s, 1);
  s = S_push(s, 2);
  s = S_push(s, 3);
  s = S_pop(s);
  S_destroy(s);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x1,%esi
call   1050 <S_push@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2,%esi
call   1050 <S_push@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x3,%esi
call   1050 <S_push@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <S_pop@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <S_destroy@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
mov    $0x1,%esi
call   1050 <S_push@plt>
mov    %rax,%rdi
mov    $0x2,%esi
call   1050 <S_push@plt>
mov    %rax,%rdi
mov    $0x3,%esi
call   1050 <S_push@plt>
mov    %rax,%rdi
call   1040 <S_pop@plt>
mov    %rax,%rdi
call   1030 <S_destroy@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.Stack = type { i32 }
define i32 @main() {
%1 = alloca i32
%2 = alloca %struct.Stack*
store i32 0, i32* %1
store %struct.Stack* null, %struct.Stack** %2
%3 = load %struct.Stack*, %struct.Stack** %2
%4 = call %struct.Stack* @S_push(%struct.Stack* %3, i32 1)
store %struct.Stack* %4, %struct.Stack** %2
%5 = load %struct.Stack*, %struct.Stack** %2
%6 = call %struct.Stack* @S_push(%struct.Stack* %5, i32 2)
store %struct.Stack* %6, %struct.Stack** %2
%7 = load %struct.Stack*, %struct.Stack** %2
%8 = call %struct.Stack* @S_push(%struct.Stack* %7, i32 3)
store %struct.Stack* %8, %struct.Stack** %2
%9 = load %struct.Stack*, %struct.Stack** %2
%10 = call %struct.Stack* @S_pop(%struct.Stack* %9)
store %struct.Stack* %10, %struct.Stack** %2
%11 = load %struct.Stack*, %struct.Stack** %2
%12 = call i32 @S_destroy(%struct.Stack* %11)
ret i32 0
}

LLVM IR (-O2):
%struct.Stack = type { i32 }
define i32 @main() {
%1 = tail call %struct.Stack* @S_push(%struct.Stack* null, i32 1)
%2 = tail call %struct.Stack* @S_push(%struct.Stack* %1, i32 2)
%3 = tail call %struct.Stack* @S_push(%struct.Stack* %2, i32 3)
%4 = tail call %struct.Stack* @S_pop(%struct.Stack* %3)
%5 = tail call i32 @S_destroy(%struct.Stack* %4)
ret i32 0
}
void BN_RECP_CTX_set(void) {}


x86 assembly (clang, -O0):
<BN_RECP_CTX_set>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BN_RECP_CTX_set>:
ret

LLVM IR (-O0):
define void @BN_RECP_CTX_set() {
ret void
}

LLVM IR (-O2):
define void @BN_RECP_CTX_set() {
ret void
}
void wifi_evt_sme_ap_mode_failed(
    const struct wifi_msg_sme_ap_mode_failed_evt_t *msg) {}


x86 assembly (clang, -O0):
<wifi_evt_sme_ap_mode_failed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_evt_sme_ap_mode_failed>:
ret

LLVM IR (-O0):
%struct.wifi_msg_sme_ap_mode_failed_evt_t = type opaque
define void @wifi_evt_sme_ap_mode_failed(%struct.wifi_msg_sme_ap_mode_failed_evt_t* %0) {
%2 = alloca %struct.wifi_msg_sme_ap_mode_failed_evt_t*
store %struct.wifi_msg_sme_ap_mode_failed_evt_t* %0, %struct.wifi_msg_sme_ap_mode_failed_evt_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_sme_ap_mode_failed_evt_t = type opaque
define void @wifi_evt_sme_ap_mode_failed(%struct.wifi_msg_sme_ap_mode_failed_evt_t* nocapture %0) {
ret void
}
void sig_deliver_signal() {}


x86 assembly (clang, -O0):
<sig_deliver_signal>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sig_deliver_signal>:
ret

LLVM IR (-O0):
define void @sig_deliver_signal() {
ret void
}

LLVM IR (-O2):
define void @sig_deliver_signal() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ foo();
int main(int argc, char **argv) {
  int i;
  i = 0;
  foo();
  return i;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    $0x0,%al
call   1030 <foo@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32 0, i32* %6
%7 = call i32 (...) @foo()
%8 = load i32, i32* %6
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @foo()
ret i32 0
}
int host_state_notify(struct host_notify_dev *ndev, int state) { return 0; }


x86 assembly (clang, -O0):
<host_state_notify>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<host_state_notify>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.host_notify_dev = type opaque
define i32 @host_state_notify(%struct.host_notify_dev* %0, i32 %1) {
%3 = alloca %struct.host_notify_dev*
%4 = alloca i32
store %struct.host_notify_dev* %0, %struct.host_notify_dev** %3
store i32 %1, i32* %4
ret i32 0
}

LLVM IR (-O2):
%struct.host_notify_dev = type opaque
define i32 @host_state_notify(%struct.host_notify_dev* nocapture readnone %0, i32 %1) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ clock_t;

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ __set_errno(int /*<<< orphan*/);
clock_t clock(void) {
  __set_errno(ENOSYS);
  return (clock_t)-1;
}


x86 assembly (clang, -O0):
<clock>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clock>:
push   %rax
mov    0x2ed0(%rip),%rax
mov    (%rax),%edi
call   1030 <__set_errno@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
define i32 @clock() {
%1 = load i32, i32* @ENOSYS
%2 = call i32 @__set_errno(i32 %1)
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
define i32 @clock() {
%1 = load i32, i32* @ENOSYS
%2 = tail call i32 @__set_errno(i32 %1)
ret i32 -1
}
/* Variables and functions */
long double cosd(long double);
long double cosd_neg(long double x) { return -cosd(x); }


x86 assembly (clang, -O0):
<cosd_neg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <cosd@plt>
fchs
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cosd_neg>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
fstpt  (%rsp)
call   1030 <cosd@plt>
fchs
add    $0x18,%rsp
ret

LLVM IR (-O0):
define x86_fp80 @cosd_neg(x86_fp80 %0) {
%2 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%3 = load x86_fp80, x86_fp80* %2
%4 = call x86_fp80 @cosd(x86_fp80 %3)
%5 = fneg x86_fp80 %4
ret x86_fp80 %5
}

LLVM IR (-O2):
define x86_fp80 @cosd_neg(x86_fp80 %0) {
%2 = tail call x86_fp80 @cosd(x86_fp80 %0)
%3 = fneg x86_fp80 %2
ret x86_fp80 %3
}
int sys_sigreturn(struct tcb *tcp) { return 0; }


x86 assembly (clang, -O0):
<sys_sigreturn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_sigreturn>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.tcb = type opaque
define i32 @sys_sigreturn(%struct.tcb* %0) {
%2 = alloca %struct.tcb*
store %struct.tcb* %0, %struct.tcb** %2
ret i32 0
}

LLVM IR (-O2):
%struct.tcb = type opaque
define i32 @sys_sigreturn(%struct.tcb* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ init_encoders();
int /*<<< orphan*/ init_motor_controller();
int /*<<< orphan*/ left_position_encoder_interrupt_init();
int /*<<< orphan*/ right_position_encoder_interrupt_init();
int /*<<< orphan*/ timer5_int();
void motor_init(void) {
  init_motor_controller();
  init_encoders();
  timer5_int();
  left_position_encoder_interrupt_init();
  right_position_encoder_interrupt_init();
}


x86 assembly (clang, -O0):
<motor_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <init_motor_controller@plt>
mov    $0x0,%al
call   1030 <init_encoders@plt>
mov    $0x0,%al
call   1070 <timer5_int@plt>
mov    $0x0,%al
call   1060 <left_position_encoder_interrupt_init@plt>
mov    $0x0,%al
call   1040 <right_position_encoder_interrupt_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<motor_init>:
push   %rax
xor    %eax,%eax
call   1050 <init_motor_controller@plt>
xor    %eax,%eax
call   1030 <init_encoders@plt>
xor    %eax,%eax
call   1070 <timer5_int@plt>
xor    %eax,%eax
call   1060 <left_position_encoder_interrupt_init@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <right_position_encoder_interrupt_init@plt>

LLVM IR (-O0):
define void @motor_init() {
%1 = call i32 (...) @init_motor_controller()
%2 = call i32 (...) @init_encoders()
%3 = call i32 (...) @timer5_int()
%4 = call i32 (...) @left_position_encoder_interrupt_init()
%5 = call i32 (...) @right_position_encoder_interrupt_init()
ret void
}

LLVM IR (-O2):
define void @motor_init() {
%1 = tail call i32 (...) @init_motor_controller()
%2 = tail call i32 (...) @init_encoders()
%3 = tail call i32 (...) @timer5_int()
%4 = tail call i32 (...) @left_position_encoder_interrupt_init()
%5 = tail call i32 (...) @right_position_encoder_interrupt_init()
ret void
}
/* Variables and functions */
uintptr_t fcitx_utils_align_to(uintptr_t len, uintptr_t align) {
  uintptr_t left;
  if ((left = len % align))
    return len + align - left;
  return len;
}


x86 assembly (clang, -O0):
<fcitx_utils_align_to>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmp    $0x0,%rdx
je     113b <fcitx_utils_align_to+0x3b>
mov    -0x10(%rbp),%rax
add    -0x18(%rbp),%rax
sub    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1143 <fcitx_utils_align_to+0x43>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fcitx_utils_align_to>:
mov    %rdi,%rax
or     %rsi,%rax
shr    $0x20,%rax
je     1116 <fcitx_utils_align_to+0x16>
mov    %rdi,%rax
xor    %edx,%edx
div    %rsi
jmp    111c <fcitx_utils_align_to+0x1c>
mov    %edi,%eax
xor    %edx,%edx
div    %esi
add    %rdi,%rsi
sub    %rdx,%rsi
test   %rdx,%rdx
cmove  %rdi,%rsi
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @fcitx_utils_align_to(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
%7 = load i64, i64* %4
%8 = load i64, i64* %5
%9 = urem i64 %7, %8
store i64 %9, i64* %6
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %17
11: ; preds = %2
%12 = load i64, i64* %4
%13 = load i64, i64* %5
%14 = add i64 %12, %13
%15 = load i64, i64* %6
%16 = sub i64 %14, %15
store i64 %16, i64* %3
br label %19
17: ; preds = %2
%18 = load i64, i64* %4
store i64 %18, i64* %3
br label %19
19: ; preds = %17, %11
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @fcitx_utils_align_to(i64 %0, i64 %1) {
%3 = urem i64 %0, %1
%4 = icmp eq i64 %3, 0
%5 = add i64 %1, %0
%6 = sub i64 %5, %3
%7 = select i1 %4, i64 %0, i64 %6
ret i64 %7
}
/* Type definitions */
typedef char uint8_t;

/* Variables and functions */
int /*<<< orphan*/ CC_SPI_Transfer(int, char *, int /*<<< orphan*/, int);
void TI_CC_SPIWriteReg(int fd, char addr, char value) {
  uint8_t buf[2];
  buf[0] = addr;
  buf[1] = value;
  CC_SPI_Transfer(fd, buf, 0, 2);
}


x86 assembly (clang, -O0):
<TI_CC_SPIWriteReg>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dl,%al
mov    %sil,%cl
mov    %edi,-0x4(%rbp)
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    -0x5(%rbp),%al
mov    %al,-0x8(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x7(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
xor    %edx,%edx
mov    $0x2,%ecx
call   1030 <CC_SPI_Transfer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TI_CC_SPIWriteReg>:
push   %rax
mov    %sil,0x6(%rsp)
mov    %dl,0x7(%rsp)
lea    0x6(%rsp),%rsi
xor    %edx,%edx
mov    $0x2,%ecx
call   1030 <CC_SPI_Transfer@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @TI_CC_SPIWriteReg(i32 %0, i8 signext %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i8
%6 = alloca i8
%7 = alloca [2 x i8]
store i32 %0, i32* %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%8 = load i8, i8* %5
%9 = getelementptr inbounds [2 x i8], [2 x i8]* %7, i64 0, i64 0
store i8 %8, i8* %9
%10 = load i8, i8* %6
%11 = getelementptr inbounds [2 x i8], [2 x i8]* %7, i64 0, i64 1
store i8 %10, i8* %11
%12 = load i32, i32* %4
%13 = getelementptr inbounds [2 x i8], [2 x i8]* %7, i64 0, i64 0
%14 = call i32 @CC_SPI_Transfer(i32 %12, i8* %13, i32 0, i32 2)
ret void
}

LLVM IR (-O2):
define void @TI_CC_SPIWriteReg(i32 %0, i8 signext %1, i8 signext %2) {
%4 = alloca [2 x i8]
%5 = getelementptr inbounds [2 x i8], [2 x i8]* %4, i64 0, i64 0
store i8 %1, i8* %5
%6 = getelementptr inbounds [2 x i8], [2 x i8]* %4, i64 0, i64 1
store i8 %2, i8* %6
%7 = call i32 @CC_SPI_Transfer(i32 %0, i8* %5, i32 0, i32 2)
ret void
}
int test_imm_6Dint16_reg(short val) {
  return ((val) & (0x6D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_6Dint16_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movswl -0x2(%rbp),%edx
and    $0x6d,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_6Dint16_reg>:
test   $0x6d,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_6Dint16_reg(i16 signext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = sext i16 %3 to i32
%5 = and i32 %4, 109
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_6Dint16_reg(i16 signext %0) {
%2 = and i16 %0, 109
%3 = icmp eq i16 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
double add2(double number1, double number2) { return number1 + number2; }


x86 assembly (clang, -O0):
<add2>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<add2>:
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @add2(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @add2(double %0, double %1) {
%3 = fadd double %0, %1
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
int isqrt(int);
void t_sqrt_30() {
  Assert_real((isqrt(30) == 5),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/stdlib/isqrt.c",
              155, ("Integer square root of 30 should be 5"));
}


x86 assembly (clang, -O0):
<t_sqrt_30>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1e,%edi
call   1030 <isqrt@plt>
cmp    $0x5,%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xec0(%rip),%rsi
mov    $0x9b,%edx
lea    0xf56(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_sqrt_30>:
push   %rax
mov    $0x1e,%edi
call   1030 <isqrt@plt>
xor    %edi,%edi
cmp    $0x5,%eax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf60(%rip),%rcx
mov    $0x9b,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [38 x i8] c"Integer square root of 30 should be 5\00"
define void @t_sqrt_30() {
%1 = call i32 @isqrt(i32 30)
%2 = icmp eq i32 %1, 5
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 155, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [162 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/stdlib/isqrt.c\00"
@.str.1 = [38 x i8] c"Integer square root of 30 should be 5\00"
define void @t_sqrt_30() {
%1 = tail call i32 @isqrt(i32 30)
%2 = icmp eq i32 %1, 5
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([162 x i8], [162 x i8]* @.str, i64 0, i64 0), i32 155, i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ GPIODirModeSet(int /*<<< orphan*/, int /*<<< orphan*/, int);
int /*<<< orphan*/ GPIOPadConfigSet(int /*<<< orphan*/, int /*<<< orphan*/, int,
                                    int);
void GPIOPinTypeCIR(uint32_t ui32Port, uint8_t ui8Pins) {
  ;
  GPIODirModeSet(ui32Port, ui8Pins, 0x00000002);
  GPIOPadConfigSet(ui32Port, ui8Pins, 0x00000001, 0x00000008);
}


x86 assembly (clang, -O0):
<GPIOPinTypeCIR>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    $0x1,%edx
mov    $0x8,%ecx
call   1030 <GPIOPadConfigSet@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GPIOPinTypeCIR>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebx
mov    %edi,%ebp
mov    $0x2,%edx
call   1040 <GPIODirModeSet@plt>
mov    %ebp,%edi
mov    %ebx,%esi
mov    $0x1,%edx
mov    $0x8,%ecx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <GPIOPadConfigSet@plt>

LLVM IR (-O0):
define void @GPIOPinTypeCIR(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @GPIODirModeSet(i32 %5, i32 %6, i32 2)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = call i32 @GPIOPadConfigSet(i32 %8, i32 %9, i32 1, i32 8)
ret void
}

LLVM IR (-O2):
define void @GPIOPinTypeCIR(i32 %0, i32 %1) {
%3 = tail call i32 @GPIODirModeSet(i32 %0, i32 %1, i32 2)
%4 = tail call i32 @GPIOPadConfigSet(i32 %0, i32 %1, i32 1, i32 8)
ret void
}
int ft_strcf(char *str, char c) {
  int i;
  i = -1;
  while (*(str + (++i))) {
    if (*(str + i) == c)
      return (i);
  }
  return (-1);
}


x86 assembly (clang, -O0):
<ft_strcf>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
movl   $0xffffffff,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%ecx
add    $0x1,%ecx
mov    %ecx,-0x18(%rbp)
movslq %ecx,%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1157 <ft_strcf+0x57>
mov    -0x10(%rbp),%rax
movslq -0x18(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0x11(%rbp),%ecx
cmp    %ecx,%eax
jne    1152 <ft_strcf+0x52>
mov    -0x18(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115e <ft_strcf+0x5e>
jmp    1115 <ft_strcf+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strcf>:
mov    $0xffffffff,%eax
cs nopw 0x0(%rax,%rax,1)
nop
movzbl (%rdi),%ecx
test   %cl,%cl
je     1124 <ft_strcf+0x24>
add    $0x1,%eax
add    $0x1,%rdi
cmp    %sil,%cl
jne    1110 <ft_strcf+0x10>
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @ft_strcf(i8* %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i32
store i8* %0, i8** %4
store i8 %1, i8* %5
store i32 -1, i32* %6
br label %7
7: ; preds = %27, %2
%8 = load i8*, i8** %4
%9 = load i32, i32* %6
%10 = add nsw i32 %9, 1
store i32 %10, i32* %6
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i8, i8* %8, i64 %11
%13 = load i8, i8* %12
%14 = icmp ne i8 %13, 0
br i1 %14, label %15, label %28
15: ; preds = %7
%16 = load i8*, i8** %4
%17 = load i32, i32* %6
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = load i8, i8* %5
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %21, %23
br i1 %24, label %25, label %27
25: ; preds = %15
%26 = load i32, i32* %6
store i32 %26, i32* %3
br label %29
27: ; preds = %15
br label %7
28: ; preds = %7
store i32 -1, i32* %3
br label %29
29: ; preds = %28, %25
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @ft_strcf(i8* nocapture %0, i8 signext %1) {
br label %3
3: ; preds = %9, %2
%4 = phi i64 [ %5, %9 ], [ -1, %2 ]
%5 = add nsw i64 %4, 1
%6 = getelementptr inbounds i8, i8* %0, i64 %5
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %3
%10 = icmp eq i8 %7, %1
br i1 %10, label %11, label %3
11: ; preds = %9
%12 = trunc i64 %5 to i32
br label %13
13: ; preds = %3, %11
%14 = phi i32 [ %12, %11 ], [ -1, %3 ]
ret i32 %14
}
/* Type definitions */
struct timespec {
  int /*<<< orphan*/ tv_nsec;
  int /*<<< orphan*/ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int /*<<< orphan*/, int /*<<< orphan*/);
void bot_timespec_print(struct timespec *a) {
  printf("%li.%09li\n", a->tv_sec, a->tv_nsec);
}


x86 assembly (clang, -O0):
<bot_timespec_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%esi
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bot_timespec_print>:
mov    (%rdi),%edx
mov    0x4(%rdi),%esi
lea    0xee4(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
@.str = [11 x i8] c"%li.%09li\0A\00"
define void @bot_timespec_print(%struct.timespec* %0) {
%2 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %2
%3 = load %struct.timespec*, %struct.timespec** %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
%5 = load i32, i32* %4
%6 = load %struct.timespec*, %struct.timespec** %2
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %6, i32 0, i32 0
%8 = load i32, i32* %7
%9 = call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %5, i32 %8)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
@.str = [11 x i8] c"%li.%09li\0A\00"
define void @bot_timespec_print(%struct.timespec* nocapture %0) {
%2 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
%3 = load i32, i32* %2
%4 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%5 = load i32, i32* %4
%6 = tail call i32 @printf(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %5)
ret void
}
/* Variables and functions */
unsigned char galois_mult_by_two(unsigned char);
unsigned char galois_mult_by_three(unsigned char val) {
  return galois_mult_by_two(val) ^ val;
}


x86 assembly (clang, -O0):
<galois_mult_by_three>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <galois_mult_by_two@plt>
movzbl %al,%eax
movzbl -0x1(%rbp),%ecx
xor    %ecx,%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<galois_mult_by_three>:
push   %rbx
mov    %edi,%ebx
call   1030 <galois_mult_by_two@plt>
xor    %bl,%al
pop    %rbx
ret

LLVM IR (-O0):
define zeroext i8 @galois_mult_by_three(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call zeroext i8 @galois_mult_by_two(i8 zeroext %3)
%5 = zext i8 %4 to i32
%6 = load i8, i8* %2
%7 = zext i8 %6 to i32
%8 = xor i32 %5, %7
%9 = trunc i32 %8 to i8
ret i8 %9
}

LLVM IR (-O2):
define zeroext i8 @galois_mult_by_three(i8 zeroext %0) {
%2 = tail call zeroext i8 @galois_mult_by_two(i8 zeroext %0)
%3 = xor i8 %2, %0
ret i8 %3
}
int test_02(unsigned char *a, unsigned char *b, int c, int d) {
  if (*a != 0 && *b == 0)
    return c;
  return d;
}


x86 assembly (clang, -O0):
<test_02>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %ecx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x0,%eax
je     113d <test_02+0x3d>
mov    -0x18(%rbp),%rax
movzbl (%rax),%eax
cmp    $0x0,%eax
jne    113d <test_02+0x3d>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1143 <test_02+0x43>
mov    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_02>:
cmpb   $0x0,(%rdi)
je     110c <test_02+0xc>
mov    %edx,%eax
cmpb   $0x0,(%rsi)
je     110e <test_02+0xe>
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_02(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
%9 = alloca i32
store i8* %0, i8** %6
store i8* %1, i8** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i8*, i8** %6
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = icmp ne i32 %12, 0
br i1 %13, label %14, label %21
14: ; preds = %4
%15 = load i8*, i8** %7
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = icmp eq i32 %17, 0
br i1 %18, label %19, label %21
19: ; preds = %14
%20 = load i32, i32* %8
store i32 %20, i32* %5
br label %23
21: ; preds = %14, %4
%22 = load i32, i32* %9
store i32 %22, i32* %5
br label %23
23: ; preds = %21, %19
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
define i32 @test_02(i8* nocapture %0, i8* nocapture %1, i32 %2, i32 %3) {
%5 = load i8, i8* %0
%6 = icmp eq i8 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %4
%8 = load i8, i8* %1
%9 = icmp eq i8 %8, 0
br i1 %9, label %11, label %10
10: ; preds = %7, %4
br label %11
11: ; preds = %7, %10
%12 = phi i32 [ %3, %10 ], [ %2, %7 ]
ret i32 %12
}
/* Variables and functions */
int /*<<< orphan*/ displayRegisters();
int /*<<< orphan*/ instructionCycles(void **);
void trace(void *memptr) {
  instructionCycles(&memptr);
  displayRegisters();
}


x86 assembly (clang, -O0):
<trace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0x8(%rbp),%rdi
call   1030 <instructionCycles@plt>
mov    $0x0,%al
call   1040 <displayRegisters@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<trace>:
push   %rax
mov    %rdi,(%rsp)
mov    %rsp,%rdi
call   1030 <instructionCycles@plt>
xor    %eax,%eax
call   1040 <displayRegisters@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @trace(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @instructionCycles(i8** %2)
%4 = call i32 (...) @displayRegisters()
ret void
}

LLVM IR (-O2):
define void @trace(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @instructionCycles(i8** %2)
%4 = call i32 (...) @displayRegisters()
ret void
}