xunge/DecIR huggingface dataset:
/* Type definitions */
struct uart_port {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ msm_write(struct uart_port *, int, int);
void msm_serial_set_mnd_regs_tcxoby4(struct uart_port *port) {
  msm_write(port, 0x18, 0x0028);
  msm_write(port, 0xF6, 0x002C);
  msm_write(port, 0x0F, 0x0030);
  msm_write(port, 0x0A, 0x0034);
}


x86 assembly (clang, -O0):
<msm_serial_set_mnd_regs_tcxoby4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x18,%esi
mov    $0x28,%edx
call   1030 <msm_write@plt>
mov    -0x8(%rbp),%rdi
mov    $0xf6,%esi
mov    $0x2c,%edx
call   1030 <msm_write@plt>
mov    -0x8(%rbp),%rdi
mov    $0xf,%esi
mov    $0x30,%edx
call   1030 <msm_write@plt>
mov    -0x8(%rbp),%rdi
mov    $0xa,%esi
mov    $0x34,%edx
call   1030 <msm_write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm_serial_set_mnd_regs_tcxoby4>:
push   %rbx
mov    %rdi,%rbx
mov    $0x18,%esi
mov    $0x28,%edx
call   1030 <msm_write@plt>
mov    %rbx,%rdi
mov    $0xf6,%esi
mov    $0x2c,%edx
call   1030 <msm_write@plt>
mov    %rbx,%rdi
mov    $0xf,%esi
mov    $0x30,%edx
call   1030 <msm_write@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
mov    $0x34,%edx
pop    %rbx
jmp    1030 <msm_write@plt>

LLVM IR (-O0):
%struct.uart_port = type { i32 }
define void @msm_serial_set_mnd_regs_tcxoby4(%struct.uart_port* %0) {
%2 = alloca %struct.uart_port*
store %struct.uart_port* %0, %struct.uart_port** %2
%3 = load %struct.uart_port*, %struct.uart_port** %2
%4 = call i32 @msm_write(%struct.uart_port* %3, i32 24, i32 40)
%5 = load %struct.uart_port*, %struct.uart_port** %2
%6 = call i32 @msm_write(%struct.uart_port* %5, i32 246, i32 44)
%7 = load %struct.uart_port*, %struct.uart_port** %2
%8 = call i32 @msm_write(%struct.uart_port* %7, i32 15, i32 48)
%9 = load %struct.uart_port*, %struct.uart_port** %2
%10 = call i32 @msm_write(%struct.uart_port* %9, i32 10, i32 52)
ret void
}

LLVM IR (-O2):
%struct.uart_port = type { i32 }
define void @msm_serial_set_mnd_regs_tcxoby4(%struct.uart_port* %0) {
%2 = tail call i32 @msm_write(%struct.uart_port* %0, i32 24, i32 40)
%3 = tail call i32 @msm_write(%struct.uart_port* %0, i32 246, i32 44)
%4 = tail call i32 @msm_write(%struct.uart_port* %0, i32 15, i32 48)
%5 = tail call i32 @msm_write(%struct.uart_port* %0, i32 10, i32 52)
ret void
}
void rt_low_level_init(void) {}


x86 assembly (clang, -O0):
<rt_low_level_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rt_low_level_init>:
ret

LLVM IR (-O0):
define void @rt_low_level_init() {
ret void
}

LLVM IR (-O2):
define void @rt_low_level_init() {
ret void
}
float fabs3(float a) {
  int tmp = *(int *)&a;
  tmp &= 0x7FFFFFFF;
  return *(float *)&tmp;
}


x86 assembly (clang, -O0):
<fabs3>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x7fffffff,%eax
mov    %eax,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fabs3>:
andps  0xef9(%rip),%xmm0
ret

LLVM IR (-O0):
define float @fabs3(float %0) {
%2 = alloca float
%3 = alloca i32
store float %0, float* %2
%4 = bitcast float* %2 to i32*
%5 = load i32, i32* %4
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = and i32 %6, 2147483647
store i32 %7, i32* %3
%8 = bitcast i32* %3 to float*
%9 = load float, float* %8
ret float %9
}

LLVM IR (-O2):
define float @fabs3(float %0) {
%2 = bitcast float %0 to i32
%3 = and i32 %2, 2147483647
%4 = bitcast i32 %3 to float
ret float %4
}
/* Variables and functions */
float DDSLittleFloat(float src) { return src; }


x86 assembly (clang, -O0):
<DDSLittleFloat>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<DDSLittleFloat>:
ret

LLVM IR (-O0):
define float @DDSLittleFloat(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
ret float %3
}

LLVM IR (-O2):
define float @DDSLittleFloat(float returned %0) {
ret float %0
}
int test_imm_95int32_mem(int *val) {
  return ((*val) & (0x95 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_95int32_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edx
and    $0x95,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_95int32_mem>:
testb  $0x95,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_95int32_mem(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = and i32 %4, 149
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_95int32_mem(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = and i32 %2, 149
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
unsigned long Riff_GenerateChunkName(unsigned char A, unsigned char B,
                                     unsigned char C, unsigned char D) {
  return (unsigned long)((A << 24) | (B << 16) | (C << 8) | D);
}


x86 assembly (clang, -O0):
<Riff_GenerateChunkName>:
push   %rbp
mov    %rsp,%rbp
mov    %cl,%al
mov    %dl,%cl
mov    %sil,%dl
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %dl,-0x2(%rbp)
mov    %cl,-0x3(%rbp)
mov    %al,-0x4(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x18,%eax
movzbl -0x2(%rbp),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
movzbl -0x3(%rbp),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
movzbl -0x4(%rbp),%ecx
or     %ecx,%eax
cltq
pop    %rbp
ret

x86 assembly (clang, -O2):
<Riff_GenerateChunkName>:
shl    $0x18,%edi
shl    $0x10,%esi
or     %edi,%esi
shl    $0x8,%edx
or     %esi,%edx
or     %ecx,%edx
movslq %edx,%rax
ret

LLVM IR (-O0):
define i64 @Riff_GenerateChunkName(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8 %0, i8* %5
store i8 %1, i8* %6
store i8 %2, i8* %7
store i8 %3, i8* %8
%9 = load i8, i8* %5
%10 = zext i8 %9 to i32
%11 = shl i32 %10, 24
%12 = load i8, i8* %6
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 16
%15 = or i32 %11, %14
%16 = load i8, i8* %7
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = or i32 %15, %18
%20 = load i8, i8* %8
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
%23 = sext i32 %22 to i64
ret i64 %23
}

LLVM IR (-O2):
define i64 @Riff_GenerateChunkName(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2, i8 zeroext %3) {
%5 = zext i8 %0 to i32
%6 = shl nuw i32 %5, 24
%7 = zext i8 %1 to i32
%8 = shl nuw nsw i32 %7, 16
%9 = or i32 %8, %6
%10 = zext i8 %2 to i32
%11 = shl nuw nsw i32 %10, 8
%12 = or i32 %9, %11
%13 = zext i8 %3 to i32
%14 = or i32 %12, %13
%15 = sext i32 %14 to i64
ret i64 %15
}
int getmaxcolor() { return 32 - 1; }


x86 assembly (clang, -O0):
<getmaxcolor>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1f,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getmaxcolor>:
mov    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @getmaxcolor() {
ret i32 31
}

LLVM IR (-O2):
define i32 @getmaxcolor() {
ret i32 31
}
/* Variables and functions */
int /*<<< orphan*/ error(char *);
int Xelse(int status, char *label, char *mnemo, char *oper) {
  if (oper) {
    error("no operand allowed for ELSE");
  }
  return 0x12;
}


x86 assembly (clang, -O0):
<Xelse>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
je     113e <Xelse+0x2e>
lea    0xec7(%rip),%rdi
call   1030 <error@plt>
mov    $0x12,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Xelse>:
test   %rcx,%rcx
je     1126 <Xelse+0x16>
push   %rax
lea    0xee3(%rip),%rdi
call   1030 <error@plt>
add    $0x8,%rsp
mov    $0x12,%eax
ret

LLVM IR (-O0):
@.str = [28 x i8] c"no operand allowed for ELSE\00"
define i32 @Xelse(i32 %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i32 %0, i32* %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %8
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %4
%12 = call i32 @error(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %4
ret i32 18
}

LLVM IR (-O2):
@.str = [28 x i8] c"no operand allowed for ELSE\00"
define i32 @Xelse(i32 %0, i8* nocapture readnone %1, i8* nocapture readnone %2, i8* readnone %3) {
%5 = icmp eq i8* %3, null
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @error(i8* getelementptr inbounds ([28 x i8], [28 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6, %4
ret i32 18
}
/* Variables and functions */
scalar_t__ is_decimal(char);
bool is_hexadecimal(char c) {
  return is_decimal(c) || ((c | 32) >= 'a' && (c | 32) <= 'f');
}


x86 assembly (clang, -O0):
<is_hexadecimal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <is_decimal@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    1164 <is_hexadecimal+0x54>
movsbl -0x1(%rbp),%ecx
or     $0x20,%ecx
xor    %eax,%eax
cmp    $0x61,%ecx
mov    %al,-0x3(%rbp)
jl     115e <is_hexadecimal+0x4e>
movsbl -0x1(%rbp),%eax
or     $0x20,%eax
cmp    $0x66,%eax
setle  %al
mov    %al,-0x3(%rbp)
mov    -0x3(%rbp),%al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_hexadecimal>:
push   %rbx
mov    %edi,%ebx
call   1030 <is_decimal@plt>
test   %rax,%rax
setne  %al
or     $0x20,%bl
add    $0x9f,%bl
cmp    $0x6,%bl
setb   %cl
or     %al,%cl
movzbl %cl,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @is_hexadecimal(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @is_decimal(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = or i32 %8, 32
%10 = icmp sge i32 %9, 97
br i1 %10, label %11, label %16
11: ; preds = %6
%12 = load i8, i8* %2
%13 = sext i8 %12 to i32
%14 = or i32 %13, 32
%15 = icmp sle i32 %14, 102
br label %16
16: ; preds = %11, %6
%17 = phi i1 [ false, %6 ], [ %15, %11 ]
br label %18
18: ; preds = %16, %1
%19 = phi i1 [ true, %1 ], [ %17, %16 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_hexadecimal(i8 signext %0) {
%2 = tail call i64 @is_decimal(i8 signext %0)
%3 = icmp ne i64 %2, 0
%4 = or i8 %0, 32
%5 = add i8 %4, -97
%6 = icmp ult i8 %5, 6
%7 = or i1 %6, %3
%8 = zext i1 %7 to i32
ret i32 %8
}
long signed_im11(i)
unsigned long i;
{ return ((i & 1) ? 0xfffffc00 : 0) | ((i >> 1) & 0x3ff); }


x86 assembly (clang, -O0):
<signed_im11>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x1,%rdx
xor    %eax,%eax
mov    $0xfffffc00,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %eax,%eax
mov    -0x8(%rbp),%rcx
shr    $0x1,%rcx
and    $0x3ff,%rcx
or     %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<signed_im11>:
mov    %edi,%eax
and    $0x1,%eax
neg    %eax
and    $0xfffffc00,%eax
shr    %edi
and    $0x3ff,%edi
or     %rdi,%rax
ret

LLVM IR (-O0):
define i64 @signed_im11(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 1
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -1024, i32 0
%8 = zext i32 %7 to i64
%9 = load i64, i64* %2
%10 = lshr i64 %9, 1
%11 = and i64 %10, 1023
%12 = or i64 %8, %11
ret i64 %12
}

LLVM IR (-O2):
define i64 @signed_im11(i64 %0) {
%2 = and i64 %0, 1
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i64 0, i64 4294966272
%5 = lshr i64 %0, 1
%6 = and i64 %5, 1023
%7 = or i64 %4, %6
ret i64 %7
}
void RTSpinlockAcquire(void) {}


x86 assembly (clang, -O0):
<RTSpinlockAcquire>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTSpinlockAcquire>:
ret

LLVM IR (-O0):
define void @RTSpinlockAcquire() {
ret void
}

LLVM IR (-O2):
define void @RTSpinlockAcquire() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __CRAB_assert(int);
int foo(int);
int bar(int x) {
  int y = foo(x);
  __CRAB_assert(y == x);
  return y;
}


x86 assembly (clang, -O0):
<bar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <foo@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__CRAB_assert@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bar>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
call   1040 <foo@plt>
mov    %eax,%ebp
xor    %edi,%edi
cmp    %ebx,%eax
sete   %dil
call   1030 <__CRAB_assert@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @bar(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @foo(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
%7 = load i32, i32* %2
%8 = icmp eq i32 %6, %7
%9 = zext i1 %8 to i32
%10 = call i32 @__CRAB_assert(i32 %9)
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @bar(i32 %0) {
%2 = tail call i32 @foo(i32 %0)
%3 = icmp eq i32 %2, %0
%4 = zext i1 %3 to i32
%5 = tail call i32 @__CRAB_assert(i32 %4)
ret i32 %2
}
void up_init_gauge_mail(int amm) {}


x86 assembly (clang, -O0):
<up_init_gauge_mail>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<up_init_gauge_mail>:
ret

LLVM IR (-O0):
define void @up_init_gauge_mail(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @up_init_gauge_mail(i32 %0) {
ret void
}
/* Variables and functions */
char *strcat(char *, char const *);
int strlen(char const *);
char *append(char *buf, const char *s, size_t size) {
  if (strlen(buf) + strlen(s) + 1 >= size)
    return NULL;
  return strcat(buf, s);
}


x86 assembly (clang, -O0):
<append>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x24(%rbp),%eax
add    %ecx,%eax
add    $0x1,%eax
cltq
cmp    -0x20(%rbp),%rax
jb     116c <append+0x4c>
movq   $0x0,-0x8(%rbp)
jmp    117d <append+0x5d>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <strcat@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<append>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rdx,%r15
mov    %rsi,%r14
mov    %rdi,%rbx
call   1030 <strlen@plt>
mov    %eax,%r12d
mov    %r14,%rdi
call   1030 <strlen@plt>
add    %r12d,%eax
add    $0x1,%eax
cltq
cmp    %r15,%rax
jae    115b <append+0x3b>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <strcat@plt>
jmp    115d <append+0x3d>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @append(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
store i8* %0, i8** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%8 = load i8*, i8** %5
%9 = call i32 @strlen(i8* %8)
%10 = load i8*, i8** %6
%11 = call i32 @strlen(i8* %10)
%12 = add nsw i32 %9, %11
%13 = add nsw i32 %12, 1
%14 = sext i32 %13 to i64
%15 = load i64, i64* %7
%16 = icmp uge i64 %14, %15
br i1 %16, label %17, label %18
17: ; preds = %3
store i8* null, i8** %4
br label %22
18: ; preds = %3
%19 = load i8*, i8** %5
%20 = load i8*, i8** %6
%21 = call i8* @strcat(i8* %19, i8* %20)
store i8* %21, i8** %4
br label %22
22: ; preds = %18, %17
%23 = load i8*, i8** %4
ret i8* %23
}

LLVM IR (-O2):
define i8* @append(i8* %0, i8* %1, i64 %2) {
%4 = tail call i32 @strlen(i8* %0)
%5 = tail call i32 @strlen(i8* %1)
%6 = add i32 %4, 1
%7 = add i32 %6, %5
%8 = sext i32 %7 to i64
%9 = icmp ult i64 %8, %2
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = tail call i8* @strcat(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
br label %12
12: ; preds = %3, %10
%13 = phi i8* [ %0, %10 ], [ null, %3 ]
ret i8* %13
}
/* Type definitions */
typedef char *uint64_t;

/* Variables and functions */
uint64_t ROL64_29(uint64_t x) {
  __asm__("rolq $29, %0" : "=r"(x) : "0"(x));
  return x;
}


x86 assembly (clang, -O0):
<ROL64_29>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
rol    $0x1d,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ROL64_29>:
mov    %rdi,%rax
rol    $0x1d,%rax
ret

LLVM IR (-O0):
define i8* @ROL64_29(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* asm "rolq $$29, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %3)
store i8* %4, i8** %2
%5 = load i8*, i8** %2
ret i8* %5
}

LLVM IR (-O2):
define i8* @ROL64_29(i8* readnone %0) {
%2 = tail call i8* asm "rolq $$29, $0", "=r,0,~{dirflag},~{fpsr},~{flags}"(i8* %0)
ret i8* %2
}
/* Type definitions */
typedef int __m128i;

/* Variables and functions */
__m128i __attribute__((__always___, __nodebug__))
_mm_and_si128(__m128i a, __m128i b) {
  return a & b;
}


x86 assembly (clang, -O0):
<_mm_and_si128>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
and    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mm_and_si128>:
mov    %edi,%eax
and    %esi,%eax
ret

LLVM IR (-O0):
define i32 @_mm_and_si128(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = and i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @_mm_and_si128(i32 %0, i32 %1) {
%3 = and i32 %1, %0
ret i32 %3
}
void testClosureDLLrV(void (*closure)(double, long long), double a1,
                      long long a2) {
  (*closure)(a1, a2);
}


x86 assembly (clang, -O0):
<testClosureDLLrV>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movsd  -0x10(%rbp),%xmm0
mov    -0x18(%rbp),%rdi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testClosureDLLrV>:
mov    %rdi,%rax
mov    %rsi,%rdi
jmp    *%rax

LLVM IR (-O0):
define void @testClosureDLLrV(void (double, i64)* %0, double %1, i64 %2) {
%4 = alloca void (double, i64)*
%5 = alloca double
%6 = alloca i64
store void (double, i64)* %0, void (double, i64)** %4
store double %1, double* %5
store i64 %2, i64* %6
%7 = load void (double, i64)*, void (double, i64)** %4
%8 = load double, double* %5
%9 = load i64, i64* %6
ret void
}

LLVM IR (-O2):
define void @testClosureDLLrV(void (double, i64)* nocapture %0, double %1, i64 %2) {
tail call void %0(double %1, i64 %2)
ret void
}
int collatz(int wert) {
  int anzahl = 0;
  while (wert > 1) {
    ++anzahl;
    if (wert % 2 == 0)
      wert /= 2;
    else
      wert = (wert * 3) + 1;
    if (wert < 0) {
      return -1;
      break;
    }
  }
  return anzahl;
}


x86 assembly (clang, -O0):
<collatz>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
cmpl   $0x1,-0x8(%rbp)
jle    116d <collatz+0x6d>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1148 <collatz+0x48>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    1152 <collatz+0x52>
imul   $0x3,-0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jge    1168 <collatz+0x68>
movl   $0xffffffff,-0x4(%rbp)
jmp    1173 <collatz+0x73>
jmp    110e <collatz+0xe>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<collatz>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
cmp    $0x2,%edi
jl     1130 <collatz+0x30>
add    $0x1,%eax
mov    %edi,%ecx
shr    %ecx
test   $0x1,%dil
lea    0x1(%rdi,%rdi,2),%edi
cmove  %ecx,%edi
test   %edi,%edi
jns    1110 <collatz+0x10>
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @collatz(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 0, i32* %4
br label %5
5: ; preds = %25, %1
%6 = load i32, i32* %3
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %26
8: ; preds = %5
%9 = load i32, i32* %4
%10 = add nsw i32 %9, 1
store i32 %10, i32* %4
%11 = load i32, i32* %3
%12 = srem i32 %11, 2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %8
%15 = load i32, i32* %3
%16 = sdiv i32 %15, 2
store i32 %16, i32* %3
br label %21
17: ; preds = %8
%18 = load i32, i32* %3
%19 = mul nsw i32 %18, 3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %21
21: ; preds = %17, %14
%22 = load i32, i32* %3
%23 = icmp slt i32 %22, 0
br i1 %23, label %24, label %25
24: ; preds = %21
store i32 -1, i32* %2
br label %28
25: ; preds = %21
br label %5
26: ; preds = %5
%27 = load i32, i32* %4
store i32 %27, i32* %2
br label %28
28: ; preds = %26, %24
%29 = load i32, i32* %2
ret i32 %29
}

LLVM IR (-O2):
define i32 @collatz(i32 %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i32 [ %0, %1 ], [ %13, %6 ]
%4 = phi i32 [ 0, %1 ], [ %7, %6 ]
%5 = icmp sgt i32 %3, 1
br i1 %5, label %6, label %15
6: ; preds = %2
%7 = add nuw nsw i32 %4, 1
%8 = and i32 %3, 1
%9 = icmp eq i32 %8, 0
%10 = lshr i32 %3, 1
%11 = mul nsw i32 %3, 3
%12 = add nsw i32 %11, 1
%13 = select i1 %9, i32 %10, i32 %12
%14 = icmp slt i32 %13, 0
br i1 %14, label %15, label %2
15: ; preds = %2, %6
%16 = phi i32 [ -1, %6 ], [ %4, %2 ]
ret i32 %16
}
/* Type definitions */
struct sfmt_state_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gen_rand64(struct sfmt_state_t *);
double to_res53(int /*<<< orphan*/);
double genrand_res53(struct sfmt_state_t *s) { return to_res53(gen_rand64(s)); }


x86 assembly (clang, -O0):
<genrand_res53>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <gen_rand64@plt>
mov    %eax,%edi
call   1030 <to_res53@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<genrand_res53>:
push   %rax
call   1040 <gen_rand64@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <to_res53@plt>

LLVM IR (-O0):
%struct.sfmt_state_t = type { i32 }
define double @genrand_res53(%struct.sfmt_state_t* %0) {
%2 = alloca %struct.sfmt_state_t*
store %struct.sfmt_state_t* %0, %struct.sfmt_state_t** %2
%3 = load %struct.sfmt_state_t*, %struct.sfmt_state_t** %2
%4 = call i32 @gen_rand64(%struct.sfmt_state_t* %3)
%5 = call double @to_res53(i32 %4)
ret double %5
}

LLVM IR (-O2):
%struct.sfmt_state_t = type { i32 }
define double @genrand_res53(%struct.sfmt_state_t* %0) {
%2 = tail call i32 @gen_rand64(%struct.sfmt_state_t* %0)
%3 = tail call double @to_res53(i32 %2)
ret double %3
}
/* Variables and functions */
int bar(int);
int foo(int x) { return bar(x) * 2; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <bar@plt>
shl    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
push   %rax
call   1030 <bar@plt>
add    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @bar(i32 %3)
%5 = mul nsw i32 %4, 2
ret i32 %5
}

LLVM IR (-O2):
define i32 @foo(i32 %0) {
%2 = tail call i32 @bar(i32 %0)
%3 = shl nsw i32 %2, 1
ret i32 %3
}
int sscanf(char *x, char *y, ...) {
  int a;
  return a;
}


x86 assembly (clang, -O0):
<sscanf>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sscanf>:
ret

LLVM IR (-O0):
define i32 @sscanf(i8* %0, i8* %1, ...) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i32, i32* %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @sscanf(i8* nocapture readnone %0, i8* nocapture readnone %1, ...) {
ret i32 undef
}
long double square_root_helper(double long const x, double long *k) {
  return x * x - *k;
}


x86 assembly (clang, -O0):
<square_root_helper>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
mov    %rdi,-0x18(%rbp)
fldt   -0x10(%rbp)
mov    -0x18(%rbp),%rax
fldt   (%rax)
fxch   %st(1)
fmul   %st,%st(0)
fsubp  %st,%st(1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<square_root_helper>:
fldt   0x8(%rsp)
fldt   (%rdi)
fxch   %st(1)
fmul   %st,%st(0)
fsubp  %st,%st(1)
ret

LLVM IR (-O0):
define x86_fp80 @square_root_helper(x86_fp80 %0, x86_fp80* %1) {
%3 = alloca x86_fp80
%4 = alloca x86_fp80*
store x86_fp80 %0, x86_fp80* %3
store x86_fp80* %1, x86_fp80** %4
%5 = load x86_fp80, x86_fp80* %3
%6 = load x86_fp80, x86_fp80* %3
%7 = load x86_fp80*, x86_fp80** %4
%8 = load x86_fp80, x86_fp80* %7
%9 = fneg x86_fp80 %8
%10 = call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %5, x86_fp80 %6, x86_fp80 %9)
ret x86_fp80 %10
}

LLVM IR (-O2):
define x86_fp80 @square_root_helper(x86_fp80 %0, x86_fp80* nocapture %1) {
%3 = load x86_fp80, x86_fp80* %1
%4 = fneg x86_fp80 %3
%5 = tail call x86_fp80 @llvm.fmuladd.f80(x86_fp80 %0, x86_fp80 %0, x86_fp80 %4)
ret x86_fp80 %5
}
void log_wrapper(int level, const char *msg, void *usrptr) {
  void (*xlog)(int level, char *msg) = usrptr;
  xlog(level, (char *)msg);
}


x86 assembly (clang, -O0):
<log_wrapper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_wrapper>:
jmp    *%rdx

LLVM IR (-O0):
define void @log_wrapper(i32 %0, i8* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca void (i32, i8*)*
store i32 %0, i32* %4
store i8* %1, i8** %5
store i8* %2, i8** %6
%8 = load i8*, i8** %6
%9 = bitcast i8* %8 to void (i32, i8*)*
store void (i32, i8*)* %9, void (i32, i8*)** %7
%10 = load void (i32, i8*)*, void (i32, i8*)** %7
%11 = load i32, i32* %4
%12 = load i8*, i8** %5
ret void
}

LLVM IR (-O2):
define void @log_wrapper(i32 %0, i8* %1, i8* nocapture %2) {
%4 = bitcast i8* %2 to void (i32, i8*)*
tail call void %4(i32 %0, i8* %1)
ret void
}
/* Variables and functions */
int EOF;
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("Value of EOF as     integer is: %d\n", EOF);
  printf("Value of EOF as       octal is: %o\n", EOF);
  printf("Value of EOF as hexadecimal is: %x\n", EOF);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%esi
lea    0xedc(%rip),%rdi
call   1030 <printf@plt>
mov    0x2eb8(%rip),%rax
mov    (%rax),%esi
lea    0xeeb(%rip),%rdi
call   1030 <printf@plt>
mov    0x2ea3(%rip),%rax
mov    (%rax),%esi
lea    0xefa(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
mov    0x2ed0(%rip),%rbx
mov    (%rbx),%esi
lea    0xedf(%rip),%rdi
call   1030 <printf@plt>
mov    (%rbx),%esi
lea    0xef5(%rip),%rdi
call   1030 <printf@plt>
mov    (%rbx),%esi
lea    0xf0b(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [36 x i8] c"Value of EOF as integer is: %d\0A\00"
@EOF = global i32 0
@.str.1 = [36 x i8] c"Value of EOF as octal is: %o\0A\00"
@.str.2 = [36 x i8] c"Value of EOF as hexadecimal is: %x\0A\00"
define i32 @main() {
%1 = load i32, i32* @EOF
%2 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EOF
%4 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @EOF
%6 = call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.2, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [36 x i8] c"Value of EOF as integer is: %d\0A\00"
@EOF = global i32 0
@.str.1 = [36 x i8] c"Value of EOF as octal is: %o\0A\00"
@.str.2 = [36 x i8] c"Value of EOF as hexadecimal is: %x\0A\00"
define i32 @main() {
%1 = load i32, i32* @EOF
%2 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str, i64 0, i64 0), i32 %1)
%3 = load i32, i32* @EOF
%4 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.1, i64 0, i64 0), i32 %3)
%5 = load i32, i32* @EOF
%6 = tail call i32 @printf(i8* getelementptr inbounds ([36 x i8], [36 x i8]* @.str.2, i64 0, i64 0), i32 %5)
ret i32 0
}
float fi(float x) { return 2 * x; }


x86 assembly (clang, -O0):
<fi>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  0xeef(%rip),%xmm0
mulss  -0x4(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fi>:
addss  %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @fi(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = fmul float 2.000000e+00, %3
ret float %4
}

LLVM IR (-O2):
define float @fi(float %0) {
%2 = fmul float %0, 2.000000e+00
ret float %2
}
/* Variables and functions */
int rightShift(int, int);
int getOpcode(int instruction) { return rightShift(instruction, 26); }


x86 assembly (clang, -O0):
<getOpcode>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x1a,%esi
call   1030 <rightShift@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getOpcode>:
mov    $0x1a,%esi
jmp    1030 <rightShift@plt>

LLVM IR (-O0):
define i32 @getOpcode(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @rightShift(i32 %3, i32 26)
ret i32 %4
}

LLVM IR (-O2):
define i32 @getOpcode(i32 %0) {
%2 = tail call i32 @rightShift(i32 %0, i32 26)
ret i32 %2
}
const char *__malidrv_build_info(void) {
  return "malidrv:  CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=10 REPO_URL= "
         "REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Fri Apr 12 "
         "23:51:35 IST 2013 BUILD=DEBUG CPU=ux500 USING_UMP=1 USING_HWMEM=1 "
         "USING_PMM=1 USING_MALI200=0 USING_MALI400=3 USING_MALI400_L2_CACHE=1 "
         "USING_GP2=0 KDIR= MALI_PLATFORM_FILE=platform/ux500/mali_platform.c "
         "OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=6 USING_PROFILING=0 "
         "USING_GPU_UTILIZATION=1 USING_MALI_RUN_TIME_PM=0";
}


x86 assembly (clang, -O0):
<__malidrv_build_info>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__malidrv_build_info>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [436 x i8] c"malidrv: CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=10 REPO_URL= REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Fri Apr 12 23:51:35 IST 2013 BUILD=DEBUG CPU=ux500 USING_UMP=1 USING_HWMEM=1 USING_PMM=1 USING_MALI200=0 USING_MALI400=3 USING_MALI400_L2_CACHE=1 USING_GP2=0 KDIR= MALI_PLATFORM_FILE=platform/ux500/mali_platform.c OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=6 USING_PROFILING=0 USING_GPU_UTILIZATION=1 USING_MALI_RUN_TIME_PM=0\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([436 x i8], [436 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [436 x i8] c"malidrv: CONFIG=ux500 USING_OS_MEMORY=1 API_VERSION=10 REPO_URL= REVISION= CHANGED_REVISION= CHANGE_DATE= BUILD_DATE=Fri Apr 12 23:51:35 IST 2013 BUILD=DEBUG CPU=ux500 USING_UMP=1 USING_HWMEM=1 USING_PMM=1 USING_MALI200=0 USING_MALI400=3 USING_MALI400_L2_CACHE=1 USING_GP2=0 KDIR= MALI_PLATFORM_FILE=platform/ux500/mali_platform.c OS_MEMORY_KERNEL_BUFFER_SIZE_IN_MB=6 USING_PROFILING=0 USING_GPU_UTILIZATION=1 USING_MALI_RUN_TIME_PM=0\00"
define i8* @__malidrv_build_info() {
ret i8* getelementptr inbounds ([436 x i8], [436 x i8]* @.str, i64 0, i64 0)
}
void DH_OpenSSL(void) {}


x86 assembly (clang, -O0):
<DH_OpenSSL>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DH_OpenSSL>:
ret

LLVM IR (-O0):
define void @DH_OpenSSL() {
ret void
}

LLVM IR (-O2):
define void @DH_OpenSSL() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ LittleEndianWriteU64(int /*<<< orphan*/,
                                        int /*<<< orphan*/ *);
void LittleEndianWriteF64(double value, uint8_t *bytes) {
  union {
    double f64;
    uint64_t u64;
  } u;
  u.f64 = value;
  LittleEndianWriteU64(u.u64, bytes);
}


x86 assembly (clang, -O0):
<LittleEndianWriteF64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x18(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <LittleEndianWriteU64@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LittleEndianWriteF64>:
mov    %rdi,%rsi
movq   %xmm0,%rdi
jmp    1030 <LittleEndianWriteU64@plt>

LLVM IR (-O0):
%union.anon = type { double }
define void @LittleEndianWriteF64(double %0, i32* %1) {
%3 = alloca double
%4 = alloca i32*
%5 = alloca %union.anon
store double %0, double* %3
store i32* %1, i32** %4
%6 = load double, double* %3
%7 = bitcast %union.anon* %5 to double*
store double %6, double* %7
%8 = bitcast %union.anon* %5 to i32*
%9 = load i32, i32* %8
%10 = load i32*, i32** %4
%11 = call i32 @LittleEndianWriteU64(i32 %9, i32* %10)
ret void
}

LLVM IR (-O2):
define void @LittleEndianWriteF64(double %0, i32* %1) {
%3 = bitcast double %0 to i64
%4 = trunc i64 %3 to i32
%5 = tail call i32 @LittleEndianWriteU64(i32 %4, i32* %1)
ret void
}
/* Variables and functions */
double swe_degnorm(double);
double swe_difdeg2n(double, double);
double swe_deg_midp(double x1, double x0) {
  double d, y;
  d = swe_difdeg2n(x1, x0);
  y = swe_degnorm(x0 + d / 2);
  return (y);
}


x86 assembly (clang, -O0):
<swe_deg_midp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
call   1030 <swe_difdeg2n@plt>
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
movsd  0xea8(%rip),%xmm2
divsd  %xmm2,%xmm1
addsd  %xmm1,%xmm0
call   1040 <swe_degnorm@plt>
movsd  %xmm0,-0x20(%rbp)
movsd  -0x20(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<swe_deg_midp>:
push   %rax
movsd  %xmm1,(%rsp)
call   1030 <swe_difdeg2n@plt>
mulsd  0xecd(%rip),%xmm0
addsd  (%rsp),%xmm0
pop    %rax
jmp    1040 <swe_degnorm@plt>

LLVM IR (-O0):
define double @swe_deg_midp(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %3
store double %1, double* %4
%7 = load double, double* %3
%8 = load double, double* %4
%9 = call double @swe_difdeg2n(double %7, double %8)
store double %9, double* %5
%10 = load double, double* %4
%11 = load double, double* %5
%12 = fdiv double %11, 2.000000e+00
%13 = fadd double %10, %12
%14 = call double @swe_degnorm(double %13)
store double %14, double* %6
%15 = load double, double* %6
ret double %15
}

LLVM IR (-O2):
define double @swe_deg_midp(double %0, double %1) {
%3 = tail call double @swe_difdeg2n(double %0, double %1)
%4 = fmul double %3, 5.000000e-01
%5 = fadd double %4, %1
%6 = tail call double @swe_degnorm(double %5)
ret double %6
}
void gsize_inc(void *g, unsigned int pos) { ++((unsigned int *)g)[pos]; }


x86 assembly (clang, -O0):
<gsize_inc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    (%rax,%rcx,4),%edx
add    $0x1,%edx
mov    %edx,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<gsize_inc>:
mov    %esi,%eax
addl   $0x1,(%rdi,%rax,4)
ret

LLVM IR (-O0):
define void @gsize_inc(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %4
%8 = zext i32 %7 to i64
%9 = getelementptr inbounds i32, i32* %6, i64 %8
%10 = load i32, i32* %9
%11 = add i32 %10, 1
store i32 %11, i32* %9
ret void
}

LLVM IR (-O2):
define void @gsize_inc(i8* nocapture %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = zext i32 %1 to i64
%5 = getelementptr inbounds i32, i32* %3, i64 %4
%6 = load i32, i32* %5
%7 = add i32 %6, 1
store i32 %7, i32* %5
ret void
}
/* Variables and functions */
float fmax(float a, float b) { return (a > b) ? a : b; }


x86 assembly (clang, -O0):
<fmax>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    112c <fmax+0x2c>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
jmp    1136 <fmax+0x36>
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmax>:
maxss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @fmax(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = fcmp ogt float %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load float, float* %3
br label %12
10: ; preds = %2
%11 = load float, float* %4
br label %12
12: ; preds = %10, %8
%13 = phi float [ %9, %8 ], [ %11, %10 ]
ret float %13
}

LLVM IR (-O2):
define float @fmax(float %0, float %1) {
%3 = fcmp ogt float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stdout;
int main(void) {
  fprintf(stdout, "Hello, World!\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
lea    0xed1(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdout = global i32 0
@.str = [15 x i8] c"Hello, World!\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* @stdout
%3 = call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@stdout = global i32 0
@.str = [15 x i8] c"Hello, World!\0A\00"
define i32 @main() {
%1 = load i32, i32* @stdout
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ abort();
char *malloc(scalar_t__);
int /*<<< orphan*/ strcpy(char *, char *);
scalar_t__ strlen(char *);
char *scopy(char *str) {
  char *s;
  if ((s = malloc(strlen((char *)str) + 1)) == NULL)
    abort();
  strcpy(s, str);
  return (s);
}


x86 assembly (clang, -O0):
<scopy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1050 <strlen@plt>
mov    %rax,%rdi
add    $0x1,%rdi
call   1060 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmp    $0x0,%rax
jne    1176 <scopy+0x36>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1040 <strcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<scopy>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1050 <strlen@plt>
lea    0x1(%rax),%rdi
call   1060 <malloc@plt>
test   %rax,%rax
je     1173 <scopy+0x33>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r14,%rsi
call   1040 <strcpy@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @scopy(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @strlen(i8* %4)
%6 = add nsw i64 %5, 1
%7 = call i8* @malloc(i64 %6)
store i8* %7, i8** %3
%8 = icmp eq i8* %7, null
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 (...) @abort()
unreachable
11: ; preds = %1
%12 = load i8*, i8** %3
%13 = load i8*, i8** %2
%14 = call i32 @strcpy(i8* %12, i8* %13)
%15 = load i8*, i8** %3
ret i8* %15
}

LLVM IR (-O2):
define i8* @scopy(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = add nsw i64 %2, 1
%4 = tail call i8* @malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %1
%9 = tail call i32 @strcpy(i8* %4, i8* %0)
ret i8* %4
}
/* Type definitions */
struct timespec {
  int tv_sec;
  long tv_nsec;
};

/* Variables and functions */
long time_diff(struct timespec *x, struct timespec *y) {
  return (x->tv_sec - y->tv_sec) * 1e9 + (x->tv_nsec - y->tv_nsec);
}


x86 assembly (clang, -O0):
<time_diff>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
cvtsi2sd %eax,%xmm0
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
mov    -0x10(%rbp),%rcx
sub    0x8(%rcx),%rax
cvtsi2sd %rax,%xmm1
movsd  0xec7(%rip),%xmm2
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_diff>:
mov    (%rdi),%eax
sub    (%rsi),%eax
cvtsi2sd %eax,%xmm0
mov    0x8(%rdi),%rax
sub    0x8(%rsi),%rax
cvtsi2sd %rax,%xmm1
mulsd  0xee3(%rip),%xmm0
addsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i64 }
define i64 @time_diff(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %3
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 0
%7 = load i32, i32* %6
%8 = load %struct.timespec*, %struct.timespec** %4
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %8, i32 0, i32 0
%10 = load i32, i32* %9
%11 = sub nsw i32 %7, %10
%12 = sitofp i32 %11 to double
%13 = load %struct.timespec*, %struct.timespec** %3
%14 = getelementptr inbounds %struct.timespec, %struct.timespec* %13, i32 0, i32 1
%15 = load i64, i64* %14
%16 = load %struct.timespec*, %struct.timespec** %4
%17 = getelementptr inbounds %struct.timespec, %struct.timespec* %16, i32 0, i32 1
%18 = load i64, i64* %17
%19 = sub nsw i64 %15, %18
%20 = sitofp i64 %19 to double
%21 = call double @llvm.fmuladd.f64(double %12, double 1.000000e+09, double %20)
%22 = fptosi double %21 to i64
ret i64 %22
}

LLVM IR (-O2):
%struct.timespec = type { i32, i64 }
define i64 @time_diff(%struct.timespec* nocapture %0, %struct.timespec* nocapture %1) {
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%4 = load i32, i32* %3
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%6 = load i32, i32* %5
%7 = sub nsw i32 %4, %6
%8 = sitofp i32 %7 to double
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
%10 = load i64, i64* %9
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%12 = load i64, i64* %11
%13 = sub nsw i64 %10, %12
%14 = sitofp i64 %13 to double
%15 = tail call double @llvm.fmuladd.f64(double %8, double 1.000000e+09, double %14)
%16 = fptosi double %15 to i64
ret i64 %16
}
void __asan_report_store_n() {}


x86 assembly (clang, -O0):
<__asan_report_store_n>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__asan_report_store_n>:
ret

LLVM IR (-O0):
define void @__asan_report_store_n() {
ret void
}

LLVM IR (-O2):
define void @__asan_report_store_n() {
ret void
}
/* Variables and functions */
int isalnum(int);
void test_alnum_concrete(int v) {
  int ret = isalnum(256);
  (void)ret;
}


x86 assembly (clang, -O0):
<test_alnum_concrete>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x100,%edi
call   1030 <isalnum@plt>
mov    %eax,-0x8(%rbp)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_alnum_concrete>:
ret

LLVM IR (-O0):
define void @test_alnum_concrete(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 @isalnum(i32 256)
store i32 %4, i32* %3
%5 = load i32, i32* %3
ret void
}

LLVM IR (-O2):
define void @test_alnum_concrete(i32 %0) {
ret void
}
/* Variables and functions */
int munmap(char *, int);
int unmapMemory(char *memory_address, int size) {
  return munmap(memory_address, size);
}


x86 assembly (clang, -O0):
<unmapMemory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <munmap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unmapMemory>:
jmp    1030 <munmap@plt>

LLVM IR (-O0):
define i32 @unmapMemory(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @munmap(i8* %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @unmapMemory(i8* %0, i32 %1) {
%3 = tail call i32 @munmap(i8* %0, i32 %1)
ret i32 %3
}
int base64_blksize_enc() { return 4; }


x86 assembly (clang, -O0):
<base64_blksize_enc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<base64_blksize_enc>:
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @base64_blksize_enc() {
ret i32 4
}

LLVM IR (-O2):
define i32 @base64_blksize_enc() {
ret i32 4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void display_usage(void) {
  printf("Command Line Arguments:\n -n --num-samples 	number of samples "
         "(rounded to the next integer)\n -v --verbose		enable "
         "verbosity\n -vv --extra-verbose    extra verbosity (Prints timer "
         "output, etc.)\n -l --log <logfile>	optional  logfile for errors "
         "and non-data output\n -o --output <outfile> 	optional file for "
         "program data output\n Program takes input file on stdin\n");
  return;
}


x86 assembly (clang, -O0):
<display_usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<display_usage>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [358 x i8] c"Command Line Arguments:\0A -n --num-samples \09number of samples (rounded to the next integer)\0A -v --verbose\09\09enable verbosity\0A -vv --extra-verbose extra verbosity (Prints timer output, etc.)\0A -l --log <logfile>\09optional logfile for errors and non-data output\0A -o --output <outfile> \09optional file for program data output\0A Program takes input file on stdin\0A\00"
define void @display_usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([358 x i8], [358 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [357 x i8] c"Command Line Arguments:\0A -n --num-samples \09number of samples (rounded to the next integer)\0A -v --verbose\09\09enable verbosity\0A -vv --extra-verbose extra verbosity (Prints timer output, etc.)\0A -l --log <logfile>\09optional logfile for errors and non-data output\0A -o --output <outfile> \09optional file for program data output\0A Program takes input file on stdin\00"
define void @display_usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([357 x i8], [357 x i8]* @str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
unsigned char close_image_file(FILE *output) {
  fclose(output);
  return 0;
}


x86 assembly (clang, -O0):
<close_image_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fclose@plt>
xor    %eax,%eax
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<close_image_file>:
push   %rax
call   1030 <fclose@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define zeroext i8 @close_image_file(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fclose(i32* %3)
ret i8 0
}

LLVM IR (-O2):
define zeroext i8 @close_image_file(i32* nocapture %0) {
%2 = tail call i32 @fclose(i32* %0)
ret i8 0
}