xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned int UINT_MAX;
int /*<<< orphan*/ abort();
void test02(unsigned int a, unsigned int b) {
  if (a >= 12)
    if (b > 15)
      if (a - b < UINT_MAX - 15U)
        abort();
}


x86 assembly (clang, -O0):
<test02>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0xc,-0x4(%rbp)
jb     115d <test02+0x4d>
cmpl   $0xf,-0x8(%rbp)
jbe    1158 <test02+0x48>
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    0x2ea9(%rip),%rcx
mov    (%rcx),%ecx
sub    $0xf,%ecx
cmp    %ecx,%eax
jae    1153 <test02+0x43>
mov    $0x0,%al
call   1030 <abort@plt>
jmp    1158 <test02+0x48>
jmp    115d <test02+0x4d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test02>:
push   %rax
cmp    $0xc,%edi
jb     112d <test02+0x1d>
cmp    $0x10,%esi
jb     112d <test02+0x1d>
sub    %esi,%edi
mov    0x2ec4(%rip),%rax
mov    (%rax),%eax
add    $0xfffffff1,%eax
cmp    %eax,%edi
jb     112f <test02+0x1f>
pop    %rax
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@UINT_MAX = global i32 0
define void @test02(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp uge i32 %5, 12
br i1 %6, label %7, label %21
7: ; preds = %2
%8 = load i32, i32* %4
%9 = icmp ugt i32 %8, 15
br i1 %9, label %10, label %20
10: ; preds = %7
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = sub i32 %11, %12
%14 = load i32, i32* @UINT_MAX
%15 = sub i32 %14, 15
%16 = icmp ult i32 %13, %15
br i1 %16, label %17, label %19
17: ; preds = %10
%18 = call i32 (...) @abort()
unreachable
19: ; preds = %10
br label %20
20: ; preds = %19, %7
br label %21
21: ; preds = %20, %2
ret void
}

LLVM IR (-O2):
@UINT_MAX = global i32 0
define void @test02(i32 %0, i32 %1) {
%3 = icmp ugt i32 %0, 11
%4 = icmp ugt i32 %1, 15
%5 = and i1 %3, %4
br i1 %5, label %6, label %13
6: ; preds = %2
%7 = sub i32 %0, %1
%8 = load i32, i32* @UINT_MAX
%9 = add i32 %8, -15
%10 = icmp ult i32 %7, %9
br i1 %10, label %11, label %13
11: ; preds = %6
%12 = tail call i32 (...) @abort()
unreachable
13: ; preds = %6, %2
ret void
}
unsigned int get_unaligned_uint32(const void *p) {
  const struct { unsigned int d; } __attribute__((packed)) *pp = p;
  return pp->d;
}


x86 assembly (clang, -O0):
<get_unaligned_uint32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_unaligned_uint32>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.anon = type { i32 }
define i32 @get_unaligned_uint32(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.anon*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to %struct.anon*
store %struct.anon* %5, %struct.anon** %3
%6 = load %struct.anon*, %struct.anon** %3
%7 = getelementptr inbounds %struct.anon, %struct.anon* %6, i32 0, i32 0
%8 = load i32, i32* %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @get_unaligned_uint32(i8* nocapture %0) {
%2 = bitcast i8* %0 to i32*
%3 = load i32, i32* %2
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;

/* Variables and functions */
int /*<<< orphan*/ time(int /*<<< orphan*/ *);
void uninitvar_time(void) {
  time_t *tp;
  (void)time(tp);
}


x86 assembly (clang, -O0):
<uninitvar_time>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    -0x8(%rbp),%rdi
call   1030 <time@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<uninitvar_time>:
jmp    1030 <time@plt>

LLVM IR (-O0):
define void @uninitvar_time() {
%1 = alloca i32*
%2 = load i32*, i32** %1
%3 = call i32 @time(i32* %2)
ret void
}

LLVM IR (-O2):
define void @uninitvar_time() {
%1 = tail call i32 @time(i32* undef)
ret void
}
void av_format_get_subtitle_codec() {}


x86 assembly (clang, -O0):
<av_format_get_subtitle_codec>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_format_get_subtitle_codec>:
ret

LLVM IR (-O0):
define void @av_format_get_subtitle_codec() {
ret void
}

LLVM IR (-O2):
define void @av_format_get_subtitle_codec() {
ret void
}
int test20(int a, int b, int c, int d, int e, int f) {
  int x = a != b;
  int y = c != 0;
  int z = d != e;
  return x == y && x == z;
}


x86 assembly (clang, -O0):
<test20>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0xc(%rbp)
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x20(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x14(%rbp),%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0x24(%rbp)
mov    -0x1c(%rbp),%ecx
xor    %eax,%eax
cmp    -0x20(%rbp),%ecx
mov    %al,-0x25(%rbp)
jne    1166 <test20+0x66>
mov    -0x1c(%rbp),%eax
cmp    -0x24(%rbp),%eax
sete   %al
mov    %al,-0x25(%rbp)
mov    -0x25(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test20>:
cmp    %esi,%edi
setne  %al
test   %edx,%edx
sete   %dl
cmp    %r8d,%ecx
sete   %cl
xor    %al,%dl
xor    %al,%cl
and    %dl,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @test20(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
store i32 %0, i32* %7
store i32 %1, i32* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i32 %5, i32* %12
%16 = load i32, i32* %7
%17 = load i32, i32* %8
%18 = icmp ne i32 %16, %17
%19 = zext i1 %18 to i32
store i32 %19, i32* %13
%20 = load i32, i32* %9
%21 = icmp ne i32 %20, 0
%22 = zext i1 %21 to i32
store i32 %22, i32* %14
%23 = load i32, i32* %10
%24 = load i32, i32* %11
%25 = icmp ne i32 %23, %24
%26 = zext i1 %25 to i32
store i32 %26, i32* %15
%27 = load i32, i32* %13
%28 = load i32, i32* %14
%29 = icmp eq i32 %27, %28
br i1 %29, label %30, label %34
30: ; preds = %6
%31 = load i32, i32* %13
%32 = load i32, i32* %15
%33 = icmp eq i32 %31, %32
br label %34
34: ; preds = %30, %6
%35 = phi i1 [ false, %6 ], [ %33, %30 ]
%36 = zext i1 %35 to i32
ret i32 %36
}

LLVM IR (-O2):
define i32 @test20(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5) {
%7 = icmp ne i32 %0, %1
%8 = icmp eq i32 %2, 0
%9 = icmp eq i32 %3, %4
%10 = xor i1 %7, %8
%11 = xor i1 %7, %9
%12 = and i1 %10, %11
%13 = zext i1 %12 to i32
ret i32 %13
}
/* Variables and functions */
float fmax(float, float);
float fmaxf(float x, float y) { return fmax(x, y); }


x86 assembly (clang, -O0):
<fmaxf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
call   1030 <fmax@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fmaxf>:
movaps %xmm0,%xmm2
cmpunordss %xmm0,%xmm2
movaps %xmm2,%xmm3
andps  %xmm1,%xmm3
maxss  %xmm0,%xmm1
andnps %xmm1,%xmm2
orps   %xmm3,%xmm2
movaps %xmm2,%xmm0
ret

LLVM IR (-O0):
define float @fmaxf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
store float %0, float* %3
store float %1, float* %4
%5 = load float, float* %3
%6 = load float, float* %4
%7 = call float @fmax(float %5, float %6)
ret float %7
}

LLVM IR (-O2):
define float @fmaxf(float %0, float %1) {
%3 = tail call nsz float @llvm.maxnum.f32(float %0, float %1)
ret float %3
}
struct xdp_sock *xdp_sk(struct sock *sk) {
  return (struct xdp_sock *)sk;
}


x86 assembly (clang, -O0):
<xdp_sk>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xdp_sk>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
%struct.xdp_sock = type opaque
%struct.sock = type opaque
define %struct.xdp_sock* @xdp_sk(%struct.sock* %0) {
%2 = alloca %struct.sock*
store %struct.sock* %0, %struct.sock** %2
%3 = load %struct.sock*, %struct.sock** %2
%4 = bitcast %struct.sock* %3 to %struct.xdp_sock*
ret %struct.xdp_sock* %4
}

LLVM IR (-O2):
%struct.xdp_sock = type opaque
%struct.sock = type opaque
define %struct.xdp_sock* @xdp_sk(%struct.sock* readnone %0) {
%2 = bitcast %struct.sock* %0 to %struct.xdp_sock*
ret %struct.xdp_sock* %2
}
unsigned xrop3_240_0_0(unsigned char s, unsigned char t) {
  unsigned T = ((unsigned)t << 8) | t;
  return T;
}


x86 assembly (clang, -O0):
<xrop3_240_0_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_240_0_0>:
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_240_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
%6 = load i8, i8* %4
%7 = zext i8 %6 to i32
%8 = shl i32 %7, 8
%9 = load i8, i8* %4
%10 = zext i8 %9 to i32
%11 = or i32 %8, %10
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @xrop3_240_0_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %1 to i32
%4 = mul nuw nsw i32 %3, 257
ret i32 %4
}
int __test_and_clear_bit(int nr, volatile void *addr) {
  int oldbit;
  asm volatile("btrl %2,%1\n\tsbbl %0,%0"
               : "=r"(oldbit), "=m"((*(volatile long *)addr))
               : "Ir"(nr), "m"((*(volatile long *)addr))
               : "memory");
  return oldbit;
}


x86 assembly (clang, -O0):
<__test_and_clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
mov    -0x10(%rbp),%rdx
btr    %ecx,(%rax)
sbb    %eax,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test_and_clear_bit>:
btr    %edi,(%rsi)
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__test_and_clear_bit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i32 %0, i32* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = bitcast i8* %6 to i64*
%8 = load i32, i32* %3
%9 = load i8*, i8** %4
%10 = bitcast i8* %9 to i64*
%11 = call i32 asm sideeffect "btrl $2,$1\0A\09sbbl $0,$0", "=r,=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %7, i32 %8, i64* elementtype(i64) %10)
store i32 %11, i32* %5
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
define i32 @__test_and_clear_bit(i32 %0, i8* %1) {
%3 = bitcast i8* %1 to i64*
%4 = tail call i32 asm sideeffect "btrl $2,$1\0A\09sbbl $0,$0", "=r,=*m,Ir,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %3, i32 %0, i64* elementtype(i64) %3)
ret i32 %4
}
/* Type definitions */
struct sock_fprog {
  int dummy;
};

/* Variables and functions */
int __bpf_l4v6_hash(struct sock_fprog *, int);
int bpf_vlan_l4v6_hash(struct sock_fprog *fprog) {
  return __bpf_l4v6_hash(fprog, true);
}


x86 assembly (clang, -O0):
<bpf_vlan_l4v6_hash>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <__bpf_l4v6_hash@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bpf_vlan_l4v6_hash>:
mov    $0x1,%esi
jmp    1030 <__bpf_l4v6_hash@plt>

LLVM IR (-O0):
%struct.sock_fprog = type { i32 }
define i32 @bpf_vlan_l4v6_hash(%struct.sock_fprog* %0) {
%2 = alloca %struct.sock_fprog*
store %struct.sock_fprog* %0, %struct.sock_fprog** %2
%3 = load %struct.sock_fprog*, %struct.sock_fprog** %2
%4 = call i32 @__bpf_l4v6_hash(%struct.sock_fprog* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
%struct.sock_fprog = type { i32 }
define i32 @bpf_vlan_l4v6_hash(%struct.sock_fprog* %0) {
%2 = tail call i32 @__bpf_l4v6_hash(%struct.sock_fprog* %0, i32 1)
ret i32 %2
}
const char *DLL_GetTitle(void *mid) { return ""; }


x86 assembly (clang, -O0):
<DLL_GetTitle>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
lea    0xef1(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<DLL_GetTitle>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [1 x i8] zeroinitializer
define i8* @DLL_GetTitle(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [1 x i8] zeroinitializer
define i8* @DLL_GetTitle(i8* nocapture readnone %0) {
ret i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str, i64 0, i64 0)
}
void example7() {
  int a[42];
  int i = 0;
  while (i < 40) {
    a[i] = 0;
    i++;
  }
  a[a[0]] = 2;
}


x86 assembly (clang, -O0):
<example7>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
movl   $0x0,-0xb4(%rbp)
cmpl   $0x28,-0xb4(%rbp)
jge    1145 <example7+0x45>
movslq -0xb4(%rbp),%rax
movl   $0x0,-0xb0(%rbp,%rax,4)
mov    -0xb4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xb4(%rbp)
jmp    1112 <example7+0x12>
movslq -0xb0(%rbp),%rax
movl   $0x2,-0xb0(%rbp,%rax,4)
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<example7>:
ret

LLVM IR (-O0):
define void @example7() {
%1 = alloca [42 x i32]
%2 = alloca i32
store i32 0, i32* %2
br label %3
3: ; preds = %6, %0
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 40
br i1 %5, label %6, label %12
6: ; preds = %3
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds [42 x i32], [42 x i32]* %1, i64 0, i64 %8
store i32 0, i32* %9
%10 = load i32, i32* %2
%11 = add nsw i32 %10, 1
store i32 %11, i32* %2
br label %3
12: ; preds = %3
%13 = getelementptr inbounds [42 x i32], [42 x i32]* %1, i64 0, i64 0
%14 = load i32, i32* %13
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [42 x i32], [42 x i32]* %1, i64 0, i64 %15
store i32 2, i32* %16
ret void
}

LLVM IR (-O2):
define void @example7() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(int argc, char *argv[]) {
  int a = argc % 2 == 0 ? 1 : argc;
  int b = argc % 2 == 0 ? 5 : argc;
  int c = a / b;
  printf("%d\n", c);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1147 <main+0x37>
mov    $0x1,%eax
mov    %eax,-0x20(%rbp)
jmp    114d <main+0x3d>
mov    -0x8(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1174 <main+0x64>
mov    $0x5,%eax
mov    %eax,-0x24(%rbp)
jmp    117a <main+0x6a>
mov    -0x8(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x24(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x14(%rbp),%eax
cltd
idivl  -0x18(%rbp)
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%esi
lea    0xe6c(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
test   $0x1,%dil
mov    $0x1,%eax
cmovne %edi,%eax
mov    $0x5,%ecx
cmovne %edi,%ecx
cltd
idiv   %ecx
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%9 = load i32, i32* %4
%10 = srem i32 %9, 2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %2
br label %15
13: ; preds = %2
%14 = load i32, i32* %4
br label %15
15: ; preds = %13, %12
%16 = phi i32 [ 1, %12 ], [ %14, %13 ]
store i32 %16, i32* %6
%17 = load i32, i32* %4
%18 = srem i32 %17, 2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %21
20: ; preds = %15
br label %23
21: ; preds = %15
%22 = load i32, i32* %4
br label %23
23: ; preds = %21, %20
%24 = phi i32 [ 5, %20 ], [ %22, %21 ]
store i32 %24, i32* %7
%25 = load i32, i32* %6
%26 = load i32, i32* %7
%27 = sdiv i32 %25, %26
store i32 %27, i32* %8
%28 = load i32, i32* %8
%29 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %28)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = and i32 %0, 1
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i32 1, i32 %0
%6 = select i1 %4, i32 5, i32 %0
%7 = sdiv i32 %5, %6
%8 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %7)
ret i32 0
}
int k_atomdec(int volatile *value) {
  return (int)__sync_fetch_and_sub(value, 1) - 1;
}


x86 assembly (clang, -O0):
<k_atomdec>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0xffffffff,%eax
lock xadd %eax,(%rcx)
sub    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<k_atomdec>:
mov    $0xffffffff,%eax
lock xadd %eax,(%rdi)
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @k_atomdec(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = atomicrmw sub i32* %3, i32 1 seq_cst
%5 = sub nsw i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @k_atomdec(i32* nocapture %0) {
%2 = atomicrmw sub i32* %0, i32 1 seq_cst
%3 = add nsw i32 %2, -1
ret i32 %3
}
/* Variables and functions */
int a();
int b(void) { return a(); }


x86 assembly (clang, -O0):
<b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <a@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<b>:
xor    %eax,%eax
jmp    1030 <a@plt>

LLVM IR (-O0):
define i32 @b() {
%1 = call i32 (...) @a()
ret i32 %1
}

LLVM IR (-O2):
define i32 @b() {
%1 = tail call i32 (...) @a()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ hypotf(unsigned int, unsigned int);
unsigned short roundf(int /*<<< orphan*/);
unsigned short magnitude_fun_complexOf_ushort(unsigned a) {
  return roundf(hypotf((a >> 16), (a & 0x0000ffff)));
}


x86 assembly (clang, -O0):
<magnitude_fun_complexOf_ushort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
shr    $0x10,%edi
mov    -0x4(%rbp),%esi
and    $0xffff,%esi
call   1030 <hypotf@plt>
mov    %eax,%edi
call   1040 <roundf@plt>
movzwl %ax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<magnitude_fun_complexOf_ushort>:
push   %rax
movzwl %di,%esi
shr    $0x10,%edi
call   1030 <hypotf@plt>
mov    %eax,%edi
pop    %rax
jmp    1040 <roundf@plt>

LLVM IR (-O0):
define zeroext i16 @magnitude_fun_complexOf_ushort(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = lshr i32 %3, 16
%5 = load i32, i32* %2
%6 = and i32 %5, 65535
%7 = call i32 @hypotf(i32 %4, i32 %6)
%8 = call zeroext i16 @roundf(i32 %7)
ret i16 %8
}

LLVM IR (-O2):
define zeroext i16 @magnitude_fun_complexOf_ushort(i32 %0) {
%2 = lshr i32 %0, 16
%3 = and i32 %0, 65535
%4 = tail call i32 @hypotf(i32 %2, i32 %3)
%5 = tail call zeroext i16 @roundf(i32 %4)
ret i16 %5
}
/* Variables and functions */
int /*<<< orphan*/ write(int, void *, size_t);
void ft_putmemchar(void *ptr, size_t n) { write(1, ptr, n); }


x86 assembly (clang, -O0):
<ft_putmemchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x1,%edi
call   1030 <write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_putmemchar>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <write@plt>

LLVM IR (-O0):
define void @ft_putmemchar(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @write(i32 1, i8* %5, i64 %6)
ret void
}

LLVM IR (-O2):
define void @ft_putmemchar(i8* nocapture %0, i64 %1) {
%3 = tail call i32 @write(i32 1, i8* %0, i64 %1)
ret void
}
int mysub(const int x, const int y) { return x - y; }


x86 assembly (clang, -O0):
<mysub>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mysub>:
mov    %edi,%eax
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @mysub(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @mysub(i32 %0, i32 %1) {
%3 = sub nsw i32 %0, %1
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void printExt(char *s) { printf("S=%s\n", s); }


x86 assembly (clang, -O0):
<printExt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printExt>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"S=%s\0A\00"
define void @printExt(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"S=%s\0A\00"
define void @printExt(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
int count_tens(int n) {
  switch (n) {
  case 1:
    return 3;
  case 4:
  case 5:
  case 6:
    return 5;
  case 2:
  case 3:
  case 8:
  case 9:
    return 6;
  case 7:
    return 7;
  default:
    assert(0);
  }
}


x86 assembly (clang, -O0):
<count_tens>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x8,%eax
ja     1174 <count_tens+0x64>
mov    -0x10(%rbp),%rax
lea    0xec5(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x3,-0x4(%rbp)
jmp    117b <count_tens+0x6b>
movl   $0x5,-0x4(%rbp)
jmp    117b <count_tens+0x6b>
movl   $0x6,-0x4(%rbp)
jmp    117b <count_tens+0x6b>
movl   $0x7,-0x4(%rbp)
jmp    117b <count_tens+0x6b>
xor    %edi,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_tens>:
push   %rax
add    $0xffffffff,%edi
cmp    $0x9,%edi
jae    1128 <count_tens+0x18>
movslq %edi,%rax
lea    0xedd(%rip),%rcx
mov    (%rcx,%rax,4),%eax
pop    %rcx
ret
xor    %edi,%edi
call   1030 <assert@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @count_tens(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 1, label %5
i32 4, label %6
i32 5, label %6
i32 6, label %6
i32 2, label %7
i32 3, label %7
i32 8, label %7
i32 9, label %7
i32 7, label %8
]
5: ; preds = %1
store i32 3, i32* %2
br label %11
6: ; preds = %1, %1, %1
store i32 5, i32* %2
br label %11
7: ; preds = %1, %1, %1, %1
store i32 6, i32* %2
br label %11
8: ; preds = %1
store i32 7, i32* %2
br label %11
9: ; preds = %1
%10 = call i32 @assert(i32 0)
br label %11
11: ; preds = %5, %6, %7, %8, %9
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@switch.table.count_tens = [9 x i32] [i32 3, i32 6, i32 6, i32 5, i32 5, i32 5, i32 7, i32 6, i32 6]
define i32 @count_tens(i32 %0) {
%2 = add i32 %0, -1
%3 = icmp ult i32 %2, 9
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @assert(i32 0)
br label %10
6: ; preds = %1
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds [9 x i32], [9 x i32]* @switch.table.count_tens, i64 0, i64 %7
%9 = load i32, i32* %8
br label %10
10: ; preds = %6, %4
%11 = phi i32 [ undef, %4 ], [ %9, %6 ]
ret i32 %11
}
int checkConcurrency(char *finalcommand, int commandlength) {
  if (commandlength > 0) {
    if (finalcommand[commandlength - 1] == '&') {
      return 1;
    } else {
      return 0;
    }
  }
  return -1;
}


x86 assembly (clang, -O0):
<checkConcurrency>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
jle    1147 <checkConcurrency+0x47>
mov    -0x10(%rbp),%rax
mov    -0x14(%rbp),%ecx
sub    $0x1,%ecx
movslq %ecx,%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x26,%eax
jne    113b <checkConcurrency+0x3b>
movl   $0x1,-0x4(%rbp)
jmp    114e <checkConcurrency+0x4e>
movl   $0x0,-0x4(%rbp)
jmp    114e <checkConcurrency+0x4e>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<checkConcurrency>:
test   %esi,%esi
jle    1111 <checkConcurrency+0x11>
add    $0xffffffff,%esi
xor    %eax,%eax
cmpb   $0x26,(%rdi,%rsi,1)
sete   %al
ret
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @checkConcurrency(i8* %0, i32 %1) {
%3 = alloca i32
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = icmp sgt i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %2
%9 = load i8*, i8** %4
%10 = load i32, i32* %5
%11 = sub nsw i32 %10, 1
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %9, i64 %12
%14 = load i8, i8* %13
%15 = sext i8 %14 to i32
%16 = icmp eq i32 %15, 38
br i1 %16, label %17, label %18
17: ; preds = %8
store i32 1, i32* %3
br label %20
18: ; preds = %8
store i32 0, i32* %3
br label %20
19: ; preds = %2
store i32 -1, i32* %3
br label %20
20: ; preds = %19, %18, %17
%21 = load i32, i32* %3
ret i32 %21
}

LLVM IR (-O2):
define i32 @checkConcurrency(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %11
4: ; preds = %2
%5 = add nsw i32 %1, -1
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds i8, i8* %0, i64 %6
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, 38
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %2, %4
%12 = phi i32 [ %10, %4 ], [ -1, %2 ]
ret i32 %12
}
/* Type definitions */
typedef int /*<<< orphan*/ a;

/* Variables and functions */
int /*<<< orphan*/ permute(int *, int /*<<< orphan*/, int);
int main(int argc, char *argv[]) {
  int a[] = {1, 2, 3, 4, 5};
  int size = sizeof(a) / sizeof(a[0]);
  permute(a, 0, size);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xeda(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xed7(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xed5(%rip),%eax
mov    %eax,-0x20(%rbp)
movl   $0x5,-0x34(%rbp)
lea    -0x30(%rbp),%rdi
mov    -0x34(%rbp),%edx
xor    %esi,%esi
call   1030 <permute@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    0xef6(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xedb(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
xor    %esi,%esi
mov    $0x5,%edx
call   1030 <permute@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.a = [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5]
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
%5 = alloca [5 x i32]
%6 = alloca i32
store i32 %0, i32* %3
store i8** %1, i8*** %4
%7 = bitcast [5 x i32]* %5 to i8*
store i32 5, i32* %6
%8 = getelementptr inbounds [5 x i32], [5 x i32]* %5, i64 0, i64 0
%9 = load i32, i32* %6
%10 = call i32 @permute(i32* %8, i32 0, i32 %9)
ret i32 0
}

LLVM IR (-O2):
@__const.main.a = [5 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5]
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [5 x i32]
%4 = bitcast [5 x i32]* %3 to i8*
%5 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 0
%6 = call i32 @permute(i32* %5, i32 0, i32 5)
ret i32 0
}
void GetUndefinedPosition(long *r_result) { *r_result = -1; }


x86 assembly (clang, -O0):
<GetUndefinedPosition>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movq   $0xffffffffffffffff,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetUndefinedPosition>:
movq   $0xffffffffffffffff,(%rdi)
ret

LLVM IR (-O0):
define void @GetUndefinedPosition(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
store i64 -1, i64* %3
ret void
}

LLVM IR (-O2):
define void @GetUndefinedPosition(i64* nocapture writeonly %0) {
store i64 -1, i64* %0
ret void
}
/* Variables and functions */
char *getfilename(char *);
int /*<<< orphan*/ memmove(char *, char *, scalar_t__);
scalar_t__ strlen(char *);
char *strrchr(char *, char);
void truncfilename(char *path) {
  char *i = getfilename(path);
  memmove(path, i, strlen(i) + 1);
  i = strrchr(path, '.');
  if (i)
    *i = 0;
}


x86 assembly (clang, -O0):
<truncfilename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <getfilename@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %rax,%rdx
add    $0x1,%rdx
call   1060 <memmove@plt>
mov    -0x8(%rbp),%rdi
mov    $0x2e,%esi
call   1050 <strrchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     11aa <truncfilename+0x6a>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<truncfilename>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <getfilename@plt>
mov    %rax,%r14
mov    %rax,%rdi
call   1040 <strlen@plt>
lea    0x1(%rax),%rdx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1060 <memmove@plt>
mov    %rbx,%rdi
mov    $0x2e,%esi
call   1050 <strrchr@plt>
test   %rax,%rax
je     117b <truncfilename+0x3b>
movb   $0x0,(%rax)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @truncfilename(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @getfilename(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %2
%7 = load i8*, i8** %3
%8 = load i8*, i8** %3
%9 = call i64 @strlen(i8* %8)
%10 = add nsw i64 %9, 1
%11 = call i32 @memmove(i8* %6, i8* %7, i64 %10)
%12 = load i8*, i8** %2
%13 = call i8* @strrchr(i8* %12, i8 signext 46)
store i8* %13, i8** %3
%14 = load i8*, i8** %3
%15 = icmp ne i8* %14, null
br i1 %15, label %16, label %18
16: ; preds = %1
%17 = load i8*, i8** %3
store i8 0, i8* %17
br label %18
18: ; preds = %16, %1
ret void
}

LLVM IR (-O2):
define void @truncfilename(i8* %0) {
%2 = tail call i8* @getfilename(i8* %0)
%3 = tail call i64 @strlen(i8* dereferenceable(1) %2)
%4 = add nsw i64 %3, 1
%5 = tail call i32 @memmove(i8* %0, i8* %2, i64 %4)
%6 = tail call i8* @strrchr(i8* dereferenceable(1) %0, i8 signext 46)
%7 = icmp eq i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %1
store i8 0, i8* %6
br label %9
9: ; preds = %8, %1
ret void
}
int arith_mod(int x, int y) {
  if (-13 / 5 == -2 && (x < 0) != (y < 0) && x % y != 0)
    return x % y + y;
  else
    return x % y;
}


x86 assembly (clang, -O0):
<arith_mod>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
cmpl   $0x0,-0xc(%rbp)
setl   %cl
and    $0x1,%cl
movzbl %cl,%ecx
cmp    %ecx,%eax
je     114d <arith_mod+0x4d>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
cmp    $0x0,%edx
je     114d <arith_mod+0x4d>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
add    -0xc(%rbp),%edx
mov    %edx,-0x4(%rbp)
jmp    1157 <arith_mod+0x57>
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<arith_mod>:
mov    %edi,%eax
cltd
idiv   %esi
lea    (%rdx,%rsi,1),%eax
test   %edx,%edx
cmove  %edx,%eax
xor    %edi,%esi
cmovns %edx,%eax
ret

LLVM IR (-O0):
define i32 @arith_mod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = icmp slt i32 %6, 0
%8 = zext i1 %7 to i32
%9 = load i32, i32* %5
%10 = icmp slt i32 %9, 0
%11 = zext i1 %10 to i32
%12 = icmp ne i32 %8, %11
br i1 %12, label %13, label %24
13: ; preds = %2
%14 = load i32, i32* %4
%15 = load i32, i32* %5
%16 = srem i32 %14, %15
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %24
18: ; preds = %13
%19 = load i32, i32* %4
%20 = load i32, i32* %5
%21 = srem i32 %19, %20
%22 = load i32, i32* %5
%23 = add nsw i32 %21, %22
store i32 %23, i32* %3
br label %28
24: ; preds = %13, %2
%25 = load i32, i32* %4
%26 = load i32, i32* %5
%27 = srem i32 %25, %26
store i32 %27, i32* %3
br label %28
28: ; preds = %24, %18
%29 = load i32, i32* %3
ret i32 %29
}

LLVM IR (-O2):
define i32 @arith_mod(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = icmp sgt i32 %3, -1
%5 = srem i32 %0, %1
%6 = icmp eq i32 %5, 0
%7 = add nsw i32 %5, %1
%8 = select i1 %6, i32 0, i32 %7
%9 = select i1 %4, i32 %5, i32 %8
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, char *);
char *getprogname();
int /*<<< orphan*/ stderr;
void usage(void) {
  (void)fprintf(stderr, "usage: %s [file]\n", getprogname());
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    0x2ea1(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    $0x0,%al
call   1030 <getprogname@plt>
mov    -0x4(%rbp),%edi
mov    %rax,%rdx
lea    0xea8(%rip),%rsi
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    0x2ea8(%rip),%rax
mov    (%rax),%ebx
xor    %eax,%eax
call   1030 <getprogname@plt>
lea    0xeb8(%rip),%rsi
mov    %ebx,%edi
mov    %rax,%rdx
call   1040 <fprintf@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [18 x i8] c"usage: %s [file]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i8* (...) @getprogname()
%3 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [18 x i8] c"usage: %s [file]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i8* (...) @getprogname()
%3 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0), i8* %2)
%4 = tail call i32 @exit(i32 1)
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ test_address();
int /*<<< orphan*/ test_ip();
int main() {
  test_ip();
  test_address();
  exit(0);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <test_ip@plt>
mov    $0x0,%al
call   1040 <test_address@plt>
xor    %edi,%edi
call   1050 <exit@plt>

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <test_ip@plt>
xor    %eax,%eax
call   1040 <test_address@plt>
xor    %edi,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @test_ip()
%3 = call i32 (...) @test_address()
%4 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @test_ip()
%2 = tail call i32 (...) @test_address()
%3 = tail call i32 @exit(i32 0)
unreachable
}
int color_offset_f3(int x, int y) {
  return ((y << 10) + (((x << 10) * 121) / 25) - (17745 << 10)) >> 10;
}


x86 assembly (clang, -O0):
<color_offset_f3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0xa,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
shl    $0xa,%eax
imul   $0x79,%eax,%eax
mov    $0x19,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
sub    $0x1154400,%eax
sar    $0xa,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<color_offset_f3>:
shl    $0xa,%esi
imul   $0x1e400,%edi,%eax
cltq
imul   $0x51eb851f,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x23,%rax
add    %ecx,%eax
add    %esi,%eax
add    $0xfeeabc00,%eax
sar    $0xa,%eax
ret

LLVM IR (-O0):
define i32 @color_offset_f3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = shl i32 %5, 10
%7 = load i32, i32* %3
%8 = shl i32 %7, 10
%9 = mul nsw i32 %8, 121
%10 = sdiv i32 %9, 25
%11 = add nsw i32 %6, %10
%12 = sub nsw i32 %11, 18170880
%13 = ashr i32 %12, 10
ret i32 %13
}

LLVM IR (-O2):
define i32 @color_offset_f3(i32 %0, i32 %1) {
%3 = shl i32 %1, 10
%4 = mul i32 %0, 123904
%5 = sdiv i32 %4, 25
%6 = add nsw i32 %5, -18170880
%7 = add i32 %6, %3
%8 = ashr i32 %7, 10
ret i32 %8
}
int fun453() { return 453; }


x86 assembly (clang, -O0):
<fun453>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1c5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun453>:
mov    $0x1c5,%eax
ret

LLVM IR (-O0):
define i32 @fun453() {
ret i32 453
}

LLVM IR (-O2):
define i32 @fun453() {
ret i32 453
}
int bissexto(int a) {
  if (((a % 4) == 0) && (((a % 100) != 0) || ((a % 400) == 0))) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<bissexto>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x4,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    114f <bissexto+0x4f>
mov    -0x8(%rbp),%eax
mov    $0x64,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    1143 <bissexto+0x43>
mov    -0x8(%rbp),%eax
mov    $0x190,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    114f <bissexto+0x4f>
movl   $0x1,-0x4(%rbp)
jmp    1156 <bissexto+0x56>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bissexto>:
test   $0x3,%dil
jne    1143 <bissexto+0x43>
imul   $0xc28f5c29,%edi,%ecx
add    $0x51eb850,%ecx
ror    $0x2,%ecx
mov    $0x1,%eax
cmp    $0x28f5c28,%ecx
ja     1145 <bissexto+0x45>
movslq %edi,%rcx
imul   $0x51eb851f,%rcx,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x27,%rcx
add    %edx,%ecx
imul   $0x190,%ecx,%ecx
sub    %ecx,%edi
je     1145 <bissexto+0x45>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @bissexto(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 4
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = load i32, i32* %3
%9 = srem i32 %8, 100
%10 = icmp ne i32 %9, 0
br i1 %10, label %15, label %11
11: ; preds = %7
%12 = load i32, i32* %3
%13 = srem i32 %12, 400
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %11, %7
store i32 1, i32* %2
br label %17
16: ; preds = %11, %1
store i32 0, i32* %2
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @bissexto(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %10
4: ; preds = %1
%5 = srem i32 %0, 100
%6 = icmp ne i32 %5, 0
%7 = srem i32 %0, 400
%8 = icmp eq i32 %7, 0
%9 = or i1 %6, %8
br i1 %9, label %11, label %10
10: ; preds = %4, %1
br label %11
11: ; preds = %4, %10
%12 = phi i32 [ 0, %10 ], [ 1, %4 ]
ret i32 %12
}
int fun853() { return 853; }


x86 assembly (clang, -O0):
<fun853>:
push   %rbp
mov    %rsp,%rbp
mov    $0x355,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun853>:
mov    $0x355,%eax
ret

LLVM IR (-O0):
define i32 @fun853() {
ret i32 853
}

LLVM IR (-O2):
define i32 @fun853() {
ret i32 853
}
/* Variables and functions */
int /*<<< orphan*/ branch(int /*<<< orphan*/);
void z_make_menu(void) { branch(0); }


x86 assembly (clang, -O0):
<z_make_menu>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <branch@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<z_make_menu>:
xor    %edi,%edi
jmp    1030 <branch@plt>

LLVM IR (-O0):
define void @z_make_menu() {
%1 = call i32 @branch(i32 0)
ret void
}

LLVM IR (-O2):
define void @z_make_menu() {
%1 = tail call i32 @branch(i32 0)
ret void
}
/* Type definitions */
struct perf_event_attr {
  int size;
};
typedef int /*<<< orphan*/ pid_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_perf_event_open;
int syscall(int /*<<< orphan*/, struct perf_event_attr *, int /*<<< orphan*/,
            int, int, unsigned long);
int sys_perf_event_open(struct perf_event_attr *attr, pid_t pid, int cpu,
                        int group_fd, unsigned long flags) {
  attr->size = sizeof(*attr);
  return syscall(__NR_perf_event_open, attr, pid, cpu, group_fd, flags);
}


x86 assembly (clang, -O0):
<sys_perf_event_open>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8,-0x20(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x4,(%rax)
mov    0x2ea6(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    -0x14(%rbp),%r8d
mov    -0x20(%rbp),%r9
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys_perf_event_open>:
mov    %r8,%r9
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %esi,%edx
mov    %rdi,%rsi
movl   $0x4,(%rdi)
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i32 @sys_perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = alloca %struct.perf_event_attr*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
store %struct.perf_event_attr* %0, %struct.perf_event_attr** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i64 %4, i64* %10
%11 = load %struct.perf_event_attr*, %struct.perf_event_attr** %6
%12 = getelementptr inbounds %struct.perf_event_attr, %struct.perf_event_attr* %11, i32 0, i32 0
store i32 4, i32* %12
%13 = load i32, i32* @__NR_perf_event_open
%14 = load %struct.perf_event_attr*, %struct.perf_event_attr** %6
%15 = load i32, i32* %7
%16 = load i32, i32* %8
%17 = load i32, i32* %9
%18 = load i64, i64* %10
%19 = call i32 @syscall(i32 %13, %struct.perf_event_attr* %14, i32 %15, i32 %16, i32 %17, i64 %18)
ret i32 %19
}

LLVM IR (-O2):
%struct.perf_event_attr = type { i32 }
@__NR_perf_event_open = global i32 0
define i32 @sys_perf_event_open(%struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4) {
%6 = getelementptr inbounds %struct.perf_event_attr, %struct.perf_event_attr* %0, i64 0, i32 0
store i32 4, i32* %6
%7 = load i32, i32* @__NR_perf_event_open
%8 = tail call i32 @syscall(i32 %7, %struct.perf_event_attr* %0, i32 %1, i32 %2, i32 %3, i64 %4)
ret i32 %8
}
int fib(int n) {
  int result;
  if (n < 2)
    return n;
  result = fib(n - 1) + fib(n - 2);
  return result;
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jge    1130 <fib+0x20>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1159 <fib+0x49>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
xor    %ebp,%ebp
cmp    $0x2,%edi
jge    1120 <fib+0x10>
mov    %ebx,%ecx
jmp    1144 <fib+0x34>
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    -0x1(%rbx),%edi
call   1030 <fib@plt>
lea    -0x2(%rbx),%ecx
add    %eax,%ebp
cmp    $0x3,%ebx
mov    %ecx,%ebx
ja     1130 <fib+0x20>
add    %ecx,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
%5 = load i32, i32* %3
%6 = icmp slt i32 %5, 2
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* %3
store i32 %8, i32* %2
br label %18
9: ; preds = %1
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 1
%12 = call i32 @fib(i32 %11)
%13 = load i32, i32* %3
%14 = sub nsw i32 %13, 2
%15 = call i32 @fib(i32 %14)
%16 = add nsw i32 %12, %15
store i32 %16, i32* %4
%17 = load i32, i32* %4
store i32 %17, i32* %2
br label %18
18: ; preds = %9, %7
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 4
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %9, %3 ]
%13 = phi i32 [ %0, %1 ], [ %8, %3 ]
%14 = add nsw i32 %13, %12
ret i32 %14
}
/* Variables and functions */
int /*<<< orphan*/ do_send(int, char *);
int /*<<< orphan*/ send_idlist(int, char *);
void japi_activate_grammar(int sd, char *idlist) {
  do_send(sd, "ACTIVATEGRAM\n");
  send_idlist(sd, idlist);
}


x86 assembly (clang, -O0):
<japi_activate_grammar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
lea    0xec7(%rip),%rsi
call   1040 <do_send@plt>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <send_idlist@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<japi_activate_grammar>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
lea    0xed1(%rip),%rsi
call   1040 <do_send@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <send_idlist@plt>

LLVM IR (-O0):
@.str = [14 x i8] c"ACTIVATEGRAM\0A\00"
define void @japi_activate_grammar(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = call i32 @do_send(i32 %5, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%7 = load i32, i32* %3
%8 = load i8*, i8** %4
%9 = call i32 @send_idlist(i32 %7, i8* %8)
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"ACTIVATEGRAM\0A\00"
define void @japi_activate_grammar(i32 %0, i8* %1) {
%3 = tail call i32 @do_send(i32 %0, i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @send_idlist(i32 %0, i8* %1)
ret void
}
/* Variables and functions */
size_t linecount(const char *s) {
  size_t len = 1;
  while (*s) {
    if (*s == '\n') {
      len++;
    }
    s++;
  }
  return len;
}


x86 assembly (clang, -O0):
<linecount>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     114a <linecount+0x4a>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0xa,%eax
jne    1139 <linecount+0x39>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1110 <linecount+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<linecount>:
mov    $0x1,%eax
jmp    1118 <linecount+0x18>
nopw   0x0(%rax,%rax,1)
add    $0x1,%rax
add    $0x1,%rdi
movzbl (%rdi),%ecx
cmp    $0xa,%cl
je     1110 <linecount+0x10>
test   %cl,%cl
jne    1114 <linecount+0x14>
ret

LLVM IR (-O0):
define i64 @linecount(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 1, i64* %3
br label %4
4: ; preds = %16, %1
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = icmp ne i8 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %4
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 10
br i1 %12, label %13, label %16
13: ; preds = %8
%14 = load i64, i64* %3
%15 = add i64 %14, 1
store i64 %15, i64* %3
br label %16
16: ; preds = %13, %8
%17 = load i8*, i8** %2
%18 = getelementptr inbounds i8, i8* %17, i32 1
store i8* %18, i8** %2
br label %4
19: ; preds = %4
%20 = load i64, i64* %3
ret i64 %20
}

LLVM IR (-O2):
define i64 @linecount(i8* nocapture %0) {
br label %2
2: ; preds = %8, %1
%3 = phi i8* [ %0, %1 ], [ %10, %8 ]
%4 = phi i64 [ 1, %1 ], [ %9, %8 ]
%5 = load i8, i8* %3
switch i8 %5, label %8 [
i8 0, label %11
i8 10, label %6
]
6: ; preds = %2
%7 = add i64 %4, 1
br label %8
8: ; preds = %2, %6
%9 = phi i64 [ %7, %6 ], [ %4, %2 ]
%10 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
11: ; preds = %2
ret i64 %4
}