xunge/DecIR huggingface dataset:
/* Type definitions */
struct thread {
  int dummy;
};

/* Variables and functions */
scalar_t__ armv8_get_tp();
struct thread *get_thread_data(void) {
  return (struct thread *)armv8_get_tp();
}


x86 assembly (clang, -O0):
<get_thread_data>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <armv8_get_tp@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_thread_data>:
xor    %eax,%eax
jmp    1030 <armv8_get_tp@plt>

LLVM IR (-O0):
%struct.thread = type { i32 }
define %struct.thread* @get_thread_data() {
%1 = call i64 (...) @armv8_get_tp()
%2 = inttoptr i64 %1 to %struct.thread*
ret %struct.thread* %2
}

LLVM IR (-O2):
%struct.thread = type { i32 }
define %struct.thread* @get_thread_data() {
%1 = tail call i64 (...) @armv8_get_tp()
%2 = inttoptr i64 %1 to %struct.thread*
ret %struct.thread* %2
}
void __noop_to_appease_ar__(void) { return; }


x86 assembly (clang, -O0):
<__noop_to_appease_ar__>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__noop_to_appease_ar__>:
ret

LLVM IR (-O0):
define void @__noop_to_appease_ar__() {
ret void
}

LLVM IR (-O2):
define void @__noop_to_appease_ar__() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *);
void EndCase(FILE *fh) {
  fprintf(fh, "}\r\n");
  fprintf(fh, "break;\r\n");
}


x86 assembly (clang, -O0):
<EndCase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xed9(%rip),%rsi
call   1030 <fprintf@plt>
mov    -0x8(%rbp),%rdi
lea    0xecd(%rip),%rsi
call   1030 <fprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EndCase>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
mov    $0x3,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1030 <fwrite@plt>
lea    0xed0(%rip),%rdi
mov    $0x8,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
pop    %rbx
jmp    1030 <fwrite@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"}\0D\0A\00"
@.str.1 = [9 x i8] c"break;\0D\0A\00"
define void @EndCase(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @fprintf(i32* %3, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0))
%5 = load i32*, i32** %2
%6 = call i32 @fprintf(i32* %5, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"}\0D\0A\00"
@.str.1 = [9 x i8] c"break;\0D\0A\00"
define void @EndCase(i32* nocapture %0) {
%2 = tail call i64 @fwrite(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 3, i64 1, i32* %0)
%3 = tail call i64 @fwrite(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.1, i64 0, i64 0), i64 8, i64 1, i32* %0)
ret void
}
void V_neg_pin_Wakeup(void) {}


x86 assembly (clang, -O0):
<V_neg_pin_Wakeup>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<V_neg_pin_Wakeup>:
ret

LLVM IR (-O0):
define void @V_neg_pin_Wakeup() {
ret void
}

LLVM IR (-O2):
define void @V_neg_pin_Wakeup() {
ret void
}
/* Variables and functions */
uintptr_t scramble(int i) {
  uintptr_t result;
  result = (i & 0xff) << 24;
  result |= (i >> 8);
  return result;
}


x86 assembly (clang, -O0):
<scramble>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff,%eax
shl    $0x18,%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
cltq
or     -0x10(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<scramble>:
mov    %edi,%eax
shl    $0x18,%eax
sar    $0x8,%edi
or     %eax,%edi
movslq %edi,%rax
ret

LLVM IR (-O0):
define i64 @scramble(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = and i32 %4, 255
%6 = shl i32 %5, 24
%7 = sext i32 %6 to i64
store i64 %7, i64* %3
%8 = load i32, i32* %2
%9 = ashr i32 %8, 8
%10 = sext i32 %9 to i64
%11 = load i64, i64* %3
%12 = or i64 %11, %10
store i64 %12, i64* %3
%13 = load i64, i64* %3
ret i64 %13
}

LLVM IR (-O2):
define i64 @scramble(i32 %0) {
%2 = shl i32 %0, 24
%3 = ashr i32 %0, 8
%4 = or i32 %2, %3
%5 = sext i32 %4 to i64
ret i64 %5
}
/* Variables and functions */
char *pipe2string(char *);
char *timlib_generate_password(void) {
  return pipe2string("generate_password.sh");
}


x86 assembly (clang, -O0):
<timlib_generate_password>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <pipe2string@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<timlib_generate_password>:
lea    0xee9(%rip),%rdi
jmp    1030 <pipe2string@plt>

LLVM IR (-O0):
@.str = [21 x i8] c"generate_password.sh\00"
define i8* @timlib_generate_password() {
%1 = call i8* @pipe2string(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [21 x i8] c"generate_password.sh\00"
define i8* @timlib_generate_password() {
%1 = tail call i8* @pipe2string(i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
int mmc_lock_add_sysfs(struct mmc_card *card) { return 0; }


x86 assembly (clang, -O0):
<mmc_lock_add_sysfs>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmc_lock_add_sysfs>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mmc_card = type opaque
define i32 @mmc_lock_add_sysfs(%struct.mmc_card* %0) {
%2 = alloca %struct.mmc_card*
store %struct.mmc_card* %0, %struct.mmc_card** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mmc_card = type opaque
define i32 @mmc_lock_add_sysfs(%struct.mmc_card* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ printf(char *);
void usage(void) {
  printf("Usgae:\n");
  printf(" db_list [--shuffle] <database>\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
lea    0xed3(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"Usgae:\0A\00"
@.str.1 = [33 x i8] c" db_list [--shuffle] <database>\0A\00"
define void @usage() {
%1 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str.1, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@str = [7 x i8] c"Usgae:\00"
@str.2 = [32 x i8] c" db_list [--shuffle] <database>\00"
define void @usage() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([32 x i8], [32 x i8]* @str.2, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
/* Type definitions */
struct dns_packet {
  int dummy;
};
struct dns_ns {
  int dummy;
};
struct dns_cname {
  int dummy;
};

/* Variables and functions */
int dns_ns_push(struct dns_packet *, struct dns_ns *);
int dns_cname_push(struct dns_packet *P, struct dns_cname *cname) {
  return dns_ns_push(P, (struct dns_ns *)cname);
}


x86 assembly (clang, -O0):
<dns_cname_push>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <dns_ns_push@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dns_cname_push>:
jmp    1030 <dns_ns_push@plt>

LLVM IR (-O0):
%struct.dns_packet = type { i32 }
%struct.dns_cname = type { i32 }
%struct.dns_ns = type { i32 }
define i32 @dns_cname_push(%struct.dns_packet* %0, %struct.dns_cname* %1) {
%3 = alloca %struct.dns_packet*
%4 = alloca %struct.dns_cname*
store %struct.dns_packet* %0, %struct.dns_packet** %3
store %struct.dns_cname* %1, %struct.dns_cname** %4
%5 = load %struct.dns_packet*, %struct.dns_packet** %3
%6 = load %struct.dns_cname*, %struct.dns_cname** %4
%7 = bitcast %struct.dns_cname* %6 to %struct.dns_ns*
%8 = call i32 @dns_ns_push(%struct.dns_packet* %5, %struct.dns_ns* %7)
ret i32 %8
}

LLVM IR (-O2):
%struct.dns_packet = type { i32 }
%struct.dns_cname = type { i32 }
%struct.dns_ns = type { i32 }
define i32 @dns_cname_push(%struct.dns_packet* %0, %struct.dns_cname* %1) {
%3 = bitcast %struct.dns_cname* %1 to %struct.dns_ns*
%4 = tail call i32 @dns_ns_push(%struct.dns_packet* %0, %struct.dns_ns* %3)
ret i32 %4
}
void ff_hevc_put_hevc_bi_w_epel_hv6_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_hv6_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_hv6_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_hv6_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_hv6_8_sse4() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
char *mp_store_u8(char *data, uint8_t val) {
  *(uint8_t *)(data) = (val);
  return data + sizeof(uint8_t);
}


x86 assembly (clang, -O0):
<mp_store_u8>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mp_store_u8>:
mov    %esi,(%rdi)
lea    0x4(%rdi),%rax
ret

LLVM IR (-O0):
define i8* @mp_store_u8(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32 %5, i32* %7
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i64 4
ret i8* %9
}

LLVM IR (-O2):
define i8* @mp_store_u8(i8* writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
%4 = getelementptr inbounds i8, i8* %0, i64 4
ret i8* %4
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, double);
void pic_dtoa(double dval, char *buf) { sprintf(buf, "%g", dval); }


x86 assembly (clang, -O0):
<pic_dtoa>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
movsd  -0x8(%rbp),%xmm0
lea    0xecf(%rip),%rsi
call   1030 <sprintf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pic_dtoa>:
lea    0xee9(%rip),%rsi
jmp    1030 <sprintf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%g\00"
define void @pic_dtoa(double %0, i8* %1) {
%3 = alloca double
%4 = alloca i8*
store double %0, double* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = load double, double* %3
%7 = call i32 @sprintf(i8* %5, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), double %6)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%g\00"
define void @pic_dtoa(double %0, i8* nocapture writeonly %1) {
%3 = tail call i32 @sprintf(i8* dereferenceable(1) %1, i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), double %0)
ret void
}
/* Variables and functions */
int strlen(char *);
char toupper(int);
char *strtoupper(char *s) {
  int len = strlen(s);
  while (--len >= 0)
    s[len] = toupper((int)s[len]);
  return s;
}


x86 assembly (clang, -O0):
<strtoupper>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
cmp    $0x0,%eax
jl     116d <strtoupper+0x4d>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%edi
call   1030 <toupper@plt>
mov    %al,%dl
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
jmp    1138 <strtoupper+0x18>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strtoupper>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1040 <strlen@plt>
test   %eax,%eax
jle    115c <strtoupper+0x3c>
mov    %eax,%ebx
add    $0x1,%rbx
nopw   0x0(%rax,%rax,1)
lea    -0x2(%rbx),%r15d
movsbl (%r14,%r15,1),%edi
call   1030 <toupper@plt>
mov    %al,(%r14,%r15,1)
add    $0xffffffffffffffff,%rbx
cmp    $0x1,%rbx
ja     1140 <strtoupper+0x20>
mov    %r14,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @strtoupper(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i32 @strlen(i8* %4)
store i32 %5, i32* %3
br label %6
6: ; preds = %10, %1
%7 = load i32, i32* %3
%8 = add nsw i32 %7, -1
store i32 %8, i32* %3
%9 = icmp sge i32 %8, 0
br i1 %9, label %10, label %22
10: ; preds = %6
%11 = load i8*, i8** %2
%12 = load i32, i32* %3
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i8, i8* %11, i64 %13
%15 = load i8, i8* %14
%16 = sext i8 %15 to i32
%17 = call signext i8 @toupper(i32 %16)
%18 = load i8*, i8** %2
%19 = load i32, i32* %3
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* %18, i64 %20
store i8 %17, i8* %21
br label %6
22: ; preds = %6
%23 = load i8*, i8** %2
ret i8* %23
}

LLVM IR (-O2):
define i8* @strtoupper(i8* returned %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %15
4: ; preds = %1
%5 = zext i32 %2 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ %5, %4 ], [ %8, %6 ]
%8 = add nsw i64 %7, -1
%9 = and i64 %8, 4294967295
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = tail call signext i8 @toupper(i32 %12)
store i8 %13, i8* %10
%14 = icmp ugt i64 %7, 1
br i1 %14, label %6, label %15
15: ; preds = %6, %1
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ read_map(int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
int /*<<< orphan*/ usage();
int /*<<< orphan*/ write_src();
int main(int argc, char **argv) {
  if (argc != 1)
    usage();
  read_map(stdin);
  write_src();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpl   $0x1,-0x8(%rbp)
je     1157 <main+0x27>
mov    $0x0,%al
call   1050 <usage@plt>
mov    0x2e8a(%rip),%rax
mov    (%rax),%edi
call   1030 <read_map@plt>
mov    $0x0,%al
call   1040 <write_src@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cmp    $0x1,%edi
je     113d <main+0xd>
xor    %eax,%eax
call   1050 <usage@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1030 <read_map@plt>
xor    %eax,%eax
call   1040 <write_src@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stdin = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = call i32 (...) @usage()
br label %10
10: ; preds = %8, %2
%11 = load i32, i32* @stdin
%12 = call i32 @read_map(i32 %11)
%13 = call i32 (...) @write_src()
ret i32 0
}

LLVM IR (-O2):
@stdin = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = icmp eq i32 %0, 1
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (...) @usage()
br label %6
6: ; preds = %4, %2
%7 = load i32, i32* @stdin
%8 = tail call i32 @read_map(i32 %7)
%9 = tail call i32 (...) @write_src()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ SYS_write;
int syscall(int /*<<< orphan*/, int, char const *, size_t);
int print(const char *s) {
  size_t len = 0;
  while (s[len] != '\0')
    len++;
  return syscall(SYS_write, 1, s, len);
}


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     114a <print+0x3a>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1124 <print+0x14>
mov    0x2e97(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x1,%esi
call   1030 <syscall@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
mov    %rdi,%rdx
mov    $0xffffffffffffffff,%rcx
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdx,%rcx,1)
lea    0x1(%rcx),%rcx
jne    1120 <print+0x10>
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    $0x1,%esi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_write = global i32 0
define i32 @print(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* %5, i64 %6
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i64, i64* %3
%13 = add i64 %12, 1
store i64 %13, i64* %3
br label %4
14: ; preds = %4
%15 = load i32, i32* @SYS_write
%16 = load i8*, i8** %2
%17 = load i64, i64* %3
%18 = call i32 @syscall(i32 %15, i32 1, i8* %16, i64 %17)
ret i32 %18
}

LLVM IR (-O2):
@SYS_write = global i32 0
define i32 @print(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
%9 = load i32, i32* @SYS_write
%10 = tail call i32 @syscall(i32 %9, i32 1, i8* %0, i64 %3)
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ socklen_t;

/* Variables and functions */
int __uportsys_setsockopt(int, int, int, void const *, int /*<<< orphan*/,
                          int /*<<< orphan*/ *);
int /*<<< orphan*/ errno;
int setsockopt(int sd, int level, int opt_name, const void *opt_value,
               socklen_t opt_len) {
  return __uportsys_setsockopt(sd, level, opt_name, opt_value, opt_len, &errno);
}


x86 assembly (clang, -O0):
<setsockopt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %rcx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
mov    -0x1c(%rbp),%r8d
mov    0x2e9f(%rip),%r9
call   1030 <__uportsys_setsockopt@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setsockopt>:
mov    0x2ec9(%rip),%r9
jmp    1030 <__uportsys_setsockopt@plt>

LLVM IR (-O0):
@errno = global i32 0
define i32 @setsockopt(i32 %0, i32 %1, i32 %2, i8* %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i8*
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i8* %3, i8** %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = load i32, i32* %8
%14 = load i8*, i8** %9
%15 = load i32, i32* %10
%16 = call i32 @__uportsys_setsockopt(i32 %11, i32 %12, i32 %13, i8* %14, i32 %15, i32* @errno)
ret i32 %16
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @setsockopt(i32 %0, i32 %1, i32 %2, i8* %3, i32 %4) {
%6 = tail call i32 @__uportsys_setsockopt(i32 %0, i32 %1, i32 %2, i8* %3, i32 %4, i32* @errno)
ret i32 %6
}
/* Variables and functions */
double ceil(double);
int /*<<< orphan*/ printf(char *, double);
main() {
  double x = 22.11222;
  double y = ceil(x);
  printf("%lf/n", y);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  0xed0(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ceil@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
lea    0xeb8(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xef0(%rip),%rdi
movsd  0xee0(%rip),%xmm0
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%lf/n\00"
define i32 @main() {
%1 = alloca double
%2 = alloca double
store double 0x40361CBA732DF506, double* %1
%3 = load double, double* %1
%4 = call double @llvm.ceil.f64(double %3)
store double %4, double* %2
%5 = load double, double* %2
%6 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), double %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%lf/n\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), double 2.300000e+01)
ret i32 0
}
double power(double dx, int no) {
  int i;
  double tmp = 1.0;
  for (i = 1; i <= no; i++)
    tmp *= dx;
  return (tmp);
}


x86 assembly (clang, -O0):
<power>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %edi,-0xc(%rbp)
movsd  0xeec(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jg     1149 <power+0x49>
movsd  -0x8(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1120 <power+0x20>
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<power>:
test   %edi,%edi
jle    111b <power+0x1b>
lea    -0x1(%rdi),%ecx
mov    %edi,%eax
and    $0x7,%eax
cmp    $0x7,%ecx
jae    1124 <power+0x24>
movsd  0xee7(%rip),%xmm1
jmp    1155 <power+0x55>
movsd  0xedd(%rip),%xmm0
ret
and    $0xfffffff8,%edi
movsd  0xed1(%rip),%xmm1
nop
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
mulsd  %xmm0,%xmm1
add    $0xfffffff8,%edi
jne    1130 <power+0x30>
test   %eax,%eax
je     1169 <power+0x69>
nopl   0x0(%rax)
mulsd  %xmm0,%xmm1
add    $0xffffffff,%eax
jne    1160 <power+0x60>
movapd %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @power(double %0, i32 %1) {
%3 = alloca double
%4 = alloca i32
%5 = alloca i32
%6 = alloca double
store double %0, double* %3
store i32 %1, i32* %4
store double 1.000000e+00, double* %6
store i32 1, i32* %5
br label %7
7: ; preds = %15, %2
%8 = load i32, i32* %5
%9 = load i32, i32* %4
%10 = icmp sle i32 %8, %9
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load double, double* %3
%13 = load double, double* %6
%14 = fmul double %13, %12
store double %14, double* %6
br label %15
15: ; preds = %11
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %7
18: ; preds = %7
%19 = load double, double* %6
ret double %19
}

LLVM IR (-O2):
define double @power(double %0, i32 %1) {
%3 = icmp slt i32 %1, 1
br i1 %3, label %33, label %4
4: ; preds = %2
%5 = add i32 %1, -1
%6 = and i32 %1, 7
%7 = icmp ult i32 %5, 7
br i1 %7, label %23, label %8
8: ; preds = %4
%9 = and i32 %1, -8
br label %10
10: ; preds = %10, %8
%11 = phi double [ 1.000000e+00, %8 ], [ %20, %10 ]
%12 = phi i32 [ 0, %8 ], [ %21, %10 ]
%13 = fmul double %11, %0
%14 = fmul double %13, %0
%15 = fmul double %14, %0
%16 = fmul double %15, %0
%17 = fmul double %16, %0
%18 = fmul double %17, %0
%19 = fmul double %18, %0
%20 = fmul double %19, %0
%21 = add i32 %12, 8
%22 = icmp eq i32 %21, %9
br i1 %22, label %23, label %10
23: ; preds = %10, %4
%24 = phi double [ undef, %4 ], [ %20, %10 ]
%25 = phi double [ 1.000000e+00, %4 ], [ %20, %10 ]
%26 = icmp eq i32 %6, 0
br i1 %26, label %33, label %27
27: ; preds = %23, %27
%28 = phi double [ %30, %27 ], [ %25, %23 ]
%29 = phi i32 [ %31, %27 ], [ 0, %23 ]
%30 = fmul double %28, %0
%31 = add i32 %29, 1
%32 = icmp eq i32 %31, %6
br i1 %32, label %33, label %27
33: ; preds = %23, %27, %2
%34 = phi double [ 1.000000e+00, %2 ], [ %24, %23 ], [ %30, %27 ]
ret double %34
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t swap(uint32_t a) {
  return ((a >> 1) & (0x55555555)) | ((a << 1) & 0xaaaaaaaa);
}


x86 assembly (clang, -O0):
<swap>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
and    $0x55555555,%eax
mov    -0x4(%rbp),%ecx
shl    $0x1,%ecx
and    $0xaaaaaaaa,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap>:
mov    %edi,%eax
shr    %eax
and    $0x55555555,%eax
and    $0xd5555555,%edi
lea    (%rax,%rdi,2),%eax
ret

LLVM IR (-O0):
define i32 @swap(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 1
%5 = and i32 %4, 1431655765
%6 = load i32, i32* %2
%7 = shl i32 %6, 1
%8 = and i32 %7, -1431655766
%9 = or i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @swap(i32 %0) {
%2 = lshr i32 %0, 1
%3 = and i32 %2, 1431655765
%4 = shl i32 %0, 1
%5 = and i32 %4, -1431655766
%6 = or i32 %3, %5
ret i32 %6
}
long int my_fac(int n) {
  n = n * (n - 1);
  return n;
}


x86 assembly (clang, -O0):
<my_fac>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
sub    $0x1,%ecx
imul   %ecx,%eax
mov    %eax,-0x4(%rbp)
movslq -0x4(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_fac>:
lea    -0x1(%rdi),%eax
imul   %edi,%eax
cltq
ret

LLVM IR (-O0):
define i64 @my_fac(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 %4, 1
%6 = mul nsw i32 %3, %5
store i32 %6, i32* %2
%7 = load i32, i32* %2
%8 = sext i32 %7 to i64
ret i64 %8
}

LLVM IR (-O2):
define i64 @my_fac(i32 %0) {
%2 = add nsw i32 %0, -1
%3 = mul nsw i32 %2, %0
%4 = sext i32 %3 to i64
ret i64 %4
}
void *create(void) {
  int *a;
  a = malloc(sizeof(a));
  *a = 444;
  return a;
}


x86 assembly (clang, -O0):
<create>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x8,%edi
call   1030 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movl   $0x1bc,(%rax)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<create>:
push   %rax
mov    $0x8,%edi
call   1030 <malloc@plt>
movl   $0x1bc,(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define i8* @create() {
%1 = alloca i32*
%2 = call i8* @malloc(i64 8)
%3 = bitcast i8* %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
store i32 444, i32* %4
%5 = load i32*, i32** %1
%6 = bitcast i32* %5 to i8*
ret i8* %6
}

LLVM IR (-O2):
define noalias i8* @create() {
%1 = tail call dereferenceable_or_null(8) i8* @malloc(i64 8)
%2 = bitcast i8* %1 to i32*
store i32 444, i32* %2
ret i8* %1
}
/* Variables and functions */
int w5100_read_byte(int);
unsigned w5100_readTMSR() { return w5100_read_byte(0x001B); }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    $0x1b,%edi
call   1030 <w5100_read_byte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
mov    $0x1b,%edi
jmp    1030 <w5100_read_byte@plt>

LLVM IR (-O0):
define i32 @w5100_readTMSR() {
%1 = call i32 @w5100_read_byte(i32 27)
ret i32 %1
}

LLVM IR (-O2):
define i32 @w5100_readTMSR() {
%1 = tail call i32 @w5100_read_byte(i32 27)
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ cursor_normal;
int /*<<< orphan*/ tty_putp(int /*<<< orphan*/);
void tty_show_cursor() { tty_putp(cursor_normal); }


x86 assembly (clang, -O0):
<tty_show_cursor>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ecd(%rip),%rax
mov    (%rax),%edi
call   1030 <tty_putp@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<tty_show_cursor>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%edi
jmp    1030 <tty_putp@plt>

LLVM IR (-O0):
@cursor_normal = global i32 0
define void @tty_show_cursor() {
%1 = load i32, i32* @cursor_normal
%2 = call i32 @tty_putp(i32 %1)
ret void
}

LLVM IR (-O2):
@cursor_normal = global i32 0
define void @tty_show_cursor() {
%1 = load i32, i32* @cursor_normal
%2 = tail call i32 @tty_putp(i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __svgalib_driver24p_getbox(int, int, int, int, void *, int);
void __svgalib_driver24p_getboxpart(int x, int y, int w, int h, int ow, int oh,
                                    void *b, int xo, int yo) {
  __svgalib_driver24p_getbox(x, y, w, h, b + yo * ow + xo, ow);
}


x86 assembly (clang, -O0):
<__svgalib_driver24p_getboxpart>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x20(%rbp),%eax
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%rax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
mov    0x10(%rbp),%r8
mov    0x20(%rbp),%eax
imul   -0x14(%rbp),%eax
cltq
add    %rax,%r8
movslq 0x18(%rbp),%rax
add    %rax,%r8
mov    -0x14(%rbp),%r9d
call   1030 <__svgalib_driver24p_getbox@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__svgalib_driver24p_getboxpart>:
mov    %r8d,%r9d
movslq 0x10(%rsp),%r10
mov    0x18(%rsp),%eax
imul   %r8d,%eax
movslq %eax,%r8
add    0x8(%rsp),%r8
add    %r10,%r8
jmp    1030 <__svgalib_driver24p_getbox@plt>

LLVM IR (-O0):
define void @__svgalib_driver24p_getboxpart(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i8* %6, i32 %7, i32 %8) {
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i8*
%17 = alloca i32
%18 = alloca i32
store i32 %0, i32* %10
store i32 %1, i32* %11
store i32 %2, i32* %12
store i32 %3, i32* %13
store i32 %4, i32* %14
store i32 %5, i32* %15
store i8* %6, i8** %16
store i32 %7, i32* %17
store i32 %8, i32* %18
%19 = load i32, i32* %10
%20 = load i32, i32* %11
%21 = load i32, i32* %12
%22 = load i32, i32* %13
%23 = load i8*, i8** %16
%24 = load i32, i32* %18
%25 = load i32, i32* %14
%26 = mul nsw i32 %24, %25
%27 = sext i32 %26 to i64
%28 = getelementptr i8, i8* %23, i64 %27
%29 = load i32, i32* %17
%30 = sext i32 %29 to i64
%31 = getelementptr i8, i8* %28, i64 %30
%32 = load i32, i32* %14
%33 = call i32 @__svgalib_driver24p_getbox(i32 %19, i32 %20, i32 %21, i32 %22, i8* %31, i32 %32)
ret void
}

LLVM IR (-O2):
define void @__svgalib_driver24p_getboxpart(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i8* %6, i32 %7, i32 %8) {
%10 = mul nsw i32 %8, %4
%11 = sext i32 %10 to i64
%12 = getelementptr i8, i8* %6, i64 %11
%13 = sext i32 %7 to i64
%14 = getelementptr i8, i8* %12, i64 %13
%15 = tail call i32 @__svgalib_driver24p_getbox(i32 %0, i32 %1, i32 %2, i32 %3, i8* %14, i32 %4)
ret void
}
int control(int cmd, void *arg) {
  switch (cmd) {
  case 1:
    return 1;
  }
  return -1;
}


x86 assembly (clang, -O0):
<control>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
jne    1128 <control+0x28>
jmp    111c <control+0x1c>
movl   $0x1,-0x4(%rbp)
jmp    112f <control+0x2f>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<control>:
xor    %eax,%eax
cmp    $0x1,%edi
sete   %al
add    %eax,%eax
add    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @control(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i32, i32* %4
switch i32 %6, label %8 [
i32 1, label %7
]
7: ; preds = %2
store i32 1, i32* %3
br label %9
8: ; preds = %2
store i32 -1, i32* %3
br label %9
9: ; preds = %8, %7
%10 = load i32, i32* %3
ret i32 %10
}

LLVM IR (-O2):
define i32 @control(i32 %0, i8* nocapture readnone %1) {
%3 = icmp eq i32 %0, 1
%4 = select i1 %3, i32 1, i32 -1
ret i32 %4
}
/* Variables and functions */
scalar_t__ is_prime(int);
int fulfills_goldbach_theory(int n) {
  int i;
  for (i = 1; i < n; i += 2) {
    if (is_prime(i)) {
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<fulfills_goldbach_theory>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1158 <fulfills_goldbach_theory+0x48>
mov    -0x8(%rbp),%edi
call   1030 <is_prime@plt>
cmp    $0x0,%rax
je     1145 <fulfills_goldbach_theory+0x35>
jmp    1145 <fulfills_goldbach_theory+0x35>
jmp    114a <fulfills_goldbach_theory+0x3a>
mov    -0x8(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <fulfills_goldbach_theory+0x12>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fulfills_goldbach_theory>:
push   %rbp
push   %rbx
push   %rax
cmp    $0x2,%edi
jl     112e <fulfills_goldbach_theory+0x1e>
mov    %edi,%ebx
mov    $0x1,%ebp
nop
mov    %ebp,%edi
call   1030 <is_prime@plt>
add    $0x2,%ebp
cmp    %ebx,%ebp
jl     1120 <fulfills_goldbach_theory+0x10>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fulfills_goldbach_theory(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 1, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp slt i32 %5, %6
br i1 %7, label %8, label %17
8: ; preds = %4
%9 = load i32, i32* %3
%10 = call i64 @is_prime(i32 %9)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %13
12: ; preds = %8
br label %13
13: ; preds = %12, %8
br label %14
14: ; preds = %13
%15 = load i32, i32* %3
%16 = add nsw i32 %15, 2
store i32 %16, i32* %3
br label %4
17: ; preds = %4
ret i32 0
}

LLVM IR (-O2):
define i32 @fulfills_goldbach_theory(i32 %0) {
%2 = icmp sgt i32 %0, 1
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ 1, %1 ]
%5 = tail call i64 @is_prime(i32 %4)
%6 = add nuw nsw i32 %4, 2
%7 = icmp slt i32 %6, %0
br i1 %7, label %3, label %8
8: ; preds = %3, %1
ret i32 0
}
/* Variables and functions */
float fclamp(float, float, float);
float fclampNorm(float val) { return fclamp(val, 0.0f, 1.0f); }


x86 assembly (clang, -O0):
<fclampNorm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
xorps  %xmm1,%xmm1
movss  0xed3(%rip),%xmm2
call   1030 <fclamp@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fclampNorm>:
movss  0xee8(%rip),%xmm2
xorps  %xmm1,%xmm1
jmp    1030 <fclamp@plt>

LLVM IR (-O0):
define float @fclampNorm(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @fclamp(float %3, float 0.000000e+00, float 1.000000e+00)
ret float %4
}

LLVM IR (-O2):
define float @fclampNorm(float %0) {
%2 = tail call float @fclamp(float %0, float 0.000000e+00, float 1.000000e+00)
ret float %2
}
/* Variables and functions */
int tlsio_openssl_init();
int platform_init(void) { return tlsio_openssl_init(); }


x86 assembly (clang, -O0):
<platform_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <tlsio_openssl_init@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<platform_init>:
xor    %eax,%eax
jmp    1030 <tlsio_openssl_init@plt>

LLVM IR (-O0):
define i32 @platform_init() {
%1 = call i32 (...) @tlsio_openssl_init()
ret i32 %1
}

LLVM IR (-O2):
define i32 @platform_init() {
%1 = tail call i32 (...) @tlsio_openssl_init()
ret i32 %1
}
/* Variables and functions */
int /*<<< orphan*/ __bzero(void *, size_t);
void *__malloc(size_t);
void *__calloc(size_t n, size_t sz) {
  register void *r;
  register size_t total;
  total = n * sz;
  r = __malloc(total);
  if (r != NULL)
    __bzero(r, total);
  return r;
}


x86 assembly (clang, -O0):
<__calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
imul   -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
call   1040 <__malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     1162 <__calloc+0x42>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <__bzero@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__calloc>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
imul   %rsi,%rbx
mov    %rbx,%rdi
call   1040 <__malloc@plt>
mov    %rax,%r14
test   %rax,%rax
je     1146 <__calloc+0x26>
mov    %r14,%rdi
mov    %rbx,%rsi
call   1030 <__bzero@plt>
mov    %r14,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @__calloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %3
%8 = load i64, i64* %4
%9 = mul i64 %7, %8
store i64 %9, i64* %6
%10 = load i64, i64* %6
%11 = call i8* @__malloc(i64 %10)
store i8* %11, i8** %5
%12 = load i8*, i8** %5
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %18
14: ; preds = %2
%15 = load i8*, i8** %5
%16 = load i64, i64* %6
%17 = call i32 @__bzero(i8* %15, i64 %16)
br label %18
18: ; preds = %14, %2
%19 = load i8*, i8** %5
ret i8* %19
}

LLVM IR (-O2):
define i8* @__calloc(i64 %0, i64 %1) {
%3 = mul i64 %1, %0
%4 = tail call i8* @__malloc(i64 %3)
%5 = icmp eq i8* %4, null
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @__bzero(i8* %4, i64 %3)
br label %8
8: ; preds = %6, %2
ret i8* %4
}
void GB_MINV_f_FP32(float *z, const float *x) { (*z) = 1 / ((*x)); }


x86 assembly (clang, -O0):
<GB_MINV_f_FP32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movss  0xee8(%rip),%xmm0
divss  (%rax),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<GB_MINV_f_FP32>:
movss  0xef8(%rip),%xmm0
divss  (%rsi),%xmm0
movss  %xmm0,(%rdi)
ret

LLVM IR (-O0):
define void @GB_MINV_f_FP32(float* %0, float* %1) {
%3 = alloca float*
%4 = alloca float*
store float* %0, float** %3
store float* %1, float** %4
%5 = load float*, float** %4
%6 = load float, float* %5
%7 = fdiv float 1.000000e+00, %6
%8 = load float*, float** %3
store float %7, float* %8
ret void
}

LLVM IR (-O2):
define void @GB_MINV_f_FP32(float* nocapture writeonly %0, float* nocapture %1) {
%3 = load float, float* %1
%4 = fdiv float 1.000000e+00, %3
store float %4, float* %0
ret void
}
int rem_mode(int cur, int rem) { return cur & (~rem); }


x86 assembly (clang, -O0):
<rem_mode>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rem_mode>:
mov    %esi,%eax
not    %eax
and    %edi,%eax
ret

LLVM IR (-O0):
define i32 @rem_mode(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %6, -1
%8 = and i32 %5, %7
ret i32 %8
}

LLVM IR (-O2):
define i32 @rem_mode(i32 %0, i32 %1) {
%3 = xor i32 %1, -1
%4 = and i32 %3, %0
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ bcp();
void flbcp(void) { bcp(); }


x86 assembly (clang, -O0):
<flbcp>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <bcp@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<flbcp>:
xor    %eax,%eax
jmp    1030 <bcp@plt>

LLVM IR (-O0):
define void @flbcp() {
%1 = call i32 (...) @bcp()
ret void
}

LLVM IR (-O2):
define void @flbcp() {
%1 = tail call i32 (...) @bcp()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int const);
void putNum(const int num) { printf("%i", num); }


x86 assembly (clang, -O0):
<putNum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putNum>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [3 x i8] c"%i\00"
define void @putNum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%i\00"
define void @putNum(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
/* Type definitions */
struct tm {
  scalar_t__ tm_hour;
};

/* Variables and functions */
struct tm *time_get_localtime(int /*<<< orphan*/);
int /*<<< orphan*/ time_get_timestamp();
unsigned long time_get_hour(void) {
  const struct tm *const date = time_get_localtime(time_get_timestamp());
  return (unsigned long)date->tm_hour;
}


x86 assembly (clang, -O0):
<time_get_hour>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <time_get_timestamp@plt>
mov    %eax,%edi
call   1040 <time_get_localtime@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<time_get_hour>:
push   %rax
xor    %eax,%eax
call   1030 <time_get_timestamp@plt>
mov    %eax,%edi
call   1040 <time_get_localtime@plt>
mov    (%rax),%rax
pop    %rcx
ret

LLVM IR (-O0):
%struct.tm = type { i64 }
define i64 @time_get_hour() {
%1 = alloca %struct.tm*
%2 = call i32 (...) @time_get_timestamp()
%3 = call %struct.tm* @time_get_localtime(i32 %2)
store %struct.tm* %3, %struct.tm** %1
%4 = load %struct.tm*, %struct.tm** %1
%5 = getelementptr inbounds %struct.tm, %struct.tm* %4, i32 0, i32 0
%6 = load i64, i64* %5
ret i64 %6
}

LLVM IR (-O2):
%struct.tm = type { i64 }
define i64 @time_get_hour() {
%1 = tail call i32 (...) @time_get_timestamp()
%2 = tail call %struct.tm* @time_get_localtime(i32 %1)
%3 = getelementptr inbounds %struct.tm, %struct.tm* %2, i64 0, i32 0
%4 = load i64, i64* %3
ret i64 %4
}
unsigned int test_16(int x) { return ~(x >> 31) & 0xFF000000; }


x86 assembly (clang, -O0):
<test_16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1f,%eax
xor    $0xffffffff,%eax
and    $0xff000000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_16>:
shr    $0x7,%edi
and    $0x1000000,%edi
lea    -0x1000000(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @test_16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 31
%5 = xor i32 %4, -1
%6 = and i32 %5, -16777216
ret i32 %6
}

LLVM IR (-O2):
define i32 @test_16(i32 %0) {
%2 = icmp slt i32 %0, 0
%3 = select i1 %2, i32 0, i32 -16777216
ret i32 %3
}
double solar_perigee(double tdt) {
  double T;
  double lon;
  T = (tdt - (2433282.42345905)) / (36525.0);
  lon = 1015489.951 + T * (6190.67 + (T * (1.65 + (T * 0.012))));
  lon = (((((lon) / 3600.0)) * ((3.14159265358979323846) / 180.0)));
  return (lon);
}


x86 assembly (clang, -O0):
<solar_perigee>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xf22(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  0xf0e(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm2
movsd  0xede(%rip),%xmm3
mulsd  %xmm3,%xmm2
movsd  0xeda(%rip),%xmm3
addsd  %xmm3,%xmm2
mulsd  %xmm2,%xmm1
movsd  0xeba(%rip),%xmm2
addsd  %xmm2,%xmm1
mulsd  %xmm1,%xmm0
movsd  0xea2(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
movsd  0xe84(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  0xe70(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<solar_perigee>:
addsd  0xef8(%rip),%xmm0
divsd  0xef8(%rip),%xmm0
movsd  0xef8(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  0xef4(%rip),%xmm1
mulsd  %xmm0,%xmm1
addsd  0xef0(%rip),%xmm1
mulsd  %xmm1,%xmm0
addsd  0xeec(%rip),%xmm0
divsd  0xeec(%rip),%xmm0
mulsd  0xeec(%rip),%xmm0
ret

LLVM IR (-O0):
define double @solar_perigee(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
%5 = load double, double* %2
%6 = fsub double %5, 0x414290813633E7F9
%7 = fdiv double %6, 3.652500e+04
store double %7, double* %3
%8 = load double, double* %3
%9 = load double, double* %3
%10 = load double, double* %3
%11 = call double @llvm.fmuladd.f64(double %10, double 1.200000e-02, double 1.650000e+00)
%12 = call double @llvm.fmuladd.f64(double %9, double %11, double 6.190670e+03)
%13 = call double @llvm.fmuladd.f64(double %8, double %12, double 0x412EFD83E6E978D5)
store double %13, double* %4
%14 = load double, double* %4
%15 = fdiv double %14, 3.600000e+03
%16 = fmul double %15, 0x3F91DF46A2529D39
store double %16, double* %4
%17 = load double, double* %4
ret double %17
}

LLVM IR (-O2):
define double @solar_perigee(double %0) {
%2 = fadd double %0, 0xC14290813633E7F9
%3 = fdiv double %2, 3.652500e+04
%4 = tail call double @llvm.fmuladd.f64(double %3, double 1.200000e-02, double 1.650000e+00)
%5 = tail call double @llvm.fmuladd.f64(double %3, double %4, double 6.190670e+03)
%6 = tail call double @llvm.fmuladd.f64(double %3, double %5, double 0x412EFD83E6E978D5)
%7 = fdiv double %6, 3.600000e+03
%8 = fmul double %7, 0x3F91DF46A2529D39
ret double %8
}
/* Variables and functions */
int /*<<< orphan*/ nm_generic_enable_loopback();
void nm_backend_enable_loopback(void) { nm_generic_enable_loopback(); }


x86 assembly (clang, -O0):
<nm_backend_enable_loopback>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <nm_generic_enable_loopback@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<nm_backend_enable_loopback>:
xor    %eax,%eax
jmp    1030 <nm_generic_enable_loopback@plt>

LLVM IR (-O0):
define void @nm_backend_enable_loopback() {
%1 = call i32 (...) @nm_generic_enable_loopback()
ret void
}

LLVM IR (-O2):
define void @nm_backend_enable_loopback() {
%1 = tail call i32 (...) @nm_generic_enable_loopback()
ret void
}
/* Variables and functions */
int fd_add(int, int);
int /*<<< orphan*/ printf(char *, int);
int main() {
  int x, y, z;
  x = 2;
  y = 3;
  z = fd_add(x, y);
  printf("Z = %d\n", z);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x2,-0x8(%rbp)
movl   $0x3,-0xc(%rbp)
mov    -0x8(%rbp),%edi
mov    -0xc(%rbp),%esi
call   1040 <fd_add@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%esi
lea    0xeab(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
mov    $0x3,%esi
call   1040 <fd_add@plt>
lea    0xec9(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [8 x i8] c"Z = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 0, i32* %1
store i32 2, i32* %2
store i32 3, i32* %3
%5 = load i32, i32* %2
%6 = load i32, i32* %3
%7 = call i32 @fd_add(i32 %5, i32 %6)
store i32 %7, i32* %4
%8 = load i32, i32* %4
%9 = call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %8)
ret i32 0
}

LLVM IR (-O2):
@.str = [8 x i8] c"Z = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @fd_add(i32 2, i32 3)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
int dd_neq_d_dd(double a, const double *b) {
  return ((a != b[0]) || (b[1] != 0.0)) ? 1 : 0;
}


x86 assembly (clang, -O0):
<dd_neq_d_dd>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
mov    %rdi,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    -0x10(%rbp),%rcx
mov    $0x1,%al
ucomisd (%rcx),%xmm0
mov    %al,-0x11(%rbp)
jne    1146 <dd_neq_d_dd+0x46>
jp     1146 <dd_neq_d_dd+0x46>
mov    -0x10(%rbp),%rax
movsd  0x8(%rax),%xmm0
xorps  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
setne  %al
setp   %cl
or     %cl,%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dd_neq_d_dd>:
movsd  (%rdi),%xmm1
mov    $0x1,%eax
ucomisd %xmm0,%xmm1
jne    1111 <dd_neq_d_dd+0x11>
jnp    1112 <dd_neq_d_dd+0x12>
ret
xorpd  %xmm0,%xmm0
cmpneqsd 0x8(%rdi),%xmm0
movq   %xmm0,%rax
and    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @dd_neq_d_dd(double %0, double* %1) {
%3 = alloca double
%4 = alloca double*
store double %0, double* %3
store double* %1, double** %4
%5 = load double, double* %3
%6 = load double*, double** %4
%7 = getelementptr inbounds double, double* %6, i64 0
%8 = load double, double* %7
%9 = fcmp une double %5, %8
br i1 %9, label %15, label %10
10: ; preds = %2
%11 = load double*, double** %4
%12 = getelementptr inbounds double, double* %11, i64 1
%13 = load double, double* %12
%14 = fcmp une double %13, 0.000000e+00
br label %15
15: ; preds = %10, %2
%16 = phi i1 [ true, %2 ], [ %14, %10 ]
%17 = zext i1 %16 to i64
%18 = select i1 %16, i32 1, i32 0
ret i32 %18
}

LLVM IR (-O2):
define i32 @dd_neq_d_dd(double %0, double* nocapture %1) {
%3 = load double, double* %1
%4 = fcmp une double %3, %0
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = getelementptr inbounds double, double* %1, i64 1
%7 = load double, double* %6
%8 = fcmp une double %7, 0.000000e+00
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %5, %2
%11 = phi i32 [ 1, %2 ], [ %9, %5 ]
ret i32 %11
}
void gtk_icon_source_get_icon_name() {}


x86 assembly (clang, -O0):
<gtk_icon_source_get_icon_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_icon_source_get_icon_name>:
ret

LLVM IR (-O0):
define void @gtk_icon_source_get_icon_name() {
ret void
}

LLVM IR (-O2):
define void @gtk_icon_source_get_icon_name() {
ret void
}