xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ exit(int);
scalar_t__ fmod(double, int);
int /*<<< orphan*/ puts(char *);
double strtod(char *, int /*<<< orphan*/ *);
void detect_idiots(char *alen) {
  double nlen = strtod(alen, NULL);
  if (nlen < 0 || fmod(nlen, 1)) {
    puts("ERROR: non-negative integers and quotients cannot be a password "
         "length!");
    exit(1);
  }
}


x86 assembly (clang, -O0):
<detect_idiots>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1040 <strtod@plt>
movsd  %xmm0,-0x10(%rbp)
xorps  %xmm0,%xmm0
ucomisd -0x10(%rbp),%xmm0
ja     1185 <detect_idiots+0x45>
movsd  -0x10(%rbp),%xmm0
mov    $0x1,%edi
call   1050 <fmod@plt>
cmp    $0x0,%rax
je     119b <detect_idiots+0x5b>
lea    0xe74(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1060 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<detect_idiots>:
push   %rax
xor    %esi,%esi
call   1040 <strtod@plt>
xorpd  %xmm1,%xmm1
ucomisd %xmm0,%xmm1
ja     1163 <detect_idiots+0x23>
mov    $0x1,%edi
call   1050 <fmod@plt>
test   %rax,%rax
jne    1163 <detect_idiots+0x23>
pop    %rax
ret
lea    0xe96(%rip),%rdi
call   1030 <puts@plt>
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [72 x i8] c"ERROR: non-negative integers and quotients cannot be a password length!\00"
define void @detect_idiots(i8* %0) {
%2 = alloca i8*
%3 = alloca double
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call double @strtod(i8* %4, i32* null)
store double %5, double* %3
%6 = load double, double* %3
%7 = fcmp olt double %6, 0.000000e+00
br i1 %7, label %12, label %8
8: ; preds = %1
%9 = load double, double* %3
%10 = call i64 @fmod(double %9, i32 1)
%11 = icmp ne i64 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %8, %1
%13 = call i32 @puts(i8* getelementptr inbounds ([72 x i8], [72 x i8]* @.str, i64 0, i64 0))
%14 = call i32 @exit(i32 1)
unreachable
15: ; preds = %8
ret void
}

LLVM IR (-O2):
@.str = [72 x i8] c"ERROR: non-negative integers and quotients cannot be a password length!\00"
define void @detect_idiots(i8* nocapture %0) {
%2 = tail call double @strtod(i8* nocapture %0, i32* null)
%3 = fcmp olt double %2, 0.000000e+00
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i64 @fmod(double %2, i32 1)
%6 = icmp eq i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %4, %1
%8 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([72 x i8], [72 x i8]* @.str, i64 0, i64 0))
%9 = tail call i32 @exit(i32 1)
unreachable
10: ; preds = %4
ret void
}
long fibonacci(long n) {
  if (n == 0) {
    return 0;
  } else if (n == 1) {
    return 1;
  } else {
    return fibonacci(n - 1) + fibonacci(n - 2);
  }
}


x86 assembly (clang, -O0):
<fibonacci>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <fibonacci+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1178 <fibonacci+0x68>
cmpq   $0x1,-0x10(%rbp)
jne    114c <fibonacci+0x3c>
movq   $0x1,-0x8(%rbp)
jmp    1178 <fibonacci+0x68>
mov    -0x10(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <fibonacci@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
sub    $0x2,%rdi
call   1030 <fibonacci@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fibonacci>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %r14d,%r14d
cmp    $0x2,%rbx
jb     1136 <fibonacci+0x26>
lea    -0x1(%rbx),%rdi
call   1030 <fibonacci@plt>
add    %rax,%r14
add    $0xfffffffffffffffe,%rbx
cmp    $0x2,%rbx
jae    1120 <fibonacci+0x10>
add    %r14,%rbx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i64 @fibonacci(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp eq i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %19
7: ; preds = %1
%8 = load i64, i64* %3
%9 = icmp eq i64 %8, 1
br i1 %9, label %10, label %11
10: ; preds = %7
store i64 1, i64* %2
br label %19
11: ; preds = %7
%12 = load i64, i64* %3
%13 = sub nsw i64 %12, 1
%14 = call i64 @fibonacci(i64 %13)
%15 = load i64, i64* %3
%16 = sub nsw i64 %15, 2
%17 = call i64 @fibonacci(i64 %16)
%18 = add nsw i64 %14, %17
store i64 %18, i64* %2
br label %19
19: ; preds = %11, %10, %6
%20 = load i64, i64* %2
ret i64 %20
}

LLVM IR (-O2):
define i64 @fibonacci(i64 %0) {
br label %2
2: ; preds = %6, %1
%3 = phi i64 [ 0, %1 ], [ %10, %6 ]
%4 = phi i64 [ %0, %1 ], [ %9, %6 ]
%5 = icmp ult i64 %4, 2
br i1 %5, label %11, label %6
6: ; preds = %2
%7 = add nsw i64 %4, -1
%8 = tail call i64 @fibonacci(i64 %7)
%9 = add nsw i64 %4, -2
%10 = add nsw i64 %8, %3
br label %2
11: ; preds = %2
%12 = add nsw i64 %4, %3
ret i64 %12
}
void GPIOPortQ3_Handler(void) {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<GPIOPortQ3_Handler>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <GPIOPortQ3_Handler+0x9>
jmp    1109 <GPIOPortQ3_Handler+0x9>

x86 assembly (clang, -O2):
<GPIOPortQ3_Handler>:
jmp    1100 <GPIOPortQ3_Handler>

LLVM IR (-O0):
define void @GPIOPortQ3_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @GPIOPortQ3_Handler() {
br label %1
1: ; preds = %0, %1
br label %1
}
int is_socket_error(int x) { return x < 0; }


x86 assembly (clang, -O0):
<is_socket_error>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_socket_error>:
mov    %edi,%eax
shr    $0x1f,%eax
ret

LLVM IR (-O0):
define i32 @is_socket_error(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @is_socket_error(i32 %0) {
%2 = lshr i32 %0, 31
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ stdin;
char *strchr(char *, char);
void get_input(char *input) {
  fgets(input, 80, stdin);
  char *ptr = strchr(input, '\n');
  if (ptr) {
    *ptr = '\0';
  }
}


x86 assembly (clang, -O0):
<get_input>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
mov    $0x50,%esi
call   1040 <fgets@plt>
mov    -0x8(%rbp),%rdi
mov    $0xa,%esi
call   1030 <strchr@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1167 <get_input+0x47>
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_input>:
push   %rbx
mov    %rdi,%rbx
mov    0x2ebd(%rip),%rax
mov    (%rax),%edx
mov    $0x50,%esi
call   1040 <fgets@plt>
mov    %rbx,%rdi
mov    $0xa,%esi
call   1030 <strchr@plt>
test   %rax,%rax
je     114c <get_input+0x2c>
movb   $0x0,(%rax)
pop    %rbx
ret

LLVM IR (-O0):
@stdin = global i32 0
define void @get_input(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = load i32, i32* @stdin
%6 = call i32 @fgets(i8* %4, i32 80, i32 %5)
%7 = load i8*, i8** %2
%8 = call i8* @strchr(i8* %7, i8 signext 10)
store i8* %8, i8** %3
%9 = load i8*, i8** %3
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %13
11: ; preds = %1
%12 = load i8*, i8** %3
store i8 0, i8* %12
br label %13
13: ; preds = %11, %1
ret void
}

LLVM IR (-O2):
@stdin = global i32 0
define void @get_input(i8* %0) {
%2 = load i32, i32* @stdin
%3 = tail call i32 @fgets(i8* %0, i32 80, i32 %2)
%4 = tail call i8* @strchr(i8* dereferenceable(1) %0, i8 signext 10)
%5 = icmp eq i8* %4, null
br i1 %5, label %7, label %6
6: ; preds = %1
store i8 0, i8* %4
br label %7
7: ; preds = %6, %1
ret void
}
/* Type definitions */
typedef int int64_t;

/* Variables and functions */
int ilog2(int64_t n) {
  if (n <= 1)
    return 1;
  else {
    int r = 0;
    int64_t c = 1;
    while (c < n) {
      r += 1;
      c *= 2;
    }
    return r;
  }
}


x86 assembly (clang, -O0):
<ilog2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x1,-0x8(%rbp)
jg     111d <ilog2+0x1d>
movl   $0x1,-0x4(%rbp)
jmp    1154 <ilog2+0x54>
movl   $0x0,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    114e <ilog2+0x4e>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x10(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112b <ilog2+0x2b>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ilog2>:
mov    $0x1,%eax
cmp    $0x2,%edi
jl     1129 <ilog2+0x29>
xor    %eax,%eax
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
add    $0x1,%eax
add    %ecx,%ecx
cmp    %edi,%ecx
jl     1120 <ilog2+0x20>
ret

LLVM IR (-O0):
define i32 @ilog2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = icmp sle i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 1, i32* %2
br label %21
9: ; preds = %1
store i32 0, i32* %4
store i32 1, i32* %5
br label %10
10: ; preds = %14, %9
%11 = load i32, i32* %5
%12 = load i32, i32* %3
%13 = icmp slt i32 %11, %12
br i1 %13, label %14, label %19
14: ; preds = %10
%15 = load i32, i32* %4
%16 = add nsw i32 %15, 1
store i32 %16, i32* %4
%17 = load i32, i32* %5
%18 = mul nsw i32 %17, 2
store i32 %18, i32* %5
br label %10
19: ; preds = %10
%20 = load i32, i32* %4
store i32 %20, i32* %2
br label %21
21: ; preds = %19, %8
%22 = load i32, i32* %2
ret i32 %22
}

LLVM IR (-O2):
define i32 @ilog2(i32 %0) {
%2 = icmp slt i32 %0, 2
br i1 %2, label %9, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 1, %1 ]
%5 = phi i32 [ %6, %3 ], [ 0, %1 ]
%6 = add nuw nsw i32 %5, 1
%7 = shl nsw i32 %4, 1
%8 = icmp slt i32 %7, %0
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 1, %1 ], [ %6, %3 ]
ret i32 %10
}
int qux2(int x) { return x > x; }


x86 assembly (clang, -O0):
<qux2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x4(%rbp),%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<qux2>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @qux2(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = icmp sgt i32 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @qux2(i32 %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isascii(int);
void t_isascii_0xf5() {
  Assert_real((isascii(245) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isascii.c",
              1230, ("isascii should be 0 for 0xf5"));
}


x86 assembly (clang, -O0):
<t_isascii_0xf5>:
push   %rbp
mov    %rsp,%rbp
mov    $0xf5,%edi
call   1030 <isascii@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x4ce,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isascii_0xf5>:
push   %rax
mov    $0xf5,%edi
call   1030 <isascii@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x4ce,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xf5\00"
define void @t_isascii_0xf5() {
%1 = call i64 @isascii(i32 245)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1230, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isascii.c\00"
@.str.1 = [29 x i8] c"isascii should be 0 for 0xf5\00"
define void @t_isascii_0xf5() {
%1 = tail call i64 @isascii(i32 245)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 1230, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ g_store(int);
void istore1(void) { g_store(1); }


x86 assembly (clang, -O0):
<istore1>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <g_store@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<istore1>:
mov    $0x1,%edi
jmp    1030 <g_store@plt>

LLVM IR (-O0):
define void @istore1() {
%1 = call i32 @g_store(i32 1)
ret void
}

LLVM IR (-O2):
define void @istore1() {
%1 = tail call i32 @g_store(i32 1)
ret void
}
/* Type definitions */
struct generic_s {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ hold_ptr(struct generic_s *);
void init_ptr_(struct generic_s **pptr, struct generic_s *ptr) {
  hold_ptr(ptr);
  *pptr = ptr;
}


x86 assembly (clang, -O0):
<init_ptr_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <hold_ptr@plt>
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_ptr_>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1030 <hold_ptr@plt>
mov    %rbx,(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.generic_s = type { i32 }
define void @init_ptr_(%struct.generic_s** %0, %struct.generic_s* %1) {
%3 = alloca %struct.generic_s**
%4 = alloca %struct.generic_s*
store %struct.generic_s** %0, %struct.generic_s*** %3
store %struct.generic_s* %1, %struct.generic_s** %4
%5 = load %struct.generic_s*, %struct.generic_s** %4
%6 = call i32 @hold_ptr(%struct.generic_s* %5)
%7 = load %struct.generic_s*, %struct.generic_s** %4
%8 = load %struct.generic_s**, %struct.generic_s*** %3
store %struct.generic_s* %7, %struct.generic_s** %8
ret void
}

LLVM IR (-O2):
%struct.generic_s = type { i32 }
define void @init_ptr_(%struct.generic_s** nocapture writeonly %0, %struct.generic_s* %1) {
%3 = tail call i32 @hold_ptr(%struct.generic_s* %1)
store %struct.generic_s* %1, %struct.generic_s** %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *);
int dump_token_inplace(const char *token, void *arg2) {
  printf("token = %s\n", token);
  return 0;
}


x86 assembly (clang, -O0):
<dump_token_inplace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<dump_token_inplace>:
push   %rax
mov    %rdi,%rsi
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"token = %s\0A\00"
define i32 @dump_token_inplace(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [12 x i8] c"token = %s\0A\00"
define i32 @dump_token_inplace(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i32 0
}
unsigned char bigint_sub(unsigned char *r, const unsigned char *x,
                         unsigned long xlen, const unsigned char *y,
                         unsigned long ylen) {}


x86 assembly (clang, -O0):
<bigint_sub>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    %r8,-0x30(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bigint_sub>:
ret

LLVM IR (-O0):
define zeroext i8 @bigint_sub(i8* %0, i8* %1, i64 %2, i8* %3, i64 %4) {
%6 = alloca i8
%7 = alloca i8*
%8 = alloca i8*
%9 = alloca i64
%10 = alloca i8*
%11 = alloca i64
store i8* %0, i8** %7
store i8* %1, i8** %8
store i64 %2, i64* %9
store i8* %3, i8** %10
store i64 %4, i64* %11
%12 = load i8, i8* %6
ret i8 %12
}

LLVM IR (-O2):
define zeroext i8 @bigint_sub(i8* nocapture readnone %0, i8* nocapture readnone %1, i64 %2, i8* nocapture readnone %3, i64 %4) {
ret i8 undef
}
int FILE_X(int sq) { return sq & 15; }


x86 assembly (clang, -O0):
<FILE_X>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xf,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<FILE_X>:
mov    %edi,%eax
and    $0xf,%eax
ret

LLVM IR (-O0):
define i32 @FILE_X(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 15
ret i32 %4
}

LLVM IR (-O2):
define i32 @FILE_X(i32 %0) {
%2 = and i32 %0, 15
ret i32 %2
}
/* Type definitions */
struct stat {
  int /*<<< orphan*/ st_mode;
};

/* Variables and functions */
int S_ISREG(int /*<<< orphan*/);
int main(int argc, char **argv) {
  struct stat stat_buffer;
  return S_ISREG(stat_buffer.st_mode);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x18(%rbp),%edi
call   1030 <S_ISREG@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <S_ISREG@plt>

LLVM IR (-O0):
%struct.stat = type { i32 }
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca %struct.stat
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = getelementptr inbounds %struct.stat, %struct.stat* %6, i32 0, i32 0
%8 = load i32, i32* %7
%9 = call i32 @S_ISREG(i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @S_ISREG(i32 undef)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ cleanup();
int /*<<< orphan*/ exit(int);
void quit(int sig) {
  cleanup();
  exit(1);
}


x86 assembly (clang, -O0):
<quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <cleanup@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<quit>:
push   %rax
xor    %eax,%eax
call   1030 <cleanup@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @quit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @cleanup()
%4 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @quit(i32 %0) {
%2 = tail call i32 (...) @cleanup()
%3 = tail call i32 @exit(i32 1)
unreachable
}
__attribute__((always_)) void kmemcheck_mark_freed(void *address,
                                                   unsigned int n) {}


x86 assembly (clang, -O0):
<kmemcheck_mark_freed>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<kmemcheck_mark_freed>:
ret

LLVM IR (-O0):
define void @kmemcheck_mark_freed(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @kmemcheck_mark_freed(i8* nocapture %0, i32 %1) {
ret void
}
/* Variables and functions */
scalar_t__ isspace(int);
int utlisspace(int ch) { return (ch <= 0xFF) && isspace(ch); }


x86 assembly (clang, -O0):
<utlisspace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0xff,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jg     113f <utlisspace+0x2f>
mov    -0x4(%rbp),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<utlisspace>:
xor    %eax,%eax
cmp    $0xff,%edi
jg     112f <utlisspace+0x1f>
push   %rax
call   1030 <isspace@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i32 @utlisspace(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sle i32 %3, 255
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, i32* %2
%7 = call i64 @isspace(i32 %6)
%8 = icmp ne i64 %7, 0
br label %9
9: ; preds = %5, %1
%10 = phi i1 [ false, %1 ], [ %8, %5 ]
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @utlisspace(i32 %0) {
%2 = icmp slt i32 %0, 256
br i1 %2, label %3, label %7
3: ; preds = %1
%4 = tail call i64 @isspace(i32 %0)
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %1
%8 = phi i32 [ 0, %1 ], [ %6, %3 ]
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ DEBUG_ASSERT(int);
void PECIIntDisable(unsigned long ulBase, unsigned long ulIntFlags) {
  DEBUG_ASSERT(ulBase == 0x400B0000);
  (*((volatile unsigned long *)(ulBase + 0x00000080))) &= ~ulIntFlags;
}


x86 assembly (clang, -O0):
<PECIIntDisable>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x400b0000,-0x8(%rbp)
40
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <DEBUG_ASSERT@plt>
mov    -0x10(%rbp),%rdx
xor    $0xffffffffffffffff,%rdx
mov    -0x8(%rbp),%rax
mov    0x80(%rax),%rcx
and    %rdx,%rcx
mov    %rcx,0x80(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<PECIIntDisable>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
xor    %edi,%edi
cmp    $0x400b0000,%r14
sete   %dil
call   1030 <DEBUG_ASSERT@plt>
not    %rbx
and    %rbx,0x80(%r14)
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @PECIIntDisable(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = icmp eq i64 %5, 1074462720
%7 = zext i1 %6 to i32
%8 = call i32 @DEBUG_ASSERT(i32 %7)
%9 = load i64, i64* %4
%10 = xor i64 %9, -1
%11 = load i64, i64* %3
%12 = add i64 %11, 128
%13 = inttoptr i64 %12 to i64*
%14 = load volatile i64, i64* %13
%15 = and i64 %14, %10
store volatile i64 %15, i64* %13
ret void
}

LLVM IR (-O2):
define void @PECIIntDisable(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, 1074462720
%4 = zext i1 %3 to i32
%5 = tail call i32 @DEBUG_ASSERT(i32 %4)
%6 = xor i64 %1, -1
%7 = add i64 %0, 128
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, %6
store volatile i64 %10, i64* %8
ret void
}
/* Variables and functions */
float __infer_nondet_float();
float lgammaf(float x) { return __infer_nondet_float(); }


x86 assembly (clang, -O0):
<lgammaf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__infer_nondet_float@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lgammaf>:
xor    %eax,%eax
jmp    1030 <__infer_nondet_float@plt>

LLVM IR (-O0):
define float @lgammaf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = call float (...) @__infer_nondet_float()
ret float %3
}

LLVM IR (-O2):
define float @lgammaf(float %0) {
%2 = tail call float (...) @__infer_nondet_float()
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ Sound_StopAllSounds();
void Sound_StopSound_f(void) { Sound_StopAllSounds(); }


x86 assembly (clang, -O0):
<Sound_StopSound_f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Sound_StopAllSounds@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Sound_StopSound_f>:
xor    %eax,%eax
jmp    1030 <Sound_StopAllSounds@plt>

LLVM IR (-O0):
define void @Sound_StopSound_f() {
%1 = call i32 (...) @Sound_StopAllSounds()
ret void
}

LLVM IR (-O2):
define void @Sound_StopSound_f() {
%1 = tail call i32 (...) @Sound_StopAllSounds()
ret void
}
/* Variables and functions */
float hgetdecender();
float hgetde_() { return (hgetdecender()); }


x86 assembly (clang, -O0):
<hgetde_>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <hgetdecender@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<hgetde_>:
xor    %eax,%eax
jmp    1030 <hgetdecender@plt>

LLVM IR (-O0):
define float @hgetde_() {
%1 = call float (...) @hgetdecender()
ret float %1
}

LLVM IR (-O2):
define float @hgetde_() {
%1 = tail call float (...) @hgetdecender()
ret float %1
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
uint32_t MIPS_SYSCALL(unsigned code) {
  return (0x00000000 | ((code & 0x000FFFFF) << 6));
}


x86 assembly (clang, -O0):
<MIPS_SYSCALL>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xfffff,%eax
shl    $0x6,%eax
or     $0x0,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MIPS_SYSCALL>:
mov    %edi,%eax
shl    $0x6,%eax
and    $0x3ffffc0,%eax
ret

LLVM IR (-O0):
define i32 @MIPS_SYSCALL(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 1048575
%5 = shl i32 %4, 6
%6 = or i32 0, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @MIPS_SYSCALL(i32 %0) {
%2 = shl i32 %0, 6
%3 = and i32 %2, 67108800
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void _alarm_handler(void *arg) {
  (void)arg;
  puts("The alarm rang");
}


x86 assembly (clang, -O0):
<_alarm_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
call   1030 <puts@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_alarm_handler>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"The alarm rang\00"
define void @_alarm_handler(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @puts(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [15 x i8] c"The alarm rang\00"
define void @_alarm_handler(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int strcmp(char *, char *);
char *fun(char *p1, char *p2) {
  int i = 0;
  i = strcmp(p1, p2);
  if (0 == i) {
    printf("p1\r\n");
    return p1;
  } else {
    printf("p2\r\n");
    return p2;
  }
}


x86 assembly (clang, -O0):
<fun>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1040 <strcmp@plt>
mov    %eax,-0x1c(%rbp)
xor    %eax,%eax
cmp    -0x1c(%rbp),%eax
jne    116b <fun+0x4b>
lea    0xea7(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    117f <fun+0x5f>
lea    0xe93(%rip),%rdi
call   1030 <printf@plt>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
call   1040 <strcmp@plt>
test   %eax,%eax
lea    0xecc(%rip),%rax
lea    0xec1(%rip),%rdi
cmove  %rax,%rdi
cmove  %r14,%rbx
call   1030 <puts@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [5 x i8] c"p1\0D\0A\00"
@.str.1 = [5 x i8] c"p2\0D\0A\00"
define i8* @fun(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 0, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = call i32 @strcmp(i8* %7, i8* %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp eq i32 0, %10
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0))
%14 = load i8*, i8** %4
store i8* %14, i8** %3
br label %18
15: ; preds = %2
%16 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
%17 = load i8*, i8** %5
store i8* %17, i8** %3
br label %18
18: ; preds = %15, %12
%19 = load i8*, i8** %3
ret i8* %19
}

LLVM IR (-O2):
@str = [4 x i8] c"p2\0D\00"
@str.2 = [4 x i8] c"p1\0D\00"
define i8* @fun(i8* %0, i8* %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = icmp eq i32 %3, 0
%5 = select i1 %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @str.2, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @str, i64 0, i64 0)
%6 = select i1 %4, i8* %0, i8* %1
%7 = tail call i32 @puts(i8* dereferenceable(1) %5)
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void A8(void) { printf("Test1\n"); }


x86 assembly (clang, -O0):
<A8>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<A8>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"Test1\0A\00"
define void @A8() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"Test1\00"
define void @A8() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
ret void
}
void vla(int a) {
  if (a == 5) {
    int x[a];
    x[4] = 4;
    x[5] = 5;
  }
}


x86 assembly (clang, -O0):
<vla>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x5,-0x4(%rbp)
jne    114f <vla+0x4f>
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    %rsp,%rax
mov    %rax,-0x10(%rbp)
lea    0xf(,%rcx,4),%rdx
and    $0xfffffffffffffff0,%rdx
mov    %rsp,%rax
sub    %rdx,%rax
mov    %rax,%rsp
mov    %rcx,-0x18(%rbp)
movl   $0x4,0x10(%rax)
movl   $0x5,0x14(%rax)
mov    -0x10(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vla>:
ret

LLVM IR (-O0):
define void @vla(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = icmp eq i32 %5, 5
br i1 %6, label %7, label %15
7: ; preds = %1
%8 = load i32, i32* %2
%9 = zext i32 %8 to i64
%10 = call i8* @llvm.stacksave()
store i8* %10, i8** %3
%11 = alloca i32, i64 %9
store i64 %9, i64* %4
%12 = getelementptr inbounds i32, i32* %11, i64 4
store i32 4, i32* %12
%13 = getelementptr inbounds i32, i32* %11, i64 5
store i32 5, i32* %13
%14 = load i8*, i8** %3
br label %15
15: ; preds = %7, %1
ret void
}

LLVM IR (-O2):
define void @vla(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ sprintf(char *, char *, int);
int /*<<< orphan*/ system(char *);
int x8_teardown() {
  char cmd[256];
  sprintf(cmd,
          "iptables -D INPUT -p tcp -m multiport --sport 53,80 --tcp-flags "
          "SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d",
          1);
  system(cmd);
  return 0;
}


x86 assembly (clang, -O0):
<x8_teardown>:
push   %rbp
mov    %rsp,%rbp
sub    $0x100,%rsp
lea    -0x100(%rbp),%rdi
lea    0xec7(%rip),%rsi
mov    $0x1,%edx
call   1040 <sprintf@plt>
lea    -0x100(%rbp),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<x8_teardown>:
push   %rbx
sub    $0x100,%rsp
lea    0xed1(%rip),%rsi
mov    %rsp,%rbx
mov    %rbx,%rdi
mov    $0x1,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x100,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [106 x i8] c"iptables -D INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x8_teardown() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%5 = call i32 @system(i8* %4)
ret i32 0
}

LLVM IR (-O2):
@.str = [106 x i8] c"iptables -D INPUT -p tcp -m multiport --sport 53,80 --tcp-flags SYN,ACK SYN,ACK -j NFQUEUE --queue-num %d\00"
define i32 @x8_teardown() {
%1 = alloca [256 x i8]
%2 = getelementptr inbounds [256 x i8], [256 x i8]* %1, i64 0, i64 0
%3 = call i32 @sprintf(i8* %2, i8* dereferenceable(1) getelementptr inbounds ([106 x i8], [106 x i8]* @.str, i64 0, i64 0), i32 1)
%4 = call i32 @system(i8* %2)
ret i32 0
}
int owAcquire(int portnum, char *port_zstr) { return 0; }


x86 assembly (clang, -O0):
<owAcquire>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<owAcquire>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @owAcquire(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
ret i32 0
}

LLVM IR (-O2):
define i32 @owAcquire(i32 %0, i8* nocapture readnone %1) {
ret i32 0
}
int ____atomic_test_and_clear_bit(unsigned int bit, unsigned long *p) {
  unsigned long flags;
  unsigned int res;
  unsigned long mask;
  unsigned long temp;
  mask = 1UL << (bit & 31U);
  p += bit >> 5;
  res = (unsigned int)(*p);
  (*p) = (unsigned long)((unsigned long)res & ~mask);
  return ((int)((unsigned long)res & mask));
}


x86 assembly (clang, -O0):
<____atomic_test_and_clear_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
and    $0x1f,%eax
mov    %eax,%eax
mov    %eax,%ecx
mov    $0x1,%eax
shl    %cl,%rax
mov    %rax,-0x28(%rbp)
mov    -0x4(%rbp),%ecx
shr    $0x5,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,%ecx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,%ecx
mov    -0x28(%rbp),%rax
xor    $0xffffffffffffffff,%rax
and    %rax,%rcx
mov    -0x10(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x1c(%rbp),%eax
and    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<____atomic_test_and_clear_bit>:
mov    %edi,%ecx
mov    %edi,%edx
shr    $0x5,%edx
mov    $0x1,%eax
shl    %cl,%eax
mov    (%rsi,%rdx,8),%edi
and    %edi,%eax
btr    %ecx,%edi
mov    %rdi,(%rsi,%rdx,8)
ret

LLVM IR (-O0):
define i32 @____atomic_test_and_clear_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i64
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
store i32 %0, i32* %3
store i64* %1, i64** %4
%9 = load i32, i32* %3
%10 = and i32 %9, 31
%11 = zext i32 %10 to i64
%12 = shl i64 1, %11
store i64 %12, i64* %7
%13 = load i32, i32* %3
%14 = lshr i32 %13, 5
%15 = load i64*, i64** %4
%16 = zext i32 %14 to i64
%17 = getelementptr inbounds i64, i64* %15, i64 %16
store i64* %17, i64** %4
%18 = load i64*, i64** %4
%19 = load i64, i64* %18
%20 = trunc i64 %19 to i32
store i32 %20, i32* %6
%21 = load i32, i32* %6
%22 = zext i32 %21 to i64
%23 = load i64, i64* %7
%24 = xor i64 %23, -1
%25 = and i64 %22, %24
%26 = load i64*, i64** %4
store i64 %25, i64* %26
%27 = load i32, i32* %6
%28 = zext i32 %27 to i64
%29 = load i64, i64* %7
%30 = and i64 %28, %29
%31 = trunc i64 %30 to i32
ret i32 %31
}

LLVM IR (-O2):
define i32 @____atomic_test_and_clear_bit(i32 %0, i64* nocapture %1) {
%3 = and i32 %0, 31
%4 = zext i32 %3 to i64
%5 = shl nuw nsw i64 1, %4
%6 = lshr i32 %0, 5
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i64, i64* %1, i64 %7
%9 = load i64, i64* %8
%10 = xor i64 %5, 4294967295
%11 = and i64 %10, %9
store i64 %11, i64* %8
%12 = and i64 %9, %5
%13 = trunc i64 %12 to i32
ret i32 %13
}
/* Variables and functions */
int /*<<< orphan*/ puts(char *);
void example_description() {
  puts(""
       "LibCGI Examples - Simple form<br>"
       "This example shows you various ways to manipulate HTML<br>"
       "forms and data<br><br>"
       "");
}


x86 assembly (clang, -O0):
<example_description>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <puts@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<example_description>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [114 x i8] c"LibCGI Examples - Simple form<br>This example shows you various ways to manipulate HTML<br>forms and data<br><br>\00"
define void @example_description() {
%1 = call i32 @puts(i8* getelementptr inbounds ([114 x i8], [114 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [114 x i8] c"LibCGI Examples - Simple form<br>This example shows you various ways to manipulate HTML<br>forms and data<br><br>\00"
define void @example_description() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([114 x i8], [114 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef char *uint32_t;

/* Variables and functions */
uint32_t ss_crc32c_hw_byte(uint32_t crc, unsigned char const *data,
                           unsigned int length) {
  while (length--) {
    __asm__ __volatile__(".byte 0xf2, 0xf, 0x38, 0xf0, 0xf1"
                         : "=S"(crc)
                         : "0"(crc), "c"(*data));
    data++;
  }
  return crc;
}


x86 assembly (clang, -O0):
<ss_crc32c_hw_byte>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x14(%rbp)
cmp    $0x0,%eax
je     1147 <ss_crc32c_hw_byte+0x47>
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
crc32  %cl,%esi
mov    %rsi,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    110f <ss_crc32c_hw_byte+0xf>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ss_crc32c_hw_byte>:
mov    %rsi,%rax
mov    %rdi,%rsi
test   %edx,%edx
je     1121 <ss_crc32c_hw_byte+0x21>
mov    %edx,%edx
xor    %edi,%edi
xchg   %ax,%ax
movzbl (%rax,%rdi,1),%ecx
crc32  %cl,%esi
add    $0x1,%rdi
cmp    %edi,%edx
jne    1110 <ss_crc32c_hw_byte+0x10>
mov    %rsi,%rax
ret

LLVM IR (-O0):
define i8* @ss_crc32c_hw_byte(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
br label %7
7: ; preds = %11, %3
%8 = load i32, i32* %6
%9 = add i32 %8, -1
store i32 %9, i32* %6
%10 = icmp ne i32 %8, 0
br i1 %10, label %11, label %18
11: ; preds = %7
%12 = load i8*, i8** %4
%13 = load i8*, i8** %5
%14 = load i8, i8* %13
%15 = call i8* asm sideeffect ".byte 0xf2, 0xf, 0x38, 0xf0, 0xf1", "={si},0,{cx},~{dirflag},~{fpsr},~{flags}"(i8* %12, i8 %14)
store i8* %15, i8** %4
%16 = load i8*, i8** %5
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %5
br label %7
18: ; preds = %7
%19 = load i8*, i8** %4
ret i8* %19
}

LLVM IR (-O2):
define i8* @ss_crc32c_hw_byte(i8* %0, i8* nocapture %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %14, label %5
5: ; preds = %3, %5
%6 = phi i32 [ %9, %5 ], [ %2, %3 ]
%7 = phi i8* [ %12, %5 ], [ %1, %3 ]
%8 = phi i8* [ %11, %5 ], [ %0, %3 ]
%9 = add i32 %6, -1
%10 = load i8, i8* %7
%11 = tail call i8* asm sideeffect ".byte 0xf2, 0xf, 0x38, 0xf0, 0xf1", "={si},0,{cx},~{dirflag},~{fpsr},~{flags}"(i8* %8, i8 %10)
%12 = getelementptr inbounds i8, i8* %7, i64 1
%13 = icmp eq i32 %9, 0
br i1 %13, label %14, label %5
14: ; preds = %5, %3
%15 = phi i8* [ %0, %3 ], [ %11, %5 ]
ret i8* %15
}
/* Type definitions */
struct traversal_algorithm {
  int dummy;
};
struct expr_list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ print_indent(struct traversal_algorithm *);
int /*<<< orphan*/ printf(char *);
void print_el(struct expr_list *el, struct traversal_algorithm *algo) {
  (void)(el);
  print_indent(algo);
  printf("\x1B[36m"
         "<Expression List Item>\n"
         "\x1B[0m");
}


x86 assembly (clang, -O0):
<print_el>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <print_indent@plt>
lea    0xec0(%rip),%rdi
call   1040 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_el>:
push   %rax
mov    %rsi,%rdi
call   1030 <print_indent@plt>
lea    0xed0(%rip),%rdi
pop    %rax
jmp    1040 <printf@plt>

LLVM IR (-O0):
%struct.expr_list = type { i32 }
%struct.traversal_algorithm = type { i32 }
@.str = [33 x i8] c"\1B[36m<Expression List Item>\0A\1B[0m\00"
define void @print_el(%struct.expr_list* %0, %struct.traversal_algorithm* %1) {
%3 = alloca %struct.expr_list*
%4 = alloca %struct.traversal_algorithm*
store %struct.expr_list* %0, %struct.expr_list** %3
store %struct.traversal_algorithm* %1, %struct.traversal_algorithm** %4
%5 = load %struct.expr_list*, %struct.expr_list** %3
%6 = load %struct.traversal_algorithm*, %struct.traversal_algorithm** %4
%7 = call i32 @print_indent(%struct.traversal_algorithm* %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
%struct.expr_list = type { i32 }
%struct.traversal_algorithm = type { i32 }
@.str = [33 x i8] c"\1B[36m<Expression List Item>\0A\1B[0m\00"
define void @print_el(%struct.expr_list* nocapture readnone %0, %struct.traversal_algorithm* %1) {
%3 = tail call i32 @print_indent(%struct.traversal_algorithm* %1)
%4 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ array_print(int *, int);
int /*<<< orphan*/ printf(char *);
void print_edges(int *edges, int num_edges) {
  int i;
  for (i = 0; i < num_edges; i++) {
    array_print(edges, 2);
    edges += 2;
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<print_edges>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    116a <print_edges+0x4a>
mov    -0x8(%rbp),%rdi
mov    $0x2,%esi
call   1040 <array_print@plt>
mov    -0x8(%rbp),%rax
add    $0x8,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1136 <print_edges+0x16>
lea    0xe8f(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_edges>:
push   %rbp
push   %rbx
push   %rax
test   %esi,%esi
jle    1146 <print_edges+0x26>
mov    %esi,%ebp
mov    %rdi,%rbx
nopl   0x0(%rax)
mov    %rbx,%rdi
mov    $0x2,%esi
call   1040 <array_print@plt>
add    $0x8,%rbx
add    $0xffffffff,%ebp
jne    1130 <print_edges+0x10>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"\0A\00"
define void @print_edges(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %15, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %18
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = call i32 @array_print(i32* %11, i32 2)
%13 = load i32*, i32** %3
%14 = getelementptr inbounds i32, i32* %13, i64 2
store i32* %14, i32** %3
br label %15
15: ; preds = %10
%16 = load i32, i32* %5
%17 = add nsw i32 %16, 1
store i32 %17, i32* %5
br label %6
18: ; preds = %6
%19 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @print_edges(i32* %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %11
4: ; preds = %2, %4
%5 = phi i32 [ %9, %4 ], [ 0, %2 ]
%6 = phi i32* [ %8, %4 ], [ %0, %2 ]
%7 = tail call i32 @array_print(i32* %6, i32 2)
%8 = getelementptr inbounds i32, i32* %6, i64 2
%9 = add nuw nsw i32 %5, 1
%10 = icmp eq i32 %9, %1
br i1 %10, label %11, label %4
11: ; preds = %4, %2
%12 = tail call i32 @putchar(i32 10)
ret void
}
int sum5(int a, int b, int c, int e, int f) { return a + b + c + e + f; }


x86 assembly (clang, -O0):
<sum5>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    -0x4(%rbp),%eax
add    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
add    -0x10(%rbp),%eax
add    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sum5>:
lea    (%rdi,%rsi,1),%eax
add    %edx,%eax
add    %ecx,%eax
add    %r8d,%eax
ret

LLVM IR (-O0):
define i32 @sum5(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = load i32, i32* %7
%13 = add nsw i32 %11, %12
%14 = load i32, i32* %8
%15 = add nsw i32 %13, %14
%16 = load i32, i32* %9
%17 = add nsw i32 %15, %16
%18 = load i32, i32* %10
%19 = add nsw i32 %17, %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @sum5(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = add nsw i32 %1, %0
%7 = add nsw i32 %6, %2
%8 = add nsw i32 %7, %3
%9 = add nsw i32 %8, %4
ret i32 %9
}
void TimerBDTRConfigure(unsigned long ulBase, unsigned long ulBDTRConfig) {
  (*((volatile unsigned long *)(ulBase + 0x00000044))) = ulBDTRConfig;
}


x86 assembly (clang, -O0):
<TimerBDTRConfigure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x44(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TimerBDTRConfigure>:
mov    %rsi,0x44(%rdi)
ret

LLVM IR (-O0):
define void @TimerBDTRConfigure(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = load i64, i64* %3
%7 = add i64 %6, 68
%8 = inttoptr i64 %7 to i64*
store volatile i64 %5, i64* %8
ret void
}

LLVM IR (-O2):
define void @TimerBDTRConfigure(i64 %0, i64 %1) {
%3 = add i64 %0, 68
%4 = inttoptr i64 %3 to i64*
store volatile i64 %1, i64* %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void showUsage(char *pgmname) {
  printf("Usage: %s [master | slave ]\n", pgmname);
}


x86 assembly (clang, -O0):
<showUsage>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<showUsage>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"Usage: %s [master | slave ]\0A\00"
define void @showUsage(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"Usage: %s [master | slave ]\0A\00"
define void @showUsage(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}