#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
int rand_uint32_range(int, int);
void __aosc_split_triple_sub_16(uint16_t value, uint16_t *a, uint16_t *b,
                                uint16_t *c) {
  int i;
  *a = *b = *c = 0;
  for (i = 0; i < sizeof(uint16_t); i++) {
    uint8_t max, min;
    uint16_t x, y, one_byte;
    one_byte = value & 0xFF;
    if (one_byte < 0x21 * 3)
      one_byte += 0x100;
    value -= one_byte;
    max = (((0x21) > (one_byte - 0x7e * 2)) ? (0x21) : (one_byte - 0x7e * 2));
    min = (((0x7e) < (one_byte - 0x21 * 2)) ? (0x7e) : (one_byte - 0x21 * 2));
    x = rand_uint32_range(max, min);
    one_byte -= x;
    max = (((0x21) > (one_byte - 0x7e)) ? (0x21) : (one_byte - 0x7e));
    min = (((0x7e) < (one_byte - 0x21)) ? (0x7e) : (one_byte - 0x21));
    y = rand_uint32_range(max, min);
    one_byte -= y;
    *a += x << (8 * i);
    *b += y << (8 * i);
    *c += one_byte << (8 * i);
    value >>= 8;
  }
}


x86 assembly (clang, -O0):
<__aosc_split_triple_sub_16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x50,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x18(%rbp),%rax
movl   $0x0,(%rax)
mov    -0x10(%rbp),%rax
movl   $0x0,(%rax)
movl   $0x0,-0x24(%rbp)
movslq -0x24(%rbp),%rax
cmp    $0x4,%rax
jae    12ce <__aosc_split_triple_sub_16+0x1be>
mov    -0x4(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0x38(%rbp)
cmpl   $0x63,-0x38(%rbp)
jge    117a <__aosc_split_triple_sub_16+0x6a>
mov    -0x38(%rbp),%eax
add    $0x100,%eax
mov    %eax,-0x38(%rbp)
mov    -0x38(%rbp),%ecx
mov    -0x4(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x38(%rbp),%ecx
sub    $0xfc,%ecx
mov    $0x21,%eax
cmp    %ecx,%eax
jle    11a8 <__aosc_split_triple_sub_16+0x98>
mov    $0x21,%eax
mov    %eax,-0x3c(%rbp)
jmp    11b3 <__aosc_split_triple_sub_16+0xa3>
mov    -0x38(%rbp),%eax
sub    $0xfc,%eax
mov    %eax,-0x3c(%rbp)
mov    -0x3c(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x38(%rbp),%ecx
sub    $0x42,%ecx
mov    $0x7e,%eax
cmp    %ecx,%eax
jge    11d9 <__aosc_split_triple_sub_16+0xc9>
mov    $0x7e,%eax
mov    %eax,-0x40(%rbp)
jmp    11e2 <__aosc_split_triple_sub_16+0xd2>
mov    -0x38(%rbp),%eax
sub    $0x42,%eax
mov    %eax,-0x40(%rbp)
mov    -0x40(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x28(%rbp),%edi
mov    -0x2c(%rbp),%esi
call   1030 <rand_uint32_range@plt>
mov    %eax,-0x30(%rbp)
mov    -0x30(%rbp),%ecx
mov    -0x38(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x38(%rbp)
mov    -0x38(%rbp),%ecx
sub    $0x7e,%ecx
mov    $0x21,%eax
cmp    %ecx,%eax
jle    1221 <__aosc_split_triple_sub_16+0x111>
mov    $0x21,%eax
mov    %eax,-0x44(%rbp)
jmp    122a <__aosc_split_triple_sub_16+0x11a>
mov    -0x38(%rbp),%eax
sub    $0x7e,%eax
mov    %eax,-0x44(%rbp)
mov    -0x44(%rbp),%eax
mov    %eax,-0x28(%rbp)
mov    -0x38(%rbp),%ecx
sub    $0x21,%ecx
mov    $0x7e,%eax
cmp    %ecx,%eax
jge    1250 <__aosc_split_triple_sub_16+0x140>
mov    $0x7e,%eax
mov    %eax,-0x48(%rbp)
jmp    1259 <__aosc_split_triple_sub_16+0x149>
mov    -0x38(%rbp),%eax
sub    $0x21,%eax
mov    %eax,-0x48(%rbp)
mov    -0x48(%rbp),%eax
mov    %eax,-0x2c(%rbp)
mov    -0x28(%rbp),%edi
mov    -0x2c(%rbp),%esi
call   1030 <rand_uint32_range@plt>
mov    %eax,-0x34(%rbp)
mov    -0x34(%rbp),%ecx
mov    -0x38(%rbp),%eax
sub    %ecx,%eax
mov    %eax,-0x38(%rbp)
mov    -0x30(%rbp),%eax
mov    -0x24(%rbp),%ecx
shl    $0x3,%ecx
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
mov    -0x34(%rbp),%eax
mov    -0x24(%rbp),%ecx
shl    $0x3,%ecx
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
mov    -0x38(%rbp),%eax
mov    -0x24(%rbp),%ecx
shl    $0x3,%ecx
shl    %cl,%eax
mov    %eax,%ecx
mov    -0x20(%rbp),%rax
add    (%rax),%ecx
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
sar    $0x8,%eax
mov    %eax,-0x4(%rbp)
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    114c <__aosc_split_triple_sub_16+0x3c>
add    $0x50,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aosc_split_triple_sub_16>:
push   %rbp
push   %r15
push   %r14
push   %r13
push   %r12
push   %rbx
push   %rax
mov    %rdx,%r15
mov    %rsi,%r12
mov    %edi,%ebp
mov    %rcx,(%rsp)
movl   $0x0,(%rcx)
movl   $0x0,(%rdx)
movl   $0x0,(%rsi)
xor    %r13d,%r13d
nopl   0x0(%rax)
movzbl %bpl,%eax
lea    0x100(%rax),%r14d
cmp    $0x63,%eax
cmovae %eax,%r14d
sub    %r14d,%ebp
cmp    $0x11e,%r14d
mov    $0x11d,%edi
cmovae %r14d,%edi
add    $0xffffff04,%edi
cmp    $0xc0,%r14d
mov    $0xc0,%esi
cmovb  %r14d,%esi
add    $0xffffffbe,%esi
call   1030 <rand_uint32_range@plt>
mov    %eax,%ebx
sub    %eax,%r14d
cmp    $0xa0,%r14d
mov    $0x9f,%edi
cmovge %r14d,%edi
add    $0xffffff82,%edi
cmp    $0x9f,%r14d
mov    $0x9f,%esi
cmovl  %r14d,%esi
add    $0xffffffdf,%esi
call   1030 <rand_uint32_range@plt>
mov    %r13d,%ecx
shl    %cl,%ebx
add    %ebx,(%r12)
sub    %eax,%r14d
shl    %cl,%eax
add    %eax,(%r15)
shl    %cl,%r14d
mov    (%rsp),%rax
add    %r14d,(%rax)
sar    $0x8,%ebp
add    $0x8,%r13d
cmp    $0x20,%r13d
jne    1140 <__aosc_split_triple_sub_16+0x30>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r13
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define void @__aosc_split_triple_sub_16(i32 %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
store i32 %0, i32* %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%15 = load i32*, i32** %8
store i32 0, i32* %15
%16 = load i32*, i32** %7
store i32 0, i32* %16
%17 = load i32*, i32** %6
store i32 0, i32* %17
store i32 0, i32* %9
br label %18
18: ; preds = %105, %4
%19 = load i32, i32* %9
%20 = sext i32 %19 to i64
%21 = icmp ult i64 %20, 4
br i1 %21, label %22, label %108
22: ; preds = %18
%23 = load i32, i32* %5
%24 = and i32 %23, 255
store i32 %24, i32* %14
%25 = load i32, i32* %14
%26 = icmp slt i32 %25, 99
br i1 %26, label %27, label %30
27: ; preds = %22
%28 = load i32, i32* %14
%29 = add nsw i32 %28, 256
store i32 %29, i32* %14
br label %30
30: ; preds = %27, %22
%31 = load i32, i32* %14
%32 = load i32, i32* %5
%33 = sub nsw i32 %32, %31
store i32 %33, i32* %5
%34 = load i32, i32* %14
%35 = sub nsw i32 %34, 252
%36 = icmp sgt i32 33, %35
br i1 %36, label %37, label %38
37: ; preds = %30
br label %41
38: ; preds = %30
%39 = load i32, i32* %14
%40 = sub nsw i32 %39, 252
br label %41
41: ; preds = %38, %37
%42 = phi i32 [ 33, %37 ], [ %40, %38 ]
store i32 %42, i32* %10
%43 = load i32, i32* %14
%44 = sub nsw i32 %43, 66
%45 = icmp slt i32 126, %44
br i1 %45, label %46, label %47
46: ; preds = %41
br label %50
47: ; preds = %41
%48 = load i32, i32* %14
%49 = sub nsw i32 %48, 66
br label %50
50: ; preds = %47, %46
%51 = phi i32 [ 126, %46 ], [ %49, %47 ]
store i32 %51, i32* %11
%52 = load i32, i32* %10
%53 = load i32, i32* %11
%54 = call i32 @rand_uint32_range(i32 %52, i32 %53)
store i32 %54, i32* %12
%55 = load i32, i32* %12
%56 = load i32, i32* %14
%57 = sub nsw i32 %56, %55
store i32 %57, i32* %14
%58 = load i32, i32* %14
%59 = sub nsw i32 %58, 126
%60 = icmp sgt i32 33, %59
br i1 %60, label %61, label %62
61: ; preds = %50
br label %65
62: ; preds = %50
%63 = load i32, i32* %14
%64 = sub nsw i32 %63, 126
br label %65
65: ; preds = %62, %61
%66 = phi i32 [ 33, %61 ], [ %64, %62 ]
store i32 %66, i32* %10
%67 = load i32, i32* %14
%68 = sub nsw i32 %67, 33
%69 = icmp slt i32 126, %68
br i1 %69, label %70, label %71
70: ; preds = %65
br label %74
71: ; preds = %65
%72 = load i32, i32* %14
%73 = sub nsw i32 %72, 33
br label %74
74: ; preds = %71, %70
%75 = phi i32 [ 126, %70 ], [ %73, %71 ]
store i32 %75, i32* %11
%76 = load i32, i32* %10
%77 = load i32, i32* %11
%78 = call i32 @rand_uint32_range(i32 %76, i32 %77)
store i32 %78, i32* %13
%79 = load i32, i32* %13
%80 = load i32, i32* %14
%81 = sub nsw i32 %80, %79
store i32 %81, i32* %14
%82 = load i32, i32* %12
%83 = load i32, i32* %9
%84 = mul nsw i32 8, %83
%85 = shl i32 %82, %84
%86 = load i32*, i32** %6
%87 = load i32, i32* %86
%88 = add nsw i32 %87, %85
store i32 %88, i32* %86
%89 = load i32, i32* %13
%90 = load i32, i32* %9
%91 = mul nsw i32 8, %90
%92 = shl i32 %89, %91
%93 = load i32*, i32** %7
%94 = load i32, i32* %93
%95 = add nsw i32 %94, %92
store i32 %95, i32* %93
%96 = load i32, i32* %14
%97 = load i32, i32* %9
%98 = mul nsw i32 8, %97
%99 = shl i32 %96, %98
%100 = load i32*, i32** %8
%101 = load i32, i32* %100
%102 = add nsw i32 %101, %99
store i32 %102, i32* %100
%103 = load i32, i32* %5
%104 = ashr i32 %103, 8
store i32 %104, i32* %5
br label %105
105: ; preds = %74
%106 = load i32, i32* %9
%107 = add nsw i32 %106, 1
store i32 %107, i32* %9
br label %18
108: ; preds = %18
ret void
}

LLVM IR (-O2):
define void @__aosc_split_triple_sub_16(i32 %0, i32* nocapture %1, i32* nocapture %2, i32* nocapture %3) {
store i32 0, i32* %3
store i32 0, i32* %2
store i32 0, i32* %1
br label %5
5: ; preds = %4, %5
%6 = phi i32 [ %0, %4 ], [ %39, %5 ]
%7 = phi i32 [ 0, %4 ], [ %40, %5 ]
%8 = and i32 %6, 255
%9 = icmp ult i32 %8, 99
%10 = or i32 %8, 256
%11 = select i1 %9, i32 %10, i32 %8
%12 = sub nsw i32 %6, %11
%13 = icmp ugt i32 %11, 285
%14 = select i1 %13, i32 %11, i32 285
%15 = add nsw i32 %14, -252
%16 = icmp ult i32 %11, 192
%17 = select i1 %16, i32 %11, i32 192
%18 = add nsw i32 %17, -66
%19 = tail call i32 @rand_uint32_range(i32 %15, i32 %18)
%20 = sub nsw i32 %11, %19
%21 = icmp sgt i32 %20, 159
%22 = select i1 %21, i32 %20, i32 159
%23 = add nsw i32 %22, -126
%24 = icmp slt i32 %20, 159
%25 = select i1 %24, i32 %20, i32 159
%26 = add nsw i32 %25, -33
%27 = tail call i32 @rand_uint32_range(i32 %23, i32 %26)
%28 = sub nsw i32 %20, %27
%29 = shl nuw nsw i32 %7, 3
%30 = shl i32 %19, %29
%31 = load i32, i32* %1
%32 = add nsw i32 %31, %30
store i32 %32, i32* %1
%33 = shl i32 %27, %29
%34 = load i32, i32* %2
%35 = add nsw i32 %34, %33
store i32 %35, i32* %2
%36 = shl i32 %28, %29
%37 = load i32, i32* %3
%38 = add nsw i32 %37, %36
store i32 %38, i32* %3
%39 = ashr i32 %12, 8
%40 = add nuw nsw i32 %7, 1
%41 = icmp eq i32 %40, 4
br i1 %41, label %42, label %5
42: ; preds = %5
ret void
}