xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ net_test(int /*<<< orphan*/);
int main(int argc, char *argv[]) { net_test(0); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
xor    %edi,%edi
call   1030 <net_test@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <net_test@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 @net_test(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @net_test(i32 0)
ret i32 0
}
/* Variables and functions */
scalar_t__ DBL_EPSILON;
scalar_t__ fabs(double);
bool doubles_differ_enough(double a, double b) {
  return fabs(a - b) >= DBL_EPSILON;
}


x86 assembly (clang, -O0):
<doubles_differ_enough>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
subsd  -0x10(%rbp),%xmm0
call   1030 <fabs@plt>
mov    0x2eb0(%rip),%rcx
cmp    (%rcx),%rax
setge  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<doubles_differ_enough>:
push   %rax
subsd  %xmm1,%xmm0
call   1030 <fabs@plt>
mov    0x2ec7(%rip),%rdx
xor    %ecx,%ecx
cmp    (%rdx),%rax
setge  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@DBL_EPSILON = global i64 0
define i32 @doubles_differ_enough(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fsub double %5, %6
%8 = call i64 @fabs(double %7)
%9 = load i64, i64* @DBL_EPSILON
%10 = icmp sge i64 %8, %9
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
@DBL_EPSILON = global i64 0
define i32 @doubles_differ_enough(double %0, double %1) {
%3 = fsub double %0, %1
%4 = tail call i64 @fabs(double %3)
%5 = load i64, i64* @DBL_EPSILON
%6 = icmp sge i64 %4, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
signed int f13(signed int v_foo) {
  signed int v_parta = v_foo << 14;
  signed int v_partb = ((unsigned int)v_foo) >> 18;
  signed int v_rotl = v_parta | v_partb;
  signed int v_and = v_rotl & 248;
  return v_and;
}


x86 assembly (clang, -O0):
<f13>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0xe,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x12,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
or     -0xc(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
and    $0xf8,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f13>:
mov    %edi,%eax
shr    $0x12,%eax
and    $0xf8,%eax
ret

LLVM IR (-O0):
define i32 @f13(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %2
%7 = load i32, i32* %2
%8 = shl i32 %7, 14
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = lshr i32 %9, 18
store i32 %10, i32* %4
%11 = load i32, i32* %3
%12 = load i32, i32* %4
%13 = or i32 %11, %12
store i32 %13, i32* %5
%14 = load i32, i32* %5
%15 = and i32 %14, 248
store i32 %15, i32* %6
%16 = load i32, i32* %6
ret i32 %16
}

LLVM IR (-O2):
define i32 @f13(i32 %0) {
%2 = lshr i32 %0, 18
%3 = and i32 %2, 248
ret i32 %3
}
/* Variables and functions */
int rand();
double GetHundredToTenThousand() {
  double r = rand() % 10000;
  return r / 1000000;
}


x86 assembly (clang, -O0):
<GetHundredToTenThousand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x0,%al
call   1030 <rand@plt>
mov    $0x2710,%ecx
cltd
idiv   %ecx
cvtsi2sd %edx,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xec3(%rip),%xmm1
divsd  %xmm1,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetHundredToTenThousand>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
cltq
imul   $0x68db8bad,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x2c,%rcx
add    %edx,%ecx
imul   $0x2710,%ecx,%ecx
sub    %ecx,%eax
cvtsi2sd %eax,%xmm0
divsd  0xebe(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @GetHundredToTenThousand() {
%1 = alloca double
%2 = call i32 (...) @rand()
%3 = srem i32 %2, 10000
%4 = sitofp i32 %3 to double
store double %4, double* %1
%5 = load double, double* %1
%6 = fdiv double %5, 1.000000e+06
ret double %6
}

LLVM IR (-O2):
define double @GetHundredToTenThousand() {
%1 = tail call i32 (...) @rand()
%2 = srem i32 %1, 10000
%3 = sitofp i32 %2 to double
%4 = fdiv double %3, 1.000000e+06
ret double %4
}
int find_option(opt, sw_ptn)
char *opt;
char *sw_ptn;
{ return (strstr(opt, sw_ptn) ? 1 : 0); }


x86 assembly (clang, -O0):
<find_option>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strstr@plt>
mov    %rax,%rdx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<find_option>:
push   %rax
call   1030 <strstr@plt>
xor    %ecx,%ecx
test   %rax,%rax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @find_option(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i8* @strstr(i8* %5, i8* %6)
%8 = icmp ne i8* %7, null
%9 = zext i1 %8 to i64
%10 = select i1 %8, i32 1, i32 0
ret i32 %10
}

LLVM IR (-O2):
define i32 @find_option(i8* %0, i8* nocapture %1) {
%3 = tail call i8* @strstr(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = icmp ne i8* %3, null
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ gcov_open(char *);
int gcov_open_by_filename(char *gi_filename) {
  gcov_open(gi_filename);
  return 0;
}


x86 assembly (clang, -O0):
<gcov_open_by_filename>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <gcov_open@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcov_open_by_filename>:
push   %rax
call   1030 <gcov_open@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @gcov_open_by_filename(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @gcov_open(i8* %3)
ret i32 0
}

LLVM IR (-O2):
define i32 @gcov_open_by_filename(i8* %0) {
%2 = tail call i32 @gcov_open(i8* %0)
ret i32 0
}
/* Variables and functions */
void *malloc(size_t);
void *smalloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<smalloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<smalloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @smalloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @smalloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Type definitions */
typedef int volatile uint32_t;

/* Variables and functions */
void sleep_on(uint32_t interrupt_mask) {
  uint32_t old_config = *((volatile int *)((0x80000000 + 4)));
  *((volatile int *)((0x80000000 + 4))) = interrupt_mask;
  *((volatile int *)((0x80000000 + 8))) = 0x80000000;
  *((volatile int *)((0x80000000 + 4))) = old_config;
}


x86 assembly (clang, -O0):
<sleep_on>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    $0x80000004,%eax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%ecx
mov    $0x80000004,%eax
mov    %ecx,(%rax)
mov    $0x80000008,%eax
movl   $0x80000000,(%rax)
mov    -0x8(%rbp),%ecx
mov    $0x80000004,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<sleep_on>:
mov    %edi,-0x4(%rsp)
mov    $0x80000004,%eax
mov    (%rax),%ecx
mov    %ecx,-0x8(%rsp)
mov    -0x4(%rsp),%ecx
mov    %ecx,(%rax)
movl   $0x80000000,0x4(%rax)
mov    -0x8(%rsp),%ecx
mov    %ecx,(%rax)
ret

LLVM IR (-O0):
define void @sleep_on(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store volatile i32 %0, i32* %2
%4 = load volatile i32, i32* inttoptr (i64 2147483652 to i32*)
store volatile i32 %4, i32* %3
%5 = load volatile i32, i32* %2
store volatile i32 %5, i32* inttoptr (i64 2147483652 to i32*)
store volatile i32 -2147483648, i32* inttoptr (i64 2147483656 to i32*)
%6 = load volatile i32, i32* %3
store volatile i32 %6, i32* inttoptr (i64 2147483652 to i32*)
ret void
}

LLVM IR (-O2):
define void @sleep_on(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store volatile i32 %0, i32* %2
%4 = bitcast i32* %3 to i8*
%5 = load volatile i32, i32* inttoptr (i64 2147483652 to i32*)
store volatile i32 %5, i32* %3
%6 = load volatile i32, i32* %2
store volatile i32 %6, i32* inttoptr (i64 2147483652 to i32*)
store volatile i32 -2147483648, i32* inttoptr (i64 2147483656 to i32*)
%7 = load volatile i32, i32* %3
store volatile i32 %7, i32* inttoptr (i64 2147483652 to i32*)
ret void
}
void LEDMatrix_Display_Settings() {}


x86 assembly (clang, -O0):
<LEDMatrix_Display_Settings>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LEDMatrix_Display_Settings>:
ret

LLVM IR (-O0):
define void @LEDMatrix_Display_Settings() {
ret void
}

LLVM IR (-O2):
define void @LEDMatrix_Display_Settings() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __coverity_free__(void *);
int /*<<< orphan*/ __coverity_panic__();
void isc__mempool_put(void *mem, void *ptr, const char *file,
                      unsigned int line) {
  if (!mem)
    __coverity_panic__();
  __coverity_free__(ptr);
}


x86 assembly (clang, -O0):
<isc__mempool_put>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1149 <isc__mempool_put+0x29>
mov    $0x0,%al
call   1030 <__coverity_panic__@plt>
mov    -0x10(%rbp),%rdi
call   1040 <__coverity_free__@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<isc__mempool_put>:
push   %rbx
mov    %rsi,%rbx
test   %rdi,%rdi
jne    1130 <isc__mempool_put+0x10>
xor    %eax,%eax
call   1030 <__coverity_panic__@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <__coverity_free__@plt>

LLVM IR (-O0):
define void @isc__mempool_put(i8* %0, i8* %1, i8* %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = icmp ne i8* %9, null
br i1 %10, label %13, label %11
11: ; preds = %4
%12 = call i32 (...) @__coverity_panic__()
br label %13
13: ; preds = %11, %4
%14 = load i8*, i8** %6
%15 = call i32 @__coverity_free__(i8* %14)
ret void
}

LLVM IR (-O2):
define void @isc__mempool_put(i8* readnone %0, i8* %1, i8* nocapture readnone %2, i32 %3) {
%5 = icmp eq i8* %0, null
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 (...) @__coverity_panic__()
br label %8
8: ; preds = %6, %4
%9 = tail call i32 @__coverity_free__(i8* %1)
ret void
}
void Comma(void) { 1, 2, 3; }


x86 assembly (clang, -O0):
<Comma>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Comma>:
ret

LLVM IR (-O0):
define void @Comma() {
ret void
}

LLVM IR (-O2):
define void @Comma() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("-- No test framework enabled, please install CUnit and compile the "
         "test suite again --\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [88 x i8] c"-- No test framework enabled, please install CUnit and compile the test suite again --\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([88 x i8], [88 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [87 x i8] c"-- No test framework enabled, please install CUnit and compile the test suite again --\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([87 x i8], [87 x i8]* @str, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
void *calloc(size_t, int);
void *mmap(void *addr, size_t length, int prot, int flags, int fd,
           long offset) {
  return calloc(length, 2);
}


x86 assembly (clang, -O0):
<mmap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    %r9,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
mov    $0x2,%esi
call   1030 <calloc@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mmap>:
mov    %rsi,%rdi
mov    $0x2,%esi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @mmap(i8* %0, i64 %1, i32 %2, i32 %3, i32 %4, i64 %5) {
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i64
store i8* %0, i8** %7
store i64 %1, i64* %8
store i32 %2, i32* %9
store i32 %3, i32* %10
store i32 %4, i32* %11
store i64 %5, i64* %12
%13 = load i64, i64* %8
%14 = call i8* @calloc(i64 %13, i32 2)
ret i8* %14
}

LLVM IR (-O2):
define i8* @mmap(i8* nocapture readnone %0, i64 %1, i32 %2, i32 %3, i32 %4, i64 %5) {
%7 = tail call i8* @calloc(i64 %1, i32 2)
ret i8* %7
}
/* Variables and functions */
int /*<<< orphan*/ ModbusDisconnect(void *);
void LeddarOneDisconnect(void *hConnection) {
  if (hConnection != NULL) {
    ModbusDisconnect(hConnection);
  }
}


x86 assembly (clang, -O0):
<LeddarOneDisconnect>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <LeddarOneDisconnect+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <ModbusDisconnect@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LeddarOneDisconnect>:
test   %rdi,%rdi
je     111a <LeddarOneDisconnect+0xa>
jmp    1030 <ModbusDisconnect@plt>
ret

LLVM IR (-O0):
define void @LeddarOneDisconnect(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = icmp ne i8* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @ModbusDisconnect(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @LeddarOneDisconnect(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @ModbusDisconnect(i8* %0)
br label %5
5: ; preds = %3, %1
ret void
}
void ff_hevc_put_hevc_bi_qpel_h64_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_qpel_h64_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_qpel_h64_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_qpel_h64_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_qpel_h64_10_sse4() {
ret void
}
int nn_pub_ispeer(int socktype) { return socktype == (2 * 16 + 1) ? 1 : 0; }


x86 assembly (clang, -O0):
<nn_pub_ispeer>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edx
xor    %eax,%eax
mov    $0x1,%ecx
cmp    $0x21,%edx
cmove  %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nn_pub_ispeer>:
xor    %eax,%eax
cmp    $0x21,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @nn_pub_ispeer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 33
%5 = zext i1 %4 to i64
%6 = select i1 %4, i32 1, i32 0
ret i32 %6
}

LLVM IR (-O2):
define i32 @nn_pub_ispeer(i32 %0) {
%2 = icmp eq i32 %0, 33
%3 = zext i1 %2 to i32
ret i32 %3
}
/* Variables and functions */
int fib(int);
int /*<<< orphan*/ printf(char *, int, int);
int main(void) {
  int n;
  n = 5;
  printf("Fibonacci %d = %d\n", n, fib(n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x5,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <fib@plt>
mov    -0xc(%rbp),%esi
mov    %eax,%edx
lea    0xeb0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x5,%edi
call   1040 <fib@plt>
lea    0xece(%rip),%rdi
mov    $0x5,%esi
mov    %eax,%edx
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [19 x i8] c"Fibonacci %d = %d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 5, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @fib(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 %3, i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [19 x i8] c"Fibonacci %d = %d\0A\00"
define i32 @main() {
%1 = tail call i32 @fib(i32 5)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([19 x i8], [19 x i8]* @.str, i64 0, i64 0), i32 5, i32 %1)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, float);
void main() {
  float a = 125.635;
  printf("%.2e", a);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  0xee0(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
lea    0xed3(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
lea    0xeed(%rip),%rdi
movss  0xee1(%rip),%xmm0
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [5 x i8] c"%.2e\00"
define void @main() {
%1 = alloca float
store float 0x405F68A3E0000000, float* %1
%2 = load float, float* %1
%3 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), float %2)
ret void
}

LLVM IR (-O2):
@.str = [5 x i8] c"%.2e\00"
define void @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), float 0x405F68A3E0000000)
ret void
}
/* Variables and functions */
void tor_check_libevent_version(const char *m, int server,
                                const char **badness_out) {
  (void)m;
  (void)server;
  *badness_out = NULL;
}


x86 assembly (clang, -O0):
<tor_check_libevent_version>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
movq   $0x0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<tor_check_libevent_version>:
movq   $0x0,(%rdx)
ret

LLVM IR (-O0):
define void @tor_check_libevent_version(i8* %0, i32 %1, i8** %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8**
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8** %2, i8*** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i8**, i8*** %6
store i8* null, i8** %9
ret void
}

LLVM IR (-O2):
define void @tor_check_libevent_version(i8* nocapture readnone %0, i32 %1, i8** nocapture writeonly %2) {
store i8* null, i8** %2
ret void
}
/* Variables and functions */
size_t oneless(size_t v) {
  if (v > 0) {
    return v - 1;
  }
  return v;
}


x86 assembly (clang, -O0):
<oneless>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jbe    1124 <oneless+0x24>
mov    -0x10(%rbp),%rax
sub    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    112c <oneless+0x2c>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<oneless>:
xor    %eax,%eax
sub    $0x1,%rdi
cmovae %rdi,%rax
ret

LLVM IR (-O0):
define i64 @oneless(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %3
%4 = load i64, i64* %3
%5 = icmp ugt i64 %4, 0
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i64, i64* %3
%8 = sub i64 %7, 1
store i64 %8, i64* %2
br label %11
9: ; preds = %1
%10 = load i64, i64* %3
store i64 %10, i64* %2
br label %11
11: ; preds = %9, %6
%12 = load i64, i64* %2
ret i64 %12
}

LLVM IR (-O2):
define i64 @oneless(i64 %0) {
%2 = icmp eq i64 %0, 0
%3 = add i64 %0, -1
%4 = select i1 %2, i64 0, i64 %3
ret i64 %4
}
void f1ia1_x(int a[1] __attribute__((unused))) {}


x86 assembly (clang, -O0):
<f1ia1_x>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f1ia1_x>:
ret

LLVM IR (-O0):
define void @f1ia1_x(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret void
}

LLVM IR (-O2):
define void @f1ia1_x(i32* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void countMirror(int number, int control) {
  printf("%d ", number);
  if (control > 1) {
    countMirror(number - 1, control - 1);
  }
  printf("%d ", number);
}


x86 assembly (clang, -O0):
<countMirror>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%esi
lea    0xec8(%rip),%rdi
call   1030 <printf@plt>
cmpl   $0x1,-0x8(%rbp)
jle    1158 <countMirror+0x38>
mov    -0x4(%rbp),%edi
sub    $0x1,%edi
mov    -0x8(%rbp),%esi
sub    $0x1,%esi
call   1040 <countMirror@plt>
mov    -0x4(%rbp),%esi
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<countMirror>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %edi,%ebx
lea    0xed2(%rip),%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
cmp    $0x2,%ebp
jl     1147 <countMirror+0x27>
lea    -0x1(%rbx),%edi
add    $0xffffffff,%ebp
mov    %ebp,%esi
call   1040 <countMirror@plt>
lea    0xeb2(%rip),%rdi
mov    %ebx,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d \00"
define void @countMirror(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %5)
%7 = load i32, i32* %4
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = load i32, i32* %3
%11 = sub nsw i32 %10, 1
%12 = load i32, i32* %4
%13 = sub nsw i32 %12, 1
br label %14
14: ; preds = %9, %2
%15 = load i32, i32* %3
%16 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d \00"
define void @countMirror(i32 %0, i32 %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
%4 = icmp sgt i32 %1, 1
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = add nsw i32 %0, -1
%7 = add nsw i32 %1, -1
tail call void @countMirror(i32 %6, i32 %7)
br label %8
8: ; preds = %5, %2
%9 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
double Xn(double x, double y) { return ((x * y - 2 * x) / (y - 1 - x)); }


x86 assembly (clang, -O0):
<Xn>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  0xee8(%rip),%xmm1
mulsd  -0x8(%rbp),%xmm1
movq   %xmm1,%rax
movabs $0x8000000000000000,%rcx
xor    %rcx,%rax
movq   %rax,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  -0x10(%rbp),%xmm1
movsd  0xeaf(%rip),%xmm2
subsd  %xmm2,%xmm1
subsd  -0x8(%rbp),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Xn>:
movapd %xmm0,%xmm2
mulsd  %xmm1,%xmm2
addsd  0xef0(%rip),%xmm1
subsd  %xmm0,%xmm1
addsd  %xmm0,%xmm0
subsd  %xmm0,%xmm2
divsd  %xmm1,%xmm2
movapd %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @Xn(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = load double, double* %3
%8 = fmul double 2.000000e+00, %7
%9 = fneg double %8
%10 = call double @llvm.fmuladd.f64(double %5, double %6, double %9)
%11 = load double, double* %4
%12 = fsub double %11, 1.000000e+00
%13 = load double, double* %3
%14 = fsub double %12, %13
%15 = fdiv double %10, %14
ret double %15
}

LLVM IR (-O2):
define double @Xn(double %0, double %1) {
%3 = fmul double %0, -2.000000e+00
%4 = tail call double @llvm.fmuladd.f64(double %0, double %1, double %3)
%5 = fadd double %1, -1.000000e+00
%6 = fsub double %5, %0
%7 = fdiv double %4, %6
ret double %7
}
/* Type definitions */
struct gamestate {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ action(int, struct gamestate *, int);
int rand();
void shuffle(struct gamestate *gs, int size) {
  int i;
  for (i = 0; i < 1000 * size * size; i++)
    (void)action(rand() % 4, gs, size);
}


x86 assembly (clang, -O0):
<shuffle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
imul   $0x3e8,-0xc(%rbp),%ecx
imul   -0xc(%rbp),%ecx
cmp    %ecx,%eax
jge    1177 <shuffle+0x57>
mov    $0x0,%al
call   1040 <rand@plt>
mov    $0x4,%ecx
cltd
idiv   %ecx
mov    %edx,%edi
mov    -0x8(%rbp),%rsi
mov    -0xc(%rbp),%edx
call   1030 <action@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1136 <shuffle+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<shuffle>:
push   %rbp
push   %r14
push   %rbx
mov    %esi,%eax
imul   %esi,%eax
imul   $0x3e8,%eax,%ebp
test   %ebp,%ebp
jle    1165 <shuffle+0x45>
mov    %esi,%ebx
mov    %rdi,%r14
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1040 <rand@plt>
lea    0x3(%rax),%ecx
test   %eax,%eax
cmovns %eax,%ecx
and    $0xfffffffc,%ecx
sub    %ecx,%eax
mov    %eax,%edi
mov    %r14,%rsi
mov    %ebx,%edx
call   1030 <action@plt>
add    $0xffffffff,%ebp
jne    1140 <shuffle+0x20>
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
%struct.gamestate = type { i32 }
define void @shuffle(%struct.gamestate* %0, i32 %1) {
%3 = alloca %struct.gamestate*
%4 = alloca i32
%5 = alloca i32
store %struct.gamestate* %0, %struct.gamestate** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %19, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = mul nsw i32 1000, %8
%10 = load i32, i32* %4
%11 = mul nsw i32 %9, %10
%12 = icmp slt i32 %7, %11
br i1 %12, label %13, label %22
13: ; preds = %6
%14 = call i32 (...) @rand()
%15 = srem i32 %14, 4
%16 = load %struct.gamestate*, %struct.gamestate** %3
%17 = load i32, i32* %4
%18 = call i32 @action(i32 %15, %struct.gamestate* %16, i32 %17)
br label %19
19: ; preds = %13
%20 = load i32, i32* %5
%21 = add nsw i32 %20, 1
store i32 %21, i32* %5
br label %6
22: ; preds = %6
ret void
}

LLVM IR (-O2):
%struct.gamestate = type { i32 }
define void @shuffle(%struct.gamestate* %0, i32 %1) {
%3 = mul nsw i32 %1, 1000
%4 = mul i32 %3, %1
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %13
6: ; preds = %2, %6
%7 = phi i32 [ %11, %6 ], [ 0, %2 ]
%8 = tail call i32 (...) @rand()
%9 = srem i32 %8, 4
%10 = tail call i32 @action(i32 %9, %struct.gamestate* %0, i32 %1)
%11 = add nuw nsw i32 %7, 1
%12 = icmp eq i32 %11, %4
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
int convertCharToInt(char c) {
  int ret = c - '0';
  return ret;
}


x86 assembly (clang, -O0):
<convertCharToInt>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
sub    $0x30,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<convertCharToInt>:
lea    -0x30(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @convertCharToInt(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
%6 = sub nsw i32 %5, 48
store i32 %6, i32* %3
%7 = load i32, i32* %3
ret i32 %7
}

LLVM IR (-O2):
define i32 @convertCharToInt(i8 signext %0) {
%2 = sext i8 %0 to i32
%3 = add nsw i32 %2, -48
ret i32 %3
}
int tgetent(char *buffer, char *termtype) { return 1; }


x86 assembly (clang, -O0):
<tgetent>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tgetent>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @tgetent(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
ret i32 1
}

LLVM IR (-O2):
define i32 @tgetent(i8* nocapture readnone %0, i8* nocapture readnone %1) {
ret i32 1
}
void gdk_event_put() {}


x86 assembly (clang, -O0):
<gdk_event_put>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdk_event_put>:
ret

LLVM IR (-O0):
define void @gdk_event_put() {
ret void
}

LLVM IR (-O2):
define void @gdk_event_put() {
ret void
}
int fun10(int x) { return x; }


x86 assembly (clang, -O0):
<fun10>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun10>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @fun10(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @fun10(i32 returned %0) {
ret i32 %0
}
int color_offset_f3(int x, int y) { return ((y) + ((201 * (x)) / 39) - 18718); }


x86 assembly (clang, -O0):
<color_offset_f3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
imul   $0xc9,-0x4(%rbp),%eax
mov    $0x27,%ecx
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
sub    $0x491e,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<color_offset_f3>:
imul   $0xc9,%edi,%eax
cltq
imul   $0xffffffffd20d20d3,%rax,%rcx
shr    $0x20,%rcx
add    %ecx,%eax
mov    %eax,%ecx
shr    $0x1f,%ecx
sar    $0x5,%eax
add    %ecx,%eax
add    %esi,%eax
add    $0xffffb6e2,%eax
ret

LLVM IR (-O0):
define i32 @color_offset_f3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i32, i32* %3
%7 = mul nsw i32 201, %6
%8 = sdiv i32 %7, 39
%9 = add nsw i32 %5, %8
%10 = sub nsw i32 %9, 18718
ret i32 %10
}

LLVM IR (-O2):
define i32 @color_offset_f3(i32 %0, i32 %1) {
%3 = mul nsw i32 %0, 201
%4 = sdiv i32 %3, 39
%5 = add i32 %1, -18718
%6 = add i32 %5, %4
ret i32 %6
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int x;
};
struct TYPE_4__ {
  TYPE_1__ xcreatewindow;
};
typedef TYPE_2__ XEvent;

/* Variables and functions */
void set_XEvent_xcreatewindow_x(void *_p, int _v) {
  ((XEvent *)_p)->xcreatewindow.x = (int)_v;
}


x86 assembly (clang, -O0):
<set_XEvent_xcreatewindow_x>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XEvent_xcreatewindow_x>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i32 }
define void @set_XEvent_xcreatewindow_x(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_4__*
%8 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i32 0, i32 0
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 0
store i32 %5, i32* %9
ret void
}

LLVM IR (-O2):
define void @set_XEvent_xcreatewindow_x(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
/* Variables and functions */
int ERR_isError(size_t);
unsigned ZSTDv06_isError(size_t code) { return ERR_isError(code); }


x86 assembly (clang, -O0):
<ZSTDv06_isError>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ERR_isError@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ZSTDv06_isError>:
jmp    1030 <ERR_isError@plt>

LLVM IR (-O0):
define i32 @ZSTDv06_isError(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @ERR_isError(i64 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @ZSTDv06_isError(i64 %0) {
%2 = tail call i32 @ERR_isError(i64 %0)
ret i32 %2
}
/* Variables and functions */
int WRAPPER_OUTC(void *ctx, int c, size_t pos) {
  *(((char *)ctx) + pos) = (char)c;
  return (pos + 1);
}


x86 assembly (clang, -O0):
<WRAPPER_OUTC>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0xc(%rbp),%eax
mov    %al,%dl
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<WRAPPER_OUTC>:
mov    %sil,(%rdi,%rdx,1)
lea    0x1(%rdx),%eax
ret

LLVM IR (-O0):
define i32 @WRAPPER_OUTC(i8* %0, i32 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i64
store i8* %0, i8** %4
store i32 %1, i32* %5
store i64 %2, i64* %6
%7 = load i32, i32* %5
%8 = trunc i32 %7 to i8
%9 = load i8*, i8** %4
%10 = load i64, i64* %6
%11 = getelementptr inbounds i8, i8* %9, i64 %10
store i8 %8, i8* %11
%12 = load i64, i64* %6
%13 = add i64 %12, 1
%14 = trunc i64 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @WRAPPER_OUTC(i8* nocapture writeonly %0, i32 %1, i64 %2) {
%4 = trunc i32 %1 to i8
%5 = getelementptr inbounds i8, i8* %0, i64 %2
store i8 %4, i8* %5
%6 = trunc i64 %2 to i32
%7 = add i32 %6, 1
ret i32 %7
}
/* Variables and functions */
scalar_t__ mod(float, int);
int flfloor(float n) { return (int)(n - (float)mod(n, 1)); }


x86 assembly (clang, -O0):
<flfloor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x4(%rbp),%xmm0
mov    $0x1,%edi
call   1030 <mod@plt>
movss  -0x8(%rbp),%xmm0
cvtsi2ss %rax,%xmm1
subss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<flfloor>:
push   %rax
movss  %xmm0,0x4(%rsp)
mov    $0x1,%edi
call   1030 <mod@plt>
xorps  %xmm0,%xmm0
cvtsi2ss %rax,%xmm0
movss  0x4(%rsp),%xmm1
subss  %xmm0,%xmm1
cvttss2si %xmm1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @flfloor(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = call i64 @mod(float %4, i32 1)
%6 = sitofp i64 %5 to float
%7 = fsub float %3, %6
%8 = fptosi float %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @flfloor(float %0) {
%2 = tail call i64 @mod(float %0, i32 1)
%3 = sitofp i64 %2 to float
%4 = fsub float %0, %3
%5 = fptosi float %4 to i32
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ TS_TST_INFO;
typedef int /*<<< orphan*/ ASN1_OBJECT;

/* Variables and functions */
scalar_t__ OBJ_cmp(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int /*<<< orphan*/ TS_R_POLICY_MISMATCH;
int /*<<< orphan*/ *TS_TST_INFO_get_policy_id(int /*<<< orphan*/ *);
int /*<<< orphan*/ TSerror(int /*<<< orphan*/);
int TS_check_policy(ASN1_OBJECT *req_oid, TS_TST_INFO *tst_info) {
  ASN1_OBJECT *resp_oid = TS_TST_INFO_get_policy_id(tst_info);
  if (OBJ_cmp(req_oid, resp_oid) != 0) {
    TSerror(TS_R_POLICY_MISMATCH);
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<TS_check_policy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <TS_TST_INFO_get_policy_id@plt>
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1040 <OBJ_cmp@plt>
cmp    $0x0,%rax
je     117e <TS_check_policy+0x4e>
mov    0x2e75(%rip),%rax
mov    (%rax),%edi
call   1050 <TSerror@plt>
movl   $0x0,-0x4(%rbp)
jmp    1185 <TS_check_policy+0x55>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<TS_check_policy>:
push   %rbx
mov    %rdi,%rbx
mov    %rsi,%rdi
call   1030 <TS_TST_INFO_get_policy_id@plt>
mov    %rbx,%rdi
mov    %rax,%rsi
call   1040 <OBJ_cmp@plt>
test   %rax,%rax
je     115e <TS_check_policy+0x2e>
mov    0x2e8d(%rip),%rax
mov    (%rax),%edi
call   1050 <TSerror@plt>
xor    %eax,%eax
pop    %rbx
ret
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@TS_R_POLICY_MISMATCH = global i32 0
define i32 @TS_check_policy(i32* %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
store i32* %0, i32** %4
store i32* %1, i32** %5
%7 = load i32*, i32** %5
%8 = call i32* @TS_TST_INFO_get_policy_id(i32* %7)
store i32* %8, i32** %6
%9 = load i32*, i32** %4
%10 = load i32*, i32** %6
%11 = call i64 @OBJ_cmp(i32* %9, i32* %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %2
%14 = load i32, i32* @TS_R_POLICY_MISMATCH
%15 = call i32 @TSerror(i32 %14)
store i32 0, i32* %3
br label %17
16: ; preds = %2
store i32 1, i32* %3
br label %17
17: ; preds = %16, %13
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
@TS_R_POLICY_MISMATCH = global i32 0
define i32 @TS_check_policy(i32* %0, i32* %1) {
%3 = tail call i32* @TS_TST_INFO_get_policy_id(i32* %1)
%4 = tail call i64 @OBJ_cmp(i32* %0, i32* %3)
%5 = icmp eq i64 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = load i32, i32* @TS_R_POLICY_MISMATCH
%8 = tail call i32 @TSerror(i32 %7)
br label %9
9: ; preds = %2, %6
%10 = phi i32 [ 0, %6 ], [ 1, %2 ]
ret i32 %10
}
/* Variables and functions */
int _assert_ok(char *);
int _assert_pointer_mismatch(char *, int /*<<< orphan*/ *, void *);
int assert_null(void *p) {
  char func[] = "assert_null";
  if (!p)
    return _assert_ok(func);
  else
    return _assert_pointer_mismatch(func, NULL, p);
}


x86 assembly (clang, -O0):
<assert_null>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    0xecd(%rip),%rax
mov    %rax,-0x1c(%rbp)
mov    0xecb(%rip),%eax
mov    %eax,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    115c <assert_null+0x3c>
lea    -0x1c(%rbp),%rdi
call   1040 <_assert_ok@plt>
mov    %eax,-0x4(%rbp)
jmp    1170 <assert_null+0x50>
lea    -0x1c(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%esi
call   1030 <_assert_pointer_mismatch@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_null>:
sub    $0x18,%rsp
movabs $0x6e5f747265737361,%rax
74 5f 6e
mov    %rax,0x8(%rsp)
movl   $0x6c6c75,0x10(%rsp)
test   %rdi,%rdi
je     1154 <assert_null+0x34>
mov    %rdi,%rdx
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <_assert_pointer_mismatch@plt>
add    $0x18,%rsp
ret
lea    0x8(%rsp),%rdi
call   1040 <_assert_ok@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.assert_null.func = [12 x i8] c"assert_null\00"
define i32 @assert_null(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca [12 x i8]
store i8* %0, i8** %3
%5 = bitcast [12 x i8]* %4 to i8*
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = getelementptr inbounds [12 x i8], [12 x i8]* %4, i64 0, i64 0
%10 = call i32 @_assert_ok(i8* %9)
store i32 %10, i32* %2
br label %15
11: ; preds = %1
%12 = getelementptr inbounds [12 x i8], [12 x i8]* %4, i64 0, i64 0
%13 = load i8*, i8** %3
%14 = call i32 @_assert_pointer_mismatch(i8* %12, i32* null, i8* %13)
store i32 %14, i32* %2
br label %15
15: ; preds = %11, %8
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
@__const.assert_null.func = [12 x i8] c"assert_null\00"
define i32 @assert_null(i8* %0) {
%2 = alloca [12 x i8]
%3 = getelementptr inbounds [12 x i8], [12 x i8]* %2, i64 0, i64 0
%4 = icmp eq i8* %0, null
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @_assert_ok(i8* %3)
br label %9
7: ; preds = %1
%8 = call i32 @_assert_pointer_mismatch(i8* %3, i32* null, i8* %0)
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %8, %7 ], [ %6, %5 ]
ret i32 %10
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ srec_set_end(int /*<<< orphan*/ *, int /*<<< orphan*/);
int srec_save_done(FILE *fp) {
  srec_set_end(fp, 0);
  return (0);
}


x86 assembly (clang, -O0):
<srec_save_done>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <srec_set_end@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<srec_save_done>:
push   %rax
xor    %esi,%esi
call   1030 <srec_set_end@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @srec_save_done(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @srec_set_end(i32* %3, i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @srec_save_done(i32* %0) {
%2 = tail call i32 @srec_set_end(i32* %0, i32 0)
ret i32 0
}
int pymol_roundf(float f) {
  if (f > 0.0F)
    return (int)(f + 0.49999F);
  else
    return (int)(f - 0.49999F);
}


x86 assembly (clang, -O0):
<pymol_roundf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jbe    1133 <pymol_roundf+0x33>
movss  0xede(%rip),%xmm0
addss  -0x8(%rbp),%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
jmp    114b <pymol_roundf+0x4b>
movss  -0x8(%rbp),%xmm0
movss  0xec0(%rip),%xmm1
subss  %xmm1,%xmm0
cvttss2si %xmm0,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pymol_roundf>:
xorps  %xmm1,%xmm1
xor    %eax,%eax
ucomiss %xmm1,%xmm0
seta   %al
lea    0xeee(%rip),%rcx
addss  (%rcx,%rax,4),%xmm0
cvttss2si %xmm0,%eax
ret

LLVM IR (-O0):
define i32 @pymol_roundf(float %0) {
%2 = alloca i32
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fcmp ogt float %4, 0.000000e+00
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load float, float* %3
%8 = fadd float %7, 0x3FDFFFD600000000
%9 = fptosi float %8 to i32
store i32 %9, i32* %2
br label %14
10: ; preds = %1
%11 = load float, float* %3
%12 = fsub float %11, 0x3FDFFFD600000000
%13 = fptosi float %12 to i32
store i32 %13, i32* %2
br label %14
14: ; preds = %10, %6
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @pymol_roundf(float %0) {
%2 = fcmp ogt float %0, 0.000000e+00
%3 = select i1 %2, float 0x3FDFFFD600000000, float 0xBFDFFFD600000000
%4 = fadd float %3, %0
%5 = fptosi float %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void read(int *p) { printf("%d\n", *p); }


x86 assembly (clang, -O0):
<read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
lea    0xed7(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read>:
mov    (%rdi),%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @read(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = load i32, i32* %3
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @read(i32* nocapture %0) {
%2 = load i32, i32* %0
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret void
}
void RTStrPrintHexBytes(void) {}


x86 assembly (clang, -O0):
<RTStrPrintHexBytes>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTStrPrintHexBytes>:
ret

LLVM IR (-O0):
define void @RTStrPrintHexBytes() {
ret void
}

LLVM IR (-O2):
define void @RTStrPrintHexBytes() {
ret void
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int nanosleep(struct timespec const *, struct timespec *);
int thrd_sleep(const struct timespec *duration, struct timespec *remaining) {
  return nanosleep(duration, remaining);
}


x86 assembly (clang, -O0):
<thrd_sleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <nanosleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thrd_sleep>:
jmp    1030 <nanosleep@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
define i32 @thrd_sleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %3
%6 = load %struct.timespec*, %struct.timespec** %4
%7 = call i32 @nanosleep(%struct.timespec* %5, %struct.timespec* %6)
ret i32 %7
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
define i32 @thrd_sleep(%struct.timespec* %0, %struct.timespec* %1) {
%3 = tail call i32 @nanosleep(%struct.timespec* %0, %struct.timespec* %1)
ret i32 %3
}
void cxa_criticalSection_enter(void) {}


x86 assembly (clang, -O0):
<cxa_criticalSection_enter>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cxa_criticalSection_enter>:
ret

LLVM IR (-O0):
define void @cxa_criticalSection_enter() {
ret void
}

LLVM IR (-O2):
define void @cxa_criticalSection_enter() {
ret void
}
unsigned long hash_long64(unsigned long key) {
  key = (~key) + (key << 21);
  key = key ^ (key >> 24);
  key = (key + (key << 3)) + (key << 8);
  key = key ^ (key >> 14);
  key = (key + (key << 2)) + (key << 4);
  key = key ^ (key >> 28);
  key = key + (key << 31);
  return key;
}


x86 assembly (clang, -O0):
<hash_long64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
xor    $0xffffffffffffffff,%rax
mov    -0x8(%rbp),%rcx
shl    $0x15,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x18,%rcx
xor    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    -0x8(%rbp),%rcx
shl    $0x8,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0xe,%rcx
xor    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    -0x8(%rbp),%rcx
shl    $0x4,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shr    $0x1c,%rcx
xor    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x8(%rbp),%rcx
shl    $0x1f,%rcx
add    %rcx,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<hash_long64>:
mov    %rdi,%rax
not    %rax
shl    $0x15,%rdi
add    %rax,%rdi
mov    %rdi,%rax
shr    $0x18,%rax
xor    %rdi,%rax
imul   $0x109,%rax,%rax
mov    %rax,%rcx
shr    $0xe,%rcx
xor    %rax,%rcx
lea    (%rcx,%rcx,4),%rax
lea    (%rcx,%rax,4),%rax
mov    %rax,%rcx
shr    $0x1c,%rcx
xor    %rax,%rcx
mov    %rcx,%rax
shl    $0x1f,%rax
add    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @hash_long64(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = xor i64 %3, -1
%5 = load i64, i64* %2
%6 = shl i64 %5, 21
%7 = add i64 %4, %6
store i64 %7, i64* %2
%8 = load i64, i64* %2
%9 = load i64, i64* %2
%10 = lshr i64 %9, 24
%11 = xor i64 %8, %10
store i64 %11, i64* %2
%12 = load i64, i64* %2
%13 = load i64, i64* %2
%14 = shl i64 %13, 3
%15 = add i64 %12, %14
%16 = load i64, i64* %2
%17 = shl i64 %16, 8
%18 = add i64 %15, %17
store i64 %18, i64* %2
%19 = load i64, i64* %2
%20 = load i64, i64* %2
%21 = lshr i64 %20, 14
%22 = xor i64 %19, %21
store i64 %22, i64* %2
%23 = load i64, i64* %2
%24 = load i64, i64* %2
%25 = shl i64 %24, 2
%26 = add i64 %23, %25
%27 = load i64, i64* %2
%28 = shl i64 %27, 4
%29 = add i64 %26, %28
store i64 %29, i64* %2
%30 = load i64, i64* %2
%31 = load i64, i64* %2
%32 = lshr i64 %31, 28
%33 = xor i64 %30, %32
store i64 %33, i64* %2
%34 = load i64, i64* %2
%35 = load i64, i64* %2
%36 = shl i64 %35, 31
%37 = add i64 %34, %36
store i64 %37, i64* %2
%38 = load i64, i64* %2
ret i64 %38
}

LLVM IR (-O2):
define i64 @hash_long64(i64 %0) {
%2 = xor i64 %0, -1
%3 = shl i64 %0, 21
%4 = add i64 %3, %2
%5 = lshr i64 %4, 24
%6 = xor i64 %5, %4
%7 = mul i64 %6, 265
%8 = lshr i64 %7, 14
%9 = xor i64 %8, %7
%10 = mul i64 %9, 21
%11 = lshr i64 %10, 28
%12 = xor i64 %11, %10
%13 = mul i64 %12, 2147483649
ret i64 %13
}