xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ assert(int);
void foo2(int n, int a[50][n]) {
  assert(a[29][7] == 42);
  assert(a[29][7] == 0);
}


x86 assembly (clang, -O0):
<foo2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,%ecx
mov    %rcx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
imul   $0x1d,%rcx,%rcx
cmpl   $0x2a,0x1c(%rax,%rcx,4)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%rax
imul   $0x1d,%rcx,%rcx
cmpl   $0x0,0x1c(%rax,%rcx,4)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo2>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %edi,%eax
imul   $0x74,%rax,%rbx
xor    %edi,%edi
cmpl   $0x2a,0x1c(%rsi,%rbx,1)
sete   %dil
call   1030 <assert@plt>
xor    %edi,%edi
cmpl   $0x0,0x1c(%r14,%rbx,1)
sete   %dil
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @foo2(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = zext i32 %5 to i64
%7 = load i32*, i32** %4
%8 = mul nsw i64 29, %6
%9 = getelementptr inbounds i32, i32* %7, i64 %8
%10 = getelementptr inbounds i32, i32* %9, i64 7
%11 = load i32, i32* %10
%12 = icmp eq i32 %11, 42
%13 = zext i1 %12 to i32
%14 = call i32 @assert(i32 %13)
%15 = load i32*, i32** %4
%16 = mul nsw i64 29, %6
%17 = getelementptr inbounds i32, i32* %15, i64 %16
%18 = getelementptr inbounds i32, i32* %17, i64 7
%19 = load i32, i32* %18
%20 = icmp eq i32 %19, 0
%21 = zext i1 %20 to i32
%22 = call i32 @assert(i32 %21)
ret void
}

LLVM IR (-O2):
define void @foo2(i32 %0, i32* nocapture %1) {
%3 = zext i32 %0 to i64
%4 = mul nuw nsw i64 %3, 29
%5 = getelementptr inbounds i32, i32* %1, i64 %4
%6 = getelementptr inbounds i32, i32* %5, i64 7
%7 = load i32, i32* %6
%8 = icmp eq i32 %7, 42
%9 = zext i1 %8 to i32
%10 = tail call i32 @assert(i32 %9)
%11 = load i32, i32* %6
%12 = icmp eq i32 %11, 0
%13 = zext i1 %12 to i32
%14 = tail call i32 @assert(i32 %13)
ret void
}
void ARGBCopyYToAlphaRow_Any_SSE2() {}


x86 assembly (clang, -O0):
<ARGBCopyYToAlphaRow_Any_SSE2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ARGBCopyYToAlphaRow_Any_SSE2>:
ret

LLVM IR (-O0):
define void @ARGBCopyYToAlphaRow_Any_SSE2() {
ret void
}

LLVM IR (-O2):
define void @ARGBCopyYToAlphaRow_Any_SSE2() {
ret void
}
extern void vscp_data_coding_init(void) { return; }


x86 assembly (clang, -O0):
<vscp_data_coding_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vscp_data_coding_init>:
ret

LLVM IR (-O0):
define void @vscp_data_coding_init() {
ret void
}

LLVM IR (-O2):
define void @vscp_data_coding_init() {
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
size_t strlen(char const *);
int /*<<< orphan*/ strncpy(char *, char const *, size_t);
char *tbh_strdup(const char *s) {
  size_t len = strlen(s);
  char *r = (char *)malloc(sizeof(char) * (len + 1));
  if (r != NULL) {
    strncpy(r, s, len);
  }
  r[len] = '\0';
  return (r);
}


x86 assembly (clang, -O0):
<tbh_strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <strlen@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
shl    $0x0,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     117c <tbh_strdup+0x4c>
mov    -0x18(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <strncpy@plt>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tbh_strdup>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
call   1040 <strlen@plt>
mov    %rax,%r15
lea    0x1(%rax),%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     115e <tbh_strdup+0x2e>
mov    %rbx,%rdi
mov    %r14,%rsi
mov    %r15,%rdx
call   1030 <strncpy@plt>
movb   $0x0,(%rbx,%r15,1)
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define i8* @tbh_strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
%4 = alloca i8*
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i64 @strlen(i8* %5)
store i64 %6, i64* %3
%7 = load i64, i64* %3
%8 = add i64 %7, 1
%9 = mul i64 1, %8
%10 = trunc i64 %9 to i32
%11 = call i64 @malloc(i32 %10)
%12 = inttoptr i64 %11 to i8*
store i8* %12, i8** %4
%13 = load i8*, i8** %4
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %20
15: ; preds = %1
%16 = load i8*, i8** %4
%17 = load i8*, i8** %2
%18 = load i64, i64* %3
%19 = call i32 @strncpy(i8* %16, i8* %17, i64 %18)
br label %20
20: ; preds = %15, %1
%21 = load i8*, i8** %4
%22 = load i64, i64* %3
%23 = getelementptr inbounds i8, i8* %21, i64 %22
store i8 0, i8* %23
%24 = load i8*, i8** %4
ret i8* %24
}

LLVM IR (-O2):
define i8* @tbh_strdup(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = trunc i64 %2 to i32
%4 = add i32 %3, 1
%5 = tail call i64 @malloc(i32 %4)
%6 = inttoptr i64 %5 to i8*
%7 = icmp eq i64 %5, 0
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = tail call i32 @strncpy(i8* %6, i8* %0, i64 %2)
br label %10
10: ; preds = %8, %1
%11 = getelementptr inbounds i8, i8* %6, i64 %2
store i8 0, i8* %11
ret i8* %6
}
void ff_hevc_put_hevc_bi_epel_v8_12_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_epel_v8_12_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_epel_v8_12_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_epel_v8_12_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_epel_v8_12_sse4() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SIGWINCH;
int /*<<< orphan*/ get_winsize(int);
int /*<<< orphan*/ signal(int /*<<< orphan*/, void (*)(int));
void resize_handler(int sig) {
  get_winsize(1);
  signal(SIGWINCH, resize_handler);
}


x86 assembly (clang, -O0):
<resize_handler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%edi
call   1030 <get_winsize@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%edi
mov    0x2e9b(%rip),%rsi
call   1040 <signal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<resize_handler>:
push   %rax
mov    $0x1,%edi
call   1030 <get_winsize@plt>
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
mov    0x2ea5(%rip),%rsi
pop    %rax
jmp    1040 <signal@plt>

LLVM IR (-O0):
@SIGWINCH = global i32 0
define void @resize_handler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @get_winsize(i32 1)
%4 = load i32, i32* @SIGWINCH
%5 = call i32 @signal(i32 %4, void (i32)* @resize_handler)
ret void
}

LLVM IR (-O2):
@SIGWINCH = global i32 0
define void @resize_handler(i32 %0) {
%2 = tail call i32 @get_winsize(i32 1)
%3 = load i32, i32* @SIGWINCH
%4 = tail call i32 @signal(i32 %3, void (i32)* @resize_handler)
ret void
}
int do_677() { return 677; }


x86 assembly (clang, -O0):
<do_677>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2a5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_677>:
mov    $0x2a5,%eax
ret

LLVM IR (-O0):
define i32 @do_677() {
ret i32 677
}

LLVM IR (-O2):
define i32 @do_677() {
ret i32 677
}
void avpriv_io_delete() {}


x86 assembly (clang, -O0):
<avpriv_io_delete>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<avpriv_io_delete>:
ret

LLVM IR (-O0):
define void @avpriv_io_delete() {
ret void
}

LLVM IR (-O2):
define void @avpriv_io_delete() {
ret void
}
void rpmtsFreeLock(void *lock) { return; }


x86 assembly (clang, -O0):
<rpmtsFreeLock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rpmtsFreeLock>:
ret

LLVM IR (-O0):
define void @rpmtsFreeLock(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @rpmtsFreeLock(i8* nocapture %0) {
ret void
}
int gcd(int u, int v) {
  int t;
  while (u > 0) {
    if (u < v) {
      t = u;
      u = v;
      v = t;
    }
    u = u - v;
  }
  return v;
}


x86 assembly (clang, -O0):
<gcd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    1140 <gcd+0x40>
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
jge    1132 <gcd+0x32>
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    110a <gcd+0xa>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcd>:
test   %edi,%edi
jle    111f <gcd+0x1f>
mov    %esi,%eax
cs nopw 0x0(%rax,%rax,1)
cmp    %esi,%edi
cmovl  %edi,%eax
cmovl  %esi,%edi
mov    %eax,%esi
sub    %eax,%edi
jg     1110 <gcd+0x10>
ret
mov    %esi,%eax
ret

LLVM IR (-O0):
define i32 @gcd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %21
9: ; preds = %6
%10 = load i32, i32* %3
%11 = load i32, i32* %4
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i32, i32* %3
store i32 %14, i32* %5
%15 = load i32, i32* %4
store i32 %15, i32* %3
%16 = load i32, i32* %5
store i32 %16, i32* %4
br label %17
17: ; preds = %13, %9
%18 = load i32, i32* %3
%19 = load i32, i32* %4
%20 = sub nsw i32 %18, %19
store i32 %20, i32* %3
br label %6
21: ; preds = %6
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
define i32 @gcd(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %12
4: ; preds = %2, %4
%5 = phi i32 [ %10, %4 ], [ %0, %2 ]
%6 = phi i32 [ %8, %4 ], [ %1, %2 ]
%7 = icmp slt i32 %5, %6
%8 = select i1 %7, i32 %5, i32 %6
%9 = select i1 %7, i32 %6, i32 %5
%10 = sub nsw i32 %9, %8
%11 = icmp sgt i32 %10, 0
br i1 %11, label %4, label %12
12: ; preds = %4, %2
%13 = phi i32 [ %1, %2 ], [ %8, %4 ]
ret i32 %13
}
/* Type definitions */
struct vec4 {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ vec4_zero(float *);
__attribute__((always_)) struct vec4 *psvec4_zero(struct vec4 *result) {
  vec4_zero((float *)result);
  return result;
}


x86 assembly (clang, -O0):
<psvec4_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vec4_zero@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec4_zero>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec4_zero@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec4 = type { i32 }
define %struct.vec4* @psvec4_zero(%struct.vec4* %0) {
%2 = alloca %struct.vec4*
store %struct.vec4* %0, %struct.vec4** %2
%3 = load %struct.vec4*, %struct.vec4** %2
%4 = bitcast %struct.vec4* %3 to float*
%5 = call i32 @vec4_zero(float* %4)
%6 = load %struct.vec4*, %struct.vec4** %2
ret %struct.vec4* %6
}

LLVM IR (-O2):
%struct.vec4 = type { i32 }
define %struct.vec4* @psvec4_zero(%struct.vec4* returned %0) {
%2 = bitcast %struct.vec4* %0 to float*
%3 = tail call i32 @vec4_zero(float* %2)
ret %struct.vec4* %0
}
/* Variables and functions */
char getchar();
int /*<<< orphan*/ printf(char *);
int pause(void) {
  printf("Press enter to return to the menu.");
  getchar();
  while ('\n' != getchar()) {
    ;
  }
}


x86 assembly (clang, -O0):
<pause>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xed1(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
mov    $0x0,%al
call   1040 <getchar@plt>
movsbl %al,%ecx
mov    $0xa,%eax
cmp    %ecx,%eax
je     1157 <pause+0x37>
jmp    113b <pause+0x1b>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pause>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
call   1040 <getchar@plt>
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
xor    %eax,%eax
call   1040 <getchar@plt>
cmp    $0xa,%al
jne    1140 <pause+0x20>
pop    %rcx
ret

LLVM IR (-O0):
@.str = [35 x i8] c"Press enter to return to the menu.\00"
define i32 @pause() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%3 = call signext i8 (...) @getchar()
br label %4
4: ; preds = %8, %0
%5 = call signext i8 (...) @getchar()
%6 = sext i8 %5 to i32
%7 = icmp ne i32 10, %6
br i1 %7, label %8, label %9
8: ; preds = %4
br label %4
9: ; preds = %4
%10 = load i32, i32* %1
ret i32 %10
}

LLVM IR (-O2):
@.str = [35 x i8] c"Press enter to return to the menu.\00"
define i32 @pause() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([35 x i8], [35 x i8]* @.str, i64 0, i64 0))
%2 = tail call signext i8 (...) @getchar()
br label %3
3: ; preds = %3, %0
%4 = tail call signext i8 (...) @getchar()
%5 = icmp eq i8 %4, 10
br i1 %5, label %6, label %3
6: ; preds = %3
ret i32 undef
}
/* Variables and functions */
double cbrt(double);
double comoving_distance_to_redshift(double);
double comoving_volume_to_redshift(double Vc) {
  double r = cbrt(Vc * (3.0 / (4.0 * 3.14159265358979323846264338327950288)));
  return (comoving_distance_to_redshift(r));
}


x86 assembly (clang, -O0):
<comoving_volume_to_redshift>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xecb(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
call   1030 <cbrt@plt>
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1040 <comoving_distance_to_redshift@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<comoving_volume_to_redshift>:
push   %rax
mulsd  0xed7(%rip),%xmm0
call   1030 <cbrt@plt>
pop    %rax
jmp    1040 <comoving_distance_to_redshift@plt>

LLVM IR (-O0):
define double @comoving_volume_to_redshift(double %0) {
%2 = alloca double
%3 = alloca double
store double %0, double* %2
%4 = load double, double* %2
%5 = fmul double %4, 0x3FCE8EC8A4AEACC4
%6 = call double @cbrt(double %5)
store double %6, double* %3
%7 = load double, double* %3
%8 = call double @comoving_distance_to_redshift(double %7)
ret double %8
}

LLVM IR (-O2):
define double @comoving_volume_to_redshift(double %0) {
%2 = fmul double %0, 0x3FCE8EC8A4AEACC4
%3 = tail call double @cbrt(double %2)
%4 = tail call double @comoving_distance_to_redshift(double %3)
ret double %4
}
int mylog2(unsigned int x) {
  int a = 0;
  while (x > 1) {
    x /= 2;
    a++;
  }
  return a;
}


x86 assembly (clang, -O0):
<mylog2>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x1,-0x4(%rbp)
jbe    112f <mylog2+0x2f>
mov    -0x4(%rbp),%eax
shr    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    110e <mylog2+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mylog2>:
xor    %eax,%eax
cmp    $0x2,%edi
jb     111c <mylog2+0x1c>
xor    %eax,%eax
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
shr    %ecx
add    $0x1,%eax
cmp    $0x3,%edi
mov    %ecx,%edi
ja     1110 <mylog2+0x10>
ret

LLVM IR (-O0):
define i32 @mylog2(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ugt i32 %5, 1
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load i32, i32* %2
%9 = udiv i32 %8, 2
store i32 %9, i32* %2
%10 = load i32, i32* %3
%11 = add nsw i32 %10, 1
store i32 %11, i32* %3
br label %4
12: ; preds = %4
%13 = load i32, i32* %3
ret i32 %13
}

LLVM IR (-O2):
define i32 @mylog2(i32 %0) {
%2 = icmp ugt i32 %0, 1
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi i32 [ %7, %3 ], [ 0, %1 ]
%5 = phi i32 [ %6, %3 ], [ %0, %1 ]
%6 = lshr i32 %5, 1
%7 = add nuw nsw i32 %4, 1
%8 = icmp ugt i32 %5, 3
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi i32 [ 0, %1 ], [ %7, %3 ]
ret i32 %10
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ crc32_byte(int);
void crc32_8bytes(uint32_t val) {
  crc32_byte((val >> 0) & 0xff);
  crc32_byte((val >> 8) & 0xff);
  crc32_byte((val >> 16) & 0xff);
  crc32_byte((val >> 24) & 0xff);
}


x86 assembly (clang, -O0):
<crc32_8bytes>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
sar    $0x0,%edi
and    $0xff,%edi
call   1030 <crc32_byte@plt>
mov    -0x4(%rbp),%edi
sar    $0x8,%edi
and    $0xff,%edi
call   1030 <crc32_byte@plt>
mov    -0x4(%rbp),%edi
sar    $0x10,%edi
and    $0xff,%edi
call   1030 <crc32_byte@plt>
mov    -0x4(%rbp),%edi
sar    $0x18,%edi
and    $0xff,%edi
call   1030 <crc32_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<crc32_8bytes>:
push   %rbx
mov    %edi,%ebx
movzbl %bl,%edi
call   1030 <crc32_byte@plt>
movzbl %bh,%edi
call   1030 <crc32_byte@plt>
mov    %ebx,%eax
shr    $0x10,%eax
movzbl %al,%edi
call   1030 <crc32_byte@plt>
shr    $0x18,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1030 <crc32_byte@plt>

LLVM IR (-O0):
define void @crc32_8bytes(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 0
%5 = and i32 %4, 255
%6 = call i32 @crc32_byte(i32 %5)
%7 = load i32, i32* %2
%8 = ashr i32 %7, 8
%9 = and i32 %8, 255
%10 = call i32 @crc32_byte(i32 %9)
%11 = load i32, i32* %2
%12 = ashr i32 %11, 16
%13 = and i32 %12, 255
%14 = call i32 @crc32_byte(i32 %13)
%15 = load i32, i32* %2
%16 = ashr i32 %15, 24
%17 = and i32 %16, 255
%18 = call i32 @crc32_byte(i32 %17)
ret void
}

LLVM IR (-O2):
define void @crc32_8bytes(i32 %0) {
%2 = and i32 %0, 255
%3 = tail call i32 @crc32_byte(i32 %2)
%4 = lshr i32 %0, 8
%5 = and i32 %4, 255
%6 = tail call i32 @crc32_byte(i32 %5)
%7 = lshr i32 %0, 16
%8 = and i32 %7, 255
%9 = tail call i32 @crc32_byte(i32 %8)
%10 = lshr i32 %0, 24
%11 = tail call i32 @crc32_byte(i32 %10)
ret void
}
int server_access_val() { return 6; }


x86 assembly (clang, -O0):
<server_access_val>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<server_access_val>:
mov    $0x6,%eax
ret

LLVM IR (-O0):
define i32 @server_access_val() {
ret i32 6
}

LLVM IR (-O2):
define i32 @server_access_val() {
ret i32 6
}
/* Variables and functions */
unsigned long *reg_map(int);
int /*<<< orphan*/ usleep(int);
void ResetVpu(void) {
  unsigned long *reg_addr = reg_map(0x014);
  (*(volatile unsigned long *)reg_addr) |= 0x1;
  usleep(10);
  (*(volatile unsigned long *)reg_addr) &= ~0x1;
  return;
}


x86 assembly (clang, -O0):
<ResetVpu>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x14,%edi
call   1030 <reg_map@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
or     $0x1,%rcx
mov    %rcx,(%rax)
mov    $0xa,%edi
call   1040 <usleep@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%rcx
and    $0xfffffffffffffffe,%rcx
mov    %rcx,(%rax)
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ResetVpu>:
push   %rbx
mov    $0x14,%edi
call   1030 <reg_map@plt>
mov    %rax,%rbx
orq    $0x1,(%rax)
mov    $0xa,%edi
call   1040 <usleep@plt>
andq   $0xfffffffffffffffe,(%rbx)
pop    %rbx
ret

LLVM IR (-O0):
define void @ResetVpu() {
%1 = alloca i64*
%2 = call i64* @reg_map(i32 20)
store i64* %2, i64** %1
%3 = load i64*, i64** %1
%4 = load volatile i64, i64* %3
%5 = or i64 %4, 1
store volatile i64 %5, i64* %3
%6 = call i32 @usleep(i32 10)
%7 = load i64*, i64** %1
%8 = load volatile i64, i64* %7
%9 = and i64 %8, -2
store volatile i64 %9, i64* %7
ret void
}

LLVM IR (-O2):
define void @ResetVpu() {
%1 = tail call i64* @reg_map(i32 20)
%2 = load volatile i64, i64* %1
%3 = or i64 %2, 1
store volatile i64 %3, i64* %1
%4 = tail call i32 @usleep(i32 10)
%5 = load volatile i64, i64* %1
%6 = and i64 %5, -2
store volatile i64 %6, i64* %1
ret void
}
double pow10_int(int exp) {
  double result = 1;
  while (exp) {
    result *= 10;
    exp--;
  }
  return result;
}


x86 assembly (clang, -O0):
<pow10_int>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movsd  0xef1(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     113e <pow10_int+0x3e>
movsd  0xee2(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    1114 <pow10_int+0x14>
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<pow10_int>:
test   %edi,%edi
je     1134 <pow10_int+0x34>
lea    -0x1(%rdi),%eax
mov    %edi,%ecx
and    $0x7,%ecx
je     113d <pow10_int+0x3d>
xor    %edx,%edx
movsd  0xee8(%rip),%xmm0
movsd  0xee8(%rip),%xmm1
mulsd  %xmm1,%xmm0
add    $0x1,%edx
cmp    %edx,%ecx
jne    1120 <pow10_int+0x20>
sub    %edx,%edi
cmp    $0x7,%eax
jae    114a <pow10_int+0x4a>
jmp    1185 <pow10_int+0x85>
movsd  0xec4(%rip),%xmm0
ret
movsd  0xebb(%rip),%xmm0
cmp    $0x7,%eax
jb     1185 <pow10_int+0x85>
movsd  0xeb6(%rip),%xmm1
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
mulsd  %xmm1,%xmm0
add    $0xfffffff8,%edi
jne    1160 <pow10_int+0x60>
ret

LLVM IR (-O0):
define double @pow10_int(i32 %0) {
%2 = alloca i32
%3 = alloca double
store i32 %0, i32* %2
store double 1.000000e+00, double* %3
br label %4
4: ; preds = %7, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %4
%8 = load double, double* %3
%9 = fmul double %8, 1.000000e+01
store double %9, double* %3
%10 = load i32, i32* %2
%11 = add nsw i32 %10, -1
store i32 %11, i32* %2
br label %4
12: ; preds = %4
%13 = load double, double* %3
ret double %13
}

LLVM IR (-O2):
define double @pow10_int(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %33, label %3
3: ; preds = %1
%4 = add i32 %0, -1
%5 = and i32 %0, 7
%6 = icmp eq i32 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %3, %7
%8 = phi double [ %11, %7 ], [ 1.000000e+00, %3 ]
%9 = phi i32 [ %12, %7 ], [ %0, %3 ]
%10 = phi i32 [ %13, %7 ], [ 0, %3 ]
%11 = fmul double %8, 1.000000e+01
%12 = add nsw i32 %9, -1
%13 = add i32 %10, 1
%14 = icmp eq i32 %13, %5
br i1 %14, label %15, label %7
15: ; preds = %7, %3
%16 = phi double [ undef, %3 ], [ %11, %7 ]
%17 = phi double [ 1.000000e+00, %3 ], [ %11, %7 ]
%18 = phi i32 [ %0, %3 ], [ %12, %7 ]
%19 = icmp ult i32 %4, 7
br i1 %19, label %33, label %20
20: ; preds = %15, %20
%21 = phi double [ %30, %20 ], [ %17, %15 ]
%22 = phi i32 [ %31, %20 ], [ %18, %15 ]
%23 = fmul double %21, 1.000000e+01
%24 = fmul double %23, 1.000000e+01
%25 = fmul double %24, 1.000000e+01
%26 = fmul double %25, 1.000000e+01
%27 = fmul double %26, 1.000000e+01
%28 = fmul double %27, 1.000000e+01
%29 = fmul double %28, 1.000000e+01
%30 = fmul double %29, 1.000000e+01
%31 = add nsw i32 %22, -8
%32 = icmp eq i32 %31, 0
br i1 %32, label %33, label %20
33: ; preds = %15, %20, %1
%34 = phi double [ 1.000000e+00, %1 ], [ %16, %15 ], [ %30, %20 ]
ret double %34
}
/* Variables and functions */
int /*<<< orphan*/ make_filename(long, char *, char *);
long umfpack_zi_load_numeric(void **, char *);
void umf4zlnum(void **Numeric, long *filenum, long *status) {
  char filename[200];
  make_filename(*filenum, "n", filename);
  *status = umfpack_zi_load_numeric(Numeric, filename);
}


x86 assembly (clang, -O0):
<umf4zlnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0xe0,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rdi
lea    -0xe0(%rbp),%rdx
lea    0xeb4(%rip),%rsi
call   1030 <make_filename@plt>
mov    -0x8(%rbp),%rdi
lea    -0xe0(%rbp),%rsi
call   1040 <umfpack_zi_load_numeric@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
add    $0xe0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<umf4zlnum>:
push   %r15
push   %r14
push   %rbx
sub    $0xd0,%rsp
mov    %rdx,%r14
mov    %rdi,%rbx
mov    (%rsi),%rdi
lea    0xec4(%rip),%rsi
mov    %rsp,%r15
mov    %r15,%rdx
call   1030 <make_filename@plt>
mov    %rbx,%rdi
mov    %r15,%rsi
call   1040 <umfpack_zi_load_numeric@plt>
mov    %rax,(%r14)
add    $0xd0,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [2 x i8] c"n\00"
define void @umf4zlnum(i8** %0, i64* %1, i64* %2) {
%4 = alloca i8**
%5 = alloca i64*
%6 = alloca i64*
%7 = alloca [200 x i8]
store i8** %0, i8*** %4
store i64* %1, i64** %5
store i64* %2, i64** %6
%8 = load i64*, i64** %5
%9 = load i64, i64* %8
%10 = getelementptr inbounds [200 x i8], [200 x i8]* %7, i64 0, i64 0
%11 = call i32 @make_filename(i64 %9, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %10)
%12 = load i8**, i8*** %4
%13 = getelementptr inbounds [200 x i8], [200 x i8]* %7, i64 0, i64 0
%14 = call i64 @umfpack_zi_load_numeric(i8** %12, i8* %13)
%15 = load i64*, i64** %6
store i64 %14, i64* %15
ret void
}

LLVM IR (-O2):
@.str = [2 x i8] c"n\00"
define void @umf4zlnum(i8** %0, i64* nocapture %1, i64* nocapture writeonly %2) {
%4 = alloca [200 x i8]
%5 = getelementptr inbounds [200 x i8], [200 x i8]* %4, i64 0, i64 0
%6 = load i64, i64* %1
%7 = call i32 @make_filename(i64 %6, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0), i8* %5)
%8 = call i64 @umfpack_zi_load_numeric(i8** %0, i8* %5)
store i64 %8, i64* %2
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ MUL64x(int /*<<< orphan*/, int /*<<< orphan*/);
uint64_t MUL64xPOW(uint64_t V, uint32_t i, uint64_t c) {
  if (i == 0)
    return V;
  else
    return MUL64x(MUL64xPOW(V, i - 1, c), c);
}


x86 assembly (clang, -O0):
<MUL64xPOW>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1148 <MUL64xPOW+0x28>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1168 <MUL64xPOW+0x48>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
sub    $0x1,%rsi
mov    -0x14(%rbp),%edx
call   1040 <MUL64xPOW@plt>
mov    %eax,%edi
mov    -0x14(%rbp),%esi
call   1030 <MUL64x@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MUL64xPOW>:
test   %rsi,%rsi
je     113b <MUL64xPOW+0x1b>
push   %rbx
mov    %edx,%ebx
add    $0xffffffffffffffff,%rsi
call   1040 <MUL64xPOW@plt>
mov    %eax,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <MUL64x@plt>
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @MUL64xPOW(i32 %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i64
%7 = alloca i32
store i32 %0, i32* %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%8 = load i64, i64* %6
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %3
%11 = load i32, i32* %5
store i32 %11, i32* %4
br label %20
12: ; preds = %3
%13 = load i32, i32* %5
%14 = load i64, i64* %6
%15 = sub nsw i64 %14, 1
%16 = load i32, i32* %7
%17 = call i32 @MUL64xPOW(i32 %13, i64 %15, i32 %16)
%18 = load i32, i32* %7
%19 = call i32 @MUL64x(i32 %17, i32 %18)
store i32 %19, i32* %4
br label %20
20: ; preds = %12, %10
%21 = load i32, i32* %4
ret i32 %21
}

LLVM IR (-O2):
define i32 @MUL64xPOW(i32 %0, i64 %1, i32 %2) {
%4 = icmp eq i64 %1, 0
br i1 %4, label %5, label %7
5: ; preds = %3, %7
%6 = phi i32 [ %10, %7 ], [ %0, %3 ]
ret i32 %6
7: ; preds = %3
%8 = add nsw i64 %1, -1
%9 = tail call i32 @MUL64xPOW(i32 %0, i64 %8, i32 %2)
%10 = tail call i32 @MUL64x(i32 %9, i32 %2)
br label %5
}
/* Variables and functions */
int /*<<< orphan*/ WriteLine(int /*<<< orphan*/);
int /*<<< orphan*/ tostr(int);
void print(int I) { WriteLine(tostr(I)); }


x86 assembly (clang, -O0):
<print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <tostr@plt>
mov    %eax,%edi
call   1030 <WriteLine@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print>:
push   %rax
call   1040 <tostr@plt>
mov    %eax,%edi
pop    %rax
jmp    1030 <WriteLine@plt>

LLVM IR (-O0):
define void @print(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @tostr(i32 %3)
%5 = call i32 @WriteLine(i32 %4)
ret void
}

LLVM IR (-O2):
define void @print(i32 %0) {
%2 = tail call i32 @tostr(i32 %0)
%3 = tail call i32 @WriteLine(i32 %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CMT1_delay_10us(int);
int /*<<< orphan*/ OLED_wrcmd(int);
void OLED_locate(int y, int x) {
  int adrs;
  adrs = 0x20 * y + x;
  OLED_wrcmd(0x80 + adrs);
  CMT1_delay_10us(4);
}


x86 assembly (clang, -O0):
<OLED_locate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x5,%eax
add    -0x8(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%edi
add    $0x80,%edi
call   1040 <OLED_wrcmd@plt>
mov    $0x4,%edi
call   1030 <CMT1_delay_10us@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<OLED_locate>:
push   %rax
shl    $0x5,%edi
add    %esi,%edi
add    $0x80,%edi
call   1040 <OLED_wrcmd@plt>
mov    $0x4,%edi
pop    %rax
jmp    1030 <CMT1_delay_10us@plt>

LLVM IR (-O0):
define void @OLED_locate(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = mul nsw i32 32, %6
%8 = load i32, i32* %4
%9 = add nsw i32 %7, %8
store i32 %9, i32* %5
%10 = load i32, i32* %5
%11 = add nsw i32 128, %10
%12 = call i32 @OLED_wrcmd(i32 %11)
%13 = call i32 @CMT1_delay_10us(i32 4)
ret void
}

LLVM IR (-O2):
define void @OLED_locate(i32 %0, i32 %1) {
%3 = shl nsw i32 %0, 5
%4 = add i32 %1, 128
%5 = add i32 %4, %3
%6 = tail call i32 @OLED_wrcmd(i32 %5)
%7 = tail call i32 @CMT1_delay_10us(i32 4)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint64_t;
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ r;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ const *,
                          int);
uint64_t util_getUINT32(const uint8_t *buf) {
  uint32_t r;
  memcpy(&r, buf, sizeof(r));
  return (uint64_t)r;
}


x86 assembly (clang, -O0):
<util_getUINT32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<util_getUINT32>:
push   %rax
mov    %rdi,%rsi
lea    0x4(%rsp),%rdi
mov    $0x4,%edx
call   1030 <memcpy@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @util_getUINT32(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @memcpy(i32* %3, i32* %4, i32 4)
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @util_getUINT32(i32* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @memcpy(i32* %2, i32* %0, i32 4)
%5 = load i32, i32* %2
ret i32 %5
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;

/* Variables and functions */
int /*<<< orphan*/ abort();
int setresuid(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int set_uids(uid_t ruid, uid_t euid, uid_t suid) {
  if ((setresuid(ruid, euid, suid)) == -1)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<set_uids>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
call   1040 <setresuid@plt>
cmp    $0xffffffff,%eax
jne    114f <set_uids+0x2f>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_uids>:
push   %rax
call   1040 <setresuid@plt>
cmp    $0xffffffff,%eax
je     112f <set_uids+0xf>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @set_uids(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @setresuid(i32 %7, i32 %8, i32 %9)
%11 = icmp eq i32 %10, -1
br i1 %11, label %12, label %14
12: ; preds = %3
%13 = call i32 (...) @abort()
unreachable
14: ; preds = %3
ret i32 0
}

LLVM IR (-O2):
define i32 @set_uids(i32 %0, i32 %1, i32 %2) {
%4 = tail call i32 @setresuid(i32 %0, i32 %1, i32 %2)
%5 = icmp eq i32 %4, -1
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 (...) @abort()
unreachable
8: ; preds = %3
ret i32 0
}
int mlx5_fpga_device_start(struct mlx5_core_dev *mdev) { return 0; }


x86 assembly (clang, -O0):
<mlx5_fpga_device_start>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mlx5_fpga_device_start>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.mlx5_core_dev = type opaque
define i32 @mlx5_fpga_device_start(%struct.mlx5_core_dev* %0) {
%2 = alloca %struct.mlx5_core_dev*
store %struct.mlx5_core_dev* %0, %struct.mlx5_core_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.mlx5_core_dev = type opaque
define i32 @mlx5_fpga_device_start(%struct.mlx5_core_dev* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ stoogesort_rec(int *, int /*<<< orphan*/, size_t);
void stoogesort(int *a, size_t n) {
  if (n == 0)
    return;
  stoogesort_rec(a, 0, n - 1);
}


x86 assembly (clang, -O0):
<stoogesort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1130 <stoogesort+0x20>
jmp    1143 <stoogesort+0x33>
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
sub    $0x1,%rdx
xor    %esi,%esi
call   1030 <stoogesort_rec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stoogesort>:
test   %rsi,%rsi
je     1123 <stoogesort+0x13>
mov    %rsi,%rdx
add    $0xffffffffffffffff,%rdx
xor    %esi,%esi
jmp    1030 <stoogesort_rec@plt>
ret

LLVM IR (-O0):
define void @stoogesort(i32* %0, i64 %1) {
%3 = alloca i32*
%4 = alloca i64
store i32* %0, i32** %3
store i64 %1, i64* %4
%5 = load i64, i64* %4
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %2
br label %13
8: ; preds = %2
%9 = load i32*, i32** %3
%10 = load i64, i64* %4
%11 = sub i64 %10, 1
%12 = call i32 @stoogesort_rec(i32* %9, i32 0, i64 %11)
br label %13
13: ; preds = %8, %7
ret void
}

LLVM IR (-O2):
define void @stoogesort(i32* %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = add i64 %1, -1
%6 = tail call i32 @stoogesort_rec(i32* %0, i32 0, i64 %5)
br label %7
7: ; preds = %2, %4
ret void
}
void main() {
  int *x;
  x = 0;
  return;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movq   $0x0,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
ret

LLVM IR (-O0):
define void @main() {
%1 = alloca i32*
store i32* null, i32** %1
ret void
}

LLVM IR (-O2):
define void @main() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ input_line;

/* Variables and functions */
int /*<<< orphan*/ fgets(char *, int, int /*<<< orphan*/);
int /*<<< orphan*/ sscanf(char *, char *, int *);
int /*<<< orphan*/ stdin;
int __get_input__() {
  int input = 0;
  char input_line[256];
  fgets(input_line, sizeof(input_line), stdin);
  sscanf(input_line, "%d", &input);
  return input;
}


x86 assembly (clang, -O0):
<__get_input__>:
push   %rbp
mov    %rsp,%rbp
sub    $0x110,%rsp
movl   $0x0,-0x4(%rbp)
lea    -0x110(%rbp),%rdi
mov    0x2ea8(%rip),%rax
mov    (%rax),%edx
mov    $0x100,%esi
call   1030 <fgets@plt>
lea    -0x110(%rbp),%rdi
lea    0xea6(%rip),%rsi
lea    -0x4(%rbp),%rdx
call   1040 <sscanf@plt>
mov    -0x4(%rbp),%eax
add    $0x110,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__get_input__>:
push   %rbx
sub    $0x110,%rsp
movl   $0x0,0xc(%rsp)
mov    0x2eb1(%rip),%rax
mov    (%rax),%edx
lea    0x10(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x100,%esi
call   1030 <fgets@plt>
lea    0xeae(%rip),%rsi
lea    0xc(%rsp),%rdx
mov    %rbx,%rdi
call   1040 <sscanf@plt>
mov    0xc(%rsp),%eax
add    $0x110,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@stdin = global i32 0
@.str = [3 x i8] c"%d\00"
define i32 @__get_input__() {
%1 = alloca i32
%2 = alloca [256 x i8]
store i32 0, i32* %1
%3 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%4 = load i32, i32* @stdin
%5 = call i32 @fgets(i8* %3, i32 256, i32 %4)
%6 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%7 = call i32 @sscanf(i8* %6, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%8 = load i32, i32* %1
ret i32 %8
}

LLVM IR (-O2):
@stdin = global i32 0
@.str = [3 x i8] c"%d\00"
define i32 @__get_input__() {
%1 = alloca i32
%2 = alloca [256 x i8]
%3 = bitcast i32* %1 to i8*
store i32 0, i32* %1
%4 = getelementptr inbounds [256 x i8], [256 x i8]* %2, i64 0, i64 0
%5 = load i32, i32* @stdin
%6 = call i32 @fgets(i8* %4, i32 256, i32 %5)
%7 = call i32 @sscanf(i8* %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%8 = load i32, i32* %1
ret i32 %8
}
/* Type definitions */
typedef unsigned int time_t;

/* Variables and functions */
int /*<<< orphan*/ srand(unsigned int);
scalar_t__ time(unsigned int *);
void myrand() {
  time_t agora;
  agora = (unsigned)time(&agora);
  srand(agora);
}


x86 assembly (clang, -O0):
<myrand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    -0x4(%rbp),%rdi
call   1040 <time@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <srand@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<myrand>:
push   %rax
lea    0x4(%rsp),%rdi
call   1040 <time@plt>
mov    %eax,0x4(%rsp)
mov    %eax,%edi
call   1030 <srand@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @myrand() {
%1 = alloca i32
%2 = call i64 @time(i32* %1)
%3 = trunc i64 %2 to i32
store i32 %3, i32* %1
%4 = load i32, i32* %1
%5 = call i32 @srand(i32 %4)
ret void
}

LLVM IR (-O2):
define void @myrand() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i64 @time(i32* %1)
%4 = trunc i64 %3 to i32
store i32 %4, i32* %1
%5 = call i32 @srand(i32 %4)
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ memcpy(void *, void const *, size_t);
int strlen(char const *);
char *strdup(const char *s) {
  char *buf;
  size_t len;
  len = strlen(s) + 1;
  buf = (char *)malloc(sizeof(char) * len);
  if (buf != NULL)
    memcpy((void *)buf, (const void *)s, len);
  return (buf);
}


x86 assembly (clang, -O0):
<strdup>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
shl    $0x0,%rax
mov    %eax,%edi
call   1050 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     117d <strdup+0x4d>
mov    -0x10(%rbp),%rdi
mov    -0x8(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1040 <memcpy@plt>
mov    -0x10(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strdup>:
push   %rbp
push   %r14
push   %rbx
mov    %rdi,%r14
call   1030 <strlen@plt>
mov    %eax,%ebp
add    $0x1,%ebp
mov    %ebp,%edi
call   1050 <malloc@plt>
mov    %rax,%rbx
test   %rax,%rax
je     115e <strdup+0x2e>
movslq %ebp,%rdx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <memcpy@plt>
mov    %rbx,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i8* @strdup(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %2
%5 = load i8*, i8** %2
%6 = call i32 @strlen(i8* %5)
%7 = add nsw i32 %6, 1
%8 = sext i32 %7 to i64
store i64 %8, i64* %4
%9 = load i64, i64* %4
%10 = mul i64 1, %9
%11 = trunc i64 %10 to i32
%12 = call i64 @malloc(i32 %11)
%13 = inttoptr i64 %12 to i8*
store i8* %13, i8** %3
%14 = load i8*, i8** %3
%15 = icmp ne i8* %14, null
br i1 %15, label %16, label %21
16: ; preds = %1
%17 = load i8*, i8** %3
%18 = load i8*, i8** %2
%19 = load i64, i64* %4
%20 = call i32 @memcpy(i8* %17, i8* %18, i64 %19)
br label %21
21: ; preds = %16, %1
%22 = load i8*, i8** %3
ret i8* %22
}

LLVM IR (-O2):
define i8* @strdup(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = add nsw i32 %2, 1
%4 = tail call i64 @malloc(i32 %3)
%5 = inttoptr i64 %4 to i8*
%6 = icmp eq i64 %4, 0
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = sext i32 %3 to i64
%9 = tail call i32 @memcpy(i8* %5, i8* %0, i64 %8)
br label %10
10: ; preds = %7, %1
ret i8* %5
}
/* Variables and functions */
int /*<<< orphan*/ Platform_Halt(int);
int errno;
scalar_t__ lseek(long long, long long, int);
int Platform_Seek(long long h, long long offset, int whence) {
  int _o_result;
  if (lseek(h, offset, whence) < 0) {
    _o_result = errno;
    return _o_result;
  } else {
    _o_result = 0;
    return _o_result;
  }
__retchk:
  Platform_Halt(-3);
  return 0;
  ;
}


x86 assembly (clang, -O0):
<Platform_Seek>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x1c(%rbp),%edx
call   1030 <lseek@plt>
cmp    $0x0,%rax
jge    1154 <Platform_Seek+0x44>
mov    0x2e9c(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1161 <Platform_Seek+0x51>
movl   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Platform_Seek>:
push   %rax
call   1030 <lseek@plt>
mov    0x2ec3(%rip),%rcx
sar    $0x3f,%rax
and    (%rcx),%eax
pop    %rcx
ret

LLVM IR (-O0):
@errno = global i32 0
define i32 @Platform_Seek(i64 %0, i64 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca i64
%7 = alloca i32
%8 = alloca i32
store i64 %0, i64* %5
store i64 %1, i64* %6
store i32 %2, i32* %7
%9 = load i64, i64* %5
%10 = load i64, i64* %6
%11 = load i32, i32* %7
%12 = call i64 @lseek(i64 %9, i64 %10, i32 %11)
%13 = icmp slt i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i32, i32* @errno
store i32 %15, i32* %8
%16 = load i32, i32* %8
store i32 %16, i32* %4
br label %21
17: ; preds = %3
store i32 0, i32* %8
%18 = load i32, i32* %8
store i32 %18, i32* %4
br label %21
19: ; No predecessors!
%20 = call i32 @Platform_Halt(i32 -3)
store i32 0, i32* %4
br label %21
21: ; preds = %19, %17, %14
%22 = load i32, i32* %4
ret i32 %22
}

LLVM IR (-O2):
@errno = global i32 0
define i32 @Platform_Seek(i64 %0, i64 %1, i32 %2) {
%4 = tail call i64 @lseek(i64 %0, i64 %1, i32 %2)
%5 = icmp slt i64 %4, 0
%6 = load i32, i32* @errno
%7 = select i1 %5, i32 %6, i32 0
ret i32 %7
}
unsigned xrop3_212_1_0(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  unsigned stk3;
  stk2 = S ^ T;
  stk3 = T ^ D;
  stk2 = stk2 & stk3;
  stk1 = S ^ stk2;
  return (stk1 & (~S)) | (D & S);
}


x86 assembly (clang, -O0):
<xrop3_212_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x10(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    -0x8(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
and    -0x1c(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_212_1_0>:
mov    %edi,%eax
shl    $0x8,%eax
or     %edi,%eax
mov    %esi,%ecx
shl    $0x8,%ecx
or     %esi,%ecx
mov    %ecx,%edx
xor    $0xff,%edx
not    %eax
and    %edx,%eax
and    %ecx,%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_212_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%11 = load i8, i8* %3
%12 = zext i8 %11 to i32
%13 = shl i32 %12, 8
%14 = load i8, i8* %3
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
store i32 %16, i32* %6
%17 = load i8, i8* %4
%18 = zext i8 %17 to i32
%19 = shl i32 %18, 8
%20 = load i8, i8* %4
%21 = zext i8 %20 to i32
%22 = or i32 %19, %21
store i32 %22, i32* %7
%23 = load i32, i32* %6
%24 = load i32, i32* %7
%25 = xor i32 %23, %24
store i32 %25, i32* %9
%26 = load i32, i32* %7
%27 = load i32, i32* %5
%28 = xor i32 %26, %27
store i32 %28, i32* %10
%29 = load i32, i32* %9
%30 = load i32, i32* %10
%31 = and i32 %29, %30
store i32 %31, i32* %9
%32 = load i32, i32* %6
%33 = load i32, i32* %9
%34 = xor i32 %32, %33
store i32 %34, i32* %8
%35 = load i32, i32* %8
%36 = load i32, i32* %6
%37 = xor i32 %36, -1
%38 = and i32 %35, %37
%39 = load i32, i32* %5
%40 = load i32, i32* %6
%41 = and i32 %39, %40
%42 = or i32 %38, %41
ret i32 %42
}

LLVM IR (-O2):
define i32 @xrop3_212_1_0(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = xor i32 %6, 255
%8 = xor i32 %4, -1
%9 = and i32 %7, %8
%10 = and i32 %9, %6
%11 = or i32 %10, %3
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ test1();
int /*<<< orphan*/ test2();
int /*<<< orphan*/ test3();
int /*<<< orphan*/ test4();
int /*<<< orphan*/ test5();
int /*<<< orphan*/ test6();
int /*<<< orphan*/ test7();
int /*<<< orphan*/ test8();
int main(int argc, char *argv[]) {
  test1();
  test2();
  test3();
  test4();
  test5();
  test6();
  test7();
  test8();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1060 <test1@plt>
mov    $0x0,%al
call   1090 <test2@plt>
mov    $0x0,%al
call   1050 <test3@plt>
mov    $0x0,%al
call   1080 <test4@plt>
mov    $0x0,%al
call   1040 <test5@plt>
mov    $0x0,%al
call   1070 <test6@plt>
mov    $0x0,%al
call   1030 <test7@plt>
mov    $0x0,%al
call   10a0 <test8@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1060 <test1@plt>
xor    %eax,%eax
call   1090 <test2@plt>
xor    %eax,%eax
call   1050 <test3@plt>
xor    %eax,%eax
call   1080 <test4@plt>
xor    %eax,%eax
call   1040 <test5@plt>
xor    %eax,%eax
call   1070 <test6@plt>
xor    %eax,%eax
call   1030 <test7@plt>
xor    %eax,%eax
call   10a0 <test8@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = call i32 (...) @test1()
%6 = call i32 (...) @test2()
%7 = call i32 (...) @test3()
%8 = call i32 (...) @test4()
%9 = call i32 (...) @test5()
%10 = call i32 (...) @test6()
%11 = call i32 (...) @test7()
%12 = call i32 (...) @test8()
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test1()
%4 = tail call i32 (...) @test2()
%5 = tail call i32 (...) @test3()
%6 = tail call i32 (...) @test4()
%7 = tail call i32 (...) @test5()
%8 = tail call i32 (...) @test6()
%9 = tail call i32 (...) @test7()
%10 = tail call i32 (...) @test8()
ret i32 0
}
/* Variables and functions */
double errcheck(int /*<<< orphan*/, char *);
int /*<<< orphan*/ log10(double);
double Log10(double *args) { return errcheck(log10(*args), "log10"); }


x86 assembly (clang, -O0):
<Log10>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
call   1040 <log10@plt>
mov    %eax,%edi
lea    0xebe(%rip),%rsi
call   1030 <errcheck@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Log10>:
push   %rax
movsd  (%rdi),%xmm0
call   1040 <log10@plt>
lea    0xecf(%rip),%rsi
mov    %eax,%edi
pop    %rax
jmp    1030 <errcheck@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"log10\00"
define double @Log10(double* %0) {
%2 = alloca double*
store double* %0, double** %2
%3 = load double*, double** %2
%4 = load double, double* %3
%5 = call i32 @log10(double %4)
%6 = call double @errcheck(i32 %5, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret double %6
}

LLVM IR (-O2):
@.str = [6 x i8] c"log10\00"
define double @Log10(double* nocapture %0) {
%2 = load double, double* %0
%3 = tail call i32 @log10(double %2)
%4 = tail call double @errcheck(i32 %3, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret double %4
}