char HWL_GPIO_PULLUP(unsigned char pin, unsigned char set) {
  unsigned char *reg = (unsigned char *)(0xF7C);
  if (pin >= 8 && pin <= 8 + 7) {
    if (set) {
      *(reg) = ((*reg) | (((unsigned char)0x01) << (pin % 8)));
    } else {
      *(reg) = ((*reg) & (unsigned char)(~(0x01 << (pin % 8))));
    }
    reg = (unsigned char *)(0xFF1);
    *(reg) = ((*reg) & (((unsigned char)0x01) << 7));
    return 0;
  }
  return -1;
}


x86 assembly (clang, -O0):
<HWL_GPIO_PULLUP>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x2(%rbp)
mov    %al,-0x3(%rbp)
mov    $0xf7c,%eax
mov    %rax,-0x10(%rbp)
movzbl -0x2(%rbp),%eax
cmp    $0x8,%eax
jl     11ca <HWL_GPIO_PULLUP+0xca>
movzbl -0x2(%rbp),%eax
cmp    $0xf,%eax
jg     11ca <HWL_GPIO_PULLUP+0xca>
cmpb   $0x0,-0x3(%rbp)
je     1170 <HWL_GPIO_PULLUP+0x70>
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x14(%rbp)
movzbl -0x2(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x14(%rbp),%eax
mov    %edx,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
jmp    11a4 <HWL_GPIO_PULLUP+0xa4>
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
mov    %eax,-0x18(%rbp)
movzbl -0x2(%rbp),%eax
mov    $0x8,%ecx
cltd
idiv   %ecx
mov    -0x18(%rbp),%eax
mov    %edx,%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
xor    $0xffffffff,%ecx
movzbl %cl,%ecx
and    %ecx,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
mov    $0xff1,%eax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movzbl (%rax),%eax
and    $0x80,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %cl,(%rax)
movb   $0x0,-0x1(%rbp)
jmp    11ce <HWL_GPIO_PULLUP+0xce>
movb   $0xff,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HWL_GPIO_PULLUP>:
mov    %edi,%ecx
and    $0xf8,%cl
mov    $0xff,%al
cmp    $0x8,%cl
jne    1146 <HWL_GPIO_PULLUP+0x46>
mov    0xf7c,%r8b
mov    %edi,%ecx
and    $0x7,%cl
mov    $0x1,%dl
shl    %cl,%dl
mov    $0xfe,%al
mov    %edi,%ecx
rol    %cl,%al
or     %r8b,%dl
and    %r8b,%al
test   %sil,%sil
movzbl %al,%eax
movzbl %dl,%ecx
cmove  %eax,%ecx
mov    %cl,0xf7c
andb   $0x80,0xff1
80
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i8 @HWL_GPIO_PULLUP(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i8
%6 = alloca i8*
store i8 %0, i8* %4
store i8 %1, i8* %5
store i8* inttoptr (i64 3964 to i8*), i8** %6
%7 = load i8, i8* %4
%8 = zext i8 %7 to i32
%9 = icmp sge i32 %8, 8
br i1 %9, label %10, label %49
10: ; preds = %2
%11 = load i8, i8* %4
%12 = zext i8 %11 to i32
%13 = icmp sle i32 %12, 15
br i1 %13, label %14, label %49
14: ; preds = %10
%15 = load i8, i8* %5
%16 = icmp ne i8 %15, 0
br i1 %16, label %17, label %28
17: ; preds = %14
%18 = load i8*, i8** %6
%19 = load i8, i8* %18
%20 = zext i8 %19 to i32
%21 = load i8, i8* %4
%22 = zext i8 %21 to i32
%23 = srem i32 %22, 8
%24 = shl i32 1, %23
%25 = or i32 %20, %24
%26 = trunc i32 %25 to i8
%27 = load i8*, i8** %6
store i8 %26, i8* %27
br label %42
28: ; preds = %14
%29 = load i8*, i8** %6
%30 = load i8, i8* %29
%31 = zext i8 %30 to i32
%32 = load i8, i8* %4
%33 = zext i8 %32 to i32
%34 = srem i32 %33, 8
%35 = shl i32 1, %34
%36 = xor i32 %35, -1
%37 = trunc i32 %36 to i8
%38 = zext i8 %37 to i32
%39 = and i32 %31, %38
%40 = trunc i32 %39 to i8
%41 = load i8*, i8** %6
store i8 %40, i8* %41
br label %42
42: ; preds = %28, %17
store i8* inttoptr (i64 4081 to i8*), i8** %6
%43 = load i8*, i8** %6
%44 = load i8, i8* %43
%45 = zext i8 %44 to i32
%46 = and i32 %45, 128
%47 = trunc i32 %46 to i8
%48 = load i8*, i8** %6
store i8 %47, i8* %48
store i8 0, i8* %3
br label %50
49: ; preds = %10, %2
store i8 -1, i8* %3
br label %50
50: ; preds = %49, %42
%51 = load i8, i8* %3
ret i8 %51
}

LLVM IR (-O2):
define signext i8 @HWL_GPIO_PULLUP(i8 zeroext %0, i8 zeroext %1) {
%3 = and i8 %0, -8
%4 = icmp eq i8 %3, 8
br i1 %4, label %5, label %16
5: ; preds = %2
%6 = icmp eq i8 %1, 0
%7 = load i8, i8* inttoptr (i64 3964 to i8*)
%8 = and i8 %0, 7
%9 = shl nuw i8 1, %8
%10 = or i8 %7, %9
%11 = xor i8 %9, -1
%12 = and i8 %7, %11
%13 = select i1 %6, i8 %12, i8 %10
store i8 %13, i8* inttoptr (i64 3964 to i8*)
%14 = load i8, i8* inttoptr (i64 4081 to i8*)
%15 = and i8 %14, -128
store i8 %15, i8* inttoptr (i64 4081 to i8*)
br label %16
16: ; preds = %2, %5
%17 = phi i8 [ 0, %5 ], [ -1, %2 ]
ret i8 %17
}