xunge/DecIR huggingface dataset:
unsigned long gt_rmq_microblock(unsigned long idx) { return ((idx) >> 3); }


x86 assembly (clang, -O0):
<gt_rmq_microblock>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x3,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gt_rmq_microblock>:
mov    %rdi,%rax
shr    $0x3,%rax
ret

LLVM IR (-O0):
define i64 @gt_rmq_microblock(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 3
ret i64 %4
}

LLVM IR (-O2):
define i64 @gt_rmq_microblock(i64 %0) {
%2 = lshr i64 %0, 3
ret i64 %2
}
void goodSuffixHeuristic() {}


x86 assembly (clang, -O0):
<goodSuffixHeuristic>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<goodSuffixHeuristic>:
ret

LLVM IR (-O0):
define void @goodSuffixHeuristic() {
ret void
}

LLVM IR (-O2):
define void @goodSuffixHeuristic() {
ret void
}
/* Type definitions */
struct timeval {
  long tv_sec;
  long tv_usec;
};

/* Variables and functions */
void wfa_double2timeval(struct timeval *tval, double dval) {
  tval->tv_sec = (long int)dval;
  tval->tv_usec = (long int)((dval - tval->tv_sec) * 1000000);
}


x86 assembly (clang, -O0):
<wfa_double2timeval>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
cvttsd2si -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
movsd  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
cvtsi2sdq (%rax),%xmm1
subsd  %xmm1,%xmm0
movsd  0xecc(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvttsd2si %xmm0,%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wfa_double2timeval>:
cvttsd2si %xmm0,%rax
cvtsi2sd %rax,%xmm1
subsd  %xmm1,%xmm0
mulsd  0xeea(%rip),%xmm0
mov    %rax,(%rdi)
cvttsd2si %xmm0,%rax
mov    %rax,0x8(%rdi)
ret

LLVM IR (-O0):
%struct.timeval = type { i64, i64 }
define void @wfa_double2timeval(%struct.timeval* %0, double %1) {
%3 = alloca %struct.timeval*
%4 = alloca double
store %struct.timeval* %0, %struct.timeval** %3
store double %1, double* %4
%5 = load double, double* %4
%6 = fptosi double %5 to i64
%7 = load %struct.timeval*, %struct.timeval** %3
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %7, i32 0, i32 0
store i64 %6, i64* %8
%9 = load double, double* %4
%10 = load %struct.timeval*, %struct.timeval** %3
%11 = getelementptr inbounds %struct.timeval, %struct.timeval* %10, i32 0, i32 0
%12 = load i64, i64* %11
%13 = sitofp i64 %12 to double
%14 = fsub double %9, %13
%15 = fmul double %14, 1.000000e+06
%16 = fptosi double %15 to i64
%17 = load %struct.timeval*, %struct.timeval** %3
%18 = getelementptr inbounds %struct.timeval, %struct.timeval* %17, i32 0, i32 1
store i64 %16, i64* %18
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i64, i64 }
define void @wfa_double2timeval(%struct.timeval* nocapture writeonly %0, double %1) {
%3 = fptosi double %1 to i64
%4 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 0
store i64 %3, i64* %4
%5 = sitofp i64 %3 to double
%6 = fsub double %1, %5
%7 = fmul double %6, 1.000000e+06
%8 = fptosi double %7 to i64
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %0, i64 0, i32 1
store i64 %8, i64* %9
ret void
}
/* Type definitions */
struct timeval {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int gettimeofday(struct timeval *__p, void *__tz) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<gettimeofday>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettimeofday>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
%struct.timeval = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @gettimeofday(%struct.timeval* %0, i8* %1) {
%3 = alloca %struct.timeval*
%4 = alloca i8*
store %struct.timeval* %0, %struct.timeval** %3
store i8* %1, i8** %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @gettimeofday(%struct.timeval* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
char num2hex(char c) {
  if (c < 10)
    return '0' + c;
  return 'a' + c - 10;
}


x86 assembly (clang, -O0):
<num2hex>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
cmp    $0xa,%eax
jge    1126 <num2hex+0x26>
movsbl -0x2(%rbp),%eax
add    $0x30,%eax
mov    %al,-0x1(%rbp)
jmp    1133 <num2hex+0x33>
movsbl -0x2(%rbp),%eax
add    $0x61,%eax
sub    $0xa,%eax
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<num2hex>:
cmp    $0xa,%dil
mov    $0x30,%ecx
mov    $0x57,%eax
cmovl  %ecx,%eax
add    %dil,%al
ret

LLVM IR (-O0):
define signext i8 @num2hex(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp slt i32 %5, 10
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = add nsw i32 48, %9
%11 = trunc i32 %10 to i8
store i8 %11, i8* %2
br label %18
12: ; preds = %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = add nsw i32 97, %14
%16 = sub nsw i32 %15, 10
%17 = trunc i32 %16 to i8
store i8 %17, i8* %2
br label %18
18: ; preds = %12, %7
%19 = load i8, i8* %2
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @num2hex(i8 signext %0) {
%2 = icmp slt i8 %0, 10
%3 = select i1 %2, i8 48, i8 87
%4 = add i8 %3, %0
ret i8 %4
}
double estLog(double N) {
  double logN = 1;
  double x = 10;
  while (N > x) {
    logN += 1;
    x *= 10;
  }
  return logN;
}


x86 assembly (clang, -O0):
<estLog>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xef7(%rip),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xee2(%rip),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    115c <estLog+0x5c>
movsd  0xecd(%rip),%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  0xeb3(%rip),%xmm0
mulsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    1123 <estLog+0x23>
movsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<estLog>:
ucomisd 0xf00(%rip),%xmm0
jbe    1143 <estLog+0x43>
movsd  0xeee(%rip),%xmm2
movsd  0xeee(%rip),%xmm3
movapd %xmm3,%xmm4
movapd %xmm2,%xmm1
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
addsd  %xmm2,%xmm1
mulsd  %xmm3,%xmm4
ucomisd %xmm4,%xmm0
ja     1130 <estLog+0x30>
movapd %xmm1,%xmm0
ret
movsd  0xeb5(%rip),%xmm0
ret

LLVM IR (-O0):
define double @estLog(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca double
store double %0, double* %2
store double 1.000000e+00, double* %3
store double 1.000000e+01, double* %4
br label %5
5: ; preds = %9, %1
%6 = load double, double* %2
%7 = load double, double* %4
%8 = fcmp ogt double %6, %7
br i1 %8, label %9, label %14
9: ; preds = %5
%10 = load double, double* %3
%11 = fadd double %10, 1.000000e+00
store double %11, double* %3
%12 = load double, double* %4
%13 = fmul double %12, 1.000000e+01
store double %13, double* %4
br label %5
14: ; preds = %5
%15 = load double, double* %3
ret double %15
}

LLVM IR (-O2):
define double @estLog(double %0) {
%2 = fcmp ogt double %0, 1.000000e+01
br i1 %2, label %3, label %9
3: ; preds = %1, %3
%4 = phi double [ %7, %3 ], [ 1.000000e+01, %1 ]
%5 = phi double [ %6, %3 ], [ 1.000000e+00, %1 ]
%6 = fadd double %5, 1.000000e+00
%7 = fmul double %4, 1.000000e+01
%8 = fcmp olt double %7, %0
br i1 %8, label %3, label %9
9: ; preds = %3, %1
%10 = phi double [ 1.000000e+00, %1 ], [ %6, %3 ]
ret double %10
}
/* Type definitions */
typedef scalar_t__ uint8_t;
typedef int uint32_t;

/* Variables and functions */
uint32_t rm32(const uint8_t a[4]) {
  uint32_t x;
  x = (uint32_t)a[0] << 24;
  x |= (uint32_t)a[1] << 16;
  x |= (uint32_t)a[2] << 8;
  x |= (uint32_t)a[3] << 0;
  return x;
}


x86 assembly (clang, -O0):
<rm32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
shl    $0x18,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rax
shl    $0x10,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x10(%rax),%rax
shl    $0x8,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%rax
shl    $0x0,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rm32>:
mov    (%rdi),%eax
mov    0x8(%rdi),%ecx
shl    $0x18,%eax
shl    $0x10,%ecx
or     %eax,%ecx
mov    0x10(%rdi),%eax
shl    $0x8,%eax
or     %ecx,%eax
or     0x18(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @rm32(i64* %0) {
%2 = alloca i64*
%3 = alloca i32
store i64* %0, i64** %2
%4 = load i64*, i64** %2
%5 = getelementptr inbounds i64, i64* %4, i64 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
%8 = shl i32 %7, 24
store i32 %8, i32* %3
%9 = load i64*, i64** %2
%10 = getelementptr inbounds i64, i64* %9, i64 1
%11 = load i64, i64* %10
%12 = trunc i64 %11 to i32
%13 = shl i32 %12, 16
%14 = load i32, i32* %3
%15 = or i32 %14, %13
store i32 %15, i32* %3
%16 = load i64*, i64** %2
%17 = getelementptr inbounds i64, i64* %16, i64 2
%18 = load i64, i64* %17
%19 = trunc i64 %18 to i32
%20 = shl i32 %19, 8
%21 = load i32, i32* %3
%22 = or i32 %21, %20
store i32 %22, i32* %3
%23 = load i64*, i64** %2
%24 = getelementptr inbounds i64, i64* %23, i64 3
%25 = load i64, i64* %24
%26 = trunc i64 %25 to i32
%27 = shl i32 %26, 0
%28 = load i32, i32* %3
%29 = or i32 %28, %27
store i32 %29, i32* %3
%30 = load i32, i32* %3
ret i32 %30
}

LLVM IR (-O2):
define i32 @rm32(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = trunc i64 %2 to i32
%4 = shl i32 %3, 24
%5 = getelementptr inbounds i64, i64* %0, i64 1
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
%8 = shl i32 %7, 16
%9 = or i32 %8, %4
%10 = getelementptr inbounds i64, i64* %0, i64 2
%11 = load i64, i64* %10
%12 = trunc i64 %11 to i32
%13 = shl i32 %12, 8
%14 = or i32 %9, %13
%15 = getelementptr inbounds i64, i64* %0, i64 3
%16 = load i64, i64* %15
%17 = trunc i64 %16 to i32
%18 = or i32 %14, %17
ret i32 %18
}
/* Variables and functions */
void _out_buffer(char character, void *buffer, size_t idx, size_t maxlen) {
  if (idx < maxlen) {
    ((char *)buffer)[idx] = character;
  }
}


x86 assembly (clang, -O0):
<_out_buffer>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    1132 <_out_buffer+0x32>
mov    -0x1(%rbp),%dl
mov    -0x10(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_out_buffer>:
cmp    %rcx,%rdx
jae    1109 <_out_buffer+0x9>
mov    %dil,(%rsi,%rdx,1)
ret

LLVM IR (-O0):
define void @_out_buffer(i8 signext %0, i8* %1, i64 %2, i64 %3) {
%5 = alloca i8
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
store i8 %0, i8* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %7
%10 = load i64, i64* %8
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %17
12: ; preds = %4
%13 = load i8, i8* %5
%14 = load i8*, i8** %6
%15 = load i64, i64* %7
%16 = getelementptr inbounds i8, i8* %14, i64 %15
store i8 %13, i8* %16
br label %17
17: ; preds = %12, %4
ret void
}

LLVM IR (-O2):
define void @_out_buffer(i8 signext %0, i8* nocapture writeonly %1, i64 %2, i64 %3) {
%5 = icmp ult i64 %2, %3
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = getelementptr inbounds i8, i8* %1, i64 %2
store i8 %0, i8* %7
br label %8
8: ; preds = %6, %4
ret void
}
long __ecm_realtime() { return 0L; }


x86 assembly (clang, -O0):
<__ecm_realtime>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__ecm_realtime>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @__ecm_realtime() {
ret i64 0
}

LLVM IR (-O2):
define i64 @__ecm_realtime() {
ret i64 0
}
void g_dir_read_name() {}


x86 assembly (clang, -O0):
<g_dir_read_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_dir_read_name>:
ret

LLVM IR (-O0):
define void @g_dir_read_name() {
ret void
}

LLVM IR (-O2):
define void @g_dir_read_name() {
ret void
}
/* Variables and functions */
int to_fixnum_rep(int);
void fill_vec_with_fixnum(int *v, int len) {
  int i = 0;
  for (i = 0; i < len; i++) {
    v[i] = to_fixnum_rep(v[i]);
  }
}


x86 assembly (clang, -O0):
<fill_vec_with_fixnum>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1164 <fill_vec_with_fixnum+0x54>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edi
call   1030 <to_fixnum_rep@plt>
mov    %eax,%edx
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    112d <fill_vec_with_fixnum+0x1d>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_vec_with_fixnum>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
jle    1146 <fill_vec_with_fixnum+0x36>
mov    %rdi,%r15
mov    %esi,%r14d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%edi
call   1030 <to_fixnum_rep@plt>
mov    %eax,(%r15,%rbx,4)
add    $0x1,%rbx
cmp    %rbx,%r14
jne    1130 <fill_vec_with_fixnum+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @fill_vec_with_fixnum(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
store i32 0, i32* %5
br label %6
6: ; preds = %21, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %24
10: ; preds = %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 @to_fixnum_rep(i32 %15)
%17 = load i32*, i32** %3
%18 = load i32, i32* %5
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, i32* %17, i64 %19
store i32 %16, i32* %20
br label %21
21: ; preds = %10
%22 = load i32, i32* %5
%23 = add nsw i32 %22, 1
store i32 %23, i32* %5
br label %6
24: ; preds = %6
ret void
}

LLVM IR (-O2):
define void @fill_vec_with_fixnum(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 @to_fixnum_rep(i32 %9)
store i32 %10, i32* %8
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
ret void
}
void setBit(unsigned char *A, unsigned int b, char val) {
  val ? (A[b / 8] |= 1 << (b % 8)) : (A[b / 8] &= ~(1 << (b % 8)));
}


x86 assembly (clang, -O0):
<setBit>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %al,-0xd(%rbp)
movsbl -0xd(%rbp),%eax
cmp    $0x0,%eax
je     1149 <setBit+0x49>
mov    -0xc(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%esi
shl    %cl,%esi
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%eax
shr    $0x3,%eax
mov    %eax,%eax
mov    %eax,%edx
movzbl (%rcx,%rdx,1),%eax
or     %esi,%eax
mov    %al,(%rcx,%rdx,1)
movzbl %al,%eax
jmp    1173 <setBit+0x73>
mov    -0xc(%rbp),%ecx
and    $0x7,%ecx
mov    $0x1,%esi
shl    %cl,%esi
xor    $0xffffffff,%esi
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%eax
shr    $0x3,%eax
mov    %eax,%eax
mov    %eax,%edx
movzbl (%rcx,%rdx,1),%eax
and    %esi,%eax
mov    %al,(%rcx,%rdx,1)
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<setBit>:
mov    %esi,%ecx
and    $0x7,%cl
mov    $0x1,%r8d
shl    %cl,%r8d
mov    %esi,%esi
shr    $0x3,%rsi
mov    (%rdi,%rsi,1),%cl
mov    %r8d,%eax
not    %al
and    %cl,%al
or     %r8b,%cl
test   %dl,%dl
movzbl %cl,%ecx
movzbl %al,%eax
cmovne %ecx,%eax
mov    %al,(%rdi,%rsi,1)
ret

LLVM IR (-O0):
define void @setBit(i8* %0, i32 %1, i8 signext %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8 %2, i8* %6
%7 = load i8, i8* %6
%8 = sext i8 %7 to i32
%9 = icmp ne i32 %8, 0
br i1 %9, label %10, label %24
10: ; preds = %3
%11 = load i32, i32* %5
%12 = urem i32 %11, 8
%13 = shl i32 1, %12
%14 = load i8*, i8** %4
%15 = load i32, i32* %5
%16 = udiv i32 %15, 8
%17 = zext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %14, i64 %17
%19 = load i8, i8* %18
%20 = zext i8 %19 to i32
%21 = or i32 %20, %13
%22 = trunc i32 %21 to i8
store i8 %22, i8* %18
%23 = zext i8 %22 to i32
br label %39
24: ; preds = %3
%25 = load i32, i32* %5
%26 = urem i32 %25, 8
%27 = shl i32 1, %26
%28 = xor i32 %27, -1
%29 = load i8*, i8** %4
%30 = load i32, i32* %5
%31 = udiv i32 %30, 8
%32 = zext i32 %31 to i64
%33 = getelementptr inbounds i8, i8* %29, i64 %32
%34 = load i8, i8* %33
%35 = zext i8 %34 to i32
%36 = and i32 %35, %28
%37 = trunc i32 %36 to i8
store i8 %37, i8* %33
%38 = zext i8 %37 to i32
br label %39
39: ; preds = %24, %10
%40 = phi i32 [ %23, %10 ], [ %38, %24 ]
ret void
}

LLVM IR (-O2):
define void @setBit(i8* nocapture %0, i32 %1, i8 signext %2) {
%4 = icmp eq i8 %2, 0
%5 = and i32 %1, 7
%6 = shl nuw nsw i32 1, %5
%7 = lshr i32 %1, 3
%8 = zext i32 %7 to i64
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = trunc i32 %6 to i8
%12 = xor i8 %11, -1
%13 = and i8 %10, %12
%14 = or i8 %10, %11
%15 = select i1 %4, i8 %13, i8 %14
store i8 %15, i8* %9
ret void
}
float SoftSpline3(float r) { return r * r * (3.0f - 2.0f * r); }


x86 assembly (clang, -O0):
<SoftSpline3>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mulss  -0x4(%rbp),%xmm0
movss  -0x4(%rbp),%xmm2
addss  %xmm2,%xmm2
movss  0xedc(%rip),%xmm1
subss  %xmm2,%xmm1
mulss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<SoftSpline3>:
movaps %xmm0,%xmm2
mulss  %xmm0,%xmm2
addss  %xmm0,%xmm0
movss  0xeed(%rip),%xmm1
subss  %xmm0,%xmm1
mulss  %xmm2,%xmm1
movaps %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @SoftSpline3(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = load float, float* %2
%5 = fmul float %3, %4
%6 = load float, float* %2
%7 = call float @llvm.fmuladd.f32(float -2.000000e+00, float %6, float 3.000000e+00)
%8 = fmul float %5, %7
ret float %8
}

LLVM IR (-O2):
define float @SoftSpline3(float %0) {
%2 = fmul float %0, %0
%3 = tail call float @llvm.fmuladd.f32(float %0, float -2.000000e+00, float 3.000000e+00)
%4 = fmul float %2, %3
ret float %4
}
/* Type definitions */
typedef scalar_t__ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ranged_random_modgolang(scalar_t__);
void loop_modgolang_linear(size_t count, uint32_t range, uint32_t *output) {
  for (size_t i = 0; i < count; i++) {
    *output++ = ranged_random_modgolang(range + i);
  }
}


x86 assembly (clang, -O0):
<loop_modgolang_linear>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movq   $0x0,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    116d <loop_modgolang_linear+0x5d>
mov    -0x10(%rbp),%rdi
add    -0x20(%rbp),%rdi
call   1030 <ranged_random_modgolang@plt>
movslq %eax,%rcx
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x8,%rdx
mov    %rdx,-0x18(%rbp)
mov    %rcx,(%rax)
mov    -0x20(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x20(%rbp)
jmp    112c <loop_modgolang_linear+0x1c>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<loop_modgolang_linear>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rdi,%rdi
je     1148 <loop_modgolang_linear+0x38>
mov    %rdx,%r14
mov    %rsi,%r15
mov    %rdi,%r12
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
lea    (%r15,%rbx,1),%rdi
call   1030 <ranged_random_modgolang@plt>
cltq
mov    %rax,(%r14,%rbx,8)
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <loop_modgolang_linear+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @loop_modgolang_linear(i64 %0, i64 %1, i64* %2) {
%4 = alloca i64
%5 = alloca i64
%6 = alloca i64*
%7 = alloca i64
store i64 %0, i64* %4
store i64 %1, i64* %5
store i64* %2, i64** %6
store i64 0, i64* %7
br label %8
8: ; preds = %20, %3
%9 = load i64, i64* %7
%10 = load i64, i64* %4
%11 = icmp ult i64 %9, %10
br i1 %11, label %12, label %23
12: ; preds = %8
%13 = load i64, i64* %5
%14 = load i64, i64* %7
%15 = add i64 %13, %14
%16 = call i32 @ranged_random_modgolang(i64 %15)
%17 = sext i32 %16 to i64
%18 = load i64*, i64** %6
%19 = getelementptr inbounds i64, i64* %18, i32 1
store i64* %19, i64** %6
store i64 %17, i64* %18
br label %20
20: ; preds = %12
%21 = load i64, i64* %7
%22 = add i64 %21, 1
store i64 %22, i64* %7
br label %8
23: ; preds = %8
ret void
}

LLVM IR (-O2):
define void @loop_modgolang_linear(i64 %0, i64 %1, i64* nocapture writeonly %2) {
%4 = icmp eq i64 %0, 0
br i1 %4, label %5, label %6
5: ; preds = %6, %3
ret void
6: ; preds = %3, %6
%7 = phi i64 [ %13, %6 ], [ 0, %3 ]
%8 = phi i64* [ %12, %6 ], [ %2, %3 ]
%9 = add i64 %7, %1
%10 = tail call i32 @ranged_random_modgolang(i64 %9)
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds i64, i64* %8, i64 1
store i64 %11, i64* %8
%13 = add nuw i64 %7, 1
%14 = icmp eq i64 %13, %0
br i1 %14, label %5, label %6
}
/* Variables and functions */
int /*<<< orphan*/ I2C_HAL_delay_10th_usec(int);
int /*<<< orphan*/ I2C_SCL_HIGH();
int /*<<< orphan*/ I2C_SCL_LOW();
void I2C_SCL_TOGGLE(void) {
  I2C_HAL_delay_10th_usec(47);
  ;
  I2C_SCL_HIGH();
  I2C_HAL_delay_10th_usec(47);
  ;
  I2C_SCL_LOW();
}


x86 assembly (clang, -O0):
<I2C_SCL_TOGGLE>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2f,%edi
call   1040 <I2C_HAL_delay_10th_usec@plt>
mov    $0x0,%al
call   1050 <I2C_SCL_HIGH@plt>
mov    $0x2f,%edi
call   1040 <I2C_HAL_delay_10th_usec@plt>
mov    $0x0,%al
call   1030 <I2C_SCL_LOW@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2C_SCL_TOGGLE>:
push   %rax
mov    $0x2f,%edi
call   1040 <I2C_HAL_delay_10th_usec@plt>
xor    %eax,%eax
call   1050 <I2C_SCL_HIGH@plt>
mov    $0x2f,%edi
call   1040 <I2C_HAL_delay_10th_usec@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <I2C_SCL_LOW@plt>

LLVM IR (-O0):
define void @I2C_SCL_TOGGLE() {
%1 = call i32 @I2C_HAL_delay_10th_usec(i32 47)
%2 = call i32 (...) @I2C_SCL_HIGH()
%3 = call i32 @I2C_HAL_delay_10th_usec(i32 47)
%4 = call i32 (...) @I2C_SCL_LOW()
ret void
}

LLVM IR (-O2):
define void @I2C_SCL_TOGGLE() {
%1 = tail call i32 @I2C_HAL_delay_10th_usec(i32 47)
%2 = tail call i32 (...) @I2C_SCL_HIGH()
%3 = tail call i32 @I2C_HAL_delay_10th_usec(i32 47)
%4 = tail call i32 (...) @I2C_SCL_LOW()
ret void
}
/* Variables and functions */
char *duplica_string(char *);
int /*<<< orphan*/ free(char *);
char *malloc(int /*<<< orphan*/);
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ strlen(char *);
int main(void) {
  char *s = "Campos verdes";
  char *s_duplicado = malloc(strlen(s + 1));
  s_duplicado = duplica_string(s);
  printf("%s\n", s_duplicado);
  free(s_duplicado);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xe9a(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
add    $0x1,%rdi
call   1040 <strlen@plt>
mov    %eax,%edi
call   1070 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1060 <duplica_string@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rsi
lea    0xe74(%rip),%rdi
call   1050 <printf@plt>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xeb9(%rip),%rdi
call   1040 <strlen@plt>
lea    0xeac(%rip),%rdi
call   1060 <duplica_string@plt>
mov    %rax,%rbx
lea    0xeab(%rip),%rdi
mov    %rax,%rsi
call   1050 <printf@plt>
mov    %rbx,%rdi
call   1030 <free@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Campos verdes\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8** %2
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 1
%6 = call i32 @strlen(i8* %5)
%7 = call i8* @malloc(i32 %6)
store i8* %7, i8** %3
%8 = load i8*, i8** %2
%9 = call i8* @duplica_string(i8* %8)
store i8* %9, i8** %3
%10 = load i8*, i8** %3
%11 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %10)
%12 = load i8*, i8** %3
%13 = call i32 @free(i8* %12)
ret i32 0
}

LLVM IR (-O2):
@.str = [14 x i8] c"Campos verdes\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @main() {
%1 = tail call i32 @strlen(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 1))
%2 = tail call i8* @duplica_string(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %2)
%4 = tail call i32 @free(i8* %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ WDIOC_SETOPTIONS;
int WDIOS_DISABLECARD;
int /*<<< orphan*/ ioctl(int, int /*<<< orphan*/, int *);
void disable_watchdog(int fd) {
  int flags = WDIOS_DISABLECARD;
  ioctl(fd, WDIOC_SETOPTIONS, &flags);
}


x86 assembly (clang, -O0):
<disable_watchdog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    0x2ea7(%rip),%rax
mov    (%rax),%esi
lea    -0x8(%rbp),%rdx
call   1030 <ioctl@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<disable_watchdog>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%eax
mov    %eax,0x4(%rsp)
mov    0x2eb3(%rip),%rax
mov    (%rax),%esi
lea    0x4(%rsp),%rdx
call   1030 <ioctl@plt>
pop    %rax
ret

LLVM IR (-O0):
@WDIOS_DISABLECARD = global i32 0
@WDIOC_SETOPTIONS = global i32 0
define void @disable_watchdog(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* @WDIOS_DISABLECARD
store i32 %4, i32* %3
%5 = load i32, i32* %2
%6 = load i32, i32* @WDIOC_SETOPTIONS
%7 = call i32 @ioctl(i32 %5, i32 %6, i32* %3)
ret void
}

LLVM IR (-O2):
@WDIOS_DISABLECARD = global i32 0
@WDIOC_SETOPTIONS = global i32 0
define void @disable_watchdog(i32 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = load i32, i32* @WDIOS_DISABLECARD
store i32 %4, i32* %2
%5 = load i32, i32* @WDIOC_SETOPTIONS
%6 = call i32 @ioctl(i32 %0, i32 %5, i32* %2)
ret void
}
/* Variables and functions */
int possible_win_magic(char **, char);
int possible_win_multi(char **, char);
int possible_win(char **board, char piece) {
  return possible_win_multi(board, piece);
  return possible_win_magic(board, piece);
}


x86 assembly (clang, -O0):
<possible_win>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
movsbl -0x9(%rbp),%esi
call   1030 <possible_win_multi@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<possible_win>:
jmp    1030 <possible_win_multi@plt>

LLVM IR (-O0):
define i32 @possible_win(i8** %0, i8 signext %1) {
%3 = alloca i8**
%4 = alloca i8
store i8** %0, i8*** %3
store i8 %1, i8* %4
%5 = load i8**, i8*** %3
%6 = load i8, i8* %4
%7 = call i32 @possible_win_multi(i8** %5, i8 signext %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @possible_win(i8** %0, i8 signext %1) {
%3 = tail call i32 @possible_win_multi(i8** %0, i8 signext %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int, int);
void display(int *arr, int num) {
  int i;
  for (i = 0; i < num; i++)
    printf("arr[%d] = %d\n", i, arr[i]);
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    115a <display+0x4a>
mov    -0x10(%rbp),%esi
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,4),%edx
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <display+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %esi,%esi
jle    1147 <display+0x37>
mov    %rdi,%r14
mov    %esi,%r12d
xor    %ebx,%ebx
lea    0xed5(%rip),%r15
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,4),%edx
mov    %r15,%rdi
mov    %ebx,%esi
call   1030 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1130 <display+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [14 x i8] c"arr[%d] = %d\0A\00"
define void @display(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %18, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i32, i32* %5
%12 = load i32*, i32** %3
%13 = load i32, i32* %5
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %12, i64 %14
%16 = load i32, i32* %15
%17 = call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %11, i32 %16)
br label %18
18: ; preds = %10
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %6
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"arr[%d] = %d\0A\00"
define void @display(i32* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %12, %6 ]
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
%10 = trunc i64 %7 to i32
%11 = tail call i32 @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i32 %10, i32 %9)
%12 = add nuw nsw i64 %7, 1
%13 = icmp eq i64 %12, %5
br i1 %13, label %14, label %6
14: ; preds = %6, %2
ret void
}
void func_r() {
  int i;
  for (i = 0; i < 100; i++) {
  }
  func_r();
}


x86 assembly (clang, -O0):
<func_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0x64,-0x4(%rbp)
jge    113c <func_r+0x2c>
jmp    112e <func_r+0x1e>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    111f <func_r+0xf>
call   1030 <func_r@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
define void @func_r() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 100
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
br label %2
9: ; preds = %2
ret void
}

LLVM IR (-O2):
void foo048() {}


x86 assembly (clang, -O0):
<foo048>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo048>:
ret

LLVM IR (-O0):
define void @foo048() {
ret void
}

LLVM IR (-O2):
define void @foo048() {
ret void
}
void nand_init(void) {
  (*(volatile unsigned long *)0x4E000000) = (0 << 12) | (1 << 8) | (0 << 4);
  (*(volatile unsigned long *)0x4E000004) = (1 << 4) | (1 << 1) | (1 << 0);
}


x86 assembly (clang, -O0):
<nand_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4e000000,%eax
movq   $0x100,(%rax)
mov    $0x4e000004,%eax
movq   $0x13,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<nand_init>:
movq   $0x100,0x4e000000
movq   $0x13,0x4e000004
ret

LLVM IR (-O0):
define void @nand_init() {
store volatile i64 256, i64* inttoptr (i64 1308622848 to i64*)
store volatile i64 19, i64* inttoptr (i64 1308622852 to i64*)
ret void
}

LLVM IR (-O2):
define void @nand_init() {
store volatile i64 256, i64* inttoptr (i64 1308622848 to i64*)
store volatile i64 19, i64* inttoptr (i64 1308622852 to i64*)
ret void
}
extern unsigned long readw(unsigned long addr) {
  long result =
      *(volatile int *)((addr << 7) + ((0xfffffc0000000000UL) + 0x200000000UL) +
                        0x20);
  result >>= (addr & 3) * 8;
  return 0xffffUL & result;
}


x86 assembly (clang, -O0):
<readw>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shl    $0x7,%rax
movabs $0xfffffc0200000000,%rcx
fc ff ff
add    %rcx,%rax
mov    0x20(%rax),%eax
cltq
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rcx
and    $0x3,%rcx
shl    $0x3,%rcx
mov    -0x10(%rbp),%rax
sar    %cl,%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0xffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readw>:
lea    0x0(,%rdi,8),%ecx
shl    $0x7,%rdi
movabs $0xfffffc0200000020,%rax
fc ff ff
movslq (%rdi,%rax,1),%rax
and    $0x18,%cl
sar    %cl,%rax
movzwl %ax,%eax
ret

LLVM IR (-O0):
define i64 @readw(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = shl i64 %4, 7
%6 = add i64 %5, -4389456576512
%7 = add i64 %6, 32
%8 = inttoptr i64 %7 to i32*
%9 = load volatile i32, i32* %8
%10 = sext i32 %9 to i64
store i64 %10, i64* %3
%11 = load i64, i64* %2
%12 = and i64 %11, 3
%13 = mul i64 %12, 8
%14 = load i64, i64* %3
%15 = ashr i64 %14, %13
store i64 %15, i64* %3
%16 = load i64, i64* %3
%17 = and i64 65535, %16
ret i64 %17
}

LLVM IR (-O2):
define i64 @readw(i64 %0) {
%2 = shl i64 %0, 7
%3 = add i64 %2, -4389456576480
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
%6 = sext i32 %5 to i64
%7 = shl i64 %0, 3
%8 = and i64 %7, 24
%9 = ashr i64 %6, %8
%10 = and i64 %9, 65535
ret i64 %10
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "usage: tap2xml [-d]\n");
  fprintf(stderr, "       tap2xml [-h]\n");
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    0x2eb0(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<usage>:
push   %rbx
mov    0x2ec8(%rip),%rbx
mov    (%rbx),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xee6(%rip),%rsi
pop    %rbx
jmp    1030 <fprintf@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [21 x i8] c"usage: tap2xml [-d]\0A\00"
@.str.1 = [21 x i8] c" tap2xml [-h]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [21 x i8] c"usage: tap2xml [-d]\0A\00"
@.str.1 = [21 x i8] c" tap2xml [-h]\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @stderr
%4 = tail call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void ir_uart_puts(__attribute__((unused)) const char *str) {}


x86 assembly (clang, -O0):
<ir_uart_puts>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ir_uart_puts>:
ret

LLVM IR (-O0):
define void @ir_uart_puts(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @ir_uart_puts(i8* nocapture %0) {
ret void
}
void mdp4_overlay_dtv_ov_done_push(struct msm_fb_data_type *mfd,
                                   struct mdp4_overlay_pipe *pipe) {}


x86 assembly (clang, -O0):
<mdp4_overlay_dtv_ov_done_push>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp4_overlay_dtv_ov_done_push>:
ret

LLVM IR (-O0):
%struct.msm_fb_data_type = type opaque
%struct.mdp4_overlay_pipe = type opaque
define void @mdp4_overlay_dtv_ov_done_push(%struct.msm_fb_data_type* %0, %struct.mdp4_overlay_pipe* %1) {
%3 = alloca %struct.msm_fb_data_type*
%4 = alloca %struct.mdp4_overlay_pipe*
store %struct.msm_fb_data_type* %0, %struct.msm_fb_data_type** %3
store %struct.mdp4_overlay_pipe* %1, %struct.mdp4_overlay_pipe** %4
ret void
}

LLVM IR (-O2):
%struct.msm_fb_data_type = type opaque
%struct.mdp4_overlay_pipe = type opaque
define void @mdp4_overlay_dtv_ov_done_push(%struct.msm_fb_data_type* nocapture %0, %struct.mdp4_overlay_pipe* nocapture %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ botsub(int, char *);
void bottomgold(void) { botsub((((8) << 16) + ((69) << 8) + (19)), "%-6ld"); }


x86 assembly (clang, -O0):
<bottomgold>:
push   %rbp
mov    %rsp,%rbp
mov    $0x84513,%edi
lea    0xee0(%rip),%rsi
call   1030 <botsub@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bottomgold>:
lea    0xee9(%rip),%rsi
mov    $0x84513,%edi
jmp    1030 <botsub@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"%-6ld\00"
define void @bottomgold() {
%1 = call i32 @botsub(i32 541971, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"%-6ld\00"
define void @bottomgold() {
%1 = tail call i32 @botsub(i32 541971, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
ret void
}
int getByte(int x, int n) {
  int shift = n << 3;
  return (x >> shift) & 0xff;
}


x86 assembly (clang, -O0):
<getByte>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shl    $0x3,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<getByte>:
lea    0x0(,%rsi,8),%ecx
sar    %cl,%edi
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @getByte(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = shl i32 %6, 3
store i32 %7, i32* %5
%8 = load i32, i32* %3
%9 = load i32, i32* %5
%10 = ashr i32 %8, %9
%11 = and i32 %10, 255
ret i32 %11
}

LLVM IR (-O2):
define i32 @getByte(i32 %0, i32 %1) {
%3 = shl i32 %1, 3
%4 = ashr i32 %0, %3
%5 = and i32 %4, 255
ret i32 %5
}
double weighted_average(double a1, double a2, double w1, double w2) {
  return (a1 * w1 + a2 * w2) / (w1 + w2);
}


x86 assembly (clang, -O0):
<weighted_average>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm2
movsd  -0x10(%rbp),%xmm1
mulsd  -0x20(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
movsd  -0x18(%rbp),%xmm1
addsd  -0x20(%rbp),%xmm1
divsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<weighted_average>:
mulsd  %xmm3,%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
addsd  %xmm3,%xmm2
divsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @weighted_average(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %5
%10 = load double, double* %7
%11 = load double, double* %6
%12 = load double, double* %8
%13 = fmul double %11, %12
%14 = call double @llvm.fmuladd.f64(double %9, double %10, double %13)
%15 = load double, double* %7
%16 = load double, double* %8
%17 = fadd double %15, %16
%18 = fdiv double %14, %17
ret double %18
}

LLVM IR (-O2):
define double @weighted_average(double %0, double %1, double %2, double %3) {
%5 = fmul double %1, %3
%6 = tail call double @llvm.fmuladd.f64(double %0, double %2, double %5)
%7 = fadd double %2, %3
%8 = fdiv double %6, %7
ret double %8
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ ich_liebe_dich();
int main(int argc, char *argv[]) {
  ich_liebe_dich();
  return EXIT_SUCCESS;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <ich_liebe_dich@plt>
mov    0x2eac(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <ich_liebe_dich@plt>
mov    0x2ec1(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @ich_liebe_dich()
%7 = load i32, i32* @EXIT_SUCCESS
ret i32 %7
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @ich_liebe_dich()
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
char translate_bool_to_ascii(char value) {
  switch (value) {
  case 0x01:
    return '1';
  case 0x00:
    return '0';
  }
  return '?';
}


x86 assembly (clang, -O0):
<translate_bool_to_ascii>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x2(%rbp)
movsbl -0x2(%rbp),%eax
mov    %eax,-0x8(%rbp)
test   %eax,%eax
je     1138 <translate_bool_to_ascii+0x38>
jmp    111e <translate_bool_to_ascii+0x1e>
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
jne    1141 <translate_bool_to_ascii+0x41>
jmp    112f <translate_bool_to_ascii+0x2f>
movb   $0x31,-0x1(%rbp)
jmp    1145 <translate_bool_to_ascii+0x45>
movb   $0x30,-0x1(%rbp)
jmp    1145 <translate_bool_to_ascii+0x45>
movb   $0x3f,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<translate_bool_to_ascii>:
test   %dil,%dil
mov    $0x30,%eax
mov    $0x3f,%ecx
cmove  %eax,%ecx
cmp    $0x1,%dil
mov    $0x31,%eax
cmovne %ecx,%eax
ret

LLVM IR (-O0):
define signext i8 @translate_bool_to_ascii(i8 signext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %8 [
i32 1, label %6
i32 0, label %7
]
6: ; preds = %1
store i8 49, i8* %2
br label %9
7: ; preds = %1
store i8 48, i8* %2
br label %9
8: ; preds = %1
store i8 63, i8* %2
br label %9
9: ; preds = %8, %7, %6
%10 = load i8, i8* %2
ret i8 %10
}

LLVM IR (-O2):
define signext i8 @translate_bool_to_ascii(i8 signext %0) {
%2 = icmp eq i8 %0, 0
%3 = select i1 %2, i8 48, i8 63
%4 = icmp eq i8 %0, 1
%5 = select i1 %4, i8 49, i8 %3
ret i8 %5
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isodigit(int);
void t_isodigit_0x93() {
  Assert_real((isodigit(147) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isodigit.c",
              740, ("isodigit should be 0 for 0x93"));
}


x86 assembly (clang, -O0):
<t_isodigit_0x93>:
push   %rbp
mov    %rsp,%rbp
mov    $0x93,%edi
call   1040 <isodigit@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x2e4,%edx
lea    0xf5c(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isodigit_0x93>:
push   %rax
mov    $0x93,%edi
call   1040 <isodigit@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf67(%rip),%rcx
mov    $0x2e4,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x93\00"
define void @t_isodigit_0x93() {
%1 = call i64 @isodigit(i32 147)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 740, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [169 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isodigit.c\00"
@.str.1 = [30 x i8] c"isodigit should be 0 for 0x93\00"
define void @t_isodigit_0x93() {
%1 = tail call i64 @isodigit(i32 147)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([169 x i8], [169 x i8]* @.str, i64 0, i64 0), i32 740, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
ret void
}
char *NextSlashOrNull(char *p) {
  while (*p != '/' && *p != '\0') {
    p++;
  }
  return p;
}


x86 assembly (clang, -O0):
<NextSlashOrNull>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%ecx
xor    %eax,%eax
cmp    $0x2f,%ecx
mov    %al,-0x9(%rbp)
je     112d <NextSlashOrNull+0x2d>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
setne  %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
test   $0x1,%al
jne    113d <NextSlashOrNull+0x3d>
jmp    114e <NextSlashOrNull+0x4e>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1108 <NextSlashOrNull+0x8>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<NextSlashOrNull>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
movzbl (%rax),%ecx
test   %cl,%cl
je     1122 <NextSlashOrNull+0x22>
cmp    $0x2f,%cl
je     1122 <NextSlashOrNull+0x22>
add    $0x1,%rax
jmp    1110 <NextSlashOrNull+0x10>
ret

LLVM IR (-O0):
define i8* @NextSlashOrNull(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %15, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = icmp ne i32 %6, 47
br i1 %7, label %8, label %13
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 0
br label %13
13: ; preds = %8, %3
%14 = phi i1 [ false, %3 ], [ %12, %8 ]
br i1 %14, label %15, label %18
15: ; preds = %13
%16 = load i8*, i8** %2
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %2
br label %3
18: ; preds = %13
%19 = load i8*, i8** %2
ret i8* %19
}

LLVM IR (-O2):
define i8* @NextSlashOrNull(i8* %0) {
br label %2
2: ; preds = %5, %1
%3 = phi i8* [ %0, %1 ], [ %6, %5 ]
%4 = load i8, i8* %3
switch i8 %4, label %5 [
i8 47, label %7
i8 0, label %7
]
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %3, i64 1
br label %2
7: ; preds = %2, %2
ret i8* %3
}