xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned long _LE_to_BE_long(unsigned long);
unsigned long inl(int port) {
  return (
      _LE_to_BE_long(*((unsigned long *)(((unsigned long)0x80000000) + port))));
}


x86 assembly (clang, -O0):
<inl>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
movabs $0x80000000,%rcx
add    %rcx,%rax
mov    (%rax),%rdi
call   1030 <_LE_to_BE_long@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<inl>:
movslq %edi,%rax
mov    $0x80000000,%ecx
mov    (%rax,%rcx,1),%rdi
jmp    1030 <_LE_to_BE_long@plt>

LLVM IR (-O0):
define i64 @inl(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = sext i32 %3 to i64
%5 = add i64 2147483648, %4
%6 = inttoptr i64 %5 to i64*
%7 = load i64, i64* %6
%8 = call i64 @_LE_to_BE_long(i64 %7)
ret i64 %8
}

LLVM IR (-O2):
define i64 @inl(i32 %0) {
%2 = sext i32 %0 to i64
%3 = add nsw i64 %2, 2147483648
%4 = inttoptr i64 %3 to i64*
%5 = load i64, i64* %4
%6 = tail call i64 @_LE_to_BE_long(i64 %5)
ret i64 %6
}
void rte_prefetch1(const volatile void *p) {
  asm volatile("prefetcht1 %[p]" : : [p] "m"(*(const volatile char *)p));
}


x86 assembly (clang, -O0):
<rte_prefetch1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
prefetcht1 (%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rte_prefetch1>:
prefetcht1 (%rdi)
ret

LLVM IR (-O0):
define void @rte_prefetch1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @rte_prefetch1(i8* %0) {
tail call void asm sideeffect "prefetcht1 $0", "*m,~{dirflag},~{fpsr},~{flags}"(i8* elementtype(i8) %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ U_WMRNOTIMPLEMENTED_swap(char *, int);
void U_WMR5C_swap(char *record, int torev) {
  U_WMRNOTIMPLEMENTED_swap(record, torev);
}


x86 assembly (clang, -O0):
<U_WMR5C_swap>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <U_WMRNOTIMPLEMENTED_swap@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR5C_swap>:
jmp    1030 <U_WMRNOTIMPLEMENTED_swap@plt>

LLVM IR (-O0):
define void @U_WMR5C_swap(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %5, i32 %6)
ret void
}

LLVM IR (-O2):
define void @U_WMR5C_swap(i8* %0, i32 %1) {
%3 = tail call i32 @U_WMRNOTIMPLEMENTED_swap(i8* %0, i32 %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void abort() { exit(1); }


x86 assembly (clang, -O0):
<abort>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<abort>:
push   %rax
mov    $0x1,%edi
call   1030 <exit@plt>

LLVM IR (-O0):
define void @abort() {
%1 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
define void @abort() {
%1 = tail call i32 @exit(i32 1)
unreachable
}
int ui_mouse_release(int suspend) { return !suspend; }


x86 assembly (clang, -O0):
<ui_mouse_release>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ui_mouse_release>:
xor    %eax,%eax
test   %edi,%edi
sete   %al
ret

LLVM IR (-O0):
define i32 @ui_mouse_release(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
%5 = xor i1 %4, true
%6 = zext i1 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @ui_mouse_release(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = zext i1 %2 to i32
ret i32 %3
}
int lsearch(int *arr, int size, int item) {
  int i;
  for (i = 0; i < size; i++)
    if (*(arr + i) == item)
      return i;
  return -1;
}


x86 assembly (clang, -O0):
<lsearch>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1153 <lsearch+0x53>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
jne    1140 <lsearch+0x40>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <lsearch+0x5a>
jmp    1145 <lsearch+0x45>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <lsearch+0x15>
movl   $0xffffffff,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<lsearch>:
mov    $0xffffffff,%eax
test   %esi,%esi
jle    111e <lsearch+0x1e>
mov    %esi,%esi
xor    %ecx,%ecx
nopl   (%rax)
cmp    %edx,(%rdi,%rcx,4)
je     111f <lsearch+0x1f>
add    $0x1,%rcx
cmp    %rcx,%rsi
jne    1110 <lsearch+0x10>
ret
mov    %ecx,%eax
ret

LLVM IR (-O0):
define i32 @lsearch(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %7
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 -1, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @lsearch(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, %2
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ -1, %3 ], [ %16, %15 ], [ -1, %12 ]
ret i32 %18
}
/* Variables and functions */
double ceil(double);
double round_money(double money) {
  money *= 1000;
  money = ceil(money);
  money /= 1000;
  return money;
}


x86 assembly (clang, -O0):
<round_money>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  0xedb(%rip),%xmm0
mulsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <ceil@plt>
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xeb5(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_money>:
push   %rax
mulsd  0xee7(%rip),%xmm0
call   1030 <ceil@plt>
divsd  0xeda(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @round_money(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fmul double %3, 1.000000e+03
store double %4, double* %2
%5 = load double, double* %2
%6 = call double @llvm.ceil.f64(double %5)
store double %6, double* %2
%7 = load double, double* %2
%8 = fdiv double %7, 1.000000e+03
store double %8, double* %2
%9 = load double, double* %2
ret double %9
}

LLVM IR (-O2):
define double @round_money(double %0) {
%2 = fmul double %0, 1.000000e+03
%3 = tail call double @llvm.ceil.f64(double %2)
%4 = fdiv double %3, 1.000000e+03
ret double %4
}
/* Variables and functions */
int memcmp(void const *, void const *, int);
int fts3BinCompare(const void *pKey1, int n1, const void *pKey2, int n2) {
  if (n1 != n2)
    return 1;
  return memcmp(pKey1, pKey2, n1);
}


x86 assembly (clang, -O0):
<fts3BinCompare>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x24(%rbp),%eax
je     113e <fts3BinCompare+0x2e>
movl   $0x1,-0x4(%rbp)
jmp    1151 <fts3BinCompare+0x41>
mov    -0x10(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    -0x14(%rbp),%edx
call   1030 <memcmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fts3BinCompare>:
cmp    %ecx,%esi
jne    1120 <fts3BinCompare+0x10>
mov    %esi,%eax
mov    %rdx,%rsi
mov    %eax,%edx
jmp    1030 <memcmp@plt>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @fts3BinCompare(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i8*
%9 = alloca i32
store i8* %0, i8** %6
store i32 %1, i32* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
%10 = load i32, i32* %7
%11 = load i32, i32* %9
%12 = icmp ne i32 %10, %11
br i1 %12, label %13, label %14
13: ; preds = %4
store i32 1, i32* %5
br label %19
14: ; preds = %4
%15 = load i8*, i8** %6
%16 = load i8*, i8** %8
%17 = load i32, i32* %7
%18 = call i32 @memcmp(i8* %15, i8* %16, i32 %17)
store i32 %18, i32* %5
br label %19
19: ; preds = %14, %13
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @fts3BinCompare(i8* %0, i32 %1, i8* %2, i32 %3) {
%5 = icmp eq i32 %1, %3
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @memcmp(i8* %0, i8* %2, i32 %1)
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ %7, %6 ], [ 1, %4 ]
ret i32 %9
}
void _vDispDbgInfo(unsigned char *pszFileName, unsigned long ulLineNo,
                   void *pPointer) {}


x86 assembly (clang, -O0):
<_vDispDbgInfo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<_vDispDbgInfo>:
ret

LLVM IR (-O0):
define void @_vDispDbgInfo(i8* %0, i64 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i8*
store i8* %0, i8** %4
store i64 %1, i64* %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
define void @_vDispDbgInfo(i8* nocapture %0, i64 %1, i8* nocapture %2) {
ret void
}
/* Variables and functions */
int istrsenvisx(char *, size_t *, char const *, int /*<<< orphan*/, int,
                char const *, int /*<<< orphan*/ *);
int strsnvis(char *mbdst, size_t dlen, const char *mbsrc, int flags,
             const char *mbextra) {
  return istrsenvisx(mbdst, &dlen, mbsrc, 0, flags, mbextra, NULL);
}


x86 assembly (clang, -O0):
<strsnvis>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
mov    -0x1c(%rbp),%r8d
mov    -0x28(%rbp),%r9
lea    -0x10(%rbp),%rsi
xor    %ecx,%ecx
xor    %eax,%eax
movq   $0x0,(%rsp)
call   1030 <istrsenvisx@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<strsnvis>:
sub    $0x18,%rsp
mov    %r8,%r9
mov    %ecx,%r8d
mov    %rsi,0x10(%rsp)
movq   $0x0,(%rsp)
lea    0x10(%rsp),%rsi
xor    %ecx,%ecx
call   1030 <istrsenvisx@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define i32 @strsnvis(i8* %0, i64 %1, i8* %2, i32 %3, i8* %4) {
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i8*
%9 = alloca i32
%10 = alloca i8*
store i8* %0, i8** %6
store i64 %1, i64* %7
store i8* %2, i8** %8
store i32 %3, i32* %9
store i8* %4, i8** %10
%11 = load i8*, i8** %6
%12 = load i8*, i8** %8
%13 = load i32, i32* %9
%14 = load i8*, i8** %10
%15 = call i32 @istrsenvisx(i8* %11, i64* %7, i8* %12, i32 0, i32 %13, i8* %14, i32* null)
ret i32 %15
}

LLVM IR (-O2):
define i32 @strsnvis(i8* %0, i64 %1, i8* %2, i32 %3, i8* %4) {
%6 = alloca i64
store i64 %1, i64* %6
%7 = call i32 @istrsenvisx(i8* %0, i64* %6, i8* %2, i32 0, i32 %3, i8* %4, i32* null)
ret i32 %7
}
/* Variables and functions */
int CountBits(int);
int /*<<< orphan*/ printf(char *, ...);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int num;
  printf("Enter the number: \n");
  scanf("%d", &num);
  printf("Number of bits %d \n", CountBits(num));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
lea    0xec0(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1030 <CountBits@plt>
mov    %eax,%esi
lea    0xea9(%rip),%rdi
mov    $0x0,%al
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xecf(%rip),%rdi
call   1040 <puts@plt>
lea    0xeac(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1060 <scanf@plt>
mov    0x4(%rsp),%edi
call   1030 <CountBits@plt>
lea    0xe95(%rip),%rdi
mov    %eax,%esi
xor    %eax,%eax
call   1050 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Enter the number: \0A\00"
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [20 x i8] c"Number of bits %d \0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %2)
%5 = load i32, i32* %2
%6 = call i32 @CountBits(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str.1 = [3 x i8] c"%d\00"
@.str.2 = [20 x i8] c"Number of bits %d \0A\00"
@str = [19 x i8] c"Enter the number: \00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%4 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32* %1)
%5 = load i32, i32* %1
%6 = call i32 @CountBits(i32 %5)
%7 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str.2, i64 0, i64 0), i32 %6)
ret i32 0
}
void ADCDMAEnable(unsigned long ulBase) {
  ;
  (*((volatile unsigned long *)(ulBase + 0x00000008))) |= 0x00000100;
}


x86 assembly (clang, -O0):
<ADCDMAEnable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x8(%rax),%rcx
or     $0x100,%rcx
mov    %rcx,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ADCDMAEnable>:
orq    $0x100,0x8(%rdi)
ret

LLVM IR (-O0):
define void @ADCDMAEnable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 8
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = or i64 %6, 256
store volatile i64 %7, i64* %5
ret void
}

LLVM IR (-O2):
define void @ADCDMAEnable(i64 %0) {
%2 = add i64 %0, 8
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = or i64 %4, 256
store volatile i64 %5, i64* %3
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: patchfile file-to-patch offset file-to-patch-in\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [56 x i8] c"Usage: patchfile file-to-patch offset file-to-patch-in\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [56 x i8] c"Usage: patchfile file-to-patch offset file-to-patch-in\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([56 x i8], [56 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
int sys$cretva(struct _va_range *inadr, struct _va_range *retadr,
               unsigned int acmode) {
  return ({
    unsigned long resultvar;
    register long int _a3 asm("rdx") = (long)(acmode);
    register long int _a2 asm("rsi") = (long)(retadr);
    register long int _a1 asm("rdi") = (long)(inadr);
    asm volatile("movq %1, %%rax\n\t"
                 "int $0x81\n\t"
                 : "=a"(resultvar)
                 : "i"(48), "r"(_a1), "r"(_a2), "r"(_a3)
                 : "memory", "cc", "r11", "cx");
    (long)resultvar;
  });
}


x86 assembly (clang, -O0):
<sys$cretva>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    %rax,-0x28(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x38(%rbp)
mov    -0x38(%rbp),%rdi
mov    -0x30(%rbp),%rsi
mov    -0x28(%rbp),%rdx
mov    $0x30,%rax
int    $0x81
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    %rax,-0x40(%rbp)
mov    -0x40(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sys$cretva>:
mov    %edx,%edx
mov    $0x30,%rax
int    $0x81
ret

LLVM IR (-O0):
%struct._va_range = type opaque
define i32 @"sys$cretva"(%struct._va_range* %0, %struct._va_range* %1, i32 %2) {
%4 = alloca %struct._va_range*
%5 = alloca %struct._va_range*
%6 = alloca i32
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
%10 = alloca i64
%11 = alloca i64
store %struct._va_range* %0, %struct._va_range** %4
store %struct._va_range* %1, %struct._va_range** %5
store i32 %2, i32* %6
%12 = load i32, i32* %6
%13 = zext i32 %12 to i64
store i64 %13, i64* %8
%14 = load %struct._va_range*, %struct._va_range** %5
%15 = ptrtoint %struct._va_range* %14 to i64
store i64 %15, i64* %9
%16 = load %struct._va_range*, %struct._va_range** %4
%17 = ptrtoint %struct._va_range* %16 to i64
store i64 %17, i64* %10
%18 = load i64, i64* %10
%19 = load i64, i64* %9
%20 = load i64, i64* %8
%21 = call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x81\0A\09", "={ax},i,{rdi},{rsi},{rdx},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 48, i64 %18, i64 %19, i64 %20)
store i64 %21, i64* %7
%22 = load i64, i64* %7
store i64 %22, i64* %11
%23 = load i64, i64* %11
%24 = trunc i64 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
%struct._va_range = type opaque
define i32 @"sys$cretva"(%struct._va_range* %0, %struct._va_range* %1, i32 %2) {
%4 = zext i32 %2 to i64
%5 = ptrtoint %struct._va_range* %1 to i64
%6 = ptrtoint %struct._va_range* %0 to i64
%7 = tail call i64 asm sideeffect "movq $1, %rax\0A\09int $$0x81\0A\09", "={ax},i,{rdi},{rsi},{rdx},~{memory},~{cc},~{r11},~{cx},~{dirflag},~{fpsr},~{flags}"(i32 48, i64 %6, i64 %5, i64 %4)
%8 = trunc i64 %7 to i32
ret i32 %8
}
unsigned char mirror_bits(unsigned char bits) {
  unsigned char i, tmp = 0;
  for (i = 0; i < 4; i++) {
    tmp |= ((bits & (0x01 << i)) << (7 - i * 2)) |
           ((bits & (0x80 >> i)) >> (7 - i * 2));
  }
  return tmp;
}


x86 assembly (clang, -O0):
<mirror_bits>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movb   $0x0,-0x3(%rbp)
movb   $0x0,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
cmp    $0x4,%eax
jge    1183 <mirror_bits+0x83>
movzbl -0x1(%rbp),%eax
movzbl -0x2(%rbp),%ecx
mov    $0x1,%edx
shl    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
movzbl -0x2(%rbp),%edx
shl    $0x1,%edx
mov    $0x7,%ecx
sub    %edx,%ecx
shl    %cl,%eax
mov    %eax,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
movzbl -0x2(%rbp),%ecx
mov    $0x80,%edx
sar    %cl,%edx
mov    %edx,%ecx
and    %ecx,%eax
movzbl -0x2(%rbp),%edx
shl    $0x1,%edx
mov    $0x7,%ecx
sub    %edx,%ecx
sar    %cl,%eax
mov    -0x8(%rbp),%ecx
or     %eax,%ecx
movzbl -0x3(%rbp),%eax
or     %ecx,%eax
mov    %al,-0x3(%rbp)
mov    -0x2(%rbp),%al
add    $0x1,%al
mov    %al,-0x2(%rbp)
jmp    1112 <mirror_bits+0x12>
movzbl -0x3(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mirror_bits>:
rol    $0x4,%dil
mov    %edi,%eax
and    $0x33,%al
shl    $0x2,%al
shr    $0x2,%dil
and    $0x33,%dil
or     %dil,%al
mov    %eax,%ecx
and    $0x55,%cl
add    %cl,%cl
shr    %al
and    $0x55,%al
or     %cl,%al
ret

LLVM IR (-O0):
define zeroext i8 @mirror_bits(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
%4 = alloca i8
store i8 %0, i8* %2
store i8 0, i8* %4
store i8 0, i8* %3
br label %5
5: ; preds = %37, %1
%6 = load i8, i8* %3
%7 = zext i8 %6 to i32
%8 = icmp slt i32 %7, 4
br i1 %8, label %9, label %40
9: ; preds = %5
%10 = load i8, i8* %2
%11 = zext i8 %10 to i32
%12 = load i8, i8* %3
%13 = zext i8 %12 to i32
%14 = shl i32 1, %13
%15 = and i32 %11, %14
%16 = load i8, i8* %3
%17 = zext i8 %16 to i32
%18 = mul nsw i32 %17, 2
%19 = sub nsw i32 7, %18
%20 = shl i32 %15, %19
%21 = load i8, i8* %2
%22 = zext i8 %21 to i32
%23 = load i8, i8* %3
%24 = zext i8 %23 to i32
%25 = ashr i32 128, %24
%26 = and i32 %22, %25
%27 = load i8, i8* %3
%28 = zext i8 %27 to i32
%29 = mul nsw i32 %28, 2
%30 = sub nsw i32 7, %29
%31 = ashr i32 %26, %30
%32 = or i32 %20, %31
%33 = load i8, i8* %4
%34 = zext i8 %33 to i32
%35 = or i32 %34, %32
%36 = trunc i32 %35 to i8
store i8 %36, i8* %4
br label %37
37: ; preds = %9
%38 = load i8, i8* %3
%39 = add i8 %38, 1
store i8 %39, i8* %3
br label %5
40: ; preds = %5
%41 = load i8, i8* %4
ret i8 %41
}

LLVM IR (-O2):
define zeroext i8 @mirror_bits(i8 zeroext %0) {
%2 = call i8 @llvm.bitreverse.i8(i8 %0)
ret i8 %2
}
/* Variables and functions */
int *f();
int main(void) {
  int *p = 0;
  {
    int x;
    p = &x;
  }
  p = f();
  int i = 0;
  while (i < 10) {
    int x = 2;
    i++;
    p = &x;
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
movq   $0x0,-0x10(%rbp)
lea    -0x14(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <f@plt>
mov    %rax,-0x10(%rbp)
movl   $0x0,-0x18(%rbp)
cmpl   $0xa,-0x18(%rbp)
jge    1168 <main+0x58>
movl   $0x2,-0x1c(%rbp)
mov    -0x18(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
lea    -0x1c(%rbp),%rax
mov    %rax,-0x10(%rbp)
jmp    1141 <main+0x31>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <f@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32*
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
store i32* null, i32** %2
store i32* %3, i32** %2
%6 = call i32* (...) @f()
store i32* %6, i32** %2
store i32 0, i32* %4
br label %7
7: ; preds = %10, %0
%8 = load i32, i32* %4
%9 = icmp slt i32 %8, 10
br i1 %9, label %10, label %13
10: ; preds = %7
store i32 2, i32* %5
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
store i32* %5, i32** %2
br label %7
13: ; preds = %7
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32* (...) @f()
ret i32 0
}
int dfs(int k, long long a) {}


x86 assembly (clang, -O0):
<dfs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dfs>:
ret

LLVM IR (-O0):
define i32 @dfs(i32 %0, i64 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i64
store i32 %0, i32* %4
store i64 %1, i64* %5
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @dfs(i32 %0, i64 %1) {
ret i32 undef
}
int clickplc_exe_EndOfSubProgramm_enc(void *obj, unsigned char *stream) {
  int encsize = 4;
  stream[0] = 0x00;
  stream[1] = 0x81;
  stream[2] = 0xff;
  stream[3] = 0xff;
  return (encsize);
}


x86 assembly (clang, -O0):
<clickplc_exe_EndOfSubProgramm_enc>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x4,-0x14(%rbp)
mov    -0x10(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x10(%rbp),%rax
movb   $0x81,0x1(%rax)
mov    -0x10(%rbp),%rax
movb   $0xff,0x2(%rax)
mov    -0x10(%rbp),%rax
movb   $0xff,0x3(%rax)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<clickplc_exe_EndOfSubProgramm_enc>:
movl   $0xffff8100,(%rsi)
mov    $0x4,%eax
ret

LLVM IR (-O0):
define i32 @clickplc_exe_EndOfSubProgramm_enc(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 4, i32* %5
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i64 0
store i8 0, i8* %7
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i64 1
store i8 -127, i8* %9
%10 = load i8*, i8** %4
%11 = getelementptr inbounds i8, i8* %10, i64 2
store i8 -1, i8* %11
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i64 3
store i8 -1, i8* %13
%14 = load i32, i32* %5
ret i32 %14
}

LLVM IR (-O2):
define i32 @clickplc_exe_EndOfSubProgramm_enc(i8* nocapture readnone %0, i8* nocapture writeonly %1) {
store i8 0, i8* %1
%3 = getelementptr inbounds i8, i8* %1, i64 1
store i8 -127, i8* %3
%4 = getelementptr inbounds i8, i8* %1, i64 2
store i8 -1, i8* %4
%5 = getelementptr inbounds i8, i8* %1, i64 3
store i8 -1, i8* %5
ret i32 4
}
void X509_CRL_get_ext_by_critical(void) {}


x86 assembly (clang, -O0):
<X509_CRL_get_ext_by_critical>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_CRL_get_ext_by_critical>:
ret

LLVM IR (-O0):
define void @X509_CRL_get_ext_by_critical() {
ret void
}

LLVM IR (-O2):
define void @X509_CRL_get_ext_by_critical() {
ret void
}
double test_round(double x) { return __builtin_round(x); }


x86 assembly (clang, -O0):
<test_round>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <round@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_round>:
jmp    1030 <round@plt>

LLVM IR (-O0):
define double @test_round(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @llvm.round.f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @test_round(double %0) {
%2 = tail call double @llvm.round.f64(double %0)
ret double %2
}
/* Variables and functions */
int __VERIFIER_nondet_int();
int main() {
  int x = __VERIFIER_nondet_int();
  while (x >= 0) {
    x++;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <__VERIFIER_nondet_int@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jl     1141 <main+0x31>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1129 <main+0x19>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <__VERIFIER_nondet_int@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 (...) @__VERIFIER_nondet_int()
store i32 %3, i32* %2
br label %4
4: ; preds = %7, %0
%5 = load i32, i32* %2
%6 = icmp sge i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = load i32, i32* %2
%9 = add nsw i32 %8, 1
store i32 %9, i32* %2
br label %4
10: ; preds = %4
%11 = load i32, i32* %1
ret i32 %11
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @__VERIFIER_nondet_int()
ret i32 0
}
int test_imm_85uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0x85 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_85uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0x85,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_85uint64_lowword_reg>:
test   $0x85,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_85uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 133
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_85uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 133
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void func8(int a, int *bptr, char c) {
  int **var4 = &bptr;
  **var4 = 700;
}


x86 assembly (clang, -O0):
<func8>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %al,-0x11(%rbp)
lea    -0x10(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
mov    (%rax),%rax
movl   $0x2bc,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<func8>:
movl   $0x2bc,(%rsi)
ret

LLVM IR (-O0):
define void @func8(i32 %0, i32* %1, i8 signext %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i8
%7 = alloca i32**
store i32 %0, i32* %4
store i32* %1, i32** %5
store i8 %2, i8* %6
store i32** %5, i32*** %7
%8 = load i32**, i32*** %7
%9 = load i32*, i32** %8
store i32 700, i32* %9
ret void
}

LLVM IR (-O2):
define void @func8(i32 %0, i32* nocapture writeonly %1, i8 signext %2) {
store i32 700, i32* %1
ret void
}
int is_precision(char c, char c1) {
  if (c == '.' && (c1 >= '0' && c1 <= '9'))
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<is_precision>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x5(%rbp)
mov    %al,-0x6(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x2e,%eax
jne    1143 <is_precision+0x43>
movsbl -0x6(%rbp),%eax
cmp    $0x30,%eax
jl     1143 <is_precision+0x43>
movsbl -0x6(%rbp),%eax
cmp    $0x39,%eax
jg     1143 <is_precision+0x43>
movl   $0x1,-0x4(%rbp)
jmp    114a <is_precision+0x4a>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_precision>:
cmp    $0x2e,%dil
sete   %al
add    $0xd0,%sil
cmp    $0xa,%sil
setb   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_precision(i8 signext %0, i8 signext %1) {
%3 = alloca i32
%4 = alloca i8
%5 = alloca i8
store i8 %0, i8* %4
store i8 %1, i8* %5
%6 = load i8, i8* %4
%7 = sext i8 %6 to i32
%8 = icmp eq i32 %7, 46
br i1 %8, label %9, label %18
9: ; preds = %2
%10 = load i8, i8* %5
%11 = sext i8 %10 to i32
%12 = icmp sge i32 %11, 48
br i1 %12, label %13, label %18
13: ; preds = %9
%14 = load i8, i8* %5
%15 = sext i8 %14 to i32
%16 = icmp sle i32 %15, 57
br i1 %16, label %17, label %18
17: ; preds = %13
store i32 1, i32* %3
br label %19
18: ; preds = %13, %9, %2
store i32 0, i32* %3
br label %19
19: ; preds = %18, %17
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_precision(i8 signext %0, i8 signext %1) {
%3 = icmp eq i8 %0, 46
%4 = add i8 %1, -48
%5 = icmp ult i8 %4, 10
%6 = and i1 %3, %5
%7 = zext i1 %6 to i32
ret i32 %7
}
char **get_files_from_argv(int argc, char *argv[]) {}


x86 assembly (clang, -O0):
<get_files_from_argv>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_files_from_argv>:
ret

LLVM IR (-O0):
define i8** @get_files_from_argv(i32 %0, i8** %1) {
%3 = alloca i8**
%4 = alloca i32
%5 = alloca i8**
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i8**, i8*** %3
ret i8** %6
}

LLVM IR (-O2):
define noalias i8** @get_files_from_argv(i32 %0, i8** nocapture readnone %1) {
ret i8** undef
}
int sec_harmless() { return (0); }


x86 assembly (clang, -O0):
<sec_harmless>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<sec_harmless>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @sec_harmless() {
ret i32 0
}

LLVM IR (-O2):
define i32 @sec_harmless() {
ret i32 0
}
int SemVer_ValidPos(int len, int lpos, int rpos) {
  if ((lpos <= 0) || (rpos <= 0)) {
    return (1);
  }
  if ((lpos == 1) || (rpos == len)) {
    return (1);
  }
  if ((lpos == rpos) || ((lpos + 1) == rpos)) {
    return (1);
  }
  return (0);
}


x86 assembly (clang, -O0):
<SemVer_ValidPos>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
jle    1121 <SemVer_ValidPos+0x21>
cmpl   $0x0,-0x10(%rbp)
jg     112d <SemVer_ValidPos+0x2d>
movl   $0x1,-0x4(%rbp)
jmp    117d <SemVer_ValidPos+0x7d>
cmpl   $0x1,-0xc(%rbp)
je     1143 <SemVer_ValidPos+0x43>
mov    -0x10(%rbp),%eax
cmp    -0x8(%rbp),%eax
jne    114f <SemVer_ValidPos+0x4f>
movl   $0x1,-0x4(%rbp)
jmp    117d <SemVer_ValidPos+0x7d>
mov    -0xc(%rbp),%eax
cmp    -0x10(%rbp),%eax
je     116a <SemVer_ValidPos+0x6a>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
cmp    -0x10(%rbp),%eax
jne    1176 <SemVer_ValidPos+0x76>
movl   $0x1,-0x4(%rbp)
jmp    117d <SemVer_ValidPos+0x7d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SemVer_ValidPos>:
mov    $0x1,%eax
test   %esi,%esi
jle    1128 <SemVer_ValidPos+0x28>
test   %edx,%edx
jle    1128 <SemVer_ValidPos+0x28>
cmp    $0x1,%esi
je     1128 <SemVer_ValidPos+0x28>
cmp    %edi,%edx
je     1128 <SemVer_ValidPos+0x28>
cmp    %edx,%esi
sete   %al
add    $0x1,%esi
cmp    %edx,%esi
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @SemVer_ValidPos(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %6
%9 = icmp sle i32 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %3
%11 = load i32, i32* %7
%12 = icmp sle i32 %11, 0
br i1 %12, label %13, label %14
13: ; preds = %10, %3
store i32 1, i32* %4
br label %33
14: ; preds = %10
%15 = load i32, i32* %6
%16 = icmp eq i32 %15, 1
br i1 %16, label %21, label %17
17: ; preds = %14
%18 = load i32, i32* %7
%19 = load i32, i32* %5
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %22
21: ; preds = %17, %14
store i32 1, i32* %4
br label %33
22: ; preds = %17
%23 = load i32, i32* %6
%24 = load i32, i32* %7
%25 = icmp eq i32 %23, %24
br i1 %25, label %31, label %26
26: ; preds = %22
%27 = load i32, i32* %6
%28 = add nsw i32 %27, 1
%29 = load i32, i32* %7
%30 = icmp eq i32 %28, %29
br i1 %30, label %31, label %32
31: ; preds = %26, %22
store i32 1, i32* %4
br label %33
32: ; preds = %26
store i32 0, i32* %4
br label %33
33: ; preds = %32, %31, %21, %13
%34 = load i32, i32* %4
ret i32 %34
}

LLVM IR (-O2):
define i32 @SemVer_ValidPos(i32 %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, 1
%5 = icmp slt i32 %2, 1
%6 = or i1 %4, %5
br i1 %6, label %17, label %7
7: ; preds = %3
%8 = icmp eq i32 %1, 1
%9 = icmp eq i32 %2, %0
%10 = or i1 %8, %9
br i1 %10, label %17, label %11
11: ; preds = %7
%12 = icmp eq i32 %1, %2
%13 = add nuw nsw i32 %1, 1
%14 = icmp eq i32 %13, %2
%15 = select i1 %12, i1 true, i1 %14
%16 = zext i1 %15 to i32
br label %17
17: ; preds = %11, %7, %3
%18 = phi i32 [ 1, %3 ], [ 1, %7 ], [ %16, %11 ]
ret i32 %18
}
/* Type definitions */
struct timezone {
  int dummy;
};
struct timeval {
  int dummy;
};

/* Variables and functions */
int runtime_gettimeofday(struct timeval *);
int gettimeofday(struct timeval *tv,
                 struct timezone *tz __attribute__((unused))) {
  return runtime_gettimeofday(tv);
}


x86 assembly (clang, -O0):
<gettimeofday>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <runtime_gettimeofday@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettimeofday>:
jmp    1030 <runtime_gettimeofday@plt>

LLVM IR (-O0):
%struct.timeval = type { i32 }
%struct.timezone = type { i32 }
define i32 @gettimeofday(%struct.timeval* %0, %struct.timezone* %1) {
%3 = alloca %struct.timeval*
%4 = alloca %struct.timezone*
store %struct.timeval* %0, %struct.timeval** %3
store %struct.timezone* %1, %struct.timezone** %4
%5 = load %struct.timeval*, %struct.timeval** %3
%6 = call i32 @runtime_gettimeofday(%struct.timeval* %5)
ret i32 %6
}

LLVM IR (-O2):
%struct.timeval = type { i32 }
%struct.timezone = type { i32 }
define i32 @gettimeofday(%struct.timeval* %0, %struct.timezone* nocapture readnone %1) {
%3 = tail call i32 @runtime_gettimeofday(%struct.timeval* %0)
ret i32 %3
}
/* Variables and functions */
int getcpucount();
int /*<<< orphan*/ printf(char *, int);
int main() {
  printf("%d\n", getcpucount());
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1040 <getcpucount@plt>
mov    %eax,%esi
lea    0xec1(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getcpucount@plt>
lea    0xed1(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @getcpucount()
%3 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %2)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 (...) @getcpucount()
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
void EraseChars(Howmany) int Howmany;
{
  char Str[10];
  if (Howmany == 0)
    return;
  sprintf(Str, "\033[%dX", Howmany);
  WRITETEST(Str);
}


x86 assembly (clang, -O0):
<EraseChars>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jne    113a <EraseChars+0x1a>
jmp    115a <EraseChars+0x3a>
lea    -0xe(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xeb8(%rip),%rsi
mov    $0x0,%al
call   1040 <sprintf@plt>
lea    -0xe(%rbp),%rdi
mov    $0x0,%al
call   1030 <WRITETEST@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EraseChars>:
test   %edi,%edi
je     1150 <EraseChars+0x30>
push   %rbx
sub    $0x10,%rsp
mov    %edi,%edx
lea    0xece(%rip),%rsi
lea    0x6(%rsp),%rbx
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <sprintf@plt>
mov    %rbx,%rdi
xor    %eax,%eax
call   1030 <WRITETEST@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[%dX\00"
define void @EraseChars(i32 %0) {
%2 = alloca i32
%3 = alloca [10 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
br label %13
7: ; preds = %1
%8 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%9 = load i32, i32* %2
%10 = call i32 (i8*, i8*, ...) @sprintf(i8* %8, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = getelementptr inbounds [10 x i8], [10 x i8]* %3, i64 0, i64 0
%12 = call i32 (i8*, ...) bitcast (i32 (...)* @WRITETEST to i32 (i8*, ...)*)(i8* %11)
br label %13
13: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[%dX\00"
define void @EraseChars(i32 %0) {
%2 = alloca [10 x i8]
%3 = getelementptr inbounds [10 x i8], [10 x i8]* %2, i64 0, i64 0
%4 = icmp eq i32 %0, 0
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = call i32 (i8*, i8*, ...) @sprintf(i8* %3, i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %0)
%7 = call i32 (i8*, ...) bitcast (i32 (...)* @WRITETEST to i32 (i8*, ...)*)(i8* %3)
br label %8
8: ; preds = %1, %5
ret void
}
int are_equal_char(const void *a, const void *b) {
  return *(char *)a == *(char *)b;
}


x86 assembly (clang, -O0):
<are_equal_char>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
mov    -0x10(%rbp),%rcx
movsbl (%rcx),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<are_equal_char>:
mov    (%rdi),%cl
xor    %eax,%eax
cmp    (%rsi),%cl
sete   %al
ret

LLVM IR (-O0):
define i32 @are_equal_char(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = load i8*, i8** %4
%9 = load i8, i8* %8
%10 = sext i8 %9 to i32
%11 = icmp eq i32 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @are_equal_char(i8* nocapture %0, i8* nocapture %1) {
%3 = load i8, i8* %0
%4 = load i8, i8* %1
%5 = icmp eq i8 %3, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
unsigned int _mutex_count(unsigned int mid) {
  unsigned int cmd;
  unsigned int sta;
  cmd = (((0x13000000)) | ((5 & ((1 << 3) - 1)) << (8 + (6 + 2))) |
         ((0 & ((1 << 8) - 1)) << (6 + 2)) | ((mid & ((1 << 6) - 1)) << 2));
  sta = (*(volatile unsigned int *)(cmd));
  return (((sta) >> 0) & 0x000000FF);
}


x86 assembly (clang, -O0):
<_mutex_count>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0x3f,%eax
shl    $0x2,%eax
or     $0x13050000,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    (%rax),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
shr    $0x0,%eax
and    $0xff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_mutex_count>:
shl    $0x2,%edi
movzbl %dil,%eax
mov    0x13050000(%rax),%eax
movzbl %al,%eax
ret

LLVM IR (-O0):
define i32 @_mutex_count(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = and i32 %5, 63
%7 = shl i32 %6, 2
%8 = or i32 319094784, %7
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = zext i32 %9 to i64
%11 = inttoptr i64 %10 to i32*
%12 = load volatile i32, i32* %11
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = lshr i32 %13, 0
%15 = and i32 %14, 255
ret i32 %15
}

LLVM IR (-O2):
define i32 @_mutex_count(i32 %0) {
%2 = shl i32 %0, 2
%3 = and i32 %2, 252
%4 = or i32 %3, 319094784
%5 = zext i32 %4 to i64
%6 = inttoptr i64 %5 to i32*
%7 = load volatile i32, i32* %6
%8 = and i32 %7, 255
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ script_write_byte(int);
void script_wait_duration(int dseconds) {
  script_write_byte(155);
  script_write_byte(((dseconds & 0xFFFF) >> 8));
  script_write_byte((dseconds & 0xFF));
}


x86 assembly (clang, -O0):
<script_wait_duration>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x9b,%edi
call   1030 <script_write_byte@plt>
mov    -0x4(%rbp),%edi
and    $0xffff,%edi
sar    $0x8,%edi
call   1030 <script_write_byte@plt>
mov    -0x4(%rbp),%edi
and    $0xff,%edi
call   1030 <script_write_byte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<script_wait_duration>:
push   %rbx
mov    %edi,%ebx
mov    $0x9b,%edi
call   1030 <script_write_byte@plt>
movzbl %bh,%edi
call   1030 <script_write_byte@plt>
movzbl %bl,%edi
pop    %rbx
jmp    1030 <script_write_byte@plt>

LLVM IR (-O0):
define void @script_wait_duration(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @script_write_byte(i32 155)
%4 = load i32, i32* %2
%5 = and i32 %4, 65535
%6 = ashr i32 %5, 8
%7 = call i32 @script_write_byte(i32 %6)
%8 = load i32, i32* %2
%9 = and i32 %8, 255
%10 = call i32 @script_write_byte(i32 %9)
ret void
}

LLVM IR (-O2):
define void @script_wait_duration(i32 %0) {
%2 = tail call i32 @script_write_byte(i32 155)
%3 = lshr i32 %0, 8
%4 = and i32 %3, 255
%5 = tail call i32 @script_write_byte(i32 %4)
%6 = and i32 %0, 255
%7 = tail call i32 @script_write_byte(i32 %6)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ AssertFailure(char *, int);
int /*<<< orphan*/ UARTBaseValid(unsigned long);
unsigned long UARTRxErrorGet(unsigned long ulBase) {
  {
    if (!(UARTBaseValid(ulBase))) {
      AssertFailure(
          "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
          "2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/"
          "Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/"
          "uartlib.c",
          1569);
    }
  };
  return ((*((volatile unsigned long *)(ulBase + 0x00000004))) & 0x0000000F);
}


x86 assembly (clang, -O0):
<UARTRxErrorGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <UARTBaseValid@plt>
cmp    $0x0,%eax
jne    114f <UARTRxErrorGet+0x2f>
lea    0xebb(%rip),%rdi
mov    $0x621,%esi
call   1030 <AssertFailure@plt>
mov    -0x8(%rbp),%rax
mov    0x4(%rax),%rax
and    $0xf,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<UARTRxErrorGet>:
push   %rbx
mov    %rdi,%rbx
call   1040 <UARTBaseValid@plt>
test   %eax,%eax
jne    113e <UARTRxErrorGet+0x1e>
lea    0xecc(%rip),%rdi
mov    $0x621,%esi
call   1030 <AssertFailure@plt>
mov    0x4(%rbx),%rax
and    $0xf,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [201 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/uartlib.c\00"
define i64 @UARTRxErrorGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i32 @UARTBaseValid(i64 %3)
%5 = icmp ne i32 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = call i32 @AssertFailure(i8* getelementptr inbounds ([201 x i8], [201 x i8]* @.str, i64 0, i64 0), i32 1569)
br label %8
8: ; preds = %6, %1
%9 = load i64, i64* %2
%10 = add i64 %9, 4
%11 = inttoptr i64 %10 to i64*
%12 = load volatile i64, i64* %11
%13 = and i64 %12, 15
ret i64 %13
}

LLVM IR (-O2):
@.str = [201 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/AmesianX/OpenBLT/refs/heads/master/Target/Demo/ARMCM3_LM3S_EK_LM3S8962_Crossworks/Boot/lib/driverlib/uartlib.c\00"
define i64 @UARTRxErrorGet(i64 %0) {
%2 = tail call i32 @UARTBaseValid(i64 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @AssertFailure(i8* getelementptr inbounds ([201 x i8], [201 x i8]* @.str, i64 0, i64 0), i32 1569)
br label %6
6: ; preds = %4, %1
%7 = add i64 %0, 4
%8 = inttoptr i64 %7 to i64*
%9 = load volatile i64, i64* %8
%10 = and i64 %9, 15
ret i64 %10
}
/* Type definitions */
struct iocb {
  int dummy;
};
typedef int /*<<< orphan*/ aio_context_t;

/* Variables and functions */
int /*<<< orphan*/ __NR_io_submit;
long syscall(int /*<<< orphan*/, int /*<<< orphan*/, long, struct iocb **);
long io_submit(aio_context_t ctx, long n, struct iocb **paiocb) {
  return syscall(__NR_io_submit, ctx, n, paiocb);
}


x86 assembly (clang, -O0):
<io_submit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2ebe(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x18(%rbp),%rcx
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<io_submit>:
mov    %rdx,%rcx
mov    %rsi,%rdx
mov    %edi,%esi
mov    0x2ec9(%rip),%rax
mov    (%rax),%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
%struct.iocb = type { i32 }
@__NR_io_submit = global i32 0
define i64 @io_submit(i32 %0, i64 %1, %struct.iocb** %2) {
%4 = alloca i32
%5 = alloca i64
%6 = alloca %struct.iocb**
store i32 %0, i32* %4
store i64 %1, i64* %5
store %struct.iocb** %2, %struct.iocb*** %6
%7 = load i32, i32* @__NR_io_submit
%8 = load i32, i32* %4
%9 = load i64, i64* %5
%10 = load %struct.iocb**, %struct.iocb*** %6
%11 = call i64 @syscall(i32 %7, i32 %8, i64 %9, %struct.iocb** %10)
ret i64 %11
}

LLVM IR (-O2):
%struct.iocb = type { i32 }
@__NR_io_submit = global i32 0
define i64 @io_submit(i32 %0, i64 %1, %struct.iocb** %2) {
%4 = load i32, i32* @__NR_io_submit
%5 = tail call i64 @syscall(i32 %4, i32 %0, i64 %1, %struct.iocb** %2)
ret i64 %5
}
int fchown(int fd, unsigned uid, unsigned gid) { return 0; }


x86 assembly (clang, -O0):
<fchown>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fchown>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fchown(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @fchown(i32 %0, i32 %1, i32 %2) {
ret i32 0
}
__attribute__((always_)) unsigned long get_page_memtype(struct page *pg) {
  return -1;
}


x86 assembly (clang, -O0):
<get_page_memtype>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0xffffffffffffffff,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_page_memtype>:
mov    $0xffffffffffffffff,%rax
ret

LLVM IR (-O0):
%struct.page = type opaque
define i64 @get_page_memtype(%struct.page* %0) {
%2 = alloca %struct.page*
store %struct.page* %0, %struct.page** %2
ret i64 -1
}

LLVM IR (-O2):
%struct.page = type opaque
define i64 @get_page_memtype(%struct.page* nocapture readnone %0) {
ret i64 -1
}