xunge/DecIR huggingface dataset:
/* Variables and functions */
unsigned long get_index(char const *key, size_t size) {
  unsigned long hash = 5381;
  while (*key++) {
    hash = ((hash << 5) + hash) + *key;
  }
  return hash & (size - 1);
}


x86 assembly (clang, -O0):
<get_index>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x1505,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
cmpb   $0x0,(%rax)
je     114c <get_index+0x4c>
mov    -0x18(%rbp),%rax
shl    $0x5,%rax
add    -0x18(%rbp),%rax
mov    -0x8(%rbp),%rcx
movsbq (%rcx),%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
jmp    1114 <get_index+0x14>
mov    -0x18(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_index>:
mov    %rsi,%rax
cmpb   $0x0,(%rdi)
je     113c <get_index+0x3c>
add    $0x1,%rdi
mov    $0x1505,%edx
mov    %rdx,%rcx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
shl    $0x5,%rcx
add    %rdx,%rcx
movsbq (%rdi),%rsi
add    %rsi,%rcx
add    $0x1,%rdi
mov    %rcx,%rdx
test   %rsi,%rsi
jne    1120 <get_index+0x20>
jmp    1141 <get_index+0x41>
mov    $0x1505,%ecx
add    $0xffffffffffffffff,%rax
and    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @get_index(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
store i64 5381, i64* %5
br label %6
6: ; preds = %11, %2
%7 = load i8*, i8** %3
%8 = getelementptr inbounds i8, i8* %7, i32 1
store i8* %8, i8** %3
%9 = load i8, i8* %7
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %20
11: ; preds = %6
%12 = load i64, i64* %5
%13 = shl i64 %12, 5
%14 = load i64, i64* %5
%15 = add i64 %13, %14
%16 = load i8*, i8** %3
%17 = load i8, i8* %16
%18 = sext i8 %17 to i64
%19 = add i64 %15, %18
store i64 %19, i64* %5
br label %6
20: ; preds = %6
%21 = load i64, i64* %5
%22 = load i64, i64* %4
%23 = sub i64 %22, 1
%24 = and i64 %21, %23
ret i64 %24
}

LLVM IR (-O2):
define i64 @get_index(i8* nocapture %0, i64 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %14, label %5
5: ; preds = %2, %5
%6 = phi i8* [ %8, %5 ], [ %0, %2 ]
%7 = phi i64 [ %12, %5 ], [ 5381, %2 ]
%8 = getelementptr inbounds i8, i8* %6, i64 1
%9 = mul i64 %7, 33
%10 = load i8, i8* %8
%11 = sext i8 %10 to i64
%12 = add i64 %9, %11
%13 = icmp eq i8 %10, 0
br i1 %13, label %14, label %5
14: ; preds = %5, %2
%15 = phi i64 [ 5381, %2 ], [ %12, %5 ]
%16 = add i64 %1, -1
%17 = and i64 %15, %16
ret i64 %17
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int sort(int *, int);
int main(int argc, char *argv[]) {
  int arr[5] = {1, 5, 7, 3, 5};
  printf("The biggest is: %d\n", sort(arr, 5));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0xec3(%rip),%rax
mov    %rax,-0x30(%rbp)
mov    0xec0(%rip),%rax
mov    %rax,-0x28(%rbp)
mov    0xebe(%rip),%eax
mov    %eax,-0x20(%rbp)
lea    -0x30(%rbp),%rdi
mov    $0x5,%esi
call   1040 <sort@plt>
mov    %eax,%esi
lea    0xea8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
mov    0xee6(%rip),%eax
mov    %eax,0x10(%rsp)
movaps 0xecb(%rip),%xmm0
movaps %xmm0,(%rsp)
mov    %rsp,%rdi
mov    $0x5,%esi
call   1040 <sort@plt>
lea    0xec7(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@__const.main.arr = [5 x i32] [i32 1, i32 5, i32 7, i32 3, i32 5]
@.str = [20 x i8] c"The biggest is: %d\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [5 x i32]
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = bitcast [5 x i32]* %6 to i8*
%8 = getelementptr inbounds [5 x i32], [5 x i32]* %6, i64 0, i64 0
%9 = call i32 @sort(i32* %8, i32 5)
%10 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %9)
ret i32 0
}

LLVM IR (-O2):
@__const.main.arr = [5 x i32] [i32 1, i32 5, i32 7, i32 3, i32 5]
@.str = [20 x i8] c"The biggest is: %d\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca [5 x i32]
%4 = bitcast [5 x i32]* %3 to i8*
%5 = getelementptr inbounds [5 x i32], [5 x i32]* %3, i64 0, i64 0
%6 = call i32 @sort(i32* %5, i32 5)
%7 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ CompileMark(int, int);
void DoIf(void) { CompileMark(28, 2); }


x86 assembly (clang, -O0):
<DoIf>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1c,%edi
mov    $0x2,%esi
call   1030 <CompileMark@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<DoIf>:
mov    $0x1c,%edi
mov    $0x2,%esi
jmp    1030 <CompileMark@plt>

LLVM IR (-O0):
define void @DoIf() {
%1 = call i32 @CompileMark(i32 28, i32 2)
ret void
}

LLVM IR (-O2):
define void @DoIf() {
%1 = tail call i32 @CompileMark(i32 28, i32 2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__26__IO__makeOutput();
void Msp430GpioC__1__HplGeneralIO__makeOutput(void) {
  HplMsp430GeneralIOP__26__IO__makeOutput();
}


x86 assembly (clang, -O0):
<Msp430GpioC__1__HplGeneralIO__makeOutput>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__26__IO__makeOutput@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430GpioC__1__HplGeneralIO__makeOutput>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__26__IO__makeOutput@plt>

LLVM IR (-O0):
define void @Msp430GpioC__1__HplGeneralIO__makeOutput() {
%1 = call i32 (...) @HplMsp430GeneralIOP__26__IO__makeOutput()
ret void
}

LLVM IR (-O2):
define void @Msp430GpioC__1__HplGeneralIO__makeOutput() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__26__IO__makeOutput()
ret void
}
void foo(const char *p) {
  p = __FUNCTION__;
  foo(p);
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <foo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
jmp    1100 <foo>

LLVM IR (-O0):
@__FUNCTION__.foo = [4 x i8] c"foo\00"
define void @foo(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @__FUNCTION__.foo, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @foo(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int UartPutc(int);
int SER_PutChar(int c) { return UartPutc(c); }


x86 assembly (clang, -O0):
<SER_PutChar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <UartPutc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SER_PutChar>:
jmp    1030 <UartPutc@plt>

LLVM IR (-O0):
define i32 @SER_PutChar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @UartPutc(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @SER_PutChar(i32 %0) {
%2 = tail call i32 @UartPutc(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ alliance_cmd();
void process_alliance(void) { alliance_cmd(); }


x86 assembly (clang, -O0):
<process_alliance>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <alliance_cmd@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<process_alliance>:
xor    %eax,%eax
jmp    1030 <alliance_cmd@plt>

LLVM IR (-O0):
define void @process_alliance() {
%1 = call i32 (...) @alliance_cmd()
ret void
}

LLVM IR (-O2):
define void @process_alliance() {
%1 = tail call i32 (...) @alliance_cmd()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ DIR;

/* Variables and functions */
int /*<<< orphan*/ closedir(int /*<<< orphan*/ *);
int /*<<< orphan*/ parcourirDossier(int /*<<< orphan*/ *, char *);
int main(int argc, char **argv) {
  DIR *rep = NULL;
  char *chemin = argv[1];
  parcourirDossier(rep, chemin);
  closedir(rep);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    0x8(%rax),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1030 <parcourirDossier@plt>
mov    -0x18(%rbp),%rdi
call   1040 <closedir@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    0x8(%rsi),%rsi
xor    %edi,%edi
call   1030 <parcourirDossier@plt>
xor    %edi,%edi
call   1040 <closedir@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32*
%7 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i32* null, i32** %6
%8 = load i8**, i8*** %5
%9 = getelementptr inbounds i8*, i8** %8, i64 1
%10 = load i8*, i8** %9
store i8* %10, i8** %7
%11 = load i32*, i32** %6
%12 = load i8*, i8** %7
%13 = call i32 @parcourirDossier(i32* %11, i8* %12)
%14 = load i32*, i32** %6
%15 = call i32 @closedir(i32* %14)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture %1) {
%3 = getelementptr inbounds i8*, i8** %1, i64 1
%4 = load i8*, i8** %3
%5 = tail call i32 @parcourirDossier(i32* null, i8* %4)
%6 = tail call i32 @closedir(i32* null)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ gint2_nai_SP_S(double *, double, double *, double, double *,
                                  double *);
void gint2_nai_S_SP(double *a, double a_a, double *b, double b_a, double *c,
                    double *out) {
  gint2_nai_SP_S(b, b_a, a, a_a, c, out);
}


x86 assembly (clang, -O0):
<gint2_nai_S_SP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
movsd  %xmm0,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
movsd  %xmm1,-0x20(%rbp)
mov    %rdx,-0x28(%rbp)
mov    %rcx,-0x30(%rbp)
mov    -0x18(%rbp),%rdi
movsd  -0x20(%rbp),%xmm0
mov    -0x8(%rbp),%rsi
movsd  -0x10(%rbp),%xmm1
mov    -0x28(%rbp),%rdx
mov    -0x30(%rbp),%rcx
call   1030 <gint2_nai_SP_S@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gint2_nai_S_SP>:
movaps %xmm0,%xmm2
mov    %rdi,%rax
mov    %rsi,%rdi
movaps %xmm1,%xmm0
mov    %rax,%rsi
movaps %xmm2,%xmm1
jmp    1030 <gint2_nai_SP_S@plt>

LLVM IR (-O0):
define void @gint2_nai_S_SP(double* %0, double %1, double* %2, double %3, double* %4, double* %5) {
%7 = alloca double*
%8 = alloca double
%9 = alloca double*
%10 = alloca double
%11 = alloca double*
%12 = alloca double*
store double* %0, double** %7
store double %1, double* %8
store double* %2, double** %9
store double %3, double* %10
store double* %4, double** %11
store double* %5, double** %12
%13 = load double*, double** %9
%14 = load double, double* %10
%15 = load double*, double** %7
%16 = load double, double* %8
%17 = load double*, double** %11
%18 = load double*, double** %12
%19 = call i32 @gint2_nai_SP_S(double* %13, double %14, double* %15, double %16, double* %17, double* %18)
ret void
}

LLVM IR (-O2):
define void @gint2_nai_S_SP(double* %0, double %1, double* %2, double %3, double* %4, double* %5) {
%7 = tail call i32 @gint2_nai_SP_S(double* %2, double %3, double* %0, double %1, double* %4, double* %5)
ret void
}
int test_imm_90uint8_reg(unsigned char val) {
  return ((val) & (-0x90 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_90uint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff70,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_90uint8_reg>:
test   $0x70,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_90uint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -144
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_90uint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 112
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void *nopPtr1(void *a1) { return 0; }


x86 assembly (clang, -O0):
<nopPtr1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nopPtr1>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @nopPtr1(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @nopPtr1(i8* nocapture readnone %0) {
ret i8* null
}
/* Variables and functions */
int WIFEXITED(int);
int WIFEXITED_(int status) { return WIFEXITED(status); }


x86 assembly (clang, -O0):
<WIFEXITED_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <WIFEXITED@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WIFEXITED_>:
jmp    1030 <WIFEXITED@plt>

LLVM IR (-O0):
define i32 @WIFEXITED_(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @WIFEXITED(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @WIFEXITED_(i32 %0) {
%2 = tail call i32 @WIFEXITED(i32 %0)
ret i32 %2
}
/* Variables and functions */
void v32_ntoh(void *);
void v32_hton(void *p) { return v32_ntoh(p); }


x86 assembly (clang, -O0):
<v32_hton>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <v32_ntoh@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<v32_hton>:
jmp    1030 <v32_ntoh@plt>

LLVM IR (-O0):
define void @v32_hton(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret void
}

LLVM IR (-O2):
define void @v32_hton(i8* %0) {
tail call void @v32_ntoh(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ file_system_attach_disk_internal(unsigned int, char const *);
int /*<<< orphan*/ file_system_detach_disk_internal(unsigned int);
void file_system_event_playback(unsigned int unit, const char *filename) {
  if (filename == NULL || filename[0] == 0) {
    file_system_detach_disk_internal(unit);
  } else {
    file_system_attach_disk_internal(unit, filename);
  }
}


x86 assembly (clang, -O0):
<file_system_event_playback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     114a <file_system_event_playback+0x2a>
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x0,%eax
jne    1157 <file_system_event_playback+0x37>
mov    -0x4(%rbp),%edi
call   1030 <file_system_detach_disk_internal@plt>
jmp    1163 <file_system_event_playback+0x43>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1040 <file_system_attach_disk_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_system_event_playback>:
test   %rsi,%rsi
je     112f <file_system_event_playback+0xf>
cmpb   $0x0,(%rsi)
je     112f <file_system_event_playback+0xf>
jmp    1040 <file_system_attach_disk_internal@plt>
jmp    1030 <file_system_detach_disk_internal@plt>

LLVM IR (-O0):
define void @file_system_event_playback(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = icmp eq i8* %5, null
br i1 %6, label %13, label %7
7: ; preds = %2
%8 = load i8*, i8** %4
%9 = getelementptr inbounds i8, i8* %8, i64 0
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %7, %2
%14 = load i32, i32* %3
%15 = call i32 @file_system_detach_disk_internal(i32 %14)
br label %20
16: ; preds = %7
%17 = load i32, i32* %3
%18 = load i8*, i8** %4
%19 = call i32 @file_system_attach_disk_internal(i32 %17, i8* %18)
br label %20
20: ; preds = %16, %13
ret void
}

LLVM IR (-O2):
define void @file_system_event_playback(i32 %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %7, label %4
4: ; preds = %2
%5 = load i8, i8* %1
%6 = icmp eq i8 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4, %2
%8 = tail call i32 @file_system_detach_disk_internal(i32 %0)
br label %11
9: ; preds = %4
%10 = tail call i32 @file_system_attach_disk_internal(i32 %0, i8* %1)
br label %11
11: ; preds = %9, %7
ret void
}
int main(void) {
  int i = 3;
  ++i;
  ++i;
  return i;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x3,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x5,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 3, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 1
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = add nsw i32 %5, 1
store i32 %6, i32* %2
%7 = load i32, i32* %2
ret i32 %7
}

LLVM IR (-O2):
define i32 @main() {
ret i32 5
}
void fc119(int n) {
a : {
  typedef int(*b)[n];
  {
    typedef int(*c)[n];
    0;
  }
  {
    typedef int(*d)[n];
    0;
  };
  typedef int(*e)[n];
  0;
};
  goto a;
  {
    typedef int(*f)[n];
    {
      typedef int(*g)[n];
      0;
    };
    {
      typedef int(*h)[n];
      0;
    };
    ;
    typedef int(*i)[n];
    0;
  };
  ;
  typedef int(*j)[n];
  0;
}


x86 assembly (clang, -O0):
<fc119>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fc119+0x7>

x86 assembly (clang, -O2):
<fc119>:
jmp    1100 <fc119>

LLVM IR (-O0):
define void @fc119(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %3, %1
%4 = load i32, i32* %2
%5 = zext i32 %4 to i64
%6 = load i32, i32* %2
%7 = zext i32 %6 to i64
%8 = load i32, i32* %2
%9 = zext i32 %8 to i64
%10 = load i32, i32* %2
%11 = zext i32 %10 to i64
br label %3
12: ; No predecessors!
%13 = load i32, i32* %2
%14 = zext i32 %13 to i64
%15 = load i32, i32* %2
%16 = zext i32 %15 to i64
%17 = load i32, i32* %2
%18 = zext i32 %17 to i64
%19 = load i32, i32* %2
%20 = zext i32 %19 to i64
%21 = load i32, i32* %2
%22 = zext i32 %21 to i64
ret void
}

LLVM IR (-O2):
define void @fc119(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
/* Variables and functions */
int /*<<< orphan*/ esc_prn(char *, char *);
int help_help(int argc, char **argv) {
  esc_prn("\n{H%s}, Print help. Use {UCOMMAND} {H?} or "
          "{HCOMMAND} {UARG} {H?} for more help\n",
          argv[0]);
  return 1;
}


x86 assembly (clang, -O0):
<help_help>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rsi
lea    0xed3(%rip),%rdi
call   1030 <esc_prn@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<help_help>:
push   %rax
mov    (%rsi),%rsi
lea    0xee5(%rip),%rdi
call   1030 <esc_prn@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [81 x i8] c"\0A{H%s}, Print help. Use {UCOMMAND} {H?} or {HCOMMAND} {UARG} {H?} for more help\0A\00"
define i32 @help_help(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i8**
store i32 %0, i32* %3
store i8** %1, i8*** %4
%5 = load i8**, i8*** %4
%6 = getelementptr inbounds i8*, i8** %5, i64 0
%7 = load i8*, i8** %6
%8 = call i32 @esc_prn(i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0), i8* %7)
ret i32 1
}

LLVM IR (-O2):
@.str = [81 x i8] c"\0A{H%s}, Print help. Use {UCOMMAND} {H?} or {HCOMMAND} {UARG} {H?} for more help\0A\00"
define i32 @help_help(i32 %0, i8** nocapture %1) {
%3 = load i8*, i8** %1
%4 = tail call i32 @esc_prn(i8* getelementptr inbounds ([81 x i8], [81 x i8]* @.str, i64 0, i64 0), i8* %3)
ret i32 1
}
void badfieldspec(s) char *s;
{ error(2, 0, "invalid field specification `%s'", s); }


x86 assembly (clang, -O0):
<badfieldspec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x2,%edi
xor    %esi,%esi
lea    0xed2(%rip),%rdx
mov    $0x0,%al
call   1030 <error@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<badfieldspec>:
mov    %rdi,%rcx
lea    0xee6(%rip),%rdx
mov    $0x2,%edi
xor    %esi,%esi
xor    %eax,%eax
jmp    1030 <error@plt>

LLVM IR (-O0):
@.str = [33 x i8] c"invalid field specification `%s'\00"
define void @badfieldspec(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 (i32, i32, i8*, i8*, ...) bitcast (i32 (...)* @error to i32 (i32, i32, i8*, i8*, ...)*)(i32 2, i32 0, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [33 x i8] c"invalid field specification `%s'\00"
define void @badfieldspec(i8* %0) {
%2 = tail call i32 (i32, i32, i8*, i8*, ...) bitcast (i32 (...)* @error to i32 (i32, i32, i8*, i8*, ...)*)(i32 2, i32 0, i8* getelementptr inbounds ([33 x i8], [33 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
struct telnetd_state {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ telnetd_close(struct telnetd_state *);
void exitt(struct telnetd_state *s, char *str) { telnetd_close(s); }


x86 assembly (clang, -O0):
<exitt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <telnetd_close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exitt>:
jmp    1030 <telnetd_close@plt>

LLVM IR (-O0):
%struct.telnetd_state = type { i32 }
define void @exitt(%struct.telnetd_state* %0, i8* %1) {
%3 = alloca %struct.telnetd_state*
%4 = alloca i8*
store %struct.telnetd_state* %0, %struct.telnetd_state** %3
store i8* %1, i8** %4
%5 = load %struct.telnetd_state*, %struct.telnetd_state** %3
%6 = call i32 @telnetd_close(%struct.telnetd_state* %5)
ret void
}

LLVM IR (-O2):
%struct.telnetd_state = type { i32 }
define void @exitt(%struct.telnetd_state* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @telnetd_close(%struct.telnetd_state* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
struct tcphdr {
  int /*<<< orphan*/ urg_ptr;
};

/* Variables and functions */
int /*<<< orphan*/ ntohs(int /*<<< orphan*/);
uint16_t tcphdr_urg_ptr_ntohs(struct tcphdr *h) { return ntohs(h->urg_ptr); }


x86 assembly (clang, -O0):
<tcphdr_urg_ptr_ntohs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
call   1030 <ntohs@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tcphdr_urg_ptr_ntohs>:
mov    (%rdi),%edi
jmp    1030 <ntohs@plt>

LLVM IR (-O0):
%struct.tcphdr = type { i32 }
define i32 @tcphdr_urg_ptr_ntohs(%struct.tcphdr* %0) {
%2 = alloca %struct.tcphdr*
store %struct.tcphdr* %0, %struct.tcphdr** %2
%3 = load %struct.tcphdr*, %struct.tcphdr** %2
%4 = getelementptr inbounds %struct.tcphdr, %struct.tcphdr* %3, i32 0, i32 0
%5 = load i32, i32* %4
%6 = call i32 @ntohs(i32 %5)
ret i32 %6
}

LLVM IR (-O2):
%struct.tcphdr = type { i32 }
define i32 @tcphdr_urg_ptr_ntohs(%struct.tcphdr* nocapture %0) {
%2 = getelementptr inbounds %struct.tcphdr, %struct.tcphdr* %0, i64 0, i32 0
%3 = load i32, i32* %2
%4 = tail call i32 @ntohs(i32 %3)
ret i32 %4
}
/* Variables and functions */
void *lwalloc_var(size_t);
int /*<<< orphan*/ lwgeom_init_allocators();
void *init_allocator(size_t size) {
  lwgeom_init_allocators();
  return lwalloc_var(size);
}


x86 assembly (clang, -O0):
<init_allocator>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1040 <lwgeom_init_allocators@plt>
mov    -0x8(%rbp),%rdi
call   1030 <lwalloc_var@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_allocator>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1040 <lwgeom_init_allocators@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <lwalloc_var@plt>

LLVM IR (-O0):
define i8* @init_allocator(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = call i32 (...) @lwgeom_init_allocators()
%4 = load i64, i64* %2
%5 = call i8* @lwalloc_var(i64 %4)
ret i8* %5
}

LLVM IR (-O2):
define i8* @init_allocator(i64 %0) {
%2 = tail call i32 (...) @lwgeom_init_allocators()
%3 = tail call i8* @lwalloc_var(i64 %0)
ret i8* %3
}
int IO_Serial_Bitrate(int bitrate) { return 0; }


x86 assembly (clang, -O0):
<IO_Serial_Bitrate>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IO_Serial_Bitrate>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @IO_Serial_Bitrate(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @IO_Serial_Bitrate(i32 %0) {
ret i32 0
}
void gtk_rc_parse_string() {}


x86 assembly (clang, -O0):
<gtk_rc_parse_string>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_rc_parse_string>:
ret

LLVM IR (-O0):
define void @gtk_rc_parse_string() {
ret void
}

LLVM IR (-O2):
define void @gtk_rc_parse_string() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;
struct sockaddr_in {
  int /*<<< orphan*/ sin_port;
};
struct sockaddr {
  int dummy;
};
typedef int socklen_t;

/* Variables and functions */
int /*<<< orphan*/ bzero(struct sockaddr_in *, int);
int /*<<< orphan*/ getsockname(int, struct sockaddr *, int *);
uint16_t getLocalPort(int fd) {
  struct sockaddr_in sin = {};
  socklen_t slen = sizeof(struct sockaddr);
  bzero(&sin, slen);
  getsockname(fd, (struct sockaddr *)&sin, &slen);
  return sin.sin_port;
}


x86 assembly (clang, -O0):
<getLocalPort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x4,%edx
call   1030 <memset@plt>
movl   $0x4,-0xc(%rbp)
mov    -0xc(%rbp),%esi
lea    -0x8(%rbp),%rdi
call   1040 <bzero@plt>
mov    -0x4(%rbp),%edi
lea    -0x8(%rbp),%rsi
lea    -0xc(%rbp),%rdx
call   1050 <getsockname@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getLocalPort>:
push   %r14
push   %rbx
push   %rax
mov    %edi,%ebx
movl   $0x0,(%rsp)
movl   $0x4,0x4(%rsp)
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x4,%esi
call   1030 <bzero@plt>
lea    0x4(%rsp),%rdx
mov    %ebx,%edi
mov    %r14,%rsi
call   1040 <getsockname@plt>
mov    (%rsp),%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @getLocalPort(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.sockaddr_in
%4 = alloca i32
store i32 %0, i32* %2
%5 = bitcast %struct.sockaddr_in* %3 to i8*
store i32 4, i32* %4
%6 = load i32, i32* %4
%7 = call i32 @bzero(%struct.sockaddr_in* %3, i32 %6)
%8 = load i32, i32* %2
%9 = bitcast %struct.sockaddr_in* %3 to %struct.sockaddr*
%10 = call i32 @getsockname(i32 %8, %struct.sockaddr* %9, i32* %4)
%11 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %3, i32 0, i32 0
%12 = load i32, i32* %11
ret i32 %12
}

LLVM IR (-O2):
%struct.sockaddr_in = type { i32 }
%struct.sockaddr = type { i32 }
define i32 @getLocalPort(i32 %0) {
%2 = alloca %struct.sockaddr_in
%3 = alloca i32
%4 = bitcast %struct.sockaddr_in* %2 to i8*
%5 = getelementptr inbounds %struct.sockaddr_in, %struct.sockaddr_in* %2, i64 0, i32 0
store i32 0, i32* %5
%6 = bitcast i32* %3 to i8*
store i32 4, i32* %3
%7 = call i32 @bzero(%struct.sockaddr_in* %2, i32 4)
%8 = bitcast %struct.sockaddr_in* %2 to %struct.sockaddr*
%9 = call i32 @getsockname(i32 %0, %struct.sockaddr* %8, i32* %3)
%10 = load i32, i32* %5
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ mxm(double const *, unsigned int *, double const *,
                       unsigned int *, double *, unsigned int *);
void tensor_mxm(double *C, unsigned int nc, const double *A, unsigned int na,
                const double *B, unsigned int nb) {
  mxm(A, &nc, B, &na, C, &nb);
}


x86 assembly (clang, -O0):
<tensor_mxm>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %ecx,-0x1c(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9d,-0x2c(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x28(%rbp),%rdx
mov    -0x8(%rbp),%r8
lea    -0xc(%rbp),%rsi
lea    -0x1c(%rbp),%rcx
lea    -0x2c(%rbp),%r9
call   1030 <mxm@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tensor_mxm>:
sub    $0x18,%rsp
mov    %rdi,%rax
mov    %esi,0x14(%rsp)
mov    %ecx,0x10(%rsp)
mov    %r9d,0xc(%rsp)
lea    0x14(%rsp),%rsi
lea    0x10(%rsp),%rcx
lea    0xc(%rsp),%r9
mov    %rdx,%rdi
mov    %r8,%rdx
mov    %rax,%r8
call   1030 <mxm@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
define void @tensor_mxm(double* %0, i32 %1, double* %2, i32 %3, double* %4, i32 %5) {
%7 = alloca double*
%8 = alloca i32
%9 = alloca double*
%10 = alloca i32
%11 = alloca double*
%12 = alloca i32
store double* %0, double** %7
store i32 %1, i32* %8
store double* %2, double** %9
store i32 %3, i32* %10
store double* %4, double** %11
store i32 %5, i32* %12
%13 = load double*, double** %9
%14 = load double*, double** %11
%15 = load double*, double** %7
%16 = call i32 @mxm(double* %13, i32* %8, double* %14, i32* %10, double* %15, i32* %12)
ret void
}

LLVM IR (-O2):
define void @tensor_mxm(double* %0, i32 %1, double* %2, i32 %3, double* %4, i32 %5) {
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i32 %1, i32* %7
store i32 %3, i32* %8
store i32 %5, i32* %9
%10 = call i32 @mxm(double* %2, i32* %7, double* %4, i32* %8, double* %0, i32* %9)
ret void
}
/* Type definitions */
struct SN_env {
  int dummy;
};

/* Variables and functions */
struct SN_env *SN_create_env(int /*<<< orphan*/, int, int);
extern struct SN_env *romanian_UTF_8_create_env(void) {
  return SN_create_env(0, 3, 1);
}


x86 assembly (clang, -O0):
<romanian_UTF_8_create_env>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
mov    $0x3,%esi
mov    $0x1,%edx
call   1030 <SN_create_env@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<romanian_UTF_8_create_env>:
xor    %edi,%edi
mov    $0x3,%esi
mov    $0x1,%edx
jmp    1030 <SN_create_env@plt>

LLVM IR (-O0):
%struct.SN_env = type { i32 }
define %struct.SN_env* @romanian_UTF_8_create_env() {
%1 = call %struct.SN_env* @SN_create_env(i32 0, i32 3, i32 1)
ret %struct.SN_env* %1
}

LLVM IR (-O2):
%struct.SN_env = type { i32 }
define %struct.SN_env* @romanian_UTF_8_create_env() {
%1 = tail call %struct.SN_env* @SN_create_env(i32 0, i32 3, i32 1)
ret %struct.SN_env* %1
}
/* Variables and functions */
int /*<<< orphan*/ abort();
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int posix_memalign(void **, size_t, size_t);
int /*<<< orphan*/ stderr;
char *strerror(int);
void *align_malloc(size_t align, size_t size) {
  void *ptr;
  int ret = posix_memalign(&ptr, align, size);
  if (ret != 0) {
    fprintf(stderr, strerror(ret));
    abort();
  }
  return ptr;
}


x86 assembly (clang, -O0):
<align_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    -0x18(%rbp),%rdi
call   1050 <posix_memalign@plt>
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
je     1194 <align_malloc+0x54>
mov    0x2e6b(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x20(%rbp)
mov    -0x1c(%rbp),%edi
call   1060 <strerror@plt>
mov    -0x20(%rbp),%edi
mov    %rax,%rsi
call   1040 <fprintf@plt>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<align_malloc>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rdx
mov    %rdi,%rsi
lea    0x8(%rsp),%rdi
call   1050 <posix_memalign@plt>
test   %eax,%eax
jne    1164 <align_malloc+0x24>
mov    0x8(%rsp),%rax
add    $0x10,%rsp
pop    %rbx
ret
mov    0x2e75(%rip),%rcx
mov    (%rcx),%ebx
mov    %eax,%edi
call   1060 <strerror@plt>
mov    %ebx,%edi
mov    %rax,%rsi
call   1040 <fprintf@plt>
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
@stderr = global i32 0
define i8* @align_malloc(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
%5 = alloca i8*
%6 = alloca i32
store i64 %0, i64* %3
store i64 %1, i64* %4
%7 = load i64, i64* %3
%8 = load i64, i64* %4
%9 = call i32 @posix_memalign(i8** %5, i64 %7, i64 %8)
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp ne i32 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %2
%13 = load i32, i32* @stderr
%14 = load i32, i32* %6
%15 = call i8* @strerror(i32 %14)
%16 = call i32 @fprintf(i32 %13, i8* %15)
%17 = call i32 (...) @abort()
unreachable
18: ; preds = %2
%19 = load i8*, i8** %5
ret i8* %19
}

LLVM IR (-O2):
@stderr = global i32 0
define i8* @align_malloc(i64 %0, i64 %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
%5 = call i32 @posix_memalign(i8** %3, i64 %0, i64 %1)
%6 = icmp eq i32 %5, 0
br i1 %6, label %12, label %7
7: ; preds = %2
%8 = load i32, i32* @stderr
%9 = call i8* @strerror(i32 %5)
%10 = call i32 @fprintf(i32 %8, i8* %9)
%11 = call i32 (...) @abort()
unreachable
12: ; preds = %2
%13 = load i8*, i8** %3
ret i8* %13
}
void RTStrToUInt16Ex(void) {}


x86 assembly (clang, -O0):
<RTStrToUInt16Ex>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTStrToUInt16Ex>:
ret

LLVM IR (-O0):
define void @RTStrToUInt16Ex() {
ret void
}

LLVM IR (-O2):
define void @RTStrToUInt16Ex() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ POP();
void drop(void) { POP(); }


x86 assembly (clang, -O0):
<drop>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <POP@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<drop>:
xor    %eax,%eax
jmp    1030 <POP@plt>

LLVM IR (-O0):
define void @drop() {
%1 = call i32 (...) @POP()
ret void
}

LLVM IR (-O2):
define void @drop() {
%1 = tail call i32 (...) @POP()
ret void
}
void av_d3d11va_alloc_context() {}


x86 assembly (clang, -O0):
<av_d3d11va_alloc_context>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_d3d11va_alloc_context>:
ret

LLVM IR (-O0):
define void @av_d3d11va_alloc_context() {
ret void
}

LLVM IR (-O2):
define void @av_d3d11va_alloc_context() {
ret void
}
void freeA_i(int **ip, int size) {
  int i;
  for (i = 0; i < size; ++i) {
    free(ip[i]);
  }
  free(ip);
}


x86 assembly (clang, -O0):
<freeA_i>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1151 <freeA_i+0x41>
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0x10(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x10(%rbp)
jmp    1126 <freeA_i+0x16>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freeA_i>:
push   %r15
push   %r14
push   %rbx
mov    %rdi,%r14
test   %esi,%esi
jle    1142 <freeA_i+0x32>
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
mov    (%r14,%rbx,8),%rdi
call   1030 <free@plt>
add    $0x1,%rbx
cmp    %rbx,%r15
jne    1130 <freeA_i+0x20>
mov    %r14,%rdi
pop    %rbx
pop    %r14
pop    %r15
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @freeA_i(i32** %0, i32 %1) {
%3 = alloca i32**
%4 = alloca i32
%5 = alloca i32
store i32** %0, i32*** %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %4
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32**, i32*** %3
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32*, i32** %11, i64 %13
%15 = load i32*, i32** %14
%16 = bitcast i32* %15 to i8*
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load i32**, i32*** %3
%22 = bitcast i32** %21 to i8*
ret void
}

LLVM IR (-O2):
define void @freeA_i(i32** nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32*, i32** %0, i64 %7
%9 = bitcast i32** %8 to i8**
%10 = load i8*, i8** %9
tail call void @free(i8* %10)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = bitcast i32** %0 to i8*
tail call void @free(i8* %14)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ something(int);
int main() {
  something(-1);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0xffffffff,%edi
call   1030 <something@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xffffffff,%edi
call   1030 <something@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @something(i32 -1)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @something(i32 -1)
ret i32 0
}
int is_open_brace(char c) {
  return c == '(' || c == '[' || c == '{' || c == '<';
}


x86 assembly (clang, -O0):
<is_open_brace>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x28,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_open_brace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x5b,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_open_brace+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x7b,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_open_brace+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0x3c,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_open_brace>:
mov    $0x1,%eax
cmp    $0x28,%dil
je     1120 <is_open_brace+0x20>
cmp    $0x5b,%dil
je     1120 <is_open_brace+0x20>
cmp    $0x7b,%dil
je     1120 <is_open_brace+0x20>
xor    %eax,%eax
cmp    $0x3c,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_open_brace(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 40
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 91
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 123
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 60
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_open_brace(i8 signext %0) {
switch i8 %0, label %2 [
i8 123, label %5
i8 91, label %5
i8 40, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 60
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ glDrawBuffer(unsigned int);
void DrawBuffer(unsigned int m) { glDrawBuffer(m); }


x86 assembly (clang, -O0):
<DrawBuffer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <glDrawBuffer@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<DrawBuffer>:
jmp    1030 <glDrawBuffer@plt>

LLVM IR (-O0):
define void @DrawBuffer(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @glDrawBuffer(i32 %3)
ret void
}

LLVM IR (-O2):
define void @DrawBuffer(i32 %0) {
%2 = tail call i32 @glDrawBuffer(i32 %0)
ret void
}
int kill(int pid) { return 0; }


x86 assembly (clang, -O0):
<kill>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<kill>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @kill(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @kill(i32 %0) {
ret i32 0
}
float _fminf(float x, float y) {
  float result = y;
  if (x < y) {
    result = x;
  }
  return result;
}


x86 assembly (clang, -O0):
<_fminf>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  %xmm1,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0x4(%rbp),%xmm1
movss  -0x8(%rbp),%xmm0
ucomiss %xmm1,%xmm0
jbe    1135 <_fminf+0x35>
movss  -0x4(%rbp),%xmm0
movss  %xmm0,-0xc(%rbp)
movss  -0xc(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<_fminf>:
minss  %xmm1,%xmm0
ret

LLVM IR (-O0):
define float @_fminf(float %0, float %1) {
%3 = alloca float
%4 = alloca float
%5 = alloca float
store float %0, float* %3
store float %1, float* %4
%6 = load float, float* %4
store float %6, float* %5
%7 = load float, float* %3
%8 = load float, float* %4
%9 = fcmp olt float %7, %8
br i1 %9, label %10, label %12
10: ; preds = %2
%11 = load float, float* %3
store float %11, float* %5
br label %12
12: ; preds = %10, %2
%13 = load float, float* %5
ret float %13
}

LLVM IR (-O2):
define float @_fminf(float %0, float %1) {
%3 = fcmp olt float %0, %1
%4 = select i1 %3, float %0, float %1
ret float %4
}
/* Variables and functions */
void __div0(void) {
  while (-1)
    ;
}


x86 assembly (clang, -O0):
<__div0>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <__div0+0x9>
jmp    1109 <__div0+0x9>

x86 assembly (clang, -O2):
<__div0>:
jmp    1100 <__div0>

LLVM IR (-O0):
define void @__div0() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @__div0() {
br label %1
1: ; preds = %0, %1
br label %1
}
long double ceill(long double x) {}


x86 assembly (clang, -O0):
<ceill>:
push   %rbp
mov    %rsp,%rbp
fldt   0x10(%rbp)
fstpt  -0x20(%rbp)
fldt   -0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ceill>:
fldz
ret

LLVM IR (-O0):
define x86_fp80 @ceill(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %3
%4 = load x86_fp80, x86_fp80* %2
ret x86_fp80 %4
}

LLVM IR (-O2):
define x86_fp80 @ceill(x86_fp80 %0) {
ret x86_fp80 undef
}
__attribute__((always_)) int
__test_and_change_bit(int nr, volatile unsigned long *addr) {
  int oldbit;
  __asm__ __volatile__("btcl %2,%1\n\tsbbl %0,%0"
                       : "=r"(oldbit), "=m"((*(volatile long *)addr))
                       : "Ir"(nr)
                       : "memory");
  return oldbit;
}


x86 assembly (clang, -O0):
<__test_and_change_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x4(%rbp),%ecx
btc    %ecx,(%rax)
sbb    %eax,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__test_and_change_bit>:
btc    %edi,(%rsi)
sbb    %eax,%eax
ret

LLVM IR (-O0):
define i32 @__test_and_change_bit(i32 %0, i64* %1) {
%3 = alloca i32
%4 = alloca i64*
%5 = alloca i32
store i32 %0, i32* %3
store i64* %1, i64** %4
%6 = load i64*, i64** %4
%7 = load i32, i32* %3
%8 = call i32 asm sideeffect "btcl $2,$1\0A\09sbbl $0,$0", "=r,=*m,Ir,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %6, i32 %7)
store i32 %8, i32* %5
%9 = load i32, i32* %5
ret i32 %9
}

LLVM IR (-O2):
define i32 @__test_and_change_bit(i32 %0, i64* %1) {
%3 = tail call i32 asm sideeffect "btcl $2,$1\0A\09sbbl $0,$0", "=r,=*m,Ir,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* elementtype(i64) %1, i32 %0)
ret i32 %3
}
void siever_init(void) {}


x86 assembly (clang, -O0):
<siever_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<siever_init>:
ret

LLVM IR (-O0):
define void @siever_init() {
ret void
}

LLVM IR (-O2):
define void @siever_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ old();
void warnings2() { old(); }


x86 assembly (clang, -O0):
<warnings2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <old@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<warnings2>:
xor    %eax,%eax
jmp    1030 <old@plt>

LLVM IR (-O0):
define void @warnings2() {
%1 = call i32 (...) @old()
ret void
}

LLVM IR (-O2):
define void @warnings2() {
%1 = tail call i32 (...) @old()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_SUCCESS;
int divisors(int);
int /*<<< orphan*/ exit(int /*<<< orphan*/);
void gen_divisors(int *result, const int start, const int end) {
  for (int i = start; i < end; i++) {
    result[i] = divisors(i);
  }
  exit(EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<gen_divisors>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x10(%rbp),%eax
jge    1167 <gen_divisors+0x47>
mov    -0x14(%rbp),%edi
call   1030 <divisors@plt>
mov    %eax,%edx
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %edx,(%rax,%rcx,4)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1138 <gen_divisors+0x18>
mov    0x2e72(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<gen_divisors>:
push   %rbp
push   %r14
push   %rbx
cmp    %edx,%esi
jge    1155 <gen_divisors+0x35>
mov    %edx,%r14d
mov    %esi,%ebp
movslq %esi,%rax
lea    (%rdi,%rax,4),%rbx
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %ebp,%edi
call   1030 <divisors@plt>
mov    %eax,(%rbx)
add    $0x4,%rbx
add    $0x1,%ebp
cmp    %ebp,%r14d
jne    1140 <gen_divisors+0x20>
mov    0x2e84(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_SUCCESS = global i32 0
define void @gen_divisors(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i32, i32* %5
store i32 %8, i32* %7
br label %9
9: ; preds = %20, %3
%10 = load i32, i32* %7
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %23
13: ; preds = %9
%14 = load i32, i32* %7
%15 = call i32 @divisors(i32 %14)
%16 = load i32*, i32** %4
%17 = load i32, i32* %7
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, i32* %16, i64 %18
store i32 %15, i32* %19
br label %20
20: ; preds = %13
%21 = load i32, i32* %7
%22 = add nsw i32 %21, 1
store i32 %22, i32* %7
br label %9
23: ; preds = %9
%24 = load i32, i32* @EXIT_SUCCESS
%25 = call i32 @exit(i32 %24)
unreachable
}

LLVM IR (-O2):
@EXIT_SUCCESS = global i32 0
define void @gen_divisors(i32* nocapture writeonly %0, i32 %1, i32 %2) {
%4 = icmp slt i32 %1, %2
br i1 %4, label %5, label %7
5: ; preds = %3
%6 = sext i32 %1 to i64
br label %10
7: ; preds = %10, %3
%8 = load i32, i32* @EXIT_SUCCESS
%9 = tail call i32 @exit(i32 %8)
unreachable
10: ; preds = %5, %10
%11 = phi i64 [ %6, %5 ], [ %15, %10 ]
%12 = trunc i64 %11 to i32
%13 = tail call i32 @divisors(i32 %12)
%14 = getelementptr inbounds i32, i32* %0, i64 %11
store i32 %13, i32* %14
%15 = add nsw i64 %11, 1
%16 = trunc i64 %15 to i32
%17 = icmp eq i32 %16, %2
br i1 %17, label %7, label %10
}
/* Variables and functions */
double cosf(float);
float hamming(int k, int N) {
  float p = ((float)(k)) / ((float)(N));
  return 0.54 - 0.46 * cosf(2.f * 3.14159265358979323846f * p);
}


x86 assembly (clang, -O0):
<hamming>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
cvtsi2ssl -0x8(%rbp),%xmm1
divss  %xmm1,%xmm0
movss  %xmm0,-0xc(%rbp)
movss  0xed7(%rip),%xmm0
mulss  -0xc(%rbp),%xmm0
call   1030 <cosf@plt>
movsd  0xeb5(%rip),%xmm1
mulsd  %xmm1,%xmm0
movsd  0xeb1(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<hamming>:
push   %rax
cvtsi2ss %edi,%xmm0
cvtsi2ss %esi,%xmm1
divss  %xmm1,%xmm0
mulss  0xedb(%rip),%xmm0
call   1030 <cosf@plt>
mulsd  0xed6(%rip),%xmm0
addsd  0xed6(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @hamming(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca float
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = sitofp i32 %6 to float
%8 = load i32, i32* %4
%9 = sitofp i32 %8 to float
%10 = fdiv float %7, %9
store float %10, float* %5
%11 = load float, float* %5
%12 = fmul float 0x401921FB60000000, %11
%13 = call double @cosf(float %12)
%14 = call double @llvm.fmuladd.f64(double -4.600000e-01, double %13, double 5.400000e-01)
%15 = fptrunc double %14 to float
ret float %15
}

LLVM IR (-O2):
define float @hamming(i32 %0, i32 %1) {
%3 = sitofp i32 %0 to float
%4 = sitofp i32 %1 to float
%5 = fdiv float %3, %4
%6 = fmul float %5, 0x401921FB60000000
%7 = tail call double @cosf(float %6)
%8 = tail call double @llvm.fmuladd.f64(double %7, double -4.600000e-01, double 5.400000e-01)
%9 = fptrunc double %8 to float
ret float %9
}