xunge/DecIR huggingface dataset:
int fib(int n) {
  if (n <= 2)
    return 1;
  return fib(n - 1) + fib(n - 2);
}


x86 assembly (clang, -O0):
<fib>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jg     1131 <fib+0x21>
movl   $0x1,-0x4(%rbp)
jmp    1154 <fib+0x44>
mov    -0x8(%rbp),%edi
sub    $0x1,%edi
call   1030 <fib@plt>
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%edi
sub    $0x2,%edi
call   1030 <fib@plt>
mov    %eax,%ecx
mov    -0xc(%rbp),%eax
add    %ecx,%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fib>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1,%ebp
cmp    $0x3,%edi
jl     1145 <fib+0x35>
mov    %edi,%ebx
add    $0x2,%ebx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
lea    -0x3(%rbx),%edi
call   1030 <fib@plt>
add    %eax,%ebp
add    $0xfffffffe,%ebx
cmp    $0x4,%ebx
ja     1130 <fib+0x20>
add    $0x1,%ebp
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @fib(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sle i32 %4, 2
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 1, i32* %2
br label %15
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sub nsw i32 %8, 1
%10 = call i32 @fib(i32 %9)
%11 = load i32, i32* %3
%12 = sub nsw i32 %11, 2
%13 = call i32 @fib(i32 %12)
%14 = add nsw i32 %10, %13
store i32 %14, i32* %2
br label %15
15: ; preds = %7, %6
%16 = load i32, i32* %2
ret i32 %16
}

LLVM IR (-O2):
define i32 @fib(i32 %0) {
%2 = icmp slt i32 %0, 3
br i1 %2, label %13, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ %0, %1 ]
%5 = phi i32 [ %9, %3 ], [ 0, %1 ]
%6 = add nsw i32 %4, -1
%7 = tail call i32 @fib(i32 %6)
%8 = add nsw i32 %4, -2
%9 = add nsw i32 %7, %5
%10 = icmp ult i32 %4, 5
br i1 %10, label %11, label %3
11: ; preds = %3
%12 = add i32 %9, 1
br label %13
13: ; preds = %11, %1
%14 = phi i32 [ 1, %1 ], [ %12, %11 ]
ret i32 %14
}
int synaptics_is_pt_packet(unsigned char *buf) {
  return (buf[0] & 0xFC) == 0x84 && (buf[3] & 0xCC) == 0xC4;
}


x86 assembly (clang, -O0):
<synaptics_is_pt_packet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%ecx
and    $0xfc,%ecx
xor    %eax,%eax
cmp    $0x84,%ecx
mov    %al,-0x9(%rbp)
jne    113e <synaptics_is_pt_packet+0x3e>
mov    -0x8(%rbp),%rax
movzbl 0x3(%rax),%eax
and    $0xcc,%eax
cmp    $0xc4,%eax
sete   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<synaptics_is_pt_packet>:
mov    (%rdi),%cl
and    $0xfc,%cl
xor    %eax,%eax
cmp    $0x84,%cl
jne    111a <synaptics_is_pt_packet+0x1a>
mov    0x3(%rdi),%cl
and    $0xcc,%cl
xor    %eax,%eax
cmp    $0xc4,%cl
sete   %al
ret

LLVM IR (-O0):
define i32 @synaptics_is_pt_packet(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = and i32 %6, 252
%8 = icmp eq i32 %7, 132
br i1 %8, label %9, label %16
9: ; preds = %1
%10 = load i8*, i8** %2
%11 = getelementptr inbounds i8, i8* %10, i64 3
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = and i32 %13, 204
%15 = icmp eq i32 %14, 196
br label %16
16: ; preds = %9, %1
%17 = phi i1 [ false, %1 ], [ %15, %9 ]
%18 = zext i1 %17 to i32
ret i32 %18
}

LLVM IR (-O2):
define i32 @synaptics_is_pt_packet(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -4
%4 = icmp eq i8 %3, -124
br i1 %4, label %5, label %11
5: ; preds = %1
%6 = getelementptr inbounds i8, i8* %0, i64 3
%7 = load i8, i8* %6
%8 = and i8 %7, -52
%9 = icmp eq i8 %8, -60
%10 = zext i1 %9 to i32
br label %11
11: ; preds = %5, %1
%12 = phi i32 [ 0, %1 ], [ %10, %5 ]
ret i32 %12
}
/* Type definitions */
struct ship {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ Write(int, struct ship *, long, int /*<<< orphan*/,
                         int /*<<< orphan*/, int /*<<< orphan*/);
void send_rig1(struct ship *ship, long a) { Write(33, ship, a, 0, 0, 0); }


x86 assembly (clang, -O0):
<send_rig1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    $0x21,%edi
xor    %r9d,%r9d
mov    %r9d,%ecx
mov    %r9d,%r8d
call   1030 <Write@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_rig1>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    $0x21,%edi
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <Write@plt>

LLVM IR (-O0):
%struct.ship = type { i32 }
define void @send_rig1(%struct.ship* %0, i64 %1) {
%3 = alloca %struct.ship*
%4 = alloca i64
store %struct.ship* %0, %struct.ship** %3
store i64 %1, i64* %4
%5 = load %struct.ship*, %struct.ship** %3
%6 = load i64, i64* %4
%7 = call i32 @Write(i32 33, %struct.ship* %5, i64 %6, i32 0, i32 0, i32 0)
ret void
}

LLVM IR (-O2):
%struct.ship = type { i32 }
define void @send_rig1(%struct.ship* %0, i64 %1) {
%3 = tail call i32 @Write(i32 33, %struct.ship* %0, i64 %1, i32 0, i32 0, i32 0)
ret void
}
double lerp(double t, double a, double b) { return ((1 - t) * a) + (t * b); }


x86 assembly (clang, -O0):
<lerp>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  0xee5(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  -0x10(%rbp),%xmm2
movsd  -0x8(%rbp),%xmm1
mulsd  -0x18(%rbp),%xmm1
mulsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<lerp>:
movsd  0xef8(%rip),%xmm3
subsd  %xmm0,%xmm3
mulsd  %xmm2,%xmm0
mulsd  %xmm1,%xmm3
addsd  %xmm3,%xmm0
ret

LLVM IR (-O0):
define double @lerp(double %0, double %1, double %2) {
%4 = alloca double
%5 = alloca double
%6 = alloca double
store double %0, double* %4
store double %1, double* %5
store double %2, double* %6
%7 = load double, double* %4
%8 = fsub double 1.000000e+00, %7
%9 = load double, double* %5
%10 = load double, double* %4
%11 = load double, double* %6
%12 = fmul double %10, %11
%13 = call double @llvm.fmuladd.f64(double %8, double %9, double %12)
ret double %13
}

LLVM IR (-O2):
define double @lerp(double %0, double %1, double %2) {
%4 = fsub double 1.000000e+00, %0
%5 = fmul double %0, %2
%6 = tail call double @llvm.fmuladd.f64(double %4, double %1, double %5)
ret double %6
}
/* Variables and functions */
double hmean(double, double);
int /*<<< orphan*/ printf(char *, double);
int /*<<< orphan*/ scanf(char *, double *, double *);
int main(void) {
  double a, b;
  scanf("%lf%lf", &a, &b);
  printf("%g\n", hmean(a, b));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x10(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1050 <scanf@plt>
movsd  -0x10(%rbp),%xmm0
movsd  -0x18(%rbp),%xmm1
call   1040 <hmean@plt>
lea    0xe9e(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
sub    $0x18,%rsp
lea    0xec5(%rip),%rdi
lea    0x10(%rsp),%rsi
lea    0x8(%rsp),%rdx
call   1050 <scanf@plt>
movsd  0x10(%rsp),%xmm0
movsd  0x8(%rsp),%xmm1
call   1040 <hmean@plt>
lea    0xea5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
@.str = [7 x i8] c"%lf%lf\00"
@.str.1 = [4 x i8] c"%g\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca double
%3 = alloca double
store i32 0, i32* %1
%4 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), double* %2, double* %3)
%5 = load double, double* %2
%6 = load double, double* %3
%7 = call double @hmean(double %5, double %6)
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [7 x i8] c"%lf%lf\00"
@.str.1 = [4 x i8] c"%g\0A\00"
define i32 @main() {
%1 = alloca double
%2 = alloca double
%3 = bitcast double* %1 to i8*
%4 = bitcast double* %2 to i8*
%5 = call i32 @scanf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), double* %1, double* %2)
%6 = load double, double* %1
%7 = load double, double* %2
%8 = call double @hmean(double %6, double %7)
%9 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), double %8)
ret i32 0
}
/* Variables and functions */
int futex(void volatile *, int, int, int /*<<< orphan*/ *, int /*<<< orphan*/ *,
          int /*<<< orphan*/);
int __futex_syscall3(volatile void *ftx, int op, int val) {
  return futex(ftx, op, val, NULL, NULL, 0);
}


x86 assembly (clang, -O0):
<__futex_syscall3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
mov    %r8,%rcx
call   1030 <futex@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__futex_syscall3>:
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <futex@plt>

LLVM IR (-O0):
define i32 @__futex_syscall3(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i32 @futex(i8* %7, i32 %8, i32 %9, i32* null, i32* null, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @__futex_syscall3(i8* %0, i32 %1, i32 %2) {
%4 = tail call i32 @futex(i8* %0, i32 %1, i32 %2, i32* null, i32* null, i32 0)
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int ssize_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
uint8_t sancus_u8zd(ssize_t v) {
  assert((v >= 0) && (v <= 0xff));
  return (uint8_t)v;
}


x86 assembly (clang, -O0):
<sancus_u8zd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jl     1137 <sancus_u8zd+0x27>
cmpl   $0xff,-0x4(%rbp)
setle  %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sancus_u8zd>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x100,%ebx
setb   %dil
call   1030 <assert@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @sancus_u8zd(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 255
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ false, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @assert(i32 %10)
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @sancus_u8zd(i32 returned %0) {
%2 = icmp ult i32 %0, 256
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
ret i32 %0
}
double r4(void *x) { return *(double *)(x + 32764); }


x86 assembly (clang, -O0):
<r4>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsd  0x7ffc(%rax),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<r4>:
movsd  0x7ffc(%rdi),%xmm0
ret

LLVM IR (-O0):
define double @r4(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr i8, i8* %3, i64 32764
%5 = bitcast i8* %4 to double*
%6 = load double, double* %5
ret double %6
}

LLVM IR (-O2):
define double @r4(i8* nocapture %0) {
%2 = getelementptr i8, i8* %0, i64 32764
%3 = bitcast i8* %2 to double*
%4 = load double, double* %3
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ puts(char *);
int /*<<< orphan*/ raise(int /*<<< orphan*/);
void times_up(int sig) {
  puts("\nTIME'S UP!");
  raise(SIGINT);
}


x86 assembly (clang, -O0):
<times_up>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
lea    0xece(%rip),%rdi
call   1040 <puts@plt>
mov    0x2eaa(%rip),%rax
mov    (%rax),%edi
call   1030 <raise@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<times_up>:
push   %rax
lea    0xed8(%rip),%rdi
call   1040 <puts@plt>
mov    0x2eb4(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1030 <raise@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"\0ATIME'S UP!\00"
@SIGINT = global i32 0
define void @times_up(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @puts(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%4 = load i32, i32* @SIGINT
%5 = call i32 @raise(i32 %4)
ret void
}

LLVM IR (-O2):
@.str = [12 x i8] c"\0ATIME'S UP!\00"
@SIGINT = global i32 0
define void @times_up(i32 %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* @SIGINT
%4 = tail call i32 @raise(i32 %3)
ret void
}
/* Variables and functions */
int Frama_C_interval(int, int);
int main(int argc, char *argv[]) {
  int array[25];
  array[argc] = 7;
  int idx = Frama_C_interval(-1, 26);
  idx = idx / 2;
  array[idx] = 0x1234;
  idx = idx * 2 + 3;
  array[idx] = 0x4567;
  idx += 28;
  array[idx] = 15;
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movslq -0x8(%rbp),%rax
movl   $0x7,-0x80(%rbp,%rax,4)
mov    $0xffffffff,%edi
mov    $0x1a,%esi
call   1030 <Frama_C_interval@plt>
mov    %eax,-0x84(%rbp)
mov    -0x84(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x84(%rbp)
movslq -0x84(%rbp),%rax
movl   $0x1234,-0x80(%rbp,%rax,4)
mov    -0x84(%rbp),%eax
shl    $0x1,%eax
add    $0x3,%eax
mov    %eax,-0x84(%rbp)
movslq -0x84(%rbp),%rax
movl   $0x4567,-0x80(%rbp,%rax,4)
mov    -0x84(%rbp),%eax
add    $0x1c,%eax
mov    %eax,-0x84(%rbp)
movslq -0x84(%rbp),%rax
movl   $0xf,-0x80(%rbp,%rax,4)
xor    %eax,%eax
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xffffffff,%edi
mov    $0x1a,%esi
call   1030 <Frama_C_interval@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca [25 x i32]
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = load i32, i32* %4
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds [25 x i32], [25 x i32]* %6, i64 0, i64 %9
store i32 7, i32* %10
%11 = call i32 @Frama_C_interval(i32 -1, i32 26)
store i32 %11, i32* %7
%12 = load i32, i32* %7
%13 = sdiv i32 %12, 2
store i32 %13, i32* %7
%14 = load i32, i32* %7
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds [25 x i32], [25 x i32]* %6, i64 0, i64 %15
store i32 4660, i32* %16
%17 = load i32, i32* %7
%18 = mul nsw i32 %17, 2
%19 = add nsw i32 %18, 3
store i32 %19, i32* %7
%20 = load i32, i32* %7
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds [25 x i32], [25 x i32]* %6, i64 0, i64 %21
store i32 17767, i32* %22
%23 = load i32, i32* %7
%24 = add nsw i32 %23, 28
store i32 %24, i32* %7
%25 = load i32, i32* %7
%26 = sext i32 %25 to i64
%27 = getelementptr inbounds [25 x i32], [25 x i32]* %6, i64 0, i64 %26
store i32 15, i32* %27
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @Frama_C_interval(i32 -1, i32 26)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128d;

/* Variables and functions */
int /*<<< orphan*/ _mm_cmplt_pd(int /*<<< orphan*/, int /*<<< orphan*/);
__m128d test_mm_cmplt_pd(__m128d __a, __m128d __b) {
  return _mm_cmplt_pd(__a, __b);
}


x86 assembly (clang, -O0):
<test_mm_cmplt_pd>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_cmplt_pd@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_mm_cmplt_pd>:
jmp    1030 <_mm_cmplt_pd@plt>

LLVM IR (-O0):
define i32 @test_mm_cmplt_pd(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_cmplt_pd(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_mm_cmplt_pd(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_cmplt_pd(i32 %0, i32 %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ parse_input(int, char **);
int main(int argc, char *argv[]) {
  parse_input(argc, argv);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <parse_input@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <parse_input@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @parse_input(i32 %6, i8** %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @parse_input(i32 %0, i8** %1)
ret i32 0
}
int dd_leq(const double *a, const double *b) {
  return (a[0] < b[0] || (a[0] == b[0] && a[1] <= b[1])) ? 1 : 0;
}


x86 assembly (clang, -O0):
<dd_leq>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm1
mov    -0x10(%rbp),%rax
movsd  (%rax),%xmm0
mov    $0x1,%al
ucomisd %xmm1,%xmm0
mov    %al,-0x11(%rbp)
ja     116e <dd_leq+0x6e>
mov    -0x8(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x10(%rbp),%rcx
xor    %eax,%eax
ucomisd (%rcx),%xmm0
mov    %al,-0x12(%rbp)
jne    1168 <dd_leq+0x68>
jp     1168 <dd_leq+0x68>
mov    -0x8(%rbp),%rax
movsd  0x8(%rax),%xmm1
mov    -0x10(%rbp),%rax
movsd  0x8(%rax),%xmm0
ucomisd %xmm1,%xmm0
setae  %al
mov    %al,-0x12(%rbp)
mov    -0x12(%rbp),%al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%dl
xor    %eax,%eax
mov    $0x1,%ecx
test   $0x1,%dl
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dd_leq>:
movsd  (%rdi),%xmm0
movsd  (%rsi),%xmm1
mov    $0x1,%eax
ucomisd %xmm0,%xmm1
ja     112a <dd_leq+0x2a>
ucomisd %xmm1,%xmm0
jne    112b <dd_leq+0x2b>
jp     112b <dd_leq+0x2b>
movsd  0x8(%rsi),%xmm0
xor    %eax,%eax
ucomisd 0x8(%rdi),%xmm0
setae  %al
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @dd_leq(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
%5 = load double*, double** %3
%6 = getelementptr inbounds double, double* %5, i64 0
%7 = load double, double* %6
%8 = load double*, double** %4
%9 = getelementptr inbounds double, double* %8, i64 0
%10 = load double, double* %9
%11 = fcmp olt double %7, %10
br i1 %11, label %30, label %12
12: ; preds = %2
%13 = load double*, double** %3
%14 = getelementptr inbounds double, double* %13, i64 0
%15 = load double, double* %14
%16 = load double*, double** %4
%17 = getelementptr inbounds double, double* %16, i64 0
%18 = load double, double* %17
%19 = fcmp oeq double %15, %18
br i1 %19, label %20, label %28
20: ; preds = %12
%21 = load double*, double** %3
%22 = getelementptr inbounds double, double* %21, i64 1
%23 = load double, double* %22
%24 = load double*, double** %4
%25 = getelementptr inbounds double, double* %24, i64 1
%26 = load double, double* %25
%27 = fcmp ole double %23, %26
br label %28
28: ; preds = %20, %12
%29 = phi i1 [ false, %12 ], [ %27, %20 ]
br label %30
30: ; preds = %28, %2
%31 = phi i1 [ true, %2 ], [ %29, %28 ]
%32 = zext i1 %31 to i64
%33 = select i1 %31, i32 1, i32 0
ret i32 %33
}

LLVM IR (-O2):
define i32 @dd_leq(double* nocapture %0, double* nocapture %1) {
%3 = load double, double* %0
%4 = load double, double* %1
%5 = fcmp olt double %3, %4
br i1 %5, label %15, label %6
6: ; preds = %2
%7 = fcmp oeq double %3, %4
br i1 %7, label %8, label %15
8: ; preds = %6
%9 = getelementptr inbounds double, double* %0, i64 1
%10 = load double, double* %9
%11 = getelementptr inbounds double, double* %1, i64 1
%12 = load double, double* %11
%13 = fcmp ole double %10, %12
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %6, %8, %2
%16 = phi i32 [ 1, %2 ], [ 0, %6 ], [ %14, %8 ]
ret i32 %16
}
void par001s(x, npoints) int *x, npoints;
{
  int iam, np, ipoints;
#pragma omp parallel shared(x, npoints) private(iam, np, ipoints)
  {
    iam = omp_get_thread_num();
    np = omp_get_num_threads();
    ipoints = npoints / np;
    subdomain(x, iam, ipoints);
  }
}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    $0x0,%al
call   1030 <omp_get_thread_num@plt>
mov    %eax,-0x10(%rbp)
mov    $0x0,%al
call   1050 <omp_get_num_threads@plt>
mov    %eax,-0x14(%rbp)
mov    -0xc(%rbp),%eax
cltd
idivl  -0x14(%rbp)
mov    %eax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%esi
mov    -0x18(%rbp),%edx
mov    $0x0,%al
call   1040 <subdomain@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
push   %rbp
push   %r14
push   %rbx
mov    %esi,%ebx
mov    %rdi,%r14
xor    %eax,%eax
call   1030 <omp_get_thread_num@plt>
mov    %eax,%ebp
xor    %eax,%eax
call   1050 <omp_get_num_threads@plt>
mov    %eax,%ecx
mov    %ebx,%eax
cltd
idiv   %ecx
mov    %r14,%rdi
mov    %ebp,%esi
mov    %eax,%edx
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %rbp
jmp    1040 <subdomain@plt>

LLVM IR (-O0):
define void @par001s(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%8 = call i32 (...) @omp_get_thread_num()
store i32 %8, i32* %5
%9 = call i32 (...) @omp_get_num_threads()
store i32 %9, i32* %6
%10 = load i32, i32* %4
%11 = load i32, i32* %6
%12 = sdiv i32 %10, %11
store i32 %12, i32* %7
%13 = load i32*, i32** %3
%14 = load i32, i32* %5
%15 = load i32, i32* %7
%16 = call i32 (i32*, i32, i32, ...) bitcast (i32 (...)* @subdomain to i32 (i32*, i32, i32, ...)*)(i32* %13, i32 %14, i32 %15)
ret void
}

LLVM IR (-O2):
define void @par001s(i32* %0, i32 %1) {
%3 = tail call i32 (...) @omp_get_thread_num()
%4 = tail call i32 (...) @omp_get_num_threads()
%5 = sdiv i32 %1, %4
%6 = tail call i32 (i32*, i32, i32, ...) bitcast (i32 (...)* @subdomain to i32 (i32*, i32, i32, ...)*)(i32* %0, i32 %3, i32 %5)
ret void
}
/* Type definitions */
typedef int uint64_t;
typedef int uint32_t;

/* Variables and functions */
uint64_t __lshrdi3(uint64_t v, int cnt) {
  int c = cnt & 31;
  uint32_t vl = (uint32_t)v;
  uint32_t vh = (uint32_t)(v >> 32);
  if (cnt & 32) {
    vl = (vh >> c);
    vh = 0;
  } else {
    vl = (vl >> c) + (vh << (32 - c));
    vh = (vh >> c);
  }
  return ((uint64_t)vh << 32) + vl;
}


x86 assembly (clang, -O0):
<__lshrdi3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x1f,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x20,%ecx
sar    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%eax
and    $0x20,%eax
cmp    $0x0,%eax
je     114c <__lshrdi3+0x4c>
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
jmp    1173 <__lshrdi3+0x73>
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    -0x14(%rbp),%edx
mov    $0x20,%ecx
sub    -0xc(%rbp),%ecx
shl    %cl,%edx
mov    %edx,%ecx
add    %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
sar    %cl,%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    $0x20,%ecx
shl    %cl,%eax
add    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__lshrdi3>:
ret

LLVM IR (-O0):
define i32 @__lshrdi3(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%8 = load i32, i32* %4
%9 = and i32 %8, 31
store i32 %9, i32* %5
%10 = load i32, i32* %3
store i32 %10, i32* %6
%11 = load i32, i32* %3
%12 = ashr i32 %11, 32
store i32 %12, i32* %7
%13 = load i32, i32* %4
%14 = and i32 %13, 32
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %20
16: ; preds = %2
%17 = load i32, i32* %7
%18 = load i32, i32* %5
%19 = ashr i32 %17, %18
store i32 %19, i32* %6
store i32 0, i32* %7
br label %32
20: ; preds = %2
%21 = load i32, i32* %6
%22 = load i32, i32* %5
%23 = ashr i32 %21, %22
%24 = load i32, i32* %7
%25 = load i32, i32* %5
%26 = sub nsw i32 32, %25
%27 = shl i32 %24, %26
%28 = add nsw i32 %23, %27
store i32 %28, i32* %6
%29 = load i32, i32* %7
%30 = load i32, i32* %5
%31 = ashr i32 %29, %30
store i32 %31, i32* %7
br label %32
32: ; preds = %20, %16
%33 = load i32, i32* %7
%34 = shl i32 %33, 32
%35 = load i32, i32* %6
%36 = add nsw i32 %34, %35
ret i32 %36
}

LLVM IR (-O2):
define i32 @__lshrdi3(i32 %0, i32 %1) {
ret i32 poison
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
void timeo(void *arg) {
  printf("timeout function called w/ arg: [%s]\n", (char *)arg);
}


x86 assembly (clang, -O0):
<timeo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<timeo>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [38 x i8] c"timeout function called w/ arg: [%s]\0A\00"
define void @timeo(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [38 x i8] c"timeout function called w/ arg: [%s]\0A\00"
define void @timeo(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([38 x i8], [38 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ tss_t;

/* Variables and functions */
int kthread_setspecific(int /*<<< orphan*/, void *);
int tss_set(tss_t key, void *val) { return kthread_setspecific(key, val); }


x86 assembly (clang, -O0):
<tss_set>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <kthread_setspecific@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tss_set>:
jmp    1030 <kthread_setspecific@plt>

LLVM IR (-O0):
define i32 @tss_set(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = call i32 @kthread_setspecific(i32 %5, i8* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @tss_set(i32 %0, i8* %1) {
%3 = tail call i32 @kthread_setspecific(i32 %0, i8* %1)
ret i32 %3
}
char *ft_strcpy(char *dst, char *src) {
  int i;
  i = 0;
  while (*src) {
    *dst = *src;
    dst++;
    src++;
    i++;
  }
  *dst = '\0';
  return (dst - i);
}


x86 assembly (clang, -O0):
<ft_strcpy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x10(%rbp),%rax
cmpb   $0x0,(%rax)
je     1152 <ft_strcpy+0x52>
mov    -0x10(%rbp),%rax
mov    (%rax),%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <ft_strcpy+0x13>
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rdx
xor    %ecx,%ecx
sub    %rdx,%rcx
add    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strcpy>:
mov    %rdi,%rax
mov    (%rsi),%dl
xor    %ecx,%ecx
test   %dl,%dl
je     1123 <ft_strcpy+0x23>
nopl   0x0(%rax,%rax,1)
mov    %dl,(%rax,%rcx,1)
movzbl 0x1(%rsi,%rcx,1),%edx
add    $0x1,%rcx
test   %dl,%dl
jne    1110 <ft_strcpy+0x10>
add    %rcx,%rax
movb   $0x0,(%rax)
sub    %rcx,%rax
ret

LLVM IR (-O0):
define i8* @ft_strcpy(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i32
store i8* %0, i8** %3
store i8* %1, i8** %4
store i32 0, i32* %5
br label %6
6: ; preds = %10, %2
%7 = load i8*, i8** %4
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = load i8*, i8** %3
store i8 %12, i8* %13
%14 = load i8*, i8** %3
%15 = getelementptr inbounds i8, i8* %14, i32 1
store i8* %15, i8** %3
%16 = load i8*, i8** %4
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %4
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = load i8*, i8** %3
store i8 0, i8* %21
%22 = load i8*, i8** %3
%23 = load i32, i32* %5
%24 = sext i32 %23 to i64
%25 = sub i64 0, %24
%26 = getelementptr inbounds i8, i8* %22, i64 %25
ret i8* %26
}

LLVM IR (-O2):
define i8* @ft_strcpy(i8* writeonly %0, i8* nocapture %1) {
%3 = load i8, i8* %1
%4 = icmp eq i8 %3, 0
br i1 %4, label %17, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i32 [ %12, %5 ], [ 0, %2 ]
%8 = phi i8* [ %11, %5 ], [ %1, %2 ]
%9 = phi i8* [ %10, %5 ], [ %0, %2 ]
store i8 %6, i8* %9
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = getelementptr inbounds i8, i8* %8, i64 1
%12 = add nuw nsw i32 %7, 1
%13 = load i8, i8* %11
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5
%16 = zext i32 %12 to i64
br label %17
17: ; preds = %15, %2
%18 = phi i8* [ %0, %2 ], [ %10, %15 ]
%19 = phi i64 [ 0, %2 ], [ %16, %15 ]
store i8 0, i8* %18
%20 = sub nsw i64 0, %19
%21 = getelementptr inbounds i8, i8* %18, i64 %20
ret i8* %21
}
/* Type definitions */
typedef int /*<<< orphan*/ GLfloat;

/* Variables and functions */
int /*<<< orphan*/ glRotatef(int /*<<< orphan*/, int /*<<< orphan*/,
                             int /*<<< orphan*/, int /*<<< orphan*/);
void Rotatef(GLfloat phi, GLfloat x, GLfloat y, GLfloat z) {
  glRotatef(phi, x, y, z);
}


x86 assembly (clang, -O0):
<Rotatef>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
call   1030 <glRotatef@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Rotatef>:
jmp    1030 <glRotatef@plt>

LLVM IR (-O0):
define void @Rotatef(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @glRotatef(i32 %9, i32 %10, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @Rotatef(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @glRotatef(i32 %0, i32 %1, i32 %2, i32 %3)
ret void
}
/* Variables and functions */
long double M_SQRT1_2;
long double erfcl(long double);
long double zscore2pvalue(long double z) {
  long double tmp = erfcl((long double)(z * M_SQRT1_2)) / (long double)(2.0);
  tmp = (long double)(2.0) * tmp;
  return tmp;
}


x86 assembly (clang, -O0):
<zscore2pvalue>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
fldt   0x10(%rbp)
fstpt  -0x10(%rbp)
fldt   -0x10(%rbp)
mov    0x2eb8(%rip),%rax
fldt   (%rax)
fmulp  %st,%st(1)
mov    %rsp,%rax
fstpt  (%rax)
call   1030 <erfcl@plt>
flds   0xec4(%rip)
fdivrp %st,%st(1)
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
fadd   %st,%st(0)
fstpt  -0x20(%rbp)
fldt   -0x20(%rbp)
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<zscore2pvalue>:
sub    $0x18,%rsp
fldt   0x20(%rsp)
mov    0x2ec1(%rip),%rax
fldt   (%rax)
fmulp  %st,%st(1)
fstpt  (%rsp)
call   1030 <erfcl@plt>
fmuls  0xecf(%rip)
fadd   %st,%st(0)
add    $0x18,%rsp
ret

LLVM IR (-O0):
@M_SQRT1_2 = global x86_fp80 0xK00000000000000000000
define x86_fp80 @zscore2pvalue(x86_fp80 %0) {
%2 = alloca x86_fp80
%3 = alloca x86_fp80
store x86_fp80 %0, x86_fp80* %2
%4 = load x86_fp80, x86_fp80* %2
%5 = load x86_fp80, x86_fp80* @M_SQRT1_2
%6 = fmul x86_fp80 %4, %5
%7 = call x86_fp80 @erfcl(x86_fp80 %6)
%8 = fdiv x86_fp80 %7, 0xK40008000000000000000
store x86_fp80 %8, x86_fp80* %3
%9 = load x86_fp80, x86_fp80* %3
%10 = fmul x86_fp80 0xK40008000000000000000, %9
store x86_fp80 %10, x86_fp80* %3
%11 = load x86_fp80, x86_fp80* %3
ret x86_fp80 %11
}

LLVM IR (-O2):
@M_SQRT1_2 = global x86_fp80 0xK00000000000000000000
define x86_fp80 @zscore2pvalue(x86_fp80 %0) {
%2 = load x86_fp80, x86_fp80* @M_SQRT1_2
%3 = fmul x86_fp80 %2, %0
%4 = tail call x86_fp80 @erfcl(x86_fp80 %3)
%5 = fmul x86_fp80 %4, 0xK3FFE8000000000000000
%6 = fmul x86_fp80 %5, 0xK40008000000000000000
ret x86_fp80 %6
}
float QuinticEaseOut(float p) {
  float f = (p - 1);
  return f * f * f * f * f + 1;
}


x86 assembly (clang, -O0):
<QuinticEaseOut>:
push   %rbp
mov    %rsp,%rbp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
movss  0xeea(%rip),%xmm1
subss  %xmm1,%xmm0
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
mulss  -0x8(%rbp),%xmm0
movss  -0x8(%rbp),%xmm1
mulss  %xmm1,%xmm0
movss  0xebc(%rip),%xmm1
addss  %xmm1,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<QuinticEaseOut>:
addss  0xef8(%rip),%xmm0
movaps %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm0,%xmm1
mulss  %xmm1,%xmm0
addss  0xee1(%rip),%xmm0
ret

LLVM IR (-O0):
define float @QuinticEaseOut(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %2
%4 = load float, float* %2
%5 = fsub float %4, 1.000000e+00
store float %5, float* %3
%6 = load float, float* %3
%7 = load float, float* %3
%8 = fmul float %6, %7
%9 = load float, float* %3
%10 = fmul float %8, %9
%11 = load float, float* %3
%12 = fmul float %10, %11
%13 = load float, float* %3
%14 = call float @llvm.fmuladd.f32(float %12, float %13, float 1.000000e+00)
ret float %14
}

LLVM IR (-O2):
define float @QuinticEaseOut(float %0) {
%2 = fadd float %0, -1.000000e+00
%3 = fmul float %2, %2
%4 = fmul float %2, %3
%5 = fmul float %2, %4
%6 = tail call float @llvm.fmuladd.f32(float %5, float %2, float 1.000000e+00)
ret float %6
}
void test4(void) { extern double bar4(double); }


x86 assembly (clang, -O0):
<test4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test4>:
ret

LLVM IR (-O0):
define void @test4() {
ret void
}

LLVM IR (-O2):
define void @test4() {
ret void
}
/* Variables and functions */
int do_send(int, char *, ...);
int irc_quit(int fd, const char *msg) {
  if (msg)
    return do_send(fd, "QUIT :%s", msg);
  return do_send(fd, "QUIT");
}


x86 assembly (clang, -O0):
<irc_quit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1147 <irc_quit+0x37>
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rdx
lea    0xec8(%rip),%rsi
mov    $0x0,%al
call   1030 <do_send@plt>
mov    %eax,-0x4(%rbp)
jmp    115b <irc_quit+0x4b>
mov    -0x8(%rbp),%edi
lea    0xeb8(%rip),%rsi
mov    $0x0,%al
call   1030 <do_send@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<irc_quit>:
test   %rsi,%rsi
je     1126 <irc_quit+0x16>
mov    %rsi,%rdx
lea    0xee1(%rip),%rsi
xor    %eax,%eax
jmp    1030 <do_send@plt>
lea    0xedc(%rip),%rsi
xor    %eax,%eax
jmp    1030 <do_send@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"QUIT :%s\00"
@.str.1 = [5 x i8] c"QUIT\00"
define i32 @irc_quit(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8*
store i32 %0, i32* %4
store i8* %1, i8** %5
%6 = load i8*, i8** %5
%7 = icmp ne i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %2
%9 = load i32, i32* %4
%10 = load i8*, i8** %5
%11 = call i32 (i32, i8*, ...) @do_send(i32 %9, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %10)
store i32 %11, i32* %3
br label %15
12: ; preds = %2
%13 = load i32, i32* %4
%14 = call i32 (i32, i8*, ...) @do_send(i32 %13, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
store i32 %14, i32* %3
br label %15
15: ; preds = %12, %8
%16 = load i32, i32* %3
ret i32 %16
}

LLVM IR (-O2):
@.str = [9 x i8] c"QUIT :%s\00"
@.str.1 = [5 x i8] c"QUIT\00"
define i32 @irc_quit(i32 %0, i8* %1) {
%3 = icmp eq i8* %1, null
br i1 %3, label %6, label %4
4: ; preds = %2
%5 = tail call i32 (i32, i8*, ...) @do_send(i32 %0, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i8* %1)
br label %8
6: ; preds = %2
%7 = tail call i32 (i32, i8*, ...) @do_send(i32 %0, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
br label %8
8: ; preds = %6, %4
%9 = phi i32 [ %5, %4 ], [ %7, %6 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ assert_fail(char const *, int, char *, char *, char *);
scalar_t__ strcmp(char *, char *);
void assert_str_equal_(const char *file, int line, char *ex, char *ac) {
  if (strcmp(ex, ac) != 0) {
    assert_fail(file, line, "Expected <\"%s\"> but was <\"%s\">", ex, ac);
  }
}


x86 assembly (clang, -O0):
<assert_str_equal_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rsi
call   1040 <strcmp@plt>
cmp    $0x0,%rax
je     1169 <assert_str_equal_+0x49>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x18(%rbp),%rcx
mov    -0x20(%rbp),%r8
lea    0xe9c(%rip),%rdx
call   1030 <assert_fail@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<assert_str_equal_>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%rbx
mov    %esi,%r15d
mov    %rdi,%rbp
mov    %rdx,%rdi
mov    %rcx,%rsi
call   1040 <strcmp@plt>
test   %rax,%rax
je     1165 <assert_str_equal_+0x45>
lea    0xeb6(%rip),%rdx
mov    %rbp,%rdi
mov    %r15d,%esi
mov    %rbx,%rcx
mov    %r14,%r8
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
jmp    1030 <assert_fail@plt>
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
@.str = [31 x i8] c"Expected <\22%s\22> but was <\22%s\22>\00"
define void @assert_str_equal_(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %7
%10 = load i8*, i8** %8
%11 = call i64 @strcmp(i8* %9, i8* %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %19
13: ; preds = %4
%14 = load i8*, i8** %5
%15 = load i32, i32* %6
%16 = load i8*, i8** %7
%17 = load i8*, i8** %8
%18 = call i32 @assert_fail(i8* %14, i32 %15, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %16, i8* %17)
br label %19
19: ; preds = %13, %4
ret void
}

LLVM IR (-O2):
@.str = [31 x i8] c"Expected <\22%s\22> but was <\22%s\22>\00"
define void @assert_str_equal_(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = tail call i64 @strcmp(i8* %2, i8* %3)
%6 = icmp eq i64 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 @assert_fail(i8* %0, i32 %1, i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0), i8* %2, i8* %3)
br label %9
9: ; preds = %7, %4
ret void
}
int reset_deassert_bulk(struct reset_ctl_bulk *bulk) { return 0; }


x86 assembly (clang, -O0):
<reset_deassert_bulk>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<reset_deassert_bulk>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.reset_ctl_bulk = type opaque
define i32 @reset_deassert_bulk(%struct.reset_ctl_bulk* %0) {
%2 = alloca %struct.reset_ctl_bulk*
store %struct.reset_ctl_bulk* %0, %struct.reset_ctl_bulk** %2
ret i32 0
}

LLVM IR (-O2):
%struct.reset_ctl_bulk = type opaque
define i32 @reset_deassert_bulk(%struct.reset_ctl_bulk* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ putchar(char);
int /*<<< orphan*/ stdout;
void _emit(char c) {
  putchar(c);
  fflush(stdout);
}


x86 assembly (clang, -O0):
<_emit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <putchar@plt>
mov    0x2ea2(%rip),%rax
mov    (%rax),%edi
call   1040 <fflush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_emit>:
push   %rax
call   1030 <putchar@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
pop    %rax
jmp    1040 <fflush@plt>

LLVM IR (-O0):
@stdout = global i32 0
define void @_emit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @putchar(i8 signext %3)
%5 = load i32, i32* @stdout
%6 = call i32 @fflush(i32 %5)
ret void
}

LLVM IR (-O2):
@stdout = global i32 0
define void @_emit(i8 signext %0) {
%2 = tail call i32 @putchar(i8 signext %0)
%3 = load i32, i32* @stdout
%4 = tail call i32 @fflush(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
void usage(void) {
  fprintf(stderr, "Usage: snis_arduino <device>\n");
  exit(1);
}


x86 assembly (clang, -O0):
<usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2eb5(%rip),%rax
mov    (%rax),%edi
lea    0xecc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<usage>:
push   %rax
mov    0x2eb8(%rip),%rax
mov    (%rax),%edi
lea    0xecf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [30 x i8] c"Usage: snis_arduino <device>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [30 x i8] c"Usage: snis_arduino <device>\0A\00"
define void @usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 @exit(i32 1)
unreachable
}
int imin(int a, int b) {
  if (a < b)
    return a;
  else
    return b;
}


x86 assembly (clang, -O0):
<imin>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0xc(%rbp),%eax
jge    1121 <imin+0x21>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1127 <imin+0x27>
mov    -0xc(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<imin>:
mov    %esi,%eax
cmp    %esi,%edi
cmovl  %edi,%eax
ret

LLVM IR (-O0):
define i32 @imin(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %4
%7 = load i32, i32* %5
%8 = icmp slt i32 %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load i32, i32* %4
store i32 %10, i32* %3
br label %13
11: ; preds = %2
%12 = load i32, i32* %5
store i32 %12, i32* %3
br label %13
13: ; preds = %11, %9
%14 = load i32, i32* %3
ret i32 %14
}

LLVM IR (-O2):
define i32 @imin(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = select i1 %3, i32 %0, i32 %1
ret i32 %4
}
int test_fun(int x, int y) {
  int c = 0;
  while ((x > 0) && (y > 0)) {
    x = x - 1;
    y = y - 1;
    c = c + 1;
  }
  return c;
}


x86 assembly (clang, -O0):
<test_fun>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
xor    %eax,%eax
cmpl   $0x0,-0x4(%rbp)
mov    %al,-0xd(%rbp)
jle    112a <test_fun+0x2a>
cmpl   $0x0,-0x8(%rbp)
setg   %al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    113a <test_fun+0x3a>
jmp    115a <test_fun+0x5a>
mov    -0x4(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
sub    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1111 <test_fun+0x11>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_fun>:
xor    %eax,%eax
test   %edi,%edi
jle    1122 <test_fun+0x22>
test   %esi,%esi
jle    1122 <test_fun+0x22>
add    $0xffffffff,%edi
add    $0xffffffff,%esi
cmp    %edi,%esi
cmovae %edi,%esi
add    $0x1,%esi
test   %edi,%edi
mov    $0x1,%eax
cmovne %esi,%eax
ret

LLVM IR (-O0):
define i32 @test_fun(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 0, i32* %5
br label %6
6: ; preds = %14, %2
%7 = load i32, i32* %3
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %12
9: ; preds = %6
%10 = load i32, i32* %4
%11 = icmp sgt i32 %10, 0
br label %12
12: ; preds = %9, %6
%13 = phi i1 [ false, %6 ], [ %11, %9 ]
br i1 %13, label %14, label %21
14: ; preds = %12
%15 = load i32, i32* %3
%16 = sub nsw i32 %15, 1
store i32 %16, i32* %3
%17 = load i32, i32* %4
%18 = sub nsw i32 %17, 1
store i32 %18, i32* %4
%19 = load i32, i32* %5
%20 = add nsw i32 %19, 1
store i32 %20, i32* %5
br label %6
21: ; preds = %12
%22 = load i32, i32* %5
ret i32 %22
}

LLVM IR (-O2):
define i32 @test_fun(i32 %0, i32 %1) {
%3 = icmp sgt i32 %0, 0
%4 = icmp sgt i32 %1, 0
%5 = and i1 %3, %4
br i1 %5, label %6, label %13
6: ; preds = %2
%7 = add nsw i32 %0, -1
%8 = add nsw i32 %1, -1
%9 = icmp eq i32 %7, 0
%10 = call i32 @llvm.umin.i32(i32 %8, i32 %7)
%11 = add nuw nsw i32 %10, 1
%12 = select i1 %9, i32 1, i32 %11
br label %13
13: ; preds = %6, %2
%14 = phi i32 [ 0, %2 ], [ %12, %6 ]
ret i32 %14
}
void mcm_signal_handle(int sig_code) {}


x86 assembly (clang, -O0):
<mcm_signal_handle>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcm_signal_handle>:
ret

LLVM IR (-O0):
define void @mcm_signal_handle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @mcm_signal_handle(i32 %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FTDI_ENABLE_REG_RestoreConfig();
void FTDI_ENABLE_REG_Wakeup(void) { FTDI_ENABLE_REG_RestoreConfig(); }


x86 assembly (clang, -O0):
<FTDI_ENABLE_REG_Wakeup>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <FTDI_ENABLE_REG_RestoreConfig@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<FTDI_ENABLE_REG_Wakeup>:
xor    %eax,%eax
jmp    1030 <FTDI_ENABLE_REG_RestoreConfig@plt>

LLVM IR (-O0):
define void @FTDI_ENABLE_REG_Wakeup() {
%1 = call i32 (...) @FTDI_ENABLE_REG_RestoreConfig()
ret void
}

LLVM IR (-O2):
define void @FTDI_ENABLE_REG_Wakeup() {
%1 = tail call i32 (...) @FTDI_ENABLE_REG_RestoreConfig()
ret void
}
/* Type definitions */
struct sched_param {
  int dummy;
};
typedef int /*<<< orphan*/ pthread_t;

/* Variables and functions */
int EINVAL;
int pthread_getschedparam(pthread_t thread, int *policy,
                          struct sched_param *param) {
  (void)thread;
  (void)policy;
  (void)param;
  return EINVAL;
}


x86 assembly (clang, -O0):
<pthread_getschedparam>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    0x2eca(%rip),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_getschedparam>:
mov    0x2ed9(%rip),%rax
mov    (%rax),%eax
ret

LLVM IR (-O0):
%struct.sched_param = type { i32 }
@EINVAL = global i32 0
define i32 @pthread_getschedparam(i32 %0, i32* %1, %struct.sched_param* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca %struct.sched_param*
store i32 %0, i32* %4
store i32* %1, i32** %5
store %struct.sched_param* %2, %struct.sched_param** %6
%7 = load i32, i32* %4
%8 = load i32*, i32** %5
%9 = load %struct.sched_param*, %struct.sched_param** %6
%10 = load i32, i32* @EINVAL
ret i32 %10
}

LLVM IR (-O2):
%struct.sched_param = type { i32 }
@EINVAL = global i32 0
define i32 @pthread_getschedparam(i32 %0, i32* nocapture readnone %1, %struct.sched_param* nocapture readnone %2) {
%4 = load i32, i32* @EINVAL
ret i32 %4
}