xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ alarm(unsigned long);
void settimer(const char *name, unsigned long sec, unsigned long msec) {
  alarm(sec);
}


x86 assembly (clang, -O0):
<settimer>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <alarm@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<settimer>:
mov    %rsi,%rdi
jmp    1030 <alarm@plt>

LLVM IR (-O0):
define void @settimer(i8* %0, i64 %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i64
%6 = alloca i64
store i8* %0, i8** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
%7 = load i64, i64* %5
%8 = call i32 @alarm(i64 %7)
ret void
}

LLVM IR (-O2):
define void @settimer(i8* nocapture readnone %0, i64 %1, i64 %2) {
%4 = tail call i32 @alarm(i64 %1)
ret void
}
int skip_whitespace(char *string) {
  register int i;
  for (i = 0; string && ((string[i] == ' ') || (string[i] == '\t')); i++)
    ;
  return i;
}


x86 assembly (clang, -O0):
<skip_whitespace>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
xor    %eax,%eax
cmpq   $0x0,-0x8(%rbp)
mov    %al,-0xd(%rbp)
je     1154 <skip_whitespace+0x54>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0xe(%rbp)
je     114e <skip_whitespace+0x4e>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x9,%eax
sete   %al
mov    %al,-0xe(%rbp)
mov    -0xe(%rbp),%al
mov    %al,-0xd(%rbp)
mov    -0xd(%rbp),%al
test   $0x1,%al
jne    1164 <skip_whitespace+0x64>
jmp    1177 <skip_whitespace+0x77>
jmp    1169 <skip_whitespace+0x69>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    110f <skip_whitespace+0xf>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<skip_whitespace>:
xor    %eax,%eax
test   %rdi,%rdi
jne    1114 <skip_whitespace+0x14>
jmp    1122 <skip_whitespace+0x22>
nopl   0x0(%rax)
add    $0x1,%rax
movzbl (%rdi,%rax,1),%ecx
cmp    $0x20,%cl
je     1110 <skip_whitespace+0x10>
cmp    $0x9,%cl
je     1110 <skip_whitespace+0x10>
ret

LLVM IR (-O0):
define i32 @skip_whitespace(i8* %0) {
%2 = alloca i8*
%3 = alloca i32
store i8* %0, i8** %2
store i32 0, i32* %3
br label %4
4: ; preds = %28, %1
%5 = load i8*, i8** %2
%6 = icmp ne i8* %5, null
br i1 %6, label %7, label %25
7: ; preds = %4
%8 = load i8*, i8** %2
%9 = load i32, i32* %3
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i8, i8* %8, i64 %10
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = icmp eq i32 %13, 32
br i1 %14, label %23, label %15
15: ; preds = %7
%16 = load i8*, i8** %2
%17 = load i32, i32* %3
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = load i8, i8* %19
%21 = sext i8 %20 to i32
%22 = icmp eq i32 %21, 9
br label %23
23: ; preds = %15, %7
%24 = phi i1 [ true, %7 ], [ %22, %15 ]
br label %25
25: ; preds = %23, %4
%26 = phi i1 [ false, %4 ], [ %24, %23 ]
br i1 %26, label %27, label %31
27: ; preds = %25
br label %28
28: ; preds = %27
%29 = load i32, i32* %3
%30 = add nsw i32 %29, 1
store i32 %30, i32* %3
br label %4
31: ; preds = %25
%32 = load i32, i32* %3
ret i32 %32
}

LLVM IR (-O2):
define i32 @skip_whitespace(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %11, label %3
3: ; preds = %1, %7
%4 = phi i64 [ %8, %7 ], [ 0, %1 ]
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
switch i8 %6, label %9 [
i8 32, label %7
i8 9, label %7
]
7: ; preds = %3, %3
%8 = add nuw i64 %4, 1
br label %3
9: ; preds = %3
%10 = trunc i64 %4 to i32
br label %11
11: ; preds = %9, %1
%12 = phi i32 [ 0, %1 ], [ %10, %9 ]
ret i32 %12
}
void EVP_MD_CTX_init(void) {}


x86 assembly (clang, -O0):
<EVP_MD_CTX_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_MD_CTX_init>:
ret

LLVM IR (-O0):
define void @EVP_MD_CTX_init() {
ret void
}

LLVM IR (-O2):
define void @EVP_MD_CTX_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ENOSYS;
int /*<<< orphan*/ errno;
int link(char *existing, char *new) {
  errno = ENOSYS;
  return -1;
}


x86 assembly (clang, -O0):
<link>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    0x2ed5(%rip),%rax
mov    (%rax),%ecx
mov    0x2ebc(%rip),%rax
mov    %ecx,(%rax)
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<link>:
mov    0x2ee1(%rip),%rax
mov    (%rax),%eax
mov    0x2ec8(%rip),%rcx
mov    %eax,(%rcx)
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @link(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i32, i32* @ENOSYS
store i32 %5, i32* @errno
ret i32 -1
}

LLVM IR (-O2):
@ENOSYS = global i32 0
@errno = global i32 0
define i32 @link(i8* nocapture readnone %0, i8* nocapture readnone %1) {
%3 = load i32, i32* @ENOSYS
store i32 %3, i32* @errno
ret i32 -1
}
void updateProtocolSelector() {}


x86 assembly (clang, -O0):
<updateProtocolSelector>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<updateProtocolSelector>:
ret

LLVM IR (-O0):
define void @updateProtocolSelector() {
ret void
}

LLVM IR (-O2):
define void @updateProtocolSelector() {
ret void
}
int increase_with_no_restrict(int *a, int *b, int *c) {
  *a = *a + *c;
  *b = *b + *c;
}


x86 assembly (clang, -O0):
<increase_with_no_restrict>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x20(%rbp),%rax
add    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%ecx
mov    -0x20(%rbp),%rax
add    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<increase_with_no_restrict>:
mov    (%rdx),%eax
add    %eax,(%rdi)
mov    (%rdx),%eax
add    %eax,(%rsi)
ret

LLVM IR (-O0):
define i32 @increase_with_no_restrict(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32*
store i32* %0, i32** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
%8 = load i32*, i32** %5
%9 = load i32, i32* %8
%10 = load i32*, i32** %7
%11 = load i32, i32* %10
%12 = add nsw i32 %9, %11
%13 = load i32*, i32** %5
store i32 %12, i32* %13
%14 = load i32*, i32** %6
%15 = load i32, i32* %14
%16 = load i32*, i32** %7
%17 = load i32, i32* %16
%18 = add nsw i32 %15, %17
%19 = load i32*, i32** %6
store i32 %18, i32* %19
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
define i32 @increase_with_no_restrict(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %0
%5 = load i32, i32* %2
%6 = add nsw i32 %5, %4
store i32 %6, i32* %0
%7 = load i32, i32* %1
%8 = load i32, i32* %2
%9 = add nsw i32 %8, %7
store i32 %9, i32* %1
ret i32 undef
}
unsigned short htons(unsigned short num) {
  return ((num << 8) & 0xFF00) | (num >> 8);
}


x86 assembly (clang, -O0):
<htons>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
shl    $0x8,%eax
and    $0xff00,%eax
movzwl -0x2(%rbp),%ecx
sar    $0x8,%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<htons>:
mov    %edi,%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @htons(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i32
%5 = shl i32 %4, 8
%6 = and i32 %5, 65280
%7 = load i16, i16* %2
%8 = zext i16 %7 to i32
%9 = ashr i32 %8, 8
%10 = or i32 %6, %9
%11 = trunc i32 %10 to i16
ret i16 %11
}

LLVM IR (-O2):
define zeroext i16 @htons(i16 zeroext %0) {
%2 = tail call i16 @llvm.bswap.i16(i16 %0)
ret i16 %2
}
/* Variables and functions */
char *macro(char *);
int /*<<< orphan*/ trim(char *);
char *mactrim(char *s) {
  register char *t = macro(s);
  trim(t);
  return (t);
}


x86 assembly (clang, -O0):
<mactrim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <macro@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <trim@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mactrim>:
push   %rbx
call   1040 <macro@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1030 <trim@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @mactrim(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i8* @macro(i8* %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @trim(i8* %6)
%8 = load i8*, i8** %3
ret i8* %8
}

LLVM IR (-O2):
define i8* @mactrim(i8* %0) {
%2 = tail call i8* @macro(i8* %0)
%3 = tail call i32 @trim(i8* %2)
ret i8* %2
}
double leftlog(double x, double r) {
  double d;
  d = 1.0 - x;
  return (r * x * d * d);
}


x86 assembly (clang, -O0):
<leftlog>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  0xeea(%rip),%xmm0
subsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
mulsd  -0x8(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
mulsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<leftlog>:
movsd  0xef8(%rip),%xmm2
subsd  %xmm0,%xmm2
mulsd  %xmm1,%xmm0
mulsd  %xmm2,%xmm0
mulsd  %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @leftlog(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %3
%7 = fsub double 1.000000e+00, %6
store double %7, double* %5
%8 = load double, double* %4
%9 = load double, double* %3
%10 = fmul double %8, %9
%11 = load double, double* %5
%12 = fmul double %10, %11
%13 = load double, double* %5
%14 = fmul double %12, %13
ret double %14
}

LLVM IR (-O2):
define double @leftlog(double %0, double %1) {
%3 = fsub double 1.000000e+00, %0
%4 = fmul double %0, %1
%5 = fmul double %3, %4
%6 = fmul double %3, %5
ret double %6
}
/* Variables and functions */
int /*<<< orphan*/ espcomm_delay_ms(int);
int /*<<< orphan*/ serialport_set_dtr(int);
int /*<<< orphan*/ serialport_set_rts(int);
void board_nodemcu_rb() {
  serialport_set_rts(1);
  serialport_set_dtr(0);
  espcomm_delay_ms(5);
  serialport_set_rts(0);
  serialport_set_dtr(1);
  espcomm_delay_ms(50);
  serialport_set_dtr(0);
}


x86 assembly (clang, -O0):
<board_nodemcu_rb>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1050 <serialport_set_rts@plt>
xor    %edi,%edi
call   1040 <serialport_set_dtr@plt>
mov    $0x5,%edi
call   1030 <espcomm_delay_ms@plt>
xor    %edi,%edi
call   1050 <serialport_set_rts@plt>
mov    $0x1,%edi
call   1040 <serialport_set_dtr@plt>
mov    $0x32,%edi
call   1030 <espcomm_delay_ms@plt>
xor    %edi,%edi
call   1040 <serialport_set_dtr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<board_nodemcu_rb>:
push   %rax
mov    $0x1,%edi
call   1050 <serialport_set_rts@plt>
xor    %edi,%edi
call   1040 <serialport_set_dtr@plt>
mov    $0x5,%edi
call   1030 <espcomm_delay_ms@plt>
xor    %edi,%edi
call   1050 <serialport_set_rts@plt>
mov    $0x1,%edi
call   1040 <serialport_set_dtr@plt>
mov    $0x32,%edi
call   1030 <espcomm_delay_ms@plt>
xor    %edi,%edi
pop    %rax
jmp    1040 <serialport_set_dtr@plt>

LLVM IR (-O0):
define void @board_nodemcu_rb() {
%1 = call i32 @serialport_set_rts(i32 1)
%2 = call i32 @serialport_set_dtr(i32 0)
%3 = call i32 @espcomm_delay_ms(i32 5)
%4 = call i32 @serialport_set_rts(i32 0)
%5 = call i32 @serialport_set_dtr(i32 1)
%6 = call i32 @espcomm_delay_ms(i32 50)
%7 = call i32 @serialport_set_dtr(i32 0)
ret void
}

LLVM IR (-O2):
define void @board_nodemcu_rb() {
%1 = tail call i32 @serialport_set_rts(i32 1)
%2 = tail call i32 @serialport_set_dtr(i32 0)
%3 = tail call i32 @espcomm_delay_ms(i32 5)
%4 = tail call i32 @serialport_set_rts(i32 0)
%5 = tail call i32 @serialport_set_dtr(i32 1)
%6 = tail call i32 @espcomm_delay_ms(i32 50)
%7 = tail call i32 @serialport_set_dtr(i32 0)
ret void
}
void unsigned_char_div_signed_char_signed_char(unsigned char *LHS,
                                               signed char RHS) {
  (*LHS) /= RHS;
}


x86 assembly (clang, -O0):
<unsigned_char_div_signed_char_signed_char>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
movsbl -0x9(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
movzbl (%rax),%eax
cltd
idiv   %ecx
mov    %eax,%ecx
mov    -0x18(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<unsigned_char_div_signed_char_signed_char>:
movzbl (%rdi),%eax
xor    %edx,%edx
idiv   %si
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @unsigned_char_div_signed_char_signed_char(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = sext i8 %5 to i32
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = sdiv i32 %9, %6
%11 = trunc i32 %10 to i8
store i8 %11, i8* %7
ret void
}

LLVM IR (-O2):
define void @unsigned_char_div_signed_char_signed_char(i8* nocapture %0, i8 signext %1) {
%3 = load i8, i8* %0
%4 = zext i8 %3 to i16
%5 = sext i8 %1 to i16
%6 = sdiv i16 %4, %5
%7 = trunc i16 %6 to i8
store i8 %7, i8* %0
ret void
}
/* Variables and functions */
int Util_equal(double const, double);
int Util_is_zero(const double x) { return Util_equal(x, 0.0); }


x86 assembly (clang, -O0):
<Util_is_zero>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
xorps  %xmm1,%xmm1
call   1030 <Util_equal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Util_is_zero>:
xorps  %xmm1,%xmm1
jmp    1030 <Util_equal@plt>

LLVM IR (-O0):
define i32 @Util_is_zero(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @Util_equal(double %3, double 0.000000e+00)
ret i32 %4
}

LLVM IR (-O2):
define i32 @Util_is_zero(double %0) {
%2 = tail call i32 @Util_equal(double %0, double 0.000000e+00)
ret i32 %2
}
/* Variables and functions */
size_t strlen(const char *str) {
  size_t len = 0;
  while (str[len] != 0)
    ++len;
  return len;
}


x86 assembly (clang, -O0):
<strlen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1136 <strlen+0x36>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <strlen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strlen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpb   $0x0,0x1(%rdi,%rax,1)
lea    0x1(%rax),%rax
jne    1110 <strlen+0x10>
ret

LLVM IR (-O0):
define i64 @strlen(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
store i64 0, i64* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8, i8* %5, i64 %6
%8 = load i8, i8* %7
%9 = sext i8 %8 to i32
%10 = icmp ne i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i64, i64* %3
%13 = add i64 %12, 1
store i64 %13, i64* %3
br label %4
14: ; preds = %4
%15 = load i64, i64* %3
ret i64 %15
}

LLVM IR (-O2):
define i64 @strlen(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = load i8, i8* %4
%6 = icmp eq i8 %5, 0
%7 = add i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i64 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ siginfo_t;

/* Variables and functions */
int /*<<< orphan*/ asm_sig_print(int, int /*<<< orphan*/ *, void *);
void sigfn_bus(int signum, siginfo_t *siginfo, void *puctx) {
  asm_sig_print(signum, siginfo, puctx);
}


x86 assembly (clang, -O0):
<sigfn_bus>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <asm_sig_print@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sigfn_bus>:
jmp    1030 <asm_sig_print@plt>

LLVM IR (-O0):
define void @sigfn_bus(i32 %0, i32* %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i8*
store i32 %0, i32* %4
store i32* %1, i32** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i32*, i32** %5
%9 = load i8*, i8** %6
%10 = call i32 @asm_sig_print(i32 %7, i32* %8, i8* %9)
ret void
}

LLVM IR (-O2):
define void @sigfn_bus(i32 %0, i32* %1, i8* %2) {
%4 = tail call i32 @asm_sig_print(i32 %0, i32* %1, i8* %2)
ret void
}
/* Type definitions */
typedef scalar_t__ time_t;
struct timespec {
  long tv_nsec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ nanosleep(struct timespec *, int /*<<< orphan*/ *);
void bcm2835_delay(unsigned int millis) {
  struct timespec sleeper;
  sleeper.tv_sec = (time_t)(millis / 1000);
  sleeper.tv_nsec = (long)(millis % 1000) * 1000000;
  nanosleep(&sleeper, NULL);
}


x86 assembly (clang, -O0):
<bcm2835_delay>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
mov    %eax,%eax
mov    %rax,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x3e8,%ecx
xor    %edx,%edx
div    %ecx
mov    %edx,%eax
imul   $0xf4240,%rax,%rax
mov    %rax,-0x18(%rbp)
lea    -0x18(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <nanosleep@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcm2835_delay>:
sub    $0x18,%rsp
mov    %edi,%eax
imul   $0x10624dd3,%rax,%rax
shr    $0x26,%rax
mov    %rax,0x10(%rsp)
imul   $0x3e8,%eax,%eax
sub    %eax,%edi
imul   $0xf4240,%edi,%eax
mov    %rax,0x8(%rsp)
lea    0x8(%rsp),%rdi
xor    %esi,%esi
call   1030 <nanosleep@plt>
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i64 }
define void @bcm2835_delay(i32 %0) {
%2 = alloca i32
%3 = alloca %struct.timespec
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = udiv i32 %4, 1000
%6 = zext i32 %5 to i64
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 1
store i64 %6, i64* %7
%8 = load i32, i32* %2
%9 = urem i32 %8, 1000
%10 = zext i32 %9 to i64
%11 = mul nsw i64 %10, 1000000
%12 = getelementptr inbounds %struct.timespec, %struct.timespec* %3, i32 0, i32 0
store i64 %11, i64* %12
%13 = call i32 @nanosleep(%struct.timespec* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.timespec = type { i64, i64 }
define void @bcm2835_delay(i32 %0) {
%2 = alloca %struct.timespec
%3 = bitcast %struct.timespec* %2 to i8*
%4 = udiv i32 %0, 1000
%5 = zext i32 %4 to i64
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 1
store i64 %5, i64* %6
%7 = urem i32 %0, 1000
%8 = mul nuw nsw i32 %7, 1000000
%9 = zext i32 %8 to i64
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i64 0, i32 0
store i64 %9, i64* %10
%11 = call i32 @nanosleep(%struct.timespec* %2, i32* null)
ret void
}
/* Variables and functions */
scalar_t__ COLS;
scalar_t__ LINES;
int /*<<< orphan*/ SIGINT;
int /*<<< orphan*/ SIG_IGN;
int /*<<< orphan*/ endwin();
int /*<<< orphan*/ fflush(int /*<<< orphan*/);
int /*<<< orphan*/ mvcur(int /*<<< orphan*/, scalar_t__, scalar_t__,
                         int /*<<< orphan*/);
int /*<<< orphan*/ putchar(char);
int /*<<< orphan*/ signal(int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ stdout;
void bye(void) {
  signal(SIGINT, SIG_IGN);
  mvcur(0, COLS - 1, LINES - 1, 0);
  fflush(stdout);
  endwin();
  putchar('\n');
}


x86 assembly (clang, -O0):
<bye>:
push   %rbp
mov    %rsp,%rbp
mov    0x2e8d(%rip),%rax
mov    (%rax),%edi
mov    0x2e74(%rip),%rax
mov    (%rax),%esi
call   1050 <signal@plt>
mov    0x2e5e(%rip),%rax
mov    (%rax),%rsi
sub    $0x1,%rsi
mov    0x2e60(%rip),%rax
mov    (%rax),%rdx
sub    $0x1,%rdx
xor    %ecx,%ecx
mov    %ecx,%edi
call   1040 <mvcur@plt>
mov    0x2e29(%rip),%rax
mov    (%rax),%edi
call   1060 <fflush@plt>
mov    $0x0,%al
call   1070 <endwin@plt>
mov    $0xa,%edi
call   1030 <putchar@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bye>:
push   %rax
mov    0x2e90(%rip),%rax
mov    (%rax),%edi
mov    0x2e77(%rip),%rax
mov    (%rax),%esi
call   1050 <signal@plt>
mov    0x2e61(%rip),%rax
mov    (%rax),%rsi
add    $0xffffffffffffffff,%rsi
mov    0x2e63(%rip),%rax
mov    (%rax),%rdx
add    $0xffffffffffffffff,%rdx
xor    %edi,%edi
xor    %ecx,%ecx
call   1040 <mvcur@plt>
mov    0x2e2c(%rip),%rax
mov    (%rax),%edi
call   1060 <fflush@plt>
xor    %eax,%eax
call   1070 <endwin@plt>
mov    $0xa,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@SIGINT = global i32 0
@SIG_IGN = global i32 0
@COLS = global i64 0
@LINES = global i64 0
@stdout = global i32 0
define void @bye() {
%1 = load i32, i32* @SIGINT
%2 = load i32, i32* @SIG_IGN
%3 = call i32 @signal(i32 %1, i32 %2)
%4 = load i64, i64* @COLS
%5 = sub nsw i64 %4, 1
%6 = load i64, i64* @LINES
%7 = sub nsw i64 %6, 1
%8 = call i32 @mvcur(i32 0, i64 %5, i64 %7, i32 0)
%9 = load i32, i32* @stdout
%10 = call i32 @fflush(i32 %9)
%11 = call i32 (...) @endwin()
%12 = call i32 @putchar(i8 signext 10)
ret void
}

LLVM IR (-O2):
@SIGINT = global i32 0
@SIG_IGN = global i32 0
@COLS = global i64 0
@LINES = global i64 0
@stdout = global i32 0
define void @bye() {
%1 = load i32, i32* @SIGINT
%2 = load i32, i32* @SIG_IGN
%3 = tail call i32 @signal(i32 %1, i32 %2)
%4 = load i64, i64* @COLS
%5 = add nsw i64 %4, -1
%6 = load i64, i64* @LINES
%7 = add nsw i64 %6, -1
%8 = tail call i32 @mvcur(i32 0, i64 %5, i64 %7, i32 0)
%9 = load i32, i32* @stdout
%10 = tail call i32 @fflush(i32 %9)
%11 = tail call i32 (...) @endwin()
%12 = tail call i32 @putchar(i8 signext 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ gpm_report(int, char *, int, char *);
int /*<<< orphan*/ syn_serial_set_mode(int, int);
void syn_serial_reset(int fd) {
  gpm_report(3158,
             "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
             "2022-01-22/02-19-57/repos/Distrotech/gpm/refs/heads/"
             "distrotech-gpm/src/synaptics.c",
             3, "Reseting Synaptic Serial Touchpad.");
  syn_serial_set_mode(fd, (0x00 | 0x40 | 0x08 | 0x00 | 0x00));
}


x86 assembly (clang, -O0):
<syn_serial_reset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0xc56,%edi
lea    0xec9(%rip),%rsi
mov    $0x3,%edx
lea    0xf50(%rip),%rcx
call   1040 <gpm_report@plt>
mov    -0x4(%rbp),%edi
mov    $0x48,%esi
call   1030 <syn_serial_set_mode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syn_serial_reset>:
push   %rbx
mov    %edi,%ebx
lea    0xed6(%rip),%rsi
lea    0xf62(%rip),%rcx
mov    $0xc56,%edi
mov    $0x3,%edx
call   1040 <gpm_report@plt>
mov    %ebx,%edi
mov    $0x48,%esi
pop    %rbx
jmp    1030 <syn_serial_set_mode@plt>

LLVM IR (-O0):
@.str = [147 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Distrotech/gpm/refs/heads/distrotech-gpm/src/synaptics.c\00"
@.str.1 = [35 x i8] c"Reseting Synaptic Serial Touchpad.\00"
define void @syn_serial_reset(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @gpm_report(i32 3158, i8* getelementptr inbounds ([147 x i8], [147 x i8]* @.str, i64 0, i64 0), i32 3, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0))
%4 = load i32, i32* %2
%5 = call i32 @syn_serial_set_mode(i32 %4, i32 72)
ret void
}

LLVM IR (-O2):
@.str = [147 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/Distrotech/gpm/refs/heads/distrotech-gpm/src/synaptics.c\00"
@.str.1 = [35 x i8] c"Reseting Synaptic Serial Touchpad.\00"
define void @syn_serial_reset(i32 %0) {
%2 = tail call i32 @gpm_report(i32 3158, i8* getelementptr inbounds ([147 x i8], [147 x i8]* @.str, i64 0, i64 0), i32 3, i8* getelementptr inbounds ([35 x i8], [35 x i8]* @.str.1, i64 0, i64 0))
%3 = tail call i32 @syn_serial_set_mode(i32 %0, i32 72)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void show_version() { printf("VERSION\n"); }


x86 assembly (clang, -O0):
<show_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<show_version>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [9 x i8] c"VERSION\0A\00"
define void @show_version() {
%1 = call i32 @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [8 x i8] c"VERSION\00"
define void @show_version() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([8 x i8], [8 x i8]* @str, i64 0, i64 0))
ret void
}
void rop3_221_1_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = ~*D;
  stk1 = S | stk2;
  *D = (stk1 & (~S) & (~T)) | (*D & S) | (*D & T);
}


x86 assembly (clang, -O0):
<rop3_221_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
xor    $0xffffffff,%eax
mov    %al,-0xc(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xc(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
movzbl -0xa(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0xa(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_221_1_1>:
mov    (%rdi),%al
mov    %edx,%ecx
or     %sil,%cl
or     %al,%cl
not    %cl
and    %al,%sil
and    %dl,%al
or     %sil,%al
or     %cl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_221_1_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = xor i32 %11, -1
%13 = trunc i32 %12 to i8
store i8 %13, i8* %8
%14 = load i8, i8* %5
%15 = zext i8 %14 to i32
%16 = load i8, i8* %8
%17 = zext i8 %16 to i32
%18 = or i32 %15, %17
%19 = trunc i32 %18 to i8
store i8 %19, i8* %7
%20 = load i8, i8* %7
%21 = zext i8 %20 to i32
%22 = load i8, i8* %5
%23 = zext i8 %22 to i32
%24 = xor i32 %23, -1
%25 = and i32 %21, %24
%26 = load i8, i8* %6
%27 = zext i8 %26 to i32
%28 = xor i32 %27, -1
%29 = and i32 %25, %28
%30 = load i8*, i8** %4
%31 = load i8, i8* %30
%32 = zext i8 %31 to i32
%33 = load i8, i8* %5
%34 = zext i8 %33 to i32
%35 = and i32 %32, %34
%36 = or i32 %29, %35
%37 = load i8*, i8** %4
%38 = load i8, i8* %37
%39 = zext i8 %38 to i32
%40 = load i8, i8* %6
%41 = zext i8 %40 to i32
%42 = and i32 %39, %41
%43 = or i32 %36, %42
%44 = trunc i32 %43 to i8
%45 = load i8*, i8** %4
store i8 %44, i8* %45
ret void
}

LLVM IR (-O2):
define void @rop3_221_1_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %2, %1
%6 = or i8 %5, %4
%7 = xor i8 %6, -1
%8 = and i8 %4, %1
%9 = or i8 %8, %7
%10 = and i8 %4, %2
%11 = or i8 %9, %10
store i8 %11, i8* %0
ret void
}
/* Variables and functions */
int log_2(unsigned long);
unsigned long round_up_2power(unsigned long val) {
  return 1 << (log_2(val - 1) + 1);
}


x86 assembly (clang, -O0):
<round_up_2power>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
sub    $0x1,%rdi
call   1030 <log_2@plt>
mov    %eax,%ecx
add    $0x1,%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<round_up_2power>:
push   %rax
add    $0xffffffffffffffff,%rdi
call   1030 <log_2@plt>
lea    0x1(%rax),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
pop    %rcx
ret

LLVM IR (-O0):
define i64 @round_up_2power(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sub i64 %3, 1
%5 = call i32 @log_2(i64 %4)
%6 = add nsw i32 %5, 1
%7 = shl i32 1, %6
%8 = sext i32 %7 to i64
ret i64 %8
}

LLVM IR (-O2):
define i64 @round_up_2power(i64 %0) {
%2 = add i64 %0, -1
%3 = tail call i32 @log_2(i64 %2)
%4 = add nsw i32 %3, 1
%5 = shl nuw i32 1, %4
%6 = sext i32 %5 to i64
ret i64 %6
}
/* Variables and functions */
scalar_t__ isspace(char);
char *ltrim(char *s) {
  while (isspace(*s)) {
    s++;
  }
  return s;
}


x86 assembly (clang, -O0):
<ltrim>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edi
call   1030 <isspace@plt>
cmp    $0x0,%rax
je     1143 <ltrim+0x33>
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    111c <ltrim+0xc>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ltrim>:
push   %rbx
mov    %rdi,%rbx
add    $0xffffffffffffffff,%rbx
nopl   0x0(%rax,%rax,1)
movsbl 0x1(%rbx),%edi
add    $0x1,%rbx
call   1030 <isspace@plt>
test   %rax,%rax
jne    1120 <ltrim+0x10>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @ltrim(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
br label %3
3: ; preds = %8, %1
%4 = load i8*, i8** %2
%5 = load i8, i8* %4
%6 = call i64 @isspace(i8 signext %5)
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %3
%9 = load i8*, i8** %2
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %2
br label %3
11: ; preds = %3
%12 = load i8*, i8** %2
ret i8* %12
}

LLVM IR (-O2):
define i8* @ltrim(i8* %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i8* [ %0, %1 ], [ %7, %2 ]
%4 = load i8, i8* %3
%5 = tail call i64 @isspace(i8 signext %4)
%6 = icmp eq i64 %5, 0
%7 = getelementptr inbounds i8, i8* %3, i64 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i8* %3
}
double bbob2009_fmin(double a, double b) { return (a < b) ? a : b; }


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm1
movsd  -0x10(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1131 <bbob2009_fmin+0x31>
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
jmp    113b <bbob2009_fmin+0x3b>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
minsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @bbob2009_fmin(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fcmp olt double %5, %6
br i1 %7, label %8, label %10
8: ; preds = %2
%9 = load double, double* %3
br label %12
10: ; preds = %2
%11 = load double, double* %4
br label %12
12: ; preds = %10, %8
%13 = phi double [ %9, %8 ], [ %11, %10 ]
ret double %13
}

LLVM IR (-O2):
define double @bbob2009_fmin(double %0, double %1) {
%3 = fcmp olt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
/* Type definitions */
typedef int int32_t;

/* Variables and functions */
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, int);
int /*<<< orphan*/ stderr;
void _gfortran_caf_stop_numeric(int32_t stop_code) {
  fprintf(stderr, "STOP %d\n", stop_code);
  exit(0);
}


x86 assembly (clang, -O0):
<_gfortran_caf_stop_numeric>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2eae(%rip),%rax
mov    (%rax),%edi
mov    -0x4(%rbp),%edx
lea    0xec2(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<_gfortran_caf_stop_numeric>:
push   %rax
mov    %edi,%edx
mov    0x2eb6(%rip),%rax
mov    (%rax),%edi
lea    0xecd(%rip),%rsi
call   1030 <fprintf@plt>
xor    %edi,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [9 x i8] c"STOP %d\0A\00"
define void @_gfortran_caf_stop_numeric(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @stderr
%4 = load i32, i32* %2
%5 = call i32 @fprintf(i32 %3, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %4)
%6 = call i32 @exit(i32 0)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [9 x i8] c"STOP %d\0A\00"
define void @_gfortran_caf_stop_numeric(i32 %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 @fprintf(i32 %2, i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i64 0, i64 0), i32 %0)
%4 = tail call i32 @exit(i32 0)
unreachable
}
/* Type definitions */
typedef int /*<<< orphan*/ __m64;

/* Variables and functions */
int /*<<< orphan*/ _mm_add_pi32(int /*<<< orphan*/, int /*<<< orphan*/);
__m64 __attribute__((no, unused)) test(__m64 s1, __m64 s2) {
  return _mm_add_pi32(s1, s2);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_add_pi32@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
jmp    1030 <_mm_add_pi32@plt>

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_add_pi32(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_add_pi32(i32 %0, i32 %1)
ret i32 %3
}
int shutdown(void) {
  asm("movl $0x80000b80, %eax\n"
      "movw $0xcf8, %dx\n"
      "outl  %eax, %dx\n"
      "movw $0xcfc, %dx\n"
      "inb  %dx, %al\n"
      "orb  $1, %al\n"
      "outb  %al, %dx\n"
      "\n"
      "movl $0x80000b40, %eax\n"
      "movw $0xcf8, %dx\n"
      "outl  %eax, %dx\n"
      "movl $0x7001, %eax\n"
      "movw $0xcfc, %dx\n"
      "outl  %eax, %dx\n"
      "movw $0x2000, %ax\n"
      "movw $0x7004, %dx\n"
      "outw  %ax, %dx\n");
  return 0;
}


x86 assembly (clang, -O0):
<shutdown>:
push   %rbp
mov    %rsp,%rbp
mov    $0x80000b80,%eax
mov    $0xcf8,%dx
out    %eax,(%dx)
mov    $0xcfc,%dx
in     (%dx),%al
or     $0x1,%al
out    %al,(%dx)
mov    $0x80000b40,%eax
mov    $0xcf8,%dx
out    %eax,(%dx)
mov    $0x7001,%eax
mov    $0xcfc,%dx
out    %eax,(%dx)
mov    $0x2000,%ax
mov    $0x7004,%dx
out    %ax,(%dx)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<shutdown>:
mov    $0x80000b80,%eax
mov    $0xcf8,%dx
out    %eax,(%dx)
mov    $0xcfc,%dx
in     (%dx),%al
or     $0x1,%al
out    %al,(%dx)
mov    $0x80000b40,%eax
mov    $0xcf8,%dx
out    %eax,(%dx)
mov    $0x7001,%eax
mov    $0xcfc,%dx
out    %eax,(%dx)
mov    $0x2000,%ax
mov    $0x7004,%dx
out    %ax,(%dx)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @shutdown() {
ret i32 0
}

LLVM IR (-O2):
define i32 @shutdown() {
tail call void asm sideeffect "movl $$0x80000b80, %eax\0Amovw $$0xcf8, %dx\0Aoutl %eax, %dx\0Amovw $$0xcfc, %dx\0Ainb %dx, %al\0Aorb $$1, %al\0Aoutb %al, %dx\0A\0Amovl $$0x80000b40, %eax\0Amovw $$0xcf8, %dx\0Aoutl %eax, %dx\0Amovl $$0x7001, %eax\0Amovw $$0xcfc, %dx\0Aoutl %eax, %dx\0Amovw $$0x2000, %ax\0Amovw $$0x7004, %dx\0Aoutw %ax, %dx\0A", "~{dirflag},~{fpsr},~{flags}"()
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_pstream_send_packet() {
  printf("NOT IMPLEMENTED:"
         "pa_pstream_send_packet"
         "\n");
}


x86 assembly (clang, -O0):
<pa_pstream_send_packet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_pstream_send_packet>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [40 x i8] c"NOT IMPLEMENTED:pa_pstream_send_packet\0A\00"
define i32 @pa_pstream_send_packet() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([40 x i8], [40 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [39 x i8] c"NOT IMPLEMENTED:pa_pstream_send_packet\00"
define i32 @pa_pstream_send_packet() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([39 x i8], [39 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int main() {
  char out = 0x55;
  __asm__("movb $0x02, %%al; cmpb $0xFF, %%al; setc %%al" : "=a"(out));
  return out;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movb   $0x55,-0x5(%rbp)
mov    $0x2,%al
cmp    $0xff,%al
setb   %al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2,%al
cmp    $0xff,%al
setb   %al
movsbl %al,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
store i8 85, i8* %2
%3 = call i8 asm "movb $$0x02, %al; cmpb $$0xFF, %al; setc %al", "={ax},~{dirflag},~{fpsr},~{flags}"()
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i8 asm "movb $$0x02, %al; cmpb $$0xFF, %al; setc %al", "={ax},~{dirflag},~{fpsr},~{flags}"()
%2 = sext i8 %1 to i32
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ fun(int, double, char);
int main() {
  fun(23, 3.14, 'a');
  fun(20024, 2022.78, 'b');
  fun(420000000000000, 1.414, 'c');
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x17,%edi
movsd  0xeef(%rip),%xmm0
mov    $0x61,%esi
call   1030 <fun@plt>
mov    $0x4e38,%edi
movsd  0xed0(%rip),%xmm0
mov    $0x62,%esi
call   1030 <fun@plt>
mov    $0xdece4000,%edi
movsd  0xeb1(%rip),%xmm0
mov    $0x63,%esi
call   1030 <fun@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
movsd  0xee7(%rip),%xmm0
mov    $0x17,%edi
mov    $0x61,%esi
call   1030 <fun@plt>
movsd  0xed8(%rip),%xmm0
mov    $0x4e38,%edi
mov    $0x62,%esi
call   1030 <fun@plt>
movsd  0xec9(%rip),%xmm0
mov    $0xdece4000,%edi
mov    $0x63,%esi
call   1030 <fun@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @fun(i32 23, double 3.140000e+00, i8 signext 97)
%2 = call i32 @fun(i32 20024, double 2.022780e+03, i8 signext 98)
%3 = call i32 @fun(i32 -556908544, double 1.414000e+00, i8 signext 99)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @fun(i32 23, double 3.140000e+00, i8 signext 97)
%2 = tail call i32 @fun(i32 20024, double 2.022780e+03, i8 signext 98)
%3 = tail call i32 @fun(i32 -556908544, double 1.414000e+00, i8 signext 99)
ret i32 0
}
void fd102(int n) {
a : {
  typedef int(*b)[n];
P01A:
  goto P01A;
  {
    typedef int(*c)[n];
  P012A:
    goto P012A;
    0;
  }
P01B:
  goto P01B;
  {
    typedef int(*d)[n];
  P013A:
    goto P013A;
    0;
  }
P01C:
  goto P01C;
  ;
  typedef int(*e)[n];
p014A:
  goto p014A;
  goto a;
P014A:
  goto P014A;
  0;
};
P0B:
  goto P0B;
  {
    typedef int(*f)[n];
  P02A:
    goto P02A;
    {
      typedef int(*g)[n];
    P024A:
      goto P024A;
      0;
    };
  P02B:
    goto P02B;
    {
      typedef int(*h)[n];
    P025A:
      goto P025A;
      0;
    };
  P02C:
    goto P02C;
    ;
    typedef int(*i)[n];
  P026A:
    goto P026A;
    0;
  };
P0C:
  goto P0C;
  ;
  typedef int(*j)[n];
P03A:
  goto P03A;
  0;
P03B:
  goto P03B;
}


x86 assembly (clang, -O0):
<fd102>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
jmp    1107 <fd102+0x7>

x86 assembly (clang, -O2):
<fd102>:
jmp    1100 <fd102>

LLVM IR (-O0):
define void @fd102(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %1
%4 = load i32, i32* %2
%5 = zext i32 %4 to i64
br label %6
6: ; preds = %6, %3
br label %6
7: ; No predecessors!
%8 = load i32, i32* %2
%9 = zext i32 %8 to i64
br label %10
10: ; preds = %10, %7
br label %10
11: ; preds = %11
br label %11
12: ; No predecessors!
%13 = load i32, i32* %2
%14 = zext i32 %13 to i64
br label %15
15: ; preds = %15, %12
br label %15
16: ; preds = %16
br label %16
17: ; No predecessors!
%18 = load i32, i32* %2
%19 = zext i32 %18 to i64
br label %20
20: ; preds = %20, %17
br label %20
21: ; preds = %21
br label %21
22: ; preds = %22
br label %22
23: ; No predecessors!
%24 = load i32, i32* %2
%25 = zext i32 %24 to i64
br label %26
26: ; preds = %26, %23
br label %26
27: ; No predecessors!
%28 = load i32, i32* %2
%29 = zext i32 %28 to i64
br label %30
30: ; preds = %30, %27
br label %30
31: ; preds = %31
br label %31
32: ; No predecessors!
%33 = load i32, i32* %2
%34 = zext i32 %33 to i64
br label %35
35: ; preds = %35, %32
br label %35
36: ; preds = %36
br label %36
37: ; No predecessors!
%38 = load i32, i32* %2
%39 = zext i32 %38 to i64
br label %40
40: ; preds = %40, %37
br label %40
41: ; preds = %41
br label %41
42: ; No predecessors!
%43 = load i32, i32* %2
%44 = zext i32 %43 to i64
br label %45
45: ; preds = %45, %42
br label %45
46: ; preds = %46
br label %46
}

LLVM IR (-O2):
define void @fd102(i32 %0) {
br label %2
2: ; preds = %2, %1
br label %2
}
signed int f9(signed int v_foo) {
  signed int v_shr = v_foo << 2;
  signed int v_and = v_shr & 255;
  return v_and;
}


x86 assembly (clang, -O0):
<f9>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x2,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0xff,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f9>:
shl    $0x2,%edi
movzbl %dil,%eax
ret

LLVM IR (-O0):
define i32 @f9(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = shl i32 %5, 2
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = and i32 %7, 255
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @f9(i32 %0) {
%2 = shl i32 %0, 2
%3 = and i32 %2, 252
ret i32 %3
}
/* Forward declarations */
typedef struct TYPE_4__ TYPE_2__;
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  scalar_t__ rbearing;
};
struct TYPE_4__ {
  TYPE_1__ min_bounds;
};
typedef TYPE_2__ XFontStruct;

/* Variables and functions */
short get_XFontStruct_min_bounds_rbearing(void *_p) {
  return (short)((XFontStruct *)_p)->min_bounds.rbearing;
}


x86 assembly (clang, -O0):
<get_XFontStruct_min_bounds_rbearing>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XFontStruct_min_bounds_rbearing>:
movzwl (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_4__ = type { %struct.TYPE_3__ }
%struct.TYPE_3__ = type { i64 }
define signext i16 @get_XFontStruct_min_bounds_rbearing(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_4__*
%5 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %4, i32 0, i32 0
%6 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %5, i32 0, i32 0
%7 = load i64, i64* %6
%8 = trunc i64 %7 to i16
ret i16 %8
}

LLVM IR (-O2):
define signext i16 @get_XFontStruct_min_bounds_rbearing(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i16
ret i16 %4
}
__attribute__((no, noclone)) int f11(void *a, int b, long long c, long long d,
                                     long long e, long f, long *g, int *h,
                                     int *i) {
  asm volatile("" : : "r"(a), "r"(b), "r"(c), "r"(d) : "memory");
  asm volatile("" : : "r"(e), "r"(f), "r"(g), "r"(h) : "memory");
  asm volatile("" : : "r"(i) : "memory");
  return 0;
}


x86 assembly (clang, -O0):
<f11>:
push   %rbp
mov    %rsp,%rbp
mov    0x20(%rbp),%rax
mov    0x18(%rbp),%rax
mov    0x10(%rbp),%rax
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    %r8,-0x28(%rbp)
mov    %r9,-0x30(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rsi
mov    -0x28(%rbp),%rax
mov    -0x30(%rbp),%rcx
mov    0x10(%rbp),%rdx
mov    0x18(%rbp),%rsi
mov    0x20(%rbp),%rax
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f11>:
mov    0x18(%rsp),%r10
mov    0x8(%rsp),%r11
mov    0x10(%rsp),%rax
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @f11(i8* %0, i32 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64* %6, i32* %7, i32* %8) {
%10 = alloca i8*
%11 = alloca i32
%12 = alloca i64
%13 = alloca i64
%14 = alloca i64
%15 = alloca i64
%16 = alloca i64*
%17 = alloca i32*
%18 = alloca i32*
store i8* %0, i8** %10
store i32 %1, i32* %11
store i64 %2, i64* %12
store i64 %3, i64* %13
store i64 %4, i64* %14
store i64 %5, i64* %15
store i64* %6, i64** %16
store i32* %7, i32** %17
store i32* %8, i32** %18
%19 = load i8*, i8** %10
%20 = load i32, i32* %11
%21 = load i64, i64* %12
%22 = load i64, i64* %13
%23 = load i64, i64* %14
%24 = load i64, i64* %15
%25 = load i64*, i64** %16
%26 = load i32*, i32** %17
%27 = load i32*, i32** %18
ret i32 0
}

LLVM IR (-O2):
define i32 @f11(i8* %0, i32 %1, i64 %2, i64 %3, i64 %4, i64 %5, i64* %6, i32* %7, i32* %8) {
tail call void asm sideeffect "", "r,r,r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i8* %0, i32 %1, i64 %2, i64 %3)
tail call void asm sideeffect "", "r,r,r,r,~{memory},~{dirflag},~{fpsr},~{flags}"(i64 %4, i64 %5, i64* %6, i32* %7)
tail call void asm sideeffect "", "r,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %8)
ret i32 0
}
void Dswap2BArr(void *val, int n) {
  int i;
  char a;
  char *c = (char *)val;
  for (i = 0; i < 2 * n; i += 2) {
    a = c[i];
    c[i] = c[i + 1];
    c[i + 1] = a;
  }
}


x86 assembly (clang, -O0):
<Dswap2BArr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x10(%rbp),%eax
mov    -0xc(%rbp),%ecx
shl    $0x1,%ecx
cmp    %ecx,%eax
jge    1175 <Dswap2BArr+0x75>
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,1),%al
mov    %al,-0x11(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
mov    (%rax,%rcx,1),%dl
mov    -0x20(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x11(%rbp),%dl
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%ecx
add    $0x1,%ecx
movslq %ecx,%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x10(%rbp),%eax
add    $0x2,%eax
mov    %eax,-0x10(%rbp)
jmp    111a <Dswap2BArr+0x1a>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Dswap2BArr>:
test   %esi,%esi
jle    111e <Dswap2BArr+0x1e>
add    %esi,%esi
movslq %esi,%rax
xor    %ecx,%ecx
nopl   0x0(%rax,%rax,1)
rolw   $0x8,(%rdi,%rcx,1)
add    $0x2,%rcx
cmp    %rax,%rcx
jl     1110 <Dswap2BArr+0x10>
ret

LLVM IR (-O0):
define void @Dswap2BArr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8
%7 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%8 = load i8*, i8** %3
store i8* %8, i8** %7
store i32 0, i32* %5
br label %9
9: ; preds = %36, %2
%10 = load i32, i32* %5
%11 = load i32, i32* %4
%12 = mul nsw i32 2, %11
%13 = icmp slt i32 %10, %12
br i1 %13, label %14, label %39
14: ; preds = %9
%15 = load i8*, i8** %7
%16 = load i32, i32* %5
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i8, i8* %15, i64 %17
%19 = load i8, i8* %18
store i8 %19, i8* %6
%20 = load i8*, i8** %7
%21 = load i32, i32* %5
%22 = add nsw i32 %21, 1
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %20, i64 %23
%25 = load i8, i8* %24
%26 = load i8*, i8** %7
%27 = load i32, i32* %5
%28 = sext i32 %27 to i64
%29 = getelementptr inbounds i8, i8* %26, i64 %28
store i8 %25, i8* %29
%30 = load i8, i8* %6
%31 = load i8*, i8** %7
%32 = load i32, i32* %5
%33 = add nsw i32 %32, 1
%34 = sext i32 %33 to i64
%35 = getelementptr inbounds i8, i8* %31, i64 %34
store i8 %30, i8* %35
br label %36
36: ; preds = %14
%37 = load i32, i32* %5
%38 = add nsw i32 %37, 2
store i32 %38, i32* %5
br label %9
39: ; preds = %9
ret void
}

LLVM IR (-O2):
define void @Dswap2BArr(i8* nocapture %0, i32 %1) {
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %16
4: ; preds = %2
%5 = shl nuw nsw i32 %1, 1
%6 = sext i32 %5 to i64
br label %7
7: ; preds = %4, %7
%8 = phi i64 [ 0, %4 ], [ %14, %7 ]
%9 = getelementptr inbounds i8, i8* %0, i64 %8
%10 = load i8, i8* %9
%11 = or i64 %8, 1
%12 = getelementptr inbounds i8, i8* %0, i64 %11
%13 = load i8, i8* %12
store i8 %13, i8* %9
store i8 %10, i8* %12
%14 = add nuw nsw i64 %8, 2
%15 = icmp slt i64 %14, %6
br i1 %15, label %7, label %16
16: ; preds = %7, %2
ret void
}