#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int sio_read_reg(int, unsigned long *);
int FS460_get_input_mux(int channel, int *p_input) {
  int err;
  unsigned long mux1;
  if (!p_input)
    return 0x1000;
  err = sio_read_reg(0x3C, &mux1);
  if (err)
    return err;
  switch (channel) {
  default:
    return 0x1000;
  case 1: {
    if (mux1 & (1 << 0))
      *p_input = 1;
    else
      *p_input = 2;
  } break;
  case 3: {
    if (mux1 & (1 << 1))
      *p_input = 1;
    else
      *p_input = 2;
  } break;
  }
  return 0;
}


x86 assembly (clang, -O0):
<FS460_get_input_mux>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1136 <FS460_get_input_mux+0x26>
movl   $0x1000,-0x4(%rbp)
jmp    11f4 <FS460_get_input_mux+0xe4>
mov    $0x3c,%edi
lea    -0x20(%rbp),%rsi
call   1030 <sio_read_reg@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     115c <FS460_get_input_mux+0x4c>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    11f4 <FS460_get_input_mux+0xe4>
mov    -0x8(%rbp),%eax
mov    %eax,-0x24(%rbp)
sub    $0x1,%eax
je     118d <FS460_get_input_mux+0x7d>
jmp    1170 <FS460_get_input_mux+0x60>
mov    -0x24(%rbp),%eax
sub    $0x3,%eax
je     11bd <FS460_get_input_mux+0xad>
jmp    1181 <FS460_get_input_mux+0x71>
movl   $0x1000,-0x4(%rbp)
jmp    11f4 <FS460_get_input_mux+0xe4>
mov    -0x20(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     11ae <FS460_get_input_mux+0x9e>
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
jmp    11b8 <FS460_get_input_mux+0xa8>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
jmp    11ed <FS460_get_input_mux+0xdd>
mov    -0x20(%rbp),%rax
and    $0x2,%rax
cmp    $0x0,%rax
je     11de <FS460_get_input_mux+0xce>
mov    -0x10(%rbp),%rax
movl   $0x1,(%rax)
jmp    11e8 <FS460_get_input_mux+0xd8>
mov    -0x10(%rbp),%rax
movl   $0x2,(%rax)
jmp    11ed <FS460_get_input_mux+0xdd>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FS460_get_input_mux>:
push   %rbp
push   %rbx
push   %rax
mov    $0x1000,%eax
test   %rsi,%rsi
je     1162 <FS460_get_input_mux+0x52>
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsp,%rsi
mov    $0x3c,%edi
call   1030 <sio_read_reg@plt>
test   %eax,%eax
jne    1162 <FS460_get_input_mux+0x52>
cmp    $0x3,%ebp
je     114b <FS460_get_input_mux+0x3b>
mov    $0x1000,%eax
cmp    $0x1,%ebp
jne    1162 <FS460_get_input_mux+0x52>
mov    (%rsp),%rax
and    $0x1,%eax
jmp    1152 <FS460_get_input_mux+0x42>
mov    (%rsp),%rax
and    $0x2,%eax
cmp    $0x1,%rax
mov    $0x1,%eax
adc    $0x0,%eax
mov    %eax,(%rbx)
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @FS460_get_input_mux(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i64
store i32 %0, i32* %4
store i32* %1, i32** %5
%8 = load i32*, i32** %5
%9 = icmp ne i32* %8, null
br i1 %9, label %11, label %10
10: ; preds = %2
store i32 4096, i32* %3
br label %39
11: ; preds = %2
%12 = call i32 @sio_read_reg(i32 60, i64* %7)
store i32 %12, i32* %6
%13 = load i32, i32* %6
%14 = icmp ne i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %11
%16 = load i32, i32* %6
store i32 %16, i32* %3
br label %39
17: ; preds = %11
%18 = load i32, i32* %4
switch i32 %18, label %19 [
i32 1, label %20
i32 3, label %29
]
19: ; preds = %17
store i32 4096, i32* %3
br label %39
20: ; preds = %17
%21 = load i64, i64* %7
%22 = and i64 %21, 1
%23 = icmp ne i64 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %20
%25 = load i32*, i32** %5
store i32 1, i32* %25
br label %28
26: ; preds = %20
%27 = load i32*, i32** %5
store i32 2, i32* %27
br label %28
28: ; preds = %26, %24
br label %38
29: ; preds = %17
%30 = load i64, i64* %7
%31 = and i64 %30, 2
%32 = icmp ne i64 %31, 0
br i1 %32, label %33, label %35
33: ; preds = %29
%34 = load i32*, i32** %5
store i32 1, i32* %34
br label %37
35: ; preds = %29
%36 = load i32*, i32** %5
store i32 2, i32* %36
br label %37
37: ; preds = %35, %33
br label %38
38: ; preds = %37, %28
store i32 0, i32* %3
br label %39
39: ; preds = %38, %19, %15, %10
%40 = load i32, i32* %3
ret i32 %40
}

LLVM IR (-O2):
define i32 @FS460_get_input_mux(i32 %0, i32* writeonly %1) {
%3 = alloca i64
%4 = bitcast i64* %3 to i8*
%5 = icmp eq i32* %1, null
br i1 %5, label %20, label %6
6: ; preds = %2
%7 = call i32 @sio_read_reg(i32 60, i64* %3)
%8 = icmp eq i32 %7, 0
br i1 %8, label %9, label %20
9: ; preds = %6
switch i32 %0, label %20 [
i32 1, label %10
i32 3, label %13
]
10: ; preds = %9
%11 = load i64, i64* %3
%12 = and i64 %11, 1
br label %16
13: ; preds = %9
%14 = load i64, i64* %3
%15 = and i64 %14, 2
br label %16
16: ; preds = %13, %10
%17 = phi i64 [ %15, %13 ], [ %12, %10 ]
%18 = icmp eq i64 %17, 0
%19 = select i1 %18, i32 2, i32 1
store i32 %19, i32* %1
br label %20
20: ; preds = %16, %9, %6, %2
%21 = phi i32 [ 4096, %2 ], [ %7, %6 ], [ 4096, %9 ], [ 0, %16 ]
ret i32 %21
}