xunge/DecIR huggingface dataset:
double dbl_cmp_ne(double a, double b, double c, double d) {
  return (a != b) ? c : d;
}


x86 assembly (clang, -O0):
<dbl_cmp_ne>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  %xmm2,-0x18(%rbp)
movsd  %xmm3,-0x20(%rbp)
movsd  -0x8(%rbp),%xmm0
ucomisd -0x10(%rbp),%xmm0
jne    1133 <dbl_cmp_ne+0x33>
jp     1133 <dbl_cmp_ne+0x33>
jmp    1142 <dbl_cmp_ne+0x42>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
jmp    114c <dbl_cmp_ne+0x4c>
movsd  -0x20(%rbp),%xmm0
movsd  %xmm0,-0x28(%rbp)
movsd  -0x28(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dbl_cmp_ne>:
cmpneqsd %xmm1,%xmm0
andpd  %xmm0,%xmm2
andnpd %xmm3,%xmm0
orpd   %xmm2,%xmm0
ret

LLVM IR (-O0):
define double @dbl_cmp_ne(double %0, double %1, double %2, double %3) {
%5 = alloca double
%6 = alloca double
%7 = alloca double
%8 = alloca double
store double %0, double* %5
store double %1, double* %6
store double %2, double* %7
store double %3, double* %8
%9 = load double, double* %5
%10 = load double, double* %6
%11 = fcmp une double %9, %10
br i1 %11, label %12, label %14
12: ; preds = %4
%13 = load double, double* %7
br label %16
14: ; preds = %4
%15 = load double, double* %8
br label %16
16: ; preds = %14, %12
%17 = phi double [ %13, %12 ], [ %15, %14 ]
ret double %17
}

LLVM IR (-O2):
define double @dbl_cmp_ne(double %0, double %1, double %2, double %3) {
%5 = fcmp une double %0, %1
%6 = select i1 %5, double %2, double %3
ret double %6
}
/* Variables and functions */
int test();
int main(int argv, char **argc) { return test(); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <test@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <test@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = call i32 (...) @test()
ret i32 %6
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @test()
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ matches(int);
void op_matchfld() { matches(1); }


x86 assembly (clang, -O0):
<op_matchfld>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <matches@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<op_matchfld>:
mov    $0x1,%edi
jmp    1030 <matches@plt>

LLVM IR (-O0):
define void @op_matchfld() {
%1 = call i32 @matches(i32 1)
ret void
}

LLVM IR (-O2):
define void @op_matchfld() {
%1 = tail call i32 @matches(i32 1)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
size_t fwrite(void const *, int, size_t, int /*<<< orphan*/ *);
size_t MyWriteFile(FILE *file, const void *data, size_t size) {
  if (size == 0)
    return 0;
  return fwrite(data, 1, size, file);
}


x86 assembly (clang, -O0):
<MyWriteFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
cmpq   $0x0,-0x20(%rbp)
jne    113c <MyWriteFile+0x2c>
movq   $0x0,-0x8(%rbp)
jmp    1156 <MyWriteFile+0x46>
mov    -0x18(%rbp),%rdi
mov    -0x20(%rbp),%rdx
mov    -0x10(%rbp),%rcx
mov    $0x1,%esi
call   1030 <fwrite@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MyWriteFile>:
test   %rdx,%rdx
je     1125 <MyWriteFile+0x15>
mov    %rdi,%rcx
mov    %rsi,%rdi
mov    $0x1,%esi
jmp    1030 <fwrite@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @MyWriteFile(i32* %0, i8* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i64
store i32* %0, i32** %5
store i8* %1, i8** %6
store i64 %2, i64* %7
%8 = load i64, i64* %7
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
store i64 0, i64* %4
br label %16
11: ; preds = %3
%12 = load i8*, i8** %6
%13 = load i64, i64* %7
%14 = load i32*, i32** %5
%15 = call i64 @fwrite(i8* %12, i32 1, i64 %13, i32* %14)
store i64 %15, i64* %4
br label %16
16: ; preds = %11, %10
%17 = load i64, i64* %4
ret i64 %17
}

LLVM IR (-O2):
define i64 @MyWriteFile(i32* nocapture %0, i8* nocapture %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i64 @fwrite(i8* %1, i32 1, i64 %2, i32* %0)
br label %7
7: ; preds = %3, %5
%8 = phi i64 [ %6, %5 ], [ 0, %3 ]
ret i64 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int read_i2c_reg(int, int, int /*<<< orphan*/ *);
int piups_get_vauxoconv(int file_i2c, uint16_t *vaoconv) {
  return read_i2c_reg(file_i2c, 0x5A, vaoconv);
}


x86 assembly (clang, -O0):
<piups_get_vauxoconv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    $0x5a,%esi
call   1030 <read_i2c_reg@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<piups_get_vauxoconv>:
mov    %rsi,%rdx
mov    $0x5a,%esi
jmp    1030 <read_i2c_reg@plt>

LLVM IR (-O0):
define i32 @piups_get_vauxoconv(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i32 @read_i2c_reg(i32 %5, i32 90, i32* %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @piups_get_vauxoconv(i32 %0, i32* %1) {
%3 = tail call i32 @read_i2c_reg(i32 %0, i32 90, i32* %1)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void myexit(int status) { exit(status); }


x86 assembly (clang, -O0):
<myexit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <exit@plt>

x86 assembly (clang, -O2):
<myexit>:
push   %rax
call   1030 <exit@plt>

LLVM IR (-O0):
define void @myexit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @exit(i32 %3)
unreachable
}

LLVM IR (-O2):
define void @myexit(i32 %0) {
%2 = tail call i32 @exit(i32 %0)
unreachable
}
void gtk_item_get_type() {}


x86 assembly (clang, -O0):
<gtk_item_get_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_item_get_type>:
ret

LLVM IR (-O0):
define void @gtk_item_get_type() {
ret void
}

LLVM IR (-O2):
define void @gtk_item_get_type() {
ret void
}
/* Type definitions */
typedef unsigned long long uint64_t;
struct timezone {
  int /*<<< orphan*/ member_1;
  int /*<<< orphan*/ member_0;
};
struct timeval {
  scalar_t__ tv_usec;
  scalar_t__ tv_sec;
};

/* Variables and functions */
int /*<<< orphan*/ gettimeofday(struct timeval *, struct timezone *);
uint64_t tm_get_tics() {
  struct timezone tz = {0, 0};
  struct timeval tv;
  gettimeofday(&tv, &tz);
  return (uint64_t)tv.tv_sec * 1000000ULL + (uint64_t)tv.tv_usec;
}


x86 assembly (clang, -O0):
<tm_get_tics>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
lea    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1040 <memset@plt>
lea    -0x18(%rbp),%rdi
lea    -0x8(%rbp),%rsi
call   1030 <gettimeofday@plt>
imul   $0xf4240,-0x10(%rbp),%rax
add    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tm_get_tics>:
sub    $0x18,%rsp
movq   $0x0,(%rsp)
lea    0x8(%rsp),%rdi
mov    %rsp,%rsi
call   1030 <gettimeofday@plt>
imul   $0xf4240,0x10(%rsp),%rax
add    0x8(%rsp),%rax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timezone = type { i32, i32 }
%struct.timeval = type { i64, i64 }
define i64 @tm_get_tics() {
%1 = alloca %struct.timezone
%2 = alloca %struct.timeval
%3 = bitcast %struct.timezone* %1 to i8*
%4 = call i32 @gettimeofday(%struct.timeval* %2, %struct.timezone* %1)
%5 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i32 0, i32 1
%6 = load i64, i64* %5
%7 = mul i64 %6, 1000000
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i32 0, i32 0
%9 = load i64, i64* %8
%10 = add i64 %7, %9
ret i64 %10
}

LLVM IR (-O2):
%struct.timezone = type { i32, i32 }
%struct.timeval = type { i64, i64 }
define i64 @tm_get_tics() {
%1 = alloca i64
%2 = bitcast i64* %1 to %struct.timezone*
%3 = alloca %struct.timeval
%4 = bitcast i64* %1 to i8*
store i64 0, i64* %1
%5 = bitcast %struct.timeval* %3 to i8*
%6 = call i32 @gettimeofday(%struct.timeval* %3, %struct.timezone* %2)
%7 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i64 0, i32 1
%8 = load i64, i64* %7
%9 = mul i64 %8, 1000000
%10 = getelementptr inbounds %struct.timeval, %struct.timeval* %3, i64 0, i32 0
%11 = load i64, i64* %10
%12 = add i64 %9, %11
ret i64 %12
}
int test_imm_A9int64_midword_reg(long long val) {
  return ((val >> 16) & (0xA9 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_A9int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0xa9,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_A9int64_midword_reg>:
test   $0xa90000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_A9int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 169
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_A9int64_midword_reg(i64 %0) {
%2 = and i64 %0, 11075584
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void thread_destructor(void *ptr) { free(ptr); }


x86 assembly (clang, -O0):
<thread_destructor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thread_destructor>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @thread_destructor(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @thread_destructor(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ O_WRONLY;
int /*<<< orphan*/ close(int);
int open(char *, int /*<<< orphan*/);
int /*<<< orphan*/ write(int, void *, int);
void iproute_flush_cache(void) {
  int fd;
  char *buffer = "-1";
  if ((fd = open("/proc/sys/net/ipv4/route/flush", O_WRONLY)) < 0)
    return;
  write(fd, (void *)buffer, 2);
  close(fd);
}


x86 assembly (clang, -O0):
<iproute_flush_cache>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xec1(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    0x2e8e(%rip),%rax
mov    (%rax),%esi
lea    0xeb0(%rip),%rdi
call   1050 <open@plt>
mov    %eax,-0x4(%rbp)
cmp    $0x0,%eax
jge    1169 <iproute_flush_cache+0x39>
jmp    1182 <iproute_flush_cache+0x52>
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x2,%edx
call   1030 <write@plt>
mov    -0x4(%rbp),%edi
call   1040 <close@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<iproute_flush_cache>:
push   %rbx
mov    0x2ea0(%rip),%rax
mov    (%rax),%esi
lea    0xec2(%rip),%rdi
call   1050 <open@plt>
test   %eax,%eax
js     1167 <iproute_flush_cache+0x37>
mov    %eax,%ebx
lea    0xead(%rip),%rsi
mov    %eax,%edi
mov    $0x2,%edx
call   1030 <write@plt>
mov    %ebx,%edi
pop    %rbx
jmp    1040 <close@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"-1\00"
@.str.1 = [31 x i8] c"/proc/sys/net/ipv4/route/flush\00"
@O_WRONLY = global i32 0
define void @iproute_flush_cache() {
%1 = alloca i32
%2 = alloca i8*
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
%3 = load i32, i32* @O_WRONLY
%4 = call i32 @open(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0), i32 %3)
store i32 %4, i32* %1
%5 = icmp slt i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
br label %13
7: ; preds = %0
%8 = load i32, i32* %1
%9 = load i8*, i8** %2
%10 = call i32 @write(i32 %8, i8* %9, i32 2)
%11 = load i32, i32* %1
%12 = call i32 @close(i32 %11)
br label %13
13: ; preds = %7, %6
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"-1\00"
@.str.1 = [31 x i8] c"/proc/sys/net/ipv4/route/flush\00"
@O_WRONLY = global i32 0
define void @iproute_flush_cache() {
%1 = load i32, i32* @O_WRONLY
%2 = tail call i32 @open(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str.1, i64 0, i64 0), i32 %1)
%3 = icmp slt i32 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %0
%5 = tail call i32 @write(i32 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 2)
%6 = tail call i32 @close(i32 %2)
br label %7
7: ; preds = %0, %4
ret void
}
int is_leap_year(const int y) {
  if (y & 3)
    return 0;
  switch (y % 400) {
  case 100:
  case 200:
  case 300:
    return 0;
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_leap_year>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    $0x3,%eax
cmp    $0x0,%eax
je     1122 <is_leap_year+0x22>
movl   $0x0,-0x4(%rbp)
jmp    118e <is_leap_year+0x8e>
movslq -0x8(%rbp),%rcx
mov    %ecx,%eax
imul   $0x51eb851f,%rcx,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x27,%rcx
add    %edx,%ecx
imul   $0x190,%ecx,%ecx
sub    %ecx,%eax
mov    %eax,-0xc(%rbp)
sub    $0x64,%eax
je     117b <is_leap_year+0x7b>
jmp    1155 <is_leap_year+0x55>
mov    -0xc(%rbp),%eax
sub    $0xc8,%eax
je     117b <is_leap_year+0x7b>
jmp    1168 <is_leap_year+0x68>
mov    -0xc(%rbp),%eax
sub    $0x12c,%eax
jne    1187 <is_leap_year+0x87>
jmp    117b <is_leap_year+0x7b>
movl   $0x0,-0x4(%rbp)
jmp    118e <is_leap_year+0x8e>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_leap_year>:
xor    %eax,%eax
test   $0x3,%dil
je     1109 <is_leap_year+0x9>
ret
movslq %edi,%rcx
imul   $0x51eb851f,%rcx,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x27,%rcx
add    %edx,%ecx
imul   $0x190,%ecx,%ecx
sub    %ecx,%edi
cmp    $0x64,%edi
je     1108 <is_leap_year+0x8>
cmp    $0xc8,%edi
je     1108 <is_leap_year+0x8>
cmp    $0x12c,%edi
je     1108 <is_leap_year+0x8>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_leap_year(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = and i32 %4, 3
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, i32* %2
br label %13
8: ; preds = %1
%9 = load i32, i32* %3
%10 = srem i32 %9, 400
switch i32 %10, label %12 [
i32 100, label %11
i32 200, label %11
i32 300, label %11
]
11: ; preds = %8, %8, %8
store i32 0, i32* %2
br label %13
12: ; preds = %8
store i32 1, i32* %2
br label %13
13: ; preds = %12, %11, %7
%14 = load i32, i32* %2
ret i32 %14
}

LLVM IR (-O2):
define i32 @is_leap_year(i32 %0) {
%2 = and i32 %0, 3
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = srem i32 %0, 400
switch i32 %5, label %6 [
i32 100, label %7
i32 200, label %7
i32 300, label %7
]
6: ; preds = %4
br label %7
7: ; preds = %4, %4, %4, %1, %6
%8 = phi i32 [ 1, %6 ], [ 0, %1 ], [ 0, %4 ], [ 0, %4 ], [ 0, %4 ]
ret i32 %8
}
/* Variables and functions */
double log(int);
double U_0(double zom_0, double u2m) {
  double u_0;
  u_0 = u2m * 0.41 * log(200 / (1.0 / 7)) /
        (log(2 / (1.0 / 7)) * log(200 / zom_0));
  return u_0;
}


x86 assembly (clang, -O0):
<U_0>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  0xede(%rip),%xmm0
mulsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x30(%rbp)
mov    $0x578,%edi
call   1030 <log@plt>
movaps %xmm0,%xmm1
movsd  -0x30(%rbp),%xmm0
mulsd  %xmm1,%xmm0
movsd  %xmm0,-0x20(%rbp)
mov    $0xe,%edi
call   1030 <log@plt>
movsd  %xmm0,-0x28(%rbp)
movsd  0xe9a(%rip),%xmm0
divsd  -0x8(%rbp),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
movsd  -0x28(%rbp),%xmm1
movaps %xmm0,%xmm2
movsd  -0x20(%rbp),%xmm0
mulsd  %xmm2,%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x18(%rbp)
movsd  -0x18(%rbp),%xmm0
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_0>:
sub    $0x18,%rsp
movsd  %xmm0,0x10(%rsp)
mulsd  0xede(%rip),%xmm1
movsd  %xmm1,(%rsp)
mov    $0x578,%edi
call   1030 <log@plt>
mulsd  (%rsp),%xmm0
movsd  %xmm0,(%rsp)
mov    $0xe,%edi
call   1030 <log@plt>
movsd  %xmm0,0x8(%rsp)
movsd  0xeb5(%rip),%xmm0
divsd  0x10(%rsp),%xmm0
cvttsd2si %xmm0,%edi
call   1030 <log@plt>
mulsd  0x8(%rsp),%xmm0
movsd  (%rsp),%xmm1
divsd  %xmm0,%xmm1
movapd %xmm1,%xmm0
add    $0x18,%rsp
ret

LLVM IR (-O0):
define double @U_0(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %3
store double %1, double* %4
%6 = load double, double* %4
%7 = fmul double %6, 4.100000e-01
%8 = call double @log(i32 1400)
%9 = fmul double %7, %8
%10 = call double @log(i32 14)
%11 = load double, double* %3
%12 = fdiv double 2.000000e+02, %11
%13 = fptosi double %12 to i32
%14 = call double @log(i32 %13)
%15 = fmul double %10, %14
%16 = fdiv double %9, %15
store double %16, double* %5
%17 = load double, double* %5
ret double %17
}

LLVM IR (-O2):
define double @U_0(double %0, double %1) {
%3 = fmul double %1, 4.100000e-01
%4 = tail call double @log(i32 1400)
%5 = fmul double %3, %4
%6 = tail call double @log(i32 14)
%7 = fdiv double 2.000000e+02, %0
%8 = fptosi double %7 to i32
%9 = tail call double @log(i32 %8)
%10 = fmul double %6, %9
%11 = fdiv double %5, %10
ret double %11
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
bool overlap(const uint8_t *x, const size_t xlen, const uint8_t *y,
             const size_t ylen) {
  const uint8_t *x_end = x + xlen;
  const uint8_t *y_end = y + ylen;
  return ((y < x_end) && (x < y_end));
}


x86 assembly (clang, -O0):
<overlap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x28(%rbp)
mov    -0x18(%rbp),%rax
mov    -0x20(%rbp),%rcx
shl    $0x2,%rcx
add    %rcx,%rax
mov    %rax,-0x30(%rbp)
mov    -0x18(%rbp),%rcx
xor    %eax,%eax
cmp    -0x28(%rbp),%rcx
mov    %al,-0x31(%rbp)
jae    115b <overlap+0x5b>
mov    -0x8(%rbp),%rax
cmp    -0x30(%rbp),%rax
setb   %al
mov    %al,-0x31(%rbp)
mov    -0x31(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<overlap>:
lea    (%rdi,%rsi,4),%rax
lea    (%rdx,%rcx,4),%rcx
cmp    %rdx,%rax
seta   %al
cmp    %rdi,%rcx
seta   %cl
and    %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @overlap(i32* %0, i64 %1, i32* %2, i64 %3) {
%5 = alloca i32*
%6 = alloca i64
%7 = alloca i32*
%8 = alloca i64
%9 = alloca i32*
%10 = alloca i32*
store i32* %0, i32** %5
store i64 %1, i64* %6
store i32* %2, i32** %7
store i64 %3, i64* %8
%11 = load i32*, i32** %5
%12 = load i64, i64* %6
%13 = getelementptr inbounds i32, i32* %11, i64 %12
store i32* %13, i32** %9
%14 = load i32*, i32** %7
%15 = load i64, i64* %8
%16 = getelementptr inbounds i32, i32* %14, i64 %15
store i32* %16, i32** %10
%17 = load i32*, i32** %7
%18 = load i32*, i32** %9
%19 = icmp ult i32* %17, %18
br i1 %19, label %20, label %24
20: ; preds = %4
%21 = load i32*, i32** %5
%22 = load i32*, i32** %10
%23 = icmp ult i32* %21, %22
br label %24
24: ; preds = %20, %4
%25 = phi i1 [ false, %4 ], [ %23, %20 ]
%26 = zext i1 %25 to i32
ret i32 %26
}

LLVM IR (-O2):
define i32 @overlap(i32* readnone %0, i64 %1, i32* readnone %2, i64 %3) {
%5 = getelementptr inbounds i32, i32* %0, i64 %1
%6 = getelementptr inbounds i32, i32* %2, i64 %3
%7 = icmp ugt i32* %5, %2
%8 = icmp ugt i32* %6, %0
%9 = select i1 %7, i1 %8, i1 false
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Type definitions */
struct vmbuf {
  int dummy;
};

/* Variables and functions */
scalar_t__ vmbuf_wloc(struct vmbuf *);
int vmbuf_wseek(struct vmbuf *, int);
int vmbuf_chrcpy(struct vmbuf *vmbuf, char c) {
  *(char *)vmbuf_wloc(vmbuf) = c;
  return vmbuf_wseek(vmbuf, 1);
}


x86 assembly (clang, -O0):
<vmbuf_chrcpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <vmbuf_wloc@plt>
mov    -0xa(%rbp),%cl
mov    %cl,(%rax)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1040 <vmbuf_wseek@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<vmbuf_chrcpy>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
call   1030 <vmbuf_wloc@plt>
mov    %bpl,(%rax)
mov    %rbx,%rdi
mov    $0x1,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <vmbuf_wseek@plt>

LLVM IR (-O0):
%struct.vmbuf = type { i32 }
define i32 @vmbuf_chrcpy(%struct.vmbuf* %0, i8 signext %1) {
%3 = alloca %struct.vmbuf*
%4 = alloca i8
store %struct.vmbuf* %0, %struct.vmbuf** %3
store i8 %1, i8* %4
%5 = load i8, i8* %4
%6 = load %struct.vmbuf*, %struct.vmbuf** %3
%7 = call i64 @vmbuf_wloc(%struct.vmbuf* %6)
%8 = inttoptr i64 %7 to i8*
store i8 %5, i8* %8
%9 = load %struct.vmbuf*, %struct.vmbuf** %3
%10 = call i32 @vmbuf_wseek(%struct.vmbuf* %9, i32 1)
ret i32 %10
}

LLVM IR (-O2):
%struct.vmbuf = type { i32 }
define i32 @vmbuf_chrcpy(%struct.vmbuf* %0, i8 signext %1) {
%3 = tail call i64 @vmbuf_wloc(%struct.vmbuf* %0)
%4 = inttoptr i64 %3 to i8*
store i8 %1, i8* %4
%5 = tail call i32 @vmbuf_wseek(%struct.vmbuf* %0, i32 1)
ret i32 %5
}
/* Variables and functions */
double logn(double, int);
double log2(double n) { return logn(n, 2); }


x86 assembly (clang, -O0):
<log2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <logn@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log2>:
mov    $0x2,%edi
jmp    1030 <logn@plt>

LLVM IR (-O0):
define double @log2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @logn(double %3, i32 2)
ret double %4
}

LLVM IR (-O2):
define double @log2(double %0) {
%2 = tail call double @logn(double %0, i32 2)
ret double %2
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int /*<<< orphan*/ ASSERT(int);
uint32_t WatchdogReloadGet(uint32_t ui32Base) {
  ASSERT((ui32Base == 0x40000000) || (ui32Base == 0x40001000));
  return ((*((volatile uint32_t *)(ui32Base + 0x00000000))));
}


x86 assembly (clang, -O0):
<WatchdogReloadGet>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x1,%al
cmpl   $0x40000000,-0x4(%rbp)
mov    %al,-0x5(%rbp)
je     113a <WatchdogReloadGet+0x2a>
cmpl   $0x40001000,-0x4(%rbp)
sete   %al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%edi
call   1030 <ASSERT@plt>
mov    -0x4(%rbp),%eax
add    $0x0,%eax
cltq
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<WatchdogReloadGet>:
push   %rbx
mov    %edi,%ebx
mov    %edi,%eax
and    $0xffffefff,%eax
xor    %edi,%edi
cmp    $0x40000000,%eax
sete   %dil
call   1030 <ASSERT@plt>
movslq %ebx,%rax
mov    (%rax),%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @WatchdogReloadGet(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 1073741824
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 1073745920
br label %8
8: ; preds = %5, %1
%9 = phi i1 [ true, %1 ], [ %7, %5 ]
%10 = zext i1 %9 to i32
%11 = call i32 @ASSERT(i32 %10)
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 0
%14 = sext i32 %13 to i64
%15 = inttoptr i64 %14 to i32*
%16 = load volatile i32, i32* %15
ret i32 %16
}

LLVM IR (-O2):
define i32 @WatchdogReloadGet(i32 %0) {
%2 = and i32 %0, -4097
%3 = icmp eq i32 %2, 1073741824
%4 = zext i1 %3 to i32
%5 = tail call i32 @ASSERT(i32 %4)
%6 = sext i32 %0 to i64
%7 = inttoptr i64 %6 to i32*
%8 = load volatile i32, i32* %7
ret i32 %8
}
/* Type definitions */
typedef int uint64_t;
struct timespec {
  unsigned long long tv_sec;
  int tv_nsec;
};

/* Variables and functions */
int /*<<< orphan*/ CLOCK_REALTIME;
scalar_t__ clock_gettime(int /*<<< orphan*/, struct timespec *);
uint64_t gettime() {
  struct timespec tp;
  if (clock_gettime(CLOCK_REALTIME, &tp) != 0) {
    return -1;
  } else {
    return (tp.tv_sec * 1000000000ull) + tp.tv_nsec;
  }
}


x86 assembly (clang, -O0):
<gettime>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    0x2ec1(%rip),%rax
mov    (%rax),%edi
lea    -0x18(%rbp),%rsi
call   1030 <clock_gettime@plt>
cmp    $0x0,%rax
je     1140 <gettime+0x30>
movl   $0xffffffff,-0x4(%rbp)
jmp    1152 <gettime+0x42>
imul   $0x3b9aca00,-0x18(%rbp),%rax
3b
movslq -0x10(%rbp),%rcx
add    %rcx,%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gettime>:
sub    $0x18,%rsp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0x8(%rsp),%rsi
call   1030 <clock_gettime@plt>
imul   $0x3b9aca00,0x8(%rsp),%ecx
3b
add    0x10(%rsp),%ecx
neg    %rax
sbb    %eax,%eax
or     %ecx,%eax
add    $0x18,%rsp
ret

LLVM IR (-O0):
%struct.timespec = type { i64, i32 }
@CLOCK_REALTIME = global i32 0
define i32 @gettime() {
%1 = alloca i32
%2 = alloca %struct.timespec
%3 = load i32, i32* @CLOCK_REALTIME
%4 = call i64 @clock_gettime(i32 %3, %struct.timespec* %2)
%5 = icmp ne i64 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %0
store i32 -1, i32* %1
br label %16
7: ; preds = %0
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i32 0, i32 0
%9 = load i64, i64* %8
%10 = mul i64 %9, 1000000000
%11 = getelementptr inbounds %struct.timespec, %struct.timespec* %2, i32 0, i32 1
%12 = load i32, i32* %11
%13 = sext i32 %12 to i64
%14 = add i64 %10, %13
%15 = trunc i64 %14 to i32
store i32 %15, i32* %1
br label %16
16: ; preds = %7, %6
%17 = load i32, i32* %1
ret i32 %17
}

LLVM IR (-O2):
%struct.timespec = type { i64, i32 }
@CLOCK_REALTIME = global i32 0
define i32 @gettime() {
%1 = alloca %struct.timespec
%2 = bitcast %struct.timespec* %1 to i8*
%3 = load i32, i32* @CLOCK_REALTIME
%4 = call i64 @clock_gettime(i32 %3, %struct.timespec* %1)
%5 = icmp eq i64 %4, 0
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%7 = load i64, i64* %6
%8 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%9 = load i32, i32* %8
%10 = trunc i64 %7 to i32
%11 = mul i32 %10, 1000000000
%12 = add i32 %11, %9
%13 = select i1 %5, i32 %12, i32 -1
ret i32 %13
}
/* Variables and functions */
char *do_escape(char const *, char *);
scalar_t__ malloc(int);
int strlen(char const *);
char *unit_name_escape(const char *f) {
  char *r, *t;
  if (!(r = ((char *)malloc(sizeof(char) * (strlen(f) * 4 + 1)))))
    return NULL;
  t = do_escape(f, r);
  *t = 0;
  return r;
}


x86 assembly (clang, -O0):
<unit_name_escape>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
shl    $0x2,%eax
add    $0x1,%eax
cltq
shl    $0x0,%rax
mov    %eax,%edi
call   1040 <malloc@plt>
mov    %rax,-0x18(%rbp)
cmp    $0x0,%rax
jne    1173 <unit_name_escape+0x43>
movq   $0x0,-0x8(%rbp)
jmp    1193 <unit_name_escape+0x63>
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
call   1050 <do_escape@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unit_name_escape>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r14
call   1030 <strlen@plt>
lea    0x1(,%rax,4),%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1160 <unit_name_escape+0x30>
mov    %rax,%rbx
mov    %r14,%rdi
mov    %rax,%rsi
call   1050 <do_escape@plt>
movb   $0x0,(%rax)
jmp    1162 <unit_name_escape+0x32>
xor    %ebx,%ebx
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i8* @unit_name_escape(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i8*
store i8* %0, i8** %3
%6 = load i8*, i8** %3
%7 = call i32 @strlen(i8* %6)
%8 = mul nsw i32 %7, 4
%9 = add nsw i32 %8, 1
%10 = sext i32 %9 to i64
%11 = mul i64 1, %10
%12 = trunc i64 %11 to i32
%13 = call i64 @malloc(i32 %12)
%14 = inttoptr i64 %13 to i8*
store i8* %14, i8** %4
%15 = icmp ne i8* %14, null
br i1 %15, label %17, label %16
16: ; preds = %1
store i8* null, i8** %2
br label %23
17: ; preds = %1
%18 = load i8*, i8** %3
%19 = load i8*, i8** %4
%20 = call i8* @do_escape(i8* %18, i8* %19)
store i8* %20, i8** %5
%21 = load i8*, i8** %5
store i8 0, i8* %21
%22 = load i8*, i8** %4
store i8* %22, i8** %2
br label %23
23: ; preds = %17, %16
%24 = load i8*, i8** %2
ret i8* %24
}

LLVM IR (-O2):
define i8* @unit_name_escape(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = shl nsw i32 %2, 2
%4 = or i32 %3, 1
%5 = tail call i64 @malloc(i32 %4)
%6 = inttoptr i64 %5 to i8*
%7 = icmp eq i64 %5, 0
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = tail call i8* @do_escape(i8* %0, i8* %6)
store i8 0, i8* %9
br label %10
10: ; preds = %1, %8
%11 = phi i8* [ %6, %8 ], [ null, %1 ]
ret i8* %11
}
int fs450_set_tv_defaults(int format) { return 0; }


x86 assembly (clang, -O0):
<fs450_set_tv_defaults>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fs450_set_tv_defaults>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @fs450_set_tv_defaults(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret i32 0
}

LLVM IR (-O2):
define i32 @fs450_set_tv_defaults(i32 %0) {
ret i32 0
}
/* Type definitions */
typedef int uint32_t;
typedef int ui32Base;

/* Variables and functions */
uint32_t PWMGenIntStatus(uint32_t ui32Base, uint32_t ui32Gen, bool bMasked) {
  ;
  ;
  ui32Gen = ((ui32Base) + (ui32Gen));
  if (bMasked == 1) {
    return ((*((volatile unsigned long *)(ui32Gen + 0x0000000C))));
  } else {
    return ((*((volatile unsigned long *)(ui32Gen + 0x00000008))));
  }
}


x86 assembly (clang, -O0):
<PWMGenIntStatus>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%eax
add    -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
cmpl   $0x1,-0x10(%rbp)
jne    1133 <PWMGenIntStatus+0x33>
mov    -0xc(%rbp),%eax
add    $0xc,%eax
cltq
mov    (%rax),%rax
mov    %eax,-0x4(%rbp)
jmp    1141 <PWMGenIntStatus+0x41>
mov    -0xc(%rbp),%eax
add    $0x8,%eax
cltq
mov    (%rax),%rax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PWMGenIntStatus>:
add    %esi,%edi
xor    %eax,%eax
cmp    $0x1,%edx
sete   %al
lea    0x8(,%rax,4),%eax
movslq %edi,%rcx
mov    (%rcx,%rax,1),%rax
ret

LLVM IR (-O0):
define i32 @PWMGenIntStatus(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = add nsw i32 %8, %9
store i32 %10, i32* %6
%11 = load i32, i32* %7
%12 = icmp eq i32 %11, 1
br i1 %12, label %13, label %20
13: ; preds = %3
%14 = load i32, i32* %6
%15 = add nsw i32 %14, 12
%16 = sext i32 %15 to i64
%17 = inttoptr i64 %16 to i64*
%18 = load volatile i64, i64* %17
%19 = trunc i64 %18 to i32
store i32 %19, i32* %4
br label %27
20: ; preds = %3
%21 = load i32, i32* %6
%22 = add nsw i32 %21, 8
%23 = sext i32 %22 to i64
%24 = inttoptr i64 %23 to i64*
%25 = load volatile i64, i64* %24
%26 = trunc i64 %25 to i32
store i32 %26, i32* %4
br label %27
27: ; preds = %20, %13
%28 = load i32, i32* %4
ret i32 %28
}

LLVM IR (-O2):
define i32 @PWMGenIntStatus(i32 %0, i32 %1, i32 %2) {
%4 = add nsw i32 %1, %0
%5 = icmp eq i32 %2, 1
%6 = select i1 %5, i32 12, i32 8
%7 = add nsw i32 %4, %6
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i64*
%10 = load volatile i64, i64* %9
%11 = trunc i64 %10 to i32
ret i32 %11
}
void readpoints(double x[], double y[]) {}


x86 assembly (clang, -O0):
<readpoints>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<readpoints>:
ret

LLVM IR (-O0):
define void @readpoints(double* %0, double* %1) {
%3 = alloca double*
%4 = alloca double*
store double* %0, double** %3
store double* %1, double** %4
ret void
}

LLVM IR (-O2):
define void @readpoints(double* nocapture %0, double* nocapture %1) {
ret void
}
const char *__attribute__((long_call)) __attribute__((section(".test.c")))
__attribute__((no)) strong_l3(void) {
  return "strong_l3";
}


x86 assembly (clang, -O0):
<strong_l3>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<strong_l3>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [10 x i8] c"strong_l3\00"
define i8* @strong_l3() section ".test.c" {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [10 x i8] c"strong_l3\00"
define i8* @strong_l3() section ".test.c" {
ret i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0)
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void gdbmiPrintHelpSet() {
  printf("set prompt -- Set agc's prompt\n");
  printf("set variable -- assign result to variable or address\n");
}


x86 assembly (clang, -O0):
<gdbmiPrintHelpSet>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
lea    0xef9(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdbmiPrintHelpSet>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xefb(%rip),%rdi
pop    %rax
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [32 x i8] c"set prompt -- Set agc's prompt\0A\00"
@.str.1 = [54 x i8] c"set variable -- assign result to variable or address\0A\00"
define void @gdbmiPrintHelpSet() {
%1 = call i32 @printf(i8* getelementptr inbounds ([32 x i8], [32 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @printf(i8* getelementptr inbounds ([54 x i8], [54 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [31 x i8] c"set prompt -- Set agc's prompt\00"
@str.2 = [53 x i8] c"set variable -- assign result to variable or address\00"
define void @gdbmiPrintHelpSet() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([31 x i8], [31 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([53 x i8], [53 x i8]* @str.2, i64 0, i64 0))
ret void
}
int execute_readdir() { return 0; }


x86 assembly (clang, -O0):
<execute_readdir>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<execute_readdir>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @execute_readdir() {
ret i32 0
}

LLVM IR (-O2):
define i32 @execute_readdir() {
ret i32 0
}
/* Variables and functions */
scalar_t__ isupper(int);
int tolower(int);
int foldcase(int ch, int flags) {
  if ((flags & 0x08) != 0 && isupper(ch))
    return tolower(ch);
  return ch;
}


x86 assembly (clang, -O0):
<foldcase>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0x8,%eax
cmp    $0x0,%eax
je     115f <foldcase+0x3f>
mov    -0x8(%rbp),%edi
call   1040 <isupper@plt>
cmp    $0x0,%rax
je     115f <foldcase+0x3f>
mov    -0x8(%rbp),%edi
call   1030 <tolower@plt>
mov    %eax,-0x4(%rbp)
jmp    1165 <foldcase+0x45>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foldcase>:
push   %rbx
mov    %edi,%ebx
test   $0x8,%sil
je     113d <foldcase+0x1d>
mov    %ebx,%edi
call   1040 <isupper@plt>
test   %rax,%rax
je     113d <foldcase+0x1d>
mov    %ebx,%edi
pop    %rbx
jmp    1030 <tolower@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @foldcase(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%6 = load i32, i32* %5
%7 = and i32 %6, 8
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %16
9: ; preds = %2
%10 = load i32, i32* %4
%11 = call i64 @isupper(i32 %10)
%12 = icmp ne i64 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %9
%14 = load i32, i32* %4
%15 = call i32 @tolower(i32 %14)
store i32 %15, i32* %3
br label %18
16: ; preds = %9, %2
%17 = load i32, i32* %4
store i32 %17, i32* %3
br label %18
18: ; preds = %16, %13
%19 = load i32, i32* %3
ret i32 %19
}

LLVM IR (-O2):
define i32 @foldcase(i32 %0, i32 %1) {
%3 = and i32 %1, 8
%4 = icmp eq i32 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = tail call i64 @isupper(i32 %0)
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call i32 @tolower(i32 %0)
br label %10
10: ; preds = %2, %5, %8
%11 = phi i32 [ %9, %8 ], [ %0, %5 ], [ %0, %2 ]
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ Base64Encode(char *, void *, int);
int /*<<< orphan*/ MD5hash(void *, void const *, size_t);
int /*<<< orphan*/ free(void *);
void *malloc(int);
void MD5base64(char *dest, const void *orig, size_t len) {
  void *tmp = malloc(16);
  MD5hash(tmp, orig, len);
  Base64Encode(dest, tmp, 16);
  free(tmp);
}


x86 assembly (clang, -O0):
<MD5base64>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    $0x10,%edi
call   1060 <malloc@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1050 <MD5hash@plt>
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rsi
mov    $0x10,%edx
call   1030 <Base64Encode@plt>
mov    -0x20(%rbp),%rdi
call   1040 <free@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MD5base64>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%r12
mov    %rdi,%r15
mov    $0x10,%edi
call   1060 <malloc@plt>
mov    %rax,%rbx
mov    %rax,%rdi
mov    %r12,%rsi
mov    %r14,%rdx
call   1050 <MD5hash@plt>
mov    %r15,%rdi
mov    %rbx,%rsi
mov    $0x10,%edx
call   1030 <Base64Encode@plt>
mov    %rbx,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1040 <free@plt>

LLVM IR (-O0):
define void @MD5base64(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
%7 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%8 = call i8* @malloc(i32 16)
store i8* %8, i8** %7
%9 = load i8*, i8** %7
%10 = load i8*, i8** %5
%11 = load i64, i64* %6
%12 = call i32 @MD5hash(i8* %9, i8* %10, i64 %11)
%13 = load i8*, i8** %4
%14 = load i8*, i8** %7
%15 = call i32 @Base64Encode(i8* %13, i8* %14, i32 16)
%16 = load i8*, i8** %7
%17 = call i32 @free(i8* %16)
ret void
}

LLVM IR (-O2):
define void @MD5base64(i8* %0, i8* %1, i64 %2) {
%4 = tail call dereferenceable_or_null(16) i8* @malloc(i32 16)
%5 = tail call i32 @MD5hash(i8* %4, i8* %1, i64 %2)
%6 = tail call i32 @Base64Encode(i8* %0, i8* %4, i32 16)
%7 = tail call i32 @free(i8* %4)
ret void
}
void etm_restore_reg_check(void) {}


x86 assembly (clang, -O0):
<etm_restore_reg_check>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<etm_restore_reg_check>:
ret

LLVM IR (-O0):
define void @etm_restore_reg_check() {
ret void
}

LLVM IR (-O2):
define void @etm_restore_reg_check() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ FreeTextures();
int /*<<< orphan*/ rt_par_finish();
void rt_finalize(void) {
  FreeTextures();
  rt_par_finish();
}


x86 assembly (clang, -O0):
<rt_finalize>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <FreeTextures@plt>
mov    $0x0,%al
call   1030 <rt_par_finish@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rt_finalize>:
push   %rax
xor    %eax,%eax
call   1040 <FreeTextures@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <rt_par_finish@plt>

LLVM IR (-O0):
define void @rt_finalize() {
%1 = call i32 (...) @FreeTextures()
%2 = call i32 (...) @rt_par_finish()
ret void
}

LLVM IR (-O2):
define void @rt_finalize() {
%1 = tail call i32 (...) @FreeTextures()
%2 = tail call i32 (...) @rt_par_finish()
ret void
}
/* Type definitions */
typedef scalar_t__ uint_fast8_t;

/* Variables and functions */
bool SHAREMIND_MAP_KEY_EQUALS_uint_fast8_t(uint_fast8_t const k1,
                                           uint_fast8_t const k2) {
  return k1 == k2;
}


x86 assembly (clang, -O0):
<SHAREMIND_MAP_KEY_EQUALS_uint_fast8_t>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
sete   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<SHAREMIND_MAP_KEY_EQUALS_uint_fast8_t>:
xor    %eax,%eax
cmp    %rsi,%rdi
sete   %al
ret

LLVM IR (-O0):
define i32 @SHAREMIND_MAP_KEY_EQUALS_uint_fast8_t(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
ret i32 %8
}

LLVM IR (-O2):
define i32 @SHAREMIND_MAP_KEY_EQUALS_uint_fast8_t(i64 %0, i64 %1) {
%3 = icmp eq i64 %0, %1
%4 = zext i1 %3 to i32
ret i32 %4
}
void ice_mult32(int x) {
  register long reg __asm("22");
  __asm volatile(" " ::"r"(reg = 0x12345 * x));
}


x86 assembly (clang, -O0):
<ice_mult32>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
imul   $0x12345,-0x4(%rbp),%eax
cltq
mov    %rax,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ice_mult32>:
imul   $0x12345,%edi,%eax
cltq
ret

LLVM IR (-O0):
define void @ice_mult32(i32 %0) {
%2 = alloca i32
%3 = alloca i64
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = mul nsw i32 74565, %4
%6 = sext i32 %5 to i64
store i64 %6, i64* %3
ret void
}

LLVM IR (-O2):
define void @ice_mult32(i32 %0) {
%2 = mul nsw i32 %0, 74565
%3 = sext i32 %2 to i64
tail call void asm sideeffect " ", "r,~{dirflag},~{fpsr},~{flags}"(i64 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print_string(char *);
void print_separator(void) {
  print_string("==================================================="
               "====================\n");
}


x86 assembly (clang, -O0):
<print_separator>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <print_string@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_separator>:
lea    0xee9(%rip),%rdi
jmp    1030 <print_string@plt>

LLVM IR (-O0):
@.str = [73 x i8] c"=======================================================================\0A\00"
define void @print_separator() {
%1 = call i32 @print_string(i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [73 x i8] c"=======================================================================\0A\00"
define void @print_separator() {
%1 = tail call i32 @print_string(i8* getelementptr inbounds ([73 x i8], [73 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
uint16_t HA_CAN_Node_field_address(uint8_t channel_id, uint8_t field) {
  return ((uint16_t)(channel_id + 0x80) << 8) | field;
}


x86 assembly (clang, -O0):
<HA_CAN_Node_field_address>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
add    $0x80,%eax
shl    $0x8,%eax
or     -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<HA_CAN_Node_field_address>:
shl    $0x8,%edi
lea    0x8000(%rdi),%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @HA_CAN_Node_field_address(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = add nsw i32 %5, 128
%7 = shl i32 %6, 8
%8 = load i32, i32* %4
%9 = or i32 %7, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @HA_CAN_Node_field_address(i32 %0, i32 %1) {
%3 = shl i32 %0, 8
%4 = add i32 %3, 32768
%5 = or i32 %4, %1
ret i32 %5
}
void rop3_134_1_0(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  unsigned char stk3;
  unsigned char stk4;
  stk4 = *D | S;
  stk3 = T & stk4;
  stk2 = S ^ stk3;
  stk1 = *D ^ stk2;
  *D = (stk1 & (~S)) | (*D & S);
}


x86 assembly (clang, -O0):
<rop3_134_1_0>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xe(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xe(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xd(%rbp)
movzbl -0x9(%rbp),%eax
movzbl -0xd(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0xc(%rbp),%ecx
xor    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl (%rcx),%ecx
movzbl -0x9(%rbp),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_134_1_0>:
mov    (%rdi),%al
mov    %eax,%ecx
or     %sil,%cl
and    %dl,%cl
mov    %eax,%edx
xor    %sil,%dl
xor    %cl,%dl
xor    %dl,%al
and    %sil,%al
xor    %dl,%al
mov    %al,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_134_1_0(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
%9 = alloca i8
%10 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%11 = load i8*, i8** %4
%12 = load i8, i8* %11
%13 = zext i8 %12 to i32
%14 = load i8, i8* %5
%15 = zext i8 %14 to i32
%16 = or i32 %13, %15
%17 = trunc i32 %16 to i8
store i8 %17, i8* %10
%18 = load i8, i8* %6
%19 = zext i8 %18 to i32
%20 = load i8, i8* %10
%21 = zext i8 %20 to i32
%22 = and i32 %19, %21
%23 = trunc i32 %22 to i8
store i8 %23, i8* %9
%24 = load i8, i8* %5
%25 = zext i8 %24 to i32
%26 = load i8, i8* %9
%27 = zext i8 %26 to i32
%28 = xor i32 %25, %27
%29 = trunc i32 %28 to i8
store i8 %29, i8* %8
%30 = load i8*, i8** %4
%31 = load i8, i8* %30
%32 = zext i8 %31 to i32
%33 = load i8, i8* %8
%34 = zext i8 %33 to i32
%35 = xor i32 %32, %34
%36 = trunc i32 %35 to i8
store i8 %36, i8* %7
%37 = load i8, i8* %7
%38 = zext i8 %37 to i32
%39 = load i8, i8* %5
%40 = zext i8 %39 to i32
%41 = xor i32 %40, -1
%42 = and i32 %38, %41
%43 = load i8*, i8** %4
%44 = load i8, i8* %43
%45 = zext i8 %44 to i32
%46 = load i8, i8* %5
%47 = zext i8 %46 to i32
%48 = and i32 %45, %47
%49 = or i32 %42, %48
%50 = trunc i32 %49 to i8
%51 = load i8*, i8** %4
store i8 %50, i8* %51
ret void
}

LLVM IR (-O2):
define void @rop3_134_1_0(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = or i8 %4, %1
%6 = and i8 %5, %2
%7 = xor i8 %4, %1
%8 = xor i8 %7, %6
%9 = xor i8 %1, -1
%10 = and i8 %8, %9
%11 = and i8 %4, %1
%12 = or i8 %10, %11
store i8 %12, i8* %0
ret void
}
/* Variables and functions */
int /*<<< orphan*/ seqquick(int *, int *);
void basicsort(long n, int data[n]) { seqquick(data, data + n - 1UL); }


x86 assembly (clang, -O0):
<basicsort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%rax
shl    $0x2,%rax
add    %rax,%rsi
add    $0xfffffffffffffffc,%rsi
call   1030 <seqquick@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<basicsort>:
mov    %rsi,%rax
lea    (%rsi,%rdi,4),%rsi
add    $0xfffffffffffffffc,%rsi
mov    %rax,%rdi
jmp    1030 <seqquick@plt>

LLVM IR (-O0):
define void @basicsort(i64 %0, i32* %1) {
%3 = alloca i64
%4 = alloca i32*
store i64 %0, i64* %3
store i32* %1, i32** %4
%5 = load i64, i64* %3
%6 = load i32*, i32** %4
%7 = load i32*, i32** %4
%8 = load i64, i64* %3
%9 = getelementptr inbounds i32, i32* %7, i64 %8
%10 = getelementptr inbounds i32, i32* %9, i64 -1
%11 = call i32 @seqquick(i32* %6, i32* %10)
ret void
}

LLVM IR (-O2):
define void @basicsort(i64 %0, i32* %1) {
%3 = getelementptr inbounds i32, i32* %1, i64 %0
%4 = getelementptr inbounds i32, i32* %3, i64 -1
%5 = tail call i32 @seqquick(i32* %1, i32* %4)
ret void
}