xunge/DecIR huggingface dataset:
void SysCtlFlagStatusClear(unsigned long ulFlag) {
  (*((volatile unsigned long *)(0x40007000))) |=
      (ulFlag & (0x00000004 | 0x00000008)) << 2;
}


x86 assembly (clang, -O0):
<SysCtlFlagStatusClear>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
and    $0xc,%rax
shl    $0x2,%rax
mov    $0x40007000,%ecx
mov    (%rcx),%rcx
or     %rax,%rcx
mov    $0x40007000,%eax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SysCtlFlagStatusClear>:
shl    $0x2,%edi
and    $0x30,%edi
or     %rdi,0x40007000
40
ret

LLVM IR (-O0):
define void @SysCtlFlagStatusClear(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 12
%5 = shl i64 %4, 2
%6 = load volatile i64, i64* inttoptr (i64 1073770496 to i64*)
%7 = or i64 %6, %5
store volatile i64 %7, i64* inttoptr (i64 1073770496 to i64*)
ret void
}

LLVM IR (-O2):
define void @SysCtlFlagStatusClear(i64 %0) {
%2 = shl i64 %0, 2
%3 = and i64 %2, 48
%4 = load volatile i64, i64* inttoptr (i64 1073770496 to i64*)
%5 = or i64 %4, %3
store volatile i64 %5, i64* inttoptr (i64 1073770496 to i64*)
ret void
}
unsigned short get16bit(unsigned char *buf) { return (buf[0] << 8) | (buf[1]); }


x86 assembly (clang, -O0):
<get16bit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
or     %ecx,%eax
movzwl %ax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get16bit>:
movzwl (%rdi),%eax
rol    $0x8,%ax
ret

LLVM IR (-O0):
define zeroext i16 @get16bit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 8
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = or i32 %7, %11
%13 = trunc i32 %12 to i16
ret i16 %13
}

LLVM IR (-O2):
define zeroext i16 @get16bit(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i16
%4 = shl nuw i16 %3, 8
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i16
%8 = or i16 %4, %7
ret i16 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("testing...\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"testing...\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [11 x i8] c"testing...\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([11 x i8], [11 x i8]* @str, i64 0, i64 0))
ret i32 0
}
void gtk_text_iter_get_line() {}


x86 assembly (clang, -O0):
<gtk_text_iter_get_line>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_text_iter_get_line>:
ret

LLVM IR (-O0):
define void @gtk_text_iter_get_line() {
ret void
}

LLVM IR (-O2):
define void @gtk_text_iter_get_line() {
ret void
}
/* Type definitions */
struct b_tonegen {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ setMIDIDrawBar(struct b_tonegen *, int, unsigned char);
void setDrawbar16(void *d, unsigned char v) {
  setMIDIDrawBar((struct b_tonegen *)d, 16, v);
}


x86 assembly (clang, -O0):
<setDrawbar16>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x10,%esi
movzbl -0x9(%rbp),%edx
call   1030 <setMIDIDrawBar@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setDrawbar16>:
mov    %esi,%edx
mov    $0x10,%esi
jmp    1030 <setMIDIDrawBar@plt>

LLVM IR (-O0):
%struct.b_tonegen = type { i32 }
define void @setDrawbar16(i8* %0, i8 zeroext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to %struct.b_tonegen*
%7 = load i8, i8* %4
%8 = call i32 @setMIDIDrawBar(%struct.b_tonegen* %6, i32 16, i8 zeroext %7)
ret void
}

LLVM IR (-O2):
%struct.b_tonegen = type { i32 }
define void @setDrawbar16(i8* %0, i8 zeroext %1) {
%3 = bitcast i8* %0 to %struct.b_tonegen*
%4 = tail call i32 @setMIDIDrawBar(%struct.b_tonegen* %3, i32 16, i8 zeroext %1)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
main() {
  char *s = "\12345";
  if (*s != 'S' || s[1] != '4' || s[2] != '5' || s[3])
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x53,%eax
jne    116d <main+0x5d>
mov    -0x10(%rbp),%rax
movsbl 0x1(%rax),%eax
cmp    $0x34,%eax
jne    116d <main+0x5d>
mov    -0x10(%rbp),%rax
movsbl 0x2(%rax),%eax
cmp    $0x35,%eax
jne    116d <main+0x5d>
mov    -0x10(%rbp),%rax
movsbl 0x3(%rax),%eax
cmp    $0x0,%eax
je     1174 <main+0x64>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"S45\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8*
store i32 0, i32* %1
store i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp ne i32 %5, 83
br i1 %6, label %25, label %7
7: ; preds = %0
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
%12 = icmp ne i32 %11, 52
br i1 %12, label %25, label %13
13: ; preds = %7
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i64 2
%16 = load i8, i8* %15
%17 = sext i8 %16 to i32
%18 = icmp ne i32 %17, 53
br i1 %18, label %25, label %19
19: ; preds = %13
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 3
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = icmp ne i32 %23, 0
br i1 %24, label %25, label %27
25: ; preds = %19, %13, %7, %0
%26 = call i32 (...) @abort()
unreachable
27: ; preds = %19
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
ret i32 0
}
void test(int a, int b, float c) {}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
ret

LLVM IR (-O0):
define void @test(i32 %0, i32 %1, float %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca float
store i32 %0, i32* %4
store i32 %1, i32* %5
store float %2, float* %6
ret void
}

LLVM IR (-O2):
define void @test(i32 %0, i32 %1, float %2) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ doubles_mat44_inv(double const *, double *);
int /*<<< orphan*/ doubles_mat44_rotate_vector(double *, double const *,
                                               double *);
void doubles_mat44_inv_rotate_vector(const double M[16], const double in[3],
                                     double out[3]) {
  double T[16];
  doubles_mat44_inv(M, T);
  doubles_mat44_rotate_vector(T, in, out);
}


x86 assembly (clang, -O0):
<doubles_mat44_inv_rotate_vector>:
push   %rbp
mov    %rsp,%rbp
sub    $0xa0,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xa0(%rbp),%rsi
call   1040 <doubles_mat44_inv@plt>
lea    -0xa0(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <doubles_mat44_rotate_vector@plt>
add    $0xa0,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<doubles_mat44_inv_rotate_vector>:
push   %r15
push   %r14
push   %rbx
sub    $0x80,%rsp
mov    %rdx,%r14
mov    %rsi,%rbx
mov    %rsp,%r15
mov    %r15,%rsi
call   1040 <doubles_mat44_inv@plt>
mov    %r15,%rdi
mov    %rbx,%rsi
mov    %r14,%rdx
call   1030 <doubles_mat44_rotate_vector@plt>
add    $0x80,%rsp
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @doubles_mat44_inv_rotate_vector(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
%7 = alloca [16 x double]
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
%8 = load double*, double** %4
%9 = getelementptr inbounds [16 x double], [16 x double]* %7, i64 0, i64 0
%10 = call i32 @doubles_mat44_inv(double* %8, double* %9)
%11 = getelementptr inbounds [16 x double], [16 x double]* %7, i64 0, i64 0
%12 = load double*, double** %5
%13 = load double*, double** %6
%14 = call i32 @doubles_mat44_rotate_vector(double* %11, double* %12, double* %13)
ret void
}

LLVM IR (-O2):
define void @doubles_mat44_inv_rotate_vector(double* %0, double* %1, double* %2) {
%4 = alloca [16 x double]
%5 = bitcast [16 x double]* %4 to i8*
%6 = getelementptr inbounds [16 x double], [16 x double]* %4, i64 0, i64 0
%7 = call i32 @doubles_mat44_inv(double* %0, double* %6)
%8 = call i32 @doubles_mat44_rotate_vector(double* %6, double* %1, double* %2)
ret void
}
/* Variables and functions */
void *malloc(size_t);
void *my_malloc(size_t size) { return malloc(size); }


x86 assembly (clang, -O0):
<my_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @my_malloc(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i8* @malloc(i64 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @my_malloc(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
ret i8* %2
}
/* Variables and functions */
scalar_t__ store(char, int);
size_t length(char *str, int mode) {
  size_t out = 0;
  char c;
  while ((c = *str++))
    if (store(c, mode))
      out++;
  return out;
}


x86 assembly (clang, -O0):
<length>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
mov    (%rax),%al
mov    %al,-0x19(%rbp)
cmp    $0x0,%al
je     116c <length+0x5c>
mov    -0x19(%rbp),%al
mov    -0xc(%rbp),%esi
movsbl %al,%edi
call   1030 <store@plt>
cmp    $0x0,%rax
je     1167 <length+0x57>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1127 <length+0x17>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<length>:
push   %rbp
push   %r14
push   %rbx
mov    (%rdi),%al
test   %al,%al
je     1150 <length+0x40>
mov    %esi,%r14d
mov    %rdi,%rbx
add    $0x1,%rbx
xor    %ebp,%ebp
cs nopw 0x0(%rax,%rax,1)
movsbl %al,%edi
mov    %r14d,%esi
call   1030 <store@plt>
cmp    $0x1,%rax
sbb    $0xffffffffffffffff,%rbp
movzbl (%rbx),%eax
add    $0x1,%rbx
test   %al,%al
jne    1130 <length+0x20>
jmp    1152 <length+0x42>
xor    %ebp,%ebp
mov    %rbp,%rax
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i64 @length(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i64
%6 = alloca i8
store i8* %0, i8** %3
store i32 %1, i32* %4
store i64 0, i64* %5
br label %7
7: ; preds = %20, %2
%8 = load i8*, i8** %3
%9 = getelementptr inbounds i8, i8* %8, i32 1
store i8* %9, i8** %3
%10 = load i8, i8* %8
store i8 %10, i8* %6
%11 = icmp ne i8 %10, 0
br i1 %11, label %12, label %21
12: ; preds = %7
%13 = load i8, i8* %6
%14 = load i32, i32* %4
%15 = call i64 @store(i8 signext %13, i32 %14)
%16 = icmp ne i64 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %12
%18 = load i64, i64* %5
%19 = add i64 %18, 1
store i64 %19, i64* %5
br label %20
20: ; preds = %17, %12
br label %7
21: ; preds = %7
%22 = load i64, i64* %5
ret i64 %22
}

LLVM IR (-O2):
define i64 @length(i8* nocapture %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %16, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %14, %5 ], [ %3, %2 ]
%7 = phi i8* [ %9, %5 ], [ %0, %2 ]
%8 = phi i64 [ %13, %5 ], [ 0, %2 ]
%9 = getelementptr inbounds i8, i8* %7, i64 1
%10 = tail call i64 @store(i8 signext %6, i32 %1)
%11 = icmp ne i64 %10, 0
%12 = zext i1 %11 to i64
%13 = add i64 %8, %12
%14 = load i8, i8* %9
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %5
16: ; preds = %5, %2
%17 = phi i64 [ 0, %2 ], [ %13, %5 ]
ret i64 %17
}
/* Variables and functions */
int /*<<< orphan*/ forkprocess(char *);
int get_pidof(char *);
int /*<<< orphan*/ sleep(int);
int main(void) {
  for (;;) {
    if (get_pidof("test-spawn") < 2)
      forkprocess("test-spawn");
    sleep(1);
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
call   1040 <get_pidof@plt>
cmp    $0x2,%eax
jge    1160 <main+0x30>
lea    0xea5(%rip),%rdi
call   1030 <forkprocess@plt>
mov    $0x1,%edi
call   1050 <sleep@plt>
jmp    113f <main+0xf>

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xec8(%rip),%rbx
jmp    114a <main+0x1a>
nopw   0x0(%rax,%rax,1)
mov    $0x1,%edi
call   1050 <sleep@plt>
mov    %rbx,%rdi
call   1040 <get_pidof@plt>
cmp    $0x1,%eax
jg     1140 <main+0x10>
mov    %rbx,%rdi
call   1030 <forkprocess@plt>
jmp    1140 <main+0x10>

LLVM IR (-O0):
@.str = [11 x i8] c"test-spawn\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %7, %0
%3 = call i32 @get_pidof(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%4 = icmp slt i32 %3, 2
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = call i32 @forkprocess(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
%8 = call i32 @sleep(i32 1)
br label %2
}

LLVM IR (-O2):
@.str = [11 x i8] c"test-spawn\00"
define i32 @main() {
br label %1
1: ; preds = %6, %0
%2 = tail call i32 @get_pidof(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
%3 = icmp slt i32 %2, 2
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @forkprocess(i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0))
br label %6
6: ; preds = %4, %1
%7 = tail call i32 @sleep(i32 1)
br label %1
}
/* Variables and functions */
scalar_t__ is_keyword(char *, char *);
scalar_t__ matches(char *, char *);
int is_begin(char *line, char *type) {
  return is_keyword(line, "begin") && matches(line + 1 + 6, type);
}


x86 assembly (clang, -O0):
<is_begin>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
lea    0xec5(%rip),%rsi
call   1030 <is_keyword@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    $0x0,%rcx
mov    %al,-0x11(%rbp)
je     1171 <is_begin+0x51>
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
add    $0x6,%rdi
mov    -0x10(%rbp),%rsi
call   1040 <matches@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x11(%rbp)
mov    -0x11(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_begin>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%r14
mov    %rdi,%rbx
lea    0xecf(%rip),%rsi
call   1030 <is_keyword@plt>
test   %rax,%rax
je     1157 <is_begin+0x37>
add    $0x7,%rbx
mov    %rbx,%rdi
mov    %r14,%rsi
call   1040 <matches@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
jmp    1159 <is_begin+0x39>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [6 x i8] c"begin\00"
define i32 @is_begin(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = call i64 @is_keyword(i8* %5, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%7 = icmp ne i64 %6, 0
br i1 %7, label %8, label %15
8: ; preds = %2
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = getelementptr inbounds i8, i8* %10, i64 6
%12 = load i8*, i8** %4
%13 = call i64 @matches(i8* %11, i8* %12)
%14 = icmp ne i64 %13, 0
br label %15
15: ; preds = %8, %2
%16 = phi i1 [ false, %2 ], [ %14, %8 ]
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
@.str = [6 x i8] c"begin\00"
define i32 @is_begin(i8* %0, i8* %1) {
%3 = tail call i64 @is_keyword(i8* %0, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
%4 = icmp eq i64 %3, 0
br i1 %4, label %10, label %5
5: ; preds = %2
%6 = getelementptr inbounds i8, i8* %0, i64 7
%7 = tail call i64 @matches(i8* %6, i8* %1)
%8 = icmp ne i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %5, %2
%11 = phi i32 [ 0, %2 ], [ %9, %5 ]
ret i32 %11
}
int test_imm_B4uint64_lowword_reg(unsigned long long val) {
  return ((val) & (0xB4 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_B4uint64_lowword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
and    $0xb4,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_B4uint64_lowword_reg>:
test   $0xb4,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_B4uint64_lowword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = and i64 %3, 180
%5 = icmp ne i64 %4, 0
%6 = zext i1 %5 to i64
%7 = select i1 %5, i32 -20, i32 -40
ret i32 %7
}

LLVM IR (-O2):
define i32 @test_imm_B4uint64_lowword_reg(i64 %0) {
%2 = and i64 %0, 180
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void fcn_00ba4(short addr1, short addr2, short addr3) {}


x86 assembly (clang, -O0):
push   %rbp
mov    %rsp,%rbp
mov    %dx,%ax
mov    %si,%cx
mov    %di,%dx
mov    %dx,-0x2(%rbp)
mov    %cx,-0x4(%rbp)
mov    %ax,-0x6(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
ret

LLVM IR (-O0):
define void @fcn_00ba4(i16 signext %0, i16 signext %1, i16 signext %2) {
%4 = alloca i16
%5 = alloca i16
%6 = alloca i16
store i16 %0, i16* %4
store i16 %1, i16* %5
store i16 %2, i16* %6
ret void
}

LLVM IR (-O2):
define void @fcn_00ba4(i16 signext %0, i16 signext %1, i16 signext %2) {
ret void
}
/* Variables and functions */
size_t strlen(char const *);
size_t jw_strlen(const char *a) {
  if (a == NULL) {
    return 0;
  }
  return strlen(a);
}


x86 assembly (clang, -O0):
<jw_strlen>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1134 <jw_strlen+0x24>
movq   $0x0,-0x8(%rbp)
jmp    1141 <jw_strlen+0x31>
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<jw_strlen>:
test   %rdi,%rdi
je     111a <jw_strlen+0xa>
jmp    1030 <strlen@plt>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @jw_strlen(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = icmp eq i8* %4, null
br i1 %5, label %6, label %7
6: ; preds = %1
store i64 0, i64* %2
br label %10
7: ; preds = %1
%8 = load i8*, i8** %3
%9 = call i64 @strlen(i8* %8)
store i64 %9, i64* %2
br label %10
10: ; preds = %7, %6
%11 = load i64, i64* %2
ret i64 %11
}

LLVM IR (-O2):
define i64 @jw_strlen(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i64 @strlen(i8* %0)
br label %5
5: ; preds = %1, %3
%6 = phi i64 [ %4, %3 ], [ 0, %1 ]
ret i64 %6
}
/* Type definitions */
typedef int /*<<< orphan*/ uid_t;
typedef scalar_t__ gid_t;

/* Variables and functions */
int uid_is_valid(int /*<<< orphan*/);
bool gid_is_valid(gid_t gid) { return uid_is_valid((uid_t)gid); }


x86 assembly (clang, -O0):
<gid_is_valid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %eax,%edi
call   1030 <uid_is_valid@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gid_is_valid>:
jmp    1030 <uid_is_valid@plt>

LLVM IR (-O0):
define i32 @gid_is_valid(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
%5 = call i32 @uid_is_valid(i32 %4)
ret i32 %5
}

LLVM IR (-O2):
define i32 @gid_is_valid(i64 %0) {
%2 = trunc i64 %0 to i32
%3 = tail call i32 @uid_is_valid(i32 %2)
ret i32 %3
}
/* Variables and functions */
int bcmp(void *, void *, size_t);
int compareBinaryKeys(size_t sk1, void *k1, size_t sk2, void *k2) {
  if (sk1 != sk2)
    return 1;
  return bcmp(k1, k2, sk1);
}


x86 assembly (clang, -O0):
<compareBinaryKeys>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
je     1142 <compareBinaryKeys+0x32>
movl   $0x1,-0x4(%rbp)
jmp    1156 <compareBinaryKeys+0x46>
mov    -0x18(%rbp),%rdi
mov    -0x28(%rbp),%rsi
mov    -0x10(%rbp),%rdx
call   1030 <bcmp@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compareBinaryKeys>:
cmp    %rdx,%rdi
jne    1126 <compareBinaryKeys+0x16>
mov    %rdi,%rax
mov    %rsi,%rdi
mov    %rcx,%rsi
mov    %rax,%rdx
jmp    1030 <bcmp@plt>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @compareBinaryKeys(i64 %0, i8* %1, i64 %2, i8* %3) {
%5 = alloca i32
%6 = alloca i64
%7 = alloca i8*
%8 = alloca i64
%9 = alloca i8*
store i64 %0, i64* %6
store i8* %1, i8** %7
store i64 %2, i64* %8
store i8* %3, i8** %9
%10 = load i64, i64* %6
%11 = load i64, i64* %8
%12 = icmp ne i64 %10, %11
br i1 %12, label %13, label %14
13: ; preds = %4
store i32 1, i32* %5
br label %19
14: ; preds = %4
%15 = load i8*, i8** %7
%16 = load i8*, i8** %9
%17 = load i64, i64* %6
%18 = call i32 @bcmp(i8* %15, i8* %16, i64 %17)
store i32 %18, i32* %5
br label %19
19: ; preds = %14, %13
%20 = load i32, i32* %5
ret i32 %20
}

LLVM IR (-O2):
define i32 @compareBinaryKeys(i64 %0, i8* nocapture %1, i64 %2, i8* nocapture %3) {
%5 = icmp eq i64 %0, %2
br i1 %5, label %6, label %8
6: ; preds = %4
%7 = tail call i32 @bcmp(i8* %1, i8* %3, i64 %0)
br label %8
8: ; preds = %4, %6
%9 = phi i32 [ %7, %6 ], [ 1, %4 ]
ret i32 %9
}
unsigned char I2CPECGet(unsigned long ulBase) {
  ;
  return (((*((volatile unsigned long *)(ulBase + 0x00000018))) & 0x0000FF00) >>
          8);
}


x86 assembly (clang, -O0):
<I2CPECGet>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x18(%rax),%rax
and    $0xff00,%rax
shr    $0x8,%rax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<I2CPECGet>:
mov    0x18(%rdi),%rax
shr    $0x8,%rax
ret

LLVM IR (-O0):
define zeroext i8 @I2CPECGet(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add i64 %3, 24
%5 = inttoptr i64 %4 to i64*
%6 = load volatile i64, i64* %5
%7 = and i64 %6, 65280
%8 = lshr i64 %7, 8
%9 = trunc i64 %8 to i8
ret i8 %9
}

LLVM IR (-O2):
define zeroext i8 @I2CPECGet(i64 %0) {
%2 = add i64 %0, 24
%3 = inttoptr i64 %2 to i64*
%4 = load volatile i64, i64* %3
%5 = lshr i64 %4, 8
%6 = trunc i64 %5 to i8
ret i8 %6
}
/* Variables and functions */
double __ocml_log_f64(double);
double log(double x) { return __ocml_log_f64(x); }


x86 assembly (clang, -O0):
<log>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <__ocml_log_f64@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log>:
jmp    1030 <__ocml_log_f64@plt>

LLVM IR (-O0):
define double @log(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @__ocml_log_f64(double %3)
ret double %4
}

LLVM IR (-O2):
define double @log(double %0) {
%2 = tail call double @__ocml_log_f64(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ gui_chat_printf_date_tags(int /*<<< orphan*/ *,
                                             int /*<<< orphan*/,
                                             int /*<<< orphan*/ *, char *);
void gui_main_debug_libs() {
  gui_chat_printf_date_tags(NULL, 0, NULL, "    ncurses: (?)");
}


x86 assembly (clang, -O0):
<gui_main_debug_libs>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%edx
xor    %esi,%esi
lea    0xedf(%rip),%rcx
mov    %rdx,%rdi
call   1030 <gui_chat_printf_date_tags@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<gui_main_debug_libs>:
lea    0xee9(%rip),%rcx
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
jmp    1030 <gui_chat_printf_date_tags@plt>

LLVM IR (-O0):
@.str = [17 x i8] c" ncurses: (?)\00"
define void @gui_main_debug_libs() {
%1 = call i32 @gui_chat_printf_date_tags(i32* null, i32 0, i32* null, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c" ncurses: (?)\00"
define void @gui_main_debug_libs() {
%1 = tail call i32 @gui_chat_printf_date_tags(i32* null, i32 0, i32* null, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret void
}
int test_imm_C5int16_mem(short *val) {
  return ((*val) & (0xC5 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_C5int16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movswl (%rax),%edx
and    $0xc5,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_C5int16_mem>:
testb  $0xc5,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_C5int16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = sext i16 %4 to i32
%6 = and i32 %5, 197
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_C5int16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 197
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ a();
int /*<<< orphan*/ printf(char *);
void b(void) {
  a();
  printf("b");
  printf("c");
  printf("d");
}


x86 assembly (clang, -O0):
<b>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <a@plt>
lea    0xece(%rip),%rdi
call   1030 <printf@plt>
lea    0xec4(%rip),%rdi
call   1030 <printf@plt>
lea    0xeba(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<b>:
push   %rax
xor    %eax,%eax
call   1040 <a@plt>
mov    $0x62,%edi
call   1030 <putchar@plt>
mov    $0x63,%edi
call   1030 <putchar@plt>
mov    $0x64,%edi
pop    %rax
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"b\00"
@.str.1 = [2 x i8] c"c\00"
@.str.2 = [2 x i8] c"d\00"
define void @b() {
%1 = call i32 (...) @a()
%2 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%4 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.2, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
define void @b() {
%1 = tail call i32 (...) @a()
%2 = tail call i32 @putchar(i32 98)
%3 = tail call i32 @putchar(i32 99)
%4 = tail call i32 @putchar(i32 100)
ret void
}
int do_949() { return 949; }


x86 assembly (clang, -O0):
<do_949>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3b5,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<do_949>:
mov    $0x3b5,%eax
ret

LLVM IR (-O0):
define i32 @do_949() {
ret i32 949
}

LLVM IR (-O2):
define i32 @do_949() {
ret i32 949
}
int map(int val) { return 2 * val; }


x86 assembly (clang, -O0):
<map>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shl    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<map>:
lea    (%rdi,%rdi,1),%eax
ret

LLVM IR (-O0):
define i32 @map(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = mul nsw i32 2, %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @map(i32 %0) {
%2 = shl nsw i32 %0, 1
ret i32 %2
}
void gtk_tree_view_set_hover_expand() {}


x86 assembly (clang, -O0):
<gtk_tree_view_set_hover_expand>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_view_set_hover_expand>:
ret

LLVM IR (-O0):
define void @gtk_tree_view_set_hover_expand() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_view_set_hover_expand() {
ret void
}
int read32(unsigned char *buf) {
  return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
}


x86 assembly (clang, -O0):
<read32>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
shl    $0x18,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read32>:
mov    (%rdi),%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @read32(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 24
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 16
%13 = or i32 %7, %12
%14 = load i8*, i8** %2
%15 = getelementptr inbounds i8, i8* %14, i64 2
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = or i32 %13, %18
%20 = load i8*, i8** %2
%21 = getelementptr inbounds i8, i8* %20, i64 3
%22 = load i8, i8* %21
%23 = zext i8 %22 to i32
%24 = or i32 %19, %23
ret i32 %24
}

LLVM IR (-O2):
define i32 @read32(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = shl nuw i32 %3, 24
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = load i8, i8* %5
%7 = zext i8 %6 to i32
%8 = shl nuw nsw i32 %7, 16
%9 = or i32 %8, %4
%10 = getelementptr inbounds i8, i8* %0, i64 2
%11 = load i8, i8* %10
%12 = zext i8 %11 to i32
%13 = shl nuw nsw i32 %12, 8
%14 = or i32 %9, %13
%15 = getelementptr inbounds i8, i8* %0, i64 3
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = or i32 %14, %17
ret i32 %18
}
void TDI_LOW() {
  *(volatile unsigned long *)((void *)0xfffff400 + 0x34) = (1 << (13));
}


x86 assembly (clang, -O0):
<TDI_LOW>:
push   %rbp
mov    %rsp,%rbp
mov    $0xfffff400,%eax
movq   $0x2000,0x34(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<TDI_LOW>:
mov    $0xfffff434,%eax
movq   $0x2000,(%rax)
ret

LLVM IR (-O0):
define void @TDI_LOW() {
store volatile i64 8192, i64* bitcast (i8* getelementptr (i8, i8* inttoptr (i64 4294964224 to i8*), i64 52) to i64*)
ret void
}

LLVM IR (-O2):
define void @TDI_LOW() {
store volatile i64 8192, i64* inttoptr (i64 4294964276 to i64*)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ setupRegisterMemoryMappings();
void podesihardver() { setupRegisterMemoryMappings(); }


x86 assembly (clang, -O0):
<podesihardver>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <setupRegisterMemoryMappings@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<podesihardver>:
xor    %eax,%eax
jmp    1030 <setupRegisterMemoryMappings@plt>

LLVM IR (-O0):
define void @podesihardver() {
%1 = call i32 (...) @setupRegisterMemoryMappings()
ret void
}

LLVM IR (-O2):
define void @podesihardver() {
%1 = tail call i32 (...) @setupRegisterMemoryMappings()
ret void
}
void ff_hevc_put_hevc_epel_hv48_8_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_hv48_8_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_hv48_8_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_hv48_8_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_hv48_8_avx2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ _I8080_RST(int);
void do0xDF() { _I8080_RST(3); }


x86 assembly (clang, -O0):
<do0xDF>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%edi
call   1030 <_I8080_RST@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<do0xDF>:
mov    $0x3,%edi
jmp    1030 <_I8080_RST@plt>

LLVM IR (-O0):
define void @do0xDF() {
%1 = call i32 @_I8080_RST(i32 3)
ret void
}

LLVM IR (-O2):
define void @do0xDF() {
%1 = tail call i32 @_I8080_RST(i32 3)
ret void
}
void ieee802_11_set_beacon(struct hostapd_data *hapd) {}


x86 assembly (clang, -O0):
<ieee802_11_set_beacon>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<ieee802_11_set_beacon>:
ret

LLVM IR (-O0):
%struct.hostapd_data = type opaque
define void @ieee802_11_set_beacon(%struct.hostapd_data* %0) {
%2 = alloca %struct.hostapd_data*
store %struct.hostapd_data* %0, %struct.hostapd_data** %2
ret void
}

LLVM IR (-O2):
%struct.hostapd_data = type opaque
define void @ieee802_11_set_beacon(%struct.hostapd_data* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
void _free_argv(char **new_argv) {
  int i;
  for (i = 0; new_argv[i]; i++)
    free(new_argv[i]);
}


x86 assembly (clang, -O0):
<_free_argv>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1155 <_free_argv+0x45>
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rdi
call   1030 <free@plt>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
jmp    1123 <_free_argv+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_free_argv>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
test   %rdi,%rdi
je     1131 <_free_argv+0x21>
add    $0x8,%rbx
call   1030 <free@plt>
mov    (%rbx),%rdi
add    $0x8,%rbx
test   %rdi,%rdi
jne    1120 <_free_argv+0x10>
pop    %rbx
ret

LLVM IR (-O0):
define void @_free_argv(i8** %0) {
%2 = alloca i8**
%3 = alloca i32
store i8** %0, i8*** %2
store i32 0, i32* %3
br label %4
4: ; preds = %18, %1
%5 = load i8**, i8*** %2
%6 = load i32, i32* %3
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8*, i8** %5, i64 %7
%9 = load i8*, i8** %8
%10 = icmp ne i8* %9, null
br i1 %10, label %11, label %21
11: ; preds = %4
%12 = load i8**, i8*** %2
%13 = load i32, i32* %3
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i8*, i8** %12, i64 %14
%16 = load i8*, i8** %15
%17 = call i32 @free(i8* %16)
br label %18
18: ; preds = %11
%19 = load i32, i32* %3
%20 = add nsw i32 %19, 1
store i32 %20, i32* %3
br label %4
21: ; preds = %4
ret void
}

LLVM IR (-O2):
define void @_free_argv(i8** nocapture %0) {
%2 = load i8*, i8** %0
%3 = icmp eq i8* %2, null
br i1 %3, label %12, label %4
4: ; preds = %1, %4
%5 = phi i64 [ %8, %4 ], [ 0, %1 ]
%6 = phi i8* [ %10, %4 ], [ %2, %1 ]
%7 = tail call i32 @free(i8* %6)
%8 = add nuw nsw i64 %5, 1
%9 = getelementptr inbounds i8*, i8** %0, i64 %8
%10 = load i8*, i8** %9
%11 = icmp eq i8* %10, null
br i1 %11, label %12, label %4
12: ; preds = %4, %1
ret void
}
void optnone2() {}


x86 assembly (clang, -O0):
<optnone2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<optnone2>:
ret

LLVM IR (-O0):
define void @optnone2() {
ret void
}

LLVM IR (-O2):
define void @optnone2() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ cpuset;
typedef int /*<<< orphan*/ cpu_set_t;

/* Variables and functions */
int /*<<< orphan*/ CPU_SET(long, int /*<<< orphan*/ *);
int /*<<< orphan*/ CPU_ZERO(int /*<<< orphan*/ *);
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ pthread_self();
scalar_t__ pthread_setaffinity_np(int /*<<< orphan*/, int,
                                  int /*<<< orphan*/ *);
void set_thread_affinity(long coreid) {
  cpu_set_t cpuset;
  CPU_ZERO(&cpuset);
  CPU_SET(coreid, &cpuset);
  if (pthread_setaffinity_np(pthread_self(), sizeof(cpuset), &cpuset) < 0) {
    perror("pthread_set_affinity_np");
  }
}


x86 assembly (clang, -O0):
<set_thread_affinity>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    -0xc(%rbp),%rdi
call   1040 <CPU_ZERO@plt>
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
call   1070 <CPU_SET@plt>
mov    $0x0,%al
call   1050 <pthread_self@plt>
mov    %eax,%edi
mov    $0x4,%esi
lea    -0xc(%rbp),%rdx
call   1030 <pthread_setaffinity_np@plt>
cmp    $0x0,%rax
jge    119f <set_thread_affinity+0x4f>
lea    0xe66(%rip),%rdi
call   1060 <perror@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_thread_affinity>:
push   %r14
push   %rbx
push   %rax
mov    %rdi,%rbx
lea    0x4(%rsp),%r14
mov    %r14,%rdi
call   1040 <CPU_ZERO@plt>
mov    %rbx,%rdi
mov    %r14,%rsi
call   1070 <CPU_SET@plt>
xor    %eax,%eax
call   1050 <pthread_self@plt>
mov    %eax,%edi
mov    $0x4,%esi
mov    %r14,%rdx
call   1030 <pthread_setaffinity_np@plt>
test   %rax,%rax
js     1192 <set_thread_affinity+0x42>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret
lea    0xe67(%rip),%rdi
call   1060 <perror@plt>
jmp    118a <set_thread_affinity+0x3a>

LLVM IR (-O0):
@.str = [24 x i8] c"pthread_set_affinity_np\00"
define void @set_thread_affinity(i64 %0) {
%2 = alloca i64
%3 = alloca i32
store i64 %0, i64* %2
%4 = call i32 @CPU_ZERO(i32* %3)
%5 = load i64, i64* %2
%6 = call i32 @CPU_SET(i64 %5, i32* %3)
%7 = call i32 (...) @pthread_self()
%8 = call i64 @pthread_setaffinity_np(i32 %7, i32 4, i32* %3)
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %1
%11 = call i32 @perror(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10, %1
ret void
}

LLVM IR (-O2):
@.str = [24 x i8] c"pthread_set_affinity_np\00"
define void @set_thread_affinity(i64 %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @CPU_ZERO(i32* %2)
%5 = call i32 @CPU_SET(i64 %0, i32* %2)
%6 = call i32 (...) @pthread_self()
%7 = call i64 @pthread_setaffinity_np(i32 %6, i32 4, i32* %2)
%8 = icmp slt i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %1
%10 = call i32 @perror(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str, i64 0, i64 0))
br label %11
11: ; preds = %9, %1
ret void
}
unsigned char PLY_TakeHealth(unsigned char ucHealth) { return 0; }


x86 assembly (clang, -O0):
<PLY_TakeHealth>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
xor    %eax,%eax
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PLY_TakeHealth>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define zeroext i8 @PLY_TakeHealth(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
ret i8 0
}

LLVM IR (-O2):
define zeroext i8 @PLY_TakeHealth(i8 zeroext %0) {
ret i8 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void B(int *x, int *y) {
  *x = 10 * (*y);
  *y = *x + 20;
  printf("%p %p\n", x, y);
  printf("%d %d\n", *x, *y);
}


x86 assembly (clang, -O0):
<B>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
imul   $0xa,(%rax),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
add    $0x14,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
lea    0xeb5(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
mov    (%rax),%esi
mov    -0x10(%rbp),%rax
mov    (%rax),%edx
lea    0xea2(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<B>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    (%rsi),%eax
add    %eax,%eax
lea    (%rax,%rax,4),%ecx
mov    %ecx,(%rdi)
lea    (%rax,%rax,4),%eax
add    $0x14,%eax
mov    %eax,(%rsi)
lea    0xece(%rip),%rdi
mov    %r14,%rsi
mov    %rbx,%rdx
xor    %eax,%eax
call   1030 <printf@plt>
mov    (%r14),%esi
mov    (%rbx),%edx
lea    0xebc(%rip),%rdi
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"%p %p\0A\00"
@.str.1 = [7 x i8] c"%d %d\0A\00"
define void @B(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %4
%6 = load i32, i32* %5
%7 = mul nsw i32 10, %6
%8 = load i32*, i32** %3
store i32 %7, i32* %8
%9 = load i32*, i32** %3
%10 = load i32, i32* %9
%11 = add nsw i32 %10, 20
%12 = load i32*, i32** %4
store i32 %11, i32* %12
%13 = load i32*, i32** %3
%14 = load i32*, i32** %4
%15 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32* %13, i32* %14)
%16 = load i32*, i32** %3
%17 = load i32, i32* %16
%18 = load i32*, i32** %4
%19 = load i32, i32* %18
%20 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 %17, i32 %19)
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"%p %p\0A\00"
@.str.1 = [7 x i8] c"%d %d\0A\00"
define void @B(i32* %0, i32* %1) {
%3 = load i32, i32* %1
%4 = mul nsw i32 %3, 10
store i32 %4, i32* %0
%5 = add nsw i32 %4, 20
store i32 %5, i32* %1
%6 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0), i32* %0, i32* %1)
%7 = load i32, i32* %0
%8 = load i32, i32* %1
%9 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0), i32 %7, i32 %8)
ret void
}
/* Forward declarations */
typedef struct TYPE_3__ TYPE_1__;

/* Type definitions */
struct TYPE_3__ {
  int /*<<< orphan*/ *next_out;
  int /*<<< orphan*/ *next_in;
};
typedef TYPE_1__ z_stream;
typedef int /*<<< orphan*/ Bytef;

/* Variables and functions */
void zlibSetBuffers(z_stream *stream, Bytef *in, Bytef *out) {
  stream->next_in = in;
  stream->next_out = out;
}


x86 assembly (clang, -O0):
<zlibSetBuffers>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,0x8(%rax)
mov    -0x18(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<zlibSetBuffers>:
mov    %rsi,0x8(%rdi)
mov    %rdx,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_3__ = type { i32*, i32* }
define void @zlibSetBuffers(%struct.TYPE_3__* %0, i32* %1, i32* %2) {
%4 = alloca %struct.TYPE_3__*
%5 = alloca i32*
%6 = alloca i32*
store %struct.TYPE_3__* %0, %struct.TYPE_3__** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%7 = load i32*, i32** %5
%8 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4
%9 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %8, i32 0, i32 1
store i32* %7, i32** %9
%10 = load i32*, i32** %6
%11 = load %struct.TYPE_3__*, %struct.TYPE_3__** %4
%12 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %11, i32 0, i32 0
store i32* %10, i32** %12
ret void
}

LLVM IR (-O2):
%struct.TYPE_3__ = type { i32*, i32* }
define void @zlibSetBuffers(%struct.TYPE_3__* nocapture writeonly %0, i32* %1, i32* %2) {
%4 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 1
store i32* %1, i32** %4
%5 = getelementptr inbounds %struct.TYPE_3__, %struct.TYPE_3__* %0, i64 0, i32 0
store i32* %2, i32** %5
ret void
}
void EVP_PKEY_type(void) {}


x86 assembly (clang, -O0):
<EVP_PKEY_type>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<EVP_PKEY_type>:
ret

LLVM IR (-O0):
define void @EVP_PKEY_type() {
ret void
}

LLVM IR (-O2):
define void @EVP_PKEY_type() {
ret void
}
void f4() {
  int *p;
  p = (int *)0x10000;
}


x86 assembly (clang, -O0):
<f4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x10000,%eax
mov    %rax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<f4>:
ret

LLVM IR (-O0):
define void @f4() {
%1 = alloca i32*
store i32* inttoptr (i64 65536 to i32*), i32** %1
ret void
}

LLVM IR (-O2):
define void @f4() {
ret void
}
char TestAE() {
  char r;
  __asm__("cmp $0, %1" : "=@ccae"(r) : "r"(1));
  if (r) {
    __asm__("cmp $2, %1" : "=@ccnae"(r) : "r"(1));
    if (r) {
      __asm__("cmp $1, %1" : "=@ccae"(r) : "r"(1));
      if (r)
        return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<TestAE>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%eax
cmp    $0x0,%eax
setae  %al
mov    %al,-0x2(%rbp)
cmpb   $0x0,-0x2(%rbp)
je     115f <TestAE+0x5f>
mov    $0x1,%eax
cmp    $0x2,%eax
setb   %al
mov    %al,-0x2(%rbp)
cmpb   $0x0,-0x2(%rbp)
je     115a <TestAE+0x5a>
mov    $0x1,%eax
cmp    $0x1,%eax
setae  %al
mov    %al,-0x2(%rbp)
cmpb   $0x0,-0x2(%rbp)
je     1155 <TestAE+0x55>
movb   $0x1,-0x1(%rbp)
jmp    1163 <TestAE+0x63>
jmp    115a <TestAE+0x5a>
jmp    115f <TestAE+0x5f>
movb   $0x0,-0x1(%rbp)
movsbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<TestAE>:
mov    $0x1,%eax
cmp    $0x0,%eax
jb     111c <TestAE+0x1c>
cmp    $0x2,%eax
jae    111c <TestAE+0x1c>
mov    $0x1,%eax
cmp    $0x1,%eax
mov    $0x1,%al
jb     111c <TestAE+0x1c>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define signext i8 @TestAE() {
%1 = alloca i8
%2 = alloca i8
%3 = call i8 asm "cmp $$0, $1", "={@ccae},r,~{dirflag},~{fpsr},~{flags}"(i32 1)
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = icmp ne i8 %4, 0
br i1 %5, label %6, label %17
6: ; preds = %0
%7 = call i8 asm "cmp $$2, $1", "={@ccnae},r,~{dirflag},~{fpsr},~{flags}"(i32 1)
store i8 %7, i8* %2
%8 = load i8, i8* %2
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %16
10: ; preds = %6
%11 = call i8 asm "cmp $$1, $1", "={@ccae},r,~{dirflag},~{fpsr},~{flags}"(i32 1)
store i8 %11, i8* %2
%12 = load i8, i8* %2
%13 = icmp ne i8 %12, 0
br i1 %13, label %14, label %15
14: ; preds = %10
store i8 1, i8* %1
br label %18
15: ; preds = %10
br label %16
16: ; preds = %15, %6
br label %17
17: ; preds = %16, %0
store i8 0, i8* %1
br label %18
18: ; preds = %17, %14
%19 = load i8, i8* %1
ret i8 %19
}

LLVM IR (-O2):
define signext i8 @TestAE() {
%1 = tail call i8 asm "cmp $$0, $1", "={@ccae},r,~{dirflag},~{fpsr},~{flags}"(i32 1)
%2 = icmp eq i8 %1, 0
br i1 %2, label %9, label %3
3: ; preds = %0
%4 = tail call i8 asm "cmp $$2, $1", "={@ccnae},r,~{dirflag},~{fpsr},~{flags}"(i32 1)
%5 = icmp eq i8 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %3
%7 = tail call i8 asm "cmp $$1, $1", "={@ccae},r,~{dirflag},~{fpsr},~{flags}"(i32 1)
%8 = icmp eq i8 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %3, %6, %0
br label %10
10: ; preds = %6, %9
%11 = phi i8 [ 0, %9 ], [ 1, %6 ]
ret i8 %11
}
int abs(int x) { return (x > 0) ? x : -x; }


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    111c <abs+0x1c>
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
jmp    1124 <abs+0x24>
xor    %eax,%eax
sub    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = load i32, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %2
%9 = sub nsw i32 0, %8
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %6, %5 ], [ %9, %7 ]
ret i32 %11
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
/* Variables and functions */
long nvmem_read(int, int, int /*<<< orphan*/, unsigned char *);
signed long aes_read_key(unsigned char *key) {
  signed long returnValue;
  returnValue = nvmem_read((12), 16, 0, key);
  return returnValue;
}


x86 assembly (clang, -O0):
<aes_read_key>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0xc,%edi
mov    $0x10,%esi
xor    %edx,%edx
call   1030 <nvmem_read@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aes_read_key>:
mov    %rdi,%rcx
mov    $0xc,%edi
mov    $0x10,%esi
xor    %edx,%edx
jmp    1030 <nvmem_read@plt>

LLVM IR (-O0):
define i64 @aes_read_key(i8* %0) {
%2 = alloca i8*
%3 = alloca i64
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = call i64 @nvmem_read(i32 12, i32 16, i32 0, i8* %4)
store i64 %5, i64* %3
%6 = load i64, i64* %3
ret i64 %6
}

LLVM IR (-O2):
define i64 @aes_read_key(i8* %0) {
%2 = tail call i64 @nvmem_read(i32 12, i32 16, i32 0, i8* %0)
ret i64 %2
}