#define NULL ((void *)0)
typedef unsigned long size_t; // Customize by platform.
typedef long intptr_t;
typedef unsigned long uintptr_t;
typedef long scalar_t__; // Either arithmetic or pointer type.
/* By default, we understand bool (as a convenience). */
typedef int bool;
#define false 0
#define true 1

/* Forward declarations */

/* Type definitions */

/* Variables and functions */
int sio_read_reg(int, unsigned long *);
int sio_write_reg(int, unsigned long);
int FS460_set_sync_invert(int hsync_invert, int vsync_invert,
                          int field_invert) {
  int err;
  unsigned long mux1;
  err = sio_read_reg(0x3C, &mux1);
  if (err)
    return err;
  if (hsync_invert)
    mux1 |= (1 << 14);
  else
    mux1 &= ~(1 << 14);
  if (vsync_invert)
    mux1 |= (1 << 5);
  else
    mux1 &= ~(1 << 5);
  if (field_invert)
    mux1 |= (1 << 15);
  else
    mux1 &= ~(1 << 15);
  err = sio_write_reg(0x3C, mux1);
  if (err)
    return err;
  return 0;
}


x86 assembly (clang, -O0):
<FS460_set_sync_invert>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    $0x3c,%edi
lea    -0x20(%rbp),%rsi
call   1040 <sio_read_reg@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     1157 <FS460_set_sync_invert+0x37>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1201 <FS460_set_sync_invert+0xe1>
cmpl   $0x0,-0x8(%rbp)
je     1174 <FS460_set_sync_invert+0x54>
mov    -0x20(%rbp),%rax
or     $0x4000,%rax
mov    %rax,-0x20(%rbp)
jmp    1182 <FS460_set_sync_invert+0x62>
mov    -0x20(%rbp),%rax
and    $0xffffffffffffbfff,%rax
mov    %rax,-0x20(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     119d <FS460_set_sync_invert+0x7d>
mov    -0x20(%rbp),%rax
or     $0x20,%rax
mov    %rax,-0x20(%rbp)
jmp    11a9 <FS460_set_sync_invert+0x89>
mov    -0x20(%rbp),%rax
and    $0xffffffffffffffdf,%rax
mov    %rax,-0x20(%rbp)
cmpl   $0x0,-0x10(%rbp)
je     11c6 <FS460_set_sync_invert+0xa6>
mov    -0x20(%rbp),%rax
or     $0x8000,%rax
mov    %rax,-0x20(%rbp)
jmp    11d4 <FS460_set_sync_invert+0xb4>
mov    -0x20(%rbp),%rax
and    $0xffffffffffff7fff,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rsi
mov    $0x3c,%edi
call   1030 <sio_write_reg@plt>
mov    %eax,-0x14(%rbp)
cmpl   $0x0,-0x14(%rbp)
je     11fa <FS460_set_sync_invert+0xda>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1201 <FS460_set_sync_invert+0xe1>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<FS460_set_sync_invert>:
push   %rbp
push   %r14
push   %rbx
sub    $0x10,%rsp
mov    %edx,%r14d
mov    %esi,%ebp
mov    %edi,%ebx
lea    0x8(%rsp),%rsi
mov    $0x3c,%edi
call   1040 <sio_read_reg@plt>
test   %eax,%eax
jne    1189 <FS460_set_sync_invert+0x69>
xor    %eax,%eax
test   %ebx,%ebx
setne  %al
mov    $0xffffffffffff3fdf,%rcx
and    0x8(%rsp),%rcx
shl    $0xe,%rax
xor    %esi,%esi
test   %ebp,%ebp
setne  %sil
shl    $0x5,%rsi
xor    %edx,%edx
test   %r14d,%r14d
setne  %dl
shl    $0xf,%rdx
or     %rax,%rsi
or     %rdx,%rsi
or     %rcx,%rsi
mov    %rsi,0x8(%rsp)
mov    $0x3c,%edi
call   1030 <sio_write_reg@plt>
add    $0x10,%rsp
pop    %rbx
pop    %r14
pop    %rbp
ret

LLVM IR (-O0):
define i32 @FS460_set_sync_invert(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i64
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%10 = call i32 @sio_read_reg(i32 60, i64* %9)
store i32 %10, i32* %8
%11 = load i32, i32* %8
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %15
13: ; preds = %3
%14 = load i32, i32* %8
store i32 %14, i32* %4
br label %50
15: ; preds = %3
%16 = load i32, i32* %5
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %21
18: ; preds = %15
%19 = load i64, i64* %9
%20 = or i64 %19, 16384
store i64 %20, i64* %9
br label %24
21: ; preds = %15
%22 = load i64, i64* %9
%23 = and i64 %22, -16385
store i64 %23, i64* %9
br label %24
24: ; preds = %21, %18
%25 = load i32, i32* %6
%26 = icmp ne i32 %25, 0
br i1 %26, label %27, label %30
27: ; preds = %24
%28 = load i64, i64* %9
%29 = or i64 %28, 32
store i64 %29, i64* %9
br label %33
30: ; preds = %24
%31 = load i64, i64* %9
%32 = and i64 %31, -33
store i64 %32, i64* %9
br label %33
33: ; preds = %30, %27
%34 = load i32, i32* %7
%35 = icmp ne i32 %34, 0
br i1 %35, label %36, label %39
36: ; preds = %33
%37 = load i64, i64* %9
%38 = or i64 %37, 32768
store i64 %38, i64* %9
br label %42
39: ; preds = %33
%40 = load i64, i64* %9
%41 = and i64 %40, -32769
store i64 %41, i64* %9
br label %42
42: ; preds = %39, %36
%43 = load i64, i64* %9
%44 = call i32 @sio_write_reg(i32 60, i64 %43)
store i32 %44, i32* %8
%45 = load i32, i32* %8
%46 = icmp ne i32 %45, 0
br i1 %46, label %47, label %49
47: ; preds = %42
%48 = load i32, i32* %8
store i32 %48, i32* %4
br label %50
49: ; preds = %42
store i32 0, i32* %4
br label %50
50: ; preds = %49, %47, %13
%51 = load i32, i32* %4
ret i32 %51
}

LLVM IR (-O2):
define i32 @FS460_set_sync_invert(i32 %0, i32 %1, i32 %2) {
%4 = alloca i64
%5 = bitcast i64* %4 to i8*
%6 = call i32 @sio_read_reg(i32 60, i64* %4)
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %21
8: ; preds = %3
%9 = icmp eq i32 %0, 0
%10 = load i64, i64* %4
%11 = and i64 %10, -49185
%12 = select i1 %9, i64 0, i64 16384
%13 = icmp eq i32 %1, 0
%14 = select i1 %13, i64 0, i64 32
%15 = icmp eq i32 %2, 0
%16 = select i1 %15, i64 0, i64 32768
%17 = or i64 %14, %12
%18 = or i64 %17, %16
%19 = or i64 %18, %11
store i64 %19, i64* %4
%20 = call i32 @sio_write_reg(i32 60, i64 %19)
br label %21
21: ; preds = %8, %3
%22 = phi i32 [ %6, %3 ], [ %20, %8 ]
ret i32 %22
}