xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ _Send1(int /*<<< orphan*/);
void LCD_X_WriteM01(char *pData, int NumBytes) {
  for (; NumBytes; NumBytes--) {
    _Send1(*pData++);
  }
}


x86 assembly (clang, -O0):
<LCD_X_WriteM01>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
cmpl   $0x0,-0xc(%rbp)
je     114e <LCD_X_WriteM01+0x3e>
mov    -0x8(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x8(%rbp)
movsbl (%rax),%edi
call   1030 <_Send1@plt>
mov    -0xc(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0xc(%rbp)
jmp    111f <LCD_X_WriteM01+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LCD_X_WriteM01>:
push   %r15
push   %r14
push   %rbx
test   %esi,%esi
je     1143 <LCD_X_WriteM01+0x33>
mov    %rdi,%r14
mov    %esi,%r15d
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsbl (%r14,%rbx,1),%edi
call   1030 <_Send1@plt>
add    $0x1,%rbx
cmp    %ebx,%r15d
jne    1130 <LCD_X_WriteM01+0x20>
pop    %rbx
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
define void @LCD_X_WriteM01(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
br label %5
5: ; preds = %14, %2
%6 = load i32, i32* %4
%7 = icmp ne i32 %6, 0
br i1 %7, label %8, label %17
8: ; preds = %5
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i32 1
store i8* %10, i8** %3
%11 = load i8, i8* %9
%12 = sext i8 %11 to i32
%13 = call i32 @_Send1(i32 %12)
br label %14
14: ; preds = %8
%15 = load i32, i32* %4
%16 = add nsw i32 %15, -1
store i32 %16, i32* %4
br label %5
17: ; preds = %5
ret void
}

LLVM IR (-O2):
define void @LCD_X_WriteM01(i8* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %13, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ %1, %2 ]
%6 = phi i8* [ %7, %4 ], [ %0, %2 ]
%7 = getelementptr inbounds i8, i8* %6, i64 1
%8 = load i8, i8* %6
%9 = sext i8 %8 to i32
%10 = tail call i32 @_Send1(i32 %9)
%11 = add nsw i32 %5, -1
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %4
13: ; preds = %4, %2
ret void
}
int check_for_mmx(void) { return 0; }


x86 assembly (clang, -O0):
<check_for_mmx>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<check_for_mmx>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @check_for_mmx() {
ret i32 0
}

LLVM IR (-O2):
define i32 @check_for_mmx() {
ret i32 0
}
void kol_paint_bar(unsigned x, unsigned y, unsigned w, unsigned h, unsigned c) {
  asm volatile("int $0x40" ::"a"(13), "b"(x * 65536 + w), "c"(y * 65536 + h),
               "d"(c));
}


x86 assembly (clang, -O0):
<kol_paint_bar>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    %edi,-0xc(%rbp)
mov    %esi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    %r8d,-0x1c(%rbp)
mov    -0xc(%rbp),%ebx
shl    $0x10,%ebx
add    -0x14(%rbp),%ebx
mov    -0x10(%rbp),%ecx
shl    $0x10,%ecx
add    -0x18(%rbp),%ecx
mov    -0x1c(%rbp),%edx
mov    $0xd,%eax
int    $0x40
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_paint_bar>:
push   %rbx
shl    $0x10,%edi
lea    (%rdi,%rdx,1),%ebx
shl    $0x10,%esi
add    %esi,%ecx
mov    $0xd,%eax
mov    %r8d,%edx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define void @kol_paint_bar(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
store i32 %0, i32* %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%11 = load i32, i32* %6
%12 = mul i32 %11, 65536
%13 = load i32, i32* %8
%14 = add i32 %12, %13
%15 = load i32, i32* %7
%16 = mul i32 %15, 65536
%17 = load i32, i32* %9
%18 = add i32 %16, %17
%19 = load i32, i32* %10
ret void
}

LLVM IR (-O2):
define void @kol_paint_bar(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = shl i32 %0, 16
%7 = add i32 %6, %2
%8 = shl i32 %1, 16
%9 = add i32 %8, %3
tail call void asm sideeffect "int $$0x40", "{ax},{bx},{cx},{dx},~{dirflag},~{fpsr},~{flags}"(i32 13, i32 %7, i32 %9, i32 %4)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glmCos3f(float *, float *);
void glmCos3f_(float angle[3]) { glmCos3f(angle, angle); }


x86 assembly (clang, -O0):
<glmCos3f_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x8(%rbp),%rsi
call   1030 <glmCos3f@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glmCos3f_>:
mov    %rdi,%rsi
jmp    1030 <glmCos3f@plt>

LLVM IR (-O0):
define void @glmCos3f_(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = load float*, float** %2
%5 = call i32 @glmCos3f(float* %3, float* %4)
ret void
}

LLVM IR (-O2):
define void @glmCos3f_(float* %0) {
%2 = tail call i32 @glmCos3f(float* %0, float* %0)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int /*<<< orphan*/ *visual;
};
typedef TYPE_1__ XWindowAttributes;
typedef int /*<<< orphan*/ Visual;

/* Variables and functions */
void set_XWindowAttributes_visual(void *_p, void *_v) {
  ((XWindowAttributes *)_p)->visual = (Visual *)_v;
}


x86 assembly (clang, -O0):
<set_XWindowAttributes_visual>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XWindowAttributes_visual>:
mov    %rsi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32* }
define void @set_XWindowAttributes_visual(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = bitcast i8* %5 to i32*
%7 = load i8*, i8** %3
%8 = bitcast i8* %7 to %struct.TYPE_2__*
%9 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %8, i32 0, i32 0
store i32* %6, i32** %9
ret void
}

LLVM IR (-O2):
define void @set_XWindowAttributes_visual(i8* nocapture writeonly %0, i8* %1) {
%3 = bitcast i8* %0 to i8**
store i8* %1, i8** %3
ret void
}
/* Variables and functions */
int _ada_use_c2phc(int, int *, int *, double *);
int syscon_read_standard_system(void) {
  int *a, *b, fail;
  double *c;
  fail = _ada_use_c2phc(20, a, b, c);
  return fail;
}


x86 assembly (clang, -O0):
<syscon_read_standard_system>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x14,%edi
call   1030 <_ada_use_c2phc@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<syscon_read_standard_system>:
mov    $0x14,%edi
jmp    1030 <_ada_use_c2phc@plt>

LLVM IR (-O0):
define i32 @syscon_read_standard_system() {
%1 = alloca i32*
%2 = alloca i32*
%3 = alloca i32
%4 = alloca double*
%5 = load i32*, i32** %1
%6 = load i32*, i32** %2
%7 = load double*, double** %4
%8 = call i32 @_ada_use_c2phc(i32 20, i32* %5, i32* %6, double* %7)
store i32 %8, i32* %3
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
define i32 @syscon_read_standard_system() {
%1 = tail call i32 @_ada_use_c2phc(i32 20, i32* undef, i32* undef, double* undef)
ret i32 %1
}
/* Variables and functions */
void *_talloc_realloc(void const *, void *, size_t, int /*<<< orphan*/ *);
void *talloc_realloc_fn(const void *context, void *ptr, size_t size) {
  return _talloc_realloc(context, ptr, size, NULL);
}


x86 assembly (clang, -O0):
<talloc_realloc_fn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%ecx
call   1030 <_talloc_realloc@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<talloc_realloc_fn>:
xor    %ecx,%ecx
jmp    1030 <_talloc_realloc@plt>

LLVM IR (-O0):
define i8* @talloc_realloc_fn(i8* %0, i8* %1, i64 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i64
store i8* %0, i8** %4
store i8* %1, i8** %5
store i64 %2, i64* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = load i64, i64* %6
%10 = call i8* @_talloc_realloc(i8* %7, i8* %8, i64 %9, i32* null)
ret i8* %10
}

LLVM IR (-O2):
define i8* @talloc_realloc_fn(i8* %0, i8* %1, i64 %2) {
%4 = tail call i8* @_talloc_realloc(i8* %0, i8* %1, i64 %2, i32* null)
ret i8* %4
}
void pthread_attr_getinheritsched() {}


x86 assembly (clang, -O0):
<pthread_attr_getinheritsched>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pthread_attr_getinheritsched>:
ret

LLVM IR (-O0):
define void @pthread_attr_getinheritsched() {
ret void
}

LLVM IR (-O2):
define void @pthread_attr_getinheritsched() {
ret void
}
/* Variables and functions */
double sqrt(double);
int compute_gemv_dimension(int maxmem, int datasize) {
  double rt;
  rt = (4.0 * (double)maxmem / (double)datasize) + 4.0;
  rt = sqrt(rt) - 2.0;
  rt = rt / 2;
  return ((int)rt);
}


x86 assembly (clang, -O0):
<compute_gemv_dimension>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cvtsi2sdl -0x4(%rbp),%xmm1
movsd  0xedd(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsi2sdl -0x8(%rbp),%xmm1
divsd  %xmm1,%xmm0
movsd  0xec8(%rip),%xmm1
addsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
call   1030 <sqrt@plt>
movsd  0xea5(%rip),%xmm1
subsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
movsd  -0x10(%rbp),%xmm0
movsd  0xe8f(%rip),%xmm1
divsd  %xmm1,%xmm0
movsd  %xmm0,-0x10(%rbp)
cvttsd2si -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<compute_gemv_dimension>:
push   %rax
cvtsi2sd %edi,%xmm0
movsd  0xee3(%rip),%xmm1
mulsd  %xmm1,%xmm0
cvtsi2sd %esi,%xmm2
divsd  %xmm2,%xmm0
addsd  %xmm1,%xmm0
xorpd  %xmm1,%xmm1
ucomisd %xmm1,%xmm0
jb     113d <compute_gemv_dimension+0x2d>
sqrtsd %xmm0,%xmm0
jmp    1142 <compute_gemv_dimension+0x32>
call   1030 <sqrt@plt>
addsd  0xebe(%rip),%xmm0
mulsd  0xebe(%rip),%xmm0
cvttsd2si %xmm0,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @compute_gemv_dimension(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca double
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
%7 = sitofp i32 %6 to double
%8 = fmul double 4.000000e+00, %7
%9 = load i32, i32* %4
%10 = sitofp i32 %9 to double
%11 = fdiv double %8, %10
%12 = fadd double %11, 4.000000e+00
store double %12, double* %5
%13 = load double, double* %5
%14 = call double @sqrt(double %13)
%15 = fsub double %14, 2.000000e+00
store double %15, double* %5
%16 = load double, double* %5
%17 = fdiv double %16, 2.000000e+00
store double %17, double* %5
%18 = load double, double* %5
%19 = fptosi double %18 to i32
ret i32 %19
}

LLVM IR (-O2):
define i32 @compute_gemv_dimension(i32 %0, i32 %1) {
%3 = sitofp i32 %0 to double
%4 = fmul double %3, 4.000000e+00
%5 = sitofp i32 %1 to double
%6 = fdiv double %4, %5
%7 = fadd double %6, 4.000000e+00
%8 = tail call double @sqrt(double %7)
%9 = fadd double %8, -2.000000e+00
%10 = fmul double %9, 5.000000e-01
%11 = fptosi double %10 to i32
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ dtoi(float);
int /*<<< orphan*/ g2_set_QP(int /*<<< orphan*/, float, float);
void g2_set_qp_(float *dev, float *d, float *shape) {
  g2_set_QP(dtoi(*dev), *d, *shape);
}


x86 assembly (clang, -O0):
<g2_set_qp_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
movss  (%rax),%xmm0
call   1040 <dtoi@plt>
mov    %eax,%edi
mov    -0x10(%rbp),%rax
movss  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movss  (%rax),%xmm1
call   1030 <g2_set_QP@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<g2_set_qp_>:
push   %r14
push   %rbx
push   %rax
mov    %rdx,%r14
mov    %rsi,%rbx
movss  (%rdi),%xmm0
call   1040 <dtoi@plt>
movss  (%rbx),%xmm0
movss  (%r14),%xmm1
mov    %eax,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <g2_set_QP@plt>

LLVM IR (-O0):
define void @g2_set_qp_(float* %0, float* %1, float* %2) {
%4 = alloca float*
%5 = alloca float*
%6 = alloca float*
store float* %0, float** %4
store float* %1, float** %5
store float* %2, float** %6
%7 = load float*, float** %4
%8 = load float, float* %7
%9 = call i32 @dtoi(float %8)
%10 = load float*, float** %5
%11 = load float, float* %10
%12 = load float*, float** %6
%13 = load float, float* %12
%14 = call i32 @g2_set_QP(i32 %9, float %11, float %13)
ret void
}

LLVM IR (-O2):
define void @g2_set_qp_(float* nocapture %0, float* nocapture %1, float* nocapture %2) {
%4 = load float, float* %0
%5 = tail call i32 @dtoi(float %4)
%6 = load float, float* %1
%7 = load float, float* %2
%8 = tail call i32 @g2_set_QP(i32 %5, float %6, float %7)
ret void
}
/* Variables and functions */
int multiplicar_numero_secreto(int);
int /*<<< orphan*/ printf(char *, int);
void main() {
  int n = 2;
  printf("%d\n", multiplicar_numero_secreto(n));
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x2,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <multiplicar_numero_secreto@plt>
mov    %eax,%esi
lea    0xec0(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x2,%edi
call   1040 <multiplicar_numero_secreto@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
pop    %rax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define void @main() {
%1 = alloca i32
store i32 2, i32* %1
%2 = load i32, i32* %1
%3 = call i32 @multiplicar_numero_secreto(i32 %2)
%4 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define void @main() {
%1 = tail call i32 @multiplicar_numero_secreto(i32 2)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret void
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  int send_event;
};
typedef TYPE_1__ XCirculateRequestEvent;

/* Variables and functions */
void set_XCirculateRequestEvent_send_event(void *_p, int _v) {
  ((XCirculateRequestEvent *)_p)->send_event = (int)_v;
}


x86 assembly (clang, -O0):
<set_XCirculateRequestEvent_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_XCirculateRequestEvent_send_event>:
mov    %esi,(%rdi)
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i32 }
define void @set_XCirculateRequestEvent_send_event(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to %struct.TYPE_2__*
%8 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %7, i32 0, i32 0
store i32 %5, i32* %8
ret void
}

LLVM IR (-O2):
define void @set_XCirculateRequestEvent_send_event(i8* nocapture writeonly %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
store i32 %1, i32* %3
ret void
}
double foo(unsigned int x) { return (double)(float)(x & 0xffffff00); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffffff00,%eax
cvtsi2ss %rax,%xmm0
cvtss2sd %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
and    $0xffffff00,%edi
cvtsi2ss %rdi,%xmm0
cvtss2sd %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, -256
%5 = uitofp i32 %4 to float
%6 = fpext float %5 to double
ret double %6
}

LLVM IR (-O2):
define double @foo(i32 %0) {
%2 = and i32 %0, -256
%3 = uitofp i32 %2 to float
%4 = fpext float %3 to double
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ close(int);
void test_main(void) { close(0x20101234); }


x86 assembly (clang, -O0):
<test_main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x20101234,%edi
call   1030 <close@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_main>:
mov    $0x20101234,%edi
jmp    1030 <close@plt>

LLVM IR (-O0):
define void @test_main() {
%1 = call i32 @close(i32 537924148)
ret void
}

LLVM IR (-O2):
define void @test_main() {
%1 = tail call i32 @close(i32 537924148)
ret void
}
void int_init() {
  (*(volatile unsigned *)0x7F008830) &= (~(0x3 << 14));
  (*(volatile unsigned *)0x7F008830) |= (0x2 << 14);
}


x86 assembly (clang, -O0):
<int_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0x7f008830,%eax
mov    (%rax),%ecx
and    $0xffff3fff,%ecx
mov    $0x7f008830,%eax
mov    %ecx,(%rax)
mov    $0x7f008830,%eax
mov    (%rax),%ecx
or     $0x8000,%ecx
mov    $0x7f008830,%eax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<int_init>:
andl   $0xffff3fff,0x7f008830
ff 3f ff ff
orl    $0x8000,0x7f008830
ret

LLVM IR (-O0):
define void @int_init() {
%1 = load volatile i32, i32* inttoptr (i64 2130741296 to i32*)
%2 = and i32 %1, -49153
store volatile i32 %2, i32* inttoptr (i64 2130741296 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 2130741296 to i32*)
%4 = or i32 %3, 32768
store volatile i32 %4, i32* inttoptr (i64 2130741296 to i32*)
ret void
}

LLVM IR (-O2):
define void @int_init() {
%1 = load volatile i32, i32* inttoptr (i64 2130741296 to i32*)
%2 = and i32 %1, -49153
store volatile i32 %2, i32* inttoptr (i64 2130741296 to i32*)
%3 = load volatile i32, i32* inttoptr (i64 2130741296 to i32*)
%4 = or i32 %3, 32768
store volatile i32 %4, i32* inttoptr (i64 2130741296 to i32*)
ret void
}
/* Variables and functions */
size_t cielPow2(size_t val) {
  size_t it = 1;
  while (it < val) {
    it *= 2;
  }
  return it;
}


x86 assembly (clang, -O0):
<cielPow2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x1,-0x10(%rbp)
mov    -0x10(%rbp),%rax
cmp    -0x8(%rbp),%rax
jae    112f <cielPow2+0x2f>
mov    -0x10(%rbp),%rax
shl    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <cielPow2+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cielPow2>:
mov    $0x1,%ecx
cs nopw 0x0(%rax,%rax,1)
nop
mov    %rcx,%rax
add    %rcx,%rcx
cmp    %rdi,%rax
jb     1110 <cielPow2+0x10>
ret

LLVM IR (-O0):
define i64 @cielPow2(i64 %0) {
%2 = alloca i64
%3 = alloca i64
store i64 %0, i64* %2
store i64 1, i64* %3
br label %4
4: ; preds = %8, %1
%5 = load i64, i64* %3
%6 = load i64, i64* %2
%7 = icmp ult i64 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %4
%9 = load i64, i64* %3
%10 = mul i64 %9, 2
store i64 %10, i64* %3
br label %4
11: ; preds = %4
%12 = load i64, i64* %3
ret i64 %12
}

LLVM IR (-O2):
define i64 @cielPow2(i64 %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 1, %1 ], [ %5, %2 ]
%4 = icmp ult i64 %3, %0
%5 = shl i64 %3, 1
br i1 %4, label %2, label %6
6: ; preds = %2
ret i64 %3
}
/* Variables and functions */
size_t f_tab_len(char **tab) {
  size_t i;
  i = 0;
  while (tab[i])
    ++i;
  return (i);
}


x86 assembly (clang, -O0):
<f_tab_len>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1134 <f_tab_len+0x34>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <f_tab_len+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_tab_len>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpq   $0x0,0x8(%rdi,%rax,8)
lea    0x1(%rax),%rax
jne    1110 <f_tab_len+0x10>
ret

LLVM IR (-O0):
define i64 @f_tab_len(i8** %0) {
%2 = alloca i8**
%3 = alloca i64
store i8** %0, i8*** %2
store i64 0, i64* %3
br label %4
4: ; preds = %10, %1
%5 = load i8**, i8*** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8*, i8** %5, i64 %6
%8 = load i8*, i8** %7
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i64, i64* %3
%12 = add i64 %11, 1
store i64 %12, i64* %3
br label %4
13: ; preds = %4
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @f_tab_len(i8** nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
%6 = icmp eq i8* %5, null
%7 = add i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i64 %3
}
unsigned char core___core__Byte___Numeric__to_b(unsigned char self) {
  unsigned char var;
  var = self;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<core___core__Byte___Numeric__to_b>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    -0x1(%rbp),%al
mov    %al,-0x2(%rbp)
movzbl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<core___core__Byte___Numeric__to_b>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @core___core__Byte___Numeric__to_b(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i8
store i8 %0, i8* %2
%4 = load i8, i8* %2
store i8 %4, i8* %3
br label %5
5: ; preds = %1
%6 = load i8, i8* %3
ret i8 %6
}

LLVM IR (-O2):
define zeroext i8 @core___core__Byte___Numeric__to_b(i8 returned zeroext %0) {
ret i8 %0
}
void ff_hevc_put_hevc_bi_epel_v48_8_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_epel_v48_8_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_epel_v48_8_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_epel_v48_8_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_epel_v48_8_sse4() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ volatile uint16_t;

/* Variables and functions */
__attribute__((always_)) uint16_t read16(unsigned long addr) {
  return *((volatile uint16_t *)(addr));
}


x86 assembly (clang, -O0):
<read16>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<read16>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @read16(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = inttoptr i64 %3 to i32*
%5 = load volatile i32, i32* %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @read16(i64 %0) {
%2 = inttoptr i64 %0 to i32*
%3 = load volatile i32, i32* %2
ret i32 %3
}
/* Variables and functions */
int func();
int main(int argc, char **argv) {
  (void)argc;
  (void)(argv);
  return func();
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    $0x0,%al
call   1030 <func@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
xor    %eax,%eax
jmp    1030 <func@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 (...) @func()
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 (...) @func()
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void indent(int i) {
  for (; i > 0; i--) {
    printf("  ");
  }
}


x86 assembly (clang, -O0):
<indent>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
jle    113f <indent+0x2f>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0xffffffff,%eax
mov    %eax,-0x4(%rbp)
jmp    111b <indent+0xb>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<indent>:
push   %r14
push   %rbx
push   %rax
test   %edi,%edi
jle    1140 <indent+0x30>
mov    %edi,%ebx
add    $0x1,%ebx
lea    0xedc(%rip),%r14
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %r14,%rdi
call   1030 <printf@plt>
add    $0xffffffff,%ebx
cmp    $0x1,%ebx
ja     1130 <indent+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
@.str = [3 x i8] c" \00"
define void @indent(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
br label %3
3: ; preds = %8, %1
%4 = load i32, i32* %2
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
br label %8
8: ; preds = %6
%9 = load i32, i32* %2
%10 = add nsw i32 %9, -1
store i32 %10, i32* %2
br label %3
11: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c" \00"
define void @indent(i32 %0) {
%2 = icmp sgt i32 %0, 0
br i1 %2, label %3, label %8
3: ; preds = %1, %3
%4 = phi i32 [ %6, %3 ], [ %0, %1 ]
%5 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0))
%6 = add nsw i32 %4, -1
%7 = icmp ugt i32 %4, 1
br i1 %7, label %3, label %8
8: ; preds = %3, %1
ret void
}
/* Type definitions */
struct __test_metadata {
  int dummy;
};
struct __fixture_variant_metadata {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ epoll48(struct __test_metadata *);
void wrapper_epoll48(struct __test_metadata *_metadata,
                     struct __fixture_variant_metadata *variant) {
  epoll48(_metadata);
}


x86 assembly (clang, -O0):
<wrapper_epoll48>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <epoll48@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wrapper_epoll48>:
jmp    1030 <epoll48@plt>

LLVM IR (-O0):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll48(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* %1) {
%3 = alloca %struct.__test_metadata*
%4 = alloca %struct.__fixture_variant_metadata*
store %struct.__test_metadata* %0, %struct.__test_metadata** %3
store %struct.__fixture_variant_metadata* %1, %struct.__fixture_variant_metadata** %4
%5 = load %struct.__test_metadata*, %struct.__test_metadata** %3
%6 = call i32 @epoll48(%struct.__test_metadata* %5)
ret void
}

LLVM IR (-O2):
%struct.__test_metadata = type { i32 }
%struct.__fixture_variant_metadata = type { i32 }
define void @wrapper_epoll48(%struct.__test_metadata* %0, %struct.__fixture_variant_metadata* nocapture readnone %1) {
%3 = tail call i32 @epoll48(%struct.__test_metadata* %0)
ret void
}
void local_decl() {
  int y = y;
  {
    int x = x;
    int a;
    int b = a = 2;
  }
}


x86 assembly (clang, -O0):
<local_decl>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x8(%rbp)
movl   $0x2,-0xc(%rbp)
movl   $0x2,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<local_decl>:
ret

LLVM IR (-O0):
define void @local_decl() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = load i32, i32* %1
store i32 %5, i32* %1
%6 = load i32, i32* %2
store i32 %6, i32* %2
store i32 2, i32* %3
store i32 2, i32* %4
ret void
}

LLVM IR (-O2):
define void @local_decl() {
ret void
}
/* Type definitions */
struct timespec {
  int tv_sec;
  int tv_nsec;
};
typedef int int64_t;

/* Variables and functions */
int64_t timespec_diff_ms(struct timespec *timeA_p, struct timespec *timeB_p) {
  return (((timeA_p->tv_sec * 1000000000) + timeA_p->tv_nsec) -
          ((timeB_p->tv_sec * 1000000000) + timeB_p->tv_nsec)) /
         1000000;
}


x86 assembly (clang, -O0):
<timespec_diff_ms>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
imul   $0x3b9aca00,(%rax),%eax
mov    -0x8(%rbp),%rcx
add    0x4(%rcx),%eax
mov    -0x10(%rbp),%rcx
imul   $0x3b9aca00,(%rcx),%ecx
mov    -0x10(%rbp),%rdx
add    0x4(%rdx),%ecx
sub    %ecx,%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
pop    %rbp
ret

x86 assembly (clang, -O2):
<timespec_diff_ms>:
mov    (%rdi),%eax
mov    0x4(%rdi),%ecx
sub    (%rsi),%eax
imul   $0x3b9aca00,%eax,%eax
sub    0x4(%rsi),%ecx
add    %eax,%ecx
movslq %ecx,%rax
imul   $0x431bde83,%rax,%rax
mov    %rax,%rcx
shr    $0x3f,%rcx
sar    $0x32,%rax
add    %ecx,%eax
ret

LLVM IR (-O0):
%struct.timespec = type { i32, i32 }
define i32 @timespec_diff_ms(%struct.timespec* %0, %struct.timespec* %1) {
%3 = alloca %struct.timespec*
%4 = alloca %struct.timespec*
store %struct.timespec* %0, %struct.timespec** %3
store %struct.timespec* %1, %struct.timespec** %4
%5 = load %struct.timespec*, %struct.timespec** %3
%6 = getelementptr inbounds %struct.timespec, %struct.timespec* %5, i32 0, i32 0
%7 = load i32, i32* %6
%8 = mul nsw i32 %7, 1000000000
%9 = load %struct.timespec*, %struct.timespec** %3
%10 = getelementptr inbounds %struct.timespec, %struct.timespec* %9, i32 0, i32 1
%11 = load i32, i32* %10
%12 = add nsw i32 %8, %11
%13 = load %struct.timespec*, %struct.timespec** %4
%14 = getelementptr inbounds %struct.timespec, %struct.timespec* %13, i32 0, i32 0
%15 = load i32, i32* %14
%16 = mul nsw i32 %15, 1000000000
%17 = load %struct.timespec*, %struct.timespec** %4
%18 = getelementptr inbounds %struct.timespec, %struct.timespec* %17, i32 0, i32 1
%19 = load i32, i32* %18
%20 = add nsw i32 %16, %19
%21 = sub nsw i32 %12, %20
%22 = sdiv i32 %21, 1000000
ret i32 %22
}

LLVM IR (-O2):
%struct.timespec = type { i32, i32 }
define i32 @timespec_diff_ms(%struct.timespec* nocapture %0, %struct.timespec* nocapture %1) {
%3 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 0
%4 = load i32, i32* %3
%5 = getelementptr inbounds %struct.timespec, %struct.timespec* %0, i64 0, i32 1
%6 = load i32, i32* %5
%7 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 0
%8 = load i32, i32* %7
%9 = getelementptr inbounds %struct.timespec, %struct.timespec* %1, i64 0, i32 1
%10 = load i32, i32* %9
%11 = sub i32 %4, %8
%12 = mul i32 %11, 1000000000
%13 = sub i32 %6, %10
%14 = add i32 %13, %12
%15 = sdiv i32 %14, 1000000
ret i32 %15
}
int __attribute__((nomips16)) f7(unsigned long long y) {
  return (int)((int)(y >> 61) + 1);
}


x86 assembly (clang, -O0):
<f7>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
shr    $0x3d,%rax
add    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f7>:
shr    $0x3d,%rdi
lea    0x1(%rdi),%eax
ret

LLVM IR (-O0):
define i32 @f7(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = lshr i64 %3, 61
%5 = trunc i64 %4 to i32
%6 = add nsw i32 %5, 1
ret i32 %6
}

LLVM IR (-O2):
define i32 @f7(i64 %0) {
%2 = lshr i64 %0, 61
%3 = trunc i64 %2 to i32
%4 = add nuw nsw i32 %3, 1
ret i32 %4
}
int any_divisors(long *div_list, int length, long num) {
  int i;
  for (i = 0; i < length; i++) {
    if (num % div_list[i] == 0) {
      return 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<any_divisors>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %rdx,-0x20(%rbp)
movl   $0x0,-0x24(%rbp)
mov    -0x24(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    115d <any_divisors+0x5d>
mov    -0x20(%rbp),%rax
mov    -0x10(%rbp),%rcx
movslq -0x24(%rbp),%rsi
cqto
idivq  (%rcx,%rsi,8)
cmp    $0x0,%rdx
jne    114a <any_divisors+0x4a>
movl   $0x1,-0x4(%rbp)
jmp    1164 <any_divisors+0x64>
jmp    114f <any_divisors+0x4f>
mov    -0x24(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x24(%rbp)
jmp    1116 <any_divisors+0x16>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<any_divisors>:
test   %esi,%esi
jle    1148 <any_divisors+0x48>
mov    %rdx,%r9
mov    %esi,%r8d
xor    %esi,%esi
jmp    1125 <any_divisors+0x25>
xchg   %ax,%ax
mov    %r9d,%eax
xor    %edx,%edx
div    %ecx
test   %rdx,%rdx
je     1142 <any_divisors+0x42>
add    $0x1,%rsi
cmp    %rsi,%r8
je     1148 <any_divisors+0x48>
mov    (%rdi,%rsi,8),%rcx
mov    %r9,%rax
or     %rcx,%rax
shr    $0x20,%rax
je     1110 <any_divisors+0x10>
mov    %r9,%rax
cqto
idiv   %rcx
test   %rdx,%rdx
jne    111c <any_divisors+0x1c>
mov    $0x1,%eax
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @any_divisors(i64* %0, i32 %1, i64 %2) {
%4 = alloca i32
%5 = alloca i64*
%6 = alloca i32
%7 = alloca i64
%8 = alloca i32
store i64* %0, i64** %5
store i32 %1, i32* %6
store i64 %2, i64* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i64, i64* %7
%15 = load i64*, i64** %5
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i64, i64* %15, i64 %17
%19 = load i64, i64* %18
%20 = srem i64 %14, %19
%21 = icmp eq i64 %20, 0
br i1 %21, label %22, label %23
22: ; preds = %13
store i32 1, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 0, i32* %4
br label %28
28: ; preds = %27, %22
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @any_divisors(i64* nocapture %0, i32 %1, i64 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %16
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %9
7: ; preds = %9
%8 = icmp eq i64 %15, %6
br i1 %8, label %16, label %9
9: ; preds = %5, %7
%10 = phi i64 [ 0, %5 ], [ %15, %7 ]
%11 = getelementptr inbounds i64, i64* %0, i64 %10
%12 = load i64, i64* %11
%13 = srem i64 %2, %12
%14 = icmp eq i64 %13, 0
%15 = add nuw nsw i64 %10, 1
br i1 %14, label %16, label %7
16: ; preds = %9, %7, %3
%17 = phi i32 [ 0, %3 ], [ 0, %7 ], [ 1, %9 ]
ret i32 %17
}
/* Variables and functions */
scalar_t__ posix_memalign(void **, size_t, size_t);
void *aligned_alloc(size_t alignment, size_t size) {
  void *mem;
  if (size % alignment != 0)
    return NULL;
  if (posix_memalign(&mem, alignment, size))
    return NULL;
  return mem;
}


x86 assembly (clang, -O0):
<aligned_alloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x18(%rbp),%rax
xor    %ecx,%ecx
mov    %ecx,%edx
divq   -0x10(%rbp)
cmp    $0x0,%rdx
je     1143 <aligned_alloc+0x33>
movq   $0x0,-0x8(%rbp)
jmp    1173 <aligned_alloc+0x63>
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
lea    -0x20(%rbp),%rdi
call   1030 <posix_memalign@plt>
cmp    $0x0,%rax
je     116b <aligned_alloc+0x5b>
movq   $0x0,-0x8(%rbp)
jmp    1173 <aligned_alloc+0x63>
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<aligned_alloc>:
mov    %rsi,%rcx
mov    %rdi,%rsi
mov    %rcx,%rax
or     %rdi,%rax
shr    $0x20,%rax
je     1132 <aligned_alloc+0x22>
mov    %rcx,%rax
xor    %edx,%edx
div    %rsi
test   %rdx,%rdx
je     113d <aligned_alloc+0x2d>
xor    %eax,%eax
ret
mov    %ecx,%eax
xor    %edx,%edx
div    %esi
test   %rdx,%rdx
jne    112f <aligned_alloc+0x1f>
push   %rax
mov    %rsp,%rdi
mov    %rcx,%rdx
call   1030 <posix_memalign@plt>
test   %rax,%rax
jne    1157 <aligned_alloc+0x47>
mov    (%rsp),%rax
add    $0x8,%rsp
ret
xor    %eax,%eax
add    $0x8,%rsp
ret

LLVM IR (-O0):
define i8* @aligned_alloc(i64 %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i64
%6 = alloca i8*
store i64 %0, i64* %4
store i64 %1, i64* %5
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = urem i64 %7, %8
%10 = icmp ne i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %2
store i8* null, i8** %3
br label %20
12: ; preds = %2
%13 = load i64, i64* %4
%14 = load i64, i64* %5
%15 = call i64 @posix_memalign(i8** %6, i64 %13, i64 %14)
%16 = icmp ne i64 %15, 0
br i1 %16, label %17, label %18
17: ; preds = %12
store i8* null, i8** %3
br label %20
18: ; preds = %12
%19 = load i8*, i8** %6
store i8* %19, i8** %3
br label %20
20: ; preds = %18, %17, %11
%21 = load i8*, i8** %3
ret i8* %21
}

LLVM IR (-O2):
define i8* @aligned_alloc(i64 %0, i64 %1) {
%3 = alloca i8*
%4 = bitcast i8** %3 to i8*
%5 = urem i64 %1, %0
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %12
7: ; preds = %2
%8 = call i64 @posix_memalign(i8** %3, i64 %0, i64 %1)
%9 = icmp eq i64 %8, 0
%10 = load i8*, i8** %3
%11 = select i1 %9, i8* %10, i8* null
br label %12
12: ; preds = %7, %2
%13 = phi i8* [ null, %2 ], [ %11, %7 ]
ret i8* %13
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int is_pattern_naive(uint16_t x) {
  if (x == 0) {
    return 0;
  }
  while (x > 0) {
    if ((x & 0x8000) == 0) {
      return 0;
    }
    x <<= 1;
  }
  return 1;
}


x86 assembly (clang, -O0):
<is_pattern_naive>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111d <is_pattern_naive+0x1d>
movl   $0x0,-0x4(%rbp)
jmp    115e <is_pattern_naive+0x5e>
jmp    1122 <is_pattern_naive+0x22>
cmpl   $0x0,-0x8(%rbp)
jle    1157 <is_pattern_naive+0x57>
mov    -0x8(%rbp),%eax
and    $0x8000,%eax
cmp    $0x0,%eax
jne    1149 <is_pattern_naive+0x49>
movl   $0x0,-0x4(%rbp)
jmp    115e <is_pattern_naive+0x5e>
mov    -0x8(%rbp),%eax
shl    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <is_pattern_naive+0x22>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_pattern_naive>:
xor    %eax,%eax
test   %edi,%edi
je     1123 <is_pattern_naive+0x23>
jle    111e <is_pattern_naive+0x1e>
nopl   0x0(%rax,%rax,1)
test   $0x8000,%edi
je     1123 <is_pattern_naive+0x23>
add    %edi,%edi
test   %edi,%edi
jg     1110 <is_pattern_naive+0x10>
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @is_pattern_naive(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 0, i32* %2
br label %20
7: ; preds = %1
br label %8
8: ; preds = %16, %7
%9 = load i32, i32* %3
%10 = icmp sgt i32 %9, 0
br i1 %10, label %11, label %19
11: ; preds = %8
%12 = load i32, i32* %3
%13 = and i32 %12, 32768
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %16
15: ; preds = %11
store i32 0, i32* %2
br label %20
16: ; preds = %11
%17 = load i32, i32* %3
%18 = shl i32 %17, 1
store i32 %18, i32* %3
br label %8
19: ; preds = %8
store i32 1, i32* %2
br label %20
20: ; preds = %19, %15, %6
%21 = load i32, i32* %2
ret i32 %21
}

LLVM IR (-O2):
define i32 @is_pattern_naive(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %12, label %3
3: ; preds = %1
%4 = icmp sgt i32 %0, 0
br i1 %4, label %7, label %12
5: ; preds = %7
%6 = icmp sgt i32 %11, 0
br i1 %6, label %7, label %12
7: ; preds = %3, %5
%8 = phi i32 [ %11, %5 ], [ %0, %3 ]
%9 = and i32 %8, 32768
%10 = icmp eq i32 %9, 0
%11 = shl nuw i32 %8, 1
br i1 %10, label %12, label %5
12: ; preds = %7, %5, %3, %1
%13 = phi i32 [ 0, %1 ], [ 1, %3 ], [ 0, %7 ], [ 1, %5 ]
ret i32 %13
}
int nxrk(int a, int b) { return ~(a ^ b) ? 23 : 42; }


x86 assembly (clang, -O0):
<nxrk>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edx
xor    -0x8(%rbp),%edx
xor    $0xffffffff,%edx
mov    $0x2a,%eax
mov    $0x17,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nxrk>:
xor    %esi,%edi
cmp    $0xffffffff,%edi
mov    $0x2a,%ecx
mov    $0x17,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @nxrk(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = xor i32 %5, %6
%8 = xor i32 %7, -1
%9 = icmp ne i32 %8, 0
%10 = zext i1 %9 to i64
%11 = select i1 %9, i32 23, i32 42
ret i32 %11
}

LLVM IR (-O2):
define i32 @nxrk(i32 %0, i32 %1) {
%3 = xor i32 %1, %0
%4 = icmp eq i32 %3, -1
%5 = select i1 %4, i32 42, i32 23
ret i32 %5
}
void rotr(int *a, int *b, int *c) {
  int n = *c;
  *c = *b;
  *b = *a;
  *a = n;
}


x86 assembly (clang, -O0):
<rotr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    (%rax),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    -0x1c(%rbp),%ecx
mov    -0x8(%rbp),%rax
mov    %ecx,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rotr>:
mov    (%rdx),%eax
mov    (%rsi),%ecx
mov    %ecx,(%rdx)
mov    (%rdi),%ecx
mov    %ecx,(%rsi)
mov    %eax,(%rdi)
ret

LLVM IR (-O0):
define void @rotr(i32* %0, i32* %1, i32* %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i32*
%7 = alloca i32
store i32* %0, i32** %4
store i32* %1, i32** %5
store i32* %2, i32** %6
%8 = load i32*, i32** %6
%9 = load i32, i32* %8
store i32 %9, i32* %7
%10 = load i32*, i32** %5
%11 = load i32, i32* %10
%12 = load i32*, i32** %6
store i32 %11, i32* %12
%13 = load i32*, i32** %4
%14 = load i32, i32* %13
%15 = load i32*, i32** %5
store i32 %14, i32* %15
%16 = load i32, i32* %7
%17 = load i32*, i32** %4
store i32 %16, i32* %17
ret void
}

LLVM IR (-O2):
define void @rotr(i32* nocapture %0, i32* nocapture %1, i32* nocapture %2) {
%4 = load i32, i32* %2
%5 = load i32, i32* %1
store i32 %5, i32* %2
%6 = load i32, i32* %0
store i32 %6, i32* %1
store i32 %4, i32* %0
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int ffs_ref(int);
uint32_t ffs_bug(uint32_t word) {
  if (word == 0x101010)
    return 4;
  return ffs_ref(word);
}


x86 assembly (clang, -O0):
<ffs_bug>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x101010,-0x8(%rbp)
jne    1134 <ffs_bug+0x24>
movl   $0x4,-0x4(%rbp)
jmp    113f <ffs_bug+0x2f>
mov    -0x8(%rbp),%edi
call   1030 <ffs_ref@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ffs_bug>:
cmp    $0x101010,%edi
jne    111e <ffs_bug+0xe>
mov    $0x4,%eax
ret
jmp    1030 <ffs_ref@plt>

LLVM IR (-O0):
define i32 @ffs_bug(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 1052688
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 4, i32* %2
br label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = call i32 @ffs_ref(i32 %8)
store i32 %9, i32* %2
br label %10
10: ; preds = %7, %6
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @ffs_bug(i32 %0) {
%2 = icmp eq i32 %0, 1052688
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @ffs_ref(i32 %0)
br label %5
5: ; preds = %1, %3
%6 = phi i32 [ %4, %3 ], [ 4, %1 ]
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ _dsp_end_ihr();
int /*<<< orphan*/ _ppaf_read();
void _dsp_end_handler(void) {
  _ppaf_read();
  _dsp_end_ihr();
}


x86 assembly (clang, -O0):
<_dsp_end_handler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1040 <_ppaf_read@plt>
mov    $0x0,%al
call   1030 <_dsp_end_ihr@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<_dsp_end_handler>:
push   %rax
xor    %eax,%eax
call   1040 <_ppaf_read@plt>
xor    %eax,%eax
pop    %rcx
jmp    1030 <_dsp_end_ihr@plt>

LLVM IR (-O0):
define void @_dsp_end_handler() {
%1 = call i32 (...) @_ppaf_read()
%2 = call i32 (...) @_dsp_end_ihr()
ret void
}

LLVM IR (-O2):
define void @_dsp_end_handler() {
%1 = tail call i32 (...) @_ppaf_read()
%2 = tail call i32 (...) @_dsp_end_ihr()
ret void
}
/* Variables and functions */
int zoom_in_out(int);
int zoom_in(void) { return zoom_in_out(1); }


x86 assembly (clang, -O0):
<zoom_in>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <zoom_in_out@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<zoom_in>:
mov    $0x1,%edi
jmp    1030 <zoom_in_out@plt>

LLVM IR (-O0):
define i32 @zoom_in() {
%1 = call i32 @zoom_in_out(i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @zoom_in() {
%1 = tail call i32 @zoom_in_out(i32 1)
ret i32 %1
}
int ipow(int base, int exp) {
  int result = 1;
  while (exp) {
    if (exp & 1) {
      result *= base;
    }
    exp >>= 1;
    base *= base;
  }
  return result;
}


x86 assembly (clang, -O0):
<ipow>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     114c <ipow+0x4c>
mov    -0x8(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
je     1134 <ipow+0x34>
mov    -0x4(%rbp),%eax
imul   -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x4(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1111 <ipow+0x11>
mov    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ipow>:
test   %esi,%esi
je     113a <ipow+0x3a>
mov    $0x1,%r8d
mov    $0x1,%eax
mov    %esi,%edx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
test   $0x1,%sil
mov    %edi,%ecx
cmove  %r8d,%ecx
imul   %ecx,%eax
sar    %edx
imul   %edi,%edi
cmp    $0x1,%esi
mov    %edx,%esi
ja     1120 <ipow+0x20>
ret
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @ipow(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
store i32 1, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %4
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %23
9: ; preds = %6
%10 = load i32, i32* %4
%11 = and i32 %10, 1
%12 = icmp ne i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %9
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = mul nsw i32 %15, %14
store i32 %16, i32* %5
br label %17
17: ; preds = %13, %9
%18 = load i32, i32* %4
%19 = ashr i32 %18, 1
store i32 %19, i32* %4
%20 = load i32, i32* %3
%21 = load i32, i32* %3
%22 = mul nsw i32 %21, %20
store i32 %22, i32* %3
br label %6
23: ; preds = %6
%24 = load i32, i32* %5
ret i32 %24
}

LLVM IR (-O2):
define i32 @ipow(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %15, label %4
4: ; preds = %2, %4
%5 = phi i32 [ %11, %4 ], [ 1, %2 ]
%6 = phi i32 [ %12, %4 ], [ %1, %2 ]
%7 = phi i32 [ %13, %4 ], [ %0, %2 ]
%8 = and i32 %6, 1
%9 = icmp eq i32 %8, 0
%10 = select i1 %9, i32 1, i32 %7
%11 = mul nsw i32 %10, %5
%12 = ashr i32 %6, 1
%13 = mul nsw i32 %7, %7
%14 = icmp ult i32 %6, 2
br i1 %14, label %15, label %4
15: ; preds = %4, %2
%16 = phi i32 [ 1, %2 ], [ %11, %4 ]
ret i32 %16
}
/* Variables and functions */
double pow(float, int);
float areaCirculo(float raio) { return 3.141592 * pow(raio, 2); }


x86 assembly (clang, -O0):
<areaCirculo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
mov    $0x2,%edi
call   1030 <pow@plt>
movaps %xmm0,%xmm1
movsd  0xec9(%rip),%xmm0
mulsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<areaCirculo>:
push   %rax
mov    $0x2,%edi
call   1030 <pow@plt>
mulsd  0xedd(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @areaCirculo(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call double @pow(float %3, i32 2)
%5 = fmul double 0x400921FAFC8B007A, %4
%6 = fptrunc double %5 to float
ret float %6
}

LLVM IR (-O2):
define float @areaCirculo(float %0) {
%2 = tail call double @pow(float %0, i32 2)
%3 = fmul double %2, 0x400921FAFC8B007A
%4 = fptrunc double %3 to float
ret float %4
}
/* Type definitions */
typedef int /*<<< orphan*/ time_t;
struct tm {
  int dummy;
};

/* Variables and functions */
struct tm *gmtime(const time_t *timep) {
  return 0;
}


x86 assembly (clang, -O0):
<gmtime>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gmtime>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.tm = type { i32 }
define %struct.tm* @gmtime(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
ret %struct.tm* null
}

LLVM IR (-O2):
%struct.tm = type { i32 }
define noalias %struct.tm* @gmtime(i32* nocapture readnone %0) {
ret %struct.tm* null
}
/* Variables and functions */
int /*<<< orphan*/ depth_3();
__attribute__((always_)) void depth_4(void) { depth_3(); }


x86 assembly (clang, -O0):
<depth_4>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <depth_3@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<depth_4>:
xor    %eax,%eax
jmp    1030 <depth_3@plt>

LLVM IR (-O0):
define void @depth_4() {
%1 = call i32 (...) @depth_3()
ret void
}

LLVM IR (-O2):
define void @depth_4() {
%1 = tail call i32 (...) @depth_3()
ret void
}
/* Variables and functions */
void *malloc(unsigned int);
void *javacall_malloc(unsigned int size) { return malloc(size); }


x86 assembly (clang, -O0):
<javacall_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <malloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<javacall_malloc>:
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define i8* @javacall_malloc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @malloc(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define noalias i8* @javacall_malloc(i32 %0) {
%2 = tail call i8* @malloc(i32 %0)
ret i8* %2
}
void ExttClientAuxTable(void) {}


x86 assembly (clang, -O0):
<ExttClientAuxTable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExttClientAuxTable>:
ret

LLVM IR (-O0):
define void @ExttClientAuxTable() {
ret void
}

LLVM IR (-O2):
define void @ExttClientAuxTable() {
ret void
}