xunge/DecIR huggingface dataset:
/* Variables and functions */
void *af(char *);
int /*<<< orphan*/ cf(void *);
void bf(void) {
  void *p;
  {
    int i = 1;
    char v[i];
    p = af(v);
  }
  cf(p);
}


x86 assembly (clang, -O0):
<bf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x1,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x18(%rbp)
mov    %rax,%rcx
add    $0xf,%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rdi
sub    %rcx,%rdi
mov    %rdi,%rsp
mov    %rax,-0x20(%rbp)
call   1040 <af@plt>
mov    %rax,-0x8(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,%rsp
mov    -0x8(%rbp),%rdi
call   1030 <cf@plt>
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bf>:
push   %rbx
sub    $0x10,%rsp
mov    %rsp,%rbx
mov    %rsp,%rdi
call   1040 <af@plt>
mov    %rbx,%rsp
mov    %rax,%rdi
call   1030 <cf@plt>
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @bf() {
%1 = alloca i8*
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i64
store i32 1, i32* %2
%5 = load i32, i32* %2
%6 = zext i32 %5 to i64
%7 = call i8* @llvm.stacksave()
store i8* %7, i8** %3
%8 = alloca i8, i64 %6
store i64 %6, i64* %4
%9 = call i8* @af(i8* %8)
store i8* %9, i8** %1
%10 = load i8*, i8** %3
%11 = load i8*, i8** %1
%12 = call i32 @cf(i8* %11)
ret void
}

LLVM IR (-O2):
define void @bf() {
%1 = tail call i8* @llvm.stacksave()
%2 = alloca i8
%3 = call i8* @af(i8* %2)
%4 = call i32 @cf(i8* %3)
ret void
}
int samAdams(int x) { return x; }


x86 assembly (clang, -O0):
<samAdams>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<samAdams>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @samAdams(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @samAdams(i32 returned %0) {
ret i32 %0
}
/* Variables and functions */
void *realloc(void *, size_t);
void *safe_realloc_add_3op_(void *ptr, size_t size1, size_t size2,
                            size_t size3) {
  size2 += size1;
  if (size2 < size1)
    return 0;
  size3 += size2;
  if (size3 < size2)
    return 0;
  return realloc(ptr, size3);
}


x86 assembly (clang, -O0):
<safe_realloc_add_3op_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x18(%rbp),%rax
add    -0x20(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmp    -0x18(%rbp),%rax
jae    114f <safe_realloc_add_3op_+0x3f>
movq   $0x0,-0x8(%rbp)
jmp    1187 <safe_realloc_add_3op_+0x77>
mov    -0x20(%rbp),%rax
add    -0x28(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    1176 <safe_realloc_add_3op_+0x66>
movq   $0x0,-0x8(%rbp)
jmp    1187 <safe_realloc_add_3op_+0x77>
mov    -0x10(%rbp),%rdi
mov    -0x28(%rbp),%rsi
call   1030 <realloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<safe_realloc_add_3op_>:
add    %rdx,%rsi
jb     111a <safe_realloc_add_3op_+0xa>
add    %rcx,%rsi
jae    111d <safe_realloc_add_3op_+0xd>
xor    %eax,%eax
ret
jmp    1030 <realloc@plt>

LLVM IR (-O0):
define i8* @safe_realloc_add_3op_(i8* %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
store i8* %0, i8** %6
store i64 %1, i64* %7
store i64 %2, i64* %8
store i64 %3, i64* %9
%10 = load i64, i64* %7
%11 = load i64, i64* %8
%12 = add i64 %11, %10
store i64 %12, i64* %8
%13 = load i64, i64* %8
%14 = load i64, i64* %7
%15 = icmp ult i64 %13, %14
br i1 %15, label %16, label %17
16: ; preds = %4
store i8* null, i8** %5
br label %29
17: ; preds = %4
%18 = load i64, i64* %8
%19 = load i64, i64* %9
%20 = add i64 %19, %18
store i64 %20, i64* %9
%21 = load i64, i64* %9
%22 = load i64, i64* %8
%23 = icmp ult i64 %21, %22
br i1 %23, label %24, label %25
24: ; preds = %17
store i8* null, i8** %5
br label %29
25: ; preds = %17
%26 = load i8*, i8** %6
%27 = load i64, i64* %9
%28 = call i8* @realloc(i8* %26, i64 %27)
store i8* %28, i8** %5
br label %29
29: ; preds = %25, %24, %16
%30 = load i8*, i8** %5
ret i8* %30
}

LLVM IR (-O2):
define noalias i8* @safe_realloc_add_3op_(i8* nocapture %0, i64 %1, i64 %2, i64 %3) {
%5 = add i64 %2, %1
%6 = icmp ult i64 %5, %1
br i1 %6, label %12, label %7
7: ; preds = %4
%8 = add i64 %5, %3
%9 = icmp ult i64 %8, %5
br i1 %9, label %12, label %10
10: ; preds = %7
%11 = tail call i8* @realloc(i8* %0, i64 %8)
br label %12
12: ; preds = %7, %4, %10
%13 = phi i8* [ %11, %10 ], [ null, %4 ], [ null, %7 ]
ret i8* %13
}
/* Variables and functions */
int /*<<< orphan*/ ASAN_POISON_MEMORY_REGION(char *, int);
int /*<<< orphan*/ ASAN_UNPOISON_MEMORY_REGION(char *, int);
int /*<<< orphan*/ assert(int);
int /*<<< orphan*/ memset(char *, int /*<<< orphan*/, int);
long strtol(char *, int /*<<< orphan*/ *, int);
void test3(char *array, char *endptr) {
  memset(array, 0, 8);
  ASAN_POISON_MEMORY_REGION(array, 8);
  long r = strtol(array + 1, NULL, -1);
  assert(r == 0);
  ASAN_UNPOISON_MEMORY_REGION(array, 8);
}


x86 assembly (clang, -O0):
<test3>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
mov    $0x8,%edx
call   1040 <memset@plt>
mov    -0x8(%rbp),%rdi
mov    $0x8,%esi
call   1070 <ASAN_POISON_MEMORY_REGION@plt>
mov    -0x8(%rbp),%rdi
add    $0x1,%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0xffffffff,%edx
call   1060 <strtol@plt>
mov    %rax,-0x18(%rbp)
cmpq   $0x0,-0x18(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1050 <assert@plt>
mov    -0x8(%rbp),%rdi
mov    $0x8,%esi
call   1030 <ASAN_UNPOISON_MEMORY_REGION@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test3>:
push   %rbx
mov    %rdi,%rbx
xor    %esi,%esi
mov    $0x8,%edx
call   1040 <memset@plt>
mov    %rbx,%rdi
mov    $0x8,%esi
call   1070 <ASAN_POISON_MEMORY_REGION@plt>
lea    0x1(%rbx),%rdi
xor    %esi,%esi
mov    $0xffffffff,%edx
call   1060 <strtol@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
call   1050 <assert@plt>
mov    %rbx,%rdi
mov    $0x8,%esi
pop    %rbx
jmp    1030 <ASAN_UNPOISON_MEMORY_REGION@plt>

LLVM IR (-O0):
define void @test3(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
%5 = alloca i64
store i8* %0, i8** %3
store i8* %1, i8** %4
%6 = load i8*, i8** %3
%7 = call i32 @memset(i8* %6, i32 0, i32 8)
%8 = load i8*, i8** %3
%9 = call i32 @ASAN_POISON_MEMORY_REGION(i8* %8, i32 8)
%10 = load i8*, i8** %3
%11 = getelementptr inbounds i8, i8* %10, i64 1
%12 = call i64 @strtol(i8* %11, i32* null, i32 -1)
store i64 %12, i64* %5
%13 = load i64, i64* %5
%14 = icmp eq i64 %13, 0
%15 = zext i1 %14 to i32
%16 = call i32 @assert(i32 %15)
%17 = load i8*, i8** %3
%18 = call i32 @ASAN_UNPOISON_MEMORY_REGION(i8* %17, i32 8)
ret void
}

LLVM IR (-O2):
define void @test3(i8* %0, i8* nocapture readnone %1) {
%3 = tail call i32 @memset(i8* %0, i32 0, i32 8)
%4 = tail call i32 @ASAN_POISON_MEMORY_REGION(i8* %0, i32 8)
%5 = getelementptr inbounds i8, i8* %0, i64 1
%6 = tail call i64 @strtol(i8* nocapture %5, i32* null, i32 -1)
%7 = icmp eq i64 %6, 0
%8 = zext i1 %7 to i32
%9 = tail call i32 @assert(i32 %8)
%10 = tail call i32 @ASAN_UNPOISON_MEMORY_REGION(i8* %0, i32 8)
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
uint16_t swpb(uint16_t value) {
  return (((value & 0xff00) >> 8) | ((value & 0x00ff) << 8));
}


x86 assembly (clang, -O0):
<swpb>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xff00,%eax
sar    $0x8,%eax
mov    -0x4(%rbp),%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<swpb>:
rol    $0x8,%di
movzwl %di,%eax
ret

LLVM IR (-O0):
define i32 @swpb(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65280
%5 = ashr i32 %4, 8
%6 = load i32, i32* %2
%7 = and i32 %6, 255
%8 = shl i32 %7, 8
%9 = or i32 %5, %8
ret i32 %9
}

LLVM IR (-O2):
define i32 @swpb(i32 %0) {
%2 = trunc i32 %0 to i16
%3 = tail call i16 @llvm.bswap.i16(i16 %2)
%4 = zext i16 %3 to i32
ret i32 %4
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fgetc(int /*<<< orphan*/ *);
int file_read32(FILE *fp) {
  unsigned int r = 0;
  r |= fgetc(fp);
  r |= fgetc(fp) << 8;
  r |= fgetc(fp) << 16;
  r |= fgetc(fp) << 24;
  return r;
}


x86 assembly (clang, -O0):
<file_read32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
shl    $0x8,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
shl    $0x10,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <fgetc@plt>
shl    $0x18,%eax
or     -0xc(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<file_read32>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %rdi,%r15
call   1030 <fgetc@plt>
mov    %eax,%r14d
mov    %r15,%rdi
call   1030 <fgetc@plt>
mov    %eax,%ebp
shl    $0x8,%ebp
or     %r14d,%ebp
mov    %r15,%rdi
call   1030 <fgetc@plt>
mov    %eax,%ebx
shl    $0x10,%ebx
mov    %r15,%rdi
call   1030 <fgetc@plt>
shl    $0x18,%eax
or     %ebx,%eax
or     %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i32 @file_read32(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
%4 = load i32*, i32** %2
%5 = call i32 @fgetc(i32* %4)
%6 = load i32, i32* %3
%7 = or i32 %6, %5
store i32 %7, i32* %3
%8 = load i32*, i32** %2
%9 = call i32 @fgetc(i32* %8)
%10 = shl i32 %9, 8
%11 = load i32, i32* %3
%12 = or i32 %11, %10
store i32 %12, i32* %3
%13 = load i32*, i32** %2
%14 = call i32 @fgetc(i32* %13)
%15 = shl i32 %14, 16
%16 = load i32, i32* %3
%17 = or i32 %16, %15
store i32 %17, i32* %3
%18 = load i32*, i32** %2
%19 = call i32 @fgetc(i32* %18)
%20 = shl i32 %19, 24
%21 = load i32, i32* %3
%22 = or i32 %21, %20
store i32 %22, i32* %3
%23 = load i32, i32* %3
ret i32 %23
}

LLVM IR (-O2):
define i32 @file_read32(i32* nocapture %0) {
%2 = tail call i32 @fgetc(i32* %0)
%3 = tail call i32 @fgetc(i32* %0)
%4 = shl i32 %3, 8
%5 = or i32 %4, %2
%6 = tail call i32 @fgetc(i32* %0)
%7 = shl i32 %6, 16
%8 = or i32 %5, %7
%9 = tail call i32 @fgetc(i32* %0)
%10 = shl i32 %9, 24
%11 = or i32 %8, %10
ret i32 %11
}
/* Type definitions */
struct tms {
  int dummy;
};
typedef int /*<<< orphan*/ clock_t;

/* Variables and functions */
__attribute__((__weak__)) clock_t _times(struct tms *buf
                                         __attribute__((unused))) {
  return 0;
}


x86 assembly (clang, -O0):
<_times>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_times>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.tms = type { i32 }
define weak i32 @_times(%struct.tms* %0) {
%2 = alloca %struct.tms*
store %struct.tms* %0, %struct.tms** %2
ret i32 0
}

LLVM IR (-O2):
%struct.tms = type { i32 }
define weak i32 @_times(%struct.tms* %0) {
ret i32 0
}
void testOffsetOfRegionFreedAfterFunctionCall() {
  int *p = malloc(sizeof(int) * 2);
  p += 1;
  myfoo(p);
  free(p);
}


x86 assembly (clang, -O0):
<testOffsetOfRegionFreedAfterFunctionCall>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x8,%edi
call   1050 <malloc@plt>
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x4,%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x0,%al
call   1040 <myfoo@plt>
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<testOffsetOfRegionFreedAfterFunctionCall>:
push   %rbx
mov    $0x8,%edi
call   1050 <malloc@plt>
lea    0x4(%rax),%rbx
mov    %rbx,%rdi
xor    %eax,%eax
call   1040 <myfoo@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @testOffsetOfRegionFreedAfterFunctionCall() {
%1 = alloca i32*
%2 = call i8* @malloc(i64 8)
%3 = bitcast i8* %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = getelementptr inbounds i32, i32* %4, i64 1
store i32* %5, i32** %1
%6 = load i32*, i32** %1
%7 = call i32 (i32*, ...) bitcast (i32 (...)* @myfoo to i32 (i32*, ...)*)(i32* %6)
%8 = load i32*, i32** %1
%9 = bitcast i32* %8 to i8*
ret void
}

LLVM IR (-O2):
define void @testOffsetOfRegionFreedAfterFunctionCall() {
%1 = tail call dereferenceable_or_null(8) i8* @malloc(i64 8)
%2 = bitcast i8* %1 to i32*
%3 = getelementptr inbounds i32, i32* %2, i64 1
%4 = tail call i32 (i32*, ...) bitcast (i32 (...)* @myfoo to i32 (i32*, ...)*)(i32* %3)
%5 = bitcast i32* %3 to i8*
tail call void @free(i8* %5)
ret void
}
/* Variables and functions */
int abs(int);
int euclides_mdc(int n1, int n2) {
  int res = n1 % n2;
  if (res == 0) {
    return abs(n2);
  }
  return euclides_mdc(n2, res);
}


x86 assembly (clang, -O0):
<euclides_mdc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%eax
cltd
idivl  -0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0x10(%rbp)
jne    1152 <euclides_mdc+0x32>
mov    -0xc(%rbp),%edi
call   1030 <abs@plt>
mov    %eax,-0x4(%rbp)
jmp    1160 <euclides_mdc+0x40>
mov    -0xc(%rbp),%edi
mov    -0x10(%rbp),%esi
call   1040 <euclides_mdc@plt>
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<euclides_mdc>:
mov    %esi,%edx
mov    %edi,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %edx,%ecx
cltd
idiv   %ecx
mov    %ecx,%eax
test   %edx,%edx
jne    1110 <euclides_mdc+0x10>
mov    %ecx,%eax
neg    %eax
cmovs  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @euclides_mdc(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = srem i32 %7, %8
store i32 %9, i32* %6
%10 = load i32, i32* %6
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %2
%13 = load i32, i32* %5
%14 = call i32 @abs(i32 %13)
store i32 %14, i32* %3
br label %19
15: ; preds = %2
%16 = load i32, i32* %5
%17 = load i32, i32* %6
%18 = call i32 @euclides_mdc(i32 %16, i32 %17)
store i32 %18, i32* %3
br label %19
19: ; preds = %15, %12
%20 = load i32, i32* %3
ret i32 %20
}

LLVM IR (-O2):
define i32 @euclides_mdc(i32 %0, i32 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i32 [ %0, %2 ], [ %5, %3 ]
%5 = phi i32 [ %1, %2 ], [ %6, %3 ]
%6 = srem i32 %4, %5
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %3
8: ; preds = %3
%9 = tail call i32 @llvm.abs.i32(i32 %5, i1 true)
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ sscanf(char const *, char *, double *);
double log_get_line_timestamp(const char *line) {
  double timestamp = 0.0;
  sscanf(line + 4, "%lf", &timestamp);
  return timestamp;
}


x86 assembly (clang, -O0):
<log_get_line_timestamp>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
add    $0x4,%rdi
lea    0xecd(%rip),%rsi
lea    -0x10(%rbp),%rdx
call   1030 <sscanf@plt>
movsd  -0x10(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<log_get_line_timestamp>:
push   %rax
movq   $0x0,(%rsp)
add    $0x4,%rdi
lea    0xedc(%rip),%rsi
mov    %rsp,%rdx
call   1030 <sscanf@plt>
movsd  (%rsp),%xmm0
pop    %rax
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%lf\00"
define double @log_get_line_timestamp(i8* %0) {
%2 = alloca i8*
%3 = alloca double
store i8* %0, i8** %2
store double 0.000000e+00, double* %3
%4 = load i8*, i8** %2
%5 = getelementptr inbounds i8, i8* %4, i64 4
%6 = call i32 @sscanf(i8* %5, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %3)
%7 = load double, double* %3
ret double %7
}

LLVM IR (-O2):
@.str = [4 x i8] c"%lf\00"
define double @log_get_line_timestamp(i8* nocapture %0) {
%2 = alloca double
%3 = bitcast double* %2 to i8*
store double 0.000000e+00, double* %2
%4 = getelementptr inbounds i8, i8* %0, i64 4
%5 = call i32 @sscanf(i8* %4, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), double* %2)
%6 = load double, double* %2
ret double %6
}
/* Variables and functions */
scalar_t__ getMeasure();
int /*<<< orphan*/ setTo(char const *);
void replace(const char *value) {
  if (getMeasure() > 0) {
    setTo(value);
  }
}


x86 assembly (clang, -O0):
<replace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <getMeasure@plt>
cmp    $0x0,%rax
jle    1146 <replace+0x26>
mov    -0x8(%rbp),%rdi
call   1040 <setTo@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<replace>:
push   %rbx
mov    %rdi,%rbx
xor    %eax,%eax
call   1030 <getMeasure@plt>
test   %rax,%rax
jle    1139 <replace+0x19>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <setTo@plt>
pop    %rbx
ret

LLVM IR (-O0):
define void @replace(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i64 (...) @getMeasure()
%4 = icmp sgt i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i8*, i8** %2
%7 = call i32 @setTo(i8* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @replace(i8* %0) {
%2 = tail call i64 (...) @getMeasure()
%3 = icmp sgt i64 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @setTo(i8* %0)
br label %6
6: ; preds = %4, %1
ret void
}
/* Variables and functions */
double acos(double);
int /*<<< orphan*/ healpix_xy2_z_phi(double const *, double *, double *);
void healpix_xy2ang(const double xy[2], double *theta, double *phi) {
  double z;
  healpix_xy2_z_phi(xy, &z, phi);
  *theta = acos(z);
}


x86 assembly (clang, -O0):
<healpix_xy2ang>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x18(%rbp),%rdx
lea    -0x20(%rbp),%rsi
call   1030 <healpix_xy2_z_phi@plt>
movsd  -0x20(%rbp),%xmm0
call   1040 <acos@plt>
mov    -0x10(%rbp),%rax
movsd  %xmm0,(%rax)
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<healpix_xy2ang>:
push   %rbx
sub    $0x10,%rsp
mov    %rsi,%rbx
lea    0x8(%rsp),%rsi
call   1030 <healpix_xy2_z_phi@plt>
movsd  0x8(%rsp),%xmm0
call   1040 <acos@plt>
movsd  %xmm0,(%rbx)
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define void @healpix_xy2ang(double* %0, double* %1, double* %2) {
%4 = alloca double*
%5 = alloca double*
%6 = alloca double*
%7 = alloca double
store double* %0, double** %4
store double* %1, double** %5
store double* %2, double** %6
%8 = load double*, double** %4
%9 = load double*, double** %6
%10 = call i32 @healpix_xy2_z_phi(double* %8, double* %7, double* %9)
%11 = load double, double* %7
%12 = call double @acos(double %11)
%13 = load double*, double** %5
store double %12, double* %13
ret void
}

LLVM IR (-O2):
define void @healpix_xy2ang(double* %0, double* nocapture writeonly %1, double* %2) {
%4 = alloca double
%5 = bitcast double* %4 to i8*
%6 = call i32 @healpix_xy2_z_phi(double* %0, double* %4, double* %2)
%7 = load double, double* %4
%8 = call double @acos(double %7)
store double %8, double* %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ android_compiler_barrier();
extern void android_memory_barrier(void) { android_compiler_barrier(); }


x86 assembly (clang, -O0):
<android_memory_barrier>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <android_compiler_barrier@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<android_memory_barrier>:
xor    %eax,%eax
jmp    1030 <android_compiler_barrier@plt>

LLVM IR (-O0):
define void @android_memory_barrier() {
%1 = call i32 (...) @android_compiler_barrier()
ret void
}

LLVM IR (-O2):
define void @android_memory_barrier() {
%1 = tail call i32 (...) @android_compiler_barrier()
ret void
}
int count_neighbors() { return 0; }


x86 assembly (clang, -O0):
<count_neighbors>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_neighbors>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @count_neighbors() {
ret i32 0
}

LLVM IR (-O2):
define i32 @count_neighbors() {
ret i32 0
}
/* Variables and functions */
int rand();
float bgbdt_part_randsf() { return (((rand() & 32767) / 32767.0) * 2.0 - 1.0); }


x86 assembly (clang, -O0):
<bgbdt_part_randsf>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <rand@plt>
and    $0x7fff,%eax
cvtsi2sd %eax,%xmm0
movsd  0xedc(%rip),%xmm1
divsd  %xmm1,%xmm0
addsd  %xmm0,%xmm0
movsd  0xec4(%rip),%xmm1
addsd  %xmm1,%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<bgbdt_part_randsf>:
push   %rax
xor    %eax,%eax
call   1030 <rand@plt>
and    $0x7fff,%eax
cvtsi2sd %eax,%xmm0
divsd  0xed7(%rip),%xmm0
addsd  %xmm0,%xmm0
addsd  0xed3(%rip),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @bgbdt_part_randsf() {
%1 = call i32 (...) @rand()
%2 = and i32 %1, 32767
%3 = sitofp i32 %2 to double
%4 = fdiv double %3, 3.276700e+04
%5 = call double @llvm.fmuladd.f64(double %4, double 2.000000e+00, double -1.000000e+00)
%6 = fptrunc double %5 to float
ret float %6
}

LLVM IR (-O2):
define float @bgbdt_part_randsf() {
%1 = tail call i32 (...) @rand()
%2 = and i32 %1, 32767
%3 = sitofp i32 %2 to double
%4 = fdiv double %3, 3.276700e+04
%5 = tail call double @llvm.fmuladd.f64(double %4, double 2.000000e+00, double -1.000000e+00)
%6 = fptrunc double %5 to float
ret float %6
}
/* Variables and functions */
int /*<<< orphan*/ test_parser_sourcefile(char *, char *);
int /*<<< orphan*/ test_parser_verify_parse(int /*<<< orphan*/, char *, char *,
                                            char *, int /*<<< orphan*/);
void test_bat_comments() {
  test_parser_verify_parse(test_parser_sourcefile("bat", " REM comment"), "bat",
                           "", "REM comment", 0);
}


x86 assembly (clang, -O0):
<test_bat_comments>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
lea    0xed2(%rip),%rsi
call   1030 <test_parser_sourcefile@plt>
mov    %eax,%edi
lea    0xec0(%rip),%rsi
lea    0xebc(%rip),%rdx
lea    0xeb7(%rip),%rcx
xor    %r8d,%r8d
call   1040 <test_parser_verify_parse@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_bat_comments>:
push   %rbx
lea    0xed8(%rip),%rbx
lea    0xed5(%rip),%rsi
mov    %rbx,%rdi
call   1030 <test_parser_sourcefile@plt>
lea    0xec5(%rip),%rdx
lea    0xec0(%rip),%rcx
mov    %eax,%edi
mov    %rbx,%rsi
xor    %r8d,%r8d
pop    %rbx
jmp    1040 <test_parser_verify_parse@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"bat\00"
@.str.1 = [13 x i8] c" REM comment\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [12 x i8] c"REM comment\00"
define void @test_bat_comments() {
%1 = call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%2 = call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"bat\00"
@.str.1 = [13 x i8] c" REM comment\00"
@.str.2 = [1 x i8] zeroinitializer
@.str.3 = [12 x i8] c"REM comment\00"
define void @test_bat_comments() {
%1 = tail call i32 @test_parser_sourcefile(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str.1, i64 0, i64 0))
%2 = tail call i32 @test_parser_verify_parse(i32 %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([1 x i8], [1 x i8]* @.str.2, i64 0, i64 0), i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.3, i64 0, i64 0), i32 0)
ret void
}
/* Variables and functions */
bool is_empty(unsigned char *data, unsigned int length) {
  bool empty;
  unsigned int i;
  empty = true;
  for (i = 0; i < length; i++) {
    if (data[i] != 0) {
      empty = false;
      break;
    }
  }
  return empty;
}


x86 assembly (clang, -O0):
<is_empty>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movl   $0x1,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0xc(%rbp),%eax
jae    1158 <is_empty+0x58>
mov    -0x8(%rbp),%rax
mov    -0x14(%rbp),%ecx
movzbl (%rax,%rcx,1),%eax
cmp    $0x0,%eax
je     1145 <is_empty+0x45>
movl   $0x0,-0x10(%rbp)
jmp    1158 <is_empty+0x58>
jmp    114a <is_empty+0x4a>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1119 <is_empty+0x19>
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_empty>:
mov    $0x1,%eax
test   %esi,%esi
je     111f <is_empty+0x1f>
mov    %esi,%ecx
xor    %edx,%edx
nopl   (%rax)
cmpb   $0x0,(%rdi,%rdx,1)
jne    1120 <is_empty+0x20>
add    $0x1,%rdx
cmp    %rdx,%rcx
jne    1110 <is_empty+0x10>
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @is_empty(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
store i32 1, i32* %5
store i32 0, i32* %6
br label %7
7: ; preds = %21, %2
%8 = load i32, i32* %6
%9 = load i32, i32* %4
%10 = icmp ult i32 %8, %9
br i1 %10, label %11, label %24
11: ; preds = %7
%12 = load i8*, i8** %3
%13 = load i32, i32* %6
%14 = zext i32 %13 to i64
%15 = getelementptr inbounds i8, i8* %12, i64 %14
%16 = load i8, i8* %15
%17 = zext i8 %16 to i32
%18 = icmp ne i32 %17, 0
br i1 %18, label %19, label %20
19: ; preds = %11
store i32 0, i32* %5
br label %24
20: ; preds = %11
br label %21
21: ; preds = %20
%22 = load i32, i32* %6
%23 = add i32 %22, 1
store i32 %23, i32* %6
br label %7
24: ; preds = %19, %7
%25 = load i32, i32* %5
ret i32 %25
}

LLVM IR (-O2):
define i32 @is_empty(i8* nocapture %0, i32 %1) {
%3 = icmp eq i32 %1, 0
br i1 %3, label %14, label %4
4: ; preds = %2
%5 = zext i32 %1 to i64
br label %8
6: ; preds = %8
%7 = icmp eq i64 %13, %5
br i1 %7, label %14, label %8
8: ; preds = %4, %6
%9 = phi i64 [ 0, %4 ], [ %13, %6 ]
%10 = getelementptr inbounds i8, i8* %0, i64 %9
%11 = load i8, i8* %10
%12 = icmp eq i8 %11, 0
%13 = add nuw nsw i64 %9, 1
br i1 %12, label %6, label %14
14: ; preds = %6, %8, %2
%15 = phi i32 [ 1, %2 ], [ 0, %8 ], [ 1, %6 ]
ret i32 %15
}
/* Variables and functions */
scalar_t__ IMU_Navdata_init();
int /*<<< orphan*/ perror(char *);
int /*<<< orphan*/ printf(char *);
void MDL_IMU_start() {
  if (IMU_Navdata_init() == 0) {
    perror("Failed to initialize AR Drone Inertial Measurement Unit System!");
    printf(
        "Failed to initialize AR Drone Inertial Measurement Unit System! \n");
  } else {
    printf("IMU Initialization and Connection succesful! \n");
  }
}


x86 assembly (clang, -O0):
<MDL_IMU_start>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <IMU_Navdata_init@plt>
cmp    $0x0,%rax
jne    1162 <MDL_IMU_start+0x32>
lea    0xeb4(%rip),%rdi
call   1050 <perror@plt>
lea    0xee8(%rip),%rdi
call   1040 <printf@plt>
jmp    116e <MDL_IMU_start+0x3e>
lea    0xf19(%rip),%rdi
call   1040 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<MDL_IMU_start>:
push   %rax
xor    %eax,%eax
call   1030 <IMU_Navdata_init@plt>
test   %rax,%rax
je     114a <MDL_IMU_start+0x1a>
lea    0xefc(%rip),%rdi
pop    %rax
jmp    1040 <puts@plt>
lea    0xeaf(%rip),%rdi
call   1050 <perror@plt>
lea    0xf11(%rip),%rdi
pop    %rax
jmp    1040 <puts@plt>

LLVM IR (-O0):
@.str = [64 x i8] c"Failed to initialize AR Drone Inertial Measurement Unit System!\00"
@.str.1 = [66 x i8] c"Failed to initialize AR Drone Inertial Measurement Unit System! \0A\00"
@.str.2 = [47 x i8] c"IMU Initialization and Connection succesful! \0A\00"
define void @MDL_IMU_start() {
%1 = call i64 (...) @IMU_Navdata_init()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %6
3: ; preds = %0
%4 = call i32 @perror(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str, i64 0, i64 0))
%5 = call i32 @printf(i8* getelementptr inbounds ([66 x i8], [66 x i8]* @.str.1, i64 0, i64 0))
br label %8
6: ; preds = %0
%7 = call i32 @printf(i8* getelementptr inbounds ([47 x i8], [47 x i8]* @.str.2, i64 0, i64 0))
br label %8
8: ; preds = %6, %3
ret void
}

LLVM IR (-O2):
@.str = [64 x i8] c"Failed to initialize AR Drone Inertial Measurement Unit System!\00"
@str = [46 x i8] c"IMU Initialization and Connection succesful! \00"
@str.3 = [65 x i8] c"Failed to initialize AR Drone Inertial Measurement Unit System! \00"
define void @MDL_IMU_start() {
%1 = tail call i64 (...) @IMU_Navdata_init()
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @perror(i8* getelementptr inbounds ([64 x i8], [64 x i8]* @.str, i64 0, i64 0))
br label %5
5: ; preds = %0, %3
%6 = phi i8* [ getelementptr inbounds ([65 x i8], [65 x i8]* @str.3, i64 0, i64 0), %3 ], [ getelementptr inbounds ([46 x i8], [46 x i8]* @str, i64 0, i64 0), %0 ]
%7 = tail call i32 @puts(i8* dereferenceable(1) %6)
ret void
}
void swap1(int a, int b) {
  int k = a;
  a = b;
  b = k;
}


x86 assembly (clang, -O0):
<swap1>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<swap1>:
ret

LLVM IR (-O0):
define void @swap1(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %3
store i32 %6, i32* %5
%7 = load i32, i32* %4
store i32 %7, i32* %3
%8 = load i32, i32* %5
store i32 %8, i32* %4
ret void
}

LLVM IR (-O2):
define void @swap1(i32 %0, i32 %1) {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint16_t;

/* Variables and functions */
int /*<<< orphan*/ htons(int);
int get_max_op_rate(void *data) {
  uint16_t *morate = (uint16_t *)data;
  *morate = htons(600);
  return 1;
}


x86 assembly (clang, -O0):
<get_max_op_rate>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x258,%edi
call   1030 <htons@plt>
mov    %eax,%ecx
mov    -0x10(%rbp),%rax
mov    %ecx,(%rax)
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_max_op_rate>:
push   %rbx
mov    %rdi,%rbx
mov    $0x258,%edi
call   1030 <htons@plt>
mov    %eax,(%rbx)
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @get_max_op_rate(i8* %0) {
%2 = alloca i8*
%3 = alloca i32*
store i8* %0, i8** %2
%4 = load i8*, i8** %2
%5 = bitcast i8* %4 to i32*
store i32* %5, i32** %3
%6 = call i32 @htons(i32 600)
%7 = load i32*, i32** %3
store i32 %6, i32* %7
ret i32 1
}

LLVM IR (-O2):
define i32 @get_max_op_rate(i8* nocapture writeonly %0) {
%2 = bitcast i8* %0 to i32*
%3 = tail call i32 @htons(i32 600)
store i32 %3, i32* %2
ret i32 1
}
/* Type definitions */
typedef int /*<<< orphan*/ __m128;

/* Variables and functions */
int /*<<< orphan*/ _mm_add_ps(int /*<<< orphan*/, int /*<<< orphan*/);
__m128 __attribute__((no, unused)) test(__m128 s1, __m128 s2) {
  return _mm_add_ps(s1, s2);
}


x86 assembly (clang, -O0):
<test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
call   1030 <_mm_add_ps@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test>:
jmp    1030 <_mm_add_ps@plt>

LLVM IR (-O0):
define i32 @test(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @_mm_add_ps(i32 %5, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @test(i32 %0, i32 %1) {
%3 = tail call i32 @_mm_add_ps(i32 %0, i32 %1)
ret i32 %3
}
/* Type definitions */
struct const_Multiarray_Vector_T {
  int dummy;
};
struct Multiarray_Vector_T {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ print_Multiarray_Vector_T(struct Multiarray_Vector_T *);
void print_const_Multiarray_Vector_T(
    const struct const_Multiarray_Vector_T *const a) {
  print_Multiarray_Vector_T((struct Multiarray_Vector_T *)a);
}


x86 assembly (clang, -O0):
<print_const_Multiarray_Vector_T>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <print_Multiarray_Vector_T@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_const_Multiarray_Vector_T>:
jmp    1030 <print_Multiarray_Vector_T@plt>

LLVM IR (-O0):
%struct.const_Multiarray_Vector_T = type { i32 }
%struct.Multiarray_Vector_T = type { i32 }
define void @print_const_Multiarray_Vector_T(%struct.const_Multiarray_Vector_T* %0) {
%2 = alloca %struct.const_Multiarray_Vector_T*
store %struct.const_Multiarray_Vector_T* %0, %struct.const_Multiarray_Vector_T** %2
%3 = load %struct.const_Multiarray_Vector_T*, %struct.const_Multiarray_Vector_T** %2
%4 = bitcast %struct.const_Multiarray_Vector_T* %3 to %struct.Multiarray_Vector_T*
%5 = call i32 @print_Multiarray_Vector_T(%struct.Multiarray_Vector_T* %4)
ret void
}

LLVM IR (-O2):
%struct.const_Multiarray_Vector_T = type { i32 }
%struct.Multiarray_Vector_T = type { i32 }
define void @print_const_Multiarray_Vector_T(%struct.const_Multiarray_Vector_T* %0) {
%2 = bitcast %struct.const_Multiarray_Vector_T* %0 to %struct.Multiarray_Vector_T*
%3 = tail call i32 @print_Multiarray_Vector_T(%struct.Multiarray_Vector_T* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ pciconfig_write(unsigned char, unsigned char, unsigned int,
                                   int, long);
void pci_config_write_word(unsigned char bus, unsigned char dev, int func,
                           unsigned cmd, long val) {
  pciconfig_write(bus, dev << 3, cmd, 2, val);
}


x86 assembly (clang, -O0):
<pci_config_write_word>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %sil,%al
mov    %dil,%sil
mov    %sil,-0x1(%rbp)
mov    %al,-0x2(%rbp)
mov    %edx,-0x8(%rbp)
mov    %ecx,-0xc(%rbp)
mov    %r8,-0x18(%rbp)
mov    -0x1(%rbp),%sil
movzbl -0x2(%rbp),%eax
shl    $0x3,%eax
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%r8
mov    $0x2,%ecx
movzbl %sil,%edi
movzbl %al,%esi
call   1030 <pciconfig_write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pci_config_write_word>:
shl    $0x3,%sil
movzbl %sil,%esi
mov    %ecx,%edx
mov    $0x2,%ecx
jmp    1030 <pciconfig_write@plt>

LLVM IR (-O0):
define void @pci_config_write_word(i8 zeroext %0, i8 zeroext %1, i32 %2, i32 %3, i64 %4) {
%6 = alloca i8
%7 = alloca i8
%8 = alloca i32
%9 = alloca i32
%10 = alloca i64
store i8 %0, i8* %6
store i8 %1, i8* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i64 %4, i64* %10
%11 = load i8, i8* %6
%12 = load i8, i8* %7
%13 = zext i8 %12 to i32
%14 = shl i32 %13, 3
%15 = trunc i32 %14 to i8
%16 = load i32, i32* %9
%17 = load i64, i64* %10
%18 = call i32 @pciconfig_write(i8 zeroext %11, i8 zeroext %15, i32 %16, i32 2, i64 %17)
ret void
}

LLVM IR (-O2):
define void @pci_config_write_word(i8 zeroext %0, i8 zeroext %1, i32 %2, i32 %3, i64 %4) {
%6 = shl i8 %1, 3
%7 = tail call i32 @pciconfig_write(i8 zeroext %0, i8 zeroext %6, i32 %3, i32 2, i64 %4)
ret void
}
/* Variables and functions */
int _ada_use_c2phc4c(int, int *, int *, double *, int /*<<< orphan*/);
int initialize_hyperplane_sections(int m) {
  int *b, fail;
  double *c;
  fail = _ada_use_c2phc4c(59, &m, b, c, 0);
  return fail;
}


x86 assembly (clang, -O0):
<initialize_hyperplane_sections>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x10(%rbp),%rdx
mov    -0x20(%rbp),%rcx
mov    $0x3b,%edi
lea    -0x4(%rbp),%rsi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<initialize_hyperplane_sections>:
push   %rax
mov    %edi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x3b,%edi
xor    %r8d,%r8d
call   1030 <_ada_use_c2phc4c@plt>
pop    %rcx
ret

LLVM IR (-O0):
define i32 @initialize_hyperplane_sections(i32 %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
%5 = alloca double*
store i32 %0, i32* %2
%6 = load i32*, i32** %3
%7 = load double*, double** %5
%8 = call i32 @_ada_use_c2phc4c(i32 59, i32* %2, i32* %6, double* %7, i32 0)
store i32 %8, i32* %4
%9 = load i32, i32* %4
ret i32 %9
}

LLVM IR (-O2):
define i32 @initialize_hyperplane_sections(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 @_ada_use_c2phc4c(i32 59, i32* %2, i32* undef, double* undef, i32 0)
ret i32 %3
}
void SnapVector(float *v) {
  v[0] = (int)v[0];
  v[1] = (int)v[1];
  v[2] = (int)v[2];
}


x86 assembly (clang, -O0):
<SnapVector>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
cvttss2si (%rax),%eax
cvtsi2ss %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
mov    -0x8(%rbp),%rax
cvttss2si 0x4(%rax),%eax
cvtsi2ss %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
mov    -0x8(%rbp),%rax
cvttss2si 0x8(%rax),%eax
cvtsi2ss %eax,%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SnapVector>:
movss  (%rdi),%xmm0
movss  0x4(%rdi),%xmm1
movss  0x8(%rdi),%xmm2
cvttps2dq %xmm0,%xmm0
cvtdq2ps %xmm0,%xmm0
movss  %xmm0,(%rdi)
cvttps2dq %xmm1,%xmm0
cvtdq2ps %xmm0,%xmm0
movss  %xmm0,0x4(%rdi)
cvttps2dq %xmm2,%xmm0
cvtdq2ps %xmm0,%xmm0
movss  %xmm0,0x8(%rdi)
ret

LLVM IR (-O0):
define void @SnapVector(float* %0) {
%2 = alloca float*
store float* %0, float** %2
%3 = load float*, float** %2
%4 = getelementptr inbounds float, float* %3, i64 0
%5 = load float, float* %4
%6 = fptosi float %5 to i32
%7 = sitofp i32 %6 to float
%8 = load float*, float** %2
%9 = getelementptr inbounds float, float* %8, i64 0
store float %7, float* %9
%10 = load float*, float** %2
%11 = getelementptr inbounds float, float* %10, i64 1
%12 = load float, float* %11
%13 = fptosi float %12 to i32
%14 = sitofp i32 %13 to float
%15 = load float*, float** %2
%16 = getelementptr inbounds float, float* %15, i64 1
store float %14, float* %16
%17 = load float*, float** %2
%18 = getelementptr inbounds float, float* %17, i64 2
%19 = load float, float* %18
%20 = fptosi float %19 to i32
%21 = sitofp i32 %20 to float
%22 = load float*, float** %2
%23 = getelementptr inbounds float, float* %22, i64 2
store float %21, float* %23
ret void
}

LLVM IR (-O2):
define void @SnapVector(float* nocapture %0) {
%2 = load float, float* %0
%3 = fptosi float %2 to i32
%4 = sitofp i32 %3 to float
store float %4, float* %0
%5 = getelementptr inbounds float, float* %0, i64 1
%6 = load float, float* %5
%7 = fptosi float %6 to i32
%8 = sitofp i32 %7 to float
store float %8, float* %5
%9 = getelementptr inbounds float, float* %0, i64 2
%10 = load float, float* %9
%11 = fptosi float %10 to i32
%12 = sitofp i32 %11 to float
store float %12, float* %9
ret void
}
int irq_canonicalize(int irq) { return irq; }


x86 assembly (clang, -O0):
<irq_canonicalize>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<irq_canonicalize>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @irq_canonicalize(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @irq_canonicalize(i32 returned %0) {
ret i32 %0
}
int nonquery_callback(void *not_used, int a, char **b, char **c) { return 0; }


x86 assembly (clang, -O0):
<nonquery_callback>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<nonquery_callback>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @nonquery_callback(i8* %0, i32 %1, i8** %2, i8** %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i8**
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8** %2, i8*** %7
store i8** %3, i8*** %8
ret i32 0
}

LLVM IR (-O2):
define i32 @nonquery_callback(i8* nocapture readnone %0, i32 %1, i8** nocapture readnone %2, i8** nocapture readnone %3) {
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ wchar_t;

/* Variables and functions */
scalar_t__ strncpy(char *, char *, size_t);
wchar_t *wcsncpy(wchar_t *s1, const wchar_t *s2, size_t n) {
  return (wchar_t *)strncpy((char *)s1, (char *)s2, n);
}


x86 assembly (clang, -O0):
<wcsncpy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
call   1030 <strncpy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcsncpy>:
jmp    1030 <strncpy@plt>

LLVM IR (-O0):
define i32* @wcsncpy(i32* %0, i32* %1, i64 %2) {
%4 = alloca i32*
%5 = alloca i32*
%6 = alloca i64
store i32* %0, i32** %4
store i32* %1, i32** %5
store i64 %2, i64* %6
%7 = load i32*, i32** %4
%8 = bitcast i32* %7 to i8*
%9 = load i32*, i32** %5
%10 = bitcast i32* %9 to i8*
%11 = load i64, i64* %6
%12 = call i64 @strncpy(i8* %8, i8* %10, i64 %11)
%13 = inttoptr i64 %12 to i32*
ret i32* %13
}

LLVM IR (-O2):
define i32* @wcsncpy(i32* %0, i32* %1, i64 %2) {
%4 = bitcast i32* %0 to i8*
%5 = bitcast i32* %1 to i8*
%6 = tail call i64 @strncpy(i8* %4, i8* %5, i64 %2)
%7 = inttoptr i64 %6 to i32*
ret i32* %7
}
/* Type definitions */
struct vec4i {
  int dummy;
};
struct vec4 {
  int dummy;
};
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
int /*<<< orphan*/ vec4i_floor(int /*<<< orphan*/ *, float *);
__attribute__((always_)) struct vec4i *psvec4i_floor(struct vec4i *result,
                                                     struct vec4 *a) {
  vec4i_floor((int32_t *)result, (float *)a);
  return result;
}


x86 assembly (clang, -O0):
<psvec4i_floor>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <vec4i_floor@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<psvec4i_floor>:
push   %rbx
mov    %rdi,%rbx
call   1030 <vec4i_floor@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
%struct.vec4i = type { i32 }
%struct.vec4 = type { i32 }
define %struct.vec4i* @psvec4i_floor(%struct.vec4i* %0, %struct.vec4* %1) {
%3 = alloca %struct.vec4i*
%4 = alloca %struct.vec4*
store %struct.vec4i* %0, %struct.vec4i** %3
store %struct.vec4* %1, %struct.vec4** %4
%5 = load %struct.vec4i*, %struct.vec4i** %3
%6 = bitcast %struct.vec4i* %5 to i32*
%7 = load %struct.vec4*, %struct.vec4** %4
%8 = bitcast %struct.vec4* %7 to float*
%9 = call i32 @vec4i_floor(i32* %6, float* %8)
%10 = load %struct.vec4i*, %struct.vec4i** %3
ret %struct.vec4i* %10
}

LLVM IR (-O2):
%struct.vec4i = type { i32 }
%struct.vec4 = type { i32 }
define %struct.vec4i* @psvec4i_floor(%struct.vec4i* returned %0, %struct.vec4* %1) {
%3 = getelementptr %struct.vec4i, %struct.vec4i* %0, i64 0, i32 0
%4 = bitcast %struct.vec4* %1 to float*
%5 = tail call i32 @vec4i_floor(i32* %3, float* %4)
ret %struct.vec4i* %0
}
int main(void) {
  int i = 20;
  i += 22;
  return i;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x14,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x16,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x2a,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 20, i32* %2
%3 = load i32, i32* %2
%4 = add nsw i32 %3, 22
store i32 %4, i32* %2
%5 = load i32, i32* %2
ret i32 %5
}

LLVM IR (-O2):
define i32 @main() {
ret i32 42
}
/* Variables and functions */
int /*<<< orphan*/ quicksort_internal(int *, int /*<<< orphan*/, int);
void quicksort(int data[], int size) { quicksort_internal(data, 0, size - 1); }


x86 assembly (clang, -O0):
<quicksort>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
sub    $0x1,%edx
xor    %esi,%esi
call   1030 <quicksort_internal@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<quicksort>:
lea    -0x1(%rsi),%edx
xor    %esi,%esi
jmp    1030 <quicksort_internal@plt>

LLVM IR (-O0):
define void @quicksort(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = load i32, i32* %4
%7 = sub nsw i32 %6, 1
%8 = call i32 @quicksort_internal(i32* %5, i32 0, i32 %7)
ret void
}

LLVM IR (-O2):
define void @quicksort(i32* %0, i32 %1) {
%3 = add nsw i32 %1, -1
%4 = tail call i32 @quicksort_internal(i32* %0, i32 0, i32 %3)
ret void
}
__attribute__((visibility("default"))) const char *utf8proc_version(void) {
  return "2"
         "."
         "1"
         "."
         "0"
         "";
}


x86 assembly (clang, -O0):
<utf8proc_version>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<utf8proc_version>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"2.1.0\00"
define i8* @utf8proc_version() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"2.1.0\00"
define i8* @utf8proc_version() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
void STFlash_waitUntilReady(void) {}


x86 assembly (clang, -O0):
<STFlash_waitUntilReady>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<STFlash_waitUntilReady>:
ret

LLVM IR (-O0):
define void @STFlash_waitUntilReady() {
ret void
}

LLVM IR (-O2):
define void @STFlash_waitUntilReady() {
ret void
}
void wifi_rsp_tcpip_dns_configure(
    const struct wifi_msg_tcpip_dns_configure_rsp_t *msg) {}


x86 assembly (clang, -O0):
<wifi_rsp_tcpip_dns_configure>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<wifi_rsp_tcpip_dns_configure>:
ret

LLVM IR (-O0):
%struct.wifi_msg_tcpip_dns_configure_rsp_t = type opaque
define void @wifi_rsp_tcpip_dns_configure(%struct.wifi_msg_tcpip_dns_configure_rsp_t* %0) {
%2 = alloca %struct.wifi_msg_tcpip_dns_configure_rsp_t*
store %struct.wifi_msg_tcpip_dns_configure_rsp_t* %0, %struct.wifi_msg_tcpip_dns_configure_rsp_t** %2
ret void
}

LLVM IR (-O2):
%struct.wifi_msg_tcpip_dns_configure_rsp_t = type opaque
define void @wifi_rsp_tcpip_dns_configure(%struct.wifi_msg_tcpip_dns_configure_rsp_t* nocapture %0) {
ret void
}
void fn4(int n) {
  n = 3;
  __extension__ int i;
}


x86 assembly (clang, -O0):
<fn4>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x3,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fn4>:
ret

LLVM IR (-O0):
define void @fn4(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 3, i32* %2
ret void
}

LLVM IR (-O2):
define void @fn4(i32 %0) {
ret void
}
/* Type definitions */
typedef unsigned int uint8_t;
struct can_frame {
  int /*<<< orphan*/ *data;
};
typedef int /*<<< orphan*/ result;

/* Variables and functions */
int /*<<< orphan*/ byteorder(unsigned int *, int /*<<< orphan*/ *, int);
unsigned int emcy_get_register(const struct can_frame *frame) {
  uint8_t result = 0;
  byteorder(&result, &frame->data[2], sizeof(result));
  return result;
}


x86 assembly (clang, -O0):
<emcy_get_register>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
add    $0x8,%rsi
lea    -0xc(%rbp),%rdi
mov    $0x4,%edx
call   1030 <byteorder@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emcy_get_register>:
push   %rax
movl   $0x0,0x4(%rsp)
mov    (%rdi),%rsi
add    $0x8,%rsi
lea    0x4(%rsp),%rdi
mov    $0x4,%edx
call   1030 <byteorder@plt>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.can_frame = type { i32* }
define i32 @emcy_get_register(%struct.can_frame* %0) {
%2 = alloca %struct.can_frame*
%3 = alloca i32
store %struct.can_frame* %0, %struct.can_frame** %2
store i32 0, i32* %3
%4 = load %struct.can_frame*, %struct.can_frame** %2
%5 = getelementptr inbounds %struct.can_frame, %struct.can_frame* %4, i32 0, i32 0
%6 = load i32*, i32** %5
%7 = getelementptr inbounds i32, i32* %6, i64 2
%8 = call i32 @byteorder(i32* %3, i32* %7, i32 4)
%9 = load i32, i32* %3
ret i32 %9
}

LLVM IR (-O2):
%struct.can_frame = type { i32* }
define i32 @emcy_get_register(%struct.can_frame* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%4 = getelementptr inbounds %struct.can_frame, %struct.can_frame* %0, i64 0, i32 0
%5 = load i32*, i32** %4
%6 = getelementptr inbounds i32, i32* %5, i64 2
%7 = call i32 @byteorder(i32* %2, i32* %6, i32 4)
%8 = load i32, i32* %2
ret i32 %8
}