xunge/DecIR huggingface dataset:
/* Variables and functions */
int ap_cmd_set_int(int, int, int);
int ap_remove(int session, int pos) {
  return ap_cmd_set_int(session, 0xcc34, pos);
}


x86 assembly (clang, -O0):
<ap_remove>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%edx
mov    $0xcc34,%esi
call   1030 <ap_cmd_set_int@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ap_remove>:
mov    %esi,%edx
mov    $0xcc34,%esi
jmp    1030 <ap_cmd_set_int@plt>

LLVM IR (-O0):
define i32 @ap_remove(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = call i32 @ap_cmd_set_int(i32 %5, i32 52276, i32 %6)
ret i32 %7
}

LLVM IR (-O2):
define i32 @ap_remove(i32 %0, i32 %1) {
%3 = tail call i32 @ap_cmd_set_int(i32 %0, i32 52276, i32 %1)
ret i32 %3
}
/* Variables and functions */
int double_to_long_long(double);
scalar_t__ pNaN(double);
int issNaN(double val) {
  return ((0x7ff8000000000000 & double_to_long_long(val)) ==
          0x7ff0000000000000) &&
         0 < pNaN(val);
}


x86 assembly (clang, -O0):
<issNaN>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <double_to_long_long@plt>
movslq %eax,%rcx
movabs $0x7ff8000000000000,%rax
and    %rax,%rcx
xor    %eax,%eax
movabs $0x7ff0000000000000,%rdx
cmp    %rdx,%rcx
mov    %al,-0x9(%rbp)
jne    1177 <issNaN+0x57>
movsd  -0x8(%rbp),%xmm0
call   1040 <pNaN@plt>
mov    %rax,%rcx
xor    %eax,%eax
cmp    %rcx,%rax
setl   %al
mov    %al,-0x9(%rbp)
mov    -0x9(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<issNaN>:
push   %rax
movsd  %xmm0,(%rsp)
call   1030 <double_to_long_long@plt>
cltq
movabs $0x7ff8000000000000,%rcx
and    %rax,%rcx
xor    %eax,%eax
movabs $0x7ff0000000000000,%rdx
cmp    %rdx,%rcx
jne    1160 <issNaN+0x40>
movsd  (%rsp),%xmm0
call   1040 <pNaN@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setg   %al
pop    %rcx
ret

LLVM IR (-O0):
define i32 @issNaN(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @double_to_long_long(double %3)
%5 = sext i32 %4 to i64
%6 = and i64 9221120237041090560, %5
%7 = icmp eq i64 %6, 9218868437227405312
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load double, double* %2
%10 = call i64 @pNaN(double %9)
%11 = icmp slt i64 0, %10
br label %12
12: ; preds = %8, %1
%13 = phi i1 [ false, %1 ], [ %11, %8 ]
%14 = zext i1 %13 to i32
ret i32 %14
}

LLVM IR (-O2):
define i32 @issNaN(double %0) {
%2 = tail call i32 @double_to_long_long(double %0)
%3 = sext i32 %2 to i64
%4 = and i64 %3, 9221120237041090560
%5 = icmp eq i64 %4, 9218868437227405312
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = tail call i64 @pNaN(double %0)
%8 = icmp sgt i64 %7, 0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %6, %1
%11 = phi i32 [ 0, %1 ], [ %9, %6 ]
ret i32 %11
}
/* Type definitions */
struct aFILE {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _get_actual_fp(struct aFILE *);
int /*<<< orphan*/ setlinebuf(int /*<<< orphan*/);
int my_setlinebuf(struct aFILE *fp) {
  setlinebuf(_get_actual_fp(fp));
  return 0;
}


x86 assembly (clang, -O0):
<my_setlinebuf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <_get_actual_fp@plt>
mov    %eax,%edi
call   1030 <setlinebuf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<my_setlinebuf>:
push   %rax
call   1040 <_get_actual_fp@plt>
mov    %eax,%edi
call   1030 <setlinebuf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.aFILE = type { i32 }
define i32 @my_setlinebuf(%struct.aFILE* %0) {
%2 = alloca %struct.aFILE*
store %struct.aFILE* %0, %struct.aFILE** %2
%3 = load %struct.aFILE*, %struct.aFILE** %2
%4 = call i32 @_get_actual_fp(%struct.aFILE* %3)
%5 = call i32 @setlinebuf(i32 %4)
ret i32 0
}

LLVM IR (-O2):
%struct.aFILE = type { i32 }
define i32 @my_setlinebuf(%struct.aFILE* %0) {
%2 = tail call i32 @_get_actual_fp(%struct.aFILE* %0)
%3 = tail call i32 @setlinebuf(i32 %2)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int faz() {
  printf("Hello from faz.\n");
  return 0;
}


x86 assembly (clang, -O0):
<faz>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<faz>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [17 x i8] c"Hello from faz.\0A\00"
define i32 @faz() {
%1 = call i32 @printf(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [16 x i8] c"Hello from faz.\00"
define i32 @faz() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @str, i64 0, i64 0))
ret i32 0
}
int test_imm_8Bint8_mem(signed char *val) {
  return ((*val) & (0x8B << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_8Bint8_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movsbl (%rax),%edx
and    $0x8b,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_8Bint8_mem>:
testb  $0x8b,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_8Bint8_mem(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = and i32 %5, 139
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_8Bint8_mem(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = and i8 %2, -117
%4 = icmp eq i8 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
long CHAR_BIT;
int xpow(int, long);
long get_max_by_size(long size) {
  long bits = size * CHAR_BIT;
  long max = xpow(2, bits - 1) - 1;
  return max;
}


x86 assembly (clang, -O0):
<get_max_by_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    0x2eb9(%rip),%rcx
imul   (%rcx),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
sub    $0x1,%rsi
mov    $0x2,%edi
call   1030 <xpow@plt>
sub    $0x1,%eax
cltq
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_max_by_size>:
push   %rax
mov    0x2ec8(%rip),%rax
imul   (%rax),%rdi
lea    -0x1(%rdi),%rsi
mov    $0x2,%edi
call   1030 <xpow@plt>
add    $0xffffffff,%eax
cltq
pop    %rcx
ret

LLVM IR (-O0):
@CHAR_BIT = global i64 0
define i64 @get_max_by_size(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = load i64, i64* @CHAR_BIT
%7 = mul nsw i64 %5, %6
store i64 %7, i64* %3
%8 = load i64, i64* %3
%9 = sub nsw i64 %8, 1
%10 = call i32 @xpow(i32 2, i64 %9)
%11 = sub nsw i32 %10, 1
%12 = sext i32 %11 to i64
store i64 %12, i64* %4
%13 = load i64, i64* %4
ret i64 %13
}

LLVM IR (-O2):
@CHAR_BIT = global i64 0
define i64 @get_max_by_size(i64 %0) {
%2 = load i64, i64* @CHAR_BIT
%3 = mul nsw i64 %2, %0
%4 = add nsw i64 %3, -1
%5 = tail call i32 @xpow(i32 2, i64 %4)
%6 = add nsw i32 %5, -1
%7 = sext i32 %6 to i64
ret i64 %7
}
void format_skeleton_wr_init(const char *fname) {}


x86 assembly (clang, -O0):
<format_skeleton_wr_init>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<format_skeleton_wr_init>:
ret

LLVM IR (-O0):
define void @format_skeleton_wr_init(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @format_skeleton_wr_init(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ print(char *);
int main() {
  print("Lene's first github repository");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <print@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <print@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [31 x i8] c"Lene's first github repository\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @print(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@.str = [31 x i8] c"Lene's first github repository\00"
define i32 @main() {
%1 = tail call i32 @print(i8* getelementptr inbounds ([31 x i8], [31 x i8]* @.str, i64 0, i64 0))
ret i32 0
}
void sdcard_readwrite_callback(void *priv_data, int result) {
  int *private_data = (int *)priv_data;
  private_data[1] = result;
  ((int (*)(int))0x107F6BCC)(private_data[0]);
}


x86 assembly (clang, -O0):
<sdcard_readwrite_callback>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0xc(%rbp),%ecx
mov    -0x18(%rbp),%rax
mov    %ecx,0x4(%rax)
mov    -0x18(%rbp),%rax
mov    (%rax),%edi
mov    $0x107f6bcc,%eax
call   *%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sdcard_readwrite_callback>:
mov    %esi,0x4(%rdi)
mov    (%rdi),%edi
mov    $0x107f6bcc,%eax
jmp    *%rax

LLVM IR (-O0):
define void @sdcard_readwrite_callback(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i32*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = bitcast i8* %6 to i32*
store i32* %7, i32** %5
%8 = load i32, i32* %4
%9 = load i32*, i32** %5
%10 = getelementptr inbounds i32, i32* %9, i64 1
store i32 %8, i32* %10
%11 = load i32*, i32** %5
%12 = getelementptr inbounds i32, i32* %11, i64 0
%13 = load i32, i32* %12
%14 = call i32 inttoptr (i64 276786124 to i32 (i32)*)(i32 %13)
ret void
}

LLVM IR (-O2):
define void @sdcard_readwrite_callback(i8* nocapture %0, i32 %1) {
%3 = bitcast i8* %0 to i32*
%4 = getelementptr inbounds i8, i8* %0, i64 4
%5 = bitcast i8* %4 to i32*
store i32 %1, i32* %5
%6 = load i32, i32* %3
%7 = tail call i32 inttoptr (i64 276786124 to i32 (i32)*)(i32 %6)
ret void
}
int main(void) {
#pragma omp parallel
  {
    extern void foo(void);
    foo();
  }
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
call   1030 <foo@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <foo@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
tail call void @foo()
ret i32 0
}
void acpi_amba_init(void) {}


x86 assembly (clang, -O0):
<acpi_amba_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<acpi_amba_init>:
ret

LLVM IR (-O0):
define void @acpi_amba_init() {
ret void
}

LLVM IR (-O2):
define void @acpi_amba_init() {
ret void
}
/* Type definitions */
typedef int uint8_t;
typedef int uint32_t;

/* Variables and functions */
void USBHostRequestIN(uint32_t ui32Base, uint32_t ui32Endpoint) {
  uint32_t ui32Register;
  ;

  ;
  if (ui32Endpoint == 0x00000000) {
    ui32Register = 0x00000102;
  } else {
    ui32Register = 0x00000116 + (ui32Endpoint - 0x10);
  }
  (*((volatile uint8_t *)(ui32Base + ui32Register))) = 0x00000020;
}


x86 assembly (clang, -O0):
<USBHostRequestIN>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1120 <USBHostRequestIN+0x20>
movl   $0x102,-0xc(%rbp)
jmp    112e <USBHostRequestIN+0x2e>
mov    -0x8(%rbp),%eax
sub    $0x10,%eax
add    $0x116,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
add    -0xc(%rbp),%eax
cltq
movl   $0x20,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<USBHostRequestIN>:
lea    0x106(%rsi),%eax
test   %esi,%esi
mov    $0x102,%ecx
cmovne %eax,%ecx
movslq %ecx,%rax
movslq %edi,%rcx
movl   $0x20,(%rax,%rcx,1)
ret

LLVM IR (-O0):
define void @USBHostRequestIN(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%6 = load i32, i32* %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 258, i32* %5
br label %13
9: ; preds = %2
%10 = load i32, i32* %4
%11 = sub nsw i32 %10, 16
%12 = add nsw i32 278, %11
store i32 %12, i32* %5
br label %13
13: ; preds = %9, %8
%14 = load i32, i32* %3
%15 = load i32, i32* %5
%16 = add nsw i32 %14, %15
%17 = sext i32 %16 to i64
%18 = inttoptr i64 %17 to i32*
store volatile i32 32, i32* %18
ret void
}

LLVM IR (-O2):
define void @USBHostRequestIN(i32 %0, i32 %1) {
%3 = icmp eq i32 %1, 0
%4 = add nsw i32 %1, 262
%5 = select i1 %3, i32 258, i32 %4
%6 = add nsw i32 %5, %0
%7 = sext i32 %6 to i64
%8 = inttoptr i64 %7 to i32*
store volatile i32 32, i32* %8
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void func1(int p1) {
  if (p1)
    printf("func1\n");
}


x86 assembly (clang, -O0):
<func1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     1131 <func1+0x21>
lea    0xed4(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<func1>:
test   %edi,%edi
je     1120 <func1+0x10>
lea    0xee5(%rip),%rdi
jmp    1030 <puts@plt>
ret

LLVM IR (-O0):
@.str = [7 x i8] c"func1\0A\00"
define void @func1(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp ne i32 %3, 0
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
@str = [6 x i8] c"func1\00"
define void @func1(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([6 x i8], [6 x i8]* @str, i64 0, i64 0))
br label %5
5: ; preds = %3, %1
ret void
}
int test_imm_5Dint64_lowword_mem(long long *val) {
  return ((*val) & (0x5D << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_5Dint64_lowword_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdx
and    $0x5d,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_5Dint64_lowword_mem>:
testb  $0x5d,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_5Dint64_lowword_mem(i64* %0) {
%2 = alloca i64*
store i64* %0, i64** %2
%3 = load i64*, i64** %2
%4 = load i64, i64* %3
%5 = and i64 %4, 93
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_5Dint64_lowword_mem(i64* nocapture %0) {
%2 = load i64, i64* %0
%3 = and i64 %2, 93
%4 = icmp eq i64 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
/* Variables and functions */
void *test_thread(void *v_param) { return NULL; }


x86 assembly (clang, -O0):
<test_thread>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_thread>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i8* @test_thread(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i8* null
}

LLVM IR (-O2):
define noalias i8* @test_thread(i8* nocapture readnone %0) {
ret i8* null
}
int _ipa_read_ep_reg_v2_0(char *buf, int max_len, int pipe) { return 0; }


x86 assembly (clang, -O0):
<_ipa_read_ep_reg_v2_0>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<_ipa_read_ep_reg_v2_0>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @_ipa_read_ep_reg_v2_0(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @_ipa_read_ep_reg_v2_0(i8* nocapture readnone %0, i32 %1, i32 %2) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ WriteAByte(int, int);
void PCF8563_init(void) {
  WriteAByte(0x00, 0x00);
  WriteAByte(0x01, 0x12);
}


x86 assembly (clang, -O0):
<PCF8563_init>:
push   %rbp
mov    %rsp,%rbp
xor    %esi,%esi
mov    %esi,%edi
call   1030 <WriteAByte@plt>
mov    $0x1,%edi
mov    $0x12,%esi
call   1030 <WriteAByte@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PCF8563_init>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1030 <WriteAByte@plt>
mov    $0x1,%edi
mov    $0x12,%esi
pop    %rax
jmp    1030 <WriteAByte@plt>

LLVM IR (-O0):
define void @PCF8563_init() {
%1 = call i32 @WriteAByte(i32 0, i32 0)
%2 = call i32 @WriteAByte(i32 1, i32 18)
ret void
}

LLVM IR (-O2):
define void @PCF8563_init() {
%1 = tail call i32 @WriteAByte(i32 0, i32 0)
%2 = tail call i32 @WriteAByte(i32 1, i32 18)
ret void
}
/* Type definitions */
struct channel {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ channel_send(struct channel *, int /*<<< orphan*/);
int /*<<< orphan*/ coro_yield(int /*<<< orphan*/);
void counter(void *_ch) {
  coro_yield(0);
  struct channel *ch = _ch;
  int i = 2;
  while (1) {
    channel_send(ch, i++);
  }
}


x86 assembly (clang, -O0):
<counter>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
xor    %edi,%edi
call   1030 <coro_yield@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
movl   $0x2,-0x14(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x14(%rbp),%esi
mov    %esi,%eax
add    $0x1,%eax
mov    %eax,-0x18(%rbp)
mov    %eax,-0x14(%rbp)
call   1040 <channel_send@plt>
jmp    1142 <counter+0x22>

x86 assembly (clang, -O2):
<counter>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
xor    %edi,%edi
call   1030 <coro_yield@plt>
mov    $0x2,%esi
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
lea    0x1(%rsi),%ebp
mov    %rbx,%rdi
call   1040 <channel_send@plt>
mov    %ebp,%esi
jmp    1140 <counter+0x20>

LLVM IR (-O0):
%struct.channel = type { i32 }
define void @counter(i8* %0) {
%2 = alloca i8*
%3 = alloca %struct.channel*
%4 = alloca i32
store i8* %0, i8** %2
%5 = call i32 @coro_yield(i32 0)
%6 = load i8*, i8** %2
%7 = bitcast i8* %6 to %struct.channel*
store %struct.channel* %7, %struct.channel** %3
store i32 2, i32* %4
br label %8
8: ; preds = %1, %8
%9 = load %struct.channel*, %struct.channel** %3
%10 = load i32, i32* %4
%11 = add nsw i32 %10, 1
store i32 %11, i32* %4
%12 = call i32 @channel_send(%struct.channel* %9, i32 %10)
br label %8
}

LLVM IR (-O2):
%struct.channel = type { i32 }
define void @counter(i8* %0) {
%2 = tail call i32 @coro_yield(i32 0)
%3 = bitcast i8* %0 to %struct.channel*
br label %4
4: ; preds = %4, %1
%5 = phi i32 [ 2, %1 ], [ %6, %4 ]
%6 = add nuw nsw i32 %5, 1
%7 = tail call i32 @channel_send(%struct.channel* %3, i32 %5)
br label %4
}
/* Type definitions */
struct xml_node {
  int dummy;
};
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int write_rec(struct xml_node *, int /*<<< orphan*/ *, int /*<<< orphan*/);
int xml_write_tree_file(struct xml_node *x, FILE *fp) {
  return write_rec(x, fp, 0);
}


x86 assembly (clang, -O0):
<xml_write_tree_file>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
xor    %edx,%edx
call   1030 <write_rec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xml_write_tree_file>:
xor    %edx,%edx
jmp    1030 <write_rec@plt>

LLVM IR (-O0):
%struct.xml_node = type { i32 }
define i32 @xml_write_tree_file(%struct.xml_node* %0, i32* %1) {
%3 = alloca %struct.xml_node*
%4 = alloca i32*
store %struct.xml_node* %0, %struct.xml_node** %3
store i32* %1, i32** %4
%5 = load %struct.xml_node*, %struct.xml_node** %3
%6 = load i32*, i32** %4
%7 = call i32 @write_rec(%struct.xml_node* %5, i32* %6, i32 0)
ret i32 %7
}

LLVM IR (-O2):
%struct.xml_node = type { i32 }
define i32 @xml_write_tree_file(%struct.xml_node* %0, i32* %1) {
%3 = tail call i32 @write_rec(%struct.xml_node* %0, i32* %1, i32 0)
ret i32 %3
}
unsigned xrop3_247_1_1(unsigned char s, unsigned char t) {
  unsigned D = 0x00ff;
  unsigned S = ((unsigned)s << 8) | s;
  unsigned T = ((unsigned)t << 8) | t;
  unsigned stk1;
  unsigned stk2;
  stk2 = D & S;
  stk2 = ~stk2;
  stk1 = T | stk2;
  return (stk1 & (~S) & (~T)) | (D & S) | (D & T);
}


x86 assembly (clang, -O0):
<xrop3_247_1_1>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %dil,%cl
mov    %cl,-0x1(%rbp)
mov    %al,-0x2(%rbp)
movl   $0xff,-0x8(%rbp)
movzbl -0x1(%rbp),%eax
shl    $0x8,%eax
movzbl -0x1(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
movzbl -0x2(%rbp),%eax
shl    $0x8,%eax
movzbl -0x2(%rbp),%ecx
or     %ecx,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
and    -0xc(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x18(%rbp),%eax
xor    $0xffffffff,%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
or     -0x18(%rbp),%eax
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%eax
mov    -0xc(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x10(%rbp),%ecx
xor    $0xffffffff,%ecx
and    %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0xc(%rbp),%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%ecx
and    -0x10(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xrop3_247_1_1>:
mov    %edi,%ecx
shl    $0x8,%ecx
or     %edi,%ecx
mov    %esi,%eax
shl    $0x8,%eax
or     %esi,%eax
or     %ecx,%eax
not    %eax
or     %edi,%esi
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @xrop3_247_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = alloca i8
%4 = alloca i8
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
store i8 %0, i8* %3
store i8 %1, i8* %4
store i32 255, i32* %5
%10 = load i8, i8* %3
%11 = zext i8 %10 to i32
%12 = shl i32 %11, 8
%13 = load i8, i8* %3
%14 = zext i8 %13 to i32
%15 = or i32 %12, %14
store i32 %15, i32* %6
%16 = load i8, i8* %4
%17 = zext i8 %16 to i32
%18 = shl i32 %17, 8
%19 = load i8, i8* %4
%20 = zext i8 %19 to i32
%21 = or i32 %18, %20
store i32 %21, i32* %7
%22 = load i32, i32* %5
%23 = load i32, i32* %6
%24 = and i32 %22, %23
store i32 %24, i32* %9
%25 = load i32, i32* %9
%26 = xor i32 %25, -1
store i32 %26, i32* %9
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = or i32 %27, %28
store i32 %29, i32* %8
%30 = load i32, i32* %8
%31 = load i32, i32* %6
%32 = xor i32 %31, -1
%33 = and i32 %30, %32
%34 = load i32, i32* %7
%35 = xor i32 %34, -1
%36 = and i32 %33, %35
%37 = load i32, i32* %5
%38 = load i32, i32* %6
%39 = and i32 %37, %38
%40 = or i32 %36, %39
%41 = load i32, i32* %5
%42 = load i32, i32* %7
%43 = and i32 %41, %42
%44 = or i32 %40, %43
ret i32 %44
}

LLVM IR (-O2):
define i32 @xrop3_247_1_1(i8 zeroext %0, i8 zeroext %1) {
%3 = zext i8 %0 to i32
%4 = mul nuw nsw i32 %3, 257
%5 = zext i8 %1 to i32
%6 = mul nuw nsw i32 %5, 257
%7 = or i32 %6, %4
%8 = xor i32 %7, -1
%9 = or i8 %1, %0
%10 = zext i8 %9 to i32
%11 = or i32 %10, %8
ret i32 %11
}
/* Variables and functions */
void bootloader_jump(void) {}


x86 assembly (clang, -O0):
<bootloader_jump>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bootloader_jump>:
ret

LLVM IR (-O0):
define void @bootloader_jump() {
ret void
}

LLVM IR (-O2):
define void @bootloader_jump() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delay(int);
int /*<<< orphan*/ mbus_remote_register_write(int, int, int);
void pmu_adc_disable() {
  mbus_remote_register_write(0x6, 0x3B,
                             ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) |
                              (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) |
                              (1 << 8) | (1 << 9) | (1 << 10) | (0 << 11) |
                              (0 << 12) | (0 << 13) | (1 << 14) | (1 << 15) |
                              (1 << 16) | (1 << 17) | (1 << 18) | (1 << 19)));
  delay(100);
}


x86 assembly (clang, -O0):
<pmu_adc_disable>:
push   %rbp
mov    %rsp,%rbp
mov    $0x6,%edi
mov    $0x3b,%esi
mov    $0xfc7ff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
call   1030 <delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<pmu_adc_disable>:
push   %rax
mov    $0x6,%edi
mov    $0x3b,%esi
mov    $0xfc7ff,%edx
call   1040 <mbus_remote_register_write@plt>
mov    $0x64,%edi
pop    %rax
jmp    1030 <delay@plt>

LLVM IR (-O0):
define void @pmu_adc_disable() {
%1 = call i32 @mbus_remote_register_write(i32 6, i32 59, i32 1034239)
%2 = call i32 @delay(i32 100)
ret void
}

LLVM IR (-O2):
define void @pmu_adc_disable() {
%1 = tail call i32 @mbus_remote_register_write(i32 6, i32 59, i32 1034239)
%2 = tail call i32 @delay(i32 100)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ mcp2515_set_msg(int /*<<< orphan*/, int /*<<< orphan*/,
                                   int /*<<< orphan*/ const *,
                                   int /*<<< orphan*/, int /*<<< orphan*/);
void mcp2515_set_msg_std(uint8_t tx_buf, uint32_t id, const uint8_t *data,
                         uint8_t len) {
  mcp2515_set_msg(tx_buf, id, data, len, 0);
}


x86 assembly (clang, -O0):
<mcp2515_set_msg_std>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
xor    %r8d,%r8d
call   1030 <mcp2515_set_msg@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcp2515_set_msg_std>:
xor    %r8d,%r8d
jmp    1030 <mcp2515_set_msg@plt>

LLVM IR (-O0):
define void @mcp2515_set_msg_std(i32 %0, i32 %1, i32* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32*
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32* %2, i32** %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i32, i32* %6
%11 = load i32*, i32** %7
%12 = load i32, i32* %8
%13 = call i32 @mcp2515_set_msg(i32 %9, i32 %10, i32* %11, i32 %12, i32 0)
ret void
}

LLVM IR (-O2):
define void @mcp2515_set_msg_std(i32 %0, i32 %1, i32* %2, i32 %3) {
%5 = tail call i32 @mcp2515_set_msg(i32 %0, i32 %1, i32* %2, i32 %3, i32 0)
ret void
}
/* Type definitions */
typedef scalar_t__ uint64_t;

/* Variables and functions */
bool softfloat_lt128(uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0) {
  return (a64 < b64) || ((a64 == b64) && (a0 < b0));
}


x86 assembly (clang, -O0):
<softfloat_lt128>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rcx
mov    $0x1,%al
cmp    -0x18(%rbp),%rcx
mov    %al,-0x21(%rbp)
jl     114e <softfloat_lt128+0x4e>
mov    -0x8(%rbp),%rcx
xor    %eax,%eax
cmp    -0x18(%rbp),%rcx
mov    %al,-0x22(%rbp)
jne    1148 <softfloat_lt128+0x48>
mov    -0x10(%rbp),%rax
cmp    -0x20(%rbp),%rax
setl   %al
mov    %al,-0x22(%rbp)
mov    -0x22(%rbp),%al
mov    %al,-0x21(%rbp)
mov    -0x21(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<softfloat_lt128>:
cmp    %rdx,%rdi
setl   %al
sete   %dl
cmp    %rcx,%rsi
setl   %cl
and    %dl,%cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @softfloat_lt128(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%9 = load i64, i64* %5
%10 = load i64, i64* %7
%11 = icmp slt i64 %9, %10
br i1 %11, label %22, label %12
12: ; preds = %4
%13 = load i64, i64* %5
%14 = load i64, i64* %7
%15 = icmp eq i64 %13, %14
br i1 %15, label %16, label %20
16: ; preds = %12
%17 = load i64, i64* %6
%18 = load i64, i64* %8
%19 = icmp slt i64 %17, %18
br label %20
20: ; preds = %16, %12
%21 = phi i1 [ false, %12 ], [ %19, %16 ]
br label %22
22: ; preds = %20, %4
%23 = phi i1 [ true, %4 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @softfloat_lt128(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = icmp slt i64 %0, %2
%6 = icmp eq i64 %0, %2
%7 = icmp slt i64 %1, %3
%8 = and i1 %6, %7
%9 = or i1 %5, %8
%10 = zext i1 %9 to i32
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ fatal(char *);
char *strdup_asciify(unsigned char const *, unsigned int);
char *xstrdup_asciify(const unsigned char *p, unsigned int len) {
  char *s = strdup_asciify(p, len);
  if (NULL == s)
    fatal("Out of memory");
  return s;
}


x86 assembly (clang, -O0):
<xstrdup_asciify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <strdup_asciify@plt>
mov    %rax,-0x18(%rbp)
xor    %eax,%eax
cmp    -0x18(%rbp),%rax
jne    1157 <xstrdup_asciify+0x37>
lea    0xeae(%rip),%rdi
call   1040 <fatal@plt>
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xstrdup_asciify>:
push   %rbx
call   1030 <strdup_asciify@plt>
mov    %rax,%rbx
test   %rax,%rax
jne    113a <xstrdup_asciify+0x1a>
lea    0xecb(%rip),%rdi
call   1040 <fatal@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"Out of memory\00"
define i8* @xstrdup_asciify(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
%6 = load i8*, i8** %3
%7 = load i32, i32* %4
%8 = call i8* @strdup_asciify(i8* %6, i32 %7)
store i8* %8, i8** %5
%9 = load i8*, i8** %5
%10 = icmp eq i8* null, %9
br i1 %10, label %11, label %13
11: ; preds = %2
%12 = call i32 @fatal(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %13
13: ; preds = %11, %2
%14 = load i8*, i8** %5
ret i8* %14
}

LLVM IR (-O2):
@.str = [14 x i8] c"Out of memory\00"
define i8* @xstrdup_asciify(i8* %0, i32 %1) {
%3 = tail call i8* @strdup_asciify(i8* %0, i32 %1)
%4 = icmp eq i8* %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @fatal(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
br label %7
7: ; preds = %5, %2
ret i8* %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ RawComm_LED_Toggle(int /*<<< orphan*/);
void LED_Toggle(uint8_t bitvector) { RawComm_LED_Toggle(bitvector); }


x86 assembly (clang, -O0):
<LED_Toggle>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <RawComm_LED_Toggle@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<LED_Toggle>:
jmp    1030 <RawComm_LED_Toggle@plt>

LLVM IR (-O0):
define void @LED_Toggle(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @RawComm_LED_Toggle(i32 %3)
ret void
}

LLVM IR (-O2):
define void @LED_Toggle(i32 %0) {
%2 = tail call i32 @RawComm_LED_Toggle(i32 %0)
ret void
}
double mul(double m1, double m2) { return m1 * m2; }


x86 assembly (clang, -O0):
<mul>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
mulsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<mul>:
mulsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @mul(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fmul double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @mul(double %0, double %1) {
%3 = fmul double %0, %1
ret double %3
}
/* Variables and functions */
int /*<<< orphan*/ GetPrefixValue(char const *, int);
int KMPStringMatch(char const *, int, char const *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
int KMP(const char *strPattern, int len, const char *strTarget) {
  GetPrefixValue(strPattern, len);
  return KMPStringMatch(strPattern, len, strTarget, strlen(strTarget));
}


x86 assembly (clang, -O0):
<KMP>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <GetPrefixValue@plt>
mov    -0x8(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0xc(%rbp),%eax
mov    %eax,-0x24(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1030 <strlen@plt>
mov    -0x30(%rbp),%rdi
mov    -0x24(%rbp),%esi
mov    -0x20(%rbp),%rdx
mov    %eax,%ecx
call   1050 <KMPStringMatch@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<KMP>:
push   %rbp
push   %r14
push   %rbx
mov    %rdx,%r14
mov    %esi,%ebp
mov    %rdi,%rbx
call   1040 <GetPrefixValue@plt>
mov    %r14,%rdi
call   1030 <strlen@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
mov    %r14,%rdx
mov    %eax,%ecx
pop    %rbx
pop    %r14
pop    %rbp
jmp    1050 <KMPStringMatch@plt>

LLVM IR (-O0):
define i32 @KMP(i8* %0, i32 %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i8*, i8** %4
%8 = load i32, i32* %5
%9 = call i32 @GetPrefixValue(i8* %7, i32 %8)
%10 = load i8*, i8** %4
%11 = load i32, i32* %5
%12 = load i8*, i8** %6
%13 = load i8*, i8** %6
%14 = call i32 @strlen(i8* %13)
%15 = call i32 @KMPStringMatch(i8* %10, i32 %11, i8* %12, i32 %14)
ret i32 %15
}

LLVM IR (-O2):
define i32 @KMP(i8* %0, i32 %1, i8* %2) {
%4 = tail call i32 @GetPrefixValue(i8* %0, i32 %1)
%5 = tail call i32 @strlen(i8* %2)
%6 = tail call i32 @KMPStringMatch(i8* %0, i32 %1, i8* %2, i32 %5)
ret i32 %6
}
void RTSystemQueryDmiString(void) {}


x86 assembly (clang, -O0):
<RTSystemQueryDmiString>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTSystemQueryDmiString>:
ret

LLVM IR (-O0):
define void @RTSystemQueryDmiString() {
ret void
}

LLVM IR (-O2):
define void @RTSystemQueryDmiString() {
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef int /*<<< orphan*/ uint16_t;
struct serializer {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ s_wb16(struct serializer *, int /*<<< orphan*/);
void s_wb32(struct serializer *s, uint32_t u32) {
  s_wb16(s, (uint16_t)(u32 >> 16));
  s_wb16(s, (uint16_t)u32);
  return;
}


x86 assembly (clang, -O0):
<s_wb32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
sar    $0x10,%esi
call   1030 <s_wb16@plt>
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <s_wb16@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<s_wb32>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    %rdi,%rbx
sar    $0x10,%esi
call   1030 <s_wb16@plt>
mov    %rbx,%rdi
mov    %ebp,%esi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <s_wb16@plt>

LLVM IR (-O0):
%struct.serializer = type { i32 }
define void @s_wb32(%struct.serializer* %0, i32 %1) {
%3 = alloca %struct.serializer*
%4 = alloca i32
store %struct.serializer* %0, %struct.serializer** %3
store i32 %1, i32* %4
%5 = load %struct.serializer*, %struct.serializer** %3
%6 = load i32, i32* %4
%7 = ashr i32 %6, 16
%8 = call i32 @s_wb16(%struct.serializer* %5, i32 %7)
%9 = load %struct.serializer*, %struct.serializer** %3
%10 = load i32, i32* %4
%11 = call i32 @s_wb16(%struct.serializer* %9, i32 %10)
ret void
}

LLVM IR (-O2):
%struct.serializer = type { i32 }
define void @s_wb32(%struct.serializer* %0, i32 %1) {
%3 = ashr i32 %1, 16
%4 = tail call i32 @s_wb16(%struct.serializer* %0, i32 %3)
%5 = tail call i32 @s_wb16(%struct.serializer* %0, i32 %1)
ret void
}
/* Variables and functions */
scalar_t__ calloc(int, int);
void *GC_malloc(int x) {
  void *p = (void *)calloc(sizeof(char), x);
  return p;
}


x86 assembly (clang, -O0):
<GC_malloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x1,%edi
call   1030 <calloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<GC_malloc>:
mov    %edi,%esi
mov    $0x1,%edi
jmp    1030 <calloc@plt>

LLVM IR (-O0):
define i8* @GC_malloc(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i64 @calloc(i32 1, i32 %4)
%6 = inttoptr i64 %5 to i8*
store i8* %6, i8** %3
%7 = load i8*, i8** %3
ret i8* %7
}

LLVM IR (-O2):
define i8* @GC_malloc(i32 %0) {
%2 = tail call i64 @calloc(i32 1, i32 %0)
%3 = inttoptr i64 %2 to i8*
ret i8* %3
}
char const *vl_get_version_string() { return "0.9.8"; }


x86 assembly (clang, -O0):
<vl_get_version_string>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<vl_get_version_string>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@.str = [6 x i8] c"0.9.8\00"
define i8* @vl_get_version_string() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}

LLVM IR (-O2):
@.str = [6 x i8] c"0.9.8\00"
define i8* @vl_get_version_string() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int get_balance_policy(int /*<<< orphan*/, int, int /*<<< orphan*/ *);
int /*<<< orphan*/ pp0_node_to_cpu(int /*<<< orphan*/);
int get_pp0_balance_policy(uint64_t node, uint64_t *priority_level) {
  uint64_t cpu = pp0_node_to_cpu(node);
  return get_balance_policy(cpu, 0x63a, priority_level);
}


x86 assembly (clang, -O0):
<get_pp0_balance_policy>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <pp0_node_to_cpu@plt>
mov    %eax,-0x14(%rbp)
mov    -0x14(%rbp),%edi
mov    -0x10(%rbp),%rdx
mov    $0x63a,%esi
call   1030 <get_balance_policy@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_pp0_balance_policy>:
push   %rbx
mov    %rsi,%rbx
call   1040 <pp0_node_to_cpu@plt>
mov    %eax,%edi
mov    $0x63a,%esi
mov    %rbx,%rdx
pop    %rbx
jmp    1030 <get_balance_policy@plt>

LLVM IR (-O0):
define i32 @get_pp0_balance_policy(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
%6 = load i32, i32* %3
%7 = call i32 @pp0_node_to_cpu(i32 %6)
store i32 %7, i32* %5
%8 = load i32, i32* %5
%9 = load i32*, i32** %4
%10 = call i32 @get_balance_policy(i32 %8, i32 1594, i32* %9)
ret i32 %10
}

LLVM IR (-O2):
define i32 @get_pp0_balance_policy(i32 %0, i32* %1) {
%3 = tail call i32 @pp0_node_to_cpu(i32 %0)
%4 = tail call i32 @get_balance_policy(i32 %3, i32 1594, i32* %1)
ret i32 %4
}
/* Variables and functions */
void *realloc(void **, size_t);
int expand_column(void **column, size_t new_max_rows, size_t element_size) {
  int ret = 0;
  void *tmp;
  tmp = realloc((void **)*column, new_max_rows * element_size);
  if (tmp == NULL) {
    ret = -2;
    goto out;
  }
  *column = tmp;
out:
  return ret;
}


x86 assembly (clang, -O0):
<expand_column>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    -0x10(%rbp),%rsi
imul   -0x18(%rbp),%rsi
call   1030 <realloc@plt>
mov    %rax,-0x28(%rbp)
cmpq   $0x0,-0x28(%rbp)
jne    115b <expand_column+0x4b>
movl   $0xfffffffe,-0x1c(%rbp)
jmp    1166 <expand_column+0x56>
mov    -0x28(%rbp),%rcx
mov    -0x8(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x1c(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<expand_column>:
push   %rbx
mov    %rdi,%rbx
mov    (%rdi),%rdi
imul   %rdx,%rsi
call   1030 <realloc@plt>
test   %rax,%rax
je     112c <expand_column+0x1c>
mov    %rax,(%rbx)
xor    %eax,%eax
pop    %rbx
ret
mov    $0xfffffffe,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @expand_column(i8** %0, i64 %1, i64 %2) {
%4 = alloca i8**
%5 = alloca i64
%6 = alloca i64
%7 = alloca i32
%8 = alloca i8*
store i8** %0, i8*** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
store i32 0, i32* %7
%9 = load i8**, i8*** %4
%10 = load i8*, i8** %9
%11 = bitcast i8* %10 to i8**
%12 = load i64, i64* %5
%13 = load i64, i64* %6
%14 = mul i64 %12, %13
%15 = call i8* @realloc(i8** %11, i64 %14)
store i8* %15, i8** %8
%16 = load i8*, i8** %8
%17 = icmp eq i8* %16, null
br i1 %17, label %18, label %19
18: ; preds = %3
store i32 -2, i32* %7
br label %22
19: ; preds = %3
%20 = load i8*, i8** %8
%21 = load i8**, i8*** %4
store i8* %20, i8** %21
br label %22
22: ; preds = %19, %18
%23 = load i32, i32* %7
ret i32 %23
}

LLVM IR (-O2):
define i32 @expand_column(i8** nocapture %0, i64 %1, i64 %2) {
%4 = bitcast i8** %0 to i8***
%5 = load i8**, i8*** %4
%6 = mul i64 %2, %1
%7 = tail call i8* @realloc(i8** %5, i64 %6)
%8 = icmp eq i8* %7, null
br i1 %8, label %10, label %9
9: ; preds = %3
store i8* %7, i8** %0
br label %10
10: ; preds = %3, %9
%11 = phi i32 [ 0, %9 ], [ -2, %3 ]
ret i32 %11
}
int mat_elem(int *mat[], int ncols, int row, int col) {
  return (int)*(((int *)mat + row * ncols) + col);
}


x86 assembly (clang, -O0):
<mat_elem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%ecx
imul   -0xc(%rbp),%ecx
movslq %ecx,%rcx
shl    $0x2,%rcx
add    %rcx,%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mat_elem>:
imul   %edx,%esi
movslq %esi,%rax
lea    (%rdi,%rax,4),%rax
movslq %ecx,%rcx
mov    (%rax,%rcx,4),%eax
ret

LLVM IR (-O0):
define i32 @mat_elem(i32** %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32**
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32** %0, i32*** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32**, i32*** %5
%10 = bitcast i32** %9 to i32*
%11 = load i32, i32* %7
%12 = load i32, i32* %6
%13 = mul nsw i32 %11, %12
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i32, i32* %10, i64 %14
%16 = load i32, i32* %8
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32, i32* %15, i64 %17
%19 = load i32, i32* %18
ret i32 %19
}

LLVM IR (-O2):
define i32 @mat_elem(i32** nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = bitcast i32** %0 to i32*
%6 = mul nsw i32 %2, %1
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %5, i64 %7
%9 = sext i32 %3 to i64
%10 = getelementptr inbounds i32, i32* %8, i64 %9
%11 = load i32, i32* %10
ret i32 %11
}
unsigned int RTP_get_slicenum(unsigned char *p) {
  return (((unsigned int)p[18]) << 8) + (unsigned int)p[19];
}


x86 assembly (clang, -O0):
<RTP_get_slicenum>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl 0x12(%rax),%eax
shl    $0x8,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x13(%rcx),%ecx
add    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<RTP_get_slicenum>:
movzwl 0x12(%rdi),%eax
shl    $0x10,%eax
bswap  %eax
ret

LLVM IR (-O0):
define i32 @RTP_get_slicenum(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 18
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl i32 %6, 8
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 19
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = add i32 %7, %11
ret i32 %12
}

LLVM IR (-O2):
define i32 @RTP_get_slicenum(i8* nocapture %0) {
%2 = getelementptr inbounds i8, i8* %0, i64 18
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = shl nuw nsw i32 %4, 8
%6 = getelementptr inbounds i8, i8* %0, i64 19
%7 = load i8, i8* %6
%8 = zext i8 %7 to i32
%9 = or i32 %5, %8
ret i32 %9
}
void SubtractPolyn(struct node *head1, struct node *hea2d2) {}


x86 assembly (clang, -O0):
<SubtractPolyn>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SubtractPolyn>:
ret

LLVM IR (-O0):
%struct.node = type opaque
define void @SubtractPolyn(%struct.node* %0, %struct.node* %1) {
%3 = alloca %struct.node*
%4 = alloca %struct.node*
store %struct.node* %0, %struct.node** %3
store %struct.node* %1, %struct.node** %4
ret void
}

LLVM IR (-O2):
%struct.node = type opaque
define void @SubtractPolyn(%struct.node* nocapture %0, %struct.node* nocapture %1) {
ret void
}
unsigned long has_zero(unsigned long a) {
  return ((a - ((~0ul / 0xff) * (0x01))) & ~a) & ((~0ul / 0xff) * (0x80));
}


x86 assembly (clang, -O0):
<has_zero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movabs $0x101010101010101,%rcx
01 01 01
sub    %rcx,%rax
mov    -0x8(%rbp),%rcx
xor    $0xffffffffffffffff,%rcx
and    %rcx,%rax
movabs $0x8080808080808080,%rcx
80 80 80
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_zero>:
movabs $0xfefefefefefefeff,%rcx
fe fe fe
add    %rdi,%rcx
not    %rdi
movabs $0x8080808080808080,%rax
80 80 80
and    %rdi,%rax
and    %rcx,%rax
ret

LLVM IR (-O0):
define i64 @has_zero(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = sub i64 %3, 72340172838076673
%5 = load i64, i64* %2
%6 = xor i64 %5, -1
%7 = and i64 %4, %6
%8 = and i64 %7, -9187201950435737472
ret i64 %8
}

LLVM IR (-O2):
define i64 @has_zero(i64 %0) {
%2 = add i64 %0, -72340172838076673
%3 = and i64 %0, -9187201950435737472
%4 = xor i64 %3, -9187201950435737472
%5 = and i64 %4, %2
ret i64 %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *, ...);
int /*<<< orphan*/ stderr;
void errorHandler(char errorText[]) {
  fprintf(stderr, "\n%s\n", errorText);
  fprintf(stderr, "\n*** PROGRAM TERMINATED ***\n\n");
  exit(1);
}


x86 assembly (clang, -O0):
<errorHandler>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    0x2ead(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rdx
lea    0xec0(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    0x2e92(%rip),%rax
mov    (%rax),%edi
lea    0xeae(%rip),%rsi
mov    $0x0,%al
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<errorHandler>:
push   %rbx
mov    %rdi,%rdx
mov    0x2eb5(%rip),%rbx
mov    (%rbx),%edi
lea    0xecc(%rip),%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    (%rbx),%edi
lea    0xec1(%rip),%rsi
xor    %eax,%eax
call   1030 <fprintf@plt>
mov    $0x1,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@stderr = global i32 0
@.str = [5 x i8] c"\0A%s\0A\00"
@.str.1 = [30 x i8] c"\0A*** PROGRAM TERMINATED ***\0A\0A\00"
define void @errorHandler(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i32, i32* @stderr
%4 = load i8*, i8** %2
%5 = call i32 (i32, i8*, ...) @fprintf(i32 %3, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i32, i32* @stderr
%7 = call i32 (i32, i8*, ...) @fprintf(i32 %6, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
%8 = call i32 @exit(i32 1)
unreachable
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [5 x i8] c"\0A%s\0A\00"
@.str.1 = [30 x i8] c"\0A*** PROGRAM TERMINATED ***\0A\0A\00"
define void @errorHandler(i8* %0) {
%2 = load i32, i32* @stderr
%3 = tail call i32 (i32, i8*, ...) @fprintf(i32 %2, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %0)
%4 = load i32, i32* @stderr
%5 = tail call i32 (i32, i8*, ...) @fprintf(i32 %4, i8* getelementptr inbounds ([30 x i8], [30 x i8]* @.str.1, i64 0, i64 0))
%6 = tail call i32 @exit(i32 1)
unreachable
}
const char *LZG_VersionString(void) {
  static const char *verStr = "1.0.6";
  return verStr;
}


x86 assembly (clang, -O0):
<LZG_VersionString>:
push   %rbp
mov    %rsp,%rbp
mov    0x2f15(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LZG_VersionString>:
lea    0xef9(%rip),%rax
ret

LLVM IR (-O0):
@LZG_VersionString.verStr = internal global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0)
@.str = [6 x i8] c"1.0.6\00"
define i8* @LZG_VersionString() {
%1 = load i8*, i8** @LZG_VersionString.verStr
ret i8* %1
}

LLVM IR (-O2):
@.str = [6 x i8] c"1.0.6\00"
define i8* @LZG_VersionString() {
ret i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0)
}