xunge/DecIR huggingface dataset:
void foo(volatile int *v, const char **ptrs) {
  switch (*v & 1) {
  case 0:
    ptrs[0] = 0;
    break;
  case 1:
    break;
  default:
    ptrs[1] = "Some text";
    break;
  }
  while (*v > 0)
    *v -= 1;
}


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
and    $0x1,%eax
mov    %eax,-0x14(%rbp)
je     1134 <foo+0x34>
jmp    1123 <foo+0x23>
mov    -0x14(%rbp),%eax
sub    $0x1,%eax
je     1144 <foo+0x44>
jmp    1149 <foo+0x49>
mov    -0x10(%rbp),%rax
movq   $0x0,(%rax)
jmp    1158 <foo+0x58>
jmp    1158 <foo+0x58>
mov    -0x10(%rbp),%rax
lea    0xeac(%rip),%rcx
mov    %rcx,0x8(%rax)
jmp    115d <foo+0x5d>
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
cmp    $0x0,%eax
jle    117c <foo+0x7c>
mov    -0x8(%rbp),%rax
mov    (%rax),%ecx
sub    $0x1,%ecx
mov    %ecx,(%rax)
jmp    115d <foo+0x5d>
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    (%rdi),%eax
test   $0x1,%al
jne    1113 <foo+0x13>
movq   $0x0,(%rsi)
jmp    1113 <foo+0x13>
nop
addl   $0xffffffff,(%rdi)
cmpl   $0x0,(%rdi)
jg     1110 <foo+0x10>
ret

LLVM IR (-O0):
@.str = [10 x i8] c"Some text\00"
define void @foo(i32* %0, i8** %1) {
%3 = alloca i32*
%4 = alloca i8**
store i32* %0, i32** %3
store i8** %1, i8*** %4
%5 = load i32*, i32** %3
%6 = load volatile i32, i32* %5
%7 = and i32 %6, 1
switch i32 %7, label %12 [
i32 0, label %8
i32 1, label %11
]
8: ; preds = %2
%9 = load i8**, i8*** %4
%10 = getelementptr inbounds i8*, i8** %9, i64 0
store i8* null, i8** %10
br label %15
11: ; preds = %2
br label %15
12: ; preds = %2
%13 = load i8**, i8*** %4
%14 = getelementptr inbounds i8*, i8** %13, i64 1
store i8* getelementptr inbounds ([10 x i8], [10 x i8]* @.str, i64 0, i64 0), i8** %14
br label %15
15: ; preds = %12, %11, %8
br label %16
16: ; preds = %20, %15
%17 = load i32*, i32** %3
%18 = load volatile i32, i32* %17
%19 = icmp sgt i32 %18, 0
br i1 %19, label %20, label %24
20: ; preds = %16
%21 = load i32*, i32** %3
%22 = load volatile i32, i32* %21
%23 = sub nsw i32 %22, 1
store volatile i32 %23, i32* %21
br label %16
24: ; preds = %16
ret void
}

LLVM IR (-O2):
define void @foo(i32* %0, i8** nocapture writeonly %1) {
%3 = load volatile i32, i32* %0
%4 = and i32 %3, 1
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %2
store i8* null, i8** %1
br label %7
7: ; preds = %2, %6
%8 = load volatile i32, i32* %0
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %15
10: ; preds = %7, %10
%11 = load volatile i32, i32* %0
%12 = add nsw i32 %11, -1
store volatile i32 %12, i32* %0
%13 = load volatile i32, i32* %0
%14 = icmp sgt i32 %13, 0
br i1 %14, label %10, label %15
15: ; preds = %10, %7
ret void
}
int test_imm_EAuint8_reg(unsigned char val) {
  return ((val) & (-0xEA << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_EAuint8_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edx
and    $0xffffff16,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_EAuint8_reg>:
test   $0x16,%dil
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_EAuint8_reg(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = zext i8 %3 to i32
%5 = and i32 %4, -234
%6 = icmp ne i32 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_EAuint8_reg(i8 zeroext %0) {
%2 = and i8 %0, 22
%3 = icmp eq i8 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
void av_sha512_alloc() {}


x86 assembly (clang, -O0):
<av_sha512_alloc>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_sha512_alloc>:
ret

LLVM IR (-O0):
define void @av_sha512_alloc() {
ret void
}

LLVM IR (-O2):
define void @av_sha512_alloc() {
ret void
}
void SetCPUSpeed(int freq) {}


x86 assembly (clang, -O0):
<SetCPUSpeed>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<SetCPUSpeed>:
ret

LLVM IR (-O0):
define void @SetCPUSpeed(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @SetCPUSpeed(i32 %0) {
ret void
}
/* Type definitions */
struct list {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ list_free_list_and_data(struct list *, int /*<<< orphan*/ *);
void list_free_list(struct list *list) { list_free_list_and_data(list, NULL); }


x86 assembly (clang, -O0):
<list_free_list>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
call   1030 <list_free_list_and_data@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<list_free_list>:
xor    %esi,%esi
jmp    1030 <list_free_list_and_data@plt>

LLVM IR (-O0):
%struct.list = type { i32 }
define void @list_free_list(%struct.list* %0) {
%2 = alloca %struct.list*
store %struct.list* %0, %struct.list** %2
%3 = load %struct.list*, %struct.list** %2
%4 = call i32 @list_free_list_and_data(%struct.list* %3, i32* null)
ret void
}

LLVM IR (-O2):
%struct.list = type { i32 }
define void @list_free_list(%struct.list* %0) {
%2 = tail call i32 @list_free_list_and_data(%struct.list* %0, i32* null)
ret void
}
/* Type definitions */
struct item {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ _item_link(struct item *);
int /*<<< orphan*/ _item_unlink(struct item *);
void _item_replace(struct item *it, struct item *nit) {
  ;
  ;
  ;
  ;

  ;
  _item_unlink(it);
  _item_link(nit);
}


x86 assembly (clang, -O0):
<_item_replace>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <_item_unlink@plt>
mov    -0x10(%rbp),%rdi
call   1030 <_item_link@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_item_replace>:
push   %rbx
mov    %rsi,%rbx
call   1040 <_item_unlink@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1030 <_item_link@plt>

LLVM IR (-O0):
%struct.item = type { i32 }
define void @_item_replace(%struct.item* %0, %struct.item* %1) {
%3 = alloca %struct.item*
%4 = alloca %struct.item*
store %struct.item* %0, %struct.item** %3
store %struct.item* %1, %struct.item** %4
%5 = load %struct.item*, %struct.item** %3
%6 = call i32 @_item_unlink(%struct.item* %5)
%7 = load %struct.item*, %struct.item** %4
%8 = call i32 @_item_link(%struct.item* %7)
ret void
}

LLVM IR (-O2):
%struct.item = type { i32 }
define void @_item_replace(%struct.item* %0, %struct.item* %1) {
%3 = tail call i32 @_item_unlink(%struct.item* %0)
%4 = tail call i32 @_item_link(%struct.item* %1)
ret void
}
int ft_isalnum(int c) {
  if ((c >= 48 && c <= 57) || (c >= 65 && c <= 90) || (c >= 97 && c <= 'z'))
    return (1);
  return (0);
}


x86 assembly (clang, -O0):
<ft_isalnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x30,-0x8(%rbp)
jl     111b <ft_isalnum+0x1b>
cmpl   $0x39,-0x8(%rbp)
jle    1143 <ft_isalnum+0x43>
cmpl   $0x41,-0x8(%rbp)
jl     112f <ft_isalnum+0x2f>
cmpl   $0x5a,-0x8(%rbp)
jle    1143 <ft_isalnum+0x43>
cmpl   $0x61,-0x8(%rbp)
jl     114f <ft_isalnum+0x4f>
cmpl   $0x7a,-0x8(%rbp)
jg     114f <ft_isalnum+0x4f>
movl   $0x1,-0x4(%rbp)
jmp    1156 <ft_isalnum+0x56>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalnum>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%eax
setb   %al
and    $0xffffffdf,%edi
add    $0xffffffbf,%edi
cmp    $0x1a,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ft_isalnum(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, i32* %3
%8 = icmp sle i32 %7, 57
br i1 %8, label %21, label %9
9: ; preds = %6, %1
%10 = load i32, i32* %3
%11 = icmp sge i32 %10, 65
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load i32, i32* %3
%14 = icmp sle i32 %13, 90
br i1 %14, label %21, label %15
15: ; preds = %12, %9
%16 = load i32, i32* %3
%17 = icmp sge i32 %16, 97
br i1 %17, label %18, label %22
18: ; preds = %15
%19 = load i32, i32* %3
%20 = icmp sle i32 %19, 122
br i1 %20, label %21, label %22
21: ; preds = %18, %12, %6
store i32 1, i32* %2
br label %23
22: ; preds = %18, %15
store i32 0, i32* %2
br label %23
23: ; preds = %22, %21
%24 = load i32, i32* %2
ret i32 %24
}

LLVM IR (-O2):
define i32 @ft_isalnum(i32 %0) {
%2 = add i32 %0, -48
%3 = icmp ult i32 %2, 10
%4 = and i32 %0, -33
%5 = add i32 %4, -65
%6 = icmp ult i32 %5, 26
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main() {
  int p;
  p = 12;
  p < 1;
  printf("%d", p);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0xc,-0x8(%rbp)
mov    -0x8(%rbp),%esi
lea    0xed0(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0xc,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
store i32 12, i32* %2
%3 = load i32, i32* %2
%4 = icmp slt i32 %3, 1
%5 = zext i1 %4 to i32
%6 = load i32, i32* %2
%7 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %6)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 12)
ret i32 0
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ pwrite(int, int /*<<< orphan*/ *, int, int /*<<< orphan*/);
void write_byte(int fd, uint32_t pos, uint8_t value) {
  pwrite(fd, &value, 1, pos);
}


x86 assembly (clang, -O0):
<write_byte>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%ecx
lea    -0xc(%rbp),%rsi
mov    $0x1,%edx
call   1030 <pwrite@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<write_byte>:
push   %rax
mov    %esi,%ecx
mov    %edx,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x1,%edx
call   1030 <pwrite@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @write_byte(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = call i32 @pwrite(i32 %7, i32* %6, i32 1, i32 %8)
ret void
}

LLVM IR (-O2):
define void @write_byte(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
store i32 %2, i32* %4
%5 = call i32 @pwrite(i32 %0, i32* %4, i32 1, i32 %1)
ret void
}
/* Type definitions */
typedef int GLint;
typedef int GLenum;

/* Variables and functions */
#define GL_MAP1_COLOR_4 136
#define GL_MAP1_INDEX 135
#define GL_MAP1_NORMAL 134
#define GL_MAP1_TEXTURE_COORD_1 133
#define GL_MAP1_TEXTURE_COORD_2 132
#define GL_MAP1_TEXTURE_COORD_3 131
#define GL_MAP1_TEXTURE_COORD_4 130
#define GL_MAP1_VERTEX_3 129
#define GL_MAP1_VERTEX_4 128
__attribute__((visibility("internal"))) __attribute__((pure)) GLint
__glMap1d_size(GLenum e) {
  switch (e) {
  case GL_MAP1_INDEX:
  case GL_MAP1_TEXTURE_COORD_1:
    return 1;
  case GL_MAP1_TEXTURE_COORD_2:
    return 2;
  case GL_MAP1_NORMAL:
  case GL_MAP1_TEXTURE_COORD_3:
  case GL_MAP1_VERTEX_3:
    return 3;
  case GL_MAP1_COLOR_4:
  case GL_MAP1_TEXTURE_COORD_4:
  case GL_MAP1_VERTEX_4:
    return 4;
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<__glMap1d_size>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0xffffff80,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x8,%eax
ja     1160 <__glMap1d_size+0x60>
mov    -0x10(%rbp),%rax
lea    0xed9(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    1167 <__glMap1d_size+0x67>
movl   $0x2,-0x4(%rbp)
jmp    1167 <__glMap1d_size+0x67>
movl   $0x3,-0x4(%rbp)
jmp    1167 <__glMap1d_size+0x67>
movl   $0x4,-0x4(%rbp)
jmp    1167 <__glMap1d_size+0x67>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<__glMap1d_size>:
add    $0xffffff80,%edi
xor    %eax,%eax
cmp    $0x8,%edi
ja     1117 <__glMap1d_size+0x17>
movslq %edi,%rax
lea    0xeec(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret

LLVM IR (-O0):
define hidden i32 @__glMap1d_size(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %9 [
i32 135, label %5
i32 133, label %5
i32 132, label %6
i32 134, label %7
i32 131, label %7
i32 129, label %7
i32 136, label %8
i32 130, label %8
i32 128, label %8
]
5: ; preds = %1, %1
store i32 1, i32* %2
br label %10
6: ; preds = %1
store i32 2, i32* %2
br label %10
7: ; preds = %1, %1, %1
store i32 3, i32* %2
br label %10
8: ; preds = %1, %1, %1
store i32 4, i32* %2
br label %10
9: ; preds = %1
store i32 0, i32* %2
br label %10
10: ; preds = %9, %8, %7, %6, %5
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
@switch.table.__glMap1d_size = [9 x i32] [i32 4, i32 3, i32 4, i32 3, i32 2, i32 1, i32 3, i32 1, i32 4]
define hidden i32 @__glMap1d_size(i32 %0) {
%2 = add i32 %0, -128
%3 = icmp ult i32 %2, 9
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = sext i32 %2 to i64
%6 = getelementptr inbounds [9 x i32], [9 x i32]* @switch.table.__glMap1d_size, i64 0, i64 %5
%7 = load i32, i32* %6
br label %8
8: ; preds = %1, %4
%9 = phi i32 [ %7, %4 ], [ 0, %1 ]
ret i32 %9
}
int test_imm_18uint16_mem(unsigned short *val) {
  return ((*val) & (0x18 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_18uint16_mem>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzwl (%rax),%edx
and    $0x18,%edx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%edx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_18uint16_mem>:
testb  $0x18,(%rdi)
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_18uint16_mem(i16* %0) {
%2 = alloca i16*
store i16* %0, i16** %2
%3 = load i16*, i16** %2
%4 = load i16, i16* %3
%5 = zext i16 %4 to i32
%6 = and i32 %5, 24
%7 = icmp ne i32 %6, 0
%8 = zext i1 %7 to i64
%9 = select i1 %7, i32 -20, i32 -40
ret i32 %9
}

LLVM IR (-O2):
define i32 @test_imm_18uint16_mem(i16* nocapture %0) {
%2 = load i16, i16* %0
%3 = and i16 %2, 24
%4 = icmp eq i16 %3, 0
%5 = select i1 %4, i32 -40, i32 -20
ret i32 %5
}
val_mand(nm, ex, tt, cc) int *nm, *ex, *tt, cc;
{
  xtr_name(nm, cc);
  val_ext(ex, cc);
  val_type(tt, cc);
}


x86 assembly (clang, -O0):
<val_mand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %ecx,-0x24(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x24(%rbp),%esi
mov    $0x0,%al
call   1040 <xtr_name@plt>
mov    -0x18(%rbp),%rdi
mov    -0x24(%rbp),%esi
mov    $0x0,%al
call   1030 <val_ext@plt>
mov    -0x20(%rbp),%rdi
mov    -0x24(%rbp),%esi
mov    $0x0,%al
call   1050 <val_type@plt>
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<val_mand>:
push   %r15
push   %r14
push   %rbx
mov    %ecx,%ebx
mov    %rdx,%r14
mov    %rsi,%r15
mov    %ecx,%esi
xor    %eax,%eax
call   1040 <xtr_name@plt>
mov    %r15,%rdi
mov    %ebx,%esi
xor    %eax,%eax
call   1030 <val_ext@plt>
mov    %r14,%rdi
mov    %ebx,%esi
xor    %eax,%eax
pop    %rbx
pop    %r14
pop    %r15
jmp    1050 <val_type@plt>

LLVM IR (-O0):
define i32 @val_mand(i32* %0, i32* %1, i32* %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32
store i32* %0, i32** %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i32 %3, i32* %9
%10 = load i32*, i32** %6
%11 = load i32, i32* %9
%12 = call i32 (i32*, i32, ...) bitcast (i32 (...)* @xtr_name to i32 (i32*, i32, ...)*)(i32* %10, i32 %11)
%13 = load i32*, i32** %7
%14 = load i32, i32* %9
%15 = call i32 (i32*, i32, ...) bitcast (i32 (...)* @val_ext to i32 (i32*, i32, ...)*)(i32* %13, i32 %14)
%16 = load i32*, i32** %8
%17 = load i32, i32* %9
%18 = call i32 (i32*, i32, ...) bitcast (i32 (...)* @val_type to i32 (i32*, i32, ...)*)(i32* %16, i32 %17)
%19 = load i32, i32* %5
ret i32 %19
}

LLVM IR (-O2):
define i32 @val_mand(i32* %0, i32* %1, i32* %2, i32 %3) {
%5 = tail call i32 (i32*, i32, ...) bitcast (i32 (...)* @xtr_name to i32 (i32*, i32, ...)*)(i32* %0, i32 %3)
%6 = tail call i32 (i32*, i32, ...) bitcast (i32 (...)* @val_ext to i32 (i32*, i32, ...)*)(i32* %1, i32 %3)
%7 = tail call i32 (i32*, i32, ...) bitcast (i32 (...)* @val_type to i32 (i32*, i32, ...)*)(i32* %2, i32 %3)
ret i32 undef
}
char *BcdToStr(bcdc)
char bcdc;
{
  char *r;
  r = BcdToStr0(bcdc);
  if (*r == '0')
    *r = ' ';
  return (r);
}


x86 assembly (clang, -O0):
<BcdToStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
mov    $0x0,%al
call   1030 <BcdToStr0@plt>
cltq
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
cmp    $0x30,%eax
jne    1146 <BcdToStr+0x36>
mov    -0x10(%rbp),%rax
movb   $0x20,(%rax)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<BcdToStr>:
push   %rax
movsbl %dil,%edi
xor    %eax,%eax
call   1030 <BcdToStr0@plt>
cltq
cmpb   $0x30,(%rax)
jne    1126 <BcdToStr+0x16>
movb   $0x20,(%rax)
pop    %rcx
ret

LLVM IR (-O0):
define i8* @BcdToStr(i32 %0) {
%2 = alloca i8
%3 = alloca i8*
%4 = trunc i32 %0 to i8
store i8 %4, i8* %2
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = call i32 (i32, ...) bitcast (i32 (...)* @BcdToStr0 to i32 (i32, ...)*)(i32 %6)
%8 = sext i32 %7 to i64
%9 = inttoptr i64 %8 to i8*
store i8* %9, i8** %3
%10 = load i8*, i8** %3
%11 = load i8, i8* %10
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 48
br i1 %13, label %14, label %16
14: ; preds = %1
%15 = load i8*, i8** %3
store i8 32, i8* %15
br label %16
16: ; preds = %14, %1
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
define i8* @BcdToStr(i32 %0) {
%2 = shl i32 %0, 24
%3 = ashr exact i32 %2, 24
%4 = tail call i32 (i32, ...) bitcast (i32 (...)* @BcdToStr0 to i32 (i32, ...)*)(i32 %3)
%5 = sext i32 %4 to i64
%6 = inttoptr i64 %5 to i8*
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 48
br i1 %8, label %9, label %10
9: ; preds = %1
store i8 32, i8* %6
br label %10
10: ; preds = %9, %1
ret i8* %6
}
/* Variables and functions */
int /*<<< orphan*/ printid(float);
float rand();
void main() {
  int i;
  float r;
  for (i = 0; i < 10; i++) {
    r = rand();
    printid(r);
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    115d <main+0x3d>
mov    $0x0,%al
call   1040 <rand@plt>
movss  %xmm0,-0x8(%rbp)
movss  -0x8(%rbp),%xmm0
call   1030 <printid@plt>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    112f <main+0xf>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <rand@plt>
call   1030 <printid@plt>
xor    %eax,%eax
call   1040 <rand@plt>
call   1030 <printid@plt>
xor    %eax,%eax
call   1040 <rand@plt>
call   1030 <printid@plt>
xor    %eax,%eax
call   1040 <rand@plt>
call   1030 <printid@plt>
xor    %eax,%eax
call   1040 <rand@plt>
call   1030 <printid@plt>
xor    %eax,%eax
call   1040 <rand@plt>
call   1030 <printid@plt>
xor    %eax,%eax
call   1040 <rand@plt>
call   1030 <printid@plt>
xor    %eax,%eax
call   1040 <rand@plt>
call   1030 <printid@plt>
xor    %eax,%eax
call   1040 <rand@plt>
call   1030 <printid@plt>
xor    %eax,%eax
call   1040 <rand@plt>
pop    %rax
jmp    1030 <printid@plt>

LLVM IR (-O0):
define void @main() {
%1 = alloca i32
%2 = alloca float
store i32 0, i32* %1
br label %3
3: ; preds = %10, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 10
br i1 %5, label %6, label %13
6: ; preds = %3
%7 = call float (...) @rand()
store float %7, float* %2
%8 = load float, float* %2
%9 = call i32 @printid(float %8)
br label %10
10: ; preds = %6
%11 = load i32, i32* %1
%12 = add nsw i32 %11, 1
store i32 %12, i32* %1
br label %3
13: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call float (...) @rand()
%2 = tail call i32 @printid(float %1)
%3 = tail call float (...) @rand()
%4 = tail call i32 @printid(float %3)
%5 = tail call float (...) @rand()
%6 = tail call i32 @printid(float %5)
%7 = tail call float (...) @rand()
%8 = tail call i32 @printid(float %7)
%9 = tail call float (...) @rand()
%10 = tail call i32 @printid(float %9)
%11 = tail call float (...) @rand()
%12 = tail call i32 @printid(float %11)
%13 = tail call float (...) @rand()
%14 = tail call i32 @printid(float %13)
%15 = tail call float (...) @rand()
%16 = tail call i32 @printid(float %15)
%17 = tail call float (...) @rand()
%18 = tail call i32 @printid(float %17)
%19 = tail call float (...) @rand()
%20 = tail call i32 @printid(float %19)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ core12_print(char *, char const *);
void U_EMRCREATEDIBPATTERNBRUSHPT_print(const char *contents) {
  core12_print("U_EMRCREATEDIBPATTERNBRUSHPT", contents);
}


x86 assembly (clang, -O0):
<U_EMRCREATEDIBPATTERNBRUSHPT_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <core12_print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_EMRCREATEDIBPATTERNBRUSHPT_print>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <core12_print@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"U_EMRCREATEDIBPATTERNBRUSHPT\00"
define void @U_EMRCREATEDIBPATTERNBRUSHPT_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @core12_print(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %3)
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"U_EMRCREATEDIBPATTERNBRUSHPT\00"
define void @U_EMRCREATEDIBPATTERNBRUSHPT_print(i8* %0) {
%2 = tail call i32 @core12_print(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* %0)
ret void
}
int dummy_3(int a, int b, int c) { return a - b - c; }


x86 assembly (clang, -O0):
<dummy_3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x4(%rbp),%eax
sub    -0x8(%rbp),%eax
sub    -0xc(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dummy_3>:
mov    %edi,%eax
add    %edx,%esi
sub    %esi,%eax
ret

LLVM IR (-O0):
define i32 @dummy_3(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32, i32* %4
%8 = load i32, i32* %5
%9 = sub nsw i32 %7, %8
%10 = load i32, i32* %6
%11 = sub nsw i32 %9, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @dummy_3(i32 %0, i32 %1, i32 %2) {
%4 = add i32 %1, %2
%5 = sub i32 %0, %4
ret i32 %5
}
/* Variables and functions */
char *process_text(char *);
int strlen(char *);
char *tag_chop(int argc, char *argv[]) {
  if (argc >= 1) {
    char *s = process_text(argv[0]);
    if (*s)
      s[strlen(s) - 1] = 0;
    return s;
  } else
    return 0;
}


x86 assembly (clang, -O0):
<tag_chop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %edi,-0xc(%rbp)
mov    %rsi,-0x18(%rbp)
cmpl   $0x1,-0xc(%rbp)
jl     1184 <tag_chop+0x64>
mov    -0x18(%rbp),%rax
mov    (%rax),%rdi
call   1040 <process_text@plt>
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
cmpb   $0x0,(%rax)
je     1177 <tag_chop+0x57>
mov    -0x20(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x20(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,%ecx
mov    -0x28(%rbp),%rax
sub    $0x1,%ecx
movslq %ecx,%rcx
movb   $0x0,(%rax,%rcx,1)
mov    -0x20(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    118c <tag_chop+0x6c>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<tag_chop>:
push   %rbx
test   %edi,%edi
jle    1146 <tag_chop+0x26>
mov    (%rsi),%rdi
call   1040 <process_text@plt>
mov    %rax,%rbx
cmpb   $0x0,(%rax)
je     1148 <tag_chop+0x28>
mov    %rbx,%rdi
call   1030 <strlen@plt>
cltq
movb   $0x0,-0x1(%rax,%rbx,1)
jmp    1148 <tag_chop+0x28>
xor    %ebx,%ebx
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @tag_chop(i32 %0, i8** %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 %0, i32* %4
store i8** %1, i8*** %5
%7 = load i32, i32* %4
%8 = icmp sge i32 %7, 1
br i1 %8, label %9, label %26
9: ; preds = %2
%10 = load i8**, i8*** %5
%11 = getelementptr inbounds i8*, i8** %10, i64 0
%12 = load i8*, i8** %11
%13 = call i8* @process_text(i8* %12)
store i8* %13, i8** %6
%14 = load i8*, i8** %6
%15 = load i8, i8* %14
%16 = icmp ne i8 %15, 0
br i1 %16, label %17, label %24
17: ; preds = %9
%18 = load i8*, i8** %6
%19 = load i8*, i8** %6
%20 = call i32 @strlen(i8* %19)
%21 = sub nsw i32 %20, 1
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %18, i64 %22
store i8 0, i8* %23
br label %24
24: ; preds = %17, %9
%25 = load i8*, i8** %6
store i8* %25, i8** %3
br label %27
26: ; preds = %2
store i8* null, i8** %3
br label %27
27: ; preds = %26, %24
%28 = load i8*, i8** %3
ret i8* %28
}

LLVM IR (-O2):
define i8* @tag_chop(i32 %0, i8** nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %14
4: ; preds = %2
%5 = load i8*, i8** %1
%6 = tail call i8* @process_text(i8* %5)
%7 = load i8, i8* %6
%8 = icmp eq i8 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %4
%10 = tail call i32 @strlen(i8* %6)
%11 = add nsw i32 %10, -1
%12 = sext i32 %11 to i64
%13 = getelementptr inbounds i8, i8* %6, i64 %12
store i8 0, i8* %13
br label %14
14: ; preds = %2, %4, %9
%15 = phi i8* [ %6, %9 ], [ %6, %4 ], [ null, %2 ]
ret i8* %15
}
/* Variables and functions */
char getchar();
int /*<<< orphan*/ hexi_rgb();
int /*<<< orphan*/ printf(char *);
int /*<<< orphan*/ rgb_hexi();
int main() {
  char x;
  x = getchar();
  switch (x) {
  case 'd':
    rgb_hexi();
    break;
  case 'h':
    hexi_rgb();
    break;
  default:
    printf("Enter either h or d");
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %eax,%eax
call   1040 <getchar@plt>
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x64,%eax
je     117f <main+0x3f>
jmp    116e <main+0x2e>
mov    -0xc(%rbp),%eax
sub    $0x68,%eax
je     118b <main+0x4b>
jmp    1197 <main+0x57>
mov    $0x0,%al
call   1050 <rgb_hexi@plt>
jmp    11a3 <main+0x63>
mov    $0x0,%al
call   1060 <hexi_rgb@plt>
jmp    11a3 <main+0x63>
lea    0xe62(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1040 <getchar@plt>
movsbl %al,%eax
cmp    $0x68,%eax
je     115e <main+0x1e>
cmp    $0x64,%eax
jne    1167 <main+0x27>
xor    %eax,%eax
call   1050 <rgb_hexi@plt>
jmp    1173 <main+0x33>
xor    %eax,%eax
call   1060 <hexi_rgb@plt>
jmp    1173 <main+0x33>
lea    0xe92(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"Enter either h or d\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
%3 = call signext i8 (...) @getchar()
store i8 %3, i8* %2
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
switch i32 %5, label %10 [
i32 100, label %6
i32 104, label %8
]
6: ; preds = %0
%7 = call i32 (...) @rgb_hexi()
br label %12
8: ; preds = %0
%9 = call i32 (...) @hexi_rgb()
br label %12
10: ; preds = %0
%11 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %12
12: ; preds = %10, %8, %6
%13 = load i32, i32* %1
ret i32 %13
}

LLVM IR (-O2):
@.str = [20 x i8] c"Enter either h or d\00"
define i32 @main() {
%1 = tail call signext i8 (...) @getchar()
%2 = sext i8 %1 to i32
switch i32 %2, label %7 [
i32 100, label %3
i32 104, label %5
]
3: ; preds = %0
%4 = tail call i32 (...) @rgb_hexi()
br label %9
5: ; preds = %0
%6 = tail call i32 (...) @hexi_rgb()
br label %9
7: ; preds = %0
%8 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
br label %9
9: ; preds = %7, %5, %3
ret i32 0
}
void pb9x_pci_init(void) {}


x86 assembly (clang, -O0):
<pb9x_pci_init>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pb9x_pci_init>:
ret

LLVM IR (-O0):
define void @pb9x_pci_init() {
ret void
}

LLVM IR (-O2):
define void @pb9x_pci_init() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void displayHelp() {
  printf("Moment\n\n cmoment  [-t: DISP-VECTOR, FORCE-VECTOR, THETA] | [-t: "
         "DISP-VECTOR, FORCE-VECTOR]\n         [-m: MASS, VELOCITY]\n         "
         "[-h]\n \n[OPTIONS]\n\n -t      Torque\n Usage: [r] [F] [sin(theta)] "
         "(sine is optional)\n     moment -t 1 2 3\n \n -m      Momentum\n "
         "Usage: [m] [v]\n     moment -m 2 3\n \n -h      Help\n     Opens the "
         "help page.\n");
}


x86 assembly (clang, -O0):
<displayHelp>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<displayHelp>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [331 x i8] c"Moment\0A\0A cmoment [-t: DISP-VECTOR, FORCE-VECTOR, THETA] | [-t: DISP-VECTOR, FORCE-VECTOR]\0A [-m: MASS, VELOCITY]\0A [-h]\0A \0A[OPTIONS]\0A\0A -t Torque\0A Usage: [r] [F] [sin(theta)] (sine is optional)\0A moment -t 1 2 3\0A \0A -m Momentum\0A Usage: [m] [v]\0A moment -m 2 3\0A \0A -h Help\0A Opens the help page.\0A\00"
define void @displayHelp() {
%1 = call i32 @printf(i8* getelementptr inbounds ([331 x i8], [331 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@str = [330 x i8] c"Moment\0A\0A cmoment [-t: DISP-VECTOR, FORCE-VECTOR, THETA] | [-t: DISP-VECTOR, FORCE-VECTOR]\0A [-m: MASS, VELOCITY]\0A [-h]\0A \0A[OPTIONS]\0A\0A -t Torque\0A Usage: [r] [F] [sin(theta)] (sine is optional)\0A moment -t 1 2 3\0A \0A -m Momentum\0A Usage: [m] [v]\0A moment -m 2 3\0A \0A -h Help\0A Opens the help page.\00"
define void @displayHelp() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([330 x i8], [330 x i8]* @str, i64 0, i64 0))
ret void
}
/* Variables and functions */
int __cmpdi2(long long, long long);
int _COM_CMPLE64s(long long a, long long b) { return __cmpdi2(a, b) != 2; }


x86 assembly (clang, -O0):
<_COM_CMPLE64s>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <__cmpdi2@plt>
cmp    $0x2,%eax
setne  %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_COM_CMPLE64s>:
push   %rax
call   1030 <__cmpdi2@plt>
xor    %ecx,%ecx
cmp    $0x2,%eax
setne  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @_COM_CMPLE64s(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = call i32 @__cmpdi2(i64 %5, i64 %6)
%8 = icmp ne i32 %7, 2
%9 = zext i1 %8 to i32
ret i32 %9
}

LLVM IR (-O2):
define i32 @_COM_CMPLE64s(i64 %0, i64 %1) {
%3 = tail call i32 @__cmpdi2(i64 %0, i64 %1)
%4 = icmp ne i32 %3, 2
%5 = zext i1 %4 to i32
ret i32 %5
}
char *typeNameValueToString(void *object) { return (char *)object; }


x86 assembly (clang, -O0):
<typeNameValueToString>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<typeNameValueToString>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @typeNameValueToString(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @typeNameValueToString(i8* readnone returned %0) {
ret i8* %0
}
/* Variables and functions */
int /*<<< orphan*/ gmvwrite_tracers_header(int, char *, char *, char *);
void fgmvwrite_tracers_header_(int *ntracers, char *u, char *y, char *z) {
  gmvwrite_tracers_header(*ntracers, u, y, z);
}


x86 assembly (clang, -O0):
<fgmvwrite_tracers_header_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <gmvwrite_tracers_header@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fgmvwrite_tracers_header_>:
mov    (%rdi),%edi
jmp    1030 <gmvwrite_tracers_header@plt>

LLVM IR (-O0):
define void @fgmvwrite_tracers_header_(i32* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i32*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i32* %0, i32** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %9
%11 = load i8*, i8** %6
%12 = load i8*, i8** %7
%13 = load i8*, i8** %8
%14 = call i32 @gmvwrite_tracers_header(i32 %10, i8* %11, i8* %12, i8* %13)
ret void
}

LLVM IR (-O2):
define void @fgmvwrite_tracers_header_(i32* nocapture %0, i8* %1, i8* %2, i8* %3) {
%5 = load i32, i32* %0
%6 = tail call i32 @gmvwrite_tracers_header(i32 %5, i8* %1, i8* %2, i8* %3)
ret void
}
void test_invalid_clause() {
  int i;
#pragma omp target
#pragma omp teams
#pragma omp distribute parallel for simd foo bar
  for (i = 0; i < 16; ++i)
    ;
}


x86 assembly (clang, -O0):
<test_invalid_clause>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x10,-0x4(%rbp)
jge    1128 <test_invalid_clause+0x28>
jmp    111a <test_invalid_clause+0x1a>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <test_invalid_clause+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_invalid_clause>:
ret

LLVM IR (-O0):
define void @test_invalid_clause() {
%1 = alloca i32
store i32 0, i32* %1
br label %2
2: ; preds = %6, %0
%3 = load i32, i32* %1
%4 = icmp slt i32 %3, 16
br i1 %4, label %5, label %9
5: ; preds = %2
br label %6
6: ; preds = %5
%7 = load i32, i32* %1
%8 = add nsw i32 %7, 1
store i32 %8, i32* %1
br label %2
9: ; preds = %2
ret void
}

LLVM IR (-O2):
define void @test_invalid_clause() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void exact_square(int number) {
  int sqrt;
  for (sqrt = 0; sqrt <= number; sqrt++) {
    if (number == sqrt * sqrt) {
      printf("1");
      return;
    }
  }
  printf("0");
}


x86 assembly (clang, -O0):
<exact_square>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%eax
cmp    -0x4(%rbp),%eax
jg     1164 <exact_square+0x54>
mov    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
imul   -0x8(%rbp),%ecx
cmp    %ecx,%eax
jne    1151 <exact_square+0x41>
lea    0xeb9(%rip),%rdi
call   1030 <printf@plt>
jmp    1170 <exact_square+0x60>
jmp    1156 <exact_square+0x46>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    1122 <exact_square+0x12>
lea    0xe97(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<exact_square>:
mov    %edi,%eax
mov    $0x30,%edi
test   %eax,%eax
js     1130 <exact_square+0x20>
lea    0x1(%rax),%ecx
xor    %edx,%edx
mov    %edx,%esi
imul   %edx,%esi
cmp    %eax,%esi
je     1135 <exact_square+0x25>
add    $0x1,%edx
cmp    %edx,%ecx
jne    1120 <exact_square+0x10>
jmp    1030 <putchar@plt>
mov    $0x31,%edi
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [2 x i8] c"1\00"
@.str.1 = [2 x i8] c"0\00"
define void @exact_square(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %17, %1
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = icmp sle i32 %5, %6
br i1 %7, label %8, label %20
8: ; preds = %4
%9 = load i32, i32* %2
%10 = load i32, i32* %3
%11 = load i32, i32* %3
%12 = mul nsw i32 %10, %11
%13 = icmp eq i32 %9, %12
br i1 %13, label %14, label %16
14: ; preds = %8
%15 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str, i64 0, i64 0))
br label %22
16: ; preds = %8
br label %17
17: ; preds = %16
%18 = load i32, i32* %3
%19 = add nsw i32 %18, 1
store i32 %19, i32* %3
br label %4
20: ; preds = %4
%21 = call i32 @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
br label %22
22: ; preds = %20, %14
ret void
}

LLVM IR (-O2):
define void @exact_square(i32 %0) {
%2 = icmp slt i32 %0, 0
br i1 %2, label %10, label %6
3: ; preds = %6
%4 = add nuw i32 %7, 1
%5 = icmp eq i32 %7, %0
br i1 %5, label %10, label %6
6: ; preds = %1, %3
%7 = phi i32 [ %4, %3 ], [ 0, %1 ]
%8 = mul nsw i32 %7, %7
%9 = icmp eq i32 %8, %0
br i1 %9, label %10, label %3
10: ; preds = %3, %6, %1
%11 = phi i32 [ 48, %1 ], [ 49, %6 ], [ 48, %3 ]
%12 = tail call i32 @putchar(i32 %11)
ret void
}
int pixel_get_signed_r16(unsigned int pixel) { return (short)(pixel & 0xFFFF); }


x86 assembly (clang, -O0):
<pixel_get_signed_r16>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
and    $0xffff,%eax
cwtl
pop    %rbp
ret

x86 assembly (clang, -O2):
<pixel_get_signed_r16>:
movswl %di,%eax
ret

LLVM IR (-O0):
define i32 @pixel_get_signed_r16(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, 65535
%5 = trunc i32 %4 to i16
%6 = sext i16 %5 to i32
ret i32 %6
}

LLVM IR (-O2):
define i32 @pixel_get_signed_r16(i32 %0) {
%2 = shl i32 %0, 16
%3 = ashr exact i32 %2, 16
ret i32 %3
}
int compare_int(const void *x1, const void *x2) {
  return *((unsigned int *)x1) - *((unsigned int *)x2);
}


x86 assembly (clang, -O0):
<compare_int>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%eax
mov    -0x10(%rbp),%rcx
sub    (%rcx),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<compare_int>:
mov    (%rdi),%eax
sub    (%rsi),%eax
ret

LLVM IR (-O0):
define i32 @compare_int(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = bitcast i8* %5 to i32*
%7 = load i32, i32* %6
%8 = load i8*, i8** %4
%9 = bitcast i8* %8 to i32*
%10 = load i32, i32* %9
%11 = sub i32 %7, %10
ret i32 %11
}

LLVM IR (-O2):
define i32 @compare_int(i8* nocapture %0, i8* nocapture %1) {
%3 = bitcast i8* %0 to i32*
%4 = load i32, i32* %3
%5 = bitcast i8* %1 to i32*
%6 = load i32, i32* %5
%7 = sub i32 %4, %6
ret i32 %7
}
int calc_precedence(char operator) {
  int returnPrecedence = 0;
  switch (operator) {
  case '^':
    returnPrecedence = 1;
    break;
  case '/':
    returnPrecedence = 2;
    break;
  case '*':
    returnPrecedence = 3;
    break;
  case '-':
    returnPrecedence = 4;
    break;
  case '+':
    returnPrecedence = 5;
    break;
  }
  return returnPrecedence;
}


x86 assembly (clang, -O0):
<calc_precedence>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
movsbl -0x1(%rbp),%eax
mov    %eax,-0xc(%rbp)
sub    $0x2a,%eax
je     1182 <calc_precedence+0x82>
jmp    1126 <calc_precedence+0x26>
mov    -0xc(%rbp),%eax
sub    $0x2b,%eax
je     119a <calc_precedence+0x9a>
jmp    1137 <calc_precedence+0x37>
mov    -0xc(%rbp),%eax
sub    $0x2d,%eax
je     118e <calc_precedence+0x8e>
jmp    1148 <calc_precedence+0x48>
mov    -0xc(%rbp),%eax
sub    $0x2f,%eax
je     1176 <calc_precedence+0x76>
jmp    1159 <calc_precedence+0x59>
mov    -0xc(%rbp),%eax
sub    $0x5e,%eax
jne    11a1 <calc_precedence+0xa1>
jmp    116a <calc_precedence+0x6a>
movl   $0x1,-0x8(%rbp)
jmp    11a1 <calc_precedence+0xa1>
movl   $0x2,-0x8(%rbp)
jmp    11a1 <calc_precedence+0xa1>
movl   $0x3,-0x8(%rbp)
jmp    11a1 <calc_precedence+0xa1>
movl   $0x4,-0x8(%rbp)
jmp    11a1 <calc_precedence+0xa1>
movl   $0x5,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_precedence>:
xor    %eax,%eax
lea    -0x2a(%rdi),%ecx
cmp    $0x5,%ecx
ja     1120 <calc_precedence+0x20>
lea    0xeef(%rip),%rdx
movslq (%rdx,%rcx,4),%rcx
add    %rdx,%rcx
jmp    *%rcx
mov    $0x3,%eax
ret
cmp    $0x5e,%edi
jne    1130 <calc_precedence+0x30>
mov    $0x1,%eax
ret
mov    $0x5,%eax
ret
mov    $0x4,%eax
ret
mov    $0x2,%eax
ret

LLVM IR (-O0):
define i32 @calc_precedence(i8 signext %0) {
%2 = alloca i8
%3 = alloca i32
store i8 %0, i8* %2
store i32 0, i32* %3
%4 = load i8, i8* %2
%5 = sext i8 %4 to i32
switch i32 %5, label %11 [
i32 94, label %6
i32 47, label %7
i32 42, label %8
i32 45, label %9
i32 43, label %10
]
6: ; preds = %1
store i32 1, i32* %3
br label %11
7: ; preds = %1
store i32 2, i32* %3
br label %11
8: ; preds = %1
store i32 3, i32* %3
br label %11
9: ; preds = %1
store i32 4, i32* %3
br label %11
10: ; preds = %1
store i32 5, i32* %3
br label %11
11: ; preds = %1, %10, %9, %8, %7, %6
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @calc_precedence(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %8 [
i32 94, label %3
i32 47, label %4
i32 42, label %5
i32 45, label %6
i32 43, label %7
]
3: ; preds = %1
br label %8
4: ; preds = %1
br label %8
5: ; preds = %1
br label %8
6: ; preds = %1
br label %8
7: ; preds = %1
br label %8
8: ; preds = %1, %7, %6, %5, %4, %3
%9 = phi i32 [ 0, %1 ], [ 5, %7 ], [ 4, %6 ], [ 3, %5 ], [ 2, %4 ], [ 1, %3 ]
ret i32 %9
}
void destroy(int **distance, int i, int j) {
  distance[i][j] = 0;
  distance[j][i] = 0;
}


x86 assembly (clang, -O0):
<destroy>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
movslq -0xc(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
movslq -0x10(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
mov    -0x8(%rbp),%rax
movslq -0x10(%rbp),%rcx
mov    (%rax,%rcx,8),%rax
movslq -0xc(%rbp),%rcx
movl   $0x0,(%rax,%rcx,4)
pop    %rbp
ret

x86 assembly (clang, -O2):
<destroy>:
movslq %esi,%rax
mov    (%rdi,%rax,8),%rcx
movslq %edx,%rdx
movl   $0x0,(%rcx,%rdx,4)
mov    (%rdi,%rdx,8),%rcx
movl   $0x0,(%rcx,%rax,4)
ret

LLVM IR (-O0):
define void @destroy(i32** %0, i32 %1, i32 %2) {
%4 = alloca i32**
%5 = alloca i32
%6 = alloca i32
store i32** %0, i32*** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i32**, i32*** %4
%8 = load i32, i32* %5
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i32*, i32** %7, i64 %9
%11 = load i32*, i32** %10
%12 = load i32, i32* %6
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
store i32 0, i32* %14
%15 = load i32**, i32*** %4
%16 = load i32, i32* %6
%17 = sext i32 %16 to i64
%18 = getelementptr inbounds i32*, i32** %15, i64 %17
%19 = load i32*, i32** %18
%20 = load i32, i32* %5
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i32, i32* %19, i64 %21
store i32 0, i32* %22
ret void
}

LLVM IR (-O2):
define void @destroy(i32** nocapture %0, i32 %1, i32 %2) {
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds i32*, i32** %0, i64 %4
%6 = load i32*, i32** %5
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i32, i32* %6, i64 %7
store i32 0, i32* %8
%9 = getelementptr inbounds i32*, i32** %0, i64 %7
%10 = load i32*, i32** %9
%11 = getelementptr inbounds i32, i32* %10, i64 %4
store i32 0, i32* %11
ret void
}
/* Variables and functions */
double dpow(double, int);
double fact(int);
double cosh(double n) {
  double sum = 0;
  int i;
  for (i = 0; i <= 30; i++) {
    sum += dpow(n, 2 * i) / fact(2 * i);
  }
  return sum;
}


x86 assembly (clang, -O0):
<cosh>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
movsd  %xmm0,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x1e,-0x14(%rbp)
jg     118a <cosh+0x6a>
movsd  -0x8(%rbp),%xmm0
mov    -0x14(%rbp),%edi
shl    $0x1,%edi
call   1040 <dpow@plt>
movsd  %xmm0,-0x20(%rbp)
mov    -0x14(%rbp),%edi
shl    $0x1,%edi
call   1030 <fact@plt>
movaps %xmm0,%xmm1
movsd  -0x20(%rbp),%xmm0
divsd  %xmm1,%xmm0
addsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    113c <cosh+0x1c>
movsd  -0x10(%rbp),%xmm0
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cosh>:
push   %rbx
sub    $0x20,%rsp
movsd  %xmm0,0x8(%rsp)
xorpd  %xmm0,%xmm0
xor    %ebx,%ebx
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
movsd  %xmm0,0x18(%rsp)
movsd  0x8(%rsp),%xmm0
mov    %ebx,%edi
call   1040 <dpow@plt>
movsd  %xmm0,0x10(%rsp)
mov    %ebx,%edi
call   1030 <fact@plt>
movsd  0x10(%rsp),%xmm1
divsd  %xmm0,%xmm1
movsd  0x18(%rsp),%xmm0
addsd  %xmm1,%xmm0
add    $0x2,%ebx
cmp    $0x3e,%ebx
jne    1140 <cosh+0x20>
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define double @cosh(double %0) {
%2 = alloca double
%3 = alloca double
%4 = alloca i32
store double %0, double* %2
store double 0.000000e+00, double* %3
store i32 0, i32* %4
br label %5
5: ; preds = %19, %1
%6 = load i32, i32* %4
%7 = icmp sle i32 %6, 30
br i1 %7, label %8, label %22
8: ; preds = %5
%9 = load double, double* %2
%10 = load i32, i32* %4
%11 = mul nsw i32 2, %10
%12 = call double @dpow(double %9, i32 %11)
%13 = load i32, i32* %4
%14 = mul nsw i32 2, %13
%15 = call double @fact(i32 %14)
%16 = fdiv double %12, %15
%17 = load double, double* %3
%18 = fadd double %17, %16
store double %18, double* %3
br label %19
19: ; preds = %8
%20 = load i32, i32* %4
%21 = add nsw i32 %20, 1
store i32 %21, i32* %4
br label %5
22: ; preds = %5
%23 = load double, double* %3
ret double %23
}

LLVM IR (-O2):
define double @cosh(double %0) {
br label %2
2: ; preds = %1, %2
%3 = phi i32 [ 0, %1 ], [ %10, %2 ]
%4 = phi double [ 0.000000e+00, %1 ], [ %9, %2 ]
%5 = shl nuw nsw i32 %3, 1
%6 = tail call double @dpow(double %0, i32 %5)
%7 = tail call double @fact(i32 %5)
%8 = fdiv double %6, %7
%9 = fadd double %4, %8
%10 = add nuw nsw i32 %3, 1
%11 = icmp eq i32 %10, 31
br i1 %11, label %12, label %2
12: ; preds = %2
ret double %9
}
int satMul3(int x) {
  int x2, x3;
  int k;
  x2 = x + x;
  x3 = x2 + x;
  k = (((x3 ^ x) | (x2 ^ x)) >> 31);
  return (k | x3) ^ (((x >> 31) ^ (1 << 31)) & k);
}


x86 assembly (clang, -O0):
<satMul3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    -0x4(%rbp),%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
xor    -0x4(%rbp),%eax
mov    -0x8(%rbp),%ecx
xor    -0x4(%rbp),%ecx
or     %ecx,%eax
sar    $0x1f,%eax
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
or     -0xc(%rbp),%eax
mov    -0x4(%rbp),%ecx
sar    $0x1f,%ecx
xor    $0x80000000,%ecx
and    -0x10(%rbp),%ecx
xor    %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<satMul3>:
lea    (%rdi,%rdi,1),%ecx
lea    (%rdi,%rdi,2),%edx
mov    %edx,%eax
xor    %edi,%eax
xor    %edi,%ecx
or     %eax,%ecx
sar    $0x1f,%ecx
or     %ecx,%edx
sar    $0x1f,%edi
lea    -0x80000000(%rdi),%eax
and    %ecx,%eax
xor    %edx,%eax
ret

LLVM IR (-O0):
define i32 @satMul3(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = load i32, i32* %2
%8 = add nsw i32 %6, %7
store i32 %8, i32* %3
%9 = load i32, i32* %3
%10 = load i32, i32* %2
%11 = add nsw i32 %9, %10
store i32 %11, i32* %4
%12 = load i32, i32* %4
%13 = load i32, i32* %2
%14 = xor i32 %12, %13
%15 = load i32, i32* %3
%16 = load i32, i32* %2
%17 = xor i32 %15, %16
%18 = or i32 %14, %17
%19 = ashr i32 %18, 31
store i32 %19, i32* %5
%20 = load i32, i32* %5
%21 = load i32, i32* %4
%22 = or i32 %20, %21
%23 = load i32, i32* %2
%24 = ashr i32 %23, 31
%25 = xor i32 %24, -2147483648
%26 = load i32, i32* %5
%27 = and i32 %25, %26
%28 = xor i32 %22, %27
ret i32 %28
}

LLVM IR (-O2):
define i32 @satMul3(i32 %0) {
%2 = shl nsw i32 %0, 1
%3 = mul nsw i32 %0, 3
%4 = xor i32 %3, %0
%5 = xor i32 %2, %0
%6 = or i32 %4, %5
%7 = ashr i32 %6, 31
%8 = or i32 %7, %3
%9 = icmp sgt i32 %0, -1
%10 = select i1 %9, i32 -2147483648, i32 2147483647
%11 = and i32 %7, %10
%12 = xor i32 %8, %11
ret i32 %12
}
int bit_turnon_rightmost_bit(int n) { return (n | (n + 1)); }


x86 assembly (clang, -O0):
<bit_turnon_rightmost_bit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    -0x4(%rbp),%ecx
add    $0x1,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit_turnon_rightmost_bit>:
lea    0x1(%rdi),%eax
or     %edi,%eax
ret

LLVM IR (-O0):
define i32 @bit_turnon_rightmost_bit(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = add nsw i32 %4, 1
%6 = or i32 %3, %5
ret i32 %6
}

LLVM IR (-O2):
define i32 @bit_turnon_rightmost_bit(i32 %0) {
%2 = add nsw i32 %0, 1
%3 = or i32 %2, %0
ret i32 %3
}