xunge/DecIR huggingface dataset:
unsigned h3(unsigned x) {
  static unsigned xx = 0;
  xx += x;
  return xx;
}


x86 assembly (clang, -O0):
<h3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    0x2f14(%rip),%eax
mov    %eax,0x2f0e(%rip)
mov    0x2f08(%rip),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<h3>:
mov    %edi,%eax
add    0x2f1c(%rip),%eax
mov    %eax,0x2f16(%rip)
ret

LLVM IR (-O0):
@h3.xx = internal global i32 0
define i32 @h3(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* @h3.xx
%5 = add i32 %4, %3
store i32 %5, i32* @h3.xx
%6 = load i32, i32* @h3.xx
ret i32 %6
}

LLVM IR (-O2):
@h3.xx = internal unnamed_addr global i32 0
define i32 @h3(i32 %0) {
%2 = load i32, i32* @h3.xx
%3 = add i32 %2, %0
store i32 %3, i32* @h3.xx
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ prints(char *);
int /*<<< orphan*/ xtostr(int, char *);
int printx(int val) {
  char buff[20];
  xtostr(val, buff);
  prints(buff);
  return 0;
}


x86 assembly (clang, -O0):
<printx>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
lea    -0x20(%rbp),%rsi
call   1030 <xtostr@plt>
lea    -0x20(%rbp),%rdi
call   1040 <prints@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<printx>:
push   %rbx
sub    $0x20,%rsp
mov    %rsp,%rbx
mov    %rbx,%rsi
call   1030 <xtostr@plt>
mov    %rbx,%rdi
call   1040 <prints@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @printx(i32 %0) {
%2 = alloca i32
%3 = alloca [20 x i8]
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%6 = call i32 @xtostr(i32 %4, i8* %5)
%7 = getelementptr inbounds [20 x i8], [20 x i8]* %3, i64 0, i64 0
%8 = call i32 @prints(i8* %7)
ret i32 0
}

LLVM IR (-O2):
define i32 @printx(i32 %0) {
%2 = alloca [20 x i8]
%3 = getelementptr inbounds [20 x i8], [20 x i8]* %2, i64 0, i64 0
%4 = call i32 @xtostr(i32 %0, i8* %3)
%5 = call i32 @prints(i8* %3)
ret i32 0
}
int collatz(int n) {
  if (n % 2 == 0) {
    n = n / 2;
  } else {
    n = (3 * n) + 1;
  }
}


x86 assembly (clang, -O0):
<collatz>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
cmp    $0x0,%edx
jne    112e <collatz+0x2e>
mov    -0x8(%rbp),%eax
mov    $0x2,%ecx
cltd
idiv   %ecx
mov    %eax,-0x8(%rbp)
jmp    1138 <collatz+0x38>
imul   $0x3,-0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<collatz>:
ret

LLVM IR (-O0):
define i32 @collatz(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = srem i32 %4, 2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32, i32* %3
%9 = sdiv i32 %8, 2
store i32 %9, i32* %3
br label %14
10: ; preds = %1
%11 = load i32, i32* %3
%12 = mul nsw i32 3, %11
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %10, %7
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @collatz(i32 %0) {
ret i32 undef
}
/* Variables and functions */
int helper(int, char const **);
int main(int argc, const char **argv) { return helper(argc, argv); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    -0x10(%rbp),%rsi
call   1030 <helper@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
jmp    1030 <helper@plt>

LLVM IR (-O0):
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%6 = load i32, i32* %4
%7 = load i8**, i8*** %5
%8 = call i32 @helper(i32 %6, i8** %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @main(i32 %0, i8** %1) {
%3 = tail call i32 @helper(i32 %0, i8** %1)
ret i32 %3
}
/* Type definitions */
typedef int uint8_t;
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ assert(int);
uint16_t h2o_absprio_urgency_to_chromium_weight(uint8_t urgency) {
  uint16_t weight;
  assert(urgency < 8);
  weight = (8 - urgency) * 32;
  return weight;
}


x86 assembly (clang, -O0):
<h2o_absprio_urgency_to_chromium_weight>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0x8,-0x4(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
mov    $0x8,%eax
sub    -0x4(%rbp),%eax
shl    $0x5,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<h2o_absprio_urgency_to_chromium_weight>:
push   %rbx
mov    %edi,%ebx
xor    %edi,%edi
cmp    $0x8,%ebx
setl   %dil
call   1030 <assert@plt>
shl    $0x5,%ebx
mov    $0x100,%eax
sub    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @h2o_absprio_urgency_to_chromium_weight(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = icmp slt i32 %4, 8
%6 = zext i1 %5 to i32
%7 = call i32 @assert(i32 %6)
%8 = load i32, i32* %2
%9 = sub nsw i32 8, %8
%10 = mul nsw i32 %9, 32
store i32 %10, i32* %3
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @h2o_absprio_urgency_to_chromium_weight(i32 %0) {
%2 = icmp slt i32 %0, 8
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 %3)
%5 = mul i32 %0, -32
%6 = add i32 %5, 256
ret i32 %6
}
void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
                       unsigned long end) {}


x86 assembly (clang, -O0):
<flush_cache_range>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<flush_cache_range>:
ret

LLVM IR (-O0):
%struct.vm_area_struct = type opaque
define void @flush_cache_range(%struct.vm_area_struct* %0, i64 %1, i64 %2) {
%4 = alloca %struct.vm_area_struct*
%5 = alloca i64
%6 = alloca i64
store %struct.vm_area_struct* %0, %struct.vm_area_struct** %4
store i64 %1, i64* %5
store i64 %2, i64* %6
ret void
}

LLVM IR (-O2):
%struct.vm_area_struct = type opaque
define void @flush_cache_range(%struct.vm_area_struct* nocapture %0, i64 %1, i64 %2) {
ret void
}
/* Variables and functions */
scalar_t__ malloc(int);
char **pm_allocarray(int cols, int rows, int size) {
  char **its;
  int i;
  its = (char **)malloc(rows * sizeof(char *));
  its[0] = (char *)malloc(rows * cols * size);
  return its;
}


x86 assembly (clang, -O0):
<pm_allocarray>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
movslq -0x8(%rbp),%rax
shl    $0x3,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%edi
imul   -0x4(%rbp),%edi
imul   -0xc(%rbp),%edi
call   1030 <malloc@plt>
mov    %rax,%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x18(%rbp),%rax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pm_allocarray>:
push   %rbp
push   %r15
push   %r14
push   %rbx
push   %rax
mov    %edx,%r14d
mov    %esi,%ebx
mov    %edi,%ebp
lea    0x0(,%rbx,8),%edi
call   1030 <malloc@plt>
mov    %rax,%r15
imul   %ebx,%ebp
imul   %r14d,%ebp
mov    %ebp,%edi
call   1030 <malloc@plt>
mov    %rax,(%r15)
mov    %r15,%rax
add    $0x8,%rsp
pop    %rbx
pop    %r14
pop    %r15
pop    %rbp
ret

LLVM IR (-O0):
define i8** @pm_allocarray(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8**
%8 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%9 = load i32, i32* %5
%10 = sext i32 %9 to i64
%11 = mul i64 %10, 8
%12 = trunc i64 %11 to i32
%13 = call i64 @malloc(i32 %12)
%14 = inttoptr i64 %13 to i8**
store i8** %14, i8*** %7
%15 = load i32, i32* %5
%16 = load i32, i32* %4
%17 = mul nsw i32 %15, %16
%18 = load i32, i32* %6
%19 = mul nsw i32 %17, %18
%20 = call i64 @malloc(i32 %19)
%21 = inttoptr i64 %20 to i8*
%22 = load i8**, i8*** %7
%23 = getelementptr inbounds i8*, i8** %22, i64 0
store i8* %21, i8** %23
%24 = load i8**, i8*** %7
ret i8** %24
}

LLVM IR (-O2):
define i8** @pm_allocarray(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %1, 3
%5 = tail call i64 @malloc(i32 %4)
%6 = inttoptr i64 %5 to i8**
%7 = mul nsw i32 %1, %0
%8 = mul nsw i32 %7, %2
%9 = tail call i64 @malloc(i32 %8)
%10 = inttoptr i64 %9 to i8*
store i8* %10, i8** %6
ret i8** %6
}
void __hv_cast_if(int bIn, float *bOut) { *bOut = (float)bIn; }


x86 assembly (clang, -O0):
<__hv_cast_if>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
cvtsi2ssl -0x4(%rbp),%xmm0
mov    -0x10(%rbp),%rax
movss  %xmm0,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<__hv_cast_if>:
cvtsi2ss %edi,%xmm0
movss  %xmm0,(%rsi)
ret

LLVM IR (-O0):
define void @__hv_cast_if(i32 %0, float* %1) {
%3 = alloca i32
%4 = alloca float*
store i32 %0, i32* %3
store float* %1, float** %4
%5 = load i32, i32* %3
%6 = sitofp i32 %5 to float
%7 = load float*, float** %4
store float %6, float* %7
ret void
}

LLVM IR (-O2):
define void @__hv_cast_if(i32 %0, float* nocapture writeonly %1) {
%3 = sitofp i32 %0 to float
store float %3, float* %1
ret void
}
void gtk_check_menu_item_set_active() {}


x86 assembly (clang, -O0):
<gtk_check_menu_item_set_active>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_check_menu_item_set_active>:
ret

LLVM IR (-O0):
define void @gtk_check_menu_item_set_active() {
ret void
}

LLVM IR (-O2):
define void @gtk_check_menu_item_set_active() {
ret void
}
double dBbp5b(double x) { return 0.0; }


x86 assembly (clang, -O0):
<dBbp5b>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
xorps  %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dBbp5b>:
xorps  %xmm0,%xmm0
ret

LLVM IR (-O0):
define double @dBbp5b(double %0) {
%2 = alloca double
store double %0, double* %2
ret double 0.000000e+00
}

LLVM IR (-O2):
define double @dBbp5b(double %0) {
ret double 0.000000e+00
}
/* Variables and functions */
int /*<<< orphan*/ Hanoi(int, int, int);
void main(void) {
  Hanoi(5, 1, 5);
  return;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0x5,%edx
mov    $0x1,%esi
mov    %edx,%edi
call   1030 <Hanoi@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x5,%edi
mov    $0x1,%esi
mov    $0x5,%edx
jmp    1030 <Hanoi@plt>

LLVM IR (-O0):
define void @main() {
%1 = call i32 @Hanoi(i32 5, i32 1, i32 5)
ret void
}

LLVM IR (-O2):
define void @main() {
%1 = tail call i32 @Hanoi(i32 5, i32 1, i32 5)
ret void
}
/* Variables and functions */
int rand();
int random_(int max) { return rand() % max; }


x86 assembly (clang, -O0):
<random_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <rand@plt>
cltd
idivl  -0x4(%rbp)
mov    %edx,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<random_>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <rand@plt>
cltd
idiv   %ebx
mov    %edx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @random_(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = call i32 (...) @rand()
%4 = load i32, i32* %2
%5 = srem i32 %3, %4
ret i32 %5
}

LLVM IR (-O2):
define i32 @random_(i32 %0) {
%2 = tail call i32 (...) @rand()
%3 = srem i32 %2, %0
ret i32 %3
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int lfs2_npw2(int);
uint32_t lfs2_ctz(uint32_t a) { return lfs2_npw2((a & -a) + 1) - 1; }


x86 assembly (clang, -O0):
<lfs2_ctz>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
xor    %eax,%eax
sub    -0x4(%rbp),%eax
and    %eax,%edi
add    $0x1,%edi
call   1030 <lfs2_npw2@plt>
sub    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lfs2_ctz>:
push   %rax
mov    %edi,%eax
neg    %eax
and    %eax,%edi
add    $0x1,%edi
call   1030 <lfs2_npw2@plt>
add    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @lfs2_ctz(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = load i32, i32* %2
%5 = sub nsw i32 0, %4
%6 = and i32 %3, %5
%7 = add nsw i32 %6, 1
%8 = call i32 @lfs2_npw2(i32 %7)
%9 = sub nsw i32 %8, 1
ret i32 %9
}

LLVM IR (-O2):
define i32 @lfs2_ctz(i32 %0) {
%2 = sub nsw i32 0, %0
%3 = and i32 %2, %0
%4 = add nsw i32 %3, 1
%5 = tail call i32 @lfs2_npw2(i32 %4)
%6 = add nsw i32 %5, -1
ret i32 %6
}
/* Variables and functions */
scalar_t__ is_interruptible();
int read_cop0_status();
int /*<<< orphan*/ write_cop0_status(int);
void disableinterrupt(void) {
  if (is_interruptible()) {
    write_cop0_status(read_cop0_status() & ~0x00000001);
  }
}


x86 assembly (clang, -O0):
<disableinterrupt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <is_interruptible@plt>
cmp    $0x0,%rax
je     1156 <disableinterrupt+0x26>
mov    $0x0,%al
call   1040 <read_cop0_status@plt>
mov    %eax,%edi
and    $0xfffffffe,%edi
call   1030 <write_cop0_status@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<disableinterrupt>:
push   %rax
xor    %eax,%eax
call   1050 <is_interruptible@plt>
test   %rax,%rax
je     114f <disableinterrupt+0x1f>
xor    %eax,%eax
call   1040 <read_cop0_status@plt>
and    $0xfffffffe,%eax
mov    %eax,%edi
pop    %rax
jmp    1030 <write_cop0_status@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @disableinterrupt() {
%1 = call i64 (...) @is_interruptible()
%2 = icmp ne i64 %1, 0
br i1 %2, label %3, label %7
3: ; preds = %0
%4 = call i32 (...) @read_cop0_status()
%5 = and i32 %4, -2
%6 = call i32 @write_cop0_status(i32 %5)
br label %7
7: ; preds = %3, %0
ret void
}

LLVM IR (-O2):
define void @disableinterrupt() {
%1 = tail call i64 (...) @is_interruptible()
%2 = icmp eq i64 %1, 0
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = tail call i32 (...) @read_cop0_status()
%5 = and i32 %4, -2
%6 = tail call i32 @write_cop0_status(i32 %5)
br label %7
7: ; preds = %3, %0
ret void
}
int readint(char *buf) {
  return (((unsigned char)buf[0] & 0xff)) |
         (((unsigned char)buf[1] & 0xff) << 8) |
         (((unsigned char)buf[2] & 0xff) << 16) |
         (((unsigned char)buf[3] & 0xff) << 24);
}


x86 assembly (clang, -O0):
<readint>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
and    $0xff,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1(%rcx),%ecx
and    $0xff,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x2(%rcx),%ecx
and    $0xff,%ecx
shl    $0x10,%ecx
or     %ecx,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x3(%rcx),%ecx
and    $0xff,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<readint>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
define i32 @readint(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = getelementptr inbounds i8, i8* %3, i64 0
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = and i32 %6, 255
%8 = load i8*, i8** %2
%9 = getelementptr inbounds i8, i8* %8, i64 1
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = and i32 %11, 255
%13 = shl i32 %12, 8
%14 = or i32 %7, %13
%15 = load i8*, i8** %2
%16 = getelementptr inbounds i8, i8* %15, i64 2
%17 = load i8, i8* %16
%18 = zext i8 %17 to i32
%19 = and i32 %18, 255
%20 = shl i32 %19, 16
%21 = or i32 %14, %20
%22 = load i8*, i8** %2
%23 = getelementptr inbounds i8, i8* %22, i64 3
%24 = load i8, i8* %23
%25 = zext i8 %24 to i32
%26 = and i32 %25, 255
%27 = shl i32 %26, 24
%28 = or i32 %21, %27
ret i32 %28
}

LLVM IR (-O2):
define i32 @readint(i8* nocapture %0) {
%2 = load i8, i8* %0
%3 = zext i8 %2 to i32
%4 = getelementptr inbounds i8, i8* %0, i64 1
%5 = load i8, i8* %4
%6 = zext i8 %5 to i32
%7 = shl nuw nsw i32 %6, 8
%8 = or i32 %7, %3
%9 = getelementptr inbounds i8, i8* %0, i64 2
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = shl nuw nsw i32 %11, 16
%13 = or i32 %8, %12
%14 = getelementptr inbounds i8, i8* %0, i64 3
%15 = load i8, i8* %14
%16 = zext i8 %15 to i32
%17 = shl nuw i32 %16, 24
%18 = or i32 %13, %17
ret i32 %18
}
void gtk_tree_model_iter_next() {}


x86 assembly (clang, -O0):
<gtk_tree_model_iter_next>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gtk_tree_model_iter_next>:
ret

LLVM IR (-O0):
define void @gtk_tree_model_iter_next() {
ret void
}

LLVM IR (-O2):
define void @gtk_tree_model_iter_next() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ abort();
long long test_di(int);
int test_si(int);
int main() {
  int v;
  long long w;
  v = test_si(0x0203050);
  if (v != 0x4060a00)
    abort();
  w = test_di(0x0000020506010304ll);
  if (w != 0x1028300818200000ll)
    abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x203050,%edi
call   1040 <test_si@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x4060a00,-0x8(%rbp)
je     1160 <main+0x30>
mov    $0x0,%al
call   1030 <abort@plt>
mov    $0x6010304,%edi
call   1050 <test_di@plt>
mov    %rax,-0x10(%rbp)
movabs $0x1028300818200000,%rax
30 28 10
cmp    %rax,-0x10(%rbp)
je     1189 <main+0x59>
mov    $0x0,%al
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0x203050,%edi
call   1040 <test_si@plt>
cmp    $0x4060a00,%eax
jne    115f <main+0x2f>
mov    $0x6010304,%edi
call   1050 <test_di@plt>
movabs $0x1028300818200000,%rcx
30 28 10
cmp    %rcx,%rax
jne    115f <main+0x2f>
xor    %eax,%eax
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i64
store i32 0, i32* %1
%4 = call i32 @test_si(i32 2109520)
store i32 %4, i32* %2
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 67504640
br i1 %6, label %7, label %9
7: ; preds = %0
%8 = call i32 (...) @abort()
unreachable
9: ; preds = %0
%10 = call i64 @test_di(i32 100729604)
store i64 %10, i64* %3
%11 = load i64, i64* %3
%12 = icmp ne i64 %11, 1164233314997895168
br i1 %12, label %13, label %15
13: ; preds = %9
%14 = call i32 (...) @abort()
unreachable
15: ; preds = %9
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @test_si(i32 2109520)
%2 = icmp eq i32 %1, 67504640
br i1 %2, label %5, label %3
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = tail call i64 @test_di(i32 100729604)
%7 = icmp eq i64 %6, 1164233314997895168
br i1 %7, label %10, label %8
8: ; preds = %5
%9 = tail call i32 (...) @abort()
unreachable
10: ; preds = %5
ret i32 0
}
/* Variables and functions */
unsigned char const ata_calc_checksum(unsigned char const *);
bool ata_checksum_verify(const unsigned char *buf) {
  return ata_calc_checksum(buf) == buf[511];
}


x86 assembly (clang, -O0):
<ata_checksum_verify>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <ata_calc_checksum@plt>
movzbl %al,%eax
mov    -0x8(%rbp),%rcx
movzbl 0x1ff(%rcx),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ata_checksum_verify>:
push   %rbx
mov    %rdi,%rbx
call   1030 <ata_calc_checksum@plt>
xor    %ecx,%ecx
cmp    0x1ff(%rbx),%al
sete   %cl
mov    %ecx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @ata_checksum_verify(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call zeroext i8 @ata_calc_checksum(i8* %3)
%5 = zext i8 %4 to i32
%6 = load i8*, i8** %2
%7 = getelementptr inbounds i8, i8* %6, i64 511
%8 = load i8, i8* %7
%9 = zext i8 %8 to i32
%10 = icmp eq i32 %5, %9
%11 = zext i1 %10 to i32
ret i32 %11
}

LLVM IR (-O2):
define i32 @ata_checksum_verify(i8* %0) {
%2 = tail call zeroext i8 @ata_calc_checksum(i8* %0)
%3 = getelementptr inbounds i8, i8* %0, i64 511
%4 = load i8, i8* %3
%5 = icmp eq i8 %2, %4
%6 = zext i1 %5 to i32
ret i32 %6
}
/* Variables and functions */
char *strchr(char *, char);
char *bson_skip_field_name(char *data) { return strchr(data, '\0') + 1; }


x86 assembly (clang, -O0):
<bson_skip_field_name>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %esi,%esi
call   1030 <strchr@plt>
add    $0x1,%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<bson_skip_field_name>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
add    %rbx,%rax
add    $0x1,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @bson_skip_field_name(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i8* @strchr(i8* %3, i8 signext 0)
%5 = getelementptr inbounds i8, i8* %4, i64 1
ret i8* %5
}

LLVM IR (-O2):
define i8* @bson_skip_field_name(i8* %0) {
%2 = tail call i64 @strlen(i8* dereferenceable(1) %0)
%3 = getelementptr i8, i8* %0, i64 %2
%4 = getelementptr inbounds i8, i8* %3, i64 1
ret i8* %4
}
/* Type definitions */
struct object {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ apply(struct object *);
struct object *pop();
void pop_apply(struct object *data) {
  struct object *f = pop();
  apply(f);
}


x86 assembly (clang, -O0):
<pop_apply>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0x0,%al
call   1030 <pop@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <apply@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pop_apply>:
push   %rax
xor    %eax,%eax
call   1030 <pop@plt>
mov    %rax,%rdi
pop    %rax
jmp    1040 <apply@plt>

LLVM IR (-O0):
%struct.object = type { i32 }
define void @pop_apply(%struct.object* %0) {
%2 = alloca %struct.object*
%3 = alloca %struct.object*
store %struct.object* %0, %struct.object** %2
%4 = call %struct.object* (...) @pop()
store %struct.object* %4, %struct.object** %3
%5 = load %struct.object*, %struct.object** %3
%6 = call i32 @apply(%struct.object* %5)
ret void
}

LLVM IR (-O2):
%struct.object = type { i32 }
define void @pop_apply(%struct.object* nocapture readnone %0) {
%2 = tail call %struct.object* (...) @pop()
%3 = tail call i32 @apply(%struct.object* %2)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cnfImpn(char *const, int, int, char *);
int /*<<< orphan*/ emsSyser(char *, int);
void ems_syser_(char *const token, int *const systat, int token_length) {
  char ctok[15 + 1];

  cnfImpn(token, token_length, 15, ctok);
  emsSyser(ctok, *systat);
  return;
}


x86 assembly (clang, -O0):
<ems_syser_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x14(%rbp),%esi
lea    -0x30(%rbp),%rcx
mov    $0xf,%edx
call   1030 <cnfImpn@plt>
lea    -0x30(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    (%rax),%esi
call   1040 <emsSyser@plt>
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ems_syser_>:
push   %r14
push   %rbx
sub    $0x18,%rsp
mov    %rsi,%rbx
mov    %rsp,%r14
mov    %edx,%esi
mov    $0xf,%edx
mov    %r14,%rcx
call   1030 <cnfImpn@plt>
mov    (%rbx),%esi
mov    %r14,%rdi
call   1040 <emsSyser@plt>
add    $0x18,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define void @ems_syser_(i8* %0, i32* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32*
%6 = alloca i32
%7 = alloca [16 x i8]
store i8* %0, i8** %4
store i32* %1, i32** %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
%9 = load i32, i32* %6
%10 = getelementptr inbounds [16 x i8], [16 x i8]* %7, i64 0, i64 0
%11 = call i32 @cnfImpn(i8* %8, i32 %9, i32 15, i8* %10)
%12 = getelementptr inbounds [16 x i8], [16 x i8]* %7, i64 0, i64 0
%13 = load i32*, i32** %5
%14 = load i32, i32* %13
%15 = call i32 @emsSyser(i8* %12, i32 %14)
ret void
}

LLVM IR (-O2):
define void @ems_syser_(i8* %0, i32* nocapture %1, i32 %2) {
%4 = alloca [16 x i8]
%5 = getelementptr inbounds [16 x i8], [16 x i8]* %4, i64 0, i64 0
%6 = call i32 @cnfImpn(i8* %0, i32 %2, i32 15, i8* %5)
%7 = load i32, i32* %1
%8 = call i32 @emsSyser(i8* %5, i32 %7)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int /*<<< orphan*/ AT_FDCWD;
int INLINE_SYSCALL(int /*<<< orphan*/, int, int /*<<< orphan*/, char const *,
                   int /*<<< orphan*/);
int /*<<< orphan*/ fchmodat;
int __chmod(const char *file, mode_t mode) {
  return INLINE_SYSCALL(fchmodat, 3, AT_FDCWD, file, mode);
}


x86 assembly (clang, -O0):
<__chmod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    0x2ec2(%rip),%rax
mov    (%rax),%edi
mov    0x2ea1(%rip),%rax
mov    (%rax),%edx
mov    -0x8(%rbp),%rcx
mov    -0xc(%rbp),%r8d
mov    $0x3,%esi
call   1030 <INLINE_SYSCALL@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__chmod>:
mov    %esi,%r8d
mov    %rdi,%rcx
mov    0x2ecb(%rip),%rax
mov    (%rax),%edi
mov    0x2eaa(%rip),%rax
mov    (%rax),%edx
mov    $0x3,%esi
jmp    1030 <INLINE_SYSCALL@plt>

LLVM IR (-O0):
@fchmodat = global i32 0
@AT_FDCWD = global i32 0
define i32 @__chmod(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i32, i32* @fchmodat
%6 = load i32, i32* @AT_FDCWD
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = call i32 @INLINE_SYSCALL(i32 %5, i32 3, i32 %6, i8* %7, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
@fchmodat = global i32 0
@AT_FDCWD = global i32 0
define i32 @__chmod(i8* %0, i32 %1) {
%3 = load i32, i32* @fchmodat
%4 = load i32, i32* @AT_FDCWD
%5 = tail call i32 @INLINE_SYSCALL(i32 %3, i32 3, i32 %4, i8* %0, i32 %1)
ret i32 %5
}
/* Variables and functions */
double *malloc(int);
double *CreateVec(int size) {
  double *b;
  b = malloc(size * sizeof(double));
  return b;
}


x86 assembly (clang, -O0):
<CreateVec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movslq -0x4(%rbp),%rax
shl    $0x3,%rax
mov    %eax,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<CreateVec>:
shl    $0x3,%edi
jmp    1030 <malloc@plt>

LLVM IR (-O0):
define double* @CreateVec(i32 %0) {
%2 = alloca i32
%3 = alloca double*
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = sext i32 %4 to i64
%6 = mul i64 %5, 8
%7 = trunc i64 %6 to i32
%8 = call double* @malloc(i32 %7)
store double* %8, double** %3
%9 = load double*, double** %3
ret double* %9
}

LLVM IR (-O2):
define noalias double* @CreateVec(i32 %0) {
%2 = shl i32 %0, 3
%3 = tail call double* @malloc(i32 %2)
ret double* %3
}
/* Variables and functions */
bool is_dec_digit(char c) { return (c >= '0' && c <= '9'); }


x86 assembly (clang, -O0):
<is_dec_digit>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
xor    %eax,%eax
cmp    $0x30,%ecx
mov    %al,-0x2(%rbp)
jl     1129 <is_dec_digit+0x29>
movsbl -0x1(%rbp),%eax
cmp    $0x39,%eax
setle  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_dec_digit>:
add    $0xd0,%dil
xor    %eax,%eax
cmp    $0xa,%dil
setb   %al
ret

LLVM IR (-O0):
define i32 @is_dec_digit(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp sge i32 %4, 48
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp sle i32 %8, 57
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ false, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @is_dec_digit(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = zext i1 %3 to i32
ret i32 %4
}
/* Variables and functions */
scalar_t__ MultHi(int, int);
int VP8Clip8(scalar_t__);
int VP8YUVToB(int y, int u) {
  return VP8Clip8(MultHi(y, 19077) + MultHi(u, 33050) - 17685);
}


x86 assembly (clang, -O0):
<VP8YUVToB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x4a85,%esi
call   1030 <MultHi@plt>
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%edi
mov    $0x811a,%esi
call   1030 <MultHi@plt>
mov    -0x10(%rbp),%rdi
add    %rax,%rdi
sub    $0x4515,%rdi
call   1040 <VP8Clip8@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<VP8YUVToB>:
push   %rbp
push   %rbx
push   %rax
mov    %esi,%ebp
mov    $0x4a85,%esi
call   1030 <MultHi@plt>
mov    %rax,%rbx
mov    %ebp,%edi
mov    $0x811a,%esi
call   1030 <MultHi@plt>
lea    (%rbx,%rax,1),%rdi
add    $0xffffffffffffbaeb,%rdi
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1040 <VP8Clip8@plt>

LLVM IR (-O0):
define i32 @VP8YUVToB(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = call i64 @MultHi(i32 %5, i32 19077)
%7 = load i32, i32* %4
%8 = call i64 @MultHi(i32 %7, i32 33050)
%9 = add nsw i64 %6, %8
%10 = sub nsw i64 %9, 17685
%11 = call i32 @VP8Clip8(i64 %10)
ret i32 %11
}

LLVM IR (-O2):
define i32 @VP8YUVToB(i32 %0, i32 %1) {
%3 = tail call i64 @MultHi(i32 %0, i32 19077)
%4 = tail call i64 @MultHi(i32 %1, i32 33050)
%5 = add i64 %3, -17685
%6 = add i64 %5, %4
%7 = tail call i32 @VP8Clip8(i64 %6)
ret i32 %7
}
/* Variables and functions */
int /*<<< orphan*/ gets(char *);
int /*<<< orphan*/ printf(char *, ...);
int main() {
  char str[50];
  printf("Enter a string : ");
  gets(str);
  printf("You entered: %s", str);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
lea    0xed1(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
lea    -0x40(%rbp),%rdi
call   1040 <gets@plt>
lea    -0x40(%rbp),%rsi
lea    0xec8(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
sub    $0x40,%rsp
lea    0xed4(%rip),%rdi
xor    %eax,%eax
call   1030 <printf@plt>
mov    %rsp,%rbx
mov    %rbx,%rdi
call   1040 <gets@plt>
lea    0xecd(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x40,%rsp
pop    %rbx
ret

LLVM IR (-O0):
@.str = [18 x i8] c"Enter a string : \00"
@.str.1 = [16 x i8] c"You entered: %s\00"
define i32 @main() {
%1 = alloca [50 x i8]
%2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%3 = getelementptr inbounds [50 x i8], [50 x i8]* %1, i64 0, i64 0
%4 = call i32 @gets(i8* %3)
%5 = getelementptr inbounds [50 x i8], [50 x i8]* %1, i64 0, i64 0
%6 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [18 x i8] c"Enter a string : \00"
@.str.1 = [16 x i8] c"You entered: %s\00"
define i32 @main() {
%1 = alloca [50 x i8]
%2 = getelementptr inbounds [50 x i8], [50 x i8]* %1, i64 0, i64 0
%3 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
%4 = call i32 @gets(i8* %2)
%5 = call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([16 x i8], [16 x i8]* @.str.1, i64 0, i64 0), i8* %2)
ret i32 0
}
void rop3_224_0_1(unsigned char *D, unsigned char S, unsigned char T) {
  unsigned char stk1;
  unsigned char stk2;
  stk2 = *D | S;
  stk1 = T & stk2;
  *D = (stk1 & S) | (stk1 & (~T)) | (T & (~S) & *D);
}


x86 assembly (clang, -O0):
<rop3_224_0_1>:
push   %rbp
mov    %rsp,%rbp
mov    %dl,%al
mov    %sil,%cl
mov    %rdi,-0x8(%rbp)
mov    %cl,-0x9(%rbp)
mov    %al,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movzbl (%rax),%eax
movzbl -0x9(%rbp),%ecx
or     %ecx,%eax
mov    %al,-0xc(%rbp)
movzbl -0xa(%rbp),%eax
movzbl -0xc(%rbp),%ecx
and    %ecx,%eax
mov    %al,-0xb(%rbp)
movzbl -0xb(%rbp),%eax
movzbl -0x9(%rbp),%ecx
and    %ecx,%eax
movzbl -0xb(%rbp),%ecx
movzbl -0xa(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
or     %ecx,%eax
movzbl -0xa(%rbp),%ecx
movzbl -0x9(%rbp),%edx
xor    $0xffffffff,%edx
and    %edx,%ecx
mov    -0x8(%rbp),%rdx
movzbl (%rdx),%edx
and    %edx,%ecx
or     %ecx,%eax
mov    %al,%cl
mov    -0x8(%rbp),%rax
mov    %cl,(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<rop3_224_0_1>:
mov    %edx,%eax
and    %sil,%al
not    %sil
and    %dl,%sil
and    (%rdi),%sil
or     %al,%sil
mov    %sil,(%rdi)
ret

LLVM IR (-O0):
define void @rop3_224_0_1(i8* %0, i8 zeroext %1, i8 zeroext %2) {
%4 = alloca i8*
%5 = alloca i8
%6 = alloca i8
%7 = alloca i8
%8 = alloca i8
store i8* %0, i8** %4
store i8 %1, i8* %5
store i8 %2, i8* %6
%9 = load i8*, i8** %4
%10 = load i8, i8* %9
%11 = zext i8 %10 to i32
%12 = load i8, i8* %5
%13 = zext i8 %12 to i32
%14 = or i32 %11, %13
%15 = trunc i32 %14 to i8
store i8 %15, i8* %8
%16 = load i8, i8* %6
%17 = zext i8 %16 to i32
%18 = load i8, i8* %8
%19 = zext i8 %18 to i32
%20 = and i32 %17, %19
%21 = trunc i32 %20 to i8
store i8 %21, i8* %7
%22 = load i8, i8* %7
%23 = zext i8 %22 to i32
%24 = load i8, i8* %5
%25 = zext i8 %24 to i32
%26 = and i32 %23, %25
%27 = load i8, i8* %7
%28 = zext i8 %27 to i32
%29 = load i8, i8* %6
%30 = zext i8 %29 to i32
%31 = xor i32 %30, -1
%32 = and i32 %28, %31
%33 = or i32 %26, %32
%34 = load i8, i8* %6
%35 = zext i8 %34 to i32
%36 = load i8, i8* %5
%37 = zext i8 %36 to i32
%38 = xor i32 %37, -1
%39 = and i32 %35, %38
%40 = load i8*, i8** %4
%41 = load i8, i8* %40
%42 = zext i8 %41 to i32
%43 = and i32 %39, %42
%44 = or i32 %33, %43
%45 = trunc i32 %44 to i8
%46 = load i8*, i8** %4
store i8 %45, i8* %46
ret void
}

LLVM IR (-O2):
define void @rop3_224_0_1(i8* nocapture %0, i8 zeroext %1, i8 zeroext %2) {
%4 = load i8, i8* %0
%5 = and i8 %2, %1
%6 = xor i8 %1, -1
%7 = and i8 %6, %2
%8 = and i8 %7, %4
%9 = or i8 %8, %5
store i8 %9, i8* %0
ret void
}
void av_get_sample_fmt_name() {}


x86 assembly (clang, -O0):
<av_get_sample_fmt_name>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_get_sample_fmt_name>:
ret

LLVM IR (-O0):
define void @av_get_sample_fmt_name() {
ret void
}

LLVM IR (-O2):
define void @av_get_sample_fmt_name() {
ret void
}
/* Variables and functions */
float timer_get_delta();
float f_dt() { return timer_get_delta(); }


x86 assembly (clang, -O0):
<f_dt>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <timer_get_delta@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_dt>:
xor    %eax,%eax
jmp    1030 <timer_get_delta@plt>

LLVM IR (-O0):
define float @f_dt() {
%1 = call float (...) @timer_get_delta()
ret float %1
}

LLVM IR (-O2):
define float @f_dt() {
%1 = tail call float (...) @timer_get_delta()
ret float %1
}
int is_hexa(const char ch) {
  if ((ch >= '0' && ch <= '9') || (ch >= 'A' && ch <= 'F') ||
      (ch >= 'a' && ch <= 'f')) {
    return 1;
  } else {
    return 0;
  }
}


x86 assembly (clang, -O0):
<is_hexa>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
cmp    $0x30,%eax
jl     1124 <is_hexa+0x24>
movsbl -0x5(%rbp),%eax
cmp    $0x39,%eax
jle    1158 <is_hexa+0x58>
movsbl -0x5(%rbp),%eax
cmp    $0x41,%eax
jl     113e <is_hexa+0x3e>
movsbl -0x5(%rbp),%eax
cmp    $0x46,%eax
jle    1158 <is_hexa+0x58>
movsbl -0x5(%rbp),%eax
cmp    $0x61,%eax
jl     1164 <is_hexa+0x64>
movsbl -0x5(%rbp),%eax
cmp    $0x66,%eax
jg     1164 <is_hexa+0x64>
movl   $0x1,-0x4(%rbp)
jmp    116b <is_hexa+0x6b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_hexa>:
lea    -0x30(%rdi),%eax
cmp    $0xa,%al
setb   %al
and    $0xdf,%dil
add    $0xbf,%dil
cmp    $0x6,%dil
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @is_hexa(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sge i32 %5, 48
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 57
br i1 %10, label %27, label %11
11: ; preds = %7, %1
%12 = load i8, i8* %3
%13 = sext i8 %12 to i32
%14 = icmp sge i32 %13, 65
br i1 %14, label %15, label %19
15: ; preds = %11
%16 = load i8, i8* %3
%17 = sext i8 %16 to i32
%18 = icmp sle i32 %17, 70
br i1 %18, label %27, label %19
19: ; preds = %15, %11
%20 = load i8, i8* %3
%21 = sext i8 %20 to i32
%22 = icmp sge i32 %21, 97
br i1 %22, label %23, label %28
23: ; preds = %19
%24 = load i8, i8* %3
%25 = sext i8 %24 to i32
%26 = icmp sle i32 %25, 102
br i1 %26, label %27, label %28
27: ; preds = %23, %15, %7
store i32 1, i32* %2
br label %29
28: ; preds = %23, %19
store i32 0, i32* %2
br label %29
29: ; preds = %28, %27
%30 = load i32, i32* %2
ret i32 %30
}

LLVM IR (-O2):
define i32 @is_hexa(i8 signext %0) {
%2 = add i8 %0, -48
%3 = icmp ult i8 %2, 10
%4 = and i8 %0, -33
%5 = add i8 %4, -65
%6 = icmp ult i8 %5, 6
%7 = or i1 %3, %6
%8 = zext i1 %7 to i32
ret i32 %8
}
void f125(void) {
  ({
    ({ 0; });
    ({ 0; });
    0;
  });
  ({
    ({
      a:
        goto a;
        0;
    });
    ({ 0; });
    0;
  });
  0;
}


x86 assembly (clang, -O0):
<f125>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
jmp    1119 <f125+0x19>

x86 assembly (clang, -O2):
<f125>:
jmp    1100 <f125>

LLVM IR (-O0):
define void @f125() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 0, i32* %1
%6 = load i32, i32* %1
store i32 0, i32* %2
%7 = load i32, i32* %2
store i32 0, i32* %3
%8 = load i32, i32* %3
br label %9
9: ; preds = %9, %0
br label %9
}

LLVM IR (-O2):
define void @f125() {
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
int /*<<< orphan*/ printGoodbye();
int /*<<< orphan*/ printHello();
int main() {
  printHello();
  printGoodbye();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <printHello@plt>
mov    $0x0,%al
call   1040 <printGoodbye@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %eax,%eax
call   1030 <printHello@plt>
xor    %eax,%eax
call   1040 <printGoodbye@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 (...) @printHello()
%3 = call i32 (...) @printGoodbye()
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 (...) @printHello()
%2 = tail call i32 (...) @printGoodbye()
ret i32 0
}
/* Forward declarations */
typedef struct TYPE_2__ TYPE_1__;

/* Type definitions */
struct TYPE_2__ {
  scalar_t__ send_event;
};
typedef TYPE_1__ XFocusOutEvent;

/* Variables and functions */
int get_XFocusOutEvent_send_event(void *_p) {
  return (int)((XFocusOutEvent *)_p)->send_event;
}


x86 assembly (clang, -O0):
<get_XFocusOutEvent_send_event>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_XFocusOutEvent_send_event>:
mov    (%rdi),%eax
ret

LLVM IR (-O0):
%struct.TYPE_2__ = type { i64 }
define i32 @get_XFocusOutEvent_send_event(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = bitcast i8* %3 to %struct.TYPE_2__*
%5 = getelementptr inbounds %struct.TYPE_2__, %struct.TYPE_2__* %4, i32 0, i32 0
%6 = load i64, i64* %5
%7 = trunc i64 %6 to i32
ret i32 %7
}

LLVM IR (-O2):
define i32 @get_XFocusOutEvent_send_event(i8* nocapture %0) {
%2 = bitcast i8* %0 to i64*
%3 = load i64, i64* %2
%4 = trunc i64 %3 to i32
ret i32 %4
}
void mdp4_mddi_vsync_ctrl(struct fb_info *info, int enable) {}


x86 assembly (clang, -O0):
<mdp4_mddi_vsync_ctrl>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdp4_mddi_vsync_ctrl>:
ret

LLVM IR (-O0):
%struct.fb_info = type opaque
define void @mdp4_mddi_vsync_ctrl(%struct.fb_info* %0, i32 %1) {
%3 = alloca %struct.fb_info*
%4 = alloca i32
store %struct.fb_info* %0, %struct.fb_info** %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
%struct.fb_info = type opaque
define void @mdp4_mddi_vsync_ctrl(%struct.fb_info* nocapture %0, i32 %1) {
ret void
}
int tls_init(void) { return -1; }


x86 assembly (clang, -O0):
<tls_init>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tls_init>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @tls_init() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @tls_init() {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ NSubTab(char);
void IF_NsubTabR(void) { NSubTab((char)1); }


x86 assembly (clang, -O0):
<IF_NsubTabR>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <NSubTab@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<IF_NsubTabR>:
mov    $0x1,%edi
jmp    1030 <NSubTab@plt>

LLVM IR (-O0):
define void @IF_NsubTabR() {
%1 = call i32 @NSubTab(i8 signext 1)
ret void
}

LLVM IR (-O2):
define void @IF_NsubTabR() {
%1 = tail call i32 @NSubTab(i8 signext 1)
ret void
}
void childChildHandler(int sig) {}


x86 assembly (clang, -O0):
<childChildHandler>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<childChildHandler>:
ret

LLVM IR (-O0):
define void @childChildHandler(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @childChildHandler(i32 %0) {
ret void
}
/* Variables and functions */
int strlen(char *);
int mvsize(unsigned char *s, int nbytes) {
  return strlen((char *)s + nbytes) + 1;
}


x86 assembly (clang, -O0):
<mvsize>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
movslq -0xc(%rbp),%rax
add    %rax,%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mvsize>:
push   %rax
movslq %esi,%rax
add    %rax,%rdi
call   1030 <strlen@plt>
add    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @mvsize(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = call i32 @strlen(i8* %8)
%10 = add nsw i32 %9, 1
ret i32 %10
}

LLVM IR (-O2):
define i32 @mvsize(i8* %0, i32 %1) {
%3 = sext i32 %1 to i64
%4 = getelementptr inbounds i8, i8* %0, i64 %3
%5 = tail call i32 @strlen(i8* %4)
%6 = add nsw i32 %5, 1
ret i32 %6
}
/* Variables and functions */
int /*<<< orphan*/ VIM_SIF_I2cReadByte(unsigned char, unsigned char *);
void SensorGetReg_MC501CB(unsigned char uAddr, unsigned short *uVal) {
  VIM_SIF_I2cReadByte((unsigned char)uAddr, (unsigned char *)uVal);
}


x86 assembly (clang, -O0):
<SensorGetReg_MC501CB>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x1(%rbp),%al
mov    -0x10(%rbp),%rsi
movzbl %al,%edi
call   1030 <VIM_SIF_I2cReadByte@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SensorGetReg_MC501CB>:
jmp    1030 <VIM_SIF_I2cReadByte@plt>

LLVM IR (-O0):
define void @SensorGetReg_MC501CB(i8 zeroext %0, i16* %1) {
%3 = alloca i8
%4 = alloca i16*
store i8 %0, i8* %3
store i16* %1, i16** %4
%5 = load i8, i8* %3
%6 = load i16*, i16** %4
%7 = bitcast i16* %6 to i8*
%8 = call i32 @VIM_SIF_I2cReadByte(i8 zeroext %5, i8* %7)
ret void
}

LLVM IR (-O2):
define void @SensorGetReg_MC501CB(i8 zeroext %0, i16* %1) {
%3 = bitcast i16* %1 to i8*
%4 = tail call i32 @VIM_SIF_I2cReadByte(i8 zeroext %0, i8* %3)
ret void
}
void av_tree_insert() {}


x86 assembly (clang, -O0):
<av_tree_insert>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<av_tree_insert>:
ret

LLVM IR (-O0):
define void @av_tree_insert() {
ret void
}

LLVM IR (-O2):
define void @av_tree_insert() {
ret void
}
void ExttShippingAuxTable(void) {}


x86 assembly (clang, -O0):
<ExttShippingAuxTable>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ExttShippingAuxTable>:
ret

LLVM IR (-O0):
define void @ExttShippingAuxTable() {
ret void
}

LLVM IR (-O2):
define void @ExttShippingAuxTable() {
ret void
}
int get_exponent(double n) {
  unsigned long long *i;
  unsigned short exponent;
  i = (unsigned long long *)&n;
  exponent = (unsigned short)(*i >> 52 & 0x7FF);
  return ((int)exponent - 1023);
}


x86 assembly (clang, -O0):
<get_exponent>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
lea    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
shr    $0x34,%rax
and    $0x7ff,%rax
mov    %ax,-0x12(%rbp)
movzwl -0x12(%rbp),%eax
sub    $0x3ff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_exponent>:
movq   %xmm0,%rax
shr    $0x34,%rax
and    $0x7ff,%eax
add    $0xfffffc01,%eax
ret

LLVM IR (-O0):
define i32 @get_exponent(double %0) {
%2 = alloca double
%3 = alloca i64*
%4 = alloca i16
store double %0, double* %2
%5 = bitcast double* %2 to i64*
store i64* %5, i64** %3
%6 = load i64*, i64** %3
%7 = load i64, i64* %6
%8 = lshr i64 %7, 52
%9 = and i64 %8, 2047
%10 = trunc i64 %9 to i16
store i16 %10, i16* %4
%11 = load i16, i16* %4
%12 = zext i16 %11 to i32
%13 = sub nsw i32 %12, 1023
ret i32 %13
}

LLVM IR (-O2):
define i32 @get_exponent(double %0) {
%2 = bitcast double %0 to i64
%3 = lshr i64 %2, 52
%4 = trunc i64 %3 to i32
%5 = and i32 %4, 2047
%6 = add nsw i32 %5, -1023
ret i32 %6
}
void X509_EXTENSION_set_data(void) {}


x86 assembly (clang, -O0):
<X509_EXTENSION_set_data>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<X509_EXTENSION_set_data>:
ret

LLVM IR (-O0):
define void @X509_EXTENSION_set_data() {
ret void
}

LLVM IR (-O2):
define void @X509_EXTENSION_set_data() {
ret void
}
long function(char t[4]) { return (long)t; }


x86 assembly (clang, -O0):
<function>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<function>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i64 @function(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = ptrtoint i8* %3 to i64
ret i64 %4
}

LLVM IR (-O2):
define i64 @function(i8* %0) {
%2 = ptrtoint i8* %0 to i64
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int /*<<< orphan*/, char *, int, char *);
int /*<<< orphan*/ isgraph(int);
void t_isgraph_0x52() {
  Assert_real((isgraph(82)),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isgraph.c",
              415, ("isgraph should be 1 for R"));
}


x86 assembly (clang, -O0):
<t_isgraph_0x52>:
push   %rbp
mov    %rsp,%rbp
mov    $0x52,%edi
call   1040 <isgraph@plt>
mov    %eax,%edi
lea    0xec9(%rip),%rsi
mov    $0x19f,%edx
lea    0xf65(%rip),%rcx
call   1030 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isgraph_0x52>:
push   %rax
mov    $0x52,%edi
call   1040 <isgraph@plt>
lea    0xece(%rip),%rsi
lea    0xf6f(%rip),%rcx
mov    %eax,%edi
mov    $0x19f,%edx
pop    %rax
jmp    1030 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for R\00"
define void @t_isgraph_0x52() {
%1 = call i32 @isgraph(i32 82)
%2 = call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 415, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isgraph.c\00"
@.str.1 = [26 x i8] c"isgraph should be 1 for R\00"
define void @t_isgraph_0x52() {
%1 = tail call i32 @isgraph(i32 82)
%2 = tail call i32 @Assert_real(i32 %1, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 415, i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ set_configuration_value(char *, char *);
void init_config_default_values() {
  set_configuration_value("save-text-history-paragraphs", "1000");
}


x86 assembly (clang, -O0):
<init_config_default_values>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xefb(%rip),%rsi
call   1030 <set_configuration_value@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<init_config_default_values>:
lea    0xee9(%rip),%rdi
lea    0xeff(%rip),%rsi
jmp    1030 <set_configuration_value@plt>

LLVM IR (-O0):
@.str = [29 x i8] c"save-text-history-paragraphs\00"
@.str.1 = [5 x i8] c"1000\00"
define void @init_config_default_values() {
%1 = call i32 @set_configuration_value(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [29 x i8] c"save-text-history-paragraphs\00"
@.str.1 = [5 x i8] c"1000\00"
define void @init_config_default_values() {
%1 = tail call i32 @set_configuration_value(i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str.1, i64 0, i64 0))
ret void
}