xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ ol(char *);
gcom() { ol("mcoml\tr0,r0"); }


x86 assembly (clang, -O0):
<gcom>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <ol@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gcom>:
lea    0xee9(%rip),%rdi
jmp    1030 <ol@plt>

LLVM IR (-O0):
@.str = [12 x i8] c"mcoml\09r0,r0\00"
define i32 @gcom() {
%1 = alloca i32
%2 = call i32 @ol(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@.str = [12 x i8] c"mcoml\09r0,r0\00"
define i32 @gcom() {
%1 = tail call i32 @ol(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0))
ret i32 undef
}
/* Variables and functions */
int /*<<< orphan*/ clear_icr(int);
int get_icr();
void clear_interrupt(int type) {
  int icr;
  icr = get_icr();
  icr = icr & type;
  clear_icr(icr);
}


x86 assembly (clang, -O0):
<clear_interrupt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x0,%al
call   1030 <get_icr@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
and    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%edi
call   1040 <clear_icr@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<clear_interrupt>:
push   %rbx
mov    %edi,%ebx
xor    %eax,%eax
call   1030 <get_icr@plt>
and    %eax,%ebx
mov    %ebx,%edi
pop    %rbx
jmp    1040 <clear_icr@plt>

LLVM IR (-O0):
define void @clear_interrupt(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = call i32 (...) @get_icr()
store i32 %4, i32* %3
%5 = load i32, i32* %3
%6 = load i32, i32* %2
%7 = and i32 %5, %6
store i32 %7, i32* %3
%8 = load i32, i32* %3
%9 = call i32 @clear_icr(i32 %8)
ret void
}

LLVM IR (-O2):
define void @clear_interrupt(i32 %0) {
%2 = tail call i32 (...) @get_icr()
%3 = and i32 %2, %0
%4 = tail call i32 @clear_icr(i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ CTIMER0_DriverIRQHandler();
__attribute__((weak)) void CTIMER0_IRQHandler(void) {
  CTIMER0_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<CTIMER0_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <CTIMER0_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<CTIMER0_IRQHandler>:
xor    %eax,%eax
jmp    1030 <CTIMER0_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @CTIMER0_IRQHandler() {
%1 = call i32 (...) @CTIMER0_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @CTIMER0_IRQHandler() {
%1 = tail call i32 (...) @CTIMER0_DriverIRQHandler()
ret void
}
/* Variables and functions */
int fib(int);
int /*<<< orphan*/ printf(char *, int);
int main() { printf("%d\n", fib(10)); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
mov    $0xa,%edi
call   1040 <fib@plt>
mov    %eax,%esi
lea    0xec9(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
mov    $0xa,%edi
call   1040 <fib@plt>
lea    0xece(%rip),%rdi
mov    %eax,%esi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = call i32 @fib(i32 10)
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @fib(i32 10)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %1)
ret i32 0
}
/* Variables and functions */
int adjustmode(int, int /*<<< orphan*/);
setmod(int f, int n) { return (adjustmode(1, 0)); }


x86 assembly (clang, -O0):
<setmod>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    $0x1,%edi
xor    %esi,%esi
call   1030 <adjustmode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setmod>:
mov    $0x1,%edi
xor    %esi,%esi
jmp    1030 <adjustmode@plt>

LLVM IR (-O0):
define i32 @setmod(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = call i32 @adjustmode(i32 1, i32 0)
ret i32 %5
}

LLVM IR (-O2):
define i32 @setmod(i32 %0, i32 %1) {
%3 = tail call i32 @adjustmode(i32 1, i32 0)
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ bef_push(int);
int ins_nm9() {
  bef_push(9);
  return 1;
}


x86 assembly (clang, -O0):
<ins_nm9>:
push   %rbp
mov    %rsp,%rbp
mov    $0x9,%edi
call   1030 <bef_push@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ins_nm9>:
push   %rax
mov    $0x9,%edi
call   1030 <bef_push@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @ins_nm9() {
%1 = call i32 @bef_push(i32 9)
ret i32 1
}

LLVM IR (-O2):
define i32 @ins_nm9() {
%1 = tail call i32 @bef_push(i32 9)
ret i32 1
}
/* Variables and functions */
scalar_t__ rtai_srq(int /*<<< orphan*/, unsigned long);
int rtai_open_srq(unsigned long label) { return (int)rtai_srq(0, label); }


x86 assembly (clang, -O0):
<rtai_open_srq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
xor    %edi,%edi
call   1030 <rtai_srq@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<rtai_open_srq>:
mov    %rdi,%rsi
xor    %edi,%edi
jmp    1030 <rtai_srq@plt>

LLVM IR (-O0):
define i32 @rtai_open_srq(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = call i64 @rtai_srq(i32 0, i64 %3)
%5 = trunc i64 %4 to i32
ret i32 %5
}

LLVM IR (-O2):
define i32 @rtai_open_srq(i64 %0) {
%2 = tail call i64 @rtai_srq(i32 0, i64 %0)
%3 = trunc i64 %2 to i32
ret i32 %3
}
/* Variables and functions */
int EXIT_SUCCESS;
int /*<<< orphan*/ printf(char *, char);
int main(void) {
  char uch = 0xFF;
  signed char ch = 0xFF;
  int val = (uch == ch);
  printf("Result is: %d\n", val);
  printf("(unsigned) char 0x%08x\n", uch);
  printf("    signed char 0x%08x\n", ch);
  return (EXIT_SUCCESS);
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movb   $0xff,-0x5(%rbp)
movb   $0xff,-0x6(%rbp)
movsbl -0x5(%rbp),%eax
movsbl -0x6(%rbp),%ecx
cmp    %ecx,%eax
sete   %al
and    $0x1,%al
movzbl %al,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
lea    0xeba(%rip),%rdi
movsbl %al,%esi
call   1030 <printf@plt>
lea    0xeba(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <printf@plt>
lea    0xec2(%rip),%rdi
movsbl -0x6(%rbp),%esi
call   1030 <printf@plt>
mov    0x2e6b(%rip),%rax
mov    (%rax),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
mov    $0x1,%esi
call   1030 <printf@plt>
lea    0xee6(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
lea    0xeed(%rip),%rdi
mov    $0xffffffff,%esi
call   1030 <printf@plt>
mov    0x2e95(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [15 x i8] c"Result is: %d\0A\00"
@.str.1 = [24 x i8] c"(unsigned) char 0x%08x\0A\00"
@.str.2 = [24 x i8] c" signed char 0x%08x\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = alloca i32
%2 = alloca i8
%3 = alloca i8
%4 = alloca i32
store i32 0, i32* %1
store i8 -1, i8* %2
store i8 -1, i8* %3
%5 = load i8, i8* %2
%6 = sext i8 %5 to i32
%7 = load i8, i8* %3
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %6, %8
%10 = zext i1 %9 to i32
store i32 %10, i32* %4
%11 = load i32, i32* %4
%12 = trunc i32 %11 to i8
%13 = call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8 signext %12)
%14 = load i8, i8* %2
%15 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i8 signext %14)
%16 = load i8, i8* %3
%17 = call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.2, i64 0, i64 0), i8 signext %16)
%18 = load i32, i32* @EXIT_SUCCESS
ret i32 %18
}

LLVM IR (-O2):
@.str = [15 x i8] c"Result is: %d\0A\00"
@.str.1 = [24 x i8] c"(unsigned) char 0x%08x\0A\00"
@.str.2 = [24 x i8] c" signed char 0x%08x\0A\00"
@EXIT_SUCCESS = global i32 0
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0), i8 signext 1)
%2 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.1, i64 0, i64 0), i8 signext -1)
%3 = tail call i32 @printf(i8* getelementptr inbounds ([24 x i8], [24 x i8]* @.str.2, i64 0, i64 0), i8 signext -1)
%4 = load i32, i32* @EXIT_SUCCESS
ret i32 %4
}
/* Type definitions */
typedef int uint8_t;
typedef int uint64_t;

/* Variables and functions */
uint8_t isSoftDirty(uint64_t v) { return ((v >> 55) & 1); }


x86 assembly (clang, -O0):
<isSoftDirty>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    $0x37,%ecx
sar    %cl,%eax
and    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isSoftDirty>:
ret

LLVM IR (-O0):
define i32 @isSoftDirty(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = ashr i32 %3, 55
%5 = and i32 %4, 1
ret i32 %5
}

LLVM IR (-O2):
define i32 @isSoftDirty(i32 %0) {
ret i32 poison
}
/* Variables and functions */
int getopt_internal(int, char **, char *, int /*<<< orphan*/ *,
                    int /*<<< orphan*/ *, int /*<<< orphan*/);
int getopt(int argc, char **argv, char *optstring) {
  return getopt_internal(argc, argv, optstring, NULL, NULL, 0);
}


x86 assembly (clang, -O0):
<getopt>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
mov    %r8,%rcx
call   1030 <getopt_internal@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getopt>:
xor    %ecx,%ecx
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <getopt_internal@plt>

LLVM IR (-O0):
define i32 @getopt(i32 %0, i8** %1, i8* %2) {
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* %2, i8** %6
%7 = load i32, i32* %4
%8 = load i8**, i8*** %5
%9 = load i8*, i8** %6
%10 = call i32 @getopt_internal(i32 %7, i8** %8, i8* %9, i32* null, i32* null, i32 0)
ret i32 %10
}

LLVM IR (-O2):
define i32 @getopt(i32 %0, i8** %1, i8* %2) {
%4 = tail call i32 @getopt_internal(i32 %0, i8** %1, i8* %2, i32* null, i32* null, i32 0)
ret i32 %4
}
long long bit20() { return 0x0000000000100000LL; }


x86 assembly (clang, -O0):
<bit20>:
push   %rbp
mov    %rsp,%rbp
mov    $0x100000,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bit20>:
mov    $0x100000,%eax
ret

LLVM IR (-O0):
define i64 @bit20() {
ret i64 1048576
}

LLVM IR (-O2):
define i64 @bit20() {
ret i64 1048576
}
/* Variables and functions */
unsigned int get_servo_speedB(unsigned char);
unsigned int get_servo_speed_b(unsigned char servoNum) {
  return get_servo_speedB(servoNum);
}


x86 assembly (clang, -O0):
<get_servo_speed_b>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%edi
call   1030 <get_servo_speedB@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_servo_speed_b>:
jmp    1030 <get_servo_speedB@plt>

LLVM IR (-O0):
define i32 @get_servo_speed_b(i8 zeroext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i32 @get_servo_speedB(i8 zeroext %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @get_servo_speed_b(i8 zeroext %0) {
%2 = tail call i32 @get_servo_speedB(i8 zeroext %0)
ret i32 %2
}
void LedsP$Led1$set(void) { NoPinC$0$GeneralIO$set(); }


x86 assembly (clang, -O0):
<LedsP$Led1$set>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <NoPinC$0$GeneralIO$set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<LedsP$Led1$set>:
xor    %eax,%eax
jmp    1030 <NoPinC$0$GeneralIO$set@plt>

LLVM IR (-O0):
define void @"LedsP$Led1$set"() {
%1 = call i32 (...) @"NoPinC$0$GeneralIO$set"()
ret void
}

LLVM IR (-O2):
define void @"LedsP$Led1$set"() {
%1 = tail call i32 (...) @"NoPinC$0$GeneralIO$set"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ SYS_getrandom;
int syscall(int /*<<< orphan*/, void *, size_t, unsigned int);
int fill_rand(void *buf, size_t buflen) {
  unsigned int flags;
  flags = 0;
  return syscall(SYS_getrandom, buf, buflen, flags);
}


x86 assembly (clang, -O0):
<fill_rand>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    0x2eba(%rip),%rax
mov    (%rax),%edi
mov    -0x8(%rbp),%rsi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fill_rand>:
mov    %rsi,%rdx
mov    %rdi,%rsi
mov    0x2ecb(%rip),%rax
mov    (%rax),%edi
xor    %ecx,%ecx
jmp    1030 <syscall@plt>

LLVM IR (-O0):
@SYS_getrandom = global i32 0
define i32 @fill_rand(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
store i32 0, i32* %5
%6 = load i32, i32* @SYS_getrandom
%7 = load i8*, i8** %3
%8 = load i64, i64* %4
%9 = load i32, i32* %5
%10 = call i32 @syscall(i32 %6, i8* %7, i64 %8, i32 %9)
ret i32 %10
}

LLVM IR (-O2):
@SYS_getrandom = global i32 0
define i32 @fill_rand(i8* %0, i64 %1) {
%3 = load i32, i32* @SYS_getrandom
%4 = tail call i32 @syscall(i32 %3, i8* %0, i64 %1, i32 0)
ret i32 %4
}
int rt_thread_set_self_cpuaffinity(int cpu) {
  int status = -1;
  return status;
}


x86 assembly (clang, -O0):
<rt_thread_set_self_cpuaffinity>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0xffffffff,-0x8(%rbp)
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rt_thread_set_self_cpuaffinity>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @rt_thread_set_self_cpuaffinity(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 -1, i32* %3
%4 = load i32, i32* %3
ret i32 %4
}

LLVM IR (-O2):
define i32 @rt_thread_set_self_cpuaffinity(i32 %0) {
ret i32 -1
}
int test02(short *a, short *b, int c, int d) {
  if (*a & *b)
    return c;
  return d;
}


x86 assembly (clang, -O0):
<test02>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    %ecx,-0x20(%rbp)
mov    -0x10(%rbp),%rax
movswl (%rax),%eax
mov    -0x18(%rbp),%rcx
movswl (%rcx),%ecx
and    %ecx,%eax
cmp    $0x0,%eax
je     1136 <test02+0x36>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    113c <test02+0x3c>
mov    -0x20(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test02>:
mov    %edx,%eax
movzwl (%rsi),%edx
test   %dx,(%rdi)
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test02(i16* %0, i16* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i16*
%7 = alloca i16*
%8 = alloca i32
%9 = alloca i32
store i16* %0, i16** %6
store i16* %1, i16** %7
store i32 %2, i32* %8
store i32 %3, i32* %9
%10 = load i16*, i16** %6
%11 = load i16, i16* %10
%12 = sext i16 %11 to i32
%13 = load i16*, i16** %7
%14 = load i16, i16* %13
%15 = sext i16 %14 to i32
%16 = and i32 %12, %15
%17 = icmp ne i32 %16, 0
br i1 %17, label %18, label %20
18: ; preds = %4
%19 = load i32, i32* %8
store i32 %19, i32* %5
br label %22
20: ; preds = %4
%21 = load i32, i32* %9
store i32 %21, i32* %5
br label %22
22: ; preds = %20, %18
%23 = load i32, i32* %5
ret i32 %23
}

LLVM IR (-O2):
define i32 @test02(i16* nocapture %0, i16* nocapture %1, i32 %2, i32 %3) {
%5 = load i16, i16* %0
%6 = load i16, i16* %1
%7 = and i16 %6, %5
%8 = icmp eq i16 %7, 0
%9 = select i1 %8, i32 %3, i32 %2
ret i32 %9
}
int is_valid_pose_separator(char ch) {
  return (ch == '\'') || (ch == ' ') || (ch == ',') || (ch == '-');
}


x86 assembly (clang, -O0):
<is_valid_pose_separator>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x27,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_valid_pose_separator+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x20,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_valid_pose_separator+0x4d>
movsbl -0x1(%rbp),%ecx
mov    $0x1,%al
cmp    $0x2c,%ecx
mov    %al,-0x2(%rbp)
je     114d <is_valid_pose_separator+0x4d>
movsbl -0x1(%rbp),%eax
cmp    $0x2d,%eax
sete   %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<is_valid_pose_separator>:
cmp    $0x2c,%dil
ja     1120 <is_valid_pose_separator+0x20>
mov    $0x1,%eax
movzbl %dil,%ecx
movabs $0x108100000000,%rdx
bt     %rcx,%rdx
jae    1120 <is_valid_pose_separator+0x20>
ret
xor    %eax,%eax
cmp    $0x2d,%dil
sete   %al
ret

LLVM IR (-O0):
define i32 @is_valid_pose_separator(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = sext i8 %3 to i32
%5 = icmp eq i32 %4, 39
br i1 %5, label %18, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = sext i8 %7 to i32
%9 = icmp eq i32 %8, 32
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i8, i8* %2
%12 = sext i8 %11 to i32
%13 = icmp eq i32 %12, 44
br i1 %13, label %18, label %14
14: ; preds = %10
%15 = load i8, i8* %2
%16 = sext i8 %15 to i32
%17 = icmp eq i32 %16, 45
br label %18
18: ; preds = %14, %10, %6, %1
%19 = phi i1 [ true, %10 ], [ true, %6 ], [ true, %1 ], [ %17, %14 ]
%20 = zext i1 %19 to i32
ret i32 %20
}

LLVM IR (-O2):
define i32 @is_valid_pose_separator(i8 signext %0) {
switch i8 %0, label %2 [
i8 44, label %5
i8 39, label %5
i8 32, label %5
]
2: ; preds = %1
%3 = icmp eq i8 %0, 45
%4 = zext i1 %3 to i32
br label %5
5: ; preds = %1, %1, %1, %2
%6 = phi i32 [ 1, %1 ], [ %4, %2 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %6
}
/* Type definitions */
typedef unsigned int uint64_t;
typedef unsigned int uint32_t;

/* Variables and functions */
unsigned long ar933x_uart_get_baud(unsigned int clk, unsigned int scale,
                                   unsigned int step) {
  uint64_t t;
  uint64_t div;
  div = (2 << 16) * (scale + 1);
  t = clk;
  t *= step;
  t += (div / 2);
  ({
    uint32_t __base = (div);
    uint32_t __rem;
    __rem = ((uint64_t)(t)) % __base;
    (t) = ((uint64_t)(t)) / __base;
    __rem;
  });
  return t;
}


x86 assembly (clang, -O0):
<ar933x_uart_get_baud>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    -0x8(%rbp),%eax
add    $0x1,%eax
shl    $0x11,%eax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0xc(%rbp),%eax
imul   -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
shr    $0x1,%eax
add    -0x10(%rbp),%eax
mov    %eax,-0x10(%rbp)
mov    -0x14(%rbp),%eax
mov    %eax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
xor    %edx,%edx
divl   -0x18(%rbp)
mov    %edx,-0x1c(%rbp)
mov    -0x10(%rbp),%eax
xor    %edx,%edx
divl   -0x18(%rbp)
mov    %eax,-0x10(%rbp)
mov    -0x1c(%rbp),%eax
mov    %eax,-0x20(%rbp)
mov    -0x10(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ar933x_uart_get_baud>:
shl    $0x11,%esi
add    $0x20000,%esi
imul   %edx,%edi
mov    %esi,%eax
shr    %eax
add    %edi,%eax
xor    %edx,%edx
div    %esi
ret

LLVM IR (-O0):
define i64 @ar933x_uart_get_baud(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%12 = load i32, i32* %5
%13 = add i32 %12, 1
%14 = mul i32 131072, %13
store i32 %14, i32* %8
%15 = load i32, i32* %4
store i32 %15, i32* %7
%16 = load i32, i32* %6
%17 = load i32, i32* %7
%18 = mul i32 %17, %16
store i32 %18, i32* %7
%19 = load i32, i32* %8
%20 = udiv i32 %19, 2
%21 = load i32, i32* %7
%22 = add i32 %21, %20
store i32 %22, i32* %7
%23 = load i32, i32* %8
store i32 %23, i32* %9
%24 = load i32, i32* %7
%25 = load i32, i32* %9
%26 = urem i32 %24, %25
store i32 %26, i32* %10
%27 = load i32, i32* %7
%28 = load i32, i32* %9
%29 = udiv i32 %27, %28
store i32 %29, i32* %7
%30 = load i32, i32* %10
store i32 %30, i32* %11
%31 = load i32, i32* %11
%32 = load i32, i32* %7
%33 = zext i32 %32 to i64
ret i64 %33
}

LLVM IR (-O2):
define i64 @ar933x_uart_get_baud(i32 %0, i32 %1, i32 %2) {
%4 = shl i32 %1, 17
%5 = add i32 %4, 131072
%6 = mul i32 %2, %0
%7 = lshr exact i32 %5, 1
%8 = add i32 %7, %6
%9 = udiv i32 %8, %5
%10 = zext i32 %9 to i64
ret i64 %10
}
long long GetN() { return 28; }


x86 assembly (clang, -O0):
<GetN>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1c,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<GetN>:
mov    $0x1c,%eax
ret

LLVM IR (-O0):
define i64 @GetN() {
ret i64 28
}

LLVM IR (-O2):
define i64 @GetN() {
ret i64 28
}
/* Variables and functions */
int /*<<< orphan*/ scanf(char *, int *);
void read(int a[]) {
  int i;
  for (i = 0; i < *a; scanf("%d", ++i + a))
    ;
}


x86 assembly (clang, -O0):
<read>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    -0x8(%rbp),%rcx
cmp    (%rcx),%eax
jge    115e <read+0x4e>
jmp    1137 <read+0x27>
mov    -0xc(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0xc(%rbp)
mov    -0x8(%rbp),%rsi
cltq
shl    $0x2,%rax
add    %rax,%rsi
lea    0xeac(%rip),%rdi
call   1030 <scanf@plt>
jmp    1123 <read+0x13>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
cmpl   $0x0,(%rdi)
jle    114b <read+0x3b>
mov    %rdi,%r14
lea    0x4(%rdi),%r12
xor    %ebx,%ebx
lea    0xed3(%rip),%r15
nopl   (%rax)
add    $0x1,%rbx
mov    %r15,%rdi
mov    %r12,%rsi
call   1030 <scanf@plt>
movslq (%r14),%rax
add    $0x4,%r12
cmp    %rax,%rbx
jl     1130 <read+0x20>
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
define void @read(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
store i32 0, i32* %3
br label %4
4: ; preds = %10, %1
%5 = load i32, i32* %3
%6 = load i32*, i32** %2
%7 = load i32, i32* %6
%8 = icmp slt i32 %5, %7
br i1 %8, label %9, label %17
9: ; preds = %4
br label %10
10: ; preds = %9
%11 = load i32, i32* %3
%12 = add nsw i32 %11, 1
store i32 %12, i32* %3
%13 = load i32*, i32** %2
%14 = sext i32 %12 to i64
%15 = getelementptr inbounds i32, i32* %13, i64 %14
%16 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %15)
br label %4
17: ; preds = %4
ret void
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
define void @read(i32* %0) {
%2 = load i32, i32* %0
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %12
4: ; preds = %1, %4
%5 = phi i64 [ %6, %4 ], [ 0, %1 ]
%6 = add nuw nsw i64 %5, 1
%7 = getelementptr inbounds i32, i32* %0, i64 %6
%8 = tail call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %7)
%9 = load i32, i32* %0
%10 = sext i32 %9 to i64
%11 = icmp slt i64 %6, %10
br i1 %11, label %4, label %12
12: ; preds = %4, %1
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ internal_fiat_p521_carry(uintptr_t, uintptr_t);
void fiat_p521_carry(uint64_t out1[9], const uint64_t arg1[9]) {
  internal_fiat_p521_carry((uintptr_t)out1, (uintptr_t)arg1);
}


x86 assembly (clang, -O0):
<fiat_p521_carry>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <internal_fiat_p521_carry@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fiat_p521_carry>:
jmp    1030 <internal_fiat_p521_carry@plt>

LLVM IR (-O0):
define void @fiat_p521_carry(i32* %0, i32* %1) {
%3 = alloca i32*
%4 = alloca i32*
store i32* %0, i32** %3
store i32* %1, i32** %4
%5 = load i32*, i32** %3
%6 = ptrtoint i32* %5 to i64
%7 = load i32*, i32** %4
%8 = ptrtoint i32* %7 to i64
%9 = call i32 @internal_fiat_p521_carry(i64 %6, i64 %8)
ret void
}

LLVM IR (-O2):
define void @fiat_p521_carry(i32* %0, i32* %1) {
%3 = ptrtoint i32* %0 to i64
%4 = ptrtoint i32* %1 to i64
%5 = tail call i32 @internal_fiat_p521_carry(i64 %3, i64 %4)
ret void
}
short stringLength(char *str) {
  short i = 0;
  while (str[i]) {
    i++;
  }
  return i;
}


x86 assembly (clang, -O0):
<stringLength>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movw   $0x0,-0xa(%rbp)
mov    -0x8(%rbp),%rax
movswq -0xa(%rbp),%rcx
cmpb   $0x0,(%rax,%rcx,1)
je     1132 <stringLength+0x32>
mov    -0xa(%rbp),%ax
add    $0x1,%ax
mov    %ax,-0xa(%rbp)
jmp    110e <stringLength+0xe>
movswl -0xa(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringLength>:
mov    $0xffff,%ax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
add    $0x1,%eax
movswq %ax,%rcx
cmpb   $0x0,(%rdi,%rcx,1)
jne    1110 <stringLength+0x10>
ret

LLVM IR (-O0):
define signext i16 @stringLength(i8* %0) {
%2 = alloca i8*
%3 = alloca i16
store i8* %0, i8** %2
store i16 0, i16* %3
br label %4
4: ; preds = %11, %1
%5 = load i8*, i8** %2
%6 = load i16, i16* %3
%7 = sext i16 %6 to i64
%8 = getelementptr inbounds i8, i8* %5, i64 %7
%9 = load i8, i8* %8
%10 = icmp ne i8 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %4
%12 = load i16, i16* %3
%13 = add i16 %12, 1
store i16 %13, i16* %3
br label %4
14: ; preds = %4
%15 = load i16, i16* %3
ret i16 %15
}

LLVM IR (-O2):
define signext i16 @stringLength(i8* nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i16 [ 0, %1 ], [ %8, %2 ]
%4 = sext i16 %3 to i64
%5 = getelementptr inbounds i8, i8* %0, i64 %4
%6 = load i8, i8* %5
%7 = icmp eq i8 %6, 0
%8 = add i16 %3, 1
br i1 %7, label %9, label %2
9: ; preds = %2
ret i16 %3
}
int main(void) {
  int i = 1;
  int j = 1;
  if (i != 0 || j != 0)
    __builtin_abort();
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x1,-0x8(%rbp)
movl   $0x1,-0xc(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1141 <main+0x31>
cmpl   $0x0,-0xc(%rbp)
je     1146 <main+0x36>
call   1030 <abort@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
call   1030 <abort@plt>

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
%3 = alloca i32
store i32 0, i32* %1
store i32 1, i32* %2
store i32 1, i32* %3
%4 = load i32, i32* %2
%5 = icmp ne i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %0
%7 = load i32, i32* %3
%8 = icmp ne i32 %7, 0
br i1 %8, label %9, label %10
9: ; preds = %6, %0
unreachable
10: ; preds = %6
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
tail call void @abort()
unreachable
}
/* Variables and functions */
int /*<<< orphan*/ Assert_real(int, char *, int, char *);
scalar_t__ isprint(int);
void t_isprint_0x0b() {
  Assert_real((isprint(11) == 0),
              "/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/"
              "2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/"
              "dg/z88dk/test/suites/ctype/test_isprint.c",
              60, ("isprint should be 0 for 0x0b"));
}


x86 assembly (clang, -O0):
<t_isprint_0x0b>:
push   %rbp
mov    %rsp,%rbp
mov    $0xb,%edi
call   1030 <isprint@plt>
cmp    $0x0,%rax
sete   %al
and    $0x1,%al
movzbl %al,%edi
lea    0xebf(%rip),%rsi
mov    $0x3c,%edx
lea    0xf5b(%rip),%rcx
call   1040 <Assert_real@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<t_isprint_0x0b>:
push   %rax
mov    $0xb,%edi
call   1030 <isprint@plt>
xor    %edi,%edi
test   %rax,%rax
sete   %dil
lea    0xec5(%rip),%rsi
lea    0xf66(%rip),%rcx
mov    $0x3c,%edx
pop    %rax
jmp    1040 <Assert_real@plt>

LLVM IR (-O0):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0x0b\00"
define void @t_isprint_0x0b() {
%1 = call i64 @isprint(i32 11)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 60, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [168 x i8] c"/scratch/repos/new/home/jordi_armengol_estape/c-scraper/outputs/2022-01-22/02-19-57/repos/bitfixer/bitfixer/refs/heads/master/dg/z88dk/test/suites/ctype/test_isprint.c\00"
@.str.1 = [29 x i8] c"isprint should be 0 for 0x0b\00"
define void @t_isprint_0x0b() {
%1 = tail call i64 @isprint(i32 11)
%2 = icmp eq i64 %1, 0
%3 = zext i1 %2 to i32
%4 = tail call i32 @Assert_real(i32 %3, i8* getelementptr inbounds ([168 x i8], [168 x i8]* @.str, i64 0, i64 0), i32 60, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str.1, i64 0, i64 0))
ret void
}
void NV12ToARGBRow_AVX2() {}


x86 assembly (clang, -O0):
<NV12ToARGBRow_AVX2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<NV12ToARGBRow_AVX2>:
ret

LLVM IR (-O0):
define void @NV12ToARGBRow_AVX2() {
ret void
}

LLVM IR (-O2):
define void @NV12ToARGBRow_AVX2() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ ListMove(int);
void ListUp() { ListMove(-1); }


x86 assembly (clang, -O0):
<ListUp>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%edi
call   1030 <ListMove@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ListUp>:
mov    $0xffffffff,%edi
jmp    1030 <ListMove@plt>

LLVM IR (-O0):
define void @ListUp() {
%1 = call i32 @ListMove(i32 -1)
ret void
}

LLVM IR (-O2):
define void @ListUp() {
%1 = tail call i32 @ListMove(i32 -1)
ret void
}
/* Type definitions */
typedef unsigned int uint32_t;

/* Variables and functions */
unsigned int arc4random();
uint32_t arc4random_uniform(const uint32_t upper_bound) {
  uint32_t min;
  uint32_t r;
  if (upper_bound < 2U) {
    return 0;
  }
  min = (1U + ~upper_bound) % upper_bound;
  do {
    r = arc4random();
  } while (r < min);
  return r % upper_bound;
}


x86 assembly (clang, -O0):
<arc4random_uniform>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x8(%rbp)
cmpl   $0x2,-0x8(%rbp)
jae    1131 <arc4random_uniform+0x21>
movl   $0x0,-0x4(%rbp)
jmp    1163 <arc4random_uniform+0x53>
mov    -0x8(%rbp),%eax
xor    $0xffffffff,%eax
add    $0x1,%eax
xor    %edx,%edx
divl   -0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    $0x0,%al
call   1030 <arc4random@plt>
mov    %eax,-0x10(%rbp)
mov    -0x10(%rbp),%eax
cmp    -0xc(%rbp),%eax
jb     1142 <arc4random_uniform+0x32>
mov    -0x10(%rbp),%eax
xor    %edx,%edx
divl   -0x8(%rbp)
mov    %edx,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<arc4random_uniform>:
xor    %eax,%eax
cmp    $0x2,%edi
jb     1147 <arc4random_uniform+0x37>
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebx
mov    %edi,%eax
neg    %eax
xor    %edx,%edx
div    %edi
mov    %edx,%ebp
cs nopw 0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <arc4random@plt>
cmp    %ebp,%eax
jb     1130 <arc4random_uniform+0x20>
xor    %edx,%edx
div    %ebx
mov    %edx,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @arc4random_uniform(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %3
%6 = load i32, i32* %3
%7 = icmp ult i32 %6, 2
br i1 %7, label %8, label %9
8: ; preds = %1
store i32 0, i32* %2
br label %25
9: ; preds = %1
%10 = load i32, i32* %3
%11 = xor i32 %10, -1
%12 = add i32 1, %11
%13 = load i32, i32* %3
%14 = urem i32 %12, %13
store i32 %14, i32* %4
br label %15
15: ; preds = %17, %9
%16 = call i32 (...) @arc4random()
store i32 %16, i32* %5
br label %17
17: ; preds = %15
%18 = load i32, i32* %5
%19 = load i32, i32* %4
%20 = icmp ult i32 %18, %19
br i1 %20, label %15, label %21
21: ; preds = %17
%22 = load i32, i32* %5
%23 = load i32, i32* %3
%24 = urem i32 %22, %23
store i32 %24, i32* %2
br label %25
25: ; preds = %21, %8
%26 = load i32, i32* %2
ret i32 %26
}

LLVM IR (-O2):
define i32 @arc4random_uniform(i32 %0) {
%2 = icmp ult i32 %0, 2
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = sub i32 0, %0
%5 = urem i32 %4, %0
br label %6
6: ; preds = %6, %3
%7 = tail call i32 (...) @arc4random()
%8 = icmp ult i32 %7, %5
br i1 %8, label %6, label %9
9: ; preds = %6
%10 = urem i32 %7, %0
br label %11
11: ; preds = %1, %9
%12 = phi i32 [ %10, %9 ], [ 0, %1 ]
ret i32 %12
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMRCREATEBITMAP_set(void) {
  return U_WMRCORENONE_set("U_WMRCREATEBITMAP");
}


x86 assembly (clang, -O0):
<U_WMRCREATEBITMAP_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMRCREATEBITMAP_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [18 x i8] c"U_WMRCREATEBITMAP\00"
define i8* @U_WMRCREATEBITMAP_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [18 x i8] c"U_WMRCREATEBITMAP\00"
define i8* @U_WMRCREATEBITMAP_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([18 x i8], [18 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
int msm_jtag_save_unregister(struct notifier_block *nb) { return 0; }


x86 assembly (clang, -O0):
<msm_jtag_save_unregister>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<msm_jtag_save_unregister>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.notifier_block = type opaque
define i32 @msm_jtag_save_unregister(%struct.notifier_block* %0) {
%2 = alloca %struct.notifier_block*
store %struct.notifier_block* %0, %struct.notifier_block** %2
ret i32 0
}

LLVM IR (-O2):
%struct.notifier_block = type opaque
define i32 @msm_jtag_save_unregister(%struct.notifier_block* nocapture readnone %0) {
ret i32 0
}
/* Variables and functions */
int intel_ich_gpio_set(int, int);
int intel_ich_gpio43_raise(void) { return intel_ich_gpio_set(43, 1); }


x86 assembly (clang, -O0):
<intel_ich_gpio43_raise>:
push   %rbp
mov    %rsp,%rbp
mov    $0x2b,%edi
mov    $0x1,%esi
call   1030 <intel_ich_gpio_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<intel_ich_gpio43_raise>:
mov    $0x2b,%edi
mov    $0x1,%esi
jmp    1030 <intel_ich_gpio_set@plt>

LLVM IR (-O0):
define i32 @intel_ich_gpio43_raise() {
%1 = call i32 @intel_ich_gpio_set(i32 43, i32 1)
ret i32 %1
}

LLVM IR (-O2):
define i32 @intel_ich_gpio43_raise() {
%1 = tail call i32 @intel_ich_gpio_set(i32 43, i32 1)
ret i32 %1
}
int flags2asciimap(char *asciimap, unsigned long flags) {
  int j;
  for (j = 0; j < 32; j++) {
    asciimap[j] = (flags & (1 << j)) ? '1' : '0';
  }
  asciimap[32] = '\0';
  return 0;
}


x86 assembly (clang, -O0):
<flags2asciimap>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
cmpl   $0x20,-0x14(%rbp)
jge    115c <flags2asciimap+0x5c>
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    $0x1,%eax
shl    %cl,%eax
cltq
and    %rax,%rdx
mov    $0x30,%eax
mov    $0x31,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
mov    %al,%dl
mov    -0x8(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    %dl,(%rax,%rcx,1)
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1113 <flags2asciimap+0x13>
mov    -0x8(%rbp),%rax
movb   $0x0,0x20(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<flags2asciimap>:
xor    %eax,%eax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax)
mov    $0x1,%edx
mov    %eax,%ecx
shl    %cl,%edx
movslq %edx,%rcx
and    %rsi,%rcx
cmp    $0x1,%rcx
mov    $0x31,%r8b
sbb    $0x0,%r8b
lea    0x1(%rax),%ecx
mov    $0x1,%edx
shl    %cl,%edx
movslq %edx,%rcx
and    %rsi,%rcx
cmp    $0x1,%rcx
mov    $0x31,%cl
sbb    $0x0,%cl
mov    %r8b,(%rdi,%rax,1)
mov    %cl,0x1(%rdi,%rax,1)
add    $0x2,%rax
cmp    $0x20,%rax
jne    1110 <flags2asciimap+0x10>
movb   $0x0,0x20(%rdi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @flags2asciimap(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
store i8* %0, i8** %3
store i64 %1, i64* %4
store i32 0, i32* %5
br label %6
6: ; preds = %23, %2
%7 = load i32, i32* %5
%8 = icmp slt i32 %7, 32
br i1 %8, label %9, label %26
9: ; preds = %6
%10 = load i64, i64* %4
%11 = load i32, i32* %5
%12 = shl i32 1, %11
%13 = sext i32 %12 to i64
%14 = and i64 %10, %13
%15 = icmp ne i64 %14, 0
%16 = zext i1 %15 to i64
%17 = select i1 %15, i32 49, i32 48
%18 = trunc i32 %17 to i8
%19 = load i8*, i8** %3
%20 = load i32, i32* %5
%21 = sext i32 %20 to i64
%22 = getelementptr inbounds i8, i8* %19, i64 %21
store i8 %18, i8* %22
br label %23
23: ; preds = %9
%24 = load i32, i32* %5
%25 = add nsw i32 %24, 1
store i32 %25, i32* %5
br label %6
26: ; preds = %6
%27 = load i8*, i8** %3
%28 = getelementptr inbounds i8, i8* %27, i64 32
store i8 0, i8* %28
ret i32 0
}

LLVM IR (-O2):
define i32 @flags2asciimap(i8* nocapture writeonly %0, i64 %1) {
br label %3
3: ; preds = %3, %2
%4 = phi i64 [ 0, %2 ], [ %20, %3 ]
%5 = trunc i64 %4 to i32
%6 = shl nuw i32 1, %5
%7 = sext i32 %6 to i64
%8 = and i64 %7, %1
%9 = icmp eq i64 %8, 0
%10 = select i1 %9, i8 48, i8 49
%11 = getelementptr inbounds i8, i8* %0, i64 %4
store i8 %10, i8* %11
%12 = or i64 %4, 1
%13 = trunc i64 %12 to i32
%14 = shl nuw i32 1, %13
%15 = sext i32 %14 to i64
%16 = and i64 %15, %1
%17 = icmp eq i64 %16, 0
%18 = select i1 %17, i8 48, i8 49
%19 = getelementptr inbounds i8, i8* %0, i64 %12
store i8 %18, i8* %19
%20 = add nuw nsw i64 %4, 2
%21 = icmp eq i64 %20, 32
br i1 %21, label %22, label %3
22: ; preds = %3
%23 = getelementptr inbounds i8, i8* %0, i64 32
store i8 0, i8* %23
ret i32 0
}
functionName(paramName) int paramName;
{}


x86 assembly (clang, -O0):
<functionName>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<functionName>:
ret

LLVM IR (-O0):
define i32 @functionName(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %2
ret i32 %4
}

LLVM IR (-O2):
define i32 @functionName(i32 %0) {
ret i32 undef
}
/* Variables and functions */
scalar_t__ malloc(int);
int /*<<< orphan*/ sprintf(char *, char *, int);
char *format_date_int(int val) {
  char *result = (char *)malloc(2 * sizeof(char));
  if (val > 9) {
    sprintf(result, "%d", val);
  } else {
    sprintf(result, "0%d", val);
  }
  return result;
}


x86 assembly (clang, -O0):
<format_date_int>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    $0x2,%edi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpl   $0x9,-0x4(%rbp)
jle    115b <format_date_int+0x3b>
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xeb0(%rip),%rsi
call   1040 <sprintf@plt>
jmp    116e <format_date_int+0x4e>
mov    -0x10(%rbp),%rdi
mov    -0x4(%rbp),%edx
lea    0xe97(%rip),%rsi
call   1040 <sprintf@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<format_date_int>:
push   %rbp
push   %rbx
push   %rax
mov    %edi,%ebp
mov    $0x2,%edi
call   1030 <malloc@plt>
mov    %rax,%rbx
cmp    $0xa,%ebp
lea    0xec5(%rip),%rax
lea    0xebd(%rip),%rsi
cmovge %rax,%rsi
mov    %rbx,%rdi
mov    %ebp,%edx
call   1040 <sprintf@plt>
mov    %rbx,%rax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"0%d\00"
define i8* @format_date_int(i32 %0) {
%2 = alloca i32
%3 = alloca i8*
store i32 %0, i32* %2
%4 = call i64 @malloc(i32 2)
%5 = inttoptr i64 %4 to i8*
store i8* %5, i8** %3
%6 = load i32, i32* %2
%7 = icmp sgt i32 %6, 9
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i8*, i8** %3
%10 = load i32, i32* %2
%11 = call i32 @sprintf(i8* %9, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32 %10)
br label %16
12: ; preds = %1
%13 = load i8*, i8** %3
%14 = load i32, i32* %2
%15 = call i32 @sprintf(i8* %13, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %14)
br label %16
16: ; preds = %12, %8
%17 = load i8*, i8** %3
ret i8* %17
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"0%d\00"
define i8* @format_date_int(i32 %0) {
%2 = tail call i64 @malloc(i32 2)
%3 = inttoptr i64 %2 to i8*
%4 = icmp sgt i32 %0, 9
%5 = select i1 %4, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0)
%6 = tail call i32 @sprintf(i8* dereferenceable(1) %3, i8* dereferenceable(1) %5, i32 %0)
ret i8* %3
}
void *memmove(void *dest, const void *src, int n) {
  if (dest < src)
    __asm__("cld\n\t"
            "rep\n\t"
            "movsb" ::"c"(n),
            "S"(src), "D"(dest));
  else
    __asm__("std\n\t"
            "rep\n\t"
            "movsb" ::"c"(n),
            "S"((char *)src + n - 1), "D"((char *)dest + n - 1));
  return dest;
}


x86 assembly (clang, -O0):
<memmove>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1130 <memmove+0x30>
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rsi
mov    -0x8(%rbp),%rdi
cld
rep movsb %ds:(%rsi),%es:(%rdi)
jmp    1154 <memmove+0x54>
mov    -0x14(%rbp),%ecx
mov    -0x10(%rbp),%rsi
movslq -0x14(%rbp),%rax
add    %rax,%rsi
add    $0xffffffffffffffff,%rsi
mov    -0x8(%rbp),%rdi
movslq -0x14(%rbp),%rax
add    %rax,%rdi
add    $0xffffffffffffffff,%rdi
std
rep movsb %ds:(%rsi),%es:(%rdi)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<memmove>:
mov    %rdi,%rax
cmp    %rsi,%rdi
jae    1111 <memmove+0x11>
mov    %edx,%ecx
mov    %rax,%rdi
cld
rep movsb %ds:(%rsi),%es:(%rdi)
ret
movslq %edx,%rcx
add    %rcx,%rsi
add    $0xffffffffffffffff,%rsi
lea    (%rax,%rcx,1),%rdi
add    $0xffffffffffffffff,%rdi
std
rep movsb %ds:(%rsi),%es:(%rdi)
ret

LLVM IR (-O0):
define i8* @memmove(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
%7 = load i8*, i8** %4
%8 = load i8*, i8** %5
%9 = icmp ult i8* %7, %8
br i1 %9, label %10, label %14
10: ; preds = %3
%11 = load i32, i32* %6
%12 = load i8*, i8** %5
%13 = load i8*, i8** %4
br label %26
14: ; preds = %3
%15 = load i32, i32* %6
%16 = load i8*, i8** %5
%17 = load i32, i32* %6
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, i8* %16, i64 %18
%20 = getelementptr inbounds i8, i8* %19, i64 -1
%21 = load i8*, i8** %4
%22 = load i32, i32* %6
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, i8* %21, i64 %23
%25 = getelementptr inbounds i8, i8* %24, i64 -1
br label %26
26: ; preds = %14, %10
%27 = load i8*, i8** %4
ret i8* %27
}

LLVM IR (-O2):
define i8* @memmove(i8* returned %0, i8* %1, i32 %2) {
%4 = icmp ult i8* %0, %1
br i1 %4, label %5, label %6
5: ; preds = %3
tail call void asm sideeffect "cld\0A\09rep\0A\09movsb", "{cx},{si},{di},~{dirflag},~{fpsr},~{flags}"(i32 %2, i8* %1, i8* %0)
br label %12
6: ; preds = %3
%7 = sext i32 %2 to i64
%8 = getelementptr inbounds i8, i8* %1, i64 %7
%9 = getelementptr inbounds i8, i8* %8, i64 -1
%10 = getelementptr inbounds i8, i8* %0, i64 %7
%11 = getelementptr inbounds i8, i8* %10, i64 -1
tail call void asm sideeffect "std\0A\09rep\0A\09movsb", "{cx},{si},{di},~{dirflag},~{fpsr},~{flags}"(i32 %2, i8* %9, i8* %11)
br label %12
12: ; preds = %6, %5
ret i8* %0
}
/* Type definitions */
struct ev_loop {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ ev_run(struct ev_loop *, int);
void __attribute__((unused)) ev_loop(struct ev_loop *loop, int flags) {
  ev_run(loop, flags);
}


x86 assembly (clang, -O0):
<ev_loop>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1030 <ev_run@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ev_loop>:
jmp    1030 <ev_run@plt>

LLVM IR (-O0):
%struct.ev_loop = type { i32 }
define void @ev_loop(%struct.ev_loop* %0, i32 %1) {
%3 = alloca %struct.ev_loop*
%4 = alloca i32
store %struct.ev_loop* %0, %struct.ev_loop** %3
store i32 %1, i32* %4
%5 = load %struct.ev_loop*, %struct.ev_loop** %3
%6 = load i32, i32* %4
%7 = call i32 @ev_run(%struct.ev_loop* %5, i32 %6)
ret void
}

LLVM IR (-O2):
%struct.ev_loop = type { i32 }
define void @ev_loop(%struct.ev_loop* %0, i32 %1) {
%3 = tail call i32 @ev_run(%struct.ev_loop* %0, i32 %1)
ret void
}
int main(int argc, char *argv[]) {
  void print_msg(char *msg);
  print_msg("hello");
  print_msg("world\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xed3(%rip),%rdi
call   1030 <print_msg@plt>
lea    0xecd(%rip),%rdi
call   1030 <print_msg@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <print_msg@plt>
lea    0xee2(%rip),%rdi
call   1030 <print_msg@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"hello\00"
@.str.1 = [7 x i8] c"world\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"hello\00"
@.str.1 = [7 x i8] c"world\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
tail call void @print_msg(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0))
tail call void @print_msg(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ debug(char *, ...);
int M6_f(char *s) {
  debug("M6_f(const char *s) is not yet implemented!\n");
  debug("%s\n", s);
  return 1;
}


x86 assembly (clang, -O0):
<M6_f>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xedd(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    -0x8(%rbp),%rsi
lea    0xef8(%rip),%rdi
mov    $0x0,%al
call   1030 <debug@plt>
mov    $0x1,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<M6_f>:
push   %rbx
mov    %rdi,%rbx
lea    0xee5(%rip),%rdi
xor    %eax,%eax
call   1030 <debug@plt>
lea    0xf04(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
call   1030 <debug@plt>
mov    $0x1,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [45 x i8] c"M6_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M6_f(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%4 = load i8*, i8** %2
%5 = call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %4)
ret i32 1
}

LLVM IR (-O2):
@.str = [45 x i8] c"M6_f(const char *s) is not yet implemented!\0A\00"
@.str.1 = [4 x i8] c"%s\0A\00"
define i32 @M6_f(i8* %0) {
%2 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%3 = tail call i32 (i8*, ...) @debug(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i8* %0)
ret i32 1
}
int bcm_2708_power_off() { return -1; }


x86 assembly (clang, -O0):
<bcm_2708_power_off>:
push   %rbp
mov    %rsp,%rbp
mov    $0xffffffff,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<bcm_2708_power_off>:
mov    $0xffffffff,%eax
ret

LLVM IR (-O0):
define i32 @bcm_2708_power_off() {
ret i32 -1
}

LLVM IR (-O2):
define i32 @bcm_2708_power_off() {
ret i32 -1
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char);
void main() {
  int i = 0;
  char q;
  for (i = 0; i < 256; i++) {
    printf("%c ", q);
    q = q + 1;
  }
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
movl   $0x0,-0x4(%rbp)
cmpl   $0x100,-0x4(%rbp)
jge    115b <main+0x4b>
lea    0xec6(%rip),%rdi
movsbl -0x5(%rbp),%esi
call   1030 <printf@plt>
movsbl -0x5(%rbp),%eax
add    $0x1,%eax
mov    %al,-0x5(%rbp)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    1126 <main+0x16>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
LLVM IR (-O0):
@.str = [4 x i8] c"%c \00"
define void @main() {
%1 = alloca i32
%2 = alloca i8
store i32 0, i32* %1
store i32 0, i32* %1
br label %3
3: ; preds = %13, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 256
br i1 %5, label %6, label %16
6: ; preds = %3
%7 = load i8, i8* %2
%8 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8 signext %7)
%9 = load i8, i8* %2
%10 = sext i8 %9 to i32
%11 = add nsw i32 %10, 1
%12 = trunc i32 %11 to i8
store i8 %12, i8* %2
br label %13
13: ; preds = %6
%14 = load i32, i32* %1
%15 = add nsw i32 %14, 1
store i32 %15, i32* %1
br label %3
16: ; preds = %3
ret void
}

LLVM IR (-O2):
void t1() {
  while (1) {
  }
}


x86 assembly (clang, -O0):
<t1>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <t1+0x9>
jmp    1109 <t1+0x9>

x86 assembly (clang, -O2):
<t1>:
jmp    1100 <t1>

LLVM IR (-O0):
define void @t1() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @t1() {
br label %1
1: ; preds = %0, %1
br label %1
}