xunge/DecIR huggingface dataset:
/* Type definitions */
struct carp_machine_state {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ carp_instructions_spush(struct carp_machine_state *,
                                           int /*<<< orphan*/);
int /*<<< orphan*/ carp_vm_next(struct carp_machine_state *);
void carp_instr_PUSH(struct carp_machine_state *m) {
  carp_instructions_spush(m, carp_vm_next(m));
}


x86 assembly (clang, -O0):
<carp_instr_PUSH>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
call   1040 <carp_vm_next@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%esi
call   1030 <carp_instructions_spush@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<carp_instr_PUSH>:
push   %rbx
mov    %rdi,%rbx
call   1040 <carp_vm_next@plt>
mov    %rbx,%rdi
mov    %eax,%esi
pop    %rbx
jmp    1030 <carp_instructions_spush@plt>

LLVM IR (-O0):
%struct.carp_machine_state = type { i32 }
define void @carp_instr_PUSH(%struct.carp_machine_state* %0) {
%2 = alloca %struct.carp_machine_state*
store %struct.carp_machine_state* %0, %struct.carp_machine_state** %2
%3 = load %struct.carp_machine_state*, %struct.carp_machine_state** %2
%4 = load %struct.carp_machine_state*, %struct.carp_machine_state** %2
%5 = call i32 @carp_vm_next(%struct.carp_machine_state* %4)
%6 = call i32 @carp_instructions_spush(%struct.carp_machine_state* %3, i32 %5)
ret void
}

LLVM IR (-O2):
%struct.carp_machine_state = type { i32 }
define void @carp_instr_PUSH(%struct.carp_machine_state* %0) {
%2 = tail call i32 @carp_vm_next(%struct.carp_machine_state* %0)
%3 = tail call i32 @carp_instructions_spush(%struct.carp_machine_state* %0, i32 %2)
ret void
}
/* Variables and functions */
scalar_t__ alpha(char);
scalar_t__ reserved(char);
bool valid(char c) { return alpha(c) || reserved(c); }


x86 assembly (clang, -O0):
<valid>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movsbl -0x1(%rbp),%edi
call   1030 <alpha@plt>
mov    %rax,%rcx
mov    $0x1,%al
cmp    $0x0,%rcx
mov    %al,-0x2(%rbp)
jne    115c <valid+0x3c>
movsbl -0x1(%rbp),%edi
call   1040 <reserved@plt>
cmp    $0x0,%rax
setne  %al
mov    %al,-0x2(%rbp)
mov    -0x2(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<valid>:
push   %rbx
mov    %edi,%ebx
call   1030 <alpha@plt>
mov    %rax,%rcx
mov    $0x1,%eax
test   %rcx,%rcx
je     1137 <valid+0x17>
pop    %rbx
ret
movsbl %bl,%edi
call   1040 <reserved@plt>
mov    %rax,%rcx
xor    %eax,%eax
test   %rcx,%rcx
setne  %al
pop    %rbx
ret

LLVM IR (-O0):
define i32 @valid(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
%4 = call i64 @alpha(i8 signext %3)
%5 = icmp ne i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %1
%7 = load i8, i8* %2
%8 = call i64 @reserved(i8 signext %7)
%9 = icmp ne i64 %8, 0
br label %10
10: ; preds = %6, %1
%11 = phi i1 [ true, %1 ], [ %9, %6 ]
%12 = zext i1 %11 to i32
ret i32 %12
}

LLVM IR (-O2):
define i32 @valid(i8 signext %0) {
%2 = tail call i64 @alpha(i8 signext %0)
%3 = icmp eq i64 %2, 0
br i1 %3, label %4, label %8
4: ; preds = %1
%5 = tail call i64 @reserved(i8 signext %0)
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i32
br label %8
8: ; preds = %4, %1
%9 = phi i32 [ 1, %1 ], [ %7, %4 ]
ret i32 %9
}
unsigned int calc_slider_pos(unsigned int real_size, unsigned int view_offs,
                             unsigned int slid_bg_size) {
  if (real_size == 0)
    return 0;
  return (view_offs * slid_bg_size) / real_size;
}


x86 assembly (clang, -O0):
<calc_slider_pos>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    1123 <calc_slider_pos+0x23>
movl   $0x0,-0x4(%rbp)
jmp    1132 <calc_slider_pos+0x32>
mov    -0xc(%rbp),%eax
imul   -0x10(%rbp),%eax
xor    %edx,%edx
divl   -0x8(%rbp)
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<calc_slider_pos>:
test   %edi,%edi
je     110e <calc_slider_pos+0xe>
imul   %esi,%edx
mov    %edx,%eax
xor    %edx,%edx
div    %edi
ret
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @calc_slider_pos(i32 %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%8 = load i32, i32* %5
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %11
10: ; preds = %3
store i32 0, i32* %4
br label %17
11: ; preds = %3
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = mul i32 %12, %13
%15 = load i32, i32* %5
%16 = udiv i32 %14, %15
store i32 %16, i32* %4
br label %17
17: ; preds = %11, %10
%18 = load i32, i32* %4
ret i32 %18
}

LLVM IR (-O2):
define i32 @calc_slider_pos(i32 %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %0, 0
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = mul i32 %2, %1
%7 = udiv i32 %6, %0
br label %8
8: ; preds = %3, %5
%9 = phi i32 [ %7, %5 ], [ 0, %3 ]
ret i32 %9
}
long int cast_ushort_long(unsigned short int x) { return (long int)x; }


x86 assembly (clang, -O0):
<cast_ushort_long>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
movzwl -0x2(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cast_ushort_long>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i64 @cast_ushort_long(i16 zeroext %0) {
%2 = alloca i16
store i16 %0, i16* %2
%3 = load i16, i16* %2
%4 = zext i16 %3 to i64
ret i64 %4
}

LLVM IR (-O2):
define i64 @cast_ushort_long(i16 zeroext %0) {
%2 = zext i16 %0 to i64
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
int /*<<< orphan*/ system(char *);
int doprocess(char programme[4096], char command_line[4096]) {
  printf("\n%s\n", command_line);
  system(command_line);
  return 0;
}


x86 assembly (clang, -O0):
<doprocess>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xec5(%rip),%rdi
call   1040 <printf@plt>
mov    -0x10(%rbp),%rdi
call   1030 <system@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<doprocess>:
push   %rbx
mov    %rsi,%rbx
lea    0xed5(%rip),%rdi
call   1040 <printf@plt>
mov    %rbx,%rdi
call   1030 <system@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [5 x i8] c"\0A%s\0A\00"
define i32 @doprocess(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %4
%6 = call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %5)
%7 = load i8*, i8** %4
%8 = call i32 @system(i8* %7)
ret i32 0
}

LLVM IR (-O2):
@.str = [5 x i8] c"\0A%s\0A\00"
define i32 @doprocess(i8* nocapture readnone %0, i8* %1) {
%3 = tail call i32 @printf(i8* getelementptr inbounds ([5 x i8], [5 x i8]* @.str, i64 0, i64 0), i8* %1)
%4 = tail call i32 @system(i8* %1)
ret i32 0
}
unsigned char uc(char c) { return c; }


x86 assembly (clang, -O0):
<uc>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movzbl -0x1(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<uc>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define zeroext i8 @uc(i8 signext %0) {
%2 = alloca i8
store i8 %0, i8* %2
%3 = load i8, i8* %2
ret i8 %3
}

LLVM IR (-O2):
define zeroext i8 @uc(i8 returned signext %0) {
ret i8 %0
}
/* Variables and functions */
int sscanf(char const *, char *, int *, int *, int *);
int parse_date(const char *s, int *year, int *month, int *day) {
  int args = sscanf(s, "%2u.%2u.%5d", day, month, year);
  return args == 3;
}


x86 assembly (clang, -O0):
<parse_date>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x20(%rbp),%rdx
mov    -0x18(%rbp),%rcx
mov    -0x10(%rbp),%r8
lea    0xec1(%rip),%rsi
call   1030 <sscanf@plt>
mov    %eax,-0x24(%rbp)
cmpl   $0x3,-0x24(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parse_date>:
push   %rax
mov    %rdx,%rax
mov    %rsi,%r8
lea    0xee2(%rip),%rsi
mov    %rcx,%rdx
mov    %rax,%rcx
call   1030 <sscanf@plt>
xor    %ecx,%ecx
cmp    $0x3,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [12 x i8] c"%2u.%2u.%5d\00"
define i32 @parse_date(i8* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i8*
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32
store i8* %0, i8** %5
store i32* %1, i32** %6
store i32* %2, i32** %7
store i32* %3, i32** %8
%10 = load i8*, i8** %5
%11 = load i32*, i32** %8
%12 = load i32*, i32** %7
%13 = load i32*, i32** %6
%14 = call i32 @sscanf(i8* %10, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* %11, i32* %12, i32* %13)
store i32 %14, i32* %9
%15 = load i32, i32* %9
%16 = icmp eq i32 %15, 3
%17 = zext i1 %16 to i32
ret i32 %17
}

LLVM IR (-O2):
@.str = [12 x i8] c"%2u.%2u.%5d\00"
define i32 @parse_date(i8* nocapture %0, i32* %1, i32* %2, i32* %3) {
%5 = tail call i32 @sscanf(i8* %0, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32* %3, i32* %2, i32* %1)
%6 = icmp eq i32 %5, 3
%7 = zext i1 %6 to i32
ret i32 %7
}
long long test_csneg64_condasn1(long long x0, long long x1, long long x2,
                                long long x3) {
  long long x4;
  x4 = (x0 == x1) ? -x3 : x2;
  return x4;
}


x86 assembly (clang, -O0):
<test_csneg64_condasn1>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rax
cmp    -0x10(%rbp),%rax
jne    1131 <test_csneg64_condasn1+0x31>
xor    %eax,%eax
sub    -0x20(%rbp),%rax
mov    %rax,-0x30(%rbp)
jmp    1139 <test_csneg64_condasn1+0x39>
mov    -0x18(%rbp),%rax
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rax
mov    %rax,-0x28(%rbp)
mov    -0x28(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_csneg64_condasn1>:
mov    %rcx,%rax
neg    %rax
cmp    %rsi,%rdi
cmovne %rdx,%rax
ret

LLVM IR (-O0):
define i64 @test_csneg64_condasn1(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = alloca i64
%6 = alloca i64
%7 = alloca i64
%8 = alloca i64
%9 = alloca i64
store i64 %0, i64* %5
store i64 %1, i64* %6
store i64 %2, i64* %7
store i64 %3, i64* %8
%10 = load i64, i64* %5
%11 = load i64, i64* %6
%12 = icmp eq i64 %10, %11
br i1 %12, label %13, label %16
13: ; preds = %4
%14 = load i64, i64* %8
%15 = sub nsw i64 0, %14
br label %18
16: ; preds = %4
%17 = load i64, i64* %7
br label %18
18: ; preds = %16, %13
%19 = phi i64 [ %15, %13 ], [ %17, %16 ]
store i64 %19, i64* %9
%20 = load i64, i64* %9
ret i64 %20
}

LLVM IR (-O2):
define i64 @test_csneg64_condasn1(i64 %0, i64 %1, i64 %2, i64 %3) {
%5 = icmp eq i64 %0, %1
%6 = sub nsw i64 0, %3
%7 = select i1 %5, i64 %6, i64 %2
ret i64 %7
}
void c() {
  int i, j;
  for (i = 0; i < 20; i++) {
    for (j = 0; j < 1000000; j++) {
      ;
    }
  }
}


x86 assembly (clang, -O0):
<c>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
cmpl   $0x14,-0x4(%rbp)
jge    114f <c+0x4f>
movl   $0x0,-0x8(%rbp)
cmpl   $0xf4240,-0x8(%rbp)
jge    113c <c+0x3c>
jmp    112e <c+0x2e>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
jmp    111c <c+0x1c>
jmp    1141 <c+0x41>
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110b <c+0xb>
pop    %rbp
ret

x86 assembly (clang, -O2):
<c>:
ret

LLVM IR (-O0):
define void @c() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %15, %0
%4 = load i32, i32* %1
%5 = icmp slt i32 %4, 20
br i1 %5, label %6, label %18
6: ; preds = %3
store i32 0, i32* %2
br label %7
7: ; preds = %11, %6
%8 = load i32, i32* %2
%9 = icmp slt i32 %8, 1000000
br i1 %9, label %10, label %14
10: ; preds = %7
br label %11
11: ; preds = %10
%12 = load i32, i32* %2
%13 = add nsw i32 %12, 1
store i32 %13, i32* %2
br label %7
14: ; preds = %7
br label %15
15: ; preds = %14
%16 = load i32, i32* %1
%17 = add nsw i32 %16, 1
store i32 %17, i32* %1
br label %3
18: ; preds = %3
ret void
}

LLVM IR (-O2):
define void @c() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char const *, ...);
void ASRT_PrintFail(const char *fileName, int fileLine, const char *message,
                    const char *testName) {
  printf("\n(f) %s %s:%d", testName, fileName, fileLine);
  if (message) {
    printf("\n  %s", message);
  }
}


x86 assembly (clang, -O0):
<ASRT_PrintFail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x20(%rbp),%rsi
mov    -0x8(%rbp),%rdx
mov    -0xc(%rbp),%ecx
lea    0xec7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
cmpq   $0x0,-0x18(%rbp)
je     115d <ASRT_PrintFail+0x4d>
mov    -0x18(%rbp),%rsi
lea    0xeb8(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ASRT_PrintFail>:
push   %rbx
mov    %rdx,%rbx
mov    %esi,%eax
mov    %rdi,%rdx
lea    0xee0(%rip),%rdi
mov    %rcx,%rsi
mov    %eax,%ecx
xor    %eax,%eax
call   1030 <printf@plt>
test   %rbx,%rbx
je     1143 <ASRT_PrintFail+0x33>
lea    0xed6(%rip),%rdi
mov    %rbx,%rsi
xor    %eax,%eax
pop    %rbx
jmp    1030 <printf@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [14 x i8] c"\0A(f) %s %s:%d\00"
@.str.1 = [6 x i8] c"\0A %s\00"
define void @ASRT_PrintFail(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i32 %1, i32* %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %8
%10 = load i8*, i8** %5
%11 = load i32, i32* %6
%12 = call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %9, i8* %10, i32 %11)
%13 = load i8*, i8** %7
%14 = icmp ne i8* %13, null
br i1 %14, label %15, label %18
15: ; preds = %4
%16 = load i8*, i8** %7
%17 = call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %16)
br label %18
18: ; preds = %15, %4
ret void
}

LLVM IR (-O2):
@.str = [14 x i8] c"\0A(f) %s %s:%d\00"
@.str.1 = [6 x i8] c"\0A %s\00"
define void @ASRT_PrintFail(i8* %0, i32 %1, i8* %2, i8* %3) {
%5 = tail call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0), i8* %3, i8* %0, i32 %1)
%6 = icmp eq i8* %2, null
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = tail call i32 (i8*, i8*, ...) @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.1, i64 0, i64 0), i8* %2)
br label %9
9: ; preds = %7, %4
ret void
}
/* Variables and functions */
int /*<<< orphan*/ delivery_schedule_tests_run();
int /*<<< orphan*/ event_and_alarm_tests_run();
int /*<<< orphan*/ interval_data_tests_run();
int /*<<< orphan*/ parse_lwm2m_exe_arg_test_run();
int /*<<< orphan*/ ring_buffer_tests_run();
int /*<<< orphan*/ rtc_tests_run();
int /*<<< orphan*/ sys_tick_tests_run();
int /*<<< orphan*/ utc_offset_parse_tests_run();
void unit_tests_run(void) {
  ring_buffer_tests_run();
  sys_tick_tests_run();
  rtc_tests_run();
  event_and_alarm_tests_run();
  delivery_schedule_tests_run();
  utc_offset_parse_tests_run();
  parse_lwm2m_exe_arg_test_run();
  interval_data_tests_run();
}


x86 assembly (clang, -O0):
<unit_tests_run>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1060 <ring_buffer_tests_run@plt>
mov    $0x0,%al
call   1080 <sys_tick_tests_run@plt>
mov    $0x0,%al
call   1070 <rtc_tests_run@plt>
mov    $0x0,%al
call   1040 <event_and_alarm_tests_run@plt>
mov    $0x0,%al
call   1030 <delivery_schedule_tests_run@plt>
mov    $0x0,%al
call   10a0 <utc_offset_parse_tests_run@plt>
mov    $0x0,%al
call   1050 <parse_lwm2m_exe_arg_test_run@plt>
mov    $0x0,%al
call   1090 <interval_data_tests_run@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<unit_tests_run>:
push   %rax
xor    %eax,%eax
call   1060 <ring_buffer_tests_run@plt>
xor    %eax,%eax
call   1080 <sys_tick_tests_run@plt>
xor    %eax,%eax
call   1070 <rtc_tests_run@plt>
xor    %eax,%eax
call   1040 <event_and_alarm_tests_run@plt>
xor    %eax,%eax
call   1030 <delivery_schedule_tests_run@plt>
xor    %eax,%eax
call   10a0 <utc_offset_parse_tests_run@plt>
xor    %eax,%eax
call   1050 <parse_lwm2m_exe_arg_test_run@plt>
xor    %eax,%eax
pop    %rcx
jmp    1090 <interval_data_tests_run@plt>

LLVM IR (-O0):
define void @unit_tests_run() {
%1 = call i32 (...) @ring_buffer_tests_run()
%2 = call i32 (...) @sys_tick_tests_run()
%3 = call i32 (...) @rtc_tests_run()
%4 = call i32 (...) @event_and_alarm_tests_run()
%5 = call i32 (...) @delivery_schedule_tests_run()
%6 = call i32 (...) @utc_offset_parse_tests_run()
%7 = call i32 (...) @parse_lwm2m_exe_arg_test_run()
%8 = call i32 (...) @interval_data_tests_run()
ret void
}

LLVM IR (-O2):
define void @unit_tests_run() {
%1 = tail call i32 (...) @ring_buffer_tests_run()
%2 = tail call i32 (...) @sys_tick_tests_run()
%3 = tail call i32 (...) @rtc_tests_run()
%4 = tail call i32 (...) @event_and_alarm_tests_run()
%5 = tail call i32 (...) @delivery_schedule_tests_run()
%6 = tail call i32 (...) @utc_offset_parse_tests_run()
%7 = tail call i32 (...) @parse_lwm2m_exe_arg_test_run()
%8 = tail call i32 (...) @interval_data_tests_run()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ glutBitmapHelvetica18;
unsigned glob_glutBitmapHelvetica18(void) {
  return (unsigned)&glutBitmapHelvetica18;
}


x86 assembly (clang, -O0):
<glob_glutBitmapHelvetica18>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ed5(%rip),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<glob_glutBitmapHelvetica18>:
mov    0x2eda(%rip),%eax
ret

LLVM IR (-O0):
@glutBitmapHelvetica18 = global i32 0
define i32 @glob_glutBitmapHelvetica18() {
ret i32 ptrtoint (i32* @glutBitmapHelvetica18 to i32)
}

LLVM IR (-O2):
@glutBitmapHelvetica18 = global i32 0
define i32 @glob_glutBitmapHelvetica18() {
ret i32 ptrtoint (i32* @glutBitmapHelvetica18 to i32)
}
/* Variables and functions */
int /*<<< orphan*/ mdea_error(char **, char *);
int mdea_array_node_get_number(void *p, double *number, char **error) {
  mdea_error(error, "Expected number, got array");
  return -1;
}


x86 assembly (clang, -O0):
<mdea_array_node_get_number>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
lea    0xed1(%rip),%rsi
call   1030 <mdea_error@plt>
mov    $0xffffffff,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mdea_array_node_get_number>:
push   %rax
mov    %rdx,%rdi
lea    0xee5(%rip),%rsi
call   1030 <mdea_error@plt>
mov    $0xffffffff,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [27 x i8] c"Expected number, got array\00"
define i32 @mdea_array_node_get_number(i8* %0, double* %1, i8** %2) {
%4 = alloca i8*
%5 = alloca double*
%6 = alloca i8**
store i8* %0, i8** %4
store double* %1, double** %5
store i8** %2, i8*** %6
%7 = load i8**, i8*** %6
%8 = call i32 @mdea_error(i8** %7, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}

LLVM IR (-O2):
@.str = [27 x i8] c"Expected number, got array\00"
define i32 @mdea_array_node_get_number(i8* nocapture readnone %0, double* nocapture readnone %1, i8** %2) {
%4 = tail call i32 @mdea_error(i8** %2, i8* getelementptr inbounds ([27 x i8], [27 x i8]* @.str, i64 0, i64 0))
ret i32 -1
}
int ft_isalnum(int c) {
  return ((c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z') ||
          (c >= '0' && c <= '9'));
}


x86 assembly (clang, -O0):
<ft_isalnum>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
cmpl   $0x61,-0x4(%rbp)
jl     1120 <ft_isalnum+0x20>
mov    $0x1,%al
cmpl   $0x7a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <ft_isalnum+0x58>
cmpl   $0x41,-0x4(%rbp)
jl     1139 <ft_isalnum+0x39>
mov    $0x1,%al
cmpl   $0x5a,-0x4(%rbp)
mov    %al,-0x5(%rbp)
jle    1158 <ft_isalnum+0x58>
xor    %eax,%eax
cmpl   $0x30,-0x4(%rbp)
mov    %al,-0x6(%rbp)
jl     1152 <ft_isalnum+0x52>
cmpl   $0x39,-0x4(%rbp)
setle  %al
mov    %al,-0x6(%rbp)
mov    -0x6(%rbp),%al
mov    %al,-0x5(%rbp)
mov    -0x5(%rbp),%al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_isalnum>:
mov    %edi,%eax
and    $0xffffffdf,%eax
add    $0xffffffbf,%eax
cmp    $0x1a,%eax
setb   %al
add    $0xffffffd0,%edi
cmp    $0xa,%edi
setb   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @ft_isalnum(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp sge i32 %3, 97
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, i32* %2
%7 = icmp sle i32 %6, 122
br i1 %7, label %22, label %8
8: ; preds = %5, %1
%9 = load i32, i32* %2
%10 = icmp sge i32 %9, 65
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, i32* %2
%13 = icmp sle i32 %12, 90
br i1 %13, label %22, label %14
14: ; preds = %11, %8
%15 = load i32, i32* %2
%16 = icmp sge i32 %15, 48
br i1 %16, label %17, label %20
17: ; preds = %14
%18 = load i32, i32* %2
%19 = icmp sle i32 %18, 57
br label %20
20: ; preds = %17, %14
%21 = phi i1 [ false, %14 ], [ %19, %17 ]
br label %22
22: ; preds = %20, %11, %5
%23 = phi i1 [ true, %11 ], [ true, %5 ], [ %21, %20 ]
%24 = zext i1 %23 to i32
ret i32 %24
}

LLVM IR (-O2):
define i32 @ft_isalnum(i32 %0) {
%2 = and i32 %0, -33
%3 = add i32 %2, -65
%4 = icmp ult i32 %3, 26
%5 = add i32 %0, -48
%6 = icmp ult i32 %5, 10
%7 = or i1 %6, %4
%8 = zext i1 %7 to i32
ret i32 %8
}
/* Variables and functions */
int /*<<< orphan*/ BITHLm(int);
void BIT2HLm() { BITHLm(0x04); }


x86 assembly (clang, -O0):
<BIT2HLm>:
push   %rbp
mov    %rsp,%rbp
mov    $0x4,%edi
call   1030 <BITHLm@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<BIT2HLm>:
mov    $0x4,%edi
jmp    1030 <BITHLm@plt>

LLVM IR (-O0):
define void @BIT2HLm() {
%1 = call i32 @BITHLm(i32 4)
ret void
}

LLVM IR (-O2):
define void @BIT2HLm() {
%1 = tail call i32 @BITHLm(i32 4)
ret void
}
/* Type definitions */
typedef scalar_t__ const wchar_t;

/* Variables and functions */
wchar_t *wcschr(wchar_t const *s, wchar_t c) {
  do {
    if (*s == c)
      return (wchar_t *)s;
  } while (*s++);
  return NULL;
}


x86 assembly (clang, -O0):
<wcschr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    (%rax),%rax
cmp    -0x18(%rbp),%rax
jne    112a <wcschr+0x2a>
mov    -0x10(%rbp),%rax
mov    %rax,-0x8(%rbp)
jmp    1150 <wcschr+0x50>
jmp    112f <wcschr+0x2f>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x8,%rcx
mov    %rcx,-0x10(%rbp)
cmpq   $0x0,(%rax)
jne    110c <wcschr+0xc>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wcschr>:
mov    %rdi,%rax
cs nopw 0x0(%rax,%rax,1)
nopl   (%rax)
mov    (%rax),%rcx
cmp    %rsi,%rcx
je     1123 <wcschr+0x23>
add    $0x8,%rax
test   %rcx,%rcx
jne    1110 <wcschr+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64* @wcschr(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64*
%5 = alloca i64
store i64* %0, i64** %4
store i64 %1, i64* %5
br label %6
6: ; preds = %14, %2
%7 = load i64*, i64** %4
%8 = load i64, i64* %7
%9 = load i64, i64* %5
%10 = icmp eq i64 %8, %9
br i1 %10, label %11, label %13
11: ; preds = %6
%12 = load i64*, i64** %4
store i64* %12, i64** %3
br label %20
13: ; preds = %6
br label %14
14: ; preds = %13
%15 = load i64*, i64** %4
%16 = getelementptr inbounds i64, i64* %15, i32 1
store i64* %16, i64** %4
%17 = load i64, i64* %15
%18 = icmp ne i64 %17, 0
br i1 %18, label %6, label %19
19: ; preds = %14
store i64* null, i64** %3
br label %20
20: ; preds = %19, %11
%21 = load i64*, i64** %3
ret i64* %21
}

LLVM IR (-O2):
define i64* @wcschr(i64* %0, i64 %1) {
br label %3
3: ; preds = %7, %2
%4 = phi i64* [ %0, %2 ], [ %8, %7 ]
%5 = load i64, i64* %4
%6 = icmp eq i64 %5, %1
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = getelementptr inbounds i64, i64* %4, i64 1
%9 = icmp eq i64 %5, 0
br i1 %9, label %10, label %3
10: ; preds = %7, %3
%11 = phi i64* [ %4, %3 ], [ null, %7 ]
ret i64* %11
}
/* Variables and functions */
int /*<<< orphan*/ fisica_regla1(char const *, char const *, char const *,
                                 char *);
void fisica_regla5(const char *paterno, const char *materno, const char *nombre,
                   char *result) {
  fisica_regla1(paterno, materno, nombre, result);
}


x86 assembly (clang, -O0):
<fisica_regla5>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
mov    %rcx,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x18(%rbp),%rdx
mov    -0x20(%rbp),%rcx
call   1030 <fisica_regla1@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fisica_regla5>:
jmp    1030 <fisica_regla1@plt>

LLVM IR (-O0):
define void @fisica_regla5(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i8*
%8 = alloca i8*
store i8* %0, i8** %5
store i8* %1, i8** %6
store i8* %2, i8** %7
store i8* %3, i8** %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i8*, i8** %7
%12 = load i8*, i8** %8
%13 = call i32 @fisica_regla1(i8* %9, i8* %10, i8* %11, i8* %12)
ret void
}

LLVM IR (-O2):
define void @fisica_regla5(i8* %0, i8* %1, i8* %2, i8* %3) {
%5 = tail call i32 @fisica_regla1(i8* %0, i8* %1, i8* %2, i8* %3)
ret void
}
int mem_storage_open(void *handle) { return 1; }


x86 assembly (clang, -O0):
<mem_storage_open>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<mem_storage_open>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @mem_storage_open(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret i32 1
}

LLVM IR (-O2):
define i32 @mem_storage_open(i8* nocapture readnone %0) {
ret i32 1
}
/* Variables and functions */
char *vrna_extract_record_rest_structure(char const **, unsigned int,
                                         unsigned int);
char *extract_record_rest_structure(const char **lines, unsigned int length,
                                    unsigned int options) {
  return vrna_extract_record_rest_structure(lines, length, options);
}


x86 assembly (clang, -O0):
<extract_record_rest_structure>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
mov    -0x10(%rbp),%edx
call   1030 <vrna_extract_record_rest_structure@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<extract_record_rest_structure>:
jmp    1030 <vrna_extract_record_rest_structure@plt>

LLVM IR (-O0):
define i8* @extract_record_rest_structure(i8** %0, i32 %1, i32 %2) {
%4 = alloca i8**
%5 = alloca i32
%6 = alloca i32
store i8** %0, i8*** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%7 = load i8**, i8*** %4
%8 = load i32, i32* %5
%9 = load i32, i32* %6
%10 = call i8* @vrna_extract_record_rest_structure(i8** %7, i32 %8, i32 %9)
ret i8* %10
}

LLVM IR (-O2):
define i8* @extract_record_rest_structure(i8** %0, i32 %1, i32 %2) {
%4 = tail call i8* @vrna_extract_record_rest_structure(i8** %0, i32 %1, i32 %2)
ret i8* %4
}
/* Type definitions */
typedef size_t int32_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void print_arr(int32_t *arr, size_t len) {
  int32_t i;
  for (i = 0; i < len; i++) {
    printf(" %d", arr[i]);
  }
  printf("\n");
}


x86 assembly (clang, -O0):
<print_arr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x18(%rbp),%rax
cmp    -0x10(%rbp),%rax
jae    1161 <print_arr+0x51>
mov    -0x8(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    (%rax,%rcx,8),%rsi
lea    0xeb7(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x18(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x18(%rbp)
jmp    1128 <print_arr+0x18>
lea    0xe9c(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_arr>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %rsi,%rsi
je     1157 <print_arr+0x37>
mov    %rsi,%r12
mov    %rdi,%r14
lea    0xec6(%rip),%r15
xor    %ebx,%ebx
nopl   0x0(%rax)
mov    (%r14,%rbx,8),%rsi
mov    %r15,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <print_arr+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c" %d\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @print_arr(i64* %0, i64 %1) {
%3 = alloca i64*
%4 = alloca i64
%5 = alloca i64
store i64* %0, i64** %3
store i64 %1, i64* %4
store i64 0, i64* %5
br label %6
6: ; preds = %16, %2
%7 = load i64, i64* %5
%8 = load i64, i64* %4
%9 = icmp ult i64 %7, %8
br i1 %9, label %10, label %19
10: ; preds = %6
%11 = load i64*, i64** %3
%12 = load i64, i64* %5
%13 = getelementptr inbounds i64, i64* %11, i64 %12
%14 = load i64, i64* %13
%15 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %14)
br label %16
16: ; preds = %10
%17 = load i64, i64* %5
%18 = add i64 %17, 1
store i64 %18, i64* %5
br label %6
19: ; preds = %6
%20 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c" %d\00"
define void @print_arr(i64* nocapture %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %11, label %4
4: ; preds = %2, %4
%5 = phi i64 [ %9, %4 ], [ 0, %2 ]
%6 = getelementptr inbounds i64, i64* %0, i64 %5
%7 = load i64, i64* %6
%8 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i64 %7)
%9 = add nuw i64 %5, 1
%10 = icmp eq i64 %9, %1
br i1 %10, label %11, label %4
11: ; preds = %4, %2
%12 = tail call i32 @putchar(i32 10)
ret void
}
void g_arith_sqrt_s64(void *s, void *d, void *o) {}


x86 assembly (clang, -O0):
<g_arith_sqrt_s64>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<g_arith_sqrt_s64>:
ret

LLVM IR (-O0):
define void @g_arith_sqrt_s64(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
define void @g_arith_sqrt_s64(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2) {
ret void
}
/* Type definitions */
struct timeval {
  int tv_sec;
  int tv_usec;
};

/* Variables and functions */
int /*<<< orphan*/ select(int /*<<< orphan*/, int /*<<< orphan*/ *,
                          int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                          struct timeval *);
void msleep(unsigned int ms) {
  int microsecs;
  struct timeval tv;
  microsecs = ms * 1000;
  tv.tv_sec = microsecs / 1000000;
  tv.tv_usec = microsecs % 1000000;
  select(0, NULL, NULL, NULL, &tv);
}


x86 assembly (clang, -O0):
<msleep>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
imul   $0x3e8,-0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%eax
mov    $0xf4240,%ecx
cltd
idiv   %ecx
mov    %edx,-0xc(%rbp)
xor    %edi,%edi
xor    %eax,%eax
mov    %eax,%ecx
lea    -0x10(%rbp),%r8
mov    %rcx,%rsi
mov    %rcx,%rdx
call   1030 <select@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<msleep>:
push   %rax
imul   $0x3e8,%edi,%eax
cltq
imul   $0x431bde83,%rax,%rcx
mov    %rcx,%rdx
shr    $0x3f,%rdx
sar    $0x32,%rcx
add    %edx,%ecx
mov    %ecx,(%rsp)
imul   $0xf4240,%ecx,%ecx
sub    %ecx,%eax
mov    %eax,0x4(%rsp)
mov    %rsp,%r8
xor    %edi,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
call   1030 <select@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.timeval = type { i32, i32 }
define void @msleep(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca %struct.timeval
store i32 %0, i32* %2
%5 = load i32, i32* %2
%6 = mul i32 %5, 1000
store i32 %6, i32* %3
%7 = load i32, i32* %3
%8 = sdiv i32 %7, 1000000
%9 = getelementptr inbounds %struct.timeval, %struct.timeval* %4, i32 0, i32 0
store i32 %8, i32* %9
%10 = load i32, i32* %3
%11 = srem i32 %10, 1000000
%12 = getelementptr inbounds %struct.timeval, %struct.timeval* %4, i32 0, i32 1
store i32 %11, i32* %12
%13 = call i32 @select(i32 0, i32* null, i32* null, i32* null, %struct.timeval* %4)
ret void
}

LLVM IR (-O2):
%struct.timeval = type { i32, i32 }
define void @msleep(i32 %0) {
%2 = alloca %struct.timeval
%3 = bitcast %struct.timeval* %2 to i8*
%4 = mul i32 %0, 1000
%5 = sdiv i32 %4, 1000000
%6 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i64 0, i32 0
store i32 %5, i32* %6
%7 = srem i32 %4, 1000000
%8 = getelementptr inbounds %struct.timeval, %struct.timeval* %2, i64 0, i32 1
store i32 %7, i32* %8
%9 = call i32 @select(i32 0, i32* null, i32* null, i32* null, %struct.timeval* %2)
ret void
}
/* Variables and functions */
char *U_WMRCORENONE_set(char *);
char *U_WMR3F_set(void) { return U_WMRCORENONE_set("U_WMR3F"); }


x86 assembly (clang, -O0):
<U_WMR3F_set>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <U_WMRCORENONE_set@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_WMR3F_set>:
lea    0xee9(%rip),%rdi
jmp    1030 <U_WMRCORENONE_set@plt>

LLVM IR (-O0):
@.str = [8 x i8] c"U_WMR3F\00"
define i8* @U_WMR3F_set() {
%1 = call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}

LLVM IR (-O2):
@.str = [8 x i8] c"U_WMR3F\00"
define i8* @U_WMR3F_set() {
%1 = tail call i8* @U_WMRCORENONE_set(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str, i64 0, i64 0))
ret i8* %1
}
/* Variables and functions */
size_t ft_sh_tablen(char **tab) {
  size_t length;
  length = 0;
  while (tab[length])
    length++;
  return (length);
}


x86 assembly (clang, -O0):
<ft_sh_tablen>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
cmpq   $0x0,(%rax,%rcx,8)
je     1134 <ft_sh_tablen+0x34>
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1110 <ft_sh_tablen+0x10>
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_sh_tablen>:
mov    $0xffffffffffffffff,%rax
nopw   0x0(%rax,%rax,1)
cmpq   $0x0,0x8(%rdi,%rax,8)
lea    0x1(%rax),%rax
jne    1110 <ft_sh_tablen+0x10>
ret

LLVM IR (-O0):
define i64 @ft_sh_tablen(i8** %0) {
%2 = alloca i8**
%3 = alloca i64
store i8** %0, i8*** %2
store i64 0, i64* %3
br label %4
4: ; preds = %10, %1
%5 = load i8**, i8*** %2
%6 = load i64, i64* %3
%7 = getelementptr inbounds i8*, i8** %5, i64 %6
%8 = load i8*, i8** %7
%9 = icmp ne i8* %8, null
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i64, i64* %3
%12 = add i64 %11, 1
store i64 %12, i64* %3
br label %4
13: ; preds = %4
%14 = load i64, i64* %3
ret i64 %14
}

LLVM IR (-O2):
define i64 @ft_sh_tablen(i8** nocapture %0) {
br label %2
2: ; preds = %2, %1
%3 = phi i64 [ 0, %1 ], [ %7, %2 ]
%4 = getelementptr inbounds i8*, i8** %0, i64 %3
%5 = load i8*, i8** %4
%6 = icmp eq i8* %5, null
%7 = add i64 %3, 1
br i1 %6, label %8, label %2
8: ; preds = %2
ret i64 %3
}
int logicalOr(int x, int y) { return !!x | !!y; }


x86 assembly (clang, -O0):
<logicalOr>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
setne  %al
xor    $0xff,%al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
cmpl   $0x0,-0x8(%rbp)
setne  %cl
xor    $0xff,%cl
xor    $0xff,%cl
and    $0x1,%cl
movzbl %cl,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<logicalOr>:
xor    %eax,%eax
or     %esi,%edi
setne  %al
ret

LLVM IR (-O0):
define i32 @logicalOr(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = icmp ne i32 %5, 0
%7 = xor i1 %6, true
%8 = xor i1 %7, true
%9 = zext i1 %8 to i32
%10 = load i32, i32* %4
%11 = icmp ne i32 %10, 0
%12 = xor i1 %11, true
%13 = xor i1 %12, true
%14 = zext i1 %13 to i32
%15 = or i32 %9, %14
ret i32 %15
}

LLVM IR (-O2):
define i32 @logicalOr(i32 %0, i32 %1) {
%3 = or i32 %1, %0
%4 = icmp ne i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int putchar_busy(int);
int putchar(int c) { return putchar_busy(c); }


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <putchar_busy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
jmp    1030 <putchar_busy@plt>

LLVM IR (-O0):
define i32 @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @putchar_busy(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @putchar(i32 %0) {
%2 = tail call i32 @putchar_busy(i32 %0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void KineticFree(void *pointer) { free(pointer); }


x86 assembly (clang, -O0):
<KineticFree>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<KineticFree>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @KineticFree(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @KineticFree(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
double __attribute__((regparmandstackparm, no)) munge_fast(double a, double b) {
  return a + b;
}


x86 assembly (clang, -O0):
<munge_fast>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  %xmm1,-0x10(%rbp)
movsd  -0x8(%rbp),%xmm0
addsd  -0x10(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<munge_fast>:
addsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @munge_fast(double %0, double %1) {
%3 = alloca double
%4 = alloca double
store double %0, double* %3
store double %1, double* %4
%5 = load double, double* %3
%6 = load double, double* %4
%7 = fadd double %5, %6
ret double %7
}

LLVM IR (-O2):
define double @munge_fast(double %0, double %1) {
%3 = fadd double %0, %1
ret double %3
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;

/* Variables and functions */
int /*<<< orphan*/ cpuHlDec();
int /*<<< orphan*/ cpuSThl(int /*<<< orphan*/ *);
void cpuSThlDec(uint8_t *reg) {
  cpuSThl(reg);
  cpuHlDec();
}


x86 assembly (clang, -O0):
<cpuSThlDec>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <cpuSThl@plt>
mov    $0x0,%al
call   1040 <cpuHlDec@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cpuSThlDec>:
push   %rax
call   1030 <cpuSThl@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <cpuHlDec@plt>

LLVM IR (-O0):
define void @cpuSThlDec(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = call i32 @cpuSThl(i32* %3)
%5 = call i32 (...) @cpuHlDec()
ret void
}

LLVM IR (-O2):
define void @cpuSThlDec(i32* %0) {
%2 = tail call i32 @cpuSThl(i32* %0)
%3 = tail call i32 (...) @cpuHlDec()
ret void
}
/* Variables and functions */
float add2(float, float);
float add1(float n) {
  if (n < 1)
    return 1;
  return 1 + add2(n - 1, n + 2);
}


x86 assembly (clang, -O0):
<add1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x8(%rbp)
movss  0xedb(%rip),%xmm0
ucomiss -0x8(%rbp),%xmm0
jbe    1141 <add1+0x31>
movss  0xec9(%rip),%xmm0
movss  %xmm0,-0x4(%rbp)
jmp    1178 <add1+0x68>
movss  -0x8(%rbp),%xmm0
movss  0xeb2(%rip),%xmm1
subss  %xmm1,%xmm0
movss  0xeaa(%rip),%xmm1
addss  -0x8(%rbp),%xmm1
call   1030 <add2@plt>
movaps %xmm0,%xmm1
movss  0xe91(%rip),%xmm0
addss  %xmm1,%xmm0
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<add1>:
push   %rax
movaps %xmm0,%xmm1
movss  0xee4(%rip),%xmm0
ucomiss %xmm1,%xmm0
ja     1142 <add1+0x32>
movss  0xedb(%rip),%xmm0
addss  %xmm1,%xmm0
addss  0xed3(%rip),%xmm1
call   1030 <add2@plt>
addss  0xebe(%rip),%xmm0
pop    %rax
ret

LLVM IR (-O0):
define float @add1(float %0) {
%2 = alloca float
%3 = alloca float
store float %0, float* %3
%4 = load float, float* %3
%5 = fcmp olt float %4, 1.000000e+00
br i1 %5, label %6, label %7
6: ; preds = %1
store float 1.000000e+00, float* %2
br label %14
7: ; preds = %1
%8 = load float, float* %3
%9 = fsub float %8, 1.000000e+00
%10 = load float, float* %3
%11 = fadd float %10, 2.000000e+00
%12 = call float @add2(float %9, float %11)
%13 = fadd float 1.000000e+00, %12
store float %13, float* %2
br label %14
14: ; preds = %7, %6
%15 = load float, float* %2
ret float %15
}

LLVM IR (-O2):
define float @add1(float %0) {
%2 = fcmp olt float %0, 1.000000e+00
br i1 %2, label %8, label %3
3: ; preds = %1
%4 = fadd float %0, -1.000000e+00
%5 = fadd float %0, 2.000000e+00
%6 = tail call float @add2(float %4, float %5)
%7 = fadd float %6, 1.000000e+00
br label %8
8: ; preds = %1, %3
%9 = phi float [ %7, %3 ], [ 1.000000e+00, %1 ]
ret float %9
}
int fun1309() { return 1309; }


x86 assembly (clang, -O0):
<fun1309>:
push   %rbp
mov    %rsp,%rbp
mov    $0x51d,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1309>:
mov    $0x51d,%eax
ret

LLVM IR (-O0):
define i32 @fun1309() {
ret i32 1309
}

LLVM IR (-O2):
define i32 @fun1309() {
ret i32 1309
}
void vset(float *v, float x, float y, float z) {
  {
    *(v + 0) = x;
    *(v + 1) = y;
    *(v + 2) = z;
    return;
  }
}


x86 assembly (clang, -O0):
<vset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
movss  %xmm0,-0xc(%rbp)
movss  %xmm1,-0x10(%rbp)
movss  %xmm2,-0x14(%rbp)
movss  -0xc(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,(%rax)
movss  -0x10(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x4(%rax)
movss  -0x14(%rbp),%xmm0
mov    -0x8(%rbp),%rax
movss  %xmm0,0x8(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<vset>:
movss  %xmm0,(%rdi)
movss  %xmm1,0x4(%rdi)
movss  %xmm2,0x8(%rdi)
ret

LLVM IR (-O0):
define void @vset(float* %0, float %1, float %2, float %3) {
%5 = alloca float*
%6 = alloca float
%7 = alloca float
%8 = alloca float
store float* %0, float** %5
store float %1, float* %6
store float %2, float* %7
store float %3, float* %8
%9 = load float, float* %6
%10 = load float*, float** %5
%11 = getelementptr inbounds float, float* %10, i64 0
store float %9, float* %11
%12 = load float, float* %7
%13 = load float*, float** %5
%14 = getelementptr inbounds float, float* %13, i64 1
store float %12, float* %14
%15 = load float, float* %8
%16 = load float*, float** %5
%17 = getelementptr inbounds float, float* %16, i64 2
store float %15, float* %17
ret void
}

LLVM IR (-O2):
define void @vset(float* nocapture writeonly %0, float %1, float %2, float %3) {
store float %1, float* %0
%5 = getelementptr inbounds float, float* %0, i64 1
store float %2, float* %5
%6 = getelementptr inbounds float, float* %0, i64 2
store float %3, float* %6
ret void
}
/* Variables and functions */
int /*<<< orphan*/ mystrlen(char *);
int /*<<< orphan*/ write(int, char *, int /*<<< orphan*/);
int main(int argc, char *const argv[]) {
  char *msg = "Hola mundo.\n";
  write(1, msg, mystrlen(msg));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x18(%rbp),%rdi
call   1040 <mystrlen@plt>
mov    -0x20(%rbp),%rsi
mov    %eax,%edx
mov    $0x1,%edi
call   1030 <write@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rbx
lea    0xed8(%rip),%rbx
mov    %rbx,%rdi
call   1040 <mystrlen@plt>
mov    $0x1,%edi
mov    %rbx,%rsi
mov    %eax,%edx
call   1030 <write@plt>
xor    %eax,%eax
pop    %rbx
ret

LLVM IR (-O0):
@.str = [13 x i8] c"Hola mundo.\0A\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i8*
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
store i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i8** %6
%7 = load i8*, i8** %6
%8 = load i8*, i8** %6
%9 = call i32 @mystrlen(i8* %8)
%10 = call i32 @write(i32 1, i8* %7, i32 %9)
ret i32 0
}

LLVM IR (-O2):
@.str = [13 x i8] c"Hola mundo.\0A\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = tail call i32 @mystrlen(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
%4 = tail call i32 @write(i32 1, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0), i32 %3)
ret i32 0
}
void *test_anti_range_93(unsigned long n) {
  extern void *alloc_anti_range_93(unsigned long)
      __attribute__((alloc_size(1)));
  if ((0x7fffffffffffffffL * 2LU + 1) - 2 <= n &&
      n <= (0x7fffffffffffffffL * 2LU + 1) - 1)
    n = (0x7fffffffffffffffL * 2LU + 1) - 2 - 1;
  return alloc_anti_range_93(n);
}


x86 assembly (clang, -O0):
<test_anti_range_93>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    $0xfffffffffffffffd,%rax
cmp    -0x8(%rbp),%rax
ja     1140 <test_anti_range_93+0x30>
cmpq   $0xfffffffffffffffe,-0x8(%rbp)
ja     1140 <test_anti_range_93+0x30>
movq   $0xfffffffffffffffc,-0x8(%rbp)
ff
mov    -0x8(%rbp),%rdi
call   1030 <alloc_anti_range_93@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_anti_range_93>:
lea    0x3(%rdi),%rax
cmp    $0x2,%rax
mov    $0xfffffffffffffffc,%rax
cmovb  %rax,%rdi
jmp    1030 <alloc_anti_range_93@plt>

LLVM IR (-O0):
define i8* @test_anti_range_93(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = icmp ule i64 -3, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i64, i64* %2
%7 = icmp ule i64 %6, -2
br i1 %7, label %8, label %9
8: ; preds = %5
store i64 -4, i64* %2
br label %9
9: ; preds = %8, %5, %1
%10 = load i64, i64* %2
%11 = call i8* @alloc_anti_range_93(i64 %10)
ret i8* %11
}

LLVM IR (-O2):
define i8* @test_anti_range_93(i64 %0) {
%2 = add i64 %0, 3
%3 = icmp ult i64 %2, 2
%4 = select i1 %3, i64 -4, i64 %0
%5 = tail call i8* @alloc_anti_range_93(i64 %4)
ret i8* %5
}
/* Variables and functions */
double cos(double);
double f_prime2(double x) { return cos(x); }


x86 assembly (clang, -O0):
<f_prime2>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <cos@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_prime2>:
jmp    1030 <cos@plt>

LLVM IR (-O0):
define double @f_prime2(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call double @cos(double %3)
ret double %4
}

LLVM IR (-O2):
define double @f_prime2(double %0) {
%2 = tail call double @cos(double %0)
ret double %2
}
/* Variables and functions */
int /*<<< orphan*/ laguna_writeb(int, int);
void __svgalib_laguna_outpal(int i, int r, int g, int b) {
  laguna_writeb(0xa8, i);
  laguna_writeb(0xac, r);
  laguna_writeb(0xac, g);
  laguna_writeb(0xac, b);
}


x86 assembly (clang, -O0):
<__svgalib_laguna_outpal>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    -0x4(%rbp),%esi
mov    $0xa8,%edi
call   1030 <laguna_writeb@plt>
mov    -0x8(%rbp),%esi
mov    $0xac,%edi
call   1030 <laguna_writeb@plt>
mov    -0xc(%rbp),%esi
mov    $0xac,%edi
call   1030 <laguna_writeb@plt>
mov    -0x10(%rbp),%esi
mov    $0xac,%edi
call   1030 <laguna_writeb@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__svgalib_laguna_outpal>:
push   %rbp
push   %r14
push   %rbx
mov    %ecx,%r14d
mov    %edx,%ebp
mov    %esi,%ebx
mov    %edi,%esi
mov    $0xa8,%edi
call   1030 <laguna_writeb@plt>
mov    $0xac,%edi
mov    %ebx,%esi
call   1030 <laguna_writeb@plt>
mov    $0xac,%edi
mov    %ebp,%esi
call   1030 <laguna_writeb@plt>
mov    $0xac,%edi
mov    %r14d,%esi
pop    %rbx
pop    %r14
pop    %rbp
jmp    1030 <laguna_writeb@plt>

LLVM IR (-O0):
define void @__svgalib_laguna_outpal(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = call i32 @laguna_writeb(i32 168, i32 %9)
%11 = load i32, i32* %6
%12 = call i32 @laguna_writeb(i32 172, i32 %11)
%13 = load i32, i32* %7
%14 = call i32 @laguna_writeb(i32 172, i32 %13)
%15 = load i32, i32* %8
%16 = call i32 @laguna_writeb(i32 172, i32 %15)
ret void
}

LLVM IR (-O2):
define void @__svgalib_laguna_outpal(i32 %0, i32 %1, i32 %2, i32 %3) {
%5 = tail call i32 @laguna_writeb(i32 168, i32 %0)
%6 = tail call i32 @laguna_writeb(i32 172, i32 %1)
%7 = tail call i32 @laguna_writeb(i32 172, i32 %2)
%8 = tail call i32 @laguna_writeb(i32 172, i32 %3)
ret void
}