void PRCMIORetentionDisable(unsigned long ulIORetGrpFlags) {
  if (((*((volatile unsigned long *)(0x00000400))) & 0xFFFF) >= 2) {
    (*((volatile unsigned long *)(0x4402E000 + 0x00000144))) &= ~(0x00001F00);
    (*((volatile unsigned long *)(0x4402E000 + 0x00000144))) |= 0x00000023;
    if (ulIORetGrpFlags & 0x00000001) {
      (*((volatile unsigned long *)(0x4402F800 + 0x0000040C))) &= ~0x5;
    }
    if (ulIORetGrpFlags & 0x00000002) {
      (*((volatile unsigned long *)(0x4402F800 + 0x00000418))) &= ~((0x3 << 5));
    }
    if (ulIORetGrpFlags & 0x00000004) {
      (*((volatile unsigned long *)(0x4402F800 + 0x00000414))) &= ~0x00000101;
    }
    if (ulIORetGrpFlags & 0x00000008) {
      (*((volatile unsigned long *)(0x4402F800 + 0x00000414))) &= ~0x00000204;
    }
  }
}


x86 assembly (clang, -O0):
<PRCMIORetentionDisable>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    $0x400,%eax
mov    (%rax),%rax
and    $0xffff,%rax
cmp    $0x2,%rax
jb     11ee <PRCMIORetentionDisable+0xee>
mov    $0x4402e144,%eax
mov    (%rax),%rcx
and    $0xffffffffffffe0ff,%rcx
mov    $0x4402e144,%eax
mov    %rcx,(%rax)
mov    $0x4402e144,%eax
mov    (%rax),%rcx
or     $0x23,%rcx
mov    $0x4402e144,%eax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
je     1171 <PRCMIORetentionDisable+0x71>
mov    $0x4402fc0c,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffffa,%rcx
mov    $0x4402fc0c,%eax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
and    $0x2,%rax
cmp    $0x0,%rax
je     1197 <PRCMIORetentionDisable+0x97>
mov    $0x4402fc18,%eax
mov    (%rax),%rcx
and    $0xffffffffffffff9f,%rcx
mov    $0x4402fc18,%eax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
and    $0x4,%rax
cmp    $0x0,%rax
je     11c0 <PRCMIORetentionDisable+0xc0>
mov    $0x4402fc14,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffefe,%rcx
mov    $0x4402fc14,%eax
mov    %rcx,(%rax)
mov    -0x8(%rbp),%rax
and    $0x8,%rax
cmp    $0x0,%rax
je     11e9 <PRCMIORetentionDisable+0xe9>
mov    $0x4402fc14,%eax
mov    (%rax),%rcx
and    $0xfffffffffffffdfb,%rcx
mov    $0x4402fc14,%eax
mov    %rcx,(%rax)
jmp    11ee <PRCMIORetentionDisable+0xee>
pop    %rbp
ret

x86 assembly (clang, -O2):
<PRCMIORetentionDisable>:
testq  $0xfffe,0x400
je     1147 <PRCMIORetentionDisable+0x47>
andq   $0xffffffffffffe0ff,0x4402e144
44 ff e0 ff ff
orq    $0x23,0x4402e144
44 23
test   $0x1,%dil
jne    1148 <PRCMIORetentionDisable+0x48>
test   $0x2,%dil
jne    1157 <PRCMIORetentionDisable+0x57>
test   $0x4,%dil
jne    1166 <PRCMIORetentionDisable+0x66>
test   $0x8,%dil
je     1147 <PRCMIORetentionDisable+0x47>
andq   $0xfffffffffffffdfb,0x4402fc14
44 fb fd ff ff
ret
andq   $0xfffffffffffffffa,0x4402fc0c
44 fa
test   $0x2,%dil
je     112f <PRCMIORetentionDisable+0x2f>
andq   $0xffffffffffffff9f,0x4402fc18
44 9f
test   $0x4,%dil
je     1135 <PRCMIORetentionDisable+0x35>
andq   $0xfffffffffffffefe,0x4402fc14
44 fe fe ff ff
test   $0x8,%dil
jne    113b <PRCMIORetentionDisable+0x3b>
jmp    1147 <PRCMIORetentionDisable+0x47>

LLVM IR (-O0):
define void @PRCMIORetentionDisable(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load volatile i64, i64* inttoptr (i64 1024 to i64*)
%4 = and i64 %3, 65535
%5 = icmp uge i64 %4, 2
br i1 %5, label %6, label %39
6: ; preds = %1
%7 = load volatile i64, i64* inttoptr (i64 1141039428 to i64*)
%8 = and i64 %7, -7937
store volatile i64 %8, i64* inttoptr (i64 1141039428 to i64*)
%9 = load volatile i64, i64* inttoptr (i64 1141039428 to i64*)
%10 = or i64 %9, 35
store volatile i64 %10, i64* inttoptr (i64 1141039428 to i64*)
%11 = load i64, i64* %2
%12 = and i64 %11, 1
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %6
%15 = load volatile i64, i64* inttoptr (i64 1141046284 to i64*)
%16 = and i64 %15, -6
store volatile i64 %16, i64* inttoptr (i64 1141046284 to i64*)
br label %17
17: ; preds = %14, %6
%18 = load i64, i64* %2
%19 = and i64 %18, 2
%20 = icmp ne i64 %19, 0
br i1 %20, label %21, label %24
21: ; preds = %17
%22 = load volatile i64, i64* inttoptr (i64 1141046296 to i64*)
%23 = and i64 %22, -97
store volatile i64 %23, i64* inttoptr (i64 1141046296 to i64*)
br label %24
24: ; preds = %21, %17
%25 = load i64, i64* %2
%26 = and i64 %25, 4
%27 = icmp ne i64 %26, 0
br i1 %27, label %28, label %31
28: ; preds = %24
%29 = load volatile i64, i64* inttoptr (i64 1141046292 to i64*)
%30 = and i64 %29, -258
store volatile i64 %30, i64* inttoptr (i64 1141046292 to i64*)
br label %31
31: ; preds = %28, %24
%32 = load i64, i64* %2
%33 = and i64 %32, 8
%34 = icmp ne i64 %33, 0
br i1 %34, label %35, label %38
35: ; preds = %31
%36 = load volatile i64, i64* inttoptr (i64 1141046292 to i64*)
%37 = and i64 %36, -517
store volatile i64 %37, i64* inttoptr (i64 1141046292 to i64*)
br label %38
38: ; preds = %35, %31
br label %39
39: ; preds = %38, %1
ret void
}

LLVM IR (-O2):
define void @PRCMIORetentionDisable(i64 %0) {
%2 = load volatile i64, i64* inttoptr (i64 1024 to i64*)
%3 = and i64 %2, 65534
%4 = icmp eq i64 %3, 0
br i1 %4, label %33, label %5
5: ; preds = %1
%6 = load volatile i64, i64* inttoptr (i64 1141039428 to i64*)
%7 = and i64 %6, -7937
store volatile i64 %7, i64* inttoptr (i64 1141039428 to i64*)
%8 = load volatile i64, i64* inttoptr (i64 1141039428 to i64*)
%9 = or i64 %8, 35
store volatile i64 %9, i64* inttoptr (i64 1141039428 to i64*)
%10 = and i64 %0, 1
%11 = icmp eq i64 %10, 0
br i1 %11, label %15, label %12
12: ; preds = %5
%13 = load volatile i64, i64* inttoptr (i64 1141046284 to i64*)
%14 = and i64 %13, -6
store volatile i64 %14, i64* inttoptr (i64 1141046284 to i64*)
br label %15
15: ; preds = %12, %5
%16 = and i64 %0, 2
%17 = icmp eq i64 %16, 0
br i1 %17, label %21, label %18
18: ; preds = %15
%19 = load volatile i64, i64* inttoptr (i64 1141046296 to i64*)
%20 = and i64 %19, -97
store volatile i64 %20, i64* inttoptr (i64 1141046296 to i64*)
br label %21
21: ; preds = %18, %15
%22 = and i64 %0, 4
%23 = icmp eq i64 %22, 0
br i1 %23, label %27, label %24
24: ; preds = %21
%25 = load volatile i64, i64* inttoptr (i64 1141046292 to i64*)
%26 = and i64 %25, -258
store volatile i64 %26, i64* inttoptr (i64 1141046292 to i64*)
br label %27
27: ; preds = %24, %21
%28 = and i64 %0, 8
%29 = icmp eq i64 %28, 0
br i1 %29, label %33, label %30
30: ; preds = %27
%31 = load volatile i64, i64* inttoptr (i64 1141046292 to i64*)
%32 = and i64 %31, -517
store volatile i64 %32, i64* inttoptr (i64 1141046292 to i64*)
br label %33
33: ; preds = %27, %30, %1
ret void
}