xunge/DecIR huggingface dataset:
/* Variables and functions */
int /*<<< orphan*/ assert(int /*<<< orphan*/);
unsigned precedenceLevel(char operator) {
  switch (operator) {
  case '+':
    return 1;
  case '-':
    return 1;
  case '*':
    return 2;
  case '/':
    return 2;
  case '%':
    return 2;
  case '^':
    return 3;
  default:
    assert(0);
  }
}


x86 assembly (clang, -O0):
<precedenceLevel>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%eax
add    $0xffffffdb,%eax
mov    %eax,%ecx
mov    %rcx,-0x10(%rbp)
sub    $0x39,%eax
ja     1190 <precedenceLevel+0x80>
mov    -0x10(%rbp),%rax
lea    0xec1(%rip),%rcx
movslq (%rcx,%rax,4),%rax
add    %rcx,%rax
jmp    *%rax
movl   $0x1,-0x4(%rbp)
jmp    1197 <precedenceLevel+0x87>
movl   $0x1,-0x4(%rbp)
jmp    1197 <precedenceLevel+0x87>
movl   $0x2,-0x4(%rbp)
jmp    1197 <precedenceLevel+0x87>
movl   $0x2,-0x4(%rbp)
jmp    1197 <precedenceLevel+0x87>
movl   $0x2,-0x4(%rbp)
jmp    1197 <precedenceLevel+0x87>
movl   $0x3,-0x4(%rbp)
jmp    1197 <precedenceLevel+0x87>
xor    %edi,%edi
call   1030 <assert@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<precedenceLevel>:
push   %rax
add    $0xffffffdb,%edi
cmp    $0x39,%edi
ja     1135 <precedenceLevel+0x25>
mov    $0x1,%eax
lea    0xedb(%rip),%rcx
movslq (%rcx,%rdi,4),%rdx
add    %rcx,%rdx
jmp    *%rdx
mov    $0x2,%eax
pop    %rcx
ret
xor    %edi,%edi
call   1030 <assert@plt>
pop    %rcx
ret
mov    $0x3,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @precedenceLevel(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
switch i32 %5, label %12 [
i32 43, label %6
i32 45, label %7
i32 42, label %8
i32 47, label %9
i32 37, label %10
i32 94, label %11
]
6: ; preds = %1
store i32 1, i32* %2
br label %14
7: ; preds = %1
store i32 1, i32* %2
br label %14
8: ; preds = %1
store i32 2, i32* %2
br label %14
9: ; preds = %1
store i32 2, i32* %2
br label %14
10: ; preds = %1
store i32 2, i32* %2
br label %14
11: ; preds = %1
store i32 3, i32* %2
br label %14
12: ; preds = %1
%13 = call i32 @assert(i32 0)
br label %14
14: ; preds = %6, %7, %8, %9, %10, %11, %12
%15 = load i32, i32* %2
ret i32 %15
}

LLVM IR (-O2):
define i32 @precedenceLevel(i8 signext %0) {
%2 = sext i8 %0 to i32
switch i32 %2, label %7 [
i32 43, label %9
i32 45, label %9
i32 42, label %3
i32 47, label %4
i32 37, label %5
i32 94, label %6
]
3: ; preds = %1
br label %9
4: ; preds = %1
br label %9
5: ; preds = %1
br label %9
6: ; preds = %1
br label %9
7: ; preds = %1
%8 = tail call i32 @assert(i32 0)
br label %9
9: ; preds = %1, %1, %3, %4, %5, %6, %7
%10 = phi i32 [ undef, %7 ], [ 3, %6 ], [ 2, %5 ], [ 2, %4 ], [ 2, %3 ], [ 1, %1 ], [ 1, %1 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ distance1_util(char *, char *, int /*<<< orphan*/, int, int);
void distance1(char str1[], char str2[], int len, int d) {
  distance1_util(str1, str2, 0, len, d);
}


x86 assembly (clang, -O0):
<distance1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
xor    %edx,%edx
call   1030 <distance1_util@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<distance1>:
mov    %ecx,%r8d
mov    %edx,%ecx
xor    %edx,%edx
jmp    1030 <distance1_util@plt>

LLVM IR (-O0):
define void @distance1(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i8*
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i8*, i8** %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @distance1_util(i8* %9, i8* %10, i32 0, i32 %11, i32 %12)
ret void
}

LLVM IR (-O2):
define void @distance1(i8* %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @distance1_util(i8* %0, i8* %1, i32 0, i32 %2, i32 %3)
ret void
}
/* Variables and functions */
int yas_bma250_read_reg_byte(int);
int yas_bma250_write_reg_byte(int, int);
int yas_bma250_set_offset_target_z(unsigned char data) {
  int ret = 0;
  int reg_data = 0;
  reg_data = yas_bma250_read_reg_byte(0x37);
  reg_data = ((reg_data & ~0x60) | ((data << 5) & 0x60));
  ret = yas_bma250_write_reg_byte(0x37, reg_data);
  return ret;
}


x86 assembly (clang, -O0):
<yas_bma250_set_offset_target_z>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %dil,%al
mov    %al,-0x1(%rbp)
movl   $0x0,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
mov    $0x37,%edi
call   1040 <yas_bma250_read_reg_byte@plt>
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%eax
and    $0xffffff9f,%eax
movzbl -0x1(%rbp),%ecx
shl    $0x5,%ecx
and    $0x60,%ecx
or     %ecx,%eax
mov    %eax,-0xc(%rbp)
mov    -0xc(%rbp),%esi
mov    $0x37,%edi
call   1030 <yas_bma250_write_reg_byte@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<yas_bma250_set_offset_target_z>:
push   %rbx
mov    %edi,%ebx
mov    $0x37,%edi
call   1040 <yas_bma250_read_reg_byte@plt>
and    $0xffffff9f,%eax
shl    $0x5,%ebx
and    $0x60,%ebx
or     %eax,%ebx
mov    $0x37,%edi
mov    %ebx,%esi
pop    %rbx
jmp    1030 <yas_bma250_write_reg_byte@plt>

LLVM IR (-O0):
define i32 @yas_bma250_set_offset_target_z(i8 zeroext %0) {
%2 = alloca i8
%3 = alloca i32
%4 = alloca i32
store i8 %0, i8* %2
store i32 0, i32* %3
store i32 0, i32* %4
%5 = call i32 @yas_bma250_read_reg_byte(i32 55)
store i32 %5, i32* %4
%6 = load i32, i32* %4
%7 = and i32 %6, -97
%8 = load i8, i8* %2
%9 = zext i8 %8 to i32
%10 = shl i32 %9, 5
%11 = and i32 %10, 96
%12 = or i32 %7, %11
store i32 %12, i32* %4
%13 = load i32, i32* %4
%14 = call i32 @yas_bma250_write_reg_byte(i32 55, i32 %13)
store i32 %14, i32* %3
%15 = load i32, i32* %3
ret i32 %15
}

LLVM IR (-O2):
define i32 @yas_bma250_set_offset_target_z(i8 zeroext %0) {
%2 = tail call i32 @yas_bma250_read_reg_byte(i32 55)
%3 = and i32 %2, -97
%4 = zext i8 %0 to i32
%5 = shl nuw nsw i32 %4, 5
%6 = and i32 %5, 96
%7 = or i32 %3, %6
%8 = tail call i32 @yas_bma250_write_reg_byte(i32 55, i32 %7)
ret i32 %8
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ int32_t;

/* Variables and functions */
size_t read_FD_BE(int, int /*<<< orphan*/ *, int);
size_t int32ReadFromFD(int fd, int32_t *data) {
  return read_FD_BE(fd, data, sizeof(uint32_t));
}


x86 assembly (clang, -O0):
<int32ReadFromFD>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x10(%rbp),%rsi
mov    $0x4,%edx
call   1030 <read_FD_BE@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<int32ReadFromFD>:
mov    $0x4,%edx
jmp    1030 <read_FD_BE@plt>

LLVM IR (-O0):
define i64 @int32ReadFromFD(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
store i32 %0, i32* %3
store i32* %1, i32** %4
%5 = load i32, i32* %3
%6 = load i32*, i32** %4
%7 = call i64 @read_FD_BE(i32 %5, i32* %6, i32 4)
ret i64 %7
}

LLVM IR (-O2):
define i64 @int32ReadFromFD(i32 %0, i32* %1) {
%3 = tail call i64 @read_FD_BE(i32 %0, i32* %1, i32 4)
ret i64 %3
}
/* Variables and functions */
int strtol(char *, int /*<<< orphan*/ *, int);
int parseoffset(char *s) { return strtol(s, NULL, 10); }


x86 assembly (clang, -O0):
<parseoffset>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
xor    %eax,%eax
mov    %eax,%esi
mov    $0xa,%edx
call   1030 <strtol@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<parseoffset>:
xor    %esi,%esi
mov    $0xa,%edx
jmp    1030 <strtol@plt>

LLVM IR (-O0):
define i32 @parseoffset(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @strtol(i8* %3, i32* null, i32 10)
ret i32 %4
}

LLVM IR (-O2):
define i32 @parseoffset(i8* nocapture %0) {
%2 = tail call i32 @strtol(i8* nocapture %0, i32* null, i32 10)
ret i32 %2
}
/* Type definitions */
struct stack_st_OPENSSL_BLOCK {
  int dummy;
};
typedef int /*<<< orphan*/ OPENSSL_STACK;

/* Variables and functions */
int OPENSSL_sk_num(int /*<<< orphan*/ const *);
int sk_OPENSSL_BLOCK_num(const struct stack_st_OPENSSL_BLOCK *sk) {
  return OPENSSL_sk_num((const OPENSSL_STACK *)sk);
}


x86 assembly (clang, -O0):
<sk_OPENSSL_BLOCK_num>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <OPENSSL_sk_num@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sk_OPENSSL_BLOCK_num>:
jmp    1030 <OPENSSL_sk_num@plt>

LLVM IR (-O0):
%struct.stack_st_OPENSSL_BLOCK = type { i32 }
define i32 @sk_OPENSSL_BLOCK_num(%struct.stack_st_OPENSSL_BLOCK* %0) {
%2 = alloca %struct.stack_st_OPENSSL_BLOCK*
store %struct.stack_st_OPENSSL_BLOCK* %0, %struct.stack_st_OPENSSL_BLOCK** %2
%3 = load %struct.stack_st_OPENSSL_BLOCK*, %struct.stack_st_OPENSSL_BLOCK** %2
%4 = bitcast %struct.stack_st_OPENSSL_BLOCK* %3 to i32*
%5 = call i32 @OPENSSL_sk_num(i32* %4)
ret i32 %5
}

LLVM IR (-O2):
%struct.stack_st_OPENSSL_BLOCK = type { i32 }
define i32 @sk_OPENSSL_BLOCK_num(%struct.stack_st_OPENSSL_BLOCK* %0) {
%2 = getelementptr %struct.stack_st_OPENSSL_BLOCK, %struct.stack_st_OPENSSL_BLOCK* %0, i64 0, i32 0
%3 = tail call i32 @OPENSSL_sk_num(i32* %2)
ret i32 %3
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ exit(int);
scalar_t__ fprintf(int /*<<< orphan*/ *, char *, int, char const *);
void send_status(FILE *client, int code, const char *reason_phrase) {
  if (fprintf(client, "HTTP/1.0 %d %s\r\n", code, reason_phrase) < 0)
    exit(-1);
}


x86 assembly (clang, -O0):
<send_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
lea    0xebb(%rip),%rsi
call   1030 <fprintf@plt>
cmp    $0x0,%rax
jge    115e <send_status+0x3e>
mov    $0xffffffff,%edi
call   1040 <exit@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<send_status>:
push   %rax
mov    %rdx,%rcx
mov    %esi,%edx
lea    0xed3(%rip),%rsi
call   1030 <fprintf@plt>
test   %rax,%rax
js     1139 <send_status+0x19>
pop    %rax
ret
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [17 x i8] c"HTTP/1.0 %d %s\0D\0A\00"
define void @send_status(i32* %0, i32 %1, i8* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca i8*
store i32* %0, i32** %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* %5
%9 = load i8*, i8** %6
%10 = call i64 @fprintf(i32* %7, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %8, i8* %9)
%11 = icmp slt i64 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %3
%13 = call i32 @exit(i32 -1)
unreachable
14: ; preds = %3
ret void
}

LLVM IR (-O2):
@.str = [17 x i8] c"HTTP/1.0 %d %s\0D\0A\00"
define void @send_status(i32* nocapture %0, i32 %1, i8* %2) {
%4 = tail call i64 @fprintf(i32* %0, i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i64 0, i64 0), i32 %1, i8* %2)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @exit(i32 -1)
unreachable
8: ; preds = %3
ret void
}
/* Variables and functions */
int __set_preferred_primary(char *, int);
int set_primary(char **args, int num_args) {
  return __set_preferred_primary(args[0], 1);
}


x86 assembly (clang, -O0):
<set_primary>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rdi
mov    $0x1,%esi
call   1030 <__set_preferred_primary@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<set_primary>:
mov    (%rdi),%rdi
mov    $0x1,%esi
jmp    1030 <__set_preferred_primary@plt>

LLVM IR (-O0):
define i32 @set_primary(i8** %0, i32 %1) {
%3 = alloca i8**
%4 = alloca i32
store i8** %0, i8*** %3
store i32 %1, i32* %4
%5 = load i8**, i8*** %3
%6 = getelementptr inbounds i8*, i8** %5, i64 0
%7 = load i8*, i8** %6
%8 = call i32 @__set_preferred_primary(i8* %7, i32 1)
ret i32 %8
}

LLVM IR (-O2):
define i32 @set_primary(i8** nocapture %0, i32 %1) {
%3 = load i8*, i8** %0
%4 = tail call i32 @__set_preferred_primary(i8* %3, i32 1)
ret i32 %4
}
void brick_fini(void *xl, char *brick, void *data) { return; }


x86 assembly (clang, -O0):
<brick_fini>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %rdx,-0x18(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<brick_fini>:
ret

LLVM IR (-O0):
define void @brick_fini(i8* %0, i8* %1, i8* %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i8*
store i8* %0, i8** %4
store i8* %1, i8** %5
store i8* %2, i8** %6
ret void
}

LLVM IR (-O2):
define void @brick_fini(i8* nocapture %0, i8* nocapture %1, i8* nocapture %2) {
ret void
}
void eglDestroyContext(void) { return; }


x86 assembly (clang, -O0):
<eglDestroyContext>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<eglDestroyContext>:
ret

LLVM IR (-O0):
define void @eglDestroyContext() {
ret void
}

LLVM IR (-O2):
define void @eglDestroyContext() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mpfr_srcptr;
typedef int /*<<< orphan*/ mpfr_ptr;

/* Variables and functions */
int /*<<< orphan*/ MPFR_RNDN;
int mpfr_pow(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/,
             int /*<<< orphan*/);
int p1788_fwd_pow_1(mpfr_ptr rop, mpfr_srcptr op, const void *env) {
  mpfr_srcptr op2 = (mpfr_srcptr)env;
  return mpfr_pow(rop, op, op2, MPFR_RNDN);
}


x86 assembly (clang, -O0):
<p1788_fwd_pow_1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %rdx,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %eax,-0x14(%rbp)
mov    -0x4(%rbp),%edi
mov    -0x8(%rbp),%esi
mov    -0x14(%rbp),%edx
mov    0x2eaf(%rip),%rax
mov    (%rax),%ecx
call   1030 <mpfr_pow@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<p1788_fwd_pow_1>:
mov    0x2ed1(%rip),%rax
mov    (%rax),%ecx
jmp    1030 <mpfr_pow@plt>

LLVM IR (-O0):
@MPFR_RNDN = global i32 0
define i32 @p1788_fwd_pow_1(i32 %0, i32 %1, i8* %2) {
%4 = alloca i32
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
store i32 %0, i32* %4
store i32 %1, i32* %5
store i8* %2, i8** %6
%8 = load i8*, i8** %6
%9 = ptrtoint i8* %8 to i32
store i32 %9, i32* %7
%10 = load i32, i32* %4
%11 = load i32, i32* %5
%12 = load i32, i32* %7
%13 = load i32, i32* @MPFR_RNDN
%14 = call i32 @mpfr_pow(i32 %10, i32 %11, i32 %12, i32 %13)
ret i32 %14
}

LLVM IR (-O2):
@MPFR_RNDN = global i32 0
define i32 @p1788_fwd_pow_1(i32 %0, i32 %1, i8* %2) {
%4 = ptrtoint i8* %2 to i64
%5 = trunc i64 %4 to i32
%6 = load i32, i32* @MPFR_RNDN
%7 = tail call i32 @mpfr_pow(i32 %0, i32 %1, i32 %5, i32 %6)
ret i32 %7
}
void console_blocking_mode(void) {}


x86 assembly (clang, -O0):
<console_blocking_mode>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<console_blocking_mode>:
ret

LLVM IR (-O0):
define void @console_blocking_mode() {
ret void
}

LLVM IR (-O2):
define void @console_blocking_mode() {
ret void
}
/* Type definitions */
typedef int uint32_t;

/* Variables and functions */
int UINT32_C(int);
uint32_t midr_get_variant(uint32_t midr) {
  return (midr & UINT32_C(0x00F00000)) >> 20;
}


x86 assembly (clang, -O0):
<midr_get_variant>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x8(%rbp)
mov    $0xf00000,%edi
call   1030 <UINT32_C@plt>
mov    %eax,%ecx
mov    -0x8(%rbp),%eax
and    %ecx,%eax
sar    $0x14,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<midr_get_variant>:
push   %rbx
mov    %edi,%ebx
mov    $0xf00000,%edi
call   1030 <UINT32_C@plt>
and    %ebx,%eax
sar    $0x14,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @midr_get_variant(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @UINT32_C(i32 15728640)
%5 = and i32 %3, %4
%6 = ashr i32 %5, 20
ret i32 %6
}

LLVM IR (-O2):
define i32 @midr_get_variant(i32 %0) {
%2 = tail call i32 @UINT32_C(i32 15728640)
%3 = and i32 %2, %0
%4 = ashr i32 %3, 20
ret i32 %4
}
unsigned long gds_hash_djb2(const char *s) {
  unsigned long hash = 5381;
  int c;
  if (!s)
    return 0;
  while ((c = *s++))
    hash = ((hash << 5) + hash) + c;
  return hash;
}


x86 assembly (clang, -O0):
<gds_hash_djb2>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
movq   $0x1505,-0x18(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1128 <gds_hash_djb2+0x28>
movq   $0x0,-0x8(%rbp)
jmp    116f <gds_hash_djb2+0x6f>
jmp    112d <gds_hash_djb2+0x2d>
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x10(%rbp)
movsbl (%rax),%eax
mov    %eax,-0x1c(%rbp)
cmp    $0x0,%eax
je     1167 <gds_hash_djb2+0x67>
mov    -0x18(%rbp),%rax
shl    $0x5,%rax
add    -0x18(%rbp),%rax
movslq -0x1c(%rbp),%rcx
add    %rcx,%rax
mov    %rax,-0x18(%rbp)
jmp    112d <gds_hash_djb2+0x2d>
mov    -0x18(%rbp),%rax
mov    %rax,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<gds_hash_djb2>:
test   %rdi,%rdi
je     113d <gds_hash_djb2+0x3d>
mov    (%rdi),%cl
test   %cl,%cl
je     1140 <gds_hash_djb2+0x40>
add    $0x1,%rdi
mov    $0x1505,%eax
cs nopw 0x0(%rax,%rax,1)
xchg   %ax,%ax
mov    %rax,%rdx
shl    $0x5,%rdx
add    %rax,%rdx
movsbq %cl,%rax
add    %rdx,%rax
movzbl (%rdi),%ecx
add    $0x1,%rdi
test   %cl,%cl
jne    1120 <gds_hash_djb2+0x20>
ret
xor    %eax,%eax
ret
mov    $0x1505,%eax
ret

LLVM IR (-O0):
define i64 @gds_hash_djb2(i8* %0) {
%2 = alloca i64
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i32
store i8* %0, i8** %3
store i64 5381, i64* %4
%6 = load i8*, i8** %3
%7 = icmp ne i8* %6, null
br i1 %7, label %9, label %8
8: ; preds = %1
store i64 0, i64* %2
br label %26
9: ; preds = %1
br label %10
10: ; preds = %16, %9
%11 = load i8*, i8** %3
%12 = getelementptr inbounds i8, i8* %11, i32 1
store i8* %12, i8** %3
%13 = load i8, i8* %11
%14 = sext i8 %13 to i32
store i32 %14, i32* %5
%15 = icmp ne i32 %14, 0
br i1 %15, label %16, label %24
16: ; preds = %10
%17 = load i64, i64* %4
%18 = shl i64 %17, 5
%19 = load i64, i64* %4
%20 = add i64 %18, %19
%21 = load i32, i32* %5
%22 = sext i32 %21 to i64
%23 = add i64 %20, %22
store i64 %23, i64* %4
br label %10
24: ; preds = %10
%25 = load i64, i64* %4
store i64 %25, i64* %2
br label %26
26: ; preds = %24, %8
%27 = load i64, i64* %2
ret i64 %27
}

LLVM IR (-O2):
define i64 @gds_hash_djb2(i8* %0) {
%2 = icmp eq i8* %0, null
br i1 %2, label %16, label %3
3: ; preds = %1
%4 = load i8, i8* %0
%5 = icmp eq i8 %4, 0
br i1 %5, label %16, label %6
6: ; preds = %3, %6
%7 = phi i8 [ %14, %6 ], [ %4, %3 ]
%8 = phi i64 [ %13, %6 ], [ 5381, %3 ]
%9 = phi i8* [ %10, %6 ], [ %0, %3 ]
%10 = getelementptr inbounds i8, i8* %9, i64 1
%11 = mul i64 %8, 33
%12 = sext i8 %7 to i64
%13 = add i64 %11, %12
%14 = load i8, i8* %10
%15 = icmp eq i8 %14, 0
br i1 %15, label %16, label %6
16: ; preds = %6, %3, %1
%17 = phi i64 [ 0, %1 ], [ 5381, %3 ], [ %13, %6 ]
ret i64 %17
}
int adis16203_configure_ring(struct iio_dev *indio_dev) { return 0; }


x86 assembly (clang, -O0):
<adis16203_configure_ring>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<adis16203_configure_ring>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.iio_dev = type opaque
define i32 @adis16203_configure_ring(%struct.iio_dev* %0) {
%2 = alloca %struct.iio_dev*
store %struct.iio_dev* %0, %struct.iio_dev** %2
ret i32 0
}

LLVM IR (-O2):
%struct.iio_dev = type opaque
define i32 @adis16203_configure_ring(%struct.iio_dev* nocapture readnone %0) {
ret i32 0
}
const char *ls_costN_nm2_name_in(int i) {
  switch (i) {
  case 0:
    return "i0";
  default:
    return 0;
  }
}


x86 assembly (clang, -O0):
<ls_costN_nm2_name_in>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
test   %eax,%eax
jne    1127 <ls_costN_nm2_name_in+0x27>
jmp    1117 <ls_costN_nm2_name_in+0x17>
lea    0xee2(%rip),%rax
mov    %rax,-0x8(%rbp)
jmp    112f <ls_costN_nm2_name_in+0x2f>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ls_costN_nm2_name_in>:
xor    %eax,%eax
test   %edi,%edi
lea    0xef5(%rip),%rcx
cmove  %rcx,%rax
ret

LLVM IR (-O0):
@.str = [3 x i8] c"i0\00"
define i8* @ls_costN_nm2_name_in(i32 %0) {
%2 = alloca i8*
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
switch i32 %4, label %6 [
i32 0, label %5
]
5: ; preds = %1
store i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8** %2
br label %7
6: ; preds = %1
store i8* null, i8** %2
br label %7
7: ; preds = %6, %5
%8 = load i8*, i8** %2
ret i8* %8
}

LLVM IR (-O2):
@.str = [3 x i8] c"i0\00"
define i8* @ls_costN_nm2_name_in(i32 %0) {
%2 = icmp eq i32 %0, 0
%3 = select i1 %2, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i8* null
ret i8* %3
}
/* Variables and functions */
size_t indexOf(char c, const char *chars, size_t N) {
  for (size_t i = 0; i < N; ++i) {
    if (chars[i] == c) {
      return i + 1;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<indexOf>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x9(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
movq   $0x0,-0x28(%rbp)
mov    -0x28(%rbp),%rax
cmp    -0x20(%rbp),%rax
jae    1167 <indexOf+0x67>
mov    -0x18(%rbp),%rax
mov    -0x28(%rbp),%rcx
movsbl (%rax,%rcx,1),%eax
movsbl -0x9(%rbp),%ecx
cmp    %ecx,%eax
jne    1151 <indexOf+0x51>
mov    -0x28(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    116f <indexOf+0x6f>
jmp    1156 <indexOf+0x56>
mov    -0x28(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x28(%rbp)
jmp    111a <indexOf+0x1a>
movq   $0x0,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<indexOf>:
test   %rdx,%rdx
je     1129 <indexOf+0x29>
neg    %rdx
mov    $0x1,%eax
nopl   (%rax)
cmp    %dil,-0x1(%rsi,%rax,1)
je     112b <indexOf+0x2b>
lea    (%rdx,%rax,1),%rcx
add    $0x1,%rcx
add    $0x1,%rax
cmp    $0x1,%rcx
jne    1110 <indexOf+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i64 @indexOf(i8 signext %0, i8* %1, i64 %2) {
%4 = alloca i64
%5 = alloca i8
%6 = alloca i8*
%7 = alloca i64
%8 = alloca i64
store i8 %0, i8* %5
store i8* %1, i8** %6
store i64 %2, i64* %7
store i64 0, i64* %8
br label %9
9: ; preds = %26, %3
%10 = load i64, i64* %8
%11 = load i64, i64* %7
%12 = icmp ult i64 %10, %11
br i1 %12, label %13, label %29
13: ; preds = %9
%14 = load i8*, i8** %6
%15 = load i64, i64* %8
%16 = getelementptr inbounds i8, i8* %14, i64 %15
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = load i8, i8* %5
%20 = sext i8 %19 to i32
%21 = icmp eq i32 %18, %20
br i1 %21, label %22, label %25
22: ; preds = %13
%23 = load i64, i64* %8
%24 = add i64 %23, 1
store i64 %24, i64* %4
br label %30
25: ; preds = %13
br label %26
26: ; preds = %25
%27 = load i64, i64* %8
%28 = add i64 %27, 1
store i64 %28, i64* %8
br label %9
29: ; preds = %9
store i64 0, i64* %4
br label %30
30: ; preds = %29, %22
%31 = load i64, i64* %4
ret i64 %31
}

LLVM IR (-O2):
define i64 @indexOf(i8 signext %0, i8* nocapture %1, i64 %2) {
%4 = icmp eq i64 %2, 0
br i1 %4, label %13, label %5
5: ; preds = %3, %11
%6 = phi i64 [ %10, %11 ], [ 0, %3 ]
%7 = getelementptr inbounds i8, i8* %1, i64 %6
%8 = load i8, i8* %7
%9 = icmp eq i8 %8, %0
%10 = add nuw i64 %6, 1
br i1 %9, label %13, label %11
11: ; preds = %5
%12 = icmp eq i64 %10, %2
br i1 %12, label %13, label %5
13: ; preds = %11, %5, %3
%14 = phi i64 [ 0, %3 ], [ 0, %11 ], [ %10, %5 ]
ret i64 %14
}
/* Type definitions */
struct pattern {
  int dummy;
};

/* Variables and functions */
int countlib(int);
int offset(int, int, int, int);
int autohelperowl_attackpat29(struct pattern *patt, int transformation,
                              int move, int color, int action) {
  int a;
  (void)patt;
  (void)color;
  (void)action;
  a = offset(-1, -1, move, transformation);
  return countlib(a) > 2;
}


x86 assembly (clang, -O0):
<autohelperowl_attackpat29>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    %r8d,-0x18(%rbp)
mov    -0x10(%rbp),%edx
mov    -0xc(%rbp),%ecx
mov    $0xffffffff,%esi
mov    %esi,%edi
call   1030 <offset@plt>
mov    %eax,-0x1c(%rbp)
mov    -0x1c(%rbp),%edi
call   1040 <countlib@plt>
cmp    $0x2,%eax
setg   %al
and    $0x1,%al
movzbl %al,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<autohelperowl_attackpat29>:
push   %rax
mov    %esi,%ecx
mov    $0xffffffff,%edi
mov    $0xffffffff,%esi
call   1030 <offset@plt>
mov    %eax,%edi
call   1040 <countlib@plt>
xor    %ecx,%ecx
cmp    $0x3,%eax
setge  %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.pattern = type { i32 }
define i32 @autohelperowl_attackpat29(%struct.pattern* %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = alloca %struct.pattern*
%7 = alloca i32
%8 = alloca i32
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
store %struct.pattern* %0, %struct.pattern** %6
store i32 %1, i32* %7
store i32 %2, i32* %8
store i32 %3, i32* %9
store i32 %4, i32* %10
%12 = load %struct.pattern*, %struct.pattern** %6
%13 = load i32, i32* %9
%14 = load i32, i32* %10
%15 = load i32, i32* %8
%16 = load i32, i32* %7
%17 = call i32 @offset(i32 -1, i32 -1, i32 %15, i32 %16)
store i32 %17, i32* %11
%18 = load i32, i32* %11
%19 = call i32 @countlib(i32 %18)
%20 = icmp sgt i32 %19, 2
%21 = zext i1 %20 to i32
ret i32 %21
}

LLVM IR (-O2):
%struct.pattern = type { i32 }
define i32 @autohelperowl_attackpat29(%struct.pattern* nocapture readnone %0, i32 %1, i32 %2, i32 %3, i32 %4) {
%6 = tail call i32 @offset(i32 -1, i32 -1, i32 %2, i32 %1)
%7 = tail call i32 @countlib(i32 %6)
%8 = icmp sgt i32 %7, 2
%9 = zext i1 %8 to i32
ret i32 %9
}
/* Variables and functions */
void bzero(void *b, size_t length) {
  char *p;
  for (p = b; length--;)
    *p++ = '\0';
}


x86 assembly (clang, -O0):
<bzero>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,%rcx
add    $0xffffffffffffffff,%rcx
mov    %rcx,-0x10(%rbp)
cmp    $0x0,%rax
je     1144 <bzero+0x44>
mov    -0x18(%rbp),%rax
mov    %rax,%rcx
add    $0x1,%rcx
mov    %rcx,-0x18(%rbp)
movb   $0x0,(%rax)
jmp    1114 <bzero+0x14>
pop    %rbp
ret

x86 assembly (clang, -O2):
<bzero>:
test   %rsi,%rsi
je     1124 <bzero+0x14>
push   %rax
mov    %rsi,%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x8,%rsp
ret

LLVM IR (-O0):
define void @bzero(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
%5 = alloca i8*
store i8* %0, i8** %3
store i64 %1, i64* %4
%6 = load i8*, i8** %3
store i8* %6, i8** %5
br label %7
7: ; preds = %11, %2
%8 = load i64, i64* %4
%9 = add i64 %8, -1
store i64 %9, i64* %4
%10 = icmp ne i64 %8, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i8*, i8** %5
%13 = getelementptr inbounds i8, i8* %12, i32 1
store i8* %13, i8** %5
store i8 0, i8* %12
br label %7
14: ; preds = %7
ret void
}

LLVM IR (-O2):
define void @bzero(i8* nocapture writeonly %0, i64 %1) {
%3 = icmp eq i64 %1, 0
br i1 %3, label %5, label %4
4: ; preds = %2
br label %5
5: ; preds = %4, %2
ret void
}
/* Variables and functions */
int /*<<< orphan*/ free(void *);
void sf_sdlist_free(void *p) {
  free(p);
  return;
}


x86 assembly (clang, -O0):
<sf_sdlist_free>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <free@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<sf_sdlist_free>:
jmp    1030 <free@plt>

LLVM IR (-O0):
define void @sf_sdlist_free(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @free(i8* %3)
ret void
}

LLVM IR (-O2):
define void @sf_sdlist_free(i8* nocapture %0) {
%2 = tail call i32 @free(i8* %0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
void *malloc(size_t);
int /*<<< orphan*/ note(int /*<<< orphan*/, char *, size_t);
void *allocMem(size_t size) {
  void *result = malloc(size);
  if (result == NULL) {
    note(0, "Failed to allocate %u bytes of memory\n", size);
    exit(1);
  }
  return result;
}


x86 assembly (clang, -O0):
<allocMem>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <malloc@plt>
mov    %rax,-0x10(%rbp)
cmpq   $0x0,-0x10(%rbp)
jne    1170 <allocMem+0x40>
mov    -0x8(%rbp),%rdx
xor    %edi,%edi
lea    0xe9f(%rip),%rsi
call   1040 <note@plt>
mov    $0x1,%edi
call   1050 <exit@plt>
mov    -0x10(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<allocMem>:
push   %rbx
mov    %rdi,%rbx
call   1030 <malloc@plt>
test   %rax,%rax
je     1140 <allocMem+0x10>
pop    %rbx
ret
lea    0xeb9(%rip),%rsi
xor    %edi,%edi
mov    %rbx,%rdx
call   1040 <note@plt>
mov    $0x1,%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@.str = [39 x i8] c"Failed to allocate %u bytes of memory\0A\00"
define i8* @allocMem(i64 %0) {
%2 = alloca i64
%3 = alloca i8*
store i64 %0, i64* %2
%4 = load i64, i64* %2
%5 = call i8* @malloc(i64 %4)
store i8* %5, i8** %3
%6 = load i8*, i8** %3
%7 = icmp eq i8* %6, null
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = load i64, i64* %2
%10 = call i32 @note(i32 0, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i64 %9)
%11 = call i32 @exit(i32 1)
unreachable
12: ; preds = %1
%13 = load i8*, i8** %3
ret i8* %13
}

LLVM IR (-O2):
@.str = [39 x i8] c"Failed to allocate %u bytes of memory\0A\00"
define noalias i8* @allocMem(i64 %0) {
%2 = tail call i8* @malloc(i64 %0)
%3 = icmp eq i8* %2, null
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 @note(i32 0, i8* getelementptr inbounds ([39 x i8], [39 x i8]* @.str, i64 0, i64 0), i64 %0)
%6 = tail call i32 @exit(i32 1)
unreachable
7: ; preds = %1
ret i8* %2
}
int abs(int i) {
  if (i > 0)
    return i;
  else
    return i * -1;
}


x86 assembly (clang, -O0):
<abs>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jle    111c <abs+0x1c>
mov    -0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    1123 <abs+0x23>
imul   $0xffffffff,-0x8(%rbp),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<abs>:
mov    %edi,%eax
neg    %eax
cmovs  %edi,%eax
ret

LLVM IR (-O0):
define i32 @abs(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %1
%7 = load i32, i32* %3
store i32 %7, i32* %2
br label %11
8: ; preds = %1
%9 = load i32, i32* %3
%10 = mul nsw i32 %9, -1
store i32 %10, i32* %2
br label %11
11: ; preds = %8, %6
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @abs(i32 %0) {
%2 = tail call i32 @llvm.abs.i32(i32 %0, i1 true)
ret i32 %2
}
int rnd(int maxRange) {
  static unsigned int x = 123456789;
  static unsigned int y = 362436069;
  static unsigned int z = 521288629;
  static unsigned int w = 88675123;
  unsigned int t;
  t = x ^ (x << 11);
  x = y;
  y = z;
  z = w;
  w = (w ^ (w >> 19)) ^ (t ^ (t >> 8));
  return w % maxRange;
}


x86 assembly (clang, -O0):
<rnd>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    0x2f13(%rip),%eax
mov    0x2f0d(%rip),%ecx
shl    $0xb,%ecx
xor    %ecx,%eax
mov    %eax,-0x8(%rbp)
mov    0x2f03(%rip),%eax
mov    %eax,0x2ef9(%rip)
mov    0x2efb(%rip),%eax
mov    %eax,0x2ef1(%rip)
mov    0x2ef3(%rip),%eax
mov    %eax,0x2ee9(%rip)
mov    0x2ee7(%rip),%eax
mov    0x2ee1(%rip),%ecx
shr    $0x13,%ecx
xor    %ecx,%eax
mov    -0x8(%rbp),%ecx
mov    -0x8(%rbp),%edx
shr    $0x8,%edx
xor    %edx,%ecx
xor    %ecx,%eax
mov    %eax,0x2ec9(%rip)
mov    0x2ec3(%rip),%eax
xor    %edx,%edx
divl   -0x4(%rbp)
mov    %edx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<rnd>:
mov    0x2f1a(%rip),%ecx
mov    %ecx,%eax
shl    $0xb,%eax
xor    %ecx,%eax
mov    0x2f11(%rip),%ecx
mov    %ecx,0x2f07(%rip)
mov    0x2f09(%rip),%ecx
mov    %ecx,0x2eff(%rip)
mov    0x2f01(%rip),%ecx
mov    %ecx,0x2ef7(%rip)
mov    %eax,%edx
shr    $0x8,%edx
xor    %ecx,%eax
shr    $0x13,%ecx
xor    %edx,%eax
xor    %ecx,%eax
mov    %eax,0x2ee7(%rip)
xor    %edx,%edx
div    %edi
mov    %edx,%eax
ret

LLVM IR (-O0):
@rnd.x = internal global i32 123456789
@rnd.y = internal global i32 362436069
@rnd.z = internal global i32 521288629
@rnd.w = internal global i32 88675123
define i32 @rnd(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* @rnd.x
%5 = load i32, i32* @rnd.x
%6 = shl i32 %5, 11
%7 = xor i32 %4, %6
store i32 %7, i32* %3
%8 = load i32, i32* @rnd.y
store i32 %8, i32* @rnd.x
%9 = load i32, i32* @rnd.z
store i32 %9, i32* @rnd.y
%10 = load i32, i32* @rnd.w
store i32 %10, i32* @rnd.z
%11 = load i32, i32* @rnd.w
%12 = load i32, i32* @rnd.w
%13 = lshr i32 %12, 19
%14 = xor i32 %11, %13
%15 = load i32, i32* %3
%16 = load i32, i32* %3
%17 = lshr i32 %16, 8
%18 = xor i32 %15, %17
%19 = xor i32 %14, %18
store i32 %19, i32* @rnd.w
%20 = load i32, i32* @rnd.w
%21 = load i32, i32* %2
%22 = urem i32 %20, %21
ret i32 %22
}

LLVM IR (-O2):
@rnd.x = internal unnamed_addr global i32 123456789
@rnd.y = internal unnamed_addr global i32 362436069
@rnd.z = internal unnamed_addr global i32 521288629
@rnd.w = internal unnamed_addr global i32 88675123
define i32 @rnd(i32 %0) {
%2 = load i32, i32* @rnd.x
%3 = shl i32 %2, 11
%4 = xor i32 %3, %2
%5 = load i32, i32* @rnd.y
store i32 %5, i32* @rnd.x
%6 = load i32, i32* @rnd.z
store i32 %6, i32* @rnd.y
%7 = load i32, i32* @rnd.w
store i32 %7, i32* @rnd.z
%8 = lshr i32 %7, 19
%9 = lshr i32 %4, 8
%10 = xor i32 %9, %4
%11 = xor i32 %10, %7
%12 = xor i32 %11, %8
store i32 %12, i32* @rnd.w
%13 = urem i32 %12, %0
ret i32 %13
}
/* Type definitions */
typedef int /*<<< orphan*/ uint8_t;
typedef int /*<<< orphan*/ uint64_t;

/* Variables and functions */
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
void store64_le(uint8_t dst[8], uint64_t w) { memcpy(dst, &w, sizeof w); }


x86 assembly (clang, -O0):
<store64_le>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<store64_le>:
push   %rax
mov    %esi,0x4(%rsp)
lea    0x4(%rsp),%rsi
mov    $0x4,%edx
call   1030 <memcpy@plt>
pop    %rax
ret

LLVM IR (-O0):
define void @store64_le(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
store i32 %1, i32* %4
%5 = load i32*, i32** %3
%6 = call i32 @memcpy(i32* %5, i32* %4, i32 4)
ret void
}

LLVM IR (-O2):
define void @store64_le(i32* %0, i32 %1) {
%3 = alloca i32
store i32 %1, i32* %3
%4 = call i32 @memcpy(i32* %0, i32* %3, i32 4)
ret void
}
/* Variables and functions */
char *ft_strrchr(const char *s, int c) {
  char *save;
  save = (char *)NULL;
  while (*s) {
    if (*s == c)
      save = (char *)s;
    s++;
  }
  if (*s == c)
    save = (char *)s;
  return (save);
}


x86 assembly (clang, -O0):
<ft_strrchr>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
movq   $0x0,-0x18(%rbp)
mov    -0x8(%rbp),%rax
cmpb   $0x0,(%rax)
je     1149 <ft_strrchr+0x49>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    -0xc(%rbp),%eax
jne    1138 <ft_strrchr+0x38>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x8(%rbp)
jmp    1113 <ft_strrchr+0x13>
mov    -0x8(%rbp),%rax
movsbl (%rax),%eax
cmp    -0xc(%rbp),%eax
jne    1161 <ft_strrchr+0x61>
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ft_strrchr>:
mov    %rdi,%rax
mov    (%rdi),%dl
xor    %ecx,%ecx
test   %dl,%dl
je     1125 <ft_strrchr+0x25>
nopl   0x0(%rax,%rax,1)
movsbl %dl,%edx
cmp    %esi,%edx
cmove  %rax,%rcx
movzbl 0x1(%rax),%edx
add    $0x1,%rax
test   %dl,%dl
jne    1110 <ft_strrchr+0x10>
test   %esi,%esi
cmovne %rcx,%rax
ret

LLVM IR (-O0):
define i8* @ft_strrchr(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
store i8* %0, i8** %3
store i32 %1, i32* %4
store i8* null, i8** %5
br label %6
6: ; preds = %18, %2
%7 = load i8*, i8** %3
%8 = load i8, i8* %7
%9 = icmp ne i8 %8, 0
br i1 %9, label %10, label %21
10: ; preds = %6
%11 = load i8*, i8** %3
%12 = load i8, i8* %11
%13 = sext i8 %12 to i32
%14 = load i32, i32* %4
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i8*, i8** %3
store i8* %17, i8** %5
br label %18
18: ; preds = %16, %10
%19 = load i8*, i8** %3
%20 = getelementptr inbounds i8, i8* %19, i32 1
store i8* %20, i8** %3
br label %6
21: ; preds = %6
%22 = load i8*, i8** %3
%23 = load i8, i8* %22
%24 = sext i8 %23 to i32
%25 = load i32, i32* %4
%26 = icmp eq i32 %24, %25
br i1 %26, label %27, label %29
27: ; preds = %21
%28 = load i8*, i8** %3
store i8* %28, i8** %5
br label %29
29: ; preds = %27, %21
%30 = load i8*, i8** %5
ret i8* %30
}

LLVM IR (-O2):
define i8* @ft_strrchr(i8* %0, i32 %1) {
%3 = load i8, i8* %0
%4 = icmp eq i8 %3, 0
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi i8 [ %13, %5 ], [ %3, %2 ]
%7 = phi i8* [ %11, %5 ], [ null, %2 ]
%8 = phi i8* [ %12, %5 ], [ %0, %2 ]
%9 = sext i8 %6 to i32
%10 = icmp eq i32 %9, %1
%11 = select i1 %10, i8* %8, i8* %7
%12 = getelementptr inbounds i8, i8* %8, i64 1
%13 = load i8, i8* %12
%14 = icmp eq i8 %13, 0
br i1 %14, label %15, label %5
15: ; preds = %5, %2
%16 = phi i8* [ %0, %2 ], [ %12, %5 ]
%17 = phi i8* [ null, %2 ], [ %11, %5 ]
%18 = icmp eq i32 %1, 0
%19 = select i1 %18, i8* %16, i8* %17
ret i8* %19
}
/* Type definitions */
typedef int /*<<< orphan*/ mode_t;

/* Variables and functions */
int syscall(int, int, char const *, int /*<<< orphan*/, int);
int fchmodat(int fd, const char *path, mode_t mode, int flag) {
  return syscall(306, fd, path, mode, flag);
}


x86 assembly (clang, -O0):
<fchmodat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
mov    %ecx,-0x18(%rbp)
mov    -0x4(%rbp),%esi
mov    -0x10(%rbp),%rdx
mov    -0x14(%rbp),%ecx
mov    -0x18(%rbp),%r8d
mov    $0x132,%edi
call   1030 <syscall@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fchmodat>:
mov    %ecx,%r8d
mov    %edx,%ecx
mov    %rsi,%rdx
mov    %edi,%esi
mov    $0x132,%edi
jmp    1030 <syscall@plt>

LLVM IR (-O0):
define i32 @fchmodat(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = alloca i32
%6 = alloca i8*
%7 = alloca i32
%8 = alloca i32
store i32 %0, i32* %5
store i8* %1, i8** %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32, i32* %5
%10 = load i8*, i8** %6
%11 = load i32, i32* %7
%12 = load i32, i32* %8
%13 = call i32 @syscall(i32 306, i32 %9, i8* %10, i32 %11, i32 %12)
ret i32 %13
}

LLVM IR (-O2):
define i32 @fchmodat(i32 %0, i8* %1, i32 %2, i32 %3) {
%5 = tail call i32 @syscall(i32 306, i32 %0, i8* %1, i32 %2, i32 %3)
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ test_genome_create();
int /*<<< orphan*/ test_genome_mutate();
int /*<<< orphan*/ test_genome_spawn();
void run_genome_tests() {
  test_genome_spawn();
  test_genome_mutate();
  test_genome_create();
}


x86 assembly (clang, -O0):
<run_genome_tests>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1050 <test_genome_spawn@plt>
mov    $0x0,%al
call   1030 <test_genome_mutate@plt>
mov    $0x0,%al
call   1040 <test_genome_create@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_genome_tests>:
push   %rax
xor    %eax,%eax
call   1050 <test_genome_spawn@plt>
xor    %eax,%eax
call   1030 <test_genome_mutate@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <test_genome_create@plt>

LLVM IR (-O0):
define void @run_genome_tests() {
%1 = call i32 (...) @test_genome_spawn()
%2 = call i32 (...) @test_genome_mutate()
%3 = call i32 (...) @test_genome_create()
ret void
}

LLVM IR (-O2):
define void @run_genome_tests() {
%1 = tail call i32 (...) @test_genome_spawn()
%2 = tail call i32 (...) @test_genome_mutate()
%3 = tail call i32 (...) @test_genome_create()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ mtx_t;

/* Variables and functions */
scalar_t__ pthread_mutex_lock(int /*<<< orphan*/ *);
int thrd_error;
int thrd_success;
int mtx_lock(mtx_t *mtx) {
  if (pthread_mutex_lock(mtx))
    return thrd_error;
  else
    return thrd_success;
}


x86 assembly (clang, -O0):
<mtx_lock>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <pthread_mutex_lock@plt>
cmp    $0x0,%rax
je     1140 <mtx_lock+0x30>
mov    0x2ea2(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
jmp    114c <mtx_lock+0x3c>
mov    0x2ea1(%rip),%rax
mov    (%rax),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mtx_lock>:
push   %rax
call   1030 <pthread_mutex_lock@plt>
test   %rax,%rax
jne    1124 <mtx_lock+0x14>
mov    0x2ec6(%rip),%rax
jmp    112b <mtx_lock+0x1b>
mov    0x2ead(%rip),%rax
mov    (%rax),%eax
pop    %rcx
ret

LLVM IR (-O0):
@thrd_error = global i32 0
@thrd_success = global i32 0
define i32 @mtx_lock(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
store i32* %0, i32** %3
%4 = load i32*, i32** %3
%5 = call i64 @pthread_mutex_lock(i32* %4)
%6 = icmp ne i64 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %1
%8 = load i32, i32* @thrd_error
store i32 %8, i32* %2
br label %11
9: ; preds = %1
%10 = load i32, i32* @thrd_success
store i32 %10, i32* %2
br label %11
11: ; preds = %9, %7
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
@thrd_error = global i32 0
@thrd_success = global i32 0
define i32 @mtx_lock(i32* %0) {
%2 = tail call i64 @pthread_mutex_lock(i32* %0)
%3 = icmp eq i64 %2, 0
%4 = load i32, i32* @thrd_success
%5 = load i32, i32* @thrd_error
%6 = select i1 %3, i32 %4, i32 %5
ret i32 %6
}
/* Type definitions */
typedef int uint8_t;

/* Variables and functions */
unsigned get_8_pixel(uint8_t *buf, unsigned row_bytes, unsigned x, unsigned y) {
  return buf[row_bytes * y + x];
}


x86 assembly (clang, -O0):
<get_8_pixel>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    %ecx,-0x14(%rbp)
mov    -0x8(%rbp),%rax
mov    -0xc(%rbp),%ecx
imul   -0x14(%rbp),%ecx
add    -0x10(%rbp),%ecx
mov    %ecx,%ecx
mov    (%rax,%rcx,4),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<get_8_pixel>:
imul   %ecx,%esi
add    %edx,%esi
mov    (%rdi,%rsi,4),%eax
ret

LLVM IR (-O0):
define i32 @get_8_pixel(i32* %0, i32 %1, i32 %2, i32 %3) {
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 %3, i32* %8
%9 = load i32*, i32** %5
%10 = load i32, i32* %6
%11 = load i32, i32* %8
%12 = mul i32 %10, %11
%13 = load i32, i32* %7
%14 = add i32 %12, %13
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds i32, i32* %9, i64 %15
%17 = load i32, i32* %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @get_8_pixel(i32* nocapture %0, i32 %1, i32 %2, i32 %3) {
%5 = mul i32 %3, %1
%6 = add i32 %5, %2
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i32, i32* %0, i64 %7
%9 = load i32, i32* %8
ret i32 %9
}
void gdb() { __asm__(""); }


x86 assembly (clang, -O0):
<gdb>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gdb>:
ret

LLVM IR (-O0):
define void @gdb() {
ret void
}

LLVM IR (-O2):
define void @gdb() {
tail call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ braf_displayErrorInInterpreter(char *, int const, int const);
unsigned int braf_valUnderflowCheck(const char *dataPtr, const int col,
                                    const int rw) {
  int dataVal = *dataPtr;
  if (dataVal < 0) {
    braf_displayErrorInInterpreter(
        "Value underflow. Cell cannot handle ASCII values less than 0.", col,
        rw);
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<braf_valUnderflowCheck>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
mov    %eax,-0x1c(%rbp)
cmpl   $0x0,-0x1c(%rbp)
jge    1154 <braf_valUnderflowCheck+0x44>
mov    -0x14(%rbp),%esi
mov    -0x18(%rbp),%edx
lea    0xebd(%rip),%rdi
call   1030 <braf_displayErrorInInterpreter@plt>
movl   $0x1,-0x4(%rbp)
jmp    115b <braf_valUnderflowCheck+0x4b>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<braf_valUnderflowCheck>:
push   %rax
xor    %eax,%eax
cmpb   $0x0,(%rdi)
js     111a <braf_valUnderflowCheck+0xa>
pop    %rcx
ret
lea    0xedf(%rip),%rdi
call   1030 <braf_displayErrorInInterpreter@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [62 x i8] c"Value underflow. Cell cannot handle ASCII values less than 0.\00"
define i32 @braf_valUnderflowCheck(i8* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i8* %0, i8** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
%9 = load i8*, i8** %5
%10 = load i8, i8* %9
%11 = sext i8 %10 to i32
store i32 %11, i32* %8
%12 = load i32, i32* %8
%13 = icmp slt i32 %12, 0
br i1 %13, label %14, label %18
14: ; preds = %3
%15 = load i32, i32* %6
%16 = load i32, i32* %7
%17 = call i32 @braf_displayErrorInInterpreter(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i32 %15, i32 %16)
store i32 1, i32* %4
br label %19
18: ; preds = %3
store i32 0, i32* %4
br label %19
19: ; preds = %18, %14
%20 = load i32, i32* %4
ret i32 %20
}

LLVM IR (-O2):
@.str = [62 x i8] c"Value underflow. Cell cannot handle ASCII values less than 0.\00"
define i32 @braf_valUnderflowCheck(i8* nocapture %0, i32 %1, i32 %2) {
%4 = load i8, i8* %0
%5 = icmp slt i8 %4, 0
br i1 %5, label %6, label %8
6: ; preds = %3
%7 = tail call i32 @braf_displayErrorInInterpreter(i8* getelementptr inbounds ([62 x i8], [62 x i8]* @.str, i64 0, i64 0), i32 %1, i32 %2)
br label %8
8: ; preds = %3, %6
%9 = phi i32 [ 1, %6 ], [ 0, %3 ]
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ __bios_putchar(unsigned char);
int putchar(int c) {
  if (c == '\n')
    __bios_putchar('\r');
  __bios_putchar((unsigned char)c);
  return c;
}


x86 assembly (clang, -O0):
<putchar>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jne    112f <putchar+0x1f>
mov    $0xd,%edi
call   1030 <__bios_putchar@plt>
mov    -0x4(%rbp),%eax
movzbl %al,%edi
call   1030 <__bios_putchar@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<putchar>:
push   %rbx
mov    %edi,%ebx
cmp    $0xa,%edi
jne    1122 <putchar+0x12>
mov    $0xd,%edi
call   1030 <__bios_putchar@plt>
movzbl %bl,%edi
call   1030 <__bios_putchar@plt>
mov    %ebx,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @putchar(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = icmp eq i32 %3, 10
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @__bios_putchar(i8 zeroext 13)
br label %7
7: ; preds = %5, %1
%8 = load i32, i32* %2
%9 = trunc i32 %8 to i8
%10 = call i32 @__bios_putchar(i8 zeroext %9)
%11 = load i32, i32* %2
ret i32 %11
}

LLVM IR (-O2):
define i32 @putchar(i32 returned %0) {
%2 = icmp eq i32 %0, 10
br i1 %2, label %3, label %5
3: ; preds = %1
%4 = tail call i32 @__bios_putchar(i8 zeroext 13)
br label %5
5: ; preds = %3, %1
%6 = trunc i32 %0 to i8
%7 = tail call i32 @__bios_putchar(i8 zeroext %6)
ret i32 %0
}