xunge/DecIR huggingface dataset:
/* Variables and functions */
uintptr_t align(uintptr_t v, size_t align) {
  return (v + (align - 1)) & -align;
}


x86 assembly (clang, -O0):
<align>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    -0x10(%rbp),%rcx
sub    $0x1,%rcx
add    %rcx,%rax
xor    %ecx,%ecx
sub    -0x10(%rbp),%rcx
and    %rcx,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<align>:
lea    (%rdi,%rsi,1),%rax
add    $0xffffffffffffffff,%rax
neg    %rsi
and    %rsi,%rax
ret

LLVM IR (-O0):
define i64 @align(i64 %0, i64 %1) {
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %3
store i64 %1, i64* %4
%5 = load i64, i64* %3
%6 = load i64, i64* %4
%7 = sub i64 %6, 1
%8 = add i64 %5, %7
%9 = load i64, i64* %4
%10 = sub i64 0, %9
%11 = and i64 %8, %10
ret i64 %11
}

LLVM IR (-O2):
define i64 @align(i64 %0, i64 %1) {
%3 = add i64 %0, -1
%4 = add i64 %3, %1
%5 = sub i64 0, %1
%6 = and i64 %4, %5
ret i64 %6
}
/* Variables and functions */
int /*<<< orphan*/ system(char *);
void cleanup_test(void) {
  system("rmmod "
         "tracer");
}


x86 assembly (clang, -O0):
<cleanup_test>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <system@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cleanup_test>:
lea    0xee9(%rip),%rdi
jmp    1030 <system@plt>

LLVM IR (-O0):
@.str = [13 x i8] c"rmmod tracer\00"
define void @cleanup_test() {
%1 = call i32 @system(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [13 x i8] c"rmmod tracer\00"
define void @cleanup_test() {
%1 = tail call i32 @system(i8* getelementptr inbounds ([13 x i8], [13 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ u_int8_t;

/* Variables and functions */
int /*<<< orphan*/ inBounds(int /*<<< orphan*/ *, int /*<<< orphan*/ *,
                            int /*<<< orphan*/ *);
int SafeWrite(u_int8_t *start, u_int8_t *end, u_int8_t *dst, u_int8_t *src) {
  if (!inBounds(start, end, dst)) {
    return 0;
    ;
  }
  *dst = *src;
  return 1;
}


x86 assembly (clang, -O0):
<SafeWrite>:
push   %rbp
mov    %rsp,%rbp
sub    $0x30,%rsp
mov    %rdi,-0x10(%rbp)
mov    %rsi,-0x18(%rbp)
mov    %rdx,-0x20(%rbp)
mov    %rcx,-0x28(%rbp)
mov    -0x10(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    -0x20(%rbp),%rdx
call   1030 <inBounds@plt>
cmp    $0x0,%eax
jne    114e <SafeWrite+0x3e>
movl   $0x0,-0x4(%rbp)
jmp    1161 <SafeWrite+0x51>
mov    -0x28(%rbp),%rax
mov    (%rax),%ecx
mov    -0x20(%rbp),%rax
mov    %ecx,(%rax)
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x30,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<SafeWrite>:
push   %r14
push   %rbx
push   %rax
mov    %rcx,%r14
mov    %rdx,%rbx
call   1030 <inBounds@plt>
test   %eax,%eax
je     112f <SafeWrite+0x1f>
mov    (%r14),%eax
mov    %eax,(%rbx)
mov    $0x1,%eax
jmp    1131 <SafeWrite+0x21>
xor    %eax,%eax
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define i32 @SafeWrite(i32* %0, i32* %1, i32* %2, i32* %3) {
%5 = alloca i32
%6 = alloca i32*
%7 = alloca i32*
%8 = alloca i32*
%9 = alloca i32*
store i32* %0, i32** %6
store i32* %1, i32** %7
store i32* %2, i32** %8
store i32* %3, i32** %9
%10 = load i32*, i32** %6
%11 = load i32*, i32** %7
%12 = load i32*, i32** %8
%13 = call i32 @inBounds(i32* %10, i32* %11, i32* %12)
%14 = icmp ne i32 %13, 0
br i1 %14, label %16, label %15
15: ; preds = %4
store i32 0, i32* %5
br label %20
16: ; preds = %4
%17 = load i32*, i32** %9
%18 = load i32, i32* %17
%19 = load i32*, i32** %8
store i32 %18, i32* %19
store i32 1, i32* %5
br label %20
20: ; preds = %16, %15
%21 = load i32, i32* %5
ret i32 %21
}

LLVM IR (-O2):
define i32 @SafeWrite(i32* %0, i32* %1, i32* %2, i32* nocapture %3) {
%5 = tail call i32 @inBounds(i32* %0, i32* %1, i32* %2)
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %4
%8 = load i32, i32* %3
store i32 %8, i32* %2
br label %9
9: ; preds = %4, %7
%10 = phi i32 [ 1, %7 ], [ 0, %4 ]
ret i32 %10
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int pa_tagstruct_put_channel_map() {
  printf("NOT IMPLEMENTED:"
         "pa_tagstruct_put_channel_map"
         "\n");
}


x86 assembly (clang, -O0):
<pa_tagstruct_put_channel_map>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xee1(%rip),%rdi
call   1030 <printf@plt>
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pa_tagstruct_put_channel_map>:
lea    0xee9(%rip),%rdi
jmp    1030 <puts@plt>

LLVM IR (-O0):
@.str = [46 x i8] c"NOT IMPLEMENTED:pa_tagstruct_put_channel_map\0A\00"
define i32 @pa_tagstruct_put_channel_map() {
%1 = alloca i32
%2 = call i32 @printf(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @.str, i64 0, i64 0))
%3 = load i32, i32* %1
ret i32 %3
}

LLVM IR (-O2):
@str = [45 x i8] c"NOT IMPLEMENTED:pa_tagstruct_put_channel_map\00"
define i32 @pa_tagstruct_put_channel_map() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @str, i64 0, i64 0))
ret i32 undef
}
int test_imm_74int64_midword_reg(long long val) {
  return ((val >> 16) & (0x74 << 0)) ? -20 : -40;
}


x86 assembly (clang, -O0):
<test_imm_74int64_midword_reg>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdx
sar    $0x10,%rdx
and    $0x74,%rdx
mov    $0xffffffd8,%eax
mov    $0xffffffec,%ecx
cmp    $0x0,%rdx
cmovne %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_imm_74int64_midword_reg>:
test   $0x740000,%edi
mov    $0xffffffd8,%ecx
mov    $0xffffffec,%eax
cmove  %ecx,%eax
ret

LLVM IR (-O0):
define i32 @test_imm_74int64_midword_reg(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = ashr i64 %3, 16
%5 = and i64 %4, 116
%6 = icmp ne i64 %5, 0
%7 = zext i1 %6 to i64
%8 = select i1 %6, i32 -20, i32 -40
ret i32 %8
}

LLVM IR (-O2):
define i32 @test_imm_74int64_midword_reg(i64 %0) {
%2 = and i64 %0, 7602176
%3 = icmp eq i64 %2, 0
%4 = select i1 %3, i32 -40, i32 -20
ret i32 %4
}
/* Variables and functions */
int fdt_cells(void const *, int, char *);
int fdt_address_cells(const void *fdt, int nodeoffset) {
  return fdt_cells(fdt, nodeoffset, "#address-cells");
}


x86 assembly (clang, -O0):
<fdt_address_cells>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
lea    0xed3(%rip),%rdx
call   1030 <fdt_cells@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fdt_address_cells>:
lea    0xee9(%rip),%rdx
jmp    1030 <fdt_cells@plt>

LLVM IR (-O0):
@.str = [15 x i8] c"#address-cells\00"
define i32 @fdt_address_cells(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%5 = load i8*, i8** %3
%6 = load i32, i32* %4
%7 = call i32 @fdt_cells(i8* %5, i32 %6, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 %7
}

LLVM IR (-O2):
@.str = [15 x i8] c"#address-cells\00"
define i32 @fdt_address_cells(i8* %0, i32 %1) {
%3 = tail call i32 @fdt_cells(i8* %0, i32 %1, i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str, i64 0, i64 0))
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ fprintf(int /*<<< orphan*/, char *);
int /*<<< orphan*/ stderr;
int tr_root_usage() {
  fprintf(stderr, "Usage: treebest root <tree>\n");
  return 1;
}


x86 assembly (clang, -O0):
<tr_root_usage>:
push   %rbp
mov    %rsp,%rbp
mov    0x2ec5(%rip),%rax
mov    (%rax),%edi
lea    0xedc(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<tr_root_usage>:
push   %rax
mov    0x2ec8(%rip),%rax
mov    (%rax),%edi
lea    0xedf(%rip),%rsi
call   1030 <fprintf@plt>
mov    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
@stderr = global i32 0
@.str = [29 x i8] c"Usage: treebest root <tree>\0A\00"
define i32 @tr_root_usage() {
%1 = load i32, i32* @stderr
%2 = call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret i32 1
}

LLVM IR (-O2):
@stderr = global i32 0
@.str = [29 x i8] c"Usage: treebest root <tree>\0A\00"
define i32 @tr_root_usage() {
%1 = load i32, i32* @stderr
%2 = tail call i32 @fprintf(i32 %1, i8* getelementptr inbounds ([29 x i8], [29 x i8]* @.str, i64 0, i64 0))
ret i32 1
}
void hello(void) {
  int i;
  char *hellostr = "helloworld";
  long *paddr = (long *)0xfffd001c;
  int timeout;
  i = *hellostr - 'h';
  while (1) {
    timeout = 0;
    while (++timeout != 1000000)
      ;
    for (i = 0; i < 10; i++) {
      *paddr = hellostr[i];
    }
  }
  return;
}


x86 assembly (clang, -O0):
<hello>:
push   %rbp
mov    %rsp,%rbp
lea    0xef5(%rip),%rax
mov    %rax,-0x10(%rbp)
mov    $0xfffd001c,%eax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rax
movsbl (%rax),%eax
sub    $0x68,%eax
mov    %eax,-0x4(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
cmp    $0xf4240,%eax
je     1145 <hello+0x45>
jmp    112c <hello+0x2c>
movl   $0x0,-0x4(%rbp)
cmpl   $0xa,-0x4(%rbp)
jge    1178 <hello+0x78>
mov    -0x10(%rbp),%rax
movslq -0x4(%rbp),%rcx
movsbq (%rax,%rcx,1),%rcx
mov    -0x18(%rbp),%rax
mov    %rcx,(%rax)
mov    -0x4(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    114c <hello+0x4c>
jmp    1125 <hello+0x25>

x86 assembly (clang, -O2):
<hello>:
mov    $0xfffd001c,%eax
movq   $0x64,(%rax)
nopl   0x0(%rax)
jmp    1110 <hello+0x10>

LLVM IR (-O0):
@.str = [11 x i8] c"helloworld\00"
define void @hello() {
%1 = alloca i32
%2 = alloca i8*
%3 = alloca i64*
%4 = alloca i32
store i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i64 0, i64 0), i8** %2
store i64* inttoptr (i64 4294770716 to i64*), i64** %3
%5 = load i8*, i8** %2
%6 = load i8, i8* %5
%7 = sext i8 %6 to i32
%8 = sub nsw i32 %7, 104
store i32 %8, i32* %1
br label %9
9: ; preds = %0, %30
store i32 0, i32* %4
br label %10
10: ; preds = %14, %9
%11 = load i32, i32* %4
%12 = add nsw i32 %11, 1
store i32 %12, i32* %4
%13 = icmp ne i32 %12, 1000000
br i1 %13, label %14, label %15
14: ; preds = %10
br label %10
15: ; preds = %10
store i32 0, i32* %1
br label %16
16: ; preds = %27, %15
%17 = load i32, i32* %1
%18 = icmp slt i32 %17, 10
br i1 %18, label %19, label %30
19: ; preds = %16
%20 = load i8*, i8** %2
%21 = load i32, i32* %1
%22 = sext i32 %21 to i64
%23 = getelementptr inbounds i8, i8* %20, i64 %22
%24 = load i8, i8* %23
%25 = sext i8 %24 to i64
%26 = load i64*, i64** %3
store i64 %25, i64* %26
br label %27
27: ; preds = %19
%28 = load i32, i32* %1
%29 = add nsw i32 %28, 1
store i32 %29, i32* %1
br label %16
30: ; preds = %16
br label %9
}

LLVM IR (-O2):
define void @hello() {
store i64 100, i64* inttoptr (i64 4294770716 to i64*)
br label %1
1: ; preds = %1, %0
br label %1
}
/* Variables and functions */
void *cst_safe_alloc(int);
void *cst_safe_calloc(int size) { return cst_safe_alloc(size); }


x86 assembly (clang, -O0):
<cst_safe_calloc>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <cst_safe_alloc@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cst_safe_calloc>:
jmp    1030 <cst_safe_alloc@plt>

LLVM IR (-O0):
define i8* @cst_safe_calloc(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i8* @cst_safe_alloc(i32 %3)
ret i8* %4
}

LLVM IR (-O2):
define i8* @cst_safe_calloc(i32 %0) {
%2 = tail call i8* @cst_safe_alloc(i32 %0)
ret i8* %2
}
/* Variables and functions */
int /*<<< orphan*/ ssd1306_write_command(int);
void ssd1306_display_off(void) { ssd1306_write_command(0xAE); }


x86 assembly (clang, -O0):
<ssd1306_display_off>:
push   %rbp
mov    %rsp,%rbp
mov    $0xae,%edi
call   1030 <ssd1306_write_command@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<ssd1306_display_off>:
mov    $0xae,%edi
jmp    1030 <ssd1306_write_command@plt>

LLVM IR (-O0):
define void @ssd1306_display_off() {
%1 = call i32 @ssd1306_write_command(i32 174)
ret void
}

LLVM IR (-O2):
define void @ssd1306_display_off() {
%1 = tail call i32 @ssd1306_write_command(i32 174)
ret void
}
/* Type definitions */
struct flashctx {
  int dummy;
};

/* Variables and functions */
int spi_disable_blockprotect_generic(struct flashctx *, int, int,
                                     int /*<<< orphan*/);
int spi_disable_blockprotect_at25fs040(struct flashctx *flash) {
  return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0);
}


x86 assembly (clang, -O0):
<spi_disable_blockprotect_at25fs040>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x7c,%esi
mov    $0x80,%edx
xor    %ecx,%ecx
call   1030 <spi_disable_blockprotect_generic@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<spi_disable_blockprotect_at25fs040>:
mov    $0x7c,%esi
mov    $0x80,%edx
xor    %ecx,%ecx
jmp    1030 <spi_disable_blockprotect_generic@plt>

LLVM IR (-O0):
%struct.flashctx = type { i32 }
define i32 @spi_disable_blockprotect_at25fs040(%struct.flashctx* %0) {
%2 = alloca %struct.flashctx*
store %struct.flashctx* %0, %struct.flashctx** %2
%3 = load %struct.flashctx*, %struct.flashctx** %2
%4 = call i32 @spi_disable_blockprotect_generic(%struct.flashctx* %3, i32 124, i32 128, i32 0)
ret i32 %4
}

LLVM IR (-O2):
%struct.flashctx = type { i32 }
define i32 @spi_disable_blockprotect_at25fs040(%struct.flashctx* %0) {
%2 = tail call i32 @spi_disable_blockprotect_generic(%struct.flashctx* %0, i32 124, i32 128, i32 0)
ret i32 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *, int *);
int main(int argc, char *argv[]) {
  int A, B;
  scanf("%d %d", &A, &B);
  printf("%d", A + B + A * B);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
movl   $0x0,-0x4(%rbp)
mov    %edi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
lea    0xec3(%rip),%rdi
lea    -0x14(%rbp),%rsi
lea    -0x18(%rbp),%rdx
call   1040 <scanf@plt>
mov    -0x14(%rbp),%esi
add    -0x18(%rbp),%esi
mov    -0x14(%rbp),%eax
imul   -0x18(%rbp),%eax
add    %eax,%esi
lea    0xea3(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xed8(%rip),%rdi
lea    0x4(%rsp),%rsi
mov    %rsp,%rdx
call   1040 <scanf@plt>
mov    0x4(%rsp),%eax
mov    (%rsp),%esi
lea    (%rsi,%rax,1),%ecx
imul   %eax,%esi
add    %ecx,%esi
lea    0xeb8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main(i32 %0, i8** %1) {
%3 = alloca i32
%4 = alloca i32
%5 = alloca i8**
%6 = alloca i32
%7 = alloca i32
store i32 0, i32* %3
store i32 %0, i32* %4
store i8** %1, i8*** %5
%8 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %6, i32* %7)
%9 = load i32, i32* %6
%10 = load i32, i32* %7
%11 = add nsw i32 %9, %10
%12 = load i32, i32* %6
%13 = load i32, i32* %7
%14 = mul nsw i32 %12, %13
%15 = add nsw i32 %11, %14
%16 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %15)
ret i32 0
}

LLVM IR (-O2):
@.str = [6 x i8] c"%d %d\00"
@.str.1 = [3 x i8] c"%d\00"
define i32 @main(i32 %0, i8** nocapture readnone %1) {
%3 = alloca i32
%4 = alloca i32
%5 = bitcast i32* %3 to i8*
%6 = bitcast i32* %4 to i8*
%7 = call i32 @scanf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32* %3, i32* %4)
%8 = load i32, i32* %3
%9 = load i32, i32* %4
%10 = add nsw i32 %9, %8
%11 = mul nsw i32 %9, %8
%12 = add nsw i32 %10, %11
%13 = call i32 @printf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str.1, i64 0, i64 0), i32 %12)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
int main(void) {
  printf("%d\n", 0x01 << 2 - 3);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 poison)
ret i32 0
}

LLVM IR (-O2):
@.str = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 poison)
ret i32 0
}
void Initialize_Fast_IDCT(void) {
  { return; }
}


x86 assembly (clang, -O0):
<Initialize_Fast_IDCT>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<Initialize_Fast_IDCT>:
ret

LLVM IR (-O0):
define void @Initialize_Fast_IDCT() {
ret void
}

LLVM IR (-O2):
define void @Initialize_Fast_IDCT() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ F_SETFL;
int /*<<< orphan*/ O_ASYNC;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
scalar_t__ fcntl(int /*<<< orphan*/, int /*<<< orphan*/, int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
void unset_block(int n) {
  if (fcntl(0, F_SETFL, O_ASYNC) < 0) {
    perror("Fcntl F_SETFL");
    exit(EXIT_FAILURE);
  }
}


x86 assembly (clang, -O0):
<unset_block>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    0x2e9e(%rip),%rax
mov    (%rax),%esi
mov    0x2e85(%rip),%rax
mov    (%rax),%edx
xor    %edi,%edi
call   1030 <fcntl@plt>
cmp    $0x0,%rax
jge    1178 <unset_block+0x48>
lea    0xe9b(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e67(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<unset_block>:
push   %rax
mov    0x2ea8(%rip),%rax
mov    (%rax),%esi
mov    0x2e8f(%rip),%rax
mov    (%rax),%edx
xor    %edi,%edi
call   1030 <fcntl@plt>
test   %rax,%rax
js     1151 <unset_block+0x21>
pop    %rax
ret
lea    0xea8(%rip),%rdi
call   1040 <perror@plt>
mov    0x2e74(%rip),%rax
mov    (%rax),%edi
call   1050 <exit@plt>

LLVM IR (-O0):
@F_SETFL = global i32 0
@O_ASYNC = global i32 0
@.str = [14 x i8] c"Fcntl F_SETFL\00"
@EXIT_FAILURE = global i32 0
define void @unset_block(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* @F_SETFL
%4 = load i32, i32* @O_ASYNC
%5 = call i64 @fcntl(i32 0, i32 %3, i32 %4)
%6 = icmp slt i64 %5, 0
br i1 %6, label %7, label %11
7: ; preds = %1
%8 = call i32 @perror(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%9 = load i32, i32* @EXIT_FAILURE
%10 = call i32 @exit(i32 %9)
unreachable
11: ; preds = %1
ret void
}

LLVM IR (-O2):
@F_SETFL = global i32 0
@O_ASYNC = global i32 0
@.str = [14 x i8] c"Fcntl F_SETFL\00"
@EXIT_FAILURE = global i32 0
define void @unset_block(i32 %0) {
%2 = load i32, i32* @F_SETFL
%3 = load i32, i32* @O_ASYNC
%4 = tail call i64 @fcntl(i32 0, i32 %2, i32 %3)
%5 = icmp slt i64 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = tail call i32 @perror(i8* getelementptr inbounds ([14 x i8], [14 x i8]* @.str, i64 0, i64 0))
%8 = load i32, i32* @EXIT_FAILURE
%9 = tail call i32 @exit(i32 %8)
unreachable
10: ; preds = %1
ret void
}
float floating_point_bit_fields_message2_signal1_encode(double value) {
  return (float)(value);
}


x86 assembly (clang, -O0):
<floating_point_bit_fields_message2_signal1_encode>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
cvtsd2ss %xmm0,%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<floating_point_bit_fields_message2_signal1_encode>:
cvtsd2ss %xmm0,%xmm0
ret

LLVM IR (-O0):
define float @floating_point_bit_fields_message2_signal1_encode(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fptrunc double %3 to float
ret float %4
}

LLVM IR (-O2):
define float @floating_point_bit_fields_message2_signal1_encode(double %0) {
%2 = fptrunc double %0 to float
ret float %2
}
/* Variables and functions */
int /*<<< orphan*/ free(char *);
char *mallocNCopyMcfio(char *, int);
int mcfioC_OpenReadDirect(char *);
int mcfio_openreaddirect_(char *filename, int length) {
  char *aString;
  int iret;
  aString = mallocNCopyMcfio(filename, length);
  iret = mcfioC_OpenReadDirect(aString);
  if (aString != NULL)
    free(aString);
  return iret;
}


x86 assembly (clang, -O0):
<mcfio_openreaddirect_>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%esi
call   1040 <mallocNCopyMcfio@plt>
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rdi
call   1050 <mcfioC_OpenReadDirect@plt>
mov    %eax,-0x1c(%rbp)
cmpq   $0x0,-0x18(%rbp)
je     116f <mcfio_openreaddirect_+0x3f>
mov    -0x18(%rbp),%rdi
call   1030 <free@plt>
mov    -0x1c(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mcfio_openreaddirect_>:
push   %rbp
push   %rbx
push   %rax
call   1040 <mallocNCopyMcfio@plt>
mov    %rax,%rbx
mov    %rax,%rdi
call   1050 <mcfioC_OpenReadDirect@plt>
mov    %eax,%ebp
test   %rbx,%rbx
je     1152 <mcfio_openreaddirect_+0x22>
mov    %rbx,%rdi
call   1030 <free@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
define i32 @mcfio_openreaddirect_(i8* %0, i32 %1) {
%3 = alloca i8*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %3
store i32 %1, i32* %4
%7 = load i8*, i8** %3
%8 = load i32, i32* %4
%9 = call i8* @mallocNCopyMcfio(i8* %7, i32 %8)
store i8* %9, i8** %5
%10 = load i8*, i8** %5
%11 = call i32 @mcfioC_OpenReadDirect(i8* %10)
store i32 %11, i32* %6
%12 = load i8*, i8** %5
%13 = icmp ne i8* %12, null
br i1 %13, label %14, label %17
14: ; preds = %2
%15 = load i8*, i8** %5
%16 = call i32 @free(i8* %15)
br label %17
17: ; preds = %14, %2
%18 = load i32, i32* %6
ret i32 %18
}

LLVM IR (-O2):
define i32 @mcfio_openreaddirect_(i8* %0, i32 %1) {
%3 = tail call i8* @mallocNCopyMcfio(i8* %0, i32 %1)
%4 = tail call i32 @mcfioC_OpenReadDirect(i8* %3)
%5 = icmp eq i8* %3, null
br i1 %5, label %8, label %6
6: ; preds = %2
%7 = tail call i32 @free(i8* %3)
br label %8
8: ; preds = %6, %2
ret i32 %4
}
/* Type definitions */
typedef scalar_t__ int32_t;

/* Variables and functions */
int32_t function(int32_t a) { return a + 1; }


x86 assembly (clang, -O0):
<function>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
add    $0x1,%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<function>:
lea    0x1(%rdi),%rax
ret

LLVM IR (-O0):
define i64 @function(i64 %0) {
%2 = alloca i64
store i64 %0, i64* %2
%3 = load i64, i64* %2
%4 = add nsw i64 %3, 1
ret i64 %4
}

LLVM IR (-O2):
define i64 @function(i64 %0) {
%2 = add nsw i64 %0, 1
ret i64 %2
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
void cursorOff(void) { printf("\x01B[?25l"); }


x86 assembly (clang, -O0):
<cursorOff>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<cursorOff>:
lea    0xee9(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [7 x i8] c"\1B[?25l\00"
define void @cursorOff() {
%1 = call i32 @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [7 x i8] c"\1B[?25l\00"
define void @cursorOff() {
%1 = tail call i32 @printf(i8* dereferenceable(1) getelementptr inbounds ([7 x i8], [7 x i8]* @.str, i64 0, i64 0))
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ XTimeCoord;

/* Variables and functions */
int /*<<< orphan*/ abort();
scalar_t__ malloc(int);
void *alloc_XTimeCoord(void) {
  XTimeCoord *_p = (XTimeCoord *)malloc(sizeof(XTimeCoord));
  if (_p == NULL)
    abort();
  return (void *)_p;
}


x86 assembly (clang, -O0):
<alloc_XTimeCoord>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x4,%edi
call   1040 <malloc@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
jne    1148 <alloc_XTimeCoord+0x28>
mov    $0x0,%al
call   1030 <abort@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<alloc_XTimeCoord>:
push   %rax
mov    $0x4,%edi
call   1040 <malloc@plt>
test   %rax,%rax
je     1132 <alloc_XTimeCoord+0x12>
pop    %rcx
ret
xor    %eax,%eax
call   1030 <abort@plt>

LLVM IR (-O0):
define i8* @alloc_XTimeCoord() {
%1 = alloca i32*
%2 = call i64 @malloc(i32 4)
%3 = inttoptr i64 %2 to i32*
store i32* %3, i32** %1
%4 = load i32*, i32** %1
%5 = icmp eq i32* %4, null
br i1 %5, label %6, label %8
6: ; preds = %0
%7 = call i32 (...) @abort()
unreachable
8: ; preds = %0
%9 = load i32*, i32** %1
%10 = bitcast i32* %9 to i8*
ret i8* %10
}

LLVM IR (-O2):
define i8* @alloc_XTimeCoord() {
%1 = tail call i64 @malloc(i32 4)
%2 = icmp eq i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @abort()
unreachable
5: ; preds = %0
%6 = inttoptr i64 %1 to i8*
ret i8* %6
}
void fake_respond(unsigned char *base_addr, char code) {
  base_addr = (unsigned char *)0x13370000;
  *(base_addr + 1) = code;
  *base_addr = 0;
  *(base_addr + 0xFFF) = 1;
}


x86 assembly (clang, -O0):
<fake_respond>:
push   %rbp
mov    %rsp,%rbp
mov    %sil,%al
mov    %rdi,-0x8(%rbp)
mov    %al,-0x9(%rbp)
mov    $0x13370000,%eax
mov    %rax,-0x8(%rbp)
mov    -0x9(%rbp),%cl
mov    -0x8(%rbp),%rax
mov    %cl,0x1(%rax)
mov    -0x8(%rbp),%rax
movb   $0x0,(%rax)
mov    -0x8(%rbp),%rax
movb   $0x1,0xfff(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<fake_respond>:
mov    %sil,0x13370001
13
movb   $0x0,0x13370000
movb   $0x1,0x13370fff
01
ret

LLVM IR (-O0):
define void @fake_respond(i8* %0, i8 signext %1) {
%3 = alloca i8*
%4 = alloca i8
store i8* %0, i8** %3
store i8 %1, i8* %4
store i8* inttoptr (i64 322371584 to i8*), i8** %3
%5 = load i8, i8* %4
%6 = load i8*, i8** %3
%7 = getelementptr inbounds i8, i8* %6, i64 1
store i8 %5, i8* %7
%8 = load i8*, i8** %3
store i8 0, i8* %8
%9 = load i8*, i8** %3
%10 = getelementptr inbounds i8, i8* %9, i64 4095
store i8 1, i8* %10
ret void
}

LLVM IR (-O2):
define void @fake_respond(i8* nocapture readnone %0, i8 signext %1) {
store i8 %1, i8* inttoptr (i64 322371585 to i8*)
store i8 0, i8* inttoptr (i64 322371584 to i8*)
store i8 1, i8* inttoptr (i64 322375679 to i8*)
ret void
}
int isin(int *a, int n, int v) {
  int i;
  for (i = 0; i < n; i++) {
    if (a[i] == v) {
      return i;
    }
  }
  return 0;
}


x86 assembly (clang, -O0):
<isin>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x10(%rbp)
mov    %esi,-0x14(%rbp)
mov    %edx,-0x18(%rbp)
movl   $0x0,-0x1c(%rbp)
mov    -0x1c(%rbp),%eax
cmp    -0x14(%rbp),%eax
jge    1153 <isin+0x53>
mov    -0x10(%rbp),%rax
movslq -0x1c(%rbp),%rcx
mov    (%rax,%rcx,4),%eax
cmp    -0x18(%rbp),%eax
jne    1140 <isin+0x40>
mov    -0x1c(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    115a <isin+0x5a>
jmp    1145 <isin+0x45>
mov    -0x1c(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x1c(%rbp)
jmp    1115 <isin+0x15>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<isin>:
test   %esi,%esi
jle    111e <isin+0x1e>
mov    %esi,%ecx
xor    %eax,%eax
nopl   0x0(%rax,%rax,1)
cmp    %edx,(%rdi,%rax,4)
je     1120 <isin+0x20>
add    $0x1,%rax
cmp    %rax,%rcx
jne    1110 <isin+0x10>
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @isin(i32* %0, i32 %1, i32 %2) {
%4 = alloca i32
%5 = alloca i32*
%6 = alloca i32
%7 = alloca i32
%8 = alloca i32
store i32* %0, i32** %5
store i32 %1, i32* %6
store i32 %2, i32* %7
store i32 0, i32* %8
br label %9
9: ; preds = %24, %3
%10 = load i32, i32* %8
%11 = load i32, i32* %6
%12 = icmp slt i32 %10, %11
br i1 %12, label %13, label %27
13: ; preds = %9
%14 = load i32*, i32** %5
%15 = load i32, i32* %8
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i32, i32* %14, i64 %16
%18 = load i32, i32* %17
%19 = load i32, i32* %7
%20 = icmp eq i32 %18, %19
br i1 %20, label %21, label %23
21: ; preds = %13
%22 = load i32, i32* %8
store i32 %22, i32* %4
br label %28
23: ; preds = %13
br label %24
24: ; preds = %23
%25 = load i32, i32* %8
%26 = add nsw i32 %25, 1
store i32 %26, i32* %8
br label %9
27: ; preds = %9
store i32 0, i32* %4
br label %28
28: ; preds = %27, %21
%29 = load i32, i32* %4
ret i32 %29
}

LLVM IR (-O2):
define i32 @isin(i32* nocapture %0, i32 %1, i32 %2) {
%4 = icmp sgt i32 %1, 0
br i1 %4, label %5, label %17
5: ; preds = %3
%6 = zext i32 %1 to i64
br label %7
7: ; preds = %5, %12
%8 = phi i64 [ 0, %5 ], [ %13, %12 ]
%9 = getelementptr inbounds i32, i32* %0, i64 %8
%10 = load i32, i32* %9
%11 = icmp eq i32 %10, %2
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = add nuw nsw i64 %8, 1
%14 = icmp eq i64 %13, %6
br i1 %14, label %17, label %7
15: ; preds = %7
%16 = trunc i64 %8 to i32
br label %17
17: ; preds = %12, %15, %3
%18 = phi i32 [ 0, %3 ], [ %16, %15 ], [ 0, %12 ]
ret i32 %18
}
/* Variables and functions */
int /*<<< orphan*/ print_backtrace();
void a(void) { print_backtrace(); }


x86 assembly (clang, -O0):
<a>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <print_backtrace@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<a>:
xor    %eax,%eax
jmp    1030 <print_backtrace@plt>

LLVM IR (-O0):
define void @a() {
%1 = call i32 (...) @print_backtrace()
ret void
}

LLVM IR (-O2):
define void @a() {
%1 = tail call i32 (...) @print_backtrace()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strcmp(char const *, char const *);
int cmp_string(const void *s1, const void *s2) {
  return !strcmp((const char *)s1, (const char *)s2);
}


x86 assembly (clang, -O0):
<cmp_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <strcmp@plt>
cmp    $0x0,%eax
setne  %al
xor    $0xff,%al
and    $0x1,%al
movzbl %al,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cmp_string>:
push   %rax
call   1030 <strcmp@plt>
xor    %ecx,%ecx
test   %eax,%eax
sete   %cl
mov    %ecx,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cmp_string(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = call i32 @strcmp(i8* %5, i8* %6)
%8 = icmp ne i32 %7, 0
%9 = xor i1 %8, true
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @cmp_string(i8* nocapture %0, i8* nocapture %1) {
%3 = tail call i32 @strcmp(i8* dereferenceable(1) %0, i8* dereferenceable(1) %1)
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
ret i32 %5
}
/* Variables and functions */
int /*<<< orphan*/ sha256_hexdigest(char *, char *, int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char *);
void string_sha256_hexdigest(char *to, char *message) {
  sha256_hexdigest(to, message, strlen(message));
}


x86 assembly (clang, -O0):
<string_sha256_hexdigest>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <sha256_hexdigest@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<string_sha256_hexdigest>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <sha256_hexdigest@plt>

LLVM IR (-O0):
define void @string_sha256_hexdigest(i8* %0, i8* %1) {
%3 = alloca i8*
%4 = alloca i8*
store i8* %0, i8** %3
store i8* %1, i8** %4
%5 = load i8*, i8** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @sha256_hexdigest(i8* %5, i8* %6, i32 %8)
ret void
}

LLVM IR (-O2):
define void @string_sha256_hexdigest(i8* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @sha256_hexdigest(i8* %0, i8* %1, i32 %3)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
int main() {
  assert(1 > 2);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
call   1030 <assert@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @assert(i32 0)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @assert(i32 0)
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ pause();
int /*<<< orphan*/ printf(char *);
void *thr_fn(void *arg) {
  printf("thread started ...\n");
  pause();
  return (0);
}


x86 assembly (clang, -O0):
<thr_fn>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
lea    0xecd(%rip),%rdi
call   1030 <printf@plt>
mov    $0x0,%al
call   1040 <pause@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<thr_fn>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
call   1040 <pause@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [20 x i8] c"thread started ...\0A\00"
define i8* @thr_fn(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = call i32 @printf(i8* getelementptr inbounds ([20 x i8], [20 x i8]* @.str, i64 0, i64 0))
%4 = call i32 (...) @pause()
ret i8* null
}

LLVM IR (-O2):
@str = [19 x i8] c"thread started ...\00"
define noalias i8* @thr_fn(i8* nocapture readnone %0) {
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([19 x i8], [19 x i8]* @str, i64 0, i64 0))
%3 = tail call i32 (...) @pause()
ret i8* null
}
double dmin(double x, double y) {
  if (x < y)
    return x;
  return y;
}


x86 assembly (clang, -O0):
<dmin>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm1
movsd  -0x18(%rbp),%xmm0
ucomisd %xmm1,%xmm0
jbe    1131 <dmin+0x31>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    113b <dmin+0x3b>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<dmin>:
minsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @dmin(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = load double, double* %5
%8 = fcmp olt double %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load double, double* %4
store double %10, double* %3
br label %13
11: ; preds = %2
%12 = load double, double* %5
store double %12, double* %3
br label %13
13: ; preds = %11, %9
%14 = load double, double* %3
ret double %14
}

LLVM IR (-O2):
define double @dmin(double %0, double %1) {
%3 = fcmp olt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
/* Variables and functions */
int /*<<< orphan*/ MicoSleepHelper(unsigned int, int);
void MicoSleepMicroSecs(unsigned int timeInMicroSecs) {
  MicoSleepHelper(timeInMicroSecs, ((25000000) / 11000000));
  return;
}


x86 assembly (clang, -O0):
<MicoSleepMicroSecs>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x2,%esi
call   1030 <MicoSleepHelper@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<MicoSleepMicroSecs>:
mov    $0x2,%esi
jmp    1030 <MicoSleepHelper@plt>

LLVM IR (-O0):
define void @MicoSleepMicroSecs(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @MicoSleepHelper(i32 %3, i32 2)
ret void
}

LLVM IR (-O2):
define void @MicoSleepMicroSecs(i32 %0) {
%2 = tail call i32 @MicoSleepHelper(i32 %0, i32 2)
ret void
}
void print_backtrace() { printf("Segmentation fault %s\n", __FUNCTION__); }


x86 assembly (clang, -O0):
<print_backtrace>:
push   %rbp
mov    %rsp,%rbp
lea    0xee5(%rip),%rdi
lea    0xef5(%rip),%rsi
mov    $0x0,%al
call   1030 <printf@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<print_backtrace>:
lea    0xee9(%rip),%rdi
lea    0xef9(%rip),%rsi
xor    %eax,%eax
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [23 x i8] c"Segmentation fault %s\0A\00"
@__FUNCTION__.print_backtrace = [16 x i8] c"print_backtrace\00"
define void @print_backtrace() {
%1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__FUNCTION__.print_backtrace, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [23 x i8] c"Segmentation fault %s\0A\00"
@__FUNCTION__.print_backtrace = [16 x i8] c"print_backtrace\00"
define void @print_backtrace() {
%1 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([23 x i8], [23 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([16 x i8], [16 x i8]* @__FUNCTION__.print_backtrace, i64 0, i64 0))
ret void
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, char *);
char *getStr(char *str) { printf("%s\n", str); }


x86 assembly (clang, -O0):
<getStr>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rsi
lea    0xed9(%rip),%rdi
call   1030 <printf@plt>
mov    -0x8(%rbp),%rax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<getStr>:
mov    %rdi,%rsi
lea    0xee6(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%s\0A\00"
define i8* @getStr(i8* %0) {
%2 = alloca i8*
%3 = alloca i8*
store i8* %0, i8** %3
%4 = load i8*, i8** %3
%5 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %4)
%6 = load i8*, i8** %2
ret i8* %6
}

LLVM IR (-O2):
@.str = [4 x i8] c"%s\0A\00"
define noalias i8* @getStr(i8* %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i8* %0)
ret i8* undef
}
void renderer_flush_queues(void) {}


x86 assembly (clang, -O0):
<renderer_flush_queues>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<renderer_flush_queues>:
ret

LLVM IR (-O0):
define void @renderer_flush_queues() {
ret void
}

LLVM IR (-O2):
define void @renderer_flush_queues() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ GPIO_write_SS(int /*<<< orphan*/);
int /*<<< orphan*/ s_SPI_delay(int);
void SPI_start_transaction(void) {
  (GPIO_write_SS(0));
  s_SPI_delay(1);
}


x86 assembly (clang, -O0):
<SPI_start_transaction>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
call   1030 <GPIO_write_SS@plt>
mov    $0x1,%edi
call   1040 <s_SPI_delay@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<SPI_start_transaction>:
push   %rax
xor    %edi,%edi
call   1030 <GPIO_write_SS@plt>
mov    $0x1,%edi
pop    %rax
jmp    1040 <s_SPI_delay@plt>

LLVM IR (-O0):
define void @SPI_start_transaction() {
%1 = call i32 @GPIO_write_SS(i32 0)
%2 = call i32 @s_SPI_delay(i32 1)
ret void
}

LLVM IR (-O2):
define void @SPI_start_transaction() {
%1 = tail call i32 @GPIO_write_SS(i32 0)
%2 = tail call i32 @s_SPI_delay(i32 1)
ret void
}
/* Type definitions */
typedef int uint64_t;

/* Variables and functions */
__attribute__((always_, unused)) uint64_t psnip_builtin_bswap64(uint64_t v) {
  return ((v & (((uint64_t)0xff) << 56)) >> 56) |
         ((v & (((uint64_t)0xff) << 48)) >> 40) |
         ((v & (((uint64_t)0xff) << 40)) >> 24) |
         ((v & (((uint64_t)0xff) << 32)) >> 8) |
         ((v & (((uint64_t)0xff) << 24)) << 8) |
         ((v & (((uint64_t)0xff) << 16)) << 24) |
         ((v & (((uint64_t)0xff) << 8)) << 40) |
         ((v & (((uint64_t)0xff))) << 56);
}


x86 assembly (clang, -O0):
<psnip_builtin_bswap64>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
and    -0x4(%rbp),%eax
mov    $0x38,%ecx
sar    %cl,%eax
and    -0x4(%rbp),%edx
mov    $0x28,%ecx
sar    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
and    -0x4(%rbp),%ecx
sar    $0x18,%ecx
or     %ecx,%eax
and    -0x4(%rbp),%ecx
sar    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff000000,%ecx
shl    $0x8,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%ecx
and    $0xff0000,%ecx
shl    $0x18,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
and    $0xff00,%edx
mov    $0x28,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
mov    -0x4(%rbp),%edx
and    $0xff,%edx
mov    $0x38,%ecx
shl    %cl,%edx
mov    %edx,%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<psnip_builtin_bswap64>:
ret

LLVM IR (-O0):
define i32 @psnip_builtin_bswap64(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = and i32 %3, poison
%5 = ashr i32 %4, 56
%6 = load i32, i32* %2
%7 = and i32 %6, poison
%8 = ashr i32 %7, 40
%9 = or i32 %5, %8
%10 = load i32, i32* %2
%11 = and i32 %10, poison
%12 = ashr i32 %11, 24
%13 = or i32 %9, %12
%14 = load i32, i32* %2
%15 = and i32 %14, poison
%16 = ashr i32 %15, 8
%17 = or i32 %13, %16
%18 = load i32, i32* %2
%19 = and i32 %18, -16777216
%20 = shl i32 %19, 8
%21 = or i32 %17, %20
%22 = load i32, i32* %2
%23 = and i32 %22, 16711680
%24 = shl i32 %23, 24
%25 = or i32 %21, %24
%26 = load i32, i32* %2
%27 = and i32 %26, 65280
%28 = shl i32 %27, 40
%29 = or i32 %25, %28
%30 = load i32, i32* %2
%31 = and i32 %30, 255
%32 = shl i32 %31, 56
%33 = or i32 %29, %32
ret i32 %33
}

LLVM IR (-O2):
define i32 @psnip_builtin_bswap64(i32 %0) {
ret i32 poison
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int fread(int /*<<< orphan*/ *, int, int, int /*<<< orphan*/ *);
uint32_t imm32(FILE *file) {
  uint32_t dword;
  if (fread(&dword, sizeof(uint32_t), 1, file) == 1)
    return dword;
  return 0;
}


x86 assembly (clang, -O0):
<imm32>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rcx
lea    -0x14(%rbp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
cmp    $0x1,%eax
jne    1147 <imm32+0x37>
mov    -0x14(%rbp),%eax
mov    %eax,-0x4(%rbp)
jmp    114e <imm32+0x3e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<imm32>:
push   %rax
mov    %rdi,%rcx
lea    0x4(%rsp),%rdi
mov    $0x4,%esi
mov    $0x1,%edx
call   1030 <fread@plt>
mov    %eax,%ecx
xor    %eax,%eax
cmp    $0x1,%ecx
jne    1135 <imm32+0x25>
mov    0x4(%rsp),%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @imm32(i32* %0) {
%2 = alloca i32
%3 = alloca i32*
%4 = alloca i32
store i32* %0, i32** %3
%5 = load i32*, i32** %3
%6 = call i32 @fread(i32* %4, i32 4, i32 1, i32* %5)
%7 = icmp eq i32 %6, 1
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, i32* %4
store i32 %9, i32* %2
br label %11
10: ; preds = %1
store i32 0, i32* %2
br label %11
11: ; preds = %10, %8
%12 = load i32, i32* %2
ret i32 %12
}

LLVM IR (-O2):
define i32 @imm32(i32* nocapture %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @fread(i32* %2, i32 4, i32 1, i32* %0)
%5 = icmp eq i32 %4, 1
%6 = load i32, i32* %2
%7 = select i1 %5, i32 %6, i32 0
ret i32 %7
}
void XLoadQueryFont() {}


x86 assembly (clang, -O0):
<XLoadQueryFont>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XLoadQueryFont>:
ret

LLVM IR (-O0):
define void @XLoadQueryFont() {
ret void
}

LLVM IR (-O2):
define void @XLoadQueryFont() {
ret void
}
int f_i8(int i0, int i1, int i2, int i3, int i4, int i5, int i6, int i7) {
  return i7;
}


x86 assembly (clang, -O0):
<f_i8>:
push   %rbp
mov    %rsp,%rbp
mov    0x18(%rbp),%eax
mov    0x10(%rbp),%eax
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8d,-0x14(%rbp)
mov    %r9d,-0x18(%rbp)
mov    0x18(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f_i8>:
mov    0x10(%rsp),%eax
ret

LLVM IR (-O0):
define i32 @f_i8(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7) {
%9 = alloca i32
%10 = alloca i32
%11 = alloca i32
%12 = alloca i32
%13 = alloca i32
%14 = alloca i32
%15 = alloca i32
%16 = alloca i32
store i32 %0, i32* %9
store i32 %1, i32* %10
store i32 %2, i32* %11
store i32 %3, i32* %12
store i32 %4, i32* %13
store i32 %5, i32* %14
store i32 %6, i32* %15
store i32 %7, i32* %16
%17 = load i32, i32* %16
ret i32 %17
}

LLVM IR (-O2):
define i32 @f_i8(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 returned %7) {
ret i32 %7
}
void *xmemset(void *p, int c, int sz) {
  register char *pf = (char *)p;
  while (sz--)
    *pf++ = (char)c;
  return p;
}


x86 assembly (clang, -O0):
<xmemset>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %edx,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%eax
mov    %eax,%ecx
add    $0xffffffff,%ecx
mov    %ecx,-0x10(%rbp)
cmp    $0x0,%eax
je     1145 <xmemset+0x45>
mov    -0xc(%rbp),%eax
mov    %al,%cl
mov    -0x18(%rbp),%rax
mov    %rax,%rdx
add    $0x1,%rdx
mov    %rdx,-0x18(%rbp)
mov    %cl,(%rax)
jmp    1116 <xmemset+0x16>
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<xmemset>:
push   %rbx
mov    %rdi,%rbx
test   %edx,%edx
je     1122 <xmemset+0x12>
mov    %edx,%edx
mov    %rbx,%rdi
call   1030 <memset@plt>
mov    %rbx,%rax
pop    %rbx
ret

LLVM IR (-O0):
define i8* @xmemset(i8* %0, i32 %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i32
%6 = alloca i32
%7 = alloca i8*
store i8* %0, i8** %4
store i32 %1, i32* %5
store i32 %2, i32* %6
%8 = load i8*, i8** %4
store i8* %8, i8** %7
br label %9
9: ; preds = %13, %3
%10 = load i32, i32* %6
%11 = add nsw i32 %10, -1
store i32 %11, i32* %6
%12 = icmp ne i32 %10, 0
br i1 %12, label %13, label %18
13: ; preds = %9
%14 = load i32, i32* %5
%15 = trunc i32 %14 to i8
%16 = load i8*, i8** %7
%17 = getelementptr inbounds i8, i8* %16, i32 1
store i8* %17, i8** %7
store i8 %15, i8* %16
br label %9
18: ; preds = %9
%19 = load i8*, i8** %4
ret i8* %19
}

LLVM IR (-O2):
define i8* @xmemset(i8* returned writeonly %0, i32 %1, i32 %2) {
%4 = icmp eq i32 %2, 0
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = trunc i32 %1 to i8
%7 = zext i32 %2 to i64
br label %8
8: ; preds = %5, %3
ret i8* %0
}
unsigned int count_resetbit(int num) {
  int count = 0;
  while (num) {
    if (((num)&1) == 0)
      count++;
    num = num >> 1;
  }
  return count;
}


x86 assembly (clang, -O0):
<count_resetbit>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
cmpl   $0x0,-0x4(%rbp)
je     113e <count_resetbit+0x3e>
mov    -0x4(%rbp),%eax
and    $0x1,%eax
cmp    $0x0,%eax
jne    1130 <count_resetbit+0x30>
mov    -0x8(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
sar    $0x1,%eax
mov    %eax,-0x4(%rbp)
jmp    110e <count_resetbit+0xe>
mov    -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<count_resetbit>:
xor    %eax,%eax
test   %edi,%edi
je     1122 <count_resetbit+0x22>
mov    %edi,%ecx
nopl   0x0(%rax,%rax,1)
mov    %edi,%edx
not    %edx
and    $0x1,%edx
add    %edx,%eax
sar    %ecx
cmp    $0x1,%edi
mov    %ecx,%edi
ja     1110 <count_resetbit+0x10>
ret

LLVM IR (-O0):
define i32 @count_resetbit(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
br label %4
4: ; preds = %14, %1
%5 = load i32, i32* %2
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %4
%8 = load i32, i32* %2
%9 = and i32 %8, 1
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, i32* %3
%13 = add nsw i32 %12, 1
store i32 %13, i32* %3
br label %14
14: ; preds = %11, %7
%15 = load i32, i32* %2
%16 = ashr i32 %15, 1
store i32 %16, i32* %2
br label %4
17: ; preds = %4
%18 = load i32, i32* %3
ret i32 %18
}

LLVM IR (-O2):
define i32 @count_resetbit(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1, %3
%4 = phi i32 [ %8, %3 ], [ 0, %1 ]
%5 = phi i32 [ %9, %3 ], [ %0, %1 ]
%6 = and i32 %5, 1
%7 = xor i32 %6, 1
%8 = add nuw nsw i32 %7, %4
%9 = ashr i32 %5, 1
%10 = icmp ult i32 %5, 2
br i1 %10, label %11, label %3
11: ; preds = %3, %1
%12 = phi i32 [ 0, %1 ], [ %8, %3 ]
ret i32 %12
}