xunge/DecIR huggingface dataset:
/* Variables and functions */
int tanh(double);
double param1(double z) { return 2 * tanh(z); }


x86 assembly (clang, -O0):
<param1>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
call   1030 <tanh@plt>
shl    $0x1,%eax
cvtsi2sd %eax,%xmm0
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<param1>:
push   %rax
call   1030 <tanh@plt>
add    %eax,%eax
xorps  %xmm0,%xmm0
cvtsi2sd %eax,%xmm0
pop    %rax
ret

LLVM IR (-O0):
define double @param1(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = call i32 @tanh(double %3)
%5 = mul nsw i32 2, %4
%6 = sitofp i32 %5 to double
ret double %6
}

LLVM IR (-O2):
define double @param1(double %0) {
%2 = tail call i32 @tanh(double %0)
%3 = shl nsw i32 %2, 1
%4 = sitofp i32 %3 to double
ret double %4
}
int foo(int fooparam) { return fooparam; }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
mov    %edi,%eax
ret

LLVM IR (-O0):
define i32 @foo(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
ret i32 %3
}

LLVM IR (-O2):
define i32 @foo(i32 returned %0) {
ret i32 %0
}
/* Type definitions */
struct group_list_t {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ run_postreceive_multi(struct group_list_t *, char **, int);
void run_postreceive(struct group_list_t *group, char *file) {
  char *files[] = {file};
  run_postreceive_multi(group, files, 1);
}


x86 assembly (clang, -O0):
<run_postreceive>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
lea    -0x18(%rbp),%rsi
mov    $0x1,%edx
call   1030 <run_postreceive_multi@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<run_postreceive>:
push   %rax
mov    %rsi,(%rsp)
mov    %rsp,%rsi
mov    $0x1,%edx
call   1030 <run_postreceive_multi@plt>
pop    %rax
ret

LLVM IR (-O0):
%struct.group_list_t = type { i32 }
define void @run_postreceive(%struct.group_list_t* %0, i8* %1) {
%3 = alloca %struct.group_list_t*
%4 = alloca i8*
%5 = alloca [1 x i8*]
store %struct.group_list_t* %0, %struct.group_list_t** %3
store i8* %1, i8** %4
%6 = getelementptr inbounds [1 x i8*], [1 x i8*]* %5, i64 0, i64 0
%7 = load i8*, i8** %4
store i8* %7, i8** %6
%8 = load %struct.group_list_t*, %struct.group_list_t** %3
%9 = getelementptr inbounds [1 x i8*], [1 x i8*]* %5, i64 0, i64 0
%10 = call i32 @run_postreceive_multi(%struct.group_list_t* %8, i8** %9, i32 1)
ret void
}

LLVM IR (-O2):
%struct.group_list_t = type { i32 }
define void @run_postreceive(%struct.group_list_t* %0, i8* %1) {
%3 = alloca [1 x i8*]
%4 = bitcast [1 x i8*]* %3 to i8*
%5 = getelementptr inbounds [1 x i8*], [1 x i8*]* %3, i64 0, i64 0
store i8* %1, i8** %5
%6 = call i32 @run_postreceive_multi(%struct.group_list_t* %0, i8** %5, i32 1)
ret void
}
void XtAppSetSelectionTimeout() {}


x86 assembly (clang, -O0):
<XtAppSetSelectionTimeout>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<XtAppSetSelectionTimeout>:
ret

LLVM IR (-O0):
define void @XtAppSetSelectionTimeout() {
ret void
}

LLVM IR (-O2):
define void @XtAppSetSelectionTimeout() {
ret void
}
/* Type definitions */
struct wpa_ctrl {
  int dummy;
};

/* Variables and functions */
int _wpa_ctrl_command(struct wpa_ctrl *, char *, int);
int wpa_ctrl_command(struct wpa_ctrl *ctrl, char *cmd) {
  return _wpa_ctrl_command(ctrl, cmd, 1);
}


x86 assembly (clang, -O0):
<wpa_ctrl_command>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
mov    $0x1,%edx
call   1030 <_wpa_ctrl_command@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<wpa_ctrl_command>:
mov    $0x1,%edx
jmp    1030 <_wpa_ctrl_command@plt>

LLVM IR (-O0):
%struct.wpa_ctrl = type { i32 }
define i32 @wpa_ctrl_command(%struct.wpa_ctrl* %0, i8* %1) {
%3 = alloca %struct.wpa_ctrl*
%4 = alloca i8*
store %struct.wpa_ctrl* %0, %struct.wpa_ctrl** %3
store i8* %1, i8** %4
%5 = load %struct.wpa_ctrl*, %struct.wpa_ctrl** %3
%6 = load i8*, i8** %4
%7 = call i32 @_wpa_ctrl_command(%struct.wpa_ctrl* %5, i8* %6, i32 1)
ret i32 %7
}

LLVM IR (-O2):
%struct.wpa_ctrl = type { i32 }
define i32 @wpa_ctrl_command(%struct.wpa_ctrl* %0, i8* %1) {
%3 = tail call i32 @_wpa_ctrl_command(%struct.wpa_ctrl* %0, i8* %1, i32 1)
ret i32 %3
}
int ctz3(unsigned x) {
  static int table[32] = {0,  1,  2,  24, 3,  19, 6,  25, 22, 4,  20,
                          10, 16, 7,  12, 26, 31, 23, 18, 5,  21, 9,
                          15, 11, 30, 17, 8,  14, 29, 13, 28, 27};
  if (x == 0)
    return 32;
  x = (x & -x) * 0x04D7651F;
  return table[x >> 27];
}


x86 assembly (clang, -O0):
<ctz3>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
jne    111d <ctz3+0x1d>
movl   $0x20,-0x4(%rbp)
jmp    1147 <ctz3+0x47>
mov    -0x8(%rbp),%eax
xor    %ecx,%ecx
sub    -0x8(%rbp),%ecx
and    %ecx,%eax
imul   $0x4d7651f,%eax,%eax
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
shr    $0x1b,%eax
mov    %eax,%eax
mov    %eax,%ecx
lea    0x2eef(%rip),%rax
mov    (%rax,%rcx,4),%eax
mov    %eax,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<ctz3>:
test   %edi,%edi
je     111e <ctz3+0x1e>
mov    %edi,%eax
neg    %eax
and    %edi,%eax
imul   $0x4d7651f,%eax,%eax
shr    $0x1b,%eax
lea    0xee6(%rip),%rcx
mov    (%rcx,%rax,4),%eax
ret
mov    $0x20,%eax
ret

LLVM IR (-O0):
@ctz3.table = internal global [32 x i32] [i32 0, i32 1, i32 2, i32 24, i32 3, i32 19, i32 6, i32 25, i32 22, i32 4, i32 20, i32 10, i32 16, i32 7, i32 12, i32 26, i32 31, i32 23, i32 18, i32 5, i32 21, i32 9, i32 15, i32 11, i32 30, i32 17, i32 8, i32 14, i32 29, i32 13, i32 28, i32 27]
define i32 @ctz3(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %3
%4 = load i32, i32* %3
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %7
6: ; preds = %1
store i32 32, i32* %2
br label %18
7: ; preds = %1
%8 = load i32, i32* %3
%9 = load i32, i32* %3
%10 = sub i32 0, %9
%11 = and i32 %8, %10
%12 = mul i32 %11, 81224991
store i32 %12, i32* %3
%13 = load i32, i32* %3
%14 = lshr i32 %13, 27
%15 = zext i32 %14 to i64
%16 = getelementptr inbounds [32 x i32], [32 x i32]* @ctz3.table, i64 0, i64 %15
%17 = load i32, i32* %16
store i32 %17, i32* %2
br label %18
18: ; preds = %7, %6
%19 = load i32, i32* %2
ret i32 %19
}

LLVM IR (-O2):
@ctz3.table = internal unnamed_addr constant [32 x i32] [i32 0, i32 1, i32 2, i32 24, i32 3, i32 19, i32 6, i32 25, i32 22, i32 4, i32 20, i32 10, i32 16, i32 7, i32 12, i32 26, i32 31, i32 23, i32 18, i32 5, i32 21, i32 9, i32 15, i32 11, i32 30, i32 17, i32 8, i32 14, i32 29, i32 13, i32 28, i32 27]
define i32 @ctz3(i32 %0) {
%2 = icmp eq i32 %0, 0
br i1 %2, label %11, label %3
3: ; preds = %1
%4 = sub i32 0, %0
%5 = and i32 %4, %0
%6 = mul i32 %5, 81224991
%7 = lshr i32 %6, 27
%8 = zext i32 %7 to i64
%9 = getelementptr inbounds [32 x i32], [32 x i32]* @ctz3.table, i64 0, i64 %8
%10 = load i32, i32* %9
br label %11
11: ; preds = %1, %3
%12 = phi i32 [ %10, %3 ], [ 32, %1 ]
ret i32 %12
}
long core___core__Int___Numeric__unary_32d_45d(long self) {
  long var;
  long var1;
  var1 = -self;
  var = var1;
  goto RET_LABEL;
RET_LABEL:;
  return var;
}


x86 assembly (clang, -O0):
<core___core__Int___Numeric__unary_32d_45d>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
sub    -0x8(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x18(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<core___core__Int___Numeric__unary_32d_45d>:
mov    %rdi,%rax
neg    %rax
ret

LLVM IR (-O0):
define i64 @core___core__Int___Numeric__unary_32d_45d(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca i64
store i64 %0, i64* %2
%5 = load i64, i64* %2
%6 = sub nsw i64 0, %5
store i64 %6, i64* %4
%7 = load i64, i64* %4
store i64 %7, i64* %3
br label %8
8: ; preds = %1
%9 = load i64, i64* %3
ret i64 %9
}

LLVM IR (-O2):
define i64 @core___core__Int___Numeric__unary_32d_45d(i64 %0) {
%2 = sub nsw i64 0, %0
ret i64 %2
}
int stint(val, p)
register short val;
register char *p;
{
  p += 2;
  *--p = val & 255;
  *--p = (val >> 8) & 255;
  return (0);
}


x86 assembly (clang, -O0):
<stint>:
push   %rbp
mov    %rsp,%rbp
mov    %di,%ax
mov    %ax,-0x2(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x10(%rbp),%rax
add    $0x2,%rax
mov    %rax,-0x10(%rbp)
movswl -0x2(%rbp),%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0xffffffffffffffff,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,-0x1(%rax)
movswl -0x2(%rbp),%eax
sar    $0x8,%eax
and    $0xff,%eax
mov    %al,%cl
mov    -0x10(%rbp),%rax
mov    %rax,%rdx
add    $0xffffffffffffffff,%rdx
mov    %rdx,-0x10(%rbp)
mov    %cl,-0x1(%rax)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<stint>:
rol    $0x8,%di
mov    %di,(%rsi)
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @stint(i32 %0, i8* %1) {
%3 = alloca i16
%4 = alloca i8*
%5 = trunc i32 %0 to i16
store i16 %5, i16* %3
store i8* %1, i8** %4
%6 = load i8*, i8** %4
%7 = getelementptr inbounds i8, i8* %6, i64 2
store i8* %7, i8** %4
%8 = load i16, i16* %3
%9 = sext i16 %8 to i32
%10 = and i32 %9, 255
%11 = trunc i32 %10 to i8
%12 = load i8*, i8** %4
%13 = getelementptr inbounds i8, i8* %12, i32 -1
store i8* %13, i8** %4
store i8 %11, i8* %13
%14 = load i16, i16* %3
%15 = sext i16 %14 to i32
%16 = ashr i32 %15, 8
%17 = and i32 %16, 255
%18 = trunc i32 %17 to i8
%19 = load i8*, i8** %4
%20 = getelementptr inbounds i8, i8* %19, i32 -1
store i8* %20, i8** %4
store i8 %18, i8* %20
ret i32 0
}

LLVM IR (-O2):
define i32 @stint(i32 %0, i8* nocapture writeonly %1) {
%3 = trunc i32 %0 to i8
%4 = getelementptr inbounds i8, i8* %1, i64 1
store i8 %3, i8* %4
%5 = lshr i32 %0, 8
%6 = trunc i32 %5 to i8
store i8 %6, i8* %1
ret i32 0
}
float fEpsilon(void) { return (0.000001f); }


x86 assembly (clang, -O0):
<fEpsilon>:
push   %rbp
mov    %rsp,%rbp
movss  0xef4(%rip),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fEpsilon>:
movss  0xef8(%rip),%xmm0
ret

LLVM IR (-O0):
define float @fEpsilon() {
ret float 0x3EB0C6F7A0000000
}

LLVM IR (-O2):
define float @fEpsilon() {
ret float 0x3EB0C6F7A0000000
}
/* Variables and functions */
int /*<<< orphan*/ memset(void *, int /*<<< orphan*/, size_t);
void __aeabi_memclr4(void *dest, size_t n) { memset(dest, 0, n); }


x86 assembly (clang, -O0):
<__aeabi_memclr4>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rdx
xor    %esi,%esi
call   1030 <memset@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__aeabi_memclr4>:
mov    %rsi,%rdx
xor    %esi,%esi
jmp    1030 <memset@plt>

LLVM IR (-O0):
define void @__aeabi_memclr4(i8* %0, i64 %1) {
%3 = alloca i8*
%4 = alloca i64
store i8* %0, i8** %3
store i64 %1, i64* %4
%5 = load i8*, i8** %3
%6 = load i64, i64* %4
%7 = call i32 @memset(i8* %5, i32 0, i64 %6)
ret void
}

LLVM IR (-O2):
define void @__aeabi_memclr4(i8* %0, i64 %1) {
%3 = tail call i32 @memset(i8* %0, i32 0, i64 %1)
ret void
}
int fun1098() { return 1098; }


x86 assembly (clang, -O0):
<fun1098>:
push   %rbp
mov    %rsp,%rbp
mov    $0x44a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun1098>:
mov    $0x44a,%eax
ret

LLVM IR (-O0):
define i32 @fun1098() {
ret i32 1098
}

LLVM IR (-O2):
define i32 @fun1098() {
ret i32 1098
}
int XFontsOfFontSet() {}


x86 assembly (clang, -O0):
<XFontsOfFontSet>:
push   %rbp
mov    %rsp,%rbp
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<XFontsOfFontSet>:
ret

LLVM IR (-O0):
define i32 @XFontsOfFontSet() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @XFontsOfFontSet() {
ret i32 undef
}
/* Type definitions */
typedef int /*<<< orphan*/ u_char;
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ die_file_eof(int /*<<< orphan*/ *);
int fread(int /*<<< orphan*/ *, int, int, int /*<<< orphan*/ *);
u_char read_u8(FILE *fp) {
  u_char b;
  if (fread(&b, 1, 1, fp) != 1)
    die_file_eof(fp);
  return b;
}


x86 assembly (clang, -O0):
<read_u8>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rcx
lea    -0xc(%rbp),%rdi
mov    $0x1,%edx
mov    %edx,%esi
call   1030 <fread@plt>
cmp    $0x1,%eax
je     1152 <read_u8+0x32>
mov    -0x8(%rbp),%rdi
call   1040 <die_file_eof@plt>
mov    -0xc(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<read_u8>:
push   %rbx
sub    $0x10,%rsp
mov    %rdi,%rbx
lea    0xc(%rsp),%rdi
mov    $0x1,%esi
mov    $0x1,%edx
mov    %rbx,%rcx
call   1030 <fread@plt>
cmp    $0x1,%eax
je     114c <read_u8+0x2c>
mov    %rbx,%rdi
call   1040 <die_file_eof@plt>
mov    0xc(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
define i32 @read_u8(i32* %0) {
%2 = alloca i32*
%3 = alloca i32
store i32* %0, i32** %2
%4 = load i32*, i32** %2
%5 = call i32 @fread(i32* %3, i32 1, i32 1, i32* %4)
%6 = icmp ne i32 %5, 1
br i1 %6, label %7, label %10
7: ; preds = %1
%8 = load i32*, i32** %2
%9 = call i32 @die_file_eof(i32* %8)
br label %10
10: ; preds = %7, %1
%11 = load i32, i32* %3
ret i32 %11
}

LLVM IR (-O2):
define i32 @read_u8(i32* %0) {
%2 = alloca i32
%3 = bitcast i32* %2 to i8*
%4 = call i32 @fread(i32* %2, i32 1, i32 1, i32* %0)
%5 = icmp eq i32 %4, 1
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call i32 @die_file_eof(i32* %0)
br label %8
8: ; preds = %6, %1
%9 = load i32, i32* %2
ret i32 %9
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *);
int main() {
  printf("Esto es una prueba niggi\n");
  printf("Segundo mensaje añadido\n");
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeda(%rip),%rdi
call   1030 <printf@plt>
lea    0xee8(%rip),%rdi
call   1030 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xee8(%rip),%rdi
call   1030 <puts@plt>
lea    0xef5(%rip),%rdi
call   1030 <puts@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [26 x i8] c"Esto es una prueba niggi\0A\00"
@.str.1 = [26 x i8] c"Segundo mensaje a\C3\B1adido\0A\00"
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
%2 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str, i64 0, i64 0))
%3 = call i32 @printf(i8* getelementptr inbounds ([26 x i8], [26 x i8]* @.str.1, i64 0, i64 0))
ret i32 0
}

LLVM IR (-O2):
@str = [25 x i8] c"Esto es una prueba niggi\00"
@str.2 = [25 x i8] c"Segundo mensaje a\C3\B1adido\00"
define i32 @main() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str, i64 0, i64 0))
%2 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([25 x i8], [25 x i8]* @str.2, i64 0, i64 0))
ret i32 0
}
/* Variables and functions */
unsigned long gfx_pci_config_read(int);
int /*<<< orphan*/ gfx_pci_config_write(int, unsigned long);
int cs5530_enable_softvga(void) {
  unsigned long reg_val;
  reg_val = gfx_pci_config_read(0x80009444);
  gfx_pci_config_write(0x80009444, reg_val & 0xfffffffe);
  reg_val = gfx_pci_config_read(0x80009444);
  if ((reg_val & 0x1) == 0)
    return (1);
  else
    return (0);
}


x86 assembly (clang, -O0):
<cs5530_enable_softvga>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    $0x80009444,%edi
call   1040 <gfx_pci_config_read@plt>
mov    %rax,-0x10(%rbp)
movabs $0xfffffffe,%rsi
and    -0x10(%rbp),%rsi
mov    $0x80009444,%edi
call   1030 <gfx_pci_config_write@plt>
mov    $0x80009444,%edi
call   1040 <gfx_pci_config_read@plt>
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
and    $0x1,%rax
cmp    $0x0,%rax
jne    117a <cs5530_enable_softvga+0x5a>
movl   $0x1,-0x4(%rbp)
jmp    1181 <cs5530_enable_softvga+0x61>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<cs5530_enable_softvga>:
push   %rax
mov    $0x80009444,%edi
call   1040 <gfx_pci_config_read@plt>
and    $0xfffffffe,%eax
mov    $0x80009444,%edi
mov    %rax,%rsi
call   1030 <gfx_pci_config_write@plt>
mov    $0x80009444,%edi
call   1040 <gfx_pci_config_read@plt>
not    %eax
and    $0x1,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @cs5530_enable_softvga() {
%1 = alloca i32
%2 = alloca i64
%3 = call i64 @gfx_pci_config_read(i32 -2147445692)
store i64 %3, i64* %2
%4 = load i64, i64* %2
%5 = and i64 %4, 4294967294
%6 = call i32 @gfx_pci_config_write(i32 -2147445692, i64 %5)
%7 = call i64 @gfx_pci_config_read(i32 -2147445692)
store i64 %7, i64* %2
%8 = load i64, i64* %2
%9 = and i64 %8, 1
%10 = icmp eq i64 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %0
store i32 1, i32* %1
br label %13
12: ; preds = %0
store i32 0, i32* %1
br label %13
13: ; preds = %12, %11
%14 = load i32, i32* %1
ret i32 %14
}

LLVM IR (-O2):
define i32 @cs5530_enable_softvga() {
%1 = tail call i64 @gfx_pci_config_read(i32 -2147445692)
%2 = and i64 %1, 4294967294
%3 = tail call i32 @gfx_pci_config_write(i32 -2147445692, i64 %2)
%4 = tail call i64 @gfx_pci_config_read(i32 -2147445692)
%5 = trunc i64 %4 to i32
%6 = and i32 %5, 1
%7 = xor i32 %6, 1
ret i32 %7
}
float test_sqrtf(float x) { return __builtin_sqrtf(x); }


x86 assembly (clang, -O0):
<test_sqrtf>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movss  %xmm0,-0x4(%rbp)
movss  -0x4(%rbp),%xmm0
call   1030 <sqrtf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<test_sqrtf>:
xorps  %xmm1,%xmm1
ucomiss %xmm1,%xmm0
jb     111d <test_sqrtf+0xd>
sqrtss %xmm0,%xmm0
ret
jmp    1030 <sqrtf@plt>

LLVM IR (-O0):
define float @test_sqrtf(float %0) {
%2 = alloca float
store float %0, float* %2
%3 = load float, float* %2
%4 = call float @sqrtf(float %3)
ret float %4
}

LLVM IR (-O2):
define float @test_sqrtf(float %0) {
%2 = tail call float @sqrtf(float %0)
ret float %2
}
int main() { return 1 <= 1; }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    $0x1,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
mov    $0x1,%eax
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
store i32 0, i32* %1
ret i32 1
}

LLVM IR (-O2):
define i32 @main() {
ret i32 1
}
/* Variables and functions */
unsigned int read_ram(int);
unsigned int fetch_instruction(int address) {
  unsigned int inst;
  inst = read_ram(address);
  return inst;
}


x86 assembly (clang, -O0):
<fetch_instruction>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <read_ram@plt>
mov    %eax,-0x8(%rbp)
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<fetch_instruction>:
jmp    1030 <read_ram@plt>

LLVM IR (-O0):
define i32 @fetch_instruction(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
%4 = load i32, i32* %2
%5 = call i32 @read_ram(i32 %4)
store i32 %5, i32* %3
%6 = load i32, i32* %3
ret i32 %6
}

LLVM IR (-O2):
define i32 @fetch_instruction(i32 %0) {
%2 = tail call i32 @read_ram(i32 %0)
ret i32 %2
}
float __complex__ fun_fcomplex(float __complex__ a, float __complex__ b) {
  return a;
}


x86 assembly (clang, -O0):
<fun_fcomplex>:
push   %rbp
mov    %rsp,%rbp
movlpd %xmm0,-0x10(%rbp)
movlpd %xmm1,-0x18(%rbp)
movss  -0x10(%rbp),%xmm1
movss  -0xc(%rbp),%xmm0
movss  %xmm1,-0x8(%rbp)
movss  %xmm0,-0x4(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun_fcomplex>:
ret

LLVM IR (-O0):
define <2 x float> @fun_fcomplex(<2 x float> %0, <2 x float> %1) {
%3 = alloca { float, float }
%4 = alloca { float, float }
%5 = alloca { float, float }
%6 = bitcast { float, float }* %4 to <2 x float>*
store <2 x float> %0, <2 x float>* %6
%7 = bitcast { float, float }* %5 to <2 x float>*
store <2 x float> %1, <2 x float>* %7
%8 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 0
%9 = load float, float* %8
%10 = getelementptr inbounds { float, float }, { float, float }* %4, i32 0, i32 1
%11 = load float, float* %10
%12 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 0
%13 = getelementptr inbounds { float, float }, { float, float }* %3, i32 0, i32 1
store float %9, float* %12
store float %11, float* %13
%14 = bitcast { float, float }* %3 to <2 x float>*
%15 = load <2 x float>, <2 x float>* %14
ret <2 x float> %15
}

LLVM IR (-O2):
define <2 x float> @fun_fcomplex(<2 x float> returned %0, <2 x float> %1) {
ret <2 x float> %0
}
__attribute((always_)) int f() { return 3; }


x86 assembly (clang, -O0):
<f>:
push   %rbp
mov    %rsp,%rbp
mov    $0x3,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<f>:
mov    $0x3,%eax
ret

LLVM IR (-O0):
define i32 @f() {
ret i32 3
}

LLVM IR (-O2):
define i32 @f() {
ret i32 3
}
int cephes_signbit(x)
double x;
{
  union {
    double d;
    short s[4];
    int i[2];
  } u;
  u.d = x;
  if (sizeof(int) == 4) {
    return (u.i[1] < 0);
  } else {
    return (u.s[3] < 0);
  }
}


x86 assembly (clang, -O0):
<cephes_signbit>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  %xmm0,-0x10(%rbp)
cmpl   $0x0,-0xc(%rbp)
setl   %al
and    $0x1,%al
movzbl %al,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<cephes_signbit>:
movmskpd %xmm0,%eax
and    $0x1,%eax
ret

LLVM IR (-O0):
%union.anon = type { double }
define i32 @cephes_signbit(double %0) {
%2 = alloca double
%3 = alloca %union.anon
store double %0, double* %2
%4 = load double, double* %2
%5 = bitcast %union.anon* %3 to double*
store double %4, double* %5
%6 = bitcast %union.anon* %3 to [2 x i32]*
%7 = getelementptr inbounds [2 x i32], [2 x i32]* %6, i64 0, i64 1
%8 = load i32, i32* %7
%9 = icmp slt i32 %8, 0
%10 = zext i1 %9 to i32
ret i32 %10
}

LLVM IR (-O2):
define i32 @cephes_signbit(double %0) {
%2 = bitcast double %0 to i64
%3 = lshr i64 %2, 63
%4 = trunc i64 %3 to i32
ret i32 %4
}
void ff_hevc_put_hevc_epel_hv64_10_avx2() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_epel_hv64_10_avx2>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_epel_hv64_10_avx2>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_epel_hv64_10_avx2() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_epel_hv64_10_avx2() {
ret void
}
void atexit(void *p) {}


x86 assembly (clang, -O0):
<atexit>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<atexit>:
ret

LLVM IR (-O0):
define void @atexit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
ret void
}

LLVM IR (-O2):
define void @atexit(i8* nocapture %0) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ __VERIFIER_assert(int);
void foo(int x, int y) { __VERIFIER_assert(x < y); }


x86 assembly (clang, -O0):
<foo>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
cmp    -0x8(%rbp),%eax
setl   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <__VERIFIER_assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<foo>:
xor    %eax,%eax
cmp    %esi,%edi
setl   %al
mov    %eax,%edi
jmp    1030 <__VERIFIER_assert@plt>

LLVM IR (-O0):
define void @foo(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = icmp slt i32 %5, %6
%8 = zext i1 %7 to i32
%9 = call i32 @__VERIFIER_assert(i32 %8)
ret void
}

LLVM IR (-O2):
define void @foo(i32 %0, i32 %1) {
%3 = icmp slt i32 %0, %1
%4 = zext i1 %3 to i32
%5 = tail call i32 @__VERIFIER_assert(i32 %4)
ret void
}
/* Type definitions */
typedef int uint16_t;

/* Variables and functions */
int /*<<< orphan*/ printf(char *, int);
void AnsiTerm_cursor_back(uint16_t cells) { printf("\x1B[%dD", cells); }


x86 assembly (clang, -O0):
<AnsiTerm_cursor_back>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
lea    0xedb(%rip),%rdi
call   1030 <printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<AnsiTerm_cursor_back>:
mov    %edi,%esi
lea    0xee7(%rip),%rdi
jmp    1030 <printf@plt>

LLVM IR (-O0):
@.str = [6 x i8] c"\1B[%dD\00"
define void @AnsiTerm_cursor_back(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %3)
ret void
}

LLVM IR (-O2):
@.str = [6 x i8] c"\1B[%dD\00"
define void @AnsiTerm_cursor_back(i32 %0) {
%2 = tail call i32 @printf(i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i64 0, i64 0), i32 %0)
ret void
}
int haggle_insults(store_num)
int store_num;
{
  register int haggle;
  haggle = 0;
  if (increase_insults(store_num))
    haggle = 1;
  else {
    prt_comment5();
    msg_print((char *)0);
  }
  return (haggle);
}


x86 assembly (clang, -O0):
<haggle_insults>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x0,-0x8(%rbp)
mov    -0x4(%rbp),%edi
mov    $0x0,%al
call   1030 <increase_insults@plt>
cmp    $0x0,%eax
je     1161 <haggle_insults+0x31>
movl   $0x1,-0x8(%rbp)
jmp    1173 <haggle_insults+0x43>
mov    $0x0,%al
call   1050 <prt_comment5@plt>
xor    %eax,%eax
mov    %eax,%edi
mov    $0x0,%al
call   1040 <msg_print@plt>
mov    -0x8(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<haggle_insults>:
push   %rax
xor    %eax,%eax
call   1030 <increase_insults@plt>
mov    %eax,%ecx
mov    $0x1,%eax
test   %ecx,%ecx
je     1145 <haggle_insults+0x15>
pop    %rcx
ret
xor    %eax,%eax
call   1050 <prt_comment5@plt>
xor    %edi,%edi
xor    %eax,%eax
call   1040 <msg_print@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @haggle_insults(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 0, i32* %3
%4 = load i32, i32* %2
%5 = call i32 (i32, ...) bitcast (i32 (...)* @increase_insults to i32 (i32, ...)*)(i32 %4)
%6 = icmp ne i32 %5, 0
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 1, i32* %3
br label %11
8: ; preds = %1
%9 = call i32 (...) @prt_comment5()
%10 = call i32 (i8*, ...) bitcast (i32 (...)* @msg_print to i32 (i8*, ...)*)(i8* null)
br label %11
11: ; preds = %8, %7
%12 = load i32, i32* %3
ret i32 %12
}

LLVM IR (-O2):
define i32 @haggle_insults(i32 %0) {
%2 = tail call i32 (i32, ...) bitcast (i32 (...)* @increase_insults to i32 (i32, ...)*)(i32 %0)
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %7
4: ; preds = %1
%5 = tail call i32 (...) @prt_comment5()
%6 = tail call i32 (i8*, ...) bitcast (i32 (...)* @msg_print to i32 (i8*, ...)*)(i8* null)
br label %7
7: ; preds = %1, %4
%8 = phi i32 [ 0, %4 ], [ 1, %1 ]
ret i32 %8
}
int dothis(int a, int b) { return a * b; }


x86 assembly (clang, -O0):
<dothis>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%eax
imul   -0x8(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<dothis>:
mov    %edi,%eax
imul   %esi,%eax
ret

LLVM IR (-O0):
define i32 @dothis(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = mul nsw i32 %5, %6
ret i32 %7
}

LLVM IR (-O2):
define i32 @dothis(i32 %0, i32 %1) {
%3 = mul nsw i32 %1, %0
ret i32 %3
}
/* Variables and functions */
int /*<<< orphan*/ MessageBufferLayerP__0__RadioState__done();
void RFA1DriverLayerP__RadioState__done(void) {
  MessageBufferLayerP__0__RadioState__done();
}


x86 assembly (clang, -O0):
<RFA1DriverLayerP__RadioState__done>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <MessageBufferLayerP__0__RadioState__done@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RFA1DriverLayerP__RadioState__done>:
xor    %eax,%eax
jmp    1030 <MessageBufferLayerP__0__RadioState__done@plt>

LLVM IR (-O0):
define void @RFA1DriverLayerP__RadioState__done() {
%1 = call i32 (...) @MessageBufferLayerP__0__RadioState__done()
ret void
}

LLVM IR (-O2):
define void @RFA1DriverLayerP__RadioState__done() {
%1 = tail call i32 (...) @MessageBufferLayerP__0__RadioState__done()
ret void
}
/* Variables and functions */
int _set_init_program(int, char *);
int libamg_process_start_init_program(char *prog) {
  return _set_init_program(1, prog);
}


x86 assembly (clang, -O0):
<libamg_process_start_init_program>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rsi
mov    $0x1,%edi
call   1030 <_set_init_program@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libamg_process_start_init_program>:
mov    %rdi,%rsi
mov    $0x1,%edi
jmp    1030 <_set_init_program@plt>

LLVM IR (-O0):
define i32 @libamg_process_start_init_program(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @_set_init_program(i32 1, i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @libamg_process_start_init_program(i8* %0) {
%2 = tail call i32 @_set_init_program(i32 1, i8* %0)
ret i32 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ uint64_t;
struct can_frame {
  int /*<<< orphan*/ *data;
};
typedef int /*<<< orphan*/ result;

/* Variables and functions */
int /*<<< orphan*/ byteorder(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
int /*<<< orphan*/ memcpy(int /*<<< orphan*/ *, int /*<<< orphan*/ *, int);
uint64_t emcy_get_manufacturer_error(const struct can_frame *frame) {
  uint64_t tmp = 0;
  uint64_t result = 0;
  memcpy(&tmp, &frame->data[4], 5);
  byteorder(&result, &tmp, sizeof(result));
  return result;
}


x86 assembly (clang, -O0):
<emcy_get_manufacturer_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
movl   $0x0,-0xc(%rbp)
movl   $0x0,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    (%rax),%rsi
add    $0x10,%rsi
lea    -0xc(%rbp),%rdi
mov    $0x5,%edx
call   1040 <memcpy@plt>
lea    -0x10(%rbp),%rdi
lea    -0xc(%rbp),%rsi
mov    $0x4,%edx
call   1030 <byteorder@plt>
mov    -0x10(%rbp),%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<emcy_get_manufacturer_error>:
push   %rbx
sub    $0x10,%rsp
movl   $0x0,0xc(%rsp)
movl   $0x0,0x8(%rsp)
mov    (%rdi),%rsi
add    $0x10,%rsi
lea    0xc(%rsp),%rbx
mov    %rbx,%rdi
mov    $0x5,%edx
call   1040 <memcpy@plt>
lea    0x8(%rsp),%rdi
mov    %rbx,%rsi
mov    $0x4,%edx
call   1030 <byteorder@plt>
mov    0x8(%rsp),%eax
add    $0x10,%rsp
pop    %rbx
ret

LLVM IR (-O0):
%struct.can_frame = type { i32* }
define i32 @emcy_get_manufacturer_error(%struct.can_frame* %0) {
%2 = alloca %struct.can_frame*
%3 = alloca i32
%4 = alloca i32
store %struct.can_frame* %0, %struct.can_frame** %2
store i32 0, i32* %3
store i32 0, i32* %4
%5 = load %struct.can_frame*, %struct.can_frame** %2
%6 = getelementptr inbounds %struct.can_frame, %struct.can_frame* %5, i32 0, i32 0
%7 = load i32*, i32** %6
%8 = getelementptr inbounds i32, i32* %7, i64 4
%9 = call i32 @memcpy(i32* %3, i32* %8, i32 5)
%10 = call i32 @byteorder(i32* %4, i32* %3, i32 4)
%11 = load i32, i32* %4
ret i32 %11
}

LLVM IR (-O2):
%struct.can_frame = type { i32* }
define i32 @emcy_get_manufacturer_error(%struct.can_frame* nocapture %0) {
%2 = alloca i32
%3 = alloca i32
%4 = bitcast i32* %2 to i8*
store i32 0, i32* %2
%5 = bitcast i32* %3 to i8*
store i32 0, i32* %3
%6 = getelementptr inbounds %struct.can_frame, %struct.can_frame* %0, i64 0, i32 0
%7 = load i32*, i32** %6
%8 = getelementptr inbounds i32, i32* %7, i64 4
%9 = call i32 @memcpy(i32* %2, i32* %8, i32 5)
%10 = call i32 @byteorder(i32* %3, i32* %2, i32 4)
%11 = load i32, i32* %3
ret i32 %11
}
/* Variables and functions */
int /*<<< orphan*/ usleep(unsigned int const);
void freezeFrame(unsigned int frames) {
  const unsigned int usecs = 15000;
  usleep((usecs * frames));
}


x86 assembly (clang, -O0):
<freezeFrame>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
movl   $0x3a98,-0x8(%rbp)
imul   $0x3a98,-0x4(%rbp),%edi
call   1030 <usleep@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<freezeFrame>:
imul   $0x3a98,%edi,%edi
jmp    1030 <usleep@plt>

LLVM IR (-O0):
define void @freezeFrame(i32 %0) {
%2 = alloca i32
%3 = alloca i32
store i32 %0, i32* %2
store i32 15000, i32* %3
%4 = load i32, i32* %2
%5 = mul i32 15000, %4
%6 = call i32 @usleep(i32 %5)
ret void
}

LLVM IR (-O2):
define void @freezeFrame(i32 %0) {
%2 = mul i32 %0, 15000
%3 = tail call i32 @usleep(i32 %2)
ret void
}
IR0AX1(r0, r1, x0, x1, p0, p1) signed char r0, r1;
signed char *p0, *p1;
{
  if ((*p0) <= (((signed char *)11111111)[x1]))
    return 1;
  else
    return 0;
}


x86 assembly (clang, -O0):
<IR0AX1>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%eax
mov    %dil,%sil
mov    %sil,-0x5(%rbp)
mov    %al,-0x6(%rbp)
mov    %edx,-0xc(%rbp)
mov    %ecx,-0x10(%rbp)
mov    %r8,-0x18(%rbp)
mov    %r9,-0x20(%rbp)
mov    -0x18(%rbp),%rax
movsbl (%rax),%eax
movslq -0x10(%rbp),%rdx
mov    $0xa98ac7,%ecx
movsbl (%rcx,%rdx,1),%ecx
cmp    %ecx,%eax
jg     1146 <IR0AX1+0x46>
movl   $0x1,-0x4(%rbp)
jmp    114d <IR0AX1+0x4d>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<IR0AX1>:
mov    (%r8),%dl
movslq %ecx,%rcx
xor    %eax,%eax
cmp    0xa98ac7(%rcx),%dl
setle  %al
ret

LLVM IR (-O0):
define i32 @IR0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i8* %4, i8* %5) {
%7 = alloca i32
%8 = alloca i8
%9 = alloca i8
%10 = alloca i32
%11 = alloca i32
%12 = alloca i8*
%13 = alloca i8*
%14 = trunc i32 %0 to i8
%15 = trunc i32 %1 to i8
store i8 %14, i8* %8
store i8 %15, i8* %9
store i32 %2, i32* %10
store i32 %3, i32* %11
store i8* %4, i8** %12
store i8* %5, i8** %13
%16 = load i8*, i8** %12
%17 = load i8, i8* %16
%18 = sext i8 %17 to i32
%19 = load i32, i32* %11
%20 = sext i32 %19 to i64
%21 = getelementptr inbounds i8, i8* inttoptr (i64 11111111 to i8*), i64 %20
%22 = load i8, i8* %21
%23 = sext i8 %22 to i32
%24 = icmp sle i32 %18, %23
br i1 %24, label %25, label %26
25: ; preds = %6
store i32 1, i32* %7
br label %27
26: ; preds = %6
store i32 0, i32* %7
br label %27
27: ; preds = %26, %25
%28 = load i32, i32* %7
ret i32 %28
}

LLVM IR (-O2):
define i32 @IR0AX1(i32 %0, i32 %1, i32 %2, i32 %3, i8* nocapture %4, i8* nocapture readnone %5) {
%7 = load i8, i8* %4
%8 = sext i32 %3 to i64
%9 = getelementptr inbounds i8, i8* inttoptr (i64 11111111 to i8*), i64 %8
%10 = load i8, i8* %9
%11 = icmp sle i8 %7, %10
%12 = zext i1 %11 to i32
ret i32 %12
}
int fun344() { return 344; }


x86 assembly (clang, -O0):
<fun344>:
push   %rbp
mov    %rsp,%rbp
mov    $0x158,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun344>:
mov    $0x158,%eax
ret

LLVM IR (-O0):
define i32 @fun344() {
ret i32 344
}

LLVM IR (-O2):
define i32 @fun344() {
ret i32 344
}
unsigned kol_system_memfree() { asm("int $0x40" ::"a"(18), "b"(16)); }


x86 assembly (clang, -O0):
<kol_system_memfree>:
push   %rbp
mov    %rsp,%rbp
push   %rbx
mov    $0x12,%eax
mov    $0x10,%ebx
int    $0x40
mov    -0xc(%rbp),%eax
pop    %rbx
pop    %rbp
ret

x86 assembly (clang, -O2):
<kol_system_memfree>:
push   %rbx
mov    $0x12,%eax
mov    $0x10,%ebx
int    $0x40
pop    %rbx
ret

LLVM IR (-O0):
define i32 @kol_system_memfree() {
%1 = alloca i32
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @kol_system_memfree() {
tail call void asm sideeffect "int $$0x40", "{ax},{bx},~{dirflag},~{fpsr},~{flags}"(i32 18, i32 16)
ret i32 undef
}
/* Type definitions */
struct interface {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ pim_vif_new(struct interface *);
int pim_interface_new_hook(struct interface *ifp) {
  pim_vif_new(ifp);
  return 0;
}


x86 assembly (clang, -O0):
<pim_interface_new_hook>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <pim_vif_new@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<pim_interface_new_hook>:
push   %rax
call   1030 <pim_vif_new@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
%struct.interface = type { i32 }
define i32 @pim_interface_new_hook(%struct.interface* %0) {
%2 = alloca %struct.interface*
store %struct.interface* %0, %struct.interface** %2
%3 = load %struct.interface*, %struct.interface** %2
%4 = call i32 @pim_vif_new(%struct.interface* %3)
ret i32 0
}

LLVM IR (-O2):
%struct.interface = type { i32 }
define i32 @pim_interface_new_hook(%struct.interface* %0) {
%2 = tail call i32 @pim_vif_new(%struct.interface* %0)
ret i32 0
}
void get(double *rr, int i, double *r1) {
  enum { X, Y, Z };
  double *r0;
  r0 = &rr[3 * i];
  r1[X] = r0[X];
  r1[Y] = r0[Y];
  r1[Z] = r0[Z];
}


x86 assembly (clang, -O0):
<get>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rax
imul   $0x3,-0xc(%rbp),%ecx
movslq %ecx,%rcx
shl    $0x3,%rcx
add    %rcx,%rax
mov    %rax,-0x20(%rbp)
mov    -0x20(%rbp),%rax
movsd  (%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,(%rax)
mov    -0x20(%rbp),%rax
movsd  0x8(%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x8(%rax)
mov    -0x20(%rbp),%rax
movsd  0x10(%rax),%xmm0
mov    -0x18(%rbp),%rax
movsd  %xmm0,0x10(%rax)
pop    %rbp
ret

x86 assembly (clang, -O2):
<get>:
lea    (%rsi,%rsi,2),%eax
cltq
movsd  (%rdi,%rax,8),%xmm0
movsd  %xmm0,(%rdx)
movsd  0x8(%rdi,%rax,8),%xmm0
movsd  %xmm0,0x8(%rdx)
movsd  0x10(%rdi,%rax,8),%xmm0
movsd  %xmm0,0x10(%rdx)
ret

LLVM IR (-O0):
define void @get(double* %0, i32 %1, double* %2) {
%4 = alloca double*
%5 = alloca i32
%6 = alloca double*
%7 = alloca double*
store double* %0, double** %4
store i32 %1, i32* %5
store double* %2, double** %6
%8 = load double*, double** %4
%9 = load i32, i32* %5
%10 = mul nsw i32 3, %9
%11 = sext i32 %10 to i64
%12 = getelementptr inbounds double, double* %8, i64 %11
store double* %12, double** %7
%13 = load double*, double** %7
%14 = getelementptr inbounds double, double* %13, i64 0
%15 = load double, double* %14
%16 = load double*, double** %6
%17 = getelementptr inbounds double, double* %16, i64 0
store double %15, double* %17
%18 = load double*, double** %7
%19 = getelementptr inbounds double, double* %18, i64 1
%20 = load double, double* %19
%21 = load double*, double** %6
%22 = getelementptr inbounds double, double* %21, i64 1
store double %20, double* %22
%23 = load double*, double** %7
%24 = getelementptr inbounds double, double* %23, i64 2
%25 = load double, double* %24
%26 = load double*, double** %6
%27 = getelementptr inbounds double, double* %26, i64 2
store double %25, double* %27
ret void
}

LLVM IR (-O2):
define void @get(double* nocapture %0, i32 %1, double* nocapture writeonly %2) {
%4 = mul nsw i32 %1, 3
%5 = sext i32 %4 to i64
%6 = getelementptr inbounds double, double* %0, i64 %5
%7 = load double, double* %6
store double %7, double* %2
%8 = getelementptr inbounds double, double* %6, i64 1
%9 = load double, double* %8
%10 = getelementptr inbounds double, double* %2, i64 1
store double %9, double* %10
%11 = getelementptr inbounds double, double* %6, i64 2
%12 = load double, double* %11
%13 = getelementptr inbounds double, double* %2, i64 2
store double %12, double* %13
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ FILE;

/* Variables and functions */
int /*<<< orphan*/ fclose(int /*<<< orphan*/ *);
int /*<<< orphan*/ *fopen(char *, char *);
int /*<<< orphan*/ fprintf(int /*<<< orphan*/ *, char *, int);
scalar_t__ getpid();
void createPidFile(void) {
  FILE *fp = fopen("local_proxy.pid", "w");
  if (fp) {
    fprintf(fp, "%d\n", (int)getpid());
    fclose(fp);
  }
}


x86 assembly (clang, -O0):
<createPidFile>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
lea    0xeb1(%rip),%rdi
lea    0xeba(%rip),%rsi
call   1060 <fopen@plt>
mov    %rax,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1194 <createPidFile+0x54>
mov    -0x8(%rbp),%rax
mov    %rax,-0x10(%rbp)
mov    $0x0,%al
call   1030 <getpid@plt>
mov    -0x10(%rbp),%rdi
mov    %eax,%edx
lea    0xe8c(%rip),%rsi
call   1050 <fprintf@plt>
mov    -0x8(%rbp),%rdi
call   1040 <fclose@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<createPidFile>:
push   %rbx
lea    0xeb8(%rip),%rdi
lea    0xec1(%rip),%rsi
call   1060 <fopen@plt>
test   %rax,%rax
je     117d <createPidFile+0x3d>
mov    %rax,%rbx
xor    %eax,%eax
call   1030 <getpid@plt>
lea    0xea8(%rip),%rsi
mov    %rbx,%rdi
mov    %eax,%edx
call   1050 <fprintf@plt>
mov    %rbx,%rdi
pop    %rbx
jmp    1040 <fclose@plt>
pop    %rbx
ret

LLVM IR (-O0):
@.str = [16 x i8] c"local_proxy.pid\00"
@.str.1 = [2 x i8] c"w\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define void @createPidFile() {
%1 = alloca i32*
%2 = call i32* @fopen(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
store i32* %2, i32** %1
%3 = load i32*, i32** %1
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %12
5: ; preds = %0
%6 = load i32*, i32** %1
%7 = call i64 (...) @getpid()
%8 = trunc i64 %7 to i32
%9 = call i32 @fprintf(i32* %6, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %8)
%10 = load i32*, i32** %1
%11 = call i32 @fclose(i32* %10)
br label %12
12: ; preds = %5, %0
ret void
}

LLVM IR (-O2):
@.str = [16 x i8] c"local_proxy.pid\00"
@.str.1 = [2 x i8] c"w\00"
@.str.2 = [4 x i8] c"%d\0A\00"
define void @createPidFile() {
%1 = tail call i32* @fopen(i8* getelementptr inbounds ([16 x i8], [16 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
%2 = icmp eq i32* %1, null
br i1 %2, label %8, label %3
3: ; preds = %0
%4 = tail call i64 (...) @getpid()
%5 = trunc i64 %4 to i32
%6 = tail call i32 @fprintf(i32* %1, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0), i32 %5)
%7 = tail call i32 @fclose(i32* %1)
br label %8
8: ; preds = %3, %0
ret void
}
int LexIsAlpha(char c) {
  if ('A' <= c && c <= 'Z') {
    return 1;
  }
  if ('a' <= c && c <= 'z') {
    return 1;
  }
  if (c == '_') {
    return 1;
  }
  return 0;
}


x86 assembly (clang, -O0):
<LexIsAlpha>:
push   %rbp
mov    %rsp,%rbp
mov    %dil,%al
mov    %al,-0x5(%rbp)
movsbl -0x5(%rbp),%ecx
mov    $0x41,%eax
cmp    %ecx,%eax
jg     1134 <LexIsAlpha+0x34>
movsbl -0x5(%rbp),%eax
cmp    $0x5a,%eax
jg     1134 <LexIsAlpha+0x34>
movl   $0x1,-0x4(%rbp)
jmp    117e <LexIsAlpha+0x7e>
movsbl -0x5(%rbp),%ecx
mov    $0x61,%eax
cmp    %ecx,%eax
jg     115e <LexIsAlpha+0x5e>
movsbl -0x5(%rbp),%eax
cmp    $0x7a,%eax
jg     115e <LexIsAlpha+0x5e>
movl   $0x1,-0x4(%rbp)
jmp    117e <LexIsAlpha+0x7e>
movsbl -0x5(%rbp),%eax
cmp    $0x5f,%eax
jne    1177 <LexIsAlpha+0x77>
movl   $0x1,-0x4(%rbp)
jmp    117e <LexIsAlpha+0x7e>
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<LexIsAlpha>:
mov    %edi,%eax
and    $0xdf,%al
add    $0xbf,%al
cmp    $0x1a,%al
setb   %al
cmp    $0x5f,%dil
sete   %cl
or     %al,%cl
movzbl %cl,%eax
ret

LLVM IR (-O0):
define i32 @LexIsAlpha(i8 signext %0) {
%2 = alloca i32
%3 = alloca i8
store i8 %0, i8* %3
%4 = load i8, i8* %3
%5 = sext i8 %4 to i32
%6 = icmp sle i32 65, %5
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i8, i8* %3
%9 = sext i8 %8 to i32
%10 = icmp sle i32 %9, 90
br i1 %10, label %11, label %12
11: ; preds = %7
store i32 1, i32* %2
br label %27
12: ; preds = %7, %1
%13 = load i8, i8* %3
%14 = sext i8 %13 to i32
%15 = icmp sle i32 97, %14
br i1 %15, label %16, label %21
16: ; preds = %12
%17 = load i8, i8* %3
%18 = sext i8 %17 to i32
%19 = icmp sle i32 %18, 122
br i1 %19, label %20, label %21
20: ; preds = %16
store i32 1, i32* %2
br label %27
21: ; preds = %16, %12
%22 = load i8, i8* %3
%23 = sext i8 %22 to i32
%24 = icmp eq i32 %23, 95
br i1 %24, label %25, label %26
25: ; preds = %21
store i32 1, i32* %2
br label %27
26: ; preds = %21
store i32 0, i32* %2
br label %27
27: ; preds = %26, %25, %20, %11
%28 = load i32, i32* %2
ret i32 %28
}

LLVM IR (-O2):
define i32 @LexIsAlpha(i8 signext %0) {
%2 = and i8 %0, -33
%3 = add i8 %2, -65
%4 = icmp ult i8 %3, 26
%5 = icmp eq i8 %0, 95
%6 = or i1 %5, %4
%7 = zext i1 %6 to i32
ret i32 %7
}
double amax(u, v)
double u, v;
{
  if (u > v)
    return (u);
  return (v);
}


x86 assembly (clang, -O0):
<amax>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x10(%rbp)
movsd  %xmm1,-0x18(%rbp)
movsd  -0x10(%rbp),%xmm0
ucomisd -0x18(%rbp),%xmm0
jbe    112d <amax+0x2d>
movsd  -0x10(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
jmp    1137 <amax+0x37>
movsd  -0x18(%rbp),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<amax>:
maxsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @amax(double %0, double %1) {
%3 = alloca double
%4 = alloca double
%5 = alloca double
store double %0, double* %4
store double %1, double* %5
%6 = load double, double* %4
%7 = load double, double* %5
%8 = fcmp ogt double %6, %7
br i1 %8, label %9, label %11
9: ; preds = %2
%10 = load double, double* %4
store double %10, double* %3
br label %13
11: ; preds = %2
%12 = load double, double* %5
store double %12, double* %3
br label %13
13: ; preds = %11, %9
%14 = load double, double* %3
ret double %14
}

LLVM IR (-O2):
define double @amax(double %0, double %1) {
%3 = fcmp ogt double %0, %1
%4 = select i1 %3, double %0, double %1
ret double %4
}
/* Variables and functions */
int write_block(int, int /*<<< orphan*/, int /*<<< orphan*/,
                int /*<<< orphan*/);
int left(void) { return write_block(97, 0, 0, 0); }


x86 assembly (clang, -O0):
<left>:
push   %rbp
mov    %rsp,%rbp
mov    $0x61,%edi
xor    %ecx,%ecx
mov    %ecx,%esi
mov    %ecx,%edx
call   1030 <write_block@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<left>:
mov    $0x61,%edi
xor    %esi,%esi
xor    %edx,%edx
xor    %ecx,%ecx
jmp    1030 <write_block@plt>

LLVM IR (-O0):
define i32 @left() {
%1 = call i32 @write_block(i32 97, i32 0, i32 0, i32 0)
ret i32 %1
}

LLVM IR (-O2):
define i32 @left() {
%1 = tail call i32 @write_block(i32 97, i32 0, i32 0, i32 0)
ret i32 %1
}
void glReleaseShaderCompiler(void) { return; }


x86 assembly (clang, -O0):
<glReleaseShaderCompiler>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<glReleaseShaderCompiler>:
ret

LLVM IR (-O0):
define void @glReleaseShaderCompiler() {
ret void
}

LLVM IR (-O2):
define void @glReleaseShaderCompiler() {
ret void
}
/* Type definitions */
struct stringbuf {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ stringbuf_append(struct stringbuf *, char const *,
                                    int /*<<< orphan*/);
int /*<<< orphan*/ strlen(char const *);
void stringbuf_puts(struct stringbuf *sb, const char *data) {
  stringbuf_append(sb, data, strlen(data));
}


x86 assembly (clang, -O0):
<stringbuf_puts>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rax
mov    %rax,-0x20(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x20(%rbp),%rdi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <stringbuf_append@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<stringbuf_puts>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %r14,%rdi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %r14
jmp    1030 <stringbuf_append@plt>

LLVM IR (-O0):
%struct.stringbuf = type { i32 }
define void @stringbuf_puts(%struct.stringbuf* %0, i8* %1) {
%3 = alloca %struct.stringbuf*
%4 = alloca i8*
store %struct.stringbuf* %0, %struct.stringbuf** %3
store i8* %1, i8** %4
%5 = load %struct.stringbuf*, %struct.stringbuf** %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @stringbuf_append(%struct.stringbuf* %5, i8* %6, i32 %8)
ret void
}

LLVM IR (-O2):
%struct.stringbuf = type { i32 }
define void @stringbuf_puts(%struct.stringbuf* %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @stringbuf_append(%struct.stringbuf* %0, i8* %1, i32 %3)
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ va_list;

/* Variables and functions */
int id_db_final(void *key, void *data, va_list ap) { return 0; }


x86 assembly (clang, -O0):
<id_db_final>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<id_db_final>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @id_db_final(i8* %0, i8* %1, i32 %2) {
%4 = alloca i8*
%5 = alloca i8*
%6 = alloca i32
store i8* %0, i8** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
define i32 @id_db_final(i8* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}