xunge/DecIR huggingface dataset:
/* Type definitions */
struct gpio {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ gpio_mode(struct gpio *, int, int);
void gpio_a_analog(int bit) { gpio_mode((struct gpio *)0x40010800, bit, 0x0); }


x86 assembly (clang, -O0):
<gpio_a_analog>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%esi
mov    $0x40010800,%edi
xor    %edx,%edx
call   1030 <gpio_mode@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gpio_a_analog>:
mov    %edi,%esi
mov    $0x40010800,%edi
xor    %edx,%edx
jmp    1030 <gpio_mode@plt>

LLVM IR (-O0):
%struct.gpio = type { i32 }
define void @gpio_a_analog(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @gpio_mode(%struct.gpio* inttoptr (i64 1073809408 to %struct.gpio*), i32 %3, i32 0)
ret void
}

LLVM IR (-O2):
%struct.gpio = type { i32 }
define void @gpio_a_analog(i32 %0) {
%2 = tail call i32 @gpio_mode(%struct.gpio* inttoptr (i64 1073809408 to %struct.gpio*), i32 %0, i32 0)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ cbreak();
int /*<<< orphan*/ noecho();
int /*<<< orphan*/ nonl();
void start_window(void) {
  cbreak();
  noecho();
  nonl();
}


x86 assembly (clang, -O0):
<start_window>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <cbreak@plt>
mov    $0x0,%al
call   1050 <noecho@plt>
mov    $0x0,%al
call   1040 <nonl@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<start_window>:
push   %rax
xor    %eax,%eax
call   1030 <cbreak@plt>
xor    %eax,%eax
call   1050 <noecho@plt>
xor    %eax,%eax
pop    %rcx
jmp    1040 <nonl@plt>

LLVM IR (-O0):
define void @start_window() {
%1 = call i32 (...) @cbreak()
%2 = call i32 (...) @noecho()
%3 = call i32 (...) @nonl()
ret void
}

LLVM IR (-O2):
define void @start_window() {
%1 = tail call i32 (...) @cbreak()
%2 = tail call i32 (...) @noecho()
%3 = tail call i32 (...) @nonl()
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ GLint;
typedef int /*<<< orphan*/ GLenum;

/* Variables and functions */
int /*<<< orphan*/ __glGet_size(int /*<<< orphan*/);
GLint __glGetFloatv_size(GLenum sq) { return __glGet_size(sq); }


x86 assembly (clang, -O0):
<__glGetFloatv_size>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1030 <__glGet_size@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<__glGetFloatv_size>:
jmp    1030 <__glGet_size@plt>

LLVM IR (-O0):
define i32 @__glGetFloatv_size(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @__glGet_size(i32 %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @__glGetFloatv_size(i32 %0) {
%2 = tail call i32 @__glGet_size(i32 %0)
ret i32 %2
}
void INT_Excep_PERIA_INTA229(void) {}


x86 assembly (clang, -O0):
<INT_Excep_PERIA_INTA229>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<INT_Excep_PERIA_INTA229>:
ret

LLVM IR (-O0):
define void @INT_Excep_PERIA_INTA229() {
ret void
}

LLVM IR (-O2):
define void @INT_Excep_PERIA_INTA229() {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ strlen(char *);
int write(int, char *, int /*<<< orphan*/);
int device_write_string(int fd, char *data) {
  return write(fd, data, strlen(data));
}


x86 assembly (clang, -O0):
<device_write_string>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x4(%rbp),%eax
mov    %eax,-0x1c(%rbp)
mov    -0x10(%rbp),%rax
mov    %rax,-0x18(%rbp)
mov    -0x10(%rbp),%rdi
call   1040 <strlen@plt>
mov    -0x1c(%rbp),%edi
mov    -0x18(%rbp),%rsi
mov    %eax,%edx
call   1030 <write@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<device_write_string>:
push   %rbp
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %edi,%ebp
mov    %rsi,%rdi
call   1040 <strlen@plt>
mov    %ebp,%edi
mov    %rbx,%rsi
mov    %eax,%edx
add    $0x8,%rsp
pop    %rbx
pop    %rbp
jmp    1030 <write@plt>

LLVM IR (-O0):
define i32 @device_write_string(i32 %0, i8* %1) {
%3 = alloca i32
%4 = alloca i8*
store i32 %0, i32* %3
store i8* %1, i8** %4
%5 = load i32, i32* %3
%6 = load i8*, i8** %4
%7 = load i8*, i8** %4
%8 = call i32 @strlen(i8* %7)
%9 = call i32 @write(i32 %5, i8* %6, i32 %8)
ret i32 %9
}

LLVM IR (-O2):
define i32 @device_write_string(i32 %0, i8* %1) {
%3 = tail call i32 @strlen(i8* %1)
%4 = tail call i32 @write(i32 %0, i8* %1, i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ printf(char *, ...);
void display(int num, int *pos) {
  int col;
  for (col = 0; col < num; col++)
    printf("%4d", *(pos + col));
  printf("\n");
}


x86 assembly (clang, -O0):
<display>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %edi,-0x4(%rbp)
mov    %rsi,-0x10(%rbp)
movl   $0x0,-0x14(%rbp)
mov    -0x14(%rbp),%eax
cmp    -0x4(%rbp),%eax
jge    1159 <display+0x49>
mov    -0x10(%rbp),%rax
movslq -0x14(%rbp),%rcx
mov    (%rax,%rcx,4),%esi
lea    0xebc(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
mov    -0x14(%rbp),%eax
add    $0x1,%eax
mov    %eax,-0x14(%rbp)
jmp    1126 <display+0x16>
lea    0xea4(%rip),%rdi
mov    $0x0,%al
call   1030 <printf@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<display>:
push   %r15
push   %r14
push   %r12
push   %rbx
push   %rax
test   %edi,%edi
jle    1157 <display+0x37>
mov    %rsi,%r15
mov    %edi,%r12d
lea    0xec7(%rip),%r14
xor    %ebx,%ebx
nopl   0x0(%rax,%rax,1)
mov    (%r15,%rbx,4),%esi
mov    %r14,%rdi
xor    %eax,%eax
call   1040 <printf@plt>
add    $0x1,%rbx
cmp    %rbx,%r12
jne    1140 <display+0x20>
mov    $0xa,%edi
add    $0x8,%rsp
pop    %rbx
pop    %r12
pop    %r14
pop    %r15
jmp    1030 <putchar@plt>

LLVM IR (-O0):
@.str = [4 x i8] c"%4d\00"
@.str.1 = [2 x i8] c"\0A\00"
define void @display(i32 %0, i32* %1) {
%3 = alloca i32
%4 = alloca i32*
%5 = alloca i32
store i32 %0, i32* %3
store i32* %1, i32** %4
store i32 0, i32* %5
br label %6
6: ; preds = %17, %2
%7 = load i32, i32* %5
%8 = load i32, i32* %3
%9 = icmp slt i32 %7, %8
br i1 %9, label %10, label %20
10: ; preds = %6
%11 = load i32*, i32** %4
%12 = load i32, i32* %5
%13 = sext i32 %12 to i64
%14 = getelementptr inbounds i32, i32* %11, i64 %13
%15 = load i32, i32* %14
%16 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %15)
br label %17
17: ; preds = %10
%18 = load i32, i32* %5
%19 = add nsw i32 %18, 1
store i32 %19, i32* %5
br label %6
20: ; preds = %6
%21 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.1, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@.str = [4 x i8] c"%4d\00"
define void @display(i32 %0, i32* nocapture %1) {
%3 = icmp sgt i32 %0, 0
br i1 %3, label %4, label %13
4: ; preds = %2
%5 = zext i32 %0 to i64
br label %6
6: ; preds = %4, %6
%7 = phi i64 [ 0, %4 ], [ %11, %6 ]
%8 = getelementptr inbounds i32, i32* %1, i64 %7
%9 = load i32, i32* %8
%10 = tail call i32 (i8*, ...) @printf(i8* dereferenceable(1) getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i64 0, i64 0), i32 %9)
%11 = add nuw nsw i64 %7, 1
%12 = icmp eq i64 %11, %5
br i1 %12, label %13, label %6
13: ; preds = %6, %2
%14 = tail call i32 @putchar(i32 10)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ nanotest_runtest(int /*<<< orphan*/ *, int /*<<< orphan*/ *);
int main() { nanotest_runtest(NULL, NULL); }


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
xor    %eax,%eax
mov    %eax,%esi
mov    %rsi,%rdi
call   1030 <nanotest_runtest@plt>
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
xor    %edi,%edi
xor    %esi,%esi
call   1030 <nanotest_runtest@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = call i32 @nanotest_runtest(i32* null, i32* null)
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
%1 = tail call i32 @nanotest_runtest(i32* null, i32* null)
ret i32 0
}
/* Type definitions */
struct timespec {
  int dummy;
};

/* Variables and functions */
int FUTEX_PRIVATE_FLAG;
int FUTEX_WAIT;
int futex(int *, int, int, struct timespec const *, int /*<<< orphan*/ *,
          int /*<<< orphan*/);
int futex_wait(int *uaddr, int val, const struct timespec *timeout) {
  return futex(uaddr, FUTEX_WAIT | FUTEX_PRIVATE_FLAG, val, timeout, NULL, 0);
}


x86 assembly (clang, -O0):
<futex_wait>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    %rdx,-0x18(%rbp)
mov    -0x8(%rbp),%rdi
mov    0x2eba(%rip),%rax
mov    (%rax),%esi
mov    0x2ea1(%rip),%rax
or     (%rax),%esi
mov    -0xc(%rbp),%edx
mov    -0x18(%rbp),%rcx
xor    %eax,%eax
mov    %eax,%r8d
xor    %r9d,%r9d
call   1030 <futex@plt>
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<futex_wait>:
mov    %rdx,%rcx
mov    %esi,%edx
mov    0x2ecc(%rip),%rax
mov    0x2eb5(%rip),%rsi
mov    (%rsi),%esi
or     (%rax),%esi
xor    %r8d,%r8d
xor    %r9d,%r9d
jmp    1030 <futex@plt>

LLVM IR (-O0):
%struct.timespec = type { i32 }
@FUTEX_WAIT = global i32 0
@FUTEX_PRIVATE_FLAG = global i32 0
define i32 @futex_wait(i32* %0, i32 %1, %struct.timespec* %2) {
%4 = alloca i32*
%5 = alloca i32
%6 = alloca %struct.timespec*
store i32* %0, i32** %4
store i32 %1, i32* %5
store %struct.timespec* %2, %struct.timespec** %6
%7 = load i32*, i32** %4
%8 = load i32, i32* @FUTEX_WAIT
%9 = load i32, i32* @FUTEX_PRIVATE_FLAG
%10 = or i32 %8, %9
%11 = load i32, i32* %5
%12 = load %struct.timespec*, %struct.timespec** %6
%13 = call i32 @futex(i32* %7, i32 %10, i32 %11, %struct.timespec* %12, i32* null, i32 0)
ret i32 %13
}

LLVM IR (-O2):
%struct.timespec = type { i32 }
@FUTEX_WAIT = global i32 0
@FUTEX_PRIVATE_FLAG = global i32 0
define i32 @futex_wait(i32* %0, i32 %1, %struct.timespec* %2) {
%4 = load i32, i32* @FUTEX_WAIT
%5 = load i32, i32* @FUTEX_PRIVATE_FLAG
%6 = or i32 %5, %4
%7 = tail call i32 @futex(i32* %0, i32 %6, i32 %1, %struct.timespec* %2, i32* null, i32 0)
ret i32 %7
}
void google_read(void) {}


x86 assembly (clang, -O0):
<google_read>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<google_read>:
ret

LLVM IR (-O0):
define void @google_read() {
ret void
}

LLVM IR (-O2):
define void @google_read() {
ret void
}
int maxLine(void) { return 8; }


x86 assembly (clang, -O0):
<maxLine>:
push   %rbp
mov    %rsp,%rbp
mov    $0x8,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<maxLine>:
mov    $0x8,%eax
ret

LLVM IR (-O0):
define i32 @maxLine() {
ret i32 8
}

LLVM IR (-O2):
define i32 @maxLine() {
ret i32 8
}
void *wtypePtr_clone(const void *element) { return (void *)element; }


x86 assembly (clang, -O0):
<wtypePtr_clone>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rax
pop    %rbp
ret

x86 assembly (clang, -O2):
<wtypePtr_clone>:
mov    %rdi,%rax
ret

LLVM IR (-O0):
define i8* @wtypePtr_clone(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
ret i8* %3
}

LLVM IR (-O2):
define i8* @wtypePtr_clone(i8* readnone returned %0) {
ret i8* %0
}
void omp_set_dynamic(int _Dynamic_threads) {}


x86 assembly (clang, -O0):
<omp_set_dynamic>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<omp_set_dynamic>:
ret

LLVM IR (-O0):
define void @omp_set_dynamic(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
ret void
}

LLVM IR (-O2):
define void @omp_set_dynamic(i32 %0) {
ret void
}
void config_vpr(void) {}


x86 assembly (clang, -O0):
<config_vpr>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<config_vpr>:
ret

LLVM IR (-O0):
define void @config_vpr() {
ret void
}

LLVM IR (-O2):
define void @config_vpr() {
ret void
}
/* Variables and functions */
int factorial(int);
int /*<<< orphan*/ printf(char *, int);
int /*<<< orphan*/ scanf(char *, int *);
int main() {
  int n;
  scanf("%d", &n);
  printf("%d\n", factorial(n));
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
lea    0xeba(%rip),%rdi
lea    -0x8(%rbp),%rsi
call   1050 <scanf@plt>
mov    -0x8(%rbp),%edi
call   1030 <factorial@plt>
mov    %eax,%esi
lea    0xea3(%rip),%rdi
call   1040 <printf@plt>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
lea    0xec8(%rip),%rdi
lea    0x4(%rsp),%rsi
call   1050 <scanf@plt>
mov    0x4(%rsp),%edi
call   1030 <factorial@plt>
lea    0xeb1(%rip),%rdi
mov    %eax,%esi
call   1040 <printf@plt>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %2)
%4 = load i32, i32* %2
%5 = call i32 @factorial(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 0
}

LLVM IR (-O2):
@.str = [3 x i8] c"%d\00"
@.str.1 = [4 x i8] c"%d\0A\00"
define i32 @main() {
%1 = alloca i32
%2 = bitcast i32* %1 to i8*
%3 = call i32 @scanf(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i64 0, i64 0), i32* %1)
%4 = load i32, i32* %1
%5 = call i32 @factorial(i32 %4)
%6 = call i32 @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 %5)
ret i32 0
}
/* Variables and functions */
int strlen(char *);
int verificaEmail(char *email) {
  int tamMail = strlen(email);
  if (email == NULL || tamMail == 0 || tamMail >= 80)
    return 0;
  return 1;
}


x86 assembly (clang, -O0):
<verificaEmail>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x10(%rbp)
mov    -0x10(%rbp),%rdi
call   1030 <strlen@plt>
mov    %eax,-0x14(%rbp)
cmpq   $0x0,-0x10(%rbp)
je     1147 <verificaEmail+0x37>
cmpl   $0x0,-0x14(%rbp)
je     1147 <verificaEmail+0x37>
cmpl   $0x50,-0x14(%rbp)
jl     1153 <verificaEmail+0x43>
movl   $0x0,-0x4(%rbp)
jmp    115a <verificaEmail+0x4a>
movl   $0x1,-0x4(%rbp)
mov    -0x4(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<verificaEmail>:
push   %rbx
mov    %rdi,%rbx
call   1030 <strlen@plt>
test   %rbx,%rbx
setne  %cl
test   %eax,%eax
setne  %dl
and    %cl,%dl
cmp    $0x50,%eax
setl   %al
and    %dl,%al
movzbl %al,%eax
pop    %rbx
ret

LLVM IR (-O0):
define i32 @verificaEmail(i8* %0) {
%2 = alloca i32
%3 = alloca i8*
%4 = alloca i32
store i8* %0, i8** %3
%5 = load i8*, i8** %3
%6 = call i32 @strlen(i8* %5)
store i32 %6, i32* %4
%7 = load i8*, i8** %3
%8 = icmp eq i8* %7, null
br i1 %8, label %15, label %9
9: ; preds = %1
%10 = load i32, i32* %4
%11 = icmp eq i32 %10, 0
br i1 %11, label %15, label %12
12: ; preds = %9
%13 = load i32, i32* %4
%14 = icmp sge i32 %13, 80
br i1 %14, label %15, label %16
15: ; preds = %12, %9, %1
store i32 0, i32* %2
br label %17
16: ; preds = %12
store i32 1, i32* %2
br label %17
17: ; preds = %16, %15
%18 = load i32, i32* %2
ret i32 %18
}

LLVM IR (-O2):
define i32 @verificaEmail(i8* %0) {
%2 = tail call i32 @strlen(i8* %0)
%3 = icmp ne i8* %0, null
%4 = icmp ne i32 %2, 0
%5 = select i1 %3, i1 %4, i1 false
%6 = icmp slt i32 %2, 80
%7 = select i1 %5, i1 %6, i1 false
%8 = zext i1 %7 to i32
ret i32 %8
}
double Clamp_ab_double(double ab) {
  if (ab < -128)
    ab = -128.0;
  if (ab > +127.9961)
    ab = +127.9961;
  return ab;
}


x86 assembly (clang, -O0):
<Clamp_ab_double>:
push   %rbp
mov    %rsp,%rbp
movsd  %xmm0,-0x8(%rbp)
movsd  0xeef(%rip),%xmm0
ucomisd -0x8(%rbp),%xmm0
jbe    1129 <Clamp_ab_double+0x29>
movsd  0xedc(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
movsd  0xed2(%rip),%xmm1
ucomisd %xmm1,%xmm0
jbe    114d <Clamp_ab_double+0x4d>
movsd  0xec0(%rip),%xmm0
movsd  %xmm0,-0x8(%rbp)
movsd  -0x8(%rbp),%xmm0
pop    %rbp
ret

x86 assembly (clang, -O2):
<Clamp_ab_double>:
movsd  0xef8(%rip),%xmm1
maxsd  %xmm0,%xmm1
movsd  0xef4(%rip),%xmm0
minsd  %xmm1,%xmm0
ret

LLVM IR (-O0):
define double @Clamp_ab_double(double %0) {
%2 = alloca double
store double %0, double* %2
%3 = load double, double* %2
%4 = fcmp olt double %3, -1.280000e+02
br i1 %4, label %5, label %6
5: ; preds = %1
store double -1.280000e+02, double* %2
br label %6
6: ; preds = %5, %1
%7 = load double, double* %2
%8 = fcmp ogt double %7, 0x405FFFC01A36E2EB
br i1 %8, label %9, label %10
9: ; preds = %6
store double 0x405FFFC01A36E2EB, double* %2
br label %10
10: ; preds = %9, %6
%11 = load double, double* %2
ret double %11
}

LLVM IR (-O2):
define double @Clamp_ab_double(double %0) {
%2 = fcmp olt double %0, -1.280000e+02
%3 = select i1 %2, double -1.280000e+02, double %0
%4 = fcmp ogt double %3, 0x405FFFC01A36E2EB
%5 = select i1 %4, double 0x405FFFC01A36E2EB, double %3
ret double %5
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ perror(char *);
void perror_exit(char *s) {
  perror(s);
  exit(-1);
}


x86 assembly (clang, -O0):
<perror_exit>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<perror_exit>:
push   %rax
call   1030 <perror@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
define void @perror_exit(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
define void @perror_exit(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = tail call i32 @exit(i32 -1)
unreachable
}
/* Variables and functions */
long xatoll(char const *);
__attribute__((always_)) long xatol(const char *str) { return xatoll(str); }


x86 assembly (clang, -O0):
<xatol>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <xatoll@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<xatol>:
jmp    1030 <xatoll@plt>

LLVM IR (-O0):
define i64 @xatol(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i64 @xatoll(i8* %3)
ret i64 %4
}

LLVM IR (-O2):
define i64 @xatol(i8* %0) {
%2 = tail call i64 @xatoll(i8* %0)
ret i64 %2
}
/* Type definitions */
typedef int /*<<< orphan*/ pthread_mutex_t;

/* Variables and functions */
int /*<<< orphan*/ pthread_mutex_lock(int /*<<< orphan*/ *);
void lockmutex(pthread_mutex_t *mutex) {
  if (mutex)
    (void)pthread_mutex_lock(mutex);
}


x86 assembly (clang, -O0):
<lockmutex>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
cmpq   $0x0,-0x8(%rbp)
je     1130 <lockmutex+0x20>
mov    -0x8(%rbp),%rdi
call   1030 <pthread_mutex_lock@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lockmutex>:
test   %rdi,%rdi
je     111a <lockmutex+0xa>
jmp    1030 <pthread_mutex_lock@plt>
ret

LLVM IR (-O0):
define void @lockmutex(i32* %0) {
%2 = alloca i32*
store i32* %0, i32** %2
%3 = load i32*, i32** %2
%4 = icmp ne i32* %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32*, i32** %2
%7 = call i32 @pthread_mutex_lock(i32* %6)
br label %8
8: ; preds = %5, %1
ret void
}

LLVM IR (-O2):
define void @lockmutex(i32* %0) {
%2 = icmp eq i32* %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @pthread_mutex_lock(i32* %0)
br label %5
5: ; preds = %3, %1
ret void
}
/* Variables and functions */
int /*<<< orphan*/ assert(int);
long next_pentagonal_num();
void next_pentagonal_num_test(void) {
  long num = 0;
  for (size_t i = 0; i < 10; i++)
    num = next_pentagonal_num();
  assert(num == 145);
}


x86 assembly (clang, -O0):
<next_pentagonal_num_test>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movq   $0x0,-0x8(%rbp)
movq   $0x0,-0x10(%rbp)
cmpq   $0xa,-0x10(%rbp)
jae    115f <next_pentagonal_num_test+0x3f>
mov    $0x0,%al
call   1040 <next_pentagonal_num@plt>
mov    %rax,-0x8(%rbp)
mov    -0x10(%rbp),%rax
add    $0x1,%rax
mov    %rax,-0x10(%rbp)
jmp    1138 <next_pentagonal_num_test+0x18>
cmpq   $0x91,-0x8(%rbp)
sete   %al
and    $0x1,%al
movzbl %al,%edi
call   1030 <assert@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<next_pentagonal_num_test>:
push   %rax
xor    %eax,%eax
call   1040 <next_pentagonal_num@plt>
xor    %eax,%eax
call   1040 <next_pentagonal_num@plt>
xor    %eax,%eax
call   1040 <next_pentagonal_num@plt>
xor    %eax,%eax
call   1040 <next_pentagonal_num@plt>
xor    %eax,%eax
call   1040 <next_pentagonal_num@plt>
xor    %eax,%eax
call   1040 <next_pentagonal_num@plt>
xor    %eax,%eax
call   1040 <next_pentagonal_num@plt>
xor    %eax,%eax
call   1040 <next_pentagonal_num@plt>
xor    %eax,%eax
call   1040 <next_pentagonal_num@plt>
xor    %eax,%eax
call   1040 <next_pentagonal_num@plt>
xor    %edi,%edi
cmp    $0x91,%rax
sete   %dil
pop    %rax
jmp    1030 <assert@plt>

LLVM IR (-O0):
define void @next_pentagonal_num_test() {
%1 = alloca i64
%2 = alloca i64
store i64 0, i64* %1
store i64 0, i64* %2
br label %3
3: ; preds = %8, %0
%4 = load i64, i64* %2
%5 = icmp ult i64 %4, 10
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = call i64 (...) @next_pentagonal_num()
store i64 %7, i64* %1
br label %8
8: ; preds = %6
%9 = load i64, i64* %2
%10 = add i64 %9, 1
store i64 %10, i64* %2
br label %3
11: ; preds = %3
%12 = load i64, i64* %1
%13 = icmp eq i64 %12, 145
%14 = zext i1 %13 to i32
%15 = call i32 @assert(i32 %14)
ret void
}

LLVM IR (-O2):
define void @next_pentagonal_num_test() {
%1 = tail call i64 (...) @next_pentagonal_num()
%2 = tail call i64 (...) @next_pentagonal_num()
%3 = tail call i64 (...) @next_pentagonal_num()
%4 = tail call i64 (...) @next_pentagonal_num()
%5 = tail call i64 (...) @next_pentagonal_num()
%6 = tail call i64 (...) @next_pentagonal_num()
%7 = tail call i64 (...) @next_pentagonal_num()
%8 = tail call i64 (...) @next_pentagonal_num()
%9 = tail call i64 (...) @next_pentagonal_num()
%10 = tail call i64 (...) @next_pentagonal_num()
%11 = icmp eq i64 %10, 145
%12 = zext i1 %11 to i32
%13 = tail call i32 @assert(i32 %12)
ret void
}
void draw_bug(int x, int y) {}


x86 assembly (clang, -O0):
<draw_bug>:
push   %rbp
mov    %rsp,%rbp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<draw_bug>:
ret

LLVM IR (-O0):
define void @draw_bug(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
ret void
}

LLVM IR (-O2):
define void @draw_bug(i32 %0, i32 %1) {
ret void
}
/* Variables and functions */
int /*<<< orphan*/ HplMsp430GeneralIOP__47__IO__selectIOFunc();
void Msp430Adc12ImplP__Port67__selectIOFunc(void) {
  HplMsp430GeneralIOP__47__IO__selectIOFunc();
}


x86 assembly (clang, -O0):
<Msp430Adc12ImplP__Port67__selectIOFunc>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <HplMsp430GeneralIOP__47__IO__selectIOFunc@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Msp430Adc12ImplP__Port67__selectIOFunc>:
xor    %eax,%eax
jmp    1030 <HplMsp430GeneralIOP__47__IO__selectIOFunc@plt>

LLVM IR (-O0):
define void @Msp430Adc12ImplP__Port67__selectIOFunc() {
%1 = call i32 (...) @HplMsp430GeneralIOP__47__IO__selectIOFunc()
ret void
}

LLVM IR (-O2):
define void @Msp430Adc12ImplP__Port67__selectIOFunc() {
%1 = tail call i32 (...) @HplMsp430GeneralIOP__47__IO__selectIOFunc()
ret void
}
void opt_fini(struct mm *mm) {}


x86 assembly (clang, -O0):
<opt_fini>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
pop    %rbp
ret

x86 assembly (clang, -O2):
<opt_fini>:
ret

LLVM IR (-O0):
%struct.mm = type opaque
define void @opt_fini(%struct.mm* %0) {
%2 = alloca %struct.mm*
store %struct.mm* %0, %struct.mm** %2
ret void
}

LLVM IR (-O2):
%struct.mm = type opaque
define void @opt_fini(%struct.mm* nocapture %0) {
ret void
}
/* Variables and functions */
int create(char *, int);
int make_dir(char *path_arg) { return create(path_arg, 1); }


x86 assembly (clang, -O0):
<make_dir>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <create@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<make_dir>:
mov    $0x1,%esi
jmp    1030 <create@plt>

LLVM IR (-O0):
define i32 @make_dir(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @create(i8* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @make_dir(i8* %0) {
%2 = tail call i32 @create(i8* %0, i32 1)
ret i32 %2
}
/* Variables and functions */
int choose_menue();
int main() {
  int shutdown;
  do {
    shutdown = choose_menue();
  } while (shutdown == 0);
  return 0;
}


x86 assembly (clang, -O0):
<main>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
movl   $0x0,-0x4(%rbp)
mov    $0x0,%al
call   1030 <choose_menue@plt>
mov    %eax,-0x8(%rbp)
cmpl   $0x0,-0x8(%rbp)
je     111f <main+0xf>
xor    %eax,%eax
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<main>:
push   %rax
cs nopw 0x0(%rax,%rax,1)
nopl   0x0(%rax,%rax,1)
xor    %eax,%eax
call   1030 <choose_menue@plt>
test   %eax,%eax
je     1120 <main+0x10>
xor    %eax,%eax
pop    %rcx
ret

LLVM IR (-O0):
define i32 @main() {
%1 = alloca i32
%2 = alloca i32
store i32 0, i32* %1
br label %3
3: ; preds = %5, %0
%4 = call i32 (...) @choose_menue()
store i32 %4, i32* %2
br label %5
5: ; preds = %3
%6 = load i32, i32* %2
%7 = icmp eq i32 %6, 0
br i1 %7, label %3, label %8
8: ; preds = %5
ret i32 0
}

LLVM IR (-O2):
define i32 @main() {
br label %1
1: ; preds = %1, %0
%2 = tail call i32 (...) @choose_menue()
%3 = icmp eq i32 %2, 0
br i1 %3, label %1, label %4
4: ; preds = %1
ret i32 0
}
int packet_parse_tilepart(struct packet_t *p, void *data, int length) {
  return 0;
}


x86 assembly (clang, -O0):
<packet_parse_tilepart>:
push   %rbp
mov    %rsp,%rbp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    %edx,-0x14(%rbp)
xor    %eax,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<packet_parse_tilepart>:
xor    %eax,%eax
ret

LLVM IR (-O0):
%struct.packet_t = type opaque
define i32 @packet_parse_tilepart(%struct.packet_t* %0, i8* %1, i32 %2) {
%4 = alloca %struct.packet_t*
%5 = alloca i8*
%6 = alloca i32
store %struct.packet_t* %0, %struct.packet_t** %4
store i8* %1, i8** %5
store i32 %2, i32* %6
ret i32 0
}

LLVM IR (-O2):
%struct.packet_t = type opaque
define i32 @packet_parse_tilepart(%struct.packet_t* nocapture readnone %0, i8* nocapture readnone %1, i32 %2) {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ Reserved60_DriverIRQHandler();
__attribute__((weak)) void Reserved60_IRQHandler(void) {
  Reserved60_DriverIRQHandler();
}


x86 assembly (clang, -O0):
<Reserved60_IRQHandler>:
push   %rbp
mov    %rsp,%rbp
mov    $0x0,%al
call   1030 <Reserved60_DriverIRQHandler@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<Reserved60_IRQHandler>:
xor    %eax,%eax
jmp    1030 <Reserved60_DriverIRQHandler@plt>

LLVM IR (-O0):
define weak void @Reserved60_IRQHandler() {
%1 = call i32 (...) @Reserved60_DriverIRQHandler()
ret void
}

LLVM IR (-O2):
define weak void @Reserved60_IRQHandler() {
%1 = tail call i32 (...) @Reserved60_DriverIRQHandler()
ret void
}
/* Variables and functions */
int /*<<< orphan*/ xil_printf(char *, unsigned int, unsigned int, unsigned int);
void _decode_sched_status(unsigned int status) {
  unsigned int queued;
  unsigned int next;
  unsigned int prior;
  queued = ((status >> 31) & 0x00000001);
  next = ((status >> 23) & 0x000000FF);
  prior = ((status >> 16) & 0x0000007F);
  xil_printf("\tSched - (QUE=0x%2.2x) (NXT=0x%2.2x) (PRI=0x%2.2x)\n", queued,
             next, prior);
}


x86 assembly (clang, -O0):
<_decode_sched_status>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x1f,%eax
and    $0x1,%eax
mov    %eax,-0x8(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x17,%eax
and    $0xff,%eax
mov    %eax,-0xc(%rbp)
mov    -0x4(%rbp),%eax
shr    $0x10,%eax
and    $0x7f,%eax
mov    %eax,-0x10(%rbp)
mov    -0x8(%rbp),%esi
mov    -0xc(%rbp),%edx
mov    -0x10(%rbp),%ecx
lea    0xeaf(%rip),%rdi
call   1030 <xil_printf@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_decode_sched_status>:
mov    %edi,%ecx
mov    %edi,%esi
shr    $0x1f,%esi
mov    %edi,%eax
shr    $0x17,%eax
movzbl %al,%edx
shr    $0x10,%ecx
and    $0x7f,%ecx
lea    0xed4(%rip),%rdi
jmp    1030 <xil_printf@plt>

LLVM IR (-O0):
@.str = [52 x i8] c"\09Sched - (QUE=0x%2.2x) (NXT=0x%2.2x) (PRI=0x%2.2x)\0A\00"
define void @_decode_sched_status(i32 %0) {
%2 = alloca i32
%3 = alloca i32
%4 = alloca i32
%5 = alloca i32
store i32 %0, i32* %2
%6 = load i32, i32* %2
%7 = lshr i32 %6, 31
%8 = and i32 %7, 1
store i32 %8, i32* %3
%9 = load i32, i32* %2
%10 = lshr i32 %9, 23
%11 = and i32 %10, 255
store i32 %11, i32* %4
%12 = load i32, i32* %2
%13 = lshr i32 %12, 16
%14 = and i32 %13, 127
store i32 %14, i32* %5
%15 = load i32, i32* %3
%16 = load i32, i32* %4
%17 = load i32, i32* %5
%18 = call i32 @xil_printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0), i32 %15, i32 %16, i32 %17)
ret void
}

LLVM IR (-O2):
@.str = [52 x i8] c"\09Sched - (QUE=0x%2.2x) (NXT=0x%2.2x) (PRI=0x%2.2x)\0A\00"
define void @_decode_sched_status(i32 %0) {
%2 = lshr i32 %0, 31
%3 = lshr i32 %0, 23
%4 = and i32 %3, 255
%5 = lshr i32 %0, 16
%6 = and i32 %5, 127
%7 = tail call i32 @xil_printf(i8* getelementptr inbounds ([52 x i8], [52 x i8]* @.str, i64 0, i64 0), i32 %2, i32 %4, i32 %6)
ret void
}
void libera_espacio(void) {}


x86 assembly (clang, -O0):
<libera_espacio>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<libera_espacio>:
ret

LLVM IR (-O0):
define void @libera_espacio() {
ret void
}

LLVM IR (-O2):
define void @libera_espacio() {
ret void
}
/* Type definitions */
typedef int uint32_t;
typedef scalar_t__ time_t;
typedef int /*<<< orphan*/ out_msg;

/* Variables and functions */
scalar_t__ _xmit(char *);
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ snprintf(char *, int, char *, int, long);
scalar_t__ time(int /*<<< orphan*/ *);
void _resume_job(long my_job_id) {
  time_t now = time(NULL);
  char out_msg[128];
  snprintf(out_msg, sizeof(out_msg), "TS=%u AUTH=root DT=CMD=RESUMEJOB ARG=%ld",
           (uint32_t)now, my_job_id);
  if (_xmit(out_msg))
    exit(1);
}


x86 assembly (clang, -O0):
<_resume_job>:
push   %rbp
mov    %rsp,%rbp
sub    $0x90,%rsp
mov    %rdi,-0x8(%rbp)
xor    %eax,%eax
mov    %eax,%edi
call   1050 <time@plt>
mov    %rax,-0x10(%rbp)
lea    -0x90(%rbp),%rdi
mov    -0x10(%rbp),%rax
mov    %eax,%ecx
mov    -0x8(%rbp),%r8
mov    $0x80,%esi
lea    0xe87(%rip),%rdx
call   1030 <snprintf@plt>
lea    -0x90(%rbp),%rdi
call   1040 <_xmit@plt>
cmp    $0x0,%rax
je     119e <_resume_job+0x5e>
mov    $0x1,%edi
call   1060 <exit@plt>
add    $0x90,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<_resume_job>:
push   %r14
push   %rbx
sub    $0x88,%rsp
mov    %rdi,%rbx
xor    %edi,%edi
call   1050 <time@plt>
lea    0xea5(%rip),%rdx
mov    %rsp,%r14
mov    %r14,%rdi
mov    $0x80,%esi
mov    %eax,%ecx
mov    %rbx,%r8
call   1030 <snprintf@plt>
mov    %r14,%rdi
call   1040 <_xmit@plt>
test   %rax,%rax
jne    1188 <_resume_job+0x48>
add    $0x88,%rsp
pop    %rbx
pop    %r14
ret
mov    $0x1,%edi
call   1060 <exit@plt>

LLVM IR (-O0):
@.str = [41 x i8] c"TS=%u AUTH=root DT=CMD=RESUMEJOB ARG=%ld\00"
define void @_resume_job(i64 %0) {
%2 = alloca i64
%3 = alloca i64
%4 = alloca [128 x i8]
store i64 %0, i64* %2
%5 = call i64 @time(i32* null)
store i64 %5, i64* %3
%6 = getelementptr inbounds [128 x i8], [128 x i8]* %4, i64 0, i64 0
%7 = load i64, i64* %3
%8 = trunc i64 %7 to i32
%9 = load i64, i64* %2
%10 = call i32 @snprintf(i8* %6, i32 128, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %8, i64 %9)
%11 = getelementptr inbounds [128 x i8], [128 x i8]* %4, i64 0, i64 0
%12 = call i64 @_xmit(i8* %11)
%13 = icmp ne i64 %12, 0
br i1 %13, label %14, label %16
14: ; preds = %1
%15 = call i32 @exit(i32 1)
unreachable
16: ; preds = %1
ret void
}

LLVM IR (-O2):
@.str = [41 x i8] c"TS=%u AUTH=root DT=CMD=RESUMEJOB ARG=%ld\00"
define void @_resume_job(i64 %0) {
%2 = alloca [128 x i8]
%3 = tail call i64 @time(i32* null)
%4 = getelementptr inbounds [128 x i8], [128 x i8]* %2, i64 0, i64 0
%5 = trunc i64 %3 to i32
%6 = call i32 @snprintf(i8* %4, i32 128, i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i32 %5, i64 %0)
%7 = call i64 @_xmit(i8* %4)
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %1
%10 = call i32 @exit(i32 1)
unreachable
11: ; preds = %1
ret void
}
/* Variables and functions */
int U_PMR_NODATAREC_print(char const *);
int U_PMR_MULTIFORMATSECTION_print(const char *contents) {
  return (U_PMR_NODATAREC_print(contents));
}


x86 assembly (clang, -O0):
<U_PMR_MULTIFORMATSECTION_print>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <U_PMR_NODATAREC_print@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<U_PMR_MULTIFORMATSECTION_print>:
jmp    1030 <U_PMR_NODATAREC_print@plt>

LLVM IR (-O0):
define i32 @U_PMR_MULTIFORMATSECTION_print(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @U_PMR_NODATAREC_print(i8* %3)
ret i32 %4
}

LLVM IR (-O2):
define i32 @U_PMR_MULTIFORMATSECTION_print(i8* %0) {
%2 = tail call i32 @U_PMR_NODATAREC_print(i8* %0)
ret i32 %2
}
void ff_hevc_put_hevc_bi_w_epel_v16_10_sse4() {}


x86 assembly (clang, -O0):
<ff_hevc_put_hevc_bi_w_epel_v16_10_sse4>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<ff_hevc_put_hevc_bi_w_epel_v16_10_sse4>:
ret

LLVM IR (-O0):
define void @ff_hevc_put_hevc_bi_w_epel_v16_10_sse4() {
ret void
}

LLVM IR (-O2):
define void @ff_hevc_put_hevc_bi_w_epel_v16_10_sse4() {
ret void
}
/* Type definitions */
typedef int /*<<< orphan*/ uint32_t;

/* Variables and functions */
int /*<<< orphan*/ phaseInc(int /*<<< orphan*/);
int /*<<< orphan*/ setMem(int, int /*<<< orphan*/);
void setTxFreq(uint32_t f) { setMem(0x50000004, phaseInc(f)); }


x86 assembly (clang, -O0):
<setTxFreq>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    -0x4(%rbp),%edi
call   1040 <phaseInc@plt>
mov    %eax,%esi
mov    $0x50000004,%edi
call   1030 <setMem@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<setTxFreq>:
push   %rax
call   1040 <phaseInc@plt>
mov    $0x50000004,%edi
mov    %eax,%esi
pop    %rax
jmp    1030 <setMem@plt>

LLVM IR (-O0):
define void @setTxFreq(i32 %0) {
%2 = alloca i32
store i32 %0, i32* %2
%3 = load i32, i32* %2
%4 = call i32 @phaseInc(i32 %3)
%5 = call i32 @setMem(i32 1342177284, i32 %4)
ret void
}

LLVM IR (-O2):
define void @setTxFreq(i32 %0) {
%2 = tail call i32 @phaseInc(i32 %0)
%3 = tail call i32 @setMem(i32 1342177284, i32 %2)
ret void
}
/* Variables and functions */
int get_seq_num(int);
int seq_add(int n1, int n2) { return get_seq_num(n1 + n2); }


x86 assembly (clang, -O0):
<seq_add>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %edi,-0x4(%rbp)
mov    %esi,-0x8(%rbp)
mov    -0x4(%rbp),%edi
add    -0x8(%rbp),%edi
call   1030 <get_seq_num@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<seq_add>:
add    %esi,%edi
jmp    1030 <get_seq_num@plt>

LLVM IR (-O0):
define i32 @seq_add(i32 %0, i32 %1) {
%3 = alloca i32
%4 = alloca i32
store i32 %0, i32* %3
store i32 %1, i32* %4
%5 = load i32, i32* %3
%6 = load i32, i32* %4
%7 = add nsw i32 %5, %6
%8 = call i32 @get_seq_num(i32 %7)
ret i32 %8
}

LLVM IR (-O2):
define i32 @seq_add(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
%4 = tail call i32 @get_seq_num(i32 %3)
ret i32 %4
}
/* Variables and functions */
int /*<<< orphan*/ RDoSQ(int);
void RDoSQ2(void) { RDoSQ(1); }


x86 assembly (clang, -O0):
<RDoSQ2>:
push   %rbp
mov    %rsp,%rbp
mov    $0x1,%edi
call   1030 <RDoSQ@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<RDoSQ2>:
mov    $0x1,%edi
jmp    1030 <RDoSQ@plt>

LLVM IR (-O0):
define void @RDoSQ2() {
%1 = call i32 @RDoSQ(i32 1)
ret void
}

LLVM IR (-O2):
define void @RDoSQ2() {
%1 = tail call i32 @RDoSQ(i32 1)
ret void
}
/* Variables and functions */
int has_feat_ext(char const *, int);
int has_extension(const char *nam) { return has_feat_ext(nam, 1); }


x86 assembly (clang, -O0):
<has_extension>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
mov    $0x1,%esi
call   1030 <has_feat_ext@plt>
add    $0x10,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<has_extension>:
mov    $0x1,%esi
jmp    1030 <has_feat_ext@plt>

LLVM IR (-O0):
define i32 @has_extension(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @has_feat_ext(i8* %3, i32 1)
ret i32 %4
}

LLVM IR (-O2):
define i32 @has_extension(i8* %0) {
%2 = tail call i32 @has_feat_ext(i8* %0, i32 1)
ret i32 %2
}
void rwsem_downgrade_wake(void) { nsc_assert(0, __func__); }


x86 assembly (clang, -O0):
<rwsem_downgrade_wake>:
push   %rbp
mov    %rsp,%rbp
xor    %edi,%edi
lea    0xee3(%rip),%rsi
mov    $0x0,%al
call   1030 <nsc_assert@plt>
pop    %rbp
ret

x86 assembly (clang, -O2):
<rwsem_downgrade_wake>:
lea    0xee9(%rip),%rsi
xor    %edi,%edi
xor    %eax,%eax
jmp    1030 <nsc_assert@plt>

LLVM IR (-O0):
@__func__.rwsem_downgrade_wake = [21 x i8] c"rwsem_downgrade_wake\00"
define void @rwsem_downgrade_wake() {
%1 = call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @__func__.rwsem_downgrade_wake, i64 0, i64 0))
ret void
}

LLVM IR (-O2):
@__func__.rwsem_downgrade_wake = [21 x i8] c"rwsem_downgrade_wake\00"
define void @rwsem_downgrade_wake() {
%1 = tail call i32 (i32, i8*, ...) bitcast (i32 (...)* @nsc_assert to i32 (i32, i8*, ...)*)(i32 0, i8* getelementptr inbounds ([21 x i8], [21 x i8]* @__func__.rwsem_downgrade_wake, i64 0, i64 0))
ret void
}
int fun826() { return 826; }


x86 assembly (clang, -O0):
<fun826>:
push   %rbp
mov    %rsp,%rbp
mov    $0x33a,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<fun826>:
mov    $0x33a,%eax
ret

LLVM IR (-O0):
define i32 @fun826() {
ret i32 826
}

LLVM IR (-O2):
define i32 @fun826() {
ret i32 826
}
/* Variables and functions */
int /*<<< orphan*/ recursive_sort(int *, int *, int /*<<< orphan*/, int);
void mergesort_r(int a[], int length) {
  int aux[length];
  recursive_sort(a, aux, 0, length - 1);
}


x86 assembly (clang, -O0):
<mergesort_r>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %esi,-0xc(%rbp)
mov    -0xc(%rbp),%eax
mov    %rsp,%rcx
mov    %rcx,-0x18(%rbp)
lea    0xf(,%rax,4),%rcx
and    $0xfffffffffffffff0,%rcx
mov    %rsp,%rsi
sub    %rcx,%rsi
mov    %rsi,%rsp
mov    %rax,-0x20(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0xc(%rbp),%ecx
sub    $0x1,%ecx
xor    %edx,%edx
call   1030 <recursive_sort@plt>
mov    -0x18(%rbp),%rax
mov    %rax,%rsp
mov    %rbp,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<mergesort_r>:
push   %rbp
mov    %rsp,%rbp
mov    %esi,%ecx
mov    %rsp,%rax
lea    0xf(,%rcx,4),%rcx
and    $0xfffffffffffffff0,%rcx
sub    %rcx,%rax
mov    %rax,%rsp
lea    -0x1(%rsi),%ecx
mov    %rax,%rsi
xor    %edx,%edx
call   1030 <recursive_sort@plt>
mov    %rbp,%rsp
pop    %rbp
ret

LLVM IR (-O0):
define void @mergesort_r(i32* %0, i32 %1) {
%3 = alloca i32*
%4 = alloca i32
%5 = alloca i8*
%6 = alloca i64
store i32* %0, i32** %3
store i32 %1, i32* %4
%7 = load i32, i32* %4
%8 = zext i32 %7 to i64
%9 = call i8* @llvm.stacksave()
store i8* %9, i8** %5
%10 = alloca i32, i64 %8
store i64 %8, i64* %6
%11 = load i32*, i32** %3
%12 = load i32, i32* %4
%13 = sub nsw i32 %12, 1
%14 = call i32 @recursive_sort(i32* %11, i32* %10, i32 0, i32 %13)
%15 = load i8*, i8** %5
ret void
}

LLVM IR (-O2):
define void @mergesort_r(i32* %0, i32 %1) {
%3 = zext i32 %1 to i64
%4 = alloca i32, i64 %3
%5 = add nsw i32 %1, -1
%6 = call i32 @recursive_sort(i32* %0, i32* %4, i32 0, i32 %5)
ret void
}
/* Variables and functions */
int /*<<< orphan*/ EXIT_FAILURE;
int /*<<< orphan*/ exit(int /*<<< orphan*/);
int /*<<< orphan*/ perror(char *);
void handle_fatal_error(char message[]) {
  perror(message);
  exit(EXIT_FAILURE);
}


x86 assembly (clang, -O0):
<handle_fatal_error>:
push   %rbp
mov    %rsp,%rbp
sub    $0x10,%rsp
mov    %rdi,-0x8(%rbp)
mov    -0x8(%rbp),%rdi
call   1030 <perror@plt>
mov    0x2ea4(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<handle_fatal_error>:
push   %rax
call   1030 <perror@plt>
mov    0x2eb3(%rip),%rax
mov    (%rax),%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@EXIT_FAILURE = global i32 0
define void @handle_fatal_error(i8* %0) {
%2 = alloca i8*
store i8* %0, i8** %2
%3 = load i8*, i8** %2
%4 = call i32 @perror(i8* %3)
%5 = load i32, i32* @EXIT_FAILURE
%6 = call i32 @exit(i32 %5)
unreachable
}

LLVM IR (-O2):
@EXIT_FAILURE = global i32 0
define void @handle_fatal_error(i8* nocapture %0) {
%2 = tail call i32 @perror(i8* %0)
%3 = load i32, i32* @EXIT_FAILURE
%4 = tail call i32 @exit(i32 %3)
unreachable
}
__attribute__((no, noclone)) unsigned __int128 t145_5sub(signed __int128 x) {
  unsigned __int128 r;
  if (__builtin_sub_overflow(x, (unsigned __int128)(0), &r))
    bar();
  return r;
}


x86 assembly (clang, -O0):
<t145_5sub>:
push   %rbp
mov    %rsp,%rbp
sub    $0x40,%rsp
mov    %rdi,-0x20(%rbp)
mov    %rsi,-0x18(%rbp)
mov    -0x20(%rbp),%rax
mov    -0x18(%rbp),%rcx
mov    %rcx,-0x28(%rbp)
mov    %rax,-0x30(%rbp)
mov    -0x30(%rbp),%rcx
mov    -0x28(%rbp),%rdx
mov    %rdx,%rax
shr    $0x3f,%rax
test   %rax,%rax
setne  %al
mov    %rdx,-0x38(%rbp)
mov    %rcx,-0x40(%rbp)
test   $0x1,%al
jne    115a <t145_5sub+0x4a>
jmp    1161 <t145_5sub+0x51>
mov    $0x0,%al
call   1030 <bar@plt>
mov    -0x40(%rbp),%rax
mov    -0x38(%rbp),%rcx
mov    %rcx,-0x8(%rbp)
mov    %rax,-0x10(%rbp)
mov    -0x10(%rbp),%rax
mov    -0x8(%rbp),%rdx
add    $0x40,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<t145_5sub>:
push   %r14
push   %rbx
push   %rax
mov    %rsi,%rbx
mov    %rdi,%r14
mov    %rsi,%rax
sar    $0x3f,%rax
je     112a <t145_5sub+0x1a>
xor    %eax,%eax
call   1030 <bar@plt>
mov    %r14,%rax
mov    %rbx,%rdx
add    $0x8,%rsp
pop    %rbx
pop    %r14
ret

LLVM IR (-O0):
define { i64, i64 } @t145_5sub(i64 %0, i64 %1) {
%3 = alloca i128
%4 = alloca i128
%5 = alloca i128
%6 = alloca i128
%7 = bitcast i128* %4 to { i64, i64 }*
%8 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 0
store i64 %0, i64* %8
%9 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %7, i32 0, i32 1
store i64 %1, i64* %9
%10 = load i128, i128* %4
store i128 %10, i128* %5
%11 = load i128, i128* %5
%12 = sext i128 %11 to i129
%13 = call { i129, i1 } @llvm.ssub.with.overflow.i129(i129 %12, i129 0)
%14 = extractvalue { i129, i1 } %13, 1
%15 = extractvalue { i129, i1 } %13, 0
%16 = trunc i129 %15 to i128
%17 = zext i128 %16 to i129
%18 = icmp ne i129 %15, %17
%19 = or i1 %14, %18
store i128 %16, i128* %6
br i1 %19, label %20, label %22
20: ; preds = %2
%21 = call i32 (...) @bar()
br label %22
22: ; preds = %20, %2
%23 = load i128, i128* %6
store i128 %23, i128* %3
%24 = bitcast i128* %3 to { i64, i64 }*
%25 = load { i64, i64 }, { i64, i64 }* %24
ret { i64, i64 } %25
}

LLVM IR (-O2):
define { i64, i64 } @t145_5sub(i64 %0, i64 %1) {
%3 = zext i64 %1 to i128
%4 = shl nuw i128 %3, 64
%5 = zext i64 %0 to i128
%6 = or i128 %4, %5
%7 = sext i128 %6 to i129
%8 = zext i128 %6 to i129
%9 = icmp eq i129 %7, %8
br i1 %9, label %12, label %10
10: ; preds = %2
%11 = tail call i32 (...) @bar()
br label %12
12: ; preds = %10, %2
%13 = insertvalue { i64, i64 } poison, i64 %0, 0
%14 = insertvalue { i64, i64 } %13, i64 %1, 1
ret { i64, i64 } %14
}
unsigned int MAKE_INDEX(short f, short i) { return (int)f << 16 | i; }


x86 assembly (clang, -O0):
<MAKE_INDEX>:
push   %rbp
mov    %rsp,%rbp
mov    %si,%ax
mov    %di,%cx
mov    %cx,-0x2(%rbp)
mov    %ax,-0x4(%rbp)
movswl -0x2(%rbp),%eax
shl    $0x10,%eax
movswl -0x4(%rbp),%ecx
or     %ecx,%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<MAKE_INDEX>:
mov    %edi,%eax
shl    $0x10,%eax
or     %esi,%eax
ret

LLVM IR (-O0):
define i32 @MAKE_INDEX(i16 signext %0, i16 signext %1) {
%3 = alloca i16
%4 = alloca i16
store i16 %0, i16* %3
store i16 %1, i16* %4
%5 = load i16, i16* %3
%6 = sext i16 %5 to i32
%7 = shl i32 %6, 16
%8 = load i16, i16* %4
%9 = sext i16 %8 to i32
%10 = or i32 %7, %9
ret i32 %10
}

LLVM IR (-O2):
define i32 @MAKE_INDEX(i16 signext %0, i16 signext %1) {
%3 = zext i16 %0 to i32
%4 = shl nuw i32 %3, 16
%5 = sext i16 %1 to i32
%6 = or i32 %4, %5
ret i32 %6
}
void gensub_d() {}


x86 assembly (clang, -O0):
<gensub_d>:
push   %rbp
mov    %rsp,%rbp
pop    %rbp
ret

x86 assembly (clang, -O2):
<gensub_d>:
ret

LLVM IR (-O0):
define void @gensub_d() {
ret void
}

LLVM IR (-O2):
define void @gensub_d() {
ret void
}
int PyMPELog_Init(void) {
  int ierr = 0;
  return ierr;
}


x86 assembly (clang, -O0):
<PyMPELog_Init>:
push   %rbp
mov    %rsp,%rbp
movl   $0x0,-0x4(%rbp)
mov    -0x4(%rbp),%eax
pop    %rbp
ret

x86 assembly (clang, -O2):
<PyMPELog_Init>:
xor    %eax,%eax
ret

LLVM IR (-O0):
define i32 @PyMPELog_Init() {
%1 = alloca i32
store i32 0, i32* %1
%2 = load i32, i32* %1
ret i32 %2
}

LLVM IR (-O2):
define i32 @PyMPELog_Init() {
ret i32 0
}
/* Variables and functions */
int /*<<< orphan*/ exit(int);
int /*<<< orphan*/ puts(char *);
void error_arguments() {
  puts("USAGE:\t masizo [--decompress] INFILE OUTFILE");
  exit(-1);
}


x86 assembly (clang, -O0):
<error_arguments>:
push   %rbp
mov    %rsp,%rbp
lea    0xed5(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

x86 assembly (clang, -O2):
<error_arguments>:
push   %rax
lea    0xed8(%rip),%rdi
call   1030 <puts@plt>
mov    $0xffffffff,%edi
call   1040 <exit@plt>

LLVM IR (-O0):
@.str = [45 x i8] c"USAGE:\09 masizo [--decompress] INFILE OUTFILE\00"
define void @error_arguments() {
%1 = call i32 @puts(i8* getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%2 = call i32 @exit(i32 -1)
unreachable
}

LLVM IR (-O2):
@.str = [45 x i8] c"USAGE:\09 masizo [--decompress] INFILE OUTFILE\00"
define void @error_arguments() {
%1 = tail call i32 @puts(i8* dereferenceable(1) getelementptr inbounds ([45 x i8], [45 x i8]* @.str, i64 0, i64 0))
%2 = tail call i32 @exit(i32 -1)
unreachable
}
/* Type definitions */
struct stat {
  int dummy;
};

/* Variables and functions */
int /*<<< orphan*/ porting_dbg(char *, char const *, int);
int stat(char const *, struct stat *);
int lstat(const char *path, struct stat *st) {
  int rcode;
  rcode = stat(path, st);
  porting_dbg("*** lstat() = %d, substituted by stat().", path, rcode);
  return rcode;
}


x86 assembly (clang, -O0):
<lstat>:
push   %rbp
mov    %rsp,%rbp
sub    $0x20,%rsp
mov    %rdi,-0x8(%rbp)
mov    %rsi,-0x10(%rbp)
mov    -0x8(%rbp),%rdi
mov    -0x10(%rbp),%rsi
call   1030 <stat@plt>
mov    %eax,-0x14(%rbp)
mov    -0x8(%rbp),%rsi
mov    -0x14(%rbp),%edx
lea    0xeb2(%rip),%rdi
call   1040 <porting_dbg@plt>
mov    -0x14(%rbp),%eax
add    $0x20,%rsp
pop    %rbp
ret

x86 assembly (clang, -O2):
<lstat>:
push   %rbp
push   %rbx
push   %rax
mov    %rdi,%rbx
call   1030 <stat@plt>
mov    %eax,%ebp
lea    0xecc(%rip),%rdi
mov    %rbx,%rsi
mov    %eax,%edx
call   1040 <porting_dbg@plt>
mov    %ebp,%eax
add    $0x8,%rsp
pop    %rbx
pop    %rbp
ret

LLVM IR (-O0):
%struct.stat = type { i32 }
@.str = [41 x i8] c"*** lstat() = %d, substituted by stat().\00"
define i32 @lstat(i8* %0, %struct.stat* %1) {
%3 = alloca i8*
%4 = alloca %struct.stat*
%5 = alloca i32
store i8* %0, i8** %3
store %struct.stat* %1, %struct.stat** %4
%6 = load i8*, i8** %3
%7 = load %struct.stat*, %struct.stat** %4
%8 = call i32 @stat(i8* %6, %struct.stat* %7)
store i32 %8, i32* %5
%9 = load i8*, i8** %3
%10 = load i32, i32* %5
%11 = call i32 @porting_dbg(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %9, i32 %10)
%12 = load i32, i32* %5
ret i32 %12
}

LLVM IR (-O2):
%struct.stat = type { i32 }
@.str = [41 x i8] c"*** lstat() = %d, substituted by stat().\00"
define i32 @lstat(i8* %0, %struct.stat* nocapture %1) {
%3 = tail call i32 @stat(i8* %0, %struct.stat* %1)
%4 = tail call i32 @porting_dbg(i8* getelementptr inbounds ([41 x i8], [41 x i8]* @.str, i64 0, i64 0), i8* %0, i32 %3)
ret i32 %3
}
void __div0(void) {
  while (1)
    ;
}


x86 assembly (clang, -O0):
<__div0>:
push   %rbp
mov    %rsp,%rbp
jmp    1109 <__div0+0x9>
jmp    1109 <__div0+0x9>

x86 assembly (clang, -O2):
<__div0>:
jmp    1100 <__div0>

LLVM IR (-O0):
define void @__div0() {
br label %1
1: ; preds = %0, %1
br label %1
}

LLVM IR (-O2):
define void @__div0() {
br label %1
1: ; preds = %0, %1
br label %1
}